repo_name string | path string | copies string | size string | content string | license string |
|---|---|---|---|---|---|
Arc-Team/android_kernel_htc_glacier | drivers/mtd/nand/h1910.c | 2791 | 4489 | /*
* drivers/mtd/nand/h1910.c
*
* Copyright (C) 2003 Joshua Wise (joshua@joshuawise.com)
*
* Derived from drivers/mtd/nand/edb7312.c
* Copyright (C) 2002 Marius Gröger (mag@sysgo.de)
* Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Overview:
* This is a device driver for the NAND flash device found on the
* iPAQ h1910 board which utilizes the Samsung K9F2808 part. This is
* a 128Mibit (16MiB x 8 bits) NAND flash device.
*/
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <asm/io.h>
#include <mach/hardware.h> /* for CLPS7111_VIRT_BASE */
#include <asm/sizes.h>
#include <mach/h1900-gpio.h>
#include <mach/ipaq.h>
/*
* MTD structure for EDB7312 board
*/
static struct mtd_info *h1910_nand_mtd = NULL;
/*
* Module stuff
*/
/*
* Define static partitions for flash device
*/
static struct mtd_partition partition_info[] = {
{name:"h1910 NAND Flash",
offset:0,
size:16 * 1024 * 1024}
};
#define NUM_PARTITIONS 1
/*
* hardware specific access to control-lines
*
* NAND_NCE: bit 0 - don't care
* NAND_CLE: bit 1 - address bit 2
* NAND_ALE: bit 2 - address bit 3
*/
static void h1910_hwcontrol(struct mtd_info *mtd, int cmd,
unsigned int ctrl)
{
struct nand_chip *chip = mtd->priv;
if (cmd != NAND_CMD_NONE)
writeb(cmd, chip->IO_ADDR_W | ((ctrl & 0x6) << 1));
}
/*
* read device ready pin
*/
#if 0
static int h1910_device_ready(struct mtd_info *mtd)
{
return (GPLR(55) & GPIO_bit(55));
}
#endif
/*
* Main initialization routine
*/
static int __init h1910_init(void)
{
struct nand_chip *this;
const char *part_type = 0;
int mtd_parts_nb = 0;
struct mtd_partition *mtd_parts = 0;
void __iomem *nandaddr;
if (!machine_is_h1900())
return -ENODEV;
nandaddr = ioremap(0x08000000, 0x1000);
if (!nandaddr) {
printk("Failed to ioremap nand flash.\n");
return -ENOMEM;
}
/* Allocate memory for MTD device structure and private data */
h1910_nand_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!h1910_nand_mtd) {
printk("Unable to allocate h1910 NAND MTD device structure.\n");
iounmap((void *)nandaddr);
return -ENOMEM;
}
/* Get pointer to private data */
this = (struct nand_chip *)(&h1910_nand_mtd[1]);
/* Initialize structures */
memset(h1910_nand_mtd, 0, sizeof(struct mtd_info));
memset(this, 0, sizeof(struct nand_chip));
/* Link the private data with the MTD structure */
h1910_nand_mtd->priv = this;
h1910_nand_mtd->owner = THIS_MODULE;
/*
* Enable VPEN
*/
GPSR(37) = GPIO_bit(37);
/* insert callbacks */
this->IO_ADDR_R = nandaddr;
this->IO_ADDR_W = nandaddr;
this->cmd_ctrl = h1910_hwcontrol;
this->dev_ready = NULL; /* unknown whether that was correct or not so we will just do it like this */
/* 15 us command delay time */
this->chip_delay = 50;
this->ecc.mode = NAND_ECC_SOFT;
this->options = NAND_NO_AUTOINCR;
/* Scan to find existence of the device */
if (nand_scan(h1910_nand_mtd, 1)) {
printk(KERN_NOTICE "No NAND device - returning -ENXIO\n");
kfree(h1910_nand_mtd);
iounmap((void *)nandaddr);
return -ENXIO;
}
#ifdef CONFIG_MTD_CMDLINE_PARTS
mtd_parts_nb = parse_cmdline_partitions(h1910_nand_mtd, &mtd_parts, "h1910-nand");
if (mtd_parts_nb > 0)
part_type = "command line";
else
mtd_parts_nb = 0;
#endif
if (mtd_parts_nb == 0) {
mtd_parts = partition_info;
mtd_parts_nb = NUM_PARTITIONS;
part_type = "static";
}
/* Register the partitions */
printk(KERN_NOTICE "Using %s partition definition\n", part_type);
mtd_device_register(h1910_nand_mtd, mtd_parts, mtd_parts_nb);
/* Return happy */
return 0;
}
module_init(h1910_init);
/*
* Clean up routine
*/
static void __exit h1910_cleanup(void)
{
struct nand_chip *this = (struct nand_chip *)&h1910_nand_mtd[1];
/* Release resources, unregister device */
nand_release(h1910_nand_mtd);
/* Release io resource */
iounmap((void *)this->IO_ADDR_W);
/* Free the MTD device structure */
kfree(h1910_nand_mtd);
}
module_exit(h1910_cleanup);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Joshua Wise <joshua at joshuawise dot com>");
MODULE_DESCRIPTION("NAND flash driver for iPAQ h1910");
| gpl-2.0 |
wimpknocker/android_kernel_samsung_viennalte | drivers/input/touchscreen/tsc40.c | 3559 | 3933 | /*
* TSC-40 serial touchscreen driver. It should be compatible with
* TSC-10 and 25.
*
* Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
* License: GPLv2 as published by the FSF.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/input.h>
#include <linux/serio.h>
#include <linux/init.h>
#define PACKET_LENGTH 5
struct tsc_ser {
struct input_dev *dev;
struct serio *serio;
u32 idx;
unsigned char data[PACKET_LENGTH];
char phys[32];
};
static void tsc_process_data(struct tsc_ser *ptsc)
{
struct input_dev *dev = ptsc->dev;
u8 *data = ptsc->data;
u32 x;
u32 y;
x = ((data[1] & 0x03) << 8) | data[2];
y = ((data[3] & 0x03) << 8) | data[4];
input_report_abs(dev, ABS_X, x);
input_report_abs(dev, ABS_Y, y);
input_report_key(dev, BTN_TOUCH, 1);
input_sync(dev);
}
static irqreturn_t tsc_interrupt(struct serio *serio,
unsigned char data, unsigned int flags)
{
struct tsc_ser *ptsc = serio_get_drvdata(serio);
struct input_dev *dev = ptsc->dev;
ptsc->data[ptsc->idx] = data;
switch (ptsc->idx++) {
case 0:
if (unlikely((data & 0x3e) != 0x10)) {
dev_dbg(&serio->dev,
"unsynchronized packet start (0x%02x)\n", data);
ptsc->idx = 0;
} else if (!(data & 0x01)) {
input_report_key(dev, BTN_TOUCH, 0);
input_sync(dev);
ptsc->idx = 0;
}
break;
case 1:
case 3:
if (unlikely(data & 0xfc)) {
dev_dbg(&serio->dev,
"unsynchronized data 0x%02x at offset %d\n",
data, ptsc->idx - 1);
ptsc->idx = 0;
}
break;
case 4:
tsc_process_data(ptsc);
ptsc->idx = 0;
break;
}
return IRQ_HANDLED;
}
static int tsc_connect(struct serio *serio, struct serio_driver *drv)
{
struct tsc_ser *ptsc;
struct input_dev *input_dev;
int error;
ptsc = kzalloc(sizeof(struct tsc_ser), GFP_KERNEL);
input_dev = input_allocate_device();
if (!ptsc || !input_dev) {
error = -ENOMEM;
goto fail1;
}
ptsc->serio = serio;
ptsc->dev = input_dev;
snprintf(ptsc->phys, sizeof(ptsc->phys), "%s/input0", serio->phys);
input_dev->name = "TSC-10/25/40 Serial TouchScreen";
input_dev->phys = ptsc->phys;
input_dev->id.bustype = BUS_RS232;
input_dev->id.vendor = SERIO_TSC40;
input_dev->id.product = 40;
input_dev->id.version = 0x0001;
input_dev->dev.parent = &serio->dev;
input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
__set_bit(BTN_TOUCH, input_dev->keybit);
input_set_abs_params(ptsc->dev, ABS_X, 0, 0x3ff, 0, 0);
input_set_abs_params(ptsc->dev, ABS_Y, 0, 0x3ff, 0, 0);
input_set_abs_params(ptsc->dev, ABS_PRESSURE, 0, 0, 0, 0);
serio_set_drvdata(serio, ptsc);
error = serio_open(serio, drv);
if (error)
goto fail2;
error = input_register_device(ptsc->dev);
if (error)
goto fail3;
return 0;
fail3:
serio_close(serio);
fail2:
serio_set_drvdata(serio, NULL);
fail1:
input_free_device(input_dev);
kfree(ptsc);
return error;
}
static void tsc_disconnect(struct serio *serio)
{
struct tsc_ser *ptsc = serio_get_drvdata(serio);
serio_close(serio);
input_unregister_device(ptsc->dev);
kfree(ptsc);
serio_set_drvdata(serio, NULL);
}
static struct serio_device_id tsc_serio_ids[] = {
{
.type = SERIO_RS232,
.proto = SERIO_TSC40,
.id = SERIO_ANY,
.extra = SERIO_ANY,
},
{ 0 }
};
MODULE_DEVICE_TABLE(serio, tsc_serio_ids);
#define DRIVER_DESC "TSC-10/25/40 serial touchscreen driver"
static struct serio_driver tsc_drv = {
.driver = {
.name = "tsc40",
},
.description = DRIVER_DESC,
.id_table = tsc_serio_ids,
.interrupt = tsc_interrupt,
.connect = tsc_connect,
.disconnect = tsc_disconnect,
};
static int __init tsc_ser_init(void)
{
return serio_register_driver(&tsc_drv);
}
module_init(tsc_ser_init);
static void __exit tsc_exit(void)
{
serio_unregister_driver(&tsc_drv);
}
module_exit(tsc_exit);
MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL v2");
| gpl-2.0 |
ztemt/Z5_H112_kernel | drivers/input/serio/i8042.c | 4583 | 34037 | /*
* i8042 keyboard and mouse controller driver for Linux
*
* Copyright (c) 1999-2004 Vojtech Pavlik
*/
/*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/types.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/serio.h>
#include <linux/err.h>
#include <linux/rcupdate.h>
#include <linux/platform_device.h>
#include <linux/i8042.h>
#include <linux/slab.h>
#include <asm/io.h>
MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
MODULE_LICENSE("GPL");
static bool i8042_nokbd;
module_param_named(nokbd, i8042_nokbd, bool, 0);
MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
static bool i8042_noaux;
module_param_named(noaux, i8042_noaux, bool, 0);
MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
static bool i8042_nomux;
module_param_named(nomux, i8042_nomux, bool, 0);
MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present.");
static bool i8042_unlock;
module_param_named(unlock, i8042_unlock, bool, 0);
MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
static bool i8042_reset;
module_param_named(reset, i8042_reset, bool, 0);
MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
static bool i8042_direct;
module_param_named(direct, i8042_direct, bool, 0);
MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
static bool i8042_dumbkbd;
module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
static bool i8042_noloop;
module_param_named(noloop, i8042_noloop, bool, 0);
MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
static bool i8042_notimeout;
module_param_named(notimeout, i8042_notimeout, bool, 0);
MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042");
#ifdef CONFIG_X86
static bool i8042_dritek;
module_param_named(dritek, i8042_dritek, bool, 0);
MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension");
#endif
#ifdef CONFIG_PNP
static bool i8042_nopnp;
module_param_named(nopnp, i8042_nopnp, bool, 0);
MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
#endif
#define DEBUG
#ifdef DEBUG
static bool i8042_debug;
module_param_named(debug, i8042_debug, bool, 0600);
MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
#endif
static bool i8042_bypass_aux_irq_test;
#include "i8042.h"
/*
* i8042_lock protects serialization between i8042_command and
* the interrupt handler.
*/
static DEFINE_SPINLOCK(i8042_lock);
/*
* Writers to AUX and KBD ports as well as users issuing i8042_command
* directly should acquire i8042_mutex (by means of calling
* i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that
* they do not disturb each other (unfortunately in many i8042
* implementations write to one of the ports will immediately abort
* command that is being processed by another port).
*/
static DEFINE_MUTEX(i8042_mutex);
struct i8042_port {
struct serio *serio;
int irq;
bool exists;
signed char mux;
};
#define I8042_KBD_PORT_NO 0
#define I8042_AUX_PORT_NO 1
#define I8042_MUX_PORT_NO 2
#define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
static struct i8042_port i8042_ports[I8042_NUM_PORTS];
static unsigned char i8042_initial_ctr;
static unsigned char i8042_ctr;
static bool i8042_mux_present;
static bool i8042_kbd_irq_registered;
static bool i8042_aux_irq_registered;
static unsigned char i8042_suppress_kbd_ack;
static struct platform_device *i8042_platform_device;
static irqreturn_t i8042_interrupt(int irq, void *dev_id);
static bool (*i8042_platform_filter)(unsigned char data, unsigned char str,
struct serio *serio);
void i8042_lock_chip(void)
{
mutex_lock(&i8042_mutex);
}
EXPORT_SYMBOL(i8042_lock_chip);
void i8042_unlock_chip(void)
{
mutex_unlock(&i8042_mutex);
}
EXPORT_SYMBOL(i8042_unlock_chip);
int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str,
struct serio *serio))
{
unsigned long flags;
int ret = 0;
spin_lock_irqsave(&i8042_lock, flags);
if (i8042_platform_filter) {
ret = -EBUSY;
goto out;
}
i8042_platform_filter = filter;
out:
spin_unlock_irqrestore(&i8042_lock, flags);
return ret;
}
EXPORT_SYMBOL(i8042_install_filter);
int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str,
struct serio *port))
{
unsigned long flags;
int ret = 0;
spin_lock_irqsave(&i8042_lock, flags);
if (i8042_platform_filter != filter) {
ret = -EINVAL;
goto out;
}
i8042_platform_filter = NULL;
out:
spin_unlock_irqrestore(&i8042_lock, flags);
return ret;
}
EXPORT_SYMBOL(i8042_remove_filter);
/*
* The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
* be ready for reading values from it / writing values to it.
* Called always with i8042_lock held.
*/
static int i8042_wait_read(void)
{
int i = 0;
while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
udelay(50);
i++;
}
return -(i == I8042_CTL_TIMEOUT);
}
static int i8042_wait_write(void)
{
int i = 0;
while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
udelay(50);
i++;
}
return -(i == I8042_CTL_TIMEOUT);
}
/*
* i8042_flush() flushes all data that may be in the keyboard and mouse buffers
* of the i8042 down the toilet.
*/
static int i8042_flush(void)
{
unsigned long flags;
unsigned char data, str;
int i = 0;
spin_lock_irqsave(&i8042_lock, flags);
while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
udelay(50);
data = i8042_read_data();
i++;
dbg("%02x <- i8042 (flush, %s)\n",
data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
}
spin_unlock_irqrestore(&i8042_lock, flags);
return i;
}
/*
* i8042_command() executes a command on the i8042. It also sends the input
* parameter(s) of the commands to it, and receives the output value(s). The
* parameters are to be stored in the param array, and the output is placed
* into the same array. The number of the parameters and output values is
* encoded in bits 8-11 of the command number.
*/
static int __i8042_command(unsigned char *param, int command)
{
int i, error;
if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
return -1;
error = i8042_wait_write();
if (error)
return error;
dbg("%02x -> i8042 (command)\n", command & 0xff);
i8042_write_command(command & 0xff);
for (i = 0; i < ((command >> 12) & 0xf); i++) {
error = i8042_wait_write();
if (error)
return error;
dbg("%02x -> i8042 (parameter)\n", param[i]);
i8042_write_data(param[i]);
}
for (i = 0; i < ((command >> 8) & 0xf); i++) {
error = i8042_wait_read();
if (error) {
dbg(" -- i8042 (timeout)\n");
return error;
}
if (command == I8042_CMD_AUX_LOOP &&
!(i8042_read_status() & I8042_STR_AUXDATA)) {
dbg(" -- i8042 (auxerr)\n");
return -1;
}
param[i] = i8042_read_data();
dbg("%02x <- i8042 (return)\n", param[i]);
}
return 0;
}
int i8042_command(unsigned char *param, int command)
{
unsigned long flags;
int retval;
spin_lock_irqsave(&i8042_lock, flags);
retval = __i8042_command(param, command);
spin_unlock_irqrestore(&i8042_lock, flags);
return retval;
}
EXPORT_SYMBOL(i8042_command);
/*
* i8042_kbd_write() sends a byte out through the keyboard interface.
*/
static int i8042_kbd_write(struct serio *port, unsigned char c)
{
unsigned long flags;
int retval = 0;
spin_lock_irqsave(&i8042_lock, flags);
if (!(retval = i8042_wait_write())) {
dbg("%02x -> i8042 (kbd-data)\n", c);
i8042_write_data(c);
}
spin_unlock_irqrestore(&i8042_lock, flags);
return retval;
}
/*
* i8042_aux_write() sends a byte out through the aux interface.
*/
static int i8042_aux_write(struct serio *serio, unsigned char c)
{
struct i8042_port *port = serio->port_data;
return i8042_command(&c, port->mux == -1 ?
I8042_CMD_AUX_SEND :
I8042_CMD_MUX_SEND + port->mux);
}
/*
* i8042_aux_close attempts to clear AUX or KBD port state by disabling
* and then re-enabling it.
*/
static void i8042_port_close(struct serio *serio)
{
int irq_bit;
int disable_bit;
const char *port_name;
if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) {
irq_bit = I8042_CTR_AUXINT;
disable_bit = I8042_CTR_AUXDIS;
port_name = "AUX";
} else {
irq_bit = I8042_CTR_KBDINT;
disable_bit = I8042_CTR_KBDDIS;
port_name = "KBD";
}
i8042_ctr &= ~irq_bit;
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
pr_warn("Can't write CTR while closing %s port\n", port_name);
udelay(50);
i8042_ctr &= ~disable_bit;
i8042_ctr |= irq_bit;
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
pr_err("Can't reactivate %s port\n", port_name);
/*
* See if there is any data appeared while we were messing with
* port state.
*/
i8042_interrupt(0, NULL);
}
/*
* i8042_start() is called by serio core when port is about to finish
* registering. It will mark port as existing so i8042_interrupt can
* start sending data through it.
*/
static int i8042_start(struct serio *serio)
{
struct i8042_port *port = serio->port_data;
port->exists = true;
mb();
return 0;
}
/*
* i8042_stop() marks serio port as non-existing so i8042_interrupt
* will not try to send data to the port that is about to go away.
* The function is called by serio core as part of unregister procedure.
*/
static void i8042_stop(struct serio *serio)
{
struct i8042_port *port = serio->port_data;
port->exists = false;
/*
* We synchronize with both AUX and KBD IRQs because there is
* a (very unlikely) chance that AUX IRQ is raised for KBD port
* and vice versa.
*/
synchronize_irq(I8042_AUX_IRQ);
synchronize_irq(I8042_KBD_IRQ);
port->serio = NULL;
}
/*
* i8042_filter() filters out unwanted bytes from the input data stream.
* It is called from i8042_interrupt and thus is running with interrupts
* off and i8042_lock held.
*/
static bool i8042_filter(unsigned char data, unsigned char str,
struct serio *serio)
{
if (unlikely(i8042_suppress_kbd_ack)) {
if ((~str & I8042_STR_AUXDATA) &&
(data == 0xfa || data == 0xfe)) {
i8042_suppress_kbd_ack--;
dbg("Extra keyboard ACK - filtered out\n");
return true;
}
}
if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) {
dbg("Filtered out by platform filter\n");
return true;
}
return false;
}
/*
* i8042_interrupt() is the most important function in this driver -
* it handles the interrupts from the i8042, and sends incoming bytes
* to the upper layers.
*/
static irqreturn_t i8042_interrupt(int irq, void *dev_id)
{
struct i8042_port *port;
struct serio *serio;
unsigned long flags;
unsigned char str, data;
unsigned int dfl;
unsigned int port_no;
bool filtered;
int ret = 1;
spin_lock_irqsave(&i8042_lock, flags);
str = i8042_read_status();
if (unlikely(~str & I8042_STR_OBF)) {
spin_unlock_irqrestore(&i8042_lock, flags);
if (irq)
dbg("Interrupt %d, without any data\n", irq);
ret = 0;
goto out;
}
data = i8042_read_data();
if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
static unsigned long last_transmit;
static unsigned char last_str;
dfl = 0;
if (str & I8042_STR_MUXERR) {
dbg("MUX error, status is %02x, data is %02x\n",
str, data);
/*
* When MUXERR condition is signalled the data register can only contain
* 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
* it is not always the case. Some KBCs also report 0xfc when there is
* nothing connected to the port while others sometimes get confused which
* port the data came from and signal error leaving the data intact. They
* _do not_ revert to legacy mode (actually I've never seen KBC reverting
* to legacy mode yet, when we see one we'll add proper handling).
* Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
* rest assume that the data came from the same serio last byte
* was transmitted (if transmission happened not too long ago).
*/
switch (data) {
default:
if (time_before(jiffies, last_transmit + HZ/10)) {
str = last_str;
break;
}
/* fall through - report timeout */
case 0xfc:
case 0xfd:
case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
}
}
port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
last_str = str;
last_transmit = jiffies;
} else {
dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0);
port_no = (str & I8042_STR_AUXDATA) ?
I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
}
port = &i8042_ports[port_no];
serio = port->exists ? port->serio : NULL;
dbg("%02x <- i8042 (interrupt, %d, %d%s%s)\n",
data, port_no, irq,
dfl & SERIO_PARITY ? ", bad parity" : "",
dfl & SERIO_TIMEOUT ? ", timeout" : "");
filtered = i8042_filter(data, str, serio);
spin_unlock_irqrestore(&i8042_lock, flags);
if (likely(port->exists && !filtered))
serio_interrupt(serio, data, dfl);
out:
return IRQ_RETVAL(ret);
}
/*
* i8042_enable_kbd_port enables keyboard port on chip
*/
static int i8042_enable_kbd_port(void)
{
i8042_ctr &= ~I8042_CTR_KBDDIS;
i8042_ctr |= I8042_CTR_KBDINT;
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
i8042_ctr &= ~I8042_CTR_KBDINT;
i8042_ctr |= I8042_CTR_KBDDIS;
pr_err("Failed to enable KBD port\n");
return -EIO;
}
return 0;
}
/*
* i8042_enable_aux_port enables AUX (mouse) port on chip
*/
static int i8042_enable_aux_port(void)
{
i8042_ctr &= ~I8042_CTR_AUXDIS;
i8042_ctr |= I8042_CTR_AUXINT;
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
i8042_ctr &= ~I8042_CTR_AUXINT;
i8042_ctr |= I8042_CTR_AUXDIS;
pr_err("Failed to enable AUX port\n");
return -EIO;
}
return 0;
}
/*
* i8042_enable_mux_ports enables 4 individual AUX ports after
* the controller has been switched into Multiplexed mode
*/
static int i8042_enable_mux_ports(void)
{
unsigned char param;
int i;
for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
i8042_command(¶m, I8042_CMD_MUX_PFX + i);
i8042_command(¶m, I8042_CMD_AUX_ENABLE);
}
return i8042_enable_aux_port();
}
/*
* i8042_set_mux_mode checks whether the controller has an
* active multiplexor and puts the chip into Multiplexed (true)
* or Legacy (false) mode.
*/
static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version)
{
unsigned char param, val;
/*
* Get rid of bytes in the queue.
*/
i8042_flush();
/*
* Internal loopback test - send three bytes, they should come back from the
* mouse interface, the last should be version.
*/
param = val = 0xf0;
if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
return -1;
param = val = multiplex ? 0x56 : 0xf6;
if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
return -1;
param = val = multiplex ? 0xa4 : 0xa5;
if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == val)
return -1;
/*
* Workaround for interference with USB Legacy emulation
* that causes a v10.12 MUX to be found.
*/
if (param == 0xac)
return -1;
if (mux_version)
*mux_version = param;
return 0;
}
/*
* i8042_check_mux() checks whether the controller supports the PS/2 Active
* Multiplexing specification by Synaptics, Phoenix, Insyde and
* LCS/Telegraphics.
*/
static int __init i8042_check_mux(void)
{
unsigned char mux_version;
if (i8042_set_mux_mode(true, &mux_version))
return -1;
pr_info("Detected active multiplexing controller, rev %d.%d\n",
(mux_version >> 4) & 0xf, mux_version & 0xf);
/*
* Disable all muxed ports by disabling AUX.
*/
i8042_ctr |= I8042_CTR_AUXDIS;
i8042_ctr &= ~I8042_CTR_AUXINT;
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
pr_err("Failed to disable AUX port, can't use MUX\n");
return -EIO;
}
i8042_mux_present = true;
return 0;
}
/*
* The following is used to test AUX IRQ delivery.
*/
static struct completion i8042_aux_irq_delivered __initdata;
static bool i8042_irq_being_tested __initdata;
static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id)
{
unsigned long flags;
unsigned char str, data;
int ret = 0;
spin_lock_irqsave(&i8042_lock, flags);
str = i8042_read_status();
if (str & I8042_STR_OBF) {
data = i8042_read_data();
dbg("%02x <- i8042 (aux_test_irq, %s)\n",
data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
if (i8042_irq_being_tested &&
data == 0xa5 && (str & I8042_STR_AUXDATA))
complete(&i8042_aux_irq_delivered);
ret = 1;
}
spin_unlock_irqrestore(&i8042_lock, flags);
return IRQ_RETVAL(ret);
}
/*
* i8042_toggle_aux - enables or disables AUX port on i8042 via command and
* verifies success by readinng CTR. Used when testing for presence of AUX
* port.
*/
static int __init i8042_toggle_aux(bool on)
{
unsigned char param;
int i;
if (i8042_command(¶m,
on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
return -1;
/* some chips need some time to set the I8042_CTR_AUXDIS bit */
for (i = 0; i < 100; i++) {
udelay(50);
if (i8042_command(¶m, I8042_CMD_CTL_RCTR))
return -1;
if (!(param & I8042_CTR_AUXDIS) == on)
return 0;
}
return -1;
}
/*
* i8042_check_aux() applies as much paranoia as it can at detecting
* the presence of an AUX interface.
*/
static int __init i8042_check_aux(void)
{
int retval = -1;
bool irq_registered = false;
bool aux_loop_broken = false;
unsigned long flags;
unsigned char param;
/*
* Get rid of bytes in the queue.
*/
i8042_flush();
/*
* Internal loopback test - filters out AT-type i8042's. Unfortunately
* SiS screwed up and their 5597 doesn't support the LOOP command even
* though it has an AUX port.
*/
param = 0x5a;
retval = i8042_command(¶m, I8042_CMD_AUX_LOOP);
if (retval || param != 0x5a) {
/*
* External connection test - filters out AT-soldered PS/2 i8042's
* 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
* 0xfa - no error on some notebooks which ignore the spec
* Because it's common for chipsets to return error on perfectly functioning
* AUX ports, we test for this only when the LOOP command failed.
*/
if (i8042_command(¶m, I8042_CMD_AUX_TEST) ||
(param && param != 0xfa && param != 0xff))
return -1;
/*
* If AUX_LOOP completed without error but returned unexpected data
* mark it as broken
*/
if (!retval)
aux_loop_broken = true;
}
/*
* Bit assignment test - filters out PS/2 i8042's in AT mode
*/
if (i8042_toggle_aux(false)) {
pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n");
}
if (i8042_toggle_aux(true))
return -1;
/*
* Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
* used it for a PCI card or somethig else.
*/
if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) {
/*
* Without LOOP command we can't test AUX IRQ delivery. Assume the port
* is working and hope we are right.
*/
retval = 0;
goto out;
}
if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
"i8042", i8042_platform_device))
goto out;
irq_registered = true;
if (i8042_enable_aux_port())
goto out;
spin_lock_irqsave(&i8042_lock, flags);
init_completion(&i8042_aux_irq_delivered);
i8042_irq_being_tested = true;
param = 0xa5;
retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff);
spin_unlock_irqrestore(&i8042_lock, flags);
if (retval)
goto out;
if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
msecs_to_jiffies(250)) == 0) {
/*
* AUX IRQ was never delivered so we need to flush the controller to
* get rid of the byte we put there; otherwise keyboard may not work.
*/
dbg(" -- i8042 (aux irq test timeout)\n");
i8042_flush();
retval = -1;
}
out:
/*
* Disable the interface.
*/
i8042_ctr |= I8042_CTR_AUXDIS;
i8042_ctr &= ~I8042_CTR_AUXINT;
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
retval = -1;
if (irq_registered)
free_irq(I8042_AUX_IRQ, i8042_platform_device);
return retval;
}
static int i8042_controller_check(void)
{
if (i8042_flush() == I8042_BUFFER_SIZE) {
pr_err("No controller found\n");
return -ENODEV;
}
return 0;
}
static int i8042_controller_selftest(void)
{
unsigned char param;
int i = 0;
/*
* We try this 5 times; on some really fragile systems this does not
* take the first time...
*/
do {
if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
pr_err("i8042 controller selftest timeout\n");
return -ENODEV;
}
if (param == I8042_RET_CTL_TEST)
return 0;
dbg("i8042 controller selftest: %#x != %#x\n",
param, I8042_RET_CTL_TEST);
msleep(50);
} while (i++ < 5);
#ifdef CONFIG_X86
/*
* On x86, we don't fail entire i8042 initialization if controller
* reset fails in hopes that keyboard port will still be functional
* and user will still get a working keyboard. This is especially
* important on netbooks. On other arches we trust hardware more.
*/
pr_info("giving up on controller selftest, continuing anyway...\n");
return 0;
#else
pr_err("i8042 controller selftest failed\n");
return -EIO;
#endif
}
/*
* i8042_controller init initializes the i8042 controller, and,
* most importantly, sets it into non-xlated mode if that's
* desired.
*/
static int i8042_controller_init(void)
{
unsigned long flags;
int n = 0;
unsigned char ctr[2];
/*
* Save the CTR for restore on unload / reboot.
*/
do {
if (n >= 10) {
pr_err("Unable to get stable CTR read\n");
return -EIO;
}
if (n != 0)
udelay(50);
if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) {
pr_err("Can't read CTR while initializing i8042\n");
return -EIO;
}
} while (n < 2 || ctr[0] != ctr[1]);
i8042_initial_ctr = i8042_ctr = ctr[0];
/*
* Disable the keyboard interface and interrupt.
*/
i8042_ctr |= I8042_CTR_KBDDIS;
i8042_ctr &= ~I8042_CTR_KBDINT;
/*
* Handle keylock.
*/
spin_lock_irqsave(&i8042_lock, flags);
if (~i8042_read_status() & I8042_STR_KEYLOCK) {
if (i8042_unlock)
i8042_ctr |= I8042_CTR_IGNKEYLOCK;
else
pr_warn("Warning: Keylock active\n");
}
spin_unlock_irqrestore(&i8042_lock, flags);
/*
* If the chip is configured into nontranslated mode by the BIOS, don't
* bother enabling translating and be happy.
*/
if (~i8042_ctr & I8042_CTR_XLATE)
i8042_direct = true;
/*
* Set nontranslated mode for the kbd interface if requested by an option.
* After this the kbd interface becomes a simple serial in/out, like the aux
* interface is. We don't do this by default, since it can confuse notebook
* BIOSes.
*/
if (i8042_direct)
i8042_ctr &= ~I8042_CTR_XLATE;
/*
* Write CTR back.
*/
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
pr_err("Can't write CTR while initializing i8042\n");
return -EIO;
}
/*
* Flush whatever accumulated while we were disabling keyboard port.
*/
i8042_flush();
return 0;
}
/*
* Reset the controller and reset CRT to the original value set by BIOS.
*/
static void i8042_controller_reset(bool force_reset)
{
i8042_flush();
/*
* Disable both KBD and AUX interfaces so they don't get in the way
*/
i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
pr_warn("Can't write CTR while resetting\n");
/*
* Disable MUX mode if present.
*/
if (i8042_mux_present)
i8042_set_mux_mode(false, NULL);
/*
* Reset the controller if requested.
*/
if (i8042_reset || force_reset)
i8042_controller_selftest();
/*
* Restore the original control register setting.
*/
if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
pr_warn("Can't restore CTR\n");
}
/*
* i8042_panic_blink() will turn the keyboard LEDs on or off and is called
* when kernel panics. Flashing LEDs is useful for users running X who may
* not see the console and will help distingushing panics from "real"
* lockups.
*
* Note that DELAY has a limit of 10ms so we will not get stuck here
* waiting for KBC to free up even if KBD interrupt is off
*/
#define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
static long i8042_panic_blink(int state)
{
long delay = 0;
char led;
led = (state) ? 0x01 | 0x04 : 0;
while (i8042_read_status() & I8042_STR_IBF)
DELAY;
dbg("%02x -> i8042 (panic blink)\n", 0xed);
i8042_suppress_kbd_ack = 2;
i8042_write_data(0xed); /* set leds */
DELAY;
while (i8042_read_status() & I8042_STR_IBF)
DELAY;
DELAY;
dbg("%02x -> i8042 (panic blink)\n", led);
i8042_write_data(led);
DELAY;
return delay;
}
#undef DELAY
#ifdef CONFIG_X86
static void i8042_dritek_enable(void)
{
unsigned char param = 0x90;
int error;
error = i8042_command(¶m, 0x1059);
if (error)
pr_warn("Failed to enable DRITEK extension: %d\n", error);
}
#endif
#ifdef CONFIG_PM
/*
* Here we try to reset everything back to a state we had
* before suspending.
*/
static int i8042_controller_resume(bool force_reset)
{
int error;
error = i8042_controller_check();
if (error)
return error;
if (i8042_reset || force_reset) {
error = i8042_controller_selftest();
if (error)
return error;
}
/*
* Restore original CTR value and disable all ports
*/
i8042_ctr = i8042_initial_ctr;
if (i8042_direct)
i8042_ctr &= ~I8042_CTR_XLATE;
i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
pr_warn("Can't write CTR to resume, retrying...\n");
msleep(50);
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
pr_err("CTR write retry failed\n");
return -EIO;
}
}
#ifdef CONFIG_X86
if (i8042_dritek)
i8042_dritek_enable();
#endif
if (i8042_mux_present) {
if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports())
pr_warn("failed to resume active multiplexor, mouse won't work\n");
} else if (i8042_ports[I8042_AUX_PORT_NO].serio)
i8042_enable_aux_port();
if (i8042_ports[I8042_KBD_PORT_NO].serio)
i8042_enable_kbd_port();
i8042_interrupt(0, NULL);
return 0;
}
/*
* Here we try to restore the original BIOS settings to avoid
* upsetting it.
*/
static int i8042_pm_suspend(struct device *dev)
{
i8042_controller_reset(true);
return 0;
}
static int i8042_pm_resume(struct device *dev)
{
/*
* On resume from S2R we always try to reset the controller
* to bring it in a sane state. (In case of S2D we expect
* BIOS to reset the controller for us.)
*/
return i8042_controller_resume(true);
}
static int i8042_pm_thaw(struct device *dev)
{
i8042_interrupt(0, NULL);
return 0;
}
static int i8042_pm_reset(struct device *dev)
{
i8042_controller_reset(false);
return 0;
}
static int i8042_pm_restore(struct device *dev)
{
return i8042_controller_resume(false);
}
static const struct dev_pm_ops i8042_pm_ops = {
.suspend = i8042_pm_suspend,
.resume = i8042_pm_resume,
.thaw = i8042_pm_thaw,
.poweroff = i8042_pm_reset,
.restore = i8042_pm_restore,
};
#endif /* CONFIG_PM */
/*
* We need to reset the 8042 back to original mode on system shutdown,
* because otherwise BIOSes will be confused.
*/
static void i8042_shutdown(struct platform_device *dev)
{
i8042_controller_reset(false);
}
static int __init i8042_create_kbd_port(void)
{
struct serio *serio;
struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
if (!serio)
return -ENOMEM;
serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
serio->start = i8042_start;
serio->stop = i8042_stop;
serio->close = i8042_port_close;
serio->port_data = port;
serio->dev.parent = &i8042_platform_device->dev;
strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
port->serio = serio;
port->irq = I8042_KBD_IRQ;
return 0;
}
static int __init i8042_create_aux_port(int idx)
{
struct serio *serio;
int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
struct i8042_port *port = &i8042_ports[port_no];
serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
if (!serio)
return -ENOMEM;
serio->id.type = SERIO_8042;
serio->write = i8042_aux_write;
serio->start = i8042_start;
serio->stop = i8042_stop;
serio->port_data = port;
serio->dev.parent = &i8042_platform_device->dev;
if (idx < 0) {
strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
serio->close = i8042_port_close;
} else {
snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
}
port->serio = serio;
port->mux = idx;
port->irq = I8042_AUX_IRQ;
return 0;
}
static void __init i8042_free_kbd_port(void)
{
kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
}
static void __init i8042_free_aux_ports(void)
{
int i;
for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
kfree(i8042_ports[i].serio);
i8042_ports[i].serio = NULL;
}
}
static void __init i8042_register_ports(void)
{
int i;
for (i = 0; i < I8042_NUM_PORTS; i++) {
if (i8042_ports[i].serio) {
printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
i8042_ports[i].serio->name,
(unsigned long) I8042_DATA_REG,
(unsigned long) I8042_COMMAND_REG,
i8042_ports[i].irq);
serio_register_port(i8042_ports[i].serio);
}
}
}
static void __devexit i8042_unregister_ports(void)
{
int i;
for (i = 0; i < I8042_NUM_PORTS; i++) {
if (i8042_ports[i].serio) {
serio_unregister_port(i8042_ports[i].serio);
i8042_ports[i].serio = NULL;
}
}
}
/*
* Checks whether port belongs to i8042 controller.
*/
bool i8042_check_port_owner(const struct serio *port)
{
int i;
for (i = 0; i < I8042_NUM_PORTS; i++)
if (i8042_ports[i].serio == port)
return true;
return false;
}
EXPORT_SYMBOL(i8042_check_port_owner);
static void i8042_free_irqs(void)
{
if (i8042_aux_irq_registered)
free_irq(I8042_AUX_IRQ, i8042_platform_device);
if (i8042_kbd_irq_registered)
free_irq(I8042_KBD_IRQ, i8042_platform_device);
i8042_aux_irq_registered = i8042_kbd_irq_registered = false;
}
static int __init i8042_setup_aux(void)
{
int (*aux_enable)(void);
int error;
int i;
if (i8042_check_aux())
return -ENODEV;
if (i8042_nomux || i8042_check_mux()) {
error = i8042_create_aux_port(-1);
if (error)
goto err_free_ports;
aux_enable = i8042_enable_aux_port;
} else {
for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
error = i8042_create_aux_port(i);
if (error)
goto err_free_ports;
}
aux_enable = i8042_enable_mux_ports;
}
error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
"i8042", i8042_platform_device);
if (error)
goto err_free_ports;
if (aux_enable())
goto err_free_irq;
i8042_aux_irq_registered = true;
return 0;
err_free_irq:
free_irq(I8042_AUX_IRQ, i8042_platform_device);
err_free_ports:
i8042_free_aux_ports();
return error;
}
static int __init i8042_setup_kbd(void)
{
int error;
error = i8042_create_kbd_port();
if (error)
return error;
error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
"i8042", i8042_platform_device);
if (error)
goto err_free_port;
error = i8042_enable_kbd_port();
if (error)
goto err_free_irq;
i8042_kbd_irq_registered = true;
return 0;
err_free_irq:
free_irq(I8042_KBD_IRQ, i8042_platform_device);
err_free_port:
i8042_free_kbd_port();
return error;
}
static int __init i8042_probe(struct platform_device *dev)
{
int error;
i8042_platform_device = dev;
if (i8042_reset) {
error = i8042_controller_selftest();
if (error)
return error;
}
error = i8042_controller_init();
if (error)
return error;
#ifdef CONFIG_X86
if (i8042_dritek)
i8042_dritek_enable();
#endif
if (!i8042_noaux) {
error = i8042_setup_aux();
if (error && error != -ENODEV && error != -EBUSY)
goto out_fail;
}
if (!i8042_nokbd) {
error = i8042_setup_kbd();
if (error)
goto out_fail;
}
/*
* Ok, everything is ready, let's register all serio ports
*/
i8042_register_ports();
return 0;
out_fail:
i8042_free_aux_ports(); /* in case KBD failed but AUX not */
i8042_free_irqs();
i8042_controller_reset(false);
i8042_platform_device = NULL;
return error;
}
static int __devexit i8042_remove(struct platform_device *dev)
{
i8042_unregister_ports();
i8042_free_irqs();
i8042_controller_reset(false);
i8042_platform_device = NULL;
return 0;
}
static struct platform_driver i8042_driver = {
.driver = {
.name = "i8042",
.owner = THIS_MODULE,
#ifdef CONFIG_PM
.pm = &i8042_pm_ops,
#endif
},
.remove = __devexit_p(i8042_remove),
.shutdown = i8042_shutdown,
};
static int __init i8042_init(void)
{
struct platform_device *pdev;
int err;
dbg_init();
err = i8042_platform_init();
if (err)
return err;
err = i8042_controller_check();
if (err)
goto err_platform_exit;
pdev = platform_create_bundle(&i8042_driver, i8042_probe, NULL, 0, NULL, 0);
if (IS_ERR(pdev)) {
err = PTR_ERR(pdev);
goto err_platform_exit;
}
panic_blink = i8042_panic_blink;
return 0;
err_platform_exit:
i8042_platform_exit();
return err;
}
static void __exit i8042_exit(void)
{
platform_device_unregister(i8042_platform_device);
platform_driver_unregister(&i8042_driver);
i8042_platform_exit();
panic_blink = NULL;
}
module_init(i8042_init);
module_exit(i8042_exit);
| gpl-2.0 |
Ace-III-Dev/android_kernel_samsung_hawaii | drivers/input/serio/i8042.c | 4583 | 34037 | /*
* i8042 keyboard and mouse controller driver for Linux
*
* Copyright (c) 1999-2004 Vojtech Pavlik
*/
/*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/types.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/serio.h>
#include <linux/err.h>
#include <linux/rcupdate.h>
#include <linux/platform_device.h>
#include <linux/i8042.h>
#include <linux/slab.h>
#include <asm/io.h>
MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
MODULE_LICENSE("GPL");
static bool i8042_nokbd;
module_param_named(nokbd, i8042_nokbd, bool, 0);
MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
static bool i8042_noaux;
module_param_named(noaux, i8042_noaux, bool, 0);
MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
static bool i8042_nomux;
module_param_named(nomux, i8042_nomux, bool, 0);
MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present.");
static bool i8042_unlock;
module_param_named(unlock, i8042_unlock, bool, 0);
MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
static bool i8042_reset;
module_param_named(reset, i8042_reset, bool, 0);
MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
static bool i8042_direct;
module_param_named(direct, i8042_direct, bool, 0);
MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
static bool i8042_dumbkbd;
module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
static bool i8042_noloop;
module_param_named(noloop, i8042_noloop, bool, 0);
MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
static bool i8042_notimeout;
module_param_named(notimeout, i8042_notimeout, bool, 0);
MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042");
#ifdef CONFIG_X86
static bool i8042_dritek;
module_param_named(dritek, i8042_dritek, bool, 0);
MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension");
#endif
#ifdef CONFIG_PNP
static bool i8042_nopnp;
module_param_named(nopnp, i8042_nopnp, bool, 0);
MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
#endif
#define DEBUG
#ifdef DEBUG
static bool i8042_debug;
module_param_named(debug, i8042_debug, bool, 0600);
MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
#endif
static bool i8042_bypass_aux_irq_test;
#include "i8042.h"
/*
* i8042_lock protects serialization between i8042_command and
* the interrupt handler.
*/
static DEFINE_SPINLOCK(i8042_lock);
/*
* Writers to AUX and KBD ports as well as users issuing i8042_command
* directly should acquire i8042_mutex (by means of calling
* i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that
* they do not disturb each other (unfortunately in many i8042
* implementations write to one of the ports will immediately abort
* command that is being processed by another port).
*/
static DEFINE_MUTEX(i8042_mutex);
struct i8042_port {
struct serio *serio;
int irq;
bool exists;
signed char mux;
};
#define I8042_KBD_PORT_NO 0
#define I8042_AUX_PORT_NO 1
#define I8042_MUX_PORT_NO 2
#define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
static struct i8042_port i8042_ports[I8042_NUM_PORTS];
static unsigned char i8042_initial_ctr;
static unsigned char i8042_ctr;
static bool i8042_mux_present;
static bool i8042_kbd_irq_registered;
static bool i8042_aux_irq_registered;
static unsigned char i8042_suppress_kbd_ack;
static struct platform_device *i8042_platform_device;
static irqreturn_t i8042_interrupt(int irq, void *dev_id);
static bool (*i8042_platform_filter)(unsigned char data, unsigned char str,
struct serio *serio);
void i8042_lock_chip(void)
{
mutex_lock(&i8042_mutex);
}
EXPORT_SYMBOL(i8042_lock_chip);
void i8042_unlock_chip(void)
{
mutex_unlock(&i8042_mutex);
}
EXPORT_SYMBOL(i8042_unlock_chip);
int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str,
struct serio *serio))
{
unsigned long flags;
int ret = 0;
spin_lock_irqsave(&i8042_lock, flags);
if (i8042_platform_filter) {
ret = -EBUSY;
goto out;
}
i8042_platform_filter = filter;
out:
spin_unlock_irqrestore(&i8042_lock, flags);
return ret;
}
EXPORT_SYMBOL(i8042_install_filter);
int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str,
struct serio *port))
{
unsigned long flags;
int ret = 0;
spin_lock_irqsave(&i8042_lock, flags);
if (i8042_platform_filter != filter) {
ret = -EINVAL;
goto out;
}
i8042_platform_filter = NULL;
out:
spin_unlock_irqrestore(&i8042_lock, flags);
return ret;
}
EXPORT_SYMBOL(i8042_remove_filter);
/*
* The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
* be ready for reading values from it / writing values to it.
* Called always with i8042_lock held.
*/
static int i8042_wait_read(void)
{
int i = 0;
while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
udelay(50);
i++;
}
return -(i == I8042_CTL_TIMEOUT);
}
static int i8042_wait_write(void)
{
int i = 0;
while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
udelay(50);
i++;
}
return -(i == I8042_CTL_TIMEOUT);
}
/*
* i8042_flush() flushes all data that may be in the keyboard and mouse buffers
* of the i8042 down the toilet.
*/
static int i8042_flush(void)
{
unsigned long flags;
unsigned char data, str;
int i = 0;
spin_lock_irqsave(&i8042_lock, flags);
while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
udelay(50);
data = i8042_read_data();
i++;
dbg("%02x <- i8042 (flush, %s)\n",
data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
}
spin_unlock_irqrestore(&i8042_lock, flags);
return i;
}
/*
* i8042_command() executes a command on the i8042. It also sends the input
* parameter(s) of the commands to it, and receives the output value(s). The
* parameters are to be stored in the param array, and the output is placed
* into the same array. The number of the parameters and output values is
* encoded in bits 8-11 of the command number.
*/
static int __i8042_command(unsigned char *param, int command)
{
int i, error;
if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
return -1;
error = i8042_wait_write();
if (error)
return error;
dbg("%02x -> i8042 (command)\n", command & 0xff);
i8042_write_command(command & 0xff);
for (i = 0; i < ((command >> 12) & 0xf); i++) {
error = i8042_wait_write();
if (error)
return error;
dbg("%02x -> i8042 (parameter)\n", param[i]);
i8042_write_data(param[i]);
}
for (i = 0; i < ((command >> 8) & 0xf); i++) {
error = i8042_wait_read();
if (error) {
dbg(" -- i8042 (timeout)\n");
return error;
}
if (command == I8042_CMD_AUX_LOOP &&
!(i8042_read_status() & I8042_STR_AUXDATA)) {
dbg(" -- i8042 (auxerr)\n");
return -1;
}
param[i] = i8042_read_data();
dbg("%02x <- i8042 (return)\n", param[i]);
}
return 0;
}
int i8042_command(unsigned char *param, int command)
{
unsigned long flags;
int retval;
spin_lock_irqsave(&i8042_lock, flags);
retval = __i8042_command(param, command);
spin_unlock_irqrestore(&i8042_lock, flags);
return retval;
}
EXPORT_SYMBOL(i8042_command);
/*
* i8042_kbd_write() sends a byte out through the keyboard interface.
*/
static int i8042_kbd_write(struct serio *port, unsigned char c)
{
unsigned long flags;
int retval = 0;
spin_lock_irqsave(&i8042_lock, flags);
if (!(retval = i8042_wait_write())) {
dbg("%02x -> i8042 (kbd-data)\n", c);
i8042_write_data(c);
}
spin_unlock_irqrestore(&i8042_lock, flags);
return retval;
}
/*
* i8042_aux_write() sends a byte out through the aux interface.
*/
static int i8042_aux_write(struct serio *serio, unsigned char c)
{
struct i8042_port *port = serio->port_data;
return i8042_command(&c, port->mux == -1 ?
I8042_CMD_AUX_SEND :
I8042_CMD_MUX_SEND + port->mux);
}
/*
* i8042_aux_close attempts to clear AUX or KBD port state by disabling
* and then re-enabling it.
*/
static void i8042_port_close(struct serio *serio)
{
int irq_bit;
int disable_bit;
const char *port_name;
if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) {
irq_bit = I8042_CTR_AUXINT;
disable_bit = I8042_CTR_AUXDIS;
port_name = "AUX";
} else {
irq_bit = I8042_CTR_KBDINT;
disable_bit = I8042_CTR_KBDDIS;
port_name = "KBD";
}
i8042_ctr &= ~irq_bit;
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
pr_warn("Can't write CTR while closing %s port\n", port_name);
udelay(50);
i8042_ctr &= ~disable_bit;
i8042_ctr |= irq_bit;
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
pr_err("Can't reactivate %s port\n", port_name);
/*
* See if there is any data appeared while we were messing with
* port state.
*/
i8042_interrupt(0, NULL);
}
/*
* i8042_start() is called by serio core when port is about to finish
* registering. It will mark port as existing so i8042_interrupt can
* start sending data through it.
*/
static int i8042_start(struct serio *serio)
{
struct i8042_port *port = serio->port_data;
port->exists = true;
mb();
return 0;
}
/*
* i8042_stop() marks serio port as non-existing so i8042_interrupt
* will not try to send data to the port that is about to go away.
* The function is called by serio core as part of unregister procedure.
*/
static void i8042_stop(struct serio *serio)
{
struct i8042_port *port = serio->port_data;
port->exists = false;
/*
* We synchronize with both AUX and KBD IRQs because there is
* a (very unlikely) chance that AUX IRQ is raised for KBD port
* and vice versa.
*/
synchronize_irq(I8042_AUX_IRQ);
synchronize_irq(I8042_KBD_IRQ);
port->serio = NULL;
}
/*
* i8042_filter() filters out unwanted bytes from the input data stream.
* It is called from i8042_interrupt and thus is running with interrupts
* off and i8042_lock held.
*/
static bool i8042_filter(unsigned char data, unsigned char str,
struct serio *serio)
{
if (unlikely(i8042_suppress_kbd_ack)) {
if ((~str & I8042_STR_AUXDATA) &&
(data == 0xfa || data == 0xfe)) {
i8042_suppress_kbd_ack--;
dbg("Extra keyboard ACK - filtered out\n");
return true;
}
}
if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) {
dbg("Filtered out by platform filter\n");
return true;
}
return false;
}
/*
* i8042_interrupt() is the most important function in this driver -
* it handles the interrupts from the i8042, and sends incoming bytes
* to the upper layers.
*/
static irqreturn_t i8042_interrupt(int irq, void *dev_id)
{
struct i8042_port *port;
struct serio *serio;
unsigned long flags;
unsigned char str, data;
unsigned int dfl;
unsigned int port_no;
bool filtered;
int ret = 1;
spin_lock_irqsave(&i8042_lock, flags);
str = i8042_read_status();
if (unlikely(~str & I8042_STR_OBF)) {
spin_unlock_irqrestore(&i8042_lock, flags);
if (irq)
dbg("Interrupt %d, without any data\n", irq);
ret = 0;
goto out;
}
data = i8042_read_data();
if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
static unsigned long last_transmit;
static unsigned char last_str;
dfl = 0;
if (str & I8042_STR_MUXERR) {
dbg("MUX error, status is %02x, data is %02x\n",
str, data);
/*
* When MUXERR condition is signalled the data register can only contain
* 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
* it is not always the case. Some KBCs also report 0xfc when there is
* nothing connected to the port while others sometimes get confused which
* port the data came from and signal error leaving the data intact. They
* _do not_ revert to legacy mode (actually I've never seen KBC reverting
* to legacy mode yet, when we see one we'll add proper handling).
* Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
* rest assume that the data came from the same serio last byte
* was transmitted (if transmission happened not too long ago).
*/
switch (data) {
default:
if (time_before(jiffies, last_transmit + HZ/10)) {
str = last_str;
break;
}
/* fall through - report timeout */
case 0xfc:
case 0xfd:
case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
}
}
port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
last_str = str;
last_transmit = jiffies;
} else {
dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0);
port_no = (str & I8042_STR_AUXDATA) ?
I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
}
port = &i8042_ports[port_no];
serio = port->exists ? port->serio : NULL;
dbg("%02x <- i8042 (interrupt, %d, %d%s%s)\n",
data, port_no, irq,
dfl & SERIO_PARITY ? ", bad parity" : "",
dfl & SERIO_TIMEOUT ? ", timeout" : "");
filtered = i8042_filter(data, str, serio);
spin_unlock_irqrestore(&i8042_lock, flags);
if (likely(port->exists && !filtered))
serio_interrupt(serio, data, dfl);
out:
return IRQ_RETVAL(ret);
}
/*
* i8042_enable_kbd_port enables keyboard port on chip
*/
static int i8042_enable_kbd_port(void)
{
i8042_ctr &= ~I8042_CTR_KBDDIS;
i8042_ctr |= I8042_CTR_KBDINT;
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
i8042_ctr &= ~I8042_CTR_KBDINT;
i8042_ctr |= I8042_CTR_KBDDIS;
pr_err("Failed to enable KBD port\n");
return -EIO;
}
return 0;
}
/*
* i8042_enable_aux_port enables AUX (mouse) port on chip
*/
static int i8042_enable_aux_port(void)
{
i8042_ctr &= ~I8042_CTR_AUXDIS;
i8042_ctr |= I8042_CTR_AUXINT;
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
i8042_ctr &= ~I8042_CTR_AUXINT;
i8042_ctr |= I8042_CTR_AUXDIS;
pr_err("Failed to enable AUX port\n");
return -EIO;
}
return 0;
}
/*
* i8042_enable_mux_ports enables 4 individual AUX ports after
* the controller has been switched into Multiplexed mode
*/
static int i8042_enable_mux_ports(void)
{
unsigned char param;
int i;
for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
i8042_command(¶m, I8042_CMD_MUX_PFX + i);
i8042_command(¶m, I8042_CMD_AUX_ENABLE);
}
return i8042_enable_aux_port();
}
/*
* i8042_set_mux_mode checks whether the controller has an
* active multiplexor and puts the chip into Multiplexed (true)
* or Legacy (false) mode.
*/
static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version)
{
unsigned char param, val;
/*
* Get rid of bytes in the queue.
*/
i8042_flush();
/*
* Internal loopback test - send three bytes, they should come back from the
* mouse interface, the last should be version.
*/
param = val = 0xf0;
if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
return -1;
param = val = multiplex ? 0x56 : 0xf6;
if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
return -1;
param = val = multiplex ? 0xa4 : 0xa5;
if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == val)
return -1;
/*
* Workaround for interference with USB Legacy emulation
* that causes a v10.12 MUX to be found.
*/
if (param == 0xac)
return -1;
if (mux_version)
*mux_version = param;
return 0;
}
/*
* i8042_check_mux() checks whether the controller supports the PS/2 Active
* Multiplexing specification by Synaptics, Phoenix, Insyde and
* LCS/Telegraphics.
*/
static int __init i8042_check_mux(void)
{
unsigned char mux_version;
if (i8042_set_mux_mode(true, &mux_version))
return -1;
pr_info("Detected active multiplexing controller, rev %d.%d\n",
(mux_version >> 4) & 0xf, mux_version & 0xf);
/*
* Disable all muxed ports by disabling AUX.
*/
i8042_ctr |= I8042_CTR_AUXDIS;
i8042_ctr &= ~I8042_CTR_AUXINT;
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
pr_err("Failed to disable AUX port, can't use MUX\n");
return -EIO;
}
i8042_mux_present = true;
return 0;
}
/*
* The following is used to test AUX IRQ delivery.
*/
static struct completion i8042_aux_irq_delivered __initdata;
static bool i8042_irq_being_tested __initdata;
static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id)
{
unsigned long flags;
unsigned char str, data;
int ret = 0;
spin_lock_irqsave(&i8042_lock, flags);
str = i8042_read_status();
if (str & I8042_STR_OBF) {
data = i8042_read_data();
dbg("%02x <- i8042 (aux_test_irq, %s)\n",
data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
if (i8042_irq_being_tested &&
data == 0xa5 && (str & I8042_STR_AUXDATA))
complete(&i8042_aux_irq_delivered);
ret = 1;
}
spin_unlock_irqrestore(&i8042_lock, flags);
return IRQ_RETVAL(ret);
}
/*
* i8042_toggle_aux - enables or disables AUX port on i8042 via command and
* verifies success by readinng CTR. Used when testing for presence of AUX
* port.
*/
static int __init i8042_toggle_aux(bool on)
{
unsigned char param;
int i;
if (i8042_command(¶m,
on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
return -1;
/* some chips need some time to set the I8042_CTR_AUXDIS bit */
for (i = 0; i < 100; i++) {
udelay(50);
if (i8042_command(¶m, I8042_CMD_CTL_RCTR))
return -1;
if (!(param & I8042_CTR_AUXDIS) == on)
return 0;
}
return -1;
}
/*
* i8042_check_aux() applies as much paranoia as it can at detecting
* the presence of an AUX interface.
*/
static int __init i8042_check_aux(void)
{
int retval = -1;
bool irq_registered = false;
bool aux_loop_broken = false;
unsigned long flags;
unsigned char param;
/*
* Get rid of bytes in the queue.
*/
i8042_flush();
/*
* Internal loopback test - filters out AT-type i8042's. Unfortunately
* SiS screwed up and their 5597 doesn't support the LOOP command even
* though it has an AUX port.
*/
param = 0x5a;
retval = i8042_command(¶m, I8042_CMD_AUX_LOOP);
if (retval || param != 0x5a) {
/*
* External connection test - filters out AT-soldered PS/2 i8042's
* 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
* 0xfa - no error on some notebooks which ignore the spec
* Because it's common for chipsets to return error on perfectly functioning
* AUX ports, we test for this only when the LOOP command failed.
*/
if (i8042_command(¶m, I8042_CMD_AUX_TEST) ||
(param && param != 0xfa && param != 0xff))
return -1;
/*
* If AUX_LOOP completed without error but returned unexpected data
* mark it as broken
*/
if (!retval)
aux_loop_broken = true;
}
/*
* Bit assignment test - filters out PS/2 i8042's in AT mode
*/
if (i8042_toggle_aux(false)) {
pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n");
}
if (i8042_toggle_aux(true))
return -1;
/*
* Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
* used it for a PCI card or somethig else.
*/
if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) {
/*
* Without LOOP command we can't test AUX IRQ delivery. Assume the port
* is working and hope we are right.
*/
retval = 0;
goto out;
}
if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
"i8042", i8042_platform_device))
goto out;
irq_registered = true;
if (i8042_enable_aux_port())
goto out;
spin_lock_irqsave(&i8042_lock, flags);
init_completion(&i8042_aux_irq_delivered);
i8042_irq_being_tested = true;
param = 0xa5;
retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff);
spin_unlock_irqrestore(&i8042_lock, flags);
if (retval)
goto out;
if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
msecs_to_jiffies(250)) == 0) {
/*
* AUX IRQ was never delivered so we need to flush the controller to
* get rid of the byte we put there; otherwise keyboard may not work.
*/
dbg(" -- i8042 (aux irq test timeout)\n");
i8042_flush();
retval = -1;
}
out:
/*
* Disable the interface.
*/
i8042_ctr |= I8042_CTR_AUXDIS;
i8042_ctr &= ~I8042_CTR_AUXINT;
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
retval = -1;
if (irq_registered)
free_irq(I8042_AUX_IRQ, i8042_platform_device);
return retval;
}
static int i8042_controller_check(void)
{
if (i8042_flush() == I8042_BUFFER_SIZE) {
pr_err("No controller found\n");
return -ENODEV;
}
return 0;
}
static int i8042_controller_selftest(void)
{
unsigned char param;
int i = 0;
/*
* We try this 5 times; on some really fragile systems this does not
* take the first time...
*/
do {
if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
pr_err("i8042 controller selftest timeout\n");
return -ENODEV;
}
if (param == I8042_RET_CTL_TEST)
return 0;
dbg("i8042 controller selftest: %#x != %#x\n",
param, I8042_RET_CTL_TEST);
msleep(50);
} while (i++ < 5);
#ifdef CONFIG_X86
/*
* On x86, we don't fail entire i8042 initialization if controller
* reset fails in hopes that keyboard port will still be functional
* and user will still get a working keyboard. This is especially
* important on netbooks. On other arches we trust hardware more.
*/
pr_info("giving up on controller selftest, continuing anyway...\n");
return 0;
#else
pr_err("i8042 controller selftest failed\n");
return -EIO;
#endif
}
/*
* i8042_controller init initializes the i8042 controller, and,
* most importantly, sets it into non-xlated mode if that's
* desired.
*/
static int i8042_controller_init(void)
{
unsigned long flags;
int n = 0;
unsigned char ctr[2];
/*
* Save the CTR for restore on unload / reboot.
*/
do {
if (n >= 10) {
pr_err("Unable to get stable CTR read\n");
return -EIO;
}
if (n != 0)
udelay(50);
if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) {
pr_err("Can't read CTR while initializing i8042\n");
return -EIO;
}
} while (n < 2 || ctr[0] != ctr[1]);
i8042_initial_ctr = i8042_ctr = ctr[0];
/*
* Disable the keyboard interface and interrupt.
*/
i8042_ctr |= I8042_CTR_KBDDIS;
i8042_ctr &= ~I8042_CTR_KBDINT;
/*
* Handle keylock.
*/
spin_lock_irqsave(&i8042_lock, flags);
if (~i8042_read_status() & I8042_STR_KEYLOCK) {
if (i8042_unlock)
i8042_ctr |= I8042_CTR_IGNKEYLOCK;
else
pr_warn("Warning: Keylock active\n");
}
spin_unlock_irqrestore(&i8042_lock, flags);
/*
* If the chip is configured into nontranslated mode by the BIOS, don't
* bother enabling translating and be happy.
*/
if (~i8042_ctr & I8042_CTR_XLATE)
i8042_direct = true;
/*
* Set nontranslated mode for the kbd interface if requested by an option.
* After this the kbd interface becomes a simple serial in/out, like the aux
* interface is. We don't do this by default, since it can confuse notebook
* BIOSes.
*/
if (i8042_direct)
i8042_ctr &= ~I8042_CTR_XLATE;
/*
* Write CTR back.
*/
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
pr_err("Can't write CTR while initializing i8042\n");
return -EIO;
}
/*
* Flush whatever accumulated while we were disabling keyboard port.
*/
i8042_flush();
return 0;
}
/*
* Reset the controller and reset CRT to the original value set by BIOS.
*/
static void i8042_controller_reset(bool force_reset)
{
i8042_flush();
/*
* Disable both KBD and AUX interfaces so they don't get in the way
*/
i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
pr_warn("Can't write CTR while resetting\n");
/*
* Disable MUX mode if present.
*/
if (i8042_mux_present)
i8042_set_mux_mode(false, NULL);
/*
* Reset the controller if requested.
*/
if (i8042_reset || force_reset)
i8042_controller_selftest();
/*
* Restore the original control register setting.
*/
if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
pr_warn("Can't restore CTR\n");
}
/*
* i8042_panic_blink() will turn the keyboard LEDs on or off and is called
* when kernel panics. Flashing LEDs is useful for users running X who may
* not see the console and will help distingushing panics from "real"
* lockups.
*
* Note that DELAY has a limit of 10ms so we will not get stuck here
* waiting for KBC to free up even if KBD interrupt is off
*/
#define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
static long i8042_panic_blink(int state)
{
long delay = 0;
char led;
led = (state) ? 0x01 | 0x04 : 0;
while (i8042_read_status() & I8042_STR_IBF)
DELAY;
dbg("%02x -> i8042 (panic blink)\n", 0xed);
i8042_suppress_kbd_ack = 2;
i8042_write_data(0xed); /* set leds */
DELAY;
while (i8042_read_status() & I8042_STR_IBF)
DELAY;
DELAY;
dbg("%02x -> i8042 (panic blink)\n", led);
i8042_write_data(led);
DELAY;
return delay;
}
#undef DELAY
#ifdef CONFIG_X86
static void i8042_dritek_enable(void)
{
unsigned char param = 0x90;
int error;
error = i8042_command(¶m, 0x1059);
if (error)
pr_warn("Failed to enable DRITEK extension: %d\n", error);
}
#endif
#ifdef CONFIG_PM
/*
* Here we try to reset everything back to a state we had
* before suspending.
*/
static int i8042_controller_resume(bool force_reset)
{
int error;
error = i8042_controller_check();
if (error)
return error;
if (i8042_reset || force_reset) {
error = i8042_controller_selftest();
if (error)
return error;
}
/*
* Restore original CTR value and disable all ports
*/
i8042_ctr = i8042_initial_ctr;
if (i8042_direct)
i8042_ctr &= ~I8042_CTR_XLATE;
i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
pr_warn("Can't write CTR to resume, retrying...\n");
msleep(50);
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
pr_err("CTR write retry failed\n");
return -EIO;
}
}
#ifdef CONFIG_X86
if (i8042_dritek)
i8042_dritek_enable();
#endif
if (i8042_mux_present) {
if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports())
pr_warn("failed to resume active multiplexor, mouse won't work\n");
} else if (i8042_ports[I8042_AUX_PORT_NO].serio)
i8042_enable_aux_port();
if (i8042_ports[I8042_KBD_PORT_NO].serio)
i8042_enable_kbd_port();
i8042_interrupt(0, NULL);
return 0;
}
/*
* Here we try to restore the original BIOS settings to avoid
* upsetting it.
*/
static int i8042_pm_suspend(struct device *dev)
{
i8042_controller_reset(true);
return 0;
}
static int i8042_pm_resume(struct device *dev)
{
/*
* On resume from S2R we always try to reset the controller
* to bring it in a sane state. (In case of S2D we expect
* BIOS to reset the controller for us.)
*/
return i8042_controller_resume(true);
}
static int i8042_pm_thaw(struct device *dev)
{
i8042_interrupt(0, NULL);
return 0;
}
static int i8042_pm_reset(struct device *dev)
{
i8042_controller_reset(false);
return 0;
}
static int i8042_pm_restore(struct device *dev)
{
return i8042_controller_resume(false);
}
static const struct dev_pm_ops i8042_pm_ops = {
.suspend = i8042_pm_suspend,
.resume = i8042_pm_resume,
.thaw = i8042_pm_thaw,
.poweroff = i8042_pm_reset,
.restore = i8042_pm_restore,
};
#endif /* CONFIG_PM */
/*
* We need to reset the 8042 back to original mode on system shutdown,
* because otherwise BIOSes will be confused.
*/
static void i8042_shutdown(struct platform_device *dev)
{
i8042_controller_reset(false);
}
static int __init i8042_create_kbd_port(void)
{
struct serio *serio;
struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
if (!serio)
return -ENOMEM;
serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
serio->start = i8042_start;
serio->stop = i8042_stop;
serio->close = i8042_port_close;
serio->port_data = port;
serio->dev.parent = &i8042_platform_device->dev;
strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
port->serio = serio;
port->irq = I8042_KBD_IRQ;
return 0;
}
static int __init i8042_create_aux_port(int idx)
{
struct serio *serio;
int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
struct i8042_port *port = &i8042_ports[port_no];
serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
if (!serio)
return -ENOMEM;
serio->id.type = SERIO_8042;
serio->write = i8042_aux_write;
serio->start = i8042_start;
serio->stop = i8042_stop;
serio->port_data = port;
serio->dev.parent = &i8042_platform_device->dev;
if (idx < 0) {
strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
serio->close = i8042_port_close;
} else {
snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
}
port->serio = serio;
port->mux = idx;
port->irq = I8042_AUX_IRQ;
return 0;
}
static void __init i8042_free_kbd_port(void)
{
kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
}
static void __init i8042_free_aux_ports(void)
{
int i;
for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
kfree(i8042_ports[i].serio);
i8042_ports[i].serio = NULL;
}
}
static void __init i8042_register_ports(void)
{
int i;
for (i = 0; i < I8042_NUM_PORTS; i++) {
if (i8042_ports[i].serio) {
printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
i8042_ports[i].serio->name,
(unsigned long) I8042_DATA_REG,
(unsigned long) I8042_COMMAND_REG,
i8042_ports[i].irq);
serio_register_port(i8042_ports[i].serio);
}
}
}
static void __devexit i8042_unregister_ports(void)
{
int i;
for (i = 0; i < I8042_NUM_PORTS; i++) {
if (i8042_ports[i].serio) {
serio_unregister_port(i8042_ports[i].serio);
i8042_ports[i].serio = NULL;
}
}
}
/*
* Checks whether port belongs to i8042 controller.
*/
bool i8042_check_port_owner(const struct serio *port)
{
int i;
for (i = 0; i < I8042_NUM_PORTS; i++)
if (i8042_ports[i].serio == port)
return true;
return false;
}
EXPORT_SYMBOL(i8042_check_port_owner);
static void i8042_free_irqs(void)
{
if (i8042_aux_irq_registered)
free_irq(I8042_AUX_IRQ, i8042_platform_device);
if (i8042_kbd_irq_registered)
free_irq(I8042_KBD_IRQ, i8042_platform_device);
i8042_aux_irq_registered = i8042_kbd_irq_registered = false;
}
static int __init i8042_setup_aux(void)
{
int (*aux_enable)(void);
int error;
int i;
if (i8042_check_aux())
return -ENODEV;
if (i8042_nomux || i8042_check_mux()) {
error = i8042_create_aux_port(-1);
if (error)
goto err_free_ports;
aux_enable = i8042_enable_aux_port;
} else {
for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
error = i8042_create_aux_port(i);
if (error)
goto err_free_ports;
}
aux_enable = i8042_enable_mux_ports;
}
error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
"i8042", i8042_platform_device);
if (error)
goto err_free_ports;
if (aux_enable())
goto err_free_irq;
i8042_aux_irq_registered = true;
return 0;
err_free_irq:
free_irq(I8042_AUX_IRQ, i8042_platform_device);
err_free_ports:
i8042_free_aux_ports();
return error;
}
static int __init i8042_setup_kbd(void)
{
int error;
error = i8042_create_kbd_port();
if (error)
return error;
error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
"i8042", i8042_platform_device);
if (error)
goto err_free_port;
error = i8042_enable_kbd_port();
if (error)
goto err_free_irq;
i8042_kbd_irq_registered = true;
return 0;
err_free_irq:
free_irq(I8042_KBD_IRQ, i8042_platform_device);
err_free_port:
i8042_free_kbd_port();
return error;
}
static int __init i8042_probe(struct platform_device *dev)
{
int error;
i8042_platform_device = dev;
if (i8042_reset) {
error = i8042_controller_selftest();
if (error)
return error;
}
error = i8042_controller_init();
if (error)
return error;
#ifdef CONFIG_X86
if (i8042_dritek)
i8042_dritek_enable();
#endif
if (!i8042_noaux) {
error = i8042_setup_aux();
if (error && error != -ENODEV && error != -EBUSY)
goto out_fail;
}
if (!i8042_nokbd) {
error = i8042_setup_kbd();
if (error)
goto out_fail;
}
/*
* Ok, everything is ready, let's register all serio ports
*/
i8042_register_ports();
return 0;
out_fail:
i8042_free_aux_ports(); /* in case KBD failed but AUX not */
i8042_free_irqs();
i8042_controller_reset(false);
i8042_platform_device = NULL;
return error;
}
static int __devexit i8042_remove(struct platform_device *dev)
{
i8042_unregister_ports();
i8042_free_irqs();
i8042_controller_reset(false);
i8042_platform_device = NULL;
return 0;
}
static struct platform_driver i8042_driver = {
.driver = {
.name = "i8042",
.owner = THIS_MODULE,
#ifdef CONFIG_PM
.pm = &i8042_pm_ops,
#endif
},
.remove = __devexit_p(i8042_remove),
.shutdown = i8042_shutdown,
};
static int __init i8042_init(void)
{
struct platform_device *pdev;
int err;
dbg_init();
err = i8042_platform_init();
if (err)
return err;
err = i8042_controller_check();
if (err)
goto err_platform_exit;
pdev = platform_create_bundle(&i8042_driver, i8042_probe, NULL, 0, NULL, 0);
if (IS_ERR(pdev)) {
err = PTR_ERR(pdev);
goto err_platform_exit;
}
panic_blink = i8042_panic_blink;
return 0;
err_platform_exit:
i8042_platform_exit();
return err;
}
static void __exit i8042_exit(void)
{
platform_device_unregister(i8042_platform_device);
platform_driver_unregister(&i8042_driver);
i8042_platform_exit();
panic_blink = NULL;
}
module_init(i8042_init);
module_exit(i8042_exit);
| gpl-2.0 |
5victor/linux | drivers/staging/rtl8712/usb_ops_linux.c | 5351 | 14782 | /******************************************************************************
* usb_ops_linux.c
*
* Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
* Linux device driver for RTL8192SU
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* Modifications for inclusion into the Linux staging tree are
* Copyright(c) 2010 Larry Finger. All rights reserved.
*
* Contact information:
* WLAN FAE <wlanfae@realtek.com>
* Larry Finger <Larry.Finger@lwfinger.net>
*
******************************************************************************/
#define _HCI_OPS_OS_C_
#include <linux/usb.h>
#include "osdep_service.h"
#include "drv_types.h"
#include "osdep_intf.h"
#include "usb_ops.h"
#define RTL871X_VENQT_READ 0xc0
#define RTL871X_VENQT_WRITE 0x40
struct zero_bulkout_context {
void *pbuf;
void *purb;
void *pirp;
void *padapter;
};
#define usb_write_cmd r8712_usb_write_mem
#define usb_write_cmd_complete usb_write_mem_complete
uint r8712_usb_init_intf_priv(struct intf_priv *pintfpriv)
{
pintfpriv->piorw_urb = usb_alloc_urb(0, GFP_ATOMIC);
if (!pintfpriv->piorw_urb)
return _FAIL;
sema_init(&(pintfpriv->io_retevt), 0);
return _SUCCESS;
}
void r8712_usb_unload_intf_priv(struct intf_priv *pintfpriv)
{
if (pintfpriv->piorw_urb) {
usb_kill_urb(pintfpriv->piorw_urb);
usb_free_urb(pintfpriv->piorw_urb);
}
}
static unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr)
{
unsigned int pipe = 0;
struct usb_device *pusbd = pdvobj->pusbdev;
if (pdvobj->nr_endpoint == 11) {
switch (addr) {
case RTL8712_DMA_BKQ:
pipe = usb_sndbulkpipe(pusbd, 0x07);
break;
case RTL8712_DMA_BEQ:
pipe = usb_sndbulkpipe(pusbd, 0x06);
break;
case RTL8712_DMA_VIQ:
pipe = usb_sndbulkpipe(pusbd, 0x05);
break;
case RTL8712_DMA_VOQ:
pipe = usb_sndbulkpipe(pusbd, 0x04);
break;
case RTL8712_DMA_BCNQ:
pipe = usb_sndbulkpipe(pusbd, 0x0a);
break;
case RTL8712_DMA_BMCQ: /* HI Queue */
pipe = usb_sndbulkpipe(pusbd, 0x0b);
break;
case RTL8712_DMA_MGTQ:
pipe = usb_sndbulkpipe(pusbd, 0x0c);
break;
case RTL8712_DMA_RX0FF:
pipe = usb_rcvbulkpipe(pusbd, 0x03); /* in */
break;
case RTL8712_DMA_C2HCMD:
pipe = usb_rcvbulkpipe(pusbd, 0x09); /* in */
break;
case RTL8712_DMA_H2CCMD:
pipe = usb_sndbulkpipe(pusbd, 0x0d);
break;
}
} else if (pdvobj->nr_endpoint == 6) {
switch (addr) {
case RTL8712_DMA_BKQ:
pipe = usb_sndbulkpipe(pusbd, 0x07);
break;
case RTL8712_DMA_BEQ:
pipe = usb_sndbulkpipe(pusbd, 0x06);
break;
case RTL8712_DMA_VIQ:
pipe = usb_sndbulkpipe(pusbd, 0x05);
break;
case RTL8712_DMA_VOQ:
pipe = usb_sndbulkpipe(pusbd, 0x04);
break;
case RTL8712_DMA_RX0FF:
case RTL8712_DMA_C2HCMD:
pipe = usb_rcvbulkpipe(pusbd, 0x03); /* in */
break;
case RTL8712_DMA_H2CCMD:
case RTL8712_DMA_BCNQ:
case RTL8712_DMA_BMCQ:
case RTL8712_DMA_MGTQ:
pipe = usb_sndbulkpipe(pusbd, 0x0d);
break;
}
} else if (pdvobj->nr_endpoint == 4) {
switch (addr) {
case RTL8712_DMA_BEQ:
pipe = usb_sndbulkpipe(pusbd, 0x06);
break;
case RTL8712_DMA_VOQ:
pipe = usb_sndbulkpipe(pusbd, 0x04);
break;
case RTL8712_DMA_RX0FF:
case RTL8712_DMA_C2HCMD:
pipe = usb_rcvbulkpipe(pusbd, 0x03); /* in */
break;
case RTL8712_DMA_H2CCMD:
case RTL8712_DMA_BCNQ:
case RTL8712_DMA_BMCQ:
case RTL8712_DMA_MGTQ:
pipe = usb_sndbulkpipe(pusbd, 0x0d);
break;
}
} else
pipe = 0;
return pipe;
}
static void usb_write_mem_complete(struct urb *purb)
{
struct io_queue *pio_q = (struct io_queue *)purb->context;
struct intf_hdl *pintf = &(pio_q->intf);
struct intf_priv *pintfpriv = pintf->pintfpriv;
struct _adapter *padapter = (struct _adapter *)pintf->adapter;
if (purb->status != 0) {
if (purb->status == (-ESHUTDOWN))
padapter->bDriverStopped = true;
else
padapter->bSurpriseRemoved = true;
}
up(&pintfpriv->io_retevt);
}
void r8712_usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem)
{
unsigned int pipe;
int status;
struct _adapter *padapter = (struct _adapter *)pintfhdl->adapter;
struct intf_priv *pintfpriv = pintfhdl->pintfpriv;
struct io_queue *pio_queue = (struct io_queue *)padapter->pio_queue;
struct dvobj_priv *pdvobj = (struct dvobj_priv *)pintfpriv->intf_dev;
struct usb_device *pusbd = pdvobj->pusbdev;
struct urb *piorw_urb = pintfpriv->piorw_urb;
if ((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||
(padapter->pwrctrlpriv.pnp_bstop_trx))
return;
/* translate DMA FIFO addr to pipehandle */
pipe = ffaddr2pipehdl(pdvobj, addr);
if (pipe == 0)
return;
usb_fill_bulk_urb(piorw_urb, pusbd, pipe,
wmem, cnt, usb_write_mem_complete,
pio_queue);
status = usb_submit_urb(piorw_urb, GFP_ATOMIC);
_down_sema(&pintfpriv->io_retevt);
}
static void r8712_usb_read_port_complete(struct urb *purb)
{
uint isevt, *pbuf;
struct recv_buf *precvbuf = (struct recv_buf *)purb->context;
struct _adapter *padapter = (struct _adapter *)precvbuf->adapter;
struct recv_priv *precvpriv = &padapter->recvpriv;
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
return;
if (purb->status == 0) { /* SUCCESS */
if ((purb->actual_length > (MAX_RECVBUF_SZ)) ||
(purb->actual_length < RXDESC_SIZE)) {
precvbuf->reuse = true;
r8712_read_port(padapter, precvpriv->ff_hwaddr, 0,
(unsigned char *)precvbuf);
} else {
precvbuf->transfer_len = purb->actual_length;
pbuf = (uint *)precvbuf->pbuf;
isevt = le32_to_cpu(*(pbuf + 1)) & 0x1ff;
if ((isevt & 0x1ff) == 0x1ff) {
r8712_rxcmd_event_hdl(padapter, pbuf);
precvbuf->reuse = true;
r8712_read_port(padapter, precvpriv->ff_hwaddr,
0, (unsigned char *)precvbuf);
} else {
_pkt *pskb = precvbuf->pskb;
skb_put(pskb, purb->actual_length);
skb_queue_tail(&precvpriv->rx_skb_queue, pskb);
tasklet_hi_schedule(&precvpriv->recv_tasklet);
precvbuf->pskb = NULL;
precvbuf->reuse = false;
r8712_read_port(padapter, precvpriv->ff_hwaddr,
0, (unsigned char *)precvbuf);
}
}
} else {
switch (purb->status) {
case -EINVAL:
case -EPIPE:
case -ENODEV:
case -ESHUTDOWN:
case -ENOENT:
padapter->bDriverStopped = true;
break;
case -EPROTO:
precvbuf->reuse = true;
r8712_read_port(padapter, precvpriv->ff_hwaddr, 0,
(unsigned char *)precvbuf);
break;
case -EINPROGRESS:
printk(KERN_ERR "r8712u: ERROR: URB IS IN"
" PROGRESS!/n");
break;
default:
break;
}
}
}
u32 r8712_usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
{
unsigned int pipe;
int err;
u32 tmpaddr = 0;
int alignment = 0;
u32 ret = _SUCCESS;
struct urb *purb = NULL;
struct recv_buf *precvbuf = (struct recv_buf *)rmem;
struct intf_priv *pintfpriv = pintfhdl->pintfpriv;
struct dvobj_priv *pdvobj = (struct dvobj_priv *)pintfpriv->intf_dev;
struct _adapter *adapter = (struct _adapter *)pdvobj->padapter;
struct recv_priv *precvpriv = &adapter->recvpriv;
struct usb_device *pusbd = pdvobj->pusbdev;
if (adapter->bDriverStopped || adapter->bSurpriseRemoved ||
adapter->pwrctrlpriv.pnp_bstop_trx)
return _FAIL;
if ((precvbuf->reuse == false) || (precvbuf->pskb == NULL)) {
precvbuf->pskb = skb_dequeue(&precvpriv->free_recv_skb_queue);
if (NULL != precvbuf->pskb)
precvbuf->reuse = true;
}
if (precvbuf != NULL) {
r8712_init_recvbuf(adapter, precvbuf);
/* re-assign for linux based on skb */
if ((precvbuf->reuse == false) || (precvbuf->pskb == NULL)) {
precvbuf->pskb = netdev_alloc_skb(adapter->pnetdev,
MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
if (precvbuf->pskb == NULL)
return _FAIL;
tmpaddr = (addr_t)precvbuf->pskb->data;
alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1);
skb_reserve(precvbuf->pskb,
(RECVBUFF_ALIGN_SZ - alignment));
precvbuf->phead = precvbuf->pskb->head;
precvbuf->pdata = precvbuf->pskb->data;
precvbuf->ptail = skb_tail_pointer(precvbuf->pskb);
precvbuf->pend = skb_end_pointer(precvbuf->pskb);
precvbuf->pbuf = precvbuf->pskb->data;
} else { /* reuse skb */
precvbuf->phead = precvbuf->pskb->head;
precvbuf->pdata = precvbuf->pskb->data;
precvbuf->ptail = skb_tail_pointer(precvbuf->pskb);
precvbuf->pend = skb_end_pointer(precvbuf->pskb);
precvbuf->pbuf = precvbuf->pskb->data;
precvbuf->reuse = false;
}
purb = precvbuf->purb;
/* translate DMA FIFO addr to pipehandle */
pipe = ffaddr2pipehdl(pdvobj, addr);
usb_fill_bulk_urb(purb, pusbd, pipe,
precvbuf->pbuf, MAX_RECVBUF_SZ,
r8712_usb_read_port_complete,
precvbuf);
err = usb_submit_urb(purb, GFP_ATOMIC);
if ((err) && (err != (-EPERM)))
ret = _FAIL;
} else
ret = _FAIL;
return ret;
}
void r8712_usb_read_port_cancel(struct _adapter *padapter)
{
int i;
struct recv_buf *precvbuf;
precvbuf = (struct recv_buf *)padapter->recvpriv.precv_buf;
for (i = 0; i < NR_RECVBUFF; i++) {
if (precvbuf->purb)
usb_kill_urb(precvbuf->purb);
precvbuf++;
}
}
void r8712_xmit_bh(void *priv)
{
int ret = false;
struct _adapter *padapter = (struct _adapter *)priv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
if ((padapter->bDriverStopped == true) ||
(padapter->bSurpriseRemoved == true)) {
printk(KERN_ERR "r8712u: xmit_bh => bDriverStopped"
" or bSurpriseRemoved\n");
return;
}
ret = r8712_xmitframe_complete(padapter, pxmitpriv, NULL);
if (ret == false)
return;
tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
}
static void usb_write_port_complete(struct urb *purb)
{
int i;
struct xmit_frame *pxmitframe = (struct xmit_frame *)purb->context;
struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf;
struct _adapter *padapter = pxmitframe->padapter;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
switch (pattrib->priority) {
case 1:
case 2:
pxmitpriv->bkq_cnt--;
break;
case 4:
case 5:
pxmitpriv->viq_cnt--;
break;
case 6:
case 7:
pxmitpriv->voq_cnt--;
break;
case 0:
case 3:
default:
pxmitpriv->beq_cnt--;
break;
}
pxmitpriv->txirp_cnt--;
for (i = 0; i < 8; i++) {
if (purb == pxmitframe->pxmit_urb[i]) {
pxmitframe->bpending[i] = false;
break;
}
}
if (padapter->bSurpriseRemoved)
return;
switch (purb->status) {
case 0:
break;
default:
printk(KERN_WARNING "r8712u: pipe error: (%d)\n", purb->status);
break;
}
/* not to consider tx fragment */
r8712_free_xmitframe_ex(pxmitpriv, pxmitframe);
r8712_free_xmitbuf(pxmitpriv, pxmitbuf);
tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
}
u32 r8712_usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem)
{
unsigned long irqL;
int i, status;
unsigned int pipe;
u32 ret, bwritezero;
struct urb *purb = NULL;
struct _adapter *padapter = (struct _adapter *)pintfhdl->adapter;
struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct xmit_frame *pxmitframe = (struct xmit_frame *)wmem;
struct usb_device *pusbd = pdvobj->pusbdev;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
if ((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||
(padapter->pwrctrlpriv.pnp_bstop_trx))
return _FAIL;
for (i = 0; i < 8; i++) {
if (pxmitframe->bpending[i] == false) {
spin_lock_irqsave(&pxmitpriv->lock, irqL);
pxmitpriv->txirp_cnt++;
pxmitframe->bpending[i] = true;
switch (pattrib->priority) {
case 1:
case 2:
pxmitpriv->bkq_cnt++;
break;
case 4:
case 5:
pxmitpriv->viq_cnt++;
break;
case 6:
case 7:
pxmitpriv->voq_cnt++;
break;
case 0:
case 3:
default:
pxmitpriv->beq_cnt++;
break;
}
spin_unlock_irqrestore(&pxmitpriv->lock, irqL);
pxmitframe->sz[i] = (u16)cnt;
purb = pxmitframe->pxmit_urb[i];
break;
}
}
bwritezero = false;
if (pdvobj->ishighspeed) {
if (cnt > 0 && cnt % 512 == 0)
bwritezero = true;
} else {
if (cnt > 0 && cnt % 64 == 0)
bwritezero = true;
}
/* translate DMA FIFO addr to pipehandle */
pipe = ffaddr2pipehdl(pdvobj, addr);
if (pxmitpriv->free_xmitbuf_cnt%NR_XMITBUFF == 0)
purb->transfer_flags &= (~URB_NO_INTERRUPT);
else
purb->transfer_flags |= URB_NO_INTERRUPT;
if (bwritezero)
cnt += 8;
usb_fill_bulk_urb(purb, pusbd, pipe,
pxmitframe->mem_addr,
cnt, usb_write_port_complete,
pxmitframe); /* context is xmit_frame */
status = usb_submit_urb(purb, GFP_ATOMIC);
if (!status)
ret = _SUCCESS;
else
ret = _FAIL;
return ret;
}
void r8712_usb_write_port_cancel(struct _adapter *padapter)
{
int i, j;
struct xmit_buf *pxmitbuf = (struct xmit_buf *)
padapter->xmitpriv.pxmitbuf;
for (i = 0; i < NR_XMITBUFF; i++) {
for (j = 0; j < 8; j++) {
if (pxmitbuf->pxmit_urb[j])
usb_kill_urb(pxmitbuf->pxmit_urb[j]);
}
pxmitbuf++;
}
}
int r8712_usbctrl_vendorreq(struct intf_priv *pintfpriv, u8 request, u16 value,
u16 index, void *pdata, u16 len, u8 requesttype)
{
unsigned int pipe;
int status;
u8 reqtype;
struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)
pintfpriv->intf_dev;
struct usb_device *udev = pdvobjpriv->pusbdev;
/* For mstar platform, mstar suggests the address for USB IO
* should be 16 bytes alignment. Trying to fix it here.
*/
u8 *palloc_buf, *pIo_buf;
palloc_buf = _malloc((u32) len + 16);
if (palloc_buf == NULL) {
printk(KERN_ERR "r8712u: [%s] Can't alloc memory for vendor"
" request\n", __func__);
return -1;
}
pIo_buf = palloc_buf + 16 - ((addr_t)(palloc_buf) & 0x0f);
if (requesttype == 0x01) {
pipe = usb_rcvctrlpipe(udev, 0); /* read_in */
reqtype = RTL871X_VENQT_READ;
} else {
pipe = usb_sndctrlpipe(udev, 0); /* write_out */
reqtype = RTL871X_VENQT_WRITE;
memcpy(pIo_buf, pdata, len);
}
status = usb_control_msg(udev, pipe, request, reqtype, value, index,
pIo_buf, len, HZ / 2);
if (status > 0) { /* Success this control transfer. */
if (requesttype == 0x01) {
/* For Control read transfer, we have to copy the read
* data from pIo_buf to pdata.
*/
memcpy(pdata, pIo_buf, status);
}
}
kfree(palloc_buf);
return status;
}
| gpl-2.0 |
ffosilva/android_kernel_sony_msm8974 | net/sctp/chunk.c | 5863 | 9887 | /* SCTP kernel implementation
* (C) Copyright IBM Corp. 2003, 2004
*
* This file is part of the SCTP kernel implementation
*
* This file contains the code relating the chunk abstraction.
*
* This SCTP implementation is free software;
* you can redistribute it and/or modify it under the terms of
* the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This SCTP implementation is distributed in the hope that it
* will be useful, but WITHOUT ANY WARRANTY; without even the implied
* ************************
* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with GNU CC; see the file COPYING. If not, write to
* the Free Software Foundation, 59 Temple Place - Suite 330,
* Boston, MA 02111-1307, USA.
*
* Please send any bug reports or fixes you make to the
* email address(es):
* lksctp developers <lksctp-developers@lists.sourceforge.net>
*
* Or submit a bug report through the following website:
* http://www.sf.net/projects/lksctp
*
* Written or modified by:
* Jon Grimm <jgrimm@us.ibm.com>
* Sridhar Samudrala <sri@us.ibm.com>
*
* Any bugs reported given to us we will try to fix... any fixes shared will
* be incorporated into the next SCTP release.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/net.h>
#include <linux/inet.h>
#include <linux/skbuff.h>
#include <linux/slab.h>
#include <net/sock.h>
#include <net/sctp/sctp.h>
#include <net/sctp/sm.h>
/* This file is mostly in anticipation of future work, but initially
* populate with fragment tracking for an outbound message.
*/
/* Initialize datamsg from memory. */
static void sctp_datamsg_init(struct sctp_datamsg *msg)
{
atomic_set(&msg->refcnt, 1);
msg->send_failed = 0;
msg->send_error = 0;
msg->can_abandon = 0;
msg->can_delay = 1;
msg->expires_at = 0;
INIT_LIST_HEAD(&msg->chunks);
}
/* Allocate and initialize datamsg. */
SCTP_STATIC struct sctp_datamsg *sctp_datamsg_new(gfp_t gfp)
{
struct sctp_datamsg *msg;
msg = kmalloc(sizeof(struct sctp_datamsg), gfp);
if (msg) {
sctp_datamsg_init(msg);
SCTP_DBG_OBJCNT_INC(datamsg);
}
return msg;
}
void sctp_datamsg_free(struct sctp_datamsg *msg)
{
struct sctp_chunk *chunk;
/* This doesn't have to be a _safe vairant because
* sctp_chunk_free() only drops the refs.
*/
list_for_each_entry(chunk, &msg->chunks, frag_list)
sctp_chunk_free(chunk);
sctp_datamsg_put(msg);
}
/* Final destructruction of datamsg memory. */
static void sctp_datamsg_destroy(struct sctp_datamsg *msg)
{
struct list_head *pos, *temp;
struct sctp_chunk *chunk;
struct sctp_sock *sp;
struct sctp_ulpevent *ev;
struct sctp_association *asoc = NULL;
int error = 0, notify;
/* If we failed, we may need to notify. */
notify = msg->send_failed ? -1 : 0;
/* Release all references. */
list_for_each_safe(pos, temp, &msg->chunks) {
list_del_init(pos);
chunk = list_entry(pos, struct sctp_chunk, frag_list);
/* Check whether we _really_ need to notify. */
if (notify < 0) {
asoc = chunk->asoc;
if (msg->send_error)
error = msg->send_error;
else
error = asoc->outqueue.error;
sp = sctp_sk(asoc->base.sk);
notify = sctp_ulpevent_type_enabled(SCTP_SEND_FAILED,
&sp->subscribe);
}
/* Generate a SEND FAILED event only if enabled. */
if (notify > 0) {
int sent;
if (chunk->has_tsn)
sent = SCTP_DATA_SENT;
else
sent = SCTP_DATA_UNSENT;
ev = sctp_ulpevent_make_send_failed(asoc, chunk, sent,
error, GFP_ATOMIC);
if (ev)
sctp_ulpq_tail_event(&asoc->ulpq, ev);
}
sctp_chunk_put(chunk);
}
SCTP_DBG_OBJCNT_DEC(datamsg);
kfree(msg);
}
/* Hold a reference. */
static void sctp_datamsg_hold(struct sctp_datamsg *msg)
{
atomic_inc(&msg->refcnt);
}
/* Release a reference. */
void sctp_datamsg_put(struct sctp_datamsg *msg)
{
if (atomic_dec_and_test(&msg->refcnt))
sctp_datamsg_destroy(msg);
}
/* Assign a chunk to this datamsg. */
static void sctp_datamsg_assign(struct sctp_datamsg *msg, struct sctp_chunk *chunk)
{
sctp_datamsg_hold(msg);
chunk->msg = msg;
}
/* A data chunk can have a maximum payload of (2^16 - 20). Break
* down any such message into smaller chunks. Opportunistically, fragment
* the chunks down to the current MTU constraints. We may get refragmented
* later if the PMTU changes, but it is _much better_ to fragment immediately
* with a reasonable guess than always doing our fragmentation on the
* soft-interrupt.
*/
struct sctp_datamsg *sctp_datamsg_from_user(struct sctp_association *asoc,
struct sctp_sndrcvinfo *sinfo,
struct msghdr *msgh, int msg_len)
{
int max, whole, i, offset, over, err;
int len, first_len;
int max_data;
struct sctp_chunk *chunk;
struct sctp_datamsg *msg;
struct list_head *pos, *temp;
__u8 frag;
msg = sctp_datamsg_new(GFP_KERNEL);
if (!msg)
return NULL;
/* Note: Calculate this outside of the loop, so that all fragments
* have the same expiration.
*/
if (sinfo->sinfo_timetolive) {
/* sinfo_timetolive is in milliseconds */
msg->expires_at = jiffies +
msecs_to_jiffies(sinfo->sinfo_timetolive);
msg->can_abandon = 1;
SCTP_DEBUG_PRINTK("%s: msg:%p expires_at: %ld jiffies:%ld\n",
__func__, msg, msg->expires_at, jiffies);
}
/* This is the biggest possible DATA chunk that can fit into
* the packet
*/
max_data = asoc->pathmtu -
sctp_sk(asoc->base.sk)->pf->af->net_header_len -
sizeof(struct sctphdr) - sizeof(struct sctp_data_chunk);
max = asoc->frag_point;
/* If the the peer requested that we authenticate DATA chunks
* we need to accound for bundling of the AUTH chunks along with
* DATA.
*/
if (sctp_auth_send_cid(SCTP_CID_DATA, asoc)) {
struct sctp_hmac *hmac_desc = sctp_auth_asoc_get_hmac(asoc);
if (hmac_desc)
max_data -= WORD_ROUND(sizeof(sctp_auth_chunk_t) +
hmac_desc->hmac_len);
}
/* Now, check if we need to reduce our max */
if (max > max_data)
max = max_data;
whole = 0;
first_len = max;
/* Check to see if we have a pending SACK and try to let it be bundled
* with this message. Do this if we don't have any data queued already.
* To check that, look at out_qlen and retransmit list.
* NOTE: we will not reduce to account for SACK, if the message would
* not have been fragmented.
*/
if (timer_pending(&asoc->timers[SCTP_EVENT_TIMEOUT_SACK]) &&
asoc->outqueue.out_qlen == 0 &&
list_empty(&asoc->outqueue.retransmit) &&
msg_len > max)
max_data -= WORD_ROUND(sizeof(sctp_sack_chunk_t));
/* Encourage Cookie-ECHO bundling. */
if (asoc->state < SCTP_STATE_COOKIE_ECHOED)
max_data -= SCTP_ARBITRARY_COOKIE_ECHO_LEN;
/* Now that we adjusted completely, reset first_len */
if (first_len > max_data)
first_len = max_data;
/* Account for a different sized first fragment */
if (msg_len >= first_len) {
msg_len -= first_len;
whole = 1;
msg->can_delay = 0;
}
/* How many full sized? How many bytes leftover? */
whole += msg_len / max;
over = msg_len % max;
offset = 0;
if ((whole > 1) || (whole && over))
SCTP_INC_STATS_USER(SCTP_MIB_FRAGUSRMSGS);
/* Create chunks for all the full sized DATA chunks. */
for (i=0, len=first_len; i < whole; i++) {
frag = SCTP_DATA_MIDDLE_FRAG;
if (0 == i)
frag |= SCTP_DATA_FIRST_FRAG;
if ((i == (whole - 1)) && !over) {
frag |= SCTP_DATA_LAST_FRAG;
/* The application requests to set the I-bit of the
* last DATA chunk of a user message when providing
* the user message to the SCTP implementation.
*/
if ((sinfo->sinfo_flags & SCTP_EOF) ||
(sinfo->sinfo_flags & SCTP_SACK_IMMEDIATELY))
frag |= SCTP_DATA_SACK_IMM;
}
chunk = sctp_make_datafrag_empty(asoc, sinfo, len, frag, 0);
if (!chunk)
goto errout;
err = sctp_user_addto_chunk(chunk, offset, len, msgh->msg_iov);
if (err < 0)
goto errout;
offset += len;
/* Put the chunk->skb back into the form expected by send. */
__skb_pull(chunk->skb, (__u8 *)chunk->chunk_hdr
- (__u8 *)chunk->skb->data);
sctp_datamsg_assign(msg, chunk);
list_add_tail(&chunk->frag_list, &msg->chunks);
/* The first chunk, the first chunk was likely short
* to allow bundling, so reset to full size.
*/
if (0 == i)
len = max;
}
/* .. now the leftover bytes. */
if (over) {
if (!whole)
frag = SCTP_DATA_NOT_FRAG;
else
frag = SCTP_DATA_LAST_FRAG;
if ((sinfo->sinfo_flags & SCTP_EOF) ||
(sinfo->sinfo_flags & SCTP_SACK_IMMEDIATELY))
frag |= SCTP_DATA_SACK_IMM;
chunk = sctp_make_datafrag_empty(asoc, sinfo, over, frag, 0);
if (!chunk)
goto errout;
err = sctp_user_addto_chunk(chunk, offset, over,msgh->msg_iov);
/* Put the chunk->skb back into the form expected by send. */
__skb_pull(chunk->skb, (__u8 *)chunk->chunk_hdr
- (__u8 *)chunk->skb->data);
if (err < 0)
goto errout;
sctp_datamsg_assign(msg, chunk);
list_add_tail(&chunk->frag_list, &msg->chunks);
}
return msg;
errout:
list_for_each_safe(pos, temp, &msg->chunks) {
list_del_init(pos);
chunk = list_entry(pos, struct sctp_chunk, frag_list);
sctp_chunk_free(chunk);
}
sctp_datamsg_put(msg);
return NULL;
}
/* Check whether this message has expired. */
int sctp_chunk_abandoned(struct sctp_chunk *chunk)
{
struct sctp_datamsg *msg = chunk->msg;
if (!msg->can_abandon)
return 0;
if (time_after(jiffies, msg->expires_at))
return 1;
return 0;
}
/* This chunk (and consequently entire message) has failed in its sending. */
void sctp_chunk_fail(struct sctp_chunk *chunk, int error)
{
chunk->msg->send_failed = 1;
chunk->msg->send_error = error;
}
| gpl-2.0 |
touchpro/android_kernel_lge_msm8226_old | drivers/media/dvb/bt8xx/dst_ca.c | 8167 | 21746 | /*
CA-driver for TwinHan DST Frontend/Card
Copyright (C) 2004, 2005 Manu Abraham (manu@kromtek.com)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/mutex.h>
#include <linux/string.h>
#include <linux/dvb/ca.h>
#include "dvbdev.h"
#include "dvb_frontend.h"
#include "dst_ca.h"
#include "dst_common.h"
#define DST_CA_ERROR 0
#define DST_CA_NOTICE 1
#define DST_CA_INFO 2
#define DST_CA_DEBUG 3
#define dprintk(x, y, z, format, arg...) do { \
if (z) { \
if ((x > DST_CA_ERROR) && (x > y)) \
printk(KERN_ERR "%s: " format "\n", __func__ , ##arg); \
else if ((x > DST_CA_NOTICE) && (x > y)) \
printk(KERN_NOTICE "%s: " format "\n", __func__ , ##arg); \
else if ((x > DST_CA_INFO) && (x > y)) \
printk(KERN_INFO "%s: " format "\n", __func__ , ##arg); \
else if ((x > DST_CA_DEBUG) && (x > y)) \
printk(KERN_DEBUG "%s: " format "\n", __func__ , ##arg); \
} else { \
if (x > y) \
printk(format, ## arg); \
} \
} while(0)
static DEFINE_MUTEX(dst_ca_mutex);
static unsigned int verbose = 5;
module_param(verbose, int, 0644);
MODULE_PARM_DESC(verbose, "verbose startup messages, default is 1 (yes)");
/* Need some more work */
static int ca_set_slot_descr(void)
{
/* We could make this more graceful ? */
return -EOPNOTSUPP;
}
/* Need some more work */
static int ca_set_pid(void)
{
/* We could make this more graceful ? */
return -EOPNOTSUPP;
}
static void put_command_and_length(u8 *data, int command, int length)
{
data[0] = (command >> 16) & 0xff;
data[1] = (command >> 8) & 0xff;
data[2] = command & 0xff;
data[3] = length;
}
static void put_checksum(u8 *check_string, int length)
{
dprintk(verbose, DST_CA_DEBUG, 1, " Computing string checksum.");
dprintk(verbose, DST_CA_DEBUG, 1, " -> string length : 0x%02x", length);
check_string[length] = dst_check_sum (check_string, length);
dprintk(verbose, DST_CA_DEBUG, 1, " -> checksum : 0x%02x", check_string[length]);
}
static int dst_ci_command(struct dst_state* state, u8 * data, u8 *ca_string, u8 len, int read)
{
u8 reply;
mutex_lock(&state->dst_mutex);
dst_comm_init(state);
msleep(65);
if (write_dst(state, data, len)) {
dprintk(verbose, DST_CA_INFO, 1, " Write not successful, trying to recover");
dst_error_recovery(state);
goto error;
}
if ((dst_pio_disable(state)) < 0) {
dprintk(verbose, DST_CA_ERROR, 1, " DST PIO disable failed.");
goto error;
}
if (read_dst(state, &reply, GET_ACK) < 0) {
dprintk(verbose, DST_CA_INFO, 1, " Read not successful, trying to recover");
dst_error_recovery(state);
goto error;
}
if (read) {
if (! dst_wait_dst_ready(state, LONG_DELAY)) {
dprintk(verbose, DST_CA_NOTICE, 1, " 8820 not ready");
goto error;
}
if (read_dst(state, ca_string, 128) < 0) { /* Try to make this dynamic */
dprintk(verbose, DST_CA_INFO, 1, " Read not successful, trying to recover");
dst_error_recovery(state);
goto error;
}
}
mutex_unlock(&state->dst_mutex);
return 0;
error:
mutex_unlock(&state->dst_mutex);
return -EIO;
}
static int dst_put_ci(struct dst_state *state, u8 *data, int len, u8 *ca_string, int read)
{
u8 dst_ca_comm_err = 0;
while (dst_ca_comm_err < RETRIES) {
dprintk(verbose, DST_CA_NOTICE, 1, " Put Command");
if (dst_ci_command(state, data, ca_string, len, read)) { // If error
dst_error_recovery(state);
dst_ca_comm_err++; // work required here.
} else {
break;
}
}
if(dst_ca_comm_err == RETRIES)
return -1;
return 0;
}
static int ca_get_app_info(struct dst_state *state)
{
int length, str_length;
static u8 command[8] = {0x07, 0x40, 0x01, 0x00, 0x01, 0x00, 0x00, 0xff};
put_checksum(&command[0], command[0]);
if ((dst_put_ci(state, command, sizeof(command), state->messages, GET_REPLY)) < 0) {
dprintk(verbose, DST_CA_ERROR, 1, " -->dst_put_ci FAILED !");
return -1;
}
dprintk(verbose, DST_CA_INFO, 1, " -->dst_put_ci SUCCESS !");
dprintk(verbose, DST_CA_INFO, 1, " ================================ CI Module Application Info ======================================");
dprintk(verbose, DST_CA_INFO, 1, " Application Type=[%d], Application Vendor=[%d], Vendor Code=[%d]\n%s: Application info=[%s]",
state->messages[7], (state->messages[8] << 8) | state->messages[9],
(state->messages[10] << 8) | state->messages[11], __func__, (char *)(&state->messages[12]));
dprintk(verbose, DST_CA_INFO, 1, " ==================================================================================================");
// Transform dst message to correct application_info message
length = state->messages[5];
str_length = length - 6;
if (str_length < 0) {
str_length = 0;
dprintk(verbose, DST_CA_ERROR, 1, "Invalid string length returned in ca_get_app_info(). Recovering.");
}
// First, the command and length fields
put_command_and_length(&state->messages[0], CA_APP_INFO, length);
// Copy application_type, application_manufacturer and manufacturer_code
memcpy(&state->messages[4], &state->messages[7], 5);
// Set string length and copy string
state->messages[9] = str_length;
memcpy(&state->messages[10], &state->messages[12], str_length);
return 0;
}
static int ca_get_ca_info(struct dst_state *state)
{
int srcPtr, dstPtr, i, num_ids;
static u8 slot_command[8] = {0x07, 0x40, 0x00, 0x00, 0x02, 0x00, 0x00, 0xff};
const int in_system_id_pos = 8, out_system_id_pos = 4, in_num_ids_pos = 7;
put_checksum(&slot_command[0], slot_command[0]);
if ((dst_put_ci(state, slot_command, sizeof (slot_command), state->messages, GET_REPLY)) < 0) {
dprintk(verbose, DST_CA_ERROR, 1, " -->dst_put_ci FAILED !");
return -1;
}
dprintk(verbose, DST_CA_INFO, 1, " -->dst_put_ci SUCCESS !");
// Print raw data
dprintk(verbose, DST_CA_INFO, 0, " DST data = [");
for (i = 0; i < state->messages[0] + 1; i++) {
dprintk(verbose, DST_CA_INFO, 0, " 0x%02x", state->messages[i]);
}
dprintk(verbose, DST_CA_INFO, 0, "]\n");
// Set the command and length of the output
num_ids = state->messages[in_num_ids_pos];
if (num_ids >= 100) {
num_ids = 100;
dprintk(verbose, DST_CA_ERROR, 1, "Invalid number of ids (>100). Recovering.");
}
put_command_and_length(&state->messages[0], CA_INFO, num_ids * 2);
dprintk(verbose, DST_CA_INFO, 0, " CA_INFO = [");
srcPtr = in_system_id_pos;
dstPtr = out_system_id_pos;
for(i = 0; i < num_ids; i++) {
dprintk(verbose, DST_CA_INFO, 0, " 0x%02x%02x", state->messages[srcPtr + 0], state->messages[srcPtr + 1]);
// Append to output
state->messages[dstPtr + 0] = state->messages[srcPtr + 0];
state->messages[dstPtr + 1] = state->messages[srcPtr + 1];
srcPtr += 2;
dstPtr += 2;
}
dprintk(verbose, DST_CA_INFO, 0, "]\n");
return 0;
}
static int ca_get_slot_caps(struct dst_state *state, struct ca_caps *p_ca_caps, void __user *arg)
{
int i;
u8 slot_cap[256];
static u8 slot_command[8] = {0x07, 0x40, 0x02, 0x00, 0x02, 0x00, 0x00, 0xff};
put_checksum(&slot_command[0], slot_command[0]);
if ((dst_put_ci(state, slot_command, sizeof (slot_command), slot_cap, GET_REPLY)) < 0) {
dprintk(verbose, DST_CA_ERROR, 1, " -->dst_put_ci FAILED !");
return -1;
}
dprintk(verbose, DST_CA_NOTICE, 1, " -->dst_put_ci SUCCESS !");
/* Will implement the rest soon */
dprintk(verbose, DST_CA_INFO, 1, " Slot cap = [%d]", slot_cap[7]);
dprintk(verbose, DST_CA_INFO, 0, "===================================\n");
for (i = 0; i < slot_cap[0] + 1; i++)
dprintk(verbose, DST_CA_INFO, 0, " %d", slot_cap[i]);
dprintk(verbose, DST_CA_INFO, 0, "\n");
p_ca_caps->slot_num = 1;
p_ca_caps->slot_type = 1;
p_ca_caps->descr_num = slot_cap[7];
p_ca_caps->descr_type = 1;
if (copy_to_user(arg, p_ca_caps, sizeof (struct ca_caps)))
return -EFAULT;
return 0;
}
/* Need some more work */
static int ca_get_slot_descr(struct dst_state *state, struct ca_msg *p_ca_message, void __user *arg)
{
return -EOPNOTSUPP;
}
static int ca_get_slot_info(struct dst_state *state, struct ca_slot_info *p_ca_slot_info, void __user *arg)
{
int i;
static u8 slot_command[8] = {0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff};
u8 *slot_info = state->messages;
put_checksum(&slot_command[0], 7);
if ((dst_put_ci(state, slot_command, sizeof (slot_command), slot_info, GET_REPLY)) < 0) {
dprintk(verbose, DST_CA_ERROR, 1, " -->dst_put_ci FAILED !");
return -1;
}
dprintk(verbose, DST_CA_INFO, 1, " -->dst_put_ci SUCCESS !");
/* Will implement the rest soon */
dprintk(verbose, DST_CA_INFO, 1, " Slot info = [%d]", slot_info[3]);
dprintk(verbose, DST_CA_INFO, 0, "===================================\n");
for (i = 0; i < 8; i++)
dprintk(verbose, DST_CA_INFO, 0, " %d", slot_info[i]);
dprintk(verbose, DST_CA_INFO, 0, "\n");
if (slot_info[4] & 0x80) {
p_ca_slot_info->flags = CA_CI_MODULE_PRESENT;
p_ca_slot_info->num = 1;
p_ca_slot_info->type = CA_CI;
} else if (slot_info[4] & 0x40) {
p_ca_slot_info->flags = CA_CI_MODULE_READY;
p_ca_slot_info->num = 1;
p_ca_slot_info->type = CA_CI;
} else
p_ca_slot_info->flags = 0;
if (copy_to_user(arg, p_ca_slot_info, sizeof (struct ca_slot_info)))
return -EFAULT;
return 0;
}
static int ca_get_message(struct dst_state *state, struct ca_msg *p_ca_message, void __user *arg)
{
u8 i = 0;
u32 command = 0;
if (copy_from_user(p_ca_message, arg, sizeof (struct ca_msg)))
return -EFAULT;
if (p_ca_message->msg) {
dprintk(verbose, DST_CA_NOTICE, 1, " Message = [%02x %02x %02x]", p_ca_message->msg[0], p_ca_message->msg[1], p_ca_message->msg[2]);
for (i = 0; i < 3; i++) {
command = command | p_ca_message->msg[i];
if (i < 2)
command = command << 8;
}
dprintk(verbose, DST_CA_NOTICE, 1, " Command=[0x%x]", command);
switch (command) {
case CA_APP_INFO:
memcpy(p_ca_message->msg, state->messages, 128);
if (copy_to_user(arg, p_ca_message, sizeof (struct ca_msg)) )
return -EFAULT;
break;
case CA_INFO:
memcpy(p_ca_message->msg, state->messages, 128);
if (copy_to_user(arg, p_ca_message, sizeof (struct ca_msg)) )
return -EFAULT;
break;
}
}
return 0;
}
static int handle_dst_tag(struct dst_state *state, struct ca_msg *p_ca_message, struct ca_msg *hw_buffer, u32 length)
{
if (state->dst_hw_cap & DST_TYPE_HAS_SESSION) {
hw_buffer->msg[2] = p_ca_message->msg[1]; /* MSB */
hw_buffer->msg[3] = p_ca_message->msg[2]; /* LSB */
} else {
if (length > 247) {
dprintk(verbose, DST_CA_ERROR, 1, " Message too long ! *** Bailing Out *** !");
return -1;
}
hw_buffer->msg[0] = (length & 0xff) + 7;
hw_buffer->msg[1] = 0x40;
hw_buffer->msg[2] = 0x03;
hw_buffer->msg[3] = 0x00;
hw_buffer->msg[4] = 0x03;
hw_buffer->msg[5] = length & 0xff;
hw_buffer->msg[6] = 0x00;
/*
* Need to compute length for EN50221 section 8.3.2, for the time being
* assuming 8.3.2 is not applicable
*/
memcpy(&hw_buffer->msg[7], &p_ca_message->msg[4], length);
}
return 0;
}
static int write_to_8820(struct dst_state *state, struct ca_msg *hw_buffer, u8 length, u8 reply)
{
if ((dst_put_ci(state, hw_buffer->msg, length, hw_buffer->msg, reply)) < 0) {
dprintk(verbose, DST_CA_ERROR, 1, " DST-CI Command failed.");
dprintk(verbose, DST_CA_NOTICE, 1, " Resetting DST.");
rdc_reset_state(state);
return -1;
}
dprintk(verbose, DST_CA_NOTICE, 1, " DST-CI Command success.");
return 0;
}
static u32 asn_1_decode(u8 *asn_1_array)
{
u8 length_field = 0, word_count = 0, count = 0;
u32 length = 0;
length_field = asn_1_array[0];
dprintk(verbose, DST_CA_DEBUG, 1, " Length field=[%02x]", length_field);
if (length_field < 0x80) {
length = length_field & 0x7f;
dprintk(verbose, DST_CA_DEBUG, 1, " Length=[%02x]\n", length);
} else {
word_count = length_field & 0x7f;
for (count = 0; count < word_count; count++) {
length = length << 8;
length += asn_1_array[count + 1];
dprintk(verbose, DST_CA_DEBUG, 1, " Length=[%04x]", length);
}
}
return length;
}
static int debug_string(u8 *msg, u32 length, u32 offset)
{
u32 i;
dprintk(verbose, DST_CA_DEBUG, 0, " String=[ ");
for (i = offset; i < length; i++)
dprintk(verbose, DST_CA_DEBUG, 0, "%02x ", msg[i]);
dprintk(verbose, DST_CA_DEBUG, 0, "]\n");
return 0;
}
static int ca_set_pmt(struct dst_state *state, struct ca_msg *p_ca_message, struct ca_msg *hw_buffer, u8 reply, u8 query)
{
u32 length = 0;
u8 tag_length = 8;
length = asn_1_decode(&p_ca_message->msg[3]);
dprintk(verbose, DST_CA_DEBUG, 1, " CA Message length=[%d]", length);
debug_string(&p_ca_message->msg[4], length, 0); /* length is excluding tag & length */
memset(hw_buffer->msg, '\0', length);
handle_dst_tag(state, p_ca_message, hw_buffer, length);
put_checksum(hw_buffer->msg, hw_buffer->msg[0]);
debug_string(hw_buffer->msg, (length + tag_length), 0); /* tags too */
write_to_8820(state, hw_buffer, (length + tag_length), reply);
return 0;
}
/* Board supports CA PMT reply ? */
static int dst_check_ca_pmt(struct dst_state *state, struct ca_msg *p_ca_message, struct ca_msg *hw_buffer)
{
int ca_pmt_reply_test = 0;
/* Do test board */
/* Not there yet but soon */
/* CA PMT Reply capable */
if (ca_pmt_reply_test) {
if ((ca_set_pmt(state, p_ca_message, hw_buffer, 1, GET_REPLY)) < 0) {
dprintk(verbose, DST_CA_ERROR, 1, " ca_set_pmt.. failed !");
return -1;
}
/* Process CA PMT Reply */
/* will implement soon */
dprintk(verbose, DST_CA_ERROR, 1, " Not there yet");
}
/* CA PMT Reply not capable */
if (!ca_pmt_reply_test) {
if ((ca_set_pmt(state, p_ca_message, hw_buffer, 0, NO_REPLY)) < 0) {
dprintk(verbose, DST_CA_ERROR, 1, " ca_set_pmt.. failed !");
return -1;
}
dprintk(verbose, DST_CA_NOTICE, 1, " ca_set_pmt.. success !");
/* put a dummy message */
}
return 0;
}
static int ca_send_message(struct dst_state *state, struct ca_msg *p_ca_message, void __user *arg)
{
int i = 0;
unsigned int ca_message_header_len;
u32 command = 0;
struct ca_msg *hw_buffer;
int result = 0;
if ((hw_buffer = kmalloc(sizeof (struct ca_msg), GFP_KERNEL)) == NULL) {
dprintk(verbose, DST_CA_ERROR, 1, " Memory allocation failure");
return -ENOMEM;
}
dprintk(verbose, DST_CA_DEBUG, 1, " ");
if (copy_from_user(p_ca_message, arg, sizeof (struct ca_msg))) {
result = -EFAULT;
goto free_mem_and_exit;
}
if (p_ca_message->msg) {
ca_message_header_len = p_ca_message->length; /* Restore it back when you are done */
/* EN50221 tag */
command = 0;
for (i = 0; i < 3; i++) {
command = command | p_ca_message->msg[i];
if (i < 2)
command = command << 8;
}
dprintk(verbose, DST_CA_DEBUG, 1, " Command=[0x%x]\n", command);
switch (command) {
case CA_PMT:
dprintk(verbose, DST_CA_DEBUG, 1, "Command = SEND_CA_PMT");
if ((ca_set_pmt(state, p_ca_message, hw_buffer, 0, 0)) < 0) { // code simplification started
dprintk(verbose, DST_CA_ERROR, 1, " -->CA_PMT Failed !");
result = -1;
goto free_mem_and_exit;
}
dprintk(verbose, DST_CA_INFO, 1, " -->CA_PMT Success !");
break;
case CA_PMT_REPLY:
dprintk(verbose, DST_CA_INFO, 1, "Command = CA_PMT_REPLY");
/* Have to handle the 2 basic types of cards here */
if ((dst_check_ca_pmt(state, p_ca_message, hw_buffer)) < 0) {
dprintk(verbose, DST_CA_ERROR, 1, " -->CA_PMT_REPLY Failed !");
result = -1;
goto free_mem_and_exit;
}
dprintk(verbose, DST_CA_INFO, 1, " -->CA_PMT_REPLY Success !");
break;
case CA_APP_INFO_ENQUIRY: // only for debugging
dprintk(verbose, DST_CA_INFO, 1, " Getting Cam Application information");
if ((ca_get_app_info(state)) < 0) {
dprintk(verbose, DST_CA_ERROR, 1, " -->CA_APP_INFO_ENQUIRY Failed !");
result = -1;
goto free_mem_and_exit;
}
dprintk(verbose, DST_CA_INFO, 1, " -->CA_APP_INFO_ENQUIRY Success !");
break;
case CA_INFO_ENQUIRY:
dprintk(verbose, DST_CA_INFO, 1, " Getting CA Information");
if ((ca_get_ca_info(state)) < 0) {
dprintk(verbose, DST_CA_ERROR, 1, " -->CA_INFO_ENQUIRY Failed !");
result = -1;
goto free_mem_and_exit;
}
dprintk(verbose, DST_CA_INFO, 1, " -->CA_INFO_ENQUIRY Success !");
break;
}
}
free_mem_and_exit:
kfree (hw_buffer);
return result;
}
static long dst_ca_ioctl(struct file *file, unsigned int cmd, unsigned long ioctl_arg)
{
struct dvb_device *dvbdev;
struct dst_state *state;
struct ca_slot_info *p_ca_slot_info;
struct ca_caps *p_ca_caps;
struct ca_msg *p_ca_message;
void __user *arg = (void __user *)ioctl_arg;
int result = 0;
mutex_lock(&dst_ca_mutex);
dvbdev = file->private_data;
state = (struct dst_state *)dvbdev->priv;
p_ca_message = kmalloc(sizeof (struct ca_msg), GFP_KERNEL);
p_ca_slot_info = kmalloc(sizeof (struct ca_slot_info), GFP_KERNEL);
p_ca_caps = kmalloc(sizeof (struct ca_caps), GFP_KERNEL);
if (!p_ca_message || !p_ca_slot_info || !p_ca_caps) {
dprintk(verbose, DST_CA_ERROR, 1, " Memory allocation failure");
result = -ENOMEM;
goto free_mem_and_exit;
}
/* We have now only the standard ioctl's, the driver is upposed to handle internals. */
switch (cmd) {
case CA_SEND_MSG:
dprintk(verbose, DST_CA_INFO, 1, " Sending message");
if ((ca_send_message(state, p_ca_message, arg)) < 0) {
dprintk(verbose, DST_CA_ERROR, 1, " -->CA_SEND_MSG Failed !");
result = -1;
goto free_mem_and_exit;
}
break;
case CA_GET_MSG:
dprintk(verbose, DST_CA_INFO, 1, " Getting message");
if ((ca_get_message(state, p_ca_message, arg)) < 0) {
dprintk(verbose, DST_CA_ERROR, 1, " -->CA_GET_MSG Failed !");
result = -1;
goto free_mem_and_exit;
}
dprintk(verbose, DST_CA_INFO, 1, " -->CA_GET_MSG Success !");
break;
case CA_RESET:
dprintk(verbose, DST_CA_ERROR, 1, " Resetting DST");
dst_error_bailout(state);
msleep(4000);
break;
case CA_GET_SLOT_INFO:
dprintk(verbose, DST_CA_INFO, 1, " Getting Slot info");
if ((ca_get_slot_info(state, p_ca_slot_info, arg)) < 0) {
dprintk(verbose, DST_CA_ERROR, 1, " -->CA_GET_SLOT_INFO Failed !");
result = -1;
goto free_mem_and_exit;
}
dprintk(verbose, DST_CA_INFO, 1, " -->CA_GET_SLOT_INFO Success !");
break;
case CA_GET_CAP:
dprintk(verbose, DST_CA_INFO, 1, " Getting Slot capabilities");
if ((ca_get_slot_caps(state, p_ca_caps, arg)) < 0) {
dprintk(verbose, DST_CA_ERROR, 1, " -->CA_GET_CAP Failed !");
result = -1;
goto free_mem_and_exit;
}
dprintk(verbose, DST_CA_INFO, 1, " -->CA_GET_CAP Success !");
break;
case CA_GET_DESCR_INFO:
dprintk(verbose, DST_CA_INFO, 1, " Getting descrambler description");
if ((ca_get_slot_descr(state, p_ca_message, arg)) < 0) {
dprintk(verbose, DST_CA_ERROR, 1, " -->CA_GET_DESCR_INFO Failed !");
result = -1;
goto free_mem_and_exit;
}
dprintk(verbose, DST_CA_INFO, 1, " -->CA_GET_DESCR_INFO Success !");
break;
case CA_SET_DESCR:
dprintk(verbose, DST_CA_INFO, 1, " Setting descrambler");
if ((ca_set_slot_descr()) < 0) {
dprintk(verbose, DST_CA_ERROR, 1, " -->CA_SET_DESCR Failed !");
result = -1;
goto free_mem_and_exit;
}
dprintk(verbose, DST_CA_INFO, 1, " -->CA_SET_DESCR Success !");
break;
case CA_SET_PID:
dprintk(verbose, DST_CA_INFO, 1, " Setting PID");
if ((ca_set_pid()) < 0) {
dprintk(verbose, DST_CA_ERROR, 1, " -->CA_SET_PID Failed !");
result = -1;
goto free_mem_and_exit;
}
dprintk(verbose, DST_CA_INFO, 1, " -->CA_SET_PID Success !");
default:
result = -EOPNOTSUPP;
};
free_mem_and_exit:
kfree (p_ca_message);
kfree (p_ca_slot_info);
kfree (p_ca_caps);
mutex_unlock(&dst_ca_mutex);
return result;
}
static int dst_ca_open(struct inode *inode, struct file *file)
{
dprintk(verbose, DST_CA_DEBUG, 1, " Device opened [%p] ", file);
try_module_get(THIS_MODULE);
return 0;
}
static int dst_ca_release(struct inode *inode, struct file *file)
{
dprintk(verbose, DST_CA_DEBUG, 1, " Device closed.");
module_put(THIS_MODULE);
return 0;
}
static ssize_t dst_ca_read(struct file *file, char __user *buffer, size_t length, loff_t *offset)
{
ssize_t bytes_read = 0;
dprintk(verbose, DST_CA_DEBUG, 1, " Device read.");
return bytes_read;
}
static ssize_t dst_ca_write(struct file *file, const char __user *buffer, size_t length, loff_t *offset)
{
dprintk(verbose, DST_CA_DEBUG, 1, " Device write.");
return 0;
}
static const struct file_operations dst_ca_fops = {
.owner = THIS_MODULE,
.unlocked_ioctl = dst_ca_ioctl,
.open = dst_ca_open,
.release = dst_ca_release,
.read = dst_ca_read,
.write = dst_ca_write,
.llseek = noop_llseek,
};
static struct dvb_device dvbdev_ca = {
.priv = NULL,
.users = 1,
.readers = 1,
.writers = 1,
.fops = &dst_ca_fops
};
struct dvb_device *dst_ca_attach(struct dst_state *dst, struct dvb_adapter *dvb_adapter)
{
struct dvb_device *dvbdev;
dprintk(verbose, DST_CA_ERROR, 1, "registering DST-CA device");
if (dvb_register_device(dvb_adapter, &dvbdev, &dvbdev_ca, dst, DVB_DEVICE_CA) == 0) {
dst->dst_ca = dvbdev;
return dst->dst_ca;
}
return NULL;
}
EXPORT_SYMBOL(dst_ca_attach);
MODULE_DESCRIPTION("DST DVB-S/T/C Combo CA driver");
MODULE_AUTHOR("Manu Abraham");
MODULE_LICENSE("GPL");
| gpl-2.0 |
FreeOptimusProject/android_kernel_lge_p970 | net/netfilter/xt_owner.c | 9191 | 2272 | /*
* Kernel module to match various things tied to sockets associated with
* locally generated outgoing packets.
*
* (C) 2000 Marc Boucher <marc@mbsi.ca>
*
* Copyright © CC Computer Consultants GmbH, 2007 - 2008
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/module.h>
#include <linux/skbuff.h>
#include <linux/file.h>
#include <net/sock.h>
#include <linux/netfilter/x_tables.h>
#include <linux/netfilter/xt_owner.h>
static bool
owner_mt(const struct sk_buff *skb, struct xt_action_param *par)
{
const struct xt_owner_match_info *info = par->matchinfo;
const struct file *filp;
if (skb->sk == NULL || skb->sk->sk_socket == NULL)
return (info->match ^ info->invert) == 0;
else if (info->match & info->invert & XT_OWNER_SOCKET)
/*
* Socket exists but user wanted ! --socket-exists.
* (Single ampersands intended.)
*/
return false;
filp = skb->sk->sk_socket->file;
if (filp == NULL)
return ((info->match ^ info->invert) &
(XT_OWNER_UID | XT_OWNER_GID)) == 0;
if (info->match & XT_OWNER_UID)
if ((filp->f_cred->fsuid >= info->uid_min &&
filp->f_cred->fsuid <= info->uid_max) ^
!(info->invert & XT_OWNER_UID))
return false;
if (info->match & XT_OWNER_GID)
if ((filp->f_cred->fsgid >= info->gid_min &&
filp->f_cred->fsgid <= info->gid_max) ^
!(info->invert & XT_OWNER_GID))
return false;
return true;
}
static struct xt_match owner_mt_reg __read_mostly = {
.name = "owner",
.revision = 1,
.family = NFPROTO_UNSPEC,
.match = owner_mt,
.matchsize = sizeof(struct xt_owner_match_info),
.hooks = (1 << NF_INET_LOCAL_OUT) |
(1 << NF_INET_POST_ROUTING),
.me = THIS_MODULE,
};
static int __init owner_mt_init(void)
{
return xt_register_match(&owner_mt_reg);
}
static void __exit owner_mt_exit(void)
{
xt_unregister_match(&owner_mt_reg);
}
module_init(owner_mt_init);
module_exit(owner_mt_exit);
MODULE_AUTHOR("Jan Engelhardt <jengelh@medozas.de>");
MODULE_DESCRIPTION("Xtables: socket owner matching");
MODULE_LICENSE("GPL");
MODULE_ALIAS("ipt_owner");
MODULE_ALIAS("ip6t_owner");
| gpl-2.0 |
ezeeyahoo/android_kernel_motorola_msm8916 | arch/alpha/kernel/err_ev7.c | 13543 | 8187 | /*
* linux/arch/alpha/kernel/err_ev7.c
*
* Copyright (C) 2000 Jeff Wiedemeier (Compaq Computer Corporation)
*
* Error handling code supporting Alpha systems
*/
#include <linux/init.h>
#include <linux/sched.h>
#include <asm/io.h>
#include <asm/hwrpb.h>
#include <asm/smp.h>
#include <asm/err_common.h>
#include <asm/err_ev7.h>
#include "err_impl.h"
#include "proto.h"
struct ev7_lf_subpackets *
ev7_collect_logout_frame_subpackets(struct el_subpacket *el_ptr,
struct ev7_lf_subpackets *lf_subpackets)
{
struct el_subpacket *subpacket;
int i;
/*
* A Marvel machine check frame is always packaged in an
* el_subpacket of class HEADER, type LOGOUT_FRAME.
*/
if (el_ptr->class != EL_CLASS__HEADER ||
el_ptr->type != EL_TYPE__HEADER__LOGOUT_FRAME)
return NULL;
/*
* It is a logout frame header. Look at the one subpacket.
*/
el_ptr = (struct el_subpacket *)
((unsigned long)el_ptr + el_ptr->length);
/*
* It has to be class PAL, type LOGOUT_FRAME.
*/
if (el_ptr->class != EL_CLASS__PAL ||
el_ptr->type != EL_TYPE__PAL__LOGOUT_FRAME)
return NULL;
lf_subpackets->logout = (struct ev7_pal_logout_subpacket *)
el_ptr->by_type.raw.data_start;
/*
* Process the subpackets.
*/
subpacket = (struct el_subpacket *)
((unsigned long)el_ptr + el_ptr->length);
for (i = 0;
subpacket && i < lf_subpackets->logout->subpacket_count;
subpacket = (struct el_subpacket *)
((unsigned long)subpacket + subpacket->length), i++) {
/*
* All subpackets should be class PAL.
*/
if (subpacket->class != EL_CLASS__PAL) {
printk("%s**UNEXPECTED SUBPACKET CLASS %d "
"IN LOGOUT FRAME (packet %d\n",
err_print_prefix, subpacket->class, i);
return NULL;
}
/*
* Remember the subpacket.
*/
switch(subpacket->type) {
case EL_TYPE__PAL__EV7_PROCESSOR:
lf_subpackets->ev7 =
(struct ev7_pal_processor_subpacket *)
subpacket->by_type.raw.data_start;
break;
case EL_TYPE__PAL__EV7_RBOX:
lf_subpackets->rbox = (struct ev7_pal_rbox_subpacket *)
subpacket->by_type.raw.data_start;
break;
case EL_TYPE__PAL__EV7_ZBOX:
lf_subpackets->zbox = (struct ev7_pal_zbox_subpacket *)
subpacket->by_type.raw.data_start;
break;
case EL_TYPE__PAL__EV7_IO:
lf_subpackets->io = (struct ev7_pal_io_subpacket *)
subpacket->by_type.raw.data_start;
break;
case EL_TYPE__PAL__ENV__AMBIENT_TEMPERATURE:
case EL_TYPE__PAL__ENV__AIRMOVER_FAN:
case EL_TYPE__PAL__ENV__VOLTAGE:
case EL_TYPE__PAL__ENV__INTRUSION:
case EL_TYPE__PAL__ENV__POWER_SUPPLY:
case EL_TYPE__PAL__ENV__LAN:
case EL_TYPE__PAL__ENV__HOT_PLUG:
lf_subpackets->env[ev7_lf_env_index(subpacket->type)] =
(struct ev7_pal_environmental_subpacket *)
subpacket->by_type.raw.data_start;
break;
default:
/*
* Don't know what kind of frame this is.
*/
return NULL;
}
}
return lf_subpackets;
}
void
ev7_machine_check(unsigned long vector, unsigned long la_ptr)
{
struct el_subpacket *el_ptr = (struct el_subpacket *)la_ptr;
char *saved_err_prefix = err_print_prefix;
/*
* Sync the processor
*/
mb();
draina();
err_print_prefix = KERN_CRIT;
printk("%s*CPU %s Error (Vector 0x%x) reported on CPU %d\n",
err_print_prefix,
(vector == SCB_Q_PROCERR) ? "Correctable" : "Uncorrectable",
(unsigned int)vector, (int)smp_processor_id());
el_process_subpacket(el_ptr);
err_print_prefix = saved_err_prefix;
/*
* Release the logout frame
*/
wrmces(0x7);
mb();
}
static char *el_ev7_processor_subpacket_annotation[] = {
"Subpacket Header", "I_STAT", "DC_STAT",
"C_ADDR", "C_SYNDROME_1", "C_SYNDROME_0",
"C_STAT", "C_STS", "MM_STAT",
"EXC_ADDR", "IER_CM", "ISUM",
"PAL_BASE", "I_CTL", "PROCESS_CONTEXT",
"CBOX_CTL", "CBOX_STP_CTL", "CBOX_ACC_CTL",
"CBOX_LCL_SET", "CBOX_GLB_SET", "BBOX_CTL",
"BBOX_ERR_STS", "BBOX_ERR_IDX", "CBOX_DDP_ERR_STS",
"BBOX_DAT_RMP", NULL
};
static char *el_ev7_zbox_subpacket_annotation[] = {
"Subpacket Header",
"ZBOX(0): DRAM_ERR_STATUS_2 / DRAM_ERR_STATUS_1",
"ZBOX(0): DRAM_ERROR_CTL / DRAM_ERR_STATUS_3",
"ZBOX(0): DIFT_TIMEOUT / DRAM_ERR_ADR",
"ZBOX(0): FRC_ERR_ADR / DRAM_MAPPER_CTL",
"ZBOX(0): reserved / DIFT_ERR_STATUS",
"ZBOX(1): DRAM_ERR_STATUS_2 / DRAM_ERR_STATUS_1",
"ZBOX(1): DRAM_ERROR_CTL / DRAM_ERR_STATUS_3",
"ZBOX(1): DIFT_TIMEOUT / DRAM_ERR_ADR",
"ZBOX(1): FRC_ERR_ADR / DRAM_MAPPER_CTL",
"ZBOX(1): reserved / DIFT_ERR_STATUS",
"CBOX_CTL", "CBOX_STP_CTL",
"ZBOX(0)_ERROR_PA", "ZBOX(1)_ERROR_PA",
"ZBOX(0)_ORED_SYNDROME","ZBOX(1)_ORED_SYNDROME",
NULL
};
static char *el_ev7_rbox_subpacket_annotation[] = {
"Subpacket Header", "RBOX_CFG", "RBOX_N_CFG",
"RBOX_S_CFG", "RBOX_E_CFG", "RBOX_W_CFG",
"RBOX_N_ERR", "RBOX_S_ERR", "RBOX_E_ERR",
"RBOX_W_ERR", "RBOX_IO_CFG", "RBOX_IO_ERR",
"RBOX_L_ERR", "RBOX_WHOAMI", "RBOX_IMASL",
"RBOX_INTQ", "RBOX_INT", NULL
};
static char *el_ev7_io_subpacket_annotation[] = {
"Subpacket Header", "IO_ASIC_REV", "IO_SYS_REV",
"IO7_UPH", "HPI_CTL", "CRD_CTL",
"HEI_CTL", "PO7_ERROR_SUM","PO7_UNCRR_SYM",
"PO7_CRRCT_SYM", "PO7_UGBGE_SYM","PO7_ERR_PKT0",
"PO7_ERR_PKT1", "reserved", "reserved",
"PO0_ERR_SUM", "PO0_TLB_ERR", "PO0_SPL_COMPLT",
"PO0_TRANS_SUM", "PO0_FIRST_ERR","PO0_MULT_ERR",
"DM CSR PH", "DM CSR PH", "DM CSR PH",
"DM CSR PH", "reserved",
"PO1_ERR_SUM", "PO1_TLB_ERR", "PO1_SPL_COMPLT",
"PO1_TRANS_SUM", "PO1_FIRST_ERR","PO1_MULT_ERR",
"DM CSR PH", "DM CSR PH", "DM CSR PH",
"DM CSR PH", "reserved",
"PO2_ERR_SUM", "PO2_TLB_ERR", "PO2_SPL_COMPLT",
"PO2_TRANS_SUM", "PO2_FIRST_ERR","PO2_MULT_ERR",
"DM CSR PH", "DM CSR PH", "DM CSR PH",
"DM CSR PH", "reserved",
"PO3_ERR_SUM", "PO3_TLB_ERR", "PO3_SPL_COMPLT",
"PO3_TRANS_SUM", "PO3_FIRST_ERR","PO3_MULT_ERR",
"DM CSR PH", "DM CSR PH", "DM CSR PH",
"DM CSR PH", "reserved",
NULL
};
static struct el_subpacket_annotation el_ev7_pal_annotations[] = {
SUBPACKET_ANNOTATION(EL_CLASS__PAL,
EL_TYPE__PAL__EV7_PROCESSOR,
1,
"EV7 Processor Subpacket",
el_ev7_processor_subpacket_annotation),
SUBPACKET_ANNOTATION(EL_CLASS__PAL,
EL_TYPE__PAL__EV7_ZBOX,
1,
"EV7 ZBOX Subpacket",
el_ev7_zbox_subpacket_annotation),
SUBPACKET_ANNOTATION(EL_CLASS__PAL,
EL_TYPE__PAL__EV7_RBOX,
1,
"EV7 RBOX Subpacket",
el_ev7_rbox_subpacket_annotation),
SUBPACKET_ANNOTATION(EL_CLASS__PAL,
EL_TYPE__PAL__EV7_IO,
1,
"EV7 IO Subpacket",
el_ev7_io_subpacket_annotation)
};
static struct el_subpacket *
ev7_process_pal_subpacket(struct el_subpacket *header)
{
struct ev7_pal_subpacket *packet;
if (header->class != EL_CLASS__PAL) {
printk("%s ** Unexpected header CLASS %d TYPE %d, aborting\n",
err_print_prefix,
header->class, header->type);
return NULL;
}
packet = (struct ev7_pal_subpacket *)header->by_type.raw.data_start;
switch(header->type) {
case EL_TYPE__PAL__LOGOUT_FRAME:
printk("%s*** MCHK occurred on LPID %lld (RBOX %llx)\n",
err_print_prefix,
packet->by_type.logout.whami,
packet->by_type.logout.rbox_whami);
el_print_timestamp(&packet->by_type.logout.timestamp);
printk("%s EXC_ADDR: %016llx\n"
" HALT_CODE: %llx\n",
err_print_prefix,
packet->by_type.logout.exc_addr,
packet->by_type.logout.halt_code);
el_process_subpackets(header,
packet->by_type.logout.subpacket_count);
break;
default:
printk("%s ** PAL TYPE %d SUBPACKET\n",
err_print_prefix,
header->type);
el_annotate_subpacket(header);
break;
}
return (struct el_subpacket *)((unsigned long)header + header->length);
}
struct el_subpacket_handler ev7_pal_subpacket_handler =
SUBPACKET_HANDLER_INIT(EL_CLASS__PAL, ev7_process_pal_subpacket);
void __init
ev7_register_error_handlers(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(el_ev7_pal_annotations); i++)
cdl_register_subpacket_annotation(&el_ev7_pal_annotations[i]);
cdl_register_subpacket_handler(&ev7_pal_subpacket_handler);
}
| gpl-2.0 |
hannes/linux | net/netfilter/ipset/ip_set_getport.c | 232 | 3884 | /* Copyright (C) 2003-2011 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/* Get Layer-4 data from the packets */
#include <linux/ip.h>
#include <linux/skbuff.h>
#include <linux/icmp.h>
#include <linux/icmpv6.h>
#include <linux/sctp.h>
#include <linux/netfilter_ipv6/ip6_tables.h>
#include <net/ip.h>
#include <net/ipv6.h>
#include <linux/netfilter/ipset/ip_set_getport.h>
#include <linux/export.h>
/* We must handle non-linear skbs */
static bool
get_port(const struct sk_buff *skb, int protocol, unsigned int protooff,
bool src, __be16 *port, u8 *proto)
{
switch (protocol) {
case IPPROTO_TCP: {
struct tcphdr _tcph;
const struct tcphdr *th;
th = skb_header_pointer(skb, protooff, sizeof(_tcph), &_tcph);
if (!th)
/* No choice either */
return false;
*port = src ? th->source : th->dest;
break;
}
case IPPROTO_SCTP: {
struct sctphdr _sh;
const struct sctphdr *sh;
sh = skb_header_pointer(skb, protooff, sizeof(_sh), &_sh);
if (!sh)
/* No choice either */
return false;
*port = src ? sh->source : sh->dest;
break;
}
case IPPROTO_UDP:
case IPPROTO_UDPLITE: {
struct udphdr _udph;
const struct udphdr *uh;
uh = skb_header_pointer(skb, protooff, sizeof(_udph), &_udph);
if (!uh)
/* No choice either */
return false;
*port = src ? uh->source : uh->dest;
break;
}
case IPPROTO_ICMP: {
struct icmphdr _ich;
const struct icmphdr *ic;
ic = skb_header_pointer(skb, protooff, sizeof(_ich), &_ich);
if (!ic)
return false;
*port = (__force __be16)htons((ic->type << 8) | ic->code);
break;
}
case IPPROTO_ICMPV6: {
struct icmp6hdr _ich;
const struct icmp6hdr *ic;
ic = skb_header_pointer(skb, protooff, sizeof(_ich), &_ich);
if (!ic)
return false;
*port = (__force __be16)
htons((ic->icmp6_type << 8) | ic->icmp6_code);
break;
}
default:
break;
}
*proto = protocol;
return true;
}
bool
ip_set_get_ip4_port(const struct sk_buff *skb, bool src,
__be16 *port, u8 *proto)
{
const struct iphdr *iph = ip_hdr(skb);
unsigned int protooff = skb_network_offset(skb) + ip_hdrlen(skb);
int protocol = iph->protocol;
/* See comments at tcp_match in ip_tables.c */
if (protocol <= 0)
return false;
if (ntohs(iph->frag_off) & IP_OFFSET)
switch (protocol) {
case IPPROTO_TCP:
case IPPROTO_SCTP:
case IPPROTO_UDP:
case IPPROTO_UDPLITE:
case IPPROTO_ICMP:
/* Port info not available for fragment offset > 0 */
return false;
default:
/* Other protocols doesn't have ports,
* so we can match fragments.
*/
*proto = protocol;
return true;
}
return get_port(skb, protocol, protooff, src, port, proto);
}
EXPORT_SYMBOL_GPL(ip_set_get_ip4_port);
#if IS_ENABLED(CONFIG_IP6_NF_IPTABLES)
bool
ip_set_get_ip6_port(const struct sk_buff *skb, bool src,
__be16 *port, u8 *proto)
{
int protoff;
u8 nexthdr;
__be16 frag_off = 0;
nexthdr = ipv6_hdr(skb)->nexthdr;
protoff = ipv6_skip_exthdr(skb,
skb_network_offset(skb) +
sizeof(struct ipv6hdr), &nexthdr,
&frag_off);
if (protoff < 0 || (frag_off & htons(~0x7)) != 0)
return false;
return get_port(skb, nexthdr, protoff, src, port, proto);
}
EXPORT_SYMBOL_GPL(ip_set_get_ip6_port);
#endif
bool
ip_set_get_ip_port(const struct sk_buff *skb, u8 pf, bool src, __be16 *port)
{
bool ret;
u8 proto;
switch (pf) {
case NFPROTO_IPV4:
ret = ip_set_get_ip4_port(skb, src, port, &proto);
break;
case NFPROTO_IPV6:
ret = ip_set_get_ip6_port(skb, src, port, &proto);
break;
default:
return false;
}
if (!ret)
return ret;
switch (proto) {
case IPPROTO_TCP:
case IPPROTO_UDP:
return true;
default:
return false;
}
}
EXPORT_SYMBOL_GPL(ip_set_get_ip_port);
| gpl-2.0 |
bw-oss/linux | arch/arm/mach-pxa/idp.c | 232 | 6329 | /*
* linux/arch/arm/mach-pxa/idp.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Copyright (c) 2001 Cliff Brake, Accelent Systems Inc.
*
* 2001-09-13: Cliff Brake <cbrake@accelent.com>
* Initial code
*
* 2005-02-15: Cliff Brake <cliff.brake@gmail.com>
* <http://www.vibren.com> <http://bec-systems.com>
* Updated for 2.6 kernel
*
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/leds.h>
#include <linux/platform_device.h>
#include <linux/fb.h>
#include <asm/setup.h>
#include <asm/memory.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "pxa25x.h"
#include "idp.h"
#include <linux/platform_data/video-pxafb.h>
#include <mach/bitfield.h>
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/smc91x.h>
#include "generic.h"
#include "devices.h"
/* TODO:
* - add pxa2xx_audio_ops_t device structure
* - Ethernet interrupt
*/
static unsigned long idp_pin_config[] __initdata = {
/* LCD */
GPIOxx_LCD_DSTN_16BPP,
/* BTUART */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO44_BTUART_CTS,
GPIO45_BTUART_RTS,
/* STUART */
GPIO46_STUART_RXD,
GPIO47_STUART_TXD,
/* MMC */
GPIO6_MMC_CLK,
GPIO8_MMC_CS0,
/* Ethernet */
GPIO33_nCS_5, /* Ethernet CS */
GPIO4_GPIO, /* Ethernet IRQ */
};
static struct resource smc91x_resources[] = {
[0] = {
.start = (IDP_ETH_PHYS + 0x300),
.end = (IDP_ETH_PHYS + 0xfffff),
.flags = IORESOURCE_MEM,
},
[1] = {
.start = PXA_GPIO_TO_IRQ(4),
.end = PXA_GPIO_TO_IRQ(4),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
}
};
static struct smc91x_platdata smc91x_platdata = {
.flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
SMC91X_USE_DMA | SMC91X_NOWAIT,
.pxa_u16_align4 = true,
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = 0,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
.dev.platform_data = &smc91x_platdata,
};
static void idp_backlight_power(int on)
{
if (on) {
IDP_CPLD_LCD |= (1<<1);
} else {
IDP_CPLD_LCD &= ~(1<<1);
}
}
static void idp_vlcd(int on)
{
if (on) {
IDP_CPLD_LCD |= (1<<2);
} else {
IDP_CPLD_LCD &= ~(1<<2);
}
}
static void idp_lcd_power(int on, struct fb_var_screeninfo *var)
{
if (on) {
IDP_CPLD_LCD |= (1<<0);
} else {
IDP_CPLD_LCD &= ~(1<<0);
}
/* call idp_vlcd for now as core driver does not support
* both power and vlcd hooks. Note, this is not technically
* the correct sequence, but seems to work. Disclaimer:
* this may eventually damage the display.
*/
idp_vlcd(on);
}
static struct pxafb_mode_info sharp_lm8v31_mode = {
.pixclock = 270000,
.xres = 640,
.yres = 480,
.bpp = 16,
.hsync_len = 1,
.left_margin = 3,
.right_margin = 3,
.vsync_len = 1,
.upper_margin = 0,
.lower_margin = 0,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.cmap_greyscale = 0,
};
static struct pxafb_mach_info sharp_lm8v31 = {
.modes = &sharp_lm8v31_mode,
.num_modes = 1,
.cmap_inverse = 0,
.cmap_static = 0,
.lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL |
LCD_AC_BIAS_FREQ(255),
.pxafb_backlight_power = &idp_backlight_power,
.pxafb_lcd_power = &idp_lcd_power
};
static struct pxamci_platform_data idp_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.gpio_card_detect = -1,
.gpio_card_ro = -1,
.gpio_power = -1,
};
static void __init idp_init(void)
{
printk("idp_init()\n");
pxa2xx_mfp_config(ARRAY_AND_SIZE(idp_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
platform_device_register(&smc91x_device);
//platform_device_register(&mst_audio_device);
pxa_set_fb_info(NULL, &sharp_lm8v31);
pxa_set_mci_info(&idp_mci_platform_data);
}
static struct map_desc idp_io_desc[] __initdata = {
{
.virtual = IDP_COREVOLT_VIRT,
.pfn = __phys_to_pfn(IDP_COREVOLT_PHYS),
.length = IDP_COREVOLT_SIZE,
.type = MT_DEVICE
}, {
.virtual = IDP_CPLD_VIRT,
.pfn = __phys_to_pfn(IDP_CPLD_PHYS),
.length = IDP_CPLD_SIZE,
.type = MT_DEVICE
}
};
static void __init idp_map_io(void)
{
pxa25x_map_io();
iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc));
}
/* LEDs */
#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
struct idp_led {
struct led_classdev cdev;
u8 mask;
};
/*
* The triggers lines up below will only be used if the
* LED triggers are compiled in.
*/
static const struct {
const char *name;
const char *trigger;
} idp_leds[] = {
{ "idp:green", "heartbeat", },
{ "idp:red", "cpu0", },
};
static void idp_led_set(struct led_classdev *cdev,
enum led_brightness b)
{
struct idp_led *led = container_of(cdev,
struct idp_led, cdev);
u32 reg = IDP_CPLD_LED_CONTROL;
if (b != LED_OFF)
reg &= ~led->mask;
else
reg |= led->mask;
IDP_CPLD_LED_CONTROL = reg;
}
static enum led_brightness idp_led_get(struct led_classdev *cdev)
{
struct idp_led *led = container_of(cdev,
struct idp_led, cdev);
return (IDP_CPLD_LED_CONTROL & led->mask) ? LED_OFF : LED_FULL;
}
static int __init idp_leds_init(void)
{
int i;
if (!machine_is_pxa_idp())
return -ENODEV;
for (i = 0; i < ARRAY_SIZE(idp_leds); i++) {
struct idp_led *led;
led = kzalloc(sizeof(*led), GFP_KERNEL);
if (!led)
break;
led->cdev.name = idp_leds[i].name;
led->cdev.brightness_set = idp_led_set;
led->cdev.brightness_get = idp_led_get;
led->cdev.default_trigger = idp_leds[i].trigger;
if (i == 0)
led->mask = IDP_HB_LED;
else
led->mask = IDP_BUSY_LED;
if (led_classdev_register(NULL, &led->cdev) < 0) {
kfree(led);
break;
}
}
return 0;
}
/*
* Since we may have triggers on any subsystem, defer registration
* until after subsystem_init.
*/
fs_initcall(idp_leds_init);
#endif
MACHINE_START(PXA_IDP, "Vibren PXA255 IDP")
/* Maintainer: Vibren Technologies */
.map_io = idp_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa25x_init_irq,
.handle_irq = pxa25x_handle_irq,
.init_time = pxa_timer_init,
.init_machine = idp_init,
.restart = pxa_restart,
MACHINE_END
| gpl-2.0 |
Advael/fjord-kernel | arch/s390/lib/uaccess_std.c | 232 | 8101 | /*
* Standard user space access functions based on mvcp/mvcs and doing
* interesting things in the secondary space mode.
*
* Copyright IBM Corp. 2006
* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
* Gerald Schaefer (gerald.schaefer@de.ibm.com)
*/
#include <linux/errno.h>
#include <linux/mm.h>
#include <linux/uaccess.h>
#include <asm/futex.h>
#include "uaccess.h"
#ifndef CONFIG_64BIT
#define AHI "ahi"
#define ALR "alr"
#define CLR "clr"
#define LHI "lhi"
#define SLR "slr"
#else
#define AHI "aghi"
#define ALR "algr"
#define CLR "clgr"
#define LHI "lghi"
#define SLR "slgr"
#endif
size_t copy_from_user_std(size_t size, const void __user *ptr, void *x)
{
unsigned long tmp1, tmp2;
tmp1 = -256UL;
asm volatile(
"0: mvcp 0(%0,%2),0(%1),%3\n"
"10:jz 8f\n"
"1:"ALR" %0,%3\n"
" la %1,256(%1)\n"
" la %2,256(%2)\n"
"2: mvcp 0(%0,%2),0(%1),%3\n"
"11:jnz 1b\n"
" j 8f\n"
"3: la %4,255(%1)\n" /* %4 = ptr + 255 */
" "LHI" %3,-4096\n"
" nr %4,%3\n" /* %4 = (ptr + 255) & -4096 */
" "SLR" %4,%1\n"
" "CLR" %0,%4\n" /* copy crosses next page boundary? */
" jnh 5f\n"
"4: mvcp 0(%4,%2),0(%1),%3\n"
"12:"SLR" %0,%4\n"
" "ALR" %2,%4\n"
"5:"LHI" %4,-1\n"
" "ALR" %4,%0\n" /* copy remaining size, subtract 1 */
" bras %3,7f\n" /* memset loop */
" xc 0(1,%2),0(%2)\n"
"6: xc 0(256,%2),0(%2)\n"
" la %2,256(%2)\n"
"7:"AHI" %4,-256\n"
" jnm 6b\n"
" ex %4,0(%3)\n"
" j 9f\n"
"8:"SLR" %0,%0\n"
"9: \n"
EX_TABLE(0b,3b) EX_TABLE(2b,3b) EX_TABLE(4b,5b)
EX_TABLE(10b,3b) EX_TABLE(11b,3b) EX_TABLE(12b,5b)
: "+a" (size), "+a" (ptr), "+a" (x), "+a" (tmp1), "=a" (tmp2)
: : "cc", "memory");
return size;
}
static size_t copy_from_user_std_check(size_t size, const void __user *ptr,
void *x)
{
if (size <= 1024)
return copy_from_user_std(size, ptr, x);
return copy_from_user_pt(size, ptr, x);
}
size_t copy_to_user_std(size_t size, void __user *ptr, const void *x)
{
unsigned long tmp1, tmp2;
tmp1 = -256UL;
asm volatile(
"0: mvcs 0(%0,%1),0(%2),%3\n"
"7: jz 5f\n"
"1:"ALR" %0,%3\n"
" la %1,256(%1)\n"
" la %2,256(%2)\n"
"2: mvcs 0(%0,%1),0(%2),%3\n"
"8: jnz 1b\n"
" j 5f\n"
"3: la %4,255(%1)\n" /* %4 = ptr + 255 */
" "LHI" %3,-4096\n"
" nr %4,%3\n" /* %4 = (ptr + 255) & -4096 */
" "SLR" %4,%1\n"
" "CLR" %0,%4\n" /* copy crosses next page boundary? */
" jnh 6f\n"
"4: mvcs 0(%4,%1),0(%2),%3\n"
"9:"SLR" %0,%4\n"
" j 6f\n"
"5:"SLR" %0,%0\n"
"6: \n"
EX_TABLE(0b,3b) EX_TABLE(2b,3b) EX_TABLE(4b,6b)
EX_TABLE(7b,3b) EX_TABLE(8b,3b) EX_TABLE(9b,6b)
: "+a" (size), "+a" (ptr), "+a" (x), "+a" (tmp1), "=a" (tmp2)
: : "cc", "memory");
return size;
}
static size_t copy_to_user_std_check(size_t size, void __user *ptr,
const void *x)
{
if (size <= 1024)
return copy_to_user_std(size, ptr, x);
return copy_to_user_pt(size, ptr, x);
}
static size_t copy_in_user_std(size_t size, void __user *to,
const void __user *from)
{
unsigned long tmp1;
asm volatile(
" sacf 256\n"
" "AHI" %0,-1\n"
" jo 5f\n"
" bras %3,3f\n"
"0:"AHI" %0,257\n"
"1: mvc 0(1,%1),0(%2)\n"
" la %1,1(%1)\n"
" la %2,1(%2)\n"
" "AHI" %0,-1\n"
" jnz 1b\n"
" j 5f\n"
"2: mvc 0(256,%1),0(%2)\n"
" la %1,256(%1)\n"
" la %2,256(%2)\n"
"3:"AHI" %0,-256\n"
" jnm 2b\n"
"4: ex %0,1b-0b(%3)\n"
"5: "SLR" %0,%0\n"
"6: sacf 0\n"
EX_TABLE(1b,6b) EX_TABLE(2b,0b) EX_TABLE(4b,0b)
: "+a" (size), "+a" (to), "+a" (from), "=a" (tmp1)
: : "cc", "memory");
return size;
}
static size_t clear_user_std(size_t size, void __user *to)
{
unsigned long tmp1, tmp2;
asm volatile(
" sacf 256\n"
" "AHI" %0,-1\n"
" jo 5f\n"
" bras %3,3f\n"
" xc 0(1,%1),0(%1)\n"
"0:"AHI" %0,257\n"
" la %2,255(%1)\n" /* %2 = ptr + 255 */
" srl %2,12\n"
" sll %2,12\n" /* %2 = (ptr + 255) & -4096 */
" "SLR" %2,%1\n"
" "CLR" %0,%2\n" /* clear crosses next page boundary? */
" jnh 5f\n"
" "AHI" %2,-1\n"
"1: ex %2,0(%3)\n"
" "AHI" %2,1\n"
" "SLR" %0,%2\n"
" j 5f\n"
"2: xc 0(256,%1),0(%1)\n"
" la %1,256(%1)\n"
"3:"AHI" %0,-256\n"
" jnm 2b\n"
"4: ex %0,0(%3)\n"
"5: "SLR" %0,%0\n"
"6: sacf 0\n"
EX_TABLE(1b,6b) EX_TABLE(2b,0b) EX_TABLE(4b,0b)
: "+a" (size), "+a" (to), "=a" (tmp1), "=a" (tmp2)
: : "cc", "memory");
return size;
}
size_t strnlen_user_std(size_t size, const char __user *src)
{
register unsigned long reg0 asm("0") = 0UL;
unsigned long tmp1, tmp2;
asm volatile(
" la %2,0(%1)\n"
" la %3,0(%0,%1)\n"
" "SLR" %0,%0\n"
" sacf 256\n"
"0: srst %3,%2\n"
" jo 0b\n"
" la %0,1(%3)\n" /* strnlen_user results includes \0 */
" "SLR" %0,%1\n"
"1: sacf 0\n"
EX_TABLE(0b,1b)
: "+a" (size), "+a" (src), "=a" (tmp1), "=a" (tmp2)
: "d" (reg0) : "cc", "memory");
return size;
}
size_t strncpy_from_user_std(size_t size, const char __user *src, char *dst)
{
register unsigned long reg0 asm("0") = 0UL;
unsigned long tmp1, tmp2;
asm volatile(
" la %3,0(%1)\n"
" la %4,0(%0,%1)\n"
" sacf 256\n"
"0: srst %4,%3\n"
" jo 0b\n"
" sacf 0\n"
" la %0,0(%4)\n"
" jh 1f\n" /* found \0 in string ? */
" "AHI" %4,1\n" /* include \0 in copy */
"1:"SLR" %0,%1\n" /* %0 = return length (without \0) */
" "SLR" %4,%1\n" /* %4 = copy length (including \0) */
"2: mvcp 0(%4,%2),0(%1),%5\n"
" jz 9f\n"
"3:"AHI" %4,-256\n"
" la %1,256(%1)\n"
" la %2,256(%2)\n"
"4: mvcp 0(%4,%2),0(%1),%5\n"
" jnz 3b\n"
" j 9f\n"
"7: sacf 0\n"
"8:"LHI" %0,%6\n"
"9:\n"
EX_TABLE(0b,7b) EX_TABLE(2b,8b) EX_TABLE(4b,8b)
: "+a" (size), "+a" (src), "+d" (dst), "=a" (tmp1), "=a" (tmp2)
: "d" (reg0), "K" (-EFAULT) : "cc", "memory");
return size;
}
#define __futex_atomic_op(insn, ret, oldval, newval, uaddr, oparg) \
asm volatile( \
" sacf 256\n" \
"0: l %1,0(%6)\n" \
"1:"insn \
"2: cs %1,%2,0(%6)\n" \
"3: jl 1b\n" \
" lhi %0,0\n" \
"4: sacf 0\n" \
EX_TABLE(0b,4b) EX_TABLE(2b,4b) EX_TABLE(3b,4b) \
: "=d" (ret), "=&d" (oldval), "=&d" (newval), \
"=m" (*uaddr) \
: "0" (-EFAULT), "d" (oparg), "a" (uaddr), \
"m" (*uaddr) : "cc");
int futex_atomic_op_std(int op, u32 __user *uaddr, int oparg, int *old)
{
int oldval = 0, newval, ret;
switch (op) {
case FUTEX_OP_SET:
__futex_atomic_op("lr %2,%5\n",
ret, oldval, newval, uaddr, oparg);
break;
case FUTEX_OP_ADD:
__futex_atomic_op("lr %2,%1\nar %2,%5\n",
ret, oldval, newval, uaddr, oparg);
break;
case FUTEX_OP_OR:
__futex_atomic_op("lr %2,%1\nor %2,%5\n",
ret, oldval, newval, uaddr, oparg);
break;
case FUTEX_OP_ANDN:
__futex_atomic_op("lr %2,%1\nnr %2,%5\n",
ret, oldval, newval, uaddr, oparg);
break;
case FUTEX_OP_XOR:
__futex_atomic_op("lr %2,%1\nxr %2,%5\n",
ret, oldval, newval, uaddr, oparg);
break;
default:
ret = -ENOSYS;
}
*old = oldval;
return ret;
}
int futex_atomic_cmpxchg_std(u32 *uval, u32 __user *uaddr,
u32 oldval, u32 newval)
{
int ret;
asm volatile(
" sacf 256\n"
"0: cs %1,%4,0(%5)\n"
"1: la %0,0\n"
"2: sacf 0\n"
EX_TABLE(0b,2b) EX_TABLE(1b,2b)
: "=d" (ret), "+d" (oldval), "=m" (*uaddr)
: "0" (-EFAULT), "d" (newval), "a" (uaddr), "m" (*uaddr)
: "cc", "memory" );
*uval = oldval;
return ret;
}
struct uaccess_ops uaccess_std = {
.copy_from_user = copy_from_user_std_check,
.copy_from_user_small = copy_from_user_std,
.copy_to_user = copy_to_user_std_check,
.copy_to_user_small = copy_to_user_std,
.copy_in_user = copy_in_user_std,
.clear_user = clear_user_std,
.strnlen_user = strnlen_user_std,
.strncpy_from_user = strncpy_from_user_std,
.futex_atomic_op = futex_atomic_op_std,
.futex_atomic_cmpxchg = futex_atomic_cmpxchg_std,
};
| gpl-2.0 |
blueskycoco/sq-linux | drivers/mtd/afs.c | 232 | 6407 | /*======================================================================
drivers/mtd/afs.c: ARM Flash Layout/Partitioning
Copyright © 2000 ARM Limited
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
This is access code for flashes using ARM's flash partitioning
standards.
======================================================================*/
#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
struct footer_struct {
u32 image_info_base; /* Address of first word of ImageFooter */
u32 image_start; /* Start of area reserved by this footer */
u32 signature; /* 'Magic' number proves it's a footer */
u32 type; /* Area type: ARM Image, SIB, customer */
u32 checksum; /* Just this structure */
};
struct image_info_struct {
u32 bootFlags; /* Boot flags, compression etc. */
u32 imageNumber; /* Unique number, selects for boot etc. */
u32 loadAddress; /* Address program should be loaded to */
u32 length; /* Actual size of image */
u32 address; /* Image is executed from here */
char name[16]; /* Null terminated */
u32 headerBase; /* Flash Address of any stripped header */
u32 header_length; /* Length of header in memory */
u32 headerType; /* AIF, RLF, s-record etc. */
u32 checksum; /* Image checksum (inc. this struct) */
};
static u32 word_sum(void *words, int num)
{
u32 *p = words;
u32 sum = 0;
while (num--)
sum += *p++;
return sum;
}
static int
afs_read_footer(struct mtd_info *mtd, u_int *img_start, u_int *iis_start,
u_int off, u_int mask)
{
struct footer_struct fs;
u_int ptr = off + mtd->erasesize - sizeof(fs);
size_t sz;
int ret;
ret = mtd->read(mtd, ptr, sizeof(fs), &sz, (u_char *) &fs);
if (ret >= 0 && sz != sizeof(fs))
ret = -EINVAL;
if (ret < 0) {
printk(KERN_ERR "AFS: mtd read failed at 0x%x: %d\n",
ptr, ret);
return ret;
}
ret = 1;
/*
* Does it contain the magic number?
*/
if (fs.signature != 0xa0ffff9f)
ret = 0;
/*
* Check the checksum.
*/
if (word_sum(&fs, sizeof(fs) / sizeof(u32)) != 0xffffffff)
ret = 0;
/*
* Don't touch the SIB.
*/
if (fs.type == 2)
ret = 0;
*iis_start = fs.image_info_base & mask;
*img_start = fs.image_start & mask;
/*
* Check the image info base. This can not
* be located after the footer structure.
*/
if (*iis_start >= ptr)
ret = 0;
/*
* Check the start of this image. The image
* data can not be located after this block.
*/
if (*img_start > off)
ret = 0;
return ret;
}
static int
afs_read_iis(struct mtd_info *mtd, struct image_info_struct *iis, u_int ptr)
{
size_t sz;
int ret, i;
memset(iis, 0, sizeof(*iis));
ret = mtd->read(mtd, ptr, sizeof(*iis), &sz, (u_char *) iis);
if (ret < 0)
goto failed;
if (sz != sizeof(*iis)) {
ret = -EINVAL;
goto failed;
}
ret = 0;
/*
* Validate the name - it must be NUL terminated.
*/
for (i = 0; i < sizeof(iis->name); i++)
if (iis->name[i] == '\0')
break;
if (i < sizeof(iis->name))
ret = 1;
return ret;
failed:
printk(KERN_ERR "AFS: mtd read failed at 0x%x: %d\n",
ptr, ret);
return ret;
}
static int parse_afs_partitions(struct mtd_info *mtd,
struct mtd_partition **pparts,
struct mtd_part_parser_data *data)
{
struct mtd_partition *parts;
u_int mask, off, idx, sz;
int ret = 0;
char *str;
/*
* This is the address mask; we use this to mask off out of
* range address bits.
*/
mask = mtd->size - 1;
/*
* First, calculate the size of the array we need for the
* partition information. We include in this the size of
* the strings.
*/
for (idx = off = sz = 0; off < mtd->size; off += mtd->erasesize) {
struct image_info_struct iis;
u_int iis_ptr, img_ptr;
ret = afs_read_footer(mtd, &img_ptr, &iis_ptr, off, mask);
if (ret < 0)
break;
if (ret == 0)
continue;
ret = afs_read_iis(mtd, &iis, iis_ptr);
if (ret < 0)
break;
if (ret == 0)
continue;
sz += sizeof(struct mtd_partition);
sz += strlen(iis.name) + 1;
idx += 1;
}
if (!sz)
return ret;
parts = kzalloc(sz, GFP_KERNEL);
if (!parts)
return -ENOMEM;
str = (char *)(parts + idx);
/*
* Identify the partitions
*/
for (idx = off = 0; off < mtd->size; off += mtd->erasesize) {
struct image_info_struct iis;
u_int iis_ptr, img_ptr;
/* Read the footer. */
ret = afs_read_footer(mtd, &img_ptr, &iis_ptr, off, mask);
if (ret < 0)
break;
if (ret == 0)
continue;
/* Read the image info block */
ret = afs_read_iis(mtd, &iis, iis_ptr);
if (ret < 0)
break;
if (ret == 0)
continue;
strcpy(str, iis.name);
parts[idx].name = str;
parts[idx].size = (iis.length + mtd->erasesize - 1) & ~(mtd->erasesize - 1);
parts[idx].offset = img_ptr;
parts[idx].mask_flags = 0;
printk(" mtd%d: at 0x%08x, %5lluKiB, %8u, %s\n",
idx, img_ptr, parts[idx].size / 1024,
iis.imageNumber, str);
idx += 1;
str = str + strlen(iis.name) + 1;
}
if (!idx) {
kfree(parts);
parts = NULL;
}
*pparts = parts;
return idx ? idx : ret;
}
static struct mtd_part_parser afs_parser = {
.owner = THIS_MODULE,
.parse_fn = parse_afs_partitions,
.name = "afs",
};
static int __init afs_parser_init(void)
{
return register_mtd_parser(&afs_parser);
}
static void __exit afs_parser_exit(void)
{
deregister_mtd_parser(&afs_parser);
}
module_init(afs_parser_init);
module_exit(afs_parser_exit);
MODULE_AUTHOR("ARM Ltd");
MODULE_DESCRIPTION("ARM Firmware Suite partition parser");
MODULE_LICENSE("GPL");
| gpl-2.0 |
cfriedt/bluetooth-next | drivers/staging/rtl8188eu/hal/Hal8188ERateAdaptive.c | 232 | 23717 | /*++
Copyright (c) Realtek Semiconductor Corp. All rights reserved.
Module Name:
RateAdaptive.c
Abstract:
Implement Rate Adaptive functions for common operations.
Major Change History:
When Who What
---------- --------------- -------------------------------
2011-08-12 Page Create.
--*/
#include "odm_precomp.h"
/* Rate adaptive parameters */
static u8 RETRY_PENALTY[PERENTRY][RETRYSIZE+1] = {
{5, 4, 3, 2, 0, 3}, /* 92 , idx = 0 */
{6, 5, 4, 3, 0, 4}, /* 86 , idx = 1 */
{6, 5, 4, 2, 0, 4}, /* 81 , idx = 2 */
{8, 7, 6, 4, 0, 6}, /* 75 , idx = 3 */
{10, 9, 8, 6, 0, 8}, /* 71 , idx = 4 */
{10, 9, 8, 4, 0, 8}, /* 66 , idx = 5 */
{10, 9, 8, 2, 0, 8}, /* 62 , idx = 6 */
{10, 9, 8, 0, 0, 8}, /* 59 , idx = 7 */
{18, 17, 16, 8, 0, 16}, /* 53 , idx = 8 */
{26, 25, 24, 16, 0, 24}, /* 50 , idx = 9 */
{34, 33, 32, 24, 0, 32}, /* 47 , idx = 0x0a */
{34, 31, 28, 20, 0, 32}, /* 43 , idx = 0x0b */
{34, 31, 27, 18, 0, 32}, /* 40 , idx = 0x0c */
{34, 31, 26, 16, 0, 32}, /* 37 , idx = 0x0d */
{34, 30, 22, 16, 0, 32}, /* 32 , idx = 0x0e */
{34, 30, 24, 16, 0, 32}, /* 26 , idx = 0x0f */
{49, 46, 40, 16, 0, 48}, /* 20 , idx = 0x10 */
{49, 45, 32, 0, 0, 48}, /* 17 , idx = 0x11 */
{49, 45, 22, 18, 0, 48}, /* 15 , idx = 0x12 */
{49, 40, 24, 16, 0, 48}, /* 12 , idx = 0x13 */
{49, 32, 18, 12, 0, 48}, /* 9 , idx = 0x14 */
{49, 22, 18, 14, 0, 48}, /* 6 , idx = 0x15 */
{49, 16, 16, 0, 0, 48}
}; /* 3, idx = 0x16 */
static u8 PT_PENALTY[RETRYSIZE+1] = {34, 31, 30, 24, 0, 32};
/* wilson modify */
static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {
{4, 4, 4, 5, 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */
4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d,
5, 5, 7, 7, 8, 0x0b, 0x0d, 0x0f}, /* 0329 R01 */
{0x0a, 0x0a, 0x0b, 0x0c, 0x0a,
0x0a, 0x0b, 0x0c, 0x0d, 0x10, 0x13, 0x14, /* SS<TH */
0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x11, 0x13, 0x15,
9, 9, 9, 9, 0x0c, 0x0e, 0x11, 0x13}
};
static u8 RETRY_PENALTY_UP_IDX[RATESIZE] = {
0x0c, 0x0d, 0x0d, 0x0f, 0x0d, 0x0e,
0x0f, 0x0f, 0x10, 0x12, 0x13, 0x14, /* SS>TH */
0x0f, 0x10, 0x10, 0x12, 0x12, 0x13, 0x14, 0x15,
0x11, 0x11, 0x12, 0x13, 0x13, 0x13, 0x14, 0x15};
static u8 RSSI_THRESHOLD[RATESIZE] = {
0, 0, 0, 0,
0, 0, 0, 0, 0, 0x24, 0x26, 0x2a,
0x18, 0x1a, 0x1d, 0x1f, 0x21, 0x27, 0x29, 0x2a,
0, 0, 0, 0x1f, 0x23, 0x28, 0x2a, 0x2c};
static u16 N_THRESHOLD_HIGH[RATESIZE] = {
4, 4, 8, 16,
24, 36, 48, 72, 96, 144, 192, 216,
60, 80, 100, 160, 240, 400, 560, 640,
300, 320, 480, 720, 1000, 1200, 1600, 2000};
static u16 N_THRESHOLD_LOW[RATESIZE] = {
2, 2, 4, 8,
12, 18, 24, 36, 48, 72, 96, 108,
30, 40, 50, 80, 120, 200, 280, 320,
150, 160, 240, 360, 500, 600, 800, 1000};
static u8 DROPING_NECESSARY[RATESIZE] = {
1, 1, 1, 1,
1, 2, 3, 4, 5, 6, 7, 8,
1, 2, 3, 4, 5, 6, 7, 8,
5, 6, 7, 8, 9, 10, 11, 12};
static u8 PendingForRateUpFail[5] = {2, 10, 24, 40, 60};
static u16 DynamicTxRPTTiming[6] = {
0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12, 0x927c}; /* 200ms-1200ms */
/* End Rate adaptive parameters */
static void odm_SetTxRPTTiming_8188E(
struct odm_dm_struct *dm_odm,
struct odm_ra_info *pRaInfo,
u8 extend
)
{
u8 idx = 0;
for (idx = 0; idx < 5; idx++)
if (DynamicTxRPTTiming[idx] == pRaInfo->RptTime)
break;
if (extend == 0) { /* back to default timing */
idx = 0; /* 200ms */
} else if (extend == 1) {/* increase the timing */
idx += 1;
if (idx > 5)
idx = 5;
} else if (extend == 2) {/* decrease the timing */
if (idx != 0)
idx -= 1;
}
pRaInfo->RptTime = DynamicTxRPTTiming[idx];
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("pRaInfo->RptTime = 0x%x\n", pRaInfo->RptTime));
}
static int odm_RateDown_8188E(struct odm_dm_struct *dm_odm,
struct odm_ra_info *pRaInfo)
{
u8 RateID, LowestRate, HighestRate;
u8 i;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE,
ODM_DBG_TRACE, ("=====>odm_RateDown_8188E()\n"));
if (!pRaInfo) {
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("odm_RateDown_8188E(): pRaInfo is NULL\n"));
return -1;
}
RateID = pRaInfo->PreRate;
LowestRate = pRaInfo->LowestRate;
HighestRate = pRaInfo->HighestRate;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" RateID =%d LowestRate =%d HighestRate =%d RateSGI =%d\n",
RateID, LowestRate, HighestRate, pRaInfo->RateSGI));
if (RateID > HighestRate) {
RateID = HighestRate;
} else if (pRaInfo->RateSGI) {
pRaInfo->RateSGI = 0;
} else if (RateID > LowestRate) {
if (RateID > 0) {
for (i = RateID-1; i > LowestRate; i--) {
if (pRaInfo->RAUseRate & BIT(i)) {
RateID = i;
goto RateDownFinish;
}
}
}
} else if (RateID <= LowestRate) {
RateID = LowestRate;
}
RateDownFinish:
if (pRaInfo->RAWaitingCounter == 1) {
pRaInfo->RAWaitingCounter += 1;
pRaInfo->RAPendingCounter += 1;
} else if (pRaInfo->RAWaitingCounter == 0) {
;
} else {
pRaInfo->RAWaitingCounter = 0;
pRaInfo->RAPendingCounter = 0;
}
if (pRaInfo->RAPendingCounter >= 4)
pRaInfo->RAPendingCounter = 4;
pRaInfo->DecisionRate = RateID;
odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 2);
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE,
ODM_DBG_LOUD, ("Rate down, RPT Timing default\n"));
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
("RAWaitingCounter %d, RAPendingCounter %d",
pRaInfo->RAWaitingCounter, pRaInfo->RAPendingCounter));
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("Rate down to RateID %d RateSGI %d\n", RateID, pRaInfo->RateSGI));
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
("<===== odm_RateDown_8188E()\n"));
return 0;
}
static int odm_RateUp_8188E(
struct odm_dm_struct *dm_odm,
struct odm_ra_info *pRaInfo
)
{
u8 RateID, HighestRate;
u8 i;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE,
ODM_DBG_TRACE, ("=====>odm_RateUp_8188E()\n"));
if (!pRaInfo) {
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("odm_RateUp_8188E(): pRaInfo is NULL\n"));
return -1;
}
RateID = pRaInfo->PreRate;
HighestRate = pRaInfo->HighestRate;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" RateID =%d HighestRate =%d\n",
RateID, HighestRate));
if (pRaInfo->RAWaitingCounter == 1) {
pRaInfo->RAWaitingCounter = 0;
pRaInfo->RAPendingCounter = 0;
} else if (pRaInfo->RAWaitingCounter > 1) {
pRaInfo->PreRssiStaRA = pRaInfo->RssiStaRA;
goto RateUpfinish;
}
odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 0);
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("odm_RateUp_8188E():Decrease RPT Timing\n"));
if (RateID < HighestRate) {
for (i = RateID+1; i <= HighestRate; i++) {
if (pRaInfo->RAUseRate & BIT(i)) {
RateID = i;
goto RateUpfinish;
}
}
} else if (RateID == HighestRate) {
if (pRaInfo->SGIEnable && (pRaInfo->RateSGI != 1))
pRaInfo->RateSGI = 1;
else if ((pRaInfo->SGIEnable) != 1)
pRaInfo->RateSGI = 0;
} else {
RateID = HighestRate;
}
RateUpfinish:
if (pRaInfo->RAWaitingCounter ==
(4+PendingForRateUpFail[pRaInfo->RAPendingCounter]))
pRaInfo->RAWaitingCounter = 0;
else
pRaInfo->RAWaitingCounter++;
pRaInfo->DecisionRate = RateID;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("Rate up to RateID %d\n", RateID));
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
("RAWaitingCounter %d, RAPendingCounter %d",
pRaInfo->RAWaitingCounter, pRaInfo->RAPendingCounter));
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE,
ODM_DBG_TRACE, ("<===== odm_RateUp_8188E()\n"));
return 0;
}
static void odm_ResetRaCounter_8188E(struct odm_ra_info *pRaInfo)
{
u8 RateID;
RateID = pRaInfo->DecisionRate;
pRaInfo->NscUp = (N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1;
pRaInfo->NscDown = (N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1;
}
static void odm_RateDecision_8188E(struct odm_dm_struct *dm_odm,
struct odm_ra_info *pRaInfo
)
{
u8 RateID = 0, RtyPtID = 0, PenaltyID1 = 0, PenaltyID2 = 0, i = 0;
/* u32 pool_retry; */
static u8 DynamicTxRPTTimingCounter;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
("=====>odm_RateDecision_8188E()\n"));
if (pRaInfo->Active && (pRaInfo->TOTAL > 0)) { /* STA used and data packet exits */
if ((pRaInfo->RssiStaRA < (pRaInfo->PreRssiStaRA - 3)) ||
(pRaInfo->RssiStaRA > (pRaInfo->PreRssiStaRA + 3))) {
pRaInfo->RAWaitingCounter = 0;
pRaInfo->RAPendingCounter = 0;
}
/* Start RA decision */
if (pRaInfo->PreRate > pRaInfo->HighestRate)
RateID = pRaInfo->HighestRate;
else
RateID = pRaInfo->PreRate;
if (pRaInfo->RssiStaRA > RSSI_THRESHOLD[RateID])
RtyPtID = 0;
else
RtyPtID = 1;
PenaltyID1 = RETRY_PENALTY_IDX[RtyPtID][RateID]; /* TODO by page */
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" NscDown init is %d\n", pRaInfo->NscDown));
for (i = 0 ; i <= 4 ; i++)
pRaInfo->NscDown += pRaInfo->RTY[i] * RETRY_PENALTY[PenaltyID1][i];
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" NscDown is %d, total*penalty[5] is %d\n", pRaInfo->NscDown,
(pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5])));
if (pRaInfo->NscDown > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5]))
pRaInfo->NscDown -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5];
else
pRaInfo->NscDown = 0;
/* rate up */
PenaltyID2 = RETRY_PENALTY_UP_IDX[RateID];
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" NscUp init is %d\n", pRaInfo->NscUp));
for (i = 0 ; i <= 4 ; i++)
pRaInfo->NscUp += pRaInfo->RTY[i] * RETRY_PENALTY[PenaltyID2][i];
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
("NscUp is %d, total*up[5] is %d\n",
pRaInfo->NscUp, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5])));
if (pRaInfo->NscUp > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5]))
pRaInfo->NscUp -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5];
else
pRaInfo->NscUp = 0;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE|ODM_COMP_INIT, ODM_DBG_LOUD,
(" RssiStaRa = %d RtyPtID =%d PenaltyID1 = 0x%x PenaltyID2 = 0x%x RateID =%d NscDown =%d NscUp =%d SGI =%d\n",
pRaInfo->RssiStaRA, RtyPtID, PenaltyID1, PenaltyID2, RateID, pRaInfo->NscDown, pRaInfo->NscUp, pRaInfo->RateSGI));
if ((pRaInfo->NscDown < N_THRESHOLD_LOW[RateID]) ||
(pRaInfo->DROP > DROPING_NECESSARY[RateID]))
odm_RateDown_8188E(dm_odm, pRaInfo);
else if (pRaInfo->NscUp > N_THRESHOLD_HIGH[RateID])
odm_RateUp_8188E(dm_odm, pRaInfo);
if (pRaInfo->DecisionRate > pRaInfo->HighestRate)
pRaInfo->DecisionRate = pRaInfo->HighestRate;
if ((pRaInfo->DecisionRate) == (pRaInfo->PreRate))
DynamicTxRPTTimingCounter += 1;
else
DynamicTxRPTTimingCounter = 0;
if (DynamicTxRPTTimingCounter >= 4) {
odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 1);
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE,
ODM_DBG_LOUD, ("<===== Rate don't change 4 times, Extend RPT Timing\n"));
DynamicTxRPTTimingCounter = 0;
}
pRaInfo->PreRate = pRaInfo->DecisionRate; /* YJ, add, 120120 */
odm_ResetRaCounter_8188E(pRaInfo);
}
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<===== odm_RateDecision_8188E()\n"));
}
static int odm_ARFBRefresh_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_info *pRaInfo)
{ /* Wilson 2011/10/26 */
struct adapter *adapt = dm_odm->Adapter;
u32 MaskFromReg;
s8 i;
switch (pRaInfo->RateID) {
case RATR_INX_WIRELESS_NGB:
pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff015;
break;
case RATR_INX_WIRELESS_NG:
pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff010;
break;
case RATR_INX_WIRELESS_NB:
pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff005;
break;
case RATR_INX_WIRELESS_N:
pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff000;
break;
case RATR_INX_WIRELESS_GB:
pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x00000ff5;
break;
case RATR_INX_WIRELESS_G:
pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x00000ff0;
break;
case RATR_INX_WIRELESS_B:
pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0000000d;
break;
case 12:
MaskFromReg = usb_read32(adapt, REG_ARFR0);
pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
break;
case 13:
MaskFromReg = usb_read32(adapt, REG_ARFR1);
pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
break;
case 14:
MaskFromReg = usb_read32(adapt, REG_ARFR2);
pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
break;
case 15:
MaskFromReg = usb_read32(adapt, REG_ARFR3);
pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
break;
default:
pRaInfo->RAUseRate = (pRaInfo->RateMask);
break;
}
/* Highest rate */
if (pRaInfo->RAUseRate) {
for (i = RATESIZE; i >= 0; i--) {
if ((pRaInfo->RAUseRate)&BIT(i)) {
pRaInfo->HighestRate = i;
break;
}
}
} else {
pRaInfo->HighestRate = 0;
}
/* Lowest rate */
if (pRaInfo->RAUseRate) {
for (i = 0; i < RATESIZE; i++) {
if ((pRaInfo->RAUseRate) & BIT(i)) {
pRaInfo->LowestRate = i;
break;
}
}
} else {
pRaInfo->LowestRate = 0;
}
if (pRaInfo->HighestRate > 0x13)
pRaInfo->PTModeSS = 3;
else if (pRaInfo->HighestRate > 0x0b)
pRaInfo->PTModeSS = 2;
else if (pRaInfo->HighestRate > 0x0b)
pRaInfo->PTModeSS = 1;
else
pRaInfo->PTModeSS = 0;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("ODM_ARFBRefresh_8188E(): PTModeSS =%d\n", pRaInfo->PTModeSS));
if (pRaInfo->DecisionRate > pRaInfo->HighestRate)
pRaInfo->DecisionRate = pRaInfo->HighestRate;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("ODM_ARFBRefresh_8188E(): RateID =%d RateMask =%8.8x RAUseRate =%8.8x HighestRate =%d, DecisionRate =%d\n",
pRaInfo->RateID, pRaInfo->RateMask, pRaInfo->RAUseRate, pRaInfo->HighestRate, pRaInfo->DecisionRate));
return 0;
}
static void odm_PTTryState_8188E(struct odm_ra_info *pRaInfo)
{
pRaInfo->PTTryState = 0;
switch (pRaInfo->PTModeSS) {
case 3:
if (pRaInfo->DecisionRate >= 0x19)
pRaInfo->PTTryState = 1;
break;
case 2:
if (pRaInfo->DecisionRate >= 0x11)
pRaInfo->PTTryState = 1;
break;
case 1:
if (pRaInfo->DecisionRate >= 0x0a)
pRaInfo->PTTryState = 1;
break;
case 0:
if (pRaInfo->DecisionRate >= 0x03)
pRaInfo->PTTryState = 1;
break;
default:
pRaInfo->PTTryState = 0;
break;
}
if (pRaInfo->RssiStaRA < 48) {
pRaInfo->PTStage = 0;
} else if (pRaInfo->PTTryState == 1) {
if ((pRaInfo->PTStopCount >= 10) ||
(pRaInfo->PTPreRssi > pRaInfo->RssiStaRA + 5) ||
(pRaInfo->PTPreRssi < pRaInfo->RssiStaRA - 5) ||
(pRaInfo->DecisionRate != pRaInfo->PTPreRate)) {
if (pRaInfo->PTStage == 0)
pRaInfo->PTStage = 1;
else if (pRaInfo->PTStage == 1)
pRaInfo->PTStage = 3;
else
pRaInfo->PTStage = 5;
pRaInfo->PTPreRssi = pRaInfo->RssiStaRA;
pRaInfo->PTStopCount = 0;
} else {
pRaInfo->RAstage = 0;
pRaInfo->PTStopCount++;
}
} else {
pRaInfo->PTStage = 0;
pRaInfo->RAstage = 0;
}
pRaInfo->PTPreRate = pRaInfo->DecisionRate;
}
static void odm_PTDecision_8188E(struct odm_ra_info *pRaInfo)
{
u8 j;
u8 temp_stage;
u32 numsc;
u32 num_total;
u8 stage_id;
numsc = 0;
num_total = pRaInfo->TOTAL * PT_PENALTY[5];
for (j = 0; j <= 4; j++) {
numsc += pRaInfo->RTY[j] * PT_PENALTY[j];
if (numsc > num_total)
break;
}
j >>= 1;
temp_stage = (pRaInfo->PTStage + 1) >> 1;
if (temp_stage > j)
stage_id = temp_stage-j;
else
stage_id = 0;
pRaInfo->PTSmoothFactor = (pRaInfo->PTSmoothFactor>>1) + (pRaInfo->PTSmoothFactor>>2) + stage_id*16+2;
if (pRaInfo->PTSmoothFactor > 192)
pRaInfo->PTSmoothFactor = 192;
stage_id = pRaInfo->PTSmoothFactor >> 6;
temp_stage = stage_id*2;
if (temp_stage != 0)
temp_stage -= 1;
if (pRaInfo->DROP > 3)
temp_stage = 0;
pRaInfo->PTStage = temp_stage;
}
static void
odm_RATxRPTTimerSetting(
struct odm_dm_struct *dm_odm,
u16 minRptTime
)
{
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, (" =====>odm_RATxRPTTimerSetting()\n"));
if (dm_odm->CurrminRptTime != minRptTime) {
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
(" CurrminRptTime = 0x%04x minRptTime = 0x%04x\n", dm_odm->CurrminRptTime, minRptTime));
rtw_rpt_timer_cfg_cmd(dm_odm->Adapter, minRptTime);
dm_odm->CurrminRptTime = minRptTime;
}
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, (" <===== odm_RATxRPTTimerSetting()\n"));
}
void
ODM_RASupport_Init(
struct odm_dm_struct *dm_odm
)
{
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>ODM_RASupport_Init()\n"));
dm_odm->RaSupport88E = true;
}
int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 macid)
{
struct odm_ra_info *pRaInfo = &dm_odm->RAInfo[macid];
u8 WirelessMode = 0xFF; /* invalid value */
u8 max_rate_idx = 0x13; /* MCS7 */
if (dm_odm->pWirelessMode != NULL)
WirelessMode = *(dm_odm->pWirelessMode);
if (WirelessMode != 0xFF) {
if (WirelessMode & ODM_WM_N24G)
max_rate_idx = 0x13;
else if (WirelessMode & ODM_WM_G)
max_rate_idx = 0x0b;
else if (WirelessMode & ODM_WM_B)
max_rate_idx = 0x03;
}
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("ODM_RAInfo_Init(): WirelessMode:0x%08x , max_raid_idx:0x%02x\n",
WirelessMode, max_rate_idx));
pRaInfo->DecisionRate = max_rate_idx;
pRaInfo->PreRate = max_rate_idx;
pRaInfo->HighestRate = max_rate_idx;
pRaInfo->LowestRate = 0;
pRaInfo->RateID = 0;
pRaInfo->RateMask = 0xffffffff;
pRaInfo->RssiStaRA = 0;
pRaInfo->PreRssiStaRA = 0;
pRaInfo->SGIEnable = 0;
pRaInfo->RAUseRate = 0xffffffff;
pRaInfo->NscDown = (N_THRESHOLD_HIGH[0x13]+N_THRESHOLD_LOW[0x13])/2;
pRaInfo->NscUp = (N_THRESHOLD_HIGH[0x13]+N_THRESHOLD_LOW[0x13])/2;
pRaInfo->RateSGI = 0;
pRaInfo->Active = 1; /* Active is not used at present. by page, 110819 */
pRaInfo->RptTime = 0x927c;
pRaInfo->DROP = 0;
pRaInfo->RTY[0] = 0;
pRaInfo->RTY[1] = 0;
pRaInfo->RTY[2] = 0;
pRaInfo->RTY[3] = 0;
pRaInfo->RTY[4] = 0;
pRaInfo->TOTAL = 0;
pRaInfo->RAWaitingCounter = 0;
pRaInfo->RAPendingCounter = 0;
pRaInfo->PTActive = 1; /* Active when this STA is use */
pRaInfo->PTTryState = 0;
pRaInfo->PTStage = 5; /* Need to fill into HW_PWR_STATUS */
pRaInfo->PTSmoothFactor = 192;
pRaInfo->PTStopCount = 0;
pRaInfo->PTPreRate = 0;
pRaInfo->PTPreRssi = 0;
pRaInfo->PTModeSS = 0;
pRaInfo->RAstage = 0;
return 0;
}
int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm)
{
u8 macid = 0;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>\n"));
dm_odm->CurrminRptTime = 0;
for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++)
ODM_RAInfo_Init(dm_odm, macid);
return 0;
}
u8 ODM_RA_GetShortGI_8188E(struct odm_dm_struct *dm_odm, u8 macid)
{
if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
return 0;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
("macid =%d SGI =%d\n", macid, dm_odm->RAInfo[macid].RateSGI));
return dm_odm->RAInfo[macid].RateSGI;
}
u8 ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u8 macid)
{
u8 DecisionRate = 0;
if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
return 0;
DecisionRate = dm_odm->RAInfo[macid].DecisionRate;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" macid =%d DecisionRate = 0x%x\n", macid, DecisionRate));
return DecisionRate;
}
u8 ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u8 macid)
{
u8 PTStage = 5;
if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
return 0;
PTStage = dm_odm->RAInfo[macid].PTStage;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
("macid =%d PTStage = 0x%x\n", macid, PTStage));
return PTStage;
}
void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 RateID, u32 RateMask, u8 SGIEnable)
{
struct odm_ra_info *pRaInfo = NULL;
if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
return;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("macid =%d RateID = 0x%x RateMask = 0x%x SGIEnable =%d\n",
macid, RateID, RateMask, SGIEnable));
pRaInfo = &(dm_odm->RAInfo[macid]);
pRaInfo->RateID = RateID;
pRaInfo->RateMask = RateMask;
pRaInfo->SGIEnable = SGIEnable;
odm_ARFBRefresh_8188E(dm_odm, pRaInfo);
}
void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rssi)
{
struct odm_ra_info *pRaInfo = NULL;
if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
return;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" macid =%d Rssi =%d\n", macid, Rssi));
pRaInfo = &(dm_odm->RAInfo[macid]);
pRaInfo->RssiStaRA = Rssi;
}
void ODM_RA_Set_TxRPT_Time(struct odm_dm_struct *dm_odm, u16 minRptTime)
{
struct adapter *adapt = dm_odm->Adapter;
usb_write16(adapt, REG_TX_RPT_TIME, minRptTime);
}
void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16 TxRPT_Len, u32 macid_entry0, u32 macid_entry1)
{
struct odm_ra_info *pRAInfo = NULL;
u8 MacId = 0;
u8 *pBuffer = NULL;
u32 valid = 0, ItemNum = 0;
u16 minRptTime = 0x927c;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("=====>ODM_RA_TxRPT2Handle_8188E(): valid0 =%d valid1 =%d BufferLength =%d\n",
macid_entry0, macid_entry1, TxRPT_Len));
ItemNum = TxRPT_Len >> 3;
pBuffer = TxRPT_Buf;
do {
if (MacId >= ASSOCIATE_ENTRY_NUM)
valid = 0;
else if (MacId >= 32)
valid = (1 << (MacId - 32)) & macid_entry1;
else
valid = (1 << MacId) & macid_entry0;
pRAInfo = &(dm_odm->RAInfo[MacId]);
if (valid) {
pRAInfo->RTY[0] = (u16)GET_TX_REPORT_TYPE1_RERTY_0(pBuffer);
pRAInfo->RTY[1] = (u16)GET_TX_REPORT_TYPE1_RERTY_1(pBuffer);
pRAInfo->RTY[2] = (u16)GET_TX_REPORT_TYPE1_RERTY_2(pBuffer);
pRAInfo->RTY[3] = (u16)GET_TX_REPORT_TYPE1_RERTY_3(pBuffer);
pRAInfo->RTY[4] = (u16)GET_TX_REPORT_TYPE1_RERTY_4(pBuffer);
pRAInfo->DROP = (u16)GET_TX_REPORT_TYPE1_DROP_0(pBuffer);
pRAInfo->TOTAL = pRAInfo->RTY[0] + pRAInfo->RTY[1] +
pRAInfo->RTY[2] + pRAInfo->RTY[3] +
pRAInfo->RTY[4] + pRAInfo->DROP;
if (pRAInfo->TOTAL != 0) {
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("macid =%d Total =%d R0 =%d R1 =%d R2 =%d R3 =%d R4 =%d D0 =%d valid0 =%x valid1 =%x\n",
MacId, pRAInfo->TOTAL,
pRAInfo->RTY[0], pRAInfo->RTY[1],
pRAInfo->RTY[2], pRAInfo->RTY[3],
pRAInfo->RTY[4], pRAInfo->DROP,
macid_entry0 , macid_entry1));
if (pRAInfo->PTActive) {
if (pRAInfo->RAstage < 5)
odm_RateDecision_8188E(dm_odm, pRAInfo);
else if (pRAInfo->RAstage == 5) /* Power training try state */
odm_PTTryState_8188E(pRAInfo);
else /* RAstage == 6 */
odm_PTDecision_8188E(pRAInfo);
/* Stage_RA counter */
if (pRAInfo->RAstage <= 5)
pRAInfo->RAstage++;
else
pRAInfo->RAstage = 0;
} else {
odm_RateDecision_8188E(dm_odm, pRAInfo);
}
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD,
("macid =%d R0 =%d R1 =%d R2 =%d R3 =%d R4 =%d drop =%d valid0 =%x RateID =%d SGI =%d\n",
MacId,
pRAInfo->RTY[0],
pRAInfo->RTY[1],
pRAInfo->RTY[2],
pRAInfo->RTY[3],
pRAInfo->RTY[4],
pRAInfo->DROP,
macid_entry0,
pRAInfo->DecisionRate,
pRAInfo->RateSGI));
} else {
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, (" TOTAL = 0!!!!\n"));
}
}
if (minRptTime > pRAInfo->RptTime)
minRptTime = pRAInfo->RptTime;
pBuffer += TX_RPT2_ITEM_SIZE;
MacId++;
} while (MacId < ItemNum);
odm_RATxRPTTimerSetting(dm_odm, minRptTime);
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("<===== ODM_RA_TxRPT2Handle_8188E()\n"));
}
| gpl-2.0 |
greg-pe/platform_kernel_omap | arch/sh/kernel/dwarf.c | 488 | 24621 | /*
* Copyright (C) 2009 Matt Fleming <matt@console-pimps.org>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* This is an implementation of a DWARF unwinder. Its main purpose is
* for generating stacktrace information. Based on the DWARF 3
* specification from http://www.dwarfstd.org.
*
* TODO:
* - DWARF64 doesn't work.
* - Registers with DWARF_VAL_OFFSET rules aren't handled properly.
*/
/* #define DEBUG */
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/list.h>
#include <linux/mempool.h>
#include <linux/mm.h>
#include <linux/ftrace.h>
#include <asm/dwarf.h>
#include <asm/unwinder.h>
#include <asm/sections.h>
#include <asm/unaligned.h>
#include <asm/stacktrace.h>
/* Reserve enough memory for two stack frames */
#define DWARF_FRAME_MIN_REQ 2
/* ... with 4 registers per frame. */
#define DWARF_REG_MIN_REQ (DWARF_FRAME_MIN_REQ * 4)
static struct kmem_cache *dwarf_frame_cachep;
static mempool_t *dwarf_frame_pool;
static struct kmem_cache *dwarf_reg_cachep;
static mempool_t *dwarf_reg_pool;
static LIST_HEAD(dwarf_cie_list);
static DEFINE_SPINLOCK(dwarf_cie_lock);
static LIST_HEAD(dwarf_fde_list);
static DEFINE_SPINLOCK(dwarf_fde_lock);
static struct dwarf_cie *cached_cie;
/**
* dwarf_frame_alloc_reg - allocate memory for a DWARF register
* @frame: the DWARF frame whose list of registers we insert on
* @reg_num: the register number
*
* Allocate space for, and initialise, a dwarf reg from
* dwarf_reg_pool and insert it onto the (unsorted) linked-list of
* dwarf registers for @frame.
*
* Return the initialised DWARF reg.
*/
static struct dwarf_reg *dwarf_frame_alloc_reg(struct dwarf_frame *frame,
unsigned int reg_num)
{
struct dwarf_reg *reg;
reg = mempool_alloc(dwarf_reg_pool, GFP_ATOMIC);
if (!reg) {
printk(KERN_WARNING "Unable to allocate a DWARF register\n");
/*
* Let's just bomb hard here, we have no way to
* gracefully recover.
*/
UNWINDER_BUG();
}
reg->number = reg_num;
reg->addr = 0;
reg->flags = 0;
list_add(®->link, &frame->reg_list);
return reg;
}
static void dwarf_frame_free_regs(struct dwarf_frame *frame)
{
struct dwarf_reg *reg, *n;
list_for_each_entry_safe(reg, n, &frame->reg_list, link) {
list_del(®->link);
mempool_free(reg, dwarf_reg_pool);
}
}
/**
* dwarf_frame_reg - return a DWARF register
* @frame: the DWARF frame to search in for @reg_num
* @reg_num: the register number to search for
*
* Lookup and return the dwarf reg @reg_num for this frame. Return
* NULL if @reg_num is an register invalid number.
*/
static struct dwarf_reg *dwarf_frame_reg(struct dwarf_frame *frame,
unsigned int reg_num)
{
struct dwarf_reg *reg;
list_for_each_entry(reg, &frame->reg_list, link) {
if (reg->number == reg_num)
return reg;
}
return NULL;
}
/**
* dwarf_read_addr - read dwarf data
* @src: source address of data
* @dst: destination address to store the data to
*
* Read 'n' bytes from @src, where 'n' is the size of an address on
* the native machine. We return the number of bytes read, which
* should always be 'n'. We also have to be careful when reading
* from @src and writing to @dst, because they can be arbitrarily
* aligned. Return 'n' - the number of bytes read.
*/
static inline int dwarf_read_addr(unsigned long *src, unsigned long *dst)
{
u32 val = get_unaligned(src);
put_unaligned(val, dst);
return sizeof(unsigned long *);
}
/**
* dwarf_read_uleb128 - read unsigned LEB128 data
* @addr: the address where the ULEB128 data is stored
* @ret: address to store the result
*
* Decode an unsigned LEB128 encoded datum. The algorithm is taken
* from Appendix C of the DWARF 3 spec. For information on the
* encodings refer to section "7.6 - Variable Length Data". Return
* the number of bytes read.
*/
static inline unsigned long dwarf_read_uleb128(char *addr, unsigned int *ret)
{
unsigned int result;
unsigned char byte;
int shift, count;
result = 0;
shift = 0;
count = 0;
while (1) {
byte = __raw_readb(addr);
addr++;
count++;
result |= (byte & 0x7f) << shift;
shift += 7;
if (!(byte & 0x80))
break;
}
*ret = result;
return count;
}
/**
* dwarf_read_leb128 - read signed LEB128 data
* @addr: the address of the LEB128 encoded data
* @ret: address to store the result
*
* Decode signed LEB128 data. The algorithm is taken from Appendix
* C of the DWARF 3 spec. Return the number of bytes read.
*/
static inline unsigned long dwarf_read_leb128(char *addr, int *ret)
{
unsigned char byte;
int result, shift;
int num_bits;
int count;
result = 0;
shift = 0;
count = 0;
while (1) {
byte = __raw_readb(addr);
addr++;
result |= (byte & 0x7f) << shift;
shift += 7;
count++;
if (!(byte & 0x80))
break;
}
/* The number of bits in a signed integer. */
num_bits = 8 * sizeof(result);
if ((shift < num_bits) && (byte & 0x40))
result |= (-1 << shift);
*ret = result;
return count;
}
/**
* dwarf_read_encoded_value - return the decoded value at @addr
* @addr: the address of the encoded value
* @val: where to write the decoded value
* @encoding: the encoding with which we can decode @addr
*
* GCC emits encoded address in the .eh_frame FDE entries. Decode
* the value at @addr using @encoding. The decoded value is written
* to @val and the number of bytes read is returned.
*/
static int dwarf_read_encoded_value(char *addr, unsigned long *val,
char encoding)
{
unsigned long decoded_addr = 0;
int count = 0;
switch (encoding & 0x70) {
case DW_EH_PE_absptr:
break;
case DW_EH_PE_pcrel:
decoded_addr = (unsigned long)addr;
break;
default:
pr_debug("encoding=0x%x\n", (encoding & 0x70));
UNWINDER_BUG();
}
if ((encoding & 0x07) == 0x00)
encoding |= DW_EH_PE_udata4;
switch (encoding & 0x0f) {
case DW_EH_PE_sdata4:
case DW_EH_PE_udata4:
count += 4;
decoded_addr += get_unaligned((u32 *)addr);
__raw_writel(decoded_addr, val);
break;
default:
pr_debug("encoding=0x%x\n", encoding);
UNWINDER_BUG();
}
return count;
}
/**
* dwarf_entry_len - return the length of an FDE or CIE
* @addr: the address of the entry
* @len: the length of the entry
*
* Read the initial_length field of the entry and store the size of
* the entry in @len. We return the number of bytes read. Return a
* count of 0 on error.
*/
static inline int dwarf_entry_len(char *addr, unsigned long *len)
{
u32 initial_len;
int count;
initial_len = get_unaligned((u32 *)addr);
count = 4;
/*
* An initial length field value in the range DW_LEN_EXT_LO -
* DW_LEN_EXT_HI indicates an extension, and should not be
* interpreted as a length. The only extension that we currently
* understand is the use of DWARF64 addresses.
*/
if (initial_len >= DW_EXT_LO && initial_len <= DW_EXT_HI) {
/*
* The 64-bit length field immediately follows the
* compulsory 32-bit length field.
*/
if (initial_len == DW_EXT_DWARF64) {
*len = get_unaligned((u64 *)addr + 4);
count = 12;
} else {
printk(KERN_WARNING "Unknown DWARF extension\n");
count = 0;
}
} else
*len = initial_len;
return count;
}
/**
* dwarf_lookup_cie - locate the cie
* @cie_ptr: pointer to help with lookup
*/
static struct dwarf_cie *dwarf_lookup_cie(unsigned long cie_ptr)
{
struct dwarf_cie *cie;
unsigned long flags;
spin_lock_irqsave(&dwarf_cie_lock, flags);
/*
* We've cached the last CIE we looked up because chances are
* that the FDE wants this CIE.
*/
if (cached_cie && cached_cie->cie_pointer == cie_ptr) {
cie = cached_cie;
goto out;
}
list_for_each_entry(cie, &dwarf_cie_list, link) {
if (cie->cie_pointer == cie_ptr) {
cached_cie = cie;
break;
}
}
/* Couldn't find the entry in the list. */
if (&cie->link == &dwarf_cie_list)
cie = NULL;
out:
spin_unlock_irqrestore(&dwarf_cie_lock, flags);
return cie;
}
/**
* dwarf_lookup_fde - locate the FDE that covers pc
* @pc: the program counter
*/
struct dwarf_fde *dwarf_lookup_fde(unsigned long pc)
{
struct dwarf_fde *fde;
unsigned long flags;
spin_lock_irqsave(&dwarf_fde_lock, flags);
list_for_each_entry(fde, &dwarf_fde_list, link) {
unsigned long start, end;
start = fde->initial_location;
end = fde->initial_location + fde->address_range;
if (pc >= start && pc < end)
break;
}
/* Couldn't find the entry in the list. */
if (&fde->link == &dwarf_fde_list)
fde = NULL;
spin_unlock_irqrestore(&dwarf_fde_lock, flags);
return fde;
}
/**
* dwarf_cfa_execute_insns - execute instructions to calculate a CFA
* @insn_start: address of the first instruction
* @insn_end: address of the last instruction
* @cie: the CIE for this function
* @fde: the FDE for this function
* @frame: the instructions calculate the CFA for this frame
* @pc: the program counter of the address we're interested in
*
* Execute the Call Frame instruction sequence starting at
* @insn_start and ending at @insn_end. The instructions describe
* how to calculate the Canonical Frame Address of a stackframe.
* Store the results in @frame.
*/
static int dwarf_cfa_execute_insns(unsigned char *insn_start,
unsigned char *insn_end,
struct dwarf_cie *cie,
struct dwarf_fde *fde,
struct dwarf_frame *frame,
unsigned long pc)
{
unsigned char insn;
unsigned char *current_insn;
unsigned int count, delta, reg, expr_len, offset;
struct dwarf_reg *regp;
current_insn = insn_start;
while (current_insn < insn_end && frame->pc <= pc) {
insn = __raw_readb(current_insn++);
/*
* Firstly, handle the opcodes that embed their operands
* in the instructions.
*/
switch (DW_CFA_opcode(insn)) {
case DW_CFA_advance_loc:
delta = DW_CFA_operand(insn);
delta *= cie->code_alignment_factor;
frame->pc += delta;
continue;
/* NOTREACHED */
case DW_CFA_offset:
reg = DW_CFA_operand(insn);
count = dwarf_read_uleb128(current_insn, &offset);
current_insn += count;
offset *= cie->data_alignment_factor;
regp = dwarf_frame_alloc_reg(frame, reg);
regp->addr = offset;
regp->flags |= DWARF_REG_OFFSET;
continue;
/* NOTREACHED */
case DW_CFA_restore:
reg = DW_CFA_operand(insn);
continue;
/* NOTREACHED */
}
/*
* Secondly, handle the opcodes that don't embed their
* operands in the instruction.
*/
switch (insn) {
case DW_CFA_nop:
continue;
case DW_CFA_advance_loc1:
delta = *current_insn++;
frame->pc += delta * cie->code_alignment_factor;
break;
case DW_CFA_advance_loc2:
delta = get_unaligned((u16 *)current_insn);
current_insn += 2;
frame->pc += delta * cie->code_alignment_factor;
break;
case DW_CFA_advance_loc4:
delta = get_unaligned((u32 *)current_insn);
current_insn += 4;
frame->pc += delta * cie->code_alignment_factor;
break;
case DW_CFA_offset_extended:
count = dwarf_read_uleb128(current_insn, ®);
current_insn += count;
count = dwarf_read_uleb128(current_insn, &offset);
current_insn += count;
offset *= cie->data_alignment_factor;
break;
case DW_CFA_restore_extended:
count = dwarf_read_uleb128(current_insn, ®);
current_insn += count;
break;
case DW_CFA_undefined:
count = dwarf_read_uleb128(current_insn, ®);
current_insn += count;
regp = dwarf_frame_alloc_reg(frame, reg);
regp->flags |= DWARF_UNDEFINED;
break;
case DW_CFA_def_cfa:
count = dwarf_read_uleb128(current_insn,
&frame->cfa_register);
current_insn += count;
count = dwarf_read_uleb128(current_insn,
&frame->cfa_offset);
current_insn += count;
frame->flags |= DWARF_FRAME_CFA_REG_OFFSET;
break;
case DW_CFA_def_cfa_register:
count = dwarf_read_uleb128(current_insn,
&frame->cfa_register);
current_insn += count;
frame->flags |= DWARF_FRAME_CFA_REG_OFFSET;
break;
case DW_CFA_def_cfa_offset:
count = dwarf_read_uleb128(current_insn, &offset);
current_insn += count;
frame->cfa_offset = offset;
break;
case DW_CFA_def_cfa_expression:
count = dwarf_read_uleb128(current_insn, &expr_len);
current_insn += count;
frame->cfa_expr = current_insn;
frame->cfa_expr_len = expr_len;
current_insn += expr_len;
frame->flags |= DWARF_FRAME_CFA_REG_EXP;
break;
case DW_CFA_offset_extended_sf:
count = dwarf_read_uleb128(current_insn, ®);
current_insn += count;
count = dwarf_read_leb128(current_insn, &offset);
current_insn += count;
offset *= cie->data_alignment_factor;
regp = dwarf_frame_alloc_reg(frame, reg);
regp->flags |= DWARF_REG_OFFSET;
regp->addr = offset;
break;
case DW_CFA_val_offset:
count = dwarf_read_uleb128(current_insn, ®);
current_insn += count;
count = dwarf_read_leb128(current_insn, &offset);
offset *= cie->data_alignment_factor;
regp = dwarf_frame_alloc_reg(frame, reg);
regp->flags |= DWARF_VAL_OFFSET;
regp->addr = offset;
break;
case DW_CFA_GNU_args_size:
count = dwarf_read_uleb128(current_insn, &offset);
current_insn += count;
break;
case DW_CFA_GNU_negative_offset_extended:
count = dwarf_read_uleb128(current_insn, ®);
current_insn += count;
count = dwarf_read_uleb128(current_insn, &offset);
offset *= cie->data_alignment_factor;
regp = dwarf_frame_alloc_reg(frame, reg);
regp->flags |= DWARF_REG_OFFSET;
regp->addr = -offset;
break;
default:
pr_debug("unhandled DWARF instruction 0x%x\n", insn);
UNWINDER_BUG();
break;
}
}
return 0;
}
/**
* dwarf_unwind_stack - recursively unwind the stack
* @pc: address of the function to unwind
* @prev: struct dwarf_frame of the previous stackframe on the callstack
*
* Return a struct dwarf_frame representing the most recent frame
* on the callstack. Each of the lower (older) stack frames are
* linked via the "prev" member.
*/
struct dwarf_frame * dwarf_unwind_stack(unsigned long pc,
struct dwarf_frame *prev)
{
struct dwarf_frame *frame;
struct dwarf_cie *cie;
struct dwarf_fde *fde;
struct dwarf_reg *reg;
unsigned long addr;
/*
* If this is the first invocation of this recursive function we
* need get the contents of a physical register to get the CFA
* in order to begin the virtual unwinding of the stack.
*
* NOTE: the return address is guaranteed to be setup by the
* time this function makes its first function call.
*/
if (!pc || !prev)
pc = (unsigned long)current_text_addr();
#ifdef CONFIG_FUNCTION_GRAPH_TRACER
/*
* If our stack has been patched by the function graph tracer
* then we might see the address of return_to_handler() where we
* expected to find the real return address.
*/
if (pc == (unsigned long)&return_to_handler) {
int index = current->curr_ret_stack;
/*
* We currently have no way of tracking how many
* return_to_handler()'s we've seen. If there is more
* than one patched return address on our stack,
* complain loudly.
*/
WARN_ON(index > 0);
pc = current->ret_stack[index].ret;
}
#endif
frame = mempool_alloc(dwarf_frame_pool, GFP_ATOMIC);
if (!frame) {
printk(KERN_ERR "Unable to allocate a dwarf frame\n");
UNWINDER_BUG();
}
INIT_LIST_HEAD(&frame->reg_list);
frame->flags = 0;
frame->prev = prev;
frame->return_addr = 0;
fde = dwarf_lookup_fde(pc);
if (!fde) {
/*
* This is our normal exit path - the one that stops the
* recursion. There's two reasons why we might exit
* here,
*
* a) pc has no asscociated DWARF frame info and so
* we don't know how to unwind this frame. This is
* usually the case when we're trying to unwind a
* frame that was called from some assembly code
* that has no DWARF info, e.g. syscalls.
*
* b) the DEBUG info for pc is bogus. There's
* really no way to distinguish this case from the
* case above, which sucks because we could print a
* warning here.
*/
goto bail;
}
cie = dwarf_lookup_cie(fde->cie_pointer);
frame->pc = fde->initial_location;
/* CIE initial instructions */
dwarf_cfa_execute_insns(cie->initial_instructions,
cie->instructions_end, cie, fde,
frame, pc);
/* FDE instructions */
dwarf_cfa_execute_insns(fde->instructions, fde->end, cie,
fde, frame, pc);
/* Calculate the CFA */
switch (frame->flags) {
case DWARF_FRAME_CFA_REG_OFFSET:
if (prev) {
reg = dwarf_frame_reg(prev, frame->cfa_register);
UNWINDER_BUG_ON(!reg);
UNWINDER_BUG_ON(reg->flags != DWARF_REG_OFFSET);
addr = prev->cfa + reg->addr;
frame->cfa = __raw_readl(addr);
} else {
/*
* Again, this is the first invocation of this
* recurisve function. We need to physically
* read the contents of a register in order to
* get the Canonical Frame Address for this
* function.
*/
frame->cfa = dwarf_read_arch_reg(frame->cfa_register);
}
frame->cfa += frame->cfa_offset;
break;
default:
UNWINDER_BUG();
}
reg = dwarf_frame_reg(frame, DWARF_ARCH_RA_REG);
/*
* If we haven't seen the return address register or the return
* address column is undefined then we must assume that this is
* the end of the callstack.
*/
if (!reg || reg->flags == DWARF_UNDEFINED)
goto bail;
UNWINDER_BUG_ON(reg->flags != DWARF_REG_OFFSET);
addr = frame->cfa + reg->addr;
frame->return_addr = __raw_readl(addr);
return frame;
bail:
dwarf_frame_free_regs(frame);
mempool_free(frame, dwarf_frame_pool);
return NULL;
}
static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
unsigned char *end)
{
struct dwarf_cie *cie;
unsigned long flags;
int count;
cie = kzalloc(sizeof(*cie), GFP_KERNEL);
if (!cie)
return -ENOMEM;
cie->length = len;
/*
* Record the offset into the .eh_frame section
* for this CIE. It allows this CIE to be
* quickly and easily looked up from the
* corresponding FDE.
*/
cie->cie_pointer = (unsigned long)entry;
cie->version = *(char *)p++;
UNWINDER_BUG_ON(cie->version != 1);
cie->augmentation = p;
p += strlen(cie->augmentation) + 1;
count = dwarf_read_uleb128(p, &cie->code_alignment_factor);
p += count;
count = dwarf_read_leb128(p, &cie->data_alignment_factor);
p += count;
/*
* Which column in the rule table contains the
* return address?
*/
if (cie->version == 1) {
cie->return_address_reg = __raw_readb(p);
p++;
} else {
count = dwarf_read_uleb128(p, &cie->return_address_reg);
p += count;
}
if (cie->augmentation[0] == 'z') {
unsigned int length, count;
cie->flags |= DWARF_CIE_Z_AUGMENTATION;
count = dwarf_read_uleb128(p, &length);
p += count;
UNWINDER_BUG_ON((unsigned char *)p > end);
cie->initial_instructions = p + length;
cie->augmentation++;
}
while (*cie->augmentation) {
/*
* "L" indicates a byte showing how the
* LSDA pointer is encoded. Skip it.
*/
if (*cie->augmentation == 'L') {
p++;
cie->augmentation++;
} else if (*cie->augmentation == 'R') {
/*
* "R" indicates a byte showing
* how FDE addresses are
* encoded.
*/
cie->encoding = *(char *)p++;
cie->augmentation++;
} else if (*cie->augmentation == 'P') {
/*
* "R" indicates a personality
* routine in the CIE
* augmentation.
*/
UNWINDER_BUG();
} else if (*cie->augmentation == 'S') {
UNWINDER_BUG();
} else {
/*
* Unknown augmentation. Assume
* 'z' augmentation.
*/
p = cie->initial_instructions;
UNWINDER_BUG_ON(!p);
break;
}
}
cie->initial_instructions = p;
cie->instructions_end = end;
/* Add to list */
spin_lock_irqsave(&dwarf_cie_lock, flags);
list_add_tail(&cie->link, &dwarf_cie_list);
spin_unlock_irqrestore(&dwarf_cie_lock, flags);
return 0;
}
static int dwarf_parse_fde(void *entry, u32 entry_type,
void *start, unsigned long len,
unsigned char *end)
{
struct dwarf_fde *fde;
struct dwarf_cie *cie;
unsigned long flags;
int count;
void *p = start;
fde = kzalloc(sizeof(*fde), GFP_KERNEL);
if (!fde)
return -ENOMEM;
fde->length = len;
/*
* In a .eh_frame section the CIE pointer is the
* delta between the address within the FDE
*/
fde->cie_pointer = (unsigned long)(p - entry_type - 4);
cie = dwarf_lookup_cie(fde->cie_pointer);
fde->cie = cie;
if (cie->encoding)
count = dwarf_read_encoded_value(p, &fde->initial_location,
cie->encoding);
else
count = dwarf_read_addr(p, &fde->initial_location);
p += count;
if (cie->encoding)
count = dwarf_read_encoded_value(p, &fde->address_range,
cie->encoding & 0x0f);
else
count = dwarf_read_addr(p, &fde->address_range);
p += count;
if (fde->cie->flags & DWARF_CIE_Z_AUGMENTATION) {
unsigned int length;
count = dwarf_read_uleb128(p, &length);
p += count + length;
}
/* Call frame instructions. */
fde->instructions = p;
fde->end = end;
/* Add to list. */
spin_lock_irqsave(&dwarf_fde_lock, flags);
list_add_tail(&fde->link, &dwarf_fde_list);
spin_unlock_irqrestore(&dwarf_fde_lock, flags);
return 0;
}
static void dwarf_unwinder_dump(struct task_struct *task,
struct pt_regs *regs,
unsigned long *sp,
const struct stacktrace_ops *ops,
void *data)
{
struct dwarf_frame *frame, *_frame;
unsigned long return_addr;
_frame = NULL;
return_addr = 0;
while (1) {
frame = dwarf_unwind_stack(return_addr, _frame);
if (_frame) {
dwarf_frame_free_regs(_frame);
mempool_free(_frame, dwarf_frame_pool);
}
_frame = frame;
if (!frame || !frame->return_addr)
break;
return_addr = frame->return_addr;
ops->address(data, return_addr, 1);
}
}
static struct unwinder dwarf_unwinder = {
.name = "dwarf-unwinder",
.dump = dwarf_unwinder_dump,
.rating = 150,
};
static void dwarf_unwinder_cleanup(void)
{
struct dwarf_cie *cie;
struct dwarf_fde *fde;
/*
* Deallocate all the memory allocated for the DWARF unwinder.
* Traverse all the FDE/CIE lists and remove and free all the
* memory associated with those data structures.
*/
list_for_each_entry(cie, &dwarf_cie_list, link)
kfree(cie);
list_for_each_entry(fde, &dwarf_fde_list, link)
kfree(fde);
kmem_cache_destroy(dwarf_reg_cachep);
kmem_cache_destroy(dwarf_frame_cachep);
}
/**
* dwarf_unwinder_init - initialise the dwarf unwinder
*
* Build the data structures describing the .dwarf_frame section to
* make it easier to lookup CIE and FDE entries. Because the
* .eh_frame section is packed as tightly as possible it is not
* easy to lookup the FDE for a given PC, so we build a list of FDE
* and CIE entries that make it easier.
*/
static int __init dwarf_unwinder_init(void)
{
u32 entry_type;
void *p, *entry;
int count, err = 0;
unsigned long len;
unsigned int c_entries, f_entries;
unsigned char *end;
INIT_LIST_HEAD(&dwarf_cie_list);
INIT_LIST_HEAD(&dwarf_fde_list);
c_entries = 0;
f_entries = 0;
entry = &__start_eh_frame;
dwarf_frame_cachep = kmem_cache_create("dwarf_frames",
sizeof(struct dwarf_frame), 0,
SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
dwarf_reg_cachep = kmem_cache_create("dwarf_regs",
sizeof(struct dwarf_reg), 0,
SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
dwarf_frame_pool = mempool_create(DWARF_FRAME_MIN_REQ,
mempool_alloc_slab,
mempool_free_slab,
dwarf_frame_cachep);
dwarf_reg_pool = mempool_create(DWARF_REG_MIN_REQ,
mempool_alloc_slab,
mempool_free_slab,
dwarf_reg_cachep);
while ((char *)entry < __stop_eh_frame) {
p = entry;
count = dwarf_entry_len(p, &len);
if (count == 0) {
/*
* We read a bogus length field value. There is
* nothing we can do here apart from disabling
* the DWARF unwinder. We can't even skip this
* entry and move to the next one because 'len'
* tells us where our next entry is.
*/
goto out;
} else
p += count;
/* initial length does not include itself */
end = p + len;
entry_type = get_unaligned((u32 *)p);
p += 4;
if (entry_type == DW_EH_FRAME_CIE) {
err = dwarf_parse_cie(entry, p, len, end);
if (err < 0)
goto out;
else
c_entries++;
} else {
err = dwarf_parse_fde(entry, entry_type, p, len, end);
if (err < 0)
goto out;
else
f_entries++;
}
entry = (char *)entry + len + 4;
}
printk(KERN_INFO "DWARF unwinder initialised: read %u CIEs, %u FDEs\n",
c_entries, f_entries);
err = unwinder_register(&dwarf_unwinder);
if (err)
goto out;
return 0;
out:
printk(KERN_ERR "Failed to initialise DWARF unwinder: %d\n", err);
dwarf_unwinder_cleanup();
return -EINVAL;
}
early_initcall(dwarf_unwinder_init);
| gpl-2.0 |
hunter3k/android_kernel_lge_d315 | arch/arm/mach-msm/board-8610.c | 744 | 3934 | /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/err.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/of_fdt.h>
#include <linux/of_irq.h>
#include <linux/memory.h>
#include <linux/msm_tsens.h>
#include <asm/mach/map.h>
#include <asm/arch_timer.h>
#include <asm/hardware/gic.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <mach/board.h>
#include <mach/gpiomux.h>
#include <mach/msm_iomap.h>
#include <mach/restart.h>
#ifdef CONFIG_ION_MSM
#include <mach/ion.h>
#endif
#include <linux/regulator/qpnp-regulator.h>
#include <mach/msm_memtypes.h>
#include <mach/socinfo.h>
#include <mach/board.h>
#include <mach/clk-provider.h>
#include <mach/msm_smd.h>
#include <mach/rpm-smd.h>
#include <mach/rpm-regulator-smd.h>
#include <mach/msm_smem.h>
#include <linux/msm_thermal.h>
#include "board-dt.h"
#include "clock.h"
#include "platsmp.h"
#include "spm.h"
#include "pm.h"
#include "modem_notifier.h"
static struct memtype_reserve msm8610_reserve_table[] __initdata = {
[MEMTYPE_SMI] = {
},
[MEMTYPE_EBI0] = {
.flags = MEMTYPE_FLAGS_1M_ALIGN,
},
[MEMTYPE_EBI1] = {
.flags = MEMTYPE_FLAGS_1M_ALIGN,
},
};
static int msm8610_paddr_to_memtype(unsigned int paddr)
{
return MEMTYPE_EBI1;
}
static struct of_dev_auxdata msm8610_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF9824000, \
"msm_sdcc.1", NULL),
OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF98A4000, \
"msm_sdcc.2", NULL),
OF_DEV_AUXDATA("qcom,sdhci-msm", 0xF9824900, \
"msm_sdcc.1", NULL),
OF_DEV_AUXDATA("qcom,sdhci-msm", 0xF98A4900, \
"msm_sdcc.2", NULL),
{}
};
static struct reserve_info msm8610_reserve_info __initdata = {
.memtype_reserve_table = msm8610_reserve_table,
.paddr_to_memtype = msm8610_paddr_to_memtype,
};
static void __init msm8610_early_memory(void)
{
reserve_info = &msm8610_reserve_info;
of_scan_flat_dt(dt_scan_for_memory_hole, msm8610_reserve_table);
}
static void __init msm8610_reserve(void)
{
reserve_info = &msm8610_reserve_info;
of_scan_flat_dt(dt_scan_for_memory_reserve, msm8610_reserve_table);
msm_reserve();
}
void __init msm8610_add_drivers(void)
{
msm_smem_init();
msm_init_modem_notifier_list();
msm_smd_init();
msm_rpm_driver_init();
msm_spm_device_init();
msm_pm_sleep_status_init();
rpm_regulator_smd_driver_init();
qpnp_regulator_init();
tsens_tm_init_driver();
msm_thermal_device_init();
if (of_board_is_rumi())
msm_clock_init(&msm8610_rumi_clock_init_data);
else
msm_clock_init(&msm8610_clock_init_data);
}
void __init msm8610_init(void)
{
struct of_dev_auxdata *adata = msm8610_auxdata_lookup;
if (socinfo_init() < 0)
pr_err("%s: socinfo_init() failed\n", __func__);
msm8610_init_gpiomux();
board_dt_populate(adata);
msm8610_add_drivers();
}
static const char *msm8610_dt_match[] __initconst = {
"qcom,msm8610",
NULL
};
DT_MACHINE_START(MSM8610_DT, "Qualcomm MSM 8610 (Flattened Device Tree)")
.map_io = msm_map_msm8610_io,
.init_irq = msm_dt_init_irq,
.init_machine = msm8610_init,
.handle_irq = gic_handle_irq,
.timer = &msm_dt_timer,
.dt_compat = msm8610_dt_match,
.restart = msm_restart,
.reserve = msm8610_reserve,
.init_very_early = msm8610_early_memory,
.smp = &arm_smp_ops,
MACHINE_END
| gpl-2.0 |
droidzone/bravo_2.6.35_gb-mr | drivers/net/wireless/ath/ath5k/initvals.c | 1000 | 53594 | /*
* Initial register settings functions
*
* Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org>
* Copyright (c) 2006-2009 Nick Kossifidis <mickflemm@gmail.com>
* Copyright (c) 2007-2008 Jiri Slaby <jirislaby@gmail.com>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "ath5k.h"
#include "reg.h"
#include "debug.h"
#include "base.h"
/*
* Mode-independent initial register writes
*/
struct ath5k_ini {
u16 ini_register;
u32 ini_value;
enum {
AR5K_INI_WRITE = 0, /* Default */
AR5K_INI_READ = 1, /* Cleared on read */
} ini_mode;
};
/*
* Mode specific initial register values
*/
struct ath5k_ini_mode {
u16 mode_register;
u32 mode_value[5];
};
/* Initial register settings for AR5210 */
static const struct ath5k_ini ar5210_ini[] = {
/* PCU and MAC registers */
{ AR5K_NOQCU_TXDP0, 0 },
{ AR5K_NOQCU_TXDP1, 0 },
{ AR5K_RXDP, 0 },
{ AR5K_CR, 0 },
{ AR5K_ISR, 0, AR5K_INI_READ },
{ AR5K_IMR, 0 },
{ AR5K_IER, AR5K_IER_DISABLE },
{ AR5K_BSR, 0, AR5K_INI_READ },
{ AR5K_TXCFG, AR5K_DMASIZE_128B },
{ AR5K_RXCFG, AR5K_DMASIZE_128B },
{ AR5K_CFG, AR5K_INIT_CFG },
{ AR5K_TOPS, 8 },
{ AR5K_RXNOFRM, 8 },
{ AR5K_RPGTO, 0 },
{ AR5K_TXNOFRM, 0 },
{ AR5K_SFR, 0 },
{ AR5K_MIBC, 0 },
{ AR5K_MISC, 0 },
{ AR5K_RX_FILTER_5210, 0 },
{ AR5K_MCAST_FILTER0_5210, 0 },
{ AR5K_MCAST_FILTER1_5210, 0 },
{ AR5K_TX_MASK0, 0 },
{ AR5K_TX_MASK1, 0 },
{ AR5K_CLR_TMASK, 0 },
{ AR5K_TRIG_LVL, AR5K_TUNE_MIN_TX_FIFO_THRES },
{ AR5K_DIAG_SW_5210, 0 },
{ AR5K_RSSI_THR, AR5K_TUNE_RSSI_THRES },
{ AR5K_TSF_L32_5210, 0 },
{ AR5K_TIMER0_5210, 0 },
{ AR5K_TIMER1_5210, 0xffffffff },
{ AR5K_TIMER2_5210, 0xffffffff },
{ AR5K_TIMER3_5210, 1 },
{ AR5K_CFP_DUR_5210, 0 },
{ AR5K_CFP_PERIOD_5210, 0 },
/* PHY registers */
{ AR5K_PHY(0), 0x00000047 },
{ AR5K_PHY_AGC, 0x00000000 },
{ AR5K_PHY(3), 0x09848ea6 },
{ AR5K_PHY(4), 0x3d32e000 },
{ AR5K_PHY(5), 0x0000076b },
{ AR5K_PHY_ACT, AR5K_PHY_ACT_DISABLE },
{ AR5K_PHY(8), 0x02020200 },
{ AR5K_PHY(9), 0x00000e0e },
{ AR5K_PHY(10), 0x0a020201 },
{ AR5K_PHY(11), 0x00036ffc },
{ AR5K_PHY(12), 0x00000000 },
{ AR5K_PHY(13), 0x00000e0e },
{ AR5K_PHY(14), 0x00000007 },
{ AR5K_PHY(15), 0x00020100 },
{ AR5K_PHY(16), 0x89630000 },
{ AR5K_PHY(17), 0x1372169c },
{ AR5K_PHY(18), 0x0018b633 },
{ AR5K_PHY(19), 0x1284613c },
{ AR5K_PHY(20), 0x0de8b8e0 },
{ AR5K_PHY(21), 0x00074859 },
{ AR5K_PHY(22), 0x7e80beba },
{ AR5K_PHY(23), 0x313a665e },
{ AR5K_PHY_AGCCTL, 0x00001d08 },
{ AR5K_PHY(25), 0x0001ce00 },
{ AR5K_PHY(26), 0x409a4190 },
{ AR5K_PHY(28), 0x0000000f },
{ AR5K_PHY(29), 0x00000080 },
{ AR5K_PHY(30), 0x00000004 },
{ AR5K_PHY(31), 0x00000018 }, /* 0x987c */
{ AR5K_PHY(64), 0x00000000 }, /* 0x9900 */
{ AR5K_PHY(65), 0x00000000 },
{ AR5K_PHY(66), 0x00000000 },
{ AR5K_PHY(67), 0x00800000 },
{ AR5K_PHY(68), 0x00000003 },
/* BB gain table (64bytes) */
{ AR5K_BB_GAIN(0), 0x00000000 },
{ AR5K_BB_GAIN(1), 0x00000020 },
{ AR5K_BB_GAIN(2), 0x00000010 },
{ AR5K_BB_GAIN(3), 0x00000030 },
{ AR5K_BB_GAIN(4), 0x00000008 },
{ AR5K_BB_GAIN(5), 0x00000028 },
{ AR5K_BB_GAIN(6), 0x00000028 },
{ AR5K_BB_GAIN(7), 0x00000004 },
{ AR5K_BB_GAIN(8), 0x00000024 },
{ AR5K_BB_GAIN(9), 0x00000014 },
{ AR5K_BB_GAIN(10), 0x00000034 },
{ AR5K_BB_GAIN(11), 0x0000000c },
{ AR5K_BB_GAIN(12), 0x0000002c },
{ AR5K_BB_GAIN(13), 0x00000002 },
{ AR5K_BB_GAIN(14), 0x00000022 },
{ AR5K_BB_GAIN(15), 0x00000012 },
{ AR5K_BB_GAIN(16), 0x00000032 },
{ AR5K_BB_GAIN(17), 0x0000000a },
{ AR5K_BB_GAIN(18), 0x0000002a },
{ AR5K_BB_GAIN(19), 0x00000001 },
{ AR5K_BB_GAIN(20), 0x00000021 },
{ AR5K_BB_GAIN(21), 0x00000011 },
{ AR5K_BB_GAIN(22), 0x00000031 },
{ AR5K_BB_GAIN(23), 0x00000009 },
{ AR5K_BB_GAIN(24), 0x00000029 },
{ AR5K_BB_GAIN(25), 0x00000005 },
{ AR5K_BB_GAIN(26), 0x00000025 },
{ AR5K_BB_GAIN(27), 0x00000015 },
{ AR5K_BB_GAIN(28), 0x00000035 },
{ AR5K_BB_GAIN(29), 0x0000000d },
{ AR5K_BB_GAIN(30), 0x0000002d },
{ AR5K_BB_GAIN(31), 0x00000003 },
{ AR5K_BB_GAIN(32), 0x00000023 },
{ AR5K_BB_GAIN(33), 0x00000013 },
{ AR5K_BB_GAIN(34), 0x00000033 },
{ AR5K_BB_GAIN(35), 0x0000000b },
{ AR5K_BB_GAIN(36), 0x0000002b },
{ AR5K_BB_GAIN(37), 0x00000007 },
{ AR5K_BB_GAIN(38), 0x00000027 },
{ AR5K_BB_GAIN(39), 0x00000017 },
{ AR5K_BB_GAIN(40), 0x00000037 },
{ AR5K_BB_GAIN(41), 0x0000000f },
{ AR5K_BB_GAIN(42), 0x0000002f },
{ AR5K_BB_GAIN(43), 0x0000002f },
{ AR5K_BB_GAIN(44), 0x0000002f },
{ AR5K_BB_GAIN(45), 0x0000002f },
{ AR5K_BB_GAIN(46), 0x0000002f },
{ AR5K_BB_GAIN(47), 0x0000002f },
{ AR5K_BB_GAIN(48), 0x0000002f },
{ AR5K_BB_GAIN(49), 0x0000002f },
{ AR5K_BB_GAIN(50), 0x0000002f },
{ AR5K_BB_GAIN(51), 0x0000002f },
{ AR5K_BB_GAIN(52), 0x0000002f },
{ AR5K_BB_GAIN(53), 0x0000002f },
{ AR5K_BB_GAIN(54), 0x0000002f },
{ AR5K_BB_GAIN(55), 0x0000002f },
{ AR5K_BB_GAIN(56), 0x0000002f },
{ AR5K_BB_GAIN(57), 0x0000002f },
{ AR5K_BB_GAIN(58), 0x0000002f },
{ AR5K_BB_GAIN(59), 0x0000002f },
{ AR5K_BB_GAIN(60), 0x0000002f },
{ AR5K_BB_GAIN(61), 0x0000002f },
{ AR5K_BB_GAIN(62), 0x0000002f },
{ AR5K_BB_GAIN(63), 0x0000002f },
/* 5110 RF gain table (64btes) */
{ AR5K_RF_GAIN(0), 0x0000001d },
{ AR5K_RF_GAIN(1), 0x0000005d },
{ AR5K_RF_GAIN(2), 0x0000009d },
{ AR5K_RF_GAIN(3), 0x000000dd },
{ AR5K_RF_GAIN(4), 0x0000011d },
{ AR5K_RF_GAIN(5), 0x00000021 },
{ AR5K_RF_GAIN(6), 0x00000061 },
{ AR5K_RF_GAIN(7), 0x000000a1 },
{ AR5K_RF_GAIN(8), 0x000000e1 },
{ AR5K_RF_GAIN(9), 0x00000031 },
{ AR5K_RF_GAIN(10), 0x00000071 },
{ AR5K_RF_GAIN(11), 0x000000b1 },
{ AR5K_RF_GAIN(12), 0x0000001c },
{ AR5K_RF_GAIN(13), 0x0000005c },
{ AR5K_RF_GAIN(14), 0x00000029 },
{ AR5K_RF_GAIN(15), 0x00000069 },
{ AR5K_RF_GAIN(16), 0x000000a9 },
{ AR5K_RF_GAIN(17), 0x00000020 },
{ AR5K_RF_GAIN(18), 0x00000019 },
{ AR5K_RF_GAIN(19), 0x00000059 },
{ AR5K_RF_GAIN(20), 0x00000099 },
{ AR5K_RF_GAIN(21), 0x00000030 },
{ AR5K_RF_GAIN(22), 0x00000005 },
{ AR5K_RF_GAIN(23), 0x00000025 },
{ AR5K_RF_GAIN(24), 0x00000065 },
{ AR5K_RF_GAIN(25), 0x000000a5 },
{ AR5K_RF_GAIN(26), 0x00000028 },
{ AR5K_RF_GAIN(27), 0x00000068 },
{ AR5K_RF_GAIN(28), 0x0000001f },
{ AR5K_RF_GAIN(29), 0x0000001e },
{ AR5K_RF_GAIN(30), 0x00000018 },
{ AR5K_RF_GAIN(31), 0x00000058 },
{ AR5K_RF_GAIN(32), 0x00000098 },
{ AR5K_RF_GAIN(33), 0x00000003 },
{ AR5K_RF_GAIN(34), 0x00000004 },
{ AR5K_RF_GAIN(35), 0x00000044 },
{ AR5K_RF_GAIN(36), 0x00000084 },
{ AR5K_RF_GAIN(37), 0x00000013 },
{ AR5K_RF_GAIN(38), 0x00000012 },
{ AR5K_RF_GAIN(39), 0x00000052 },
{ AR5K_RF_GAIN(40), 0x00000092 },
{ AR5K_RF_GAIN(41), 0x000000d2 },
{ AR5K_RF_GAIN(42), 0x0000002b },
{ AR5K_RF_GAIN(43), 0x0000002a },
{ AR5K_RF_GAIN(44), 0x0000006a },
{ AR5K_RF_GAIN(45), 0x000000aa },
{ AR5K_RF_GAIN(46), 0x0000001b },
{ AR5K_RF_GAIN(47), 0x0000001a },
{ AR5K_RF_GAIN(48), 0x0000005a },
{ AR5K_RF_GAIN(49), 0x0000009a },
{ AR5K_RF_GAIN(50), 0x000000da },
{ AR5K_RF_GAIN(51), 0x00000006 },
{ AR5K_RF_GAIN(52), 0x00000006 },
{ AR5K_RF_GAIN(53), 0x00000006 },
{ AR5K_RF_GAIN(54), 0x00000006 },
{ AR5K_RF_GAIN(55), 0x00000006 },
{ AR5K_RF_GAIN(56), 0x00000006 },
{ AR5K_RF_GAIN(57), 0x00000006 },
{ AR5K_RF_GAIN(58), 0x00000006 },
{ AR5K_RF_GAIN(59), 0x00000006 },
{ AR5K_RF_GAIN(60), 0x00000006 },
{ AR5K_RF_GAIN(61), 0x00000006 },
{ AR5K_RF_GAIN(62), 0x00000006 },
{ AR5K_RF_GAIN(63), 0x00000006 },
/* PHY activation */
{ AR5K_PHY(53), 0x00000020 },
{ AR5K_PHY(51), 0x00000004 },
{ AR5K_PHY(50), 0x00060106 },
{ AR5K_PHY(39), 0x0000006d },
{ AR5K_PHY(48), 0x00000000 },
{ AR5K_PHY(52), 0x00000014 },
{ AR5K_PHY_ACT, AR5K_PHY_ACT_ENABLE },
};
/* Initial register settings for AR5211 */
static const struct ath5k_ini ar5211_ini[] = {
{ AR5K_RXDP, 0x00000000 },
{ AR5K_RTSD0, 0x84849c9c },
{ AR5K_RTSD1, 0x7c7c7c7c },
{ AR5K_RXCFG, 0x00000005 },
{ AR5K_MIBC, 0x00000000 },
{ AR5K_TOPS, 0x00000008 },
{ AR5K_RXNOFRM, 0x00000008 },
{ AR5K_TXNOFRM, 0x00000010 },
{ AR5K_RPGTO, 0x00000000 },
{ AR5K_RFCNT, 0x0000001f },
{ AR5K_QUEUE_TXDP(0), 0x00000000 },
{ AR5K_QUEUE_TXDP(1), 0x00000000 },
{ AR5K_QUEUE_TXDP(2), 0x00000000 },
{ AR5K_QUEUE_TXDP(3), 0x00000000 },
{ AR5K_QUEUE_TXDP(4), 0x00000000 },
{ AR5K_QUEUE_TXDP(5), 0x00000000 },
{ AR5K_QUEUE_TXDP(6), 0x00000000 },
{ AR5K_QUEUE_TXDP(7), 0x00000000 },
{ AR5K_QUEUE_TXDP(8), 0x00000000 },
{ AR5K_QUEUE_TXDP(9), 0x00000000 },
{ AR5K_DCU_FP, 0x00000000 },
{ AR5K_STA_ID1, 0x00000000 },
{ AR5K_BSS_ID0, 0x00000000 },
{ AR5K_BSS_ID1, 0x00000000 },
{ AR5K_RSSI_THR, 0x00000000 },
{ AR5K_CFP_PERIOD_5211, 0x00000000 },
{ AR5K_TIMER0_5211, 0x00000030 },
{ AR5K_TIMER1_5211, 0x0007ffff },
{ AR5K_TIMER2_5211, 0x01ffffff },
{ AR5K_TIMER3_5211, 0x00000031 },
{ AR5K_CFP_DUR_5211, 0x00000000 },
{ AR5K_RX_FILTER_5211, 0x00000000 },
{ AR5K_MCAST_FILTER0_5211, 0x00000000 },
{ AR5K_MCAST_FILTER1_5211, 0x00000002 },
{ AR5K_DIAG_SW_5211, 0x00000000 },
{ AR5K_ADDAC_TEST, 0x00000000 },
{ AR5K_DEFAULT_ANTENNA, 0x00000000 },
/* PHY registers */
{ AR5K_PHY_AGC, 0x00000000 },
{ AR5K_PHY(3), 0x2d849093 },
{ AR5K_PHY(4), 0x7d32e000 },
{ AR5K_PHY(5), 0x00000f6b },
{ AR5K_PHY_ACT, 0x00000000 },
{ AR5K_PHY(11), 0x00026ffe },
{ AR5K_PHY(12), 0x00000000 },
{ AR5K_PHY(15), 0x00020100 },
{ AR5K_PHY(16), 0x206a017a },
{ AR5K_PHY(19), 0x1284613c },
{ AR5K_PHY(21), 0x00000859 },
{ AR5K_PHY(26), 0x409a4190 }, /* 0x9868 */
{ AR5K_PHY(27), 0x050cb081 },
{ AR5K_PHY(28), 0x0000000f },
{ AR5K_PHY(29), 0x00000080 },
{ AR5K_PHY(30), 0x0000000c },
{ AR5K_PHY(64), 0x00000000 },
{ AR5K_PHY(65), 0x00000000 },
{ AR5K_PHY(66), 0x00000000 },
{ AR5K_PHY(67), 0x00800000 },
{ AR5K_PHY(68), 0x00000001 },
{ AR5K_PHY(71), 0x0000092a },
{ AR5K_PHY_IQ, 0x00000000 },
{ AR5K_PHY(73), 0x00058a05 },
{ AR5K_PHY(74), 0x00000001 },
{ AR5K_PHY(75), 0x00000000 },
{ AR5K_PHY_PAPD_PROBE, 0x00000000 },
{ AR5K_PHY(77), 0x00000000 }, /* 0x9934 */
{ AR5K_PHY(78), 0x00000000 }, /* 0x9938 */
{ AR5K_PHY(79), 0x0000003f }, /* 0x993c */
{ AR5K_PHY(80), 0x00000004 },
{ AR5K_PHY(82), 0x00000000 },
{ AR5K_PHY(83), 0x00000000 },
{ AR5K_PHY(84), 0x00000000 },
{ AR5K_PHY_RADAR, 0x5d50f14c },
{ AR5K_PHY(86), 0x00000018 },
{ AR5K_PHY(87), 0x004b6a8e },
/* Initial Power table (32bytes)
* common on all cards/modes.
* Note: Table is rewritten during
* txpower setup later using calibration
* data etc. so next write is non-common */
{ AR5K_PHY_PCDAC_TXPOWER(1), 0x06ff05ff },
{ AR5K_PHY_PCDAC_TXPOWER(2), 0x07ff07ff },
{ AR5K_PHY_PCDAC_TXPOWER(3), 0x08ff08ff },
{ AR5K_PHY_PCDAC_TXPOWER(4), 0x09ff09ff },
{ AR5K_PHY_PCDAC_TXPOWER(5), 0x0aff0aff },
{ AR5K_PHY_PCDAC_TXPOWER(6), 0x0bff0bff },
{ AR5K_PHY_PCDAC_TXPOWER(7), 0x0cff0cff },
{ AR5K_PHY_PCDAC_TXPOWER(8), 0x0dff0dff },
{ AR5K_PHY_PCDAC_TXPOWER(9), 0x0fff0eff },
{ AR5K_PHY_PCDAC_TXPOWER(10), 0x12ff12ff },
{ AR5K_PHY_PCDAC_TXPOWER(11), 0x14ff13ff },
{ AR5K_PHY_PCDAC_TXPOWER(12), 0x16ff15ff },
{ AR5K_PHY_PCDAC_TXPOWER(13), 0x19ff17ff },
{ AR5K_PHY_PCDAC_TXPOWER(14), 0x1bff1aff },
{ AR5K_PHY_PCDAC_TXPOWER(15), 0x1eff1dff },
{ AR5K_PHY_PCDAC_TXPOWER(16), 0x23ff20ff },
{ AR5K_PHY_PCDAC_TXPOWER(17), 0x27ff25ff },
{ AR5K_PHY_PCDAC_TXPOWER(18), 0x2cff29ff },
{ AR5K_PHY_PCDAC_TXPOWER(19), 0x31ff2fff },
{ AR5K_PHY_PCDAC_TXPOWER(20), 0x37ff34ff },
{ AR5K_PHY_PCDAC_TXPOWER(21), 0x3aff3aff },
{ AR5K_PHY_PCDAC_TXPOWER(22), 0x3aff3aff },
{ AR5K_PHY_PCDAC_TXPOWER(23), 0x3aff3aff },
{ AR5K_PHY_PCDAC_TXPOWER(24), 0x3aff3aff },
{ AR5K_PHY_PCDAC_TXPOWER(25), 0x3aff3aff },
{ AR5K_PHY_PCDAC_TXPOWER(26), 0x3aff3aff },
{ AR5K_PHY_PCDAC_TXPOWER(27), 0x3aff3aff },
{ AR5K_PHY_PCDAC_TXPOWER(28), 0x3aff3aff },
{ AR5K_PHY_PCDAC_TXPOWER(29), 0x3aff3aff },
{ AR5K_PHY_PCDAC_TXPOWER(30), 0x3aff3aff },
{ AR5K_PHY_PCDAC_TXPOWER(31), 0x3aff3aff },
{ AR5K_PHY_CCKTXCTL, 0x00000000 },
{ AR5K_PHY(642), 0x503e4646 },
{ AR5K_PHY_GAIN_2GHZ, 0x6480416c },
{ AR5K_PHY(644), 0x0199a003 },
{ AR5K_PHY(645), 0x044cd610 },
{ AR5K_PHY(646), 0x13800040 },
{ AR5K_PHY(647), 0x1be00060 },
{ AR5K_PHY(648), 0x0c53800a },
{ AR5K_PHY(649), 0x0014df3b },
{ AR5K_PHY(650), 0x000001b5 },
{ AR5K_PHY(651), 0x00000020 },
};
/* Initial mode-specific settings for AR5211
* 5211 supports OFDM-only g (draft g) but we
* need to test it !
*/
static const struct ath5k_ini_mode ar5211_ini_mode[] = {
{ AR5K_TXCFG,
/* a aTurbo b g (OFDM) */
{ 0x00000015, 0x00000015, 0x0000001d, 0x00000015 } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(0),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(1),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(2),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(3),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(4),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(5),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(6),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(7),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(8),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(9),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } },
{ AR5K_DCU_GBL_IFS_SLOT,
{ 0x00000168, 0x000001e0, 0x000001b8, 0x00000168 } },
{ AR5K_DCU_GBL_IFS_SIFS,
{ 0x00000230, 0x000001e0, 0x000000b0, 0x00000230 } },
{ AR5K_DCU_GBL_IFS_EIFS,
{ 0x00000d98, 0x00001180, 0x00001f48, 0x00000d98 } },
{ AR5K_DCU_GBL_IFS_MISC,
{ 0x0000a0e0, 0x00014068, 0x00005880, 0x0000a0e0 } },
{ AR5K_TIME_OUT,
{ 0x04000400, 0x08000800, 0x20003000, 0x04000400 } },
{ AR5K_USEC_5211,
{ 0x0e8d8fa7, 0x0e8d8fcf, 0x01608f95, 0x0e8d8fa7 } },
{ AR5K_PHY_TURBO,
{ 0x00000000, 0x00000003, 0x00000000, 0x00000000 } },
{ AR5K_PHY(8),
{ 0x02020200, 0x02020200, 0x02010200, 0x02020200 } },
{ AR5K_PHY(9),
{ 0x00000e0e, 0x00000e0e, 0x00000707, 0x00000e0e } },
{ AR5K_PHY(10),
{ 0x0a020001, 0x0a020001, 0x05010000, 0x0a020001 } },
{ AR5K_PHY(13),
{ 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e } },
{ AR5K_PHY(14),
{ 0x00000007, 0x00000007, 0x0000000b, 0x0000000b } },
{ AR5K_PHY(17),
{ 0x1372169c, 0x137216a5, 0x137216a8, 0x1372169c } },
{ AR5K_PHY(18),
{ 0x0018ba67, 0x0018ba67, 0x0018ba69, 0x0018ba69 } },
{ AR5K_PHY(20),
{ 0x0c28b4e0, 0x0c28b4e0, 0x0c28b4e0, 0x0c28b4e0 } },
{ AR5K_PHY_SIG,
{ 0x7e800d2e, 0x7e800d2e, 0x7ec00d2e, 0x7e800d2e } },
{ AR5K_PHY_AGCCOARSE,
{ 0x31375d5e, 0x31375d5e, 0x313a5d5e, 0x31375d5e } },
{ AR5K_PHY_AGCCTL,
{ 0x0000bd10, 0x0000bd10, 0x0000bd38, 0x0000bd10 } },
{ AR5K_PHY_NF,
{ 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 } },
{ AR5K_PHY_RX_DELAY,
{ 0x00002710, 0x00002710, 0x0000157c, 0x00002710 } },
{ AR5K_PHY(70),
{ 0x00000190, 0x00000190, 0x00000084, 0x00000190 } },
{ AR5K_PHY_FRAME_CTL_5211,
{ 0x6fe01020, 0x6fe01020, 0x6fe00920, 0x6fe01020 } },
{ AR5K_PHY_PCDAC_TXPOWER_BASE,
{ 0x05ff14ff, 0x05ff14ff, 0x05ff14ff, 0x05ff19ff } },
{ AR5K_RF_BUFFER_CONTROL_4,
{ 0x00000010, 0x00000014, 0x00000010, 0x00000010 } },
};
/* Initial register settings for AR5212 */
static const struct ath5k_ini ar5212_ini_common_start[] = {
{ AR5K_RXDP, 0x00000000 },
{ AR5K_RXCFG, 0x00000005 },
{ AR5K_MIBC, 0x00000000 },
{ AR5K_TOPS, 0x00000008 },
{ AR5K_RXNOFRM, 0x00000008 },
{ AR5K_TXNOFRM, 0x00000010 },
{ AR5K_RPGTO, 0x00000000 },
{ AR5K_RFCNT, 0x0000001f },
{ AR5K_QUEUE_TXDP(0), 0x00000000 },
{ AR5K_QUEUE_TXDP(1), 0x00000000 },
{ AR5K_QUEUE_TXDP(2), 0x00000000 },
{ AR5K_QUEUE_TXDP(3), 0x00000000 },
{ AR5K_QUEUE_TXDP(4), 0x00000000 },
{ AR5K_QUEUE_TXDP(5), 0x00000000 },
{ AR5K_QUEUE_TXDP(6), 0x00000000 },
{ AR5K_QUEUE_TXDP(7), 0x00000000 },
{ AR5K_QUEUE_TXDP(8), 0x00000000 },
{ AR5K_QUEUE_TXDP(9), 0x00000000 },
{ AR5K_DCU_FP, 0x00000000 },
{ AR5K_DCU_TXP, 0x00000000 },
/* Tx filter table 0 (32 entries) */
{ AR5K_DCU_TX_FILTER_0(0), 0x00000000 }, /* DCU 0 */
{ AR5K_DCU_TX_FILTER_0(1), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(2), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(3), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(4), 0x00000000 }, /* DCU 1 */
{ AR5K_DCU_TX_FILTER_0(5), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(6), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(7), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(8), 0x00000000 }, /* DCU 2 */
{ AR5K_DCU_TX_FILTER_0(9), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(10), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(11), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(12), 0x00000000 }, /* DCU 3 */
{ AR5K_DCU_TX_FILTER_0(13), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(14), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(15), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(16), 0x00000000 }, /* DCU 4 */
{ AR5K_DCU_TX_FILTER_0(17), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(18), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(19), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(20), 0x00000000 }, /* DCU 5 */
{ AR5K_DCU_TX_FILTER_0(21), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(22), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(23), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(24), 0x00000000 }, /* DCU 6 */
{ AR5K_DCU_TX_FILTER_0(25), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(26), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(27), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(28), 0x00000000 }, /* DCU 7 */
{ AR5K_DCU_TX_FILTER_0(29), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(30), 0x00000000 },
{ AR5K_DCU_TX_FILTER_0(31), 0x00000000 },
/* Tx filter table 1 (16 entries) */
{ AR5K_DCU_TX_FILTER_1(0), 0x00000000 },
{ AR5K_DCU_TX_FILTER_1(1), 0x00000000 },
{ AR5K_DCU_TX_FILTER_1(2), 0x00000000 },
{ AR5K_DCU_TX_FILTER_1(3), 0x00000000 },
{ AR5K_DCU_TX_FILTER_1(4), 0x00000000 },
{ AR5K_DCU_TX_FILTER_1(5), 0x00000000 },
{ AR5K_DCU_TX_FILTER_1(6), 0x00000000 },
{ AR5K_DCU_TX_FILTER_1(7), 0x00000000 },
{ AR5K_DCU_TX_FILTER_1(8), 0x00000000 },
{ AR5K_DCU_TX_FILTER_1(9), 0x00000000 },
{ AR5K_DCU_TX_FILTER_1(10), 0x00000000 },
{ AR5K_DCU_TX_FILTER_1(11), 0x00000000 },
{ AR5K_DCU_TX_FILTER_1(12), 0x00000000 },
{ AR5K_DCU_TX_FILTER_1(13), 0x00000000 },
{ AR5K_DCU_TX_FILTER_1(14), 0x00000000 },
{ AR5K_DCU_TX_FILTER_1(15), 0x00000000 },
{ AR5K_DCU_TX_FILTER_CLR, 0x00000000 },
{ AR5K_DCU_TX_FILTER_SET, 0x00000000 },
{ AR5K_STA_ID1, 0x00000000 },
{ AR5K_BSS_ID0, 0x00000000 },
{ AR5K_BSS_ID1, 0x00000000 },
{ AR5K_BEACON_5211, 0x00000000 },
{ AR5K_CFP_PERIOD_5211, 0x00000000 },
{ AR5K_TIMER0_5211, 0x00000030 },
{ AR5K_TIMER1_5211, 0x0007ffff },
{ AR5K_TIMER2_5211, 0x01ffffff },
{ AR5K_TIMER3_5211, 0x00000031 },
{ AR5K_CFP_DUR_5211, 0x00000000 },
{ AR5K_RX_FILTER_5211, 0x00000000 },
{ AR5K_DIAG_SW_5211, 0x00000000 },
{ AR5K_ADDAC_TEST, 0x00000000 },
{ AR5K_DEFAULT_ANTENNA, 0x00000000 },
{ AR5K_FRAME_CTL_QOSM, 0x000fc78f },
{ AR5K_XRMODE, 0x2a82301a },
{ AR5K_XRDELAY, 0x05dc01e0 },
{ AR5K_XRTIMEOUT, 0x1f402710 },
{ AR5K_XRCHIRP, 0x01f40000 },
{ AR5K_XRSTOMP, 0x00001e1c },
{ AR5K_SLEEP0, 0x0002aaaa },
{ AR5K_SLEEP1, 0x02005555 },
{ AR5K_SLEEP2, 0x00000000 },
{ AR_BSSMSKL, 0xffffffff },
{ AR_BSSMSKU, 0x0000ffff },
{ AR5K_TXPC, 0x00000000 },
{ AR5K_PROFCNT_TX, 0x00000000 },
{ AR5K_PROFCNT_RX, 0x00000000 },
{ AR5K_PROFCNT_RXCLR, 0x00000000 },
{ AR5K_PROFCNT_CYCLE, 0x00000000 },
{ AR5K_QUIET_CTL1, 0x00000088 },
/* Initial rate duration table (32 entries )*/
{ AR5K_RATE_DUR(0), 0x00000000 },
{ AR5K_RATE_DUR(1), 0x0000008c },
{ AR5K_RATE_DUR(2), 0x000000e4 },
{ AR5K_RATE_DUR(3), 0x000002d5 },
{ AR5K_RATE_DUR(4), 0x00000000 },
{ AR5K_RATE_DUR(5), 0x00000000 },
{ AR5K_RATE_DUR(6), 0x000000a0 },
{ AR5K_RATE_DUR(7), 0x000001c9 },
{ AR5K_RATE_DUR(8), 0x0000002c },
{ AR5K_RATE_DUR(9), 0x0000002c },
{ AR5K_RATE_DUR(10), 0x00000030 },
{ AR5K_RATE_DUR(11), 0x0000003c },
{ AR5K_RATE_DUR(12), 0x0000002c },
{ AR5K_RATE_DUR(13), 0x0000002c },
{ AR5K_RATE_DUR(14), 0x00000030 },
{ AR5K_RATE_DUR(15), 0x0000003c },
{ AR5K_RATE_DUR(16), 0x00000000 },
{ AR5K_RATE_DUR(17), 0x00000000 },
{ AR5K_RATE_DUR(18), 0x00000000 },
{ AR5K_RATE_DUR(19), 0x00000000 },
{ AR5K_RATE_DUR(20), 0x00000000 },
{ AR5K_RATE_DUR(21), 0x00000000 },
{ AR5K_RATE_DUR(22), 0x00000000 },
{ AR5K_RATE_DUR(23), 0x00000000 },
{ AR5K_RATE_DUR(24), 0x000000d5 },
{ AR5K_RATE_DUR(25), 0x000000df },
{ AR5K_RATE_DUR(26), 0x00000102 },
{ AR5K_RATE_DUR(27), 0x0000013a },
{ AR5K_RATE_DUR(28), 0x00000075 },
{ AR5K_RATE_DUR(29), 0x0000007f },
{ AR5K_RATE_DUR(30), 0x000000a2 },
{ AR5K_RATE_DUR(31), 0x00000000 },
{ AR5K_QUIET_CTL2, 0x00010002 },
{ AR5K_TSF_PARM, 0x00000001 },
{ AR5K_QOS_NOACK, 0x000000c0 },
{ AR5K_PHY_ERR_FIL, 0x00000000 },
{ AR5K_XRLAT_TX, 0x00000168 },
{ AR5K_ACKSIFS, 0x00000000 },
/* Rate -> db table
* notice ...03<-02<-01<-00 ! */
{ AR5K_RATE2DB(0), 0x03020100 },
{ AR5K_RATE2DB(1), 0x07060504 },
{ AR5K_RATE2DB(2), 0x0b0a0908 },
{ AR5K_RATE2DB(3), 0x0f0e0d0c },
{ AR5K_RATE2DB(4), 0x13121110 },
{ AR5K_RATE2DB(5), 0x17161514 },
{ AR5K_RATE2DB(6), 0x1b1a1918 },
{ AR5K_RATE2DB(7), 0x1f1e1d1c },
/* Db -> Rate table */
{ AR5K_DB2RATE(0), 0x03020100 },
{ AR5K_DB2RATE(1), 0x07060504 },
{ AR5K_DB2RATE(2), 0x0b0a0908 },
{ AR5K_DB2RATE(3), 0x0f0e0d0c },
{ AR5K_DB2RATE(4), 0x13121110 },
{ AR5K_DB2RATE(5), 0x17161514 },
{ AR5K_DB2RATE(6), 0x1b1a1918 },
{ AR5K_DB2RATE(7), 0x1f1e1d1c },
/* PHY registers (Common settings
* for all chips/modes) */
{ AR5K_PHY(3), 0xad848e19 },
{ AR5K_PHY(4), 0x7d28e000 },
{ AR5K_PHY_TIMING_3, 0x9c0a9f6b },
{ AR5K_PHY_ACT, 0x00000000 },
{ AR5K_PHY(16), 0x206a017a },
{ AR5K_PHY(21), 0x00000859 },
{ AR5K_PHY_BIN_MASK_1, 0x00000000 },
{ AR5K_PHY_BIN_MASK_2, 0x00000000 },
{ AR5K_PHY_BIN_MASK_3, 0x00000000 },
{ AR5K_PHY_BIN_MASK_CTL, 0x00800000 },
{ AR5K_PHY_ANT_CTL, 0x00000001 },
/*{ AR5K_PHY(71), 0x0000092a },*/ /* Old value */
{ AR5K_PHY_MAX_RX_LEN, 0x00000c80 },
{ AR5K_PHY_IQ, 0x05100000 },
{ AR5K_PHY_WARM_RESET, 0x00000001 },
{ AR5K_PHY_CTL, 0x00000004 },
{ AR5K_PHY_TXPOWER_RATE1, 0x1e1f2022 },
{ AR5K_PHY_TXPOWER_RATE2, 0x0a0b0c0d },
{ AR5K_PHY_TXPOWER_RATE_MAX, 0x0000003f },
{ AR5K_PHY(82), 0x9280b212 },
{ AR5K_PHY_RADAR, 0x5d50e188 },
/*{ AR5K_PHY(86), 0x000000ff },*/
{ AR5K_PHY(87), 0x004b6a8e },
{ AR5K_PHY_NFTHRES, 0x000003ce },
{ AR5K_PHY_RESTART, 0x192fb515 },
{ AR5K_PHY(94), 0x00000001 },
{ AR5K_PHY_RFBUS_REQ, 0x00000000 },
/*{ AR5K_PHY(644), 0x0080a333 },*/ /* Old value */
/*{ AR5K_PHY(645), 0x00206c10 },*/ /* Old value */
{ AR5K_PHY(644), 0x00806333 },
{ AR5K_PHY(645), 0x00106c10 },
{ AR5K_PHY(646), 0x009c4060 },
/* { AR5K_PHY(647), 0x1483800a }, */
/* { AR5K_PHY(648), 0x01831061 }, */ /* Old value */
{ AR5K_PHY(648), 0x018830c6 },
{ AR5K_PHY(649), 0x00000400 },
/*{ AR5K_PHY(650), 0x000001b5 },*/
{ AR5K_PHY(651), 0x00000000 },
{ AR5K_PHY_TXPOWER_RATE3, 0x20202020 },
{ AR5K_PHY_TXPOWER_RATE4, 0x20202020 },
/*{ AR5K_PHY(655), 0x13c889af },*/
{ AR5K_PHY(656), 0x38490a20 },
{ AR5K_PHY(657), 0x00007bb6 },
{ AR5K_PHY(658), 0x0fff3ffc },
};
/* Initial mode-specific settings for AR5212 (Written before ar5212_ini) */
static const struct ath5k_ini_mode ar5212_ini_mode_start[] = {
{ AR5K_QUEUE_DFS_LOCAL_IFS(0),
/* a/XR aTurbo b g (DYN) gTurbo */
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(1),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(2),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(3),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(4),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(5),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(6),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(7),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(8),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } },
{ AR5K_QUEUE_DFS_LOCAL_IFS(9),
{ 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } },
{ AR5K_DCU_GBL_IFS_SIFS,
{ 0x00000230, 0x000001e0, 0x000000b0, 0x00000160, 0x000001e0 } },
{ AR5K_DCU_GBL_IFS_SLOT,
{ 0x00000168, 0x000001e0, 0x000001b8, 0x0000018c, 0x000001e0 } },
{ AR5K_DCU_GBL_IFS_EIFS,
{ 0x00000e60, 0x00001180, 0x00001f1c, 0x00003e38, 0x00001180 } },
{ AR5K_DCU_GBL_IFS_MISC,
{ 0x0000a0e0, 0x00014068, 0x00005880, 0x0000b0e0, 0x00014068 } },
{ AR5K_TIME_OUT,
{ 0x03e803e8, 0x06e006e0, 0x04200420, 0x08400840, 0x06e006e0 } },
{ AR5K_PHY_TURBO,
{ 0x00000000, 0x00000003, 0x00000000, 0x00000000, 0x00000003 } },
{ AR5K_PHY(8),
{ 0x02020200, 0x02020200, 0x02010200, 0x02020200, 0x02020200 } },
{ AR5K_PHY_RF_CTL2,
{ 0x00000e0e, 0x00000e0e, 0x00000707, 0x00000e0e, 0x00000e0e } },
{ AR5K_PHY_SETTLING,
{ 0x1372161c, 0x13721c25, 0x13721722, 0x137216a2, 0x13721c25 } },
{ AR5K_PHY_AGCCTL,
{ 0x00009d10, 0x00009d10, 0x00009d18, 0x00009d18, 0x00009d10 } },
{ AR5K_PHY_NF,
{ 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 } },
{ AR5K_PHY_WEAK_OFDM_HIGH_THR,
{ 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190 } },
{ AR5K_PHY(70),
{ 0x000001b8, 0x000001b8, 0x00000084, 0x00000108, 0x000001b8 } },
{ AR5K_PHY_OFDM_SELFCORR,
{ 0x10058a05, 0x10058a05, 0x10058a05, 0x10058a05, 0x10058a05 } },
{ 0xa230,
{ 0x00000000, 0x00000000, 0x00000000, 0x00000108, 0x00000000 } },
};
/* Initial mode-specific settings for AR5212 + RF5111 (Written after ar5212_ini) */
static const struct ath5k_ini_mode rf5111_ini_mode_end[] = {
{ AR5K_TXCFG,
/* a/XR aTurbo b g (DYN) gTurbo */
{ 0x00008015, 0x00008015, 0x00008015, 0x00008015, 0x00008015 } },
{ AR5K_USEC_5211,
{ 0x128d8fa7, 0x09880fcf, 0x04e00f95, 0x12e00fab, 0x09880fcf } },
{ AR5K_PHY_RF_CTL3,
{ 0x0a020001, 0x0a020001, 0x05010100, 0x0a020001, 0x0a020001 } },
{ AR5K_PHY_RF_CTL4,
{ 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e } },
{ AR5K_PHY_PA_CTL,
{ 0x00000007, 0x00000007, 0x0000000b, 0x0000000b, 0x0000000b } },
{ AR5K_PHY_GAIN,
{ 0x0018da5a, 0x0018da5a, 0x0018ca69, 0x0018ca69, 0x0018ca69 } },
{ AR5K_PHY_DESIRED_SIZE,
{ 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0 } },
{ AR5K_PHY_SIG,
{ 0x7e800d2e, 0x7e800d2e, 0x7ee84d2e, 0x7ee84d2e, 0x7e800d2e } },
{ AR5K_PHY_AGCCOARSE,
{ 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e, 0x3137615e } },
{ AR5K_PHY_WEAK_OFDM_LOW_THR,
{ 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb080, 0x050cb080 } },
{ AR5K_PHY_RX_DELAY,
{ 0x00002710, 0x00002710, 0x0000157c, 0x00002af8, 0x00002710 } },
{ AR5K_PHY_FRAME_CTL_5211,
{ 0xf7b81020, 0xf7b81020, 0xf7b80d20, 0xf7b81020, 0xf7b81020 } },
{ AR5K_PHY_GAIN_2GHZ,
{ 0x642c416a, 0x642c416a, 0x6440416a, 0x6440416a, 0x6440416a } },
{ AR5K_PHY_CCK_RX_CTL_4,
{ 0x1883800a, 0x1883800a, 0x1873800a, 0x1883800a, 0x1883800a } },
};
static const struct ath5k_ini rf5111_ini_common_end[] = {
{ AR5K_DCU_FP, 0x00000000 },
{ AR5K_PHY_AGC, 0x00000000 },
{ AR5K_PHY_ADC_CTL, 0x00022ffe },
{ 0x983c, 0x00020100 },
{ AR5K_PHY_GAIN_OFFSET, 0x1284613c },
{ AR5K_PHY_PAPD_PROBE, 0x00004883 },
{ 0x9940, 0x00000004 },
{ 0x9958, 0x000000ff },
{ 0x9974, 0x00000000 },
{ AR5K_PHY_SPENDING, 0x00000018 },
{ AR5K_PHY_CCKTXCTL, 0x00000000 },
{ AR5K_PHY_CCK_CROSSCORR, 0xd03e6788 },
{ AR5K_PHY_DAG_CCK_CTL, 0x000001b5 },
{ 0xa23c, 0x13c889af },
};
/* Initial mode-specific settings for AR5212 + RF5112 (Written after ar5212_ini) */
static const struct ath5k_ini_mode rf5112_ini_mode_end[] = {
{ AR5K_TXCFG,
/* a/XR aTurbo b g (DYN) gTurbo */
{ 0x00008015, 0x00008015, 0x00008015, 0x00008015, 0x00008015 } },
{ AR5K_USEC_5211,
{ 0x128d93a7, 0x098813cf, 0x04e01395, 0x12e013ab, 0x098813cf } },
{ AR5K_PHY_RF_CTL3,
{ 0x0a020001, 0x0a020001, 0x05020100, 0x0a020001, 0x0a020001 } },
{ AR5K_PHY_RF_CTL4,
{ 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e } },
{ AR5K_PHY_PA_CTL,
{ 0x00000007, 0x00000007, 0x0000000b, 0x0000000b, 0x0000000b } },
{ AR5K_PHY_GAIN,
{ 0x0018da6d, 0x0018da6d, 0x0018ca75, 0x0018ca75, 0x0018ca75 } },
{ AR5K_PHY_DESIRED_SIZE,
{ 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0 } },
{ AR5K_PHY_SIG,
{ 0x7e800d2e, 0x7e800d2e, 0x7ee80d2e, 0x7ee80d2e, 0x7e800d2e } },
{ AR5K_PHY_AGCCOARSE,
{ 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e } },
{ AR5K_PHY_WEAK_OFDM_LOW_THR,
{ 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081 } },
{ AR5K_PHY_RX_DELAY,
{ 0x000007d0, 0x000007d0, 0x0000044c, 0x00000898, 0x000007d0 } },
{ AR5K_PHY_FRAME_CTL_5211,
{ 0xf7b81020, 0xf7b81020, 0xf7b80d10, 0xf7b81010, 0xf7b81010 } },
{ AR5K_PHY_CCKTXCTL,
{ 0x00000000, 0x00000000, 0x00000008, 0x00000008, 0x00000008 } },
{ AR5K_PHY_CCK_CROSSCORR,
{ 0xd6be6788, 0xd6be6788, 0xd03e6788, 0xd03e6788, 0xd03e6788 } },
{ AR5K_PHY_GAIN_2GHZ,
{ 0x642c0140, 0x642c0140, 0x6442c160, 0x6442c160, 0x6442c160 } },
{ AR5K_PHY_CCK_RX_CTL_4,
{ 0x1883800a, 0x1883800a, 0x1873800a, 0x1883800a, 0x1883800a } },
};
static const struct ath5k_ini rf5112_ini_common_end[] = {
{ AR5K_DCU_FP, 0x00000000 },
{ AR5K_PHY_AGC, 0x00000000 },
{ AR5K_PHY_ADC_CTL, 0x00022ffe },
{ 0x983c, 0x00020100 },
{ AR5K_PHY_GAIN_OFFSET, 0x1284613c },
{ AR5K_PHY_PAPD_PROBE, 0x00004882 },
{ 0x9940, 0x00000004 },
{ 0x9958, 0x000000ff },
{ 0x9974, 0x00000000 },
{ AR5K_PHY_DAG_CCK_CTL, 0x000001b5 },
{ 0xa23c, 0x13c889af },
};
/* Initial mode-specific settings for RF5413/5414 (Written after ar5212_ini) */
static const struct ath5k_ini_mode rf5413_ini_mode_end[] = {
{ AR5K_TXCFG,
/* a/XR aTurbo b g (DYN) gTurbo */
{ 0x00000015, 0x00000015, 0x00000015, 0x00000015, 0x00000015 } },
{ AR5K_USEC_5211,
{ 0x128d93a7, 0x098813cf, 0x04e01395, 0x12e013ab, 0x098813cf } },
{ AR5K_PHY_RF_CTL3,
{ 0x0a020001, 0x0a020001, 0x05020100, 0x0a020001, 0x0a020001 } },
{ AR5K_PHY_RF_CTL4,
{ 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e } },
{ AR5K_PHY_PA_CTL,
{ 0x00000007, 0x00000007, 0x0000000b, 0x0000000b, 0x0000000b } },
{ AR5K_PHY_GAIN,
{ 0x0018fa61, 0x0018fa61, 0x001a1a63, 0x001a1a63, 0x001a1a63 } },
{ AR5K_PHY_DESIRED_SIZE,
{ 0x0c98b4e0, 0x0c98b4e0, 0x0c98b0da, 0x0c98b0da, 0x0c98b0da } },
{ AR5K_PHY_SIG,
{ 0x7ec80d2e, 0x7ec80d2e, 0x7ec80d2e, 0x7ec80d2e, 0x7ec80d2e } },
{ AR5K_PHY_AGCCOARSE,
{ 0x3139605e, 0x3139605e, 0x3139605e, 0x3139605e, 0x3139605e } },
{ AR5K_PHY_WEAK_OFDM_LOW_THR,
{ 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081 } },
{ AR5K_PHY_RX_DELAY,
{ 0x000007d0, 0x000007d0, 0x0000044c, 0x00000898, 0x000007d0 } },
{ AR5K_PHY_FRAME_CTL_5211,
{ 0xf7b81000, 0xf7b81000, 0xf7b80d00, 0xf7b81000, 0xf7b81000 } },
{ AR5K_PHY_CCKTXCTL,
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
{ AR5K_PHY_CCK_CROSSCORR,
{ 0xd6be6788, 0xd6be6788, 0xd03e6788, 0xd03e6788, 0xd03e6788 } },
{ AR5K_PHY_GAIN_2GHZ,
{ 0x002ec1e0, 0x002ec1e0, 0x002ac120, 0x002ac120, 0x002ac120 } },
{ AR5K_PHY_CCK_RX_CTL_4,
{ 0x1883800a, 0x1883800a, 0x1863800a, 0x1883800a, 0x1883800a } },
{ 0xa300,
{ 0x18010000, 0x18010000, 0x18010000, 0x18010000, 0x18010000 } },
{ 0xa304,
{ 0x30032602, 0x30032602, 0x30032602, 0x30032602, 0x30032602 } },
{ 0xa308,
{ 0x48073e06, 0x48073e06, 0x48073e06, 0x48073e06, 0x48073e06 } },
{ 0xa30c,
{ 0x560b4c0a, 0x560b4c0a, 0x560b4c0a, 0x560b4c0a, 0x560b4c0a } },
{ 0xa310,
{ 0x641a600f, 0x641a600f, 0x641a600f, 0x641a600f, 0x641a600f } },
{ 0xa314,
{ 0x784f6e1b, 0x784f6e1b, 0x784f6e1b, 0x784f6e1b, 0x784f6e1b } },
{ 0xa318,
{ 0x868f7c5a, 0x868f7c5a, 0x868f7c5a, 0x868f7c5a, 0x868f7c5a } },
{ 0xa31c,
{ 0x90cf865b, 0x90cf865b, 0x8ecf865b, 0x8ecf865b, 0x8ecf865b } },
{ 0xa320,
{ 0x9d4f970f, 0x9d4f970f, 0x9b4f970f, 0x9b4f970f, 0x9b4f970f } },
{ 0xa324,
{ 0xa7cfa38f, 0xa7cfa38f, 0xa3cf9f8f, 0xa3cf9f8f, 0xa3cf9f8f } },
{ 0xa328,
{ 0xb55faf1f, 0xb55faf1f, 0xb35faf1f, 0xb35faf1f, 0xb35faf1f } },
{ 0xa32c,
{ 0xbddfb99f, 0xbddfb99f, 0xbbdfb99f, 0xbbdfb99f, 0xbbdfb99f } },
{ 0xa330,
{ 0xcb7fc53f, 0xcb7fc53f, 0xcb7fc73f, 0xcb7fc73f, 0xcb7fc73f } },
{ 0xa334,
{ 0xd5ffd1bf, 0xd5ffd1bf, 0xd3ffd1bf, 0xd3ffd1bf, 0xd3ffd1bf } },
};
static const struct ath5k_ini rf5413_ini_common_end[] = {
{ AR5K_DCU_FP, 0x000003e0 },
{ AR5K_5414_CBCFG, 0x00000010 },
{ AR5K_SEQ_MASK, 0x0000000f },
{ 0x809c, 0x00000000 },
{ 0x80a0, 0x00000000 },
{ AR5K_MIC_QOS_CTL, 0x00000000 },
{ AR5K_MIC_QOS_SEL, 0x00000000 },
{ AR5K_MISC_MODE, 0x00000000 },
{ AR5K_OFDM_FIL_CNT, 0x00000000 },
{ AR5K_CCK_FIL_CNT, 0x00000000 },
{ AR5K_PHYERR_CNT1, 0x00000000 },
{ AR5K_PHYERR_CNT1_MASK, 0x00000000 },
{ AR5K_PHYERR_CNT2, 0x00000000 },
{ AR5K_PHYERR_CNT2_MASK, 0x00000000 },
{ AR5K_TSF_THRES, 0x00000000 },
{ 0x8140, 0x800003f9 },
{ 0x8144, 0x00000000 },
{ AR5K_PHY_AGC, 0x00000000 },
{ AR5K_PHY_ADC_CTL, 0x0000a000 },
{ 0x983c, 0x00200400 },
{ AR5K_PHY_GAIN_OFFSET, 0x1284233c },
{ AR5K_PHY_SCR, 0x0000001f },
{ AR5K_PHY_SLMT, 0x00000080 },
{ AR5K_PHY_SCAL, 0x0000000e },
{ 0x9958, 0x00081fff },
{ AR5K_PHY_TIMING_7, 0x00000000 },
{ AR5K_PHY_TIMING_8, 0x02800000 },
{ AR5K_PHY_TIMING_11, 0x00000000 },
{ AR5K_PHY_HEAVY_CLIP_ENABLE, 0x00000000 },
{ 0x99e4, 0xaaaaaaaa },
{ 0x99e8, 0x3c466478 },
{ 0x99ec, 0x000000aa },
{ AR5K_PHY_SCLOCK, 0x0000000c },
{ AR5K_PHY_SDELAY, 0x000000ff },
{ AR5K_PHY_SPENDING, 0x00000014 },
{ AR5K_PHY_DAG_CCK_CTL, 0x000009b5 },
{ 0xa23c, 0x93c889af },
{ AR5K_PHY_FAST_ADC, 0x00000001 },
{ 0xa250, 0x0000a000 },
{ AR5K_PHY_BLUETOOTH, 0x00000000 },
{ AR5K_PHY_TPC_RG1, 0x0cc75380 },
{ 0xa25c, 0x0f0f0f01 },
{ 0xa260, 0x5f690f01 },
{ 0xa264, 0x00418a11 },
{ 0xa268, 0x00000000 },
{ AR5K_PHY_TPC_RG5, 0x0c30c16a },
{ 0xa270, 0x00820820 },
{ 0xa274, 0x081b7caa },
{ 0xa278, 0x1ce739ce },
{ 0xa27c, 0x051701ce },
{ 0xa338, 0x00000000 },
{ 0xa33c, 0x00000000 },
{ 0xa340, 0x00000000 },
{ 0xa344, 0x00000000 },
{ 0xa348, 0x3fffffff },
{ 0xa34c, 0x3fffffff },
{ 0xa350, 0x3fffffff },
{ 0xa354, 0x0003ffff },
{ 0xa358, 0x79a8aa1f },
{ 0xa35c, 0x066c420f },
{ 0xa360, 0x0f282207 },
{ 0xa364, 0x17601685 },
{ 0xa368, 0x1f801104 },
{ 0xa36c, 0x37a00c03 },
{ 0xa370, 0x3fc40883 },
{ 0xa374, 0x57c00803 },
{ 0xa378, 0x5fd80682 },
{ 0xa37c, 0x7fe00482 },
{ 0xa380, 0x7f3c7bba },
{ 0xa384, 0xf3307ff0 },
};
/* Initial mode-specific settings for RF2413/2414 (Written after ar5212_ini) */
/* XXX: a mode ? */
static const struct ath5k_ini_mode rf2413_ini_mode_end[] = {
{ AR5K_TXCFG,
/* a/XR aTurbo b g (DYN) gTurbo */
{ 0x00000015, 0x00000015, 0x00000015, 0x00000015, 0x00000015 } },
{ AR5K_USEC_5211,
{ 0x128d93a7, 0x098813cf, 0x04e01395, 0x12e013ab, 0x098813cf } },
{ AR5K_PHY_RF_CTL3,
{ 0x0a020001, 0x0a020001, 0x05020000, 0x0a020001, 0x0a020001 } },
{ AR5K_PHY_RF_CTL4,
{ 0x00000e00, 0x00000e00, 0x00000e00, 0x00000e00, 0x00000e00 } },
{ AR5K_PHY_PA_CTL,
{ 0x00000002, 0x00000002, 0x0000000a, 0x0000000a, 0x0000000a } },
{ AR5K_PHY_GAIN,
{ 0x0018da6d, 0x0018da6d, 0x001a6a64, 0x001a6a64, 0x001a6a64 } },
{ AR5K_PHY_DESIRED_SIZE,
{ 0x0de8b4e0, 0x0de8b4e0, 0x0de8b0da, 0x0c98b0da, 0x0de8b0da } },
{ AR5K_PHY_SIG,
{ 0x7e800d2e, 0x7e800d2e, 0x7ee80d2e, 0x7ec80d2e, 0x7e800d2e } },
{ AR5K_PHY_AGCCOARSE,
{ 0x3137665e, 0x3137665e, 0x3137665e, 0x3139605e, 0x3137665e } },
{ AR5K_PHY_WEAK_OFDM_LOW_THR,
{ 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081 } },
{ AR5K_PHY_RX_DELAY,
{ 0x000007d0, 0x000007d0, 0x0000044c, 0x00000898, 0x000007d0 } },
{ AR5K_PHY_FRAME_CTL_5211,
{ 0xf7b81000, 0xf7b81000, 0xf7b80d00, 0xf7b81000, 0xf7b81000 } },
{ AR5K_PHY_CCKTXCTL,
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
{ AR5K_PHY_CCK_CROSSCORR,
{ 0xd6be6788, 0xd6be6788, 0xd03e6788, 0xd03e6788, 0xd03e6788 } },
{ AR5K_PHY_GAIN_2GHZ,
{ 0x002c0140, 0x002c0140, 0x0042c140, 0x0042c140, 0x0042c140 } },
{ AR5K_PHY_CCK_RX_CTL_4,
{ 0x1883800a, 0x1883800a, 0x1863800a, 0x1883800a, 0x1883800a } },
};
static const struct ath5k_ini rf2413_ini_common_end[] = {
{ AR5K_DCU_FP, 0x000003e0 },
{ AR5K_SEQ_MASK, 0x0000000f },
{ AR5K_MIC_QOS_CTL, 0x00000000 },
{ AR5K_MIC_QOS_SEL, 0x00000000 },
{ AR5K_MISC_MODE, 0x00000000 },
{ AR5K_OFDM_FIL_CNT, 0x00000000 },
{ AR5K_CCK_FIL_CNT, 0x00000000 },
{ AR5K_PHYERR_CNT1, 0x00000000 },
{ AR5K_PHYERR_CNT1_MASK, 0x00000000 },
{ AR5K_PHYERR_CNT2, 0x00000000 },
{ AR5K_PHYERR_CNT2_MASK, 0x00000000 },
{ AR5K_TSF_THRES, 0x00000000 },
{ 0x8140, 0x800000a8 },
{ 0x8144, 0x00000000 },
{ AR5K_PHY_AGC, 0x00000000 },
{ AR5K_PHY_ADC_CTL, 0x0000a000 },
{ 0x983c, 0x00200400 },
{ AR5K_PHY_GAIN_OFFSET, 0x1284233c },
{ AR5K_PHY_SCR, 0x0000001f },
{ AR5K_PHY_SLMT, 0x00000080 },
{ AR5K_PHY_SCAL, 0x0000000e },
{ 0x9958, 0x000000ff },
{ AR5K_PHY_TIMING_7, 0x00000000 },
{ AR5K_PHY_TIMING_8, 0x02800000 },
{ AR5K_PHY_TIMING_11, 0x00000000 },
{ AR5K_PHY_HEAVY_CLIP_ENABLE, 0x00000000 },
{ 0x99e4, 0xaaaaaaaa },
{ 0x99e8, 0x3c466478 },
{ 0x99ec, 0x000000aa },
{ AR5K_PHY_SCLOCK, 0x0000000c },
{ AR5K_PHY_SDELAY, 0x000000ff },
{ AR5K_PHY_SPENDING, 0x00000014 },
{ AR5K_PHY_DAG_CCK_CTL, 0x000009b5 },
{ 0xa23c, 0x93c889af },
{ AR5K_PHY_FAST_ADC, 0x00000001 },
{ 0xa250, 0x0000a000 },
{ AR5K_PHY_BLUETOOTH, 0x00000000 },
{ AR5K_PHY_TPC_RG1, 0x0cc75380 },
{ 0xa25c, 0x0f0f0f01 },
{ 0xa260, 0x5f690f01 },
{ 0xa264, 0x00418a11 },
{ 0xa268, 0x00000000 },
{ AR5K_PHY_TPC_RG5, 0x0c30c16a },
{ 0xa270, 0x00820820 },
{ 0xa274, 0x001b7caa },
{ 0xa278, 0x1ce739ce },
{ 0xa27c, 0x051701ce },
{ 0xa300, 0x18010000 },
{ 0xa304, 0x30032602 },
{ 0xa308, 0x48073e06 },
{ 0xa30c, 0x560b4c0a },
{ 0xa310, 0x641a600f },
{ 0xa314, 0x784f6e1b },
{ 0xa318, 0x868f7c5a },
{ 0xa31c, 0x8ecf865b },
{ 0xa320, 0x9d4f970f },
{ 0xa324, 0xa5cfa18f },
{ 0xa328, 0xb55faf1f },
{ 0xa32c, 0xbddfb99f },
{ 0xa330, 0xcd7fc73f },
{ 0xa334, 0xd5ffd1bf },
{ 0xa338, 0x00000000 },
{ 0xa33c, 0x00000000 },
{ 0xa340, 0x00000000 },
{ 0xa344, 0x00000000 },
{ 0xa348, 0x3fffffff },
{ 0xa34c, 0x3fffffff },
{ 0xa350, 0x3fffffff },
{ 0xa354, 0x0003ffff },
{ 0xa358, 0x79a8aa1f },
{ 0xa35c, 0x066c420f },
{ 0xa360, 0x0f282207 },
{ 0xa364, 0x17601685 },
{ 0xa368, 0x1f801104 },
{ 0xa36c, 0x37a00c03 },
{ 0xa370, 0x3fc40883 },
{ 0xa374, 0x57c00803 },
{ 0xa378, 0x5fd80682 },
{ 0xa37c, 0x7fe00482 },
{ 0xa380, 0x7f3c7bba },
{ 0xa384, 0xf3307ff0 },
};
/* Initial mode-specific settings for RF2425 (Written after ar5212_ini) */
/* XXX: a mode ? */
static const struct ath5k_ini_mode rf2425_ini_mode_end[] = {
{ AR5K_TXCFG,
/* a/XR aTurbo b g (DYN) gTurbo */
{ 0x00000015, 0x00000015, 0x00000015, 0x00000015, 0x00000015 } },
{ AR5K_USEC_5211,
{ 0x128d93a7, 0x098813cf, 0x04e01395, 0x12e013ab, 0x098813cf } },
{ AR5K_PHY_TURBO,
{ 0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000001 } },
{ AR5K_PHY_RF_CTL3,
{ 0x0a020001, 0x0a020001, 0x05020100, 0x0a020001, 0x0a020001 } },
{ AR5K_PHY_RF_CTL4,
{ 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e } },
{ AR5K_PHY_PA_CTL,
{ 0x00000003, 0x00000003, 0x0000000b, 0x0000000b, 0x0000000b } },
{ AR5K_PHY_SETTLING,
{ 0x1372161c, 0x13721c25, 0x13721722, 0x13721422, 0x13721c25 } },
{ AR5K_PHY_GAIN,
{ 0x0018fa61, 0x0018fa61, 0x00199a65, 0x00199a65, 0x00199a65 } },
{ AR5K_PHY_DESIRED_SIZE,
{ 0x0c98b4e0, 0x0c98b4e0, 0x0c98b0da, 0x0c98b0da, 0x0c98b0da } },
{ AR5K_PHY_SIG,
{ 0x7ec80d2e, 0x7ec80d2e, 0x7ec80d2e, 0x7ec80d2e, 0x7ec80d2e } },
{ AR5K_PHY_AGCCOARSE,
{ 0x3139605e, 0x3139605e, 0x3139605e, 0x3139605e, 0x3139605e } },
{ AR5K_PHY_WEAK_OFDM_LOW_THR,
{ 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081 } },
{ AR5K_PHY_RX_DELAY,
{ 0x000007d0, 0x000007d0, 0x0000044c, 0x00000898, 0x000007d0 } },
{ AR5K_PHY_FRAME_CTL_5211,
{ 0xf7b81000, 0xf7b81000, 0xf7b80d00, 0xf7b81000, 0xf7b81000 } },
{ AR5K_PHY_CCKTXCTL,
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
{ AR5K_PHY_CCK_CROSSCORR,
{ 0xd6be6788, 0xd6be6788, 0xd03e6788, 0xd03e6788, 0xd03e6788 } },
{ AR5K_PHY_GAIN_2GHZ,
{ 0x00000140, 0x00000140, 0x0052c140, 0x0052c140, 0x0052c140 } },
{ AR5K_PHY_CCK_RX_CTL_4,
{ 0x1883800a, 0x1883800a, 0x1863800a, 0x1883800a, 0x1883800a } },
{ 0xa324,
{ 0xa7cfa7cf, 0xa7cfa7cf, 0xa7cfa7cf, 0xa7cfa7cf, 0xa7cfa7cf } },
{ 0xa328,
{ 0xa7cfa7cf, 0xa7cfa7cf, 0xa7cfa7cf, 0xa7cfa7cf, 0xa7cfa7cf } },
{ 0xa32c,
{ 0xa7cfa7cf, 0xa7cfa7cf, 0xa7cfa7cf, 0xa7cfa7cf, 0xa7cfa7cf } },
{ 0xa330,
{ 0xa7cfa7cf, 0xa7cfa7cf, 0xa7cfa7cf, 0xa7cfa7cf, 0xa7cfa7cf } },
{ 0xa334,
{ 0xa7cfa7cf, 0xa7cfa7cf, 0xa7cfa7cf, 0xa7cfa7cf, 0xa7cfa7cf } },
};
static const struct ath5k_ini rf2425_ini_common_end[] = {
{ AR5K_DCU_FP, 0x000003e0 },
{ AR5K_SEQ_MASK, 0x0000000f },
{ 0x809c, 0x00000000 },
{ 0x80a0, 0x00000000 },
{ AR5K_MIC_QOS_CTL, 0x00000000 },
{ AR5K_MIC_QOS_SEL, 0x00000000 },
{ AR5K_MISC_MODE, 0x00000000 },
{ AR5K_OFDM_FIL_CNT, 0x00000000 },
{ AR5K_CCK_FIL_CNT, 0x00000000 },
{ AR5K_PHYERR_CNT1, 0x00000000 },
{ AR5K_PHYERR_CNT1_MASK, 0x00000000 },
{ AR5K_PHYERR_CNT2, 0x00000000 },
{ AR5K_PHYERR_CNT2_MASK, 0x00000000 },
{ AR5K_TSF_THRES, 0x00000000 },
{ 0x8140, 0x800003f9 },
{ 0x8144, 0x00000000 },
{ AR5K_PHY_AGC, 0x00000000 },
{ AR5K_PHY_ADC_CTL, 0x0000a000 },
{ 0x983c, 0x00200400 },
{ AR5K_PHY_GAIN_OFFSET, 0x1284233c },
{ AR5K_PHY_SCR, 0x0000001f },
{ AR5K_PHY_SLMT, 0x00000080 },
{ AR5K_PHY_SCAL, 0x0000000e },
{ 0x9958, 0x00081fff },
{ AR5K_PHY_TIMING_7, 0x00000000 },
{ AR5K_PHY_TIMING_8, 0x02800000 },
{ AR5K_PHY_TIMING_11, 0x00000000 },
{ 0x99dc, 0xfebadbe8 },
{ AR5K_PHY_HEAVY_CLIP_ENABLE, 0x00000000 },
{ 0x99e4, 0xaaaaaaaa },
{ 0x99e8, 0x3c466478 },
{ 0x99ec, 0x000000aa },
{ AR5K_PHY_SCLOCK, 0x0000000c },
{ AR5K_PHY_SDELAY, 0x000000ff },
{ AR5K_PHY_SPENDING, 0x00000014 },
{ AR5K_PHY_DAG_CCK_CTL, 0x000009b5 },
{ AR5K_PHY_TXPOWER_RATE3, 0x20202020 },
{ AR5K_PHY_TXPOWER_RATE4, 0x20202020 },
{ 0xa23c, 0x93c889af },
{ AR5K_PHY_FAST_ADC, 0x00000001 },
{ 0xa250, 0x0000a000 },
{ AR5K_PHY_BLUETOOTH, 0x00000000 },
{ AR5K_PHY_TPC_RG1, 0x0cc75380 },
{ 0xa25c, 0x0f0f0f01 },
{ 0xa260, 0x5f690f01 },
{ 0xa264, 0x00418a11 },
{ 0xa268, 0x00000000 },
{ AR5K_PHY_TPC_RG5, 0x0c30c166 },
{ 0xa270, 0x00820820 },
{ 0xa274, 0x081a3caa },
{ 0xa278, 0x1ce739ce },
{ 0xa27c, 0x051701ce },
{ 0xa300, 0x16010000 },
{ 0xa304, 0x2c032402 },
{ 0xa308, 0x48433e42 },
{ 0xa30c, 0x5a0f500b },
{ 0xa310, 0x6c4b624a },
{ 0xa314, 0x7e8b748a },
{ 0xa318, 0x96cf8ccb },
{ 0xa31c, 0xa34f9d0f },
{ 0xa320, 0xa7cfa58f },
{ 0xa348, 0x3fffffff },
{ 0xa34c, 0x3fffffff },
{ 0xa350, 0x3fffffff },
{ 0xa354, 0x0003ffff },
{ 0xa358, 0x79a8aa1f },
{ 0xa35c, 0x066c420f },
{ 0xa360, 0x0f282207 },
{ 0xa364, 0x17601685 },
{ 0xa368, 0x1f801104 },
{ 0xa36c, 0x37a00c03 },
{ 0xa370, 0x3fc40883 },
{ 0xa374, 0x57c00803 },
{ 0xa378, 0x5fd80682 },
{ 0xa37c, 0x7fe00482 },
{ 0xa380, 0x7f3c7bba },
{ 0xa384, 0xf3307ff0 },
};
/*
* Initial BaseBand Gain settings for RF5111/5112 (AR5210 comes with
* RF5110 only so initial BB Gain settings are included in AR5K_AR5210_INI)
*/
/* RF5111 Initial BaseBand Gain settings */
static const struct ath5k_ini rf5111_ini_bbgain[] = {
{ AR5K_BB_GAIN(0), 0x00000000 },
{ AR5K_BB_GAIN(1), 0x00000020 },
{ AR5K_BB_GAIN(2), 0x00000010 },
{ AR5K_BB_GAIN(3), 0x00000030 },
{ AR5K_BB_GAIN(4), 0x00000008 },
{ AR5K_BB_GAIN(5), 0x00000028 },
{ AR5K_BB_GAIN(6), 0x00000004 },
{ AR5K_BB_GAIN(7), 0x00000024 },
{ AR5K_BB_GAIN(8), 0x00000014 },
{ AR5K_BB_GAIN(9), 0x00000034 },
{ AR5K_BB_GAIN(10), 0x0000000c },
{ AR5K_BB_GAIN(11), 0x0000002c },
{ AR5K_BB_GAIN(12), 0x00000002 },
{ AR5K_BB_GAIN(13), 0x00000022 },
{ AR5K_BB_GAIN(14), 0x00000012 },
{ AR5K_BB_GAIN(15), 0x00000032 },
{ AR5K_BB_GAIN(16), 0x0000000a },
{ AR5K_BB_GAIN(17), 0x0000002a },
{ AR5K_BB_GAIN(18), 0x00000006 },
{ AR5K_BB_GAIN(19), 0x00000026 },
{ AR5K_BB_GAIN(20), 0x00000016 },
{ AR5K_BB_GAIN(21), 0x00000036 },
{ AR5K_BB_GAIN(22), 0x0000000e },
{ AR5K_BB_GAIN(23), 0x0000002e },
{ AR5K_BB_GAIN(24), 0x00000001 },
{ AR5K_BB_GAIN(25), 0x00000021 },
{ AR5K_BB_GAIN(26), 0x00000011 },
{ AR5K_BB_GAIN(27), 0x00000031 },
{ AR5K_BB_GAIN(28), 0x00000009 },
{ AR5K_BB_GAIN(29), 0x00000029 },
{ AR5K_BB_GAIN(30), 0x00000005 },
{ AR5K_BB_GAIN(31), 0x00000025 },
{ AR5K_BB_GAIN(32), 0x00000015 },
{ AR5K_BB_GAIN(33), 0x00000035 },
{ AR5K_BB_GAIN(34), 0x0000000d },
{ AR5K_BB_GAIN(35), 0x0000002d },
{ AR5K_BB_GAIN(36), 0x00000003 },
{ AR5K_BB_GAIN(37), 0x00000023 },
{ AR5K_BB_GAIN(38), 0x00000013 },
{ AR5K_BB_GAIN(39), 0x00000033 },
{ AR5K_BB_GAIN(40), 0x0000000b },
{ AR5K_BB_GAIN(41), 0x0000002b },
{ AR5K_BB_GAIN(42), 0x0000002b },
{ AR5K_BB_GAIN(43), 0x0000002b },
{ AR5K_BB_GAIN(44), 0x0000002b },
{ AR5K_BB_GAIN(45), 0x0000002b },
{ AR5K_BB_GAIN(46), 0x0000002b },
{ AR5K_BB_GAIN(47), 0x0000002b },
{ AR5K_BB_GAIN(48), 0x0000002b },
{ AR5K_BB_GAIN(49), 0x0000002b },
{ AR5K_BB_GAIN(50), 0x0000002b },
{ AR5K_BB_GAIN(51), 0x0000002b },
{ AR5K_BB_GAIN(52), 0x0000002b },
{ AR5K_BB_GAIN(53), 0x0000002b },
{ AR5K_BB_GAIN(54), 0x0000002b },
{ AR5K_BB_GAIN(55), 0x0000002b },
{ AR5K_BB_GAIN(56), 0x0000002b },
{ AR5K_BB_GAIN(57), 0x0000002b },
{ AR5K_BB_GAIN(58), 0x0000002b },
{ AR5K_BB_GAIN(59), 0x0000002b },
{ AR5K_BB_GAIN(60), 0x0000002b },
{ AR5K_BB_GAIN(61), 0x0000002b },
{ AR5K_BB_GAIN(62), 0x00000002 },
{ AR5K_BB_GAIN(63), 0x00000016 },
};
/* RF5112 Initial BaseBand Gain settings (Same for RF5413/5414+) */
static const struct ath5k_ini rf5112_ini_bbgain[] = {
{ AR5K_BB_GAIN(0), 0x00000000 },
{ AR5K_BB_GAIN(1), 0x00000001 },
{ AR5K_BB_GAIN(2), 0x00000002 },
{ AR5K_BB_GAIN(3), 0x00000003 },
{ AR5K_BB_GAIN(4), 0x00000004 },
{ AR5K_BB_GAIN(5), 0x00000005 },
{ AR5K_BB_GAIN(6), 0x00000008 },
{ AR5K_BB_GAIN(7), 0x00000009 },
{ AR5K_BB_GAIN(8), 0x0000000a },
{ AR5K_BB_GAIN(9), 0x0000000b },
{ AR5K_BB_GAIN(10), 0x0000000c },
{ AR5K_BB_GAIN(11), 0x0000000d },
{ AR5K_BB_GAIN(12), 0x00000010 },
{ AR5K_BB_GAIN(13), 0x00000011 },
{ AR5K_BB_GAIN(14), 0x00000012 },
{ AR5K_BB_GAIN(15), 0x00000013 },
{ AR5K_BB_GAIN(16), 0x00000014 },
{ AR5K_BB_GAIN(17), 0x00000015 },
{ AR5K_BB_GAIN(18), 0x00000018 },
{ AR5K_BB_GAIN(19), 0x00000019 },
{ AR5K_BB_GAIN(20), 0x0000001a },
{ AR5K_BB_GAIN(21), 0x0000001b },
{ AR5K_BB_GAIN(22), 0x0000001c },
{ AR5K_BB_GAIN(23), 0x0000001d },
{ AR5K_BB_GAIN(24), 0x00000020 },
{ AR5K_BB_GAIN(25), 0x00000021 },
{ AR5K_BB_GAIN(26), 0x00000022 },
{ AR5K_BB_GAIN(27), 0x00000023 },
{ AR5K_BB_GAIN(28), 0x00000024 },
{ AR5K_BB_GAIN(29), 0x00000025 },
{ AR5K_BB_GAIN(30), 0x00000028 },
{ AR5K_BB_GAIN(31), 0x00000029 },
{ AR5K_BB_GAIN(32), 0x0000002a },
{ AR5K_BB_GAIN(33), 0x0000002b },
{ AR5K_BB_GAIN(34), 0x0000002c },
{ AR5K_BB_GAIN(35), 0x0000002d },
{ AR5K_BB_GAIN(36), 0x00000030 },
{ AR5K_BB_GAIN(37), 0x00000031 },
{ AR5K_BB_GAIN(38), 0x00000032 },
{ AR5K_BB_GAIN(39), 0x00000033 },
{ AR5K_BB_GAIN(40), 0x00000034 },
{ AR5K_BB_GAIN(41), 0x00000035 },
{ AR5K_BB_GAIN(42), 0x00000035 },
{ AR5K_BB_GAIN(43), 0x00000035 },
{ AR5K_BB_GAIN(44), 0x00000035 },
{ AR5K_BB_GAIN(45), 0x00000035 },
{ AR5K_BB_GAIN(46), 0x00000035 },
{ AR5K_BB_GAIN(47), 0x00000035 },
{ AR5K_BB_GAIN(48), 0x00000035 },
{ AR5K_BB_GAIN(49), 0x00000035 },
{ AR5K_BB_GAIN(50), 0x00000035 },
{ AR5K_BB_GAIN(51), 0x00000035 },
{ AR5K_BB_GAIN(52), 0x00000035 },
{ AR5K_BB_GAIN(53), 0x00000035 },
{ AR5K_BB_GAIN(54), 0x00000035 },
{ AR5K_BB_GAIN(55), 0x00000035 },
{ AR5K_BB_GAIN(56), 0x00000035 },
{ AR5K_BB_GAIN(57), 0x00000035 },
{ AR5K_BB_GAIN(58), 0x00000035 },
{ AR5K_BB_GAIN(59), 0x00000035 },
{ AR5K_BB_GAIN(60), 0x00000035 },
{ AR5K_BB_GAIN(61), 0x00000035 },
{ AR5K_BB_GAIN(62), 0x00000010 },
{ AR5K_BB_GAIN(63), 0x0000001a },
};
/*
* Write initial register dump
*/
static void ath5k_hw_ini_registers(struct ath5k_hw *ah, unsigned int size,
const struct ath5k_ini *ini_regs, bool change_channel)
{
unsigned int i;
/* Write initial registers */
for (i = 0; i < size; i++) {
/* On channel change there is
* no need to mess with PCU */
if (change_channel &&
ini_regs[i].ini_register >= AR5K_PCU_MIN &&
ini_regs[i].ini_register <= AR5K_PCU_MAX)
continue;
switch (ini_regs[i].ini_mode) {
case AR5K_INI_READ:
/* Cleared on read */
ath5k_hw_reg_read(ah, ini_regs[i].ini_register);
break;
case AR5K_INI_WRITE:
default:
AR5K_REG_WAIT(i);
ath5k_hw_reg_write(ah, ini_regs[i].ini_value,
ini_regs[i].ini_register);
}
}
}
static void ath5k_hw_ini_mode_registers(struct ath5k_hw *ah,
unsigned int size, const struct ath5k_ini_mode *ini_mode,
u8 mode)
{
unsigned int i;
for (i = 0; i < size; i++) {
AR5K_REG_WAIT(i);
ath5k_hw_reg_write(ah, ini_mode[i].mode_value[mode],
(u32)ini_mode[i].mode_register);
}
}
int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool change_channel)
{
/*
* Write initial register settings
*/
/* For AR5212 and combatible */
if (ah->ah_version == AR5K_AR5212) {
/* First set of mode-specific settings */
ath5k_hw_ini_mode_registers(ah,
ARRAY_SIZE(ar5212_ini_mode_start),
ar5212_ini_mode_start, mode);
/*
* Write initial settings common for all modes
*/
ath5k_hw_ini_registers(ah, ARRAY_SIZE(ar5212_ini_common_start),
ar5212_ini_common_start, change_channel);
/* Second set of mode-specific settings */
switch (ah->ah_radio) {
case AR5K_RF5111:
ath5k_hw_ini_mode_registers(ah,
ARRAY_SIZE(rf5111_ini_mode_end),
rf5111_ini_mode_end, mode);
ath5k_hw_ini_registers(ah,
ARRAY_SIZE(rf5111_ini_common_end),
rf5111_ini_common_end, change_channel);
/* Baseband gain table */
ath5k_hw_ini_registers(ah,
ARRAY_SIZE(rf5111_ini_bbgain),
rf5111_ini_bbgain, change_channel);
break;
case AR5K_RF5112:
ath5k_hw_ini_mode_registers(ah,
ARRAY_SIZE(rf5112_ini_mode_end),
rf5112_ini_mode_end, mode);
ath5k_hw_ini_registers(ah,
ARRAY_SIZE(rf5112_ini_common_end),
rf5112_ini_common_end, change_channel);
ath5k_hw_ini_registers(ah,
ARRAY_SIZE(rf5112_ini_bbgain),
rf5112_ini_bbgain, change_channel);
break;
case AR5K_RF5413:
ath5k_hw_ini_mode_registers(ah,
ARRAY_SIZE(rf5413_ini_mode_end),
rf5413_ini_mode_end, mode);
ath5k_hw_ini_registers(ah,
ARRAY_SIZE(rf5413_ini_common_end),
rf5413_ini_common_end, change_channel);
ath5k_hw_ini_registers(ah,
ARRAY_SIZE(rf5112_ini_bbgain),
rf5112_ini_bbgain, change_channel);
break;
case AR5K_RF2316:
case AR5K_RF2413:
ath5k_hw_ini_mode_registers(ah,
ARRAY_SIZE(rf2413_ini_mode_end),
rf2413_ini_mode_end, mode);
ath5k_hw_ini_registers(ah,
ARRAY_SIZE(rf2413_ini_common_end),
rf2413_ini_common_end, change_channel);
/* Override settings from rf2413_ini_common_end */
if (ah->ah_radio == AR5K_RF2316) {
ath5k_hw_reg_write(ah, 0x00004000,
AR5K_PHY_AGC);
ath5k_hw_reg_write(ah, 0x081b7caa,
0xa274);
}
ath5k_hw_ini_registers(ah,
ARRAY_SIZE(rf5112_ini_bbgain),
rf5112_ini_bbgain, change_channel);
break;
case AR5K_RF2317:
case AR5K_RF2425:
ath5k_hw_ini_mode_registers(ah,
ARRAY_SIZE(rf2425_ini_mode_end),
rf2425_ini_mode_end, mode);
ath5k_hw_ini_registers(ah,
ARRAY_SIZE(rf2425_ini_common_end),
rf2425_ini_common_end, change_channel);
ath5k_hw_ini_registers(ah,
ARRAY_SIZE(rf5112_ini_bbgain),
rf5112_ini_bbgain, change_channel);
break;
default:
return -EINVAL;
}
/* For AR5211 */
} else if (ah->ah_version == AR5K_AR5211) {
/* AR5K_MODE_11B */
if (mode > 2) {
ATH5K_ERR(ah->ah_sc,
"unsupported channel mode: %d\n", mode);
return -EINVAL;
}
/* Mode-specific settings */
ath5k_hw_ini_mode_registers(ah, ARRAY_SIZE(ar5211_ini_mode),
ar5211_ini_mode, mode);
/*
* Write initial settings common for all modes
*/
ath5k_hw_ini_registers(ah, ARRAY_SIZE(ar5211_ini),
ar5211_ini, change_channel);
/* AR5211 only comes with 5111 */
/* Baseband gain table */
ath5k_hw_ini_registers(ah, ARRAY_SIZE(rf5111_ini_bbgain),
rf5111_ini_bbgain, change_channel);
/* For AR5210 (for mode settings check out ath5k_hw_reset_tx_queue) */
} else if (ah->ah_version == AR5K_AR5210) {
ath5k_hw_ini_registers(ah, ARRAY_SIZE(ar5210_ini),
ar5210_ini, change_channel);
}
return 0;
}
| gpl-2.0 |
pjh/linux-stable | fs/ocfs2/dlm/dlmconvert.c | 1768 | 15539 | /* -*- mode: c; c-basic-offset: 8; -*-
* vim: noexpandtab sw=8 ts=8 sts=0:
*
* dlmconvert.c
*
* underlying calls for lock conversion
*
* Copyright (C) 2004 Oracle. All rights reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this program; if not, write to the
* Free Software Foundation, Inc., 59 Temple Place - Suite 330,
* Boston, MA 021110-1307, USA.
*
*/
#include <linux/module.h>
#include <linux/fs.h>
#include <linux/types.h>
#include <linux/highmem.h>
#include <linux/init.h>
#include <linux/sysctl.h>
#include <linux/random.h>
#include <linux/blkdev.h>
#include <linux/socket.h>
#include <linux/inet.h>
#include <linux/spinlock.h>
#include "cluster/heartbeat.h"
#include "cluster/nodemanager.h"
#include "cluster/tcp.h"
#include "dlmapi.h"
#include "dlmcommon.h"
#include "dlmconvert.h"
#define MLOG_MASK_PREFIX ML_DLM
#include "cluster/masklog.h"
/* NOTE: __dlmconvert_master is the only function in here that
* needs a spinlock held on entry (res->spinlock) and it is the
* only one that holds a lock on exit (res->spinlock).
* All other functions in here need no locks and drop all of
* the locks that they acquire. */
static enum dlm_status __dlmconvert_master(struct dlm_ctxt *dlm,
struct dlm_lock_resource *res,
struct dlm_lock *lock, int flags,
int type, int *call_ast,
int *kick_thread);
static enum dlm_status dlm_send_remote_convert_request(struct dlm_ctxt *dlm,
struct dlm_lock_resource *res,
struct dlm_lock *lock, int flags, int type);
/*
* this is only called directly by dlmlock(), and only when the
* local node is the owner of the lockres
* locking:
* caller needs: none
* taken: takes and drops res->spinlock
* held on exit: none
* returns: see __dlmconvert_master
*/
enum dlm_status dlmconvert_master(struct dlm_ctxt *dlm,
struct dlm_lock_resource *res,
struct dlm_lock *lock, int flags, int type)
{
int call_ast = 0, kick_thread = 0;
enum dlm_status status;
spin_lock(&res->spinlock);
/* we are not in a network handler, this is fine */
__dlm_wait_on_lockres(res);
__dlm_lockres_reserve_ast(res);
res->state |= DLM_LOCK_RES_IN_PROGRESS;
status = __dlmconvert_master(dlm, res, lock, flags, type,
&call_ast, &kick_thread);
res->state &= ~DLM_LOCK_RES_IN_PROGRESS;
spin_unlock(&res->spinlock);
wake_up(&res->wq);
if (status != DLM_NORMAL && status != DLM_NOTQUEUED)
dlm_error(status);
/* either queue the ast or release it */
if (call_ast)
dlm_queue_ast(dlm, lock);
else
dlm_lockres_release_ast(dlm, res);
if (kick_thread)
dlm_kick_thread(dlm, res);
return status;
}
/* performs lock conversion at the lockres master site
* locking:
* caller needs: res->spinlock
* taken: takes and drops lock->spinlock
* held on exit: res->spinlock
* returns: DLM_NORMAL, DLM_NOTQUEUED, DLM_DENIED
* call_ast: whether ast should be called for this lock
* kick_thread: whether dlm_kick_thread should be called
*/
static enum dlm_status __dlmconvert_master(struct dlm_ctxt *dlm,
struct dlm_lock_resource *res,
struct dlm_lock *lock, int flags,
int type, int *call_ast,
int *kick_thread)
{
enum dlm_status status = DLM_NORMAL;
struct dlm_lock *tmplock=NULL;
assert_spin_locked(&res->spinlock);
mlog(0, "type=%d, convert_type=%d, new convert_type=%d\n",
lock->ml.type, lock->ml.convert_type, type);
spin_lock(&lock->spinlock);
/* already converting? */
if (lock->ml.convert_type != LKM_IVMODE) {
mlog(ML_ERROR, "attempted to convert a lock with a lock "
"conversion pending\n");
status = DLM_DENIED;
goto unlock_exit;
}
/* must be on grant queue to convert */
if (!dlm_lock_on_list(&res->granted, lock)) {
mlog(ML_ERROR, "attempted to convert a lock not on grant "
"queue\n");
status = DLM_DENIED;
goto unlock_exit;
}
if (flags & LKM_VALBLK) {
switch (lock->ml.type) {
case LKM_EXMODE:
/* EX + LKM_VALBLK + convert == set lvb */
mlog(0, "will set lvb: converting %s->%s\n",
dlm_lock_mode_name(lock->ml.type),
dlm_lock_mode_name(type));
lock->lksb->flags |= DLM_LKSB_PUT_LVB;
break;
case LKM_PRMODE:
case LKM_NLMODE:
/* refetch if new level is not NL */
if (type > LKM_NLMODE) {
mlog(0, "will fetch new value into "
"lvb: converting %s->%s\n",
dlm_lock_mode_name(lock->ml.type),
dlm_lock_mode_name(type));
lock->lksb->flags |= DLM_LKSB_GET_LVB;
} else {
mlog(0, "will NOT fetch new value "
"into lvb: converting %s->%s\n",
dlm_lock_mode_name(lock->ml.type),
dlm_lock_mode_name(type));
flags &= ~(LKM_VALBLK);
}
break;
}
}
/* in-place downconvert? */
if (type <= lock->ml.type)
goto grant;
/* upconvert from here on */
status = DLM_NORMAL;
list_for_each_entry(tmplock, &res->granted, list) {
if (tmplock == lock)
continue;
if (!dlm_lock_compatible(tmplock->ml.type, type))
goto switch_queues;
}
list_for_each_entry(tmplock, &res->converting, list) {
if (!dlm_lock_compatible(tmplock->ml.type, type))
goto switch_queues;
/* existing conversion requests take precedence */
if (!dlm_lock_compatible(tmplock->ml.convert_type, type))
goto switch_queues;
}
/* fall thru to grant */
grant:
mlog(0, "res %.*s, granting %s lock\n", res->lockname.len,
res->lockname.name, dlm_lock_mode_name(type));
/* immediately grant the new lock type */
lock->lksb->status = DLM_NORMAL;
if (lock->ml.node == dlm->node_num)
mlog(0, "doing in-place convert for nonlocal lock\n");
lock->ml.type = type;
if (lock->lksb->flags & DLM_LKSB_PUT_LVB)
memcpy(res->lvb, lock->lksb->lvb, DLM_LVB_LEN);
status = DLM_NORMAL;
*call_ast = 1;
goto unlock_exit;
switch_queues:
if (flags & LKM_NOQUEUE) {
mlog(0, "failed to convert NOQUEUE lock %.*s from "
"%d to %d...\n", res->lockname.len, res->lockname.name,
lock->ml.type, type);
status = DLM_NOTQUEUED;
goto unlock_exit;
}
mlog(0, "res %.*s, queueing...\n", res->lockname.len,
res->lockname.name);
lock->ml.convert_type = type;
/* do not alter lock refcount. switching lists. */
list_move_tail(&lock->list, &res->converting);
unlock_exit:
spin_unlock(&lock->spinlock);
if (status == DLM_DENIED) {
__dlm_print_one_lock_resource(res);
}
if (status == DLM_NORMAL)
*kick_thread = 1;
return status;
}
void dlm_revert_pending_convert(struct dlm_lock_resource *res,
struct dlm_lock *lock)
{
/* do not alter lock refcount. switching lists. */
list_move_tail(&lock->list, &res->granted);
lock->ml.convert_type = LKM_IVMODE;
lock->lksb->flags &= ~(DLM_LKSB_GET_LVB|DLM_LKSB_PUT_LVB);
}
/* messages the master site to do lock conversion
* locking:
* caller needs: none
* taken: takes and drops res->spinlock, uses DLM_LOCK_RES_IN_PROGRESS
* held on exit: none
* returns: DLM_NORMAL, DLM_RECOVERING, status from remote node
*/
enum dlm_status dlmconvert_remote(struct dlm_ctxt *dlm,
struct dlm_lock_resource *res,
struct dlm_lock *lock, int flags, int type)
{
enum dlm_status status;
mlog(0, "type=%d, convert_type=%d, busy=%d\n", lock->ml.type,
lock->ml.convert_type, res->state & DLM_LOCK_RES_IN_PROGRESS);
spin_lock(&res->spinlock);
if (res->state & DLM_LOCK_RES_RECOVERING) {
mlog(0, "bailing out early since res is RECOVERING "
"on secondary queue\n");
/* __dlm_print_one_lock_resource(res); */
status = DLM_RECOVERING;
goto bail;
}
/* will exit this call with spinlock held */
__dlm_wait_on_lockres(res);
if (lock->ml.convert_type != LKM_IVMODE) {
__dlm_print_one_lock_resource(res);
mlog(ML_ERROR, "converting a remote lock that is already "
"converting! (cookie=%u:%llu, conv=%d)\n",
dlm_get_lock_cookie_node(be64_to_cpu(lock->ml.cookie)),
dlm_get_lock_cookie_seq(be64_to_cpu(lock->ml.cookie)),
lock->ml.convert_type);
status = DLM_DENIED;
goto bail;
}
res->state |= DLM_LOCK_RES_IN_PROGRESS;
/* move lock to local convert queue */
/* do not alter lock refcount. switching lists. */
list_move_tail(&lock->list, &res->converting);
lock->convert_pending = 1;
lock->ml.convert_type = type;
if (flags & LKM_VALBLK) {
if (lock->ml.type == LKM_EXMODE) {
flags |= LKM_PUT_LVB;
lock->lksb->flags |= DLM_LKSB_PUT_LVB;
} else {
if (lock->ml.convert_type == LKM_NLMODE)
flags &= ~LKM_VALBLK;
else {
flags |= LKM_GET_LVB;
lock->lksb->flags |= DLM_LKSB_GET_LVB;
}
}
}
spin_unlock(&res->spinlock);
/* no locks held here.
* need to wait for a reply as to whether it got queued or not. */
status = dlm_send_remote_convert_request(dlm, res, lock, flags, type);
spin_lock(&res->spinlock);
res->state &= ~DLM_LOCK_RES_IN_PROGRESS;
lock->convert_pending = 0;
/* if it failed, move it back to granted queue */
if (status != DLM_NORMAL) {
if (status != DLM_NOTQUEUED)
dlm_error(status);
dlm_revert_pending_convert(res, lock);
}
bail:
spin_unlock(&res->spinlock);
/* TODO: should this be a wake_one? */
/* wake up any IN_PROGRESS waiters */
wake_up(&res->wq);
return status;
}
/* sends DLM_CONVERT_LOCK_MSG to master site
* locking:
* caller needs: none
* taken: none
* held on exit: none
* returns: DLM_NOLOCKMGR, status from remote node
*/
static enum dlm_status dlm_send_remote_convert_request(struct dlm_ctxt *dlm,
struct dlm_lock_resource *res,
struct dlm_lock *lock, int flags, int type)
{
struct dlm_convert_lock convert;
int tmpret;
enum dlm_status ret;
int status = 0;
struct kvec vec[2];
size_t veclen = 1;
mlog(0, "%.*s\n", res->lockname.len, res->lockname.name);
memset(&convert, 0, sizeof(struct dlm_convert_lock));
convert.node_idx = dlm->node_num;
convert.requested_type = type;
convert.cookie = lock->ml.cookie;
convert.namelen = res->lockname.len;
convert.flags = cpu_to_be32(flags);
memcpy(convert.name, res->lockname.name, convert.namelen);
vec[0].iov_len = sizeof(struct dlm_convert_lock);
vec[0].iov_base = &convert;
if (flags & LKM_PUT_LVB) {
/* extra data to send if we are updating lvb */
vec[1].iov_len = DLM_LVB_LEN;
vec[1].iov_base = lock->lksb->lvb;
veclen++;
}
tmpret = o2net_send_message_vec(DLM_CONVERT_LOCK_MSG, dlm->key,
vec, veclen, res->owner, &status);
if (tmpret >= 0) {
// successfully sent and received
ret = status; // this is already a dlm_status
if (ret == DLM_RECOVERING) {
mlog(0, "node %u returned DLM_RECOVERING from convert "
"message!\n", res->owner);
} else if (ret == DLM_MIGRATING) {
mlog(0, "node %u returned DLM_MIGRATING from convert "
"message!\n", res->owner);
} else if (ret == DLM_FORWARD) {
mlog(0, "node %u returned DLM_FORWARD from convert "
"message!\n", res->owner);
} else if (ret != DLM_NORMAL && ret != DLM_NOTQUEUED)
dlm_error(ret);
} else {
mlog(ML_ERROR, "Error %d when sending message %u (key 0x%x) to "
"node %u\n", tmpret, DLM_CONVERT_LOCK_MSG, dlm->key,
res->owner);
if (dlm_is_host_down(tmpret)) {
/* instead of logging the same network error over
* and over, sleep here and wait for the heartbeat
* to notice the node is dead. times out after 5s. */
dlm_wait_for_node_death(dlm, res->owner,
DLM_NODE_DEATH_WAIT_MAX);
ret = DLM_RECOVERING;
mlog(0, "node %u died so returning DLM_RECOVERING "
"from convert message!\n", res->owner);
} else {
ret = dlm_err_to_dlm_status(tmpret);
}
}
return ret;
}
/* handler for DLM_CONVERT_LOCK_MSG on master site
* locking:
* caller needs: none
* taken: takes and drop res->spinlock
* held on exit: none
* returns: DLM_NORMAL, DLM_IVLOCKID, DLM_BADARGS,
* status from __dlmconvert_master
*/
int dlm_convert_lock_handler(struct o2net_msg *msg, u32 len, void *data,
void **ret_data)
{
struct dlm_ctxt *dlm = data;
struct dlm_convert_lock *cnv = (struct dlm_convert_lock *)msg->buf;
struct dlm_lock_resource *res = NULL;
struct dlm_lock *lock = NULL;
struct dlm_lock *tmp_lock;
struct dlm_lockstatus *lksb;
enum dlm_status status = DLM_NORMAL;
u32 flags;
int call_ast = 0, kick_thread = 0, ast_reserved = 0, wake = 0;
if (!dlm_grab(dlm)) {
dlm_error(DLM_REJECTED);
return DLM_REJECTED;
}
mlog_bug_on_msg(!dlm_domain_fully_joined(dlm),
"Domain %s not fully joined!\n", dlm->name);
if (cnv->namelen > DLM_LOCKID_NAME_MAX) {
status = DLM_IVBUFLEN;
dlm_error(status);
goto leave;
}
flags = be32_to_cpu(cnv->flags);
if ((flags & (LKM_PUT_LVB|LKM_GET_LVB)) ==
(LKM_PUT_LVB|LKM_GET_LVB)) {
mlog(ML_ERROR, "both PUT and GET lvb specified\n");
status = DLM_BADARGS;
goto leave;
}
mlog(0, "lvb: %s\n", flags & LKM_PUT_LVB ? "put lvb" :
(flags & LKM_GET_LVB ? "get lvb" : "none"));
status = DLM_IVLOCKID;
res = dlm_lookup_lockres(dlm, cnv->name, cnv->namelen);
if (!res) {
dlm_error(status);
goto leave;
}
spin_lock(&res->spinlock);
status = __dlm_lockres_state_to_status(res);
if (status != DLM_NORMAL) {
spin_unlock(&res->spinlock);
dlm_error(status);
goto leave;
}
list_for_each_entry(tmp_lock, &res->granted, list) {
if (tmp_lock->ml.cookie == cnv->cookie &&
tmp_lock->ml.node == cnv->node_idx) {
lock = tmp_lock;
dlm_lock_get(lock);
break;
}
}
spin_unlock(&res->spinlock);
if (!lock) {
status = DLM_IVLOCKID;
mlog(ML_ERROR, "did not find lock to convert on grant queue! "
"cookie=%u:%llu\n",
dlm_get_lock_cookie_node(be64_to_cpu(cnv->cookie)),
dlm_get_lock_cookie_seq(be64_to_cpu(cnv->cookie)));
dlm_print_one_lock_resource(res);
goto leave;
}
/* found the lock */
lksb = lock->lksb;
/* see if caller needed to get/put lvb */
if (flags & LKM_PUT_LVB) {
BUG_ON(lksb->flags & (DLM_LKSB_PUT_LVB|DLM_LKSB_GET_LVB));
lksb->flags |= DLM_LKSB_PUT_LVB;
memcpy(&lksb->lvb[0], &cnv->lvb[0], DLM_LVB_LEN);
} else if (flags & LKM_GET_LVB) {
BUG_ON(lksb->flags & (DLM_LKSB_PUT_LVB|DLM_LKSB_GET_LVB));
lksb->flags |= DLM_LKSB_GET_LVB;
}
spin_lock(&res->spinlock);
status = __dlm_lockres_state_to_status(res);
if (status == DLM_NORMAL) {
__dlm_lockres_reserve_ast(res);
ast_reserved = 1;
res->state |= DLM_LOCK_RES_IN_PROGRESS;
status = __dlmconvert_master(dlm, res, lock, flags,
cnv->requested_type,
&call_ast, &kick_thread);
res->state &= ~DLM_LOCK_RES_IN_PROGRESS;
wake = 1;
}
spin_unlock(&res->spinlock);
if (wake)
wake_up(&res->wq);
if (status != DLM_NORMAL) {
if (status != DLM_NOTQUEUED)
dlm_error(status);
lksb->flags &= ~(DLM_LKSB_GET_LVB|DLM_LKSB_PUT_LVB);
}
leave:
if (lock)
dlm_lock_put(lock);
/* either queue the ast or release it, if reserved */
if (call_ast)
dlm_queue_ast(dlm, lock);
else if (ast_reserved)
dlm_lockres_release_ast(dlm, res);
if (kick_thread)
dlm_kick_thread(dlm, res);
if (res)
dlm_lockres_put(res);
dlm_put(dlm);
return status;
}
| gpl-2.0 |
TeamWin/android_kernel_samsung_zerolteeu | arch/x86/kernel/smp.c | 2280 | 8529 | /*
* Intel SMP support routines.
*
* (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
* (c) 1998-99, 2000, 2009 Ingo Molnar <mingo@redhat.com>
* (c) 2002,2003 Andi Kleen, SuSE Labs.
*
* i386 and x86_64 integration by Glauber Costa <gcosta@redhat.com>
*
* This code is released under the GNU General Public License version 2 or
* later.
*/
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/delay.h>
#include <linux/spinlock.h>
#include <linux/export.h>
#include <linux/kernel_stat.h>
#include <linux/mc146818rtc.h>
#include <linux/cache.h>
#include <linux/interrupt.h>
#include <linux/cpu.h>
#include <linux/gfp.h>
#include <asm/mtrr.h>
#include <asm/tlbflush.h>
#include <asm/mmu_context.h>
#include <asm/proto.h>
#include <asm/apic.h>
#include <asm/nmi.h>
/*
* Some notes on x86 processor bugs affecting SMP operation:
*
* Pentium, Pentium Pro, II, III (and all CPUs) have bugs.
* The Linux implications for SMP are handled as follows:
*
* Pentium III / [Xeon]
* None of the E1AP-E3AP errata are visible to the user.
*
* E1AP. see PII A1AP
* E2AP. see PII A2AP
* E3AP. see PII A3AP
*
* Pentium II / [Xeon]
* None of the A1AP-A3AP errata are visible to the user.
*
* A1AP. see PPro 1AP
* A2AP. see PPro 2AP
* A3AP. see PPro 7AP
*
* Pentium Pro
* None of 1AP-9AP errata are visible to the normal user,
* except occasional delivery of 'spurious interrupt' as trap #15.
* This is very rare and a non-problem.
*
* 1AP. Linux maps APIC as non-cacheable
* 2AP. worked around in hardware
* 3AP. fixed in C0 and above steppings microcode update.
* Linux does not use excessive STARTUP_IPIs.
* 4AP. worked around in hardware
* 5AP. symmetric IO mode (normal Linux operation) not affected.
* 'noapic' mode has vector 0xf filled out properly.
* 6AP. 'noapic' mode might be affected - fixed in later steppings
* 7AP. We do not assume writes to the LVT deassering IRQs
* 8AP. We do not enable low power mode (deep sleep) during MP bootup
* 9AP. We do not use mixed mode
*
* Pentium
* There is a marginal case where REP MOVS on 100MHz SMP
* machines with B stepping processors can fail. XXX should provide
* an L1cache=Writethrough or L1cache=off option.
*
* B stepping CPUs may hang. There are hardware work arounds
* for this. We warn about it in case your board doesn't have the work
* arounds. Basically that's so I can tell anyone with a B stepping
* CPU and SMP problems "tough".
*
* Specific items [From Pentium Processor Specification Update]
*
* 1AP. Linux doesn't use remote read
* 2AP. Linux doesn't trust APIC errors
* 3AP. We work around this
* 4AP. Linux never generated 3 interrupts of the same priority
* to cause a lost local interrupt.
* 5AP. Remote read is never used
* 6AP. not affected - worked around in hardware
* 7AP. not affected - worked around in hardware
* 8AP. worked around in hardware - we get explicit CS errors if not
* 9AP. only 'noapic' mode affected. Might generate spurious
* interrupts, we log only the first one and count the
* rest silently.
* 10AP. not affected - worked around in hardware
* 11AP. Linux reads the APIC between writes to avoid this, as per
* the documentation. Make sure you preserve this as it affects
* the C stepping chips too.
* 12AP. not affected - worked around in hardware
* 13AP. not affected - worked around in hardware
* 14AP. we always deassert INIT during bootup
* 15AP. not affected - worked around in hardware
* 16AP. not affected - worked around in hardware
* 17AP. not affected - worked around in hardware
* 18AP. not affected - worked around in hardware
* 19AP. not affected - worked around in BIOS
*
* If this sounds worrying believe me these bugs are either ___RARE___,
* or are signal timing bugs worked around in hardware and there's
* about nothing of note with C stepping upwards.
*/
static atomic_t stopping_cpu = ATOMIC_INIT(-1);
static bool smp_no_nmi_ipi = false;
/*
* this function sends a 'reschedule' IPI to another CPU.
* it goes straight through and wastes no time serializing
* anything. Worst case is that we lose a reschedule ...
*/
static void native_smp_send_reschedule(int cpu)
{
if (unlikely(cpu_is_offline(cpu))) {
WARN_ON(1);
return;
}
apic->send_IPI_mask(cpumask_of(cpu), RESCHEDULE_VECTOR);
}
void native_send_call_func_single_ipi(int cpu)
{
apic->send_IPI_mask(cpumask_of(cpu), CALL_FUNCTION_SINGLE_VECTOR);
}
void native_send_call_func_ipi(const struct cpumask *mask)
{
cpumask_var_t allbutself;
if (!alloc_cpumask_var(&allbutself, GFP_ATOMIC)) {
apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
return;
}
cpumask_copy(allbutself, cpu_online_mask);
cpumask_clear_cpu(smp_processor_id(), allbutself);
if (cpumask_equal(mask, allbutself) &&
cpumask_equal(cpu_online_mask, cpu_callout_mask))
apic->send_IPI_allbutself(CALL_FUNCTION_VECTOR);
else
apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
free_cpumask_var(allbutself);
}
static int smp_stop_nmi_callback(unsigned int val, struct pt_regs *regs)
{
/* We are registered on stopping cpu too, avoid spurious NMI */
if (raw_smp_processor_id() == atomic_read(&stopping_cpu))
return NMI_HANDLED;
stop_this_cpu(NULL);
return NMI_HANDLED;
}
/*
* this function calls the 'stop' function on all other CPUs in the system.
*/
asmlinkage void smp_reboot_interrupt(void)
{
ack_APIC_irq();
irq_enter();
stop_this_cpu(NULL);
irq_exit();
}
static void native_stop_other_cpus(int wait)
{
unsigned long flags;
unsigned long timeout;
if (reboot_force)
return;
/*
* Use an own vector here because smp_call_function
* does lots of things not suitable in a panic situation.
*/
/*
* We start by using the REBOOT_VECTOR irq.
* The irq is treated as a sync point to allow critical
* regions of code on other cpus to release their spin locks
* and re-enable irqs. Jumping straight to an NMI might
* accidentally cause deadlocks with further shutdown/panic
* code. By syncing, we give the cpus up to one second to
* finish their work before we force them off with the NMI.
*/
if (num_online_cpus() > 1) {
/* did someone beat us here? */
if (atomic_cmpxchg(&stopping_cpu, -1, safe_smp_processor_id()) != -1)
return;
/* sync above data before sending IRQ */
wmb();
apic->send_IPI_allbutself(REBOOT_VECTOR);
/*
* Don't wait longer than a second if the caller
* didn't ask us to wait.
*/
timeout = USEC_PER_SEC;
while (num_online_cpus() > 1 && (wait || timeout--))
udelay(1);
}
/* if the REBOOT_VECTOR didn't work, try with the NMI */
if ((num_online_cpus() > 1) && (!smp_no_nmi_ipi)) {
if (register_nmi_handler(NMI_LOCAL, smp_stop_nmi_callback,
NMI_FLAG_FIRST, "smp_stop"))
/* Note: we ignore failures here */
/* Hope the REBOOT_IRQ is good enough */
goto finish;
/* sync above data before sending IRQ */
wmb();
pr_emerg("Shutting down cpus with NMI\n");
apic->send_IPI_allbutself(NMI_VECTOR);
/*
* Don't wait longer than a 10 ms if the caller
* didn't ask us to wait.
*/
timeout = USEC_PER_MSEC * 10;
while (num_online_cpus() > 1 && (wait || timeout--))
udelay(1);
}
finish:
local_irq_save(flags);
disable_local_APIC();
local_irq_restore(flags);
}
/*
* Reschedule call back.
*/
void smp_reschedule_interrupt(struct pt_regs *regs)
{
ack_APIC_irq();
inc_irq_stat(irq_resched_count);
scheduler_ipi();
/*
* KVM uses this interrupt to force a cpu out of guest mode
*/
}
void smp_call_function_interrupt(struct pt_regs *regs)
{
ack_APIC_irq();
irq_enter();
generic_smp_call_function_interrupt();
inc_irq_stat(irq_call_count);
irq_exit();
}
void smp_call_function_single_interrupt(struct pt_regs *regs)
{
ack_APIC_irq();
irq_enter();
generic_smp_call_function_single_interrupt();
inc_irq_stat(irq_call_count);
irq_exit();
}
static int __init nonmi_ipi_setup(char *str)
{
smp_no_nmi_ipi = true;
return 1;
}
__setup("nonmi_ipi", nonmi_ipi_setup);
struct smp_ops smp_ops = {
.smp_prepare_boot_cpu = native_smp_prepare_boot_cpu,
.smp_prepare_cpus = native_smp_prepare_cpus,
.smp_cpus_done = native_smp_cpus_done,
.stop_other_cpus = native_stop_other_cpus,
.smp_send_reschedule = native_smp_send_reschedule,
.cpu_up = native_cpu_up,
.cpu_die = native_cpu_die,
.cpu_disable = native_cpu_disable,
.play_dead = native_play_dead,
.send_call_func_ipi = native_send_call_func_ipi,
.send_call_func_single_ipi = native_send_call_func_single_ipi,
};
EXPORT_SYMBOL_GPL(smp_ops);
| gpl-2.0 |
voidz777/android_kernel_samsung_wmsm8660 | drivers/pcmcia/pxa2xx_palmtx.c | 2536 | 3209 | /*
* linux/drivers/pcmcia/pxa2xx_palmtx.c
*
* Driver for Palm T|X PCMCIA
*
* Copyright (C) 2007-2011 Marek Vasut <marek.vasut@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <asm/mach-types.h>
#include <mach/palmtx.h>
#include "soc_common.h"
static struct gpio palmtx_pcmcia_gpios[] = {
{ GPIO_NR_PALMTX_PCMCIA_POWER1, GPIOF_INIT_LOW, "PCMCIA Power 1" },
{ GPIO_NR_PALMTX_PCMCIA_POWER2, GPIOF_INIT_LOW, "PCMCIA Power 2" },
{ GPIO_NR_PALMTX_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" },
{ GPIO_NR_PALMTX_PCMCIA_READY, GPIOF_IN, "PCMCIA Ready" },
};
static int palmtx_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
{
int ret;
ret = gpio_request_array(palmtx_pcmcia_gpios,
ARRAY_SIZE(palmtx_pcmcia_gpios));
skt->socket.pci_irq = gpio_to_irq(GPIO_NR_PALMTX_PCMCIA_READY);
return ret;
}
static void palmtx_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
{
gpio_free_array(palmtx_pcmcia_gpios, ARRAY_SIZE(palmtx_pcmcia_gpios));
}
static void palmtx_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
struct pcmcia_state *state)
{
state->detect = 1; /* always inserted */
state->ready = !!gpio_get_value(GPIO_NR_PALMTX_PCMCIA_READY);
state->bvd1 = 1;
state->bvd2 = 1;
state->wrprot = 0;
state->vs_3v = 1;
state->vs_Xv = 0;
}
static int
palmtx_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
const socket_state_t *state)
{
gpio_set_value(GPIO_NR_PALMTX_PCMCIA_POWER1, 1);
gpio_set_value(GPIO_NR_PALMTX_PCMCIA_POWER2, 1);
gpio_set_value(GPIO_NR_PALMTX_PCMCIA_RESET,
!!(state->flags & SS_RESET));
return 0;
}
static void palmtx_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
{
}
static void palmtx_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
{
}
static struct pcmcia_low_level palmtx_pcmcia_ops = {
.owner = THIS_MODULE,
.first = 0,
.nr = 1,
.hw_init = palmtx_pcmcia_hw_init,
.hw_shutdown = palmtx_pcmcia_hw_shutdown,
.socket_state = palmtx_pcmcia_socket_state,
.configure_socket = palmtx_pcmcia_configure_socket,
.socket_init = palmtx_pcmcia_socket_init,
.socket_suspend = palmtx_pcmcia_socket_suspend,
};
static struct platform_device *palmtx_pcmcia_device;
static int __init palmtx_pcmcia_init(void)
{
int ret;
if (!machine_is_palmtx())
return -ENODEV;
palmtx_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
if (!palmtx_pcmcia_device)
return -ENOMEM;
ret = platform_device_add_data(palmtx_pcmcia_device, &palmtx_pcmcia_ops,
sizeof(palmtx_pcmcia_ops));
if (!ret)
ret = platform_device_add(palmtx_pcmcia_device);
if (ret)
platform_device_put(palmtx_pcmcia_device);
return ret;
}
static void __exit palmtx_pcmcia_exit(void)
{
platform_device_unregister(palmtx_pcmcia_device);
}
module_init(palmtx_pcmcia_init);
module_exit(palmtx_pcmcia_exit);
MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>");
MODULE_DESCRIPTION("PCMCIA support for Palm T|X");
MODULE_ALIAS("platform:pxa2xx-pcmcia");
MODULE_LICENSE("GPL");
| gpl-2.0 |
iamthedarkone/Nexus-S-Kernel | drivers/target/target_core_fabric_lib.c | 2536 | 12758 | /*******************************************************************************
* Filename: target_core_fabric_lib.c
*
* This file contains generic high level protocol identifier and PR
* handlers for TCM fabric modules
*
* Copyright (c) 2010 Rising Tide Systems, Inc.
* Copyright (c) 2010 Linux-iSCSI.org
*
* Nicholas A. Bellinger <nab@linux-iscsi.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*
******************************************************************************/
#include <linux/string.h>
#include <linux/ctype.h>
#include <linux/spinlock.h>
#include <scsi/scsi.h>
#include <scsi/scsi_cmnd.h>
#include <target/target_core_base.h>
#include <target/target_core_device.h>
#include <target/target_core_transport.h>
#include <target/target_core_fabric_lib.h>
#include <target/target_core_fabric_ops.h>
#include <target/target_core_configfs.h>
#include "target_core_hba.h"
#include "target_core_pr.h"
/*
* Handlers for Serial Attached SCSI (SAS)
*/
u8 sas_get_fabric_proto_ident(struct se_portal_group *se_tpg)
{
/*
* Return a SAS Serial SCSI Protocol identifier for loopback operations
* This is defined in section 7.5.1 Table 362 in spc4r17
*/
return 0x6;
}
EXPORT_SYMBOL(sas_get_fabric_proto_ident);
u32 sas_get_pr_transport_id(
struct se_portal_group *se_tpg,
struct se_node_acl *se_nacl,
struct t10_pr_registration *pr_reg,
int *format_code,
unsigned char *buf)
{
unsigned char binary, *ptr;
int i;
u32 off = 4;
/*
* Set PROTOCOL IDENTIFIER to 6h for SAS
*/
buf[0] = 0x06;
/*
* From spc4r17, 7.5.4.7 TransportID for initiator ports using SCSI
* over SAS Serial SCSI Protocol
*/
ptr = &se_nacl->initiatorname[4]; /* Skip over 'naa. prefix */
for (i = 0; i < 16; i += 2) {
binary = transport_asciihex_to_binaryhex(&ptr[i]);
buf[off++] = binary;
}
/*
* The SAS Transport ID is a hardcoded 24-byte length
*/
return 24;
}
EXPORT_SYMBOL(sas_get_pr_transport_id);
u32 sas_get_pr_transport_id_len(
struct se_portal_group *se_tpg,
struct se_node_acl *se_nacl,
struct t10_pr_registration *pr_reg,
int *format_code)
{
*format_code = 0;
/*
* From spc4r17, 7.5.4.7 TransportID for initiator ports using SCSI
* over SAS Serial SCSI Protocol
*
* The SAS Transport ID is a hardcoded 24-byte length
*/
return 24;
}
EXPORT_SYMBOL(sas_get_pr_transport_id_len);
/*
* Used for handling SCSI fabric dependent TransportIDs in SPC-3 and above
* Persistent Reservation SPEC_I_PT=1 and PROUT REGISTER_AND_MOVE operations.
*/
char *sas_parse_pr_out_transport_id(
struct se_portal_group *se_tpg,
const char *buf,
u32 *out_tid_len,
char **port_nexus_ptr)
{
/*
* Assume the FORMAT CODE 00b from spc4r17, 7.5.4.7 TransportID
* for initiator ports using SCSI over SAS Serial SCSI Protocol
*
* The TransportID for a SAS Initiator Port is of fixed size of
* 24 bytes, and SAS does not contain a I_T nexus identifier,
* so we return the **port_nexus_ptr set to NULL.
*/
*port_nexus_ptr = NULL;
*out_tid_len = 24;
return (char *)&buf[4];
}
EXPORT_SYMBOL(sas_parse_pr_out_transport_id);
/*
* Handlers for Fibre Channel Protocol (FCP)
*/
u8 fc_get_fabric_proto_ident(struct se_portal_group *se_tpg)
{
return 0x0; /* 0 = fcp-2 per SPC4 section 7.5.1 */
}
EXPORT_SYMBOL(fc_get_fabric_proto_ident);
u32 fc_get_pr_transport_id_len(
struct se_portal_group *se_tpg,
struct se_node_acl *se_nacl,
struct t10_pr_registration *pr_reg,
int *format_code)
{
*format_code = 0;
/*
* The FC Transport ID is a hardcoded 24-byte length
*/
return 24;
}
EXPORT_SYMBOL(fc_get_pr_transport_id_len);
u32 fc_get_pr_transport_id(
struct se_portal_group *se_tpg,
struct se_node_acl *se_nacl,
struct t10_pr_registration *pr_reg,
int *format_code,
unsigned char *buf)
{
unsigned char binary, *ptr;
int i;
u32 off = 8;
/*
* PROTOCOL IDENTIFIER is 0h for FCP-2
*
* From spc4r17, 7.5.4.2 TransportID for initiator ports using
* SCSI over Fibre Channel
*
* We convert the ASCII formatted N Port name into a binary
* encoded TransportID.
*/
ptr = &se_nacl->initiatorname[0];
for (i = 0; i < 24; ) {
if (!(strncmp(&ptr[i], ":", 1))) {
i++;
continue;
}
binary = transport_asciihex_to_binaryhex(&ptr[i]);
buf[off++] = binary;
i += 2;
}
/*
* The FC Transport ID is a hardcoded 24-byte length
*/
return 24;
}
EXPORT_SYMBOL(fc_get_pr_transport_id);
char *fc_parse_pr_out_transport_id(
struct se_portal_group *se_tpg,
const char *buf,
u32 *out_tid_len,
char **port_nexus_ptr)
{
/*
* The TransportID for a FC N Port is of fixed size of
* 24 bytes, and FC does not contain a I_T nexus identifier,
* so we return the **port_nexus_ptr set to NULL.
*/
*port_nexus_ptr = NULL;
*out_tid_len = 24;
return (char *)&buf[8];
}
EXPORT_SYMBOL(fc_parse_pr_out_transport_id);
/*
* Handlers for Internet Small Computer Systems Interface (iSCSI)
*/
u8 iscsi_get_fabric_proto_ident(struct se_portal_group *se_tpg)
{
/*
* This value is defined for "Internet SCSI (iSCSI)"
* in spc4r17 section 7.5.1 Table 362
*/
return 0x5;
}
EXPORT_SYMBOL(iscsi_get_fabric_proto_ident);
u32 iscsi_get_pr_transport_id(
struct se_portal_group *se_tpg,
struct se_node_acl *se_nacl,
struct t10_pr_registration *pr_reg,
int *format_code,
unsigned char *buf)
{
u32 off = 4, padding = 0;
u16 len = 0;
spin_lock_irq(&se_nacl->nacl_sess_lock);
/*
* Set PROTOCOL IDENTIFIER to 5h for iSCSI
*/
buf[0] = 0x05;
/*
* From spc4r17 Section 7.5.4.6: TransportID for initiator
* ports using SCSI over iSCSI.
*
* The null-terminated, null-padded (see 4.4.2) ISCSI NAME field
* shall contain the iSCSI name of an iSCSI initiator node (see
* RFC 3720). The first ISCSI NAME field byte containing an ASCII
* null character terminates the ISCSI NAME field without regard for
* the specified length of the iSCSI TransportID or the contents of
* the ADDITIONAL LENGTH field.
*/
len = sprintf(&buf[off], "%s", se_nacl->initiatorname);
/*
* Add Extra byte for NULL terminator
*/
len++;
/*
* If there is ISID present with the registration and *format code == 1
* 1, use iSCSI Initiator port TransportID format.
*
* Otherwise use iSCSI Initiator device TransportID format that
* does not contain the ASCII encoded iSCSI Initiator iSID value
* provied by the iSCSi Initiator during the iSCSI login process.
*/
if ((*format_code == 1) && (pr_reg->isid_present_at_reg)) {
/*
* Set FORMAT CODE 01b for iSCSI Initiator port TransportID
* format.
*/
buf[0] |= 0x40;
/*
* From spc4r17 Section 7.5.4.6: TransportID for initiator
* ports using SCSI over iSCSI. Table 390
*
* The SEPARATOR field shall contain the five ASCII
* characters ",i,0x".
*
* The null-terminated, null-padded ISCSI INITIATOR SESSION ID
* field shall contain the iSCSI initiator session identifier
* (see RFC 3720) in the form of ASCII characters that are the
* hexadecimal digits converted from the binary iSCSI initiator
* session identifier value. The first ISCSI INITIATOR SESSION
* ID field byte containing an ASCII null character
*/
buf[off+len] = 0x2c; off++; /* ASCII Character: "," */
buf[off+len] = 0x69; off++; /* ASCII Character: "i" */
buf[off+len] = 0x2c; off++; /* ASCII Character: "," */
buf[off+len] = 0x30; off++; /* ASCII Character: "0" */
buf[off+len] = 0x78; off++; /* ASCII Character: "x" */
len += 5;
buf[off+len] = pr_reg->pr_reg_isid[0]; off++;
buf[off+len] = pr_reg->pr_reg_isid[1]; off++;
buf[off+len] = pr_reg->pr_reg_isid[2]; off++;
buf[off+len] = pr_reg->pr_reg_isid[3]; off++;
buf[off+len] = pr_reg->pr_reg_isid[4]; off++;
buf[off+len] = pr_reg->pr_reg_isid[5]; off++;
buf[off+len] = '\0'; off++;
len += 7;
}
spin_unlock_irq(&se_nacl->nacl_sess_lock);
/*
* The ADDITIONAL LENGTH field specifies the number of bytes that follow
* in the TransportID. The additional length shall be at least 20 and
* shall be a multiple of four.
*/
padding = ((-len) & 3);
if (padding != 0)
len += padding;
buf[2] = ((len >> 8) & 0xff);
buf[3] = (len & 0xff);
/*
* Increment value for total payload + header length for
* full status descriptor
*/
len += 4;
return len;
}
EXPORT_SYMBOL(iscsi_get_pr_transport_id);
u32 iscsi_get_pr_transport_id_len(
struct se_portal_group *se_tpg,
struct se_node_acl *se_nacl,
struct t10_pr_registration *pr_reg,
int *format_code)
{
u32 len = 0, padding = 0;
spin_lock_irq(&se_nacl->nacl_sess_lock);
len = strlen(se_nacl->initiatorname);
/*
* Add extra byte for NULL terminator
*/
len++;
/*
* If there is ISID present with the registration, use format code:
* 01b: iSCSI Initiator port TransportID format
*
* If there is not an active iSCSI session, use format code:
* 00b: iSCSI Initiator device TransportID format
*/
if (pr_reg->isid_present_at_reg) {
len += 5; /* For ",i,0x" ASCII seperator */
len += 7; /* For iSCSI Initiator Session ID + Null terminator */
*format_code = 1;
} else
*format_code = 0;
spin_unlock_irq(&se_nacl->nacl_sess_lock);
/*
* The ADDITIONAL LENGTH field specifies the number of bytes that follow
* in the TransportID. The additional length shall be at least 20 and
* shall be a multiple of four.
*/
padding = ((-len) & 3);
if (padding != 0)
len += padding;
/*
* Increment value for total payload + header length for
* full status descriptor
*/
len += 4;
return len;
}
EXPORT_SYMBOL(iscsi_get_pr_transport_id_len);
char *iscsi_parse_pr_out_transport_id(
struct se_portal_group *se_tpg,
const char *buf,
u32 *out_tid_len,
char **port_nexus_ptr)
{
char *p;
u32 tid_len, padding;
int i;
u16 add_len;
u8 format_code = (buf[0] & 0xc0);
/*
* Check for FORMAT CODE 00b or 01b from spc4r17, section 7.5.4.6:
*
* TransportID for initiator ports using SCSI over iSCSI,
* from Table 388 -- iSCSI TransportID formats.
*
* 00b Initiator port is identified using the world wide unique
* SCSI device name of the iSCSI initiator
* device containing the initiator port (see table 389).
* 01b Initiator port is identified using the world wide unique
* initiator port identifier (see table 390).10b to 11b
* Reserved
*/
if ((format_code != 0x00) && (format_code != 0x40)) {
printk(KERN_ERR "Illegal format code: 0x%02x for iSCSI"
" Initiator Transport ID\n", format_code);
return NULL;
}
/*
* If the caller wants the TransportID Length, we set that value for the
* entire iSCSI Tarnsport ID now.
*/
if (out_tid_len != NULL) {
add_len = ((buf[2] >> 8) & 0xff);
add_len |= (buf[3] & 0xff);
tid_len = strlen((char *)&buf[4]);
tid_len += 4; /* Add four bytes for iSCSI Transport ID header */
tid_len += 1; /* Add one byte for NULL terminator */
padding = ((-tid_len) & 3);
if (padding != 0)
tid_len += padding;
if ((add_len + 4) != tid_len) {
printk(KERN_INFO "LIO-Target Extracted add_len: %hu "
"does not match calculated tid_len: %u,"
" using tid_len instead\n", add_len+4, tid_len);
*out_tid_len = tid_len;
} else
*out_tid_len = (add_len + 4);
}
/*
* Check for ',i,0x' seperator between iSCSI Name and iSCSI Initiator
* Session ID as defined in Table 390 - iSCSI initiator port TransportID
* format.
*/
if (format_code == 0x40) {
p = strstr((char *)&buf[4], ",i,0x");
if (!(p)) {
printk(KERN_ERR "Unable to locate \",i,0x\" seperator"
" for Initiator port identifier: %s\n",
(char *)&buf[4]);
return NULL;
}
*p = '\0'; /* Terminate iSCSI Name */
p += 5; /* Skip over ",i,0x" seperator */
*port_nexus_ptr = p;
/*
* Go ahead and do the lower case conversion of the received
* 12 ASCII characters representing the ISID in the TransportID
* for comparison against the running iSCSI session's ISID from
* iscsi_target.c:lio_sess_get_initiator_sid()
*/
for (i = 0; i < 12; i++) {
if (isdigit(*p)) {
p++;
continue;
}
*p = tolower(*p);
p++;
}
}
return (char *)&buf[4];
}
EXPORT_SYMBOL(iscsi_parse_pr_out_transport_id);
| gpl-2.0 |
ddikodroid/Finder-Kernel-Source-4.0 | drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_ccmp.c | 2536 | 11434 | /*
* Host AP crypt: host-based CCMP encryption implementation for Host AP driver
*
* Copyright (c) 2003-2004, Jouni Malinen <jkmaline@cc.hut.fi>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation. See README and COPYING for
* more details.
*/
//#include <linux/config.h>
#include <linux/version.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/skbuff.h>
#include <linux/netdevice.h>
#include <linux/if_ether.h>
#include <linux/if_arp.h>
#include <asm/string.h>
#include <linux/wireless.h>
#include "ieee80211.h"
#include <linux/crypto.h>
#include <linux/scatterlist.h>
MODULE_AUTHOR("Jouni Malinen");
MODULE_DESCRIPTION("Host AP crypt: CCMP");
MODULE_LICENSE("GPL");
#ifndef OPENSUSE_SLED
#define OPENSUSE_SLED 0
#endif
#define AES_BLOCK_LEN 16
#define CCMP_HDR_LEN 8
#define CCMP_MIC_LEN 8
#define CCMP_TK_LEN 16
#define CCMP_PN_LEN 6
struct ieee80211_ccmp_data {
u8 key[CCMP_TK_LEN];
int key_set;
u8 tx_pn[CCMP_PN_LEN];
u8 rx_pn[CCMP_PN_LEN];
u32 dot11RSNAStatsCCMPFormatErrors;
u32 dot11RSNAStatsCCMPReplays;
u32 dot11RSNAStatsCCMPDecryptErrors;
int key_idx;
struct crypto_tfm *tfm;
/* scratch buffers for virt_to_page() (crypto API) */
u8 tx_b0[AES_BLOCK_LEN], tx_b[AES_BLOCK_LEN],
tx_e[AES_BLOCK_LEN], tx_s0[AES_BLOCK_LEN];
u8 rx_b0[AES_BLOCK_LEN], rx_b[AES_BLOCK_LEN], rx_a[AES_BLOCK_LEN];
};
void ieee80211_ccmp_aes_encrypt(struct crypto_tfm *tfm,
const u8 pt[16], u8 ct[16])
{
crypto_cipher_encrypt_one((void*)tfm, ct, pt);
}
static void * ieee80211_ccmp_init(int key_idx)
{
struct ieee80211_ccmp_data *priv;
priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
if (priv == NULL)
goto fail;
priv->key_idx = key_idx;
priv->tfm = (void*)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->tfm)) {
printk(KERN_DEBUG "ieee80211_crypt_ccmp: could not allocate "
"crypto API aes\n");
priv->tfm = NULL;
goto fail;
}
return priv;
fail:
if (priv) {
if (priv->tfm)
crypto_free_cipher((void*)priv->tfm);
kfree(priv);
}
return NULL;
}
static void ieee80211_ccmp_deinit(void *priv)
{
struct ieee80211_ccmp_data *_priv = priv;
if (_priv && _priv->tfm)
crypto_free_cipher((void*)_priv->tfm);
kfree(priv);
}
static inline void xor_block(u8 *b, u8 *a, size_t len)
{
int i;
for (i = 0; i < len; i++)
b[i] ^= a[i];
}
static void ccmp_init_blocks(struct crypto_tfm *tfm,
struct ieee80211_hdr_4addr *hdr,
u8 *pn, size_t dlen, u8 *b0, u8 *auth,
u8 *s0)
{
u8 *pos, qc = 0;
size_t aad_len;
u16 fc;
int a4_included, qc_included;
u8 aad[2 * AES_BLOCK_LEN];
fc = le16_to_cpu(hdr->frame_ctl);
a4_included = ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
(IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS));
/*
qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
(WLAN_FC_GET_STYPE(fc) & 0x08));
*/
// fixed by David :2006.9.6
qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
(WLAN_FC_GET_STYPE(fc) & 0x80));
aad_len = 22;
if (a4_included)
aad_len += 6;
if (qc_included) {
pos = (u8 *) &hdr->addr4;
if (a4_included)
pos += 6;
qc = *pos & 0x0f;
aad_len += 2;
}
/* CCM Initial Block:
* Flag (Include authentication header, M=3 (8-octet MIC),
* L=1 (2-octet Dlen))
* Nonce: 0x00 | A2 | PN
* Dlen */
b0[0] = 0x59;
b0[1] = qc;
memcpy(b0 + 2, hdr->addr2, ETH_ALEN);
memcpy(b0 + 8, pn, CCMP_PN_LEN);
b0[14] = (dlen >> 8) & 0xff;
b0[15] = dlen & 0xff;
/* AAD:
* FC with bits 4..6 and 11..13 masked to zero; 14 is always one
* A1 | A2 | A3
* SC with bits 4..15 (seq#) masked to zero
* A4 (if present)
* QC (if present)
*/
pos = (u8 *) hdr;
aad[0] = 0; /* aad_len >> 8 */
aad[1] = aad_len & 0xff;
aad[2] = pos[0] & 0x8f;
aad[3] = pos[1] & 0xc7;
memcpy(aad + 4, hdr->addr1, 3 * ETH_ALEN);
pos = (u8 *) &hdr->seq_ctl;
aad[22] = pos[0] & 0x0f;
aad[23] = 0; /* all bits masked */
memset(aad + 24, 0, 8);
if (a4_included)
memcpy(aad + 24, hdr->addr4, ETH_ALEN);
if (qc_included) {
aad[a4_included ? 30 : 24] = qc;
/* rest of QC masked */
}
/* Start with the first block and AAD */
ieee80211_ccmp_aes_encrypt(tfm, b0, auth);
xor_block(auth, aad, AES_BLOCK_LEN);
ieee80211_ccmp_aes_encrypt(tfm, auth, auth);
xor_block(auth, &aad[AES_BLOCK_LEN], AES_BLOCK_LEN);
ieee80211_ccmp_aes_encrypt(tfm, auth, auth);
b0[0] &= 0x07;
b0[14] = b0[15] = 0;
ieee80211_ccmp_aes_encrypt(tfm, b0, s0);
}
static int ieee80211_ccmp_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
{
struct ieee80211_ccmp_data *key = priv;
int data_len, i;
u8 *pos;
struct ieee80211_hdr_4addr *hdr;
cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
if (skb_headroom(skb) < CCMP_HDR_LEN ||
skb_tailroom(skb) < CCMP_MIC_LEN ||
skb->len < hdr_len)
return -1;
data_len = skb->len - hdr_len;
pos = skb_push(skb, CCMP_HDR_LEN);
memmove(pos, pos + CCMP_HDR_LEN, hdr_len);
pos += hdr_len;
// mic = skb_put(skb, CCMP_MIC_LEN);
i = CCMP_PN_LEN - 1;
while (i >= 0) {
key->tx_pn[i]++;
if (key->tx_pn[i] != 0)
break;
i--;
}
*pos++ = key->tx_pn[5];
*pos++ = key->tx_pn[4];
*pos++ = 0;
*pos++ = (key->key_idx << 6) | (1 << 5) /* Ext IV included */;
*pos++ = key->tx_pn[3];
*pos++ = key->tx_pn[2];
*pos++ = key->tx_pn[1];
*pos++ = key->tx_pn[0];
hdr = (struct ieee80211_hdr_4addr *) skb->data;
if (!tcb_desc->bHwSec)
{
int blocks, last, len;
u8 *mic;
u8 *b0 = key->tx_b0;
u8 *b = key->tx_b;
u8 *e = key->tx_e;
u8 *s0 = key->tx_s0;
//mic is moved to here by john
mic = skb_put(skb, CCMP_MIC_LEN);
ccmp_init_blocks(key->tfm, hdr, key->tx_pn, data_len, b0, b, s0);
blocks = (data_len + AES_BLOCK_LEN - 1) / AES_BLOCK_LEN;
last = data_len % AES_BLOCK_LEN;
for (i = 1; i <= blocks; i++) {
len = (i == blocks && last) ? last : AES_BLOCK_LEN;
/* Authentication */
xor_block(b, pos, len);
ieee80211_ccmp_aes_encrypt(key->tfm, b, b);
/* Encryption, with counter */
b0[14] = (i >> 8) & 0xff;
b0[15] = i & 0xff;
ieee80211_ccmp_aes_encrypt(key->tfm, b0, e);
xor_block(pos, e, len);
pos += len;
}
for (i = 0; i < CCMP_MIC_LEN; i++)
mic[i] = b[i] ^ s0[i];
}
return 0;
}
static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
{
struct ieee80211_ccmp_data *key = priv;
u8 keyidx, *pos;
struct ieee80211_hdr_4addr *hdr;
cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
u8 pn[6];
if (skb->len < hdr_len + CCMP_HDR_LEN + CCMP_MIC_LEN) {
key->dot11RSNAStatsCCMPFormatErrors++;
return -1;
}
hdr = (struct ieee80211_hdr_4addr *) skb->data;
pos = skb->data + hdr_len;
keyidx = pos[3];
if (!(keyidx & (1 << 5))) {
if (net_ratelimit()) {
printk(KERN_DEBUG "CCMP: received packet without ExtIV"
" flag from %pM\n", hdr->addr2);
}
key->dot11RSNAStatsCCMPFormatErrors++;
return -2;
}
keyidx >>= 6;
if (key->key_idx != keyidx) {
printk(KERN_DEBUG "CCMP: RX tkey->key_idx=%d frame "
"keyidx=%d priv=%p\n", key->key_idx, keyidx, priv);
return -6;
}
if (!key->key_set) {
if (net_ratelimit()) {
printk(KERN_DEBUG "CCMP: received packet from %pM"
" with keyid=%d that does not have a configured"
" key\n", hdr->addr2, keyidx);
}
return -3;
}
pn[0] = pos[7];
pn[1] = pos[6];
pn[2] = pos[5];
pn[3] = pos[4];
pn[4] = pos[1];
pn[5] = pos[0];
pos += 8;
if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) {
key->dot11RSNAStatsCCMPReplays++;
return -4;
}
if (!tcb_desc->bHwSec)
{
size_t data_len = skb->len - hdr_len - CCMP_HDR_LEN - CCMP_MIC_LEN;
u8 *mic = skb->data + skb->len - CCMP_MIC_LEN;
u8 *b0 = key->rx_b0;
u8 *b = key->rx_b;
u8 *a = key->rx_a;
int i, blocks, last, len;
ccmp_init_blocks(key->tfm, hdr, pn, data_len, b0, a, b);
xor_block(mic, b, CCMP_MIC_LEN);
blocks = (data_len + AES_BLOCK_LEN - 1) / AES_BLOCK_LEN;
last = data_len % AES_BLOCK_LEN;
for (i = 1; i <= blocks; i++) {
len = (i == blocks && last) ? last : AES_BLOCK_LEN;
/* Decrypt, with counter */
b0[14] = (i >> 8) & 0xff;
b0[15] = i & 0xff;
ieee80211_ccmp_aes_encrypt(key->tfm, b0, b);
xor_block(pos, b, len);
/* Authentication */
xor_block(a, pos, len);
ieee80211_ccmp_aes_encrypt(key->tfm, a, a);
pos += len;
}
if (memcmp(mic, a, CCMP_MIC_LEN) != 0) {
if (net_ratelimit()) {
printk(KERN_DEBUG "CCMP: decrypt failed: STA="
"%pM\n", hdr->addr2);
}
key->dot11RSNAStatsCCMPDecryptErrors++;
return -5;
}
memcpy(key->rx_pn, pn, CCMP_PN_LEN);
}
/* Remove hdr and MIC */
memmove(skb->data + CCMP_HDR_LEN, skb->data, hdr_len);
skb_pull(skb, CCMP_HDR_LEN);
skb_trim(skb, skb->len - CCMP_MIC_LEN);
return keyidx;
}
static int ieee80211_ccmp_set_key(void *key, int len, u8 *seq, void *priv)
{
struct ieee80211_ccmp_data *data = priv;
int keyidx;
struct crypto_tfm *tfm = data->tfm;
keyidx = data->key_idx;
memset(data, 0, sizeof(*data));
data->key_idx = keyidx;
data->tfm = tfm;
if (len == CCMP_TK_LEN) {
memcpy(data->key, key, CCMP_TK_LEN);
data->key_set = 1;
if (seq) {
data->rx_pn[0] = seq[5];
data->rx_pn[1] = seq[4];
data->rx_pn[2] = seq[3];
data->rx_pn[3] = seq[2];
data->rx_pn[4] = seq[1];
data->rx_pn[5] = seq[0];
}
crypto_cipher_setkey((void*)data->tfm, data->key, CCMP_TK_LEN);
} else if (len == 0)
data->key_set = 0;
else
return -1;
return 0;
}
static int ieee80211_ccmp_get_key(void *key, int len, u8 *seq, void *priv)
{
struct ieee80211_ccmp_data *data = priv;
if (len < CCMP_TK_LEN)
return -1;
if (!data->key_set)
return 0;
memcpy(key, data->key, CCMP_TK_LEN);
if (seq) {
seq[0] = data->tx_pn[5];
seq[1] = data->tx_pn[4];
seq[2] = data->tx_pn[3];
seq[3] = data->tx_pn[2];
seq[4] = data->tx_pn[1];
seq[5] = data->tx_pn[0];
}
return CCMP_TK_LEN;
}
static char * ieee80211_ccmp_print_stats(char *p, void *priv)
{
struct ieee80211_ccmp_data *ccmp = priv;
int i;
p += sprintf(p, "key[%d] alg=CCMP key_set=%d tx_pn=",
ccmp->key_idx, ccmp->key_set);
for (i = 0; i < ARRAY_SIZE(ccmp->tx_pn); i++)
p += sprintf(p, "%02x", ccmp->tx_pn[i]);
sprintf(p, " rx_pn=");
for (i = 0; i < ARRAY_SIZE(ccmp->rx_pn); i++)
p += sprintf(p, "%02x", ccmp->tx_pn[i]);
p += sprintf(p, " format_errors=%d replays=%d decrypt_errors=%d\n",
ccmp->dot11RSNAStatsCCMPFormatErrors,
ccmp->dot11RSNAStatsCCMPReplays,
ccmp->dot11RSNAStatsCCMPDecryptErrors);
return p;
}
void ieee80211_ccmp_null(void)
{
return;
}
static struct ieee80211_crypto_ops ieee80211_crypt_ccmp = {
.name = "CCMP",
.init = ieee80211_ccmp_init,
.deinit = ieee80211_ccmp_deinit,
.encrypt_mpdu = ieee80211_ccmp_encrypt,
.decrypt_mpdu = ieee80211_ccmp_decrypt,
.encrypt_msdu = NULL,
.decrypt_msdu = NULL,
.set_key = ieee80211_ccmp_set_key,
.get_key = ieee80211_ccmp_get_key,
.print_stats = ieee80211_ccmp_print_stats,
.extra_prefix_len = CCMP_HDR_LEN,
.extra_postfix_len = CCMP_MIC_LEN,
.owner = THIS_MODULE,
};
int __init ieee80211_crypto_ccmp_init(void)
{
return ieee80211_register_crypto_ops(&ieee80211_crypt_ccmp);
}
void ieee80211_crypto_ccmp_exit(void)
{
ieee80211_unregister_crypto_ops(&ieee80211_crypt_ccmp);
}
| gpl-2.0 |
chrisc93/android_kernel_samsung_jf | sound/usb/mixer.c | 2536 | 63431 | /*
* (Tentative) USB Audio Driver for ALSA
*
* Mixer control part
*
* Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
*
* Many codes borrowed from audio.c by
* Alan Cox (alan@lxorguk.ukuu.org.uk)
* Thomas Sailer (sailer@ife.ee.ethz.ch)
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
/*
* TODOs, for both the mixer and the streaming interfaces:
*
* - support for UAC2 effect units
* - support for graphical equalizers
* - RANGE and MEM set commands (UAC2)
* - RANGE and MEM interrupt dispatchers (UAC2)
* - audio channel clustering (UAC2)
* - audio sample rate converter units (UAC2)
* - proper handling of clock multipliers (UAC2)
* - dispatch clock change notifications (UAC2)
* - stop PCM streams which use a clock that became invalid
* - stop PCM streams which use a clock selector that has changed
* - parse available sample rates again when clock sources changed
*/
#include <linux/bitops.h>
#include <linux/init.h>
#include <linux/list.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/usb.h>
#include <linux/usb/audio.h>
#include <linux/usb/audio-v2.h>
#include <sound/core.h>
#include <sound/control.h>
#include <sound/hwdep.h>
#include <sound/info.h>
#include <sound/tlv.h>
#include "usbaudio.h"
#include "mixer.h"
#include "helper.h"
#include "mixer_quirks.h"
#include "power.h"
#define MAX_ID_ELEMS 256
struct usb_audio_term {
int id;
int type;
int channels;
unsigned int chconfig;
int name;
};
struct usbmix_name_map;
struct mixer_build {
struct snd_usb_audio *chip;
struct usb_mixer_interface *mixer;
unsigned char *buffer;
unsigned int buflen;
DECLARE_BITMAP(unitbitmap, MAX_ID_ELEMS);
struct usb_audio_term oterm;
const struct usbmix_name_map *map;
const struct usbmix_selector_map *selector_map;
};
/*E-mu 0202/0404/0204 eXtension Unit(XU) control*/
enum {
USB_XU_CLOCK_RATE = 0xe301,
USB_XU_CLOCK_SOURCE = 0xe302,
USB_XU_DIGITAL_IO_STATUS = 0xe303,
USB_XU_DEVICE_OPTIONS = 0xe304,
USB_XU_DIRECT_MONITORING = 0xe305,
USB_XU_METERING = 0xe306
};
enum {
USB_XU_CLOCK_SOURCE_SELECTOR = 0x02, /* clock source*/
USB_XU_CLOCK_RATE_SELECTOR = 0x03, /* clock rate */
USB_XU_DIGITAL_FORMAT_SELECTOR = 0x01, /* the spdif format */
USB_XU_SOFT_LIMIT_SELECTOR = 0x03 /* soft limiter */
};
/*
* manual mapping of mixer names
* if the mixer topology is too complicated and the parsed names are
* ambiguous, add the entries in usbmixer_maps.c.
*/
#include "mixer_maps.c"
static const struct usbmix_name_map *
find_map(struct mixer_build *state, int unitid, int control)
{
const struct usbmix_name_map *p = state->map;
if (!p)
return NULL;
for (p = state->map; p->id; p++) {
if (p->id == unitid &&
(!control || !p->control || control == p->control))
return p;
}
return NULL;
}
/* get the mapped name if the unit matches */
static int
check_mapped_name(const struct usbmix_name_map *p, char *buf, int buflen)
{
if (!p || !p->name)
return 0;
buflen--;
return strlcpy(buf, p->name, buflen);
}
/* check whether the control should be ignored */
static inline int
check_ignored_ctl(const struct usbmix_name_map *p)
{
if (!p || p->name || p->dB)
return 0;
return 1;
}
/* dB mapping */
static inline void check_mapped_dB(const struct usbmix_name_map *p,
struct usb_mixer_elem_info *cval)
{
if (p && p->dB) {
cval->dBmin = p->dB->min;
cval->dBmax = p->dB->max;
cval->initialized = 1;
}
}
/* get the mapped selector source name */
static int check_mapped_selector_name(struct mixer_build *state, int unitid,
int index, char *buf, int buflen)
{
const struct usbmix_selector_map *p;
if (! state->selector_map)
return 0;
for (p = state->selector_map; p->id; p++) {
if (p->id == unitid && index < p->count)
return strlcpy(buf, p->names[index], buflen);
}
return 0;
}
/*
* find an audio control unit with the given unit id
*/
static void *find_audio_control_unit(struct mixer_build *state, unsigned char unit)
{
/* we just parse the header */
struct uac_feature_unit_descriptor *hdr = NULL;
while ((hdr = snd_usb_find_desc(state->buffer, state->buflen, hdr,
USB_DT_CS_INTERFACE)) != NULL) {
if (hdr->bLength >= 4 &&
hdr->bDescriptorSubtype >= UAC_INPUT_TERMINAL &&
hdr->bDescriptorSubtype <= UAC2_SAMPLE_RATE_CONVERTER &&
hdr->bUnitID == unit)
return hdr;
}
return NULL;
}
/*
* copy a string with the given id
*/
static int snd_usb_copy_string_desc(struct mixer_build *state, int index, char *buf, int maxlen)
{
int len = usb_string(state->chip->dev, index, buf, maxlen - 1);
buf[len] = 0;
return len;
}
/*
* convert from the byte/word on usb descriptor to the zero-based integer
*/
static int convert_signed_value(struct usb_mixer_elem_info *cval, int val)
{
switch (cval->val_type) {
case USB_MIXER_BOOLEAN:
return !!val;
case USB_MIXER_INV_BOOLEAN:
return !val;
case USB_MIXER_U8:
val &= 0xff;
break;
case USB_MIXER_S8:
val &= 0xff;
if (val >= 0x80)
val -= 0x100;
break;
case USB_MIXER_U16:
val &= 0xffff;
break;
case USB_MIXER_S16:
val &= 0xffff;
if (val >= 0x8000)
val -= 0x10000;
break;
}
return val;
}
/*
* convert from the zero-based int to the byte/word for usb descriptor
*/
static int convert_bytes_value(struct usb_mixer_elem_info *cval, int val)
{
switch (cval->val_type) {
case USB_MIXER_BOOLEAN:
return !!val;
case USB_MIXER_INV_BOOLEAN:
return !val;
case USB_MIXER_S8:
case USB_MIXER_U8:
return val & 0xff;
case USB_MIXER_S16:
case USB_MIXER_U16:
return val & 0xffff;
}
return 0; /* not reached */
}
static int get_relative_value(struct usb_mixer_elem_info *cval, int val)
{
if (! cval->res)
cval->res = 1;
if (val < cval->min)
return 0;
else if (val >= cval->max)
return (cval->max - cval->min + cval->res - 1) / cval->res;
else
return (val - cval->min) / cval->res;
}
static int get_abs_value(struct usb_mixer_elem_info *cval, int val)
{
if (val < 0)
return cval->min;
if (! cval->res)
cval->res = 1;
val *= cval->res;
val += cval->min;
if (val > cval->max)
return cval->max;
return val;
}
/*
* retrieve a mixer value
*/
static int get_ctl_value_v1(struct usb_mixer_elem_info *cval, int request, int validx, int *value_ret)
{
struct snd_usb_audio *chip = cval->mixer->chip;
unsigned char buf[2];
int val_len = cval->val_type >= USB_MIXER_S16 ? 2 : 1;
int timeout = 10;
int err;
err = snd_usb_autoresume(cval->mixer->chip);
if (err < 0)
return -EIO;
while (timeout-- > 0) {
if (snd_usb_ctl_msg(chip->dev, usb_rcvctrlpipe(chip->dev, 0), request,
USB_RECIP_INTERFACE | USB_TYPE_CLASS | USB_DIR_IN,
validx, snd_usb_ctrl_intf(chip) | (cval->id << 8),
buf, val_len) >= val_len) {
*value_ret = convert_signed_value(cval, snd_usb_combine_bytes(buf, val_len));
snd_usb_autosuspend(cval->mixer->chip);
return 0;
}
}
snd_usb_autosuspend(cval->mixer->chip);
snd_printdd(KERN_ERR "cannot get ctl value: req = %#x, wValue = %#x, wIndex = %#x, type = %d\n",
request, validx, snd_usb_ctrl_intf(chip) | (cval->id << 8), cval->val_type);
return -EINVAL;
}
static int get_ctl_value_v2(struct usb_mixer_elem_info *cval, int request, int validx, int *value_ret)
{
struct snd_usb_audio *chip = cval->mixer->chip;
unsigned char buf[2 + 3*sizeof(__u16)]; /* enough space for one range */
unsigned char *val;
int ret, size;
__u8 bRequest;
if (request == UAC_GET_CUR) {
bRequest = UAC2_CS_CUR;
size = sizeof(__u16);
} else {
bRequest = UAC2_CS_RANGE;
size = sizeof(buf);
}
memset(buf, 0, sizeof(buf));
ret = snd_usb_autoresume(chip) ? -EIO : 0;
if (ret)
goto error;
ret = snd_usb_ctl_msg(chip->dev, usb_rcvctrlpipe(chip->dev, 0), bRequest,
USB_RECIP_INTERFACE | USB_TYPE_CLASS | USB_DIR_IN,
validx, snd_usb_ctrl_intf(chip) | (cval->id << 8),
buf, size);
snd_usb_autosuspend(chip);
if (ret < 0) {
error:
snd_printk(KERN_ERR "cannot get ctl value: req = %#x, wValue = %#x, wIndex = %#x, type = %d\n",
request, validx, snd_usb_ctrl_intf(chip) | (cval->id << 8), cval->val_type);
return ret;
}
/* FIXME: how should we handle multiple triplets here? */
switch (request) {
case UAC_GET_CUR:
val = buf;
break;
case UAC_GET_MIN:
val = buf + sizeof(__u16);
break;
case UAC_GET_MAX:
val = buf + sizeof(__u16) * 2;
break;
case UAC_GET_RES:
val = buf + sizeof(__u16) * 3;
break;
default:
return -EINVAL;
}
*value_ret = convert_signed_value(cval, snd_usb_combine_bytes(val, sizeof(__u16)));
return 0;
}
static int get_ctl_value(struct usb_mixer_elem_info *cval, int request, int validx, int *value_ret)
{
return (cval->mixer->protocol == UAC_VERSION_1) ?
get_ctl_value_v1(cval, request, validx, value_ret) :
get_ctl_value_v2(cval, request, validx, value_ret);
}
static int get_cur_ctl_value(struct usb_mixer_elem_info *cval, int validx, int *value)
{
return get_ctl_value(cval, UAC_GET_CUR, validx, value);
}
/* channel = 0: master, 1 = first channel */
static inline int get_cur_mix_raw(struct usb_mixer_elem_info *cval,
int channel, int *value)
{
return get_ctl_value(cval, UAC_GET_CUR, (cval->control << 8) | channel, value);
}
static int get_cur_mix_value(struct usb_mixer_elem_info *cval,
int channel, int index, int *value)
{
int err;
if (cval->cached & (1 << channel)) {
*value = cval->cache_val[index];
return 0;
}
err = get_cur_mix_raw(cval, channel, value);
if (err < 0) {
if (!cval->mixer->ignore_ctl_error)
snd_printd(KERN_ERR "cannot get current value for control %d ch %d: err = %d\n",
cval->control, channel, err);
return err;
}
cval->cached |= 1 << channel;
cval->cache_val[index] = *value;
return 0;
}
/*
* set a mixer value
*/
int snd_usb_mixer_set_ctl_value(struct usb_mixer_elem_info *cval,
int request, int validx, int value_set)
{
struct snd_usb_audio *chip = cval->mixer->chip;
unsigned char buf[2];
int val_len, err, timeout = 10;
if (cval->mixer->protocol == UAC_VERSION_1) {
val_len = cval->val_type >= USB_MIXER_S16 ? 2 : 1;
} else { /* UAC_VERSION_2 */
/* audio class v2 controls are always 2 bytes in size */
val_len = sizeof(__u16);
/* FIXME */
if (request != UAC_SET_CUR) {
snd_printdd(KERN_WARNING "RANGE setting not yet supported\n");
return -EINVAL;
}
request = UAC2_CS_CUR;
}
value_set = convert_bytes_value(cval, value_set);
buf[0] = value_set & 0xff;
buf[1] = (value_set >> 8) & 0xff;
err = snd_usb_autoresume(chip);
if (err < 0)
return -EIO;
while (timeout-- > 0)
if (snd_usb_ctl_msg(chip->dev,
usb_sndctrlpipe(chip->dev, 0), request,
USB_RECIP_INTERFACE | USB_TYPE_CLASS | USB_DIR_OUT,
validx, snd_usb_ctrl_intf(chip) | (cval->id << 8),
buf, val_len) >= 0) {
snd_usb_autosuspend(chip);
return 0;
}
snd_usb_autosuspend(chip);
snd_printdd(KERN_ERR "cannot set ctl value: req = %#x, wValue = %#x, wIndex = %#x, type = %d, data = %#x/%#x\n",
request, validx, snd_usb_ctrl_intf(chip) | (cval->id << 8), cval->val_type, buf[0], buf[1]);
return -EINVAL;
}
static int set_cur_ctl_value(struct usb_mixer_elem_info *cval, int validx, int value)
{
return snd_usb_mixer_set_ctl_value(cval, UAC_SET_CUR, validx, value);
}
static int set_cur_mix_value(struct usb_mixer_elem_info *cval, int channel,
int index, int value)
{
int err;
unsigned int read_only = (channel == 0) ?
cval->master_readonly :
cval->ch_readonly & (1 << (channel - 1));
if (read_only) {
snd_printdd(KERN_INFO "%s(): channel %d of control %d is read_only\n",
__func__, channel, cval->control);
return 0;
}
err = snd_usb_mixer_set_ctl_value(cval, UAC_SET_CUR, (cval->control << 8) | channel,
value);
if (err < 0)
return err;
cval->cached |= 1 << channel;
cval->cache_val[index] = value;
return 0;
}
/*
* TLV callback for mixer volume controls
*/
static int mixer_vol_tlv(struct snd_kcontrol *kcontrol, int op_flag,
unsigned int size, unsigned int __user *_tlv)
{
struct usb_mixer_elem_info *cval = kcontrol->private_data;
DECLARE_TLV_DB_MINMAX(scale, 0, 0);
if (size < sizeof(scale))
return -ENOMEM;
scale[2] = cval->dBmin;
scale[3] = cval->dBmax;
if (copy_to_user(_tlv, scale, sizeof(scale)))
return -EFAULT;
return 0;
}
/*
* parser routines begin here...
*/
static int parse_audio_unit(struct mixer_build *state, int unitid);
/*
* check if the input/output channel routing is enabled on the given bitmap.
* used for mixer unit parser
*/
static int check_matrix_bitmap(unsigned char *bmap, int ich, int och, int num_outs)
{
int idx = ich * num_outs + och;
return bmap[idx >> 3] & (0x80 >> (idx & 7));
}
/*
* add an alsa control element
* search and increment the index until an empty slot is found.
*
* if failed, give up and free the control instance.
*/
int snd_usb_mixer_add_control(struct usb_mixer_interface *mixer,
struct snd_kcontrol *kctl)
{
struct usb_mixer_elem_info *cval = kctl->private_data;
int err;
while (snd_ctl_find_id(mixer->chip->card, &kctl->id))
kctl->id.index++;
if ((err = snd_ctl_add(mixer->chip->card, kctl)) < 0) {
snd_printd(KERN_ERR "cannot add control (err = %d)\n", err);
return err;
}
cval->elem_id = &kctl->id;
cval->next_id_elem = mixer->id_elems[cval->id];
mixer->id_elems[cval->id] = cval;
return 0;
}
/*
* get a terminal name string
*/
static struct iterm_name_combo {
int type;
char *name;
} iterm_names[] = {
{ 0x0300, "Output" },
{ 0x0301, "Speaker" },
{ 0x0302, "Headphone" },
{ 0x0303, "HMD Audio" },
{ 0x0304, "Desktop Speaker" },
{ 0x0305, "Room Speaker" },
{ 0x0306, "Com Speaker" },
{ 0x0307, "LFE" },
{ 0x0600, "External In" },
{ 0x0601, "Analog In" },
{ 0x0602, "Digital In" },
{ 0x0603, "Line" },
{ 0x0604, "Legacy In" },
{ 0x0605, "IEC958 In" },
{ 0x0606, "1394 DA Stream" },
{ 0x0607, "1394 DV Stream" },
{ 0x0700, "Embedded" },
{ 0x0701, "Noise Source" },
{ 0x0702, "Equalization Noise" },
{ 0x0703, "CD" },
{ 0x0704, "DAT" },
{ 0x0705, "DCC" },
{ 0x0706, "MiniDisk" },
{ 0x0707, "Analog Tape" },
{ 0x0708, "Phonograph" },
{ 0x0709, "VCR Audio" },
{ 0x070a, "Video Disk Audio" },
{ 0x070b, "DVD Audio" },
{ 0x070c, "TV Tuner Audio" },
{ 0x070d, "Satellite Rec Audio" },
{ 0x070e, "Cable Tuner Audio" },
{ 0x070f, "DSS Audio" },
{ 0x0710, "Radio Receiver" },
{ 0x0711, "Radio Transmitter" },
{ 0x0712, "Multi-Track Recorder" },
{ 0x0713, "Synthesizer" },
{ 0 },
};
static int get_term_name(struct mixer_build *state, struct usb_audio_term *iterm,
unsigned char *name, int maxlen, int term_only)
{
struct iterm_name_combo *names;
if (iterm->name)
return snd_usb_copy_string_desc(state, iterm->name, name, maxlen);
/* virtual type - not a real terminal */
if (iterm->type >> 16) {
if (term_only)
return 0;
switch (iterm->type >> 16) {
case UAC_SELECTOR_UNIT:
strcpy(name, "Selector"); return 8;
case UAC1_PROCESSING_UNIT:
strcpy(name, "Process Unit"); return 12;
case UAC1_EXTENSION_UNIT:
strcpy(name, "Ext Unit"); return 8;
case UAC_MIXER_UNIT:
strcpy(name, "Mixer"); return 5;
default:
return sprintf(name, "Unit %d", iterm->id);
}
}
switch (iterm->type & 0xff00) {
case 0x0100:
strcpy(name, "PCM"); return 3;
case 0x0200:
strcpy(name, "Mic"); return 3;
case 0x0400:
strcpy(name, "Headset"); return 7;
case 0x0500:
strcpy(name, "Phone"); return 5;
}
for (names = iterm_names; names->type; names++)
if (names->type == iterm->type) {
strcpy(name, names->name);
return strlen(names->name);
}
return 0;
}
/*
* parse the source unit recursively until it reaches to a terminal
* or a branched unit.
*/
static int check_input_term(struct mixer_build *state, int id, struct usb_audio_term *term)
{
int err;
void *p1;
memset(term, 0, sizeof(*term));
while ((p1 = find_audio_control_unit(state, id)) != NULL) {
unsigned char *hdr = p1;
term->id = id;
switch (hdr[2]) {
case UAC_INPUT_TERMINAL:
if (state->mixer->protocol == UAC_VERSION_1) {
struct uac_input_terminal_descriptor *d = p1;
term->type = le16_to_cpu(d->wTerminalType);
term->channels = d->bNrChannels;
term->chconfig = le16_to_cpu(d->wChannelConfig);
term->name = d->iTerminal;
} else { /* UAC_VERSION_2 */
struct uac2_input_terminal_descriptor *d = p1;
term->type = le16_to_cpu(d->wTerminalType);
term->channels = d->bNrChannels;
term->chconfig = le32_to_cpu(d->bmChannelConfig);
term->name = d->iTerminal;
/* call recursively to get the clock selectors */
err = check_input_term(state, d->bCSourceID, term);
if (err < 0)
return err;
}
return 0;
case UAC_FEATURE_UNIT: {
/* the header is the same for v1 and v2 */
struct uac_feature_unit_descriptor *d = p1;
id = d->bSourceID;
break; /* continue to parse */
}
case UAC_MIXER_UNIT: {
struct uac_mixer_unit_descriptor *d = p1;
term->type = d->bDescriptorSubtype << 16; /* virtual type */
term->channels = uac_mixer_unit_bNrChannels(d);
term->chconfig = uac_mixer_unit_wChannelConfig(d, state->mixer->protocol);
term->name = uac_mixer_unit_iMixer(d);
return 0;
}
case UAC_SELECTOR_UNIT:
case UAC2_CLOCK_SELECTOR: {
struct uac_selector_unit_descriptor *d = p1;
/* call recursively to retrieve the channel info */
if (check_input_term(state, d->baSourceID[0], term) < 0)
return -ENODEV;
term->type = d->bDescriptorSubtype << 16; /* virtual type */
term->id = id;
term->name = uac_selector_unit_iSelector(d);
return 0;
}
case UAC1_PROCESSING_UNIT:
case UAC1_EXTENSION_UNIT: {
struct uac_processing_unit_descriptor *d = p1;
if (d->bNrInPins) {
id = d->baSourceID[0];
break; /* continue to parse */
}
term->type = d->bDescriptorSubtype << 16; /* virtual type */
term->channels = uac_processing_unit_bNrChannels(d);
term->chconfig = uac_processing_unit_wChannelConfig(d, state->mixer->protocol);
term->name = uac_processing_unit_iProcessing(d, state->mixer->protocol);
return 0;
}
case UAC2_CLOCK_SOURCE: {
struct uac_clock_source_descriptor *d = p1;
term->type = d->bDescriptorSubtype << 16; /* virtual type */
term->id = id;
term->name = d->iClockSource;
return 0;
}
default:
return -ENODEV;
}
}
return -ENODEV;
}
/*
* Feature Unit
*/
/* feature unit control information */
struct usb_feature_control_info {
const char *name;
unsigned int type; /* control type (mute, volume, etc.) */
};
static struct usb_feature_control_info audio_feature_info[] = {
{ "Mute", USB_MIXER_INV_BOOLEAN },
{ "Volume", USB_MIXER_S16 },
{ "Tone Control - Bass", USB_MIXER_S8 },
{ "Tone Control - Mid", USB_MIXER_S8 },
{ "Tone Control - Treble", USB_MIXER_S8 },
{ "Graphic Equalizer", USB_MIXER_S8 }, /* FIXME: not implemeted yet */
{ "Auto Gain Control", USB_MIXER_BOOLEAN },
{ "Delay Control", USB_MIXER_U16 },
{ "Bass Boost", USB_MIXER_BOOLEAN },
{ "Loudness", USB_MIXER_BOOLEAN },
/* UAC2 specific */
{ "Input Gain Control", USB_MIXER_U16 },
{ "Input Gain Pad Control", USB_MIXER_BOOLEAN },
{ "Phase Inverter Control", USB_MIXER_BOOLEAN },
};
/* private_free callback */
static void usb_mixer_elem_free(struct snd_kcontrol *kctl)
{
kfree(kctl->private_data);
kctl->private_data = NULL;
}
/*
* interface to ALSA control for feature/mixer units
*/
/* volume control quirks */
static void volume_control_quirks(struct usb_mixer_elem_info *cval,
struct snd_kcontrol *kctl)
{
switch (cval->mixer->chip->usb_id) {
case USB_ID(0x0471, 0x0101):
case USB_ID(0x0471, 0x0104):
case USB_ID(0x0471, 0x0105):
case USB_ID(0x0672, 0x1041):
/* quirk for UDA1321/N101.
* note that detection between firmware 2.1.1.7 (N101)
* and later 2.1.1.21 is not very clear from datasheets.
* I hope that the min value is -15360 for newer firmware --jk
*/
if (!strcmp(kctl->id.name, "PCM Playback Volume") &&
cval->min == -15616) {
snd_printk(KERN_INFO
"set volume quirk for UDA1321/N101 chip\n");
cval->max = -256;
}
break;
case USB_ID(0x046d, 0x09a4):
if (!strcmp(kctl->id.name, "Mic Capture Volume")) {
snd_printk(KERN_INFO
"set volume quirk for QuickCam E3500\n");
cval->min = 6080;
cval->max = 8768;
cval->res = 192;
}
break;
case USB_ID(0x046d, 0x0808):
case USB_ID(0x046d, 0x0809):
case USB_ID(0x046d, 0x081d): /* HD Webcam c510 */
case USB_ID(0x046d, 0x0991):
/* Most audio usb devices lie about volume resolution.
* Most Logitech webcams have res = 384.
* Proboly there is some logitech magic behind this number --fishor
*/
if (!strcmp(kctl->id.name, "Mic Capture Volume")) {
snd_printk(KERN_INFO
"set resolution quirk: cval->res = 384\n");
cval->res = 384;
}
break;
}
}
/*
* retrieve the minimum and maximum values for the specified control
*/
static int get_min_max_with_quirks(struct usb_mixer_elem_info *cval,
int default_min, struct snd_kcontrol *kctl)
{
/* for failsafe */
cval->min = default_min;
cval->max = cval->min + 1;
cval->res = 1;
cval->dBmin = cval->dBmax = 0;
if (cval->val_type == USB_MIXER_BOOLEAN ||
cval->val_type == USB_MIXER_INV_BOOLEAN) {
cval->initialized = 1;
} else {
int minchn = 0;
if (cval->cmask) {
int i;
for (i = 0; i < MAX_CHANNELS; i++)
if (cval->cmask & (1 << i)) {
minchn = i + 1;
break;
}
}
if (get_ctl_value(cval, UAC_GET_MAX, (cval->control << 8) | minchn, &cval->max) < 0 ||
get_ctl_value(cval, UAC_GET_MIN, (cval->control << 8) | minchn, &cval->min) < 0) {
snd_printd(KERN_ERR "%d:%d: cannot get min/max values for control %d (id %d)\n",
cval->id, snd_usb_ctrl_intf(cval->mixer->chip), cval->control, cval->id);
return -EINVAL;
}
if (get_ctl_value(cval, UAC_GET_RES, (cval->control << 8) | minchn, &cval->res) < 0) {
cval->res = 1;
} else {
int last_valid_res = cval->res;
while (cval->res > 1) {
if (snd_usb_mixer_set_ctl_value(cval, UAC_SET_RES,
(cval->control << 8) | minchn, cval->res / 2) < 0)
break;
cval->res /= 2;
}
if (get_ctl_value(cval, UAC_GET_RES, (cval->control << 8) | minchn, &cval->res) < 0)
cval->res = last_valid_res;
}
if (cval->res == 0)
cval->res = 1;
/* Additional checks for the proper resolution
*
* Some devices report smaller resolutions than actually
* reacting. They don't return errors but simply clip
* to the lower aligned value.
*/
if (cval->min + cval->res < cval->max) {
int last_valid_res = cval->res;
int saved, test, check;
get_cur_mix_raw(cval, minchn, &saved);
for (;;) {
test = saved;
if (test < cval->max)
test += cval->res;
else
test -= cval->res;
if (test < cval->min || test > cval->max ||
set_cur_mix_value(cval, minchn, 0, test) ||
get_cur_mix_raw(cval, minchn, &check)) {
cval->res = last_valid_res;
break;
}
if (test == check)
break;
cval->res *= 2;
}
set_cur_mix_value(cval, minchn, 0, saved);
}
cval->initialized = 1;
}
if (kctl)
volume_control_quirks(cval, kctl);
/* USB descriptions contain the dB scale in 1/256 dB unit
* while ALSA TLV contains in 1/100 dB unit
*/
cval->dBmin = (convert_signed_value(cval, cval->min) * 100) / 256;
cval->dBmax = (convert_signed_value(cval, cval->max) * 100) / 256;
if (cval->dBmin > cval->dBmax) {
/* something is wrong; assume it's either from/to 0dB */
if (cval->dBmin < 0)
cval->dBmax = 0;
else if (cval->dBmin > 0)
cval->dBmin = 0;
if (cval->dBmin > cval->dBmax) {
/* totally crap, return an error */
return -EINVAL;
}
}
return 0;
}
#define get_min_max(cval, def) get_min_max_with_quirks(cval, def, NULL)
/* get a feature/mixer unit info */
static int mixer_ctl_feature_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
struct usb_mixer_elem_info *cval = kcontrol->private_data;
if (cval->val_type == USB_MIXER_BOOLEAN ||
cval->val_type == USB_MIXER_INV_BOOLEAN)
uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
else
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = cval->channels;
if (cval->val_type == USB_MIXER_BOOLEAN ||
cval->val_type == USB_MIXER_INV_BOOLEAN) {
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 1;
} else {
if (!cval->initialized) {
get_min_max_with_quirks(cval, 0, kcontrol);
if (cval->initialized && cval->dBmin >= cval->dBmax) {
kcontrol->vd[0].access &=
~(SNDRV_CTL_ELEM_ACCESS_TLV_READ |
SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK);
snd_ctl_notify(cval->mixer->chip->card,
SNDRV_CTL_EVENT_MASK_INFO,
&kcontrol->id);
}
}
uinfo->value.integer.min = 0;
uinfo->value.integer.max =
(cval->max - cval->min + cval->res - 1) / cval->res;
}
return 0;
}
/* get the current value from feature/mixer unit */
static int mixer_ctl_feature_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct usb_mixer_elem_info *cval = kcontrol->private_data;
int c, cnt, val, err;
ucontrol->value.integer.value[0] = cval->min;
if (cval->cmask) {
cnt = 0;
for (c = 0; c < MAX_CHANNELS; c++) {
if (!(cval->cmask & (1 << c)))
continue;
err = get_cur_mix_value(cval, c + 1, cnt, &val);
if (err < 0)
return cval->mixer->ignore_ctl_error ? 0 : err;
val = get_relative_value(cval, val);
ucontrol->value.integer.value[cnt] = val;
cnt++;
}
return 0;
} else {
/* master channel */
err = get_cur_mix_value(cval, 0, 0, &val);
if (err < 0)
return cval->mixer->ignore_ctl_error ? 0 : err;
val = get_relative_value(cval, val);
ucontrol->value.integer.value[0] = val;
}
return 0;
}
/* put the current value to feature/mixer unit */
static int mixer_ctl_feature_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct usb_mixer_elem_info *cval = kcontrol->private_data;
int c, cnt, val, oval, err;
int changed = 0;
if (cval->cmask) {
cnt = 0;
for (c = 0; c < MAX_CHANNELS; c++) {
if (!(cval->cmask & (1 << c)))
continue;
err = get_cur_mix_value(cval, c + 1, cnt, &oval);
if (err < 0)
return cval->mixer->ignore_ctl_error ? 0 : err;
val = ucontrol->value.integer.value[cnt];
val = get_abs_value(cval, val);
if (oval != val) {
set_cur_mix_value(cval, c + 1, cnt, val);
changed = 1;
}
cnt++;
}
} else {
/* master channel */
err = get_cur_mix_value(cval, 0, 0, &oval);
if (err < 0)
return cval->mixer->ignore_ctl_error ? 0 : err;
val = ucontrol->value.integer.value[0];
val = get_abs_value(cval, val);
if (val != oval) {
set_cur_mix_value(cval, 0, 0, val);
changed = 1;
}
}
return changed;
}
static struct snd_kcontrol_new usb_feature_unit_ctl = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "", /* will be filled later manually */
.info = mixer_ctl_feature_info,
.get = mixer_ctl_feature_get,
.put = mixer_ctl_feature_put,
};
/* the read-only variant */
static struct snd_kcontrol_new usb_feature_unit_ctl_ro = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "", /* will be filled later manually */
.info = mixer_ctl_feature_info,
.get = mixer_ctl_feature_get,
.put = NULL,
};
/* This symbol is exported in order to allow the mixer quirks to
* hook up to the standard feature unit control mechanism */
struct snd_kcontrol_new *snd_usb_feature_unit_ctl = &usb_feature_unit_ctl;
/*
* build a feature control
*/
static size_t append_ctl_name(struct snd_kcontrol *kctl, const char *str)
{
return strlcat(kctl->id.name, str, sizeof(kctl->id.name));
}
static void build_feature_ctl(struct mixer_build *state, void *raw_desc,
unsigned int ctl_mask, int control,
struct usb_audio_term *iterm, int unitid,
int readonly_mask)
{
struct uac_feature_unit_descriptor *desc = raw_desc;
unsigned int len = 0;
int mapped_name = 0;
int nameid = uac_feature_unit_iFeature(desc);
struct snd_kcontrol *kctl;
struct usb_mixer_elem_info *cval;
const struct usbmix_name_map *map;
unsigned int range;
control++; /* change from zero-based to 1-based value */
if (control == UAC_FU_GRAPHIC_EQUALIZER) {
/* FIXME: not supported yet */
return;
}
map = find_map(state, unitid, control);
if (check_ignored_ctl(map))
return;
cval = kzalloc(sizeof(*cval), GFP_KERNEL);
if (! cval) {
snd_printk(KERN_ERR "cannot malloc kcontrol\n");
return;
}
cval->mixer = state->mixer;
cval->id = unitid;
cval->control = control;
cval->cmask = ctl_mask;
cval->val_type = audio_feature_info[control-1].type;
if (ctl_mask == 0) {
cval->channels = 1; /* master channel */
cval->master_readonly = readonly_mask;
} else {
int i, c = 0;
for (i = 0; i < 16; i++)
if (ctl_mask & (1 << i))
c++;
cval->channels = c;
cval->ch_readonly = readonly_mask;
}
/* if all channels in the mask are marked read-only, make the control
* read-only. set_cur_mix_value() will check the mask again and won't
* issue write commands to read-only channels. */
if (cval->channels == readonly_mask)
kctl = snd_ctl_new1(&usb_feature_unit_ctl_ro, cval);
else
kctl = snd_ctl_new1(&usb_feature_unit_ctl, cval);
if (! kctl) {
snd_printk(KERN_ERR "cannot malloc kcontrol\n");
kfree(cval);
return;
}
kctl->private_free = usb_mixer_elem_free;
len = check_mapped_name(map, kctl->id.name, sizeof(kctl->id.name));
mapped_name = len != 0;
if (! len && nameid)
len = snd_usb_copy_string_desc(state, nameid,
kctl->id.name, sizeof(kctl->id.name));
/* get min/max values */
get_min_max_with_quirks(cval, 0, kctl);
switch (control) {
case UAC_FU_MUTE:
case UAC_FU_VOLUME:
/* determine the control name. the rule is:
* - if a name id is given in descriptor, use it.
* - if the connected input can be determined, then use the name
* of terminal type.
* - if the connected output can be determined, use it.
* - otherwise, anonymous name.
*/
if (! len) {
len = get_term_name(state, iterm, kctl->id.name, sizeof(kctl->id.name), 1);
if (! len)
len = get_term_name(state, &state->oterm, kctl->id.name, sizeof(kctl->id.name), 1);
if (! len)
len = snprintf(kctl->id.name, sizeof(kctl->id.name),
"Feature %d", unitid);
}
/* determine the stream direction:
* if the connected output is USB stream, then it's likely a
* capture stream. otherwise it should be playback (hopefully :)
*/
if (! mapped_name && ! (state->oterm.type >> 16)) {
if ((state->oterm.type & 0xff00) == 0x0100) {
len = append_ctl_name(kctl, " Capture");
} else {
len = append_ctl_name(kctl, " Playback");
}
}
append_ctl_name(kctl, control == UAC_FU_MUTE ?
" Switch" : " Volume");
if (control == UAC_FU_VOLUME) {
check_mapped_dB(map, cval);
if (cval->dBmin < cval->dBmax || !cval->initialized) {
kctl->tlv.c = mixer_vol_tlv;
kctl->vd[0].access |=
SNDRV_CTL_ELEM_ACCESS_TLV_READ |
SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK;
}
}
break;
default:
if (! len)
strlcpy(kctl->id.name, audio_feature_info[control-1].name,
sizeof(kctl->id.name));
break;
}
range = (cval->max - cval->min) / cval->res;
/* Are there devices with volume range more than 255? I use a bit more
* to be sure. 384 is a resolution magic number found on Logitech
* devices. It will definitively catch all buggy Logitech devices.
*/
if (range > 384) {
snd_printk(KERN_WARNING "usb_audio: Warning! Unlikely big "
"volume range (=%u), cval->res is probably wrong.",
range);
snd_printk(KERN_WARNING "usb_audio: [%d] FU [%s] ch = %d, "
"val = %d/%d/%d", cval->id,
kctl->id.name, cval->channels,
cval->min, cval->max, cval->res);
}
snd_printdd(KERN_INFO "[%d] FU [%s] ch = %d, val = %d/%d/%d\n",
cval->id, kctl->id.name, cval->channels, cval->min, cval->max, cval->res);
snd_usb_mixer_add_control(state->mixer, kctl);
}
/*
* parse a feature unit
*
* most of controls are defined here.
*/
static int parse_audio_feature_unit(struct mixer_build *state, int unitid, void *_ftr)
{
int channels, i, j;
struct usb_audio_term iterm;
unsigned int master_bits, first_ch_bits;
int err, csize;
struct uac_feature_unit_descriptor *hdr = _ftr;
__u8 *bmaControls;
if (state->mixer->protocol == UAC_VERSION_1) {
csize = hdr->bControlSize;
if (!csize) {
snd_printdd(KERN_ERR "usbaudio: unit %u: "
"invalid bControlSize == 0\n", unitid);
return -EINVAL;
}
channels = (hdr->bLength - 7) / csize - 1;
bmaControls = hdr->bmaControls;
} else {
struct uac2_feature_unit_descriptor *ftr = _ftr;
csize = 4;
channels = (hdr->bLength - 6) / 4 - 1;
bmaControls = ftr->bmaControls;
}
if (hdr->bLength < 7 || !csize || hdr->bLength < 7 + csize) {
snd_printk(KERN_ERR "usbaudio: unit %u: invalid UAC_FEATURE_UNIT descriptor\n", unitid);
return -EINVAL;
}
/* parse the source unit */
if ((err = parse_audio_unit(state, hdr->bSourceID)) < 0)
return err;
/* determine the input source type and name */
if (check_input_term(state, hdr->bSourceID, &iterm) < 0)
return -EINVAL;
master_bits = snd_usb_combine_bytes(bmaControls, csize);
/* master configuration quirks */
switch (state->chip->usb_id) {
case USB_ID(0x08bb, 0x2702):
snd_printk(KERN_INFO
"usbmixer: master volume quirk for PCM2702 chip\n");
/* disable non-functional volume control */
master_bits &= ~UAC_CONTROL_BIT(UAC_FU_VOLUME);
break;
}
if (channels > 0)
first_ch_bits = snd_usb_combine_bytes(bmaControls + csize, csize);
else
first_ch_bits = 0;
if (state->mixer->protocol == UAC_VERSION_1) {
/* check all control types */
for (i = 0; i < 10; i++) {
unsigned int ch_bits = 0;
for (j = 0; j < channels; j++) {
unsigned int mask = snd_usb_combine_bytes(bmaControls + csize * (j+1), csize);
if (mask & (1 << i))
ch_bits |= (1 << j);
}
/* audio class v1 controls are never read-only */
if (ch_bits & 1) /* the first channel must be set (for ease of programming) */
build_feature_ctl(state, _ftr, ch_bits, i, &iterm, unitid, 0);
if (master_bits & (1 << i))
build_feature_ctl(state, _ftr, 0, i, &iterm, unitid, 0);
}
} else { /* UAC_VERSION_2 */
for (i = 0; i < ARRAY_SIZE(audio_feature_info); i++) {
unsigned int ch_bits = 0;
unsigned int ch_read_only = 0;
for (j = 0; j < channels; j++) {
unsigned int mask = snd_usb_combine_bytes(bmaControls + csize * (j+1), csize);
if (uac2_control_is_readable(mask, i)) {
ch_bits |= (1 << j);
if (!uac2_control_is_writeable(mask, i))
ch_read_only |= (1 << j);
}
}
/* NOTE: build_feature_ctl() will mark the control read-only if all channels
* are marked read-only in the descriptors. Otherwise, the control will be
* reported as writeable, but the driver will not actually issue a write
* command for read-only channels */
if (ch_bits & 1) /* the first channel must be set (for ease of programming) */
build_feature_ctl(state, _ftr, ch_bits, i, &iterm, unitid, ch_read_only);
if (uac2_control_is_readable(master_bits, i))
build_feature_ctl(state, _ftr, 0, i, &iterm, unitid,
!uac2_control_is_writeable(master_bits, i));
}
}
return 0;
}
/*
* Mixer Unit
*/
/*
* build a mixer unit control
*
* the callbacks are identical with feature unit.
* input channel number (zero based) is given in control field instead.
*/
static void build_mixer_unit_ctl(struct mixer_build *state,
struct uac_mixer_unit_descriptor *desc,
int in_pin, int in_ch, int unitid,
struct usb_audio_term *iterm)
{
struct usb_mixer_elem_info *cval;
unsigned int num_outs = uac_mixer_unit_bNrChannels(desc);
unsigned int i, len;
struct snd_kcontrol *kctl;
const struct usbmix_name_map *map;
map = find_map(state, unitid, 0);
if (check_ignored_ctl(map))
return;
cval = kzalloc(sizeof(*cval), GFP_KERNEL);
if (! cval)
return;
cval->mixer = state->mixer;
cval->id = unitid;
cval->control = in_ch + 1; /* based on 1 */
cval->val_type = USB_MIXER_S16;
for (i = 0; i < num_outs; i++) {
if (check_matrix_bitmap(uac_mixer_unit_bmControls(desc, state->mixer->protocol), in_ch, i, num_outs)) {
cval->cmask |= (1 << i);
cval->channels++;
}
}
/* get min/max values */
get_min_max(cval, 0);
kctl = snd_ctl_new1(&usb_feature_unit_ctl, cval);
if (! kctl) {
snd_printk(KERN_ERR "cannot malloc kcontrol\n");
kfree(cval);
return;
}
kctl->private_free = usb_mixer_elem_free;
len = check_mapped_name(map, kctl->id.name, sizeof(kctl->id.name));
if (! len)
len = get_term_name(state, iterm, kctl->id.name, sizeof(kctl->id.name), 0);
if (! len)
len = sprintf(kctl->id.name, "Mixer Source %d", in_ch + 1);
append_ctl_name(kctl, " Volume");
snd_printdd(KERN_INFO "[%d] MU [%s] ch = %d, val = %d/%d\n",
cval->id, kctl->id.name, cval->channels, cval->min, cval->max);
snd_usb_mixer_add_control(state->mixer, kctl);
}
/*
* parse a mixer unit
*/
static int parse_audio_mixer_unit(struct mixer_build *state, int unitid, void *raw_desc)
{
struct uac_mixer_unit_descriptor *desc = raw_desc;
struct usb_audio_term iterm;
int input_pins, num_ins, num_outs;
int pin, ich, err;
if (desc->bLength < 11 || ! (input_pins = desc->bNrInPins) || ! (num_outs = uac_mixer_unit_bNrChannels(desc))) {
snd_printk(KERN_ERR "invalid MIXER UNIT descriptor %d\n", unitid);
return -EINVAL;
}
/* no bmControls field (e.g. Maya44) -> ignore */
if (desc->bLength <= 10 + input_pins) {
snd_printdd(KERN_INFO "MU %d has no bmControls field\n", unitid);
return 0;
}
num_ins = 0;
ich = 0;
for (pin = 0; pin < input_pins; pin++) {
err = parse_audio_unit(state, desc->baSourceID[pin]);
if (err < 0)
return err;
err = check_input_term(state, desc->baSourceID[pin], &iterm);
if (err < 0)
return err;
num_ins += iterm.channels;
for (; ich < num_ins; ++ich) {
int och, ich_has_controls = 0;
for (och = 0; och < num_outs; ++och) {
if (check_matrix_bitmap(uac_mixer_unit_bmControls(desc, state->mixer->protocol),
ich, och, num_outs)) {
ich_has_controls = 1;
break;
}
}
if (ich_has_controls)
build_mixer_unit_ctl(state, desc, pin, ich,
unitid, &iterm);
}
}
return 0;
}
/*
* Processing Unit / Extension Unit
*/
/* get callback for processing/extension unit */
static int mixer_ctl_procunit_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct usb_mixer_elem_info *cval = kcontrol->private_data;
int err, val;
err = get_cur_ctl_value(cval, cval->control << 8, &val);
if (err < 0 && cval->mixer->ignore_ctl_error) {
ucontrol->value.integer.value[0] = cval->min;
return 0;
}
if (err < 0)
return err;
val = get_relative_value(cval, val);
ucontrol->value.integer.value[0] = val;
return 0;
}
/* put callback for processing/extension unit */
static int mixer_ctl_procunit_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct usb_mixer_elem_info *cval = kcontrol->private_data;
int val, oval, err;
err = get_cur_ctl_value(cval, cval->control << 8, &oval);
if (err < 0) {
if (cval->mixer->ignore_ctl_error)
return 0;
return err;
}
val = ucontrol->value.integer.value[0];
val = get_abs_value(cval, val);
if (val != oval) {
set_cur_ctl_value(cval, cval->control << 8, val);
return 1;
}
return 0;
}
/* alsa control interface for processing/extension unit */
static struct snd_kcontrol_new mixer_procunit_ctl = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "", /* will be filled later */
.info = mixer_ctl_feature_info,
.get = mixer_ctl_procunit_get,
.put = mixer_ctl_procunit_put,
};
/*
* predefined data for processing units
*/
struct procunit_value_info {
int control;
char *suffix;
int val_type;
int min_value;
};
struct procunit_info {
int type;
char *name;
struct procunit_value_info *values;
};
static struct procunit_value_info updown_proc_info[] = {
{ UAC_UD_ENABLE, "Switch", USB_MIXER_BOOLEAN },
{ UAC_UD_MODE_SELECT, "Mode Select", USB_MIXER_U8, 1 },
{ 0 }
};
static struct procunit_value_info prologic_proc_info[] = {
{ UAC_DP_ENABLE, "Switch", USB_MIXER_BOOLEAN },
{ UAC_DP_MODE_SELECT, "Mode Select", USB_MIXER_U8, 1 },
{ 0 }
};
static struct procunit_value_info threed_enh_proc_info[] = {
{ UAC_3D_ENABLE, "Switch", USB_MIXER_BOOLEAN },
{ UAC_3D_SPACE, "Spaciousness", USB_MIXER_U8 },
{ 0 }
};
static struct procunit_value_info reverb_proc_info[] = {
{ UAC_REVERB_ENABLE, "Switch", USB_MIXER_BOOLEAN },
{ UAC_REVERB_LEVEL, "Level", USB_MIXER_U8 },
{ UAC_REVERB_TIME, "Time", USB_MIXER_U16 },
{ UAC_REVERB_FEEDBACK, "Feedback", USB_MIXER_U8 },
{ 0 }
};
static struct procunit_value_info chorus_proc_info[] = {
{ UAC_CHORUS_ENABLE, "Switch", USB_MIXER_BOOLEAN },
{ UAC_CHORUS_LEVEL, "Level", USB_MIXER_U8 },
{ UAC_CHORUS_RATE, "Rate", USB_MIXER_U16 },
{ UAC_CHORUS_DEPTH, "Depth", USB_MIXER_U16 },
{ 0 }
};
static struct procunit_value_info dcr_proc_info[] = {
{ UAC_DCR_ENABLE, "Switch", USB_MIXER_BOOLEAN },
{ UAC_DCR_RATE, "Ratio", USB_MIXER_U16 },
{ UAC_DCR_MAXAMPL, "Max Amp", USB_MIXER_S16 },
{ UAC_DCR_THRESHOLD, "Threshold", USB_MIXER_S16 },
{ UAC_DCR_ATTACK_TIME, "Attack Time", USB_MIXER_U16 },
{ UAC_DCR_RELEASE_TIME, "Release Time", USB_MIXER_U16 },
{ 0 }
};
static struct procunit_info procunits[] = {
{ UAC_PROCESS_UP_DOWNMIX, "Up Down", updown_proc_info },
{ UAC_PROCESS_DOLBY_PROLOGIC, "Dolby Prologic", prologic_proc_info },
{ UAC_PROCESS_STEREO_EXTENDER, "3D Stereo Extender", threed_enh_proc_info },
{ UAC_PROCESS_REVERB, "Reverb", reverb_proc_info },
{ UAC_PROCESS_CHORUS, "Chorus", chorus_proc_info },
{ UAC_PROCESS_DYN_RANGE_COMP, "DCR", dcr_proc_info },
{ 0 },
};
/*
* predefined data for extension units
*/
static struct procunit_value_info clock_rate_xu_info[] = {
{ USB_XU_CLOCK_RATE_SELECTOR, "Selector", USB_MIXER_U8, 0 },
{ 0 }
};
static struct procunit_value_info clock_source_xu_info[] = {
{ USB_XU_CLOCK_SOURCE_SELECTOR, "External", USB_MIXER_BOOLEAN },
{ 0 }
};
static struct procunit_value_info spdif_format_xu_info[] = {
{ USB_XU_DIGITAL_FORMAT_SELECTOR, "SPDIF/AC3", USB_MIXER_BOOLEAN },
{ 0 }
};
static struct procunit_value_info soft_limit_xu_info[] = {
{ USB_XU_SOFT_LIMIT_SELECTOR, " ", USB_MIXER_BOOLEAN },
{ 0 }
};
static struct procunit_info extunits[] = {
{ USB_XU_CLOCK_RATE, "Clock rate", clock_rate_xu_info },
{ USB_XU_CLOCK_SOURCE, "DigitalIn CLK source", clock_source_xu_info },
{ USB_XU_DIGITAL_IO_STATUS, "DigitalOut format:", spdif_format_xu_info },
{ USB_XU_DEVICE_OPTIONS, "AnalogueIn Soft Limit", soft_limit_xu_info },
{ 0 }
};
/*
* build a processing/extension unit
*/
static int build_audio_procunit(struct mixer_build *state, int unitid, void *raw_desc, struct procunit_info *list, char *name)
{
struct uac_processing_unit_descriptor *desc = raw_desc;
int num_ins = desc->bNrInPins;
struct usb_mixer_elem_info *cval;
struct snd_kcontrol *kctl;
int i, err, nameid, type, len;
struct procunit_info *info;
struct procunit_value_info *valinfo;
const struct usbmix_name_map *map;
static struct procunit_value_info default_value_info[] = {
{ 0x01, "Switch", USB_MIXER_BOOLEAN },
{ 0 }
};
static struct procunit_info default_info = {
0, NULL, default_value_info
};
if (desc->bLength < 13 || desc->bLength < 13 + num_ins ||
desc->bLength < num_ins + uac_processing_unit_bControlSize(desc, state->mixer->protocol)) {
snd_printk(KERN_ERR "invalid %s descriptor (id %d)\n", name, unitid);
return -EINVAL;
}
for (i = 0; i < num_ins; i++) {
if ((err = parse_audio_unit(state, desc->baSourceID[i])) < 0)
return err;
}
type = le16_to_cpu(desc->wProcessType);
for (info = list; info && info->type; info++)
if (info->type == type)
break;
if (! info || ! info->type)
info = &default_info;
for (valinfo = info->values; valinfo->control; valinfo++) {
__u8 *controls = uac_processing_unit_bmControls(desc, state->mixer->protocol);
if (! (controls[valinfo->control / 8] & (1 << ((valinfo->control % 8) - 1))))
continue;
map = find_map(state, unitid, valinfo->control);
if (check_ignored_ctl(map))
continue;
cval = kzalloc(sizeof(*cval), GFP_KERNEL);
if (! cval) {
snd_printk(KERN_ERR "cannot malloc kcontrol\n");
return -ENOMEM;
}
cval->mixer = state->mixer;
cval->id = unitid;
cval->control = valinfo->control;
cval->val_type = valinfo->val_type;
cval->channels = 1;
/* get min/max values */
if (type == UAC_PROCESS_UP_DOWNMIX && cval->control == UAC_UD_MODE_SELECT) {
__u8 *control_spec = uac_processing_unit_specific(desc, state->mixer->protocol);
/* FIXME: hard-coded */
cval->min = 1;
cval->max = control_spec[0];
cval->res = 1;
cval->initialized = 1;
} else {
if (type == USB_XU_CLOCK_RATE) {
/* E-Mu USB 0404/0202/TrackerPre/0204
* samplerate control quirk
*/
cval->min = 0;
cval->max = 5;
cval->res = 1;
cval->initialized = 1;
} else
get_min_max(cval, valinfo->min_value);
}
kctl = snd_ctl_new1(&mixer_procunit_ctl, cval);
if (! kctl) {
snd_printk(KERN_ERR "cannot malloc kcontrol\n");
kfree(cval);
return -ENOMEM;
}
kctl->private_free = usb_mixer_elem_free;
if (check_mapped_name(map, kctl->id.name,
sizeof(kctl->id.name)))
/* nothing */ ;
else if (info->name)
strlcpy(kctl->id.name, info->name, sizeof(kctl->id.name));
else {
nameid = uac_processing_unit_iProcessing(desc, state->mixer->protocol);
len = 0;
if (nameid)
len = snd_usb_copy_string_desc(state, nameid, kctl->id.name, sizeof(kctl->id.name));
if (! len)
strlcpy(kctl->id.name, name, sizeof(kctl->id.name));
}
append_ctl_name(kctl, " ");
append_ctl_name(kctl, valinfo->suffix);
snd_printdd(KERN_INFO "[%d] PU [%s] ch = %d, val = %d/%d\n",
cval->id, kctl->id.name, cval->channels, cval->min, cval->max);
if ((err = snd_usb_mixer_add_control(state->mixer, kctl)) < 0)
return err;
}
return 0;
}
static int parse_audio_processing_unit(struct mixer_build *state, int unitid, void *raw_desc)
{
return build_audio_procunit(state, unitid, raw_desc, procunits, "Processing Unit");
}
static int parse_audio_extension_unit(struct mixer_build *state, int unitid, void *raw_desc)
{
/* Note that we parse extension units with processing unit descriptors.
* That's ok as the layout is the same */
return build_audio_procunit(state, unitid, raw_desc, extunits, "Extension Unit");
}
/*
* Selector Unit
*/
/* info callback for selector unit
* use an enumerator type for routing
*/
static int mixer_ctl_selector_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
struct usb_mixer_elem_info *cval = kcontrol->private_data;
const char **itemlist = (const char **)kcontrol->private_value;
if (snd_BUG_ON(!itemlist))
return -EINVAL;
return snd_ctl_enum_info(uinfo, 1, cval->max, itemlist);
}
/* get callback for selector unit */
static int mixer_ctl_selector_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct usb_mixer_elem_info *cval = kcontrol->private_data;
int val, err;
err = get_cur_ctl_value(cval, cval->control << 8, &val);
if (err < 0) {
if (cval->mixer->ignore_ctl_error) {
ucontrol->value.enumerated.item[0] = 0;
return 0;
}
return err;
}
val = get_relative_value(cval, val);
ucontrol->value.enumerated.item[0] = val;
return 0;
}
/* put callback for selector unit */
static int mixer_ctl_selector_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct usb_mixer_elem_info *cval = kcontrol->private_data;
int val, oval, err;
err = get_cur_ctl_value(cval, cval->control << 8, &oval);
if (err < 0) {
if (cval->mixer->ignore_ctl_error)
return 0;
return err;
}
val = ucontrol->value.enumerated.item[0];
val = get_abs_value(cval, val);
if (val != oval) {
set_cur_ctl_value(cval, cval->control << 8, val);
return 1;
}
return 0;
}
/* alsa control interface for selector unit */
static struct snd_kcontrol_new mixer_selectunit_ctl = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "", /* will be filled later */
.info = mixer_ctl_selector_info,
.get = mixer_ctl_selector_get,
.put = mixer_ctl_selector_put,
};
/* private free callback.
* free both private_data and private_value
*/
static void usb_mixer_selector_elem_free(struct snd_kcontrol *kctl)
{
int i, num_ins = 0;
if (kctl->private_data) {
struct usb_mixer_elem_info *cval = kctl->private_data;
num_ins = cval->max;
kfree(cval);
kctl->private_data = NULL;
}
if (kctl->private_value) {
char **itemlist = (char **)kctl->private_value;
for (i = 0; i < num_ins; i++)
kfree(itemlist[i]);
kfree(itemlist);
kctl->private_value = 0;
}
}
/*
* parse a selector unit
*/
static int parse_audio_selector_unit(struct mixer_build *state, int unitid, void *raw_desc)
{
struct uac_selector_unit_descriptor *desc = raw_desc;
unsigned int i, nameid, len;
int err;
struct usb_mixer_elem_info *cval;
struct snd_kcontrol *kctl;
const struct usbmix_name_map *map;
char **namelist;
if (!desc->bNrInPins || desc->bLength < 5 + desc->bNrInPins) {
snd_printk(KERN_ERR "invalid SELECTOR UNIT descriptor %d\n", unitid);
return -EINVAL;
}
for (i = 0; i < desc->bNrInPins; i++) {
if ((err = parse_audio_unit(state, desc->baSourceID[i])) < 0)
return err;
}
if (desc->bNrInPins == 1) /* only one ? nonsense! */
return 0;
map = find_map(state, unitid, 0);
if (check_ignored_ctl(map))
return 0;
cval = kzalloc(sizeof(*cval), GFP_KERNEL);
if (! cval) {
snd_printk(KERN_ERR "cannot malloc kcontrol\n");
return -ENOMEM;
}
cval->mixer = state->mixer;
cval->id = unitid;
cval->val_type = USB_MIXER_U8;
cval->channels = 1;
cval->min = 1;
cval->max = desc->bNrInPins;
cval->res = 1;
cval->initialized = 1;
if (desc->bDescriptorSubtype == UAC2_CLOCK_SELECTOR)
cval->control = UAC2_CX_CLOCK_SELECTOR;
else
cval->control = 0;
namelist = kmalloc(sizeof(char *) * desc->bNrInPins, GFP_KERNEL);
if (! namelist) {
snd_printk(KERN_ERR "cannot malloc\n");
kfree(cval);
return -ENOMEM;
}
#define MAX_ITEM_NAME_LEN 64
for (i = 0; i < desc->bNrInPins; i++) {
struct usb_audio_term iterm;
len = 0;
namelist[i] = kmalloc(MAX_ITEM_NAME_LEN, GFP_KERNEL);
if (! namelist[i]) {
snd_printk(KERN_ERR "cannot malloc\n");
while (i--)
kfree(namelist[i]);
kfree(namelist);
kfree(cval);
return -ENOMEM;
}
len = check_mapped_selector_name(state, unitid, i, namelist[i],
MAX_ITEM_NAME_LEN);
if (! len && check_input_term(state, desc->baSourceID[i], &iterm) >= 0)
len = get_term_name(state, &iterm, namelist[i], MAX_ITEM_NAME_LEN, 0);
if (! len)
sprintf(namelist[i], "Input %d", i);
}
kctl = snd_ctl_new1(&mixer_selectunit_ctl, cval);
if (! kctl) {
snd_printk(KERN_ERR "cannot malloc kcontrol\n");
kfree(namelist);
kfree(cval);
return -ENOMEM;
}
kctl->private_value = (unsigned long)namelist;
kctl->private_free = usb_mixer_selector_elem_free;
nameid = uac_selector_unit_iSelector(desc);
len = check_mapped_name(map, kctl->id.name, sizeof(kctl->id.name));
if (len)
;
else if (nameid)
snd_usb_copy_string_desc(state, nameid, kctl->id.name, sizeof(kctl->id.name));
else {
len = get_term_name(state, &state->oterm,
kctl->id.name, sizeof(kctl->id.name), 0);
if (! len)
strlcpy(kctl->id.name, "USB", sizeof(kctl->id.name));
if (desc->bDescriptorSubtype == UAC2_CLOCK_SELECTOR)
append_ctl_name(kctl, " Clock Source");
else if ((state->oterm.type & 0xff00) == 0x0100)
append_ctl_name(kctl, " Capture Source");
else
append_ctl_name(kctl, " Playback Source");
}
snd_printdd(KERN_INFO "[%d] SU [%s] items = %d\n",
cval->id, kctl->id.name, desc->bNrInPins);
if ((err = snd_usb_mixer_add_control(state->mixer, kctl)) < 0)
return err;
return 0;
}
/*
* parse an audio unit recursively
*/
static int parse_audio_unit(struct mixer_build *state, int unitid)
{
unsigned char *p1;
if (test_and_set_bit(unitid, state->unitbitmap))
return 0; /* the unit already visited */
p1 = find_audio_control_unit(state, unitid);
if (!p1) {
snd_printk(KERN_ERR "usbaudio: unit %d not found!\n", unitid);
return -EINVAL;
}
switch (p1[2]) {
case UAC_INPUT_TERMINAL:
case UAC2_CLOCK_SOURCE:
return 0; /* NOP */
case UAC_MIXER_UNIT:
return parse_audio_mixer_unit(state, unitid, p1);
case UAC_SELECTOR_UNIT:
case UAC2_CLOCK_SELECTOR:
return parse_audio_selector_unit(state, unitid, p1);
case UAC_FEATURE_UNIT:
return parse_audio_feature_unit(state, unitid, p1);
case UAC1_PROCESSING_UNIT:
/* UAC2_EFFECT_UNIT has the same value */
if (state->mixer->protocol == UAC_VERSION_1)
return parse_audio_processing_unit(state, unitid, p1);
else
return 0; /* FIXME - effect units not implemented yet */
case UAC1_EXTENSION_UNIT:
/* UAC2_PROCESSING_UNIT_V2 has the same value */
if (state->mixer->protocol == UAC_VERSION_1)
return parse_audio_extension_unit(state, unitid, p1);
else /* UAC_VERSION_2 */
return parse_audio_processing_unit(state, unitid, p1);
default:
snd_printk(KERN_ERR "usbaudio: unit %u: unexpected type 0x%02x\n", unitid, p1[2]);
return -EINVAL;
}
}
static void snd_usb_mixer_free(struct usb_mixer_interface *mixer)
{
kfree(mixer->id_elems);
if (mixer->urb) {
kfree(mixer->urb->transfer_buffer);
usb_free_urb(mixer->urb);
}
usb_free_urb(mixer->rc_urb);
kfree(mixer->rc_setup_packet);
kfree(mixer);
}
static int snd_usb_mixer_dev_free(struct snd_device *device)
{
struct usb_mixer_interface *mixer = device->device_data;
snd_usb_mixer_free(mixer);
return 0;
}
/*
* create mixer controls
*
* walk through all UAC_OUTPUT_TERMINAL descriptors to search for mixers
*/
static int snd_usb_mixer_controls(struct usb_mixer_interface *mixer)
{
struct mixer_build state;
int err;
const struct usbmix_ctl_map *map;
void *p;
memset(&state, 0, sizeof(state));
state.chip = mixer->chip;
state.mixer = mixer;
state.buffer = mixer->hostif->extra;
state.buflen = mixer->hostif->extralen;
/* check the mapping table */
for (map = usbmix_ctl_maps; map->id; map++) {
if (map->id == state.chip->usb_id) {
state.map = map->map;
state.selector_map = map->selector_map;
mixer->ignore_ctl_error = map->ignore_ctl_error;
break;
}
}
p = NULL;
while ((p = snd_usb_find_csint_desc(mixer->hostif->extra, mixer->hostif->extralen,
p, UAC_OUTPUT_TERMINAL)) != NULL) {
if (mixer->protocol == UAC_VERSION_1) {
struct uac1_output_terminal_descriptor *desc = p;
if (desc->bLength < sizeof(*desc))
continue; /* invalid descriptor? */
set_bit(desc->bTerminalID, state.unitbitmap); /* mark terminal ID as visited */
state.oterm.id = desc->bTerminalID;
state.oterm.type = le16_to_cpu(desc->wTerminalType);
state.oterm.name = desc->iTerminal;
err = parse_audio_unit(&state, desc->bSourceID);
if (err < 0)
return err;
} else { /* UAC_VERSION_2 */
struct uac2_output_terminal_descriptor *desc = p;
if (desc->bLength < sizeof(*desc))
continue; /* invalid descriptor? */
set_bit(desc->bTerminalID, state.unitbitmap); /* mark terminal ID as visited */
state.oterm.id = desc->bTerminalID;
state.oterm.type = le16_to_cpu(desc->wTerminalType);
state.oterm.name = desc->iTerminal;
err = parse_audio_unit(&state, desc->bSourceID);
if (err < 0)
return err;
/* for UAC2, use the same approach to also add the clock selectors */
err = parse_audio_unit(&state, desc->bCSourceID);
if (err < 0)
return err;
}
}
return 0;
}
void snd_usb_mixer_notify_id(struct usb_mixer_interface *mixer, int unitid)
{
struct usb_mixer_elem_info *info;
for (info = mixer->id_elems[unitid]; info; info = info->next_id_elem)
snd_ctl_notify(mixer->chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
info->elem_id);
}
static void snd_usb_mixer_dump_cval(struct snd_info_buffer *buffer,
int unitid,
struct usb_mixer_elem_info *cval)
{
static char *val_types[] = {"BOOLEAN", "INV_BOOLEAN",
"S8", "U8", "S16", "U16"};
snd_iprintf(buffer, " Unit: %i\n", unitid);
if (cval->elem_id)
snd_iprintf(buffer, " Control: name=\"%s\", index=%i\n",
cval->elem_id->name, cval->elem_id->index);
snd_iprintf(buffer, " Info: id=%i, control=%i, cmask=0x%x, "
"channels=%i, type=\"%s\"\n", cval->id,
cval->control, cval->cmask, cval->channels,
val_types[cval->val_type]);
snd_iprintf(buffer, " Volume: min=%i, max=%i, dBmin=%i, dBmax=%i\n",
cval->min, cval->max, cval->dBmin, cval->dBmax);
}
static void snd_usb_mixer_proc_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct snd_usb_audio *chip = entry->private_data;
struct usb_mixer_interface *mixer;
struct usb_mixer_elem_info *cval;
int unitid;
list_for_each_entry(mixer, &chip->mixer_list, list) {
snd_iprintf(buffer,
"USB Mixer: usb_id=0x%08x, ctrlif=%i, ctlerr=%i\n",
chip->usb_id, snd_usb_ctrl_intf(chip),
mixer->ignore_ctl_error);
snd_iprintf(buffer, "Card: %s\n", chip->card->longname);
for (unitid = 0; unitid < MAX_ID_ELEMS; unitid++) {
for (cval = mixer->id_elems[unitid]; cval;
cval = cval->next_id_elem)
snd_usb_mixer_dump_cval(buffer, unitid, cval);
}
}
}
static void snd_usb_mixer_interrupt_v2(struct usb_mixer_interface *mixer,
int attribute, int value, int index)
{
struct usb_mixer_elem_info *info;
__u8 unitid = (index >> 8) & 0xff;
__u8 control = (value >> 8) & 0xff;
__u8 channel = value & 0xff;
if (channel >= MAX_CHANNELS) {
snd_printk(KERN_DEBUG "%s(): bogus channel number %d\n",
__func__, channel);
return;
}
for (info = mixer->id_elems[unitid]; info; info = info->next_id_elem) {
if (info->control != control)
continue;
switch (attribute) {
case UAC2_CS_CUR:
/* invalidate cache, so the value is read from the device */
if (channel)
info->cached &= ~(1 << channel);
else /* master channel */
info->cached = 0;
snd_ctl_notify(mixer->chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
info->elem_id);
break;
case UAC2_CS_RANGE:
/* TODO */
break;
case UAC2_CS_MEM:
/* TODO */
break;
default:
snd_printk(KERN_DEBUG "unknown attribute %d in interrupt\n",
attribute);
break;
} /* switch */
}
}
static void snd_usb_mixer_interrupt(struct urb *urb)
{
struct usb_mixer_interface *mixer = urb->context;
int len = urb->actual_length;
int ustatus = urb->status;
if (ustatus != 0)
goto requeue;
if (mixer->protocol == UAC_VERSION_1) {
struct uac1_status_word *status;
for (status = urb->transfer_buffer;
len >= sizeof(*status);
len -= sizeof(*status), status++) {
snd_printd(KERN_DEBUG "status interrupt: %02x %02x\n",
status->bStatusType,
status->bOriginator);
/* ignore any notifications not from the control interface */
if ((status->bStatusType & UAC1_STATUS_TYPE_ORIG_MASK) !=
UAC1_STATUS_TYPE_ORIG_AUDIO_CONTROL_IF)
continue;
if (status->bStatusType & UAC1_STATUS_TYPE_MEM_CHANGED)
snd_usb_mixer_rc_memory_change(mixer, status->bOriginator);
else
snd_usb_mixer_notify_id(mixer, status->bOriginator);
}
} else { /* UAC_VERSION_2 */
struct uac2_interrupt_data_msg *msg;
for (msg = urb->transfer_buffer;
len >= sizeof(*msg);
len -= sizeof(*msg), msg++) {
/* drop vendor specific and endpoint requests */
if ((msg->bInfo & UAC2_INTERRUPT_DATA_MSG_VENDOR) ||
(msg->bInfo & UAC2_INTERRUPT_DATA_MSG_EP))
continue;
snd_usb_mixer_interrupt_v2(mixer, msg->bAttribute,
le16_to_cpu(msg->wValue),
le16_to_cpu(msg->wIndex));
}
}
requeue:
if (ustatus != -ENOENT && ustatus != -ECONNRESET && ustatus != -ESHUTDOWN) {
urb->dev = mixer->chip->dev;
usb_submit_urb(urb, GFP_ATOMIC);
}
}
/* stop any bus activity of a mixer */
void snd_usb_mixer_inactivate(struct usb_mixer_interface *mixer)
{
usb_kill_urb(mixer->urb);
usb_kill_urb(mixer->rc_urb);
}
int snd_usb_mixer_activate(struct usb_mixer_interface *mixer)
{
int err;
if (mixer->urb) {
err = usb_submit_urb(mixer->urb, GFP_NOIO);
if (err < 0)
return err;
}
return 0;
}
/* create the handler for the optional status interrupt endpoint */
static int snd_usb_mixer_status_create(struct usb_mixer_interface *mixer)
{
struct usb_endpoint_descriptor *ep;
void *transfer_buffer;
int buffer_length;
unsigned int epnum;
/* we need one interrupt input endpoint */
if (get_iface_desc(mixer->hostif)->bNumEndpoints < 1)
return 0;
ep = get_endpoint(mixer->hostif, 0);
if (!usb_endpoint_dir_in(ep) || !usb_endpoint_xfer_int(ep))
return 0;
epnum = usb_endpoint_num(ep);
buffer_length = le16_to_cpu(ep->wMaxPacketSize);
transfer_buffer = kmalloc(buffer_length, GFP_KERNEL);
if (!transfer_buffer)
return -ENOMEM;
mixer->urb = usb_alloc_urb(0, GFP_KERNEL);
if (!mixer->urb) {
kfree(transfer_buffer);
return -ENOMEM;
}
usb_fill_int_urb(mixer->urb, mixer->chip->dev,
usb_rcvintpipe(mixer->chip->dev, epnum),
transfer_buffer, buffer_length,
snd_usb_mixer_interrupt, mixer, ep->bInterval);
usb_submit_urb(mixer->urb, GFP_KERNEL);
return 0;
}
int snd_usb_create_mixer(struct snd_usb_audio *chip, int ctrlif,
int ignore_error)
{
static struct snd_device_ops dev_ops = {
.dev_free = snd_usb_mixer_dev_free
};
struct usb_mixer_interface *mixer;
struct snd_info_entry *entry;
int err;
strcpy(chip->card->mixername, "USB Mixer");
mixer = kzalloc(sizeof(*mixer), GFP_KERNEL);
if (!mixer)
return -ENOMEM;
mixer->chip = chip;
mixer->ignore_ctl_error = ignore_error;
mixer->id_elems = kcalloc(MAX_ID_ELEMS, sizeof(*mixer->id_elems),
GFP_KERNEL);
if (!mixer->id_elems) {
kfree(mixer);
return -ENOMEM;
}
mixer->hostif = &usb_ifnum_to_if(chip->dev, ctrlif)->altsetting[0];
switch (get_iface_desc(mixer->hostif)->bInterfaceProtocol) {
case UAC_VERSION_1:
default:
mixer->protocol = UAC_VERSION_1;
break;
case UAC_VERSION_2:
mixer->protocol = UAC_VERSION_2;
break;
}
if ((err = snd_usb_mixer_controls(mixer)) < 0 ||
(err = snd_usb_mixer_status_create(mixer)) < 0)
goto _error;
snd_usb_mixer_apply_create_quirk(mixer);
err = snd_device_new(chip->card, SNDRV_DEV_LOWLEVEL, mixer, &dev_ops);
if (err < 0)
goto _error;
if (list_empty(&chip->mixer_list) &&
!snd_card_proc_new(chip->card, "usbmixer", &entry))
snd_info_set_text_ops(entry, chip, snd_usb_mixer_proc_read);
list_add(&mixer->list, &chip->mixer_list);
return 0;
_error:
snd_usb_mixer_free(mixer);
return err;
}
void snd_usb_mixer_disconnect(struct list_head *p)
{
struct usb_mixer_interface *mixer;
mixer = list_entry(p, struct usb_mixer_interface, list);
usb_kill_urb(mixer->urb);
usb_kill_urb(mixer->rc_urb);
}
| gpl-2.0 |
lasithwaruna/android_kernel_motorola_otus | arch/sh/kernel/traps_32.c | 4328 | 21860 | /*
* 'traps.c' handles hardware traps and faults after we have saved some
* state in 'entry.S'.
*
* SuperH version: Copyright (C) 1999 Niibe Yutaka
* Copyright (C) 2000 Philipp Rumpf
* Copyright (C) 2000 David Howells
* Copyright (C) 2002 - 2010 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/kernel.h>
#include <linux/ptrace.h>
#include <linux/hardirq.h>
#include <linux/init.h>
#include <linux/spinlock.h>
#include <linux/module.h>
#include <linux/kallsyms.h>
#include <linux/io.h>
#include <linux/bug.h>
#include <linux/debug_locks.h>
#include <linux/kdebug.h>
#include <linux/kexec.h>
#include <linux/limits.h>
#include <linux/sysfs.h>
#include <linux/uaccess.h>
#include <linux/perf_event.h>
#include <asm/alignment.h>
#include <asm/fpu.h>
#include <asm/kprobes.h>
#include <asm/traps.h>
#include <asm/bl_bit.h>
#ifdef CONFIG_CPU_SH2
# define TRAP_RESERVED_INST 4
# define TRAP_ILLEGAL_SLOT_INST 6
# define TRAP_ADDRESS_ERROR 9
# ifdef CONFIG_CPU_SH2A
# define TRAP_UBC 12
# define TRAP_FPU_ERROR 13
# define TRAP_DIVZERO_ERROR 17
# define TRAP_DIVOVF_ERROR 18
# endif
#else
#define TRAP_RESERVED_INST 12
#define TRAP_ILLEGAL_SLOT_INST 13
#endif
static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
{
unsigned long p;
int i;
printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top);
for (p = bottom & ~31; p < top; ) {
printk("%04lx: ", p & 0xffff);
for (i = 0; i < 8; i++, p += 4) {
unsigned int val;
if (p < bottom || p >= top)
printk(" ");
else {
if (__get_user(val, (unsigned int __user *)p)) {
printk("\n");
return;
}
printk("%08x ", val);
}
}
printk("\n");
}
}
static DEFINE_SPINLOCK(die_lock);
void die(const char * str, struct pt_regs * regs, long err)
{
static int die_counter;
oops_enter();
spin_lock_irq(&die_lock);
console_verbose();
bust_spinlocks(1);
printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
print_modules();
show_regs(regs);
printk("Process: %s (pid: %d, stack limit = %p)\n", current->comm,
task_pid_nr(current), task_stack_page(current) + 1);
if (!user_mode(regs) || in_interrupt())
dump_mem("Stack: ", regs->regs[15], THREAD_SIZE +
(unsigned long)task_stack_page(current));
notify_die(DIE_OOPS, str, regs, err, 255, SIGSEGV);
bust_spinlocks(0);
add_taint(TAINT_DIE);
spin_unlock_irq(&die_lock);
oops_exit();
if (kexec_should_crash(current))
crash_kexec(regs);
if (in_interrupt())
panic("Fatal exception in interrupt");
if (panic_on_oops)
panic("Fatal exception");
do_exit(SIGSEGV);
}
static inline void die_if_kernel(const char *str, struct pt_regs *regs,
long err)
{
if (!user_mode(regs))
die(str, regs, err);
}
/*
* try and fix up kernelspace address errors
* - userspace errors just cause EFAULT to be returned, resulting in SEGV
* - kernel/userspace interfaces cause a jump to an appropriate handler
* - other kernel errors are bad
*/
static void die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
{
if (!user_mode(regs)) {
const struct exception_table_entry *fixup;
fixup = search_exception_tables(regs->pc);
if (fixup) {
regs->pc = fixup->fixup;
return;
}
die(str, regs, err);
}
}
static inline void sign_extend(unsigned int count, unsigned char *dst)
{
#ifdef __LITTLE_ENDIAN__
if ((count == 1) && dst[0] & 0x80) {
dst[1] = 0xff;
dst[2] = 0xff;
dst[3] = 0xff;
}
if ((count == 2) && dst[1] & 0x80) {
dst[2] = 0xff;
dst[3] = 0xff;
}
#else
if ((count == 1) && dst[3] & 0x80) {
dst[2] = 0xff;
dst[1] = 0xff;
dst[0] = 0xff;
}
if ((count == 2) && dst[2] & 0x80) {
dst[1] = 0xff;
dst[0] = 0xff;
}
#endif
}
static struct mem_access user_mem_access = {
copy_from_user,
copy_to_user,
};
/*
* handle an instruction that does an unaligned memory access by emulating the
* desired behaviour
* - note that PC _may not_ point to the faulting instruction
* (if that instruction is in a branch delay slot)
* - return 0 if emulation okay, -EFAULT on existential error
*/
static int handle_unaligned_ins(insn_size_t instruction, struct pt_regs *regs,
struct mem_access *ma)
{
int ret, index, count;
unsigned long *rm, *rn;
unsigned char *src, *dst;
unsigned char __user *srcu, *dstu;
index = (instruction>>8)&15; /* 0x0F00 */
rn = ®s->regs[index];
index = (instruction>>4)&15; /* 0x00F0 */
rm = ®s->regs[index];
count = 1<<(instruction&3);
switch (count) {
case 1: inc_unaligned_byte_access(); break;
case 2: inc_unaligned_word_access(); break;
case 4: inc_unaligned_dword_access(); break;
case 8: inc_unaligned_multi_access(); break;
}
ret = -EFAULT;
switch (instruction>>12) {
case 0: /* mov.[bwl] to/from memory via r0+rn */
if (instruction & 8) {
/* from memory */
srcu = (unsigned char __user *)*rm;
srcu += regs->regs[0];
dst = (unsigned char *)rn;
*(unsigned long *)dst = 0;
#if !defined(__LITTLE_ENDIAN__)
dst += 4-count;
#endif
if (ma->from(dst, srcu, count))
goto fetch_fault;
sign_extend(count, dst);
} else {
/* to memory */
src = (unsigned char *)rm;
#if !defined(__LITTLE_ENDIAN__)
src += 4-count;
#endif
dstu = (unsigned char __user *)*rn;
dstu += regs->regs[0];
if (ma->to(dstu, src, count))
goto fetch_fault;
}
ret = 0;
break;
case 1: /* mov.l Rm,@(disp,Rn) */
src = (unsigned char*) rm;
dstu = (unsigned char __user *)*rn;
dstu += (instruction&0x000F)<<2;
if (ma->to(dstu, src, 4))
goto fetch_fault;
ret = 0;
break;
case 2: /* mov.[bwl] to memory, possibly with pre-decrement */
if (instruction & 4)
*rn -= count;
src = (unsigned char*) rm;
dstu = (unsigned char __user *)*rn;
#if !defined(__LITTLE_ENDIAN__)
src += 4-count;
#endif
if (ma->to(dstu, src, count))
goto fetch_fault;
ret = 0;
break;
case 5: /* mov.l @(disp,Rm),Rn */
srcu = (unsigned char __user *)*rm;
srcu += (instruction & 0x000F) << 2;
dst = (unsigned char *)rn;
*(unsigned long *)dst = 0;
if (ma->from(dst, srcu, 4))
goto fetch_fault;
ret = 0;
break;
case 6: /* mov.[bwl] from memory, possibly with post-increment */
srcu = (unsigned char __user *)*rm;
if (instruction & 4)
*rm += count;
dst = (unsigned char*) rn;
*(unsigned long*)dst = 0;
#if !defined(__LITTLE_ENDIAN__)
dst += 4-count;
#endif
if (ma->from(dst, srcu, count))
goto fetch_fault;
sign_extend(count, dst);
ret = 0;
break;
case 8:
switch ((instruction&0xFF00)>>8) {
case 0x81: /* mov.w R0,@(disp,Rn) */
src = (unsigned char *) ®s->regs[0];
#if !defined(__LITTLE_ENDIAN__)
src += 2;
#endif
dstu = (unsigned char __user *)*rm; /* called Rn in the spec */
dstu += (instruction & 0x000F) << 1;
if (ma->to(dstu, src, 2))
goto fetch_fault;
ret = 0;
break;
case 0x85: /* mov.w @(disp,Rm),R0 */
srcu = (unsigned char __user *)*rm;
srcu += (instruction & 0x000F) << 1;
dst = (unsigned char *) ®s->regs[0];
*(unsigned long *)dst = 0;
#if !defined(__LITTLE_ENDIAN__)
dst += 2;
#endif
if (ma->from(dst, srcu, 2))
goto fetch_fault;
sign_extend(2, dst);
ret = 0;
break;
}
break;
case 9: /* mov.w @(disp,PC),Rn */
srcu = (unsigned char __user *)regs->pc;
srcu += 4;
srcu += (instruction & 0x00FF) << 1;
dst = (unsigned char *)rn;
*(unsigned long *)dst = 0;
#if !defined(__LITTLE_ENDIAN__)
dst += 2;
#endif
if (ma->from(dst, srcu, 2))
goto fetch_fault;
sign_extend(2, dst);
ret = 0;
break;
case 0xd: /* mov.l @(disp,PC),Rn */
srcu = (unsigned char __user *)(regs->pc & ~0x3);
srcu += 4;
srcu += (instruction & 0x00FF) << 2;
dst = (unsigned char *)rn;
*(unsigned long *)dst = 0;
if (ma->from(dst, srcu, 4))
goto fetch_fault;
ret = 0;
break;
}
return ret;
fetch_fault:
/* Argh. Address not only misaligned but also non-existent.
* Raise an EFAULT and see if it's trapped
*/
die_if_no_fixup("Fault in unaligned fixup", regs, 0);
return -EFAULT;
}
/*
* emulate the instruction in the delay slot
* - fetches the instruction from PC+2
*/
static inline int handle_delayslot(struct pt_regs *regs,
insn_size_t old_instruction,
struct mem_access *ma)
{
insn_size_t instruction;
void __user *addr = (void __user *)(regs->pc +
instruction_size(old_instruction));
if (copy_from_user(&instruction, addr, sizeof(instruction))) {
/* the instruction-fetch faulted */
if (user_mode(regs))
return -EFAULT;
/* kernel */
die("delay-slot-insn faulting in handle_unaligned_delayslot",
regs, 0);
}
return handle_unaligned_ins(instruction, regs, ma);
}
/*
* handle an instruction that does an unaligned memory access
* - have to be careful of branch delay-slot instructions that fault
* SH3:
* - if the branch would be taken PC points to the branch
* - if the branch would not be taken, PC points to delay-slot
* SH4:
* - PC always points to delayed branch
* - return 0 if handled, -EFAULT if failed (may not return if in kernel)
*/
/* Macros to determine offset from current PC for branch instructions */
/* Explicit type coercion is used to force sign extension where needed */
#define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4)
#define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4)
int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
struct mem_access *ma, int expected,
unsigned long address)
{
u_int rm;
int ret, index;
/*
* XXX: We can't handle mixed 16/32-bit instructions yet
*/
if (instruction_size(instruction) != 2)
return -EINVAL;
index = (instruction>>8)&15; /* 0x0F00 */
rm = regs->regs[index];
/*
* Log the unexpected fixups, and then pass them on to perf.
*
* We intentionally don't report the expected cases to perf as
* otherwise the trapped I/O case will skew the results too much
* to be useful.
*/
if (!expected) {
unaligned_fixups_notify(current, instruction, regs);
perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1,
regs, address);
}
ret = -EFAULT;
switch (instruction&0xF000) {
case 0x0000:
if (instruction==0x000B) {
/* rts */
ret = handle_delayslot(regs, instruction, ma);
if (ret==0)
regs->pc = regs->pr;
}
else if ((instruction&0x00FF)==0x0023) {
/* braf @Rm */
ret = handle_delayslot(regs, instruction, ma);
if (ret==0)
regs->pc += rm + 4;
}
else if ((instruction&0x00FF)==0x0003) {
/* bsrf @Rm */
ret = handle_delayslot(regs, instruction, ma);
if (ret==0) {
regs->pr = regs->pc + 4;
regs->pc += rm + 4;
}
}
else {
/* mov.[bwl] to/from memory via r0+rn */
goto simple;
}
break;
case 0x1000: /* mov.l Rm,@(disp,Rn) */
goto simple;
case 0x2000: /* mov.[bwl] to memory, possibly with pre-decrement */
goto simple;
case 0x4000:
if ((instruction&0x00FF)==0x002B) {
/* jmp @Rm */
ret = handle_delayslot(regs, instruction, ma);
if (ret==0)
regs->pc = rm;
}
else if ((instruction&0x00FF)==0x000B) {
/* jsr @Rm */
ret = handle_delayslot(regs, instruction, ma);
if (ret==0) {
regs->pr = regs->pc + 4;
regs->pc = rm;
}
}
else {
/* mov.[bwl] to/from memory via r0+rn */
goto simple;
}
break;
case 0x5000: /* mov.l @(disp,Rm),Rn */
goto simple;
case 0x6000: /* mov.[bwl] from memory, possibly with post-increment */
goto simple;
case 0x8000: /* bf lab, bf/s lab, bt lab, bt/s lab */
switch (instruction&0x0F00) {
case 0x0100: /* mov.w R0,@(disp,Rm) */
goto simple;
case 0x0500: /* mov.w @(disp,Rm),R0 */
goto simple;
case 0x0B00: /* bf lab - no delayslot*/
ret = 0;
break;
case 0x0F00: /* bf/s lab */
ret = handle_delayslot(regs, instruction, ma);
if (ret==0) {
#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
if ((regs->sr & 0x00000001) != 0)
regs->pc += 4; /* next after slot */
else
#endif
regs->pc += SH_PC_8BIT_OFFSET(instruction);
}
break;
case 0x0900: /* bt lab - no delayslot */
ret = 0;
break;
case 0x0D00: /* bt/s lab */
ret = handle_delayslot(regs, instruction, ma);
if (ret==0) {
#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
if ((regs->sr & 0x00000001) == 0)
regs->pc += 4; /* next after slot */
else
#endif
regs->pc += SH_PC_8BIT_OFFSET(instruction);
}
break;
}
break;
case 0x9000: /* mov.w @(disp,Rm),Rn */
goto simple;
case 0xA000: /* bra label */
ret = handle_delayslot(regs, instruction, ma);
if (ret==0)
regs->pc += SH_PC_12BIT_OFFSET(instruction);
break;
case 0xB000: /* bsr label */
ret = handle_delayslot(regs, instruction, ma);
if (ret==0) {
regs->pr = regs->pc + 4;
regs->pc += SH_PC_12BIT_OFFSET(instruction);
}
break;
case 0xD000: /* mov.l @(disp,Rm),Rn */
goto simple;
}
return ret;
/* handle non-delay-slot instruction */
simple:
ret = handle_unaligned_ins(instruction, regs, ma);
if (ret==0)
regs->pc += instruction_size(instruction);
return ret;
}
/*
* Handle various address error exceptions:
* - instruction address error:
* misaligned PC
* PC >= 0x80000000 in user mode
* - data address error (read and write)
* misaligned data access
* access to >= 0x80000000 is user mode
* Unfortuntaly we can't distinguish between instruction address error
* and data address errors caused by read accesses.
*/
asmlinkage void do_address_error(struct pt_regs *regs,
unsigned long writeaccess,
unsigned long address)
{
unsigned long error_code = 0;
mm_segment_t oldfs;
siginfo_t info;
insn_size_t instruction;
int tmp;
/* Intentional ifdef */
#ifdef CONFIG_CPU_HAS_SR_RB
error_code = lookup_exception_vector();
#endif
oldfs = get_fs();
if (user_mode(regs)) {
int si_code = BUS_ADRERR;
unsigned int user_action;
local_irq_enable();
inc_unaligned_user_access();
set_fs(USER_DS);
if (copy_from_user(&instruction, (insn_size_t *)(regs->pc & ~1),
sizeof(instruction))) {
set_fs(oldfs);
goto uspace_segv;
}
set_fs(oldfs);
/* shout about userspace fixups */
unaligned_fixups_notify(current, instruction, regs);
user_action = unaligned_user_action();
if (user_action & UM_FIXUP)
goto fixup;
if (user_action & UM_SIGNAL)
goto uspace_segv;
else {
/* ignore */
regs->pc += instruction_size(instruction);
return;
}
fixup:
/* bad PC is not something we can fix */
if (regs->pc & 1) {
si_code = BUS_ADRALN;
goto uspace_segv;
}
set_fs(USER_DS);
tmp = handle_unaligned_access(instruction, regs,
&user_mem_access, 0,
address);
set_fs(oldfs);
if (tmp == 0)
return; /* sorted */
uspace_segv:
printk(KERN_NOTICE "Sending SIGBUS to \"%s\" due to unaligned "
"access (PC %lx PR %lx)\n", current->comm, regs->pc,
regs->pr);
info.si_signo = SIGBUS;
info.si_errno = 0;
info.si_code = si_code;
info.si_addr = (void __user *)address;
force_sig_info(SIGBUS, &info, current);
} else {
inc_unaligned_kernel_access();
if (regs->pc & 1)
die("unaligned program counter", regs, error_code);
set_fs(KERNEL_DS);
if (copy_from_user(&instruction, (void __user *)(regs->pc),
sizeof(instruction))) {
/* Argh. Fault on the instruction itself.
This should never happen non-SMP
*/
set_fs(oldfs);
die("insn faulting in do_address_error", regs, 0);
}
unaligned_fixups_notify(current, instruction, regs);
handle_unaligned_access(instruction, regs, &user_mem_access,
0, address);
set_fs(oldfs);
}
}
#ifdef CONFIG_SH_DSP
/*
* SH-DSP support gerg@snapgear.com.
*/
int is_dsp_inst(struct pt_regs *regs)
{
unsigned short inst = 0;
/*
* Safe guard if DSP mode is already enabled or we're lacking
* the DSP altogether.
*/
if (!(current_cpu_data.flags & CPU_HAS_DSP) || (regs->sr & SR_DSP))
return 0;
get_user(inst, ((unsigned short *) regs->pc));
inst &= 0xf000;
/* Check for any type of DSP or support instruction */
if ((inst == 0xf000) || (inst == 0x4000))
return 1;
return 0;
}
#else
#define is_dsp_inst(regs) (0)
#endif /* CONFIG_SH_DSP */
#ifdef CONFIG_CPU_SH2A
asmlinkage void do_divide_error(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs __regs)
{
siginfo_t info;
switch (r4) {
case TRAP_DIVZERO_ERROR:
info.si_code = FPE_INTDIV;
break;
case TRAP_DIVOVF_ERROR:
info.si_code = FPE_INTOVF;
break;
}
force_sig_info(SIGFPE, &info, current);
}
#endif
asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs __regs)
{
struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
unsigned long error_code;
struct task_struct *tsk = current;
#ifdef CONFIG_SH_FPU_EMU
unsigned short inst = 0;
int err;
get_user(inst, (unsigned short*)regs->pc);
err = do_fpu_inst(inst, regs);
if (!err) {
regs->pc += instruction_size(inst);
return;
}
/* not a FPU inst. */
#endif
#ifdef CONFIG_SH_DSP
/* Check if it's a DSP instruction */
if (is_dsp_inst(regs)) {
/* Enable DSP mode, and restart instruction. */
regs->sr |= SR_DSP;
/* Save DSP mode */
tsk->thread.dsp_status.status |= SR_DSP;
return;
}
#endif
error_code = lookup_exception_vector();
local_irq_enable();
force_sig(SIGILL, tsk);
die_if_no_fixup("reserved instruction", regs, error_code);
}
#ifdef CONFIG_SH_FPU_EMU
static int emulate_branch(unsigned short inst, struct pt_regs *regs)
{
/*
* bfs: 8fxx: PC+=d*2+4;
* bts: 8dxx: PC+=d*2+4;
* bra: axxx: PC+=D*2+4;
* bsr: bxxx: PC+=D*2+4 after PR=PC+4;
* braf:0x23: PC+=Rn*2+4;
* bsrf:0x03: PC+=Rn*2+4 after PR=PC+4;
* jmp: 4x2b: PC=Rn;
* jsr: 4x0b: PC=Rn after PR=PC+4;
* rts: 000b: PC=PR;
*/
if (((inst & 0xf000) == 0xb000) || /* bsr */
((inst & 0xf0ff) == 0x0003) || /* bsrf */
((inst & 0xf0ff) == 0x400b)) /* jsr */
regs->pr = regs->pc + 4;
if ((inst & 0xfd00) == 0x8d00) { /* bfs, bts */
regs->pc += SH_PC_8BIT_OFFSET(inst);
return 0;
}
if ((inst & 0xe000) == 0xa000) { /* bra, bsr */
regs->pc += SH_PC_12BIT_OFFSET(inst);
return 0;
}
if ((inst & 0xf0df) == 0x0003) { /* braf, bsrf */
regs->pc += regs->regs[(inst & 0x0f00) >> 8] + 4;
return 0;
}
if ((inst & 0xf0df) == 0x400b) { /* jmp, jsr */
regs->pc = regs->regs[(inst & 0x0f00) >> 8];
return 0;
}
if ((inst & 0xffff) == 0x000b) { /* rts */
regs->pc = regs->pr;
return 0;
}
return 1;
}
#endif
asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs __regs)
{
struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
unsigned long inst;
struct task_struct *tsk = current;
if (kprobe_handle_illslot(regs->pc) == 0)
return;
#ifdef CONFIG_SH_FPU_EMU
get_user(inst, (unsigned short *)regs->pc + 1);
if (!do_fpu_inst(inst, regs)) {
get_user(inst, (unsigned short *)regs->pc);
if (!emulate_branch(inst, regs))
return;
/* fault in branch.*/
}
/* not a FPU inst. */
#endif
inst = lookup_exception_vector();
local_irq_enable();
force_sig(SIGILL, tsk);
die_if_no_fixup("illegal slot instruction", regs, inst);
}
asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs __regs)
{
struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
long ex;
ex = lookup_exception_vector();
die_if_kernel("exception", regs, ex);
}
void __cpuinit per_cpu_trap_init(void)
{
extern void *vbr_base;
/* NOTE: The VBR value should be at P1
(or P2, virtural "fixed" address space).
It's definitely should not in physical address. */
asm volatile("ldc %0, vbr"
: /* no output */
: "r" (&vbr_base)
: "memory");
/* disable exception blocking now when the vbr has been setup */
clear_bl_bit();
}
void *set_exception_table_vec(unsigned int vec, void *handler)
{
extern void *exception_handling_table[];
void *old_handler;
old_handler = exception_handling_table[vec];
exception_handling_table[vec] = handler;
return old_handler;
}
void __init trap_init(void)
{
set_exception_table_vec(TRAP_RESERVED_INST, do_reserved_inst);
set_exception_table_vec(TRAP_ILLEGAL_SLOT_INST, do_illegal_slot_inst);
#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_FPU) || \
defined(CONFIG_SH_FPU_EMU)
/*
* For SH-4 lacking an FPU, treat floating point instructions as
* reserved. They'll be handled in the math-emu case, or faulted on
* otherwise.
*/
set_exception_table_evt(0x800, do_reserved_inst);
set_exception_table_evt(0x820, do_illegal_slot_inst);
#elif defined(CONFIG_SH_FPU)
set_exception_table_evt(0x800, fpu_state_restore_trap_handler);
set_exception_table_evt(0x820, fpu_state_restore_trap_handler);
#endif
#ifdef CONFIG_CPU_SH2
set_exception_table_vec(TRAP_ADDRESS_ERROR, address_error_trap_handler);
#endif
#ifdef CONFIG_CPU_SH2A
set_exception_table_vec(TRAP_DIVZERO_ERROR, do_divide_error);
set_exception_table_vec(TRAP_DIVOVF_ERROR, do_divide_error);
#ifdef CONFIG_SH_FPU
set_exception_table_vec(TRAP_FPU_ERROR, fpu_error_trap_handler);
#endif
#endif
#ifdef TRAP_UBC
set_exception_table_vec(TRAP_UBC, breakpoint_trap_handler);
#endif
}
void show_stack(struct task_struct *tsk, unsigned long *sp)
{
unsigned long stack;
if (!tsk)
tsk = current;
if (tsk == current)
sp = (unsigned long *)current_stack_pointer;
else
sp = (unsigned long *)tsk->thread.sp;
stack = (unsigned long)sp;
dump_mem("Stack: ", stack, THREAD_SIZE +
(unsigned long)task_stack_page(tsk));
show_trace(tsk, sp, NULL);
}
void dump_stack(void)
{
show_stack(NULL, NULL);
}
EXPORT_SYMBOL(dump_stack);
| gpl-2.0 |
Li-poly/stock-multi-hack | drivers/vhost/test.c | 4840 | 7332 | /* Copyright (C) 2009 Red Hat, Inc.
* Author: Michael S. Tsirkin <mst@redhat.com>
*
* This work is licensed under the terms of the GNU GPL, version 2.
*
* test virtio server in host kernel.
*/
#include <linux/compat.h>
#include <linux/eventfd.h>
#include <linux/vhost.h>
#include <linux/miscdevice.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/workqueue.h>
#include <linux/rcupdate.h>
#include <linux/file.h>
#include <linux/slab.h>
#include "test.h"
#include "vhost.c"
/* Max number of bytes transferred before requeueing the job.
* Using this limit prevents one virtqueue from starving others. */
#define VHOST_TEST_WEIGHT 0x80000
enum {
VHOST_TEST_VQ = 0,
VHOST_TEST_VQ_MAX = 1,
};
struct vhost_test {
struct vhost_dev dev;
struct vhost_virtqueue vqs[VHOST_TEST_VQ_MAX];
};
/* Expects to be always run from workqueue - which acts as
* read-size critical section for our kind of RCU. */
static void handle_vq(struct vhost_test *n)
{
struct vhost_virtqueue *vq = &n->dev.vqs[VHOST_TEST_VQ];
unsigned out, in;
int head;
size_t len, total_len = 0;
void *private;
private = rcu_dereference_check(vq->private_data, 1);
if (!private)
return;
mutex_lock(&vq->mutex);
vhost_disable_notify(&n->dev, vq);
for (;;) {
head = vhost_get_vq_desc(&n->dev, vq, vq->iov,
ARRAY_SIZE(vq->iov),
&out, &in,
NULL, NULL);
/* On error, stop handling until the next kick. */
if (unlikely(head < 0))
break;
/* Nothing new? Wait for eventfd to tell us they refilled. */
if (head == vq->num) {
if (unlikely(vhost_enable_notify(&n->dev, vq))) {
vhost_disable_notify(&n->dev, vq);
continue;
}
break;
}
if (in) {
vq_err(vq, "Unexpected descriptor format for TX: "
"out %d, int %d\n", out, in);
break;
}
len = iov_length(vq->iov, out);
/* Sanity check */
if (!len) {
vq_err(vq, "Unexpected 0 len for TX\n");
break;
}
vhost_add_used_and_signal(&n->dev, vq, head, 0);
total_len += len;
if (unlikely(total_len >= VHOST_TEST_WEIGHT)) {
vhost_poll_queue(&vq->poll);
break;
}
}
mutex_unlock(&vq->mutex);
}
static void handle_vq_kick(struct vhost_work *work)
{
struct vhost_virtqueue *vq = container_of(work, struct vhost_virtqueue,
poll.work);
struct vhost_test *n = container_of(vq->dev, struct vhost_test, dev);
handle_vq(n);
}
static int vhost_test_open(struct inode *inode, struct file *f)
{
struct vhost_test *n = kmalloc(sizeof *n, GFP_KERNEL);
struct vhost_dev *dev;
int r;
if (!n)
return -ENOMEM;
dev = &n->dev;
n->vqs[VHOST_TEST_VQ].handle_kick = handle_vq_kick;
r = vhost_dev_init(dev, n->vqs, VHOST_TEST_VQ_MAX);
if (r < 0) {
kfree(n);
return r;
}
f->private_data = n;
return 0;
}
static void *vhost_test_stop_vq(struct vhost_test *n,
struct vhost_virtqueue *vq)
{
void *private;
mutex_lock(&vq->mutex);
private = rcu_dereference_protected(vq->private_data,
lockdep_is_held(&vq->mutex));
rcu_assign_pointer(vq->private_data, NULL);
mutex_unlock(&vq->mutex);
return private;
}
static void vhost_test_stop(struct vhost_test *n, void **privatep)
{
*privatep = vhost_test_stop_vq(n, n->vqs + VHOST_TEST_VQ);
}
static void vhost_test_flush_vq(struct vhost_test *n, int index)
{
vhost_poll_flush(&n->dev.vqs[index].poll);
}
static void vhost_test_flush(struct vhost_test *n)
{
vhost_test_flush_vq(n, VHOST_TEST_VQ);
}
static int vhost_test_release(struct inode *inode, struct file *f)
{
struct vhost_test *n = f->private_data;
void *private;
vhost_test_stop(n, &private);
vhost_test_flush(n);
vhost_dev_cleanup(&n->dev, false);
/* We do an extra flush before freeing memory,
* since jobs can re-queue themselves. */
vhost_test_flush(n);
kfree(n);
return 0;
}
static long vhost_test_run(struct vhost_test *n, int test)
{
void *priv, *oldpriv;
struct vhost_virtqueue *vq;
int r, index;
if (test < 0 || test > 1)
return -EINVAL;
mutex_lock(&n->dev.mutex);
r = vhost_dev_check_owner(&n->dev);
if (r)
goto err;
for (index = 0; index < n->dev.nvqs; ++index) {
/* Verify that ring has been setup correctly. */
if (!vhost_vq_access_ok(&n->vqs[index])) {
r = -EFAULT;
goto err;
}
}
for (index = 0; index < n->dev.nvqs; ++index) {
vq = n->vqs + index;
mutex_lock(&vq->mutex);
priv = test ? n : NULL;
/* start polling new socket */
oldpriv = rcu_dereference_protected(vq->private_data,
lockdep_is_held(&vq->mutex));
rcu_assign_pointer(vq->private_data, priv);
r = vhost_init_used(&n->vqs[index]);
mutex_unlock(&vq->mutex);
if (r)
goto err;
if (oldpriv) {
vhost_test_flush_vq(n, index);
}
}
mutex_unlock(&n->dev.mutex);
return 0;
err:
mutex_unlock(&n->dev.mutex);
return r;
}
static long vhost_test_reset_owner(struct vhost_test *n)
{
void *priv = NULL;
long err;
mutex_lock(&n->dev.mutex);
err = vhost_dev_check_owner(&n->dev);
if (err)
goto done;
vhost_test_stop(n, &priv);
vhost_test_flush(n);
err = vhost_dev_reset_owner(&n->dev);
done:
mutex_unlock(&n->dev.mutex);
return err;
}
static int vhost_test_set_features(struct vhost_test *n, u64 features)
{
mutex_lock(&n->dev.mutex);
if ((features & (1 << VHOST_F_LOG_ALL)) &&
!vhost_log_access_ok(&n->dev)) {
mutex_unlock(&n->dev.mutex);
return -EFAULT;
}
n->dev.acked_features = features;
smp_wmb();
vhost_test_flush(n);
mutex_unlock(&n->dev.mutex);
return 0;
}
static long vhost_test_ioctl(struct file *f, unsigned int ioctl,
unsigned long arg)
{
struct vhost_test *n = f->private_data;
void __user *argp = (void __user *)arg;
u64 __user *featurep = argp;
int test;
u64 features;
int r;
switch (ioctl) {
case VHOST_TEST_RUN:
if (copy_from_user(&test, argp, sizeof test))
return -EFAULT;
return vhost_test_run(n, test);
case VHOST_GET_FEATURES:
features = VHOST_FEATURES;
if (copy_to_user(featurep, &features, sizeof features))
return -EFAULT;
return 0;
case VHOST_SET_FEATURES:
if (copy_from_user(&features, featurep, sizeof features))
return -EFAULT;
if (features & ~VHOST_FEATURES)
return -EOPNOTSUPP;
return vhost_test_set_features(n, features);
case VHOST_RESET_OWNER:
return vhost_test_reset_owner(n);
default:
mutex_lock(&n->dev.mutex);
r = vhost_dev_ioctl(&n->dev, ioctl, arg);
vhost_test_flush(n);
mutex_unlock(&n->dev.mutex);
return r;
}
}
#ifdef CONFIG_COMPAT
static long vhost_test_compat_ioctl(struct file *f, unsigned int ioctl,
unsigned long arg)
{
return vhost_test_ioctl(f, ioctl, (unsigned long)compat_ptr(arg));
}
#endif
static const struct file_operations vhost_test_fops = {
.owner = THIS_MODULE,
.release = vhost_test_release,
.unlocked_ioctl = vhost_test_ioctl,
#ifdef CONFIG_COMPAT
.compat_ioctl = vhost_test_compat_ioctl,
#endif
.open = vhost_test_open,
.llseek = noop_llseek,
};
static struct miscdevice vhost_test_misc = {
MISC_DYNAMIC_MINOR,
"vhost-test",
&vhost_test_fops,
};
static int vhost_test_init(void)
{
return misc_register(&vhost_test_misc);
}
module_init(vhost_test_init);
static void vhost_test_exit(void)
{
misc_deregister(&vhost_test_misc);
}
module_exit(vhost_test_exit);
MODULE_VERSION("0.0.1");
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Michael S. Tsirkin");
MODULE_DESCRIPTION("Host kernel side for virtio simulator");
| gpl-2.0 |
supersonicninja/L01FJBKERNEL | drivers/mmc/host/wbsd.c | 5352 | 40733 | /*
* linux/drivers/mmc/host/wbsd.c - Winbond W83L51xD SD/MMC driver
*
* Copyright (C) 2004-2007 Pierre Ossman, All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*
*
* Warning!
*
* Changes to the FIFO system should be done with extreme care since
* the hardware is full of bugs related to the FIFO. Known issues are:
*
* - FIFO size field in FSR is always zero.
*
* - FIFO interrupts tend not to work as they should. Interrupts are
* triggered only for full/empty events, not for threshold values.
*
* - On APIC systems the FIFO empty interrupt is sometimes lost.
*/
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/dma-mapping.h>
#include <linux/delay.h>
#include <linux/pnp.h>
#include <linux/highmem.h>
#include <linux/mmc/host.h>
#include <linux/scatterlist.h>
#include <linux/slab.h>
#include <asm/io.h>
#include <asm/dma.h>
#include "wbsd.h"
#define DRIVER_NAME "wbsd"
#define DBG(x...) \
pr_debug(DRIVER_NAME ": " x)
#define DBGF(f, x...) \
pr_debug(DRIVER_NAME " [%s()]: " f, __func__ , ##x)
/*
* Device resources
*/
#ifdef CONFIG_PNP
static const struct pnp_device_id pnp_dev_table[] = {
{ "WEC0517", 0 },
{ "WEC0518", 0 },
{ "", 0 },
};
MODULE_DEVICE_TABLE(pnp, pnp_dev_table);
#endif /* CONFIG_PNP */
static const int config_ports[] = { 0x2E, 0x4E };
static const int unlock_codes[] = { 0x83, 0x87 };
static const int valid_ids[] = {
0x7112,
};
#ifdef CONFIG_PNP
static unsigned int param_nopnp = 0;
#else
static const unsigned int param_nopnp = 1;
#endif
static unsigned int param_io = 0x248;
static unsigned int param_irq = 6;
static int param_dma = 2;
/*
* Basic functions
*/
static inline void wbsd_unlock_config(struct wbsd_host *host)
{
BUG_ON(host->config == 0);
outb(host->unlock_code, host->config);
outb(host->unlock_code, host->config);
}
static inline void wbsd_lock_config(struct wbsd_host *host)
{
BUG_ON(host->config == 0);
outb(LOCK_CODE, host->config);
}
static inline void wbsd_write_config(struct wbsd_host *host, u8 reg, u8 value)
{
BUG_ON(host->config == 0);
outb(reg, host->config);
outb(value, host->config + 1);
}
static inline u8 wbsd_read_config(struct wbsd_host *host, u8 reg)
{
BUG_ON(host->config == 0);
outb(reg, host->config);
return inb(host->config + 1);
}
static inline void wbsd_write_index(struct wbsd_host *host, u8 index, u8 value)
{
outb(index, host->base + WBSD_IDXR);
outb(value, host->base + WBSD_DATAR);
}
static inline u8 wbsd_read_index(struct wbsd_host *host, u8 index)
{
outb(index, host->base + WBSD_IDXR);
return inb(host->base + WBSD_DATAR);
}
/*
* Common routines
*/
static void wbsd_init_device(struct wbsd_host *host)
{
u8 setup, ier;
/*
* Reset chip (SD/MMC part) and fifo.
*/
setup = wbsd_read_index(host, WBSD_IDX_SETUP);
setup |= WBSD_FIFO_RESET | WBSD_SOFT_RESET;
wbsd_write_index(host, WBSD_IDX_SETUP, setup);
/*
* Set DAT3 to input
*/
setup &= ~WBSD_DAT3_H;
wbsd_write_index(host, WBSD_IDX_SETUP, setup);
host->flags &= ~WBSD_FIGNORE_DETECT;
/*
* Read back default clock.
*/
host->clk = wbsd_read_index(host, WBSD_IDX_CLK);
/*
* Power down port.
*/
outb(WBSD_POWER_N, host->base + WBSD_CSR);
/*
* Set maximum timeout.
*/
wbsd_write_index(host, WBSD_IDX_TAAC, 0x7F);
/*
* Test for card presence
*/
if (inb(host->base + WBSD_CSR) & WBSD_CARDPRESENT)
host->flags |= WBSD_FCARD_PRESENT;
else
host->flags &= ~WBSD_FCARD_PRESENT;
/*
* Enable interesting interrupts.
*/
ier = 0;
ier |= WBSD_EINT_CARD;
ier |= WBSD_EINT_FIFO_THRE;
ier |= WBSD_EINT_CRC;
ier |= WBSD_EINT_TIMEOUT;
ier |= WBSD_EINT_TC;
outb(ier, host->base + WBSD_EIR);
/*
* Clear interrupts.
*/
inb(host->base + WBSD_ISR);
}
static void wbsd_reset(struct wbsd_host *host)
{
u8 setup;
pr_err("%s: Resetting chip\n", mmc_hostname(host->mmc));
/*
* Soft reset of chip (SD/MMC part).
*/
setup = wbsd_read_index(host, WBSD_IDX_SETUP);
setup |= WBSD_SOFT_RESET;
wbsd_write_index(host, WBSD_IDX_SETUP, setup);
}
static void wbsd_request_end(struct wbsd_host *host, struct mmc_request *mrq)
{
unsigned long dmaflags;
if (host->dma >= 0) {
/*
* Release ISA DMA controller.
*/
dmaflags = claim_dma_lock();
disable_dma(host->dma);
clear_dma_ff(host->dma);
release_dma_lock(dmaflags);
/*
* Disable DMA on host.
*/
wbsd_write_index(host, WBSD_IDX_DMA, 0);
}
host->mrq = NULL;
/*
* MMC layer might call back into the driver so first unlock.
*/
spin_unlock(&host->lock);
mmc_request_done(host->mmc, mrq);
spin_lock(&host->lock);
}
/*
* Scatter/gather functions
*/
static inline void wbsd_init_sg(struct wbsd_host *host, struct mmc_data *data)
{
/*
* Get info. about SG list from data structure.
*/
host->cur_sg = data->sg;
host->num_sg = data->sg_len;
host->offset = 0;
host->remain = host->cur_sg->length;
}
static inline int wbsd_next_sg(struct wbsd_host *host)
{
/*
* Skip to next SG entry.
*/
host->cur_sg++;
host->num_sg--;
/*
* Any entries left?
*/
if (host->num_sg > 0) {
host->offset = 0;
host->remain = host->cur_sg->length;
}
return host->num_sg;
}
static inline char *wbsd_sg_to_buffer(struct wbsd_host *host)
{
return sg_virt(host->cur_sg);
}
static inline void wbsd_sg_to_dma(struct wbsd_host *host, struct mmc_data *data)
{
unsigned int len, i;
struct scatterlist *sg;
char *dmabuf = host->dma_buffer;
char *sgbuf;
sg = data->sg;
len = data->sg_len;
for (i = 0; i < len; i++) {
sgbuf = sg_virt(&sg[i]);
memcpy(dmabuf, sgbuf, sg[i].length);
dmabuf += sg[i].length;
}
}
static inline void wbsd_dma_to_sg(struct wbsd_host *host, struct mmc_data *data)
{
unsigned int len, i;
struct scatterlist *sg;
char *dmabuf = host->dma_buffer;
char *sgbuf;
sg = data->sg;
len = data->sg_len;
for (i = 0; i < len; i++) {
sgbuf = sg_virt(&sg[i]);
memcpy(sgbuf, dmabuf, sg[i].length);
dmabuf += sg[i].length;
}
}
/*
* Command handling
*/
static inline void wbsd_get_short_reply(struct wbsd_host *host,
struct mmc_command *cmd)
{
/*
* Correct response type?
*/
if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_SHORT) {
cmd->error = -EILSEQ;
return;
}
cmd->resp[0] = wbsd_read_index(host, WBSD_IDX_RESP12) << 24;
cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP13) << 16;
cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP14) << 8;
cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP15) << 0;
cmd->resp[1] = wbsd_read_index(host, WBSD_IDX_RESP16) << 24;
}
static inline void wbsd_get_long_reply(struct wbsd_host *host,
struct mmc_command *cmd)
{
int i;
/*
* Correct response type?
*/
if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_LONG) {
cmd->error = -EILSEQ;
return;
}
for (i = 0; i < 4; i++) {
cmd->resp[i] =
wbsd_read_index(host, WBSD_IDX_RESP1 + i * 4) << 24;
cmd->resp[i] |=
wbsd_read_index(host, WBSD_IDX_RESP2 + i * 4) << 16;
cmd->resp[i] |=
wbsd_read_index(host, WBSD_IDX_RESP3 + i * 4) << 8;
cmd->resp[i] |=
wbsd_read_index(host, WBSD_IDX_RESP4 + i * 4) << 0;
}
}
static void wbsd_send_command(struct wbsd_host *host, struct mmc_command *cmd)
{
int i;
u8 status, isr;
/*
* Clear accumulated ISR. The interrupt routine
* will fill this one with events that occur during
* transfer.
*/
host->isr = 0;
/*
* Send the command (CRC calculated by host).
*/
outb(cmd->opcode, host->base + WBSD_CMDR);
for (i = 3; i >= 0; i--)
outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR);
cmd->error = 0;
/*
* Wait for the request to complete.
*/
do {
status = wbsd_read_index(host, WBSD_IDX_STATUS);
} while (status & WBSD_CARDTRAFFIC);
/*
* Do we expect a reply?
*/
if (cmd->flags & MMC_RSP_PRESENT) {
/*
* Read back status.
*/
isr = host->isr;
/* Card removed? */
if (isr & WBSD_INT_CARD)
cmd->error = -ENOMEDIUM;
/* Timeout? */
else if (isr & WBSD_INT_TIMEOUT)
cmd->error = -ETIMEDOUT;
/* CRC? */
else if ((cmd->flags & MMC_RSP_CRC) && (isr & WBSD_INT_CRC))
cmd->error = -EILSEQ;
/* All ok */
else {
if (cmd->flags & MMC_RSP_136)
wbsd_get_long_reply(host, cmd);
else
wbsd_get_short_reply(host, cmd);
}
}
}
/*
* Data functions
*/
static void wbsd_empty_fifo(struct wbsd_host *host)
{
struct mmc_data *data = host->mrq->cmd->data;
char *buffer;
int i, fsr, fifo;
/*
* Handle excessive data.
*/
if (host->num_sg == 0)
return;
buffer = wbsd_sg_to_buffer(host) + host->offset;
/*
* Drain the fifo. This has a tendency to loop longer
* than the FIFO length (usually one block).
*/
while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY)) {
/*
* The size field in the FSR is broken so we have to
* do some guessing.
*/
if (fsr & WBSD_FIFO_FULL)
fifo = 16;
else if (fsr & WBSD_FIFO_FUTHRE)
fifo = 8;
else
fifo = 1;
for (i = 0; i < fifo; i++) {
*buffer = inb(host->base + WBSD_DFR);
buffer++;
host->offset++;
host->remain--;
data->bytes_xfered++;
/*
* End of scatter list entry?
*/
if (host->remain == 0) {
/*
* Get next entry. Check if last.
*/
if (!wbsd_next_sg(host))
return;
buffer = wbsd_sg_to_buffer(host);
}
}
}
/*
* This is a very dirty hack to solve a
* hardware problem. The chip doesn't trigger
* FIFO threshold interrupts properly.
*/
if ((data->blocks * data->blksz - data->bytes_xfered) < 16)
tasklet_schedule(&host->fifo_tasklet);
}
static void wbsd_fill_fifo(struct wbsd_host *host)
{
struct mmc_data *data = host->mrq->cmd->data;
char *buffer;
int i, fsr, fifo;
/*
* Check that we aren't being called after the
* entire buffer has been transferred.
*/
if (host->num_sg == 0)
return;
buffer = wbsd_sg_to_buffer(host) + host->offset;
/*
* Fill the fifo. This has a tendency to loop longer
* than the FIFO length (usually one block).
*/
while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL)) {
/*
* The size field in the FSR is broken so we have to
* do some guessing.
*/
if (fsr & WBSD_FIFO_EMPTY)
fifo = 0;
else if (fsr & WBSD_FIFO_EMTHRE)
fifo = 8;
else
fifo = 15;
for (i = 16; i > fifo; i--) {
outb(*buffer, host->base + WBSD_DFR);
buffer++;
host->offset++;
host->remain--;
data->bytes_xfered++;
/*
* End of scatter list entry?
*/
if (host->remain == 0) {
/*
* Get next entry. Check if last.
*/
if (!wbsd_next_sg(host))
return;
buffer = wbsd_sg_to_buffer(host);
}
}
}
/*
* The controller stops sending interrupts for
* 'FIFO empty' under certain conditions. So we
* need to be a bit more pro-active.
*/
tasklet_schedule(&host->fifo_tasklet);
}
static void wbsd_prepare_data(struct wbsd_host *host, struct mmc_data *data)
{
u16 blksize;
u8 setup;
unsigned long dmaflags;
unsigned int size;
/*
* Calculate size.
*/
size = data->blocks * data->blksz;
/*
* Check timeout values for overflow.
* (Yes, some cards cause this value to overflow).
*/
if (data->timeout_ns > 127000000)
wbsd_write_index(host, WBSD_IDX_TAAC, 127);
else {
wbsd_write_index(host, WBSD_IDX_TAAC,
data->timeout_ns / 1000000);
}
if (data->timeout_clks > 255)
wbsd_write_index(host, WBSD_IDX_NSAC, 255);
else
wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks);
/*
* Inform the chip of how large blocks will be
* sent. It needs this to determine when to
* calculate CRC.
*
* Space for CRC must be included in the size.
* Two bytes are needed for each data line.
*/
if (host->bus_width == MMC_BUS_WIDTH_1) {
blksize = data->blksz + 2;
wbsd_write_index(host, WBSD_IDX_PBSMSB, (blksize >> 4) & 0xF0);
wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);
} else if (host->bus_width == MMC_BUS_WIDTH_4) {
blksize = data->blksz + 2 * 4;
wbsd_write_index(host, WBSD_IDX_PBSMSB,
((blksize >> 4) & 0xF0) | WBSD_DATA_WIDTH);
wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);
} else {
data->error = -EINVAL;
return;
}
/*
* Clear the FIFO. This is needed even for DMA
* transfers since the chip still uses the FIFO
* internally.
*/
setup = wbsd_read_index(host, WBSD_IDX_SETUP);
setup |= WBSD_FIFO_RESET;
wbsd_write_index(host, WBSD_IDX_SETUP, setup);
/*
* DMA transfer?
*/
if (host->dma >= 0) {
/*
* The buffer for DMA is only 64 kB.
*/
BUG_ON(size > 0x10000);
if (size > 0x10000) {
data->error = -EINVAL;
return;
}
/*
* Transfer data from the SG list to
* the DMA buffer.
*/
if (data->flags & MMC_DATA_WRITE)
wbsd_sg_to_dma(host, data);
/*
* Initialise the ISA DMA controller.
*/
dmaflags = claim_dma_lock();
disable_dma(host->dma);
clear_dma_ff(host->dma);
if (data->flags & MMC_DATA_READ)
set_dma_mode(host->dma, DMA_MODE_READ & ~0x40);
else
set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40);
set_dma_addr(host->dma, host->dma_addr);
set_dma_count(host->dma, size);
enable_dma(host->dma);
release_dma_lock(dmaflags);
/*
* Enable DMA on the host.
*/
wbsd_write_index(host, WBSD_IDX_DMA, WBSD_DMA_ENABLE);
} else {
/*
* This flag is used to keep printk
* output to a minimum.
*/
host->firsterr = 1;
/*
* Initialise the SG list.
*/
wbsd_init_sg(host, data);
/*
* Turn off DMA.
*/
wbsd_write_index(host, WBSD_IDX_DMA, 0);
/*
* Set up FIFO threshold levels (and fill
* buffer if doing a write).
*/
if (data->flags & MMC_DATA_READ) {
wbsd_write_index(host, WBSD_IDX_FIFOEN,
WBSD_FIFOEN_FULL | 8);
} else {
wbsd_write_index(host, WBSD_IDX_FIFOEN,
WBSD_FIFOEN_EMPTY | 8);
wbsd_fill_fifo(host);
}
}
data->error = 0;
}
static void wbsd_finish_data(struct wbsd_host *host, struct mmc_data *data)
{
unsigned long dmaflags;
int count;
u8 status;
WARN_ON(host->mrq == NULL);
/*
* Send a stop command if needed.
*/
if (data->stop)
wbsd_send_command(host, data->stop);
/*
* Wait for the controller to leave data
* transfer state.
*/
do {
status = wbsd_read_index(host, WBSD_IDX_STATUS);
} while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE));
/*
* DMA transfer?
*/
if (host->dma >= 0) {
/*
* Disable DMA on the host.
*/
wbsd_write_index(host, WBSD_IDX_DMA, 0);
/*
* Turn of ISA DMA controller.
*/
dmaflags = claim_dma_lock();
disable_dma(host->dma);
clear_dma_ff(host->dma);
count = get_dma_residue(host->dma);
release_dma_lock(dmaflags);
data->bytes_xfered = host->mrq->data->blocks *
host->mrq->data->blksz - count;
data->bytes_xfered -= data->bytes_xfered % data->blksz;
/*
* Any leftover data?
*/
if (count) {
pr_err("%s: Incomplete DMA transfer. "
"%d bytes left.\n",
mmc_hostname(host->mmc), count);
if (!data->error)
data->error = -EIO;
} else {
/*
* Transfer data from DMA buffer to
* SG list.
*/
if (data->flags & MMC_DATA_READ)
wbsd_dma_to_sg(host, data);
}
if (data->error) {
if (data->bytes_xfered)
data->bytes_xfered -= data->blksz;
}
}
wbsd_request_end(host, host->mrq);
}
/*****************************************************************************\
* *
* MMC layer callbacks *
* *
\*****************************************************************************/
static void wbsd_request(struct mmc_host *mmc, struct mmc_request *mrq)
{
struct wbsd_host *host = mmc_priv(mmc);
struct mmc_command *cmd;
/*
* Disable tasklets to avoid a deadlock.
*/
spin_lock_bh(&host->lock);
BUG_ON(host->mrq != NULL);
cmd = mrq->cmd;
host->mrq = mrq;
/*
* Check that there is actually a card in the slot.
*/
if (!(host->flags & WBSD_FCARD_PRESENT)) {
cmd->error = -ENOMEDIUM;
goto done;
}
if (cmd->data) {
/*
* The hardware is so delightfully stupid that it has a list
* of "data" commands. If a command isn't on this list, it'll
* just go back to the idle state and won't send any data
* interrupts.
*/
switch (cmd->opcode) {
case 11:
case 17:
case 18:
case 20:
case 24:
case 25:
case 26:
case 27:
case 30:
case 42:
case 56:
break;
/* ACMDs. We don't keep track of state, so we just treat them
* like any other command. */
case 51:
break;
default:
#ifdef CONFIG_MMC_DEBUG
pr_warning("%s: Data command %d is not "
"supported by this controller.\n",
mmc_hostname(host->mmc), cmd->opcode);
#endif
cmd->error = -EINVAL;
goto done;
};
}
/*
* Does the request include data?
*/
if (cmd->data) {
wbsd_prepare_data(host, cmd->data);
if (cmd->data->error)
goto done;
}
wbsd_send_command(host, cmd);
/*
* If this is a data transfer the request
* will be finished after the data has
* transferred.
*/
if (cmd->data && !cmd->error) {
/*
* Dirty fix for hardware bug.
*/
if (host->dma == -1)
tasklet_schedule(&host->fifo_tasklet);
spin_unlock_bh(&host->lock);
return;
}
done:
wbsd_request_end(host, mrq);
spin_unlock_bh(&host->lock);
}
static void wbsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
{
struct wbsd_host *host = mmc_priv(mmc);
u8 clk, setup, pwr;
spin_lock_bh(&host->lock);
/*
* Reset the chip on each power off.
* Should clear out any weird states.
*/
if (ios->power_mode == MMC_POWER_OFF)
wbsd_init_device(host);
if (ios->clock >= 24000000)
clk = WBSD_CLK_24M;
else if (ios->clock >= 16000000)
clk = WBSD_CLK_16M;
else if (ios->clock >= 12000000)
clk = WBSD_CLK_12M;
else
clk = WBSD_CLK_375K;
/*
* Only write to the clock register when
* there is an actual change.
*/
if (clk != host->clk) {
wbsd_write_index(host, WBSD_IDX_CLK, clk);
host->clk = clk;
}
/*
* Power up card.
*/
if (ios->power_mode != MMC_POWER_OFF) {
pwr = inb(host->base + WBSD_CSR);
pwr &= ~WBSD_POWER_N;
outb(pwr, host->base + WBSD_CSR);
}
/*
* MMC cards need to have pin 1 high during init.
* It wreaks havoc with the card detection though so
* that needs to be disabled.
*/
setup = wbsd_read_index(host, WBSD_IDX_SETUP);
if (ios->chip_select == MMC_CS_HIGH) {
BUG_ON(ios->bus_width != MMC_BUS_WIDTH_1);
setup |= WBSD_DAT3_H;
host->flags |= WBSD_FIGNORE_DETECT;
} else {
if (setup & WBSD_DAT3_H) {
setup &= ~WBSD_DAT3_H;
/*
* We cannot resume card detection immediately
* because of capacitance and delays in the chip.
*/
mod_timer(&host->ignore_timer, jiffies + HZ / 100);
}
}
wbsd_write_index(host, WBSD_IDX_SETUP, setup);
/*
* Store bus width for later. Will be used when
* setting up the data transfer.
*/
host->bus_width = ios->bus_width;
spin_unlock_bh(&host->lock);
}
static int wbsd_get_ro(struct mmc_host *mmc)
{
struct wbsd_host *host = mmc_priv(mmc);
u8 csr;
spin_lock_bh(&host->lock);
csr = inb(host->base + WBSD_CSR);
csr |= WBSD_MSLED;
outb(csr, host->base + WBSD_CSR);
mdelay(1);
csr = inb(host->base + WBSD_CSR);
csr &= ~WBSD_MSLED;
outb(csr, host->base + WBSD_CSR);
spin_unlock_bh(&host->lock);
return !!(csr & WBSD_WRPT);
}
static const struct mmc_host_ops wbsd_ops = {
.request = wbsd_request,
.set_ios = wbsd_set_ios,
.get_ro = wbsd_get_ro,
};
/*****************************************************************************\
* *
* Interrupt handling *
* *
\*****************************************************************************/
/*
* Helper function to reset detection ignore
*/
static void wbsd_reset_ignore(unsigned long data)
{
struct wbsd_host *host = (struct wbsd_host *)data;
BUG_ON(host == NULL);
DBG("Resetting card detection ignore\n");
spin_lock_bh(&host->lock);
host->flags &= ~WBSD_FIGNORE_DETECT;
/*
* Card status might have changed during the
* blackout.
*/
tasklet_schedule(&host->card_tasklet);
spin_unlock_bh(&host->lock);
}
/*
* Tasklets
*/
static inline struct mmc_data *wbsd_get_data(struct wbsd_host *host)
{
WARN_ON(!host->mrq);
if (!host->mrq)
return NULL;
WARN_ON(!host->mrq->cmd);
if (!host->mrq->cmd)
return NULL;
WARN_ON(!host->mrq->cmd->data);
if (!host->mrq->cmd->data)
return NULL;
return host->mrq->cmd->data;
}
static void wbsd_tasklet_card(unsigned long param)
{
struct wbsd_host *host = (struct wbsd_host *)param;
u8 csr;
int delay = -1;
spin_lock(&host->lock);
if (host->flags & WBSD_FIGNORE_DETECT) {
spin_unlock(&host->lock);
return;
}
csr = inb(host->base + WBSD_CSR);
WARN_ON(csr == 0xff);
if (csr & WBSD_CARDPRESENT) {
if (!(host->flags & WBSD_FCARD_PRESENT)) {
DBG("Card inserted\n");
host->flags |= WBSD_FCARD_PRESENT;
delay = 500;
}
} else if (host->flags & WBSD_FCARD_PRESENT) {
DBG("Card removed\n");
host->flags &= ~WBSD_FCARD_PRESENT;
if (host->mrq) {
pr_err("%s: Card removed during transfer!\n",
mmc_hostname(host->mmc));
wbsd_reset(host);
host->mrq->cmd->error = -ENOMEDIUM;
tasklet_schedule(&host->finish_tasklet);
}
delay = 0;
}
/*
* Unlock first since we might get a call back.
*/
spin_unlock(&host->lock);
if (delay != -1)
mmc_detect_change(host->mmc, msecs_to_jiffies(delay));
}
static void wbsd_tasklet_fifo(unsigned long param)
{
struct wbsd_host *host = (struct wbsd_host *)param;
struct mmc_data *data;
spin_lock(&host->lock);
if (!host->mrq)
goto end;
data = wbsd_get_data(host);
if (!data)
goto end;
if (data->flags & MMC_DATA_WRITE)
wbsd_fill_fifo(host);
else
wbsd_empty_fifo(host);
/*
* Done?
*/
if (host->num_sg == 0) {
wbsd_write_index(host, WBSD_IDX_FIFOEN, 0);
tasklet_schedule(&host->finish_tasklet);
}
end:
spin_unlock(&host->lock);
}
static void wbsd_tasklet_crc(unsigned long param)
{
struct wbsd_host *host = (struct wbsd_host *)param;
struct mmc_data *data;
spin_lock(&host->lock);
if (!host->mrq)
goto end;
data = wbsd_get_data(host);
if (!data)
goto end;
DBGF("CRC error\n");
data->error = -EILSEQ;
tasklet_schedule(&host->finish_tasklet);
end:
spin_unlock(&host->lock);
}
static void wbsd_tasklet_timeout(unsigned long param)
{
struct wbsd_host *host = (struct wbsd_host *)param;
struct mmc_data *data;
spin_lock(&host->lock);
if (!host->mrq)
goto end;
data = wbsd_get_data(host);
if (!data)
goto end;
DBGF("Timeout\n");
data->error = -ETIMEDOUT;
tasklet_schedule(&host->finish_tasklet);
end:
spin_unlock(&host->lock);
}
static void wbsd_tasklet_finish(unsigned long param)
{
struct wbsd_host *host = (struct wbsd_host *)param;
struct mmc_data *data;
spin_lock(&host->lock);
WARN_ON(!host->mrq);
if (!host->mrq)
goto end;
data = wbsd_get_data(host);
if (!data)
goto end;
wbsd_finish_data(host, data);
end:
spin_unlock(&host->lock);
}
/*
* Interrupt handling
*/
static irqreturn_t wbsd_irq(int irq, void *dev_id)
{
struct wbsd_host *host = dev_id;
int isr;
isr = inb(host->base + WBSD_ISR);
/*
* Was it actually our hardware that caused the interrupt?
*/
if (isr == 0xff || isr == 0x00)
return IRQ_NONE;
host->isr |= isr;
/*
* Schedule tasklets as needed.
*/
if (isr & WBSD_INT_CARD)
tasklet_schedule(&host->card_tasklet);
if (isr & WBSD_INT_FIFO_THRE)
tasklet_schedule(&host->fifo_tasklet);
if (isr & WBSD_INT_CRC)
tasklet_hi_schedule(&host->crc_tasklet);
if (isr & WBSD_INT_TIMEOUT)
tasklet_hi_schedule(&host->timeout_tasklet);
if (isr & WBSD_INT_TC)
tasklet_schedule(&host->finish_tasklet);
return IRQ_HANDLED;
}
/*****************************************************************************\
* *
* Device initialisation and shutdown *
* *
\*****************************************************************************/
/*
* Allocate/free MMC structure.
*/
static int __devinit wbsd_alloc_mmc(struct device *dev)
{
struct mmc_host *mmc;
struct wbsd_host *host;
/*
* Allocate MMC structure.
*/
mmc = mmc_alloc_host(sizeof(struct wbsd_host), dev);
if (!mmc)
return -ENOMEM;
host = mmc_priv(mmc);
host->mmc = mmc;
host->dma = -1;
/*
* Set host parameters.
*/
mmc->ops = &wbsd_ops;
mmc->f_min = 375000;
mmc->f_max = 24000000;
mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
mmc->caps = MMC_CAP_4_BIT_DATA;
spin_lock_init(&host->lock);
/*
* Set up timers
*/
init_timer(&host->ignore_timer);
host->ignore_timer.data = (unsigned long)host;
host->ignore_timer.function = wbsd_reset_ignore;
/*
* Maximum number of segments. Worst case is one sector per segment
* so this will be 64kB/512.
*/
mmc->max_segs = 128;
/*
* Maximum request size. Also limited by 64KiB buffer.
*/
mmc->max_req_size = 65536;
/*
* Maximum segment size. Could be one segment with the maximum number
* of bytes.
*/
mmc->max_seg_size = mmc->max_req_size;
/*
* Maximum block size. We have 12 bits (= 4095) but have to subtract
* space for CRC. So the maximum is 4095 - 4*2 = 4087.
*/
mmc->max_blk_size = 4087;
/*
* Maximum block count. There is no real limit so the maximum
* request size will be the only restriction.
*/
mmc->max_blk_count = mmc->max_req_size;
dev_set_drvdata(dev, mmc);
return 0;
}
static void wbsd_free_mmc(struct device *dev)
{
struct mmc_host *mmc;
struct wbsd_host *host;
mmc = dev_get_drvdata(dev);
if (!mmc)
return;
host = mmc_priv(mmc);
BUG_ON(host == NULL);
del_timer_sync(&host->ignore_timer);
mmc_free_host(mmc);
dev_set_drvdata(dev, NULL);
}
/*
* Scan for known chip id:s
*/
static int __devinit wbsd_scan(struct wbsd_host *host)
{
int i, j, k;
int id;
/*
* Iterate through all ports, all codes to
* find hardware that is in our known list.
*/
for (i = 0; i < ARRAY_SIZE(config_ports); i++) {
if (!request_region(config_ports[i], 2, DRIVER_NAME))
continue;
for (j = 0; j < ARRAY_SIZE(unlock_codes); j++) {
id = 0xFFFF;
host->config = config_ports[i];
host->unlock_code = unlock_codes[j];
wbsd_unlock_config(host);
outb(WBSD_CONF_ID_HI, config_ports[i]);
id = inb(config_ports[i] + 1) << 8;
outb(WBSD_CONF_ID_LO, config_ports[i]);
id |= inb(config_ports[i] + 1);
wbsd_lock_config(host);
for (k = 0; k < ARRAY_SIZE(valid_ids); k++) {
if (id == valid_ids[k]) {
host->chip_id = id;
return 0;
}
}
if (id != 0xFFFF) {
DBG("Unknown hardware (id %x) found at %x\n",
id, config_ports[i]);
}
}
release_region(config_ports[i], 2);
}
host->config = 0;
host->unlock_code = 0;
return -ENODEV;
}
/*
* Allocate/free io port ranges
*/
static int __devinit wbsd_request_region(struct wbsd_host *host, int base)
{
if (base & 0x7)
return -EINVAL;
if (!request_region(base, 8, DRIVER_NAME))
return -EIO;
host->base = base;
return 0;
}
static void wbsd_release_regions(struct wbsd_host *host)
{
if (host->base)
release_region(host->base, 8);
host->base = 0;
if (host->config)
release_region(host->config, 2);
host->config = 0;
}
/*
* Allocate/free DMA port and buffer
*/
static void __devinit wbsd_request_dma(struct wbsd_host *host, int dma)
{
if (dma < 0)
return;
if (request_dma(dma, DRIVER_NAME))
goto err;
/*
* We need to allocate a special buffer in
* order for ISA to be able to DMA to it.
*/
host->dma_buffer = kmalloc(WBSD_DMA_SIZE,
GFP_NOIO | GFP_DMA | __GFP_REPEAT | __GFP_NOWARN);
if (!host->dma_buffer)
goto free;
/*
* Translate the address to a physical address.
*/
host->dma_addr = dma_map_single(mmc_dev(host->mmc), host->dma_buffer,
WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
/*
* ISA DMA must be aligned on a 64k basis.
*/
if ((host->dma_addr & 0xffff) != 0)
goto kfree;
/*
* ISA cannot access memory above 16 MB.
*/
else if (host->dma_addr >= 0x1000000)
goto kfree;
host->dma = dma;
return;
kfree:
/*
* If we've gotten here then there is some kind of alignment bug
*/
BUG_ON(1);
dma_unmap_single(mmc_dev(host->mmc), host->dma_addr,
WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
host->dma_addr = 0;
kfree(host->dma_buffer);
host->dma_buffer = NULL;
free:
free_dma(dma);
err:
pr_warning(DRIVER_NAME ": Unable to allocate DMA %d. "
"Falling back on FIFO.\n", dma);
}
static void wbsd_release_dma(struct wbsd_host *host)
{
if (host->dma_addr) {
dma_unmap_single(mmc_dev(host->mmc), host->dma_addr,
WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
}
kfree(host->dma_buffer);
if (host->dma >= 0)
free_dma(host->dma);
host->dma = -1;
host->dma_buffer = NULL;
host->dma_addr = 0;
}
/*
* Allocate/free IRQ.
*/
static int __devinit wbsd_request_irq(struct wbsd_host *host, int irq)
{
int ret;
/*
* Set up tasklets. Must be done before requesting interrupt.
*/
tasklet_init(&host->card_tasklet, wbsd_tasklet_card,
(unsigned long)host);
tasklet_init(&host->fifo_tasklet, wbsd_tasklet_fifo,
(unsigned long)host);
tasklet_init(&host->crc_tasklet, wbsd_tasklet_crc,
(unsigned long)host);
tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout,
(unsigned long)host);
tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish,
(unsigned long)host);
/*
* Allocate interrupt.
*/
ret = request_irq(irq, wbsd_irq, IRQF_SHARED, DRIVER_NAME, host);
if (ret)
return ret;
host->irq = irq;
return 0;
}
static void wbsd_release_irq(struct wbsd_host *host)
{
if (!host->irq)
return;
free_irq(host->irq, host);
host->irq = 0;
tasklet_kill(&host->card_tasklet);
tasklet_kill(&host->fifo_tasklet);
tasklet_kill(&host->crc_tasklet);
tasklet_kill(&host->timeout_tasklet);
tasklet_kill(&host->finish_tasklet);
}
/*
* Allocate all resources for the host.
*/
static int __devinit wbsd_request_resources(struct wbsd_host *host,
int base, int irq, int dma)
{
int ret;
/*
* Allocate I/O ports.
*/
ret = wbsd_request_region(host, base);
if (ret)
return ret;
/*
* Allocate interrupt.
*/
ret = wbsd_request_irq(host, irq);
if (ret)
return ret;
/*
* Allocate DMA.
*/
wbsd_request_dma(host, dma);
return 0;
}
/*
* Release all resources for the host.
*/
static void wbsd_release_resources(struct wbsd_host *host)
{
wbsd_release_dma(host);
wbsd_release_irq(host);
wbsd_release_regions(host);
}
/*
* Configure the resources the chip should use.
*/
static void wbsd_chip_config(struct wbsd_host *host)
{
wbsd_unlock_config(host);
/*
* Reset the chip.
*/
wbsd_write_config(host, WBSD_CONF_SWRST, 1);
wbsd_write_config(host, WBSD_CONF_SWRST, 0);
/*
* Select SD/MMC function.
*/
wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
/*
* Set up card detection.
*/
wbsd_write_config(host, WBSD_CONF_PINS, WBSD_PINS_DETECT_GP11);
/*
* Configure chip
*/
wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8);
wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff);
wbsd_write_config(host, WBSD_CONF_IRQ, host->irq);
if (host->dma >= 0)
wbsd_write_config(host, WBSD_CONF_DRQ, host->dma);
/*
* Enable and power up chip.
*/
wbsd_write_config(host, WBSD_CONF_ENABLE, 1);
wbsd_write_config(host, WBSD_CONF_POWER, 0x20);
wbsd_lock_config(host);
}
/*
* Check that configured resources are correct.
*/
static int wbsd_chip_validate(struct wbsd_host *host)
{
int base, irq, dma;
wbsd_unlock_config(host);
/*
* Select SD/MMC function.
*/
wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
/*
* Read configuration.
*/
base = wbsd_read_config(host, WBSD_CONF_PORT_HI) << 8;
base |= wbsd_read_config(host, WBSD_CONF_PORT_LO);
irq = wbsd_read_config(host, WBSD_CONF_IRQ);
dma = wbsd_read_config(host, WBSD_CONF_DRQ);
wbsd_lock_config(host);
/*
* Validate against given configuration.
*/
if (base != host->base)
return 0;
if (irq != host->irq)
return 0;
if ((dma != host->dma) && (host->dma != -1))
return 0;
return 1;
}
/*
* Powers down the SD function
*/
static void wbsd_chip_poweroff(struct wbsd_host *host)
{
wbsd_unlock_config(host);
wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
wbsd_write_config(host, WBSD_CONF_ENABLE, 0);
wbsd_lock_config(host);
}
/*****************************************************************************\
* *
* Devices setup and shutdown *
* *
\*****************************************************************************/
static int __devinit wbsd_init(struct device *dev, int base, int irq, int dma,
int pnp)
{
struct wbsd_host *host = NULL;
struct mmc_host *mmc = NULL;
int ret;
ret = wbsd_alloc_mmc(dev);
if (ret)
return ret;
mmc = dev_get_drvdata(dev);
host = mmc_priv(mmc);
/*
* Scan for hardware.
*/
ret = wbsd_scan(host);
if (ret) {
if (pnp && (ret == -ENODEV)) {
pr_warning(DRIVER_NAME
": Unable to confirm device presence. You may "
"experience lock-ups.\n");
} else {
wbsd_free_mmc(dev);
return ret;
}
}
/*
* Request resources.
*/
ret = wbsd_request_resources(host, base, irq, dma);
if (ret) {
wbsd_release_resources(host);
wbsd_free_mmc(dev);
return ret;
}
/*
* See if chip needs to be configured.
*/
if (pnp) {
if ((host->config != 0) && !wbsd_chip_validate(host)) {
pr_warning(DRIVER_NAME
": PnP active but chip not configured! "
"You probably have a buggy BIOS. "
"Configuring chip manually.\n");
wbsd_chip_config(host);
}
} else
wbsd_chip_config(host);
/*
* Power Management stuff. No idea how this works.
* Not tested.
*/
#ifdef CONFIG_PM
if (host->config) {
wbsd_unlock_config(host);
wbsd_write_config(host, WBSD_CONF_PME, 0xA0);
wbsd_lock_config(host);
}
#endif
/*
* Allow device to initialise itself properly.
*/
mdelay(5);
/*
* Reset the chip into a known state.
*/
wbsd_init_device(host);
mmc_add_host(mmc);
pr_info("%s: W83L51xD", mmc_hostname(mmc));
if (host->chip_id != 0)
printk(" id %x", (int)host->chip_id);
printk(" at 0x%x irq %d", (int)host->base, (int)host->irq);
if (host->dma >= 0)
printk(" dma %d", (int)host->dma);
else
printk(" FIFO");
if (pnp)
printk(" PnP");
printk("\n");
return 0;
}
static void __devexit wbsd_shutdown(struct device *dev, int pnp)
{
struct mmc_host *mmc = dev_get_drvdata(dev);
struct wbsd_host *host;
if (!mmc)
return;
host = mmc_priv(mmc);
mmc_remove_host(mmc);
/*
* Power down the SD/MMC function.
*/
if (!pnp)
wbsd_chip_poweroff(host);
wbsd_release_resources(host);
wbsd_free_mmc(dev);
}
/*
* Non-PnP
*/
static int __devinit wbsd_probe(struct platform_device *dev)
{
/* Use the module parameters for resources */
return wbsd_init(&dev->dev, param_io, param_irq, param_dma, 0);
}
static int __devexit wbsd_remove(struct platform_device *dev)
{
wbsd_shutdown(&dev->dev, 0);
return 0;
}
/*
* PnP
*/
#ifdef CONFIG_PNP
static int __devinit
wbsd_pnp_probe(struct pnp_dev *pnpdev, const struct pnp_device_id *dev_id)
{
int io, irq, dma;
/*
* Get resources from PnP layer.
*/
io = pnp_port_start(pnpdev, 0);
irq = pnp_irq(pnpdev, 0);
if (pnp_dma_valid(pnpdev, 0))
dma = pnp_dma(pnpdev, 0);
else
dma = -1;
DBGF("PnP resources: port %3x irq %d dma %d\n", io, irq, dma);
return wbsd_init(&pnpdev->dev, io, irq, dma, 1);
}
static void __devexit wbsd_pnp_remove(struct pnp_dev *dev)
{
wbsd_shutdown(&dev->dev, 1);
}
#endif /* CONFIG_PNP */
/*
* Power management
*/
#ifdef CONFIG_PM
static int wbsd_suspend(struct wbsd_host *host, pm_message_t state)
{
BUG_ON(host == NULL);
return mmc_suspend_host(host->mmc);
}
static int wbsd_resume(struct wbsd_host *host)
{
BUG_ON(host == NULL);
wbsd_init_device(host);
return mmc_resume_host(host->mmc);
}
static int wbsd_platform_suspend(struct platform_device *dev,
pm_message_t state)
{
struct mmc_host *mmc = platform_get_drvdata(dev);
struct wbsd_host *host;
int ret;
if (mmc == NULL)
return 0;
DBGF("Suspending...\n");
host = mmc_priv(mmc);
ret = wbsd_suspend(host, state);
if (ret)
return ret;
wbsd_chip_poweroff(host);
return 0;
}
static int wbsd_platform_resume(struct platform_device *dev)
{
struct mmc_host *mmc = platform_get_drvdata(dev);
struct wbsd_host *host;
if (mmc == NULL)
return 0;
DBGF("Resuming...\n");
host = mmc_priv(mmc);
wbsd_chip_config(host);
/*
* Allow device to initialise itself properly.
*/
mdelay(5);
return wbsd_resume(host);
}
#ifdef CONFIG_PNP
static int wbsd_pnp_suspend(struct pnp_dev *pnp_dev, pm_message_t state)
{
struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev);
struct wbsd_host *host;
if (mmc == NULL)
return 0;
DBGF("Suspending...\n");
host = mmc_priv(mmc);
return wbsd_suspend(host, state);
}
static int wbsd_pnp_resume(struct pnp_dev *pnp_dev)
{
struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev);
struct wbsd_host *host;
if (mmc == NULL)
return 0;
DBGF("Resuming...\n");
host = mmc_priv(mmc);
/*
* See if chip needs to be configured.
*/
if (host->config != 0) {
if (!wbsd_chip_validate(host)) {
pr_warning(DRIVER_NAME
": PnP active but chip not configured! "
"You probably have a buggy BIOS. "
"Configuring chip manually.\n");
wbsd_chip_config(host);
}
}
/*
* Allow device to initialise itself properly.
*/
mdelay(5);
return wbsd_resume(host);
}
#endif /* CONFIG_PNP */
#else /* CONFIG_PM */
#define wbsd_platform_suspend NULL
#define wbsd_platform_resume NULL
#define wbsd_pnp_suspend NULL
#define wbsd_pnp_resume NULL
#endif /* CONFIG_PM */
static struct platform_device *wbsd_device;
static struct platform_driver wbsd_driver = {
.probe = wbsd_probe,
.remove = __devexit_p(wbsd_remove),
.suspend = wbsd_platform_suspend,
.resume = wbsd_platform_resume,
.driver = {
.name = DRIVER_NAME,
.owner = THIS_MODULE,
},
};
#ifdef CONFIG_PNP
static struct pnp_driver wbsd_pnp_driver = {
.name = DRIVER_NAME,
.id_table = pnp_dev_table,
.probe = wbsd_pnp_probe,
.remove = __devexit_p(wbsd_pnp_remove),
.suspend = wbsd_pnp_suspend,
.resume = wbsd_pnp_resume,
};
#endif /* CONFIG_PNP */
/*
* Module loading/unloading
*/
static int __init wbsd_drv_init(void)
{
int result;
pr_info(DRIVER_NAME
": Winbond W83L51xD SD/MMC card interface driver\n");
pr_info(DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
#ifdef CONFIG_PNP
if (!param_nopnp) {
result = pnp_register_driver(&wbsd_pnp_driver);
if (result < 0)
return result;
}
#endif /* CONFIG_PNP */
if (param_nopnp) {
result = platform_driver_register(&wbsd_driver);
if (result < 0)
return result;
wbsd_device = platform_device_alloc(DRIVER_NAME, -1);
if (!wbsd_device) {
platform_driver_unregister(&wbsd_driver);
return -ENOMEM;
}
result = platform_device_add(wbsd_device);
if (result) {
platform_device_put(wbsd_device);
platform_driver_unregister(&wbsd_driver);
return result;
}
}
return 0;
}
static void __exit wbsd_drv_exit(void)
{
#ifdef CONFIG_PNP
if (!param_nopnp)
pnp_unregister_driver(&wbsd_pnp_driver);
#endif /* CONFIG_PNP */
if (param_nopnp) {
platform_device_unregister(wbsd_device);
platform_driver_unregister(&wbsd_driver);
}
DBG("unloaded\n");
}
module_init(wbsd_drv_init);
module_exit(wbsd_drv_exit);
#ifdef CONFIG_PNP
module_param_named(nopnp, param_nopnp, uint, 0444);
#endif
module_param_named(io, param_io, uint, 0444);
module_param_named(irq, param_irq, uint, 0444);
module_param_named(dma, param_dma, int, 0444);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
MODULE_DESCRIPTION("Winbond W83L51xD SD/MMC card interface driver");
#ifdef CONFIG_PNP
MODULE_PARM_DESC(nopnp, "Scan for device instead of relying on PNP. (default 0)");
#endif
MODULE_PARM_DESC(io, "I/O base to allocate. Must be 8 byte aligned. (default 0x248)");
MODULE_PARM_DESC(irq, "IRQ to allocate. (default 6)");
MODULE_PARM_DESC(dma, "DMA channel to allocate. -1 for no DMA. (default 2)");
| gpl-2.0 |
flar2/evita-ElementalX | arch/powerpc/sysdev/mpc8xx_pic.c | 6888 | 3753 | #include <linux/kernel.h>
#include <linux/stddef.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/signal.h>
#include <linux/irq.h>
#include <linux/dma-mapping.h>
#include <asm/prom.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/8xx_immap.h>
#include "mpc8xx_pic.h"
#define PIC_VEC_SPURRIOUS 15
extern int cpm_get_irq(struct pt_regs *regs);
static struct irq_domain *mpc8xx_pic_host;
static unsigned long mpc8xx_cached_irq_mask;
static sysconf8xx_t __iomem *siu_reg;
static inline unsigned long mpc8xx_irqd_to_bit(struct irq_data *d)
{
return 0x80000000 >> irqd_to_hwirq(d);
}
static void mpc8xx_unmask_irq(struct irq_data *d)
{
mpc8xx_cached_irq_mask |= mpc8xx_irqd_to_bit(d);
out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
}
static void mpc8xx_mask_irq(struct irq_data *d)
{
mpc8xx_cached_irq_mask &= ~mpc8xx_irqd_to_bit(d);
out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
}
static void mpc8xx_ack(struct irq_data *d)
{
out_be32(&siu_reg->sc_sipend, mpc8xx_irqd_to_bit(d));
}
static void mpc8xx_end_irq(struct irq_data *d)
{
mpc8xx_cached_irq_mask |= mpc8xx_irqd_to_bit(d);
out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
}
static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type)
{
/* only external IRQ senses are programmable */
if ((flow_type & IRQ_TYPE_EDGE_FALLING) && !(irqd_to_hwirq(d) & 1)) {
unsigned int siel = in_be32(&siu_reg->sc_siel);
siel |= mpc8xx_irqd_to_bit(d);
out_be32(&siu_reg->sc_siel, siel);
__irq_set_handler_locked(d->irq, handle_edge_irq);
}
return 0;
}
static struct irq_chip mpc8xx_pic = {
.name = "MPC8XX SIU",
.irq_unmask = mpc8xx_unmask_irq,
.irq_mask = mpc8xx_mask_irq,
.irq_ack = mpc8xx_ack,
.irq_eoi = mpc8xx_end_irq,
.irq_set_type = mpc8xx_set_irq_type,
};
unsigned int mpc8xx_get_irq(void)
{
int irq;
/* For MPC8xx, read the SIVEC register and shift the bits down
* to get the irq number.
*/
irq = in_be32(&siu_reg->sc_sivec) >> 26;
if (irq == PIC_VEC_SPURRIOUS)
irq = NO_IRQ;
return irq_linear_revmap(mpc8xx_pic_host, irq);
}
static int mpc8xx_pic_host_map(struct irq_domain *h, unsigned int virq,
irq_hw_number_t hw)
{
pr_debug("mpc8xx_pic_host_map(%d, 0x%lx)\n", virq, hw);
/* Set default irq handle */
irq_set_chip_and_handler(virq, &mpc8xx_pic, handle_level_irq);
return 0;
}
static int mpc8xx_pic_host_xlate(struct irq_domain *h, struct device_node *ct,
const u32 *intspec, unsigned int intsize,
irq_hw_number_t *out_hwirq, unsigned int *out_flags)
{
static unsigned char map_pic_senses[4] = {
IRQ_TYPE_EDGE_RISING,
IRQ_TYPE_LEVEL_LOW,
IRQ_TYPE_LEVEL_HIGH,
IRQ_TYPE_EDGE_FALLING,
};
if (intspec[0] > 0x1f)
return 0;
*out_hwirq = intspec[0];
if (intsize > 1 && intspec[1] < 4)
*out_flags = map_pic_senses[intspec[1]];
else
*out_flags = IRQ_TYPE_NONE;
return 0;
}
static struct irq_domain_ops mpc8xx_pic_host_ops = {
.map = mpc8xx_pic_host_map,
.xlate = mpc8xx_pic_host_xlate,
};
int mpc8xx_pic_init(void)
{
struct resource res;
struct device_node *np;
int ret;
np = of_find_compatible_node(NULL, NULL, "fsl,pq1-pic");
if (np == NULL)
np = of_find_node_by_type(NULL, "mpc8xx-pic");
if (np == NULL) {
printk(KERN_ERR "Could not find fsl,pq1-pic node\n");
return -ENOMEM;
}
ret = of_address_to_resource(np, 0, &res);
if (ret)
goto out;
siu_reg = ioremap(res.start, resource_size(&res));
if (siu_reg == NULL) {
ret = -EINVAL;
goto out;
}
mpc8xx_pic_host = irq_domain_add_linear(np, 64, &mpc8xx_pic_host_ops, NULL);
if (mpc8xx_pic_host == NULL) {
printk(KERN_ERR "MPC8xx PIC: failed to allocate irq host!\n");
ret = -ENOMEM;
goto out;
}
return 0;
out:
of_node_put(np);
return ret;
}
| gpl-2.0 |
KainXS/y301a2kernelold | arch/sh/boards/board-edosk7760.c | 7400 | 4620 | /*
* Renesas Europe EDOSK7760 Board Support
*
* Copyright (C) 2008 SPES Societa' Progettazione Elettronica e Software Ltd.
* Author: Luca Santini <luca.santini@spesonline.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/init.h>
#include <linux/types.h>
#include <linux/platform_device.h>
#include <linux/smc91x.h>
#include <linux/interrupt.h>
#include <linux/i2c.h>
#include <linux/mtd/physmap.h>
#include <asm/machvec.h>
#include <asm/io.h>
#include <asm/addrspace.h>
#include <asm/delay.h>
#include <asm/i2c-sh7760.h>
#include <asm/sizes.h>
/* Bus state controller registers for CS4 area */
#define BSC_CS4BCR 0xA4FD0010
#define BSC_CS4WCR 0xA4FD0030
#define SMC_IOBASE 0xA2000000
#define SMC_IO_OFFSET 0x300
#define SMC_IOADDR (SMC_IOBASE + SMC_IO_OFFSET)
#define ETHERNET_IRQ 5
/* NOR flash */
static struct mtd_partition edosk7760_nor_flash_partitions[] = {
{
.name = "bootloader",
.offset = 0,
.size = SZ_256K,
.mask_flags = MTD_WRITEABLE, /* Read-only */
}, {
.name = "kernel",
.offset = MTDPART_OFS_APPEND,
.size = SZ_2M,
}, {
.name = "fs",
.offset = MTDPART_OFS_APPEND,
.size = (26 << 20),
}, {
.name = "other",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
static struct physmap_flash_data edosk7760_nor_flash_data = {
.width = 4,
.parts = edosk7760_nor_flash_partitions,
.nr_parts = ARRAY_SIZE(edosk7760_nor_flash_partitions),
};
static struct resource edosk7760_nor_flash_resources[] = {
[0] = {
.name = "NOR Flash",
.start = 0x00000000,
.end = 0x00000000 + SZ_32M - 1,
.flags = IORESOURCE_MEM,
}
};
static struct platform_device edosk7760_nor_flash_device = {
.name = "physmap-flash",
.resource = edosk7760_nor_flash_resources,
.num_resources = ARRAY_SIZE(edosk7760_nor_flash_resources),
.dev = {
.platform_data = &edosk7760_nor_flash_data,
},
};
/* i2c initialization functions */
static struct sh7760_i2c_platdata i2c_pd = {
.speed_khz = 400,
};
static struct resource sh7760_i2c1_res[] = {
{
.start = SH7760_I2C1_MMIO,
.end = SH7760_I2C1_MMIOEND,
.flags = IORESOURCE_MEM,
},{
.start = SH7760_I2C1_IRQ,
.end = SH7760_I2C1_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device sh7760_i2c1_dev = {
.dev = {
.platform_data = &i2c_pd,
},
.name = SH7760_I2C_DEVNAME,
.id = 1,
.resource = sh7760_i2c1_res,
.num_resources = ARRAY_SIZE(sh7760_i2c1_res),
};
static struct resource sh7760_i2c0_res[] = {
{
.start = SH7760_I2C0_MMIO,
.end = SH7760_I2C0_MMIOEND,
.flags = IORESOURCE_MEM,
}, {
.start = SH7760_I2C0_IRQ,
.end = SH7760_I2C0_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device sh7760_i2c0_dev = {
.dev = {
.platform_data = &i2c_pd,
},
.name = SH7760_I2C_DEVNAME,
.id = 0,
.resource = sh7760_i2c0_res,
.num_resources = ARRAY_SIZE(sh7760_i2c0_res),
};
/* eth initialization functions */
static struct smc91x_platdata smc91x_info = {
.flags = SMC91X_USE_16BIT | SMC91X_IO_SHIFT_1 | IORESOURCE_IRQ_LOWLEVEL,
};
static struct resource smc91x_res[] = {
[0] = {
.start = SMC_IOADDR,
.end = SMC_IOADDR + SZ_32 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = ETHERNET_IRQ,
.end = ETHERNET_IRQ,
.flags = IORESOURCE_IRQ ,
}
};
static struct platform_device smc91x_dev = {
.name = "smc91x",
.id = -1,
.num_resources = ARRAY_SIZE(smc91x_res),
.resource = smc91x_res,
.dev = {
.platform_data = &smc91x_info,
},
};
/* platform init code */
static struct platform_device *edosk7760_devices[] __initdata = {
&smc91x_dev,
&edosk7760_nor_flash_device,
&sh7760_i2c0_dev,
&sh7760_i2c1_dev,
};
static int __init init_edosk7760_devices(void)
{
plat_irq_setup_pins(IRQ_MODE_IRQ);
return platform_add_devices(edosk7760_devices,
ARRAY_SIZE(edosk7760_devices));
}
device_initcall(init_edosk7760_devices);
/*
* The Machine Vector
*/
struct sh_machine_vector mv_edosk7760 __initmv = {
.mv_name = "EDOSK7760",
.mv_nr_irqs = 128,
};
| gpl-2.0 |
thederekjay/android_kernel_samsung_msm8660-common | kernel/trace/trace_nop.c | 12008 | 2239 | /*
* nop tracer
*
* Copyright (C) 2008 Steven Noonan <steven@uplinklabs.net>
*
*/
#include <linux/module.h>
#include <linux/fs.h>
#include <linux/debugfs.h>
#include <linux/ftrace.h>
#include "trace.h"
/* Our two options */
enum {
TRACE_NOP_OPT_ACCEPT = 0x1,
TRACE_NOP_OPT_REFUSE = 0x2
};
/* Options for the tracer (see trace_options file) */
static struct tracer_opt nop_opts[] = {
/* Option that will be accepted by set_flag callback */
{ TRACER_OPT(test_nop_accept, TRACE_NOP_OPT_ACCEPT) },
/* Option that will be refused by set_flag callback */
{ TRACER_OPT(test_nop_refuse, TRACE_NOP_OPT_REFUSE) },
{ } /* Always set a last empty entry */
};
static struct tracer_flags nop_flags = {
/* You can check your flags value here when you want. */
.val = 0, /* By default: all flags disabled */
.opts = nop_opts
};
static struct trace_array *ctx_trace;
static void start_nop_trace(struct trace_array *tr)
{
/* Nothing to do! */
}
static void stop_nop_trace(struct trace_array *tr)
{
/* Nothing to do! */
}
static int nop_trace_init(struct trace_array *tr)
{
ctx_trace = tr;
start_nop_trace(tr);
return 0;
}
static void nop_trace_reset(struct trace_array *tr)
{
stop_nop_trace(tr);
}
/* It only serves as a signal handler and a callback to
* accept or refuse tthe setting of a flag.
* If you don't implement it, then the flag setting will be
* automatically accepted.
*/
static int nop_set_flag(u32 old_flags, u32 bit, int set)
{
/*
* Note that you don't need to update nop_flags.val yourself.
* The tracing Api will do it automatically if you return 0
*/
if (bit == TRACE_NOP_OPT_ACCEPT) {
printk(KERN_DEBUG "nop_test_accept flag set to %d: we accept."
" Now cat trace_options to see the result\n",
set);
return 0;
}
if (bit == TRACE_NOP_OPT_REFUSE) {
printk(KERN_DEBUG "nop_test_refuse flag set to %d: we refuse."
"Now cat trace_options to see the result\n",
set);
return -EINVAL;
}
return 0;
}
struct tracer nop_trace __read_mostly =
{
.name = "nop",
.init = nop_trace_init,
.reset = nop_trace_reset,
.wait_pipe = poll_wait_pipe,
#ifdef CONFIG_FTRACE_SELFTEST
.selftest = trace_selftest_startup_nop,
#endif
.flags = &nop_flags,
.set_flag = nop_set_flag
};
| gpl-2.0 |
bhuman/KernelV4 | drivers/media/dvb/b2c2/flexcop-sram.c | 12264 | 8690 | /*
* Linux driver for digital TV devices equipped with B2C2 FlexcopII(b)/III
* flexcop-sram.c - functions for controlling the SRAM
* see flexcop.c for copyright information
*/
#include "flexcop.h"
static void flexcop_sram_set_chip(struct flexcop_device *fc,
flexcop_sram_type_t type)
{
flexcop_set_ibi_value(wan_ctrl_reg_71c, sram_chip, type);
}
int flexcop_sram_init(struct flexcop_device *fc)
{
switch (fc->rev) {
case FLEXCOP_II:
case FLEXCOP_IIB:
flexcop_sram_set_chip(fc, FC_SRAM_1_32KB);
break;
case FLEXCOP_III:
flexcop_sram_set_chip(fc, FC_SRAM_1_48KB);
break;
default:
return -EINVAL;
}
return 0;
}
int flexcop_sram_set_dest(struct flexcop_device *fc, flexcop_sram_dest_t dest,
flexcop_sram_dest_target_t target)
{
flexcop_ibi_value v;
v = fc->read_ibi_reg(fc, sram_dest_reg_714);
if (fc->rev != FLEXCOP_III && target == FC_SRAM_DEST_TARGET_FC3_CA) {
err("SRAM destination target to available on FlexCopII(b)\n");
return -EINVAL;
}
deb_sram("sram dest: %x target: %x\n", dest, target);
if (dest & FC_SRAM_DEST_NET)
v.sram_dest_reg_714.NET_Dest = target;
if (dest & FC_SRAM_DEST_CAI)
v.sram_dest_reg_714.CAI_Dest = target;
if (dest & FC_SRAM_DEST_CAO)
v.sram_dest_reg_714.CAO_Dest = target;
if (dest & FC_SRAM_DEST_MEDIA)
v.sram_dest_reg_714.MEDIA_Dest = target;
fc->write_ibi_reg(fc,sram_dest_reg_714,v);
udelay(1000); /* TODO delay really necessary */
return 0;
}
EXPORT_SYMBOL(flexcop_sram_set_dest);
void flexcop_wan_set_speed(struct flexcop_device *fc, flexcop_wan_speed_t s)
{
flexcop_set_ibi_value(wan_ctrl_reg_71c,wan_speed_sig,s);
}
EXPORT_SYMBOL(flexcop_wan_set_speed);
void flexcop_sram_ctrl(struct flexcop_device *fc, int usb_wan, int sramdma, int maximumfill)
{
flexcop_ibi_value v = fc->read_ibi_reg(fc,sram_dest_reg_714);
v.sram_dest_reg_714.ctrl_usb_wan = usb_wan;
v.sram_dest_reg_714.ctrl_sramdma = sramdma;
v.sram_dest_reg_714.ctrl_maximumfill = maximumfill;
fc->write_ibi_reg(fc,sram_dest_reg_714,v);
}
EXPORT_SYMBOL(flexcop_sram_ctrl);
#if 0
static void flexcop_sram_write(struct adapter *adapter, u32 bank, u32 addr, u8 *buf, u32 len)
{
int i, retries;
u32 command;
for (i = 0; i < len; i++) {
command = bank | addr | 0x04000000 | (*buf << 0x10);
retries = 2;
while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
mdelay(1);
retries--;
};
if (retries == 0)
printk("%s: SRAM timeout\n", __func__);
write_reg_dw(adapter, 0x700, command);
buf++;
addr++;
}
}
static void flex_sram_read(struct adapter *adapter, u32 bank, u32 addr, u8 *buf, u32 len)
{
int i, retries;
u32 command, value;
for (i = 0; i < len; i++) {
command = bank | addr | 0x04008000;
retries = 10000;
while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
mdelay(1);
retries--;
};
if (retries == 0)
printk("%s: SRAM timeout\n", __func__);
write_reg_dw(adapter, 0x700, command);
retries = 10000;
while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
mdelay(1);
retries--;
};
if (retries == 0)
printk("%s: SRAM timeout\n", __func__);
value = read_reg_dw(adapter, 0x700) >> 0x10;
*buf = (value & 0xff);
addr++;
buf++;
}
}
static void sram_write_chunk(struct adapter *adapter, u32 addr, u8 *buf, u16 len)
{
u32 bank;
bank = 0;
if (adapter->dw_sram_type == 0x20000) {
bank = (addr & 0x18000) << 0x0d;
}
if (adapter->dw_sram_type == 0x00000) {
if ((addr >> 0x0f) == 0)
bank = 0x20000000;
else
bank = 0x10000000;
}
flex_sram_write(adapter, bank, addr & 0x7fff, buf, len);
}
static void sram_read_chunk(struct adapter *adapter, u32 addr, u8 *buf, u16 len)
{
u32 bank;
bank = 0;
if (adapter->dw_sram_type == 0x20000) {
bank = (addr & 0x18000) << 0x0d;
}
if (adapter->dw_sram_type == 0x00000) {
if ((addr >> 0x0f) == 0)
bank = 0x20000000;
else
bank = 0x10000000;
}
flex_sram_read(adapter, bank, addr & 0x7fff, buf, len);
}
static void sram_read(struct adapter *adapter, u32 addr, u8 *buf, u32 len)
{
u32 length;
while (len != 0) {
length = len;
/* check if the address range belongs to the same
* 32K memory chip. If not, the data is read
* from one chip at a time */
if ((addr >> 0x0f) != ((addr + len - 1) >> 0x0f)) {
length = (((addr >> 0x0f) + 1) << 0x0f) - addr;
}
sram_read_chunk(adapter, addr, buf, length);
addr = addr + length;
buf = buf + length;
len = len - length;
}
}
static void sram_write(struct adapter *adapter, u32 addr, u8 *buf, u32 len)
{
u32 length;
while (len != 0) {
length = len;
/* check if the address range belongs to the same
* 32K memory chip. If not, the data is
* written to one chip at a time */
if ((addr >> 0x0f) != ((addr + len - 1) >> 0x0f)) {
length = (((addr >> 0x0f) + 1) << 0x0f) - addr;
}
sram_write_chunk(adapter, addr, buf, length);
addr = addr + length;
buf = buf + length;
len = len - length;
}
}
static void sram_set_size(struct adapter *adapter, u32 mask)
{
write_reg_dw(adapter, 0x71c,
(mask | (~0x30000 & read_reg_dw(adapter, 0x71c))));
}
static void sram_init(struct adapter *adapter)
{
u32 tmp;
tmp = read_reg_dw(adapter, 0x71c);
write_reg_dw(adapter, 0x71c, 1);
if (read_reg_dw(adapter, 0x71c) != 0) {
write_reg_dw(adapter, 0x71c, tmp);
adapter->dw_sram_type = tmp & 0x30000;
ddprintk("%s: dw_sram_type = %x\n", __func__, adapter->dw_sram_type);
} else {
adapter->dw_sram_type = 0x10000;
ddprintk("%s: dw_sram_type = %x\n", __func__, adapter->dw_sram_type);
}
}
static int sram_test_location(struct adapter *adapter, u32 mask, u32 addr)
{
u8 tmp1, tmp2;
dprintk("%s: mask = %x, addr = %x\n", __func__, mask, addr);
sram_set_size(adapter, mask);
sram_init(adapter);
tmp2 = 0xa5;
tmp1 = 0x4f;
sram_write(adapter, addr, &tmp2, 1);
sram_write(adapter, addr + 4, &tmp1, 1);
tmp2 = 0;
mdelay(20);
sram_read(adapter, addr, &tmp2, 1);
sram_read(adapter, addr, &tmp2, 1);
dprintk("%s: wrote 0xa5, read 0x%2x\n", __func__, tmp2);
if (tmp2 != 0xa5)
return 0;
tmp2 = 0x5a;
tmp1 = 0xf4;
sram_write(adapter, addr, &tmp2, 1);
sram_write(adapter, addr + 4, &tmp1, 1);
tmp2 = 0;
mdelay(20);
sram_read(adapter, addr, &tmp2, 1);
sram_read(adapter, addr, &tmp2, 1);
dprintk("%s: wrote 0x5a, read 0x%2x\n", __func__, tmp2);
if (tmp2 != 0x5a)
return 0;
return 1;
}
static u32 sram_length(struct adapter *adapter)
{
if (adapter->dw_sram_type == 0x10000)
return 32768; /* 32K */
if (adapter->dw_sram_type == 0x00000)
return 65536; /* 64K */
if (adapter->dw_sram_type == 0x20000)
return 131072; /* 128K */
return 32768; /* 32K */
}
/* FlexcopII can work with 32K, 64K or 128K of external SRAM memory.
- for 128K there are 4x32K chips at bank 0,1,2,3.
- for 64K there are 2x32K chips at bank 1,2.
- for 32K there is one 32K chip at bank 0.
FlexCop works only with one bank at a time. The bank is selected
by bits 28-29 of the 0x700 register.
bank 0 covers addresses 0x00000-0x07fff
bank 1 covers addresses 0x08000-0x0ffff
bank 2 covers addresses 0x10000-0x17fff
bank 3 covers addresses 0x18000-0x1ffff */
static int flexcop_sram_detect(struct flexcop_device *fc)
{
flexcop_ibi_value r208, r71c_0, vr71c_1;
r208 = fc->read_ibi_reg(fc, ctrl_208);
fc->write_ibi_reg(fc, ctrl_208, ibi_zero);
r71c_0 = fc->read_ibi_reg(fc, wan_ctrl_reg_71c);
write_reg_dw(adapter, 0x71c, 1);
tmp3 = read_reg_dw(adapter, 0x71c);
dprintk("%s: tmp3 = %x\n", __func__, tmp3);
write_reg_dw(adapter, 0x71c, tmp2);
// check for internal SRAM ???
tmp3--;
if (tmp3 != 0) {
sram_set_size(adapter, 0x10000);
sram_init(adapter);
write_reg_dw(adapter, 0x208, tmp);
dprintk("%s: sram size = 32K\n", __func__);
return 32;
}
if (sram_test_location(adapter, 0x20000, 0x18000) != 0) {
sram_set_size(adapter, 0x20000);
sram_init(adapter);
write_reg_dw(adapter, 0x208, tmp);
dprintk("%s: sram size = 128K\n", __func__);
return 128;
}
if (sram_test_location(adapter, 0x00000, 0x10000) != 0) {
sram_set_size(adapter, 0x00000);
sram_init(adapter);
write_reg_dw(adapter, 0x208, tmp);
dprintk("%s: sram size = 64K\n", __func__);
return 64;
}
if (sram_test_location(adapter, 0x10000, 0x00000) != 0) {
sram_set_size(adapter, 0x10000);
sram_init(adapter);
write_reg_dw(adapter, 0x208, tmp);
dprintk("%s: sram size = 32K\n", __func__);
return 32;
}
sram_set_size(adapter, 0x10000);
sram_init(adapter);
write_reg_dw(adapter, 0x208, tmp);
dprintk("%s: SRAM detection failed. Set to 32K \n", __func__);
return 0;
}
static void sll_detect_sram_size(struct adapter *adapter)
{
sram_detect_for_flex2(adapter);
}
#endif
| gpl-2.0 |
turuchan/ISW11SC_ICS_Kernel | drivers/media/video/samsung/mali_r2p3/linux/mali_kernel_sysfs.c | 233 | 9441 | /*
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* This program is free software and is provided to you under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation, and any use by you of this program is subject to the terms of such GNU licence.
*
* A copy of the licence is included with the program, and can also be obtained from Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*/
/**
* @file mali_kernel_sysfs.c
* Implementation of some sysfs data exports
*/
#include <linux/fs.h>
#include <linux/device.h>
#include "mali_kernel_license.h"
#include "mali_kernel_linux.h"
#if MALI_LICENSE_IS_GPL
#include <linux/seq_file.h>
#include <linux/debugfs.h>
#include <asm/uaccess.h>
#include <linux/slab.h>
#include "mali_ukk.h"
#include "mali_kernel_subsystem.h"
#include "mali_kernel_sysfs.h"
#include "mali_kernel_profiling.h"
static struct dentry *mali_debugfs_dir = NULL;
#if MALI_STATE_TRACKING
static int mali_seq_internal_state_show(struct seq_file *seq_file, void *v)
{
u32 len = 0;
u32 size;
char *buf;
size = seq_get_buf(seq_file, &buf);
if(!size)
{
return -ENOMEM;
}
/* Create the internal state dump. */
len = snprintf(buf+len, size-len, "Mali device driver %s\n", SVN_REV_STRING);
len += snprintf(buf+len, size-len, "License: %s\n\n", MALI_KERNEL_LINUX_LICENSE);
len += _mali_kernel_core_dump_state(buf + len, size - len);
seq_commit(seq_file, len);
return 0;
}
static int mali_seq_internal_state_open(struct inode *inode, struct file *file)
{
return single_open(file, mali_seq_internal_state_show, NULL);
}
static const struct file_operations mali_seq_internal_state_fops = {
.owner = THIS_MODULE,
.open = mali_seq_internal_state_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
#endif /* MALI_STATE_TRACKING */
#if MALI_TIMELINE_PROFILING_ENABLED
static ssize_t profiling_record_read(struct file *filp, char __user *ubuf, size_t cnt, loff_t *ppos)
{
char buf[64];
int r;
r = sprintf(buf, "%u\n", _mali_profiling_is_recording() ? 1 : 0);
return simple_read_from_buffer(ubuf, cnt, ppos, buf, r);
}
static ssize_t profiling_record_write(struct file *filp, const char __user *ubuf, size_t cnt, loff_t *ppos)
{
char buf[64];
unsigned long val;
int ret;
if (cnt >= sizeof(buf))
{
return -EINVAL;
}
if (copy_from_user(&buf, ubuf, cnt))
{
return -EFAULT;
}
buf[cnt] = 0;
ret = strict_strtoul(buf, 10, &val);
if (ret < 0)
{
return ret;
}
if (val != 0)
{
u32 limit = MALI_PROFILING_MAX_BUFFER_ENTRIES; /* This can be made configurable at a later stage if we need to */
/* check if we are already recording */
if (MALI_TRUE == _mali_profiling_is_recording())
{
MALI_DEBUG_PRINT(3, ("Recording of profiling events already in progress\n"));
return -EFAULT;
}
/* check if we need to clear out an old recording first */
if (MALI_TRUE == _mali_profiling_have_recording())
{
if (_MALI_OSK_ERR_OK != _mali_profiling_clear())
{
MALI_DEBUG_PRINT(3, ("Failed to clear existing recording of profiling events\n"));
return -EFAULT;
}
}
/* start recording profiling data */
if (_MALI_OSK_ERR_OK != _mali_profiling_start(&limit))
{
MALI_DEBUG_PRINT(3, ("Failed to start recording of profiling events\n"));
return -EFAULT;
}
MALI_DEBUG_PRINT(3, ("Profiling recording started (max %u events)\n", limit));
}
else
{
/* stop recording profiling data */
u32 count = 0;
if (_MALI_OSK_ERR_OK != _mali_profiling_stop(&count))
{
MALI_DEBUG_PRINT(2, ("Failed to stop recording of profiling events\n"));
return -EFAULT;
}
MALI_DEBUG_PRINT(2, ("Profiling recording stopped (recorded %u events)\n", count));
}
*ppos += cnt;
return cnt;
}
static const struct file_operations profiling_record_fops = {
.owner = THIS_MODULE,
.read = profiling_record_read,
.write = profiling_record_write,
};
static void *profiling_events_start(struct seq_file *s, loff_t *pos)
{
loff_t *spos;
/* check if we have data avaiable */
if (MALI_TRUE != _mali_profiling_have_recording())
{
return NULL;
}
spos = kmalloc(sizeof(loff_t), GFP_KERNEL);
if (NULL == spos)
{
return NULL;
}
*spos = *pos;
return spos;
}
static void *profiling_events_next(struct seq_file *s, void *v, loff_t *pos)
{
loff_t *spos = v;
/* check if we have data avaiable */
if (MALI_TRUE != _mali_profiling_have_recording())
{
return NULL;
}
/* check if the next entry actually is avaiable */
if (_mali_profiling_get_count() <= (u32)(*spos + 1))
{
return NULL;
}
*pos = ++*spos;
return spos;
}
static void profiling_events_stop(struct seq_file *s, void *v)
{
kfree(v);
}
static int profiling_events_show(struct seq_file *seq_file, void *v)
{
loff_t *spos = v;
u32 index;
u64 timestamp;
u32 event_id;
u32 data[5];
index = (u32)*spos;
/* Retrieve all events */
if (_MALI_OSK_ERR_OK == _mali_profiling_get_event(index, ×tamp, &event_id, data))
{
seq_printf(seq_file, "%llu %u %u %u %u %u %u\n", timestamp, event_id, data[0], data[1], data[2], data[3], data[4]);
return 0;
}
return 0;
}
static const struct seq_operations profiling_events_seq_ops = {
.start = profiling_events_start,
.next = profiling_events_next,
.stop = profiling_events_stop,
.show = profiling_events_show
};
static int profiling_events_open(struct inode *inode, struct file *file)
{
return seq_open(file, &profiling_events_seq_ops);
}
static const struct file_operations profiling_events_fops = {
.owner = THIS_MODULE,
.open = profiling_events_open,
.read = seq_read,
.llseek = seq_lseek,
.release = seq_release,
};
static ssize_t profiling_proc_default_enable_read(struct file *filp, char __user *ubuf, size_t cnt, loff_t *ppos)
{
char buf[64];
int r;
r = sprintf(buf, "%u\n", _mali_profiling_get_default_enable_state() ? 1 : 0);
return simple_read_from_buffer(ubuf, cnt, ppos, buf, r);
}
static ssize_t profiling_proc_default_enable_write(struct file *filp, const char __user *ubuf, size_t cnt, loff_t *ppos)
{
char buf[64];
unsigned long val;
int ret;
if (cnt >= sizeof(buf))
{
return -EINVAL;
}
if (copy_from_user(&buf, ubuf, cnt))
{
return -EFAULT;
}
buf[cnt] = 0;
ret = strict_strtoul(buf, 10, &val);
if (ret < 0)
{
return ret;
}
_mali_profiling_set_default_enable_state(val != 0 ? MALI_TRUE : MALI_FALSE);
*ppos += cnt;
return cnt;
}
static const struct file_operations profiling_proc_default_enable_fops = {
.owner = THIS_MODULE,
.read = profiling_proc_default_enable_read,
.write = profiling_proc_default_enable_write,
};
#endif
static ssize_t memory_used_read(struct file *filp, char __user *ubuf, size_t cnt, loff_t *ppos)
{
char buf[64];
size_t r;
u32 mem = _mali_ukk_report_memory_usage();
r = snprintf(buf, 64, "%u\n", mem);
return simple_read_from_buffer(ubuf, cnt, ppos, buf, r);
}
static const struct file_operations memory_usage_fops = {
.owner = THIS_MODULE,
.read = memory_used_read,
};
int mali_sysfs_register(struct mali_dev *device, dev_t dev, const char *mali_dev_name)
{
int err = 0;
struct device * mdev;
device->mali_class = class_create(THIS_MODULE, mali_dev_name);
if (IS_ERR(device->mali_class))
{
err = PTR_ERR(device->mali_class);
goto init_class_err;
}
mdev = device_create(device->mali_class, NULL, dev, NULL, mali_dev_name);
if (IS_ERR(mdev))
{
err = PTR_ERR(mdev);
goto init_mdev_err;
}
mali_debugfs_dir = debugfs_create_dir(mali_dev_name, NULL);
if(ERR_PTR(-ENODEV) == mali_debugfs_dir)
{
/* Debugfs not supported. */
mali_debugfs_dir = NULL;
}
else
{
if(NULL != mali_debugfs_dir)
{
/* Debugfs directory created successfully; create files now */
#if MALI_TIMELINE_PROFILING_ENABLED
struct dentry *mali_profiling_dir = debugfs_create_dir("profiling", mali_debugfs_dir);
if (mali_profiling_dir != NULL)
{
struct dentry *mali_profiling_proc_dir = debugfs_create_dir("proc", mali_profiling_dir);
if (mali_profiling_proc_dir != NULL)
{
struct dentry *mali_profiling_proc_default_dir = debugfs_create_dir("default", mali_profiling_proc_dir);
if (mali_profiling_proc_default_dir != NULL)
{
debugfs_create_file("enable", 0600, mali_profiling_proc_default_dir, NULL, &profiling_proc_default_enable_fops);
}
}
debugfs_create_file("record", 0600, mali_profiling_dir, NULL, &profiling_record_fops);
debugfs_create_file("events", 0400, mali_profiling_dir, NULL, &profiling_events_fops);
}
#endif
#if MALI_STATE_TRACKING
debugfs_create_file("state_dump", 0400, mali_debugfs_dir, NULL, &mali_seq_internal_state_fops);
#endif
debugfs_create_file("memory_usage", 0400, mali_debugfs_dir, NULL, &memory_usage_fops);
}
}
/* Success! */
return 0;
/* Error handling */
init_mdev_err:
class_destroy(device->mali_class);
init_class_err:
return err;
}
int mali_sysfs_unregister(struct mali_dev *device, dev_t dev, const char *mali_dev_name)
{
if(NULL != mali_debugfs_dir)
{
debugfs_remove_recursive(mali_debugfs_dir);
}
device_destroy(device->mali_class, dev);
class_destroy(device->mali_class);
return 0;
}
#else
/* Dummy implementations for non-GPL */
int mali_sysfs_register(struct mali_dev *device, dev_t dev, const char *mali_dev_name)
{
return 0;
}
int mali_sysfs_unregister(struct mali_dev *device, dev_t dev, const char *mali_dev_name)
{
return 0;
}
#endif
| gpl-2.0 |
chiehwen/AGNI-pureSTOCK-I9300 | drivers/media/video/samsung/mali_r2p3/common/pmm/mali_pmm.c | 233 | 27765 | /*
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* This program is free software and is provided to you under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation, and any use by you of this program is subject to the terms of such GNU licence.
*
* A copy of the licence is included with the program, and can also be obtained from Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*/
/**
* @file mali_pmm.c
* Implementation of the power management module for the kernel device driver
*/
#if USING_MALI_PMM
#include "mali_ukk.h"
#include "mali_kernel_common.h"
#include "mali_kernel_subsystem.h"
#include "mali_pmm.h"
#include "mali_pmm_system.h"
#include "mali_pmm_state.h"
#include "mali_pmm_policy.h"
#include "mali_pmm_pmu.h"
#include "mali_platform.h"
/* Internal PMM subsystem state */
static _mali_pmm_internal_state_t *pmm_state = NULL;
/* Mali kernel subsystem id */
static mali_kernel_subsystem_identifier mali_subsystem_pmm_id = -1;
#define GET_PMM_STATE_PTR (pmm_state)
/* Internal functions */
static _mali_osk_errcode_t malipmm_create(_mali_osk_resource_t *resource);
static void pmm_event_process( void );
_mali_osk_errcode_t malipmm_irq_uhandler(void *data);
void malipmm_irq_bhandler(void *data);
/** @brief Start the PMM subsystem
*
* @param id Subsystem id to uniquely identify this subsystem
* @return _MALI_OSK_ERR_OK if the system started successfully, or a suitable
* _mali_osk_errcode_t otherwise.
*/
_mali_osk_errcode_t malipmm_kernel_subsystem_start( mali_kernel_subsystem_identifier id );
/** @brief Perform post start up of the PMM subsystem
*
* Post start up includes initializing the current policy, now that the system is
* completely started - to stop policies turning off hardware during the start up
*
* @param id the unique subsystem id
* @return _MALI_OSK_ERR_OK if the post startup was successful, or a suitable
* _mali_osk_errcode_t otherwise.
*/
_mali_osk_errcode_t malipmm_kernel_load_complete( mali_kernel_subsystem_identifier id );
/** @brief Terminate the PMM subsystem
*
* @param id the unique subsystem id
*/
void malipmm_kernel_subsystem_terminate( mali_kernel_subsystem_identifier id );
#if MALI_STATE_TRACKING
u32 malipmm_subsystem_dump_state( char *buf, u32 size );
#endif
/* This will be one of the subsystems in the array of subsystems:
static struct mali_kernel_subsystem * subsystems[];
found in file: mali_kernel_core.c
*/
struct mali_kernel_subsystem mali_subsystem_pmm=
{
malipmm_kernel_subsystem_start, /* startup */
NULL, /*malipmm_kernel_subsystem_terminate,*/ /* shutdown */
malipmm_kernel_load_complete, /* loaded all subsystems */
NULL,
NULL,
NULL,
NULL,
#if MALI_STATE_TRACKING
malipmm_subsystem_dump_state, /* dump_state */
#endif
};
#if PMM_OS_TEST
u32 power_test_event = 0;
mali_bool power_test_flag = MALI_FALSE;
_mali_osk_timer_t *power_test_timer = NULL;
void _mali_osk_pmm_power_up_done(mali_pmm_message_data data)
{
MALI_PRINT(("POWER TEST OS UP DONE\n"));
}
void _mali_osk_pmm_power_down_done(mali_pmm_message_data data)
{
MALI_PRINT(("POWER TEST OS DOWN DONE\n"));
}
/**
* Symbian OS Power Up call to the driver
*/
void power_test_callback( void *arg )
{
_mali_pmm_internal_state_t *pmm = GET_PMM_STATE_PTR;
MALI_DEBUG_ASSERT_POINTER(pmm);
power_test_flag = MALI_TRUE;
_mali_osk_irq_schedulework( pmm->irq );
}
void power_test_start()
{
power_test_timer = _mali_osk_timer_init();
_mali_osk_timer_setcallback( power_test_timer, power_test_callback, NULL );
/* First event is power down */
power_test_event = MALI_PMM_EVENT_OS_POWER_DOWN;
_mali_osk_timer_add( power_test_timer, 10000 );
}
mali_bool power_test_check()
{
if( power_test_flag )
{
_mali_uk_pmm_message_s event = {
NULL,
0,
1 };
event.id = power_test_event;
power_test_flag = MALI_FALSE;
/* Send event */
_mali_ukk_pmm_event_message( &event );
/* Switch to next event to test */
if( power_test_event == MALI_PMM_EVENT_OS_POWER_DOWN )
{
power_test_event = MALI_PMM_EVENT_OS_POWER_UP;
}
else
{
power_test_event = MALI_PMM_EVENT_OS_POWER_DOWN;
}
_mali_osk_timer_add( power_test_timer, 5000 );
return MALI_TRUE;
}
return MALI_FALSE;
}
void power_test_end()
{
_mali_osk_timer_del( power_test_timer );
_mali_osk_timer_term( power_test_timer );
power_test_timer = NULL;
}
#endif
void _mali_ukk_pmm_event_message( _mali_uk_pmm_message_s *args )
{
_mali_pmm_internal_state_t *pmm = GET_PMM_STATE_PTR;
_mali_osk_notification_t *msg;
mali_pmm_message_t *event;
MALI_DEBUG_ASSERT_POINTER(pmm);
MALI_DEBUG_ASSERT_POINTER(args);
MALIPMM_DEBUG_PRINT( ("PMM: sending message\n") );
#if MALI_PMM_TRACE && MALI_PMM_TRACE_SENT_EVENTS
_mali_pmm_trace_event_message( args, MALI_FALSE );
#endif
msg = _mali_osk_notification_create( MALI_PMM_NOTIFICATION_TYPE, sizeof( mali_pmm_message_t ) );
if( msg )
{
event = (mali_pmm_message_t *)msg->result_buffer;
event->id = args->id;
event->ts = _mali_osk_time_tickcount();
event->data = args->data;
_mali_osk_atomic_inc( &(pmm->messages_queued) );
if( args->id > MALI_PMM_EVENT_INTERNALS )
{
/* Internal PMM message */
_mali_osk_notification_queue_send( pmm->iqueue, msg );
#if (MALI_PMM_TRACE || MALI_STATE_TRACKING)
pmm->imessages_sent++;
#endif
}
else
{
/* Real event */
_mali_osk_notification_queue_send( pmm->queue, msg );
#if (MALI_PMM_TRACE || MALI_STATE_TRACKING)
pmm->messages_sent++;
#endif
}
}
else
{
MALI_PRINT_ERROR( ("PMM: Could not send message %d", args->id) );
/* Make note of this OOM - which has caused a missed event */
pmm->missed++;
}
/* Schedule time to look at the event or the fact we couldn't create an event */
_mali_osk_irq_schedulework( pmm->irq );
}
mali_pmm_state _mali_pmm_state( void )
{
_mali_pmm_internal_state_t *pmm = GET_PMM_STATE_PTR;
MALI_DEBUG_ASSERT_POINTER(pmm);
if( pmm && (mali_subsystem_pmm_id != -1) )
{
return pmm->state;
}
/* No working subsystem yet */
return MALI_PMM_STATE_UNAVAILABLE;
}
mali_pmm_core_mask _mali_pmm_cores_list( void )
{
_mali_pmm_internal_state_t *pmm = GET_PMM_STATE_PTR;
MALI_DEBUG_ASSERT_POINTER(pmm);
return pmm->cores_registered;
}
mali_pmm_core_mask _mali_pmm_cores_powered( void )
{
_mali_pmm_internal_state_t *pmm = GET_PMM_STATE_PTR;
MALI_DEBUG_ASSERT_POINTER(pmm);
return pmm->cores_powered;
}
_mali_osk_errcode_t _mali_pmm_list_policies(
u32 policy_list_size,
mali_pmm_policy *policy_list,
u32 *policies_available )
{
/* TBD - This is currently a stub function for basic power management */
MALI_ERROR( _MALI_OSK_ERR_UNSUPPORTED );
}
_mali_osk_errcode_t _mali_pmm_set_policy( mali_pmm_policy policy )
{
/* TBD - This is currently a stub function for basic power management */
/* TBD - When this is not a stub... include tracing...
#if MALI_PMM_TRACE
_mali_pmm_trace_policy_change( old, newpolicy );
#endif
*/
MALI_ERROR( _MALI_OSK_ERR_UNSUPPORTED );
}
_mali_osk_errcode_t _mali_pmm_get_policy( mali_pmm_policy *policy )
{
if( policy )
{
_mali_pmm_internal_state_t *pmm = GET_PMM_STATE_PTR;
MALI_DEBUG_ASSERT_POINTER(pmm);
if( pmm )
{
*policy = pmm->policy;
MALI_SUCCESS;
}
else
{
*policy = MALI_PMM_POLICY_NONE;
MALI_ERROR( _MALI_OSK_ERR_FAULT );
}
}
/* No return argument */
MALI_ERROR( _MALI_OSK_ERR_INVALID_ARGS );
}
#if ( MALI_PMM_TRACE || MALI_STATE_TRACKING )
/* Event names - order must match mali_pmm_event_id enum */
static char *pmm_trace_events[] = {
"OS_POWER_UP",
"OS_POWER_DOWN",
"JOB_SCHEDULED",
"JOB_QUEUED",
"JOB_FINISHED",
"TIMEOUT",
};
/* State names - order must match mali_pmm_state enum */
static char *pmm_trace_state[] = {
"UNAVAILABLE",
"SYSTEM ON",
"SYSTEM OFF",
"SYSTEM TRANSITION",
};
/* Policy names - order must match mali_pmm_policy enum */
static char *pmm_trace_policy[] = {
"NONE",
"ALWAYS ON",
"JOB CONTROL",
};
/* Status names - order must match mali_pmm_status enum */
static char *pmm_trace_status[] = {
"MALI_PMM_STATUS_IDLE", /**< PMM is waiting next event */
"MALI_PMM_STATUS_POLICY_POWER_DOWN", /**< Policy initiated power down */
"MALI_PMM_STATUS_POLICY_POWER_UP", /**< Policy initiated power down */
"MALI_PMM_STATUS_OS_WAITING", /**< PMM is waiting for OS power up */
"MALI_PMM_STATUS_OS_POWER_DOWN", /**< OS initiated power down */
"MALI_PMM_STATUS_RUNTIME_IDLE_IN_PROGRESS",
"MALI_PMM_STATUS_DVFS_PAUSE", /**< PMM DVFS Status Pause */
"MALI_PMM_STATUS_OS_POWER_UP", /**< OS initiated power up */
"MALI_PMM_STATUS_OFF", /**< PMM is not active */
};
#endif /* MALI_PMM_TRACE || MALI_STATE_TRACKING */
#if MALI_PMM_TRACE
/* UK event names - order must match mali_pmm_event_id enum */
static char *pmm_trace_events_uk[] = {
"UKS",
"UK_EXAMPLE",
};
/* Internal event names - order must match mali_pmm_event_id enum */
static char *pmm_trace_events_internal[] = {
"INTERNALS",
"INTERNAL_POWER_UP_ACK",
"INTERNAL_POWER_DOWN_ACK",
};
void _mali_pmm_trace_hardware_change( mali_pmm_core_mask old, mali_pmm_core_mask newstate )
{
const char *dname;
const char *cname;
const char *ename;
if( old != newstate )
{
if( newstate == 0 )
{
dname = "NO cores";
}
else
{
dname = pmm_trace_get_core_name( newstate );
}
/* These state checks only work if the assumption that only cores can be
* turned on or turned off in seperate actions is true. If core power states can
* be toggled (some one, some off) at the same time, this check does not work
*/
if( old > newstate )
{
/* Cores have turned off */
cname = pmm_trace_get_core_name( old - newstate );
ename = "OFF";
}
else
{
/* Cores have turned on */
cname = pmm_trace_get_core_name( newstate - old );
ename = "ON";
}
MALI_PRINT( ("PMM Trace: Hardware %s ON, %s just turned %s. { 0x%08x -> 0x%08x }", dname, cname, ename, old, newstate) );
}
}
void _mali_pmm_trace_state_change( mali_pmm_state old, mali_pmm_state newstate )
{
if( old != newstate )
{
MALI_PRINT( ("PMM Trace: State changed from %s to %s", pmm_trace_state[old], pmm_trace_state[newstate]) );
}
}
void _mali_pmm_trace_policy_change( mali_pmm_policy old, mali_pmm_policy newpolicy )
{
if( old != newpolicy )
{
MALI_PRINT( ("PMM Trace: Policy changed from %s to %s", pmm_trace_policy[old], pmm_trace_policy[newpolicy]) );
}
}
void _mali_pmm_trace_event_message( mali_pmm_message_t *event, mali_bool received )
{
const char *ename;
const char *dname;
const char *tname;
const char *format = "PMM Trace: Event %s { (%d) %s, %d ticks, (0x%x) %s }";
MALI_DEBUG_ASSERT_POINTER(event);
tname = (received) ? "received" : "sent";
if( event->id >= MALI_PMM_EVENT_INTERNALS )
{
ename = pmm_trace_events_internal[((int)event->id) - MALI_PMM_EVENT_INTERNALS];
}
else if( event->id >= MALI_PMM_EVENT_UKS )
{
ename = pmm_trace_events_uk[((int)event->id) - MALI_PMM_EVENT_UKS];
}
else
{
ename = pmm_trace_events[event->id];
}
switch( event->id )
{
case MALI_PMM_EVENT_OS_POWER_UP:
case MALI_PMM_EVENT_OS_POWER_DOWN:
dname = "os event";
break;
case MALI_PMM_EVENT_JOB_SCHEDULED:
case MALI_PMM_EVENT_JOB_QUEUED:
case MALI_PMM_EVENT_JOB_FINISHED:
case MALI_PMM_EVENT_INTERNAL_POWER_UP_ACK:
case MALI_PMM_EVENT_INTERNAL_POWER_DOWN_ACK:
dname = pmm_trace_get_core_name( (mali_pmm_core_mask)event->data );
break;
case MALI_PMM_EVENT_TIMEOUT:
dname = "timeout start";
/* Print data with a different format */
format = "PMM Trace: Event %s { (%d) %s, %d ticks, %d ticks %s }";
break;
default:
dname = "unknown data";
}
MALI_PRINT( (format, tname, (u32)event->id, ename, event->ts, (u32)event->data, dname) );
}
#endif /* MALI_PMM_TRACE */
/****************** Mali Kernel API *****************/
_mali_osk_errcode_t malipmm_kernel_subsystem_start( mali_kernel_subsystem_identifier id )
{
mali_subsystem_pmm_id = id;
MALI_CHECK_NO_ERROR(_mali_kernel_core_register_resource_handler(PMU, malipmm_create));
MALI_SUCCESS;
}
_mali_osk_errcode_t malipmm_create(_mali_osk_resource_t *resource)
{
/* Create PMM state memory */
MALI_DEBUG_ASSERT( pmm_state == NULL );
pmm_state = (_mali_pmm_internal_state_t *) _mali_osk_malloc(sizeof(*pmm_state));
MALI_CHECK_NON_NULL( pmm_state, _MALI_OSK_ERR_NOMEM );
/* All values get 0 as default */
_mali_osk_memset(pmm_state, 0, sizeof(*pmm_state));
/* Set up the initial PMM state */
pmm_state->waiting = 0;
pmm_state->status = MALI_PMM_STATUS_IDLE;
pmm_state->state = MALI_PMM_STATE_UNAVAILABLE; /* Until a core registers */
/* Set up policy via compile time option for the moment */
#if MALI_PMM_ALWAYS_ON
pmm_state->policy = MALI_PMM_POLICY_ALWAYS_ON;
#else
pmm_state->policy = MALI_PMM_POLICY_JOB_CONTROL;
#endif
#if MALI_PMM_TRACE
_mali_pmm_trace_policy_change( MALI_PMM_POLICY_NONE, pmm_state->policy );
#endif
/* Set up assumes all values are initialized to NULL or MALI_FALSE, so
* we can exit halfway through set up and perform clean up
*/
#if USING_MALI_PMU
if( mali_pmm_pmu_init(resource) != _MALI_OSK_ERR_OK ) goto pmm_fail_cleanup;
pmm_state->pmu_initialized = MALI_TRUE;
#endif
pmm_state->queue = _mali_osk_notification_queue_init();
if( !pmm_state->queue ) goto pmm_fail_cleanup;
pmm_state->iqueue = _mali_osk_notification_queue_init();
if( !pmm_state->iqueue ) goto pmm_fail_cleanup;
/* We are creating an IRQ handler just for the worker thread it gives us */
pmm_state->irq = _mali_osk_irq_init( _MALI_OSK_IRQ_NUMBER_PMM,
malipmm_irq_uhandler,
malipmm_irq_bhandler,
NULL,
NULL,
(void *)pmm_state, /* PMM state is passed to IRQ */
"PMM handler" );
if( !pmm_state->irq ) goto pmm_fail_cleanup;
pmm_state->lock = _mali_osk_lock_init((_mali_osk_lock_flags_t)(_MALI_OSK_LOCKFLAG_READERWRITER | _MALI_OSK_LOCKFLAG_ORDERED), 0, 75);
if( !pmm_state->lock ) goto pmm_fail_cleanup;
if( _mali_osk_atomic_init( &(pmm_state->messages_queued), 0 ) != _MALI_OSK_ERR_OK )
{
goto pmm_fail_cleanup;
}
MALIPMM_DEBUG_PRINT( ("PMM: subsystem created, policy=%d\n", pmm_state->policy) );
MALI_SUCCESS;
pmm_fail_cleanup:
MALI_PRINT_ERROR( ("PMM: subsystem failed to be created\n") );
if( pmm_state )
{
if( pmm_state->lock ) _mali_osk_lock_term( pmm_state->lock );
if( pmm_state->irq ) _mali_osk_irq_term( pmm_state->irq );
if( pmm_state->queue ) _mali_osk_notification_queue_term( pmm_state->queue );
if( pmm_state->iqueue ) _mali_osk_notification_queue_term( pmm_state->iqueue );
#if USING_MALI_PMU
if( pmm_state->pmu_initialized )
{
_mali_osk_resource_type_t t = PMU;
mali_pmm_pmu_deinit(&t);
}
#endif /* USING_MALI_PMU */
_mali_osk_free(pmm_state);
pmm_state = NULL;
}
MALI_ERROR( _MALI_OSK_ERR_FAULT );
}
_mali_osk_errcode_t malipmm_kernel_load_complete( mali_kernel_subsystem_identifier id )
{
_mali_pmm_internal_state_t *pmm = GET_PMM_STATE_PTR;
MALI_DEBUG_ASSERT_POINTER(pmm);
MALIPMM_DEBUG_PRINT( ("PMM: subsystem loaded, policy initializing\n") );
#if PMM_OS_TEST
power_test_start();
#endif
/* Initialize the profile now the system has loaded - so that cores are
* not turned off during start up
*/
return pmm_policy_init( pmm );
}
void malipmm_force_powerup( void )
{
_mali_pmm_internal_state_t *pmm = GET_PMM_STATE_PTR;
MALI_DEBUG_ASSERT_POINTER(pmm);
MALI_PMM_LOCK(pmm);
pmm->status = MALI_PMM_STATUS_OFF;
MALI_PMM_UNLOCK(pmm);
/* flush PMM workqueue */
_mali_osk_flush_workqueue( pmm->irq );
if (pmm->cores_powered == 0)
{
malipmm_powerup(pmm->cores_registered);
}
}
void malipmm_kernel_subsystem_terminate( mali_kernel_subsystem_identifier id )
{
/* Check this is the right system */
MALI_DEBUG_ASSERT( id == mali_subsystem_pmm_id );
MALI_DEBUG_ASSERT_POINTER(pmm_state);
if( pmm_state )
{
#if PMM_OS_TEST
power_test_end();
#endif
/* Get the lock so we can shutdown */
MALI_PMM_LOCK(pmm_state);
#if MALI_STATE_TRACKING
pmm_state->mali_pmm_lock_acquired = 1;
#endif /* MALI_STATE_TRACKING */
pmm_state->status = MALI_PMM_STATUS_OFF;
#if MALI_STATE_TRACKING
pmm_state->mali_pmm_lock_acquired = 0;
#endif /* MALI_STATE_TRACKING */
MALI_PMM_UNLOCK(pmm_state);
_mali_osk_pmm_ospmm_cleanup();
pmm_policy_term(pmm_state);
_mali_osk_irq_term( pmm_state->irq );
_mali_osk_notification_queue_term( pmm_state->queue );
_mali_osk_notification_queue_term( pmm_state->iqueue );
if (pmm_state->cores_registered) malipmm_powerdown(pmm_state->cores_registered,MALI_POWER_MODE_LIGHT_SLEEP);
#if USING_MALI_PMU
if( pmm_state->pmu_initialized )
{
_mali_osk_resource_type_t t = PMU;
mali_pmm_pmu_deinit(&t);
}
#endif /* USING_MALI_PMU */
_mali_osk_atomic_term( &(pmm_state->messages_queued) );
MALI_PMM_LOCK_TERM(pmm_state);
_mali_osk_free(pmm_state);
pmm_state = NULL;
}
MALIPMM_DEBUG_PRINT( ("PMM: subsystem terminated\n") );
}
_mali_osk_errcode_t malipmm_powerup( u32 cores )
{
_mali_osk_errcode_t err = _MALI_OSK_ERR_OK;
_mali_pmm_internal_state_t *pmm = GET_PMM_STATE_PTR;
/* If all the cores are powered down, power up the MALI */
if (pmm->cores_powered == 0)
{
mali_platform_power_mode_change(MALI_POWER_MODE_ON);
#if MALI_PMM_RUNTIME_JOB_CONTROL_ON
/* Initiate the power up */
if (_mali_osk_pmm_dev_activate() < 0) {
MALI_PRINT(("PMM: Mali PMM device activate failed\n"));
err = _MALI_OSK_ERR_FAULT;
return err;
}
#endif
}
#if USING_MALI_PMU
err = mali_pmm_pmu_powerup( cores );
#endif
#if MALI_PMM_RUNTIME_JOB_CONTROL_ON
mali_platform_powerup(cores);
#endif
return err;
}
_mali_osk_errcode_t malipmm_powerdown( u32 cores, mali_power_mode power_mode )
{
_mali_osk_errcode_t err = _MALI_OSK_ERR_OK;
_mali_pmm_internal_state_t *pmm = GET_PMM_STATE_PTR;
#if MALI_PMM_RUNTIME_JOB_CONTROL_ON
mali_platform_powerdown(cores);
#endif
#if USING_MALI_PMU
err = mali_pmm_pmu_powerdown( cores );
#endif
/* If all cores are powered down, power off the MALI */
if (pmm->cores_powered == 0)
{
#if MALI_PMM_RUNTIME_JOB_CONTROL_ON
/* Initiate the power down */
_mali_osk_pmm_dev_idle();
#endif
mali_platform_power_mode_change(power_mode);
}
return err;
}
_mali_osk_errcode_t malipmm_core_register( mali_pmm_core_id core )
{
_mali_osk_errcode_t err;
_mali_pmm_internal_state_t *pmm = GET_PMM_STATE_PTR;
if( pmm == NULL )
{
/* PMM state has not been created, this is because the PMU resource has not been
* created yet.
* This probably means that the PMU resource has not been specfied as the first
* resource in the config file
*/
MALI_PRINT_ERROR( ("PMM: Cannot register core %s because the PMU resource has not been\n initialized. Please make sure the PMU resource is the first resource in the\n resource configuration.\n",
pmm_trace_get_core_name(core)) );
MALI_ERROR(_MALI_OSK_ERR_FAULT);
}
MALI_PMM_LOCK(pmm);
#if MALI_STATE_TRACKING
pmm->mali_pmm_lock_acquired = 1;
#endif /* MALI_STATE_TRACKING */
/* Check if the core is registered more than once in PMM */
MALI_DEBUG_ASSERT( (pmm->cores_registered & core) == 0 );
MALIPMM_DEBUG_PRINT( ("PMM: core registered: (0x%x) %s\n", core, pmm_trace_get_core_name(core)) );
#if !MALI_PMM_NO_PMU
/* Make sure the core is powered up */
err = malipmm_powerup( core );
#else
err = _MALI_OSK_ERR_OK;
#endif
if( _MALI_OSK_ERR_OK == err )
{
#if MALI_PMM_TRACE
mali_pmm_core_mask old_power = pmm->cores_powered;
#endif
/* Assume a registered core is now powered up and idle */
pmm->cores_registered |= core;
pmm->cores_idle |= core;
pmm->cores_powered |= core;
pmm_update_system_state( pmm );
#if MALI_PMM_TRACE
_mali_pmm_trace_hardware_change( old_power, pmm->cores_powered );
#endif
}
else
{
MALI_PRINT_ERROR( ("PMM: Error(%d) powering up registered core: (0x%x) %s\n",
err, core, pmm_trace_get_core_name(core)) );
}
#if MALI_STATE_TRACKING
pmm->mali_pmm_lock_acquired = 0;
#endif /* MALI_STATE_TRACKING */
MALI_PMM_UNLOCK(pmm);
return err;
}
void malipmm_core_unregister( mali_pmm_core_id core )
{
_mali_pmm_internal_state_t *pmm = GET_PMM_STATE_PTR;
MALI_DEBUG_ASSERT_POINTER(pmm);
MALI_PMM_LOCK(pmm);
#if MALI_STATE_TRACKING
pmm->mali_pmm_lock_acquired = 1;
#endif /* MALI_STATE_TRACKING */
/* Check if the core is registered in PMM */
MALI_PMM_DEBUG_ASSERT_CORES_SUBSET( pmm->cores_registered, core );
MALIPMM_DEBUG_PRINT( ("PMM: core unregistered: (0x%x) %s\n", core, pmm_trace_get_core_name(core)) );
{
#if MALI_PMM_TRACE
mali_pmm_core_mask old_power = pmm->cores_powered;
#endif
/* Remove the core from the system */
pmm->cores_idle &= (~core);
pmm->cores_powered &= (~core);
pmm->cores_pend_down &= (~core);
pmm->cores_pend_up &= (~core);
pmm->cores_ack_down &= (~core);
pmm->cores_ack_up &= (~core);
pmm_update_system_state( pmm );
#if MALI_PMM_TRACE
_mali_pmm_trace_hardware_change( old_power, pmm->cores_powered );
#endif
}
#if MALI_STATE_TRACKING
pmm->mali_pmm_lock_acquired = 0;
#endif /* MALI_STATE_TRACKING */
MALI_PMM_UNLOCK(pmm);
}
void malipmm_core_power_down_okay( mali_pmm_core_id core )
{
_mali_uk_pmm_message_s event = {
NULL,
MALI_PMM_EVENT_INTERNAL_POWER_DOWN_ACK,
0 };
event.data = core;
_mali_ukk_pmm_event_message( &event );
}
void malipmm_set_policy_check()
{
_mali_pmm_internal_state_t *pmm = GET_PMM_STATE_PTR;
MALI_DEBUG_ASSERT_POINTER(pmm);
pmm->check_policy = MALI_TRUE;
/* To check the policy we need to schedule some work */
_mali_osk_irq_schedulework( pmm->irq );
}
_mali_osk_errcode_t malipmm_irq_uhandler(void *data)
{
MALIPMM_DEBUG_PRINT( ("PMM: uhandler - not expected to be used\n") );
MALI_SUCCESS;
}
void malipmm_irq_bhandler(void *data)
{
_mali_pmm_internal_state_t *pmm;
pmm = (_mali_pmm_internal_state_t *)data;
MALI_DEBUG_ASSERT_POINTER(pmm);
#if PMM_OS_TEST
if( power_test_check() ) return;
#endif
MALI_PMM_LOCK(pmm);
#if MALI_STATE_TRACKING
pmm->mali_pmm_lock_acquired = 1;
#endif /* MALI_STATE_TRACKING */
/* Quick out when we are shutting down */
if( pmm->status == MALI_PMM_STATUS_OFF )
{
#if MALI_STATE_TRACKING
pmm->mali_pmm_lock_acquired = 0;
#endif /* MALI_STATE_TRACKING */
MALI_PMM_UNLOCK(pmm);
return;
}
MALIPMM_DEBUG_PRINT( ("PMM: bhandler - Processing event\n") );
if( pmm->missed > 0 )
{
MALI_PRINT_ERROR( ("PMM: Failed to send %d events", pmm->missed) );
pmm_fatal_reset( pmm );
}
if( pmm->check_policy )
{
pmm->check_policy = MALI_FALSE;
pmm_policy_check_policy(pmm);
}
else
{
/* Perform event processing */
pmm_event_process();
if( pmm->fatal_power_err )
{
/* Try a reset */
pmm_fatal_reset( pmm );
}
}
#if MALI_STATE_TRACKING
pmm->mali_pmm_lock_acquired = 0;
#endif /* MALI_STATE_TRACKING */
MALI_PMM_UNLOCK(pmm);
}
static void pmm_event_process( void )
{
_mali_osk_errcode_t err = _MALI_OSK_ERR_OK;
_mali_osk_notification_t *msg = NULL;
_mali_pmm_internal_state_t *pmm = GET_PMM_STATE_PTR;
mali_pmm_message_t *event;
u32 process_messages;
MALI_DEBUG_ASSERT_POINTER(pmm);
/* Max number of messages to process before exiting - as we shouldn't stay
* processing the messages for a long time
*/
process_messages = _mali_osk_atomic_read( &(pmm->messages_queued) );
while( process_messages > 0 )
{
/* Check internal message queue first */
err = _mali_osk_notification_queue_dequeue( pmm->iqueue, &msg );
if( err != _MALI_OSK_ERR_OK )
{
if( pmm->status == MALI_PMM_STATUS_IDLE || pmm->status == MALI_PMM_STATUS_OS_WAITING || pmm->status == MALI_PMM_STATUS_DVFS_PAUSE)
{
if( pmm->waiting > 0 ) pmm->waiting--;
/* We aren't busy changing state, so look at real events */
err = _mali_osk_notification_queue_dequeue( pmm->queue, &msg );
if( err != _MALI_OSK_ERR_OK )
{
pmm->no_events++;
MALIPMM_DEBUG_PRINT( ("PMM: event_process - No message to process\n") );
/* Nothing to do - so return */
return;
}
else
{
#if (MALI_PMM_TRACE || MALI_STATE_TRACKING)
pmm->messages_received++;
#endif
}
}
else
{
/* Waiting for an internal message */
pmm->waiting++;
MALIPMM_DEBUG_PRINT( ("PMM: event_process - Waiting for internal message, messages queued=%d\n", pmm->waiting) );
return;
}
}
else
{
#if (MALI_PMM_TRACE || MALI_STATE_TRACKING)
pmm->imessages_received++;
#endif
}
MALI_DEBUG_ASSERT_POINTER( msg );
/* Check the message type matches */
MALI_DEBUG_ASSERT( msg->notification_type == MALI_PMM_NOTIFICATION_TYPE );
event = msg->result_buffer;
_mali_osk_atomic_dec( &(pmm->messages_queued) );
process_messages--;
#if MALI_PMM_TRACE
/* Trace before we process the event in case we have an error */
_mali_pmm_trace_event_message( event, MALI_TRUE );
#endif
err = pmm_policy_process( pmm, event );
if( err != _MALI_OSK_ERR_OK )
{
MALI_PRINT_ERROR( ("PMM: Error(%d) in policy %d when processing event message with id: %d",
err, pmm->policy, event->id) );
}
/* Delete notification */
_mali_osk_notification_delete ( msg );
if( pmm->fatal_power_err )
{
/* Nothing good has happened - exit */
return;
}
#if MALI_PMM_TRACE
MALI_PRINT( ("PMM Trace: Event processed, msgs (sent/read) = %d/%d, int msgs (sent/read) = %d/%d, no events = %d, waiting = %d\n",
pmm->messages_sent, pmm->messages_received, pmm->imessages_sent, pmm->imessages_received, pmm->no_events, pmm->waiting) );
#endif
}
if( pmm->status == MALI_PMM_STATUS_IDLE && pmm->waiting > 0 )
{
/* For events we ignored whilst we were busy, add a new
* scheduled time to look at them */
_mali_osk_irq_schedulework( pmm->irq );
}
}
#if MALI_STATE_TRACKING
u32 malipmm_subsystem_dump_state(char *buf, u32 size)
{
int len = 0;
_mali_pmm_internal_state_t *pmm = GET_PMM_STATE_PTR;
if( !pmm )
{
len += _mali_osk_snprintf(buf + len, size + len, "PMM: Null state\n");
}
else
{
len += _mali_osk_snprintf(buf+len, size+len, "Locks:\n PMM lock acquired: %s\n",
pmm->mali_pmm_lock_acquired ? "true" : "false");
len += _mali_osk_snprintf(buf+len, size+len,
"PMM state:\n Previous status: %s\n Status: %s\n Current event: %s\n Policy: %s\n Check policy: %s\n State: %s\n",
pmm_trace_status[pmm->mali_last_pmm_status], pmm_trace_status[pmm->status],
pmm_trace_events[pmm->mali_new_event_status], pmm_trace_policy[pmm->policy],
pmm->check_policy ? "true" : "false", pmm_trace_state[pmm->state]);
len += _mali_osk_snprintf(buf+len, size+len,
"PMM cores:\n Cores registered: %d\n Cores powered: %d\n Cores idle: %d\n"
" Cores pending down: %d\n Cores pending up: %d\n Cores ack down: %d\n Cores ack up: %d\n",
pmm->cores_registered, pmm->cores_powered, pmm->cores_idle, pmm->cores_pend_down,
pmm->cores_pend_up, pmm->cores_ack_down, pmm->cores_ack_up);
len += _mali_osk_snprintf(buf+len, size+len, "PMM misc:\n PMU init: %s\n Messages queued: %d\n"
" Waiting: %d\n No events: %d\n Missed events: %d\n Fatal power error: %s\n",
pmm->pmu_initialized ? "true" : "false", _mali_osk_atomic_read(&(pmm->messages_queued)),
pmm->waiting, pmm->no_events, pmm->missed, pmm->fatal_power_err ? "true" : "false");
}
return len;
}
#endif /* MALI_STATE_TRACKING */
#endif /* USING_MALI_PMM */
| gpl-2.0 |
mericon/Xp_Kernel_LGH850 | arch/arm/mach-omap2/cm2xxx.c | 489 | 9840 | /*
* OMAP2xxx CM module functions
*
* Copyright (C) 2009 Nokia Corporation
* Copyright (C) 2008-2010, 2012 Texas Instruments, Inc.
* Paul Walmsley
* Rajendra Nayak <rnayak@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/io.h>
#include "prm2xxx.h"
#include "cm.h"
#include "cm2xxx.h"
#include "cm-regbits-24xx.h"
#include "clockdomain.h"
/* CM_AUTOIDLE_PLL.AUTO_* bit values for DPLLs */
#define DPLL_AUTOIDLE_DISABLE 0x0
#define OMAP2XXX_DPLL_AUTOIDLE_LOW_POWER_STOP 0x3
/* CM_AUTOIDLE_PLL.AUTO_* bit values for APLLs (OMAP2xxx only) */
#define OMAP2XXX_APLL_AUTOIDLE_DISABLE 0x0
#define OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP 0x3
/* CM_IDLEST_PLL bit value offset for APLLs (OMAP2xxx only) */
#define EN_APLL_LOCKED 3
static const u8 omap2xxx_cm_idlest_offs[] = {
CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3, OMAP24XX_CM_IDLEST4
};
/*
*
*/
static void _write_clktrctrl(u8 c, s16 module, u32 mask)
{
u32 v;
v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL);
v &= ~mask;
v |= c << __ffs(mask);
omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL);
}
bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
{
u32 v;
v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL);
v &= mask;
v >>= __ffs(mask);
return (v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0;
}
void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask)
{
_write_clktrctrl(OMAP24XX_CLKSTCTRL_ENABLE_AUTO, module, mask);
}
void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask)
{
_write_clktrctrl(OMAP24XX_CLKSTCTRL_DISABLE_AUTO, module, mask);
}
/*
* DPLL autoidle control
*/
static void _omap2xxx_set_dpll_autoidle(u8 m)
{
u32 v;
v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE);
v &= ~OMAP24XX_AUTO_DPLL_MASK;
v |= m << OMAP24XX_AUTO_DPLL_SHIFT;
omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE);
}
void omap2xxx_cm_set_dpll_disable_autoidle(void)
{
_omap2xxx_set_dpll_autoidle(OMAP2XXX_DPLL_AUTOIDLE_LOW_POWER_STOP);
}
void omap2xxx_cm_set_dpll_auto_low_power_stop(void)
{
_omap2xxx_set_dpll_autoidle(DPLL_AUTOIDLE_DISABLE);
}
/*
* APLL control
*/
static void _omap2xxx_set_apll_autoidle(u8 m, u32 mask)
{
u32 v;
v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE);
v &= ~mask;
v |= m << __ffs(mask);
omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE);
}
void omap2xxx_cm_set_apll54_disable_autoidle(void)
{
_omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP,
OMAP24XX_AUTO_54M_MASK);
}
void omap2xxx_cm_set_apll54_auto_low_power_stop(void)
{
_omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE,
OMAP24XX_AUTO_54M_MASK);
}
void omap2xxx_cm_set_apll96_disable_autoidle(void)
{
_omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP,
OMAP24XX_AUTO_96M_MASK);
}
void omap2xxx_cm_set_apll96_auto_low_power_stop(void)
{
_omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE,
OMAP24XX_AUTO_96M_MASK);
}
/* Enable an APLL if off */
static int _omap2xxx_apll_enable(u8 enable_bit, u8 status_bit)
{
u32 v, m;
m = EN_APLL_LOCKED << enable_bit;
v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
if (v & m)
return 0; /* apll already enabled */
v |= m;
omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN);
omap2xxx_cm_wait_module_ready(PLL_MOD, 1, status_bit);
/*
* REVISIT: Should we return an error code if
* omap2xxx_cm_wait_module_ready() fails?
*/
return 0;
}
/* Stop APLL */
static void _omap2xxx_apll_disable(u8 enable_bit)
{
u32 v;
v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
v &= ~(EN_APLL_LOCKED << enable_bit);
omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN);
}
/* Enable an APLL if off */
int omap2xxx_cm_apll54_enable(void)
{
return _omap2xxx_apll_enable(OMAP24XX_EN_54M_PLL_SHIFT,
OMAP24XX_ST_54M_APLL_SHIFT);
}
/* Enable an APLL if off */
int omap2xxx_cm_apll96_enable(void)
{
return _omap2xxx_apll_enable(OMAP24XX_EN_96M_PLL_SHIFT,
OMAP24XX_ST_96M_APLL_SHIFT);
}
/* Stop APLL */
void omap2xxx_cm_apll54_disable(void)
{
_omap2xxx_apll_disable(OMAP24XX_EN_54M_PLL_SHIFT);
}
/* Stop APLL */
void omap2xxx_cm_apll96_disable(void)
{
_omap2xxx_apll_disable(OMAP24XX_EN_96M_PLL_SHIFT);
}
/**
* omap2xxx_cm_split_idlest_reg - split CM_IDLEST reg addr into its components
* @idlest_reg: CM_IDLEST* virtual address
* @prcm_inst: pointer to an s16 to return the PRCM instance offset
* @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID
*
* XXX This function is only needed until absolute register addresses are
* removed from the OMAP struct clk records.
*/
int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
u8 *idlest_reg_id)
{
unsigned long offs;
u8 idlest_offs;
int i;
if (idlest_reg < cm_base || idlest_reg > (cm_base + 0x0fff))
return -EINVAL;
idlest_offs = (unsigned long)idlest_reg & 0xff;
for (i = 0; i < ARRAY_SIZE(omap2xxx_cm_idlest_offs); i++) {
if (idlest_offs == omap2xxx_cm_idlest_offs[i]) {
*idlest_reg_id = i + 1;
break;
}
}
if (i == ARRAY_SIZE(omap2xxx_cm_idlest_offs))
return -EINVAL;
offs = idlest_reg - cm_base;
offs &= 0xff00;
*prcm_inst = offs;
return 0;
}
/*
*
*/
/**
* omap2xxx_cm_wait_module_ready - wait for a module to leave idle or standby
* @prcm_mod: PRCM module offset
* @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
* @idlest_shift: shift of the bit in the CM_IDLEST* register to check
*
* Wait for the PRCM to indicate that the module identified by
* (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon
* success or -EBUSY if the module doesn't enable in time.
*/
int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
{
int ena = 0, i = 0;
u8 cm_idlest_reg;
u32 mask;
if (!idlest_id || (idlest_id > ARRAY_SIZE(omap2xxx_cm_idlest_offs)))
return -EINVAL;
cm_idlest_reg = omap2xxx_cm_idlest_offs[idlest_id - 1];
mask = 1 << idlest_shift;
ena = mask;
omap_test_timeout(((omap2_cm_read_mod_reg(prcm_mod, cm_idlest_reg) &
mask) == ena), MAX_MODULE_READY_TIME, i);
return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
}
/* Clockdomain low-level functions */
static void omap2xxx_clkdm_allow_idle(struct clockdomain *clkdm)
{
omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
clkdm->clktrctrl_mask);
}
static void omap2xxx_clkdm_deny_idle(struct clockdomain *clkdm)
{
omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
clkdm->clktrctrl_mask);
}
static int omap2xxx_clkdm_clk_enable(struct clockdomain *clkdm)
{
bool hwsup = false;
if (!clkdm->clktrctrl_mask)
return 0;
hwsup = omap2xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
clkdm->clktrctrl_mask);
if (!hwsup && clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
omap2xxx_clkdm_wakeup(clkdm);
return 0;
}
static int omap2xxx_clkdm_clk_disable(struct clockdomain *clkdm)
{
bool hwsup = false;
if (!clkdm->clktrctrl_mask)
return 0;
hwsup = omap2xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
clkdm->clktrctrl_mask);
if (!hwsup && clkdm->flags & CLKDM_CAN_FORCE_SLEEP)
omap2xxx_clkdm_sleep(clkdm);
return 0;
}
struct clkdm_ops omap2_clkdm_operations = {
.clkdm_add_wkdep = omap2_clkdm_add_wkdep,
.clkdm_del_wkdep = omap2_clkdm_del_wkdep,
.clkdm_read_wkdep = omap2_clkdm_read_wkdep,
.clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps,
.clkdm_sleep = omap2xxx_clkdm_sleep,
.clkdm_wakeup = omap2xxx_clkdm_wakeup,
.clkdm_allow_idle = omap2xxx_clkdm_allow_idle,
.clkdm_deny_idle = omap2xxx_clkdm_deny_idle,
.clkdm_clk_enable = omap2xxx_clkdm_clk_enable,
.clkdm_clk_disable = omap2xxx_clkdm_clk_disable,
};
int omap2xxx_cm_fclks_active(void)
{
u32 f1, f2;
f1 = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
f2 = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2);
return (f1 | f2) ? 1 : 0;
}
int omap2xxx_cm_mpu_retention_allowed(void)
{
u32 l;
/* Check for MMC, UART2, UART1, McSPI2, McSPI1 and DSS1. */
l = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
if (l & (OMAP2420_EN_MMC_MASK | OMAP24XX_EN_UART2_MASK |
OMAP24XX_EN_UART1_MASK | OMAP24XX_EN_MCSPI2_MASK |
OMAP24XX_EN_MCSPI1_MASK | OMAP24XX_EN_DSS1_MASK))
return 0;
/* Check for UART3. */
l = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2);
if (l & OMAP24XX_EN_UART3_MASK)
return 0;
return 1;
}
u32 omap2xxx_cm_get_core_clk_src(void)
{
u32 v;
v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
v &= OMAP24XX_CORE_CLK_SRC_MASK;
return v;
}
u32 omap2xxx_cm_get_core_pll_config(void)
{
return omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
}
u32 omap2xxx_cm_get_pll_config(void)
{
return omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL1);
}
u32 omap2xxx_cm_get_pll_status(void)
{
return omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
}
void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core, u32 mdm)
{
u32 tmp;
omap2_cm_write_mod_reg(mpu, MPU_MOD, CM_CLKSEL);
omap2_cm_write_mod_reg(dsp, OMAP24XX_DSP_MOD, CM_CLKSEL);
omap2_cm_write_mod_reg(gfx, GFX_MOD, CM_CLKSEL);
tmp = omap2_cm_read_mod_reg(CORE_MOD, CM_CLKSEL1) &
OMAP24XX_CLKSEL_DSS2_MASK;
omap2_cm_write_mod_reg(core | tmp, CORE_MOD, CM_CLKSEL1);
if (mdm)
omap2_cm_write_mod_reg(mdm, OMAP2430_MDM_MOD, CM_CLKSEL);
}
/*
*
*/
static struct cm_ll_data omap2xxx_cm_ll_data = {
.split_idlest_reg = &omap2xxx_cm_split_idlest_reg,
.wait_module_ready = &omap2xxx_cm_wait_module_ready,
};
int __init omap2xxx_cm_init(void)
{
return cm_register(&omap2xxx_cm_ll_data);
}
static void __exit omap2xxx_cm_exit(void)
{
cm_unregister(&omap2xxx_cm_ll_data);
}
__exitcall(omap2xxx_cm_exit);
| gpl-2.0 |
slz/arco-samsung-kernel-msm7x30 | net/ipv6/inet6_hashtables.c | 1001 | 8267 | /*
* INET An implementation of the TCP/IP protocol suite for the LINUX
* operating system. INET is implemented using the BSD Socket
* interface as the means of communication with the user level.
*
* Generic INET6 transport hashtables
*
* Authors: Lotsa people, from code originally in tcp, generalised here
* by Arnaldo Carvalho de Melo <acme@mandriva.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/module.h>
#include <linux/random.h>
#include <net/inet_connection_sock.h>
#include <net/inet_hashtables.h>
#include <net/inet6_hashtables.h>
#include <net/secure_seq.h>
#include <net/ip.h>
int __inet6_hash(struct sock *sk, struct inet_timewait_sock *tw)
{
struct inet_hashinfo *hashinfo = sk->sk_prot->h.hashinfo;
int twrefcnt = 0;
WARN_ON(!sk_unhashed(sk));
if (sk->sk_state == TCP_LISTEN) {
struct inet_listen_hashbucket *ilb;
ilb = &hashinfo->listening_hash[inet_sk_listen_hashfn(sk)];
spin_lock(&ilb->lock);
__sk_nulls_add_node_rcu(sk, &ilb->head);
spin_unlock(&ilb->lock);
} else {
unsigned int hash;
struct hlist_nulls_head *list;
spinlock_t *lock;
sk->sk_hash = hash = inet6_sk_ehashfn(sk);
list = &inet_ehash_bucket(hashinfo, hash)->chain;
lock = inet_ehash_lockp(hashinfo, hash);
spin_lock(lock);
__sk_nulls_add_node_rcu(sk, list);
if (tw) {
WARN_ON(sk->sk_hash != tw->tw_hash);
twrefcnt = inet_twsk_unhash(tw);
}
spin_unlock(lock);
}
sock_prot_inuse_add(sock_net(sk), sk->sk_prot, 1);
return twrefcnt;
}
EXPORT_SYMBOL(__inet6_hash);
/*
* Sockets in TCP_CLOSE state are _always_ taken out of the hash, so
* we need not check it for TCP lookups anymore, thanks Alexey. -DaveM
*
* The sockhash lock must be held as a reader here.
*/
struct sock *__inet6_lookup_established(struct net *net,
struct inet_hashinfo *hashinfo,
const struct in6_addr *saddr,
const __be16 sport,
const struct in6_addr *daddr,
const u16 hnum,
const int dif)
{
struct sock *sk;
const struct hlist_nulls_node *node;
const __portpair ports = INET_COMBINED_PORTS(sport, hnum);
/* Optimize here for direct hit, only listening connections can
* have wildcards anyways.
*/
unsigned int hash = inet6_ehashfn(net, daddr, hnum, saddr, sport);
unsigned int slot = hash & hashinfo->ehash_mask;
struct inet_ehash_bucket *head = &hashinfo->ehash[slot];
rcu_read_lock();
begin:
sk_nulls_for_each_rcu(sk, node, &head->chain) {
/* For IPV6 do the cheaper port and family tests first. */
if (INET6_MATCH(sk, net, hash, saddr, daddr, ports, dif)) {
if (unlikely(!atomic_inc_not_zero(&sk->sk_refcnt)))
goto begintw;
if (!INET6_MATCH(sk, net, hash, saddr, daddr, ports, dif)) {
sock_put(sk);
goto begin;
}
goto out;
}
}
if (get_nulls_value(node) != slot)
goto begin;
begintw:
/* Must check for a TIME_WAIT'er before going to listener hash. */
sk_nulls_for_each_rcu(sk, node, &head->twchain) {
if (INET6_TW_MATCH(sk, net, hash, saddr, daddr, ports, dif)) {
if (unlikely(!atomic_inc_not_zero(&sk->sk_refcnt))) {
sk = NULL;
goto out;
}
if (!INET6_TW_MATCH(sk, net, hash, saddr, daddr, ports, dif)) {
inet_twsk_put(inet_twsk(sk));
goto begintw;
}
goto out;
}
}
if (get_nulls_value(node) != slot)
goto begintw;
sk = NULL;
out:
rcu_read_unlock();
return sk;
}
EXPORT_SYMBOL(__inet6_lookup_established);
static inline int compute_score(struct sock *sk, struct net *net,
const unsigned short hnum,
const struct in6_addr *daddr,
const int dif)
{
int score = -1;
if (net_eq(sock_net(sk), net) && inet_sk(sk)->inet_num == hnum &&
sk->sk_family == PF_INET6) {
const struct ipv6_pinfo *np = inet6_sk(sk);
score = 1;
if (!ipv6_addr_any(&np->rcv_saddr)) {
if (!ipv6_addr_equal(&np->rcv_saddr, daddr))
return -1;
score++;
}
if (sk->sk_bound_dev_if) {
if (sk->sk_bound_dev_if != dif)
return -1;
score++;
}
}
return score;
}
struct sock *inet6_lookup_listener(struct net *net,
struct inet_hashinfo *hashinfo, const struct in6_addr *daddr,
const unsigned short hnum, const int dif)
{
struct sock *sk;
const struct hlist_nulls_node *node;
struct sock *result;
int score, hiscore;
unsigned int hash = inet_lhashfn(net, hnum);
struct inet_listen_hashbucket *ilb = &hashinfo->listening_hash[hash];
rcu_read_lock();
begin:
result = NULL;
hiscore = -1;
sk_nulls_for_each(sk, node, &ilb->head) {
score = compute_score(sk, net, hnum, daddr, dif);
if (score > hiscore) {
hiscore = score;
result = sk;
}
}
/*
* if the nulls value we got at the end of this lookup is
* not the expected one, we must restart lookup.
* We probably met an item that was moved to another chain.
*/
if (get_nulls_value(node) != hash + LISTENING_NULLS_BASE)
goto begin;
if (result) {
if (unlikely(!atomic_inc_not_zero(&result->sk_refcnt)))
result = NULL;
else if (unlikely(compute_score(result, net, hnum, daddr,
dif) < hiscore)) {
sock_put(result);
goto begin;
}
}
rcu_read_unlock();
return result;
}
EXPORT_SYMBOL_GPL(inet6_lookup_listener);
struct sock *inet6_lookup(struct net *net, struct inet_hashinfo *hashinfo,
const struct in6_addr *saddr, const __be16 sport,
const struct in6_addr *daddr, const __be16 dport,
const int dif)
{
struct sock *sk;
local_bh_disable();
sk = __inet6_lookup(net, hashinfo, saddr, sport, daddr, ntohs(dport), dif);
local_bh_enable();
return sk;
}
EXPORT_SYMBOL_GPL(inet6_lookup);
static int __inet6_check_established(struct inet_timewait_death_row *death_row,
struct sock *sk, const __u16 lport,
struct inet_timewait_sock **twp)
{
struct inet_hashinfo *hinfo = death_row->hashinfo;
struct inet_sock *inet = inet_sk(sk);
const struct ipv6_pinfo *np = inet6_sk(sk);
const struct in6_addr *daddr = &np->rcv_saddr;
const struct in6_addr *saddr = &np->daddr;
const int dif = sk->sk_bound_dev_if;
const __portpair ports = INET_COMBINED_PORTS(inet->inet_dport, lport);
struct net *net = sock_net(sk);
const unsigned int hash = inet6_ehashfn(net, daddr, lport, saddr,
inet->inet_dport);
struct inet_ehash_bucket *head = inet_ehash_bucket(hinfo, hash);
spinlock_t *lock = inet_ehash_lockp(hinfo, hash);
struct sock *sk2;
const struct hlist_nulls_node *node;
struct inet_timewait_sock *tw;
int twrefcnt = 0;
spin_lock(lock);
/* Check TIME-WAIT sockets first. */
sk_nulls_for_each(sk2, node, &head->twchain) {
tw = inet_twsk(sk2);
if (INET6_TW_MATCH(sk2, net, hash, saddr, daddr, ports, dif)) {
if (twsk_unique(sk, sk2, twp))
goto unique;
else
goto not_unique;
}
}
tw = NULL;
/* And established part... */
sk_nulls_for_each(sk2, node, &head->chain) {
if (INET6_MATCH(sk2, net, hash, saddr, daddr, ports, dif))
goto not_unique;
}
unique:
/* Must record num and sport now. Otherwise we will see
* in hash table socket with a funny identity. */
inet->inet_num = lport;
inet->inet_sport = htons(lport);
sk->sk_hash = hash;
WARN_ON(!sk_unhashed(sk));
__sk_nulls_add_node_rcu(sk, &head->chain);
if (tw) {
twrefcnt = inet_twsk_unhash(tw);
NET_INC_STATS_BH(net, LINUX_MIB_TIMEWAITRECYCLED);
}
spin_unlock(lock);
if (twrefcnt)
inet_twsk_put(tw);
sock_prot_inuse_add(sock_net(sk), sk->sk_prot, 1);
if (twp) {
*twp = tw;
} else if (tw) {
/* Silly. Should hash-dance instead... */
inet_twsk_deschedule(tw, death_row);
inet_twsk_put(tw);
}
return 0;
not_unique:
spin_unlock(lock);
return -EADDRNOTAVAIL;
}
static inline u32 inet6_sk_port_offset(const struct sock *sk)
{
const struct inet_sock *inet = inet_sk(sk);
const struct ipv6_pinfo *np = inet6_sk(sk);
return secure_ipv6_port_ephemeral(np->rcv_saddr.s6_addr32,
np->daddr.s6_addr32,
inet->inet_dport);
}
int inet6_hash_connect(struct inet_timewait_death_row *death_row,
struct sock *sk)
{
return __inet_hash_connect(death_row, sk, inet6_sk_port_offset(sk),
__inet6_check_established, __inet6_hash);
}
EXPORT_SYMBOL_GPL(inet6_hash_connect);
| gpl-2.0 |
aospSX/platform_kernel_msm7x30 | arch/sh/kernel/cpu/shmobile/cpuidle.c | 1001 | 3267 | /*
* arch/sh/kernel/cpu/shmobile/cpuidle.c
*
* Cpuidle support code for SuperH Mobile
*
* Copyright (C) 2009 Magnus Damm
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/suspend.h>
#include <linux/cpuidle.h>
#include <asm/suspend.h>
#include <asm/uaccess.h>
#include <asm/hwblk.h>
static unsigned long cpuidle_mode[] = {
SUSP_SH_SLEEP, /* regular sleep mode */
SUSP_SH_SLEEP | SUSP_SH_SF, /* sleep mode + self refresh */
SUSP_SH_STANDBY | SUSP_SH_SF, /* software standby mode + self refresh */
};
static int cpuidle_sleep_enter(struct cpuidle_device *dev,
struct cpuidle_state *state)
{
unsigned long allowed_mode = arch_hwblk_sleep_mode();
ktime_t before, after;
int requested_state = state - &dev->states[0];
int allowed_state;
int k;
/* convert allowed mode to allowed state */
for (k = ARRAY_SIZE(cpuidle_mode) - 1; k > 0; k--)
if (cpuidle_mode[k] == allowed_mode)
break;
allowed_state = k;
/* take the following into account for sleep mode selection:
* - allowed_state: best mode allowed by hardware (clock deps)
* - requested_state: best mode allowed by software (latencies)
*/
k = min_t(int, allowed_state, requested_state);
dev->last_state = &dev->states[k];
before = ktime_get();
sh_mobile_call_standby(cpuidle_mode[k]);
after = ktime_get();
return ktime_to_ns(ktime_sub(after, before)) >> 10;
}
static struct cpuidle_device cpuidle_dev;
static struct cpuidle_driver cpuidle_driver = {
.name = "sh_idle",
.owner = THIS_MODULE,
};
void sh_mobile_setup_cpuidle(void)
{
struct cpuidle_device *dev = &cpuidle_dev;
struct cpuidle_state *state;
int i;
cpuidle_register_driver(&cpuidle_driver);
for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
dev->states[i].name[0] = '\0';
dev->states[i].desc[0] = '\0';
}
i = CPUIDLE_DRIVER_STATE_START;
state = &dev->states[i++];
snprintf(state->name, CPUIDLE_NAME_LEN, "C0");
strncpy(state->desc, "SuperH Sleep Mode", CPUIDLE_DESC_LEN);
state->exit_latency = 1;
state->target_residency = 1 * 2;
state->power_usage = 3;
state->flags = 0;
state->flags |= CPUIDLE_FLAG_SHALLOW;
state->flags |= CPUIDLE_FLAG_TIME_VALID;
state->enter = cpuidle_sleep_enter;
dev->safe_state = state;
if (sh_mobile_sleep_supported & SUSP_SH_SF) {
state = &dev->states[i++];
snprintf(state->name, CPUIDLE_NAME_LEN, "C1");
strncpy(state->desc, "SuperH Sleep Mode [SF]",
CPUIDLE_DESC_LEN);
state->exit_latency = 100;
state->target_residency = 1 * 2;
state->power_usage = 1;
state->flags = 0;
state->flags |= CPUIDLE_FLAG_TIME_VALID;
state->enter = cpuidle_sleep_enter;
}
if (sh_mobile_sleep_supported & SUSP_SH_STANDBY) {
state = &dev->states[i++];
snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
strncpy(state->desc, "SuperH Mobile Standby Mode [SF]",
CPUIDLE_DESC_LEN);
state->exit_latency = 2300;
state->target_residency = 1 * 2;
state->power_usage = 1;
state->flags = 0;
state->flags |= CPUIDLE_FLAG_TIME_VALID;
state->enter = cpuidle_sleep_enter;
}
dev->state_count = i;
cpuidle_register_device(dev);
}
| gpl-2.0 |
krash86/android_kernel_google_pixel | drivers/net/wireless/cw1200/wsm.c | 2025 | 44388 | /*
* WSM host interface (HI) implementation for
* ST-Ericsson CW1200 mac80211 drivers.
*
* Copyright (c) 2010, ST-Ericsson
* Author: Dmitry Tarnyagin <dmitry.tarnyagin@lockless.no>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/skbuff.h>
#include <linux/wait.h>
#include <linux/delay.h>
#include <linux/sched.h>
#include <linux/random.h>
#include "cw1200.h"
#include "wsm.h"
#include "bh.h"
#include "sta.h"
#include "debug.h"
#define WSM_CMD_TIMEOUT (2 * HZ) /* With respect to interrupt loss */
#define WSM_CMD_START_TIMEOUT (7 * HZ)
#define WSM_CMD_RESET_TIMEOUT (3 * HZ) /* 2 sec. timeout was observed. */
#define WSM_CMD_MAX_TIMEOUT (3 * HZ)
#define WSM_SKIP(buf, size) \
do { \
if ((buf)->data + size > (buf)->end) \
goto underflow; \
(buf)->data += size; \
} while (0)
#define WSM_GET(buf, ptr, size) \
do { \
if ((buf)->data + size > (buf)->end) \
goto underflow; \
memcpy(ptr, (buf)->data, size); \
(buf)->data += size; \
} while (0)
#define __WSM_GET(buf, type, type2, cvt) \
({ \
type val; \
if ((buf)->data + sizeof(type) > (buf)->end) \
goto underflow; \
val = cvt(*(type2 *)(buf)->data); \
(buf)->data += sizeof(type); \
val; \
})
#define WSM_GET8(buf) __WSM_GET(buf, u8, u8, (u8))
#define WSM_GET16(buf) __WSM_GET(buf, u16, __le16, __le16_to_cpu)
#define WSM_GET32(buf) __WSM_GET(buf, u32, __le32, __le32_to_cpu)
#define WSM_PUT(buf, ptr, size) \
do { \
if ((buf)->data + size > (buf)->end) \
if (wsm_buf_reserve((buf), size)) \
goto nomem; \
memcpy((buf)->data, ptr, size); \
(buf)->data += size; \
} while (0)
#define __WSM_PUT(buf, val, type, type2, cvt) \
do { \
if ((buf)->data + sizeof(type) > (buf)->end) \
if (wsm_buf_reserve((buf), sizeof(type))) \
goto nomem; \
*(type2 *)(buf)->data = cvt(val); \
(buf)->data += sizeof(type); \
} while (0)
#define WSM_PUT8(buf, val) __WSM_PUT(buf, val, u8, u8, (u8))
#define WSM_PUT16(buf, val) __WSM_PUT(buf, val, u16, __le16, __cpu_to_le16)
#define WSM_PUT32(buf, val) __WSM_PUT(buf, val, u32, __le32, __cpu_to_le32)
static void wsm_buf_reset(struct wsm_buf *buf);
static int wsm_buf_reserve(struct wsm_buf *buf, size_t extra_size);
static int wsm_cmd_send(struct cw1200_common *priv,
struct wsm_buf *buf,
void *arg, u16 cmd, long tmo);
#define wsm_cmd_lock(__priv) mutex_lock(&((__priv)->wsm_cmd_mux))
#define wsm_cmd_unlock(__priv) mutex_unlock(&((__priv)->wsm_cmd_mux))
/* ******************************************************************** */
/* WSM API implementation */
static int wsm_generic_confirm(struct cw1200_common *priv,
void *arg,
struct wsm_buf *buf)
{
u32 status = WSM_GET32(buf);
if (status != WSM_STATUS_SUCCESS)
return -EINVAL;
return 0;
underflow:
WARN_ON(1);
return -EINVAL;
}
int wsm_configuration(struct cw1200_common *priv, struct wsm_configuration *arg)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
wsm_cmd_lock(priv);
WSM_PUT32(buf, arg->dot11MaxTransmitMsduLifeTime);
WSM_PUT32(buf, arg->dot11MaxReceiveLifeTime);
WSM_PUT32(buf, arg->dot11RtsThreshold);
/* DPD block. */
WSM_PUT16(buf, arg->dpdData_size + 12);
WSM_PUT16(buf, 1); /* DPD version */
WSM_PUT(buf, arg->dot11StationId, ETH_ALEN);
WSM_PUT16(buf, 5); /* DPD flags */
WSM_PUT(buf, arg->dpdData, arg->dpdData_size);
ret = wsm_cmd_send(priv, buf, arg,
WSM_CONFIGURATION_REQ_ID, WSM_CMD_TIMEOUT);
wsm_cmd_unlock(priv);
return ret;
nomem:
wsm_cmd_unlock(priv);
return -ENOMEM;
}
static int wsm_configuration_confirm(struct cw1200_common *priv,
struct wsm_configuration *arg,
struct wsm_buf *buf)
{
int i;
int status;
status = WSM_GET32(buf);
if (WARN_ON(status != WSM_STATUS_SUCCESS))
return -EINVAL;
WSM_GET(buf, arg->dot11StationId, ETH_ALEN);
arg->dot11FrequencyBandsSupported = WSM_GET8(buf);
WSM_SKIP(buf, 1);
arg->supportedRateMask = WSM_GET32(buf);
for (i = 0; i < 2; ++i) {
arg->txPowerRange[i].min_power_level = WSM_GET32(buf);
arg->txPowerRange[i].max_power_level = WSM_GET32(buf);
arg->txPowerRange[i].stepping = WSM_GET32(buf);
}
return 0;
underflow:
WARN_ON(1);
return -EINVAL;
}
/* ******************************************************************** */
int wsm_reset(struct cw1200_common *priv, const struct wsm_reset *arg)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
u16 cmd = WSM_RESET_REQ_ID | WSM_TX_LINK_ID(arg->link_id);
wsm_cmd_lock(priv);
WSM_PUT32(buf, arg->reset_statistics ? 0 : 1);
ret = wsm_cmd_send(priv, buf, NULL, cmd, WSM_CMD_RESET_TIMEOUT);
wsm_cmd_unlock(priv);
return ret;
nomem:
wsm_cmd_unlock(priv);
return -ENOMEM;
}
/* ******************************************************************** */
struct wsm_mib {
u16 mib_id;
void *buf;
size_t buf_size;
};
int wsm_read_mib(struct cw1200_common *priv, u16 mib_id, void *_buf,
size_t buf_size)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
struct wsm_mib mib_buf = {
.mib_id = mib_id,
.buf = _buf,
.buf_size = buf_size,
};
wsm_cmd_lock(priv);
WSM_PUT16(buf, mib_id);
WSM_PUT16(buf, 0);
ret = wsm_cmd_send(priv, buf, &mib_buf,
WSM_READ_MIB_REQ_ID, WSM_CMD_TIMEOUT);
wsm_cmd_unlock(priv);
return ret;
nomem:
wsm_cmd_unlock(priv);
return -ENOMEM;
}
static int wsm_read_mib_confirm(struct cw1200_common *priv,
struct wsm_mib *arg,
struct wsm_buf *buf)
{
u16 size;
if (WARN_ON(WSM_GET32(buf) != WSM_STATUS_SUCCESS))
return -EINVAL;
if (WARN_ON(WSM_GET16(buf) != arg->mib_id))
return -EINVAL;
size = WSM_GET16(buf);
if (size > arg->buf_size)
size = arg->buf_size;
WSM_GET(buf, arg->buf, size);
arg->buf_size = size;
return 0;
underflow:
WARN_ON(1);
return -EINVAL;
}
/* ******************************************************************** */
int wsm_write_mib(struct cw1200_common *priv, u16 mib_id, void *_buf,
size_t buf_size)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
struct wsm_mib mib_buf = {
.mib_id = mib_id,
.buf = _buf,
.buf_size = buf_size,
};
wsm_cmd_lock(priv);
WSM_PUT16(buf, mib_id);
WSM_PUT16(buf, buf_size);
WSM_PUT(buf, _buf, buf_size);
ret = wsm_cmd_send(priv, buf, &mib_buf,
WSM_WRITE_MIB_REQ_ID, WSM_CMD_TIMEOUT);
wsm_cmd_unlock(priv);
return ret;
nomem:
wsm_cmd_unlock(priv);
return -ENOMEM;
}
static int wsm_write_mib_confirm(struct cw1200_common *priv,
struct wsm_mib *arg,
struct wsm_buf *buf)
{
int ret;
ret = wsm_generic_confirm(priv, arg, buf);
if (ret)
return ret;
if (arg->mib_id == WSM_MIB_ID_OPERATIONAL_POWER_MODE) {
/* OperationalMode: update PM status. */
const char *p = arg->buf;
cw1200_enable_powersave(priv, (p[0] & 0x0F) ? true : false);
}
return 0;
}
/* ******************************************************************** */
int wsm_scan(struct cw1200_common *priv, const struct wsm_scan *arg)
{
int i;
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
if (arg->num_channels > 48)
return -EINVAL;
if (arg->num_ssids > 2)
return -EINVAL;
if (arg->band > 1)
return -EINVAL;
wsm_cmd_lock(priv);
WSM_PUT8(buf, arg->band);
WSM_PUT8(buf, arg->type);
WSM_PUT8(buf, arg->flags);
WSM_PUT8(buf, arg->max_tx_rate);
WSM_PUT32(buf, arg->auto_scan_interval);
WSM_PUT8(buf, arg->num_probes);
WSM_PUT8(buf, arg->num_channels);
WSM_PUT8(buf, arg->num_ssids);
WSM_PUT8(buf, arg->probe_delay);
for (i = 0; i < arg->num_channels; ++i) {
WSM_PUT16(buf, arg->ch[i].number);
WSM_PUT16(buf, 0);
WSM_PUT32(buf, arg->ch[i].min_chan_time);
WSM_PUT32(buf, arg->ch[i].max_chan_time);
WSM_PUT32(buf, 0);
}
for (i = 0; i < arg->num_ssids; ++i) {
WSM_PUT32(buf, arg->ssids[i].length);
WSM_PUT(buf, &arg->ssids[i].ssid[0],
sizeof(arg->ssids[i].ssid));
}
ret = wsm_cmd_send(priv, buf, NULL,
WSM_START_SCAN_REQ_ID, WSM_CMD_TIMEOUT);
wsm_cmd_unlock(priv);
return ret;
nomem:
wsm_cmd_unlock(priv);
return -ENOMEM;
}
/* ******************************************************************** */
int wsm_stop_scan(struct cw1200_common *priv)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
wsm_cmd_lock(priv);
ret = wsm_cmd_send(priv, buf, NULL,
WSM_STOP_SCAN_REQ_ID, WSM_CMD_TIMEOUT);
wsm_cmd_unlock(priv);
return ret;
}
static int wsm_tx_confirm(struct cw1200_common *priv,
struct wsm_buf *buf,
int link_id)
{
struct wsm_tx_confirm tx_confirm;
tx_confirm.packet_id = WSM_GET32(buf);
tx_confirm.status = WSM_GET32(buf);
tx_confirm.tx_rate = WSM_GET8(buf);
tx_confirm.ack_failures = WSM_GET8(buf);
tx_confirm.flags = WSM_GET16(buf);
tx_confirm.media_delay = WSM_GET32(buf);
tx_confirm.tx_queue_delay = WSM_GET32(buf);
cw1200_tx_confirm_cb(priv, link_id, &tx_confirm);
return 0;
underflow:
WARN_ON(1);
return -EINVAL;
}
static int wsm_multi_tx_confirm(struct cw1200_common *priv,
struct wsm_buf *buf, int link_id)
{
int ret;
int count;
int i;
count = WSM_GET32(buf);
if (WARN_ON(count <= 0))
return -EINVAL;
if (count > 1) {
/* We already released one buffer, now for the rest */
ret = wsm_release_tx_buffer(priv, count - 1);
if (ret < 0)
return ret;
else if (ret > 0)
cw1200_bh_wakeup(priv);
}
cw1200_debug_txed_multi(priv, count);
for (i = 0; i < count; ++i) {
ret = wsm_tx_confirm(priv, buf, link_id);
if (ret)
return ret;
}
return ret;
underflow:
WARN_ON(1);
return -EINVAL;
}
/* ******************************************************************** */
static int wsm_join_confirm(struct cw1200_common *priv,
struct wsm_join_cnf *arg,
struct wsm_buf *buf)
{
arg->status = WSM_GET32(buf);
if (WARN_ON(arg->status) != WSM_STATUS_SUCCESS)
return -EINVAL;
arg->min_power_level = WSM_GET32(buf);
arg->max_power_level = WSM_GET32(buf);
return 0;
underflow:
WARN_ON(1);
return -EINVAL;
}
int wsm_join(struct cw1200_common *priv, struct wsm_join *arg)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
struct wsm_join_cnf resp;
wsm_cmd_lock(priv);
WSM_PUT8(buf, arg->mode);
WSM_PUT8(buf, arg->band);
WSM_PUT16(buf, arg->channel_number);
WSM_PUT(buf, &arg->bssid[0], sizeof(arg->bssid));
WSM_PUT16(buf, arg->atim_window);
WSM_PUT8(buf, arg->preamble_type);
WSM_PUT8(buf, arg->probe_for_join);
WSM_PUT8(buf, arg->dtim_period);
WSM_PUT8(buf, arg->flags);
WSM_PUT32(buf, arg->ssid_len);
WSM_PUT(buf, &arg->ssid[0], sizeof(arg->ssid));
WSM_PUT32(buf, arg->beacon_interval);
WSM_PUT32(buf, arg->basic_rate_set);
priv->tx_burst_idx = -1;
ret = wsm_cmd_send(priv, buf, &resp,
WSM_JOIN_REQ_ID, WSM_CMD_TIMEOUT);
/* TODO: Update state based on resp.min|max_power_level */
priv->join_complete_status = resp.status;
wsm_cmd_unlock(priv);
return ret;
nomem:
wsm_cmd_unlock(priv);
return -ENOMEM;
}
/* ******************************************************************** */
int wsm_set_bss_params(struct cw1200_common *priv,
const struct wsm_set_bss_params *arg)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
wsm_cmd_lock(priv);
WSM_PUT8(buf, (arg->reset_beacon_loss ? 0x1 : 0));
WSM_PUT8(buf, arg->beacon_lost_count);
WSM_PUT16(buf, arg->aid);
WSM_PUT32(buf, arg->operational_rate_set);
ret = wsm_cmd_send(priv, buf, NULL,
WSM_SET_BSS_PARAMS_REQ_ID, WSM_CMD_TIMEOUT);
wsm_cmd_unlock(priv);
return ret;
nomem:
wsm_cmd_unlock(priv);
return -ENOMEM;
}
/* ******************************************************************** */
int wsm_add_key(struct cw1200_common *priv, const struct wsm_add_key *arg)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
wsm_cmd_lock(priv);
WSM_PUT(buf, arg, sizeof(*arg));
ret = wsm_cmd_send(priv, buf, NULL,
WSM_ADD_KEY_REQ_ID, WSM_CMD_TIMEOUT);
wsm_cmd_unlock(priv);
return ret;
nomem:
wsm_cmd_unlock(priv);
return -ENOMEM;
}
/* ******************************************************************** */
int wsm_remove_key(struct cw1200_common *priv, const struct wsm_remove_key *arg)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
wsm_cmd_lock(priv);
WSM_PUT8(buf, arg->index);
WSM_PUT8(buf, 0);
WSM_PUT16(buf, 0);
ret = wsm_cmd_send(priv, buf, NULL,
WSM_REMOVE_KEY_REQ_ID, WSM_CMD_TIMEOUT);
wsm_cmd_unlock(priv);
return ret;
nomem:
wsm_cmd_unlock(priv);
return -ENOMEM;
}
/* ******************************************************************** */
int wsm_set_tx_queue_params(struct cw1200_common *priv,
const struct wsm_set_tx_queue_params *arg, u8 id)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
u8 queue_id_to_wmm_aci[] = {3, 2, 0, 1};
wsm_cmd_lock(priv);
WSM_PUT8(buf, queue_id_to_wmm_aci[id]);
WSM_PUT8(buf, 0);
WSM_PUT8(buf, arg->ackPolicy);
WSM_PUT8(buf, 0);
WSM_PUT32(buf, arg->maxTransmitLifetime);
WSM_PUT16(buf, arg->allowedMediumTime);
WSM_PUT16(buf, 0);
ret = wsm_cmd_send(priv, buf, NULL, 0x0012, WSM_CMD_TIMEOUT);
wsm_cmd_unlock(priv);
return ret;
nomem:
wsm_cmd_unlock(priv);
return -ENOMEM;
}
/* ******************************************************************** */
int wsm_set_edca_params(struct cw1200_common *priv,
const struct wsm_edca_params *arg)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
wsm_cmd_lock(priv);
/* Implemented according to specification. */
WSM_PUT16(buf, arg->params[3].cwmin);
WSM_PUT16(buf, arg->params[2].cwmin);
WSM_PUT16(buf, arg->params[1].cwmin);
WSM_PUT16(buf, arg->params[0].cwmin);
WSM_PUT16(buf, arg->params[3].cwmax);
WSM_PUT16(buf, arg->params[2].cwmax);
WSM_PUT16(buf, arg->params[1].cwmax);
WSM_PUT16(buf, arg->params[0].cwmax);
WSM_PUT8(buf, arg->params[3].aifns);
WSM_PUT8(buf, arg->params[2].aifns);
WSM_PUT8(buf, arg->params[1].aifns);
WSM_PUT8(buf, arg->params[0].aifns);
WSM_PUT16(buf, arg->params[3].txop_limit);
WSM_PUT16(buf, arg->params[2].txop_limit);
WSM_PUT16(buf, arg->params[1].txop_limit);
WSM_PUT16(buf, arg->params[0].txop_limit);
WSM_PUT32(buf, arg->params[3].max_rx_lifetime);
WSM_PUT32(buf, arg->params[2].max_rx_lifetime);
WSM_PUT32(buf, arg->params[1].max_rx_lifetime);
WSM_PUT32(buf, arg->params[0].max_rx_lifetime);
ret = wsm_cmd_send(priv, buf, NULL,
WSM_EDCA_PARAMS_REQ_ID, WSM_CMD_TIMEOUT);
wsm_cmd_unlock(priv);
return ret;
nomem:
wsm_cmd_unlock(priv);
return -ENOMEM;
}
/* ******************************************************************** */
int wsm_switch_channel(struct cw1200_common *priv,
const struct wsm_switch_channel *arg)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
wsm_cmd_lock(priv);
WSM_PUT8(buf, arg->mode);
WSM_PUT8(buf, arg->switch_count);
WSM_PUT16(buf, arg->channel_number);
priv->channel_switch_in_progress = 1;
ret = wsm_cmd_send(priv, buf, NULL,
WSM_SWITCH_CHANNEL_REQ_ID, WSM_CMD_TIMEOUT);
if (ret)
priv->channel_switch_in_progress = 0;
wsm_cmd_unlock(priv);
return ret;
nomem:
wsm_cmd_unlock(priv);
return -ENOMEM;
}
/* ******************************************************************** */
int wsm_set_pm(struct cw1200_common *priv, const struct wsm_set_pm *arg)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
priv->ps_mode_switch_in_progress = 1;
wsm_cmd_lock(priv);
WSM_PUT8(buf, arg->mode);
WSM_PUT8(buf, arg->fast_psm_idle_period);
WSM_PUT8(buf, arg->ap_psm_change_period);
WSM_PUT8(buf, arg->min_auto_pspoll_period);
ret = wsm_cmd_send(priv, buf, NULL,
WSM_SET_PM_REQ_ID, WSM_CMD_TIMEOUT);
wsm_cmd_unlock(priv);
return ret;
nomem:
wsm_cmd_unlock(priv);
return -ENOMEM;
}
/* ******************************************************************** */
int wsm_start(struct cw1200_common *priv, const struct wsm_start *arg)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
wsm_cmd_lock(priv);
WSM_PUT8(buf, arg->mode);
WSM_PUT8(buf, arg->band);
WSM_PUT16(buf, arg->channel_number);
WSM_PUT32(buf, arg->ct_window);
WSM_PUT32(buf, arg->beacon_interval);
WSM_PUT8(buf, arg->dtim_period);
WSM_PUT8(buf, arg->preamble);
WSM_PUT8(buf, arg->probe_delay);
WSM_PUT8(buf, arg->ssid_len);
WSM_PUT(buf, arg->ssid, sizeof(arg->ssid));
WSM_PUT32(buf, arg->basic_rate_set);
priv->tx_burst_idx = -1;
ret = wsm_cmd_send(priv, buf, NULL,
WSM_START_REQ_ID, WSM_CMD_START_TIMEOUT);
wsm_cmd_unlock(priv);
return ret;
nomem:
wsm_cmd_unlock(priv);
return -ENOMEM;
}
/* ******************************************************************** */
int wsm_beacon_transmit(struct cw1200_common *priv,
const struct wsm_beacon_transmit *arg)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
wsm_cmd_lock(priv);
WSM_PUT32(buf, arg->enable_beaconing ? 1 : 0);
ret = wsm_cmd_send(priv, buf, NULL,
WSM_BEACON_TRANSMIT_REQ_ID, WSM_CMD_TIMEOUT);
wsm_cmd_unlock(priv);
return ret;
nomem:
wsm_cmd_unlock(priv);
return -ENOMEM;
}
/* ******************************************************************** */
int wsm_start_find(struct cw1200_common *priv)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
wsm_cmd_lock(priv);
ret = wsm_cmd_send(priv, buf, NULL, 0x0019, WSM_CMD_TIMEOUT);
wsm_cmd_unlock(priv);
return ret;
}
/* ******************************************************************** */
int wsm_stop_find(struct cw1200_common *priv)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
wsm_cmd_lock(priv);
ret = wsm_cmd_send(priv, buf, NULL, 0x001A, WSM_CMD_TIMEOUT);
wsm_cmd_unlock(priv);
return ret;
}
/* ******************************************************************** */
int wsm_map_link(struct cw1200_common *priv, const struct wsm_map_link *arg)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
u16 cmd = 0x001C | WSM_TX_LINK_ID(arg->link_id);
wsm_cmd_lock(priv);
WSM_PUT(buf, &arg->mac_addr[0], sizeof(arg->mac_addr));
WSM_PUT16(buf, 0);
ret = wsm_cmd_send(priv, buf, NULL, cmd, WSM_CMD_TIMEOUT);
wsm_cmd_unlock(priv);
return ret;
nomem:
wsm_cmd_unlock(priv);
return -ENOMEM;
}
/* ******************************************************************** */
int wsm_update_ie(struct cw1200_common *priv,
const struct wsm_update_ie *arg)
{
int ret;
struct wsm_buf *buf = &priv->wsm_cmd_buf;
wsm_cmd_lock(priv);
WSM_PUT16(buf, arg->what);
WSM_PUT16(buf, arg->count);
WSM_PUT(buf, arg->ies, arg->length);
ret = wsm_cmd_send(priv, buf, NULL, 0x001B, WSM_CMD_TIMEOUT);
wsm_cmd_unlock(priv);
return ret;
nomem:
wsm_cmd_unlock(priv);
return -ENOMEM;
}
/* ******************************************************************** */
int wsm_set_probe_responder(struct cw1200_common *priv, bool enable)
{
priv->rx_filter.probeResponder = enable;
return wsm_set_rx_filter(priv, &priv->rx_filter);
}
/* ******************************************************************** */
/* WSM indication events implementation */
const char * const cw1200_fw_types[] = {
"ETF",
"WFM",
"WSM",
"HI test",
"Platform test"
};
static int wsm_startup_indication(struct cw1200_common *priv,
struct wsm_buf *buf)
{
priv->wsm_caps.input_buffers = WSM_GET16(buf);
priv->wsm_caps.input_buffer_size = WSM_GET16(buf);
priv->wsm_caps.hw_id = WSM_GET16(buf);
priv->wsm_caps.hw_subid = WSM_GET16(buf);
priv->wsm_caps.status = WSM_GET16(buf);
priv->wsm_caps.fw_cap = WSM_GET16(buf);
priv->wsm_caps.fw_type = WSM_GET16(buf);
priv->wsm_caps.fw_api = WSM_GET16(buf);
priv->wsm_caps.fw_build = WSM_GET16(buf);
priv->wsm_caps.fw_ver = WSM_GET16(buf);
WSM_GET(buf, priv->wsm_caps.fw_label, sizeof(priv->wsm_caps.fw_label));
priv->wsm_caps.fw_label[sizeof(priv->wsm_caps.fw_label) - 1] = 0; /* Do not trust FW too much... */
if (WARN_ON(priv->wsm_caps.status))
return -EINVAL;
if (WARN_ON(priv->wsm_caps.fw_type > 4))
return -EINVAL;
pr_info("CW1200 WSM init done.\n"
" Input buffers: %d x %d bytes\n"
" Hardware: %d.%d\n"
" %s firmware [%s], ver: %d, build: %d,"
" api: %d, cap: 0x%.4X\n",
priv->wsm_caps.input_buffers,
priv->wsm_caps.input_buffer_size,
priv->wsm_caps.hw_id, priv->wsm_caps.hw_subid,
cw1200_fw_types[priv->wsm_caps.fw_type],
priv->wsm_caps.fw_label, priv->wsm_caps.fw_ver,
priv->wsm_caps.fw_build,
priv->wsm_caps.fw_api, priv->wsm_caps.fw_cap);
/* Disable unsupported frequency bands */
if (!(priv->wsm_caps.fw_cap & 0x1))
priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = NULL;
if (!(priv->wsm_caps.fw_cap & 0x2))
priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = NULL;
priv->firmware_ready = 1;
wake_up(&priv->wsm_startup_done);
return 0;
underflow:
WARN_ON(1);
return -EINVAL;
}
static int wsm_receive_indication(struct cw1200_common *priv,
int link_id,
struct wsm_buf *buf,
struct sk_buff **skb_p)
{
struct wsm_rx rx;
struct ieee80211_hdr *hdr;
size_t hdr_len;
__le16 fctl;
rx.status = WSM_GET32(buf);
rx.channel_number = WSM_GET16(buf);
rx.rx_rate = WSM_GET8(buf);
rx.rcpi_rssi = WSM_GET8(buf);
rx.flags = WSM_GET32(buf);
/* FW Workaround: Drop probe resp or
beacon when RSSI is 0
*/
hdr = (struct ieee80211_hdr *)(*skb_p)->data;
if (!rx.rcpi_rssi &&
(ieee80211_is_probe_resp(hdr->frame_control) ||
ieee80211_is_beacon(hdr->frame_control)))
return 0;
/* If no RSSI subscription has been made,
* convert RCPI to RSSI here
*/
if (!priv->cqm_use_rssi)
rx.rcpi_rssi = rx.rcpi_rssi / 2 - 110;
fctl = *(__le16 *)buf->data;
hdr_len = buf->data - buf->begin;
skb_pull(*skb_p, hdr_len);
if (!rx.status && ieee80211_is_deauth(fctl)) {
if (priv->join_status == CW1200_JOIN_STATUS_STA) {
/* Shedule unjoin work */
pr_debug("[WSM] Issue unjoin command (RX).\n");
wsm_lock_tx_async(priv);
if (queue_work(priv->workqueue,
&priv->unjoin_work) <= 0)
wsm_unlock_tx(priv);
}
}
cw1200_rx_cb(priv, &rx, link_id, skb_p);
if (*skb_p)
skb_push(*skb_p, hdr_len);
return 0;
underflow:
return -EINVAL;
}
static int wsm_event_indication(struct cw1200_common *priv, struct wsm_buf *buf)
{
int first;
struct cw1200_wsm_event *event;
if (priv->mode == NL80211_IFTYPE_UNSPECIFIED) {
/* STA is stopped. */
return 0;
}
event = kzalloc(sizeof(struct cw1200_wsm_event), GFP_KERNEL);
if (!event)
return -ENOMEM;
event->evt.id = WSM_GET32(buf);
event->evt.data = WSM_GET32(buf);
pr_debug("[WSM] Event: %d(%d)\n",
event->evt.id, event->evt.data);
spin_lock(&priv->event_queue_lock);
first = list_empty(&priv->event_queue);
list_add_tail(&event->link, &priv->event_queue);
spin_unlock(&priv->event_queue_lock);
if (first)
queue_work(priv->workqueue, &priv->event_handler);
return 0;
underflow:
kfree(event);
return -EINVAL;
}
static int wsm_channel_switch_indication(struct cw1200_common *priv,
struct wsm_buf *buf)
{
WARN_ON(WSM_GET32(buf));
priv->channel_switch_in_progress = 0;
wake_up(&priv->channel_switch_done);
wsm_unlock_tx(priv);
return 0;
underflow:
return -EINVAL;
}
static int wsm_set_pm_indication(struct cw1200_common *priv,
struct wsm_buf *buf)
{
/* TODO: Check buf (struct wsm_set_pm_complete) for validity */
if (priv->ps_mode_switch_in_progress) {
priv->ps_mode_switch_in_progress = 0;
wake_up(&priv->ps_mode_switch_done);
}
return 0;
}
static int wsm_scan_started(struct cw1200_common *priv, void *arg,
struct wsm_buf *buf)
{
u32 status = WSM_GET32(buf);
if (status != WSM_STATUS_SUCCESS) {
cw1200_scan_failed_cb(priv);
return -EINVAL;
}
return 0;
underflow:
WARN_ON(1);
return -EINVAL;
}
static int wsm_scan_complete_indication(struct cw1200_common *priv,
struct wsm_buf *buf)
{
struct wsm_scan_complete arg;
arg.status = WSM_GET32(buf);
arg.psm = WSM_GET8(buf);
arg.num_channels = WSM_GET8(buf);
cw1200_scan_complete_cb(priv, &arg);
return 0;
underflow:
return -EINVAL;
}
static int wsm_join_complete_indication(struct cw1200_common *priv,
struct wsm_buf *buf)
{
struct wsm_join_complete arg;
arg.status = WSM_GET32(buf);
pr_debug("[WSM] Join complete indication, status: %d\n", arg.status);
cw1200_join_complete_cb(priv, &arg);
return 0;
underflow:
return -EINVAL;
}
static int wsm_find_complete_indication(struct cw1200_common *priv,
struct wsm_buf *buf)
{
pr_warn("Implement find_complete_indication\n");
return 0;
}
static int wsm_ba_timeout_indication(struct cw1200_common *priv,
struct wsm_buf *buf)
{
u32 dummy;
u8 tid;
u8 dummy2;
u8 addr[ETH_ALEN];
dummy = WSM_GET32(buf);
tid = WSM_GET8(buf);
dummy2 = WSM_GET8(buf);
WSM_GET(buf, addr, ETH_ALEN);
pr_info("BlockACK timeout, tid %d, addr %pM\n",
tid, addr);
return 0;
underflow:
return -EINVAL;
}
static int wsm_suspend_resume_indication(struct cw1200_common *priv,
int link_id, struct wsm_buf *buf)
{
u32 flags;
struct wsm_suspend_resume arg;
flags = WSM_GET32(buf);
arg.link_id = link_id;
arg.stop = !(flags & 1);
arg.multicast = !!(flags & 8);
arg.queue = (flags >> 1) & 3;
cw1200_suspend_resume(priv, &arg);
return 0;
underflow:
return -EINVAL;
}
/* ******************************************************************** */
/* WSM TX */
static int wsm_cmd_send(struct cw1200_common *priv,
struct wsm_buf *buf,
void *arg, u16 cmd, long tmo)
{
size_t buf_len = buf->data - buf->begin;
int ret;
/* Don't bother if we're dead. */
if (priv->bh_error) {
ret = 0;
goto done;
}
/* Block until the cmd buffer is completed. Tortuous. */
spin_lock(&priv->wsm_cmd.lock);
while (!priv->wsm_cmd.done) {
spin_unlock(&priv->wsm_cmd.lock);
spin_lock(&priv->wsm_cmd.lock);
}
priv->wsm_cmd.done = 0;
spin_unlock(&priv->wsm_cmd.lock);
if (cmd == WSM_WRITE_MIB_REQ_ID ||
cmd == WSM_READ_MIB_REQ_ID)
pr_debug("[WSM] >>> 0x%.4X [MIB: 0x%.4X] (%zu)\n",
cmd, __le16_to_cpu(((__le16 *)buf->begin)[2]),
buf_len);
else
pr_debug("[WSM] >>> 0x%.4X (%zu)\n", cmd, buf_len);
/* Due to buggy SPI on CW1200, we need to
* pad the message by a few bytes to ensure
* that it's completely received.
*/
buf_len += 4;
/* Fill HI message header */
/* BH will add sequence number */
((__le16 *)buf->begin)[0] = __cpu_to_le16(buf_len);
((__le16 *)buf->begin)[1] = __cpu_to_le16(cmd);
spin_lock(&priv->wsm_cmd.lock);
BUG_ON(priv->wsm_cmd.ptr);
priv->wsm_cmd.ptr = buf->begin;
priv->wsm_cmd.len = buf_len;
priv->wsm_cmd.arg = arg;
priv->wsm_cmd.cmd = cmd;
spin_unlock(&priv->wsm_cmd.lock);
cw1200_bh_wakeup(priv);
/* Wait for command completion */
ret = wait_event_timeout(priv->wsm_cmd_wq,
priv->wsm_cmd.done, tmo);
if (!ret && !priv->wsm_cmd.done) {
spin_lock(&priv->wsm_cmd.lock);
priv->wsm_cmd.done = 1;
priv->wsm_cmd.ptr = NULL;
spin_unlock(&priv->wsm_cmd.lock);
if (priv->bh_error) {
/* Return ok to help system cleanup */
ret = 0;
} else {
pr_err("CMD req (0x%04x) stuck in firmware, killing BH\n", priv->wsm_cmd.cmd);
print_hex_dump_bytes("REQDUMP: ", DUMP_PREFIX_NONE,
buf->begin, buf_len);
pr_err("Outstanding outgoing frames: %d\n", priv->hw_bufs_used);
/* Kill BH thread to report the error to the top layer. */
atomic_add(1, &priv->bh_term);
wake_up(&priv->bh_wq);
ret = -ETIMEDOUT;
}
} else {
spin_lock(&priv->wsm_cmd.lock);
BUG_ON(!priv->wsm_cmd.done);
ret = priv->wsm_cmd.ret;
spin_unlock(&priv->wsm_cmd.lock);
}
done:
wsm_buf_reset(buf);
return ret;
}
/* ******************************************************************** */
/* WSM TX port control */
void wsm_lock_tx(struct cw1200_common *priv)
{
wsm_cmd_lock(priv);
if (atomic_add_return(1, &priv->tx_lock) == 1) {
if (wsm_flush_tx(priv))
pr_debug("[WSM] TX is locked.\n");
}
wsm_cmd_unlock(priv);
}
void wsm_lock_tx_async(struct cw1200_common *priv)
{
if (atomic_add_return(1, &priv->tx_lock) == 1)
pr_debug("[WSM] TX is locked (async).\n");
}
bool wsm_flush_tx(struct cw1200_common *priv)
{
unsigned long timestamp = jiffies;
bool pending = false;
long timeout;
int i;
/* Flush must be called with TX lock held. */
BUG_ON(!atomic_read(&priv->tx_lock));
/* First check if we really need to do something.
* It is safe to use unprotected access, as hw_bufs_used
* can only decrements.
*/
if (!priv->hw_bufs_used)
return true;
if (priv->bh_error) {
/* In case of failure do not wait for magic. */
pr_err("[WSM] Fatal error occurred, will not flush TX.\n");
return false;
} else {
/* Get a timestamp of "oldest" frame */
for (i = 0; i < 4; ++i)
pending |= cw1200_queue_get_xmit_timestamp(
&priv->tx_queue[i],
×tamp, 0xffffffff);
/* If there's nothing pending, we're good */
if (!pending)
return true;
timeout = timestamp + WSM_CMD_LAST_CHANCE_TIMEOUT - jiffies;
if (timeout < 0 || wait_event_timeout(priv->bh_evt_wq,
!priv->hw_bufs_used,
timeout) <= 0) {
/* Hmmm... Not good. Frame had stuck in firmware. */
priv->bh_error = 1;
wiphy_err(priv->hw->wiphy, "[WSM] TX Frames (%d) stuck in firmware, killing BH\n", priv->hw_bufs_used);
wake_up(&priv->bh_wq);
return false;
}
/* Ok, everything is flushed. */
return true;
}
}
void wsm_unlock_tx(struct cw1200_common *priv)
{
int tx_lock;
tx_lock = atomic_sub_return(1, &priv->tx_lock);
BUG_ON(tx_lock < 0);
if (tx_lock == 0) {
if (!priv->bh_error)
cw1200_bh_wakeup(priv);
pr_debug("[WSM] TX is unlocked.\n");
}
}
/* ******************************************************************** */
/* WSM RX */
int wsm_handle_exception(struct cw1200_common *priv, u8 *data, size_t len)
{
struct wsm_buf buf;
u32 reason;
u32 reg[18];
char fname[48];
unsigned int i;
static const char * const reason_str[] = {
"undefined instruction",
"prefetch abort",
"data abort",
"unknown error",
};
buf.begin = buf.data = data;
buf.end = &buf.begin[len];
reason = WSM_GET32(&buf);
for (i = 0; i < ARRAY_SIZE(reg); ++i)
reg[i] = WSM_GET32(&buf);
WSM_GET(&buf, fname, sizeof(fname));
if (reason < 4)
wiphy_err(priv->hw->wiphy,
"Firmware exception: %s.\n",
reason_str[reason]);
else
wiphy_err(priv->hw->wiphy,
"Firmware assert at %.*s, line %d\n",
(int) sizeof(fname), fname, reg[1]);
for (i = 0; i < 12; i += 4)
wiphy_err(priv->hw->wiphy,
"R%d: 0x%.8X, R%d: 0x%.8X, R%d: 0x%.8X, R%d: 0x%.8X,\n",
i + 0, reg[i + 0], i + 1, reg[i + 1],
i + 2, reg[i + 2], i + 3, reg[i + 3]);
wiphy_err(priv->hw->wiphy,
"R12: 0x%.8X, SP: 0x%.8X, LR: 0x%.8X, PC: 0x%.8X,\n",
reg[i + 0], reg[i + 1], reg[i + 2], reg[i + 3]);
i += 4;
wiphy_err(priv->hw->wiphy,
"CPSR: 0x%.8X, SPSR: 0x%.8X\n",
reg[i + 0], reg[i + 1]);
print_hex_dump_bytes("R1: ", DUMP_PREFIX_NONE,
fname, sizeof(fname));
return 0;
underflow:
wiphy_err(priv->hw->wiphy, "Firmware exception.\n");
print_hex_dump_bytes("Exception: ", DUMP_PREFIX_NONE,
data, len);
return -EINVAL;
}
int wsm_handle_rx(struct cw1200_common *priv, u16 id,
struct wsm_hdr *wsm, struct sk_buff **skb_p)
{
int ret = 0;
struct wsm_buf wsm_buf;
int link_id = (id >> 6) & 0x0F;
/* Strip link id. */
id &= ~WSM_TX_LINK_ID(WSM_TX_LINK_ID_MAX);
wsm_buf.begin = (u8 *)&wsm[0];
wsm_buf.data = (u8 *)&wsm[1];
wsm_buf.end = &wsm_buf.begin[__le16_to_cpu(wsm->len)];
pr_debug("[WSM] <<< 0x%.4X (%td)\n", id,
wsm_buf.end - wsm_buf.begin);
if (id == WSM_TX_CONFIRM_IND_ID) {
ret = wsm_tx_confirm(priv, &wsm_buf, link_id);
} else if (id == WSM_MULTI_TX_CONFIRM_ID) {
ret = wsm_multi_tx_confirm(priv, &wsm_buf, link_id);
} else if (id & 0x0400) {
void *wsm_arg;
u16 wsm_cmd;
/* Do not trust FW too much. Protection against repeated
* response and race condition removal (see above).
*/
spin_lock(&priv->wsm_cmd.lock);
wsm_arg = priv->wsm_cmd.arg;
wsm_cmd = priv->wsm_cmd.cmd &
~WSM_TX_LINK_ID(WSM_TX_LINK_ID_MAX);
priv->wsm_cmd.cmd = 0xFFFF;
spin_unlock(&priv->wsm_cmd.lock);
if (WARN_ON((id & ~0x0400) != wsm_cmd)) {
/* Note that any non-zero is a fatal retcode. */
ret = -EINVAL;
goto out;
}
/* Note that wsm_arg can be NULL in case of timeout in
* wsm_cmd_send().
*/
switch (id) {
case WSM_READ_MIB_RESP_ID:
if (wsm_arg)
ret = wsm_read_mib_confirm(priv, wsm_arg,
&wsm_buf);
break;
case WSM_WRITE_MIB_RESP_ID:
if (wsm_arg)
ret = wsm_write_mib_confirm(priv, wsm_arg,
&wsm_buf);
break;
case WSM_START_SCAN_RESP_ID:
if (wsm_arg)
ret = wsm_scan_started(priv, wsm_arg, &wsm_buf);
break;
case WSM_CONFIGURATION_RESP_ID:
if (wsm_arg)
ret = wsm_configuration_confirm(priv, wsm_arg,
&wsm_buf);
break;
case WSM_JOIN_RESP_ID:
if (wsm_arg)
ret = wsm_join_confirm(priv, wsm_arg, &wsm_buf);
break;
case WSM_STOP_SCAN_RESP_ID:
case WSM_RESET_RESP_ID:
case WSM_ADD_KEY_RESP_ID:
case WSM_REMOVE_KEY_RESP_ID:
case WSM_SET_PM_RESP_ID:
case WSM_SET_BSS_PARAMS_RESP_ID:
case 0x0412: /* set_tx_queue_params */
case WSM_EDCA_PARAMS_RESP_ID:
case WSM_SWITCH_CHANNEL_RESP_ID:
case WSM_START_RESP_ID:
case WSM_BEACON_TRANSMIT_RESP_ID:
case 0x0419: /* start_find */
case 0x041A: /* stop_find */
case 0x041B: /* update_ie */
case 0x041C: /* map_link */
WARN_ON(wsm_arg != NULL);
ret = wsm_generic_confirm(priv, wsm_arg, &wsm_buf);
if (ret) {
wiphy_warn(priv->hw->wiphy,
"wsm_generic_confirm failed for request 0x%04x.\n",
id & ~0x0400);
/* often 0x407 and 0x410 occur, this means we're dead.. */
if (priv->join_status >= CW1200_JOIN_STATUS_JOINING) {
wsm_lock_tx(priv);
if (queue_work(priv->workqueue, &priv->unjoin_work) <= 0)
wsm_unlock_tx(priv);
}
}
break;
default:
wiphy_warn(priv->hw->wiphy,
"Unrecognized confirmation 0x%04x\n",
id & ~0x0400);
}
spin_lock(&priv->wsm_cmd.lock);
priv->wsm_cmd.ret = ret;
priv->wsm_cmd.done = 1;
spin_unlock(&priv->wsm_cmd.lock);
ret = 0; /* Error response from device should ne stop BH. */
wake_up(&priv->wsm_cmd_wq);
} else if (id & 0x0800) {
switch (id) {
case WSM_STARTUP_IND_ID:
ret = wsm_startup_indication(priv, &wsm_buf);
break;
case WSM_RECEIVE_IND_ID:
ret = wsm_receive_indication(priv, link_id,
&wsm_buf, skb_p);
break;
case 0x0805:
ret = wsm_event_indication(priv, &wsm_buf);
break;
case WSM_SCAN_COMPLETE_IND_ID:
ret = wsm_scan_complete_indication(priv, &wsm_buf);
break;
case 0x0808:
ret = wsm_ba_timeout_indication(priv, &wsm_buf);
break;
case 0x0809:
ret = wsm_set_pm_indication(priv, &wsm_buf);
break;
case 0x080A:
ret = wsm_channel_switch_indication(priv, &wsm_buf);
break;
case 0x080B:
ret = wsm_find_complete_indication(priv, &wsm_buf);
break;
case 0x080C:
ret = wsm_suspend_resume_indication(priv,
link_id, &wsm_buf);
break;
case 0x080F:
ret = wsm_join_complete_indication(priv, &wsm_buf);
break;
default:
pr_warn("Unrecognised WSM ID %04x\n", id);
}
} else {
WARN_ON(1);
ret = -EINVAL;
}
out:
return ret;
}
static bool wsm_handle_tx_data(struct cw1200_common *priv,
struct wsm_tx *wsm,
const struct ieee80211_tx_info *tx_info,
const struct cw1200_txpriv *txpriv,
struct cw1200_queue *queue)
{
bool handled = false;
const struct ieee80211_hdr *frame =
(struct ieee80211_hdr *)&((u8 *)wsm)[txpriv->offset];
__le16 fctl = frame->frame_control;
enum {
do_probe,
do_drop,
do_wep,
do_tx,
} action = do_tx;
switch (priv->mode) {
case NL80211_IFTYPE_STATION:
if (priv->join_status == CW1200_JOIN_STATUS_MONITOR)
action = do_tx;
else if (priv->join_status < CW1200_JOIN_STATUS_PRE_STA)
action = do_drop;
break;
case NL80211_IFTYPE_AP:
if (!priv->join_status) {
action = do_drop;
} else if (!(BIT(txpriv->raw_link_id) &
(BIT(0) | priv->link_id_map))) {
wiphy_warn(priv->hw->wiphy,
"A frame with expired link id is dropped.\n");
action = do_drop;
}
if (cw1200_queue_get_generation(wsm->packet_id) >
CW1200_MAX_REQUEUE_ATTEMPTS) {
/* HACK!!! WSM324 firmware has tendency to requeue
* multicast frames in a loop, causing performance
* drop and high power consumption of the driver.
* In this situation it is better just to drop
* the problematic frame.
*/
wiphy_warn(priv->hw->wiphy,
"Too many attempts to requeue a frame; dropped.\n");
action = do_drop;
}
break;
case NL80211_IFTYPE_ADHOC:
if (priv->join_status != CW1200_JOIN_STATUS_IBSS)
action = do_drop;
break;
case NL80211_IFTYPE_MESH_POINT:
action = do_tx; /* TODO: Test me! */
break;
case NL80211_IFTYPE_MONITOR:
default:
action = do_drop;
break;
}
if (action == do_tx) {
if (ieee80211_is_nullfunc(fctl)) {
spin_lock(&priv->bss_loss_lock);
if (priv->bss_loss_state) {
priv->bss_loss_confirm_id = wsm->packet_id;
wsm->queue_id = WSM_QUEUE_VOICE;
}
spin_unlock(&priv->bss_loss_lock);
} else if (ieee80211_is_probe_req(fctl)) {
action = do_probe;
} else if (ieee80211_is_deauth(fctl) &&
priv->mode != NL80211_IFTYPE_AP) {
pr_debug("[WSM] Issue unjoin command due to tx deauth.\n");
wsm_lock_tx_async(priv);
if (queue_work(priv->workqueue,
&priv->unjoin_work) <= 0)
wsm_unlock_tx(priv);
} else if (ieee80211_has_protected(fctl) &&
tx_info->control.hw_key &&
tx_info->control.hw_key->keyidx != priv->wep_default_key_id &&
(tx_info->control.hw_key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
tx_info->control.hw_key->cipher == WLAN_CIPHER_SUITE_WEP104)) {
action = do_wep;
}
}
switch (action) {
case do_probe:
/* An interesting FW "feature". Device filters probe responses.
* The easiest way to get it back is to convert
* probe request into WSM start_scan command.
*/
pr_debug("[WSM] Convert probe request to scan.\n");
wsm_lock_tx_async(priv);
priv->pending_frame_id = wsm->packet_id;
if (queue_delayed_work(priv->workqueue,
&priv->scan.probe_work, 0) <= 0)
wsm_unlock_tx(priv);
handled = true;
break;
case do_drop:
pr_debug("[WSM] Drop frame (0x%.4X).\n", fctl);
BUG_ON(cw1200_queue_remove(queue, wsm->packet_id));
handled = true;
break;
case do_wep:
pr_debug("[WSM] Issue set_default_wep_key.\n");
wsm_lock_tx_async(priv);
priv->wep_default_key_id = tx_info->control.hw_key->keyidx;
priv->pending_frame_id = wsm->packet_id;
if (queue_work(priv->workqueue, &priv->wep_key_work) <= 0)
wsm_unlock_tx(priv);
handled = true;
break;
case do_tx:
pr_debug("[WSM] Transmit frame.\n");
break;
default:
/* Do nothing */
break;
}
return handled;
}
static int cw1200_get_prio_queue(struct cw1200_common *priv,
u32 link_id_map, int *total)
{
static const int urgent = BIT(CW1200_LINK_ID_AFTER_DTIM) |
BIT(CW1200_LINK_ID_UAPSD);
struct wsm_edca_queue_params *edca;
unsigned score, best = -1;
int winner = -1;
int queued;
int i;
/* search for a winner using edca params */
for (i = 0; i < 4; ++i) {
queued = cw1200_queue_get_num_queued(&priv->tx_queue[i],
link_id_map);
if (!queued)
continue;
*total += queued;
edca = &priv->edca.params[i];
score = ((edca->aifns + edca->cwmin) << 16) +
((edca->cwmax - edca->cwmin) *
(get_random_int() & 0xFFFF));
if (score < best && (winner < 0 || i != 3)) {
best = score;
winner = i;
}
}
/* override winner if bursting */
if (winner >= 0 && priv->tx_burst_idx >= 0 &&
winner != priv->tx_burst_idx &&
!cw1200_queue_get_num_queued(
&priv->tx_queue[winner],
link_id_map & urgent) &&
cw1200_queue_get_num_queued(
&priv->tx_queue[priv->tx_burst_idx],
link_id_map))
winner = priv->tx_burst_idx;
return winner;
}
static int wsm_get_tx_queue_and_mask(struct cw1200_common *priv,
struct cw1200_queue **queue_p,
u32 *tx_allowed_mask_p,
bool *more)
{
int idx;
u32 tx_allowed_mask;
int total = 0;
/* Search for a queue with multicast frames buffered */
if (priv->tx_multicast) {
tx_allowed_mask = BIT(CW1200_LINK_ID_AFTER_DTIM);
idx = cw1200_get_prio_queue(priv,
tx_allowed_mask, &total);
if (idx >= 0) {
*more = total > 1;
goto found;
}
}
/* Search for unicast traffic */
tx_allowed_mask = ~priv->sta_asleep_mask;
tx_allowed_mask |= BIT(CW1200_LINK_ID_UAPSD);
if (priv->sta_asleep_mask) {
tx_allowed_mask |= priv->pspoll_mask;
tx_allowed_mask &= ~BIT(CW1200_LINK_ID_AFTER_DTIM);
} else {
tx_allowed_mask |= BIT(CW1200_LINK_ID_AFTER_DTIM);
}
idx = cw1200_get_prio_queue(priv,
tx_allowed_mask, &total);
if (idx < 0)
return -ENOENT;
found:
*queue_p = &priv->tx_queue[idx];
*tx_allowed_mask_p = tx_allowed_mask;
return 0;
}
int wsm_get_tx(struct cw1200_common *priv, u8 **data,
size_t *tx_len, int *burst)
{
struct wsm_tx *wsm = NULL;
struct ieee80211_tx_info *tx_info;
struct cw1200_queue *queue = NULL;
int queue_num;
u32 tx_allowed_mask = 0;
const struct cw1200_txpriv *txpriv = NULL;
int count = 0;
/* More is used only for broadcasts. */
bool more = false;
if (priv->wsm_cmd.ptr) { /* CMD request */
++count;
spin_lock(&priv->wsm_cmd.lock);
BUG_ON(!priv->wsm_cmd.ptr);
*data = priv->wsm_cmd.ptr;
*tx_len = priv->wsm_cmd.len;
*burst = 1;
spin_unlock(&priv->wsm_cmd.lock);
} else {
for (;;) {
int ret;
if (atomic_add_return(0, &priv->tx_lock))
break;
spin_lock_bh(&priv->ps_state_lock);
ret = wsm_get_tx_queue_and_mask(priv, &queue,
&tx_allowed_mask, &more);
queue_num = queue - priv->tx_queue;
if (priv->buffered_multicasts &&
(ret || !more) &&
(priv->tx_multicast || !priv->sta_asleep_mask)) {
priv->buffered_multicasts = false;
if (priv->tx_multicast) {
priv->tx_multicast = false;
queue_work(priv->workqueue,
&priv->multicast_stop_work);
}
}
spin_unlock_bh(&priv->ps_state_lock);
if (ret)
break;
if (cw1200_queue_get(queue,
tx_allowed_mask,
&wsm, &tx_info, &txpriv))
continue;
if (wsm_handle_tx_data(priv, wsm,
tx_info, txpriv, queue))
continue; /* Handled by WSM */
wsm->hdr.id &= __cpu_to_le16(
~WSM_TX_LINK_ID(WSM_TX_LINK_ID_MAX));
wsm->hdr.id |= cpu_to_le16(
WSM_TX_LINK_ID(txpriv->raw_link_id));
priv->pspoll_mask &= ~BIT(txpriv->raw_link_id);
*data = (u8 *)wsm;
*tx_len = __le16_to_cpu(wsm->hdr.len);
/* allow bursting if txop is set */
if (priv->edca.params[queue_num].txop_limit)
*burst = min(*burst,
(int)cw1200_queue_get_num_queued(queue, tx_allowed_mask) + 1);
else
*burst = 1;
/* store index of bursting queue */
if (*burst > 1)
priv->tx_burst_idx = queue_num;
else
priv->tx_burst_idx = -1;
if (more) {
struct ieee80211_hdr *hdr =
(struct ieee80211_hdr *)
&((u8 *)wsm)[txpriv->offset];
/* more buffered multicast/broadcast frames
* ==> set MoreData flag in IEEE 802.11 header
* to inform PS STAs
*/
hdr->frame_control |=
cpu_to_le16(IEEE80211_FCTL_MOREDATA);
}
pr_debug("[WSM] >>> 0x%.4X (%zu) %p %c\n",
0x0004, *tx_len, *data,
wsm->more ? 'M' : ' ');
++count;
break;
}
}
return count;
}
void wsm_txed(struct cw1200_common *priv, u8 *data)
{
if (data == priv->wsm_cmd.ptr) {
spin_lock(&priv->wsm_cmd.lock);
priv->wsm_cmd.ptr = NULL;
spin_unlock(&priv->wsm_cmd.lock);
}
}
/* ******************************************************************** */
/* WSM buffer */
void wsm_buf_init(struct wsm_buf *buf)
{
BUG_ON(buf->begin);
buf->begin = kmalloc(FWLOAD_BLOCK_SIZE, GFP_KERNEL | GFP_DMA);
buf->end = buf->begin ? &buf->begin[FWLOAD_BLOCK_SIZE] : buf->begin;
wsm_buf_reset(buf);
}
void wsm_buf_deinit(struct wsm_buf *buf)
{
kfree(buf->begin);
buf->begin = buf->data = buf->end = NULL;
}
static void wsm_buf_reset(struct wsm_buf *buf)
{
if (buf->begin) {
buf->data = &buf->begin[4];
*(u32 *)buf->begin = 0;
} else {
buf->data = buf->begin;
}
}
static int wsm_buf_reserve(struct wsm_buf *buf, size_t extra_size)
{
size_t pos = buf->data - buf->begin;
size_t size = pos + extra_size;
size = round_up(size, FWLOAD_BLOCK_SIZE);
buf->begin = krealloc(buf->begin, size, GFP_KERNEL | GFP_DMA);
if (buf->begin) {
buf->data = &buf->begin[pos];
buf->end = &buf->begin[size];
return 0;
} else {
buf->end = buf->data = buf->begin;
return -ENOMEM;
}
}
| gpl-2.0 |
hastalafiesta/HKernel | drivers/mfd/wm8350-irq.c | 2537 | 14458 | /*
* wm8350-irq.c -- IRQ support for Wolfson WM8350
*
* Copyright 2007, 2008, 2009 Wolfson Microelectronics PLC.
*
* Author: Liam Girdwood, Mark Brown
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/bug.h>
#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/mfd/wm8350/core.h>
#include <linux/mfd/wm8350/audio.h>
#include <linux/mfd/wm8350/comparator.h>
#include <linux/mfd/wm8350/gpio.h>
#include <linux/mfd/wm8350/pmic.h>
#include <linux/mfd/wm8350/rtc.h>
#include <linux/mfd/wm8350/supply.h>
#include <linux/mfd/wm8350/wdt.h>
#define WM8350_INT_OFFSET_1 0
#define WM8350_INT_OFFSET_2 1
#define WM8350_POWER_UP_INT_OFFSET 2
#define WM8350_UNDER_VOLTAGE_INT_OFFSET 3
#define WM8350_OVER_CURRENT_INT_OFFSET 4
#define WM8350_GPIO_INT_OFFSET 5
#define WM8350_COMPARATOR_INT_OFFSET 6
struct wm8350_irq_data {
int primary;
int reg;
int mask;
int primary_only;
};
static struct wm8350_irq_data wm8350_irqs[] = {
[WM8350_IRQ_OC_LS] = {
.primary = WM8350_OC_INT,
.reg = WM8350_OVER_CURRENT_INT_OFFSET,
.mask = WM8350_OC_LS_EINT,
.primary_only = 1,
},
[WM8350_IRQ_UV_DC1] = {
.primary = WM8350_UV_INT,
.reg = WM8350_UNDER_VOLTAGE_INT_OFFSET,
.mask = WM8350_UV_DC1_EINT,
},
[WM8350_IRQ_UV_DC2] = {
.primary = WM8350_UV_INT,
.reg = WM8350_UNDER_VOLTAGE_INT_OFFSET,
.mask = WM8350_UV_DC2_EINT,
},
[WM8350_IRQ_UV_DC3] = {
.primary = WM8350_UV_INT,
.reg = WM8350_UNDER_VOLTAGE_INT_OFFSET,
.mask = WM8350_UV_DC3_EINT,
},
[WM8350_IRQ_UV_DC4] = {
.primary = WM8350_UV_INT,
.reg = WM8350_UNDER_VOLTAGE_INT_OFFSET,
.mask = WM8350_UV_DC4_EINT,
},
[WM8350_IRQ_UV_DC5] = {
.primary = WM8350_UV_INT,
.reg = WM8350_UNDER_VOLTAGE_INT_OFFSET,
.mask = WM8350_UV_DC5_EINT,
},
[WM8350_IRQ_UV_DC6] = {
.primary = WM8350_UV_INT,
.reg = WM8350_UNDER_VOLTAGE_INT_OFFSET,
.mask = WM8350_UV_DC6_EINT,
},
[WM8350_IRQ_UV_LDO1] = {
.primary = WM8350_UV_INT,
.reg = WM8350_UNDER_VOLTAGE_INT_OFFSET,
.mask = WM8350_UV_LDO1_EINT,
},
[WM8350_IRQ_UV_LDO2] = {
.primary = WM8350_UV_INT,
.reg = WM8350_UNDER_VOLTAGE_INT_OFFSET,
.mask = WM8350_UV_LDO2_EINT,
},
[WM8350_IRQ_UV_LDO3] = {
.primary = WM8350_UV_INT,
.reg = WM8350_UNDER_VOLTAGE_INT_OFFSET,
.mask = WM8350_UV_LDO3_EINT,
},
[WM8350_IRQ_UV_LDO4] = {
.primary = WM8350_UV_INT,
.reg = WM8350_UNDER_VOLTAGE_INT_OFFSET,
.mask = WM8350_UV_LDO4_EINT,
},
[WM8350_IRQ_CHG_BAT_HOT] = {
.primary = WM8350_CHG_INT,
.reg = WM8350_INT_OFFSET_1,
.mask = WM8350_CHG_BAT_HOT_EINT,
},
[WM8350_IRQ_CHG_BAT_COLD] = {
.primary = WM8350_CHG_INT,
.reg = WM8350_INT_OFFSET_1,
.mask = WM8350_CHG_BAT_COLD_EINT,
},
[WM8350_IRQ_CHG_BAT_FAIL] = {
.primary = WM8350_CHG_INT,
.reg = WM8350_INT_OFFSET_1,
.mask = WM8350_CHG_BAT_FAIL_EINT,
},
[WM8350_IRQ_CHG_TO] = {
.primary = WM8350_CHG_INT,
.reg = WM8350_INT_OFFSET_1,
.mask = WM8350_CHG_TO_EINT,
},
[WM8350_IRQ_CHG_END] = {
.primary = WM8350_CHG_INT,
.reg = WM8350_INT_OFFSET_1,
.mask = WM8350_CHG_END_EINT,
},
[WM8350_IRQ_CHG_START] = {
.primary = WM8350_CHG_INT,
.reg = WM8350_INT_OFFSET_1,
.mask = WM8350_CHG_START_EINT,
},
[WM8350_IRQ_CHG_FAST_RDY] = {
.primary = WM8350_CHG_INT,
.reg = WM8350_INT_OFFSET_1,
.mask = WM8350_CHG_FAST_RDY_EINT,
},
[WM8350_IRQ_CHG_VBATT_LT_3P9] = {
.primary = WM8350_CHG_INT,
.reg = WM8350_INT_OFFSET_1,
.mask = WM8350_CHG_VBATT_LT_3P9_EINT,
},
[WM8350_IRQ_CHG_VBATT_LT_3P1] = {
.primary = WM8350_CHG_INT,
.reg = WM8350_INT_OFFSET_1,
.mask = WM8350_CHG_VBATT_LT_3P1_EINT,
},
[WM8350_IRQ_CHG_VBATT_LT_2P85] = {
.primary = WM8350_CHG_INT,
.reg = WM8350_INT_OFFSET_1,
.mask = WM8350_CHG_VBATT_LT_2P85_EINT,
},
[WM8350_IRQ_RTC_ALM] = {
.primary = WM8350_RTC_INT,
.reg = WM8350_INT_OFFSET_1,
.mask = WM8350_RTC_ALM_EINT,
},
[WM8350_IRQ_RTC_SEC] = {
.primary = WM8350_RTC_INT,
.reg = WM8350_INT_OFFSET_1,
.mask = WM8350_RTC_SEC_EINT,
},
[WM8350_IRQ_RTC_PER] = {
.primary = WM8350_RTC_INT,
.reg = WM8350_INT_OFFSET_1,
.mask = WM8350_RTC_PER_EINT,
},
[WM8350_IRQ_CS1] = {
.primary = WM8350_CS_INT,
.reg = WM8350_INT_OFFSET_2,
.mask = WM8350_CS1_EINT,
},
[WM8350_IRQ_CS2] = {
.primary = WM8350_CS_INT,
.reg = WM8350_INT_OFFSET_2,
.mask = WM8350_CS2_EINT,
},
[WM8350_IRQ_SYS_HYST_COMP_FAIL] = {
.primary = WM8350_SYS_INT,
.reg = WM8350_INT_OFFSET_2,
.mask = WM8350_SYS_HYST_COMP_FAIL_EINT,
},
[WM8350_IRQ_SYS_CHIP_GT115] = {
.primary = WM8350_SYS_INT,
.reg = WM8350_INT_OFFSET_2,
.mask = WM8350_SYS_CHIP_GT115_EINT,
},
[WM8350_IRQ_SYS_CHIP_GT140] = {
.primary = WM8350_SYS_INT,
.reg = WM8350_INT_OFFSET_2,
.mask = WM8350_SYS_CHIP_GT140_EINT,
},
[WM8350_IRQ_SYS_WDOG_TO] = {
.primary = WM8350_SYS_INT,
.reg = WM8350_INT_OFFSET_2,
.mask = WM8350_SYS_WDOG_TO_EINT,
},
[WM8350_IRQ_AUXADC_DATARDY] = {
.primary = WM8350_AUXADC_INT,
.reg = WM8350_INT_OFFSET_2,
.mask = WM8350_AUXADC_DATARDY_EINT,
},
[WM8350_IRQ_AUXADC_DCOMP4] = {
.primary = WM8350_AUXADC_INT,
.reg = WM8350_INT_OFFSET_2,
.mask = WM8350_AUXADC_DCOMP4_EINT,
},
[WM8350_IRQ_AUXADC_DCOMP3] = {
.primary = WM8350_AUXADC_INT,
.reg = WM8350_INT_OFFSET_2,
.mask = WM8350_AUXADC_DCOMP3_EINT,
},
[WM8350_IRQ_AUXADC_DCOMP2] = {
.primary = WM8350_AUXADC_INT,
.reg = WM8350_INT_OFFSET_2,
.mask = WM8350_AUXADC_DCOMP2_EINT,
},
[WM8350_IRQ_AUXADC_DCOMP1] = {
.primary = WM8350_AUXADC_INT,
.reg = WM8350_INT_OFFSET_2,
.mask = WM8350_AUXADC_DCOMP1_EINT,
},
[WM8350_IRQ_USB_LIMIT] = {
.primary = WM8350_USB_INT,
.reg = WM8350_INT_OFFSET_2,
.mask = WM8350_USB_LIMIT_EINT,
.primary_only = 1,
},
[WM8350_IRQ_WKUP_OFF_STATE] = {
.primary = WM8350_WKUP_INT,
.reg = WM8350_COMPARATOR_INT_OFFSET,
.mask = WM8350_WKUP_OFF_STATE_EINT,
},
[WM8350_IRQ_WKUP_HIB_STATE] = {
.primary = WM8350_WKUP_INT,
.reg = WM8350_COMPARATOR_INT_OFFSET,
.mask = WM8350_WKUP_HIB_STATE_EINT,
},
[WM8350_IRQ_WKUP_CONV_FAULT] = {
.primary = WM8350_WKUP_INT,
.reg = WM8350_COMPARATOR_INT_OFFSET,
.mask = WM8350_WKUP_CONV_FAULT_EINT,
},
[WM8350_IRQ_WKUP_WDOG_RST] = {
.primary = WM8350_WKUP_INT,
.reg = WM8350_COMPARATOR_INT_OFFSET,
.mask = WM8350_WKUP_WDOG_RST_EINT,
},
[WM8350_IRQ_WKUP_GP_PWR_ON] = {
.primary = WM8350_WKUP_INT,
.reg = WM8350_COMPARATOR_INT_OFFSET,
.mask = WM8350_WKUP_GP_PWR_ON_EINT,
},
[WM8350_IRQ_WKUP_ONKEY] = {
.primary = WM8350_WKUP_INT,
.reg = WM8350_COMPARATOR_INT_OFFSET,
.mask = WM8350_WKUP_ONKEY_EINT,
},
[WM8350_IRQ_WKUP_GP_WAKEUP] = {
.primary = WM8350_WKUP_INT,
.reg = WM8350_COMPARATOR_INT_OFFSET,
.mask = WM8350_WKUP_GP_WAKEUP_EINT,
},
[WM8350_IRQ_CODEC_JCK_DET_L] = {
.primary = WM8350_CODEC_INT,
.reg = WM8350_COMPARATOR_INT_OFFSET,
.mask = WM8350_CODEC_JCK_DET_L_EINT,
},
[WM8350_IRQ_CODEC_JCK_DET_R] = {
.primary = WM8350_CODEC_INT,
.reg = WM8350_COMPARATOR_INT_OFFSET,
.mask = WM8350_CODEC_JCK_DET_R_EINT,
},
[WM8350_IRQ_CODEC_MICSCD] = {
.primary = WM8350_CODEC_INT,
.reg = WM8350_COMPARATOR_INT_OFFSET,
.mask = WM8350_CODEC_MICSCD_EINT,
},
[WM8350_IRQ_CODEC_MICD] = {
.primary = WM8350_CODEC_INT,
.reg = WM8350_COMPARATOR_INT_OFFSET,
.mask = WM8350_CODEC_MICD_EINT,
},
[WM8350_IRQ_EXT_USB_FB] = {
.primary = WM8350_EXT_INT,
.reg = WM8350_COMPARATOR_INT_OFFSET,
.mask = WM8350_EXT_USB_FB_EINT,
},
[WM8350_IRQ_EXT_WALL_FB] = {
.primary = WM8350_EXT_INT,
.reg = WM8350_COMPARATOR_INT_OFFSET,
.mask = WM8350_EXT_WALL_FB_EINT,
},
[WM8350_IRQ_EXT_BAT_FB] = {
.primary = WM8350_EXT_INT,
.reg = WM8350_COMPARATOR_INT_OFFSET,
.mask = WM8350_EXT_BAT_FB_EINT,
},
[WM8350_IRQ_GPIO(0)] = {
.primary = WM8350_GP_INT,
.reg = WM8350_GPIO_INT_OFFSET,
.mask = WM8350_GP0_EINT,
},
[WM8350_IRQ_GPIO(1)] = {
.primary = WM8350_GP_INT,
.reg = WM8350_GPIO_INT_OFFSET,
.mask = WM8350_GP1_EINT,
},
[WM8350_IRQ_GPIO(2)] = {
.primary = WM8350_GP_INT,
.reg = WM8350_GPIO_INT_OFFSET,
.mask = WM8350_GP2_EINT,
},
[WM8350_IRQ_GPIO(3)] = {
.primary = WM8350_GP_INT,
.reg = WM8350_GPIO_INT_OFFSET,
.mask = WM8350_GP3_EINT,
},
[WM8350_IRQ_GPIO(4)] = {
.primary = WM8350_GP_INT,
.reg = WM8350_GPIO_INT_OFFSET,
.mask = WM8350_GP4_EINT,
},
[WM8350_IRQ_GPIO(5)] = {
.primary = WM8350_GP_INT,
.reg = WM8350_GPIO_INT_OFFSET,
.mask = WM8350_GP5_EINT,
},
[WM8350_IRQ_GPIO(6)] = {
.primary = WM8350_GP_INT,
.reg = WM8350_GPIO_INT_OFFSET,
.mask = WM8350_GP6_EINT,
},
[WM8350_IRQ_GPIO(7)] = {
.primary = WM8350_GP_INT,
.reg = WM8350_GPIO_INT_OFFSET,
.mask = WM8350_GP7_EINT,
},
[WM8350_IRQ_GPIO(8)] = {
.primary = WM8350_GP_INT,
.reg = WM8350_GPIO_INT_OFFSET,
.mask = WM8350_GP8_EINT,
},
[WM8350_IRQ_GPIO(9)] = {
.primary = WM8350_GP_INT,
.reg = WM8350_GPIO_INT_OFFSET,
.mask = WM8350_GP9_EINT,
},
[WM8350_IRQ_GPIO(10)] = {
.primary = WM8350_GP_INT,
.reg = WM8350_GPIO_INT_OFFSET,
.mask = WM8350_GP10_EINT,
},
[WM8350_IRQ_GPIO(11)] = {
.primary = WM8350_GP_INT,
.reg = WM8350_GPIO_INT_OFFSET,
.mask = WM8350_GP11_EINT,
},
[WM8350_IRQ_GPIO(12)] = {
.primary = WM8350_GP_INT,
.reg = WM8350_GPIO_INT_OFFSET,
.mask = WM8350_GP12_EINT,
},
};
static inline struct wm8350_irq_data *irq_to_wm8350_irq(struct wm8350 *wm8350,
int irq)
{
return &wm8350_irqs[irq - wm8350->irq_base];
}
/*
* This is a threaded IRQ handler so can access I2C/SPI. Since all
* interrupts are clear on read the IRQ line will be reasserted and
* the physical IRQ will be handled again if another interrupt is
* asserted while we run - in the normal course of events this is a
* rare occurrence so we save I2C/SPI reads. We're also assuming that
* it's rare to get lots of interrupts firing simultaneously so try to
* minimise I/O.
*/
static irqreturn_t wm8350_irq(int irq, void *irq_data)
{
struct wm8350 *wm8350 = irq_data;
u16 level_one;
u16 sub_reg[WM8350_NUM_IRQ_REGS];
int read_done[WM8350_NUM_IRQ_REGS];
struct wm8350_irq_data *data;
int i;
level_one = wm8350_reg_read(wm8350, WM8350_SYSTEM_INTERRUPTS)
& ~wm8350_reg_read(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK);
if (!level_one)
return IRQ_NONE;
memset(&read_done, 0, sizeof(read_done));
for (i = 0; i < ARRAY_SIZE(wm8350_irqs); i++) {
data = &wm8350_irqs[i];
if (!(level_one & data->primary))
continue;
if (!read_done[data->reg]) {
sub_reg[data->reg] =
wm8350_reg_read(wm8350, WM8350_INT_STATUS_1 +
data->reg);
sub_reg[data->reg] &= ~wm8350->irq_masks[data->reg];
read_done[data->reg] = 1;
}
if (sub_reg[data->reg] & data->mask)
handle_nested_irq(wm8350->irq_base + i);
}
return IRQ_HANDLED;
}
static void wm8350_irq_lock(struct irq_data *data)
{
struct wm8350 *wm8350 = irq_data_get_irq_chip_data(data);
mutex_lock(&wm8350->irq_lock);
}
static void wm8350_irq_sync_unlock(struct irq_data *data)
{
struct wm8350 *wm8350 = irq_data_get_irq_chip_data(data);
int i;
for (i = 0; i < ARRAY_SIZE(wm8350->irq_masks); i++) {
/* If there's been a change in the mask write it back
* to the hardware. */
if (wm8350->irq_masks[i] !=
wm8350->reg_cache[WM8350_INT_STATUS_1_MASK + i])
WARN_ON(wm8350_reg_write(wm8350,
WM8350_INT_STATUS_1_MASK + i,
wm8350->irq_masks[i]));
}
mutex_unlock(&wm8350->irq_lock);
}
static void wm8350_irq_enable(struct irq_data *data)
{
struct wm8350 *wm8350 = irq_data_get_irq_chip_data(data);
struct wm8350_irq_data *irq_data = irq_to_wm8350_irq(wm8350,
data->irq);
wm8350->irq_masks[irq_data->reg] &= ~irq_data->mask;
}
static void wm8350_irq_disable(struct irq_data *data)
{
struct wm8350 *wm8350 = irq_data_get_irq_chip_data(data);
struct wm8350_irq_data *irq_data = irq_to_wm8350_irq(wm8350,
data->irq);
wm8350->irq_masks[irq_data->reg] |= irq_data->mask;
}
static struct irq_chip wm8350_irq_chip = {
.name = "wm8350",
.irq_bus_lock = wm8350_irq_lock,
.irq_bus_sync_unlock = wm8350_irq_sync_unlock,
.irq_disable = wm8350_irq_disable,
.irq_enable = wm8350_irq_enable,
};
int wm8350_irq_init(struct wm8350 *wm8350, int irq,
struct wm8350_platform_data *pdata)
{
int ret, cur_irq, i;
int flags = IRQF_ONESHOT;
if (!irq) {
dev_warn(wm8350->dev, "No interrupt support, no core IRQ\n");
return 0;
}
if (!pdata || !pdata->irq_base) {
dev_warn(wm8350->dev, "No interrupt support, no IRQ base\n");
return 0;
}
/* Mask top level interrupts */
wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0xFFFF);
/* Mask all individual interrupts by default and cache the
* masks. We read the masks back since there are unwritable
* bits in the mask registers. */
for (i = 0; i < ARRAY_SIZE(wm8350->irq_masks); i++) {
wm8350_reg_write(wm8350, WM8350_INT_STATUS_1_MASK + i,
0xFFFF);
wm8350->irq_masks[i] =
wm8350_reg_read(wm8350,
WM8350_INT_STATUS_1_MASK + i);
}
mutex_init(&wm8350->irq_lock);
wm8350->chip_irq = irq;
wm8350->irq_base = pdata->irq_base;
if (pdata->irq_high) {
flags |= IRQF_TRIGGER_HIGH;
wm8350_set_bits(wm8350, WM8350_SYSTEM_CONTROL_1,
WM8350_IRQ_POL);
} else {
flags |= IRQF_TRIGGER_LOW;
wm8350_clear_bits(wm8350, WM8350_SYSTEM_CONTROL_1,
WM8350_IRQ_POL);
}
/* Register with genirq */
for (cur_irq = wm8350->irq_base;
cur_irq < ARRAY_SIZE(wm8350_irqs) + wm8350->irq_base;
cur_irq++) {
irq_set_chip_data(cur_irq, wm8350);
irq_set_chip_and_handler(cur_irq, &wm8350_irq_chip,
handle_edge_irq);
irq_set_nested_thread(cur_irq, 1);
/* ARM needs us to explicitly flag the IRQ as valid
* and will set them noprobe when we do so. */
#ifdef CONFIG_ARM
set_irq_flags(cur_irq, IRQF_VALID);
#else
irq_set_noprobe(cur_irq);
#endif
}
ret = request_threaded_irq(irq, NULL, wm8350_irq, flags,
"wm8350", wm8350);
if (ret != 0)
dev_err(wm8350->dev, "Failed to request IRQ: %d\n", ret);
/* Allow interrupts to fire */
wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0);
return ret;
}
int wm8350_irq_exit(struct wm8350 *wm8350)
{
free_irq(wm8350->chip_irq, wm8350);
return 0;
}
| gpl-2.0 |
Lehkeda/android_kernel_samsung_mint2g | drivers/mfd/lpc_sch.c | 2537 | 3701 | /*
* lpc_sch.c - LPC interface for Intel Poulsbo SCH
*
* LPC bridge function of the Intel SCH contains many other
* functional units, such as Interrupt controllers, Timers,
* Power Management, System Management, GPIO, RTC, and LPC
* Configuration Registers.
*
* Copyright (c) 2010 CompuLab Ltd
* Author: Denis Turischev <denis@compulab.co.il>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License 2 as published
* by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; see the file COPYING. If not, write to
* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/acpi.h>
#include <linux/pci.h>
#include <linux/mfd/core.h>
#define SMBASE 0x40
#define SMBUS_IO_SIZE 64
#define GPIOBASE 0x44
#define GPIO_IO_SIZE 64
static struct resource smbus_sch_resource = {
.flags = IORESOURCE_IO,
};
static struct resource gpio_sch_resource = {
.flags = IORESOURCE_IO,
};
static struct mfd_cell lpc_sch_cells[] = {
{
.name = "isch_smbus",
.num_resources = 1,
.resources = &smbus_sch_resource,
},
{
.name = "sch_gpio",
.num_resources = 1,
.resources = &gpio_sch_resource,
},
};
static struct pci_device_id lpc_sch_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC) },
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC) },
{ 0, }
};
MODULE_DEVICE_TABLE(pci, lpc_sch_ids);
static int __devinit lpc_sch_probe(struct pci_dev *dev,
const struct pci_device_id *id)
{
unsigned int base_addr_cfg;
unsigned short base_addr;
int i;
pci_read_config_dword(dev, SMBASE, &base_addr_cfg);
if (!(base_addr_cfg & (1 << 31))) {
dev_err(&dev->dev, "Decode of the SMBus I/O range disabled\n");
return -ENODEV;
}
base_addr = (unsigned short)base_addr_cfg;
if (base_addr == 0) {
dev_err(&dev->dev, "I/O space for SMBus uninitialized\n");
return -ENODEV;
}
smbus_sch_resource.start = base_addr;
smbus_sch_resource.end = base_addr + SMBUS_IO_SIZE - 1;
pci_read_config_dword(dev, GPIOBASE, &base_addr_cfg);
if (!(base_addr_cfg & (1 << 31))) {
dev_err(&dev->dev, "Decode of the GPIO I/O range disabled\n");
return -ENODEV;
}
base_addr = (unsigned short)base_addr_cfg;
if (base_addr == 0) {
dev_err(&dev->dev, "I/O space for GPIO uninitialized\n");
return -ENODEV;
}
gpio_sch_resource.start = base_addr;
gpio_sch_resource.end = base_addr + GPIO_IO_SIZE - 1;
for (i=0; i < ARRAY_SIZE(lpc_sch_cells); i++)
lpc_sch_cells[i].id = id->device;
return mfd_add_devices(&dev->dev, 0,
lpc_sch_cells, ARRAY_SIZE(lpc_sch_cells), NULL, 0);
}
static void __devexit lpc_sch_remove(struct pci_dev *dev)
{
mfd_remove_devices(&dev->dev);
}
static struct pci_driver lpc_sch_driver = {
.name = "lpc_sch",
.id_table = lpc_sch_ids,
.probe = lpc_sch_probe,
.remove = __devexit_p(lpc_sch_remove),
};
static int __init lpc_sch_init(void)
{
return pci_register_driver(&lpc_sch_driver);
}
static void __exit lpc_sch_exit(void)
{
pci_unregister_driver(&lpc_sch_driver);
}
module_init(lpc_sch_init);
module_exit(lpc_sch_exit);
MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
MODULE_DESCRIPTION("LPC interface for Intel Poulsbo SCH");
MODULE_LICENSE("GPL");
| gpl-2.0 |
Team-Hydra/S5-AEL-Kernel | drivers/mtd/ubi/misc.c | 4585 | 3577 | /*
* Copyright (c) International Business Machines Corp., 2006
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
* the GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* Author: Artem Bityutskiy (Битюцкий Артём)
*/
/* Here we keep miscellaneous functions which are used all over the UBI code */
#include "ubi.h"
/**
* calc_data_len - calculate how much real data is stored in a buffer.
* @ubi: UBI device description object
* @buf: a buffer with the contents of the physical eraseblock
* @length: the buffer length
*
* This function calculates how much "real data" is stored in @buf and returnes
* the length. Continuous 0xFF bytes at the end of the buffer are not
* considered as "real data".
*/
int ubi_calc_data_len(const struct ubi_device *ubi, const void *buf,
int length)
{
int i;
ubi_assert(!(length & (ubi->min_io_size - 1)));
for (i = length - 1; i >= 0; i--)
if (((const uint8_t *)buf)[i] != 0xFF)
break;
/* The resulting length must be aligned to the minimum flash I/O size */
length = ALIGN(i + 1, ubi->min_io_size);
return length;
}
/**
* ubi_check_volume - check the contents of a static volume.
* @ubi: UBI device description object
* @vol_id: ID of the volume to check
*
* This function checks if static volume @vol_id is corrupted by fully reading
* it and checking data CRC. This function returns %0 if the volume is not
* corrupted, %1 if it is corrupted and a negative error code in case of
* failure. Dynamic volumes are not checked and zero is returned immediately.
*/
int ubi_check_volume(struct ubi_device *ubi, int vol_id)
{
void *buf;
int err = 0, i;
struct ubi_volume *vol = ubi->volumes[vol_id];
if (vol->vol_type != UBI_STATIC_VOLUME)
return 0;
buf = vmalloc(vol->usable_leb_size);
if (!buf)
return -ENOMEM;
for (i = 0; i < vol->used_ebs; i++) {
int size;
if (i == vol->used_ebs - 1)
size = vol->last_eb_bytes;
else
size = vol->usable_leb_size;
err = ubi_eba_read_leb(ubi, vol, i, buf, 0, size, 1);
if (err) {
if (mtd_is_eccerr(err))
err = 1;
break;
}
}
vfree(buf);
return err;
}
/**
* ubi_calculate_rsvd_pool - calculate how many PEBs must be reserved for bad
* eraseblock handling.
* @ubi: UBI device description object
*/
void ubi_calculate_reserved(struct ubi_device *ubi)
{
ubi->beb_rsvd_level = ubi->good_peb_count/100;
ubi->beb_rsvd_level *= CONFIG_MTD_UBI_BEB_RESERVE;
if (ubi->beb_rsvd_level < MIN_RESEVED_PEBS)
ubi->beb_rsvd_level = MIN_RESEVED_PEBS;
}
/**
* ubi_check_pattern - check if buffer contains only a certain byte pattern.
* @buf: buffer to check
* @patt: the pattern to check
* @size: buffer size in bytes
*
* This function returns %1 in there are only @patt bytes in @buf, and %0 if
* something else was also found.
*/
int ubi_check_pattern(const void *buf, uint8_t patt, int size)
{
int i;
for (i = 0; i < size; i++)
if (((const uint8_t *)buf)[i] != patt)
return 0;
return 1;
}
| gpl-2.0 |
NoelMacwan/SXDNickiKat | drivers/hwmon/smsc47b397.c | 4841 | 10107 | /*
* smsc47b397.c - Part of lm_sensors, Linux kernel modules
* for hardware monitoring
*
* Supports the SMSC LPC47B397-NC Super-I/O chip.
*
* Author/Maintainer: Mark M. Hoffman <mhoffman@lightlink.com>
* Copyright (C) 2004 Utilitek Systems, Inc.
*
* derived in part from smsc47m1.c:
* Copyright (C) 2002 Mark D. Studebaker <mdsxyz123@yahoo.com>
* Copyright (C) 2004 Jean Delvare <khali@linux-fr.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/ioport.h>
#include <linux/jiffies.h>
#include <linux/platform_device.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/mutex.h>
#include <linux/acpi.h>
#include <linux/io.h>
static unsigned short force_id;
module_param(force_id, ushort, 0);
MODULE_PARM_DESC(force_id, "Override the detected device ID");
static struct platform_device *pdev;
#define DRVNAME "smsc47b397"
/* Super-I/0 registers and commands */
#define REG 0x2e /* The register to read/write */
#define VAL 0x2f /* The value to read/write */
static inline void superio_outb(int reg, int val)
{
outb(reg, REG);
outb(val, VAL);
}
static inline int superio_inb(int reg)
{
outb(reg, REG);
return inb(VAL);
}
/* select superio logical device */
static inline void superio_select(int ld)
{
superio_outb(0x07, ld);
}
static inline void superio_enter(void)
{
outb(0x55, REG);
}
static inline void superio_exit(void)
{
outb(0xAA, REG);
}
#define SUPERIO_REG_DEVID 0x20
#define SUPERIO_REG_DEVREV 0x21
#define SUPERIO_REG_BASE_MSB 0x60
#define SUPERIO_REG_BASE_LSB 0x61
#define SUPERIO_REG_LD8 0x08
#define SMSC_EXTENT 0x02
/* 0 <= nr <= 3 */
static u8 smsc47b397_reg_temp[] = {0x25, 0x26, 0x27, 0x80};
#define SMSC47B397_REG_TEMP(nr) (smsc47b397_reg_temp[(nr)])
/* 0 <= nr <= 3 */
#define SMSC47B397_REG_FAN_LSB(nr) (0x28 + 2 * (nr))
#define SMSC47B397_REG_FAN_MSB(nr) (0x29 + 2 * (nr))
struct smsc47b397_data {
unsigned short addr;
const char *name;
struct device *hwmon_dev;
struct mutex lock;
struct mutex update_lock;
unsigned long last_updated; /* in jiffies */
int valid;
/* register values */
u16 fan[4];
u8 temp[4];
};
static int smsc47b397_read_value(struct smsc47b397_data *data, u8 reg)
{
int res;
mutex_lock(&data->lock);
outb(reg, data->addr);
res = inb_p(data->addr + 1);
mutex_unlock(&data->lock);
return res;
}
static struct smsc47b397_data *smsc47b397_update_device(struct device *dev)
{
struct smsc47b397_data *data = dev_get_drvdata(dev);
int i;
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
dev_dbg(dev, "starting device update...\n");
/* 4 temperature inputs, 4 fan inputs */
for (i = 0; i < 4; i++) {
data->temp[i] = smsc47b397_read_value(data,
SMSC47B397_REG_TEMP(i));
/* must read LSB first */
data->fan[i] = smsc47b397_read_value(data,
SMSC47B397_REG_FAN_LSB(i));
data->fan[i] |= smsc47b397_read_value(data,
SMSC47B397_REG_FAN_MSB(i)) << 8;
}
data->last_updated = jiffies;
data->valid = 1;
dev_dbg(dev, "... device update complete\n");
}
mutex_unlock(&data->update_lock);
return data;
}
/*
* TEMP: 0.001C/bit (-128C to +127C)
* REG: 1C/bit, two's complement
*/
static int temp_from_reg(u8 reg)
{
return (s8)reg * 1000;
}
static ssize_t show_temp(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct smsc47b397_data *data = smsc47b397_update_device(dev);
return sprintf(buf, "%d\n", temp_from_reg(data->temp[attr->index]));
}
static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1);
static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2);
static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_temp, NULL, 3);
/*
* FAN: 1 RPM/bit
* REG: count of 90kHz pulses / revolution
*/
static int fan_from_reg(u16 reg)
{
if (reg == 0 || reg == 0xffff)
return 0;
return 90000 * 60 / reg;
}
static ssize_t show_fan(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct smsc47b397_data *data = smsc47b397_update_device(dev);
return sprintf(buf, "%d\n", fan_from_reg(data->fan[attr->index]));
}
static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3);
static ssize_t show_name(struct device *dev, struct device_attribute
*devattr, char *buf)
{
struct smsc47b397_data *data = dev_get_drvdata(dev);
return sprintf(buf, "%s\n", data->name);
}
static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
static struct attribute *smsc47b397_attributes[] = {
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp4_input.dev_attr.attr,
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan3_input.dev_attr.attr,
&sensor_dev_attr_fan4_input.dev_attr.attr,
&dev_attr_name.attr,
NULL
};
static const struct attribute_group smsc47b397_group = {
.attrs = smsc47b397_attributes,
};
static int __devexit smsc47b397_remove(struct platform_device *pdev)
{
struct smsc47b397_data *data = platform_get_drvdata(pdev);
struct resource *res;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&pdev->dev.kobj, &smsc47b397_group);
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
release_region(res->start, SMSC_EXTENT);
kfree(data);
return 0;
}
static int smsc47b397_probe(struct platform_device *pdev);
static struct platform_driver smsc47b397_driver = {
.driver = {
.owner = THIS_MODULE,
.name = DRVNAME,
},
.probe = smsc47b397_probe,
.remove = __devexit_p(smsc47b397_remove),
};
static int __devinit smsc47b397_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct smsc47b397_data *data;
struct resource *res;
int err = 0;
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (!request_region(res->start, SMSC_EXTENT,
smsc47b397_driver.driver.name)) {
dev_err(dev, "Region 0x%lx-0x%lx already in use!\n",
(unsigned long)res->start,
(unsigned long)res->start + SMSC_EXTENT - 1);
return -EBUSY;
}
data = kzalloc(sizeof(struct smsc47b397_data), GFP_KERNEL);
if (!data) {
err = -ENOMEM;
goto error_release;
}
data->addr = res->start;
data->name = "smsc47b397";
mutex_init(&data->lock);
mutex_init(&data->update_lock);
platform_set_drvdata(pdev, data);
err = sysfs_create_group(&dev->kobj, &smsc47b397_group);
if (err)
goto error_free;
data->hwmon_dev = hwmon_device_register(dev);
if (IS_ERR(data->hwmon_dev)) {
err = PTR_ERR(data->hwmon_dev);
goto error_remove;
}
return 0;
error_remove:
sysfs_remove_group(&dev->kobj, &smsc47b397_group);
error_free:
kfree(data);
error_release:
release_region(res->start, SMSC_EXTENT);
return err;
}
static int __init smsc47b397_device_add(unsigned short address)
{
struct resource res = {
.start = address,
.end = address + SMSC_EXTENT - 1,
.name = DRVNAME,
.flags = IORESOURCE_IO,
};
int err;
err = acpi_check_resource_conflict(&res);
if (err)
goto exit;
pdev = platform_device_alloc(DRVNAME, address);
if (!pdev) {
err = -ENOMEM;
pr_err("Device allocation failed\n");
goto exit;
}
err = platform_device_add_resources(pdev, &res, 1);
if (err) {
pr_err("Device resource addition failed (%d)\n", err);
goto exit_device_put;
}
err = platform_device_add(pdev);
if (err) {
pr_err("Device addition failed (%d)\n", err);
goto exit_device_put;
}
return 0;
exit_device_put:
platform_device_put(pdev);
exit:
return err;
}
static int __init smsc47b397_find(void)
{
u8 id, rev;
char *name;
unsigned short addr;
superio_enter();
id = force_id ? force_id : superio_inb(SUPERIO_REG_DEVID);
switch (id) {
case 0x81:
name = "SCH5307-NS";
break;
case 0x6f:
name = "LPC47B397-NC";
break;
case 0x85:
case 0x8c:
name = "SCH5317";
break;
default:
superio_exit();
return -ENODEV;
}
rev = superio_inb(SUPERIO_REG_DEVREV);
superio_select(SUPERIO_REG_LD8);
addr = (superio_inb(SUPERIO_REG_BASE_MSB) << 8)
| superio_inb(SUPERIO_REG_BASE_LSB);
pr_info("found SMSC %s (base address 0x%04x, revision %u)\n",
name, addr, rev);
superio_exit();
return addr;
}
static int __init smsc47b397_init(void)
{
unsigned short address;
int ret;
ret = smsc47b397_find();
if (ret < 0)
return ret;
address = ret;
ret = platform_driver_register(&smsc47b397_driver);
if (ret)
goto exit;
/* Sets global pdev as a side effect */
ret = smsc47b397_device_add(address);
if (ret)
goto exit_driver;
return 0;
exit_driver:
platform_driver_unregister(&smsc47b397_driver);
exit:
return ret;
}
static void __exit smsc47b397_exit(void)
{
platform_device_unregister(pdev);
platform_driver_unregister(&smsc47b397_driver);
}
MODULE_AUTHOR("Mark M. Hoffman <mhoffman@lightlink.com>");
MODULE_DESCRIPTION("SMSC LPC47B397 driver");
MODULE_LICENSE("GPL");
module_init(smsc47b397_init);
module_exit(smsc47b397_exit);
| gpl-2.0 |
zarboz/Evita_UL_422-JB | arch/mips/jz4740/prom.c | 7913 | 1508 | /*
* Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
* JZ4740 SoC prom code
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/string.h>
#include <linux/serial_reg.h>
#include <asm/bootinfo.h>
#include <asm/mach-jz4740/base.h>
static __init void jz4740_init_cmdline(int argc, char *argv[])
{
unsigned int count = COMMAND_LINE_SIZE - 1;
int i;
char *dst = &(arcs_cmdline[0]);
char *src;
for (i = 1; i < argc && count; ++i) {
src = argv[i];
while (*src && count) {
*dst++ = *src++;
--count;
}
*dst++ = ' ';
}
if (i > 1)
--dst;
*dst = 0;
}
void __init prom_init(void)
{
jz4740_init_cmdline((int)fw_arg0, (char **)fw_arg1);
mips_machtype = MACH_INGENIC_JZ4740;
}
void __init prom_free_prom_memory(void)
{
}
#define UART_REG(_reg) ((void __iomem *)CKSEG1ADDR(JZ4740_UART0_BASE_ADDR + (_reg << 2)))
void prom_putchar(char c)
{
uint8_t lsr;
do {
lsr = readb(UART_REG(UART_LSR));
} while ((lsr & UART_LSR_TEMT) == 0);
writeb(c, UART_REG(UART_TX));
}
| gpl-2.0 |
Dm47021/CAF-MSM-34 | arch/m32r/lib/csum_partial_copy.c | 13801 | 1562 | /*
* INET An implementation of the TCP/IP protocol suite for the LINUX
* operating system. INET is implemented using the BSD Socket
* interface as the means of communication with the user level.
*
* M32R specific IP/TCP/UDP checksumming routines
* (Some code taken from MIPS architecture)
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1994, 1995 Waldorf Electronics GmbH
* Copyright (C) 1998, 1999 Ralf Baechle
* Copyright (C) 2001-2005 Hiroyuki Kondo, Hirokazu Takata
*
*/
#include <linux/module.h>
#include <linux/types.h>
#include <linux/string.h>
#include <net/checksum.h>
#include <asm/byteorder.h>
#include <asm/uaccess.h>
/*
* Copy while checksumming, otherwise like csum_partial
*/
__wsum
csum_partial_copy_nocheck (const void *src, void *dst, int len, __wsum sum)
{
sum = csum_partial(src, len, sum);
memcpy(dst, src, len);
return sum;
}
EXPORT_SYMBOL(csum_partial_copy_nocheck);
/*
* Copy from userspace and compute checksum. If we catch an exception
* then zero the rest of the buffer.
*/
__wsum
csum_partial_copy_from_user (const void __user *src, void *dst,
int len, __wsum sum, int *err_ptr)
{
int missing;
missing = copy_from_user(dst, src, len);
if (missing) {
memset(dst + len - missing, 0, missing);
*err_ptr = -EFAULT;
}
return csum_partial(dst, len-missing, sum);
}
EXPORT_SYMBOL(csum_partial_copy_from_user);
EXPORT_SYMBOL(csum_partial);
| gpl-2.0 |
kipill-nn/kernel-touch2 | drivers/char/mspec.c | 234 | 10920 | /*
* Copyright (C) 2001-2006 Silicon Graphics, Inc. All rights
* reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License
* as published by the Free Software Foundation.
*/
/*
* SN Platform Special Memory (mspec) Support
*
* This driver exports the SN special memory (mspec) facility to user
* processes.
* There are three types of memory made available thru this driver:
* fetchops, uncached and cached.
*
* Fetchops are atomic memory operations that are implemented in the
* memory controller on SGI SN hardware.
*
* Uncached are used for memory write combining feature of the ia64
* cpu.
*
* Cached are used for areas of memory that are used as cached addresses
* on our partition and used as uncached addresses from other partitions.
* Due to a design constraint of the SN2 Shub, you can not have processors
* on the same FSB perform both a cached and uncached reference to the
* same cache line. These special memory cached regions prevent the
* kernel from ever dropping in a TLB entry and therefore prevent the
* processor from ever speculating a cache line from this page.
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/miscdevice.h>
#include <linux/spinlock.h>
#include <linux/mm.h>
#include <linux/fs.h>
#include <linux/vmalloc.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/numa.h>
#include <asm/page.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/atomic.h>
#include <asm/tlbflush.h>
#include <asm/uncached.h>
#include <asm/sn/addrs.h>
#include <asm/sn/arch.h>
#include <asm/sn/mspec.h>
#include <asm/sn/sn_cpuid.h>
#include <asm/sn/io.h>
#include <asm/sn/bte.h>
#include <asm/sn/shubio.h>
#define FETCHOP_ID "SGI Fetchop,"
#define CACHED_ID "Cached,"
#define UNCACHED_ID "Uncached"
#define REVISION "4.0"
#define MSPEC_BASENAME "mspec"
/*
* Page types allocated by the device.
*/
enum mspec_page_type {
MSPEC_FETCHOP = 1,
MSPEC_CACHED,
MSPEC_UNCACHED
};
#ifdef CONFIG_SGI_SN
static int is_sn2;
#else
#define is_sn2 0
#endif
/*
* One of these structures is allocated when an mspec region is mmaped. The
* structure is pointed to by the vma->vm_private_data field in the vma struct.
* This structure is used to record the addresses of the mspec pages.
* This structure is shared by all vma's that are split off from the
* original vma when split_vma()'s are done.
*
* The refcnt is incremented atomically because mm->mmap_sem does not
* protect in fork case where multiple tasks share the vma_data.
*/
struct vma_data {
atomic_t refcnt; /* Number of vmas sharing the data. */
spinlock_t lock; /* Serialize access to this structure. */
int count; /* Number of pages allocated. */
enum mspec_page_type type; /* Type of pages allocated. */
int flags; /* See VMD_xxx below. */
unsigned long vm_start; /* Original (unsplit) base. */
unsigned long vm_end; /* Original (unsplit) end. */
unsigned long maddr[0]; /* Array of MSPEC addresses. */
};
#define VMD_VMALLOCED 0x1 /* vmalloc'd rather than kmalloc'd */
/* used on shub2 to clear FOP cache in the HUB */
static unsigned long scratch_page[MAX_NUMNODES];
#define SH2_AMO_CACHE_ENTRIES 4
static inline int
mspec_zero_block(unsigned long addr, int len)
{
int status;
if (is_sn2) {
if (is_shub2()) {
int nid;
void *p;
int i;
nid = nasid_to_cnodeid(get_node_number(__pa(addr)));
p = (void *)TO_AMO(scratch_page[nid]);
for (i=0; i < SH2_AMO_CACHE_ENTRIES; i++) {
FETCHOP_LOAD_OP(p, FETCHOP_LOAD);
p += FETCHOP_VAR_SIZE;
}
}
status = bte_copy(0, addr & ~__IA64_UNCACHED_OFFSET, len,
BTE_WACQUIRE | BTE_ZERO_FILL, NULL);
} else {
memset((char *) addr, 0, len);
status = 0;
}
return status;
}
/*
* mspec_open
*
* Called when a device mapping is created by a means other than mmap
* (via fork, munmap, etc.). Increments the reference count on the
* underlying mspec data so it is not freed prematurely.
*/
static void
mspec_open(struct vm_area_struct *vma)
{
struct vma_data *vdata;
vdata = vma->vm_private_data;
atomic_inc(&vdata->refcnt);
}
/*
* mspec_close
*
* Called when unmapping a device mapping. Frees all mspec pages
* belonging to all the vma's sharing this vma_data structure.
*/
static void
mspec_close(struct vm_area_struct *vma)
{
struct vma_data *vdata;
int index, last_index;
unsigned long my_page;
vdata = vma->vm_private_data;
if (!atomic_dec_and_test(&vdata->refcnt))
return;
last_index = (vdata->vm_end - vdata->vm_start) >> PAGE_SHIFT;
for (index = 0; index < last_index; index++) {
if (vdata->maddr[index] == 0)
continue;
/*
* Clear the page before sticking it back
* into the pool.
*/
my_page = vdata->maddr[index];
vdata->maddr[index] = 0;
if (!mspec_zero_block(my_page, PAGE_SIZE))
uncached_free_page(my_page, 1);
else
printk(KERN_WARNING "mspec_close(): "
"failed to zero page %ld\n", my_page);
}
if (vdata->flags & VMD_VMALLOCED)
vfree(vdata);
else
kfree(vdata);
}
/*
* mspec_fault
*
* Creates a mspec page and maps it to user space.
*/
static int
mspec_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
{
unsigned long paddr, maddr;
unsigned long pfn;
pgoff_t index = vmf->pgoff;
struct vma_data *vdata = vma->vm_private_data;
maddr = (volatile unsigned long) vdata->maddr[index];
if (maddr == 0) {
maddr = uncached_alloc_page(numa_node_id(), 1);
if (maddr == 0)
return VM_FAULT_OOM;
spin_lock(&vdata->lock);
if (vdata->maddr[index] == 0) {
vdata->count++;
vdata->maddr[index] = maddr;
} else {
uncached_free_page(maddr, 1);
maddr = vdata->maddr[index];
}
spin_unlock(&vdata->lock);
}
if (vdata->type == MSPEC_FETCHOP)
paddr = TO_AMO(maddr);
else
paddr = maddr & ~__IA64_UNCACHED_OFFSET;
pfn = paddr >> PAGE_SHIFT;
/*
* vm_insert_pfn can fail with -EBUSY, but in that case it will
* be because another thread has installed the pte first, so it
* is no problem.
*/
vm_insert_pfn(vma, (unsigned long)vmf->virtual_address, pfn);
return VM_FAULT_NOPAGE;
}
static struct vm_operations_struct mspec_vm_ops = {
.open = mspec_open,
.close = mspec_close,
.fault = mspec_fault,
};
/*
* mspec_mmap
*
* Called when mmaping the device. Initializes the vma with a fault handler
* and private data structure necessary to allocate, track, and free the
* underlying pages.
*/
static int
mspec_mmap(struct file *file, struct vm_area_struct *vma,
enum mspec_page_type type)
{
struct vma_data *vdata;
int pages, vdata_size, flags = 0;
if (vma->vm_pgoff != 0)
return -EINVAL;
if ((vma->vm_flags & VM_SHARED) == 0)
return -EINVAL;
if ((vma->vm_flags & VM_WRITE) == 0)
return -EPERM;
pages = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
vdata_size = sizeof(struct vma_data) + pages * sizeof(long);
if (vdata_size <= PAGE_SIZE)
vdata = kmalloc(vdata_size, GFP_KERNEL);
else {
vdata = vmalloc(vdata_size);
flags = VMD_VMALLOCED;
}
if (!vdata)
return -ENOMEM;
memset(vdata, 0, vdata_size);
vdata->vm_start = vma->vm_start;
vdata->vm_end = vma->vm_end;
vdata->flags = flags;
vdata->type = type;
spin_lock_init(&vdata->lock);
vdata->refcnt = ATOMIC_INIT(1);
vma->vm_private_data = vdata;
vma->vm_flags |= (VM_IO | VM_RESERVED | VM_PFNMAP | VM_DONTEXPAND);
if (vdata->type == MSPEC_FETCHOP || vdata->type == MSPEC_UNCACHED)
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
vma->vm_ops = &mspec_vm_ops;
return 0;
}
static int
fetchop_mmap(struct file *file, struct vm_area_struct *vma)
{
return mspec_mmap(file, vma, MSPEC_FETCHOP);
}
static int
cached_mmap(struct file *file, struct vm_area_struct *vma)
{
return mspec_mmap(file, vma, MSPEC_CACHED);
}
static int
uncached_mmap(struct file *file, struct vm_area_struct *vma)
{
return mspec_mmap(file, vma, MSPEC_UNCACHED);
}
static const struct file_operations fetchop_fops = {
.owner = THIS_MODULE,
.mmap = fetchop_mmap
};
static struct miscdevice fetchop_miscdev = {
.minor = MISC_DYNAMIC_MINOR,
.name = "sgi_fetchop",
.fops = &fetchop_fops
};
static const struct file_operations cached_fops = {
.owner = THIS_MODULE,
.mmap = cached_mmap
};
static struct miscdevice cached_miscdev = {
.minor = MISC_DYNAMIC_MINOR,
.name = "mspec_cached",
.fops = &cached_fops
};
static const struct file_operations uncached_fops = {
.owner = THIS_MODULE,
.mmap = uncached_mmap
};
static struct miscdevice uncached_miscdev = {
.minor = MISC_DYNAMIC_MINOR,
.name = "mspec_uncached",
.fops = &uncached_fops
};
/*
* mspec_init
*
* Called at boot time to initialize the mspec facility.
*/
static int __init
mspec_init(void)
{
int ret;
int nid;
/*
* The fetchop device only works on SN2 hardware, uncached and cached
* memory drivers should both be valid on all ia64 hardware
*/
#ifdef CONFIG_SGI_SN
if (ia64_platform_is("sn2")) {
is_sn2 = 1;
if (is_shub2()) {
ret = -ENOMEM;
for_each_node_state(nid, N_ONLINE) {
int actual_nid;
int nasid;
unsigned long phys;
scratch_page[nid] = uncached_alloc_page(nid, 1);
if (scratch_page[nid] == 0)
goto free_scratch_pages;
phys = __pa(scratch_page[nid]);
nasid = get_node_number(phys);
actual_nid = nasid_to_cnodeid(nasid);
if (actual_nid != nid)
goto free_scratch_pages;
}
}
ret = misc_register(&fetchop_miscdev);
if (ret) {
printk(KERN_ERR
"%s: failed to register device %i\n",
FETCHOP_ID, ret);
goto free_scratch_pages;
}
}
#endif
ret = misc_register(&cached_miscdev);
if (ret) {
printk(KERN_ERR "%s: failed to register device %i\n",
CACHED_ID, ret);
if (is_sn2)
misc_deregister(&fetchop_miscdev);
goto free_scratch_pages;
}
ret = misc_register(&uncached_miscdev);
if (ret) {
printk(KERN_ERR "%s: failed to register device %i\n",
UNCACHED_ID, ret);
misc_deregister(&cached_miscdev);
if (is_sn2)
misc_deregister(&fetchop_miscdev);
goto free_scratch_pages;
}
printk(KERN_INFO "%s %s initialized devices: %s %s %s\n",
MSPEC_BASENAME, REVISION, is_sn2 ? FETCHOP_ID : "",
CACHED_ID, UNCACHED_ID);
return 0;
free_scratch_pages:
for_each_node(nid) {
if (scratch_page[nid] != 0)
uncached_free_page(scratch_page[nid], 1);
}
return ret;
}
static void __exit
mspec_exit(void)
{
int nid;
misc_deregister(&uncached_miscdev);
misc_deregister(&cached_miscdev);
if (is_sn2) {
misc_deregister(&fetchop_miscdev);
for_each_node(nid) {
if (scratch_page[nid] != 0)
uncached_free_page(scratch_page[nid], 1);
}
}
}
module_init(mspec_init);
module_exit(mspec_exit);
MODULE_AUTHOR("Silicon Graphics, Inc. <linux-altix@sgi.com>");
MODULE_DESCRIPTION("Driver for SGI SN special memory operations");
MODULE_LICENSE("GPL");
| gpl-2.0 |
pkirchhofer/nsa325-linux-upstream | drivers/dma/dmaengine.c | 234 | 31256 | /*
* Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called COPYING.
*/
/*
* This code implements the DMA subsystem. It provides a HW-neutral interface
* for other kernel code to use asynchronous memory copy capabilities,
* if present, and allows different HW DMA drivers to register as providing
* this capability.
*
* Due to the fact we are accelerating what is already a relatively fast
* operation, the code goes to great lengths to avoid additional overhead,
* such as locking.
*
* LOCKING:
*
* The subsystem keeps a global list of dma_device structs it is protected by a
* mutex, dma_list_mutex.
*
* A subsystem can get access to a channel by calling dmaengine_get() followed
* by dma_find_channel(), or if it has need for an exclusive channel it can call
* dma_request_channel(). Once a channel is allocated a reference is taken
* against its corresponding driver to disable removal.
*
* Each device has a channels list, which runs unlocked but is never modified
* once the device is registered, it's just setup by the driver.
*
* See Documentation/dmaengine.txt for more details
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/dma-mapping.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mm.h>
#include <linux/device.h>
#include <linux/dmaengine.h>
#include <linux/hardirq.h>
#include <linux/spinlock.h>
#include <linux/percpu.h>
#include <linux/rcupdate.h>
#include <linux/mutex.h>
#include <linux/jiffies.h>
#include <linux/rculist.h>
#include <linux/idr.h>
#include <linux/slab.h>
#include <linux/acpi.h>
#include <linux/acpi_dma.h>
#include <linux/of_dma.h>
#include <linux/mempool.h>
static DEFINE_MUTEX(dma_list_mutex);
static DEFINE_IDR(dma_idr);
static LIST_HEAD(dma_device_list);
static long dmaengine_ref_count;
/* --- sysfs implementation --- */
/**
* dev_to_dma_chan - convert a device pointer to the its sysfs container object
* @dev - device node
*
* Must be called under dma_list_mutex
*/
static struct dma_chan *dev_to_dma_chan(struct device *dev)
{
struct dma_chan_dev *chan_dev;
chan_dev = container_of(dev, typeof(*chan_dev), device);
return chan_dev->chan;
}
static ssize_t memcpy_count_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct dma_chan *chan;
unsigned long count = 0;
int i;
int err;
mutex_lock(&dma_list_mutex);
chan = dev_to_dma_chan(dev);
if (chan) {
for_each_possible_cpu(i)
count += per_cpu_ptr(chan->local, i)->memcpy_count;
err = sprintf(buf, "%lu\n", count);
} else
err = -ENODEV;
mutex_unlock(&dma_list_mutex);
return err;
}
static DEVICE_ATTR_RO(memcpy_count);
static ssize_t bytes_transferred_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct dma_chan *chan;
unsigned long count = 0;
int i;
int err;
mutex_lock(&dma_list_mutex);
chan = dev_to_dma_chan(dev);
if (chan) {
for_each_possible_cpu(i)
count += per_cpu_ptr(chan->local, i)->bytes_transferred;
err = sprintf(buf, "%lu\n", count);
} else
err = -ENODEV;
mutex_unlock(&dma_list_mutex);
return err;
}
static DEVICE_ATTR_RO(bytes_transferred);
static ssize_t in_use_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct dma_chan *chan;
int err;
mutex_lock(&dma_list_mutex);
chan = dev_to_dma_chan(dev);
if (chan)
err = sprintf(buf, "%d\n", chan->client_count);
else
err = -ENODEV;
mutex_unlock(&dma_list_mutex);
return err;
}
static DEVICE_ATTR_RO(in_use);
static struct attribute *dma_dev_attrs[] = {
&dev_attr_memcpy_count.attr,
&dev_attr_bytes_transferred.attr,
&dev_attr_in_use.attr,
NULL,
};
ATTRIBUTE_GROUPS(dma_dev);
static void chan_dev_release(struct device *dev)
{
struct dma_chan_dev *chan_dev;
chan_dev = container_of(dev, typeof(*chan_dev), device);
if (atomic_dec_and_test(chan_dev->idr_ref)) {
mutex_lock(&dma_list_mutex);
idr_remove(&dma_idr, chan_dev->dev_id);
mutex_unlock(&dma_list_mutex);
kfree(chan_dev->idr_ref);
}
kfree(chan_dev);
}
static struct class dma_devclass = {
.name = "dma",
.dev_groups = dma_dev_groups,
.dev_release = chan_dev_release,
};
/* --- client and device registration --- */
#define dma_device_satisfies_mask(device, mask) \
__dma_device_satisfies_mask((device), &(mask))
static int
__dma_device_satisfies_mask(struct dma_device *device,
const dma_cap_mask_t *want)
{
dma_cap_mask_t has;
bitmap_and(has.bits, want->bits, device->cap_mask.bits,
DMA_TX_TYPE_END);
return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END);
}
static struct module *dma_chan_to_owner(struct dma_chan *chan)
{
return chan->device->dev->driver->owner;
}
/**
* balance_ref_count - catch up the channel reference count
* @chan - channel to balance ->client_count versus dmaengine_ref_count
*
* balance_ref_count must be called under dma_list_mutex
*/
static void balance_ref_count(struct dma_chan *chan)
{
struct module *owner = dma_chan_to_owner(chan);
while (chan->client_count < dmaengine_ref_count) {
__module_get(owner);
chan->client_count++;
}
}
/**
* dma_chan_get - try to grab a dma channel's parent driver module
* @chan - channel to grab
*
* Must be called under dma_list_mutex
*/
static int dma_chan_get(struct dma_chan *chan)
{
struct module *owner = dma_chan_to_owner(chan);
int ret;
/* The channel is already in use, update client count */
if (chan->client_count) {
__module_get(owner);
goto out;
}
if (!try_module_get(owner))
return -ENODEV;
/* allocate upon first client reference */
if (chan->device->device_alloc_chan_resources) {
ret = chan->device->device_alloc_chan_resources(chan);
if (ret < 0)
goto err_out;
}
if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask))
balance_ref_count(chan);
out:
chan->client_count++;
return 0;
err_out:
module_put(owner);
return ret;
}
/**
* dma_chan_put - drop a reference to a dma channel's parent driver module
* @chan - channel to release
*
* Must be called under dma_list_mutex
*/
static void dma_chan_put(struct dma_chan *chan)
{
/* This channel is not in use, bail out */
if (!chan->client_count)
return;
chan->client_count--;
module_put(dma_chan_to_owner(chan));
/* This channel is not in use anymore, free it */
if (!chan->client_count && chan->device->device_free_chan_resources)
chan->device->device_free_chan_resources(chan);
/* If the channel is used via a DMA request router, free the mapping */
if (chan->router && chan->router->route_free) {
chan->router->route_free(chan->router->dev, chan->route_data);
chan->router = NULL;
chan->route_data = NULL;
}
}
enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie)
{
enum dma_status status;
unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
dma_async_issue_pending(chan);
do {
status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
pr_err("%s: timeout!\n", __func__);
return DMA_ERROR;
}
if (status != DMA_IN_PROGRESS)
break;
cpu_relax();
} while (1);
return status;
}
EXPORT_SYMBOL(dma_sync_wait);
/**
* dma_cap_mask_all - enable iteration over all operation types
*/
static dma_cap_mask_t dma_cap_mask_all;
/**
* dma_chan_tbl_ent - tracks channel allocations per core/operation
* @chan - associated channel for this entry
*/
struct dma_chan_tbl_ent {
struct dma_chan *chan;
};
/**
* channel_table - percpu lookup table for memory-to-memory offload providers
*/
static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END];
static int __init dma_channel_table_init(void)
{
enum dma_transaction_type cap;
int err = 0;
bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END);
/* 'interrupt', 'private', and 'slave' are channel capabilities,
* but are not associated with an operation so they do not need
* an entry in the channel_table
*/
clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits);
clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits);
clear_bit(DMA_SLAVE, dma_cap_mask_all.bits);
for_each_dma_cap_mask(cap, dma_cap_mask_all) {
channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent);
if (!channel_table[cap]) {
err = -ENOMEM;
break;
}
}
if (err) {
pr_err("initialization failure\n");
for_each_dma_cap_mask(cap, dma_cap_mask_all)
free_percpu(channel_table[cap]);
}
return err;
}
arch_initcall(dma_channel_table_init);
/**
* dma_find_channel - find a channel to carry out the operation
* @tx_type: transaction type
*/
struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type)
{
return this_cpu_read(channel_table[tx_type]->chan);
}
EXPORT_SYMBOL(dma_find_channel);
/**
* dma_issue_pending_all - flush all pending operations across all channels
*/
void dma_issue_pending_all(void)
{
struct dma_device *device;
struct dma_chan *chan;
rcu_read_lock();
list_for_each_entry_rcu(device, &dma_device_list, global_node) {
if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
continue;
list_for_each_entry(chan, &device->channels, device_node)
if (chan->client_count)
device->device_issue_pending(chan);
}
rcu_read_unlock();
}
EXPORT_SYMBOL(dma_issue_pending_all);
/**
* dma_chan_is_local - returns true if the channel is in the same numa-node as the cpu
*/
static bool dma_chan_is_local(struct dma_chan *chan, int cpu)
{
int node = dev_to_node(chan->device->dev);
return node == -1 || cpumask_test_cpu(cpu, cpumask_of_node(node));
}
/**
* min_chan - returns the channel with min count and in the same numa-node as the cpu
* @cap: capability to match
* @cpu: cpu index which the channel should be close to
*
* If some channels are close to the given cpu, the one with the lowest
* reference count is returned. Otherwise, cpu is ignored and only the
* reference count is taken into account.
* Must be called under dma_list_mutex.
*/
static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu)
{
struct dma_device *device;
struct dma_chan *chan;
struct dma_chan *min = NULL;
struct dma_chan *localmin = NULL;
list_for_each_entry(device, &dma_device_list, global_node) {
if (!dma_has_cap(cap, device->cap_mask) ||
dma_has_cap(DMA_PRIVATE, device->cap_mask))
continue;
list_for_each_entry(chan, &device->channels, device_node) {
if (!chan->client_count)
continue;
if (!min || chan->table_count < min->table_count)
min = chan;
if (dma_chan_is_local(chan, cpu))
if (!localmin ||
chan->table_count < localmin->table_count)
localmin = chan;
}
}
chan = localmin ? localmin : min;
if (chan)
chan->table_count++;
return chan;
}
/**
* dma_channel_rebalance - redistribute the available channels
*
* Optimize for cpu isolation (each cpu gets a dedicated channel for an
* operation type) in the SMP case, and operation isolation (avoid
* multi-tasking channels) in the non-SMP case. Must be called under
* dma_list_mutex.
*/
static void dma_channel_rebalance(void)
{
struct dma_chan *chan;
struct dma_device *device;
int cpu;
int cap;
/* undo the last distribution */
for_each_dma_cap_mask(cap, dma_cap_mask_all)
for_each_possible_cpu(cpu)
per_cpu_ptr(channel_table[cap], cpu)->chan = NULL;
list_for_each_entry(device, &dma_device_list, global_node) {
if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
continue;
list_for_each_entry(chan, &device->channels, device_node)
chan->table_count = 0;
}
/* don't populate the channel_table if no clients are available */
if (!dmaengine_ref_count)
return;
/* redistribute available channels */
for_each_dma_cap_mask(cap, dma_cap_mask_all)
for_each_online_cpu(cpu) {
chan = min_chan(cap, cpu);
per_cpu_ptr(channel_table[cap], cpu)->chan = chan;
}
}
int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps)
{
struct dma_device *device;
if (!chan || !caps)
return -EINVAL;
device = chan->device;
/* check if the channel supports slave transactions */
if (!test_bit(DMA_SLAVE, device->cap_mask.bits))
return -ENXIO;
/*
* Check whether it reports it uses the generic slave
* capabilities, if not, that means it doesn't support any
* kind of slave capabilities reporting.
*/
if (!device->directions)
return -ENXIO;
caps->src_addr_widths = device->src_addr_widths;
caps->dst_addr_widths = device->dst_addr_widths;
caps->directions = device->directions;
caps->residue_granularity = device->residue_granularity;
/*
* Some devices implement only pause (e.g. to get residuum) but no
* resume. However cmd_pause is advertised as pause AND resume.
*/
caps->cmd_pause = !!(device->device_pause && device->device_resume);
caps->cmd_terminate = !!device->device_terminate_all;
return 0;
}
EXPORT_SYMBOL_GPL(dma_get_slave_caps);
static struct dma_chan *private_candidate(const dma_cap_mask_t *mask,
struct dma_device *dev,
dma_filter_fn fn, void *fn_param)
{
struct dma_chan *chan;
if (!__dma_device_satisfies_mask(dev, mask)) {
pr_debug("%s: wrong capabilities\n", __func__);
return NULL;
}
/* devices with multiple channels need special handling as we need to
* ensure that all channels are either private or public.
*/
if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask))
list_for_each_entry(chan, &dev->channels, device_node) {
/* some channels are already publicly allocated */
if (chan->client_count)
return NULL;
}
list_for_each_entry(chan, &dev->channels, device_node) {
if (chan->client_count) {
pr_debug("%s: %s busy\n",
__func__, dma_chan_name(chan));
continue;
}
if (fn && !fn(chan, fn_param)) {
pr_debug("%s: %s filter said false\n",
__func__, dma_chan_name(chan));
continue;
}
return chan;
}
return NULL;
}
/**
* dma_get_slave_channel - try to get specific channel exclusively
* @chan: target channel
*/
struct dma_chan *dma_get_slave_channel(struct dma_chan *chan)
{
int err = -EBUSY;
/* lock against __dma_request_channel */
mutex_lock(&dma_list_mutex);
if (chan->client_count == 0) {
err = dma_chan_get(chan);
if (err)
pr_debug("%s: failed to get %s: (%d)\n",
__func__, dma_chan_name(chan), err);
} else
chan = NULL;
mutex_unlock(&dma_list_mutex);
return chan;
}
EXPORT_SYMBOL_GPL(dma_get_slave_channel);
struct dma_chan *dma_get_any_slave_channel(struct dma_device *device)
{
dma_cap_mask_t mask;
struct dma_chan *chan;
int err;
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
/* lock against __dma_request_channel */
mutex_lock(&dma_list_mutex);
chan = private_candidate(&mask, device, NULL, NULL);
if (chan) {
dma_cap_set(DMA_PRIVATE, device->cap_mask);
device->privatecnt++;
err = dma_chan_get(chan);
if (err) {
pr_debug("%s: failed to get %s: (%d)\n",
__func__, dma_chan_name(chan), err);
chan = NULL;
if (--device->privatecnt == 0)
dma_cap_clear(DMA_PRIVATE, device->cap_mask);
}
}
mutex_unlock(&dma_list_mutex);
return chan;
}
EXPORT_SYMBOL_GPL(dma_get_any_slave_channel);
/**
* __dma_request_channel - try to allocate an exclusive channel
* @mask: capabilities that the channel must satisfy
* @fn: optional callback to disposition available channels
* @fn_param: opaque parameter to pass to dma_filter_fn
*
* Returns pointer to appropriate DMA channel on success or NULL.
*/
struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
dma_filter_fn fn, void *fn_param)
{
struct dma_device *device, *_d;
struct dma_chan *chan = NULL;
int err;
/* Find a channel */
mutex_lock(&dma_list_mutex);
list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
chan = private_candidate(mask, device, fn, fn_param);
if (chan) {
/* Found a suitable channel, try to grab, prep, and
* return it. We first set DMA_PRIVATE to disable
* balance_ref_count as this channel will not be
* published in the general-purpose allocator
*/
dma_cap_set(DMA_PRIVATE, device->cap_mask);
device->privatecnt++;
err = dma_chan_get(chan);
if (err == -ENODEV) {
pr_debug("%s: %s module removed\n",
__func__, dma_chan_name(chan));
list_del_rcu(&device->global_node);
} else if (err)
pr_debug("%s: failed to get %s: (%d)\n",
__func__, dma_chan_name(chan), err);
else
break;
if (--device->privatecnt == 0)
dma_cap_clear(DMA_PRIVATE, device->cap_mask);
chan = NULL;
}
}
mutex_unlock(&dma_list_mutex);
pr_debug("%s: %s (%s)\n",
__func__,
chan ? "success" : "fail",
chan ? dma_chan_name(chan) : NULL);
return chan;
}
EXPORT_SYMBOL_GPL(__dma_request_channel);
/**
* dma_request_slave_channel_reason - try to allocate an exclusive slave channel
* @dev: pointer to client device structure
* @name: slave channel name
*
* Returns pointer to appropriate DMA channel on success or an error pointer.
*/
struct dma_chan *dma_request_slave_channel_reason(struct device *dev,
const char *name)
{
/* If device-tree is present get slave info from here */
if (dev->of_node)
return of_dma_request_slave_channel(dev->of_node, name);
/* If device was enumerated by ACPI get slave info from here */
if (ACPI_HANDLE(dev))
return acpi_dma_request_slave_chan_by_name(dev, name);
return ERR_PTR(-ENODEV);
}
EXPORT_SYMBOL_GPL(dma_request_slave_channel_reason);
/**
* dma_request_slave_channel - try to allocate an exclusive slave channel
* @dev: pointer to client device structure
* @name: slave channel name
*
* Returns pointer to appropriate DMA channel on success or NULL.
*/
struct dma_chan *dma_request_slave_channel(struct device *dev,
const char *name)
{
struct dma_chan *ch = dma_request_slave_channel_reason(dev, name);
if (IS_ERR(ch))
return NULL;
dma_cap_set(DMA_PRIVATE, ch->device->cap_mask);
ch->device->privatecnt++;
return ch;
}
EXPORT_SYMBOL_GPL(dma_request_slave_channel);
void dma_release_channel(struct dma_chan *chan)
{
mutex_lock(&dma_list_mutex);
WARN_ONCE(chan->client_count != 1,
"chan reference count %d != 1\n", chan->client_count);
dma_chan_put(chan);
/* drop PRIVATE cap enabled by __dma_request_channel() */
if (--chan->device->privatecnt == 0)
dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask);
mutex_unlock(&dma_list_mutex);
}
EXPORT_SYMBOL_GPL(dma_release_channel);
/**
* dmaengine_get - register interest in dma_channels
*/
void dmaengine_get(void)
{
struct dma_device *device, *_d;
struct dma_chan *chan;
int err;
mutex_lock(&dma_list_mutex);
dmaengine_ref_count++;
/* try to grab channels */
list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
continue;
list_for_each_entry(chan, &device->channels, device_node) {
err = dma_chan_get(chan);
if (err == -ENODEV) {
/* module removed before we could use it */
list_del_rcu(&device->global_node);
break;
} else if (err)
pr_debug("%s: failed to get %s: (%d)\n",
__func__, dma_chan_name(chan), err);
}
}
/* if this is the first reference and there were channels
* waiting we need to rebalance to get those channels
* incorporated into the channel table
*/
if (dmaengine_ref_count == 1)
dma_channel_rebalance();
mutex_unlock(&dma_list_mutex);
}
EXPORT_SYMBOL(dmaengine_get);
/**
* dmaengine_put - let dma drivers be removed when ref_count == 0
*/
void dmaengine_put(void)
{
struct dma_device *device;
struct dma_chan *chan;
mutex_lock(&dma_list_mutex);
dmaengine_ref_count--;
BUG_ON(dmaengine_ref_count < 0);
/* drop channel references */
list_for_each_entry(device, &dma_device_list, global_node) {
if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
continue;
list_for_each_entry(chan, &device->channels, device_node)
dma_chan_put(chan);
}
mutex_unlock(&dma_list_mutex);
}
EXPORT_SYMBOL(dmaengine_put);
static bool device_has_all_tx_types(struct dma_device *device)
{
/* A device that satisfies this test has channels that will never cause
* an async_tx channel switch event as all possible operation types can
* be handled.
*/
#ifdef CONFIG_ASYNC_TX_DMA
if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask))
return false;
#endif
#if defined(CONFIG_ASYNC_MEMCPY) || defined(CONFIG_ASYNC_MEMCPY_MODULE)
if (!dma_has_cap(DMA_MEMCPY, device->cap_mask))
return false;
#endif
#if defined(CONFIG_ASYNC_XOR) || defined(CONFIG_ASYNC_XOR_MODULE)
if (!dma_has_cap(DMA_XOR, device->cap_mask))
return false;
#ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask))
return false;
#endif
#endif
#if defined(CONFIG_ASYNC_PQ) || defined(CONFIG_ASYNC_PQ_MODULE)
if (!dma_has_cap(DMA_PQ, device->cap_mask))
return false;
#ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA
if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask))
return false;
#endif
#endif
return true;
}
static int get_dma_id(struct dma_device *device)
{
int rc;
mutex_lock(&dma_list_mutex);
rc = idr_alloc(&dma_idr, NULL, 0, 0, GFP_KERNEL);
if (rc >= 0)
device->dev_id = rc;
mutex_unlock(&dma_list_mutex);
return rc < 0 ? rc : 0;
}
/**
* dma_async_device_register - registers DMA devices found
* @device: &dma_device
*/
int dma_async_device_register(struct dma_device *device)
{
int chancnt = 0, rc;
struct dma_chan* chan;
atomic_t *idr_ref;
if (!device)
return -ENODEV;
/* validate device routines */
BUG_ON(dma_has_cap(DMA_MEMCPY, device->cap_mask) &&
!device->device_prep_dma_memcpy);
BUG_ON(dma_has_cap(DMA_XOR, device->cap_mask) &&
!device->device_prep_dma_xor);
BUG_ON(dma_has_cap(DMA_XOR_VAL, device->cap_mask) &&
!device->device_prep_dma_xor_val);
BUG_ON(dma_has_cap(DMA_PQ, device->cap_mask) &&
!device->device_prep_dma_pq);
BUG_ON(dma_has_cap(DMA_PQ_VAL, device->cap_mask) &&
!device->device_prep_dma_pq_val);
BUG_ON(dma_has_cap(DMA_MEMSET, device->cap_mask) &&
!device->device_prep_dma_memset);
BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) &&
!device->device_prep_dma_interrupt);
BUG_ON(dma_has_cap(DMA_SG, device->cap_mask) &&
!device->device_prep_dma_sg);
BUG_ON(dma_has_cap(DMA_CYCLIC, device->cap_mask) &&
!device->device_prep_dma_cyclic);
BUG_ON(dma_has_cap(DMA_INTERLEAVE, device->cap_mask) &&
!device->device_prep_interleaved_dma);
BUG_ON(!device->device_tx_status);
BUG_ON(!device->device_issue_pending);
BUG_ON(!device->dev);
/* note: this only matters in the
* CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case
*/
if (device_has_all_tx_types(device))
dma_cap_set(DMA_ASYNC_TX, device->cap_mask);
idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL);
if (!idr_ref)
return -ENOMEM;
rc = get_dma_id(device);
if (rc != 0) {
kfree(idr_ref);
return rc;
}
atomic_set(idr_ref, 0);
/* represent channels in sysfs. Probably want devs too */
list_for_each_entry(chan, &device->channels, device_node) {
rc = -ENOMEM;
chan->local = alloc_percpu(typeof(*chan->local));
if (chan->local == NULL)
goto err_out;
chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL);
if (chan->dev == NULL) {
free_percpu(chan->local);
chan->local = NULL;
goto err_out;
}
chan->chan_id = chancnt++;
chan->dev->device.class = &dma_devclass;
chan->dev->device.parent = device->dev;
chan->dev->chan = chan;
chan->dev->idr_ref = idr_ref;
chan->dev->dev_id = device->dev_id;
atomic_inc(idr_ref);
dev_set_name(&chan->dev->device, "dma%dchan%d",
device->dev_id, chan->chan_id);
rc = device_register(&chan->dev->device);
if (rc) {
free_percpu(chan->local);
chan->local = NULL;
kfree(chan->dev);
atomic_dec(idr_ref);
goto err_out;
}
chan->client_count = 0;
}
device->chancnt = chancnt;
mutex_lock(&dma_list_mutex);
/* take references on public channels */
if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask))
list_for_each_entry(chan, &device->channels, device_node) {
/* if clients are already waiting for channels we need
* to take references on their behalf
*/
if (dma_chan_get(chan) == -ENODEV) {
/* note we can only get here for the first
* channel as the remaining channels are
* guaranteed to get a reference
*/
rc = -ENODEV;
mutex_unlock(&dma_list_mutex);
goto err_out;
}
}
list_add_tail_rcu(&device->global_node, &dma_device_list);
if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
device->privatecnt++; /* Always private */
dma_channel_rebalance();
mutex_unlock(&dma_list_mutex);
return 0;
err_out:
/* if we never registered a channel just release the idr */
if (atomic_read(idr_ref) == 0) {
mutex_lock(&dma_list_mutex);
idr_remove(&dma_idr, device->dev_id);
mutex_unlock(&dma_list_mutex);
kfree(idr_ref);
return rc;
}
list_for_each_entry(chan, &device->channels, device_node) {
if (chan->local == NULL)
continue;
mutex_lock(&dma_list_mutex);
chan->dev->chan = NULL;
mutex_unlock(&dma_list_mutex);
device_unregister(&chan->dev->device);
free_percpu(chan->local);
}
return rc;
}
EXPORT_SYMBOL(dma_async_device_register);
/**
* dma_async_device_unregister - unregister a DMA device
* @device: &dma_device
*
* This routine is called by dma driver exit routines, dmaengine holds module
* references to prevent it being called while channels are in use.
*/
void dma_async_device_unregister(struct dma_device *device)
{
struct dma_chan *chan;
mutex_lock(&dma_list_mutex);
list_del_rcu(&device->global_node);
dma_channel_rebalance();
mutex_unlock(&dma_list_mutex);
list_for_each_entry(chan, &device->channels, device_node) {
WARN_ONCE(chan->client_count,
"%s called while %d clients hold a reference\n",
__func__, chan->client_count);
mutex_lock(&dma_list_mutex);
chan->dev->chan = NULL;
mutex_unlock(&dma_list_mutex);
device_unregister(&chan->dev->device);
free_percpu(chan->local);
}
}
EXPORT_SYMBOL(dma_async_device_unregister);
struct dmaengine_unmap_pool {
struct kmem_cache *cache;
const char *name;
mempool_t *pool;
size_t size;
};
#define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) }
static struct dmaengine_unmap_pool unmap_pool[] = {
__UNMAP_POOL(2),
#if IS_ENABLED(CONFIG_DMA_ENGINE_RAID)
__UNMAP_POOL(16),
__UNMAP_POOL(128),
__UNMAP_POOL(256),
#endif
};
static struct dmaengine_unmap_pool *__get_unmap_pool(int nr)
{
int order = get_count_order(nr);
switch (order) {
case 0 ... 1:
return &unmap_pool[0];
case 2 ... 4:
return &unmap_pool[1];
case 5 ... 7:
return &unmap_pool[2];
case 8:
return &unmap_pool[3];
default:
BUG();
return NULL;
}
}
static void dmaengine_unmap(struct kref *kref)
{
struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref);
struct device *dev = unmap->dev;
int cnt, i;
cnt = unmap->to_cnt;
for (i = 0; i < cnt; i++)
dma_unmap_page(dev, unmap->addr[i], unmap->len,
DMA_TO_DEVICE);
cnt += unmap->from_cnt;
for (; i < cnt; i++)
dma_unmap_page(dev, unmap->addr[i], unmap->len,
DMA_FROM_DEVICE);
cnt += unmap->bidi_cnt;
for (; i < cnt; i++) {
if (unmap->addr[i] == 0)
continue;
dma_unmap_page(dev, unmap->addr[i], unmap->len,
DMA_BIDIRECTIONAL);
}
cnt = unmap->map_cnt;
mempool_free(unmap, __get_unmap_pool(cnt)->pool);
}
void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap)
{
if (unmap)
kref_put(&unmap->kref, dmaengine_unmap);
}
EXPORT_SYMBOL_GPL(dmaengine_unmap_put);
static void dmaengine_destroy_unmap_pool(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
struct dmaengine_unmap_pool *p = &unmap_pool[i];
if (p->pool)
mempool_destroy(p->pool);
p->pool = NULL;
if (p->cache)
kmem_cache_destroy(p->cache);
p->cache = NULL;
}
}
static int __init dmaengine_init_unmap_pool(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
struct dmaengine_unmap_pool *p = &unmap_pool[i];
size_t size;
size = sizeof(struct dmaengine_unmap_data) +
sizeof(dma_addr_t) * p->size;
p->cache = kmem_cache_create(p->name, size, 0,
SLAB_HWCACHE_ALIGN, NULL);
if (!p->cache)
break;
p->pool = mempool_create_slab_pool(1, p->cache);
if (!p->pool)
break;
}
if (i == ARRAY_SIZE(unmap_pool))
return 0;
dmaengine_destroy_unmap_pool();
return -ENOMEM;
}
struct dmaengine_unmap_data *
dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags)
{
struct dmaengine_unmap_data *unmap;
unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags);
if (!unmap)
return NULL;
memset(unmap, 0, sizeof(*unmap));
kref_init(&unmap->kref);
unmap->dev = dev;
unmap->map_cnt = nr;
return unmap;
}
EXPORT_SYMBOL(dmaengine_get_unmap_data);
void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
struct dma_chan *chan)
{
tx->chan = chan;
#ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
spin_lock_init(&tx->lock);
#endif
}
EXPORT_SYMBOL(dma_async_tx_descriptor_init);
/* dma_wait_for_async_tx - spin wait for a transaction to complete
* @tx: in-flight transaction to wait on
*/
enum dma_status
dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
{
unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
if (!tx)
return DMA_COMPLETE;
while (tx->cookie == -EBUSY) {
if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
pr_err("%s timeout waiting for descriptor submission\n",
__func__);
return DMA_ERROR;
}
cpu_relax();
}
return dma_sync_wait(tx->chan, tx->cookie);
}
EXPORT_SYMBOL_GPL(dma_wait_for_async_tx);
/* dma_run_dependencies - helper routine for dma drivers to process
* (start) dependent operations on their target channel
* @tx: transaction with dependencies
*/
void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
{
struct dma_async_tx_descriptor *dep = txd_next(tx);
struct dma_async_tx_descriptor *dep_next;
struct dma_chan *chan;
if (!dep)
return;
/* we'll submit tx->next now, so clear the link */
txd_clear_next(tx);
chan = dep->chan;
/* keep submitting up until a channel switch is detected
* in that case we will be called again as a result of
* processing the interrupt from async_tx_channel_switch
*/
for (; dep; dep = dep_next) {
txd_lock(dep);
txd_clear_parent(dep);
dep_next = txd_next(dep);
if (dep_next && dep_next->chan == chan)
txd_clear_next(dep); /* ->next will be submitted */
else
dep_next = NULL; /* submit current dep and terminate */
txd_unlock(dep);
dep->tx_submit(dep);
}
chan->device->device_issue_pending(chan);
}
EXPORT_SYMBOL_GPL(dma_run_dependencies);
static int __init dma_bus_init(void)
{
int err = dmaengine_init_unmap_pool();
if (err)
return err;
return class_register(&dma_devclass);
}
arch_initcall(dma_bus_init);
| gpl-2.0 |
ignatenkobrain/linux | drivers/cpufreq/arm_big_little.c | 234 | 15123 | /*
* ARM big.LITTLE Platforms CPUFreq support
*
* Copyright (C) 2013 ARM Ltd.
* Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
*
* Copyright (C) 2013 Linaro.
* Viresh Kumar <viresh.kumar@linaro.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/clk.h>
#include <linux/cpu.h>
#include <linux/cpufreq.h>
#include <linux/cpumask.h>
#include <linux/export.h>
#include <linux/mutex.h>
#include <linux/of_platform.h>
#include <linux/pm_opp.h>
#include <linux/slab.h>
#include <linux/topology.h>
#include <linux/types.h>
#include <asm/bL_switcher.h>
#include "arm_big_little.h"
/* Currently we support only two clusters */
#define A15_CLUSTER 0
#define A7_CLUSTER 1
#define MAX_CLUSTERS 2
#ifdef CONFIG_BL_SWITCHER
static bool bL_switching_enabled;
#define is_bL_switching_enabled() bL_switching_enabled
#define set_switching_enabled(x) (bL_switching_enabled = (x))
#else
#define is_bL_switching_enabled() false
#define set_switching_enabled(x) do { } while (0)
#endif
#define ACTUAL_FREQ(cluster, freq) ((cluster == A7_CLUSTER) ? freq << 1 : freq)
#define VIRT_FREQ(cluster, freq) ((cluster == A7_CLUSTER) ? freq >> 1 : freq)
static struct cpufreq_arm_bL_ops *arm_bL_ops;
static struct clk *clk[MAX_CLUSTERS];
static struct cpufreq_frequency_table *freq_table[MAX_CLUSTERS + 1];
static atomic_t cluster_usage[MAX_CLUSTERS + 1];
static unsigned int clk_big_min; /* (Big) clock frequencies */
static unsigned int clk_little_max; /* Maximum clock frequency (Little) */
static DEFINE_PER_CPU(unsigned int, physical_cluster);
static DEFINE_PER_CPU(unsigned int, cpu_last_req_freq);
static struct mutex cluster_lock[MAX_CLUSTERS];
static inline int raw_cpu_to_cluster(int cpu)
{
return topology_physical_package_id(cpu);
}
static inline int cpu_to_cluster(int cpu)
{
return is_bL_switching_enabled() ?
MAX_CLUSTERS : raw_cpu_to_cluster(cpu);
}
static unsigned int find_cluster_maxfreq(int cluster)
{
int j;
u32 max_freq = 0, cpu_freq;
for_each_online_cpu(j) {
cpu_freq = per_cpu(cpu_last_req_freq, j);
if ((cluster == per_cpu(physical_cluster, j)) &&
(max_freq < cpu_freq))
max_freq = cpu_freq;
}
pr_debug("%s: cluster: %d, max freq: %d\n", __func__, cluster,
max_freq);
return max_freq;
}
static unsigned int clk_get_cpu_rate(unsigned int cpu)
{
u32 cur_cluster = per_cpu(physical_cluster, cpu);
u32 rate = clk_get_rate(clk[cur_cluster]) / 1000;
/* For switcher we use virtual A7 clock rates */
if (is_bL_switching_enabled())
rate = VIRT_FREQ(cur_cluster, rate);
pr_debug("%s: cpu: %d, cluster: %d, freq: %u\n", __func__, cpu,
cur_cluster, rate);
return rate;
}
static unsigned int bL_cpufreq_get_rate(unsigned int cpu)
{
if (is_bL_switching_enabled()) {
pr_debug("%s: freq: %d\n", __func__, per_cpu(cpu_last_req_freq,
cpu));
return per_cpu(cpu_last_req_freq, cpu);
} else {
return clk_get_cpu_rate(cpu);
}
}
static unsigned int
bL_cpufreq_set_rate(u32 cpu, u32 old_cluster, u32 new_cluster, u32 rate)
{
u32 new_rate, prev_rate;
int ret;
bool bLs = is_bL_switching_enabled();
mutex_lock(&cluster_lock[new_cluster]);
if (bLs) {
prev_rate = per_cpu(cpu_last_req_freq, cpu);
per_cpu(cpu_last_req_freq, cpu) = rate;
per_cpu(physical_cluster, cpu) = new_cluster;
new_rate = find_cluster_maxfreq(new_cluster);
new_rate = ACTUAL_FREQ(new_cluster, new_rate);
} else {
new_rate = rate;
}
pr_debug("%s: cpu: %d, old cluster: %d, new cluster: %d, freq: %d\n",
__func__, cpu, old_cluster, new_cluster, new_rate);
ret = clk_set_rate(clk[new_cluster], new_rate * 1000);
if (WARN_ON(ret)) {
pr_err("clk_set_rate failed: %d, new cluster: %d\n", ret,
new_cluster);
if (bLs) {
per_cpu(cpu_last_req_freq, cpu) = prev_rate;
per_cpu(physical_cluster, cpu) = old_cluster;
}
mutex_unlock(&cluster_lock[new_cluster]);
return ret;
}
mutex_unlock(&cluster_lock[new_cluster]);
/* Recalc freq for old cluster when switching clusters */
if (old_cluster != new_cluster) {
pr_debug("%s: cpu: %d, old cluster: %d, new cluster: %d\n",
__func__, cpu, old_cluster, new_cluster);
/* Switch cluster */
bL_switch_request(cpu, new_cluster);
mutex_lock(&cluster_lock[old_cluster]);
/* Set freq of old cluster if there are cpus left on it */
new_rate = find_cluster_maxfreq(old_cluster);
new_rate = ACTUAL_FREQ(old_cluster, new_rate);
if (new_rate) {
pr_debug("%s: Updating rate of old cluster: %d, to freq: %d\n",
__func__, old_cluster, new_rate);
if (clk_set_rate(clk[old_cluster], new_rate * 1000))
pr_err("%s: clk_set_rate failed: %d, old cluster: %d\n",
__func__, ret, old_cluster);
}
mutex_unlock(&cluster_lock[old_cluster]);
}
return 0;
}
/* Set clock frequency */
static int bL_cpufreq_set_target(struct cpufreq_policy *policy,
unsigned int index)
{
u32 cpu = policy->cpu, cur_cluster, new_cluster, actual_cluster;
unsigned int freqs_new;
cur_cluster = cpu_to_cluster(cpu);
new_cluster = actual_cluster = per_cpu(physical_cluster, cpu);
freqs_new = freq_table[cur_cluster][index].frequency;
if (is_bL_switching_enabled()) {
if ((actual_cluster == A15_CLUSTER) &&
(freqs_new < clk_big_min)) {
new_cluster = A7_CLUSTER;
} else if ((actual_cluster == A7_CLUSTER) &&
(freqs_new > clk_little_max)) {
new_cluster = A15_CLUSTER;
}
}
return bL_cpufreq_set_rate(cpu, actual_cluster, new_cluster, freqs_new);
}
static inline u32 get_table_count(struct cpufreq_frequency_table *table)
{
int count;
for (count = 0; table[count].frequency != CPUFREQ_TABLE_END; count++)
;
return count;
}
/* get the minimum frequency in the cpufreq_frequency_table */
static inline u32 get_table_min(struct cpufreq_frequency_table *table)
{
int i;
uint32_t min_freq = ~0;
for (i = 0; (table[i].frequency != CPUFREQ_TABLE_END); i++)
if (table[i].frequency < min_freq)
min_freq = table[i].frequency;
return min_freq;
}
/* get the maximum frequency in the cpufreq_frequency_table */
static inline u32 get_table_max(struct cpufreq_frequency_table *table)
{
int i;
uint32_t max_freq = 0;
for (i = 0; (table[i].frequency != CPUFREQ_TABLE_END); i++)
if (table[i].frequency > max_freq)
max_freq = table[i].frequency;
return max_freq;
}
static int merge_cluster_tables(void)
{
int i, j, k = 0, count = 1;
struct cpufreq_frequency_table *table;
for (i = 0; i < MAX_CLUSTERS; i++)
count += get_table_count(freq_table[i]);
table = kzalloc(sizeof(*table) * count, GFP_KERNEL);
if (!table)
return -ENOMEM;
freq_table[MAX_CLUSTERS] = table;
/* Add in reverse order to get freqs in increasing order */
for (i = MAX_CLUSTERS - 1; i >= 0; i--) {
for (j = 0; freq_table[i][j].frequency != CPUFREQ_TABLE_END;
j++) {
table[k].frequency = VIRT_FREQ(i,
freq_table[i][j].frequency);
pr_debug("%s: index: %d, freq: %d\n", __func__, k,
table[k].frequency);
k++;
}
}
table[k].driver_data = k;
table[k].frequency = CPUFREQ_TABLE_END;
pr_debug("%s: End, table: %p, count: %d\n", __func__, table, k);
return 0;
}
static void _put_cluster_clk_and_freq_table(struct device *cpu_dev)
{
u32 cluster = raw_cpu_to_cluster(cpu_dev->id);
if (!freq_table[cluster])
return;
clk_put(clk[cluster]);
dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table[cluster]);
dev_dbg(cpu_dev, "%s: cluster: %d\n", __func__, cluster);
}
static void put_cluster_clk_and_freq_table(struct device *cpu_dev)
{
u32 cluster = cpu_to_cluster(cpu_dev->id);
int i;
if (atomic_dec_return(&cluster_usage[cluster]))
return;
if (cluster < MAX_CLUSTERS)
return _put_cluster_clk_and_freq_table(cpu_dev);
for_each_present_cpu(i) {
struct device *cdev = get_cpu_device(i);
if (!cdev) {
pr_err("%s: failed to get cpu%d device\n", __func__, i);
return;
}
_put_cluster_clk_and_freq_table(cdev);
}
/* free virtual table */
kfree(freq_table[cluster]);
}
static int _get_cluster_clk_and_freq_table(struct device *cpu_dev)
{
u32 cluster = raw_cpu_to_cluster(cpu_dev->id);
char name[14] = "cpu-cluster.";
int ret;
if (freq_table[cluster])
return 0;
ret = arm_bL_ops->init_opp_table(cpu_dev);
if (ret) {
dev_err(cpu_dev, "%s: init_opp_table failed, cpu: %d, err: %d\n",
__func__, cpu_dev->id, ret);
goto out;
}
ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table[cluster]);
if (ret) {
dev_err(cpu_dev, "%s: failed to init cpufreq table, cpu: %d, err: %d\n",
__func__, cpu_dev->id, ret);
goto out;
}
name[12] = cluster + '0';
clk[cluster] = clk_get(cpu_dev, name);
if (!IS_ERR(clk[cluster])) {
dev_dbg(cpu_dev, "%s: clk: %p & freq table: %p, cluster: %d\n",
__func__, clk[cluster], freq_table[cluster],
cluster);
return 0;
}
dev_err(cpu_dev, "%s: Failed to get clk for cpu: %d, cluster: %d\n",
__func__, cpu_dev->id, cluster);
ret = PTR_ERR(clk[cluster]);
dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table[cluster]);
out:
dev_err(cpu_dev, "%s: Failed to get data for cluster: %d\n", __func__,
cluster);
return ret;
}
static int get_cluster_clk_and_freq_table(struct device *cpu_dev)
{
u32 cluster = cpu_to_cluster(cpu_dev->id);
int i, ret;
if (atomic_inc_return(&cluster_usage[cluster]) != 1)
return 0;
if (cluster < MAX_CLUSTERS) {
ret = _get_cluster_clk_and_freq_table(cpu_dev);
if (ret)
atomic_dec(&cluster_usage[cluster]);
return ret;
}
/*
* Get data for all clusters and fill virtual cluster with a merge of
* both
*/
for_each_present_cpu(i) {
struct device *cdev = get_cpu_device(i);
if (!cdev) {
pr_err("%s: failed to get cpu%d device\n", __func__, i);
return -ENODEV;
}
ret = _get_cluster_clk_and_freq_table(cdev);
if (ret)
goto put_clusters;
}
ret = merge_cluster_tables();
if (ret)
goto put_clusters;
/* Assuming 2 cluster, set clk_big_min and clk_little_max */
clk_big_min = get_table_min(freq_table[0]);
clk_little_max = VIRT_FREQ(1, get_table_max(freq_table[1]));
pr_debug("%s: cluster: %d, clk_big_min: %d, clk_little_max: %d\n",
__func__, cluster, clk_big_min, clk_little_max);
return 0;
put_clusters:
for_each_present_cpu(i) {
struct device *cdev = get_cpu_device(i);
if (!cdev) {
pr_err("%s: failed to get cpu%d device\n", __func__, i);
return -ENODEV;
}
_put_cluster_clk_and_freq_table(cdev);
}
atomic_dec(&cluster_usage[cluster]);
return ret;
}
/* Per-CPU initialization */
static int bL_cpufreq_init(struct cpufreq_policy *policy)
{
u32 cur_cluster = cpu_to_cluster(policy->cpu);
struct device *cpu_dev;
int ret;
cpu_dev = get_cpu_device(policy->cpu);
if (!cpu_dev) {
pr_err("%s: failed to get cpu%d device\n", __func__,
policy->cpu);
return -ENODEV;
}
ret = get_cluster_clk_and_freq_table(cpu_dev);
if (ret)
return ret;
ret = cpufreq_table_validate_and_show(policy, freq_table[cur_cluster]);
if (ret) {
dev_err(cpu_dev, "CPU %d, cluster: %d invalid freq table\n",
policy->cpu, cur_cluster);
put_cluster_clk_and_freq_table(cpu_dev);
return ret;
}
if (cur_cluster < MAX_CLUSTERS) {
cpumask_copy(policy->cpus, topology_core_cpumask(policy->cpu));
per_cpu(physical_cluster, policy->cpu) = cur_cluster;
} else {
/* Assumption: during init, we are always running on A15 */
per_cpu(physical_cluster, policy->cpu) = A15_CLUSTER;
}
if (arm_bL_ops->get_transition_latency)
policy->cpuinfo.transition_latency =
arm_bL_ops->get_transition_latency(cpu_dev);
else
policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
if (is_bL_switching_enabled())
per_cpu(cpu_last_req_freq, policy->cpu) = clk_get_cpu_rate(policy->cpu);
dev_info(cpu_dev, "%s: CPU %d initialized\n", __func__, policy->cpu);
return 0;
}
static int bL_cpufreq_exit(struct cpufreq_policy *policy)
{
struct device *cpu_dev;
cpu_dev = get_cpu_device(policy->cpu);
if (!cpu_dev) {
pr_err("%s: failed to get cpu%d device\n", __func__,
policy->cpu);
return -ENODEV;
}
cpufreq_frequency_table_put_attr(policy->cpu);
put_cluster_clk_and_freq_table(cpu_dev);
dev_dbg(cpu_dev, "%s: Exited, cpu: %d\n", __func__, policy->cpu);
return 0;
}
static struct cpufreq_driver bL_cpufreq_driver = {
.name = "arm-big-little",
.flags = CPUFREQ_STICKY |
CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
CPUFREQ_NEED_INITIAL_FREQ_CHECK,
.verify = cpufreq_generic_frequency_table_verify,
.target_index = bL_cpufreq_set_target,
.get = bL_cpufreq_get_rate,
.init = bL_cpufreq_init,
.exit = bL_cpufreq_exit,
.attr = cpufreq_generic_attr,
};
static int bL_cpufreq_switcher_notifier(struct notifier_block *nfb,
unsigned long action, void *_arg)
{
pr_debug("%s: action: %ld\n", __func__, action);
switch (action) {
case BL_NOTIFY_PRE_ENABLE:
case BL_NOTIFY_PRE_DISABLE:
cpufreq_unregister_driver(&bL_cpufreq_driver);
break;
case BL_NOTIFY_POST_ENABLE:
set_switching_enabled(true);
cpufreq_register_driver(&bL_cpufreq_driver);
break;
case BL_NOTIFY_POST_DISABLE:
set_switching_enabled(false);
cpufreq_register_driver(&bL_cpufreq_driver);
break;
default:
return NOTIFY_DONE;
}
return NOTIFY_OK;
}
static struct notifier_block bL_switcher_notifier = {
.notifier_call = bL_cpufreq_switcher_notifier,
};
int bL_cpufreq_register(struct cpufreq_arm_bL_ops *ops)
{
int ret, i;
if (arm_bL_ops) {
pr_debug("%s: Already registered: %s, exiting\n", __func__,
arm_bL_ops->name);
return -EBUSY;
}
if (!ops || !strlen(ops->name) || !ops->init_opp_table) {
pr_err("%s: Invalid arm_bL_ops, exiting\n", __func__);
return -ENODEV;
}
arm_bL_ops = ops;
ret = bL_switcher_get_enabled();
set_switching_enabled(ret);
for (i = 0; i < MAX_CLUSTERS; i++)
mutex_init(&cluster_lock[i]);
ret = cpufreq_register_driver(&bL_cpufreq_driver);
if (ret) {
pr_info("%s: Failed registering platform driver: %s, err: %d\n",
__func__, ops->name, ret);
arm_bL_ops = NULL;
} else {
ret = bL_switcher_register_notifier(&bL_switcher_notifier);
if (ret) {
cpufreq_unregister_driver(&bL_cpufreq_driver);
arm_bL_ops = NULL;
} else {
pr_info("%s: Registered platform driver: %s\n",
__func__, ops->name);
}
}
bL_switcher_put_enabled();
return ret;
}
EXPORT_SYMBOL_GPL(bL_cpufreq_register);
void bL_cpufreq_unregister(struct cpufreq_arm_bL_ops *ops)
{
if (arm_bL_ops != ops) {
pr_err("%s: Registered with: %s, can't unregister, exiting\n",
__func__, arm_bL_ops->name);
return;
}
bL_switcher_get_enabled();
bL_switcher_unregister_notifier(&bL_switcher_notifier);
cpufreq_unregister_driver(&bL_cpufreq_driver);
bL_switcher_put_enabled();
pr_info("%s: Un-registered platform driver: %s\n", __func__,
arm_bL_ops->name);
arm_bL_ops = NULL;
}
EXPORT_SYMBOL_GPL(bL_cpufreq_unregister);
| gpl-2.0 |
CyanogenMod/geeksphone-kernel-zero | drivers/serial/68360serial.c | 1514 | 76262 | /*
* UART driver for 68360 CPM SCC or SMC
* Copyright (c) 2000 D. Jeff Dionne <jeff@uclinux.org>,
* Copyright (c) 2000 Michael Leslie <mleslie@lineo.ca>
* Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
*
* I used the serial.c driver as the framework for this driver.
* Give credit to those guys.
* The original code was written for the MBX860 board. I tried to make
* it generic, but there may be some assumptions in the structures that
* have to be fixed later.
* To save porting time, I did not bother to change any object names
* that are not accessed outside of this file.
* It still needs lots of work........When it was easy, I included code
* to support the SCCs, but this has never been tested, nor is it complete.
* Only the SCCs support modem control, so that is not complete either.
*
* This module exports the following rs232 io functions:
*
* int rs_360_init(void);
*/
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
#include <linux/serial.h>
#include <linux/serialP.h>
#include <linux/major.h>
#include <linux/string.h>
#include <linux/fcntl.h>
#include <linux/ptrace.h>
#include <linux/mm.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <asm/irq.h>
#include <asm/m68360.h>
#include <asm/commproc.h>
#ifdef CONFIG_KGDB
extern void breakpoint(void);
extern void set_debug_traps(void);
extern int kgdb_output_string (const char* s, unsigned int count);
#endif
/* #ifdef CONFIG_SERIAL_CONSOLE */ /* This seems to be a post 2.0 thing - mles */
#include <linux/console.h>
#include <linux/jiffies.h>
/* this defines the index into rs_table for the port to use
*/
#ifndef CONFIG_SERIAL_CONSOLE_PORT
#define CONFIG_SERIAL_CONSOLE_PORT 1 /* ie SMC2 - note USE_SMC2 must be defined */
#endif
/* #endif */
#if 0
/* SCC2 for console
*/
#undef CONFIG_SERIAL_CONSOLE_PORT
#define CONFIG_SERIAL_CONSOLE_PORT 2
#endif
#define TX_WAKEUP ASYNC_SHARE_IRQ
static char *serial_name = "CPM UART driver";
static char *serial_version = "0.03";
static struct tty_driver *serial_driver;
int serial_console_setup(struct console *co, char *options);
/*
* Serial driver configuration section. Here are the various options:
*/
#define SERIAL_PARANOIA_CHECK
#define CONFIG_SERIAL_NOPAUSE_IO
#define SERIAL_DO_RESTART
/* Set of debugging defines */
#undef SERIAL_DEBUG_INTR
#undef SERIAL_DEBUG_OPEN
#undef SERIAL_DEBUG_FLOW
#undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
#define _INLINE_ inline
#define DBG_CNT(s)
/* We overload some of the items in the data structure to meet our
* needs. For example, the port address is the CPM parameter ram
* offset for the SCC or SMC. The maximum number of ports is 4 SCCs and
* 2 SMCs. The "hub6" field is used to indicate the channel number, with
* a flag indicating SCC or SMC, and the number is used as an index into
* the CPM parameter area for this device.
* The "type" field is currently set to 0, for PORT_UNKNOWN. It is
* not currently used. I should probably use it to indicate the port
* type of SMC or SCC.
* The SMCs do not support any modem control signals.
*/
#define smc_scc_num hub6
#define NUM_IS_SCC ((int)0x00010000)
#define PORT_NUM(P) ((P) & 0x0000ffff)
#if defined (CONFIG_UCQUICC)
volatile extern void *_periph_base;
/* sipex transceiver
* mode bits for are on pins
*
* SCC2 d16..19
* SCC3 d20..23
* SCC4 d24..27
*/
#define SIPEX_MODE(n,m) ((m & 0x0f)<<(16+4*(n-1)))
static uint sipex_mode_bits = 0x00000000;
#endif
/* There is no `serial_state' defined back here in 2.0.
* Try to get by with serial_struct
*/
/* #define serial_state serial_struct */
/* 2.4 -> 2.0 portability problem: async_icount in 2.4 has a few
* extras: */
#if 0
struct async_icount_24 {
__u32 cts, dsr, rng, dcd, tx, rx;
__u32 frame, parity, overrun, brk;
__u32 buf_overrun;
} icount;
#endif
#if 0
struct serial_state {
int magic;
int baud_base;
unsigned long port;
int irq;
int flags;
int hub6;
int type;
int line;
int revision; /* Chip revision (950) */
int xmit_fifo_size;
int custom_divisor;
int count;
u8 *iomem_base;
u16 iomem_reg_shift;
unsigned short close_delay;
unsigned short closing_wait; /* time to wait before closing */
struct async_icount_24 icount;
int io_type;
struct async_struct *info;
};
#endif
#define SSTATE_MAGIC 0x5302
/* SMC2 is sometimes used for low performance TDM interfaces. Define
* this as 1 if you want SMC2 as a serial port UART managed by this driver.
* Define this as 0 if you wish to use SMC2 for something else.
*/
#define USE_SMC2 1
#if 0
/* Define SCC to ttySx mapping. */
#define SCC_NUM_BASE (USE_SMC2 + 1) /* SCC base tty "number" */
/* Define which SCC is the first one to use for a serial port. These
* are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used
* for Ethernet, and the first available SCC for serial UART is SCC2.
* NOTE: IF YOU CHANGE THIS, you have to change the PROFF_xxx and
* interrupt vectors in the table below to match.
*/
#define SCC_IDX_BASE 1 /* table index */
#endif
/* Processors other than the 860 only get SMCs configured by default.
* Either they don't have SCCs or they are allocated somewhere else.
* Of course, there are now 860s without some SCCs, so we will need to
* address that someday.
* The Embedded Planet Multimedia I/O cards use TDM interfaces to the
* stereo codec parts, and we use SMC2 to help support that.
*/
static struct serial_state rs_table[] = {
/* type line PORT IRQ FLAGS smc_scc_num (F.K.A. hub6) */
{ 0, 0, PRSLOT_SMC1, CPMVEC_SMC1, 0, 0 } /* SMC1 ttyS0 */
#if USE_SMC2
,{ 0, 0, PRSLOT_SMC2, CPMVEC_SMC2, 0, 1 } /* SMC2 ttyS1 */
#endif
#if defined(CONFIG_SERIAL_68360_SCC)
,{ 0, 0, PRSLOT_SCC2, CPMVEC_SCC2, 0, (NUM_IS_SCC | 1) } /* SCC2 ttyS2 */
,{ 0, 0, PRSLOT_SCC3, CPMVEC_SCC3, 0, (NUM_IS_SCC | 2) } /* SCC3 ttyS3 */
,{ 0, 0, PRSLOT_SCC4, CPMVEC_SCC4, 0, (NUM_IS_SCC | 3) } /* SCC4 ttyS4 */
#endif
};
#define NR_PORTS (sizeof(rs_table)/sizeof(struct serial_state))
/* The number of buffer descriptors and their sizes.
*/
#define RX_NUM_FIFO 4
#define RX_BUF_SIZE 32
#define TX_NUM_FIFO 4
#define TX_BUF_SIZE 32
#define CONSOLE_NUM_FIFO 2
#define CONSOLE_BUF_SIZE 4
char *console_fifos[CONSOLE_NUM_FIFO * CONSOLE_BUF_SIZE];
/* The async_struct in serial.h does not really give us what we
* need, so define our own here.
*/
typedef struct serial_info {
int magic;
int flags;
struct serial_state *state;
/* struct serial_struct *state; */
/* struct async_struct *state; */
struct tty_struct *tty;
int read_status_mask;
int ignore_status_mask;
int timeout;
int line;
int x_char; /* xon/xoff character */
int close_delay;
unsigned short closing_wait;
unsigned short closing_wait2;
unsigned long event;
unsigned long last_active;
int blocked_open; /* # of blocked opens */
struct work_struct tqueue;
struct work_struct tqueue_hangup;
wait_queue_head_t open_wait;
wait_queue_head_t close_wait;
/* CPM Buffer Descriptor pointers.
*/
QUICC_BD *rx_bd_base;
QUICC_BD *rx_cur;
QUICC_BD *tx_bd_base;
QUICC_BD *tx_cur;
} ser_info_t;
/* since kmalloc_init() does not get called until much after this initialization: */
static ser_info_t quicc_ser_info[NR_PORTS];
static char rx_buf_pool[NR_PORTS * RX_NUM_FIFO * RX_BUF_SIZE];
static char tx_buf_pool[NR_PORTS * TX_NUM_FIFO * TX_BUF_SIZE];
static void change_speed(ser_info_t *info);
static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout);
static inline int serial_paranoia_check(ser_info_t *info,
char *name, const char *routine)
{
#ifdef SERIAL_PARANOIA_CHECK
static const char *badmagic =
"Warning: bad magic number for serial struct (%s) in %s\n";
static const char *badinfo =
"Warning: null async_struct for (%s) in %s\n";
if (!info) {
printk(badinfo, name, routine);
return 1;
}
if (info->magic != SERIAL_MAGIC) {
printk(badmagic, name, routine);
return 1;
}
#endif
return 0;
}
/*
* This is used to figure out the divisor speeds and the timeouts,
* indexed by the termio value. The generic CPM functions are responsible
* for setting and assigning baud rate generators for us.
*/
static int baud_table[] = {
0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };
/* This sucks. There is a better way: */
#if defined(CONFIG_CONSOLE_9600)
#define CONSOLE_BAUDRATE 9600
#elif defined(CONFIG_CONSOLE_19200)
#define CONSOLE_BAUDRATE 19200
#elif defined(CONFIG_CONSOLE_115200)
#define CONSOLE_BAUDRATE 115200
#else
#warning "console baud rate undefined"
#define CONSOLE_BAUDRATE 9600
#endif
/*
* ------------------------------------------------------------
* rs_stop() and rs_start()
*
* This routines are called before setting or resetting tty->stopped.
* They enable or disable transmitter interrupts, as necessary.
* ------------------------------------------------------------
*/
static void rs_360_stop(struct tty_struct *tty)
{
ser_info_t *info = (ser_info_t *)tty->driver_data;
int idx;
unsigned long flags;
volatile struct scc_regs *sccp;
volatile struct smc_regs *smcp;
if (serial_paranoia_check(info, tty->name, "rs_stop"))
return;
local_irq_save(flags);
idx = PORT_NUM(info->state->smc_scc_num);
if (info->state->smc_scc_num & NUM_IS_SCC) {
sccp = &pquicc->scc_regs[idx];
sccp->scc_sccm &= ~UART_SCCM_TX;
} else {
/* smcp = &cpmp->cp_smc[idx]; */
smcp = &pquicc->smc_regs[idx];
smcp->smc_smcm &= ~SMCM_TX;
}
local_irq_restore(flags);
}
static void rs_360_start(struct tty_struct *tty)
{
ser_info_t *info = (ser_info_t *)tty->driver_data;
int idx;
unsigned long flags;
volatile struct scc_regs *sccp;
volatile struct smc_regs *smcp;
if (serial_paranoia_check(info, tty->name, "rs_stop"))
return;
local_irq_save(flags);
idx = PORT_NUM(info->state->smc_scc_num);
if (info->state->smc_scc_num & NUM_IS_SCC) {
sccp = &pquicc->scc_regs[idx];
sccp->scc_sccm |= UART_SCCM_TX;
} else {
smcp = &pquicc->smc_regs[idx];
smcp->smc_smcm |= SMCM_TX;
}
local_irq_restore(flags);
}
/*
* ----------------------------------------------------------------------
*
* Here starts the interrupt handling routines. All of the following
* subroutines are declared as inline and are folded into
* rs_interrupt(). They were separated out for readability's sake.
*
* Note: rs_interrupt() is a "fast" interrupt, which means that it
* runs with interrupts turned off. People who may want to modify
* rs_interrupt() should try to keep the interrupt handler as fast as
* possible. After you are done making modifications, it is not a bad
* idea to do:
*
* gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
*
* and look at the resulting assemble code in serial.s.
*
* - Ted Ts'o (tytso@mit.edu), 7-Mar-93
* -----------------------------------------------------------------------
*/
static _INLINE_ void receive_chars(ser_info_t *info)
{
struct tty_struct *tty = info->port.tty;
unsigned char ch, flag, *cp;
/*int ignored = 0;*/
int i;
ushort status;
struct async_icount *icount;
/* struct async_icount_24 *icount; */
volatile QUICC_BD *bdp;
icount = &info->state->icount;
/* Just loop through the closed BDs and copy the characters into
* the buffer.
*/
bdp = info->rx_cur;
for (;;) {
if (bdp->status & BD_SC_EMPTY) /* If this one is empty */
break; /* we are all done */
/* The read status mask tell us what we should do with
* incoming characters, especially if errors occur.
* One special case is the use of BD_SC_EMPTY. If
* this is not set, we are supposed to be ignoring
* inputs. In this case, just mark the buffer empty and
* continue.
*/
if (!(info->read_status_mask & BD_SC_EMPTY)) {
bdp->status |= BD_SC_EMPTY;
bdp->status &=
~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
if (bdp->status & BD_SC_WRAP)
bdp = info->rx_bd_base;
else
bdp++;
continue;
}
/* Get the number of characters and the buffer pointer.
*/
i = bdp->length;
/* cp = (unsigned char *)__va(bdp->buf); */
cp = (char *)bdp->buf;
status = bdp->status;
while (i-- > 0) {
ch = *cp++;
icount->rx++;
#ifdef SERIAL_DEBUG_INTR
printk("DR%02x:%02x...", ch, status);
#endif
flag = TTY_NORMAL;
if (status & (BD_SC_BR | BD_SC_FR |
BD_SC_PR | BD_SC_OV)) {
/*
* For statistics only
*/
if (status & BD_SC_BR)
icount->brk++;
else if (status & BD_SC_PR)
icount->parity++;
else if (status & BD_SC_FR)
icount->frame++;
if (status & BD_SC_OV)
icount->overrun++;
/*
* Now check to see if character should be
* ignored, and mask off conditions which
* should be ignored.
if (status & info->ignore_status_mask) {
if (++ignored > 100)
break;
continue;
}
*/
status &= info->read_status_mask;
if (status & (BD_SC_BR)) {
#ifdef SERIAL_DEBUG_INTR
printk("handling break....");
#endif
*tty->flip.flag_buf_ptr = TTY_BREAK;
if (info->flags & ASYNC_SAK)
do_SAK(tty);
} else if (status & BD_SC_PR)
flag = TTY_PARITY;
else if (status & BD_SC_FR)
flag = TTY_FRAME;
}
tty_insert_flip_char(tty, ch, flag);
if (status & BD_SC_OV)
/*
* Overrun is special, since it's
* reported immediately, and doesn't
* affect the current character
*/
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
}
/* This BD is ready to be used again. Clear status.
* Get next BD.
*/
bdp->status |= BD_SC_EMPTY;
bdp->status &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
if (bdp->status & BD_SC_WRAP)
bdp = info->rx_bd_base;
else
bdp++;
}
info->rx_cur = (QUICC_BD *)bdp;
tty_schedule_flip(tty);
}
static _INLINE_ void receive_break(ser_info_t *info)
{
struct tty_struct *tty = info->port.tty;
info->state->icount.brk++;
/* Check to see if there is room in the tty buffer for
* the break. If not, we exit now, losing the break. FIXME
*/
tty_insert_flip_char(tty, 0, TTY_BREAK);
tty_schedule_flip(tty);
}
static _INLINE_ void transmit_chars(ser_info_t *info)
{
if ((info->flags & TX_WAKEUP) ||
(info->port.tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) {
schedule_work(&info->tqueue);
}
#ifdef SERIAL_DEBUG_INTR
printk("THRE...");
#endif
}
#ifdef notdef
/* I need to do this for the SCCs, so it is left as a reminder.
*/
static _INLINE_ void check_modem_status(struct async_struct *info)
{
int status;
/* struct async_icount *icount; */
struct async_icount_24 *icount;
status = serial_in(info, UART_MSR);
if (status & UART_MSR_ANY_DELTA) {
icount = &info->state->icount;
/* update input line counters */
if (status & UART_MSR_TERI)
icount->rng++;
if (status & UART_MSR_DDSR)
icount->dsr++;
if (status & UART_MSR_DDCD) {
icount->dcd++;
#ifdef CONFIG_HARD_PPS
if ((info->flags & ASYNC_HARDPPS_CD) &&
(status & UART_MSR_DCD))
hardpps();
#endif
}
if (status & UART_MSR_DCTS)
icount->cts++;
wake_up_interruptible(&info->delta_msr_wait);
}
if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
#if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
printk("ttys%d CD now %s...", info->line,
(status & UART_MSR_DCD) ? "on" : "off");
#endif
if (status & UART_MSR_DCD)
wake_up_interruptible(&info->open_wait);
else {
#ifdef SERIAL_DEBUG_OPEN
printk("scheduling hangup...");
#endif
queue_task(&info->tqueue_hangup,
&tq_scheduler);
}
}
if (info->flags & ASYNC_CTS_FLOW) {
if (info->port.tty->hw_stopped) {
if (status & UART_MSR_CTS) {
#if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
printk("CTS tx start...");
#endif
info->port.tty->hw_stopped = 0;
info->IER |= UART_IER_THRI;
serial_out(info, UART_IER, info->IER);
rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
return;
}
} else {
if (!(status & UART_MSR_CTS)) {
#if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
printk("CTS tx stop...");
#endif
info->port.tty->hw_stopped = 1;
info->IER &= ~UART_IER_THRI;
serial_out(info, UART_IER, info->IER);
}
}
}
}
#endif
/*
* This is the serial driver's interrupt routine for a single port
*/
/* static void rs_360_interrupt(void *dev_id) */ /* until and if we start servicing irqs here */
static void rs_360_interrupt(int vec, void *dev_id)
{
u_char events;
int idx;
ser_info_t *info;
volatile struct smc_regs *smcp;
volatile struct scc_regs *sccp;
info = dev_id;
idx = PORT_NUM(info->state->smc_scc_num);
if (info->state->smc_scc_num & NUM_IS_SCC) {
sccp = &pquicc->scc_regs[idx];
events = sccp->scc_scce;
if (events & SCCM_RX)
receive_chars(info);
if (events & SCCM_TX)
transmit_chars(info);
sccp->scc_scce = events;
} else {
smcp = &pquicc->smc_regs[idx];
events = smcp->smc_smce;
if (events & SMCM_BRKE)
receive_break(info);
if (events & SMCM_RX)
receive_chars(info);
if (events & SMCM_TX)
transmit_chars(info);
smcp->smc_smce = events;
}
#ifdef SERIAL_DEBUG_INTR
printk("rs_interrupt_single(%d, %x)...",
info->state->smc_scc_num, events);
#endif
#ifdef modem_control
check_modem_status(info);
#endif
info->last_active = jiffies;
#ifdef SERIAL_DEBUG_INTR
printk("end.\n");
#endif
}
/*
* -------------------------------------------------------------------
* Here ends the serial interrupt routines.
* -------------------------------------------------------------------
*/
static void do_softint(void *private_)
{
ser_info_t *info = (ser_info_t *) private_;
struct tty_struct *tty;
tty = info->port.tty;
if (!tty)
return;
if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
tty_wakeup(tty);
}
/*
* This routine is called from the scheduler tqueue when the interrupt
* routine has signalled that a hangup has occurred. The path of
* hangup processing is:
*
* serial interrupt routine -> (scheduler tqueue) ->
* do_serial_hangup() -> tty->hangup() -> rs_hangup()
*
*/
static void do_serial_hangup(void *private_)
{
struct async_struct *info = (struct async_struct *) private_;
struct tty_struct *tty;
tty = info->port.tty;
if (!tty)
return;
tty_hangup(tty);
}
static int startup(ser_info_t *info)
{
unsigned long flags;
int retval=0;
int idx;
/*struct serial_state *state = info->state;*/
volatile struct smc_regs *smcp;
volatile struct scc_regs *sccp;
volatile struct smc_uart_pram *up;
volatile struct uart_pram *scup;
local_irq_save(flags);
if (info->flags & ASYNC_INITIALIZED) {
goto errout;
}
#ifdef maybe
if (!state->port || !state->type) {
if (info->port.tty)
set_bit(TTY_IO_ERROR, &info->port.tty->flags);
goto errout;
}
#endif
#ifdef SERIAL_DEBUG_OPEN
printk("starting up ttys%d (irq %d)...", info->line, state->irq);
#endif
#ifdef modem_control
info->MCR = 0;
if (info->port.tty->termios->c_cflag & CBAUD)
info->MCR = UART_MCR_DTR | UART_MCR_RTS;
#endif
if (info->port.tty)
clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
/*
* and set the speed of the serial port
*/
change_speed(info);
idx = PORT_NUM(info->state->smc_scc_num);
if (info->state->smc_scc_num & NUM_IS_SCC) {
sccp = &pquicc->scc_regs[idx];
scup = &pquicc->pram[info->state->port].scc.pscc.u;
scup->mrblr = RX_BUF_SIZE;
scup->max_idl = RX_BUF_SIZE;
sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX);
sccp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
} else {
smcp = &pquicc->smc_regs[idx];
/* Enable interrupts and I/O.
*/
smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
/* We can tune the buffer length and idle characters
* to take advantage of the entire incoming buffer size.
* If mrblr is something other than 1, maxidl has to be
* non-zero or we never get an interrupt. The maxidl
* is the number of character times we wait after reception
* of the last character before we decide no more characters
* are coming.
*/
/* up = (smc_uart_t *)&pquicc->cp_dparam[state->port]; */
/* holy unionized structures, Batman: */
up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
up->mrblr = RX_BUF_SIZE;
up->max_idl = RX_BUF_SIZE;
up->brkcr = 1; /* number of break chars */
}
info->flags |= ASYNC_INITIALIZED;
local_irq_restore(flags);
return 0;
errout:
local_irq_restore(flags);
return retval;
}
/*
* This routine will shutdown a serial port; interrupts are disabled, and
* DTR is dropped if the hangup on close termio flag is on.
*/
static void shutdown(ser_info_t *info)
{
unsigned long flags;
struct serial_state *state;
int idx;
volatile struct smc_regs *smcp;
volatile struct scc_regs *sccp;
if (!(info->flags & ASYNC_INITIALIZED))
return;
state = info->state;
#ifdef SERIAL_DEBUG_OPEN
printk("Shutting down serial port %d (irq %d)....", info->line,
state->irq);
#endif
local_irq_save(flags);
idx = PORT_NUM(state->smc_scc_num);
if (state->smc_scc_num & NUM_IS_SCC) {
sccp = &pquicc->scc_regs[idx];
sccp->scc_gsmr.w.low &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
#ifdef CONFIG_SERIAL_CONSOLE
/* We can't disable the transmitter if this is the
* system console.
*/
if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
#endif
sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
} else {
smcp = &pquicc->smc_regs[idx];
/* Disable interrupts and I/O.
*/
smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
#ifdef CONFIG_SERIAL_CONSOLE
/* We can't disable the transmitter if this is the
* system console.
*/
if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
#endif
smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
}
if (info->port.tty)
set_bit(TTY_IO_ERROR, &info->port.tty->flags);
info->flags &= ~ASYNC_INITIALIZED;
local_irq_restore(flags);
}
/*
* This routine is called to set the UART divisor registers to match
* the specified baud rate for a serial port.
*/
static void change_speed(ser_info_t *info)
{
int baud_rate;
unsigned cflag, cval, scval, prev_mode;
int i, bits, sbits, idx;
unsigned long flags;
struct serial_state *state;
volatile struct smc_regs *smcp;
volatile struct scc_regs *sccp;
if (!info->port.tty || !info->port.tty->termios)
return;
cflag = info->port.tty->termios->c_cflag;
state = info->state;
/* Character length programmed into the mode register is the
* sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
* 1 or 2 stop bits, minus 1.
* The value 'bits' counts this for us.
*/
cval = 0;
scval = 0;
/* byte size and parity */
switch (cflag & CSIZE) {
case CS5: bits = 5; break;
case CS6: bits = 6; break;
case CS7: bits = 7; break;
case CS8: bits = 8; break;
/* Never happens, but GCC is too dumb to figure it out */
default: bits = 8; break;
}
sbits = bits - 5;
if (cflag & CSTOPB) {
cval |= SMCMR_SL; /* Two stops */
scval |= SCU_PMSR_SL;
bits++;
}
if (cflag & PARENB) {
cval |= SMCMR_PEN;
scval |= SCU_PMSR_PEN;
bits++;
}
if (!(cflag & PARODD)) {
cval |= SMCMR_PM_EVEN;
scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
}
/* Determine divisor based on baud rate */
i = cflag & CBAUD;
if (i >= (sizeof(baud_table)/sizeof(int)))
baud_rate = 9600;
else
baud_rate = baud_table[i];
info->timeout = (TX_BUF_SIZE*HZ*bits);
info->timeout += HZ/50; /* Add .02 seconds of slop */
#ifdef modem_control
/* CTS flow control flag and modem status interrupts */
info->IER &= ~UART_IER_MSI;
if (info->flags & ASYNC_HARDPPS_CD)
info->IER |= UART_IER_MSI;
if (cflag & CRTSCTS) {
info->flags |= ASYNC_CTS_FLOW;
info->IER |= UART_IER_MSI;
} else
info->flags &= ~ASYNC_CTS_FLOW;
if (cflag & CLOCAL)
info->flags &= ~ASYNC_CHECK_CD;
else {
info->flags |= ASYNC_CHECK_CD;
info->IER |= UART_IER_MSI;
}
serial_out(info, UART_IER, info->IER);
#endif
/*
* Set up parity check flag
*/
info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
if (I_INPCK(info->port.tty))
info->read_status_mask |= BD_SC_FR | BD_SC_PR;
if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
info->read_status_mask |= BD_SC_BR;
/*
* Characters to ignore
*/
info->ignore_status_mask = 0;
if (I_IGNPAR(info->port.tty))
info->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
if (I_IGNBRK(info->port.tty)) {
info->ignore_status_mask |= BD_SC_BR;
/*
* If we're ignore parity and break indicators, ignore
* overruns too. (For real raw support).
*/
if (I_IGNPAR(info->port.tty))
info->ignore_status_mask |= BD_SC_OV;
}
/*
* !!! ignore all characters if CREAD is not set
*/
if ((cflag & CREAD) == 0)
info->read_status_mask &= ~BD_SC_EMPTY;
local_irq_save(flags);
/* Start bit has not been added (so don't, because we would just
* subtract it later), and we need to add one for the number of
* stops bits (there is always at least one).
*/
bits++;
idx = PORT_NUM(state->smc_scc_num);
if (state->smc_scc_num & NUM_IS_SCC) {
sccp = &pquicc->scc_regs[idx];
sccp->scc_psmr = (sbits << 12) | scval;
} else {
smcp = &pquicc->smc_regs[idx];
/* Set the mode register. We want to keep a copy of the
* enables, because we want to put them back if they were
* present.
*/
prev_mode = smcp->smc_smcmr;
smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART;
smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
}
m360_cpm_setbrg((state - rs_table), baud_rate);
local_irq_restore(flags);
}
static void rs_360_put_char(struct tty_struct *tty, unsigned char ch)
{
ser_info_t *info = (ser_info_t *)tty->driver_data;
volatile QUICC_BD *bdp;
if (serial_paranoia_check(info, tty->name, "rs_put_char"))
return 0;
if (!tty)
return 0;
bdp = info->tx_cur;
while (bdp->status & BD_SC_READY);
/* *((char *)__va(bdp->buf)) = ch; */
*((char *)bdp->buf) = ch;
bdp->length = 1;
bdp->status |= BD_SC_READY;
/* Get next BD.
*/
if (bdp->status & BD_SC_WRAP)
bdp = info->tx_bd_base;
else
bdp++;
info->tx_cur = (QUICC_BD *)bdp;
return 1;
}
static int rs_360_write(struct tty_struct * tty,
const unsigned char *buf, int count)
{
int c, ret = 0;
ser_info_t *info = (ser_info_t *)tty->driver_data;
volatile QUICC_BD *bdp;
#ifdef CONFIG_KGDB
/* Try to let stub handle output. Returns true if it did. */
if (kgdb_output_string(buf, count))
return ret;
#endif
if (serial_paranoia_check(info, tty->name, "rs_write"))
return 0;
if (!tty)
return 0;
bdp = info->tx_cur;
while (1) {
c = min(count, TX_BUF_SIZE);
if (c <= 0)
break;
if (bdp->status & BD_SC_READY) {
info->flags |= TX_WAKEUP;
break;
}
/* memcpy(__va(bdp->buf), buf, c); */
memcpy((void *)bdp->buf, buf, c);
bdp->length = c;
bdp->status |= BD_SC_READY;
buf += c;
count -= c;
ret += c;
/* Get next BD.
*/
if (bdp->status & BD_SC_WRAP)
bdp = info->tx_bd_base;
else
bdp++;
info->tx_cur = (QUICC_BD *)bdp;
}
return ret;
}
static int rs_360_write_room(struct tty_struct *tty)
{
ser_info_t *info = (ser_info_t *)tty->driver_data;
int ret;
if (serial_paranoia_check(info, tty->name, "rs_write_room"))
return 0;
if ((info->tx_cur->status & BD_SC_READY) == 0) {
info->flags &= ~TX_WAKEUP;
ret = TX_BUF_SIZE;
}
else {
info->flags |= TX_WAKEUP;
ret = 0;
}
return ret;
}
/* I could track this with transmit counters....maybe later.
*/
static int rs_360_chars_in_buffer(struct tty_struct *tty)
{
ser_info_t *info = (ser_info_t *)tty->driver_data;
if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
return 0;
return 0;
}
static void rs_360_flush_buffer(struct tty_struct *tty)
{
ser_info_t *info = (ser_info_t *)tty->driver_data;
if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
return;
/* There is nothing to "flush", whatever we gave the CPM
* is on its way out.
*/
tty_wakeup(tty);
info->flags &= ~TX_WAKEUP;
}
/*
* This function is used to send a high-priority XON/XOFF character to
* the device
*/
static void rs_360_send_xchar(struct tty_struct *tty, char ch)
{
volatile QUICC_BD *bdp;
ser_info_t *info = (ser_info_t *)tty->driver_data;
if (serial_paranoia_check(info, tty->name, "rs_send_char"))
return;
bdp = info->tx_cur;
while (bdp->status & BD_SC_READY);
/* *((char *)__va(bdp->buf)) = ch; */
*((char *)bdp->buf) = ch;
bdp->length = 1;
bdp->status |= BD_SC_READY;
/* Get next BD.
*/
if (bdp->status & BD_SC_WRAP)
bdp = info->tx_bd_base;
else
bdp++;
info->tx_cur = (QUICC_BD *)bdp;
}
/*
* ------------------------------------------------------------
* rs_throttle()
*
* This routine is called by the upper-layer tty layer to signal that
* incoming characters should be throttled.
* ------------------------------------------------------------
*/
static void rs_360_throttle(struct tty_struct * tty)
{
ser_info_t *info = (ser_info_t *)tty->driver_data;
#ifdef SERIAL_DEBUG_THROTTLE
char buf[64];
printk("throttle %s: %d....\n", _tty_name(tty, buf),
tty->ldisc.chars_in_buffer(tty));
#endif
if (serial_paranoia_check(info, tty->name, "rs_throttle"))
return;
if (I_IXOFF(tty))
rs_360_send_xchar(tty, STOP_CHAR(tty));
#ifdef modem_control
if (tty->termios->c_cflag & CRTSCTS)
info->MCR &= ~UART_MCR_RTS;
local_irq_disable();
serial_out(info, UART_MCR, info->MCR);
local_irq_enable();
#endif
}
static void rs_360_unthrottle(struct tty_struct * tty)
{
ser_info_t *info = (ser_info_t *)tty->driver_data;
#ifdef SERIAL_DEBUG_THROTTLE
char buf[64];
printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
tty->ldisc.chars_in_buffer(tty));
#endif
if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
return;
if (I_IXOFF(tty)) {
if (info->x_char)
info->x_char = 0;
else
rs_360_send_xchar(tty, START_CHAR(tty));
}
#ifdef modem_control
if (tty->termios->c_cflag & CRTSCTS)
info->MCR |= UART_MCR_RTS;
local_irq_disable();
serial_out(info, UART_MCR, info->MCR);
local_irq_enable();
#endif
}
/*
* ------------------------------------------------------------
* rs_ioctl() and friends
* ------------------------------------------------------------
*/
#ifdef maybe
/*
* get_lsr_info - get line status register info
*
* Purpose: Let user call ioctl() to get info when the UART physically
* is emptied. On bus types like RS485, the transmitter must
* release the bus after transmitting. This must be done when
* the transmit shift register is empty, not be done when the
* transmit holding register is empty. This functionality
* allows an RS485 driver to be written in user space.
*/
static int get_lsr_info(struct async_struct * info, unsigned int *value)
{
unsigned char status;
unsigned int result;
local_irq_disable();
status = serial_in(info, UART_LSR);
local_irq_enable();
result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
return put_user(result,value);
}
#endif
static int rs_360_tiocmget(struct tty_struct *tty, struct file *file)
{
ser_info_t *info = (ser_info_t *)tty->driver_data;
unsigned int result = 0;
#ifdef modem_control
unsigned char control, status;
if (serial_paranoia_check(info, tty->name, __func__))
return -ENODEV;
if (tty->flags & (1 << TTY_IO_ERROR))
return -EIO;
control = info->MCR;
local_irq_disable();
status = serial_in(info, UART_MSR);
local_irq_enable();
result = ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
| ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
#ifdef TIOCM_OUT1
| ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
| ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
#endif
| ((status & UART_MSR_DCD) ? TIOCM_CAR : 0)
| ((status & UART_MSR_RI) ? TIOCM_RNG : 0)
| ((status & UART_MSR_DSR) ? TIOCM_DSR : 0)
| ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
#endif
return result;
}
static int rs_360_tiocmset(struct tty_struct *tty, struct file *file,
unsigned int set, unsigned int clear)
{
#ifdef modem_control
ser_info_t *info = (ser_info_t *)tty->driver_data;
unsigned int arg;
if (serial_paranoia_check(info, tty->name, __func__))
return -ENODEV;
if (tty->flags & (1 << TTY_IO_ERROR))
return -EIO;
/* FIXME: locking on info->mcr */
if (set & TIOCM_RTS)
info->mcr |= UART_MCR_RTS;
if (set & TIOCM_DTR)
info->mcr |= UART_MCR_DTR;
if (clear & TIOCM_RTS)
info->MCR &= ~UART_MCR_RTS;
if (clear & TIOCM_DTR)
info->MCR &= ~UART_MCR_DTR;
#ifdef TIOCM_OUT1
if (set & TIOCM_OUT1)
info->MCR |= UART_MCR_OUT1;
if (set & TIOCM_OUT2)
info->MCR |= UART_MCR_OUT2;
if (clear & TIOCM_OUT1)
info->MCR &= ~UART_MCR_OUT1;
if (clear & TIOCM_OUT2)
info->MCR &= ~UART_MCR_OUT2;
#endif
local_irq_disable();
serial_out(info, UART_MCR, info->MCR);
local_irq_enable();
#endif
return 0;
}
/* Sending a break is a two step process on the SMC/SCC. It is accomplished
* by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT
* command. We take advantage of the begin/end functions to make this
* happen.
*/
static ushort smc_chan_map[] = {
CPM_CR_CH_SMC1,
CPM_CR_CH_SMC2
};
static ushort scc_chan_map[] = {
CPM_CR_CH_SCC1,
CPM_CR_CH_SCC2,
CPM_CR_CH_SCC3,
CPM_CR_CH_SCC4
};
static void begin_break(ser_info_t *info)
{
volatile QUICC *cp;
ushort chan;
int idx;
cp = pquicc;
idx = PORT_NUM(info->state->smc_scc_num);
if (info->state->smc_scc_num & NUM_IS_SCC)
chan = scc_chan_map[idx];
else
chan = smc_chan_map[idx];
cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG;
while (cp->cp_cr & CPM_CR_FLG);
}
static void end_break(ser_info_t *info)
{
volatile QUICC *cp;
ushort chan;
int idx;
cp = pquicc;
idx = PORT_NUM(info->state->smc_scc_num);
if (info->state->smc_scc_num & NUM_IS_SCC)
chan = scc_chan_map[idx];
else
chan = smc_chan_map[idx];
cp->cp_cr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG;
while (cp->cp_cr & CPM_CR_FLG);
}
/*
* This routine sends a break character out the serial port.
*/
static void send_break(ser_info_t *info, unsigned int duration)
{
#ifdef SERIAL_DEBUG_SEND_BREAK
printk("rs_send_break(%d) jiff=%lu...", duration, jiffies);
#endif
begin_break(info);
msleep_interruptible(duration);
end_break(info);
#ifdef SERIAL_DEBUG_SEND_BREAK
printk("done jiffies=%lu\n", jiffies);
#endif
}
static int rs_360_ioctl(struct tty_struct *tty, struct file * file,
unsigned int cmd, unsigned long arg)
{
int error;
ser_info_t *info = (ser_info_t *)tty->driver_data;
int retval;
struct async_icount cnow;
/* struct async_icount_24 cnow;*/ /* kernel counter temps */
struct serial_icounter_struct *p_cuser; /* user space */
if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
return -ENODEV;
if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
if (tty->flags & (1 << TTY_IO_ERROR))
return -EIO;
}
switch (cmd) {
case TCSBRK: /* SVID version: non-zero arg --> no break */
retval = tty_check_change(tty);
if (retval)
return retval;
tty_wait_until_sent(tty, 0);
if (signal_pending(current))
return -EINTR;
if (!arg) {
send_break(info, 250); /* 1/4 second */
if (signal_pending(current))
return -EINTR;
}
return 0;
case TCSBRKP: /* support for POSIX tcsendbreak() */
retval = tty_check_change(tty);
if (retval)
return retval;
tty_wait_until_sent(tty, 0);
if (signal_pending(current))
return -EINTR;
send_break(info, arg ? arg*100 : 250);
if (signal_pending(current))
return -EINTR;
return 0;
case TIOCSBRK:
retval = tty_check_change(tty);
if (retval)
return retval;
tty_wait_until_sent(tty, 0);
begin_break(info);
return 0;
case TIOCCBRK:
retval = tty_check_change(tty);
if (retval)
return retval;
end_break(info);
return 0;
#ifdef maybe
case TIOCSERGETLSR: /* Get line status register */
return get_lsr_info(info, (unsigned int *) arg);
#endif
/*
* Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
* - mask passed in arg for lines of interest
* (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
* Caller should use TIOCGICOUNT to see which one it was
*/
case TIOCMIWAIT:
#ifdef modem_control
local_irq_disable();
/* note the counters on entry */
cprev = info->state->icount;
local_irq_enable();
while (1) {
interruptible_sleep_on(&info->delta_msr_wait);
/* see if a signal did it */
if (signal_pending(current))
return -ERESTARTSYS;
local_irq_disable();
cnow = info->state->icount; /* atomic copy */
local_irq_enable();
if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
return -EIO; /* no change => error */
if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
return 0;
}
cprev = cnow;
}
/* NOTREACHED */
#else
return 0;
#endif
/*
* Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
* Return: write counters to the user passed counter struct
* NB: both 1->0 and 0->1 transitions are counted except for
* RI where only 0->1 is counted.
*/
case TIOCGICOUNT:
local_irq_disable();
cnow = info->state->icount;
local_irq_enable();
p_cuser = (struct serial_icounter_struct *) arg;
/* error = put_user(cnow.cts, &p_cuser->cts); */
/* if (error) return error; */
/* error = put_user(cnow.dsr, &p_cuser->dsr); */
/* if (error) return error; */
/* error = put_user(cnow.rng, &p_cuser->rng); */
/* if (error) return error; */
/* error = put_user(cnow.dcd, &p_cuser->dcd); */
/* if (error) return error; */
put_user(cnow.cts, &p_cuser->cts);
put_user(cnow.dsr, &p_cuser->dsr);
put_user(cnow.rng, &p_cuser->rng);
put_user(cnow.dcd, &p_cuser->dcd);
return 0;
default:
return -ENOIOCTLCMD;
}
return 0;
}
/* FIX UP modem control here someday......
*/
static void rs_360_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
{
ser_info_t *info = (ser_info_t *)tty->driver_data;
change_speed(info);
#ifdef modem_control
/* Handle transition to B0 status */
if ((old_termios->c_cflag & CBAUD) &&
!(tty->termios->c_cflag & CBAUD)) {
info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
local_irq_disable();
serial_out(info, UART_MCR, info->MCR);
local_irq_enable();
}
/* Handle transition away from B0 status */
if (!(old_termios->c_cflag & CBAUD) &&
(tty->termios->c_cflag & CBAUD)) {
info->MCR |= UART_MCR_DTR;
if (!tty->hw_stopped ||
!(tty->termios->c_cflag & CRTSCTS)) {
info->MCR |= UART_MCR_RTS;
}
local_irq_disable();
serial_out(info, UART_MCR, info->MCR);
local_irq_enable();
}
/* Handle turning off CRTSCTS */
if ((old_termios->c_cflag & CRTSCTS) &&
!(tty->termios->c_cflag & CRTSCTS)) {
tty->hw_stopped = 0;
rs_360_start(tty);
}
#endif
#if 0
/*
* No need to wake up processes in open wait, since they
* sample the CLOCAL flag once, and don't recheck it.
* XXX It's not clear whether the current behavior is correct
* or not. Hence, this may change.....
*/
if (!(old_termios->c_cflag & CLOCAL) &&
(tty->termios->c_cflag & CLOCAL))
wake_up_interruptible(&info->open_wait);
#endif
}
/*
* ------------------------------------------------------------
* rs_close()
*
* This routine is called when the serial port gets closed. First, we
* wait for the last remaining data to be sent. Then, we unlink its
* async structure from the interrupt chain if necessary, and we free
* that IRQ if nothing is left in the chain.
* ------------------------------------------------------------
*/
static void rs_360_close(struct tty_struct *tty, struct file * filp)
{
ser_info_t *info = (ser_info_t *)tty->driver_data;
/* struct async_state *state; */
struct serial_state *state;
unsigned long flags;
int idx;
volatile struct smc_regs *smcp;
volatile struct scc_regs *sccp;
if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
return;
state = info->state;
local_irq_save(flags);
if (tty_hung_up_p(filp)) {
DBG_CNT("before DEC-hung");
local_irq_restore(flags);
return;
}
#ifdef SERIAL_DEBUG_OPEN
printk("rs_close ttys%d, count = %d\n", info->line, state->count);
#endif
if ((tty->count == 1) && (state->count != 1)) {
/*
* Uh, oh. tty->count is 1, which means that the tty
* structure will be freed. state->count should always
* be one in these conditions. If it's greater than
* one, we've got real problems, since it means the
* serial port won't be shutdown.
*/
printk("rs_close: bad serial port count; tty->count is 1, "
"state->count is %d\n", state->count);
state->count = 1;
}
if (--state->count < 0) {
printk("rs_close: bad serial port count for ttys%d: %d\n",
info->line, state->count);
state->count = 0;
}
if (state->count) {
DBG_CNT("before DEC-2");
local_irq_restore(flags);
return;
}
info->flags |= ASYNC_CLOSING;
/*
* Now we wait for the transmit buffer to clear; and we notify
* the line discipline to only process XON/XOFF characters.
*/
tty->closing = 1;
if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
tty_wait_until_sent(tty, info->closing_wait);
/*
* At this point we stop accepting input. To do this, we
* disable the receive line status interrupts, and tell the
* interrupt driver to stop checking the data ready bit in the
* line status register.
*/
info->read_status_mask &= ~BD_SC_EMPTY;
if (info->flags & ASYNC_INITIALIZED) {
idx = PORT_NUM(info->state->smc_scc_num);
if (info->state->smc_scc_num & NUM_IS_SCC) {
sccp = &pquicc->scc_regs[idx];
sccp->scc_sccm &= ~UART_SCCM_RX;
sccp->scc_gsmr.w.low &= ~SCC_GSMRL_ENR;
} else {
smcp = &pquicc->smc_regs[idx];
smcp->smc_smcm &= ~SMCM_RX;
smcp->smc_smcmr &= ~SMCMR_REN;
}
/*
* Before we drop DTR, make sure the UART transmitter
* has completely drained; this is especially
* important if there is a transmit FIFO!
*/
rs_360_wait_until_sent(tty, info->timeout);
}
shutdown(info);
rs_360_flush_buffer(tty);
tty_ldisc_flush(tty);
tty->closing = 0;
info->event = 0;
info->port.tty = NULL;
if (info->blocked_open) {
if (info->close_delay) {
msleep_interruptible(jiffies_to_msecs(info->close_delay));
}
wake_up_interruptible(&info->open_wait);
}
info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
wake_up_interruptible(&info->close_wait);
local_irq_restore(flags);
}
/*
* rs_wait_until_sent() --- wait until the transmitter is empty
*/
static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout)
{
ser_info_t *info = (ser_info_t *)tty->driver_data;
unsigned long orig_jiffies, char_time;
/*int lsr;*/
volatile QUICC_BD *bdp;
if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
return;
#ifdef maybe
if (info->state->type == PORT_UNKNOWN)
return;
#endif
orig_jiffies = jiffies;
/*
* Set the check interval to be 1/5 of the estimated time to
* send a single character, and make it at least 1. The check
* interval should also be less than the timeout.
*
* Note: we have to use pretty tight timings here to satisfy
* the NIST-PCTS.
*/
char_time = 1;
if (timeout)
char_time = min(char_time, (unsigned long)timeout);
#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
printk("jiff=%lu...", jiffies);
#endif
lock_kernel();
/* We go through the loop at least once because we can't tell
* exactly when the last character exits the shifter. There can
* be at least two characters waiting to be sent after the buffers
* are empty.
*/
do {
#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
#endif
/* current->counter = 0; make us low-priority */
msleep_interruptible(jiffies_to_msecs(char_time));
if (signal_pending(current))
break;
if (timeout && (time_after(jiffies, orig_jiffies + timeout)))
break;
/* The 'tx_cur' is really the next buffer to send. We
* have to back up to the previous BD and wait for it
* to go. This isn't perfect, because all this indicates
* is the buffer is available. There are still characters
* in the CPM FIFO.
*/
bdp = info->tx_cur;
if (bdp == info->tx_bd_base)
bdp += (TX_NUM_FIFO-1);
else
bdp--;
} while (bdp->status & BD_SC_READY);
current->state = TASK_RUNNING;
unlock_kernel();
#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
#endif
}
/*
* rs_hangup() --- called by tty_hangup() when a hangup is signaled.
*/
static void rs_360_hangup(struct tty_struct *tty)
{
ser_info_t *info = (ser_info_t *)tty->driver_data;
struct serial_state *state = info->state;
if (serial_paranoia_check(info, tty->name, "rs_hangup"))
return;
state = info->state;
rs_360_flush_buffer(tty);
shutdown(info);
info->event = 0;
state->count = 0;
info->flags &= ~ASYNC_NORMAL_ACTIVE;
info->port.tty = NULL;
wake_up_interruptible(&info->open_wait);
}
/*
* ------------------------------------------------------------
* rs_open() and friends
* ------------------------------------------------------------
*/
static int block_til_ready(struct tty_struct *tty, struct file * filp,
ser_info_t *info)
{
#ifdef DO_THIS_LATER
DECLARE_WAITQUEUE(wait, current);
#endif
struct serial_state *state = info->state;
int retval;
int do_clocal = 0;
/*
* If the device is in the middle of being closed, then block
* until it's done, and then try again.
*/
if (tty_hung_up_p(filp) ||
(info->flags & ASYNC_CLOSING)) {
if (info->flags & ASYNC_CLOSING)
interruptible_sleep_on(&info->close_wait);
#ifdef SERIAL_DO_RESTART
if (info->flags & ASYNC_HUP_NOTIFY)
return -EAGAIN;
else
return -ERESTARTSYS;
#else
return -EAGAIN;
#endif
}
/*
* If non-blocking mode is set, or the port is not enabled,
* then make the check up front and then exit.
* If this is an SMC port, we don't have modem control to wait
* for, so just get out here.
*/
if ((filp->f_flags & O_NONBLOCK) ||
(tty->flags & (1 << TTY_IO_ERROR)) ||
!(info->state->smc_scc_num & NUM_IS_SCC)) {
info->flags |= ASYNC_NORMAL_ACTIVE;
return 0;
}
if (tty->termios->c_cflag & CLOCAL)
do_clocal = 1;
/*
* Block waiting for the carrier detect and the line to become
* free (i.e., not in use by the callout). While we are in
* this loop, state->count is dropped by one, so that
* rs_close() knows when to free things. We restore it upon
* exit, either normal or abnormal.
*/
retval = 0;
#ifdef DO_THIS_LATER
add_wait_queue(&info->open_wait, &wait);
#ifdef SERIAL_DEBUG_OPEN
printk("block_til_ready before block: ttys%d, count = %d\n",
state->line, state->count);
#endif
local_irq_disable();
if (!tty_hung_up_p(filp))
state->count--;
local_irq_enable();
info->blocked_open++;
while (1) {
local_irq_disable();
if (tty->termios->c_cflag & CBAUD)
serial_out(info, UART_MCR,
serial_inp(info, UART_MCR) |
(UART_MCR_DTR | UART_MCR_RTS));
local_irq_enable();
set_current_state(TASK_INTERRUPTIBLE);
if (tty_hung_up_p(filp) ||
!(info->flags & ASYNC_INITIALIZED)) {
#ifdef SERIAL_DO_RESTART
if (info->flags & ASYNC_HUP_NOTIFY)
retval = -EAGAIN;
else
retval = -ERESTARTSYS;
#else
retval = -EAGAIN;
#endif
break;
}
if (!(info->flags & ASYNC_CLOSING) &&
(do_clocal || (serial_in(info, UART_MSR) &
UART_MSR_DCD)))
break;
if (signal_pending(current)) {
retval = -ERESTARTSYS;
break;
}
#ifdef SERIAL_DEBUG_OPEN
printk("block_til_ready blocking: ttys%d, count = %d\n",
info->line, state->count);
#endif
schedule();
}
current->state = TASK_RUNNING;
remove_wait_queue(&info->open_wait, &wait);
if (!tty_hung_up_p(filp))
state->count++;
info->blocked_open--;
#ifdef SERIAL_DEBUG_OPEN
printk("block_til_ready after blocking: ttys%d, count = %d\n",
info->line, state->count);
#endif
#endif /* DO_THIS_LATER */
if (retval)
return retval;
info->flags |= ASYNC_NORMAL_ACTIVE;
return 0;
}
static int get_async_struct(int line, ser_info_t **ret_info)
{
struct serial_state *sstate;
sstate = rs_table + line;
if (sstate->info) {
sstate->count++;
*ret_info = (ser_info_t *)sstate->info;
return 0;
}
else {
return -ENOMEM;
}
}
/*
* This routine is called whenever a serial port is opened. It
* enables interrupts for a serial port, linking in its async structure into
* the IRQ chain. It also performs the serial-specific
* initialization for the tty structure.
*/
static int rs_360_open(struct tty_struct *tty, struct file * filp)
{
ser_info_t *info;
int retval, line;
line = tty->index;
if ((line < 0) || (line >= NR_PORTS))
return -ENODEV;
retval = get_async_struct(line, &info);
if (retval)
return retval;
if (serial_paranoia_check(info, tty->name, "rs_open"))
return -ENODEV;
#ifdef SERIAL_DEBUG_OPEN
printk("rs_open %s, count = %d\n", tty->name, info->state->count);
#endif
tty->driver_data = info;
info->port.tty = tty;
/*
* Start up serial port
*/
retval = startup(info);
if (retval)
return retval;
retval = block_til_ready(tty, filp, info);
if (retval) {
#ifdef SERIAL_DEBUG_OPEN
printk("rs_open returning after block_til_ready with %d\n",
retval);
#endif
return retval;
}
#ifdef SERIAL_DEBUG_OPEN
printk("rs_open %s successful...", tty->name);
#endif
return 0;
}
/*
* /proc fs routines....
*/
static inline int line_info(char *buf, struct serial_state *state)
{
#ifdef notdef
struct async_struct *info = state->info, scr_info;
char stat_buf[30], control, status;
#endif
int ret;
ret = sprintf(buf, "%d: uart:%s port:%X irq:%d",
state->line,
(state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC",
(unsigned int)(state->port), state->irq);
if (!state->port || (state->type == PORT_UNKNOWN)) {
ret += sprintf(buf+ret, "\n");
return ret;
}
#ifdef notdef
/*
* Figure out the current RS-232 lines
*/
if (!info) {
info = &scr_info; /* This is just for serial_{in,out} */
info->magic = SERIAL_MAGIC;
info->port = state->port;
info->flags = state->flags;
info->quot = 0;
info->port.tty = NULL;
}
local_irq_disable();
status = serial_in(info, UART_MSR);
control = info ? info->MCR : serial_in(info, UART_MCR);
local_irq_enable();
stat_buf[0] = 0;
stat_buf[1] = 0;
if (control & UART_MCR_RTS)
strcat(stat_buf, "|RTS");
if (status & UART_MSR_CTS)
strcat(stat_buf, "|CTS");
if (control & UART_MCR_DTR)
strcat(stat_buf, "|DTR");
if (status & UART_MSR_DSR)
strcat(stat_buf, "|DSR");
if (status & UART_MSR_DCD)
strcat(stat_buf, "|CD");
if (status & UART_MSR_RI)
strcat(stat_buf, "|RI");
if (info->quot) {
ret += sprintf(buf+ret, " baud:%d",
state->baud_base / info->quot);
}
ret += sprintf(buf+ret, " tx:%d rx:%d",
state->icount.tx, state->icount.rx);
if (state->icount.frame)
ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
if (state->icount.parity)
ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
if (state->icount.brk)
ret += sprintf(buf+ret, " brk:%d", state->icount.brk);
if (state->icount.overrun)
ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);
/*
* Last thing is the RS-232 status lines
*/
ret += sprintf(buf+ret, " %s\n", stat_buf+1);
#endif
return ret;
}
int rs_360_read_proc(char *page, char **start, off_t off, int count,
int *eof, void *data)
{
int i, len = 0;
off_t begin = 0;
len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version);
for (i = 0; i < NR_PORTS && len < 4000; i++) {
len += line_info(page + len, &rs_table[i]);
if (len+begin > off+count)
goto done;
if (len+begin < off) {
begin += len;
len = 0;
}
}
*eof = 1;
done:
if (off >= len+begin)
return 0;
*start = page + (begin-off);
return ((count < begin+len-off) ? count : begin+len-off);
}
/*
* ---------------------------------------------------------------------
* rs_init() and friends
*
* rs_init() is called at boot-time to initialize the serial driver.
* ---------------------------------------------------------------------
*/
/*
* This routine prints out the appropriate serial driver version
* number, and identifies which options were configured into this
* driver.
*/
static _INLINE_ void show_serial_version(void)
{
printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
}
/*
* The serial console driver used during boot. Note that these names
* clash with those found in "serial.c", so we currently can't support
* the 16xxx uarts and these at the same time. I will fix this to become
* an indirect function call from tty_io.c (or something).
*/
#ifdef CONFIG_SERIAL_CONSOLE
/*
* Print a string to the serial port trying not to disturb any possible
* real use of the port...
*/
static void my_console_write(int idx, const char *s,
unsigned count)
{
struct serial_state *ser;
ser_info_t *info;
unsigned i;
QUICC_BD *bdp, *bdbase;
volatile struct smc_uart_pram *up;
volatile u_char *cp;
ser = rs_table + idx;
/* If the port has been initialized for general use, we have
* to use the buffer descriptors allocated there. Otherwise,
* we simply use the single buffer allocated.
*/
if ((info = (ser_info_t *)ser->info) != NULL) {
bdp = info->tx_cur;
bdbase = info->tx_bd_base;
}
else {
/* Pointer to UART in parameter ram.
*/
/* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
/* Get the address of the host memory buffer.
*/
bdp = bdbase = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
}
/*
* We need to gracefully shut down the transmitter, disable
* interrupts, then send our bytes out.
*/
/*
* Now, do each character. This is not as bad as it looks
* since this is a holding FIFO and not a transmitting FIFO.
* We could add the complexity of filling the entire transmit
* buffer, but we would just wait longer between accesses......
*/
for (i = 0; i < count; i++, s++) {
/* Wait for transmitter fifo to empty.
* Ready indicates output is ready, and xmt is doing
* that, not that it is ready for us to send.
*/
while (bdp->status & BD_SC_READY);
/* Send the character out.
*/
cp = bdp->buf;
*cp = *s;
bdp->length = 1;
bdp->status |= BD_SC_READY;
if (bdp->status & BD_SC_WRAP)
bdp = bdbase;
else
bdp++;
/* if a LF, also do CR... */
if (*s == 10) {
while (bdp->status & BD_SC_READY);
/* cp = __va(bdp->buf); */
cp = bdp->buf;
*cp = 13;
bdp->length = 1;
bdp->status |= BD_SC_READY;
if (bdp->status & BD_SC_WRAP) {
bdp = bdbase;
}
else {
bdp++;
}
}
}
/*
* Finally, Wait for transmitter & holding register to empty
* and restore the IER
*/
while (bdp->status & BD_SC_READY);
if (info)
info->tx_cur = (QUICC_BD *)bdp;
}
static void serial_console_write(struct console *c, const char *s,
unsigned count)
{
#ifdef CONFIG_KGDB
/* Try to let stub handle output. Returns true if it did. */
if (kgdb_output_string(s, count))
return;
#endif
my_console_write(c->index, s, count);
}
/*void console_print_68360(const char *p)
{
const char *cp = p;
int i;
for (i=0;cp[i]!=0;i++);
serial_console_write (p, i);
//Comment this if you want to have a strict interrupt-driven output
//rs_fair_output();
return;
}*/
#ifdef CONFIG_XMON
int
xmon_360_write(const char *s, unsigned count)
{
my_console_write(0, s, count);
return(count);
}
#endif
#ifdef CONFIG_KGDB
void
putDebugChar(char ch)
{
my_console_write(0, &ch, 1);
}
#endif
/*
* Receive character from the serial port. This only works well
* before the port is initialized for real use.
*/
static int my_console_wait_key(int idx, int xmon, char *obuf)
{
struct serial_state *ser;
u_char c, *cp;
ser_info_t *info;
QUICC_BD *bdp;
volatile struct smc_uart_pram *up;
int i;
ser = rs_table + idx;
/* Get the address of the host memory buffer.
* If the port has been initialized for general use, we must
* use information from the port structure.
*/
if ((info = (ser_info_t *)ser->info))
bdp = info->rx_cur;
else
/* bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; */
bdp = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
/* Pointer to UART in parameter ram.
*/
/* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
/*
* We need to gracefully shut down the receiver, disable
* interrupts, then read the input.
* XMON just wants a poll. If no character, return -1, else
* return the character.
*/
if (!xmon) {
while (bdp->status & BD_SC_EMPTY);
}
else {
if (bdp->status & BD_SC_EMPTY)
return -1;
}
cp = (char *)bdp->buf;
if (obuf) {
i = c = bdp->length;
while (i-- > 0)
*obuf++ = *cp++;
}
else {
c = *cp;
}
bdp->status |= BD_SC_EMPTY;
if (info) {
if (bdp->status & BD_SC_WRAP) {
bdp = info->rx_bd_base;
}
else {
bdp++;
}
info->rx_cur = (QUICC_BD *)bdp;
}
return((int)c);
}
static int serial_console_wait_key(struct console *co)
{
return(my_console_wait_key(co->index, 0, NULL));
}
#ifdef CONFIG_XMON
int
xmon_360_read_poll(void)
{
return(my_console_wait_key(0, 1, NULL));
}
int
xmon_360_read_char(void)
{
return(my_console_wait_key(0, 0, NULL));
}
#endif
#ifdef CONFIG_KGDB
static char kgdb_buf[RX_BUF_SIZE], *kgdp;
static int kgdb_chars;
unsigned char
getDebugChar(void)
{
if (kgdb_chars <= 0) {
kgdb_chars = my_console_wait_key(0, 0, kgdb_buf);
kgdp = kgdb_buf;
}
kgdb_chars--;
return(*kgdp++);
}
void kgdb_interruptible(int state)
{
}
void kgdb_map_scc(void)
{
struct serial_state *ser;
uint mem_addr;
volatile QUICC_BD *bdp;
volatile smc_uart_t *up;
cpmp = (cpm360_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
/* To avoid data cache CPM DMA coherency problems, allocate a
* buffer in the CPM DPRAM. This will work until the CPM and
* serial ports are initialized. At that time a memory buffer
* will be allocated.
* The port is already initialized from the boot procedure, all
* we do here is give it a different buffer and make it a FIFO.
*/
ser = rs_table;
/* Right now, assume we are using SMCs.
*/
up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
/* Allocate space for an input FIFO, plus a few bytes for output.
* Allocate bytes to maintain word alignment.
*/
mem_addr = (uint)(&cpmp->cp_dpmem[0x1000]);
/* Set the physical address of the host memory buffers in
* the buffer descriptors.
*/
bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase];
bdp->buf = mem_addr;
bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_tbase];
bdp->buf = mem_addr+RX_BUF_SIZE;
up->smc_mrblr = RX_BUF_SIZE; /* receive buffer length */
up->smc_maxidl = RX_BUF_SIZE;
}
#endif
static struct tty_struct *serial_console_device(struct console *c, int *index)
{
*index = c->index;
return serial_driver;
}
struct console sercons = {
.name = "ttyS",
.write = serial_console_write,
.device = serial_console_device,
.wait_key = serial_console_wait_key,
.setup = serial_console_setup,
.flags = CON_PRINTBUFFER,
.index = CONFIG_SERIAL_CONSOLE_PORT,
};
/*
* Register console.
*/
long console_360_init(long kmem_start, long kmem_end)
{
register_console(&sercons);
/*register_console (console_print_68360); - 2.0.38 only required a write
function pointer. */
return kmem_start;
}
#endif
/* Index in baud rate table of the default console baud rate.
*/
static int baud_idx;
static const struct tty_operations rs_360_ops = {
.owner = THIS_MODULE,
.open = rs_360_open,
.close = rs_360_close,
.write = rs_360_write,
.put_char = rs_360_put_char,
.write_room = rs_360_write_room,
.chars_in_buffer = rs_360_chars_in_buffer,
.flush_buffer = rs_360_flush_buffer,
.ioctl = rs_360_ioctl,
.throttle = rs_360_throttle,
.unthrottle = rs_360_unthrottle,
/* .send_xchar = rs_360_send_xchar, */
.set_termios = rs_360_set_termios,
.stop = rs_360_stop,
.start = rs_360_start,
.hangup = rs_360_hangup,
/* .wait_until_sent = rs_360_wait_until_sent, */
/* .read_proc = rs_360_read_proc, */
.tiocmget = rs_360_tiocmget,
.tiocmset = rs_360_tiocmset,
};
static int __init rs_360_init(void)
{
struct serial_state * state;
ser_info_t *info;
void *mem_addr;
uint dp_addr, iobits;
int i, j, idx;
ushort chan;
QUICC_BD *bdp;
volatile QUICC *cp;
volatile struct smc_regs *sp;
volatile struct smc_uart_pram *up;
volatile struct scc_regs *scp;
volatile struct uart_pram *sup;
/* volatile immap_t *immap; */
serial_driver = alloc_tty_driver(NR_PORTS);
if (!serial_driver)
return -1;
show_serial_version();
serial_driver->name = "ttyS";
serial_driver->major = TTY_MAJOR;
serial_driver->minor_start = 64;
serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
serial_driver->subtype = SERIAL_TYPE_NORMAL;
serial_driver->init_termios = tty_std_termios;
serial_driver->init_termios.c_cflag =
baud_idx | CS8 | CREAD | HUPCL | CLOCAL;
serial_driver->flags = TTY_DRIVER_REAL_RAW;
tty_set_operations(serial_driver, &rs_360_ops);
if (tty_register_driver(serial_driver))
panic("Couldn't register serial driver\n");
cp = pquicc; /* Get pointer to Communication Processor */
/* immap = (immap_t *)IMAP_ADDR; */ /* and to internal registers */
/* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O.
*/
/* The "standard" configuration through the 860.
*/
/* immap->im_ioport.iop_papar |= 0x00fc; */
/* immap->im_ioport.iop_padir &= ~0x00fc; */
/* immap->im_ioport.iop_paodr &= ~0x00fc; */
cp->pio_papar |= 0x00fc;
cp->pio_padir &= ~0x00fc;
/* cp->pio_paodr &= ~0x00fc; */
/* Since we don't yet do modem control, connect the port C pins
* as general purpose I/O. This will assert CTS and CD for the
* SCC ports.
*/
/* FIXME: see 360um p.7-365 and 860um p.34-12
* I can't make sense of these bits - mleslie*/
/* immap->im_ioport.iop_pcdir |= 0x03c6; */
/* immap->im_ioport.iop_pcpar &= ~0x03c6; */
/* cp->pio_pcdir |= 0x03c6; */
/* cp->pio_pcpar &= ~0x03c6; */
/* Connect SCC2 and SCC3 to NMSI. Connect BRG3 to SCC2 and
* BRG4 to SCC3.
*/
cp->si_sicr &= ~0x00ffff00;
cp->si_sicr |= 0x001b1200;
#ifdef CONFIG_PP04
/* Frequentis PP04 forced to RS-232 until we know better.
* Port C 12 and 13 low enables RS-232 on SCC3 and SCC4.
*/
immap->im_ioport.iop_pcdir |= 0x000c;
immap->im_ioport.iop_pcpar &= ~0x000c;
immap->im_ioport.iop_pcdat &= ~0x000c;
/* This enables the TX driver.
*/
cp->cp_pbpar &= ~0x6000;
cp->cp_pbdat &= ~0x6000;
#endif
for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
state->magic = SSTATE_MAGIC;
state->line = i;
state->type = PORT_UNKNOWN;
state->custom_divisor = 0;
state->close_delay = 5*HZ/10;
state->closing_wait = 30*HZ;
state->icount.cts = state->icount.dsr =
state->icount.rng = state->icount.dcd = 0;
state->icount.rx = state->icount.tx = 0;
state->icount.frame = state->icount.parity = 0;
state->icount.overrun = state->icount.brk = 0;
printk(KERN_INFO "ttyS%d at irq 0x%02x is an %s\n",
i, (unsigned int)(state->irq),
(state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC");
#ifdef CONFIG_SERIAL_CONSOLE
/* If we just printed the message on the console port, and
* we are about to initialize it for general use, we have
* to wait a couple of character times for the CR/NL to
* make it out of the transmit buffer.
*/
if (i == CONFIG_SERIAL_CONSOLE_PORT)
mdelay(8);
/* idx = PORT_NUM(info->state->smc_scc_num); */
/* if (info->state->smc_scc_num & NUM_IS_SCC) */
/* chan = scc_chan_map[idx]; */
/* else */
/* chan = smc_chan_map[idx]; */
/* cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; */
/* while (cp->cp_cr & CPM_CR_FLG); */
#endif
/* info = kmalloc(sizeof(ser_info_t), GFP_KERNEL); */
info = &quicc_ser_info[i];
if (info) {
memset (info, 0, sizeof(ser_info_t));
info->magic = SERIAL_MAGIC;
info->line = i;
info->flags = state->flags;
INIT_WORK(&info->tqueue, do_softint, info);
INIT_WORK(&info->tqueue_hangup, do_serial_hangup, info);
init_waitqueue_head(&info->open_wait);
init_waitqueue_head(&info->close_wait);
info->state = state;
state->info = (struct async_struct *)info;
/* We need to allocate a transmit and receive buffer
* descriptors from dual port ram, and a character
* buffer area from host mem.
*/
dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * RX_NUM_FIFO);
/* Allocate space for FIFOs in the host memory.
* (for now this is from a static array of buffers :(
*/
/* mem_addr = m360_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE); */
/* mem_addr = kmalloc (RX_NUM_FIFO * RX_BUF_SIZE, GFP_BUFFER); */
mem_addr = &rx_buf_pool[i * RX_NUM_FIFO * RX_BUF_SIZE];
/* Set the physical address of the host memory
* buffers in the buffer descriptors, and the
* virtual address for us to work with.
*/
bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
info->rx_cur = info->rx_bd_base = bdp;
/* initialize rx buffer descriptors */
for (j=0; j<(RX_NUM_FIFO-1); j++) {
bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
bdp->status = BD_SC_EMPTY | BD_SC_INTRPT;
mem_addr += RX_BUF_SIZE;
bdp++;
}
bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
bdp->status = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
idx = PORT_NUM(info->state->smc_scc_num);
if (info->state->smc_scc_num & NUM_IS_SCC) {
#if defined (CONFIG_UCQUICC) && 1
/* set the transceiver mode to RS232 */
sipex_mode_bits &= ~(uint)SIPEX_MODE(idx,0x0f); /* clear current mode */
sipex_mode_bits |= (uint)SIPEX_MODE(idx,0x02);
*(uint *)_periph_base = sipex_mode_bits;
/* printk ("sipex bits = 0x%08x\n", sipex_mode_bits); */
#endif
}
dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * TX_NUM_FIFO);
/* Allocate space for FIFOs in the host memory.
*/
/* mem_addr = m360_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE); */
/* mem_addr = kmalloc (TX_NUM_FIFO * TX_BUF_SIZE, GFP_BUFFER); */
mem_addr = &tx_buf_pool[i * TX_NUM_FIFO * TX_BUF_SIZE];
/* Set the physical address of the host memory
* buffers in the buffer descriptors, and the
* virtual address for us to work with.
*/
/* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
info->tx_cur = info->tx_bd_base = (QUICC_BD *)bdp;
/* initialize tx buffer descriptors */
for (j=0; j<(TX_NUM_FIFO-1); j++) {
bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
bdp->status = BD_SC_INTRPT;
mem_addr += TX_BUF_SIZE;
bdp++;
}
bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
bdp->status = (BD_SC_WRAP | BD_SC_INTRPT);
if (info->state->smc_scc_num & NUM_IS_SCC) {
scp = &pquicc->scc_regs[idx];
sup = &pquicc->pram[info->state->port].scc.pscc.u;
sup->rbase = dp_addr;
sup->tbase = dp_addr;
/* Set up the uart parameters in the
* parameter ram.
*/
sup->rfcr = SMC_EB;
sup->tfcr = SMC_EB;
/* Set this to 1 for now, so we get single
* character interrupts. Using idle charater
* time requires some additional tuning.
*/
sup->mrblr = 1;
sup->max_idl = 0;
sup->brkcr = 1;
sup->parec = 0;
sup->frmer = 0;
sup->nosec = 0;
sup->brkec = 0;
sup->uaddr1 = 0;
sup->uaddr2 = 0;
sup->toseq = 0;
{
int i;
for (i=0;i<8;i++)
sup->cc[i] = 0x8000;
}
sup->rccm = 0xc0ff;
/* Send the CPM an initialize command.
*/
chan = scc_chan_map[idx];
/* execute the INIT RX & TX PARAMS command for this channel. */
cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
while (cp->cp_cr & CPM_CR_FLG);
/* Set UART mode, 8 bit, no parity, one stop.
* Enable receive and transmit.
*/
scp->scc_gsmr.w.high = 0;
scp->scc_gsmr.w.low =
(SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
/* Disable all interrupts and clear all pending
* events.
*/
scp->scc_sccm = 0;
scp->scc_scce = 0xffff;
scp->scc_dsr = 0x7e7e;
scp->scc_psmr = 0x3000;
/* If the port is the console, enable Rx and Tx.
*/
#ifdef CONFIG_SERIAL_CONSOLE
if (i == CONFIG_SERIAL_CONSOLE_PORT)
scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
#endif
}
else {
/* Configure SMCs Tx/Rx instead of port B
* parallel I/O.
*/
up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
up->rbase = dp_addr;
iobits = 0xc0 << (idx * 4);
cp->pip_pbpar |= iobits;
cp->pip_pbdir &= ~iobits;
cp->pip_pbodr &= ~iobits;
/* Connect the baud rate generator to the
* SMC based upon index in rs_table. Also
* make sure it is connected to NMSI.
*/
cp->si_simode &= ~(0xffff << (idx * 16));
cp->si_simode |= (i << ((idx * 16) + 12));
up->tbase = dp_addr;
/* Set up the uart parameters in the
* parameter ram.
*/
up->rfcr = SMC_EB;
up->tfcr = SMC_EB;
/* Set this to 1 for now, so we get single
* character interrupts. Using idle charater
* time requires some additional tuning.
*/
up->mrblr = 1;
up->max_idl = 0;
up->brkcr = 1;
/* Send the CPM an initialize command.
*/
chan = smc_chan_map[idx];
cp->cp_cr = mk_cr_cmd(chan,
CPM_CR_INIT_TRX) | CPM_CR_FLG;
#ifdef CONFIG_SERIAL_CONSOLE
if (i == CONFIG_SERIAL_CONSOLE_PORT)
printk("");
#endif
while (cp->cp_cr & CPM_CR_FLG);
/* Set UART mode, 8 bit, no parity, one stop.
* Enable receive and transmit.
*/
sp = &cp->smc_regs[idx];
sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
/* Disable all interrupts and clear all pending
* events.
*/
sp->smc_smcm = 0;
sp->smc_smce = 0xff;
/* If the port is the console, enable Rx and Tx.
*/
#ifdef CONFIG_SERIAL_CONSOLE
if (i == CONFIG_SERIAL_CONSOLE_PORT)
sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
#endif
}
/* Install interrupt handler.
*/
/* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info); */
/*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */
request_irq(state->irq, rs_360_interrupt,
IRQ_FLG_LOCK, "ttyS", (void *)info);
/* Set up the baud rate generator.
*/
m360_cpm_setbrg(i, baud_table[baud_idx]);
}
}
return 0;
}
module_init(rs_360_init);
/* This must always be called before the rs_360_init() function, otherwise
* it blows away the port control information.
*/
//static int __init serial_console_setup( struct console *co, char *options)
int serial_console_setup( struct console *co, char *options)
{
struct serial_state *ser;
uint mem_addr, dp_addr, bidx, idx, iobits;
ushort chan;
QUICC_BD *bdp;
volatile QUICC *cp;
volatile struct smc_regs *sp;
volatile struct scc_regs *scp;
volatile struct smc_uart_pram *up;
volatile struct uart_pram *sup;
/* mleslie TODO:
* add something to the 68k bootloader to store a desired initial console baud rate */
/* bd_t *bd; */ /* a board info struct used by EPPC-bug */
/* bd = (bd_t *)__res; */
for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
/* if (bd->bi_baudrate == baud_table[bidx]) */
if (CONSOLE_BAUDRATE == baud_table[bidx])
break;
/* co->cflag = CREAD|CLOCAL|bidx|CS8; */
baud_idx = bidx;
ser = rs_table + CONFIG_SERIAL_CONSOLE_PORT;
cp = pquicc; /* Get pointer to Communication Processor */
idx = PORT_NUM(ser->smc_scc_num);
if (ser->smc_scc_num & NUM_IS_SCC) {
/* TODO: need to set up SCC pin assignment etc. here */
}
else {
iobits = 0xc0 << (idx * 4);
cp->pip_pbpar |= iobits;
cp->pip_pbdir &= ~iobits;
cp->pip_pbodr &= ~iobits;
/* Connect the baud rate generator to the
* SMC based upon index in rs_table. Also
* make sure it is connected to NMSI.
*/
cp->si_simode &= ~(0xffff << (idx * 16));
cp->si_simode |= (idx << ((idx * 16) + 12));
}
/* When we get here, the CPM has been reset, so we need
* to configure the port.
* We need to allocate a transmit and receive buffer descriptor
* from dual port ram, and a character buffer area from host mem.
*/
/* Allocate space for two buffer descriptors in the DP ram.
*/
dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * CONSOLE_NUM_FIFO);
/* Allocate space for two 2 byte FIFOs in the host memory.
*/
/* mem_addr = m360_cpm_hostalloc(8); */
mem_addr = (uint)console_fifos;
/* Set the physical address of the host memory buffers in
* the buffer descriptors.
*/
/* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
bdp->buf = (char *)mem_addr;
(bdp+1)->buf = (char *)(mem_addr+4);
/* For the receive, set empty and wrap.
* For transmit, set wrap.
*/
bdp->status = BD_SC_EMPTY | BD_SC_WRAP;
(bdp+1)->status = BD_SC_WRAP;
/* Set up the uart parameters in the parameter ram.
*/
if (ser->smc_scc_num & NUM_IS_SCC) {
scp = &cp->scc_regs[idx];
/* sup = (scc_uart_t *)&cp->cp_dparam[ser->port]; */
sup = &pquicc->pram[ser->port].scc.pscc.u;
sup->rbase = dp_addr;
sup->tbase = dp_addr + sizeof(QUICC_BD);
/* Set up the uart parameters in the
* parameter ram.
*/
sup->rfcr = SMC_EB;
sup->tfcr = SMC_EB;
/* Set this to 1 for now, so we get single
* character interrupts. Using idle charater
* time requires some additional tuning.
*/
sup->mrblr = 1;
sup->max_idl = 0;
sup->brkcr = 1;
sup->parec = 0;
sup->frmer = 0;
sup->nosec = 0;
sup->brkec = 0;
sup->uaddr1 = 0;
sup->uaddr2 = 0;
sup->toseq = 0;
{
int i;
for (i=0;i<8;i++)
sup->cc[i] = 0x8000;
}
sup->rccm = 0xc0ff;
/* Send the CPM an initialize command.
*/
chan = scc_chan_map[idx];
cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
while (cp->cp_cr & CPM_CR_FLG);
/* Set UART mode, 8 bit, no parity, one stop.
* Enable receive and transmit.
*/
scp->scc_gsmr.w.high = 0;
scp->scc_gsmr.w.low =
(SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
/* Disable all interrupts and clear all pending
* events.
*/
scp->scc_sccm = 0;
scp->scc_scce = 0xffff;
scp->scc_dsr = 0x7e7e;
scp->scc_psmr = 0x3000;
scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
}
else {
/* up = (smc_uart_t *)&cp->cp_dparam[ser->port]; */
up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
up->rbase = dp_addr; /* Base of receive buffer desc. */
up->tbase = dp_addr+sizeof(QUICC_BD); /* Base of xmt buffer desc. */
up->rfcr = SMC_EB;
up->tfcr = SMC_EB;
/* Set this to 1 for now, so we get single character interrupts.
*/
up->mrblr = 1; /* receive buffer length */
up->max_idl = 0; /* wait forever for next char */
/* Send the CPM an initialize command.
*/
chan = smc_chan_map[idx];
cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
while (cp->cp_cr & CPM_CR_FLG);
/* Set UART mode, 8 bit, no parity, one stop.
* Enable receive and transmit.
*/
sp = &cp->smc_regs[idx];
sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
/* And finally, enable Rx and Tx.
*/
sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
}
/* Set up the baud rate generator.
*/
/* m360_cpm_setbrg((ser - rs_table), bd->bi_baudrate); */
m360_cpm_setbrg((ser - rs_table), CONSOLE_BAUDRATE);
return 0;
}
/*
* Local variables:
* c-indent-level: 4
* c-basic-offset: 4
* tab-width: 4
* End:
*/
| gpl-2.0 |
Crossbones/crossbones_kernel_tuna | drivers/net/wireless/iwmc3200wifi/sdio.c | 3050 | 12900 | /*
* Intel Wireless Multicomm 3200 WiFi driver
*
* Copyright (C) 2009 Intel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
* Intel Corporation <ilw@linux.intel.com>
* Samuel Ortiz <samuel.ortiz@intel.com>
* Zhu Yi <yi.zhu@intel.com>
*
*/
/*
* This is the SDIO bus specific hooks for iwm.
* It also is the module's entry point.
*
* Interesting code paths:
* iwm_sdio_probe() (Called by an SDIO bus scan)
* -> iwm_if_alloc() (netdev.c)
* -> iwm_wdev_alloc() (cfg80211.c, allocates and register our wiphy)
* -> wiphy_new()
* -> wiphy_register()
* -> alloc_netdev_mq()
* -> register_netdev()
*
* iwm_sdio_remove()
* -> iwm_if_free() (netdev.c)
* -> unregister_netdev()
* -> iwm_wdev_free() (cfg80211.c)
* -> wiphy_unregister()
* -> wiphy_free()
*
* iwm_sdio_isr() (called in process context from the SDIO core code)
* -> queue_work(.., isr_worker)
* -- [async] --> iwm_sdio_isr_worker()
* -> iwm_rx_handle()
*/
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/netdevice.h>
#include <linux/debugfs.h>
#include <linux/mmc/sdio_ids.h>
#include <linux/mmc/sdio.h>
#include <linux/mmc/sdio_func.h>
#include "iwm.h"
#include "debug.h"
#include "bus.h"
#include "sdio.h"
static void iwm_sdio_isr_worker(struct work_struct *work)
{
struct iwm_sdio_priv *hw;
struct iwm_priv *iwm;
struct iwm_rx_info *rx_info;
struct sk_buff *skb;
u8 *rx_buf;
unsigned long rx_size;
hw = container_of(work, struct iwm_sdio_priv, isr_worker);
iwm = hw_to_iwm(hw);
while (!skb_queue_empty(&iwm->rx_list)) {
skb = skb_dequeue(&iwm->rx_list);
rx_info = skb_to_rx_info(skb);
rx_size = rx_info->rx_size;
rx_buf = skb->data;
IWM_HEXDUMP(iwm, DBG, SDIO, "RX: ", rx_buf, rx_size);
if (iwm_rx_handle(iwm, rx_buf, rx_size) < 0)
IWM_WARN(iwm, "RX error\n");
kfree_skb(skb);
}
}
static void iwm_sdio_isr(struct sdio_func *func)
{
struct iwm_priv *iwm;
struct iwm_sdio_priv *hw;
struct iwm_rx_info *rx_info;
struct sk_buff *skb;
unsigned long buf_size, read_size;
int ret;
u8 val;
hw = sdio_get_drvdata(func);
iwm = hw_to_iwm(hw);
buf_size = hw->blk_size;
/* We're checking the status */
val = sdio_readb(func, IWM_SDIO_INTR_STATUS_ADDR, &ret);
if (val == 0 || ret < 0) {
IWM_ERR(iwm, "Wrong INTR_STATUS\n");
return;
}
/* See if we have free buffers */
if (skb_queue_len(&iwm->rx_list) > IWM_RX_LIST_SIZE) {
IWM_ERR(iwm, "No buffer for more Rx frames\n");
return;
}
/* We first read the transaction size */
read_size = sdio_readb(func, IWM_SDIO_INTR_GET_SIZE_ADDR + 1, &ret);
read_size = read_size << 8;
if (ret < 0) {
IWM_ERR(iwm, "Couldn't read the xfer size\n");
return;
}
/* We need to clear the INT register */
sdio_writeb(func, 1, IWM_SDIO_INTR_CLEAR_ADDR, &ret);
if (ret < 0) {
IWM_ERR(iwm, "Couldn't clear the INT register\n");
return;
}
while (buf_size < read_size)
buf_size <<= 1;
skb = dev_alloc_skb(buf_size);
if (!skb) {
IWM_ERR(iwm, "Couldn't alloc RX skb\n");
return;
}
rx_info = skb_to_rx_info(skb);
rx_info->rx_size = read_size;
rx_info->rx_buf_size = buf_size;
/* Now we can read the actual buffer */
ret = sdio_memcpy_fromio(func, skb_put(skb, read_size),
IWM_SDIO_DATA_ADDR, read_size);
/* The skb is put on a driver's specific Rx SKB list */
skb_queue_tail(&iwm->rx_list, skb);
/* We can now schedule the actual worker */
queue_work(hw->isr_wq, &hw->isr_worker);
}
static void iwm_sdio_rx_free(struct iwm_sdio_priv *hw)
{
struct iwm_priv *iwm = hw_to_iwm(hw);
flush_workqueue(hw->isr_wq);
skb_queue_purge(&iwm->rx_list);
}
/* Bus ops */
static int if_sdio_enable(struct iwm_priv *iwm)
{
struct iwm_sdio_priv *hw = iwm_to_if_sdio(iwm);
int ret;
sdio_claim_host(hw->func);
ret = sdio_enable_func(hw->func);
if (ret) {
IWM_ERR(iwm, "Couldn't enable the device: is TOP driver "
"loaded and functional?\n");
goto release_host;
}
iwm_reset(iwm);
ret = sdio_claim_irq(hw->func, iwm_sdio_isr);
if (ret) {
IWM_ERR(iwm, "Failed to claim irq: %d\n", ret);
goto release_host;
}
sdio_writeb(hw->func, 1, IWM_SDIO_INTR_ENABLE_ADDR, &ret);
if (ret < 0) {
IWM_ERR(iwm, "Couldn't enable INTR: %d\n", ret);
goto release_irq;
}
sdio_release_host(hw->func);
IWM_DBG_SDIO(iwm, INFO, "IWM SDIO enable\n");
return 0;
release_irq:
sdio_release_irq(hw->func);
release_host:
sdio_release_host(hw->func);
return ret;
}
static int if_sdio_disable(struct iwm_priv *iwm)
{
struct iwm_sdio_priv *hw = iwm_to_if_sdio(iwm);
int ret;
sdio_claim_host(hw->func);
sdio_writeb(hw->func, 0, IWM_SDIO_INTR_ENABLE_ADDR, &ret);
if (ret < 0)
IWM_WARN(iwm, "Couldn't disable INTR: %d\n", ret);
sdio_release_irq(hw->func);
sdio_disable_func(hw->func);
sdio_release_host(hw->func);
iwm_sdio_rx_free(hw);
iwm_reset(iwm);
IWM_DBG_SDIO(iwm, INFO, "IWM SDIO disable\n");
return 0;
}
static int if_sdio_send_chunk(struct iwm_priv *iwm, u8 *buf, int count)
{
struct iwm_sdio_priv *hw = iwm_to_if_sdio(iwm);
int aligned_count = ALIGN(count, hw->blk_size);
int ret;
if ((unsigned long)buf & 0x3) {
IWM_ERR(iwm, "buf <%p> is not dword aligned\n", buf);
/* TODO: Is this a hardware limitation? use get_unligned */
return -EINVAL;
}
sdio_claim_host(hw->func);
ret = sdio_memcpy_toio(hw->func, IWM_SDIO_DATA_ADDR, buf,
aligned_count);
sdio_release_host(hw->func);
return ret;
}
/* debugfs hooks */
static int iwm_debugfs_sdio_open(struct inode *inode, struct file *filp)
{
filp->private_data = inode->i_private;
return 0;
}
static ssize_t iwm_debugfs_sdio_read(struct file *filp, char __user *buffer,
size_t count, loff_t *ppos)
{
struct iwm_priv *iwm = filp->private_data;
struct iwm_sdio_priv *hw = iwm_to_if_sdio(iwm);
char *buf;
u8 cccr;
int buf_len = 4096, ret;
size_t len = 0;
if (*ppos != 0)
return 0;
if (count < sizeof(buf))
return -ENOSPC;
buf = kzalloc(buf_len, GFP_KERNEL);
if (!buf)
return -ENOMEM;
sdio_claim_host(hw->func);
cccr = sdio_f0_readb(hw->func, SDIO_CCCR_IOEx, &ret);
if (ret) {
IWM_ERR(iwm, "Could not read SDIO_CCCR_IOEx\n");
goto err;
}
len += snprintf(buf + len, buf_len - len, "CCCR_IOEx: 0x%x\n", cccr);
cccr = sdio_f0_readb(hw->func, SDIO_CCCR_IORx, &ret);
if (ret) {
IWM_ERR(iwm, "Could not read SDIO_CCCR_IORx\n");
goto err;
}
len += snprintf(buf + len, buf_len - len, "CCCR_IORx: 0x%x\n", cccr);
cccr = sdio_f0_readb(hw->func, SDIO_CCCR_IENx, &ret);
if (ret) {
IWM_ERR(iwm, "Could not read SDIO_CCCR_IENx\n");
goto err;
}
len += snprintf(buf + len, buf_len - len, "CCCR_IENx: 0x%x\n", cccr);
cccr = sdio_f0_readb(hw->func, SDIO_CCCR_INTx, &ret);
if (ret) {
IWM_ERR(iwm, "Could not read SDIO_CCCR_INTx\n");
goto err;
}
len += snprintf(buf + len, buf_len - len, "CCCR_INTx: 0x%x\n", cccr);
cccr = sdio_f0_readb(hw->func, SDIO_CCCR_ABORT, &ret);
if (ret) {
IWM_ERR(iwm, "Could not read SDIO_CCCR_ABORTx\n");
goto err;
}
len += snprintf(buf + len, buf_len - len, "CCCR_ABORT: 0x%x\n", cccr);
cccr = sdio_f0_readb(hw->func, SDIO_CCCR_IF, &ret);
if (ret) {
IWM_ERR(iwm, "Could not read SDIO_CCCR_IF\n");
goto err;
}
len += snprintf(buf + len, buf_len - len, "CCCR_IF: 0x%x\n", cccr);
cccr = sdio_f0_readb(hw->func, SDIO_CCCR_CAPS, &ret);
if (ret) {
IWM_ERR(iwm, "Could not read SDIO_CCCR_CAPS\n");
goto err;
}
len += snprintf(buf + len, buf_len - len, "CCCR_CAPS: 0x%x\n", cccr);
cccr = sdio_f0_readb(hw->func, SDIO_CCCR_CIS, &ret);
if (ret) {
IWM_ERR(iwm, "Could not read SDIO_CCCR_CIS\n");
goto err;
}
len += snprintf(buf + len, buf_len - len, "CCCR_CIS: 0x%x\n", cccr);
ret = simple_read_from_buffer(buffer, len, ppos, buf, buf_len);
err:
sdio_release_host(hw->func);
kfree(buf);
return ret;
}
static const struct file_operations iwm_debugfs_sdio_fops = {
.owner = THIS_MODULE,
.open = iwm_debugfs_sdio_open,
.read = iwm_debugfs_sdio_read,
.llseek = default_llseek,
};
static void if_sdio_debugfs_init(struct iwm_priv *iwm, struct dentry *parent_dir)
{
struct iwm_sdio_priv *hw = iwm_to_if_sdio(iwm);
hw->cccr_dentry = debugfs_create_file("cccr", 0200,
parent_dir, iwm,
&iwm_debugfs_sdio_fops);
}
static void if_sdio_debugfs_exit(struct iwm_priv *iwm)
{
struct iwm_sdio_priv *hw = iwm_to_if_sdio(iwm);
debugfs_remove(hw->cccr_dentry);
}
static struct iwm_if_ops if_sdio_ops = {
.enable = if_sdio_enable,
.disable = if_sdio_disable,
.send_chunk = if_sdio_send_chunk,
.debugfs_init = if_sdio_debugfs_init,
.debugfs_exit = if_sdio_debugfs_exit,
.umac_name = "iwmc3200wifi-umac-sdio.bin",
.calib_lmac_name = "iwmc3200wifi-calib-sdio.bin",
.lmac_name = "iwmc3200wifi-lmac-sdio.bin",
};
MODULE_FIRMWARE("iwmc3200wifi-umac-sdio.bin");
MODULE_FIRMWARE("iwmc3200wifi-calib-sdio.bin");
MODULE_FIRMWARE("iwmc3200wifi-lmac-sdio.bin");
static int iwm_sdio_probe(struct sdio_func *func,
const struct sdio_device_id *id)
{
struct iwm_priv *iwm;
struct iwm_sdio_priv *hw;
struct device *dev = &func->dev;
int ret;
/* check if TOP has already initialized the card */
sdio_claim_host(func);
ret = sdio_enable_func(func);
if (ret) {
dev_err(dev, "wait for TOP to enable the device\n");
sdio_release_host(func);
return ret;
}
ret = sdio_set_block_size(func, IWM_SDIO_BLK_SIZE);
sdio_disable_func(func);
sdio_release_host(func);
if (ret < 0) {
dev_err(dev, "Failed to set block size: %d\n", ret);
return ret;
}
iwm = iwm_if_alloc(sizeof(struct iwm_sdio_priv), dev, &if_sdio_ops);
if (IS_ERR(iwm)) {
dev_err(dev, "allocate SDIO interface failed\n");
return PTR_ERR(iwm);
}
hw = iwm_private(iwm);
hw->iwm = iwm;
iwm_debugfs_init(iwm);
sdio_set_drvdata(func, hw);
hw->func = func;
hw->blk_size = IWM_SDIO_BLK_SIZE;
hw->isr_wq = create_singlethread_workqueue(KBUILD_MODNAME "_sdio");
if (!hw->isr_wq) {
ret = -ENOMEM;
goto debugfs_exit;
}
INIT_WORK(&hw->isr_worker, iwm_sdio_isr_worker);
ret = iwm_if_add(iwm);
if (ret) {
dev_err(dev, "add SDIO interface failed\n");
goto destroy_wq;
}
dev_info(dev, "IWM SDIO probe\n");
return 0;
destroy_wq:
destroy_workqueue(hw->isr_wq);
debugfs_exit:
iwm_debugfs_exit(iwm);
iwm_if_free(iwm);
return ret;
}
static void iwm_sdio_remove(struct sdio_func *func)
{
struct iwm_sdio_priv *hw = sdio_get_drvdata(func);
struct iwm_priv *iwm = hw_to_iwm(hw);
struct device *dev = &func->dev;
iwm_if_remove(iwm);
destroy_workqueue(hw->isr_wq);
iwm_debugfs_exit(iwm);
iwm_if_free(iwm);
sdio_set_drvdata(func, NULL);
dev_info(dev, "IWM SDIO remove\n");
}
static const struct sdio_device_id iwm_sdio_ids[] = {
/* Global/AGN SKU */
{ SDIO_DEVICE(SDIO_VENDOR_ID_INTEL, 0x1403) },
/* BGN SKU */
{ SDIO_DEVICE(SDIO_VENDOR_ID_INTEL, 0x1408) },
{ /* end: all zeroes */ },
};
MODULE_DEVICE_TABLE(sdio, iwm_sdio_ids);
static struct sdio_driver iwm_sdio_driver = {
.name = "iwm_sdio",
.id_table = iwm_sdio_ids,
.probe = iwm_sdio_probe,
.remove = iwm_sdio_remove,
};
static int __init iwm_sdio_init_module(void)
{
return sdio_register_driver(&iwm_sdio_driver);
}
static void __exit iwm_sdio_exit_module(void)
{
sdio_unregister_driver(&iwm_sdio_driver);
}
module_init(iwm_sdio_init_module);
module_exit(iwm_sdio_exit_module);
MODULE_LICENSE("GPL");
MODULE_AUTHOR(IWM_COPYRIGHT " " IWM_AUTHOR);
| gpl-2.0 |
CyanogenMod/android_kernel_samsung_klte | drivers/power/bq27541_fuelgauger.c | 3306 | 15322 | /* Copyright (C) 2008 Rodolfo Giometti <giometti@linux.it>
* Copyright (C) 2008 Eurotech S.p.A. <info@eurotech.it>
* Based on a previous work by Copyright (C) 2008 Texas Instruments, Inc.
*
* Copyright (c) 2011, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/module.h>
#include <linux/param.h>
#include <linux/jiffies.h>
#include <linux/workqueue.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/power_supply.h>
#include <linux/idr.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <asm/unaligned.h>
#include <linux/time.h>
#include <linux/mfd/pmic8058.h>
#include <linux/regulator/pmic8058-regulator.h>
#include <linux/gpio.h>
#include <linux/regulator/consumer.h>
#include <linux/regulator/machine.h>
#include <linux/err.h>
#include <linux/msm-charger.h>
#include <linux/i2c/bq27520.h> /* use the same platform data as bq27520 */
#define DRIVER_VERSION "1.1.0"
/* Bq27541 standard data commands */
#define BQ27541_REG_CNTL 0x00
#define BQ27541_REG_AR 0x02
#define BQ27541_REG_ARTTE 0x04
#define BQ27541_REG_TEMP 0x06
#define BQ27541_REG_VOLT 0x08
#define BQ27541_REG_FLAGS 0x0A
#define BQ27541_REG_NAC 0x0C
#define BQ27541_REG_FAC 0x0e
#define BQ27541_REG_RM 0x10
#define BQ27541_REG_FCC 0x12
#define BQ27541_REG_AI 0x14
#define BQ27541_REG_TTE 0x16
#define BQ27541_REG_TTF 0x18
#define BQ27541_REG_SI 0x1a
#define BQ27541_REG_STTE 0x1c
#define BQ27541_REG_MLI 0x1e
#define BQ27541_REG_MLTTE 0x20
#define BQ27541_REG_AE 0x22
#define BQ27541_REG_AP 0x24
#define BQ27541_REG_TTECP 0x26
#define BQ27541_REG_SOH 0x28
#define BQ27541_REG_SOC 0x2c
#define BQ27541_REG_NIC 0x2e
#define BQ27541_REG_ICR 0x30
#define BQ27541_REG_LOGIDX 0x32
#define BQ27541_REG_LOGBUF 0x34
#define BQ27541_FLAG_DSC BIT(0)
#define BQ27541_FLAG_FC BIT(9)
#define BQ27541_CS_DLOGEN BIT(15)
#define BQ27541_CS_SS BIT(13)
/* Control subcommands */
#define BQ27541_SUBCMD_CTNL_STATUS 0x0000
#define BQ27541_SUBCMD_DEVCIE_TYPE 0x0001
#define BQ27541_SUBCMD_FW_VER 0x0002
#define BQ27541_SUBCMD_HW_VER 0x0003
#define BQ27541_SUBCMD_DF_CSUM 0x0004
#define BQ27541_SUBCMD_PREV_MACW 0x0007
#define BQ27541_SUBCMD_CHEM_ID 0x0008
#define BQ27541_SUBCMD_BD_OFFSET 0x0009
#define BQ27541_SUBCMD_INT_OFFSET 0x000a
#define BQ27541_SUBCMD_CC_VER 0x000b
#define BQ27541_SUBCMD_OCV 0x000c
#define BQ27541_SUBCMD_BAT_INS 0x000d
#define BQ27541_SUBCMD_BAT_REM 0x000e
#define BQ27541_SUBCMD_SET_HIB 0x0011
#define BQ27541_SUBCMD_CLR_HIB 0x0012
#define BQ27541_SUBCMD_SET_SLP 0x0013
#define BQ27541_SUBCMD_CLR_SLP 0x0014
#define BQ27541_SUBCMD_FCT_RES 0x0015
#define BQ27541_SUBCMD_ENABLE_DLOG 0x0018
#define BQ27541_SUBCMD_DISABLE_DLOG 0x0019
#define BQ27541_SUBCMD_SEALED 0x0020
#define BQ27541_SUBCMD_ENABLE_IT 0x0021
#define BQ27541_SUBCMD_DISABLE_IT 0x0023
#define BQ27541_SUBCMD_CAL_MODE 0x0040
#define BQ27541_SUBCMD_RESET 0x0041
#define ZERO_DEGREE_CELSIUS_IN_TENTH_KELVIN (-2731)
#define BQ27541_INIT_DELAY ((HZ)*1)
/* If the system has several batteries we need a different name for each
* of them...
*/
static DEFINE_IDR(battery_id);
static DEFINE_MUTEX(battery_mutex);
struct bq27541_device_info;
struct bq27541_access_methods {
int (*read)(u8 reg, int *rt_value, int b_single,
struct bq27541_device_info *di);
};
struct bq27541_device_info {
struct device *dev;
int id;
struct bq27541_access_methods *bus;
struct i2c_client *client;
struct work_struct counter;
/* 300ms delay is needed after bq27541 is powered up
* and before any successful I2C transaction
*/
struct delayed_work hw_config;
};
static int coulomb_counter;
static spinlock_t lock; /* protect access to coulomb_counter */
static int bq27541_i2c_txsubcmd(u8 reg, unsigned short subcmd,
struct bq27541_device_info *di);
static int bq27541_read(u8 reg, int *rt_value, int b_single,
struct bq27541_device_info *di)
{
return di->bus->read(reg, rt_value, b_single, di);
}
/*
* Return the battery temperature in tenths of degree Celsius
* Or < 0 if something fails.
*/
static int bq27541_battery_temperature(struct bq27541_device_info *di)
{
int ret;
int temp = 0;
ret = bq27541_read(BQ27541_REG_TEMP, &temp, 0, di);
if (ret) {
dev_err(di->dev, "error reading temperature\n");
return ret;
}
return temp + ZERO_DEGREE_CELSIUS_IN_TENTH_KELVIN;
}
/*
* Return the battery Voltage in milivolts
* Or < 0 if something fails.
*/
static int bq27541_battery_voltage(struct bq27541_device_info *di)
{
int ret;
int volt = 0;
ret = bq27541_read(BQ27541_REG_VOLT, &volt, 0, di);
if (ret) {
dev_err(di->dev, "error reading voltage\n");
return ret;
}
return volt * 1000;
}
static void bq27541_cntl_cmd(struct bq27541_device_info *di,
int subcmd)
{
bq27541_i2c_txsubcmd(BQ27541_REG_CNTL, subcmd, di);
}
/*
* i2c specific code
*/
static int bq27541_i2c_txsubcmd(u8 reg, unsigned short subcmd,
struct bq27541_device_info *di)
{
struct i2c_msg msg;
unsigned char data[3];
int ret;
if (!di->client)
return -ENODEV;
memset(data, 0, sizeof(data));
data[0] = reg;
data[1] = subcmd & 0x00FF;
data[2] = (subcmd & 0xFF00) >> 8;
msg.addr = di->client->addr;
msg.flags = 0;
msg.len = 3;
msg.buf = data;
ret = i2c_transfer(di->client->adapter, &msg, 1);
if (ret < 0)
return -EIO;
return 0;
}
static int bq27541_chip_config(struct bq27541_device_info *di)
{
int flags = 0, ret = 0;
bq27541_cntl_cmd(di, BQ27541_SUBCMD_CTNL_STATUS);
udelay(66);
ret = bq27541_read(BQ27541_REG_CNTL, &flags, 0, di);
if (ret < 0) {
dev_err(di->dev, "error reading register %02x ret = %d\n",
BQ27541_REG_CNTL, ret);
return ret;
}
udelay(66);
bq27541_cntl_cmd(di, BQ27541_SUBCMD_ENABLE_IT);
udelay(66);
if (!(flags & BQ27541_CS_DLOGEN)) {
bq27541_cntl_cmd(di, BQ27541_SUBCMD_ENABLE_DLOG);
udelay(66);
}
return 0;
}
static void bq27541_coulomb_counter_work(struct work_struct *work)
{
int value = 0, temp = 0, index = 0, ret = 0;
struct bq27541_device_info *di;
unsigned long flags;
int count = 0;
di = container_of(work, struct bq27541_device_info, counter);
/* retrieve 30 values from FIFO of coulomb data logging buffer
* and average over time
*/
do {
ret = bq27541_read(BQ27541_REG_LOGBUF, &temp, 0, di);
if (ret < 0)
break;
if (temp != 0x7FFF) {
++count;
value += temp;
}
/* delay 66uS, waiting time between continuous reading
* results
*/
udelay(66);
ret = bq27541_read(BQ27541_REG_LOGIDX, &index, 0, di);
if (ret < 0)
break;
udelay(66);
} while (index != 0 || temp != 0x7FFF);
if (ret < 0) {
dev_err(di->dev, "Error reading datalog register\n");
return;
}
if (count) {
spin_lock_irqsave(&lock, flags);
coulomb_counter = value/count;
spin_unlock_irqrestore(&lock, flags);
}
}
struct bq27541_device_info *bq27541_di;
static int bq27541_get_battery_mvolts(void)
{
return bq27541_battery_voltage(bq27541_di);
}
static int bq27541_get_battery_temperature(void)
{
return bq27541_battery_temperature(bq27541_di);
}
static int bq27541_is_battery_present(void)
{
return 1;
}
static int bq27541_is_battery_temp_within_range(void)
{
return 1;
}
static int bq27541_is_battery_id_valid(void)
{
return 1;
}
static struct msm_battery_gauge bq27541_batt_gauge = {
.get_battery_mvolts = bq27541_get_battery_mvolts,
.get_battery_temperature = bq27541_get_battery_temperature,
.is_battery_present = bq27541_is_battery_present,
.is_battery_temp_within_range = bq27541_is_battery_temp_within_range,
.is_battery_id_valid = bq27541_is_battery_id_valid,
};
static void bq27541_hw_config(struct work_struct *work)
{
int ret = 0, flags = 0, type = 0, fw_ver = 0;
struct bq27541_device_info *di;
di = container_of(work, struct bq27541_device_info, hw_config.work);
ret = bq27541_chip_config(di);
if (ret) {
dev_err(di->dev, "Failed to config Bq27541\n");
return;
}
msm_battery_gauge_register(&bq27541_batt_gauge);
bq27541_cntl_cmd(di, BQ27541_SUBCMD_CTNL_STATUS);
udelay(66);
bq27541_read(BQ27541_REG_CNTL, &flags, 0, di);
bq27541_cntl_cmd(di, BQ27541_SUBCMD_DEVCIE_TYPE);
udelay(66);
bq27541_read(BQ27541_REG_CNTL, &type, 0, di);
bq27541_cntl_cmd(di, BQ27541_SUBCMD_FW_VER);
udelay(66);
bq27541_read(BQ27541_REG_CNTL, &fw_ver, 0, di);
dev_info(di->dev, "DEVICE_TYPE is 0x%02X, FIRMWARE_VERSION is 0x%02X\n",
type, fw_ver);
dev_info(di->dev, "Complete bq27541 configuration 0x%02X\n", flags);
}
static int bq27541_read_i2c(u8 reg, int *rt_value, int b_single,
struct bq27541_device_info *di)
{
struct i2c_client *client = di->client;
struct i2c_msg msg[1];
unsigned char data[2];
int err;
if (!client->adapter)
return -ENODEV;
msg->addr = client->addr;
msg->flags = 0;
msg->len = 1;
msg->buf = data;
data[0] = reg;
err = i2c_transfer(client->adapter, msg, 1);
if (err >= 0) {
if (!b_single)
msg->len = 2;
else
msg->len = 1;
msg->flags = I2C_M_RD;
err = i2c_transfer(client->adapter, msg, 1);
if (err >= 0) {
if (!b_single)
*rt_value = get_unaligned_le16(data);
else
*rt_value = data[0];
return 0;
}
}
return err;
}
#ifdef CONFIG_BQ27541_TEST_ENABLE
static int reg;
static int subcmd;
static ssize_t bq27541_read_stdcmd(struct device *dev,
struct device_attribute *attr, char *buf)
{
int ret;
int temp = 0;
struct platform_device *client;
struct bq27541_device_info *di;
client = to_platform_device(dev);
di = platform_get_drvdata(client);
if (reg <= BQ27541_REG_ICR && reg > 0x00) {
ret = bq27541_read(reg, &temp, 0, di);
if (ret)
ret = snprintf(buf, PAGE_SIZE, "Read Error!\n");
else
ret = snprintf(buf, PAGE_SIZE, "0x%02x\n", temp);
} else
ret = snprintf(buf, PAGE_SIZE, "Register Error!\n");
return ret;
}
static ssize_t bq27541_write_stdcmd(struct device *dev,
struct device_attribute *attr, const char *buf, size_t count)
{
ssize_t ret = strnlen(buf, PAGE_SIZE);
int cmd;
sscanf(buf, "%x", &cmd);
reg = cmd;
return ret;
}
static ssize_t bq27541_read_subcmd(struct device *dev,
struct device_attribute *attr, char *buf)
{
int ret;
int temp = 0;
struct platform_device *client;
struct bq27541_device_info *di;
client = to_platform_device(dev);
di = platform_get_drvdata(client);
if (subcmd == BQ27541_SUBCMD_DEVCIE_TYPE ||
subcmd == BQ27541_SUBCMD_FW_VER ||
subcmd == BQ27541_SUBCMD_HW_VER ||
subcmd == BQ27541_SUBCMD_CHEM_ID) {
bq27541_cntl_cmd(di, subcmd); /* Retrieve Chip status */
udelay(66);
ret = bq27541_read(BQ27541_REG_CNTL, &temp, 0, di);
if (ret)
ret = snprintf(buf, PAGE_SIZE, "Read Error!\n");
else
ret = snprintf(buf, PAGE_SIZE, "0x%02x\n", temp);
} else
ret = snprintf(buf, PAGE_SIZE, "Register Error!\n");
return ret;
}
static ssize_t bq27541_write_subcmd(struct device *dev,
struct device_attribute *attr, const char *buf, size_t count)
{
ssize_t ret = strnlen(buf, PAGE_SIZE);
int cmd;
sscanf(buf, "%x", &cmd);
subcmd = cmd;
return ret;
}
static DEVICE_ATTR(std_cmd, S_IRUGO|S_IWUGO, bq27541_read_stdcmd,
bq27541_write_stdcmd);
static DEVICE_ATTR(sub_cmd, S_IRUGO|S_IWUGO, bq27541_read_subcmd,
bq27541_write_subcmd);
static struct attribute *fs_attrs[] = {
&dev_attr_std_cmd.attr,
&dev_attr_sub_cmd.attr,
NULL,
};
static struct attribute_group fs_attr_group = {
.attrs = fs_attrs,
};
static struct platform_device this_device = {
.name = "bq27541-test",
.id = -1,
.dev.platform_data = NULL,
};
#endif
static int bq27541_battery_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
char *name;
struct bq27541_device_info *di;
struct bq27541_access_methods *bus;
int num;
int retval = 0;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
return -ENODEV;
/* Get new ID for the new battery device */
retval = idr_pre_get(&battery_id, GFP_KERNEL);
if (retval == 0)
return -ENOMEM;
mutex_lock(&battery_mutex);
retval = idr_get_new(&battery_id, client, &num);
mutex_unlock(&battery_mutex);
if (retval < 0)
return retval;
name = kasprintf(GFP_KERNEL, "%s-%d", id->name, num);
if (!name) {
dev_err(&client->dev, "failed to allocate device name\n");
retval = -ENOMEM;
goto batt_failed_1;
}
di = kzalloc(sizeof(*di), GFP_KERNEL);
if (!di) {
dev_err(&client->dev, "failed to allocate device info data\n");
retval = -ENOMEM;
goto batt_failed_2;
}
di->id = num;
bus = kzalloc(sizeof(*bus), GFP_KERNEL);
if (!bus) {
dev_err(&client->dev, "failed to allocate access method "
"data\n");
retval = -ENOMEM;
goto batt_failed_3;
}
i2c_set_clientdata(client, di);
di->dev = &client->dev;
bus->read = &bq27541_read_i2c;
di->bus = bus;
di->client = client;
#ifdef CONFIG_BQ27541_TEST_ENABLE
platform_set_drvdata(&this_device, di);
retval = platform_device_register(&this_device);
if (!retval) {
retval = sysfs_create_group(&this_device.dev.kobj,
&fs_attr_group);
if (retval)
goto batt_failed_4;
} else
goto batt_failed_4;
#endif
if (retval) {
dev_err(&client->dev, "failed to setup bq27541\n");
goto batt_failed_4;
}
if (retval) {
dev_err(&client->dev, "failed to powerup bq27541\n");
goto batt_failed_4;
}
spin_lock_init(&lock);
bq27541_di = di;
INIT_WORK(&di->counter, bq27541_coulomb_counter_work);
INIT_DELAYED_WORK(&di->hw_config, bq27541_hw_config);
schedule_delayed_work(&di->hw_config, BQ27541_INIT_DELAY);
return 0;
batt_failed_4:
kfree(bus);
batt_failed_3:
kfree(di);
batt_failed_2:
kfree(name);
batt_failed_1:
mutex_lock(&battery_mutex);
idr_remove(&battery_id, num);
mutex_unlock(&battery_mutex);
return retval;
}
static int bq27541_battery_remove(struct i2c_client *client)
{
struct bq27541_device_info *di = i2c_get_clientdata(client);
msm_battery_gauge_unregister(&bq27541_batt_gauge);
bq27541_cntl_cmd(di, BQ27541_SUBCMD_DISABLE_DLOG);
udelay(66);
bq27541_cntl_cmd(di, BQ27541_SUBCMD_DISABLE_IT);
cancel_delayed_work_sync(&di->hw_config);
kfree(di->bus);
mutex_lock(&battery_mutex);
idr_remove(&battery_id, di->id);
mutex_unlock(&battery_mutex);
kfree(di);
return 0;
}
static const struct i2c_device_id bq27541_id[] = {
{ "bq27541", 1 },
{},
};
MODULE_DEVICE_TABLE(i2c, BQ27541_id);
static struct i2c_driver bq27541_battery_driver = {
.driver = {
.name = "bq27541-battery",
},
.probe = bq27541_battery_probe,
.remove = bq27541_battery_remove,
.id_table = bq27541_id,
};
static int __init bq27541_battery_init(void)
{
int ret;
ret = i2c_add_driver(&bq27541_battery_driver);
if (ret)
printk(KERN_ERR "Unable to register BQ27541 driver\n");
return ret;
}
module_init(bq27541_battery_init);
static void __exit bq27541_battery_exit(void)
{
i2c_del_driver(&bq27541_battery_driver);
}
module_exit(bq27541_battery_exit);
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Qualcomm Innovation Center, Inc.");
MODULE_DESCRIPTION("BQ27541 battery monitor driver");
| gpl-2.0 |
ocoot/octopus-kernel | drivers/isdn/mISDN/hwchannel.c | 4842 | 12301 | /*
*
* Author Karsten Keil <kkeil@novell.com>
*
* Copyright 2008 by Karsten Keil <kkeil@novell.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/gfp.h>
#include <linux/module.h>
#include <linux/mISDNhw.h>
static void
dchannel_bh(struct work_struct *ws)
{
struct dchannel *dch = container_of(ws, struct dchannel, workq);
struct sk_buff *skb;
int err;
if (test_and_clear_bit(FLG_RECVQUEUE, &dch->Flags)) {
while ((skb = skb_dequeue(&dch->rqueue))) {
if (likely(dch->dev.D.peer)) {
err = dch->dev.D.recv(dch->dev.D.peer, skb);
if (err)
dev_kfree_skb(skb);
} else
dev_kfree_skb(skb);
}
}
if (test_and_clear_bit(FLG_PHCHANGE, &dch->Flags)) {
if (dch->phfunc)
dch->phfunc(dch);
}
}
static void
bchannel_bh(struct work_struct *ws)
{
struct bchannel *bch = container_of(ws, struct bchannel, workq);
struct sk_buff *skb;
int err;
if (test_and_clear_bit(FLG_RECVQUEUE, &bch->Flags)) {
while ((skb = skb_dequeue(&bch->rqueue))) {
bch->rcount--;
if (likely(bch->ch.peer)) {
err = bch->ch.recv(bch->ch.peer, skb);
if (err)
dev_kfree_skb(skb);
} else
dev_kfree_skb(skb);
}
}
}
int
mISDN_initdchannel(struct dchannel *ch, int maxlen, void *phf)
{
test_and_set_bit(FLG_HDLC, &ch->Flags);
ch->maxlen = maxlen;
ch->hw = NULL;
ch->rx_skb = NULL;
ch->tx_skb = NULL;
ch->tx_idx = 0;
ch->phfunc = phf;
skb_queue_head_init(&ch->squeue);
skb_queue_head_init(&ch->rqueue);
INIT_LIST_HEAD(&ch->dev.bchannels);
INIT_WORK(&ch->workq, dchannel_bh);
return 0;
}
EXPORT_SYMBOL(mISDN_initdchannel);
int
mISDN_initbchannel(struct bchannel *ch, unsigned short maxlen,
unsigned short minlen)
{
ch->Flags = 0;
ch->minlen = minlen;
ch->next_minlen = minlen;
ch->init_minlen = minlen;
ch->maxlen = maxlen;
ch->next_maxlen = maxlen;
ch->init_maxlen = maxlen;
ch->hw = NULL;
ch->rx_skb = NULL;
ch->tx_skb = NULL;
ch->tx_idx = 0;
skb_queue_head_init(&ch->rqueue);
ch->rcount = 0;
ch->next_skb = NULL;
INIT_WORK(&ch->workq, bchannel_bh);
return 0;
}
EXPORT_SYMBOL(mISDN_initbchannel);
int
mISDN_freedchannel(struct dchannel *ch)
{
if (ch->tx_skb) {
dev_kfree_skb(ch->tx_skb);
ch->tx_skb = NULL;
}
if (ch->rx_skb) {
dev_kfree_skb(ch->rx_skb);
ch->rx_skb = NULL;
}
skb_queue_purge(&ch->squeue);
skb_queue_purge(&ch->rqueue);
flush_work(&ch->workq);
return 0;
}
EXPORT_SYMBOL(mISDN_freedchannel);
void
mISDN_clear_bchannel(struct bchannel *ch)
{
if (ch->tx_skb) {
dev_kfree_skb(ch->tx_skb);
ch->tx_skb = NULL;
}
ch->tx_idx = 0;
if (ch->rx_skb) {
dev_kfree_skb(ch->rx_skb);
ch->rx_skb = NULL;
}
if (ch->next_skb) {
dev_kfree_skb(ch->next_skb);
ch->next_skb = NULL;
}
test_and_clear_bit(FLG_TX_BUSY, &ch->Flags);
test_and_clear_bit(FLG_TX_NEXT, &ch->Flags);
test_and_clear_bit(FLG_ACTIVE, &ch->Flags);
test_and_clear_bit(FLG_FILLEMPTY, &ch->Flags);
test_and_clear_bit(FLG_TX_EMPTY, &ch->Flags);
test_and_clear_bit(FLG_RX_OFF, &ch->Flags);
ch->dropcnt = 0;
ch->minlen = ch->init_minlen;
ch->next_minlen = ch->init_minlen;
ch->maxlen = ch->init_maxlen;
ch->next_maxlen = ch->init_maxlen;
skb_queue_purge(&ch->rqueue);
ch->rcount = 0;
}
EXPORT_SYMBOL(mISDN_clear_bchannel);
void
mISDN_freebchannel(struct bchannel *ch)
{
cancel_work_sync(&ch->workq);
mISDN_clear_bchannel(ch);
}
EXPORT_SYMBOL(mISDN_freebchannel);
int
mISDN_ctrl_bchannel(struct bchannel *bch, struct mISDN_ctrl_req *cq)
{
int ret = 0;
switch (cq->op) {
case MISDN_CTRL_GETOP:
cq->op = MISDN_CTRL_RX_BUFFER | MISDN_CTRL_FILL_EMPTY |
MISDN_CTRL_RX_OFF;
break;
case MISDN_CTRL_FILL_EMPTY:
if (cq->p1) {
memset(bch->fill, cq->p2 & 0xff, MISDN_BCH_FILL_SIZE);
test_and_set_bit(FLG_FILLEMPTY, &bch->Flags);
} else {
test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags);
}
break;
case MISDN_CTRL_RX_OFF:
/* read back dropped byte count */
cq->p2 = bch->dropcnt;
if (cq->p1)
test_and_set_bit(FLG_RX_OFF, &bch->Flags);
else
test_and_clear_bit(FLG_RX_OFF, &bch->Flags);
bch->dropcnt = 0;
break;
case MISDN_CTRL_RX_BUFFER:
if (cq->p2 > MISDN_CTRL_RX_SIZE_IGNORE)
bch->next_maxlen = cq->p2;
if (cq->p1 > MISDN_CTRL_RX_SIZE_IGNORE)
bch->next_minlen = cq->p1;
/* we return the old values */
cq->p1 = bch->minlen;
cq->p2 = bch->maxlen;
break;
default:
pr_info("mISDN unhandled control %x operation\n", cq->op);
ret = -EINVAL;
break;
}
return ret;
}
EXPORT_SYMBOL(mISDN_ctrl_bchannel);
static inline u_int
get_sapi_tei(u_char *p)
{
u_int sapi, tei;
sapi = *p >> 2;
tei = p[1] >> 1;
return sapi | (tei << 8);
}
void
recv_Dchannel(struct dchannel *dch)
{
struct mISDNhead *hh;
if (dch->rx_skb->len < 2) { /* at least 2 for sapi / tei */
dev_kfree_skb(dch->rx_skb);
dch->rx_skb = NULL;
return;
}
hh = mISDN_HEAD_P(dch->rx_skb);
hh->prim = PH_DATA_IND;
hh->id = get_sapi_tei(dch->rx_skb->data);
skb_queue_tail(&dch->rqueue, dch->rx_skb);
dch->rx_skb = NULL;
schedule_event(dch, FLG_RECVQUEUE);
}
EXPORT_SYMBOL(recv_Dchannel);
void
recv_Echannel(struct dchannel *ech, struct dchannel *dch)
{
struct mISDNhead *hh;
if (ech->rx_skb->len < 2) { /* at least 2 for sapi / tei */
dev_kfree_skb(ech->rx_skb);
ech->rx_skb = NULL;
return;
}
hh = mISDN_HEAD_P(ech->rx_skb);
hh->prim = PH_DATA_E_IND;
hh->id = get_sapi_tei(ech->rx_skb->data);
skb_queue_tail(&dch->rqueue, ech->rx_skb);
ech->rx_skb = NULL;
schedule_event(dch, FLG_RECVQUEUE);
}
EXPORT_SYMBOL(recv_Echannel);
void
recv_Bchannel(struct bchannel *bch, unsigned int id, bool force)
{
struct mISDNhead *hh;
/* if allocation did fail upper functions still may call us */
if (unlikely(!bch->rx_skb))
return;
if (unlikely(!bch->rx_skb->len)) {
/* we have no data to send - this may happen after recovery
* from overflow or too small allocation.
* We need to free the buffer here */
dev_kfree_skb(bch->rx_skb);
bch->rx_skb = NULL;
} else {
if (test_bit(FLG_TRANSPARENT, &bch->Flags) &&
(bch->rx_skb->len < bch->minlen) && !force)
return;
hh = mISDN_HEAD_P(bch->rx_skb);
hh->prim = PH_DATA_IND;
hh->id = id;
if (bch->rcount >= 64) {
printk(KERN_WARNING
"B%d receive queue overflow - flushing!\n",
bch->nr);
skb_queue_purge(&bch->rqueue);
}
bch->rcount++;
skb_queue_tail(&bch->rqueue, bch->rx_skb);
bch->rx_skb = NULL;
schedule_event(bch, FLG_RECVQUEUE);
}
}
EXPORT_SYMBOL(recv_Bchannel);
void
recv_Dchannel_skb(struct dchannel *dch, struct sk_buff *skb)
{
skb_queue_tail(&dch->rqueue, skb);
schedule_event(dch, FLG_RECVQUEUE);
}
EXPORT_SYMBOL(recv_Dchannel_skb);
void
recv_Bchannel_skb(struct bchannel *bch, struct sk_buff *skb)
{
if (bch->rcount >= 64) {
printk(KERN_WARNING "B-channel %p receive queue overflow, "
"flushing!\n", bch);
skb_queue_purge(&bch->rqueue);
bch->rcount = 0;
}
bch->rcount++;
skb_queue_tail(&bch->rqueue, skb);
schedule_event(bch, FLG_RECVQUEUE);
}
EXPORT_SYMBOL(recv_Bchannel_skb);
static void
confirm_Dsend(struct dchannel *dch)
{
struct sk_buff *skb;
skb = _alloc_mISDN_skb(PH_DATA_CNF, mISDN_HEAD_ID(dch->tx_skb),
0, NULL, GFP_ATOMIC);
if (!skb) {
printk(KERN_ERR "%s: no skb id %x\n", __func__,
mISDN_HEAD_ID(dch->tx_skb));
return;
}
skb_queue_tail(&dch->rqueue, skb);
schedule_event(dch, FLG_RECVQUEUE);
}
int
get_next_dframe(struct dchannel *dch)
{
dch->tx_idx = 0;
dch->tx_skb = skb_dequeue(&dch->squeue);
if (dch->tx_skb) {
confirm_Dsend(dch);
return 1;
}
dch->tx_skb = NULL;
test_and_clear_bit(FLG_TX_BUSY, &dch->Flags);
return 0;
}
EXPORT_SYMBOL(get_next_dframe);
static void
confirm_Bsend(struct bchannel *bch)
{
struct sk_buff *skb;
if (bch->rcount >= 64) {
printk(KERN_WARNING "B-channel %p receive queue overflow, "
"flushing!\n", bch);
skb_queue_purge(&bch->rqueue);
bch->rcount = 0;
}
skb = _alloc_mISDN_skb(PH_DATA_CNF, mISDN_HEAD_ID(bch->tx_skb),
0, NULL, GFP_ATOMIC);
if (!skb) {
printk(KERN_ERR "%s: no skb id %x\n", __func__,
mISDN_HEAD_ID(bch->tx_skb));
return;
}
bch->rcount++;
skb_queue_tail(&bch->rqueue, skb);
schedule_event(bch, FLG_RECVQUEUE);
}
int
get_next_bframe(struct bchannel *bch)
{
bch->tx_idx = 0;
if (test_bit(FLG_TX_NEXT, &bch->Flags)) {
bch->tx_skb = bch->next_skb;
if (bch->tx_skb) {
bch->next_skb = NULL;
test_and_clear_bit(FLG_TX_NEXT, &bch->Flags);
/* confirm imediately to allow next data */
confirm_Bsend(bch);
return 1;
} else {
test_and_clear_bit(FLG_TX_NEXT, &bch->Flags);
printk(KERN_WARNING "B TX_NEXT without skb\n");
}
}
bch->tx_skb = NULL;
test_and_clear_bit(FLG_TX_BUSY, &bch->Flags);
return 0;
}
EXPORT_SYMBOL(get_next_bframe);
void
queue_ch_frame(struct mISDNchannel *ch, u_int pr, int id, struct sk_buff *skb)
{
struct mISDNhead *hh;
if (!skb) {
_queue_data(ch, pr, id, 0, NULL, GFP_ATOMIC);
} else {
if (ch->peer) {
hh = mISDN_HEAD_P(skb);
hh->prim = pr;
hh->id = id;
if (!ch->recv(ch->peer, skb))
return;
}
dev_kfree_skb(skb);
}
}
EXPORT_SYMBOL(queue_ch_frame);
int
dchannel_senddata(struct dchannel *ch, struct sk_buff *skb)
{
/* check oversize */
if (skb->len <= 0) {
printk(KERN_WARNING "%s: skb too small\n", __func__);
return -EINVAL;
}
if (skb->len > ch->maxlen) {
printk(KERN_WARNING "%s: skb too large(%d/%d)\n",
__func__, skb->len, ch->maxlen);
return -EINVAL;
}
/* HW lock must be obtained */
if (test_and_set_bit(FLG_TX_BUSY, &ch->Flags)) {
skb_queue_tail(&ch->squeue, skb);
return 0;
} else {
/* write to fifo */
ch->tx_skb = skb;
ch->tx_idx = 0;
return 1;
}
}
EXPORT_SYMBOL(dchannel_senddata);
int
bchannel_senddata(struct bchannel *ch, struct sk_buff *skb)
{
/* check oversize */
if (skb->len <= 0) {
printk(KERN_WARNING "%s: skb too small\n", __func__);
return -EINVAL;
}
if (skb->len > ch->maxlen) {
printk(KERN_WARNING "%s: skb too large(%d/%d)\n",
__func__, skb->len, ch->maxlen);
return -EINVAL;
}
/* HW lock must be obtained */
/* check for pending next_skb */
if (ch->next_skb) {
printk(KERN_WARNING
"%s: next_skb exist ERROR (skb->len=%d next_skb->len=%d)\n",
__func__, skb->len, ch->next_skb->len);
return -EBUSY;
}
if (test_and_set_bit(FLG_TX_BUSY, &ch->Flags)) {
test_and_set_bit(FLG_TX_NEXT, &ch->Flags);
ch->next_skb = skb;
return 0;
} else {
/* write to fifo */
ch->tx_skb = skb;
ch->tx_idx = 0;
confirm_Bsend(ch);
return 1;
}
}
EXPORT_SYMBOL(bchannel_senddata);
/* The function allocates a new receive skb on demand with a size for the
* requirements of the current protocol. It returns the tailroom of the
* receive skb or an error.
*/
int
bchannel_get_rxbuf(struct bchannel *bch, int reqlen)
{
int len;
if (bch->rx_skb) {
len = skb_tailroom(bch->rx_skb);
if (len < reqlen) {
pr_warning("B%d no space for %d (only %d) bytes\n",
bch->nr, reqlen, len);
if (test_bit(FLG_TRANSPARENT, &bch->Flags)) {
/* send what we have now and try a new buffer */
recv_Bchannel(bch, 0, true);
} else {
/* on HDLC we have to drop too big frames */
return -EMSGSIZE;
}
} else {
return len;
}
}
/* update current min/max length first */
if (unlikely(bch->maxlen != bch->next_maxlen))
bch->maxlen = bch->next_maxlen;
if (unlikely(bch->minlen != bch->next_minlen))
bch->minlen = bch->next_minlen;
if (unlikely(reqlen > bch->maxlen))
return -EMSGSIZE;
if (test_bit(FLG_TRANSPARENT, &bch->Flags)) {
if (reqlen >= bch->minlen) {
len = reqlen;
} else {
len = 2 * bch->minlen;
if (len > bch->maxlen)
len = bch->maxlen;
}
} else {
/* with HDLC we do not know the length yet */
len = bch->maxlen;
}
bch->rx_skb = mI_alloc_skb(len, GFP_ATOMIC);
if (!bch->rx_skb) {
pr_warning("B%d receive no memory for %d bytes\n",
bch->nr, len);
len = -ENOMEM;
}
return len;
}
EXPORT_SYMBOL(bchannel_get_rxbuf);
| gpl-2.0 |
nobooya/e975-kk-kernel | net/wireless/sysfs.c | 5354 | 3466 | /*
* This file provides /sys/class/ieee80211/<wiphy name>/
* and some default attributes.
*
* Copyright 2005-2006 Jiri Benc <jbenc@suse.cz>
* Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
*
* This file is GPLv2 as found in COPYING.
*/
#include <linux/device.h>
#include <linux/module.h>
#include <linux/netdevice.h>
#include <linux/nl80211.h>
#include <linux/rtnetlink.h>
#include <net/cfg80211.h>
#include "sysfs.h"
#include "core.h"
static inline struct cfg80211_registered_device *dev_to_rdev(
struct device *dev)
{
return container_of(dev, struct cfg80211_registered_device, wiphy.dev);
}
#define SHOW_FMT(name, fmt, member) \
static ssize_t name ## _show(struct device *dev, \
struct device_attribute *attr, \
char *buf) \
{ \
return sprintf(buf, fmt "\n", dev_to_rdev(dev)->member); \
}
SHOW_FMT(index, "%d", wiphy_idx);
SHOW_FMT(macaddress, "%pM", wiphy.perm_addr);
SHOW_FMT(address_mask, "%pM", wiphy.addr_mask);
static ssize_t name_show(struct device *dev,
struct device_attribute *attr,
char *buf) {
struct wiphy *wiphy = &dev_to_rdev(dev)->wiphy;
return sprintf(buf, "%s\n", dev_name(&wiphy->dev));
}
static ssize_t addresses_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct wiphy *wiphy = &dev_to_rdev(dev)->wiphy;
char *start = buf;
int i;
if (!wiphy->addresses)
return sprintf(buf, "%pM\n", wiphy->perm_addr);
for (i = 0; i < wiphy->n_addresses; i++)
buf += sprintf(buf, "%pM\n", &wiphy->addresses[i].addr);
return buf - start;
}
static struct device_attribute ieee80211_dev_attrs[] = {
__ATTR_RO(index),
__ATTR_RO(macaddress),
__ATTR_RO(address_mask),
__ATTR_RO(addresses),
__ATTR_RO(name),
{}
};
static void wiphy_dev_release(struct device *dev)
{
struct cfg80211_registered_device *rdev = dev_to_rdev(dev);
cfg80211_dev_free(rdev);
}
#ifdef CONFIG_HOTPLUG
static int wiphy_uevent(struct device *dev, struct kobj_uevent_env *env)
{
/* TODO, we probably need stuff here */
return 0;
}
#endif
static int wiphy_suspend(struct device *dev, pm_message_t state)
{
struct cfg80211_registered_device *rdev = dev_to_rdev(dev);
int ret = 0;
rdev->suspend_at = get_seconds();
if (rdev->ops->suspend) {
rtnl_lock();
if (rdev->wiphy.registered)
ret = rdev->ops->suspend(&rdev->wiphy, rdev->wowlan);
rtnl_unlock();
}
return ret;
}
static int wiphy_resume(struct device *dev)
{
struct cfg80211_registered_device *rdev = dev_to_rdev(dev);
int ret = 0;
/* Age scan results with time spent in suspend */
spin_lock_bh(&rdev->bss_lock);
cfg80211_bss_age(rdev, get_seconds() - rdev->suspend_at);
spin_unlock_bh(&rdev->bss_lock);
if (rdev->ops->resume) {
rtnl_lock();
if (rdev->wiphy.registered)
ret = rdev->ops->resume(&rdev->wiphy);
rtnl_unlock();
}
return ret;
}
static const void *wiphy_namespace(struct device *d)
{
struct wiphy *wiphy = container_of(d, struct wiphy, dev);
return wiphy_net(wiphy);
}
struct class ieee80211_class = {
.name = "ieee80211",
.owner = THIS_MODULE,
.dev_release = wiphy_dev_release,
.dev_attrs = ieee80211_dev_attrs,
#ifdef CONFIG_HOTPLUG
.dev_uevent = wiphy_uevent,
#endif
.suspend = wiphy_suspend,
.resume = wiphy_resume,
.ns_type = &net_ns_type_operations,
.namespace = wiphy_namespace,
};
int wiphy_sysfs_init(void)
{
return class_register(&ieee80211_class);
}
void wiphy_sysfs_exit(void)
{
class_unregister(&ieee80211_class);
}
| gpl-2.0 |
OnePlusTech/android_kernel_oneplus_one | drivers/scsi/bfa/bfa_fcs_fcpim.c | 5610 | 21866 | /*
* Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
* All rights reserved
* www.brocade.com
*
* Linux driver for Brocade Fibre Channel Host Bus Adapter.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License (GPL) Version 2 as
* published by the Free Software Foundation
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*/
/*
* fcpim.c - FCP initiator mode i-t nexus state machine
*/
#include "bfad_drv.h"
#include "bfa_fcs.h"
#include "bfa_fcbuild.h"
#include "bfad_im.h"
BFA_TRC_FILE(FCS, FCPIM);
/*
* forward declarations
*/
static void bfa_fcs_itnim_timeout(void *arg);
static void bfa_fcs_itnim_free(struct bfa_fcs_itnim_s *itnim);
static void bfa_fcs_itnim_send_prli(void *itnim_cbarg,
struct bfa_fcxp_s *fcxp_alloced);
static void bfa_fcs_itnim_prli_response(void *fcsarg,
struct bfa_fcxp_s *fcxp, void *cbarg,
bfa_status_t req_status, u32 rsp_len,
u32 resid_len, struct fchs_s *rsp_fchs);
static void bfa_fcs_itnim_aen_post(struct bfa_fcs_itnim_s *itnim,
enum bfa_itnim_aen_event event);
/*
* fcs_itnim_sm FCS itnim state machine events
*/
enum bfa_fcs_itnim_event {
BFA_FCS_ITNIM_SM_ONLINE = 1, /* rport online event */
BFA_FCS_ITNIM_SM_OFFLINE = 2, /* rport offline */
BFA_FCS_ITNIM_SM_FRMSENT = 3, /* prli frame is sent */
BFA_FCS_ITNIM_SM_RSP_OK = 4, /* good response */
BFA_FCS_ITNIM_SM_RSP_ERROR = 5, /* error response */
BFA_FCS_ITNIM_SM_TIMEOUT = 6, /* delay timeout */
BFA_FCS_ITNIM_SM_HCB_OFFLINE = 7, /* BFA online callback */
BFA_FCS_ITNIM_SM_HCB_ONLINE = 8, /* BFA offline callback */
BFA_FCS_ITNIM_SM_INITIATOR = 9, /* rport is initiator */
BFA_FCS_ITNIM_SM_DELETE = 10, /* delete event from rport */
BFA_FCS_ITNIM_SM_PRLO = 11, /* delete event from rport */
BFA_FCS_ITNIM_SM_RSP_NOT_SUPP = 12, /* cmd not supported rsp */
};
static void bfa_fcs_itnim_sm_offline(struct bfa_fcs_itnim_s *itnim,
enum bfa_fcs_itnim_event event);
static void bfa_fcs_itnim_sm_prli_send(struct bfa_fcs_itnim_s *itnim,
enum bfa_fcs_itnim_event event);
static void bfa_fcs_itnim_sm_prli(struct bfa_fcs_itnim_s *itnim,
enum bfa_fcs_itnim_event event);
static void bfa_fcs_itnim_sm_prli_retry(struct bfa_fcs_itnim_s *itnim,
enum bfa_fcs_itnim_event event);
static void bfa_fcs_itnim_sm_hcb_online(struct bfa_fcs_itnim_s *itnim,
enum bfa_fcs_itnim_event event);
static void bfa_fcs_itnim_sm_online(struct bfa_fcs_itnim_s *itnim,
enum bfa_fcs_itnim_event event);
static void bfa_fcs_itnim_sm_hcb_offline(struct bfa_fcs_itnim_s *itnim,
enum bfa_fcs_itnim_event event);
static void bfa_fcs_itnim_sm_initiator(struct bfa_fcs_itnim_s *itnim,
enum bfa_fcs_itnim_event event);
static struct bfa_sm_table_s itnim_sm_table[] = {
{BFA_SM(bfa_fcs_itnim_sm_offline), BFA_ITNIM_OFFLINE},
{BFA_SM(bfa_fcs_itnim_sm_prli_send), BFA_ITNIM_PRLI_SEND},
{BFA_SM(bfa_fcs_itnim_sm_prli), BFA_ITNIM_PRLI_SENT},
{BFA_SM(bfa_fcs_itnim_sm_prli_retry), BFA_ITNIM_PRLI_RETRY},
{BFA_SM(bfa_fcs_itnim_sm_hcb_online), BFA_ITNIM_HCB_ONLINE},
{BFA_SM(bfa_fcs_itnim_sm_online), BFA_ITNIM_ONLINE},
{BFA_SM(bfa_fcs_itnim_sm_hcb_offline), BFA_ITNIM_HCB_OFFLINE},
{BFA_SM(bfa_fcs_itnim_sm_initiator), BFA_ITNIM_INITIATIOR},
};
/*
* fcs_itnim_sm FCS itnim state machine
*/
static void
bfa_fcs_itnim_sm_offline(struct bfa_fcs_itnim_s *itnim,
enum bfa_fcs_itnim_event event)
{
bfa_trc(itnim->fcs, itnim->rport->pwwn);
bfa_trc(itnim->fcs, event);
switch (event) {
case BFA_FCS_ITNIM_SM_ONLINE:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_prli_send);
itnim->prli_retries = 0;
bfa_fcs_itnim_send_prli(itnim, NULL);
break;
case BFA_FCS_ITNIM_SM_OFFLINE:
bfa_sm_send_event(itnim->rport, RPSM_EVENT_FC4_OFFLINE);
break;
case BFA_FCS_ITNIM_SM_INITIATOR:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_initiator);
break;
case BFA_FCS_ITNIM_SM_DELETE:
bfa_fcs_itnim_free(itnim);
break;
default:
bfa_sm_fault(itnim->fcs, event);
}
}
static void
bfa_fcs_itnim_sm_prli_send(struct bfa_fcs_itnim_s *itnim,
enum bfa_fcs_itnim_event event)
{
bfa_trc(itnim->fcs, itnim->rport->pwwn);
bfa_trc(itnim->fcs, event);
switch (event) {
case BFA_FCS_ITNIM_SM_FRMSENT:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_prli);
break;
case BFA_FCS_ITNIM_SM_INITIATOR:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_initiator);
bfa_fcxp_walloc_cancel(itnim->fcs->bfa, &itnim->fcxp_wqe);
break;
case BFA_FCS_ITNIM_SM_OFFLINE:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_offline);
bfa_fcxp_walloc_cancel(itnim->fcs->bfa, &itnim->fcxp_wqe);
bfa_sm_send_event(itnim->rport, RPSM_EVENT_FC4_OFFLINE);
break;
case BFA_FCS_ITNIM_SM_DELETE:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_offline);
bfa_fcxp_walloc_cancel(itnim->fcs->bfa, &itnim->fcxp_wqe);
bfa_fcs_itnim_free(itnim);
break;
default:
bfa_sm_fault(itnim->fcs, event);
}
}
static void
bfa_fcs_itnim_sm_prli(struct bfa_fcs_itnim_s *itnim,
enum bfa_fcs_itnim_event event)
{
bfa_trc(itnim->fcs, itnim->rport->pwwn);
bfa_trc(itnim->fcs, event);
switch (event) {
case BFA_FCS_ITNIM_SM_RSP_OK:
if (itnim->rport->scsi_function == BFA_RPORT_INITIATOR) {
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_initiator);
} else {
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_hcb_online);
bfa_itnim_online(itnim->bfa_itnim, itnim->seq_rec);
}
break;
case BFA_FCS_ITNIM_SM_RSP_ERROR:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_prli_retry);
bfa_timer_start(itnim->fcs->bfa, &itnim->timer,
bfa_fcs_itnim_timeout, itnim,
BFA_FCS_RETRY_TIMEOUT);
break;
case BFA_FCS_ITNIM_SM_RSP_NOT_SUPP:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_offline);
break;
case BFA_FCS_ITNIM_SM_OFFLINE:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_offline);
bfa_fcxp_discard(itnim->fcxp);
bfa_sm_send_event(itnim->rport, RPSM_EVENT_FC4_OFFLINE);
break;
case BFA_FCS_ITNIM_SM_INITIATOR:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_initiator);
bfa_fcxp_discard(itnim->fcxp);
break;
case BFA_FCS_ITNIM_SM_DELETE:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_offline);
bfa_fcxp_discard(itnim->fcxp);
bfa_fcs_itnim_free(itnim);
break;
default:
bfa_sm_fault(itnim->fcs, event);
}
}
static void
bfa_fcs_itnim_sm_prli_retry(struct bfa_fcs_itnim_s *itnim,
enum bfa_fcs_itnim_event event)
{
bfa_trc(itnim->fcs, itnim->rport->pwwn);
bfa_trc(itnim->fcs, event);
switch (event) {
case BFA_FCS_ITNIM_SM_TIMEOUT:
if (itnim->prli_retries < BFA_FCS_RPORT_MAX_RETRIES) {
itnim->prli_retries++;
bfa_trc(itnim->fcs, itnim->prli_retries);
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_prli_send);
bfa_fcs_itnim_send_prli(itnim, NULL);
} else {
/* invoke target offline */
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_offline);
bfa_sm_send_event(itnim->rport, RPSM_EVENT_LOGO_IMP);
}
break;
case BFA_FCS_ITNIM_SM_OFFLINE:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_offline);
bfa_timer_stop(&itnim->timer);
bfa_sm_send_event(itnim->rport, RPSM_EVENT_FC4_OFFLINE);
break;
case BFA_FCS_ITNIM_SM_INITIATOR:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_initiator);
bfa_timer_stop(&itnim->timer);
break;
case BFA_FCS_ITNIM_SM_DELETE:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_offline);
bfa_timer_stop(&itnim->timer);
bfa_fcs_itnim_free(itnim);
break;
default:
bfa_sm_fault(itnim->fcs, event);
}
}
static void
bfa_fcs_itnim_sm_hcb_online(struct bfa_fcs_itnim_s *itnim,
enum bfa_fcs_itnim_event event)
{
struct bfad_s *bfad = (struct bfad_s *)itnim->fcs->bfad;
char lpwwn_buf[BFA_STRING_32];
char rpwwn_buf[BFA_STRING_32];
bfa_trc(itnim->fcs, itnim->rport->pwwn);
bfa_trc(itnim->fcs, event);
switch (event) {
case BFA_FCS_ITNIM_SM_HCB_ONLINE:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_online);
bfa_fcb_itnim_online(itnim->itnim_drv);
wwn2str(lpwwn_buf, bfa_fcs_lport_get_pwwn(itnim->rport->port));
wwn2str(rpwwn_buf, itnim->rport->pwwn);
BFA_LOG(KERN_INFO, bfad, bfa_log_level,
"Target (WWN = %s) is online for initiator (WWN = %s)\n",
rpwwn_buf, lpwwn_buf);
bfa_fcs_itnim_aen_post(itnim, BFA_ITNIM_AEN_ONLINE);
break;
case BFA_FCS_ITNIM_SM_OFFLINE:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_offline);
bfa_itnim_offline(itnim->bfa_itnim);
bfa_sm_send_event(itnim->rport, RPSM_EVENT_FC4_OFFLINE);
break;
case BFA_FCS_ITNIM_SM_DELETE:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_offline);
bfa_fcs_itnim_free(itnim);
break;
default:
bfa_sm_fault(itnim->fcs, event);
}
}
static void
bfa_fcs_itnim_sm_online(struct bfa_fcs_itnim_s *itnim,
enum bfa_fcs_itnim_event event)
{
struct bfad_s *bfad = (struct bfad_s *)itnim->fcs->bfad;
char lpwwn_buf[BFA_STRING_32];
char rpwwn_buf[BFA_STRING_32];
bfa_trc(itnim->fcs, itnim->rport->pwwn);
bfa_trc(itnim->fcs, event);
switch (event) {
case BFA_FCS_ITNIM_SM_OFFLINE:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_hcb_offline);
bfa_fcb_itnim_offline(itnim->itnim_drv);
bfa_itnim_offline(itnim->bfa_itnim);
wwn2str(lpwwn_buf, bfa_fcs_lport_get_pwwn(itnim->rport->port));
wwn2str(rpwwn_buf, itnim->rport->pwwn);
if (bfa_fcs_lport_is_online(itnim->rport->port) == BFA_TRUE) {
BFA_LOG(KERN_ERR, bfad, bfa_log_level,
"Target (WWN = %s) connectivity lost for "
"initiator (WWN = %s)\n", rpwwn_buf, lpwwn_buf);
bfa_fcs_itnim_aen_post(itnim, BFA_ITNIM_AEN_DISCONNECT);
} else {
BFA_LOG(KERN_INFO, bfad, bfa_log_level,
"Target (WWN = %s) offlined by initiator (WWN = %s)\n",
rpwwn_buf, lpwwn_buf);
bfa_fcs_itnim_aen_post(itnim, BFA_ITNIM_AEN_OFFLINE);
}
break;
case BFA_FCS_ITNIM_SM_DELETE:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_offline);
bfa_fcs_itnim_free(itnim);
break;
default:
bfa_sm_fault(itnim->fcs, event);
}
}
static void
bfa_fcs_itnim_sm_hcb_offline(struct bfa_fcs_itnim_s *itnim,
enum bfa_fcs_itnim_event event)
{
bfa_trc(itnim->fcs, itnim->rport->pwwn);
bfa_trc(itnim->fcs, event);
switch (event) {
case BFA_FCS_ITNIM_SM_HCB_OFFLINE:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_offline);
bfa_sm_send_event(itnim->rport, RPSM_EVENT_FC4_OFFLINE);
break;
case BFA_FCS_ITNIM_SM_DELETE:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_offline);
bfa_fcs_itnim_free(itnim);
break;
default:
bfa_sm_fault(itnim->fcs, event);
}
}
/*
* This state is set when a discovered rport is also in intiator mode.
* This ITN is marked as no_op and is not active and will not be truned into
* online state.
*/
static void
bfa_fcs_itnim_sm_initiator(struct bfa_fcs_itnim_s *itnim,
enum bfa_fcs_itnim_event event)
{
bfa_trc(itnim->fcs, itnim->rport->pwwn);
bfa_trc(itnim->fcs, event);
switch (event) {
case BFA_FCS_ITNIM_SM_OFFLINE:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_offline);
bfa_sm_send_event(itnim->rport, RPSM_EVENT_FC4_OFFLINE);
break;
case BFA_FCS_ITNIM_SM_RSP_ERROR:
case BFA_FCS_ITNIM_SM_ONLINE:
case BFA_FCS_ITNIM_SM_INITIATOR:
break;
case BFA_FCS_ITNIM_SM_DELETE:
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_offline);
bfa_fcs_itnim_free(itnim);
break;
default:
bfa_sm_fault(itnim->fcs, event);
}
}
static void
bfa_fcs_itnim_aen_post(struct bfa_fcs_itnim_s *itnim,
enum bfa_itnim_aen_event event)
{
struct bfa_fcs_rport_s *rport = itnim->rport;
struct bfad_s *bfad = (struct bfad_s *)itnim->fcs->bfad;
struct bfa_aen_entry_s *aen_entry;
/* Don't post events for well known addresses */
if (BFA_FCS_PID_IS_WKA(rport->pid))
return;
bfad_get_aen_entry(bfad, aen_entry);
if (!aen_entry)
return;
aen_entry->aen_data.itnim.vf_id = rport->port->fabric->vf_id;
aen_entry->aen_data.itnim.ppwwn = bfa_fcs_lport_get_pwwn(
bfa_fcs_get_base_port(itnim->fcs));
aen_entry->aen_data.itnim.lpwwn = bfa_fcs_lport_get_pwwn(rport->port);
aen_entry->aen_data.itnim.rpwwn = rport->pwwn;
/* Send the AEN notification */
bfad_im_post_vendor_event(aen_entry, bfad, ++rport->fcs->fcs_aen_seq,
BFA_AEN_CAT_ITNIM, event);
}
static void
bfa_fcs_itnim_send_prli(void *itnim_cbarg, struct bfa_fcxp_s *fcxp_alloced)
{
struct bfa_fcs_itnim_s *itnim = itnim_cbarg;
struct bfa_fcs_rport_s *rport = itnim->rport;
struct bfa_fcs_lport_s *port = rport->port;
struct fchs_s fchs;
struct bfa_fcxp_s *fcxp;
int len;
bfa_trc(itnim->fcs, itnim->rport->pwwn);
fcxp = fcxp_alloced ? fcxp_alloced : bfa_fcs_fcxp_alloc(port->fcs);
if (!fcxp) {
itnim->stats.fcxp_alloc_wait++;
bfa_fcs_fcxp_alloc_wait(port->fcs->bfa, &itnim->fcxp_wqe,
bfa_fcs_itnim_send_prli, itnim);
return;
}
itnim->fcxp = fcxp;
len = fc_prli_build(&fchs, bfa_fcxp_get_reqbuf(fcxp),
itnim->rport->pid, bfa_fcs_lport_get_fcid(port), 0);
bfa_fcxp_send(fcxp, rport->bfa_rport, port->fabric->vf_id, port->lp_tag,
BFA_FALSE, FC_CLASS_3, len, &fchs,
bfa_fcs_itnim_prli_response, (void *)itnim,
FC_MAX_PDUSZ, FC_ELS_TOV);
itnim->stats.prli_sent++;
bfa_sm_send_event(itnim, BFA_FCS_ITNIM_SM_FRMSENT);
}
static void
bfa_fcs_itnim_prli_response(void *fcsarg, struct bfa_fcxp_s *fcxp, void *cbarg,
bfa_status_t req_status, u32 rsp_len,
u32 resid_len, struct fchs_s *rsp_fchs)
{
struct bfa_fcs_itnim_s *itnim = (struct bfa_fcs_itnim_s *) cbarg;
struct fc_els_cmd_s *els_cmd;
struct fc_prli_s *prli_resp;
struct fc_ls_rjt_s *ls_rjt;
struct fc_prli_params_s *sparams;
bfa_trc(itnim->fcs, req_status);
/*
* Sanity Checks
*/
if (req_status != BFA_STATUS_OK) {
itnim->stats.prli_rsp_err++;
bfa_sm_send_event(itnim, BFA_FCS_ITNIM_SM_RSP_ERROR);
return;
}
els_cmd = (struct fc_els_cmd_s *) BFA_FCXP_RSP_PLD(fcxp);
if (els_cmd->els_code == FC_ELS_ACC) {
prli_resp = (struct fc_prli_s *) els_cmd;
if (fc_prli_rsp_parse(prli_resp, rsp_len) != FC_PARSE_OK) {
bfa_trc(itnim->fcs, rsp_len);
/*
* Check if this r-port is also in Initiator mode.
* If so, we need to set this ITN as a no-op.
*/
if (prli_resp->parampage.servparams.initiator) {
bfa_trc(itnim->fcs, prli_resp->parampage.type);
itnim->rport->scsi_function =
BFA_RPORT_INITIATOR;
itnim->stats.prli_rsp_acc++;
itnim->stats.initiator++;
bfa_sm_send_event(itnim,
BFA_FCS_ITNIM_SM_RSP_OK);
return;
}
itnim->stats.prli_rsp_parse_err++;
return;
}
itnim->rport->scsi_function = BFA_RPORT_TARGET;
sparams = &prli_resp->parampage.servparams;
itnim->seq_rec = sparams->retry;
itnim->rec_support = sparams->rec_support;
itnim->task_retry_id = sparams->task_retry_id;
itnim->conf_comp = sparams->confirm;
itnim->stats.prli_rsp_acc++;
bfa_sm_send_event(itnim, BFA_FCS_ITNIM_SM_RSP_OK);
} else {
ls_rjt = (struct fc_ls_rjt_s *) BFA_FCXP_RSP_PLD(fcxp);
bfa_trc(itnim->fcs, ls_rjt->reason_code);
bfa_trc(itnim->fcs, ls_rjt->reason_code_expl);
itnim->stats.prli_rsp_rjt++;
if (ls_rjt->reason_code == FC_LS_RJT_RSN_CMD_NOT_SUPP) {
bfa_sm_send_event(itnim, BFA_FCS_ITNIM_SM_RSP_NOT_SUPP);
return;
}
bfa_sm_send_event(itnim, BFA_FCS_ITNIM_SM_RSP_ERROR);
}
}
static void
bfa_fcs_itnim_timeout(void *arg)
{
struct bfa_fcs_itnim_s *itnim = (struct bfa_fcs_itnim_s *) arg;
itnim->stats.timeout++;
bfa_sm_send_event(itnim, BFA_FCS_ITNIM_SM_TIMEOUT);
}
static void
bfa_fcs_itnim_free(struct bfa_fcs_itnim_s *itnim)
{
bfa_itnim_delete(itnim->bfa_itnim);
bfa_fcb_itnim_free(itnim->fcs->bfad, itnim->itnim_drv);
}
/*
* itnim_public FCS ITNIM public interfaces
*/
/*
* Called by rport when a new rport is created.
*
* @param[in] rport - remote port.
*/
struct bfa_fcs_itnim_s *
bfa_fcs_itnim_create(struct bfa_fcs_rport_s *rport)
{
struct bfa_fcs_lport_s *port = rport->port;
struct bfa_fcs_itnim_s *itnim;
struct bfad_itnim_s *itnim_drv;
struct bfa_itnim_s *bfa_itnim;
/*
* call bfad to allocate the itnim
*/
bfa_fcb_itnim_alloc(port->fcs->bfad, &itnim, &itnim_drv);
if (itnim == NULL) {
bfa_trc(port->fcs, rport->pwwn);
return NULL;
}
/*
* Initialize itnim
*/
itnim->rport = rport;
itnim->fcs = rport->fcs;
itnim->itnim_drv = itnim_drv;
/*
* call BFA to create the itnim
*/
bfa_itnim =
bfa_itnim_create(port->fcs->bfa, rport->bfa_rport, itnim);
if (bfa_itnim == NULL) {
bfa_trc(port->fcs, rport->pwwn);
bfa_fcb_itnim_free(port->fcs->bfad, itnim_drv);
WARN_ON(1);
return NULL;
}
itnim->bfa_itnim = bfa_itnim;
itnim->seq_rec = BFA_FALSE;
itnim->rec_support = BFA_FALSE;
itnim->conf_comp = BFA_FALSE;
itnim->task_retry_id = BFA_FALSE;
/*
* Set State machine
*/
bfa_sm_set_state(itnim, bfa_fcs_itnim_sm_offline);
return itnim;
}
/*
* Called by rport to delete the instance of FCPIM.
*
* @param[in] rport - remote port.
*/
void
bfa_fcs_itnim_delete(struct bfa_fcs_itnim_s *itnim)
{
bfa_trc(itnim->fcs, itnim->rport->pid);
bfa_sm_send_event(itnim, BFA_FCS_ITNIM_SM_DELETE);
}
/*
* Notification from rport that PLOGI is complete to initiate FC-4 session.
*/
void
bfa_fcs_itnim_rport_online(struct bfa_fcs_itnim_s *itnim)
{
itnim->stats.onlines++;
if (!BFA_FCS_PID_IS_WKA(itnim->rport->pid)) {
bfa_sm_send_event(itnim, BFA_FCS_ITNIM_SM_ONLINE);
} else {
/*
* For well known addresses, we set the itnim to initiator
* state
*/
itnim->stats.initiator++;
bfa_sm_send_event(itnim, BFA_FCS_ITNIM_SM_INITIATOR);
}
}
/*
* Called by rport to handle a remote device offline.
*/
void
bfa_fcs_itnim_rport_offline(struct bfa_fcs_itnim_s *itnim)
{
itnim->stats.offlines++;
bfa_sm_send_event(itnim, BFA_FCS_ITNIM_SM_OFFLINE);
}
/*
* Called by rport when remote port is known to be an initiator from
* PRLI received.
*/
void
bfa_fcs_itnim_is_initiator(struct bfa_fcs_itnim_s *itnim)
{
bfa_trc(itnim->fcs, itnim->rport->pid);
itnim->stats.initiator++;
bfa_sm_send_event(itnim, BFA_FCS_ITNIM_SM_INITIATOR);
}
/*
* Called by rport to check if the itnim is online.
*/
bfa_status_t
bfa_fcs_itnim_get_online_state(struct bfa_fcs_itnim_s *itnim)
{
bfa_trc(itnim->fcs, itnim->rport->pid);
switch (bfa_sm_to_state(itnim_sm_table, itnim->sm)) {
case BFA_ITNIM_ONLINE:
case BFA_ITNIM_INITIATIOR:
return BFA_STATUS_OK;
default:
return BFA_STATUS_NO_FCPIM_NEXUS;
}
}
/*
* BFA completion callback for bfa_itnim_online().
*/
void
bfa_cb_itnim_online(void *cbarg)
{
struct bfa_fcs_itnim_s *itnim = (struct bfa_fcs_itnim_s *) cbarg;
bfa_trc(itnim->fcs, itnim->rport->pwwn);
bfa_sm_send_event(itnim, BFA_FCS_ITNIM_SM_HCB_ONLINE);
}
/*
* BFA completion callback for bfa_itnim_offline().
*/
void
bfa_cb_itnim_offline(void *cb_arg)
{
struct bfa_fcs_itnim_s *itnim = (struct bfa_fcs_itnim_s *) cb_arg;
bfa_trc(itnim->fcs, itnim->rport->pwwn);
bfa_sm_send_event(itnim, BFA_FCS_ITNIM_SM_HCB_OFFLINE);
}
/*
* Mark the beginning of PATH TOV handling. IO completion callbacks
* are still pending.
*/
void
bfa_cb_itnim_tov_begin(void *cb_arg)
{
struct bfa_fcs_itnim_s *itnim = (struct bfa_fcs_itnim_s *) cb_arg;
bfa_trc(itnim->fcs, itnim->rport->pwwn);
}
/*
* Mark the end of PATH TOV handling. All pending IOs are already cleaned up.
*/
void
bfa_cb_itnim_tov(void *cb_arg)
{
struct bfa_fcs_itnim_s *itnim = (struct bfa_fcs_itnim_s *) cb_arg;
struct bfad_itnim_s *itnim_drv = itnim->itnim_drv;
bfa_trc(itnim->fcs, itnim->rport->pwwn);
itnim_drv->state = ITNIM_STATE_TIMEOUT;
}
/*
* BFA notification to FCS/driver for second level error recovery.
*
* Atleast one I/O request has timedout and target is unresponsive to
* repeated abort requests. Second level error recovery should be initiated
* by starting implicit logout and recovery procedures.
*/
void
bfa_cb_itnim_sler(void *cb_arg)
{
struct bfa_fcs_itnim_s *itnim = (struct bfa_fcs_itnim_s *) cb_arg;
itnim->stats.sler++;
bfa_trc(itnim->fcs, itnim->rport->pwwn);
bfa_sm_send_event(itnim->rport, RPSM_EVENT_LOGO_IMP);
}
struct bfa_fcs_itnim_s *
bfa_fcs_itnim_lookup(struct bfa_fcs_lport_s *port, wwn_t rpwwn)
{
struct bfa_fcs_rport_s *rport;
rport = bfa_fcs_rport_lookup(port, rpwwn);
if (!rport)
return NULL;
WARN_ON(rport->itnim == NULL);
return rport->itnim;
}
bfa_status_t
bfa_fcs_itnim_attr_get(struct bfa_fcs_lport_s *port, wwn_t rpwwn,
struct bfa_itnim_attr_s *attr)
{
struct bfa_fcs_itnim_s *itnim = NULL;
itnim = bfa_fcs_itnim_lookup(port, rpwwn);
if (itnim == NULL)
return BFA_STATUS_NO_FCPIM_NEXUS;
attr->state = bfa_sm_to_state(itnim_sm_table, itnim->sm);
attr->retry = itnim->seq_rec;
attr->rec_support = itnim->rec_support;
attr->conf_comp = itnim->conf_comp;
attr->task_retry_id = itnim->task_retry_id;
return BFA_STATUS_OK;
}
bfa_status_t
bfa_fcs_itnim_stats_get(struct bfa_fcs_lport_s *port, wwn_t rpwwn,
struct bfa_itnim_stats_s *stats)
{
struct bfa_fcs_itnim_s *itnim = NULL;
WARN_ON(port == NULL);
itnim = bfa_fcs_itnim_lookup(port, rpwwn);
if (itnim == NULL)
return BFA_STATUS_NO_FCPIM_NEXUS;
memcpy(stats, &itnim->stats, sizeof(struct bfa_itnim_stats_s));
return BFA_STATUS_OK;
}
bfa_status_t
bfa_fcs_itnim_stats_clear(struct bfa_fcs_lport_s *port, wwn_t rpwwn)
{
struct bfa_fcs_itnim_s *itnim = NULL;
WARN_ON(port == NULL);
itnim = bfa_fcs_itnim_lookup(port, rpwwn);
if (itnim == NULL)
return BFA_STATUS_NO_FCPIM_NEXUS;
memset(&itnim->stats, 0, sizeof(struct bfa_itnim_stats_s));
return BFA_STATUS_OK;
}
void
bfa_fcs_fcpim_uf_recv(struct bfa_fcs_itnim_s *itnim,
struct fchs_s *fchs, u16 len)
{
struct fc_els_cmd_s *els_cmd;
bfa_trc(itnim->fcs, fchs->type);
if (fchs->type != FC_TYPE_ELS)
return;
els_cmd = (struct fc_els_cmd_s *) (fchs + 1);
bfa_trc(itnim->fcs, els_cmd->els_code);
switch (els_cmd->els_code) {
case FC_ELS_PRLO:
bfa_fcs_rport_prlo(itnim->rport, fchs->ox_id);
break;
default:
WARN_ON(1);
}
}
| gpl-2.0 |
eckucukoglu/sober-kernel | drivers/mtd/maps/pcmciamtd.c | 7914 | 20116 | /*
* pcmciamtd.c - MTD driver for PCMCIA flash memory cards
*
* Author: Simon Evans <spse@secret.org.uk>
*
* Copyright (C) 2002 Simon Evans
*
* Licence: GPL
*
*/
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/timer.h>
#include <linux/init.h>
#include <asm/io.h>
#include <pcmcia/cistpl.h>
#include <pcmcia/ds.h>
#include <linux/mtd/map.h>
#include <linux/mtd/mtd.h>
#define info(format, arg...) printk(KERN_INFO "pcmciamtd: " format "\n" , ## arg)
#define DRIVER_DESC "PCMCIA Flash memory card driver"
/* Size of the PCMCIA address space: 26 bits = 64 MB */
#define MAX_PCMCIA_ADDR 0x4000000
struct pcmciamtd_dev {
struct pcmcia_device *p_dev;
caddr_t win_base; /* ioremapped address of PCMCIA window */
unsigned int win_size; /* size of window */
unsigned int offset; /* offset into card the window currently points at */
struct map_info pcmcia_map;
struct mtd_info *mtd_info;
int vpp;
char mtd_name[sizeof(struct cistpl_vers_1_t)];
};
/* Module parameters */
/* 2 = do 16-bit transfers, 1 = do 8-bit transfers */
static int bankwidth = 2;
/* Speed of memory accesses, in ns */
static int mem_speed;
/* Force the size of an SRAM card */
static int force_size;
/* Force Vpp */
static int vpp;
/* Set Vpp */
static int setvpp;
/* Force card to be treated as FLASH, ROM or RAM */
static int mem_type;
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Simon Evans <spse@secret.org.uk>");
MODULE_DESCRIPTION(DRIVER_DESC);
module_param(bankwidth, int, 0);
MODULE_PARM_DESC(bankwidth, "Set bankwidth (1=8 bit, 2=16 bit, default=2)");
module_param(mem_speed, int, 0);
MODULE_PARM_DESC(mem_speed, "Set memory access speed in ns");
module_param(force_size, int, 0);
MODULE_PARM_DESC(force_size, "Force size of card in MiB (1-64)");
module_param(setvpp, int, 0);
MODULE_PARM_DESC(setvpp, "Set Vpp (0=Never, 1=On writes, 2=Always on, default=0)");
module_param(vpp, int, 0);
MODULE_PARM_DESC(vpp, "Vpp value in 1/10ths eg 33=3.3V 120=12V (Dangerous)");
module_param(mem_type, int, 0);
MODULE_PARM_DESC(mem_type, "Set Memory type (0=Flash, 1=RAM, 2=ROM, default=0)");
/* read/write{8,16} copy_{from,to} routines with window remapping
* to access whole card
*/
static caddr_t remap_window(struct map_info *map, unsigned long to)
{
struct pcmciamtd_dev *dev = (struct pcmciamtd_dev *)map->map_priv_1;
struct resource *win = (struct resource *) map->map_priv_2;
unsigned int offset;
int ret;
if (!pcmcia_dev_present(dev->p_dev)) {
pr_debug("device removed\n");
return 0;
}
offset = to & ~(dev->win_size-1);
if (offset != dev->offset) {
pr_debug("Remapping window from 0x%8.8x to 0x%8.8x\n",
dev->offset, offset);
ret = pcmcia_map_mem_page(dev->p_dev, win, offset);
if (ret != 0)
return NULL;
dev->offset = offset;
}
return dev->win_base + (to & (dev->win_size-1));
}
static map_word pcmcia_read8_remap(struct map_info *map, unsigned long ofs)
{
caddr_t addr;
map_word d = {{0}};
addr = remap_window(map, ofs);
if(!addr)
return d;
d.x[0] = readb(addr);
pr_debug("ofs = 0x%08lx (%p) data = 0x%02lx\n", ofs, addr, d.x[0]);
return d;
}
static map_word pcmcia_read16_remap(struct map_info *map, unsigned long ofs)
{
caddr_t addr;
map_word d = {{0}};
addr = remap_window(map, ofs);
if(!addr)
return d;
d.x[0] = readw(addr);
pr_debug("ofs = 0x%08lx (%p) data = 0x%04lx\n", ofs, addr, d.x[0]);
return d;
}
static void pcmcia_copy_from_remap(struct map_info *map, void *to, unsigned long from, ssize_t len)
{
struct pcmciamtd_dev *dev = (struct pcmciamtd_dev *)map->map_priv_1;
unsigned long win_size = dev->win_size;
pr_debug("to = %p from = %lu len = %zd\n", to, from, len);
while(len) {
int toread = win_size - (from & (win_size-1));
caddr_t addr;
if(toread > len)
toread = len;
addr = remap_window(map, from);
if(!addr)
return;
pr_debug("memcpy from %p to %p len = %d\n", addr, to, toread);
memcpy_fromio(to, addr, toread);
len -= toread;
to += toread;
from += toread;
}
}
static void pcmcia_write8_remap(struct map_info *map, map_word d, unsigned long adr)
{
caddr_t addr = remap_window(map, adr);
if(!addr)
return;
pr_debug("adr = 0x%08lx (%p) data = 0x%02lx\n", adr, addr, d.x[0]);
writeb(d.x[0], addr);
}
static void pcmcia_write16_remap(struct map_info *map, map_word d, unsigned long adr)
{
caddr_t addr = remap_window(map, adr);
if(!addr)
return;
pr_debug("adr = 0x%08lx (%p) data = 0x%04lx\n", adr, addr, d.x[0]);
writew(d.x[0], addr);
}
static void pcmcia_copy_to_remap(struct map_info *map, unsigned long to, const void *from, ssize_t len)
{
struct pcmciamtd_dev *dev = (struct pcmciamtd_dev *)map->map_priv_1;
unsigned long win_size = dev->win_size;
pr_debug("to = %lu from = %p len = %zd\n", to, from, len);
while(len) {
int towrite = win_size - (to & (win_size-1));
caddr_t addr;
if(towrite > len)
towrite = len;
addr = remap_window(map, to);
if(!addr)
return;
pr_debug("memcpy from %p to %p len = %d\n", from, addr, towrite);
memcpy_toio(addr, from, towrite);
len -= towrite;
to += towrite;
from += towrite;
}
}
/* read/write{8,16} copy_{from,to} routines with direct access */
#define DEV_REMOVED(x) (!(pcmcia_dev_present(((struct pcmciamtd_dev *)map->map_priv_1)->p_dev)))
static map_word pcmcia_read8(struct map_info *map, unsigned long ofs)
{
caddr_t win_base = (caddr_t)map->map_priv_2;
map_word d = {{0}};
if(DEV_REMOVED(map))
return d;
d.x[0] = readb(win_base + ofs);
pr_debug("ofs = 0x%08lx (%p) data = 0x%02lx\n",
ofs, win_base + ofs, d.x[0]);
return d;
}
static map_word pcmcia_read16(struct map_info *map, unsigned long ofs)
{
caddr_t win_base = (caddr_t)map->map_priv_2;
map_word d = {{0}};
if(DEV_REMOVED(map))
return d;
d.x[0] = readw(win_base + ofs);
pr_debug("ofs = 0x%08lx (%p) data = 0x%04lx\n",
ofs, win_base + ofs, d.x[0]);
return d;
}
static void pcmcia_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
{
caddr_t win_base = (caddr_t)map->map_priv_2;
if(DEV_REMOVED(map))
return;
pr_debug("to = %p from = %lu len = %zd\n", to, from, len);
memcpy_fromio(to, win_base + from, len);
}
static void pcmcia_write8(struct map_info *map, map_word d, unsigned long adr)
{
caddr_t win_base = (caddr_t)map->map_priv_2;
if(DEV_REMOVED(map))
return;
pr_debug("adr = 0x%08lx (%p) data = 0x%02lx\n",
adr, win_base + adr, d.x[0]);
writeb(d.x[0], win_base + adr);
}
static void pcmcia_write16(struct map_info *map, map_word d, unsigned long adr)
{
caddr_t win_base = (caddr_t)map->map_priv_2;
if(DEV_REMOVED(map))
return;
pr_debug("adr = 0x%08lx (%p) data = 0x%04lx\n",
adr, win_base + adr, d.x[0]);
writew(d.x[0], win_base + adr);
}
static void pcmcia_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
{
caddr_t win_base = (caddr_t)map->map_priv_2;
if(DEV_REMOVED(map))
return;
pr_debug("to = %lu from = %p len = %zd\n", to, from, len);
memcpy_toio(win_base + to, from, len);
}
static DEFINE_SPINLOCK(pcmcia_vpp_lock);
static int pcmcia_vpp_refcnt;
static void pcmciamtd_set_vpp(struct map_info *map, int on)
{
struct pcmciamtd_dev *dev = (struct pcmciamtd_dev *)map->map_priv_1;
struct pcmcia_device *link = dev->p_dev;
unsigned long flags;
pr_debug("dev = %p on = %d vpp = %d\n\n", dev, on, dev->vpp);
spin_lock_irqsave(&pcmcia_vpp_lock, flags);
if (on) {
if (++pcmcia_vpp_refcnt == 1) /* first nested 'on' */
pcmcia_fixup_vpp(link, dev->vpp);
} else {
if (--pcmcia_vpp_refcnt == 0) /* last nested 'off' */
pcmcia_fixup_vpp(link, 0);
}
spin_unlock_irqrestore(&pcmcia_vpp_lock, flags);
}
static void pcmciamtd_release(struct pcmcia_device *link)
{
struct pcmciamtd_dev *dev = link->priv;
pr_debug("link = 0x%p\n", link);
if (link->resource[2]->end) {
if(dev->win_base) {
iounmap(dev->win_base);
dev->win_base = NULL;
}
}
pcmcia_disable_device(link);
}
static int pcmciamtd_cistpl_format(struct pcmcia_device *p_dev,
tuple_t *tuple,
void *priv_data)
{
cisparse_t parse;
if (!pcmcia_parse_tuple(tuple, &parse)) {
cistpl_format_t *t = &parse.format;
(void)t; /* Shut up, gcc */
pr_debug("Format type: %u, Error Detection: %u, offset = %u, length =%u\n",
t->type, t->edc, t->offset, t->length);
}
return -ENOSPC;
}
static int pcmciamtd_cistpl_jedec(struct pcmcia_device *p_dev,
tuple_t *tuple,
void *priv_data)
{
cisparse_t parse;
int i;
if (!pcmcia_parse_tuple(tuple, &parse)) {
cistpl_jedec_t *t = &parse.jedec;
for (i = 0; i < t->nid; i++)
pr_debug("JEDEC: 0x%02x 0x%02x\n",
t->id[i].mfr, t->id[i].info);
}
return -ENOSPC;
}
static int pcmciamtd_cistpl_device(struct pcmcia_device *p_dev,
tuple_t *tuple,
void *priv_data)
{
struct pcmciamtd_dev *dev = priv_data;
cisparse_t parse;
cistpl_device_t *t = &parse.device;
int i;
if (pcmcia_parse_tuple(tuple, &parse))
return -EINVAL;
pr_debug("Common memory:\n");
dev->pcmcia_map.size = t->dev[0].size;
/* from here on: DEBUG only */
for (i = 0; i < t->ndev; i++) {
pr_debug("Region %d, type = %u\n", i, t->dev[i].type);
pr_debug("Region %d, wp = %u\n", i, t->dev[i].wp);
pr_debug("Region %d, speed = %u ns\n", i, t->dev[i].speed);
pr_debug("Region %d, size = %u bytes\n", i, t->dev[i].size);
}
return 0;
}
static int pcmciamtd_cistpl_geo(struct pcmcia_device *p_dev,
tuple_t *tuple,
void *priv_data)
{
struct pcmciamtd_dev *dev = priv_data;
cisparse_t parse;
cistpl_device_geo_t *t = &parse.device_geo;
int i;
if (pcmcia_parse_tuple(tuple, &parse))
return -EINVAL;
dev->pcmcia_map.bankwidth = t->geo[0].buswidth;
/* from here on: DEBUG only */
for (i = 0; i < t->ngeo; i++) {
pr_debug("region: %d bankwidth = %u\n", i, t->geo[i].buswidth);
pr_debug("region: %d erase_block = %u\n", i, t->geo[i].erase_block);
pr_debug("region: %d read_block = %u\n", i, t->geo[i].read_block);
pr_debug("region: %d write_block = %u\n", i, t->geo[i].write_block);
pr_debug("region: %d partition = %u\n", i, t->geo[i].partition);
pr_debug("region: %d interleave = %u\n", i, t->geo[i].interleave);
}
return 0;
}
static void card_settings(struct pcmciamtd_dev *dev, struct pcmcia_device *p_dev, int *new_name)
{
int i;
if (p_dev->prod_id[0]) {
dev->mtd_name[0] = '\0';
for (i = 0; i < 4; i++) {
if (i)
strcat(dev->mtd_name, " ");
if (p_dev->prod_id[i])
strcat(dev->mtd_name, p_dev->prod_id[i]);
}
pr_debug("Found name: %s\n", dev->mtd_name);
}
pcmcia_loop_tuple(p_dev, CISTPL_FORMAT, pcmciamtd_cistpl_format, NULL);
pcmcia_loop_tuple(p_dev, CISTPL_JEDEC_C, pcmciamtd_cistpl_jedec, NULL);
pcmcia_loop_tuple(p_dev, CISTPL_DEVICE, pcmciamtd_cistpl_device, dev);
pcmcia_loop_tuple(p_dev, CISTPL_DEVICE_GEO, pcmciamtd_cistpl_geo, dev);
if(!dev->pcmcia_map.size)
dev->pcmcia_map.size = MAX_PCMCIA_ADDR;
if(!dev->pcmcia_map.bankwidth)
dev->pcmcia_map.bankwidth = 2;
if(force_size) {
dev->pcmcia_map.size = force_size << 20;
pr_debug("size forced to %dM\n", force_size);
}
if(bankwidth) {
dev->pcmcia_map.bankwidth = bankwidth;
pr_debug("bankwidth forced to %d\n", bankwidth);
}
dev->pcmcia_map.name = dev->mtd_name;
if(!dev->mtd_name[0]) {
strcpy(dev->mtd_name, "PCMCIA Memory card");
*new_name = 1;
}
pr_debug("Device: Size: %lu Width:%d Name: %s\n",
dev->pcmcia_map.size,
dev->pcmcia_map.bankwidth << 3, dev->mtd_name);
}
static int pcmciamtd_config(struct pcmcia_device *link)
{
struct pcmciamtd_dev *dev = link->priv;
struct mtd_info *mtd = NULL;
int ret;
int i, j = 0;
static char *probes[] = { "jedec_probe", "cfi_probe" };
int new_name = 0;
pr_debug("link=0x%p\n", link);
card_settings(dev, link, &new_name);
dev->pcmcia_map.phys = NO_XIP;
dev->pcmcia_map.copy_from = pcmcia_copy_from_remap;
dev->pcmcia_map.copy_to = pcmcia_copy_to_remap;
if (dev->pcmcia_map.bankwidth == 1) {
dev->pcmcia_map.read = pcmcia_read8_remap;
dev->pcmcia_map.write = pcmcia_write8_remap;
} else {
dev->pcmcia_map.read = pcmcia_read16_remap;
dev->pcmcia_map.write = pcmcia_write16_remap;
}
if(setvpp == 1)
dev->pcmcia_map.set_vpp = pcmciamtd_set_vpp;
/* Request a memory window for PCMCIA. Some architeures can map windows
* up to the maximum that PCMCIA can support (64MiB) - this is ideal and
* we aim for a window the size of the whole card - otherwise we try
* smaller windows until we succeed
*/
link->resource[2]->flags |= WIN_MEMORY_TYPE_CM | WIN_ENABLE;
link->resource[2]->flags |= (dev->pcmcia_map.bankwidth == 1) ?
WIN_DATA_WIDTH_8 : WIN_DATA_WIDTH_16;
link->resource[2]->start = 0;
link->resource[2]->end = (force_size) ? force_size << 20 :
MAX_PCMCIA_ADDR;
dev->win_size = 0;
do {
int ret;
pr_debug("requesting window with size = %luKiB memspeed = %d\n",
(unsigned long) resource_size(link->resource[2]) >> 10,
mem_speed);
ret = pcmcia_request_window(link, link->resource[2], mem_speed);
pr_debug("ret = %d dev->win_size = %d\n", ret, dev->win_size);
if(ret) {
j++;
link->resource[2]->start = 0;
link->resource[2]->end = (force_size) ?
force_size << 20 : MAX_PCMCIA_ADDR;
link->resource[2]->end >>= j;
} else {
pr_debug("Got window of size %luKiB\n", (unsigned long)
resource_size(link->resource[2]) >> 10);
dev->win_size = resource_size(link->resource[2]);
break;
}
} while (link->resource[2]->end >= 0x1000);
pr_debug("dev->win_size = %d\n", dev->win_size);
if(!dev->win_size) {
dev_err(&dev->p_dev->dev, "Cannot allocate memory window\n");
pcmciamtd_release(link);
return -ENODEV;
}
pr_debug("Allocated a window of %dKiB\n", dev->win_size >> 10);
/* Get write protect status */
dev->win_base = ioremap(link->resource[2]->start,
resource_size(link->resource[2]));
if(!dev->win_base) {
dev_err(&dev->p_dev->dev, "ioremap(%pR) failed\n",
link->resource[2]);
pcmciamtd_release(link);
return -ENODEV;
}
pr_debug("mapped window dev = %p @ %pR, base = %p\n",
dev, link->resource[2], dev->win_base);
dev->offset = 0;
dev->pcmcia_map.map_priv_1 = (unsigned long)dev;
dev->pcmcia_map.map_priv_2 = (unsigned long)link->resource[2];
dev->vpp = (vpp) ? vpp : link->socket->socket.Vpp;
if(setvpp == 2) {
link->vpp = dev->vpp;
} else {
link->vpp = 0;
}
link->config_index = 0;
pr_debug("Setting Configuration\n");
ret = pcmcia_enable_device(link);
if (ret != 0) {
if (dev->win_base) {
iounmap(dev->win_base);
dev->win_base = NULL;
}
return -ENODEV;
}
if(mem_type == 1) {
mtd = do_map_probe("map_ram", &dev->pcmcia_map);
} else if(mem_type == 2) {
mtd = do_map_probe("map_rom", &dev->pcmcia_map);
} else {
for(i = 0; i < ARRAY_SIZE(probes); i++) {
pr_debug("Trying %s\n", probes[i]);
mtd = do_map_probe(probes[i], &dev->pcmcia_map);
if(mtd)
break;
pr_debug("FAILED: %s\n", probes[i]);
}
}
if(!mtd) {
pr_debug("Can not find an MTD\n");
pcmciamtd_release(link);
return -ENODEV;
}
dev->mtd_info = mtd;
mtd->owner = THIS_MODULE;
if(new_name) {
int size = 0;
char unit = ' ';
/* Since we are using a default name, make it better by adding
* in the size
*/
if(mtd->size < 1048576) { /* <1MiB in size, show size in KiB */
size = mtd->size >> 10;
unit = 'K';
} else {
size = mtd->size >> 20;
unit = 'M';
}
snprintf(dev->mtd_name, sizeof(dev->mtd_name), "%d%ciB %s", size, unit, "PCMCIA Memory card");
}
/* If the memory found is fits completely into the mapped PCMCIA window,
use the faster non-remapping read/write functions */
if(mtd->size <= dev->win_size) {
pr_debug("Using non remapping memory functions\n");
dev->pcmcia_map.map_priv_2 = (unsigned long)dev->win_base;
if (dev->pcmcia_map.bankwidth == 1) {
dev->pcmcia_map.read = pcmcia_read8;
dev->pcmcia_map.write = pcmcia_write8;
} else {
dev->pcmcia_map.read = pcmcia_read16;
dev->pcmcia_map.write = pcmcia_write16;
}
dev->pcmcia_map.copy_from = pcmcia_copy_from;
dev->pcmcia_map.copy_to = pcmcia_copy_to;
}
if (mtd_device_register(mtd, NULL, 0)) {
map_destroy(mtd);
dev->mtd_info = NULL;
dev_err(&dev->p_dev->dev,
"Could not register the MTD device\n");
pcmciamtd_release(link);
return -ENODEV;
}
dev_info(&dev->p_dev->dev, "mtd%d: %s\n", mtd->index, mtd->name);
return 0;
}
static int pcmciamtd_suspend(struct pcmcia_device *dev)
{
pr_debug("EVENT_PM_RESUME\n");
/* get_lock(link); */
return 0;
}
static int pcmciamtd_resume(struct pcmcia_device *dev)
{
pr_debug("EVENT_PM_SUSPEND\n");
/* free_lock(link); */
return 0;
}
static void pcmciamtd_detach(struct pcmcia_device *link)
{
struct pcmciamtd_dev *dev = link->priv;
pr_debug("link=0x%p\n", link);
if(dev->mtd_info) {
mtd_device_unregister(dev->mtd_info);
dev_info(&dev->p_dev->dev, "mtd%d: Removing\n",
dev->mtd_info->index);
map_destroy(dev->mtd_info);
}
pcmciamtd_release(link);
}
static int pcmciamtd_probe(struct pcmcia_device *link)
{
struct pcmciamtd_dev *dev;
/* Create new memory card device */
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (!dev) return -ENOMEM;
pr_debug("dev=0x%p\n", dev);
dev->p_dev = link;
link->priv = dev;
return pcmciamtd_config(link);
}
static const struct pcmcia_device_id pcmciamtd_ids[] = {
PCMCIA_DEVICE_FUNC_ID(1),
PCMCIA_DEVICE_PROD_ID123("IO DATA", "PCS-2M", "2MB SRAM", 0x547e66dc, 0x1fed36cd, 0x36eadd21),
PCMCIA_DEVICE_PROD_ID12("IBM", "2MB SRAM", 0xb569a6e5, 0x36eadd21),
PCMCIA_DEVICE_PROD_ID12("IBM", "4MB FLASH", 0xb569a6e5, 0x8bc54d2a),
PCMCIA_DEVICE_PROD_ID12("IBM", "8MB FLASH", 0xb569a6e5, 0x6df1be3e),
PCMCIA_DEVICE_PROD_ID12("Intel", "S2E20SW", 0x816cc815, 0xd14c9dcf),
PCMCIA_DEVICE_PROD_ID12("Intel", "S2E8 SW", 0x816cc815, 0xa2d7dedb),
PCMCIA_DEVICE_PROD_ID12("intel", "SERIES2-02 ", 0x40ade711, 0x145cea5c),
PCMCIA_DEVICE_PROD_ID12("intel", "SERIES2-04 ", 0x40ade711, 0x42064dda),
PCMCIA_DEVICE_PROD_ID12("intel", "SERIES2-20 ", 0x40ade711, 0x25ee5cb0),
PCMCIA_DEVICE_PROD_ID12("intel", "VALUE SERIES 100 ", 0x40ade711, 0xdf8506d8),
PCMCIA_DEVICE_PROD_ID12("KINGMAX TECHNOLOGY INC.", "SRAM 256K Bytes", 0x54d0c69c, 0xad12c29c),
PCMCIA_DEVICE_PROD_ID12("Maxtor", "MAXFL MobileMax Flash Memory Card", 0xb68968c8, 0x2dfb47b0),
PCMCIA_DEVICE_PROD_ID123("M-Systems", "M-SYS Flash Memory Card", "(c) M-Systems", 0x7ed2ad87, 0x675dc3fb, 0x7aef3965),
PCMCIA_DEVICE_PROD_ID12("PRETEC", " 2MB SRAM CARD", 0xebf91155, 0x805360ca),
PCMCIA_DEVICE_PROD_ID12("SEIKO EPSON", "WWB101EN20", 0xf9876baf, 0xad0b207b),
PCMCIA_DEVICE_PROD_ID12("SEIKO EPSON", "WWB513EN20", 0xf9876baf, 0xe8d884ad),
PCMCIA_DEVICE_PROD_ID12("SMART Modular Technologies", " 4MB FLASH Card", 0x96fd8277, 0x737a5b05),
PCMCIA_DEVICE_PROD_ID12("Starfish, Inc.", "REX-3000", 0x05ddca47, 0xe7d67bca),
PCMCIA_DEVICE_PROD_ID12("Starfish, Inc.", "REX-4100", 0x05ddca47, 0x7bc32944),
/* the following was commented out in pcmcia-cs-3.2.7 */
/* PCMCIA_DEVICE_PROD_ID12("RATOC Systems,Inc.", "SmartMedia ADAPTER PC Card", 0xf4a2fefe, 0x5885b2ae), */
#ifdef CONFIG_MTD_PCMCIA_ANONYMOUS
{ .match_flags = PCMCIA_DEV_ID_MATCH_ANONYMOUS, },
#endif
PCMCIA_DEVICE_NULL
};
MODULE_DEVICE_TABLE(pcmcia, pcmciamtd_ids);
static struct pcmcia_driver pcmciamtd_driver = {
.name = "pcmciamtd",
.probe = pcmciamtd_probe,
.remove = pcmciamtd_detach,
.owner = THIS_MODULE,
.id_table = pcmciamtd_ids,
.suspend = pcmciamtd_suspend,
.resume = pcmciamtd_resume,
};
static int __init init_pcmciamtd(void)
{
if(bankwidth && bankwidth != 1 && bankwidth != 2) {
info("bad bankwidth (%d), using default", bankwidth);
bankwidth = 2;
}
if(force_size && (force_size < 1 || force_size > 64)) {
info("bad force_size (%d), using default", force_size);
force_size = 0;
}
if(mem_type && mem_type != 1 && mem_type != 2) {
info("bad mem_type (%d), using default", mem_type);
mem_type = 0;
}
return pcmcia_register_driver(&pcmciamtd_driver);
}
static void __exit exit_pcmciamtd(void)
{
pr_debug(DRIVER_DESC " unloading");
pcmcia_unregister_driver(&pcmciamtd_driver);
}
module_init(init_pcmciamtd);
module_exit(exit_pcmciamtd);
| gpl-2.0 |
cristianhristea/linux_kernel | arch/sh/kernel/cpu/sh2a/opcode_helper.c | 9194 | 1548 | /*
* arch/sh/kernel/cpu/sh2a/opcode_helper.c
*
* Helper for the SH-2A 32-bit opcodes.
*
* Copyright (C) 2007 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/kernel.h>
/*
* Instructions on SH are generally fixed at 16-bits, however, SH-2A
* introduces some 32-bit instructions. Since there are no real
* constraints on their use (and they can be mixed and matched), we need
* to check the instruction encoding to work out if it's a true 32-bit
* instruction or not.
*
* Presently, 32-bit opcodes have only slight variations in what the
* actual encoding looks like in the first-half of the instruction, which
* makes it fairly straightforward to differentiate from the 16-bit ones.
*
* First 16-bits of encoding Used by
*
* 0011nnnnmmmm0001 mov.b, mov.w, mov.l, fmov.d,
* fmov.s, movu.b, movu.w
*
* 0011nnnn0iii1001 bclr.b, bld.b, bset.b, bst.b, band.b,
* bandnot.b, bldnot.b, bor.b, bornot.b,
* bxor.b
*
* 0000nnnniiii0000 movi20
* 0000nnnniiii0001 movi20s
*/
unsigned int instruction_size(unsigned int insn)
{
/* Look for the common cases */
switch ((insn & 0xf00f)) {
case 0x0000: /* movi20 */
case 0x0001: /* movi20s */
case 0x3001: /* 32-bit mov/fmov/movu variants */
return 4;
}
/* And the special cases.. */
switch ((insn & 0xf08f)) {
case 0x3009: /* 32-bit b*.b bit operations */
return 4;
}
return 2;
}
| gpl-2.0 |
suncycheng/linux | arch/sh/kernel/cpu/sh2a/opcode_helper.c | 9194 | 1548 | /*
* arch/sh/kernel/cpu/sh2a/opcode_helper.c
*
* Helper for the SH-2A 32-bit opcodes.
*
* Copyright (C) 2007 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/kernel.h>
/*
* Instructions on SH are generally fixed at 16-bits, however, SH-2A
* introduces some 32-bit instructions. Since there are no real
* constraints on their use (and they can be mixed and matched), we need
* to check the instruction encoding to work out if it's a true 32-bit
* instruction or not.
*
* Presently, 32-bit opcodes have only slight variations in what the
* actual encoding looks like in the first-half of the instruction, which
* makes it fairly straightforward to differentiate from the 16-bit ones.
*
* First 16-bits of encoding Used by
*
* 0011nnnnmmmm0001 mov.b, mov.w, mov.l, fmov.d,
* fmov.s, movu.b, movu.w
*
* 0011nnnn0iii1001 bclr.b, bld.b, bset.b, bst.b, band.b,
* bandnot.b, bldnot.b, bor.b, bornot.b,
* bxor.b
*
* 0000nnnniiii0000 movi20
* 0000nnnniiii0001 movi20s
*/
unsigned int instruction_size(unsigned int insn)
{
/* Look for the common cases */
switch ((insn & 0xf00f)) {
case 0x0000: /* movi20 */
case 0x0001: /* movi20s */
case 0x3001: /* 32-bit mov/fmov/movu variants */
return 4;
}
/* And the special cases.. */
switch ((insn & 0xf08f)) {
case 0x3009: /* 32-bit b*.b bit operations */
return 4;
}
return 2;
}
| gpl-2.0 |
Validus-Kernel/android_kernel_motorola_msm8226 | drivers/uwb/i1480/dfu/mac.c | 14058 | 14012 | /*
* Intel Wireless UWB Link 1480
* MAC Firmware upload implementation
*
* Copyright (C) 2005-2006 Intel Corporation
* Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License version
* 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA.
*
*
* Implementation of the code for parsing the firmware file (extract
* the headers and binary code chunks) in the fw_*() functions. The
* code to upload pre and mac firmwares is the same, so it uses a
* common entry point in __mac_fw_upload(), which uses the i1480
* function pointers to push the firmware to the device.
*/
#include <linux/delay.h>
#include <linux/firmware.h>
#include <linux/slab.h>
#include <linux/uwb.h>
#include "i1480-dfu.h"
/*
* Descriptor for a continuous segment of MAC fw data
*/
struct fw_hdr {
unsigned long address;
size_t length;
const u32 *bin;
struct fw_hdr *next;
};
/* Free a chain of firmware headers */
static
void fw_hdrs_free(struct fw_hdr *hdr)
{
struct fw_hdr *next;
while (hdr) {
next = hdr->next;
kfree(hdr);
hdr = next;
}
}
/* Fill a firmware header descriptor from a memory buffer */
static
int fw_hdr_load(struct i1480 *i1480, struct fw_hdr *hdr, unsigned hdr_cnt,
const char *_data, const u32 *data_itr, const u32 *data_top)
{
size_t hdr_offset = (const char *) data_itr - _data;
size_t remaining_size = (void *) data_top - (void *) data_itr;
if (data_itr + 2 > data_top) {
dev_err(i1480->dev, "fw hdr #%u/%zu: EOF reached in header at "
"offset %zu, limit %zu\n",
hdr_cnt, hdr_offset,
(const char *) data_itr + 2 - _data,
(const char *) data_top - _data);
return -EINVAL;
}
hdr->next = NULL;
hdr->address = le32_to_cpu(*data_itr++);
hdr->length = le32_to_cpu(*data_itr++);
hdr->bin = data_itr;
if (hdr->length > remaining_size) {
dev_err(i1480->dev, "fw hdr #%u/%zu: EOF reached in data; "
"chunk too long (%zu bytes), only %zu left\n",
hdr_cnt, hdr_offset, hdr->length, remaining_size);
return -EINVAL;
}
return 0;
}
/**
* Get a buffer where the firmware is supposed to be and create a
* chain of headers linking them together.
*
* @phdr: where to place the pointer to the first header (headers link
* to the next via the @hdr->next ptr); need to free the whole
* chain when done.
*
* @_data: Pointer to the data buffer.
*
* @_data_size: Size of the data buffer (bytes); data size has to be a
* multiple of 4. Function will fail if not.
*
* Goes over the whole binary blob; reads the first chunk and creates
* a fw hdr from it (which points to where the data is in @_data and
* the length of the chunk); then goes on to the next chunk until
* done. Each header is linked to the next.
*/
static
int fw_hdrs_load(struct i1480 *i1480, struct fw_hdr **phdr,
const char *_data, size_t data_size)
{
int result;
unsigned hdr_cnt = 0;
u32 *data = (u32 *) _data, *data_itr, *data_top;
struct fw_hdr *hdr, **prev_hdr = phdr;
result = -EINVAL;
/* Check size is ok and pointer is aligned */
if (data_size % sizeof(u32) != 0)
goto error;
if ((unsigned long) _data % sizeof(u16) != 0)
goto error;
*phdr = NULL;
data_itr = data;
data_top = (u32 *) (_data + data_size);
while (data_itr < data_top) {
result = -ENOMEM;
hdr = kmalloc(sizeof(*hdr), GFP_KERNEL);
if (hdr == NULL) {
dev_err(i1480->dev, "Cannot allocate fw header "
"for chunk #%u\n", hdr_cnt);
goto error_alloc;
}
result = fw_hdr_load(i1480, hdr, hdr_cnt,
_data, data_itr, data_top);
if (result < 0)
goto error_load;
data_itr += 2 + hdr->length;
*prev_hdr = hdr;
prev_hdr = &hdr->next;
hdr_cnt++;
};
*prev_hdr = NULL;
return 0;
error_load:
kfree(hdr);
error_alloc:
fw_hdrs_free(*phdr);
error:
return result;
}
/**
* Compares a chunk of fw with one in the devices's memory
*
* @i1480: Device instance
* @hdr: Pointer to the firmware chunk
* @returns: 0 if equal, < 0 errno on error. If > 0, it is the offset
* where the difference was found (plus one).
*
* Kind of dirty and simplistic, but does the trick in both the PCI
* and USB version. We do a quick[er] memcmp(), and if it fails, we do
* a byte-by-byte to find the offset.
*/
static
ssize_t i1480_fw_cmp(struct i1480 *i1480, struct fw_hdr *hdr)
{
ssize_t result = 0;
u32 src_itr = 0, cnt;
size_t size = hdr->length*sizeof(hdr->bin[0]);
size_t chunk_size;
u8 *bin = (u8 *) hdr->bin;
while (size > 0) {
chunk_size = size < i1480->buf_size ? size : i1480->buf_size;
result = i1480->read(i1480, hdr->address + src_itr, chunk_size);
if (result < 0) {
dev_err(i1480->dev, "error reading for verification: "
"%zd\n", result);
goto error;
}
if (memcmp(i1480->cmd_buf, bin + src_itr, result)) {
u8 *buf = i1480->cmd_buf;
for (cnt = 0; cnt < result; cnt++)
if (bin[src_itr + cnt] != buf[cnt]) {
dev_err(i1480->dev, "byte failed at "
"src_itr %u cnt %u [0x%02x "
"vs 0x%02x]\n", src_itr, cnt,
bin[src_itr + cnt], buf[cnt]);
result = src_itr + cnt + 1;
goto cmp_failed;
}
}
src_itr += result;
size -= result;
}
result = 0;
error:
cmp_failed:
return result;
}
/**
* Writes firmware headers to the device.
*
* @prd: PRD instance
* @hdr: Processed firmware
* @returns: 0 if ok, < 0 errno on error.
*/
static
int mac_fw_hdrs_push(struct i1480 *i1480, struct fw_hdr *hdr,
const char *fw_name, const char *fw_tag)
{
struct device *dev = i1480->dev;
ssize_t result = 0;
struct fw_hdr *hdr_itr;
int verif_retry_count;
/* Now, header by header, push them to the hw */
for (hdr_itr = hdr; hdr_itr != NULL; hdr_itr = hdr_itr->next) {
verif_retry_count = 0;
retry:
dev_dbg(dev, "fw chunk (%zu @ 0x%08lx)\n",
hdr_itr->length * sizeof(hdr_itr->bin[0]),
hdr_itr->address);
result = i1480->write(i1480, hdr_itr->address, hdr_itr->bin,
hdr_itr->length*sizeof(hdr_itr->bin[0]));
if (result < 0) {
dev_err(dev, "%s fw '%s': write failed (%zuB @ 0x%lx):"
" %zd\n", fw_tag, fw_name,
hdr_itr->length * sizeof(hdr_itr->bin[0]),
hdr_itr->address, result);
break;
}
result = i1480_fw_cmp(i1480, hdr_itr);
if (result < 0) {
dev_err(dev, "%s fw '%s': verification read "
"failed (%zuB @ 0x%lx): %zd\n",
fw_tag, fw_name,
hdr_itr->length * sizeof(hdr_itr->bin[0]),
hdr_itr->address, result);
break;
}
if (result > 0) { /* Offset where it failed + 1 */
result--;
dev_err(dev, "%s fw '%s': WARNING: verification "
"failed at 0x%lx: retrying\n",
fw_tag, fw_name, hdr_itr->address + result);
if (++verif_retry_count < 3)
goto retry; /* write this block again! */
dev_err(dev, "%s fw '%s': verification failed at 0x%lx: "
"tried %d times\n", fw_tag, fw_name,
hdr_itr->address + result, verif_retry_count);
result = -EINVAL;
break;
}
}
return result;
}
/** Puts the device in firmware upload mode.*/
static
int mac_fw_upload_enable(struct i1480 *i1480)
{
int result;
u32 reg = 0x800000c0;
u32 *buffer = (u32 *)i1480->cmd_buf;
if (i1480->hw_rev > 1)
reg = 0x8000d0d4;
result = i1480->read(i1480, reg, sizeof(u32));
if (result < 0)
goto error_cmd;
*buffer &= ~i1480_FW_UPLOAD_MODE_MASK;
result = i1480->write(i1480, reg, buffer, sizeof(u32));
if (result < 0)
goto error_cmd;
return 0;
error_cmd:
dev_err(i1480->dev, "can't enable fw upload mode: %d\n", result);
return result;
}
/** Gets the device out of firmware upload mode. */
static
int mac_fw_upload_disable(struct i1480 *i1480)
{
int result;
u32 reg = 0x800000c0;
u32 *buffer = (u32 *)i1480->cmd_buf;
if (i1480->hw_rev > 1)
reg = 0x8000d0d4;
result = i1480->read(i1480, reg, sizeof(u32));
if (result < 0)
goto error_cmd;
*buffer |= i1480_FW_UPLOAD_MODE_MASK;
result = i1480->write(i1480, reg, buffer, sizeof(u32));
if (result < 0)
goto error_cmd;
return 0;
error_cmd:
dev_err(i1480->dev, "can't disable fw upload mode: %d\n", result);
return result;
}
/**
* Generic function for uploading a MAC firmware.
*
* @i1480: Device instance
* @fw_name: Name of firmware file to upload.
* @fw_tag: Name of the firmware type (for messages)
* [eg: MAC, PRE]
* @do_wait: Wait for device to emit initialization done message (0
* for PRE fws, 1 for MAC fws).
* @returns: 0 if ok, < 0 errno on error.
*/
static
int __mac_fw_upload(struct i1480 *i1480, const char *fw_name,
const char *fw_tag)
{
int result;
const struct firmware *fw;
struct fw_hdr *fw_hdrs;
result = request_firmware(&fw, fw_name, i1480->dev);
if (result < 0) /* Up to caller to complain on -ENOENT */
goto out;
result = fw_hdrs_load(i1480, &fw_hdrs, fw->data, fw->size);
if (result < 0) {
dev_err(i1480->dev, "%s fw '%s': failed to parse firmware "
"file: %d\n", fw_tag, fw_name, result);
goto out_release;
}
result = mac_fw_upload_enable(i1480);
if (result < 0)
goto out_hdrs_release;
result = mac_fw_hdrs_push(i1480, fw_hdrs, fw_name, fw_tag);
mac_fw_upload_disable(i1480);
out_hdrs_release:
if (result >= 0)
dev_info(i1480->dev, "%s fw '%s': uploaded\n", fw_tag, fw_name);
else
dev_err(i1480->dev, "%s fw '%s': failed to upload (%d), "
"power cycle device\n", fw_tag, fw_name, result);
fw_hdrs_free(fw_hdrs);
out_release:
release_firmware(fw);
out:
return result;
}
/**
* Upload a pre-PHY firmware
*
*/
int i1480_pre_fw_upload(struct i1480 *i1480)
{
int result;
result = __mac_fw_upload(i1480, i1480->pre_fw_name, "PRE");
if (result == 0)
msleep(400);
return result;
}
/**
* Reset a the MAC and PHY
*
* @i1480: Device's instance
* @returns: 0 if ok, < 0 errno code on error
*
* We put the command on kmalloc'ed memory as some arches cannot do
* USB from the stack. The reply event is copied from an stage buffer,
* so it can be in the stack. See WUSB1.0[8.6.2.4] for more details.
*
* We issue the reset to make sure the UWB controller reinits the PHY;
* this way we can now if the PHY init went ok.
*/
static
int i1480_cmd_reset(struct i1480 *i1480)
{
int result;
struct uwb_rccb *cmd = (void *) i1480->cmd_buf;
struct i1480_evt_reset {
struct uwb_rceb rceb;
u8 bResultCode;
} __attribute__((packed)) *reply = (void *) i1480->evt_buf;
result = -ENOMEM;
cmd->bCommandType = UWB_RC_CET_GENERAL;
cmd->wCommand = cpu_to_le16(UWB_RC_CMD_RESET);
reply->rceb.bEventType = UWB_RC_CET_GENERAL;
reply->rceb.wEvent = UWB_RC_CMD_RESET;
result = i1480_cmd(i1480, "RESET", sizeof(*cmd), sizeof(*reply));
if (result < 0)
goto out;
if (reply->bResultCode != UWB_RC_RES_SUCCESS) {
dev_err(i1480->dev, "RESET: command execution failed: %u\n",
reply->bResultCode);
result = -EIO;
}
out:
return result;
}
/* Wait for the MAC FW to start running */
static
int i1480_fw_is_running_q(struct i1480 *i1480)
{
int cnt = 0;
int result;
u32 *val = (u32 *) i1480->cmd_buf;
for (cnt = 0; cnt < 10; cnt++) {
msleep(100);
result = i1480->read(i1480, 0x80080000, 4);
if (result < 0) {
dev_err(i1480->dev, "Can't read 0x8008000: %d\n", result);
goto out;
}
if (*val == 0x55555555UL) /* fw running? cool */
goto out;
}
dev_err(i1480->dev, "Timed out waiting for fw to start\n");
result = -ETIMEDOUT;
out:
return result;
}
/**
* Upload MAC firmware, wait for it to start
*
* @i1480: Device instance
* @fw_name: Name of the file that contains the firmware
*
* This has to be called after the pre fw has been uploaded (if
* there is any).
*/
int i1480_mac_fw_upload(struct i1480 *i1480)
{
int result = 0, deprecated_name = 0;
struct i1480_rceb *rcebe = (void *) i1480->evt_buf;
result = __mac_fw_upload(i1480, i1480->mac_fw_name, "MAC");
if (result == -ENOENT) {
result = __mac_fw_upload(i1480, i1480->mac_fw_name_deprecate,
"MAC");
deprecated_name = 1;
}
if (result < 0)
return result;
if (deprecated_name == 1)
dev_warn(i1480->dev,
"WARNING: firmware file name %s is deprecated, "
"please rename to %s\n",
i1480->mac_fw_name_deprecate, i1480->mac_fw_name);
result = i1480_fw_is_running_q(i1480);
if (result < 0)
goto error_fw_not_running;
result = i1480->rc_setup ? i1480->rc_setup(i1480) : 0;
if (result < 0) {
dev_err(i1480->dev, "Cannot setup after MAC fw upload: %d\n",
result);
goto error_setup;
}
result = i1480->wait_init_done(i1480); /* wait init'on */
if (result < 0) {
dev_err(i1480->dev, "MAC fw '%s': Initialization timed out "
"(%d)\n", i1480->mac_fw_name, result);
goto error_init_timeout;
}
/* verify we got the right initialization done event */
if (i1480->evt_result != sizeof(*rcebe)) {
dev_err(i1480->dev, "MAC fw '%s': initialization event returns "
"wrong size (%zu bytes vs %zu needed)\n",
i1480->mac_fw_name, i1480->evt_result, sizeof(*rcebe));
goto error_size;
}
result = -EIO;
if (i1480_rceb_check(i1480, &rcebe->rceb, NULL, 0, i1480_CET_VS1,
i1480_EVT_RM_INIT_DONE) < 0) {
dev_err(i1480->dev, "wrong initialization event 0x%02x/%04x/%02x "
"received; expected 0x%02x/%04x/00\n",
rcebe->rceb.bEventType, le16_to_cpu(rcebe->rceb.wEvent),
rcebe->rceb.bEventContext, i1480_CET_VS1,
i1480_EVT_RM_INIT_DONE);
goto error_init_timeout;
}
result = i1480_cmd_reset(i1480);
if (result < 0)
dev_err(i1480->dev, "MAC fw '%s': MBOA reset failed (%d)\n",
i1480->mac_fw_name, result);
error_fw_not_running:
error_init_timeout:
error_size:
error_setup:
return result;
}
| gpl-2.0 |
srikantpatnaik/FOSSEE-netbook-kernel-source-old | drivers/net/macvtap.c | 491 | 28084 | #include <linux/etherdevice.h>
#include <linux/if_macvlan.h>
#include <linux/if_vlan.h>
#include <linux/interrupt.h>
#include <linux/nsproxy.h>
#include <linux/compat.h>
#include <linux/if_tun.h>
#include <linux/module.h>
#include <linux/skbuff.h>
#include <linux/cache.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/wait.h>
#include <linux/cdev.h>
#include <linux/idr.h>
#include <linux/fs.h>
#include <net/net_namespace.h>
#include <net/rtnetlink.h>
#include <net/sock.h>
#include <linux/virtio_net.h>
/*
* A macvtap queue is the central object of this driver, it connects
* an open character device to a macvlan interface. There can be
* multiple queues on one interface, which map back to queues
* implemented in hardware on the underlying device.
*
* macvtap_proto is used to allocate queues through the sock allocation
* mechanism.
*
* TODO: multiqueue support is currently not implemented, even though
* macvtap is basically prepared for that. We will need to add this
* here as well as in virtio-net and qemu to get line rate on 10gbit
* adapters from a guest.
*/
struct macvtap_queue {
struct sock sk;
struct socket sock;
struct socket_wq wq;
int vnet_hdr_sz;
struct macvlan_dev __rcu *vlan;
struct file *file;
unsigned int flags;
};
static struct proto macvtap_proto = {
.name = "macvtap",
.owner = THIS_MODULE,
.obj_size = sizeof (struct macvtap_queue),
};
/*
* Variables for dealing with macvtaps device numbers.
*/
static dev_t macvtap_major;
#define MACVTAP_NUM_DEVS (1U << MINORBITS)
static DEFINE_MUTEX(minor_lock);
static DEFINE_IDR(minor_idr);
#define GOODCOPY_LEN 128
static struct class *macvtap_class;
static struct cdev macvtap_cdev;
static const struct proto_ops macvtap_socket_ops;
/*
* RCU usage:
* The macvtap_queue and the macvlan_dev are loosely coupled, the
* pointers from one to the other can only be read while rcu_read_lock
* or macvtap_lock is held.
*
* Both the file and the macvlan_dev hold a reference on the macvtap_queue
* through sock_hold(&q->sk). When the macvlan_dev goes away first,
* q->vlan becomes inaccessible. When the files gets closed,
* macvtap_get_queue() fails.
*
* There may still be references to the struct sock inside of the
* queue from outbound SKBs, but these never reference back to the
* file or the dev. The data structure is freed through __sk_free
* when both our references and any pending SKBs are gone.
*/
static DEFINE_SPINLOCK(macvtap_lock);
/*
* get_slot: return a [unused/occupied] slot in vlan->taps[]:
* - if 'q' is NULL, return the first empty slot;
* - otherwise, return the slot this pointer occupies.
*/
static int get_slot(struct macvlan_dev *vlan, struct macvtap_queue *q)
{
int i;
for (i = 0; i < MAX_MACVTAP_QUEUES; i++) {
if (rcu_dereference(vlan->taps[i]) == q)
return i;
}
/* Should never happen */
BUG_ON(1);
}
static int macvtap_set_queue(struct net_device *dev, struct file *file,
struct macvtap_queue *q)
{
struct macvlan_dev *vlan = netdev_priv(dev);
int index;
int err = -EBUSY;
spin_lock(&macvtap_lock);
if (vlan->numvtaps == MAX_MACVTAP_QUEUES)
goto out;
err = 0;
index = get_slot(vlan, NULL);
rcu_assign_pointer(q->vlan, vlan);
rcu_assign_pointer(vlan->taps[index], q);
sock_hold(&q->sk);
q->file = file;
file->private_data = q;
vlan->numvtaps++;
out:
spin_unlock(&macvtap_lock);
return err;
}
/*
* The file owning the queue got closed, give up both
* the reference that the files holds as well as the
* one from the macvlan_dev if that still exists.
*
* Using the spinlock makes sure that we don't get
* to the queue again after destroying it.
*/
static void macvtap_put_queue(struct macvtap_queue *q)
{
struct macvlan_dev *vlan;
spin_lock(&macvtap_lock);
vlan = rcu_dereference_protected(q->vlan,
lockdep_is_held(&macvtap_lock));
if (vlan) {
int index = get_slot(vlan, q);
RCU_INIT_POINTER(vlan->taps[index], NULL);
RCU_INIT_POINTER(q->vlan, NULL);
sock_put(&q->sk);
--vlan->numvtaps;
}
spin_unlock(&macvtap_lock);
synchronize_rcu();
sock_put(&q->sk);
}
/*
* Select a queue based on the rxq of the device on which this packet
* arrived. If the incoming device is not mq, calculate a flow hash
* to select a queue. If all fails, find the first available queue.
* Cache vlan->numvtaps since it can become zero during the execution
* of this function.
*/
static struct macvtap_queue *macvtap_get_queue(struct net_device *dev,
struct sk_buff *skb)
{
struct macvlan_dev *vlan = netdev_priv(dev);
struct macvtap_queue *tap = NULL;
int numvtaps = vlan->numvtaps;
__u32 rxq;
if (!numvtaps)
goto out;
/* Check if we can use flow to select a queue */
rxq = skb_get_rxhash(skb);
if (rxq) {
tap = rcu_dereference(vlan->taps[rxq % numvtaps]);
if (tap)
goto out;
}
if (likely(skb_rx_queue_recorded(skb))) {
rxq = skb_get_rx_queue(skb);
while (unlikely(rxq >= numvtaps))
rxq -= numvtaps;
tap = rcu_dereference(vlan->taps[rxq]);
if (tap)
goto out;
}
/* Everything failed - find first available queue */
for (rxq = 0; rxq < MAX_MACVTAP_QUEUES; rxq++) {
tap = rcu_dereference(vlan->taps[rxq]);
if (tap)
break;
}
out:
return tap;
}
/*
* The net_device is going away, give up the reference
* that it holds on all queues and safely set the pointer
* from the queues to NULL.
*/
static void macvtap_del_queues(struct net_device *dev)
{
struct macvlan_dev *vlan = netdev_priv(dev);
struct macvtap_queue *q, *qlist[MAX_MACVTAP_QUEUES];
int i, j = 0;
/* macvtap_put_queue can free some slots, so go through all slots */
spin_lock(&macvtap_lock);
for (i = 0; i < MAX_MACVTAP_QUEUES && vlan->numvtaps; i++) {
q = rcu_dereference_protected(vlan->taps[i],
lockdep_is_held(&macvtap_lock));
if (q) {
qlist[j++] = q;
RCU_INIT_POINTER(vlan->taps[i], NULL);
RCU_INIT_POINTER(q->vlan, NULL);
vlan->numvtaps--;
}
}
BUG_ON(vlan->numvtaps != 0);
/* guarantee that any future macvtap_set_queue will fail */
vlan->numvtaps = MAX_MACVTAP_QUEUES;
spin_unlock(&macvtap_lock);
synchronize_rcu();
for (--j; j >= 0; j--)
sock_put(&qlist[j]->sk);
}
/*
* Forward happens for data that gets sent from one macvlan
* endpoint to another one in bridge mode. We just take
* the skb and put it into the receive queue.
*/
static int macvtap_forward(struct net_device *dev, struct sk_buff *skb)
{
struct macvtap_queue *q = macvtap_get_queue(dev, skb);
if (!q)
goto drop;
if (skb_queue_len(&q->sk.sk_receive_queue) >= dev->tx_queue_len)
goto drop;
skb_queue_tail(&q->sk.sk_receive_queue, skb);
wake_up_interruptible_poll(sk_sleep(&q->sk), POLLIN | POLLRDNORM | POLLRDBAND);
return NET_RX_SUCCESS;
drop:
kfree_skb(skb);
return NET_RX_DROP;
}
/*
* Receive is for data from the external interface (lowerdev),
* in case of macvtap, we can treat that the same way as
* forward, which macvlan cannot.
*/
static int macvtap_receive(struct sk_buff *skb)
{
skb_push(skb, ETH_HLEN);
return macvtap_forward(skb->dev, skb);
}
static int macvtap_get_minor(struct macvlan_dev *vlan)
{
int retval = -ENOMEM;
int id;
mutex_lock(&minor_lock);
if (idr_pre_get(&minor_idr, GFP_KERNEL) == 0)
goto exit;
retval = idr_get_new_above(&minor_idr, vlan, 1, &id);
if (retval < 0) {
if (retval == -EAGAIN)
retval = -ENOMEM;
goto exit;
}
if (id < MACVTAP_NUM_DEVS) {
vlan->minor = id;
} else {
printk(KERN_ERR "too many macvtap devices\n");
retval = -EINVAL;
idr_remove(&minor_idr, id);
}
exit:
mutex_unlock(&minor_lock);
return retval;
}
static void macvtap_free_minor(struct macvlan_dev *vlan)
{
mutex_lock(&minor_lock);
if (vlan->minor) {
idr_remove(&minor_idr, vlan->minor);
vlan->minor = 0;
}
mutex_unlock(&minor_lock);
}
static struct net_device *dev_get_by_macvtap_minor(int minor)
{
struct net_device *dev = NULL;
struct macvlan_dev *vlan;
mutex_lock(&minor_lock);
vlan = idr_find(&minor_idr, minor);
if (vlan) {
dev = vlan->dev;
dev_hold(dev);
}
mutex_unlock(&minor_lock);
return dev;
}
static int macvtap_newlink(struct net *src_net,
struct net_device *dev,
struct nlattr *tb[],
struct nlattr *data[])
{
/* Don't put anything that may fail after macvlan_common_newlink
* because we can't undo what it does.
*/
return macvlan_common_newlink(src_net, dev, tb, data,
macvtap_receive, macvtap_forward);
}
static void macvtap_dellink(struct net_device *dev,
struct list_head *head)
{
macvtap_del_queues(dev);
macvlan_dellink(dev, head);
}
static void macvtap_setup(struct net_device *dev)
{
macvlan_common_setup(dev);
dev->tx_queue_len = TUN_READQ_SIZE;
}
static struct rtnl_link_ops macvtap_link_ops __read_mostly = {
.kind = "macvtap",
.setup = macvtap_setup,
.newlink = macvtap_newlink,
.dellink = macvtap_dellink,
};
static void macvtap_sock_write_space(struct sock *sk)
{
wait_queue_head_t *wqueue;
if (!sock_writeable(sk) ||
!test_and_clear_bit(SOCK_ASYNC_NOSPACE, &sk->sk_socket->flags))
return;
wqueue = sk_sleep(sk);
if (wqueue && waitqueue_active(wqueue))
wake_up_interruptible_poll(wqueue, POLLOUT | POLLWRNORM | POLLWRBAND);
}
static void macvtap_sock_destruct(struct sock *sk)
{
skb_queue_purge(&sk->sk_receive_queue);
}
static int macvtap_open(struct inode *inode, struct file *file)
{
struct net *net = current->nsproxy->net_ns;
struct net_device *dev = dev_get_by_macvtap_minor(iminor(inode));
struct macvtap_queue *q;
int err;
err = -ENODEV;
if (!dev)
goto out;
err = -ENOMEM;
q = (struct macvtap_queue *)sk_alloc(net, AF_UNSPEC, GFP_KERNEL,
&macvtap_proto);
if (!q)
goto out;
q->sock.wq = &q->wq;
init_waitqueue_head(&q->wq.wait);
q->sock.type = SOCK_RAW;
q->sock.state = SS_CONNECTED;
q->sock.file = file;
q->sock.ops = &macvtap_socket_ops;
sock_init_data(&q->sock, &q->sk);
q->sk.sk_write_space = macvtap_sock_write_space;
q->sk.sk_destruct = macvtap_sock_destruct;
q->flags = IFF_VNET_HDR | IFF_NO_PI | IFF_TAP;
q->vnet_hdr_sz = sizeof(struct virtio_net_hdr);
/*
* so far only KVM virtio_net uses macvtap, enable zero copy between
* guest kernel and host kernel when lower device supports zerocopy
*
* The macvlan supports zerocopy iff the lower device supports zero
* copy so we don't have to look at the lower device directly.
*/
if ((dev->features & NETIF_F_HIGHDMA) && (dev->features & NETIF_F_SG))
sock_set_flag(&q->sk, SOCK_ZEROCOPY);
err = macvtap_set_queue(dev, file, q);
if (err)
sock_put(&q->sk);
out:
if (dev)
dev_put(dev);
return err;
}
static int macvtap_release(struct inode *inode, struct file *file)
{
struct macvtap_queue *q = file->private_data;
macvtap_put_queue(q);
return 0;
}
static unsigned int macvtap_poll(struct file *file, poll_table * wait)
{
struct macvtap_queue *q = file->private_data;
unsigned int mask = POLLERR;
if (!q)
goto out;
mask = 0;
poll_wait(file, &q->wq.wait, wait);
if (!skb_queue_empty(&q->sk.sk_receive_queue))
mask |= POLLIN | POLLRDNORM;
if (sock_writeable(&q->sk) ||
(!test_and_set_bit(SOCK_ASYNC_NOSPACE, &q->sock.flags) &&
sock_writeable(&q->sk)))
mask |= POLLOUT | POLLWRNORM;
out:
return mask;
}
static inline struct sk_buff *macvtap_alloc_skb(struct sock *sk, size_t prepad,
size_t len, size_t linear,
int noblock, int *err)
{
struct sk_buff *skb;
/* Under a page? Don't bother with paged skb. */
if (prepad + len < PAGE_SIZE || !linear)
linear = len;
skb = sock_alloc_send_pskb(sk, prepad + linear, len - linear, noblock,
err);
if (!skb)
return NULL;
skb_reserve(skb, prepad);
skb_put(skb, linear);
skb->data_len = len - linear;
skb->len += len - linear;
return skb;
}
/* set skb frags from iovec, this can move to core network code for reuse */
static int zerocopy_sg_from_iovec(struct sk_buff *skb, const struct iovec *from,
int offset, size_t count)
{
int len = iov_length(from, count) - offset;
int copy = skb_headlen(skb);
int size, offset1 = 0;
int i = 0;
/* Skip over from offset */
while (count && (offset >= from->iov_len)) {
offset -= from->iov_len;
++from;
--count;
}
/* copy up to skb headlen */
while (count && (copy > 0)) {
size = min_t(unsigned int, copy, from->iov_len - offset);
if (copy_from_user(skb->data + offset1, from->iov_base + offset,
size))
return -EFAULT;
if (copy > size) {
++from;
--count;
}
copy -= size;
offset1 += size;
offset = 0;
}
if (len == offset1)
return 0;
while (count--) {
struct page *page[MAX_SKB_FRAGS];
int num_pages;
unsigned long base;
len = from->iov_len - offset1;
if (!len) {
offset1 = 0;
++from;
continue;
}
base = (unsigned long)from->iov_base + offset1;
size = ((base & ~PAGE_MASK) + len + ~PAGE_MASK) >> PAGE_SHIFT;
if (i + size > MAX_SKB_FRAGS)
return -EMSGSIZE;
num_pages = get_user_pages_fast(base, size, 0, &page[i]);
if (num_pages != size)
/* put_page is in skb free */
return -EFAULT;
skb->data_len += len;
skb->len += len;
skb->truesize += len;
atomic_add(len, &skb->sk->sk_wmem_alloc);
while (len) {
int off = base & ~PAGE_MASK;
int size = min_t(int, len, PAGE_SIZE - off);
__skb_fill_page_desc(skb, i, page[i], off, size);
skb_shinfo(skb)->nr_frags++;
/* increase sk_wmem_alloc */
base += size;
len -= size;
i++;
}
offset1 = 0;
++from;
}
return 0;
}
/*
* macvtap_skb_from_vnet_hdr and macvtap_skb_to_vnet_hdr should
* be shared with the tun/tap driver.
*/
static int macvtap_skb_from_vnet_hdr(struct sk_buff *skb,
struct virtio_net_hdr *vnet_hdr)
{
unsigned short gso_type = 0;
if (vnet_hdr->gso_type != VIRTIO_NET_HDR_GSO_NONE) {
switch (vnet_hdr->gso_type & ~VIRTIO_NET_HDR_GSO_ECN) {
case VIRTIO_NET_HDR_GSO_TCPV4:
gso_type = SKB_GSO_TCPV4;
break;
case VIRTIO_NET_HDR_GSO_TCPV6:
gso_type = SKB_GSO_TCPV6;
break;
case VIRTIO_NET_HDR_GSO_UDP:
gso_type = SKB_GSO_UDP;
break;
default:
return -EINVAL;
}
if (vnet_hdr->gso_type & VIRTIO_NET_HDR_GSO_ECN)
gso_type |= SKB_GSO_TCP_ECN;
if (vnet_hdr->gso_size == 0)
return -EINVAL;
}
if (vnet_hdr->flags & VIRTIO_NET_HDR_F_NEEDS_CSUM) {
if (!skb_partial_csum_set(skb, vnet_hdr->csum_start,
vnet_hdr->csum_offset))
return -EINVAL;
}
if (vnet_hdr->gso_type != VIRTIO_NET_HDR_GSO_NONE) {
skb_shinfo(skb)->gso_size = vnet_hdr->gso_size;
skb_shinfo(skb)->gso_type = gso_type;
/* Header must be checked, and gso_segs computed. */
skb_shinfo(skb)->gso_type |= SKB_GSO_DODGY;
skb_shinfo(skb)->gso_segs = 0;
}
return 0;
}
static int macvtap_skb_to_vnet_hdr(const struct sk_buff *skb,
struct virtio_net_hdr *vnet_hdr)
{
memset(vnet_hdr, 0, sizeof(*vnet_hdr));
if (skb_is_gso(skb)) {
struct skb_shared_info *sinfo = skb_shinfo(skb);
/* This is a hint as to how much should be linear. */
vnet_hdr->hdr_len = skb_headlen(skb);
vnet_hdr->gso_size = sinfo->gso_size;
if (sinfo->gso_type & SKB_GSO_TCPV4)
vnet_hdr->gso_type = VIRTIO_NET_HDR_GSO_TCPV4;
else if (sinfo->gso_type & SKB_GSO_TCPV6)
vnet_hdr->gso_type = VIRTIO_NET_HDR_GSO_TCPV6;
else if (sinfo->gso_type & SKB_GSO_UDP)
vnet_hdr->gso_type = VIRTIO_NET_HDR_GSO_UDP;
else
BUG();
if (sinfo->gso_type & SKB_GSO_TCP_ECN)
vnet_hdr->gso_type |= VIRTIO_NET_HDR_GSO_ECN;
} else
vnet_hdr->gso_type = VIRTIO_NET_HDR_GSO_NONE;
if (skb->ip_summed == CHECKSUM_PARTIAL) {
vnet_hdr->flags = VIRTIO_NET_HDR_F_NEEDS_CSUM;
vnet_hdr->csum_start = skb_checksum_start_offset(skb);
vnet_hdr->csum_offset = skb->csum_offset;
} else if (skb->ip_summed == CHECKSUM_UNNECESSARY) {
vnet_hdr->flags = VIRTIO_NET_HDR_F_DATA_VALID;
} /* else everything is zero */
return 0;
}
/* Get packet from user space buffer */
static ssize_t macvtap_get_user(struct macvtap_queue *q, struct msghdr *m,
const struct iovec *iv, unsigned long total_len,
size_t count, int noblock)
{
struct sk_buff *skb;
struct macvlan_dev *vlan;
unsigned long len = total_len;
int err;
struct virtio_net_hdr vnet_hdr = { 0 };
int vnet_hdr_len = 0;
int copylen = 0;
bool zerocopy = false;
if (q->flags & IFF_VNET_HDR) {
vnet_hdr_len = q->vnet_hdr_sz;
err = -EINVAL;
if (len < vnet_hdr_len)
goto err;
len -= vnet_hdr_len;
err = memcpy_fromiovecend((void *)&vnet_hdr, iv, 0,
sizeof(vnet_hdr));
if (err < 0)
goto err;
if ((vnet_hdr.flags & VIRTIO_NET_HDR_F_NEEDS_CSUM) &&
vnet_hdr.csum_start + vnet_hdr.csum_offset + 2 >
vnet_hdr.hdr_len)
vnet_hdr.hdr_len = vnet_hdr.csum_start +
vnet_hdr.csum_offset + 2;
err = -EINVAL;
if (vnet_hdr.hdr_len > len)
goto err;
}
err = -EINVAL;
if (unlikely(len < ETH_HLEN))
goto err;
err = -EMSGSIZE;
if (unlikely(count > UIO_MAXIOV))
goto err;
if (m && m->msg_control && sock_flag(&q->sk, SOCK_ZEROCOPY))
zerocopy = true;
if (zerocopy) {
/* Userspace may produce vectors with count greater than
* MAX_SKB_FRAGS, so we need to linearize parts of the skb
* to let the rest of data to be fit in the frags.
*/
if (count > MAX_SKB_FRAGS) {
copylen = iov_length(iv, count - MAX_SKB_FRAGS);
if (copylen < vnet_hdr_len)
copylen = 0;
else
copylen -= vnet_hdr_len;
}
/* There are 256 bytes to be copied in skb, so there is enough
* room for skb expand head in case it is used.
* The rest buffer is mapped from userspace.
*/
if (copylen < vnet_hdr.hdr_len)
copylen = vnet_hdr.hdr_len;
if (!copylen)
copylen = GOODCOPY_LEN;
} else
copylen = len;
skb = macvtap_alloc_skb(&q->sk, NET_IP_ALIGN, copylen,
vnet_hdr.hdr_len, noblock, &err);
if (!skb)
goto err;
if (zerocopy) {
err = zerocopy_sg_from_iovec(skb, iv, vnet_hdr_len, count);
skb_shinfo(skb)->tx_flags |= SKBTX_DEV_ZEROCOPY;
} else
err = skb_copy_datagram_from_iovec(skb, 0, iv, vnet_hdr_len,
len);
if (err)
goto err_kfree;
skb_set_network_header(skb, ETH_HLEN);
skb_reset_mac_header(skb);
skb->protocol = eth_hdr(skb)->h_proto;
if (vnet_hdr_len) {
err = macvtap_skb_from_vnet_hdr(skb, &vnet_hdr);
if (err)
goto err_kfree;
}
rcu_read_lock_bh();
vlan = rcu_dereference_bh(q->vlan);
/* copy skb_ubuf_info for callback when skb has no error */
if (zerocopy)
skb_shinfo(skb)->destructor_arg = m->msg_control;
if (vlan)
macvlan_start_xmit(skb, vlan->dev);
else
kfree_skb(skb);
rcu_read_unlock_bh();
return total_len;
err_kfree:
kfree_skb(skb);
err:
rcu_read_lock_bh();
vlan = rcu_dereference_bh(q->vlan);
if (vlan)
vlan->dev->stats.tx_dropped++;
rcu_read_unlock_bh();
return err;
}
static ssize_t macvtap_aio_write(struct kiocb *iocb, const struct iovec *iv,
unsigned long count, loff_t pos)
{
struct file *file = iocb->ki_filp;
ssize_t result = -ENOLINK;
struct macvtap_queue *q = file->private_data;
result = macvtap_get_user(q, NULL, iv, iov_length(iv, count), count,
file->f_flags & O_NONBLOCK);
return result;
}
/* Put packet to the user space buffer */
static ssize_t macvtap_put_user(struct macvtap_queue *q,
const struct sk_buff *skb,
const struct iovec *iv, int len)
{
struct macvlan_dev *vlan;
int ret;
int vnet_hdr_len = 0;
int vlan_offset = 0;
int copied;
if (q->flags & IFF_VNET_HDR) {
struct virtio_net_hdr vnet_hdr;
vnet_hdr_len = q->vnet_hdr_sz;
if ((len -= vnet_hdr_len) < 0)
return -EINVAL;
ret = macvtap_skb_to_vnet_hdr(skb, &vnet_hdr);
if (ret)
return ret;
if (memcpy_toiovecend(iv, (void *)&vnet_hdr, 0, sizeof(vnet_hdr)))
return -EFAULT;
}
copied = vnet_hdr_len;
if (!vlan_tx_tag_present(skb))
len = min_t(int, skb->len, len);
else {
int copy;
struct {
__be16 h_vlan_proto;
__be16 h_vlan_TCI;
} veth;
veth.h_vlan_proto = htons(ETH_P_8021Q);
veth.h_vlan_TCI = htons(vlan_tx_tag_get(skb));
vlan_offset = offsetof(struct vlan_ethhdr, h_vlan_proto);
len = min_t(int, skb->len + VLAN_HLEN, len);
copy = min_t(int, vlan_offset, len);
ret = skb_copy_datagram_const_iovec(skb, 0, iv, copied, copy);
len -= copy;
copied += copy;
if (ret || !len)
goto done;
copy = min_t(int, sizeof(veth), len);
ret = memcpy_toiovecend(iv, (void *)&veth, copied, copy);
len -= copy;
copied += copy;
if (ret || !len)
goto done;
}
ret = skb_copy_datagram_const_iovec(skb, vlan_offset, iv, copied, len);
copied += len;
done:
rcu_read_lock_bh();
vlan = rcu_dereference_bh(q->vlan);
if (vlan)
macvlan_count_rx(vlan, copied - vnet_hdr_len, ret == 0, 0);
rcu_read_unlock_bh();
return ret ? ret : copied;
}
static ssize_t macvtap_do_read(struct macvtap_queue *q, struct kiocb *iocb,
const struct iovec *iv, unsigned long len,
int noblock)
{
DECLARE_WAITQUEUE(wait, current);
struct sk_buff *skb;
ssize_t ret = 0;
add_wait_queue(sk_sleep(&q->sk), &wait);
while (len) {
current->state = TASK_INTERRUPTIBLE;
/* Read frames from the queue */
skb = skb_dequeue(&q->sk.sk_receive_queue);
if (!skb) {
if (noblock) {
ret = -EAGAIN;
break;
}
if (signal_pending(current)) {
ret = -ERESTARTSYS;
break;
}
/* Nothing to read, let's sleep */
schedule();
continue;
}
ret = macvtap_put_user(q, skb, iv, len);
kfree_skb(skb);
break;
}
current->state = TASK_RUNNING;
remove_wait_queue(sk_sleep(&q->sk), &wait);
return ret;
}
static ssize_t macvtap_aio_read(struct kiocb *iocb, const struct iovec *iv,
unsigned long count, loff_t pos)
{
struct file *file = iocb->ki_filp;
struct macvtap_queue *q = file->private_data;
ssize_t len, ret = 0;
len = iov_length(iv, count);
if (len < 0) {
ret = -EINVAL;
goto out;
}
ret = macvtap_do_read(q, iocb, iv, len, file->f_flags & O_NONBLOCK);
ret = min_t(ssize_t, ret, len); /* XXX copied from tun.c. Why? */
out:
return ret;
}
/*
* provide compatibility with generic tun/tap interface
*/
static long macvtap_ioctl(struct file *file, unsigned int cmd,
unsigned long arg)
{
struct macvtap_queue *q = file->private_data;
struct macvlan_dev *vlan;
void __user *argp = (void __user *)arg;
struct ifreq __user *ifr = argp;
unsigned int __user *up = argp;
unsigned int u;
int __user *sp = argp;
int s;
int ret;
switch (cmd) {
case TUNSETIFF:
/* ignore the name, just look at flags */
if (get_user(u, &ifr->ifr_flags))
return -EFAULT;
ret = 0;
if ((u & ~IFF_VNET_HDR) != (IFF_NO_PI | IFF_TAP))
ret = -EINVAL;
else
q->flags = u;
return ret;
case TUNGETIFF:
rcu_read_lock_bh();
vlan = rcu_dereference_bh(q->vlan);
if (vlan)
dev_hold(vlan->dev);
rcu_read_unlock_bh();
if (!vlan)
return -ENOLINK;
ret = 0;
if (copy_to_user(&ifr->ifr_name, vlan->dev->name, IFNAMSIZ) ||
put_user(q->flags, &ifr->ifr_flags))
ret = -EFAULT;
dev_put(vlan->dev);
return ret;
case TUNGETFEATURES:
if (put_user(IFF_TAP | IFF_NO_PI | IFF_VNET_HDR, up))
return -EFAULT;
return 0;
case TUNSETSNDBUF:
if (get_user(u, up))
return -EFAULT;
q->sk.sk_sndbuf = u;
return 0;
case TUNGETVNETHDRSZ:
s = q->vnet_hdr_sz;
if (put_user(s, sp))
return -EFAULT;
return 0;
case TUNSETVNETHDRSZ:
if (get_user(s, sp))
return -EFAULT;
if (s < (int)sizeof(struct virtio_net_hdr))
return -EINVAL;
q->vnet_hdr_sz = s;
return 0;
case TUNSETOFFLOAD:
/* let the user check for future flags */
if (arg & ~(TUN_F_CSUM | TUN_F_TSO4 | TUN_F_TSO6 |
TUN_F_TSO_ECN | TUN_F_UFO))
return -EINVAL;
/* TODO: only accept frames with the features that
got enabled for forwarded frames */
if (!(q->flags & IFF_VNET_HDR))
return -EINVAL;
return 0;
default:
return -EINVAL;
}
}
#ifdef CONFIG_COMPAT
static long macvtap_compat_ioctl(struct file *file, unsigned int cmd,
unsigned long arg)
{
return macvtap_ioctl(file, cmd, (unsigned long)compat_ptr(arg));
}
#endif
static const struct file_operations macvtap_fops = {
.owner = THIS_MODULE,
.open = macvtap_open,
.release = macvtap_release,
.aio_read = macvtap_aio_read,
.aio_write = macvtap_aio_write,
.poll = macvtap_poll,
.llseek = no_llseek,
.unlocked_ioctl = macvtap_ioctl,
#ifdef CONFIG_COMPAT
.compat_ioctl = macvtap_compat_ioctl,
#endif
};
static int macvtap_sendmsg(struct kiocb *iocb, struct socket *sock,
struct msghdr *m, size_t total_len)
{
struct macvtap_queue *q = container_of(sock, struct macvtap_queue, sock);
return macvtap_get_user(q, m, m->msg_iov, total_len, m->msg_iovlen,
m->msg_flags & MSG_DONTWAIT);
}
static int macvtap_recvmsg(struct kiocb *iocb, struct socket *sock,
struct msghdr *m, size_t total_len,
int flags)
{
struct macvtap_queue *q = container_of(sock, struct macvtap_queue, sock);
int ret;
if (flags & ~(MSG_DONTWAIT|MSG_TRUNC))
return -EINVAL;
ret = macvtap_do_read(q, iocb, m->msg_iov, total_len,
flags & MSG_DONTWAIT);
if (ret > total_len) {
m->msg_flags |= MSG_TRUNC;
ret = flags & MSG_TRUNC ? ret : total_len;
}
return ret;
}
/* Ops structure to mimic raw sockets with tun */
static const struct proto_ops macvtap_socket_ops = {
.sendmsg = macvtap_sendmsg,
.recvmsg = macvtap_recvmsg,
};
/* Get an underlying socket object from tun file. Returns error unless file is
* attached to a device. The returned object works like a packet socket, it
* can be used for sock_sendmsg/sock_recvmsg. The caller is responsible for
* holding a reference to the file for as long as the socket is in use. */
struct socket *macvtap_get_socket(struct file *file)
{
struct macvtap_queue *q;
if (file->f_op != &macvtap_fops)
return ERR_PTR(-EINVAL);
q = file->private_data;
if (!q)
return ERR_PTR(-EBADFD);
return &q->sock;
}
EXPORT_SYMBOL_GPL(macvtap_get_socket);
static int macvtap_device_event(struct notifier_block *unused,
unsigned long event, void *ptr)
{
struct net_device *dev = ptr;
struct macvlan_dev *vlan;
struct device *classdev;
dev_t devt;
int err;
if (dev->rtnl_link_ops != &macvtap_link_ops)
return NOTIFY_DONE;
vlan = netdev_priv(dev);
switch (event) {
case NETDEV_REGISTER:
/* Create the device node here after the network device has
* been registered but before register_netdevice has
* finished running.
*/
err = macvtap_get_minor(vlan);
if (err)
return notifier_from_errno(err);
devt = MKDEV(MAJOR(macvtap_major), vlan->minor);
classdev = device_create(macvtap_class, &dev->dev, devt,
dev, "tap%d", dev->ifindex);
if (IS_ERR(classdev)) {
macvtap_free_minor(vlan);
return notifier_from_errno(PTR_ERR(classdev));
}
break;
case NETDEV_UNREGISTER:
devt = MKDEV(MAJOR(macvtap_major), vlan->minor);
device_destroy(macvtap_class, devt);
macvtap_free_minor(vlan);
break;
}
return NOTIFY_DONE;
}
static struct notifier_block macvtap_notifier_block __read_mostly = {
.notifier_call = macvtap_device_event,
};
static int macvtap_init(void)
{
int err;
err = alloc_chrdev_region(&macvtap_major, 0,
MACVTAP_NUM_DEVS, "macvtap");
if (err)
goto out1;
cdev_init(&macvtap_cdev, &macvtap_fops);
err = cdev_add(&macvtap_cdev, macvtap_major, MACVTAP_NUM_DEVS);
if (err)
goto out2;
macvtap_class = class_create(THIS_MODULE, "macvtap");
if (IS_ERR(macvtap_class)) {
err = PTR_ERR(macvtap_class);
goto out3;
}
err = register_netdevice_notifier(&macvtap_notifier_block);
if (err)
goto out4;
err = macvlan_link_register(&macvtap_link_ops);
if (err)
goto out5;
return 0;
out5:
unregister_netdevice_notifier(&macvtap_notifier_block);
out4:
class_unregister(macvtap_class);
out3:
cdev_del(&macvtap_cdev);
out2:
unregister_chrdev_region(macvtap_major, MACVTAP_NUM_DEVS);
out1:
return err;
}
module_init(macvtap_init);
static void macvtap_exit(void)
{
rtnl_link_unregister(&macvtap_link_ops);
unregister_netdevice_notifier(&macvtap_notifier_block);
class_unregister(macvtap_class);
cdev_del(&macvtap_cdev);
unregister_chrdev_region(macvtap_major, MACVTAP_NUM_DEVS);
}
module_exit(macvtap_exit);
MODULE_ALIAS_RTNL_LINK("macvtap");
MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
MODULE_LICENSE("GPL");
| gpl-2.0 |
mickael-guene/kernel | arch/mips/kernel/crash_dump.c | 1003 | 1720 | #include <linux/highmem.h>
#include <linux/bootmem.h>
#include <linux/crash_dump.h>
#include <asm/uaccess.h>
#include <linux/slab.h>
static void *kdump_buf_page;
/**
* copy_oldmem_page - copy one page from "oldmem"
* @pfn: page frame number to be copied
* @buf: target memory address for the copy; this can be in kernel address
* space or user address space (see @userbuf)
* @csize: number of bytes to copy
* @offset: offset in bytes into the page (based on pfn) to begin the copy
* @userbuf: if set, @buf is in user address space, use copy_to_user(),
* otherwise @buf is in kernel address space, use memcpy().
*
* Copy a page from "oldmem". For this page, there is no pte mapped
* in the current kernel.
*
* Calling copy_to_user() in atomic context is not desirable. Hence first
* copying the data to a pre-allocated kernel page and then copying to user
* space in non-atomic context.
*/
ssize_t copy_oldmem_page(unsigned long pfn, char *buf,
size_t csize, unsigned long offset, int userbuf)
{
void *vaddr;
if (!csize)
return 0;
vaddr = kmap_atomic_pfn(pfn);
if (!userbuf) {
memcpy(buf, (vaddr + offset), csize);
kunmap_atomic(vaddr);
} else {
if (!kdump_buf_page) {
pr_warning("Kdump: Kdump buffer page not allocated\n");
return -EFAULT;
}
copy_page(kdump_buf_page, vaddr);
kunmap_atomic(vaddr);
if (copy_to_user(buf, (kdump_buf_page + offset), csize))
return -EFAULT;
}
return csize;
}
static int __init kdump_buf_page_init(void)
{
int ret = 0;
kdump_buf_page = kmalloc(PAGE_SIZE, GFP_KERNEL);
if (!kdump_buf_page) {
pr_warning("Kdump: Failed to allocate kdump buffer page\n");
ret = -ENOMEM;
}
return ret;
}
arch_initcall(kdump_buf_page_init);
| gpl-2.0 |
gromaudio/linux-imx6-31053 | net/ipv6/anycast.c | 1771 | 11195 | /*
* Anycast support for IPv6
* Linux INET6 implementation
*
* Authors:
* David L Stevens (dlstevens@us.ibm.com)
*
* based heavily on net/ipv6/mcast.c
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/capability.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/types.h>
#include <linux/random.h>
#include <linux/string.h>
#include <linux/socket.h>
#include <linux/sockios.h>
#include <linux/net.h>
#include <linux/in6.h>
#include <linux/netdevice.h>
#include <linux/if_arp.h>
#include <linux/route.h>
#include <linux/init.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/slab.h>
#include <net/net_namespace.h>
#include <net/sock.h>
#include <net/snmp.h>
#include <net/ipv6.h>
#include <net/protocol.h>
#include <net/if_inet6.h>
#include <net/ndisc.h>
#include <net/addrconf.h>
#include <net/ip6_route.h>
#include <net/checksum.h>
static int ipv6_dev_ac_dec(struct net_device *dev, const struct in6_addr *addr);
/* Big ac list lock for all the sockets */
static DEFINE_SPINLOCK(ipv6_sk_ac_lock);
/*
* socket join an anycast group
*/
int ipv6_sock_ac_join(struct sock *sk, int ifindex, const struct in6_addr *addr)
{
struct ipv6_pinfo *np = inet6_sk(sk);
struct net_device *dev = NULL;
struct inet6_dev *idev;
struct ipv6_ac_socklist *pac;
struct net *net = sock_net(sk);
int ishost = !net->ipv6.devconf_all->forwarding;
int err = 0;
if (!ns_capable(net->user_ns, CAP_NET_ADMIN))
return -EPERM;
if (ipv6_addr_is_multicast(addr))
return -EINVAL;
if (ipv6_chk_addr(net, addr, NULL, 0))
return -EINVAL;
pac = sock_kmalloc(sk, sizeof(struct ipv6_ac_socklist), GFP_KERNEL);
if (pac == NULL)
return -ENOMEM;
pac->acl_next = NULL;
pac->acl_addr = *addr;
rcu_read_lock();
if (ifindex == 0) {
struct rt6_info *rt;
rt = rt6_lookup(net, addr, NULL, 0, 0);
if (rt) {
dev = rt->dst.dev;
ip6_rt_put(rt);
} else if (ishost) {
err = -EADDRNOTAVAIL;
goto error;
} else {
/* router, no matching interface: just pick one */
dev = dev_get_by_flags_rcu(net, IFF_UP,
IFF_UP | IFF_LOOPBACK);
}
} else
dev = dev_get_by_index_rcu(net, ifindex);
if (dev == NULL) {
err = -ENODEV;
goto error;
}
idev = __in6_dev_get(dev);
if (!idev) {
if (ifindex)
err = -ENODEV;
else
err = -EADDRNOTAVAIL;
goto error;
}
/* reset ishost, now that we have a specific device */
ishost = !idev->cnf.forwarding;
pac->acl_ifindex = dev->ifindex;
/* XXX
* For hosts, allow link-local or matching prefix anycasts.
* This obviates the need for propagating anycast routes while
* still allowing some non-router anycast participation.
*/
if (!ipv6_chk_prefix(addr, dev)) {
if (ishost)
err = -EADDRNOTAVAIL;
if (err)
goto error;
}
err = ipv6_dev_ac_inc(dev, addr);
if (!err) {
spin_lock_bh(&ipv6_sk_ac_lock);
pac->acl_next = np->ipv6_ac_list;
np->ipv6_ac_list = pac;
spin_unlock_bh(&ipv6_sk_ac_lock);
pac = NULL;
}
error:
rcu_read_unlock();
if (pac)
sock_kfree_s(sk, pac, sizeof(*pac));
return err;
}
/*
* socket leave an anycast group
*/
int ipv6_sock_ac_drop(struct sock *sk, int ifindex, const struct in6_addr *addr)
{
struct ipv6_pinfo *np = inet6_sk(sk);
struct net_device *dev;
struct ipv6_ac_socklist *pac, *prev_pac;
struct net *net = sock_net(sk);
spin_lock_bh(&ipv6_sk_ac_lock);
prev_pac = NULL;
for (pac = np->ipv6_ac_list; pac; pac = pac->acl_next) {
if ((ifindex == 0 || pac->acl_ifindex == ifindex) &&
ipv6_addr_equal(&pac->acl_addr, addr))
break;
prev_pac = pac;
}
if (!pac) {
spin_unlock_bh(&ipv6_sk_ac_lock);
return -ENOENT;
}
if (prev_pac)
prev_pac->acl_next = pac->acl_next;
else
np->ipv6_ac_list = pac->acl_next;
spin_unlock_bh(&ipv6_sk_ac_lock);
rcu_read_lock();
dev = dev_get_by_index_rcu(net, pac->acl_ifindex);
if (dev)
ipv6_dev_ac_dec(dev, &pac->acl_addr);
rcu_read_unlock();
sock_kfree_s(sk, pac, sizeof(*pac));
return 0;
}
void ipv6_sock_ac_close(struct sock *sk)
{
struct ipv6_pinfo *np = inet6_sk(sk);
struct net_device *dev = NULL;
struct ipv6_ac_socklist *pac;
struct net *net = sock_net(sk);
int prev_index;
if (!np->ipv6_ac_list)
return;
spin_lock_bh(&ipv6_sk_ac_lock);
pac = np->ipv6_ac_list;
np->ipv6_ac_list = NULL;
spin_unlock_bh(&ipv6_sk_ac_lock);
prev_index = 0;
rcu_read_lock();
while (pac) {
struct ipv6_ac_socklist *next = pac->acl_next;
if (pac->acl_ifindex != prev_index) {
dev = dev_get_by_index_rcu(net, pac->acl_ifindex);
prev_index = pac->acl_ifindex;
}
if (dev)
ipv6_dev_ac_dec(dev, &pac->acl_addr);
sock_kfree_s(sk, pac, sizeof(*pac));
pac = next;
}
rcu_read_unlock();
}
static void aca_put(struct ifacaddr6 *ac)
{
if (atomic_dec_and_test(&ac->aca_refcnt)) {
in6_dev_put(ac->aca_idev);
dst_release(&ac->aca_rt->dst);
kfree(ac);
}
}
/*
* device anycast group inc (add if not found)
*/
int ipv6_dev_ac_inc(struct net_device *dev, const struct in6_addr *addr)
{
struct ifacaddr6 *aca;
struct inet6_dev *idev;
struct rt6_info *rt;
int err;
idev = in6_dev_get(dev);
if (idev == NULL)
return -EINVAL;
write_lock_bh(&idev->lock);
if (idev->dead) {
err = -ENODEV;
goto out;
}
for (aca = idev->ac_list; aca; aca = aca->aca_next) {
if (ipv6_addr_equal(&aca->aca_addr, addr)) {
aca->aca_users++;
err = 0;
goto out;
}
}
/*
* not found: create a new one.
*/
aca = kzalloc(sizeof(struct ifacaddr6), GFP_ATOMIC);
if (aca == NULL) {
err = -ENOMEM;
goto out;
}
rt = addrconf_dst_alloc(idev, addr, true);
if (IS_ERR(rt)) {
kfree(aca);
err = PTR_ERR(rt);
goto out;
}
aca->aca_addr = *addr;
aca->aca_idev = idev;
aca->aca_rt = rt;
aca->aca_users = 1;
/* aca_tstamp should be updated upon changes */
aca->aca_cstamp = aca->aca_tstamp = jiffies;
atomic_set(&aca->aca_refcnt, 2);
spin_lock_init(&aca->aca_lock);
aca->aca_next = idev->ac_list;
idev->ac_list = aca;
write_unlock_bh(&idev->lock);
ip6_ins_rt(rt);
addrconf_join_solict(dev, &aca->aca_addr);
aca_put(aca);
return 0;
out:
write_unlock_bh(&idev->lock);
in6_dev_put(idev);
return err;
}
/*
* device anycast group decrement
*/
int __ipv6_dev_ac_dec(struct inet6_dev *idev, const struct in6_addr *addr)
{
struct ifacaddr6 *aca, *prev_aca;
write_lock_bh(&idev->lock);
prev_aca = NULL;
for (aca = idev->ac_list; aca; aca = aca->aca_next) {
if (ipv6_addr_equal(&aca->aca_addr, addr))
break;
prev_aca = aca;
}
if (!aca) {
write_unlock_bh(&idev->lock);
return -ENOENT;
}
if (--aca->aca_users > 0) {
write_unlock_bh(&idev->lock);
return 0;
}
if (prev_aca)
prev_aca->aca_next = aca->aca_next;
else
idev->ac_list = aca->aca_next;
write_unlock_bh(&idev->lock);
addrconf_leave_solict(idev, &aca->aca_addr);
dst_hold(&aca->aca_rt->dst);
ip6_del_rt(aca->aca_rt);
aca_put(aca);
return 0;
}
/* called with rcu_read_lock() */
static int ipv6_dev_ac_dec(struct net_device *dev, const struct in6_addr *addr)
{
struct inet6_dev *idev = __in6_dev_get(dev);
if (idev == NULL)
return -ENODEV;
return __ipv6_dev_ac_dec(idev, addr);
}
/*
* check if the interface has this anycast address
* called with rcu_read_lock()
*/
static bool ipv6_chk_acast_dev(struct net_device *dev, const struct in6_addr *addr)
{
struct inet6_dev *idev;
struct ifacaddr6 *aca;
idev = __in6_dev_get(dev);
if (idev) {
read_lock_bh(&idev->lock);
for (aca = idev->ac_list; aca; aca = aca->aca_next)
if (ipv6_addr_equal(&aca->aca_addr, addr))
break;
read_unlock_bh(&idev->lock);
return aca != NULL;
}
return false;
}
/*
* check if given interface (or any, if dev==0) has this anycast address
*/
bool ipv6_chk_acast_addr(struct net *net, struct net_device *dev,
const struct in6_addr *addr)
{
bool found = false;
rcu_read_lock();
if (dev)
found = ipv6_chk_acast_dev(dev, addr);
else
for_each_netdev_rcu(net, dev)
if (ipv6_chk_acast_dev(dev, addr)) {
found = true;
break;
}
rcu_read_unlock();
return found;
}
#ifdef CONFIG_PROC_FS
struct ac6_iter_state {
struct seq_net_private p;
struct net_device *dev;
struct inet6_dev *idev;
};
#define ac6_seq_private(seq) ((struct ac6_iter_state *)(seq)->private)
static inline struct ifacaddr6 *ac6_get_first(struct seq_file *seq)
{
struct ifacaddr6 *im = NULL;
struct ac6_iter_state *state = ac6_seq_private(seq);
struct net *net = seq_file_net(seq);
state->idev = NULL;
for_each_netdev_rcu(net, state->dev) {
struct inet6_dev *idev;
idev = __in6_dev_get(state->dev);
if (!idev)
continue;
read_lock_bh(&idev->lock);
im = idev->ac_list;
if (im) {
state->idev = idev;
break;
}
read_unlock_bh(&idev->lock);
}
return im;
}
static struct ifacaddr6 *ac6_get_next(struct seq_file *seq, struct ifacaddr6 *im)
{
struct ac6_iter_state *state = ac6_seq_private(seq);
im = im->aca_next;
while (!im) {
if (likely(state->idev != NULL))
read_unlock_bh(&state->idev->lock);
state->dev = next_net_device_rcu(state->dev);
if (!state->dev) {
state->idev = NULL;
break;
}
state->idev = __in6_dev_get(state->dev);
if (!state->idev)
continue;
read_lock_bh(&state->idev->lock);
im = state->idev->ac_list;
}
return im;
}
static struct ifacaddr6 *ac6_get_idx(struct seq_file *seq, loff_t pos)
{
struct ifacaddr6 *im = ac6_get_first(seq);
if (im)
while (pos && (im = ac6_get_next(seq, im)) != NULL)
--pos;
return pos ? NULL : im;
}
static void *ac6_seq_start(struct seq_file *seq, loff_t *pos)
__acquires(RCU)
{
rcu_read_lock();
return ac6_get_idx(seq, *pos);
}
static void *ac6_seq_next(struct seq_file *seq, void *v, loff_t *pos)
{
struct ifacaddr6 *im = ac6_get_next(seq, v);
++*pos;
return im;
}
static void ac6_seq_stop(struct seq_file *seq, void *v)
__releases(RCU)
{
struct ac6_iter_state *state = ac6_seq_private(seq);
if (likely(state->idev != NULL)) {
read_unlock_bh(&state->idev->lock);
state->idev = NULL;
}
rcu_read_unlock();
}
static int ac6_seq_show(struct seq_file *seq, void *v)
{
struct ifacaddr6 *im = (struct ifacaddr6 *)v;
struct ac6_iter_state *state = ac6_seq_private(seq);
seq_printf(seq, "%-4d %-15s %pi6 %5d\n",
state->dev->ifindex, state->dev->name,
&im->aca_addr, im->aca_users);
return 0;
}
static const struct seq_operations ac6_seq_ops = {
.start = ac6_seq_start,
.next = ac6_seq_next,
.stop = ac6_seq_stop,
.show = ac6_seq_show,
};
static int ac6_seq_open(struct inode *inode, struct file *file)
{
return seq_open_net(inode, file, &ac6_seq_ops,
sizeof(struct ac6_iter_state));
}
static const struct file_operations ac6_seq_fops = {
.owner = THIS_MODULE,
.open = ac6_seq_open,
.read = seq_read,
.llseek = seq_lseek,
.release = seq_release_net,
};
int __net_init ac6_proc_init(struct net *net)
{
if (!proc_create("anycast6", S_IRUGO, net->proc_net, &ac6_seq_fops))
return -ENOMEM;
return 0;
}
void ac6_proc_exit(struct net *net)
{
remove_proc_entry("anycast6", net->proc_net);
}
#endif
| gpl-2.0 |
crowell/gbadev.kernel | drivers/staging/easycap/easycap_settings.c | 2539 | 18284 | /******************************************************************************
* *
* easycap_settings.c *
* *
******************************************************************************/
/*
*
* Copyright (C) 2010 R.M. Thomas <rmthomas@sciolus.org>
*
*
* This is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The software is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this software; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
/*****************************************************************************/
#include "easycap.h"
/*---------------------------------------------------------------------------*/
/*
* THE LEAST SIGNIFICANT BIT OF easycap_standard.mask HAS MEANING:
* 0 => 25 fps
* 1 => 30 fps
*
* THE MOST SIGNIFICANT BIT OF easycap_standard.mask HAS MEANING:
* 0 => full framerate
* 1 => 20% framerate
*/
/*---------------------------------------------------------------------------*/
const struct easycap_standard easycap_standard[] = {
{
.mask = 0x00FF & PAL_BGHIN ,
.v4l2_standard = {
.index = PAL_BGHIN,
.id = (V4L2_STD_PAL_B |
V4L2_STD_PAL_G | V4L2_STD_PAL_H |
V4L2_STD_PAL_I | V4L2_STD_PAL_N),
.name = "PAL_BGHIN",
.frameperiod = {1, 25},
.framelines = 625,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x00FF & NTSC_N_443 ,
.v4l2_standard = {
.index = NTSC_N_443,
.id = V4L2_STD_UNKNOWN,
.name = "NTSC_N_443",
.frameperiod = {1, 25},
.framelines = 480,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x00FF & PAL_Nc ,
.v4l2_standard = {
.index = PAL_Nc,
.id = V4L2_STD_PAL_Nc,
.name = "PAL_Nc",
.frameperiod = {1, 25},
.framelines = 625,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x00FF & NTSC_N ,
.v4l2_standard = {
.index = NTSC_N,
.id = V4L2_STD_UNKNOWN,
.name = "NTSC_N",
.frameperiod = {1, 25},
.framelines = 525,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x00FF & SECAM ,
.v4l2_standard = {
.index = SECAM,
.id = V4L2_STD_SECAM,
.name = "SECAM",
.frameperiod = {1, 25},
.framelines = 625,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x00FF & NTSC_M ,
.v4l2_standard = {
.index = NTSC_M,
.id = V4L2_STD_NTSC_M,
.name = "NTSC_M",
.frameperiod = {1, 30},
.framelines = 525,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x00FF & NTSC_M_JP ,
.v4l2_standard = {
.index = NTSC_M_JP,
.id = V4L2_STD_NTSC_M_JP,
.name = "NTSC_M_JP",
.frameperiod = {1, 30},
.framelines = 525,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x00FF & PAL_60 ,
.v4l2_standard = {
.index = PAL_60,
.id = V4L2_STD_PAL_60,
.name = "PAL_60",
.frameperiod = {1, 30},
.framelines = 525,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x00FF & NTSC_443 ,
.v4l2_standard = {
.index = NTSC_443,
.id = V4L2_STD_NTSC_443,
.name = "NTSC_443",
.frameperiod = {1, 30},
.framelines = 525,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x00FF & PAL_M ,
.v4l2_standard = {
.index = PAL_M,
.id = V4L2_STD_PAL_M,
.name = "PAL_M",
.frameperiod = {1, 30},
.framelines = 525,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x8000 | (0x00FF & PAL_BGHIN_SLOW),
.v4l2_standard = {
.index = PAL_BGHIN_SLOW,
.id = (V4L2_STD_PAL_B | V4L2_STD_PAL_G |
V4L2_STD_PAL_H |
V4L2_STD_PAL_I | V4L2_STD_PAL_N |
(((v4l2_std_id)0x01) << 32)),
.name = "PAL_BGHIN_SLOW",
.frameperiod = {1, 5},
.framelines = 625,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x8000 | (0x00FF & NTSC_N_443_SLOW),
.v4l2_standard = {
.index = NTSC_N_443_SLOW,
.id = (V4L2_STD_UNKNOWN | (((v4l2_std_id)0x11) << 32)),
.name = "NTSC_N_443_SLOW",
.frameperiod = {1, 5},
.framelines = 480,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x8000 | (0x00FF & PAL_Nc_SLOW),
.v4l2_standard = {
.index = PAL_Nc_SLOW,
.id = (V4L2_STD_PAL_Nc | (((v4l2_std_id)0x01) << 32)),
.name = "PAL_Nc_SLOW",
.frameperiod = {1, 5},
.framelines = 625,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x8000 | (0x00FF & NTSC_N_SLOW),
.v4l2_standard = {
.index = NTSC_N_SLOW,
.id = (V4L2_STD_UNKNOWN | (((v4l2_std_id)0x21) << 32)),
.name = "NTSC_N_SLOW",
.frameperiod = {1, 5},
.framelines = 525,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x8000 | (0x00FF & SECAM_SLOW),
.v4l2_standard = {
.index = SECAM_SLOW,
.id = (V4L2_STD_SECAM | (((v4l2_std_id)0x01) << 32)),
.name = "SECAM_SLOW",
.frameperiod = {1, 5},
.framelines = 625,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x8000 | (0x00FF & NTSC_M_SLOW),
.v4l2_standard = {
.index = NTSC_M_SLOW,
.id = (V4L2_STD_NTSC_M | (((v4l2_std_id)0x01) << 32)),
.name = "NTSC_M_SLOW",
.frameperiod = {1, 6},
.framelines = 525,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x8000 | (0x00FF & NTSC_M_JP_SLOW),
.v4l2_standard = {
.index = NTSC_M_JP_SLOW,
.id = (V4L2_STD_NTSC_M_JP |
(((v4l2_std_id)0x01) << 32)),
.name = "NTSC_M_JP_SLOW",
.frameperiod = {1, 6},
.framelines = 525,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x8000 | (0x00FF & PAL_60_SLOW),
.v4l2_standard = {
.index = PAL_60_SLOW,
.id = (V4L2_STD_PAL_60 | (((v4l2_std_id)0x01) << 32)),
.name = "PAL_60_SLOW",
.frameperiod = {1, 6},
.framelines = 525,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x8000 | (0x00FF & NTSC_443_SLOW),
.v4l2_standard = {
.index = NTSC_443_SLOW,
.id = (V4L2_STD_NTSC_443 | (((v4l2_std_id)0x01) << 32)),
.name = "NTSC_443_SLOW",
.frameperiod = {1, 6},
.framelines = 525,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0x8000 | (0x00FF & PAL_M_SLOW),
.v4l2_standard = {
.index = PAL_M_SLOW,
.id = (V4L2_STD_PAL_M | (((v4l2_std_id)0x01) << 32)),
.name = "PAL_M_SLOW",
.frameperiod = {1, 6},
.framelines = 525,
.reserved = {0, 0, 0, 0}
}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.mask = 0xFFFF
}
};
/*---------------------------------------------------------------------------*/
/*
* THE 16-BIT easycap_format.mask HAS MEANING:
* (least significant) BIT 0: 0 => PAL, 25 FPS; 1 => NTSC, 30 FPS
* BITS 2-4: RESERVED FOR DIFFERENTIATING STANDARDS
* BITS 5-7: NUMBER OF BYTES PER PIXEL
* BIT 8: 0 => NATIVE BYTE ORDER; 1 => SWAPPED
* BITS 9-10: RESERVED FOR OTHER BYTE PERMUTATIONS
* BIT 11: 0 => UNDECIMATED; 1 => DECIMATED
* BIT 12: 0 => OFFER FRAMES; 1 => OFFER FIELDS
* BIT 13: 0 => FULL FRAMERATE; 1 => REDUCED
* (most significant) BITS 14-15: RESERVED FOR OTHER FIELD/FRAME OPTIONS
* IT FOLLOWS THAT:
* bytesperpixel IS ((0x00E0 & easycap_format.mask) >> 5)
* byteswaporder IS true IF (0 != (0x0100 & easycap_format.mask))
*
* decimatepixel IS true IF (0 != (0x0800 & easycap_format.mask))
*
* offerfields IS true IF (0 != (0x1000 & easycap_format.mask))
*/
/*---------------------------------------------------------------------------*/
struct easycap_format easycap_format[1 + SETTINGS_MANY];
int fillin_formats(void)
{
const char *name1, *name2, *name3, *name4;
struct v4l2_format *fmt;
int i, j, k, m, n;
u32 width, height, pixelformat, bytesperline, sizeimage;
u16 mask1, mask2, mask3, mask4;
enum v4l2_field field;
enum v4l2_colorspace colorspace;
for (i = 0, n = 0; i < STANDARD_MANY; i++) {
mask1 = 0x0000;
switch (i) {
case PAL_BGHIN: {
mask1 = 0x1F & PAL_BGHIN;
name1 = "PAL_BGHIN";
colorspace = V4L2_COLORSPACE_470_SYSTEM_BG;
break;
}
case SECAM: {
mask1 = 0x1F & SECAM;
name1 = "SECAM";
colorspace = V4L2_COLORSPACE_470_SYSTEM_BG;
break;
}
case PAL_Nc: {
mask1 = 0x1F & PAL_Nc;
name1 = "PAL_Nc";
colorspace = V4L2_COLORSPACE_470_SYSTEM_BG;
break;
}
case PAL_60: {
mask1 = 0x1F & PAL_60;
name1 = "PAL_60";
colorspace = V4L2_COLORSPACE_470_SYSTEM_BG;
break;
}
case PAL_M: {
mask1 = 0x1F & PAL_M;
name1 = "PAL_M";
colorspace = V4L2_COLORSPACE_470_SYSTEM_BG;
break;
}
case NTSC_M: {
mask1 = 0x1F & NTSC_M;
name1 = "NTSC_M";
colorspace = V4L2_COLORSPACE_470_SYSTEM_M;
break;
}
case NTSC_443: {
mask1 = 0x1F & NTSC_443;
name1 = "NTSC_443";
colorspace = V4L2_COLORSPACE_470_SYSTEM_M;
break;
}
case NTSC_M_JP: {
mask1 = 0x1F & NTSC_M_JP;
name1 = "NTSC_M_JP";
colorspace = V4L2_COLORSPACE_470_SYSTEM_M;
break;
}
case NTSC_N: {
mask1 = 0x1F & NTSC_M;
name1 = "NTSC_N";
colorspace = V4L2_COLORSPACE_470_SYSTEM_M;
break;
}
case NTSC_N_443: {
mask1 = 0x1F & NTSC_N_443;
name1 = "NTSC_N_443";
colorspace = V4L2_COLORSPACE_470_SYSTEM_M;
break;
}
case PAL_BGHIN_SLOW: {
mask1 = 0x001F & PAL_BGHIN_SLOW;
mask1 |= 0x0200;
name1 = "PAL_BGHIN_SLOW";
colorspace = V4L2_COLORSPACE_470_SYSTEM_BG;
break;
}
case SECAM_SLOW: {
mask1 = 0x001F & SECAM_SLOW;
mask1 |= 0x0200;
name1 = "SECAM_SLOW";
colorspace = V4L2_COLORSPACE_470_SYSTEM_BG;
break;
}
case PAL_Nc_SLOW: {
mask1 = 0x001F & PAL_Nc_SLOW;
mask1 |= 0x0200;
name1 = "PAL_Nc_SLOW";
colorspace = V4L2_COLORSPACE_470_SYSTEM_BG;
break;
}
case PAL_60_SLOW: {
mask1 = 0x001F & PAL_60_SLOW;
mask1 |= 0x0200;
name1 = "PAL_60_SLOW";
colorspace = V4L2_COLORSPACE_470_SYSTEM_BG;
break;
}
case PAL_M_SLOW: {
mask1 = 0x001F & PAL_M_SLOW;
mask1 |= 0x0200;
name1 = "PAL_M_SLOW";
colorspace = V4L2_COLORSPACE_470_SYSTEM_BG;
break;
}
case NTSC_M_SLOW: {
mask1 = 0x001F & NTSC_M_SLOW;
mask1 |= 0x0200;
name1 = "NTSC_M_SLOW";
colorspace = V4L2_COLORSPACE_470_SYSTEM_M;
break;
}
case NTSC_443_SLOW: {
mask1 = 0x001F & NTSC_443_SLOW;
mask1 |= 0x0200;
name1 = "NTSC_443_SLOW";
colorspace = V4L2_COLORSPACE_470_SYSTEM_M;
break;
}
case NTSC_M_JP_SLOW: {
mask1 = 0x001F & NTSC_M_JP_SLOW;
mask1 |= 0x0200;
name1 = "NTSC_M_JP_SLOW";
colorspace = V4L2_COLORSPACE_470_SYSTEM_M;
break;
}
case NTSC_N_SLOW: {
mask1 = 0x001F & NTSC_N_SLOW;
mask1 |= 0x0200;
name1 = "NTSC_N_SLOW";
colorspace = V4L2_COLORSPACE_470_SYSTEM_M;
break;
}
case NTSC_N_443_SLOW: {
mask1 = 0x001F & NTSC_N_443_SLOW;
mask1 |= 0x0200;
name1 = "NTSC_N_443_SLOW";
colorspace = V4L2_COLORSPACE_470_SYSTEM_M;
break;
}
default:
return -1;
}
for (j = 0; j < RESOLUTION_MANY; j++) {
mask2 = 0x0000;
switch (j) {
case AT_720x576: {
if (0x1 & mask1)
continue;
name2 = "_AT_720x576";
width = 720;
height = 576;
break;
}
case AT_704x576: {
if (0x1 & mask1)
continue;
name2 = "_AT_704x576";
width = 704;
height = 576;
break;
}
case AT_640x480: {
name2 = "_AT_640x480";
width = 640;
height = 480;
break;
}
case AT_720x480: {
if (!(0x1 & mask1))
continue;
name2 = "_AT_720x480";
width = 720;
height = 480;
break;
}
case AT_360x288: {
if (0x1 & mask1)
continue;
name2 = "_AT_360x288";
width = 360;
height = 288;
mask2 = 0x0800;
break;
}
case AT_320x240: {
name2 = "_AT_320x240";
width = 320;
height = 240;
mask2 = 0x0800;
break;
}
case AT_360x240: {
if (!(0x1 & mask1))
continue;
name2 = "_AT_360x240";
width = 360;
height = 240;
mask2 = 0x0800;
break;
}
default:
return -2;
}
for (k = 0; k < PIXELFORMAT_MANY; k++) {
mask3 = 0x0000;
switch (k) {
case FMT_UYVY: {
name3 = __stringify(FMT_UYVY);
pixelformat = V4L2_PIX_FMT_UYVY;
mask3 |= (0x02 << 5);
break;
}
case FMT_YUY2: {
name3 = __stringify(FMT_YUY2);
pixelformat = V4L2_PIX_FMT_YUYV;
mask3 |= (0x02 << 5);
mask3 |= 0x0100;
break;
}
case FMT_RGB24: {
name3 = __stringify(FMT_RGB24);
pixelformat = V4L2_PIX_FMT_RGB24;
mask3 |= (0x03 << 5);
break;
}
case FMT_RGB32: {
name3 = __stringify(FMT_RGB32);
pixelformat = V4L2_PIX_FMT_RGB32;
mask3 |= (0x04 << 5);
break;
}
case FMT_BGR24: {
name3 = __stringify(FMT_BGR24);
pixelformat = V4L2_PIX_FMT_BGR24;
mask3 |= (0x03 << 5);
mask3 |= 0x0100;
break;
}
case FMT_BGR32: {
name3 = __stringify(FMT_BGR32);
pixelformat = V4L2_PIX_FMT_BGR32;
mask3 |= (0x04 << 5);
mask3 |= 0x0100;
break;
}
default:
return -3;
}
bytesperline = width * ((mask3 & 0x00F0) >> 4);
sizeimage = bytesperline * height;
for (m = 0; m < INTERLACE_MANY; m++) {
mask4 = 0x0000;
switch (m) {
case FIELD_NONE: {
name4 = "-n";
field = V4L2_FIELD_NONE;
break;
}
case FIELD_INTERLACED: {
name4 = "-i";
mask4 |= 0x1000;
field = V4L2_FIELD_INTERLACED;
break;
}
default:
return -4;
}
if (SETTINGS_MANY <= n)
return -5;
strcpy(easycap_format[n].name, name1);
strcat(easycap_format[n].name, name2);
strcat(easycap_format[n].name, "_");
strcat(easycap_format[n].name, name3);
strcat(easycap_format[n].name, name4);
easycap_format[n].mask =
mask1 | mask2 | mask3 | mask4;
fmt = &easycap_format[n].v4l2_format;
fmt->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
fmt->fmt.pix.width = width;
fmt->fmt.pix.height = height;
fmt->fmt.pix.pixelformat = pixelformat;
fmt->fmt.pix.field = field;
fmt->fmt.pix.bytesperline = bytesperline;
fmt->fmt.pix.sizeimage = sizeimage;
fmt->fmt.pix.colorspace = colorspace;
fmt->fmt.pix.priv = 0;
n++;
}
}
}
}
if ((1 + SETTINGS_MANY) <= n)
return -6;
easycap_format[n].mask = 0xFFFF;
return n;
}
/*---------------------------------------------------------------------------*/
struct v4l2_queryctrl easycap_control[] = {
{
.id = V4L2_CID_BRIGHTNESS,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Brightness",
.minimum = 0,
.maximum = 255,
.step = 1,
.default_value = SAA_0A_DEFAULT,
.flags = 0,
.reserved = {0, 0}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.id = V4L2_CID_CONTRAST,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Contrast",
.minimum = 0,
.maximum = 255,
.step = 1,
.default_value = SAA_0B_DEFAULT + 128,
.flags = 0,
.reserved = {0, 0}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.id = V4L2_CID_SATURATION,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Saturation",
.minimum = 0,
.maximum = 255,
.step = 1,
.default_value = SAA_0C_DEFAULT + 128,
.flags = 0,
.reserved = {0, 0}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.id = V4L2_CID_HUE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Hue",
.minimum = 0,
.maximum = 255,
.step = 1,
.default_value = SAA_0D_DEFAULT + 128,
.flags = 0,
.reserved = {0, 0}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.id = V4L2_CID_AUDIO_VOLUME,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Volume",
.minimum = 0,
.maximum = 31,
.step = 1,
.default_value = 16,
.flags = 0,
.reserved = {0, 0}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.id = V4L2_CID_AUDIO_MUTE,
.type = V4L2_CTRL_TYPE_BOOLEAN,
.name = "Mute",
.default_value = true,
.flags = 0,
.reserved = {0, 0}
},
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
{
.id = 0xFFFFFFFF
}
};
/*****************************************************************************/
| gpl-2.0 |
keenet/kernel_ubuntu_aurora2 | sound/usb/6fire/chip.c | 3051 | 5856 | /*
* Linux driver for TerraTec DMX 6Fire USB
*
* Main routines and module definitions.
*
* Author: Torsten Schenk <torsten.schenk@zoho.com>
* Created: Jan 01, 2011
* Version: 0.3.0
* Copyright: (C) Torsten Schenk
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include "chip.h"
#include "firmware.h"
#include "pcm.h"
#include "control.h"
#include "comm.h"
#include "midi.h"
#include <linux/moduleparam.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/gfp.h>
#include <sound/initval.h>
MODULE_AUTHOR("Torsten Schenk <torsten.schenk@zoho.com>");
MODULE_DESCRIPTION("TerraTec DMX 6Fire USB audio driver, version 0.3.0");
MODULE_LICENSE("GPL v2");
MODULE_SUPPORTED_DEVICE("{{TerraTec, DMX 6Fire USB}}");
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-max */
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* Id for card */
static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable card */
static struct sfire_chip *chips[SNDRV_CARDS] = SNDRV_DEFAULT_PTR;
static struct usb_device *devices[SNDRV_CARDS] = SNDRV_DEFAULT_PTR;
module_param_array(index, int, NULL, 0444);
MODULE_PARM_DESC(index, "Index value for the 6fire sound device");
module_param_array(id, charp, NULL, 0444);
MODULE_PARM_DESC(id, "ID string for the 6fire sound device.");
module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "Enable the 6fire sound device.");
static DEFINE_MUTEX(register_mutex);
static void usb6fire_chip_abort(struct sfire_chip *chip)
{
if (chip) {
if (chip->pcm)
usb6fire_pcm_abort(chip);
if (chip->midi)
usb6fire_midi_abort(chip);
if (chip->comm)
usb6fire_comm_abort(chip);
if (chip->control)
usb6fire_control_abort(chip);
if (chip->card) {
snd_card_disconnect(chip->card);
snd_card_free_when_closed(chip->card);
chip->card = NULL;
}
}
}
static void usb6fire_chip_destroy(struct sfire_chip *chip)
{
if (chip) {
if (chip->pcm)
usb6fire_pcm_destroy(chip);
if (chip->midi)
usb6fire_midi_destroy(chip);
if (chip->comm)
usb6fire_comm_destroy(chip);
if (chip->control)
usb6fire_control_destroy(chip);
if (chip->card)
snd_card_free(chip->card);
}
}
static int __devinit usb6fire_chip_probe(struct usb_interface *intf,
const struct usb_device_id *usb_id)
{
int ret;
int i;
struct sfire_chip *chip = NULL;
struct usb_device *device = interface_to_usbdev(intf);
int regidx = -1; /* index in module parameter array */
struct snd_card *card = NULL;
/* look if we already serve this card and return if so */
mutex_lock(®ister_mutex);
for (i = 0; i < SNDRV_CARDS; i++) {
if (devices[i] == device) {
if (chips[i])
chips[i]->intf_count++;
usb_set_intfdata(intf, chips[i]);
mutex_unlock(®ister_mutex);
return 0;
} else if (regidx < 0)
regidx = i;
}
if (regidx < 0) {
mutex_unlock(®ister_mutex);
snd_printk(KERN_ERR PREFIX "too many cards registered.\n");
return -ENODEV;
}
devices[regidx] = device;
mutex_unlock(®ister_mutex);
/* check, if firmware is present on device, upload it if not */
ret = usb6fire_fw_init(intf);
if (ret < 0)
return ret;
else if (ret == FW_NOT_READY) /* firmware update performed */
return 0;
/* if we are here, card can be registered in alsa. */
if (usb_set_interface(device, 0, 0) != 0) {
snd_printk(KERN_ERR PREFIX "can't set first interface.\n");
return -EIO;
}
ret = snd_card_create(index[regidx], id[regidx], THIS_MODULE,
sizeof(struct sfire_chip), &card);
if (ret < 0) {
snd_printk(KERN_ERR PREFIX "cannot create alsa card.\n");
return ret;
}
strcpy(card->driver, "6FireUSB");
strcpy(card->shortname, "TerraTec DMX6FireUSB");
sprintf(card->longname, "%s at %d:%d", card->shortname,
device->bus->busnum, device->devnum);
snd_card_set_dev(card, &intf->dev);
chip = card->private_data;
chips[regidx] = chip;
chip->dev = device;
chip->regidx = regidx;
chip->intf_count = 1;
chip->card = card;
ret = usb6fire_comm_init(chip);
if (ret < 0) {
usb6fire_chip_destroy(chip);
return ret;
}
ret = usb6fire_midi_init(chip);
if (ret < 0) {
usb6fire_chip_destroy(chip);
return ret;
}
ret = usb6fire_pcm_init(chip);
if (ret < 0) {
usb6fire_chip_destroy(chip);
return ret;
}
ret = usb6fire_control_init(chip);
if (ret < 0) {
usb6fire_chip_destroy(chip);
return ret;
}
ret = snd_card_register(card);
if (ret < 0) {
snd_printk(KERN_ERR PREFIX "cannot register card.");
usb6fire_chip_destroy(chip);
return ret;
}
usb_set_intfdata(intf, chip);
return 0;
}
static void usb6fire_chip_disconnect(struct usb_interface *intf)
{
struct sfire_chip *chip;
struct snd_card *card;
chip = usb_get_intfdata(intf);
if (chip) { /* if !chip, fw upload has been performed */
card = chip->card;
chip->intf_count--;
if (!chip->intf_count) {
mutex_lock(®ister_mutex);
devices[chip->regidx] = NULL;
chips[chip->regidx] = NULL;
mutex_unlock(®ister_mutex);
chip->shutdown = true;
usb6fire_chip_abort(chip);
usb6fire_chip_destroy(chip);
}
}
}
static struct usb_device_id device_table[] = {
{
.match_flags = USB_DEVICE_ID_MATCH_DEVICE,
.idVendor = 0x0ccd,
.idProduct = 0x0080
},
{}
};
MODULE_DEVICE_TABLE(usb, device_table);
static struct usb_driver driver = {
.name = "snd-usb-6fire",
.probe = usb6fire_chip_probe,
.disconnect = usb6fire_chip_disconnect,
.id_table = device_table,
};
static int __init usb6fire_chip_init(void)
{
return usb_register(&driver);
}
static void __exit usb6fire_chip_cleanup(void)
{
usb_deregister(&driver);
}
module_init(usb6fire_chip_init);
module_exit(usb6fire_chip_cleanup);
| gpl-2.0 |
TeamJB/android_kernel_lge_hammerhead | drivers/bluetooth/bt3c_cs.c | 4587 | 16040 | /*
*
* Driver for the 3Com Bluetooth PCMCIA card
*
* Copyright (C) 2001-2002 Marcel Holtmann <marcel@holtmann.org>
* Jose Orlando Pereira <jop@di.uminho.pt>
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation;
*
* Software distributed under the License is distributed on an "AS
* IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
* implied. See the License for the specific language governing
* rights and limitations under the License.
*
* The initial developer of the original code is David A. Hinds
* <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
* are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
*
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/ptrace.h>
#include <linux/ioport.h>
#include <linux/spinlock.h>
#include <linux/moduleparam.h>
#include <linux/skbuff.h>
#include <linux/string.h>
#include <linux/serial.h>
#include <linux/serial_reg.h>
#include <linux/bitops.h>
#include <asm/system.h>
#include <asm/io.h>
#include <linux/device.h>
#include <linux/firmware.h>
#include <pcmcia/cistpl.h>
#include <pcmcia/ciscode.h>
#include <pcmcia/ds.h>
#include <pcmcia/cisreg.h>
#include <net/bluetooth/bluetooth.h>
#include <net/bluetooth/hci_core.h>
/* ======================== Module parameters ======================== */
MODULE_AUTHOR("Marcel Holtmann <marcel@holtmann.org>");
MODULE_DESCRIPTION("Bluetooth driver for the 3Com Bluetooth PCMCIA card");
MODULE_LICENSE("GPL");
MODULE_FIRMWARE("BT3CPCC.bin");
/* ======================== Local structures ======================== */
typedef struct bt3c_info_t {
struct pcmcia_device *p_dev;
struct hci_dev *hdev;
spinlock_t lock; /* For serializing operations */
struct sk_buff_head txq;
unsigned long tx_state;
unsigned long rx_state;
unsigned long rx_count;
struct sk_buff *rx_skb;
} bt3c_info_t;
static int bt3c_config(struct pcmcia_device *link);
static void bt3c_release(struct pcmcia_device *link);
static void bt3c_detach(struct pcmcia_device *p_dev);
/* Transmit states */
#define XMIT_SENDING 1
#define XMIT_WAKEUP 2
#define XMIT_WAITING 8
/* Receiver states */
#define RECV_WAIT_PACKET_TYPE 0
#define RECV_WAIT_EVENT_HEADER 1
#define RECV_WAIT_ACL_HEADER 2
#define RECV_WAIT_SCO_HEADER 3
#define RECV_WAIT_DATA 4
/* ======================== Special I/O functions ======================== */
#define DATA_L 0
#define DATA_H 1
#define ADDR_L 2
#define ADDR_H 3
#define CONTROL 4
static inline void bt3c_address(unsigned int iobase, unsigned short addr)
{
outb(addr & 0xff, iobase + ADDR_L);
outb((addr >> 8) & 0xff, iobase + ADDR_H);
}
static inline void bt3c_put(unsigned int iobase, unsigned short value)
{
outb(value & 0xff, iobase + DATA_L);
outb((value >> 8) & 0xff, iobase + DATA_H);
}
static inline void bt3c_io_write(unsigned int iobase, unsigned short addr, unsigned short value)
{
bt3c_address(iobase, addr);
bt3c_put(iobase, value);
}
static inline unsigned short bt3c_get(unsigned int iobase)
{
unsigned short value = inb(iobase + DATA_L);
value |= inb(iobase + DATA_H) << 8;
return value;
}
static inline unsigned short bt3c_read(unsigned int iobase, unsigned short addr)
{
bt3c_address(iobase, addr);
return bt3c_get(iobase);
}
/* ======================== Interrupt handling ======================== */
static int bt3c_write(unsigned int iobase, int fifo_size, __u8 *buf, int len)
{
int actual = 0;
bt3c_address(iobase, 0x7080);
/* Fill FIFO with current frame */
while (actual < len) {
/* Transmit next byte */
bt3c_put(iobase, buf[actual]);
actual++;
}
bt3c_io_write(iobase, 0x7005, actual);
return actual;
}
static void bt3c_write_wakeup(bt3c_info_t *info)
{
if (!info) {
BT_ERR("Unknown device");
return;
}
if (test_and_set_bit(XMIT_SENDING, &(info->tx_state)))
return;
do {
register unsigned int iobase = info->p_dev->resource[0]->start;
register struct sk_buff *skb;
register int len;
if (!pcmcia_dev_present(info->p_dev))
break;
if (!(skb = skb_dequeue(&(info->txq)))) {
clear_bit(XMIT_SENDING, &(info->tx_state));
break;
}
/* Send frame */
len = bt3c_write(iobase, 256, skb->data, skb->len);
if (len != skb->len) {
BT_ERR("Very strange");
}
kfree_skb(skb);
info->hdev->stat.byte_tx += len;
} while (0);
}
static void bt3c_receive(bt3c_info_t *info)
{
unsigned int iobase;
int size = 0, avail;
if (!info) {
BT_ERR("Unknown device");
return;
}
iobase = info->p_dev->resource[0]->start;
avail = bt3c_read(iobase, 0x7006);
//printk("bt3c_cs: receiving %d bytes\n", avail);
bt3c_address(iobase, 0x7480);
while (size < avail) {
size++;
info->hdev->stat.byte_rx++;
/* Allocate packet */
if (info->rx_skb == NULL) {
info->rx_state = RECV_WAIT_PACKET_TYPE;
info->rx_count = 0;
if (!(info->rx_skb = bt_skb_alloc(HCI_MAX_FRAME_SIZE, GFP_ATOMIC))) {
BT_ERR("Can't allocate mem for new packet");
return;
}
}
if (info->rx_state == RECV_WAIT_PACKET_TYPE) {
info->rx_skb->dev = (void *) info->hdev;
bt_cb(info->rx_skb)->pkt_type = inb(iobase + DATA_L);
inb(iobase + DATA_H);
//printk("bt3c: PACKET_TYPE=%02x\n", bt_cb(info->rx_skb)->pkt_type);
switch (bt_cb(info->rx_skb)->pkt_type) {
case HCI_EVENT_PKT:
info->rx_state = RECV_WAIT_EVENT_HEADER;
info->rx_count = HCI_EVENT_HDR_SIZE;
break;
case HCI_ACLDATA_PKT:
info->rx_state = RECV_WAIT_ACL_HEADER;
info->rx_count = HCI_ACL_HDR_SIZE;
break;
case HCI_SCODATA_PKT:
info->rx_state = RECV_WAIT_SCO_HEADER;
info->rx_count = HCI_SCO_HDR_SIZE;
break;
default:
/* Unknown packet */
BT_ERR("Unknown HCI packet with type 0x%02x received", bt_cb(info->rx_skb)->pkt_type);
info->hdev->stat.err_rx++;
clear_bit(HCI_RUNNING, &(info->hdev->flags));
kfree_skb(info->rx_skb);
info->rx_skb = NULL;
break;
}
} else {
__u8 x = inb(iobase + DATA_L);
*skb_put(info->rx_skb, 1) = x;
inb(iobase + DATA_H);
info->rx_count--;
if (info->rx_count == 0) {
int dlen;
struct hci_event_hdr *eh;
struct hci_acl_hdr *ah;
struct hci_sco_hdr *sh;
switch (info->rx_state) {
case RECV_WAIT_EVENT_HEADER:
eh = hci_event_hdr(info->rx_skb);
info->rx_state = RECV_WAIT_DATA;
info->rx_count = eh->plen;
break;
case RECV_WAIT_ACL_HEADER:
ah = hci_acl_hdr(info->rx_skb);
dlen = __le16_to_cpu(ah->dlen);
info->rx_state = RECV_WAIT_DATA;
info->rx_count = dlen;
break;
case RECV_WAIT_SCO_HEADER:
sh = hci_sco_hdr(info->rx_skb);
info->rx_state = RECV_WAIT_DATA;
info->rx_count = sh->dlen;
break;
case RECV_WAIT_DATA:
hci_recv_frame(info->rx_skb);
info->rx_skb = NULL;
break;
}
}
}
}
bt3c_io_write(iobase, 0x7006, 0x0000);
}
static irqreturn_t bt3c_interrupt(int irq, void *dev_inst)
{
bt3c_info_t *info = dev_inst;
unsigned int iobase;
int iir;
irqreturn_t r = IRQ_NONE;
if (!info || !info->hdev)
/* our irq handler is shared */
return IRQ_NONE;
iobase = info->p_dev->resource[0]->start;
spin_lock(&(info->lock));
iir = inb(iobase + CONTROL);
if (iir & 0x80) {
int stat = bt3c_read(iobase, 0x7001);
if ((stat & 0xff) == 0x7f) {
BT_ERR("Very strange (stat=0x%04x)", stat);
} else if ((stat & 0xff) != 0xff) {
if (stat & 0x0020) {
int status = bt3c_read(iobase, 0x7002) & 0x10;
BT_INFO("%s: Antenna %s", info->hdev->name,
status ? "out" : "in");
}
if (stat & 0x0001)
bt3c_receive(info);
if (stat & 0x0002) {
//BT_ERR("Ack (stat=0x%04x)", stat);
clear_bit(XMIT_SENDING, &(info->tx_state));
bt3c_write_wakeup(info);
}
bt3c_io_write(iobase, 0x7001, 0x0000);
outb(iir, iobase + CONTROL);
}
r = IRQ_HANDLED;
}
spin_unlock(&(info->lock));
return r;
}
/* ======================== HCI interface ======================== */
static int bt3c_hci_flush(struct hci_dev *hdev)
{
bt3c_info_t *info = (bt3c_info_t *)(hdev->driver_data);
/* Drop TX queue */
skb_queue_purge(&(info->txq));
return 0;
}
static int bt3c_hci_open(struct hci_dev *hdev)
{
set_bit(HCI_RUNNING, &(hdev->flags));
return 0;
}
static int bt3c_hci_close(struct hci_dev *hdev)
{
if (!test_and_clear_bit(HCI_RUNNING, &(hdev->flags)))
return 0;
bt3c_hci_flush(hdev);
return 0;
}
static int bt3c_hci_send_frame(struct sk_buff *skb)
{
bt3c_info_t *info;
struct hci_dev *hdev = (struct hci_dev *)(skb->dev);
unsigned long flags;
if (!hdev) {
BT_ERR("Frame for unknown HCI device (hdev=NULL)");
return -ENODEV;
}
info = (bt3c_info_t *) (hdev->driver_data);
switch (bt_cb(skb)->pkt_type) {
case HCI_COMMAND_PKT:
hdev->stat.cmd_tx++;
break;
case HCI_ACLDATA_PKT:
hdev->stat.acl_tx++;
break;
case HCI_SCODATA_PKT:
hdev->stat.sco_tx++;
break;
};
/* Prepend skb with frame type */
memcpy(skb_push(skb, 1), &bt_cb(skb)->pkt_type, 1);
skb_queue_tail(&(info->txq), skb);
spin_lock_irqsave(&(info->lock), flags);
bt3c_write_wakeup(info);
spin_unlock_irqrestore(&(info->lock), flags);
return 0;
}
static void bt3c_hci_destruct(struct hci_dev *hdev)
{
}
static int bt3c_hci_ioctl(struct hci_dev *hdev, unsigned int cmd, unsigned long arg)
{
return -ENOIOCTLCMD;
}
/* ======================== Card services HCI interaction ======================== */
static int bt3c_load_firmware(bt3c_info_t *info, const unsigned char *firmware,
int count)
{
char *ptr = (char *) firmware;
char b[9];
unsigned int iobase, size, addr, fcs, tmp;
int i, err = 0;
iobase = info->p_dev->resource[0]->start;
/* Reset */
bt3c_io_write(iobase, 0x8040, 0x0404);
bt3c_io_write(iobase, 0x8040, 0x0400);
udelay(1);
bt3c_io_write(iobase, 0x8040, 0x0404);
udelay(17);
/* Load */
while (count) {
if (ptr[0] != 'S') {
BT_ERR("Bad address in firmware");
err = -EFAULT;
goto error;
}
memset(b, 0, sizeof(b));
memcpy(b, ptr + 2, 2);
size = simple_strtoul(b, NULL, 16);
memset(b, 0, sizeof(b));
memcpy(b, ptr + 4, 8);
addr = simple_strtoul(b, NULL, 16);
memset(b, 0, sizeof(b));
memcpy(b, ptr + (size * 2) + 2, 2);
fcs = simple_strtoul(b, NULL, 16);
memset(b, 0, sizeof(b));
for (tmp = 0, i = 0; i < size; i++) {
memcpy(b, ptr + (i * 2) + 2, 2);
tmp += simple_strtol(b, NULL, 16);
}
if (((tmp + fcs) & 0xff) != 0xff) {
BT_ERR("Checksum error in firmware");
err = -EILSEQ;
goto error;
}
if (ptr[1] == '3') {
bt3c_address(iobase, addr);
memset(b, 0, sizeof(b));
for (i = 0; i < (size - 4) / 2; i++) {
memcpy(b, ptr + (i * 4) + 12, 4);
tmp = simple_strtoul(b, NULL, 16);
bt3c_put(iobase, tmp);
}
}
ptr += (size * 2) + 6;
count -= (size * 2) + 6;
}
udelay(17);
/* Boot */
bt3c_address(iobase, 0x3000);
outb(inb(iobase + CONTROL) | 0x40, iobase + CONTROL);
error:
udelay(17);
/* Clear */
bt3c_io_write(iobase, 0x7006, 0x0000);
bt3c_io_write(iobase, 0x7005, 0x0000);
bt3c_io_write(iobase, 0x7001, 0x0000);
return err;
}
static int bt3c_open(bt3c_info_t *info)
{
const struct firmware *firmware;
struct hci_dev *hdev;
int err;
spin_lock_init(&(info->lock));
skb_queue_head_init(&(info->txq));
info->rx_state = RECV_WAIT_PACKET_TYPE;
info->rx_count = 0;
info->rx_skb = NULL;
/* Initialize HCI device */
hdev = hci_alloc_dev();
if (!hdev) {
BT_ERR("Can't allocate HCI device");
return -ENOMEM;
}
info->hdev = hdev;
hdev->bus = HCI_PCCARD;
hdev->driver_data = info;
SET_HCIDEV_DEV(hdev, &info->p_dev->dev);
hdev->open = bt3c_hci_open;
hdev->close = bt3c_hci_close;
hdev->flush = bt3c_hci_flush;
hdev->send = bt3c_hci_send_frame;
hdev->destruct = bt3c_hci_destruct;
hdev->ioctl = bt3c_hci_ioctl;
hdev->owner = THIS_MODULE;
/* Load firmware */
err = request_firmware(&firmware, "BT3CPCC.bin", &info->p_dev->dev);
if (err < 0) {
BT_ERR("Firmware request failed");
goto error;
}
err = bt3c_load_firmware(info, firmware->data, firmware->size);
release_firmware(firmware);
if (err < 0) {
BT_ERR("Firmware loading failed");
goto error;
}
/* Timeout before it is safe to send the first HCI packet */
msleep(1000);
/* Register HCI device */
err = hci_register_dev(hdev);
if (err < 0) {
BT_ERR("Can't register HCI device");
goto error;
}
return 0;
error:
info->hdev = NULL;
hci_free_dev(hdev);
return err;
}
static int bt3c_close(bt3c_info_t *info)
{
struct hci_dev *hdev = info->hdev;
if (!hdev)
return -ENODEV;
bt3c_hci_close(hdev);
if (hci_unregister_dev(hdev) < 0)
BT_ERR("Can't unregister HCI device %s", hdev->name);
hci_free_dev(hdev);
return 0;
}
static int bt3c_probe(struct pcmcia_device *link)
{
bt3c_info_t *info;
/* Create new info device */
info = kzalloc(sizeof(*info), GFP_KERNEL);
if (!info)
return -ENOMEM;
info->p_dev = link;
link->priv = info;
link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_VPP |
CONF_AUTO_SET_IO;
return bt3c_config(link);
}
static void bt3c_detach(struct pcmcia_device *link)
{
bt3c_info_t *info = link->priv;
bt3c_release(link);
kfree(info);
}
static int bt3c_check_config(struct pcmcia_device *p_dev, void *priv_data)
{
int *try = priv_data;
if (try == 0)
p_dev->io_lines = 16;
if ((p_dev->resource[0]->end != 8) || (p_dev->resource[0]->start == 0))
return -EINVAL;
p_dev->resource[0]->end = 8;
p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_8;
return pcmcia_request_io(p_dev);
}
static int bt3c_check_config_notpicky(struct pcmcia_device *p_dev,
void *priv_data)
{
static unsigned int base[5] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, 0x0 };
int j;
if (p_dev->io_lines > 3)
return -ENODEV;
p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_8;
p_dev->resource[0]->end = 8;
for (j = 0; j < 5; j++) {
p_dev->resource[0]->start = base[j];
p_dev->io_lines = base[j] ? 16 : 3;
if (!pcmcia_request_io(p_dev))
return 0;
}
return -ENODEV;
}
static int bt3c_config(struct pcmcia_device *link)
{
bt3c_info_t *info = link->priv;
int i;
unsigned long try;
/* First pass: look for a config entry that looks normal.
Two tries: without IO aliases, then with aliases */
for (try = 0; try < 2; try++)
if (!pcmcia_loop_config(link, bt3c_check_config, (void *) try))
goto found_port;
/* Second pass: try to find an entry that isn't picky about
its base address, then try to grab any standard serial port
address, and finally try to get any free port. */
if (!pcmcia_loop_config(link, bt3c_check_config_notpicky, NULL))
goto found_port;
BT_ERR("No usable port range found");
goto failed;
found_port:
i = pcmcia_request_irq(link, &bt3c_interrupt);
if (i != 0)
goto failed;
i = pcmcia_enable_device(link);
if (i != 0)
goto failed;
if (bt3c_open(info) != 0)
goto failed;
return 0;
failed:
bt3c_release(link);
return -ENODEV;
}
static void bt3c_release(struct pcmcia_device *link)
{
bt3c_info_t *info = link->priv;
bt3c_close(info);
pcmcia_disable_device(link);
}
static struct pcmcia_device_id bt3c_ids[] = {
PCMCIA_DEVICE_PROD_ID13("3COM", "Bluetooth PC Card", 0xefce0a31, 0xd4ce9b02),
PCMCIA_DEVICE_NULL
};
MODULE_DEVICE_TABLE(pcmcia, bt3c_ids);
static struct pcmcia_driver bt3c_driver = {
.owner = THIS_MODULE,
.name = "bt3c_cs",
.probe = bt3c_probe,
.remove = bt3c_detach,
.id_table = bt3c_ids,
};
static int __init init_bt3c_cs(void)
{
return pcmcia_register_driver(&bt3c_driver);
}
static void __exit exit_bt3c_cs(void)
{
pcmcia_unregister_driver(&bt3c_driver);
}
module_init(init_bt3c_cs);
module_exit(exit_bt3c_cs);
| gpl-2.0 |
thebigcako/android_kernel_maxwellplus | net/netrom/nr_timer.c | 5099 | 5457 | /*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* Copyright (C) Jonathan Naylor G4KLX (g4klx@g4klx.demon.co.uk)
* Copyright (C) 2002 Ralf Baechle DO1GRB (ralf@gnu.org)
*/
#include <linux/errno.h>
#include <linux/types.h>
#include <linux/socket.h>
#include <linux/in.h>
#include <linux/kernel.h>
#include <linux/jiffies.h>
#include <linux/timer.h>
#include <linux/string.h>
#include <linux/sockios.h>
#include <linux/net.h>
#include <net/ax25.h>
#include <linux/inet.h>
#include <linux/netdevice.h>
#include <linux/skbuff.h>
#include <net/sock.h>
#include <net/tcp_states.h>
#include <asm/uaccess.h>
#include <asm/system.h>
#include <linux/fcntl.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <net/netrom.h>
static void nr_heartbeat_expiry(unsigned long);
static void nr_t1timer_expiry(unsigned long);
static void nr_t2timer_expiry(unsigned long);
static void nr_t4timer_expiry(unsigned long);
static void nr_idletimer_expiry(unsigned long);
void nr_init_timers(struct sock *sk)
{
struct nr_sock *nr = nr_sk(sk);
setup_timer(&nr->t1timer, nr_t1timer_expiry, (unsigned long)sk);
setup_timer(&nr->t2timer, nr_t2timer_expiry, (unsigned long)sk);
setup_timer(&nr->t4timer, nr_t4timer_expiry, (unsigned long)sk);
setup_timer(&nr->idletimer, nr_idletimer_expiry, (unsigned long)sk);
/* initialized by sock_init_data */
sk->sk_timer.data = (unsigned long)sk;
sk->sk_timer.function = &nr_heartbeat_expiry;
}
void nr_start_t1timer(struct sock *sk)
{
struct nr_sock *nr = nr_sk(sk);
mod_timer(&nr->t1timer, jiffies + nr->t1);
}
void nr_start_t2timer(struct sock *sk)
{
struct nr_sock *nr = nr_sk(sk);
mod_timer(&nr->t2timer, jiffies + nr->t2);
}
void nr_start_t4timer(struct sock *sk)
{
struct nr_sock *nr = nr_sk(sk);
mod_timer(&nr->t4timer, jiffies + nr->t4);
}
void nr_start_idletimer(struct sock *sk)
{
struct nr_sock *nr = nr_sk(sk);
if (nr->idle > 0)
mod_timer(&nr->idletimer, jiffies + nr->idle);
}
void nr_start_heartbeat(struct sock *sk)
{
mod_timer(&sk->sk_timer, jiffies + 5 * HZ);
}
void nr_stop_t1timer(struct sock *sk)
{
del_timer(&nr_sk(sk)->t1timer);
}
void nr_stop_t2timer(struct sock *sk)
{
del_timer(&nr_sk(sk)->t2timer);
}
void nr_stop_t4timer(struct sock *sk)
{
del_timer(&nr_sk(sk)->t4timer);
}
void nr_stop_idletimer(struct sock *sk)
{
del_timer(&nr_sk(sk)->idletimer);
}
void nr_stop_heartbeat(struct sock *sk)
{
del_timer(&sk->sk_timer);
}
int nr_t1timer_running(struct sock *sk)
{
return timer_pending(&nr_sk(sk)->t1timer);
}
static void nr_heartbeat_expiry(unsigned long param)
{
struct sock *sk = (struct sock *)param;
struct nr_sock *nr = nr_sk(sk);
bh_lock_sock(sk);
switch (nr->state) {
case NR_STATE_0:
/* Magic here: If we listen() and a new link dies before it
is accepted() it isn't 'dead' so doesn't get removed. */
if (sock_flag(sk, SOCK_DESTROY) ||
(sk->sk_state == TCP_LISTEN && sock_flag(sk, SOCK_DEAD))) {
sock_hold(sk);
bh_unlock_sock(sk);
nr_destroy_socket(sk);
sock_put(sk);
return;
}
break;
case NR_STATE_3:
/*
* Check for the state of the receive buffer.
*/
if (atomic_read(&sk->sk_rmem_alloc) < (sk->sk_rcvbuf / 2) &&
(nr->condition & NR_COND_OWN_RX_BUSY)) {
nr->condition &= ~NR_COND_OWN_RX_BUSY;
nr->condition &= ~NR_COND_ACK_PENDING;
nr->vl = nr->vr;
nr_write_internal(sk, NR_INFOACK);
break;
}
break;
}
nr_start_heartbeat(sk);
bh_unlock_sock(sk);
}
static void nr_t2timer_expiry(unsigned long param)
{
struct sock *sk = (struct sock *)param;
struct nr_sock *nr = nr_sk(sk);
bh_lock_sock(sk);
if (nr->condition & NR_COND_ACK_PENDING) {
nr->condition &= ~NR_COND_ACK_PENDING;
nr_enquiry_response(sk);
}
bh_unlock_sock(sk);
}
static void nr_t4timer_expiry(unsigned long param)
{
struct sock *sk = (struct sock *)param;
bh_lock_sock(sk);
nr_sk(sk)->condition &= ~NR_COND_PEER_RX_BUSY;
bh_unlock_sock(sk);
}
static void nr_idletimer_expiry(unsigned long param)
{
struct sock *sk = (struct sock *)param;
struct nr_sock *nr = nr_sk(sk);
bh_lock_sock(sk);
nr_clear_queues(sk);
nr->n2count = 0;
nr_write_internal(sk, NR_DISCREQ);
nr->state = NR_STATE_2;
nr_start_t1timer(sk);
nr_stop_t2timer(sk);
nr_stop_t4timer(sk);
sk->sk_state = TCP_CLOSE;
sk->sk_err = 0;
sk->sk_shutdown |= SEND_SHUTDOWN;
if (!sock_flag(sk, SOCK_DEAD)) {
sk->sk_state_change(sk);
sock_set_flag(sk, SOCK_DEAD);
}
bh_unlock_sock(sk);
}
static void nr_t1timer_expiry(unsigned long param)
{
struct sock *sk = (struct sock *)param;
struct nr_sock *nr = nr_sk(sk);
bh_lock_sock(sk);
switch (nr->state) {
case NR_STATE_1:
if (nr->n2count == nr->n2) {
nr_disconnect(sk, ETIMEDOUT);
bh_unlock_sock(sk);
return;
} else {
nr->n2count++;
nr_write_internal(sk, NR_CONNREQ);
}
break;
case NR_STATE_2:
if (nr->n2count == nr->n2) {
nr_disconnect(sk, ETIMEDOUT);
bh_unlock_sock(sk);
return;
} else {
nr->n2count++;
nr_write_internal(sk, NR_DISCREQ);
}
break;
case NR_STATE_3:
if (nr->n2count == nr->n2) {
nr_disconnect(sk, ETIMEDOUT);
bh_unlock_sock(sk);
return;
} else {
nr->n2count++;
nr_requeue_frames(sk);
}
break;
}
nr_start_t1timer(sk);
bh_unlock_sock(sk);
}
| gpl-2.0 |
GameTheory-/android_kernel_g4stylusn | arch/powerpc/platforms/pseries/kexec.c | 7403 | 1968 | /*
* Copyright 2006 Michael Ellerman, IBM Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <asm/machdep.h>
#include <asm/page.h>
#include <asm/firmware.h>
#include <asm/kexec.h>
#include <asm/mpic.h>
#include <asm/xics.h>
#include <asm/smp.h>
#include "pseries.h"
#include "plpar_wrappers.h"
static void pseries_kexec_cpu_down(int crash_shutdown, int secondary)
{
/* Don't risk a hypervisor call if we're crashing */
if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) {
int ret;
int cpu = smp_processor_id();
int hwcpu = hard_smp_processor_id();
if (get_lppaca()->dtl_enable_mask) {
ret = unregister_dtl(hwcpu);
if (ret) {
pr_err("WARNING: DTL deregistration for cpu "
"%d (hw %d) failed with %d\n",
cpu, hwcpu, ret);
}
}
ret = unregister_slb_shadow(hwcpu);
if (ret) {
pr_err("WARNING: SLB shadow buffer deregistration "
"for cpu %d (hw %d) failed with %d\n",
cpu, hwcpu, ret);
}
ret = unregister_vpa(hwcpu);
if (ret) {
pr_err("WARNING: VPA deregistration for cpu %d "
"(hw %d) failed with %d\n", cpu, hwcpu, ret);
}
}
}
static void pseries_kexec_cpu_down_mpic(int crash_shutdown, int secondary)
{
pseries_kexec_cpu_down(crash_shutdown, secondary);
mpic_teardown_this_cpu(secondary);
}
void __init setup_kexec_cpu_down_mpic(void)
{
ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_mpic;
}
static void pseries_kexec_cpu_down_xics(int crash_shutdown, int secondary)
{
pseries_kexec_cpu_down(crash_shutdown, secondary);
xics_kexec_teardown_cpu(secondary);
}
void __init setup_kexec_cpu_down_xics(void)
{
ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_xics;
}
| gpl-2.0 |
oppo-source/Neo5-kernel-source | arch/arm/common/fiq_glue_setup.c | 7659 | 2595 | /*
* Copyright (C) 2010 Google, Inc.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/kernel.h>
#include <linux/percpu.h>
#include <linux/slab.h>
#include <asm/fiq.h>
#include <asm/fiq_glue.h>
extern unsigned char fiq_glue, fiq_glue_end;
extern void fiq_glue_setup(void *func, void *data, void *sp);
static struct fiq_handler fiq_debbuger_fiq_handler = {
.name = "fiq_glue",
};
DEFINE_PER_CPU(void *, fiq_stack);
static struct fiq_glue_handler *current_handler;
static DEFINE_MUTEX(fiq_glue_lock);
static void fiq_glue_setup_helper(void *info)
{
struct fiq_glue_handler *handler = info;
fiq_glue_setup(handler->fiq, handler,
__get_cpu_var(fiq_stack) + THREAD_START_SP);
}
int fiq_glue_register_handler(struct fiq_glue_handler *handler)
{
int ret;
int cpu;
if (!handler || !handler->fiq)
return -EINVAL;
mutex_lock(&fiq_glue_lock);
if (fiq_stack) {
ret = -EBUSY;
goto err_busy;
}
for_each_possible_cpu(cpu) {
void *stack;
stack = (void *)__get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
if (WARN_ON(!stack)) {
ret = -ENOMEM;
goto err_alloc_fiq_stack;
}
per_cpu(fiq_stack, cpu) = stack;
}
ret = claim_fiq(&fiq_debbuger_fiq_handler);
if (WARN_ON(ret))
goto err_claim_fiq;
current_handler = handler;
on_each_cpu(fiq_glue_setup_helper, handler, true);
set_fiq_handler(&fiq_glue, &fiq_glue_end - &fiq_glue);
mutex_unlock(&fiq_glue_lock);
return 0;
err_claim_fiq:
err_alloc_fiq_stack:
for_each_possible_cpu(cpu) {
__free_pages(per_cpu(fiq_stack, cpu), THREAD_SIZE_ORDER);
per_cpu(fiq_stack, cpu) = NULL;
}
err_busy:
mutex_unlock(&fiq_glue_lock);
return ret;
}
/**
* fiq_glue_resume - Restore fiqs after suspend or low power idle states
*
* This must be called before calling local_fiq_enable after returning from a
* power state where the fiq mode registers were lost. If a driver provided
* a resume hook when it registered the handler it will be called.
*/
void fiq_glue_resume(void)
{
if (!current_handler)
return;
fiq_glue_setup(current_handler->fiq, current_handler,
__get_cpu_var(fiq_stack) + THREAD_START_SP);
if (current_handler->resume)
current_handler->resume(current_handler);
}
| gpl-2.0 |
helicopter88/Find5-Kernel-Source-4.2 | drivers/isdn/hardware/eicon/message.c | 8171 | 446143 | /*
*
Copyright (c) Eicon Networks, 2002.
*
This source file is supplied for the use with
Eicon Networks range of DIVA Server Adapters.
*
Eicon File Revision : 2.1
*
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
*
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY OF ANY KIND WHATSOEVER INCLUDING ANY
implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU General Public License for more details.
*
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
#include "platform.h"
#include "di_defs.h"
#include "pc.h"
#include "capi20.h"
#include "divacapi.h"
#include "mdm_msg.h"
#include "divasync.h"
#define FILE_ "MESSAGE.C"
#define dprintf
/*------------------------------------------------------------------*/
/* This is options supported for all adapters that are server by */
/* XDI driver. Allo it is not necessary to ask it from every adapter*/
/* and it is not necessary to save it separate for every adapter */
/* Macrose defined here have only local meaning */
/*------------------------------------------------------------------*/
static dword diva_xdi_extended_features = 0;
#define DIVA_CAPI_USE_CMA 0x00000001
#define DIVA_CAPI_XDI_PROVIDES_SDRAM_BAR 0x00000002
#define DIVA_CAPI_XDI_PROVIDES_NO_CANCEL 0x00000004
#define DIVA_CAPI_XDI_PROVIDES_RX_DMA 0x00000008
/*
CAPI can request to process all return codes self only if:
protocol code supports this && xdi supports this
*/
#define DIVA_CAPI_SUPPORTS_NO_CANCEL(__a__) (((__a__)->manufacturer_features & MANUFACTURER_FEATURE_XONOFF_FLOW_CONTROL) && ((__a__)->manufacturer_features & MANUFACTURER_FEATURE_OK_FC_LABEL) && (diva_xdi_extended_features & DIVA_CAPI_XDI_PROVIDES_NO_CANCEL))
/*------------------------------------------------------------------*/
/* local function prototypes */
/*------------------------------------------------------------------*/
static void group_optimization(DIVA_CAPI_ADAPTER *a, PLCI *plci);
static void set_group_ind_mask(PLCI *plci);
static void clear_group_ind_mask_bit(PLCI *plci, word b);
static byte test_group_ind_mask_bit(PLCI *plci, word b);
void AutomaticLaw(DIVA_CAPI_ADAPTER *);
word CapiRelease(word);
word CapiRegister(word);
word api_put(APPL *, CAPI_MSG *);
static word api_parse(byte *, word, byte *, API_PARSE *);
static void api_save_msg(API_PARSE *in, byte *format, API_SAVE *out);
static void api_load_msg(API_SAVE *in, API_PARSE *out);
word api_remove_start(void);
void api_remove_complete(void);
static void plci_remove(PLCI *);
static void diva_get_extended_adapter_features(DIVA_CAPI_ADAPTER *a);
static void diva_ask_for_xdi_sdram_bar(DIVA_CAPI_ADAPTER *, IDI_SYNC_REQ *);
void callback(ENTITY *);
static void control_rc(PLCI *, byte, byte, byte, byte, byte);
static void data_rc(PLCI *, byte);
static void data_ack(PLCI *, byte);
static void sig_ind(PLCI *);
static void SendInfo(PLCI *, dword, byte **, byte);
static void SendSetupInfo(APPL *, PLCI *, dword, byte **, byte);
static void SendSSExtInd(APPL *, PLCI *plci, dword Id, byte **parms);
static void VSwitchReqInd(PLCI *plci, dword Id, byte **parms);
static void nl_ind(PLCI *);
static byte connect_req(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte connect_res(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte connect_a_res(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte disconnect_req(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte disconnect_res(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte listen_req(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte info_req(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte info_res(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte alert_req(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte facility_req(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte facility_res(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte connect_b3_req(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte connect_b3_res(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte connect_b3_a_res(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte disconnect_b3_req(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte disconnect_b3_res(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte data_b3_req(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte data_b3_res(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte reset_b3_req(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte reset_b3_res(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte connect_b3_t90_a_res(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte select_b_req(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte manufacturer_req(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static byte manufacturer_res(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
static word get_plci(DIVA_CAPI_ADAPTER *);
static void add_p(PLCI *, byte, byte *);
static void add_s(PLCI *plci, byte code, API_PARSE *p);
static void add_ss(PLCI *plci, byte code, API_PARSE *p);
static void add_ie(PLCI *plci, byte code, byte *p, word p_length);
static void add_d(PLCI *, word, byte *);
static void add_ai(PLCI *, API_PARSE *);
static word add_b1(PLCI *, API_PARSE *, word, word);
static word add_b23(PLCI *, API_PARSE *);
static word add_modem_b23(PLCI *plci, API_PARSE *bp_parms);
static void sig_req(PLCI *, byte, byte);
static void nl_req_ncci(PLCI *, byte, byte);
static void send_req(PLCI *);
static void send_data(PLCI *);
static word plci_remove_check(PLCI *);
static void listen_check(DIVA_CAPI_ADAPTER *);
static byte AddInfo(byte **, byte **, byte *, byte *);
static byte getChannel(API_PARSE *);
static void IndParse(PLCI *, word *, byte **, byte);
static byte ie_compare(byte *, byte *);
static word find_cip(DIVA_CAPI_ADAPTER *, byte *, byte *);
static word CPN_filter_ok(byte *cpn, DIVA_CAPI_ADAPTER *, word);
/*
XON protocol helpers
*/
static void channel_flow_control_remove(PLCI *plci);
static void channel_x_off(PLCI *plci, byte ch, byte flag);
static void channel_x_on(PLCI *plci, byte ch);
static void channel_request_xon(PLCI *plci, byte ch);
static void channel_xmit_xon(PLCI *plci);
static int channel_can_xon(PLCI *plci, byte ch);
static void channel_xmit_extended_xon(PLCI *plci);
static byte SendMultiIE(PLCI *plci, dword Id, byte **parms, byte ie_type, dword info_mask, byte setupParse);
static word AdvCodecSupport(DIVA_CAPI_ADAPTER *, PLCI *, APPL *, byte);
static void CodecIdCheck(DIVA_CAPI_ADAPTER *, PLCI *);
static void SetVoiceChannel(PLCI *, byte *, DIVA_CAPI_ADAPTER *);
static void VoiceChannelOff(PLCI *plci);
static void adv_voice_write_coefs(PLCI *plci, word write_command);
static void adv_voice_clear_config(PLCI *plci);
static word get_b1_facilities(PLCI *plci, byte b1_resource);
static byte add_b1_facilities(PLCI *plci, byte b1_resource, word b1_facilities);
static void adjust_b1_facilities(PLCI *plci, byte new_b1_resource, word new_b1_facilities);
static word adjust_b_process(dword Id, PLCI *plci, byte Rc);
static void adjust_b1_resource(dword Id, PLCI *plci, API_SAVE *bp_msg, word b1_facilities, word internal_command);
static void adjust_b_restore(dword Id, PLCI *plci, byte Rc);
static void reset_b3_command(dword Id, PLCI *plci, byte Rc);
static void select_b_command(dword Id, PLCI *plci, byte Rc);
static void fax_connect_ack_command(dword Id, PLCI *plci, byte Rc);
static void fax_edata_ack_command(dword Id, PLCI *plci, byte Rc);
static void fax_connect_info_command(dword Id, PLCI *plci, byte Rc);
static void fax_adjust_b23_command(dword Id, PLCI *plci, byte Rc);
static void fax_disconnect_command(dword Id, PLCI *plci, byte Rc);
static void hold_save_command(dword Id, PLCI *plci, byte Rc);
static void retrieve_restore_command(dword Id, PLCI *plci, byte Rc);
static void init_b1_config(PLCI *plci);
static void clear_b1_config(PLCI *plci);
static void dtmf_command(dword Id, PLCI *plci, byte Rc);
static byte dtmf_request(dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI *plci, APPL *appl, API_PARSE *msg);
static void dtmf_confirmation(dword Id, PLCI *plci);
static void dtmf_indication(dword Id, PLCI *plci, byte *msg, word length);
static void dtmf_parameter_write(PLCI *plci);
static void mixer_set_bchannel_id_esc(PLCI *plci, byte bchannel_id);
static void mixer_set_bchannel_id(PLCI *plci, byte *chi);
static void mixer_clear_config(PLCI *plci);
static void mixer_notify_update(PLCI *plci, byte others);
static void mixer_command(dword Id, PLCI *plci, byte Rc);
static byte mixer_request(dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI *plci, APPL *appl, API_PARSE *msg);
static void mixer_indication_coefs_set(dword Id, PLCI *plci);
static void mixer_indication_xconnect_from(dword Id, PLCI *plci, byte *msg, word length);
static void mixer_indication_xconnect_to(dword Id, PLCI *plci, byte *msg, word length);
static void mixer_remove(PLCI *plci);
static void ec_command(dword Id, PLCI *plci, byte Rc);
static byte ec_request(dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI *plci, APPL *appl, API_PARSE *msg);
static void ec_indication(dword Id, PLCI *plci, byte *msg, word length);
static void rtp_connect_b3_req_command(dword Id, PLCI *plci, byte Rc);
static void rtp_connect_b3_res_command(dword Id, PLCI *plci, byte Rc);
static int diva_get_dma_descriptor(PLCI *plci, dword *dma_magic);
static void diva_free_dma_descriptor(PLCI *plci, int nr);
/*------------------------------------------------------------------*/
/* external function prototypes */
/*------------------------------------------------------------------*/
extern byte MapController(byte);
extern byte UnMapController(byte);
#define MapId(Id)(((Id) & 0xffffff00L) | MapController((byte)(Id)))
#define UnMapId(Id)(((Id) & 0xffffff00L) | UnMapController((byte)(Id)))
void sendf(APPL *, word, dword, word, byte *, ...);
void *TransmitBufferSet(APPL *appl, dword ref);
void *TransmitBufferGet(APPL *appl, void *p);
void TransmitBufferFree(APPL *appl, void *p);
void *ReceiveBufferGet(APPL *appl, int Num);
int fax_head_line_time(char *buffer);
/*------------------------------------------------------------------*/
/* Global data definitions */
/*------------------------------------------------------------------*/
extern byte max_adapter;
extern byte max_appl;
extern DIVA_CAPI_ADAPTER *adapter;
extern APPL *application;
static byte remove_started = false;
static PLCI dummy_plci;
static struct _ftable {
word command;
byte *format;
byte (*function)(dword, word, DIVA_CAPI_ADAPTER *, PLCI *, APPL *, API_PARSE *);
} ftable[] = {
{_DATA_B3_R, "dwww", data_b3_req},
{_DATA_B3_I | RESPONSE, "w", data_b3_res},
{_INFO_R, "ss", info_req},
{_INFO_I | RESPONSE, "", info_res},
{_CONNECT_R, "wsssssssss", connect_req},
{_CONNECT_I | RESPONSE, "wsssss", connect_res},
{_CONNECT_ACTIVE_I | RESPONSE, "", connect_a_res},
{_DISCONNECT_R, "s", disconnect_req},
{_DISCONNECT_I | RESPONSE, "", disconnect_res},
{_LISTEN_R, "dddss", listen_req},
{_ALERT_R, "s", alert_req},
{_FACILITY_R, "ws", facility_req},
{_FACILITY_I | RESPONSE, "ws", facility_res},
{_CONNECT_B3_R, "s", connect_b3_req},
{_CONNECT_B3_I | RESPONSE, "ws", connect_b3_res},
{_CONNECT_B3_ACTIVE_I | RESPONSE, "", connect_b3_a_res},
{_DISCONNECT_B3_R, "s", disconnect_b3_req},
{_DISCONNECT_B3_I | RESPONSE, "", disconnect_b3_res},
{_RESET_B3_R, "s", reset_b3_req},
{_RESET_B3_I | RESPONSE, "", reset_b3_res},
{_CONNECT_B3_T90_ACTIVE_I | RESPONSE, "ws", connect_b3_t90_a_res},
{_CONNECT_B3_T90_ACTIVE_I | RESPONSE, "", connect_b3_t90_a_res},
{_SELECT_B_REQ, "s", select_b_req},
{_MANUFACTURER_R, "dws", manufacturer_req},
{_MANUFACTURER_I | RESPONSE, "dws", manufacturer_res},
{_MANUFACTURER_I | RESPONSE, "", manufacturer_res}
};
static byte *cip_bc[29][2] = {
{ "", "" }, /* 0 */
{ "\x03\x80\x90\xa3", "\x03\x80\x90\xa2" }, /* 1 */
{ "\x02\x88\x90", "\x02\x88\x90" }, /* 2 */
{ "\x02\x89\x90", "\x02\x89\x90" }, /* 3 */
{ "\x03\x90\x90\xa3", "\x03\x90\x90\xa2" }, /* 4 */
{ "\x03\x91\x90\xa5", "\x03\x91\x90\xa5" }, /* 5 */
{ "\x02\x98\x90", "\x02\x98\x90" }, /* 6 */
{ "\x04\x88\xc0\xc6\xe6", "\x04\x88\xc0\xc6\xe6" }, /* 7 */
{ "\x04\x88\x90\x21\x8f", "\x04\x88\x90\x21\x8f" }, /* 8 */
{ "\x03\x91\x90\xa5", "\x03\x91\x90\xa5" }, /* 9 */
{ "", "" }, /* 10 */
{ "", "" }, /* 11 */
{ "", "" }, /* 12 */
{ "", "" }, /* 13 */
{ "", "" }, /* 14 */
{ "", "" }, /* 15 */
{ "\x03\x80\x90\xa3", "\x03\x80\x90\xa2" }, /* 16 */
{ "\x03\x90\x90\xa3", "\x03\x90\x90\xa2" }, /* 17 */
{ "\x02\x88\x90", "\x02\x88\x90" }, /* 18 */
{ "\x02\x88\x90", "\x02\x88\x90" }, /* 19 */
{ "\x02\x88\x90", "\x02\x88\x90" }, /* 20 */
{ "\x02\x88\x90", "\x02\x88\x90" }, /* 21 */
{ "\x02\x88\x90", "\x02\x88\x90" }, /* 22 */
{ "\x02\x88\x90", "\x02\x88\x90" }, /* 23 */
{ "\x02\x88\x90", "\x02\x88\x90" }, /* 24 */
{ "\x02\x88\x90", "\x02\x88\x90" }, /* 25 */
{ "\x03\x91\x90\xa5", "\x03\x91\x90\xa5" }, /* 26 */
{ "\x03\x91\x90\xa5", "\x03\x91\x90\xa5" }, /* 27 */
{ "\x02\x88\x90", "\x02\x88\x90" } /* 28 */
};
static byte *cip_hlc[29] = {
"", /* 0 */
"", /* 1 */
"", /* 2 */
"", /* 3 */
"", /* 4 */
"", /* 5 */
"", /* 6 */
"", /* 7 */
"", /* 8 */
"", /* 9 */
"", /* 10 */
"", /* 11 */
"", /* 12 */
"", /* 13 */
"", /* 14 */
"", /* 15 */
"\x02\x91\x81", /* 16 */
"\x02\x91\x84", /* 17 */
"\x02\x91\xa1", /* 18 */
"\x02\x91\xa4", /* 19 */
"\x02\x91\xa8", /* 20 */
"\x02\x91\xb1", /* 21 */
"\x02\x91\xb2", /* 22 */
"\x02\x91\xb5", /* 23 */
"\x02\x91\xb8", /* 24 */
"\x02\x91\xc1", /* 25 */
"\x02\x91\x81", /* 26 */
"\x03\x91\xe0\x01", /* 27 */
"\x03\x91\xe0\x02" /* 28 */
};
/*------------------------------------------------------------------*/
#define V120_HEADER_LENGTH 1
#define V120_HEADER_EXTEND_BIT 0x80
#define V120_HEADER_BREAK_BIT 0x40
#define V120_HEADER_C1_BIT 0x04
#define V120_HEADER_C2_BIT 0x08
#define V120_HEADER_FLUSH_COND (V120_HEADER_BREAK_BIT | V120_HEADER_C1_BIT | V120_HEADER_C2_BIT)
static byte v120_default_header[] =
{
0x83 /* Ext, BR , res, res, C2 , C1 , B , F */
};
static byte v120_break_header[] =
{
0xc3 | V120_HEADER_BREAK_BIT /* Ext, BR , res, res, C2 , C1 , B , F */
};
/*------------------------------------------------------------------*/
/* API_PUT function */
/*------------------------------------------------------------------*/
word api_put(APPL *appl, CAPI_MSG *msg)
{
word i, j, k, l, n;
word ret;
byte c;
byte controller;
DIVA_CAPI_ADAPTER *a;
PLCI *plci;
NCCI *ncci_ptr;
word ncci;
CAPI_MSG *m;
API_PARSE msg_parms[MAX_MSG_PARMS + 1];
if (msg->header.length < sizeof(msg->header) ||
msg->header.length > MAX_MSG_SIZE) {
dbug(1, dprintf("bad len"));
return _BAD_MSG;
}
controller = (byte)((msg->header.controller & 0x7f) - 1);
/* controller starts with 0 up to (max_adapter - 1) */
if (controller >= max_adapter)
{
dbug(1, dprintf("invalid ctrl"));
return _BAD_MSG;
}
a = &adapter[controller];
plci = NULL;
if ((msg->header.plci != 0) && (msg->header.plci <= a->max_plci) && !a->adapter_disabled)
{
dbug(1, dprintf("plci=%x", msg->header.plci));
plci = &a->plci[msg->header.plci - 1];
ncci = GET_WORD(&msg->header.ncci);
if (plci->Id
&& (plci->appl
|| (plci->State == INC_CON_PENDING)
|| (plci->State == INC_CON_ALERT)
|| (msg->header.command == (_DISCONNECT_I | RESPONSE)))
&& ((ncci == 0)
|| (msg->header.command == (_DISCONNECT_B3_I | RESPONSE))
|| ((ncci < MAX_NCCI + 1) && (a->ncci_plci[ncci] == plci->Id))))
{
i = plci->msg_in_read_pos;
j = plci->msg_in_write_pos;
if (j >= i)
{
if (j + msg->header.length + MSG_IN_OVERHEAD <= MSG_IN_QUEUE_SIZE)
i += MSG_IN_QUEUE_SIZE - j;
else
j = 0;
}
else
{
n = (((CAPI_MSG *)(plci->msg_in_queue))->header.length + MSG_IN_OVERHEAD + 3) & 0xfffc;
if (i > MSG_IN_QUEUE_SIZE - n)
i = MSG_IN_QUEUE_SIZE - n + 1;
i -= j;
}
if (i <= ((msg->header.length + MSG_IN_OVERHEAD + 3) & 0xfffc))
{
dbug(0, dprintf("Q-FULL1(msg) - len=%d write=%d read=%d wrap=%d free=%d",
msg->header.length, plci->msg_in_write_pos,
plci->msg_in_read_pos, plci->msg_in_wrap_pos, i));
return _QUEUE_FULL;
}
c = false;
if ((((byte *) msg) < ((byte *)(plci->msg_in_queue)))
|| (((byte *) msg) >= ((byte *)(plci->msg_in_queue)) + sizeof(plci->msg_in_queue)))
{
if (plci->msg_in_write_pos != plci->msg_in_read_pos)
c = true;
}
if (msg->header.command == _DATA_B3_R)
{
if (msg->header.length < 20)
{
dbug(1, dprintf("DATA_B3 REQ wrong length %d", msg->header.length));
return _BAD_MSG;
}
ncci_ptr = &(a->ncci[ncci]);
n = ncci_ptr->data_pending;
l = ncci_ptr->data_ack_pending;
k = plci->msg_in_read_pos;
while (k != plci->msg_in_write_pos)
{
if (k == plci->msg_in_wrap_pos)
k = 0;
if ((((CAPI_MSG *)(&((byte *)(plci->msg_in_queue))[k]))->header.command == _DATA_B3_R)
&& (((CAPI_MSG *)(&((byte *)(plci->msg_in_queue))[k]))->header.ncci == ncci))
{
n++;
if (((CAPI_MSG *)(&((byte *)(plci->msg_in_queue))[k]))->info.data_b3_req.Flags & 0x0004)
l++;
}
k += (((CAPI_MSG *)(&((byte *)(plci->msg_in_queue))[k]))->header.length +
MSG_IN_OVERHEAD + 3) & 0xfffc;
}
if ((n >= MAX_DATA_B3) || (l >= MAX_DATA_ACK))
{
dbug(0, dprintf("Q-FULL2(data) - pending=%d/%d ack_pending=%d/%d",
ncci_ptr->data_pending, n, ncci_ptr->data_ack_pending, l));
return _QUEUE_FULL;
}
if (plci->req_in || plci->internal_command)
{
if ((((byte *) msg) >= ((byte *)(plci->msg_in_queue)))
&& (((byte *) msg) < ((byte *)(plci->msg_in_queue)) + sizeof(plci->msg_in_queue)))
{
dbug(0, dprintf("Q-FULL3(requeue)"));
return _QUEUE_FULL;
}
c = true;
}
}
else
{
if (plci->req_in || plci->internal_command)
c = true;
else
{
plci->command = msg->header.command;
plci->number = msg->header.number;
}
}
if (c)
{
dbug(1, dprintf("enqueue msg(0x%04x,0x%x,0x%x) - len=%d write=%d read=%d wrap=%d free=%d",
msg->header.command, plci->req_in, plci->internal_command,
msg->header.length, plci->msg_in_write_pos,
plci->msg_in_read_pos, plci->msg_in_wrap_pos, i));
if (j == 0)
plci->msg_in_wrap_pos = plci->msg_in_write_pos;
m = (CAPI_MSG *)(&((byte *)(plci->msg_in_queue))[j]);
for (i = 0; i < msg->header.length; i++)
((byte *)(plci->msg_in_queue))[j++] = ((byte *) msg)[i];
if (m->header.command == _DATA_B3_R)
{
m->info.data_b3_req.Data = (dword)(long)(TransmitBufferSet(appl, m->info.data_b3_req.Data));
}
j = (j + 3) & 0xfffc;
*((APPL **)(&((byte *)(plci->msg_in_queue))[j])) = appl;
plci->msg_in_write_pos = j + MSG_IN_OVERHEAD;
return 0;
}
}
else
{
plci = NULL;
}
}
dbug(1, dprintf("com=%x", msg->header.command));
for (j = 0; j < MAX_MSG_PARMS + 1; j++) msg_parms[j].length = 0;
for (i = 0, ret = _BAD_MSG; i < ARRAY_SIZE(ftable); i++) {
if (ftable[i].command == msg->header.command) {
/* break loop if the message is correct, otherwise continue scan */
/* (for example: CONNECT_B3_T90_ACT_RES has two specifications) */
if (!api_parse(msg->info.b, (word)(msg->header.length - 12), ftable[i].format, msg_parms)) {
ret = 0;
break;
}
for (j = 0; j < MAX_MSG_PARMS + 1; j++) msg_parms[j].length = 0;
}
}
if (ret) {
dbug(1, dprintf("BAD_MSG"));
if (plci) plci->command = 0;
return ret;
}
c = ftable[i].function(GET_DWORD(&msg->header.controller),
msg->header.number,
a,
plci,
appl,
msg_parms);
channel_xmit_extended_xon(plci);
if (c == 1) send_req(plci);
if (c == 2 && plci) plci->req_in = plci->req_in_start = plci->req_out = 0;
if (plci && !plci->req_in) plci->command = 0;
return 0;
}
/*------------------------------------------------------------------*/
/* api_parse function, check the format of api messages */
/*------------------------------------------------------------------*/
static word api_parse(byte *msg, word length, byte *format, API_PARSE *parms)
{
word i;
word p;
for (i = 0, p = 0; format[i]; i++) {
if (parms)
{
parms[i].info = &msg[p];
}
switch (format[i]) {
case 'b':
p += 1;
break;
case 'w':
p += 2;
break;
case 'd':
p += 4;
break;
case 's':
if (msg[p] == 0xff) {
parms[i].info += 2;
parms[i].length = msg[p + 1] + (msg[p + 2] << 8);
p += (parms[i].length + 3);
}
else {
parms[i].length = msg[p];
p += (parms[i].length + 1);
}
break;
}
if (p > length) return true;
}
if (parms) parms[i].info = NULL;
return false;
}
static void api_save_msg(API_PARSE *in, byte *format, API_SAVE *out)
{
word i, j, n = 0;
byte *p;
p = out->info;
for (i = 0; format[i] != '\0'; i++)
{
out->parms[i].info = p;
out->parms[i].length = in[i].length;
switch (format[i])
{
case 'b':
n = 1;
break;
case 'w':
n = 2;
break;
case 'd':
n = 4;
break;
case 's':
n = in[i].length + 1;
break;
}
for (j = 0; j < n; j++)
*(p++) = in[i].info[j];
}
out->parms[i].info = NULL;
out->parms[i].length = 0;
}
static void api_load_msg(API_SAVE *in, API_PARSE *out)
{
word i;
i = 0;
do
{
out[i].info = in->parms[i].info;
out[i].length = in->parms[i].length;
} while (in->parms[i++].info);
}
/*------------------------------------------------------------------*/
/* CAPI remove function */
/*------------------------------------------------------------------*/
word api_remove_start(void)
{
word i;
word j;
if (!remove_started) {
remove_started = true;
for (i = 0; i < max_adapter; i++) {
if (adapter[i].request) {
for (j = 0; j < adapter[i].max_plci; j++) {
if (adapter[i].plci[j].Sig.Id) plci_remove(&adapter[i].plci[j]);
}
}
}
return 1;
}
else {
for (i = 0; i < max_adapter; i++) {
if (adapter[i].request) {
for (j = 0; j < adapter[i].max_plci; j++) {
if (adapter[i].plci[j].Sig.Id) return 1;
}
}
}
}
api_remove_complete();
return 0;
}
/*------------------------------------------------------------------*/
/* internal command queue */
/*------------------------------------------------------------------*/
static void init_internal_command_queue(PLCI *plci)
{
word i;
dbug(1, dprintf("%s,%d: init_internal_command_queue",
(char *)(FILE_), __LINE__));
plci->internal_command = 0;
for (i = 0; i < MAX_INTERNAL_COMMAND_LEVELS; i++)
plci->internal_command_queue[i] = NULL;
}
static void start_internal_command(dword Id, PLCI *plci, t_std_internal_command command_function)
{
word i;
dbug(1, dprintf("[%06lx] %s,%d: start_internal_command",
UnMapId(Id), (char *)(FILE_), __LINE__));
if (plci->internal_command == 0)
{
plci->internal_command_queue[0] = command_function;
(*command_function)(Id, plci, OK);
}
else
{
i = 1;
while (plci->internal_command_queue[i] != NULL)
i++;
plci->internal_command_queue[i] = command_function;
}
}
static void next_internal_command(dword Id, PLCI *plci)
{
word i;
dbug(1, dprintf("[%06lx] %s,%d: next_internal_command",
UnMapId(Id), (char *)(FILE_), __LINE__));
plci->internal_command = 0;
plci->internal_command_queue[0] = NULL;
while (plci->internal_command_queue[1] != NULL)
{
for (i = 0; i < MAX_INTERNAL_COMMAND_LEVELS - 1; i++)
plci->internal_command_queue[i] = plci->internal_command_queue[i + 1];
plci->internal_command_queue[MAX_INTERNAL_COMMAND_LEVELS - 1] = NULL;
(*(plci->internal_command_queue[0]))(Id, plci, OK);
if (plci->internal_command != 0)
return;
plci->internal_command_queue[0] = NULL;
}
}
/*------------------------------------------------------------------*/
/* NCCI allocate/remove function */
/*------------------------------------------------------------------*/
static dword ncci_mapping_bug = 0;
static word get_ncci(PLCI *plci, byte ch, word force_ncci)
{
DIVA_CAPI_ADAPTER *a;
word ncci, i, j, k;
a = plci->adapter;
if (!ch || a->ch_ncci[ch])
{
ncci_mapping_bug++;
dbug(1, dprintf("NCCI mapping exists %ld %02x %02x %02x-%02x",
ncci_mapping_bug, ch, force_ncci, a->ncci_ch[a->ch_ncci[ch]], a->ch_ncci[ch]));
ncci = ch;
}
else
{
if (force_ncci)
ncci = force_ncci;
else
{
if ((ch < MAX_NCCI + 1) && !a->ncci_ch[ch])
ncci = ch;
else
{
ncci = 1;
while ((ncci < MAX_NCCI + 1) && a->ncci_ch[ncci])
ncci++;
if (ncci == MAX_NCCI + 1)
{
ncci_mapping_bug++;
i = 1;
do
{
j = 1;
while ((j < MAX_NCCI + 1) && (a->ncci_ch[j] != i))
j++;
k = j;
if (j < MAX_NCCI + 1)
{
do
{
j++;
} while ((j < MAX_NCCI + 1) && (a->ncci_ch[j] != i));
}
} while ((i < MAX_NL_CHANNEL + 1) && (j < MAX_NCCI + 1));
if (i < MAX_NL_CHANNEL + 1)
{
dbug(1, dprintf("NCCI mapping overflow %ld %02x %02x %02x-%02x-%02x",
ncci_mapping_bug, ch, force_ncci, i, k, j));
}
else
{
dbug(1, dprintf("NCCI mapping overflow %ld %02x %02x",
ncci_mapping_bug, ch, force_ncci));
}
ncci = ch;
}
}
a->ncci_plci[ncci] = plci->Id;
a->ncci_state[ncci] = IDLE;
if (!plci->ncci_ring_list)
plci->ncci_ring_list = ncci;
else
a->ncci_next[ncci] = a->ncci_next[plci->ncci_ring_list];
a->ncci_next[plci->ncci_ring_list] = (byte) ncci;
}
a->ncci_ch[ncci] = ch;
a->ch_ncci[ch] = (byte) ncci;
dbug(1, dprintf("NCCI mapping established %ld %02x %02x %02x-%02x",
ncci_mapping_bug, ch, force_ncci, ch, ncci));
}
return (ncci);
}
static void ncci_free_receive_buffers(PLCI *plci, word ncci)
{
DIVA_CAPI_ADAPTER *a;
APPL *appl;
word i, ncci_code;
dword Id;
a = plci->adapter;
Id = (((dword) ncci) << 16) | (((word)(plci->Id)) << 8) | a->Id;
if (ncci)
{
if (a->ncci_plci[ncci] == plci->Id)
{
if (!plci->appl)
{
ncci_mapping_bug++;
dbug(1, dprintf("NCCI mapping appl expected %ld %08lx",
ncci_mapping_bug, Id));
}
else
{
appl = plci->appl;
ncci_code = ncci | (((word) a->Id) << 8);
for (i = 0; i < appl->MaxBuffer; i++)
{
if ((appl->DataNCCI[i] == ncci_code)
&& (((byte)(appl->DataFlags[i] >> 8)) == plci->Id))
{
appl->DataNCCI[i] = 0;
}
}
}
}
}
else
{
for (ncci = 1; ncci < MAX_NCCI + 1; ncci++)
{
if (a->ncci_plci[ncci] == plci->Id)
{
if (!plci->appl)
{
ncci_mapping_bug++;
dbug(1, dprintf("NCCI mapping no appl %ld %08lx",
ncci_mapping_bug, Id));
}
else
{
appl = plci->appl;
ncci_code = ncci | (((word) a->Id) << 8);
for (i = 0; i < appl->MaxBuffer; i++)
{
if ((appl->DataNCCI[i] == ncci_code)
&& (((byte)(appl->DataFlags[i] >> 8)) == plci->Id))
{
appl->DataNCCI[i] = 0;
}
}
}
}
}
}
}
static void cleanup_ncci_data(PLCI *plci, word ncci)
{
NCCI *ncci_ptr;
if (ncci && (plci->adapter->ncci_plci[ncci] == plci->Id))
{
ncci_ptr = &(plci->adapter->ncci[ncci]);
if (plci->appl)
{
while (ncci_ptr->data_pending != 0)
{
if (!plci->data_sent || (ncci_ptr->DBuffer[ncci_ptr->data_out].P != plci->data_sent_ptr))
TransmitBufferFree(plci->appl, ncci_ptr->DBuffer[ncci_ptr->data_out].P);
(ncci_ptr->data_out)++;
if (ncci_ptr->data_out == MAX_DATA_B3)
ncci_ptr->data_out = 0;
(ncci_ptr->data_pending)--;
}
}
ncci_ptr->data_out = 0;
ncci_ptr->data_pending = 0;
ncci_ptr->data_ack_out = 0;
ncci_ptr->data_ack_pending = 0;
}
}
static void ncci_remove(PLCI *plci, word ncci, byte preserve_ncci)
{
DIVA_CAPI_ADAPTER *a;
dword Id;
word i;
a = plci->adapter;
Id = (((dword) ncci) << 16) | (((word)(plci->Id)) << 8) | a->Id;
if (!preserve_ncci)
ncci_free_receive_buffers(plci, ncci);
if (ncci)
{
if (a->ncci_plci[ncci] != plci->Id)
{
ncci_mapping_bug++;
dbug(1, dprintf("NCCI mapping doesn't exist %ld %08lx %02x",
ncci_mapping_bug, Id, preserve_ncci));
}
else
{
cleanup_ncci_data(plci, ncci);
dbug(1, dprintf("NCCI mapping released %ld %08lx %02x %02x-%02x",
ncci_mapping_bug, Id, preserve_ncci, a->ncci_ch[ncci], ncci));
a->ch_ncci[a->ncci_ch[ncci]] = 0;
if (!preserve_ncci)
{
a->ncci_ch[ncci] = 0;
a->ncci_plci[ncci] = 0;
a->ncci_state[ncci] = IDLE;
i = plci->ncci_ring_list;
while ((i != 0) && (a->ncci_next[i] != plci->ncci_ring_list) && (a->ncci_next[i] != ncci))
i = a->ncci_next[i];
if ((i != 0) && (a->ncci_next[i] == ncci))
{
if (i == ncci)
plci->ncci_ring_list = 0;
else if (plci->ncci_ring_list == ncci)
plci->ncci_ring_list = i;
a->ncci_next[i] = a->ncci_next[ncci];
}
a->ncci_next[ncci] = 0;
}
}
}
else
{
for (ncci = 1; ncci < MAX_NCCI + 1; ncci++)
{
if (a->ncci_plci[ncci] == plci->Id)
{
cleanup_ncci_data(plci, ncci);
dbug(1, dprintf("NCCI mapping released %ld %08lx %02x %02x-%02x",
ncci_mapping_bug, Id, preserve_ncci, a->ncci_ch[ncci], ncci));
a->ch_ncci[a->ncci_ch[ncci]] = 0;
if (!preserve_ncci)
{
a->ncci_ch[ncci] = 0;
a->ncci_plci[ncci] = 0;
a->ncci_state[ncci] = IDLE;
a->ncci_next[ncci] = 0;
}
}
}
if (!preserve_ncci)
plci->ncci_ring_list = 0;
}
}
/*------------------------------------------------------------------*/
/* PLCI remove function */
/*------------------------------------------------------------------*/
static void plci_free_msg_in_queue(PLCI *plci)
{
word i;
if (plci->appl)
{
i = plci->msg_in_read_pos;
while (i != plci->msg_in_write_pos)
{
if (i == plci->msg_in_wrap_pos)
i = 0;
if (((CAPI_MSG *)(&((byte *)(plci->msg_in_queue))[i]))->header.command == _DATA_B3_R)
{
TransmitBufferFree(plci->appl,
(byte *)(long)(((CAPI_MSG *)(&((byte *)(plci->msg_in_queue))[i]))->info.data_b3_req.Data));
}
i += (((CAPI_MSG *)(&((byte *)(plci->msg_in_queue))[i]))->header.length +
MSG_IN_OVERHEAD + 3) & 0xfffc;
}
}
plci->msg_in_write_pos = MSG_IN_QUEUE_SIZE;
plci->msg_in_read_pos = MSG_IN_QUEUE_SIZE;
plci->msg_in_wrap_pos = MSG_IN_QUEUE_SIZE;
}
static void plci_remove(PLCI *plci)
{
if (!plci) {
dbug(1, dprintf("plci_remove(no plci)"));
return;
}
init_internal_command_queue(plci);
dbug(1, dprintf("plci_remove(%x,tel=%x)", plci->Id, plci->tel));
if (plci_remove_check(plci))
{
return;
}
if (plci->Sig.Id == 0xff)
{
dbug(1, dprintf("D-channel X.25 plci->NL.Id:%0x", plci->NL.Id));
if (plci->NL.Id && !plci->nl_remove_id)
{
nl_req_ncci(plci, REMOVE, 0);
send_req(plci);
}
}
else
{
if (!plci->sig_remove_id
&& (plci->Sig.Id
|| (plci->req_in != plci->req_out)
|| (plci->nl_req || plci->sig_req)))
{
sig_req(plci, HANGUP, 0);
send_req(plci);
}
}
ncci_remove(plci, 0, false);
plci_free_msg_in_queue(plci);
plci->channels = 0;
plci->appl = NULL;
if ((plci->State == INC_CON_PENDING) || (plci->State == INC_CON_ALERT))
plci->State = OUTG_DIS_PENDING;
}
/*------------------------------------------------------------------*/
/* Application Group function helpers */
/*------------------------------------------------------------------*/
static void set_group_ind_mask(PLCI *plci)
{
word i;
for (i = 0; i < C_IND_MASK_DWORDS; i++)
plci->group_optimization_mask_table[i] = 0xffffffffL;
}
static void clear_group_ind_mask_bit(PLCI *plci, word b)
{
plci->group_optimization_mask_table[b >> 5] &= ~(1L << (b & 0x1f));
}
static byte test_group_ind_mask_bit(PLCI *plci, word b)
{
return ((plci->group_optimization_mask_table[b >> 5] & (1L << (b & 0x1f))) != 0);
}
/*------------------------------------------------------------------*/
/* c_ind_mask operations for arbitrary MAX_APPL */
/*------------------------------------------------------------------*/
static void clear_c_ind_mask(PLCI *plci)
{
word i;
for (i = 0; i < C_IND_MASK_DWORDS; i++)
plci->c_ind_mask_table[i] = 0;
}
static byte c_ind_mask_empty(PLCI *plci)
{
word i;
i = 0;
while ((i < C_IND_MASK_DWORDS) && (plci->c_ind_mask_table[i] == 0))
i++;
return (i == C_IND_MASK_DWORDS);
}
static void set_c_ind_mask_bit(PLCI *plci, word b)
{
plci->c_ind_mask_table[b >> 5] |= (1L << (b & 0x1f));
}
static void clear_c_ind_mask_bit(PLCI *plci, word b)
{
plci->c_ind_mask_table[b >> 5] &= ~(1L << (b & 0x1f));
}
static byte test_c_ind_mask_bit(PLCI *plci, word b)
{
return ((plci->c_ind_mask_table[b >> 5] & (1L << (b & 0x1f))) != 0);
}
static void dump_c_ind_mask(PLCI *plci)
{
static char hex_digit_table[0x10] =
{'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'a', 'b', 'c', 'd', 'e', 'f'};
word i, j, k;
dword d;
char *p;
char buf[40];
for (i = 0; i < C_IND_MASK_DWORDS; i += 4)
{
p = buf + 36;
*p = '\0';
for (j = 0; j < 4; j++)
{
if (i + j < C_IND_MASK_DWORDS)
{
d = plci->c_ind_mask_table[i + j];
for (k = 0; k < 8; k++)
{
*(--p) = hex_digit_table[d & 0xf];
d >>= 4;
}
}
else if (i != 0)
{
for (k = 0; k < 8; k++)
*(--p) = ' ';
}
*(--p) = ' ';
}
dbug(1, dprintf("c_ind_mask =%s", (char *) p));
}
}
#define dump_plcis(a)
/*------------------------------------------------------------------*/
/* translation function for each message */
/*------------------------------------------------------------------*/
static byte connect_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *parms)
{
word ch;
word i;
word Info;
byte LinkLayer;
API_PARSE *ai;
API_PARSE *bp;
API_PARSE ai_parms[5];
word channel = 0;
dword ch_mask;
byte m;
static byte esc_chi[35] = {0x02, 0x18, 0x01};
static byte lli[2] = {0x01, 0x00};
byte noCh = 0;
word dir = 0;
byte *p_chi = "";
for (i = 0; i < 5; i++) ai_parms[i].length = 0;
dbug(1, dprintf("connect_req(%d)", parms->length));
Info = _WRONG_IDENTIFIER;
if (a)
{
if (a->adapter_disabled)
{
dbug(1, dprintf("adapter disabled"));
Id = ((word)1 << 8) | a->Id;
sendf(appl, _CONNECT_R | CONFIRM, Id, Number, "w", 0);
sendf(appl, _DISCONNECT_I, Id, 0, "w", _L1_ERROR);
return false;
}
Info = _OUT_OF_PLCI;
if ((i = get_plci(a)))
{
Info = 0;
plci = &a->plci[i - 1];
plci->appl = appl;
plci->call_dir = CALL_DIR_OUT | CALL_DIR_ORIGINATE;
/* check 'external controller' bit for codec support */
if (Id & EXT_CONTROLLER)
{
if (AdvCodecSupport(a, plci, appl, 0))
{
plci->Id = 0;
sendf(appl, _CONNECT_R | CONFIRM, Id, Number, "w", _WRONG_IDENTIFIER);
return 2;
}
}
ai = &parms[9];
bp = &parms[5];
ch = 0;
if (bp->length)LinkLayer = bp->info[3];
else LinkLayer = 0;
if (ai->length)
{
ch = 0xffff;
if (!api_parse(&ai->info[1], (word)ai->length, "ssss", ai_parms))
{
ch = 0;
if (ai_parms[0].length)
{
ch = GET_WORD(ai_parms[0].info + 1);
if (ch > 4) ch = 0; /* safety -> ignore ChannelID */
if (ch == 4) /* explizit CHI in message */
{
/* check length of B-CH struct */
if ((ai_parms[0].info)[3] >= 1)
{
if ((ai_parms[0].info)[4] == CHI)
{
p_chi = &((ai_parms[0].info)[5]);
}
else
{
p_chi = &((ai_parms[0].info)[3]);
}
if (p_chi[0] > 35) /* check length of channel ID */
{
Info = _WRONG_MESSAGE_FORMAT;
}
}
else Info = _WRONG_MESSAGE_FORMAT;
}
if (ch == 3 && ai_parms[0].length >= 7 && ai_parms[0].length <= 36)
{
dir = GET_WORD(ai_parms[0].info + 3);
ch_mask = 0;
m = 0x3f;
for (i = 0; i + 5 <= ai_parms[0].length; i++)
{
if (ai_parms[0].info[i + 5] != 0)
{
if ((ai_parms[0].info[i + 5] | m) != 0xff)
Info = _WRONG_MESSAGE_FORMAT;
else
{
if (ch_mask == 0)
channel = i;
ch_mask |= 1L << i;
}
}
m = 0;
}
if (ch_mask == 0)
Info = _WRONG_MESSAGE_FORMAT;
if (!Info)
{
if ((ai_parms[0].length == 36) || (ch_mask != ((dword)(1L << channel))))
{
esc_chi[0] = (byte)(ai_parms[0].length - 2);
for (i = 0; i + 5 <= ai_parms[0].length; i++)
esc_chi[i + 3] = ai_parms[0].info[i + 5];
}
else
esc_chi[0] = 2;
esc_chi[2] = (byte)channel;
plci->b_channel = (byte)channel; /* not correct for ETSI ch 17..31 */
add_p(plci, LLI, lli);
add_p(plci, ESC, esc_chi);
plci->State = LOCAL_CONNECT;
if (!dir) plci->call_dir |= CALL_DIR_FORCE_OUTG_NL; /* dir 0=DTE, 1=DCE */
}
}
}
}
else Info = _WRONG_MESSAGE_FORMAT;
}
dbug(1, dprintf("ch=%x,dir=%x,p_ch=%d", ch, dir, channel));
plci->command = _CONNECT_R;
plci->number = Number;
/* x.31 or D-ch free SAPI in LinkLayer? */
if (ch == 1 && LinkLayer != 3 && LinkLayer != 12) noCh = true;
if ((ch == 0 || ch == 2 || noCh || ch == 3 || ch == 4) && !Info)
{
/* B-channel used for B3 connections (ch==0), or no B channel */
/* is used (ch==2) or perm. connection (3) is used do a CALL */
if (noCh) Info = add_b1(plci, &parms[5], 2, 0); /* no resource */
else Info = add_b1(plci, &parms[5], ch, 0);
add_s(plci, OAD, &parms[2]);
add_s(plci, OSA, &parms[4]);
add_s(plci, BC, &parms[6]);
add_s(plci, LLC, &parms[7]);
add_s(plci, HLC, &parms[8]);
if (a->Info_Mask[appl->Id - 1] & 0x200)
{
/* early B3 connect (CIP mask bit 9) no release after a disc */
add_p(plci, LLI, "\x01\x01");
}
if (GET_WORD(parms[0].info) < 29) {
add_p(plci, BC, cip_bc[GET_WORD(parms[0].info)][a->u_law]);
add_p(plci, HLC, cip_hlc[GET_WORD(parms[0].info)]);
}
add_p(plci, UID, "\x06\x43\x61\x70\x69\x32\x30");
sig_req(plci, ASSIGN, DSIG_ID);
}
else if (ch == 1) {
/* D-Channel used for B3 connections */
plci->Sig.Id = 0xff;
Info = 0;
}
if (!Info && ch != 2 && !noCh) {
Info = add_b23(plci, &parms[5]);
if (!Info) {
if (!(plci->tel && !plci->adv_nl))nl_req_ncci(plci, ASSIGN, 0);
}
}
if (!Info)
{
if (ch == 0 || ch == 2 || ch == 3 || noCh || ch == 4)
{
if (plci->spoofed_msg == SPOOFING_REQUIRED)
{
api_save_msg(parms, "wsssssssss", &plci->saved_msg);
plci->spoofed_msg = CALL_REQ;
plci->internal_command = BLOCK_PLCI;
plci->command = 0;
dbug(1, dprintf("Spoof"));
send_req(plci);
return false;
}
if (ch == 4)add_p(plci, CHI, p_chi);
add_s(plci, CPN, &parms[1]);
add_s(plci, DSA, &parms[3]);
if (noCh) add_p(plci, ESC, "\x02\x18\xfd"); /* D-channel, no B-L3 */
add_ai(plci, &parms[9]);
if (!dir)sig_req(plci, CALL_REQ, 0);
else
{
plci->command = PERM_LIST_REQ;
plci->appl = appl;
sig_req(plci, LISTEN_REQ, 0);
send_req(plci);
return false;
}
}
send_req(plci);
return false;
}
plci->Id = 0;
}
}
sendf(appl,
_CONNECT_R | CONFIRM,
Id,
Number,
"w", Info);
return 2;
}
static byte connect_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *parms)
{
word i, Info;
word Reject;
static byte cau_t[] = {0, 0, 0x90, 0x91, 0xac, 0x9d, 0x86, 0xd8, 0x9b};
static byte esc_t[] = {0x03, 0x08, 0x00, 0x00};
API_PARSE *ai;
API_PARSE ai_parms[5];
word ch = 0;
if (!plci) {
dbug(1, dprintf("connect_res(no plci)"));
return 0; /* no plci, no send */
}
dbug(1, dprintf("connect_res(State=0x%x)", plci->State));
for (i = 0; i < 5; i++) ai_parms[i].length = 0;
ai = &parms[5];
dbug(1, dprintf("ai->length=%d", ai->length));
if (ai->length)
{
if (!api_parse(&ai->info[1], (word)ai->length, "ssss", ai_parms))
{
dbug(1, dprintf("ai_parms[0].length=%d/0x%x", ai_parms[0].length, GET_WORD(ai_parms[0].info + 1)));
ch = 0;
if (ai_parms[0].length)
{
ch = GET_WORD(ai_parms[0].info + 1);
dbug(1, dprintf("BCH-I=0x%x", ch));
}
}
}
if (plci->State == INC_CON_CONNECTED_ALERT)
{
dbug(1, dprintf("Connected Alert Call_Res"));
if (a->Info_Mask[appl->Id - 1] & 0x200)
{
/* early B3 connect (CIP mask bit 9) no release after a disc */
add_p(plci, LLI, "\x01\x01");
}
add_s(plci, CONN_NR, &parms[2]);
add_s(plci, LLC, &parms[4]);
add_ai(plci, &parms[5]);
plci->State = INC_CON_ACCEPT;
sig_req(plci, CALL_RES, 0);
return 1;
}
else if (plci->State == INC_CON_PENDING || plci->State == INC_CON_ALERT) {
clear_c_ind_mask_bit(plci, (word)(appl->Id - 1));
dump_c_ind_mask(plci);
Reject = GET_WORD(parms[0].info);
dbug(1, dprintf("Reject=0x%x", Reject));
if (Reject)
{
if (c_ind_mask_empty(plci))
{
if ((Reject & 0xff00) == 0x3400)
{
esc_t[2] = ((byte)(Reject & 0x00ff)) | 0x80;
add_p(plci, ESC, esc_t);
add_ai(plci, &parms[5]);
sig_req(plci, REJECT, 0);
}
else if (Reject == 1 || Reject > 9)
{
add_ai(plci, &parms[5]);
sig_req(plci, HANGUP, 0);
}
else
{
esc_t[2] = cau_t[(Reject&0x000f)];
add_p(plci, ESC, esc_t);
add_ai(plci, &parms[5]);
sig_req(plci, REJECT, 0);
}
plci->appl = appl;
}
else
{
sendf(appl, _DISCONNECT_I, Id, 0, "w", _OTHER_APPL_CONNECTED);
}
}
else {
plci->appl = appl;
if (Id & EXT_CONTROLLER) {
if (AdvCodecSupport(a, plci, appl, 0)) {
dbug(1, dprintf("connect_res(error from AdvCodecSupport)"));
sig_req(plci, HANGUP, 0);
return 1;
}
if (plci->tel == ADV_VOICE && a->AdvCodecPLCI)
{
Info = add_b23(plci, &parms[1]);
if (Info)
{
dbug(1, dprintf("connect_res(error from add_b23)"));
sig_req(plci, HANGUP, 0);
return 1;
}
if (plci->adv_nl)
{
nl_req_ncci(plci, ASSIGN, 0);
}
}
}
else
{
plci->tel = 0;
if (ch != 2)
{
Info = add_b23(plci, &parms[1]);
if (Info)
{
dbug(1, dprintf("connect_res(error from add_b23 2)"));
sig_req(plci, HANGUP, 0);
return 1;
}
}
nl_req_ncci(plci, ASSIGN, 0);
}
if (plci->spoofed_msg == SPOOFING_REQUIRED)
{
api_save_msg(parms, "wsssss", &plci->saved_msg);
plci->spoofed_msg = CALL_RES;
plci->internal_command = BLOCK_PLCI;
plci->command = 0;
dbug(1, dprintf("Spoof"));
}
else
{
add_b1(plci, &parms[1], ch, plci->B1_facilities);
if (a->Info_Mask[appl->Id - 1] & 0x200)
{
/* early B3 connect (CIP mask bit 9) no release after a disc */
add_p(plci, LLI, "\x01\x01");
}
add_s(plci, CONN_NR, &parms[2]);
add_s(plci, LLC, &parms[4]);
add_ai(plci, &parms[5]);
plci->State = INC_CON_ACCEPT;
sig_req(plci, CALL_RES, 0);
}
for (i = 0; i < max_appl; i++) {
if (test_c_ind_mask_bit(plci, i)) {
sendf(&application[i], _DISCONNECT_I, Id, 0, "w", _OTHER_APPL_CONNECTED);
}
}
}
}
return 1;
}
static byte connect_a_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *msg)
{
dbug(1, dprintf("connect_a_res"));
return false;
}
static byte disconnect_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *msg)
{
word Info;
word i;
dbug(1, dprintf("disconnect_req"));
Info = _WRONG_IDENTIFIER;
if (plci)
{
if (plci->State == INC_CON_PENDING || plci->State == INC_CON_ALERT)
{
clear_c_ind_mask_bit(plci, (word)(appl->Id - 1));
plci->appl = appl;
for (i = 0; i < max_appl; i++)
{
if (test_c_ind_mask_bit(plci, i))
sendf(&application[i], _DISCONNECT_I, Id, 0, "w", 0);
}
plci->State = OUTG_DIS_PENDING;
}
if (plci->Sig.Id && plci->appl)
{
Info = 0;
if (plci->Sig.Id != 0xff)
{
if (plci->State != INC_DIS_PENDING)
{
add_ai(plci, &msg[0]);
sig_req(plci, HANGUP, 0);
plci->State = OUTG_DIS_PENDING;
return 1;
}
}
else
{
if (plci->NL.Id && !plci->nl_remove_id)
{
mixer_remove(plci);
nl_req_ncci(plci, REMOVE, 0);
sendf(appl, _DISCONNECT_R | CONFIRM, Id, Number, "w", 0);
sendf(appl, _DISCONNECT_I, Id, 0, "w", 0);
plci->State = INC_DIS_PENDING;
}
return 1;
}
}
}
if (!appl) return false;
sendf(appl, _DISCONNECT_R | CONFIRM, Id, Number, "w", Info);
return false;
}
static byte disconnect_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *msg)
{
dbug(1, dprintf("disconnect_res"));
if (plci)
{
/* clear ind mask bit, just in case of collsion of */
/* DISCONNECT_IND and CONNECT_RES */
clear_c_ind_mask_bit(plci, (word)(appl->Id - 1));
ncci_free_receive_buffers(plci, 0);
if (plci_remove_check(plci))
{
return 0;
}
if (plci->State == INC_DIS_PENDING
|| plci->State == SUSPENDING) {
if (c_ind_mask_empty(plci)) {
if (plci->State != SUSPENDING) plci->State = IDLE;
dbug(1, dprintf("chs=%d", plci->channels));
if (!plci->channels) {
plci_remove(plci);
}
}
}
}
return 0;
}
static byte listen_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *parms)
{
word Info;
byte i;
dbug(1, dprintf("listen_req(Appl=0x%x)", appl->Id));
Info = _WRONG_IDENTIFIER;
if (a) {
Info = 0;
a->Info_Mask[appl->Id - 1] = GET_DWORD(parms[0].info);
a->CIP_Mask[appl->Id - 1] = GET_DWORD(parms[1].info);
dbug(1, dprintf("CIP_MASK=0x%lx", GET_DWORD(parms[1].info)));
if (a->Info_Mask[appl->Id - 1] & 0x200) { /* early B3 connect provides */
a->Info_Mask[appl->Id - 1] |= 0x10; /* call progression infos */
}
/* check if external controller listen and switch listen on or off*/
if (Id&EXT_CONTROLLER && GET_DWORD(parms[1].info)) {
if (a->profile.Global_Options & ON_BOARD_CODEC) {
dummy_plci.State = IDLE;
a->codec_listen[appl->Id - 1] = &dummy_plci;
a->TelOAD[0] = (byte)(parms[3].length);
for (i = 1; parms[3].length >= i && i < 22; i++) {
a->TelOAD[i] = parms[3].info[i];
}
a->TelOAD[i] = 0;
a->TelOSA[0] = (byte)(parms[4].length);
for (i = 1; parms[4].length >= i && i < 22; i++) {
a->TelOSA[i] = parms[4].info[i];
}
a->TelOSA[i] = 0;
}
else Info = 0x2002; /* wrong controller, codec not supported */
}
else{ /* clear listen */
a->codec_listen[appl->Id - 1] = (PLCI *)0;
}
}
sendf(appl,
_LISTEN_R | CONFIRM,
Id,
Number,
"w", Info);
if (a) listen_check(a);
return false;
}
static byte info_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *msg)
{
word i;
API_PARSE *ai;
PLCI *rc_plci = NULL;
API_PARSE ai_parms[5];
word Info = 0;
dbug(1, dprintf("info_req"));
for (i = 0; i < 5; i++) ai_parms[i].length = 0;
ai = &msg[1];
if (ai->length)
{
if (api_parse(&ai->info[1], (word)ai->length, "ssss", ai_parms))
{
dbug(1, dprintf("AddInfo wrong"));
Info = _WRONG_MESSAGE_FORMAT;
}
}
if (!a) Info = _WRONG_STATE;
if (!Info && plci)
{ /* no fac, with CPN, or KEY */
rc_plci = plci;
if (!ai_parms[3].length && plci->State && (msg[0].length || ai_parms[1].length))
{
/* overlap sending option */
dbug(1, dprintf("OvlSnd"));
add_s(plci, CPN, &msg[0]);
add_s(plci, KEY, &ai_parms[1]);
sig_req(plci, INFO_REQ, 0);
send_req(plci);
return false;
}
if (plci->State && ai_parms[2].length)
{
/* User_Info option */
dbug(1, dprintf("UUI"));
add_s(plci, UUI, &ai_parms[2]);
sig_req(plci, USER_DATA, 0);
}
else if (plci->State && ai_parms[3].length)
{
/* Facility option */
dbug(1, dprintf("FAC"));
add_s(plci, CPN, &msg[0]);
add_ai(plci, &msg[1]);
sig_req(plci, FACILITY_REQ, 0);
}
else
{
Info = _WRONG_STATE;
}
}
else if ((ai_parms[1].length || ai_parms[2].length || ai_parms[3].length) && !Info)
{
/* NCR_Facility option -> send UUI and Keypad too */
dbug(1, dprintf("NCR_FAC"));
if ((i = get_plci(a)))
{
rc_plci = &a->plci[i - 1];
appl->NullCREnable = true;
rc_plci->internal_command = C_NCR_FAC_REQ;
rc_plci->appl = appl;
add_p(rc_plci, CAI, "\x01\x80");
add_p(rc_plci, UID, "\x06\x43\x61\x70\x69\x32\x30");
sig_req(rc_plci, ASSIGN, DSIG_ID);
send_req(rc_plci);
}
else
{
Info = _OUT_OF_PLCI;
}
if (!Info)
{
add_s(rc_plci, CPN, &msg[0]);
add_ai(rc_plci, &msg[1]);
sig_req(rc_plci, NCR_FACILITY, 0);
send_req(rc_plci);
return false;
/* for application controlled supplementary services */
}
}
if (!rc_plci)
{
Info = _WRONG_MESSAGE_FORMAT;
}
if (!Info)
{
send_req(rc_plci);
}
else
{ /* appl is not assigned to a PLCI or error condition */
dbug(1, dprintf("localInfoCon"));
sendf(appl,
_INFO_R | CONFIRM,
Id,
Number,
"w", Info);
}
return false;
}
static byte info_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *msg)
{
dbug(1, dprintf("info_res"));
return false;
}
static byte alert_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *msg)
{
word Info;
byte ret;
dbug(1, dprintf("alert_req"));
Info = _WRONG_IDENTIFIER;
ret = false;
if (plci) {
Info = _ALERT_IGNORED;
if (plci->State != INC_CON_ALERT) {
Info = _WRONG_STATE;
if (plci->State == INC_CON_PENDING) {
Info = 0;
plci->State = INC_CON_ALERT;
add_ai(plci, &msg[0]);
sig_req(plci, CALL_ALERT, 0);
ret = 1;
}
}
}
sendf(appl,
_ALERT_R | CONFIRM,
Id,
Number,
"w", Info);
return ret;
}
static byte facility_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *msg)
{
word Info = 0;
word i = 0;
word selector;
word SSreq;
long relatedPLCIvalue;
DIVA_CAPI_ADAPTER *relatedadapter;
byte *SSparms = "";
byte RCparms[] = "\x05\x00\x00\x02\x00\x00";
byte SSstruct[] = "\x09\x00\x00\x06\x00\x00\x00\x00\x00\x00";
API_PARSE *parms;
API_PARSE ss_parms[11];
PLCI *rplci;
byte cai[15];
dword d;
API_PARSE dummy;
dbug(1, dprintf("facility_req"));
for (i = 0; i < 9; i++) ss_parms[i].length = 0;
parms = &msg[1];
if (!a)
{
dbug(1, dprintf("wrong Ctrl"));
Info = _WRONG_IDENTIFIER;
}
selector = GET_WORD(msg[0].info);
if (!Info)
{
switch (selector)
{
case SELECTOR_HANDSET:
Info = AdvCodecSupport(a, plci, appl, HOOK_SUPPORT);
break;
case SELECTOR_SU_SERV:
if (!msg[1].length)
{
Info = _WRONG_MESSAGE_FORMAT;
break;
}
SSreq = GET_WORD(&(msg[1].info[1]));
PUT_WORD(&RCparms[1], SSreq);
SSparms = RCparms;
switch (SSreq)
{
case S_GET_SUPPORTED_SERVICES:
if ((i = get_plci(a)))
{
rplci = &a->plci[i - 1];
rplci->appl = appl;
add_p(rplci, CAI, "\x01\x80");
add_p(rplci, UID, "\x06\x43\x61\x70\x69\x32\x30");
sig_req(rplci, ASSIGN, DSIG_ID);
send_req(rplci);
}
else
{
PUT_DWORD(&SSstruct[6], MASK_TERMINAL_PORTABILITY);
SSparms = (byte *)SSstruct;
break;
}
rplci->internal_command = GETSERV_REQ_PEND;
rplci->number = Number;
rplci->appl = appl;
sig_req(rplci, S_SUPPORTED, 0);
send_req(rplci);
return false;
break;
case S_LISTEN:
if (parms->length == 7)
{
if (api_parse(&parms->info[1], (word)parms->length, "wbd", ss_parms))
{
dbug(1, dprintf("format wrong"));
Info = _WRONG_MESSAGE_FORMAT;
break;
}
}
else
{
Info = _WRONG_MESSAGE_FORMAT;
break;
}
a->Notification_Mask[appl->Id - 1] = GET_DWORD(ss_parms[2].info);
if (a->Notification_Mask[appl->Id - 1] & SMASK_MWI) /* MWI active? */
{
if ((i = get_plci(a)))
{
rplci = &a->plci[i - 1];
rplci->appl = appl;
add_p(rplci, CAI, "\x01\x80");
add_p(rplci, UID, "\x06\x43\x61\x70\x69\x32\x30");
sig_req(rplci, ASSIGN, DSIG_ID);
send_req(rplci);
}
else
{
break;
}
rplci->internal_command = GET_MWI_STATE;
rplci->number = Number;
sig_req(rplci, MWI_POLL, 0);
send_req(rplci);
}
break;
case S_HOLD:
api_parse(&parms->info[1], (word)parms->length, "ws", ss_parms);
if (plci && plci->State && plci->SuppState == IDLE)
{
plci->SuppState = HOLD_REQUEST;
plci->command = C_HOLD_REQ;
add_s(plci, CAI, &ss_parms[1]);
sig_req(plci, CALL_HOLD, 0);
send_req(plci);
return false;
}
else Info = 0x3010; /* wrong state */
break;
case S_RETRIEVE:
if (plci && plci->State && plci->SuppState == CALL_HELD)
{
if (Id & EXT_CONTROLLER)
{
if (AdvCodecSupport(a, plci, appl, 0))
{
Info = 0x3010; /* wrong state */
break;
}
}
else plci->tel = 0;
plci->SuppState = RETRIEVE_REQUEST;
plci->command = C_RETRIEVE_REQ;
if (plci->spoofed_msg == SPOOFING_REQUIRED)
{
plci->spoofed_msg = CALL_RETRIEVE;
plci->internal_command = BLOCK_PLCI;
plci->command = 0;
dbug(1, dprintf("Spoof"));
return false;
}
else
{
sig_req(plci, CALL_RETRIEVE, 0);
send_req(plci);
return false;
}
}
else Info = 0x3010; /* wrong state */
break;
case S_SUSPEND:
if (parms->length)
{
if (api_parse(&parms->info[1], (word)parms->length, "wbs", ss_parms))
{
dbug(1, dprintf("format wrong"));
Info = _WRONG_MESSAGE_FORMAT;
break;
}
}
if (plci && plci->State)
{
add_s(plci, CAI, &ss_parms[2]);
plci->command = SUSPEND_REQ;
sig_req(plci, SUSPEND, 0);
plci->State = SUSPENDING;
send_req(plci);
}
else Info = 0x3010; /* wrong state */
break;
case S_RESUME:
if (!(i = get_plci(a)))
{
Info = _OUT_OF_PLCI;
break;
}
rplci = &a->plci[i - 1];
rplci->appl = appl;
rplci->number = Number;
rplci->tel = 0;
rplci->call_dir = CALL_DIR_OUT | CALL_DIR_ORIGINATE;
/* check 'external controller' bit for codec support */
if (Id & EXT_CONTROLLER)
{
if (AdvCodecSupport(a, rplci, appl, 0))
{
rplci->Id = 0;
Info = 0x300A;
break;
}
}
if (parms->length)
{
if (api_parse(&parms->info[1], (word)parms->length, "wbs", ss_parms))
{
dbug(1, dprintf("format wrong"));
rplci->Id = 0;
Info = _WRONG_MESSAGE_FORMAT;
break;
}
}
dummy.length = 0;
dummy.info = "\x00";
add_b1(rplci, &dummy, 0, 0);
if (a->Info_Mask[appl->Id - 1] & 0x200)
{
/* early B3 connect (CIP mask bit 9) no release after a disc */
add_p(rplci, LLI, "\x01\x01");
}
add_p(rplci, UID, "\x06\x43\x61\x70\x69\x32\x30");
sig_req(rplci, ASSIGN, DSIG_ID);
send_req(rplci);
add_s(rplci, CAI, &ss_parms[2]);
rplci->command = RESUME_REQ;
sig_req(rplci, RESUME, 0);
rplci->State = RESUMING;
send_req(rplci);
break;
case S_CONF_BEGIN: /* Request */
case S_CONF_DROP:
case S_CONF_ISOLATE:
case S_CONF_REATTACH:
if (api_parse(&parms->info[1], (word)parms->length, "wbd", ss_parms))
{
dbug(1, dprintf("format wrong"));
Info = _WRONG_MESSAGE_FORMAT;
break;
}
if (plci && plci->State && ((plci->SuppState == IDLE) || (plci->SuppState == CALL_HELD)))
{
d = GET_DWORD(ss_parms[2].info);
if (d >= 0x80)
{
dbug(1, dprintf("format wrong"));
Info = _WRONG_MESSAGE_FORMAT;
break;
}
plci->ptyState = (byte)SSreq;
plci->command = 0;
cai[0] = 2;
switch (SSreq)
{
case S_CONF_BEGIN:
cai[1] = CONF_BEGIN;
plci->internal_command = CONF_BEGIN_REQ_PEND;
break;
case S_CONF_DROP:
cai[1] = CONF_DROP;
plci->internal_command = CONF_DROP_REQ_PEND;
break;
case S_CONF_ISOLATE:
cai[1] = CONF_ISOLATE;
plci->internal_command = CONF_ISOLATE_REQ_PEND;
break;
case S_CONF_REATTACH:
cai[1] = CONF_REATTACH;
plci->internal_command = CONF_REATTACH_REQ_PEND;
break;
}
cai[2] = (byte)d; /* Conference Size resp. PartyId */
add_p(plci, CAI, cai);
sig_req(plci, S_SERVICE, 0);
send_req(plci);
return false;
}
else Info = 0x3010; /* wrong state */
break;
case S_ECT:
case S_3PTY_BEGIN:
case S_3PTY_END:
case S_CONF_ADD:
if (parms->length == 7)
{
if (api_parse(&parms->info[1], (word)parms->length, "wbd", ss_parms))
{
dbug(1, dprintf("format wrong"));
Info = _WRONG_MESSAGE_FORMAT;
break;
}
}
else if (parms->length == 8) /* workaround for the T-View-S */
{
if (api_parse(&parms->info[1], (word)parms->length, "wbdb", ss_parms))
{
dbug(1, dprintf("format wrong"));
Info = _WRONG_MESSAGE_FORMAT;
break;
}
}
else
{
Info = _WRONG_MESSAGE_FORMAT;
break;
}
if (!msg[1].length)
{
Info = _WRONG_MESSAGE_FORMAT;
break;
}
if (!plci)
{
Info = _WRONG_IDENTIFIER;
break;
}
relatedPLCIvalue = GET_DWORD(ss_parms[2].info);
relatedPLCIvalue &= 0x0000FFFF;
dbug(1, dprintf("PTY/ECT/addCONF,relPLCI=%lx", relatedPLCIvalue));
/* controller starts with 0 up to (max_adapter - 1) */
if (((relatedPLCIvalue & 0x7f) == 0)
|| (MapController((byte)(relatedPLCIvalue & 0x7f)) == 0)
|| (MapController((byte)(relatedPLCIvalue & 0x7f)) > max_adapter))
{
if (SSreq == S_3PTY_END)
{
dbug(1, dprintf("wrong Controller use 2nd PLCI=PLCI"));
rplci = plci;
}
else
{
Info = 0x3010; /* wrong state */
break;
}
}
else
{
relatedadapter = &adapter[MapController((byte)(relatedPLCIvalue & 0x7f)) - 1];
relatedPLCIvalue >>= 8;
/* find PLCI PTR*/
for (i = 0, rplci = NULL; i < relatedadapter->max_plci; i++)
{
if (relatedadapter->plci[i].Id == (byte)relatedPLCIvalue)
{
rplci = &relatedadapter->plci[i];
}
}
if (!rplci || !relatedPLCIvalue)
{
if (SSreq == S_3PTY_END)
{
dbug(1, dprintf("use 2nd PLCI=PLCI"));
rplci = plci;
}
else
{
Info = 0x3010; /* wrong state */
break;
}
}
}
/*
dbug(1, dprintf("rplci:%x", rplci));
dbug(1, dprintf("plci:%x", plci));
dbug(1, dprintf("rplci->ptyState:%x", rplci->ptyState));
dbug(1, dprintf("plci->ptyState:%x", plci->ptyState));
dbug(1, dprintf("SSreq:%x", SSreq));
dbug(1, dprintf("rplci->internal_command:%x", rplci->internal_command));
dbug(1, dprintf("rplci->appl:%x", rplci->appl));
dbug(1, dprintf("rplci->Id:%x", rplci->Id));
*/
/* send PTY/ECT req, cannot check all states because of US stuff */
if (!rplci->internal_command && rplci->appl)
{
plci->command = 0;
rplci->relatedPTYPLCI = plci;
plci->relatedPTYPLCI = rplci;
rplci->ptyState = (byte)SSreq;
if (SSreq == S_ECT)
{
rplci->internal_command = ECT_REQ_PEND;
cai[1] = ECT_EXECUTE;
rplci->vswitchstate = 0;
rplci->vsprot = 0;
rplci->vsprotdialect = 0;
plci->vswitchstate = 0;
plci->vsprot = 0;
plci->vsprotdialect = 0;
}
else if (SSreq == S_CONF_ADD)
{
rplci->internal_command = CONF_ADD_REQ_PEND;
cai[1] = CONF_ADD;
}
else
{
rplci->internal_command = PTY_REQ_PEND;
cai[1] = (byte)(SSreq - 3);
}
rplci->number = Number;
if (plci != rplci) /* explicit invocation */
{
cai[0] = 2;
cai[2] = plci->Sig.Id;
dbug(1, dprintf("explicit invocation"));
}
else
{
dbug(1, dprintf("implicit invocation"));
cai[0] = 1;
}
add_p(rplci, CAI, cai);
sig_req(rplci, S_SERVICE, 0);
send_req(rplci);
return false;
}
else
{
dbug(0, dprintf("Wrong line"));
Info = 0x3010; /* wrong state */
break;
}
break;
case S_CALL_DEFLECTION:
if (api_parse(&parms->info[1], (word)parms->length, "wbwss", ss_parms))
{
dbug(1, dprintf("format wrong"));
Info = _WRONG_MESSAGE_FORMAT;
break;
}
if (!plci)
{
Info = _WRONG_IDENTIFIER;
break;
}
/* reuse unused screening indicator */
ss_parms[3].info[3] = (byte)GET_WORD(&(ss_parms[2].info[0]));
plci->command = 0;
plci->internal_command = CD_REQ_PEND;
appl->CDEnable = true;
cai[0] = 1;
cai[1] = CALL_DEFLECTION;
add_p(plci, CAI, cai);
add_p(plci, CPN, ss_parms[3].info);
sig_req(plci, S_SERVICE, 0);
send_req(plci);
return false;
break;
case S_CALL_FORWARDING_START:
if (api_parse(&parms->info[1], (word)parms->length, "wbdwwsss", ss_parms))
{
dbug(1, dprintf("format wrong"));
Info = _WRONG_MESSAGE_FORMAT;
break;
}
if ((i = get_plci(a)))
{
rplci = &a->plci[i - 1];
rplci->appl = appl;
add_p(rplci, CAI, "\x01\x80");
add_p(rplci, UID, "\x06\x43\x61\x70\x69\x32\x30");
sig_req(rplci, ASSIGN, DSIG_ID);
send_req(rplci);
}
else
{
Info = _OUT_OF_PLCI;
break;
}
/* reuse unused screening indicator */
rplci->internal_command = CF_START_PEND;
rplci->appl = appl;
rplci->number = Number;
appl->S_Handle = GET_DWORD(&(ss_parms[2].info[0]));
cai[0] = 2;
cai[1] = 0x70 | (byte)GET_WORD(&(ss_parms[3].info[0])); /* Function */
cai[2] = (byte)GET_WORD(&(ss_parms[4].info[0])); /* Basic Service */
add_p(rplci, CAI, cai);
add_p(rplci, OAD, ss_parms[5].info);
add_p(rplci, CPN, ss_parms[6].info);
sig_req(rplci, S_SERVICE, 0);
send_req(rplci);
return false;
break;
case S_INTERROGATE_DIVERSION:
case S_INTERROGATE_NUMBERS:
case S_CALL_FORWARDING_STOP:
case S_CCBS_REQUEST:
case S_CCBS_DEACTIVATE:
case S_CCBS_INTERROGATE:
switch (SSreq)
{
case S_INTERROGATE_NUMBERS:
if (api_parse(&parms->info[1], (word)parms->length, "wbd", ss_parms))
{
dbug(0, dprintf("format wrong"));
Info = _WRONG_MESSAGE_FORMAT;
}
break;
case S_CCBS_REQUEST:
case S_CCBS_DEACTIVATE:
if (api_parse(&parms->info[1], (word)parms->length, "wbdw", ss_parms))
{
dbug(0, dprintf("format wrong"));
Info = _WRONG_MESSAGE_FORMAT;
}
break;
case S_CCBS_INTERROGATE:
if (api_parse(&parms->info[1], (word)parms->length, "wbdws", ss_parms))
{
dbug(0, dprintf("format wrong"));
Info = _WRONG_MESSAGE_FORMAT;
}
break;
default:
if (api_parse(&parms->info[1], (word)parms->length, "wbdwws", ss_parms))
{
dbug(0, dprintf("format wrong"));
Info = _WRONG_MESSAGE_FORMAT;
break;
}
break;
}
if (Info) break;
if ((i = get_plci(a)))
{
rplci = &a->plci[i - 1];
switch (SSreq)
{
case S_INTERROGATE_DIVERSION: /* use cai with S_SERVICE below */
cai[1] = 0x60 | (byte)GET_WORD(&(ss_parms[3].info[0])); /* Function */
rplci->internal_command = INTERR_DIVERSION_REQ_PEND; /* move to rplci if assigned */
break;
case S_INTERROGATE_NUMBERS: /* use cai with S_SERVICE below */
cai[1] = DIVERSION_INTERROGATE_NUM; /* Function */
rplci->internal_command = INTERR_NUMBERS_REQ_PEND; /* move to rplci if assigned */
break;
case S_CALL_FORWARDING_STOP:
rplci->internal_command = CF_STOP_PEND;
cai[1] = 0x80 | (byte)GET_WORD(&(ss_parms[3].info[0])); /* Function */
break;
case S_CCBS_REQUEST:
cai[1] = CCBS_REQUEST;
rplci->internal_command = CCBS_REQUEST_REQ_PEND;
break;
case S_CCBS_DEACTIVATE:
cai[1] = CCBS_DEACTIVATE;
rplci->internal_command = CCBS_DEACTIVATE_REQ_PEND;
break;
case S_CCBS_INTERROGATE:
cai[1] = CCBS_INTERROGATE;
rplci->internal_command = CCBS_INTERROGATE_REQ_PEND;
break;
default:
cai[1] = 0;
break;
}
rplci->appl = appl;
rplci->number = Number;
add_p(rplci, CAI, "\x01\x80");
add_p(rplci, UID, "\x06\x43\x61\x70\x69\x32\x30");
sig_req(rplci, ASSIGN, DSIG_ID);
send_req(rplci);
}
else
{
Info = _OUT_OF_PLCI;
break;
}
appl->S_Handle = GET_DWORD(&(ss_parms[2].info[0]));
switch (SSreq)
{
case S_INTERROGATE_NUMBERS:
cai[0] = 1;
add_p(rplci, CAI, cai);
break;
case S_CCBS_REQUEST:
case S_CCBS_DEACTIVATE:
cai[0] = 3;
PUT_WORD(&cai[2], GET_WORD(&(ss_parms[3].info[0])));
add_p(rplci, CAI, cai);
break;
case S_CCBS_INTERROGATE:
cai[0] = 3;
PUT_WORD(&cai[2], GET_WORD(&(ss_parms[3].info[0])));
add_p(rplci, CAI, cai);
add_p(rplci, OAD, ss_parms[4].info);
break;
default:
cai[0] = 2;
cai[2] = (byte)GET_WORD(&(ss_parms[4].info[0])); /* Basic Service */
add_p(rplci, CAI, cai);
add_p(rplci, OAD, ss_parms[5].info);
break;
}
sig_req(rplci, S_SERVICE, 0);
send_req(rplci);
return false;
break;
case S_MWI_ACTIVATE:
if (api_parse(&parms->info[1], (word)parms->length, "wbwdwwwssss", ss_parms))
{
dbug(1, dprintf("format wrong"));
Info = _WRONG_MESSAGE_FORMAT;
break;
}
if (!plci)
{
if ((i = get_plci(a)))
{
rplci = &a->plci[i - 1];
rplci->appl = appl;
rplci->cr_enquiry = true;
add_p(rplci, CAI, "\x01\x80");
add_p(rplci, UID, "\x06\x43\x61\x70\x69\x32\x30");
sig_req(rplci, ASSIGN, DSIG_ID);
send_req(rplci);
}
else
{
Info = _OUT_OF_PLCI;
break;
}
}
else
{
rplci = plci;
rplci->cr_enquiry = false;
}
rplci->command = 0;
rplci->internal_command = MWI_ACTIVATE_REQ_PEND;
rplci->appl = appl;
rplci->number = Number;
cai[0] = 13;
cai[1] = ACTIVATION_MWI; /* Function */
PUT_WORD(&cai[2], GET_WORD(&(ss_parms[2].info[0]))); /* Basic Service */
PUT_DWORD(&cai[4], GET_DWORD(&(ss_parms[3].info[0]))); /* Number of Messages */
PUT_WORD(&cai[8], GET_WORD(&(ss_parms[4].info[0]))); /* Message Status */
PUT_WORD(&cai[10], GET_WORD(&(ss_parms[5].info[0]))); /* Message Reference */
PUT_WORD(&cai[12], GET_WORD(&(ss_parms[6].info[0]))); /* Invocation Mode */
add_p(rplci, CAI, cai);
add_p(rplci, CPN, ss_parms[7].info); /* Receiving User Number */
add_p(rplci, OAD, ss_parms[8].info); /* Controlling User Number */
add_p(rplci, OSA, ss_parms[9].info); /* Controlling User Provided Number */
add_p(rplci, UID, ss_parms[10].info); /* Time */
sig_req(rplci, S_SERVICE, 0);
send_req(rplci);
return false;
case S_MWI_DEACTIVATE:
if (api_parse(&parms->info[1], (word)parms->length, "wbwwss", ss_parms))
{
dbug(1, dprintf("format wrong"));
Info = _WRONG_MESSAGE_FORMAT;
break;
}
if (!plci)
{
if ((i = get_plci(a)))
{
rplci = &a->plci[i - 1];
rplci->appl = appl;
rplci->cr_enquiry = true;
add_p(rplci, CAI, "\x01\x80");
add_p(rplci, UID, "\x06\x43\x61\x70\x69\x32\x30");
sig_req(rplci, ASSIGN, DSIG_ID);
send_req(rplci);
}
else
{
Info = _OUT_OF_PLCI;
break;
}
}
else
{
rplci = plci;
rplci->cr_enquiry = false;
}
rplci->command = 0;
rplci->internal_command = MWI_DEACTIVATE_REQ_PEND;
rplci->appl = appl;
rplci->number = Number;
cai[0] = 5;
cai[1] = DEACTIVATION_MWI; /* Function */
PUT_WORD(&cai[2], GET_WORD(&(ss_parms[2].info[0]))); /* Basic Service */
PUT_WORD(&cai[4], GET_WORD(&(ss_parms[3].info[0]))); /* Invocation Mode */
add_p(rplci, CAI, cai);
add_p(rplci, CPN, ss_parms[4].info); /* Receiving User Number */
add_p(rplci, OAD, ss_parms[5].info); /* Controlling User Number */
sig_req(rplci, S_SERVICE, 0);
send_req(rplci);
return false;
default:
Info = 0x300E; /* not supported */
break;
}
break; /* case SELECTOR_SU_SERV: end */
case SELECTOR_DTMF:
return (dtmf_request(Id, Number, a, plci, appl, msg));
case SELECTOR_LINE_INTERCONNECT:
return (mixer_request(Id, Number, a, plci, appl, msg));
case PRIV_SELECTOR_ECHO_CANCELLER:
appl->appl_flags |= APPL_FLAG_PRIV_EC_SPEC;
return (ec_request(Id, Number, a, plci, appl, msg));
case SELECTOR_ECHO_CANCELLER:
appl->appl_flags &= ~APPL_FLAG_PRIV_EC_SPEC;
return (ec_request(Id, Number, a, plci, appl, msg));
case SELECTOR_V42BIS:
default:
Info = _FACILITY_NOT_SUPPORTED;
break;
} /* end of switch (selector) */
}
dbug(1, dprintf("SendFacRc"));
sendf(appl,
_FACILITY_R | CONFIRM,
Id,
Number,
"wws", Info, selector, SSparms);
return false;
}
static byte facility_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *msg)
{
dbug(1, dprintf("facility_res"));
return false;
}
static byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *parms)
{
word Info = 0;
byte req;
byte len;
word w;
word fax_control_bits, fax_feature_bits, fax_info_change;
API_PARSE *ncpi;
byte pvc[2];
API_PARSE fax_parms[9];
word i;
dbug(1, dprintf("connect_b3_req"));
if (plci)
{
if ((plci->State == IDLE) || (plci->State == OUTG_DIS_PENDING)
|| (plci->State == INC_DIS_PENDING) || (plci->SuppState != IDLE))
{
Info = _WRONG_STATE;
}
else
{
/* local reply if assign unsuccessful
or B3 protocol allows only one layer 3 connection
and already connected
or B2 protocol not any LAPD
and connect_b3_req contradicts originate/answer direction */
if (!plci->NL.Id
|| (((plci->B3_prot != B3_T90NL) && (plci->B3_prot != B3_ISO8208) && (plci->B3_prot != B3_X25_DCE))
&& ((plci->channels != 0)
|| (((plci->B2_prot != B2_SDLC) && (plci->B2_prot != B2_LAPD) && (plci->B2_prot != B2_LAPD_FREE_SAPI_SEL))
&& ((plci->call_dir & CALL_DIR_ANSWER) && !(plci->call_dir & CALL_DIR_FORCE_OUTG_NL))))))
{
dbug(1, dprintf("B3 already connected=%d or no NL.Id=0x%x, dir=%d sstate=0x%x",
plci->channels, plci->NL.Id, plci->call_dir, plci->SuppState));
Info = _WRONG_STATE;
sendf(appl,
_CONNECT_B3_R | CONFIRM,
Id,
Number,
"w", Info);
return false;
}
plci->requested_options_conn = 0;
req = N_CONNECT;
ncpi = &parms[0];
if (plci->B3_prot == 2 || plci->B3_prot == 3)
{
if (ncpi->length > 2)
{
/* check for PVC */
if (ncpi->info[2] || ncpi->info[3])
{
pvc[0] = ncpi->info[3];
pvc[1] = ncpi->info[2];
add_d(plci, 2, pvc);
req = N_RESET;
}
else
{
if (ncpi->info[1] & 1) req = N_CONNECT | N_D_BIT;
add_d(plci, (word)(ncpi->length - 3), &ncpi->info[4]);
}
}
}
else if (plci->B3_prot == 5)
{
if (plci->NL.Id && !plci->nl_remove_id)
{
fax_control_bits = GET_WORD(&((T30_INFO *)plci->fax_connect_info_buffer)->control_bits_low);
fax_feature_bits = GET_WORD(&((T30_INFO *)plci->fax_connect_info_buffer)->feature_bits_low);
if (!(fax_control_bits & T30_CONTROL_BIT_MORE_DOCUMENTS)
|| (fax_feature_bits & T30_FEATURE_BIT_MORE_DOCUMENTS))
{
len = offsetof(T30_INFO, universal_6);
fax_info_change = false;
if (ncpi->length >= 4)
{
w = GET_WORD(&ncpi->info[3]);
if ((w & 0x0001) != ((word)(((T30_INFO *)(plci->fax_connect_info_buffer))->resolution & 0x0001)))
{
((T30_INFO *)(plci->fax_connect_info_buffer))->resolution =
(byte)((((T30_INFO *)(plci->fax_connect_info_buffer))->resolution & ~T30_RESOLUTION_R8_0770_OR_200) |
((w & 0x0001) ? T30_RESOLUTION_R8_0770_OR_200 : 0));
fax_info_change = true;
}
fax_control_bits &= ~(T30_CONTROL_BIT_REQUEST_POLLING | T30_CONTROL_BIT_MORE_DOCUMENTS);
if (w & 0x0002) /* Fax-polling request */
fax_control_bits |= T30_CONTROL_BIT_REQUEST_POLLING;
if ((w & 0x0004) /* Request to send / poll another document */
&& (a->manufacturer_features & MANUFACTURER_FEATURE_FAX_MORE_DOCUMENTS))
{
fax_control_bits |= T30_CONTROL_BIT_MORE_DOCUMENTS;
}
if (ncpi->length >= 6)
{
w = GET_WORD(&ncpi->info[5]);
if (((byte) w) != ((T30_INFO *)(plci->fax_connect_info_buffer))->data_format)
{
((T30_INFO *)(plci->fax_connect_info_buffer))->data_format = (byte) w;
fax_info_change = true;
}
if ((a->man_profile.private_options & (1L << PRIVATE_FAX_SUB_SEP_PWD))
&& (GET_WORD(&ncpi->info[5]) & 0x8000)) /* Private SEP/SUB/PWD enable */
{
plci->requested_options_conn |= (1L << PRIVATE_FAX_SUB_SEP_PWD);
}
if ((a->man_profile.private_options & (1L << PRIVATE_FAX_NONSTANDARD))
&& (GET_WORD(&ncpi->info[5]) & 0x4000)) /* Private non-standard facilities enable */
{
plci->requested_options_conn |= (1L << PRIVATE_FAX_NONSTANDARD);
}
fax_control_bits &= ~(T30_CONTROL_BIT_ACCEPT_SUBADDRESS | T30_CONTROL_BIT_ACCEPT_SEL_POLLING |
T30_CONTROL_BIT_ACCEPT_PASSWORD);
if ((plci->requested_options_conn | plci->requested_options | a->requested_options_table[appl->Id - 1])
& ((1L << PRIVATE_FAX_SUB_SEP_PWD) | (1L << PRIVATE_FAX_NONSTANDARD)))
{
if (api_parse(&ncpi->info[1], ncpi->length, "wwwwsss", fax_parms))
Info = _WRONG_MESSAGE_FORMAT;
else
{
if ((plci->requested_options_conn | plci->requested_options | a->requested_options_table[appl->Id - 1])
& (1L << PRIVATE_FAX_SUB_SEP_PWD))
{
fax_control_bits |= T30_CONTROL_BIT_ACCEPT_SUBADDRESS | T30_CONTROL_BIT_ACCEPT_PASSWORD;
if (fax_control_bits & T30_CONTROL_BIT_ACCEPT_POLLING)
fax_control_bits |= T30_CONTROL_BIT_ACCEPT_SEL_POLLING;
}
w = fax_parms[4].length;
if (w > 20)
w = 20;
((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = (byte) w;
for (i = 0; i < w; i++)
((T30_INFO *)(plci->fax_connect_info_buffer))->station_id[i] = fax_parms[4].info[1 + i];
((T30_INFO *)(plci->fax_connect_info_buffer))->head_line_len = 0;
len = offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH;
w = fax_parms[5].length;
if (w > 20)
w = 20;
plci->fax_connect_info_buffer[len++] = (byte) w;
for (i = 0; i < w; i++)
plci->fax_connect_info_buffer[len++] = fax_parms[5].info[1 + i];
w = fax_parms[6].length;
if (w > 20)
w = 20;
plci->fax_connect_info_buffer[len++] = (byte) w;
for (i = 0; i < w; i++)
plci->fax_connect_info_buffer[len++] = fax_parms[6].info[1 + i];
if ((plci->requested_options_conn | plci->requested_options | a->requested_options_table[appl->Id - 1])
& (1L << PRIVATE_FAX_NONSTANDARD))
{
if (api_parse(&ncpi->info[1], ncpi->length, "wwwwssss", fax_parms))
{
dbug(1, dprintf("non-standard facilities info missing or wrong format"));
plci->fax_connect_info_buffer[len++] = 0;
}
else
{
if ((fax_parms[7].length >= 3) && (fax_parms[7].info[1] >= 2))
plci->nsf_control_bits = GET_WORD(&fax_parms[7].info[2]);
plci->fax_connect_info_buffer[len++] = (byte)(fax_parms[7].length);
for (i = 0; i < fax_parms[7].length; i++)
plci->fax_connect_info_buffer[len++] = fax_parms[7].info[1 + i];
}
}
}
}
else
{
len = offsetof(T30_INFO, universal_6);
}
fax_info_change = true;
}
if (fax_control_bits != GET_WORD(&((T30_INFO *)plci->fax_connect_info_buffer)->control_bits_low))
{
PUT_WORD(&((T30_INFO *)plci->fax_connect_info_buffer)->control_bits_low, fax_control_bits);
fax_info_change = true;
}
}
if (Info == GOOD)
{
plci->fax_connect_info_length = len;
if (fax_info_change)
{
if (fax_feature_bits & T30_FEATURE_BIT_MORE_DOCUMENTS)
{
start_internal_command(Id, plci, fax_connect_info_command);
return false;
}
else
{
start_internal_command(Id, plci, fax_adjust_b23_command);
return false;
}
}
}
}
else Info = _WRONG_STATE;
}
else Info = _WRONG_STATE;
}
else if (plci->B3_prot == B3_RTP)
{
plci->internal_req_buffer[0] = ncpi->length + 1;
plci->internal_req_buffer[1] = UDATA_REQUEST_RTP_RECONFIGURE;
for (w = 0; w < ncpi->length; w++)
plci->internal_req_buffer[2 + w] = ncpi->info[1 + w];
start_internal_command(Id, plci, rtp_connect_b3_req_command);
return false;
}
if (!Info)
{
nl_req_ncci(plci, req, 0);
return 1;
}
}
}
else Info = _WRONG_IDENTIFIER;
sendf(appl,
_CONNECT_B3_R | CONFIRM,
Id,
Number,
"w", Info);
return false;
}
static byte connect_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *parms)
{
word ncci;
API_PARSE *ncpi;
byte req;
word w;
API_PARSE fax_parms[9];
word i;
byte len;
dbug(1, dprintf("connect_b3_res"));
ncci = (word)(Id >> 16);
if (plci && ncci) {
if (a->ncci_state[ncci] == INC_CON_PENDING) {
if (GET_WORD(&parms[0].info[0]) != 0)
{
a->ncci_state[ncci] = OUTG_REJ_PENDING;
channel_request_xon(plci, a->ncci_ch[ncci]);
channel_xmit_xon(plci);
cleanup_ncci_data(plci, ncci);
nl_req_ncci(plci, N_DISC, (byte)ncci);
return 1;
}
a->ncci_state[ncci] = INC_ACT_PENDING;
req = N_CONNECT_ACK;
ncpi = &parms[1];
if ((plci->B3_prot == 4) || (plci->B3_prot == 5) || (plci->B3_prot == 7))
{
if ((plci->requested_options_conn | plci->requested_options | a->requested_options_table[plci->appl->Id - 1])
& (1L << PRIVATE_FAX_NONSTANDARD))
{
if (((plci->B3_prot == 4) || (plci->B3_prot == 5))
&& (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_ENABLE_NSF)
&& (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_NEGOTIATE_RESP))
{
len = offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH;
if (plci->fax_connect_info_length < len)
{
((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0;
((T30_INFO *)(plci->fax_connect_info_buffer))->head_line_len = 0;
}
if (api_parse(&ncpi->info[1], ncpi->length, "wwwwssss", fax_parms))
{
dbug(1, dprintf("non-standard facilities info missing or wrong format"));
}
else
{
if (plci->fax_connect_info_length <= len)
plci->fax_connect_info_buffer[len] = 0;
len += 1 + plci->fax_connect_info_buffer[len];
if (plci->fax_connect_info_length <= len)
plci->fax_connect_info_buffer[len] = 0;
len += 1 + plci->fax_connect_info_buffer[len];
if ((fax_parms[7].length >= 3) && (fax_parms[7].info[1] >= 2))
plci->nsf_control_bits = GET_WORD(&fax_parms[7].info[2]);
plci->fax_connect_info_buffer[len++] = (byte)(fax_parms[7].length);
for (i = 0; i < fax_parms[7].length; i++)
plci->fax_connect_info_buffer[len++] = fax_parms[7].info[1 + i];
}
plci->fax_connect_info_length = len;
((T30_INFO *)(plci->fax_connect_info_buffer))->code = 0;
start_internal_command(Id, plci, fax_connect_ack_command);
return false;
}
}
nl_req_ncci(plci, req, (byte)ncci);
if ((plci->ncpi_state & NCPI_VALID_CONNECT_B3_ACT)
&& !(plci->ncpi_state & NCPI_CONNECT_B3_ACT_SENT))
{
if (plci->B3_prot == 4)
sendf(appl, _CONNECT_B3_ACTIVE_I, Id, 0, "s", "");
else
sendf(appl, _CONNECT_B3_ACTIVE_I, Id, 0, "S", plci->ncpi_buffer);
plci->ncpi_state |= NCPI_CONNECT_B3_ACT_SENT;
}
}
else if (plci->B3_prot == B3_RTP)
{
plci->internal_req_buffer[0] = ncpi->length + 1;
plci->internal_req_buffer[1] = UDATA_REQUEST_RTP_RECONFIGURE;
for (w = 0; w < ncpi->length; w++)
plci->internal_req_buffer[2 + w] = ncpi->info[1+w];
start_internal_command(Id, plci, rtp_connect_b3_res_command);
return false;
}
else
{
if (ncpi->length > 2) {
if (ncpi->info[1] & 1) req = N_CONNECT_ACK | N_D_BIT;
add_d(plci, (word)(ncpi->length - 3), &ncpi->info[4]);
}
nl_req_ncci(plci, req, (byte)ncci);
sendf(appl, _CONNECT_B3_ACTIVE_I, Id, 0, "s", "");
if (plci->adjust_b_restore)
{
plci->adjust_b_restore = false;
start_internal_command(Id, plci, adjust_b_restore);
}
}
return 1;
}
}
return false;
}
static byte connect_b3_a_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *parms)
{
word ncci;
ncci = (word)(Id >> 16);
dbug(1, dprintf("connect_b3_a_res(ncci=0x%x)", ncci));
if (plci && ncci && (plci->State != IDLE) && (plci->State != INC_DIS_PENDING)
&& (plci->State != OUTG_DIS_PENDING))
{
if (a->ncci_state[ncci] == INC_ACT_PENDING) {
a->ncci_state[ncci] = CONNECTED;
if (plci->State != INC_CON_CONNECTED_ALERT) plci->State = CONNECTED;
channel_request_xon(plci, a->ncci_ch[ncci]);
channel_xmit_xon(plci);
}
}
return false;
}
static byte disconnect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *parms)
{
word Info;
word ncci;
API_PARSE *ncpi;
dbug(1, dprintf("disconnect_b3_req"));
Info = _WRONG_IDENTIFIER;
ncci = (word)(Id >> 16);
if (plci && ncci)
{
Info = _WRONG_STATE;
if ((a->ncci_state[ncci] == CONNECTED)
|| (a->ncci_state[ncci] == OUTG_CON_PENDING)
|| (a->ncci_state[ncci] == INC_CON_PENDING)
|| (a->ncci_state[ncci] == INC_ACT_PENDING))
{
a->ncci_state[ncci] = OUTG_DIS_PENDING;
channel_request_xon(plci, a->ncci_ch[ncci]);
channel_xmit_xon(plci);
if (a->ncci[ncci].data_pending
&& ((plci->B3_prot == B3_TRANSPARENT)
|| (plci->B3_prot == B3_T30)
|| (plci->B3_prot == B3_T30_WITH_EXTENSIONS)))
{
plci->send_disc = (byte)ncci;
plci->command = 0;
return false;
}
else
{
cleanup_ncci_data(plci, ncci);
if (plci->B3_prot == 2 || plci->B3_prot == 3)
{
ncpi = &parms[0];
if (ncpi->length > 3)
{
add_d(plci, (word)(ncpi->length - 3), (byte *)&(ncpi->info[4]));
}
}
nl_req_ncci(plci, N_DISC, (byte)ncci);
}
return 1;
}
}
sendf(appl,
_DISCONNECT_B3_R | CONFIRM,
Id,
Number,
"w", Info);
return false;
}
static byte disconnect_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *parms)
{
word ncci;
word i;
ncci = (word)(Id >> 16);
dbug(1, dprintf("disconnect_b3_res(ncci=0x%x", ncci));
if (plci && ncci) {
plci->requested_options_conn = 0;
plci->fax_connect_info_length = 0;
plci->ncpi_state = 0x00;
if (((plci->B3_prot != B3_T90NL) && (plci->B3_prot != B3_ISO8208) && (plci->B3_prot != B3_X25_DCE))
&& ((plci->B2_prot != B2_LAPD) && (plci->B2_prot != B2_LAPD_FREE_SAPI_SEL)))
{
plci->call_dir |= CALL_DIR_FORCE_OUTG_NL;
}
for (i = 0; i < MAX_CHANNELS_PER_PLCI && plci->inc_dis_ncci_table[i] != (byte)ncci; i++);
if (i < MAX_CHANNELS_PER_PLCI) {
if (plci->channels)plci->channels--;
for (; i < MAX_CHANNELS_PER_PLCI - 1; i++) plci->inc_dis_ncci_table[i] = plci->inc_dis_ncci_table[i + 1];
plci->inc_dis_ncci_table[MAX_CHANNELS_PER_PLCI - 1] = 0;
ncci_free_receive_buffers(plci, ncci);
if ((plci->State == IDLE || plci->State == SUSPENDING) && !plci->channels) {
if (plci->State == SUSPENDING) {
sendf(plci->appl,
_FACILITY_I,
Id & 0xffffL,
0,
"ws", (word)3, "\x03\x04\x00\x00");
sendf(plci->appl, _DISCONNECT_I, Id & 0xffffL, 0, "w", 0);
}
plci_remove(plci);
plci->State = IDLE;
}
}
else
{
if ((a->manufacturer_features & MANUFACTURER_FEATURE_FAX_PAPER_FORMATS)
&& ((plci->B3_prot == 4) || (plci->B3_prot == 5))
&& (a->ncci_state[ncci] == INC_DIS_PENDING))
{
ncci_free_receive_buffers(plci, ncci);
nl_req_ncci(plci, N_EDATA, (byte)ncci);
plci->adapter->ncci_state[ncci] = IDLE;
start_internal_command(Id, plci, fax_disconnect_command);
return 1;
}
}
}
return false;
}
static byte data_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *parms)
{
NCCI *ncci_ptr;
DATA_B3_DESC *data;
word Info;
word ncci;
word i;
dbug(1, dprintf("data_b3_req"));
Info = _WRONG_IDENTIFIER;
ncci = (word)(Id >> 16);
dbug(1, dprintf("ncci=0x%x, plci=0x%x", ncci, plci));
if (plci && ncci)
{
Info = _WRONG_STATE;
if ((a->ncci_state[ncci] == CONNECTED)
|| (a->ncci_state[ncci] == INC_ACT_PENDING))
{
/* queue data */
ncci_ptr = &(a->ncci[ncci]);
i = ncci_ptr->data_out + ncci_ptr->data_pending;
if (i >= MAX_DATA_B3)
i -= MAX_DATA_B3;
data = &(ncci_ptr->DBuffer[i]);
data->Number = Number;
if ((((byte *)(parms[0].info)) >= ((byte *)(plci->msg_in_queue)))
&& (((byte *)(parms[0].info)) < ((byte *)(plci->msg_in_queue)) + sizeof(plci->msg_in_queue)))
{
data->P = (byte *)(long)(*((dword *)(parms[0].info)));
}
else
data->P = TransmitBufferSet(appl, *(dword *)parms[0].info);
data->Length = GET_WORD(parms[1].info);
data->Handle = GET_WORD(parms[2].info);
data->Flags = GET_WORD(parms[3].info);
(ncci_ptr->data_pending)++;
/* check for delivery confirmation */
if (data->Flags & 0x0004)
{
i = ncci_ptr->data_ack_out + ncci_ptr->data_ack_pending;
if (i >= MAX_DATA_ACK)
i -= MAX_DATA_ACK;
ncci_ptr->DataAck[i].Number = data->Number;
ncci_ptr->DataAck[i].Handle = data->Handle;
(ncci_ptr->data_ack_pending)++;
}
send_data(plci);
return false;
}
}
if (appl)
{
if (plci)
{
if ((((byte *)(parms[0].info)) >= ((byte *)(plci->msg_in_queue)))
&& (((byte *)(parms[0].info)) < ((byte *)(plci->msg_in_queue)) + sizeof(plci->msg_in_queue)))
{
TransmitBufferFree(appl, (byte *)(long)(*((dword *)(parms[0].info))));
}
}
sendf(appl,
_DATA_B3_R | CONFIRM,
Id,
Number,
"ww", GET_WORD(parms[2].info), Info);
}
return false;
}
static byte data_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *parms)
{
word n;
word ncci;
word NCCIcode;
dbug(1, dprintf("data_b3_res"));
ncci = (word)(Id >> 16);
if (plci && ncci) {
n = GET_WORD(parms[0].info);
dbug(1, dprintf("free(%d)", n));
NCCIcode = ncci | (((word) a->Id) << 8);
if (n < appl->MaxBuffer &&
appl->DataNCCI[n] == NCCIcode &&
(byte)(appl->DataFlags[n] >> 8) == plci->Id) {
dbug(1, dprintf("found"));
appl->DataNCCI[n] = 0;
if (channel_can_xon(plci, a->ncci_ch[ncci])) {
channel_request_xon(plci, a->ncci_ch[ncci]);
}
channel_xmit_xon(plci);
if (appl->DataFlags[n] & 4) {
nl_req_ncci(plci, N_DATA_ACK, (byte)ncci);
return 1;
}
}
}
return false;
}
static byte reset_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *parms)
{
word Info;
word ncci;
dbug(1, dprintf("reset_b3_req"));
Info = _WRONG_IDENTIFIER;
ncci = (word)(Id >> 16);
if (plci && ncci)
{
Info = _WRONG_STATE;
switch (plci->B3_prot)
{
case B3_ISO8208:
case B3_X25_DCE:
if (a->ncci_state[ncci] == CONNECTED)
{
nl_req_ncci(plci, N_RESET, (byte)ncci);
send_req(plci);
Info = GOOD;
}
break;
case B3_TRANSPARENT:
if (a->ncci_state[ncci] == CONNECTED)
{
start_internal_command(Id, plci, reset_b3_command);
Info = GOOD;
}
break;
}
}
/* reset_b3 must result in a reset_b3_con & reset_b3_Ind */
sendf(appl,
_RESET_B3_R | CONFIRM,
Id,
Number,
"w", Info);
return false;
}
static byte reset_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *parms)
{
word ncci;
dbug(1, dprintf("reset_b3_res"));
ncci = (word)(Id >> 16);
if (plci && ncci) {
switch (plci->B3_prot)
{
case B3_ISO8208:
case B3_X25_DCE:
if (a->ncci_state[ncci] == INC_RES_PENDING)
{
a->ncci_state[ncci] = CONNECTED;
nl_req_ncci(plci, N_RESET_ACK, (byte)ncci);
return true;
}
break;
}
}
return false;
}
static byte connect_b3_t90_a_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *parms)
{
word ncci;
API_PARSE *ncpi;
byte req;
dbug(1, dprintf("connect_b3_t90_a_res"));
ncci = (word)(Id >> 16);
if (plci && ncci) {
if (a->ncci_state[ncci] == INC_ACT_PENDING) {
a->ncci_state[ncci] = CONNECTED;
}
else if (a->ncci_state[ncci] == INC_CON_PENDING) {
a->ncci_state[ncci] = CONNECTED;
req = N_CONNECT_ACK;
/* parms[0]==0 for CAPI original message definition! */
if (parms[0].info) {
ncpi = &parms[1];
if (ncpi->length > 2) {
if (ncpi->info[1] & 1) req = N_CONNECT_ACK | N_D_BIT;
add_d(plci, (word)(ncpi->length - 3), &ncpi->info[4]);
}
}
nl_req_ncci(plci, req, (byte)ncci);
return 1;
}
}
return false;
}
static byte select_b_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *msg)
{
word Info = 0;
word i;
byte tel;
API_PARSE bp_parms[7];
if (!plci || !msg)
{
Info = _WRONG_IDENTIFIER;
}
else
{
dbug(1, dprintf("select_b_req[%d],PLCI=0x%x,Tel=0x%x,NL=0x%x,appl=0x%x,sstate=0x%x",
msg->length, plci->Id, plci->tel, plci->NL.Id, plci->appl, plci->SuppState));
dbug(1, dprintf("PlciState=0x%x", plci->State));
for (i = 0; i < 7; i++) bp_parms[i].length = 0;
/* check if no channel is open, no B3 connected only */
if ((plci->State == IDLE) || (plci->State == OUTG_DIS_PENDING) || (plci->State == INC_DIS_PENDING)
|| (plci->SuppState != IDLE) || plci->channels || plci->nl_remove_id)
{
Info = _WRONG_STATE;
}
/* check message format and fill bp_parms pointer */
else if (msg->length && api_parse(&msg->info[1], (word)msg->length, "wwwsss", bp_parms))
{
Info = _WRONG_MESSAGE_FORMAT;
}
else
{
if ((plci->State == INC_CON_PENDING) || (plci->State == INC_CON_ALERT)) /* send alert tone inband to the network, */
{ /* e.g. Qsig or RBS or Cornet-N or xess PRI */
if (Id & EXT_CONTROLLER)
{
sendf(appl, _SELECT_B_REQ | CONFIRM, Id, Number, "w", 0x2002); /* wrong controller */
return 0;
}
plci->State = INC_CON_CONNECTED_ALERT;
plci->appl = appl;
clear_c_ind_mask_bit(plci, (word)(appl->Id - 1));
dump_c_ind_mask(plci);
for (i = 0; i < max_appl; i++) /* disconnect the other appls */
{ /* its quasi a connect */
if (test_c_ind_mask_bit(plci, i))
sendf(&application[i], _DISCONNECT_I, Id, 0, "w", _OTHER_APPL_CONNECTED);
}
}
api_save_msg(msg, "s", &plci->saved_msg);
tel = plci->tel;
if (Id & EXT_CONTROLLER)
{
if (tel) /* external controller in use by this PLCI */
{
if (a->AdvSignalAppl && a->AdvSignalAppl != appl)
{
dbug(1, dprintf("Ext_Ctrl in use 1"));
Info = _WRONG_STATE;
}
}
else /* external controller NOT in use by this PLCI ? */
{
if (a->AdvSignalPLCI)
{
dbug(1, dprintf("Ext_Ctrl in use 2"));
Info = _WRONG_STATE;
}
else /* activate the codec */
{
dbug(1, dprintf("Ext_Ctrl start"));
if (AdvCodecSupport(a, plci, appl, 0))
{
dbug(1, dprintf("Error in codec procedures"));
Info = _WRONG_STATE;
}
else if (plci->spoofed_msg == SPOOFING_REQUIRED) /* wait until codec is active */
{
plci->spoofed_msg = AWAITING_SELECT_B;
plci->internal_command = BLOCK_PLCI; /* lock other commands */
plci->command = 0;
dbug(1, dprintf("continue if codec loaded"));
return false;
}
}
}
}
else /* external controller bit is OFF */
{
if (tel) /* external controller in use, need to switch off */
{
if (a->AdvSignalAppl == appl)
{
CodecIdCheck(a, plci);
plci->tel = 0;
plci->adv_nl = 0;
dbug(1, dprintf("Ext_Ctrl disable"));
}
else
{
dbug(1, dprintf("Ext_Ctrl not requested"));
}
}
}
if (!Info)
{
if (plci->call_dir & CALL_DIR_OUT)
plci->call_dir = CALL_DIR_OUT | CALL_DIR_ORIGINATE;
else if (plci->call_dir & CALL_DIR_IN)
plci->call_dir = CALL_DIR_IN | CALL_DIR_ANSWER;
start_internal_command(Id, plci, select_b_command);
return false;
}
}
}
sendf(appl, _SELECT_B_REQ | CONFIRM, Id, Number, "w", Info);
return false;
}
static byte manufacturer_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *parms)
{
word command;
word i;
word ncci;
API_PARSE *m;
API_PARSE m_parms[5];
word codec;
byte req;
byte ch;
byte dir;
static byte chi[2] = {0x01, 0x00};
static byte lli[2] = {0x01, 0x00};
static byte codec_cai[2] = {0x01, 0x01};
static byte null_msg = {0};
static API_PARSE null_parms = { 0, &null_msg };
PLCI *v_plci;
word Info = 0;
dbug(1, dprintf("manufacturer_req"));
for (i = 0; i < 5; i++) m_parms[i].length = 0;
if (GET_DWORD(parms[0].info) != _DI_MANU_ID) {
Info = _WRONG_MESSAGE_FORMAT;
}
command = GET_WORD(parms[1].info);
m = &parms[2];
if (!Info)
{
switch (command) {
case _DI_ASSIGN_PLCI:
if (api_parse(&m->info[1], (word)m->length, "wbbs", m_parms)) {
Info = _WRONG_MESSAGE_FORMAT;
break;
}
codec = GET_WORD(m_parms[0].info);
ch = m_parms[1].info[0];
dir = m_parms[2].info[0];
if ((i = get_plci(a))) {
plci = &a->plci[i - 1];
plci->appl = appl;
plci->command = _MANUFACTURER_R;
plci->m_command = command;
plci->number = Number;
plci->State = LOCAL_CONNECT;
Id = (((word)plci->Id << 8) | plci->adapter->Id | 0x80);
dbug(1, dprintf("ManCMD,plci=0x%x", Id));
if ((ch == 1 || ch == 2) && (dir <= 2)) {
chi[1] = (byte)(0x80 | ch);
lli[1] = 0;
plci->call_dir = CALL_DIR_OUT | CALL_DIR_ORIGINATE;
switch (codec)
{
case 0:
Info = add_b1(plci, &m_parms[3], 0, 0);
break;
case 1:
add_p(plci, CAI, codec_cai);
break;
/* manual 'swich on' to the codec support without signalling */
/* first 'assign plci' with this function, then use */
case 2:
if (AdvCodecSupport(a, plci, appl, 0)) {
Info = _RESOURCE_ERROR;
}
else {
Info = add_b1(plci, &null_parms, 0, B1_FACILITY_LOCAL);
lli[1] = 0x10; /* local call codec stream */
}
break;
}
plci->State = LOCAL_CONNECT;
plci->manufacturer = true;
plci->command = _MANUFACTURER_R;
plci->m_command = command;
plci->number = Number;
if (!Info)
{
add_p(plci, LLI, lli);
add_p(plci, CHI, chi);
add_p(plci, UID, "\x06\x43\x61\x70\x69\x32\x30");
sig_req(plci, ASSIGN, DSIG_ID);
if (!codec)
{
Info = add_b23(plci, &m_parms[3]);
if (!Info)
{
nl_req_ncci(plci, ASSIGN, 0);
send_req(plci);
}
}
if (!Info)
{
dbug(1, dprintf("dir=0x%x,spoof=0x%x", dir, plci->spoofed_msg));
if (plci->spoofed_msg == SPOOFING_REQUIRED)
{
api_save_msg(m_parms, "wbbs", &plci->saved_msg);
plci->spoofed_msg = AWAITING_MANUF_CON;
plci->internal_command = BLOCK_PLCI; /* reject other req meanwhile */
plci->command = 0;
send_req(plci);
return false;
}
if (dir == 1) {
sig_req(plci, CALL_REQ, 0);
}
else if (!dir) {
sig_req(plci, LISTEN_REQ, 0);
}
send_req(plci);
}
else
{
sendf(appl,
_MANUFACTURER_R | CONFIRM,
Id,
Number,
"dww", _DI_MANU_ID, command, Info);
return 2;
}
}
}
}
else Info = _OUT_OF_PLCI;
break;
case _DI_IDI_CTRL:
if (!plci)
{
Info = _WRONG_IDENTIFIER;
break;
}
if (api_parse(&m->info[1], (word)m->length, "bs", m_parms)) {
Info = _WRONG_MESSAGE_FORMAT;
break;
}
req = m_parms[0].info[0];
plci->command = _MANUFACTURER_R;
plci->m_command = command;
plci->number = Number;
if (req == CALL_REQ)
{
plci->b_channel = getChannel(&m_parms[1]);
mixer_set_bchannel_id_esc(plci, plci->b_channel);
if (plci->spoofed_msg == SPOOFING_REQUIRED)
{
plci->spoofed_msg = CALL_REQ | AWAITING_MANUF_CON;
plci->internal_command = BLOCK_PLCI; /* reject other req meanwhile */
plci->command = 0;
break;
}
}
else if (req == LAW_REQ)
{
plci->cr_enquiry = true;
}
add_ss(plci, FTY, &m_parms[1]);
sig_req(plci, req, 0);
send_req(plci);
if (req == HANGUP)
{
if (plci->NL.Id && !plci->nl_remove_id)
{
if (plci->channels)
{
for (ncci = 1; ncci < MAX_NCCI + 1; ncci++)
{
if ((a->ncci_plci[ncci] == plci->Id) && (a->ncci_state[ncci] == CONNECTED))
{
a->ncci_state[ncci] = OUTG_DIS_PENDING;
cleanup_ncci_data(plci, ncci);
nl_req_ncci(plci, N_DISC, (byte)ncci);
}
}
}
mixer_remove(plci);
nl_req_ncci(plci, REMOVE, 0);
send_req(plci);
}
}
break;
case _DI_SIG_CTRL:
/* signalling control for loop activation B-channel */
if (!plci)
{
Info = _WRONG_IDENTIFIER;
break;
}
if (m->length) {
plci->command = _MANUFACTURER_R;
plci->number = Number;
add_ss(plci, FTY, m);
sig_req(plci, SIG_CTRL, 0);
send_req(plci);
}
else Info = _WRONG_MESSAGE_FORMAT;
break;
case _DI_RXT_CTRL:
/* activation control for receiver/transmitter B-channel */
if (!plci)
{
Info = _WRONG_IDENTIFIER;
break;
}
if (m->length) {
plci->command = _MANUFACTURER_R;
plci->number = Number;
add_ss(plci, FTY, m);
sig_req(plci, DSP_CTRL, 0);
send_req(plci);
}
else Info = _WRONG_MESSAGE_FORMAT;
break;
case _DI_ADV_CODEC:
case _DI_DSP_CTRL:
/* TEL_CTRL commands to support non standard adjustments: */
/* Ring on/off, Handset micro volume, external micro vol. */
/* handset+external speaker volume, receiver+transm. gain,*/
/* handsfree on (hookinfo off), set mixer command */
if (command == _DI_ADV_CODEC)
{
if (!a->AdvCodecPLCI) {
Info = _WRONG_STATE;
break;
}
v_plci = a->AdvCodecPLCI;
}
else
{
if (plci
&& (m->length >= 3)
&& (m->info[1] == 0x1c)
&& (m->info[2] >= 1))
{
if (m->info[3] == DSP_CTRL_OLD_SET_MIXER_COEFFICIENTS)
{
if ((plci->tel != ADV_VOICE) || (plci != a->AdvSignalPLCI))
{
Info = _WRONG_STATE;
break;
}
a->adv_voice_coef_length = m->info[2] - 1;
if (a->adv_voice_coef_length > m->length - 3)
a->adv_voice_coef_length = (byte)(m->length - 3);
if (a->adv_voice_coef_length > ADV_VOICE_COEF_BUFFER_SIZE)
a->adv_voice_coef_length = ADV_VOICE_COEF_BUFFER_SIZE;
for (i = 0; i < a->adv_voice_coef_length; i++)
a->adv_voice_coef_buffer[i] = m->info[4 + i];
if (plci->B1_facilities & B1_FACILITY_VOICE)
adv_voice_write_coefs(plci, ADV_VOICE_WRITE_UPDATE);
break;
}
else if (m->info[3] == DSP_CTRL_SET_DTMF_PARAMETERS)
{
if (!(a->manufacturer_features & MANUFACTURER_FEATURE_DTMF_PARAMETERS))
{
Info = _FACILITY_NOT_SUPPORTED;
break;
}
plci->dtmf_parameter_length = m->info[2] - 1;
if (plci->dtmf_parameter_length > m->length - 3)
plci->dtmf_parameter_length = (byte)(m->length - 3);
if (plci->dtmf_parameter_length > DTMF_PARAMETER_BUFFER_SIZE)
plci->dtmf_parameter_length = DTMF_PARAMETER_BUFFER_SIZE;
for (i = 0; i < plci->dtmf_parameter_length; i++)
plci->dtmf_parameter_buffer[i] = m->info[4 + i];
if (plci->B1_facilities & B1_FACILITY_DTMFR)
dtmf_parameter_write(plci);
break;
}
}
v_plci = plci;
}
if (!v_plci)
{
Info = _WRONG_IDENTIFIER;
break;
}
if (m->length) {
add_ss(v_plci, FTY, m);
sig_req(v_plci, TEL_CTRL, 0);
send_req(v_plci);
}
else Info = _WRONG_MESSAGE_FORMAT;
break;
case _DI_OPTIONS_REQUEST:
if (api_parse(&m->info[1], (word)m->length, "d", m_parms)) {
Info = _WRONG_MESSAGE_FORMAT;
break;
}
if (GET_DWORD(m_parms[0].info) & ~a->man_profile.private_options)
{
Info = _FACILITY_NOT_SUPPORTED;
break;
}
a->requested_options_table[appl->Id - 1] = GET_DWORD(m_parms[0].info);
break;
default:
Info = _WRONG_MESSAGE_FORMAT;
break;
}
}
sendf(appl,
_MANUFACTURER_R | CONFIRM,
Id,
Number,
"dww", _DI_MANU_ID, command, Info);
return false;
}
static byte manufacturer_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
PLCI *plci, APPL *appl, API_PARSE *msg)
{
word indication;
API_PARSE m_parms[3];
API_PARSE *ncpi;
API_PARSE fax_parms[9];
word i;
byte len;
dbug(1, dprintf("manufacturer_res"));
if ((msg[0].length == 0)
|| (msg[1].length == 0)
|| (GET_DWORD(msg[0].info) != _DI_MANU_ID))
{
return false;
}
indication = GET_WORD(msg[1].info);
switch (indication)
{
case _DI_NEGOTIATE_B3:
if (!plci)
break;
if (((plci->B3_prot != 4) && (plci->B3_prot != 5))
|| !(plci->ncpi_state & NCPI_NEGOTIATE_B3_SENT))
{
dbug(1, dprintf("wrong state for NEGOTIATE_B3 parameters"));
break;
}
if (api_parse(&msg[2].info[1], msg[2].length, "ws", m_parms))
{
dbug(1, dprintf("wrong format in NEGOTIATE_B3 parameters"));
break;
}
ncpi = &m_parms[1];
len = offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH;
if (plci->fax_connect_info_length < len)
{
((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0;
((T30_INFO *)(plci->fax_connect_info_buffer))->head_line_len = 0;
}
if (api_parse(&ncpi->info[1], ncpi->length, "wwwwssss", fax_parms))
{
dbug(1, dprintf("non-standard facilities info missing or wrong format"));
}
else
{
if (plci->fax_connect_info_length <= len)
plci->fax_connect_info_buffer[len] = 0;
len += 1 + plci->fax_connect_info_buffer[len];
if (plci->fax_connect_info_length <= len)
plci->fax_connect_info_buffer[len] = 0;
len += 1 + plci->fax_connect_info_buffer[len];
if ((fax_parms[7].length >= 3) && (fax_parms[7].info[1] >= 2))
plci->nsf_control_bits = GET_WORD(&fax_parms[7].info[2]);
plci->fax_connect_info_buffer[len++] = (byte)(fax_parms[7].length);
for (i = 0; i < fax_parms[7].length; i++)
plci->fax_connect_info_buffer[len++] = fax_parms[7].info[1 + i];
}
plci->fax_connect_info_length = len;
plci->fax_edata_ack_length = plci->fax_connect_info_length;
start_internal_command(Id, plci, fax_edata_ack_command);
break;
}
return false;
}
/*------------------------------------------------------------------*/
/* IDI callback function */
/*------------------------------------------------------------------*/
void callback(ENTITY *e)
{
DIVA_CAPI_ADAPTER *a;
APPL *appl;
PLCI *plci;
CAPI_MSG *m;
word i, j;
byte rc;
byte ch;
byte req;
byte global_req;
int no_cancel_rc;
dbug(1, dprintf("%x:CB(%x:Req=%x,Rc=%x,Ind=%x)",
(e->user[0] + 1) & 0x7fff, e->Id, e->Req, e->Rc, e->Ind));
a = &(adapter[(byte)e->user[0]]);
plci = &(a->plci[e->user[1]]);
no_cancel_rc = DIVA_CAPI_SUPPORTS_NO_CANCEL(a);
/*
If new protocol code and new XDI is used then CAPI should work
fully in accordance with IDI cpec an look on callback field instead
of Rc field for return codes.
*/
if (((e->complete == 0xff) && no_cancel_rc) ||
(e->Rc && !no_cancel_rc)) {
rc = e->Rc;
ch = e->RcCh;
req = e->Req;
e->Rc = 0;
if (e->user[0] & 0x8000)
{
/*
If REMOVE request was sent then we have to wait until
return code with Id set to zero arrives.
All other return codes should be ignored.
*/
if (req == REMOVE)
{
if (e->Id)
{
dbug(1, dprintf("cancel RC in REMOVE state"));
return;
}
channel_flow_control_remove(plci);
for (i = 0; i < 256; i++)
{
if (a->FlowControlIdTable[i] == plci->nl_remove_id)
a->FlowControlIdTable[i] = 0;
}
plci->nl_remove_id = 0;
if (plci->rx_dma_descriptor > 0) {
diva_free_dma_descriptor(plci, plci->rx_dma_descriptor - 1);
plci->rx_dma_descriptor = 0;
}
}
if (rc == OK_FC)
{
a->FlowControlIdTable[ch] = e->Id;
a->FlowControlSkipTable[ch] = 0;
a->ch_flow_control[ch] |= N_OK_FC_PENDING;
a->ch_flow_plci[ch] = plci->Id;
plci->nl_req = 0;
}
else
{
/*
Cancel return codes self, if feature was requested
*/
if (no_cancel_rc && (a->FlowControlIdTable[ch] == e->Id) && e->Id) {
a->FlowControlIdTable[ch] = 0;
if ((rc == OK) && a->FlowControlSkipTable[ch]) {
dbug(3, dprintf("XDI CAPI: RC cancelled Id:0x02, Ch:%02x", e->Id, ch));
return;
}
}
if (a->ch_flow_control[ch] & N_OK_FC_PENDING)
{
a->ch_flow_control[ch] &= ~N_OK_FC_PENDING;
if (ch == e->ReqCh)
plci->nl_req = 0;
}
else
plci->nl_req = 0;
}
if (plci->nl_req)
control_rc(plci, 0, rc, ch, 0, true);
else
{
if (req == N_XON)
{
channel_x_on(plci, ch);
if (plci->internal_command)
control_rc(plci, req, rc, ch, 0, true);
}
else
{
if (plci->nl_global_req)
{
global_req = plci->nl_global_req;
plci->nl_global_req = 0;
if (rc != ASSIGN_OK) {
e->Id = 0;
if (plci->rx_dma_descriptor > 0) {
diva_free_dma_descriptor(plci, plci->rx_dma_descriptor - 1);
plci->rx_dma_descriptor = 0;
}
}
channel_xmit_xon(plci);
control_rc(plci, 0, rc, ch, global_req, true);
}
else if (plci->data_sent)
{
channel_xmit_xon(plci);
plci->data_sent = false;
plci->NL.XNum = 1;
data_rc(plci, ch);
if (plci->internal_command)
control_rc(plci, req, rc, ch, 0, true);
}
else
{
channel_xmit_xon(plci);
control_rc(plci, req, rc, ch, 0, true);
}
}
}
}
else
{
/*
If REMOVE request was sent then we have to wait until
return code with Id set to zero arrives.
All other return codes should be ignored.
*/
if (req == REMOVE)
{
if (e->Id)
{
dbug(1, dprintf("cancel RC in REMOVE state"));
return;
}
plci->sig_remove_id = 0;
}
plci->sig_req = 0;
if (plci->sig_global_req)
{
global_req = plci->sig_global_req;
plci->sig_global_req = 0;
if (rc != ASSIGN_OK)
e->Id = 0;
channel_xmit_xon(plci);
control_rc(plci, 0, rc, ch, global_req, false);
}
else
{
channel_xmit_xon(plci);
control_rc(plci, req, rc, ch, 0, false);
}
}
/*
Again: in accordance with IDI spec Rc and Ind can't be delivered in the
same callback. Also if new XDI and protocol code used then jump
direct to finish.
*/
if (no_cancel_rc) {
channel_xmit_xon(plci);
goto capi_callback_suffix;
}
}
channel_xmit_xon(plci);
if (e->Ind) {
if (e->user[0] & 0x8000) {
byte Ind = e->Ind & 0x0f;
byte Ch = e->IndCh;
if (((Ind == N_DISC) || (Ind == N_DISC_ACK)) &&
(a->ch_flow_plci[Ch] == plci->Id)) {
if (a->ch_flow_control[Ch] & N_RX_FLOW_CONTROL_MASK) {
dbug(3, dprintf("XDI CAPI: I: pending N-XON Ch:%02x", Ch));
}
a->ch_flow_control[Ch] &= ~N_RX_FLOW_CONTROL_MASK;
}
nl_ind(plci);
if ((e->RNR != 1) &&
(a->ch_flow_plci[Ch] == plci->Id) &&
(a->ch_flow_control[Ch] & N_RX_FLOW_CONTROL_MASK)) {
a->ch_flow_control[Ch] &= ~N_RX_FLOW_CONTROL_MASK;
dbug(3, dprintf("XDI CAPI: I: remove faked N-XON Ch:%02x", Ch));
}
} else {
sig_ind(plci);
}
e->Ind = 0;
}
capi_callback_suffix:
while (!plci->req_in
&& !plci->internal_command
&& (plci->msg_in_write_pos != plci->msg_in_read_pos))
{
j = (plci->msg_in_read_pos == plci->msg_in_wrap_pos) ? 0 : plci->msg_in_read_pos;
i = (((CAPI_MSG *)(&((byte *)(plci->msg_in_queue))[j]))->header.length + 3) & 0xfffc;
m = (CAPI_MSG *)(&((byte *)(plci->msg_in_queue))[j]);
appl = *((APPL **)(&((byte *)(plci->msg_in_queue))[j + i]));
dbug(1, dprintf("dequeue msg(0x%04x) - write=%d read=%d wrap=%d",
m->header.command, plci->msg_in_write_pos, plci->msg_in_read_pos, plci->msg_in_wrap_pos));
if (plci->msg_in_read_pos == plci->msg_in_wrap_pos)
{
plci->msg_in_wrap_pos = MSG_IN_QUEUE_SIZE;
plci->msg_in_read_pos = i + MSG_IN_OVERHEAD;
}
else
{
plci->msg_in_read_pos = j + i + MSG_IN_OVERHEAD;
}
if (plci->msg_in_read_pos == plci->msg_in_write_pos)
{
plci->msg_in_write_pos = MSG_IN_QUEUE_SIZE;
plci->msg_in_read_pos = MSG_IN_QUEUE_SIZE;
}
else if (plci->msg_in_read_pos == plci->msg_in_wrap_pos)
{
plci->msg_in_read_pos = MSG_IN_QUEUE_SIZE;
plci->msg_in_wrap_pos = MSG_IN_QUEUE_SIZE;
}
i = api_put(appl, m);
if (i != 0)
{
if (m->header.command == _DATA_B3_R)
TransmitBufferFree(appl, (byte *)(long)(m->info.data_b3_req.Data));
dbug(1, dprintf("Error 0x%04x from msg(0x%04x)", i, m->header.command));
break;
}
if (plci->li_notify_update)
{
plci->li_notify_update = false;
mixer_notify_update(plci, false);
}
}
send_data(plci);
send_req(plci);
}
static void control_rc(PLCI *plci, byte req, byte rc, byte ch, byte global_req,
byte nl_rc)
{
dword Id;
dword rId;
word Number;
word Info = 0;
word i;
word ncci;
DIVA_CAPI_ADAPTER *a;
APPL *appl;
PLCI *rplci;
byte SSparms[] = "\x05\x00\x00\x02\x00\x00";
byte SSstruct[] = "\x09\x00\x00\x06\x00\x00\x00\x00\x00\x00";
if (!plci) {
dbug(0, dprintf("A: control_rc, no plci %02x:%02x:%02x:%02x:%02x", req, rc, ch, global_req, nl_rc));
return;
}
dbug(1, dprintf("req0_in/out=%d/%d", plci->req_in, plci->req_out));
if (plci->req_in != plci->req_out)
{
if (nl_rc || (global_req != ASSIGN) || (rc == ASSIGN_OK))
{
dbug(1, dprintf("req_1return"));
return;
}
/* cancel outstanding request on the PLCI after SIG ASSIGN failure */
}
plci->req_in = plci->req_in_start = plci->req_out = 0;
dbug(1, dprintf("control_rc"));
appl = plci->appl;
a = plci->adapter;
ncci = a->ch_ncci[ch];
if (appl)
{
Id = (((dword)(ncci ? ncci : ch)) << 16) | ((word)plci->Id << 8) | a->Id;
if (plci->tel && plci->SuppState != CALL_HELD) Id |= EXT_CONTROLLER;
Number = plci->number;
dbug(1, dprintf("Contr_RC-Id=%08lx,plci=%x,tel=%x, entity=0x%x, command=0x%x, int_command=0x%x", Id, plci->Id, plci->tel, plci->Sig.Id, plci->command, plci->internal_command));
dbug(1, dprintf("channels=0x%x", plci->channels));
if (plci_remove_check(plci))
return;
if (req == REMOVE && rc == ASSIGN_OK)
{
sig_req(plci, HANGUP, 0);
sig_req(plci, REMOVE, 0);
send_req(plci);
}
if (plci->command)
{
switch (plci->command)
{
case C_HOLD_REQ:
dbug(1, dprintf("HoldRC=0x%x", rc));
SSparms[1] = (byte)S_HOLD;
if (rc != OK)
{
plci->SuppState = IDLE;
Info = 0x2001;
}
sendf(appl, _FACILITY_R | CONFIRM, Id, Number, "wws", Info, 3, SSparms);
break;
case C_RETRIEVE_REQ:
dbug(1, dprintf("RetrieveRC=0x%x", rc));
SSparms[1] = (byte)S_RETRIEVE;
if (rc != OK)
{
plci->SuppState = CALL_HELD;
Info = 0x2001;
}
sendf(appl, _FACILITY_R | CONFIRM, Id, Number, "wws", Info, 3, SSparms);
break;
case _INFO_R:
dbug(1, dprintf("InfoRC=0x%x", rc));
if (rc != OK) Info = _WRONG_STATE;
sendf(appl, _INFO_R | CONFIRM, Id, Number, "w", Info);
break;
case _CONNECT_R:
dbug(1, dprintf("Connect_R=0x%x/0x%x/0x%x/0x%x", req, rc, global_req, nl_rc));
if (plci->State == INC_DIS_PENDING)
break;
if (plci->Sig.Id != 0xff)
{
if (((global_req == ASSIGN) && (rc != ASSIGN_OK))
|| (!nl_rc && (req == CALL_REQ) && (rc != OK)))
{
dbug(1, dprintf("No more IDs/Call_Req failed"));
sendf(appl, _CONNECT_R | CONFIRM, Id & 0xffL, Number, "w", _OUT_OF_PLCI);
plci_remove(plci);
plci->State = IDLE;
break;
}
if (plci->State != LOCAL_CONNECT) plci->State = OUTG_CON_PENDING;
sendf(appl, _CONNECT_R | CONFIRM, Id, Number, "w", 0);
}
else /* D-ch activation */
{
if (rc != ASSIGN_OK)
{
dbug(1, dprintf("No more IDs/X.25 Call_Req failed"));
sendf(appl, _CONNECT_R | CONFIRM, Id & 0xffL, Number, "w", _OUT_OF_PLCI);
plci_remove(plci);
plci->State = IDLE;
break;
}
sendf(appl, _CONNECT_R | CONFIRM, Id, Number, "w", 0);
sendf(plci->appl, _CONNECT_ACTIVE_I, Id, 0, "sss", "", "", "");
plci->State = INC_ACT_PENDING;
}
break;
case _CONNECT_I | RESPONSE:
if (plci->State != INC_DIS_PENDING)
plci->State = INC_CON_ACCEPT;
break;
case _DISCONNECT_R:
if (plci->State == INC_DIS_PENDING)
break;
if (plci->Sig.Id != 0xff)
{
plci->State = OUTG_DIS_PENDING;
sendf(appl, _DISCONNECT_R | CONFIRM, Id, Number, "w", 0);
}
break;
case SUSPEND_REQ:
break;
case RESUME_REQ:
break;
case _CONNECT_B3_R:
if (rc != OK)
{
sendf(appl, _CONNECT_B3_R | CONFIRM, Id, Number, "w", _WRONG_IDENTIFIER);
break;
}
ncci = get_ncci(plci, ch, 0);
Id = (Id & 0xffff) | (((dword) ncci) << 16);
plci->channels++;
if (req == N_RESET)
{
a->ncci_state[ncci] = INC_ACT_PENDING;
sendf(appl, _CONNECT_B3_R | CONFIRM, Id, Number, "w", 0);
sendf(appl, _CONNECT_B3_ACTIVE_I, Id, 0, "s", "");
}
else
{
a->ncci_state[ncci] = OUTG_CON_PENDING;
sendf(appl, _CONNECT_B3_R | CONFIRM, Id, Number, "w", 0);
}
break;
case _CONNECT_B3_I | RESPONSE:
break;
case _RESET_B3_R:
/* sendf(appl, _RESET_B3_R | CONFIRM, Id, Number, "w", 0);*/
break;
case _DISCONNECT_B3_R:
sendf(appl, _DISCONNECT_B3_R | CONFIRM, Id, Number, "w", 0);
break;
case _MANUFACTURER_R:
break;
case PERM_LIST_REQ:
if (rc != OK)
{
Info = _WRONG_IDENTIFIER;
sendf(plci->appl, _CONNECT_R | CONFIRM, Id, Number, "w", Info);
plci_remove(plci);
}
else
sendf(plci->appl, _CONNECT_R | CONFIRM, Id, Number, "w", Info);
break;
default:
break;
}
plci->command = 0;
}
else if (plci->internal_command)
{
switch (plci->internal_command)
{
case BLOCK_PLCI:
return;
case GET_MWI_STATE:
if (rc == OK) /* command supported, wait for indication */
{
return;
}
plci_remove(plci);
break;
/* Get Supported Services */
case GETSERV_REQ_PEND:
if (rc == OK) /* command supported, wait for indication */
{
break;
}
PUT_DWORD(&SSstruct[6], MASK_TERMINAL_PORTABILITY);
sendf(appl, _FACILITY_R | CONFIRM, Id, Number, "wws", 0, 3, SSstruct);
plci_remove(plci);
break;
case INTERR_DIVERSION_REQ_PEND: /* Interrogate Parameters */
case INTERR_NUMBERS_REQ_PEND:
case CF_START_PEND: /* Call Forwarding Start pending */
case CF_STOP_PEND: /* Call Forwarding Stop pending */
case CCBS_REQUEST_REQ_PEND:
case CCBS_DEACTIVATE_REQ_PEND:
case CCBS_INTERROGATE_REQ_PEND:
switch (plci->internal_command)
{
case INTERR_DIVERSION_REQ_PEND:
SSparms[1] = S_INTERROGATE_DIVERSION;
break;
case INTERR_NUMBERS_REQ_PEND:
SSparms[1] = S_INTERROGATE_NUMBERS;
break;
case CF_START_PEND:
SSparms[1] = S_CALL_FORWARDING_START;
break;
case CF_STOP_PEND:
SSparms[1] = S_CALL_FORWARDING_STOP;
break;
case CCBS_REQUEST_REQ_PEND:
SSparms[1] = S_CCBS_REQUEST;
break;
case CCBS_DEACTIVATE_REQ_PEND:
SSparms[1] = S_CCBS_DEACTIVATE;
break;
case CCBS_INTERROGATE_REQ_PEND:
SSparms[1] = S_CCBS_INTERROGATE;
break;
}
if (global_req == ASSIGN)
{
dbug(1, dprintf("AssignDiversion_RC=0x%x/0x%x", req, rc));
return;
}
if (!plci->appl) break;
if (rc == ISDN_GUARD_REJ)
{
Info = _CAPI_GUARD_ERROR;
}
else if (rc != OK)
{
Info = _SUPPLEMENTARY_SERVICE_NOT_SUPPORTED;
}
sendf(plci->appl, _FACILITY_R | CONFIRM, Id & 0x7,
plci->number, "wws", Info, (word)3, SSparms);
if (Info) plci_remove(plci);
break;
/* 3pty conference pending */
case PTY_REQ_PEND:
if (!plci->relatedPTYPLCI) break;
rplci = plci->relatedPTYPLCI;
SSparms[1] = plci->ptyState;
rId = ((word)rplci->Id << 8) | rplci->adapter->Id;
if (rplci->tel) rId |= EXT_CONTROLLER;
if (rc != OK)
{
Info = 0x300E; /* not supported */
plci->relatedPTYPLCI = NULL;
plci->ptyState = 0;
}
sendf(rplci->appl,
_FACILITY_R | CONFIRM,
rId,
plci->number,
"wws", Info, (word)3, SSparms);
break;
/* Explicit Call Transfer pending */
case ECT_REQ_PEND:
dbug(1, dprintf("ECT_RC=0x%x/0x%x", req, rc));
if (!plci->relatedPTYPLCI) break;
rplci = plci->relatedPTYPLCI;
SSparms[1] = S_ECT;
rId = ((word)rplci->Id << 8) | rplci->adapter->Id;
if (rplci->tel) rId |= EXT_CONTROLLER;
if (rc != OK)
{
Info = 0x300E; /* not supported */
plci->relatedPTYPLCI = NULL;
plci->ptyState = 0;
}
sendf(rplci->appl,
_FACILITY_R | CONFIRM,
rId,
plci->number,
"wws", Info, (word)3, SSparms);
break;
case _MANUFACTURER_R:
dbug(1, dprintf("_Manufacturer_R=0x%x/0x%x", req, rc));
if ((global_req == ASSIGN) && (rc != ASSIGN_OK))
{
dbug(1, dprintf("No more IDs"));
sendf(appl, _MANUFACTURER_R | CONFIRM, Id, Number, "dww", _DI_MANU_ID, _MANUFACTURER_R, _OUT_OF_PLCI);
plci_remove(plci); /* after codec init, internal codec commands pending */
}
break;
case _CONNECT_R:
dbug(1, dprintf("_Connect_R=0x%x/0x%x", req, rc));
if ((global_req == ASSIGN) && (rc != ASSIGN_OK))
{
dbug(1, dprintf("No more IDs"));
sendf(appl, _CONNECT_R | CONFIRM, Id & 0xffL, Number, "w", _OUT_OF_PLCI);
plci_remove(plci); /* after codec init, internal codec commands pending */
}
break;
case PERM_COD_HOOK: /* finished with Hook_Ind */
return;
case PERM_COD_CALL:
dbug(1, dprintf("***Codec Connect_Pending A, Rc = 0x%x", rc));
plci->internal_command = PERM_COD_CONN_PEND;
return;
case PERM_COD_ASSIGN:
dbug(1, dprintf("***Codec Assign A, Rc = 0x%x", rc));
if (rc != ASSIGN_OK) break;
sig_req(plci, CALL_REQ, 0);
send_req(plci);
plci->internal_command = PERM_COD_CALL;
return;
/* Null Call Reference Request pending */
case C_NCR_FAC_REQ:
dbug(1, dprintf("NCR_FAC=0x%x/0x%x", req, rc));
if (global_req == ASSIGN)
{
if (rc == ASSIGN_OK)
{
return;
}
else
{
sendf(appl, _INFO_R | CONFIRM, Id & 0xf, Number, "w", _WRONG_STATE);
appl->NullCREnable = false;
plci_remove(plci);
}
}
else if (req == NCR_FACILITY)
{
if (rc == OK)
{
sendf(appl, _INFO_R | CONFIRM, Id & 0xf, Number, "w", 0);
}
else
{
sendf(appl, _INFO_R | CONFIRM, Id & 0xf, Number, "w", _WRONG_STATE);
appl->NullCREnable = false;
}
plci_remove(plci);
}
break;
case HOOK_ON_REQ:
if (plci->channels)
{
if (a->ncci_state[ncci] == CONNECTED)
{
a->ncci_state[ncci] = OUTG_DIS_PENDING;
cleanup_ncci_data(plci, ncci);
nl_req_ncci(plci, N_DISC, (byte)ncci);
}
break;
}
break;
case HOOK_OFF_REQ:
if (plci->State == INC_DIS_PENDING)
break;
sig_req(plci, CALL_REQ, 0);
send_req(plci);
plci->State = OUTG_CON_PENDING;
break;
case MWI_ACTIVATE_REQ_PEND:
case MWI_DEACTIVATE_REQ_PEND:
if (global_req == ASSIGN && rc == ASSIGN_OK)
{
dbug(1, dprintf("MWI_REQ assigned"));
return;
}
else if (rc != OK)
{
if (rc == WRONG_IE)
{
Info = 0x2007; /* Illegal message parameter coding */
dbug(1, dprintf("MWI_REQ invalid parameter"));
}
else
{
Info = 0x300B; /* not supported */
dbug(1, dprintf("MWI_REQ not supported"));
}
/* 0x3010: Request not allowed in this state */
PUT_WORD(&SSparms[4], 0x300E); /* SS not supported */
}
if (plci->internal_command == MWI_ACTIVATE_REQ_PEND)
{
PUT_WORD(&SSparms[1], S_MWI_ACTIVATE);
}
else PUT_WORD(&SSparms[1], S_MWI_DEACTIVATE);
if (plci->cr_enquiry)
{
sendf(plci->appl,
_FACILITY_R | CONFIRM,
Id & 0xf,
plci->number,
"wws", Info, (word)3, SSparms);
if (rc != OK) plci_remove(plci);
}
else
{
sendf(plci->appl,
_FACILITY_R | CONFIRM,
Id,
plci->number,
"wws", Info, (word)3, SSparms);
}
break;
case CONF_BEGIN_REQ_PEND:
case CONF_ADD_REQ_PEND:
case CONF_SPLIT_REQ_PEND:
case CONF_DROP_REQ_PEND:
case CONF_ISOLATE_REQ_PEND:
case CONF_REATTACH_REQ_PEND:
dbug(1, dprintf("CONF_RC=0x%x/0x%x", req, rc));
if ((plci->internal_command == CONF_ADD_REQ_PEND) && (!plci->relatedPTYPLCI)) break;
rplci = plci;
rId = Id;
switch (plci->internal_command)
{
case CONF_BEGIN_REQ_PEND:
SSparms[1] = S_CONF_BEGIN;
break;
case CONF_ADD_REQ_PEND:
SSparms[1] = S_CONF_ADD;
rplci = plci->relatedPTYPLCI;
rId = ((word)rplci->Id << 8) | rplci->adapter->Id;
break;
case CONF_SPLIT_REQ_PEND:
SSparms[1] = S_CONF_SPLIT;
break;
case CONF_DROP_REQ_PEND:
SSparms[1] = S_CONF_DROP;
break;
case CONF_ISOLATE_REQ_PEND:
SSparms[1] = S_CONF_ISOLATE;
break;
case CONF_REATTACH_REQ_PEND:
SSparms[1] = S_CONF_REATTACH;
break;
}
if (rc != OK)
{
Info = 0x300E; /* not supported */
plci->relatedPTYPLCI = NULL;
plci->ptyState = 0;
}
sendf(rplci->appl,
_FACILITY_R | CONFIRM,
rId,
plci->number,
"wws", Info, (word)3, SSparms);
break;
case VSWITCH_REQ_PEND:
if (rc != OK)
{
if (plci->relatedPTYPLCI)
{
plci->relatedPTYPLCI->vswitchstate = 0;
plci->relatedPTYPLCI->vsprot = 0;
plci->relatedPTYPLCI->vsprotdialect = 0;
}
plci->vswitchstate = 0;
plci->vsprot = 0;
plci->vsprotdialect = 0;
}
else
{
if (plci->relatedPTYPLCI &&
plci->vswitchstate == 1 &&
plci->relatedPTYPLCI->vswitchstate == 3) /* join complete */
plci->vswitchstate = 3;
}
break;
/* Call Deflection Request pending (SSCT) */
case CD_REQ_PEND:
SSparms[1] = S_CALL_DEFLECTION;
if (rc != OK)
{
Info = 0x300E; /* not supported */
plci->appl->CDEnable = 0;
}
sendf(plci->appl, _FACILITY_R | CONFIRM, Id,
plci->number, "wws", Info, (word)3, SSparms);
break;
case RTP_CONNECT_B3_REQ_COMMAND_2:
if (rc == OK)
{
ncci = get_ncci(plci, ch, 0);
Id = (Id & 0xffff) | (((dword) ncci) << 16);
plci->channels++;
a->ncci_state[ncci] = OUTG_CON_PENDING;
}
default:
if (plci->internal_command_queue[0])
{
(*(plci->internal_command_queue[0]))(Id, plci, rc);
if (plci->internal_command)
return;
}
break;
}
next_internal_command(Id, plci);
}
}
else /* appl==0 */
{
Id = ((word)plci->Id << 8) | plci->adapter->Id;
if (plci->tel) Id |= EXT_CONTROLLER;
switch (plci->internal_command)
{
case BLOCK_PLCI:
return;
case START_L1_SIG_ASSIGN_PEND:
case REM_L1_SIG_ASSIGN_PEND:
if (global_req == ASSIGN)
{
break;
}
else
{
dbug(1, dprintf("***L1 Req rem PLCI"));
plci->internal_command = 0;
sig_req(plci, REMOVE, 0);
send_req(plci);
}
break;
/* Call Deflection Request pending, just no appl ptr assigned */
case CD_REQ_PEND:
SSparms[1] = S_CALL_DEFLECTION;
if (rc != OK)
{
Info = 0x300E; /* not supported */
}
for (i = 0; i < max_appl; i++)
{
if (application[i].CDEnable)
{
if (!application[i].Id) application[i].CDEnable = 0;
else
{
sendf(&application[i], _FACILITY_R | CONFIRM, Id,
plci->number, "wws", Info, (word)3, SSparms);
if (Info) application[i].CDEnable = 0;
}
}
}
plci->internal_command = 0;
break;
case PERM_COD_HOOK: /* finished with Hook_Ind */
return;
case PERM_COD_CALL:
plci->internal_command = PERM_COD_CONN_PEND;
dbug(1, dprintf("***Codec Connect_Pending, Rc = 0x%x", rc));
return;
case PERM_COD_ASSIGN:
dbug(1, dprintf("***Codec Assign, Rc = 0x%x", rc));
plci->internal_command = 0;
if (rc != ASSIGN_OK) break;
plci->internal_command = PERM_COD_CALL;
sig_req(plci, CALL_REQ, 0);
send_req(plci);
return;
case LISTEN_SIG_ASSIGN_PEND:
if (rc == ASSIGN_OK)
{
plci->internal_command = 0;
dbug(1, dprintf("ListenCheck, new SIG_ID = 0x%x", plci->Sig.Id));
add_p(plci, ESC, "\x02\x18\x00"); /* support call waiting */
sig_req(plci, INDICATE_REQ, 0);
send_req(plci);
}
else
{
dbug(1, dprintf("ListenCheck failed (assignRc=0x%x)", rc));
a->listen_active--;
plci_remove(plci);
plci->State = IDLE;
}
break;
case USELAW_REQ:
if (global_req == ASSIGN)
{
if (rc == ASSIGN_OK)
{
sig_req(plci, LAW_REQ, 0);
send_req(plci);
dbug(1, dprintf("Auto-Law assigned"));
}
else
{
dbug(1, dprintf("Auto-Law assign failed"));
a->automatic_law = 3;
plci->internal_command = 0;
a->automatic_lawPLCI = NULL;
}
break;
}
else if (req == LAW_REQ && rc == OK)
{
dbug(1, dprintf("Auto-Law initiated"));
a->automatic_law = 2;
plci->internal_command = 0;
}
else
{
dbug(1, dprintf("Auto-Law not supported"));
a->automatic_law = 3;
plci->internal_command = 0;
sig_req(plci, REMOVE, 0);
send_req(plci);
a->automatic_lawPLCI = NULL;
}
break;
}
plci_remove_check(plci);
}
}
static void data_rc(PLCI *plci, byte ch)
{
dword Id;
DIVA_CAPI_ADAPTER *a;
NCCI *ncci_ptr;
DATA_B3_DESC *data;
word ncci;
if (plci->appl)
{
TransmitBufferFree(plci->appl, plci->data_sent_ptr);
a = plci->adapter;
ncci = a->ch_ncci[ch];
if (ncci && (a->ncci_plci[ncci] == plci->Id))
{
ncci_ptr = &(a->ncci[ncci]);
dbug(1, dprintf("data_out=%d, data_pending=%d", ncci_ptr->data_out, ncci_ptr->data_pending));
if (ncci_ptr->data_pending)
{
data = &(ncci_ptr->DBuffer[ncci_ptr->data_out]);
if (!(data->Flags & 4) && a->ncci_state[ncci])
{
Id = (((dword)ncci) << 16) | ((word)plci->Id << 8) | a->Id;
if (plci->tel) Id |= EXT_CONTROLLER;
sendf(plci->appl, _DATA_B3_R | CONFIRM, Id, data->Number,
"ww", data->Handle, 0);
}
(ncci_ptr->data_out)++;
if (ncci_ptr->data_out == MAX_DATA_B3)
ncci_ptr->data_out = 0;
(ncci_ptr->data_pending)--;
}
}
}
}
static void data_ack(PLCI *plci, byte ch)
{
dword Id;
DIVA_CAPI_ADAPTER *a;
NCCI *ncci_ptr;
word ncci;
a = plci->adapter;
ncci = a->ch_ncci[ch];
ncci_ptr = &(a->ncci[ncci]);
if (ncci_ptr->data_ack_pending)
{
if (a->ncci_state[ncci] && (a->ncci_plci[ncci] == plci->Id))
{
Id = (((dword)ncci) << 16) | ((word)plci->Id << 8) | a->Id;
if (plci->tel) Id |= EXT_CONTROLLER;
sendf(plci->appl, _DATA_B3_R | CONFIRM, Id, ncci_ptr->DataAck[ncci_ptr->data_ack_out].Number,
"ww", ncci_ptr->DataAck[ncci_ptr->data_ack_out].Handle, 0);
}
(ncci_ptr->data_ack_out)++;
if (ncci_ptr->data_ack_out == MAX_DATA_ACK)
ncci_ptr->data_ack_out = 0;
(ncci_ptr->data_ack_pending)--;
}
}
static void sig_ind(PLCI *plci)
{
dword x_Id;
dword Id;
dword rId;
word i;
word cip;
dword cip_mask;
byte *ie;
DIVA_CAPI_ADAPTER *a;
API_PARSE saved_parms[MAX_MSG_PARMS + 1];
#define MAXPARMSIDS 31
byte *parms[MAXPARMSIDS];
byte *add_i[4];
byte *multi_fac_parms[MAX_MULTI_IE];
byte *multi_pi_parms[MAX_MULTI_IE];
byte *multi_ssext_parms[MAX_MULTI_IE];
byte *multi_CiPN_parms[MAX_MULTI_IE];
byte *multi_vswitch_parms[MAX_MULTI_IE];
byte ai_len;
byte *esc_chi = "";
byte *esc_law = "";
byte *pty_cai = "";
byte *esc_cr = "";
byte *esc_profile = "";
byte facility[256];
PLCI *tplci = NULL;
byte chi[] = "\x02\x18\x01";
byte voice_cai[] = "\x06\x14\x00\x00\x00\x00\x08";
byte resume_cau[] = "\x05\x05\x00\x02\x00\x00";
/* ESC_MSGTYPE must be the last but one message, a new IE has to be */
/* included before the ESC_MSGTYPE and MAXPARMSIDS has to be incremented */
/* SMSG is situated at the end because its 0 (for compatibility reasons */
/* (see Info_Mask Bit 4, first IE. then the message type) */
word parms_id[] =
{MAXPARMSIDS, CPN, 0xff, DSA, OSA, BC, LLC, HLC, ESC_CAUSE, DSP, DT, CHA,
UUI, CONG_RR, CONG_RNR, ESC_CHI, KEY, CHI, CAU, ESC_LAW,
RDN, RDX, CONN_NR, RIN, NI, CAI, ESC_CR,
CST, ESC_PROFILE, 0xff, ESC_MSGTYPE, SMSG};
/* 14 FTY repl by ESC_CHI */
/* 18 PI repl by ESC_LAW */
/* removed OAD changed to 0xff for future use, OAD is multiIE now */
word multi_fac_id[] = {1, FTY};
word multi_pi_id[] = {1, PI};
word multi_CiPN_id[] = {1, OAD};
word multi_ssext_id[] = {1, ESC_SSEXT};
word multi_vswitch_id[] = {1, ESC_VSWITCH};
byte *cau;
word ncci;
byte SS_Ind[] = "\x05\x02\x00\x02\x00\x00"; /* Hold_Ind struct*/
byte CF_Ind[] = "\x09\x02\x00\x06\x00\x00\x00\x00\x00\x00";
byte Interr_Err_Ind[] = "\x0a\x02\x00\x07\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00";
byte CONF_Ind[] = "\x09\x16\x00\x06\x00\x00\0x00\0x00\0x00\0x00";
byte force_mt_info = false;
byte dir;
dword d;
word w;
a = plci->adapter;
Id = ((word)plci->Id << 8) | a->Id;
PUT_WORD(&SS_Ind[4], 0x0000);
if (plci->sig_remove_id)
{
plci->Sig.RNR = 2; /* discard */
dbug(1, dprintf("SIG discard while remove pending"));
return;
}
if (plci->tel && plci->SuppState != CALL_HELD) Id |= EXT_CONTROLLER;
dbug(1, dprintf("SigInd-Id=%08lx,plci=%x,tel=%x,state=0x%x,channels=%d,Discflowcl=%d",
Id, plci->Id, plci->tel, plci->State, plci->channels, plci->hangup_flow_ctrl_timer));
if (plci->Sig.Ind == CALL_HOLD_ACK && plci->channels)
{
plci->Sig.RNR = 1;
return;
}
if (plci->Sig.Ind == HANGUP && plci->channels)
{
plci->Sig.RNR = 1;
plci->hangup_flow_ctrl_timer++;
/* recover the network layer after timeout */
if (plci->hangup_flow_ctrl_timer == 100)
{
dbug(1, dprintf("Exceptional disc"));
plci->Sig.RNR = 0;
plci->hangup_flow_ctrl_timer = 0;
for (ncci = 1; ncci < MAX_NCCI + 1; ncci++)
{
if (a->ncci_plci[ncci] == plci->Id)
{
cleanup_ncci_data(plci, ncci);
if (plci->channels)plci->channels--;
if (plci->appl)
sendf(plci->appl, _DISCONNECT_B3_I, (((dword) ncci) << 16) | Id, 0, "ws", 0, "");
}
}
if (plci->appl)
sendf(plci->appl, _DISCONNECT_I, Id, 0, "w", 0);
plci_remove(plci);
plci->State = IDLE;
}
return;
}
/* do first parse the info with no OAD in, because OAD will be converted */
/* first the multiple facility IE, then mult. progress ind. */
/* then the parameters for the info_ind + conn_ind */
IndParse(plci, multi_fac_id, multi_fac_parms, MAX_MULTI_IE);
IndParse(plci, multi_pi_id, multi_pi_parms, MAX_MULTI_IE);
IndParse(plci, multi_ssext_id, multi_ssext_parms, MAX_MULTI_IE);
IndParse(plci, multi_vswitch_id, multi_vswitch_parms, MAX_MULTI_IE);
IndParse(plci, parms_id, parms, 0);
IndParse(plci, multi_CiPN_id, multi_CiPN_parms, MAX_MULTI_IE);
esc_chi = parms[14];
esc_law = parms[18];
pty_cai = parms[24];
esc_cr = parms[25];
esc_profile = parms[27];
if (esc_cr[0] && plci)
{
if (plci->cr_enquiry && plci->appl)
{
plci->cr_enquiry = false;
/* d = MANU_ID */
/* w = m_command */
/* b = total length */
/* b = indication type */
/* b = length of all IEs */
/* b = IE1 */
/* S = IE1 length + cont. */
/* b = IE2 */
/* S = IE2 length + cont. */
sendf(plci->appl,
_MANUFACTURER_I,
Id,
0,
"dwbbbbSbS", _DI_MANU_ID, plci->m_command,
2 + 1 + 1 + esc_cr[0] + 1 + 1 + esc_law[0], plci->Sig.Ind, 1 + 1 + esc_cr[0] + 1 + 1 + esc_law[0], ESC, esc_cr, ESC, esc_law);
}
}
/* create the additional info structure */
add_i[1] = parms[15]; /* KEY of additional info */
add_i[2] = parms[11]; /* UUI of additional info */
ai_len = AddInfo(add_i, multi_fac_parms, esc_chi, facility);
/* the ESC_LAW indicates if u-Law or a-Law is actually used by the card */
/* indication returns by the card if requested by the function */
/* AutomaticLaw() after driver init */
if (a->automatic_law < 4)
{
if (esc_law[0]) {
if (esc_law[2]) {
dbug(0, dprintf("u-Law selected"));
a->u_law = 1;
}
else {
dbug(0, dprintf("a-Law selected"));
a->u_law = 0;
}
a->automatic_law = 4;
if (plci == a->automatic_lawPLCI) {
plci->internal_command = 0;
sig_req(plci, REMOVE, 0);
send_req(plci);
a->automatic_lawPLCI = NULL;
}
}
if (esc_profile[0])
{
dbug(1, dprintf("[%06x] CardProfile: %lx %lx %lx %lx %lx",
UnMapController(a->Id), GET_DWORD(&esc_profile[6]),
GET_DWORD(&esc_profile[10]), GET_DWORD(&esc_profile[14]),
GET_DWORD(&esc_profile[18]), GET_DWORD(&esc_profile[46])));
a->profile.Global_Options &= 0x000000ffL;
a->profile.B1_Protocols &= 0x000003ffL;
a->profile.B2_Protocols &= 0x00001fdfL;
a->profile.B3_Protocols &= 0x000000b7L;
a->profile.Global_Options &= GET_DWORD(&esc_profile[6]) |
GL_BCHANNEL_OPERATION_SUPPORTED;
a->profile.B1_Protocols &= GET_DWORD(&esc_profile[10]);
a->profile.B2_Protocols &= GET_DWORD(&esc_profile[14]);
a->profile.B3_Protocols &= GET_DWORD(&esc_profile[18]);
a->manufacturer_features = GET_DWORD(&esc_profile[46]);
a->man_profile.private_options = 0;
if (a->manufacturer_features & MANUFACTURER_FEATURE_ECHO_CANCELLER)
{
a->man_profile.private_options |= 1L << PRIVATE_ECHO_CANCELLER;
a->profile.Global_Options |= GL_ECHO_CANCELLER_SUPPORTED;
}
if (a->manufacturer_features & MANUFACTURER_FEATURE_RTP)
a->man_profile.private_options |= 1L << PRIVATE_RTP;
a->man_profile.rtp_primary_payloads = GET_DWORD(&esc_profile[50]);
a->man_profile.rtp_additional_payloads = GET_DWORD(&esc_profile[54]);
if (a->manufacturer_features & MANUFACTURER_FEATURE_T38)
a->man_profile.private_options |= 1L << PRIVATE_T38;
if (a->manufacturer_features & MANUFACTURER_FEATURE_FAX_SUB_SEP_PWD)
a->man_profile.private_options |= 1L << PRIVATE_FAX_SUB_SEP_PWD;
if (a->manufacturer_features & MANUFACTURER_FEATURE_V18)
a->man_profile.private_options |= 1L << PRIVATE_V18;
if (a->manufacturer_features & MANUFACTURER_FEATURE_DTMF_TONE)
a->man_profile.private_options |= 1L << PRIVATE_DTMF_TONE;
if (a->manufacturer_features & MANUFACTURER_FEATURE_PIAFS)
a->man_profile.private_options |= 1L << PRIVATE_PIAFS;
if (a->manufacturer_features & MANUFACTURER_FEATURE_FAX_PAPER_FORMATS)
a->man_profile.private_options |= 1L << PRIVATE_FAX_PAPER_FORMATS;
if (a->manufacturer_features & MANUFACTURER_FEATURE_VOWN)
a->man_profile.private_options |= 1L << PRIVATE_VOWN;
if (a->manufacturer_features & MANUFACTURER_FEATURE_FAX_NONSTANDARD)
a->man_profile.private_options |= 1L << PRIVATE_FAX_NONSTANDARD;
}
else
{
a->profile.Global_Options &= 0x0000007fL;
a->profile.B1_Protocols &= 0x000003dfL;
a->profile.B2_Protocols &= 0x00001adfL;
a->profile.B3_Protocols &= 0x000000b7L;
a->manufacturer_features &= MANUFACTURER_FEATURE_HARDDTMF;
}
if (a->manufacturer_features & (MANUFACTURER_FEATURE_HARDDTMF |
MANUFACTURER_FEATURE_SOFTDTMF_SEND | MANUFACTURER_FEATURE_SOFTDTMF_RECEIVE))
{
a->profile.Global_Options |= GL_DTMF_SUPPORTED;
}
a->manufacturer_features &= ~MANUFACTURER_FEATURE_OOB_CHANNEL;
dbug(1, dprintf("[%06x] Profile: %lx %lx %lx %lx %lx",
UnMapController(a->Id), a->profile.Global_Options,
a->profile.B1_Protocols, a->profile.B2_Protocols,
a->profile.B3_Protocols, a->manufacturer_features));
}
/* codec plci for the handset/hook state support is just an internal id */
if (plci != a->AdvCodecPLCI)
{
force_mt_info = SendMultiIE(plci, Id, multi_fac_parms, FTY, 0x20, 0);
force_mt_info |= SendMultiIE(plci, Id, multi_pi_parms, PI, 0x210, 0);
SendSSExtInd(NULL, plci, Id, multi_ssext_parms);
SendInfo(plci, Id, parms, force_mt_info);
VSwitchReqInd(plci, Id, multi_vswitch_parms);
}
/* switch the codec to the b-channel */
if (esc_chi[0] && plci && !plci->SuppState) {
plci->b_channel = esc_chi[esc_chi[0]]&0x1f;
mixer_set_bchannel_id_esc(plci, plci->b_channel);
dbug(1, dprintf("storeChannel=0x%x", plci->b_channel));
if (plci->tel == ADV_VOICE && plci->appl) {
SetVoiceChannel(a->AdvCodecPLCI, esc_chi, a);
}
}
if (plci->appl) plci->appl->Number++;
switch (plci->Sig.Ind) {
/* Response to Get_Supported_Services request */
case S_SUPPORTED:
dbug(1, dprintf("S_Supported"));
if (!plci->appl) break;
if (pty_cai[0] == 4)
{
PUT_DWORD(&CF_Ind[6], GET_DWORD(&pty_cai[1]));
}
else
{
PUT_DWORD(&CF_Ind[6], MASK_TERMINAL_PORTABILITY | MASK_HOLD_RETRIEVE);
}
PUT_WORD(&CF_Ind[1], 0);
PUT_WORD(&CF_Ind[4], 0);
sendf(plci->appl, _FACILITY_R | CONFIRM, Id & 0x7, plci->number, "wws", 0, 3, CF_Ind);
plci_remove(plci);
break;
/* Supplementary Service rejected */
case S_SERVICE_REJ:
dbug(1, dprintf("S_Reject=0x%x", pty_cai[5]));
if (!pty_cai[0]) break;
switch (pty_cai[5])
{
case ECT_EXECUTE:
case THREE_PTY_END:
case THREE_PTY_BEGIN:
if (!plci->relatedPTYPLCI) break;
tplci = plci->relatedPTYPLCI;
rId = ((word)tplci->Id << 8) | tplci->adapter->Id;
if (tplci->tel) rId |= EXT_CONTROLLER;
if (pty_cai[5] == ECT_EXECUTE)
{
PUT_WORD(&SS_Ind[1], S_ECT);
plci->vswitchstate = 0;
plci->relatedPTYPLCI->vswitchstate = 0;
}
else
{
PUT_WORD(&SS_Ind[1], pty_cai[5] + 3);
}
if (pty_cai[2] != 0xff)
{
PUT_WORD(&SS_Ind[4], 0x3600 | (word)pty_cai[2]);
}
else
{
PUT_WORD(&SS_Ind[4], 0x300E);
}
plci->relatedPTYPLCI = NULL;
plci->ptyState = 0;
sendf(tplci->appl, _FACILITY_I, rId, 0, "ws", 3, SS_Ind);
break;
case CALL_DEFLECTION:
if (pty_cai[2] != 0xff)
{
PUT_WORD(&SS_Ind[4], 0x3600 | (word)pty_cai[2]);
}
else
{
PUT_WORD(&SS_Ind[4], 0x300E);
}
PUT_WORD(&SS_Ind[1], pty_cai[5]);
for (i = 0; i < max_appl; i++)
{
if (application[i].CDEnable)
{
if (application[i].Id) sendf(&application[i], _FACILITY_I, Id, 0, "ws", 3, SS_Ind);
application[i].CDEnable = false;
}
}
break;
case DEACTIVATION_DIVERSION:
case ACTIVATION_DIVERSION:
case DIVERSION_INTERROGATE_CFU:
case DIVERSION_INTERROGATE_CFB:
case DIVERSION_INTERROGATE_CFNR:
case DIVERSION_INTERROGATE_NUM:
case CCBS_REQUEST:
case CCBS_DEACTIVATE:
case CCBS_INTERROGATE:
if (!plci->appl) break;
if (pty_cai[2] != 0xff)
{
PUT_WORD(&Interr_Err_Ind[4], 0x3600 | (word)pty_cai[2]);
}
else
{
PUT_WORD(&Interr_Err_Ind[4], 0x300E);
}
switch (pty_cai[5])
{
case DEACTIVATION_DIVERSION:
dbug(1, dprintf("Deact_Div"));
Interr_Err_Ind[0] = 0x9;
Interr_Err_Ind[3] = 0x6;
PUT_WORD(&Interr_Err_Ind[1], S_CALL_FORWARDING_STOP);
break;
case ACTIVATION_DIVERSION:
dbug(1, dprintf("Act_Div"));
Interr_Err_Ind[0] = 0x9;
Interr_Err_Ind[3] = 0x6;
PUT_WORD(&Interr_Err_Ind[1], S_CALL_FORWARDING_START);
break;
case DIVERSION_INTERROGATE_CFU:
case DIVERSION_INTERROGATE_CFB:
case DIVERSION_INTERROGATE_CFNR:
dbug(1, dprintf("Interr_Div"));
Interr_Err_Ind[0] = 0xa;
Interr_Err_Ind[3] = 0x7;
PUT_WORD(&Interr_Err_Ind[1], S_INTERROGATE_DIVERSION);
break;
case DIVERSION_INTERROGATE_NUM:
dbug(1, dprintf("Interr_Num"));
Interr_Err_Ind[0] = 0xa;
Interr_Err_Ind[3] = 0x7;
PUT_WORD(&Interr_Err_Ind[1], S_INTERROGATE_NUMBERS);
break;
case CCBS_REQUEST:
dbug(1, dprintf("CCBS Request"));
Interr_Err_Ind[0] = 0xd;
Interr_Err_Ind[3] = 0xa;
PUT_WORD(&Interr_Err_Ind[1], S_CCBS_REQUEST);
break;
case CCBS_DEACTIVATE:
dbug(1, dprintf("CCBS Deactivate"));
Interr_Err_Ind[0] = 0x9;
Interr_Err_Ind[3] = 0x6;
PUT_WORD(&Interr_Err_Ind[1], S_CCBS_DEACTIVATE);
break;
case CCBS_INTERROGATE:
dbug(1, dprintf("CCBS Interrogate"));
Interr_Err_Ind[0] = 0xb;
Interr_Err_Ind[3] = 0x8;
PUT_WORD(&Interr_Err_Ind[1], S_CCBS_INTERROGATE);
break;
}
PUT_DWORD(&Interr_Err_Ind[6], plci->appl->S_Handle);
sendf(plci->appl, _FACILITY_I, Id & 0x7, 0, "ws", 3, Interr_Err_Ind);
plci_remove(plci);
break;
case ACTIVATION_MWI:
case DEACTIVATION_MWI:
if (pty_cai[5] == ACTIVATION_MWI)
{
PUT_WORD(&SS_Ind[1], S_MWI_ACTIVATE);
}
else PUT_WORD(&SS_Ind[1], S_MWI_DEACTIVATE);
if (pty_cai[2] != 0xff)
{
PUT_WORD(&SS_Ind[4], 0x3600 | (word)pty_cai[2]);
}
else
{
PUT_WORD(&SS_Ind[4], 0x300E);
}
if (plci->cr_enquiry)
{
sendf(plci->appl, _FACILITY_I, Id & 0xf, 0, "ws", 3, SS_Ind);
plci_remove(plci);
}
else
{
sendf(plci->appl, _FACILITY_I, Id, 0, "ws", 3, SS_Ind);
}
break;
case CONF_ADD: /* ERROR */
case CONF_BEGIN:
case CONF_DROP:
case CONF_ISOLATE:
case CONF_REATTACH:
CONF_Ind[0] = 9;
CONF_Ind[3] = 6;
switch (pty_cai[5])
{
case CONF_BEGIN:
PUT_WORD(&CONF_Ind[1], S_CONF_BEGIN);
plci->ptyState = 0;
break;
case CONF_DROP:
CONF_Ind[0] = 5;
CONF_Ind[3] = 2;
PUT_WORD(&CONF_Ind[1], S_CONF_DROP);
plci->ptyState = CONNECTED;
break;
case CONF_ISOLATE:
CONF_Ind[0] = 5;
CONF_Ind[3] = 2;
PUT_WORD(&CONF_Ind[1], S_CONF_ISOLATE);
plci->ptyState = CONNECTED;
break;
case CONF_REATTACH:
CONF_Ind[0] = 5;
CONF_Ind[3] = 2;
PUT_WORD(&CONF_Ind[1], S_CONF_REATTACH);
plci->ptyState = CONNECTED;
break;
case CONF_ADD:
PUT_WORD(&CONF_Ind[1], S_CONF_ADD);
plci->relatedPTYPLCI = NULL;
tplci = plci->relatedPTYPLCI;
if (tplci) tplci->ptyState = CONNECTED;
plci->ptyState = CONNECTED;
break;
}
if (pty_cai[2] != 0xff)
{
PUT_WORD(&CONF_Ind[4], 0x3600 | (word)pty_cai[2]);
}
else
{
PUT_WORD(&CONF_Ind[4], 0x3303); /* Time-out: network did not respond
within the required time */
}
PUT_DWORD(&CONF_Ind[6], 0x0);
sendf(plci->appl, _FACILITY_I, Id, 0, "ws", 3, CONF_Ind);
break;
}
break;
/* Supplementary Service indicates success */
case S_SERVICE:
dbug(1, dprintf("Service_Ind"));
PUT_WORD(&CF_Ind[4], 0);
switch (pty_cai[5])
{
case THREE_PTY_END:
case THREE_PTY_BEGIN:
case ECT_EXECUTE:
if (!plci->relatedPTYPLCI) break;
tplci = plci->relatedPTYPLCI;
rId = ((word)tplci->Id << 8) | tplci->adapter->Id;
if (tplci->tel) rId |= EXT_CONTROLLER;
if (pty_cai[5] == ECT_EXECUTE)
{
PUT_WORD(&SS_Ind[1], S_ECT);
if (plci->vswitchstate != 3)
{
plci->ptyState = IDLE;
plci->relatedPTYPLCI = NULL;
plci->ptyState = 0;
}
dbug(1, dprintf("ECT OK"));
sendf(tplci->appl, _FACILITY_I, rId, 0, "ws", 3, SS_Ind);
}
else
{
switch (plci->ptyState)
{
case S_3PTY_BEGIN:
plci->ptyState = CONNECTED;
dbug(1, dprintf("3PTY ON"));
break;
case S_3PTY_END:
plci->ptyState = IDLE;
plci->relatedPTYPLCI = NULL;
plci->ptyState = 0;
dbug(1, dprintf("3PTY OFF"));
break;
}
PUT_WORD(&SS_Ind[1], pty_cai[5] + 3);
sendf(tplci->appl, _FACILITY_I, rId, 0, "ws", 3, SS_Ind);
}
break;
case CALL_DEFLECTION:
PUT_WORD(&SS_Ind[1], pty_cai[5]);
for (i = 0; i < max_appl; i++)
{
if (application[i].CDEnable)
{
if (application[i].Id) sendf(&application[i], _FACILITY_I, Id, 0, "ws", 3, SS_Ind);
application[i].CDEnable = false;
}
}
break;
case DEACTIVATION_DIVERSION:
case ACTIVATION_DIVERSION:
if (!plci->appl) break;
PUT_WORD(&CF_Ind[1], pty_cai[5] + 2);
PUT_DWORD(&CF_Ind[6], plci->appl->S_Handle);
sendf(plci->appl, _FACILITY_I, Id & 0x7, 0, "ws", 3, CF_Ind);
plci_remove(plci);
break;
case DIVERSION_INTERROGATE_CFU:
case DIVERSION_INTERROGATE_CFB:
case DIVERSION_INTERROGATE_CFNR:
case DIVERSION_INTERROGATE_NUM:
case CCBS_REQUEST:
case CCBS_DEACTIVATE:
case CCBS_INTERROGATE:
if (!plci->appl) break;
switch (pty_cai[5])
{
case DIVERSION_INTERROGATE_CFU:
case DIVERSION_INTERROGATE_CFB:
case DIVERSION_INTERROGATE_CFNR:
dbug(1, dprintf("Interr_Div"));
PUT_WORD(&pty_cai[1], S_INTERROGATE_DIVERSION);
pty_cai[3] = pty_cai[0] - 3; /* Supplementary Service-specific parameter len */
break;
case DIVERSION_INTERROGATE_NUM:
dbug(1, dprintf("Interr_Num"));
PUT_WORD(&pty_cai[1], S_INTERROGATE_NUMBERS);
pty_cai[3] = pty_cai[0] - 3; /* Supplementary Service-specific parameter len */
break;
case CCBS_REQUEST:
dbug(1, dprintf("CCBS Request"));
PUT_WORD(&pty_cai[1], S_CCBS_REQUEST);
pty_cai[3] = pty_cai[0] - 3; /* Supplementary Service-specific parameter len */
break;
case CCBS_DEACTIVATE:
dbug(1, dprintf("CCBS Deactivate"));
PUT_WORD(&pty_cai[1], S_CCBS_DEACTIVATE);
pty_cai[3] = pty_cai[0] - 3; /* Supplementary Service-specific parameter len */
break;
case CCBS_INTERROGATE:
dbug(1, dprintf("CCBS Interrogate"));
PUT_WORD(&pty_cai[1], S_CCBS_INTERROGATE);
pty_cai[3] = pty_cai[0] - 3; /* Supplementary Service-specific parameter len */
break;
}
PUT_WORD(&pty_cai[4], 0); /* Supplementary Service Reason */
PUT_DWORD(&pty_cai[6], plci->appl->S_Handle);
sendf(plci->appl, _FACILITY_I, Id & 0x7, 0, "wS", 3, pty_cai);
plci_remove(plci);
break;
case ACTIVATION_MWI:
case DEACTIVATION_MWI:
if (pty_cai[5] == ACTIVATION_MWI)
{
PUT_WORD(&SS_Ind[1], S_MWI_ACTIVATE);
}
else PUT_WORD(&SS_Ind[1], S_MWI_DEACTIVATE);
if (plci->cr_enquiry)
{
sendf(plci->appl, _FACILITY_I, Id & 0xf, 0, "ws", 3, SS_Ind);
plci_remove(plci);
}
else
{
sendf(plci->appl, _FACILITY_I, Id, 0, "ws", 3, SS_Ind);
}
break;
case MWI_INDICATION:
if (pty_cai[0] >= 0x12)
{
PUT_WORD(&pty_cai[3], S_MWI_INDICATE);
pty_cai[2] = pty_cai[0] - 2; /* len Parameter */
pty_cai[5] = pty_cai[0] - 5; /* Supplementary Service-specific parameter len */
if (plci->appl && (a->Notification_Mask[plci->appl->Id - 1] & SMASK_MWI))
{
if (plci->internal_command == GET_MWI_STATE) /* result on Message Waiting Listen */
{
sendf(plci->appl, _FACILITY_I, Id & 0xf, 0, "wS", 3, &pty_cai[2]);
plci_remove(plci);
return;
}
else sendf(plci->appl, _FACILITY_I, Id, 0, "wS", 3, &pty_cai[2]);
pty_cai[0] = 0;
}
else
{
for (i = 0; i < max_appl; i++)
{
if (a->Notification_Mask[i]&SMASK_MWI)
{
sendf(&application[i], _FACILITY_I, Id & 0x7, 0, "wS", 3, &pty_cai[2]);
pty_cai[0] = 0;
}
}
}
if (!pty_cai[0])
{ /* acknowledge */
facility[2] = 0; /* returncode */
}
else facility[2] = 0xff;
}
else
{
/* reject */
facility[2] = 0xff; /* returncode */
}
facility[0] = 2;
facility[1] = MWI_RESPONSE; /* Function */
add_p(plci, CAI, facility);
add_p(plci, ESC, multi_ssext_parms[0]); /* remembered parameter -> only one possible */
sig_req(plci, S_SERVICE, 0);
send_req(plci);
plci->command = 0;
next_internal_command(Id, plci);
break;
case CONF_ADD: /* OK */
case CONF_BEGIN:
case CONF_DROP:
case CONF_ISOLATE:
case CONF_REATTACH:
case CONF_PARTYDISC:
CONF_Ind[0] = 9;
CONF_Ind[3] = 6;
switch (pty_cai[5])
{
case CONF_BEGIN:
PUT_WORD(&CONF_Ind[1], S_CONF_BEGIN);
if (pty_cai[0] == 6)
{
d = pty_cai[6];
PUT_DWORD(&CONF_Ind[6], d); /* PartyID */
}
else
{
PUT_DWORD(&CONF_Ind[6], 0x0);
}
break;
case CONF_ISOLATE:
PUT_WORD(&CONF_Ind[1], S_CONF_ISOLATE);
CONF_Ind[0] = 5;
CONF_Ind[3] = 2;
break;
case CONF_REATTACH:
PUT_WORD(&CONF_Ind[1], S_CONF_REATTACH);
CONF_Ind[0] = 5;
CONF_Ind[3] = 2;
break;
case CONF_DROP:
PUT_WORD(&CONF_Ind[1], S_CONF_DROP);
CONF_Ind[0] = 5;
CONF_Ind[3] = 2;
break;
case CONF_ADD:
PUT_WORD(&CONF_Ind[1], S_CONF_ADD);
d = pty_cai[6];
PUT_DWORD(&CONF_Ind[6], d); /* PartyID */
tplci = plci->relatedPTYPLCI;
if (tplci) tplci->ptyState = CONNECTED;
break;
case CONF_PARTYDISC:
CONF_Ind[0] = 7;
CONF_Ind[3] = 4;
PUT_WORD(&CONF_Ind[1], S_CONF_PARTYDISC);
d = pty_cai[6];
PUT_DWORD(&CONF_Ind[4], d); /* PartyID */
break;
}
plci->ptyState = CONNECTED;
sendf(plci->appl, _FACILITY_I, Id, 0, "ws", 3, CONF_Ind);
break;
case CCBS_INFO_RETAIN:
case CCBS_ERASECALLLINKAGEID:
case CCBS_STOP_ALERTING:
CONF_Ind[0] = 5;
CONF_Ind[3] = 2;
switch (pty_cai[5])
{
case CCBS_INFO_RETAIN:
PUT_WORD(&CONF_Ind[1], S_CCBS_INFO_RETAIN);
break;
case CCBS_STOP_ALERTING:
PUT_WORD(&CONF_Ind[1], S_CCBS_STOP_ALERTING);
break;
case CCBS_ERASECALLLINKAGEID:
PUT_WORD(&CONF_Ind[1], S_CCBS_ERASECALLLINKAGEID);
CONF_Ind[0] = 7;
CONF_Ind[3] = 4;
CONF_Ind[6] = 0;
CONF_Ind[7] = 0;
break;
}
w = pty_cai[6];
PUT_WORD(&CONF_Ind[4], w); /* PartyID */
if (plci->appl && (a->Notification_Mask[plci->appl->Id - 1] & SMASK_CCBS))
{
sendf(plci->appl, _FACILITY_I, Id, 0, "ws", 3, CONF_Ind);
}
else
{
for (i = 0; i < max_appl; i++)
if (a->Notification_Mask[i] & SMASK_CCBS)
sendf(&application[i], _FACILITY_I, Id & 0x7, 0, "ws", 3, CONF_Ind);
}
break;
}
break;
case CALL_HOLD_REJ:
cau = parms[7];
if (cau)
{
i = _L3_CAUSE | cau[2];
if (cau[2] == 0) i = 0x3603;
}
else
{
i = 0x3603;
}
PUT_WORD(&SS_Ind[1], S_HOLD);
PUT_WORD(&SS_Ind[4], i);
if (plci->SuppState == HOLD_REQUEST)
{
plci->SuppState = IDLE;
sendf(plci->appl, _FACILITY_I, Id, 0, "ws", 3, SS_Ind);
}
break;
case CALL_HOLD_ACK:
if (plci->SuppState == HOLD_REQUEST)
{
plci->SuppState = CALL_HELD;
CodecIdCheck(a, plci);
start_internal_command(Id, plci, hold_save_command);
}
break;
case CALL_RETRIEVE_REJ:
cau = parms[7];
if (cau)
{
i = _L3_CAUSE | cau[2];
if (cau[2] == 0) i = 0x3603;
}
else
{
i = 0x3603;
}
PUT_WORD(&SS_Ind[1], S_RETRIEVE);
PUT_WORD(&SS_Ind[4], i);
if (plci->SuppState == RETRIEVE_REQUEST)
{
plci->SuppState = CALL_HELD;
CodecIdCheck(a, plci);
sendf(plci->appl, _FACILITY_I, Id, 0, "ws", 3, SS_Ind);
}
break;
case CALL_RETRIEVE_ACK:
PUT_WORD(&SS_Ind[1], S_RETRIEVE);
if (plci->SuppState == RETRIEVE_REQUEST)
{
plci->SuppState = IDLE;
plci->call_dir |= CALL_DIR_FORCE_OUTG_NL;
plci->b_channel = esc_chi[esc_chi[0]]&0x1f;
if (plci->tel)
{
mixer_set_bchannel_id_esc(plci, plci->b_channel);
dbug(1, dprintf("RetrChannel=0x%x", plci->b_channel));
SetVoiceChannel(a->AdvCodecPLCI, esc_chi, a);
if (plci->B2_prot == B2_TRANSPARENT && plci->B3_prot == B3_TRANSPARENT)
{
dbug(1, dprintf("Get B-ch"));
start_internal_command(Id, plci, retrieve_restore_command);
}
else
sendf(plci->appl, _FACILITY_I, Id, 0, "ws", 3, SS_Ind);
}
else
start_internal_command(Id, plci, retrieve_restore_command);
}
break;
case INDICATE_IND:
if (plci->State != LISTENING) {
sig_req(plci, HANGUP, 0);
send_req(plci);
break;
}
cip = find_cip(a, parms[4], parms[6]);
cip_mask = 1L << cip;
dbug(1, dprintf("cip=%d,cip_mask=%lx", cip, cip_mask));
clear_c_ind_mask(plci);
if (!remove_started && !a->adapter_disabled)
{
set_c_ind_mask_bit(plci, MAX_APPL);
group_optimization(a, plci);
for (i = 0; i < max_appl; i++) {
if (application[i].Id
&& (a->CIP_Mask[i] & 1 || a->CIP_Mask[i] & cip_mask)
&& CPN_filter_ok(parms[0], a, i)
&& test_group_ind_mask_bit(plci, i)) {
dbug(1, dprintf("storedcip_mask[%d]=0x%lx", i, a->CIP_Mask[i]));
set_c_ind_mask_bit(plci, i);
dump_c_ind_mask(plci);
plci->State = INC_CON_PENDING;
plci->call_dir = (plci->call_dir & ~(CALL_DIR_OUT | CALL_DIR_ORIGINATE)) |
CALL_DIR_IN | CALL_DIR_ANSWER;
if (esc_chi[0]) {
plci->b_channel = esc_chi[esc_chi[0]] & 0x1f;
mixer_set_bchannel_id_esc(plci, plci->b_channel);
}
/* if a listen on the ext controller is done, check if hook states */
/* are supported or if just a on board codec must be activated */
if (a->codec_listen[i] && !a->AdvSignalPLCI) {
if (a->profile.Global_Options & HANDSET)
plci->tel = ADV_VOICE;
else if (a->profile.Global_Options & ON_BOARD_CODEC)
plci->tel = CODEC;
if (plci->tel) Id |= EXT_CONTROLLER;
a->codec_listen[i] = plci;
}
sendf(&application[i], _CONNECT_I, Id, 0,
"wSSSSSSSbSSSSS", cip, /* CIP */
parms[0], /* CalledPartyNumber */
multi_CiPN_parms[0], /* CallingPartyNumber */
parms[2], /* CalledPartySubad */
parms[3], /* CallingPartySubad */
parms[4], /* BearerCapability */
parms[5], /* LowLC */
parms[6], /* HighLC */
ai_len, /* nested struct add_i */
add_i[0], /* B channel info */
add_i[1], /* keypad facility */
add_i[2], /* user user data */
add_i[3], /* nested facility */
multi_CiPN_parms[1] /* second CiPN(SCR) */
);
SendSSExtInd(&application[i],
plci,
Id,
multi_ssext_parms);
SendSetupInfo(&application[i],
plci,
Id,
parms,
SendMultiIE(plci, Id, multi_pi_parms, PI, 0x210, true));
}
}
clear_c_ind_mask_bit(plci, MAX_APPL);
dump_c_ind_mask(plci);
}
if (c_ind_mask_empty(plci)) {
sig_req(plci, HANGUP, 0);
send_req(plci);
plci->State = IDLE;
}
plci->notifiedcall = 0;
a->listen_active--;
listen_check(a);
break;
case CALL_PEND_NOTIFY:
plci->notifiedcall = 1;
listen_check(a);
break;
case CALL_IND:
case CALL_CON:
if (plci->State == ADVANCED_VOICE_SIG || plci->State == ADVANCED_VOICE_NOSIG)
{
if (plci->internal_command == PERM_COD_CONN_PEND)
{
if (plci->State == ADVANCED_VOICE_NOSIG)
{
dbug(1, dprintf("***Codec OK"));
if (a->AdvSignalPLCI)
{
tplci = a->AdvSignalPLCI;
if (tplci->spoofed_msg)
{
dbug(1, dprintf("***Spoofed Msg(0x%x)", tplci->spoofed_msg));
tplci->command = 0;
tplci->internal_command = 0;
x_Id = ((word)tplci->Id << 8) | tplci->adapter->Id | 0x80;
switch (tplci->spoofed_msg)
{
case CALL_RES:
tplci->command = _CONNECT_I | RESPONSE;
api_load_msg(&tplci->saved_msg, saved_parms);
add_b1(tplci, &saved_parms[1], 0, tplci->B1_facilities);
if (tplci->adapter->Info_Mask[tplci->appl->Id - 1] & 0x200)
{
/* early B3 connect (CIP mask bit 9) no release after a disc */
add_p(tplci, LLI, "\x01\x01");
}
add_s(tplci, CONN_NR, &saved_parms[2]);
add_s(tplci, LLC, &saved_parms[4]);
add_ai(tplci, &saved_parms[5]);
tplci->State = INC_CON_ACCEPT;
sig_req(tplci, CALL_RES, 0);
send_req(tplci);
break;
case AWAITING_SELECT_B:
dbug(1, dprintf("Select_B continue"));
start_internal_command(x_Id, tplci, select_b_command);
break;
case AWAITING_MANUF_CON: /* Get_Plci per Manufacturer_Req to ext controller */
if (!tplci->Sig.Id)
{
dbug(1, dprintf("No SigID!"));
sendf(tplci->appl, _MANUFACTURER_R | CONFIRM, x_Id, tplci->number, "dww", _DI_MANU_ID, _MANUFACTURER_R, _OUT_OF_PLCI);
plci_remove(tplci);
break;
}
tplci->command = _MANUFACTURER_R;
api_load_msg(&tplci->saved_msg, saved_parms);
dir = saved_parms[2].info[0];
if (dir == 1) {
sig_req(tplci, CALL_REQ, 0);
}
else if (!dir) {
sig_req(tplci, LISTEN_REQ, 0);
}
send_req(tplci);
sendf(tplci->appl, _MANUFACTURER_R | CONFIRM, x_Id, tplci->number, "dww", _DI_MANU_ID, _MANUFACTURER_R, 0);
break;
case (CALL_REQ | AWAITING_MANUF_CON):
sig_req(tplci, CALL_REQ, 0);
send_req(tplci);
break;
case CALL_REQ:
if (!tplci->Sig.Id)
{
dbug(1, dprintf("No SigID!"));
sendf(tplci->appl, _CONNECT_R | CONFIRM, tplci->adapter->Id, 0, "w", _OUT_OF_PLCI);
plci_remove(tplci);
break;
}
tplci->command = _CONNECT_R;
api_load_msg(&tplci->saved_msg, saved_parms);
add_s(tplci, CPN, &saved_parms[1]);
add_s(tplci, DSA, &saved_parms[3]);
add_ai(tplci, &saved_parms[9]);
sig_req(tplci, CALL_REQ, 0);
send_req(tplci);
break;
case CALL_RETRIEVE:
tplci->command = C_RETRIEVE_REQ;
sig_req(tplci, CALL_RETRIEVE, 0);
send_req(tplci);
break;
}
tplci->spoofed_msg = 0;
if (tplci->internal_command == 0)
next_internal_command(x_Id, tplci);
}
}
next_internal_command(Id, plci);
break;
}
dbug(1, dprintf("***Codec Hook Init Req"));
plci->internal_command = PERM_COD_HOOK;
add_p(plci, FTY, "\x01\x09"); /* Get Hook State*/
sig_req(plci, TEL_CTRL, 0);
send_req(plci);
}
}
else if (plci->command != _MANUFACTURER_R /* old style permanent connect */
&& plci->State != INC_ACT_PENDING)
{
mixer_set_bchannel_id_esc(plci, plci->b_channel);
if (plci->tel == ADV_VOICE && plci->SuppState == IDLE) /* with permanent codec switch on immediately */
{
chi[2] = plci->b_channel;
SetVoiceChannel(a->AdvCodecPLCI, chi, a);
}
sendf(plci->appl, _CONNECT_ACTIVE_I, Id, 0, "Sss", parms[21], "", "");
plci->State = INC_ACT_PENDING;
}
break;
case TEL_CTRL:
ie = multi_fac_parms[0]; /* inspect the facility hook indications */
if (plci->State == ADVANCED_VOICE_SIG && ie[0]) {
switch (ie[1] & 0x91) {
case 0x80: /* hook off */
case 0x81:
if (plci->internal_command == PERM_COD_HOOK)
{
dbug(1, dprintf("init:hook_off"));
plci->hook_state = ie[1];
next_internal_command(Id, plci);
break;
}
else /* ignore doubled hook indications */
{
if (((plci->hook_state) & 0xf0) == 0x80)
{
dbug(1, dprintf("ignore hook"));
break;
}
plci->hook_state = ie[1]&0x91;
}
/* check for incoming call pending */
/* and signal '+'.Appl must decide */
/* with connect_res if call must */
/* accepted or not */
for (i = 0, tplci = NULL; i < max_appl; i++) {
if (a->codec_listen[i]
&& (a->codec_listen[i]->State == INC_CON_PENDING
|| a->codec_listen[i]->State == INC_CON_ALERT)) {
tplci = a->codec_listen[i];
tplci->appl = &application[i];
}
}
/* no incoming call, do outgoing call */
/* and signal '+' if outg. setup */
if (!a->AdvSignalPLCI && !tplci) {
if ((i = get_plci(a))) {
a->AdvSignalPLCI = &a->plci[i - 1];
tplci = a->AdvSignalPLCI;
tplci->tel = ADV_VOICE;
PUT_WORD(&voice_cai[5], a->AdvSignalAppl->MaxDataLength);
if (a->Info_Mask[a->AdvSignalAppl->Id - 1] & 0x200) {
/* early B3 connect (CIP mask bit 9) no release after a disc */
add_p(tplci, LLI, "\x01\x01");
}
add_p(tplci, CAI, voice_cai);
add_p(tplci, OAD, a->TelOAD);
add_p(tplci, OSA, a->TelOSA);
add_p(tplci, SHIFT | 6, NULL);
add_p(tplci, SIN, "\x02\x01\x00");
add_p(tplci, UID, "\x06\x43\x61\x70\x69\x32\x30");
sig_req(tplci, ASSIGN, DSIG_ID);
a->AdvSignalPLCI->internal_command = HOOK_OFF_REQ;
a->AdvSignalPLCI->command = 0;
tplci->appl = a->AdvSignalAppl;
tplci->call_dir = CALL_DIR_OUT | CALL_DIR_ORIGINATE;
send_req(tplci);
}
}
if (!tplci) break;
Id = ((word)tplci->Id << 8) | a->Id;
Id |= EXT_CONTROLLER;
sendf(tplci->appl,
_FACILITY_I,
Id,
0,
"ws", (word)0, "\x01+");
break;
case 0x90: /* hook on */
case 0x91:
if (plci->internal_command == PERM_COD_HOOK)
{
dbug(1, dprintf("init:hook_on"));
plci->hook_state = ie[1] & 0x91;
next_internal_command(Id, plci);
break;
}
else /* ignore doubled hook indications */
{
if (((plci->hook_state) & 0xf0) == 0x90) break;
plci->hook_state = ie[1] & 0x91;
}
/* hangup the adv. voice call and signal '-' to the appl */
if (a->AdvSignalPLCI) {
Id = ((word)a->AdvSignalPLCI->Id << 8) | a->Id;
if (plci->tel) Id |= EXT_CONTROLLER;
sendf(a->AdvSignalAppl,
_FACILITY_I,
Id,
0,
"ws", (word)0, "\x01-");
a->AdvSignalPLCI->internal_command = HOOK_ON_REQ;
a->AdvSignalPLCI->command = 0;
sig_req(a->AdvSignalPLCI, HANGUP, 0);
send_req(a->AdvSignalPLCI);
}
break;
}
}
break;
case RESUME:
clear_c_ind_mask_bit(plci, (word)(plci->appl->Id - 1));
PUT_WORD(&resume_cau[4], GOOD);
sendf(plci->appl, _FACILITY_I, Id, 0, "ws", (word)3, resume_cau);
break;
case SUSPEND:
clear_c_ind_mask(plci);
if (plci->NL.Id && !plci->nl_remove_id) {
mixer_remove(plci);
nl_req_ncci(plci, REMOVE, 0);
}
if (!plci->sig_remove_id) {
plci->internal_command = 0;
sig_req(plci, REMOVE, 0);
}
send_req(plci);
if (!plci->channels) {
sendf(plci->appl, _FACILITY_I, Id, 0, "ws", (word)3, "\x05\x04\x00\x02\x00\x00");
sendf(plci->appl, _DISCONNECT_I, Id, 0, "w", 0);
}
break;
case SUSPEND_REJ:
break;
case HANGUP:
plci->hangup_flow_ctrl_timer = 0;
if (plci->manufacturer && plci->State == LOCAL_CONNECT) break;
cau = parms[7];
if (cau) {
i = _L3_CAUSE | cau[2];
if (cau[2] == 0) i = 0;
else if (cau[2] == 8) i = _L1_ERROR;
else if (cau[2] == 9 || cau[2] == 10) i = _L2_ERROR;
else if (cau[2] == 5) i = _CAPI_GUARD_ERROR;
}
else {
i = _L3_ERROR;
}
if (plci->State == INC_CON_PENDING || plci->State == INC_CON_ALERT)
{
for (i = 0; i < max_appl; i++)
{
if (test_c_ind_mask_bit(plci, i))
sendf(&application[i], _DISCONNECT_I, Id, 0, "w", 0);
}
}
else
{
clear_c_ind_mask(plci);
}
if (!plci->appl)
{
if (plci->State == LISTENING)
{
plci->notifiedcall = 0;
a->listen_active--;
}
plci->State = INC_DIS_PENDING;
if (c_ind_mask_empty(plci))
{
plci->State = IDLE;
if (plci->NL.Id && !plci->nl_remove_id)
{
mixer_remove(plci);
nl_req_ncci(plci, REMOVE, 0);
}
if (!plci->sig_remove_id)
{
plci->internal_command = 0;
sig_req(plci, REMOVE, 0);
}
send_req(plci);
}
}
else
{
/* collision of DISCONNECT or CONNECT_RES with HANGUP can */
/* result in a second HANGUP! Don't generate another */
/* DISCONNECT */
if (plci->State != IDLE && plci->State != INC_DIS_PENDING)
{
if (plci->State == RESUMING)
{
PUT_WORD(&resume_cau[4], i);
sendf(plci->appl, _FACILITY_I, Id, 0, "ws", (word)3, resume_cau);
}
plci->State = INC_DIS_PENDING;
sendf(plci->appl, _DISCONNECT_I, Id, 0, "w", i);
}
}
break;
case SSEXT_IND:
SendSSExtInd(NULL, plci, Id, multi_ssext_parms);
break;
case VSWITCH_REQ:
VSwitchReqInd(plci, Id, multi_vswitch_parms);
break;
case VSWITCH_IND:
if (plci->relatedPTYPLCI &&
plci->vswitchstate == 3 &&
plci->relatedPTYPLCI->vswitchstate == 3 &&
parms[MAXPARMSIDS - 1][0])
{
add_p(plci->relatedPTYPLCI, SMSG, parms[MAXPARMSIDS - 1]);
sig_req(plci->relatedPTYPLCI, VSWITCH_REQ, 0);
send_req(plci->relatedPTYPLCI);
}
else VSwitchReqInd(plci, Id, multi_vswitch_parms);
break;
}
}
static void SendSetupInfo(APPL *appl, PLCI *plci, dword Id, byte **parms, byte Info_Sent_Flag)
{
word i;
byte *ie;
word Info_Number;
byte *Info_Element;
word Info_Mask = 0;
dbug(1, dprintf("SetupInfo"));
for (i = 0; i < MAXPARMSIDS; i++) {
ie = parms[i];
Info_Number = 0;
Info_Element = ie;
if (ie[0]) {
switch (i) {
case 0:
dbug(1, dprintf("CPN "));
Info_Number = 0x0070;
Info_Mask = 0x80;
Info_Sent_Flag = true;
break;
case 8: /* display */
dbug(1, dprintf("display(%d)", i));
Info_Number = 0x0028;
Info_Mask = 0x04;
Info_Sent_Flag = true;
break;
case 16: /* Channel Id */
dbug(1, dprintf("CHI"));
Info_Number = 0x0018;
Info_Mask = 0x100;
Info_Sent_Flag = true;
mixer_set_bchannel_id(plci, Info_Element);
break;
case 19: /* Redirected Number */
dbug(1, dprintf("RDN"));
Info_Number = 0x0074;
Info_Mask = 0x400;
Info_Sent_Flag = true;
break;
case 20: /* Redirected Number extended */
dbug(1, dprintf("RDX"));
Info_Number = 0x0073;
Info_Mask = 0x400;
Info_Sent_Flag = true;
break;
case 22: /* Redirecing Number */
dbug(1, dprintf("RIN"));
Info_Number = 0x0076;
Info_Mask = 0x400;
Info_Sent_Flag = true;
break;
default:
Info_Number = 0;
break;
}
}
if (i == MAXPARMSIDS - 2) { /* to indicate the message type "Setup" */
Info_Number = 0x8000 | 5;
Info_Mask = 0x10;
Info_Element = "";
}
if (Info_Sent_Flag && Info_Number) {
if (plci->adapter->Info_Mask[appl->Id - 1] & Info_Mask) {
sendf(appl, _INFO_I, Id, 0, "wS", Info_Number, Info_Element);
}
}
}
}
static void SendInfo(PLCI *plci, dword Id, byte **parms, byte iesent)
{
word i;
word j;
word k;
byte *ie;
word Info_Number;
byte *Info_Element;
word Info_Mask = 0;
static byte charges[5] = {4, 0, 0, 0, 0};
static byte cause[] = {0x02, 0x80, 0x00};
APPL *appl;
dbug(1, dprintf("InfoParse "));
if (
!plci->appl
&& !plci->State
&& plci->Sig.Ind != NCR_FACILITY
)
{
dbug(1, dprintf("NoParse "));
return;
}
cause[2] = 0;
for (i = 0; i < MAXPARMSIDS; i++) {
ie = parms[i];
Info_Number = 0;
Info_Element = ie;
if (ie[0]) {
switch (i) {
case 0:
dbug(1, dprintf("CPN "));
Info_Number = 0x0070;
Info_Mask = 0x80;
break;
case 7: /* ESC_CAU */
dbug(1, dprintf("cau(0x%x)", ie[2]));
Info_Number = 0x0008;
Info_Mask = 0x00;
cause[2] = ie[2];
Info_Element = NULL;
break;
case 8: /* display */
dbug(1, dprintf("display(%d)", i));
Info_Number = 0x0028;
Info_Mask = 0x04;
break;
case 9: /* Date display */
dbug(1, dprintf("date(%d)", i));
Info_Number = 0x0029;
Info_Mask = 0x02;
break;
case 10: /* charges */
for (j = 0; j < 4; j++) charges[1 + j] = 0;
for (j = 0; j < ie[0] && !(ie[1 + j] & 0x80); j++);
for (k = 1, j++; j < ie[0] && k <= 4; j++, k++) charges[k] = ie[1 + j];
Info_Number = 0x4000;
Info_Mask = 0x40;
Info_Element = charges;
break;
case 11: /* user user info */
dbug(1, dprintf("uui"));
Info_Number = 0x007E;
Info_Mask = 0x08;
break;
case 12: /* congestion receiver ready */
dbug(1, dprintf("clRDY"));
Info_Number = 0x00B0;
Info_Mask = 0x08;
Info_Element = "";
break;
case 13: /* congestion receiver not ready */
dbug(1, dprintf("clNRDY"));
Info_Number = 0x00BF;
Info_Mask = 0x08;
Info_Element = "";
break;
case 15: /* Keypad Facility */
dbug(1, dprintf("KEY"));
Info_Number = 0x002C;
Info_Mask = 0x20;
break;
case 16: /* Channel Id */
dbug(1, dprintf("CHI"));
Info_Number = 0x0018;
Info_Mask = 0x100;
mixer_set_bchannel_id(plci, Info_Element);
break;
case 17: /* if no 1tr6 cause, send full cause, else esc_cause */
dbug(1, dprintf("q9cau(0x%x)", ie[2]));
if (!cause[2] || cause[2] < 0x80) break; /* eg. layer 1 error */
Info_Number = 0x0008;
Info_Mask = 0x01;
if (cause[2] != ie[2]) Info_Element = cause;
break;
case 19: /* Redirected Number */
dbug(1, dprintf("RDN"));
Info_Number = 0x0074;
Info_Mask = 0x400;
break;
case 22: /* Redirecing Number */
dbug(1, dprintf("RIN"));
Info_Number = 0x0076;
Info_Mask = 0x400;
break;
case 23: /* Notification Indicator */
dbug(1, dprintf("NI"));
Info_Number = (word)NI;
Info_Mask = 0x210;
break;
case 26: /* Call State */
dbug(1, dprintf("CST"));
Info_Number = (word)CST;
Info_Mask = 0x01; /* do with cause i.e. for now */
break;
case MAXPARMSIDS - 2: /* Escape Message Type, must be the last indication */
dbug(1, dprintf("ESC/MT[0x%x]", ie[3]));
Info_Number = 0x8000 | ie[3];
if (iesent) Info_Mask = 0xffff;
else Info_Mask = 0x10;
Info_Element = "";
break;
default:
Info_Number = 0;
Info_Mask = 0;
Info_Element = "";
break;
}
}
if (plci->Sig.Ind == NCR_FACILITY) /* check controller broadcast */
{
for (j = 0; j < max_appl; j++)
{
appl = &application[j];
if (Info_Number
&& appl->Id
&& plci->adapter->Info_Mask[appl->Id - 1] & Info_Mask)
{
dbug(1, dprintf("NCR_Ind"));
iesent = true;
sendf(&application[j], _INFO_I, Id & 0x0f, 0, "wS", Info_Number, Info_Element);
}
}
}
else if (!plci->appl)
{ /* overlap receiving broadcast */
if (Info_Number == CPN
|| Info_Number == KEY
|| Info_Number == NI
|| Info_Number == DSP
|| Info_Number == UUI)
{
for (j = 0; j < max_appl; j++)
{
if (test_c_ind_mask_bit(plci, j))
{
dbug(1, dprintf("Ovl_Ind"));
iesent = true;
sendf(&application[j], _INFO_I, Id, 0, "wS", Info_Number, Info_Element);
}
}
}
} /* all other signalling states */
else if (Info_Number
&& plci->adapter->Info_Mask[plci->appl->Id - 1] & Info_Mask)
{
dbug(1, dprintf("Std_Ind"));
iesent = true;
sendf(plci->appl, _INFO_I, Id, 0, "wS", Info_Number, Info_Element);
}
}
}
static byte SendMultiIE(PLCI *plci, dword Id, byte **parms, byte ie_type,
dword info_mask, byte setupParse)
{
word i;
word j;
byte *ie;
word Info_Number;
byte *Info_Element;
APPL *appl;
word Info_Mask = 0;
byte iesent = 0;
if (
!plci->appl
&& !plci->State
&& plci->Sig.Ind != NCR_FACILITY
&& !setupParse
)
{
dbug(1, dprintf("NoM-IEParse "));
return 0;
}
dbug(1, dprintf("M-IEParse "));
for (i = 0; i < MAX_MULTI_IE; i++)
{
ie = parms[i];
Info_Number = 0;
Info_Element = ie;
if (ie[0])
{
dbug(1, dprintf("[Ind0x%x]:IE=0x%x", plci->Sig.Ind, ie_type));
Info_Number = (word)ie_type;
Info_Mask = (word)info_mask;
}
if (plci->Sig.Ind == NCR_FACILITY) /* check controller broadcast */
{
for (j = 0; j < max_appl; j++)
{
appl = &application[j];
if (Info_Number
&& appl->Id
&& plci->adapter->Info_Mask[appl->Id - 1] & Info_Mask)
{
iesent = true;
dbug(1, dprintf("Mlt_NCR_Ind"));
sendf(&application[j], _INFO_I, Id & 0x0f, 0, "wS", Info_Number, Info_Element);
}
}
}
else if (!plci->appl && Info_Number)
{ /* overlap receiving broadcast */
for (j = 0; j < max_appl; j++)
{
if (test_c_ind_mask_bit(plci, j))
{
iesent = true;
dbug(1, dprintf("Mlt_Ovl_Ind"));
sendf(&application[j] , _INFO_I, Id, 0, "wS", Info_Number, Info_Element);
}
}
} /* all other signalling states */
else if (Info_Number
&& plci->adapter->Info_Mask[plci->appl->Id - 1] & Info_Mask)
{
iesent = true;
dbug(1, dprintf("Mlt_Std_Ind"));
sendf(plci->appl, _INFO_I, Id, 0, "wS", Info_Number, Info_Element);
}
}
return iesent;
}
static void SendSSExtInd(APPL *appl, PLCI *plci, dword Id, byte **parms)
{
word i;
/* Format of multi_ssext_parms[i][]:
0 byte length
1 byte SSEXTIE
2 byte SSEXT_REQ/SSEXT_IND
3 byte length
4 word SSExtCommand
6... Params
*/
if (
plci
&& plci->State
&& plci->Sig.Ind != NCR_FACILITY
)
for (i = 0; i < MAX_MULTI_IE; i++)
{
if (parms[i][0] < 6) continue;
if (parms[i][2] == SSEXT_REQ) continue;
if (appl)
{
parms[i][0] = 0; /* kill it */
sendf(appl, _MANUFACTURER_I,
Id,
0,
"dwS",
_DI_MANU_ID,
_DI_SSEXT_CTRL,
&parms[i][3]);
}
else if (plci->appl)
{
parms[i][0] = 0; /* kill it */
sendf(plci->appl, _MANUFACTURER_I,
Id,
0,
"dwS",
_DI_MANU_ID,
_DI_SSEXT_CTRL,
&parms[i][3]);
}
}
};
static void nl_ind(PLCI *plci)
{
byte ch;
word ncci;
dword Id;
DIVA_CAPI_ADAPTER *a;
word NCCIcode;
APPL *APPLptr;
word count;
word Num;
word i, ncpi_state;
byte len, ncci_state;
word msg;
word info = 0;
word fax_feature_bits;
byte fax_send_edata_ack;
static byte v120_header_buffer[2 + 3];
static word fax_info[] = {
0, /* T30_SUCCESS */
_FAX_NO_CONNECTION, /* T30_ERR_NO_DIS_RECEIVED */
_FAX_PROTOCOL_ERROR, /* T30_ERR_TIMEOUT_NO_RESPONSE */
_FAX_PROTOCOL_ERROR, /* T30_ERR_RETRY_NO_RESPONSE */
_FAX_PROTOCOL_ERROR, /* T30_ERR_TOO_MANY_REPEATS */
_FAX_PROTOCOL_ERROR, /* T30_ERR_UNEXPECTED_MESSAGE */
_FAX_REMOTE_ABORT, /* T30_ERR_UNEXPECTED_DCN */
_FAX_LOCAL_ABORT, /* T30_ERR_DTC_UNSUPPORTED */
_FAX_TRAINING_ERROR, /* T30_ERR_ALL_RATES_FAILED */
_FAX_TRAINING_ERROR, /* T30_ERR_TOO_MANY_TRAINS */
_FAX_PARAMETER_ERROR, /* T30_ERR_RECEIVE_CORRUPTED */
_FAX_REMOTE_ABORT, /* T30_ERR_UNEXPECTED_DISC */
_FAX_LOCAL_ABORT, /* T30_ERR_APPLICATION_DISC */
_FAX_REMOTE_REJECT, /* T30_ERR_INCOMPATIBLE_DIS */
_FAX_LOCAL_ABORT, /* T30_ERR_INCOMPATIBLE_DCS */
_FAX_PROTOCOL_ERROR, /* T30_ERR_TIMEOUT_NO_COMMAND */
_FAX_PROTOCOL_ERROR, /* T30_ERR_RETRY_NO_COMMAND */
_FAX_PROTOCOL_ERROR, /* T30_ERR_TIMEOUT_COMMAND_TOO_LONG */
_FAX_PROTOCOL_ERROR, /* T30_ERR_TIMEOUT_RESPONSE_TOO_LONG */
_FAX_NO_CONNECTION, /* T30_ERR_NOT_IDENTIFIED */
_FAX_PROTOCOL_ERROR, /* T30_ERR_SUPERVISORY_TIMEOUT */
_FAX_PARAMETER_ERROR, /* T30_ERR_TOO_LONG_SCAN_LINE */
_FAX_PROTOCOL_ERROR, /* T30_ERR_RETRY_NO_PAGE_AFTER_MPS */
_FAX_PROTOCOL_ERROR, /* T30_ERR_RETRY_NO_PAGE_AFTER_CFR */
_FAX_PROTOCOL_ERROR, /* T30_ERR_RETRY_NO_DCS_AFTER_FTT */
_FAX_PROTOCOL_ERROR, /* T30_ERR_RETRY_NO_DCS_AFTER_EOM */
_FAX_PROTOCOL_ERROR, /* T30_ERR_RETRY_NO_DCS_AFTER_MPS */
_FAX_PROTOCOL_ERROR, /* T30_ERR_RETRY_NO_DCN_AFTER_MCF */
_FAX_PROTOCOL_ERROR, /* T30_ERR_RETRY_NO_DCN_AFTER_RTN */
_FAX_PROTOCOL_ERROR, /* T30_ERR_RETRY_NO_CFR */
_FAX_PROTOCOL_ERROR, /* T30_ERR_RETRY_NO_MCF_AFTER_EOP */
_FAX_PROTOCOL_ERROR, /* T30_ERR_RETRY_NO_MCF_AFTER_EOM */
_FAX_PROTOCOL_ERROR, /* T30_ERR_RETRY_NO_MCF_AFTER_MPS */
0x331d, /* T30_ERR_SUB_SEP_UNSUPPORTED */
0x331e, /* T30_ERR_PWD_UNSUPPORTED */
0x331f, /* T30_ERR_SUB_SEP_PWD_UNSUPPORTED */
_FAX_PROTOCOL_ERROR, /* T30_ERR_INVALID_COMMAND_FRAME */
_FAX_PARAMETER_ERROR, /* T30_ERR_UNSUPPORTED_PAGE_CODING */
_FAX_PARAMETER_ERROR, /* T30_ERR_INVALID_PAGE_CODING */
_FAX_REMOTE_REJECT, /* T30_ERR_INCOMPATIBLE_PAGE_CONFIG */
_FAX_LOCAL_ABORT, /* T30_ERR_TIMEOUT_FROM_APPLICATION */
_FAX_PROTOCOL_ERROR, /* T30_ERR_V34FAX_NO_REACTION_ON_MARK */
_FAX_PROTOCOL_ERROR, /* T30_ERR_V34FAX_TRAINING_TIMEOUT */
_FAX_PROTOCOL_ERROR, /* T30_ERR_V34FAX_UNEXPECTED_V21 */
_FAX_PROTOCOL_ERROR, /* T30_ERR_V34FAX_PRIMARY_CTS_ON */
_FAX_LOCAL_ABORT, /* T30_ERR_V34FAX_TURNAROUND_POLLING */
_FAX_LOCAL_ABORT /* T30_ERR_V34FAX_V8_INCOMPATIBILITY */
};
byte dtmf_code_buffer[CAPIDTMF_RECV_DIGIT_BUFFER_SIZE + 1];
static word rtp_info[] = {
GOOD, /* RTP_SUCCESS */
0x3600 /* RTP_ERR_SSRC_OR_PAYLOAD_CHANGE */
};
static dword udata_forwarding_table[0x100 / sizeof(dword)] =
{
0x0020301e, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000
};
ch = plci->NL.IndCh;
a = plci->adapter;
ncci = a->ch_ncci[ch];
Id = (((dword)(ncci ? ncci : ch)) << 16) | (((word) plci->Id) << 8) | a->Id;
if (plci->tel) Id |= EXT_CONTROLLER;
APPLptr = plci->appl;
dbug(1, dprintf("NL_IND-Id(NL:0x%x)=0x%08lx,plci=%x,tel=%x,state=0x%x,ch=0x%x,chs=%d,Ind=%x",
plci->NL.Id, Id, plci->Id, plci->tel, plci->State, ch, plci->channels, plci->NL.Ind & 0x0f));
/* in the case if no connect_active_Ind was sent to the appl we wait for */
if (plci->nl_remove_id)
{
plci->NL.RNR = 2; /* discard */
dbug(1, dprintf("NL discard while remove pending"));
return;
}
if ((plci->NL.Ind & 0x0f) == N_CONNECT)
{
if (plci->State == INC_DIS_PENDING
|| plci->State == OUTG_DIS_PENDING
|| plci->State == IDLE)
{
plci->NL.RNR = 2; /* discard */
dbug(1, dprintf("discard n_connect"));
return;
}
if (plci->State < INC_ACT_PENDING)
{
plci->NL.RNR = 1; /* flow control */
channel_x_off(plci, ch, N_XON_CONNECT_IND);
return;
}
}
if (!APPLptr) /* no application or invalid data */
{ /* while reloading the DSP */
dbug(1, dprintf("discard1"));
plci->NL.RNR = 2;
return;
}
if (((plci->NL.Ind & 0x0f) == N_UDATA)
&& (((plci->B2_prot != B2_SDLC) && ((plci->B1_resource == 17) || (plci->B1_resource == 18)))
|| (plci->B2_prot == 7)
|| (plci->B3_prot == 7)))
{
plci->ncpi_buffer[0] = 0;
ncpi_state = plci->ncpi_state;
if (plci->NL.complete == 1)
{
byte *data = &plci->NL.RBuffer->P[0];
if ((plci->NL.RBuffer->length >= 12)
&& ((*data == DSP_UDATA_INDICATION_DCD_ON)
|| (*data == DSP_UDATA_INDICATION_CTS_ON)))
{
word conn_opt, ncpi_opt = 0x00;
/* HexDump ("MDM N_UDATA:", plci->NL.RBuffer->length, data); */
if (*data == DSP_UDATA_INDICATION_DCD_ON)
plci->ncpi_state |= NCPI_MDM_DCD_ON_RECEIVED;
if (*data == DSP_UDATA_INDICATION_CTS_ON)
plci->ncpi_state |= NCPI_MDM_CTS_ON_RECEIVED;
data++; /* indication code */
data += 2; /* timestamp */
if ((*data == DSP_CONNECTED_NORM_V18) || (*data == DSP_CONNECTED_NORM_VOWN))
ncpi_state &= ~(NCPI_MDM_DCD_ON_RECEIVED | NCPI_MDM_CTS_ON_RECEIVED);
data++; /* connected norm */
conn_opt = GET_WORD(data);
data += 2; /* connected options */
PUT_WORD(&(plci->ncpi_buffer[1]), (word)(GET_DWORD(data) & 0x0000FFFF));
if (conn_opt & DSP_CONNECTED_OPTION_MASK_V42)
{
ncpi_opt |= MDM_NCPI_ECM_V42;
}
else if (conn_opt & DSP_CONNECTED_OPTION_MASK_MNP)
{
ncpi_opt |= MDM_NCPI_ECM_MNP;
}
else
{
ncpi_opt |= MDM_NCPI_TRANSPARENT;
}
if (conn_opt & DSP_CONNECTED_OPTION_MASK_COMPRESSION)
{
ncpi_opt |= MDM_NCPI_COMPRESSED;
}
PUT_WORD(&(plci->ncpi_buffer[3]), ncpi_opt);
plci->ncpi_buffer[0] = 4;
plci->ncpi_state |= NCPI_VALID_CONNECT_B3_IND | NCPI_VALID_CONNECT_B3_ACT | NCPI_VALID_DISC_B3_IND;
}
}
if (plci->B3_prot == 7)
{
if (((a->ncci_state[ncci] == INC_ACT_PENDING) || (a->ncci_state[ncci] == OUTG_CON_PENDING))
&& (plci->ncpi_state & NCPI_VALID_CONNECT_B3_ACT)
&& !(plci->ncpi_state & NCPI_CONNECT_B3_ACT_SENT))
{
a->ncci_state[ncci] = INC_ACT_PENDING;
sendf(plci->appl, _CONNECT_B3_ACTIVE_I, Id, 0, "S", plci->ncpi_buffer);
plci->ncpi_state |= NCPI_CONNECT_B3_ACT_SENT;
}
}
if (!((plci->requested_options_conn | plci->requested_options | plci->adapter->requested_options_table[plci->appl->Id - 1])
& ((1L << PRIVATE_V18) | (1L << PRIVATE_VOWN)))
|| !(ncpi_state & NCPI_MDM_DCD_ON_RECEIVED)
|| !(ncpi_state & NCPI_MDM_CTS_ON_RECEIVED))
{
plci->NL.RNR = 2;
return;
}
}
if (plci->NL.complete == 2)
{
if (((plci->NL.Ind & 0x0f) == N_UDATA)
&& !(udata_forwarding_table[plci->RData[0].P[0] >> 5] & (1L << (plci->RData[0].P[0] & 0x1f))))
{
switch (plci->RData[0].P[0])
{
case DTMF_UDATA_INDICATION_FAX_CALLING_TONE:
if (plci->dtmf_rec_active & DTMF_LISTEN_ACTIVE_FLAG)
sendf(plci->appl, _FACILITY_I, Id & 0xffffL, 0, "ws", SELECTOR_DTMF, "\x01X");
break;
case DTMF_UDATA_INDICATION_ANSWER_TONE:
if (plci->dtmf_rec_active & DTMF_LISTEN_ACTIVE_FLAG)
sendf(plci->appl, _FACILITY_I, Id & 0xffffL, 0, "ws", SELECTOR_DTMF, "\x01Y");
break;
case DTMF_UDATA_INDICATION_DIGITS_RECEIVED:
dtmf_indication(Id, plci, plci->RData[0].P, plci->RData[0].PLength);
break;
case DTMF_UDATA_INDICATION_DIGITS_SENT:
dtmf_confirmation(Id, plci);
break;
case UDATA_INDICATION_MIXER_TAP_DATA:
capidtmf_recv_process_block(&(plci->capidtmf_state), plci->RData[0].P + 1, (word)(plci->RData[0].PLength - 1));
i = capidtmf_indication(&(plci->capidtmf_state), dtmf_code_buffer + 1);
if (i != 0)
{
dtmf_code_buffer[0] = DTMF_UDATA_INDICATION_DIGITS_RECEIVED;
dtmf_indication(Id, plci, dtmf_code_buffer, (word)(i + 1));
}
break;
case UDATA_INDICATION_MIXER_COEFS_SET:
mixer_indication_coefs_set(Id, plci);
break;
case UDATA_INDICATION_XCONNECT_FROM:
mixer_indication_xconnect_from(Id, plci, plci->RData[0].P, plci->RData[0].PLength);
break;
case UDATA_INDICATION_XCONNECT_TO:
mixer_indication_xconnect_to(Id, plci, plci->RData[0].P, plci->RData[0].PLength);
break;
case LEC_UDATA_INDICATION_DISABLE_DETECT:
ec_indication(Id, plci, plci->RData[0].P, plci->RData[0].PLength);
break;
default:
break;
}
}
else
{
if ((plci->RData[0].PLength != 0)
&& ((plci->B2_prot == B2_V120_ASYNC)
|| (plci->B2_prot == B2_V120_ASYNC_V42BIS)
|| (plci->B2_prot == B2_V120_BIT_TRANSPARENT)))
{
sendf(plci->appl, _DATA_B3_I, Id, 0,
"dwww",
plci->RData[1].P,
(plci->NL.RNum < 2) ? 0 : plci->RData[1].PLength,
plci->RNum,
plci->RFlags);
}
else
{
sendf(plci->appl, _DATA_B3_I, Id, 0,
"dwww",
plci->RData[0].P,
plci->RData[0].PLength,
plci->RNum,
plci->RFlags);
}
}
return;
}
fax_feature_bits = 0;
if ((plci->NL.Ind & 0x0f) == N_CONNECT ||
(plci->NL.Ind & 0x0f) == N_CONNECT_ACK ||
(plci->NL.Ind & 0x0f) == N_DISC ||
(plci->NL.Ind & 0x0f) == N_EDATA ||
(plci->NL.Ind & 0x0f) == N_DISC_ACK)
{
info = 0;
plci->ncpi_buffer[0] = 0;
switch (plci->B3_prot) {
case 0: /*XPARENT*/
case 1: /*T.90 NL*/
break; /* no network control protocol info - jfr */
case 2: /*ISO8202*/
case 3: /*X25 DCE*/
for (i = 0; i < plci->NL.RLength; i++) plci->ncpi_buffer[4 + i] = plci->NL.RBuffer->P[i];
plci->ncpi_buffer[0] = (byte)(i + 3);
plci->ncpi_buffer[1] = (byte)(plci->NL.Ind & N_D_BIT ? 1 : 0);
plci->ncpi_buffer[2] = 0;
plci->ncpi_buffer[3] = 0;
break;
case 4: /*T.30 - FAX*/
case 5: /*T.30 - FAX*/
if (plci->NL.RLength >= sizeof(T30_INFO))
{
dbug(1, dprintf("FaxStatus %04x", ((T30_INFO *)plci->NL.RBuffer->P)->code));
len = 9;
PUT_WORD(&(plci->ncpi_buffer[1]), ((T30_INFO *)plci->NL.RBuffer->P)->rate_div_2400 * 2400);
fax_feature_bits = GET_WORD(&((T30_INFO *)plci->NL.RBuffer->P)->feature_bits_low);
i = (((T30_INFO *)plci->NL.RBuffer->P)->resolution & T30_RESOLUTION_R8_0770_OR_200) ? 0x0001 : 0x0000;
if (plci->B3_prot == 5)
{
if (!(fax_feature_bits & T30_FEATURE_BIT_ECM))
i |= 0x8000; /* This is not an ECM connection */
if (fax_feature_bits & T30_FEATURE_BIT_T6_CODING)
i |= 0x4000; /* This is a connection with MMR compression */
if (fax_feature_bits & T30_FEATURE_BIT_2D_CODING)
i |= 0x2000; /* This is a connection with MR compression */
if (fax_feature_bits & T30_FEATURE_BIT_MORE_DOCUMENTS)
i |= 0x0004; /* More documents */
if (fax_feature_bits & T30_FEATURE_BIT_POLLING)
i |= 0x0002; /* Fax-polling indication */
}
dbug(1, dprintf("FAX Options %04x %04x", fax_feature_bits, i));
PUT_WORD(&(plci->ncpi_buffer[3]), i);
PUT_WORD(&(plci->ncpi_buffer[5]), ((T30_INFO *)plci->NL.RBuffer->P)->data_format);
plci->ncpi_buffer[7] = ((T30_INFO *)plci->NL.RBuffer->P)->pages_low;
plci->ncpi_buffer[8] = ((T30_INFO *)plci->NL.RBuffer->P)->pages_high;
plci->ncpi_buffer[len] = 0;
if (((T30_INFO *)plci->NL.RBuffer->P)->station_id_len)
{
plci->ncpi_buffer[len] = 20;
for (i = 0; i < T30_MAX_STATION_ID_LENGTH; i++)
plci->ncpi_buffer[++len] = ((T30_INFO *)plci->NL.RBuffer->P)->station_id[i];
}
if (((plci->NL.Ind & 0x0f) == N_DISC) || ((plci->NL.Ind & 0x0f) == N_DISC_ACK))
{
if (((T30_INFO *)plci->NL.RBuffer->P)->code < ARRAY_SIZE(fax_info))
info = fax_info[((T30_INFO *)plci->NL.RBuffer->P)->code];
else
info = _FAX_PROTOCOL_ERROR;
}
if ((plci->requested_options_conn | plci->requested_options | a->requested_options_table[plci->appl->Id - 1])
& ((1L << PRIVATE_FAX_SUB_SEP_PWD) | (1L << PRIVATE_FAX_NONSTANDARD)))
{
i = offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH + ((T30_INFO *)plci->NL.RBuffer->P)->head_line_len;
while (i < plci->NL.RBuffer->length)
plci->ncpi_buffer[++len] = plci->NL.RBuffer->P[i++];
}
plci->ncpi_buffer[0] = len;
fax_feature_bits = GET_WORD(&((T30_INFO *)plci->NL.RBuffer->P)->feature_bits_low);
PUT_WORD(&((T30_INFO *)plci->fax_connect_info_buffer)->feature_bits_low, fax_feature_bits);
plci->ncpi_state |= NCPI_VALID_CONNECT_B3_IND;
if (((plci->NL.Ind & 0x0f) == N_CONNECT_ACK)
|| (((plci->NL.Ind & 0x0f) == N_CONNECT)
&& (fax_feature_bits & T30_FEATURE_BIT_POLLING))
|| (((plci->NL.Ind & 0x0f) == N_EDATA)
&& ((((T30_INFO *)plci->NL.RBuffer->P)->code == EDATA_T30_TRAIN_OK)
|| (((T30_INFO *)plci->NL.RBuffer->P)->code == EDATA_T30_DIS)
|| (((T30_INFO *)plci->NL.RBuffer->P)->code == EDATA_T30_DTC))))
{
plci->ncpi_state |= NCPI_VALID_CONNECT_B3_ACT;
}
if (((plci->NL.Ind & 0x0f) == N_DISC)
|| ((plci->NL.Ind & 0x0f) == N_DISC_ACK)
|| (((plci->NL.Ind & 0x0f) == N_EDATA)
&& (((T30_INFO *)plci->NL.RBuffer->P)->code == EDATA_T30_EOP_CAPI)))
{
plci->ncpi_state |= NCPI_VALID_CONNECT_B3_ACT | NCPI_VALID_DISC_B3_IND;
}
}
break;
case B3_RTP:
if (((plci->NL.Ind & 0x0f) == N_DISC) || ((plci->NL.Ind & 0x0f) == N_DISC_ACK))
{
if (plci->NL.RLength != 0)
{
info = rtp_info[plci->NL.RBuffer->P[0]];
plci->ncpi_buffer[0] = plci->NL.RLength - 1;
for (i = 1; i < plci->NL.RLength; i++)
plci->ncpi_buffer[i] = plci->NL.RBuffer->P[i];
}
}
break;
}
plci->NL.RNR = 2;
}
switch (plci->NL.Ind & 0x0f) {
case N_EDATA:
if ((plci->B3_prot == 4) || (plci->B3_prot == 5))
{
dbug(1, dprintf("EDATA ncci=0x%x state=%d code=%02x", ncci, a->ncci_state[ncci],
((T30_INFO *)plci->NL.RBuffer->P)->code));
fax_send_edata_ack = (((T30_INFO *)(plci->fax_connect_info_buffer))->operating_mode == T30_OPERATING_MODE_CAPI_NEG);
if ((plci->nsf_control_bits & T30_NSF_CONTROL_BIT_ENABLE_NSF)
&& (plci->nsf_control_bits & (T30_NSF_CONTROL_BIT_NEGOTIATE_IND | T30_NSF_CONTROL_BIT_NEGOTIATE_RESP))
&& (((T30_INFO *)plci->NL.RBuffer->P)->code == EDATA_T30_DIS)
&& (a->ncci_state[ncci] == OUTG_CON_PENDING)
&& (plci->ncpi_state & NCPI_VALID_CONNECT_B3_ACT)
&& !(plci->ncpi_state & NCPI_NEGOTIATE_B3_SENT))
{
((T30_INFO *)(plci->fax_connect_info_buffer))->code = ((T30_INFO *)plci->NL.RBuffer->P)->code;
sendf(plci->appl, _MANUFACTURER_I, Id, 0, "dwbS", _DI_MANU_ID, _DI_NEGOTIATE_B3,
(byte)(plci->ncpi_buffer[0] + 1), plci->ncpi_buffer);
plci->ncpi_state |= NCPI_NEGOTIATE_B3_SENT;
if (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_NEGOTIATE_RESP)
fax_send_edata_ack = false;
}
if (a->manufacturer_features & MANUFACTURER_FEATURE_FAX_PAPER_FORMATS)
{
switch (((T30_INFO *)plci->NL.RBuffer->P)->code)
{
case EDATA_T30_DIS:
if ((a->ncci_state[ncci] == OUTG_CON_PENDING)
&& !(GET_WORD(&((T30_INFO *)plci->fax_connect_info_buffer)->control_bits_low) & T30_CONTROL_BIT_REQUEST_POLLING)
&& (plci->ncpi_state & NCPI_VALID_CONNECT_B3_ACT)
&& !(plci->ncpi_state & NCPI_CONNECT_B3_ACT_SENT))
{
a->ncci_state[ncci] = INC_ACT_PENDING;
if (plci->B3_prot == 4)
sendf(plci->appl, _CONNECT_B3_ACTIVE_I, Id, 0, "s", "");
else
sendf(plci->appl, _CONNECT_B3_ACTIVE_I, Id, 0, "S", plci->ncpi_buffer);
plci->ncpi_state |= NCPI_CONNECT_B3_ACT_SENT;
}
break;
case EDATA_T30_TRAIN_OK:
if ((a->ncci_state[ncci] == INC_ACT_PENDING)
&& (plci->ncpi_state & NCPI_VALID_CONNECT_B3_ACT)
&& !(plci->ncpi_state & NCPI_CONNECT_B3_ACT_SENT))
{
if (plci->B3_prot == 4)
sendf(plci->appl, _CONNECT_B3_ACTIVE_I, Id, 0, "s", "");
else
sendf(plci->appl, _CONNECT_B3_ACTIVE_I, Id, 0, "S", plci->ncpi_buffer);
plci->ncpi_state |= NCPI_CONNECT_B3_ACT_SENT;
}
break;
case EDATA_T30_EOP_CAPI:
if (a->ncci_state[ncci] == CONNECTED)
{
sendf(plci->appl, _DISCONNECT_B3_I, Id, 0, "wS", GOOD, plci->ncpi_buffer);
a->ncci_state[ncci] = INC_DIS_PENDING;
plci->ncpi_state = 0;
fax_send_edata_ack = false;
}
break;
}
}
else
{
switch (((T30_INFO *)plci->NL.RBuffer->P)->code)
{
case EDATA_T30_TRAIN_OK:
if ((a->ncci_state[ncci] == INC_ACT_PENDING)
&& (plci->ncpi_state & NCPI_VALID_CONNECT_B3_ACT)
&& !(plci->ncpi_state & NCPI_CONNECT_B3_ACT_SENT))
{
if (plci->B3_prot == 4)
sendf(plci->appl, _CONNECT_B3_ACTIVE_I, Id, 0, "s", "");
else
sendf(plci->appl, _CONNECT_B3_ACTIVE_I, Id, 0, "S", plci->ncpi_buffer);
plci->ncpi_state |= NCPI_CONNECT_B3_ACT_SENT;
}
break;
}
}
if (fax_send_edata_ack)
{
((T30_INFO *)(plci->fax_connect_info_buffer))->code = ((T30_INFO *)plci->NL.RBuffer->P)->code;
plci->fax_edata_ack_length = 1;
start_internal_command(Id, plci, fax_edata_ack_command);
}
}
else
{
dbug(1, dprintf("EDATA ncci=0x%x state=%d", ncci, a->ncci_state[ncci]));
}
break;
case N_CONNECT:
if (!a->ch_ncci[ch])
{
ncci = get_ncci(plci, ch, 0);
Id = (Id & 0xffff) | (((dword) ncci) << 16);
}
dbug(1, dprintf("N_CONNECT: ch=%d state=%d plci=%lx plci_Id=%lx plci_State=%d",
ch, a->ncci_state[ncci], a->ncci_plci[ncci], plci->Id, plci->State));
msg = _CONNECT_B3_I;
if (a->ncci_state[ncci] == IDLE)
plci->channels++;
else if (plci->B3_prot == 1)
msg = _CONNECT_B3_T90_ACTIVE_I;
a->ncci_state[ncci] = INC_CON_PENDING;
if (plci->B3_prot == 4)
sendf(plci->appl, msg, Id, 0, "s", "");
else
sendf(plci->appl, msg, Id, 0, "S", plci->ncpi_buffer);
break;
case N_CONNECT_ACK:
dbug(1, dprintf("N_connect_Ack"));
if (plci->internal_command_queue[0]
&& ((plci->adjust_b_state == ADJUST_B_CONNECT_2)
|| (plci->adjust_b_state == ADJUST_B_CONNECT_3)
|| (plci->adjust_b_state == ADJUST_B_CONNECT_4)))
{
(*(plci->internal_command_queue[0]))(Id, plci, 0);
if (!plci->internal_command)
next_internal_command(Id, plci);
break;
}
msg = _CONNECT_B3_ACTIVE_I;
if (plci->B3_prot == 1)
{
if (a->ncci_state[ncci] != OUTG_CON_PENDING)
msg = _CONNECT_B3_T90_ACTIVE_I;
a->ncci_state[ncci] = INC_ACT_PENDING;
sendf(plci->appl, msg, Id, 0, "S", plci->ncpi_buffer);
}
else if ((plci->B3_prot == 4) || (plci->B3_prot == 5) || (plci->B3_prot == 7))
{
if ((a->ncci_state[ncci] == OUTG_CON_PENDING)
&& (plci->ncpi_state & NCPI_VALID_CONNECT_B3_ACT)
&& !(plci->ncpi_state & NCPI_CONNECT_B3_ACT_SENT))
{
a->ncci_state[ncci] = INC_ACT_PENDING;
if (plci->B3_prot == 4)
sendf(plci->appl, msg, Id, 0, "s", "");
else
sendf(plci->appl, msg, Id, 0, "S", plci->ncpi_buffer);
plci->ncpi_state |= NCPI_CONNECT_B3_ACT_SENT;
}
}
else
{
a->ncci_state[ncci] = INC_ACT_PENDING;
sendf(plci->appl, msg, Id, 0, "S", plci->ncpi_buffer);
}
if (plci->adjust_b_restore)
{
plci->adjust_b_restore = false;
start_internal_command(Id, plci, adjust_b_restore);
}
break;
case N_DISC:
case N_DISC_ACK:
if (plci->internal_command_queue[0]
&& ((plci->internal_command == FAX_DISCONNECT_COMMAND_1)
|| (plci->internal_command == FAX_DISCONNECT_COMMAND_2)
|| (plci->internal_command == FAX_DISCONNECT_COMMAND_3)))
{
(*(plci->internal_command_queue[0]))(Id, plci, 0);
if (!plci->internal_command)
next_internal_command(Id, plci);
}
ncci_state = a->ncci_state[ncci];
ncci_remove(plci, ncci, false);
/* with N_DISC or N_DISC_ACK the IDI frees the respective */
/* channel, so we cannot store the state in ncci_state! The */
/* information which channel we received a N_DISC is thus */
/* stored in the inc_dis_ncci_table buffer. */
for (i = 0; plci->inc_dis_ncci_table[i]; i++);
plci->inc_dis_ncci_table[i] = (byte) ncci;
/* need a connect_b3_ind before a disconnect_b3_ind with FAX */
if (!plci->channels
&& (plci->B1_resource == 16)
&& (plci->State <= CONNECTED))
{
len = 9;
i = ((T30_INFO *)plci->fax_connect_info_buffer)->rate_div_2400 * 2400;
PUT_WORD(&plci->ncpi_buffer[1], i);
PUT_WORD(&plci->ncpi_buffer[3], 0);
i = ((T30_INFO *)plci->fax_connect_info_buffer)->data_format;
PUT_WORD(&plci->ncpi_buffer[5], i);
PUT_WORD(&plci->ncpi_buffer[7], 0);
plci->ncpi_buffer[len] = 0;
plci->ncpi_buffer[0] = len;
if (plci->B3_prot == 4)
sendf(plci->appl, _CONNECT_B3_I, Id, 0, "s", "");
else
{
if ((plci->requested_options_conn | plci->requested_options | a->requested_options_table[plci->appl->Id - 1])
& ((1L << PRIVATE_FAX_SUB_SEP_PWD) | (1L << PRIVATE_FAX_NONSTANDARD)))
{
plci->ncpi_buffer[++len] = 0;
plci->ncpi_buffer[++len] = 0;
plci->ncpi_buffer[++len] = 0;
plci->ncpi_buffer[0] = len;
}
sendf(plci->appl, _CONNECT_B3_I, Id, 0, "S", plci->ncpi_buffer);
}
sendf(plci->appl, _DISCONNECT_B3_I, Id, 0, "wS", info, plci->ncpi_buffer);
plci->ncpi_state = 0;
sig_req(plci, HANGUP, 0);
send_req(plci);
plci->State = OUTG_DIS_PENDING;
/* disc here */
}
else if ((a->manufacturer_features & MANUFACTURER_FEATURE_FAX_PAPER_FORMATS)
&& ((plci->B3_prot == 4) || (plci->B3_prot == 5))
&& ((ncci_state == INC_DIS_PENDING) || (ncci_state == IDLE)))
{
if (ncci_state == IDLE)
{
if (plci->channels)
plci->channels--;
if ((plci->State == IDLE || plci->State == SUSPENDING) && !plci->channels) {
if (plci->State == SUSPENDING) {
sendf(plci->appl,
_FACILITY_I,
Id & 0xffffL,
0,
"ws", (word)3, "\x03\x04\x00\x00");
sendf(plci->appl, _DISCONNECT_I, Id & 0xffffL, 0, "w", 0);
}
plci_remove(plci);
plci->State = IDLE;
}
}
}
else if (plci->channels)
{
sendf(plci->appl, _DISCONNECT_B3_I, Id, 0, "wS", info, plci->ncpi_buffer);
plci->ncpi_state = 0;
if ((ncci_state == OUTG_REJ_PENDING)
&& ((plci->B3_prot != B3_T90NL) && (plci->B3_prot != B3_ISO8208) && (plci->B3_prot != B3_X25_DCE)))
{
sig_req(plci, HANGUP, 0);
send_req(plci);
plci->State = OUTG_DIS_PENDING;
}
}
break;
case N_RESET:
a->ncci_state[ncci] = INC_RES_PENDING;
sendf(plci->appl, _RESET_B3_I, Id, 0, "S", plci->ncpi_buffer);
break;
case N_RESET_ACK:
a->ncci_state[ncci] = CONNECTED;
sendf(plci->appl, _RESET_B3_I, Id, 0, "S", plci->ncpi_buffer);
break;
case N_UDATA:
if (!(udata_forwarding_table[plci->NL.RBuffer->P[0] >> 5] & (1L << (plci->NL.RBuffer->P[0] & 0x1f))))
{
plci->RData[0].P = plci->internal_ind_buffer + (-((int)(long)(plci->internal_ind_buffer)) & 3);
plci->RData[0].PLength = INTERNAL_IND_BUFFER_SIZE;
plci->NL.R = plci->RData;
plci->NL.RNum = 1;
return;
}
case N_BDATA:
case N_DATA:
if (((a->ncci_state[ncci] != CONNECTED) && (plci->B2_prot == 1)) /* transparent */
|| (a->ncci_state[ncci] == IDLE)
|| (a->ncci_state[ncci] == INC_DIS_PENDING))
{
plci->NL.RNR = 2;
break;
}
if ((a->ncci_state[ncci] != CONNECTED)
&& (a->ncci_state[ncci] != OUTG_DIS_PENDING)
&& (a->ncci_state[ncci] != OUTG_REJ_PENDING))
{
dbug(1, dprintf("flow control"));
plci->NL.RNR = 1; /* flow control */
channel_x_off(plci, ch, 0);
break;
}
NCCIcode = ncci | (((word)a->Id) << 8);
/* count all buffers within the Application pool */
/* belonging to the same NCCI. If this is below the */
/* number of buffers available per NCCI we accept */
/* this packet, otherwise we reject it */
count = 0;
Num = 0xffff;
for (i = 0; i < APPLptr->MaxBuffer; i++) {
if (NCCIcode == APPLptr->DataNCCI[i]) count++;
if (!APPLptr->DataNCCI[i] && Num == 0xffff) Num = i;
}
if (count >= APPLptr->MaxNCCIData || Num == 0xffff)
{
dbug(3, dprintf("Flow-Control"));
plci->NL.RNR = 1;
if (++(APPLptr->NCCIDataFlowCtrlTimer) >=
(word)((a->manufacturer_features & MANUFACTURER_FEATURE_OOB_CHANNEL) ? 40 : 2000))
{
plci->NL.RNR = 2;
dbug(3, dprintf("DiscardData"));
} else {
channel_x_off(plci, ch, 0);
}
break;
}
else
{
APPLptr->NCCIDataFlowCtrlTimer = 0;
}
plci->RData[0].P = ReceiveBufferGet(APPLptr, Num);
if (!plci->RData[0].P) {
plci->NL.RNR = 1;
channel_x_off(plci, ch, 0);
break;
}
APPLptr->DataNCCI[Num] = NCCIcode;
APPLptr->DataFlags[Num] = (plci->Id << 8) | (plci->NL.Ind >> 4);
dbug(3, dprintf("Buffer(%d), Max = %d", Num, APPLptr->MaxBuffer));
plci->RNum = Num;
plci->RFlags = plci->NL.Ind >> 4;
plci->RData[0].PLength = APPLptr->MaxDataLength;
plci->NL.R = plci->RData;
if ((plci->NL.RLength != 0)
&& ((plci->B2_prot == B2_V120_ASYNC)
|| (plci->B2_prot == B2_V120_ASYNC_V42BIS)
|| (plci->B2_prot == B2_V120_BIT_TRANSPARENT)))
{
plci->RData[1].P = plci->RData[0].P;
plci->RData[1].PLength = plci->RData[0].PLength;
plci->RData[0].P = v120_header_buffer + (-((unsigned long)v120_header_buffer) & 3);
if ((plci->NL.RBuffer->P[0] & V120_HEADER_EXTEND_BIT) || (plci->NL.RLength == 1))
plci->RData[0].PLength = 1;
else
plci->RData[0].PLength = 2;
if (plci->NL.RBuffer->P[0] & V120_HEADER_BREAK_BIT)
plci->RFlags |= 0x0010;
if (plci->NL.RBuffer->P[0] & (V120_HEADER_C1_BIT | V120_HEADER_C2_BIT))
plci->RFlags |= 0x8000;
plci->NL.RNum = 2;
}
else
{
if ((plci->NL.Ind & 0x0f) == N_UDATA)
plci->RFlags |= 0x0010;
else if ((plci->B3_prot == B3_RTP) && ((plci->NL.Ind & 0x0f) == N_BDATA))
plci->RFlags |= 0x0001;
plci->NL.RNum = 1;
}
break;
case N_DATA_ACK:
data_ack(plci, ch);
break;
default:
plci->NL.RNR = 2;
break;
}
}
/*------------------------------------------------------------------*/
/* find a free PLCI */
/*------------------------------------------------------------------*/
static word get_plci(DIVA_CAPI_ADAPTER *a)
{
word i, j;
PLCI *plci;
dump_plcis(a);
for (i = 0; i < a->max_plci && a->plci[i].Id; i++);
if (i == a->max_plci) {
dbug(1, dprintf("get_plci: out of PLCIs"));
return 0;
}
plci = &a->plci[i];
plci->Id = (byte)(i + 1);
plci->Sig.Id = 0;
plci->NL.Id = 0;
plci->sig_req = 0;
plci->nl_req = 0;
plci->appl = NULL;
plci->relatedPTYPLCI = NULL;
plci->State = IDLE;
plci->SuppState = IDLE;
plci->channels = 0;
plci->tel = 0;
plci->B1_resource = 0;
plci->B2_prot = 0;
plci->B3_prot = 0;
plci->command = 0;
plci->m_command = 0;
init_internal_command_queue(plci);
plci->number = 0;
plci->req_in_start = 0;
plci->req_in = 0;
plci->req_out = 0;
plci->msg_in_write_pos = MSG_IN_QUEUE_SIZE;
plci->msg_in_read_pos = MSG_IN_QUEUE_SIZE;
plci->msg_in_wrap_pos = MSG_IN_QUEUE_SIZE;
plci->data_sent = false;
plci->send_disc = 0;
plci->sig_global_req = 0;
plci->sig_remove_id = 0;
plci->nl_global_req = 0;
plci->nl_remove_id = 0;
plci->adv_nl = 0;
plci->manufacturer = false;
plci->call_dir = CALL_DIR_OUT | CALL_DIR_ORIGINATE;
plci->spoofed_msg = 0;
plci->ptyState = 0;
plci->cr_enquiry = false;
plci->hangup_flow_ctrl_timer = 0;
plci->ncci_ring_list = 0;
for (j = 0; j < MAX_CHANNELS_PER_PLCI; j++) plci->inc_dis_ncci_table[j] = 0;
clear_c_ind_mask(plci);
set_group_ind_mask(plci);
plci->fax_connect_info_length = 0;
plci->nsf_control_bits = 0;
plci->ncpi_state = 0x00;
plci->ncpi_buffer[0] = 0;
plci->requested_options_conn = 0;
plci->requested_options = 0;
plci->notifiedcall = 0;
plci->vswitchstate = 0;
plci->vsprot = 0;
plci->vsprotdialect = 0;
init_b1_config(plci);
dbug(1, dprintf("get_plci(%x)", plci->Id));
return i + 1;
}
/*------------------------------------------------------------------*/
/* put a parameter in the parameter buffer */
/*------------------------------------------------------------------*/
static void add_p(PLCI *plci, byte code, byte *p)
{
word p_length;
p_length = 0;
if (p) p_length = p[0];
add_ie(plci, code, p, p_length);
}
/*------------------------------------------------------------------*/
/* put a structure in the parameter buffer */
/*------------------------------------------------------------------*/
static void add_s(PLCI *plci, byte code, API_PARSE *p)
{
if (p) add_ie(plci, code, p->info, (word)p->length);
}
/*------------------------------------------------------------------*/
/* put multiple structures in the parameter buffer */
/*------------------------------------------------------------------*/
static void add_ss(PLCI *plci, byte code, API_PARSE *p)
{
byte i;
if (p) {
dbug(1, dprintf("add_ss(%x,len=%d)", code, p->length));
for (i = 2; i < (byte)p->length; i += p->info[i] + 2) {
dbug(1, dprintf("add_ss_ie(%x,len=%d)", p->info[i - 1], p->info[i]));
add_ie(plci, p->info[i - 1], (byte *)&(p->info[i]), (word)p->info[i]);
}
}
}
/*------------------------------------------------------------------*/
/* return the channel number sent by the application in a esc_chi */
/*------------------------------------------------------------------*/
static byte getChannel(API_PARSE *p)
{
byte i;
if (p) {
for (i = 2; i < (byte)p->length; i += p->info[i] + 2) {
if (p->info[i] == 2) {
if (p->info[i - 1] == ESC && p->info[i + 1] == CHI) return (p->info[i + 2]);
}
}
}
return 0;
}
/*------------------------------------------------------------------*/
/* put an information element in the parameter buffer */
/*------------------------------------------------------------------*/
static void add_ie(PLCI *plci, byte code, byte *p, word p_length)
{
word i;
if (!(code & 0x80) && !p_length) return;
if (plci->req_in == plci->req_in_start) {
plci->req_in += 2;
}
else {
plci->req_in--;
}
plci->RBuffer[plci->req_in++] = code;
if (p) {
plci->RBuffer[plci->req_in++] = (byte)p_length;
for (i = 0; i < p_length; i++) plci->RBuffer[plci->req_in++] = p[1 + i];
}
plci->RBuffer[plci->req_in++] = 0;
}
/*------------------------------------------------------------------*/
/* put a unstructured data into the buffer */
/*------------------------------------------------------------------*/
static void add_d(PLCI *plci, word length, byte *p)
{
word i;
if (plci->req_in == plci->req_in_start) {
plci->req_in += 2;
}
else {
plci->req_in--;
}
for (i = 0; i < length; i++) plci->RBuffer[plci->req_in++] = p[i];
}
/*------------------------------------------------------------------*/
/* put parameters from the Additional Info parameter in the */
/* parameter buffer */
/*------------------------------------------------------------------*/
static void add_ai(PLCI *plci, API_PARSE *ai)
{
word i;
API_PARSE ai_parms[5];
for (i = 0; i < 5; i++) ai_parms[i].length = 0;
if (!ai->length)
return;
if (api_parse(&ai->info[1], (word)ai->length, "ssss", ai_parms))
return;
add_s(plci, KEY, &ai_parms[1]);
add_s(plci, UUI, &ai_parms[2]);
add_ss(plci, FTY, &ai_parms[3]);
}
/*------------------------------------------------------------------*/
/* put parameter for b1 protocol in the parameter buffer */
/*------------------------------------------------------------------*/
static word add_b1(PLCI *plci, API_PARSE *bp, word b_channel_info,
word b1_facilities)
{
API_PARSE bp_parms[8];
API_PARSE mdm_cfg[9];
API_PARSE global_config[2];
byte cai[256];
byte resource[] = {5, 9, 13, 12, 16, 39, 9, 17, 17, 18};
byte voice_cai[] = "\x06\x14\x00\x00\x00\x00\x08";
word i;
API_PARSE mdm_cfg_v18[4];
word j, n, w;
dword d;
for (i = 0; i < 8; i++) bp_parms[i].length = 0;
for (i = 0; i < 2; i++) global_config[i].length = 0;
dbug(1, dprintf("add_b1"));
api_save_msg(bp, "s", &plci->B_protocol);
if (b_channel_info == 2) {
plci->B1_resource = 0;
adjust_b1_facilities(plci, plci->B1_resource, b1_facilities);
add_p(plci, CAI, "\x01\x00");
dbug(1, dprintf("Cai=1,0 (no resource)"));
return 0;
}
if (plci->tel == CODEC_PERMANENT) return 0;
else if (plci->tel == CODEC) {
plci->B1_resource = 1;
adjust_b1_facilities(plci, plci->B1_resource, b1_facilities);
add_p(plci, CAI, "\x01\x01");
dbug(1, dprintf("Cai=1,1 (Codec)"));
return 0;
}
else if (plci->tel == ADV_VOICE) {
plci->B1_resource = add_b1_facilities(plci, 9, (word)(b1_facilities | B1_FACILITY_VOICE));
adjust_b1_facilities(plci, plci->B1_resource, (word)(b1_facilities | B1_FACILITY_VOICE));
voice_cai[1] = plci->B1_resource;
PUT_WORD(&voice_cai[5], plci->appl->MaxDataLength);
add_p(plci, CAI, voice_cai);
dbug(1, dprintf("Cai=1,0x%x (AdvVoice)", voice_cai[1]));
return 0;
}
plci->call_dir &= ~(CALL_DIR_ORIGINATE | CALL_DIR_ANSWER);
if (plci->call_dir & CALL_DIR_OUT)
plci->call_dir |= CALL_DIR_ORIGINATE;
else if (plci->call_dir & CALL_DIR_IN)
plci->call_dir |= CALL_DIR_ANSWER;
if (!bp->length) {
plci->B1_resource = 0x5;
adjust_b1_facilities(plci, plci->B1_resource, b1_facilities);
add_p(plci, CAI, "\x01\x05");
return 0;
}
dbug(1, dprintf("b_prot_len=%d", (word)bp->length));
if (bp->length > 256) return _WRONG_MESSAGE_FORMAT;
if (api_parse(&bp->info[1], (word)bp->length, "wwwsssb", bp_parms))
{
bp_parms[6].length = 0;
if (api_parse(&bp->info[1], (word)bp->length, "wwwsss", bp_parms))
{
dbug(1, dprintf("b-form.!"));
return _WRONG_MESSAGE_FORMAT;
}
}
else if (api_parse(&bp->info[1], (word)bp->length, "wwwssss", bp_parms))
{
dbug(1, dprintf("b-form.!"));
return _WRONG_MESSAGE_FORMAT;
}
if (bp_parms[6].length)
{
if (api_parse(&bp_parms[6].info[1], (word)bp_parms[6].length, "w", global_config))
{
return _WRONG_MESSAGE_FORMAT;
}
switch (GET_WORD(global_config[0].info))
{
case 1:
plci->call_dir = (plci->call_dir & ~CALL_DIR_ANSWER) | CALL_DIR_ORIGINATE;
break;
case 2:
plci->call_dir = (plci->call_dir & ~CALL_DIR_ORIGINATE) | CALL_DIR_ANSWER;
break;
}
}
dbug(1, dprintf("call_dir=%04x", plci->call_dir));
if ((GET_WORD(bp_parms[0].info) == B1_RTP)
&& (plci->adapter->man_profile.private_options & (1L << PRIVATE_RTP)))
{
plci->B1_resource = add_b1_facilities(plci, 31, (word)(b1_facilities & ~B1_FACILITY_VOICE));
adjust_b1_facilities(plci, plci->B1_resource, (word)(b1_facilities & ~B1_FACILITY_VOICE));
cai[1] = plci->B1_resource;
cai[2] = 0;
cai[3] = 0;
cai[4] = 0;
PUT_WORD(&cai[5], plci->appl->MaxDataLength);
for (i = 0; i < bp_parms[3].length; i++)
cai[7 + i] = bp_parms[3].info[1 + i];
cai[0] = 6 + bp_parms[3].length;
add_p(plci, CAI, cai);
return 0;
}
if ((GET_WORD(bp_parms[0].info) == B1_PIAFS)
&& (plci->adapter->man_profile.private_options & (1L << PRIVATE_PIAFS)))
{
plci->B1_resource = add_b1_facilities(plci, 35/* PIAFS HARDWARE FACILITY */, (word)(b1_facilities & ~B1_FACILITY_VOICE));
adjust_b1_facilities(plci, plci->B1_resource, (word)(b1_facilities & ~B1_FACILITY_VOICE));
cai[1] = plci->B1_resource;
cai[2] = 0;
cai[3] = 0;
cai[4] = 0;
PUT_WORD(&cai[5], plci->appl->MaxDataLength);
cai[0] = 6;
add_p(plci, CAI, cai);
return 0;
}
if ((GET_WORD(bp_parms[0].info) >= 32)
|| (!((1L << GET_WORD(bp_parms[0].info)) & plci->adapter->profile.B1_Protocols)
&& ((GET_WORD(bp_parms[0].info) != 3)
|| !((1L << B1_HDLC) & plci->adapter->profile.B1_Protocols)
|| ((bp_parms[3].length != 0) && (GET_WORD(&bp_parms[3].info[1]) != 0) && (GET_WORD(&bp_parms[3].info[1]) != 56000)))))
{
return _B1_NOT_SUPPORTED;
}
plci->B1_resource = add_b1_facilities(plci, resource[GET_WORD(bp_parms[0].info)],
(word)(b1_facilities & ~B1_FACILITY_VOICE));
adjust_b1_facilities(plci, plci->B1_resource, (word)(b1_facilities & ~B1_FACILITY_VOICE));
cai[0] = 6;
cai[1] = plci->B1_resource;
for (i = 2; i < sizeof(cai); i++) cai[i] = 0;
if ((GET_WORD(bp_parms[0].info) == B1_MODEM_ALL_NEGOTIATE)
|| (GET_WORD(bp_parms[0].info) == B1_MODEM_ASYNC)
|| (GET_WORD(bp_parms[0].info) == B1_MODEM_SYNC_HDLC))
{ /* B1 - modem */
for (i = 0; i < 7; i++) mdm_cfg[i].length = 0;
if (bp_parms[3].length)
{
if (api_parse(&bp_parms[3].info[1], (word)bp_parms[3].length, "wwwwww", mdm_cfg))
{
return (_WRONG_MESSAGE_FORMAT);
}
cai[2] = 0; /* Bit rate for adaptation */
dbug(1, dprintf("MDM Max Bit Rate:<%d>", GET_WORD(mdm_cfg[0].info)));
PUT_WORD(&cai[13], 0); /* Min Tx speed */
PUT_WORD(&cai[15], GET_WORD(mdm_cfg[0].info)); /* Max Tx speed */
PUT_WORD(&cai[17], 0); /* Min Rx speed */
PUT_WORD(&cai[19], GET_WORD(mdm_cfg[0].info)); /* Max Rx speed */
cai[3] = 0; /* Async framing parameters */
switch (GET_WORD(mdm_cfg[2].info))
{ /* Parity */
case 1: /* odd parity */
cai[3] |= (DSP_CAI_ASYNC_PARITY_ENABLE | DSP_CAI_ASYNC_PARITY_ODD);
dbug(1, dprintf("MDM: odd parity"));
break;
case 2: /* even parity */
cai[3] |= (DSP_CAI_ASYNC_PARITY_ENABLE | DSP_CAI_ASYNC_PARITY_EVEN);
dbug(1, dprintf("MDM: even parity"));
break;
default:
dbug(1, dprintf("MDM: no parity"));
break;
}
switch (GET_WORD(mdm_cfg[3].info))
{ /* stop bits */
case 1: /* 2 stop bits */
cai[3] |= DSP_CAI_ASYNC_TWO_STOP_BITS;
dbug(1, dprintf("MDM: 2 stop bits"));
break;
default:
dbug(1, dprintf("MDM: 1 stop bit"));
break;
}
switch (GET_WORD(mdm_cfg[1].info))
{ /* char length */
case 5:
cai[3] |= DSP_CAI_ASYNC_CHAR_LENGTH_5;
dbug(1, dprintf("MDM: 5 bits"));
break;
case 6:
cai[3] |= DSP_CAI_ASYNC_CHAR_LENGTH_6;
dbug(1, dprintf("MDM: 6 bits"));
break;
case 7:
cai[3] |= DSP_CAI_ASYNC_CHAR_LENGTH_7;
dbug(1, dprintf("MDM: 7 bits"));
break;
default:
dbug(1, dprintf("MDM: 8 bits"));
break;
}
cai[7] = 0; /* Line taking options */
cai[8] = 0; /* Modulation negotiation options */
cai[9] = 0; /* Modulation options */
if (((plci->call_dir & CALL_DIR_ORIGINATE) != 0) ^ ((plci->call_dir & CALL_DIR_OUT) != 0))
{
cai[9] |= DSP_CAI_MODEM_REVERSE_DIRECTION;
dbug(1, dprintf("MDM: Reverse direction"));
}
if (GET_WORD(mdm_cfg[4].info) & MDM_CAPI_DISABLE_RETRAIN)
{
cai[9] |= DSP_CAI_MODEM_DISABLE_RETRAIN;
dbug(1, dprintf("MDM: Disable retrain"));
}
if (GET_WORD(mdm_cfg[4].info) & MDM_CAPI_DISABLE_RING_TONE)
{
cai[7] |= DSP_CAI_MODEM_DISABLE_CALLING_TONE | DSP_CAI_MODEM_DISABLE_ANSWER_TONE;
dbug(1, dprintf("MDM: Disable ring tone"));
}
if (GET_WORD(mdm_cfg[4].info) & MDM_CAPI_GUARD_1800)
{
cai[8] |= DSP_CAI_MODEM_GUARD_TONE_1800HZ;
dbug(1, dprintf("MDM: 1800 guard tone"));
}
else if (GET_WORD(mdm_cfg[4].info) & MDM_CAPI_GUARD_550)
{
cai[8] |= DSP_CAI_MODEM_GUARD_TONE_550HZ;
dbug(1, dprintf("MDM: 550 guard tone"));
}
if ((GET_WORD(mdm_cfg[5].info) & 0x00ff) == MDM_CAPI_NEG_V100)
{
cai[8] |= DSP_CAI_MODEM_NEGOTIATE_V100;
dbug(1, dprintf("MDM: V100"));
}
else if ((GET_WORD(mdm_cfg[5].info) & 0x00ff) == MDM_CAPI_NEG_MOD_CLASS)
{
cai[8] |= DSP_CAI_MODEM_NEGOTIATE_IN_CLASS;
dbug(1, dprintf("MDM: IN CLASS"));
}
else if ((GET_WORD(mdm_cfg[5].info) & 0x00ff) == MDM_CAPI_NEG_DISABLED)
{
cai[8] |= DSP_CAI_MODEM_NEGOTIATE_DISABLED;
dbug(1, dprintf("MDM: DISABLED"));
}
cai[0] = 20;
if ((plci->adapter->man_profile.private_options & (1L << PRIVATE_V18))
&& (GET_WORD(mdm_cfg[5].info) & 0x8000)) /* Private V.18 enable */
{
plci->requested_options |= 1L << PRIVATE_V18;
}
if (GET_WORD(mdm_cfg[5].info) & 0x4000) /* Private VOWN enable */
plci->requested_options |= 1L << PRIVATE_VOWN;
if ((plci->requested_options_conn | plci->requested_options | plci->adapter->requested_options_table[plci->appl->Id - 1])
& ((1L << PRIVATE_V18) | (1L << PRIVATE_VOWN)))
{
if (!api_parse(&bp_parms[3].info[1], (word)bp_parms[3].length, "wwwwwws", mdm_cfg))
{
i = 27;
if (mdm_cfg[6].length >= 4)
{
d = GET_DWORD(&mdm_cfg[6].info[1]);
cai[7] |= (byte) d; /* line taking options */
cai[9] |= (byte)(d >> 8); /* modulation options */
cai[++i] = (byte)(d >> 16); /* vown modulation options */
cai[++i] = (byte)(d >> 24);
if (mdm_cfg[6].length >= 8)
{
d = GET_DWORD(&mdm_cfg[6].info[5]);
cai[10] |= (byte) d; /* disabled modulations mask */
cai[11] |= (byte)(d >> 8);
if (mdm_cfg[6].length >= 12)
{
d = GET_DWORD(&mdm_cfg[6].info[9]);
cai[12] = (byte) d; /* enabled modulations mask */
cai[++i] = (byte)(d >> 8); /* vown enabled modulations */
cai[++i] = (byte)(d >> 16);
cai[++i] = (byte)(d >> 24);
cai[++i] = 0;
if (mdm_cfg[6].length >= 14)
{
w = GET_WORD(&mdm_cfg[6].info[13]);
if (w != 0)
PUT_WORD(&cai[13], w); /* min tx speed */
if (mdm_cfg[6].length >= 16)
{
w = GET_WORD(&mdm_cfg[6].info[15]);
if (w != 0)
PUT_WORD(&cai[15], w); /* max tx speed */
if (mdm_cfg[6].length >= 18)
{
w = GET_WORD(&mdm_cfg[6].info[17]);
if (w != 0)
PUT_WORD(&cai[17], w); /* min rx speed */
if (mdm_cfg[6].length >= 20)
{
w = GET_WORD(&mdm_cfg[6].info[19]);
if (w != 0)
PUT_WORD(&cai[19], w); /* max rx speed */
if (mdm_cfg[6].length >= 22)
{
w = GET_WORD(&mdm_cfg[6].info[21]);
cai[23] = (byte)(-((short) w)); /* transmit level */
if (mdm_cfg[6].length >= 24)
{
w = GET_WORD(&mdm_cfg[6].info[23]);
cai[22] |= (byte) w; /* info options mask */
cai[21] |= (byte)(w >> 8); /* disabled symbol rates */
}
}
}
}
}
}
}
}
}
cai[27] = i - 27;
i++;
if (!api_parse(&bp_parms[3].info[1], (word)bp_parms[3].length, "wwwwwwss", mdm_cfg))
{
if (!api_parse(&mdm_cfg[7].info[1], (word)mdm_cfg[7].length, "sss", mdm_cfg_v18))
{
for (n = 0; n < 3; n++)
{
cai[i] = (byte)(mdm_cfg_v18[n].length);
for (j = 1; j < ((word)(cai[i] + 1)); j++)
cai[i + j] = mdm_cfg_v18[n].info[j];
i += cai[i] + 1;
}
}
}
cai[0] = (byte)(i - 1);
}
}
}
}
if (GET_WORD(bp_parms[0].info) == 2 || /* V.110 async */
GET_WORD(bp_parms[0].info) == 3) /* V.110 sync */
{
if (bp_parms[3].length) {
dbug(1, dprintf("V.110,%d", GET_WORD(&bp_parms[3].info[1])));
switch (GET_WORD(&bp_parms[3].info[1])) { /* Rate */
case 0:
case 56000:
if (GET_WORD(bp_parms[0].info) == 3) { /* V.110 sync 56k */
dbug(1, dprintf("56k sync HSCX"));
cai[1] = 8;
cai[2] = 0;
cai[3] = 0;
}
else if (GET_WORD(bp_parms[0].info) == 2) {
dbug(1, dprintf("56k async DSP"));
cai[2] = 9;
}
break;
case 50: cai[2] = 1; break;
case 75: cai[2] = 1; break;
case 110: cai[2] = 1; break;
case 150: cai[2] = 1; break;
case 200: cai[2] = 1; break;
case 300: cai[2] = 1; break;
case 600: cai[2] = 1; break;
case 1200: cai[2] = 2; break;
case 2400: cai[2] = 3; break;
case 4800: cai[2] = 4; break;
case 7200: cai[2] = 10; break;
case 9600: cai[2] = 5; break;
case 12000: cai[2] = 13; break;
case 24000: cai[2] = 0; break;
case 14400: cai[2] = 11; break;
case 19200: cai[2] = 6; break;
case 28800: cai[2] = 12; break;
case 38400: cai[2] = 7; break;
case 48000: cai[2] = 8; break;
case 76: cai[2] = 15; break; /* 75/1200 */
case 1201: cai[2] = 14; break; /* 1200/75 */
case 56001: cai[2] = 9; break; /* V.110 56000 */
default:
return _B1_PARM_NOT_SUPPORTED;
}
cai[3] = 0;
if (cai[1] == 13) /* v.110 async */
{
if (bp_parms[3].length >= 8)
{
switch (GET_WORD(&bp_parms[3].info[3]))
{ /* char length */
case 5:
cai[3] |= DSP_CAI_ASYNC_CHAR_LENGTH_5;
break;
case 6:
cai[3] |= DSP_CAI_ASYNC_CHAR_LENGTH_6;
break;
case 7:
cai[3] |= DSP_CAI_ASYNC_CHAR_LENGTH_7;
break;
}
switch (GET_WORD(&bp_parms[3].info[5]))
{ /* Parity */
case 1: /* odd parity */
cai[3] |= (DSP_CAI_ASYNC_PARITY_ENABLE | DSP_CAI_ASYNC_PARITY_ODD);
break;
case 2: /* even parity */
cai[3] |= (DSP_CAI_ASYNC_PARITY_ENABLE | DSP_CAI_ASYNC_PARITY_EVEN);
break;
}
switch (GET_WORD(&bp_parms[3].info[7]))
{ /* stop bits */
case 1: /* 2 stop bits */
cai[3] |= DSP_CAI_ASYNC_TWO_STOP_BITS;
break;
}
}
}
}
else if (cai[1] == 8 || GET_WORD(bp_parms[0].info) == 3) {
dbug(1, dprintf("V.110 default 56k sync"));
cai[1] = 8;
cai[2] = 0;
cai[3] = 0;
}
else {
dbug(1, dprintf("V.110 default 9600 async"));
cai[2] = 5;
}
}
PUT_WORD(&cai[5], plci->appl->MaxDataLength);
dbug(1, dprintf("CAI[%d]=%x,%x,%x,%x,%x,%x", cai[0], cai[1], cai[2], cai[3], cai[4], cai[5], cai[6]));
/* HexDump ("CAI", sizeof(cai), &cai[0]); */
add_p(plci, CAI, cai);
return 0;
}
/*------------------------------------------------------------------*/
/* put parameter for b2 and B3 protocol in the parameter buffer */
/*------------------------------------------------------------------*/
static word add_b23(PLCI *plci, API_PARSE *bp)
{
word i, fax_control_bits;
byte pos, len;
byte SAPI = 0x40; /* default SAPI 16 for x.31 */
API_PARSE bp_parms[8];
API_PARSE *b1_config;
API_PARSE *b2_config;
API_PARSE b2_config_parms[8];
API_PARSE *b3_config;
API_PARSE b3_config_parms[6];
API_PARSE global_config[2];
static byte llc[3] = {2,0,0};
static byte dlc[20] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
static byte nlc[256];
static byte lli[12] = {1,1};
const byte llc2_out[] = {1,2,4,6,2,0,0,0, X75_V42BIS,V120_L2,V120_V42BIS,V120_L2,6};
const byte llc2_in[] = {1,3,4,6,3,0,0,0, X75_V42BIS,V120_L2,V120_V42BIS,V120_L2,6};
const byte llc3[] = {4,3,2,2,6,6,0};
const byte header[] = {0,2,3,3,0,0,0};
for (i = 0; i < 8; i++) bp_parms[i].length = 0;
for (i = 0; i < 6; i++) b2_config_parms[i].length = 0;
for (i = 0; i < 5; i++) b3_config_parms[i].length = 0;
lli[0] = 1;
lli[1] = 1;
if (plci->adapter->manufacturer_features & MANUFACTURER_FEATURE_XONOFF_FLOW_CONTROL)
lli[1] |= 2;
if (plci->adapter->manufacturer_features & MANUFACTURER_FEATURE_OOB_CHANNEL)
lli[1] |= 4;
if ((lli[1] & 0x02) && (diva_xdi_extended_features & DIVA_CAPI_USE_CMA)) {
lli[1] |= 0x10;
if (plci->rx_dma_descriptor <= 0) {
plci->rx_dma_descriptor = diva_get_dma_descriptor(plci, &plci->rx_dma_magic);
if (plci->rx_dma_descriptor >= 0)
plci->rx_dma_descriptor++;
}
if (plci->rx_dma_descriptor > 0) {
lli[0] = 6;
lli[1] |= 0x40;
lli[2] = (byte)(plci->rx_dma_descriptor - 1);
lli[3] = (byte)plci->rx_dma_magic;
lli[4] = (byte)(plci->rx_dma_magic >> 8);
lli[5] = (byte)(plci->rx_dma_magic >> 16);
lli[6] = (byte)(plci->rx_dma_magic >> 24);
}
}
if (DIVA_CAPI_SUPPORTS_NO_CANCEL(plci->adapter)) {
lli[1] |= 0x20;
}
dbug(1, dprintf("add_b23"));
api_save_msg(bp, "s", &plci->B_protocol);
if (!bp->length && plci->tel)
{
plci->adv_nl = true;
dbug(1, dprintf("Default adv.Nl"));
add_p(plci, LLI, lli);
plci->B2_prot = 1 /*XPARENT*/;
plci->B3_prot = 0 /*XPARENT*/;
llc[1] = 2;
llc[2] = 4;
add_p(plci, LLC, llc);
dlc[0] = 2;
PUT_WORD(&dlc[1], plci->appl->MaxDataLength);
add_p(plci, DLC, dlc);
return 0;
}
if (!bp->length) /*default*/
{
dbug(1, dprintf("ret default"));
add_p(plci, LLI, lli);
plci->B2_prot = 0 /*X.75 */;
plci->B3_prot = 0 /*XPARENT*/;
llc[1] = 1;
llc[2] = 4;
add_p(plci, LLC, llc);
dlc[0] = 2;
PUT_WORD(&dlc[1], plci->appl->MaxDataLength);
add_p(plci, DLC, dlc);
return 0;
}
dbug(1, dprintf("b_prot_len=%d", (word)bp->length));
if ((word)bp->length > 256) return _WRONG_MESSAGE_FORMAT;
if (api_parse(&bp->info[1], (word)bp->length, "wwwsssb", bp_parms))
{
bp_parms[6].length = 0;
if (api_parse(&bp->info[1], (word)bp->length, "wwwsss", bp_parms))
{
dbug(1, dprintf("b-form.!"));
return _WRONG_MESSAGE_FORMAT;
}
}
else if (api_parse(&bp->info[1], (word)bp->length, "wwwssss", bp_parms))
{
dbug(1, dprintf("b-form.!"));
return _WRONG_MESSAGE_FORMAT;
}
if (plci->tel == ADV_VOICE) /* transparent B on advanced voice */
{
if (GET_WORD(bp_parms[1].info) != 1
|| GET_WORD(bp_parms[2].info) != 0) return _B2_NOT_SUPPORTED;
plci->adv_nl = true;
}
else if (plci->tel) return _B2_NOT_SUPPORTED;
if ((GET_WORD(bp_parms[1].info) == B2_RTP)
&& (GET_WORD(bp_parms[2].info) == B3_RTP)
&& (plci->adapter->man_profile.private_options & (1L << PRIVATE_RTP)))
{
add_p(plci, LLI, lli);
plci->B2_prot = (byte) GET_WORD(bp_parms[1].info);
plci->B3_prot = (byte) GET_WORD(bp_parms[2].info);
llc[1] = (plci->call_dir & (CALL_DIR_ORIGINATE | CALL_DIR_FORCE_OUTG_NL)) ? 14 : 13;
llc[2] = 4;
add_p(plci, LLC, llc);
dlc[0] = 2;
PUT_WORD(&dlc[1], plci->appl->MaxDataLength);
dlc[3] = 3; /* Addr A */
dlc[4] = 1; /* Addr B */
dlc[5] = 7; /* modulo mode */
dlc[6] = 7; /* window size */
dlc[7] = 0; /* XID len Lo */
dlc[8] = 0; /* XID len Hi */
for (i = 0; i < bp_parms[4].length; i++)
dlc[9 + i] = bp_parms[4].info[1 + i];
dlc[0] = (byte)(8 + bp_parms[4].length);
add_p(plci, DLC, dlc);
for (i = 0; i < bp_parms[5].length; i++)
nlc[1 + i] = bp_parms[5].info[1 + i];
nlc[0] = (byte)(bp_parms[5].length);
add_p(plci, NLC, nlc);
return 0;
}
if ((GET_WORD(bp_parms[1].info) >= 32)
|| (!((1L << GET_WORD(bp_parms[1].info)) & plci->adapter->profile.B2_Protocols)
&& ((GET_WORD(bp_parms[1].info) != B2_PIAFS)
|| !(plci->adapter->man_profile.private_options & (1L << PRIVATE_PIAFS)))))
{
return _B2_NOT_SUPPORTED;
}
if ((GET_WORD(bp_parms[2].info) >= 32)
|| !((1L << GET_WORD(bp_parms[2].info)) & plci->adapter->profile.B3_Protocols))
{
return _B3_NOT_SUPPORTED;
}
if ((GET_WORD(bp_parms[1].info) != B2_SDLC)
&& ((GET_WORD(bp_parms[0].info) == B1_MODEM_ALL_NEGOTIATE)
|| (GET_WORD(bp_parms[0].info) == B1_MODEM_ASYNC)
|| (GET_WORD(bp_parms[0].info) == B1_MODEM_SYNC_HDLC)))
{
return (add_modem_b23(plci, bp_parms));
}
add_p(plci, LLI, lli);
plci->B2_prot = (byte)GET_WORD(bp_parms[1].info);
plci->B3_prot = (byte)GET_WORD(bp_parms[2].info);
if (plci->B2_prot == 12) SAPI = 0; /* default SAPI D-channel */
if (bp_parms[6].length)
{
if (api_parse(&bp_parms[6].info[1], (word)bp_parms[6].length, "w", global_config))
{
return _WRONG_MESSAGE_FORMAT;
}
switch (GET_WORD(global_config[0].info))
{
case 1:
plci->call_dir = (plci->call_dir & ~CALL_DIR_ANSWER) | CALL_DIR_ORIGINATE;
break;
case 2:
plci->call_dir = (plci->call_dir & ~CALL_DIR_ORIGINATE) | CALL_DIR_ANSWER;
break;
}
}
dbug(1, dprintf("call_dir=%04x", plci->call_dir));
if (plci->B2_prot == B2_PIAFS)
llc[1] = PIAFS_CRC;
else
/* IMPLEMENT_PIAFS */
{
llc[1] = (plci->call_dir & (CALL_DIR_ORIGINATE | CALL_DIR_FORCE_OUTG_NL)) ?
llc2_out[GET_WORD(bp_parms[1].info)] : llc2_in[GET_WORD(bp_parms[1].info)];
}
llc[2] = llc3[GET_WORD(bp_parms[2].info)];
add_p(plci, LLC, llc);
dlc[0] = 2;
PUT_WORD(&dlc[1], plci->appl->MaxDataLength +
header[GET_WORD(bp_parms[2].info)]);
b1_config = &bp_parms[3];
nlc[0] = 0;
if (plci->B3_prot == 4
|| plci->B3_prot == 5)
{
for (i = 0; i < sizeof(T30_INFO); i++) nlc[i] = 0;
nlc[0] = sizeof(T30_INFO);
if (plci->adapter->manufacturer_features & MANUFACTURER_FEATURE_FAX_PAPER_FORMATS)
((T30_INFO *)&nlc[1])->operating_mode = T30_OPERATING_MODE_CAPI;
((T30_INFO *)&nlc[1])->rate_div_2400 = 0xff;
if (b1_config->length >= 2)
{
((T30_INFO *)&nlc[1])->rate_div_2400 = (byte)(GET_WORD(&b1_config->info[1]) / 2400);
}
}
b2_config = &bp_parms[4];
if (llc[1] == PIAFS_CRC)
{
if (plci->B3_prot != B3_TRANSPARENT)
{
return _B_STACK_NOT_SUPPORTED;
}
if (b2_config->length && api_parse(&b2_config->info[1], (word)b2_config->length, "bwww", b2_config_parms)) {
return _WRONG_MESSAGE_FORMAT;
}
PUT_WORD(&dlc[1], plci->appl->MaxDataLength);
dlc[3] = 0; /* Addr A */
dlc[4] = 0; /* Addr B */
dlc[5] = 0; /* modulo mode */
dlc[6] = 0; /* window size */
if (b2_config->length >= 7) {
dlc[7] = 7;
dlc[8] = 0;
dlc[9] = b2_config_parms[0].info[0]; /* PIAFS protocol Speed configuration */
dlc[10] = b2_config_parms[1].info[0]; /* V.42bis P0 */
dlc[11] = b2_config_parms[1].info[1]; /* V.42bis P0 */
dlc[12] = b2_config_parms[2].info[0]; /* V.42bis P1 */
dlc[13] = b2_config_parms[2].info[1]; /* V.42bis P1 */
dlc[14] = b2_config_parms[3].info[0]; /* V.42bis P2 */
dlc[15] = b2_config_parms[3].info[1]; /* V.42bis P2 */
dlc[0] = 15;
if (b2_config->length >= 8) { /* PIAFS control abilities */
dlc[7] = 10;
dlc[16] = 2; /* Length of PIAFS extension */
dlc[17] = PIAFS_UDATA_ABILITIES; /* control (UDATA) ability */
dlc[18] = b2_config_parms[4].info[0]; /* value */
dlc[0] = 18;
}
}
else /* default values, 64K, variable, no compression */
{
dlc[7] = 7;
dlc[8] = 0;
dlc[9] = 0x03; /* PIAFS protocol Speed configuration */
dlc[10] = 0x03; /* V.42bis P0 */
dlc[11] = 0; /* V.42bis P0 */
dlc[12] = 0; /* V.42bis P1 */
dlc[13] = 0; /* V.42bis P1 */
dlc[14] = 0; /* V.42bis P2 */
dlc[15] = 0; /* V.42bis P2 */
dlc[0] = 15;
}
add_p(plci, DLC, dlc);
}
else
if ((llc[1] == V120_L2) || (llc[1] == V120_V42BIS))
{
if (plci->B3_prot != B3_TRANSPARENT)
return _B_STACK_NOT_SUPPORTED;
dlc[0] = 6;
PUT_WORD(&dlc[1], GET_WORD(&dlc[1]) + 2);
dlc[3] = 0x08;
dlc[4] = 0x01;
dlc[5] = 127;
dlc[6] = 7;
if (b2_config->length != 0)
{
if ((llc[1] == V120_V42BIS) && api_parse(&b2_config->info[1], (word)b2_config->length, "bbbbwww", b2_config_parms)) {
return _WRONG_MESSAGE_FORMAT;
}
dlc[3] = (byte)((b2_config->info[2] << 3) | ((b2_config->info[1] >> 5) & 0x04));
dlc[4] = (byte)((b2_config->info[1] << 1) | 0x01);
if (b2_config->info[3] != 128)
{
dbug(1, dprintf("1D-dlc= %x %x %x %x %x", dlc[0], dlc[1], dlc[2], dlc[3], dlc[4]));
return _B2_PARM_NOT_SUPPORTED;
}
dlc[5] = (byte)(b2_config->info[3] - 1);
dlc[6] = b2_config->info[4];
if (llc[1] == V120_V42BIS) {
if (b2_config->length >= 10) {
dlc[7] = 6;
dlc[8] = 0;
dlc[9] = b2_config_parms[4].info[0];
dlc[10] = b2_config_parms[4].info[1];
dlc[11] = b2_config_parms[5].info[0];
dlc[12] = b2_config_parms[5].info[1];
dlc[13] = b2_config_parms[6].info[0];
dlc[14] = b2_config_parms[6].info[1];
dlc[0] = 14;
dbug(1, dprintf("b2_config_parms[4].info[0] [1]: %x %x", b2_config_parms[4].info[0], b2_config_parms[4].info[1]));
dbug(1, dprintf("b2_config_parms[5].info[0] [1]: %x %x", b2_config_parms[5].info[0], b2_config_parms[5].info[1]));
dbug(1, dprintf("b2_config_parms[6].info[0] [1]: %x %x", b2_config_parms[6].info[0], b2_config_parms[6].info[1]));
}
else {
dlc[6] = 14;
}
}
}
}
else
{
if (b2_config->length)
{
dbug(1, dprintf("B2-Config"));
if (llc[1] == X75_V42BIS) {
if (api_parse(&b2_config->info[1], (word)b2_config->length, "bbbbwww", b2_config_parms))
{
return _WRONG_MESSAGE_FORMAT;
}
}
else {
if (api_parse(&b2_config->info[1], (word)b2_config->length, "bbbbs", b2_config_parms))
{
return _WRONG_MESSAGE_FORMAT;
}
}
/* if B2 Protocol is LAPD, b2_config structure is different */
if (llc[1] == 6)
{
dlc[0] = 4;
if (b2_config->length >= 1) dlc[2] = b2_config->info[1]; /* TEI */
else dlc[2] = 0x01;
if ((b2_config->length >= 2) && (plci->B2_prot == 12))
{
SAPI = b2_config->info[2]; /* SAPI */
}
dlc[1] = SAPI;
if ((b2_config->length >= 3) && (b2_config->info[3] == 128))
{
dlc[3] = 127; /* Mode */
}
else
{
dlc[3] = 7; /* Mode */
}
if (b2_config->length >= 4) dlc[4] = b2_config->info[4]; /* Window */
else dlc[4] = 1;
dbug(1, dprintf("D-dlc[%d]=%x,%x,%x,%x", dlc[0], dlc[1], dlc[2], dlc[3], dlc[4]));
if (b2_config->length > 5) return _B2_PARM_NOT_SUPPORTED;
}
else
{
dlc[0] = (byte)(b2_config_parms[4].length + 6);
dlc[3] = b2_config->info[1];
dlc[4] = b2_config->info[2];
if (b2_config->info[3] != 8 && b2_config->info[3] != 128) {
dbug(1, dprintf("1D-dlc= %x %x %x %x %x", dlc[0], dlc[1], dlc[2], dlc[3], dlc[4]));
return _B2_PARM_NOT_SUPPORTED;
}
dlc[5] = (byte)(b2_config->info[3] - 1);
dlc[6] = b2_config->info[4];
if (dlc[6] > dlc[5]) {
dbug(1, dprintf("2D-dlc= %x %x %x %x %x %x %x", dlc[0], dlc[1], dlc[2], dlc[3], dlc[4], dlc[5], dlc[6]));
return _B2_PARM_NOT_SUPPORTED;
}
if (llc[1] == X75_V42BIS) {
if (b2_config->length >= 10) {
dlc[7] = 6;
dlc[8] = 0;
dlc[9] = b2_config_parms[4].info[0];
dlc[10] = b2_config_parms[4].info[1];
dlc[11] = b2_config_parms[5].info[0];
dlc[12] = b2_config_parms[5].info[1];
dlc[13] = b2_config_parms[6].info[0];
dlc[14] = b2_config_parms[6].info[1];
dlc[0] = 14;
dbug(1, dprintf("b2_config_parms[4].info[0] [1]: %x %x", b2_config_parms[4].info[0], b2_config_parms[4].info[1]));
dbug(1, dprintf("b2_config_parms[5].info[0] [1]: %x %x", b2_config_parms[5].info[0], b2_config_parms[5].info[1]));
dbug(1, dprintf("b2_config_parms[6].info[0] [1]: %x %x", b2_config_parms[6].info[0], b2_config_parms[6].info[1]));
}
else {
dlc[6] = 14;
}
}
else {
PUT_WORD(&dlc[7], (word)b2_config_parms[4].length);
for (i = 0; i < b2_config_parms[4].length; i++)
dlc[11 + i] = b2_config_parms[4].info[1 + i];
}
}
}
}
add_p(plci, DLC, dlc);
b3_config = &bp_parms[5];
if (b3_config->length)
{
if (plci->B3_prot == 4
|| plci->B3_prot == 5)
{
if (api_parse(&b3_config->info[1], (word)b3_config->length, "wwss", b3_config_parms))
{
return _WRONG_MESSAGE_FORMAT;
}
i = GET_WORD((byte *)(b3_config_parms[0].info));
((T30_INFO *)&nlc[1])->resolution = (byte)(((i & 0x0001) ||
((plci->B3_prot == 4) && (((byte)(GET_WORD((byte *)b3_config_parms[1].info))) != 5))) ? T30_RESOLUTION_R8_0770_OR_200 : 0);
((T30_INFO *)&nlc[1])->data_format = (byte)(GET_WORD((byte *)b3_config_parms[1].info));
fax_control_bits = T30_CONTROL_BIT_ALL_FEATURES;
if ((((T30_INFO *)&nlc[1])->rate_div_2400 != 0) && (((T30_INFO *)&nlc[1])->rate_div_2400 <= 6))
fax_control_bits &= ~T30_CONTROL_BIT_ENABLE_V34FAX;
if (plci->adapter->manufacturer_features & MANUFACTURER_FEATURE_FAX_PAPER_FORMATS)
{
if ((plci->requested_options_conn | plci->requested_options | plci->adapter->requested_options_table[plci->appl->Id - 1])
& (1L << PRIVATE_FAX_PAPER_FORMATS))
{
((T30_INFO *)&nlc[1])->resolution |= T30_RESOLUTION_R8_1540 |
T30_RESOLUTION_R16_1540_OR_400 | T30_RESOLUTION_300_300 |
T30_RESOLUTION_INCH_BASED | T30_RESOLUTION_METRIC_BASED;
}
((T30_INFO *)&nlc[1])->recording_properties =
T30_RECORDING_WIDTH_ISO_A3 |
(T30_RECORDING_LENGTH_UNLIMITED << 2) |
(T30_MIN_SCANLINE_TIME_00_00_00 << 4);
}
if (plci->B3_prot == 5)
{
if (i & 0x0002) /* Accept incoming fax-polling requests */
fax_control_bits |= T30_CONTROL_BIT_ACCEPT_POLLING;
if (i & 0x2000) /* Do not use MR compression */
fax_control_bits &= ~T30_CONTROL_BIT_ENABLE_2D_CODING;
if (i & 0x4000) /* Do not use MMR compression */
fax_control_bits &= ~T30_CONTROL_BIT_ENABLE_T6_CODING;
if (i & 0x8000) /* Do not use ECM */
fax_control_bits &= ~T30_CONTROL_BIT_ENABLE_ECM;
if (plci->fax_connect_info_length != 0)
{
((T30_INFO *)&nlc[1])->resolution = ((T30_INFO *)plci->fax_connect_info_buffer)->resolution;
((T30_INFO *)&nlc[1])->data_format = ((T30_INFO *)plci->fax_connect_info_buffer)->data_format;
((T30_INFO *)&nlc[1])->recording_properties = ((T30_INFO *)plci->fax_connect_info_buffer)->recording_properties;
fax_control_bits |= GET_WORD(&((T30_INFO *)plci->fax_connect_info_buffer)->control_bits_low) &
(T30_CONTROL_BIT_REQUEST_POLLING | T30_CONTROL_BIT_MORE_DOCUMENTS);
}
}
/* copy station id to NLC */
for (i = 0; i < T30_MAX_STATION_ID_LENGTH; i++)
{
if (i < b3_config_parms[2].length)
{
((T30_INFO *)&nlc[1])->station_id[i] = ((byte *)b3_config_parms[2].info)[1 + i];
}
else
{
((T30_INFO *)&nlc[1])->station_id[i] = ' ';
}
}
((T30_INFO *)&nlc[1])->station_id_len = T30_MAX_STATION_ID_LENGTH;
/* copy head line to NLC */
if (b3_config_parms[3].length)
{
pos = (byte)(fax_head_line_time(&(((T30_INFO *)&nlc[1])->station_id[T30_MAX_STATION_ID_LENGTH])));
if (pos != 0)
{
if (CAPI_MAX_DATE_TIME_LENGTH + 2 + b3_config_parms[3].length > CAPI_MAX_HEAD_LINE_SPACE)
pos = 0;
else
{
nlc[1 + offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH + pos++] = ' ';
nlc[1 + offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH + pos++] = ' ';
len = (byte)b3_config_parms[2].length;
if (len > 20)
len = 20;
if (CAPI_MAX_DATE_TIME_LENGTH + 2 + len + 2 + b3_config_parms[3].length <= CAPI_MAX_HEAD_LINE_SPACE)
{
for (i = 0; i < len; i++)
nlc[1 + offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH + pos++] = ((byte *)b3_config_parms[2].info)[1 + i];
nlc[1 + offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH + pos++] = ' ';
nlc[1 + offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH + pos++] = ' ';
}
}
}
len = (byte)b3_config_parms[3].length;
if (len > CAPI_MAX_HEAD_LINE_SPACE - pos)
len = (byte)(CAPI_MAX_HEAD_LINE_SPACE - pos);
((T30_INFO *)&nlc[1])->head_line_len = (byte)(pos + len);
nlc[0] += (byte)(pos + len);
for (i = 0; i < len; i++)
nlc[1 + offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH + pos++] = ((byte *)b3_config_parms[3].info)[1 + i];
} else
((T30_INFO *)&nlc[1])->head_line_len = 0;
plci->nsf_control_bits = 0;
if (plci->B3_prot == 5)
{
if ((plci->adapter->man_profile.private_options & (1L << PRIVATE_FAX_SUB_SEP_PWD))
&& (GET_WORD((byte *)b3_config_parms[1].info) & 0x8000)) /* Private SUB/SEP/PWD enable */
{
plci->requested_options |= 1L << PRIVATE_FAX_SUB_SEP_PWD;
}
if ((plci->adapter->man_profile.private_options & (1L << PRIVATE_FAX_NONSTANDARD))
&& (GET_WORD((byte *)b3_config_parms[1].info) & 0x4000)) /* Private non-standard facilities enable */
{
plci->requested_options |= 1L << PRIVATE_FAX_NONSTANDARD;
}
if ((plci->requested_options_conn | plci->requested_options | plci->adapter->requested_options_table[plci->appl->Id - 1])
& ((1L << PRIVATE_FAX_SUB_SEP_PWD) | (1L << PRIVATE_FAX_NONSTANDARD)))
{
if ((plci->requested_options_conn | plci->requested_options | plci->adapter->requested_options_table[plci->appl->Id - 1])
& (1L << PRIVATE_FAX_SUB_SEP_PWD))
{
fax_control_bits |= T30_CONTROL_BIT_ACCEPT_SUBADDRESS | T30_CONTROL_BIT_ACCEPT_PASSWORD;
if (fax_control_bits & T30_CONTROL_BIT_ACCEPT_POLLING)
fax_control_bits |= T30_CONTROL_BIT_ACCEPT_SEL_POLLING;
}
len = nlc[0];
pos = offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH;
if (pos < plci->fax_connect_info_length)
{
for (i = 1 + plci->fax_connect_info_buffer[pos]; i != 0; i--)
nlc[++len] = plci->fax_connect_info_buffer[pos++];
}
else
nlc[++len] = 0;
if (pos < plci->fax_connect_info_length)
{
for (i = 1 + plci->fax_connect_info_buffer[pos]; i != 0; i--)
nlc[++len] = plci->fax_connect_info_buffer[pos++];
}
else
nlc[++len] = 0;
if ((plci->requested_options_conn | plci->requested_options | plci->adapter->requested_options_table[plci->appl->Id - 1])
& (1L << PRIVATE_FAX_NONSTANDARD))
{
if ((pos < plci->fax_connect_info_length) && (plci->fax_connect_info_buffer[pos] != 0))
{
if ((plci->fax_connect_info_buffer[pos] >= 3) && (plci->fax_connect_info_buffer[pos + 1] >= 2))
plci->nsf_control_bits = GET_WORD(&plci->fax_connect_info_buffer[pos + 2]);
for (i = 1 + plci->fax_connect_info_buffer[pos]; i != 0; i--)
nlc[++len] = plci->fax_connect_info_buffer[pos++];
}
else
{
if (api_parse(&b3_config->info[1], (word)b3_config->length, "wwsss", b3_config_parms))
{
dbug(1, dprintf("non-standard facilities info missing or wrong format"));
nlc[++len] = 0;
}
else
{
if ((b3_config_parms[4].length >= 3) && (b3_config_parms[4].info[1] >= 2))
plci->nsf_control_bits = GET_WORD(&b3_config_parms[4].info[2]);
nlc[++len] = (byte)(b3_config_parms[4].length);
for (i = 0; i < b3_config_parms[4].length; i++)
nlc[++len] = b3_config_parms[4].info[1 + i];
}
}
}
nlc[0] = len;
if ((plci->nsf_control_bits & T30_NSF_CONTROL_BIT_ENABLE_NSF)
&& (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_NEGOTIATE_RESP))
{
((T30_INFO *)&nlc[1])->operating_mode = T30_OPERATING_MODE_CAPI_NEG;
}
}
}
PUT_WORD(&(((T30_INFO *)&nlc[1])->control_bits_low), fax_control_bits);
len = offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH;
for (i = 0; i < len; i++)
plci->fax_connect_info_buffer[i] = nlc[1 + i];
((T30_INFO *) plci->fax_connect_info_buffer)->head_line_len = 0;
i += ((T30_INFO *)&nlc[1])->head_line_len;
while (i < nlc[0])
plci->fax_connect_info_buffer[len++] = nlc[++i];
plci->fax_connect_info_length = len;
}
else
{
nlc[0] = 14;
if (b3_config->length != 16)
return _B3_PARM_NOT_SUPPORTED;
for (i = 0; i < 12; i++) nlc[1 + i] = b3_config->info[1 + i];
if (GET_WORD(&b3_config->info[13]) != 8 && GET_WORD(&b3_config->info[13]) != 128)
return _B3_PARM_NOT_SUPPORTED;
nlc[13] = b3_config->info[13];
if (GET_WORD(&b3_config->info[15]) >= nlc[13])
return _B3_PARM_NOT_SUPPORTED;
nlc[14] = b3_config->info[15];
}
}
else
{
if (plci->B3_prot == 4
|| plci->B3_prot == 5 /*T.30 - FAX*/) return _B3_PARM_NOT_SUPPORTED;
}
add_p(plci, NLC, nlc);
return 0;
}
/*----------------------------------------------------------------*/
/* make the same as add_b23, but only for the modem related */
/* L2 and L3 B-Chan protocol. */
/* */
/* Enabled L2 and L3 Configurations: */
/* If L1 == Modem all negotiation */
/* only L2 == Modem with full negotiation is allowed */
/* If L1 == Modem async or sync */
/* only L2 == Transparent is allowed */
/* L3 == Modem or L3 == Transparent are allowed */
/* B2 Configuration for modem: */
/* word : enable/disable compression, bitoptions */
/* B3 Configuration for modem: */
/* empty */
/*----------------------------------------------------------------*/
static word add_modem_b23(PLCI *plci, API_PARSE *bp_parms)
{
static byte lli[12] = {1,1};
static byte llc[3] = {2,0,0};
static byte dlc[16] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
API_PARSE mdm_config[2];
word i;
word b2_config = 0;
for (i = 0; i < 2; i++) mdm_config[i].length = 0;
for (i = 0; i < sizeof(dlc); i++) dlc[i] = 0;
if (((GET_WORD(bp_parms[0].info) == B1_MODEM_ALL_NEGOTIATE)
&& (GET_WORD(bp_parms[1].info) != B2_MODEM_EC_COMPRESSION))
|| ((GET_WORD(bp_parms[0].info) != B1_MODEM_ALL_NEGOTIATE)
&& (GET_WORD(bp_parms[1].info) != B2_TRANSPARENT)))
{
return (_B_STACK_NOT_SUPPORTED);
}
if ((GET_WORD(bp_parms[2].info) != B3_MODEM)
&& (GET_WORD(bp_parms[2].info) != B3_TRANSPARENT))
{
return (_B_STACK_NOT_SUPPORTED);
}
plci->B2_prot = (byte) GET_WORD(bp_parms[1].info);
plci->B3_prot = (byte) GET_WORD(bp_parms[2].info);
if ((GET_WORD(bp_parms[1].info) == B2_MODEM_EC_COMPRESSION) && bp_parms[4].length)
{
if (api_parse(&bp_parms[4].info[1],
(word)bp_parms[4].length, "w",
mdm_config))
{
return (_WRONG_MESSAGE_FORMAT);
}
b2_config = GET_WORD(mdm_config[0].info);
}
/* OK, L2 is modem */
lli[0] = 1;
lli[1] = 1;
if (plci->adapter->manufacturer_features & MANUFACTURER_FEATURE_XONOFF_FLOW_CONTROL)
lli[1] |= 2;
if (plci->adapter->manufacturer_features & MANUFACTURER_FEATURE_OOB_CHANNEL)
lli[1] |= 4;
if ((lli[1] & 0x02) && (diva_xdi_extended_features & DIVA_CAPI_USE_CMA)) {
lli[1] |= 0x10;
if (plci->rx_dma_descriptor <= 0) {
plci->rx_dma_descriptor = diva_get_dma_descriptor(plci, &plci->rx_dma_magic);
if (plci->rx_dma_descriptor >= 0)
plci->rx_dma_descriptor++;
}
if (plci->rx_dma_descriptor > 0) {
lli[1] |= 0x40;
lli[0] = 6;
lli[2] = (byte)(plci->rx_dma_descriptor - 1);
lli[3] = (byte)plci->rx_dma_magic;
lli[4] = (byte)(plci->rx_dma_magic >> 8);
lli[5] = (byte)(plci->rx_dma_magic >> 16);
lli[6] = (byte)(plci->rx_dma_magic >> 24);
}
}
if (DIVA_CAPI_SUPPORTS_NO_CANCEL(plci->adapter)) {
lli[1] |= 0x20;
}
llc[1] = (plci->call_dir & (CALL_DIR_ORIGINATE | CALL_DIR_FORCE_OUTG_NL)) ?
/*V42*/ 10 : /*V42_IN*/ 9;
llc[2] = 4; /* pass L3 always transparent */
add_p(plci, LLI, lli);
add_p(plci, LLC, llc);
i = 1;
PUT_WORD(&dlc[i], plci->appl->MaxDataLength);
i += 2;
if (GET_WORD(bp_parms[1].info) == B2_MODEM_EC_COMPRESSION)
{
if (bp_parms[4].length)
{
dbug(1, dprintf("MDM b2_config=%02x", b2_config));
dlc[i++] = 3; /* Addr A */
dlc[i++] = 1; /* Addr B */
dlc[i++] = 7; /* modulo mode */
dlc[i++] = 7; /* window size */
dlc[i++] = 0; /* XID len Lo */
dlc[i++] = 0; /* XID len Hi */
if (b2_config & MDM_B2_DISABLE_V42bis)
{
dlc[i] |= DLC_MODEMPROT_DISABLE_V42_V42BIS;
}
if (b2_config & MDM_B2_DISABLE_MNP)
{
dlc[i] |= DLC_MODEMPROT_DISABLE_MNP_MNP5;
}
if (b2_config & MDM_B2_DISABLE_TRANS)
{
dlc[i] |= DLC_MODEMPROT_REQUIRE_PROTOCOL;
}
if (b2_config & MDM_B2_DISABLE_V42)
{
dlc[i] |= DLC_MODEMPROT_DISABLE_V42_DETECT;
}
if (b2_config & MDM_B2_DISABLE_COMP)
{
dlc[i] |= DLC_MODEMPROT_DISABLE_COMPRESSION;
}
i++;
}
}
else
{
dlc[i++] = 3; /* Addr A */
dlc[i++] = 1; /* Addr B */
dlc[i++] = 7; /* modulo mode */
dlc[i++] = 7; /* window size */
dlc[i++] = 0; /* XID len Lo */
dlc[i++] = 0; /* XID len Hi */
dlc[i++] = DLC_MODEMPROT_DISABLE_V42_V42BIS |
DLC_MODEMPROT_DISABLE_MNP_MNP5 |
DLC_MODEMPROT_DISABLE_V42_DETECT |
DLC_MODEMPROT_DISABLE_COMPRESSION;
}
dlc[0] = (byte)(i - 1);
/* HexDump ("DLC", sizeof(dlc), &dlc[0]); */
add_p(plci, DLC, dlc);
return (0);
}
/*------------------------------------------------------------------*/
/* send a request for the signaling entity */
/*------------------------------------------------------------------*/
static void sig_req(PLCI *plci, byte req, byte Id)
{
if (!plci) return;
if (plci->adapter->adapter_disabled) return;
dbug(1, dprintf("sig_req(%x)", req));
if (req == REMOVE)
plci->sig_remove_id = plci->Sig.Id;
if (plci->req_in == plci->req_in_start) {
plci->req_in += 2;
plci->RBuffer[plci->req_in++] = 0;
}
PUT_WORD(&plci->RBuffer[plci->req_in_start], plci->req_in-plci->req_in_start - 2);
plci->RBuffer[plci->req_in++] = Id; /* sig/nl flag */
plci->RBuffer[plci->req_in++] = req; /* request */
plci->RBuffer[plci->req_in++] = 0; /* channel */
plci->req_in_start = plci->req_in;
}
/*------------------------------------------------------------------*/
/* send a request for the network layer entity */
/*------------------------------------------------------------------*/
static void nl_req_ncci(PLCI *plci, byte req, byte ncci)
{
if (!plci) return;
if (plci->adapter->adapter_disabled) return;
dbug(1, dprintf("nl_req %02x %02x %02x", plci->Id, req, ncci));
if (req == REMOVE)
{
plci->nl_remove_id = plci->NL.Id;
ncci_remove(plci, 0, (byte)(ncci != 0));
ncci = 0;
}
if (plci->req_in == plci->req_in_start) {
plci->req_in += 2;
plci->RBuffer[plci->req_in++] = 0;
}
PUT_WORD(&plci->RBuffer[plci->req_in_start], plci->req_in-plci->req_in_start - 2);
plci->RBuffer[plci->req_in++] = 1; /* sig/nl flag */
plci->RBuffer[plci->req_in++] = req; /* request */
plci->RBuffer[plci->req_in++] = plci->adapter->ncci_ch[ncci]; /* channel */
plci->req_in_start = plci->req_in;
}
static void send_req(PLCI *plci)
{
ENTITY *e;
word l;
/* word i; */
if (!plci) return;
if (plci->adapter->adapter_disabled) return;
channel_xmit_xon(plci);
/* if nothing to do, return */
if (plci->req_in == plci->req_out) return;
dbug(1, dprintf("send_req(in=%d,out=%d)", plci->req_in, plci->req_out));
if (plci->nl_req || plci->sig_req) return;
l = GET_WORD(&plci->RBuffer[plci->req_out]);
plci->req_out += 2;
plci->XData[0].P = &plci->RBuffer[plci->req_out];
plci->req_out += l;
if (plci->RBuffer[plci->req_out] == 1)
{
e = &plci->NL;
plci->req_out++;
e->Req = plci->nl_req = plci->RBuffer[plci->req_out++];
e->ReqCh = plci->RBuffer[plci->req_out++];
if (!(e->Id & 0x1f))
{
e->Id = NL_ID;
plci->RBuffer[plci->req_out - 4] = CAI;
plci->RBuffer[plci->req_out - 3] = 1;
plci->RBuffer[plci->req_out - 2] = (plci->Sig.Id == 0xff) ? 0 : plci->Sig.Id;
plci->RBuffer[plci->req_out - 1] = 0;
l += 3;
plci->nl_global_req = plci->nl_req;
}
dbug(1, dprintf("%x:NLREQ(%x:%x:%x)", plci->adapter->Id, e->Id, e->Req, e->ReqCh));
}
else
{
e = &plci->Sig;
if (plci->RBuffer[plci->req_out])
e->Id = plci->RBuffer[plci->req_out];
plci->req_out++;
e->Req = plci->sig_req = plci->RBuffer[plci->req_out++];
e->ReqCh = plci->RBuffer[plci->req_out++];
if (!(e->Id & 0x1f))
plci->sig_global_req = plci->sig_req;
dbug(1, dprintf("%x:SIGREQ(%x:%x:%x)", plci->adapter->Id, e->Id, e->Req, e->ReqCh));
}
plci->XData[0].PLength = l;
e->X = plci->XData;
plci->adapter->request(e);
dbug(1, dprintf("send_ok"));
}
static void send_data(PLCI *plci)
{
DIVA_CAPI_ADAPTER *a;
DATA_B3_DESC *data;
NCCI *ncci_ptr;
word ncci;
if (!plci->nl_req && plci->ncci_ring_list)
{
a = plci->adapter;
ncci = plci->ncci_ring_list;
do
{
ncci = a->ncci_next[ncci];
ncci_ptr = &(a->ncci[ncci]);
if (!(a->ncci_ch[ncci]
&& (a->ch_flow_control[a->ncci_ch[ncci]] & N_OK_FC_PENDING)))
{
if (ncci_ptr->data_pending)
{
if ((a->ncci_state[ncci] == CONNECTED)
|| (a->ncci_state[ncci] == INC_ACT_PENDING)
|| (plci->send_disc == ncci))
{
data = &(ncci_ptr->DBuffer[ncci_ptr->data_out]);
if ((plci->B2_prot == B2_V120_ASYNC)
|| (plci->B2_prot == B2_V120_ASYNC_V42BIS)
|| (plci->B2_prot == B2_V120_BIT_TRANSPARENT))
{
plci->NData[1].P = TransmitBufferGet(plci->appl, data->P);
plci->NData[1].PLength = data->Length;
if (data->Flags & 0x10)
plci->NData[0].P = v120_break_header;
else
plci->NData[0].P = v120_default_header;
plci->NData[0].PLength = 1;
plci->NL.XNum = 2;
plci->NL.Req = plci->nl_req = (byte)((data->Flags & 0x07) << 4 | N_DATA);
}
else
{
plci->NData[0].P = TransmitBufferGet(plci->appl, data->P);
plci->NData[0].PLength = data->Length;
if (data->Flags & 0x10)
plci->NL.Req = plci->nl_req = (byte)N_UDATA;
else if ((plci->B3_prot == B3_RTP) && (data->Flags & 0x01))
plci->NL.Req = plci->nl_req = (byte)N_BDATA;
else
plci->NL.Req = plci->nl_req = (byte)((data->Flags & 0x07) << 4 | N_DATA);
}
plci->NL.X = plci->NData;
plci->NL.ReqCh = a->ncci_ch[ncci];
dbug(1, dprintf("%x:DREQ(%x:%x)", a->Id, plci->NL.Id, plci->NL.Req));
plci->data_sent = true;
plci->data_sent_ptr = data->P;
a->request(&plci->NL);
}
else {
cleanup_ncci_data(plci, ncci);
}
}
else if (plci->send_disc == ncci)
{
/* dprintf("N_DISC"); */
plci->NData[0].PLength = 0;
plci->NL.ReqCh = a->ncci_ch[ncci];
plci->NL.Req = plci->nl_req = N_DISC;
a->request(&plci->NL);
plci->command = _DISCONNECT_B3_R;
plci->send_disc = 0;
}
}
} while (!plci->nl_req && (ncci != plci->ncci_ring_list));
plci->ncci_ring_list = ncci;
}
}
static void listen_check(DIVA_CAPI_ADAPTER *a)
{
word i, j;
PLCI *plci;
byte activnotifiedcalls = 0;
dbug(1, dprintf("listen_check(%d,%d)", a->listen_active, a->max_listen));
if (!remove_started && !a->adapter_disabled)
{
for (i = 0; i < a->max_plci; i++)
{
plci = &(a->plci[i]);
if (plci->notifiedcall) activnotifiedcalls++;
}
dbug(1, dprintf("listen_check(%d)", activnotifiedcalls));
for (i = a->listen_active; i < ((word)(a->max_listen + activnotifiedcalls)); i++) {
if ((j = get_plci(a))) {
a->listen_active++;
plci = &a->plci[j - 1];
plci->State = LISTENING;
add_p(plci, OAD, "\x01\xfd");
add_p(plci, KEY, "\x04\x43\x41\x32\x30");
add_p(plci, CAI, "\x01\xc0");
add_p(plci, UID, "\x06\x43\x61\x70\x69\x32\x30");
add_p(plci, LLI, "\x01\xc4"); /* support Dummy CR FAC + MWI + SpoofNotify */
add_p(plci, SHIFT | 6, NULL);
add_p(plci, SIN, "\x02\x00\x00");
plci->internal_command = LISTEN_SIG_ASSIGN_PEND; /* do indicate_req if OK */
sig_req(plci, ASSIGN, DSIG_ID);
send_req(plci);
}
}
}
}
/*------------------------------------------------------------------*/
/* functions for all parameters sent in INDs */
/*------------------------------------------------------------------*/
static void IndParse(PLCI *plci, word *parms_id, byte **parms, byte multiIEsize)
{
word ploc; /* points to current location within packet */
byte w;
byte wlen;
byte codeset, lock;
byte *in;
word i;
word code;
word mIEindex = 0;
ploc = 0;
codeset = 0;
lock = 0;
in = plci->Sig.RBuffer->P;
for (i = 0; i < parms_id[0]; i++) /* multiIE parms_id contains just the 1st */
{ /* element but parms array is larger */
parms[i] = (byte *)"";
}
for (i = 0; i < multiIEsize; i++)
{
parms[i] = (byte *)"";
}
while (ploc < plci->Sig.RBuffer->length - 1) {
/* read information element id and length */
w = in[ploc];
if (w & 0x80) {
/* w &=0xf0; removed, cannot detect congestion levels */
/* upper 4 bit masked with w==SHIFT now */
wlen = 0;
}
else {
wlen = (byte)(in[ploc + 1] + 1);
}
/* check if length valid (not exceeding end of packet) */
if ((ploc + wlen) > 270) return;
if (lock & 0x80) lock &= 0x7f;
else codeset = lock;
if ((w & 0xf0) == SHIFT) {
codeset = in[ploc];
if (!(codeset & 0x08)) lock = (byte)(codeset & 7);
codeset &= 7;
lock |= 0x80;
}
else {
if (w == ESC && wlen >= 3) code = in[ploc + 2] | 0x800;
else code = w;
code |= (codeset << 8);
for (i = 1; i < parms_id[0] + 1 && parms_id[i] != code; i++);
if (i < parms_id[0] + 1) {
if (!multiIEsize) { /* with multiIEs use next field index, */
mIEindex = i - 1; /* with normal IEs use same index like parms_id */
}
parms[mIEindex] = &in[ploc + 1];
dbug(1, dprintf("mIE[%d]=0x%x", *parms[mIEindex], in[ploc]));
if (parms_id[i] == OAD
|| parms_id[i] == CONN_NR
|| parms_id[i] == CAD) {
if (in[ploc + 2] & 0x80) {
in[ploc + 0] = (byte)(in[ploc + 1] + 1);
in[ploc + 1] = (byte)(in[ploc + 2] & 0x7f);
in[ploc + 2] = 0x80;
parms[mIEindex] = &in[ploc];
}
}
mIEindex++; /* effects multiIEs only */
}
}
ploc += (wlen + 1);
}
return;
}
/*------------------------------------------------------------------*/
/* try to match a cip from received BC and HLC */
/*------------------------------------------------------------------*/
static byte ie_compare(byte *ie1, byte *ie2)
{
word i;
if (!ie1 || !ie2) return false;
if (!ie1[0]) return false;
for (i = 0; i < (word)(ie1[0] + 1); i++) if (ie1[i] != ie2[i]) return false;
return true;
}
static word find_cip(DIVA_CAPI_ADAPTER *a, byte *bc, byte *hlc)
{
word i;
word j;
for (i = 9; i && !ie_compare(bc, cip_bc[i][a->u_law]); i--);
for (j = 16; j < 29 &&
(!ie_compare(bc, cip_bc[j][a->u_law]) || !ie_compare(hlc, cip_hlc[j])); j++);
if (j == 29) return i;
return j;
}
static byte AddInfo(byte **add_i,
byte **fty_i,
byte *esc_chi,
byte *facility)
{
byte i;
byte j;
byte k;
byte flen;
byte len = 0;
/* facility is a nested structure */
/* FTY can be more than once */
if (esc_chi[0] && !(esc_chi[esc_chi[0]] & 0x7f))
{
add_i[0] = (byte *)"\x02\x02\x00"; /* use neither b nor d channel */
}
else
{
add_i[0] = (byte *)"";
}
if (!fty_i[0][0])
{
add_i[3] = (byte *)"";
}
else
{ /* facility array found */
for (i = 0, j = 1; i < MAX_MULTI_IE && fty_i[i][0]; i++)
{
dbug(1, dprintf("AddIFac[%d]", fty_i[i][0]));
len += fty_i[i][0];
len += 2;
flen = fty_i[i][0];
facility[j++] = 0x1c; /* copy fac IE */
for (k = 0; k <= flen; k++, j++)
{
facility[j] = fty_i[i][k];
/* dbug(1, dprintf("%x ",facility[j])); */
}
}
facility[0] = len;
add_i[3] = facility;
}
/* dbug(1, dprintf("FacArrLen=%d ",len)); */
len = add_i[0][0] + add_i[1][0] + add_i[2][0] + add_i[3][0];
len += 4; /* calculate length of all */
return (len);
}
/*------------------------------------------------------------------*/
/* voice and codec features */
/*------------------------------------------------------------------*/
static void SetVoiceChannel(PLCI *plci, byte *chi, DIVA_CAPI_ADAPTER *a)
{
byte voice_chi[] = "\x02\x18\x01";
byte channel;
channel = chi[chi[0]] & 0x3;
dbug(1, dprintf("ExtDevON(Ch=0x%x)", channel));
voice_chi[2] = (channel) ? channel : 1;
add_p(plci, FTY, "\x02\x01\x07"); /* B On, default on 1 */
add_p(plci, ESC, voice_chi); /* Channel */
sig_req(plci, TEL_CTRL, 0);
send_req(plci);
if (a->AdvSignalPLCI)
{
adv_voice_write_coefs(a->AdvSignalPLCI, ADV_VOICE_WRITE_ACTIVATION);
}
}
static void VoiceChannelOff(PLCI *plci)
{
dbug(1, dprintf("ExtDevOFF"));
add_p(plci, FTY, "\x02\x01\x08"); /* B Off */
sig_req(plci, TEL_CTRL, 0);
send_req(plci);
if (plci->adapter->AdvSignalPLCI)
{
adv_voice_clear_config(plci->adapter->AdvSignalPLCI);
}
}
static word AdvCodecSupport(DIVA_CAPI_ADAPTER *a, PLCI *plci, APPL *appl,
byte hook_listen)
{
word j;
PLCI *splci;
/* check if hardware supports handset with hook states (adv.codec) */
/* or if just a on board codec is supported */
/* the advanced codec plci is just for internal use */
/* diva Pro with on-board codec: */
if (a->profile.Global_Options & HANDSET)
{
/* new call, but hook states are already signalled */
if (a->AdvCodecFLAG)
{
if (a->AdvSignalAppl != appl || a->AdvSignalPLCI)
{
dbug(1, dprintf("AdvSigPlci=0x%x", a->AdvSignalPLCI));
return 0x2001; /* codec in use by another application */
}
if (plci != NULL)
{
a->AdvSignalPLCI = plci;
plci->tel = ADV_VOICE;
}
return 0; /* adv codec still used */
}
if ((j = get_plci(a)))
{
splci = &a->plci[j - 1];
splci->tel = CODEC_PERMANENT;
/* hook_listen indicates if a facility_req with handset/hook support */
/* was sent. Otherwise if just a call on an external device was made */
/* the codec will be used but the hook info will be discarded (just */
/* the external controller is in use */
if (hook_listen) splci->State = ADVANCED_VOICE_SIG;
else
{
splci->State = ADVANCED_VOICE_NOSIG;
if (plci)
{
plci->spoofed_msg = SPOOFING_REQUIRED;
}
/* indicate D-ch connect if */
} /* codec is connected OK */
if (plci != NULL)
{
a->AdvSignalPLCI = plci;
plci->tel = ADV_VOICE;
}
a->AdvSignalAppl = appl;
a->AdvCodecFLAG = true;
a->AdvCodecPLCI = splci;
add_p(splci, CAI, "\x01\x15");
add_p(splci, LLI, "\x01\x00");
add_p(splci, ESC, "\x02\x18\x00");
add_p(splci, UID, "\x06\x43\x61\x70\x69\x32\x30");
splci->internal_command = PERM_COD_ASSIGN;
dbug(1, dprintf("Codec Assign"));
sig_req(splci, ASSIGN, DSIG_ID);
send_req(splci);
}
else
{
return 0x2001; /* wrong state, no more plcis */
}
}
else if (a->profile.Global_Options & ON_BOARD_CODEC)
{
if (hook_listen) return 0x300B; /* Facility not supported */
/* no hook with SCOM */
if (plci != NULL) plci->tel = CODEC;
dbug(1, dprintf("S/SCOM codec"));
/* first time we use the scom-s codec we must shut down the internal */
/* handset application of the card. This can be done by an assign with */
/* a cai with the 0x80 bit set. Assign return code is 'out of resource'*/
if (!a->scom_appl_disable) {
if ((j = get_plci(a))) {
splci = &a->plci[j - 1];
add_p(splci, CAI, "\x01\x80");
add_p(splci, UID, "\x06\x43\x61\x70\x69\x32\x30");
sig_req(splci, ASSIGN, 0xC0); /* 0xc0 is the TEL_ID */
send_req(splci);
a->scom_appl_disable = true;
}
else{
return 0x2001; /* wrong state, no more plcis */
}
}
}
else return 0x300B; /* Facility not supported */
return 0;
}
static void CodecIdCheck(DIVA_CAPI_ADAPTER *a, PLCI *plci)
{
dbug(1, dprintf("CodecIdCheck"));
if (a->AdvSignalPLCI == plci)
{
dbug(1, dprintf("PLCI owns codec"));
VoiceChannelOff(a->AdvCodecPLCI);
if (a->AdvCodecPLCI->State == ADVANCED_VOICE_NOSIG)
{
dbug(1, dprintf("remove temp codec PLCI"));
plci_remove(a->AdvCodecPLCI);
a->AdvCodecFLAG = 0;
a->AdvCodecPLCI = NULL;
a->AdvSignalAppl = NULL;
}
a->AdvSignalPLCI = NULL;
}
}
/* -------------------------------------------------------------------
Ask for physical address of card on PCI bus
------------------------------------------------------------------- */
static void diva_ask_for_xdi_sdram_bar(DIVA_CAPI_ADAPTER *a,
IDI_SYNC_REQ *preq) {
a->sdram_bar = 0;
if (diva_xdi_extended_features & DIVA_CAPI_XDI_PROVIDES_SDRAM_BAR) {
ENTITY *e = (ENTITY *)preq;
e->user[0] = a->Id - 1;
preq->xdi_sdram_bar.info.bar = 0;
preq->xdi_sdram_bar.Req = 0;
preq->xdi_sdram_bar.Rc = IDI_SYNC_REQ_XDI_GET_ADAPTER_SDRAM_BAR;
(*(a->request))(e);
a->sdram_bar = preq->xdi_sdram_bar.info.bar;
dbug(3, dprintf("A(%d) SDRAM BAR = %08x", a->Id, a->sdram_bar));
}
}
/* -------------------------------------------------------------------
Ask XDI about extended features
------------------------------------------------------------------- */
static void diva_get_extended_adapter_features(DIVA_CAPI_ADAPTER *a) {
IDI_SYNC_REQ *preq;
char buffer[((sizeof(preq->xdi_extended_features) + 4) > sizeof(ENTITY)) ? (sizeof(preq->xdi_extended_features) + 4) : sizeof(ENTITY)];
char features[4];
preq = (IDI_SYNC_REQ *)&buffer[0];
if (!diva_xdi_extended_features) {
ENTITY *e = (ENTITY *)preq;
diva_xdi_extended_features |= 0x80000000;
e->user[0] = a->Id - 1;
preq->xdi_extended_features.Req = 0;
preq->xdi_extended_features.Rc = IDI_SYNC_REQ_XDI_GET_EXTENDED_FEATURES;
preq->xdi_extended_features.info.buffer_length_in_bytes = sizeof(features);
preq->xdi_extended_features.info.features = &features[0];
(*(a->request))(e);
if (features[0] & DIVA_XDI_EXTENDED_FEATURES_VALID) {
/*
Check features located in the byte '0'
*/
if (features[0] & DIVA_XDI_EXTENDED_FEATURE_CMA) {
diva_xdi_extended_features |= DIVA_CAPI_USE_CMA;
}
if (features[0] & DIVA_XDI_EXTENDED_FEATURE_RX_DMA) {
diva_xdi_extended_features |= DIVA_CAPI_XDI_PROVIDES_RX_DMA;
dbug(1, dprintf("XDI provides RxDMA"));
}
if (features[0] & DIVA_XDI_EXTENDED_FEATURE_SDRAM_BAR) {
diva_xdi_extended_features |= DIVA_CAPI_XDI_PROVIDES_SDRAM_BAR;
}
if (features[0] & DIVA_XDI_EXTENDED_FEATURE_NO_CANCEL_RC) {
diva_xdi_extended_features |= DIVA_CAPI_XDI_PROVIDES_NO_CANCEL;
dbug(3, dprintf("XDI provides NO_CANCEL_RC feature"));
}
}
}
diva_ask_for_xdi_sdram_bar(a, preq);
}
/*------------------------------------------------------------------*/
/* automatic law */
/*------------------------------------------------------------------*/
/* called from OS specific part after init time to get the Law */
/* a-law (Euro) and u-law (us,japan) use different BCs in the Setup message */
void AutomaticLaw(DIVA_CAPI_ADAPTER *a)
{
word j;
PLCI *splci;
if (a->automatic_law) {
return;
}
if ((j = get_plci(a))) {
diva_get_extended_adapter_features(a);
splci = &a->plci[j - 1];
a->automatic_lawPLCI = splci;
a->automatic_law = 1;
add_p(splci, CAI, "\x01\x80");
add_p(splci, UID, "\x06\x43\x61\x70\x69\x32\x30");
splci->internal_command = USELAW_REQ;
splci->command = 0;
splci->number = 0;
sig_req(splci, ASSIGN, DSIG_ID);
send_req(splci);
}
}
/* called from OS specific part if an application sends an Capi20Release */
word CapiRelease(word Id)
{
word i, j, appls_found;
PLCI *plci;
APPL *this;
DIVA_CAPI_ADAPTER *a;
if (!Id)
{
dbug(0, dprintf("A: CapiRelease(Id==0)"));
return (_WRONG_APPL_ID);
}
this = &application[Id - 1]; /* get application pointer */
for (i = 0, appls_found = 0; i < max_appl; i++)
{
if (application[i].Id) /* an application has been found */
{
appls_found++;
}
}
for (i = 0; i < max_adapter; i++) /* scan all adapters... */
{
a = &adapter[i];
if (a->request)
{
a->Info_Mask[Id - 1] = 0;
a->CIP_Mask[Id - 1] = 0;
a->Notification_Mask[Id - 1] = 0;
a->codec_listen[Id - 1] = NULL;
a->requested_options_table[Id - 1] = 0;
for (j = 0; j < a->max_plci; j++) /* and all PLCIs connected */
{ /* with this application */
plci = &a->plci[j];
if (plci->Id) /* if plci owns no application */
{ /* it may be not jet connected */
if (plci->State == INC_CON_PENDING
|| plci->State == INC_CON_ALERT)
{
if (test_c_ind_mask_bit(plci, (word)(Id - 1)))
{
clear_c_ind_mask_bit(plci, (word)(Id - 1));
if (c_ind_mask_empty(plci))
{
sig_req(plci, HANGUP, 0);
send_req(plci);
plci->State = OUTG_DIS_PENDING;
}
}
}
if (test_c_ind_mask_bit(plci, (word)(Id - 1)))
{
clear_c_ind_mask_bit(plci, (word)(Id - 1));
if (c_ind_mask_empty(plci))
{
if (!plci->appl)
{
plci_remove(plci);
plci->State = IDLE;
}
}
}
if (plci->appl == this)
{
plci->appl = NULL;
plci_remove(plci);
plci->State = IDLE;
}
}
}
listen_check(a);
if (a->flag_dynamic_l1_down)
{
if (appls_found == 1) /* last application does a capi release */
{
if ((j = get_plci(a)))
{
plci = &a->plci[j - 1];
plci->command = 0;
add_p(plci, OAD, "\x01\xfd");
add_p(plci, CAI, "\x01\x80");
add_p(plci, UID, "\x06\x43\x61\x70\x69\x32\x30");
add_p(plci, SHIFT | 6, NULL);
add_p(plci, SIN, "\x02\x00\x00");
plci->internal_command = REM_L1_SIG_ASSIGN_PEND;
sig_req(plci, ASSIGN, DSIG_ID);
add_p(plci, FTY, "\x02\xff\x06"); /* l1 down */
sig_req(plci, SIG_CTRL, 0);
send_req(plci);
}
}
}
if (a->AdvSignalAppl == this)
{
this->NullCREnable = false;
if (a->AdvCodecPLCI)
{
plci_remove(a->AdvCodecPLCI);
a->AdvCodecPLCI->tel = 0;
a->AdvCodecPLCI->adv_nl = 0;
}
a->AdvSignalAppl = NULL;
a->AdvSignalPLCI = NULL;
a->AdvCodecFLAG = 0;
a->AdvCodecPLCI = NULL;
}
}
}
this->Id = 0;
return GOOD;
}
static word plci_remove_check(PLCI *plci)
{
if (!plci) return true;
if (!plci->NL.Id && c_ind_mask_empty(plci))
{
if (plci->Sig.Id == 0xff)
plci->Sig.Id = 0;
if (!plci->Sig.Id)
{
dbug(1, dprintf("plci_remove_complete(%x)", plci->Id));
dbug(1, dprintf("tel=0x%x,Sig=0x%x", plci->tel, plci->Sig.Id));
if (plci->Id)
{
CodecIdCheck(plci->adapter, plci);
clear_b1_config(plci);
ncci_remove(plci, 0, false);
plci_free_msg_in_queue(plci);
channel_flow_control_remove(plci);
plci->Id = 0;
plci->State = IDLE;
plci->channels = 0;
plci->appl = NULL;
plci->notifiedcall = 0;
}
listen_check(plci->adapter);
return true;
}
}
return false;
}
/*------------------------------------------------------------------*/
static byte plci_nl_busy(PLCI *plci)
{
/* only applicable for non-multiplexed protocols */
return (plci->nl_req
|| (plci->ncci_ring_list
&& plci->adapter->ncci_ch[plci->ncci_ring_list]
&& (plci->adapter->ch_flow_control[plci->adapter->ncci_ch[plci->ncci_ring_list]] & N_OK_FC_PENDING)));
}
/*------------------------------------------------------------------*/
/* DTMF facilities */
/*------------------------------------------------------------------*/
static struct
{
byte send_mask;
byte listen_mask;
byte character;
byte code;
} dtmf_digit_map[] =
{
{ 0x01, 0x01, 0x23, DTMF_DIGIT_TONE_CODE_HASHMARK },
{ 0x01, 0x01, 0x2a, DTMF_DIGIT_TONE_CODE_STAR },
{ 0x01, 0x01, 0x30, DTMF_DIGIT_TONE_CODE_0 },
{ 0x01, 0x01, 0x31, DTMF_DIGIT_TONE_CODE_1 },
{ 0x01, 0x01, 0x32, DTMF_DIGIT_TONE_CODE_2 },
{ 0x01, 0x01, 0x33, DTMF_DIGIT_TONE_CODE_3 },
{ 0x01, 0x01, 0x34, DTMF_DIGIT_TONE_CODE_4 },
{ 0x01, 0x01, 0x35, DTMF_DIGIT_TONE_CODE_5 },
{ 0x01, 0x01, 0x36, DTMF_DIGIT_TONE_CODE_6 },
{ 0x01, 0x01, 0x37, DTMF_DIGIT_TONE_CODE_7 },
{ 0x01, 0x01, 0x38, DTMF_DIGIT_TONE_CODE_8 },
{ 0x01, 0x01, 0x39, DTMF_DIGIT_TONE_CODE_9 },
{ 0x01, 0x01, 0x41, DTMF_DIGIT_TONE_CODE_A },
{ 0x01, 0x01, 0x42, DTMF_DIGIT_TONE_CODE_B },
{ 0x01, 0x01, 0x43, DTMF_DIGIT_TONE_CODE_C },
{ 0x01, 0x01, 0x44, DTMF_DIGIT_TONE_CODE_D },
{ 0x01, 0x00, 0x61, DTMF_DIGIT_TONE_CODE_A },
{ 0x01, 0x00, 0x62, DTMF_DIGIT_TONE_CODE_B },
{ 0x01, 0x00, 0x63, DTMF_DIGIT_TONE_CODE_C },
{ 0x01, 0x00, 0x64, DTMF_DIGIT_TONE_CODE_D },
{ 0x04, 0x04, 0x80, DTMF_SIGNAL_NO_TONE },
{ 0x00, 0x04, 0x81, DTMF_SIGNAL_UNIDENTIFIED_TONE },
{ 0x04, 0x04, 0x82, DTMF_SIGNAL_DIAL_TONE },
{ 0x04, 0x04, 0x83, DTMF_SIGNAL_PABX_INTERNAL_DIAL_TONE },
{ 0x04, 0x04, 0x84, DTMF_SIGNAL_SPECIAL_DIAL_TONE },
{ 0x04, 0x04, 0x85, DTMF_SIGNAL_SECOND_DIAL_TONE },
{ 0x04, 0x04, 0x86, DTMF_SIGNAL_RINGING_TONE },
{ 0x04, 0x04, 0x87, DTMF_SIGNAL_SPECIAL_RINGING_TONE },
{ 0x04, 0x04, 0x88, DTMF_SIGNAL_BUSY_TONE },
{ 0x04, 0x04, 0x89, DTMF_SIGNAL_CONGESTION_TONE },
{ 0x04, 0x04, 0x8a, DTMF_SIGNAL_SPECIAL_INFORMATION_TONE },
{ 0x04, 0x04, 0x8b, DTMF_SIGNAL_COMFORT_TONE },
{ 0x04, 0x04, 0x8c, DTMF_SIGNAL_HOLD_TONE },
{ 0x04, 0x04, 0x8d, DTMF_SIGNAL_RECORD_TONE },
{ 0x04, 0x04, 0x8e, DTMF_SIGNAL_CALLER_WAITING_TONE },
{ 0x04, 0x04, 0x8f, DTMF_SIGNAL_CALL_WAITING_TONE },
{ 0x04, 0x04, 0x90, DTMF_SIGNAL_PAY_TONE },
{ 0x04, 0x04, 0x91, DTMF_SIGNAL_POSITIVE_INDICATION_TONE },
{ 0x04, 0x04, 0x92, DTMF_SIGNAL_NEGATIVE_INDICATION_TONE },
{ 0x04, 0x04, 0x93, DTMF_SIGNAL_WARNING_TONE },
{ 0x04, 0x04, 0x94, DTMF_SIGNAL_INTRUSION_TONE },
{ 0x04, 0x04, 0x95, DTMF_SIGNAL_CALLING_CARD_SERVICE_TONE },
{ 0x04, 0x04, 0x96, DTMF_SIGNAL_PAYPHONE_RECOGNITION_TONE },
{ 0x04, 0x04, 0x97, DTMF_SIGNAL_CPE_ALERTING_SIGNAL },
{ 0x04, 0x04, 0x98, DTMF_SIGNAL_OFF_HOOK_WARNING_TONE },
{ 0x04, 0x04, 0xbf, DTMF_SIGNAL_INTERCEPT_TONE },
{ 0x04, 0x04, 0xc0, DTMF_SIGNAL_MODEM_CALLING_TONE },
{ 0x04, 0x04, 0xc1, DTMF_SIGNAL_FAX_CALLING_TONE },
{ 0x04, 0x04, 0xc2, DTMF_SIGNAL_ANSWER_TONE },
{ 0x04, 0x04, 0xc3, DTMF_SIGNAL_REVERSED_ANSWER_TONE },
{ 0x04, 0x04, 0xc4, DTMF_SIGNAL_ANSAM_TONE },
{ 0x04, 0x04, 0xc5, DTMF_SIGNAL_REVERSED_ANSAM_TONE },
{ 0x04, 0x04, 0xc6, DTMF_SIGNAL_BELL103_ANSWER_TONE },
{ 0x04, 0x04, 0xc7, DTMF_SIGNAL_FAX_FLAGS },
{ 0x04, 0x04, 0xc8, DTMF_SIGNAL_G2_FAX_GROUP_ID },
{ 0x00, 0x04, 0xc9, DTMF_SIGNAL_HUMAN_SPEECH },
{ 0x04, 0x04, 0xca, DTMF_SIGNAL_ANSWERING_MACHINE_390 },
{ 0x02, 0x02, 0xf1, DTMF_MF_DIGIT_TONE_CODE_1 },
{ 0x02, 0x02, 0xf2, DTMF_MF_DIGIT_TONE_CODE_2 },
{ 0x02, 0x02, 0xf3, DTMF_MF_DIGIT_TONE_CODE_3 },
{ 0x02, 0x02, 0xf4, DTMF_MF_DIGIT_TONE_CODE_4 },
{ 0x02, 0x02, 0xf5, DTMF_MF_DIGIT_TONE_CODE_5 },
{ 0x02, 0x02, 0xf6, DTMF_MF_DIGIT_TONE_CODE_6 },
{ 0x02, 0x02, 0xf7, DTMF_MF_DIGIT_TONE_CODE_7 },
{ 0x02, 0x02, 0xf8, DTMF_MF_DIGIT_TONE_CODE_8 },
{ 0x02, 0x02, 0xf9, DTMF_MF_DIGIT_TONE_CODE_9 },
{ 0x02, 0x02, 0xfa, DTMF_MF_DIGIT_TONE_CODE_0 },
{ 0x02, 0x02, 0xfb, DTMF_MF_DIGIT_TONE_CODE_K1 },
{ 0x02, 0x02, 0xfc, DTMF_MF_DIGIT_TONE_CODE_K2 },
{ 0x02, 0x02, 0xfd, DTMF_MF_DIGIT_TONE_CODE_KP },
{ 0x02, 0x02, 0xfe, DTMF_MF_DIGIT_TONE_CODE_S1 },
{ 0x02, 0x02, 0xff, DTMF_MF_DIGIT_TONE_CODE_ST },
};
#define DTMF_DIGIT_MAP_ENTRIES ARRAY_SIZE(dtmf_digit_map)
static void dtmf_enable_receiver(PLCI *plci, byte enable_mask)
{
word min_digit_duration, min_gap_duration;
dbug(1, dprintf("[%06lx] %s,%d: dtmf_enable_receiver %02x",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__, enable_mask));
if (enable_mask != 0)
{
min_digit_duration = (plci->dtmf_rec_pulse_ms == 0) ? 40 : plci->dtmf_rec_pulse_ms;
min_gap_duration = (plci->dtmf_rec_pause_ms == 0) ? 40 : plci->dtmf_rec_pause_ms;
plci->internal_req_buffer[0] = DTMF_UDATA_REQUEST_ENABLE_RECEIVER;
PUT_WORD(&plci->internal_req_buffer[1], min_digit_duration);
PUT_WORD(&plci->internal_req_buffer[3], min_gap_duration);
plci->NData[0].PLength = 5;
PUT_WORD(&plci->internal_req_buffer[5], INTERNAL_IND_BUFFER_SIZE);
plci->NData[0].PLength += 2;
capidtmf_recv_enable(&(plci->capidtmf_state), min_digit_duration, min_gap_duration);
}
else
{
plci->internal_req_buffer[0] = DTMF_UDATA_REQUEST_DISABLE_RECEIVER;
plci->NData[0].PLength = 1;
capidtmf_recv_disable(&(plci->capidtmf_state));
}
plci->NData[0].P = plci->internal_req_buffer;
plci->NL.X = plci->NData;
plci->NL.ReqCh = 0;
plci->NL.Req = plci->nl_req = (byte) N_UDATA;
plci->adapter->request(&plci->NL);
}
static void dtmf_send_digits(PLCI *plci, byte *digit_buffer, word digit_count)
{
word w, i;
dbug(1, dprintf("[%06lx] %s,%d: dtmf_send_digits %d",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__, digit_count));
plci->internal_req_buffer[0] = DTMF_UDATA_REQUEST_SEND_DIGITS;
w = (plci->dtmf_send_pulse_ms == 0) ? 40 : plci->dtmf_send_pulse_ms;
PUT_WORD(&plci->internal_req_buffer[1], w);
w = (plci->dtmf_send_pause_ms == 0) ? 40 : plci->dtmf_send_pause_ms;
PUT_WORD(&plci->internal_req_buffer[3], w);
for (i = 0; i < digit_count; i++)
{
w = 0;
while ((w < DTMF_DIGIT_MAP_ENTRIES)
&& (digit_buffer[i] != dtmf_digit_map[w].character))
{
w++;
}
plci->internal_req_buffer[5 + i] = (w < DTMF_DIGIT_MAP_ENTRIES) ?
dtmf_digit_map[w].code : DTMF_DIGIT_TONE_CODE_STAR;
}
plci->NData[0].PLength = 5 + digit_count;
plci->NData[0].P = plci->internal_req_buffer;
plci->NL.X = plci->NData;
plci->NL.ReqCh = 0;
plci->NL.Req = plci->nl_req = (byte) N_UDATA;
plci->adapter->request(&plci->NL);
}
static void dtmf_rec_clear_config(PLCI *plci)
{
dbug(1, dprintf("[%06lx] %s,%d: dtmf_rec_clear_config",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__));
plci->dtmf_rec_active = 0;
plci->dtmf_rec_pulse_ms = 0;
plci->dtmf_rec_pause_ms = 0;
capidtmf_init(&(plci->capidtmf_state), plci->adapter->u_law);
}
static void dtmf_send_clear_config(PLCI *plci)
{
dbug(1, dprintf("[%06lx] %s,%d: dtmf_send_clear_config",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__));
plci->dtmf_send_requests = 0;
plci->dtmf_send_pulse_ms = 0;
plci->dtmf_send_pause_ms = 0;
}
static void dtmf_prepare_switch(dword Id, PLCI *plci)
{
dbug(1, dprintf("[%06lx] %s,%d: dtmf_prepare_switch",
UnMapId(Id), (char *)(FILE_), __LINE__));
while (plci->dtmf_send_requests != 0)
dtmf_confirmation(Id, plci);
}
static word dtmf_save_config(dword Id, PLCI *plci, byte Rc)
{
dbug(1, dprintf("[%06lx] %s,%d: dtmf_save_config %02x %d",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->adjust_b_state));
return (GOOD);
}
static word dtmf_restore_config(dword Id, PLCI *plci, byte Rc)
{
word Info;
dbug(1, dprintf("[%06lx] %s,%d: dtmf_restore_config %02x %d",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->adjust_b_state));
Info = GOOD;
if (plci->B1_facilities & B1_FACILITY_DTMFR)
{
switch (plci->adjust_b_state)
{
case ADJUST_B_RESTORE_DTMF_1:
plci->internal_command = plci->adjust_b_command;
if (plci_nl_busy(plci))
{
plci->adjust_b_state = ADJUST_B_RESTORE_DTMF_1;
break;
}
dtmf_enable_receiver(plci, plci->dtmf_rec_active);
plci->adjust_b_state = ADJUST_B_RESTORE_DTMF_2;
break;
case ADJUST_B_RESTORE_DTMF_2:
if ((Rc != OK) && (Rc != OK_FC))
{
dbug(1, dprintf("[%06lx] %s,%d: Reenable DTMF receiver failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
Info = _WRONG_STATE;
break;
}
break;
}
}
return (Info);
}
static void dtmf_command(dword Id, PLCI *plci, byte Rc)
{
word internal_command, Info;
byte mask;
byte result[4];
dbug(1, dprintf("[%06lx] %s,%d: dtmf_command %02x %04x %04x %d %d %d %d",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->internal_command,
plci->dtmf_cmd, plci->dtmf_rec_pulse_ms, plci->dtmf_rec_pause_ms,
plci->dtmf_send_pulse_ms, plci->dtmf_send_pause_ms));
Info = GOOD;
result[0] = 2;
PUT_WORD(&result[1], DTMF_SUCCESS);
internal_command = plci->internal_command;
plci->internal_command = 0;
mask = 0x01;
switch (plci->dtmf_cmd)
{
case DTMF_LISTEN_TONE_START:
mask <<= 1;
case DTMF_LISTEN_MF_START:
mask <<= 1;
case DTMF_LISTEN_START:
switch (internal_command)
{
default:
adjust_b1_resource(Id, plci, NULL, (word)(plci->B1_facilities |
B1_FACILITY_DTMFR), DTMF_COMMAND_1);
case DTMF_COMMAND_1:
if (adjust_b_process(Id, plci, Rc) != GOOD)
{
dbug(1, dprintf("[%06lx] %s,%d: Load DTMF failed",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _FACILITY_NOT_SUPPORTED;
break;
}
if (plci->internal_command)
return;
case DTMF_COMMAND_2:
if (plci_nl_busy(plci))
{
plci->internal_command = DTMF_COMMAND_2;
return;
}
plci->internal_command = DTMF_COMMAND_3;
dtmf_enable_receiver(plci, (byte)(plci->dtmf_rec_active | mask));
return;
case DTMF_COMMAND_3:
if ((Rc != OK) && (Rc != OK_FC))
{
dbug(1, dprintf("[%06lx] %s,%d: Enable DTMF receiver failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
Info = _FACILITY_NOT_SUPPORTED;
break;
}
plci->tone_last_indication_code = DTMF_SIGNAL_NO_TONE;
plci->dtmf_rec_active |= mask;
break;
}
break;
case DTMF_LISTEN_TONE_STOP:
mask <<= 1;
case DTMF_LISTEN_MF_STOP:
mask <<= 1;
case DTMF_LISTEN_STOP:
switch (internal_command)
{
default:
plci->dtmf_rec_active &= ~mask;
if (plci->dtmf_rec_active)
break;
/*
case DTMF_COMMAND_1:
if (plci->dtmf_rec_active)
{
if (plci_nl_busy (plci))
{
plci->internal_command = DTMF_COMMAND_1;
return;
}
plci->dtmf_rec_active &= ~mask;
plci->internal_command = DTMF_COMMAND_2;
dtmf_enable_receiver (plci, false);
return;
}
Rc = OK;
case DTMF_COMMAND_2:
if ((Rc != OK) && (Rc != OK_FC))
{
dbug (1, dprintf("[%06lx] %s,%d: Disable DTMF receiver failed %02x",
UnMapId (Id), (char far *)(FILE_), __LINE__, Rc));
Info = _FACILITY_NOT_SUPPORTED;
break;
}
*/
adjust_b1_resource(Id, plci, NULL, (word)(plci->B1_facilities &
~(B1_FACILITY_DTMFX | B1_FACILITY_DTMFR)), DTMF_COMMAND_3);
case DTMF_COMMAND_3:
if (adjust_b_process(Id, plci, Rc) != GOOD)
{
dbug(1, dprintf("[%06lx] %s,%d: Unload DTMF failed",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _FACILITY_NOT_SUPPORTED;
break;
}
if (plci->internal_command)
return;
break;
}
break;
case DTMF_SEND_TONE:
mask <<= 1;
case DTMF_SEND_MF:
mask <<= 1;
case DTMF_DIGITS_SEND:
switch (internal_command)
{
default:
adjust_b1_resource(Id, plci, NULL, (word)(plci->B1_facilities |
((plci->dtmf_parameter_length != 0) ? B1_FACILITY_DTMFX | B1_FACILITY_DTMFR : B1_FACILITY_DTMFX)),
DTMF_COMMAND_1);
case DTMF_COMMAND_1:
if (adjust_b_process(Id, plci, Rc) != GOOD)
{
dbug(1, dprintf("[%06lx] %s,%d: Load DTMF failed",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _FACILITY_NOT_SUPPORTED;
break;
}
if (plci->internal_command)
return;
case DTMF_COMMAND_2:
if (plci_nl_busy(plci))
{
plci->internal_command = DTMF_COMMAND_2;
return;
}
plci->dtmf_msg_number_queue[(plci->dtmf_send_requests)++] = plci->number;
plci->internal_command = DTMF_COMMAND_3;
dtmf_send_digits(plci, &plci->saved_msg.parms[3].info[1], plci->saved_msg.parms[3].length);
return;
case DTMF_COMMAND_3:
if ((Rc != OK) && (Rc != OK_FC))
{
dbug(1, dprintf("[%06lx] %s,%d: Send DTMF digits failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
if (plci->dtmf_send_requests != 0)
(plci->dtmf_send_requests)--;
Info = _FACILITY_NOT_SUPPORTED;
break;
}
return;
}
break;
}
sendf(plci->appl, _FACILITY_R | CONFIRM, Id & 0xffffL, plci->number,
"wws", Info, SELECTOR_DTMF, result);
}
static byte dtmf_request(dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI *plci, APPL *appl, API_PARSE *msg)
{
word Info;
word i, j;
byte mask;
API_PARSE dtmf_parms[5];
byte result[40];
dbug(1, dprintf("[%06lx] %s,%d: dtmf_request",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = GOOD;
result[0] = 2;
PUT_WORD(&result[1], DTMF_SUCCESS);
if (!(a->profile.Global_Options & GL_DTMF_SUPPORTED))
{
dbug(1, dprintf("[%06lx] %s,%d: Facility not supported",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _FACILITY_NOT_SUPPORTED;
}
else if (api_parse(&msg[1].info[1], msg[1].length, "w", dtmf_parms))
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong message format",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _WRONG_MESSAGE_FORMAT;
}
else if ((GET_WORD(dtmf_parms[0].info) == DTMF_GET_SUPPORTED_DETECT_CODES)
|| (GET_WORD(dtmf_parms[0].info) == DTMF_GET_SUPPORTED_SEND_CODES))
{
if (!((a->requested_options_table[appl->Id - 1])
& (1L << PRIVATE_DTMF_TONE)))
{
dbug(1, dprintf("[%06lx] %s,%d: DTMF unknown request %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, GET_WORD(dtmf_parms[0].info)));
PUT_WORD(&result[1], DTMF_UNKNOWN_REQUEST);
}
else
{
for (i = 0; i < 32; i++)
result[4 + i] = 0;
if (GET_WORD(dtmf_parms[0].info) == DTMF_GET_SUPPORTED_DETECT_CODES)
{
for (i = 0; i < DTMF_DIGIT_MAP_ENTRIES; i++)
{
if (dtmf_digit_map[i].listen_mask != 0)
result[4 + (dtmf_digit_map[i].character >> 3)] |= (1 << (dtmf_digit_map[i].character & 0x7));
}
}
else
{
for (i = 0; i < DTMF_DIGIT_MAP_ENTRIES; i++)
{
if (dtmf_digit_map[i].send_mask != 0)
result[4 + (dtmf_digit_map[i].character >> 3)] |= (1 << (dtmf_digit_map[i].character & 0x7));
}
}
result[0] = 3 + 32;
result[3] = 32;
}
}
else if (plci == NULL)
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong PLCI",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _WRONG_IDENTIFIER;
}
else
{
if (!plci->State
|| !plci->NL.Id || plci->nl_remove_id)
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong state",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _WRONG_STATE;
}
else
{
plci->command = 0;
plci->dtmf_cmd = GET_WORD(dtmf_parms[0].info);
mask = 0x01;
switch (plci->dtmf_cmd)
{
case DTMF_LISTEN_TONE_START:
case DTMF_LISTEN_TONE_STOP:
mask <<= 1;
case DTMF_LISTEN_MF_START:
case DTMF_LISTEN_MF_STOP:
mask <<= 1;
if (!((plci->requested_options_conn | plci->requested_options | plci->adapter->requested_options_table[appl->Id - 1])
& (1L << PRIVATE_DTMF_TONE)))
{
dbug(1, dprintf("[%06lx] %s,%d: DTMF unknown request %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, GET_WORD(dtmf_parms[0].info)));
PUT_WORD(&result[1], DTMF_UNKNOWN_REQUEST);
break;
}
case DTMF_LISTEN_START:
case DTMF_LISTEN_STOP:
if (!(a->manufacturer_features & MANUFACTURER_FEATURE_HARDDTMF)
&& !(a->manufacturer_features & MANUFACTURER_FEATURE_SOFTDTMF_RECEIVE))
{
dbug(1, dprintf("[%06lx] %s,%d: Facility not supported",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _FACILITY_NOT_SUPPORTED;
break;
}
if (mask & DTMF_LISTEN_ACTIVE_FLAG)
{
if (api_parse(&msg[1].info[1], msg[1].length, "wwws", dtmf_parms))
{
plci->dtmf_rec_pulse_ms = 0;
plci->dtmf_rec_pause_ms = 0;
}
else
{
plci->dtmf_rec_pulse_ms = GET_WORD(dtmf_parms[1].info);
plci->dtmf_rec_pause_ms = GET_WORD(dtmf_parms[2].info);
}
}
start_internal_command(Id, plci, dtmf_command);
return (false);
case DTMF_SEND_TONE:
mask <<= 1;
case DTMF_SEND_MF:
mask <<= 1;
if (!((plci->requested_options_conn | plci->requested_options | plci->adapter->requested_options_table[appl->Id - 1])
& (1L << PRIVATE_DTMF_TONE)))
{
dbug(1, dprintf("[%06lx] %s,%d: DTMF unknown request %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, GET_WORD(dtmf_parms[0].info)));
PUT_WORD(&result[1], DTMF_UNKNOWN_REQUEST);
break;
}
case DTMF_DIGITS_SEND:
if (api_parse(&msg[1].info[1], msg[1].length, "wwws", dtmf_parms))
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong message format",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _WRONG_MESSAGE_FORMAT;
break;
}
if (mask & DTMF_LISTEN_ACTIVE_FLAG)
{
plci->dtmf_send_pulse_ms = GET_WORD(dtmf_parms[1].info);
plci->dtmf_send_pause_ms = GET_WORD(dtmf_parms[2].info);
}
i = 0;
j = 0;
while ((i < dtmf_parms[3].length) && (j < DTMF_DIGIT_MAP_ENTRIES))
{
j = 0;
while ((j < DTMF_DIGIT_MAP_ENTRIES)
&& ((dtmf_parms[3].info[i + 1] != dtmf_digit_map[j].character)
|| ((dtmf_digit_map[j].send_mask & mask) == 0)))
{
j++;
}
i++;
}
if (j == DTMF_DIGIT_MAP_ENTRIES)
{
dbug(1, dprintf("[%06lx] %s,%d: Incorrect DTMF digit %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, dtmf_parms[3].info[i]));
PUT_WORD(&result[1], DTMF_INCORRECT_DIGIT);
break;
}
if (plci->dtmf_send_requests >= ARRAY_SIZE(plci->dtmf_msg_number_queue))
{
dbug(1, dprintf("[%06lx] %s,%d: DTMF request overrun",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _WRONG_STATE;
break;
}
api_save_msg(dtmf_parms, "wwws", &plci->saved_msg);
start_internal_command(Id, plci, dtmf_command);
return (false);
default:
dbug(1, dprintf("[%06lx] %s,%d: DTMF unknown request %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, plci->dtmf_cmd));
PUT_WORD(&result[1], DTMF_UNKNOWN_REQUEST);
}
}
}
sendf(appl, _FACILITY_R | CONFIRM, Id & 0xffffL, Number,
"wws", Info, SELECTOR_DTMF, result);
return (false);
}
static void dtmf_confirmation(dword Id, PLCI *plci)
{
word i;
byte result[4];
dbug(1, dprintf("[%06lx] %s,%d: dtmf_confirmation",
UnMapId(Id), (char *)(FILE_), __LINE__));
result[0] = 2;
PUT_WORD(&result[1], DTMF_SUCCESS);
if (plci->dtmf_send_requests != 0)
{
sendf(plci->appl, _FACILITY_R | CONFIRM, Id & 0xffffL, plci->dtmf_msg_number_queue[0],
"wws", GOOD, SELECTOR_DTMF, result);
(plci->dtmf_send_requests)--;
for (i = 0; i < plci->dtmf_send_requests; i++)
plci->dtmf_msg_number_queue[i] = plci->dtmf_msg_number_queue[i + 1];
}
}
static void dtmf_indication(dword Id, PLCI *plci, byte *msg, word length)
{
word i, j, n;
dbug(1, dprintf("[%06lx] %s,%d: dtmf_indication",
UnMapId(Id), (char *)(FILE_), __LINE__));
n = 0;
for (i = 1; i < length; i++)
{
j = 0;
while ((j < DTMF_DIGIT_MAP_ENTRIES)
&& ((msg[i] != dtmf_digit_map[j].code)
|| ((dtmf_digit_map[j].listen_mask & plci->dtmf_rec_active) == 0)))
{
j++;
}
if (j < DTMF_DIGIT_MAP_ENTRIES)
{
if ((dtmf_digit_map[j].listen_mask & DTMF_TONE_LISTEN_ACTIVE_FLAG)
&& (plci->tone_last_indication_code == DTMF_SIGNAL_NO_TONE)
&& (dtmf_digit_map[j].character != DTMF_SIGNAL_UNIDENTIFIED_TONE))
{
if (n + 1 == i)
{
for (i = length; i > n + 1; i--)
msg[i] = msg[i - 1];
length++;
i++;
}
msg[++n] = DTMF_SIGNAL_UNIDENTIFIED_TONE;
}
plci->tone_last_indication_code = dtmf_digit_map[j].character;
msg[++n] = dtmf_digit_map[j].character;
}
}
if (n != 0)
{
msg[0] = (byte) n;
sendf(plci->appl, _FACILITY_I, Id & 0xffffL, 0, "wS", SELECTOR_DTMF, msg);
}
}
/*------------------------------------------------------------------*/
/* DTMF parameters */
/*------------------------------------------------------------------*/
static void dtmf_parameter_write(PLCI *plci)
{
word i;
byte parameter_buffer[DTMF_PARAMETER_BUFFER_SIZE + 2];
dbug(1, dprintf("[%06lx] %s,%d: dtmf_parameter_write",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__));
parameter_buffer[0] = plci->dtmf_parameter_length + 1;
parameter_buffer[1] = DSP_CTRL_SET_DTMF_PARAMETERS;
for (i = 0; i < plci->dtmf_parameter_length; i++)
parameter_buffer[2 + i] = plci->dtmf_parameter_buffer[i];
add_p(plci, FTY, parameter_buffer);
sig_req(plci, TEL_CTRL, 0);
send_req(plci);
}
static void dtmf_parameter_clear_config(PLCI *plci)
{
dbug(1, dprintf("[%06lx] %s,%d: dtmf_parameter_clear_config",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__));
plci->dtmf_parameter_length = 0;
}
static void dtmf_parameter_prepare_switch(dword Id, PLCI *plci)
{
dbug(1, dprintf("[%06lx] %s,%d: dtmf_parameter_prepare_switch",
UnMapId(Id), (char *)(FILE_), __LINE__));
}
static word dtmf_parameter_save_config(dword Id, PLCI *plci, byte Rc)
{
dbug(1, dprintf("[%06lx] %s,%d: dtmf_parameter_save_config %02x %d",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->adjust_b_state));
return (GOOD);
}
static word dtmf_parameter_restore_config(dword Id, PLCI *plci, byte Rc)
{
word Info;
dbug(1, dprintf("[%06lx] %s,%d: dtmf_parameter_restore_config %02x %d",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->adjust_b_state));
Info = GOOD;
if ((plci->B1_facilities & B1_FACILITY_DTMFR)
&& (plci->dtmf_parameter_length != 0))
{
switch (plci->adjust_b_state)
{
case ADJUST_B_RESTORE_DTMF_PARAMETER_1:
plci->internal_command = plci->adjust_b_command;
if (plci->sig_req)
{
plci->adjust_b_state = ADJUST_B_RESTORE_DTMF_PARAMETER_1;
break;
}
dtmf_parameter_write(plci);
plci->adjust_b_state = ADJUST_B_RESTORE_DTMF_PARAMETER_2;
break;
case ADJUST_B_RESTORE_DTMF_PARAMETER_2:
if ((Rc != OK) && (Rc != OK_FC))
{
dbug(1, dprintf("[%06lx] %s,%d: Restore DTMF parameters failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
Info = _WRONG_STATE;
break;
}
break;
}
}
return (Info);
}
/*------------------------------------------------------------------*/
/* Line interconnect facilities */
/*------------------------------------------------------------------*/
LI_CONFIG *li_config_table;
word li_total_channels;
/*------------------------------------------------------------------*/
/* translate a CHI information element to a channel number */
/* returns 0xff - any channel */
/* 0xfe - chi wrong coding */
/* 0xfd - D-channel */
/* 0x00 - no channel */
/* else channel number / PRI: timeslot */
/* if channels is provided we accept more than one channel. */
/*------------------------------------------------------------------*/
static byte chi_to_channel(byte *chi, dword *pchannelmap)
{
int p;
int i;
dword map;
byte excl;
byte ofs;
byte ch;
if (pchannelmap) *pchannelmap = 0;
if (!chi[0]) return 0xff;
excl = 0;
if (chi[1] & 0x20) {
if (chi[0] == 1 && chi[1] == 0xac) return 0xfd; /* exclusive d-channel */
for (i = 1; i < chi[0] && !(chi[i] & 0x80); i++);
if (i == chi[0] || !(chi[i] & 0x80)) return 0xfe;
if ((chi[1] | 0xc8) != 0xe9) return 0xfe;
if (chi[1] & 0x08) excl = 0x40;
/* int. id present */
if (chi[1] & 0x40) {
p = i + 1;
for (i = p; i < chi[0] && !(chi[i] & 0x80); i++);
if (i == chi[0] || !(chi[i] & 0x80)) return 0xfe;
}
/* coding standard, Number/Map, Channel Type */
p = i + 1;
for (i = p; i < chi[0] && !(chi[i] & 0x80); i++);
if (i == chi[0] || !(chi[i] & 0x80)) return 0xfe;
if ((chi[p] | 0xd0) != 0xd3) return 0xfe;
/* Number/Map */
if (chi[p] & 0x10) {
/* map */
if ((chi[0] - p) == 4) ofs = 0;
else if ((chi[0] - p) == 3) ofs = 1;
else return 0xfe;
ch = 0;
map = 0;
for (i = 0; i < 4 && p < chi[0]; i++) {
p++;
ch += 8;
map <<= 8;
if (chi[p]) {
for (ch = 0; !(chi[p] & (1 << ch)); ch++);
map |= chi[p];
}
}
ch += ofs;
map <<= ofs;
}
else {
/* number */
p = i + 1;
ch = chi[p] & 0x3f;
if (pchannelmap) {
if ((byte)(chi[0] - p) > 30) return 0xfe;
map = 0;
for (i = p; i <= chi[0]; i++) {
if ((chi[i] & 0x7f) > 31) return 0xfe;
map |= (1L << (chi[i] & 0x7f));
}
}
else {
if (p != chi[0]) return 0xfe;
if (ch > 31) return 0xfe;
map = (1L << ch);
}
if (chi[p] & 0x40) return 0xfe;
}
if (pchannelmap) *pchannelmap = map;
else if (map != ((dword)(1L << ch))) return 0xfe;
return (byte)(excl | ch);
}
else { /* not PRI */
for (i = 1; i < chi[0] && !(chi[i] & 0x80); i++);
if (i != chi[0] || !(chi[i] & 0x80)) return 0xfe;
if (chi[1] & 0x08) excl = 0x40;
switch (chi[1] | 0x98) {
case 0x98: return 0;
case 0x99:
if (pchannelmap) *pchannelmap = 2;
return excl | 1;
case 0x9a:
if (pchannelmap) *pchannelmap = 4;
return excl | 2;
case 0x9b: return 0xff;
case 0x9c: return 0xfd; /* d-ch */
default: return 0xfe;
}
}
}
static void mixer_set_bchannel_id_esc(PLCI *plci, byte bchannel_id)
{
DIVA_CAPI_ADAPTER *a;
PLCI *splci;
byte old_id;
a = plci->adapter;
old_id = plci->li_bchannel_id;
if (a->li_pri)
{
if ((old_id != 0) && (li_config_table[a->li_base + (old_id - 1)].plci == plci))
li_config_table[a->li_base + (old_id - 1)].plci = NULL;
plci->li_bchannel_id = (bchannel_id & 0x1f) + 1;
if (li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci == NULL)
li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci = plci;
}
else
{
if (((bchannel_id & 0x03) == 1) || ((bchannel_id & 0x03) == 2))
{
if ((old_id != 0) && (li_config_table[a->li_base + (old_id - 1)].plci == plci))
li_config_table[a->li_base + (old_id - 1)].plci = NULL;
plci->li_bchannel_id = bchannel_id & 0x03;
if ((a->AdvSignalPLCI != NULL) && (a->AdvSignalPLCI != plci) && (a->AdvSignalPLCI->tel == ADV_VOICE))
{
splci = a->AdvSignalPLCI;
if (li_config_table[a->li_base + (2 - plci->li_bchannel_id)].plci == NULL)
{
if ((splci->li_bchannel_id != 0)
&& (li_config_table[a->li_base + (splci->li_bchannel_id - 1)].plci == splci))
{
li_config_table[a->li_base + (splci->li_bchannel_id - 1)].plci = NULL;
}
splci->li_bchannel_id = 3 - plci->li_bchannel_id;
li_config_table[a->li_base + (2 - plci->li_bchannel_id)].plci = splci;
dbug(1, dprintf("[%06lx] %s,%d: adv_voice_set_bchannel_id_esc %d",
(dword)((splci->Id << 8) | UnMapController(splci->adapter->Id)),
(char *)(FILE_), __LINE__, splci->li_bchannel_id));
}
}
if (li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci == NULL)
li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci = plci;
}
}
if ((old_id == 0) && (plci->li_bchannel_id != 0)
&& (li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci == plci))
{
mixer_clear_config(plci);
}
dbug(1, dprintf("[%06lx] %s,%d: mixer_set_bchannel_id_esc %d %d",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__, bchannel_id, plci->li_bchannel_id));
}
static void mixer_set_bchannel_id(PLCI *plci, byte *chi)
{
DIVA_CAPI_ADAPTER *a;
PLCI *splci;
byte ch, old_id;
a = plci->adapter;
old_id = plci->li_bchannel_id;
ch = chi_to_channel(chi, NULL);
if (!(ch & 0x80))
{
if (a->li_pri)
{
if ((old_id != 0) && (li_config_table[a->li_base + (old_id - 1)].plci == plci))
li_config_table[a->li_base + (old_id - 1)].plci = NULL;
plci->li_bchannel_id = (ch & 0x1f) + 1;
if (li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci == NULL)
li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci = plci;
}
else
{
if (((ch & 0x1f) == 1) || ((ch & 0x1f) == 2))
{
if ((old_id != 0) && (li_config_table[a->li_base + (old_id - 1)].plci == plci))
li_config_table[a->li_base + (old_id - 1)].plci = NULL;
plci->li_bchannel_id = ch & 0x1f;
if ((a->AdvSignalPLCI != NULL) && (a->AdvSignalPLCI != plci) && (a->AdvSignalPLCI->tel == ADV_VOICE))
{
splci = a->AdvSignalPLCI;
if (li_config_table[a->li_base + (2 - plci->li_bchannel_id)].plci == NULL)
{
if ((splci->li_bchannel_id != 0)
&& (li_config_table[a->li_base + (splci->li_bchannel_id - 1)].plci == splci))
{
li_config_table[a->li_base + (splci->li_bchannel_id - 1)].plci = NULL;
}
splci->li_bchannel_id = 3 - plci->li_bchannel_id;
li_config_table[a->li_base + (2 - plci->li_bchannel_id)].plci = splci;
dbug(1, dprintf("[%06lx] %s,%d: adv_voice_set_bchannel_id %d",
(dword)((splci->Id << 8) | UnMapController(splci->adapter->Id)),
(char *)(FILE_), __LINE__, splci->li_bchannel_id));
}
}
if (li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci == NULL)
li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci = plci;
}
}
}
if ((old_id == 0) && (plci->li_bchannel_id != 0)
&& (li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci == plci))
{
mixer_clear_config(plci);
}
dbug(1, dprintf("[%06lx] %s,%d: mixer_set_bchannel_id %02x %d",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__, ch, plci->li_bchannel_id));
}
#define MIXER_MAX_DUMP_CHANNELS 34
static void mixer_calculate_coefs(DIVA_CAPI_ADAPTER *a)
{
static char hex_digit_table[0x10] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'a', 'b', 'c', 'd', 'e', 'f'};
word n, i, j;
char *p;
char hex_line[2 * MIXER_MAX_DUMP_CHANNELS + MIXER_MAX_DUMP_CHANNELS / 8 + 4];
dbug(1, dprintf("[%06lx] %s,%d: mixer_calculate_coefs",
(dword)(UnMapController(a->Id)), (char *)(FILE_), __LINE__));
for (i = 0; i < li_total_channels; i++)
{
li_config_table[i].channel &= LI_CHANNEL_ADDRESSES_SET;
if (li_config_table[i].chflags != 0)
li_config_table[i].channel |= LI_CHANNEL_INVOLVED;
else
{
for (j = 0; j < li_total_channels; j++)
{
if (((li_config_table[i].flag_table[j]) != 0)
|| ((li_config_table[j].flag_table[i]) != 0))
{
li_config_table[i].channel |= LI_CHANNEL_INVOLVED;
}
if (((li_config_table[i].flag_table[j] & LI_FLAG_CONFERENCE) != 0)
|| ((li_config_table[j].flag_table[i] & LI_FLAG_CONFERENCE) != 0))
{
li_config_table[i].channel |= LI_CHANNEL_CONFERENCE;
}
}
}
}
for (i = 0; i < li_total_channels; i++)
{
for (j = 0; j < li_total_channels; j++)
{
li_config_table[i].coef_table[j] &= ~(LI_COEF_CH_CH | LI_COEF_CH_PC | LI_COEF_PC_CH | LI_COEF_PC_PC);
if (li_config_table[i].flag_table[j] & LI_FLAG_CONFERENCE)
li_config_table[i].coef_table[j] |= LI_COEF_CH_CH;
}
}
for (n = 0; n < li_total_channels; n++)
{
if (li_config_table[n].channel & LI_CHANNEL_CONFERENCE)
{
for (i = 0; i < li_total_channels; i++)
{
if (li_config_table[i].channel & LI_CHANNEL_CONFERENCE)
{
for (j = 0; j < li_total_channels; j++)
{
li_config_table[i].coef_table[j] |=
li_config_table[i].coef_table[n] & li_config_table[n].coef_table[j];
}
}
}
}
}
for (i = 0; i < li_total_channels; i++)
{
if (li_config_table[i].channel & LI_CHANNEL_INVOLVED)
{
li_config_table[i].coef_table[i] &= ~LI_COEF_CH_CH;
for (j = 0; j < li_total_channels; j++)
{
if (li_config_table[i].coef_table[j] & LI_COEF_CH_CH)
li_config_table[i].flag_table[j] |= LI_FLAG_CONFERENCE;
}
if (li_config_table[i].flag_table[i] & LI_FLAG_CONFERENCE)
li_config_table[i].coef_table[i] |= LI_COEF_CH_CH;
}
}
for (i = 0; i < li_total_channels; i++)
{
if (li_config_table[i].channel & LI_CHANNEL_INVOLVED)
{
for (j = 0; j < li_total_channels; j++)
{
if (li_config_table[i].flag_table[j] & LI_FLAG_INTERCONNECT)
li_config_table[i].coef_table[j] |= LI_COEF_CH_CH;
if (li_config_table[i].flag_table[j] & LI_FLAG_MONITOR)
li_config_table[i].coef_table[j] |= LI_COEF_CH_PC;
if (li_config_table[i].flag_table[j] & LI_FLAG_MIX)
li_config_table[i].coef_table[j] |= LI_COEF_PC_CH;
if (li_config_table[i].flag_table[j] & LI_FLAG_PCCONNECT)
li_config_table[i].coef_table[j] |= LI_COEF_PC_PC;
}
if (li_config_table[i].chflags & LI_CHFLAG_MONITOR)
{
for (j = 0; j < li_total_channels; j++)
{
if (li_config_table[i].flag_table[j] & LI_FLAG_INTERCONNECT)
{
li_config_table[i].coef_table[j] |= LI_COEF_CH_PC;
if (li_config_table[j].chflags & LI_CHFLAG_MIX)
li_config_table[i].coef_table[j] |= LI_COEF_PC_CH | LI_COEF_PC_PC;
}
}
}
if (li_config_table[i].chflags & LI_CHFLAG_MIX)
{
for (j = 0; j < li_total_channels; j++)
{
if (li_config_table[j].flag_table[i] & LI_FLAG_INTERCONNECT)
li_config_table[j].coef_table[i] |= LI_COEF_PC_CH;
}
}
if (li_config_table[i].chflags & LI_CHFLAG_LOOP)
{
for (j = 0; j < li_total_channels; j++)
{
if (li_config_table[i].flag_table[j] & LI_FLAG_INTERCONNECT)
{
for (n = 0; n < li_total_channels; n++)
{
if (li_config_table[n].flag_table[i] & LI_FLAG_INTERCONNECT)
{
li_config_table[n].coef_table[j] |= LI_COEF_CH_CH;
if (li_config_table[j].chflags & LI_CHFLAG_MIX)
{
li_config_table[n].coef_table[j] |= LI_COEF_PC_CH;
if (li_config_table[n].chflags & LI_CHFLAG_MONITOR)
li_config_table[n].coef_table[j] |= LI_COEF_CH_PC | LI_COEF_PC_PC;
}
else if (li_config_table[n].chflags & LI_CHFLAG_MONITOR)
li_config_table[n].coef_table[j] |= LI_COEF_CH_PC;
}
}
}
}
}
}
}
for (i = 0; i < li_total_channels; i++)
{
if (li_config_table[i].channel & LI_CHANNEL_INVOLVED)
{
if (li_config_table[i].chflags & (LI_CHFLAG_MONITOR | LI_CHFLAG_MIX | LI_CHFLAG_LOOP))
li_config_table[i].channel |= LI_CHANNEL_ACTIVE;
if (li_config_table[i].chflags & LI_CHFLAG_MONITOR)
li_config_table[i].channel |= LI_CHANNEL_RX_DATA;
if (li_config_table[i].chflags & LI_CHFLAG_MIX)
li_config_table[i].channel |= LI_CHANNEL_TX_DATA;
for (j = 0; j < li_total_channels; j++)
{
if ((li_config_table[i].flag_table[j] &
(LI_FLAG_INTERCONNECT | LI_FLAG_PCCONNECT | LI_FLAG_CONFERENCE | LI_FLAG_MONITOR))
|| (li_config_table[j].flag_table[i] &
(LI_FLAG_INTERCONNECT | LI_FLAG_PCCONNECT | LI_FLAG_CONFERENCE | LI_FLAG_ANNOUNCEMENT | LI_FLAG_MIX)))
{
li_config_table[i].channel |= LI_CHANNEL_ACTIVE;
}
if (li_config_table[i].flag_table[j] & (LI_FLAG_PCCONNECT | LI_FLAG_MONITOR))
li_config_table[i].channel |= LI_CHANNEL_RX_DATA;
if (li_config_table[j].flag_table[i] & (LI_FLAG_PCCONNECT | LI_FLAG_ANNOUNCEMENT | LI_FLAG_MIX))
li_config_table[i].channel |= LI_CHANNEL_TX_DATA;
}
if (!(li_config_table[i].channel & LI_CHANNEL_ACTIVE))
{
li_config_table[i].coef_table[i] |= LI_COEF_PC_CH | LI_COEF_CH_PC;
li_config_table[i].channel |= LI_CHANNEL_TX_DATA | LI_CHANNEL_RX_DATA;
}
}
}
for (i = 0; i < li_total_channels; i++)
{
if (li_config_table[i].channel & LI_CHANNEL_INVOLVED)
{
j = 0;
while ((j < li_total_channels) && !(li_config_table[i].flag_table[j] & LI_FLAG_ANNOUNCEMENT))
j++;
if (j < li_total_channels)
{
for (j = 0; j < li_total_channels; j++)
{
li_config_table[i].coef_table[j] &= ~(LI_COEF_CH_CH | LI_COEF_PC_CH);
if (li_config_table[i].flag_table[j] & LI_FLAG_ANNOUNCEMENT)
li_config_table[i].coef_table[j] |= LI_COEF_PC_CH;
}
}
}
}
n = li_total_channels;
if (n > MIXER_MAX_DUMP_CHANNELS)
n = MIXER_MAX_DUMP_CHANNELS;
p = hex_line;
for (j = 0; j < n; j++)
{
if ((j & 0x7) == 0)
*(p++) = ' ';
*(p++) = hex_digit_table[li_config_table[j].curchnl >> 4];
*(p++) = hex_digit_table[li_config_table[j].curchnl & 0xf];
}
*p = '\0';
dbug(1, dprintf("[%06lx] CURRENT %s",
(dword)(UnMapController(a->Id)), (char *)hex_line));
p = hex_line;
for (j = 0; j < n; j++)
{
if ((j & 0x7) == 0)
*(p++) = ' ';
*(p++) = hex_digit_table[li_config_table[j].channel >> 4];
*(p++) = hex_digit_table[li_config_table[j].channel & 0xf];
}
*p = '\0';
dbug(1, dprintf("[%06lx] CHANNEL %s",
(dword)(UnMapController(a->Id)), (char *)hex_line));
p = hex_line;
for (j = 0; j < n; j++)
{
if ((j & 0x7) == 0)
*(p++) = ' ';
*(p++) = hex_digit_table[li_config_table[j].chflags >> 4];
*(p++) = hex_digit_table[li_config_table[j].chflags & 0xf];
}
*p = '\0';
dbug(1, dprintf("[%06lx] CHFLAG %s",
(dword)(UnMapController(a->Id)), (char *)hex_line));
for (i = 0; i < n; i++)
{
p = hex_line;
for (j = 0; j < n; j++)
{
if ((j & 0x7) == 0)
*(p++) = ' ';
*(p++) = hex_digit_table[li_config_table[i].flag_table[j] >> 4];
*(p++) = hex_digit_table[li_config_table[i].flag_table[j] & 0xf];
}
*p = '\0';
dbug(1, dprintf("[%06lx] FLAG[%02x]%s",
(dword)(UnMapController(a->Id)), i, (char *)hex_line));
}
for (i = 0; i < n; i++)
{
p = hex_line;
for (j = 0; j < n; j++)
{
if ((j & 0x7) == 0)
*(p++) = ' ';
*(p++) = hex_digit_table[li_config_table[i].coef_table[j] >> 4];
*(p++) = hex_digit_table[li_config_table[i].coef_table[j] & 0xf];
}
*p = '\0';
dbug(1, dprintf("[%06lx] COEF[%02x]%s",
(dword)(UnMapController(a->Id)), i, (char *)hex_line));
}
}
static struct
{
byte mask;
byte line_flags;
} mixer_write_prog_pri[] =
{
{ LI_COEF_CH_CH, 0 },
{ LI_COEF_CH_PC, MIXER_COEF_LINE_TO_PC_FLAG },
{ LI_COEF_PC_CH, MIXER_COEF_LINE_FROM_PC_FLAG },
{ LI_COEF_PC_PC, MIXER_COEF_LINE_TO_PC_FLAG | MIXER_COEF_LINE_FROM_PC_FLAG }
};
static struct
{
byte from_ch;
byte to_ch;
byte mask;
byte xconnect_override;
} mixer_write_prog_bri[] =
{
{ 0, 0, LI_COEF_CH_CH, 0x01 }, /* B to B */
{ 1, 0, LI_COEF_CH_CH, 0x01 }, /* Alt B to B */
{ 0, 0, LI_COEF_PC_CH, 0x80 }, /* PC to B */
{ 1, 0, LI_COEF_PC_CH, 0x01 }, /* Alt PC to B */
{ 2, 0, LI_COEF_CH_CH, 0x00 }, /* IC to B */
{ 3, 0, LI_COEF_CH_CH, 0x00 }, /* Alt IC to B */
{ 0, 0, LI_COEF_CH_PC, 0x80 }, /* B to PC */
{ 1, 0, LI_COEF_CH_PC, 0x01 }, /* Alt B to PC */
{ 0, 0, LI_COEF_PC_PC, 0x01 }, /* PC to PC */
{ 1, 0, LI_COEF_PC_PC, 0x01 }, /* Alt PC to PC */
{ 2, 0, LI_COEF_CH_PC, 0x00 }, /* IC to PC */
{ 3, 0, LI_COEF_CH_PC, 0x00 }, /* Alt IC to PC */
{ 0, 2, LI_COEF_CH_CH, 0x00 }, /* B to IC */
{ 1, 2, LI_COEF_CH_CH, 0x00 }, /* Alt B to IC */
{ 0, 2, LI_COEF_PC_CH, 0x00 }, /* PC to IC */
{ 1, 2, LI_COEF_PC_CH, 0x00 }, /* Alt PC to IC */
{ 2, 2, LI_COEF_CH_CH, 0x00 }, /* IC to IC */
{ 3, 2, LI_COEF_CH_CH, 0x00 }, /* Alt IC to IC */
{ 1, 1, LI_COEF_CH_CH, 0x01 }, /* Alt B to Alt B */
{ 0, 1, LI_COEF_CH_CH, 0x01 }, /* B to Alt B */
{ 1, 1, LI_COEF_PC_CH, 0x80 }, /* Alt PC to Alt B */
{ 0, 1, LI_COEF_PC_CH, 0x01 }, /* PC to Alt B */
{ 3, 1, LI_COEF_CH_CH, 0x00 }, /* Alt IC to Alt B */
{ 2, 1, LI_COEF_CH_CH, 0x00 }, /* IC to Alt B */
{ 1, 1, LI_COEF_CH_PC, 0x80 }, /* Alt B to Alt PC */
{ 0, 1, LI_COEF_CH_PC, 0x01 }, /* B to Alt PC */
{ 1, 1, LI_COEF_PC_PC, 0x01 }, /* Alt PC to Alt PC */
{ 0, 1, LI_COEF_PC_PC, 0x01 }, /* PC to Alt PC */
{ 3, 1, LI_COEF_CH_PC, 0x00 }, /* Alt IC to Alt PC */
{ 2, 1, LI_COEF_CH_PC, 0x00 }, /* IC to Alt PC */
{ 1, 3, LI_COEF_CH_CH, 0x00 }, /* Alt B to Alt IC */
{ 0, 3, LI_COEF_CH_CH, 0x00 }, /* B to Alt IC */
{ 1, 3, LI_COEF_PC_CH, 0x00 }, /* Alt PC to Alt IC */
{ 0, 3, LI_COEF_PC_CH, 0x00 }, /* PC to Alt IC */
{ 3, 3, LI_COEF_CH_CH, 0x00 }, /* Alt IC to Alt IC */
{ 2, 3, LI_COEF_CH_CH, 0x00 } /* IC to Alt IC */
};
static byte mixer_swapped_index_bri[] =
{
18, /* B to B */
19, /* Alt B to B */
20, /* PC to B */
21, /* Alt PC to B */
22, /* IC to B */
23, /* Alt IC to B */
24, /* B to PC */
25, /* Alt B to PC */
26, /* PC to PC */
27, /* Alt PC to PC */
28, /* IC to PC */
29, /* Alt IC to PC */
30, /* B to IC */
31, /* Alt B to IC */
32, /* PC to IC */
33, /* Alt PC to IC */
34, /* IC to IC */
35, /* Alt IC to IC */
0, /* Alt B to Alt B */
1, /* B to Alt B */
2, /* Alt PC to Alt B */
3, /* PC to Alt B */
4, /* Alt IC to Alt B */
5, /* IC to Alt B */
6, /* Alt B to Alt PC */
7, /* B to Alt PC */
8, /* Alt PC to Alt PC */
9, /* PC to Alt PC */
10, /* Alt IC to Alt PC */
11, /* IC to Alt PC */
12, /* Alt B to Alt IC */
13, /* B to Alt IC */
14, /* Alt PC to Alt IC */
15, /* PC to Alt IC */
16, /* Alt IC to Alt IC */
17 /* IC to Alt IC */
};
static struct
{
byte mask;
byte from_pc;
byte to_pc;
} xconnect_write_prog[] =
{
{ LI_COEF_CH_CH, false, false },
{ LI_COEF_CH_PC, false, true },
{ LI_COEF_PC_CH, true, false },
{ LI_COEF_PC_PC, true, true }
};
static void xconnect_query_addresses(PLCI *plci)
{
DIVA_CAPI_ADAPTER *a;
word w, ch;
byte *p;
dbug(1, dprintf("[%06lx] %s,%d: xconnect_query_addresses",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__));
a = plci->adapter;
if (a->li_pri && ((plci->li_bchannel_id == 0)
|| (li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci != plci)))
{
dbug(1, dprintf("[%06x] %s,%d: Channel id wiped out",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__));
return;
}
p = plci->internal_req_buffer;
ch = (a->li_pri) ? plci->li_bchannel_id - 1 : 0;
*(p++) = UDATA_REQUEST_XCONNECT_FROM;
w = ch;
*(p++) = (byte) w;
*(p++) = (byte)(w >> 8);
w = ch | XCONNECT_CHANNEL_PORT_PC;
*(p++) = (byte) w;
*(p++) = (byte)(w >> 8);
plci->NData[0].P = plci->internal_req_buffer;
plci->NData[0].PLength = p - plci->internal_req_buffer;
plci->NL.X = plci->NData;
plci->NL.ReqCh = 0;
plci->NL.Req = plci->nl_req = (byte) N_UDATA;
plci->adapter->request(&plci->NL);
}
static void xconnect_write_coefs(PLCI *plci, word internal_command)
{
dbug(1, dprintf("[%06lx] %s,%d: xconnect_write_coefs %04x",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__, internal_command));
plci->li_write_command = internal_command;
plci->li_write_channel = 0;
}
static byte xconnect_write_coefs_process(dword Id, PLCI *plci, byte Rc)
{
DIVA_CAPI_ADAPTER *a;
word w, n, i, j, r, s, to_ch;
dword d;
byte *p;
struct xconnect_transfer_address_s *transfer_address;
byte ch_map[MIXER_CHANNELS_BRI];
dbug(1, dprintf("[%06x] %s,%d: xconnect_write_coefs_process %02x %d",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->li_write_channel));
a = plci->adapter;
if ((plci->li_bchannel_id == 0)
|| (li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci != plci))
{
dbug(1, dprintf("[%06x] %s,%d: Channel id wiped out",
UnMapId(Id), (char *)(FILE_), __LINE__));
return (true);
}
i = a->li_base + (plci->li_bchannel_id - 1);
j = plci->li_write_channel;
p = plci->internal_req_buffer;
if (j != 0)
{
if ((Rc != OK) && (Rc != OK_FC))
{
dbug(1, dprintf("[%06lx] %s,%d: LI write coefs failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
return (false);
}
}
if (li_config_table[i].adapter->manufacturer_features & MANUFACTURER_FEATURE_XCONNECT)
{
r = 0;
s = 0;
if (j < li_total_channels)
{
if (li_config_table[i].channel & LI_CHANNEL_ADDRESSES_SET)
{
s = ((li_config_table[i].send_b.card_address.low | li_config_table[i].send_b.card_address.high) ?
(LI_COEF_CH_CH | LI_COEF_CH_PC | LI_COEF_PC_CH | LI_COEF_PC_PC) : (LI_COEF_CH_PC | LI_COEF_PC_PC)) &
((li_config_table[i].send_pc.card_address.low | li_config_table[i].send_pc.card_address.high) ?
(LI_COEF_CH_CH | LI_COEF_CH_PC | LI_COEF_PC_CH | LI_COEF_PC_PC) : (LI_COEF_CH_CH | LI_COEF_PC_CH));
}
r = ((li_config_table[i].coef_table[j] & 0xf) ^ (li_config_table[i].coef_table[j] >> 4));
while ((j < li_total_channels)
&& ((r == 0)
|| (!(li_config_table[j].channel & LI_CHANNEL_ADDRESSES_SET))
|| (!li_config_table[j].adapter->li_pri
&& (j >= li_config_table[j].adapter->li_base + MIXER_BCHANNELS_BRI))
|| (((li_config_table[j].send_b.card_address.low != li_config_table[i].send_b.card_address.low)
|| (li_config_table[j].send_b.card_address.high != li_config_table[i].send_b.card_address.high))
&& (!(a->manufacturer_features & MANUFACTURER_FEATURE_DMACONNECT)
|| !(li_config_table[j].adapter->manufacturer_features & MANUFACTURER_FEATURE_DMACONNECT)))
|| ((li_config_table[j].adapter->li_base != a->li_base)
&& !(r & s &
((li_config_table[j].send_b.card_address.low | li_config_table[j].send_b.card_address.high) ?
(LI_COEF_CH_CH | LI_COEF_CH_PC | LI_COEF_PC_CH | LI_COEF_PC_PC) : (LI_COEF_PC_CH | LI_COEF_PC_PC)) &
((li_config_table[j].send_pc.card_address.low | li_config_table[j].send_pc.card_address.high) ?
(LI_COEF_CH_CH | LI_COEF_CH_PC | LI_COEF_PC_CH | LI_COEF_PC_PC) : (LI_COEF_CH_CH | LI_COEF_CH_PC))))))
{
j++;
if (j < li_total_channels)
r = ((li_config_table[i].coef_table[j] & 0xf) ^ (li_config_table[i].coef_table[j] >> 4));
}
}
if (j < li_total_channels)
{
plci->internal_command = plci->li_write_command;
if (plci_nl_busy(plci))
return (true);
to_ch = (a->li_pri) ? plci->li_bchannel_id - 1 : 0;
*(p++) = UDATA_REQUEST_XCONNECT_TO;
do
{
if (li_config_table[j].adapter->li_base != a->li_base)
{
r &= s &
((li_config_table[j].send_b.card_address.low | li_config_table[j].send_b.card_address.high) ?
(LI_COEF_CH_CH | LI_COEF_CH_PC | LI_COEF_PC_CH | LI_COEF_PC_PC) : (LI_COEF_PC_CH | LI_COEF_PC_PC)) &
((li_config_table[j].send_pc.card_address.low | li_config_table[j].send_pc.card_address.high) ?
(LI_COEF_CH_CH | LI_COEF_CH_PC | LI_COEF_PC_CH | LI_COEF_PC_PC) : (LI_COEF_CH_CH | LI_COEF_CH_PC));
}
n = 0;
do
{
if (r & xconnect_write_prog[n].mask)
{
if (xconnect_write_prog[n].from_pc)
transfer_address = &(li_config_table[j].send_pc);
else
transfer_address = &(li_config_table[j].send_b);
d = transfer_address->card_address.low;
*(p++) = (byte) d;
*(p++) = (byte)(d >> 8);
*(p++) = (byte)(d >> 16);
*(p++) = (byte)(d >> 24);
d = transfer_address->card_address.high;
*(p++) = (byte) d;
*(p++) = (byte)(d >> 8);
*(p++) = (byte)(d >> 16);
*(p++) = (byte)(d >> 24);
d = transfer_address->offset;
*(p++) = (byte) d;
*(p++) = (byte)(d >> 8);
*(p++) = (byte)(d >> 16);
*(p++) = (byte)(d >> 24);
w = xconnect_write_prog[n].to_pc ? to_ch | XCONNECT_CHANNEL_PORT_PC : to_ch;
*(p++) = (byte) w;
*(p++) = (byte)(w >> 8);
w = ((li_config_table[i].coef_table[j] & xconnect_write_prog[n].mask) == 0) ? 0x01 :
(li_config_table[i].adapter->u_law ?
(li_config_table[j].adapter->u_law ? 0x80 : 0x86) :
(li_config_table[j].adapter->u_law ? 0x7a : 0x80));
*(p++) = (byte) w;
*(p++) = (byte) 0;
li_config_table[i].coef_table[j] ^= xconnect_write_prog[n].mask << 4;
}
n++;
} while ((n < ARRAY_SIZE(xconnect_write_prog))
&& ((p - plci->internal_req_buffer) + 16 < INTERNAL_REQ_BUFFER_SIZE));
if (n == ARRAY_SIZE(xconnect_write_prog))
{
do
{
j++;
if (j < li_total_channels)
r = ((li_config_table[i].coef_table[j] & 0xf) ^ (li_config_table[i].coef_table[j] >> 4));
} while ((j < li_total_channels)
&& ((r == 0)
|| (!(li_config_table[j].channel & LI_CHANNEL_ADDRESSES_SET))
|| (!li_config_table[j].adapter->li_pri
&& (j >= li_config_table[j].adapter->li_base + MIXER_BCHANNELS_BRI))
|| (((li_config_table[j].send_b.card_address.low != li_config_table[i].send_b.card_address.low)
|| (li_config_table[j].send_b.card_address.high != li_config_table[i].send_b.card_address.high))
&& (!(a->manufacturer_features & MANUFACTURER_FEATURE_DMACONNECT)
|| !(li_config_table[j].adapter->manufacturer_features & MANUFACTURER_FEATURE_DMACONNECT)))
|| ((li_config_table[j].adapter->li_base != a->li_base)
&& !(r & s &
((li_config_table[j].send_b.card_address.low | li_config_table[j].send_b.card_address.high) ?
(LI_COEF_CH_CH | LI_COEF_CH_PC | LI_COEF_PC_CH | LI_COEF_PC_PC) : (LI_COEF_PC_CH | LI_COEF_PC_PC)) &
((li_config_table[j].send_pc.card_address.low | li_config_table[j].send_pc.card_address.high) ?
(LI_COEF_CH_CH | LI_COEF_CH_PC | LI_COEF_PC_CH | LI_COEF_PC_PC) : (LI_COEF_CH_CH | LI_COEF_CH_PC))))));
}
} while ((j < li_total_channels)
&& ((p - plci->internal_req_buffer) + 16 < INTERNAL_REQ_BUFFER_SIZE));
}
else if (j == li_total_channels)
{
plci->internal_command = plci->li_write_command;
if (plci_nl_busy(plci))
return (true);
if (a->li_pri)
{
*(p++) = UDATA_REQUEST_SET_MIXER_COEFS_PRI_SYNC;
w = 0;
if (li_config_table[i].channel & LI_CHANNEL_TX_DATA)
w |= MIXER_FEATURE_ENABLE_TX_DATA;
if (li_config_table[i].channel & LI_CHANNEL_RX_DATA)
w |= MIXER_FEATURE_ENABLE_RX_DATA;
*(p++) = (byte) w;
*(p++) = (byte)(w >> 8);
}
else
{
*(p++) = UDATA_REQUEST_SET_MIXER_COEFS_BRI;
w = 0;
if ((plci->tel == ADV_VOICE) && (plci == a->AdvSignalPLCI)
&& (ADV_VOICE_NEW_COEF_BASE + sizeof(word) <= a->adv_voice_coef_length))
{
w = GET_WORD(a->adv_voice_coef_buffer + ADV_VOICE_NEW_COEF_BASE);
}
if (li_config_table[i].channel & LI_CHANNEL_TX_DATA)
w |= MIXER_FEATURE_ENABLE_TX_DATA;
if (li_config_table[i].channel & LI_CHANNEL_RX_DATA)
w |= MIXER_FEATURE_ENABLE_RX_DATA;
*(p++) = (byte) w;
*(p++) = (byte)(w >> 8);
for (j = 0; j < sizeof(ch_map); j += 2)
{
if (plci->li_bchannel_id == 2)
{
ch_map[j] = (byte)(j + 1);
ch_map[j + 1] = (byte) j;
}
else
{
ch_map[j] = (byte) j;
ch_map[j + 1] = (byte)(j + 1);
}
}
for (n = 0; n < ARRAY_SIZE(mixer_write_prog_bri); n++)
{
i = a->li_base + ch_map[mixer_write_prog_bri[n].to_ch];
j = a->li_base + ch_map[mixer_write_prog_bri[n].from_ch];
if (li_config_table[i].channel & li_config_table[j].channel & LI_CHANNEL_INVOLVED)
{
*p = (mixer_write_prog_bri[n].xconnect_override != 0) ?
mixer_write_prog_bri[n].xconnect_override :
((li_config_table[i].coef_table[j] & mixer_write_prog_bri[n].mask) ? 0x80 : 0x01);
if ((i >= a->li_base + MIXER_BCHANNELS_BRI) || (j >= a->li_base + MIXER_BCHANNELS_BRI))
{
w = ((li_config_table[i].coef_table[j] & 0xf) ^ (li_config_table[i].coef_table[j] >> 4));
li_config_table[i].coef_table[j] ^= (w & mixer_write_prog_bri[n].mask) << 4;
}
}
else
{
*p = 0x00;
if ((a->AdvSignalPLCI != NULL) && (a->AdvSignalPLCI->tel == ADV_VOICE))
{
w = (plci == a->AdvSignalPLCI) ? n : mixer_swapped_index_bri[n];
if (ADV_VOICE_NEW_COEF_BASE + sizeof(word) + w < a->adv_voice_coef_length)
*p = a->adv_voice_coef_buffer[ADV_VOICE_NEW_COEF_BASE + sizeof(word) + w];
}
}
p++;
}
}
j = li_total_channels + 1;
}
}
else
{
if (j <= li_total_channels)
{
plci->internal_command = plci->li_write_command;
if (plci_nl_busy(plci))
return (true);
if (j < a->li_base)
j = a->li_base;
if (a->li_pri)
{
*(p++) = UDATA_REQUEST_SET_MIXER_COEFS_PRI_SYNC;
w = 0;
if (li_config_table[i].channel & LI_CHANNEL_TX_DATA)
w |= MIXER_FEATURE_ENABLE_TX_DATA;
if (li_config_table[i].channel & LI_CHANNEL_RX_DATA)
w |= MIXER_FEATURE_ENABLE_RX_DATA;
*(p++) = (byte) w;
*(p++) = (byte)(w >> 8);
for (n = 0; n < ARRAY_SIZE(mixer_write_prog_pri); n++)
{
*(p++) = (byte)((plci->li_bchannel_id - 1) | mixer_write_prog_pri[n].line_flags);
for (j = a->li_base; j < a->li_base + MIXER_CHANNELS_PRI; j++)
{
w = ((li_config_table[i].coef_table[j] & 0xf) ^ (li_config_table[i].coef_table[j] >> 4));
if (w & mixer_write_prog_pri[n].mask)
{
*(p++) = (li_config_table[i].coef_table[j] & mixer_write_prog_pri[n].mask) ? 0x80 : 0x01;
li_config_table[i].coef_table[j] ^= mixer_write_prog_pri[n].mask << 4;
}
else
*(p++) = 0x00;
}
*(p++) = (byte)((plci->li_bchannel_id - 1) | MIXER_COEF_LINE_ROW_FLAG | mixer_write_prog_pri[n].line_flags);
for (j = a->li_base; j < a->li_base + MIXER_CHANNELS_PRI; j++)
{
w = ((li_config_table[j].coef_table[i] & 0xf) ^ (li_config_table[j].coef_table[i] >> 4));
if (w & mixer_write_prog_pri[n].mask)
{
*(p++) = (li_config_table[j].coef_table[i] & mixer_write_prog_pri[n].mask) ? 0x80 : 0x01;
li_config_table[j].coef_table[i] ^= mixer_write_prog_pri[n].mask << 4;
}
else
*(p++) = 0x00;
}
}
}
else
{
*(p++) = UDATA_REQUEST_SET_MIXER_COEFS_BRI;
w = 0;
if ((plci->tel == ADV_VOICE) && (plci == a->AdvSignalPLCI)
&& (ADV_VOICE_NEW_COEF_BASE + sizeof(word) <= a->adv_voice_coef_length))
{
w = GET_WORD(a->adv_voice_coef_buffer + ADV_VOICE_NEW_COEF_BASE);
}
if (li_config_table[i].channel & LI_CHANNEL_TX_DATA)
w |= MIXER_FEATURE_ENABLE_TX_DATA;
if (li_config_table[i].channel & LI_CHANNEL_RX_DATA)
w |= MIXER_FEATURE_ENABLE_RX_DATA;
*(p++) = (byte) w;
*(p++) = (byte)(w >> 8);
for (j = 0; j < sizeof(ch_map); j += 2)
{
if (plci->li_bchannel_id == 2)
{
ch_map[j] = (byte)(j + 1);
ch_map[j + 1] = (byte) j;
}
else
{
ch_map[j] = (byte) j;
ch_map[j + 1] = (byte)(j + 1);
}
}
for (n = 0; n < ARRAY_SIZE(mixer_write_prog_bri); n++)
{
i = a->li_base + ch_map[mixer_write_prog_bri[n].to_ch];
j = a->li_base + ch_map[mixer_write_prog_bri[n].from_ch];
if (li_config_table[i].channel & li_config_table[j].channel & LI_CHANNEL_INVOLVED)
{
*p = ((li_config_table[i].coef_table[j] & mixer_write_prog_bri[n].mask) ? 0x80 : 0x01);
w = ((li_config_table[i].coef_table[j] & 0xf) ^ (li_config_table[i].coef_table[j] >> 4));
li_config_table[i].coef_table[j] ^= (w & mixer_write_prog_bri[n].mask) << 4;
}
else
{
*p = 0x00;
if ((a->AdvSignalPLCI != NULL) && (a->AdvSignalPLCI->tel == ADV_VOICE))
{
w = (plci == a->AdvSignalPLCI) ? n : mixer_swapped_index_bri[n];
if (ADV_VOICE_NEW_COEF_BASE + sizeof(word) + w < a->adv_voice_coef_length)
*p = a->adv_voice_coef_buffer[ADV_VOICE_NEW_COEF_BASE + sizeof(word) + w];
}
}
p++;
}
}
j = li_total_channels + 1;
}
}
plci->li_write_channel = j;
if (p != plci->internal_req_buffer)
{
plci->NData[0].P = plci->internal_req_buffer;
plci->NData[0].PLength = p - plci->internal_req_buffer;
plci->NL.X = plci->NData;
plci->NL.ReqCh = 0;
plci->NL.Req = plci->nl_req = (byte) N_UDATA;
plci->adapter->request(&plci->NL);
}
return (true);
}
static void mixer_notify_update(PLCI *plci, byte others)
{
DIVA_CAPI_ADAPTER *a;
word i, w;
PLCI *notify_plci;
byte msg[sizeof(CAPI_MSG_HEADER) + 6];
dbug(1, dprintf("[%06lx] %s,%d: mixer_notify_update %d",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__, others));
a = plci->adapter;
if (a->profile.Global_Options & GL_LINE_INTERCONNECT_SUPPORTED)
{
if (others)
plci->li_notify_update = true;
i = 0;
do
{
notify_plci = NULL;
if (others)
{
while ((i < li_total_channels) && (li_config_table[i].plci == NULL))
i++;
if (i < li_total_channels)
notify_plci = li_config_table[i++].plci;
}
else
{
if ((plci->li_bchannel_id != 0)
&& (li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci == plci))
{
notify_plci = plci;
}
}
if ((notify_plci != NULL)
&& !notify_plci->li_notify_update
&& (notify_plci->appl != NULL)
&& (notify_plci->State)
&& notify_plci->NL.Id && !notify_plci->nl_remove_id)
{
notify_plci->li_notify_update = true;
((CAPI_MSG *) msg)->header.length = 18;
((CAPI_MSG *) msg)->header.appl_id = notify_plci->appl->Id;
((CAPI_MSG *) msg)->header.command = _FACILITY_R;
((CAPI_MSG *) msg)->header.number = 0;
((CAPI_MSG *) msg)->header.controller = notify_plci->adapter->Id;
((CAPI_MSG *) msg)->header.plci = notify_plci->Id;
((CAPI_MSG *) msg)->header.ncci = 0;
((CAPI_MSG *) msg)->info.facility_req.Selector = SELECTOR_LINE_INTERCONNECT;
((CAPI_MSG *) msg)->info.facility_req.structs[0] = 3;
PUT_WORD(&(((CAPI_MSG *) msg)->info.facility_req.structs[1]), LI_REQ_SILENT_UPDATE);
((CAPI_MSG *) msg)->info.facility_req.structs[3] = 0;
w = api_put(notify_plci->appl, (CAPI_MSG *) msg);
if (w != _QUEUE_FULL)
{
if (w != 0)
{
dbug(1, dprintf("[%06lx] %s,%d: Interconnect notify failed %06x %d",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__,
(dword)((notify_plci->Id << 8) | UnMapController(notify_plci->adapter->Id)), w));
}
notify_plci->li_notify_update = false;
}
}
} while (others && (notify_plci != NULL));
if (others)
plci->li_notify_update = false;
}
}
static void mixer_clear_config(PLCI *plci)
{
DIVA_CAPI_ADAPTER *a;
word i, j;
dbug(1, dprintf("[%06lx] %s,%d: mixer_clear_config",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__));
plci->li_notify_update = false;
plci->li_plci_b_write_pos = 0;
plci->li_plci_b_read_pos = 0;
plci->li_plci_b_req_pos = 0;
a = plci->adapter;
if ((plci->li_bchannel_id != 0)
&& (li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci == plci))
{
i = a->li_base + (plci->li_bchannel_id - 1);
li_config_table[i].curchnl = 0;
li_config_table[i].channel = 0;
li_config_table[i].chflags = 0;
for (j = 0; j < li_total_channels; j++)
{
li_config_table[j].flag_table[i] = 0;
li_config_table[i].flag_table[j] = 0;
li_config_table[i].coef_table[j] = 0;
li_config_table[j].coef_table[i] = 0;
}
if (!a->li_pri)
{
li_config_table[i].coef_table[i] |= LI_COEF_CH_PC_SET | LI_COEF_PC_CH_SET;
if ((plci->tel == ADV_VOICE) && (plci == a->AdvSignalPLCI))
{
i = a->li_base + MIXER_IC_CHANNEL_BASE + (plci->li_bchannel_id - 1);
li_config_table[i].curchnl = 0;
li_config_table[i].channel = 0;
li_config_table[i].chflags = 0;
for (j = 0; j < li_total_channels; j++)
{
li_config_table[i].flag_table[j] = 0;
li_config_table[j].flag_table[i] = 0;
li_config_table[i].coef_table[j] = 0;
li_config_table[j].coef_table[i] = 0;
}
if (a->manufacturer_features & MANUFACTURER_FEATURE_SLAVE_CODEC)
{
i = a->li_base + MIXER_IC_CHANNEL_BASE + (2 - plci->li_bchannel_id);
li_config_table[i].curchnl = 0;
li_config_table[i].channel = 0;
li_config_table[i].chflags = 0;
for (j = 0; j < li_total_channels; j++)
{
li_config_table[i].flag_table[j] = 0;
li_config_table[j].flag_table[i] = 0;
li_config_table[i].coef_table[j] = 0;
li_config_table[j].coef_table[i] = 0;
}
}
}
}
}
}
static void mixer_prepare_switch(dword Id, PLCI *plci)
{
dbug(1, dprintf("[%06lx] %s,%d: mixer_prepare_switch",
UnMapId(Id), (char *)(FILE_), __LINE__));
do
{
mixer_indication_coefs_set(Id, plci);
} while (plci->li_plci_b_read_pos != plci->li_plci_b_req_pos);
}
static word mixer_save_config(dword Id, PLCI *plci, byte Rc)
{
DIVA_CAPI_ADAPTER *a;
word i, j;
dbug(1, dprintf("[%06lx] %s,%d: mixer_save_config %02x %d",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->adjust_b_state));
a = plci->adapter;
if ((plci->li_bchannel_id != 0)
&& (li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci == plci))
{
i = a->li_base + (plci->li_bchannel_id - 1);
for (j = 0; j < li_total_channels; j++)
{
li_config_table[i].coef_table[j] &= 0xf;
li_config_table[j].coef_table[i] &= 0xf;
}
if (!a->li_pri)
li_config_table[i].coef_table[i] |= LI_COEF_CH_PC_SET | LI_COEF_PC_CH_SET;
}
return (GOOD);
}
static word mixer_restore_config(dword Id, PLCI *plci, byte Rc)
{
DIVA_CAPI_ADAPTER *a;
word Info;
dbug(1, dprintf("[%06lx] %s,%d: mixer_restore_config %02x %d",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->adjust_b_state));
Info = GOOD;
a = plci->adapter;
if ((plci->B1_facilities & B1_FACILITY_MIXER)
&& (plci->li_bchannel_id != 0)
&& (li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci == plci))
{
switch (plci->adjust_b_state)
{
case ADJUST_B_RESTORE_MIXER_1:
if (a->manufacturer_features & MANUFACTURER_FEATURE_XCONNECT)
{
plci->internal_command = plci->adjust_b_command;
if (plci_nl_busy(plci))
{
plci->adjust_b_state = ADJUST_B_RESTORE_MIXER_1;
break;
}
xconnect_query_addresses(plci);
plci->adjust_b_state = ADJUST_B_RESTORE_MIXER_2;
break;
}
plci->adjust_b_state = ADJUST_B_RESTORE_MIXER_5;
Rc = OK;
case ADJUST_B_RESTORE_MIXER_2:
case ADJUST_B_RESTORE_MIXER_3:
case ADJUST_B_RESTORE_MIXER_4:
if ((Rc != OK) && (Rc != OK_FC) && (Rc != 0))
{
dbug(1, dprintf("[%06lx] %s,%d: Adjust B query addresses failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
Info = _WRONG_STATE;
break;
}
if (Rc == OK)
{
if (plci->adjust_b_state == ADJUST_B_RESTORE_MIXER_2)
plci->adjust_b_state = ADJUST_B_RESTORE_MIXER_3;
else if (plci->adjust_b_state == ADJUST_B_RESTORE_MIXER_4)
plci->adjust_b_state = ADJUST_B_RESTORE_MIXER_5;
}
else if (Rc == 0)
{
if (plci->adjust_b_state == ADJUST_B_RESTORE_MIXER_2)
plci->adjust_b_state = ADJUST_B_RESTORE_MIXER_4;
else if (plci->adjust_b_state == ADJUST_B_RESTORE_MIXER_3)
plci->adjust_b_state = ADJUST_B_RESTORE_MIXER_5;
}
if (plci->adjust_b_state != ADJUST_B_RESTORE_MIXER_5)
{
plci->internal_command = plci->adjust_b_command;
break;
}
case ADJUST_B_RESTORE_MIXER_5:
xconnect_write_coefs(plci, plci->adjust_b_command);
plci->adjust_b_state = ADJUST_B_RESTORE_MIXER_6;
Rc = OK;
case ADJUST_B_RESTORE_MIXER_6:
if (!xconnect_write_coefs_process(Id, plci, Rc))
{
dbug(1, dprintf("[%06lx] %s,%d: Write mixer coefs failed",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _FACILITY_NOT_SUPPORTED;
break;
}
if (plci->internal_command)
break;
plci->adjust_b_state = ADJUST_B_RESTORE_MIXER_7;
case ADJUST_B_RESTORE_MIXER_7:
break;
}
}
return (Info);
}
static void mixer_command(dword Id, PLCI *plci, byte Rc)
{
DIVA_CAPI_ADAPTER *a;
word i, internal_command;
dbug(1, dprintf("[%06lx] %s,%d: mixer_command %02x %04x %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->internal_command,
plci->li_cmd));
a = plci->adapter;
internal_command = plci->internal_command;
plci->internal_command = 0;
switch (plci->li_cmd)
{
case LI_REQ_CONNECT:
case LI_REQ_DISCONNECT:
case LI_REQ_SILENT_UPDATE:
switch (internal_command)
{
default:
if (plci->li_channel_bits & LI_CHANNEL_INVOLVED)
{
adjust_b1_resource(Id, plci, NULL, (word)(plci->B1_facilities |
B1_FACILITY_MIXER), MIXER_COMMAND_1);
}
case MIXER_COMMAND_1:
if (plci->li_channel_bits & LI_CHANNEL_INVOLVED)
{
if (adjust_b_process(Id, plci, Rc) != GOOD)
{
dbug(1, dprintf("[%06lx] %s,%d: Load mixer failed",
UnMapId(Id), (char *)(FILE_), __LINE__));
break;
}
if (plci->internal_command)
return;
}
plci->li_plci_b_req_pos = plci->li_plci_b_write_pos;
if ((plci->li_channel_bits & LI_CHANNEL_INVOLVED)
|| ((get_b1_facilities(plci, plci->B1_resource) & B1_FACILITY_MIXER)
&& (add_b1_facilities(plci, plci->B1_resource, (word)(plci->B1_facilities &
~B1_FACILITY_MIXER)) == plci->B1_resource)))
{
xconnect_write_coefs(plci, MIXER_COMMAND_2);
}
else
{
do
{
mixer_indication_coefs_set(Id, plci);
} while (plci->li_plci_b_read_pos != plci->li_plci_b_req_pos);
}
case MIXER_COMMAND_2:
if ((plci->li_channel_bits & LI_CHANNEL_INVOLVED)
|| ((get_b1_facilities(plci, plci->B1_resource) & B1_FACILITY_MIXER)
&& (add_b1_facilities(plci, plci->B1_resource, (word)(plci->B1_facilities &
~B1_FACILITY_MIXER)) == plci->B1_resource)))
{
if (!xconnect_write_coefs_process(Id, plci, Rc))
{
dbug(1, dprintf("[%06lx] %s,%d: Write mixer coefs failed",
UnMapId(Id), (char *)(FILE_), __LINE__));
if (plci->li_plci_b_write_pos != plci->li_plci_b_req_pos)
{
do
{
plci->li_plci_b_write_pos = (plci->li_plci_b_write_pos == 0) ?
LI_PLCI_B_QUEUE_ENTRIES - 1 : plci->li_plci_b_write_pos - 1;
i = (plci->li_plci_b_write_pos == 0) ?
LI_PLCI_B_QUEUE_ENTRIES - 1 : plci->li_plci_b_write_pos - 1;
} while ((plci->li_plci_b_write_pos != plci->li_plci_b_req_pos)
&& !(plci->li_plci_b_queue[i] & LI_PLCI_B_LAST_FLAG));
}
break;
}
if (plci->internal_command)
return;
}
if (!(plci->li_channel_bits & LI_CHANNEL_INVOLVED))
{
adjust_b1_resource(Id, plci, NULL, (word)(plci->B1_facilities &
~B1_FACILITY_MIXER), MIXER_COMMAND_3);
}
case MIXER_COMMAND_3:
if (!(plci->li_channel_bits & LI_CHANNEL_INVOLVED))
{
if (adjust_b_process(Id, plci, Rc) != GOOD)
{
dbug(1, dprintf("[%06lx] %s,%d: Unload mixer failed",
UnMapId(Id), (char *)(FILE_), __LINE__));
break;
}
if (plci->internal_command)
return;
}
break;
}
break;
}
if ((plci->li_bchannel_id == 0)
|| (li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci != plci))
{
dbug(1, dprintf("[%06x] %s,%d: Channel id wiped out %d",
UnMapId(Id), (char *)(FILE_), __LINE__, (int)(plci->li_bchannel_id)));
}
else
{
i = a->li_base + (plci->li_bchannel_id - 1);
li_config_table[i].curchnl = plci->li_channel_bits;
if (!a->li_pri && (plci->tel == ADV_VOICE) && (plci == a->AdvSignalPLCI))
{
i = a->li_base + MIXER_IC_CHANNEL_BASE + (plci->li_bchannel_id - 1);
li_config_table[i].curchnl = plci->li_channel_bits;
if (a->manufacturer_features & MANUFACTURER_FEATURE_SLAVE_CODEC)
{
i = a->li_base + MIXER_IC_CHANNEL_BASE + (2 - plci->li_bchannel_id);
li_config_table[i].curchnl = plci->li_channel_bits;
}
}
}
}
static void li_update_connect(dword Id, DIVA_CAPI_ADAPTER *a, PLCI *plci,
dword plci_b_id, byte connect, dword li_flags)
{
word i, ch_a, ch_a_v, ch_a_s, ch_b, ch_b_v, ch_b_s;
PLCI *plci_b;
DIVA_CAPI_ADAPTER *a_b;
a_b = &(adapter[MapController((byte)(plci_b_id & 0x7f)) - 1]);
plci_b = &(a_b->plci[((plci_b_id >> 8) & 0xff) - 1]);
ch_a = a->li_base + (plci->li_bchannel_id - 1);
if (!a->li_pri && (plci->tel == ADV_VOICE)
&& (plci == a->AdvSignalPLCI) && (Id & EXT_CONTROLLER))
{
ch_a_v = ch_a + MIXER_IC_CHANNEL_BASE;
ch_a_s = (a->manufacturer_features & MANUFACTURER_FEATURE_SLAVE_CODEC) ?
a->li_base + MIXER_IC_CHANNEL_BASE + (2 - plci->li_bchannel_id) : ch_a_v;
}
else
{
ch_a_v = ch_a;
ch_a_s = ch_a;
}
ch_b = a_b->li_base + (plci_b->li_bchannel_id - 1);
if (!a_b->li_pri && (plci_b->tel == ADV_VOICE)
&& (plci_b == a_b->AdvSignalPLCI) && (plci_b_id & EXT_CONTROLLER))
{
ch_b_v = ch_b + MIXER_IC_CHANNEL_BASE;
ch_b_s = (a_b->manufacturer_features & MANUFACTURER_FEATURE_SLAVE_CODEC) ?
a_b->li_base + MIXER_IC_CHANNEL_BASE + (2 - plci_b->li_bchannel_id) : ch_b_v;
}
else
{
ch_b_v = ch_b;
ch_b_s = ch_b;
}
if (connect)
{
li_config_table[ch_a].flag_table[ch_a_v] &= ~LI_FLAG_MONITOR;
li_config_table[ch_a].flag_table[ch_a_s] &= ~LI_FLAG_MONITOR;
li_config_table[ch_a_v].flag_table[ch_a] &= ~(LI_FLAG_ANNOUNCEMENT | LI_FLAG_MIX);
li_config_table[ch_a_s].flag_table[ch_a] &= ~(LI_FLAG_ANNOUNCEMENT | LI_FLAG_MIX);
}
li_config_table[ch_a].flag_table[ch_b_v] &= ~LI_FLAG_MONITOR;
li_config_table[ch_a].flag_table[ch_b_s] &= ~LI_FLAG_MONITOR;
li_config_table[ch_b_v].flag_table[ch_a] &= ~(LI_FLAG_ANNOUNCEMENT | LI_FLAG_MIX);
li_config_table[ch_b_s].flag_table[ch_a] &= ~(LI_FLAG_ANNOUNCEMENT | LI_FLAG_MIX);
if (ch_a_v == ch_b_v)
{
li_config_table[ch_a_v].flag_table[ch_b_v] &= ~LI_FLAG_CONFERENCE;
li_config_table[ch_a_s].flag_table[ch_b_s] &= ~LI_FLAG_CONFERENCE;
}
else
{
if (li_config_table[ch_a_v].flag_table[ch_b_v] & LI_FLAG_CONFERENCE)
{
for (i = 0; i < li_total_channels; i++)
{
if (i != ch_a_v)
li_config_table[ch_a_v].flag_table[i] &= ~LI_FLAG_CONFERENCE;
}
}
if (li_config_table[ch_a_s].flag_table[ch_b_v] & LI_FLAG_CONFERENCE)
{
for (i = 0; i < li_total_channels; i++)
{
if (i != ch_a_s)
li_config_table[ch_a_s].flag_table[i] &= ~LI_FLAG_CONFERENCE;
}
}
if (li_config_table[ch_b_v].flag_table[ch_a_v] & LI_FLAG_CONFERENCE)
{
for (i = 0; i < li_total_channels; i++)
{
if (i != ch_a_v)
li_config_table[i].flag_table[ch_a_v] &= ~LI_FLAG_CONFERENCE;
}
}
if (li_config_table[ch_b_v].flag_table[ch_a_s] & LI_FLAG_CONFERENCE)
{
for (i = 0; i < li_total_channels; i++)
{
if (i != ch_a_s)
li_config_table[i].flag_table[ch_a_s] &= ~LI_FLAG_CONFERENCE;
}
}
}
if (li_flags & LI_FLAG_CONFERENCE_A_B)
{
li_config_table[ch_b_v].flag_table[ch_a_v] |= LI_FLAG_CONFERENCE;
li_config_table[ch_b_s].flag_table[ch_a_v] |= LI_FLAG_CONFERENCE;
li_config_table[ch_b_v].flag_table[ch_a_s] |= LI_FLAG_CONFERENCE;
li_config_table[ch_b_s].flag_table[ch_a_s] |= LI_FLAG_CONFERENCE;
}
if (li_flags & LI_FLAG_CONFERENCE_B_A)
{
li_config_table[ch_a_v].flag_table[ch_b_v] |= LI_FLAG_CONFERENCE;
li_config_table[ch_a_v].flag_table[ch_b_s] |= LI_FLAG_CONFERENCE;
li_config_table[ch_a_s].flag_table[ch_b_v] |= LI_FLAG_CONFERENCE;
li_config_table[ch_a_s].flag_table[ch_b_s] |= LI_FLAG_CONFERENCE;
}
if (li_flags & LI_FLAG_MONITOR_A)
{
li_config_table[ch_a].flag_table[ch_a_v] |= LI_FLAG_MONITOR;
li_config_table[ch_a].flag_table[ch_a_s] |= LI_FLAG_MONITOR;
}
if (li_flags & LI_FLAG_MONITOR_B)
{
li_config_table[ch_a].flag_table[ch_b_v] |= LI_FLAG_MONITOR;
li_config_table[ch_a].flag_table[ch_b_s] |= LI_FLAG_MONITOR;
}
if (li_flags & LI_FLAG_ANNOUNCEMENT_A)
{
li_config_table[ch_a_v].flag_table[ch_a] |= LI_FLAG_ANNOUNCEMENT;
li_config_table[ch_a_s].flag_table[ch_a] |= LI_FLAG_ANNOUNCEMENT;
}
if (li_flags & LI_FLAG_ANNOUNCEMENT_B)
{
li_config_table[ch_b_v].flag_table[ch_a] |= LI_FLAG_ANNOUNCEMENT;
li_config_table[ch_b_s].flag_table[ch_a] |= LI_FLAG_ANNOUNCEMENT;
}
if (li_flags & LI_FLAG_MIX_A)
{
li_config_table[ch_a_v].flag_table[ch_a] |= LI_FLAG_MIX;
li_config_table[ch_a_s].flag_table[ch_a] |= LI_FLAG_MIX;
}
if (li_flags & LI_FLAG_MIX_B)
{
li_config_table[ch_b_v].flag_table[ch_a] |= LI_FLAG_MIX;
li_config_table[ch_b_s].flag_table[ch_a] |= LI_FLAG_MIX;
}
if (ch_a_v != ch_a_s)
{
li_config_table[ch_a_v].flag_table[ch_a_s] |= LI_FLAG_CONFERENCE;
li_config_table[ch_a_s].flag_table[ch_a_v] |= LI_FLAG_CONFERENCE;
}
if (ch_b_v != ch_b_s)
{
li_config_table[ch_b_v].flag_table[ch_b_s] |= LI_FLAG_CONFERENCE;
li_config_table[ch_b_s].flag_table[ch_b_v] |= LI_FLAG_CONFERENCE;
}
}
static void li2_update_connect(dword Id, DIVA_CAPI_ADAPTER *a, PLCI *plci,
dword plci_b_id, byte connect, dword li_flags)
{
word ch_a, ch_a_v, ch_a_s, ch_b, ch_b_v, ch_b_s;
PLCI *plci_b;
DIVA_CAPI_ADAPTER *a_b;
a_b = &(adapter[MapController((byte)(plci_b_id & 0x7f)) - 1]);
plci_b = &(a_b->plci[((plci_b_id >> 8) & 0xff) - 1]);
ch_a = a->li_base + (plci->li_bchannel_id - 1);
if (!a->li_pri && (plci->tel == ADV_VOICE)
&& (plci == a->AdvSignalPLCI) && (Id & EXT_CONTROLLER))
{
ch_a_v = ch_a + MIXER_IC_CHANNEL_BASE;
ch_a_s = (a->manufacturer_features & MANUFACTURER_FEATURE_SLAVE_CODEC) ?
a->li_base + MIXER_IC_CHANNEL_BASE + (2 - plci->li_bchannel_id) : ch_a_v;
}
else
{
ch_a_v = ch_a;
ch_a_s = ch_a;
}
ch_b = a_b->li_base + (plci_b->li_bchannel_id - 1);
if (!a_b->li_pri && (plci_b->tel == ADV_VOICE)
&& (plci_b == a_b->AdvSignalPLCI) && (plci_b_id & EXT_CONTROLLER))
{
ch_b_v = ch_b + MIXER_IC_CHANNEL_BASE;
ch_b_s = (a_b->manufacturer_features & MANUFACTURER_FEATURE_SLAVE_CODEC) ?
a_b->li_base + MIXER_IC_CHANNEL_BASE + (2 - plci_b->li_bchannel_id) : ch_b_v;
}
else
{
ch_b_v = ch_b;
ch_b_s = ch_b;
}
if (connect)
{
li_config_table[ch_b].flag_table[ch_b_v] &= ~LI_FLAG_MONITOR;
li_config_table[ch_b].flag_table[ch_b_s] &= ~LI_FLAG_MONITOR;
li_config_table[ch_b_v].flag_table[ch_b] &= ~LI_FLAG_MIX;
li_config_table[ch_b_s].flag_table[ch_b] &= ~LI_FLAG_MIX;
li_config_table[ch_b].flag_table[ch_b] &= ~LI_FLAG_PCCONNECT;
li_config_table[ch_b].chflags &= ~(LI_CHFLAG_MONITOR | LI_CHFLAG_MIX | LI_CHFLAG_LOOP);
}
li_config_table[ch_b_v].flag_table[ch_a_v] &= ~(LI_FLAG_INTERCONNECT | LI_FLAG_CONFERENCE);
li_config_table[ch_b_s].flag_table[ch_a_v] &= ~(LI_FLAG_INTERCONNECT | LI_FLAG_CONFERENCE);
li_config_table[ch_b_v].flag_table[ch_a_s] &= ~(LI_FLAG_INTERCONNECT | LI_FLAG_CONFERENCE);
li_config_table[ch_b_s].flag_table[ch_a_s] &= ~(LI_FLAG_INTERCONNECT | LI_FLAG_CONFERENCE);
li_config_table[ch_a_v].flag_table[ch_b_v] &= ~(LI_FLAG_INTERCONNECT | LI_FLAG_CONFERENCE);
li_config_table[ch_a_v].flag_table[ch_b_s] &= ~(LI_FLAG_INTERCONNECT | LI_FLAG_CONFERENCE);
li_config_table[ch_a_s].flag_table[ch_b_v] &= ~(LI_FLAG_INTERCONNECT | LI_FLAG_CONFERENCE);
li_config_table[ch_a_s].flag_table[ch_b_s] &= ~(LI_FLAG_INTERCONNECT | LI_FLAG_CONFERENCE);
if (li_flags & LI2_FLAG_INTERCONNECT_A_B)
{
li_config_table[ch_b_v].flag_table[ch_a_v] |= LI_FLAG_INTERCONNECT;
li_config_table[ch_b_s].flag_table[ch_a_v] |= LI_FLAG_INTERCONNECT;
li_config_table[ch_b_v].flag_table[ch_a_s] |= LI_FLAG_INTERCONNECT;
li_config_table[ch_b_s].flag_table[ch_a_s] |= LI_FLAG_INTERCONNECT;
}
if (li_flags & LI2_FLAG_INTERCONNECT_B_A)
{
li_config_table[ch_a_v].flag_table[ch_b_v] |= LI_FLAG_INTERCONNECT;
li_config_table[ch_a_v].flag_table[ch_b_s] |= LI_FLAG_INTERCONNECT;
li_config_table[ch_a_s].flag_table[ch_b_v] |= LI_FLAG_INTERCONNECT;
li_config_table[ch_a_s].flag_table[ch_b_s] |= LI_FLAG_INTERCONNECT;
}
if (li_flags & LI2_FLAG_MONITOR_B)
{
li_config_table[ch_b].flag_table[ch_b_v] |= LI_FLAG_MONITOR;
li_config_table[ch_b].flag_table[ch_b_s] |= LI_FLAG_MONITOR;
}
if (li_flags & LI2_FLAG_MIX_B)
{
li_config_table[ch_b_v].flag_table[ch_b] |= LI_FLAG_MIX;
li_config_table[ch_b_s].flag_table[ch_b] |= LI_FLAG_MIX;
}
if (li_flags & LI2_FLAG_MONITOR_X)
li_config_table[ch_b].chflags |= LI_CHFLAG_MONITOR;
if (li_flags & LI2_FLAG_MIX_X)
li_config_table[ch_b].chflags |= LI_CHFLAG_MIX;
if (li_flags & LI2_FLAG_LOOP_B)
{
li_config_table[ch_b_v].flag_table[ch_b_v] |= LI_FLAG_INTERCONNECT;
li_config_table[ch_b_s].flag_table[ch_b_v] |= LI_FLAG_INTERCONNECT;
li_config_table[ch_b_v].flag_table[ch_b_s] |= LI_FLAG_INTERCONNECT;
li_config_table[ch_b_s].flag_table[ch_b_s] |= LI_FLAG_INTERCONNECT;
}
if (li_flags & LI2_FLAG_LOOP_PC)
li_config_table[ch_b].flag_table[ch_b] |= LI_FLAG_PCCONNECT;
if (li_flags & LI2_FLAG_LOOP_X)
li_config_table[ch_b].chflags |= LI_CHFLAG_LOOP;
if (li_flags & LI2_FLAG_PCCONNECT_A_B)
li_config_table[ch_b_s].flag_table[ch_a_s] |= LI_FLAG_PCCONNECT;
if (li_flags & LI2_FLAG_PCCONNECT_B_A)
li_config_table[ch_a_s].flag_table[ch_b_s] |= LI_FLAG_PCCONNECT;
if (ch_a_v != ch_a_s)
{
li_config_table[ch_a_v].flag_table[ch_a_s] |= LI_FLAG_CONFERENCE;
li_config_table[ch_a_s].flag_table[ch_a_v] |= LI_FLAG_CONFERENCE;
}
if (ch_b_v != ch_b_s)
{
li_config_table[ch_b_v].flag_table[ch_b_s] |= LI_FLAG_CONFERENCE;
li_config_table[ch_b_s].flag_table[ch_b_v] |= LI_FLAG_CONFERENCE;
}
}
static word li_check_main_plci(dword Id, PLCI *plci)
{
if (plci == NULL)
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong PLCI",
UnMapId(Id), (char *)(FILE_), __LINE__));
return (_WRONG_IDENTIFIER);
}
if (!plci->State
|| !plci->NL.Id || plci->nl_remove_id
|| (plci->li_bchannel_id == 0))
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong state",
UnMapId(Id), (char *)(FILE_), __LINE__));
return (_WRONG_STATE);
}
li_config_table[plci->adapter->li_base + (plci->li_bchannel_id - 1)].plci = plci;
return (GOOD);
}
static PLCI *li_check_plci_b(dword Id, PLCI *plci,
dword plci_b_id, word plci_b_write_pos, byte *p_result)
{
byte ctlr_b;
PLCI *plci_b;
if (((plci->li_plci_b_read_pos > plci_b_write_pos) ? plci->li_plci_b_read_pos :
LI_PLCI_B_QUEUE_ENTRIES + plci->li_plci_b_read_pos) - plci_b_write_pos - 1 < 2)
{
dbug(1, dprintf("[%06lx] %s,%d: LI request overrun",
UnMapId(Id), (char *)(FILE_), __LINE__));
PUT_WORD(p_result, _REQUEST_NOT_ALLOWED_IN_THIS_STATE);
return (NULL);
}
ctlr_b = 0;
if ((plci_b_id & 0x7f) != 0)
{
ctlr_b = MapController((byte)(plci_b_id & 0x7f));
if ((ctlr_b > max_adapter) || ((ctlr_b != 0) && (adapter[ctlr_b - 1].request == NULL)))
ctlr_b = 0;
}
if ((ctlr_b == 0)
|| (((plci_b_id >> 8) & 0xff) == 0)
|| (((plci_b_id >> 8) & 0xff) > adapter[ctlr_b - 1].max_plci))
{
dbug(1, dprintf("[%06lx] %s,%d: LI invalid second PLCI %08lx",
UnMapId(Id), (char *)(FILE_), __LINE__, plci_b_id));
PUT_WORD(p_result, _WRONG_IDENTIFIER);
return (NULL);
}
plci_b = &(adapter[ctlr_b - 1].plci[((plci_b_id >> 8) & 0xff) - 1]);
if (!plci_b->State
|| !plci_b->NL.Id || plci_b->nl_remove_id
|| (plci_b->li_bchannel_id == 0))
{
dbug(1, dprintf("[%06lx] %s,%d: LI peer in wrong state %08lx",
UnMapId(Id), (char *)(FILE_), __LINE__, plci_b_id));
PUT_WORD(p_result, _REQUEST_NOT_ALLOWED_IN_THIS_STATE);
return (NULL);
}
li_config_table[plci_b->adapter->li_base + (plci_b->li_bchannel_id - 1)].plci = plci_b;
if (((byte)(plci_b_id & ~EXT_CONTROLLER)) !=
((byte)(UnMapController(plci->adapter->Id) & ~EXT_CONTROLLER))
&& (!(plci->adapter->manufacturer_features & MANUFACTURER_FEATURE_XCONNECT)
|| !(plci_b->adapter->manufacturer_features & MANUFACTURER_FEATURE_XCONNECT)))
{
dbug(1, dprintf("[%06lx] %s,%d: LI not on same ctrl %08lx",
UnMapId(Id), (char *)(FILE_), __LINE__, plci_b_id));
PUT_WORD(p_result, _WRONG_IDENTIFIER);
return (NULL);
}
if (!(get_b1_facilities(plci_b, add_b1_facilities(plci_b, plci_b->B1_resource,
(word)(plci_b->B1_facilities | B1_FACILITY_MIXER))) & B1_FACILITY_MIXER))
{
dbug(1, dprintf("[%06lx] %s,%d: Interconnect peer cannot mix %d",
UnMapId(Id), (char *)(FILE_), __LINE__, plci_b->B1_resource));
PUT_WORD(p_result, _REQUEST_NOT_ALLOWED_IN_THIS_STATE);
return (NULL);
}
return (plci_b);
}
static PLCI *li2_check_plci_b(dword Id, PLCI *plci,
dword plci_b_id, word plci_b_write_pos, byte *p_result)
{
byte ctlr_b;
PLCI *plci_b;
if (((plci->li_plci_b_read_pos > plci_b_write_pos) ? plci->li_plci_b_read_pos :
LI_PLCI_B_QUEUE_ENTRIES + plci->li_plci_b_read_pos) - plci_b_write_pos - 1 < 2)
{
dbug(1, dprintf("[%06lx] %s,%d: LI request overrun",
UnMapId(Id), (char *)(FILE_), __LINE__));
PUT_WORD(p_result, _WRONG_STATE);
return (NULL);
}
ctlr_b = 0;
if ((plci_b_id & 0x7f) != 0)
{
ctlr_b = MapController((byte)(plci_b_id & 0x7f));
if ((ctlr_b > max_adapter) || ((ctlr_b != 0) && (adapter[ctlr_b - 1].request == NULL)))
ctlr_b = 0;
}
if ((ctlr_b == 0)
|| (((plci_b_id >> 8) & 0xff) == 0)
|| (((plci_b_id >> 8) & 0xff) > adapter[ctlr_b - 1].max_plci))
{
dbug(1, dprintf("[%06lx] %s,%d: LI invalid second PLCI %08lx",
UnMapId(Id), (char *)(FILE_), __LINE__, plci_b_id));
PUT_WORD(p_result, _WRONG_IDENTIFIER);
return (NULL);
}
plci_b = &(adapter[ctlr_b - 1].plci[((plci_b_id >> 8) & 0xff) - 1]);
if (!plci_b->State
|| !plci_b->NL.Id || plci_b->nl_remove_id
|| (plci_b->li_bchannel_id == 0)
|| (li_config_table[plci_b->adapter->li_base + (plci_b->li_bchannel_id - 1)].plci != plci_b))
{
dbug(1, dprintf("[%06lx] %s,%d: LI peer in wrong state %08lx",
UnMapId(Id), (char *)(FILE_), __LINE__, plci_b_id));
PUT_WORD(p_result, _WRONG_STATE);
return (NULL);
}
if (((byte)(plci_b_id & ~EXT_CONTROLLER)) !=
((byte)(UnMapController(plci->adapter->Id) & ~EXT_CONTROLLER))
&& (!(plci->adapter->manufacturer_features & MANUFACTURER_FEATURE_XCONNECT)
|| !(plci_b->adapter->manufacturer_features & MANUFACTURER_FEATURE_XCONNECT)))
{
dbug(1, dprintf("[%06lx] %s,%d: LI not on same ctrl %08lx",
UnMapId(Id), (char *)(FILE_), __LINE__, plci_b_id));
PUT_WORD(p_result, _WRONG_IDENTIFIER);
return (NULL);
}
if (!(get_b1_facilities(plci_b, add_b1_facilities(plci_b, plci_b->B1_resource,
(word)(plci_b->B1_facilities | B1_FACILITY_MIXER))) & B1_FACILITY_MIXER))
{
dbug(1, dprintf("[%06lx] %s,%d: Interconnect peer cannot mix %d",
UnMapId(Id), (char *)(FILE_), __LINE__, plci_b->B1_resource));
PUT_WORD(p_result, _WRONG_STATE);
return (NULL);
}
return (plci_b);
}
static byte mixer_request(dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI *plci, APPL *appl, API_PARSE *msg)
{
word Info;
word i;
dword d, li_flags, plci_b_id;
PLCI *plci_b;
API_PARSE li_parms[3];
API_PARSE li_req_parms[3];
API_PARSE li_participant_struct[2];
API_PARSE li_participant_parms[3];
word participant_parms_pos;
byte result_buffer[32];
byte *result;
word result_pos;
word plci_b_write_pos;
dbug(1, dprintf("[%06lx] %s,%d: mixer_request",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = GOOD;
result = result_buffer;
result_buffer[0] = 0;
if (!(a->profile.Global_Options & GL_LINE_INTERCONNECT_SUPPORTED))
{
dbug(1, dprintf("[%06lx] %s,%d: Facility not supported",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _FACILITY_NOT_SUPPORTED;
}
else if (api_parse(&msg[1].info[1], msg[1].length, "ws", li_parms))
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong message format",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _WRONG_MESSAGE_FORMAT;
}
else
{
result_buffer[0] = 3;
PUT_WORD(&result_buffer[1], GET_WORD(li_parms[0].info));
result_buffer[3] = 0;
switch (GET_WORD(li_parms[0].info))
{
case LI_GET_SUPPORTED_SERVICES:
if (appl->appl_flags & APPL_FLAG_OLD_LI_SPEC)
{
result_buffer[0] = 17;
result_buffer[3] = 14;
PUT_WORD(&result_buffer[4], GOOD);
d = 0;
if (a->manufacturer_features & MANUFACTURER_FEATURE_MIXER_CH_CH)
d |= LI_CONFERENCING_SUPPORTED;
if (a->manufacturer_features & MANUFACTURER_FEATURE_MIXER_CH_PC)
d |= LI_MONITORING_SUPPORTED;
if (a->manufacturer_features & MANUFACTURER_FEATURE_MIXER_PC_CH)
d |= LI_ANNOUNCEMENTS_SUPPORTED | LI_MIXING_SUPPORTED;
if (a->manufacturer_features & MANUFACTURER_FEATURE_XCONNECT)
d |= LI_CROSS_CONTROLLER_SUPPORTED;
PUT_DWORD(&result_buffer[6], d);
if (a->manufacturer_features & MANUFACTURER_FEATURE_XCONNECT)
{
d = 0;
for (i = 0; i < li_total_channels; i++)
{
if ((li_config_table[i].adapter->manufacturer_features & MANUFACTURER_FEATURE_XCONNECT)
&& (li_config_table[i].adapter->li_pri
|| (i < li_config_table[i].adapter->li_base + MIXER_BCHANNELS_BRI)))
{
d++;
}
}
}
else
{
d = a->li_pri ? a->li_channels : MIXER_BCHANNELS_BRI;
}
PUT_DWORD(&result_buffer[10], d / 2);
PUT_DWORD(&result_buffer[14], d);
}
else
{
result_buffer[0] = 25;
result_buffer[3] = 22;
PUT_WORD(&result_buffer[4], GOOD);
d = LI2_ASYMMETRIC_SUPPORTED | LI2_B_LOOPING_SUPPORTED | LI2_X_LOOPING_SUPPORTED;
if (a->manufacturer_features & MANUFACTURER_FEATURE_MIXER_CH_PC)
d |= LI2_MONITORING_SUPPORTED | LI2_REMOTE_MONITORING_SUPPORTED;
if (a->manufacturer_features & MANUFACTURER_FEATURE_MIXER_PC_CH)
d |= LI2_MIXING_SUPPORTED | LI2_REMOTE_MIXING_SUPPORTED;
if (a->manufacturer_features & MANUFACTURER_FEATURE_MIXER_PC_PC)
d |= LI2_PC_LOOPING_SUPPORTED;
if (a->manufacturer_features & MANUFACTURER_FEATURE_XCONNECT)
d |= LI2_CROSS_CONTROLLER_SUPPORTED;
PUT_DWORD(&result_buffer[6], d);
d = a->li_pri ? a->li_channels : MIXER_BCHANNELS_BRI;
PUT_DWORD(&result_buffer[10], d / 2);
PUT_DWORD(&result_buffer[14], d - 1);
if (a->manufacturer_features & MANUFACTURER_FEATURE_XCONNECT)
{
d = 0;
for (i = 0; i < li_total_channels; i++)
{
if ((li_config_table[i].adapter->manufacturer_features & MANUFACTURER_FEATURE_XCONNECT)
&& (li_config_table[i].adapter->li_pri
|| (i < li_config_table[i].adapter->li_base + MIXER_BCHANNELS_BRI)))
{
d++;
}
}
}
PUT_DWORD(&result_buffer[18], d / 2);
PUT_DWORD(&result_buffer[22], d - 1);
}
break;
case LI_REQ_CONNECT:
if (li_parms[1].length == 8)
{
appl->appl_flags |= APPL_FLAG_OLD_LI_SPEC;
if (api_parse(&li_parms[1].info[1], li_parms[1].length, "dd", li_req_parms))
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong message format",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _WRONG_MESSAGE_FORMAT;
break;
}
plci_b_id = GET_DWORD(li_req_parms[0].info) & 0xffff;
li_flags = GET_DWORD(li_req_parms[1].info);
Info = li_check_main_plci(Id, plci);
result_buffer[0] = 9;
result_buffer[3] = 6;
PUT_DWORD(&result_buffer[4], plci_b_id);
PUT_WORD(&result_buffer[8], GOOD);
if (Info != GOOD)
break;
result = plci->saved_msg.info;
for (i = 0; i <= result_buffer[0]; i++)
result[i] = result_buffer[i];
plci_b_write_pos = plci->li_plci_b_write_pos;
plci_b = li_check_plci_b(Id, plci, plci_b_id, plci_b_write_pos, &result[8]);
if (plci_b == NULL)
break;
li_update_connect(Id, a, plci, plci_b_id, true, li_flags);
plci->li_plci_b_queue[plci_b_write_pos] = plci_b_id | LI_PLCI_B_LAST_FLAG;
plci_b_write_pos = (plci_b_write_pos == LI_PLCI_B_QUEUE_ENTRIES - 1) ? 0 : plci_b_write_pos + 1;
plci->li_plci_b_write_pos = plci_b_write_pos;
}
else
{
appl->appl_flags &= ~APPL_FLAG_OLD_LI_SPEC;
if (api_parse(&li_parms[1].info[1], li_parms[1].length, "ds", li_req_parms))
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong message format",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _WRONG_MESSAGE_FORMAT;
break;
}
li_flags = GET_DWORD(li_req_parms[0].info) & ~(LI2_FLAG_INTERCONNECT_A_B | LI2_FLAG_INTERCONNECT_B_A);
Info = li_check_main_plci(Id, plci);
result_buffer[0] = 7;
result_buffer[3] = 4;
PUT_WORD(&result_buffer[4], Info);
result_buffer[6] = 0;
if (Info != GOOD)
break;
result = plci->saved_msg.info;
for (i = 0; i <= result_buffer[0]; i++)
result[i] = result_buffer[i];
plci_b_write_pos = plci->li_plci_b_write_pos;
participant_parms_pos = 0;
result_pos = 7;
li2_update_connect(Id, a, plci, UnMapId(Id), true, li_flags);
while (participant_parms_pos < li_req_parms[1].length)
{
result[result_pos] = 6;
result_pos += 7;
PUT_DWORD(&result[result_pos - 6], 0);
PUT_WORD(&result[result_pos - 2], GOOD);
if (api_parse(&li_req_parms[1].info[1 + participant_parms_pos],
(word)(li_parms[1].length - participant_parms_pos), "s", li_participant_struct))
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong message format",
UnMapId(Id), (char *)(FILE_), __LINE__));
PUT_WORD(&result[result_pos - 2], _WRONG_MESSAGE_FORMAT);
break;
}
if (api_parse(&li_participant_struct[0].info[1],
li_participant_struct[0].length, "dd", li_participant_parms))
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong message format",
UnMapId(Id), (char *)(FILE_), __LINE__));
PUT_WORD(&result[result_pos - 2], _WRONG_MESSAGE_FORMAT);
break;
}
plci_b_id = GET_DWORD(li_participant_parms[0].info) & 0xffff;
li_flags = GET_DWORD(li_participant_parms[1].info);
PUT_DWORD(&result[result_pos - 6], plci_b_id);
if (sizeof(result) - result_pos < 7)
{
dbug(1, dprintf("[%06lx] %s,%d: LI result overrun",
UnMapId(Id), (char *)(FILE_), __LINE__));
PUT_WORD(&result[result_pos - 2], _WRONG_STATE);
break;
}
plci_b = li2_check_plci_b(Id, plci, plci_b_id, plci_b_write_pos, &result[result_pos - 2]);
if (plci_b != NULL)
{
li2_update_connect(Id, a, plci, plci_b_id, true, li_flags);
plci->li_plci_b_queue[plci_b_write_pos] = plci_b_id |
((li_flags & (LI2_FLAG_INTERCONNECT_A_B | LI2_FLAG_INTERCONNECT_B_A |
LI2_FLAG_PCCONNECT_A_B | LI2_FLAG_PCCONNECT_B_A)) ? 0 : LI_PLCI_B_DISC_FLAG);
plci_b_write_pos = (plci_b_write_pos == LI_PLCI_B_QUEUE_ENTRIES - 1) ? 0 : plci_b_write_pos + 1;
}
participant_parms_pos = (word)((&li_participant_struct[0].info[1 + li_participant_struct[0].length]) -
(&li_req_parms[1].info[1]));
}
result[0] = (byte)(result_pos - 1);
result[3] = (byte)(result_pos - 4);
result[6] = (byte)(result_pos - 7);
i = (plci_b_write_pos == 0) ? LI_PLCI_B_QUEUE_ENTRIES - 1 : plci_b_write_pos - 1;
if ((plci_b_write_pos == plci->li_plci_b_read_pos)
|| (plci->li_plci_b_queue[i] & LI_PLCI_B_LAST_FLAG))
{
plci->li_plci_b_queue[plci_b_write_pos] = LI_PLCI_B_SKIP_FLAG | LI_PLCI_B_LAST_FLAG;
plci_b_write_pos = (plci_b_write_pos == LI_PLCI_B_QUEUE_ENTRIES - 1) ? 0 : plci_b_write_pos + 1;
}
else
plci->li_plci_b_queue[i] |= LI_PLCI_B_LAST_FLAG;
plci->li_plci_b_write_pos = plci_b_write_pos;
}
mixer_calculate_coefs(a);
plci->li_channel_bits = li_config_table[a->li_base + (plci->li_bchannel_id - 1)].channel;
mixer_notify_update(plci, true);
sendf(appl, _FACILITY_R | CONFIRM, Id & 0xffffL, Number,
"wwS", Info, SELECTOR_LINE_INTERCONNECT, result);
plci->command = 0;
plci->li_cmd = GET_WORD(li_parms[0].info);
start_internal_command(Id, plci, mixer_command);
return (false);
case LI_REQ_DISCONNECT:
if (li_parms[1].length == 4)
{
appl->appl_flags |= APPL_FLAG_OLD_LI_SPEC;
if (api_parse(&li_parms[1].info[1], li_parms[1].length, "d", li_req_parms))
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong message format",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _WRONG_MESSAGE_FORMAT;
break;
}
plci_b_id = GET_DWORD(li_req_parms[0].info) & 0xffff;
Info = li_check_main_plci(Id, plci);
result_buffer[0] = 9;
result_buffer[3] = 6;
PUT_DWORD(&result_buffer[4], GET_DWORD(li_req_parms[0].info));
PUT_WORD(&result_buffer[8], GOOD);
if (Info != GOOD)
break;
result = plci->saved_msg.info;
for (i = 0; i <= result_buffer[0]; i++)
result[i] = result_buffer[i];
plci_b_write_pos = plci->li_plci_b_write_pos;
plci_b = li_check_plci_b(Id, plci, plci_b_id, plci_b_write_pos, &result[8]);
if (plci_b == NULL)
break;
li_update_connect(Id, a, plci, plci_b_id, false, 0);
plci->li_plci_b_queue[plci_b_write_pos] = plci_b_id | LI_PLCI_B_DISC_FLAG | LI_PLCI_B_LAST_FLAG;
plci_b_write_pos = (plci_b_write_pos == LI_PLCI_B_QUEUE_ENTRIES - 1) ? 0 : plci_b_write_pos + 1;
plci->li_plci_b_write_pos = plci_b_write_pos;
}
else
{
appl->appl_flags &= ~APPL_FLAG_OLD_LI_SPEC;
if (api_parse(&li_parms[1].info[1], li_parms[1].length, "s", li_req_parms))
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong message format",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _WRONG_MESSAGE_FORMAT;
break;
}
Info = li_check_main_plci(Id, plci);
result_buffer[0] = 7;
result_buffer[3] = 4;
PUT_WORD(&result_buffer[4], Info);
result_buffer[6] = 0;
if (Info != GOOD)
break;
result = plci->saved_msg.info;
for (i = 0; i <= result_buffer[0]; i++)
result[i] = result_buffer[i];
plci_b_write_pos = plci->li_plci_b_write_pos;
participant_parms_pos = 0;
result_pos = 7;
while (participant_parms_pos < li_req_parms[0].length)
{
result[result_pos] = 6;
result_pos += 7;
PUT_DWORD(&result[result_pos - 6], 0);
PUT_WORD(&result[result_pos - 2], GOOD);
if (api_parse(&li_req_parms[0].info[1 + participant_parms_pos],
(word)(li_parms[1].length - participant_parms_pos), "s", li_participant_struct))
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong message format",
UnMapId(Id), (char *)(FILE_), __LINE__));
PUT_WORD(&result[result_pos - 2], _WRONG_MESSAGE_FORMAT);
break;
}
if (api_parse(&li_participant_struct[0].info[1],
li_participant_struct[0].length, "d", li_participant_parms))
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong message format",
UnMapId(Id), (char *)(FILE_), __LINE__));
PUT_WORD(&result[result_pos - 2], _WRONG_MESSAGE_FORMAT);
break;
}
plci_b_id = GET_DWORD(li_participant_parms[0].info) & 0xffff;
PUT_DWORD(&result[result_pos - 6], plci_b_id);
if (sizeof(result) - result_pos < 7)
{
dbug(1, dprintf("[%06lx] %s,%d: LI result overrun",
UnMapId(Id), (char *)(FILE_), __LINE__));
PUT_WORD(&result[result_pos - 2], _WRONG_STATE);
break;
}
plci_b = li2_check_plci_b(Id, plci, plci_b_id, plci_b_write_pos, &result[result_pos - 2]);
if (plci_b != NULL)
{
li2_update_connect(Id, a, plci, plci_b_id, false, 0);
plci->li_plci_b_queue[plci_b_write_pos] = plci_b_id | LI_PLCI_B_DISC_FLAG;
plci_b_write_pos = (plci_b_write_pos == LI_PLCI_B_QUEUE_ENTRIES - 1) ? 0 : plci_b_write_pos + 1;
}
participant_parms_pos = (word)((&li_participant_struct[0].info[1 + li_participant_struct[0].length]) -
(&li_req_parms[0].info[1]));
}
result[0] = (byte)(result_pos - 1);
result[3] = (byte)(result_pos - 4);
result[6] = (byte)(result_pos - 7);
i = (plci_b_write_pos == 0) ? LI_PLCI_B_QUEUE_ENTRIES - 1 : plci_b_write_pos - 1;
if ((plci_b_write_pos == plci->li_plci_b_read_pos)
|| (plci->li_plci_b_queue[i] & LI_PLCI_B_LAST_FLAG))
{
plci->li_plci_b_queue[plci_b_write_pos] = LI_PLCI_B_SKIP_FLAG | LI_PLCI_B_LAST_FLAG;
plci_b_write_pos = (plci_b_write_pos == LI_PLCI_B_QUEUE_ENTRIES - 1) ? 0 : plci_b_write_pos + 1;
}
else
plci->li_plci_b_queue[i] |= LI_PLCI_B_LAST_FLAG;
plci->li_plci_b_write_pos = plci_b_write_pos;
}
mixer_calculate_coefs(a);
plci->li_channel_bits = li_config_table[a->li_base + (plci->li_bchannel_id - 1)].channel;
mixer_notify_update(plci, true);
sendf(appl, _FACILITY_R | CONFIRM, Id & 0xffffL, Number,
"wwS", Info, SELECTOR_LINE_INTERCONNECT, result);
plci->command = 0;
plci->li_cmd = GET_WORD(li_parms[0].info);
start_internal_command(Id, plci, mixer_command);
return (false);
case LI_REQ_SILENT_UPDATE:
if (!plci || !plci->State
|| !plci->NL.Id || plci->nl_remove_id
|| (plci->li_bchannel_id == 0)
|| (li_config_table[plci->adapter->li_base + (plci->li_bchannel_id - 1)].plci != plci))
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong state",
UnMapId(Id), (char *)(FILE_), __LINE__));
return (false);
}
plci_b_write_pos = plci->li_plci_b_write_pos;
if (((plci->li_plci_b_read_pos > plci_b_write_pos) ? plci->li_plci_b_read_pos :
LI_PLCI_B_QUEUE_ENTRIES + plci->li_plci_b_read_pos) - plci_b_write_pos - 1 < 2)
{
dbug(1, dprintf("[%06lx] %s,%d: LI request overrun",
UnMapId(Id), (char *)(FILE_), __LINE__));
return (false);
}
i = (plci_b_write_pos == 0) ? LI_PLCI_B_QUEUE_ENTRIES - 1 : plci_b_write_pos - 1;
if ((plci_b_write_pos == plci->li_plci_b_read_pos)
|| (plci->li_plci_b_queue[i] & LI_PLCI_B_LAST_FLAG))
{
plci->li_plci_b_queue[plci_b_write_pos] = LI_PLCI_B_SKIP_FLAG | LI_PLCI_B_LAST_FLAG;
plci_b_write_pos = (plci_b_write_pos == LI_PLCI_B_QUEUE_ENTRIES - 1) ? 0 : plci_b_write_pos + 1;
}
else
plci->li_plci_b_queue[i] |= LI_PLCI_B_LAST_FLAG;
plci->li_plci_b_write_pos = plci_b_write_pos;
plci->li_channel_bits = li_config_table[a->li_base + (plci->li_bchannel_id - 1)].channel;
plci->command = 0;
plci->li_cmd = GET_WORD(li_parms[0].info);
start_internal_command(Id, plci, mixer_command);
return (false);
default:
dbug(1, dprintf("[%06lx] %s,%d: LI unknown request %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, GET_WORD(li_parms[0].info)));
Info = _FACILITY_NOT_SUPPORTED;
}
}
sendf(appl, _FACILITY_R | CONFIRM, Id & 0xffffL, Number,
"wwS", Info, SELECTOR_LINE_INTERCONNECT, result);
return (false);
}
static void mixer_indication_coefs_set(dword Id, PLCI *plci)
{
dword d;
byte result[12];
dbug(1, dprintf("[%06lx] %s,%d: mixer_indication_coefs_set",
UnMapId(Id), (char *)(FILE_), __LINE__));
if (plci->li_plci_b_read_pos != plci->li_plci_b_req_pos)
{
do
{
d = plci->li_plci_b_queue[plci->li_plci_b_read_pos];
if (!(d & LI_PLCI_B_SKIP_FLAG))
{
if (plci->appl->appl_flags & APPL_FLAG_OLD_LI_SPEC)
{
if (d & LI_PLCI_B_DISC_FLAG)
{
result[0] = 5;
PUT_WORD(&result[1], LI_IND_DISCONNECT);
result[3] = 2;
PUT_WORD(&result[4], _LI_USER_INITIATED);
}
else
{
result[0] = 7;
PUT_WORD(&result[1], LI_IND_CONNECT_ACTIVE);
result[3] = 4;
PUT_DWORD(&result[4], d & ~LI_PLCI_B_FLAG_MASK);
}
}
else
{
if (d & LI_PLCI_B_DISC_FLAG)
{
result[0] = 9;
PUT_WORD(&result[1], LI_IND_DISCONNECT);
result[3] = 6;
PUT_DWORD(&result[4], d & ~LI_PLCI_B_FLAG_MASK);
PUT_WORD(&result[8], _LI_USER_INITIATED);
}
else
{
result[0] = 7;
PUT_WORD(&result[1], LI_IND_CONNECT_ACTIVE);
result[3] = 4;
PUT_DWORD(&result[4], d & ~LI_PLCI_B_FLAG_MASK);
}
}
sendf(plci->appl, _FACILITY_I, Id & 0xffffL, 0,
"ws", SELECTOR_LINE_INTERCONNECT, result);
}
plci->li_plci_b_read_pos = (plci->li_plci_b_read_pos == LI_PLCI_B_QUEUE_ENTRIES - 1) ?
0 : plci->li_plci_b_read_pos + 1;
} while (!(d & LI_PLCI_B_LAST_FLAG) && (plci->li_plci_b_read_pos != plci->li_plci_b_req_pos));
}
}
static void mixer_indication_xconnect_from(dword Id, PLCI *plci, byte *msg, word length)
{
word i, j, ch;
struct xconnect_transfer_address_s s, *p;
DIVA_CAPI_ADAPTER *a;
dbug(1, dprintf("[%06lx] %s,%d: mixer_indication_xconnect_from %d",
UnMapId(Id), (char *)(FILE_), __LINE__, (int)length));
a = plci->adapter;
i = 1;
for (i = 1; i < length; i += 16)
{
s.card_address.low = msg[i] | (msg[i + 1] << 8) | (((dword)(msg[i + 2])) << 16) | (((dword)(msg[i + 3])) << 24);
s.card_address.high = msg[i + 4] | (msg[i + 5] << 8) | (((dword)(msg[i + 6])) << 16) | (((dword)(msg[i + 7])) << 24);
s.offset = msg[i + 8] | (msg[i + 9] << 8) | (((dword)(msg[i + 10])) << 16) | (((dword)(msg[i + 11])) << 24);
ch = msg[i + 12] | (msg[i + 13] << 8);
j = ch & XCONNECT_CHANNEL_NUMBER_MASK;
if (!a->li_pri && (plci->li_bchannel_id == 2))
j = 1 - j;
j += a->li_base;
if (ch & XCONNECT_CHANNEL_PORT_PC)
p = &(li_config_table[j].send_pc);
else
p = &(li_config_table[j].send_b);
p->card_address.low = s.card_address.low;
p->card_address.high = s.card_address.high;
p->offset = s.offset;
li_config_table[j].channel |= LI_CHANNEL_ADDRESSES_SET;
}
if (plci->internal_command_queue[0]
&& ((plci->adjust_b_state == ADJUST_B_RESTORE_MIXER_2)
|| (plci->adjust_b_state == ADJUST_B_RESTORE_MIXER_3)
|| (plci->adjust_b_state == ADJUST_B_RESTORE_MIXER_4)))
{
(*(plci->internal_command_queue[0]))(Id, plci, 0);
if (!plci->internal_command)
next_internal_command(Id, plci);
}
mixer_notify_update(plci, true);
}
static void mixer_indication_xconnect_to(dword Id, PLCI *plci, byte *msg, word length)
{
dbug(1, dprintf("[%06lx] %s,%d: mixer_indication_xconnect_to %d",
UnMapId(Id), (char *)(FILE_), __LINE__, (int) length));
}
static byte mixer_notify_source_removed(PLCI *plci, dword plci_b_id)
{
word plci_b_write_pos;
plci_b_write_pos = plci->li_plci_b_write_pos;
if (((plci->li_plci_b_read_pos > plci_b_write_pos) ? plci->li_plci_b_read_pos :
LI_PLCI_B_QUEUE_ENTRIES + plci->li_plci_b_read_pos) - plci_b_write_pos - 1 < 1)
{
dbug(1, dprintf("[%06lx] %s,%d: LI request overrun",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__));
return (false);
}
plci->li_plci_b_queue[plci_b_write_pos] = plci_b_id | LI_PLCI_B_DISC_FLAG;
plci_b_write_pos = (plci_b_write_pos == LI_PLCI_B_QUEUE_ENTRIES - 1) ? 0 : plci_b_write_pos + 1;
plci->li_plci_b_write_pos = plci_b_write_pos;
return (true);
}
static void mixer_remove(PLCI *plci)
{
DIVA_CAPI_ADAPTER *a;
PLCI *notify_plci;
dword plci_b_id;
word i, j;
dbug(1, dprintf("[%06lx] %s,%d: mixer_remove",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__));
a = plci->adapter;
plci_b_id = (plci->Id << 8) | UnMapController(plci->adapter->Id);
if (a->profile.Global_Options & GL_LINE_INTERCONNECT_SUPPORTED)
{
if ((plci->li_bchannel_id != 0)
&& (li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci == plci))
{
i = a->li_base + (plci->li_bchannel_id - 1);
if ((li_config_table[i].curchnl | li_config_table[i].channel) & LI_CHANNEL_INVOLVED)
{
for (j = 0; j < li_total_channels; j++)
{
if ((li_config_table[i].flag_table[j] & LI_FLAG_INTERCONNECT)
|| (li_config_table[j].flag_table[i] & LI_FLAG_INTERCONNECT))
{
notify_plci = li_config_table[j].plci;
if ((notify_plci != NULL)
&& (notify_plci != plci)
&& (notify_plci->appl != NULL)
&& !(notify_plci->appl->appl_flags & APPL_FLAG_OLD_LI_SPEC)
&& (notify_plci->State)
&& notify_plci->NL.Id && !notify_plci->nl_remove_id)
{
mixer_notify_source_removed(notify_plci, plci_b_id);
}
}
}
mixer_clear_config(plci);
mixer_calculate_coefs(a);
mixer_notify_update(plci, true);
}
li_config_table[i].plci = NULL;
plci->li_bchannel_id = 0;
}
}
}
/*------------------------------------------------------------------*/
/* Echo canceller facilities */
/*------------------------------------------------------------------*/
static void ec_write_parameters(PLCI *plci)
{
word w;
byte parameter_buffer[6];
dbug(1, dprintf("[%06lx] %s,%d: ec_write_parameters",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__));
parameter_buffer[0] = 5;
parameter_buffer[1] = DSP_CTRL_SET_LEC_PARAMETERS;
PUT_WORD(¶meter_buffer[2], plci->ec_idi_options);
plci->ec_idi_options &= ~LEC_RESET_COEFFICIENTS;
w = (plci->ec_tail_length == 0) ? 128 : plci->ec_tail_length;
PUT_WORD(¶meter_buffer[4], w);
add_p(plci, FTY, parameter_buffer);
sig_req(plci, TEL_CTRL, 0);
send_req(plci);
}
static void ec_clear_config(PLCI *plci)
{
dbug(1, dprintf("[%06lx] %s,%d: ec_clear_config",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__));
plci->ec_idi_options = LEC_ENABLE_ECHO_CANCELLER |
LEC_MANUAL_DISABLE | LEC_ENABLE_NONLINEAR_PROCESSING;
plci->ec_tail_length = 0;
}
static void ec_prepare_switch(dword Id, PLCI *plci)
{
dbug(1, dprintf("[%06lx] %s,%d: ec_prepare_switch",
UnMapId(Id), (char *)(FILE_), __LINE__));
}
static word ec_save_config(dword Id, PLCI *plci, byte Rc)
{
dbug(1, dprintf("[%06lx] %s,%d: ec_save_config %02x %d",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->adjust_b_state));
return (GOOD);
}
static word ec_restore_config(dword Id, PLCI *plci, byte Rc)
{
word Info;
dbug(1, dprintf("[%06lx] %s,%d: ec_restore_config %02x %d",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->adjust_b_state));
Info = GOOD;
if (plci->B1_facilities & B1_FACILITY_EC)
{
switch (plci->adjust_b_state)
{
case ADJUST_B_RESTORE_EC_1:
plci->internal_command = plci->adjust_b_command;
if (plci->sig_req)
{
plci->adjust_b_state = ADJUST_B_RESTORE_EC_1;
break;
}
ec_write_parameters(plci);
plci->adjust_b_state = ADJUST_B_RESTORE_EC_2;
break;
case ADJUST_B_RESTORE_EC_2:
if ((Rc != OK) && (Rc != OK_FC))
{
dbug(1, dprintf("[%06lx] %s,%d: Restore EC failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
Info = _WRONG_STATE;
break;
}
break;
}
}
return (Info);
}
static void ec_command(dword Id, PLCI *plci, byte Rc)
{
word internal_command, Info;
byte result[8];
dbug(1, dprintf("[%06lx] %s,%d: ec_command %02x %04x %04x %04x %d",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->internal_command,
plci->ec_cmd, plci->ec_idi_options, plci->ec_tail_length));
Info = GOOD;
if (plci->appl->appl_flags & APPL_FLAG_PRIV_EC_SPEC)
{
result[0] = 2;
PUT_WORD(&result[1], EC_SUCCESS);
}
else
{
result[0] = 5;
PUT_WORD(&result[1], plci->ec_cmd);
result[3] = 2;
PUT_WORD(&result[4], GOOD);
}
internal_command = plci->internal_command;
plci->internal_command = 0;
switch (plci->ec_cmd)
{
case EC_ENABLE_OPERATION:
case EC_FREEZE_COEFFICIENTS:
case EC_RESUME_COEFFICIENT_UPDATE:
case EC_RESET_COEFFICIENTS:
switch (internal_command)
{
default:
adjust_b1_resource(Id, plci, NULL, (word)(plci->B1_facilities |
B1_FACILITY_EC), EC_COMMAND_1);
case EC_COMMAND_1:
if (adjust_b_process(Id, plci, Rc) != GOOD)
{
dbug(1, dprintf("[%06lx] %s,%d: Load EC failed",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _FACILITY_NOT_SUPPORTED;
break;
}
if (plci->internal_command)
return;
case EC_COMMAND_2:
if (plci->sig_req)
{
plci->internal_command = EC_COMMAND_2;
return;
}
plci->internal_command = EC_COMMAND_3;
ec_write_parameters(plci);
return;
case EC_COMMAND_3:
if ((Rc != OK) && (Rc != OK_FC))
{
dbug(1, dprintf("[%06lx] %s,%d: Enable EC failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
Info = _FACILITY_NOT_SUPPORTED;
break;
}
break;
}
break;
case EC_DISABLE_OPERATION:
switch (internal_command)
{
default:
case EC_COMMAND_1:
if (plci->B1_facilities & B1_FACILITY_EC)
{
if (plci->sig_req)
{
plci->internal_command = EC_COMMAND_1;
return;
}
plci->internal_command = EC_COMMAND_2;
ec_write_parameters(plci);
return;
}
Rc = OK;
case EC_COMMAND_2:
if ((Rc != OK) && (Rc != OK_FC))
{
dbug(1, dprintf("[%06lx] %s,%d: Disable EC failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
Info = _FACILITY_NOT_SUPPORTED;
break;
}
adjust_b1_resource(Id, plci, NULL, (word)(plci->B1_facilities &
~B1_FACILITY_EC), EC_COMMAND_3);
case EC_COMMAND_3:
if (adjust_b_process(Id, plci, Rc) != GOOD)
{
dbug(1, dprintf("[%06lx] %s,%d: Unload EC failed",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _FACILITY_NOT_SUPPORTED;
break;
}
if (plci->internal_command)
return;
break;
}
break;
}
sendf(plci->appl, _FACILITY_R | CONFIRM, Id & 0xffffL, plci->number,
"wws", Info, (plci->appl->appl_flags & APPL_FLAG_PRIV_EC_SPEC) ?
PRIV_SELECTOR_ECHO_CANCELLER : SELECTOR_ECHO_CANCELLER, result);
}
static byte ec_request(dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI *plci, APPL *appl, API_PARSE *msg)
{
word Info;
word opt;
API_PARSE ec_parms[3];
byte result[16];
dbug(1, dprintf("[%06lx] %s,%d: ec_request",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = GOOD;
result[0] = 0;
if (!(a->man_profile.private_options & (1L << PRIVATE_ECHO_CANCELLER)))
{
dbug(1, dprintf("[%06lx] %s,%d: Facility not supported",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _FACILITY_NOT_SUPPORTED;
}
else
{
if (appl->appl_flags & APPL_FLAG_PRIV_EC_SPEC)
{
if (api_parse(&msg[1].info[1], msg[1].length, "w", ec_parms))
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong message format",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _WRONG_MESSAGE_FORMAT;
}
else
{
if (plci == NULL)
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong PLCI",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _WRONG_IDENTIFIER;
}
else if (!plci->State || !plci->NL.Id || plci->nl_remove_id)
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong state",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _WRONG_STATE;
}
else
{
plci->command = 0;
plci->ec_cmd = GET_WORD(ec_parms[0].info);
plci->ec_idi_options &= ~(LEC_MANUAL_DISABLE | LEC_RESET_COEFFICIENTS);
result[0] = 2;
PUT_WORD(&result[1], EC_SUCCESS);
if (msg[1].length >= 4)
{
opt = GET_WORD(&ec_parms[0].info[2]);
plci->ec_idi_options &= ~(LEC_ENABLE_NONLINEAR_PROCESSING |
LEC_ENABLE_2100HZ_DETECTOR | LEC_REQUIRE_2100HZ_REVERSALS);
if (!(opt & EC_DISABLE_NON_LINEAR_PROCESSING))
plci->ec_idi_options |= LEC_ENABLE_NONLINEAR_PROCESSING;
if (opt & EC_DETECT_DISABLE_TONE)
plci->ec_idi_options |= LEC_ENABLE_2100HZ_DETECTOR;
if (!(opt & EC_DO_NOT_REQUIRE_REVERSALS))
plci->ec_idi_options |= LEC_REQUIRE_2100HZ_REVERSALS;
if (msg[1].length >= 6)
{
plci->ec_tail_length = GET_WORD(&ec_parms[0].info[4]);
}
}
switch (plci->ec_cmd)
{
case EC_ENABLE_OPERATION:
plci->ec_idi_options &= ~LEC_FREEZE_COEFFICIENTS;
start_internal_command(Id, plci, ec_command);
return (false);
case EC_DISABLE_OPERATION:
plci->ec_idi_options = LEC_ENABLE_ECHO_CANCELLER |
LEC_MANUAL_DISABLE | LEC_ENABLE_NONLINEAR_PROCESSING |
LEC_RESET_COEFFICIENTS;
start_internal_command(Id, plci, ec_command);
return (false);
case EC_FREEZE_COEFFICIENTS:
plci->ec_idi_options |= LEC_FREEZE_COEFFICIENTS;
start_internal_command(Id, plci, ec_command);
return (false);
case EC_RESUME_COEFFICIENT_UPDATE:
plci->ec_idi_options &= ~LEC_FREEZE_COEFFICIENTS;
start_internal_command(Id, plci, ec_command);
return (false);
case EC_RESET_COEFFICIENTS:
plci->ec_idi_options |= LEC_RESET_COEFFICIENTS;
start_internal_command(Id, plci, ec_command);
return (false);
default:
dbug(1, dprintf("[%06lx] %s,%d: EC unknown request %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, plci->ec_cmd));
PUT_WORD(&result[1], EC_UNSUPPORTED_OPERATION);
}
}
}
}
else
{
if (api_parse(&msg[1].info[1], msg[1].length, "ws", ec_parms))
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong message format",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _WRONG_MESSAGE_FORMAT;
}
else
{
if (GET_WORD(ec_parms[0].info) == EC_GET_SUPPORTED_SERVICES)
{
result[0] = 11;
PUT_WORD(&result[1], EC_GET_SUPPORTED_SERVICES);
result[3] = 8;
PUT_WORD(&result[4], GOOD);
PUT_WORD(&result[6], 0x0007);
PUT_WORD(&result[8], LEC_MAX_SUPPORTED_TAIL_LENGTH);
PUT_WORD(&result[10], 0);
}
else if (plci == NULL)
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong PLCI",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _WRONG_IDENTIFIER;
}
else if (!plci->State || !plci->NL.Id || plci->nl_remove_id)
{
dbug(1, dprintf("[%06lx] %s,%d: Wrong state",
UnMapId(Id), (char *)(FILE_), __LINE__));
Info = _WRONG_STATE;
}
else
{
plci->command = 0;
plci->ec_cmd = GET_WORD(ec_parms[0].info);
plci->ec_idi_options &= ~(LEC_MANUAL_DISABLE | LEC_RESET_COEFFICIENTS);
result[0] = 5;
PUT_WORD(&result[1], plci->ec_cmd);
result[3] = 2;
PUT_WORD(&result[4], GOOD);
plci->ec_idi_options &= ~(LEC_ENABLE_NONLINEAR_PROCESSING |
LEC_ENABLE_2100HZ_DETECTOR | LEC_REQUIRE_2100HZ_REVERSALS);
plci->ec_tail_length = 0;
if (ec_parms[1].length >= 2)
{
opt = GET_WORD(&ec_parms[1].info[1]);
if (opt & EC_ENABLE_NON_LINEAR_PROCESSING)
plci->ec_idi_options |= LEC_ENABLE_NONLINEAR_PROCESSING;
if (opt & EC_DETECT_DISABLE_TONE)
plci->ec_idi_options |= LEC_ENABLE_2100HZ_DETECTOR;
if (!(opt & EC_DO_NOT_REQUIRE_REVERSALS))
plci->ec_idi_options |= LEC_REQUIRE_2100HZ_REVERSALS;
if (ec_parms[1].length >= 4)
{
plci->ec_tail_length = GET_WORD(&ec_parms[1].info[3]);
}
}
switch (plci->ec_cmd)
{
case EC_ENABLE_OPERATION:
plci->ec_idi_options &= ~LEC_FREEZE_COEFFICIENTS;
start_internal_command(Id, plci, ec_command);
return (false);
case EC_DISABLE_OPERATION:
plci->ec_idi_options = LEC_ENABLE_ECHO_CANCELLER |
LEC_MANUAL_DISABLE | LEC_ENABLE_NONLINEAR_PROCESSING |
LEC_RESET_COEFFICIENTS;
start_internal_command(Id, plci, ec_command);
return (false);
default:
dbug(1, dprintf("[%06lx] %s,%d: EC unknown request %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, plci->ec_cmd));
PUT_WORD(&result[4], _FACILITY_SPECIFIC_FUNCTION_NOT_SUPP);
}
}
}
}
}
sendf(appl, _FACILITY_R | CONFIRM, Id & 0xffffL, Number,
"wws", Info, (appl->appl_flags & APPL_FLAG_PRIV_EC_SPEC) ?
PRIV_SELECTOR_ECHO_CANCELLER : SELECTOR_ECHO_CANCELLER, result);
return (false);
}
static void ec_indication(dword Id, PLCI *plci, byte *msg, word length)
{
byte result[8];
dbug(1, dprintf("[%06lx] %s,%d: ec_indication",
UnMapId(Id), (char *)(FILE_), __LINE__));
if (!(plci->ec_idi_options & LEC_MANUAL_DISABLE))
{
if (plci->appl->appl_flags & APPL_FLAG_PRIV_EC_SPEC)
{
result[0] = 2;
PUT_WORD(&result[1], 0);
switch (msg[1])
{
case LEC_DISABLE_TYPE_CONTIGNUOUS_2100HZ:
PUT_WORD(&result[1], EC_BYPASS_DUE_TO_CONTINUOUS_2100HZ);
break;
case LEC_DISABLE_TYPE_REVERSED_2100HZ:
PUT_WORD(&result[1], EC_BYPASS_DUE_TO_REVERSED_2100HZ);
break;
case LEC_DISABLE_RELEASED:
PUT_WORD(&result[1], EC_BYPASS_RELEASED);
break;
}
}
else
{
result[0] = 5;
PUT_WORD(&result[1], EC_BYPASS_INDICATION);
result[3] = 2;
PUT_WORD(&result[4], 0);
switch (msg[1])
{
case LEC_DISABLE_TYPE_CONTIGNUOUS_2100HZ:
PUT_WORD(&result[4], EC_BYPASS_DUE_TO_CONTINUOUS_2100HZ);
break;
case LEC_DISABLE_TYPE_REVERSED_2100HZ:
PUT_WORD(&result[4], EC_BYPASS_DUE_TO_REVERSED_2100HZ);
break;
case LEC_DISABLE_RELEASED:
PUT_WORD(&result[4], EC_BYPASS_RELEASED);
break;
}
}
sendf(plci->appl, _FACILITY_I, Id & 0xffffL, 0, "ws", (plci->appl->appl_flags & APPL_FLAG_PRIV_EC_SPEC) ?
PRIV_SELECTOR_ECHO_CANCELLER : SELECTOR_ECHO_CANCELLER, result);
}
}
/*------------------------------------------------------------------*/
/* Advanced voice */
/*------------------------------------------------------------------*/
static void adv_voice_write_coefs(PLCI *plci, word write_command)
{
DIVA_CAPI_ADAPTER *a;
word i;
byte *p;
word w, n, j, k;
byte ch_map[MIXER_CHANNELS_BRI];
byte coef_buffer[ADV_VOICE_COEF_BUFFER_SIZE + 2];
dbug(1, dprintf("[%06lx] %s,%d: adv_voice_write_coefs %d",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__, write_command));
a = plci->adapter;
p = coef_buffer + 1;
*(p++) = DSP_CTRL_OLD_SET_MIXER_COEFFICIENTS;
i = 0;
while (i + sizeof(word) <= a->adv_voice_coef_length)
{
PUT_WORD(p, GET_WORD(a->adv_voice_coef_buffer + i));
p += 2;
i += 2;
}
while (i < ADV_VOICE_OLD_COEF_COUNT * sizeof(word))
{
PUT_WORD(p, 0x8000);
p += 2;
i += 2;
}
if (!a->li_pri && (plci->li_bchannel_id == 0))
{
if ((li_config_table[a->li_base].plci == NULL) && (li_config_table[a->li_base + 1].plci != NULL))
{
plci->li_bchannel_id = 1;
li_config_table[a->li_base].plci = plci;
dbug(1, dprintf("[%06lx] %s,%d: adv_voice_set_bchannel_id %d",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__, plci->li_bchannel_id));
}
else if ((li_config_table[a->li_base].plci != NULL) && (li_config_table[a->li_base + 1].plci == NULL))
{
plci->li_bchannel_id = 2;
li_config_table[a->li_base + 1].plci = plci;
dbug(1, dprintf("[%06lx] %s,%d: adv_voice_set_bchannel_id %d",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__, plci->li_bchannel_id));
}
}
if (!a->li_pri && (plci->li_bchannel_id != 0)
&& (li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci == plci))
{
i = a->li_base + (plci->li_bchannel_id - 1);
switch (write_command)
{
case ADV_VOICE_WRITE_ACTIVATION:
j = a->li_base + MIXER_IC_CHANNEL_BASE + (plci->li_bchannel_id - 1);
k = a->li_base + MIXER_IC_CHANNEL_BASE + (2 - plci->li_bchannel_id);
if (!(plci->B1_facilities & B1_FACILITY_MIXER))
{
li_config_table[j].flag_table[i] |= LI_FLAG_CONFERENCE | LI_FLAG_MIX;
li_config_table[i].flag_table[j] |= LI_FLAG_CONFERENCE | LI_FLAG_MONITOR;
}
if (a->manufacturer_features & MANUFACTURER_FEATURE_SLAVE_CODEC)
{
li_config_table[k].flag_table[i] |= LI_FLAG_CONFERENCE | LI_FLAG_MIX;
li_config_table[i].flag_table[k] |= LI_FLAG_CONFERENCE | LI_FLAG_MONITOR;
li_config_table[k].flag_table[j] |= LI_FLAG_CONFERENCE;
li_config_table[j].flag_table[k] |= LI_FLAG_CONFERENCE;
}
mixer_calculate_coefs(a);
li_config_table[i].curchnl = li_config_table[i].channel;
li_config_table[j].curchnl = li_config_table[j].channel;
if (a->manufacturer_features & MANUFACTURER_FEATURE_SLAVE_CODEC)
li_config_table[k].curchnl = li_config_table[k].channel;
break;
case ADV_VOICE_WRITE_DEACTIVATION:
for (j = 0; j < li_total_channels; j++)
{
li_config_table[i].flag_table[j] = 0;
li_config_table[j].flag_table[i] = 0;
}
k = a->li_base + MIXER_IC_CHANNEL_BASE + (plci->li_bchannel_id - 1);
for (j = 0; j < li_total_channels; j++)
{
li_config_table[k].flag_table[j] = 0;
li_config_table[j].flag_table[k] = 0;
}
if (a->manufacturer_features & MANUFACTURER_FEATURE_SLAVE_CODEC)
{
k = a->li_base + MIXER_IC_CHANNEL_BASE + (2 - plci->li_bchannel_id);
for (j = 0; j < li_total_channels; j++)
{
li_config_table[k].flag_table[j] = 0;
li_config_table[j].flag_table[k] = 0;
}
}
mixer_calculate_coefs(a);
break;
}
if (plci->B1_facilities & B1_FACILITY_MIXER)
{
w = 0;
if (ADV_VOICE_NEW_COEF_BASE + sizeof(word) <= a->adv_voice_coef_length)
w = GET_WORD(a->adv_voice_coef_buffer + ADV_VOICE_NEW_COEF_BASE);
if (li_config_table[i].channel & LI_CHANNEL_TX_DATA)
w |= MIXER_FEATURE_ENABLE_TX_DATA;
if (li_config_table[i].channel & LI_CHANNEL_RX_DATA)
w |= MIXER_FEATURE_ENABLE_RX_DATA;
*(p++) = (byte) w;
*(p++) = (byte)(w >> 8);
for (j = 0; j < sizeof(ch_map); j += 2)
{
ch_map[j] = (byte)(j + (plci->li_bchannel_id - 1));
ch_map[j + 1] = (byte)(j + (2 - plci->li_bchannel_id));
}
for (n = 0; n < ARRAY_SIZE(mixer_write_prog_bri); n++)
{
i = a->li_base + ch_map[mixer_write_prog_bri[n].to_ch];
j = a->li_base + ch_map[mixer_write_prog_bri[n].from_ch];
if (li_config_table[i].channel & li_config_table[j].channel & LI_CHANNEL_INVOLVED)
{
*(p++) = ((li_config_table[i].coef_table[j] & mixer_write_prog_bri[n].mask) ? 0x80 : 0x01);
w = ((li_config_table[i].coef_table[j] & 0xf) ^ (li_config_table[i].coef_table[j] >> 4));
li_config_table[i].coef_table[j] ^= (w & mixer_write_prog_bri[n].mask) << 4;
}
else
{
*(p++) = (ADV_VOICE_NEW_COEF_BASE + sizeof(word) + n < a->adv_voice_coef_length) ?
a->adv_voice_coef_buffer[ADV_VOICE_NEW_COEF_BASE + sizeof(word) + n] : 0x00;
}
}
}
else
{
for (i = ADV_VOICE_NEW_COEF_BASE; i < a->adv_voice_coef_length; i++)
*(p++) = a->adv_voice_coef_buffer[i];
}
}
else
{
for (i = ADV_VOICE_NEW_COEF_BASE; i < a->adv_voice_coef_length; i++)
*(p++) = a->adv_voice_coef_buffer[i];
}
coef_buffer[0] = (p - coef_buffer) - 1;
add_p(plci, FTY, coef_buffer);
sig_req(plci, TEL_CTRL, 0);
send_req(plci);
}
static void adv_voice_clear_config(PLCI *plci)
{
DIVA_CAPI_ADAPTER *a;
word i, j;
dbug(1, dprintf("[%06lx] %s,%d: adv_voice_clear_config",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__));
a = plci->adapter;
if ((plci->tel == ADV_VOICE) && (plci == a->AdvSignalPLCI))
{
a->adv_voice_coef_length = 0;
if (!a->li_pri && (plci->li_bchannel_id != 0)
&& (li_config_table[a->li_base + (plci->li_bchannel_id - 1)].plci == plci))
{
i = a->li_base + (plci->li_bchannel_id - 1);
li_config_table[i].curchnl = 0;
li_config_table[i].channel = 0;
li_config_table[i].chflags = 0;
for (j = 0; j < li_total_channels; j++)
{
li_config_table[i].flag_table[j] = 0;
li_config_table[j].flag_table[i] = 0;
li_config_table[i].coef_table[j] = 0;
li_config_table[j].coef_table[i] = 0;
}
li_config_table[i].coef_table[i] |= LI_COEF_CH_PC_SET | LI_COEF_PC_CH_SET;
i = a->li_base + MIXER_IC_CHANNEL_BASE + (plci->li_bchannel_id - 1);
li_config_table[i].curchnl = 0;
li_config_table[i].channel = 0;
li_config_table[i].chflags = 0;
for (j = 0; j < li_total_channels; j++)
{
li_config_table[i].flag_table[j] = 0;
li_config_table[j].flag_table[i] = 0;
li_config_table[i].coef_table[j] = 0;
li_config_table[j].coef_table[i] = 0;
}
if (a->manufacturer_features & MANUFACTURER_FEATURE_SLAVE_CODEC)
{
i = a->li_base + MIXER_IC_CHANNEL_BASE + (2 - plci->li_bchannel_id);
li_config_table[i].curchnl = 0;
li_config_table[i].channel = 0;
li_config_table[i].chflags = 0;
for (j = 0; j < li_total_channels; j++)
{
li_config_table[i].flag_table[j] = 0;
li_config_table[j].flag_table[i] = 0;
li_config_table[i].coef_table[j] = 0;
li_config_table[j].coef_table[i] = 0;
}
}
}
}
}
static void adv_voice_prepare_switch(dword Id, PLCI *plci)
{
dbug(1, dprintf("[%06lx] %s,%d: adv_voice_prepare_switch",
UnMapId(Id), (char *)(FILE_), __LINE__));
}
static word adv_voice_save_config(dword Id, PLCI *plci, byte Rc)
{
dbug(1, dprintf("[%06lx] %s,%d: adv_voice_save_config %02x %d",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->adjust_b_state));
return (GOOD);
}
static word adv_voice_restore_config(dword Id, PLCI *plci, byte Rc)
{
DIVA_CAPI_ADAPTER *a;
word Info;
dbug(1, dprintf("[%06lx] %s,%d: adv_voice_restore_config %02x %d",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->adjust_b_state));
Info = GOOD;
a = plci->adapter;
if ((plci->B1_facilities & B1_FACILITY_VOICE)
&& (plci->tel == ADV_VOICE) && (plci == a->AdvSignalPLCI))
{
switch (plci->adjust_b_state)
{
case ADJUST_B_RESTORE_VOICE_1:
plci->internal_command = plci->adjust_b_command;
if (plci->sig_req)
{
plci->adjust_b_state = ADJUST_B_RESTORE_VOICE_1;
break;
}
adv_voice_write_coefs(plci, ADV_VOICE_WRITE_UPDATE);
plci->adjust_b_state = ADJUST_B_RESTORE_VOICE_2;
break;
case ADJUST_B_RESTORE_VOICE_2:
if ((Rc != OK) && (Rc != OK_FC))
{
dbug(1, dprintf("[%06lx] %s,%d: Restore voice config failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
Info = _WRONG_STATE;
break;
}
break;
}
}
return (Info);
}
/*------------------------------------------------------------------*/
/* B1 resource switching */
/*------------------------------------------------------------------*/
static byte b1_facilities_table[] =
{
0x00, /* 0 No bchannel resources */
0x00, /* 1 Codec (automatic law) */
0x00, /* 2 Codec (A-law) */
0x00, /* 3 Codec (y-law) */
0x00, /* 4 HDLC for X.21 */
0x00, /* 5 HDLC */
0x00, /* 6 External Device 0 */
0x00, /* 7 External Device 1 */
0x00, /* 8 HDLC 56k */
0x00, /* 9 Transparent */
0x00, /* 10 Loopback to network */
0x00, /* 11 Test pattern to net */
0x00, /* 12 Rate adaptation sync */
0x00, /* 13 Rate adaptation async */
0x00, /* 14 R-Interface */
0x00, /* 15 HDLC 128k leased line */
0x00, /* 16 FAX */
0x00, /* 17 Modem async */
0x00, /* 18 Modem sync HDLC */
0x00, /* 19 V.110 async HDLC */
0x12, /* 20 Adv voice (Trans,mixer) */
0x00, /* 21 Codec connected to IC */
0x0c, /* 22 Trans,DTMF */
0x1e, /* 23 Trans,DTMF+mixer */
0x1f, /* 24 Trans,DTMF+mixer+local */
0x13, /* 25 Trans,mixer+local */
0x12, /* 26 HDLC,mixer */
0x12, /* 27 HDLC 56k,mixer */
0x2c, /* 28 Trans,LEC+DTMF */
0x3e, /* 29 Trans,LEC+DTMF+mixer */
0x3f, /* 30 Trans,LEC+DTMF+mixer+local */
0x2c, /* 31 RTP,LEC+DTMF */
0x3e, /* 32 RTP,LEC+DTMF+mixer */
0x3f, /* 33 RTP,LEC+DTMF+mixer+local */
0x00, /* 34 Signaling task */
0x00, /* 35 PIAFS */
0x0c, /* 36 Trans,DTMF+TONE */
0x1e, /* 37 Trans,DTMF+TONE+mixer */
0x1f /* 38 Trans,DTMF+TONE+mixer+local*/
};
static word get_b1_facilities(PLCI *plci, byte b1_resource)
{
word b1_facilities;
b1_facilities = b1_facilities_table[b1_resource];
if ((b1_resource == 9) || (b1_resource == 20) || (b1_resource == 25))
{
if (!(((plci->requested_options_conn | plci->requested_options) & (1L << PRIVATE_DTMF_TONE))
|| (plci->appl && (plci->adapter->requested_options_table[plci->appl->Id - 1] & (1L << PRIVATE_DTMF_TONE)))))
{
if (plci->adapter->manufacturer_features & MANUFACTURER_FEATURE_SOFTDTMF_SEND)
b1_facilities |= B1_FACILITY_DTMFX;
if (plci->adapter->manufacturer_features & MANUFACTURER_FEATURE_SOFTDTMF_RECEIVE)
b1_facilities |= B1_FACILITY_DTMFR;
}
}
if ((b1_resource == 17) || (b1_resource == 18))
{
if (plci->adapter->manufacturer_features & (MANUFACTURER_FEATURE_V18 | MANUFACTURER_FEATURE_VOWN))
b1_facilities |= B1_FACILITY_DTMFX | B1_FACILITY_DTMFR;
}
/*
dbug (1, dprintf("[%06lx] %s,%d: get_b1_facilities %d %04x",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char far *)(FILE_), __LINE__, b1_resource, b1_facilites));
*/
return (b1_facilities);
}
static byte add_b1_facilities(PLCI *plci, byte b1_resource, word b1_facilities)
{
byte b;
switch (b1_resource)
{
case 5:
case 26:
if (b1_facilities & (B1_FACILITY_MIXER | B1_FACILITY_VOICE))
b = 26;
else
b = 5;
break;
case 8:
case 27:
if (b1_facilities & (B1_FACILITY_MIXER | B1_FACILITY_VOICE))
b = 27;
else
b = 8;
break;
case 9:
case 20:
case 22:
case 23:
case 24:
case 25:
case 28:
case 29:
case 30:
case 36:
case 37:
case 38:
if (b1_facilities & B1_FACILITY_EC)
{
if (b1_facilities & B1_FACILITY_LOCAL)
b = 30;
else if (b1_facilities & (B1_FACILITY_MIXER | B1_FACILITY_VOICE))
b = 29;
else
b = 28;
}
else if ((b1_facilities & (B1_FACILITY_DTMFX | B1_FACILITY_DTMFR | B1_FACILITY_MIXER))
&& (((plci->requested_options_conn | plci->requested_options) & (1L << PRIVATE_DTMF_TONE))
|| (plci->appl && (plci->adapter->requested_options_table[plci->appl->Id - 1] & (1L << PRIVATE_DTMF_TONE)))))
{
if (b1_facilities & B1_FACILITY_LOCAL)
b = 38;
else if (b1_facilities & (B1_FACILITY_MIXER | B1_FACILITY_VOICE))
b = 37;
else
b = 36;
}
else if (((plci->adapter->manufacturer_features & MANUFACTURER_FEATURE_HARDDTMF)
&& !(plci->adapter->manufacturer_features & MANUFACTURER_FEATURE_SOFTDTMF_RECEIVE))
|| ((b1_facilities & B1_FACILITY_DTMFR)
&& ((b1_facilities & B1_FACILITY_MIXER)
|| !(plci->adapter->manufacturer_features & MANUFACTURER_FEATURE_SOFTDTMF_RECEIVE)))
|| ((b1_facilities & B1_FACILITY_DTMFX)
&& ((b1_facilities & B1_FACILITY_MIXER)
|| !(plci->adapter->manufacturer_features & MANUFACTURER_FEATURE_SOFTDTMF_SEND))))
{
if (b1_facilities & B1_FACILITY_LOCAL)
b = 24;
else if (b1_facilities & (B1_FACILITY_MIXER | B1_FACILITY_VOICE))
b = 23;
else
b = 22;
}
else
{
if (b1_facilities & B1_FACILITY_LOCAL)
b = 25;
else if (b1_facilities & (B1_FACILITY_MIXER | B1_FACILITY_VOICE))
b = 20;
else
b = 9;
}
break;
case 31:
case 32:
case 33:
if (b1_facilities & B1_FACILITY_LOCAL)
b = 33;
else if (b1_facilities & (B1_FACILITY_MIXER | B1_FACILITY_VOICE))
b = 32;
else
b = 31;
break;
default:
b = b1_resource;
}
dbug(1, dprintf("[%06lx] %s,%d: add_b1_facilities %d %04x %d %04x",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__,
b1_resource, b1_facilities, b, get_b1_facilities(plci, b)));
return (b);
}
static void adjust_b1_facilities(PLCI *plci, byte new_b1_resource, word new_b1_facilities)
{
word removed_facilities;
dbug(1, dprintf("[%06lx] %s,%d: adjust_b1_facilities %d %04x %04x",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__, new_b1_resource, new_b1_facilities,
new_b1_facilities & get_b1_facilities(plci, new_b1_resource)));
new_b1_facilities &= get_b1_facilities(plci, new_b1_resource);
removed_facilities = plci->B1_facilities & ~new_b1_facilities;
if (removed_facilities & B1_FACILITY_EC)
ec_clear_config(plci);
if (removed_facilities & B1_FACILITY_DTMFR)
{
dtmf_rec_clear_config(plci);
dtmf_parameter_clear_config(plci);
}
if (removed_facilities & B1_FACILITY_DTMFX)
dtmf_send_clear_config(plci);
if (removed_facilities & B1_FACILITY_MIXER)
mixer_clear_config(plci);
if (removed_facilities & B1_FACILITY_VOICE)
adv_voice_clear_config(plci);
plci->B1_facilities = new_b1_facilities;
}
static void adjust_b_clear(PLCI *plci)
{
dbug(1, dprintf("[%06lx] %s,%d: adjust_b_clear",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__));
plci->adjust_b_restore = false;
}
static word adjust_b_process(dword Id, PLCI *plci, byte Rc)
{
word Info;
byte b1_resource;
NCCI *ncci_ptr;
API_PARSE bp[2];
dbug(1, dprintf("[%06lx] %s,%d: adjust_b_process %02x %d",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->adjust_b_state));
Info = GOOD;
switch (plci->adjust_b_state)
{
case ADJUST_B_START:
if ((plci->adjust_b_parms_msg == NULL)
&& (plci->adjust_b_mode & ADJUST_B_MODE_SWITCH_L1)
&& ((plci->adjust_b_mode & ~(ADJUST_B_MODE_SAVE | ADJUST_B_MODE_SWITCH_L1 |
ADJUST_B_MODE_NO_RESOURCE | ADJUST_B_MODE_RESTORE)) == 0))
{
b1_resource = (plci->adjust_b_mode == ADJUST_B_MODE_NO_RESOURCE) ?
0 : add_b1_facilities(plci, plci->B1_resource, plci->adjust_b_facilities);
if (b1_resource == plci->B1_resource)
{
adjust_b1_facilities(plci, b1_resource, plci->adjust_b_facilities);
break;
}
if (plci->adjust_b_facilities & ~get_b1_facilities(plci, b1_resource))
{
dbug(1, dprintf("[%06lx] %s,%d: Adjust B nonsupported facilities %d %d %04x",
UnMapId(Id), (char *)(FILE_), __LINE__,
plci->B1_resource, b1_resource, plci->adjust_b_facilities));
Info = _WRONG_STATE;
break;
}
}
if (plci->adjust_b_mode & ADJUST_B_MODE_SAVE)
{
mixer_prepare_switch(Id, plci);
dtmf_prepare_switch(Id, plci);
dtmf_parameter_prepare_switch(Id, plci);
ec_prepare_switch(Id, plci);
adv_voice_prepare_switch(Id, plci);
}
plci->adjust_b_state = ADJUST_B_SAVE_MIXER_1;
Rc = OK;
case ADJUST_B_SAVE_MIXER_1:
if (plci->adjust_b_mode & ADJUST_B_MODE_SAVE)
{
Info = mixer_save_config(Id, plci, Rc);
if ((Info != GOOD) || plci->internal_command)
break;
}
plci->adjust_b_state = ADJUST_B_SAVE_DTMF_1;
Rc = OK;
case ADJUST_B_SAVE_DTMF_1:
if (plci->adjust_b_mode & ADJUST_B_MODE_SAVE)
{
Info = dtmf_save_config(Id, plci, Rc);
if ((Info != GOOD) || plci->internal_command)
break;
}
plci->adjust_b_state = ADJUST_B_REMOVE_L23_1;
case ADJUST_B_REMOVE_L23_1:
if ((plci->adjust_b_mode & ADJUST_B_MODE_REMOVE_L23)
&& plci->NL.Id && !plci->nl_remove_id)
{
plci->internal_command = plci->adjust_b_command;
if (plci->adjust_b_ncci != 0)
{
ncci_ptr = &(plci->adapter->ncci[plci->adjust_b_ncci]);
while (ncci_ptr->data_pending)
{
plci->data_sent_ptr = ncci_ptr->DBuffer[ncci_ptr->data_out].P;
data_rc(plci, plci->adapter->ncci_ch[plci->adjust_b_ncci]);
}
while (ncci_ptr->data_ack_pending)
data_ack(plci, plci->adapter->ncci_ch[plci->adjust_b_ncci]);
}
nl_req_ncci(plci, REMOVE,
(byte)((plci->adjust_b_mode & ADJUST_B_MODE_CONNECT) ? plci->adjust_b_ncci : 0));
send_req(plci);
plci->adjust_b_state = ADJUST_B_REMOVE_L23_2;
break;
}
plci->adjust_b_state = ADJUST_B_REMOVE_L23_2;
Rc = OK;
case ADJUST_B_REMOVE_L23_2:
if ((Rc != OK) && (Rc != OK_FC))
{
dbug(1, dprintf("[%06lx] %s,%d: Adjust B remove failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
Info = _WRONG_STATE;
break;
}
if (plci->adjust_b_mode & ADJUST_B_MODE_REMOVE_L23)
{
if (plci_nl_busy(plci))
{
plci->internal_command = plci->adjust_b_command;
break;
}
}
plci->adjust_b_state = ADJUST_B_SAVE_EC_1;
Rc = OK;
case ADJUST_B_SAVE_EC_1:
if (plci->adjust_b_mode & ADJUST_B_MODE_SAVE)
{
Info = ec_save_config(Id, plci, Rc);
if ((Info != GOOD) || plci->internal_command)
break;
}
plci->adjust_b_state = ADJUST_B_SAVE_DTMF_PARAMETER_1;
Rc = OK;
case ADJUST_B_SAVE_DTMF_PARAMETER_1:
if (plci->adjust_b_mode & ADJUST_B_MODE_SAVE)
{
Info = dtmf_parameter_save_config(Id, plci, Rc);
if ((Info != GOOD) || plci->internal_command)
break;
}
plci->adjust_b_state = ADJUST_B_SAVE_VOICE_1;
Rc = OK;
case ADJUST_B_SAVE_VOICE_1:
if (plci->adjust_b_mode & ADJUST_B_MODE_SAVE)
{
Info = adv_voice_save_config(Id, plci, Rc);
if ((Info != GOOD) || plci->internal_command)
break;
}
plci->adjust_b_state = ADJUST_B_SWITCH_L1_1;
case ADJUST_B_SWITCH_L1_1:
if (plci->adjust_b_mode & ADJUST_B_MODE_SWITCH_L1)
{
if (plci->sig_req)
{
plci->internal_command = plci->adjust_b_command;
break;
}
if (plci->adjust_b_parms_msg != NULL)
api_load_msg(plci->adjust_b_parms_msg, bp);
else
api_load_msg(&plci->B_protocol, bp);
Info = add_b1(plci, bp,
(word)((plci->adjust_b_mode & ADJUST_B_MODE_NO_RESOURCE) ? 2 : 0),
plci->adjust_b_facilities);
if (Info != GOOD)
{
dbug(1, dprintf("[%06lx] %s,%d: Adjust B invalid L1 parameters %d %04x",
UnMapId(Id), (char *)(FILE_), __LINE__,
plci->B1_resource, plci->adjust_b_facilities));
break;
}
plci->internal_command = plci->adjust_b_command;
sig_req(plci, RESOURCES, 0);
send_req(plci);
plci->adjust_b_state = ADJUST_B_SWITCH_L1_2;
break;
}
plci->adjust_b_state = ADJUST_B_SWITCH_L1_2;
Rc = OK;
case ADJUST_B_SWITCH_L1_2:
if ((Rc != OK) && (Rc != OK_FC))
{
dbug(1, dprintf("[%06lx] %s,%d: Adjust B switch failed %02x %d %04x",
UnMapId(Id), (char *)(FILE_), __LINE__,
Rc, plci->B1_resource, plci->adjust_b_facilities));
Info = _WRONG_STATE;
break;
}
plci->adjust_b_state = ADJUST_B_RESTORE_VOICE_1;
Rc = OK;
case ADJUST_B_RESTORE_VOICE_1:
case ADJUST_B_RESTORE_VOICE_2:
if (plci->adjust_b_mode & ADJUST_B_MODE_RESTORE)
{
Info = adv_voice_restore_config(Id, plci, Rc);
if ((Info != GOOD) || plci->internal_command)
break;
}
plci->adjust_b_state = ADJUST_B_RESTORE_DTMF_PARAMETER_1;
Rc = OK;
case ADJUST_B_RESTORE_DTMF_PARAMETER_1:
case ADJUST_B_RESTORE_DTMF_PARAMETER_2:
if (plci->adjust_b_mode & ADJUST_B_MODE_RESTORE)
{
Info = dtmf_parameter_restore_config(Id, plci, Rc);
if ((Info != GOOD) || plci->internal_command)
break;
}
plci->adjust_b_state = ADJUST_B_RESTORE_EC_1;
Rc = OK;
case ADJUST_B_RESTORE_EC_1:
case ADJUST_B_RESTORE_EC_2:
if (plci->adjust_b_mode & ADJUST_B_MODE_RESTORE)
{
Info = ec_restore_config(Id, plci, Rc);
if ((Info != GOOD) || plci->internal_command)
break;
}
plci->adjust_b_state = ADJUST_B_ASSIGN_L23_1;
case ADJUST_B_ASSIGN_L23_1:
if (plci->adjust_b_mode & ADJUST_B_MODE_ASSIGN_L23)
{
if (plci_nl_busy(plci))
{
plci->internal_command = plci->adjust_b_command;
break;
}
if (plci->adjust_b_mode & ADJUST_B_MODE_CONNECT)
plci->call_dir |= CALL_DIR_FORCE_OUTG_NL;
if (plci->adjust_b_parms_msg != NULL)
api_load_msg(plci->adjust_b_parms_msg, bp);
else
api_load_msg(&plci->B_protocol, bp);
Info = add_b23(plci, bp);
if (Info != GOOD)
{
dbug(1, dprintf("[%06lx] %s,%d: Adjust B invalid L23 parameters %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, Info));
break;
}
plci->internal_command = plci->adjust_b_command;
nl_req_ncci(plci, ASSIGN, 0);
send_req(plci);
plci->adjust_b_state = ADJUST_B_ASSIGN_L23_2;
break;
}
plci->adjust_b_state = ADJUST_B_ASSIGN_L23_2;
Rc = ASSIGN_OK;
case ADJUST_B_ASSIGN_L23_2:
if ((Rc != OK) && (Rc != OK_FC) && (Rc != ASSIGN_OK))
{
dbug(1, dprintf("[%06lx] %s,%d: Adjust B assign failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
Info = _WRONG_STATE;
break;
}
if (plci->adjust_b_mode & ADJUST_B_MODE_ASSIGN_L23)
{
if (Rc != ASSIGN_OK)
{
plci->internal_command = plci->adjust_b_command;
break;
}
}
if (plci->adjust_b_mode & ADJUST_B_MODE_USER_CONNECT)
{
plci->adjust_b_restore = true;
break;
}
plci->adjust_b_state = ADJUST_B_CONNECT_1;
case ADJUST_B_CONNECT_1:
if (plci->adjust_b_mode & ADJUST_B_MODE_CONNECT)
{
plci->internal_command = plci->adjust_b_command;
if (plci_nl_busy(plci))
break;
nl_req_ncci(plci, N_CONNECT, 0);
send_req(plci);
plci->adjust_b_state = ADJUST_B_CONNECT_2;
break;
}
plci->adjust_b_state = ADJUST_B_RESTORE_DTMF_1;
Rc = OK;
case ADJUST_B_CONNECT_2:
case ADJUST_B_CONNECT_3:
case ADJUST_B_CONNECT_4:
if ((Rc != OK) && (Rc != OK_FC) && (Rc != 0))
{
dbug(1, dprintf("[%06lx] %s,%d: Adjust B connect failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
Info = _WRONG_STATE;
break;
}
if (Rc == OK)
{
if (plci->adjust_b_mode & ADJUST_B_MODE_CONNECT)
{
get_ncci(plci, (byte)(Id >> 16), plci->adjust_b_ncci);
Id = (Id & 0xffff) | (((dword)(plci->adjust_b_ncci)) << 16);
}
if (plci->adjust_b_state == ADJUST_B_CONNECT_2)
plci->adjust_b_state = ADJUST_B_CONNECT_3;
else if (plci->adjust_b_state == ADJUST_B_CONNECT_4)
plci->adjust_b_state = ADJUST_B_RESTORE_DTMF_1;
}
else if (Rc == 0)
{
if (plci->adjust_b_state == ADJUST_B_CONNECT_2)
plci->adjust_b_state = ADJUST_B_CONNECT_4;
else if (plci->adjust_b_state == ADJUST_B_CONNECT_3)
plci->adjust_b_state = ADJUST_B_RESTORE_DTMF_1;
}
if (plci->adjust_b_state != ADJUST_B_RESTORE_DTMF_1)
{
plci->internal_command = plci->adjust_b_command;
break;
}
Rc = OK;
case ADJUST_B_RESTORE_DTMF_1:
case ADJUST_B_RESTORE_DTMF_2:
if (plci->adjust_b_mode & ADJUST_B_MODE_RESTORE)
{
Info = dtmf_restore_config(Id, plci, Rc);
if ((Info != GOOD) || plci->internal_command)
break;
}
plci->adjust_b_state = ADJUST_B_RESTORE_MIXER_1;
Rc = OK;
case ADJUST_B_RESTORE_MIXER_1:
case ADJUST_B_RESTORE_MIXER_2:
case ADJUST_B_RESTORE_MIXER_3:
case ADJUST_B_RESTORE_MIXER_4:
case ADJUST_B_RESTORE_MIXER_5:
case ADJUST_B_RESTORE_MIXER_6:
case ADJUST_B_RESTORE_MIXER_7:
if (plci->adjust_b_mode & ADJUST_B_MODE_RESTORE)
{
Info = mixer_restore_config(Id, plci, Rc);
if ((Info != GOOD) || plci->internal_command)
break;
}
plci->adjust_b_state = ADJUST_B_END;
case ADJUST_B_END:
break;
}
return (Info);
}
static void adjust_b1_resource(dword Id, PLCI *plci, API_SAVE *bp_msg, word b1_facilities, word internal_command)
{
dbug(1, dprintf("[%06lx] %s,%d: adjust_b1_resource %d %04x",
UnMapId(Id), (char *)(FILE_), __LINE__,
plci->B1_resource, b1_facilities));
plci->adjust_b_parms_msg = bp_msg;
plci->adjust_b_facilities = b1_facilities;
plci->adjust_b_command = internal_command;
plci->adjust_b_ncci = (word)(Id >> 16);
if ((bp_msg == NULL) && (plci->B1_resource == 0))
plci->adjust_b_mode = ADJUST_B_MODE_SAVE | ADJUST_B_MODE_NO_RESOURCE | ADJUST_B_MODE_SWITCH_L1;
else
plci->adjust_b_mode = ADJUST_B_MODE_SAVE | ADJUST_B_MODE_SWITCH_L1 | ADJUST_B_MODE_RESTORE;
plci->adjust_b_state = ADJUST_B_START;
dbug(1, dprintf("[%06lx] %s,%d: Adjust B1 resource %d %04x...",
UnMapId(Id), (char *)(FILE_), __LINE__,
plci->B1_resource, b1_facilities));
}
static void adjust_b_restore(dword Id, PLCI *plci, byte Rc)
{
word internal_command;
dbug(1, dprintf("[%06lx] %s,%d: adjust_b_restore %02x %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->internal_command));
internal_command = plci->internal_command;
plci->internal_command = 0;
switch (internal_command)
{
default:
plci->command = 0;
if (plci->req_in != 0)
{
plci->internal_command = ADJUST_B_RESTORE_1;
break;
}
Rc = OK;
case ADJUST_B_RESTORE_1:
if ((Rc != OK) && (Rc != OK_FC))
{
dbug(1, dprintf("[%06lx] %s,%d: Adjust B enqueued failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
}
plci->adjust_b_parms_msg = NULL;
plci->adjust_b_facilities = plci->B1_facilities;
plci->adjust_b_command = ADJUST_B_RESTORE_2;
plci->adjust_b_ncci = (word)(Id >> 16);
plci->adjust_b_mode = ADJUST_B_MODE_RESTORE;
plci->adjust_b_state = ADJUST_B_START;
dbug(1, dprintf("[%06lx] %s,%d: Adjust B restore...",
UnMapId(Id), (char *)(FILE_), __LINE__));
case ADJUST_B_RESTORE_2:
if (adjust_b_process(Id, plci, Rc) != GOOD)
{
dbug(1, dprintf("[%06lx] %s,%d: Adjust B restore failed",
UnMapId(Id), (char *)(FILE_), __LINE__));
}
if (plci->internal_command)
break;
break;
}
}
static void reset_b3_command(dword Id, PLCI *plci, byte Rc)
{
word Info;
word internal_command;
dbug(1, dprintf("[%06lx] %s,%d: reset_b3_command %02x %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->internal_command));
Info = GOOD;
internal_command = plci->internal_command;
plci->internal_command = 0;
switch (internal_command)
{
default:
plci->command = 0;
plci->adjust_b_parms_msg = NULL;
plci->adjust_b_facilities = plci->B1_facilities;
plci->adjust_b_command = RESET_B3_COMMAND_1;
plci->adjust_b_ncci = (word)(Id >> 16);
plci->adjust_b_mode = ADJUST_B_MODE_REMOVE_L23 | ADJUST_B_MODE_ASSIGN_L23 | ADJUST_B_MODE_CONNECT;
plci->adjust_b_state = ADJUST_B_START;
dbug(1, dprintf("[%06lx] %s,%d: Reset B3...",
UnMapId(Id), (char *)(FILE_), __LINE__));
case RESET_B3_COMMAND_1:
Info = adjust_b_process(Id, plci, Rc);
if (Info != GOOD)
{
dbug(1, dprintf("[%06lx] %s,%d: Reset failed",
UnMapId(Id), (char *)(FILE_), __LINE__));
break;
}
if (plci->internal_command)
return;
break;
}
/* sendf (plci->appl, _RESET_B3_R | CONFIRM, Id, plci->number, "w", Info);*/
sendf(plci->appl, _RESET_B3_I, Id, 0, "s", "");
}
static void select_b_command(dword Id, PLCI *plci, byte Rc)
{
word Info;
word internal_command;
byte esc_chi[3];
dbug(1, dprintf("[%06lx] %s,%d: select_b_command %02x %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->internal_command));
Info = GOOD;
internal_command = plci->internal_command;
plci->internal_command = 0;
switch (internal_command)
{
default:
plci->command = 0;
plci->adjust_b_parms_msg = &plci->saved_msg;
if ((plci->tel == ADV_VOICE) && (plci == plci->adapter->AdvSignalPLCI))
plci->adjust_b_facilities = plci->B1_facilities | B1_FACILITY_VOICE;
else
plci->adjust_b_facilities = plci->B1_facilities & ~B1_FACILITY_VOICE;
plci->adjust_b_command = SELECT_B_COMMAND_1;
plci->adjust_b_ncci = (word)(Id >> 16);
if (plci->saved_msg.parms[0].length == 0)
{
plci->adjust_b_mode = ADJUST_B_MODE_SAVE | ADJUST_B_MODE_REMOVE_L23 | ADJUST_B_MODE_SWITCH_L1 |
ADJUST_B_MODE_NO_RESOURCE;
}
else
{
plci->adjust_b_mode = ADJUST_B_MODE_SAVE | ADJUST_B_MODE_REMOVE_L23 | ADJUST_B_MODE_SWITCH_L1 |
ADJUST_B_MODE_ASSIGN_L23 | ADJUST_B_MODE_USER_CONNECT | ADJUST_B_MODE_RESTORE;
}
plci->adjust_b_state = ADJUST_B_START;
dbug(1, dprintf("[%06lx] %s,%d: Select B protocol...",
UnMapId(Id), (char *)(FILE_), __LINE__));
case SELECT_B_COMMAND_1:
Info = adjust_b_process(Id, plci, Rc);
if (Info != GOOD)
{
dbug(1, dprintf("[%06lx] %s,%d: Select B protocol failed",
UnMapId(Id), (char *)(FILE_), __LINE__));
break;
}
if (plci->internal_command)
return;
if (plci->tel == ADV_VOICE)
{
esc_chi[0] = 0x02;
esc_chi[1] = 0x18;
esc_chi[2] = plci->b_channel;
SetVoiceChannel(plci->adapter->AdvCodecPLCI, esc_chi, plci->adapter);
}
break;
}
sendf(plci->appl, _SELECT_B_REQ | CONFIRM, Id, plci->number, "w", Info);
}
static void fax_connect_ack_command(dword Id, PLCI *plci, byte Rc)
{
word internal_command;
dbug(1, dprintf("[%06lx] %s,%d: fax_connect_ack_command %02x %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->internal_command));
internal_command = plci->internal_command;
plci->internal_command = 0;
switch (internal_command)
{
default:
plci->command = 0;
case FAX_CONNECT_ACK_COMMAND_1:
if (plci_nl_busy(plci))
{
plci->internal_command = FAX_CONNECT_ACK_COMMAND_1;
return;
}
plci->internal_command = FAX_CONNECT_ACK_COMMAND_2;
plci->NData[0].P = plci->fax_connect_info_buffer;
plci->NData[0].PLength = plci->fax_connect_info_length;
plci->NL.X = plci->NData;
plci->NL.ReqCh = 0;
plci->NL.Req = plci->nl_req = (byte) N_CONNECT_ACK;
plci->adapter->request(&plci->NL);
return;
case FAX_CONNECT_ACK_COMMAND_2:
if ((Rc != OK) && (Rc != OK_FC))
{
dbug(1, dprintf("[%06lx] %s,%d: FAX issue CONNECT ACK failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
break;
}
}
if ((plci->ncpi_state & NCPI_VALID_CONNECT_B3_ACT)
&& !(plci->ncpi_state & NCPI_CONNECT_B3_ACT_SENT))
{
if (plci->B3_prot == 4)
sendf(plci->appl, _CONNECT_B3_ACTIVE_I, Id, 0, "s", "");
else
sendf(plci->appl, _CONNECT_B3_ACTIVE_I, Id, 0, "S", plci->ncpi_buffer);
plci->ncpi_state |= NCPI_CONNECT_B3_ACT_SENT;
}
}
static void fax_edata_ack_command(dword Id, PLCI *plci, byte Rc)
{
word internal_command;
dbug(1, dprintf("[%06lx] %s,%d: fax_edata_ack_command %02x %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->internal_command));
internal_command = plci->internal_command;
plci->internal_command = 0;
switch (internal_command)
{
default:
plci->command = 0;
case FAX_EDATA_ACK_COMMAND_1:
if (plci_nl_busy(plci))
{
plci->internal_command = FAX_EDATA_ACK_COMMAND_1;
return;
}
plci->internal_command = FAX_EDATA_ACK_COMMAND_2;
plci->NData[0].P = plci->fax_connect_info_buffer;
plci->NData[0].PLength = plci->fax_edata_ack_length;
plci->NL.X = plci->NData;
plci->NL.ReqCh = 0;
plci->NL.Req = plci->nl_req = (byte) N_EDATA;
plci->adapter->request(&plci->NL);
return;
case FAX_EDATA_ACK_COMMAND_2:
if ((Rc != OK) && (Rc != OK_FC))
{
dbug(1, dprintf("[%06lx] %s,%d: FAX issue EDATA ACK failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
break;
}
}
}
static void fax_connect_info_command(dword Id, PLCI *plci, byte Rc)
{
word Info;
word internal_command;
dbug(1, dprintf("[%06lx] %s,%d: fax_connect_info_command %02x %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->internal_command));
Info = GOOD;
internal_command = plci->internal_command;
plci->internal_command = 0;
switch (internal_command)
{
default:
plci->command = 0;
case FAX_CONNECT_INFO_COMMAND_1:
if (plci_nl_busy(plci))
{
plci->internal_command = FAX_CONNECT_INFO_COMMAND_1;
return;
}
plci->internal_command = FAX_CONNECT_INFO_COMMAND_2;
plci->NData[0].P = plci->fax_connect_info_buffer;
plci->NData[0].PLength = plci->fax_connect_info_length;
plci->NL.X = plci->NData;
plci->NL.ReqCh = 0;
plci->NL.Req = plci->nl_req = (byte) N_EDATA;
plci->adapter->request(&plci->NL);
return;
case FAX_CONNECT_INFO_COMMAND_2:
if ((Rc != OK) && (Rc != OK_FC))
{
dbug(1, dprintf("[%06lx] %s,%d: FAX setting connect info failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
Info = _WRONG_STATE;
break;
}
if (plci_nl_busy(plci))
{
plci->internal_command = FAX_CONNECT_INFO_COMMAND_2;
return;
}
plci->command = _CONNECT_B3_R;
nl_req_ncci(plci, N_CONNECT, 0);
send_req(plci);
return;
}
sendf(plci->appl, _CONNECT_B3_R | CONFIRM, Id, plci->number, "w", Info);
}
static void fax_adjust_b23_command(dword Id, PLCI *plci, byte Rc)
{
word Info;
word internal_command;
dbug(1, dprintf("[%06lx] %s,%d: fax_adjust_b23_command %02x %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->internal_command));
Info = GOOD;
internal_command = plci->internal_command;
plci->internal_command = 0;
switch (internal_command)
{
default:
plci->command = 0;
plci->adjust_b_parms_msg = NULL;
plci->adjust_b_facilities = plci->B1_facilities;
plci->adjust_b_command = FAX_ADJUST_B23_COMMAND_1;
plci->adjust_b_ncci = (word)(Id >> 16);
plci->adjust_b_mode = ADJUST_B_MODE_REMOVE_L23 | ADJUST_B_MODE_ASSIGN_L23;
plci->adjust_b_state = ADJUST_B_START;
dbug(1, dprintf("[%06lx] %s,%d: FAX adjust B23...",
UnMapId(Id), (char *)(FILE_), __LINE__));
case FAX_ADJUST_B23_COMMAND_1:
Info = adjust_b_process(Id, plci, Rc);
if (Info != GOOD)
{
dbug(1, dprintf("[%06lx] %s,%d: FAX adjust failed",
UnMapId(Id), (char *)(FILE_), __LINE__));
break;
}
if (plci->internal_command)
return;
case FAX_ADJUST_B23_COMMAND_2:
if (plci_nl_busy(plci))
{
plci->internal_command = FAX_ADJUST_B23_COMMAND_2;
return;
}
plci->command = _CONNECT_B3_R;
nl_req_ncci(plci, N_CONNECT, 0);
send_req(plci);
return;
}
sendf(plci->appl, _CONNECT_B3_R | CONFIRM, Id, plci->number, "w", Info);
}
static void fax_disconnect_command(dword Id, PLCI *plci, byte Rc)
{
word internal_command;
dbug(1, dprintf("[%06lx] %s,%d: fax_disconnect_command %02x %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->internal_command));
internal_command = plci->internal_command;
plci->internal_command = 0;
switch (internal_command)
{
default:
plci->command = 0;
plci->internal_command = FAX_DISCONNECT_COMMAND_1;
return;
case FAX_DISCONNECT_COMMAND_1:
case FAX_DISCONNECT_COMMAND_2:
case FAX_DISCONNECT_COMMAND_3:
if ((Rc != OK) && (Rc != OK_FC) && (Rc != 0))
{
dbug(1, dprintf("[%06lx] %s,%d: FAX disconnect EDATA failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
break;
}
if (Rc == OK)
{
if ((internal_command == FAX_DISCONNECT_COMMAND_1)
|| (internal_command == FAX_DISCONNECT_COMMAND_2))
{
plci->internal_command = FAX_DISCONNECT_COMMAND_2;
}
}
else if (Rc == 0)
{
if (internal_command == FAX_DISCONNECT_COMMAND_1)
plci->internal_command = FAX_DISCONNECT_COMMAND_3;
}
return;
}
}
static void rtp_connect_b3_req_command(dword Id, PLCI *plci, byte Rc)
{
word Info;
word internal_command;
dbug(1, dprintf("[%06lx] %s,%d: rtp_connect_b3_req_command %02x %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->internal_command));
Info = GOOD;
internal_command = plci->internal_command;
plci->internal_command = 0;
switch (internal_command)
{
default:
plci->command = 0;
case RTP_CONNECT_B3_REQ_COMMAND_1:
if (plci_nl_busy(plci))
{
plci->internal_command = RTP_CONNECT_B3_REQ_COMMAND_1;
return;
}
plci->internal_command = RTP_CONNECT_B3_REQ_COMMAND_2;
nl_req_ncci(plci, N_CONNECT, 0);
send_req(plci);
return;
case RTP_CONNECT_B3_REQ_COMMAND_2:
if ((Rc != OK) && (Rc != OK_FC))
{
dbug(1, dprintf("[%06lx] %s,%d: RTP setting connect info failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
Info = _WRONG_STATE;
break;
}
if (plci_nl_busy(plci))
{
plci->internal_command = RTP_CONNECT_B3_REQ_COMMAND_2;
return;
}
plci->internal_command = RTP_CONNECT_B3_REQ_COMMAND_3;
plci->NData[0].PLength = plci->internal_req_buffer[0];
plci->NData[0].P = plci->internal_req_buffer + 1;
plci->NL.X = plci->NData;
plci->NL.ReqCh = 0;
plci->NL.Req = plci->nl_req = (byte) N_UDATA;
plci->adapter->request(&plci->NL);
break;
case RTP_CONNECT_B3_REQ_COMMAND_3:
return;
}
sendf(plci->appl, _CONNECT_B3_R | CONFIRM, Id, plci->number, "w", Info);
}
static void rtp_connect_b3_res_command(dword Id, PLCI *plci, byte Rc)
{
word internal_command;
dbug(1, dprintf("[%06lx] %s,%d: rtp_connect_b3_res_command %02x %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->internal_command));
internal_command = plci->internal_command;
plci->internal_command = 0;
switch (internal_command)
{
default:
plci->command = 0;
case RTP_CONNECT_B3_RES_COMMAND_1:
if (plci_nl_busy(plci))
{
plci->internal_command = RTP_CONNECT_B3_RES_COMMAND_1;
return;
}
plci->internal_command = RTP_CONNECT_B3_RES_COMMAND_2;
nl_req_ncci(plci, N_CONNECT_ACK, (byte)(Id >> 16));
send_req(plci);
return;
case RTP_CONNECT_B3_RES_COMMAND_2:
if ((Rc != OK) && (Rc != OK_FC))
{
dbug(1, dprintf("[%06lx] %s,%d: RTP setting connect resp info failed %02x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc));
break;
}
if (plci_nl_busy(plci))
{
plci->internal_command = RTP_CONNECT_B3_RES_COMMAND_2;
return;
}
sendf(plci->appl, _CONNECT_B3_ACTIVE_I, Id, 0, "s", "");
plci->internal_command = RTP_CONNECT_B3_RES_COMMAND_3;
plci->NData[0].PLength = plci->internal_req_buffer[0];
plci->NData[0].P = plci->internal_req_buffer + 1;
plci->NL.X = plci->NData;
plci->NL.ReqCh = 0;
plci->NL.Req = plci->nl_req = (byte) N_UDATA;
plci->adapter->request(&plci->NL);
return;
case RTP_CONNECT_B3_RES_COMMAND_3:
return;
}
}
static void hold_save_command(dword Id, PLCI *plci, byte Rc)
{
byte SS_Ind[] = "\x05\x02\x00\x02\x00\x00"; /* Hold_Ind struct*/
word Info;
word internal_command;
dbug(1, dprintf("[%06lx] %s,%d: hold_save_command %02x %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->internal_command));
Info = GOOD;
internal_command = plci->internal_command;
plci->internal_command = 0;
switch (internal_command)
{
default:
if (!plci->NL.Id)
break;
plci->command = 0;
plci->adjust_b_parms_msg = NULL;
plci->adjust_b_facilities = plci->B1_facilities;
plci->adjust_b_command = HOLD_SAVE_COMMAND_1;
plci->adjust_b_ncci = (word)(Id >> 16);
plci->adjust_b_mode = ADJUST_B_MODE_SAVE | ADJUST_B_MODE_REMOVE_L23;
plci->adjust_b_state = ADJUST_B_START;
dbug(1, dprintf("[%06lx] %s,%d: HOLD save...",
UnMapId(Id), (char *)(FILE_), __LINE__));
case HOLD_SAVE_COMMAND_1:
Info = adjust_b_process(Id, plci, Rc);
if (Info != GOOD)
{
dbug(1, dprintf("[%06lx] %s,%d: HOLD save failed",
UnMapId(Id), (char *)(FILE_), __LINE__));
break;
}
if (plci->internal_command)
return;
}
sendf(plci->appl, _FACILITY_I, Id & 0xffffL, 0, "ws", 3, SS_Ind);
}
static void retrieve_restore_command(dword Id, PLCI *plci, byte Rc)
{
byte SS_Ind[] = "\x05\x03\x00\x02\x00\x00"; /* Retrieve_Ind struct*/
word Info;
word internal_command;
dbug(1, dprintf("[%06lx] %s,%d: retrieve_restore_command %02x %04x",
UnMapId(Id), (char *)(FILE_), __LINE__, Rc, plci->internal_command));
Info = GOOD;
internal_command = plci->internal_command;
plci->internal_command = 0;
switch (internal_command)
{
default:
plci->command = 0;
plci->adjust_b_parms_msg = NULL;
plci->adjust_b_facilities = plci->B1_facilities;
plci->adjust_b_command = RETRIEVE_RESTORE_COMMAND_1;
plci->adjust_b_ncci = (word)(Id >> 16);
plci->adjust_b_mode = ADJUST_B_MODE_ASSIGN_L23 | ADJUST_B_MODE_USER_CONNECT | ADJUST_B_MODE_RESTORE;
plci->adjust_b_state = ADJUST_B_START;
dbug(1, dprintf("[%06lx] %s,%d: RETRIEVE restore...",
UnMapId(Id), (char *)(FILE_), __LINE__));
case RETRIEVE_RESTORE_COMMAND_1:
Info = adjust_b_process(Id, plci, Rc);
if (Info != GOOD)
{
dbug(1, dprintf("[%06lx] %s,%d: RETRIEVE restore failed",
UnMapId(Id), (char *)(FILE_), __LINE__));
break;
}
if (plci->internal_command)
return;
}
sendf(plci->appl, _FACILITY_I, Id & 0xffffL, 0, "ws", 3, SS_Ind);
}
static void init_b1_config(PLCI *plci)
{
dbug(1, dprintf("[%06lx] %s,%d: init_b1_config",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__));
plci->B1_resource = 0;
plci->B1_facilities = 0;
plci->li_bchannel_id = 0;
mixer_clear_config(plci);
ec_clear_config(plci);
dtmf_rec_clear_config(plci);
dtmf_send_clear_config(plci);
dtmf_parameter_clear_config(plci);
adv_voice_clear_config(plci);
adjust_b_clear(plci);
}
static void clear_b1_config(PLCI *plci)
{
dbug(1, dprintf("[%06lx] %s,%d: clear_b1_config",
(dword)((plci->Id << 8) | UnMapController(plci->adapter->Id)),
(char *)(FILE_), __LINE__));
adv_voice_clear_config(plci);
adjust_b_clear(plci);
ec_clear_config(plci);
dtmf_rec_clear_config(plci);
dtmf_send_clear_config(plci);
dtmf_parameter_clear_config(plci);
if ((plci->li_bchannel_id != 0)
&& (li_config_table[plci->adapter->li_base + (plci->li_bchannel_id - 1)].plci == plci))
{
mixer_clear_config(plci);
li_config_table[plci->adapter->li_base + (plci->li_bchannel_id - 1)].plci = NULL;
plci->li_bchannel_id = 0;
}
plci->B1_resource = 0;
plci->B1_facilities = 0;
}
/* -----------------------------------------------------------------
XON protocol local helpers
----------------------------------------------------------------- */
static void channel_flow_control_remove(PLCI *plci) {
DIVA_CAPI_ADAPTER *a = plci->adapter;
word i;
for (i = 1; i < MAX_NL_CHANNEL + 1; i++) {
if (a->ch_flow_plci[i] == plci->Id) {
a->ch_flow_plci[i] = 0;
a->ch_flow_control[i] = 0;
}
}
}
static void channel_x_on(PLCI *plci, byte ch) {
DIVA_CAPI_ADAPTER *a = plci->adapter;
if (a->ch_flow_control[ch] & N_XON_SENT) {
a->ch_flow_control[ch] &= ~N_XON_SENT;
}
}
static void channel_x_off(PLCI *plci, byte ch, byte flag) {
DIVA_CAPI_ADAPTER *a = plci->adapter;
if ((a->ch_flow_control[ch] & N_RX_FLOW_CONTROL_MASK) == 0) {
a->ch_flow_control[ch] |= (N_CH_XOFF | flag);
a->ch_flow_plci[ch] = plci->Id;
a->ch_flow_control_pending++;
}
}
static void channel_request_xon(PLCI *plci, byte ch) {
DIVA_CAPI_ADAPTER *a = plci->adapter;
if (a->ch_flow_control[ch] & N_CH_XOFF) {
a->ch_flow_control[ch] |= N_XON_REQ;
a->ch_flow_control[ch] &= ~N_CH_XOFF;
a->ch_flow_control[ch] &= ~N_XON_CONNECT_IND;
}
}
static void channel_xmit_extended_xon(PLCI *plci) {
DIVA_CAPI_ADAPTER *a;
int max_ch = ARRAY_SIZE(a->ch_flow_control);
int i, one_requested = 0;
if ((!plci) || (!plci->Id) || ((a = plci->adapter) == NULL)) {
return;
}
for (i = 0; i < max_ch; i++) {
if ((a->ch_flow_control[i] & N_CH_XOFF) &&
(a->ch_flow_control[i] & N_XON_CONNECT_IND) &&
(plci->Id == a->ch_flow_plci[i])) {
channel_request_xon(plci, (byte)i);
one_requested = 1;
}
}
if (one_requested) {
channel_xmit_xon(plci);
}
}
/*
Try to xmit next X_ON
*/
static int find_channel_with_pending_x_on(DIVA_CAPI_ADAPTER *a, PLCI *plci) {
int max_ch = ARRAY_SIZE(a->ch_flow_control);
int i;
if (!(plci->adapter->manufacturer_features & MANUFACTURER_FEATURE_XONOFF_FLOW_CONTROL)) {
return (0);
}
if (a->last_flow_control_ch >= max_ch) {
a->last_flow_control_ch = 1;
}
for (i = a->last_flow_control_ch; i < max_ch; i++) {
if ((a->ch_flow_control[i] & N_XON_REQ) &&
(plci->Id == a->ch_flow_plci[i])) {
a->last_flow_control_ch = i + 1;
return (i);
}
}
for (i = 1; i < a->last_flow_control_ch; i++) {
if ((a->ch_flow_control[i] & N_XON_REQ) &&
(plci->Id == a->ch_flow_plci[i])) {
a->last_flow_control_ch = i + 1;
return (i);
}
}
return (0);
}
static void channel_xmit_xon(PLCI *plci) {
DIVA_CAPI_ADAPTER *a = plci->adapter;
byte ch;
if (plci->nl_req || !plci->NL.Id || plci->nl_remove_id) {
return;
}
if ((ch = (byte)find_channel_with_pending_x_on(a, plci)) == 0) {
return;
}
a->ch_flow_control[ch] &= ~N_XON_REQ;
a->ch_flow_control[ch] |= N_XON_SENT;
plci->NL.Req = plci->nl_req = (byte)N_XON;
plci->NL.ReqCh = ch;
plci->NL.X = plci->NData;
plci->NL.XNum = 1;
plci->NData[0].P = &plci->RBuffer[0];
plci->NData[0].PLength = 0;
plci->adapter->request(&plci->NL);
}
static int channel_can_xon(PLCI *plci, byte ch) {
APPL *APPLptr;
DIVA_CAPI_ADAPTER *a;
word NCCIcode;
dword count;
word Num;
word i;
APPLptr = plci->appl;
a = plci->adapter;
if (!APPLptr)
return (0);
NCCIcode = a->ch_ncci[ch] | (((word) a->Id) << 8);
/* count all buffers within the Application pool */
/* belonging to the same NCCI. XON if a first is */
/* used. */
count = 0;
Num = 0xffff;
for (i = 0; i < APPLptr->MaxBuffer; i++) {
if (NCCIcode == APPLptr->DataNCCI[i]) count++;
if (!APPLptr->DataNCCI[i] && Num == 0xffff) Num = i;
}
if ((count > 2) || (Num == 0xffff)) {
return (0);
}
return (1);
}
/*------------------------------------------------------------------*/
static word CPN_filter_ok(byte *cpn, DIVA_CAPI_ADAPTER *a, word offset)
{
return 1;
}
/**********************************************************************************/
/* function groups the listening applications according to the CIP mask and the */
/* Info_Mask. Each group gets just one Connect_Ind. Some application manufacturer */
/* are not multi-instance capable, so they start e.g. 30 applications what causes */
/* big problems on application level (one call, 30 Connect_Ind, ect). The */
/* function must be enabled by setting "a->group_optimization_enabled" from the */
/* OS specific part (per adapter). */
/**********************************************************************************/
static void group_optimization(DIVA_CAPI_ADAPTER *a, PLCI *plci)
{
word i, j, k, busy, group_found;
dword info_mask_group[MAX_CIP_TYPES];
dword cip_mask_group[MAX_CIP_TYPES];
word appl_number_group_type[MAX_APPL];
PLCI *auxplci;
set_group_ind_mask(plci); /* all APPLs within this inc. call are allowed to dial in */
if (!a->group_optimization_enabled)
{
dbug(1, dprintf("No group optimization"));
return;
}
dbug(1, dprintf("Group optimization = 0x%x...", a->group_optimization_enabled));
for (i = 0; i < MAX_CIP_TYPES; i++)
{
info_mask_group[i] = 0;
cip_mask_group[i] = 0;
}
for (i = 0; i < MAX_APPL; i++)
{
appl_number_group_type[i] = 0;
}
for (i = 0; i < max_appl; i++) /* check if any multi instance capable application is present */
{ /* group_optimization set to 1 means not to optimize multi-instance capable applications (default) */
if (application[i].Id && (application[i].MaxNCCI) > 1 && (a->CIP_Mask[i]) && (a->group_optimization_enabled == 1))
{
dbug(1, dprintf("Multi-Instance capable, no optimization required"));
return; /* allow good application unfiltered access */
}
}
for (i = 0; i < max_appl; i++) /* Build CIP Groups */
{
if (application[i].Id && a->CIP_Mask[i])
{
for (k = 0, busy = false; k < a->max_plci; k++)
{
if (a->plci[k].Id)
{
auxplci = &a->plci[k];
if (auxplci->appl == &application[i]) /* application has a busy PLCI */
{
busy = true;
dbug(1, dprintf("Appl 0x%x is busy", i + 1));
}
else if (test_c_ind_mask_bit(auxplci, i)) /* application has an incoming call pending */
{
busy = true;
dbug(1, dprintf("Appl 0x%x has inc. call pending", i + 1));
}
}
}
for (j = 0, group_found = 0; j <= (MAX_CIP_TYPES) && !busy && !group_found; j++) /* build groups with free applications only */
{
if (j == MAX_CIP_TYPES) /* all groups are in use but group still not found */
{ /* the MAX_CIP_TYPES group enables all calls because of field overflow */
appl_number_group_type[i] = MAX_CIP_TYPES;
group_found = true;
dbug(1, dprintf("Field overflow appl 0x%x", i + 1));
}
else if ((info_mask_group[j] == a->CIP_Mask[i]) && (cip_mask_group[j] == a->Info_Mask[i]))
{ /* is group already present ? */
appl_number_group_type[i] = j | 0x80; /* store the group number for each application */
group_found = true;
dbug(1, dprintf("Group 0x%x found with appl 0x%x, CIP=0x%lx", appl_number_group_type[i], i + 1, info_mask_group[j]));
}
else if (!info_mask_group[j])
{ /* establish a new group */
appl_number_group_type[i] = j | 0x80; /* store the group number for each application */
info_mask_group[j] = a->CIP_Mask[i]; /* store the new CIP mask for the new group */
cip_mask_group[j] = a->Info_Mask[i]; /* store the new Info_Mask for this new group */
group_found = true;
dbug(1, dprintf("New Group 0x%x established with appl 0x%x, CIP=0x%lx", appl_number_group_type[i], i + 1, info_mask_group[j]));
}
}
}
}
for (i = 0; i < max_appl; i++) /* Build group_optimization_mask_table */
{
if (appl_number_group_type[i]) /* application is free, has listens and is member of a group */
{
if (appl_number_group_type[i] == MAX_CIP_TYPES)
{
dbug(1, dprintf("OverflowGroup 0x%x, valid appl = 0x%x, call enabled", appl_number_group_type[i], i + 1));
}
else
{
dbug(1, dprintf("Group 0x%x, valid appl = 0x%x", appl_number_group_type[i], i + 1));
for (j = i + 1; j < max_appl; j++) /* search other group members and mark them as busy */
{
if (appl_number_group_type[i] == appl_number_group_type[j])
{
dbug(1, dprintf("Appl 0x%x is member of group 0x%x, no call", j + 1, appl_number_group_type[j]));
clear_group_ind_mask_bit(plci, j); /* disable call on other group members */
appl_number_group_type[j] = 0; /* remove disabled group member from group list */
}
}
}
}
else /* application should not get a call */
{
clear_group_ind_mask_bit(plci, i);
}
}
}
/* OS notifies the driver about a application Capi_Register */
word CapiRegister(word id)
{
word i, j, appls_found;
PLCI *plci;
DIVA_CAPI_ADAPTER *a;
for (i = 0, appls_found = 0; i < max_appl; i++)
{
if (application[i].Id && (application[i].Id != id))
{
appls_found++; /* an application has been found */
}
}
if (appls_found) return true;
for (i = 0; i < max_adapter; i++) /* scan all adapters... */
{
a = &adapter[i];
if (a->request)
{
if (a->flag_dynamic_l1_down) /* remove adapter from L1 tristate (Huntgroup) */
{
if (!appls_found) /* first application does a capi register */
{
if ((j = get_plci(a))) /* activate L1 of all adapters */
{
plci = &a->plci[j - 1];
plci->command = 0;
add_p(plci, OAD, "\x01\xfd");
add_p(plci, CAI, "\x01\x80");
add_p(plci, UID, "\x06\x43\x61\x70\x69\x32\x30");
add_p(plci, SHIFT | 6, NULL);
add_p(plci, SIN, "\x02\x00\x00");
plci->internal_command = START_L1_SIG_ASSIGN_PEND;
sig_req(plci, ASSIGN, DSIG_ID);
add_p(plci, FTY, "\x02\xff\x07"); /* l1 start */
sig_req(plci, SIG_CTRL, 0);
send_req(plci);
}
}
}
}
}
return false;
}
/*------------------------------------------------------------------*/
/* Functions for virtual Switching e.g. Transfer by join, Conference */
static void VSwitchReqInd(PLCI *plci, dword Id, byte **parms)
{
word i;
/* Format of vswitch_t:
0 byte length
1 byte VSWITCHIE
2 byte VSWITCH_REQ/VSWITCH_IND
3 byte reserved
4 word VSwitchcommand
6 word returnerror
8... Params
*/
if (!plci ||
!plci->appl ||
!plci->State ||
plci->Sig.Ind == NCR_FACILITY
)
return;
for (i = 0; i < MAX_MULTI_IE; i++)
{
if (!parms[i][0]) continue;
if (parms[i][0] < 7)
{
parms[i][0] = 0; /* kill it */
continue;
}
dbug(1, dprintf("VSwitchReqInd(%d)", parms[i][4]));
switch (parms[i][4])
{
case VSJOIN:
if (!plci->relatedPTYPLCI ||
(plci->ptyState != S_ECT && plci->relatedPTYPLCI->ptyState != S_ECT))
{ /* Error */
break;
}
/* remember all necessary informations */
if (parms[i][0] != 11 || parms[i][8] != 3) /* Length Test */
{
break;
}
if (parms[i][2] == VSWITCH_IND && parms[i][9] == 1)
{ /* first indication after ECT-Request on Consultation Call */
plci->vswitchstate = parms[i][9];
parms[i][9] = 2; /* State */
/* now ask first Call to join */
}
else if (parms[i][2] == VSWITCH_REQ && parms[i][9] == 3)
{ /* Answer of VSWITCH_REQ from first Call */
plci->vswitchstate = parms[i][9];
/* tell consultation call to join
and the protocol capabilities of the first call */
}
else
{ /* Error */
break;
}
plci->vsprot = parms[i][10]; /* protocol */
plci->vsprotdialect = parms[i][11]; /* protocoldialect */
/* send join request to related PLCI */
parms[i][1] = VSWITCHIE;
parms[i][2] = VSWITCH_REQ;
plci->relatedPTYPLCI->command = 0;
plci->relatedPTYPLCI->internal_command = VSWITCH_REQ_PEND;
add_p(plci->relatedPTYPLCI, ESC, &parms[i][0]);
sig_req(plci->relatedPTYPLCI, VSWITCH_REQ, 0);
send_req(plci->relatedPTYPLCI);
break;
case VSTRANSPORT:
default:
if (plci->relatedPTYPLCI &&
plci->vswitchstate == 3 &&
plci->relatedPTYPLCI->vswitchstate == 3)
{
add_p(plci->relatedPTYPLCI, ESC, &parms[i][0]);
sig_req(plci->relatedPTYPLCI, VSWITCH_REQ, 0);
send_req(plci->relatedPTYPLCI);
}
break;
}
parms[i][0] = 0; /* kill it */
}
}
/*------------------------------------------------------------------*/
static int diva_get_dma_descriptor(PLCI *plci, dword *dma_magic) {
ENTITY e;
IDI_SYNC_REQ *pReq = (IDI_SYNC_REQ *)&e;
if (!(diva_xdi_extended_features & DIVA_CAPI_XDI_PROVIDES_RX_DMA)) {
return (-1);
}
pReq->xdi_dma_descriptor_operation.Req = 0;
pReq->xdi_dma_descriptor_operation.Rc = IDI_SYNC_REQ_DMA_DESCRIPTOR_OPERATION;
pReq->xdi_dma_descriptor_operation.info.operation = IDI_SYNC_REQ_DMA_DESCRIPTOR_ALLOC;
pReq->xdi_dma_descriptor_operation.info.descriptor_number = -1;
pReq->xdi_dma_descriptor_operation.info.descriptor_address = NULL;
pReq->xdi_dma_descriptor_operation.info.descriptor_magic = 0;
e.user[0] = plci->adapter->Id - 1;
plci->adapter->request((ENTITY *)pReq);
if (!pReq->xdi_dma_descriptor_operation.info.operation &&
(pReq->xdi_dma_descriptor_operation.info.descriptor_number >= 0) &&
pReq->xdi_dma_descriptor_operation.info.descriptor_magic) {
*dma_magic = pReq->xdi_dma_descriptor_operation.info.descriptor_magic;
dbug(3, dprintf("dma_alloc, a:%d (%d-%08x)",
plci->adapter->Id,
pReq->xdi_dma_descriptor_operation.info.descriptor_number,
*dma_magic));
return (pReq->xdi_dma_descriptor_operation.info.descriptor_number);
} else {
dbug(1, dprintf("dma_alloc failed"));
return (-1);
}
}
static void diva_free_dma_descriptor(PLCI *plci, int nr) {
ENTITY e;
IDI_SYNC_REQ *pReq = (IDI_SYNC_REQ *)&e;
if (nr < 0) {
return;
}
pReq->xdi_dma_descriptor_operation.Req = 0;
pReq->xdi_dma_descriptor_operation.Rc = IDI_SYNC_REQ_DMA_DESCRIPTOR_OPERATION;
pReq->xdi_dma_descriptor_operation.info.operation = IDI_SYNC_REQ_DMA_DESCRIPTOR_FREE;
pReq->xdi_dma_descriptor_operation.info.descriptor_number = nr;
pReq->xdi_dma_descriptor_operation.info.descriptor_address = NULL;
pReq->xdi_dma_descriptor_operation.info.descriptor_magic = 0;
e.user[0] = plci->adapter->Id - 1;
plci->adapter->request((ENTITY *)pReq);
if (!pReq->xdi_dma_descriptor_operation.info.operation) {
dbug(1, dprintf("dma_free(%d)", nr));
} else {
dbug(1, dprintf("dma_free failed (%d)", nr));
}
}
/*------------------------------------------------------------------*/
| gpl-2.0 |
arasilinux/kernel-3.2.0 | fs/drop_caches.c | 8683 | 1543 | /*
* Implement the manual drop-all-pagecache function
*/
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/fs.h>
#include <linux/writeback.h>
#include <linux/sysctl.h>
#include <linux/gfp.h>
#include "internal.h"
/* A global variable is a bit ugly, but it keeps the code simple */
int sysctl_drop_caches;
static void drop_pagecache_sb(struct super_block *sb, void *unused)
{
struct inode *inode, *toput_inode = NULL;
spin_lock(&inode_sb_list_lock);
list_for_each_entry(inode, &sb->s_inodes, i_sb_list) {
spin_lock(&inode->i_lock);
if ((inode->i_state & (I_FREEING|I_WILL_FREE|I_NEW)) ||
(inode->i_mapping->nrpages == 0)) {
spin_unlock(&inode->i_lock);
continue;
}
__iget(inode);
spin_unlock(&inode->i_lock);
spin_unlock(&inode_sb_list_lock);
invalidate_mapping_pages(inode->i_mapping, 0, -1);
iput(toput_inode);
toput_inode = inode;
spin_lock(&inode_sb_list_lock);
}
spin_unlock(&inode_sb_list_lock);
iput(toput_inode);
}
static void drop_slab(void)
{
int nr_objects;
struct shrink_control shrink = {
.gfp_mask = GFP_KERNEL,
};
do {
nr_objects = shrink_slab(&shrink, 1000, 1000);
} while (nr_objects > 10);
}
int drop_caches_sysctl_handler(ctl_table *table, int write,
void __user *buffer, size_t *length, loff_t *ppos)
{
int ret;
ret = proc_dointvec_minmax(table, write, buffer, length, ppos);
if (ret)
return ret;
if (write) {
if (sysctl_drop_caches & 1)
iterate_supers(drop_pagecache_sb, NULL);
if (sysctl_drop_caches & 2)
drop_slab();
}
return 0;
}
| gpl-2.0 |
duydb2/android_kernel_sony_msm8x60 | arch/powerpc/kernel/pmc.c | 9195 | 2403 | /*
* arch/powerpc/kernel/pmc.c
*
* Copyright (C) 2004 David Gibson, IBM Corporation.
* Includes code formerly from arch/ppc/kernel/perfmon.c:
* Author: Andy Fleming
* Copyright (c) 2004 Freescale Semiconductor, Inc
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/errno.h>
#include <linux/bug.h>
#include <linux/spinlock.h>
#include <linux/export.h>
#include <asm/processor.h>
#include <asm/cputable.h>
#include <asm/pmc.h>
#ifndef MMCR0_PMAO
#define MMCR0_PMAO 0
#endif
static void dummy_perf(struct pt_regs *regs)
{
#if defined(CONFIG_FSL_EMB_PERFMON)
mtpmr(PMRN_PMGC0, mfpmr(PMRN_PMGC0) & ~PMGC0_PMIE);
#elif defined(CONFIG_PPC64) || defined(CONFIG_6xx)
if (cur_cpu_spec->pmc_type == PPC_PMC_IBM)
mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~(MMCR0_PMXE|MMCR0_PMAO));
#else
mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_PMXE);
#endif
}
static DEFINE_RAW_SPINLOCK(pmc_owner_lock);
static void *pmc_owner_caller; /* mostly for debugging */
perf_irq_t perf_irq = dummy_perf;
int reserve_pmc_hardware(perf_irq_t new_perf_irq)
{
int err = 0;
raw_spin_lock(&pmc_owner_lock);
if (pmc_owner_caller) {
printk(KERN_WARNING "reserve_pmc_hardware: "
"PMC hardware busy (reserved by caller %p)\n",
pmc_owner_caller);
err = -EBUSY;
goto out;
}
pmc_owner_caller = __builtin_return_address(0);
perf_irq = new_perf_irq ? new_perf_irq : dummy_perf;
out:
raw_spin_unlock(&pmc_owner_lock);
return err;
}
EXPORT_SYMBOL_GPL(reserve_pmc_hardware);
void release_pmc_hardware(void)
{
raw_spin_lock(&pmc_owner_lock);
WARN_ON(! pmc_owner_caller);
pmc_owner_caller = NULL;
perf_irq = dummy_perf;
raw_spin_unlock(&pmc_owner_lock);
}
EXPORT_SYMBOL_GPL(release_pmc_hardware);
#ifdef CONFIG_PPC64
void power4_enable_pmcs(void)
{
unsigned long hid0;
hid0 = mfspr(SPRN_HID0);
hid0 |= 1UL << (63 - 20);
/* POWER4 requires the following sequence */
asm volatile(
"sync\n"
"mtspr %1, %0\n"
"mfspr %0, %1\n"
"mfspr %0, %1\n"
"mfspr %0, %1\n"
"mfspr %0, %1\n"
"mfspr %0, %1\n"
"mfspr %0, %1\n"
"isync" : "=&r" (hid0) : "i" (SPRN_HID0), "0" (hid0):
"memory");
}
#endif /* CONFIG_PPC64 */
| gpl-2.0 |
fortuna-dev/android_kernel_samsung_fortuna-common | arch/powerpc/kernel/pmc.c | 9195 | 2403 | /*
* arch/powerpc/kernel/pmc.c
*
* Copyright (C) 2004 David Gibson, IBM Corporation.
* Includes code formerly from arch/ppc/kernel/perfmon.c:
* Author: Andy Fleming
* Copyright (c) 2004 Freescale Semiconductor, Inc
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/errno.h>
#include <linux/bug.h>
#include <linux/spinlock.h>
#include <linux/export.h>
#include <asm/processor.h>
#include <asm/cputable.h>
#include <asm/pmc.h>
#ifndef MMCR0_PMAO
#define MMCR0_PMAO 0
#endif
static void dummy_perf(struct pt_regs *regs)
{
#if defined(CONFIG_FSL_EMB_PERFMON)
mtpmr(PMRN_PMGC0, mfpmr(PMRN_PMGC0) & ~PMGC0_PMIE);
#elif defined(CONFIG_PPC64) || defined(CONFIG_6xx)
if (cur_cpu_spec->pmc_type == PPC_PMC_IBM)
mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~(MMCR0_PMXE|MMCR0_PMAO));
#else
mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_PMXE);
#endif
}
static DEFINE_RAW_SPINLOCK(pmc_owner_lock);
static void *pmc_owner_caller; /* mostly for debugging */
perf_irq_t perf_irq = dummy_perf;
int reserve_pmc_hardware(perf_irq_t new_perf_irq)
{
int err = 0;
raw_spin_lock(&pmc_owner_lock);
if (pmc_owner_caller) {
printk(KERN_WARNING "reserve_pmc_hardware: "
"PMC hardware busy (reserved by caller %p)\n",
pmc_owner_caller);
err = -EBUSY;
goto out;
}
pmc_owner_caller = __builtin_return_address(0);
perf_irq = new_perf_irq ? new_perf_irq : dummy_perf;
out:
raw_spin_unlock(&pmc_owner_lock);
return err;
}
EXPORT_SYMBOL_GPL(reserve_pmc_hardware);
void release_pmc_hardware(void)
{
raw_spin_lock(&pmc_owner_lock);
WARN_ON(! pmc_owner_caller);
pmc_owner_caller = NULL;
perf_irq = dummy_perf;
raw_spin_unlock(&pmc_owner_lock);
}
EXPORT_SYMBOL_GPL(release_pmc_hardware);
#ifdef CONFIG_PPC64
void power4_enable_pmcs(void)
{
unsigned long hid0;
hid0 = mfspr(SPRN_HID0);
hid0 |= 1UL << (63 - 20);
/* POWER4 requires the following sequence */
asm volatile(
"sync\n"
"mtspr %1, %0\n"
"mfspr %0, %1\n"
"mfspr %0, %1\n"
"mfspr %0, %1\n"
"mfspr %0, %1\n"
"mfspr %0, %1\n"
"mfspr %0, %1\n"
"isync" : "=&r" (hid0) : "i" (SPRN_HID0), "0" (hid0):
"memory");
}
#endif /* CONFIG_PPC64 */
| gpl-2.0 |
santod/android_kernel_htc_m7vzw | arch/sh/kernel/cpu/sh4a/clock-sh7763.c | 9195 | 2722 | /*
* arch/sh/kernel/cpu/sh4a/clock-sh7763.c
*
* SH7763 support for the clock framework
*
* Copyright (C) 2005 Paul Mundt
* Copyright (C) 2007 Yoshihiro Shimoda
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/clkdev.h>
#include <asm/clock.h>
#include <asm/freq.h>
#include <asm/io.h>
static int bfc_divisors[] = { 1, 1, 1, 8, 1, 1, 1, 1 };
static int p0fc_divisors[] = { 1, 1, 1, 8, 1, 1, 1, 1 };
static int cfc_divisors[] = { 1, 1, 4, 1, 1, 1, 1, 1 };
static void master_clk_init(struct clk *clk)
{
clk->rate *= p0fc_divisors[(__raw_readl(FRQCR) >> 4) & 0x07];
}
static struct sh_clk_ops sh7763_master_clk_ops = {
.init = master_clk_init,
};
static unsigned long module_clk_recalc(struct clk *clk)
{
int idx = ((__raw_readl(FRQCR) >> 4) & 0x07);
return clk->parent->rate / p0fc_divisors[idx];
}
static struct sh_clk_ops sh7763_module_clk_ops = {
.recalc = module_clk_recalc,
};
static unsigned long bus_clk_recalc(struct clk *clk)
{
int idx = ((__raw_readl(FRQCR) >> 16) & 0x07);
return clk->parent->rate / bfc_divisors[idx];
}
static struct sh_clk_ops sh7763_bus_clk_ops = {
.recalc = bus_clk_recalc,
};
static struct sh_clk_ops sh7763_cpu_clk_ops = {
.recalc = followparent_recalc,
};
static struct sh_clk_ops *sh7763_clk_ops[] = {
&sh7763_master_clk_ops,
&sh7763_module_clk_ops,
&sh7763_bus_clk_ops,
&sh7763_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
{
if (idx < ARRAY_SIZE(sh7763_clk_ops))
*ops = sh7763_clk_ops[idx];
}
static unsigned long shyway_clk_recalc(struct clk *clk)
{
int idx = ((__raw_readl(FRQCR) >> 20) & 0x07);
return clk->parent->rate / cfc_divisors[idx];
}
static struct sh_clk_ops sh7763_shyway_clk_ops = {
.recalc = shyway_clk_recalc,
};
static struct clk sh7763_shyway_clk = {
.flags = CLK_ENABLE_ON_INIT,
.ops = &sh7763_shyway_clk_ops,
};
/*
* Additional SH7763-specific on-chip clocks that aren't already part of the
* clock framework
*/
static struct clk *sh7763_onchip_clocks[] = {
&sh7763_shyway_clk,
};
static struct clk_lookup lookups[] = {
/* main clocks */
CLKDEV_CON_ID("shyway_clk", &sh7763_shyway_clk),
};
int __init arch_clk_init(void)
{
struct clk *clk;
int i, ret = 0;
cpg_clk_init();
clk = clk_get(NULL, "master_clk");
for (i = 0; i < ARRAY_SIZE(sh7763_onchip_clocks); i++) {
struct clk *clkp = sh7763_onchip_clocks[i];
clkp->parent = clk;
ret |= clk_register(clkp);
}
clk_put(clk);
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
return ret;
}
| gpl-2.0 |
flar2/bulletproof-m7-3.0 | arch/powerpc/kernel/pmc.c | 9195 | 2403 | /*
* arch/powerpc/kernel/pmc.c
*
* Copyright (C) 2004 David Gibson, IBM Corporation.
* Includes code formerly from arch/ppc/kernel/perfmon.c:
* Author: Andy Fleming
* Copyright (c) 2004 Freescale Semiconductor, Inc
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/errno.h>
#include <linux/bug.h>
#include <linux/spinlock.h>
#include <linux/export.h>
#include <asm/processor.h>
#include <asm/cputable.h>
#include <asm/pmc.h>
#ifndef MMCR0_PMAO
#define MMCR0_PMAO 0
#endif
static void dummy_perf(struct pt_regs *regs)
{
#if defined(CONFIG_FSL_EMB_PERFMON)
mtpmr(PMRN_PMGC0, mfpmr(PMRN_PMGC0) & ~PMGC0_PMIE);
#elif defined(CONFIG_PPC64) || defined(CONFIG_6xx)
if (cur_cpu_spec->pmc_type == PPC_PMC_IBM)
mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~(MMCR0_PMXE|MMCR0_PMAO));
#else
mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_PMXE);
#endif
}
static DEFINE_RAW_SPINLOCK(pmc_owner_lock);
static void *pmc_owner_caller; /* mostly for debugging */
perf_irq_t perf_irq = dummy_perf;
int reserve_pmc_hardware(perf_irq_t new_perf_irq)
{
int err = 0;
raw_spin_lock(&pmc_owner_lock);
if (pmc_owner_caller) {
printk(KERN_WARNING "reserve_pmc_hardware: "
"PMC hardware busy (reserved by caller %p)\n",
pmc_owner_caller);
err = -EBUSY;
goto out;
}
pmc_owner_caller = __builtin_return_address(0);
perf_irq = new_perf_irq ? new_perf_irq : dummy_perf;
out:
raw_spin_unlock(&pmc_owner_lock);
return err;
}
EXPORT_SYMBOL_GPL(reserve_pmc_hardware);
void release_pmc_hardware(void)
{
raw_spin_lock(&pmc_owner_lock);
WARN_ON(! pmc_owner_caller);
pmc_owner_caller = NULL;
perf_irq = dummy_perf;
raw_spin_unlock(&pmc_owner_lock);
}
EXPORT_SYMBOL_GPL(release_pmc_hardware);
#ifdef CONFIG_PPC64
void power4_enable_pmcs(void)
{
unsigned long hid0;
hid0 = mfspr(SPRN_HID0);
hid0 |= 1UL << (63 - 20);
/* POWER4 requires the following sequence */
asm volatile(
"sync\n"
"mtspr %1, %0\n"
"mfspr %0, %1\n"
"mfspr %0, %1\n"
"mfspr %0, %1\n"
"mfspr %0, %1\n"
"mfspr %0, %1\n"
"mfspr %0, %1\n"
"isync" : "=&r" (hid0) : "i" (SPRN_HID0), "0" (hid0):
"memory");
}
#endif /* CONFIG_PPC64 */
| gpl-2.0 |
linuxvom/linux | net/netfilter/xt_HL.c | 10219 | 3807 | /*
* TTL modification target for IP tables
* (C) 2000,2005 by Harald Welte <laforge@netfilter.org>
*
* Hop Limit modification target for ip6tables
* Maciej Soltysiak <solt@dns.toxicfilms.tv>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/skbuff.h>
#include <linux/ip.h>
#include <linux/ipv6.h>
#include <net/checksum.h>
#include <linux/netfilter/x_tables.h>
#include <linux/netfilter_ipv4/ipt_TTL.h>
#include <linux/netfilter_ipv6/ip6t_HL.h>
MODULE_AUTHOR("Harald Welte <laforge@netfilter.org>");
MODULE_AUTHOR("Maciej Soltysiak <solt@dns.toxicfilms.tv>");
MODULE_DESCRIPTION("Xtables: Hoplimit/TTL Limit field modification target");
MODULE_LICENSE("GPL");
static unsigned int
ttl_tg(struct sk_buff *skb, const struct xt_action_param *par)
{
struct iphdr *iph;
const struct ipt_TTL_info *info = par->targinfo;
int new_ttl;
if (!skb_make_writable(skb, skb->len))
return NF_DROP;
iph = ip_hdr(skb);
switch (info->mode) {
case IPT_TTL_SET:
new_ttl = info->ttl;
break;
case IPT_TTL_INC:
new_ttl = iph->ttl + info->ttl;
if (new_ttl > 255)
new_ttl = 255;
break;
case IPT_TTL_DEC:
new_ttl = iph->ttl - info->ttl;
if (new_ttl < 0)
new_ttl = 0;
break;
default:
new_ttl = iph->ttl;
break;
}
if (new_ttl != iph->ttl) {
csum_replace2(&iph->check, htons(iph->ttl << 8),
htons(new_ttl << 8));
iph->ttl = new_ttl;
}
return XT_CONTINUE;
}
static unsigned int
hl_tg6(struct sk_buff *skb, const struct xt_action_param *par)
{
struct ipv6hdr *ip6h;
const struct ip6t_HL_info *info = par->targinfo;
int new_hl;
if (!skb_make_writable(skb, skb->len))
return NF_DROP;
ip6h = ipv6_hdr(skb);
switch (info->mode) {
case IP6T_HL_SET:
new_hl = info->hop_limit;
break;
case IP6T_HL_INC:
new_hl = ip6h->hop_limit + info->hop_limit;
if (new_hl > 255)
new_hl = 255;
break;
case IP6T_HL_DEC:
new_hl = ip6h->hop_limit - info->hop_limit;
if (new_hl < 0)
new_hl = 0;
break;
default:
new_hl = ip6h->hop_limit;
break;
}
ip6h->hop_limit = new_hl;
return XT_CONTINUE;
}
static int ttl_tg_check(const struct xt_tgchk_param *par)
{
const struct ipt_TTL_info *info = par->targinfo;
if (info->mode > IPT_TTL_MAXMODE) {
pr_info("TTL: invalid or unknown mode %u\n", info->mode);
return -EINVAL;
}
if (info->mode != IPT_TTL_SET && info->ttl == 0)
return -EINVAL;
return 0;
}
static int hl_tg6_check(const struct xt_tgchk_param *par)
{
const struct ip6t_HL_info *info = par->targinfo;
if (info->mode > IP6T_HL_MAXMODE) {
pr_info("invalid or unknown mode %u\n", info->mode);
return -EINVAL;
}
if (info->mode != IP6T_HL_SET && info->hop_limit == 0) {
pr_info("increment/decrement does not "
"make sense with value 0\n");
return -EINVAL;
}
return 0;
}
static struct xt_target hl_tg_reg[] __read_mostly = {
{
.name = "TTL",
.revision = 0,
.family = NFPROTO_IPV4,
.target = ttl_tg,
.targetsize = sizeof(struct ipt_TTL_info),
.table = "mangle",
.checkentry = ttl_tg_check,
.me = THIS_MODULE,
},
{
.name = "HL",
.revision = 0,
.family = NFPROTO_IPV6,
.target = hl_tg6,
.targetsize = sizeof(struct ip6t_HL_info),
.table = "mangle",
.checkentry = hl_tg6_check,
.me = THIS_MODULE,
},
};
static int __init hl_tg_init(void)
{
return xt_register_targets(hl_tg_reg, ARRAY_SIZE(hl_tg_reg));
}
static void __exit hl_tg_exit(void)
{
xt_unregister_targets(hl_tg_reg, ARRAY_SIZE(hl_tg_reg));
}
module_init(hl_tg_init);
module_exit(hl_tg_exit);
MODULE_ALIAS("ipt_TTL");
MODULE_ALIAS("ip6t_HL");
| gpl-2.0 |
santod/KK_sense_kernel_htc_m7vzw | drivers/media/dvb/frontends/isl6423.c | 14571 | 6645 | /*
Intersil ISL6423 SEC and LNB Power supply controller
Copyright (C) Manu Abraham <abraham.manu@gmail.com>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/slab.h>
#include "dvb_frontend.h"
#include "isl6423.h"
static unsigned int verbose;
module_param(verbose, int, 0644);
MODULE_PARM_DESC(verbose, "Set Verbosity level");
#define FE_ERROR 0
#define FE_NOTICE 1
#define FE_INFO 2
#define FE_DEBUG 3
#define FE_DEBUGREG 4
#define dprintk(__y, __z, format, arg...) do { \
if (__z) { \
if ((verbose > FE_ERROR) && (verbose > __y)) \
printk(KERN_ERR "%s: " format "\n", __func__ , ##arg); \
else if ((verbose > FE_NOTICE) && (verbose > __y)) \
printk(KERN_NOTICE "%s: " format "\n", __func__ , ##arg); \
else if ((verbose > FE_INFO) && (verbose > __y)) \
printk(KERN_INFO "%s: " format "\n", __func__ , ##arg); \
else if ((verbose > FE_DEBUG) && (verbose > __y)) \
printk(KERN_DEBUG "%s: " format "\n", __func__ , ##arg); \
} else { \
if (verbose > __y) \
printk(format, ##arg); \
} \
} while (0)
struct isl6423_dev {
const struct isl6423_config *config;
struct i2c_adapter *i2c;
u8 reg_3;
u8 reg_4;
unsigned int verbose;
};
static int isl6423_write(struct isl6423_dev *isl6423, u8 reg)
{
struct i2c_adapter *i2c = isl6423->i2c;
u8 addr = isl6423->config->addr;
int err = 0;
struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = ®, .len = 1 };
dprintk(FE_DEBUG, 1, "write reg %02X", reg);
err = i2c_transfer(i2c, &msg, 1);
if (err < 0)
goto exit;
return 0;
exit:
dprintk(FE_ERROR, 1, "I/O error <%d>", err);
return err;
}
static int isl6423_set_modulation(struct dvb_frontend *fe)
{
struct isl6423_dev *isl6423 = (struct isl6423_dev *) fe->sec_priv;
const struct isl6423_config *config = isl6423->config;
int err = 0;
u8 reg_2 = 0;
reg_2 = 0x01 << 5;
if (config->mod_extern)
reg_2 |= (1 << 3);
else
reg_2 |= (1 << 4);
err = isl6423_write(isl6423, reg_2);
if (err < 0)
goto exit;
return 0;
exit:
dprintk(FE_ERROR, 1, "I/O error <%d>", err);
return err;
}
static int isl6423_voltage_boost(struct dvb_frontend *fe, long arg)
{
struct isl6423_dev *isl6423 = (struct isl6423_dev *) fe->sec_priv;
u8 reg_3 = isl6423->reg_3;
u8 reg_4 = isl6423->reg_4;
int err = 0;
if (arg) {
/* EN = 1, VSPEN = 1, VBOT = 1 */
reg_4 |= (1 << 4);
reg_4 |= 0x1;
reg_3 |= (1 << 3);
} else {
/* EN = 1, VSPEN = 1, VBOT = 0 */
reg_4 |= (1 << 4);
reg_4 &= ~0x1;
reg_3 |= (1 << 3);
}
err = isl6423_write(isl6423, reg_3);
if (err < 0)
goto exit;
err = isl6423_write(isl6423, reg_4);
if (err < 0)
goto exit;
isl6423->reg_3 = reg_3;
isl6423->reg_4 = reg_4;
return 0;
exit:
dprintk(FE_ERROR, 1, "I/O error <%d>", err);
return err;
}
static int isl6423_set_voltage(struct dvb_frontend *fe,
enum fe_sec_voltage voltage)
{
struct isl6423_dev *isl6423 = (struct isl6423_dev *) fe->sec_priv;
u8 reg_3 = isl6423->reg_3;
u8 reg_4 = isl6423->reg_4;
int err = 0;
switch (voltage) {
case SEC_VOLTAGE_OFF:
/* EN = 0 */
reg_4 &= ~(1 << 4);
break;
case SEC_VOLTAGE_13:
/* EN = 1, VSPEN = 1, VTOP = 0, VBOT = 0 */
reg_4 |= (1 << 4);
reg_4 &= ~0x3;
reg_3 |= (1 << 3);
break;
case SEC_VOLTAGE_18:
/* EN = 1, VSPEN = 1, VTOP = 1, VBOT = 0 */
reg_4 |= (1 << 4);
reg_4 |= 0x2;
reg_4 &= ~0x1;
reg_3 |= (1 << 3);
break;
default:
break;
}
err = isl6423_write(isl6423, reg_3);
if (err < 0)
goto exit;
err = isl6423_write(isl6423, reg_4);
if (err < 0)
goto exit;
isl6423->reg_3 = reg_3;
isl6423->reg_4 = reg_4;
return 0;
exit:
dprintk(FE_ERROR, 1, "I/O error <%d>", err);
return err;
}
static int isl6423_set_current(struct dvb_frontend *fe)
{
struct isl6423_dev *isl6423 = (struct isl6423_dev *) fe->sec_priv;
u8 reg_3 = isl6423->reg_3;
const struct isl6423_config *config = isl6423->config;
int err = 0;
switch (config->current_max) {
case SEC_CURRENT_275m:
/* 275mA */
/* ISELH = 0, ISELL = 0 */
reg_3 &= ~0x3;
break;
case SEC_CURRENT_515m:
/* 515mA */
/* ISELH = 0, ISELL = 1 */
reg_3 &= ~0x2;
reg_3 |= 0x1;
break;
case SEC_CURRENT_635m:
/* 635mA */
/* ISELH = 1, ISELL = 0 */
reg_3 &= ~0x1;
reg_3 |= 0x2;
break;
case SEC_CURRENT_800m:
/* 800mA */
/* ISELH = 1, ISELL = 1 */
reg_3 |= 0x3;
break;
}
err = isl6423_write(isl6423, reg_3);
if (err < 0)
goto exit;
switch (config->curlim) {
case SEC_CURRENT_LIM_ON:
/* DCL = 0 */
reg_3 &= ~0x10;
break;
case SEC_CURRENT_LIM_OFF:
/* DCL = 1 */
reg_3 |= 0x10;
break;
}
err = isl6423_write(isl6423, reg_3);
if (err < 0)
goto exit;
isl6423->reg_3 = reg_3;
return 0;
exit:
dprintk(FE_ERROR, 1, "I/O error <%d>", err);
return err;
}
static void isl6423_release(struct dvb_frontend *fe)
{
isl6423_set_voltage(fe, SEC_VOLTAGE_OFF);
kfree(fe->sec_priv);
fe->sec_priv = NULL;
}
struct dvb_frontend *isl6423_attach(struct dvb_frontend *fe,
struct i2c_adapter *i2c,
const struct isl6423_config *config)
{
struct isl6423_dev *isl6423;
isl6423 = kzalloc(sizeof(struct isl6423_dev), GFP_KERNEL);
if (!isl6423)
return NULL;
isl6423->config = config;
isl6423->i2c = i2c;
fe->sec_priv = isl6423;
/* SR3H = 0, SR3M = 1, SR3L = 0 */
isl6423->reg_3 = 0x02 << 5;
/* SR4H = 0, SR4M = 1, SR4L = 1 */
isl6423->reg_4 = 0x03 << 5;
if (isl6423_set_current(fe))
goto exit;
if (isl6423_set_modulation(fe))
goto exit;
fe->ops.release_sec = isl6423_release;
fe->ops.set_voltage = isl6423_set_voltage;
fe->ops.enable_high_lnb_voltage = isl6423_voltage_boost;
isl6423->verbose = verbose;
return fe;
exit:
kfree(isl6423);
fe->sec_priv = NULL;
return NULL;
}
EXPORT_SYMBOL(isl6423_attach);
MODULE_DESCRIPTION("ISL6423 SEC");
MODULE_AUTHOR("Manu Abraham");
MODULE_LICENSE("GPL");
| gpl-2.0 |
csmanjuvijay/usb-next | net/bridge/br_stp_bpdu.c | 492 | 5958 | /*
* Spanning tree protocol; BPDU handling
* Linux ethernet bridge
*
* Authors:
* Lennert Buytenhek <buytenh@gnu.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/kernel.h>
#include <linux/netfilter_bridge.h>
#include <linux/etherdevice.h>
#include <linux/llc.h>
#include <linux/slab.h>
#include <linux/pkt_sched.h>
#include <net/net_namespace.h>
#include <net/llc.h>
#include <net/llc_pdu.h>
#include <net/stp.h>
#include <asm/unaligned.h>
#include "br_private.h"
#include "br_private_stp.h"
#define STP_HZ 256
#define LLC_RESERVE sizeof(struct llc_pdu_un)
static int br_send_bpdu_finish(struct net *net, struct sock *sk,
struct sk_buff *skb)
{
return dev_queue_xmit(skb);
}
static void br_send_bpdu(struct net_bridge_port *p,
const unsigned char *data, int length)
{
struct sk_buff *skb;
skb = dev_alloc_skb(length+LLC_RESERVE);
if (!skb)
return;
skb->dev = p->dev;
skb->protocol = htons(ETH_P_802_2);
skb->priority = TC_PRIO_CONTROL;
skb_reserve(skb, LLC_RESERVE);
memcpy(__skb_put(skb, length), data, length);
llc_pdu_header_init(skb, LLC_PDU_TYPE_U, LLC_SAP_BSPAN,
LLC_SAP_BSPAN, LLC_PDU_CMD);
llc_pdu_init_as_ui_cmd(skb);
llc_mac_hdr_init(skb, p->dev->dev_addr, p->br->group_addr);
skb_reset_mac_header(skb);
NF_HOOK(NFPROTO_BRIDGE, NF_BR_LOCAL_OUT,
dev_net(p->dev), NULL, skb, NULL, skb->dev,
br_send_bpdu_finish);
}
static inline void br_set_ticks(unsigned char *dest, int j)
{
unsigned long ticks = (STP_HZ * j)/ HZ;
put_unaligned_be16(ticks, dest);
}
static inline int br_get_ticks(const unsigned char *src)
{
unsigned long ticks = get_unaligned_be16(src);
return DIV_ROUND_UP(ticks * HZ, STP_HZ);
}
/* called under bridge lock */
void br_send_config_bpdu(struct net_bridge_port *p, struct br_config_bpdu *bpdu)
{
unsigned char buf[35];
if (p->br->stp_enabled != BR_KERNEL_STP)
return;
buf[0] = 0;
buf[1] = 0;
buf[2] = 0;
buf[3] = BPDU_TYPE_CONFIG;
buf[4] = (bpdu->topology_change ? 0x01 : 0) |
(bpdu->topology_change_ack ? 0x80 : 0);
buf[5] = bpdu->root.prio[0];
buf[6] = bpdu->root.prio[1];
buf[7] = bpdu->root.addr[0];
buf[8] = bpdu->root.addr[1];
buf[9] = bpdu->root.addr[2];
buf[10] = bpdu->root.addr[3];
buf[11] = bpdu->root.addr[4];
buf[12] = bpdu->root.addr[5];
buf[13] = (bpdu->root_path_cost >> 24) & 0xFF;
buf[14] = (bpdu->root_path_cost >> 16) & 0xFF;
buf[15] = (bpdu->root_path_cost >> 8) & 0xFF;
buf[16] = bpdu->root_path_cost & 0xFF;
buf[17] = bpdu->bridge_id.prio[0];
buf[18] = bpdu->bridge_id.prio[1];
buf[19] = bpdu->bridge_id.addr[0];
buf[20] = bpdu->bridge_id.addr[1];
buf[21] = bpdu->bridge_id.addr[2];
buf[22] = bpdu->bridge_id.addr[3];
buf[23] = bpdu->bridge_id.addr[4];
buf[24] = bpdu->bridge_id.addr[5];
buf[25] = (bpdu->port_id >> 8) & 0xFF;
buf[26] = bpdu->port_id & 0xFF;
br_set_ticks(buf+27, bpdu->message_age);
br_set_ticks(buf+29, bpdu->max_age);
br_set_ticks(buf+31, bpdu->hello_time);
br_set_ticks(buf+33, bpdu->forward_delay);
br_send_bpdu(p, buf, 35);
}
/* called under bridge lock */
void br_send_tcn_bpdu(struct net_bridge_port *p)
{
unsigned char buf[4];
if (p->br->stp_enabled != BR_KERNEL_STP)
return;
buf[0] = 0;
buf[1] = 0;
buf[2] = 0;
buf[3] = BPDU_TYPE_TCN;
br_send_bpdu(p, buf, 4);
}
/*
* Called from llc.
*
* NO locks, but rcu_read_lock
*/
void br_stp_rcv(const struct stp_proto *proto, struct sk_buff *skb,
struct net_device *dev)
{
const unsigned char *dest = eth_hdr(skb)->h_dest;
struct net_bridge_port *p;
struct net_bridge *br;
const unsigned char *buf;
if (!pskb_may_pull(skb, 4))
goto err;
/* compare of protocol id and version */
buf = skb->data;
if (buf[0] != 0 || buf[1] != 0 || buf[2] != 0)
goto err;
p = br_port_get_check_rcu(dev);
if (!p)
goto err;
br = p->br;
spin_lock(&br->lock);
if (br->stp_enabled != BR_KERNEL_STP)
goto out;
if (!(br->dev->flags & IFF_UP))
goto out;
if (p->state == BR_STATE_DISABLED)
goto out;
if (!ether_addr_equal(dest, br->group_addr))
goto out;
if (p->flags & BR_BPDU_GUARD) {
br_notice(br, "BPDU received on blocked port %u(%s)\n",
(unsigned int) p->port_no, p->dev->name);
br_stp_disable_port(p);
goto out;
}
buf = skb_pull(skb, 3);
if (buf[0] == BPDU_TYPE_CONFIG) {
struct br_config_bpdu bpdu;
if (!pskb_may_pull(skb, 32))
goto out;
buf = skb->data;
bpdu.topology_change = (buf[1] & 0x01) ? 1 : 0;
bpdu.topology_change_ack = (buf[1] & 0x80) ? 1 : 0;
bpdu.root.prio[0] = buf[2];
bpdu.root.prio[1] = buf[3];
bpdu.root.addr[0] = buf[4];
bpdu.root.addr[1] = buf[5];
bpdu.root.addr[2] = buf[6];
bpdu.root.addr[3] = buf[7];
bpdu.root.addr[4] = buf[8];
bpdu.root.addr[5] = buf[9];
bpdu.root_path_cost =
(buf[10] << 24) |
(buf[11] << 16) |
(buf[12] << 8) |
buf[13];
bpdu.bridge_id.prio[0] = buf[14];
bpdu.bridge_id.prio[1] = buf[15];
bpdu.bridge_id.addr[0] = buf[16];
bpdu.bridge_id.addr[1] = buf[17];
bpdu.bridge_id.addr[2] = buf[18];
bpdu.bridge_id.addr[3] = buf[19];
bpdu.bridge_id.addr[4] = buf[20];
bpdu.bridge_id.addr[5] = buf[21];
bpdu.port_id = (buf[22] << 8) | buf[23];
bpdu.message_age = br_get_ticks(buf+24);
bpdu.max_age = br_get_ticks(buf+26);
bpdu.hello_time = br_get_ticks(buf+28);
bpdu.forward_delay = br_get_ticks(buf+30);
if (bpdu.message_age > bpdu.max_age) {
if (net_ratelimit())
br_notice(p->br,
"port %u config from %pM"
" (message_age %ul > max_age %ul)\n",
p->port_no,
eth_hdr(skb)->h_source,
bpdu.message_age, bpdu.max_age);
goto out;
}
br_received_config_bpdu(p, &bpdu);
} else if (buf[0] == BPDU_TYPE_TCN) {
br_received_tcn_bpdu(p);
}
out:
spin_unlock(&br->lock);
err:
kfree_skb(skb);
}
| gpl-2.0 |
LeEco-MSM8996-Development/android_kernel_leeco_msm8996 | arch/arm/mach-imx/cpu-imx5.c | 1516 | 2461 | /*
* Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*
* This file contains the CPU initialization code.
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include "hardware.h"
#include "common.h"
static int mx5_cpu_rev = -1;
#define IIM_SREV 0x24
static u32 imx5_read_srev_reg(const char *compat)
{
void __iomem *iim_base;
struct device_node *np;
u32 srev;
np = of_find_compatible_node(NULL, NULL, compat);
iim_base = of_iomap(np, 0);
WARN_ON(!iim_base);
srev = readl(iim_base + IIM_SREV) & 0xff;
iounmap(iim_base);
return srev;
}
static int get_mx51_srev(void)
{
u32 rev = imx5_read_srev_reg("fsl,imx51-iim");
switch (rev) {
case 0x0:
return IMX_CHIP_REVISION_2_0;
case 0x10:
return IMX_CHIP_REVISION_3_0;
default:
return IMX_CHIP_REVISION_UNKNOWN;
}
}
/*
* Returns:
* the silicon revision of the cpu
* -EINVAL - not a mx51
*/
int mx51_revision(void)
{
if (!cpu_is_mx51())
return -EINVAL;
if (mx5_cpu_rev == -1)
mx5_cpu_rev = get_mx51_srev();
return mx5_cpu_rev;
}
EXPORT_SYMBOL(mx51_revision);
#ifdef CONFIG_NEON
/*
* All versions of the silicon before Rev. 3 have broken NEON implementations.
* Dependent on link order - so the assumption is that vfp_init is called
* before us.
*/
int __init mx51_neon_fixup(void)
{
if (mx51_revision() < IMX_CHIP_REVISION_3_0 &&
(elf_hwcap & HWCAP_NEON)) {
elf_hwcap &= ~HWCAP_NEON;
pr_info("Turning off NEON support, detected broken NEON implementation\n");
}
return 0;
}
#endif
static int get_mx53_srev(void)
{
u32 rev = imx5_read_srev_reg("fsl,imx53-iim");
switch (rev) {
case 0x0:
return IMX_CHIP_REVISION_1_0;
case 0x2:
return IMX_CHIP_REVISION_2_0;
case 0x3:
return IMX_CHIP_REVISION_2_1;
default:
return IMX_CHIP_REVISION_UNKNOWN;
}
}
/*
* Returns:
* the silicon revision of the cpu
* -EINVAL - not a mx53
*/
int mx53_revision(void)
{
if (!cpu_is_mx53())
return -EINVAL;
if (mx5_cpu_rev == -1)
mx5_cpu_rev = get_mx53_srev();
return mx5_cpu_rev;
}
EXPORT_SYMBOL(mx53_revision);
| gpl-2.0 |
xb446909/personalprojects | ARMToolChain/source/linux-4.1.2/drivers/uwb/ie-rcv.c | 2028 | 1575 | /*
* Ultra Wide Band
* IE Received notification handling.
*
* Copyright (C) 2008 Cambridge Silicon Radio Ltd.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License version
* 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <linux/errno.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/bitmap.h>
#include "uwb-internal.h"
/*
* Process an incoming IE Received notification.
*/
int uwbd_evt_handle_rc_ie_rcv(struct uwb_event *evt)
{
int result = -EINVAL;
struct device *dev = &evt->rc->uwb_dev.dev;
struct uwb_rc_evt_ie_rcv *iercv;
/* Is there enough data to decode it? */
if (evt->notif.size < sizeof(*iercv)) {
dev_err(dev, "IE Received notification: Not enough data to "
"decode (%zu vs %zu bytes needed)\n",
evt->notif.size, sizeof(*iercv));
goto error;
}
iercv = container_of(evt->notif.rceb, struct uwb_rc_evt_ie_rcv, rceb);
dev_dbg(dev, "IE received, element ID=%d\n", iercv->IEData[0]);
if (iercv->IEData[0] == UWB_RELINQUISH_REQUEST_IE) {
dev_warn(dev, "unhandled Relinquish Request IE\n");
}
return 0;
error:
return result;
}
| gpl-2.0 |
Snuzzo/funky_redux | arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c | 2284 | 5116 | /*
*
* Copyright (C) 2010 Eric Bénard <eric@eukrea.com>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/i2c.h>
#include <linux/gpio.h>
#include <linux/io.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/i2c/tsc2007.h>
#include <linux/leds.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/iomux-mx51.h>
#include <asm/mach/arch.h>
#include "devices-imx51.h"
#include "devices.h"
#define MBIMX51_TSC2007_GPIO IMX_GPIO_NR(3, 30)
#define MBIMX51_TSC2007_IRQ (MXC_INTERNAL_IRQS + MBIMX51_TSC2007_GPIO)
#define MBIMX51_LED0 IMX_GPIO_NR(3, 5)
#define MBIMX51_LED1 IMX_GPIO_NR(3, 6)
#define MBIMX51_LED2 IMX_GPIO_NR(3, 7)
#define MBIMX51_LED3 IMX_GPIO_NR(3, 8)
static struct gpio_led mbimx51_leds[] = {
{
.name = "led0",
.default_trigger = "heartbeat",
.active_low = 1,
.gpio = MBIMX51_LED0,
},
{
.name = "led1",
.default_trigger = "nand-disk",
.active_low = 1,
.gpio = MBIMX51_LED1,
},
{
.name = "led2",
.default_trigger = "mmc0",
.active_low = 1,
.gpio = MBIMX51_LED2,
},
{
.name = "led3",
.default_trigger = "default-on",
.active_low = 1,
.gpio = MBIMX51_LED3,
},
};
static struct gpio_led_platform_data mbimx51_leds_info = {
.leds = mbimx51_leds,
.num_leds = ARRAY_SIZE(mbimx51_leds),
};
static struct platform_device mbimx51_leds_gpio = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &mbimx51_leds_info,
},
};
static struct platform_device *devices[] __initdata = {
&mbimx51_leds_gpio,
};
static iomux_v3_cfg_t mbimx51_pads[] = {
/* UART2 */
MX51_PAD_UART2_RXD__UART2_RXD,
MX51_PAD_UART2_TXD__UART2_TXD,
/* UART3 */
MX51_PAD_UART3_RXD__UART3_RXD,
MX51_PAD_UART3_TXD__UART3_TXD,
MX51_PAD_KEY_COL4__UART3_RTS,
MX51_PAD_KEY_COL5__UART3_CTS,
/* TSC2007 IRQ */
MX51_PAD_NANDF_D10__GPIO3_30,
/* LEDS */
MX51_PAD_DISPB2_SER_DIN__GPIO3_5,
MX51_PAD_DISPB2_SER_DIO__GPIO3_6,
MX51_PAD_DISPB2_SER_CLK__GPIO3_7,
MX51_PAD_DISPB2_SER_RS__GPIO3_8,
/* KPP */
MX51_PAD_KEY_ROW0__KEY_ROW0,
MX51_PAD_KEY_ROW1__KEY_ROW1,
MX51_PAD_KEY_ROW2__KEY_ROW2,
MX51_PAD_KEY_ROW3__KEY_ROW3,
MX51_PAD_KEY_COL0__KEY_COL0,
MX51_PAD_KEY_COL1__KEY_COL1,
MX51_PAD_KEY_COL2__KEY_COL2,
MX51_PAD_KEY_COL3__KEY_COL3,
/* SD 1 */
MX51_PAD_SD1_CMD__SD1_CMD,
MX51_PAD_SD1_CLK__SD1_CLK,
MX51_PAD_SD1_DATA0__SD1_DATA0,
MX51_PAD_SD1_DATA1__SD1_DATA1,
MX51_PAD_SD1_DATA2__SD1_DATA2,
MX51_PAD_SD1_DATA3__SD1_DATA3,
/* SD 2 */
MX51_PAD_SD2_CMD__SD2_CMD,
MX51_PAD_SD2_CLK__SD2_CLK,
MX51_PAD_SD2_DATA0__SD2_DATA0,
MX51_PAD_SD2_DATA1__SD2_DATA1,
MX51_PAD_SD2_DATA2__SD2_DATA2,
MX51_PAD_SD2_DATA3__SD2_DATA3,
};
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static int mbimx51_keymap[] = {
KEY(0, 0, KEY_1),
KEY(0, 1, KEY_2),
KEY(0, 2, KEY_3),
KEY(0, 3, KEY_UP),
KEY(1, 0, KEY_4),
KEY(1, 1, KEY_5),
KEY(1, 2, KEY_6),
KEY(1, 3, KEY_LEFT),
KEY(2, 0, KEY_7),
KEY(2, 1, KEY_8),
KEY(2, 2, KEY_9),
KEY(2, 3, KEY_RIGHT),
KEY(3, 0, KEY_0),
KEY(3, 1, KEY_DOWN),
KEY(3, 2, KEY_ESC),
KEY(3, 3, KEY_ENTER),
};
static const struct matrix_keymap_data mbimx51_map_data __initconst = {
.keymap = mbimx51_keymap,
.keymap_size = ARRAY_SIZE(mbimx51_keymap),
};
static int tsc2007_get_pendown_state(void)
{
return !gpio_get_value(MBIMX51_TSC2007_GPIO);
}
struct tsc2007_platform_data tsc2007_data = {
.model = 2007,
.x_plate_ohms = 180,
.get_pendown_state = tsc2007_get_pendown_state,
};
static struct i2c_board_info mbimx51_i2c_devices[] = {
{
I2C_BOARD_INFO("tsc2007", 0x49),
.irq = MBIMX51_TSC2007_IRQ,
.platform_data = &tsc2007_data,
}, {
I2C_BOARD_INFO("tlv320aic23", 0x1a),
},
};
/*
* baseboard initialization.
*/
void __init eukrea_mbimx51_baseboard_init(void)
{
mxc_iomux_v3_setup_multiple_pads(mbimx51_pads,
ARRAY_SIZE(mbimx51_pads));
imx51_add_imx_uart(1, NULL);
imx51_add_imx_uart(2, &uart_pdata);
gpio_request(MBIMX51_LED0, "LED0");
gpio_direction_output(MBIMX51_LED0, 1);
gpio_free(MBIMX51_LED0);
gpio_request(MBIMX51_LED1, "LED1");
gpio_direction_output(MBIMX51_LED1, 1);
gpio_free(MBIMX51_LED1);
gpio_request(MBIMX51_LED2, "LED2");
gpio_direction_output(MBIMX51_LED2, 1);
gpio_free(MBIMX51_LED2);
gpio_request(MBIMX51_LED3, "LED3");
gpio_direction_output(MBIMX51_LED3, 1);
gpio_free(MBIMX51_LED3);
platform_add_devices(devices, ARRAY_SIZE(devices));
imx51_add_imx_keypad(&mbimx51_map_data);
gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq");
gpio_direction_input(MBIMX51_TSC2007_GPIO);
irq_set_irq_type(MBIMX51_TSC2007_IRQ, IRQF_TRIGGER_FALLING);
i2c_register_board_info(1, mbimx51_i2c_devices,
ARRAY_SIZE(mbimx51_i2c_devices));
imx51_add_sdhci_esdhc_imx(0, NULL);
imx51_add_sdhci_esdhc_imx(1, NULL);
}
| gpl-2.0 |
ch33kybutt/kernel_cmplus_tuna | drivers/telephony/ixj.c | 2284 | 319975 | /****************************************************************************
* ixj.c
*
* Device Driver for Quicknet Technologies, Inc.'s Telephony cards
* including the Internet PhoneJACK, Internet PhoneJACK Lite,
* Internet PhoneJACK PCI, Internet LineJACK, Internet PhoneCARD and
* SmartCABLE
*
* (c) Copyright 1999-2001 Quicknet Technologies, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* Author: Ed Okerson, <eokerson@quicknet.net>
*
* Contributors: Greg Herlein, <gherlein@quicknet.net>
* David W. Erhart, <derhart@quicknet.net>
* John Sellers, <jsellers@quicknet.net>
* Mike Preston, <mpreston@quicknet.net>
*
* Fixes: David Huggins-Daines, <dhd@cepstral.com>
* Fabio Ferrari, <fabio.ferrari@digitro.com.br>
* Artis Kugevics, <artis@mt.lv>
* Daniele Bellucci, <bellucda@tiscali.it>
*
* More information about the hardware related to this driver can be found
* at our website: http://www.quicknet.net
*
* IN NO EVENT SHALL QUICKNET TECHNOLOGIES, INC. BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF QUICKNET
* TECHNOLOGIES, INC. HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* QUICKNET TECHNOLOGIES, INC. SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND QUICKNET TECHNOLOGIES, INC. HAS NO OBLIGATION
* TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
*
***************************************************************************/
/*
* Revision 4.8 2003/07/09 19:39:00 Daniele Bellucci
* Audit some copy_*_user and minor cleanup.
*
* Revision 4.7 2001/08/13 06:19:33 craigs
* Added additional changes from Alan Cox and John Anderson for
* 2.2 to 2.4 cleanup and bounds checking
*
* Revision 4.6 2001/08/13 01:05:05 craigs
* Really fixed PHONE_QUERY_CODEC problem this time
*
* Revision 4.5 2001/08/13 00:11:03 craigs
* Fixed problem in handling of PHONE_QUERY_CODEC, thanks to Shane Anderson
*
* Revision 4.4 2001/08/07 07:58:12 craigs
* Changed back to three digit version numbers
* Added tagbuild target to allow automatic and easy tagging of versions
*
* Revision 4.3 2001/08/07 07:24:47 craigs
* Added ixj-ver.h to allow easy configuration management of driver
* Added display of version number in /prox/ixj
*
* Revision 4.2 2001/08/06 07:07:19 craigs
* Reverted IXJCTL_DSP_TYPE and IXJCTL_DSP_VERSION files to original
* behaviour of returning int rather than short *
*
* Revision 4.1 2001/08/05 00:17:37 craigs
* More changes for correct PCMCIA installation
* Start of changes for backward Linux compatibility
*
* Revision 4.0 2001/08/04 12:33:12 craigs
* New version using GNU autoconf
*
* Revision 3.105 2001/07/20 23:14:32 eokerson
* More work on CallerID generation when using ring cadences.
*
* Revision 3.104 2001/07/06 01:33:55 eokerson
* Some bugfixes from Robert Vojta <vojta@ipex.cz> and a few mods to the Makefile.
*
* Revision 3.103 2001/07/05 19:20:16 eokerson
* Updated HOWTO
* Changed mic gain to 30dB on Internet LineJACK mic/speaker port.
*
* Revision 3.102 2001/07/03 23:51:21 eokerson
* Un-mute mic on Internet LineJACK when in speakerphone mode.
*
* Revision 3.101 2001/07/02 19:26:56 eokerson
* Removed initialiazation of ixjdebug and ixj_convert_loaded so they will go in the .bss instead of the .data
*
* Revision 3.100 2001/07/02 19:18:27 eokerson
* Changed driver to make dynamic allocation possible. We now pass IXJ * between functions instead of array indexes.
* Fixed the way the POTS and PSTN ports interact during a PSTN call to allow local answering.
* Fixed speaker mode on Internet LineJACK.
*
* Revision 3.99 2001/05/09 14:11:16 eokerson
* Fixed kmalloc error in ixj_build_filter_cadence. Thanks David Chan <cat@waulogy.stanford.edu>.
*
* Revision 3.98 2001/05/08 19:55:33 eokerson
* Fixed POTS hookstate detection while it is connected to PSTN port.
*
* Revision 3.97 2001/05/08 00:01:04 eokerson
* Fixed kernel oops when sending caller ID data.
*
* Revision 3.96 2001/05/04 23:09:30 eokerson
* Now uses one kernel timer for each card, instead of one for the entire driver.
*
* Revision 3.95 2001/04/25 22:06:47 eokerson
* Fixed squawking at beginning of some G.723.1 calls.
*
* Revision 3.94 2001/04/03 23:42:00 eokerson
* Added linear volume ioctls
* Added raw filter load ioctl
*
* Revision 3.93 2001/02/27 01:00:06 eokerson
* Fixed blocking in CallerID.
* Reduced size of ixj structure for smaller driver footprint.
*
* Revision 3.92 2001/02/20 22:02:59 eokerson
* Fixed isapnp and pcmcia module compatibility for 2.4.x kernels.
* Improved PSTN ring detection.
* Fixed wink generation on POTS ports.
*
* Revision 3.91 2001/02/13 00:55:44 eokerson
* Turn AEC back on after changing frame sizes.
*
* Revision 3.90 2001/02/12 16:42:00 eokerson
* Added ALAW codec, thanks to Fabio Ferrari for the table based converters to make ALAW from ULAW.
*
* Revision 3.89 2001/02/12 15:41:16 eokerson
* Fix from Artis Kugevics - Tone gains were not being set correctly.
*
* Revision 3.88 2001/02/05 23:25:42 eokerson
* Fixed lockup bugs with deregister.
*
* Revision 3.87 2001/01/29 21:00:39 eokerson
* Fix from Fabio Ferrari <fabio.ferrari@digitro.com.br> to properly handle EAGAIN and EINTR during non-blocking write.
* Updated copyright date.
*
* Revision 3.86 2001/01/23 23:53:46 eokerson
* Fixes to G.729 compatibility.
*
* Revision 3.85 2001/01/23 21:30:36 eokerson
* Added verbage about cards supported.
* Removed commands that put the card in low power mode at some times that it should not be in low power mode.
*
* Revision 3.84 2001/01/22 23:32:10 eokerson
* Some bugfixes from David Huggins-Daines, <dhd@cepstral.com> and other cleanups.
*
* Revision 3.83 2001/01/19 14:51:41 eokerson
* Fixed ixj_WriteDSPCommand to decrement usage counter when command fails.
*
* Revision 3.82 2001/01/19 00:34:49 eokerson
* Added verbosity to write overlap errors.
*
* Revision 3.81 2001/01/18 23:56:54 eokerson
* Fixed PSTN line test functions.
*
* Revision 3.80 2001/01/18 22:29:27 eokerson
* Updated AEC/AGC values for different cards.
*
* Revision 3.79 2001/01/17 02:58:54 eokerson
* Fixed AEC reset after Caller ID.
* Fixed Codec lockup after Caller ID on Call Waiting when not using 30ms frames.
*
* Revision 3.78 2001/01/16 19:43:09 eokerson
* Added support for Linux 2.4.x kernels.
*
* Revision 3.77 2001/01/09 04:00:52 eokerson
* Linetest will now test the line, even if it has previously succeeded.
*
* Revision 3.76 2001/01/08 19:27:00 eokerson
* Fixed problem with standard cable on Internet PhoneCARD.
*
* Revision 3.75 2000/12/22 16:52:14 eokerson
* Modified to allow hookstate detection on the POTS port when the PSTN port is selected.
*
* Revision 3.74 2000/12/08 22:41:50 eokerson
* Added capability for G729B.
*
* Revision 3.73 2000/12/07 23:35:16 eokerson
* Added capability to have different ring pattern before CallerID data.
* Added hookstate checks in CallerID routines to stop FSK.
*
* Revision 3.72 2000/12/06 19:31:31 eokerson
* Modified signal behavior to only send one signal per event.
*
* Revision 3.71 2000/12/06 03:23:08 eokerson
* Fixed CallerID on Call Waiting.
*
* Revision 3.70 2000/12/04 21:29:37 eokerson
* Added checking to Smart Cable gain functions.
*
* Revision 3.69 2000/12/04 21:05:20 eokerson
* Changed ixjdebug levels.
* Added ioctls to change gains in Internet Phone CARD Smart Cable.
*
* Revision 3.68 2000/12/04 00:17:21 craigs
* Changed mixer voice gain to +6dB rather than 0dB
*
* Revision 3.67 2000/11/30 21:25:51 eokerson
* Fixed write signal errors.
*
* Revision 3.66 2000/11/29 22:42:44 eokerson
* Fixed PSTN ring detect problems.
*
* Revision 3.65 2000/11/29 07:31:55 craigs
* Added new 425Hz filter co-efficients
* Added card-specific DTMF prescaler initialisation
*
* Revision 3.64 2000/11/28 14:03:32 craigs
* Changed certain mixer initialisations to be 0dB rather than 12dB
* Added additional information to /proc/ixj
*
* Revision 3.63 2000/11/28 11:38:41 craigs
* Added display of AEC modes in AUTO and AGC mode
*
* Revision 3.62 2000/11/28 04:05:44 eokerson
* Improved PSTN ring detection routine.
*
* Revision 3.61 2000/11/27 21:53:12 eokerson
* Fixed flash detection.
*
* Revision 3.60 2000/11/27 15:57:29 eokerson
* More work on G.729 load routines.
*
* Revision 3.59 2000/11/25 21:55:12 eokerson
* Fixed errors in G.729 load routine.
*
* Revision 3.58 2000/11/25 04:08:29 eokerson
* Added board locks around G.729 and TS85 load routines.
*
* Revision 3.57 2000/11/24 05:35:17 craigs
* Added ability to retrieve mixer values on LineJACK
* Added complete initialisation of all mixer values at startup
* Fixed spelling mistake
*
* Revision 3.56 2000/11/23 02:52:11 robertj
* Added cvs change log keyword.
* Fixed bug in capabilities list when using G.729 module.
*
*/
#include "ixj-ver.h"
#define PERFMON_STATS
#define IXJDEBUG 0
#define MAXRINGS 5
#include <linux/module.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/kernel.h> /* printk() */
#include <linux/fs.h> /* everything... */
#include <linux/errno.h> /* error codes */
#include <linux/slab.h>
#include <linux/mutex.h>
#include <linux/mm.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/proc_fs.h>
#include <linux/poll.h>
#include <linux/timer.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <asm/io.h>
#include <asm/uaccess.h>
#include <linux/isapnp.h>
#include "ixj.h"
#define TYPE(inode) (iminor(inode) >> 4)
#define NUM(inode) (iminor(inode) & 0xf)
static DEFINE_MUTEX(ixj_mutex);
static int ixjdebug;
static int hertz = HZ;
static int samplerate = 100;
module_param(ixjdebug, int, 0);
static DEFINE_PCI_DEVICE_TABLE(ixj_pci_tbl) = {
{ PCI_VENDOR_ID_QUICKNET, PCI_DEVICE_ID_QUICKNET_XJ,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ }
};
MODULE_DEVICE_TABLE(pci, ixj_pci_tbl);
/************************************************************************
*
* ixjdebug meanings are now bit mapped instead of level based
* Values can be or'ed together to turn on multiple messages
*
* bit 0 (0x0001) = any failure
* bit 1 (0x0002) = general messages
* bit 2 (0x0004) = POTS ringing related
* bit 3 (0x0008) = PSTN events
* bit 4 (0x0010) = PSTN Cadence state details
* bit 5 (0x0020) = Tone detection triggers
* bit 6 (0x0040) = Tone detection cadence details
* bit 7 (0x0080) = ioctl tracking
* bit 8 (0x0100) = signal tracking
* bit 9 (0x0200) = CallerID generation details
*
************************************************************************/
#ifdef IXJ_DYN_ALLOC
static IXJ *ixj[IXJMAX];
#define get_ixj(b) ixj[(b)]
/*
* Allocate a free IXJ device
*/
static IXJ *ixj_alloc()
{
for(cnt=0; cnt<IXJMAX; cnt++)
{
if(ixj[cnt] == NULL || !ixj[cnt]->DSPbase)
{
j = kmalloc(sizeof(IXJ), GFP_KERNEL);
if (j == NULL)
return NULL;
ixj[cnt] = j;
return j;
}
}
return NULL;
}
static void ixj_fsk_free(IXJ *j)
{
kfree(j->fskdata);
j->fskdata = NULL;
}
static void ixj_fsk_alloc(IXJ *j)
{
if(!j->fskdata) {
j->fskdata = kmalloc(8000, GFP_KERNEL);
if (!j->fskdata) {
if(ixjdebug & 0x0200) {
printk("IXJ phone%d - allocate failed\n", j->board);
}
return;
} else {
j->fsksize = 8000;
if(ixjdebug & 0x0200) {
printk("IXJ phone%d - allocate succeeded\n", j->board);
}
}
}
}
#else
static IXJ ixj[IXJMAX];
#define get_ixj(b) (&ixj[(b)])
/*
* Allocate a free IXJ device
*/
static IXJ *ixj_alloc(void)
{
int cnt;
for(cnt=0; cnt<IXJMAX; cnt++) {
if(!ixj[cnt].DSPbase)
return &ixj[cnt];
}
return NULL;
}
static inline void ixj_fsk_free(IXJ *j) {;}
static inline void ixj_fsk_alloc(IXJ *j)
{
j->fsksize = 8000;
}
#endif
#ifdef PERFMON_STATS
#define ixj_perfmon(x) ((x)++)
#else
#define ixj_perfmon(x) do { } while(0)
#endif
static int ixj_convert_loaded;
static int ixj_WriteDSPCommand(unsigned short, IXJ *j);
/************************************************************************
*
* These are function definitions to allow external modules to register
* enhanced functionality call backs.
*
************************************************************************/
static int Stub(IXJ * J, unsigned long arg)
{
return 0;
}
static IXJ_REGFUNC ixj_PreRead = &Stub;
static IXJ_REGFUNC ixj_PostRead = &Stub;
static IXJ_REGFUNC ixj_PreWrite = &Stub;
static IXJ_REGFUNC ixj_PostWrite = &Stub;
static void ixj_read_frame(IXJ *j);
static void ixj_write_frame(IXJ *j);
static void ixj_init_timer(IXJ *j);
static void ixj_add_timer(IXJ * j);
static void ixj_timeout(unsigned long ptr);
static int read_filters(IXJ *j);
static int LineMonitor(IXJ *j);
static int ixj_fasync(int fd, struct file *, int mode);
static int ixj_set_port(IXJ *j, int arg);
static int ixj_set_pots(IXJ *j, int arg);
static int ixj_hookstate(IXJ *j);
static int ixj_record_start(IXJ *j);
static void ixj_record_stop(IXJ *j);
static void set_rec_volume(IXJ *j, int volume);
static int get_rec_volume(IXJ *j);
static int set_rec_codec(IXJ *j, int rate);
static void ixj_vad(IXJ *j, int arg);
static int ixj_play_start(IXJ *j);
static void ixj_play_stop(IXJ *j);
static int ixj_set_tone_on(unsigned short arg, IXJ *j);
static int ixj_set_tone_off(unsigned short, IXJ *j);
static int ixj_play_tone(IXJ *j, char tone);
static void ixj_aec_start(IXJ *j, int level);
static int idle(IXJ *j);
static void ixj_ring_on(IXJ *j);
static void ixj_ring_off(IXJ *j);
static void aec_stop(IXJ *j);
static void ixj_ringback(IXJ *j);
static void ixj_busytone(IXJ *j);
static void ixj_dialtone(IXJ *j);
static void ixj_cpt_stop(IXJ *j);
static char daa_int_read(IXJ *j);
static char daa_CR_read(IXJ *j, int cr);
static int daa_set_mode(IXJ *j, int mode);
static int ixj_linetest(IXJ *j);
static int ixj_daa_write(IXJ *j);
static int ixj_daa_cid_read(IXJ *j);
static void DAA_Coeff_US(IXJ *j);
static void DAA_Coeff_UK(IXJ *j);
static void DAA_Coeff_France(IXJ *j);
static void DAA_Coeff_Germany(IXJ *j);
static void DAA_Coeff_Australia(IXJ *j);
static void DAA_Coeff_Japan(IXJ *j);
static int ixj_init_filter(IXJ *j, IXJ_FILTER * jf);
static int ixj_init_filter_raw(IXJ *j, IXJ_FILTER_RAW * jfr);
static int ixj_init_tone(IXJ *j, IXJ_TONE * ti);
static int ixj_build_cadence(IXJ *j, IXJ_CADENCE __user * cp);
static int ixj_build_filter_cadence(IXJ *j, IXJ_FILTER_CADENCE __user * cp);
/* Serial Control Interface funtions */
static int SCI_Control(IXJ *j, int control);
static int SCI_Prepare(IXJ *j);
static int SCI_WaitHighSCI(IXJ *j);
static int SCI_WaitLowSCI(IXJ *j);
static DWORD PCIEE_GetSerialNumber(WORD wAddress);
static int ixj_PCcontrol_wait(IXJ *j);
static void ixj_pre_cid(IXJ *j);
static void ixj_write_cid(IXJ *j);
static void ixj_write_cid_bit(IXJ *j, int bit);
static int set_base_frame(IXJ *j, int size);
static int set_play_codec(IXJ *j, int rate);
static void set_rec_depth(IXJ *j, int depth);
static int ixj_mixer(long val, IXJ *j);
/************************************************************************
CT8020/CT8021 Host Programmers Model
Host address Function Access
DSPbase +
0-1 Aux Software Status Register (reserved) Read Only
2-3 Software Status Register Read Only
4-5 Aux Software Control Register (reserved) Read Write
6-7 Software Control Register Read Write
8-9 Hardware Status Register Read Only
A-B Hardware Control Register Read Write
C-D Host Transmit (Write) Data Buffer Access Port (buffer input)Write Only
E-F Host Receive (Read) Data Buffer Access Port (buffer input) Read Only
************************************************************************/
static inline void ixj_read_HSR(IXJ *j)
{
j->hsr.bytes.low = inb_p(j->DSPbase + 8);
j->hsr.bytes.high = inb_p(j->DSPbase + 9);
}
static inline int IsControlReady(IXJ *j)
{
ixj_read_HSR(j);
return j->hsr.bits.controlrdy ? 1 : 0;
}
static inline int IsPCControlReady(IXJ *j)
{
j->pccr1.byte = inb_p(j->XILINXbase + 3);
return j->pccr1.bits.crr ? 1 : 0;
}
static inline int IsStatusReady(IXJ *j)
{
ixj_read_HSR(j);
return j->hsr.bits.statusrdy ? 1 : 0;
}
static inline int IsRxReady(IXJ *j)
{
ixj_read_HSR(j);
ixj_perfmon(j->rxreadycheck);
return j->hsr.bits.rxrdy ? 1 : 0;
}
static inline int IsTxReady(IXJ *j)
{
ixj_read_HSR(j);
ixj_perfmon(j->txreadycheck);
return j->hsr.bits.txrdy ? 1 : 0;
}
static inline void set_play_volume(IXJ *j, int volume)
{
if (ixjdebug & 0x0002)
printk(KERN_INFO "IXJ: /dev/phone%d Setting Play Volume to 0x%4.4x\n", j->board, volume);
ixj_WriteDSPCommand(0xCF02, j);
ixj_WriteDSPCommand(volume, j);
}
static int set_play_volume_linear(IXJ *j, int volume)
{
int newvolume, dspplaymax;
if (ixjdebug & 0x0002)
printk(KERN_INFO "IXJ: /dev/phone %d Setting Linear Play Volume to 0x%4.4x\n", j->board, volume);
if(volume > 100 || volume < 0) {
return -1;
}
/* This should normalize the perceived volumes between the different cards caused by differences in the hardware */
switch (j->cardtype) {
case QTI_PHONEJACK:
dspplaymax = 0x380;
break;
case QTI_LINEJACK:
if(j->port == PORT_PSTN) {
dspplaymax = 0x48;
} else {
dspplaymax = 0x100;
}
break;
case QTI_PHONEJACK_LITE:
dspplaymax = 0x380;
break;
case QTI_PHONEJACK_PCI:
dspplaymax = 0x6C;
break;
case QTI_PHONECARD:
dspplaymax = 0x50;
break;
default:
return -1;
}
newvolume = (dspplaymax * volume) / 100;
set_play_volume(j, newvolume);
return 0;
}
static inline void set_play_depth(IXJ *j, int depth)
{
if (depth > 60)
depth = 60;
if (depth < 0)
depth = 0;
ixj_WriteDSPCommand(0x5280 + depth, j);
}
static inline int get_play_volume(IXJ *j)
{
ixj_WriteDSPCommand(0xCF00, j);
return j->ssr.high << 8 | j->ssr.low;
}
static int get_play_volume_linear(IXJ *j)
{
int volume, newvolume, dspplaymax;
/* This should normalize the perceived volumes between the different cards caused by differences in the hardware */
switch (j->cardtype) {
case QTI_PHONEJACK:
dspplaymax = 0x380;
break;
case QTI_LINEJACK:
if(j->port == PORT_PSTN) {
dspplaymax = 0x48;
} else {
dspplaymax = 0x100;
}
break;
case QTI_PHONEJACK_LITE:
dspplaymax = 0x380;
break;
case QTI_PHONEJACK_PCI:
dspplaymax = 0x6C;
break;
case QTI_PHONECARD:
dspplaymax = 100;
break;
default:
return -1;
}
volume = get_play_volume(j);
newvolume = (volume * 100) / dspplaymax;
if(newvolume > 100)
newvolume = 100;
return newvolume;
}
static inline BYTE SLIC_GetState(IXJ *j)
{
if (j->cardtype == QTI_PHONECARD) {
j->pccr1.byte = 0;
j->psccr.bits.dev = 3;
j->psccr.bits.rw = 1;
outw_p(j->psccr.byte << 8, j->XILINXbase + 0x00);
ixj_PCcontrol_wait(j);
j->pslic.byte = inw_p(j->XILINXbase + 0x00) & 0xFF;
ixj_PCcontrol_wait(j);
if (j->pslic.bits.powerdown)
return PLD_SLIC_STATE_OC;
else if (!j->pslic.bits.ring0 && !j->pslic.bits.ring1)
return PLD_SLIC_STATE_ACTIVE;
else
return PLD_SLIC_STATE_RINGING;
} else {
j->pld_slicr.byte = inb_p(j->XILINXbase + 0x01);
}
return j->pld_slicr.bits.state;
}
static bool SLIC_SetState(BYTE byState, IXJ *j)
{
bool fRetVal = false;
if (j->cardtype == QTI_PHONECARD) {
if (j->flags.pcmciasct) {
switch (byState) {
case PLD_SLIC_STATE_TIPOPEN:
case PLD_SLIC_STATE_OC:
j->pslic.bits.powerdown = 1;
j->pslic.bits.ring0 = j->pslic.bits.ring1 = 0;
fRetVal = true;
break;
case PLD_SLIC_STATE_RINGING:
if (j->readers || j->writers) {
j->pslic.bits.powerdown = 0;
j->pslic.bits.ring0 = 1;
j->pslic.bits.ring1 = 0;
fRetVal = true;
}
break;
case PLD_SLIC_STATE_OHT: /* On-hook transmit */
case PLD_SLIC_STATE_STANDBY:
case PLD_SLIC_STATE_ACTIVE:
if (j->readers || j->writers) {
j->pslic.bits.powerdown = 0;
} else {
j->pslic.bits.powerdown = 1;
}
j->pslic.bits.ring0 = j->pslic.bits.ring1 = 0;
fRetVal = true;
break;
case PLD_SLIC_STATE_APR: /* Active polarity reversal */
case PLD_SLIC_STATE_OHTPR: /* OHT polarity reversal */
default:
fRetVal = false;
break;
}
j->psccr.bits.dev = 3;
j->psccr.bits.rw = 0;
outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
ixj_PCcontrol_wait(j);
}
} else {
/* Set the C1, C2, C3 & B2EN signals. */
switch (byState) {
case PLD_SLIC_STATE_OC:
j->pld_slicw.bits.c1 = 0;
j->pld_slicw.bits.c2 = 0;
j->pld_slicw.bits.c3 = 0;
j->pld_slicw.bits.b2en = 0;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
fRetVal = true;
break;
case PLD_SLIC_STATE_RINGING:
j->pld_slicw.bits.c1 = 1;
j->pld_slicw.bits.c2 = 0;
j->pld_slicw.bits.c3 = 0;
j->pld_slicw.bits.b2en = 1;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
fRetVal = true;
break;
case PLD_SLIC_STATE_ACTIVE:
j->pld_slicw.bits.c1 = 0;
j->pld_slicw.bits.c2 = 1;
j->pld_slicw.bits.c3 = 0;
j->pld_slicw.bits.b2en = 0;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
fRetVal = true;
break;
case PLD_SLIC_STATE_OHT: /* On-hook transmit */
j->pld_slicw.bits.c1 = 1;
j->pld_slicw.bits.c2 = 1;
j->pld_slicw.bits.c3 = 0;
j->pld_slicw.bits.b2en = 0;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
fRetVal = true;
break;
case PLD_SLIC_STATE_TIPOPEN:
j->pld_slicw.bits.c1 = 0;
j->pld_slicw.bits.c2 = 0;
j->pld_slicw.bits.c3 = 1;
j->pld_slicw.bits.b2en = 0;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
fRetVal = true;
break;
case PLD_SLIC_STATE_STANDBY:
j->pld_slicw.bits.c1 = 1;
j->pld_slicw.bits.c2 = 0;
j->pld_slicw.bits.c3 = 1;
j->pld_slicw.bits.b2en = 1;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
fRetVal = true;
break;
case PLD_SLIC_STATE_APR: /* Active polarity reversal */
j->pld_slicw.bits.c1 = 0;
j->pld_slicw.bits.c2 = 1;
j->pld_slicw.bits.c3 = 1;
j->pld_slicw.bits.b2en = 0;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
fRetVal = true;
break;
case PLD_SLIC_STATE_OHTPR: /* OHT polarity reversal */
j->pld_slicw.bits.c1 = 1;
j->pld_slicw.bits.c2 = 1;
j->pld_slicw.bits.c3 = 1;
j->pld_slicw.bits.b2en = 0;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
fRetVal = true;
break;
default:
fRetVal = false;
break;
}
}
return fRetVal;
}
static int ixj_wink(IXJ *j)
{
BYTE slicnow;
slicnow = SLIC_GetState(j);
j->pots_winkstart = jiffies;
SLIC_SetState(PLD_SLIC_STATE_OC, j);
msleep(jiffies_to_msecs(j->winktime));
SLIC_SetState(slicnow, j);
return 0;
}
static void ixj_init_timer(IXJ *j)
{
init_timer(&j->timer);
j->timer.function = ixj_timeout;
j->timer.data = (unsigned long)j;
}
static void ixj_add_timer(IXJ *j)
{
j->timer.expires = jiffies + (hertz / samplerate);
add_timer(&j->timer);
}
static void ixj_tone_timeout(IXJ *j)
{
IXJ_TONE ti;
j->tone_state++;
if (j->tone_state == 3) {
j->tone_state = 0;
if (j->cadence_t) {
j->tone_cadence_state++;
if (j->tone_cadence_state >= j->cadence_t->elements_used) {
switch (j->cadence_t->termination) {
case PLAY_ONCE:
ixj_cpt_stop(j);
break;
case REPEAT_LAST_ELEMENT:
j->tone_cadence_state--;
ixj_play_tone(j, j->cadence_t->ce[j->tone_cadence_state].index);
break;
case REPEAT_ALL:
j->tone_cadence_state = 0;
if (j->cadence_t->ce[j->tone_cadence_state].freq0) {
ti.tone_index = j->cadence_t->ce[j->tone_cadence_state].index;
ti.freq0 = j->cadence_t->ce[j->tone_cadence_state].freq0;
ti.gain0 = j->cadence_t->ce[j->tone_cadence_state].gain0;
ti.freq1 = j->cadence_t->ce[j->tone_cadence_state].freq1;
ti.gain1 = j->cadence_t->ce[j->tone_cadence_state].gain1;
ixj_init_tone(j, &ti);
}
ixj_set_tone_on(j->cadence_t->ce[0].tone_on_time, j);
ixj_set_tone_off(j->cadence_t->ce[0].tone_off_time, j);
ixj_play_tone(j, j->cadence_t->ce[0].index);
break;
}
} else {
if (j->cadence_t->ce[j->tone_cadence_state].gain0) {
ti.tone_index = j->cadence_t->ce[j->tone_cadence_state].index;
ti.freq0 = j->cadence_t->ce[j->tone_cadence_state].freq0;
ti.gain0 = j->cadence_t->ce[j->tone_cadence_state].gain0;
ti.freq1 = j->cadence_t->ce[j->tone_cadence_state].freq1;
ti.gain1 = j->cadence_t->ce[j->tone_cadence_state].gain1;
ixj_init_tone(j, &ti);
}
ixj_set_tone_on(j->cadence_t->ce[j->tone_cadence_state].tone_on_time, j);
ixj_set_tone_off(j->cadence_t->ce[j->tone_cadence_state].tone_off_time, j);
ixj_play_tone(j, j->cadence_t->ce[j->tone_cadence_state].index);
}
}
}
}
static inline void ixj_kill_fasync(IXJ *j, IXJ_SIGEVENT event, int dir)
{
if(j->ixj_signals[event]) {
if(ixjdebug & 0x0100)
printk("Sending signal for event %d\n", event);
/* Send apps notice of change */
/* see config.h for macro definition */
kill_fasync(&(j->async_queue), j->ixj_signals[event], dir);
}
}
static void ixj_pstn_state(IXJ *j)
{
int var;
union XOPXR0 XR0, daaint;
var = 10;
XR0.reg = j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.reg;
daaint.reg = 0;
XR0.bitreg.RMR = j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.bitreg.RMR;
j->pld_scrr.byte = inb_p(j->XILINXbase);
if (j->pld_scrr.bits.daaflag) {
daa_int_read(j);
if(j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.RING) {
if(time_after(jiffies, j->pstn_sleeptil) && !(j->flags.pots_pstn && j->hookstate)) {
daaint.bitreg.RING = 1;
if(ixjdebug & 0x0008) {
printk(KERN_INFO "IXJ DAA Ring Interrupt /dev/phone%d at %ld\n", j->board, jiffies);
}
} else {
daa_set_mode(j, SOP_PU_RESET);
}
}
if(j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.Caller_ID) {
daaint.bitreg.Caller_ID = 1;
j->pstn_cid_intr = 1;
j->pstn_cid_received = jiffies;
if(ixjdebug & 0x0008) {
printk(KERN_INFO "IXJ DAA Caller_ID Interrupt /dev/phone%d at %ld\n", j->board, jiffies);
}
}
if(j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.Cadence) {
daaint.bitreg.Cadence = 1;
if(ixjdebug & 0x0008) {
printk(KERN_INFO "IXJ DAA Cadence Interrupt /dev/phone%d at %ld\n", j->board, jiffies);
}
}
if(j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.VDD_OK != XR0.bitreg.VDD_OK) {
daaint.bitreg.VDD_OK = 1;
daaint.bitreg.SI_0 = j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.VDD_OK;
}
}
daa_CR_read(j, 1);
if(j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.bitreg.RMR != XR0.bitreg.RMR && time_after(jiffies, j->pstn_sleeptil) && !(j->flags.pots_pstn && j->hookstate)) {
daaint.bitreg.RMR = 1;
daaint.bitreg.SI_1 = j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.bitreg.RMR;
if(ixjdebug & 0x0008) {
printk(KERN_INFO "IXJ DAA RMR /dev/phone%d was %s for %ld\n", j->board, XR0.bitreg.RMR?"on":"off", jiffies - j->pstn_last_rmr);
}
j->pstn_prev_rmr = j->pstn_last_rmr;
j->pstn_last_rmr = jiffies;
}
switch(j->daa_mode) {
case SOP_PU_SLEEP:
if (daaint.bitreg.RING) {
if (!j->flags.pstn_ringing) {
if (j->daa_mode != SOP_PU_RINGING) {
j->pstn_ring_int = jiffies;
daa_set_mode(j, SOP_PU_RINGING);
}
}
}
break;
case SOP_PU_RINGING:
if (daaint.bitreg.RMR) {
if (ixjdebug & 0x0008) {
printk(KERN_INFO "IXJ Ring Cadence a state = %d /dev/phone%d at %ld\n", j->cadence_f[4].state, j->board, jiffies);
}
if (daaint.bitreg.SI_1) { /* Rising edge of RMR */
j->flags.pstn_rmr = 1;
j->pstn_ring_start = jiffies;
j->pstn_ring_stop = 0;
j->ex.bits.pstn_ring = 0;
if (j->cadence_f[4].state == 0) {
j->cadence_f[4].state = 1;
j->cadence_f[4].on1min = jiffies + (long)((j->cadence_f[4].on1 * hertz * (100 - var)) / 10000);
j->cadence_f[4].on1dot = jiffies + (long)((j->cadence_f[4].on1 * hertz * (100)) / 10000);
j->cadence_f[4].on1max = jiffies + (long)((j->cadence_f[4].on1 * hertz * (100 + var)) / 10000);
} else if (j->cadence_f[4].state == 2) {
if((time_after(jiffies, j->cadence_f[4].off1min) &&
time_before(jiffies, j->cadence_f[4].off1max))) {
if (j->cadence_f[4].on2) {
j->cadence_f[4].state = 3;
j->cadence_f[4].on2min = jiffies + (long)((j->cadence_f[4].on2 * (hertz * (100 - var)) / 10000));
j->cadence_f[4].on2dot = jiffies + (long)((j->cadence_f[4].on2 * (hertz * (100)) / 10000));
j->cadence_f[4].on2max = jiffies + (long)((j->cadence_f[4].on2 * (hertz * (100 + var)) / 10000));
} else {
j->cadence_f[4].state = 7;
}
} else {
if (ixjdebug & 0x0008) {
printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
j->cadence_f[4].off1);
}
j->cadence_f[4].state = 0;
}
} else if (j->cadence_f[4].state == 4) {
if((time_after(jiffies, j->cadence_f[4].off2min) &&
time_before(jiffies, j->cadence_f[4].off2max))) {
if (j->cadence_f[4].on3) {
j->cadence_f[4].state = 5;
j->cadence_f[4].on3min = jiffies + (long)((j->cadence_f[4].on3 * (hertz * (100 - var)) / 10000));
j->cadence_f[4].on3dot = jiffies + (long)((j->cadence_f[4].on3 * (hertz * (100)) / 10000));
j->cadence_f[4].on3max = jiffies + (long)((j->cadence_f[4].on3 * (hertz * (100 + var)) / 10000));
} else {
j->cadence_f[4].state = 7;
}
} else {
if (ixjdebug & 0x0008) {
printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
j->cadence_f[4].off2);
}
j->cadence_f[4].state = 0;
}
} else if (j->cadence_f[4].state == 6) {
if((time_after(jiffies, j->cadence_f[4].off3min) &&
time_before(jiffies, j->cadence_f[4].off3max))) {
j->cadence_f[4].state = 7;
} else {
if (ixjdebug & 0x0008) {
printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
j->cadence_f[4].off3);
}
j->cadence_f[4].state = 0;
}
} else {
j->cadence_f[4].state = 0;
}
} else { /* Falling edge of RMR */
j->pstn_ring_start = 0;
j->pstn_ring_stop = jiffies;
if (j->cadence_f[4].state == 1) {
if(!j->cadence_f[4].on1) {
j->cadence_f[4].state = 7;
} else if((time_after(jiffies, j->cadence_f[4].on1min) &&
time_before(jiffies, j->cadence_f[4].on1max))) {
if (j->cadence_f[4].off1) {
j->cadence_f[4].state = 2;
j->cadence_f[4].off1min = jiffies + (long)((j->cadence_f[4].off1 * (hertz * (100 - var)) / 10000));
j->cadence_f[4].off1dot = jiffies + (long)((j->cadence_f[4].off1 * (hertz * (100)) / 10000));
j->cadence_f[4].off1max = jiffies + (long)((j->cadence_f[4].off1 * (hertz * (100 + var)) / 10000));
} else {
j->cadence_f[4].state = 7;
}
} else {
if (ixjdebug & 0x0008) {
printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
j->cadence_f[4].on1);
}
j->cadence_f[4].state = 0;
}
} else if (j->cadence_f[4].state == 3) {
if((time_after(jiffies, j->cadence_f[4].on2min) &&
time_before(jiffies, j->cadence_f[4].on2max))) {
if (j->cadence_f[4].off2) {
j->cadence_f[4].state = 4;
j->cadence_f[4].off2min = jiffies + (long)((j->cadence_f[4].off2 * (hertz * (100 - var)) / 10000));
j->cadence_f[4].off2dot = jiffies + (long)((j->cadence_f[4].off2 * (hertz * (100)) / 10000));
j->cadence_f[4].off2max = jiffies + (long)((j->cadence_f[4].off2 * (hertz * (100 + var)) / 10000));
} else {
j->cadence_f[4].state = 7;
}
} else {
if (ixjdebug & 0x0008) {
printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
j->cadence_f[4].on2);
}
j->cadence_f[4].state = 0;
}
} else if (j->cadence_f[4].state == 5) {
if((time_after(jiffies, j->cadence_f[4].on3min) &&
time_before(jiffies, j->cadence_f[4].on3max))) {
if (j->cadence_f[4].off3) {
j->cadence_f[4].state = 6;
j->cadence_f[4].off3min = jiffies + (long)((j->cadence_f[4].off3 * (hertz * (100 - var)) / 10000));
j->cadence_f[4].off3dot = jiffies + (long)((j->cadence_f[4].off3 * (hertz * (100)) / 10000));
j->cadence_f[4].off3max = jiffies + (long)((j->cadence_f[4].off3 * (hertz * (100 + var)) / 10000));
} else {
j->cadence_f[4].state = 7;
}
} else {
j->cadence_f[4].state = 0;
}
} else {
if (ixjdebug & 0x0008) {
printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
j->cadence_f[4].on3);
}
j->cadence_f[4].state = 0;
}
}
if (ixjdebug & 0x0010) {
printk(KERN_INFO "IXJ Ring Cadence b state = %d /dev/phone%d at %ld\n", j->cadence_f[4].state, j->board, jiffies);
}
if (ixjdebug & 0x0010) {
switch(j->cadence_f[4].state) {
case 1:
printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
j->cadence_f[4].on1, j->cadence_f[4].on1min, j->cadence_f[4].on1dot, j->cadence_f[4].on1max);
break;
case 2:
printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
j->cadence_f[4].off1, j->cadence_f[4].off1min, j->cadence_f[4].off1dot, j->cadence_f[4].off1max);
break;
case 3:
printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
j->cadence_f[4].on2, j->cadence_f[4].on2min, j->cadence_f[4].on2dot, j->cadence_f[4].on2max);
break;
case 4:
printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
j->cadence_f[4].off2, j->cadence_f[4].off2min, j->cadence_f[4].off2dot, j->cadence_f[4].off2max);
break;
case 5:
printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
j->cadence_f[4].on3, j->cadence_f[4].on3min, j->cadence_f[4].on3dot, j->cadence_f[4].on3max);
break;
case 6:
printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
j->cadence_f[4].off3, j->cadence_f[4].off3min, j->cadence_f[4].off3dot, j->cadence_f[4].off3max);
break;
}
}
}
if (j->cadence_f[4].state == 7) {
j->cadence_f[4].state = 0;
j->pstn_ring_stop = jiffies;
j->ex.bits.pstn_ring = 1;
ixj_kill_fasync(j, SIG_PSTN_RING, POLL_IN);
if(ixjdebug & 0x0008) {
printk(KERN_INFO "IXJ Ring int set /dev/phone%d at %ld\n", j->board, jiffies);
}
}
if((j->pstn_ring_int != 0 && time_after(jiffies, j->pstn_ring_int + (hertz * 5)) && !j->flags.pstn_rmr) ||
(j->pstn_ring_stop != 0 && time_after(jiffies, j->pstn_ring_stop + (hertz * 5)))) {
if(ixjdebug & 0x0008) {
printk("IXJ DAA no ring in 5 seconds /dev/phone%d at %ld\n", j->board, jiffies);
printk("IXJ DAA pstn ring int /dev/phone%d at %ld\n", j->board, j->pstn_ring_int);
printk("IXJ DAA pstn ring stop /dev/phone%d at %ld\n", j->board, j->pstn_ring_stop);
}
j->pstn_ring_stop = j->pstn_ring_int = 0;
daa_set_mode(j, SOP_PU_SLEEP);
}
outb_p(j->pld_scrw.byte, j->XILINXbase);
if (j->pstn_cid_intr && time_after(jiffies, j->pstn_cid_received + hertz)) {
ixj_daa_cid_read(j);
j->ex.bits.caller_id = 1;
ixj_kill_fasync(j, SIG_CALLER_ID, POLL_IN);
j->pstn_cid_intr = 0;
}
if (daaint.bitreg.Cadence) {
if(ixjdebug & 0x0008) {
printk("IXJ DAA Cadence interrupt going to sleep /dev/phone%d\n", j->board);
}
daa_set_mode(j, SOP_PU_SLEEP);
j->ex.bits.pstn_ring = 0;
}
break;
case SOP_PU_CONVERSATION:
if (daaint.bitreg.VDD_OK) {
if(!daaint.bitreg.SI_0) {
if (!j->pstn_winkstart) {
if(ixjdebug & 0x0008) {
printk("IXJ DAA possible wink /dev/phone%d %ld\n", j->board, jiffies);
}
j->pstn_winkstart = jiffies;
}
} else {
if (j->pstn_winkstart) {
if(ixjdebug & 0x0008) {
printk("IXJ DAA possible wink end /dev/phone%d %ld\n", j->board, jiffies);
}
j->pstn_winkstart = 0;
}
}
}
if (j->pstn_winkstart && time_after(jiffies, j->pstn_winkstart + ((hertz * j->winktime) / 1000))) {
if(ixjdebug & 0x0008) {
printk("IXJ DAA wink detected going to sleep /dev/phone%d %ld\n", j->board, jiffies);
}
daa_set_mode(j, SOP_PU_SLEEP);
j->pstn_winkstart = 0;
j->ex.bits.pstn_wink = 1;
ixj_kill_fasync(j, SIG_PSTN_WINK, POLL_IN);
}
break;
}
}
static void ixj_timeout(unsigned long ptr)
{
int board;
unsigned long jifon;
IXJ *j = (IXJ *)ptr;
board = j->board;
if (j->DSPbase && atomic_read(&j->DSPWrite) == 0 && test_and_set_bit(board, (void *)&j->busyflags) == 0) {
ixj_perfmon(j->timerchecks);
j->hookstate = ixj_hookstate(j);
if (j->tone_state) {
if (!(j->hookstate)) {
ixj_cpt_stop(j);
if (j->m_hook) {
j->m_hook = 0;
j->ex.bits.hookstate = 1;
ixj_kill_fasync(j, SIG_HOOKSTATE, POLL_IN);
}
clear_bit(board, &j->busyflags);
ixj_add_timer(j);
return;
}
if (j->tone_state == 1)
jifon = ((hertz * j->tone_on_time) * 25 / 100000);
else
jifon = ((hertz * j->tone_on_time) * 25 / 100000) + ((hertz * j->tone_off_time) * 25 / 100000);
if (time_before(jiffies, j->tone_start_jif + jifon)) {
if (j->tone_state == 1) {
ixj_play_tone(j, j->tone_index);
if (j->dsp.low == 0x20) {
clear_bit(board, &j->busyflags);
ixj_add_timer(j);
return;
}
} else {
ixj_play_tone(j, 0);
if (j->dsp.low == 0x20) {
clear_bit(board, &j->busyflags);
ixj_add_timer(j);
return;
}
}
} else {
ixj_tone_timeout(j);
if (j->flags.dialtone) {
ixj_dialtone(j);
}
if (j->flags.busytone) {
ixj_busytone(j);
if (j->dsp.low == 0x20) {
clear_bit(board, &j->busyflags);
ixj_add_timer(j);
return;
}
}
if (j->flags.ringback) {
ixj_ringback(j);
if (j->dsp.low == 0x20) {
clear_bit(board, &j->busyflags);
ixj_add_timer(j);
return;
}
}
if (!j->tone_state) {
ixj_cpt_stop(j);
}
}
}
if (!(j->tone_state && j->dsp.low == 0x20)) {
if (IsRxReady(j)) {
ixj_read_frame(j);
}
if (IsTxReady(j)) {
ixj_write_frame(j);
}
}
if (j->flags.cringing) {
if (j->hookstate & 1) {
j->flags.cringing = 0;
ixj_ring_off(j);
} else if(j->cadence_f[5].enable && ((!j->cadence_f[5].en_filter) || (j->cadence_f[5].en_filter && j->flags.firstring))) {
switch(j->cadence_f[5].state) {
case 0:
j->cadence_f[5].on1dot = jiffies + (long)((j->cadence_f[5].on1 * (hertz * 100) / 10000));
if (time_before(jiffies, j->cadence_f[5].on1dot)) {
if(ixjdebug & 0x0004) {
printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
}
ixj_ring_on(j);
}
j->cadence_f[5].state = 1;
break;
case 1:
if (time_after(jiffies, j->cadence_f[5].on1dot)) {
j->cadence_f[5].off1dot = jiffies + (long)((j->cadence_f[5].off1 * (hertz * 100) / 10000));
if(ixjdebug & 0x0004) {
printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
}
ixj_ring_off(j);
j->cadence_f[5].state = 2;
}
break;
case 2:
if (time_after(jiffies, j->cadence_f[5].off1dot)) {
if(ixjdebug & 0x0004) {
printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
}
ixj_ring_on(j);
if (j->cadence_f[5].on2) {
j->cadence_f[5].on2dot = jiffies + (long)((j->cadence_f[5].on2 * (hertz * 100) / 10000));
j->cadence_f[5].state = 3;
} else {
j->cadence_f[5].state = 7;
}
}
break;
case 3:
if (time_after(jiffies, j->cadence_f[5].on2dot)) {
if(ixjdebug & 0x0004) {
printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
}
ixj_ring_off(j);
if (j->cadence_f[5].off2) {
j->cadence_f[5].off2dot = jiffies + (long)((j->cadence_f[5].off2 * (hertz * 100) / 10000));
j->cadence_f[5].state = 4;
} else {
j->cadence_f[5].state = 7;
}
}
break;
case 4:
if (time_after(jiffies, j->cadence_f[5].off2dot)) {
if(ixjdebug & 0x0004) {
printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
}
ixj_ring_on(j);
if (j->cadence_f[5].on3) {
j->cadence_f[5].on3dot = jiffies + (long)((j->cadence_f[5].on3 * (hertz * 100) / 10000));
j->cadence_f[5].state = 5;
} else {
j->cadence_f[5].state = 7;
}
}
break;
case 5:
if (time_after(jiffies, j->cadence_f[5].on3dot)) {
if(ixjdebug & 0x0004) {
printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
}
ixj_ring_off(j);
if (j->cadence_f[5].off3) {
j->cadence_f[5].off3dot = jiffies + (long)((j->cadence_f[5].off3 * (hertz * 100) / 10000));
j->cadence_f[5].state = 6;
} else {
j->cadence_f[5].state = 7;
}
}
break;
case 6:
if (time_after(jiffies, j->cadence_f[5].off3dot)) {
if(ixjdebug & 0x0004) {
printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
}
j->cadence_f[5].state = 7;
}
break;
case 7:
if(ixjdebug & 0x0004) {
printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
}
j->flags.cidring = 1;
j->cadence_f[5].state = 0;
break;
}
if (j->flags.cidring && !j->flags.cidsent) {
j->flags.cidsent = 1;
if(j->fskdcnt) {
SLIC_SetState(PLD_SLIC_STATE_OHT, j);
ixj_pre_cid(j);
}
j->flags.cidring = 0;
}
clear_bit(board, &j->busyflags);
ixj_add_timer(j);
return;
} else {
if (time_after(jiffies, j->ring_cadence_jif + (hertz / 2))) {
if (j->flags.cidring && !j->flags.cidsent) {
j->flags.cidsent = 1;
if(j->fskdcnt) {
SLIC_SetState(PLD_SLIC_STATE_OHT, j);
ixj_pre_cid(j);
}
j->flags.cidring = 0;
}
j->ring_cadence_t--;
if (j->ring_cadence_t == -1)
j->ring_cadence_t = 15;
j->ring_cadence_jif = jiffies;
if (j->ring_cadence & 1 << j->ring_cadence_t) {
if(j->flags.cidsent && j->cadence_f[5].en_filter)
j->flags.firstring = 1;
else
ixj_ring_on(j);
} else {
ixj_ring_off(j);
if(!j->flags.cidsent)
j->flags.cidring = 1;
}
}
clear_bit(board, &j->busyflags);
ixj_add_timer(j);
return;
}
}
if (!j->flags.ringing) {
if (j->hookstate) { /* & 1) { */
if (j->dsp.low != 0x20 &&
SLIC_GetState(j) != PLD_SLIC_STATE_ACTIVE) {
SLIC_SetState(PLD_SLIC_STATE_ACTIVE, j);
}
LineMonitor(j);
read_filters(j);
ixj_WriteDSPCommand(0x511B, j);
j->proc_load = j->ssr.high << 8 | j->ssr.low;
if (!j->m_hook && (j->hookstate & 1)) {
j->m_hook = j->ex.bits.hookstate = 1;
ixj_kill_fasync(j, SIG_HOOKSTATE, POLL_IN);
}
} else {
if (j->ex.bits.dtmf_ready) {
j->dtmf_wp = j->dtmf_rp = j->ex.bits.dtmf_ready = 0;
}
if (j->m_hook) {
j->m_hook = 0;
j->ex.bits.hookstate = 1;
ixj_kill_fasync(j, SIG_HOOKSTATE, POLL_IN);
}
}
}
if (j->cardtype == QTI_LINEJACK && !j->flags.pstncheck && j->flags.pstn_present) {
ixj_pstn_state(j);
}
if (j->ex.bytes) {
wake_up_interruptible(&j->poll_q); /* Wake any blocked selects */
}
clear_bit(board, &j->busyflags);
}
ixj_add_timer(j);
}
static int ixj_status_wait(IXJ *j)
{
unsigned long jif;
jif = jiffies + ((60 * hertz) / 100);
while (!IsStatusReady(j)) {
ixj_perfmon(j->statuswait);
if (time_after(jiffies, jif)) {
ixj_perfmon(j->statuswaitfail);
return -1;
}
}
return 0;
}
static int ixj_PCcontrol_wait(IXJ *j)
{
unsigned long jif;
jif = jiffies + ((60 * hertz) / 100);
while (!IsPCControlReady(j)) {
ixj_perfmon(j->pcontrolwait);
if (time_after(jiffies, jif)) {
ixj_perfmon(j->pcontrolwaitfail);
return -1;
}
}
return 0;
}
static int ixj_WriteDSPCommand(unsigned short cmd, IXJ *j)
{
BYTES bytes;
unsigned long jif;
atomic_inc(&j->DSPWrite);
if(atomic_read(&j->DSPWrite) > 1) {
printk("IXJ %d DSP write overlap attempting command 0x%4.4x\n", j->board, cmd);
return -1;
}
bytes.high = (cmd & 0xFF00) >> 8;
bytes.low = cmd & 0x00FF;
jif = jiffies + ((60 * hertz) / 100);
while (!IsControlReady(j)) {
ixj_perfmon(j->iscontrolready);
if (time_after(jiffies, jif)) {
ixj_perfmon(j->iscontrolreadyfail);
atomic_dec(&j->DSPWrite);
if(atomic_read(&j->DSPWrite) > 0) {
printk("IXJ %d DSP overlaped command 0x%4.4x during control ready failure.\n", j->board, cmd);
while(atomic_read(&j->DSPWrite) > 0) {
atomic_dec(&j->DSPWrite);
}
}
return -1;
}
}
outb(bytes.low, j->DSPbase + 6);
outb(bytes.high, j->DSPbase + 7);
if (ixj_status_wait(j)) {
j->ssr.low = 0xFF;
j->ssr.high = 0xFF;
atomic_dec(&j->DSPWrite);
if(atomic_read(&j->DSPWrite) > 0) {
printk("IXJ %d DSP overlaped command 0x%4.4x during status wait failure.\n", j->board, cmd);
while(atomic_read(&j->DSPWrite) > 0) {
atomic_dec(&j->DSPWrite);
}
}
return -1;
}
/* Read Software Status Register */
j->ssr.low = inb_p(j->DSPbase + 2);
j->ssr.high = inb_p(j->DSPbase + 3);
atomic_dec(&j->DSPWrite);
if(atomic_read(&j->DSPWrite) > 0) {
printk("IXJ %d DSP overlaped command 0x%4.4x\n", j->board, cmd);
while(atomic_read(&j->DSPWrite) > 0) {
atomic_dec(&j->DSPWrite);
}
}
return 0;
}
/***************************************************************************
*
* General Purpose IO Register read routine
*
***************************************************************************/
static inline int ixj_gpio_read(IXJ *j)
{
if (ixj_WriteDSPCommand(0x5143, j))
return -1;
j->gpio.bytes.low = j->ssr.low;
j->gpio.bytes.high = j->ssr.high;
return 0;
}
static inline void LED_SetState(int state, IXJ *j)
{
if (j->cardtype == QTI_LINEJACK) {
j->pld_scrw.bits.led1 = state & 0x1 ? 1 : 0;
j->pld_scrw.bits.led2 = state & 0x2 ? 1 : 0;
j->pld_scrw.bits.led3 = state & 0x4 ? 1 : 0;
j->pld_scrw.bits.led4 = state & 0x8 ? 1 : 0;
outb(j->pld_scrw.byte, j->XILINXbase);
}
}
/*********************************************************************
* GPIO Pins are configured as follows on the Quicknet Internet
* PhoneJACK Telephony Cards
*
* POTS Select GPIO_6=0 GPIO_7=0
* Mic/Speaker Select GPIO_6=0 GPIO_7=1
* Handset Select GPIO_6=1 GPIO_7=0
*
* SLIC Active GPIO_1=0 GPIO_2=1 GPIO_5=0
* SLIC Ringing GPIO_1=1 GPIO_2=1 GPIO_5=0
* SLIC Open Circuit GPIO_1=0 GPIO_2=0 GPIO_5=0
*
* Hook Switch changes reported on GPIO_3
*********************************************************************/
static int ixj_set_port(IXJ *j, int arg)
{
if (j->cardtype == QTI_PHONEJACK_LITE) {
if (arg != PORT_POTS)
return 10;
else
return 0;
}
switch (arg) {
case PORT_POTS:
j->port = PORT_POTS;
switch (j->cardtype) {
case QTI_PHONECARD:
if (j->flags.pcmciasct == 1)
SLIC_SetState(PLD_SLIC_STATE_ACTIVE, j);
else
return 11;
break;
case QTI_PHONEJACK_PCI:
j->pld_slicw.pcib.mic = 0;
j->pld_slicw.pcib.spk = 0;
outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
break;
case QTI_LINEJACK:
ixj_set_pots(j, 0); /* Disconnect POTS/PSTN relay */
if (ixj_WriteDSPCommand(0xC528, j)) /* Write CODEC config to
Software Control Register */
return 2;
j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
outb(j->pld_scrw.byte, j->XILINXbase);
j->pld_clock.byte = 0;
outb(j->pld_clock.byte, j->XILINXbase + 0x04);
j->pld_slicw.bits.rly1 = 1;
j->pld_slicw.bits.spken = 0;
outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
ixj_mixer(0x1200, j); /* Turn Off MIC switch on mixer left */
ixj_mixer(0x1401, j); /* Turn On Mono1 switch on mixer left */
ixj_mixer(0x1300, j); /* Turn Off MIC switch on mixer right */
ixj_mixer(0x1501, j); /* Turn On Mono1 switch on mixer right */
ixj_mixer(0x0E80, j); /*Mic mute */
ixj_mixer(0x0F00, j); /* Set mono out (SLIC) to 0dB */
ixj_mixer(0x0080, j); /* Mute Master Left volume */
ixj_mixer(0x0180, j); /* Mute Master Right volume */
SLIC_SetState(PLD_SLIC_STATE_STANDBY, j);
/* SLIC_SetState(PLD_SLIC_STATE_ACTIVE, j); */
break;
case QTI_PHONEJACK:
j->gpio.bytes.high = 0x0B;
j->gpio.bits.gpio6 = 0;
j->gpio.bits.gpio7 = 0;
ixj_WriteDSPCommand(j->gpio.word, j);
break;
}
break;
case PORT_PSTN:
if (j->cardtype == QTI_LINEJACK) {
ixj_WriteDSPCommand(0xC534, j); /* Write CODEC config to Software Control Register */
j->pld_slicw.bits.rly3 = 0;
j->pld_slicw.bits.rly1 = 1;
j->pld_slicw.bits.spken = 0;
outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
j->port = PORT_PSTN;
} else {
return 4;
}
break;
case PORT_SPEAKER:
j->port = PORT_SPEAKER;
switch (j->cardtype) {
case QTI_PHONECARD:
if (j->flags.pcmciasct) {
SLIC_SetState(PLD_SLIC_STATE_OC, j);
}
break;
case QTI_PHONEJACK_PCI:
j->pld_slicw.pcib.mic = 1;
j->pld_slicw.pcib.spk = 1;
outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
break;
case QTI_LINEJACK:
ixj_set_pots(j, 0); /* Disconnect POTS/PSTN relay */
if (ixj_WriteDSPCommand(0xC528, j)) /* Write CODEC config to
Software Control Register */
return 2;
j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
outb(j->pld_scrw.byte, j->XILINXbase);
j->pld_clock.byte = 0;
outb(j->pld_clock.byte, j->XILINXbase + 0x04);
j->pld_slicw.bits.rly1 = 1;
j->pld_slicw.bits.spken = 1;
outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
ixj_mixer(0x1201, j); /* Turn On MIC switch on mixer left */
ixj_mixer(0x1400, j); /* Turn Off Mono1 switch on mixer left */
ixj_mixer(0x1301, j); /* Turn On MIC switch on mixer right */
ixj_mixer(0x1500, j); /* Turn Off Mono1 switch on mixer right */
ixj_mixer(0x0E06, j); /*Mic un-mute 0dB */
ixj_mixer(0x0F80, j); /* Mute mono out (SLIC) */
ixj_mixer(0x0000, j); /* Set Master Left volume to 0dB */
ixj_mixer(0x0100, j); /* Set Master Right volume to 0dB */
break;
case QTI_PHONEJACK:
j->gpio.bytes.high = 0x0B;
j->gpio.bits.gpio6 = 0;
j->gpio.bits.gpio7 = 1;
ixj_WriteDSPCommand(j->gpio.word, j);
break;
}
break;
case PORT_HANDSET:
if (j->cardtype != QTI_PHONEJACK) {
return 5;
} else {
j->gpio.bytes.high = 0x0B;
j->gpio.bits.gpio6 = 1;
j->gpio.bits.gpio7 = 0;
ixj_WriteDSPCommand(j->gpio.word, j);
j->port = PORT_HANDSET;
}
break;
default:
return 6;
break;
}
return 0;
}
static int ixj_set_pots(IXJ *j, int arg)
{
if (j->cardtype == QTI_LINEJACK) {
if (arg) {
if (j->port == PORT_PSTN) {
j->pld_slicw.bits.rly1 = 0;
outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
j->flags.pots_pstn = 1;
return 1;
} else {
j->flags.pots_pstn = 0;
return 0;
}
} else {
j->pld_slicw.bits.rly1 = 1;
outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
j->flags.pots_pstn = 0;
return 1;
}
} else {
return 0;
}
}
static void ixj_ring_on(IXJ *j)
{
if (j->dsp.low == 0x20) /* Internet PhoneJACK */
{
if (ixjdebug & 0x0004)
printk(KERN_INFO "IXJ Ring On /dev/phone%d\n", j->board);
j->gpio.bytes.high = 0x0B;
j->gpio.bytes.low = 0x00;
j->gpio.bits.gpio1 = 1;
j->gpio.bits.gpio2 = 1;
j->gpio.bits.gpio5 = 0;
ixj_WriteDSPCommand(j->gpio.word, j); /* send the ring signal */
} else /* Internet LineJACK, Internet PhoneJACK Lite or Internet PhoneJACK PCI */
{
if (ixjdebug & 0x0004)
printk(KERN_INFO "IXJ Ring On /dev/phone%d\n", j->board);
SLIC_SetState(PLD_SLIC_STATE_RINGING, j);
}
}
static int ixj_siadc(IXJ *j, int val)
{
if(j->cardtype == QTI_PHONECARD){
if(j->flags.pcmciascp){
if(val == -1)
return j->siadc.bits.rxg;
if(val < 0 || val > 0x1F)
return -1;
j->siadc.bits.hom = 0; /* Handset Out Mute */
j->siadc.bits.lom = 0; /* Line Out Mute */
j->siadc.bits.rxg = val; /*(0xC000 - 0x41C8) / 0x4EF; RX PGA Gain */
j->psccr.bits.addr = 6; /* R/W Smart Cable Register Address */
j->psccr.bits.rw = 0; /* Read / Write flag */
j->psccr.bits.dev = 0;
outb(j->siadc.byte, j->XILINXbase + 0x00);
outb(j->psccr.byte, j->XILINXbase + 0x01);
ixj_PCcontrol_wait(j);
return j->siadc.bits.rxg;
}
}
return -1;
}
static int ixj_sidac(IXJ *j, int val)
{
if(j->cardtype == QTI_PHONECARD){
if(j->flags.pcmciascp){
if(val == -1)
return j->sidac.bits.txg;
if(val < 0 || val > 0x1F)
return -1;
j->sidac.bits.srm = 1; /* Speaker Right Mute */
j->sidac.bits.slm = 1; /* Speaker Left Mute */
j->sidac.bits.txg = val; /* (0xC000 - 0x45E4) / 0x5D3; TX PGA Gain */
j->psccr.bits.addr = 7; /* R/W Smart Cable Register Address */
j->psccr.bits.rw = 0; /* Read / Write flag */
j->psccr.bits.dev = 0;
outb(j->sidac.byte, j->XILINXbase + 0x00);
outb(j->psccr.byte, j->XILINXbase + 0x01);
ixj_PCcontrol_wait(j);
return j->sidac.bits.txg;
}
}
return -1;
}
static int ixj_pcmcia_cable_check(IXJ *j)
{
j->pccr1.byte = inb_p(j->XILINXbase + 0x03);
if (!j->flags.pcmciastate) {
j->pccr2.byte = inb_p(j->XILINXbase + 0x02);
if (j->pccr1.bits.drf || j->pccr2.bits.rstc) {
j->flags.pcmciastate = 4;
return 0;
}
if (j->pccr1.bits.ed) {
j->pccr1.bits.ed = 0;
j->psccr.bits.dev = 3;
j->psccr.bits.rw = 1;
outw_p(j->psccr.byte << 8, j->XILINXbase + 0x00);
ixj_PCcontrol_wait(j);
j->pslic.byte = inw_p(j->XILINXbase + 0x00) & 0xFF;
j->pslic.bits.led2 = j->pslic.bits.det ? 1 : 0;
j->psccr.bits.dev = 3;
j->psccr.bits.rw = 0;
outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
ixj_PCcontrol_wait(j);
return j->pslic.bits.led2 ? 1 : 0;
} else if (j->flags.pcmciasct) {
return j->r_hook;
} else {
return 1;
}
} else if (j->flags.pcmciastate == 4) {
if (!j->pccr1.bits.drf) {
j->flags.pcmciastate = 3;
}
return 0;
} else if (j->flags.pcmciastate == 3) {
j->pccr2.bits.pwr = 0;
j->pccr2.bits.rstc = 1;
outb(j->pccr2.byte, j->XILINXbase + 0x02);
j->checkwait = jiffies + (hertz * 2);
j->flags.incheck = 1;
j->flags.pcmciastate = 2;
return 0;
} else if (j->flags.pcmciastate == 2) {
if (j->flags.incheck) {
if (time_before(jiffies, j->checkwait)) {
return 0;
} else {
j->flags.incheck = 0;
}
}
j->pccr2.bits.pwr = 0;
j->pccr2.bits.rstc = 0;
outb_p(j->pccr2.byte, j->XILINXbase + 0x02);
j->flags.pcmciastate = 1;
return 0;
} else if (j->flags.pcmciastate == 1) {
j->flags.pcmciastate = 0;
if (!j->pccr1.bits.drf) {
j->psccr.bits.dev = 3;
j->psccr.bits.rw = 1;
outb_p(j->psccr.byte, j->XILINXbase + 0x01);
ixj_PCcontrol_wait(j);
j->flags.pcmciascp = 1; /* Set Cable Present Flag */
j->flags.pcmciasct = (inw_p(j->XILINXbase + 0x00) >> 8) & 0x03; /* Get Cable Type */
if (j->flags.pcmciasct == 3) {
j->flags.pcmciastate = 4;
return 0;
} else if (j->flags.pcmciasct == 0) {
j->pccr2.bits.pwr = 1;
j->pccr2.bits.rstc = 0;
outb_p(j->pccr2.byte, j->XILINXbase + 0x02);
j->port = PORT_SPEAKER;
} else {
j->port = PORT_POTS;
}
j->sic1.bits.cpd = 0; /* Chip Power Down */
j->sic1.bits.mpd = 0; /* MIC Bias Power Down */
j->sic1.bits.hpd = 0; /* Handset Bias Power Down */
j->sic1.bits.lpd = 0; /* Line Bias Power Down */
j->sic1.bits.spd = 1; /* Speaker Drive Power Down */
j->psccr.bits.addr = 1; /* R/W Smart Cable Register Address */
j->psccr.bits.rw = 0; /* Read / Write flag */
j->psccr.bits.dev = 0;
outb(j->sic1.byte, j->XILINXbase + 0x00);
outb(j->psccr.byte, j->XILINXbase + 0x01);
ixj_PCcontrol_wait(j);
j->sic2.bits.al = 0; /* Analog Loopback DAC analog -> ADC analog */
j->sic2.bits.dl2 = 0; /* Digital Loopback DAC -> ADC one bit */
j->sic2.bits.dl1 = 0; /* Digital Loopback ADC -> DAC one bit */
j->sic2.bits.pll = 0; /* 1 = div 10, 0 = div 5 */
j->sic2.bits.hpd = 0; /* HPF disable */
j->psccr.bits.addr = 2; /* R/W Smart Cable Register Address */
j->psccr.bits.rw = 0; /* Read / Write flag */
j->psccr.bits.dev = 0;
outb(j->sic2.byte, j->XILINXbase + 0x00);
outb(j->psccr.byte, j->XILINXbase + 0x01);
ixj_PCcontrol_wait(j);
j->psccr.bits.addr = 3; /* R/W Smart Cable Register Address */
j->psccr.bits.rw = 0; /* Read / Write flag */
j->psccr.bits.dev = 0;
outb(0x00, j->XILINXbase + 0x00); /* PLL Divide N1 */
outb(j->psccr.byte, j->XILINXbase + 0x01);
ixj_PCcontrol_wait(j);
j->psccr.bits.addr = 4; /* R/W Smart Cable Register Address */
j->psccr.bits.rw = 0; /* Read / Write flag */
j->psccr.bits.dev = 0;
outb(0x09, j->XILINXbase + 0x00); /* PLL Multiply M1 */
outb(j->psccr.byte, j->XILINXbase + 0x01);
ixj_PCcontrol_wait(j);
j->sirxg.bits.lig = 1; /* Line In Gain */
j->sirxg.bits.lim = 1; /* Line In Mute */
j->sirxg.bits.mcg = 0; /* MIC In Gain was 3 */
j->sirxg.bits.mcm = 0; /* MIC In Mute */
j->sirxg.bits.him = 0; /* Handset In Mute */
j->sirxg.bits.iir = 1; /* IIR */
j->psccr.bits.addr = 5; /* R/W Smart Cable Register Address */
j->psccr.bits.rw = 0; /* Read / Write flag */
j->psccr.bits.dev = 0;
outb(j->sirxg.byte, j->XILINXbase + 0x00);
outb(j->psccr.byte, j->XILINXbase + 0x01);
ixj_PCcontrol_wait(j);
ixj_siadc(j, 0x17);
ixj_sidac(j, 0x1D);
j->siaatt.bits.sot = 0;
j->psccr.bits.addr = 9; /* R/W Smart Cable Register Address */
j->psccr.bits.rw = 0; /* Read / Write flag */
j->psccr.bits.dev = 0;
outb(j->siaatt.byte, j->XILINXbase + 0x00);
outb(j->psccr.byte, j->XILINXbase + 0x01);
ixj_PCcontrol_wait(j);
if (j->flags.pcmciasct == 1 && !j->readers && !j->writers) {
j->psccr.byte = j->pslic.byte = 0;
j->pslic.bits.powerdown = 1;
j->psccr.bits.dev = 3;
j->psccr.bits.rw = 0;
outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
ixj_PCcontrol_wait(j);
}
}
return 0;
} else {
j->flags.pcmciascp = 0;
return 0;
}
return 0;
}
static int ixj_hookstate(IXJ *j)
{
int fOffHook = 0;
switch (j->cardtype) {
case QTI_PHONEJACK:
ixj_gpio_read(j);
fOffHook = j->gpio.bits.gpio3read ? 1 : 0;
break;
case QTI_LINEJACK:
case QTI_PHONEJACK_LITE:
case QTI_PHONEJACK_PCI:
SLIC_GetState(j);
if(j->cardtype == QTI_LINEJACK && j->flags.pots_pstn == 1 && (j->readers || j->writers)) {
fOffHook = j->pld_slicr.bits.potspstn ? 1 : 0;
if(fOffHook != j->p_hook) {
if(!j->checkwait) {
j->checkwait = jiffies;
}
if(time_before(jiffies, j->checkwait + 2)) {
fOffHook ^= 1;
} else {
j->checkwait = 0;
}
j->p_hook = fOffHook;
printk("IXJ : /dev/phone%d pots-pstn hookstate check %d at %ld\n", j->board, fOffHook, jiffies);
}
} else {
if (j->pld_slicr.bits.state == PLD_SLIC_STATE_ACTIVE ||
j->pld_slicr.bits.state == PLD_SLIC_STATE_STANDBY) {
if (j->flags.ringing || j->flags.cringing) {
if (!in_interrupt()) {
msleep(20);
}
SLIC_GetState(j);
if (j->pld_slicr.bits.state == PLD_SLIC_STATE_RINGING) {
ixj_ring_on(j);
}
}
if (j->cardtype == QTI_PHONEJACK_PCI) {
j->pld_scrr.byte = inb_p(j->XILINXbase);
fOffHook = j->pld_scrr.pcib.det ? 1 : 0;
} else
fOffHook = j->pld_slicr.bits.det ? 1 : 0;
}
}
break;
case QTI_PHONECARD:
fOffHook = ixj_pcmcia_cable_check(j);
break;
}
if (j->r_hook != fOffHook) {
j->r_hook = fOffHook;
if (j->port == PORT_SPEAKER || j->port == PORT_HANDSET) { // || (j->port == PORT_PSTN && j->flags.pots_pstn == 0)) {
j->ex.bits.hookstate = 1;
ixj_kill_fasync(j, SIG_HOOKSTATE, POLL_IN);
} else if (!fOffHook) {
j->flash_end = jiffies + ((60 * hertz) / 100);
}
}
if (fOffHook) {
if(time_before(jiffies, j->flash_end)) {
j->ex.bits.flash = 1;
j->flash_end = 0;
ixj_kill_fasync(j, SIG_FLASH, POLL_IN);
}
} else {
if(time_before(jiffies, j->flash_end)) {
fOffHook = 1;
}
}
if (j->port == PORT_PSTN && j->daa_mode == SOP_PU_CONVERSATION)
fOffHook |= 2;
if (j->port == PORT_SPEAKER) {
if(j->cardtype == QTI_PHONECARD) {
if(j->flags.pcmciascp && j->flags.pcmciasct) {
fOffHook |= 2;
}
} else {
fOffHook |= 2;
}
}
if (j->port == PORT_HANDSET)
fOffHook |= 2;
return fOffHook;
}
static void ixj_ring_off(IXJ *j)
{
if (j->dsp.low == 0x20) /* Internet PhoneJACK */
{
if (ixjdebug & 0x0004)
printk(KERN_INFO "IXJ Ring Off\n");
j->gpio.bytes.high = 0x0B;
j->gpio.bytes.low = 0x00;
j->gpio.bits.gpio1 = 0;
j->gpio.bits.gpio2 = 1;
j->gpio.bits.gpio5 = 0;
ixj_WriteDSPCommand(j->gpio.word, j);
} else /* Internet LineJACK */
{
if (ixjdebug & 0x0004)
printk(KERN_INFO "IXJ Ring Off\n");
if(!j->flags.cidplay)
SLIC_SetState(PLD_SLIC_STATE_STANDBY, j);
SLIC_GetState(j);
}
}
static void ixj_ring_start(IXJ *j)
{
j->flags.cringing = 1;
if (ixjdebug & 0x0004)
printk(KERN_INFO "IXJ Cadence Ringing Start /dev/phone%d\n", j->board);
if (ixj_hookstate(j) & 1) {
if (j->port == PORT_POTS)
ixj_ring_off(j);
j->flags.cringing = 0;
if (ixjdebug & 0x0004)
printk(KERN_INFO "IXJ Cadence Ringing Stopped /dev/phone%d off hook\n", j->board);
} else if(j->cadence_f[5].enable && (!j->cadence_f[5].en_filter)) {
j->ring_cadence_jif = jiffies;
j->flags.cidsent = j->flags.cidring = 0;
j->cadence_f[5].state = 0;
if(j->cadence_f[5].on1)
ixj_ring_on(j);
} else {
j->ring_cadence_jif = jiffies;
j->ring_cadence_t = 15;
if (j->ring_cadence & 1 << j->ring_cadence_t) {
ixj_ring_on(j);
} else {
ixj_ring_off(j);
}
j->flags.cidsent = j->flags.cidring = j->flags.firstring = 0;
}
}
static int ixj_ring(IXJ *j)
{
char cntr;
unsigned long jif;
j->flags.ringing = 1;
if (ixj_hookstate(j) & 1) {
ixj_ring_off(j);
j->flags.ringing = 0;
return 1;
}
for (cntr = 0; cntr < j->maxrings; cntr++) {
jif = jiffies + (1 * hertz);
ixj_ring_on(j);
while (time_before(jiffies, jif)) {
if (ixj_hookstate(j) & 1) {
ixj_ring_off(j);
j->flags.ringing = 0;
return 1;
}
schedule_timeout_interruptible(1);
if (signal_pending(current))
break;
}
jif = jiffies + (3 * hertz);
ixj_ring_off(j);
while (time_before(jiffies, jif)) {
if (ixj_hookstate(j) & 1) {
msleep(10);
if (ixj_hookstate(j) & 1) {
j->flags.ringing = 0;
return 1;
}
}
schedule_timeout_interruptible(1);
if (signal_pending(current))
break;
}
}
ixj_ring_off(j);
j->flags.ringing = 0;
return 0;
}
static int ixj_open(struct phone_device *p, struct file *file_p)
{
IXJ *j = get_ixj(p->board);
file_p->private_data = j;
if (!j->DSPbase)
return -ENODEV;
if (file_p->f_mode & FMODE_READ) {
if(!j->readers) {
j->readers++;
} else {
return -EBUSY;
}
}
if (file_p->f_mode & FMODE_WRITE) {
if(!j->writers) {
j->writers++;
} else {
if (file_p->f_mode & FMODE_READ){
j->readers--;
}
return -EBUSY;
}
}
if (j->cardtype == QTI_PHONECARD) {
j->pslic.bits.powerdown = 0;
j->psccr.bits.dev = 3;
j->psccr.bits.rw = 0;
outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
ixj_PCcontrol_wait(j);
}
j->flags.cidplay = 0;
j->flags.cidcw_ack = 0;
if (ixjdebug & 0x0002)
printk(KERN_INFO "Opening board %d\n", p->board);
j->framesread = j->frameswritten = 0;
return 0;
}
static int ixj_release(struct inode *inode, struct file *file_p)
{
IXJ_TONE ti;
int cnt;
IXJ *j = file_p->private_data;
int board = j->p.board;
/*
* Set up locks to ensure that only one process is talking to the DSP at a time.
* This is necessary to keep the DSP from locking up.
*/
while(test_and_set_bit(board, (void *)&j->busyflags) != 0)
schedule_timeout_interruptible(1);
if (ixjdebug & 0x0002)
printk(KERN_INFO "Closing board %d\n", NUM(inode));
if (j->cardtype == QTI_PHONECARD)
ixj_set_port(j, PORT_SPEAKER);
else
ixj_set_port(j, PORT_POTS);
aec_stop(j);
ixj_play_stop(j);
ixj_record_stop(j);
set_play_volume(j, 0x100);
set_rec_volume(j, 0x100);
ixj_ring_off(j);
/* Restore the tone table to default settings. */
ti.tone_index = 10;
ti.gain0 = 1;
ti.freq0 = hz941;
ti.gain1 = 0;
ti.freq1 = hz1209;
ixj_init_tone(j, &ti);
ti.tone_index = 11;
ti.gain0 = 1;
ti.freq0 = hz941;
ti.gain1 = 0;
ti.freq1 = hz1336;
ixj_init_tone(j, &ti);
ti.tone_index = 12;
ti.gain0 = 1;
ti.freq0 = hz941;
ti.gain1 = 0;
ti.freq1 = hz1477;
ixj_init_tone(j, &ti);
ti.tone_index = 13;
ti.gain0 = 1;
ti.freq0 = hz800;
ti.gain1 = 0;
ti.freq1 = 0;
ixj_init_tone(j, &ti);
ti.tone_index = 14;
ti.gain0 = 1;
ti.freq0 = hz1000;
ti.gain1 = 0;
ti.freq1 = 0;
ixj_init_tone(j, &ti);
ti.tone_index = 15;
ti.gain0 = 1;
ti.freq0 = hz1250;
ti.gain1 = 0;
ti.freq1 = 0;
ixj_init_tone(j, &ti);
ti.tone_index = 16;
ti.gain0 = 1;
ti.freq0 = hz950;
ti.gain1 = 0;
ti.freq1 = 0;
ixj_init_tone(j, &ti);
ti.tone_index = 17;
ti.gain0 = 1;
ti.freq0 = hz1100;
ti.gain1 = 0;
ti.freq1 = 0;
ixj_init_tone(j, &ti);
ti.tone_index = 18;
ti.gain0 = 1;
ti.freq0 = hz1400;
ti.gain1 = 0;
ti.freq1 = 0;
ixj_init_tone(j, &ti);
ti.tone_index = 19;
ti.gain0 = 1;
ti.freq0 = hz1500;
ti.gain1 = 0;
ti.freq1 = 0;
ixj_init_tone(j, &ti);
ti.tone_index = 20;
ti.gain0 = 1;
ti.freq0 = hz1600;
ti.gain1 = 0;
ti.freq1 = 0;
ixj_init_tone(j, &ti);
ti.tone_index = 21;
ti.gain0 = 1;
ti.freq0 = hz1800;
ti.gain1 = 0;
ti.freq1 = 0;
ixj_init_tone(j, &ti);
ti.tone_index = 22;
ti.gain0 = 1;
ti.freq0 = hz2100;
ti.gain1 = 0;
ti.freq1 = 0;
ixj_init_tone(j, &ti);
ti.tone_index = 23;
ti.gain0 = 1;
ti.freq0 = hz1300;
ti.gain1 = 0;
ti.freq1 = 0;
ixj_init_tone(j, &ti);
ti.tone_index = 24;
ti.gain0 = 1;
ti.freq0 = hz2450;
ti.gain1 = 0;
ti.freq1 = 0;
ixj_init_tone(j, &ti);
ti.tone_index = 25;
ti.gain0 = 1;
ti.freq0 = hz350;
ti.gain1 = 0;
ti.freq1 = hz440;
ixj_init_tone(j, &ti);
ti.tone_index = 26;
ti.gain0 = 1;
ti.freq0 = hz440;
ti.gain1 = 0;
ti.freq1 = hz480;
ixj_init_tone(j, &ti);
ti.tone_index = 27;
ti.gain0 = 1;
ti.freq0 = hz480;
ti.gain1 = 0;
ti.freq1 = hz620;
ixj_init_tone(j, &ti);
set_rec_depth(j, 2); /* Set Record Channel Limit to 2 frames */
set_play_depth(j, 2); /* Set Playback Channel Limit to 2 frames */
j->ex.bits.dtmf_ready = 0;
j->dtmf_state = 0;
j->dtmf_wp = j->dtmf_rp = 0;
j->rec_mode = j->play_mode = -1;
j->flags.ringing = 0;
j->maxrings = MAXRINGS;
j->ring_cadence = USA_RING_CADENCE;
if(j->cadence_f[5].enable) {
j->cadence_f[5].enable = j->cadence_f[5].en_filter = j->cadence_f[5].state = 0;
}
j->drybuffer = 0;
j->winktime = 320;
j->flags.dtmf_oob = 0;
for (cnt = 0; cnt < 4; cnt++)
j->cadence_f[cnt].enable = 0;
idle(j);
if(j->cardtype == QTI_PHONECARD) {
SLIC_SetState(PLD_SLIC_STATE_OC, j);
}
if (file_p->f_mode & FMODE_READ)
j->readers--;
if (file_p->f_mode & FMODE_WRITE)
j->writers--;
if (j->read_buffer && !j->readers) {
kfree(j->read_buffer);
j->read_buffer = NULL;
j->read_buffer_size = 0;
}
if (j->write_buffer && !j->writers) {
kfree(j->write_buffer);
j->write_buffer = NULL;
j->write_buffer_size = 0;
}
j->rec_codec = j->play_codec = 0;
j->rec_frame_size = j->play_frame_size = 0;
j->flags.cidsent = j->flags.cidring = 0;
if(j->cardtype == QTI_LINEJACK && !j->readers && !j->writers) {
ixj_set_port(j, PORT_PSTN);
daa_set_mode(j, SOP_PU_SLEEP);
ixj_set_pots(j, 1);
}
ixj_WriteDSPCommand(0x0FE3, j); /* Put the DSP in 1/5 power mode. */
/* Set up the default signals for events */
for (cnt = 0; cnt < 35; cnt++)
j->ixj_signals[cnt] = SIGIO;
/* Set the excetion signal enable flags */
j->ex_sig.bits.dtmf_ready = j->ex_sig.bits.hookstate = j->ex_sig.bits.flash = j->ex_sig.bits.pstn_ring =
j->ex_sig.bits.caller_id = j->ex_sig.bits.pstn_wink = j->ex_sig.bits.f0 = j->ex_sig.bits.f1 = j->ex_sig.bits.f2 =
j->ex_sig.bits.f3 = j->ex_sig.bits.fc0 = j->ex_sig.bits.fc1 = j->ex_sig.bits.fc2 = j->ex_sig.bits.fc3 = 1;
file_p->private_data = NULL;
clear_bit(board, &j->busyflags);
return 0;
}
static int read_filters(IXJ *j)
{
unsigned short fc, cnt, trg;
int var;
trg = 0;
if (ixj_WriteDSPCommand(0x5144, j)) {
if(ixjdebug & 0x0001) {
printk(KERN_INFO "Read Frame Counter failed!\n");
}
return -1;
}
fc = j->ssr.high << 8 | j->ssr.low;
if (fc == j->frame_count)
return 1;
j->frame_count = fc;
if (j->dtmf_proc)
return 1;
var = 10;
for (cnt = 0; cnt < 4; cnt++) {
if (ixj_WriteDSPCommand(0x5154 + cnt, j)) {
if(ixjdebug & 0x0001) {
printk(KERN_INFO "Select Filter %d failed!\n", cnt);
}
return -1;
}
if (ixj_WriteDSPCommand(0x515C, j)) {
if(ixjdebug & 0x0001) {
printk(KERN_INFO "Read Filter History %d failed!\n", cnt);
}
return -1;
}
j->filter_hist[cnt] = j->ssr.high << 8 | j->ssr.low;
if (j->cadence_f[cnt].enable) {
if (j->filter_hist[cnt] & 3 && !(j->filter_hist[cnt] & 12)) {
if (j->cadence_f[cnt].state == 0) {
j->cadence_f[cnt].state = 1;
j->cadence_f[cnt].on1min = jiffies + (long)((j->cadence_f[cnt].on1 * (hertz * (100 - var)) / 10000));
j->cadence_f[cnt].on1dot = jiffies + (long)((j->cadence_f[cnt].on1 * (hertz * (100)) / 10000));
j->cadence_f[cnt].on1max = jiffies + (long)((j->cadence_f[cnt].on1 * (hertz * (100 + var)) / 10000));
} else if (j->cadence_f[cnt].state == 2 &&
(time_after(jiffies, j->cadence_f[cnt].off1min) &&
time_before(jiffies, j->cadence_f[cnt].off1max))) {
if (j->cadence_f[cnt].on2) {
j->cadence_f[cnt].state = 3;
j->cadence_f[cnt].on2min = jiffies + (long)((j->cadence_f[cnt].on2 * (hertz * (100 - var)) / 10000));
j->cadence_f[cnt].on2dot = jiffies + (long)((j->cadence_f[cnt].on2 * (hertz * (100)) / 10000));
j->cadence_f[cnt].on2max = jiffies + (long)((j->cadence_f[cnt].on2 * (hertz * (100 + var)) / 10000));
} else {
j->cadence_f[cnt].state = 7;
}
} else if (j->cadence_f[cnt].state == 4 &&
(time_after(jiffies, j->cadence_f[cnt].off2min) &&
time_before(jiffies, j->cadence_f[cnt].off2max))) {
if (j->cadence_f[cnt].on3) {
j->cadence_f[cnt].state = 5;
j->cadence_f[cnt].on3min = jiffies + (long)((j->cadence_f[cnt].on3 * (hertz * (100 - var)) / 10000));
j->cadence_f[cnt].on3dot = jiffies + (long)((j->cadence_f[cnt].on3 * (hertz * (100)) / 10000));
j->cadence_f[cnt].on3max = jiffies + (long)((j->cadence_f[cnt].on3 * (hertz * (100 + var)) / 10000));
} else {
j->cadence_f[cnt].state = 7;
}
} else {
j->cadence_f[cnt].state = 0;
}
} else if (j->filter_hist[cnt] & 12 && !(j->filter_hist[cnt] & 3)) {
if (j->cadence_f[cnt].state == 1) {
if(!j->cadence_f[cnt].on1) {
j->cadence_f[cnt].state = 7;
} else if((time_after(jiffies, j->cadence_f[cnt].on1min) &&
time_before(jiffies, j->cadence_f[cnt].on1max))) {
if(j->cadence_f[cnt].off1) {
j->cadence_f[cnt].state = 2;
j->cadence_f[cnt].off1min = jiffies + (long)((j->cadence_f[cnt].off1 * (hertz * (100 - var)) / 10000));
j->cadence_f[cnt].off1dot = jiffies + (long)((j->cadence_f[cnt].off1 * (hertz * (100)) / 10000));
j->cadence_f[cnt].off1max = jiffies + (long)((j->cadence_f[cnt].off1 * (hertz * (100 + var)) / 10000));
} else {
j->cadence_f[cnt].state = 7;
}
} else {
j->cadence_f[cnt].state = 0;
}
} else if (j->cadence_f[cnt].state == 3) {
if((time_after(jiffies, j->cadence_f[cnt].on2min) &&
time_before(jiffies, j->cadence_f[cnt].on2max))) {
if(j->cadence_f[cnt].off2) {
j->cadence_f[cnt].state = 4;
j->cadence_f[cnt].off2min = jiffies + (long)((j->cadence_f[cnt].off2 * (hertz * (100 - var)) / 10000));
j->cadence_f[cnt].off2dot = jiffies + (long)((j->cadence_f[cnt].off2 * (hertz * (100)) / 10000));
j->cadence_f[cnt].off2max = jiffies + (long)((j->cadence_f[cnt].off2 * (hertz * (100 + var)) / 10000));
} else {
j->cadence_f[cnt].state = 7;
}
} else {
j->cadence_f[cnt].state = 0;
}
} else if (j->cadence_f[cnt].state == 5) {
if ((time_after(jiffies, j->cadence_f[cnt].on3min) &&
time_before(jiffies, j->cadence_f[cnt].on3max))) {
if(j->cadence_f[cnt].off3) {
j->cadence_f[cnt].state = 6;
j->cadence_f[cnt].off3min = jiffies + (long)((j->cadence_f[cnt].off3 * (hertz * (100 - var)) / 10000));
j->cadence_f[cnt].off3dot = jiffies + (long)((j->cadence_f[cnt].off3 * (hertz * (100)) / 10000));
j->cadence_f[cnt].off3max = jiffies + (long)((j->cadence_f[cnt].off3 * (hertz * (100 + var)) / 10000));
} else {
j->cadence_f[cnt].state = 7;
}
} else {
j->cadence_f[cnt].state = 0;
}
} else {
j->cadence_f[cnt].state = 0;
}
} else {
switch(j->cadence_f[cnt].state) {
case 1:
if(time_after(jiffies, j->cadence_f[cnt].on1dot) &&
!j->cadence_f[cnt].off1 &&
!j->cadence_f[cnt].on2 && !j->cadence_f[cnt].off2 &&
!j->cadence_f[cnt].on3 && !j->cadence_f[cnt].off3) {
j->cadence_f[cnt].state = 7;
}
break;
case 3:
if(time_after(jiffies, j->cadence_f[cnt].on2dot) &&
!j->cadence_f[cnt].off2 &&
!j->cadence_f[cnt].on3 && !j->cadence_f[cnt].off3) {
j->cadence_f[cnt].state = 7;
}
break;
case 5:
if(time_after(jiffies, j->cadence_f[cnt].on3dot) &&
!j->cadence_f[cnt].off3) {
j->cadence_f[cnt].state = 7;
}
break;
}
}
if (ixjdebug & 0x0040) {
printk(KERN_INFO "IXJ Tone Cadence state = %d /dev/phone%d at %ld\n", j->cadence_f[cnt].state, j->board, jiffies);
switch(j->cadence_f[cnt].state) {
case 0:
printk(KERN_INFO "IXJ /dev/phone%d No Tone detected\n", j->board);
break;
case 1:
printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %u %ld - %ld - %ld\n", j->board,
j->cadence_f[cnt].on1, j->cadence_f[cnt].on1min, j->cadence_f[cnt].on1dot, j->cadence_f[cnt].on1max);
break;
case 2:
printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].off1min,
j->cadence_f[cnt].off1max);
break;
case 3:
printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].on2min,
j->cadence_f[cnt].on2max);
break;
case 4:
printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].off2min,
j->cadence_f[cnt].off2max);
break;
case 5:
printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].on3min,
j->cadence_f[cnt].on3max);
break;
case 6:
printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].off3min,
j->cadence_f[cnt].off3max);
break;
}
}
}
if (j->cadence_f[cnt].state == 7) {
j->cadence_f[cnt].state = 0;
if (j->cadence_f[cnt].enable == 1)
j->cadence_f[cnt].enable = 0;
switch (cnt) {
case 0:
if(ixjdebug & 0x0020) {
printk(KERN_INFO "Filter Cadence 0 triggered %ld\n", jiffies);
}
j->ex.bits.fc0 = 1;
ixj_kill_fasync(j, SIG_FC0, POLL_IN);
break;
case 1:
if(ixjdebug & 0x0020) {
printk(KERN_INFO "Filter Cadence 1 triggered %ld\n", jiffies);
}
j->ex.bits.fc1 = 1;
ixj_kill_fasync(j, SIG_FC1, POLL_IN);
break;
case 2:
if(ixjdebug & 0x0020) {
printk(KERN_INFO "Filter Cadence 2 triggered %ld\n", jiffies);
}
j->ex.bits.fc2 = 1;
ixj_kill_fasync(j, SIG_FC2, POLL_IN);
break;
case 3:
if(ixjdebug & 0x0020) {
printk(KERN_INFO "Filter Cadence 3 triggered %ld\n", jiffies);
}
j->ex.bits.fc3 = 1;
ixj_kill_fasync(j, SIG_FC3, POLL_IN);
break;
}
}
if (j->filter_en[cnt] && ((j->filter_hist[cnt] & 3 && !(j->filter_hist[cnt] & 12)) ||
(j->filter_hist[cnt] & 12 && !(j->filter_hist[cnt] & 3)))) {
if((j->filter_hist[cnt] & 3 && !(j->filter_hist[cnt] & 12))) {
trg = 1;
} else if((j->filter_hist[cnt] & 12 && !(j->filter_hist[cnt] & 3))) {
trg = 0;
}
switch (cnt) {
case 0:
if(ixjdebug & 0x0020) {
printk(KERN_INFO "Filter 0 triggered %d at %ld\n", trg, jiffies);
}
j->ex.bits.f0 = 1;
ixj_kill_fasync(j, SIG_F0, POLL_IN);
break;
case 1:
if(ixjdebug & 0x0020) {
printk(KERN_INFO "Filter 1 triggered %d at %ld\n", trg, jiffies);
}
j->ex.bits.f1 = 1;
ixj_kill_fasync(j, SIG_F1, POLL_IN);
break;
case 2:
if(ixjdebug & 0x0020) {
printk(KERN_INFO "Filter 2 triggered %d at %ld\n", trg, jiffies);
}
j->ex.bits.f2 = 1;
ixj_kill_fasync(j, SIG_F2, POLL_IN);
break;
case 3:
if(ixjdebug & 0x0020) {
printk(KERN_INFO "Filter 3 triggered %d at %ld\n", trg, jiffies);
}
j->ex.bits.f3 = 1;
ixj_kill_fasync(j, SIG_F3, POLL_IN);
break;
}
}
}
return 0;
}
static int LineMonitor(IXJ *j)
{
if (j->dtmf_proc) {
return -1;
}
j->dtmf_proc = 1;
if (ixj_WriteDSPCommand(0x7000, j)) /* Line Monitor */
return -1;
j->dtmf.bytes.high = j->ssr.high;
j->dtmf.bytes.low = j->ssr.low;
if (!j->dtmf_state && j->dtmf.bits.dtmf_valid) {
j->dtmf_state = 1;
j->dtmf_current = j->dtmf.bits.digit;
}
if (j->dtmf_state && !j->dtmf.bits.dtmf_valid) /* && j->dtmf_wp != j->dtmf_rp) */
{
if(!j->cidcw_wait) {
j->dtmfbuffer[j->dtmf_wp] = j->dtmf_current;
j->dtmf_wp++;
if (j->dtmf_wp == 79)
j->dtmf_wp = 0;
j->ex.bits.dtmf_ready = 1;
if(j->ex_sig.bits.dtmf_ready) {
ixj_kill_fasync(j, SIG_DTMF_READY, POLL_IN);
}
}
else if(j->dtmf_current == 0x00 || j->dtmf_current == 0x0D) {
if(ixjdebug & 0x0020) {
printk("IXJ phone%d saw CIDCW Ack DTMF %d from display at %ld\n", j->board, j->dtmf_current, jiffies);
}
j->flags.cidcw_ack = 1;
}
j->dtmf_state = 0;
}
j->dtmf_proc = 0;
return 0;
}
/************************************************************************
*
* Functions to allow alaw <-> ulaw conversions.
*
************************************************************************/
static void ulaw2alaw(unsigned char *buff, unsigned long len)
{
static unsigned char table_ulaw2alaw[] =
{
0x2A, 0x2B, 0x28, 0x29, 0x2E, 0x2F, 0x2C, 0x2D,
0x22, 0x23, 0x20, 0x21, 0x26, 0x27, 0x24, 0x25,
0x3A, 0x3B, 0x38, 0x39, 0x3E, 0x3F, 0x3C, 0x3D,
0x32, 0x33, 0x30, 0x31, 0x36, 0x37, 0x34, 0x35,
0x0B, 0x08, 0x09, 0x0E, 0x0F, 0x0C, 0x0D, 0x02,
0x03, 0x00, 0x01, 0x06, 0x07, 0x04, 0x05, 0x1A,
0x1B, 0x18, 0x19, 0x1E, 0x1F, 0x1C, 0x1D, 0x12,
0x13, 0x10, 0x11, 0x16, 0x17, 0x14, 0x15, 0x6B,
0x68, 0x69, 0x6E, 0x6F, 0x6C, 0x6D, 0x62, 0x63,
0x60, 0x61, 0x66, 0x67, 0x64, 0x65, 0x7B, 0x79,
0x7E, 0x7F, 0x7C, 0x7D, 0x72, 0x73, 0x70, 0x71,
0x76, 0x77, 0x74, 0x75, 0x4B, 0x49, 0x4F, 0x4D,
0x42, 0x43, 0x40, 0x41, 0x46, 0x47, 0x44, 0x45,
0x5A, 0x5B, 0x58, 0x59, 0x5E, 0x5F, 0x5C, 0x5D,
0x52, 0x52, 0x53, 0x53, 0x50, 0x50, 0x51, 0x51,
0x56, 0x56, 0x57, 0x57, 0x54, 0x54, 0x55, 0xD5,
0xAA, 0xAB, 0xA8, 0xA9, 0xAE, 0xAF, 0xAC, 0xAD,
0xA2, 0xA3, 0xA0, 0xA1, 0xA6, 0xA7, 0xA4, 0xA5,
0xBA, 0xBB, 0xB8, 0xB9, 0xBE, 0xBF, 0xBC, 0xBD,
0xB2, 0xB3, 0xB0, 0xB1, 0xB6, 0xB7, 0xB4, 0xB5,
0x8B, 0x88, 0x89, 0x8E, 0x8F, 0x8C, 0x8D, 0x82,
0x83, 0x80, 0x81, 0x86, 0x87, 0x84, 0x85, 0x9A,
0x9B, 0x98, 0x99, 0x9E, 0x9F, 0x9C, 0x9D, 0x92,
0x93, 0x90, 0x91, 0x96, 0x97, 0x94, 0x95, 0xEB,
0xE8, 0xE9, 0xEE, 0xEF, 0xEC, 0xED, 0xE2, 0xE3,
0xE0, 0xE1, 0xE6, 0xE7, 0xE4, 0xE5, 0xFB, 0xF9,
0xFE, 0xFF, 0xFC, 0xFD, 0xF2, 0xF3, 0xF0, 0xF1,
0xF6, 0xF7, 0xF4, 0xF5, 0xCB, 0xC9, 0xCF, 0xCD,
0xC2, 0xC3, 0xC0, 0xC1, 0xC6, 0xC7, 0xC4, 0xC5,
0xDA, 0xDB, 0xD8, 0xD9, 0xDE, 0xDF, 0xDC, 0xDD,
0xD2, 0xD2, 0xD3, 0xD3, 0xD0, 0xD0, 0xD1, 0xD1,
0xD6, 0xD6, 0xD7, 0xD7, 0xD4, 0xD4, 0xD5, 0xD5
};
while (len--)
{
*buff = table_ulaw2alaw[*(unsigned char *)buff];
buff++;
}
}
static void alaw2ulaw(unsigned char *buff, unsigned long len)
{
static unsigned char table_alaw2ulaw[] =
{
0x29, 0x2A, 0x27, 0x28, 0x2D, 0x2E, 0x2B, 0x2C,
0x21, 0x22, 0x1F, 0x20, 0x25, 0x26, 0x23, 0x24,
0x39, 0x3A, 0x37, 0x38, 0x3D, 0x3E, 0x3B, 0x3C,
0x31, 0x32, 0x2F, 0x30, 0x35, 0x36, 0x33, 0x34,
0x0A, 0x0B, 0x08, 0x09, 0x0E, 0x0F, 0x0C, 0x0D,
0x02, 0x03, 0x00, 0x01, 0x06, 0x07, 0x04, 0x05,
0x1A, 0x1B, 0x18, 0x19, 0x1E, 0x1F, 0x1C, 0x1D,
0x12, 0x13, 0x10, 0x11, 0x16, 0x17, 0x14, 0x15,
0x62, 0x63, 0x60, 0x61, 0x66, 0x67, 0x64, 0x65,
0x5D, 0x5D, 0x5C, 0x5C, 0x5F, 0x5F, 0x5E, 0x5E,
0x74, 0x76, 0x70, 0x72, 0x7C, 0x7E, 0x78, 0x7A,
0x6A, 0x6B, 0x68, 0x69, 0x6E, 0x6F, 0x6C, 0x6D,
0x48, 0x49, 0x46, 0x47, 0x4C, 0x4D, 0x4A, 0x4B,
0x40, 0x41, 0x3F, 0x3F, 0x44, 0x45, 0x42, 0x43,
0x56, 0x57, 0x54, 0x55, 0x5A, 0x5B, 0x58, 0x59,
0x4F, 0x4F, 0x4E, 0x4E, 0x52, 0x53, 0x50, 0x51,
0xA9, 0xAA, 0xA7, 0xA8, 0xAD, 0xAE, 0xAB, 0xAC,
0xA1, 0xA2, 0x9F, 0xA0, 0xA5, 0xA6, 0xA3, 0xA4,
0xB9, 0xBA, 0xB7, 0xB8, 0xBD, 0xBE, 0xBB, 0xBC,
0xB1, 0xB2, 0xAF, 0xB0, 0xB5, 0xB6, 0xB3, 0xB4,
0x8A, 0x8B, 0x88, 0x89, 0x8E, 0x8F, 0x8C, 0x8D,
0x82, 0x83, 0x80, 0x81, 0x86, 0x87, 0x84, 0x85,
0x9A, 0x9B, 0x98, 0x99, 0x9E, 0x9F, 0x9C, 0x9D,
0x92, 0x93, 0x90, 0x91, 0x96, 0x97, 0x94, 0x95,
0xE2, 0xE3, 0xE0, 0xE1, 0xE6, 0xE7, 0xE4, 0xE5,
0xDD, 0xDD, 0xDC, 0xDC, 0xDF, 0xDF, 0xDE, 0xDE,
0xF4, 0xF6, 0xF0, 0xF2, 0xFC, 0xFE, 0xF8, 0xFA,
0xEA, 0xEB, 0xE8, 0xE9, 0xEE, 0xEF, 0xEC, 0xED,
0xC8, 0xC9, 0xC6, 0xC7, 0xCC, 0xCD, 0xCA, 0xCB,
0xC0, 0xC1, 0xBF, 0xBF, 0xC4, 0xC5, 0xC2, 0xC3,
0xD6, 0xD7, 0xD4, 0xD5, 0xDA, 0xDB, 0xD8, 0xD9,
0xCF, 0xCF, 0xCE, 0xCE, 0xD2, 0xD3, 0xD0, 0xD1
};
while (len--)
{
*buff = table_alaw2ulaw[*(unsigned char *)buff];
buff++;
}
}
static ssize_t ixj_read(struct file * file_p, char __user *buf, size_t length, loff_t * ppos)
{
unsigned long i = *ppos;
IXJ * j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
DECLARE_WAITQUEUE(wait, current);
if (j->flags.inread)
return -EALREADY;
j->flags.inread = 1;
add_wait_queue(&j->read_q, &wait);
set_current_state(TASK_INTERRUPTIBLE);
mb();
while (!j->read_buffer_ready || (j->dtmf_state && j->flags.dtmf_oob)) {
++j->read_wait;
if (file_p->f_flags & O_NONBLOCK) {
set_current_state(TASK_RUNNING);
remove_wait_queue(&j->read_q, &wait);
j->flags.inread = 0;
return -EAGAIN;
}
if (!ixj_hookstate(j)) {
set_current_state(TASK_RUNNING);
remove_wait_queue(&j->read_q, &wait);
j->flags.inread = 0;
return 0;
}
interruptible_sleep_on(&j->read_q);
if (signal_pending(current)) {
set_current_state(TASK_RUNNING);
remove_wait_queue(&j->read_q, &wait);
j->flags.inread = 0;
return -EINTR;
}
}
remove_wait_queue(&j->read_q, &wait);
set_current_state(TASK_RUNNING);
/* Don't ever copy more than the user asks */
if(j->rec_codec == ALAW)
ulaw2alaw(j->read_buffer, min(length, j->read_buffer_size));
i = copy_to_user(buf, j->read_buffer, min(length, j->read_buffer_size));
j->read_buffer_ready = 0;
if (i) {
j->flags.inread = 0;
return -EFAULT;
} else {
j->flags.inread = 0;
return min(length, j->read_buffer_size);
}
}
static ssize_t ixj_enhanced_read(struct file * file_p, char __user *buf, size_t length,
loff_t * ppos)
{
int pre_retval;
ssize_t read_retval = 0;
IXJ *j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
pre_retval = ixj_PreRead(j, 0L);
switch (pre_retval) {
case NORMAL:
read_retval = ixj_read(file_p, buf, length, ppos);
ixj_PostRead(j, 0L);
break;
case NOPOST:
read_retval = ixj_read(file_p, buf, length, ppos);
break;
case POSTONLY:
ixj_PostRead(j, 0L);
break;
default:
read_retval = pre_retval;
}
return read_retval;
}
static ssize_t ixj_write(struct file *file_p, const char __user *buf, size_t count, loff_t * ppos)
{
unsigned long i = *ppos;
IXJ *j = file_p->private_data;
DECLARE_WAITQUEUE(wait, current);
if (j->flags.inwrite)
return -EALREADY;
j->flags.inwrite = 1;
add_wait_queue(&j->write_q, &wait);
set_current_state(TASK_INTERRUPTIBLE);
mb();
while (!j->write_buffers_empty) {
++j->write_wait;
if (file_p->f_flags & O_NONBLOCK) {
set_current_state(TASK_RUNNING);
remove_wait_queue(&j->write_q, &wait);
j->flags.inwrite = 0;
return -EAGAIN;
}
if (!ixj_hookstate(j)) {
set_current_state(TASK_RUNNING);
remove_wait_queue(&j->write_q, &wait);
j->flags.inwrite = 0;
return 0;
}
interruptible_sleep_on(&j->write_q);
if (signal_pending(current)) {
set_current_state(TASK_RUNNING);
remove_wait_queue(&j->write_q, &wait);
j->flags.inwrite = 0;
return -EINTR;
}
}
set_current_state(TASK_RUNNING);
remove_wait_queue(&j->write_q, &wait);
if (j->write_buffer_wp + count >= j->write_buffer_end)
j->write_buffer_wp = j->write_buffer;
i = copy_from_user(j->write_buffer_wp, buf, min(count, j->write_buffer_size));
if (i) {
j->flags.inwrite = 0;
return -EFAULT;
}
if(j->play_codec == ALAW)
alaw2ulaw(j->write_buffer_wp, min(count, j->write_buffer_size));
j->flags.inwrite = 0;
return min(count, j->write_buffer_size);
}
static ssize_t ixj_enhanced_write(struct file * file_p, const char __user *buf, size_t count, loff_t * ppos)
{
int pre_retval;
ssize_t write_retval = 0;
IXJ *j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
pre_retval = ixj_PreWrite(j, 0L);
switch (pre_retval) {
case NORMAL:
write_retval = ixj_write(file_p, buf, count, ppos);
if (write_retval > 0) {
ixj_PostWrite(j, 0L);
j->write_buffer_wp += write_retval;
j->write_buffers_empty--;
}
break;
case NOPOST:
write_retval = ixj_write(file_p, buf, count, ppos);
if (write_retval > 0) {
j->write_buffer_wp += write_retval;
j->write_buffers_empty--;
}
break;
case POSTONLY:
ixj_PostWrite(j, 0L);
break;
default:
write_retval = pre_retval;
}
return write_retval;
}
static void ixj_read_frame(IXJ *j)
{
int cnt, dly;
if (j->read_buffer) {
for (cnt = 0; cnt < j->rec_frame_size * 2; cnt += 2) {
if (!(cnt % 16) && !IsRxReady(j)) {
dly = 0;
while (!IsRxReady(j)) {
if (dly++ > 5) {
dly = 0;
break;
}
udelay(10);
}
}
/* Throw away word 0 of the 8021 compressed format to get standard G.729. */
if (j->rec_codec == G729 && (cnt == 0 || cnt == 10 || cnt == 20)) {
inb_p(j->DSPbase + 0x0E);
inb_p(j->DSPbase + 0x0F);
}
*(j->read_buffer + cnt) = inb_p(j->DSPbase + 0x0E);
*(j->read_buffer + cnt + 1) = inb_p(j->DSPbase + 0x0F);
}
++j->framesread;
if (j->intercom != -1) {
if (IsTxReady(get_ixj(j->intercom))) {
for (cnt = 0; cnt < j->rec_frame_size * 2; cnt += 2) {
if (!(cnt % 16) && !IsTxReady(j)) {
dly = 0;
while (!IsTxReady(j)) {
if (dly++ > 5) {
dly = 0;
break;
}
udelay(10);
}
}
outb_p(*(j->read_buffer + cnt), get_ixj(j->intercom)->DSPbase + 0x0C);
outb_p(*(j->read_buffer + cnt + 1), get_ixj(j->intercom)->DSPbase + 0x0D);
}
get_ixj(j->intercom)->frameswritten++;
}
} else {
j->read_buffer_ready = 1;
wake_up_interruptible(&j->read_q); /* Wake any blocked readers */
wake_up_interruptible(&j->poll_q); /* Wake any blocked selects */
if(j->ixj_signals[SIG_READ_READY])
ixj_kill_fasync(j, SIG_READ_READY, POLL_OUT);
}
}
}
static short fsk[][6][20] =
{
{
{
0, 17846, 29934, 32364, 24351, 8481, -10126, -25465, -32587, -29196,
-16384, 1715, 19260, 30591, 32051, 23170, 6813, -11743, -26509, -32722
},
{
-28377, -14876, 3425, 20621, 31163, 31650, 21925, 5126, -13328, -27481,
-32767, -27481, -13328, 5126, 21925, 31650, 31163, 20621, 3425, -14876
},
{
-28377, -32722, -26509, -11743, 6813, 23170, 32051, 30591, 19260, 1715,
-16384, -29196, -32587, -25465, -10126, 8481, 24351, 32364, 29934, 17846
},
{
0, -17846, -29934, -32364, -24351, -8481, 10126, 25465, 32587, 29196,
16384, -1715, -19260, -30591, -32051, -23170, -6813, 11743, 26509, 32722
},
{
28377, 14876, -3425, -20621, -31163, -31650, -21925, -5126, 13328, 27481,
32767, 27481, 13328, -5126, -21925, -31650, -31163, -20621, -3425, 14876
},
{
28377, 32722, 26509, 11743, -6813, -23170, -32051, -30591, -19260, -1715,
16384, 29196, 32587, 25465, 10126, -8481, -24351, -32364, -29934, -17846
}
},
{
{
0, 10126, 19260, 26509, 31163, 32767, 31163, 26509, 19260, 10126,
0, -10126, -19260, -26509, -31163, -32767, -31163, -26509, -19260, -10126
},
{
-28377, -21925, -13328, -3425, 6813, 16384, 24351, 29934, 32587, 32051,
28377, 21925, 13328, 3425, -6813, -16384, -24351, -29934, -32587, -32051
},
{
-28377, -32051, -32587, -29934, -24351, -16384, -6813, 3425, 13328, 21925,
28377, 32051, 32587, 29934, 24351, 16384, 6813, -3425, -13328, -21925
},
{
0, -10126, -19260, -26509, -31163, -32767, -31163, -26509, -19260, -10126,
0, 10126, 19260, 26509, 31163, 32767, 31163, 26509, 19260, 10126
},
{
28377, 21925, 13328, 3425, -6813, -16383, -24351, -29934, -32587, -32051,
-28377, -21925, -13328, -3425, 6813, 16383, 24351, 29934, 32587, 32051
},
{
28377, 32051, 32587, 29934, 24351, 16384, 6813, -3425, -13328, -21925,
-28377, -32051, -32587, -29934, -24351, -16384, -6813, 3425, 13328, 21925
}
}
};
static void ixj_write_cid_bit(IXJ *j, int bit)
{
while (j->fskcnt < 20) {
if(j->fskdcnt < (j->fsksize - 1))
j->fskdata[j->fskdcnt++] = fsk[bit][j->fskz][j->fskcnt];
j->fskcnt += 3;
}
j->fskcnt %= 20;
if (!bit)
j->fskz++;
if (j->fskz >= 6)
j->fskz = 0;
}
static void ixj_write_cid_byte(IXJ *j, char byte)
{
IXJ_CBYTE cb;
cb.cbyte = byte;
ixj_write_cid_bit(j, 0);
ixj_write_cid_bit(j, cb.cbits.b0 ? 1 : 0);
ixj_write_cid_bit(j, cb.cbits.b1 ? 1 : 0);
ixj_write_cid_bit(j, cb.cbits.b2 ? 1 : 0);
ixj_write_cid_bit(j, cb.cbits.b3 ? 1 : 0);
ixj_write_cid_bit(j, cb.cbits.b4 ? 1 : 0);
ixj_write_cid_bit(j, cb.cbits.b5 ? 1 : 0);
ixj_write_cid_bit(j, cb.cbits.b6 ? 1 : 0);
ixj_write_cid_bit(j, cb.cbits.b7 ? 1 : 0);
ixj_write_cid_bit(j, 1);
}
static void ixj_write_cid_seize(IXJ *j)
{
int cnt;
for (cnt = 0; cnt < 150; cnt++) {
ixj_write_cid_bit(j, 0);
ixj_write_cid_bit(j, 1);
}
for (cnt = 0; cnt < 180; cnt++) {
ixj_write_cid_bit(j, 1);
}
}
static void ixj_write_cidcw_seize(IXJ *j)
{
int cnt;
for (cnt = 0; cnt < 80; cnt++) {
ixj_write_cid_bit(j, 1);
}
}
static int ixj_write_cid_string(IXJ *j, char *s, int checksum)
{
int cnt;
for (cnt = 0; cnt < strlen(s); cnt++) {
ixj_write_cid_byte(j, s[cnt]);
checksum = (checksum + s[cnt]);
}
return checksum;
}
static void ixj_pad_fsk(IXJ *j, int pad)
{
int cnt;
for (cnt = 0; cnt < pad; cnt++) {
if(j->fskdcnt < (j->fsksize - 1))
j->fskdata[j->fskdcnt++] = 0x0000;
}
for (cnt = 0; cnt < 720; cnt++) {
if(j->fskdcnt < (j->fsksize - 1))
j->fskdata[j->fskdcnt++] = 0x0000;
}
}
static void ixj_pre_cid(IXJ *j)
{
j->cid_play_codec = j->play_codec;
j->cid_play_frame_size = j->play_frame_size;
j->cid_play_volume = get_play_volume(j);
j->cid_play_flag = j->flags.playing;
j->cid_rec_codec = j->rec_codec;
j->cid_rec_volume = get_rec_volume(j);
j->cid_rec_flag = j->flags.recording;
j->cid_play_aec_level = j->aec_level;
switch(j->baseframe.low) {
case 0xA0:
j->cid_base_frame_size = 20;
break;
case 0x50:
j->cid_base_frame_size = 10;
break;
case 0xF0:
j->cid_base_frame_size = 30;
break;
}
ixj_play_stop(j);
ixj_cpt_stop(j);
j->flags.cidplay = 1;
set_base_frame(j, 30);
set_play_codec(j, LINEAR16);
set_play_volume(j, 0x1B);
ixj_play_start(j);
}
static void ixj_post_cid(IXJ *j)
{
ixj_play_stop(j);
if(j->cidsize > 5000) {
SLIC_SetState(PLD_SLIC_STATE_STANDBY, j);
}
j->flags.cidplay = 0;
if(ixjdebug & 0x0200) {
printk("IXJ phone%d Finished Playing CallerID data %ld\n", j->board, jiffies);
}
ixj_fsk_free(j);
j->fskdcnt = 0;
set_base_frame(j, j->cid_base_frame_size);
set_play_codec(j, j->cid_play_codec);
ixj_aec_start(j, j->cid_play_aec_level);
set_play_volume(j, j->cid_play_volume);
set_rec_codec(j, j->cid_rec_codec);
set_rec_volume(j, j->cid_rec_volume);
if(j->cid_rec_flag)
ixj_record_start(j);
if(j->cid_play_flag)
ixj_play_start(j);
if(j->cid_play_flag) {
wake_up_interruptible(&j->write_q); /* Wake any blocked writers */
}
}
static void ixj_write_cid(IXJ *j)
{
char sdmf1[50];
char sdmf2[50];
char sdmf3[80];
char mdmflen, len1, len2, len3;
int pad;
int checksum = 0;
if (j->dsp.low == 0x20 || j->flags.cidplay)
return;
j->fskz = j->fskphase = j->fskcnt = j->fskdcnt = 0;
j->cidsize = j->cidcnt = 0;
ixj_fsk_alloc(j);
strcpy(sdmf1, j->cid_send.month);
strcat(sdmf1, j->cid_send.day);
strcat(sdmf1, j->cid_send.hour);
strcat(sdmf1, j->cid_send.min);
strcpy(sdmf2, j->cid_send.number);
strcpy(sdmf3, j->cid_send.name);
len1 = strlen(sdmf1);
len2 = strlen(sdmf2);
len3 = strlen(sdmf3);
mdmflen = len1 + len2 + len3 + 6;
while(1){
ixj_write_cid_seize(j);
ixj_write_cid_byte(j, 0x80);
checksum = 0x80;
ixj_write_cid_byte(j, mdmflen);
checksum = checksum + mdmflen;
ixj_write_cid_byte(j, 0x01);
checksum = checksum + 0x01;
ixj_write_cid_byte(j, len1);
checksum = checksum + len1;
checksum = ixj_write_cid_string(j, sdmf1, checksum);
if(ixj_hookstate(j) & 1)
break;
ixj_write_cid_byte(j, 0x02);
checksum = checksum + 0x02;
ixj_write_cid_byte(j, len2);
checksum = checksum + len2;
checksum = ixj_write_cid_string(j, sdmf2, checksum);
if(ixj_hookstate(j) & 1)
break;
ixj_write_cid_byte(j, 0x07);
checksum = checksum + 0x07;
ixj_write_cid_byte(j, len3);
checksum = checksum + len3;
checksum = ixj_write_cid_string(j, sdmf3, checksum);
if(ixj_hookstate(j) & 1)
break;
checksum %= 256;
checksum ^= 0xFF;
checksum += 1;
ixj_write_cid_byte(j, (char) checksum);
pad = j->fskdcnt % 240;
if (pad) {
pad = 240 - pad;
}
ixj_pad_fsk(j, pad);
break;
}
ixj_write_frame(j);
}
static void ixj_write_cidcw(IXJ *j)
{
IXJ_TONE ti;
char sdmf1[50];
char sdmf2[50];
char sdmf3[80];
char mdmflen, len1, len2, len3;
int pad;
int checksum = 0;
if (j->dsp.low == 0x20 || j->flags.cidplay)
return;
j->fskz = j->fskphase = j->fskcnt = j->fskdcnt = 0;
j->cidsize = j->cidcnt = 0;
ixj_fsk_alloc(j);
j->flags.cidcw_ack = 0;
ti.tone_index = 23;
ti.gain0 = 1;
ti.freq0 = hz440;
ti.gain1 = 0;
ti.freq1 = 0;
ixj_init_tone(j, &ti);
ixj_set_tone_on(1500, j);
ixj_set_tone_off(32, j);
if(ixjdebug & 0x0200) {
printk("IXJ cidcw phone%d first tone start at %ld\n", j->board, jiffies);
}
ixj_play_tone(j, 23);
clear_bit(j->board, &j->busyflags);
while(j->tone_state)
schedule_timeout_interruptible(1);
while(test_and_set_bit(j->board, (void *)&j->busyflags) != 0)
schedule_timeout_interruptible(1);
if(ixjdebug & 0x0200) {
printk("IXJ cidcw phone%d first tone end at %ld\n", j->board, jiffies);
}
ti.tone_index = 24;
ti.gain0 = 1;
ti.freq0 = hz2130;
ti.gain1 = 0;
ti.freq1 = hz2750;
ixj_init_tone(j, &ti);
ixj_set_tone_off(10, j);
ixj_set_tone_on(600, j);
if(ixjdebug & 0x0200) {
printk("IXJ cidcw phone%d second tone start at %ld\n", j->board, jiffies);
}
ixj_play_tone(j, 24);
clear_bit(j->board, &j->busyflags);
while(j->tone_state)
schedule_timeout_interruptible(1);
while(test_and_set_bit(j->board, (void *)&j->busyflags) != 0)
schedule_timeout_interruptible(1);
if(ixjdebug & 0x0200) {
printk("IXJ cidcw phone%d sent second tone at %ld\n", j->board, jiffies);
}
j->cidcw_wait = jiffies + ((50 * hertz) / 100);
clear_bit(j->board, &j->busyflags);
while(!j->flags.cidcw_ack && time_before(jiffies, j->cidcw_wait))
schedule_timeout_interruptible(1);
while(test_and_set_bit(j->board, (void *)&j->busyflags) != 0)
schedule_timeout_interruptible(1);
j->cidcw_wait = 0;
if(!j->flags.cidcw_ack) {
if(ixjdebug & 0x0200) {
printk("IXJ cidcw phone%d did not receive ACK from display %ld\n", j->board, jiffies);
}
ixj_post_cid(j);
if(j->cid_play_flag) {
wake_up_interruptible(&j->write_q); /* Wake any blocked readers */
}
return;
} else {
ixj_pre_cid(j);
}
j->flags.cidcw_ack = 0;
strcpy(sdmf1, j->cid_send.month);
strcat(sdmf1, j->cid_send.day);
strcat(sdmf1, j->cid_send.hour);
strcat(sdmf1, j->cid_send.min);
strcpy(sdmf2, j->cid_send.number);
strcpy(sdmf3, j->cid_send.name);
len1 = strlen(sdmf1);
len2 = strlen(sdmf2);
len3 = strlen(sdmf3);
mdmflen = len1 + len2 + len3 + 6;
ixj_write_cidcw_seize(j);
ixj_write_cid_byte(j, 0x80);
checksum = 0x80;
ixj_write_cid_byte(j, mdmflen);
checksum = checksum + mdmflen;
ixj_write_cid_byte(j, 0x01);
checksum = checksum + 0x01;
ixj_write_cid_byte(j, len1);
checksum = checksum + len1;
checksum = ixj_write_cid_string(j, sdmf1, checksum);
ixj_write_cid_byte(j, 0x02);
checksum = checksum + 0x02;
ixj_write_cid_byte(j, len2);
checksum = checksum + len2;
checksum = ixj_write_cid_string(j, sdmf2, checksum);
ixj_write_cid_byte(j, 0x07);
checksum = checksum + 0x07;
ixj_write_cid_byte(j, len3);
checksum = checksum + len3;
checksum = ixj_write_cid_string(j, sdmf3, checksum);
checksum %= 256;
checksum ^= 0xFF;
checksum += 1;
ixj_write_cid_byte(j, (char) checksum);
pad = j->fskdcnt % 240;
if (pad) {
pad = 240 - pad;
}
ixj_pad_fsk(j, pad);
if(ixjdebug & 0x0200) {
printk("IXJ cidcw phone%d sent FSK data at %ld\n", j->board, jiffies);
}
}
static void ixj_write_vmwi(IXJ *j, int msg)
{
char mdmflen;
int pad;
int checksum = 0;
if (j->dsp.low == 0x20 || j->flags.cidplay)
return;
j->fskz = j->fskphase = j->fskcnt = j->fskdcnt = 0;
j->cidsize = j->cidcnt = 0;
ixj_fsk_alloc(j);
mdmflen = 3;
if (j->port == PORT_POTS)
SLIC_SetState(PLD_SLIC_STATE_OHT, j);
ixj_write_cid_seize(j);
ixj_write_cid_byte(j, 0x82);
checksum = 0x82;
ixj_write_cid_byte(j, mdmflen);
checksum = checksum + mdmflen;
ixj_write_cid_byte(j, 0x0B);
checksum = checksum + 0x0B;
ixj_write_cid_byte(j, 1);
checksum = checksum + 1;
if(msg) {
ixj_write_cid_byte(j, 0xFF);
checksum = checksum + 0xFF;
}
else {
ixj_write_cid_byte(j, 0x00);
checksum = checksum + 0x00;
}
checksum %= 256;
checksum ^= 0xFF;
checksum += 1;
ixj_write_cid_byte(j, (char) checksum);
pad = j->fskdcnt % 240;
if (pad) {
pad = 240 - pad;
}
ixj_pad_fsk(j, pad);
}
static void ixj_write_frame(IXJ *j)
{
int cnt, frame_count, dly;
IXJ_WORD dat;
frame_count = 0;
if(j->flags.cidplay) {
for(cnt = 0; cnt < 480; cnt++) {
if (!(cnt % 16) && !IsTxReady(j)) {
dly = 0;
while (!IsTxReady(j)) {
if (dly++ > 5) {
dly = 0;
break;
}
udelay(10);
}
}
dat.word = j->fskdata[j->cidcnt++];
outb_p(dat.bytes.low, j->DSPbase + 0x0C);
outb_p(dat.bytes.high, j->DSPbase + 0x0D);
cnt++;
}
if(j->cidcnt >= j->fskdcnt) {
ixj_post_cid(j);
}
/* This may seem rude, but if we just played one frame of FSK data for CallerID
and there is real audio data in the buffer, we need to throw it away because
we just used it's time slot */
if (j->write_buffer_rp > j->write_buffer_wp) {
j->write_buffer_rp += j->cid_play_frame_size * 2;
if (j->write_buffer_rp >= j->write_buffer_end) {
j->write_buffer_rp = j->write_buffer;
}
j->write_buffers_empty++;
wake_up_interruptible(&j->write_q); /* Wake any blocked writers */
wake_up_interruptible(&j->poll_q); /* Wake any blocked selects */
}
} else if (j->write_buffer && j->write_buffers_empty < 1) {
if (j->write_buffer_wp > j->write_buffer_rp) {
frame_count =
(j->write_buffer_wp - j->write_buffer_rp) / (j->play_frame_size * 2);
}
if (j->write_buffer_rp > j->write_buffer_wp) {
frame_count =
(j->write_buffer_wp - j->write_buffer) / (j->play_frame_size * 2) +
(j->write_buffer_end - j->write_buffer_rp) / (j->play_frame_size * 2);
}
if (frame_count >= 1) {
if (j->ver.low == 0x12 && j->play_mode && j->flags.play_first_frame) {
BYTES blankword;
switch (j->play_mode) {
case PLAYBACK_MODE_ULAW:
case PLAYBACK_MODE_ALAW:
blankword.low = blankword.high = 0xFF;
break;
case PLAYBACK_MODE_8LINEAR:
case PLAYBACK_MODE_16LINEAR:
default:
blankword.low = blankword.high = 0x00;
break;
case PLAYBACK_MODE_8LINEAR_WSS:
blankword.low = blankword.high = 0x80;
break;
}
for (cnt = 0; cnt < 16; cnt++) {
if (!(cnt % 16) && !IsTxReady(j)) {
dly = 0;
while (!IsTxReady(j)) {
if (dly++ > 5) {
dly = 0;
break;
}
udelay(10);
}
}
outb_p((blankword.low), j->DSPbase + 0x0C);
outb_p((blankword.high), j->DSPbase + 0x0D);
}
j->flags.play_first_frame = 0;
} else if (j->play_codec == G723_63 && j->flags.play_first_frame) {
for (cnt = 0; cnt < 24; cnt++) {
BYTES blankword;
if(cnt == 12) {
blankword.low = 0x02;
blankword.high = 0x00;
}
else {
blankword.low = blankword.high = 0x00;
}
if (!(cnt % 16) && !IsTxReady(j)) {
dly = 0;
while (!IsTxReady(j)) {
if (dly++ > 5) {
dly = 0;
break;
}
udelay(10);
}
}
outb_p((blankword.low), j->DSPbase + 0x0C);
outb_p((blankword.high), j->DSPbase + 0x0D);
}
j->flags.play_first_frame = 0;
}
for (cnt = 0; cnt < j->play_frame_size * 2; cnt += 2) {
if (!(cnt % 16) && !IsTxReady(j)) {
dly = 0;
while (!IsTxReady(j)) {
if (dly++ > 5) {
dly = 0;
break;
}
udelay(10);
}
}
/* Add word 0 to G.729 frames for the 8021. Right now we don't do VAD/CNG */
if (j->play_codec == G729 && (cnt == 0 || cnt == 10 || cnt == 20)) {
if (j->write_buffer_rp[cnt] == 0 &&
j->write_buffer_rp[cnt + 1] == 0 &&
j->write_buffer_rp[cnt + 2] == 0 &&
j->write_buffer_rp[cnt + 3] == 0 &&
j->write_buffer_rp[cnt + 4] == 0 &&
j->write_buffer_rp[cnt + 5] == 0 &&
j->write_buffer_rp[cnt + 6] == 0 &&
j->write_buffer_rp[cnt + 7] == 0 &&
j->write_buffer_rp[cnt + 8] == 0 &&
j->write_buffer_rp[cnt + 9] == 0) {
/* someone is trying to write silence lets make this a type 0 frame. */
outb_p(0x00, j->DSPbase + 0x0C);
outb_p(0x00, j->DSPbase + 0x0D);
} else {
/* so all other frames are type 1. */
outb_p(0x01, j->DSPbase + 0x0C);
outb_p(0x00, j->DSPbase + 0x0D);
}
}
outb_p(*(j->write_buffer_rp + cnt), j->DSPbase + 0x0C);
outb_p(*(j->write_buffer_rp + cnt + 1), j->DSPbase + 0x0D);
*(j->write_buffer_rp + cnt) = 0;
*(j->write_buffer_rp + cnt + 1) = 0;
}
j->write_buffer_rp += j->play_frame_size * 2;
if (j->write_buffer_rp >= j->write_buffer_end) {
j->write_buffer_rp = j->write_buffer;
}
j->write_buffers_empty++;
wake_up_interruptible(&j->write_q); /* Wake any blocked writers */
wake_up_interruptible(&j->poll_q); /* Wake any blocked selects */
++j->frameswritten;
}
} else {
j->drybuffer++;
}
if(j->ixj_signals[SIG_WRITE_READY]) {
ixj_kill_fasync(j, SIG_WRITE_READY, POLL_OUT);
}
}
static int idle(IXJ *j)
{
if (ixj_WriteDSPCommand(0x0000, j)) /* DSP Idle */
return 0;
if (j->ssr.high || j->ssr.low) {
return 0;
} else {
j->play_mode = -1;
j->flags.playing = 0;
j->rec_mode = -1;
j->flags.recording = 0;
return 1;
}
}
static int set_base_frame(IXJ *j, int size)
{
unsigned short cmd;
int cnt;
idle(j);
j->cid_play_aec_level = j->aec_level;
aec_stop(j);
for (cnt = 0; cnt < 10; cnt++) {
if (idle(j))
break;
}
if (j->ssr.high || j->ssr.low)
return -1;
if (j->dsp.low != 0x20) {
switch (size) {
case 30:
cmd = 0x07F0;
/* Set Base Frame Size to 240 pg9-10 8021 */
break;
case 20:
cmd = 0x07A0;
/* Set Base Frame Size to 160 pg9-10 8021 */
break;
case 10:
cmd = 0x0750;
/* Set Base Frame Size to 80 pg9-10 8021 */
break;
default:
return -1;
}
} else {
if (size == 30)
return size;
else
return -1;
}
if (ixj_WriteDSPCommand(cmd, j)) {
j->baseframe.high = j->baseframe.low = 0xFF;
return -1;
} else {
j->baseframe.high = j->ssr.high;
j->baseframe.low = j->ssr.low;
/* If the status returned is 0x0000 (pg9-9 8021) the call failed */
if(j->baseframe.high == 0x00 && j->baseframe.low == 0x00) {
return -1;
}
}
ixj_aec_start(j, j->cid_play_aec_level);
return size;
}
static int set_rec_codec(IXJ *j, int rate)
{
int retval = 0;
j->rec_codec = rate;
switch (rate) {
case G723_63:
if (j->ver.low != 0x12 || ixj_convert_loaded) {
j->rec_frame_size = 12;
j->rec_mode = 0;
} else {
retval = 1;
}
break;
case G723_53:
if (j->ver.low != 0x12 || ixj_convert_loaded) {
j->rec_frame_size = 10;
j->rec_mode = 0;
} else {
retval = 1;
}
break;
case TS85:
if (j->dsp.low == 0x20 || j->flags.ts85_loaded) {
j->rec_frame_size = 16;
j->rec_mode = 0;
} else {
retval = 1;
}
break;
case TS48:
if (j->ver.low != 0x12 || ixj_convert_loaded) {
j->rec_frame_size = 9;
j->rec_mode = 0;
} else {
retval = 1;
}
break;
case TS41:
if (j->ver.low != 0x12 || ixj_convert_loaded) {
j->rec_frame_size = 8;
j->rec_mode = 0;
} else {
retval = 1;
}
break;
case G728:
if (j->dsp.low != 0x20) {
j->rec_frame_size = 48;
j->rec_mode = 0;
} else {
retval = 1;
}
break;
case G729:
if (j->dsp.low != 0x20) {
if (!j->flags.g729_loaded) {
retval = 1;
break;
}
switch (j->baseframe.low) {
case 0xA0:
j->rec_frame_size = 10;
break;
case 0x50:
j->rec_frame_size = 5;
break;
default:
j->rec_frame_size = 15;
break;
}
j->rec_mode = 0;
} else {
retval = 1;
}
break;
case G729B:
if (j->dsp.low != 0x20) {
if (!j->flags.g729_loaded) {
retval = 1;
break;
}
switch (j->baseframe.low) {
case 0xA0:
j->rec_frame_size = 12;
break;
case 0x50:
j->rec_frame_size = 6;
break;
default:
j->rec_frame_size = 18;
break;
}
j->rec_mode = 0;
} else {
retval = 1;
}
break;
case ULAW:
switch (j->baseframe.low) {
case 0xA0:
j->rec_frame_size = 80;
break;
case 0x50:
j->rec_frame_size = 40;
break;
default:
j->rec_frame_size = 120;
break;
}
j->rec_mode = 4;
break;
case ALAW:
switch (j->baseframe.low) {
case 0xA0:
j->rec_frame_size = 80;
break;
case 0x50:
j->rec_frame_size = 40;
break;
default:
j->rec_frame_size = 120;
break;
}
j->rec_mode = 4;
break;
case LINEAR16:
switch (j->baseframe.low) {
case 0xA0:
j->rec_frame_size = 160;
break;
case 0x50:
j->rec_frame_size = 80;
break;
default:
j->rec_frame_size = 240;
break;
}
j->rec_mode = 5;
break;
case LINEAR8:
switch (j->baseframe.low) {
case 0xA0:
j->rec_frame_size = 80;
break;
case 0x50:
j->rec_frame_size = 40;
break;
default:
j->rec_frame_size = 120;
break;
}
j->rec_mode = 6;
break;
case WSS:
switch (j->baseframe.low) {
case 0xA0:
j->rec_frame_size = 80;
break;
case 0x50:
j->rec_frame_size = 40;
break;
default:
j->rec_frame_size = 120;
break;
}
j->rec_mode = 7;
break;
default:
kfree(j->read_buffer);
j->rec_frame_size = 0;
j->rec_mode = -1;
j->read_buffer = NULL;
j->read_buffer_size = 0;
retval = 1;
break;
}
return retval;
}
static int ixj_record_start(IXJ *j)
{
unsigned short cmd = 0x0000;
if (j->read_buffer) {
ixj_record_stop(j);
}
j->flags.recording = 1;
ixj_WriteDSPCommand(0x0FE0, j); /* Put the DSP in full power mode. */
if(ixjdebug & 0x0002)
printk("IXJ %d Starting Record Codec %d at %ld\n", j->board, j->rec_codec, jiffies);
if (!j->rec_mode) {
switch (j->rec_codec) {
case G723_63:
cmd = 0x5131;
break;
case G723_53:
cmd = 0x5132;
break;
case TS85:
cmd = 0x5130; /* TrueSpeech 8.5 */
break;
case TS48:
cmd = 0x5133; /* TrueSpeech 4.8 */
break;
case TS41:
cmd = 0x5134; /* TrueSpeech 4.1 */
break;
case G728:
cmd = 0x5135;
break;
case G729:
case G729B:
cmd = 0x5136;
break;
default:
return 1;
}
if (ixj_WriteDSPCommand(cmd, j))
return -1;
}
if (!j->read_buffer) {
if (!j->read_buffer)
j->read_buffer = kmalloc(j->rec_frame_size * 2, GFP_ATOMIC);
if (!j->read_buffer) {
printk("Read buffer allocation for ixj board %d failed!\n", j->board);
return -ENOMEM;
}
}
j->read_buffer_size = j->rec_frame_size * 2;
if (ixj_WriteDSPCommand(0x5102, j)) /* Set Poll sync mode */
return -1;
switch (j->rec_mode) {
case 0:
cmd = 0x1C03; /* Record C1 */
break;
case 4:
if (j->ver.low == 0x12) {
cmd = 0x1E03; /* Record C1 */
} else {
cmd = 0x1E01; /* Record C1 */
}
break;
case 5:
if (j->ver.low == 0x12) {
cmd = 0x1E83; /* Record C1 */
} else {
cmd = 0x1E81; /* Record C1 */
}
break;
case 6:
if (j->ver.low == 0x12) {
cmd = 0x1F03; /* Record C1 */
} else {
cmd = 0x1F01; /* Record C1 */
}
break;
case 7:
if (j->ver.low == 0x12) {
cmd = 0x1F83; /* Record C1 */
} else {
cmd = 0x1F81; /* Record C1 */
}
break;
}
if (ixj_WriteDSPCommand(cmd, j))
return -1;
if (j->flags.playing) {
ixj_aec_start(j, j->aec_level);
}
return 0;
}
static void ixj_record_stop(IXJ *j)
{
if (ixjdebug & 0x0002)
printk("IXJ %d Stopping Record Codec %d at %ld\n", j->board, j->rec_codec, jiffies);
kfree(j->read_buffer);
j->read_buffer = NULL;
j->read_buffer_size = 0;
if (j->rec_mode > -1) {
ixj_WriteDSPCommand(0x5120, j);
j->rec_mode = -1;
}
j->flags.recording = 0;
}
static void ixj_vad(IXJ *j, int arg)
{
if (arg)
ixj_WriteDSPCommand(0x513F, j);
else
ixj_WriteDSPCommand(0x513E, j);
}
static void set_rec_depth(IXJ *j, int depth)
{
if (depth > 60)
depth = 60;
if (depth < 0)
depth = 0;
ixj_WriteDSPCommand(0x5180 + depth, j);
}
static void set_dtmf_prescale(IXJ *j, int volume)
{
ixj_WriteDSPCommand(0xCF07, j);
ixj_WriteDSPCommand(volume, j);
}
static int get_dtmf_prescale(IXJ *j)
{
ixj_WriteDSPCommand(0xCF05, j);
return j->ssr.high << 8 | j->ssr.low;
}
static void set_rec_volume(IXJ *j, int volume)
{
if(j->aec_level == AEC_AGC) {
if (ixjdebug & 0x0002)
printk(KERN_INFO "IXJ: /dev/phone%d Setting AGC Threshold to 0x%4.4x\n", j->board, volume);
ixj_WriteDSPCommand(0xCF96, j);
ixj_WriteDSPCommand(volume, j);
} else {
if (ixjdebug & 0x0002)
printk(KERN_INFO "IXJ: /dev/phone %d Setting Record Volume to 0x%4.4x\n", j->board, volume);
ixj_WriteDSPCommand(0xCF03, j);
ixj_WriteDSPCommand(volume, j);
}
}
static int set_rec_volume_linear(IXJ *j, int volume)
{
int newvolume, dsprecmax;
if (ixjdebug & 0x0002)
printk(KERN_INFO "IXJ: /dev/phone %d Setting Linear Record Volume to 0x%4.4x\n", j->board, volume);
if(volume > 100 || volume < 0) {
return -1;
}
/* This should normalize the perceived volumes between the different cards caused by differences in the hardware */
switch (j->cardtype) {
case QTI_PHONEJACK:
dsprecmax = 0x440;
break;
case QTI_LINEJACK:
dsprecmax = 0x180;
ixj_mixer(0x0203, j); /*Voice Left Volume unmute 6db */
ixj_mixer(0x0303, j); /*Voice Right Volume unmute 6db */
ixj_mixer(0x0C00, j); /*Mono1 unmute 12db */
break;
case QTI_PHONEJACK_LITE:
dsprecmax = 0x4C0;
break;
case QTI_PHONEJACK_PCI:
dsprecmax = 0x100;
break;
case QTI_PHONECARD:
dsprecmax = 0x400;
break;
default:
return -1;
}
newvolume = (dsprecmax * volume) / 100;
set_rec_volume(j, newvolume);
return 0;
}
static int get_rec_volume(IXJ *j)
{
if(j->aec_level == AEC_AGC) {
if (ixjdebug & 0x0002)
printk(KERN_INFO "Getting AGC Threshold\n");
ixj_WriteDSPCommand(0xCF86, j);
if (ixjdebug & 0x0002)
printk(KERN_INFO "AGC Threshold is 0x%2.2x%2.2x\n", j->ssr.high, j->ssr.low);
return j->ssr.high << 8 | j->ssr.low;
} else {
if (ixjdebug & 0x0002)
printk(KERN_INFO "Getting Record Volume\n");
ixj_WriteDSPCommand(0xCF01, j);
return j->ssr.high << 8 | j->ssr.low;
}
}
static int get_rec_volume_linear(IXJ *j)
{
int volume, newvolume, dsprecmax;
switch (j->cardtype) {
case QTI_PHONEJACK:
dsprecmax = 0x440;
break;
case QTI_LINEJACK:
dsprecmax = 0x180;
break;
case QTI_PHONEJACK_LITE:
dsprecmax = 0x4C0;
break;
case QTI_PHONEJACK_PCI:
dsprecmax = 0x100;
break;
case QTI_PHONECARD:
dsprecmax = 0x400;
break;
default:
return -1;
}
volume = get_rec_volume(j);
newvolume = (volume * 100) / dsprecmax;
if(newvolume > 100)
newvolume = 100;
return newvolume;
}
static int get_rec_level(IXJ *j)
{
int retval;
ixj_WriteDSPCommand(0xCF88, j);
retval = j->ssr.high << 8 | j->ssr.low;
retval = (retval * 256) / 240;
return retval;
}
static void ixj_aec_start(IXJ *j, int level)
{
j->aec_level = level;
if (ixjdebug & 0x0002)
printk(KERN_INFO "AGC set = 0x%2.2x\n", j->aec_level);
if (!level) {
aec_stop(j);
} else {
if (j->rec_codec == G729 || j->play_codec == G729 || j->rec_codec == G729B || j->play_codec == G729B) {
ixj_WriteDSPCommand(0xE022, j); /* Move AEC filter buffer */
ixj_WriteDSPCommand(0x0300, j);
}
ixj_WriteDSPCommand(0xB001, j); /* AEC On */
ixj_WriteDSPCommand(0xE013, j); /* Advanced AEC C1 */
switch (level) {
case AEC_LOW:
ixj_WriteDSPCommand(0x0000, j); /* Advanced AEC C2 = off */
ixj_WriteDSPCommand(0xE011, j);
ixj_WriteDSPCommand(0xFFFF, j);
ixj_WriteDSPCommand(0xCF97, j); /* Set AGC Enable */
ixj_WriteDSPCommand(0x0000, j); /* to off */
break;
case AEC_MED:
ixj_WriteDSPCommand(0x0600, j); /* Advanced AEC C2 = on medium */
ixj_WriteDSPCommand(0xE011, j);
ixj_WriteDSPCommand(0x0080, j);
ixj_WriteDSPCommand(0xCF97, j); /* Set AGC Enable */
ixj_WriteDSPCommand(0x0000, j); /* to off */
break;
case AEC_HIGH:
ixj_WriteDSPCommand(0x0C00, j); /* Advanced AEC C2 = on high */
ixj_WriteDSPCommand(0xE011, j);
ixj_WriteDSPCommand(0x0080, j);
ixj_WriteDSPCommand(0xCF97, j); /* Set AGC Enable */
ixj_WriteDSPCommand(0x0000, j); /* to off */
break;
case AEC_AGC:
/* First we have to put the AEC into advance auto mode so that AGC will not conflict with it */
ixj_WriteDSPCommand(0x0002, j); /* Attenuation scaling factor of 2 */
ixj_WriteDSPCommand(0xE011, j);
ixj_WriteDSPCommand(0x0100, j); /* Higher Threshold Floor */
ixj_WriteDSPCommand(0xE012, j); /* Set Train and Lock */
if(j->cardtype == QTI_LINEJACK || j->cardtype == QTI_PHONECARD)
ixj_WriteDSPCommand(0x0224, j);
else
ixj_WriteDSPCommand(0x1224, j);
ixj_WriteDSPCommand(0xE014, j);
ixj_WriteDSPCommand(0x0003, j); /* Lock threshold at 3dB */
ixj_WriteDSPCommand(0xE338, j); /* Set Echo Suppresser Attenuation to 0dB */
/* Now we can set the AGC initial parameters and turn it on */
ixj_WriteDSPCommand(0xCF90, j); /* Set AGC Minimum gain */
ixj_WriteDSPCommand(0x0020, j); /* to 0.125 (-18dB) */
ixj_WriteDSPCommand(0xCF91, j); /* Set AGC Maximum gain */
ixj_WriteDSPCommand(0x1000, j); /* to 16 (24dB) */
ixj_WriteDSPCommand(0xCF92, j); /* Set AGC start gain */
ixj_WriteDSPCommand(0x0800, j); /* to 8 (+18dB) */
ixj_WriteDSPCommand(0xCF93, j); /* Set AGC hold time */
ixj_WriteDSPCommand(0x1F40, j); /* to 2 seconds (units are 250us) */
ixj_WriteDSPCommand(0xCF94, j); /* Set AGC Attack Time Constant */
ixj_WriteDSPCommand(0x0005, j); /* to 8ms */
ixj_WriteDSPCommand(0xCF95, j); /* Set AGC Decay Time Constant */
ixj_WriteDSPCommand(0x000D, j); /* to 4096ms */
ixj_WriteDSPCommand(0xCF96, j); /* Set AGC Attack Threshold */
ixj_WriteDSPCommand(0x1200, j); /* to 25% */
ixj_WriteDSPCommand(0xCF97, j); /* Set AGC Enable */
ixj_WriteDSPCommand(0x0001, j); /* to on */
break;
case AEC_AUTO:
ixj_WriteDSPCommand(0x0002, j); /* Attenuation scaling factor of 2 */
ixj_WriteDSPCommand(0xE011, j);
ixj_WriteDSPCommand(0x0100, j); /* Higher Threshold Floor */
ixj_WriteDSPCommand(0xE012, j); /* Set Train and Lock */
if(j->cardtype == QTI_LINEJACK || j->cardtype == QTI_PHONECARD)
ixj_WriteDSPCommand(0x0224, j);
else
ixj_WriteDSPCommand(0x1224, j);
ixj_WriteDSPCommand(0xE014, j);
ixj_WriteDSPCommand(0x0003, j); /* Lock threshold at 3dB */
ixj_WriteDSPCommand(0xE338, j); /* Set Echo Suppresser Attenuation to 0dB */
break;
}
}
}
static void aec_stop(IXJ *j)
{
j->aec_level = AEC_OFF;
if (j->rec_codec == G729 || j->play_codec == G729 || j->rec_codec == G729B || j->play_codec == G729B) {
ixj_WriteDSPCommand(0xE022, j); /* Move AEC filter buffer back */
ixj_WriteDSPCommand(0x0700, j);
}
if (j->play_mode != -1 && j->rec_mode != -1)
{
ixj_WriteDSPCommand(0xB002, j); /* AEC Stop */
}
}
static int set_play_codec(IXJ *j, int rate)
{
int retval = 0;
j->play_codec = rate;
switch (rate) {
case G723_63:
if (j->ver.low != 0x12 || ixj_convert_loaded) {
j->play_frame_size = 12;
j->play_mode = 0;
} else {
retval = 1;
}
break;
case G723_53:
if (j->ver.low != 0x12 || ixj_convert_loaded) {
j->play_frame_size = 10;
j->play_mode = 0;
} else {
retval = 1;
}
break;
case TS85:
if (j->dsp.low == 0x20 || j->flags.ts85_loaded) {
j->play_frame_size = 16;
j->play_mode = 0;
} else {
retval = 1;
}
break;
case TS48:
if (j->ver.low != 0x12 || ixj_convert_loaded) {
j->play_frame_size = 9;
j->play_mode = 0;
} else {
retval = 1;
}
break;
case TS41:
if (j->ver.low != 0x12 || ixj_convert_loaded) {
j->play_frame_size = 8;
j->play_mode = 0;
} else {
retval = 1;
}
break;
case G728:
if (j->dsp.low != 0x20) {
j->play_frame_size = 48;
j->play_mode = 0;
} else {
retval = 1;
}
break;
case G729:
if (j->dsp.low != 0x20) {
if (!j->flags.g729_loaded) {
retval = 1;
break;
}
switch (j->baseframe.low) {
case 0xA0:
j->play_frame_size = 10;
break;
case 0x50:
j->play_frame_size = 5;
break;
default:
j->play_frame_size = 15;
break;
}
j->play_mode = 0;
} else {
retval = 1;
}
break;
case G729B:
if (j->dsp.low != 0x20) {
if (!j->flags.g729_loaded) {
retval = 1;
break;
}
switch (j->baseframe.low) {
case 0xA0:
j->play_frame_size = 12;
break;
case 0x50:
j->play_frame_size = 6;
break;
default:
j->play_frame_size = 18;
break;
}
j->play_mode = 0;
} else {
retval = 1;
}
break;
case ULAW:
switch (j->baseframe.low) {
case 0xA0:
j->play_frame_size = 80;
break;
case 0x50:
j->play_frame_size = 40;
break;
default:
j->play_frame_size = 120;
break;
}
j->play_mode = 2;
break;
case ALAW:
switch (j->baseframe.low) {
case 0xA0:
j->play_frame_size = 80;
break;
case 0x50:
j->play_frame_size = 40;
break;
default:
j->play_frame_size = 120;
break;
}
j->play_mode = 2;
break;
case LINEAR16:
switch (j->baseframe.low) {
case 0xA0:
j->play_frame_size = 160;
break;
case 0x50:
j->play_frame_size = 80;
break;
default:
j->play_frame_size = 240;
break;
}
j->play_mode = 6;
break;
case LINEAR8:
switch (j->baseframe.low) {
case 0xA0:
j->play_frame_size = 80;
break;
case 0x50:
j->play_frame_size = 40;
break;
default:
j->play_frame_size = 120;
break;
}
j->play_mode = 4;
break;
case WSS:
switch (j->baseframe.low) {
case 0xA0:
j->play_frame_size = 80;
break;
case 0x50:
j->play_frame_size = 40;
break;
default:
j->play_frame_size = 120;
break;
}
j->play_mode = 5;
break;
default:
kfree(j->write_buffer);
j->play_frame_size = 0;
j->play_mode = -1;
j->write_buffer = NULL;
j->write_buffer_size = 0;
retval = 1;
break;
}
return retval;
}
static int ixj_play_start(IXJ *j)
{
unsigned short cmd = 0x0000;
if (j->write_buffer) {
ixj_play_stop(j);
}
if(ixjdebug & 0x0002)
printk("IXJ %d Starting Play Codec %d at %ld\n", j->board, j->play_codec, jiffies);
j->flags.playing = 1;
ixj_WriteDSPCommand(0x0FE0, j); /* Put the DSP in full power mode. */
j->flags.play_first_frame = 1;
j->drybuffer = 0;
if (!j->play_mode) {
switch (j->play_codec) {
case G723_63:
cmd = 0x5231;
break;
case G723_53:
cmd = 0x5232;
break;
case TS85:
cmd = 0x5230; /* TrueSpeech 8.5 */
break;
case TS48:
cmd = 0x5233; /* TrueSpeech 4.8 */
break;
case TS41:
cmd = 0x5234; /* TrueSpeech 4.1 */
break;
case G728:
cmd = 0x5235;
break;
case G729:
case G729B:
cmd = 0x5236;
break;
default:
return 1;
}
if (ixj_WriteDSPCommand(cmd, j))
return -1;
}
j->write_buffer = kmalloc(j->play_frame_size * 2, GFP_ATOMIC);
if (!j->write_buffer) {
printk("Write buffer allocation for ixj board %d failed!\n", j->board);
return -ENOMEM;
}
/* j->write_buffers_empty = 2; */
j->write_buffers_empty = 1;
j->write_buffer_size = j->play_frame_size * 2;
j->write_buffer_end = j->write_buffer + j->play_frame_size * 2;
j->write_buffer_rp = j->write_buffer_wp = j->write_buffer;
if (ixj_WriteDSPCommand(0x5202, j)) /* Set Poll sync mode */
return -1;
switch (j->play_mode) {
case 0:
cmd = 0x2C03;
break;
case 2:
if (j->ver.low == 0x12) {
cmd = 0x2C23;
} else {
cmd = 0x2C21;
}
break;
case 4:
if (j->ver.low == 0x12) {
cmd = 0x2C43;
} else {
cmd = 0x2C41;
}
break;
case 5:
if (j->ver.low == 0x12) {
cmd = 0x2C53;
} else {
cmd = 0x2C51;
}
break;
case 6:
if (j->ver.low == 0x12) {
cmd = 0x2C63;
} else {
cmd = 0x2C61;
}
break;
}
if (ixj_WriteDSPCommand(cmd, j))
return -1;
if (ixj_WriteDSPCommand(0x2000, j)) /* Playback C2 */
return -1;
if (ixj_WriteDSPCommand(0x2000 + j->play_frame_size, j)) /* Playback C3 */
return -1;
if (j->flags.recording) {
ixj_aec_start(j, j->aec_level);
}
return 0;
}
static void ixj_play_stop(IXJ *j)
{
if (ixjdebug & 0x0002)
printk("IXJ %d Stopping Play Codec %d at %ld\n", j->board, j->play_codec, jiffies);
kfree(j->write_buffer);
j->write_buffer = NULL;
j->write_buffer_size = 0;
if (j->play_mode > -1) {
ixj_WriteDSPCommand(0x5221, j); /* Stop playback and flush buffers. 8022 reference page 9-40 */
j->play_mode = -1;
}
j->flags.playing = 0;
}
static inline int get_play_level(IXJ *j)
{
int retval;
ixj_WriteDSPCommand(0xCF8F, j); /* 8022 Reference page 9-38 */
return j->ssr.high << 8 | j->ssr.low;
retval = j->ssr.high << 8 | j->ssr.low;
retval = (retval * 256) / 240;
return retval;
}
static unsigned int ixj_poll(struct file *file_p, poll_table * wait)
{
unsigned int mask = 0;
IXJ *j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
poll_wait(file_p, &(j->poll_q), wait);
if (j->read_buffer_ready > 0)
mask |= POLLIN | POLLRDNORM; /* readable */
if (j->write_buffers_empty > 0)
mask |= POLLOUT | POLLWRNORM; /* writable */
if (j->ex.bytes)
mask |= POLLPRI;
return mask;
}
static int ixj_play_tone(IXJ *j, char tone)
{
if (!j->tone_state) {
if(ixjdebug & 0x0002) {
printk("IXJ %d starting tone %d at %ld\n", j->board, tone, jiffies);
}
if (j->dsp.low == 0x20) {
idle(j);
}
j->tone_start_jif = jiffies;
j->tone_state = 1;
}
j->tone_index = tone;
if (ixj_WriteDSPCommand(0x6000 + j->tone_index, j))
return -1;
return 0;
}
static int ixj_set_tone_on(unsigned short arg, IXJ *j)
{
j->tone_on_time = arg;
if (ixj_WriteDSPCommand(0x6E04, j)) /* Set Tone On Period */
return -1;
if (ixj_WriteDSPCommand(arg, j))
return -1;
return 0;
}
static int SCI_WaitHighSCI(IXJ *j)
{
int cnt;
j->pld_scrr.byte = inb_p(j->XILINXbase);
if (!j->pld_scrr.bits.sci) {
for (cnt = 0; cnt < 10; cnt++) {
udelay(32);
j->pld_scrr.byte = inb_p(j->XILINXbase);
if ((j->pld_scrr.bits.sci))
return 1;
}
if (ixjdebug & 0x0001)
printk(KERN_INFO "SCI Wait High failed %x\n", j->pld_scrr.byte);
return 0;
} else
return 1;
}
static int SCI_WaitLowSCI(IXJ *j)
{
int cnt;
j->pld_scrr.byte = inb_p(j->XILINXbase);
if (j->pld_scrr.bits.sci) {
for (cnt = 0; cnt < 10; cnt++) {
udelay(32);
j->pld_scrr.byte = inb_p(j->XILINXbase);
if (!(j->pld_scrr.bits.sci))
return 1;
}
if (ixjdebug & 0x0001)
printk(KERN_INFO "SCI Wait Low failed %x\n", j->pld_scrr.byte);
return 0;
} else
return 1;
}
static int SCI_Control(IXJ *j, int control)
{
switch (control) {
case SCI_End:
j->pld_scrw.bits.c0 = 0; /* Set PLD Serial control interface */
j->pld_scrw.bits.c1 = 0; /* to no selection */
break;
case SCI_Enable_DAA:
j->pld_scrw.bits.c0 = 1; /* Set PLD Serial control interface */
j->pld_scrw.bits.c1 = 0; /* to write to DAA */
break;
case SCI_Enable_Mixer:
j->pld_scrw.bits.c0 = 0; /* Set PLD Serial control interface */
j->pld_scrw.bits.c1 = 1; /* to write to mixer */
break;
case SCI_Enable_EEPROM:
j->pld_scrw.bits.c0 = 1; /* Set PLD Serial control interface */
j->pld_scrw.bits.c1 = 1; /* to write to EEPROM */
break;
default:
return 0;
break;
}
outb_p(j->pld_scrw.byte, j->XILINXbase);
switch (control) {
case SCI_End:
return 1;
break;
case SCI_Enable_DAA:
case SCI_Enable_Mixer:
case SCI_Enable_EEPROM:
if (!SCI_WaitHighSCI(j))
return 0;
break;
default:
return 0;
break;
}
return 1;
}
static int SCI_Prepare(IXJ *j)
{
if (!SCI_Control(j, SCI_End))
return 0;
if (!SCI_WaitLowSCI(j))
return 0;
return 1;
}
static int ixj_get_mixer(long val, IXJ *j)
{
int reg = (val & 0x1F00) >> 8;
return j->mix.vol[reg];
}
static int ixj_mixer(long val, IXJ *j)
{
BYTES bytes;
bytes.high = (val & 0x1F00) >> 8;
bytes.low = val & 0x00FF;
/* save mixer value so we can get back later on */
j->mix.vol[bytes.high] = bytes.low;
outb_p(bytes.high & 0x1F, j->XILINXbase + 0x03); /* Load Mixer Address */
outb_p(bytes.low, j->XILINXbase + 0x02); /* Load Mixer Data */
SCI_Control(j, SCI_Enable_Mixer);
SCI_Control(j, SCI_End);
return 0;
}
static int daa_load(BYTES * p_bytes, IXJ *j)
{
outb_p(p_bytes->high, j->XILINXbase + 0x03);
outb_p(p_bytes->low, j->XILINXbase + 0x02);
if (!SCI_Control(j, SCI_Enable_DAA))
return 0;
else
return 1;
}
static int ixj_daa_cr4(IXJ *j, char reg)
{
BYTES bytes;
switch (j->daa_mode) {
case SOP_PU_SLEEP:
bytes.high = 0x14;
break;
case SOP_PU_RINGING:
bytes.high = 0x54;
break;
case SOP_PU_CONVERSATION:
bytes.high = 0x94;
break;
case SOP_PU_PULSEDIALING:
bytes.high = 0xD4;
break;
}
j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = reg;
switch (j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.bitreg.AGX) {
case 0:
j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.bitreg.AGR_Z = 0;
break;
case 1:
j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.bitreg.AGR_Z = 2;
break;
case 2:
j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.bitreg.AGR_Z = 1;
break;
case 3:
j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.bitreg.AGR_Z = 3;
break;
}
bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg;
if (!daa_load(&bytes, j))
return 0;
if (!SCI_Prepare(j))
return 0;
return 1;
}
static char daa_int_read(IXJ *j)
{
BYTES bytes;
if (!SCI_Prepare(j))
return 0;
bytes.high = 0x38;
bytes.low = 0x00;
outb_p(bytes.high, j->XILINXbase + 0x03);
outb_p(bytes.low, j->XILINXbase + 0x02);
if (!SCI_Control(j, SCI_Enable_DAA))
return 0;
bytes.high = inb_p(j->XILINXbase + 0x03);
bytes.low = inb_p(j->XILINXbase + 0x02);
if (bytes.low != ALISDAA_ID_BYTE) {
if (ixjdebug & 0x0001)
printk("Cannot read DAA ID Byte high = %d low = %d\n", bytes.high, bytes.low);
return 0;
}
if (!SCI_Control(j, SCI_Enable_DAA))
return 0;
if (!SCI_Control(j, SCI_End))
return 0;
bytes.high = inb_p(j->XILINXbase + 0x03);
bytes.low = inb_p(j->XILINXbase + 0x02);
j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.reg = bytes.high;
return 1;
}
static char daa_CR_read(IXJ *j, int cr)
{
IXJ_WORD wdata;
BYTES bytes;
if (!SCI_Prepare(j))
return 0;
switch (j->daa_mode) {
case SOP_PU_SLEEP:
bytes.high = 0x30 + cr;
break;
case SOP_PU_RINGING:
bytes.high = 0x70 + cr;
break;
case SOP_PU_CONVERSATION:
bytes.high = 0xB0 + cr;
break;
case SOP_PU_PULSEDIALING:
default:
bytes.high = 0xF0 + cr;
break;
}
bytes.low = 0x00;
outb_p(bytes.high, j->XILINXbase + 0x03);
outb_p(bytes.low, j->XILINXbase + 0x02);
if (!SCI_Control(j, SCI_Enable_DAA))
return 0;
bytes.high = inb_p(j->XILINXbase + 0x03);
bytes.low = inb_p(j->XILINXbase + 0x02);
if (bytes.low != ALISDAA_ID_BYTE) {
if (ixjdebug & 0x0001)
printk("Cannot read DAA ID Byte high = %d low = %d\n", bytes.high, bytes.low);
return 0;
}
if (!SCI_Control(j, SCI_Enable_DAA))
return 0;
if (!SCI_Control(j, SCI_End))
return 0;
wdata.word = inw_p(j->XILINXbase + 0x02);
switch(cr){
case 5:
j->m_DAAShadowRegs.SOP_REGS.SOP.cr5.reg = wdata.bytes.high;
break;
case 4:
j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = wdata.bytes.high;
break;
case 3:
j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg = wdata.bytes.high;
break;
case 2:
j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg = wdata.bytes.high;
break;
case 1:
j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg = wdata.bytes.high;
break;
case 0:
j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg = wdata.bytes.high;
break;
default:
return 0;
}
return 1;
}
static int ixj_daa_cid_reset(IXJ *j)
{
int i;
BYTES bytes;
if (ixjdebug & 0x0002)
printk("DAA Clearing CID ram\n");
if (!SCI_Prepare(j))
return 0;
bytes.high = 0x58;
bytes.low = 0x00;
outb_p(bytes.high, j->XILINXbase + 0x03);
outb_p(bytes.low, j->XILINXbase + 0x02);
if (!SCI_Control(j, SCI_Enable_DAA))
return 0;
if (!SCI_WaitHighSCI(j))
return 0;
for (i = 0; i < ALISDAA_CALLERID_SIZE - 1; i += 2) {
bytes.high = bytes.low = 0x00;
outb_p(bytes.high, j->XILINXbase + 0x03);
if (i < ALISDAA_CALLERID_SIZE - 1)
outb_p(bytes.low, j->XILINXbase + 0x02);
if (!SCI_Control(j, SCI_Enable_DAA))
return 0;
if (!SCI_WaitHighSCI(j))
return 0;
}
if (!SCI_Control(j, SCI_End))
return 0;
if (ixjdebug & 0x0002)
printk("DAA CID ram cleared\n");
return 1;
}
static int ixj_daa_cid_read(IXJ *j)
{
int i;
BYTES bytes;
char CID[ALISDAA_CALLERID_SIZE];
bool mContinue;
char *pIn, *pOut;
if (!SCI_Prepare(j))
return 0;
bytes.high = 0x78;
bytes.low = 0x00;
outb_p(bytes.high, j->XILINXbase + 0x03);
outb_p(bytes.low, j->XILINXbase + 0x02);
if (!SCI_Control(j, SCI_Enable_DAA))
return 0;
if (!SCI_WaitHighSCI(j))
return 0;
bytes.high = inb_p(j->XILINXbase + 0x03);
bytes.low = inb_p(j->XILINXbase + 0x02);
if (bytes.low != ALISDAA_ID_BYTE) {
if (ixjdebug & 0x0001)
printk("DAA Get Version Cannot read DAA ID Byte high = %d low = %d\n", bytes.high, bytes.low);
return 0;
}
for (i = 0; i < ALISDAA_CALLERID_SIZE; i += 2) {
bytes.high = bytes.low = 0x00;
outb_p(bytes.high, j->XILINXbase + 0x03);
outb_p(bytes.low, j->XILINXbase + 0x02);
if (!SCI_Control(j, SCI_Enable_DAA))
return 0;
if (!SCI_WaitHighSCI(j))
return 0;
CID[i + 0] = inb_p(j->XILINXbase + 0x03);
CID[i + 1] = inb_p(j->XILINXbase + 0x02);
}
if (!SCI_Control(j, SCI_End))
return 0;
pIn = CID;
pOut = j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID;
mContinue = true;
while (mContinue) {
if ((pIn[1] & 0x03) == 0x01) {
pOut[0] = pIn[0];
}
if ((pIn[2] & 0x0c) == 0x04) {
pOut[1] = ((pIn[2] & 0x03) << 6) | ((pIn[1] & 0xfc) >> 2);
}
if ((pIn[3] & 0x30) == 0x10) {
pOut[2] = ((pIn[3] & 0x0f) << 4) | ((pIn[2] & 0xf0) >> 4);
}
if ((pIn[4] & 0xc0) == 0x40) {
pOut[3] = ((pIn[4] & 0x3f) << 2) | ((pIn[3] & 0xc0) >> 6);
} else {
mContinue = false;
}
pIn += 5, pOut += 4;
}
memset(&j->cid, 0, sizeof(PHONE_CID));
pOut = j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID;
pOut += 4;
strncpy(j->cid.month, pOut, 2);
pOut += 2;
strncpy(j->cid.day, pOut, 2);
pOut += 2;
strncpy(j->cid.hour, pOut, 2);
pOut += 2;
strncpy(j->cid.min, pOut, 2);
pOut += 3;
j->cid.numlen = *pOut;
pOut += 1;
strncpy(j->cid.number, pOut, j->cid.numlen);
pOut += j->cid.numlen + 1;
j->cid.namelen = *pOut;
pOut += 1;
strncpy(j->cid.name, pOut, j->cid.namelen);
ixj_daa_cid_reset(j);
return 1;
}
static char daa_get_version(IXJ *j)
{
BYTES bytes;
if (!SCI_Prepare(j))
return 0;
bytes.high = 0x35;
bytes.low = 0x00;
outb_p(bytes.high, j->XILINXbase + 0x03);
outb_p(bytes.low, j->XILINXbase + 0x02);
if (!SCI_Control(j, SCI_Enable_DAA))
return 0;
bytes.high = inb_p(j->XILINXbase + 0x03);
bytes.low = inb_p(j->XILINXbase + 0x02);
if (bytes.low != ALISDAA_ID_BYTE) {
if (ixjdebug & 0x0001)
printk("DAA Get Version Cannot read DAA ID Byte high = %d low = %d\n", bytes.high, bytes.low);
return 0;
}
if (!SCI_Control(j, SCI_Enable_DAA))
return 0;
if (!SCI_Control(j, SCI_End))
return 0;
bytes.high = inb_p(j->XILINXbase + 0x03);
bytes.low = inb_p(j->XILINXbase + 0x02);
if (ixjdebug & 0x0002)
printk("DAA CR5 Byte high = 0x%x low = 0x%x\n", bytes.high, bytes.low);
j->m_DAAShadowRegs.SOP_REGS.SOP.cr5.reg = bytes.high;
return bytes.high;
}
static int daa_set_mode(IXJ *j, int mode)
{
/* NOTE:
The DAA *MUST* be in the conversation mode if the
PSTN line is to be seized (PSTN line off-hook).
Taking the PSTN line off-hook while the DAA is in
a mode other than conversation mode will cause a
hardware failure of the ALIS-A part.
NOTE:
The DAA can only go to SLEEP, RINGING or PULSEDIALING modes
if the PSTN line is on-hook. Failure to have the PSTN line
in the on-hook state WILL CAUSE A HARDWARE FAILURE OF THE
ALIS-A part.
*/
BYTES bytes;
j->flags.pstn_rmr = 0;
if (!SCI_Prepare(j))
return 0;
switch (mode) {
case SOP_PU_RESET:
j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
outb_p(j->pld_scrw.byte, j->XILINXbase);
j->pld_slicw.bits.rly2 = 0;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
bytes.high = 0x10;
bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
daa_load(&bytes, j);
if (!SCI_Prepare(j))
return 0;
j->daa_mode = SOP_PU_SLEEP;
break;
case SOP_PU_SLEEP:
if(j->daa_mode == SOP_PU_SLEEP)
{
break;
}
if (ixjdebug & 0x0008)
printk(KERN_INFO "phone DAA: SOP_PU_SLEEP at %ld\n", jiffies);
/* if(j->daa_mode == SOP_PU_CONVERSATION) */
{
j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
outb_p(j->pld_scrw.byte, j->XILINXbase);
j->pld_slicw.bits.rly2 = 0;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
bytes.high = 0x10;
bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
daa_load(&bytes, j);
if (!SCI_Prepare(j))
return 0;
}
j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
outb_p(j->pld_scrw.byte, j->XILINXbase);
j->pld_slicw.bits.rly2 = 0;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
bytes.high = 0x10;
bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
daa_load(&bytes, j);
if (!SCI_Prepare(j))
return 0;
j->daa_mode = SOP_PU_SLEEP;
j->flags.pstn_ringing = 0;
j->ex.bits.pstn_ring = 0;
j->pstn_sleeptil = jiffies + (hertz / 4);
wake_up_interruptible(&j->read_q); /* Wake any blocked readers */
wake_up_interruptible(&j->write_q); /* Wake any blocked writers */
wake_up_interruptible(&j->poll_q); /* Wake any blocked selects */
break;
case SOP_PU_RINGING:
if (ixjdebug & 0x0008)
printk(KERN_INFO "phone DAA: SOP_PU_RINGING at %ld\n", jiffies);
j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
outb_p(j->pld_scrw.byte, j->XILINXbase);
j->pld_slicw.bits.rly2 = 0;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
bytes.high = 0x50;
bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
daa_load(&bytes, j);
if (!SCI_Prepare(j))
return 0;
j->daa_mode = SOP_PU_RINGING;
break;
case SOP_PU_CONVERSATION:
if (ixjdebug & 0x0008)
printk(KERN_INFO "phone DAA: SOP_PU_CONVERSATION at %ld\n", jiffies);
bytes.high = 0x90;
bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
daa_load(&bytes, j);
if (!SCI_Prepare(j))
return 0;
j->pld_slicw.bits.rly2 = 1;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
j->pld_scrw.bits.daafsyncen = 1; /* Turn on DAA Frame Sync */
outb_p(j->pld_scrw.byte, j->XILINXbase);
j->daa_mode = SOP_PU_CONVERSATION;
j->flags.pstn_ringing = 0;
j->ex.bits.pstn_ring = 0;
j->pstn_sleeptil = jiffies;
j->pstn_ring_start = j->pstn_ring_stop = j->pstn_ring_int = 0;
break;
case SOP_PU_PULSEDIALING:
if (ixjdebug & 0x0008)
printk(KERN_INFO "phone DAA: SOP_PU_PULSEDIALING at %ld\n", jiffies);
j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
outb_p(j->pld_scrw.byte, j->XILINXbase);
j->pld_slicw.bits.rly2 = 0;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
bytes.high = 0xD0;
bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
daa_load(&bytes, j);
if (!SCI_Prepare(j))
return 0;
j->daa_mode = SOP_PU_PULSEDIALING;
break;
default:
break;
}
return 1;
}
static int ixj_daa_write(IXJ *j)
{
BYTES bytes;
j->flags.pstncheck = 1;
daa_set_mode(j, SOP_PU_SLEEP);
if (!SCI_Prepare(j))
return 0;
outb_p(j->pld_scrw.byte, j->XILINXbase);
bytes.high = 0x14;
bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg;
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg;
bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg;
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg;
bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
if (!daa_load(&bytes, j))
return 0;
if (!SCI_Prepare(j))
return 0;
bytes.high = 0x1F;
bytes.low = j->m_DAAShadowRegs.XOP_REGS.XOP.xr7.reg;
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.XOP_xr6_W.reg;
bytes.low = j->m_DAAShadowRegs.XOP_REGS.XOP.xr5.reg;
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.XOP_REGS.XOP.xr4.reg;
bytes.low = j->m_DAAShadowRegs.XOP_REGS.XOP.xr3.reg;
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.XOP_REGS.XOP.xr2.reg;
bytes.low = j->m_DAAShadowRegs.XOP_REGS.XOP.xr1.reg;
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.XOP_xr0_W.reg;
bytes.low = 0x00;
if (!daa_load(&bytes, j))
return 0;
if (!SCI_Prepare(j))
return 0;
bytes.high = 0x00;
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[7];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[6];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[5];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[4];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[3];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[2];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[1];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[0];
bytes.low = 0x00;
if (!daa_load(&bytes, j))
return 0;
if (!SCI_Control(j, SCI_End))
return 0;
if (!SCI_WaitLowSCI(j))
return 0;
bytes.high = 0x01;
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[7];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[6];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[5];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[4];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[3];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[2];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[1];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[0];
bytes.low = 0x00;
if (!daa_load(&bytes, j))
return 0;
if (!SCI_Control(j, SCI_End))
return 0;
if (!SCI_WaitLowSCI(j))
return 0;
bytes.high = 0x02;
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[7];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[6];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[5];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[4];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[3];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[2];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[1];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[0];
bytes.low = 0x00;
if (!daa_load(&bytes, j))
return 0;
if (!SCI_Control(j, SCI_End))
return 0;
if (!SCI_WaitLowSCI(j))
return 0;
bytes.high = 0x03;
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[7];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[6];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[5];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[4];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[3];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[2];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[1];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[0];
bytes.low = 0x00;
if (!daa_load(&bytes, j))
return 0;
if (!SCI_Control(j, SCI_End))
return 0;
if (!SCI_WaitLowSCI(j))
return 0;
bytes.high = 0x04;
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[7];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[6];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[5];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[4];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[3];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[2];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[1];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[0];
bytes.low = 0x00;
if (!daa_load(&bytes, j))
return 0;
if (!SCI_Control(j, SCI_End))
return 0;
if (!SCI_WaitLowSCI(j))
return 0;
bytes.high = 0x05;
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[7];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[6];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[5];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[4];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[3];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[2];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[1];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[0];
bytes.low = 0x00;
if (!daa_load(&bytes, j))
return 0;
if (!SCI_Control(j, SCI_End))
return 0;
if (!SCI_WaitLowSCI(j))
return 0;
bytes.high = 0x06;
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[7];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[6];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[5];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[4];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[3];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[2];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[1];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[0];
bytes.low = 0x00;
if (!daa_load(&bytes, j))
return 0;
if (!SCI_Control(j, SCI_End))
return 0;
if (!SCI_WaitLowSCI(j))
return 0;
bytes.high = 0x07;
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[7];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[6];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[5];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[4];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[3];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[2];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[1];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[0];
bytes.low = 0x00;
if (!daa_load(&bytes, j))
return 0;
if (!SCI_Control(j, SCI_End))
return 0;
if (!SCI_WaitLowSCI(j))
return 0;
bytes.high = 0x08;
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[7];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[6];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[5];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[4];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[3];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[2];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[1];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[0];
bytes.low = 0x00;
if (!daa_load(&bytes, j))
return 0;
if (!SCI_Control(j, SCI_End))
return 0;
if (!SCI_WaitLowSCI(j))
return 0;
bytes.high = 0x09;
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[3];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[2];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[1];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[0];
bytes.low = 0x00;
if (!daa_load(&bytes, j))
return 0;
if (!SCI_Control(j, SCI_End))
return 0;
if (!SCI_WaitLowSCI(j))
return 0;
bytes.high = 0x0A;
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[3];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[2];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[1];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[0];
bytes.low = 0x00;
if (!daa_load(&bytes, j))
return 0;
if (!SCI_Control(j, SCI_End))
return 0;
if (!SCI_WaitLowSCI(j))
return 0;
bytes.high = 0x0B;
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[3];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[2];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[1];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[0];
bytes.low = 0x00;
if (!daa_load(&bytes, j))
return 0;
if (!SCI_Control(j, SCI_End))
return 0;
if (!SCI_WaitLowSCI(j))
return 0;
bytes.high = 0x0C;
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[3];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[2];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[1];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[0];
bytes.low = 0x00;
if (!daa_load(&bytes, j))
return 0;
if (!SCI_Control(j, SCI_End))
return 0;
if (!SCI_WaitLowSCI(j))
return 0;
bytes.high = 0x0D;
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[3];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[2];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[1];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[0];
bytes.low = 0x00;
if (!daa_load(&bytes, j))
return 0;
if (!SCI_Control(j, SCI_End))
return 0;
if (!SCI_WaitLowSCI(j))
return 0;
bytes.high = 0x0E;
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[7];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[6];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[5];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[4];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[3];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[2];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[1];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[0];
bytes.low = 0x00;
if (!daa_load(&bytes, j))
return 0;
if (!SCI_Control(j, SCI_End))
return 0;
if (!SCI_WaitLowSCI(j))
return 0;
bytes.high = 0x0F;
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[7];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[6];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[5];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[4];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[3];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[2];
bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[1];
if (!daa_load(&bytes, j))
return 0;
bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[0];
bytes.low = 0x00;
if (!daa_load(&bytes, j))
return 0;
udelay(32);
j->pld_scrr.byte = inb_p(j->XILINXbase);
if (!SCI_Control(j, SCI_End))
return 0;
outb_p(j->pld_scrw.byte, j->XILINXbase);
if (ixjdebug & 0x0002)
printk("DAA Coefficients Loaded\n");
j->flags.pstncheck = 0;
return 1;
}
static int ixj_set_tone_off(unsigned short arg, IXJ *j)
{
j->tone_off_time = arg;
if (ixj_WriteDSPCommand(0x6E05, j)) /* Set Tone Off Period */
return -1;
if (ixj_WriteDSPCommand(arg, j))
return -1;
return 0;
}
static int ixj_get_tone_on(IXJ *j)
{
if (ixj_WriteDSPCommand(0x6E06, j)) /* Get Tone On Period */
return -1;
return 0;
}
static int ixj_get_tone_off(IXJ *j)
{
if (ixj_WriteDSPCommand(0x6E07, j)) /* Get Tone Off Period */
return -1;
return 0;
}
static void ixj_busytone(IXJ *j)
{
j->flags.ringback = 0;
j->flags.dialtone = 0;
j->flags.busytone = 1;
ixj_set_tone_on(0x07D0, j);
ixj_set_tone_off(0x07D0, j);
ixj_play_tone(j, 27);
}
static void ixj_dialtone(IXJ *j)
{
j->flags.ringback = 0;
j->flags.dialtone = 1;
j->flags.busytone = 0;
if (j->dsp.low == 0x20) {
return;
} else {
ixj_set_tone_on(0xFFFF, j);
ixj_set_tone_off(0x0000, j);
ixj_play_tone(j, 25);
}
}
static void ixj_cpt_stop(IXJ *j)
{
if(j->tone_state || j->tone_cadence_state)
{
j->flags.dialtone = 0;
j->flags.busytone = 0;
j->flags.ringback = 0;
ixj_set_tone_on(0x0001, j);
ixj_set_tone_off(0x0000, j);
ixj_play_tone(j, 0);
j->tone_state = j->tone_cadence_state = 0;
if (j->cadence_t) {
kfree(j->cadence_t->ce);
kfree(j->cadence_t);
j->cadence_t = NULL;
}
}
if (j->play_mode == -1 && j->rec_mode == -1)
idle(j);
if (j->play_mode != -1 && j->dsp.low == 0x20)
ixj_play_start(j);
if (j->rec_mode != -1 && j->dsp.low == 0x20)
ixj_record_start(j);
}
static void ixj_ringback(IXJ *j)
{
j->flags.busytone = 0;
j->flags.dialtone = 0;
j->flags.ringback = 1;
ixj_set_tone_on(0x0FA0, j);
ixj_set_tone_off(0x2EE0, j);
ixj_play_tone(j, 26);
}
static void ixj_testram(IXJ *j)
{
ixj_WriteDSPCommand(0x3001, j); /* Test External SRAM */
}
static int ixj_build_cadence(IXJ *j, IXJ_CADENCE __user * cp)
{
ixj_cadence *lcp;
IXJ_CADENCE_ELEMENT __user *cep;
IXJ_CADENCE_ELEMENT *lcep;
IXJ_TONE ti;
int err;
lcp = kmalloc(sizeof(ixj_cadence), GFP_KERNEL);
if (lcp == NULL)
return -ENOMEM;
err = -EFAULT;
if (copy_from_user(&lcp->elements_used,
&cp->elements_used, sizeof(int)))
goto out;
if (copy_from_user(&lcp->termination,
&cp->termination, sizeof(IXJ_CADENCE_TERM)))
goto out;
if (get_user(cep, &cp->ce))
goto out;
err = -EINVAL;
if ((unsigned)lcp->elements_used >= ~0U/sizeof(IXJ_CADENCE_ELEMENT))
goto out;
err = -ENOMEM;
lcep = kmalloc(sizeof(IXJ_CADENCE_ELEMENT) * lcp->elements_used, GFP_KERNEL);
if (!lcep)
goto out;
err = -EFAULT;
if (copy_from_user(lcep, cep, sizeof(IXJ_CADENCE_ELEMENT) * lcp->elements_used))
goto out1;
if (j->cadence_t) {
kfree(j->cadence_t->ce);
kfree(j->cadence_t);
}
lcp->ce = (void *) lcep;
j->cadence_t = lcp;
j->tone_cadence_state = 0;
ixj_set_tone_on(lcp->ce[0].tone_on_time, j);
ixj_set_tone_off(lcp->ce[0].tone_off_time, j);
if (j->cadence_t->ce[j->tone_cadence_state].freq0) {
ti.tone_index = j->cadence_t->ce[j->tone_cadence_state].index;
ti.freq0 = j->cadence_t->ce[j->tone_cadence_state].freq0;
ti.gain0 = j->cadence_t->ce[j->tone_cadence_state].gain0;
ti.freq1 = j->cadence_t->ce[j->tone_cadence_state].freq1;
ti.gain1 = j->cadence_t->ce[j->tone_cadence_state].gain1;
ixj_init_tone(j, &ti);
}
ixj_play_tone(j, lcp->ce[0].index);
return 1;
out1:
kfree(lcep);
out:
kfree(lcp);
return err;
}
static int ixj_build_filter_cadence(IXJ *j, IXJ_FILTER_CADENCE __user * cp)
{
IXJ_FILTER_CADENCE *lcp;
lcp = memdup_user(cp, sizeof(IXJ_FILTER_CADENCE));
if (IS_ERR(lcp)) {
if(ixjdebug & 0x0001) {
printk(KERN_INFO "Could not allocate memory for cadence or could not copy cadence to kernel\n");
}
return PTR_ERR(lcp);
}
if (lcp->filter > 5) {
if(ixjdebug & 0x0001) {
printk(KERN_INFO "Cadence out of range\n");
}
kfree(lcp);
return -1;
}
j->cadence_f[lcp->filter].state = 0;
j->cadence_f[lcp->filter].enable = lcp->enable;
j->filter_en[lcp->filter] = j->cadence_f[lcp->filter].en_filter = lcp->en_filter;
j->cadence_f[lcp->filter].on1 = lcp->on1;
j->cadence_f[lcp->filter].on1min = 0;
j->cadence_f[lcp->filter].on1max = 0;
j->cadence_f[lcp->filter].off1 = lcp->off1;
j->cadence_f[lcp->filter].off1min = 0;
j->cadence_f[lcp->filter].off1max = 0;
j->cadence_f[lcp->filter].on2 = lcp->on2;
j->cadence_f[lcp->filter].on2min = 0;
j->cadence_f[lcp->filter].on2max = 0;
j->cadence_f[lcp->filter].off2 = lcp->off2;
j->cadence_f[lcp->filter].off2min = 0;
j->cadence_f[lcp->filter].off2max = 0;
j->cadence_f[lcp->filter].on3 = lcp->on3;
j->cadence_f[lcp->filter].on3min = 0;
j->cadence_f[lcp->filter].on3max = 0;
j->cadence_f[lcp->filter].off3 = lcp->off3;
j->cadence_f[lcp->filter].off3min = 0;
j->cadence_f[lcp->filter].off3max = 0;
if(ixjdebug & 0x0002) {
printk(KERN_INFO "Cadence %d loaded\n", lcp->filter);
}
kfree(lcp);
return 0;
}
static void add_caps(IXJ *j)
{
j->caps = 0;
j->caplist[j->caps].cap = PHONE_VENDOR_QUICKNET;
strcpy(j->caplist[j->caps].desc, "Quicknet Technologies, Inc. (www.quicknet.net)");
j->caplist[j->caps].captype = vendor;
j->caplist[j->caps].handle = j->caps++;
j->caplist[j->caps].captype = device;
switch (j->cardtype) {
case QTI_PHONEJACK:
strcpy(j->caplist[j->caps].desc, "Quicknet Internet PhoneJACK");
break;
case QTI_LINEJACK:
strcpy(j->caplist[j->caps].desc, "Quicknet Internet LineJACK");
break;
case QTI_PHONEJACK_LITE:
strcpy(j->caplist[j->caps].desc, "Quicknet Internet PhoneJACK Lite");
break;
case QTI_PHONEJACK_PCI:
strcpy(j->caplist[j->caps].desc, "Quicknet Internet PhoneJACK PCI");
break;
case QTI_PHONECARD:
strcpy(j->caplist[j->caps].desc, "Quicknet Internet PhoneCARD");
break;
}
j->caplist[j->caps].cap = j->cardtype;
j->caplist[j->caps].handle = j->caps++;
strcpy(j->caplist[j->caps].desc, "POTS");
j->caplist[j->caps].captype = port;
j->caplist[j->caps].cap = pots;
j->caplist[j->caps].handle = j->caps++;
/* add devices that can do speaker/mic */
switch (j->cardtype) {
case QTI_PHONEJACK:
case QTI_LINEJACK:
case QTI_PHONEJACK_PCI:
case QTI_PHONECARD:
strcpy(j->caplist[j->caps].desc, "SPEAKER");
j->caplist[j->caps].captype = port;
j->caplist[j->caps].cap = speaker;
j->caplist[j->caps].handle = j->caps++;
default:
break;
}
/* add devices that can do handset */
switch (j->cardtype) {
case QTI_PHONEJACK:
strcpy(j->caplist[j->caps].desc, "HANDSET");
j->caplist[j->caps].captype = port;
j->caplist[j->caps].cap = handset;
j->caplist[j->caps].handle = j->caps++;
break;
default:
break;
}
/* add devices that can do PSTN */
switch (j->cardtype) {
case QTI_LINEJACK:
strcpy(j->caplist[j->caps].desc, "PSTN");
j->caplist[j->caps].captype = port;
j->caplist[j->caps].cap = pstn;
j->caplist[j->caps].handle = j->caps++;
break;
default:
break;
}
/* add codecs - all cards can do uLaw, linear 8/16, and Windows sound system */
strcpy(j->caplist[j->caps].desc, "ULAW");
j->caplist[j->caps].captype = codec;
j->caplist[j->caps].cap = ULAW;
j->caplist[j->caps].handle = j->caps++;
strcpy(j->caplist[j->caps].desc, "LINEAR 16 bit");
j->caplist[j->caps].captype = codec;
j->caplist[j->caps].cap = LINEAR16;
j->caplist[j->caps].handle = j->caps++;
strcpy(j->caplist[j->caps].desc, "LINEAR 8 bit");
j->caplist[j->caps].captype = codec;
j->caplist[j->caps].cap = LINEAR8;
j->caplist[j->caps].handle = j->caps++;
strcpy(j->caplist[j->caps].desc, "Windows Sound System");
j->caplist[j->caps].captype = codec;
j->caplist[j->caps].cap = WSS;
j->caplist[j->caps].handle = j->caps++;
/* software ALAW codec, made from ULAW */
strcpy(j->caplist[j->caps].desc, "ALAW");
j->caplist[j->caps].captype = codec;
j->caplist[j->caps].cap = ALAW;
j->caplist[j->caps].handle = j->caps++;
/* version 12 of the 8020 does the following codecs in a broken way */
if (j->dsp.low != 0x20 || j->ver.low != 0x12) {
strcpy(j->caplist[j->caps].desc, "G.723.1 6.3kbps");
j->caplist[j->caps].captype = codec;
j->caplist[j->caps].cap = G723_63;
j->caplist[j->caps].handle = j->caps++;
strcpy(j->caplist[j->caps].desc, "G.723.1 5.3kbps");
j->caplist[j->caps].captype = codec;
j->caplist[j->caps].cap = G723_53;
j->caplist[j->caps].handle = j->caps++;
strcpy(j->caplist[j->caps].desc, "TrueSpeech 4.8kbps");
j->caplist[j->caps].captype = codec;
j->caplist[j->caps].cap = TS48;
j->caplist[j->caps].handle = j->caps++;
strcpy(j->caplist[j->caps].desc, "TrueSpeech 4.1kbps");
j->caplist[j->caps].captype = codec;
j->caplist[j->caps].cap = TS41;
j->caplist[j->caps].handle = j->caps++;
}
/* 8020 chips can do TS8.5 native, and 8021/8022 can load it */
if (j->dsp.low == 0x20 || j->flags.ts85_loaded) {
strcpy(j->caplist[j->caps].desc, "TrueSpeech 8.5kbps");
j->caplist[j->caps].captype = codec;
j->caplist[j->caps].cap = TS85;
j->caplist[j->caps].handle = j->caps++;
}
/* 8021 chips can do G728 */
if (j->dsp.low == 0x21) {
strcpy(j->caplist[j->caps].desc, "G.728 16kbps");
j->caplist[j->caps].captype = codec;
j->caplist[j->caps].cap = G728;
j->caplist[j->caps].handle = j->caps++;
}
/* 8021/8022 chips can do G729 if loaded */
if (j->dsp.low != 0x20 && j->flags.g729_loaded) {
strcpy(j->caplist[j->caps].desc, "G.729A 8kbps");
j->caplist[j->caps].captype = codec;
j->caplist[j->caps].cap = G729;
j->caplist[j->caps].handle = j->caps++;
}
if (j->dsp.low != 0x20 && j->flags.g729_loaded) {
strcpy(j->caplist[j->caps].desc, "G.729B 8kbps");
j->caplist[j->caps].captype = codec;
j->caplist[j->caps].cap = G729B;
j->caplist[j->caps].handle = j->caps++;
}
}
static int capabilities_check(IXJ *j, struct phone_capability *pcreq)
{
int cnt;
int retval = 0;
for (cnt = 0; cnt < j->caps; cnt++) {
if (pcreq->captype == j->caplist[cnt].captype
&& pcreq->cap == j->caplist[cnt].cap) {
retval = 1;
break;
}
}
return retval;
}
static long do_ixj_ioctl(struct file *file_p, unsigned int cmd, unsigned long arg)
{
IXJ_TONE ti;
IXJ_FILTER jf;
IXJ_FILTER_RAW jfr;
void __user *argp = (void __user *)arg;
struct inode *inode = file_p->f_path.dentry->d_inode;
unsigned int minor = iminor(inode);
unsigned int raise, mant;
int board = NUM(inode);
IXJ *j = get_ixj(NUM(inode));
int retval = 0;
/*
* Set up locks to ensure that only one process is talking to the DSP at a time.
* This is necessary to keep the DSP from locking up.
*/
while(test_and_set_bit(board, (void *)&j->busyflags) != 0)
schedule_timeout_interruptible(1);
if (ixjdebug & 0x0040)
printk("phone%d ioctl, cmd: 0x%x, arg: 0x%lx\n", minor, cmd, arg);
if (minor >= IXJMAX) {
clear_bit(board, &j->busyflags);
return -ENODEV;
}
/*
* Check ioctls only root can use.
*/
if (!capable(CAP_SYS_ADMIN)) {
switch (cmd) {
case IXJCTL_TESTRAM:
case IXJCTL_HZ:
retval = -EPERM;
}
}
switch (cmd) {
case IXJCTL_TESTRAM:
ixj_testram(j);
retval = (j->ssr.high << 8) + j->ssr.low;
break;
case IXJCTL_CARDTYPE:
retval = j->cardtype;
break;
case IXJCTL_SERIAL:
retval = j->serial;
break;
case IXJCTL_VERSION:
{
char arg_str[100];
snprintf(arg_str, sizeof(arg_str),
"\nDriver version %i.%i.%i", IXJ_VER_MAJOR,
IXJ_VER_MINOR, IXJ_BLD_VER);
if (copy_to_user(argp, arg_str, strlen(arg_str)))
retval = -EFAULT;
}
break;
case PHONE_RING_CADENCE:
j->ring_cadence = arg;
break;
case IXJCTL_CIDCW:
if(arg) {
if (copy_from_user(&j->cid_send, argp, sizeof(PHONE_CID))) {
retval = -EFAULT;
break;
}
} else {
memset(&j->cid_send, 0, sizeof(PHONE_CID));
}
ixj_write_cidcw(j);
break;
/* Binary compatbility */
case OLD_PHONE_RING_START:
arg = 0;
/* Fall through */
case PHONE_RING_START:
if(arg) {
if (copy_from_user(&j->cid_send, argp, sizeof(PHONE_CID))) {
retval = -EFAULT;
break;
}
ixj_write_cid(j);
} else {
memset(&j->cid_send, 0, sizeof(PHONE_CID));
}
ixj_ring_start(j);
break;
case PHONE_RING_STOP:
j->flags.cringing = 0;
if(j->cadence_f[5].enable) {
j->cadence_f[5].state = 0;
}
ixj_ring_off(j);
break;
case PHONE_RING:
retval = ixj_ring(j);
break;
case PHONE_EXCEPTION:
retval = j->ex.bytes;
if(j->ex.bits.flash) {
j->flash_end = 0;
j->ex.bits.flash = 0;
}
j->ex.bits.pstn_ring = 0;
j->ex.bits.caller_id = 0;
j->ex.bits.pstn_wink = 0;
j->ex.bits.f0 = 0;
j->ex.bits.f1 = 0;
j->ex.bits.f2 = 0;
j->ex.bits.f3 = 0;
j->ex.bits.fc0 = 0;
j->ex.bits.fc1 = 0;
j->ex.bits.fc2 = 0;
j->ex.bits.fc3 = 0;
j->ex.bits.reserved = 0;
break;
case PHONE_HOOKSTATE:
j->ex.bits.hookstate = 0;
retval = j->hookstate; //j->r_hook;
break;
case IXJCTL_SET_LED:
LED_SetState(arg, j);
break;
case PHONE_FRAME:
retval = set_base_frame(j, arg);
break;
case PHONE_REC_CODEC:
retval = set_rec_codec(j, arg);
break;
case PHONE_VAD:
ixj_vad(j, arg);
break;
case PHONE_REC_START:
ixj_record_start(j);
break;
case PHONE_REC_STOP:
ixj_record_stop(j);
break;
case PHONE_REC_DEPTH:
set_rec_depth(j, arg);
break;
case PHONE_REC_VOLUME:
if(arg == -1) {
retval = get_rec_volume(j);
}
else {
set_rec_volume(j, arg);
retval = arg;
}
break;
case PHONE_REC_VOLUME_LINEAR:
if(arg == -1) {
retval = get_rec_volume_linear(j);
}
else {
set_rec_volume_linear(j, arg);
retval = arg;
}
break;
case IXJCTL_DTMF_PRESCALE:
if(arg == -1) {
retval = get_dtmf_prescale(j);
}
else {
set_dtmf_prescale(j, arg);
retval = arg;
}
break;
case PHONE_REC_LEVEL:
retval = get_rec_level(j);
break;
case IXJCTL_SC_RXG:
retval = ixj_siadc(j, arg);
break;
case IXJCTL_SC_TXG:
retval = ixj_sidac(j, arg);
break;
case IXJCTL_AEC_START:
ixj_aec_start(j, arg);
break;
case IXJCTL_AEC_STOP:
aec_stop(j);
break;
case IXJCTL_AEC_GET_LEVEL:
retval = j->aec_level;
break;
case PHONE_PLAY_CODEC:
retval = set_play_codec(j, arg);
break;
case PHONE_PLAY_START:
retval = ixj_play_start(j);
break;
case PHONE_PLAY_STOP:
ixj_play_stop(j);
break;
case PHONE_PLAY_DEPTH:
set_play_depth(j, arg);
break;
case PHONE_PLAY_VOLUME:
if(arg == -1) {
retval = get_play_volume(j);
}
else {
set_play_volume(j, arg);
retval = arg;
}
break;
case PHONE_PLAY_VOLUME_LINEAR:
if(arg == -1) {
retval = get_play_volume_linear(j);
}
else {
set_play_volume_linear(j, arg);
retval = arg;
}
break;
case PHONE_PLAY_LEVEL:
retval = get_play_level(j);
break;
case IXJCTL_DSP_TYPE:
retval = (j->dsp.high << 8) + j->dsp.low;
break;
case IXJCTL_DSP_VERSION:
retval = (j->ver.high << 8) + j->ver.low;
break;
case IXJCTL_HZ:
hertz = arg;
break;
case IXJCTL_RATE:
if (arg > hertz)
retval = -1;
else
samplerate = arg;
break;
case IXJCTL_DRYBUFFER_READ:
put_user(j->drybuffer, (unsigned long __user *) argp);
break;
case IXJCTL_DRYBUFFER_CLEAR:
j->drybuffer = 0;
break;
case IXJCTL_FRAMES_READ:
put_user(j->framesread, (unsigned long __user *) argp);
break;
case IXJCTL_FRAMES_WRITTEN:
put_user(j->frameswritten, (unsigned long __user *) argp);
break;
case IXJCTL_READ_WAIT:
put_user(j->read_wait, (unsigned long __user *) argp);
break;
case IXJCTL_WRITE_WAIT:
put_user(j->write_wait, (unsigned long __user *) argp);
break;
case PHONE_MAXRINGS:
j->maxrings = arg;
break;
case PHONE_SET_TONE_ON_TIME:
ixj_set_tone_on(arg, j);
break;
case PHONE_SET_TONE_OFF_TIME:
ixj_set_tone_off(arg, j);
break;
case PHONE_GET_TONE_ON_TIME:
if (ixj_get_tone_on(j)) {
retval = -1;
} else {
retval = (j->ssr.high << 8) + j->ssr.low;
}
break;
case PHONE_GET_TONE_OFF_TIME:
if (ixj_get_tone_off(j)) {
retval = -1;
} else {
retval = (j->ssr.high << 8) + j->ssr.low;
}
break;
case PHONE_PLAY_TONE:
if (!j->tone_state)
retval = ixj_play_tone(j, arg);
else
retval = -1;
break;
case PHONE_GET_TONE_STATE:
retval = j->tone_state;
break;
case PHONE_DTMF_READY:
retval = j->ex.bits.dtmf_ready;
break;
case PHONE_GET_DTMF:
if (ixj_hookstate(j)) {
if (j->dtmf_rp != j->dtmf_wp) {
retval = j->dtmfbuffer[j->dtmf_rp];
j->dtmf_rp++;
if (j->dtmf_rp == 79)
j->dtmf_rp = 0;
if (j->dtmf_rp == j->dtmf_wp) {
j->ex.bits.dtmf_ready = j->dtmf_rp = j->dtmf_wp = 0;
}
}
}
break;
case PHONE_GET_DTMF_ASCII:
if (ixj_hookstate(j)) {
if (j->dtmf_rp != j->dtmf_wp) {
switch (j->dtmfbuffer[j->dtmf_rp]) {
case 10:
retval = 42; /* '*'; */
break;
case 11:
retval = 48; /*'0'; */
break;
case 12:
retval = 35; /*'#'; */
break;
case 28:
retval = 65; /*'A'; */
break;
case 29:
retval = 66; /*'B'; */
break;
case 30:
retval = 67; /*'C'; */
break;
case 31:
retval = 68; /*'D'; */
break;
default:
retval = 48 + j->dtmfbuffer[j->dtmf_rp];
break;
}
j->dtmf_rp++;
if (j->dtmf_rp == 79)
j->dtmf_rp = 0;
if(j->dtmf_rp == j->dtmf_wp)
{
j->ex.bits.dtmf_ready = j->dtmf_rp = j->dtmf_wp = 0;
}
}
}
break;
case PHONE_DTMF_OOB:
j->flags.dtmf_oob = arg;
break;
case PHONE_DIALTONE:
ixj_dialtone(j);
break;
case PHONE_BUSY:
ixj_busytone(j);
break;
case PHONE_RINGBACK:
ixj_ringback(j);
break;
case PHONE_WINK:
if(j->cardtype == QTI_PHONEJACK)
retval = -1;
else
retval = ixj_wink(j);
break;
case PHONE_CPT_STOP:
ixj_cpt_stop(j);
break;
case PHONE_QUERY_CODEC:
{
struct phone_codec_data pd;
int val;
int proto_size[] = {
-1,
12, 10, 16, 9, 8, 48, 5,
40, 40, 80, 40, 40, 6
};
if(copy_from_user(&pd, argp, sizeof(pd))) {
retval = -EFAULT;
break;
}
if(pd.type<1 || pd.type>13) {
retval = -EPROTONOSUPPORT;
break;
}
if(pd.type<G729)
val=proto_size[pd.type];
else switch(j->baseframe.low)
{
case 0xA0:val=2*proto_size[pd.type];break;
case 0x50:val=proto_size[pd.type];break;
default:val=proto_size[pd.type]*3;break;
}
pd.buf_min=pd.buf_max=pd.buf_opt=val;
if(copy_to_user(argp, &pd, sizeof(pd)))
retval = -EFAULT;
break;
}
case IXJCTL_DSP_IDLE:
idle(j);
break;
case IXJCTL_MIXER:
if ((arg & 0xff) == 0xff)
retval = ixj_get_mixer(arg, j);
else
ixj_mixer(arg, j);
break;
case IXJCTL_DAA_COEFF_SET:
switch (arg) {
case DAA_US:
DAA_Coeff_US(j);
retval = ixj_daa_write(j);
break;
case DAA_UK:
DAA_Coeff_UK(j);
retval = ixj_daa_write(j);
break;
case DAA_FRANCE:
DAA_Coeff_France(j);
retval = ixj_daa_write(j);
break;
case DAA_GERMANY:
DAA_Coeff_Germany(j);
retval = ixj_daa_write(j);
break;
case DAA_AUSTRALIA:
DAA_Coeff_Australia(j);
retval = ixj_daa_write(j);
break;
case DAA_JAPAN:
DAA_Coeff_Japan(j);
retval = ixj_daa_write(j);
break;
default:
retval = 1;
break;
}
break;
case IXJCTL_DAA_AGAIN:
ixj_daa_cr4(j, arg | 0x02);
break;
case IXJCTL_PSTN_LINETEST:
retval = ixj_linetest(j);
break;
case IXJCTL_VMWI:
ixj_write_vmwi(j, arg);
break;
case IXJCTL_CID:
if (copy_to_user(argp, &j->cid, sizeof(PHONE_CID)))
retval = -EFAULT;
j->ex.bits.caller_id = 0;
break;
case IXJCTL_WINK_DURATION:
j->winktime = arg;
break;
case IXJCTL_PORT:
if (arg)
retval = ixj_set_port(j, arg);
else
retval = j->port;
break;
case IXJCTL_POTS_PSTN:
retval = ixj_set_pots(j, arg);
break;
case PHONE_CAPABILITIES:
add_caps(j);
retval = j->caps;
break;
case PHONE_CAPABILITIES_LIST:
add_caps(j);
if (copy_to_user(argp, j->caplist, sizeof(struct phone_capability) * j->caps))
retval = -EFAULT;
break;
case PHONE_CAPABILITIES_CHECK:
{
struct phone_capability cap;
if (copy_from_user(&cap, argp, sizeof(cap)))
retval = -EFAULT;
else {
add_caps(j);
retval = capabilities_check(j, &cap);
}
}
break;
case PHONE_PSTN_SET_STATE:
daa_set_mode(j, arg);
break;
case PHONE_PSTN_GET_STATE:
retval = j->daa_mode;
j->ex.bits.pstn_ring = 0;
break;
case IXJCTL_SET_FILTER:
if (copy_from_user(&jf, argp, sizeof(jf)))
retval = -EFAULT;
else
retval = ixj_init_filter(j, &jf);
break;
case IXJCTL_SET_FILTER_RAW:
if (copy_from_user(&jfr, argp, sizeof(jfr)))
retval = -EFAULT;
else
retval = ixj_init_filter_raw(j, &jfr);
break;
case IXJCTL_GET_FILTER_HIST:
if(arg<0||arg>3)
retval = -EINVAL;
else
retval = j->filter_hist[arg];
break;
case IXJCTL_INIT_TONE:
if (copy_from_user(&ti, argp, sizeof(ti)))
retval = -EFAULT;
else
retval = ixj_init_tone(j, &ti);
break;
case IXJCTL_TONE_CADENCE:
retval = ixj_build_cadence(j, argp);
break;
case IXJCTL_FILTER_CADENCE:
retval = ixj_build_filter_cadence(j, argp);
break;
case IXJCTL_SIGCTL:
if (copy_from_user(&j->sigdef, argp, sizeof(IXJ_SIGDEF))) {
retval = -EFAULT;
break;
}
j->ixj_signals[j->sigdef.event] = j->sigdef.signal;
if(j->sigdef.event < 33) {
raise = 1;
for(mant = 0; mant < j->sigdef.event; mant++){
raise *= 2;
}
if(j->sigdef.signal)
j->ex_sig.bytes |= raise;
else
j->ex_sig.bytes &= (raise^0xffff);
}
break;
case IXJCTL_INTERCOM_STOP:
if(arg < 0 || arg >= IXJMAX)
return -EINVAL;
j->intercom = -1;
ixj_record_stop(j);
ixj_play_stop(j);
idle(j);
get_ixj(arg)->intercom = -1;
ixj_record_stop(get_ixj(arg));
ixj_play_stop(get_ixj(arg));
idle(get_ixj(arg));
break;
case IXJCTL_INTERCOM_START:
if(arg < 0 || arg >= IXJMAX)
return -EINVAL;
j->intercom = arg;
ixj_record_start(j);
ixj_play_start(j);
get_ixj(arg)->intercom = board;
ixj_play_start(get_ixj(arg));
ixj_record_start(get_ixj(arg));
break;
}
if (ixjdebug & 0x0040)
printk("phone%d ioctl end, cmd: 0x%x, arg: 0x%lx\n", minor, cmd, arg);
clear_bit(board, &j->busyflags);
return retval;
}
static long ixj_ioctl(struct file *file_p, unsigned int cmd, unsigned long arg)
{
long ret;
mutex_lock(&ixj_mutex);
ret = do_ixj_ioctl(file_p, cmd, arg);
mutex_unlock(&ixj_mutex);
return ret;
}
static int ixj_fasync(int fd, struct file *file_p, int mode)
{
IXJ *j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
return fasync_helper(fd, file_p, mode, &j->async_queue);
}
static const struct file_operations ixj_fops =
{
.owner = THIS_MODULE,
.read = ixj_enhanced_read,
.write = ixj_enhanced_write,
.poll = ixj_poll,
.unlocked_ioctl = ixj_ioctl,
.release = ixj_release,
.fasync = ixj_fasync,
.llseek = default_llseek,
};
static int ixj_linetest(IXJ *j)
{
j->flags.pstncheck = 1; /* Testing */
j->flags.pstn_present = 0; /* Assume the line is not there */
daa_int_read(j); /*Clear DAA Interrupt flags */
/* */
/* Hold all relays in the normally de-energized position. */
/* */
j->pld_slicw.bits.rly1 = 0;
j->pld_slicw.bits.rly2 = 0;
j->pld_slicw.bits.rly3 = 0;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
outb_p(j->pld_scrw.byte, j->XILINXbase);
j->pld_slicr.byte = inb_p(j->XILINXbase + 0x01);
if (j->pld_slicr.bits.potspstn) {
j->flags.pots_pstn = 1;
j->flags.pots_correct = 0;
LED_SetState(0x4, j);
} else {
j->flags.pots_pstn = 0;
j->pld_slicw.bits.rly1 = 0;
j->pld_slicw.bits.rly2 = 0;
j->pld_slicw.bits.rly3 = 1;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
outb_p(j->pld_scrw.byte, j->XILINXbase);
daa_set_mode(j, SOP_PU_CONVERSATION);
msleep(1000);
daa_int_read(j);
daa_set_mode(j, SOP_PU_RESET);
if (j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.VDD_OK) {
j->flags.pots_correct = 0; /* Should not be line voltage on POTS port. */
LED_SetState(0x4, j);
j->pld_slicw.bits.rly3 = 0;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
} else {
j->flags.pots_correct = 1;
LED_SetState(0x8, j);
j->pld_slicw.bits.rly1 = 1;
j->pld_slicw.bits.rly2 = 0;
j->pld_slicw.bits.rly3 = 0;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
}
}
j->pld_slicw.bits.rly3 = 0;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
daa_set_mode(j, SOP_PU_CONVERSATION);
msleep(1000);
daa_int_read(j);
daa_set_mode(j, SOP_PU_RESET);
if (j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.VDD_OK) {
j->pstn_sleeptil = jiffies + (hertz / 4);
j->flags.pstn_present = 1;
} else {
j->flags.pstn_present = 0;
}
if (j->flags.pstn_present) {
if (j->flags.pots_correct) {
LED_SetState(0xA, j);
} else {
LED_SetState(0x6, j);
}
} else {
if (j->flags.pots_correct) {
LED_SetState(0x9, j);
} else {
LED_SetState(0x5, j);
}
}
j->flags.pstncheck = 0; /* Testing */
return j->flags.pstn_present;
}
static int ixj_selfprobe(IXJ *j)
{
unsigned short cmd;
int cnt;
BYTES bytes;
init_waitqueue_head(&j->poll_q);
init_waitqueue_head(&j->read_q);
init_waitqueue_head(&j->write_q);
while(atomic_read(&j->DSPWrite) > 0)
atomic_dec(&j->DSPWrite);
if (ixjdebug & 0x0002)
printk(KERN_INFO "Write IDLE to Software Control Register\n");
ixj_WriteDSPCommand(0x0FE0, j); /* Put the DSP in full power mode. */
if (ixj_WriteDSPCommand(0x0000, j)) /* Write IDLE to Software Control Register */
return -1;
/* The read values of the SSR should be 0x00 for the IDLE command */
if (j->ssr.low || j->ssr.high)
return -1;
if (ixjdebug & 0x0002)
printk(KERN_INFO "Get Device ID Code\n");
if (ixj_WriteDSPCommand(0x3400, j)) /* Get Device ID Code */
return -1;
j->dsp.low = j->ssr.low;
j->dsp.high = j->ssr.high;
if (ixjdebug & 0x0002)
printk(KERN_INFO "Get Device Version Code\n");
if (ixj_WriteDSPCommand(0x3800, j)) /* Get Device Version Code */
return -1;
j->ver.low = j->ssr.low;
j->ver.high = j->ssr.high;
if (!j->cardtype) {
if (j->dsp.low == 0x21) {
bytes.high = bytes.low = inb_p(j->XILINXbase + 0x02);
outb_p(bytes.low ^ 0xFF, j->XILINXbase + 0x02);
/* Test for Internet LineJACK or Internet PhoneJACK Lite */
bytes.low = inb_p(j->XILINXbase + 0x02);
if (bytes.low == bytes.high) /* Register is read only on */
/* Internet PhoneJack Lite */
{
j->cardtype = QTI_PHONEJACK_LITE;
if (!request_region(j->XILINXbase, 4, "ixj control")) {
printk(KERN_INFO "ixj: can't get I/O address 0x%x\n", j->XILINXbase);
return -1;
}
j->pld_slicw.pcib.e1 = 1;
outb_p(j->pld_slicw.byte, j->XILINXbase);
} else {
j->cardtype = QTI_LINEJACK;
if (!request_region(j->XILINXbase, 8, "ixj control")) {
printk(KERN_INFO "ixj: can't get I/O address 0x%x\n", j->XILINXbase);
return -1;
}
}
} else if (j->dsp.low == 0x22) {
j->cardtype = QTI_PHONEJACK_PCI;
request_region(j->XILINXbase, 4, "ixj control");
j->pld_slicw.pcib.e1 = 1;
outb_p(j->pld_slicw.byte, j->XILINXbase);
} else
j->cardtype = QTI_PHONEJACK;
} else {
switch (j->cardtype) {
case QTI_PHONEJACK:
if (!j->dsp.low != 0x20) {
j->dsp.high = 0x80;
j->dsp.low = 0x20;
ixj_WriteDSPCommand(0x3800, j);
j->ver.low = j->ssr.low;
j->ver.high = j->ssr.high;
}
break;
case QTI_LINEJACK:
if (!request_region(j->XILINXbase, 8, "ixj control")) {
printk(KERN_INFO "ixj: can't get I/O address 0x%x\n", j->XILINXbase);
return -1;
}
break;
case QTI_PHONEJACK_LITE:
case QTI_PHONEJACK_PCI:
if (!request_region(j->XILINXbase, 4, "ixj control")) {
printk(KERN_INFO "ixj: can't get I/O address 0x%x\n", j->XILINXbase);
return -1;
}
j->pld_slicw.pcib.e1 = 1;
outb_p(j->pld_slicw.byte, j->XILINXbase);
break;
case QTI_PHONECARD:
break;
}
}
if (j->dsp.low == 0x20 || j->cardtype == QTI_PHONEJACK_LITE || j->cardtype == QTI_PHONEJACK_PCI) {
if (ixjdebug & 0x0002)
printk(KERN_INFO "Write CODEC config to Software Control Register\n");
if (ixj_WriteDSPCommand(0xC462, j)) /* Write CODEC config to Software Control Register */
return -1;
if (ixjdebug & 0x0002)
printk(KERN_INFO "Write CODEC timing to Software Control Register\n");
if (j->cardtype == QTI_PHONEJACK) {
cmd = 0x9FF2;
} else {
cmd = 0x9FF5;
}
if (ixj_WriteDSPCommand(cmd, j)) /* Write CODEC timing to Software Control Register */
return -1;
} else {
if (set_base_frame(j, 30) != 30)
return -1;
if (ixjdebug & 0x0002)
printk(KERN_INFO "Write CODEC config to Software Control Register\n");
if (j->cardtype == QTI_PHONECARD) {
if (ixj_WriteDSPCommand(0xC528, j)) /* Write CODEC config to Software Control Register */
return -1;
}
if (j->cardtype == QTI_LINEJACK) {
if (ixj_WriteDSPCommand(0xC528, j)) /* Write CODEC config to Software Control Register */
return -1;
if (ixjdebug & 0x0002)
printk(KERN_INFO "Turn on the PLD Clock at 8Khz\n");
j->pld_clock.byte = 0;
outb_p(j->pld_clock.byte, j->XILINXbase + 0x04);
}
}
if (j->dsp.low == 0x20) {
if (ixjdebug & 0x0002)
printk(KERN_INFO "Configure GPIO pins\n");
j->gpio.bytes.high = 0x09;
/* bytes.low = 0xEF; 0xF7 */
j->gpio.bits.gpio1 = 1;
j->gpio.bits.gpio2 = 1;
j->gpio.bits.gpio3 = 0;
j->gpio.bits.gpio4 = 1;
j->gpio.bits.gpio5 = 1;
j->gpio.bits.gpio6 = 1;
j->gpio.bits.gpio7 = 1;
ixj_WriteDSPCommand(j->gpio.word, j); /* Set GPIO pin directions */
if (ixjdebug & 0x0002)
printk(KERN_INFO "Enable SLIC\n");
j->gpio.bytes.high = 0x0B;
j->gpio.bytes.low = 0x00;
j->gpio.bits.gpio1 = 0;
j->gpio.bits.gpio2 = 1;
j->gpio.bits.gpio5 = 0;
ixj_WriteDSPCommand(j->gpio.word, j); /* send the ring stop signal */
j->port = PORT_POTS;
} else {
if (j->cardtype == QTI_LINEJACK) {
LED_SetState(0x1, j);
msleep(100);
LED_SetState(0x2, j);
msleep(100);
LED_SetState(0x4, j);
msleep(100);
LED_SetState(0x8, j);
msleep(100);
LED_SetState(0x0, j);
daa_get_version(j);
if (ixjdebug & 0x0002)
printk("Loading DAA Coefficients\n");
DAA_Coeff_US(j);
if (!ixj_daa_write(j)) {
printk("DAA write failed on board %d\n", j->board);
return -1;
}
if(!ixj_daa_cid_reset(j)) {
printk("DAA CID reset failed on board %d\n", j->board);
return -1;
}
j->flags.pots_correct = 0;
j->flags.pstn_present = 0;
ixj_linetest(j);
if (j->flags.pots_correct) {
j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
outb_p(j->pld_scrw.byte, j->XILINXbase);
j->pld_slicw.bits.rly1 = 1;
j->pld_slicw.bits.spken = 1;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
SLIC_SetState(PLD_SLIC_STATE_STANDBY, j);
/* SLIC_SetState(PLD_SLIC_STATE_ACTIVE, j); */
j->port = PORT_POTS;
}
ixj_set_port(j, PORT_PSTN);
ixj_set_pots(j, 1);
if (ixjdebug & 0x0002)
printk(KERN_INFO "Enable Mixer\n");
ixj_mixer(0x0000, j); /*Master Volume Left unmute 0db */
ixj_mixer(0x0100, j); /*Master Volume Right unmute 0db */
ixj_mixer(0x0203, j); /*Voice Left Volume unmute 6db */
ixj_mixer(0x0303, j); /*Voice Right Volume unmute 6db */
ixj_mixer(0x0480, j); /*FM Left mute */
ixj_mixer(0x0580, j); /*FM Right mute */
ixj_mixer(0x0680, j); /*CD Left mute */
ixj_mixer(0x0780, j); /*CD Right mute */
ixj_mixer(0x0880, j); /*Line Left mute */
ixj_mixer(0x0980, j); /*Line Right mute */
ixj_mixer(0x0A80, j); /*Aux left mute */
ixj_mixer(0x0B80, j); /*Aux right mute */
ixj_mixer(0x0C00, j); /*Mono1 unmute 12db */
ixj_mixer(0x0D80, j); /*Mono2 mute */
ixj_mixer(0x0E80, j); /*Mic mute */
ixj_mixer(0x0F00, j); /*Mono Out Volume unmute 0db */
ixj_mixer(0x1000, j); /*Voice Left and Right out only */
ixj_mixer(0x110C, j);
ixj_mixer(0x1200, j); /*Mono1 switch on mixer left */
ixj_mixer(0x1401, j);
ixj_mixer(0x1300, j); /*Mono1 switch on mixer right */
ixj_mixer(0x1501, j);
ixj_mixer(0x1700, j); /*Clock select */
ixj_mixer(0x1800, j); /*ADC input from mixer */
ixj_mixer(0x1901, j); /*Mic gain 30db */
if (ixjdebug & 0x0002)
printk(KERN_INFO "Setting Default US Ring Cadence Detection\n");
j->cadence_f[4].state = 0;
j->cadence_f[4].on1 = 0; /*Cadence Filter 4 is used for PSTN ring cadence */
j->cadence_f[4].off1 = 0;
j->cadence_f[4].on2 = 0;
j->cadence_f[4].off2 = 0;
j->cadence_f[4].on3 = 0;
j->cadence_f[4].off3 = 0; /* These should represent standard US ring pulse. */
j->pstn_last_rmr = jiffies;
} else {
if (j->cardtype == QTI_PHONECARD) {
ixj_WriteDSPCommand(0xCF07, j);
ixj_WriteDSPCommand(0x00B0, j);
ixj_set_port(j, PORT_SPEAKER);
} else {
ixj_set_port(j, PORT_POTS);
SLIC_SetState(PLD_SLIC_STATE_STANDBY, j);
/* SLIC_SetState(PLD_SLIC_STATE_ACTIVE, j); */
}
}
}
j->intercom = -1;
j->framesread = j->frameswritten = 0;
j->read_wait = j->write_wait = 0;
j->rxreadycheck = j->txreadycheck = 0;
/* initialise the DTMF prescale to a sensible value */
if (j->cardtype == QTI_LINEJACK) {
set_dtmf_prescale(j, 0x10);
} else {
set_dtmf_prescale(j, 0x40);
}
set_play_volume(j, 0x100);
set_rec_volume(j, 0x100);
if (ixj_WriteDSPCommand(0x0000, j)) /* Write IDLE to Software Control Register */
return -1;
/* The read values of the SSR should be 0x00 for the IDLE command */
if (j->ssr.low || j->ssr.high)
return -1;
if (ixjdebug & 0x0002)
printk(KERN_INFO "Enable Line Monitor\n");
if (ixjdebug & 0x0002)
printk(KERN_INFO "Set Line Monitor to Asyncronous Mode\n");
if (ixj_WriteDSPCommand(0x7E01, j)) /* Asynchronous Line Monitor */
return -1;
if (ixjdebug & 0x002)
printk(KERN_INFO "Enable DTMF Detectors\n");
if (ixj_WriteDSPCommand(0x5151, j)) /* Enable DTMF detection */
return -1;
if (ixj_WriteDSPCommand(0x6E01, j)) /* Set Asyncronous Tone Generation */
return -1;
set_rec_depth(j, 2); /* Set Record Channel Limit to 2 frames */
set_play_depth(j, 2); /* Set Playback Channel Limit to 2 frames */
j->ex.bits.dtmf_ready = 0;
j->dtmf_state = 0;
j->dtmf_wp = j->dtmf_rp = 0;
j->rec_mode = j->play_mode = -1;
j->flags.ringing = 0;
j->maxrings = MAXRINGS;
j->ring_cadence = USA_RING_CADENCE;
j->drybuffer = 0;
j->winktime = 320;
j->flags.dtmf_oob = 0;
for (cnt = 0; cnt < 4; cnt++)
j->cadence_f[cnt].enable = 0;
/* must be a device on the specified address */
ixj_WriteDSPCommand(0x0FE3, j); /* Put the DSP in 1/5 power mode. */
/* Set up the default signals for events */
for (cnt = 0; cnt < 35; cnt++)
j->ixj_signals[cnt] = SIGIO;
/* Set the excetion signal enable flags */
j->ex_sig.bits.dtmf_ready = j->ex_sig.bits.hookstate = j->ex_sig.bits.flash = j->ex_sig.bits.pstn_ring =
j->ex_sig.bits.caller_id = j->ex_sig.bits.pstn_wink = j->ex_sig.bits.f0 = j->ex_sig.bits.f1 = j->ex_sig.bits.f2 =
j->ex_sig.bits.f3 = j->ex_sig.bits.fc0 = j->ex_sig.bits.fc1 = j->ex_sig.bits.fc2 = j->ex_sig.bits.fc3 = 1;
#ifdef IXJ_DYN_ALLOC
j->fskdata = NULL;
#endif
j->fskdcnt = 0;
j->cidcw_wait = 0;
/* Register with the Telephony for Linux subsystem */
j->p.f_op = &ixj_fops;
j->p.open = ixj_open;
j->p.board = j->board;
phone_register_device(&j->p, PHONE_UNIT_ANY);
ixj_init_timer(j);
ixj_add_timer(j);
return 0;
}
/*
* Exported service for pcmcia card handling
*/
IXJ *ixj_pcmcia_probe(unsigned long dsp, unsigned long xilinx)
{
IXJ *j = ixj_alloc();
j->board = 0;
j->DSPbase = dsp;
j->XILINXbase = xilinx;
j->cardtype = QTI_PHONECARD;
ixj_selfprobe(j);
return j;
}
EXPORT_SYMBOL(ixj_pcmcia_probe); /* Fpr PCMCIA */
static int ixj_get_status_proc(char *buf)
{
int len;
int cnt;
IXJ *j;
len = 0;
len += sprintf(buf + len, "\nDriver version %i.%i.%i", IXJ_VER_MAJOR, IXJ_VER_MINOR, IXJ_BLD_VER);
len += sprintf(buf + len, "\nsizeof IXJ struct %Zd bytes", sizeof(IXJ));
len += sprintf(buf + len, "\nsizeof DAA struct %Zd bytes", sizeof(DAA_REGS));
len += sprintf(buf + len, "\nUsing old telephony API");
len += sprintf(buf + len, "\nDebug Level %d\n", ixjdebug);
for (cnt = 0; cnt < IXJMAX; cnt++) {
j = get_ixj(cnt);
if(j==NULL)
continue;
if (j->DSPbase) {
len += sprintf(buf + len, "\nCard Num %d", cnt);
len += sprintf(buf + len, "\nDSP Base Address 0x%4.4x", j->DSPbase);
if (j->cardtype != QTI_PHONEJACK)
len += sprintf(buf + len, "\nXILINX Base Address 0x%4.4x", j->XILINXbase);
len += sprintf(buf + len, "\nDSP Type %2.2x%2.2x", j->dsp.high, j->dsp.low);
len += sprintf(buf + len, "\nDSP Version %2.2x.%2.2x", j->ver.high, j->ver.low);
len += sprintf(buf + len, "\nSerial Number %8.8x", j->serial);
switch (j->cardtype) {
case (QTI_PHONEJACK):
len += sprintf(buf + len, "\nCard Type = Internet PhoneJACK");
break;
case (QTI_LINEJACK):
len += sprintf(buf + len, "\nCard Type = Internet LineJACK");
if (j->flags.g729_loaded)
len += sprintf(buf + len, " w/G.729 A/B");
len += sprintf(buf + len, " Country = %d", j->daa_country);
break;
case (QTI_PHONEJACK_LITE):
len += sprintf(buf + len, "\nCard Type = Internet PhoneJACK Lite");
if (j->flags.g729_loaded)
len += sprintf(buf + len, " w/G.729 A/B");
break;
case (QTI_PHONEJACK_PCI):
len += sprintf(buf + len, "\nCard Type = Internet PhoneJACK PCI");
if (j->flags.g729_loaded)
len += sprintf(buf + len, " w/G.729 A/B");
break;
case (QTI_PHONECARD):
len += sprintf(buf + len, "\nCard Type = Internet PhoneCARD");
if (j->flags.g729_loaded)
len += sprintf(buf + len, " w/G.729 A/B");
len += sprintf(buf + len, "\nSmart Cable %spresent", j->pccr1.bits.drf ? "not " : "");
if (!j->pccr1.bits.drf)
len += sprintf(buf + len, "\nSmart Cable type %d", j->flags.pcmciasct);
len += sprintf(buf + len, "\nSmart Cable state %d", j->flags.pcmciastate);
break;
default:
len += sprintf(buf + len, "\nCard Type = %d", j->cardtype);
break;
}
len += sprintf(buf + len, "\nReaders %d", j->readers);
len += sprintf(buf + len, "\nWriters %d", j->writers);
add_caps(j);
len += sprintf(buf + len, "\nCapabilities %d", j->caps);
if (j->dsp.low != 0x20)
len += sprintf(buf + len, "\nDSP Processor load %d", j->proc_load);
if (j->flags.cidsent)
len += sprintf(buf + len, "\nCaller ID data sent");
else
len += sprintf(buf + len, "\nCaller ID data not sent");
len += sprintf(buf + len, "\nPlay CODEC ");
switch (j->play_codec) {
case G723_63:
len += sprintf(buf + len, "G.723.1 6.3");
break;
case G723_53:
len += sprintf(buf + len, "G.723.1 5.3");
break;
case TS85:
len += sprintf(buf + len, "TrueSpeech 8.5");
break;
case TS48:
len += sprintf(buf + len, "TrueSpeech 4.8");
break;
case TS41:
len += sprintf(buf + len, "TrueSpeech 4.1");
break;
case G728:
len += sprintf(buf + len, "G.728");
break;
case G729:
len += sprintf(buf + len, "G.729");
break;
case G729B:
len += sprintf(buf + len, "G.729B");
break;
case ULAW:
len += sprintf(buf + len, "uLaw");
break;
case ALAW:
len += sprintf(buf + len, "aLaw");
break;
case LINEAR16:
len += sprintf(buf + len, "16 bit Linear");
break;
case LINEAR8:
len += sprintf(buf + len, "8 bit Linear");
break;
case WSS:
len += sprintf(buf + len, "Windows Sound System");
break;
default:
len += sprintf(buf + len, "NO CODEC CHOSEN");
break;
}
len += sprintf(buf + len, "\nRecord CODEC ");
switch (j->rec_codec) {
case G723_63:
len += sprintf(buf + len, "G.723.1 6.3");
break;
case G723_53:
len += sprintf(buf + len, "G.723.1 5.3");
break;
case TS85:
len += sprintf(buf + len, "TrueSpeech 8.5");
break;
case TS48:
len += sprintf(buf + len, "TrueSpeech 4.8");
break;
case TS41:
len += sprintf(buf + len, "TrueSpeech 4.1");
break;
case G728:
len += sprintf(buf + len, "G.728");
break;
case G729:
len += sprintf(buf + len, "G.729");
break;
case G729B:
len += sprintf(buf + len, "G.729B");
break;
case ULAW:
len += sprintf(buf + len, "uLaw");
break;
case ALAW:
len += sprintf(buf + len, "aLaw");
break;
case LINEAR16:
len += sprintf(buf + len, "16 bit Linear");
break;
case LINEAR8:
len += sprintf(buf + len, "8 bit Linear");
break;
case WSS:
len += sprintf(buf + len, "Windows Sound System");
break;
default:
len += sprintf(buf + len, "NO CODEC CHOSEN");
break;
}
len += sprintf(buf + len, "\nAEC ");
switch (j->aec_level) {
case AEC_OFF:
len += sprintf(buf + len, "Off");
break;
case AEC_LOW:
len += sprintf(buf + len, "Low");
break;
case AEC_MED:
len += sprintf(buf + len, "Med");
break;
case AEC_HIGH:
len += sprintf(buf + len, "High");
break;
case AEC_AUTO:
len += sprintf(buf + len, "Auto");
break;
case AEC_AGC:
len += sprintf(buf + len, "AEC/AGC");
break;
default:
len += sprintf(buf + len, "unknown(%i)", j->aec_level);
break;
}
len += sprintf(buf + len, "\nRec volume 0x%x", get_rec_volume(j));
len += sprintf(buf + len, "\nPlay volume 0x%x", get_play_volume(j));
len += sprintf(buf + len, "\nDTMF prescale 0x%x", get_dtmf_prescale(j));
len += sprintf(buf + len, "\nHook state %d", j->hookstate); /* j->r_hook); */
if (j->cardtype == QTI_LINEJACK) {
len += sprintf(buf + len, "\nPOTS Correct %d", j->flags.pots_correct);
len += sprintf(buf + len, "\nPSTN Present %d", j->flags.pstn_present);
len += sprintf(buf + len, "\nPSTN Check %d", j->flags.pstncheck);
len += sprintf(buf + len, "\nPOTS to PSTN %d", j->flags.pots_pstn);
switch (j->daa_mode) {
case SOP_PU_SLEEP:
len += sprintf(buf + len, "\nDAA PSTN On Hook");
break;
case SOP_PU_RINGING:
len += sprintf(buf + len, "\nDAA PSTN Ringing");
len += sprintf(buf + len, "\nRinging state = %d", j->cadence_f[4].state);
break;
case SOP_PU_CONVERSATION:
len += sprintf(buf + len, "\nDAA PSTN Off Hook");
break;
case SOP_PU_PULSEDIALING:
len += sprintf(buf + len, "\nDAA PSTN Pulse Dialing");
break;
}
len += sprintf(buf + len, "\nDAA RMR = %d", j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.bitreg.RMR);
len += sprintf(buf + len, "\nDAA VDD OK = %d", j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.VDD_OK);
len += sprintf(buf + len, "\nDAA CR0 = 0x%02x", j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg);
len += sprintf(buf + len, "\nDAA CR1 = 0x%02x", j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg);
len += sprintf(buf + len, "\nDAA CR2 = 0x%02x", j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg);
len += sprintf(buf + len, "\nDAA CR3 = 0x%02x", j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg);
len += sprintf(buf + len, "\nDAA CR4 = 0x%02x", j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg);
len += sprintf(buf + len, "\nDAA CR5 = 0x%02x", j->m_DAAShadowRegs.SOP_REGS.SOP.cr5.reg);
len += sprintf(buf + len, "\nDAA XR0 = 0x%02x", j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.reg);
len += sprintf(buf + len, "\nDAA ringstop %ld - jiffies %ld", j->pstn_ring_stop, jiffies);
}
switch (j->port) {
case PORT_POTS:
len += sprintf(buf + len, "\nPort POTS");
break;
case PORT_PSTN:
len += sprintf(buf + len, "\nPort PSTN");
break;
case PORT_SPEAKER:
len += sprintf(buf + len, "\nPort SPEAKER/MIC");
break;
case PORT_HANDSET:
len += sprintf(buf + len, "\nPort HANDSET");
break;
}
if (j->dsp.low == 0x21 || j->dsp.low == 0x22) {
len += sprintf(buf + len, "\nSLIC state ");
switch (SLIC_GetState(j)) {
case PLD_SLIC_STATE_OC:
len += sprintf(buf + len, "OC");
break;
case PLD_SLIC_STATE_RINGING:
len += sprintf(buf + len, "RINGING");
break;
case PLD_SLIC_STATE_ACTIVE:
len += sprintf(buf + len, "ACTIVE");
break;
case PLD_SLIC_STATE_OHT: /* On-hook transmit */
len += sprintf(buf + len, "OHT");
break;
case PLD_SLIC_STATE_TIPOPEN:
len += sprintf(buf + len, "TIPOPEN");
break;
case PLD_SLIC_STATE_STANDBY:
len += sprintf(buf + len, "STANDBY");
break;
case PLD_SLIC_STATE_APR: /* Active polarity reversal */
len += sprintf(buf + len, "APR");
break;
case PLD_SLIC_STATE_OHTPR: /* OHT polarity reversal */
len += sprintf(buf + len, "OHTPR");
break;
default:
len += sprintf(buf + len, "%d", SLIC_GetState(j));
break;
}
}
len += sprintf(buf + len, "\nBase Frame %2.2x.%2.2x", j->baseframe.high, j->baseframe.low);
len += sprintf(buf + len, "\nCID Base Frame %2d", j->cid_base_frame_size);
#ifdef PERFMON_STATS
len += sprintf(buf + len, "\nTimer Checks %ld", j->timerchecks);
len += sprintf(buf + len, "\nRX Ready Checks %ld", j->rxreadycheck);
len += sprintf(buf + len, "\nTX Ready Checks %ld", j->txreadycheck);
len += sprintf(buf + len, "\nFrames Read %ld", j->framesread);
len += sprintf(buf + len, "\nFrames Written %ld", j->frameswritten);
len += sprintf(buf + len, "\nDry Buffer %ld", j->drybuffer);
len += sprintf(buf + len, "\nRead Waits %ld", j->read_wait);
len += sprintf(buf + len, "\nWrite Waits %ld", j->write_wait);
len += sprintf(buf + len, "\nStatus Waits %ld", j->statuswait);
len += sprintf(buf + len, "\nStatus Wait Fails %ld", j->statuswaitfail);
len += sprintf(buf + len, "\nPControl Waits %ld", j->pcontrolwait);
len += sprintf(buf + len, "\nPControl Wait Fails %ld", j->pcontrolwaitfail);
len += sprintf(buf + len, "\nIs Control Ready Checks %ld", j->iscontrolready);
len += sprintf(buf + len, "\nIs Control Ready Check failures %ld", j->iscontrolreadyfail);
#endif
len += sprintf(buf + len, "\n");
}
}
return len;
}
static int ixj_read_proc(char *page, char **start, off_t off,
int count, int *eof, void *data)
{
int len = ixj_get_status_proc(page);
if (len <= off+count) *eof = 1;
*start = page + off;
len -= off;
if (len>count) len = count;
if (len<0) len = 0;
return len;
}
static void cleanup(void)
{
int cnt;
IXJ *j;
for (cnt = 0; cnt < IXJMAX; cnt++) {
j = get_ixj(cnt);
if(j != NULL && j->DSPbase) {
if (ixjdebug & 0x0002)
printk(KERN_INFO "IXJ: Deleting timer for /dev/phone%d\n", cnt);
del_timer(&j->timer);
if (j->cardtype == QTI_LINEJACK) {
j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
outb_p(j->pld_scrw.byte, j->XILINXbase);
j->pld_slicw.bits.rly1 = 0;
j->pld_slicw.bits.rly2 = 0;
j->pld_slicw.bits.rly3 = 0;
outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
LED_SetState(0x0, j);
if (ixjdebug & 0x0002)
printk(KERN_INFO "IXJ: Releasing XILINX address for /dev/phone%d\n", cnt);
release_region(j->XILINXbase, 8);
} else if (j->cardtype == QTI_PHONEJACK_LITE || j->cardtype == QTI_PHONEJACK_PCI) {
if (ixjdebug & 0x0002)
printk(KERN_INFO "IXJ: Releasing XILINX address for /dev/phone%d\n", cnt);
release_region(j->XILINXbase, 4);
}
kfree(j->read_buffer);
kfree(j->write_buffer);
if (j->dev)
pnp_device_detach(j->dev);
if (ixjdebug & 0x0002)
printk(KERN_INFO "IXJ: Unregistering /dev/phone%d from LTAPI\n", cnt);
phone_unregister_device(&j->p);
if (ixjdebug & 0x0002)
printk(KERN_INFO "IXJ: Releasing DSP address for /dev/phone%d\n", cnt);
release_region(j->DSPbase, 16);
#ifdef IXJ_DYN_ALLOC
if (ixjdebug & 0x0002)
printk(KERN_INFO "IXJ: Freeing memory for /dev/phone%d\n", cnt);
kfree(j);
ixj[cnt] = NULL;
#endif
}
}
if (ixjdebug & 0x0002)
printk(KERN_INFO "IXJ: Removing /proc/ixj\n");
remove_proc_entry ("ixj", NULL);
}
/* Typedefs */
typedef struct {
BYTE length;
DWORD bits;
} DATABLOCK;
static void PCIEE_WriteBit(WORD wEEPROMAddress, BYTE lastLCC, BYTE byData)
{
lastLCC = lastLCC & 0xfb;
lastLCC = lastLCC | (byData ? 4 : 0);
outb(lastLCC, wEEPROMAddress); /*set data out bit as appropriate */
mdelay(1);
lastLCC = lastLCC | 0x01;
outb(lastLCC, wEEPROMAddress); /*SK rising edge */
byData = byData << 1;
lastLCC = lastLCC & 0xfe;
mdelay(1);
outb(lastLCC, wEEPROMAddress); /*after delay, SK falling edge */
}
static BYTE PCIEE_ReadBit(WORD wEEPROMAddress, BYTE lastLCC)
{
mdelay(1);
lastLCC = lastLCC | 0x01;
outb(lastLCC, wEEPROMAddress); /*SK rising edge */
lastLCC = lastLCC & 0xfe;
mdelay(1);
outb(lastLCC, wEEPROMAddress); /*after delay, SK falling edge */
return ((inb(wEEPROMAddress) >> 3) & 1);
}
static bool PCIEE_ReadWord(WORD wAddress, WORD wLoc, WORD * pwResult)
{
BYTE lastLCC;
WORD wEEPROMAddress = wAddress + 3;
DWORD i;
BYTE byResult;
*pwResult = 0;
lastLCC = inb(wEEPROMAddress);
lastLCC = lastLCC | 0x02;
lastLCC = lastLCC & 0xfe;
outb(lastLCC, wEEPROMAddress); /* CS hi, SK lo */
mdelay(1); /* delay */
PCIEE_WriteBit(wEEPROMAddress, lastLCC, 1);
PCIEE_WriteBit(wEEPROMAddress, lastLCC, 1);
PCIEE_WriteBit(wEEPROMAddress, lastLCC, 0);
for (i = 0; i < 8; i++) {
PCIEE_WriteBit(wEEPROMAddress, lastLCC, wLoc & 0x80 ? 1 : 0);
wLoc <<= 1;
}
for (i = 0; i < 16; i++) {
byResult = PCIEE_ReadBit(wEEPROMAddress, lastLCC);
*pwResult = (*pwResult << 1) | byResult;
}
mdelay(1); /* another delay */
lastLCC = lastLCC & 0xfd;
outb(lastLCC, wEEPROMAddress); /* negate CS */
return 0;
}
static DWORD PCIEE_GetSerialNumber(WORD wAddress)
{
WORD wLo, wHi;
if (PCIEE_ReadWord(wAddress, 62, &wLo))
return 0;
if (PCIEE_ReadWord(wAddress, 63, &wHi))
return 0;
return (((DWORD) wHi << 16) | wLo);
}
static int dspio[IXJMAX + 1] =
{
0,
};
static int xio[IXJMAX + 1] =
{
0,
};
module_param_array(dspio, int, NULL, 0);
module_param_array(xio, int, NULL, 0);
MODULE_DESCRIPTION("Quicknet VoIP Telephony card module - www.quicknet.net");
MODULE_AUTHOR("Ed Okerson <eokerson@quicknet.net>");
MODULE_LICENSE("GPL");
static void __exit ixj_exit(void)
{
cleanup();
}
static IXJ *new_ixj(unsigned long port)
{
IXJ *res;
if (!request_region(port, 16, "ixj DSP")) {
printk(KERN_INFO "ixj: can't get I/O address 0x%lx\n", port);
return NULL;
}
res = ixj_alloc();
if (!res) {
release_region(port, 16);
printk(KERN_INFO "ixj: out of memory\n");
return NULL;
}
res->DSPbase = port;
return res;
}
static int __init ixj_probe_isapnp(int *cnt)
{
int probe = 0;
int func = 0x110;
struct pnp_dev *dev = NULL, *old_dev = NULL;
while (1) {
do {
IXJ *j;
int result;
old_dev = dev;
dev = pnp_find_dev(NULL, ISAPNP_VENDOR('Q', 'T', 'I'),
ISAPNP_FUNCTION(func), old_dev);
if (!dev || !dev->card)
break;
result = pnp_device_attach(dev);
if (result < 0) {
printk("pnp attach failed %d \n", result);
break;
}
if (pnp_activate_dev(dev) < 0) {
printk("pnp activate failed (out of resources?)\n");
pnp_device_detach(dev);
return -ENOMEM;
}
if (!pnp_port_valid(dev, 0)) {
pnp_device_detach(dev);
return -ENODEV;
}
j = new_ixj(pnp_port_start(dev, 0));
if (!j)
break;
if (func != 0x110)
j->XILINXbase = pnp_port_start(dev, 1); /* get real port */
switch (func) {
case (0x110):
j->cardtype = QTI_PHONEJACK;
break;
case (0x310):
j->cardtype = QTI_LINEJACK;
break;
case (0x410):
j->cardtype = QTI_PHONEJACK_LITE;
break;
}
j->board = *cnt;
probe = ixj_selfprobe(j);
if(!probe) {
j->serial = dev->card->serial;
j->dev = dev;
switch (func) {
case 0x110:
printk(KERN_INFO "ixj: found Internet PhoneJACK at 0x%x\n", j->DSPbase);
break;
case 0x310:
printk(KERN_INFO "ixj: found Internet LineJACK at 0x%x\n", j->DSPbase);
break;
case 0x410:
printk(KERN_INFO "ixj: found Internet PhoneJACK Lite at 0x%x\n", j->DSPbase);
break;
}
}
++*cnt;
} while (dev);
if (func == 0x410)
break;
if (func == 0x310)
func = 0x410;
if (func == 0x110)
func = 0x310;
dev = NULL;
}
return probe;
}
static int __init ixj_probe_isa(int *cnt)
{
int i, probe;
/* Use passed parameters for older kernels without PnP */
for (i = 0; i < IXJMAX; i++) {
if (dspio[i]) {
IXJ *j = new_ixj(dspio[i]);
if (!j)
break;
j->XILINXbase = xio[i];
j->cardtype = 0;
j->board = *cnt;
probe = ixj_selfprobe(j);
j->dev = NULL;
++*cnt;
}
}
return 0;
}
static int __init ixj_probe_pci(int *cnt)
{
struct pci_dev *pci = NULL;
int i, probe = 0;
IXJ *j = NULL;
for (i = 0; i < IXJMAX - *cnt; i++) {
pci = pci_get_device(PCI_VENDOR_ID_QUICKNET,
PCI_DEVICE_ID_QUICKNET_XJ, pci);
if (!pci)
break;
if (pci_enable_device(pci))
break;
j = new_ixj(pci_resource_start(pci, 0));
if (!j)
break;
j->serial = (PCIEE_GetSerialNumber)pci_resource_start(pci, 2);
j->XILINXbase = j->DSPbase + 0x10;
j->cardtype = QTI_PHONEJACK_PCI;
j->board = *cnt;
probe = ixj_selfprobe(j);
if (!probe)
printk(KERN_INFO "ixj: found Internet PhoneJACK PCI at 0x%x\n", j->DSPbase);
++*cnt;
}
pci_dev_put(pci);
return probe;
}
static int __init ixj_init(void)
{
int cnt = 0;
int probe = 0;
cnt = 0;
/* These might be no-ops, see above. */
if ((probe = ixj_probe_isapnp(&cnt)) < 0) {
return probe;
}
if ((probe = ixj_probe_isa(&cnt)) < 0) {
return probe;
}
if ((probe = ixj_probe_pci(&cnt)) < 0) {
return probe;
}
printk(KERN_INFO "ixj driver initialized.\n");
create_proc_read_entry ("ixj", 0, NULL, ixj_read_proc, NULL);
return probe;
}
module_init(ixj_init);
module_exit(ixj_exit);
static void DAA_Coeff_US(IXJ *j)
{
int i;
j->daa_country = DAA_US;
/*----------------------------------------------- */
/* CAO */
for (i = 0; i < ALISDAA_CALLERID_SIZE; i++) {
j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID[i] = 0;
}
/* Bytes for IM-filter part 1 (04): 0E,32,E2,2F,C2,5A,C0,00 */
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[7] = 0x03;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[6] = 0x4B;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[5] = 0x5D;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[4] = 0xCD;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[3] = 0x24;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[2] = 0xC5;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[1] = 0xA0;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[0] = 0x00;
/* Bytes for IM-filter part 2 (05): 72,85,00,0E,2B,3A,D0,08 */
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[7] = 0x71;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[6] = 0x1A;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[5] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[4] = 0x0A;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[3] = 0xB5;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[2] = 0x33;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[1] = 0xE0;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[0] = 0x08;
/* Bytes for FRX-filter (08): 03,8F,48,F2,8F,48,70,08 */
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[7] = 0x05;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[6] = 0xA3;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[5] = 0x72;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[4] = 0x34;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[3] = 0x3F;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[2] = 0x3B;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[1] = 0x30;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[0] = 0x08;
/* Bytes for FRR-filter (07): 04,8F,38,7F,9B,EA,B0,08 */
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[7] = 0x05;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[6] = 0x87;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[5] = 0xF9;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[4] = 0x3E;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[3] = 0x32;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[2] = 0xDA;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[1] = 0xB0;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[0] = 0x08;
/* Bytes for AX-filter (0A): 16,55,DD,CA */
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[3] = 0x41;
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[2] = 0xB5;
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[1] = 0xDD;
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[0] = 0xCA;
/* Bytes for AR-filter (09): 52,D3,11,42 */
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[3] = 0x25;
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[2] = 0xC7;
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[1] = 0x10;
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[0] = 0xD6;
/* Bytes for TH-filter part 1 (00): 00,42,48,81,B3,80,00,98 */
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[7] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[6] = 0x42;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[5] = 0x48;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[4] = 0x81;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[3] = 0xA5;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[2] = 0x80;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[1] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[0] = 0x98;
/* Bytes for TH-filter part 2 (01): 02,F2,33,A0,68,AB,8A,AD */
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[7] = 0x02;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[6] = 0xA2;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[5] = 0x2B;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[4] = 0xB0;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[3] = 0xE8;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[2] = 0xAB;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[1] = 0x81;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[0] = 0xCC;
/* Bytes for TH-filter part 3 (02): 00,88,DA,54,A4,BA,2D,BB */
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[7] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[6] = 0x88;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[5] = 0xD2;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[4] = 0x24;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[3] = 0xBA;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[2] = 0xA9;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[1] = 0x3B;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[0] = 0xA6;
/* ; (10K, 0.68uF) */
/* */
/* Bytes for Ringing part 1 (03):1B,3B,9B,BA,D4,1C,B3,23 */
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[7] = 0x1B;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[6] = 0x3C;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[5] = 0x93;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[4] = 0x3A;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[3] = 0x22;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[2] = 0x12;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[1] = 0xA3;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[0] = 0x23;
/* Bytes for Ringing part 2 (06):13,42,A6,BA,D4,73,CA,D5 */
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[7] = 0x12;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[6] = 0xA2;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[5] = 0xA6;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[4] = 0xBA;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[3] = 0x22;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[2] = 0x7A;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[1] = 0x0A;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[0] = 0xD5;
/* Levelmetering Ringing (0D):B2,45,0F,8E */
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[3] = 0xAA;
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[2] = 0x35;
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[1] = 0x0F;
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[0] = 0x8E;
/* Bytes for Ringing part 1 (03):1B,3B,9B,BA,D4,1C,B3,23 */
/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[7] = 0x1C; */
/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[6] = 0xB3; */
/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[5] = 0xAB; */
/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[4] = 0xAB; */
/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[3] = 0x54; */
/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[2] = 0x2D; */
/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[1] = 0x62; */
/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[0] = 0x2D; */
/* Bytes for Ringing part 2 (06):13,42,A6,BA,D4,73,CA,D5 */
/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[7] = 0x2D; */
/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[6] = 0x62; */
/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[5] = 0xA6; */
/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[4] = 0xBB; */
/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[3] = 0x2A; */
/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[2] = 0x7D; */
/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[1] = 0x0A; */
/* j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[0] = 0xD4; */
/* */
/* Levelmetering Ringing (0D):B2,45,0F,8E */
/* j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[3] = 0xAA; */
/* j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[2] = 0x05; */
/* j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[1] = 0x0F; */
/* j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[0] = 0x8E; */
/* Caller ID 1st Tone (0E):CA,0E,CA,09,99,99,99,99 */
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[7] = 0xCA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[6] = 0x0E;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[5] = 0xCA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[4] = 0x09;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[3] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[2] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[1] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[0] = 0x99;
/* Caller ID 2nd Tone (0F):FD,B5,BA,07,DA,00,00,00 */
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[7] = 0xFD;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[6] = 0xB5;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[5] = 0xBA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[4] = 0x07;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[3] = 0xDA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[2] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[1] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[0] = 0x00;
/* */
/* ;CR Registers */
/* Config. Reg. 0 (filters) (cr0):FE ; CLK gen. by crystal */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg = 0xFF;
/* Config. Reg. 1 (dialing) (cr1):05 */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg = 0x05;
/* Config. Reg. 2 (caller ID) (cr2):04 */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg = 0x04;
/* Config. Reg. 3 (testloops) (cr3):03 ; SEL Bit==0, HP-disabled */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg = 0x00;
/* Config. Reg. 4 (analog gain) (cr4):02 */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = 0x02;
/* Config. Reg. 5 (Version) (cr5):02 */
/* Config. Reg. 6 (Reserved) (cr6):00 */
/* Config. Reg. 7 (Reserved) (cr7):00 */
/* */
/* ;xr Registers */
/* Ext. Reg. 0 (Interrupt Reg.) (xr0):02 */
j->m_DAAShadowRegs.XOP_xr0_W.reg = 0x02; /* SO_1 set to '1' because it is inverted. */
/* Ext. Reg. 1 (Interrupt enable) (xr1):3C Cadence, RING, Caller ID, VDD_OK */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr1.reg = 0x3C;
/* Ext. Reg. 2 (Cadence Time Out) (xr2):7D */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr2.reg = 0x7D;
/* Ext. Reg. 3 (DC Char) (xr3):32 ; B-Filter Off == 1 */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr3.reg = 0x3B; /*0x32; */
/* Ext. Reg. 4 (Cadence) (xr4):00 */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr4.reg = 0x00;
/* Ext. Reg. 5 (Ring timer) (xr5):22 */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr5.reg = 0x22;
/* Ext. Reg. 6 (Power State) (xr6):00 */
j->m_DAAShadowRegs.XOP_xr6_W.reg = 0x00;
/* Ext. Reg. 7 (Vdd) (xr7):40 */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr7.reg = 0x40; /* 0x40 ??? Should it be 0x00? */
/* */
/* DTMF Tone 1 (0B): 11,B3,5A,2C ; 697 Hz */
/* 12,33,5A,C3 ; 770 Hz */
/* 13,3C,5B,32 ; 852 Hz */
/* 1D,1B,5C,CC ; 941 Hz */
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[3] = 0x11;
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[2] = 0xB3;
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[1] = 0x5A;
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[0] = 0x2C;
/* DTMF Tone 2 (0C): 32,32,52,B3 ; 1209 Hz */
/* EC,1D,52,22 ; 1336 Hz */
/* AA,AC,51,D2 ; 1477 Hz */
/* 9B,3B,51,25 ; 1633 Hz */
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[3] = 0x32;
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[2] = 0x32;
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[1] = 0x52;
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[0] = 0xB3;
}
static void DAA_Coeff_UK(IXJ *j)
{
int i;
j->daa_country = DAA_UK;
/*----------------------------------------------- */
/* CAO */
for (i = 0; i < ALISDAA_CALLERID_SIZE; i++) {
j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID[i] = 0;
}
/* Bytes for IM-filter part 1 (04): 00,C2,BB,A8,CB,81,A0,00 */
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[7] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[6] = 0xC2;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[5] = 0xBB;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[4] = 0xA8;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[3] = 0xCB;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[2] = 0x81;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[1] = 0xA0;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[0] = 0x00;
/* Bytes for IM-filter part 2 (05): 40,00,00,0A,A4,33,E0,08 */
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[7] = 0x40;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[6] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[5] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[4] = 0x0A;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[3] = 0xA4;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[2] = 0x33;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[1] = 0xE0;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[0] = 0x08;
/* Bytes for FRX-filter (08): 07,9B,ED,24,B2,A2,A0,08 */
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[7] = 0x07;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[6] = 0x9B;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[5] = 0xED;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[4] = 0x24;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[3] = 0xB2;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[2] = 0xA2;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[1] = 0xA0;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[0] = 0x08;
/* Bytes for FRR-filter (07): 0F,92,F2,B2,87,D2,30,08 */
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[7] = 0x0F;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[6] = 0x92;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[5] = 0xF2;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[4] = 0xB2;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[3] = 0x87;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[2] = 0xD2;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[1] = 0x30;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[0] = 0x08;
/* Bytes for AX-filter (0A): 1B,A5,DD,CA */
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[3] = 0x1B;
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[2] = 0xA5;
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[1] = 0xDD;
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[0] = 0xCA;
/* Bytes for AR-filter (09): E2,27,10,D6 */
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[3] = 0xE2;
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[2] = 0x27;
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[1] = 0x10;
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[0] = 0xD6;
/* Bytes for TH-filter part 1 (00): 80,2D,38,8B,D0,00,00,98 */
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[7] = 0x80;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[6] = 0x2D;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[5] = 0x38;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[4] = 0x8B;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[3] = 0xD0;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[2] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[1] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[0] = 0x98;
/* Bytes for TH-filter part 2 (01): 02,5A,53,F0,0B,5F,84,D4 */
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[7] = 0x02;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[6] = 0x5A;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[5] = 0x53;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[4] = 0xF0;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[3] = 0x0B;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[2] = 0x5F;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[1] = 0x84;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[0] = 0xD4;
/* Bytes for TH-filter part 3 (02): 00,88,6A,A4,8F,52,F5,32 */
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[7] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[6] = 0x88;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[5] = 0x6A;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[4] = 0xA4;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[3] = 0x8F;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[2] = 0x52;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[1] = 0xF5;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[0] = 0x32;
/* ; idle */
/* Bytes for Ringing part 1 (03):1B,3C,93,3A,22,12,A3,23 */
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[7] = 0x1B;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[6] = 0x3C;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[5] = 0x93;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[4] = 0x3A;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[3] = 0x22;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[2] = 0x12;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[1] = 0xA3;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[0] = 0x23;
/* Bytes for Ringing part 2 (06):12,A2,A6,BA,22,7A,0A,D5 */
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[7] = 0x12;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[6] = 0xA2;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[5] = 0xA6;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[4] = 0xBA;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[3] = 0x22;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[2] = 0x7A;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[1] = 0x0A;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[0] = 0xD5;
/* Levelmetering Ringing (0D):AA,35,0F,8E ; 25Hz 30V less possible? */
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[3] = 0xAA;
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[2] = 0x35;
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[1] = 0x0F;
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[0] = 0x8E;
/* Caller ID 1st Tone (0E):CA,0E,CA,09,99,99,99,99 */
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[7] = 0xCA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[6] = 0x0E;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[5] = 0xCA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[4] = 0x09;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[3] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[2] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[1] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[0] = 0x99;
/* Caller ID 2nd Tone (0F):FD,B5,BA,07,DA,00,00,00 */
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[7] = 0xFD;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[6] = 0xB5;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[5] = 0xBA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[4] = 0x07;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[3] = 0xDA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[2] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[1] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[0] = 0x00;
/* ;CR Registers */
/* Config. Reg. 0 (filters) (cr0):FF */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg = 0xFF;
/* Config. Reg. 1 (dialing) (cr1):05 */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg = 0x05;
/* Config. Reg. 2 (caller ID) (cr2):04 */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg = 0x04;
/* Config. Reg. 3 (testloops) (cr3):00 ; */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg = 0x00;
/* Config. Reg. 4 (analog gain) (cr4):02 */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = 0x02;
/* Config. Reg. 5 (Version) (cr5):02 */
/* Config. Reg. 6 (Reserved) (cr6):00 */
/* Config. Reg. 7 (Reserved) (cr7):00 */
/* ;xr Registers */
/* Ext. Reg. 0 (Interrupt Reg.) (xr0):02 */
j->m_DAAShadowRegs.XOP_xr0_W.reg = 0x02; /* SO_1 set to '1' because it is inverted. */
/* Ext. Reg. 1 (Interrupt enable) (xr1):1C */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr1.reg = 0x1C; /* RING, Caller ID, VDD_OK */
/* Ext. Reg. 2 (Cadence Time Out) (xr2):7D */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr2.reg = 0x7D;
/* Ext. Reg. 3 (DC Char) (xr3):36 ; */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr3.reg = 0x36;
/* Ext. Reg. 4 (Cadence) (xr4):00 */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr4.reg = 0x00;
/* Ext. Reg. 5 (Ring timer) (xr5):22 */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr5.reg = 0x22;
/* Ext. Reg. 6 (Power State) (xr6):00 */
j->m_DAAShadowRegs.XOP_xr6_W.reg = 0x00;
/* Ext. Reg. 7 (Vdd) (xr7):46 */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr7.reg = 0x46; /* 0x46 ??? Should it be 0x00? */
/* DTMF Tone 1 (0B): 11,B3,5A,2C ; 697 Hz */
/* 12,33,5A,C3 ; 770 Hz */
/* 13,3C,5B,32 ; 852 Hz */
/* 1D,1B,5C,CC ; 941 Hz */
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[3] = 0x11;
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[2] = 0xB3;
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[1] = 0x5A;
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[0] = 0x2C;
/* DTMF Tone 2 (0C): 32,32,52,B3 ; 1209 Hz */
/* EC,1D,52,22 ; 1336 Hz */
/* AA,AC,51,D2 ; 1477 Hz */
/* 9B,3B,51,25 ; 1633 Hz */
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[3] = 0x32;
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[2] = 0x32;
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[1] = 0x52;
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[0] = 0xB3;
}
static void DAA_Coeff_France(IXJ *j)
{
int i;
j->daa_country = DAA_FRANCE;
/*----------------------------------------------- */
/* CAO */
for (i = 0; i < ALISDAA_CALLERID_SIZE; i++) {
j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID[i] = 0;
}
/* Bytes for IM-filter part 1 (04): 02,A2,43,2C,22,AF,A0,00 */
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[7] = 0x02;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[6] = 0xA2;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[5] = 0x43;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[4] = 0x2C;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[3] = 0x22;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[2] = 0xAF;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[1] = 0xA0;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[0] = 0x00;
/* Bytes for IM-filter part 2 (05): 67,CE,00,0C,22,33,E0,08 */
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[7] = 0x67;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[6] = 0xCE;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[5] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[4] = 0x2C;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[3] = 0x22;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[2] = 0x33;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[1] = 0xE0;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[0] = 0x08;
/* Bytes for FRX-filter (08): 07,9A,28,F6,23,4A,B0,08 */
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[7] = 0x07;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[6] = 0x9A;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[5] = 0x28;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[4] = 0xF6;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[3] = 0x23;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[2] = 0x4A;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[1] = 0xB0;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[0] = 0x08;
/* Bytes for FRR-filter (07): 03,8F,F9,2F,9E,FA,20,08 */
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[7] = 0x03;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[6] = 0x8F;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[5] = 0xF9;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[4] = 0x2F;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[3] = 0x9E;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[2] = 0xFA;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[1] = 0x20;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[0] = 0x08;
/* Bytes for AX-filter (0A): 16,B5,DD,CA */
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[3] = 0x16;
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[2] = 0xB5;
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[1] = 0xDD;
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[0] = 0xCA;
/* Bytes for AR-filter (09): 52,C7,10,D6 */
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[3] = 0xE2;
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[2] = 0xC7;
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[1] = 0x10;
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[0] = 0xD6;
/* Bytes for TH-filter part 1 (00): 00,42,48,81,A6,80,00,98 */
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[7] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[6] = 0x42;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[5] = 0x48;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[4] = 0x81;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[3] = 0xA6;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[2] = 0x80;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[1] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[0] = 0x98;
/* Bytes for TH-filter part 2 (01): 02,AC,2A,30,78,AC,8A,2C */
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[7] = 0x02;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[6] = 0xAC;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[5] = 0x2A;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[4] = 0x30;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[3] = 0x78;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[2] = 0xAC;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[1] = 0x8A;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[0] = 0x2C;
/* Bytes for TH-filter part 3 (02): 00,88,DA,A5,22,BA,2C,45 */
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[7] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[6] = 0x88;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[5] = 0xDA;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[4] = 0xA5;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[3] = 0x22;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[2] = 0xBA;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[1] = 0x2C;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[0] = 0x45;
/* ; idle */
/* Bytes for Ringing part 1 (03):1B,3C,93,3A,22,12,A3,23 */
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[7] = 0x1B;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[6] = 0x3C;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[5] = 0x93;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[4] = 0x3A;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[3] = 0x22;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[2] = 0x12;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[1] = 0xA3;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[0] = 0x23;
/* Bytes for Ringing part 2 (06):12,A2,A6,BA,22,7A,0A,D5 */
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[7] = 0x12;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[6] = 0xA2;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[5] = 0xA6;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[4] = 0xBA;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[3] = 0x22;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[2] = 0x7A;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[1] = 0x0A;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[0] = 0xD5;
/* Levelmetering Ringing (0D):32,45,B5,84 ; 50Hz 20V */
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[3] = 0x32;
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[2] = 0x45;
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[1] = 0xB5;
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[0] = 0x84;
/* Caller ID 1st Tone (0E):CA,0E,CA,09,99,99,99,99 */
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[7] = 0xCA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[6] = 0x0E;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[5] = 0xCA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[4] = 0x09;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[3] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[2] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[1] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[0] = 0x99;
/* Caller ID 2nd Tone (0F):FD,B5,BA,07,DA,00,00,00 */
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[7] = 0xFD;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[6] = 0xB5;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[5] = 0xBA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[4] = 0x07;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[3] = 0xDA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[2] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[1] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[0] = 0x00;
/* ;CR Registers */
/* Config. Reg. 0 (filters) (cr0):FF */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg = 0xFF;
/* Config. Reg. 1 (dialing) (cr1):05 */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg = 0x05;
/* Config. Reg. 2 (caller ID) (cr2):04 */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg = 0x04;
/* Config. Reg. 3 (testloops) (cr3):00 ; */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg = 0x00;
/* Config. Reg. 4 (analog gain) (cr4):02 */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = 0x02;
/* Config. Reg. 5 (Version) (cr5):02 */
/* Config. Reg. 6 (Reserved) (cr6):00 */
/* Config. Reg. 7 (Reserved) (cr7):00 */
/* ;xr Registers */
/* Ext. Reg. 0 (Interrupt Reg.) (xr0):02 */
j->m_DAAShadowRegs.XOP_xr0_W.reg = 0x02; /* SO_1 set to '1' because it is inverted. */
/* Ext. Reg. 1 (Interrupt enable) (xr1):1C */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr1.reg = 0x1C; /* RING, Caller ID, VDD_OK */
/* Ext. Reg. 2 (Cadence Time Out) (xr2):7D */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr2.reg = 0x7D;
/* Ext. Reg. 3 (DC Char) (xr3):36 ; */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr3.reg = 0x36;
/* Ext. Reg. 4 (Cadence) (xr4):00 */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr4.reg = 0x00;
/* Ext. Reg. 5 (Ring timer) (xr5):22 */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr5.reg = 0x22;
/* Ext. Reg. 6 (Power State) (xr6):00 */
j->m_DAAShadowRegs.XOP_xr6_W.reg = 0x00;
/* Ext. Reg. 7 (Vdd) (xr7):46 */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr7.reg = 0x46; /* 0x46 ??? Should it be 0x00? */
/* DTMF Tone 1 (0B): 11,B3,5A,2C ; 697 Hz */
/* 12,33,5A,C3 ; 770 Hz */
/* 13,3C,5B,32 ; 852 Hz */
/* 1D,1B,5C,CC ; 941 Hz */
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[3] = 0x11;
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[2] = 0xB3;
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[1] = 0x5A;
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[0] = 0x2C;
/* DTMF Tone 2 (0C): 32,32,52,B3 ; 1209 Hz */
/* EC,1D,52,22 ; 1336 Hz */
/* AA,AC,51,D2 ; 1477 Hz */
/* 9B,3B,51,25 ; 1633 Hz */
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[3] = 0x32;
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[2] = 0x32;
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[1] = 0x52;
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[0] = 0xB3;
}
static void DAA_Coeff_Germany(IXJ *j)
{
int i;
j->daa_country = DAA_GERMANY;
/*----------------------------------------------- */
/* CAO */
for (i = 0; i < ALISDAA_CALLERID_SIZE; i++) {
j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID[i] = 0;
}
/* Bytes for IM-filter part 1 (04): 00,CE,BB,B8,D2,81,B0,00 */
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[7] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[6] = 0xCE;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[5] = 0xBB;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[4] = 0xB8;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[3] = 0xD2;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[2] = 0x81;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[1] = 0xB0;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[0] = 0x00;
/* Bytes for IM-filter part 2 (05): 45,8F,00,0C,D2,3A,D0,08 */
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[7] = 0x45;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[6] = 0x8F;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[5] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[4] = 0x0C;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[3] = 0xD2;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[2] = 0x3A;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[1] = 0xD0;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[0] = 0x08;
/* Bytes for FRX-filter (08): 07,AA,E2,34,24,89,20,08 */
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[7] = 0x07;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[6] = 0xAA;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[5] = 0xE2;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[4] = 0x34;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[3] = 0x24;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[2] = 0x89;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[1] = 0x20;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[0] = 0x08;
/* Bytes for FRR-filter (07): 02,87,FA,37,9A,CA,B0,08 */
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[7] = 0x02;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[6] = 0x87;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[5] = 0xFA;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[4] = 0x37;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[3] = 0x9A;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[2] = 0xCA;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[1] = 0xB0;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[0] = 0x08;
/* Bytes for AX-filter (0A): 72,D5,DD,CA */
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[3] = 0x72;
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[2] = 0xD5;
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[1] = 0xDD;
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[0] = 0xCA;
/* Bytes for AR-filter (09): 72,42,13,4B */
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[3] = 0x72;
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[2] = 0x42;
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[1] = 0x13;
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[0] = 0x4B;
/* Bytes for TH-filter part 1 (00): 80,52,48,81,AD,80,00,98 */
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[7] = 0x80;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[6] = 0x52;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[5] = 0x48;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[4] = 0x81;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[3] = 0xAD;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[2] = 0x80;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[1] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[0] = 0x98;
/* Bytes for TH-filter part 2 (01): 02,42,5A,20,E8,1A,81,27 */
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[7] = 0x02;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[6] = 0x42;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[5] = 0x5A;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[4] = 0x20;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[3] = 0xE8;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[2] = 0x1A;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[1] = 0x81;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[0] = 0x27;
/* Bytes for TH-filter part 3 (02): 00,88,63,26,BD,4B,A3,C2 */
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[7] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[6] = 0x88;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[5] = 0x63;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[4] = 0x26;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[3] = 0xBD;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[2] = 0x4B;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[1] = 0xA3;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[0] = 0xC2;
/* ; (10K, 0.68uF) */
/* Bytes for Ringing part 1 (03):1B,3B,9B,BA,D4,1C,B3,23 */
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[7] = 0x1B;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[6] = 0x3B;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[5] = 0x9B;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[4] = 0xBA;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[3] = 0xD4;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[2] = 0x1C;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[1] = 0xB3;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[0] = 0x23;
/* Bytes for Ringing part 2 (06):13,42,A6,BA,D4,73,CA,D5 */
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[7] = 0x13;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[6] = 0x42;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[5] = 0xA6;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[4] = 0xBA;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[3] = 0xD4;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[2] = 0x73;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[1] = 0xCA;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[0] = 0xD5;
/* Levelmetering Ringing (0D):B2,45,0F,8E */
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[3] = 0xB2;
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[2] = 0x45;
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[1] = 0x0F;
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[0] = 0x8E;
/* Caller ID 1st Tone (0E):CA,0E,CA,09,99,99,99,99 */
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[7] = 0xCA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[6] = 0x0E;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[5] = 0xCA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[4] = 0x09;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[3] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[2] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[1] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[0] = 0x99;
/* Caller ID 2nd Tone (0F):FD,B5,BA,07,DA,00,00,00 */
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[7] = 0xFD;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[6] = 0xB5;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[5] = 0xBA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[4] = 0x07;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[3] = 0xDA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[2] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[1] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[0] = 0x00;
/* ;CR Registers */
/* Config. Reg. 0 (filters) (cr0):FF ; all Filters enabled, CLK from ext. source */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg = 0xFF;
/* Config. Reg. 1 (dialing) (cr1):05 ; Manual Ring, Ring metering enabled */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg = 0x05;
/* Config. Reg. 2 (caller ID) (cr2):04 ; Analog Gain 0dB, FSC internal */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg = 0x04;
/* Config. Reg. 3 (testloops) (cr3):00 ; SEL Bit==0, HP-enabled */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg = 0x00;
/* Config. Reg. 4 (analog gain) (cr4):02 */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = 0x02;
/* Config. Reg. 5 (Version) (cr5):02 */
/* Config. Reg. 6 (Reserved) (cr6):00 */
/* Config. Reg. 7 (Reserved) (cr7):00 */
/* ;xr Registers */
/* Ext. Reg. 0 (Interrupt Reg.) (xr0):02 */
j->m_DAAShadowRegs.XOP_xr0_W.reg = 0x02; /* SO_1 set to '1' because it is inverted. */
/* Ext. Reg. 1 (Interrupt enable) (xr1):1C ; Ring, CID, VDDOK Interrupts enabled */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr1.reg = 0x1C; /* RING, Caller ID, VDD_OK */
/* Ext. Reg. 2 (Cadence Time Out) (xr2):7D */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr2.reg = 0x7D;
/* Ext. Reg. 3 (DC Char) (xr3):32 ; B-Filter Off==1, U0=3.5V, R=200Ohm */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr3.reg = 0x32;
/* Ext. Reg. 4 (Cadence) (xr4):00 */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr4.reg = 0x00;
/* Ext. Reg. 5 (Ring timer) (xr5):22 */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr5.reg = 0x22;
/* Ext. Reg. 6 (Power State) (xr6):00 */
j->m_DAAShadowRegs.XOP_xr6_W.reg = 0x00;
/* Ext. Reg. 7 (Vdd) (xr7):40 ; VDD=4.25 V */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr7.reg = 0x40; /* 0x40 ??? Should it be 0x00? */
/* DTMF Tone 1 (0B): 11,B3,5A,2C ; 697 Hz */
/* 12,33,5A,C3 ; 770 Hz */
/* 13,3C,5B,32 ; 852 Hz */
/* 1D,1B,5C,CC ; 941 Hz */
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[3] = 0x11;
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[2] = 0xB3;
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[1] = 0x5A;
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[0] = 0x2C;
/* DTMF Tone 2 (0C): 32,32,52,B3 ; 1209 Hz */
/* EC,1D,52,22 ; 1336 Hz */
/* AA,AC,51,D2 ; 1477 Hz */
/* 9B,3B,51,25 ; 1633 Hz */
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[3] = 0x32;
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[2] = 0x32;
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[1] = 0x52;
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[0] = 0xB3;
}
static void DAA_Coeff_Australia(IXJ *j)
{
int i;
j->daa_country = DAA_AUSTRALIA;
/*----------------------------------------------- */
/* CAO */
for (i = 0; i < ALISDAA_CALLERID_SIZE; i++) {
j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID[i] = 0;
}
/* Bytes for IM-filter part 1 (04): 00,A3,AA,28,B3,82,D0,00 */
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[7] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[6] = 0xA3;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[5] = 0xAA;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[4] = 0x28;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[3] = 0xB3;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[2] = 0x82;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[1] = 0xD0;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[0] = 0x00;
/* Bytes for IM-filter part 2 (05): 70,96,00,09,32,6B,C0,08 */
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[7] = 0x70;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[6] = 0x96;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[5] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[4] = 0x09;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[3] = 0x32;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[2] = 0x6B;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[1] = 0xC0;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[0] = 0x08;
/* Bytes for FRX-filter (08): 07,96,E2,34,32,9B,30,08 */
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[7] = 0x07;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[6] = 0x96;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[5] = 0xE2;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[4] = 0x34;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[3] = 0x32;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[2] = 0x9B;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[1] = 0x30;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[0] = 0x08;
/* Bytes for FRR-filter (07): 0F,9A,E9,2F,22,CC,A0,08 */
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[7] = 0x0F;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[6] = 0x9A;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[5] = 0xE9;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[4] = 0x2F;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[3] = 0x22;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[2] = 0xCC;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[1] = 0xA0;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[0] = 0x08;
/* Bytes for AX-filter (0A): CB,45,DD,CA */
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[3] = 0xCB;
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[2] = 0x45;
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[1] = 0xDD;
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[0] = 0xCA;
/* Bytes for AR-filter (09): 1B,67,10,D6 */
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[3] = 0x1B;
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[2] = 0x67;
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[1] = 0x10;
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[0] = 0xD6;
/* Bytes for TH-filter part 1 (00): 80,52,48,81,AF,80,00,98 */
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[7] = 0x80;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[6] = 0x52;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[5] = 0x48;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[4] = 0x81;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[3] = 0xAF;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[2] = 0x80;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[1] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[0] = 0x98;
/* Bytes for TH-filter part 2 (01): 02,DB,52,B0,38,01,82,AC */
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[7] = 0x02;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[6] = 0xDB;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[5] = 0x52;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[4] = 0xB0;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[3] = 0x38;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[2] = 0x01;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[1] = 0x82;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[0] = 0xAC;
/* Bytes for TH-filter part 3 (02): 00,88,4A,3E,2C,3B,24,46 */
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[7] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[6] = 0x88;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[5] = 0x4A;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[4] = 0x3E;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[3] = 0x2C;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[2] = 0x3B;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[1] = 0x24;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[0] = 0x46;
/* ; idle */
/* Bytes for Ringing part 1 (03):1B,3C,93,3A,22,12,A3,23 */
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[7] = 0x1B;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[6] = 0x3C;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[5] = 0x93;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[4] = 0x3A;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[3] = 0x22;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[2] = 0x12;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[1] = 0xA3;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[0] = 0x23;
/* Bytes for Ringing part 2 (06):12,A2,A6,BA,22,7A,0A,D5 */
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[7] = 0x12;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[6] = 0xA2;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[5] = 0xA6;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[4] = 0xBA;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[3] = 0x22;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[2] = 0x7A;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[1] = 0x0A;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[0] = 0xD5;
/* Levelmetering Ringing (0D):32,45,B5,84 ; 50Hz 20V */
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[3] = 0x32;
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[2] = 0x45;
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[1] = 0xB5;
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[0] = 0x84;
/* Caller ID 1st Tone (0E):CA,0E,CA,09,99,99,99,99 */
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[7] = 0xCA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[6] = 0x0E;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[5] = 0xCA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[4] = 0x09;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[3] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[2] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[1] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[0] = 0x99;
/* Caller ID 2nd Tone (0F):FD,B5,BA,07,DA,00,00,00 */
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[7] = 0xFD;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[6] = 0xB5;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[5] = 0xBA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[4] = 0x07;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[3] = 0xDA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[2] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[1] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[0] = 0x00;
/* ;CR Registers */
/* Config. Reg. 0 (filters) (cr0):FF */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg = 0xFF;
/* Config. Reg. 1 (dialing) (cr1):05 */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg = 0x05;
/* Config. Reg. 2 (caller ID) (cr2):04 */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg = 0x04;
/* Config. Reg. 3 (testloops) (cr3):00 ; */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg = 0x00;
/* Config. Reg. 4 (analog gain) (cr4):02 */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = 0x02;
/* Config. Reg. 5 (Version) (cr5):02 */
/* Config. Reg. 6 (Reserved) (cr6):00 */
/* Config. Reg. 7 (Reserved) (cr7):00 */
/* ;xr Registers */
/* Ext. Reg. 0 (Interrupt Reg.) (xr0):02 */
j->m_DAAShadowRegs.XOP_xr0_W.reg = 0x02; /* SO_1 set to '1' because it is inverted. */
/* Ext. Reg. 1 (Interrupt enable) (xr1):1C */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr1.reg = 0x1C; /* RING, Caller ID, VDD_OK */
/* Ext. Reg. 2 (Cadence Time Out) (xr2):7D */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr2.reg = 0x7D;
/* Ext. Reg. 3 (DC Char) (xr3):2B ; */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr3.reg = 0x2B;
/* Ext. Reg. 4 (Cadence) (xr4):00 */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr4.reg = 0x00;
/* Ext. Reg. 5 (Ring timer) (xr5):22 */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr5.reg = 0x22;
/* Ext. Reg. 6 (Power State) (xr6):00 */
j->m_DAAShadowRegs.XOP_xr6_W.reg = 0x00;
/* Ext. Reg. 7 (Vdd) (xr7):40 */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr7.reg = 0x40; /* 0x40 ??? Should it be 0x00? */
/* DTMF Tone 1 (0B): 11,B3,5A,2C ; 697 Hz */
/* 12,33,5A,C3 ; 770 Hz */
/* 13,3C,5B,32 ; 852 Hz */
/* 1D,1B,5C,CC ; 941 Hz */
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[3] = 0x11;
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[2] = 0xB3;
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[1] = 0x5A;
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[0] = 0x2C;
/* DTMF Tone 2 (0C): 32,32,52,B3 ; 1209 Hz */
/* EC,1D,52,22 ; 1336 Hz */
/* AA,AC,51,D2 ; 1477 Hz */
/* 9B,3B,51,25 ; 1633 Hz */
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[3] = 0x32;
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[2] = 0x32;
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[1] = 0x52;
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[0] = 0xB3;
}
static void DAA_Coeff_Japan(IXJ *j)
{
int i;
j->daa_country = DAA_JAPAN;
/*----------------------------------------------- */
/* CAO */
for (i = 0; i < ALISDAA_CALLERID_SIZE; i++) {
j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID[i] = 0;
}
/* Bytes for IM-filter part 1 (04): 06,BD,E2,2D,BA,F9,A0,00 */
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[7] = 0x06;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[6] = 0xBD;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[5] = 0xE2;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[4] = 0x2D;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[3] = 0xBA;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[2] = 0xF9;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[1] = 0xA0;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[0] = 0x00;
/* Bytes for IM-filter part 2 (05): 6F,F7,00,0E,34,33,E0,08 */
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[7] = 0x6F;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[6] = 0xF7;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[5] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[4] = 0x0E;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[3] = 0x34;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[2] = 0x33;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[1] = 0xE0;
j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[0] = 0x08;
/* Bytes for FRX-filter (08): 02,8F,68,77,9C,58,F0,08 */
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[7] = 0x02;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[6] = 0x8F;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[5] = 0x68;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[4] = 0x77;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[3] = 0x9C;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[2] = 0x58;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[1] = 0xF0;
j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[0] = 0x08;
/* Bytes for FRR-filter (07): 03,8F,38,73,87,EA,20,08 */
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[7] = 0x03;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[6] = 0x8F;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[5] = 0x38;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[4] = 0x73;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[3] = 0x87;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[2] = 0xEA;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[1] = 0x20;
j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[0] = 0x08;
/* Bytes for AX-filter (0A): 51,C5,DD,CA */
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[3] = 0x51;
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[2] = 0xC5;
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[1] = 0xDD;
j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[0] = 0xCA;
/* Bytes for AR-filter (09): 25,A7,10,D6 */
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[3] = 0x25;
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[2] = 0xA7;
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[1] = 0x10;
j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[0] = 0xD6;
/* Bytes for TH-filter part 1 (00): 00,42,48,81,AE,80,00,98 */
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[7] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[6] = 0x42;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[5] = 0x48;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[4] = 0x81;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[3] = 0xAE;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[2] = 0x80;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[1] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[0] = 0x98;
/* Bytes for TH-filter part 2 (01): 02,AB,2A,20,99,5B,89,28 */
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[7] = 0x02;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[6] = 0xAB;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[5] = 0x2A;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[4] = 0x20;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[3] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[2] = 0x5B;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[1] = 0x89;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[0] = 0x28;
/* Bytes for TH-filter part 3 (02): 00,88,DA,25,34,C5,4C,BA */
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[7] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[6] = 0x88;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[5] = 0xDA;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[4] = 0x25;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[3] = 0x34;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[2] = 0xC5;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[1] = 0x4C;
j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[0] = 0xBA;
/* ; idle */
/* Bytes for Ringing part 1 (03):1B,3C,93,3A,22,12,A3,23 */
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[7] = 0x1B;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[6] = 0x3C;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[5] = 0x93;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[4] = 0x3A;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[3] = 0x22;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[2] = 0x12;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[1] = 0xA3;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[0] = 0x23;
/* Bytes for Ringing part 2 (06):12,A2,A6,BA,22,7A,0A,D5 */
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[7] = 0x12;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[6] = 0xA2;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[5] = 0xA6;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[4] = 0xBA;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[3] = 0x22;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[2] = 0x7A;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[1] = 0x0A;
j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[0] = 0xD5;
/* Levelmetering Ringing (0D):AA,35,0F,8E ; 25Hz 30V ????????? */
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[3] = 0xAA;
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[2] = 0x35;
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[1] = 0x0F;
j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[0] = 0x8E;
/* Caller ID 1st Tone (0E):CA,0E,CA,09,99,99,99,99 */
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[7] = 0xCA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[6] = 0x0E;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[5] = 0xCA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[4] = 0x09;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[3] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[2] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[1] = 0x99;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[0] = 0x99;
/* Caller ID 2nd Tone (0F):FD,B5,BA,07,DA,00,00,00 */
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[7] = 0xFD;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[6] = 0xB5;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[5] = 0xBA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[4] = 0x07;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[3] = 0xDA;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[2] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[1] = 0x00;
j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[0] = 0x00;
/* ;CR Registers */
/* Config. Reg. 0 (filters) (cr0):FF */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg = 0xFF;
/* Config. Reg. 1 (dialing) (cr1):05 */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg = 0x05;
/* Config. Reg. 2 (caller ID) (cr2):04 */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg = 0x04;
/* Config. Reg. 3 (testloops) (cr3):00 ; */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg = 0x00;
/* Config. Reg. 4 (analog gain) (cr4):02 */
j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = 0x02;
/* Config. Reg. 5 (Version) (cr5):02 */
/* Config. Reg. 6 (Reserved) (cr6):00 */
/* Config. Reg. 7 (Reserved) (cr7):00 */
/* ;xr Registers */
/* Ext. Reg. 0 (Interrupt Reg.) (xr0):02 */
j->m_DAAShadowRegs.XOP_xr0_W.reg = 0x02; /* SO_1 set to '1' because it is inverted. */
/* Ext. Reg. 1 (Interrupt enable) (xr1):1C */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr1.reg = 0x1C; /* RING, Caller ID, VDD_OK */
/* Ext. Reg. 2 (Cadence Time Out) (xr2):7D */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr2.reg = 0x7D;
/* Ext. Reg. 3 (DC Char) (xr3):22 ; */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr3.reg = 0x22;
/* Ext. Reg. 4 (Cadence) (xr4):00 */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr4.reg = 0x00;
/* Ext. Reg. 5 (Ring timer) (xr5):22 */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr5.reg = 0x22;
/* Ext. Reg. 6 (Power State) (xr6):00 */
j->m_DAAShadowRegs.XOP_xr6_W.reg = 0x00;
/* Ext. Reg. 7 (Vdd) (xr7):40 */
j->m_DAAShadowRegs.XOP_REGS.XOP.xr7.reg = 0x40; /* 0x40 ??? Should it be 0x00? */
/* DTMF Tone 1 (0B): 11,B3,5A,2C ; 697 Hz */
/* 12,33,5A,C3 ; 770 Hz */
/* 13,3C,5B,32 ; 852 Hz */
/* 1D,1B,5C,CC ; 941 Hz */
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[3] = 0x11;
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[2] = 0xB3;
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[1] = 0x5A;
j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[0] = 0x2C;
/* DTMF Tone 2 (0C): 32,32,52,B3 ; 1209 Hz */
/* EC,1D,52,22 ; 1336 Hz */
/* AA,AC,51,D2 ; 1477 Hz */
/* 9B,3B,51,25 ; 1633 Hz */
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[3] = 0x32;
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[2] = 0x32;
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[1] = 0x52;
j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[0] = 0xB3;
}
static s16 tone_table[][19] =
{
{ /* f20_50[] 11 */
32538, /* A1 = 1.985962 */
-32325, /* A2 = -0.986511 */
-343, /* B2 = -0.010493 */
0, /* B1 = 0 */
343, /* B0 = 0.010493 */
32619, /* A1 = 1.990906 */
-32520, /* A2 = -0.992462 */
19179, /* B2 = 0.585327 */
-19178, /* B1 = -1.170593 */
19179, /* B0 = 0.585327 */
32723, /* A1 = 1.997314 */
-32686, /* A2 = -0.997528 */
9973, /* B2 = 0.304352 */
-9955, /* B1 = -0.607605 */
9973, /* B0 = 0.304352 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f133_200[] 12 */
32072, /* A1 = 1.95752 */
-31896, /* A2 = -0.973419 */
-435, /* B2 = -0.013294 */
0, /* B1 = 0 */
435, /* B0 = 0.013294 */
32188, /* A1 = 1.9646 */
-32400, /* A2 = -0.98877 */
15139, /* B2 = 0.462036 */
-14882, /* B1 = -0.908356 */
15139, /* B0 = 0.462036 */
32473, /* A1 = 1.981995 */
-32524, /* A2 = -0.992584 */
23200, /* B2 = 0.708008 */
-23113, /* B1 = -1.410706 */
23200, /* B0 = 0.708008 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f300 13 */
31769, /* A1 = -1.939026 */
-32584, /* A2 = 0.994385 */
-475, /* B2 = -0.014522 */
0, /* B1 = 0.000000 */
475, /* B0 = 0.014522 */
31789, /* A1 = -1.940247 */
-32679, /* A2 = 0.997284 */
17280, /* B2 = 0.527344 */
-16865, /* B1 = -1.029358 */
17280, /* B0 = 0.527344 */
31841, /* A1 = -1.943481 */
-32681, /* A2 = 0.997345 */
543, /* B2 = 0.016579 */
-525, /* B1 = -0.032097 */
543, /* B0 = 0.016579 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f300_420[] 14 */
30750, /* A1 = 1.876892 */
-31212, /* A2 = -0.952515 */
-804, /* B2 = -0.024541 */
0, /* B1 = 0 */
804, /* B0 = 0.024541 */
30686, /* A1 = 1.872925 */
-32145, /* A2 = -0.980988 */
14747, /* B2 = 0.450043 */
-13703, /* B1 = -0.836395 */
14747, /* B0 = 0.450043 */
31651, /* A1 = 1.931824 */
-32321, /* A2 = -0.986389 */
24425, /* B2 = 0.745422 */
-23914, /* B1 = -1.459595 */
24427, /* B0 = 0.745483 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f330 15 */
31613, /* A1 = -1.929565 */
-32646, /* A2 = 0.996277 */
-185, /* B2 = -0.005657 */
0, /* B1 = 0.000000 */
185, /* B0 = 0.005657 */
31620, /* A1 = -1.929932 */
-32713, /* A2 = 0.998352 */
19253, /* B2 = 0.587585 */
-18566, /* B1 = -1.133179 */
19253, /* B0 = 0.587585 */
31674, /* A1 = -1.933228 */
-32715, /* A2 = 0.998413 */
2575, /* B2 = 0.078590 */
-2495, /* B1 = -0.152283 */
2575, /* B0 = 0.078590 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f300_425[] 16 */
30741, /* A1 = 1.876282 */
-31475, /* A2 = -0.960541 */
-703, /* B2 = -0.021484 */
0, /* B1 = 0 */
703, /* B0 = 0.021484 */
30688, /* A1 = 1.873047 */
-32248, /* A2 = -0.984161 */
14542, /* B2 = 0.443787 */
-13523, /* B1 = -0.825439 */
14542, /* B0 = 0.443817 */
31494, /* A1 = 1.922302 */
-32366, /* A2 = -0.987762 */
21577, /* B2 = 0.658508 */
-21013, /* B1 = -1.282532 */
21577, /* B0 = 0.658508 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f330_440[] 17 */
30627, /* A1 = 1.869324 */
-31338, /* A2 = -0.95636 */
-843, /* B2 = -0.025749 */
0, /* B1 = 0 */
843, /* B0 = 0.025749 */
30550, /* A1 = 1.864685 */
-32221, /* A2 = -0.983337 */
13594, /* B2 = 0.414886 */
-12589, /* B1 = -0.768402 */
13594, /* B0 = 0.414886 */
31488, /* A1 = 1.921936 */
-32358, /* A2 = -0.987518 */
24684, /* B2 = 0.753296 */
-24029, /* B1 = -1.466614 */
24684, /* B0 = 0.753296 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f340 18 */
31546, /* A1 = -1.925476 */
-32646, /* A2 = 0.996277 */
-445, /* B2 = -0.013588 */
0, /* B1 = 0.000000 */
445, /* B0 = 0.013588 */
31551, /* A1 = -1.925781 */
-32713, /* A2 = 0.998352 */
23884, /* B2 = 0.728882 */
-22979, /* B1 = -1.402527 */
23884, /* B0 = 0.728882 */
31606, /* A1 = -1.929138 */
-32715, /* A2 = 0.998413 */
863, /* B2 = 0.026367 */
-835, /* B1 = -0.050985 */
863, /* B0 = 0.026367 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f350_400[] 19 */
31006, /* A1 = 1.892517 */
-32029, /* A2 = -0.977448 */
-461, /* B2 = -0.014096 */
0, /* B1 = 0 */
461, /* B0 = 0.014096 */
30999, /* A1 = 1.892029 */
-32487, /* A2 = -0.991455 */
11325, /* B2 = 0.345612 */
-10682, /* B1 = -0.651978 */
11325, /* B0 = 0.345612 */
31441, /* A1 = 1.919067 */
-32526, /* A2 = -0.992615 */
24324, /* B2 = 0.74231 */
-23535, /* B1 = -1.436523 */
24324, /* B0 = 0.74231 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f350_440[] */
30634, /* A1 = 1.869751 */
-31533, /* A2 = -0.962341 */
-680, /* B2 = -0.020782 */
0, /* B1 = 0 */
680, /* B0 = 0.020782 */
30571, /* A1 = 1.865906 */
-32277, /* A2 = -0.985016 */
12894, /* B2 = 0.393524 */
-11945, /* B1 = -0.729065 */
12894, /* B0 = 0.393524 */
31367, /* A1 = 1.91449 */
-32379, /* A2 = -0.988129 */
23820, /* B2 = 0.726929 */
-23104, /* B1 = -1.410217 */
23820, /* B0 = 0.726929 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f350_450[] */
30552, /* A1 = 1.864807 */
-31434, /* A2 = -0.95929 */
-690, /* B2 = -0.021066 */
0, /* B1 = 0 */
690, /* B0 = 0.021066 */
30472, /* A1 = 1.859924 */
-32248, /* A2 = -0.984161 */
13385, /* B2 = 0.408478 */
-12357, /* B1 = -0.754242 */
13385, /* B0 = 0.408478 */
31358, /* A1 = 1.914001 */
-32366, /* A2 = -0.987732 */
26488, /* B2 = 0.80835 */
-25692, /* B1 = -1.568176 */
26490, /* B0 = 0.808411 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f360 */
31397, /* A1 = -1.916321 */
-32623, /* A2 = 0.995605 */
-117, /* B2 = -0.003598 */
0, /* B1 = 0.000000 */
117, /* B0 = 0.003598 */
31403, /* A1 = -1.916687 */
-32700, /* A2 = 0.997925 */
3388, /* B2 = 0.103401 */
-3240, /* B1 = -0.197784 */
3388, /* B0 = 0.103401 */
31463, /* A1 = -1.920410 */
-32702, /* A2 = 0.997986 */
13346, /* B2 = 0.407288 */
-12863, /* B1 = -0.785126 */
13346, /* B0 = 0.407288 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f380_420[] */
30831, /* A1 = 1.881775 */
-32064, /* A2 = -0.978546 */
-367, /* B2 = -0.01122 */
0, /* B1 = 0 */
367, /* B0 = 0.01122 */
30813, /* A1 = 1.880737 */
-32456, /* A2 = -0.990509 */
11068, /* B2 = 0.337769 */
-10338, /* B1 = -0.631042 */
11068, /* B0 = 0.337769 */
31214, /* A1 = 1.905212 */
-32491, /* A2 = -0.991577 */
16374, /* B2 = 0.499695 */
-15781, /* B1 = -0.963196 */
16374, /* B0 = 0.499695 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f392 */
31152, /* A1 = -1.901428 */
-32613, /* A2 = 0.995300 */
-314, /* B2 = -0.009605 */
0, /* B1 = 0.000000 */
314, /* B0 = 0.009605 */
31156, /* A1 = -1.901672 */
-32694, /* A2 = 0.997742 */
28847, /* B2 = 0.880371 */
-2734, /* B1 = -0.166901 */
28847, /* B0 = 0.880371 */
31225, /* A1 = -1.905823 */
-32696, /* A2 = 0.997803 */
462, /* B2 = 0.014108 */
-442, /* B1 = -0.027019 */
462, /* B0 = 0.014108 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f400_425[] */
30836, /* A1 = 1.882141 */
-32296, /* A2 = -0.985596 */
-324, /* B2 = -0.009903 */
0, /* B1 = 0 */
324, /* B0 = 0.009903 */
30825, /* A1 = 1.881409 */
-32570, /* A2 = -0.993958 */
16847, /* B2 = 0.51416 */
-15792, /* B1 = -0.963898 */
16847, /* B0 = 0.51416 */
31106, /* A1 = 1.89856 */
-32584, /* A2 = -0.994415 */
9579, /* B2 = 0.292328 */
-9164, /* B1 = -0.559357 */
9579, /* B0 = 0.292328 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f400_440[] */
30702, /* A1 = 1.873962 */
-32134, /* A2 = -0.980682 */
-517, /* B2 = -0.015793 */
0, /* B1 = 0 */
517, /* B0 = 0.015793 */
30676, /* A1 = 1.872375 */
-32520, /* A2 = -0.992462 */
8144, /* B2 = 0.24855 */
-7596, /* B1 = -0.463684 */
8144, /* B0 = 0.24855 */
31084, /* A1 = 1.897217 */
-32547, /* A2 = -0.993256 */
22713, /* B2 = 0.693176 */
-21734, /* B1 = -1.326599 */
22713, /* B0 = 0.693176 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f400_450[] */
30613, /* A1 = 1.86853 */
-32031, /* A2 = -0.977509 */
-618, /* B2 = -0.018866 */
0, /* B1 = 0 */
618, /* B0 = 0.018866 */
30577, /* A1 = 1.866272 */
-32491, /* A2 = -0.991577 */
9612, /* B2 = 0.293335 */
-8935, /* B1 = -0.54541 */
9612, /* B0 = 0.293335 */
31071, /* A1 = 1.896484 */
-32524, /* A2 = -0.992584 */
21596, /* B2 = 0.659058 */
-20667, /* B1 = -1.261414 */
21596, /* B0 = 0.659058 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f420 */
30914, /* A1 = -1.886841 */
-32584, /* A2 = 0.994385 */
-426, /* B2 = -0.013020 */
0, /* B1 = 0.000000 */
426, /* B0 = 0.013020 */
30914, /* A1 = -1.886841 */
-32679, /* A2 = 0.997314 */
17520, /* B2 = 0.534668 */
-16471, /* B1 = -1.005310 */
17520, /* B0 = 0.534668 */
31004, /* A1 = -1.892334 */
-32683, /* A2 = 0.997406 */
819, /* B2 = 0.025023 */
-780, /* B1 = -0.047619 */
819, /* B0 = 0.025023 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
#if 0
{ /* f425 */
30881, /* A1 = -1.884827 */
-32603, /* A2 = 0.994965 */
-496, /* B2 = -0.015144 */
0, /* B1 = 0.000000 */
496, /* B0 = 0.015144 */
30880, /* A1 = -1.884766 */
-32692, /* A2 = 0.997711 */
24767, /* B2 = 0.755859 */
-23290, /* B1 = -1.421509 */
24767, /* B0 = 0.755859 */
30967, /* A1 = -1.890076 */
-32694, /* A2 = 0.997772 */
728, /* B2 = 0.022232 */
-691, /* B1 = -0.042194 */
728, /* B0 = 0.022232 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
#else
{
30850,
-32534,
-504,
0,
504,
30831,
-32669,
24303,
-22080,
24303,
30994,
-32673,
1905,
-1811,
1905,
5,
129,
17,
0xff5
},
#endif
{ /* f425_450[] */
30646, /* A1 = 1.870544 */
-32327, /* A2 = -0.986572 */
-287, /* B2 = -0.008769 */
0, /* B1 = 0 */
287, /* B0 = 0.008769 */
30627, /* A1 = 1.869324 */
-32607, /* A2 = -0.995087 */
13269, /* B2 = 0.404968 */
-12376, /* B1 = -0.755432 */
13269, /* B0 = 0.404968 */
30924, /* A1 = 1.887512 */
-32619, /* A2 = -0.995453 */
19950, /* B2 = 0.608826 */
-18940, /* B1 = -1.156006 */
19950, /* B0 = 0.608826 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f425_475[] */
30396, /* A1 = 1.855225 */
-32014, /* A2 = -0.97699 */
-395, /* B2 = -0.012055 */
0, /* B1 = 0 */
395, /* B0 = 0.012055 */
30343, /* A1 = 1.85199 */
-32482, /* A2 = -0.991302 */
17823, /* B2 = 0.543945 */
-16431, /* B1 = -1.002869 */
17823, /* B0 = 0.543945 */
30872, /* A1 = 1.884338 */
-32516, /* A2 = -0.99231 */
18124, /* B2 = 0.553101 */
-17246, /* B1 = -1.052673 */
18124, /* B0 = 0.553101 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f435 */
30796, /* A1 = -1.879639 */
-32603, /* A2 = 0.994965 */
-254, /* B2 = -0.007762 */
0, /* B1 = 0.000000 */
254, /* B0 = 0.007762 */
30793, /* A1 = -1.879456 */
-32692, /* A2 = 0.997711 */
18934, /* B2 = 0.577820 */
-17751, /* B1 = -1.083496 */
18934, /* B0 = 0.577820 */
30882, /* A1 = -1.884888 */
-32694, /* A2 = 0.997772 */
1858, /* B2 = 0.056713 */
-1758, /* B1 = -0.107357 */
1858, /* B0 = 0.056713 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f440_450[] */
30641, /* A1 = 1.870239 */
-32458, /* A2 = -0.99057 */
-155, /* B2 = -0.004735 */
0, /* B1 = 0 */
155, /* B0 = 0.004735 */
30631, /* A1 = 1.869568 */
-32630, /* A2 = -0.995789 */
11453, /* B2 = 0.349548 */
-10666, /* B1 = -0.651001 */
11453, /* B0 = 0.349548 */
30810, /* A1 = 1.880554 */
-32634, /* A2 = -0.995941 */
12237, /* B2 = 0.373474 */
-11588, /* B1 = -0.707336 */
12237, /* B0 = 0.373474 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f440_480[] */
30367, /* A1 = 1.853455 */
-32147, /* A2 = -0.981079 */
-495, /* B2 = -0.015113 */
0, /* B1 = 0 */
495, /* B0 = 0.015113 */
30322, /* A1 = 1.850769 */
-32543, /* A2 = -0.993134 */
10031, /* B2 = 0.306152 */
-9252, /* B1 = -0.564728 */
10031, /* B0 = 0.306152 */
30770, /* A1 = 1.878052 */
-32563, /* A2 = -0.993774 */
22674, /* B2 = 0.691956 */
-21465, /* B1 = -1.31012 */
22674, /* B0 = 0.691956 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f445 */
30709, /* A1 = -1.874329 */
-32603, /* A2 = 0.994965 */
-83, /* B2 = -0.002545 */
0, /* B1 = 0.000000 */
83, /* B0 = 0.002545 */
30704, /* A1 = -1.874084 */
-32692, /* A2 = 0.997711 */
10641, /* B2 = 0.324738 */
-9947, /* B1 = -0.607147 */
10641, /* B0 = 0.324738 */
30796, /* A1 = -1.879639 */
-32694, /* A2 = 0.997772 */
10079, /* B2 = 0.307587 */
9513, /* B1 = 0.580688 */
10079, /* B0 = 0.307587 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f450 */
30664, /* A1 = -1.871643 */
-32603, /* A2 = 0.994965 */
-164, /* B2 = -0.005029 */
0, /* B1 = 0.000000 */
164, /* B0 = 0.005029 */
30661, /* A1 = -1.871399 */
-32692, /* A2 = 0.997711 */
15294, /* B2 = 0.466736 */
-14275, /* B1 = -0.871307 */
15294, /* B0 = 0.466736 */
30751, /* A1 = -1.876953 */
-32694, /* A2 = 0.997772 */
3548, /* B2 = 0.108284 */
-3344, /* B1 = -0.204155 */
3548, /* B0 = 0.108284 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f452 */
30653, /* A1 = -1.870911 */
-32615, /* A2 = 0.995361 */
-209, /* B2 = -0.006382 */
0, /* B1 = 0.000000 */
209, /* B0 = 0.006382 */
30647, /* A1 = -1.870605 */
-32702, /* A2 = 0.997986 */
18971, /* B2 = 0.578979 */
-17716, /* B1 = -1.081299 */
18971, /* B0 = 0.578979 */
30738, /* A1 = -1.876099 */
-32702, /* A2 = 0.998016 */
2967, /* B2 = 0.090561 */
-2793, /* B1 = -0.170502 */
2967, /* B0 = 0.090561 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f475 */
30437, /* A1 = -1.857727 */
-32603, /* A2 = 0.994965 */
-264, /* B2 = -0.008062 */
0, /* B1 = 0.000000 */
264, /* B0 = 0.008062 */
30430, /* A1 = -1.857300 */
-32692, /* A2 = 0.997711 */
21681, /* B2 = 0.661682 */
-20082, /* B1 = -1.225708 */
21681, /* B0 = 0.661682 */
30526, /* A1 = -1.863220 */
-32694, /* A2 = 0.997742 */
1559, /* B2 = 0.047600 */
-1459, /* B1 = -0.089096 */
1559, /* B0 = 0.047600 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f480_620[] */
28975, /* A1 = 1.768494 */
-30955, /* A2 = -0.944672 */
-1026, /* B2 = -0.03133 */
0, /* B1 = 0 */
1026, /* B0 = 0.03133 */
28613, /* A1 = 1.746399 */
-32089, /* A2 = -0.979309 */
14214, /* B2 = 0.433807 */
-12202, /* B1 = -0.744812 */
14214, /* B0 = 0.433807 */
30243, /* A1 = 1.845947 */
-32238, /* A2 = -0.983856 */
24825, /* B2 = 0.757629 */
-23402, /* B1 = -1.428345 */
24825, /* B0 = 0.757629 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f494 */
30257, /* A1 = -1.846741 */
-32605, /* A2 = 0.995056 */
-249, /* B2 = -0.007625 */
0, /* B1 = 0.000000 */
249, /* B0 = 0.007625 */
30247, /* A1 = -1.846191 */
-32694, /* A2 = 0.997772 */
18088, /* B2 = 0.552002 */
-16652, /* B1 = -1.016418 */
18088, /* B0 = 0.552002 */
30348, /* A1 = -1.852295 */
-32696, /* A2 = 0.997803 */
2099, /* B2 = 0.064064 */
-1953, /* B1 = -0.119202 */
2099, /* B0 = 0.064064 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f500 */
30202, /* A1 = -1.843431 */
-32624, /* A2 = 0.995622 */
-413, /* B2 = -0.012622 */
0, /* B1 = 0.000000 */
413, /* B0 = 0.012622 */
30191, /* A1 = -1.842721 */
-32714, /* A2 = 0.998364 */
25954, /* B2 = 0.792057 */
-23890, /* B1 = -1.458131 */
25954, /* B0 = 0.792057 */
30296, /* A1 = -1.849172 */
-32715, /* A2 = 0.998397 */
2007, /* B2 = 0.061264 */
-1860, /* B1 = -0.113568 */
2007, /* B0 = 0.061264 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f520 */
30001, /* A1 = -1.831116 */
-32613, /* A2 = 0.995270 */
-155, /* B2 = -0.004750 */
0, /* B1 = 0.000000 */
155, /* B0 = 0.004750 */
29985, /* A1 = -1.830200 */
-32710, /* A2 = 0.998260 */
6584, /* B2 = 0.200928 */
-6018, /* B1 = -0.367355 */
6584, /* B0 = 0.200928 */
30105, /* A1 = -1.837524 */
-32712, /* A2 = 0.998291 */
23812, /* B2 = 0.726685 */
-21936, /* B1 = -1.338928 */
23812, /* B0 = 0.726685 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f523 */
29964, /* A1 = -1.828918 */
-32601, /* A2 = 0.994904 */
-101, /* B2 = -0.003110 */
0, /* B1 = 0.000000 */
101, /* B0 = 0.003110 */
29949, /* A1 = -1.827942 */
-32700, /* A2 = 0.997925 */
11041, /* B2 = 0.336975 */
-10075, /* B1 = -0.614960 */
11041, /* B0 = 0.336975 */
30070, /* A1 = -1.835388 */
-32702, /* A2 = 0.997986 */
16762, /* B2 = 0.511536 */
-15437, /* B1 = -0.942230 */
16762, /* B0 = 0.511536 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f525 */
29936, /* A1 = -1.827209 */
-32584, /* A2 = 0.994415 */
-91, /* B2 = -0.002806 */
0, /* B1 = 0.000000 */
91, /* B0 = 0.002806 */
29921, /* A1 = -1.826233 */
-32688, /* A2 = 0.997559 */
11449, /* B2 = 0.349396 */
-10426, /* B1 = -0.636383 */
11449, /* B0 = 0.349396 */
30045, /* A1 = -1.833862 */
-32688, /* A2 = 0.997589 */
13055, /* B2 = 0.398407 */
-12028, /* B1 = -0.734161 */
13055, /* B0 = 0.398407 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f540_660[] */
28499, /* A1 = 1.739441 */
-31129, /* A2 = -0.949982 */
-849, /* B2 = -0.025922 */
0, /* B1 = 0 */
849, /* B0 = 0.025922 */
28128, /* A1 = 1.716797 */
-32130, /* A2 = -0.98056 */
14556, /* B2 = 0.444214 */
-12251, /* B1 = -0.747772 */
14556, /* B0 = 0.444244 */
29667, /* A1 = 1.81073 */
-32244, /* A2 = -0.984039 */
23038, /* B2 = 0.703064 */
-21358, /* B1 = -1.303589 */
23040, /* B0 = 0.703125 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f587 */
29271, /* A1 = -1.786560 */
-32599, /* A2 = 0.994873 */
-490, /* B2 = -0.014957 */
0, /* B1 = 0.000000 */
490, /* B0 = 0.014957 */
29246, /* A1 = -1.785095 */
-32700, /* A2 = 0.997925 */
28961, /* B2 = 0.883850 */
-25796, /* B1 = -1.574463 */
28961, /* B0 = 0.883850 */
29383, /* A1 = -1.793396 */
-32700, /* A2 = 0.997955 */
1299, /* B2 = 0.039650 */
-1169, /* B1 = -0.071396 */
1299, /* B0 = 0.039650 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f590 */
29230, /* A1 = -1.784058 */
-32584, /* A2 = 0.994415 */
-418, /* B2 = -0.012757 */
0, /* B1 = 0.000000 */
418, /* B0 = 0.012757 */
29206, /* A1 = -1.782593 */
-32688, /* A2 = 0.997559 */
36556, /* B2 = 1.115601 */
-32478, /* B1 = -1.982300 */
36556, /* B0 = 1.115601 */
29345, /* A1 = -1.791077 */
-32688, /* A2 = 0.997589 */
897, /* B2 = 0.027397 */
-808, /* B1 = -0.049334 */
897, /* B0 = 0.027397 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f600 */
29116, /* A1 = -1.777100 */
-32603, /* A2 = 0.994965 */
-165, /* B2 = -0.005039 */
0, /* B1 = 0.000000 */
165, /* B0 = 0.005039 */
29089, /* A1 = -1.775452 */
-32708, /* A2 = 0.998199 */
6963, /* B2 = 0.212494 */
-6172, /* B1 = -0.376770 */
6963, /* B0 = 0.212494 */
29237, /* A1 = -1.784485 */
-32710, /* A2 = 0.998230 */
24197, /* B2 = 0.738464 */
-21657, /* B1 = -1.321899 */
24197, /* B0 = 0.738464 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f660 */
28376, /* A1 = -1.731934 */
-32567, /* A2 = 0.993896 */
-363, /* B2 = -0.011102 */
0, /* B1 = 0.000000 */
363, /* B0 = 0.011102 */
28337, /* A1 = -1.729614 */
-32683, /* A2 = 0.997434 */
21766, /* B2 = 0.664246 */
-18761, /* B1 = -1.145081 */
21766, /* B0 = 0.664246 */
28513, /* A1 = -1.740356 */
-32686, /* A2 = 0.997498 */
2509, /* B2 = 0.076584 */
-2196, /* B1 = -0.134041 */
2509, /* B0 = 0.076584 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f700 */
27844, /* A1 = -1.699463 */
-32563, /* A2 = 0.993744 */
-366, /* B2 = -0.011187 */
0, /* B1 = 0.000000 */
366, /* B0 = 0.011187 */
27797, /* A1 = -1.696655 */
-32686, /* A2 = 0.997498 */
22748, /* B2 = 0.694214 */
-19235, /* B1 = -1.174072 */
22748, /* B0 = 0.694214 */
27995, /* A1 = -1.708740 */
-32688, /* A2 = 0.997559 */
2964, /* B2 = 0.090477 */
-2546, /* B1 = -0.155449 */
2964, /* B0 = 0.090477 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f740 */
27297, /* A1 = -1.666077 */
-32551, /* A2 = 0.993408 */
-345, /* B2 = -0.010540 */
0, /* B1 = 0.000000 */
345, /* B0 = 0.010540 */
27240, /* A1 = -1.662598 */
-32683, /* A2 = 0.997406 */
22560, /* B2 = 0.688477 */
-18688, /* B1 = -1.140625 */
22560, /* B0 = 0.688477 */
27461, /* A1 = -1.676147 */
-32684, /* A2 = 0.997467 */
3541, /* B2 = 0.108086 */
-2985, /* B1 = -0.182220 */
3541, /* B0 = 0.108086 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f750 */
27155, /* A1 = -1.657410 */
-32551, /* A2 = 0.993408 */
-462, /* B2 = -0.014117 */
0, /* B1 = 0.000000 */
462, /* B0 = 0.014117 */
27097, /* A1 = -1.653870 */
-32683, /* A2 = 0.997406 */
32495, /* B2 = 0.991699 */
-26776, /* B1 = -1.634338 */
32495, /* B0 = 0.991699 */
27321, /* A1 = -1.667542 */
-32684, /* A2 = 0.997467 */
1835, /* B2 = 0.056007 */
-1539, /* B1 = -0.093948 */
1835, /* B0 = 0.056007 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f750_1450[] */
19298, /* A1 = 1.177917 */
-24471, /* A2 = -0.746796 */
-4152, /* B2 = -0.126709 */
0, /* B1 = 0 */
4152, /* B0 = 0.126709 */
12902, /* A1 = 0.787476 */
-29091, /* A2 = -0.887817 */
12491, /* B2 = 0.38121 */
-1794, /* B1 = -0.109528 */
12494, /* B0 = 0.381317 */
26291, /* A1 = 1.604736 */
-30470, /* A2 = -0.929901 */
28859, /* B2 = 0.880737 */
-26084, /* B1 = -1.592102 */
28861, /* B0 = 0.880798 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f770 */
26867, /* A1 = -1.639832 */
-32551, /* A2 = 0.993408 */
-123, /* B2 = -0.003755 */
0, /* B1 = 0.000000 */
123, /* B0 = 0.003755 */
26805, /* A1 = -1.636108 */
-32683, /* A2 = 0.997406 */
17297, /* B2 = 0.527863 */
-14096, /* B1 = -0.860382 */
17297, /* B0 = 0.527863 */
27034, /* A1 = -1.650085 */
-32684, /* A2 = 0.997467 */
12958, /* B2 = 0.395477 */
-10756, /* B1 = -0.656525 */
12958, /* B0 = 0.395477 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f800 */
26413, /* A1 = -1.612122 */
-32547, /* A2 = 0.993286 */
-223, /* B2 = -0.006825 */
0, /* B1 = 0.000000 */
223, /* B0 = 0.006825 */
26342, /* A1 = -1.607849 */
-32686, /* A2 = 0.997498 */
6391, /* B2 = 0.195053 */
-5120, /* B1 = -0.312531 */
6391, /* B0 = 0.195053 */
26593, /* A1 = -1.623108 */
-32688, /* A2 = 0.997559 */
23681, /* B2 = 0.722717 */
-19328, /* B1 = -1.179688 */
23681, /* B0 = 0.722717 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f816 */
26168, /* A1 = -1.597209 */
-32528, /* A2 = 0.992706 */
-235, /* B2 = -0.007182 */
0, /* B1 = 0.000000 */
235, /* B0 = 0.007182 */
26092, /* A1 = -1.592590 */
-32675, /* A2 = 0.997192 */
20823, /* B2 = 0.635498 */
-16510, /* B1 = -1.007751 */
20823, /* B0 = 0.635498 */
26363, /* A1 = -1.609070 */
-32677, /* A2 = 0.997253 */
6739, /* B2 = 0.205688 */
-5459, /* B1 = -0.333206 */
6739, /* B0 = 0.205688 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f850 */
25641, /* A1 = -1.565063 */
-32536, /* A2 = 0.992950 */
-121, /* B2 = -0.003707 */
0, /* B1 = 0.000000 */
121, /* B0 = 0.003707 */
25560, /* A1 = -1.560059 */
-32684, /* A2 = 0.997437 */
18341, /* B2 = 0.559753 */
-14252, /* B1 = -0.869904 */
18341, /* B0 = 0.559753 */
25837, /* A1 = -1.577026 */
-32684, /* A2 = 0.997467 */
16679, /* B2 = 0.509003 */
-13232, /* B1 = -0.807648 */
16679, /* B0 = 0.509003 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f857_1645[] */
16415, /* A1 = 1.001953 */
-23669, /* A2 = -0.722321 */
-4549, /* B2 = -0.138847 */
0, /* B1 = 0 */
4549, /* B0 = 0.138847 */
8456, /* A1 = 0.516174 */
-28996, /* A2 = -0.884918 */
13753, /* B2 = 0.419724 */
-12, /* B1 = -0.000763 */
13757, /* B0 = 0.419846 */
24632, /* A1 = 1.503418 */
-30271, /* A2 = -0.923828 */
29070, /* B2 = 0.887146 */
-25265, /* B1 = -1.542114 */
29073, /* B0 = 0.887268 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f900 */
24806, /* A1 = -1.514099 */
-32501, /* A2 = 0.991852 */
-326, /* B2 = -0.009969 */
0, /* B1 = 0.000000 */
326, /* B0 = 0.009969 */
24709, /* A1 = -1.508118 */
-32659, /* A2 = 0.996674 */
20277, /* B2 = 0.618835 */
-15182, /* B1 = -0.926636 */
20277, /* B0 = 0.618835 */
25022, /* A1 = -1.527222 */
-32661, /* A2 = 0.996735 */
4320, /* B2 = 0.131836 */
-3331, /* B1 = -0.203339 */
4320, /* B0 = 0.131836 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f900_1300[] */
19776, /* A1 = 1.207092 */
-27437, /* A2 = -0.837341 */
-2666, /* B2 = -0.081371 */
0, /* B1 = 0 */
2666, /* B0 = 0.081371 */
16302, /* A1 = 0.995026 */
-30354, /* A2 = -0.926361 */
10389, /* B2 = 0.317062 */
-3327, /* B1 = -0.203064 */
10389, /* B0 = 0.317062 */
24299, /* A1 = 1.483154 */
-30930, /* A2 = -0.943909 */
25016, /* B2 = 0.763428 */
-21171, /* B1 = -1.292236 */
25016, /* B0 = 0.763428 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f935_1215[] */
20554, /* A1 = 1.254517 */
-28764, /* A2 = -0.877838 */
-2048, /* B2 = -0.062515 */
0, /* B1 = 0 */
2048, /* B0 = 0.062515 */
18209, /* A1 = 1.11145 */
-30951, /* A2 = -0.94458 */
9390, /* B2 = 0.286575 */
-3955, /* B1 = -0.241455 */
9390, /* B0 = 0.286575 */
23902, /* A1 = 1.458923 */
-31286, /* A2 = -0.954803 */
23252, /* B2 = 0.709595 */
-19132, /* B1 = -1.167725 */
23252, /* B0 = 0.709595 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f941_1477[] */
17543, /* A1 = 1.07074 */
-26220, /* A2 = -0.800201 */
-3298, /* B2 = -0.100647 */
0, /* B1 = 0 */
3298, /* B0 = 0.100647 */
12423, /* A1 = 0.75827 */
-30036, /* A2 = -0.916626 */
12651, /* B2 = 0.386078 */
-2444, /* B1 = -0.14917 */
12653, /* B0 = 0.386154 */
23518, /* A1 = 1.435425 */
-30745, /* A2 = -0.938293 */
27282, /* B2 = 0.832581 */
-22529, /* B1 = -1.375122 */
27286, /* B0 = 0.832703 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f942 */
24104, /* A1 = -1.471252 */
-32507, /* A2 = 0.992065 */
-351, /* B2 = -0.010722 */
0, /* B1 = 0.000000 */
351, /* B0 = 0.010722 */
23996, /* A1 = -1.464600 */
-32671, /* A2 = 0.997040 */
22848, /* B2 = 0.697266 */
-16639, /* B1 = -1.015564 */
22848, /* B0 = 0.697266 */
24332, /* A1 = -1.485168 */
-32673, /* A2 = 0.997101 */
4906, /* B2 = 0.149727 */
-3672, /* B1 = -0.224174 */
4906, /* B0 = 0.149727 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f950 */
23967, /* A1 = -1.462830 */
-32507, /* A2 = 0.992065 */
-518, /* B2 = -0.015821 */
0, /* B1 = 0.000000 */
518, /* B0 = 0.015821 */
23856, /* A1 = -1.456055 */
-32671, /* A2 = 0.997040 */
26287, /* B2 = 0.802246 */
-19031, /* B1 = -1.161560 */
26287, /* B0 = 0.802246 */
24195, /* A1 = -1.476746 */
-32673, /* A2 = 0.997101 */
2890, /* B2 = 0.088196 */
-2151, /* B1 = -0.131317 */
2890, /* B0 = 0.088196 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f950_1400[] */
18294, /* A1 = 1.116638 */
-26962, /* A2 = -0.822845 */
-2914, /* B2 = -0.088936 */
0, /* B1 = 0 */
2914, /* B0 = 0.088936 */
14119, /* A1 = 0.861786 */
-30227, /* A2 = -0.922455 */
11466, /* B2 = 0.349945 */
-2833, /* B1 = -0.172943 */
11466, /* B0 = 0.349945 */
23431, /* A1 = 1.430115 */
-30828, /* A2 = -0.940796 */
25331, /* B2 = 0.773071 */
-20911, /* B1 = -1.276367 */
25331, /* B0 = 0.773071 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f975 */
23521, /* A1 = -1.435608 */
-32489, /* A2 = 0.991516 */
-193, /* B2 = -0.005915 */
0, /* B1 = 0.000000 */
193, /* B0 = 0.005915 */
23404, /* A1 = -1.428467 */
-32655, /* A2 = 0.996582 */
17740, /* B2 = 0.541412 */
-12567, /* B1 = -0.767029 */
17740, /* B0 = 0.541412 */
23753, /* A1 = -1.449829 */
-32657, /* A2 = 0.996613 */
9090, /* B2 = 0.277405 */
-6662, /* B1 = -0.406647 */
9090, /* B0 = 0.277405 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f1000 */
23071, /* A1 = -1.408203 */
-32489, /* A2 = 0.991516 */
-293, /* B2 = -0.008965 */
0, /* B1 = 0.000000 */
293, /* B0 = 0.008965 */
22951, /* A1 = -1.400818 */
-32655, /* A2 = 0.996582 */
5689, /* B2 = 0.173645 */
-3951, /* B1 = -0.241150 */
5689, /* B0 = 0.173645 */
23307, /* A1 = -1.422607 */
-32657, /* A2 = 0.996613 */
18692, /* B2 = 0.570435 */
-13447, /* B1 = -0.820770 */
18692, /* B0 = 0.570435 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f1020 */
22701, /* A1 = -1.385620 */
-32474, /* A2 = 0.991058 */
-292, /* B2 = -0.008933 */
0, /*163840 , B1 = 10.000000 */
292, /* B0 = 0.008933 */
22564, /* A1 = -1.377258 */
-32655, /* A2 = 0.996552 */
20756, /* B2 = 0.633423 */
-14176, /* B1 = -0.865295 */
20756, /* B0 = 0.633423 */
22960, /* A1 = -1.401428 */
-32657, /* A2 = 0.996613 */
6520, /* B2 = 0.198990 */
-4619, /* B1 = -0.281937 */
6520, /* B0 = 0.198990 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f1050 */
22142, /* A1 = -1.351501 */
-32474, /* A2 = 0.991058 */
-147, /* B2 = -0.004493 */
0, /* B1 = 0.000000 */
147, /* B0 = 0.004493 */
22000, /* A1 = -1.342834 */
-32655, /* A2 = 0.996552 */
15379, /* B2 = 0.469360 */
-10237, /* B1 = -0.624847 */
15379, /* B0 = 0.469360 */
22406, /* A1 = -1.367554 */
-32657, /* A2 = 0.996613 */
17491, /* B2 = 0.533783 */
-12096, /* B1 = -0.738312 */
17491, /* B0 = 0.533783 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f1100_1750[] */
12973, /* A1 = 0.79184 */
-24916, /* A2 = -0.760376 */
6655, /* B2 = 0.203102 */
367, /* B1 = 0.0224 */
6657, /* B0 = 0.203171 */
5915, /* A1 = 0.361053 */
-29560, /* A2 = -0.90213 */
-7777, /* B2 = -0.23735 */
0, /* B1 = 0 */
7777, /* B0 = 0.23735 */
20510, /* A1 = 1.251892 */
-30260, /* A2 = -0.923462 */
26662, /* B2 = 0.81366 */
-20573, /* B1 = -1.255737 */
26668, /* B0 = 0.813843 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f1140 */
20392, /* A1 = -1.244629 */
-32460, /* A2 = 0.990601 */
-270, /* B2 = -0.008240 */
0, /* B1 = 0.000000 */
270, /* B0 = 0.008240 */
20218, /* A1 = -1.234009 */
-32655, /* A2 = 0.996582 */
21337, /* B2 = 0.651154 */
-13044, /* B1 = -0.796143 */
21337, /* B0 = 0.651154 */
20684, /* A1 = -1.262512 */
-32657, /* A2 = 0.996643 */
8572, /* B2 = 0.261612 */
-5476, /* B1 = -0.334244 */
8572, /* B0 = 0.261612 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f1200 */
19159, /* A1 = -1.169373 */
-32456, /* A2 = 0.990509 */
-335, /* B2 = -0.010252 */
0, /* B1 = 0.000000 */
335, /* B0 = 0.010252 */
18966, /* A1 = -1.157593 */
-32661, /* A2 = 0.996735 */
6802, /* B2 = 0.207588 */
-3900, /* B1 = -0.238098 */
6802, /* B0 = 0.207588 */
19467, /* A1 = -1.188232 */
-32661, /* A2 = 0.996765 */
25035, /* B2 = 0.764008 */
-15049, /* B1 = -0.918579 */
25035, /* B0 = 0.764008 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f1209 */
18976, /* A1 = -1.158264 */
-32439, /* A2 = 0.989990 */
-183, /* B2 = -0.005588 */
0, /* B1 = 0.000000 */
183, /* B0 = 0.005588 */
18774, /* A1 = -1.145874 */
-32650, /* A2 = 0.996429 */
15468, /* B2 = 0.472076 */
-8768, /* B1 = -0.535217 */
15468, /* B0 = 0.472076 */
19300, /* A1 = -1.177979 */
-32652, /* A2 = 0.996490 */
19840, /* B2 = 0.605499 */
-11842, /* B1 = -0.722809 */
19840, /* B0 = 0.605499 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f1330 */
16357, /* A1 = -0.998413 */
-32368, /* A2 = 0.987793 */
-217, /* B2 = -0.006652 */
0, /* B1 = 0.000000 */
217, /* B0 = 0.006652 */
16107, /* A1 = -0.983126 */
-32601, /* A2 = 0.994904 */
11602, /* B2 = 0.354065 */
-5555, /* B1 = -0.339111 */
11602, /* B0 = 0.354065 */
16722, /* A1 = -1.020630 */
-32603, /* A2 = 0.994965 */
15574, /* B2 = 0.475311 */
-8176, /* B1 = -0.499069 */
15574, /* B0 = 0.475311 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f1336 */
16234, /* A1 = -0.990875 */
32404, /* A2 = -0.988922 */
-193, /* B2 = -0.005908 */
0, /* B1 = 0.000000 */
193, /* B0 = 0.005908 */
15986, /* A1 = -0.975769 */
-32632, /* A2 = 0.995880 */
18051, /* B2 = 0.550903 */
-8658, /* B1 = -0.528473 */
18051, /* B0 = 0.550903 */
16591, /* A1 = -1.012695 */
-32634, /* A2 = 0.995941 */
15736, /* B2 = 0.480240 */
-8125, /* B1 = -0.495926 */
15736, /* B0 = 0.480240 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f1366 */
15564, /* A1 = -0.949982 */
-32404, /* A2 = 0.988922 */
-269, /* B2 = -0.008216 */
0, /* B1 = 0.000000 */
269, /* B0 = 0.008216 */
15310, /* A1 = -0.934479 */
-32632, /* A2 = 0.995880 */
10815, /* B2 = 0.330063 */
-4962, /* B1 = -0.302887 */
10815, /* B0 = 0.330063 */
15924, /* A1 = -0.971924 */
-32634, /* A2 = 0.995941 */
18880, /* B2 = 0.576172 */
-9364, /* B1 = -0.571594 */
18880, /* B0 = 0.576172 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f1380 */
15247, /* A1 = -0.930603 */
-32397, /* A2 = 0.988708 */
-244, /* B2 = -0.007451 */
0, /* B1 = 0.000000 */
244, /* B0 = 0.007451 */
14989, /* A1 = -0.914886 */
-32627, /* A2 = 0.995697 */
18961, /* B2 = 0.578644 */
-8498, /* B1 = -0.518707 */
18961, /* B0 = 0.578644 */
15608, /* A1 = -0.952667 */
-32628, /* A2 = 0.995758 */
11145, /* B2 = 0.340134 */
-5430, /* B1 = -0.331467 */
11145, /* B0 = 0.340134 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f1400 */
14780, /* A1 = -0.902130 */
-32393, /* A2 = 0.988586 */
-396, /* B2 = -0.012086 */
0, /* B1 = 0.000000 */
396, /* B0 = 0.012086 */
14510, /* A1 = -0.885651 */
-32630, /* A2 = 0.995819 */
6326, /* B2 = 0.193069 */
-2747, /* B1 = -0.167671 */
6326, /* B0 = 0.193069 */
15154, /* A1 = -0.924957 */
-32632, /* A2 = 0.995850 */
23235, /* B2 = 0.709076 */
-10983, /* B1 = -0.670380 */
23235, /* B0 = 0.709076 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f1477 */
13005, /* A1 = -0.793793 */
-32368, /* A2 = 0.987823 */
-500, /* B2 = -0.015265 */
0, /* B1 = 0.000000 */
500, /* B0 = 0.015265 */
12708, /* A1 = -0.775665 */
-32615, /* A2 = 0.995331 */
11420, /* B2 = 0.348526 */
-4306, /* B1 = -0.262833 */
11420, /* B0 = 0.348526 */
13397, /* A1 = -0.817688 */
-32615, /* A2 = 0.995361 */
9454, /* B2 = 0.288528 */
-3981, /* B1 = -0.243027 */
9454, /* B0 = 0.288528 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f1600 */
10046, /* A1 = -0.613190 */
-32331, /* A2 = 0.986694 */
-455, /* B2 = -0.013915 */
0, /* B1 = 0.000000 */
455, /* B0 = 0.013915 */
9694, /* A1 = -0.591705 */
-32601, /* A2 = 0.994934 */
6023, /* B2 = 0.183815 */
-1708, /* B1 = -0.104279 */
6023, /* B0 = 0.183815 */
10478, /* A1 = -0.639587 */
-32603, /* A2 = 0.994965 */
22031, /* B2 = 0.672333 */
-7342, /* B1 = -0.448151 */
22031, /* B0 = 0.672333 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f1633_1638[] */
9181, /* A1 = 0.560394 */
-32256, /* A2 = -0.984375 */
-556, /* B2 = -0.016975 */
0, /* B1 = 0 */
556, /* B0 = 0.016975 */
8757, /* A1 = 0.534515 */
-32574, /* A2 = -0.99408 */
8443, /* B2 = 0.25769 */
-2135, /* B1 = -0.130341 */
8443, /* B0 = 0.25769 */
9691, /* A1 = 0.591522 */
-32574, /* A2 = -0.99411 */
15446, /* B2 = 0.471375 */
-4809, /* B1 = -0.293579 */
15446, /* B0 = 0.471375 */
7, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f1800 */
5076, /* A1 = -0.309875 */
-32304, /* A2 = 0.985840 */
-508, /* B2 = -0.015503 */
0, /* B1 = 0.000000 */
508, /* B0 = 0.015503 */
4646, /* A1 = -0.283600 */
-32605, /* A2 = 0.995026 */
6742, /* B2 = 0.205780 */
-878, /* B1 = -0.053635 */
6742, /* B0 = 0.205780 */
5552, /* A1 = -0.338928 */
-32605, /* A2 = 0.995056 */
23667, /* B2 = 0.722260 */
-4297, /* B1 = -0.262329 */
23667, /* B0 = 0.722260 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
{ /* f1860 */
3569, /* A1 = -0.217865 */
-32292, /* A2 = 0.985504 */
-239, /* B2 = -0.007322 */
0, /* B1 = 0.000000 */
239, /* B0 = 0.007322 */
3117, /* A1 = -0.190277 */
-32603, /* A2 = 0.994965 */
18658, /* B2 = 0.569427 */
-1557, /* B1 = -0.095032 */
18658, /* B0 = 0.569427 */
4054, /* A1 = -0.247437 */
-32603, /* A2 = 0.994965 */
18886, /* B2 = 0.576385 */
-2566, /* B1 = -0.156647 */
18886, /* B0 = 0.576385 */
5, /* Internal filter scaling */
159, /* Minimum in-band energy threshold */
21, /* 21/32 in-band to broad-band ratio */
0x0FF5 /* shift-mask 0x0FF (look at 16 half-frames) bit count = 5 */
},
};
static int ixj_init_filter(IXJ *j, IXJ_FILTER * jf)
{
unsigned short cmd;
int cnt, max;
if (jf->filter > 3) {
return -1;
}
if (ixj_WriteDSPCommand(0x5154 + jf->filter, j)) /* Select Filter */
return -1;
if (!jf->enable) {
if (ixj_WriteDSPCommand(0x5152, j)) /* Disable Filter */
return -1;
else
return 0;
} else {
if (ixj_WriteDSPCommand(0x5153, j)) /* Enable Filter */
return -1;
/* Select the filter (f0 - f3) to use. */
if (ixj_WriteDSPCommand(0x5154 + jf->filter, j))
return -1;
}
if (jf->freq < 12 && jf->freq > 3) {
/* Select the frequency for the selected filter. */
if (ixj_WriteDSPCommand(0x5170 + jf->freq, j))
return -1;
} else if (jf->freq > 11) {
/* We need to load a programmable filter set for undefined */
/* frequencies. So we will point the filter to a programmable set. */
/* Since there are only 4 filters and 4 programmable sets, we will */
/* just point the filter to the same number set and program it for the */
/* frequency we want. */
if (ixj_WriteDSPCommand(0x5170 + jf->filter, j))
return -1;
if (j->ver.low != 0x12) {
cmd = 0x515B;
max = 19;
} else {
cmd = 0x515E;
max = 15;
}
if (ixj_WriteDSPCommand(cmd, j))
return -1;
for (cnt = 0; cnt < max; cnt++) {
if (ixj_WriteDSPCommand(tone_table[jf->freq - 12][cnt], j))
return -1;
}
}
j->filter_en[jf->filter] = jf->enable;
return 0;
}
static int ixj_init_filter_raw(IXJ *j, IXJ_FILTER_RAW * jfr)
{
unsigned short cmd;
int cnt, max;
if (jfr->filter > 3) {
return -1;
}
if (ixj_WriteDSPCommand(0x5154 + jfr->filter, j)) /* Select Filter */
return -1;
if (!jfr->enable) {
if (ixj_WriteDSPCommand(0x5152, j)) /* Disable Filter */
return -1;
else
return 0;
} else {
if (ixj_WriteDSPCommand(0x5153, j)) /* Enable Filter */
return -1;
/* Select the filter (f0 - f3) to use. */
if (ixj_WriteDSPCommand(0x5154 + jfr->filter, j))
return -1;
}
/* We need to load a programmable filter set for undefined */
/* frequencies. So we will point the filter to a programmable set. */
/* Since there are only 4 filters and 4 programmable sets, we will */
/* just point the filter to the same number set and program it for the */
/* frequency we want. */
if (ixj_WriteDSPCommand(0x5170 + jfr->filter, j))
return -1;
if (j->ver.low != 0x12) {
cmd = 0x515B;
max = 19;
} else {
cmd = 0x515E;
max = 15;
}
if (ixj_WriteDSPCommand(cmd, j))
return -1;
for (cnt = 0; cnt < max; cnt++) {
if (ixj_WriteDSPCommand(jfr->coeff[cnt], j))
return -1;
}
j->filter_en[jfr->filter] = jfr->enable;
return 0;
}
static int ixj_init_tone(IXJ *j, IXJ_TONE * ti)
{
int freq0, freq1;
unsigned short data;
if (ti->freq0) {
freq0 = ti->freq0;
} else {
freq0 = 0x7FFF;
}
if (ti->freq1) {
freq1 = ti->freq1;
} else {
freq1 = 0x7FFF;
}
if(ti->tone_index > 12 && ti->tone_index < 28)
{
if (ixj_WriteDSPCommand(0x6800 + ti->tone_index, j))
return -1;
if (ixj_WriteDSPCommand(0x6000 + (ti->gain1 << 4) + ti->gain0, j))
return -1;
data = freq0;
if (ixj_WriteDSPCommand(data, j))
return -1;
data = freq1;
if (ixj_WriteDSPCommand(data, j))
return -1;
}
return freq0;
}
| gpl-2.0 |
geoffret/litmus-rt | arch/sh/mm/cache-sh2.c | 2284 | 2295 | /*
* arch/sh/mm/cache-sh2.c
*
* Copyright (C) 2002 Paul Mundt
* Copyright (C) 2008 Yoshinori Sato
*
* Released under the terms of the GNU GPL v2.0.
*/
#include <linux/init.h>
#include <linux/mm.h>
#include <asm/cache.h>
#include <asm/addrspace.h>
#include <asm/processor.h>
#include <asm/cacheflush.h>
#include <asm/io.h>
static void sh2__flush_wback_region(void *start, int size)
{
unsigned long v;
unsigned long begin, end;
begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
& ~(L1_CACHE_BYTES-1);
for (v = begin; v < end; v+=L1_CACHE_BYTES) {
unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0);
int way;
for (way = 0; way < 4; way++) {
unsigned long data = __raw_readl(addr | (way << 12));
if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
data &= ~SH_CACHE_UPDATED;
__raw_writel(data, addr | (way << 12));
}
}
}
}
static void sh2__flush_purge_region(void *start, int size)
{
unsigned long v;
unsigned long begin, end;
begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
& ~(L1_CACHE_BYTES-1);
for (v = begin; v < end; v+=L1_CACHE_BYTES)
__raw_writel((v & CACHE_PHYSADDR_MASK),
CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008);
}
static void sh2__flush_invalidate_region(void *start, int size)
{
#ifdef CONFIG_CACHE_WRITEBACK
/*
* SH-2 does not support individual line invalidation, only a
* global invalidate.
*/
unsigned long ccr;
unsigned long flags;
local_irq_save(flags);
jump_to_uncached();
ccr = __raw_readl(SH_CCR);
ccr |= CCR_CACHE_INVALIDATE;
__raw_writel(ccr, SH_CCR);
back_to_cached();
local_irq_restore(flags);
#else
unsigned long v;
unsigned long begin, end;
begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
& ~(L1_CACHE_BYTES-1);
for (v = begin; v < end; v+=L1_CACHE_BYTES)
__raw_writel((v & CACHE_PHYSADDR_MASK),
CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008);
#endif
}
void __init sh2_cache_init(void)
{
__flush_wback_region = sh2__flush_wback_region;
__flush_purge_region = sh2__flush_purge_region;
__flush_invalidate_region = sh2__flush_invalidate_region;
}
| gpl-2.0 |
Hardslog/f2fs | net/unix/sysctl_net_unix.c | 2540 | 1351 | /*
* NET4: Sysctl interface to net af_unix subsystem.
*
* Authors: Mike Shaver.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/sysctl.h>
#include <net/af_unix.h>
static struct ctl_table unix_table[] = {
{
.procname = "max_dgram_qlen",
.data = &init_net.unx.sysctl_max_dgram_qlen,
.maxlen = sizeof(int),
.mode = 0644,
.proc_handler = proc_dointvec
},
{ }
};
int __net_init unix_sysctl_register(struct net *net)
{
struct ctl_table *table;
table = kmemdup(unix_table, sizeof(unix_table), GFP_KERNEL);
if (table == NULL)
goto err_alloc;
/* Don't export sysctls to unprivileged users */
if (net->user_ns != &init_user_ns)
table[0].procname = NULL;
table[0].data = &net->unx.sysctl_max_dgram_qlen;
net->unx.ctl = register_net_sysctl(net, "net/unix", table);
if (net->unx.ctl == NULL)
goto err_reg;
return 0;
err_reg:
kfree(table);
err_alloc:
return -ENOMEM;
}
void unix_sysctl_unregister(struct net *net)
{
struct ctl_table *table;
table = net->unx.ctl->ctl_table_arg;
unregister_net_sysctl_table(net->unx.ctl);
kfree(table);
}
| gpl-2.0 |
cmenard/kernel_smdk4412 | drivers/usb/gadget/f_obex.c | 3564 | 13534 | /*
* f_obex.c -- USB CDC OBEX function driver
*
* Copyright (C) 2008 Nokia Corporation
* Contact: Felipe Balbi <felipe.balbi@nokia.com>
*
* Based on f_acm.c by Al Borchers and David Brownell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/* #define VERBOSE_DEBUG */
#include <linux/slab.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include "u_serial.h"
#include "gadget_chips.h"
/*
* This CDC OBEX function support just packages a TTY-ish byte stream.
* A user mode server will put it into "raw" mode and handle all the
* relevant protocol details ... this is just a kernel passthrough.
* When possible, we prevent gadget enumeration until that server is
* ready to handle the commands.
*/
struct obex_ep_descs {
struct usb_endpoint_descriptor *obex_in;
struct usb_endpoint_descriptor *obex_out;
};
struct f_obex {
struct gserial port;
u8 ctrl_id;
u8 data_id;
u8 port_num;
u8 can_activate;
struct obex_ep_descs fs;
struct obex_ep_descs hs;
};
static inline struct f_obex *func_to_obex(struct usb_function *f)
{
return container_of(f, struct f_obex, port.func);
}
static inline struct f_obex *port_to_obex(struct gserial *p)
{
return container_of(p, struct f_obex, port);
}
/*-------------------------------------------------------------------------*/
#define OBEX_CTRL_IDX 0
#define OBEX_DATA_IDX 1
static struct usb_string obex_string_defs[] = {
[OBEX_CTRL_IDX].s = "CDC Object Exchange (OBEX)",
[OBEX_DATA_IDX].s = "CDC OBEX Data",
{ }, /* end of list */
};
static struct usb_gadget_strings obex_string_table = {
.language = 0x0409, /* en-US */
.strings = obex_string_defs,
};
static struct usb_gadget_strings *obex_strings[] = {
&obex_string_table,
NULL,
};
/*-------------------------------------------------------------------------*/
static struct usb_interface_descriptor obex_control_intf __initdata = {
.bLength = sizeof(obex_control_intf),
.bDescriptorType = USB_DT_INTERFACE,
.bInterfaceNumber = 0,
.bAlternateSetting = 0,
.bNumEndpoints = 0,
.bInterfaceClass = USB_CLASS_COMM,
.bInterfaceSubClass = USB_CDC_SUBCLASS_OBEX,
};
static struct usb_interface_descriptor obex_data_nop_intf __initdata = {
.bLength = sizeof(obex_data_nop_intf),
.bDescriptorType = USB_DT_INTERFACE,
.bInterfaceNumber = 1,
.bAlternateSetting = 0,
.bNumEndpoints = 0,
.bInterfaceClass = USB_CLASS_CDC_DATA,
};
static struct usb_interface_descriptor obex_data_intf __initdata = {
.bLength = sizeof(obex_data_intf),
.bDescriptorType = USB_DT_INTERFACE,
.bInterfaceNumber = 2,
.bAlternateSetting = 1,
.bNumEndpoints = 2,
.bInterfaceClass = USB_CLASS_CDC_DATA,
};
static struct usb_cdc_header_desc obex_cdc_header_desc __initdata = {
.bLength = sizeof(obex_cdc_header_desc),
.bDescriptorType = USB_DT_CS_INTERFACE,
.bDescriptorSubType = USB_CDC_HEADER_TYPE,
.bcdCDC = cpu_to_le16(0x0120),
};
static struct usb_cdc_union_desc obex_cdc_union_desc __initdata = {
.bLength = sizeof(obex_cdc_union_desc),
.bDescriptorType = USB_DT_CS_INTERFACE,
.bDescriptorSubType = USB_CDC_UNION_TYPE,
.bMasterInterface0 = 1,
.bSlaveInterface0 = 2,
};
static struct usb_cdc_obex_desc obex_desc __initdata = {
.bLength = sizeof(obex_desc),
.bDescriptorType = USB_DT_CS_INTERFACE,
.bDescriptorSubType = USB_CDC_OBEX_TYPE,
.bcdVersion = cpu_to_le16(0x0100),
};
/* High-Speed Support */
static struct usb_endpoint_descriptor obex_hs_ep_out_desc __initdata = {
.bLength = USB_DT_ENDPOINT_SIZE,
.bDescriptorType = USB_DT_ENDPOINT,
.bEndpointAddress = USB_DIR_OUT,
.bmAttributes = USB_ENDPOINT_XFER_BULK,
.wMaxPacketSize = cpu_to_le16(512),
};
static struct usb_endpoint_descriptor obex_hs_ep_in_desc __initdata = {
.bLength = USB_DT_ENDPOINT_SIZE,
.bDescriptorType = USB_DT_ENDPOINT,
.bEndpointAddress = USB_DIR_IN,
.bmAttributes = USB_ENDPOINT_XFER_BULK,
.wMaxPacketSize = cpu_to_le16(512),
};
static struct usb_descriptor_header *hs_function[] __initdata = {
(struct usb_descriptor_header *) &obex_control_intf,
(struct usb_descriptor_header *) &obex_cdc_header_desc,
(struct usb_descriptor_header *) &obex_desc,
(struct usb_descriptor_header *) &obex_cdc_union_desc,
(struct usb_descriptor_header *) &obex_data_nop_intf,
(struct usb_descriptor_header *) &obex_data_intf,
(struct usb_descriptor_header *) &obex_hs_ep_in_desc,
(struct usb_descriptor_header *) &obex_hs_ep_out_desc,
NULL,
};
/* Full-Speed Support */
static struct usb_endpoint_descriptor obex_fs_ep_in_desc __initdata = {
.bLength = USB_DT_ENDPOINT_SIZE,
.bDescriptorType = USB_DT_ENDPOINT,
.bEndpointAddress = USB_DIR_IN,
.bmAttributes = USB_ENDPOINT_XFER_BULK,
};
static struct usb_endpoint_descriptor obex_fs_ep_out_desc __initdata = {
.bLength = USB_DT_ENDPOINT_SIZE,
.bDescriptorType = USB_DT_ENDPOINT,
.bEndpointAddress = USB_DIR_OUT,
.bmAttributes = USB_ENDPOINT_XFER_BULK,
};
static struct usb_descriptor_header *fs_function[] __initdata = {
(struct usb_descriptor_header *) &obex_control_intf,
(struct usb_descriptor_header *) &obex_cdc_header_desc,
(struct usb_descriptor_header *) &obex_desc,
(struct usb_descriptor_header *) &obex_cdc_union_desc,
(struct usb_descriptor_header *) &obex_data_nop_intf,
(struct usb_descriptor_header *) &obex_data_intf,
(struct usb_descriptor_header *) &obex_fs_ep_in_desc,
(struct usb_descriptor_header *) &obex_fs_ep_out_desc,
NULL,
};
/*-------------------------------------------------------------------------*/
static int obex_set_alt(struct usb_function *f, unsigned intf, unsigned alt)
{
struct f_obex *obex = func_to_obex(f);
struct usb_composite_dev *cdev = f->config->cdev;
if (intf == obex->ctrl_id) {
if (alt != 0)
goto fail;
/* NOP */
DBG(cdev, "reset obex ttyGS%d control\n", obex->port_num);
} else if (intf == obex->data_id) {
if (alt > 1)
goto fail;
if (obex->port.in->driver_data) {
DBG(cdev, "reset obex ttyGS%d\n", obex->port_num);
gserial_disconnect(&obex->port);
}
if (!obex->port.in_desc) {
DBG(cdev, "init obex ttyGS%d\n", obex->port_num);
obex->port.in_desc = ep_choose(cdev->gadget,
obex->hs.obex_in, obex->fs.obex_in);
obex->port.out_desc = ep_choose(cdev->gadget,
obex->hs.obex_out, obex->fs.obex_out);
}
if (alt == 1) {
DBG(cdev, "activate obex ttyGS%d\n", obex->port_num);
gserial_connect(&obex->port, obex->port_num);
}
} else
goto fail;
return 0;
fail:
return -EINVAL;
}
static int obex_get_alt(struct usb_function *f, unsigned intf)
{
struct f_obex *obex = func_to_obex(f);
if (intf == obex->ctrl_id)
return 0;
return obex->port.in->driver_data ? 1 : 0;
}
static void obex_disable(struct usb_function *f)
{
struct f_obex *obex = func_to_obex(f);
struct usb_composite_dev *cdev = f->config->cdev;
DBG(cdev, "obex ttyGS%d disable\n", obex->port_num);
gserial_disconnect(&obex->port);
}
/*-------------------------------------------------------------------------*/
static void obex_connect(struct gserial *g)
{
struct f_obex *obex = port_to_obex(g);
struct usb_composite_dev *cdev = g->func.config->cdev;
int status;
if (!obex->can_activate)
return;
status = usb_function_activate(&g->func);
if (status)
DBG(cdev, "obex ttyGS%d function activate --> %d\n",
obex->port_num, status);
}
static void obex_disconnect(struct gserial *g)
{
struct f_obex *obex = port_to_obex(g);
struct usb_composite_dev *cdev = g->func.config->cdev;
int status;
if (!obex->can_activate)
return;
status = usb_function_deactivate(&g->func);
if (status)
DBG(cdev, "obex ttyGS%d function deactivate --> %d\n",
obex->port_num, status);
}
/*-------------------------------------------------------------------------*/
static int __init
obex_bind(struct usb_configuration *c, struct usb_function *f)
{
struct usb_composite_dev *cdev = c->cdev;
struct f_obex *obex = func_to_obex(f);
int status;
struct usb_ep *ep;
/* allocate instance-specific interface IDs, and patch descriptors */
status = usb_interface_id(c, f);
if (status < 0)
goto fail;
obex->ctrl_id = status;
obex_control_intf.bInterfaceNumber = status;
obex_cdc_union_desc.bMasterInterface0 = status;
status = usb_interface_id(c, f);
if (status < 0)
goto fail;
obex->data_id = status;
obex_data_nop_intf.bInterfaceNumber = status;
obex_data_intf.bInterfaceNumber = status;
obex_cdc_union_desc.bSlaveInterface0 = status;
/* allocate instance-specific endpoints */
ep = usb_ep_autoconfig(cdev->gadget, &obex_fs_ep_in_desc);
if (!ep)
goto fail;
obex->port.in = ep;
ep->driver_data = cdev; /* claim */
ep = usb_ep_autoconfig(cdev->gadget, &obex_fs_ep_out_desc);
if (!ep)
goto fail;
obex->port.out = ep;
ep->driver_data = cdev; /* claim */
/* copy descriptors, and track endpoint copies */
f->descriptors = usb_copy_descriptors(fs_function);
obex->fs.obex_in = usb_find_endpoint(fs_function,
f->descriptors, &obex_fs_ep_in_desc);
obex->fs.obex_out = usb_find_endpoint(fs_function,
f->descriptors, &obex_fs_ep_out_desc);
/* support all relevant hardware speeds... we expect that when
* hardware is dual speed, all bulk-capable endpoints work at
* both speeds
*/
if (gadget_is_dualspeed(c->cdev->gadget)) {
obex_hs_ep_in_desc.bEndpointAddress =
obex_fs_ep_in_desc.bEndpointAddress;
obex_hs_ep_out_desc.bEndpointAddress =
obex_fs_ep_out_desc.bEndpointAddress;
/* copy descriptors, and track endpoint copies */
f->hs_descriptors = usb_copy_descriptors(hs_function);
obex->hs.obex_in = usb_find_endpoint(hs_function,
f->hs_descriptors, &obex_hs_ep_in_desc);
obex->hs.obex_out = usb_find_endpoint(hs_function,
f->hs_descriptors, &obex_hs_ep_out_desc);
}
/* Avoid letting this gadget enumerate until the userspace
* OBEX server is active.
*/
status = usb_function_deactivate(f);
if (status < 0)
WARNING(cdev, "obex ttyGS%d: can't prevent enumeration, %d\n",
obex->port_num, status);
else
obex->can_activate = true;
DBG(cdev, "obex ttyGS%d: %s speed IN/%s OUT/%s\n",
obex->port_num,
gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full",
obex->port.in->name, obex->port.out->name);
return 0;
fail:
/* we might as well release our claims on endpoints */
if (obex->port.out)
obex->port.out->driver_data = NULL;
if (obex->port.in)
obex->port.in->driver_data = NULL;
ERROR(cdev, "%s/%p: can't bind, err %d\n", f->name, f, status);
return status;
}
static void
obex_unbind(struct usb_configuration *c, struct usb_function *f)
{
if (gadget_is_dualspeed(c->cdev->gadget))
usb_free_descriptors(f->hs_descriptors);
usb_free_descriptors(f->descriptors);
kfree(func_to_obex(f));
}
/* Some controllers can't support CDC OBEX ... */
static inline bool can_support_obex(struct usb_configuration *c)
{
/* Since the first interface is a NOP, we can ignore the
* issue of multi-interface support on most controllers.
*
* Altsettings are mandatory, however...
*/
if (!gadget_supports_altsettings(c->cdev->gadget))
return false;
/* everything else is *probably* fine ... */
return true;
}
/**
* obex_bind_config - add a CDC OBEX function to a configuration
* @c: the configuration to support the CDC OBEX instance
* @port_num: /dev/ttyGS* port this interface will use
* Context: single threaded during gadget setup
*
* Returns zero on success, else negative errno.
*
* Caller must have called @gserial_setup() with enough ports to
* handle all the ones it binds. Caller is also responsible
* for calling @gserial_cleanup() before module unload.
*/
int __init obex_bind_config(struct usb_configuration *c, u8 port_num)
{
struct f_obex *obex;
int status;
if (!can_support_obex(c))
return -EINVAL;
/* maybe allocate device-global string IDs, and patch descriptors */
if (obex_string_defs[OBEX_CTRL_IDX].id == 0) {
status = usb_string_id(c->cdev);
if (status < 0)
return status;
obex_string_defs[OBEX_CTRL_IDX].id = status;
obex_control_intf.iInterface = status;
status = usb_string_id(c->cdev);
if (status < 0)
return status;
obex_string_defs[OBEX_DATA_IDX].id = status;
obex_data_nop_intf.iInterface =
obex_data_intf.iInterface = status;
}
/* allocate and initialize one new instance */
obex = kzalloc(sizeof *obex, GFP_KERNEL);
if (!obex)
return -ENOMEM;
obex->port_num = port_num;
obex->port.connect = obex_connect;
obex->port.disconnect = obex_disconnect;
obex->port.func.name = "obex";
obex->port.func.strings = obex_strings;
/* descriptors are per-instance copies */
obex->port.func.bind = obex_bind;
obex->port.func.unbind = obex_unbind;
obex->port.func.set_alt = obex_set_alt;
obex->port.func.get_alt = obex_get_alt;
obex->port.func.disable = obex_disable;
status = usb_add_function(c, &obex->port.func);
if (status)
kfree(obex);
return status;
}
MODULE_AUTHOR("Felipe Balbi");
MODULE_LICENSE("GPL");
| gpl-2.0 |
NoelMacwan/SXDHuashan | arch/arm/mach-mv78xx0/rd78x00-masa-setup.c | 5100 | 2242 | /*
* arch/arm/mach-mv78x00/rd78x00-masa-setup.c
*
* Marvell RD-78x00-mASA Development Board Setup
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/ata_platform.h>
#include <linux/mv643xx_eth.h>
#include <linux/ethtool.h>
#include <mach/mv78xx0.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include "common.h"
static struct mv643xx_eth_platform_data rd78x00_masa_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(8),
};
static struct mv643xx_eth_platform_data rd78x00_masa_ge01_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(9),
};
static struct mv643xx_eth_platform_data rd78x00_masa_ge10_data = {
};
static struct mv643xx_eth_platform_data rd78x00_masa_ge11_data = {
};
static struct mv_sata_platform_data rd78x00_masa_sata_data = {
.n_ports = 2,
};
static void __init rd78x00_masa_init(void)
{
/*
* Basic MV78x00 setup. Needs to be called early.
*/
mv78xx0_init();
/*
* Partition on-chip peripherals between the two CPU cores.
*/
if (mv78xx0_core_index() == 0) {
mv78xx0_ehci0_init();
mv78xx0_ehci1_init();
mv78xx0_ge00_init(&rd78x00_masa_ge00_data);
mv78xx0_ge10_init(&rd78x00_masa_ge10_data);
mv78xx0_sata_init(&rd78x00_masa_sata_data);
mv78xx0_uart0_init();
mv78xx0_uart2_init();
} else {
mv78xx0_ehci2_init();
mv78xx0_ge01_init(&rd78x00_masa_ge01_data);
mv78xx0_ge11_init(&rd78x00_masa_ge11_data);
mv78xx0_uart1_init();
mv78xx0_uart3_init();
}
}
static int __init rd78x00_pci_init(void)
{
/*
* Assign all PCIe devices to CPU core #0.
*/
if (machine_is_rd78x00_masa() && mv78xx0_core_index() == 0)
mv78xx0_pcie_init(1, 1);
return 0;
}
subsys_initcall(rd78x00_pci_init);
MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board")
/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
.atag_offset = 0x100,
.init_machine = rd78x00_masa_init,
.map_io = mv78xx0_map_io,
.init_early = mv78xx0_init_early,
.init_irq = mv78xx0_init_irq,
.timer = &mv78xx0_timer,
.restart = mv78xx0_restart,
MACHINE_END
| gpl-2.0 |
vinylfreak89/monarudo_kernel_M7_port | crypto/async_tx/async_memcpy.c | 5100 | 3014 | /*
* copy offload engine support
*
* Copyright © 2006, Intel Corporation.
*
* Dan Williams <dan.j.williams@intel.com>
*
* with architecture considerations by:
* Neil Brown <neilb@suse.de>
* Jeff Garzik <jeff@garzik.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
*/
#include <linux/kernel.h>
#include <linux/highmem.h>
#include <linux/module.h>
#include <linux/mm.h>
#include <linux/dma-mapping.h>
#include <linux/async_tx.h>
/**
* async_memcpy - attempt to copy memory with a dma engine.
* @dest: destination page
* @src: src page
* @dest_offset: offset into 'dest' to start transaction
* @src_offset: offset into 'src' to start transaction
* @len: length in bytes
* @submit: submission / completion modifiers
*
* honored flags: ASYNC_TX_ACK
*/
struct dma_async_tx_descriptor *
async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset,
unsigned int src_offset, size_t len,
struct async_submit_ctl *submit)
{
struct dma_chan *chan = async_tx_find_channel(submit, DMA_MEMCPY,
&dest, 1, &src, 1, len);
struct dma_device *device = chan ? chan->device : NULL;
struct dma_async_tx_descriptor *tx = NULL;
if (device && is_dma_copy_aligned(device, src_offset, dest_offset, len)) {
dma_addr_t dma_dest, dma_src;
unsigned long dma_prep_flags = 0;
if (submit->cb_fn)
dma_prep_flags |= DMA_PREP_INTERRUPT;
if (submit->flags & ASYNC_TX_FENCE)
dma_prep_flags |= DMA_PREP_FENCE;
dma_dest = dma_map_page(device->dev, dest, dest_offset, len,
DMA_FROM_DEVICE);
dma_src = dma_map_page(device->dev, src, src_offset, len,
DMA_TO_DEVICE);
tx = device->device_prep_dma_memcpy(chan, dma_dest, dma_src,
len, dma_prep_flags);
}
if (tx) {
pr_debug("%s: (async) len: %zu\n", __func__, len);
async_tx_submit(chan, tx, submit);
} else {
void *dest_buf, *src_buf;
pr_debug("%s: (sync) len: %zu\n", __func__, len);
/* wait for any prerequisite operations */
async_tx_quiesce(&submit->depend_tx);
dest_buf = kmap_atomic(dest) + dest_offset;
src_buf = kmap_atomic(src) + src_offset;
memcpy(dest_buf, src_buf, len);
kunmap_atomic(src_buf);
kunmap_atomic(dest_buf);
async_tx_sync_epilog(submit);
}
return tx;
}
EXPORT_SYMBOL_GPL(async_memcpy);
MODULE_AUTHOR("Intel Corporation");
MODULE_DESCRIPTION("asynchronous memcpy api");
MODULE_LICENSE("GPL");
| gpl-2.0 |
sky34/android_kernel_sony_lbmsm8960t | arch/arm/mach-mv78xx0/buffalo-wxl-setup.c | 5100 | 3181 | /*
* arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
*
* Buffalo WXL (Terastation Duo) Setup routines
*
* sebastien requiem <sebastien@requiem.fr>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/ata_platform.h>
#include <linux/mv643xx_eth.h>
#include <linux/ethtool.h>
#include <linux/i2c.h>
#include <mach/mv78xx0.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include "common.h"
#include "mpp.h"
/* This arch has 2 Giga Ethernet */
static struct mv643xx_eth_platform_data db78x00_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(0),
};
static struct mv643xx_eth_platform_data db78x00_ge01_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(8),
};
/* 2 SATA controller supporting HotPlug */
static struct mv_sata_platform_data db78x00_sata_data = {
.n_ports = 2,
};
static struct i2c_board_info __initdata db78x00_i2c_rtc = {
I2C_BOARD_INFO("ds1338", 0x68),
};
static unsigned int wxl_mpp_config[] __initdata = {
MPP0_GE1_TXCLK,
MPP1_GE1_TXCTL,
MPP2_GE1_RXCTL,
MPP3_GE1_RXCLK,
MPP4_GE1_TXD0,
MPP5_GE1_TXD1,
MPP6_GE1_TXD2,
MPP7_GE1_TXD3,
MPP8_GE1_RXD0,
MPP9_GE1_RXD1,
MPP10_GE1_RXD2,
MPP11_GE1_RXD3,
MPP12_GPIO,
MPP13_SYSRST_OUTn,
MPP14_SATA1_ACTn,
MPP15_SATA0_ACTn,
MPP16_GPIO,
MPP17_GPIO,
MPP18_GPIO,
MPP19_GPIO,
MPP20_GPIO,
MPP21_GPIO,
MPP22_GPIO,
MPP23_GPIO,
MPP24_UA2_TXD,
MPP25_UA2_RXD,
MPP26_UA2_CTSn,
MPP27_UA2_RTSn,
MPP28_GPIO,
MPP29_SYSRST_OUTn,
MPP30_GPIO,
MPP31_GPIO,
MPP32_GPIO,
MPP33_GPIO,
MPP34_GPIO,
MPP35_GPIO,
MPP36_GPIO,
MPP37_GPIO,
MPP38_GPIO,
MPP39_GPIO,
MPP40_UNUSED,
MPP41_UNUSED,
MPP42_UNUSED,
MPP43_UNUSED,
MPP44_UNUSED,
MPP45_UNUSED,
MPP46_UNUSED,
MPP47_UNUSED,
MPP48_SATA1_ACTn,
MPP49_SATA0_ACTn,
0
};
static void __init wxl_init(void)
{
/*
* Basic MV78xx0 setup. Needs to be called early.
*/
mv78xx0_init();
mv78xx0_mpp_conf(wxl_mpp_config);
/*
* Partition on-chip peripherals between the two CPU cores.
*/
mv78xx0_ehci0_init();
mv78xx0_ehci1_init();
mv78xx0_ehci2_init();
mv78xx0_ge00_init(&db78x00_ge00_data);
mv78xx0_ge01_init(&db78x00_ge01_data);
mv78xx0_sata_init(&db78x00_sata_data);
mv78xx0_uart0_init();
mv78xx0_uart1_init();
mv78xx0_uart2_init();
mv78xx0_uart3_init();
mv78xx0_i2c_init();
i2c_register_board_info(0, &db78x00_i2c_rtc, 1);
}
static int __init wxl_pci_init(void)
{
if (machine_is_terastation_wxl()) {
/*
* Assign the x16 PCIe slot on the board to CPU core
* #0, and let CPU core #1 have the four x1 slots.
*/
if (mv78xx0_core_index() == 0)
mv78xx0_pcie_init(0, 1);
else
mv78xx0_pcie_init(1, 0);
}
return 0;
}
subsys_initcall(wxl_pci_init);
MACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL")
/* Maintainer: Sebastien Requiem <sebastien@requiem.fr> */
.atag_offset = 0x100,
.init_machine = wxl_init,
.map_io = mv78xx0_map_io,
.init_early = mv78xx0_init_early,
.init_irq = mv78xx0_init_irq,
.timer = &mv78xx0_timer,
.restart = mv78xx0_restart,
MACHINE_END
| gpl-2.0 |
ashwinr64/android_kernel_motorola_msm8226 | drivers/mfd/htc-pasic3.c | 7916 | 5333 | /*
* Core driver for HTC PASIC3 LED/DS1WM chip.
*
* Copyright (C) 2006 Philipp Zabel <philipp.zabel@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/mfd/core.h>
#include <linux/mfd/ds1wm.h>
#include <linux/mfd/htc-pasic3.h>
#include <linux/slab.h>
struct pasic3_data {
void __iomem *mapping;
unsigned int bus_shift;
};
#define REG_ADDR 5
#define REG_DATA 6
#define READ_MODE 0x80
/*
* write to a secondary register on the PASIC3
*/
void pasic3_write_register(struct device *dev, u32 reg, u8 val)
{
struct pasic3_data *asic = dev_get_drvdata(dev);
int bus_shift = asic->bus_shift;
void __iomem *addr = asic->mapping + (REG_ADDR << bus_shift);
void __iomem *data = asic->mapping + (REG_DATA << bus_shift);
__raw_writeb(~READ_MODE & reg, addr);
__raw_writeb(val, data);
}
EXPORT_SYMBOL(pasic3_write_register); /* for leds-pasic3 */
/*
* read from a secondary register on the PASIC3
*/
u8 pasic3_read_register(struct device *dev, u32 reg)
{
struct pasic3_data *asic = dev_get_drvdata(dev);
int bus_shift = asic->bus_shift;
void __iomem *addr = asic->mapping + (REG_ADDR << bus_shift);
void __iomem *data = asic->mapping + (REG_DATA << bus_shift);
__raw_writeb(READ_MODE | reg, addr);
return __raw_readb(data);
}
EXPORT_SYMBOL(pasic3_read_register); /* for leds-pasic3 */
/*
* LEDs
*/
static struct mfd_cell led_cell __initdata = {
.name = "leds-pasic3",
};
/*
* DS1WM
*/
static int ds1wm_enable(struct platform_device *pdev)
{
struct device *dev = pdev->dev.parent;
int c;
c = pasic3_read_register(dev, 0x28);
pasic3_write_register(dev, 0x28, c & 0x7f);
dev_dbg(dev, "DS1WM OWM_EN low (active) %02x\n", c & 0x7f);
return 0;
}
static int ds1wm_disable(struct platform_device *pdev)
{
struct device *dev = pdev->dev.parent;
int c;
c = pasic3_read_register(dev, 0x28);
pasic3_write_register(dev, 0x28, c | 0x80);
dev_dbg(dev, "DS1WM OWM_EN high (inactive) %02x\n", c | 0x80);
return 0;
}
static struct ds1wm_driver_data ds1wm_pdata = {
.active_high = 0,
.reset_recover_delay = 1,
};
static struct resource ds1wm_resources[] __initdata = {
[0] = {
.start = 0,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 0,
.end = 0,
.flags = IORESOURCE_IRQ,
},
};
static struct mfd_cell ds1wm_cell __initdata = {
.name = "ds1wm",
.enable = ds1wm_enable,
.disable = ds1wm_disable,
.platform_data = &ds1wm_pdata,
.pdata_size = sizeof(ds1wm_pdata),
.num_resources = 2,
.resources = ds1wm_resources,
};
static int __init pasic3_probe(struct platform_device *pdev)
{
struct pasic3_platform_data *pdata = pdev->dev.platform_data;
struct device *dev = &pdev->dev;
struct pasic3_data *asic;
struct resource *r;
int ret;
int irq = 0;
r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (r) {
ds1wm_resources[1].flags = IORESOURCE_IRQ | (r->flags &
(IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE));
irq = r->start;
}
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!r)
return -ENXIO;
if (!request_mem_region(r->start, resource_size(r), "pasic3"))
return -EBUSY;
asic = kzalloc(sizeof(struct pasic3_data), GFP_KERNEL);
if (!asic)
return -ENOMEM;
platform_set_drvdata(pdev, asic);
asic->mapping = ioremap(r->start, resource_size(r));
if (!asic->mapping) {
dev_err(dev, "couldn't ioremap PASIC3\n");
kfree(asic);
return -ENOMEM;
}
/* calculate bus shift from mem resource */
asic->bus_shift = (resource_size(r) - 5) >> 3;
if (pdata && pdata->clock_rate) {
ds1wm_pdata.clock_rate = pdata->clock_rate;
/* the first 5 PASIC3 registers control the DS1WM */
ds1wm_resources[0].end = (5 << asic->bus_shift) - 1;
ret = mfd_add_devices(&pdev->dev, pdev->id,
&ds1wm_cell, 1, r, irq);
if (ret < 0)
dev_warn(dev, "failed to register DS1WM\n");
}
if (pdata && pdata->led_pdata) {
led_cell.platform_data = pdata->led_pdata;
led_cell.pdata_size = sizeof(struct pasic3_leds_machinfo);
ret = mfd_add_devices(&pdev->dev, pdev->id, &led_cell, 1, r, 0);
if (ret < 0)
dev_warn(dev, "failed to register LED device\n");
}
return 0;
}
static int pasic3_remove(struct platform_device *pdev)
{
struct pasic3_data *asic = platform_get_drvdata(pdev);
struct resource *r;
mfd_remove_devices(&pdev->dev);
iounmap(asic->mapping);
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
release_mem_region(r->start, resource_size(r));
kfree(asic);
return 0;
}
MODULE_ALIAS("platform:pasic3");
static struct platform_driver pasic3_driver = {
.driver = {
.name = "pasic3",
},
.remove = pasic3_remove,
};
static int __init pasic3_base_init(void)
{
return platform_driver_probe(&pasic3_driver, pasic3_probe);
}
static void __exit pasic3_base_exit(void)
{
platform_driver_unregister(&pasic3_driver);
}
module_init(pasic3_base_init);
module_exit(pasic3_base_exit);
MODULE_AUTHOR("Philipp Zabel <philipp.zabel@gmail.com>");
MODULE_DESCRIPTION("Core driver for HTC PASIC3");
MODULE_LICENSE("GPL");
| gpl-2.0 |
RJDTWO/intoxicated-boeffla | drivers/mfd/htc-pasic3.c | 7916 | 5333 | /*
* Core driver for HTC PASIC3 LED/DS1WM chip.
*
* Copyright (C) 2006 Philipp Zabel <philipp.zabel@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/mfd/core.h>
#include <linux/mfd/ds1wm.h>
#include <linux/mfd/htc-pasic3.h>
#include <linux/slab.h>
struct pasic3_data {
void __iomem *mapping;
unsigned int bus_shift;
};
#define REG_ADDR 5
#define REG_DATA 6
#define READ_MODE 0x80
/*
* write to a secondary register on the PASIC3
*/
void pasic3_write_register(struct device *dev, u32 reg, u8 val)
{
struct pasic3_data *asic = dev_get_drvdata(dev);
int bus_shift = asic->bus_shift;
void __iomem *addr = asic->mapping + (REG_ADDR << bus_shift);
void __iomem *data = asic->mapping + (REG_DATA << bus_shift);
__raw_writeb(~READ_MODE & reg, addr);
__raw_writeb(val, data);
}
EXPORT_SYMBOL(pasic3_write_register); /* for leds-pasic3 */
/*
* read from a secondary register on the PASIC3
*/
u8 pasic3_read_register(struct device *dev, u32 reg)
{
struct pasic3_data *asic = dev_get_drvdata(dev);
int bus_shift = asic->bus_shift;
void __iomem *addr = asic->mapping + (REG_ADDR << bus_shift);
void __iomem *data = asic->mapping + (REG_DATA << bus_shift);
__raw_writeb(READ_MODE | reg, addr);
return __raw_readb(data);
}
EXPORT_SYMBOL(pasic3_read_register); /* for leds-pasic3 */
/*
* LEDs
*/
static struct mfd_cell led_cell __initdata = {
.name = "leds-pasic3",
};
/*
* DS1WM
*/
static int ds1wm_enable(struct platform_device *pdev)
{
struct device *dev = pdev->dev.parent;
int c;
c = pasic3_read_register(dev, 0x28);
pasic3_write_register(dev, 0x28, c & 0x7f);
dev_dbg(dev, "DS1WM OWM_EN low (active) %02x\n", c & 0x7f);
return 0;
}
static int ds1wm_disable(struct platform_device *pdev)
{
struct device *dev = pdev->dev.parent;
int c;
c = pasic3_read_register(dev, 0x28);
pasic3_write_register(dev, 0x28, c | 0x80);
dev_dbg(dev, "DS1WM OWM_EN high (inactive) %02x\n", c | 0x80);
return 0;
}
static struct ds1wm_driver_data ds1wm_pdata = {
.active_high = 0,
.reset_recover_delay = 1,
};
static struct resource ds1wm_resources[] __initdata = {
[0] = {
.start = 0,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 0,
.end = 0,
.flags = IORESOURCE_IRQ,
},
};
static struct mfd_cell ds1wm_cell __initdata = {
.name = "ds1wm",
.enable = ds1wm_enable,
.disable = ds1wm_disable,
.platform_data = &ds1wm_pdata,
.pdata_size = sizeof(ds1wm_pdata),
.num_resources = 2,
.resources = ds1wm_resources,
};
static int __init pasic3_probe(struct platform_device *pdev)
{
struct pasic3_platform_data *pdata = pdev->dev.platform_data;
struct device *dev = &pdev->dev;
struct pasic3_data *asic;
struct resource *r;
int ret;
int irq = 0;
r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (r) {
ds1wm_resources[1].flags = IORESOURCE_IRQ | (r->flags &
(IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE));
irq = r->start;
}
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!r)
return -ENXIO;
if (!request_mem_region(r->start, resource_size(r), "pasic3"))
return -EBUSY;
asic = kzalloc(sizeof(struct pasic3_data), GFP_KERNEL);
if (!asic)
return -ENOMEM;
platform_set_drvdata(pdev, asic);
asic->mapping = ioremap(r->start, resource_size(r));
if (!asic->mapping) {
dev_err(dev, "couldn't ioremap PASIC3\n");
kfree(asic);
return -ENOMEM;
}
/* calculate bus shift from mem resource */
asic->bus_shift = (resource_size(r) - 5) >> 3;
if (pdata && pdata->clock_rate) {
ds1wm_pdata.clock_rate = pdata->clock_rate;
/* the first 5 PASIC3 registers control the DS1WM */
ds1wm_resources[0].end = (5 << asic->bus_shift) - 1;
ret = mfd_add_devices(&pdev->dev, pdev->id,
&ds1wm_cell, 1, r, irq);
if (ret < 0)
dev_warn(dev, "failed to register DS1WM\n");
}
if (pdata && pdata->led_pdata) {
led_cell.platform_data = pdata->led_pdata;
led_cell.pdata_size = sizeof(struct pasic3_leds_machinfo);
ret = mfd_add_devices(&pdev->dev, pdev->id, &led_cell, 1, r, 0);
if (ret < 0)
dev_warn(dev, "failed to register LED device\n");
}
return 0;
}
static int pasic3_remove(struct platform_device *pdev)
{
struct pasic3_data *asic = platform_get_drvdata(pdev);
struct resource *r;
mfd_remove_devices(&pdev->dev);
iounmap(asic->mapping);
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
release_mem_region(r->start, resource_size(r));
kfree(asic);
return 0;
}
MODULE_ALIAS("platform:pasic3");
static struct platform_driver pasic3_driver = {
.driver = {
.name = "pasic3",
},
.remove = pasic3_remove,
};
static int __init pasic3_base_init(void)
{
return platform_driver_probe(&pasic3_driver, pasic3_probe);
}
static void __exit pasic3_base_exit(void)
{
platform_driver_unregister(&pasic3_driver);
}
module_init(pasic3_base_init);
module_exit(pasic3_base_exit);
MODULE_AUTHOR("Philipp Zabel <philipp.zabel@gmail.com>");
MODULE_DESCRIPTION("Core driver for HTC PASIC3");
MODULE_LICENSE("GPL");
| gpl-2.0 |
Vangreen/android_kernel_lge_msm8226 | arch/sh/boards/mach-microdev/irq.c | 9196 | 5212 | /*
* arch/sh/boards/superh/microdev/irq.c
*
* Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com)
*
* SuperH SH4-202 MicroDev board support.
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <asm/io.h>
#include <mach/microdev.h>
#define NUM_EXTERNAL_IRQS 16 /* IRL0 .. IRL15 */
static const struct {
unsigned char fpgaIrq;
unsigned char mapped;
const char *name;
} fpgaIrqTable[NUM_EXTERNAL_IRQS] = {
{ 0, 0, "unused" }, /* IRQ #0 IRL=15 0x200 */
{ MICRODEV_FPGA_IRQ_KEYBOARD, 1, "keyboard" }, /* IRQ #1 IRL=14 0x220 */
{ MICRODEV_FPGA_IRQ_SERIAL1, 1, "Serial #1"}, /* IRQ #2 IRL=13 0x240 */
{ MICRODEV_FPGA_IRQ_ETHERNET, 1, "Ethernet" }, /* IRQ #3 IRL=12 0x260 */
{ MICRODEV_FPGA_IRQ_SERIAL2, 0, "Serial #2"}, /* IRQ #4 IRL=11 0x280 */
{ 0, 0, "unused" }, /* IRQ #5 IRL=10 0x2a0 */
{ 0, 0, "unused" }, /* IRQ #6 IRL=9 0x2c0 */
{ MICRODEV_FPGA_IRQ_USB_HC, 1, "USB" }, /* IRQ #7 IRL=8 0x2e0 */
{ MICRODEV_IRQ_PCI_INTA, 1, "PCI INTA" }, /* IRQ #8 IRL=7 0x300 */
{ MICRODEV_IRQ_PCI_INTB, 1, "PCI INTB" }, /* IRQ #9 IRL=6 0x320 */
{ MICRODEV_IRQ_PCI_INTC, 1, "PCI INTC" }, /* IRQ #10 IRL=5 0x340 */
{ MICRODEV_IRQ_PCI_INTD, 1, "PCI INTD" }, /* IRQ #11 IRL=4 0x360 */
{ MICRODEV_FPGA_IRQ_MOUSE, 1, "mouse" }, /* IRQ #12 IRL=3 0x380 */
{ MICRODEV_FPGA_IRQ_IDE2, 1, "IDE #2" }, /* IRQ #13 IRL=2 0x3a0 */
{ MICRODEV_FPGA_IRQ_IDE1, 1, "IDE #1" }, /* IRQ #14 IRL=1 0x3c0 */
{ 0, 0, "unused" }, /* IRQ #15 IRL=0 0x3e0 */
};
#if (MICRODEV_LINUX_IRQ_KEYBOARD != 1)
# error Inconsistancy in defining the IRQ# for Keyboard!
#endif
#if (MICRODEV_LINUX_IRQ_ETHERNET != 3)
# error Inconsistancy in defining the IRQ# for Ethernet!
#endif
#if (MICRODEV_LINUX_IRQ_USB_HC != 7)
# error Inconsistancy in defining the IRQ# for USB!
#endif
#if (MICRODEV_LINUX_IRQ_MOUSE != 12)
# error Inconsistancy in defining the IRQ# for PS/2 Mouse!
#endif
#if (MICRODEV_LINUX_IRQ_IDE2 != 13)
# error Inconsistancy in defining the IRQ# for secondary IDE!
#endif
#if (MICRODEV_LINUX_IRQ_IDE1 != 14)
# error Inconsistancy in defining the IRQ# for primary IDE!
#endif
static void disable_microdev_irq(struct irq_data *data)
{
unsigned int irq = data->irq;
unsigned int fpgaIrq;
if (irq >= NUM_EXTERNAL_IRQS)
return;
if (!fpgaIrqTable[irq].mapped)
return;
fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
/* disable interrupts on the FPGA INTC register */
__raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG);
}
static void enable_microdev_irq(struct irq_data *data)
{
unsigned int irq = data->irq;
unsigned long priorityReg, priorities, pri;
unsigned int fpgaIrq;
if (unlikely(irq >= NUM_EXTERNAL_IRQS))
return;
if (unlikely(!fpgaIrqTable[irq].mapped))
return;
pri = 15 - irq;
fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq);
/* set priority for the interrupt */
priorities = __raw_readl(priorityReg);
priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq);
priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri);
__raw_writel(priorities, priorityReg);
/* enable interrupts on the FPGA INTC register */
__raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
}
static struct irq_chip microdev_irq_type = {
.name = "MicroDev-IRQ",
.irq_unmask = enable_microdev_irq,
.irq_mask = disable_microdev_irq,
};
/* This function sets the desired irq handler to be a MicroDev type */
static void __init make_microdev_irq(unsigned int irq)
{
disable_irq_nosync(irq);
irq_set_chip_and_handler(irq, µdev_irq_type, handle_level_irq);
disable_microdev_irq(irq_get_irq_data(irq));
}
extern void __init init_microdev_irq(void)
{
int i;
/* disable interrupts on the FPGA INTC register */
__raw_writel(~0ul, MICRODEV_FPGA_INTDSB_REG);
for (i = 0; i < NUM_EXTERNAL_IRQS; i++)
make_microdev_irq(i);
}
extern void microdev_print_fpga_intc_status(void)
{
volatile unsigned int * const intenb = (unsigned int*)MICRODEV_FPGA_INTENB_REG;
volatile unsigned int * const intdsb = (unsigned int*)MICRODEV_FPGA_INTDSB_REG;
volatile unsigned int * const intpria = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(0);
volatile unsigned int * const intprib = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(8);
volatile unsigned int * const intpric = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(16);
volatile unsigned int * const intprid = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(24);
volatile unsigned int * const intsrc = (unsigned int*)MICRODEV_FPGA_INTSRC_REG;
volatile unsigned int * const intreq = (unsigned int*)MICRODEV_FPGA_INTREQ_REG;
printk("-------------------------- microdev_print_fpga_intc_status() ------------------\n");
printk("FPGA_INTENB = 0x%08x\n", *intenb);
printk("FPGA_INTDSB = 0x%08x\n", *intdsb);
printk("FPGA_INTSRC = 0x%08x\n", *intsrc);
printk("FPGA_INTREQ = 0x%08x\n", *intreq);
printk("FPGA_INTPRI[3..0] = %08x:%08x:%08x:%08x\n", *intprid, *intpric, *intprib, *intpria);
printk("-------------------------------------------------------------------------------\n");
}
| gpl-2.0 |
avsm/linux-2.6.32-xen-oprofile | drivers/mtd/ubi/vtbl.c | 493 | 24757 | /*
* Copyright (c) International Business Machines Corp., 2006
* Copyright (c) Nokia Corporation, 2006, 2007
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
* the GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* Author: Artem Bityutskiy (Битюцкий Артём)
*/
/*
* This file includes volume table manipulation code. The volume table is an
* on-flash table containing volume meta-data like name, number of reserved
* physical eraseblocks, type, etc. The volume table is stored in the so-called
* "layout volume".
*
* The layout volume is an internal volume which is organized as follows. It
* consists of two logical eraseblocks - LEB 0 and LEB 1. Each logical
* eraseblock stores one volume table copy, i.e. LEB 0 and LEB 1 duplicate each
* other. This redundancy guarantees robustness to unclean reboots. The volume
* table is basically an array of volume table records. Each record contains
* full information about the volume and protected by a CRC checksum.
*
* The volume table is changed, it is first changed in RAM. Then LEB 0 is
* erased, and the updated volume table is written back to LEB 0. Then same for
* LEB 1. This scheme guarantees recoverability from unclean reboots.
*
* In this UBI implementation the on-flash volume table does not contain any
* information about how many data static volumes contain. This information may
* be found from the scanning data.
*
* But it would still be beneficial to store this information in the volume
* table. For example, suppose we have a static volume X, and all its physical
* eraseblocks became bad for some reasons. Suppose we are attaching the
* corresponding MTD device, the scanning has found no logical eraseblocks
* corresponding to the volume X. According to the volume table volume X does
* exist. So we don't know whether it is just empty or all its physical
* eraseblocks went bad. So we cannot alarm the user about this corruption.
*
* The volume table also stores so-called "update marker", which is used for
* volume updates. Before updating the volume, the update marker is set, and
* after the update operation is finished, the update marker is cleared. So if
* the update operation was interrupted (e.g. by an unclean reboot) - the
* update marker is still there and we know that the volume's contents is
* damaged.
*/
#include <linux/crc32.h>
#include <linux/err.h>
#include <asm/div64.h>
#include "ubi.h"
#ifdef CONFIG_MTD_UBI_DEBUG_PARANOID
static void paranoid_vtbl_check(const struct ubi_device *ubi);
#else
#define paranoid_vtbl_check(ubi)
#endif
/* Empty volume table record */
static struct ubi_vtbl_record empty_vtbl_record;
/**
* ubi_change_vtbl_record - change volume table record.
* @ubi: UBI device description object
* @idx: table index to change
* @vtbl_rec: new volume table record
*
* This function changes volume table record @idx. If @vtbl_rec is %NULL, empty
* volume table record is written. The caller does not have to calculate CRC of
* the record as it is done by this function. Returns zero in case of success
* and a negative error code in case of failure.
*/
int ubi_change_vtbl_record(struct ubi_device *ubi, int idx,
struct ubi_vtbl_record *vtbl_rec)
{
int i, err;
uint32_t crc;
struct ubi_volume *layout_vol;
ubi_assert(idx >= 0 && idx < ubi->vtbl_slots);
layout_vol = ubi->volumes[vol_id2idx(ubi, UBI_LAYOUT_VOLUME_ID)];
if (!vtbl_rec)
vtbl_rec = &empty_vtbl_record;
else {
crc = crc32(UBI_CRC32_INIT, vtbl_rec, UBI_VTBL_RECORD_SIZE_CRC);
vtbl_rec->crc = cpu_to_be32(crc);
}
memcpy(&ubi->vtbl[idx], vtbl_rec, sizeof(struct ubi_vtbl_record));
for (i = 0; i < UBI_LAYOUT_VOLUME_EBS; i++) {
err = ubi_eba_unmap_leb(ubi, layout_vol, i);
if (err)
return err;
err = ubi_eba_write_leb(ubi, layout_vol, i, ubi->vtbl, 0,
ubi->vtbl_size, UBI_LONGTERM);
if (err)
return err;
}
paranoid_vtbl_check(ubi);
return 0;
}
/**
* ubi_vtbl_rename_volumes - rename UBI volumes in the volume table.
* @ubi: UBI device description object
* @rename_list: list of &struct ubi_rename_entry objects
*
* This function re-names multiple volumes specified in @req in the volume
* table. Returns zero in case of success and a negative error code in case of
* failure.
*/
int ubi_vtbl_rename_volumes(struct ubi_device *ubi,
struct list_head *rename_list)
{
int i, err;
struct ubi_rename_entry *re;
struct ubi_volume *layout_vol;
list_for_each_entry(re, rename_list, list) {
uint32_t crc;
struct ubi_volume *vol = re->desc->vol;
struct ubi_vtbl_record *vtbl_rec = &ubi->vtbl[vol->vol_id];
if (re->remove) {
memcpy(vtbl_rec, &empty_vtbl_record,
sizeof(struct ubi_vtbl_record));
continue;
}
vtbl_rec->name_len = cpu_to_be16(re->new_name_len);
memcpy(vtbl_rec->name, re->new_name, re->new_name_len);
memset(vtbl_rec->name + re->new_name_len, 0,
UBI_VOL_NAME_MAX + 1 - re->new_name_len);
crc = crc32(UBI_CRC32_INIT, vtbl_rec,
UBI_VTBL_RECORD_SIZE_CRC);
vtbl_rec->crc = cpu_to_be32(crc);
}
layout_vol = ubi->volumes[vol_id2idx(ubi, UBI_LAYOUT_VOLUME_ID)];
for (i = 0; i < UBI_LAYOUT_VOLUME_EBS; i++) {
err = ubi_eba_unmap_leb(ubi, layout_vol, i);
if (err)
return err;
err = ubi_eba_write_leb(ubi, layout_vol, i, ubi->vtbl, 0,
ubi->vtbl_size, UBI_LONGTERM);
if (err)
return err;
}
return 0;
}
/**
* vtbl_check - check if volume table is not corrupted and sensible.
* @ubi: UBI device description object
* @vtbl: volume table
*
* This function returns zero if @vtbl is all right, %1 if CRC is incorrect,
* and %-EINVAL if it contains inconsistent data.
*/
static int vtbl_check(const struct ubi_device *ubi,
const struct ubi_vtbl_record *vtbl)
{
int i, n, reserved_pebs, alignment, data_pad, vol_type, name_len;
int upd_marker, err;
uint32_t crc;
const char *name;
for (i = 0; i < ubi->vtbl_slots; i++) {
cond_resched();
reserved_pebs = be32_to_cpu(vtbl[i].reserved_pebs);
alignment = be32_to_cpu(vtbl[i].alignment);
data_pad = be32_to_cpu(vtbl[i].data_pad);
upd_marker = vtbl[i].upd_marker;
vol_type = vtbl[i].vol_type;
name_len = be16_to_cpu(vtbl[i].name_len);
name = &vtbl[i].name[0];
crc = crc32(UBI_CRC32_INIT, &vtbl[i], UBI_VTBL_RECORD_SIZE_CRC);
if (be32_to_cpu(vtbl[i].crc) != crc) {
ubi_err("bad CRC at record %u: %#08x, not %#08x",
i, crc, be32_to_cpu(vtbl[i].crc));
ubi_dbg_dump_vtbl_record(&vtbl[i], i);
return 1;
}
if (reserved_pebs == 0) {
if (memcmp(&vtbl[i], &empty_vtbl_record,
UBI_VTBL_RECORD_SIZE)) {
err = 2;
goto bad;
}
continue;
}
if (reserved_pebs < 0 || alignment < 0 || data_pad < 0 ||
name_len < 0) {
err = 3;
goto bad;
}
if (alignment > ubi->leb_size || alignment == 0) {
err = 4;
goto bad;
}
n = alignment & (ubi->min_io_size - 1);
if (alignment != 1 && n) {
err = 5;
goto bad;
}
n = ubi->leb_size % alignment;
if (data_pad != n) {
dbg_err("bad data_pad, has to be %d", n);
err = 6;
goto bad;
}
if (vol_type != UBI_VID_DYNAMIC && vol_type != UBI_VID_STATIC) {
err = 7;
goto bad;
}
if (upd_marker != 0 && upd_marker != 1) {
err = 8;
goto bad;
}
if (reserved_pebs > ubi->good_peb_count) {
dbg_err("too large reserved_pebs %d, good PEBs %d",
reserved_pebs, ubi->good_peb_count);
err = 9;
goto bad;
}
if (name_len > UBI_VOL_NAME_MAX) {
err = 10;
goto bad;
}
if (name[0] == '\0') {
err = 11;
goto bad;
}
if (name_len != strnlen(name, name_len + 1)) {
err = 12;
goto bad;
}
}
/* Checks that all names are unique */
for (i = 0; i < ubi->vtbl_slots - 1; i++) {
for (n = i + 1; n < ubi->vtbl_slots; n++) {
int len1 = be16_to_cpu(vtbl[i].name_len);
int len2 = be16_to_cpu(vtbl[n].name_len);
if (len1 > 0 && len1 == len2 &&
!strncmp(vtbl[i].name, vtbl[n].name, len1)) {
ubi_err("volumes %d and %d have the same name"
" \"%s\"", i, n, vtbl[i].name);
ubi_dbg_dump_vtbl_record(&vtbl[i], i);
ubi_dbg_dump_vtbl_record(&vtbl[n], n);
return -EINVAL;
}
}
}
return 0;
bad:
ubi_err("volume table check failed: record %d, error %d", i, err);
ubi_dbg_dump_vtbl_record(&vtbl[i], i);
return -EINVAL;
}
/**
* create_vtbl - create a copy of volume table.
* @ubi: UBI device description object
* @si: scanning information
* @copy: number of the volume table copy
* @vtbl: contents of the volume table
*
* This function returns zero in case of success and a negative error code in
* case of failure.
*/
static int create_vtbl(struct ubi_device *ubi, struct ubi_scan_info *si,
int copy, void *vtbl)
{
int err, tries = 0;
static struct ubi_vid_hdr *vid_hdr;
struct ubi_scan_volume *sv;
struct ubi_scan_leb *new_seb, *old_seb = NULL;
ubi_msg("create volume table (copy #%d)", copy + 1);
vid_hdr = ubi_zalloc_vid_hdr(ubi, GFP_KERNEL);
if (!vid_hdr)
return -ENOMEM;
/*
* Check if there is a logical eraseblock which would have to contain
* this volume table copy was found during scanning. It has to be wiped
* out.
*/
sv = ubi_scan_find_sv(si, UBI_LAYOUT_VOLUME_ID);
if (sv)
old_seb = ubi_scan_find_seb(sv, copy);
retry:
new_seb = ubi_scan_get_free_peb(ubi, si);
if (IS_ERR(new_seb)) {
err = PTR_ERR(new_seb);
goto out_free;
}
vid_hdr->vol_type = UBI_VID_DYNAMIC;
vid_hdr->vol_id = cpu_to_be32(UBI_LAYOUT_VOLUME_ID);
vid_hdr->compat = UBI_LAYOUT_VOLUME_COMPAT;
vid_hdr->data_size = vid_hdr->used_ebs =
vid_hdr->data_pad = cpu_to_be32(0);
vid_hdr->lnum = cpu_to_be32(copy);
vid_hdr->sqnum = cpu_to_be64(++si->max_sqnum);
/* The EC header is already there, write the VID header */
err = ubi_io_write_vid_hdr(ubi, new_seb->pnum, vid_hdr);
if (err)
goto write_error;
/* Write the layout volume contents */
err = ubi_io_write_data(ubi, vtbl, new_seb->pnum, 0, ubi->vtbl_size);
if (err)
goto write_error;
/*
* And add it to the scanning information. Don't delete the old
* @old_seb as it will be deleted and freed in 'ubi_scan_add_used()'.
*/
err = ubi_scan_add_used(ubi, si, new_seb->pnum, new_seb->ec,
vid_hdr, 0);
kfree(new_seb);
ubi_free_vid_hdr(ubi, vid_hdr);
return err;
write_error:
if (err == -EIO && ++tries <= 5) {
/*
* Probably this physical eraseblock went bad, try to pick
* another one.
*/
list_add_tail(&new_seb->u.list, &si->corr);
goto retry;
}
kfree(new_seb);
out_free:
ubi_free_vid_hdr(ubi, vid_hdr);
return err;
}
/**
* process_lvol - process the layout volume.
* @ubi: UBI device description object
* @si: scanning information
* @sv: layout volume scanning information
*
* This function is responsible for reading the layout volume, ensuring it is
* not corrupted, and recovering from corruptions if needed. Returns volume
* table in case of success and a negative error code in case of failure.
*/
static struct ubi_vtbl_record *process_lvol(struct ubi_device *ubi,
struct ubi_scan_info *si,
struct ubi_scan_volume *sv)
{
int err;
struct rb_node *rb;
struct ubi_scan_leb *seb;
struct ubi_vtbl_record *leb[UBI_LAYOUT_VOLUME_EBS] = { NULL, NULL };
int leb_corrupted[UBI_LAYOUT_VOLUME_EBS] = {1, 1};
/*
* UBI goes through the following steps when it changes the layout
* volume:
* a. erase LEB 0;
* b. write new data to LEB 0;
* c. erase LEB 1;
* d. write new data to LEB 1.
*
* Before the change, both LEBs contain the same data.
*
* Due to unclean reboots, the contents of LEB 0 may be lost, but there
* should LEB 1. So it is OK if LEB 0 is corrupted while LEB 1 is not.
* Similarly, LEB 1 may be lost, but there should be LEB 0. And
* finally, unclean reboots may result in a situation when neither LEB
* 0 nor LEB 1 are corrupted, but they are different. In this case, LEB
* 0 contains more recent information.
*
* So the plan is to first check LEB 0. Then
* a. if LEB 0 is OK, it must be containing the most resent data; then
* we compare it with LEB 1, and if they are different, we copy LEB
* 0 to LEB 1;
* b. if LEB 0 is corrupted, but LEB 1 has to be OK, and we copy LEB 1
* to LEB 0.
*/
dbg_gen("check layout volume");
/* Read both LEB 0 and LEB 1 into memory */
ubi_rb_for_each_entry(rb, seb, &sv->root, u.rb) {
leb[seb->lnum] = vmalloc(ubi->vtbl_size);
if (!leb[seb->lnum]) {
err = -ENOMEM;
goto out_free;
}
memset(leb[seb->lnum], 0, ubi->vtbl_size);
err = ubi_io_read_data(ubi, leb[seb->lnum], seb->pnum, 0,
ubi->vtbl_size);
if (err == UBI_IO_BITFLIPS || err == -EBADMSG)
/*
* Scrub the PEB later. Note, -EBADMSG indicates an
* uncorrectable ECC error, but we have our own CRC and
* the data will be checked later. If the data is OK,
* the PEB will be scrubbed (because we set
* seb->scrub). If the data is not OK, the contents of
* the PEB will be recovered from the second copy, and
* seb->scrub will be cleared in
* 'ubi_scan_add_used()'.
*/
seb->scrub = 1;
else if (err)
goto out_free;
}
err = -EINVAL;
if (leb[0]) {
leb_corrupted[0] = vtbl_check(ubi, leb[0]);
if (leb_corrupted[0] < 0)
goto out_free;
}
if (!leb_corrupted[0]) {
/* LEB 0 is OK */
if (leb[1])
leb_corrupted[1] = memcmp(leb[0], leb[1],
ubi->vtbl_size);
if (leb_corrupted[1]) {
ubi_warn("volume table copy #2 is corrupted");
err = create_vtbl(ubi, si, 1, leb[0]);
if (err)
goto out_free;
ubi_msg("volume table was restored");
}
/* Both LEB 1 and LEB 2 are OK and consistent */
vfree(leb[1]);
return leb[0];
} else {
/* LEB 0 is corrupted or does not exist */
if (leb[1]) {
leb_corrupted[1] = vtbl_check(ubi, leb[1]);
if (leb_corrupted[1] < 0)
goto out_free;
}
if (leb_corrupted[1]) {
/* Both LEB 0 and LEB 1 are corrupted */
ubi_err("both volume tables are corrupted");
goto out_free;
}
ubi_warn("volume table copy #1 is corrupted");
err = create_vtbl(ubi, si, 0, leb[1]);
if (err)
goto out_free;
ubi_msg("volume table was restored");
vfree(leb[0]);
return leb[1];
}
out_free:
vfree(leb[0]);
vfree(leb[1]);
return ERR_PTR(err);
}
/**
* create_empty_lvol - create empty layout volume.
* @ubi: UBI device description object
* @si: scanning information
*
* This function returns volume table contents in case of success and a
* negative error code in case of failure.
*/
static struct ubi_vtbl_record *create_empty_lvol(struct ubi_device *ubi,
struct ubi_scan_info *si)
{
int i;
struct ubi_vtbl_record *vtbl;
vtbl = vmalloc(ubi->vtbl_size);
if (!vtbl)
return ERR_PTR(-ENOMEM);
memset(vtbl, 0, ubi->vtbl_size);
for (i = 0; i < ubi->vtbl_slots; i++)
memcpy(&vtbl[i], &empty_vtbl_record, UBI_VTBL_RECORD_SIZE);
for (i = 0; i < UBI_LAYOUT_VOLUME_EBS; i++) {
int err;
err = create_vtbl(ubi, si, i, vtbl);
if (err) {
vfree(vtbl);
return ERR_PTR(err);
}
}
return vtbl;
}
/**
* init_volumes - initialize volume information for existing volumes.
* @ubi: UBI device description object
* @si: scanning information
* @vtbl: volume table
*
* This function allocates volume description objects for existing volumes.
* Returns zero in case of success and a negative error code in case of
* failure.
*/
static int init_volumes(struct ubi_device *ubi, const struct ubi_scan_info *si,
const struct ubi_vtbl_record *vtbl)
{
int i, reserved_pebs = 0;
struct ubi_scan_volume *sv;
struct ubi_volume *vol;
for (i = 0; i < ubi->vtbl_slots; i++) {
cond_resched();
if (be32_to_cpu(vtbl[i].reserved_pebs) == 0)
continue; /* Empty record */
vol = kzalloc(sizeof(struct ubi_volume), GFP_KERNEL);
if (!vol)
return -ENOMEM;
vol->reserved_pebs = be32_to_cpu(vtbl[i].reserved_pebs);
vol->alignment = be32_to_cpu(vtbl[i].alignment);
vol->data_pad = be32_to_cpu(vtbl[i].data_pad);
vol->upd_marker = vtbl[i].upd_marker;
vol->vol_type = vtbl[i].vol_type == UBI_VID_DYNAMIC ?
UBI_DYNAMIC_VOLUME : UBI_STATIC_VOLUME;
vol->name_len = be16_to_cpu(vtbl[i].name_len);
vol->usable_leb_size = ubi->leb_size - vol->data_pad;
memcpy(vol->name, vtbl[i].name, vol->name_len);
vol->name[vol->name_len] = '\0';
vol->vol_id = i;
if (vtbl[i].flags & UBI_VTBL_AUTORESIZE_FLG) {
/* Auto re-size flag may be set only for one volume */
if (ubi->autoresize_vol_id != -1) {
ubi_err("more than one auto-resize volume (%d "
"and %d)", ubi->autoresize_vol_id, i);
kfree(vol);
return -EINVAL;
}
ubi->autoresize_vol_id = i;
}
ubi_assert(!ubi->volumes[i]);
ubi->volumes[i] = vol;
ubi->vol_count += 1;
vol->ubi = ubi;
reserved_pebs += vol->reserved_pebs;
/*
* In case of dynamic volume UBI knows nothing about how many
* data is stored there. So assume the whole volume is used.
*/
if (vol->vol_type == UBI_DYNAMIC_VOLUME) {
vol->used_ebs = vol->reserved_pebs;
vol->last_eb_bytes = vol->usable_leb_size;
vol->used_bytes =
(long long)vol->used_ebs * vol->usable_leb_size;
continue;
}
/* Static volumes only */
sv = ubi_scan_find_sv(si, i);
if (!sv) {
/*
* No eraseblocks belonging to this volume found. We
* don't actually know whether this static volume is
* completely corrupted or just contains no data. And
* we cannot know this as long as data size is not
* stored on flash. So we just assume the volume is
* empty. FIXME: this should be handled.
*/
continue;
}
if (sv->leb_count != sv->used_ebs) {
/*
* We found a static volume which misses several
* eraseblocks. Treat it as corrupted.
*/
ubi_warn("static volume %d misses %d LEBs - corrupted",
sv->vol_id, sv->used_ebs - sv->leb_count);
vol->corrupted = 1;
continue;
}
vol->used_ebs = sv->used_ebs;
vol->used_bytes =
(long long)(vol->used_ebs - 1) * vol->usable_leb_size;
vol->used_bytes += sv->last_data_size;
vol->last_eb_bytes = sv->last_data_size;
}
/* And add the layout volume */
vol = kzalloc(sizeof(struct ubi_volume), GFP_KERNEL);
if (!vol)
return -ENOMEM;
vol->reserved_pebs = UBI_LAYOUT_VOLUME_EBS;
vol->alignment = 1;
vol->vol_type = UBI_DYNAMIC_VOLUME;
vol->name_len = sizeof(UBI_LAYOUT_VOLUME_NAME) - 1;
memcpy(vol->name, UBI_LAYOUT_VOLUME_NAME, vol->name_len + 1);
vol->usable_leb_size = ubi->leb_size;
vol->used_ebs = vol->reserved_pebs;
vol->last_eb_bytes = vol->reserved_pebs;
vol->used_bytes =
(long long)vol->used_ebs * (ubi->leb_size - vol->data_pad);
vol->vol_id = UBI_LAYOUT_VOLUME_ID;
vol->ref_count = 1;
ubi_assert(!ubi->volumes[i]);
ubi->volumes[vol_id2idx(ubi, vol->vol_id)] = vol;
reserved_pebs += vol->reserved_pebs;
ubi->vol_count += 1;
vol->ubi = ubi;
if (reserved_pebs > ubi->avail_pebs)
ubi_err("not enough PEBs, required %d, available %d",
reserved_pebs, ubi->avail_pebs);
ubi->rsvd_pebs += reserved_pebs;
ubi->avail_pebs -= reserved_pebs;
return 0;
}
/**
* check_sv - check volume scanning information.
* @vol: UBI volume description object
* @sv: volume scanning information
*
* This function returns zero if the volume scanning information is consistent
* to the data read from the volume tabla, and %-EINVAL if not.
*/
static int check_sv(const struct ubi_volume *vol,
const struct ubi_scan_volume *sv)
{
int err;
if (sv->highest_lnum >= vol->reserved_pebs) {
err = 1;
goto bad;
}
if (sv->leb_count > vol->reserved_pebs) {
err = 2;
goto bad;
}
if (sv->vol_type != vol->vol_type) {
err = 3;
goto bad;
}
if (sv->used_ebs > vol->reserved_pebs) {
err = 4;
goto bad;
}
if (sv->data_pad != vol->data_pad) {
err = 5;
goto bad;
}
return 0;
bad:
ubi_err("bad scanning information, error %d", err);
ubi_dbg_dump_sv(sv);
ubi_dbg_dump_vol_info(vol);
return -EINVAL;
}
/**
* check_scanning_info - check that scanning information.
* @ubi: UBI device description object
* @si: scanning information
*
* Even though we protect on-flash data by CRC checksums, we still don't trust
* the media. This function ensures that scanning information is consistent to
* the information read from the volume table. Returns zero if the scanning
* information is OK and %-EINVAL if it is not.
*/
static int check_scanning_info(const struct ubi_device *ubi,
struct ubi_scan_info *si)
{
int err, i;
struct ubi_scan_volume *sv;
struct ubi_volume *vol;
if (si->vols_found > UBI_INT_VOL_COUNT + ubi->vtbl_slots) {
ubi_err("scanning found %d volumes, maximum is %d + %d",
si->vols_found, UBI_INT_VOL_COUNT, ubi->vtbl_slots);
return -EINVAL;
}
if (si->highest_vol_id >= ubi->vtbl_slots + UBI_INT_VOL_COUNT &&
si->highest_vol_id < UBI_INTERNAL_VOL_START) {
ubi_err("too large volume ID %d found by scanning",
si->highest_vol_id);
return -EINVAL;
}
for (i = 0; i < ubi->vtbl_slots + UBI_INT_VOL_COUNT; i++) {
cond_resched();
sv = ubi_scan_find_sv(si, i);
vol = ubi->volumes[i];
if (!vol) {
if (sv)
ubi_scan_rm_volume(si, sv);
continue;
}
if (vol->reserved_pebs == 0) {
ubi_assert(i < ubi->vtbl_slots);
if (!sv)
continue;
/*
* During scanning we found a volume which does not
* exist according to the information in the volume
* table. This must have happened due to an unclean
* reboot while the volume was being removed. Discard
* these eraseblocks.
*/
ubi_msg("finish volume %d removal", sv->vol_id);
ubi_scan_rm_volume(si, sv);
} else if (sv) {
err = check_sv(vol, sv);
if (err)
return err;
}
}
return 0;
}
/**
* ubi_read_volume_table - read the volume table.
* @ubi: UBI device description object
* @si: scanning information
*
* This function reads volume table, checks it, recover from errors if needed,
* or creates it if needed. Returns zero in case of success and a negative
* error code in case of failure.
*/
int ubi_read_volume_table(struct ubi_device *ubi, struct ubi_scan_info *si)
{
int i, err;
struct ubi_scan_volume *sv;
empty_vtbl_record.crc = cpu_to_be32(0xf116c36b);
/*
* The number of supported volumes is limited by the eraseblock size
* and by the UBI_MAX_VOLUMES constant.
*/
ubi->vtbl_slots = ubi->leb_size / UBI_VTBL_RECORD_SIZE;
if (ubi->vtbl_slots > UBI_MAX_VOLUMES)
ubi->vtbl_slots = UBI_MAX_VOLUMES;
ubi->vtbl_size = ubi->vtbl_slots * UBI_VTBL_RECORD_SIZE;
ubi->vtbl_size = ALIGN(ubi->vtbl_size, ubi->min_io_size);
sv = ubi_scan_find_sv(si, UBI_LAYOUT_VOLUME_ID);
if (!sv) {
/*
* No logical eraseblocks belonging to the layout volume were
* found. This could mean that the flash is just empty. In
* this case we create empty layout volume.
*
* But if flash is not empty this must be a corruption or the
* MTD device just contains garbage.
*/
if (si->is_empty) {
ubi->vtbl = create_empty_lvol(ubi, si);
if (IS_ERR(ubi->vtbl))
return PTR_ERR(ubi->vtbl);
} else {
ubi_err("the layout volume was not found");
return -EINVAL;
}
} else {
if (sv->leb_count > UBI_LAYOUT_VOLUME_EBS) {
/* This must not happen with proper UBI images */
dbg_err("too many LEBs (%d) in layout volume",
sv->leb_count);
return -EINVAL;
}
ubi->vtbl = process_lvol(ubi, si, sv);
if (IS_ERR(ubi->vtbl))
return PTR_ERR(ubi->vtbl);
}
ubi->avail_pebs = ubi->good_peb_count;
/*
* The layout volume is OK, initialize the corresponding in-RAM data
* structures.
*/
err = init_volumes(ubi, si, ubi->vtbl);
if (err)
goto out_free;
/*
* Get sure that the scanning information is consistent to the
* information stored in the volume table.
*/
err = check_scanning_info(ubi, si);
if (err)
goto out_free;
return 0;
out_free:
vfree(ubi->vtbl);
for (i = 0; i < ubi->vtbl_slots + UBI_INT_VOL_COUNT; i++) {
kfree(ubi->volumes[i]);
ubi->volumes[i] = NULL;
}
return err;
}
#ifdef CONFIG_MTD_UBI_DEBUG_PARANOID
/**
* paranoid_vtbl_check - check volume table.
* @ubi: UBI device description object
*/
static void paranoid_vtbl_check(const struct ubi_device *ubi)
{
if (vtbl_check(ubi, ubi->vtbl)) {
ubi_err("paranoid check failed");
BUG();
}
}
#endif /* CONFIG_MTD_UBI_DEBUG_PARANOID */
| gpl-2.0 |
kipill-nn/kernel-touch2 | arch/arm/plat-iop/io.c | 749 | 1684 | /*
* iop3xx custom ioremap implementation
* Copyright (c) 2006, Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
* Place - Suite 330, Boston, MA 02111-1307 USA.
*
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/io.h>
#include <mach/hardware.h>
void * __iomem __iop3xx_ioremap(unsigned long cookie, size_t size,
unsigned int mtype)
{
void __iomem * retval;
switch (cookie) {
case IOP3XX_PCI_LOWER_IO_PA ... IOP3XX_PCI_UPPER_IO_PA:
retval = (void *) IOP3XX_PCI_IO_PHYS_TO_VIRT(cookie);
break;
case IOP3XX_PERIPHERAL_PHYS_BASE ... IOP3XX_PERIPHERAL_UPPER_PA:
retval = (void *) IOP3XX_PMMR_PHYS_TO_VIRT(cookie);
break;
default:
retval = __arm_ioremap(cookie, size, mtype);
}
return retval;
}
EXPORT_SYMBOL(__iop3xx_ioremap);
void __iop3xx_iounmap(void __iomem *addr)
{
extern void __iounmap(volatile void __iomem *addr);
switch ((u32) addr) {
case IOP3XX_PCI_LOWER_IO_VA ... IOP3XX_PCI_UPPER_IO_VA:
case IOP3XX_PERIPHERAL_VIRT_BASE ... IOP3XX_PERIPHERAL_UPPER_VA:
goto skip;
}
__iounmap(addr);
skip:
return;
}
EXPORT_SYMBOL(__iop3xx_iounmap);
| gpl-2.0 |
snegovick/linux | drivers/staging/lustre/lustre/libcfs/kernel_user_comm.c | 749 | 6033 | /*
* GPL HEADER START
*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 only,
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License version 2 for more details (a copy is included
* in the LICENSE file that accompanied this code).
*
* You should have received a copy of the GNU General Public License
* version 2 along with this program; If not, see
* http://www.sun.com/software/products/lustre/docs/GPLv2.pdf
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
* CA 95054 USA or visit www.sun.com if you need additional information or
* have any questions.
*
* GPL HEADER END
*/
/*
* Copyright (c) 2010, Oracle and/or its affiliates. All rights reserved.
* Use is subject to license terms.
*
* Copyright (c) 2012, Intel Corporation.
*/
/*
* This file is part of Lustre, http://www.lustre.org/
* Lustre is a trademark of Sun Microsystems, Inc.
*
* Author: Nathan Rutman <nathan.rutman@sun.com>
*
* Kernel <-> userspace communication routines.
* Using pipes for all arches.
*/
#define DEBUG_SUBSYSTEM S_CLASS
#define D_KUC D_OTHER
#include "../../include/linux/libcfs/libcfs.h"
/* This is the kernel side (liblustre as well). */
/**
* libcfs_kkuc_msg_put - send an message from kernel to userspace
* @param fp to send the message to
* @param payload Payload data. First field of payload is always
* struct kuc_hdr
*/
int libcfs_kkuc_msg_put(struct file *filp, void *payload)
{
struct kuc_hdr *kuch = (struct kuc_hdr *)payload;
ssize_t count = kuch->kuc_msglen;
loff_t offset = 0;
mm_segment_t fs;
int rc = -ENOSYS;
if (filp == NULL || IS_ERR(filp))
return -EBADF;
if (kuch->kuc_magic != KUC_MAGIC) {
CERROR("KernelComm: bad magic %x\n", kuch->kuc_magic);
return -ENOSYS;
}
fs = get_fs();
set_fs(KERNEL_DS);
while (count > 0) {
rc = vfs_write(filp, (void __force __user *)payload,
count, &offset);
if (rc < 0)
break;
count -= rc;
payload += rc;
rc = 0;
}
set_fs(fs);
if (rc < 0)
CWARN("message send failed (%d)\n", rc);
else
CDEBUG(D_KUC, "Sent message rc=%d, fp=%p\n", rc, filp);
return rc;
}
EXPORT_SYMBOL(libcfs_kkuc_msg_put);
/* Broadcast groups are global across all mounted filesystems;
* i.e. registering for a group on 1 fs will get messages for that
* group from any fs */
/** A single group registration has a uid and a file pointer */
struct kkuc_reg {
struct list_head kr_chain;
int kr_uid;
struct file *kr_fp;
__u32 kr_data;
};
static struct list_head kkuc_groups[KUC_GRP_MAX+1] = {};
/* Protect message sending against remove and adds */
static DECLARE_RWSEM(kg_sem);
/** Add a receiver to a broadcast group
* @param filp pipe to write into
* @param uid identifier for this receiver
* @param group group number
*/
int libcfs_kkuc_group_add(struct file *filp, int uid, int group, __u32 data)
{
struct kkuc_reg *reg;
if (group > KUC_GRP_MAX) {
CDEBUG(D_WARNING, "Kernelcomm: bad group %d\n", group);
return -EINVAL;
}
/* fput in group_rem */
if (filp == NULL)
return -EBADF;
/* freed in group_rem */
reg = kmalloc(sizeof(*reg), 0);
if (reg == NULL)
return -ENOMEM;
reg->kr_fp = filp;
reg->kr_uid = uid;
reg->kr_data = data;
down_write(&kg_sem);
if (kkuc_groups[group].next == NULL)
INIT_LIST_HEAD(&kkuc_groups[group]);
list_add(®->kr_chain, &kkuc_groups[group]);
up_write(&kg_sem);
CDEBUG(D_KUC, "Added uid=%d fp=%p to group %d\n", uid, filp, group);
return 0;
}
EXPORT_SYMBOL(libcfs_kkuc_group_add);
int libcfs_kkuc_group_rem(int uid, int group)
{
struct kkuc_reg *reg, *next;
if (kkuc_groups[group].next == NULL)
return 0;
if (uid == 0) {
/* Broadcast a shutdown message */
struct kuc_hdr lh;
lh.kuc_magic = KUC_MAGIC;
lh.kuc_transport = KUC_TRANSPORT_GENERIC;
lh.kuc_msgtype = KUC_MSG_SHUTDOWN;
lh.kuc_msglen = sizeof(lh);
libcfs_kkuc_group_put(group, &lh);
}
down_write(&kg_sem);
list_for_each_entry_safe(reg, next, &kkuc_groups[group], kr_chain) {
if ((uid == 0) || (uid == reg->kr_uid)) {
list_del(®->kr_chain);
CDEBUG(D_KUC, "Removed uid=%d fp=%p from group %d\n",
reg->kr_uid, reg->kr_fp, group);
if (reg->kr_fp != NULL)
fput(reg->kr_fp);
kfree(reg);
}
}
up_write(&kg_sem);
return 0;
}
EXPORT_SYMBOL(libcfs_kkuc_group_rem);
int libcfs_kkuc_group_put(int group, void *payload)
{
struct kkuc_reg *reg;
int rc = 0;
int one_success = 0;
down_read(&kg_sem);
list_for_each_entry(reg, &kkuc_groups[group], kr_chain) {
if (reg->kr_fp != NULL) {
rc = libcfs_kkuc_msg_put(reg->kr_fp, payload);
if (rc == 0)
one_success = 1;
else if (rc == -EPIPE) {
fput(reg->kr_fp);
reg->kr_fp = NULL;
}
}
}
up_read(&kg_sem);
/* don't return an error if the message has been delivered
* at least to one agent */
if (one_success)
rc = 0;
return rc;
}
EXPORT_SYMBOL(libcfs_kkuc_group_put);
/**
* Calls a callback function for each link of the given kuc group.
* @param group the group to call the function on.
* @param cb_func the function to be called.
* @param cb_arg iextra argument to be passed to the callback function.
*/
int libcfs_kkuc_group_foreach(int group, libcfs_kkuc_cb_t cb_func,
void *cb_arg)
{
struct kkuc_reg *reg;
int rc = 0;
if (group > KUC_GRP_MAX) {
CDEBUG(D_WARNING, "Kernelcomm: bad group %d\n", group);
return -EINVAL;
}
/* no link for this group */
if (kkuc_groups[group].next == NULL)
return 0;
down_write(&kg_sem);
list_for_each_entry(reg, &kkuc_groups[group], kr_chain) {
if (reg->kr_fp != NULL)
rc = cb_func(reg->kr_data, cb_arg);
}
up_write(&kg_sem);
return rc;
}
EXPORT_SYMBOL(libcfs_kkuc_group_foreach);
| gpl-2.0 |
ExPeacer/Xperia-2011-Kernel | drivers/edac/edac_device_sysfs.c | 749 | 24121 | /*
* file for managing the edac_device class of devices for EDAC
*
* (C) 2007 SoftwareBitMaker (http://www.softwarebitmaker.com)
*
* This file may be distributed under the terms of the
* GNU General Public License.
*
* Written Doug Thompson <norsk5@xmission.com>
*
*/
#include <linux/ctype.h>
#include <linux/module.h>
#include "edac_core.h"
#include "edac_module.h"
#define EDAC_DEVICE_SYMLINK "device"
#define to_edacdev(k) container_of(k, struct edac_device_ctl_info, kobj)
#define to_edacdev_attr(a) container_of(a, struct edacdev_attribute, attr)
/*
* Set of edac_device_ctl_info attribute store/show functions
*/
/* 'log_ue' */
static ssize_t edac_device_ctl_log_ue_show(struct edac_device_ctl_info
*ctl_info, char *data)
{
return sprintf(data, "%u\n", ctl_info->log_ue);
}
static ssize_t edac_device_ctl_log_ue_store(struct edac_device_ctl_info
*ctl_info, const char *data,
size_t count)
{
/* if parameter is zero, turn off flag, if non-zero turn on flag */
ctl_info->log_ue = (simple_strtoul(data, NULL, 0) != 0);
return count;
}
/* 'log_ce' */
static ssize_t edac_device_ctl_log_ce_show(struct edac_device_ctl_info
*ctl_info, char *data)
{
return sprintf(data, "%u\n", ctl_info->log_ce);
}
static ssize_t edac_device_ctl_log_ce_store(struct edac_device_ctl_info
*ctl_info, const char *data,
size_t count)
{
/* if parameter is zero, turn off flag, if non-zero turn on flag */
ctl_info->log_ce = (simple_strtoul(data, NULL, 0) != 0);
return count;
}
/* 'panic_on_ue' */
static ssize_t edac_device_ctl_panic_on_ue_show(struct edac_device_ctl_info
*ctl_info, char *data)
{
return sprintf(data, "%u\n", ctl_info->panic_on_ue);
}
static ssize_t edac_device_ctl_panic_on_ue_store(struct edac_device_ctl_info
*ctl_info, const char *data,
size_t count)
{
/* if parameter is zero, turn off flag, if non-zero turn on flag */
ctl_info->panic_on_ue = (simple_strtoul(data, NULL, 0) != 0);
return count;
}
/* 'poll_msec' show and store functions*/
static ssize_t edac_device_ctl_poll_msec_show(struct edac_device_ctl_info
*ctl_info, char *data)
{
return sprintf(data, "%u\n", ctl_info->poll_msec);
}
static ssize_t edac_device_ctl_poll_msec_store(struct edac_device_ctl_info
*ctl_info, const char *data,
size_t count)
{
unsigned long value;
/* get the value and enforce that it is non-zero, must be at least
* one millisecond for the delay period, between scans
* Then cancel last outstanding delay for the work request
* and set a new one.
*/
value = simple_strtoul(data, NULL, 0);
edac_device_reset_delay_period(ctl_info, value);
return count;
}
/* edac_device_ctl_info specific attribute structure */
struct ctl_info_attribute {
struct attribute attr;
ssize_t(*show) (struct edac_device_ctl_info *, char *);
ssize_t(*store) (struct edac_device_ctl_info *, const char *, size_t);
};
#define to_ctl_info(k) container_of(k, struct edac_device_ctl_info, kobj)
#define to_ctl_info_attr(a) container_of(a,struct ctl_info_attribute,attr)
/* Function to 'show' fields from the edac_dev 'ctl_info' structure */
static ssize_t edac_dev_ctl_info_show(struct kobject *kobj,
struct attribute *attr, char *buffer)
{
struct edac_device_ctl_info *edac_dev = to_ctl_info(kobj);
struct ctl_info_attribute *ctl_info_attr = to_ctl_info_attr(attr);
if (ctl_info_attr->show)
return ctl_info_attr->show(edac_dev, buffer);
return -EIO;
}
/* Function to 'store' fields into the edac_dev 'ctl_info' structure */
static ssize_t edac_dev_ctl_info_store(struct kobject *kobj,
struct attribute *attr,
const char *buffer, size_t count)
{
struct edac_device_ctl_info *edac_dev = to_ctl_info(kobj);
struct ctl_info_attribute *ctl_info_attr = to_ctl_info_attr(attr);
if (ctl_info_attr->store)
return ctl_info_attr->store(edac_dev, buffer, count);
return -EIO;
}
/* edac_dev file operations for an 'ctl_info' */
static struct sysfs_ops device_ctl_info_ops = {
.show = edac_dev_ctl_info_show,
.store = edac_dev_ctl_info_store
};
#define CTL_INFO_ATTR(_name,_mode,_show,_store) \
static struct ctl_info_attribute attr_ctl_info_##_name = { \
.attr = {.name = __stringify(_name), .mode = _mode }, \
.show = _show, \
.store = _store, \
};
/* Declare the various ctl_info attributes here and their respective ops */
CTL_INFO_ATTR(log_ue, S_IRUGO | S_IWUSR,
edac_device_ctl_log_ue_show, edac_device_ctl_log_ue_store);
CTL_INFO_ATTR(log_ce, S_IRUGO | S_IWUSR,
edac_device_ctl_log_ce_show, edac_device_ctl_log_ce_store);
CTL_INFO_ATTR(panic_on_ue, S_IRUGO | S_IWUSR,
edac_device_ctl_panic_on_ue_show,
edac_device_ctl_panic_on_ue_store);
CTL_INFO_ATTR(poll_msec, S_IRUGO | S_IWUSR,
edac_device_ctl_poll_msec_show, edac_device_ctl_poll_msec_store);
/* Base Attributes of the EDAC_DEVICE ECC object */
static struct ctl_info_attribute *device_ctrl_attr[] = {
&attr_ctl_info_panic_on_ue,
&attr_ctl_info_log_ue,
&attr_ctl_info_log_ce,
&attr_ctl_info_poll_msec,
NULL,
};
/*
* edac_device_ctrl_master_release
*
* called when the reference count for the 'main' kobj
* for a edac_device control struct reaches zero
*
* Reference count model:
* One 'main' kobject for each control structure allocated.
* That main kobj is initially set to one AND
* the reference count for the EDAC 'core' module is
* bumped by one, thus added 'keep in memory' dependency.
*
* Each new internal kobj (in instances and blocks) then
* bumps the 'main' kobject.
*
* When they are released their release functions decrement
* the 'main' kobj.
*
* When the main kobj reaches zero (0) then THIS function
* is called which then decrements the EDAC 'core' module.
* When the module reference count reaches zero then the
* module no longer has dependency on keeping the release
* function code in memory and module can be unloaded.
*
* This will support several control objects as well, each
* with its own 'main' kobj.
*/
static void edac_device_ctrl_master_release(struct kobject *kobj)
{
struct edac_device_ctl_info *edac_dev = to_edacdev(kobj);
debugf4("%s() control index=%d\n", __func__, edac_dev->dev_idx);
/* decrement the EDAC CORE module ref count */
module_put(edac_dev->owner);
/* free the control struct containing the 'main' kobj
* passed in to this routine
*/
kfree(edac_dev);
}
/* ktype for the main (master) kobject */
static struct kobj_type ktype_device_ctrl = {
.release = edac_device_ctrl_master_release,
.sysfs_ops = &device_ctl_info_ops,
.default_attrs = (struct attribute **)device_ctrl_attr,
};
/*
* edac_device_register_sysfs_main_kobj
*
* perform the high level setup for the new edac_device instance
*
* Return: 0 SUCCESS
* !0 FAILURE
*/
int edac_device_register_sysfs_main_kobj(struct edac_device_ctl_info *edac_dev)
{
struct sysdev_class *edac_class;
int err;
debugf1("%s()\n", __func__);
/* get the /sys/devices/system/edac reference */
edac_class = edac_get_edac_class();
if (edac_class == NULL) {
debugf1("%s() no edac_class error\n", __func__);
err = -ENODEV;
goto err_out;
}
/* Point to the 'edac_class' this instance 'reports' to */
edac_dev->edac_class = edac_class;
/* Init the devices's kobject */
memset(&edac_dev->kobj, 0, sizeof(struct kobject));
/* Record which module 'owns' this control structure
* and bump the ref count of the module
*/
edac_dev->owner = THIS_MODULE;
if (!try_module_get(edac_dev->owner)) {
err = -ENODEV;
goto err_out;
}
/* register */
err = kobject_init_and_add(&edac_dev->kobj, &ktype_device_ctrl,
&edac_class->kset.kobj,
"%s", edac_dev->name);
if (err) {
debugf1("%s()Failed to register '.../edac/%s'\n",
__func__, edac_dev->name);
goto err_kobj_reg;
}
kobject_uevent(&edac_dev->kobj, KOBJ_ADD);
/* At this point, to 'free' the control struct,
* edac_device_unregister_sysfs_main_kobj() must be used
*/
debugf4("%s() Registered '.../edac/%s' kobject\n",
__func__, edac_dev->name);
return 0;
/* Error exit stack */
err_kobj_reg:
module_put(edac_dev->owner);
err_out:
return err;
}
/*
* edac_device_unregister_sysfs_main_kobj:
* the '..../edac/<name>' kobject
*/
void edac_device_unregister_sysfs_main_kobj(
struct edac_device_ctl_info *edac_dev)
{
debugf0("%s()\n", __func__);
debugf4("%s() name of kobject is: %s\n",
__func__, kobject_name(&edac_dev->kobj));
/*
* Unregister the edac device's kobject and
* allow for reference count to reach 0 at which point
* the callback will be called to:
* a) module_put() this module
* b) 'kfree' the memory
*/
kobject_put(&edac_dev->kobj);
}
/* edac_dev -> instance information */
/*
* Set of low-level instance attribute show functions
*/
static ssize_t instance_ue_count_show(struct edac_device_instance *instance,
char *data)
{
return sprintf(data, "%u\n", instance->counters.ue_count);
}
static ssize_t instance_ce_count_show(struct edac_device_instance *instance,
char *data)
{
return sprintf(data, "%u\n", instance->counters.ce_count);
}
#define to_instance(k) container_of(k, struct edac_device_instance, kobj)
#define to_instance_attr(a) container_of(a,struct instance_attribute,attr)
/* DEVICE instance kobject release() function */
static void edac_device_ctrl_instance_release(struct kobject *kobj)
{
struct edac_device_instance *instance;
debugf1("%s()\n", __func__);
/* map from this kobj to the main control struct
* and then dec the main kobj count
*/
instance = to_instance(kobj);
kobject_put(&instance->ctl->kobj);
}
/* instance specific attribute structure */
struct instance_attribute {
struct attribute attr;
ssize_t(*show) (struct edac_device_instance *, char *);
ssize_t(*store) (struct edac_device_instance *, const char *, size_t);
};
/* Function to 'show' fields from the edac_dev 'instance' structure */
static ssize_t edac_dev_instance_show(struct kobject *kobj,
struct attribute *attr, char *buffer)
{
struct edac_device_instance *instance = to_instance(kobj);
struct instance_attribute *instance_attr = to_instance_attr(attr);
if (instance_attr->show)
return instance_attr->show(instance, buffer);
return -EIO;
}
/* Function to 'store' fields into the edac_dev 'instance' structure */
static ssize_t edac_dev_instance_store(struct kobject *kobj,
struct attribute *attr,
const char *buffer, size_t count)
{
struct edac_device_instance *instance = to_instance(kobj);
struct instance_attribute *instance_attr = to_instance_attr(attr);
if (instance_attr->store)
return instance_attr->store(instance, buffer, count);
return -EIO;
}
/* edac_dev file operations for an 'instance' */
static struct sysfs_ops device_instance_ops = {
.show = edac_dev_instance_show,
.store = edac_dev_instance_store
};
#define INSTANCE_ATTR(_name,_mode,_show,_store) \
static struct instance_attribute attr_instance_##_name = { \
.attr = {.name = __stringify(_name), .mode = _mode }, \
.show = _show, \
.store = _store, \
};
/*
* Define attributes visible for the edac_device instance object
* Each contains a pointer to a show and an optional set
* function pointer that does the low level output/input
*/
INSTANCE_ATTR(ce_count, S_IRUGO, instance_ce_count_show, NULL);
INSTANCE_ATTR(ue_count, S_IRUGO, instance_ue_count_show, NULL);
/* list of edac_dev 'instance' attributes */
static struct instance_attribute *device_instance_attr[] = {
&attr_instance_ce_count,
&attr_instance_ue_count,
NULL,
};
/* The 'ktype' for each edac_dev 'instance' */
static struct kobj_type ktype_instance_ctrl = {
.release = edac_device_ctrl_instance_release,
.sysfs_ops = &device_instance_ops,
.default_attrs = (struct attribute **)device_instance_attr,
};
/* edac_dev -> instance -> block information */
#define to_block(k) container_of(k, struct edac_device_block, kobj)
#define to_block_attr(a) \
container_of(a, struct edac_dev_sysfs_block_attribute, attr)
/*
* Set of low-level block attribute show functions
*/
static ssize_t block_ue_count_show(struct kobject *kobj,
struct attribute *attr, char *data)
{
struct edac_device_block *block = to_block(kobj);
return sprintf(data, "%u\n", block->counters.ue_count);
}
static ssize_t block_ce_count_show(struct kobject *kobj,
struct attribute *attr, char *data)
{
struct edac_device_block *block = to_block(kobj);
return sprintf(data, "%u\n", block->counters.ce_count);
}
/* DEVICE block kobject release() function */
static void edac_device_ctrl_block_release(struct kobject *kobj)
{
struct edac_device_block *block;
debugf1("%s()\n", __func__);
/* get the container of the kobj */
block = to_block(kobj);
/* map from 'block kobj' to 'block->instance->controller->main_kobj'
* now 'release' the block kobject
*/
kobject_put(&block->instance->ctl->kobj);
}
/* Function to 'show' fields from the edac_dev 'block' structure */
static ssize_t edac_dev_block_show(struct kobject *kobj,
struct attribute *attr, char *buffer)
{
struct edac_dev_sysfs_block_attribute *block_attr =
to_block_attr(attr);
if (block_attr->show)
return block_attr->show(kobj, attr, buffer);
return -EIO;
}
/* Function to 'store' fields into the edac_dev 'block' structure */
static ssize_t edac_dev_block_store(struct kobject *kobj,
struct attribute *attr,
const char *buffer, size_t count)
{
struct edac_dev_sysfs_block_attribute *block_attr;
block_attr = to_block_attr(attr);
if (block_attr->store)
return block_attr->store(kobj, attr, buffer, count);
return -EIO;
}
/* edac_dev file operations for a 'block' */
static struct sysfs_ops device_block_ops = {
.show = edac_dev_block_show,
.store = edac_dev_block_store
};
#define BLOCK_ATTR(_name,_mode,_show,_store) \
static struct edac_dev_sysfs_block_attribute attr_block_##_name = { \
.attr = {.name = __stringify(_name), .mode = _mode }, \
.show = _show, \
.store = _store, \
};
BLOCK_ATTR(ce_count, S_IRUGO, block_ce_count_show, NULL);
BLOCK_ATTR(ue_count, S_IRUGO, block_ue_count_show, NULL);
/* list of edac_dev 'block' attributes */
static struct edac_dev_sysfs_block_attribute *device_block_attr[] = {
&attr_block_ce_count,
&attr_block_ue_count,
NULL,
};
/* The 'ktype' for each edac_dev 'block' */
static struct kobj_type ktype_block_ctrl = {
.release = edac_device_ctrl_block_release,
.sysfs_ops = &device_block_ops,
.default_attrs = (struct attribute **)device_block_attr,
};
/* block ctor/dtor code */
/*
* edac_device_create_block
*/
static int edac_device_create_block(struct edac_device_ctl_info *edac_dev,
struct edac_device_instance *instance,
struct edac_device_block *block)
{
int i;
int err;
struct edac_dev_sysfs_block_attribute *sysfs_attrib;
struct kobject *main_kobj;
debugf4("%s() Instance '%s' inst_p=%p block '%s' block_p=%p\n",
__func__, instance->name, instance, block->name, block);
debugf4("%s() block kobj=%p block kobj->parent=%p\n",
__func__, &block->kobj, &block->kobj.parent);
/* init this block's kobject */
memset(&block->kobj, 0, sizeof(struct kobject));
/* bump the main kobject's reference count for this controller
* and this instance is dependant on the main
*/
main_kobj = kobject_get(&edac_dev->kobj);
if (!main_kobj) {
err = -ENODEV;
goto err_out;
}
/* Add this block's kobject */
err = kobject_init_and_add(&block->kobj, &ktype_block_ctrl,
&instance->kobj,
"%s", block->name);
if (err) {
debugf1("%s() Failed to register instance '%s'\n",
__func__, block->name);
kobject_put(main_kobj);
err = -ENODEV;
goto err_out;
}
/* If there are driver level block attributes, then added them
* to the block kobject
*/
sysfs_attrib = block->block_attributes;
if (sysfs_attrib && block->nr_attribs) {
for (i = 0; i < block->nr_attribs; i++, sysfs_attrib++) {
debugf4("%s() creating block attrib='%s' "
"attrib->%p to kobj=%p\n",
__func__,
sysfs_attrib->attr.name,
sysfs_attrib, &block->kobj);
/* Create each block_attribute file */
err = sysfs_create_file(&block->kobj,
&sysfs_attrib->attr);
if (err)
goto err_on_attrib;
}
}
kobject_uevent(&block->kobj, KOBJ_ADD);
return 0;
/* Error unwind stack */
err_on_attrib:
kobject_put(&block->kobj);
err_out:
return err;
}
/*
* edac_device_delete_block(edac_dev,block);
*/
static void edac_device_delete_block(struct edac_device_ctl_info *edac_dev,
struct edac_device_block *block)
{
struct edac_dev_sysfs_block_attribute *sysfs_attrib;
int i;
/* if this block has 'attributes' then we need to iterate over the list
* and 'remove' the attributes on this block
*/
sysfs_attrib = block->block_attributes;
if (sysfs_attrib && block->nr_attribs) {
for (i = 0; i < block->nr_attribs; i++, sysfs_attrib++) {
/* remove each block_attrib file */
sysfs_remove_file(&block->kobj,
(struct attribute *) sysfs_attrib);
}
}
/* unregister this block's kobject, SEE:
* edac_device_ctrl_block_release() callback operation
*/
kobject_put(&block->kobj);
}
/* instance ctor/dtor code */
/*
* edac_device_create_instance
* create just one instance of an edac_device 'instance'
*/
static int edac_device_create_instance(struct edac_device_ctl_info *edac_dev,
int idx)
{
int i, j;
int err;
struct edac_device_instance *instance;
struct kobject *main_kobj;
instance = &edac_dev->instances[idx];
/* Init the instance's kobject */
memset(&instance->kobj, 0, sizeof(struct kobject));
instance->ctl = edac_dev;
/* bump the main kobject's reference count for this controller
* and this instance is dependant on the main
*/
main_kobj = kobject_get(&edac_dev->kobj);
if (!main_kobj) {
err = -ENODEV;
goto err_out;
}
/* Formally register this instance's kobject under the edac_device */
err = kobject_init_and_add(&instance->kobj, &ktype_instance_ctrl,
&edac_dev->kobj, "%s", instance->name);
if (err != 0) {
debugf2("%s() Failed to register instance '%s'\n",
__func__, instance->name);
kobject_put(main_kobj);
goto err_out;
}
debugf4("%s() now register '%d' blocks for instance %d\n",
__func__, instance->nr_blocks, idx);
/* register all blocks of this instance */
for (i = 0; i < instance->nr_blocks; i++) {
err = edac_device_create_block(edac_dev, instance,
&instance->blocks[i]);
if (err) {
/* If any fail, remove all previous ones */
for (j = 0; j < i; j++)
edac_device_delete_block(edac_dev,
&instance->blocks[j]);
goto err_release_instance_kobj;
}
}
kobject_uevent(&instance->kobj, KOBJ_ADD);
debugf4("%s() Registered instance %d '%s' kobject\n",
__func__, idx, instance->name);
return 0;
/* error unwind stack */
err_release_instance_kobj:
kobject_put(&instance->kobj);
err_out:
return err;
}
/*
* edac_device_remove_instance
* remove an edac_device instance
*/
static void edac_device_delete_instance(struct edac_device_ctl_info *edac_dev,
int idx)
{
struct edac_device_instance *instance;
int i;
instance = &edac_dev->instances[idx];
/* unregister all blocks in this instance */
for (i = 0; i < instance->nr_blocks; i++)
edac_device_delete_block(edac_dev, &instance->blocks[i]);
/* unregister this instance's kobject, SEE:
* edac_device_ctrl_instance_release() for callback operation
*/
kobject_put(&instance->kobj);
}
/*
* edac_device_create_instances
* create the first level of 'instances' for this device
* (ie 'cache' might have 'cache0', 'cache1', 'cache2', etc
*/
static int edac_device_create_instances(struct edac_device_ctl_info *edac_dev)
{
int i, j;
int err;
debugf0("%s()\n", __func__);
/* iterate over creation of the instances */
for (i = 0; i < edac_dev->nr_instances; i++) {
err = edac_device_create_instance(edac_dev, i);
if (err) {
/* unwind previous instances on error */
for (j = 0; j < i; j++)
edac_device_delete_instance(edac_dev, j);
return err;
}
}
return 0;
}
/*
* edac_device_delete_instances(edac_dev);
* unregister all the kobjects of the instances
*/
static void edac_device_delete_instances(struct edac_device_ctl_info *edac_dev)
{
int i;
/* iterate over creation of the instances */
for (i = 0; i < edac_dev->nr_instances; i++)
edac_device_delete_instance(edac_dev, i);
}
/* edac_dev sysfs ctor/dtor code */
/*
* edac_device_add_main_sysfs_attributes
* add some attributes to this instance's main kobject
*/
static int edac_device_add_main_sysfs_attributes(
struct edac_device_ctl_info *edac_dev)
{
struct edac_dev_sysfs_attribute *sysfs_attrib;
int err = 0;
sysfs_attrib = edac_dev->sysfs_attributes;
if (sysfs_attrib) {
/* iterate over the array and create an attribute for each
* entry in the list
*/
while (sysfs_attrib->attr.name != NULL) {
err = sysfs_create_file(&edac_dev->kobj,
(struct attribute*) sysfs_attrib);
if (err)
goto err_out;
sysfs_attrib++;
}
}
err_out:
return err;
}
/*
* edac_device_remove_main_sysfs_attributes
* remove any attributes to this instance's main kobject
*/
static void edac_device_remove_main_sysfs_attributes(
struct edac_device_ctl_info *edac_dev)
{
struct edac_dev_sysfs_attribute *sysfs_attrib;
/* if there are main attributes, defined, remove them. First,
* point to the start of the array and iterate over it
* removing each attribute listed from this device's instance's kobject
*/
sysfs_attrib = edac_dev->sysfs_attributes;
if (sysfs_attrib) {
while (sysfs_attrib->attr.name != NULL) {
sysfs_remove_file(&edac_dev->kobj,
(struct attribute *) sysfs_attrib);
sysfs_attrib++;
}
}
}
/*
* edac_device_create_sysfs() Constructor
*
* accept a created edac_device control structure
* and 'export' it to sysfs. The 'main' kobj should already have been
* created. 'instance' and 'block' kobjects should be registered
* along with any 'block' attributes from the low driver. In addition,
* the main attributes (if any) are connected to the main kobject of
* the control structure.
*
* Return:
* 0 Success
* !0 Failure
*/
int edac_device_create_sysfs(struct edac_device_ctl_info *edac_dev)
{
int err;
struct kobject *edac_kobj = &edac_dev->kobj;
debugf0("%s() idx=%d\n", __func__, edac_dev->dev_idx);
/* go create any main attributes callers wants */
err = edac_device_add_main_sysfs_attributes(edac_dev);
if (err) {
debugf0("%s() failed to add sysfs attribs\n", __func__);
goto err_out;
}
/* create a symlink from the edac device
* to the platform 'device' being used for this
*/
err = sysfs_create_link(edac_kobj,
&edac_dev->dev->kobj, EDAC_DEVICE_SYMLINK);
if (err) {
debugf0("%s() sysfs_create_link() returned err= %d\n",
__func__, err);
goto err_remove_main_attribs;
}
/* Create the first level instance directories
* In turn, the nested blocks beneath the instances will
* be registered as well
*/
err = edac_device_create_instances(edac_dev);
if (err) {
debugf0("%s() edac_device_create_instances() "
"returned err= %d\n", __func__, err);
goto err_remove_link;
}
debugf4("%s() create-instances done, idx=%d\n",
__func__, edac_dev->dev_idx);
return 0;
/* Error unwind stack */
err_remove_link:
/* remove the sym link */
sysfs_remove_link(&edac_dev->kobj, EDAC_DEVICE_SYMLINK);
err_remove_main_attribs:
edac_device_remove_main_sysfs_attributes(edac_dev);
err_out:
return err;
}
/*
* edac_device_remove_sysfs() destructor
*
* given an edac_device struct, tear down the kobject resources
*/
void edac_device_remove_sysfs(struct edac_device_ctl_info *edac_dev)
{
debugf0("%s()\n", __func__);
/* remove any main attributes for this device */
edac_device_remove_main_sysfs_attributes(edac_dev);
/* remove the device sym link */
sysfs_remove_link(&edac_dev->kobj, EDAC_DEVICE_SYMLINK);
/* walk the instance/block kobject tree, deconstructing it */
edac_device_delete_instances(edac_dev);
}
| gpl-2.0 |
ioz9/GT-N7000-2.35.y-samsung-update1 | drivers/watchdog/wm831x_wdt.c | 1261 | 9274 | /*
* Watchdog driver for the wm831x PMICs
*
* Copyright (C) 2009 Wolfson Microelectronics
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation
*/
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/miscdevice.h>
#include <linux/platform_device.h>
#include <linux/watchdog.h>
#include <linux/uaccess.h>
#include <linux/gpio.h>
#include <linux/mfd/wm831x/core.h>
#include <linux/mfd/wm831x/pdata.h>
#include <linux/mfd/wm831x/watchdog.h>
static int nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout,
"Watchdog cannot be stopped once started (default="
__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
static unsigned long wm831x_wdt_users;
static struct miscdevice wm831x_wdt_miscdev;
static int wm831x_wdt_expect_close;
static DEFINE_MUTEX(wdt_mutex);
static struct wm831x *wm831x;
static unsigned int update_gpio;
static unsigned int update_state;
/* We can't use the sub-second values here but they're included
* for completeness. */
static struct {
int time; /* Seconds */
u16 val; /* WDOG_TO value */
} wm831x_wdt_cfgs[] = {
{ 1, 2 },
{ 2, 3 },
{ 4, 4 },
{ 8, 5 },
{ 16, 6 },
{ 32, 7 },
{ 33, 7 }, /* Actually 32.768s so include both, others round down */
};
static int wm831x_wdt_set_timeout(struct wm831x *wm831x, u16 value)
{
int ret;
mutex_lock(&wdt_mutex);
ret = wm831x_reg_unlock(wm831x);
if (ret == 0) {
ret = wm831x_set_bits(wm831x, WM831X_WATCHDOG,
WM831X_WDOG_TO_MASK, value);
wm831x_reg_lock(wm831x);
} else {
dev_err(wm831x->dev, "Failed to unlock security key: %d\n",
ret);
}
mutex_unlock(&wdt_mutex);
return ret;
}
static int wm831x_wdt_start(struct wm831x *wm831x)
{
int ret;
mutex_lock(&wdt_mutex);
ret = wm831x_reg_unlock(wm831x);
if (ret == 0) {
ret = wm831x_set_bits(wm831x, WM831X_WATCHDOG,
WM831X_WDOG_ENA, WM831X_WDOG_ENA);
wm831x_reg_lock(wm831x);
} else {
dev_err(wm831x->dev, "Failed to unlock security key: %d\n",
ret);
}
mutex_unlock(&wdt_mutex);
return ret;
}
static int wm831x_wdt_stop(struct wm831x *wm831x)
{
int ret;
mutex_lock(&wdt_mutex);
ret = wm831x_reg_unlock(wm831x);
if (ret == 0) {
ret = wm831x_set_bits(wm831x, WM831X_WATCHDOG,
WM831X_WDOG_ENA, 0);
wm831x_reg_lock(wm831x);
} else {
dev_err(wm831x->dev, "Failed to unlock security key: %d\n",
ret);
}
mutex_unlock(&wdt_mutex);
return ret;
}
static int wm831x_wdt_kick(struct wm831x *wm831x)
{
int ret;
u16 reg;
mutex_lock(&wdt_mutex);
if (update_gpio) {
gpio_set_value_cansleep(update_gpio, update_state);
update_state = !update_state;
ret = 0;
goto out;
}
reg = wm831x_reg_read(wm831x, WM831X_WATCHDOG);
if (!(reg & WM831X_WDOG_RST_SRC)) {
dev_err(wm831x->dev, "Hardware watchdog update unsupported\n");
ret = -EINVAL;
goto out;
}
reg |= WM831X_WDOG_RESET;
ret = wm831x_reg_unlock(wm831x);
if (ret == 0) {
ret = wm831x_reg_write(wm831x, WM831X_WATCHDOG, reg);
wm831x_reg_lock(wm831x);
} else {
dev_err(wm831x->dev, "Failed to unlock security key: %d\n",
ret);
}
out:
mutex_unlock(&wdt_mutex);
return ret;
}
static int wm831x_wdt_open(struct inode *inode, struct file *file)
{
int ret;
if (!wm831x)
return -ENODEV;
if (test_and_set_bit(0, &wm831x_wdt_users))
return -EBUSY;
ret = wm831x_wdt_start(wm831x);
if (ret != 0)
return ret;
return nonseekable_open(inode, file);
}
static int wm831x_wdt_release(struct inode *inode, struct file *file)
{
if (wm831x_wdt_expect_close)
wm831x_wdt_stop(wm831x);
else {
dev_warn(wm831x->dev, "Watchdog device closed uncleanly\n");
wm831x_wdt_kick(wm831x);
}
clear_bit(0, &wm831x_wdt_users);
return 0;
}
static ssize_t wm831x_wdt_write(struct file *file,
const char __user *data, size_t count,
loff_t *ppos)
{
size_t i;
if (count) {
wm831x_wdt_kick(wm831x);
if (!nowayout) {
/* In case it was set long ago */
wm831x_wdt_expect_close = 0;
/* scan to see whether or not we got the magic
character */
for (i = 0; i != count; i++) {
char c;
if (get_user(c, data + i))
return -EFAULT;
if (c == 'V')
wm831x_wdt_expect_close = 42;
}
}
}
return count;
}
static const struct watchdog_info ident = {
.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
.identity = "WM831x Watchdog",
};
static long wm831x_wdt_ioctl(struct file *file, unsigned int cmd,
unsigned long arg)
{
int ret = -ENOTTY, time, i;
void __user *argp = (void __user *)arg;
int __user *p = argp;
u16 reg;
switch (cmd) {
case WDIOC_GETSUPPORT:
ret = copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
break;
case WDIOC_GETSTATUS:
case WDIOC_GETBOOTSTATUS:
ret = put_user(0, p);
break;
case WDIOC_SETOPTIONS:
{
int options;
if (get_user(options, p))
return -EFAULT;
ret = -EINVAL;
/* Setting both simultaneously means at least one must fail */
if (options == WDIOS_DISABLECARD)
ret = wm831x_wdt_start(wm831x);
if (options == WDIOS_ENABLECARD)
ret = wm831x_wdt_stop(wm831x);
break;
}
case WDIOC_KEEPALIVE:
ret = wm831x_wdt_kick(wm831x);
break;
case WDIOC_SETTIMEOUT:
ret = get_user(time, p);
if (ret)
break;
if (time == 0) {
if (nowayout)
ret = -EINVAL;
else
wm831x_wdt_stop(wm831x);
break;
}
for (i = 0; i < ARRAY_SIZE(wm831x_wdt_cfgs); i++)
if (wm831x_wdt_cfgs[i].time == time)
break;
if (i == ARRAY_SIZE(wm831x_wdt_cfgs))
ret = -EINVAL;
else
ret = wm831x_wdt_set_timeout(wm831x,
wm831x_wdt_cfgs[i].val);
break;
case WDIOC_GETTIMEOUT:
reg = wm831x_reg_read(wm831x, WM831X_WATCHDOG);
reg &= WM831X_WDOG_TO_MASK;
for (i = 0; i < ARRAY_SIZE(wm831x_wdt_cfgs); i++)
if (wm831x_wdt_cfgs[i].val == reg)
break;
if (i == ARRAY_SIZE(wm831x_wdt_cfgs)) {
dev_warn(wm831x->dev,
"Unknown watchdog configuration: %x\n", reg);
ret = -EINVAL;
} else
ret = put_user(wm831x_wdt_cfgs[i].time, p);
}
return ret;
}
static const struct file_operations wm831x_wdt_fops = {
.owner = THIS_MODULE,
.llseek = no_llseek,
.write = wm831x_wdt_write,
.unlocked_ioctl = wm831x_wdt_ioctl,
.open = wm831x_wdt_open,
.release = wm831x_wdt_release,
};
static struct miscdevice wm831x_wdt_miscdev = {
.minor = WATCHDOG_MINOR,
.name = "watchdog",
.fops = &wm831x_wdt_fops,
};
static int __devinit wm831x_wdt_probe(struct platform_device *pdev)
{
struct wm831x_pdata *chip_pdata;
struct wm831x_watchdog_pdata *pdata;
int reg, ret;
wm831x = dev_get_drvdata(pdev->dev.parent);
ret = wm831x_reg_read(wm831x, WM831X_WATCHDOG);
if (ret < 0) {
dev_err(wm831x->dev, "Failed to read watchdog status: %d\n",
ret);
goto err;
}
reg = ret;
if (reg & WM831X_WDOG_DEBUG)
dev_warn(wm831x->dev, "Watchdog is paused\n");
/* Apply any configuration */
if (pdev->dev.parent->platform_data) {
chip_pdata = pdev->dev.parent->platform_data;
pdata = chip_pdata->watchdog;
} else {
pdata = NULL;
}
if (pdata) {
reg &= ~(WM831X_WDOG_SECACT_MASK | WM831X_WDOG_PRIMACT_MASK |
WM831X_WDOG_RST_SRC);
reg |= pdata->primary << WM831X_WDOG_PRIMACT_SHIFT;
reg |= pdata->secondary << WM831X_WDOG_SECACT_SHIFT;
reg |= pdata->software << WM831X_WDOG_RST_SRC_SHIFT;
if (pdata->update_gpio) {
ret = gpio_request(pdata->update_gpio,
"Watchdog update");
if (ret < 0) {
dev_err(wm831x->dev,
"Failed to request update GPIO: %d\n",
ret);
goto err;
}
ret = gpio_direction_output(pdata->update_gpio, 0);
if (ret != 0) {
dev_err(wm831x->dev,
"gpio_direction_output returned: %d\n",
ret);
goto err_gpio;
}
update_gpio = pdata->update_gpio;
/* Make sure the watchdog takes hardware updates */
reg |= WM831X_WDOG_RST_SRC;
}
ret = wm831x_reg_unlock(wm831x);
if (ret == 0) {
ret = wm831x_reg_write(wm831x, WM831X_WATCHDOG, reg);
wm831x_reg_lock(wm831x);
} else {
dev_err(wm831x->dev,
"Failed to unlock security key: %d\n", ret);
goto err_gpio;
}
}
wm831x_wdt_miscdev.parent = &pdev->dev;
ret = misc_register(&wm831x_wdt_miscdev);
if (ret != 0) {
dev_err(wm831x->dev, "Failed to register miscdev: %d\n", ret);
goto err_gpio;
}
return 0;
err_gpio:
if (update_gpio) {
gpio_free(update_gpio);
update_gpio = 0;
}
err:
return ret;
}
static int __devexit wm831x_wdt_remove(struct platform_device *pdev)
{
if (update_gpio) {
gpio_free(update_gpio);
update_gpio = 0;
}
misc_deregister(&wm831x_wdt_miscdev);
return 0;
}
static struct platform_driver wm831x_wdt_driver = {
.probe = wm831x_wdt_probe,
.remove = __devexit_p(wm831x_wdt_remove),
.driver = {
.name = "wm831x-watchdog",
},
};
static int __init wm831x_wdt_init(void)
{
return platform_driver_register(&wm831x_wdt_driver);
}
module_init(wm831x_wdt_init);
static void __exit wm831x_wdt_exit(void)
{
platform_driver_unregister(&wm831x_wdt_driver);
}
module_exit(wm831x_wdt_exit);
MODULE_AUTHOR("Mark Brown");
MODULE_DESCRIPTION("WM831x Watchdog");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:wm831x-watchdog");
| gpl-2.0 |
matanb10/linux | sound/pci/ctxfi/xfi.c | 1773 | 4333 | /*
* xfi linux driver.
*
* Copyright (C) 2008, Creative Technology Ltd. All Rights Reserved.
*
* This source file is released under GPL v2 license (no other versions).
* See the COPYING file included in the main directory of this source
* distribution for the license terms and conditions.
*/
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/moduleparam.h>
#include <linux/pci_ids.h>
#include <linux/module.h>
#include <sound/core.h>
#include <sound/initval.h>
#include "ctatc.h"
#include "cthardware.h"
MODULE_AUTHOR("Creative Technology Ltd");
MODULE_DESCRIPTION("X-Fi driver version 1.03");
MODULE_LICENSE("GPL v2");
MODULE_SUPPORTED_DEVICE("{{Creative Labs, Sound Blaster X-Fi}");
static unsigned int reference_rate = 48000;
static unsigned int multiple = 2;
MODULE_PARM_DESC(reference_rate, "Reference rate (default=48000)");
module_param(reference_rate, uint, S_IRUGO);
MODULE_PARM_DESC(multiple, "Rate multiplier (default=2)");
module_param(multiple, uint, S_IRUGO);
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
static unsigned int subsystem[SNDRV_CARDS];
module_param_array(index, int, NULL, 0444);
MODULE_PARM_DESC(index, "Index value for Creative X-Fi driver");
module_param_array(id, charp, NULL, 0444);
MODULE_PARM_DESC(id, "ID string for Creative X-Fi driver");
module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "Enable Creative X-Fi driver");
module_param_array(subsystem, int, NULL, 0444);
MODULE_PARM_DESC(subsystem, "Override subsystem ID for Creative X-Fi driver");
static const struct pci_device_id ct_pci_dev_ids[] = {
/* only X-Fi is supported, so... */
{ PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_DEVICE_ID_CREATIVE_20K1),
.driver_data = ATC20K1,
},
{ PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_DEVICE_ID_CREATIVE_20K2),
.driver_data = ATC20K2,
},
{ 0, }
};
MODULE_DEVICE_TABLE(pci, ct_pci_dev_ids);
static int
ct_card_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
{
static int dev;
struct snd_card *card;
struct ct_atc *atc;
int err;
if (dev >= SNDRV_CARDS)
return -ENODEV;
if (!enable[dev]) {
dev++;
return -ENOENT;
}
err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
0, &card);
if (err)
return err;
if ((reference_rate != 48000) && (reference_rate != 44100)) {
dev_err(card->dev,
"Invalid reference_rate value %u!!!\n",
reference_rate);
dev_err(card->dev,
"The valid values for reference_rate are 48000 and 44100, Value 48000 is assumed.\n");
reference_rate = 48000;
}
if ((multiple != 1) && (multiple != 2) && (multiple != 4)) {
dev_err(card->dev, "Invalid multiple value %u!!!\n",
multiple);
dev_err(card->dev,
"The valid values for multiple are 1, 2 and 4, Value 2 is assumed.\n");
multiple = 2;
}
err = ct_atc_create(card, pci, reference_rate, multiple,
pci_id->driver_data, subsystem[dev], &atc);
if (err < 0)
goto error;
card->private_data = atc;
/* Create alsa devices supported by this card */
err = ct_atc_create_alsa_devs(atc);
if (err < 0)
goto error;
strcpy(card->driver, "SB-XFi");
strcpy(card->shortname, "Creative X-Fi");
snprintf(card->longname, sizeof(card->longname), "%s %s %s",
card->shortname, atc->chip_name, atc->model_name);
err = snd_card_register(card);
if (err < 0)
goto error;
pci_set_drvdata(pci, card);
dev++;
return 0;
error:
snd_card_free(card);
return err;
}
static void ct_card_remove(struct pci_dev *pci)
{
snd_card_free(pci_get_drvdata(pci));
}
#ifdef CONFIG_PM_SLEEP
static int ct_card_suspend(struct device *dev)
{
struct snd_card *card = dev_get_drvdata(dev);
struct ct_atc *atc = card->private_data;
return atc->suspend(atc);
}
static int ct_card_resume(struct device *dev)
{
struct snd_card *card = dev_get_drvdata(dev);
struct ct_atc *atc = card->private_data;
return atc->resume(atc);
}
static SIMPLE_DEV_PM_OPS(ct_card_pm, ct_card_suspend, ct_card_resume);
#define CT_CARD_PM_OPS &ct_card_pm
#else
#define CT_CARD_PM_OPS NULL
#endif
static struct pci_driver ct_driver = {
.name = KBUILD_MODNAME,
.id_table = ct_pci_dev_ids,
.probe = ct_card_probe,
.remove = ct_card_remove,
.driver = {
.pm = CT_CARD_PM_OPS,
},
};
module_pci_driver(ct_driver);
| gpl-2.0 |
lissyx/codeaurora_kernel_msm | arch/arm/mach-shmobile/pm-sh7372.c | 2285 | 2635 | /*
* sh7372 Power management support
*
* Copyright (C) 2011 Magnus Damm
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/pm.h>
#include <linux/suspend.h>
#include <linux/cpuidle.h>
#include <linux/module.h>
#include <linux/list.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <asm/system.h>
#include <asm/io.h>
#include <asm/tlbflush.h>
#include <mach/common.h>
#define SMFRAM 0xe6a70000
#define SYSTBCR 0xe6150024
#define SBAR 0xe6180020
#define APARMBAREA 0xe6f10020
static void sh7372_enter_core_standby(void)
{
void __iomem *smfram = (void __iomem *)SMFRAM;
__raw_writel(0, APARMBAREA); /* translate 4k */
__raw_writel(__pa(sh7372_cpu_resume), SBAR); /* set reset vector */
__raw_writel(0x10, SYSTBCR); /* enable core standby */
__raw_writel(0, smfram + 0x3c); /* clear page table address */
sh7372_cpu_suspend();
cpu_init();
/* if page table address is non-NULL then we have been powered down */
if (__raw_readl(smfram + 0x3c)) {
__raw_writel(__raw_readl(smfram + 0x40),
__va(__raw_readl(smfram + 0x3c)));
flush_tlb_all();
set_cr(__raw_readl(smfram + 0x38));
}
__raw_writel(0, SYSTBCR); /* disable core standby */
__raw_writel(0, SBAR); /* disable reset vector translation */
}
#ifdef CONFIG_CPU_IDLE
static void sh7372_cpuidle_setup(struct cpuidle_device *dev)
{
struct cpuidle_state *state;
int i = dev->state_count;
state = &dev->states[i];
snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
strncpy(state->desc, "Core Standby Mode", CPUIDLE_DESC_LEN);
state->exit_latency = 10;
state->target_residency = 20 + 10;
state->power_usage = 1; /* perhaps not */
state->flags = 0;
state->flags |= CPUIDLE_FLAG_TIME_VALID;
shmobile_cpuidle_modes[i] = sh7372_enter_core_standby;
dev->state_count = i + 1;
}
static void sh7372_cpuidle_init(void)
{
shmobile_cpuidle_setup = sh7372_cpuidle_setup;
}
#else
static void sh7372_cpuidle_init(void) {}
#endif
#ifdef CONFIG_SUSPEND
static int sh7372_enter_suspend(suspend_state_t suspend_state)
{
sh7372_enter_core_standby();
return 0;
}
static void sh7372_suspend_init(void)
{
shmobile_suspend_ops.enter = sh7372_enter_suspend;
}
#else
static void sh7372_suspend_init(void) {}
#endif
#define DBGREG1 0xe6100020
#define DBGREG9 0xe6100040
void __init sh7372_pm_init(void)
{
/* enable DBG hardware block to kick SYSC */
__raw_writel(0x0000a500, DBGREG9);
__raw_writel(0x0000a501, DBGREG9);
__raw_writel(0x00000000, DBGREG1);
sh7372_suspend_init();
sh7372_cpuidle_init();
}
| gpl-2.0 |
iskandar1023/Velvet-N4 | drivers/net/wireless/rtlwifi/rtl8192ce/hw.c | 3309 | 63745 | /******************************************************************************
*
* Copyright(c) 2009-2012 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#include "../wifi.h"
#include "../efuse.h"
#include "../base.h"
#include "../regd.h"
#include "../cam.h"
#include "../ps.h"
#include "../pci.h"
#include "reg.h"
#include "def.h"
#include "phy.h"
#include "../rtl8192c/fw_common.h"
#include "dm.h"
#include "led.h"
#include "hw.h"
#define LLT_CONFIG 5
static void _rtl92ce_set_bcn_ctrl_reg(struct ieee80211_hw *hw,
u8 set_bits, u8 clear_bits)
{
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
struct rtl_priv *rtlpriv = rtl_priv(hw);
rtlpci->reg_bcn_ctrl_val |= set_bits;
rtlpci->reg_bcn_ctrl_val &= ~clear_bits;
rtl_write_byte(rtlpriv, REG_BCN_CTRL, (u8) rtlpci->reg_bcn_ctrl_val);
}
static void _rtl92ce_stop_tx_beacon(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
u8 tmp1byte;
tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2);
rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp1byte & (~BIT(6)));
rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0x64);
tmp1byte = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2);
tmp1byte &= ~(BIT(0));
rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte);
}
static void _rtl92ce_resume_tx_beacon(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
u8 tmp1byte;
tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2);
rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp1byte | BIT(6));
rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff);
tmp1byte = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2);
tmp1byte |= BIT(0);
rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte);
}
static void _rtl92ce_enable_bcn_sub_func(struct ieee80211_hw *hw)
{
_rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(1));
}
static void _rtl92ce_disable_bcn_sub_func(struct ieee80211_hw *hw)
{
_rtl92ce_set_bcn_ctrl_reg(hw, BIT(1), 0);
}
void rtl92ce_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
switch (variable) {
case HW_VAR_RCR:
*((u32 *) (val)) = rtlpci->receive_config;
break;
case HW_VAR_RF_STATE:
*((enum rf_pwrstate *)(val)) = ppsc->rfpwr_state;
break;
case HW_VAR_FWLPS_RF_ON:{
enum rf_pwrstate rfState;
u32 val_rcr;
rtlpriv->cfg->ops->get_hw_reg(hw,
HW_VAR_RF_STATE,
(u8 *) (&rfState));
if (rfState == ERFOFF) {
*((bool *) (val)) = true;
} else {
val_rcr = rtl_read_dword(rtlpriv, REG_RCR);
val_rcr &= 0x00070000;
if (val_rcr)
*((bool *) (val)) = false;
else
*((bool *) (val)) = true;
}
break;
}
case HW_VAR_FW_PSMODE_STATUS:
*((bool *) (val)) = ppsc->fw_current_inpsmode;
break;
case HW_VAR_CORRECT_TSF:{
u64 tsf;
u32 *ptsf_low = (u32 *)&tsf;
u32 *ptsf_high = ((u32 *)&tsf) + 1;
*ptsf_high = rtl_read_dword(rtlpriv, (REG_TSFTR + 4));
*ptsf_low = rtl_read_dword(rtlpriv, REG_TSFTR);
*((u64 *) (val)) = tsf;
break;
}
default:
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
"switch case not processed\n");
break;
}
}
void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
u8 idx;
switch (variable) {
case HW_VAR_ETHER_ADDR:{
for (idx = 0; idx < ETH_ALEN; idx++) {
rtl_write_byte(rtlpriv, (REG_MACID + idx),
val[idx]);
}
break;
}
case HW_VAR_BASIC_RATE:{
u16 rate_cfg = ((u16 *) val)[0];
u8 rate_index = 0;
rate_cfg &= 0x15f;
rate_cfg |= 0x01;
rtl_write_byte(rtlpriv, REG_RRSR, rate_cfg & 0xff);
rtl_write_byte(rtlpriv, REG_RRSR + 1,
(rate_cfg >> 8) & 0xff);
while (rate_cfg > 0x1) {
rate_cfg = (rate_cfg >> 1);
rate_index++;
}
rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL,
rate_index);
break;
}
case HW_VAR_BSSID:{
for (idx = 0; idx < ETH_ALEN; idx++) {
rtl_write_byte(rtlpriv, (REG_BSSID + idx),
val[idx]);
}
break;
}
case HW_VAR_SIFS:{
rtl_write_byte(rtlpriv, REG_SIFS_CTX + 1, val[0]);
rtl_write_byte(rtlpriv, REG_SIFS_TRX + 1, val[1]);
rtl_write_byte(rtlpriv, REG_SPEC_SIFS + 1, val[0]);
rtl_write_byte(rtlpriv, REG_MAC_SPEC_SIFS + 1, val[0]);
if (!mac->ht_enable)
rtl_write_word(rtlpriv, REG_RESP_SIFS_OFDM,
0x0e0e);
else
rtl_write_word(rtlpriv, REG_RESP_SIFS_OFDM,
*((u16 *) val));
break;
}
case HW_VAR_SLOT_TIME:{
u8 e_aci;
RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
"HW_VAR_SLOT_TIME %x\n", val[0]);
rtl_write_byte(rtlpriv, REG_SLOT, val[0]);
for (e_aci = 0; e_aci < AC_MAX; e_aci++) {
rtlpriv->cfg->ops->set_hw_reg(hw,
HW_VAR_AC_PARAM,
(u8 *) (&e_aci));
}
break;
}
case HW_VAR_ACK_PREAMBLE:{
u8 reg_tmp;
u8 short_preamble = (bool) (*(u8 *) val);
reg_tmp = (mac->cur_40_prime_sc) << 5;
if (short_preamble)
reg_tmp |= 0x80;
rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_tmp);
break;
}
case HW_VAR_AMPDU_MIN_SPACE:{
u8 min_spacing_to_set;
u8 sec_min_space;
min_spacing_to_set = *((u8 *) val);
if (min_spacing_to_set <= 7) {
sec_min_space = 0;
if (min_spacing_to_set < sec_min_space)
min_spacing_to_set = sec_min_space;
mac->min_space_cfg = ((mac->min_space_cfg &
0xf8) |
min_spacing_to_set);
*val = min_spacing_to_set;
RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
"Set HW_VAR_AMPDU_MIN_SPACE: %#x\n",
mac->min_space_cfg);
rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE,
mac->min_space_cfg);
}
break;
}
case HW_VAR_SHORTGI_DENSITY:{
u8 density_to_set;
density_to_set = *((u8 *) val);
mac->min_space_cfg |= (density_to_set << 3);
RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
"Set HW_VAR_SHORTGI_DENSITY: %#x\n",
mac->min_space_cfg);
rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE,
mac->min_space_cfg);
break;
}
case HW_VAR_AMPDU_FACTOR:{
u8 regtoset_normal[4] = {0x41, 0xa8, 0x72, 0xb9};
u8 regtoset_bt[4] = {0x31, 0x74, 0x42, 0x97};
u8 factor_toset;
u8 *p_regtoset = NULL;
u8 index = 0;
if ((rtlpcipriv->bt_coexist.bt_coexistence) &&
(rtlpcipriv->bt_coexist.bt_coexist_type ==
BT_CSR_BC4))
p_regtoset = regtoset_bt;
else
p_regtoset = regtoset_normal;
factor_toset = *((u8 *) val);
if (factor_toset <= 3) {
factor_toset = (1 << (factor_toset + 2));
if (factor_toset > 0xf)
factor_toset = 0xf;
for (index = 0; index < 4; index++) {
if ((p_regtoset[index] & 0xf0) >
(factor_toset << 4))
p_regtoset[index] =
(p_regtoset[index] & 0x0f) |
(factor_toset << 4);
if ((p_regtoset[index] & 0x0f) >
factor_toset)
p_regtoset[index] =
(p_regtoset[index] & 0xf0) |
(factor_toset);
rtl_write_byte(rtlpriv,
(REG_AGGLEN_LMT + index),
p_regtoset[index]);
}
RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
"Set HW_VAR_AMPDU_FACTOR: %#x\n",
factor_toset);
}
break;
}
case HW_VAR_AC_PARAM:{
u8 e_aci = *((u8 *) val);
rtl92c_dm_init_edca_turbo(hw);
if (rtlpci->acm_method != eAcmWay2_SW)
rtlpriv->cfg->ops->set_hw_reg(hw,
HW_VAR_ACM_CTRL,
(u8 *) (&e_aci));
break;
}
case HW_VAR_ACM_CTRL:{
u8 e_aci = *((u8 *) val);
union aci_aifsn *p_aci_aifsn =
(union aci_aifsn *)(&(mac->ac[0].aifs));
u8 acm = p_aci_aifsn->f.acm;
u8 acm_ctrl = rtl_read_byte(rtlpriv, REG_ACMHWCTRL);
acm_ctrl =
acm_ctrl | ((rtlpci->acm_method == 2) ? 0x0 : 0x1);
if (acm) {
switch (e_aci) {
case AC0_BE:
acm_ctrl |= AcmHw_BeqEn;
break;
case AC2_VI:
acm_ctrl |= AcmHw_ViqEn;
break;
case AC3_VO:
acm_ctrl |= AcmHw_VoqEn;
break;
default:
RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
"HW_VAR_ACM_CTRL acm set failed: eACI is %d\n",
acm);
break;
}
} else {
switch (e_aci) {
case AC0_BE:
acm_ctrl &= (~AcmHw_BeqEn);
break;
case AC2_VI:
acm_ctrl &= (~AcmHw_ViqEn);
break;
case AC3_VO:
acm_ctrl &= (~AcmHw_BeqEn);
break;
default:
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
"switch case not processed\n");
break;
}
}
RT_TRACE(rtlpriv, COMP_QOS, DBG_TRACE,
"SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n",
acm_ctrl);
rtl_write_byte(rtlpriv, REG_ACMHWCTRL, acm_ctrl);
break;
}
case HW_VAR_RCR:{
rtl_write_dword(rtlpriv, REG_RCR, ((u32 *) (val))[0]);
rtlpci->receive_config = ((u32 *) (val))[0];
break;
}
case HW_VAR_RETRY_LIMIT:{
u8 retry_limit = ((u8 *) (val))[0];
rtl_write_word(rtlpriv, REG_RL,
retry_limit << RETRY_LIMIT_SHORT_SHIFT |
retry_limit << RETRY_LIMIT_LONG_SHIFT);
break;
}
case HW_VAR_DUAL_TSF_RST:
rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, (BIT(0) | BIT(1)));
break;
case HW_VAR_EFUSE_BYTES:
rtlefuse->efuse_usedbytes = *((u16 *) val);
break;
case HW_VAR_EFUSE_USAGE:
rtlefuse->efuse_usedpercentage = *((u8 *) val);
break;
case HW_VAR_IO_CMD:
rtl92c_phy_set_io_cmd(hw, (*(enum io_type *)val));
break;
case HW_VAR_WPA_CONFIG:
rtl_write_byte(rtlpriv, REG_SECCFG, *((u8 *) val));
break;
case HW_VAR_SET_RPWM:{
u8 rpwm_val;
rpwm_val = rtl_read_byte(rtlpriv, REG_PCIE_HRPWM);
udelay(1);
if (rpwm_val & BIT(7)) {
rtl_write_byte(rtlpriv, REG_PCIE_HRPWM,
(*(u8 *) val));
} else {
rtl_write_byte(rtlpriv, REG_PCIE_HRPWM,
((*(u8 *) val) | BIT(7)));
}
break;
}
case HW_VAR_H2C_FW_PWRMODE:{
u8 psmode = (*(u8 *) val);
if ((psmode != FW_PS_ACTIVE_MODE) &&
(!IS_92C_SERIAL(rtlhal->version))) {
rtl92c_dm_rf_saving(hw, true);
}
rtl92c_set_fw_pwrmode_cmd(hw, (*(u8 *) val));
break;
}
case HW_VAR_FW_PSMODE_STATUS:
ppsc->fw_current_inpsmode = *((bool *) val);
break;
case HW_VAR_H2C_FW_JOINBSSRPT:{
u8 mstatus = (*(u8 *) val);
u8 tmp_regcr, tmp_reg422;
bool recover = false;
if (mstatus == RT_MEDIA_CONNECT) {
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AID,
NULL);
tmp_regcr = rtl_read_byte(rtlpriv, REG_CR + 1);
rtl_write_byte(rtlpriv, REG_CR + 1,
(tmp_regcr | BIT(0)));
_rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(3));
_rtl92ce_set_bcn_ctrl_reg(hw, BIT(4), 0);
tmp_reg422 =
rtl_read_byte(rtlpriv,
REG_FWHW_TXQ_CTRL + 2);
if (tmp_reg422 & BIT(6))
recover = true;
rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2,
tmp_reg422 & (~BIT(6)));
rtl92c_set_fw_rsvdpagepkt(hw, 0);
_rtl92ce_set_bcn_ctrl_reg(hw, BIT(3), 0);
_rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(4));
if (recover) {
rtl_write_byte(rtlpriv,
REG_FWHW_TXQ_CTRL + 2,
tmp_reg422);
}
rtl_write_byte(rtlpriv, REG_CR + 1,
(tmp_regcr & ~(BIT(0))));
}
rtl92c_set_fw_joinbss_report_cmd(hw, (*(u8 *) val));
break;
}
case HW_VAR_AID:{
u16 u2btmp;
u2btmp = rtl_read_word(rtlpriv, REG_BCN_PSR_RPT);
u2btmp &= 0xC000;
rtl_write_word(rtlpriv, REG_BCN_PSR_RPT, (u2btmp |
mac->assoc_id));
break;
}
case HW_VAR_CORRECT_TSF:{
u8 btype_ibss = ((u8 *) (val))[0];
if (btype_ibss)
_rtl92ce_stop_tx_beacon(hw);
_rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(3));
rtl_write_dword(rtlpriv, REG_TSFTR,
(u32) (mac->tsf & 0xffffffff));
rtl_write_dword(rtlpriv, REG_TSFTR + 4,
(u32) ((mac->tsf >> 32) & 0xffffffff));
_rtl92ce_set_bcn_ctrl_reg(hw, BIT(3), 0);
if (btype_ibss)
_rtl92ce_resume_tx_beacon(hw);
break;
}
default:
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
"switch case not processed\n");
break;
}
}
static bool _rtl92ce_llt_write(struct ieee80211_hw *hw, u32 address, u32 data)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
bool status = true;
long count = 0;
u32 value = _LLT_INIT_ADDR(address) |
_LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
rtl_write_dword(rtlpriv, REG_LLT_INIT, value);
do {
value = rtl_read_dword(rtlpriv, REG_LLT_INIT);
if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
break;
if (count > POLLING_LLT_THRESHOLD) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
"Failed to polling write LLT done at address %d!\n",
address);
status = false;
break;
}
} while (++count);
return status;
}
static bool _rtl92ce_llt_table_init(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
unsigned short i;
u8 txpktbuf_bndy;
u8 maxPage;
bool status;
#if LLT_CONFIG == 1
maxPage = 255;
txpktbuf_bndy = 252;
#elif LLT_CONFIG == 2
maxPage = 127;
txpktbuf_bndy = 124;
#elif LLT_CONFIG == 3
maxPage = 255;
txpktbuf_bndy = 174;
#elif LLT_CONFIG == 4
maxPage = 255;
txpktbuf_bndy = 246;
#elif LLT_CONFIG == 5
maxPage = 255;
txpktbuf_bndy = 246;
#endif
#if LLT_CONFIG == 1
rtl_write_byte(rtlpriv, REG_RQPN_NPQ, 0x1c);
rtl_write_dword(rtlpriv, REG_RQPN, 0x80a71c1c);
#elif LLT_CONFIG == 2
rtl_write_dword(rtlpriv, REG_RQPN, 0x845B1010);
#elif LLT_CONFIG == 3
rtl_write_dword(rtlpriv, REG_RQPN, 0x84838484);
#elif LLT_CONFIG == 4
rtl_write_dword(rtlpriv, REG_RQPN, 0x80bd1c1c);
#elif LLT_CONFIG == 5
rtl_write_word(rtlpriv, REG_RQPN_NPQ, 0x0000);
rtl_write_dword(rtlpriv, REG_RQPN, 0x80b01c29);
#endif
rtl_write_dword(rtlpriv, REG_TRXFF_BNDY, (0x27FF0000 | txpktbuf_bndy));
rtl_write_byte(rtlpriv, REG_TDECTRL + 1, txpktbuf_bndy);
rtl_write_byte(rtlpriv, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
rtl_write_byte(rtlpriv, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
rtl_write_byte(rtlpriv, 0x45D, txpktbuf_bndy);
rtl_write_byte(rtlpriv, REG_PBP, 0x11);
rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, 0x4);
for (i = 0; i < (txpktbuf_bndy - 1); i++) {
status = _rtl92ce_llt_write(hw, i, i + 1);
if (true != status)
return status;
}
status = _rtl92ce_llt_write(hw, (txpktbuf_bndy - 1), 0xFF);
if (true != status)
return status;
for (i = txpktbuf_bndy; i < maxPage; i++) {
status = _rtl92ce_llt_write(hw, i, (i + 1));
if (true != status)
return status;
}
status = _rtl92ce_llt_write(hw, maxPage, txpktbuf_bndy);
if (true != status)
return status;
return true;
}
static void _rtl92ce_gen_refresh_led_state(struct ieee80211_hw *hw)
{
struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
struct rtl_led *pLed0 = &(pcipriv->ledctl.sw_led0);
if (rtlpci->up_first_time)
return;
if (ppsc->rfoff_reason == RF_CHANGE_BY_IPS)
rtl92ce_sw_led_on(hw, pLed0);
else if (ppsc->rfoff_reason == RF_CHANGE_BY_INIT)
rtl92ce_sw_led_on(hw, pLed0);
else
rtl92ce_sw_led_off(hw, pLed0);
}
static bool _rtl92ce_init_mac(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
unsigned char bytetmp;
unsigned short wordtmp;
u16 retry;
rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x00);
if (rtlpcipriv->bt_coexist.bt_coexistence) {
u32 value32;
value32 = rtl_read_dword(rtlpriv, REG_APS_FSMCO);
value32 |= (SOP_ABG | SOP_AMB | XOP_BTCK);
rtl_write_dword(rtlpriv, REG_APS_FSMCO, value32);
}
rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x2b);
rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL, 0x0F);
if (rtlpcipriv->bt_coexist.bt_coexistence) {
u32 u4b_tmp = rtl_read_dword(rtlpriv, REG_AFE_XTAL_CTRL);
u4b_tmp &= (~0x00024800);
rtl_write_dword(rtlpriv, REG_AFE_XTAL_CTRL, u4b_tmp);
}
bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1) | BIT(0);
udelay(2);
rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, bytetmp);
udelay(2);
bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1);
udelay(2);
retry = 0;
RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "reg0xec:%x:%x\n",
rtl_read_dword(rtlpriv, 0xEC), bytetmp);
while ((bytetmp & BIT(0)) && retry < 1000) {
retry++;
udelay(50);
bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1);
RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "reg0xec:%x:%x\n",
rtl_read_dword(rtlpriv, 0xEC), bytetmp);
udelay(50);
}
rtl_write_word(rtlpriv, REG_APS_FSMCO, 0x1012);
rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL + 1, 0x82);
udelay(2);
if (rtlpcipriv->bt_coexist.bt_coexistence) {
bytetmp = rtl_read_byte(rtlpriv, REG_AFE_XTAL_CTRL+2) & 0xfd;
rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL+2, bytetmp);
}
rtl_write_word(rtlpriv, REG_CR, 0x2ff);
if (!_rtl92ce_llt_table_init(hw))
return false;
rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff);
rtl_write_byte(rtlpriv, REG_HISRE, 0xff);
rtl_write_word(rtlpriv, REG_TRXFF_BNDY + 2, 0x27ff);
wordtmp = rtl_read_word(rtlpriv, REG_TRXDMA_CTRL);
wordtmp &= 0xf;
wordtmp |= 0xF771;
rtl_write_word(rtlpriv, REG_TRXDMA_CTRL, wordtmp);
rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 1, 0x1F);
rtl_write_dword(rtlpriv, REG_RCR, rtlpci->receive_config);
rtl_write_dword(rtlpriv, REG_TCR, rtlpci->transmit_config);
rtl_write_byte(rtlpriv, 0x4d0, 0x0);
rtl_write_dword(rtlpriv, REG_BCNQ_DESA,
((u64) rtlpci->tx_ring[BEACON_QUEUE].dma) &
DMA_BIT_MASK(32));
rtl_write_dword(rtlpriv, REG_MGQ_DESA,
(u64) rtlpci->tx_ring[MGNT_QUEUE].dma &
DMA_BIT_MASK(32));
rtl_write_dword(rtlpriv, REG_VOQ_DESA,
(u64) rtlpci->tx_ring[VO_QUEUE].dma & DMA_BIT_MASK(32));
rtl_write_dword(rtlpriv, REG_VIQ_DESA,
(u64) rtlpci->tx_ring[VI_QUEUE].dma & DMA_BIT_MASK(32));
rtl_write_dword(rtlpriv, REG_BEQ_DESA,
(u64) rtlpci->tx_ring[BE_QUEUE].dma & DMA_BIT_MASK(32));
rtl_write_dword(rtlpriv, REG_BKQ_DESA,
(u64) rtlpci->tx_ring[BK_QUEUE].dma & DMA_BIT_MASK(32));
rtl_write_dword(rtlpriv, REG_HQ_DESA,
(u64) rtlpci->tx_ring[HIGH_QUEUE].dma &
DMA_BIT_MASK(32));
rtl_write_dword(rtlpriv, REG_RX_DESA,
(u64) rtlpci->rx_ring[RX_MPDU_QUEUE].dma &
DMA_BIT_MASK(32));
if (IS_92C_SERIAL(rtlhal->version))
rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 3, 0x77);
else
rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 3, 0x22);
rtl_write_dword(rtlpriv, REG_INT_MIG, 0);
bytetmp = rtl_read_byte(rtlpriv, REG_APSD_CTRL);
rtl_write_byte(rtlpriv, REG_APSD_CTRL, bytetmp & ~BIT(6));
do {
retry++;
bytetmp = rtl_read_byte(rtlpriv, REG_APSD_CTRL);
} while ((retry < 200) && (bytetmp & BIT(7)));
_rtl92ce_gen_refresh_led_state(hw);
rtl_write_dword(rtlpriv, REG_MCUTST_1, 0x0);
return true;
}
static void _rtl92ce_hw_configure(struct ieee80211_hw *hw)
{
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
u8 reg_bw_opmode;
u32 reg_prsr;
reg_bw_opmode = BW_OPMODE_20MHZ;
reg_prsr = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL, 0x8);
rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode);
rtl_write_dword(rtlpriv, REG_RRSR, reg_prsr);
rtl_write_byte(rtlpriv, REG_SLOT, 0x09);
rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, 0x0);
rtl_write_word(rtlpriv, REG_FWHW_TXQ_CTRL, 0x1F80);
rtl_write_word(rtlpriv, REG_RL, 0x0707);
rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x02012802);
rtl_write_byte(rtlpriv, REG_HWSEQ_CTRL, 0xFF);
rtl_write_dword(rtlpriv, REG_DARFRC, 0x01000000);
rtl_write_dword(rtlpriv, REG_DARFRC + 4, 0x07060504);
rtl_write_dword(rtlpriv, REG_RARFRC, 0x01000000);
rtl_write_dword(rtlpriv, REG_RARFRC + 4, 0x07060504);
if ((rtlpcipriv->bt_coexist.bt_coexistence) &&
(rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4))
rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0x97427431);
else
rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0xb972a841);
rtl_write_byte(rtlpriv, REG_ATIMWND, 0x2);
rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xff);
rtlpci->reg_bcn_ctrl_val = 0x1f;
rtl_write_byte(rtlpriv, REG_BCN_CTRL, rtlpci->reg_bcn_ctrl_val);
rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff);
rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff);
rtl_write_byte(rtlpriv, REG_PIFS, 0x1C);
rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
if ((rtlpcipriv->bt_coexist.bt_coexistence) &&
(rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4)) {
rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020);
rtl_write_word(rtlpriv, REG_PROT_MODE_CTRL, 0x0402);
} else {
rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020);
rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020);
}
if ((rtlpcipriv->bt_coexist.bt_coexistence) &&
(rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4))
rtl_write_dword(rtlpriv, REG_FAST_EDCA_CTRL, 0x03086666);
else
rtl_write_dword(rtlpriv, REG_FAST_EDCA_CTRL, 0x086666);
rtl_write_byte(rtlpriv, REG_ACKTO, 0x40);
rtl_write_word(rtlpriv, REG_SPEC_SIFS, 0x1010);
rtl_write_word(rtlpriv, REG_MAC_SPEC_SIFS, 0x1010);
rtl_write_word(rtlpriv, REG_SIFS_CTX, 0x1010);
rtl_write_word(rtlpriv, REG_SIFS_TRX, 0x1010);
rtl_write_dword(rtlpriv, REG_MAR, 0xffffffff);
rtl_write_dword(rtlpriv, REG_MAR + 4, 0xffffffff);
}
static void _rtl92ce_enable_aspm_back_door(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
rtl_write_byte(rtlpriv, 0x34b, 0x93);
rtl_write_word(rtlpriv, 0x350, 0x870c);
rtl_write_byte(rtlpriv, 0x352, 0x1);
if (ppsc->support_backdoor)
rtl_write_byte(rtlpriv, 0x349, 0x1b);
else
rtl_write_byte(rtlpriv, 0x349, 0x03);
rtl_write_word(rtlpriv, 0x350, 0x2718);
rtl_write_byte(rtlpriv, 0x352, 0x1);
}
void rtl92ce_enable_hw_security_config(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
u8 sec_reg_value;
RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
"PairwiseEncAlgorithm = %d GroupEncAlgorithm = %d\n",
rtlpriv->sec.pairwise_enc_algorithm,
rtlpriv->sec.group_enc_algorithm);
if (rtlpriv->cfg->mod_params->sw_crypto || rtlpriv->sec.use_sw_sec) {
RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
"not open hw encryption\n");
return;
}
sec_reg_value = SCR_TxEncEnable | SCR_RxDecEnable;
if (rtlpriv->sec.use_defaultkey) {
sec_reg_value |= SCR_TxUseDK;
sec_reg_value |= SCR_RxUseDK;
}
sec_reg_value |= (SCR_RXBCUSEDK | SCR_TXBCUSEDK);
rtl_write_byte(rtlpriv, REG_CR + 1, 0x02);
RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
"The SECR-value %x\n", sec_reg_value);
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_WPA_CONFIG, &sec_reg_value);
}
int rtl92ce_hw_init(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
struct rtl_phy *rtlphy = &(rtlpriv->phy);
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
static bool iqk_initialized; /* initialized to false */
bool rtstatus = true;
bool is92c;
int err;
u8 tmp_u1b;
rtlpci->being_init_adapter = true;
rtlpriv->intf_ops->disable_aspm(hw);
rtstatus = _rtl92ce_init_mac(hw);
if (!rtstatus) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n");
err = 1;
return err;
}
err = rtl92c_download_fw(hw);
if (err) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
"Failed to download FW. Init HW without FW now..\n");
err = 1;
return err;
}
rtlhal->last_hmeboxnum = 0;
rtl92c_phy_mac_config(hw);
rtl92c_phy_bb_config(hw);
rtlphy->rf_mode = RF_OP_BY_SW_3WIRE;
rtl92c_phy_rf_config(hw);
rtlphy->rfreg_chnlval[0] = rtl_get_rfreg(hw, (enum radio_path)0,
RF_CHNLBW, RFREG_OFFSET_MASK);
rtlphy->rfreg_chnlval[1] = rtl_get_rfreg(hw, (enum radio_path)1,
RF_CHNLBW, RFREG_OFFSET_MASK);
rtl_set_bbreg(hw, RFPGA0_RFMOD, BCCKEN, 0x1);
rtl_set_bbreg(hw, RFPGA0_RFMOD, BOFDMEN, 0x1);
rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 1);
_rtl92ce_hw_configure(hw);
rtl_cam_reset_all_entry(hw);
rtl92ce_enable_hw_security_config(hw);
ppsc->rfpwr_state = ERFON;
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ETHER_ADDR, mac->mac_addr);
_rtl92ce_enable_aspm_back_door(hw);
rtlpriv->intf_ops->enable_aspm(hw);
rtl8192ce_bt_hw_init(hw);
if (ppsc->rfpwr_state == ERFON) {
rtl92c_phy_set_rfpath_switch(hw, 1);
if (iqk_initialized) {
rtl92c_phy_iq_calibrate(hw, true);
} else {
rtl92c_phy_iq_calibrate(hw, false);
iqk_initialized = true;
}
rtl92c_dm_check_txpower_tracking(hw);
rtl92c_phy_lc_calibrate(hw);
}
is92c = IS_92C_SERIAL(rtlhal->version);
tmp_u1b = efuse_read_1byte(hw, 0x1FA);
if (!(tmp_u1b & BIT(0))) {
rtl_set_rfreg(hw, RF90_PATH_A, 0x15, 0x0F, 0x05);
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "PA BIAS path A\n");
}
if (!(tmp_u1b & BIT(1)) && is92c) {
rtl_set_rfreg(hw, RF90_PATH_B, 0x15, 0x0F, 0x05);
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "PA BIAS path B\n");
}
if (!(tmp_u1b & BIT(4))) {
tmp_u1b = rtl_read_byte(rtlpriv, 0x16);
tmp_u1b &= 0x0F;
rtl_write_byte(rtlpriv, 0x16, tmp_u1b | 0x80);
udelay(10);
rtl_write_byte(rtlpriv, 0x16, tmp_u1b | 0x90);
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "under 1.5V\n");
}
rtl92c_dm_init(hw);
rtlpci->being_init_adapter = false;
return err;
}
static enum version_8192c _rtl92ce_read_chip_version(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_phy *rtlphy = &(rtlpriv->phy);
enum version_8192c version = VERSION_UNKNOWN;
u32 value32;
const char *versionid;
value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG);
if (value32 & TRP_VAUX_EN) {
version = (value32 & TYPE_ID) ? VERSION_A_CHIP_92C :
VERSION_A_CHIP_88C;
} else {
version = (value32 & TYPE_ID) ? VERSION_B_CHIP_92C :
VERSION_B_CHIP_88C;
}
switch (version) {
case VERSION_B_CHIP_92C:
versionid = "B_CHIP_92C";
break;
case VERSION_B_CHIP_88C:
versionid = "B_CHIP_88C";
break;
case VERSION_A_CHIP_92C:
versionid = "A_CHIP_92C";
break;
case VERSION_A_CHIP_88C:
versionid = "A_CHIP_88C";
break;
default:
versionid = "Unknown. Bug?";
break;
}
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
"Chip Version ID: %s\n", versionid);
switch (version & 0x3) {
case CHIP_88C:
rtlphy->rf_type = RF_1T1R;
break;
case CHIP_92C:
rtlphy->rf_type = RF_2T2R;
break;
case CHIP_92C_1T2R:
rtlphy->rf_type = RF_1T2R;
break;
default:
rtlphy->rf_type = RF_1T1R;
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
"ERROR RF_Type is set!!\n");
break;
}
RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Chip RF Type: %s\n",
rtlphy->rf_type == RF_2T2R ? "RF_2T2R" : "RF_1T1R");
return version;
}
static int _rtl92ce_set_media_status(struct ieee80211_hw *hw,
enum nl80211_iftype type)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
u8 bt_msr = rtl_read_byte(rtlpriv, MSR);
enum led_ctl_mode ledaction = LED_CTL_NO_LINK;
bt_msr &= 0xfc;
if (type == NL80211_IFTYPE_UNSPECIFIED ||
type == NL80211_IFTYPE_STATION) {
_rtl92ce_stop_tx_beacon(hw);
_rtl92ce_enable_bcn_sub_func(hw);
} else if (type == NL80211_IFTYPE_ADHOC || type == NL80211_IFTYPE_AP) {
_rtl92ce_resume_tx_beacon(hw);
_rtl92ce_disable_bcn_sub_func(hw);
} else {
RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
"Set HW_VAR_MEDIA_STATUS: No such media status(%x)\n",
type);
}
switch (type) {
case NL80211_IFTYPE_UNSPECIFIED:
bt_msr |= MSR_NOLINK;
ledaction = LED_CTL_LINK;
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
"Set Network type to NO LINK!\n");
break;
case NL80211_IFTYPE_ADHOC:
bt_msr |= MSR_ADHOC;
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
"Set Network type to Ad Hoc!\n");
break;
case NL80211_IFTYPE_STATION:
bt_msr |= MSR_INFRA;
ledaction = LED_CTL_LINK;
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
"Set Network type to STA!\n");
break;
case NL80211_IFTYPE_AP:
bt_msr |= MSR_AP;
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
"Set Network type to AP!\n");
break;
default:
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
"Network type %d not supported!\n", type);
return 1;
break;
}
rtl_write_byte(rtlpriv, (MSR), bt_msr);
rtlpriv->cfg->ops->led_control(hw, ledaction);
if ((bt_msr & 0xfc) == MSR_AP)
rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x00);
else
rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x66);
return 0;
}
void rtl92ce_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
u32 reg_rcr = rtl_read_dword(rtlpriv, REG_RCR);
if (rtlpriv->psc.rfpwr_state != ERFON)
return;
if (check_bssid) {
reg_rcr |= (RCR_CBSSID_DATA | RCR_CBSSID_BCN);
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR,
(u8 *) (®_rcr));
_rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(4));
} else if (!check_bssid) {
reg_rcr &= (~(RCR_CBSSID_DATA | RCR_CBSSID_BCN));
_rtl92ce_set_bcn_ctrl_reg(hw, BIT(4), 0);
rtlpriv->cfg->ops->set_hw_reg(hw,
HW_VAR_RCR, (u8 *) (®_rcr));
}
}
int rtl92ce_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
if (_rtl92ce_set_media_status(hw, type))
return -EOPNOTSUPP;
if (rtlpriv->mac80211.link_state == MAC80211_LINKED) {
if (type != NL80211_IFTYPE_AP)
rtl92ce_set_check_bssid(hw, true);
} else {
rtl92ce_set_check_bssid(hw, false);
}
return 0;
}
/* don't set REG_EDCA_BE_PARAM here because mac80211 will send pkt when scan */
void rtl92ce_set_qos(struct ieee80211_hw *hw, int aci)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
rtl92c_dm_init_edca_turbo(hw);
switch (aci) {
case AC1_BK:
rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0xa44f);
break;
case AC0_BE:
/* rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, u4b_ac_param); */
break;
case AC2_VI:
rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x5e4322);
break;
case AC3_VO:
rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222);
break;
default:
RT_ASSERT(false, "invalid aci: %d !\n", aci);
break;
}
}
void rtl92ce_enable_interrupt(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] & 0xFFFFFFFF);
rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] & 0xFFFFFFFF);
}
void rtl92ce_disable_interrupt(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED);
rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED);
synchronize_irq(rtlpci->pdev->irq);
}
static void _rtl92ce_poweroff_adapter(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
u8 u1b_tmp;
u32 u4b_tmp;
rtlpriv->intf_ops->enable_aspm(hw);
rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF);
rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00);
rtl_write_byte(rtlpriv, REG_RF_CTRL, 0x00);
rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40);
rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2);
rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE0);
if (rtl_read_byte(rtlpriv, REG_MCUFWDL) & BIT(7))
rtl92c_firmware_selfreset(hw);
rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, 0x51);
rtl_write_byte(rtlpriv, REG_MCUFWDL, 0x00);
rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00000000);
u1b_tmp = rtl_read_byte(rtlpriv, REG_GPIO_PIN_CTRL);
if ((rtlpcipriv->bt_coexist.bt_coexistence) &&
((rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4) ||
(rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC8))) {
rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00F30000 |
(u1b_tmp << 8));
} else {
rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00FF0000 |
(u1b_tmp << 8));
}
rtl_write_word(rtlpriv, REG_GPIO_IO_SEL, 0x0790);
rtl_write_word(rtlpriv, REG_LEDCFG0, 0x8080);
rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x80);
rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x23);
if (rtlpcipriv->bt_coexist.bt_coexistence) {
u4b_tmp = rtl_read_dword(rtlpriv, REG_AFE_XTAL_CTRL);
u4b_tmp |= 0x03824800;
rtl_write_dword(rtlpriv, REG_AFE_XTAL_CTRL, u4b_tmp);
} else {
rtl_write_dword(rtlpriv, REG_AFE_XTAL_CTRL, 0x0e);
}
rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0e);
rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, 0x10);
}
void rtl92ce_card_disable(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
enum nl80211_iftype opmode;
mac->link_state = MAC80211_NOLINK;
opmode = NL80211_IFTYPE_UNSPECIFIED;
_rtl92ce_set_media_status(hw, opmode);
if (rtlpci->driver_is_goingto_unload ||
ppsc->rfoff_reason > RF_CHANGE_BY_PS)
rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
_rtl92ce_poweroff_adapter(hw);
}
void rtl92ce_interrupt_recognized(struct ieee80211_hw *hw,
u32 *p_inta, u32 *p_intb)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
*p_inta = rtl_read_dword(rtlpriv, ISR) & rtlpci->irq_mask[0];
rtl_write_dword(rtlpriv, ISR, *p_inta);
/*
* *p_intb = rtl_read_dword(rtlpriv, REG_HISRE) & rtlpci->irq_mask[1];
* rtl_write_dword(rtlpriv, ISR + 4, *p_intb);
*/
}
void rtl92ce_set_beacon_related_registers(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
u16 bcn_interval, atim_window;
bcn_interval = mac->beacon_interval;
atim_window = 2; /*FIX MERGE */
rtl92ce_disable_interrupt(hw);
rtl_write_word(rtlpriv, REG_ATIMWND, atim_window);
rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval);
rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660f);
rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_CCK, 0x18);
rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_OFDM, 0x18);
rtl_write_byte(rtlpriv, 0x606, 0x30);
rtl92ce_enable_interrupt(hw);
}
void rtl92ce_set_beacon_interval(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
u16 bcn_interval = mac->beacon_interval;
RT_TRACE(rtlpriv, COMP_BEACON, DBG_DMESG,
"beacon_interval:%d\n", bcn_interval);
rtl92ce_disable_interrupt(hw);
rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval);
rtl92ce_enable_interrupt(hw);
}
void rtl92ce_update_interrupt_mask(struct ieee80211_hw *hw,
u32 add_msr, u32 rm_msr)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD, "add_msr:%x, rm_msr:%x\n",
add_msr, rm_msr);
if (add_msr)
rtlpci->irq_mask[0] |= add_msr;
if (rm_msr)
rtlpci->irq_mask[0] &= (~rm_msr);
rtl92ce_disable_interrupt(hw);
rtl92ce_enable_interrupt(hw);
}
static void _rtl92ce_read_txpower_info_from_hwpg(struct ieee80211_hw *hw,
bool autoload_fail,
u8 *hwinfo)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
u8 rf_path, index, tempval;
u16 i;
for (rf_path = 0; rf_path < 2; rf_path++) {
for (i = 0; i < 3; i++) {
if (!autoload_fail) {
rtlefuse->
eeprom_chnlarea_txpwr_cck[rf_path][i] =
hwinfo[EEPROM_TXPOWERCCK + rf_path * 3 + i];
rtlefuse->
eeprom_chnlarea_txpwr_ht40_1s[rf_path][i] =
hwinfo[EEPROM_TXPOWERHT40_1S + rf_path * 3 +
i];
} else {
rtlefuse->
eeprom_chnlarea_txpwr_cck[rf_path][i] =
EEPROM_DEFAULT_TXPOWERLEVEL;
rtlefuse->
eeprom_chnlarea_txpwr_ht40_1s[rf_path][i] =
EEPROM_DEFAULT_TXPOWERLEVEL;
}
}
}
for (i = 0; i < 3; i++) {
if (!autoload_fail)
tempval = hwinfo[EEPROM_TXPOWERHT40_2SDIFF + i];
else
tempval = EEPROM_DEFAULT_HT40_2SDIFF;
rtlefuse->eeprom_chnlarea_txpwr_ht40_2sdiif[RF90_PATH_A][i] =
(tempval & 0xf);
rtlefuse->eeprom_chnlarea_txpwr_ht40_2sdiif[RF90_PATH_B][i] =
((tempval & 0xf0) >> 4);
}
for (rf_path = 0; rf_path < 2; rf_path++)
for (i = 0; i < 3; i++)
RTPRINT(rtlpriv, FINIT, INIT_EEPROM,
"RF(%d) EEPROM CCK Area(%d) = 0x%x\n",
rf_path, i,
rtlefuse->
eeprom_chnlarea_txpwr_cck[rf_path][i]);
for (rf_path = 0; rf_path < 2; rf_path++)
for (i = 0; i < 3; i++)
RTPRINT(rtlpriv, FINIT, INIT_EEPROM,
"RF(%d) EEPROM HT40 1S Area(%d) = 0x%x\n",
rf_path, i,
rtlefuse->
eeprom_chnlarea_txpwr_ht40_1s[rf_path][i]);
for (rf_path = 0; rf_path < 2; rf_path++)
for (i = 0; i < 3; i++)
RTPRINT(rtlpriv, FINIT, INIT_EEPROM,
"RF(%d) EEPROM HT40 2S Diff Area(%d) = 0x%x\n",
rf_path, i,
rtlefuse->
eeprom_chnlarea_txpwr_ht40_2sdiif[rf_path][i]);
for (rf_path = 0; rf_path < 2; rf_path++) {
for (i = 0; i < 14; i++) {
index = _rtl92c_get_chnl_group((u8) i);
rtlefuse->txpwrlevel_cck[rf_path][i] =
rtlefuse->eeprom_chnlarea_txpwr_cck[rf_path][index];
rtlefuse->txpwrlevel_ht40_1s[rf_path][i] =
rtlefuse->
eeprom_chnlarea_txpwr_ht40_1s[rf_path][index];
if ((rtlefuse->
eeprom_chnlarea_txpwr_ht40_1s[rf_path][index] -
rtlefuse->
eeprom_chnlarea_txpwr_ht40_2sdiif[rf_path][index])
> 0) {
rtlefuse->txpwrlevel_ht40_2s[rf_path][i] =
rtlefuse->
eeprom_chnlarea_txpwr_ht40_1s[rf_path]
[index] -
rtlefuse->
eeprom_chnlarea_txpwr_ht40_2sdiif[rf_path]
[index];
} else {
rtlefuse->txpwrlevel_ht40_2s[rf_path][i] = 0;
}
}
for (i = 0; i < 14; i++) {
RTPRINT(rtlpriv, FINIT, INIT_TxPower,
"RF(%d)-Ch(%d) [CCK / HT40_1S / HT40_2S] = [0x%x / 0x%x / 0x%x]\n",
rf_path, i,
rtlefuse->txpwrlevel_cck[rf_path][i],
rtlefuse->txpwrlevel_ht40_1s[rf_path][i],
rtlefuse->txpwrlevel_ht40_2s[rf_path][i]);
}
}
for (i = 0; i < 3; i++) {
if (!autoload_fail) {
rtlefuse->eeprom_pwrlimit_ht40[i] =
hwinfo[EEPROM_TXPWR_GROUP + i];
rtlefuse->eeprom_pwrlimit_ht20[i] =
hwinfo[EEPROM_TXPWR_GROUP + 3 + i];
} else {
rtlefuse->eeprom_pwrlimit_ht40[i] = 0;
rtlefuse->eeprom_pwrlimit_ht20[i] = 0;
}
}
for (rf_path = 0; rf_path < 2; rf_path++) {
for (i = 0; i < 14; i++) {
index = _rtl92c_get_chnl_group((u8) i);
if (rf_path == RF90_PATH_A) {
rtlefuse->pwrgroup_ht20[rf_path][i] =
(rtlefuse->eeprom_pwrlimit_ht20[index]
& 0xf);
rtlefuse->pwrgroup_ht40[rf_path][i] =
(rtlefuse->eeprom_pwrlimit_ht40[index]
& 0xf);
} else if (rf_path == RF90_PATH_B) {
rtlefuse->pwrgroup_ht20[rf_path][i] =
((rtlefuse->eeprom_pwrlimit_ht20[index]
& 0xf0) >> 4);
rtlefuse->pwrgroup_ht40[rf_path][i] =
((rtlefuse->eeprom_pwrlimit_ht40[index]
& 0xf0) >> 4);
}
RTPRINT(rtlpriv, FINIT, INIT_TxPower,
"RF-%d pwrgroup_ht20[%d] = 0x%x\n",
rf_path, i,
rtlefuse->pwrgroup_ht20[rf_path][i]);
RTPRINT(rtlpriv, FINIT, INIT_TxPower,
"RF-%d pwrgroup_ht40[%d] = 0x%x\n",
rf_path, i,
rtlefuse->pwrgroup_ht40[rf_path][i]);
}
}
for (i = 0; i < 14; i++) {
index = _rtl92c_get_chnl_group((u8) i);
if (!autoload_fail)
tempval = hwinfo[EEPROM_TXPOWERHT20DIFF + index];
else
tempval = EEPROM_DEFAULT_HT20_DIFF;
rtlefuse->txpwr_ht20diff[RF90_PATH_A][i] = (tempval & 0xF);
rtlefuse->txpwr_ht20diff[RF90_PATH_B][i] =
((tempval >> 4) & 0xF);
if (rtlefuse->txpwr_ht20diff[RF90_PATH_A][i] & BIT(3))
rtlefuse->txpwr_ht20diff[RF90_PATH_A][i] |= 0xF0;
if (rtlefuse->txpwr_ht20diff[RF90_PATH_B][i] & BIT(3))
rtlefuse->txpwr_ht20diff[RF90_PATH_B][i] |= 0xF0;
index = _rtl92c_get_chnl_group((u8) i);
if (!autoload_fail)
tempval = hwinfo[EEPROM_TXPOWER_OFDMDIFF + index];
else
tempval = EEPROM_DEFAULT_LEGACYHTTXPOWERDIFF;
rtlefuse->txpwr_legacyhtdiff[RF90_PATH_A][i] = (tempval & 0xF);
rtlefuse->txpwr_legacyhtdiff[RF90_PATH_B][i] =
((tempval >> 4) & 0xF);
}
rtlefuse->legacy_ht_txpowerdiff =
rtlefuse->txpwr_legacyhtdiff[RF90_PATH_A][7];
for (i = 0; i < 14; i++)
RTPRINT(rtlpriv, FINIT, INIT_TxPower,
"RF-A Ht20 to HT40 Diff[%d] = 0x%x\n",
i, rtlefuse->txpwr_ht20diff[RF90_PATH_A][i]);
for (i = 0; i < 14; i++)
RTPRINT(rtlpriv, FINIT, INIT_TxPower,
"RF-A Legacy to Ht40 Diff[%d] = 0x%x\n",
i, rtlefuse->txpwr_legacyhtdiff[RF90_PATH_A][i]);
for (i = 0; i < 14; i++)
RTPRINT(rtlpriv, FINIT, INIT_TxPower,
"RF-B Ht20 to HT40 Diff[%d] = 0x%x\n",
i, rtlefuse->txpwr_ht20diff[RF90_PATH_B][i]);
for (i = 0; i < 14; i++)
RTPRINT(rtlpriv, FINIT, INIT_TxPower,
"RF-B Legacy to HT40 Diff[%d] = 0x%x\n",
i, rtlefuse->txpwr_legacyhtdiff[RF90_PATH_B][i]);
if (!autoload_fail)
rtlefuse->eeprom_regulatory = (hwinfo[RF_OPTION1] & 0x7);
else
rtlefuse->eeprom_regulatory = 0;
RTPRINT(rtlpriv, FINIT, INIT_TxPower,
"eeprom_regulatory = 0x%x\n", rtlefuse->eeprom_regulatory);
if (!autoload_fail) {
rtlefuse->eeprom_tssi[RF90_PATH_A] = hwinfo[EEPROM_TSSI_A];
rtlefuse->eeprom_tssi[RF90_PATH_B] = hwinfo[EEPROM_TSSI_B];
} else {
rtlefuse->eeprom_tssi[RF90_PATH_A] = EEPROM_DEFAULT_TSSI;
rtlefuse->eeprom_tssi[RF90_PATH_B] = EEPROM_DEFAULT_TSSI;
}
RTPRINT(rtlpriv, FINIT, INIT_TxPower, "TSSI_A = 0x%x, TSSI_B = 0x%x\n",
rtlefuse->eeprom_tssi[RF90_PATH_A],
rtlefuse->eeprom_tssi[RF90_PATH_B]);
if (!autoload_fail)
tempval = hwinfo[EEPROM_THERMAL_METER];
else
tempval = EEPROM_DEFAULT_THERMALMETER;
rtlefuse->eeprom_thermalmeter = (tempval & 0x1f);
if (rtlefuse->eeprom_thermalmeter == 0x1f || autoload_fail)
rtlefuse->apk_thermalmeterignore = true;
rtlefuse->thermalmeter[0] = rtlefuse->eeprom_thermalmeter;
RTPRINT(rtlpriv, FINIT, INIT_TxPower,
"thermalmeter = 0x%x\n", rtlefuse->eeprom_thermalmeter);
}
static void _rtl92ce_read_adapter_info(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
u16 i, usvalue;
u8 hwinfo[HWSET_MAX_SIZE];
u16 eeprom_id;
if (rtlefuse->epromtype == EEPROM_BOOT_EFUSE) {
rtl_efuse_shadow_map_update(hw);
memcpy((void *)hwinfo,
(void *)&rtlefuse->efuse_map[EFUSE_INIT_MAP][0],
HWSET_MAX_SIZE);
} else if (rtlefuse->epromtype == EEPROM_93C46) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
"RTL819X Not boot from eeprom, check it !!");
}
RT_PRINT_DATA(rtlpriv, COMP_INIT, DBG_DMESG, "MAP",
hwinfo, HWSET_MAX_SIZE);
eeprom_id = *((u16 *)&hwinfo[0]);
if (eeprom_id != RTL8190_EEPROM_ID) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
"EEPROM ID(%#x) is invalid!!\n", eeprom_id);
rtlefuse->autoload_failflag = true;
} else {
RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n");
rtlefuse->autoload_failflag = false;
}
if (rtlefuse->autoload_failflag)
return;
for (i = 0; i < 6; i += 2) {
usvalue = *(u16 *)&hwinfo[EEPROM_MAC_ADDR + i];
*((u16 *) (&rtlefuse->dev_addr[i])) = usvalue;
}
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "%pM\n", rtlefuse->dev_addr);
_rtl92ce_read_txpower_info_from_hwpg(hw,
rtlefuse->autoload_failflag,
hwinfo);
rtl8192ce_read_bt_coexist_info_from_hwpg(hw,
rtlefuse->autoload_failflag,
hwinfo);
rtlefuse->eeprom_channelplan = *(u8 *)&hwinfo[EEPROM_CHANNELPLAN];
rtlefuse->eeprom_version = *(u16 *)&hwinfo[EEPROM_VERSION];
rtlefuse->txpwr_fromeprom = true;
rtlefuse->eeprom_oemid = *(u8 *)&hwinfo[EEPROM_CUSTOMER_ID];
RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
"EEPROM Customer ID: 0x%2x\n", rtlefuse->eeprom_oemid);
/* set channel paln to world wide 13 */
rtlefuse->channel_plan = COUNTRY_CODE_WORLD_WIDE_13;
if (rtlhal->oem_id == RT_CID_DEFAULT) {
switch (rtlefuse->eeprom_oemid) {
case EEPROM_CID_DEFAULT:
if (rtlefuse->eeprom_did == 0x8176) {
if ((rtlefuse->eeprom_svid == 0x103C &&
rtlefuse->eeprom_smid == 0x1629))
rtlhal->oem_id = RT_CID_819x_HP;
else
rtlhal->oem_id = RT_CID_DEFAULT;
} else {
rtlhal->oem_id = RT_CID_DEFAULT;
}
break;
case EEPROM_CID_TOSHIBA:
rtlhal->oem_id = RT_CID_TOSHIBA;
break;
case EEPROM_CID_QMI:
rtlhal->oem_id = RT_CID_819x_QMI;
break;
case EEPROM_CID_WHQL:
default:
rtlhal->oem_id = RT_CID_DEFAULT;
break;
}
}
}
static void _rtl92ce_hal_customized_behavior(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
switch (rtlhal->oem_id) {
case RT_CID_819x_HP:
pcipriv->ledctl.led_opendrain = true;
break;
case RT_CID_819x_Lenovo:
case RT_CID_DEFAULT:
case RT_CID_TOSHIBA:
case RT_CID_CCX:
case RT_CID_819x_Acer:
case RT_CID_WHQL:
default:
break;
}
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
"RT Customized ID: 0x%02X\n", rtlhal->oem_id);
}
void rtl92ce_read_eeprom_info(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
struct rtl_phy *rtlphy = &(rtlpriv->phy);
struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
u8 tmp_u1b;
rtlhal->version = _rtl92ce_read_chip_version(hw);
if (get_rf_type(rtlphy) == RF_1T1R)
rtlpriv->dm.rfpath_rxenable[0] = true;
else
rtlpriv->dm.rfpath_rxenable[0] =
rtlpriv->dm.rfpath_rxenable[1] = true;
RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "VersionID = 0x%4x\n",
rtlhal->version);
tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR);
if (tmp_u1b & BIT(4)) {
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EEPROM\n");
rtlefuse->epromtype = EEPROM_93C46;
} else {
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EFUSE\n");
rtlefuse->epromtype = EEPROM_BOOT_EFUSE;
}
if (tmp_u1b & BIT(5)) {
RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n");
rtlefuse->autoload_failflag = false;
_rtl92ce_read_adapter_info(hw);
} else {
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n");
}
_rtl92ce_hal_customized_behavior(hw);
}
static void rtl92ce_update_hal_rate_table(struct ieee80211_hw *hw,
struct ieee80211_sta *sta)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
struct rtl_phy *rtlphy = &(rtlpriv->phy);
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
u32 ratr_value;
u8 ratr_index = 0;
u8 nmode = mac->ht_enable;
u8 mimo_ps = IEEE80211_SMPS_OFF;
u16 shortgi_rate;
u32 tmp_ratr_value;
u8 curtxbw_40mhz = mac->bw_40;
u8 curshortgi_40mhz = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) ?
1 : 0;
u8 curshortgi_20mhz = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20) ?
1 : 0;
enum wireless_mode wirelessmode = mac->mode;
if (rtlhal->current_bandtype == BAND_ON_5G)
ratr_value = sta->supp_rates[1] << 4;
else
ratr_value = sta->supp_rates[0];
ratr_value |= (sta->ht_cap.mcs.rx_mask[1] << 20 |
sta->ht_cap.mcs.rx_mask[0] << 12);
switch (wirelessmode) {
case WIRELESS_MODE_B:
if (ratr_value & 0x0000000c)
ratr_value &= 0x0000000d;
else
ratr_value &= 0x0000000f;
break;
case WIRELESS_MODE_G:
ratr_value &= 0x00000FF5;
break;
case WIRELESS_MODE_N_24G:
case WIRELESS_MODE_N_5G:
nmode = 1;
if (mimo_ps == IEEE80211_SMPS_STATIC) {
ratr_value &= 0x0007F005;
} else {
u32 ratr_mask;
if (get_rf_type(rtlphy) == RF_1T2R ||
get_rf_type(rtlphy) == RF_1T1R)
ratr_mask = 0x000ff005;
else
ratr_mask = 0x0f0ff005;
ratr_value &= ratr_mask;
}
break;
default:
if (rtlphy->rf_type == RF_1T2R)
ratr_value &= 0x000ff0ff;
else
ratr_value &= 0x0f0ff0ff;
break;
}
if ((rtlpcipriv->bt_coexist.bt_coexistence) &&
(rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4) &&
(rtlpcipriv->bt_coexist.bt_cur_state) &&
(rtlpcipriv->bt_coexist.bt_ant_isolation) &&
((rtlpcipriv->bt_coexist.bt_service == BT_SCO) ||
(rtlpcipriv->bt_coexist.bt_service == BT_BUSY)))
ratr_value &= 0x0fffcfc0;
else
ratr_value &= 0x0FFFFFFF;
if (nmode && ((curtxbw_40mhz &&
curshortgi_40mhz) || (!curtxbw_40mhz &&
curshortgi_20mhz))) {
ratr_value |= 0x10000000;
tmp_ratr_value = (ratr_value >> 12);
for (shortgi_rate = 15; shortgi_rate > 0; shortgi_rate--) {
if ((1 << shortgi_rate) & tmp_ratr_value)
break;
}
shortgi_rate = (shortgi_rate << 12) | (shortgi_rate << 8) |
(shortgi_rate << 4) | (shortgi_rate);
}
rtl_write_dword(rtlpriv, REG_ARFR0 + ratr_index * 4, ratr_value);
RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, "%x\n",
rtl_read_dword(rtlpriv, REG_ARFR0));
}
static void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw,
struct ieee80211_sta *sta, u8 rssi_level)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_phy *rtlphy = &(rtlpriv->phy);
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
struct rtl_sta_info *sta_entry = NULL;
u32 ratr_bitmap;
u8 ratr_index;
u8 curtxbw_40mhz = (sta->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40)
? 1 : 0;
u8 curshortgi_40mhz = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) ?
1 : 0;
u8 curshortgi_20mhz = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20) ?
1 : 0;
enum wireless_mode wirelessmode = 0;
bool shortgi = false;
u8 rate_mask[5];
u8 macid = 0;
u8 mimo_ps = IEEE80211_SMPS_OFF;
sta_entry = (struct rtl_sta_info *) sta->drv_priv;
wirelessmode = sta_entry->wireless_mode;
if (mac->opmode == NL80211_IFTYPE_STATION)
curtxbw_40mhz = mac->bw_40;
else if (mac->opmode == NL80211_IFTYPE_AP ||
mac->opmode == NL80211_IFTYPE_ADHOC)
macid = sta->aid + 1;
if (rtlhal->current_bandtype == BAND_ON_5G)
ratr_bitmap = sta->supp_rates[1] << 4;
else
ratr_bitmap = sta->supp_rates[0];
ratr_bitmap |= (sta->ht_cap.mcs.rx_mask[1] << 20 |
sta->ht_cap.mcs.rx_mask[0] << 12);
switch (wirelessmode) {
case WIRELESS_MODE_B:
ratr_index = RATR_INX_WIRELESS_B;
if (ratr_bitmap & 0x0000000c)
ratr_bitmap &= 0x0000000d;
else
ratr_bitmap &= 0x0000000f;
break;
case WIRELESS_MODE_G:
ratr_index = RATR_INX_WIRELESS_GB;
if (rssi_level == 1)
ratr_bitmap &= 0x00000f00;
else if (rssi_level == 2)
ratr_bitmap &= 0x00000ff0;
else
ratr_bitmap &= 0x00000ff5;
break;
case WIRELESS_MODE_A:
ratr_index = RATR_INX_WIRELESS_A;
ratr_bitmap &= 0x00000ff0;
break;
case WIRELESS_MODE_N_24G:
case WIRELESS_MODE_N_5G:
ratr_index = RATR_INX_WIRELESS_NGB;
if (mimo_ps == IEEE80211_SMPS_STATIC) {
if (rssi_level == 1)
ratr_bitmap &= 0x00070000;
else if (rssi_level == 2)
ratr_bitmap &= 0x0007f000;
else
ratr_bitmap &= 0x0007f005;
} else {
if (rtlphy->rf_type == RF_1T2R ||
rtlphy->rf_type == RF_1T1R) {
if (curtxbw_40mhz) {
if (rssi_level == 1)
ratr_bitmap &= 0x000f0000;
else if (rssi_level == 2)
ratr_bitmap &= 0x000ff000;
else
ratr_bitmap &= 0x000ff015;
} else {
if (rssi_level == 1)
ratr_bitmap &= 0x000f0000;
else if (rssi_level == 2)
ratr_bitmap &= 0x000ff000;
else
ratr_bitmap &= 0x000ff005;
}
} else {
if (curtxbw_40mhz) {
if (rssi_level == 1)
ratr_bitmap &= 0x0f0f0000;
else if (rssi_level == 2)
ratr_bitmap &= 0x0f0ff000;
else
ratr_bitmap &= 0x0f0ff015;
} else {
if (rssi_level == 1)
ratr_bitmap &= 0x0f0f0000;
else if (rssi_level == 2)
ratr_bitmap &= 0x0f0ff000;
else
ratr_bitmap &= 0x0f0ff005;
}
}
}
if ((curtxbw_40mhz && curshortgi_40mhz) ||
(!curtxbw_40mhz && curshortgi_20mhz)) {
if (macid == 0)
shortgi = true;
else if (macid == 1)
shortgi = false;
}
break;
default:
ratr_index = RATR_INX_WIRELESS_NGB;
if (rtlphy->rf_type == RF_1T2R)
ratr_bitmap &= 0x000ff0ff;
else
ratr_bitmap &= 0x0f0ff0ff;
break;
}
RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG,
"ratr_bitmap :%x\n", ratr_bitmap);
*(u32 *)&rate_mask = EF4BYTE((ratr_bitmap & 0x0fffffff) |
(ratr_index << 28));
rate_mask[4] = macid | (shortgi ? 0x20 : 0x00) | 0x80;
RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG,
"Rate_index:%x, ratr_val:%x, %x:%x:%x:%x:%x\n",
ratr_index, ratr_bitmap,
rate_mask[0], rate_mask[1], rate_mask[2], rate_mask[3],
rate_mask[4]);
rtl92c_fill_h2c_cmd(hw, H2C_RA_MASK, 5, rate_mask);
if (macid != 0)
sta_entry->ratr_index = ratr_index;
}
void rtl92ce_update_hal_rate_tbl(struct ieee80211_hw *hw,
struct ieee80211_sta *sta, u8 rssi_level)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
if (rtlpriv->dm.useramask)
rtl92ce_update_hal_rate_mask(hw, sta, rssi_level);
else
rtl92ce_update_hal_rate_table(hw, sta);
}
void rtl92ce_update_channel_access_setting(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
u16 sifs_timer;
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME,
(u8 *)&mac->slot_time);
if (!mac->ht_enable)
sifs_timer = 0x0a0a;
else
sifs_timer = 0x1010;
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SIFS, (u8 *)&sifs_timer);
}
bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
enum rf_pwrstate e_rfpowerstate_toset;
u8 u1tmp;
bool actuallyset = false;
unsigned long flag;
if (rtlpci->being_init_adapter)
return false;
if (ppsc->swrf_processing)
return false;
spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag);
if (ppsc->rfchange_inprogress) {
spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
return false;
} else {
ppsc->rfchange_inprogress = true;
spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
}
rtl_write_byte(rtlpriv, REG_MAC_PINMUX_CFG, rtl_read_byte(rtlpriv,
REG_MAC_PINMUX_CFG)&~(BIT(3)));
u1tmp = rtl_read_byte(rtlpriv, REG_GPIO_IO_SEL);
e_rfpowerstate_toset = (u1tmp & BIT(3)) ? ERFON : ERFOFF;
if ((ppsc->hwradiooff) && (e_rfpowerstate_toset == ERFON)) {
RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
"GPIOChangeRF - HW Radio ON, RF ON\n");
e_rfpowerstate_toset = ERFON;
ppsc->hwradiooff = false;
actuallyset = true;
} else if (!ppsc->hwradiooff && (e_rfpowerstate_toset == ERFOFF)) {
RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
"GPIOChangeRF - HW Radio OFF, RF OFF\n");
e_rfpowerstate_toset = ERFOFF;
ppsc->hwradiooff = true;
actuallyset = true;
}
if (actuallyset) {
spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag);
ppsc->rfchange_inprogress = false;
spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
} else {
if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_HALT_NIC)
RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag);
ppsc->rfchange_inprogress = false;
spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
}
*valid = 1;
return !ppsc->hwradiooff;
}
void rtl92ce_set_key(struct ieee80211_hw *hw, u32 key_index,
u8 *p_macaddr, bool is_group, u8 enc_algo,
bool is_wepkey, bool clear_all)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
u8 *macaddr = p_macaddr;
u32 entry_id = 0;
bool is_pairwise = false;
static u8 cam_const_addr[4][6] = {
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
{0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
{0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
{0x00, 0x00, 0x00, 0x00, 0x00, 0x03}
};
static u8 cam_const_broad[] = {
0xff, 0xff, 0xff, 0xff, 0xff, 0xff
};
if (clear_all) {
u8 idx = 0;
u8 cam_offset = 0;
u8 clear_number = 5;
RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n");
for (idx = 0; idx < clear_number; idx++) {
rtl_cam_mark_invalid(hw, cam_offset + idx);
rtl_cam_empty_entry(hw, cam_offset + idx);
if (idx < 5) {
memset(rtlpriv->sec.key_buf[idx], 0,
MAX_KEY_LEN);
rtlpriv->sec.key_len[idx] = 0;
}
}
} else {
switch (enc_algo) {
case WEP40_ENCRYPTION:
enc_algo = CAM_WEP40;
break;
case WEP104_ENCRYPTION:
enc_algo = CAM_WEP104;
break;
case TKIP_ENCRYPTION:
enc_algo = CAM_TKIP;
break;
case AESCCMP_ENCRYPTION:
enc_algo = CAM_AES;
break;
default:
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
"switch case not processed\n");
enc_algo = CAM_TKIP;
break;
}
if (is_wepkey || rtlpriv->sec.use_defaultkey) {
macaddr = cam_const_addr[key_index];
entry_id = key_index;
} else {
if (is_group) {
macaddr = cam_const_broad;
entry_id = key_index;
} else {
if (mac->opmode == NL80211_IFTYPE_AP) {
entry_id = rtl_cam_get_free_entry(hw,
p_macaddr);
if (entry_id >= TOTAL_CAM_ENTRY) {
RT_TRACE(rtlpriv, COMP_SEC,
DBG_EMERG,
"Can not find free hw security cam entry\n");
return;
}
} else {
entry_id = CAM_PAIRWISE_KEY_POSITION;
}
key_index = PAIRWISE_KEYIDX;
is_pairwise = true;
}
}
if (rtlpriv->sec.key_len[key_index] == 0) {
RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
"delete one entry, entry_id is %d\n",
entry_id);
if (mac->opmode == NL80211_IFTYPE_AP)
rtl_cam_del_entry(hw, p_macaddr);
rtl_cam_delete_one_entry(hw, p_macaddr, entry_id);
} else {
RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
"The insert KEY length is %d\n",
rtlpriv->sec.key_len[PAIRWISE_KEYIDX]);
RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
"The insert KEY is %x %x\n",
rtlpriv->sec.key_buf[0][0],
rtlpriv->sec.key_buf[0][1]);
RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
"add one entry\n");
if (is_pairwise) {
RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD,
"Pairwise Key content",
rtlpriv->sec.pairwise_key,
rtlpriv->sec.
key_len[PAIRWISE_KEYIDX]);
RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
"set Pairwise key\n");
rtl_cam_add_one_entry(hw, macaddr, key_index,
entry_id, enc_algo,
CAM_CONFIG_NO_USEDK,
rtlpriv->sec.
key_buf[key_index]);
} else {
RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
"set group key\n");
if (mac->opmode == NL80211_IFTYPE_ADHOC) {
rtl_cam_add_one_entry(hw,
rtlefuse->dev_addr,
PAIRWISE_KEYIDX,
CAM_PAIRWISE_KEY_POSITION,
enc_algo,
CAM_CONFIG_NO_USEDK,
rtlpriv->sec.key_buf
[entry_id]);
}
rtl_cam_add_one_entry(hw, macaddr, key_index,
entry_id, enc_algo,
CAM_CONFIG_NO_USEDK,
rtlpriv->sec.key_buf[entry_id]);
}
}
}
}
static void rtl8192ce_bt_var_init(struct ieee80211_hw *hw)
{
struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
rtlpcipriv->bt_coexist.bt_coexistence =
rtlpcipriv->bt_coexist.eeprom_bt_coexist;
rtlpcipriv->bt_coexist.bt_ant_num =
rtlpcipriv->bt_coexist.eeprom_bt_ant_num;
rtlpcipriv->bt_coexist.bt_coexist_type =
rtlpcipriv->bt_coexist.eeprom_bt_type;
if (rtlpcipriv->bt_coexist.reg_bt_iso == 2)
rtlpcipriv->bt_coexist.bt_ant_isolation =
rtlpcipriv->bt_coexist.eeprom_bt_ant_isolation;
else
rtlpcipriv->bt_coexist.bt_ant_isolation =
rtlpcipriv->bt_coexist.reg_bt_iso;
rtlpcipriv->bt_coexist.bt_radio_shared_type =
rtlpcipriv->bt_coexist.eeprom_bt_radio_shared;
if (rtlpcipriv->bt_coexist.bt_coexistence) {
if (rtlpcipriv->bt_coexist.reg_bt_sco == 1)
rtlpcipriv->bt_coexist.bt_service = BT_OTHER_ACTION;
else if (rtlpcipriv->bt_coexist.reg_bt_sco == 2)
rtlpcipriv->bt_coexist.bt_service = BT_SCO;
else if (rtlpcipriv->bt_coexist.reg_bt_sco == 4)
rtlpcipriv->bt_coexist.bt_service = BT_BUSY;
else if (rtlpcipriv->bt_coexist.reg_bt_sco == 5)
rtlpcipriv->bt_coexist.bt_service = BT_OTHERBUSY;
else
rtlpcipriv->bt_coexist.bt_service = BT_IDLE;
rtlpcipriv->bt_coexist.bt_edca_ul = 0;
rtlpcipriv->bt_coexist.bt_edca_dl = 0;
rtlpcipriv->bt_coexist.bt_rssi_state = 0xff;
}
}
void rtl8192ce_read_bt_coexist_info_from_hwpg(struct ieee80211_hw *hw,
bool auto_load_fail, u8 *hwinfo)
{
struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
u8 value;
if (!auto_load_fail) {
rtlpcipriv->bt_coexist.eeprom_bt_coexist =
((hwinfo[RF_OPTION1] & 0xe0) >> 5);
value = hwinfo[RF_OPTION4];
rtlpcipriv->bt_coexist.eeprom_bt_type = ((value & 0xe) >> 1);
rtlpcipriv->bt_coexist.eeprom_bt_ant_num = (value & 0x1);
rtlpcipriv->bt_coexist.eeprom_bt_ant_isolation =
((value & 0x10) >> 4);
rtlpcipriv->bt_coexist.eeprom_bt_radio_shared =
((value & 0x20) >> 5);
} else {
rtlpcipriv->bt_coexist.eeprom_bt_coexist = 0;
rtlpcipriv->bt_coexist.eeprom_bt_type = BT_2WIRE;
rtlpcipriv->bt_coexist.eeprom_bt_ant_num = ANT_X2;
rtlpcipriv->bt_coexist.eeprom_bt_ant_isolation = 0;
rtlpcipriv->bt_coexist.eeprom_bt_radio_shared = BT_RADIO_SHARED;
}
rtl8192ce_bt_var_init(hw);
}
void rtl8192ce_bt_reg_init(struct ieee80211_hw *hw)
{
struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
/* 0:Low, 1:High, 2:From Efuse. */
rtlpcipriv->bt_coexist.reg_bt_iso = 2;
/* 0:Idle, 1:None-SCO, 2:SCO, 3:From Counter. */
rtlpcipriv->bt_coexist.reg_bt_sco = 3;
/* 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU. */
rtlpcipriv->bt_coexist.reg_bt_sco = 0;
}
void rtl8192ce_bt_hw_init(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_phy *rtlphy = &(rtlpriv->phy);
struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
u8 u1_tmp;
if (rtlpcipriv->bt_coexist.bt_coexistence &&
((rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4) ||
rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC8)) {
if (rtlpcipriv->bt_coexist.bt_ant_isolation)
rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0xa0);
u1_tmp = rtl_read_byte(rtlpriv, 0x4fd) &
BIT_OFFSET_LEN_MASK_32(0, 1);
u1_tmp = u1_tmp |
((rtlpcipriv->bt_coexist.bt_ant_isolation == 1) ?
0 : BIT_OFFSET_LEN_MASK_32(1, 1)) |
((rtlpcipriv->bt_coexist.bt_service == BT_SCO) ?
0 : BIT_OFFSET_LEN_MASK_32(2, 1));
rtl_write_byte(rtlpriv, 0x4fd, u1_tmp);
rtl_write_dword(rtlpriv, REG_BT_COEX_TABLE+4, 0xaaaa9aaa);
rtl_write_dword(rtlpriv, REG_BT_COEX_TABLE+8, 0xffbd0040);
rtl_write_dword(rtlpriv, REG_BT_COEX_TABLE+0xc, 0x40000010);
/* Config to 1T1R. */
if (rtlphy->rf_type == RF_1T1R) {
u1_tmp = rtl_read_byte(rtlpriv, ROFDM0_TRXPATHENABLE);
u1_tmp &= ~(BIT_OFFSET_LEN_MASK_32(1, 1));
rtl_write_byte(rtlpriv, ROFDM0_TRXPATHENABLE, u1_tmp);
u1_tmp = rtl_read_byte(rtlpriv, ROFDM1_TRXPATHENABLE);
u1_tmp &= ~(BIT_OFFSET_LEN_MASK_32(1, 1));
rtl_write_byte(rtlpriv, ROFDM1_TRXPATHENABLE, u1_tmp);
}
}
}
void rtl92ce_suspend(struct ieee80211_hw *hw)
{
}
void rtl92ce_resume(struct ieee80211_hw *hw)
{
}
| gpl-2.0 |
droidzone/bravo_2.6.35_gb-mr | arch/powerpc/platforms/fsl_uli1575.c | 4077 | 9402 | /*
* ULI M1575 setup code - specific to Freescale boards
*
* Copyright 2007 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/mc146818rtc.h>
#include <asm/system.h>
#include <asm/pci-bridge.h>
#define ULI_PIRQA 0x08
#define ULI_PIRQB 0x09
#define ULI_PIRQC 0x0a
#define ULI_PIRQD 0x0b
#define ULI_PIRQE 0x0c
#define ULI_PIRQF 0x0d
#define ULI_PIRQG 0x0e
#define ULI_8259_NONE 0x00
#define ULI_8259_IRQ1 0x08
#define ULI_8259_IRQ3 0x02
#define ULI_8259_IRQ4 0x04
#define ULI_8259_IRQ5 0x05
#define ULI_8259_IRQ6 0x07
#define ULI_8259_IRQ7 0x06
#define ULI_8259_IRQ9 0x01
#define ULI_8259_IRQ10 0x03
#define ULI_8259_IRQ11 0x09
#define ULI_8259_IRQ12 0x0b
#define ULI_8259_IRQ14 0x0d
#define ULI_8259_IRQ15 0x0f
u8 uli_pirq_to_irq[8] = {
ULI_8259_IRQ9, /* PIRQA */
ULI_8259_IRQ10, /* PIRQB */
ULI_8259_IRQ11, /* PIRQC */
ULI_8259_IRQ12, /* PIRQD */
ULI_8259_IRQ5, /* PIRQE */
ULI_8259_IRQ6, /* PIRQF */
ULI_8259_IRQ7, /* PIRQG */
ULI_8259_NONE, /* PIRQH */
};
static inline bool is_quirk_valid(void)
{
return (machine_is(mpc86xx_hpcn) ||
machine_is(mpc8544_ds) ||
machine_is(p2020_ds) ||
machine_is(mpc8572_ds));
}
/* Bridge */
static void __devinit early_uli5249(struct pci_dev *dev)
{
unsigned char temp;
if (!is_quirk_valid())
return;
pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_IO |
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
/* read/write lock */
pci_read_config_byte(dev, 0x7c, &temp);
pci_write_config_byte(dev, 0x7c, 0x80);
/* set as P2P bridge */
pci_write_config_byte(dev, PCI_CLASS_PROG, 0x01);
dev->class |= 0x1;
/* restore lock */
pci_write_config_byte(dev, 0x7c, temp);
}
static void __devinit quirk_uli1575(struct pci_dev *dev)
{
int i;
if (!is_quirk_valid())
return;
/*
* ULI1575 interrupts route setup
*/
/* ULI1575 IRQ mapping conf register maps PIRQx to IRQn */
for (i = 0; i < 4; i++) {
u8 val = uli_pirq_to_irq[i*2] | (uli_pirq_to_irq[i*2+1] << 4);
pci_write_config_byte(dev, 0x48 + i, val);
}
/* USB 1.1 OHCI controller 1: dev 28, func 0 - IRQ12 */
pci_write_config_byte(dev, 0x86, ULI_PIRQD);
/* USB 1.1 OHCI controller 2: dev 28, func 1 - IRQ9 */
pci_write_config_byte(dev, 0x87, ULI_PIRQA);
/* USB 1.1 OHCI controller 3: dev 28, func 2 - IRQ10 */
pci_write_config_byte(dev, 0x88, ULI_PIRQB);
/* Lan controller: dev 27, func 0 - IRQ6 */
pci_write_config_byte(dev, 0x89, ULI_PIRQF);
/* AC97 Audio controller: dev 29, func 0 - IRQ6 */
pci_write_config_byte(dev, 0x8a, ULI_PIRQF);
/* Modem controller: dev 29, func 1 - IRQ6 */
pci_write_config_byte(dev, 0x8b, ULI_PIRQF);
/* HD Audio controller: dev 29, func 2 - IRQ6 */
pci_write_config_byte(dev, 0x8c, ULI_PIRQF);
/* SATA controller: dev 31, func 1 - IRQ5 */
pci_write_config_byte(dev, 0x8d, ULI_PIRQE);
/* SMB interrupt: dev 30, func 1 - IRQ7 */
pci_write_config_byte(dev, 0x8e, ULI_PIRQG);
/* PMU ACPI SCI interrupt: dev 30, func 2 - IRQ7 */
pci_write_config_byte(dev, 0x8f, ULI_PIRQG);
/* USB 2.0 controller: dev 28, func 3 */
pci_write_config_byte(dev, 0x74, ULI_8259_IRQ11);
/* Primary PATA IDE IRQ: 14
* Secondary PATA IDE IRQ: 15
*/
pci_write_config_byte(dev, 0x44, 0x30 | ULI_8259_IRQ14);
pci_write_config_byte(dev, 0x75, ULI_8259_IRQ15);
}
static void __devinit quirk_final_uli1575(struct pci_dev *dev)
{
/* Set i8259 interrupt trigger
* IRQ 3: Level
* IRQ 4: Level
* IRQ 5: Level
* IRQ 6: Level
* IRQ 7: Level
* IRQ 9: Level
* IRQ 10: Level
* IRQ 11: Level
* IRQ 12: Level
* IRQ 14: Edge
* IRQ 15: Edge
*/
if (!is_quirk_valid())
return;
outb(0xfa, 0x4d0);
outb(0x1e, 0x4d1);
/* setup RTC */
CMOS_WRITE(RTC_SET, RTC_CONTROL);
CMOS_WRITE(RTC_24H, RTC_CONTROL);
/* ensure month, date, and week alarm fields are ignored */
CMOS_WRITE(0, RTC_VALID);
outb_p(0x7c, 0x72);
outb_p(RTC_ALARM_DONT_CARE, 0x73);
outb_p(0x7d, 0x72);
outb_p(RTC_ALARM_DONT_CARE, 0x73);
}
/* SATA */
static void __devinit quirk_uli5288(struct pci_dev *dev)
{
unsigned char c;
unsigned int d;
if (!is_quirk_valid())
return;
/* read/write lock */
pci_read_config_byte(dev, 0x83, &c);
pci_write_config_byte(dev, 0x83, c|0x80);
pci_read_config_dword(dev, PCI_CLASS_REVISION, &d);
d = (d & 0xff) | (PCI_CLASS_STORAGE_SATA_AHCI << 8);
pci_write_config_dword(dev, PCI_CLASS_REVISION, d);
/* restore lock */
pci_write_config_byte(dev, 0x83, c);
/* disable emulated PATA mode enabled */
pci_read_config_byte(dev, 0x84, &c);
pci_write_config_byte(dev, 0x84, c & ~0x01);
}
/* PATA */
static void __devinit quirk_uli5229(struct pci_dev *dev)
{
unsigned short temp;
if (!is_quirk_valid())
return;
pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE |
PCI_COMMAND_MASTER | PCI_COMMAND_IO);
/* Enable Native IRQ 14/15 */
pci_read_config_word(dev, 0x4a, &temp);
pci_write_config_word(dev, 0x4a, temp | 0x1000);
}
/* We have to do a dummy read on the P2P for the RTC to work, WTF */
static void __devinit quirk_final_uli5249(struct pci_dev *dev)
{
int i;
u8 *dummy;
struct pci_bus *bus = dev->bus;
struct resource *res;
resource_size_t end = 0;
for (i = PCI_BRIDGE_RESOURCES; i < PCI_BRIDGE_RESOURCES+3; i++) {
unsigned long flags = pci_resource_flags(dev, i);
if ((flags & (IORESOURCE_MEM|IORESOURCE_PREFETCH)) == IORESOURCE_MEM)
end = pci_resource_end(dev, i);
}
pci_bus_for_each_resource(bus, res, i) {
if (res && res->flags & IORESOURCE_MEM) {
if (res->end == end)
dummy = ioremap(res->start, 0x4);
else
dummy = ioremap(res->end - 3, 0x4);
if (dummy) {
in_8(dummy);
iounmap(dummy);
}
break;
}
}
}
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_uli1575);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, 0x5249, quirk_final_uli5249);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, 0x1575, quirk_final_uli1575);
DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
static void __devinit hpcd_quirk_uli1575(struct pci_dev *dev)
{
u32 temp32;
if (!machine_is(mpc86xx_hpcd))
return;
/* Disable INTx */
pci_read_config_dword(dev, 0x48, &temp32);
pci_write_config_dword(dev, 0x48, (temp32 | 1<<26));
/* Enable sideband interrupt */
pci_read_config_dword(dev, 0x90, &temp32);
pci_write_config_dword(dev, 0x90, (temp32 | 1<<22));
}
static void __devinit hpcd_quirk_uli5288(struct pci_dev *dev)
{
unsigned char c;
if (!machine_is(mpc86xx_hpcd))
return;
pci_read_config_byte(dev, 0x83, &c);
c |= 0x80;
pci_write_config_byte(dev, 0x83, c);
pci_write_config_byte(dev, PCI_CLASS_PROG, 0x01);
pci_write_config_byte(dev, PCI_CLASS_DEVICE, 0x06);
pci_read_config_byte(dev, 0x83, &c);
c &= 0x7f;
pci_write_config_byte(dev, 0x83, c);
}
/*
* Since 8259PIC was disabled on the board, the IDE device can not
* use the legacy IRQ, we need to let the IDE device work under
* native mode and use the interrupt line like other PCI devices.
* IRQ14 is a sideband interrupt from IDE device to CPU and we use this
* as the interrupt for IDE device.
*/
static void __devinit hpcd_quirk_uli5229(struct pci_dev *dev)
{
unsigned char c;
if (!machine_is(mpc86xx_hpcd))
return;
pci_read_config_byte(dev, 0x4b, &c);
c |= 0x10;
pci_write_config_byte(dev, 0x4b, c);
}
/*
* SATA interrupt pin bug fix
* There's a chip bug for 5288, The interrupt pin should be 2,
* not the read only value 1, So it use INTB#, not INTA# which
* actually used by the IDE device 5229.
* As of this bug, during the PCI initialization, 5288 read the
* irq of IDE device from the device tree, this function fix this
* bug by re-assigning a correct irq to 5288.
*
*/
static void __devinit hpcd_final_uli5288(struct pci_dev *dev)
{
struct pci_controller *hose = pci_bus_to_host(dev->bus);
struct device_node *hosenode = hose ? hose->dn : NULL;
struct of_irq oirq;
int virq, pin = 2;
u32 laddr[3];
if (!machine_is(mpc86xx_hpcd))
return;
if (!hosenode)
return;
laddr[0] = (hose->first_busno << 16) | (PCI_DEVFN(31, 0) << 8);
laddr[1] = laddr[2] = 0;
of_irq_map_raw(hosenode, &pin, 1, laddr, &oirq);
virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
oirq.size);
dev->irq = virq;
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, hpcd_quirk_uli1575);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, hpcd_quirk_uli5288);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, hpcd_quirk_uli5229);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, 0x5288, hpcd_final_uli5288);
int uli_exclude_device(struct pci_controller *hose,
u_char bus, u_char devfn)
{
if (bus == (hose->first_busno + 2)) {
/* exclude Modem controller */
if ((PCI_SLOT(devfn) == 29) && (PCI_FUNC(devfn) == 1))
return PCIBIOS_DEVICE_NOT_FOUND;
/* exclude HD Audio controller */
if ((PCI_SLOT(devfn) == 29) && (PCI_FUNC(devfn) == 2))
return PCIBIOS_DEVICE_NOT_FOUND;
}
return PCIBIOS_SUCCESSFUL;
}
| gpl-2.0 |
chevanlol360/Kernel_LGE_Fx1 | arch/mn10300/mm/pgtable.c | 4589 | 4639 | /* MN10300 Page table management
*
* Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
* Modified by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public Licence
* as published by the Free Software Foundation; either version
* 2 of the Licence, or (at your option) any later version.
*/
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/gfp.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/smp.h>
#include <linux/highmem.h>
#include <linux/pagemap.h>
#include <linux/spinlock.h>
#include <linux/quicklist.h>
#include <asm/pgtable.h>
#include <asm/pgalloc.h>
#include <asm/tlb.h>
#include <asm/tlbflush.h>
/*
* Associate a large virtual page frame with a given physical page frame
* and protection flags for that frame. pfn is for the base of the page,
* vaddr is what the page gets mapped to - both must be properly aligned.
* The pmd must already be instantiated. Assumes PAE mode.
*/
void set_pmd_pfn(unsigned long vaddr, unsigned long pfn, pgprot_t flags)
{
pgd_t *pgd;
pud_t *pud;
pmd_t *pmd;
if (vaddr & (PMD_SIZE-1)) { /* vaddr is misaligned */
printk(KERN_ERR "set_pmd_pfn: vaddr misaligned\n");
return; /* BUG(); */
}
if (pfn & (PTRS_PER_PTE-1)) { /* pfn is misaligned */
printk(KERN_ERR "set_pmd_pfn: pfn misaligned\n");
return; /* BUG(); */
}
pgd = swapper_pg_dir + pgd_index(vaddr);
if (pgd_none(*pgd)) {
printk(KERN_ERR "set_pmd_pfn: pgd_none\n");
return; /* BUG(); */
}
pud = pud_offset(pgd, vaddr);
pmd = pmd_offset(pud, vaddr);
set_pmd(pmd, pfn_pmd(pfn, flags));
/*
* It's enough to flush this one mapping.
* (PGE mappings get flushed as well)
*/
local_flush_tlb_one(vaddr);
}
pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
{
pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT);
if (pte)
clear_page(pte);
return pte;
}
struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address)
{
struct page *pte;
#ifdef CONFIG_HIGHPTE
pte = alloc_pages(GFP_KERNEL|__GFP_HIGHMEM|__GFP_REPEAT, 0);
#else
pte = alloc_pages(GFP_KERNEL|__GFP_REPEAT, 0);
#endif
if (pte)
clear_highpage(pte);
return pte;
}
/*
* List of all pgd's needed for non-PAE so it can invalidate entries
* in both cached and uncached pgd's; not needed for PAE since the
* kernel pmd is shared. If PAE were not to share the pmd a similar
* tactic would be needed. This is essentially codepath-based locking
* against pageattr.c; it is the unique case in which a valid change
* of kernel pagetables can't be lazily synchronized by vmalloc faults.
* vmalloc faults work because attached pagetables are never freed.
* If the locking proves to be non-performant, a ticketing scheme with
* checks at dup_mmap(), exec(), and other mmlist addition points
* could be used. The locking scheme was chosen on the basis of
* manfred's recommendations and having no core impact whatsoever.
* -- wli
*/
DEFINE_SPINLOCK(pgd_lock);
struct page *pgd_list;
static inline void pgd_list_add(pgd_t *pgd)
{
struct page *page = virt_to_page(pgd);
page->index = (unsigned long) pgd_list;
if (pgd_list)
set_page_private(pgd_list, (unsigned long) &page->index);
pgd_list = page;
set_page_private(page, (unsigned long) &pgd_list);
}
static inline void pgd_list_del(pgd_t *pgd)
{
struct page *next, **pprev, *page = virt_to_page(pgd);
next = (struct page *) page->index;
pprev = (struct page **) page_private(page);
*pprev = next;
if (next)
set_page_private(next, (unsigned long) pprev);
}
void pgd_ctor(void *pgd)
{
unsigned long flags;
if (PTRS_PER_PMD == 1)
spin_lock_irqsave(&pgd_lock, flags);
memcpy((pgd_t *)pgd + USER_PTRS_PER_PGD,
swapper_pg_dir + USER_PTRS_PER_PGD,
(PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
if (PTRS_PER_PMD > 1)
return;
pgd_list_add(pgd);
spin_unlock_irqrestore(&pgd_lock, flags);
memset(pgd, 0, USER_PTRS_PER_PGD * sizeof(pgd_t));
}
/* never called when PTRS_PER_PMD > 1 */
void pgd_dtor(void *pgd)
{
unsigned long flags; /* can be called from interrupt context */
spin_lock_irqsave(&pgd_lock, flags);
pgd_list_del(pgd);
spin_unlock_irqrestore(&pgd_lock, flags);
}
pgd_t *pgd_alloc(struct mm_struct *mm)
{
return quicklist_alloc(0, GFP_KERNEL, pgd_ctor);
}
void pgd_free(struct mm_struct *mm, pgd_t *pgd)
{
quicklist_free(0, pgd_dtor, pgd);
}
void __init pgtable_cache_init(void)
{
}
void check_pgt_cache(void)
{
quicklist_trim(0, pgd_dtor, 25, 16);
}
| gpl-2.0 |
talnoah/Lemur_UpdatedBase | arch/powerpc/platforms/cell/setup.c | 4589 | 6483 | /*
* linux/arch/powerpc/platforms/cell/cell_setup.c
*
* Copyright (C) 1995 Linus Torvalds
* Adapted from 'alpha' version by Gary Thomas
* Modified by Cort Dougan (cort@cs.nmt.edu)
* Modified by PPC64 Team, IBM Corp
* Modified by Cell Team, IBM Deutschland Entwicklung GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#undef DEBUG
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/export.h>
#include <linux/unistd.h>
#include <linux/user.h>
#include <linux/reboot.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/console.h>
#include <linux/mutex.h>
#include <linux/memory_hotplug.h>
#include <linux/of_platform.h>
#include <asm/mmu.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/prom.h>
#include <asm/rtas.h>
#include <asm/pci-bridge.h>
#include <asm/iommu.h>
#include <asm/dma.h>
#include <asm/machdep.h>
#include <asm/time.h>
#include <asm/nvram.h>
#include <asm/cputable.h>
#include <asm/ppc-pci.h>
#include <asm/irq.h>
#include <asm/spu.h>
#include <asm/spu_priv1.h>
#include <asm/udbg.h>
#include <asm/mpic.h>
#include <asm/cell-regs.h>
#include <asm/io-workarounds.h>
#include "interrupt.h"
#include "pervasive.h"
#include "ras.h"
#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
#else
#define DBG(fmt...)
#endif
static void cell_show_cpuinfo(struct seq_file *m)
{
struct device_node *root;
const char *model = "";
root = of_find_node_by_path("/");
if (root)
model = of_get_property(root, "model", NULL);
seq_printf(m, "machine\t\t: CHRP %s\n", model);
of_node_put(root);
}
static void cell_progress(char *s, unsigned short hex)
{
printk("*** %04x : %s\n", hex, s ? s : "");
}
static void cell_fixup_pcie_rootcomplex(struct pci_dev *dev)
{
struct pci_controller *hose;
const char *s;
int i;
if (!machine_is(cell))
return;
/* We're searching for a direct child of the PHB */
if (dev->bus->self != NULL || dev->devfn != 0)
return;
hose = pci_bus_to_host(dev->bus);
if (hose == NULL)
return;
/* Only on PCIE */
if (!of_device_is_compatible(hose->dn, "pciex"))
return;
/* And only on axon */
s = of_get_property(hose->dn, "model", NULL);
if (!s || strcmp(s, "Axon") != 0)
return;
for (i = 0; i < PCI_BRIDGE_RESOURCES; i++) {
dev->resource[i].start = dev->resource[i].end = 0;
dev->resource[i].flags = 0;
}
printk(KERN_DEBUG "PCI: Hiding resources on Axon PCIE RC %s\n",
pci_name(dev));
}
DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, cell_fixup_pcie_rootcomplex);
static int __devinit cell_setup_phb(struct pci_controller *phb)
{
const char *model;
struct device_node *np;
int rc = rtas_setup_phb(phb);
if (rc)
return rc;
np = phb->dn;
model = of_get_property(np, "model", NULL);
if (model == NULL || strcmp(np->name, "pci"))
return 0;
/* Setup workarounds for spider */
if (strcmp(model, "Spider"))
return 0;
iowa_register_bus(phb, &spiderpci_ops, &spiderpci_iowa_init,
(void *)SPIDER_PCI_REG_BASE);
return 0;
}
static const struct of_device_id cell_bus_ids[] __initconst = {
{ .type = "soc", },
{ .compatible = "soc", },
{ .type = "spider", },
{ .type = "axon", },
{ .type = "plb5", },
{ .type = "plb4", },
{ .type = "opb", },
{ .type = "ebc", },
{},
};
static int __init cell_publish_devices(void)
{
struct device_node *root = of_find_node_by_path("/");
struct device_node *np;
int node;
/* Publish OF platform devices for southbridge IOs */
of_platform_bus_probe(NULL, cell_bus_ids, NULL);
/* On spider based blades, we need to manually create the OF
* platform devices for the PCI host bridges
*/
for_each_child_of_node(root, np) {
if (np->type == NULL || (strcmp(np->type, "pci") != 0 &&
strcmp(np->type, "pciex") != 0))
continue;
of_platform_device_create(np, NULL, NULL);
}
/* There is no device for the MIC memory controller, thus we create
* a platform device for it to attach the EDAC driver to.
*/
for_each_online_node(node) {
if (cbe_get_cpu_mic_tm_regs(cbe_node_to_cpu(node)) == NULL)
continue;
platform_device_register_simple("cbe-mic", node, NULL, 0);
}
return 0;
}
machine_subsys_initcall(cell, cell_publish_devices);
static void __init mpic_init_IRQ(void)
{
struct device_node *dn;
struct mpic *mpic;
for (dn = NULL;
(dn = of_find_node_by_name(dn, "interrupt-controller"));) {
if (!of_device_is_compatible(dn, "CBEA,platform-open-pic"))
continue;
/* The MPIC driver will get everything it needs from the
* device-tree, just pass 0 to all arguments
*/
mpic = mpic_alloc(dn, 0, MPIC_SECONDARY | MPIC_NO_RESET,
0, 0, " MPIC ");
if (mpic == NULL)
continue;
mpic_init(mpic);
}
}
static void __init cell_init_irq(void)
{
iic_init_IRQ();
spider_init_IRQ();
mpic_init_IRQ();
}
static void __init cell_set_dabrx(void)
{
mtspr(SPRN_DABRX, DABRX_KERNEL | DABRX_USER);
}
static void __init cell_setup_arch(void)
{
#ifdef CONFIG_SPU_BASE
spu_priv1_ops = &spu_priv1_mmio_ops;
spu_management_ops = &spu_management_of_ops;
#endif
cbe_regs_init();
cell_set_dabrx();
#ifdef CONFIG_CBE_RAS
cbe_ras_init();
#endif
#ifdef CONFIG_SMP
smp_init_cell();
#endif
/* init to some ~sane value until calibrate_delay() runs */
loops_per_jiffy = 50000000;
/* Find and initialize PCI host bridges */
init_pci_config_tokens();
cbe_pervasive_init();
#ifdef CONFIG_DUMMY_CONSOLE
conswitchp = &dummy_con;
#endif
mmio_nvram_init();
}
static int __init cell_probe(void)
{
unsigned long root = of_get_flat_dt_root();
if (!of_flat_dt_is_compatible(root, "IBM,CBEA") &&
!of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
return 0;
hpte_init_native();
return 1;
}
define_machine(cell) {
.name = "Cell",
.probe = cell_probe,
.setup_arch = cell_setup_arch,
.show_cpuinfo = cell_show_cpuinfo,
.restart = rtas_restart,
.power_off = rtas_power_off,
.halt = rtas_halt,
.get_boot_time = rtas_get_boot_time,
.get_rtc_time = rtas_get_rtc_time,
.set_rtc_time = rtas_set_rtc_time,
.calibrate_decr = generic_calibrate_decr,
.progress = cell_progress,
.init_IRQ = cell_init_irq,
.pci_setup_phb = cell_setup_phb,
};
| gpl-2.0 |
lodr/codeaurora_kernel_msm | arch/ia64/sn/kernel/sn2/sn_hwperf.c | 4589 | 23323 | /*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2004-2006 Silicon Graphics, Inc. All rights reserved.
*
* SGI Altix topology and hardware performance monitoring API.
* Mark Goodwin <markgw@sgi.com>.
*
* Creates /proc/sgi_sn/sn_topology (read-only) to export
* info about Altix nodes, routers, CPUs and NumaLink
* interconnection/topology.
*
* Also creates a dynamic misc device named "sn_hwperf"
* that supports an ioctl interface to call down into SAL
* to discover hw objects, topology and to read/write
* memory mapped registers, e.g. for performance monitoring.
* The "sn_hwperf" device is registered only after the procfs
* file is first opened, i.e. only if/when it's needed.
*
* This API is used by SGI Performance Co-Pilot and other
* tools, see http://oss.sgi.com/projects/pcp
*/
#include <linux/fs.h>
#include <linux/slab.h>
#include <linux/export.h>
#include <linux/vmalloc.h>
#include <linux/seq_file.h>
#include <linux/miscdevice.h>
#include <linux/utsname.h>
#include <linux/cpumask.h>
#include <linux/nodemask.h>
#include <linux/smp.h>
#include <linux/mutex.h>
#include <asm/processor.h>
#include <asm/topology.h>
#include <asm/uaccess.h>
#include <asm/sal.h>
#include <asm/sn/io.h>
#include <asm/sn/sn_sal.h>
#include <asm/sn/module.h>
#include <asm/sn/geo.h>
#include <asm/sn/sn2/sn_hwperf.h>
#include <asm/sn/addrs.h>
static void *sn_hwperf_salheap = NULL;
static int sn_hwperf_obj_cnt = 0;
static nasid_t sn_hwperf_master_nasid = INVALID_NASID;
static int sn_hwperf_init(void);
static DEFINE_MUTEX(sn_hwperf_init_mutex);
#define cnode_possible(n) ((n) < num_cnodes)
static int sn_hwperf_enum_objects(int *nobj, struct sn_hwperf_object_info **ret)
{
int e;
u64 sz;
struct sn_hwperf_object_info *objbuf = NULL;
if ((e = sn_hwperf_init()) < 0) {
printk(KERN_ERR "sn_hwperf_init failed: err %d\n", e);
goto out;
}
sz = sn_hwperf_obj_cnt * sizeof(struct sn_hwperf_object_info);
objbuf = vmalloc(sz);
if (objbuf == NULL) {
printk("sn_hwperf_enum_objects: vmalloc(%d) failed\n", (int)sz);
e = -ENOMEM;
goto out;
}
e = ia64_sn_hwperf_op(sn_hwperf_master_nasid, SN_HWPERF_ENUM_OBJECTS,
0, sz, (u64) objbuf, 0, 0, NULL);
if (e != SN_HWPERF_OP_OK) {
e = -EINVAL;
vfree(objbuf);
}
out:
*nobj = sn_hwperf_obj_cnt;
*ret = objbuf;
return e;
}
static int sn_hwperf_location_to_bpos(char *location,
int *rack, int *bay, int *slot, int *slab)
{
char type;
/* first scan for an old style geoid string */
if (sscanf(location, "%03d%c%02d#%d",
rack, &type, bay, slab) == 4)
*slot = 0;
else /* scan for a new bladed geoid string */
if (sscanf(location, "%03d%c%02d^%02d#%d",
rack, &type, bay, slot, slab) != 5)
return -1;
/* success */
return 0;
}
static int sn_hwperf_geoid_to_cnode(char *location)
{
int cnode;
geoid_t geoid;
moduleid_t module_id;
int rack, bay, slot, slab;
int this_rack, this_bay, this_slot, this_slab;
if (sn_hwperf_location_to_bpos(location, &rack, &bay, &slot, &slab))
return -1;
/*
* FIXME: replace with cleaner for_each_XXX macro which addresses
* both compute and IO nodes once ACPI3.0 is available.
*/
for (cnode = 0; cnode < num_cnodes; cnode++) {
geoid = cnodeid_get_geoid(cnode);
module_id = geo_module(geoid);
this_rack = MODULE_GET_RACK(module_id);
this_bay = MODULE_GET_BPOS(module_id);
this_slot = geo_slot(geoid);
this_slab = geo_slab(geoid);
if (rack == this_rack && bay == this_bay &&
slot == this_slot && slab == this_slab) {
break;
}
}
return cnode_possible(cnode) ? cnode : -1;
}
static int sn_hwperf_obj_to_cnode(struct sn_hwperf_object_info * obj)
{
if (!SN_HWPERF_IS_NODE(obj) && !SN_HWPERF_IS_IONODE(obj))
BUG();
if (SN_HWPERF_FOREIGN(obj))
return -1;
return sn_hwperf_geoid_to_cnode(obj->location);
}
static int sn_hwperf_generic_ordinal(struct sn_hwperf_object_info *obj,
struct sn_hwperf_object_info *objs)
{
int ordinal;
struct sn_hwperf_object_info *p;
for (ordinal=0, p=objs; p != obj; p++) {
if (SN_HWPERF_FOREIGN(p))
continue;
if (SN_HWPERF_SAME_OBJTYPE(p, obj))
ordinal++;
}
return ordinal;
}
static const char *slabname_node = "node"; /* SHub asic */
static const char *slabname_ionode = "ionode"; /* TIO asic */
static const char *slabname_router = "router"; /* NL3R or NL4R */
static const char *slabname_other = "other"; /* unknown asic */
static const char *sn_hwperf_get_slabname(struct sn_hwperf_object_info *obj,
struct sn_hwperf_object_info *objs, int *ordinal)
{
int isnode;
const char *slabname = slabname_other;
if ((isnode = SN_HWPERF_IS_NODE(obj)) || SN_HWPERF_IS_IONODE(obj)) {
slabname = isnode ? slabname_node : slabname_ionode;
*ordinal = sn_hwperf_obj_to_cnode(obj);
}
else {
*ordinal = sn_hwperf_generic_ordinal(obj, objs);
if (SN_HWPERF_IS_ROUTER(obj))
slabname = slabname_router;
}
return slabname;
}
static void print_pci_topology(struct seq_file *s)
{
char *p;
size_t sz;
int e;
for (sz = PAGE_SIZE; sz < 16 * PAGE_SIZE; sz += PAGE_SIZE) {
if (!(p = kmalloc(sz, GFP_KERNEL)))
break;
e = ia64_sn_ioif_get_pci_topology(__pa(p), sz);
if (e == SALRET_OK)
seq_puts(s, p);
kfree(p);
if (e == SALRET_OK || e == SALRET_NOT_IMPLEMENTED)
break;
}
}
static inline int sn_hwperf_has_cpus(cnodeid_t node)
{
return node < MAX_NUMNODES && node_online(node) && nr_cpus_node(node);
}
static inline int sn_hwperf_has_mem(cnodeid_t node)
{
return node < MAX_NUMNODES && node_online(node) && NODE_DATA(node)->node_present_pages;
}
static struct sn_hwperf_object_info *
sn_hwperf_findobj_id(struct sn_hwperf_object_info *objbuf,
int nobj, int id)
{
int i;
struct sn_hwperf_object_info *p = objbuf;
for (i=0; i < nobj; i++, p++) {
if (p->id == id)
return p;
}
return NULL;
}
static int sn_hwperf_get_nearest_node_objdata(struct sn_hwperf_object_info *objbuf,
int nobj, cnodeid_t node, cnodeid_t *near_mem_node, cnodeid_t *near_cpu_node)
{
int e;
struct sn_hwperf_object_info *nodeobj = NULL;
struct sn_hwperf_object_info *op;
struct sn_hwperf_object_info *dest;
struct sn_hwperf_object_info *router;
struct sn_hwperf_port_info ptdata[16];
int sz, i, j;
cnodeid_t c;
int found_mem = 0;
int found_cpu = 0;
if (!cnode_possible(node))
return -EINVAL;
if (sn_hwperf_has_cpus(node)) {
if (near_cpu_node)
*near_cpu_node = node;
found_cpu++;
}
if (sn_hwperf_has_mem(node)) {
if (near_mem_node)
*near_mem_node = node;
found_mem++;
}
if (found_cpu && found_mem)
return 0; /* trivially successful */
/* find the argument node object */
for (i=0, op=objbuf; i < nobj; i++, op++) {
if (!SN_HWPERF_IS_NODE(op) && !SN_HWPERF_IS_IONODE(op))
continue;
if (node == sn_hwperf_obj_to_cnode(op)) {
nodeobj = op;
break;
}
}
if (!nodeobj) {
e = -ENOENT;
goto err;
}
/* get it's interconnect topology */
sz = op->ports * sizeof(struct sn_hwperf_port_info);
BUG_ON(sz > sizeof(ptdata));
e = ia64_sn_hwperf_op(sn_hwperf_master_nasid,
SN_HWPERF_ENUM_PORTS, nodeobj->id, sz,
(u64)&ptdata, 0, 0, NULL);
if (e != SN_HWPERF_OP_OK) {
e = -EINVAL;
goto err;
}
/* find nearest node with cpus and nearest memory */
for (router=NULL, j=0; j < op->ports; j++) {
dest = sn_hwperf_findobj_id(objbuf, nobj, ptdata[j].conn_id);
if (dest && SN_HWPERF_IS_ROUTER(dest))
router = dest;
if (!dest || SN_HWPERF_FOREIGN(dest) ||
!SN_HWPERF_IS_NODE(dest) || SN_HWPERF_IS_IONODE(dest)) {
continue;
}
c = sn_hwperf_obj_to_cnode(dest);
if (!found_cpu && sn_hwperf_has_cpus(c)) {
if (near_cpu_node)
*near_cpu_node = c;
found_cpu++;
}
if (!found_mem && sn_hwperf_has_mem(c)) {
if (near_mem_node)
*near_mem_node = c;
found_mem++;
}
}
if (router && (!found_cpu || !found_mem)) {
/* search for a node connected to the same router */
sz = router->ports * sizeof(struct sn_hwperf_port_info);
BUG_ON(sz > sizeof(ptdata));
e = ia64_sn_hwperf_op(sn_hwperf_master_nasid,
SN_HWPERF_ENUM_PORTS, router->id, sz,
(u64)&ptdata, 0, 0, NULL);
if (e != SN_HWPERF_OP_OK) {
e = -EINVAL;
goto err;
}
for (j=0; j < router->ports; j++) {
dest = sn_hwperf_findobj_id(objbuf, nobj,
ptdata[j].conn_id);
if (!dest || dest->id == node ||
SN_HWPERF_FOREIGN(dest) ||
!SN_HWPERF_IS_NODE(dest) ||
SN_HWPERF_IS_IONODE(dest)) {
continue;
}
c = sn_hwperf_obj_to_cnode(dest);
if (!found_cpu && sn_hwperf_has_cpus(c)) {
if (near_cpu_node)
*near_cpu_node = c;
found_cpu++;
}
if (!found_mem && sn_hwperf_has_mem(c)) {
if (near_mem_node)
*near_mem_node = c;
found_mem++;
}
if (found_cpu && found_mem)
break;
}
}
if (!found_cpu || !found_mem) {
/* resort to _any_ node with CPUs and memory */
for (i=0, op=objbuf; i < nobj; i++, op++) {
if (SN_HWPERF_FOREIGN(op) ||
SN_HWPERF_IS_IONODE(op) ||
!SN_HWPERF_IS_NODE(op)) {
continue;
}
c = sn_hwperf_obj_to_cnode(op);
if (!found_cpu && sn_hwperf_has_cpus(c)) {
if (near_cpu_node)
*near_cpu_node = c;
found_cpu++;
}
if (!found_mem && sn_hwperf_has_mem(c)) {
if (near_mem_node)
*near_mem_node = c;
found_mem++;
}
if (found_cpu && found_mem)
break;
}
}
if (!found_cpu || !found_mem)
e = -ENODATA;
err:
return e;
}
static int sn_topology_show(struct seq_file *s, void *d)
{
int sz;
int pt;
int e = 0;
int i;
int j;
const char *slabname;
int ordinal;
char slice;
struct cpuinfo_ia64 *c;
struct sn_hwperf_port_info *ptdata;
struct sn_hwperf_object_info *p;
struct sn_hwperf_object_info *obj = d; /* this object */
struct sn_hwperf_object_info *objs = s->private; /* all objects */
u8 shubtype;
u8 system_size;
u8 sharing_size;
u8 partid;
u8 coher;
u8 nasid_shift;
u8 region_size;
u16 nasid_mask;
int nasid_msb;
if (obj == objs) {
seq_printf(s, "# sn_topology version 2\n");
seq_printf(s, "# objtype ordinal location partition"
" [attribute value [, ...]]\n");
if (ia64_sn_get_sn_info(0,
&shubtype, &nasid_mask, &nasid_shift, &system_size,
&sharing_size, &partid, &coher, ®ion_size))
BUG();
for (nasid_msb=63; nasid_msb > 0; nasid_msb--) {
if (((u64)nasid_mask << nasid_shift) & (1ULL << nasid_msb))
break;
}
seq_printf(s, "partition %u %s local "
"shubtype %s, "
"nasid_mask 0x%016llx, "
"nasid_bits %d:%d, "
"system_size %d, "
"sharing_size %d, "
"coherency_domain %d, "
"region_size %d\n",
partid, utsname()->nodename,
shubtype ? "shub2" : "shub1",
(u64)nasid_mask << nasid_shift, nasid_msb, nasid_shift,
system_size, sharing_size, coher, region_size);
print_pci_topology(s);
}
if (SN_HWPERF_FOREIGN(obj)) {
/* private in another partition: not interesting */
return 0;
}
for (i = 0; i < SN_HWPERF_MAXSTRING && obj->name[i]; i++) {
if (obj->name[i] == ' ')
obj->name[i] = '_';
}
slabname = sn_hwperf_get_slabname(obj, objs, &ordinal);
seq_printf(s, "%s %d %s %s asic %s", slabname, ordinal, obj->location,
obj->sn_hwp_this_part ? "local" : "shared", obj->name);
if (ordinal < 0 || (!SN_HWPERF_IS_NODE(obj) && !SN_HWPERF_IS_IONODE(obj)))
seq_putc(s, '\n');
else {
cnodeid_t near_mem = -1;
cnodeid_t near_cpu = -1;
seq_printf(s, ", nasid 0x%x", cnodeid_to_nasid(ordinal));
if (sn_hwperf_get_nearest_node_objdata(objs, sn_hwperf_obj_cnt,
ordinal, &near_mem, &near_cpu) == 0) {
seq_printf(s, ", near_mem_nodeid %d, near_cpu_nodeid %d",
near_mem, near_cpu);
}
if (!SN_HWPERF_IS_IONODE(obj)) {
for_each_online_node(i) {
seq_printf(s, i ? ":%d" : ", dist %d",
node_distance(ordinal, i));
}
}
seq_putc(s, '\n');
/*
* CPUs on this node, if any
*/
if (!SN_HWPERF_IS_IONODE(obj)) {
for_each_cpu_and(i, cpu_online_mask,
cpumask_of_node(ordinal)) {
slice = 'a' + cpuid_to_slice(i);
c = cpu_data(i);
seq_printf(s, "cpu %d %s%c local"
" freq %luMHz, arch ia64",
i, obj->location, slice,
c->proc_freq / 1000000);
for_each_online_cpu(j) {
seq_printf(s, j ? ":%d" : ", dist %d",
node_distance(
cpu_to_node(i),
cpu_to_node(j)));
}
seq_putc(s, '\n');
}
}
}
if (obj->ports) {
/*
* numalink ports
*/
sz = obj->ports * sizeof(struct sn_hwperf_port_info);
if ((ptdata = kmalloc(sz, GFP_KERNEL)) == NULL)
return -ENOMEM;
e = ia64_sn_hwperf_op(sn_hwperf_master_nasid,
SN_HWPERF_ENUM_PORTS, obj->id, sz,
(u64) ptdata, 0, 0, NULL);
if (e != SN_HWPERF_OP_OK)
return -EINVAL;
for (ordinal=0, p=objs; p != obj; p++) {
if (!SN_HWPERF_FOREIGN(p))
ordinal += p->ports;
}
for (pt = 0; pt < obj->ports; pt++) {
for (p = objs, i = 0; i < sn_hwperf_obj_cnt; i++, p++) {
if (ptdata[pt].conn_id == p->id) {
break;
}
}
seq_printf(s, "numalink %d %s-%d",
ordinal+pt, obj->location, ptdata[pt].port);
if (i >= sn_hwperf_obj_cnt) {
/* no connection */
seq_puts(s, " local endpoint disconnected"
", protocol unknown\n");
continue;
}
if (obj->sn_hwp_this_part && p->sn_hwp_this_part)
/* both ends local to this partition */
seq_puts(s, " local");
else if (SN_HWPERF_FOREIGN(p))
/* both ends of the link in foreign partiton */
seq_puts(s, " foreign");
else
/* link straddles a partition */
seq_puts(s, " shared");
/*
* Unlikely, but strictly should query the LLP config
* registers because an NL4R can be configured to run
* NL3 protocol, even when not talking to an NL3 router.
* Ditto for node-node.
*/
seq_printf(s, " endpoint %s-%d, protocol %s\n",
p->location, ptdata[pt].conn_port,
(SN_HWPERF_IS_NL3ROUTER(obj) ||
SN_HWPERF_IS_NL3ROUTER(p)) ? "LLP3" : "LLP4");
}
kfree(ptdata);
}
return 0;
}
static void *sn_topology_start(struct seq_file *s, loff_t * pos)
{
struct sn_hwperf_object_info *objs = s->private;
if (*pos < sn_hwperf_obj_cnt)
return (void *)(objs + *pos);
return NULL;
}
static void *sn_topology_next(struct seq_file *s, void *v, loff_t * pos)
{
++*pos;
return sn_topology_start(s, pos);
}
static void sn_topology_stop(struct seq_file *m, void *v)
{
return;
}
/*
* /proc/sgi_sn/sn_topology, read-only using seq_file
*/
static const struct seq_operations sn_topology_seq_ops = {
.start = sn_topology_start,
.next = sn_topology_next,
.stop = sn_topology_stop,
.show = sn_topology_show
};
struct sn_hwperf_op_info {
u64 op;
struct sn_hwperf_ioctl_args *a;
void *p;
int *v0;
int ret;
};
static void sn_hwperf_call_sal(void *info)
{
struct sn_hwperf_op_info *op_info = info;
int r;
r = ia64_sn_hwperf_op(sn_hwperf_master_nasid, op_info->op,
op_info->a->arg, op_info->a->sz,
(u64) op_info->p, 0, 0, op_info->v0);
op_info->ret = r;
}
static int sn_hwperf_op_cpu(struct sn_hwperf_op_info *op_info)
{
u32 cpu;
u32 use_ipi;
int r = 0;
cpumask_t save_allowed;
cpu = (op_info->a->arg & SN_HWPERF_ARG_CPU_MASK) >> 32;
use_ipi = op_info->a->arg & SN_HWPERF_ARG_USE_IPI_MASK;
op_info->a->arg &= SN_HWPERF_ARG_OBJID_MASK;
if (cpu != SN_HWPERF_ARG_ANY_CPU) {
if (cpu >= nr_cpu_ids || !cpu_online(cpu)) {
r = -EINVAL;
goto out;
}
}
if (cpu == SN_HWPERF_ARG_ANY_CPU) {
/* don't care which cpu */
sn_hwperf_call_sal(op_info);
} else if (cpu == get_cpu()) {
/* already on correct cpu */
sn_hwperf_call_sal(op_info);
put_cpu();
} else {
put_cpu();
if (use_ipi) {
/* use an interprocessor interrupt to call SAL */
smp_call_function_single(cpu, sn_hwperf_call_sal,
op_info, 1);
}
else {
/* migrate the task before calling SAL */
save_allowed = current->cpus_allowed;
set_cpus_allowed_ptr(current, cpumask_of(cpu));
sn_hwperf_call_sal(op_info);
set_cpus_allowed_ptr(current, &save_allowed);
}
}
r = op_info->ret;
out:
return r;
}
/* map SAL hwperf error code to system error code */
static int sn_hwperf_map_err(int hwperf_err)
{
int e;
switch(hwperf_err) {
case SN_HWPERF_OP_OK:
e = 0;
break;
case SN_HWPERF_OP_NOMEM:
e = -ENOMEM;
break;
case SN_HWPERF_OP_NO_PERM:
e = -EPERM;
break;
case SN_HWPERF_OP_IO_ERROR:
e = -EIO;
break;
case SN_HWPERF_OP_BUSY:
e = -EBUSY;
break;
case SN_HWPERF_OP_RECONFIGURE:
e = -EAGAIN;
break;
case SN_HWPERF_OP_INVAL:
default:
e = -EINVAL;
break;
}
return e;
}
/*
* ioctl for "sn_hwperf" misc device
*/
static long sn_hwperf_ioctl(struct file *fp, u32 op, unsigned long arg)
{
struct sn_hwperf_ioctl_args a;
struct cpuinfo_ia64 *cdata;
struct sn_hwperf_object_info *objs;
struct sn_hwperf_object_info *cpuobj;
struct sn_hwperf_op_info op_info;
void *p = NULL;
int nobj;
char slice;
int node;
int r;
int v0;
int i;
int j;
/* only user requests are allowed here */
if ((op & SN_HWPERF_OP_MASK) < 10) {
r = -EINVAL;
goto error;
}
r = copy_from_user(&a, (const void __user *)arg,
sizeof(struct sn_hwperf_ioctl_args));
if (r != 0) {
r = -EFAULT;
goto error;
}
/*
* Allocate memory to hold a kernel copy of the user buffer. The
* buffer contents are either copied in or out (or both) of user
* space depending on the flags encoded in the requested operation.
*/
if (a.ptr) {
p = vmalloc(a.sz);
if (!p) {
r = -ENOMEM;
goto error;
}
}
if (op & SN_HWPERF_OP_MEM_COPYIN) {
r = copy_from_user(p, (const void __user *)a.ptr, a.sz);
if (r != 0) {
r = -EFAULT;
goto error;
}
}
switch (op) {
case SN_HWPERF_GET_CPU_INFO:
if (a.sz == sizeof(u64)) {
/* special case to get size needed */
*(u64 *) p = (u64) num_online_cpus() *
sizeof(struct sn_hwperf_object_info);
} else
if (a.sz < num_online_cpus() * sizeof(struct sn_hwperf_object_info)) {
r = -ENOMEM;
goto error;
} else
if ((r = sn_hwperf_enum_objects(&nobj, &objs)) == 0) {
int cpuobj_index = 0;
memset(p, 0, a.sz);
for (i = 0; i < nobj; i++) {
if (!SN_HWPERF_IS_NODE(objs + i))
continue;
node = sn_hwperf_obj_to_cnode(objs + i);
for_each_online_cpu(j) {
if (node != cpu_to_node(j))
continue;
cpuobj = (struct sn_hwperf_object_info *) p + cpuobj_index++;
slice = 'a' + cpuid_to_slice(j);
cdata = cpu_data(j);
cpuobj->id = j;
snprintf(cpuobj->name,
sizeof(cpuobj->name),
"CPU %luMHz %s",
cdata->proc_freq / 1000000,
cdata->vendor);
snprintf(cpuobj->location,
sizeof(cpuobj->location),
"%s%c", objs[i].location,
slice);
}
}
vfree(objs);
}
break;
case SN_HWPERF_GET_NODE_NASID:
if (a.sz != sizeof(u64) ||
(node = a.arg) < 0 || !cnode_possible(node)) {
r = -EINVAL;
goto error;
}
*(u64 *)p = (u64)cnodeid_to_nasid(node);
break;
case SN_HWPERF_GET_OBJ_NODE:
i = a.arg;
if (a.sz != sizeof(u64) || i < 0) {
r = -EINVAL;
goto error;
}
if ((r = sn_hwperf_enum_objects(&nobj, &objs)) == 0) {
if (i >= nobj) {
r = -EINVAL;
vfree(objs);
goto error;
}
if (objs[i].id != a.arg) {
for (i = 0; i < nobj; i++) {
if (objs[i].id == a.arg)
break;
}
}
if (i == nobj) {
r = -EINVAL;
vfree(objs);
goto error;
}
if (!SN_HWPERF_IS_NODE(objs + i) &&
!SN_HWPERF_IS_IONODE(objs + i)) {
r = -ENOENT;
vfree(objs);
goto error;
}
*(u64 *)p = (u64)sn_hwperf_obj_to_cnode(objs + i);
vfree(objs);
}
break;
case SN_HWPERF_GET_MMRS:
case SN_HWPERF_SET_MMRS:
case SN_HWPERF_OBJECT_DISTANCE:
op_info.p = p;
op_info.a = &a;
op_info.v0 = &v0;
op_info.op = op;
r = sn_hwperf_op_cpu(&op_info);
if (r) {
r = sn_hwperf_map_err(r);
a.v0 = v0;
goto error;
}
break;
default:
/* all other ops are a direct SAL call */
r = ia64_sn_hwperf_op(sn_hwperf_master_nasid, op,
a.arg, a.sz, (u64) p, 0, 0, &v0);
if (r) {
r = sn_hwperf_map_err(r);
goto error;
}
a.v0 = v0;
break;
}
if (op & SN_HWPERF_OP_MEM_COPYOUT) {
r = copy_to_user((void __user *)a.ptr, p, a.sz);
if (r != 0) {
r = -EFAULT;
goto error;
}
}
error:
vfree(p);
return r;
}
static const struct file_operations sn_hwperf_fops = {
.unlocked_ioctl = sn_hwperf_ioctl,
.llseek = noop_llseek,
};
static struct miscdevice sn_hwperf_dev = {
MISC_DYNAMIC_MINOR,
"sn_hwperf",
&sn_hwperf_fops
};
static int sn_hwperf_init(void)
{
u64 v;
int salr;
int e = 0;
/* single threaded, once-only initialization */
mutex_lock(&sn_hwperf_init_mutex);
if (sn_hwperf_salheap) {
mutex_unlock(&sn_hwperf_init_mutex);
return e;
}
/*
* The PROM code needs a fixed reference node. For convenience the
* same node as the console I/O is used.
*/
sn_hwperf_master_nasid = (nasid_t) ia64_sn_get_console_nasid();
/*
* Request the needed size and install the PROM scratch area.
* The PROM keeps various tracking bits in this memory area.
*/
salr = ia64_sn_hwperf_op(sn_hwperf_master_nasid,
(u64) SN_HWPERF_GET_HEAPSIZE, 0,
(u64) sizeof(u64), (u64) &v, 0, 0, NULL);
if (salr != SN_HWPERF_OP_OK) {
e = -EINVAL;
goto out;
}
if ((sn_hwperf_salheap = vmalloc(v)) == NULL) {
e = -ENOMEM;
goto out;
}
salr = ia64_sn_hwperf_op(sn_hwperf_master_nasid,
SN_HWPERF_INSTALL_HEAP, 0, v,
(u64) sn_hwperf_salheap, 0, 0, NULL);
if (salr != SN_HWPERF_OP_OK) {
e = -EINVAL;
goto out;
}
salr = ia64_sn_hwperf_op(sn_hwperf_master_nasid,
SN_HWPERF_OBJECT_COUNT, 0,
sizeof(u64), (u64) &v, 0, 0, NULL);
if (salr != SN_HWPERF_OP_OK) {
e = -EINVAL;
goto out;
}
sn_hwperf_obj_cnt = (int)v;
out:
if (e < 0 && sn_hwperf_salheap) {
vfree(sn_hwperf_salheap);
sn_hwperf_salheap = NULL;
sn_hwperf_obj_cnt = 0;
}
mutex_unlock(&sn_hwperf_init_mutex);
return e;
}
int sn_topology_open(struct inode *inode, struct file *file)
{
int e;
struct seq_file *seq;
struct sn_hwperf_object_info *objbuf;
int nobj;
if ((e = sn_hwperf_enum_objects(&nobj, &objbuf)) == 0) {
e = seq_open(file, &sn_topology_seq_ops);
seq = file->private_data;
seq->private = objbuf;
}
return e;
}
int sn_topology_release(struct inode *inode, struct file *file)
{
struct seq_file *seq = file->private_data;
vfree(seq->private);
return seq_release(inode, file);
}
int sn_hwperf_get_nearest_node(cnodeid_t node,
cnodeid_t *near_mem_node, cnodeid_t *near_cpu_node)
{
int e;
int nobj;
struct sn_hwperf_object_info *objbuf;
if ((e = sn_hwperf_enum_objects(&nobj, &objbuf)) == 0) {
e = sn_hwperf_get_nearest_node_objdata(objbuf, nobj,
node, near_mem_node, near_cpu_node);
vfree(objbuf);
}
return e;
}
static int __devinit sn_hwperf_misc_register_init(void)
{
int e;
if (!ia64_platform_is("sn2"))
return 0;
sn_hwperf_init();
/*
* Register a dynamic misc device for hwperf ioctls. Platforms
* supporting hotplug will create /dev/sn_hwperf, else user
* can to look up the minor number in /proc/misc.
*/
if ((e = misc_register(&sn_hwperf_dev)) != 0) {
printk(KERN_ERR "sn_hwperf_misc_register_init: failed to "
"register misc device for \"%s\"\n", sn_hwperf_dev.name);
}
return e;
}
device_initcall(sn_hwperf_misc_register_init); /* after misc_init() */
EXPORT_SYMBOL(sn_hwperf_get_nearest_node);
| gpl-2.0 |
corphish/zapdos_condor | arch/arm/mach-omap2/vp.c | 4845 | 7416 | #include <linux/kernel.h>
#include <linux/init.h>
#include "common.h"
#include "voltage.h"
#include "vp.h"
#include "prm-regbits-34xx.h"
#include "prm-regbits-44xx.h"
#include "prm44xx.h"
static u32 _vp_set_init_voltage(struct voltagedomain *voltdm, u32 volt)
{
struct omap_vp_instance *vp = voltdm->vp;
u32 vpconfig;
char vsel;
vsel = voltdm->pmic->uv_to_vsel(volt);
vpconfig = voltdm->read(vp->vpconfig);
vpconfig &= ~(vp->common->vpconfig_initvoltage_mask |
vp->common->vpconfig_forceupdate |
vp->common->vpconfig_initvdd);
vpconfig |= vsel << __ffs(vp->common->vpconfig_initvoltage_mask);
voltdm->write(vpconfig, vp->vpconfig);
/* Trigger initVDD value copy to voltage processor */
voltdm->write((vpconfig | vp->common->vpconfig_initvdd),
vp->vpconfig);
/* Clear initVDD copy trigger bit */
voltdm->write(vpconfig, vp->vpconfig);
return vpconfig;
}
/* Generic voltage init functions */
void __init omap_vp_init(struct voltagedomain *voltdm)
{
struct omap_vp_instance *vp = voltdm->vp;
u32 val, sys_clk_rate, timeout, waittime;
u32 vddmin, vddmax, vstepmin, vstepmax;
if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name);
return;
}
if (!voltdm->read || !voltdm->write) {
pr_err("%s: No read/write API for accessing vdd_%s regs\n",
__func__, voltdm->name);
return;
}
vp->enabled = false;
/* Divide to avoid overflow */
sys_clk_rate = voltdm->sys_clk.rate / 1000;
timeout = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000;
vddmin = voltdm->pmic->vp_vddmin;
vddmax = voltdm->pmic->vp_vddmax;
waittime = DIV_ROUND_UP(voltdm->pmic->step_size * sys_clk_rate,
1000 * voltdm->pmic->slew_rate);
vstepmin = voltdm->pmic->vp_vstepmin;
vstepmax = voltdm->pmic->vp_vstepmax;
/*
* VP_CONFIG: error gain is not set here, it will be updated
* on each scale, based on OPP.
*/
val = (voltdm->pmic->vp_erroroffset <<
__ffs(voltdm->vp->common->vpconfig_erroroffset_mask)) |
vp->common->vpconfig_timeouten;
voltdm->write(val, vp->vpconfig);
/* VSTEPMIN */
val = (waittime << vp->common->vstepmin_smpswaittimemin_shift) |
(vstepmin << vp->common->vstepmin_stepmin_shift);
voltdm->write(val, vp->vstepmin);
/* VSTEPMAX */
val = (vstepmax << vp->common->vstepmax_stepmax_shift) |
(waittime << vp->common->vstepmax_smpswaittimemax_shift);
voltdm->write(val, vp->vstepmax);
/* VLIMITTO */
val = (vddmax << vp->common->vlimitto_vddmax_shift) |
(vddmin << vp->common->vlimitto_vddmin_shift) |
(timeout << vp->common->vlimitto_timeout_shift);
voltdm->write(val, vp->vlimitto);
}
int omap_vp_update_errorgain(struct voltagedomain *voltdm,
unsigned long target_volt)
{
struct omap_volt_data *volt_data;
if (!voltdm->vp)
return -EINVAL;
/* Get volt_data corresponding to target_volt */
volt_data = omap_voltage_get_voltdata(voltdm, target_volt);
if (IS_ERR(volt_data))
return -EINVAL;
/* Setting vp errorgain based on the voltage */
voltdm->rmw(voltdm->vp->common->vpconfig_errorgain_mask,
volt_data->vp_errgain <<
__ffs(voltdm->vp->common->vpconfig_errorgain_mask),
voltdm->vp->vpconfig);
return 0;
}
/* VP force update method of voltage scaling */
int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
unsigned long target_volt)
{
struct omap_vp_instance *vp = voltdm->vp;
u32 vpconfig;
u8 target_vsel, current_vsel;
int ret, timeout = 0;
ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel);
if (ret)
return ret;
/*
* Clear all pending TransactionDone interrupt/status. Typical latency
* is <3us
*/
while (timeout++ < VP_TRANXDONE_TIMEOUT) {
vp->common->ops->clear_txdone(vp->id);
if (!vp->common->ops->check_txdone(vp->id))
break;
udelay(1);
}
if (timeout >= VP_TRANXDONE_TIMEOUT) {
pr_warning("%s: vdd_%s TRANXDONE timeout exceeded."
"Voltage change aborted", __func__, voltdm->name);
return -ETIMEDOUT;
}
vpconfig = _vp_set_init_voltage(voltdm, target_volt);
/* Force update of voltage */
voltdm->write(vpconfig | vp->common->vpconfig_forceupdate,
voltdm->vp->vpconfig);
/*
* Wait for TransactionDone. Typical latency is <200us.
* Depends on SMPSWAITTIMEMIN/MAX and voltage change
*/
timeout = 0;
omap_test_timeout(vp->common->ops->check_txdone(vp->id),
VP_TRANXDONE_TIMEOUT, timeout);
if (timeout >= VP_TRANXDONE_TIMEOUT)
pr_err("%s: vdd_%s TRANXDONE timeout exceeded."
"TRANXDONE never got set after the voltage update\n",
__func__, voltdm->name);
omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
/*
* Disable TransactionDone interrupt , clear all status, clear
* control registers
*/
timeout = 0;
while (timeout++ < VP_TRANXDONE_TIMEOUT) {
vp->common->ops->clear_txdone(vp->id);
if (!vp->common->ops->check_txdone(vp->id))
break;
udelay(1);
}
if (timeout >= VP_TRANXDONE_TIMEOUT)
pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying"
"to clear the TRANXDONE status\n",
__func__, voltdm->name);
/* Clear force bit */
voltdm->write(vpconfig, vp->vpconfig);
return 0;
}
/**
* omap_vp_enable() - API to enable a particular VP
* @voltdm: pointer to the VDD whose VP is to be enabled.
*
* This API enables a particular voltage processor. Needed by the smartreflex
* class drivers.
*/
void omap_vp_enable(struct voltagedomain *voltdm)
{
struct omap_vp_instance *vp;
u32 vpconfig, volt;
if (!voltdm || IS_ERR(voltdm)) {
pr_warning("%s: VDD specified does not exist!\n", __func__);
return;
}
vp = voltdm->vp;
if (!voltdm->read || !voltdm->write) {
pr_err("%s: No read/write API for accessing vdd_%s regs\n",
__func__, voltdm->name);
return;
}
/* If VP is already enabled, do nothing. Return */
if (vp->enabled)
return;
volt = voltdm_get_voltage(voltdm);
if (!volt) {
pr_warning("%s: unable to find current voltage for %s\n",
__func__, voltdm->name);
return;
}
vpconfig = _vp_set_init_voltage(voltdm, volt);
/* Enable VP */
vpconfig |= vp->common->vpconfig_vpenable;
voltdm->write(vpconfig, vp->vpconfig);
vp->enabled = true;
}
/**
* omap_vp_disable() - API to disable a particular VP
* @voltdm: pointer to the VDD whose VP is to be disabled.
*
* This API disables a particular voltage processor. Needed by the smartreflex
* class drivers.
*/
void omap_vp_disable(struct voltagedomain *voltdm)
{
struct omap_vp_instance *vp;
u32 vpconfig;
int timeout;
if (!voltdm || IS_ERR(voltdm)) {
pr_warning("%s: VDD specified does not exist!\n", __func__);
return;
}
vp = voltdm->vp;
if (!voltdm->read || !voltdm->write) {
pr_err("%s: No read/write API for accessing vdd_%s regs\n",
__func__, voltdm->name);
return;
}
/* If VP is already disabled, do nothing. Return */
if (!vp->enabled) {
pr_warning("%s: Trying to disable VP for vdd_%s when"
"it is already disabled\n", __func__, voltdm->name);
return;
}
/* Disable VP */
vpconfig = voltdm->read(vp->vpconfig);
vpconfig &= ~vp->common->vpconfig_vpenable;
voltdm->write(vpconfig, vp->vpconfig);
/*
* Wait for VP idle Typical latency is <2us. Maximum latency is ~100us
*/
omap_test_timeout((voltdm->read(vp->vstatus)),
VP_IDLE_TIMEOUT, timeout);
if (timeout >= VP_IDLE_TIMEOUT)
pr_warning("%s: vdd_%s idle timedout\n",
__func__, voltdm->name);
vp->enabled = false;
return;
}
| gpl-2.0 |
kamma-cz/Oppo-Find5-Kernel-Source | crypto/proc.c | 7405 | 3786 | /*
* Scatterlist Cryptographic API.
*
* Procfs information.
*
* Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
* Copyright (c) 2005 Herbert Xu <herbert@gondor.apana.org.au>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 2 of the License, or (at your option)
* any later version.
*
*/
#include <linux/atomic.h>
#include <linux/init.h>
#include <linux/crypto.h>
#include <linux/module.h> /* for module_name() */
#include <linux/rwsem.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/sysctl.h>
#include "internal.h"
#ifdef CONFIG_CRYPTO_FIPS
static struct ctl_table crypto_sysctl_table[] = {
{
.procname = "fips_enabled",
.data = &fips_enabled,
.maxlen = sizeof(int),
.mode = 0444,
.proc_handler = proc_dointvec
},
{}
};
static struct ctl_table crypto_dir_table[] = {
{
.procname = "crypto",
.mode = 0555,
.child = crypto_sysctl_table
},
{}
};
static struct ctl_table_header *crypto_sysctls;
static void crypto_proc_fips_init(void)
{
crypto_sysctls = register_sysctl_table(crypto_dir_table);
}
static void crypto_proc_fips_exit(void)
{
if (crypto_sysctls)
unregister_sysctl_table(crypto_sysctls);
}
#else
#define crypto_proc_fips_init()
#define crypto_proc_fips_exit()
#endif
static void *c_start(struct seq_file *m, loff_t *pos)
{
down_read(&crypto_alg_sem);
return seq_list_start(&crypto_alg_list, *pos);
}
static void *c_next(struct seq_file *m, void *p, loff_t *pos)
{
return seq_list_next(p, &crypto_alg_list, pos);
}
static void c_stop(struct seq_file *m, void *p)
{
up_read(&crypto_alg_sem);
}
static int c_show(struct seq_file *m, void *p)
{
struct crypto_alg *alg = list_entry(p, struct crypto_alg, cra_list);
seq_printf(m, "name : %s\n", alg->cra_name);
seq_printf(m, "driver : %s\n", alg->cra_driver_name);
seq_printf(m, "module : %s\n", module_name(alg->cra_module));
seq_printf(m, "priority : %d\n", alg->cra_priority);
seq_printf(m, "refcnt : %d\n", atomic_read(&alg->cra_refcnt));
seq_printf(m, "selftest : %s\n",
(alg->cra_flags & CRYPTO_ALG_TESTED) ?
"passed" : "unknown");
if (alg->cra_flags & CRYPTO_ALG_LARVAL) {
seq_printf(m, "type : larval\n");
seq_printf(m, "flags : 0x%x\n", alg->cra_flags);
goto out;
}
if (alg->cra_type && alg->cra_type->show) {
alg->cra_type->show(m, alg);
goto out;
}
switch (alg->cra_flags & (CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_LARVAL)) {
case CRYPTO_ALG_TYPE_CIPHER:
seq_printf(m, "type : cipher\n");
seq_printf(m, "blocksize : %u\n", alg->cra_blocksize);
seq_printf(m, "min keysize : %u\n",
alg->cra_cipher.cia_min_keysize);
seq_printf(m, "max keysize : %u\n",
alg->cra_cipher.cia_max_keysize);
break;
case CRYPTO_ALG_TYPE_COMPRESS:
seq_printf(m, "type : compression\n");
break;
default:
seq_printf(m, "type : unknown\n");
break;
}
out:
seq_putc(m, '\n');
return 0;
}
static const struct seq_operations crypto_seq_ops = {
.start = c_start,
.next = c_next,
.stop = c_stop,
.show = c_show
};
static int crypto_info_open(struct inode *inode, struct file *file)
{
return seq_open(file, &crypto_seq_ops);
}
static const struct file_operations proc_crypto_ops = {
.open = crypto_info_open,
.read = seq_read,
.llseek = seq_lseek,
.release = seq_release
};
void __init crypto_init_proc(void)
{
proc_create("crypto", 0, NULL, &proc_crypto_ops);
crypto_proc_fips_init();
}
void __exit crypto_exit_proc(void)
{
crypto_proc_fips_exit();
remove_proc_entry("crypto", NULL);
}
| gpl-2.0 |
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