repo_name string | path string | copies string | size string | content string | license string |
|---|---|---|---|---|---|
jfdsmabalot/kernel_sony_msm8974 | drivers/net/ethernet/sfc/falcon_boards.c | 4946 | 21951 | /****************************************************************************
* Driver for Solarflare Solarstorm network controllers and boards
* Copyright 2007-2010 Solarflare Communications Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation, incorporated herein by reference.
*/
#include <linux/rtnetlink.h>
#include "net_driver.h"
#include "phy.h"
#include "efx.h"
#include "nic.h"
#include "workarounds.h"
/* Macros for unpacking the board revision */
/* The revision info is in host byte order. */
#define FALCON_BOARD_TYPE(_rev) (_rev >> 8)
#define FALCON_BOARD_MAJOR(_rev) ((_rev >> 4) & 0xf)
#define FALCON_BOARD_MINOR(_rev) (_rev & 0xf)
/* Board types */
#define FALCON_BOARD_SFE4001 0x01
#define FALCON_BOARD_SFE4002 0x02
#define FALCON_BOARD_SFE4003 0x03
#define FALCON_BOARD_SFN4112F 0x52
/* Board temperature is about 15°C above ambient when air flow is
* limited. The maximum acceptable ambient temperature varies
* depending on the PHY specifications but the critical temperature
* above which we should shut down to avoid damage is 80°C. */
#define FALCON_BOARD_TEMP_BIAS 15
#define FALCON_BOARD_TEMP_CRIT (80 + FALCON_BOARD_TEMP_BIAS)
/* SFC4000 datasheet says: 'The maximum permitted junction temperature
* is 125°C; the thermal design of the environment for the SFC4000
* should aim to keep this well below 100°C.' */
#define FALCON_JUNC_TEMP_MIN 0
#define FALCON_JUNC_TEMP_MAX 90
#define FALCON_JUNC_TEMP_CRIT 125
/*****************************************************************************
* Support for LM87 sensor chip used on several boards
*/
#define LM87_REG_TEMP_HW_INT_LOCK 0x13
#define LM87_REG_TEMP_HW_EXT_LOCK 0x14
#define LM87_REG_TEMP_HW_INT 0x17
#define LM87_REG_TEMP_HW_EXT 0x18
#define LM87_REG_TEMP_EXT1 0x26
#define LM87_REG_TEMP_INT 0x27
#define LM87_REG_ALARMS1 0x41
#define LM87_REG_ALARMS2 0x42
#define LM87_IN_LIMITS(nr, _min, _max) \
0x2B + (nr) * 2, _max, 0x2C + (nr) * 2, _min
#define LM87_AIN_LIMITS(nr, _min, _max) \
0x3B + (nr), _max, 0x1A + (nr), _min
#define LM87_TEMP_INT_LIMITS(_min, _max) \
0x39, _max, 0x3A, _min
#define LM87_TEMP_EXT1_LIMITS(_min, _max) \
0x37, _max, 0x38, _min
#define LM87_ALARM_TEMP_INT 0x10
#define LM87_ALARM_TEMP_EXT1 0x20
#if defined(CONFIG_SENSORS_LM87) || defined(CONFIG_SENSORS_LM87_MODULE)
static int efx_poke_lm87(struct i2c_client *client, const u8 *reg_values)
{
while (*reg_values) {
u8 reg = *reg_values++;
u8 value = *reg_values++;
int rc = i2c_smbus_write_byte_data(client, reg, value);
if (rc)
return rc;
}
return 0;
}
static const u8 falcon_lm87_common_regs[] = {
LM87_REG_TEMP_HW_INT_LOCK, FALCON_BOARD_TEMP_CRIT,
LM87_REG_TEMP_HW_INT, FALCON_BOARD_TEMP_CRIT,
LM87_TEMP_EXT1_LIMITS(FALCON_JUNC_TEMP_MIN, FALCON_JUNC_TEMP_MAX),
LM87_REG_TEMP_HW_EXT_LOCK, FALCON_JUNC_TEMP_CRIT,
LM87_REG_TEMP_HW_EXT, FALCON_JUNC_TEMP_CRIT,
0
};
static int efx_init_lm87(struct efx_nic *efx, const struct i2c_board_info *info,
const u8 *reg_values)
{
struct falcon_board *board = falcon_board(efx);
struct i2c_client *client = i2c_new_device(&board->i2c_adap, info);
int rc;
if (!client)
return -EIO;
/* Read-to-clear alarm/interrupt status */
i2c_smbus_read_byte_data(client, LM87_REG_ALARMS1);
i2c_smbus_read_byte_data(client, LM87_REG_ALARMS2);
rc = efx_poke_lm87(client, reg_values);
if (rc)
goto err;
rc = efx_poke_lm87(client, falcon_lm87_common_regs);
if (rc)
goto err;
board->hwmon_client = client;
return 0;
err:
i2c_unregister_device(client);
return rc;
}
static void efx_fini_lm87(struct efx_nic *efx)
{
i2c_unregister_device(falcon_board(efx)->hwmon_client);
}
static int efx_check_lm87(struct efx_nic *efx, unsigned mask)
{
struct i2c_client *client = falcon_board(efx)->hwmon_client;
bool temp_crit, elec_fault, is_failure;
u16 alarms;
s32 reg;
/* If link is up then do not monitor temperature */
if (EFX_WORKAROUND_7884(efx) && efx->link_state.up)
return 0;
reg = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS1);
if (reg < 0)
return reg;
alarms = reg;
reg = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS2);
if (reg < 0)
return reg;
alarms |= reg << 8;
alarms &= mask;
temp_crit = false;
if (alarms & LM87_ALARM_TEMP_INT) {
reg = i2c_smbus_read_byte_data(client, LM87_REG_TEMP_INT);
if (reg < 0)
return reg;
if (reg > FALCON_BOARD_TEMP_CRIT)
temp_crit = true;
}
if (alarms & LM87_ALARM_TEMP_EXT1) {
reg = i2c_smbus_read_byte_data(client, LM87_REG_TEMP_EXT1);
if (reg < 0)
return reg;
if (reg > FALCON_JUNC_TEMP_CRIT)
temp_crit = true;
}
elec_fault = alarms & ~(LM87_ALARM_TEMP_INT | LM87_ALARM_TEMP_EXT1);
is_failure = temp_crit || elec_fault;
if (alarms)
netif_err(efx, hw, efx->net_dev,
"LM87 detected a hardware %s (status %02x:%02x)"
"%s%s%s%s\n",
is_failure ? "failure" : "problem",
alarms & 0xff, alarms >> 8,
(alarms & LM87_ALARM_TEMP_INT) ?
"; board is overheating" : "",
(alarms & LM87_ALARM_TEMP_EXT1) ?
"; controller is overheating" : "",
temp_crit ? "; reached critical temperature" : "",
elec_fault ? "; electrical fault" : "");
return is_failure ? -ERANGE : 0;
}
#else /* !CONFIG_SENSORS_LM87 */
static inline int
efx_init_lm87(struct efx_nic *efx, const struct i2c_board_info *info,
const u8 *reg_values)
{
return 0;
}
static inline void efx_fini_lm87(struct efx_nic *efx)
{
}
static inline int efx_check_lm87(struct efx_nic *efx, unsigned mask)
{
return 0;
}
#endif /* CONFIG_SENSORS_LM87 */
/*****************************************************************************
* Support for the SFE4001 NIC.
*
* The SFE4001 does not power-up fully at reset due to its high power
* consumption. We control its power via a PCA9539 I/O expander.
* It also has a MAX6647 temperature monitor which we expose to
* the lm90 driver.
*
* This also provides minimal support for reflashing the PHY, which is
* initiated by resetting it with the FLASH_CFG_1 pin pulled down.
* On SFE4001 rev A2 and later this is connected to the 3V3X output of
* the IO-expander.
* We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
* exclusive with the network device being open.
*/
/**************************************************************************
* Support for I2C IO Expander device on SFE4001
*/
#define PCA9539 0x74
#define P0_IN 0x00
#define P0_OUT 0x02
#define P0_INVERT 0x04
#define P0_CONFIG 0x06
#define P0_EN_1V0X_LBN 0
#define P0_EN_1V0X_WIDTH 1
#define P0_EN_1V2_LBN 1
#define P0_EN_1V2_WIDTH 1
#define P0_EN_2V5_LBN 2
#define P0_EN_2V5_WIDTH 1
#define P0_EN_3V3X_LBN 3
#define P0_EN_3V3X_WIDTH 1
#define P0_EN_5V_LBN 4
#define P0_EN_5V_WIDTH 1
#define P0_SHORTEN_JTAG_LBN 5
#define P0_SHORTEN_JTAG_WIDTH 1
#define P0_X_TRST_LBN 6
#define P0_X_TRST_WIDTH 1
#define P0_DSP_RESET_LBN 7
#define P0_DSP_RESET_WIDTH 1
#define P1_IN 0x01
#define P1_OUT 0x03
#define P1_INVERT 0x05
#define P1_CONFIG 0x07
#define P1_AFE_PWD_LBN 0
#define P1_AFE_PWD_WIDTH 1
#define P1_DSP_PWD25_LBN 1
#define P1_DSP_PWD25_WIDTH 1
#define P1_RESERVED_LBN 2
#define P1_RESERVED_WIDTH 2
#define P1_SPARE_LBN 4
#define P1_SPARE_WIDTH 4
/* Temperature Sensor */
#define MAX664X_REG_RSL 0x02
#define MAX664X_REG_WLHO 0x0B
static void sfe4001_poweroff(struct efx_nic *efx)
{
struct i2c_client *ioexp_client = falcon_board(efx)->ioexp_client;
struct i2c_client *hwmon_client = falcon_board(efx)->hwmon_client;
/* Turn off all power rails and disable outputs */
i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
/* Clear any over-temperature alert */
i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
}
static int sfe4001_poweron(struct efx_nic *efx)
{
struct i2c_client *ioexp_client = falcon_board(efx)->ioexp_client;
struct i2c_client *hwmon_client = falcon_board(efx)->hwmon_client;
unsigned int i, j;
int rc;
u8 out;
/* Clear any previous over-temperature alert */
rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
if (rc < 0)
return rc;
/* Enable port 0 and port 1 outputs on IO expander */
rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
if (rc)
return rc;
rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
0xff & ~(1 << P1_SPARE_LBN));
if (rc)
goto fail_on;
/* If PHY power is on, turn it all off and wait 1 second to
* ensure a full reset.
*/
rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
if (rc < 0)
goto fail_on;
out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
(0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
(0 << P0_EN_1V0X_LBN));
if (rc != out) {
netif_info(efx, hw, efx->net_dev, "power-cycling PHY\n");
rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
if (rc)
goto fail_on;
schedule_timeout_uninterruptible(HZ);
}
for (i = 0; i < 20; ++i) {
/* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
(1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
(1 << P0_X_TRST_LBN));
if (efx->phy_mode & PHY_MODE_SPECIAL)
out |= 1 << P0_EN_3V3X_LBN;
rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
if (rc)
goto fail_on;
msleep(10);
/* Turn on 1V power rail */
out &= ~(1 << P0_EN_1V0X_LBN);
rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
if (rc)
goto fail_on;
netif_info(efx, hw, efx->net_dev,
"waiting for DSP boot (attempt %d)...\n", i);
/* In flash config mode, DSP does not turn on AFE, so
* just wait 1 second.
*/
if (efx->phy_mode & PHY_MODE_SPECIAL) {
schedule_timeout_uninterruptible(HZ);
return 0;
}
for (j = 0; j < 10; ++j) {
msleep(100);
/* Check DSP has asserted AFE power line */
rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
if (rc < 0)
goto fail_on;
if (rc & (1 << P1_AFE_PWD_LBN))
return 0;
}
}
netif_info(efx, hw, efx->net_dev, "timed out waiting for DSP boot\n");
rc = -ETIMEDOUT;
fail_on:
sfe4001_poweroff(efx);
return rc;
}
static ssize_t show_phy_flash_cfg(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
}
static ssize_t set_phy_flash_cfg(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
enum efx_phy_mode old_mode, new_mode;
int err;
rtnl_lock();
old_mode = efx->phy_mode;
if (count == 0 || *buf == '0')
new_mode = old_mode & ~PHY_MODE_SPECIAL;
else
new_mode = PHY_MODE_SPECIAL;
if (!((old_mode ^ new_mode) & PHY_MODE_SPECIAL)) {
err = 0;
} else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
err = -EBUSY;
} else {
/* Reset the PHY, reconfigure the MAC and enable/disable
* MAC stats accordingly. */
efx->phy_mode = new_mode;
if (new_mode & PHY_MODE_SPECIAL)
falcon_stop_nic_stats(efx);
err = sfe4001_poweron(efx);
if (!err)
err = efx_reconfigure_port(efx);
if (!(new_mode & PHY_MODE_SPECIAL))
falcon_start_nic_stats(efx);
}
rtnl_unlock();
return err ? err : count;
}
static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg);
static void sfe4001_fini(struct efx_nic *efx)
{
struct falcon_board *board = falcon_board(efx);
netif_info(efx, drv, efx->net_dev, "%s\n", __func__);
device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
sfe4001_poweroff(efx);
i2c_unregister_device(board->ioexp_client);
i2c_unregister_device(board->hwmon_client);
}
static int sfe4001_check_hw(struct efx_nic *efx)
{
struct falcon_nic_data *nic_data = efx->nic_data;
s32 status;
/* If XAUI link is up then do not monitor */
if (EFX_WORKAROUND_7884(efx) && !nic_data->xmac_poll_required)
return 0;
/* Check the powered status of the PHY. Lack of power implies that
* the MAX6647 has shut down power to it, probably due to a temp.
* alarm. Reading the power status rather than the MAX6647 status
* directly because the later is read-to-clear and would thus
* start to power up the PHY again when polled, causing us to blip
* the power undesirably.
* We know we can read from the IO expander because we did
* it during power-on. Assume failure now is bad news. */
status = i2c_smbus_read_byte_data(falcon_board(efx)->ioexp_client, P1_IN);
if (status >= 0 &&
(status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
return 0;
/* Use board power control, not PHY power control */
sfe4001_poweroff(efx);
efx->phy_mode = PHY_MODE_OFF;
return (status < 0) ? -EIO : -ERANGE;
}
static const struct i2c_board_info sfe4001_hwmon_info = {
I2C_BOARD_INFO("max6647", 0x4e),
};
/* This board uses an I2C expander to provider power to the PHY, which needs to
* be turned on before the PHY can be used.
* Context: Process context, rtnl lock held
*/
static int sfe4001_init(struct efx_nic *efx)
{
struct falcon_board *board = falcon_board(efx);
int rc;
#if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
board->hwmon_client =
i2c_new_device(&board->i2c_adap, &sfe4001_hwmon_info);
#else
board->hwmon_client =
i2c_new_dummy(&board->i2c_adap, sfe4001_hwmon_info.addr);
#endif
if (!board->hwmon_client)
return -EIO;
/* Raise board/PHY high limit from 85 to 90 degrees Celsius */
rc = i2c_smbus_write_byte_data(board->hwmon_client,
MAX664X_REG_WLHO, 90);
if (rc)
goto fail_hwmon;
board->ioexp_client = i2c_new_dummy(&board->i2c_adap, PCA9539);
if (!board->ioexp_client) {
rc = -EIO;
goto fail_hwmon;
}
if (efx->phy_mode & PHY_MODE_SPECIAL) {
/* PHY won't generate a 156.25 MHz clock and MAC stats fetch
* will fail. */
falcon_stop_nic_stats(efx);
}
rc = sfe4001_poweron(efx);
if (rc)
goto fail_ioexp;
rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
if (rc)
goto fail_on;
netif_info(efx, hw, efx->net_dev, "PHY is powered on\n");
return 0;
fail_on:
sfe4001_poweroff(efx);
fail_ioexp:
i2c_unregister_device(board->ioexp_client);
fail_hwmon:
i2c_unregister_device(board->hwmon_client);
return rc;
}
/*****************************************************************************
* Support for the SFE4002
*
*/
static u8 sfe4002_lm87_channel = 0x03; /* use AIN not FAN inputs */
static const u8 sfe4002_lm87_regs[] = {
LM87_IN_LIMITS(0, 0x7c, 0x99), /* 2.5V: 1.8V +/- 10% */
LM87_IN_LIMITS(1, 0x4c, 0x5e), /* Vccp1: 1.2V +/- 10% */
LM87_IN_LIMITS(2, 0xac, 0xd4), /* 3.3V: 3.3V +/- 10% */
LM87_IN_LIMITS(3, 0xac, 0xd4), /* 5V: 5.0V +/- 10% */
LM87_IN_LIMITS(4, 0xac, 0xe0), /* 12V: 10.8-14V */
LM87_IN_LIMITS(5, 0x3f, 0x4f), /* Vccp2: 1.0V +/- 10% */
LM87_AIN_LIMITS(0, 0x98, 0xbb), /* AIN1: 1.66V +/- 10% */
LM87_AIN_LIMITS(1, 0x8a, 0xa9), /* AIN2: 1.5V +/- 10% */
LM87_TEMP_INT_LIMITS(0, 80 + FALCON_BOARD_TEMP_BIAS),
LM87_TEMP_EXT1_LIMITS(0, FALCON_JUNC_TEMP_MAX),
0
};
static const struct i2c_board_info sfe4002_hwmon_info = {
I2C_BOARD_INFO("lm87", 0x2e),
.platform_data = &sfe4002_lm87_channel,
};
/****************************************************************************/
/* LED allocations. Note that on rev A0 boards the schematic and the reality
* differ: red and green are swapped. Below is the fixed (A1) layout (there
* are only 3 A0 boards in existence, so no real reason to make this
* conditional).
*/
#define SFE4002_FAULT_LED (2) /* Red */
#define SFE4002_RX_LED (0) /* Green */
#define SFE4002_TX_LED (1) /* Amber */
static void sfe4002_init_phy(struct efx_nic *efx)
{
/* Set the TX and RX LEDs to reflect status and activity, and the
* fault LED off */
falcon_qt202x_set_led(efx, SFE4002_TX_LED,
QUAKE_LED_TXLINK | QUAKE_LED_LINK_ACTSTAT);
falcon_qt202x_set_led(efx, SFE4002_RX_LED,
QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACTSTAT);
falcon_qt202x_set_led(efx, SFE4002_FAULT_LED, QUAKE_LED_OFF);
}
static void sfe4002_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
{
falcon_qt202x_set_led(
efx, SFE4002_FAULT_LED,
(mode == EFX_LED_ON) ? QUAKE_LED_ON : QUAKE_LED_OFF);
}
static int sfe4002_check_hw(struct efx_nic *efx)
{
struct falcon_board *board = falcon_board(efx);
/* A0 board rev. 4002s report a temperature fault the whole time
* (bad sensor) so we mask it out. */
unsigned alarm_mask =
(board->major == 0 && board->minor == 0) ?
~LM87_ALARM_TEMP_EXT1 : ~0;
return efx_check_lm87(efx, alarm_mask);
}
static int sfe4002_init(struct efx_nic *efx)
{
return efx_init_lm87(efx, &sfe4002_hwmon_info, sfe4002_lm87_regs);
}
/*****************************************************************************
* Support for the SFN4112F
*
*/
static u8 sfn4112f_lm87_channel = 0x03; /* use AIN not FAN inputs */
static const u8 sfn4112f_lm87_regs[] = {
LM87_IN_LIMITS(0, 0x7c, 0x99), /* 2.5V: 1.8V +/- 10% */
LM87_IN_LIMITS(1, 0x4c, 0x5e), /* Vccp1: 1.2V +/- 10% */
LM87_IN_LIMITS(2, 0xac, 0xd4), /* 3.3V: 3.3V +/- 10% */
LM87_IN_LIMITS(4, 0xac, 0xe0), /* 12V: 10.8-14V */
LM87_IN_LIMITS(5, 0x3f, 0x4f), /* Vccp2: 1.0V +/- 10% */
LM87_AIN_LIMITS(1, 0x8a, 0xa9), /* AIN2: 1.5V +/- 10% */
LM87_TEMP_INT_LIMITS(0, 60 + FALCON_BOARD_TEMP_BIAS),
LM87_TEMP_EXT1_LIMITS(0, FALCON_JUNC_TEMP_MAX),
0
};
static const struct i2c_board_info sfn4112f_hwmon_info = {
I2C_BOARD_INFO("lm87", 0x2e),
.platform_data = &sfn4112f_lm87_channel,
};
#define SFN4112F_ACT_LED 0
#define SFN4112F_LINK_LED 1
static void sfn4112f_init_phy(struct efx_nic *efx)
{
falcon_qt202x_set_led(efx, SFN4112F_ACT_LED,
QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACT);
falcon_qt202x_set_led(efx, SFN4112F_LINK_LED,
QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT);
}
static void sfn4112f_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
{
int reg;
switch (mode) {
case EFX_LED_OFF:
reg = QUAKE_LED_OFF;
break;
case EFX_LED_ON:
reg = QUAKE_LED_ON;
break;
default:
reg = QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT;
break;
}
falcon_qt202x_set_led(efx, SFN4112F_LINK_LED, reg);
}
static int sfn4112f_check_hw(struct efx_nic *efx)
{
/* Mask out unused sensors */
return efx_check_lm87(efx, ~0x48);
}
static int sfn4112f_init(struct efx_nic *efx)
{
return efx_init_lm87(efx, &sfn4112f_hwmon_info, sfn4112f_lm87_regs);
}
/*****************************************************************************
* Support for the SFE4003
*
*/
static u8 sfe4003_lm87_channel = 0x03; /* use AIN not FAN inputs */
static const u8 sfe4003_lm87_regs[] = {
LM87_IN_LIMITS(0, 0x67, 0x7f), /* 2.5V: 1.5V +/- 10% */
LM87_IN_LIMITS(1, 0x4c, 0x5e), /* Vccp1: 1.2V +/- 10% */
LM87_IN_LIMITS(2, 0xac, 0xd4), /* 3.3V: 3.3V +/- 10% */
LM87_IN_LIMITS(4, 0xac, 0xe0), /* 12V: 10.8-14V */
LM87_IN_LIMITS(5, 0x3f, 0x4f), /* Vccp2: 1.0V +/- 10% */
LM87_TEMP_INT_LIMITS(0, 70 + FALCON_BOARD_TEMP_BIAS),
0
};
static const struct i2c_board_info sfe4003_hwmon_info = {
I2C_BOARD_INFO("lm87", 0x2e),
.platform_data = &sfe4003_lm87_channel,
};
/* Board-specific LED info. */
#define SFE4003_RED_LED_GPIO 11
#define SFE4003_LED_ON 1
#define SFE4003_LED_OFF 0
static void sfe4003_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
{
struct falcon_board *board = falcon_board(efx);
/* The LEDs were not wired to GPIOs before A3 */
if (board->minor < 3 && board->major == 0)
return;
falcon_txc_set_gpio_val(
efx, SFE4003_RED_LED_GPIO,
(mode == EFX_LED_ON) ? SFE4003_LED_ON : SFE4003_LED_OFF);
}
static void sfe4003_init_phy(struct efx_nic *efx)
{
struct falcon_board *board = falcon_board(efx);
/* The LEDs were not wired to GPIOs before A3 */
if (board->minor < 3 && board->major == 0)
return;
falcon_txc_set_gpio_dir(efx, SFE4003_RED_LED_GPIO, TXC_GPIO_DIR_OUTPUT);
falcon_txc_set_gpio_val(efx, SFE4003_RED_LED_GPIO, SFE4003_LED_OFF);
}
static int sfe4003_check_hw(struct efx_nic *efx)
{
struct falcon_board *board = falcon_board(efx);
/* A0/A1/A2 board rev. 4003s report a temperature fault the whole time
* (bad sensor) so we mask it out. */
unsigned alarm_mask =
(board->major == 0 && board->minor <= 2) ?
~LM87_ALARM_TEMP_EXT1 : ~0;
return efx_check_lm87(efx, alarm_mask);
}
static int sfe4003_init(struct efx_nic *efx)
{
return efx_init_lm87(efx, &sfe4003_hwmon_info, sfe4003_lm87_regs);
}
static const struct falcon_board_type board_types[] = {
{
.id = FALCON_BOARD_SFE4001,
.init = sfe4001_init,
.init_phy = efx_port_dummy_op_void,
.fini = sfe4001_fini,
.set_id_led = tenxpress_set_id_led,
.monitor = sfe4001_check_hw,
},
{
.id = FALCON_BOARD_SFE4002,
.init = sfe4002_init,
.init_phy = sfe4002_init_phy,
.fini = efx_fini_lm87,
.set_id_led = sfe4002_set_id_led,
.monitor = sfe4002_check_hw,
},
{
.id = FALCON_BOARD_SFE4003,
.init = sfe4003_init,
.init_phy = sfe4003_init_phy,
.fini = efx_fini_lm87,
.set_id_led = sfe4003_set_id_led,
.monitor = sfe4003_check_hw,
},
{
.id = FALCON_BOARD_SFN4112F,
.init = sfn4112f_init,
.init_phy = sfn4112f_init_phy,
.fini = efx_fini_lm87,
.set_id_led = sfn4112f_set_id_led,
.monitor = sfn4112f_check_hw,
},
};
int falcon_probe_board(struct efx_nic *efx, u16 revision_info)
{
struct falcon_board *board = falcon_board(efx);
u8 type_id = FALCON_BOARD_TYPE(revision_info);
int i;
board->major = FALCON_BOARD_MAJOR(revision_info);
board->minor = FALCON_BOARD_MINOR(revision_info);
for (i = 0; i < ARRAY_SIZE(board_types); i++)
if (board_types[i].id == type_id)
board->type = &board_types[i];
if (board->type) {
return 0;
} else {
netif_err(efx, probe, efx->net_dev, "unknown board type %d\n",
type_id);
return -ENODEV;
}
}
| gpl-2.0 |
MassStash/htc_m8_kernel_GPE_5.0.1 | sound/soc/pxa/mioa701_wm9713.c | 4946 | 7212 | /*
* Handles the Mitac mioa701 SoC system
*
* Copyright (C) 2008 Robert Jarzmik
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation in version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* This is a little schema of the sound interconnections :
*
* Sagem X200 Wolfson WM9713
* +--------+ +-------------------+ Rear Speaker
* | | | | /-+
* | +--->----->---+MONOIN SPKL+--->----+-+ |
* | GSM | | | | | |
* | +--->----->---+PCBEEP SPKR+--->----+-+ |
* | CHIP | | | \-+
* | +---<-----<---+MONO |
* | | | | Front Speaker
* +--------+ | | /-+
* | HPL+--->----+-+ |
* | | | | |
* | OUT3+--->----+-+ |
* | | \-+
* | |
* | | Front Micro
* | | +
* | MIC1+-----<--+o+
* | | +
* +-------------------+ ---
*/
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/platform_device.h>
#include <asm/mach-types.h>
#include <mach/audio.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/soc.h>
#include <sound/initval.h>
#include <sound/ac97_codec.h>
#include "pxa2xx-ac97.h"
#include "../codecs/wm9713.h"
#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
#define AC97_GPIO_PULL 0x58
/* Use GPIO8 for rear speaker amplifier */
static int rear_amp_power(struct snd_soc_codec *codec, int power)
{
unsigned short reg;
if (power) {
reg = snd_soc_read(codec, AC97_GPIO_CFG);
snd_soc_write(codec, AC97_GPIO_CFG, reg | 0x0100);
reg = snd_soc_read(codec, AC97_GPIO_PULL);
snd_soc_write(codec, AC97_GPIO_PULL, reg | (1<<15));
} else {
reg = snd_soc_read(codec, AC97_GPIO_CFG);
snd_soc_write(codec, AC97_GPIO_CFG, reg & ~0x0100);
reg = snd_soc_read(codec, AC97_GPIO_PULL);
snd_soc_write(codec, AC97_GPIO_PULL, reg & ~(1<<15));
}
return 0;
}
static int rear_amp_event(struct snd_soc_dapm_widget *widget,
struct snd_kcontrol *kctl, int event)
{
struct snd_soc_codec *codec = widget->codec;
return rear_amp_power(codec, SND_SOC_DAPM_EVENT_ON(event));
}
/* mioa701 machine dapm widgets */
static const struct snd_soc_dapm_widget mioa701_dapm_widgets[] = {
SND_SOC_DAPM_SPK("Front Speaker", NULL),
SND_SOC_DAPM_SPK("Rear Speaker", rear_amp_event),
SND_SOC_DAPM_MIC("Headset", NULL),
SND_SOC_DAPM_LINE("GSM Line Out", NULL),
SND_SOC_DAPM_LINE("GSM Line In", NULL),
SND_SOC_DAPM_MIC("Headset Mic", NULL),
SND_SOC_DAPM_MIC("Front Mic", NULL),
};
static const struct snd_soc_dapm_route audio_map[] = {
/* Call Mic */
{"Mic Bias", NULL, "Front Mic"},
{"MIC1", NULL, "Mic Bias"},
/* Headset Mic */
{"LINEL", NULL, "Headset Mic"},
{"LINER", NULL, "Headset Mic"},
/* GSM Module */
{"MONOIN", NULL, "GSM Line Out"},
{"PCBEEP", NULL, "GSM Line Out"},
{"GSM Line In", NULL, "MONO"},
/* headphone connected to HPL, HPR */
{"Headset", NULL, "HPL"},
{"Headset", NULL, "HPR"},
/* front speaker connected to HPL, OUT3 */
{"Front Speaker", NULL, "HPL"},
{"Front Speaker", NULL, "OUT3"},
/* rear speaker connected to SPKL, SPKR */
{"Rear Speaker", NULL, "SPKL"},
{"Rear Speaker", NULL, "SPKR"},
};
static int mioa701_wm9713_init(struct snd_soc_pcm_runtime *rtd)
{
struct snd_soc_codec *codec = rtd->codec;
struct snd_soc_dapm_context *dapm = &codec->dapm;
unsigned short reg;
/* Add mioa701 specific widgets */
snd_soc_dapm_new_controls(dapm, ARRAY_AND_SIZE(mioa701_dapm_widgets));
/* Set up mioa701 specific audio path audio_mapnects */
snd_soc_dapm_add_routes(dapm, ARRAY_AND_SIZE(audio_map));
/* Prepare GPIO8 for rear speaker amplifier */
reg = codec->driver->read(codec, AC97_GPIO_CFG);
codec->driver->write(codec, AC97_GPIO_CFG, reg | 0x0100);
/* Prepare MIC input */
reg = codec->driver->read(codec, AC97_3D_CONTROL);
codec->driver->write(codec, AC97_3D_CONTROL, reg | 0xc000);
snd_soc_dapm_enable_pin(dapm, "Front Speaker");
snd_soc_dapm_enable_pin(dapm, "Rear Speaker");
snd_soc_dapm_enable_pin(dapm, "Front Mic");
snd_soc_dapm_enable_pin(dapm, "GSM Line In");
snd_soc_dapm_enable_pin(dapm, "GSM Line Out");
return 0;
}
static struct snd_soc_ops mioa701_ops;
static struct snd_soc_dai_link mioa701_dai[] = {
{
.name = "AC97",
.stream_name = "AC97 HiFi",
.cpu_dai_name = "pxa2xx-ac97",
.codec_dai_name = "wm9713-hifi",
.codec_name = "wm9713-codec",
.init = mioa701_wm9713_init,
.platform_name = "pxa-pcm-audio",
.ops = &mioa701_ops,
},
{
.name = "AC97 Aux",
.stream_name = "AC97 Aux",
.cpu_dai_name = "pxa2xx-ac97-aux",
.codec_dai_name ="wm9713-aux",
.codec_name = "wm9713-codec",
.platform_name = "pxa-pcm-audio",
.ops = &mioa701_ops,
},
};
static struct snd_soc_card mioa701 = {
.name = "MioA701",
.owner = THIS_MODULE,
.dai_link = mioa701_dai,
.num_links = ARRAY_SIZE(mioa701_dai),
};
static struct platform_device *mioa701_snd_device;
static int mioa701_wm9713_probe(struct platform_device *pdev)
{
int ret;
if (!machine_is_mioa701())
return -ENODEV;
dev_warn(&pdev->dev, "Be warned that incorrect mixers/muxes setup will"
"lead to overheating and possible destruction of your device."
"Do not use without a good knowledge of mio's board design!\n");
mioa701_snd_device = platform_device_alloc("soc-audio", -1);
if (!mioa701_snd_device)
return -ENOMEM;
platform_set_drvdata(mioa701_snd_device, &mioa701);
ret = platform_device_add(mioa701_snd_device);
if (!ret)
return 0;
platform_device_put(mioa701_snd_device);
return ret;
}
static int __devexit mioa701_wm9713_remove(struct platform_device *pdev)
{
platform_device_unregister(mioa701_snd_device);
return 0;
}
static struct platform_driver mioa701_wm9713_driver = {
.probe = mioa701_wm9713_probe,
.remove = __devexit_p(mioa701_wm9713_remove),
.driver = {
.name = "mioa701-wm9713",
.owner = THIS_MODULE,
},
};
module_platform_driver(mioa701_wm9713_driver);
/* Module information */
MODULE_AUTHOR("Robert Jarzmik (rjarzmik@free.fr)");
MODULE_DESCRIPTION("ALSA SoC WM9713 MIO A701");
MODULE_LICENSE("GPL");
| gpl-2.0 |
ajfink/android_kernel_lge_e7lte | drivers/s390/cio/cmf.c | 4946 | 34005 | /*
* linux/drivers/s390/cio/cmf.c
*
* Linux on zSeries Channel Measurement Facility support
*
* Copyright 2000,2006 IBM Corporation
*
* Authors: Arnd Bergmann <arndb@de.ibm.com>
* Cornelia Huck <cornelia.huck@de.ibm.com>
*
* original idea from Natarajan Krishnaswami <nkrishna@us.ibm.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#define KMSG_COMPONENT "cio"
#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
#include <linux/bootmem.h>
#include <linux/device.h>
#include <linux/init.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/slab.h>
#include <linux/timex.h> /* get_clock() */
#include <asm/ccwdev.h>
#include <asm/cio.h>
#include <asm/cmb.h>
#include <asm/div64.h>
#include "cio.h"
#include "css.h"
#include "device.h"
#include "ioasm.h"
#include "chsc.h"
/*
* parameter to enable cmf during boot, possible uses are:
* "s390cmf" -- enable cmf and allocate 2 MB of ram so measuring can be
* used on any subchannel
* "s390cmf=<num>" -- enable cmf and allocate enough memory to measure
* <num> subchannel, where <num> is an integer
* between 1 and 65535, default is 1024
*/
#define ARGSTRING "s390cmf"
/* indices for READCMB */
enum cmb_index {
/* basic and exended format: */
cmb_ssch_rsch_count,
cmb_sample_count,
cmb_device_connect_time,
cmb_function_pending_time,
cmb_device_disconnect_time,
cmb_control_unit_queuing_time,
cmb_device_active_only_time,
/* extended format only: */
cmb_device_busy_time,
cmb_initial_command_response_time,
};
/**
* enum cmb_format - types of supported measurement block formats
*
* @CMF_BASIC: traditional channel measurement blocks supported
* by all machines that we run on
* @CMF_EXTENDED: improved format that was introduced with the z990
* machine
* @CMF_AUTODETECT: default: use extended format when running on a machine
* supporting extended format, otherwise fall back to
* basic format
*/
enum cmb_format {
CMF_BASIC,
CMF_EXTENDED,
CMF_AUTODETECT = -1,
};
/*
* format - actual format for all measurement blocks
*
* The format module parameter can be set to a value of 0 (zero)
* or 1, indicating basic or extended format as described for
* enum cmb_format.
*/
static int format = CMF_AUTODETECT;
module_param(format, bint, 0444);
/**
* struct cmb_operations - functions to use depending on cmb_format
*
* Most of these functions operate on a struct ccw_device. There is only
* one instance of struct cmb_operations because the format of the measurement
* data is guaranteed to be the same for every ccw_device.
*
* @alloc: allocate memory for a channel measurement block,
* either with the help of a special pool or with kmalloc
* @free: free memory allocated with @alloc
* @set: enable or disable measurement
* @read: read a measurement entry at an index
* @readall: read a measurement block in a common format
* @reset: clear the data in the associated measurement block and
* reset its time stamp
* @align: align an allocated block so that the hardware can use it
*/
struct cmb_operations {
int (*alloc) (struct ccw_device *);
void (*free) (struct ccw_device *);
int (*set) (struct ccw_device *, u32);
u64 (*read) (struct ccw_device *, int);
int (*readall)(struct ccw_device *, struct cmbdata *);
void (*reset) (struct ccw_device *);
void *(*align) (void *);
/* private: */
struct attribute_group *attr_group;
};
static struct cmb_operations *cmbops;
struct cmb_data {
void *hw_block; /* Pointer to block updated by hardware */
void *last_block; /* Last changed block copied from hardware block */
int size; /* Size of hw_block and last_block */
unsigned long long last_update; /* when last_block was updated */
};
/*
* Our user interface is designed in terms of nanoseconds,
* while the hardware measures total times in its own
* unit.
*/
static inline u64 time_to_nsec(u32 value)
{
return ((u64)value) * 128000ull;
}
/*
* Users are usually interested in average times,
* not accumulated time.
* This also helps us with atomicity problems
* when reading sinlge values.
*/
static inline u64 time_to_avg_nsec(u32 value, u32 count)
{
u64 ret;
/* no samples yet, avoid division by 0 */
if (count == 0)
return 0;
/* value comes in units of 128 µsec */
ret = time_to_nsec(value);
do_div(ret, count);
return ret;
}
/*
* Activate or deactivate the channel monitor. When area is NULL,
* the monitor is deactivated. The channel monitor needs to
* be active in order to measure subchannels, which also need
* to be enabled.
*/
static inline void cmf_activate(void *area, unsigned int onoff)
{
register void * __gpr2 asm("2");
register long __gpr1 asm("1");
__gpr2 = area;
__gpr1 = onoff ? 2 : 0;
/* activate channel measurement */
asm("schm" : : "d" (__gpr2), "d" (__gpr1) );
}
static int set_schib(struct ccw_device *cdev, u32 mme, int mbfc,
unsigned long address)
{
struct subchannel *sch;
sch = to_subchannel(cdev->dev.parent);
sch->config.mme = mme;
sch->config.mbfc = mbfc;
/* address can be either a block address or a block index */
if (mbfc)
sch->config.mba = address;
else
sch->config.mbi = address;
return cio_commit_config(sch);
}
struct set_schib_struct {
u32 mme;
int mbfc;
unsigned long address;
wait_queue_head_t wait;
int ret;
struct kref kref;
};
static void cmf_set_schib_release(struct kref *kref)
{
struct set_schib_struct *set_data;
set_data = container_of(kref, struct set_schib_struct, kref);
kfree(set_data);
}
#define CMF_PENDING 1
static int set_schib_wait(struct ccw_device *cdev, u32 mme,
int mbfc, unsigned long address)
{
struct set_schib_struct *set_data;
int ret;
spin_lock_irq(cdev->ccwlock);
if (!cdev->private->cmb) {
ret = -ENODEV;
goto out;
}
set_data = kzalloc(sizeof(struct set_schib_struct), GFP_ATOMIC);
if (!set_data) {
ret = -ENOMEM;
goto out;
}
init_waitqueue_head(&set_data->wait);
kref_init(&set_data->kref);
set_data->mme = mme;
set_data->mbfc = mbfc;
set_data->address = address;
ret = set_schib(cdev, mme, mbfc, address);
if (ret != -EBUSY)
goto out_put;
if (cdev->private->state != DEV_STATE_ONLINE) {
/* if the device is not online, don't even try again */
ret = -EBUSY;
goto out_put;
}
cdev->private->state = DEV_STATE_CMFCHANGE;
set_data->ret = CMF_PENDING;
cdev->private->cmb_wait = set_data;
spin_unlock_irq(cdev->ccwlock);
if (wait_event_interruptible(set_data->wait,
set_data->ret != CMF_PENDING)) {
spin_lock_irq(cdev->ccwlock);
if (set_data->ret == CMF_PENDING) {
set_data->ret = -ERESTARTSYS;
if (cdev->private->state == DEV_STATE_CMFCHANGE)
cdev->private->state = DEV_STATE_ONLINE;
}
spin_unlock_irq(cdev->ccwlock);
}
spin_lock_irq(cdev->ccwlock);
cdev->private->cmb_wait = NULL;
ret = set_data->ret;
out_put:
kref_put(&set_data->kref, cmf_set_schib_release);
out:
spin_unlock_irq(cdev->ccwlock);
return ret;
}
void retry_set_schib(struct ccw_device *cdev)
{
struct set_schib_struct *set_data;
set_data = cdev->private->cmb_wait;
if (!set_data) {
WARN_ON(1);
return;
}
kref_get(&set_data->kref);
set_data->ret = set_schib(cdev, set_data->mme, set_data->mbfc,
set_data->address);
wake_up(&set_data->wait);
kref_put(&set_data->kref, cmf_set_schib_release);
}
static int cmf_copy_block(struct ccw_device *cdev)
{
struct subchannel *sch;
void *reference_buf;
void *hw_block;
struct cmb_data *cmb_data;
sch = to_subchannel(cdev->dev.parent);
if (cio_update_schib(sch))
return -ENODEV;
if (scsw_fctl(&sch->schib.scsw) & SCSW_FCTL_START_FUNC) {
/* Don't copy if a start function is in progress. */
if ((!(scsw_actl(&sch->schib.scsw) & SCSW_ACTL_SUSPENDED)) &&
(scsw_actl(&sch->schib.scsw) &
(SCSW_ACTL_DEVACT | SCSW_ACTL_SCHACT)) &&
(!(scsw_stctl(&sch->schib.scsw) & SCSW_STCTL_SEC_STATUS)))
return -EBUSY;
}
cmb_data = cdev->private->cmb;
hw_block = cmbops->align(cmb_data->hw_block);
if (!memcmp(cmb_data->last_block, hw_block, cmb_data->size))
/* No need to copy. */
return 0;
reference_buf = kzalloc(cmb_data->size, GFP_ATOMIC);
if (!reference_buf)
return -ENOMEM;
/* Ensure consistency of block copied from hardware. */
do {
memcpy(cmb_data->last_block, hw_block, cmb_data->size);
memcpy(reference_buf, hw_block, cmb_data->size);
} while (memcmp(cmb_data->last_block, reference_buf, cmb_data->size));
cmb_data->last_update = get_clock();
kfree(reference_buf);
return 0;
}
struct copy_block_struct {
wait_queue_head_t wait;
int ret;
struct kref kref;
};
static void cmf_copy_block_release(struct kref *kref)
{
struct copy_block_struct *copy_block;
copy_block = container_of(kref, struct copy_block_struct, kref);
kfree(copy_block);
}
static int cmf_cmb_copy_wait(struct ccw_device *cdev)
{
struct copy_block_struct *copy_block;
int ret;
unsigned long flags;
spin_lock_irqsave(cdev->ccwlock, flags);
if (!cdev->private->cmb) {
ret = -ENODEV;
goto out;
}
copy_block = kzalloc(sizeof(struct copy_block_struct), GFP_ATOMIC);
if (!copy_block) {
ret = -ENOMEM;
goto out;
}
init_waitqueue_head(©_block->wait);
kref_init(©_block->kref);
ret = cmf_copy_block(cdev);
if (ret != -EBUSY)
goto out_put;
if (cdev->private->state != DEV_STATE_ONLINE) {
ret = -EBUSY;
goto out_put;
}
cdev->private->state = DEV_STATE_CMFUPDATE;
copy_block->ret = CMF_PENDING;
cdev->private->cmb_wait = copy_block;
spin_unlock_irqrestore(cdev->ccwlock, flags);
if (wait_event_interruptible(copy_block->wait,
copy_block->ret != CMF_PENDING)) {
spin_lock_irqsave(cdev->ccwlock, flags);
if (copy_block->ret == CMF_PENDING) {
copy_block->ret = -ERESTARTSYS;
if (cdev->private->state == DEV_STATE_CMFUPDATE)
cdev->private->state = DEV_STATE_ONLINE;
}
spin_unlock_irqrestore(cdev->ccwlock, flags);
}
spin_lock_irqsave(cdev->ccwlock, flags);
cdev->private->cmb_wait = NULL;
ret = copy_block->ret;
out_put:
kref_put(©_block->kref, cmf_copy_block_release);
out:
spin_unlock_irqrestore(cdev->ccwlock, flags);
return ret;
}
void cmf_retry_copy_block(struct ccw_device *cdev)
{
struct copy_block_struct *copy_block;
copy_block = cdev->private->cmb_wait;
if (!copy_block) {
WARN_ON(1);
return;
}
kref_get(©_block->kref);
copy_block->ret = cmf_copy_block(cdev);
wake_up(©_block->wait);
kref_put(©_block->kref, cmf_copy_block_release);
}
static void cmf_generic_reset(struct ccw_device *cdev)
{
struct cmb_data *cmb_data;
spin_lock_irq(cdev->ccwlock);
cmb_data = cdev->private->cmb;
if (cmb_data) {
memset(cmb_data->last_block, 0, cmb_data->size);
/*
* Need to reset hw block as well to make the hardware start
* from 0 again.
*/
memset(cmbops->align(cmb_data->hw_block), 0, cmb_data->size);
cmb_data->last_update = 0;
}
cdev->private->cmb_start_time = get_clock();
spin_unlock_irq(cdev->ccwlock);
}
/**
* struct cmb_area - container for global cmb data
*
* @mem: pointer to CMBs (only in basic measurement mode)
* @list: contains a linked list of all subchannels
* @num_channels: number of channels to be measured
* @lock: protect concurrent access to @mem and @list
*/
struct cmb_area {
struct cmb *mem;
struct list_head list;
int num_channels;
spinlock_t lock;
};
static struct cmb_area cmb_area = {
.lock = __SPIN_LOCK_UNLOCKED(cmb_area.lock),
.list = LIST_HEAD_INIT(cmb_area.list),
.num_channels = 1024,
};
/* ****** old style CMB handling ********/
/*
* Basic channel measurement blocks are allocated in one contiguous
* block of memory, which can not be moved as long as any channel
* is active. Therefore, a maximum number of subchannels needs to
* be defined somewhere. This is a module parameter, defaulting to
* a reasonable value of 1024, or 32 kb of memory.
* Current kernels don't allow kmalloc with more than 128kb, so the
* maximum is 4096.
*/
module_param_named(maxchannels, cmb_area.num_channels, uint, 0444);
/**
* struct cmb - basic channel measurement block
* @ssch_rsch_count: number of ssch and rsch
* @sample_count: number of samples
* @device_connect_time: time of device connect
* @function_pending_time: time of function pending
* @device_disconnect_time: time of device disconnect
* @control_unit_queuing_time: time of control unit queuing
* @device_active_only_time: time of device active only
* @reserved: unused in basic measurement mode
*
* The measurement block as used by the hardware. The fields are described
* further in z/Architecture Principles of Operation, chapter 17.
*
* The cmb area made up from these blocks must be a contiguous array and may
* not be reallocated or freed.
* Only one cmb area can be present in the system.
*/
struct cmb {
u16 ssch_rsch_count;
u16 sample_count;
u32 device_connect_time;
u32 function_pending_time;
u32 device_disconnect_time;
u32 control_unit_queuing_time;
u32 device_active_only_time;
u32 reserved[2];
};
/*
* Insert a single device into the cmb_area list.
* Called with cmb_area.lock held from alloc_cmb.
*/
static int alloc_cmb_single(struct ccw_device *cdev,
struct cmb_data *cmb_data)
{
struct cmb *cmb;
struct ccw_device_private *node;
int ret;
spin_lock_irq(cdev->ccwlock);
if (!list_empty(&cdev->private->cmb_list)) {
ret = -EBUSY;
goto out;
}
/*
* Find first unused cmb in cmb_area.mem.
* This is a little tricky: cmb_area.list
* remains sorted by ->cmb->hw_data pointers.
*/
cmb = cmb_area.mem;
list_for_each_entry(node, &cmb_area.list, cmb_list) {
struct cmb_data *data;
data = node->cmb;
if ((struct cmb*)data->hw_block > cmb)
break;
cmb++;
}
if (cmb - cmb_area.mem >= cmb_area.num_channels) {
ret = -ENOMEM;
goto out;
}
/* insert new cmb */
list_add_tail(&cdev->private->cmb_list, &node->cmb_list);
cmb_data->hw_block = cmb;
cdev->private->cmb = cmb_data;
ret = 0;
out:
spin_unlock_irq(cdev->ccwlock);
return ret;
}
static int alloc_cmb(struct ccw_device *cdev)
{
int ret;
struct cmb *mem;
ssize_t size;
struct cmb_data *cmb_data;
/* Allocate private cmb_data. */
cmb_data = kzalloc(sizeof(struct cmb_data), GFP_KERNEL);
if (!cmb_data)
return -ENOMEM;
cmb_data->last_block = kzalloc(sizeof(struct cmb), GFP_KERNEL);
if (!cmb_data->last_block) {
kfree(cmb_data);
return -ENOMEM;
}
cmb_data->size = sizeof(struct cmb);
spin_lock(&cmb_area.lock);
if (!cmb_area.mem) {
/* there is no user yet, so we need a new area */
size = sizeof(struct cmb) * cmb_area.num_channels;
WARN_ON(!list_empty(&cmb_area.list));
spin_unlock(&cmb_area.lock);
mem = (void*)__get_free_pages(GFP_KERNEL | GFP_DMA,
get_order(size));
spin_lock(&cmb_area.lock);
if (cmb_area.mem) {
/* ok, another thread was faster */
free_pages((unsigned long)mem, get_order(size));
} else if (!mem) {
/* no luck */
ret = -ENOMEM;
goto out;
} else {
/* everything ok */
memset(mem, 0, size);
cmb_area.mem = mem;
cmf_activate(cmb_area.mem, 1);
}
}
/* do the actual allocation */
ret = alloc_cmb_single(cdev, cmb_data);
out:
spin_unlock(&cmb_area.lock);
if (ret) {
kfree(cmb_data->last_block);
kfree(cmb_data);
}
return ret;
}
static void free_cmb(struct ccw_device *cdev)
{
struct ccw_device_private *priv;
struct cmb_data *cmb_data;
spin_lock(&cmb_area.lock);
spin_lock_irq(cdev->ccwlock);
priv = cdev->private;
if (list_empty(&priv->cmb_list)) {
/* already freed */
goto out;
}
cmb_data = priv->cmb;
priv->cmb = NULL;
if (cmb_data)
kfree(cmb_data->last_block);
kfree(cmb_data);
list_del_init(&priv->cmb_list);
if (list_empty(&cmb_area.list)) {
ssize_t size;
size = sizeof(struct cmb) * cmb_area.num_channels;
cmf_activate(NULL, 0);
free_pages((unsigned long)cmb_area.mem, get_order(size));
cmb_area.mem = NULL;
}
out:
spin_unlock_irq(cdev->ccwlock);
spin_unlock(&cmb_area.lock);
}
static int set_cmb(struct ccw_device *cdev, u32 mme)
{
u16 offset;
struct cmb_data *cmb_data;
unsigned long flags;
spin_lock_irqsave(cdev->ccwlock, flags);
if (!cdev->private->cmb) {
spin_unlock_irqrestore(cdev->ccwlock, flags);
return -EINVAL;
}
cmb_data = cdev->private->cmb;
offset = mme ? (struct cmb *)cmb_data->hw_block - cmb_area.mem : 0;
spin_unlock_irqrestore(cdev->ccwlock, flags);
return set_schib_wait(cdev, mme, 0, offset);
}
static u64 read_cmb(struct ccw_device *cdev, int index)
{
struct cmb *cmb;
u32 val;
int ret;
unsigned long flags;
ret = cmf_cmb_copy_wait(cdev);
if (ret < 0)
return 0;
spin_lock_irqsave(cdev->ccwlock, flags);
if (!cdev->private->cmb) {
ret = 0;
goto out;
}
cmb = ((struct cmb_data *)cdev->private->cmb)->last_block;
switch (index) {
case cmb_ssch_rsch_count:
ret = cmb->ssch_rsch_count;
goto out;
case cmb_sample_count:
ret = cmb->sample_count;
goto out;
case cmb_device_connect_time:
val = cmb->device_connect_time;
break;
case cmb_function_pending_time:
val = cmb->function_pending_time;
break;
case cmb_device_disconnect_time:
val = cmb->device_disconnect_time;
break;
case cmb_control_unit_queuing_time:
val = cmb->control_unit_queuing_time;
break;
case cmb_device_active_only_time:
val = cmb->device_active_only_time;
break;
default:
ret = 0;
goto out;
}
ret = time_to_avg_nsec(val, cmb->sample_count);
out:
spin_unlock_irqrestore(cdev->ccwlock, flags);
return ret;
}
static int readall_cmb(struct ccw_device *cdev, struct cmbdata *data)
{
struct cmb *cmb;
struct cmb_data *cmb_data;
u64 time;
unsigned long flags;
int ret;
ret = cmf_cmb_copy_wait(cdev);
if (ret < 0)
return ret;
spin_lock_irqsave(cdev->ccwlock, flags);
cmb_data = cdev->private->cmb;
if (!cmb_data) {
ret = -ENODEV;
goto out;
}
if (cmb_data->last_update == 0) {
ret = -EAGAIN;
goto out;
}
cmb = cmb_data->last_block;
time = cmb_data->last_update - cdev->private->cmb_start_time;
memset(data, 0, sizeof(struct cmbdata));
/* we only know values before device_busy_time */
data->size = offsetof(struct cmbdata, device_busy_time);
/* convert to nanoseconds */
data->elapsed_time = (time * 1000) >> 12;
/* copy data to new structure */
data->ssch_rsch_count = cmb->ssch_rsch_count;
data->sample_count = cmb->sample_count;
/* time fields are converted to nanoseconds while copying */
data->device_connect_time = time_to_nsec(cmb->device_connect_time);
data->function_pending_time = time_to_nsec(cmb->function_pending_time);
data->device_disconnect_time =
time_to_nsec(cmb->device_disconnect_time);
data->control_unit_queuing_time
= time_to_nsec(cmb->control_unit_queuing_time);
data->device_active_only_time
= time_to_nsec(cmb->device_active_only_time);
ret = 0;
out:
spin_unlock_irqrestore(cdev->ccwlock, flags);
return ret;
}
static void reset_cmb(struct ccw_device *cdev)
{
cmf_generic_reset(cdev);
}
static void * align_cmb(void *area)
{
return area;
}
static struct attribute_group cmf_attr_group;
static struct cmb_operations cmbops_basic = {
.alloc = alloc_cmb,
.free = free_cmb,
.set = set_cmb,
.read = read_cmb,
.readall = readall_cmb,
.reset = reset_cmb,
.align = align_cmb,
.attr_group = &cmf_attr_group,
};
/* ******** extended cmb handling ********/
/**
* struct cmbe - extended channel measurement block
* @ssch_rsch_count: number of ssch and rsch
* @sample_count: number of samples
* @device_connect_time: time of device connect
* @function_pending_time: time of function pending
* @device_disconnect_time: time of device disconnect
* @control_unit_queuing_time: time of control unit queuing
* @device_active_only_time: time of device active only
* @device_busy_time: time of device busy
* @initial_command_response_time: initial command response time
* @reserved: unused
*
* The measurement block as used by the hardware. May be in any 64 bit physical
* location.
* The fields are described further in z/Architecture Principles of Operation,
* third edition, chapter 17.
*/
struct cmbe {
u32 ssch_rsch_count;
u32 sample_count;
u32 device_connect_time;
u32 function_pending_time;
u32 device_disconnect_time;
u32 control_unit_queuing_time;
u32 device_active_only_time;
u32 device_busy_time;
u32 initial_command_response_time;
u32 reserved[7];
};
/*
* kmalloc only guarantees 8 byte alignment, but we need cmbe
* pointers to be naturally aligned. Make sure to allocate
* enough space for two cmbes.
*/
static inline struct cmbe *cmbe_align(struct cmbe *c)
{
unsigned long addr;
addr = ((unsigned long)c + sizeof (struct cmbe) - sizeof(long)) &
~(sizeof (struct cmbe) - sizeof(long));
return (struct cmbe*)addr;
}
static int alloc_cmbe(struct ccw_device *cdev)
{
struct cmbe *cmbe;
struct cmb_data *cmb_data;
int ret;
cmbe = kzalloc (sizeof (*cmbe) * 2, GFP_KERNEL);
if (!cmbe)
return -ENOMEM;
cmb_data = kzalloc(sizeof(struct cmb_data), GFP_KERNEL);
if (!cmb_data) {
ret = -ENOMEM;
goto out_free;
}
cmb_data->last_block = kzalloc(sizeof(struct cmbe), GFP_KERNEL);
if (!cmb_data->last_block) {
ret = -ENOMEM;
goto out_free;
}
cmb_data->size = sizeof(struct cmbe);
spin_lock_irq(cdev->ccwlock);
if (cdev->private->cmb) {
spin_unlock_irq(cdev->ccwlock);
ret = -EBUSY;
goto out_free;
}
cmb_data->hw_block = cmbe;
cdev->private->cmb = cmb_data;
spin_unlock_irq(cdev->ccwlock);
/* activate global measurement if this is the first channel */
spin_lock(&cmb_area.lock);
if (list_empty(&cmb_area.list))
cmf_activate(NULL, 1);
list_add_tail(&cdev->private->cmb_list, &cmb_area.list);
spin_unlock(&cmb_area.lock);
return 0;
out_free:
if (cmb_data)
kfree(cmb_data->last_block);
kfree(cmb_data);
kfree(cmbe);
return ret;
}
static void free_cmbe(struct ccw_device *cdev)
{
struct cmb_data *cmb_data;
spin_lock_irq(cdev->ccwlock);
cmb_data = cdev->private->cmb;
cdev->private->cmb = NULL;
if (cmb_data)
kfree(cmb_data->last_block);
kfree(cmb_data);
spin_unlock_irq(cdev->ccwlock);
/* deactivate global measurement if this is the last channel */
spin_lock(&cmb_area.lock);
list_del_init(&cdev->private->cmb_list);
if (list_empty(&cmb_area.list))
cmf_activate(NULL, 0);
spin_unlock(&cmb_area.lock);
}
static int set_cmbe(struct ccw_device *cdev, u32 mme)
{
unsigned long mba;
struct cmb_data *cmb_data;
unsigned long flags;
spin_lock_irqsave(cdev->ccwlock, flags);
if (!cdev->private->cmb) {
spin_unlock_irqrestore(cdev->ccwlock, flags);
return -EINVAL;
}
cmb_data = cdev->private->cmb;
mba = mme ? (unsigned long) cmbe_align(cmb_data->hw_block) : 0;
spin_unlock_irqrestore(cdev->ccwlock, flags);
return set_schib_wait(cdev, mme, 1, mba);
}
static u64 read_cmbe(struct ccw_device *cdev, int index)
{
struct cmbe *cmb;
struct cmb_data *cmb_data;
u32 val;
int ret;
unsigned long flags;
ret = cmf_cmb_copy_wait(cdev);
if (ret < 0)
return 0;
spin_lock_irqsave(cdev->ccwlock, flags);
cmb_data = cdev->private->cmb;
if (!cmb_data) {
ret = 0;
goto out;
}
cmb = cmb_data->last_block;
switch (index) {
case cmb_ssch_rsch_count:
ret = cmb->ssch_rsch_count;
goto out;
case cmb_sample_count:
ret = cmb->sample_count;
goto out;
case cmb_device_connect_time:
val = cmb->device_connect_time;
break;
case cmb_function_pending_time:
val = cmb->function_pending_time;
break;
case cmb_device_disconnect_time:
val = cmb->device_disconnect_time;
break;
case cmb_control_unit_queuing_time:
val = cmb->control_unit_queuing_time;
break;
case cmb_device_active_only_time:
val = cmb->device_active_only_time;
break;
case cmb_device_busy_time:
val = cmb->device_busy_time;
break;
case cmb_initial_command_response_time:
val = cmb->initial_command_response_time;
break;
default:
ret = 0;
goto out;
}
ret = time_to_avg_nsec(val, cmb->sample_count);
out:
spin_unlock_irqrestore(cdev->ccwlock, flags);
return ret;
}
static int readall_cmbe(struct ccw_device *cdev, struct cmbdata *data)
{
struct cmbe *cmb;
struct cmb_data *cmb_data;
u64 time;
unsigned long flags;
int ret;
ret = cmf_cmb_copy_wait(cdev);
if (ret < 0)
return ret;
spin_lock_irqsave(cdev->ccwlock, flags);
cmb_data = cdev->private->cmb;
if (!cmb_data) {
ret = -ENODEV;
goto out;
}
if (cmb_data->last_update == 0) {
ret = -EAGAIN;
goto out;
}
time = cmb_data->last_update - cdev->private->cmb_start_time;
memset (data, 0, sizeof(struct cmbdata));
/* we only know values before device_busy_time */
data->size = offsetof(struct cmbdata, device_busy_time);
/* conver to nanoseconds */
data->elapsed_time = (time * 1000) >> 12;
cmb = cmb_data->last_block;
/* copy data to new structure */
data->ssch_rsch_count = cmb->ssch_rsch_count;
data->sample_count = cmb->sample_count;
/* time fields are converted to nanoseconds while copying */
data->device_connect_time = time_to_nsec(cmb->device_connect_time);
data->function_pending_time = time_to_nsec(cmb->function_pending_time);
data->device_disconnect_time =
time_to_nsec(cmb->device_disconnect_time);
data->control_unit_queuing_time
= time_to_nsec(cmb->control_unit_queuing_time);
data->device_active_only_time
= time_to_nsec(cmb->device_active_only_time);
data->device_busy_time = time_to_nsec(cmb->device_busy_time);
data->initial_command_response_time
= time_to_nsec(cmb->initial_command_response_time);
ret = 0;
out:
spin_unlock_irqrestore(cdev->ccwlock, flags);
return ret;
}
static void reset_cmbe(struct ccw_device *cdev)
{
cmf_generic_reset(cdev);
}
static void * align_cmbe(void *area)
{
return cmbe_align(area);
}
static struct attribute_group cmf_attr_group_ext;
static struct cmb_operations cmbops_extended = {
.alloc = alloc_cmbe,
.free = free_cmbe,
.set = set_cmbe,
.read = read_cmbe,
.readall = readall_cmbe,
.reset = reset_cmbe,
.align = align_cmbe,
.attr_group = &cmf_attr_group_ext,
};
static ssize_t cmb_show_attr(struct device *dev, char *buf, enum cmb_index idx)
{
return sprintf(buf, "%lld\n",
(unsigned long long) cmf_read(to_ccwdev(dev), idx));
}
static ssize_t cmb_show_avg_sample_interval(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct ccw_device *cdev;
long interval;
unsigned long count;
struct cmb_data *cmb_data;
cdev = to_ccwdev(dev);
count = cmf_read(cdev, cmb_sample_count);
spin_lock_irq(cdev->ccwlock);
cmb_data = cdev->private->cmb;
if (count) {
interval = cmb_data->last_update -
cdev->private->cmb_start_time;
interval = (interval * 1000) >> 12;
interval /= count;
} else
interval = -1;
spin_unlock_irq(cdev->ccwlock);
return sprintf(buf, "%ld\n", interval);
}
static ssize_t cmb_show_avg_utilization(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct cmbdata data;
u64 utilization;
unsigned long t, u;
int ret;
ret = cmf_readall(to_ccwdev(dev), &data);
if (ret == -EAGAIN || ret == -ENODEV)
/* No data (yet/currently) available to use for calculation. */
return sprintf(buf, "n/a\n");
else if (ret)
return ret;
utilization = data.device_connect_time +
data.function_pending_time +
data.device_disconnect_time;
/* shift to avoid long long division */
while (-1ul < (data.elapsed_time | utilization)) {
utilization >>= 8;
data.elapsed_time >>= 8;
}
/* calculate value in 0.1 percent units */
t = (unsigned long) data.elapsed_time / 1000;
u = (unsigned long) utilization / t;
return sprintf(buf, "%02ld.%01ld%%\n", u/ 10, u - (u/ 10) * 10);
}
#define cmf_attr(name) \
static ssize_t show_##name(struct device *dev, \
struct device_attribute *attr, char *buf) \
{ return cmb_show_attr((dev), buf, cmb_##name); } \
static DEVICE_ATTR(name, 0444, show_##name, NULL);
#define cmf_attr_avg(name) \
static ssize_t show_avg_##name(struct device *dev, \
struct device_attribute *attr, char *buf) \
{ return cmb_show_attr((dev), buf, cmb_##name); } \
static DEVICE_ATTR(avg_##name, 0444, show_avg_##name, NULL);
cmf_attr(ssch_rsch_count);
cmf_attr(sample_count);
cmf_attr_avg(device_connect_time);
cmf_attr_avg(function_pending_time);
cmf_attr_avg(device_disconnect_time);
cmf_attr_avg(control_unit_queuing_time);
cmf_attr_avg(device_active_only_time);
cmf_attr_avg(device_busy_time);
cmf_attr_avg(initial_command_response_time);
static DEVICE_ATTR(avg_sample_interval, 0444, cmb_show_avg_sample_interval,
NULL);
static DEVICE_ATTR(avg_utilization, 0444, cmb_show_avg_utilization, NULL);
static struct attribute *cmf_attributes[] = {
&dev_attr_avg_sample_interval.attr,
&dev_attr_avg_utilization.attr,
&dev_attr_ssch_rsch_count.attr,
&dev_attr_sample_count.attr,
&dev_attr_avg_device_connect_time.attr,
&dev_attr_avg_function_pending_time.attr,
&dev_attr_avg_device_disconnect_time.attr,
&dev_attr_avg_control_unit_queuing_time.attr,
&dev_attr_avg_device_active_only_time.attr,
NULL,
};
static struct attribute_group cmf_attr_group = {
.name = "cmf",
.attrs = cmf_attributes,
};
static struct attribute *cmf_attributes_ext[] = {
&dev_attr_avg_sample_interval.attr,
&dev_attr_avg_utilization.attr,
&dev_attr_ssch_rsch_count.attr,
&dev_attr_sample_count.attr,
&dev_attr_avg_device_connect_time.attr,
&dev_attr_avg_function_pending_time.attr,
&dev_attr_avg_device_disconnect_time.attr,
&dev_attr_avg_control_unit_queuing_time.attr,
&dev_attr_avg_device_active_only_time.attr,
&dev_attr_avg_device_busy_time.attr,
&dev_attr_avg_initial_command_response_time.attr,
NULL,
};
static struct attribute_group cmf_attr_group_ext = {
.name = "cmf",
.attrs = cmf_attributes_ext,
};
static ssize_t cmb_enable_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
return sprintf(buf, "%d\n", to_ccwdev(dev)->private->cmb ? 1 : 0);
}
static ssize_t cmb_enable_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t c)
{
struct ccw_device *cdev;
int ret;
unsigned long val;
ret = strict_strtoul(buf, 16, &val);
if (ret)
return ret;
cdev = to_ccwdev(dev);
switch (val) {
case 0:
ret = disable_cmf(cdev);
break;
case 1:
ret = enable_cmf(cdev);
break;
}
return c;
}
DEVICE_ATTR(cmb_enable, 0644, cmb_enable_show, cmb_enable_store);
int ccw_set_cmf(struct ccw_device *cdev, int enable)
{
return cmbops->set(cdev, enable ? 2 : 0);
}
/**
* enable_cmf() - switch on the channel measurement for a specific device
* @cdev: The ccw device to be enabled
*
* Returns %0 for success or a negative error value.
*
* Context:
* non-atomic
*/
int enable_cmf(struct ccw_device *cdev)
{
int ret;
ret = cmbops->alloc(cdev);
cmbops->reset(cdev);
if (ret)
return ret;
ret = cmbops->set(cdev, 2);
if (ret) {
cmbops->free(cdev);
return ret;
}
ret = sysfs_create_group(&cdev->dev.kobj, cmbops->attr_group);
if (!ret)
return 0;
cmbops->set(cdev, 0); //FIXME: this can fail
cmbops->free(cdev);
return ret;
}
/**
* disable_cmf() - switch off the channel measurement for a specific device
* @cdev: The ccw device to be disabled
*
* Returns %0 for success or a negative error value.
*
* Context:
* non-atomic
*/
int disable_cmf(struct ccw_device *cdev)
{
int ret;
ret = cmbops->set(cdev, 0);
if (ret)
return ret;
cmbops->free(cdev);
sysfs_remove_group(&cdev->dev.kobj, cmbops->attr_group);
return ret;
}
/**
* cmf_read() - read one value from the current channel measurement block
* @cdev: the channel to be read
* @index: the index of the value to be read
*
* Returns the value read or %0 if the value cannot be read.
*
* Context:
* any
*/
u64 cmf_read(struct ccw_device *cdev, int index)
{
return cmbops->read(cdev, index);
}
/**
* cmf_readall() - read the current channel measurement block
* @cdev: the channel to be read
* @data: a pointer to a data block that will be filled
*
* Returns %0 on success, a negative error value otherwise.
*
* Context:
* any
*/
int cmf_readall(struct ccw_device *cdev, struct cmbdata *data)
{
return cmbops->readall(cdev, data);
}
/* Reenable cmf when a disconnected device becomes available again. */
int cmf_reenable(struct ccw_device *cdev)
{
cmbops->reset(cdev);
return cmbops->set(cdev, 2);
}
static int __init init_cmf(void)
{
char *format_string;
char *detect_string = "parameter";
/*
* If the user did not give a parameter, see if we are running on a
* machine supporting extended measurement blocks, otherwise fall back
* to basic mode.
*/
if (format == CMF_AUTODETECT) {
if (!css_general_characteristics.ext_mb) {
format = CMF_BASIC;
} else {
format = CMF_EXTENDED;
}
detect_string = "autodetected";
} else {
detect_string = "parameter";
}
switch (format) {
case CMF_BASIC:
format_string = "basic";
cmbops = &cmbops_basic;
break;
case CMF_EXTENDED:
format_string = "extended";
cmbops = &cmbops_extended;
break;
default:
return 1;
}
pr_info("Channel measurement facility initialized using format "
"%s (mode %s)\n", format_string, detect_string);
return 0;
}
module_init(init_cmf);
MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("channel measurement facility base driver\n"
"Copyright 2003 IBM Corporation\n");
EXPORT_SYMBOL_GPL(enable_cmf);
EXPORT_SYMBOL_GPL(disable_cmf);
EXPORT_SYMBOL_GPL(cmf_read);
EXPORT_SYMBOL_GPL(cmf_readall);
| gpl-2.0 |
cnexus/kernel_d2spr_tw_44 | sound/soc/fsl/mpc5200_dma.c | 4946 | 14971 | /*
* Freescale MPC5200 PSC DMA
* ALSA SoC Platform driver
*
* Copyright (C) 2008 Secret Lab Technologies Ltd.
* Copyright (C) 2009 Jon Smirl, Digispeaker
*/
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>
#include <linux/of_platform.h>
#include <sound/soc.h>
#include <sysdev/bestcomm/bestcomm.h>
#include <sysdev/bestcomm/gen_bd.h>
#include <asm/mpc52xx_psc.h>
#include "mpc5200_dma.h"
/*
* Interrupt handlers
*/
static irqreturn_t psc_dma_status_irq(int irq, void *_psc_dma)
{
struct psc_dma *psc_dma = _psc_dma;
struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
u16 isr;
isr = in_be16(®s->mpc52xx_psc_isr);
/* Playback underrun error */
if (psc_dma->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP))
psc_dma->stats.underrun_count++;
/* Capture overrun error */
if (psc_dma->capture.active && (isr & MPC52xx_PSC_IMR_ORERR))
psc_dma->stats.overrun_count++;
out_8(®s->command, MPC52xx_PSC_RST_ERR_STAT);
return IRQ_HANDLED;
}
/**
* psc_dma_bcom_enqueue_next_buffer - Enqueue another audio buffer
* @s: pointer to stream private data structure
*
* Enqueues another audio period buffer into the bestcomm queue.
*
* Note: The routine must only be called when there is space available in
* the queue. Otherwise the enqueue will fail and the audio ring buffer
* will get out of sync
*/
static void psc_dma_bcom_enqueue_next_buffer(struct psc_dma_stream *s)
{
struct bcom_bd *bd;
/* Prepare and enqueue the next buffer descriptor */
bd = bcom_prepare_next_buffer(s->bcom_task);
bd->status = s->period_bytes;
bd->data[0] = s->runtime->dma_addr + (s->period_next * s->period_bytes);
bcom_submit_next_buffer(s->bcom_task, NULL);
/* Update for next period */
s->period_next = (s->period_next + 1) % s->runtime->periods;
}
/* Bestcomm DMA irq handler */
static irqreturn_t psc_dma_bcom_irq(int irq, void *_psc_dma_stream)
{
struct psc_dma_stream *s = _psc_dma_stream;
spin_lock(&s->psc_dma->lock);
/* For each finished period, dequeue the completed period buffer
* and enqueue a new one in it's place. */
while (bcom_buffer_done(s->bcom_task)) {
bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
s->period_current = (s->period_current+1) % s->runtime->periods;
s->period_count++;
psc_dma_bcom_enqueue_next_buffer(s);
}
spin_unlock(&s->psc_dma->lock);
/* If the stream is active, then also inform the PCM middle layer
* of the period finished event. */
if (s->active)
snd_pcm_period_elapsed(s->stream);
return IRQ_HANDLED;
}
static int psc_dma_hw_free(struct snd_pcm_substream *substream)
{
snd_pcm_set_runtime_buffer(substream, NULL);
return 0;
}
/**
* psc_dma_trigger: start and stop the DMA transfer.
*
* This function is called by ALSA to start, stop, pause, and resume the DMA
* transfer of data.
*/
static int psc_dma_trigger(struct snd_pcm_substream *substream, int cmd)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai);
struct snd_pcm_runtime *runtime = substream->runtime;
struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
u16 imr;
unsigned long flags;
int i;
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
dev_dbg(psc_dma->dev, "START: stream=%i fbits=%u ps=%u #p=%u\n",
substream->pstr->stream, runtime->frame_bits,
(int)runtime->period_size, runtime->periods);
s->period_bytes = frames_to_bytes(runtime,
runtime->period_size);
s->period_next = 0;
s->period_current = 0;
s->active = 1;
s->period_count = 0;
s->runtime = runtime;
/* Fill up the bestcomm bd queue and enable DMA.
* This will begin filling the PSC's fifo.
*/
spin_lock_irqsave(&psc_dma->lock, flags);
if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
bcom_gen_bd_rx_reset(s->bcom_task);
else
bcom_gen_bd_tx_reset(s->bcom_task);
for (i = 0; i < runtime->periods; i++)
if (!bcom_queue_full(s->bcom_task))
psc_dma_bcom_enqueue_next_buffer(s);
bcom_enable(s->bcom_task);
spin_unlock_irqrestore(&psc_dma->lock, flags);
out_8(®s->command, MPC52xx_PSC_RST_ERR_STAT);
break;
case SNDRV_PCM_TRIGGER_STOP:
dev_dbg(psc_dma->dev, "STOP: stream=%i periods_count=%i\n",
substream->pstr->stream, s->period_count);
s->active = 0;
spin_lock_irqsave(&psc_dma->lock, flags);
bcom_disable(s->bcom_task);
if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
bcom_gen_bd_rx_reset(s->bcom_task);
else
bcom_gen_bd_tx_reset(s->bcom_task);
spin_unlock_irqrestore(&psc_dma->lock, flags);
break;
default:
dev_dbg(psc_dma->dev, "unhandled trigger: stream=%i cmd=%i\n",
substream->pstr->stream, cmd);
return -EINVAL;
}
/* Update interrupt enable settings */
imr = 0;
if (psc_dma->playback.active)
imr |= MPC52xx_PSC_IMR_TXEMP;
if (psc_dma->capture.active)
imr |= MPC52xx_PSC_IMR_ORERR;
out_be16(®s->isr_imr.imr, psc_dma->imr | imr);
return 0;
}
/* ---------------------------------------------------------------------
* The PSC DMA 'ASoC platform' driver
*
* Can be referenced by an 'ASoC machine' driver
* This driver only deals with the audio bus; it doesn't have any
* interaction with the attached codec
*/
static const struct snd_pcm_hardware psc_dma_hardware = {
.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_BATCH,
.formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |
SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE,
.rate_min = 8000,
.rate_max = 48000,
.channels_min = 1,
.channels_max = 2,
.period_bytes_max = 1024 * 1024,
.period_bytes_min = 32,
.periods_min = 2,
.periods_max = 256,
.buffer_bytes_max = 2 * 1024 * 1024,
.fifo_size = 512,
};
static int psc_dma_open(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai);
struct psc_dma_stream *s;
int rc;
dev_dbg(psc_dma->dev, "psc_dma_open(substream=%p)\n", substream);
if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
s = &psc_dma->capture;
else
s = &psc_dma->playback;
snd_soc_set_runtime_hwparams(substream, &psc_dma_hardware);
rc = snd_pcm_hw_constraint_integer(runtime,
SNDRV_PCM_HW_PARAM_PERIODS);
if (rc < 0) {
dev_err(substream->pcm->card->dev, "invalid buffer size\n");
return rc;
}
s->stream = substream;
return 0;
}
static int psc_dma_close(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai);
struct psc_dma_stream *s;
dev_dbg(psc_dma->dev, "psc_dma_close(substream=%p)\n", substream);
if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
s = &psc_dma->capture;
else
s = &psc_dma->playback;
if (!psc_dma->playback.active &&
!psc_dma->capture.active) {
/* Disable all interrupts and reset the PSC */
out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
out_8(&psc_dma->psc_regs->command, 4 << 4); /* reset error */
}
s->stream = NULL;
return 0;
}
static snd_pcm_uframes_t
psc_dma_pointer(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai);
struct psc_dma_stream *s;
dma_addr_t count;
if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
s = &psc_dma->capture;
else
s = &psc_dma->playback;
count = s->period_current * s->period_bytes;
return bytes_to_frames(substream->runtime, count);
}
static int
psc_dma_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
return 0;
}
static struct snd_pcm_ops psc_dma_ops = {
.open = psc_dma_open,
.close = psc_dma_close,
.hw_free = psc_dma_hw_free,
.ioctl = snd_pcm_lib_ioctl,
.pointer = psc_dma_pointer,
.trigger = psc_dma_trigger,
.hw_params = psc_dma_hw_params,
};
static u64 psc_dma_dmamask = DMA_BIT_MASK(32);
static int psc_dma_new(struct snd_soc_pcm_runtime *rtd)
{
struct snd_card *card = rtd->card->snd_card;
struct snd_soc_dai *dai = rtd->cpu_dai;
struct snd_pcm *pcm = rtd->pcm;
struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai);
size_t size = psc_dma_hardware.buffer_bytes_max;
int rc = 0;
dev_dbg(rtd->platform->dev, "psc_dma_new(card=%p, dai=%p, pcm=%p)\n",
card, dai, pcm);
if (!card->dev->dma_mask)
card->dev->dma_mask = &psc_dma_dmamask;
if (!card->dev->coherent_dma_mask)
card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
size, &pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->dma_buffer);
if (rc)
goto playback_alloc_err;
}
if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
size, &pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream->dma_buffer);
if (rc)
goto capture_alloc_err;
}
if (rtd->codec->ac97)
rtd->codec->ac97->private_data = psc_dma;
return 0;
capture_alloc_err:
if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream)
snd_dma_free_pages(&pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->dma_buffer);
playback_alloc_err:
dev_err(card->dev, "Cannot allocate buffer(s)\n");
return -ENOMEM;
}
static void psc_dma_free(struct snd_pcm *pcm)
{
struct snd_soc_pcm_runtime *rtd = pcm->private_data;
struct snd_pcm_substream *substream;
int stream;
dev_dbg(rtd->platform->dev, "psc_dma_free(pcm=%p)\n", pcm);
for (stream = 0; stream < 2; stream++) {
substream = pcm->streams[stream].substream;
if (substream) {
snd_dma_free_pages(&substream->dma_buffer);
substream->dma_buffer.area = NULL;
substream->dma_buffer.addr = 0;
}
}
}
static struct snd_soc_platform_driver mpc5200_audio_dma_platform = {
.ops = &psc_dma_ops,
.pcm_new = &psc_dma_new,
.pcm_free = &psc_dma_free,
};
static int mpc5200_hpcd_probe(struct platform_device *op)
{
phys_addr_t fifo;
struct psc_dma *psc_dma;
struct resource res;
int size, irq, rc;
const __be32 *prop;
void __iomem *regs;
int ret;
/* Fetch the registers and IRQ of the PSC */
irq = irq_of_parse_and_map(op->dev.of_node, 0);
if (of_address_to_resource(op->dev.of_node, 0, &res)) {
dev_err(&op->dev, "Missing reg property\n");
return -ENODEV;
}
regs = ioremap(res.start, resource_size(&res));
if (!regs) {
dev_err(&op->dev, "Could not map registers\n");
return -ENODEV;
}
/* Allocate and initialize the driver private data */
psc_dma = kzalloc(sizeof *psc_dma, GFP_KERNEL);
if (!psc_dma) {
ret = -ENOMEM;
goto out_unmap;
}
/* Get the PSC ID */
prop = of_get_property(op->dev.of_node, "cell-index", &size);
if (!prop || size < sizeof *prop) {
ret = -ENODEV;
goto out_free;
}
spin_lock_init(&psc_dma->lock);
mutex_init(&psc_dma->mutex);
psc_dma->id = be32_to_cpu(*prop);
psc_dma->irq = irq;
psc_dma->psc_regs = regs;
psc_dma->fifo_regs = regs + sizeof *psc_dma->psc_regs;
psc_dma->dev = &op->dev;
psc_dma->playback.psc_dma = psc_dma;
psc_dma->capture.psc_dma = psc_dma;
snprintf(psc_dma->name, sizeof psc_dma->name, "PSC%u", psc_dma->id);
/* Find the address of the fifo data registers and setup the
* DMA tasks */
fifo = res.start + offsetof(struct mpc52xx_psc, buffer.buffer_32);
psc_dma->capture.bcom_task =
bcom_psc_gen_bd_rx_init(psc_dma->id, 10, fifo, 512);
psc_dma->playback.bcom_task =
bcom_psc_gen_bd_tx_init(psc_dma->id, 10, fifo);
if (!psc_dma->capture.bcom_task ||
!psc_dma->playback.bcom_task) {
dev_err(&op->dev, "Could not allocate bestcomm tasks\n");
ret = -ENODEV;
goto out_free;
}
/* Disable all interrupts and reset the PSC */
out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
/* reset receiver */
out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_RX);
/* reset transmitter */
out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_TX);
/* reset error */
out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_ERR_STAT);
/* reset mode */
out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_SEL_MODE_REG_1);
/* Set up mode register;
* First write: RxRdy (FIFO Alarm) generates rx FIFO irq
* Second write: register Normal mode for non loopback
*/
out_8(&psc_dma->psc_regs->mode, 0);
out_8(&psc_dma->psc_regs->mode, 0);
/* Set the TX and RX fifo alarm thresholds */
out_be16(&psc_dma->fifo_regs->rfalarm, 0x100);
out_8(&psc_dma->fifo_regs->rfcntl, 0x4);
out_be16(&psc_dma->fifo_regs->tfalarm, 0x100);
out_8(&psc_dma->fifo_regs->tfcntl, 0x7);
/* Lookup the IRQ numbers */
psc_dma->playback.irq =
bcom_get_task_irq(psc_dma->playback.bcom_task);
psc_dma->capture.irq =
bcom_get_task_irq(psc_dma->capture.bcom_task);
rc = request_irq(psc_dma->irq, &psc_dma_status_irq, IRQF_SHARED,
"psc-dma-status", psc_dma);
rc |= request_irq(psc_dma->capture.irq, &psc_dma_bcom_irq, IRQF_SHARED,
"psc-dma-capture", &psc_dma->capture);
rc |= request_irq(psc_dma->playback.irq, &psc_dma_bcom_irq, IRQF_SHARED,
"psc-dma-playback", &psc_dma->playback);
if (rc) {
ret = -ENODEV;
goto out_irq;
}
/* Save what we've done so it can be found again later */
dev_set_drvdata(&op->dev, psc_dma);
/* Tell the ASoC OF helpers about it */
return snd_soc_register_platform(&op->dev, &mpc5200_audio_dma_platform);
out_irq:
free_irq(psc_dma->irq, psc_dma);
free_irq(psc_dma->capture.irq, &psc_dma->capture);
free_irq(psc_dma->playback.irq, &psc_dma->playback);
out_free:
kfree(psc_dma);
out_unmap:
iounmap(regs);
return ret;
}
static int mpc5200_hpcd_remove(struct platform_device *op)
{
struct psc_dma *psc_dma = dev_get_drvdata(&op->dev);
dev_dbg(&op->dev, "mpc5200_audio_dma_destroy()\n");
snd_soc_unregister_platform(&op->dev);
bcom_gen_bd_rx_release(psc_dma->capture.bcom_task);
bcom_gen_bd_tx_release(psc_dma->playback.bcom_task);
/* Release irqs */
free_irq(psc_dma->irq, psc_dma);
free_irq(psc_dma->capture.irq, &psc_dma->capture);
free_irq(psc_dma->playback.irq, &psc_dma->playback);
iounmap(psc_dma->psc_regs);
kfree(psc_dma);
dev_set_drvdata(&op->dev, NULL);
return 0;
}
static struct of_device_id mpc5200_hpcd_match[] = {
{ .compatible = "fsl,mpc5200-pcm", },
{}
};
MODULE_DEVICE_TABLE(of, mpc5200_hpcd_match);
static struct platform_driver mpc5200_hpcd_of_driver = {
.probe = mpc5200_hpcd_probe,
.remove = mpc5200_hpcd_remove,
.driver = {
.owner = THIS_MODULE,
.name = "mpc5200-pcm-audio",
.of_match_table = mpc5200_hpcd_match,
}
};
module_platform_driver(mpc5200_hpcd_of_driver);
MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
MODULE_DESCRIPTION("Freescale MPC5200 PSC in DMA mode ASoC Driver");
MODULE_LICENSE("GPL");
| gpl-2.0 |
chasmodo/android_kernel_oneplus_msm8974 | drivers/power/olpc_battery.c | 4946 | 15711 | /*
* Battery driver for One Laptop Per Child board.
*
* Copyright © 2006-2010 David Woodhouse <dwmw2@infradead.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/err.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/power_supply.h>
#include <linux/jiffies.h>
#include <linux/sched.h>
#include <asm/olpc.h>
#define EC_BAT_VOLTAGE 0x10 /* uint16_t, *9.76/32, mV */
#define EC_BAT_CURRENT 0x11 /* int16_t, *15.625/120, mA */
#define EC_BAT_ACR 0x12 /* int16_t, *6250/15, µAh */
#define EC_BAT_TEMP 0x13 /* uint16_t, *100/256, °C */
#define EC_AMB_TEMP 0x14 /* uint16_t, *100/256, °C */
#define EC_BAT_STATUS 0x15 /* uint8_t, bitmask */
#define EC_BAT_SOC 0x16 /* uint8_t, percentage */
#define EC_BAT_SERIAL 0x17 /* uint8_t[6] */
#define EC_BAT_EEPROM 0x18 /* uint8_t adr as input, uint8_t output */
#define EC_BAT_ERRCODE 0x1f /* uint8_t, bitmask */
#define BAT_STAT_PRESENT 0x01
#define BAT_STAT_FULL 0x02
#define BAT_STAT_LOW 0x04
#define BAT_STAT_DESTROY 0x08
#define BAT_STAT_AC 0x10
#define BAT_STAT_CHARGING 0x20
#define BAT_STAT_DISCHARGING 0x40
#define BAT_STAT_TRICKLE 0x80
#define BAT_ERR_INFOFAIL 0x02
#define BAT_ERR_OVERVOLTAGE 0x04
#define BAT_ERR_OVERTEMP 0x05
#define BAT_ERR_GAUGESTOP 0x06
#define BAT_ERR_OUT_OF_CONTROL 0x07
#define BAT_ERR_ID_FAIL 0x09
#define BAT_ERR_ACR_FAIL 0x10
#define BAT_ADDR_MFR_TYPE 0x5F
/*********************************************************************
* Power
*********************************************************************/
static int olpc_ac_get_prop(struct power_supply *psy,
enum power_supply_property psp,
union power_supply_propval *val)
{
int ret = 0;
uint8_t status;
switch (psp) {
case POWER_SUPPLY_PROP_ONLINE:
ret = olpc_ec_cmd(EC_BAT_STATUS, NULL, 0, &status, 1);
if (ret)
return ret;
val->intval = !!(status & BAT_STAT_AC);
break;
default:
ret = -EINVAL;
break;
}
return ret;
}
static enum power_supply_property olpc_ac_props[] = {
POWER_SUPPLY_PROP_ONLINE,
};
static struct power_supply olpc_ac = {
.name = "olpc-ac",
.type = POWER_SUPPLY_TYPE_MAINS,
.properties = olpc_ac_props,
.num_properties = ARRAY_SIZE(olpc_ac_props),
.get_property = olpc_ac_get_prop,
};
static char bat_serial[17]; /* Ick */
static int olpc_bat_get_status(union power_supply_propval *val, uint8_t ec_byte)
{
if (olpc_platform_info.ecver > 0x44) {
if (ec_byte & (BAT_STAT_CHARGING | BAT_STAT_TRICKLE))
val->intval = POWER_SUPPLY_STATUS_CHARGING;
else if (ec_byte & BAT_STAT_DISCHARGING)
val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
else if (ec_byte & BAT_STAT_FULL)
val->intval = POWER_SUPPLY_STATUS_FULL;
else /* er,... */
val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
} else {
/* Older EC didn't report charge/discharge bits */
if (!(ec_byte & BAT_STAT_AC)) /* No AC means discharging */
val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
else if (ec_byte & BAT_STAT_FULL)
val->intval = POWER_SUPPLY_STATUS_FULL;
else /* Not _necessarily_ true but EC doesn't tell all yet */
val->intval = POWER_SUPPLY_STATUS_CHARGING;
}
return 0;
}
static int olpc_bat_get_health(union power_supply_propval *val)
{
uint8_t ec_byte;
int ret;
ret = olpc_ec_cmd(EC_BAT_ERRCODE, NULL, 0, &ec_byte, 1);
if (ret)
return ret;
switch (ec_byte) {
case 0:
val->intval = POWER_SUPPLY_HEALTH_GOOD;
break;
case BAT_ERR_OVERTEMP:
val->intval = POWER_SUPPLY_HEALTH_OVERHEAT;
break;
case BAT_ERR_OVERVOLTAGE:
val->intval = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
break;
case BAT_ERR_INFOFAIL:
case BAT_ERR_OUT_OF_CONTROL:
case BAT_ERR_ID_FAIL:
case BAT_ERR_ACR_FAIL:
val->intval = POWER_SUPPLY_HEALTH_UNSPEC_FAILURE;
break;
default:
/* Eep. We don't know this failure code */
ret = -EIO;
}
return ret;
}
static int olpc_bat_get_mfr(union power_supply_propval *val)
{
uint8_t ec_byte;
int ret;
ec_byte = BAT_ADDR_MFR_TYPE;
ret = olpc_ec_cmd(EC_BAT_EEPROM, &ec_byte, 1, &ec_byte, 1);
if (ret)
return ret;
switch (ec_byte >> 4) {
case 1:
val->strval = "Gold Peak";
break;
case 2:
val->strval = "BYD";
break;
default:
val->strval = "Unknown";
break;
}
return ret;
}
static int olpc_bat_get_tech(union power_supply_propval *val)
{
uint8_t ec_byte;
int ret;
ec_byte = BAT_ADDR_MFR_TYPE;
ret = olpc_ec_cmd(EC_BAT_EEPROM, &ec_byte, 1, &ec_byte, 1);
if (ret)
return ret;
switch (ec_byte & 0xf) {
case 1:
val->intval = POWER_SUPPLY_TECHNOLOGY_NiMH;
break;
case 2:
val->intval = POWER_SUPPLY_TECHNOLOGY_LiFe;
break;
default:
val->intval = POWER_SUPPLY_TECHNOLOGY_UNKNOWN;
break;
}
return ret;
}
static int olpc_bat_get_charge_full_design(union power_supply_propval *val)
{
uint8_t ec_byte;
union power_supply_propval tech;
int ret, mfr;
ret = olpc_bat_get_tech(&tech);
if (ret)
return ret;
ec_byte = BAT_ADDR_MFR_TYPE;
ret = olpc_ec_cmd(EC_BAT_EEPROM, &ec_byte, 1, &ec_byte, 1);
if (ret)
return ret;
mfr = ec_byte >> 4;
switch (tech.intval) {
case POWER_SUPPLY_TECHNOLOGY_NiMH:
switch (mfr) {
case 1: /* Gold Peak */
val->intval = 3000000*.8;
break;
default:
return -EIO;
}
break;
case POWER_SUPPLY_TECHNOLOGY_LiFe:
switch (mfr) {
case 1: /* Gold Peak */
val->intval = 2800000;
break;
case 2: /* BYD */
val->intval = 3100000;
break;
default:
return -EIO;
}
break;
default:
return -EIO;
}
return ret;
}
static int olpc_bat_get_charge_now(union power_supply_propval *val)
{
uint8_t soc;
union power_supply_propval full;
int ret;
ret = olpc_ec_cmd(EC_BAT_SOC, NULL, 0, &soc, 1);
if (ret)
return ret;
ret = olpc_bat_get_charge_full_design(&full);
if (ret)
return ret;
val->intval = soc * (full.intval / 100);
return 0;
}
/*********************************************************************
* Battery properties
*********************************************************************/
static int olpc_bat_get_property(struct power_supply *psy,
enum power_supply_property psp,
union power_supply_propval *val)
{
int ret = 0;
__be16 ec_word;
uint8_t ec_byte;
__be64 ser_buf;
ret = olpc_ec_cmd(EC_BAT_STATUS, NULL, 0, &ec_byte, 1);
if (ret)
return ret;
/* Theoretically there's a race here -- the battery could be
removed immediately after we check whether it's present, and
then we query for some other property of the now-absent battery.
It doesn't matter though -- the EC will return the last-known
information, and it's as if we just ran that _little_ bit faster
and managed to read it out before the battery went away. */
if (!(ec_byte & (BAT_STAT_PRESENT | BAT_STAT_TRICKLE)) &&
psp != POWER_SUPPLY_PROP_PRESENT)
return -ENODEV;
switch (psp) {
case POWER_SUPPLY_PROP_STATUS:
ret = olpc_bat_get_status(val, ec_byte);
if (ret)
return ret;
break;
case POWER_SUPPLY_PROP_CHARGE_TYPE:
if (ec_byte & BAT_STAT_TRICKLE)
val->intval = POWER_SUPPLY_CHARGE_TYPE_TRICKLE;
else if (ec_byte & BAT_STAT_CHARGING)
val->intval = POWER_SUPPLY_CHARGE_TYPE_FAST;
else
val->intval = POWER_SUPPLY_CHARGE_TYPE_NONE;
break;
case POWER_SUPPLY_PROP_PRESENT:
val->intval = !!(ec_byte & (BAT_STAT_PRESENT |
BAT_STAT_TRICKLE));
break;
case POWER_SUPPLY_PROP_HEALTH:
if (ec_byte & BAT_STAT_DESTROY)
val->intval = POWER_SUPPLY_HEALTH_DEAD;
else {
ret = olpc_bat_get_health(val);
if (ret)
return ret;
}
break;
case POWER_SUPPLY_PROP_MANUFACTURER:
ret = olpc_bat_get_mfr(val);
if (ret)
return ret;
break;
case POWER_SUPPLY_PROP_TECHNOLOGY:
ret = olpc_bat_get_tech(val);
if (ret)
return ret;
break;
case POWER_SUPPLY_PROP_VOLTAGE_AVG:
case POWER_SUPPLY_PROP_VOLTAGE_NOW:
ret = olpc_ec_cmd(EC_BAT_VOLTAGE, NULL, 0, (void *)&ec_word, 2);
if (ret)
return ret;
val->intval = (s16)be16_to_cpu(ec_word) * 9760L / 32;
break;
case POWER_SUPPLY_PROP_CURRENT_AVG:
case POWER_SUPPLY_PROP_CURRENT_NOW:
ret = olpc_ec_cmd(EC_BAT_CURRENT, NULL, 0, (void *)&ec_word, 2);
if (ret)
return ret;
val->intval = (s16)be16_to_cpu(ec_word) * 15625L / 120;
break;
case POWER_SUPPLY_PROP_CAPACITY:
ret = olpc_ec_cmd(EC_BAT_SOC, NULL, 0, &ec_byte, 1);
if (ret)
return ret;
val->intval = ec_byte;
break;
case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
if (ec_byte & BAT_STAT_FULL)
val->intval = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
else if (ec_byte & BAT_STAT_LOW)
val->intval = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
else
val->intval = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
break;
case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
ret = olpc_bat_get_charge_full_design(val);
if (ret)
return ret;
break;
case POWER_SUPPLY_PROP_CHARGE_NOW:
ret = olpc_bat_get_charge_now(val);
if (ret)
return ret;
break;
case POWER_SUPPLY_PROP_TEMP:
ret = olpc_ec_cmd(EC_BAT_TEMP, NULL, 0, (void *)&ec_word, 2);
if (ret)
return ret;
val->intval = (s16)be16_to_cpu(ec_word) * 100 / 256;
break;
case POWER_SUPPLY_PROP_TEMP_AMBIENT:
ret = olpc_ec_cmd(EC_AMB_TEMP, NULL, 0, (void *)&ec_word, 2);
if (ret)
return ret;
val->intval = (int)be16_to_cpu(ec_word) * 100 / 256;
break;
case POWER_SUPPLY_PROP_CHARGE_COUNTER:
ret = olpc_ec_cmd(EC_BAT_ACR, NULL, 0, (void *)&ec_word, 2);
if (ret)
return ret;
val->intval = (s16)be16_to_cpu(ec_word) * 6250 / 15;
break;
case POWER_SUPPLY_PROP_SERIAL_NUMBER:
ret = olpc_ec_cmd(EC_BAT_SERIAL, NULL, 0, (void *)&ser_buf, 8);
if (ret)
return ret;
sprintf(bat_serial, "%016llx", (long long)be64_to_cpu(ser_buf));
val->strval = bat_serial;
break;
default:
ret = -EINVAL;
break;
}
return ret;
}
static enum power_supply_property olpc_xo1_bat_props[] = {
POWER_SUPPLY_PROP_STATUS,
POWER_SUPPLY_PROP_CHARGE_TYPE,
POWER_SUPPLY_PROP_PRESENT,
POWER_SUPPLY_PROP_HEALTH,
POWER_SUPPLY_PROP_TECHNOLOGY,
POWER_SUPPLY_PROP_VOLTAGE_AVG,
POWER_SUPPLY_PROP_VOLTAGE_NOW,
POWER_SUPPLY_PROP_CURRENT_AVG,
POWER_SUPPLY_PROP_CURRENT_NOW,
POWER_SUPPLY_PROP_CAPACITY,
POWER_SUPPLY_PROP_CAPACITY_LEVEL,
POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
POWER_SUPPLY_PROP_CHARGE_NOW,
POWER_SUPPLY_PROP_TEMP,
POWER_SUPPLY_PROP_TEMP_AMBIENT,
POWER_SUPPLY_PROP_MANUFACTURER,
POWER_SUPPLY_PROP_SERIAL_NUMBER,
POWER_SUPPLY_PROP_CHARGE_COUNTER,
};
/* XO-1.5 does not have ambient temperature property */
static enum power_supply_property olpc_xo15_bat_props[] = {
POWER_SUPPLY_PROP_STATUS,
POWER_SUPPLY_PROP_CHARGE_TYPE,
POWER_SUPPLY_PROP_PRESENT,
POWER_SUPPLY_PROP_HEALTH,
POWER_SUPPLY_PROP_TECHNOLOGY,
POWER_SUPPLY_PROP_VOLTAGE_AVG,
POWER_SUPPLY_PROP_VOLTAGE_NOW,
POWER_SUPPLY_PROP_CURRENT_AVG,
POWER_SUPPLY_PROP_CURRENT_NOW,
POWER_SUPPLY_PROP_CAPACITY,
POWER_SUPPLY_PROP_CAPACITY_LEVEL,
POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
POWER_SUPPLY_PROP_CHARGE_NOW,
POWER_SUPPLY_PROP_TEMP,
POWER_SUPPLY_PROP_MANUFACTURER,
POWER_SUPPLY_PROP_SERIAL_NUMBER,
POWER_SUPPLY_PROP_CHARGE_COUNTER,
};
/* EEPROM reading goes completely around the power_supply API, sadly */
#define EEPROM_START 0x20
#define EEPROM_END 0x80
#define EEPROM_SIZE (EEPROM_END - EEPROM_START)
static ssize_t olpc_bat_eeprom_read(struct file *filp, struct kobject *kobj,
struct bin_attribute *attr, char *buf, loff_t off, size_t count)
{
uint8_t ec_byte;
int ret;
int i;
if (off >= EEPROM_SIZE)
return 0;
if (off + count > EEPROM_SIZE)
count = EEPROM_SIZE - off;
for (i = 0; i < count; i++) {
ec_byte = EEPROM_START + off + i;
ret = olpc_ec_cmd(EC_BAT_EEPROM, &ec_byte, 1, &buf[i], 1);
if (ret) {
pr_err("olpc-battery: "
"EC_BAT_EEPROM cmd @ 0x%x failed - %d!\n",
ec_byte, ret);
return -EIO;
}
}
return count;
}
static struct bin_attribute olpc_bat_eeprom = {
.attr = {
.name = "eeprom",
.mode = S_IRUGO,
},
.size = 0,
.read = olpc_bat_eeprom_read,
};
/* Allow userspace to see the specific error value pulled from the EC */
static ssize_t olpc_bat_error_read(struct device *dev,
struct device_attribute *attr, char *buf)
{
uint8_t ec_byte;
ssize_t ret;
ret = olpc_ec_cmd(EC_BAT_ERRCODE, NULL, 0, &ec_byte, 1);
if (ret < 0)
return ret;
return sprintf(buf, "%d\n", ec_byte);
}
static struct device_attribute olpc_bat_error = {
.attr = {
.name = "error",
.mode = S_IRUGO,
},
.show = olpc_bat_error_read,
};
/*********************************************************************
* Initialisation
*********************************************************************/
static struct power_supply olpc_bat = {
.name = "olpc-battery",
.get_property = olpc_bat_get_property,
.use_for_apm = 1,
};
static int olpc_battery_suspend(struct platform_device *pdev,
pm_message_t state)
{
if (device_may_wakeup(olpc_ac.dev))
olpc_ec_wakeup_set(EC_SCI_SRC_ACPWR);
else
olpc_ec_wakeup_clear(EC_SCI_SRC_ACPWR);
if (device_may_wakeup(olpc_bat.dev))
olpc_ec_wakeup_set(EC_SCI_SRC_BATTERY | EC_SCI_SRC_BATSOC
| EC_SCI_SRC_BATERR);
else
olpc_ec_wakeup_clear(EC_SCI_SRC_BATTERY | EC_SCI_SRC_BATSOC
| EC_SCI_SRC_BATERR);
return 0;
}
static int __devinit olpc_battery_probe(struct platform_device *pdev)
{
int ret;
uint8_t status;
/*
* We've seen a number of EC protocol changes; this driver requires
* the latest EC protocol, supported by 0x44 and above.
*/
if (olpc_platform_info.ecver < 0x44) {
printk(KERN_NOTICE "OLPC EC version 0x%02x too old for "
"battery driver.\n", olpc_platform_info.ecver);
return -ENXIO;
}
ret = olpc_ec_cmd(EC_BAT_STATUS, NULL, 0, &status, 1);
if (ret)
return ret;
/* Ignore the status. It doesn't actually matter */
ret = power_supply_register(&pdev->dev, &olpc_ac);
if (ret)
return ret;
if (olpc_board_at_least(olpc_board_pre(0xd0))) { /* XO-1.5 */
olpc_bat.properties = olpc_xo15_bat_props;
olpc_bat.num_properties = ARRAY_SIZE(olpc_xo15_bat_props);
} else { /* XO-1 */
olpc_bat.properties = olpc_xo1_bat_props;
olpc_bat.num_properties = ARRAY_SIZE(olpc_xo1_bat_props);
}
ret = power_supply_register(&pdev->dev, &olpc_bat);
if (ret)
goto battery_failed;
ret = device_create_bin_file(olpc_bat.dev, &olpc_bat_eeprom);
if (ret)
goto eeprom_failed;
ret = device_create_file(olpc_bat.dev, &olpc_bat_error);
if (ret)
goto error_failed;
if (olpc_ec_wakeup_available()) {
device_set_wakeup_capable(olpc_ac.dev, true);
device_set_wakeup_capable(olpc_bat.dev, true);
}
return 0;
error_failed:
device_remove_bin_file(olpc_bat.dev, &olpc_bat_eeprom);
eeprom_failed:
power_supply_unregister(&olpc_bat);
battery_failed:
power_supply_unregister(&olpc_ac);
return ret;
}
static int __devexit olpc_battery_remove(struct platform_device *pdev)
{
device_remove_file(olpc_bat.dev, &olpc_bat_error);
device_remove_bin_file(olpc_bat.dev, &olpc_bat_eeprom);
power_supply_unregister(&olpc_bat);
power_supply_unregister(&olpc_ac);
return 0;
}
static const struct of_device_id olpc_battery_ids[] __devinitconst = {
{ .compatible = "olpc,xo1-battery" },
{}
};
MODULE_DEVICE_TABLE(of, olpc_battery_ids);
static struct platform_driver olpc_battery_driver = {
.driver = {
.name = "olpc-battery",
.owner = THIS_MODULE,
.of_match_table = olpc_battery_ids,
},
.probe = olpc_battery_probe,
.remove = __devexit_p(olpc_battery_remove),
.suspend = olpc_battery_suspend,
};
module_platform_driver(olpc_battery_driver);
MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Battery driver for One Laptop Per Child 'XO' machine");
| gpl-2.0 |
Alex131089/raspberrypi-linux-3.6 | drivers/staging/ft1000/ft1000-pcmcia/ft1000_dnld.c | 5202 | 20460 | /*---------------------------------------------------------------------------
FT1000 driver for Flarion Flash OFDM NIC Device
Copyright (C) 2002 Flarion Technologies, All rights reserved.
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
Software Foundation; either version 2 of the License, or (at your option) any
later version. This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License along with this program; if not, write to the
Free Software Foundation, Inc., 59 Temple Place -
Suite 330, Boston, MA 02111-1307, USA.
--------------------------------------------------------------------------
Description: This module will handshake with the DSP bootloader to
download the DSP runtime image.
---------------------------------------------------------------------------*/
#define __KERNEL_SYSCALLS__
#include <linux/module.h>
#include <linux/fs.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/unistd.h>
#include <linux/netdevice.h>
#include <linux/timer.h>
#include <linux/delay.h>
#include <asm/io.h>
#include <asm/uaccess.h>
#include <linux/vmalloc.h>
#include "ft1000.h"
#include "boot.h"
#ifdef FT_DEBUG
#define DEBUG(n, args...) printk(KERN_DEBUG args);
#else
#define DEBUG(n, args...)
#endif
#define MAX_DSP_WAIT_LOOPS 100
#define DSP_WAIT_SLEEP_TIME 1 /* 1 millisecond */
#define MAX_LENGTH 0x7f0
#define DWNLD_MAG_HANDSHAKE_LOC 0x00
#define DWNLD_MAG_TYPE_LOC 0x01
#define DWNLD_MAG_SIZE_LOC 0x02
#define DWNLD_MAG_PS_HDR_LOC 0x03
#define DWNLD_HANDSHAKE_LOC 0x02
#define DWNLD_TYPE_LOC 0x04
#define DWNLD_SIZE_MSW_LOC 0x06
#define DWNLD_SIZE_LSW_LOC 0x08
#define DWNLD_PS_HDR_LOC 0x0A
#define HANDSHAKE_TIMEOUT_VALUE 0xF1F1
#define HANDSHAKE_RESET_VALUE 0xFEFE /* When DSP requests startover */
#define HANDSHAKE_DSP_BL_READY 0xFEFE /* At start DSP writes this when bootloader ready */
#define HANDSHAKE_DRIVER_READY 0xFFFF /* Driver writes after receiving 0xFEFE */
#define HANDSHAKE_SEND_DATA 0x0000 /* DSP writes this when ready for more data */
#define HANDSHAKE_REQUEST 0x0001 /* Request from DSP */
#define HANDSHAKE_RESPONSE 0x0000 /* Satisfied DSP request */
#define REQUEST_CODE_LENGTH 0x0000
#define REQUEST_RUN_ADDRESS 0x0001
#define REQUEST_CODE_SEGMENT 0x0002 /* In WORD count */
#define REQUEST_DONE_BL 0x0003
#define REQUEST_DONE_CL 0x0004
#define REQUEST_VERSION_INFO 0x0005
#define REQUEST_CODE_BY_VERSION 0x0006
#define REQUEST_MAILBOX_DATA 0x0007
#define REQUEST_FILE_CHECKSUM 0x0008
#define STATE_START_DWNLD 0x01
#define STATE_BOOT_DWNLD 0x02
#define STATE_CODE_DWNLD 0x03
#define STATE_DONE_DWNLD 0x04
#define STATE_SECTION_PROV 0x05
#define STATE_DONE_PROV 0x06
#define STATE_DONE_FILE 0x07
u16 get_handshake(struct net_device *dev, u16 expected_value);
void put_handshake(struct net_device *dev, u16 handshake_value);
u16 get_request_type(struct net_device *dev);
long get_request_value(struct net_device *dev);
void put_request_value(struct net_device *dev, long lvalue);
u16 hdr_checksum(struct pseudo_hdr *pHdr);
struct dsp_file_hdr {
u32 version_id; // Version ID of this image format.
u32 package_id; // Package ID of code release.
u32 build_date; // Date/time stamp when file was built.
u32 commands_offset; // Offset to attached commands in Pseudo Hdr format.
u32 loader_offset; // Offset to bootloader code.
u32 loader_code_address; // Start address of bootloader.
u32 loader_code_end; // Where bootloader code ends.
u32 loader_code_size;
u32 version_data_offset; // Offset were scrambled version data begins.
u32 version_data_size; // Size, in words, of scrambled version data.
u32 nDspImages; // Number of DSP images in file.
} __attribute__ ((packed));
struct dsp_image_info {
u32 coff_date; // Date/time when DSP Coff image was built.
u32 begin_offset; // Offset in file where image begins.
u32 end_offset; // Offset in file where image begins.
u32 run_address; // On chip Start address of DSP code.
u32 image_size; // Size of image.
u32 version; // Embedded version # of DSP code.
unsigned short checksum; // Dsp File checksum
unsigned short pad1;
} __attribute__ ((packed));
void card_bootload(struct net_device *dev)
{
struct ft1000_info *info = (struct ft1000_info *) netdev_priv(dev);
unsigned long flags;
u32 *pdata;
u32 size;
u32 i;
u32 templong;
DEBUG(0, "card_bootload is called\n");
pdata = (u32 *) bootimage;
size = sizeof(bootimage);
// check for odd word
if (size & 0x0003) {
size += 4;
}
// Provide mutual exclusive access while reading ASIC registers.
spin_lock_irqsave(&info->dpram_lock, flags);
// need to set i/o base address initially and hardware will autoincrement
ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR, FT1000_DPRAM_BASE);
// write bytes
for (i = 0; i < (size >> 2); i++) {
templong = *pdata++;
outl(templong, dev->base_addr + FT1000_REG_MAG_DPDATA);
}
spin_unlock_irqrestore(&info->dpram_lock, flags);
}
u16 get_handshake(struct net_device *dev, u16 expected_value)
{
struct ft1000_info *info = (struct ft1000_info *) netdev_priv(dev);
u16 handshake;
u32 tempx;
int loopcnt;
loopcnt = 0;
while (loopcnt < MAX_DSP_WAIT_LOOPS) {
if (info->AsicID == ELECTRABUZZ_ID) {
ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR,
DWNLD_HANDSHAKE_LOC);
handshake = ft1000_read_reg(dev, FT1000_REG_DPRAM_DATA);
} else {
tempx =
ntohl(ft1000_read_dpram_mag_32
(dev, DWNLD_MAG_HANDSHAKE_LOC));
handshake = (u16) tempx;
}
if ((handshake == expected_value)
|| (handshake == HANDSHAKE_RESET_VALUE)) {
return handshake;
} else {
loopcnt++;
mdelay(DSP_WAIT_SLEEP_TIME);
}
}
return HANDSHAKE_TIMEOUT_VALUE;
}
void put_handshake(struct net_device *dev, u16 handshake_value)
{
struct ft1000_info *info = (struct ft1000_info *) netdev_priv(dev);
u32 tempx;
if (info->AsicID == ELECTRABUZZ_ID) {
ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR,
DWNLD_HANDSHAKE_LOC);
ft1000_write_reg(dev, FT1000_REG_DPRAM_DATA, handshake_value); /* Handshake */
} else {
tempx = (u32) handshake_value;
tempx = ntohl(tempx);
ft1000_write_dpram_mag_32(dev, DWNLD_MAG_HANDSHAKE_LOC, tempx); /* Handshake */
}
}
u16 get_request_type(struct net_device *dev)
{
struct ft1000_info *info = (struct ft1000_info *) netdev_priv(dev);
u16 request_type;
u32 tempx;
if (info->AsicID == ELECTRABUZZ_ID) {
ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR, DWNLD_TYPE_LOC);
request_type = ft1000_read_reg(dev, FT1000_REG_DPRAM_DATA);
} else {
tempx = ft1000_read_dpram_mag_32(dev, DWNLD_MAG_TYPE_LOC);
tempx = ntohl(tempx);
request_type = (u16) tempx;
}
return request_type;
}
long get_request_value(struct net_device *dev)
{
struct ft1000_info *info = (struct ft1000_info *) netdev_priv(dev);
long value;
u16 w_val;
if (info->AsicID == ELECTRABUZZ_ID) {
ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR,
DWNLD_SIZE_MSW_LOC);
w_val = ft1000_read_reg(dev, FT1000_REG_DPRAM_DATA);
value = (long)(w_val << 16);
ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR,
DWNLD_SIZE_LSW_LOC);
w_val = ft1000_read_reg(dev, FT1000_REG_DPRAM_DATA);
value = (long)(value | w_val);
} else {
value = ft1000_read_dpram_mag_32(dev, DWNLD_MAG_SIZE_LOC);
value = ntohl(value);
}
return value;
}
void put_request_value(struct net_device *dev, long lvalue)
{
struct ft1000_info *info = (struct ft1000_info *) netdev_priv(dev);
u16 size;
u32 tempx;
if (info->AsicID == ELECTRABUZZ_ID) {
size = (u16) (lvalue >> 16);
ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR,
DWNLD_SIZE_MSW_LOC);
ft1000_write_reg(dev, FT1000_REG_DPRAM_DATA, size);
size = (u16) (lvalue);
ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR,
DWNLD_SIZE_LSW_LOC);
ft1000_write_reg(dev, FT1000_REG_DPRAM_DATA, size);
} else {
tempx = ntohl(lvalue);
ft1000_write_dpram_mag_32(dev, DWNLD_MAG_SIZE_LOC, tempx); /* Handshake */
}
}
u16 hdr_checksum(struct pseudo_hdr *pHdr)
{
u16 *usPtr = (u16 *) pHdr;
u16 chksum;
chksum = ((((((usPtr[0] ^ usPtr[1]) ^ usPtr[2]) ^ usPtr[3]) ^
usPtr[4]) ^ usPtr[5]) ^ usPtr[6]);
return chksum;
}
int card_download(struct net_device *dev, const u8 *pFileStart,
size_t FileLength)
{
struct ft1000_info *info = (struct ft1000_info *) netdev_priv(dev);
int Status = SUCCESS;
u32 uiState;
u16 handshake;
struct pseudo_hdr *pHdr;
u16 usHdrLength;
long word_length;
u16 request;
u16 temp;
struct prov_record *pprov_record;
u8 *pbuffer;
struct dsp_file_hdr *pFileHdr5;
struct dsp_image_info *pDspImageInfoV6 = NULL;
long requested_version;
bool bGoodVersion = 0;
struct drv_msg *pMailBoxData;
u16 *pUsData = NULL;
u16 *pUsFile = NULL;
u8 *pUcFile = NULL;
u8 *pBootEnd = NULL;
u8 *pCodeEnd = NULL;
int imageN;
long file_version;
long loader_code_address = 0;
long loader_code_size = 0;
long run_address = 0;
long run_size = 0;
unsigned long flags;
unsigned long templong;
unsigned long image_chksum = 0;
file_version = *(long *)pFileStart;
if (file_version != 6) {
printk(KERN_ERR "ft1000: unsupported firmware version %ld\n", file_version);
Status = FAILURE;
}
uiState = STATE_START_DWNLD;
pFileHdr5 = (struct dsp_file_hdr *) pFileStart;
pUsFile = (u16 *) ((long)pFileStart + pFileHdr5->loader_offset);
pUcFile = (u8 *) ((long)pFileStart + pFileHdr5->loader_offset);
pBootEnd = (u8 *) ((long)pFileStart + pFileHdr5->loader_code_end);
loader_code_address = pFileHdr5->loader_code_address;
loader_code_size = pFileHdr5->loader_code_size;
bGoodVersion = false;
while ((Status == SUCCESS) && (uiState != STATE_DONE_FILE)) {
switch (uiState) {
case STATE_START_DWNLD:
handshake = get_handshake(dev, HANDSHAKE_DSP_BL_READY);
if (handshake == HANDSHAKE_DSP_BL_READY) {
put_handshake(dev, HANDSHAKE_DRIVER_READY);
} else {
Status = FAILURE;
}
uiState = STATE_BOOT_DWNLD;
break;
case STATE_BOOT_DWNLD:
handshake = get_handshake(dev, HANDSHAKE_REQUEST);
if (handshake == HANDSHAKE_REQUEST) {
/*
* Get type associated with the request.
*/
request = get_request_type(dev);
switch (request) {
case REQUEST_RUN_ADDRESS:
put_request_value(dev,
loader_code_address);
break;
case REQUEST_CODE_LENGTH:
put_request_value(dev,
loader_code_size);
break;
case REQUEST_DONE_BL:
/* Reposition ptrs to beginning of code section */
pUsFile = (u16 *) ((long)pBootEnd);
pUcFile = (u8 *) ((long)pBootEnd);
uiState = STATE_CODE_DWNLD;
break;
case REQUEST_CODE_SEGMENT:
word_length = get_request_value(dev);
if (word_length > MAX_LENGTH) {
Status = FAILURE;
break;
}
if ((word_length * 2 + (long)pUcFile) >
(long)pBootEnd) {
/*
* Error, beyond boot code range.
*/
Status = FAILURE;
break;
}
// Provide mutual exclusive access while reading ASIC registers.
spin_lock_irqsave(&info->dpram_lock,
flags);
/*
* Position ASIC DPRAM auto-increment pointer.
*/
outw(DWNLD_MAG_PS_HDR_LOC,
dev->base_addr +
FT1000_REG_DPRAM_ADDR);
if (word_length & 0x01)
word_length++;
word_length = word_length / 2;
for (; word_length > 0; word_length--) { /* In words */
templong = *pUsFile++;
templong |=
(*pUsFile++ << 16);
pUcFile += 4;
outl(templong,
dev->base_addr +
FT1000_REG_MAG_DPDATAL);
}
spin_unlock_irqrestore(&info->
dpram_lock,
flags);
break;
default:
Status = FAILURE;
break;
}
put_handshake(dev, HANDSHAKE_RESPONSE);
} else {
Status = FAILURE;
}
break;
case STATE_CODE_DWNLD:
handshake = get_handshake(dev, HANDSHAKE_REQUEST);
if (handshake == HANDSHAKE_REQUEST) {
/*
* Get type associated with the request.
*/
request = get_request_type(dev);
switch (request) {
case REQUEST_FILE_CHECKSUM:
DEBUG(0,
"ft1000_dnld: REQUEST_FOR_CHECKSUM\n");
put_request_value(dev, image_chksum);
break;
case REQUEST_RUN_ADDRESS:
if (bGoodVersion) {
put_request_value(dev,
run_address);
} else {
Status = FAILURE;
break;
}
break;
case REQUEST_CODE_LENGTH:
if (bGoodVersion) {
put_request_value(dev,
run_size);
} else {
Status = FAILURE;
break;
}
break;
case REQUEST_DONE_CL:
/* Reposition ptrs to beginning of provisioning section */
pUsFile = (u16 *) ((long)pFileStart + pFileHdr5->commands_offset);
pUcFile = (u8 *) ((long)pFileStart + pFileHdr5->commands_offset);
uiState = STATE_DONE_DWNLD;
break;
case REQUEST_CODE_SEGMENT:
if (!bGoodVersion) {
Status = FAILURE;
break;
}
word_length = get_request_value(dev);
if (word_length > MAX_LENGTH) {
Status = FAILURE;
break;
}
if ((word_length * 2 + (long)pUcFile) >
(long)pCodeEnd) {
/*
* Error, beyond boot code range.
*/
Status = FAILURE;
break;
}
/*
* Position ASIC DPRAM auto-increment pointer.
*/
outw(DWNLD_MAG_PS_HDR_LOC,
dev->base_addr +
FT1000_REG_DPRAM_ADDR);
if (word_length & 0x01)
word_length++;
word_length = word_length / 2;
for (; word_length > 0; word_length--) { /* In words */
templong = *pUsFile++;
templong |=
(*pUsFile++ << 16);
pUcFile += 4;
outl(templong,
dev->base_addr +
FT1000_REG_MAG_DPDATAL);
}
break;
case REQUEST_MAILBOX_DATA:
// Convert length from byte count to word count. Make sure we round up.
word_length =
(long)(info->DSPInfoBlklen + 1) / 2;
put_request_value(dev, word_length);
pMailBoxData =
(struct drv_msg *) & info->DSPInfoBlk[0];
pUsData =
(u16 *) & pMailBoxData->data[0];
// Provide mutual exclusive access while reading ASIC registers.
spin_lock_irqsave(&info->dpram_lock,
flags);
if (file_version == 5) {
/*
* Position ASIC DPRAM auto-increment pointer.
*/
ft1000_write_reg(dev,
FT1000_REG_DPRAM_ADDR,
DWNLD_PS_HDR_LOC);
for (; word_length > 0; word_length--) { /* In words */
temp = ntohs(*pUsData);
ft1000_write_reg(dev,
FT1000_REG_DPRAM_DATA,
temp);
pUsData++;
}
} else {
/*
* Position ASIC DPRAM auto-increment pointer.
*/
outw(DWNLD_MAG_PS_HDR_LOC,
dev->base_addr +
FT1000_REG_DPRAM_ADDR);
if (word_length & 0x01) {
word_length++;
}
word_length = word_length / 2;
for (; word_length > 0; word_length--) { /* In words */
templong = *pUsData++;
templong |=
(*pUsData++ << 16);
outl(templong,
dev->base_addr +
FT1000_REG_MAG_DPDATAL);
}
}
spin_unlock_irqrestore(&info->
dpram_lock,
flags);
break;
case REQUEST_VERSION_INFO:
word_length =
pFileHdr5->version_data_size;
put_request_value(dev, word_length);
pUsFile =
(u16 *) ((long)pFileStart +
pFileHdr5->
version_data_offset);
// Provide mutual exclusive access while reading ASIC registers.
spin_lock_irqsave(&info->dpram_lock,
flags);
/*
* Position ASIC DPRAM auto-increment pointer.
*/
outw(DWNLD_MAG_PS_HDR_LOC,
dev->base_addr +
FT1000_REG_DPRAM_ADDR);
if (word_length & 0x01)
word_length++;
word_length = word_length / 2;
for (; word_length > 0; word_length--) { /* In words */
templong =
ntohs(*pUsFile++);
temp =
ntohs(*pUsFile++);
templong |=
(temp << 16);
outl(templong,
dev->base_addr +
FT1000_REG_MAG_DPDATAL);
}
spin_unlock_irqrestore(&info->
dpram_lock,
flags);
break;
case REQUEST_CODE_BY_VERSION:
bGoodVersion = false;
requested_version =
get_request_value(dev);
pDspImageInfoV6 =
(struct dsp_image_info *) ((long)
pFileStart
+
sizeof
(struct dsp_file_hdr));
for (imageN = 0;
imageN <
pFileHdr5->nDspImages;
imageN++) {
temp = (u16)
(pDspImageInfoV6->
version);
templong = temp;
temp = (u16)
(pDspImageInfoV6->
version >> 16);
templong |=
(temp << 16);
if (templong ==
requested_version) {
bGoodVersion =
true;
pUsFile =
(u16
*) ((long)
pFileStart
+
pDspImageInfoV6->
begin_offset);
pUcFile =
(u8
*) ((long)
pFileStart
+
pDspImageInfoV6->
begin_offset);
pCodeEnd =
(u8
*) ((long)
pFileStart
+
pDspImageInfoV6->
end_offset);
run_address =
pDspImageInfoV6->
run_address;
run_size =
pDspImageInfoV6->
image_size;
image_chksum =
(u32)
pDspImageInfoV6->
checksum;
DEBUG(0,
"ft1000_dnld: image_chksum = 0x%8x\n",
(unsigned
int)
image_chksum);
break;
}
pDspImageInfoV6++;
}
if (!bGoodVersion) {
/*
* Error, beyond boot code range.
*/
Status = FAILURE;
break;
}
break;
default:
Status = FAILURE;
break;
}
put_handshake(dev, HANDSHAKE_RESPONSE);
} else {
Status = FAILURE;
}
break;
case STATE_DONE_DWNLD:
if (((unsigned long) (pUcFile) - (unsigned long) pFileStart) >=
(unsigned long) FileLength) {
uiState = STATE_DONE_FILE;
break;
}
pHdr = (struct pseudo_hdr *) pUsFile;
if (pHdr->portdest == 0x80 /* DspOAM */
&& (pHdr->portsrc == 0x00 /* Driver */
|| pHdr->portsrc == 0x10 /* FMM */ )) {
uiState = STATE_SECTION_PROV;
} else {
DEBUG(1,
"FT1000:download:Download error: Bad Port IDs in Pseudo Record\n");
DEBUG(1, "\t Port Source = 0x%2.2x\n",
pHdr->portsrc);
DEBUG(1, "\t Port Destination = 0x%2.2x\n",
pHdr->portdest);
Status = FAILURE;
}
break;
case STATE_SECTION_PROV:
pHdr = (struct pseudo_hdr *) pUcFile;
if (pHdr->checksum == hdr_checksum(pHdr)) {
if (pHdr->portdest != 0x80 /* Dsp OAM */ ) {
uiState = STATE_DONE_PROV;
break;
}
usHdrLength = ntohs(pHdr->length); /* Byte length for PROV records */
// Get buffer for provisioning data
pbuffer =
kmalloc((usHdrLength + sizeof(struct pseudo_hdr)),
GFP_ATOMIC);
if (pbuffer) {
memcpy(pbuffer, (void *)pUcFile,
(u32) (usHdrLength +
sizeof(struct pseudo_hdr)));
// link provisioning data
pprov_record =
kmalloc(sizeof(struct prov_record),
GFP_ATOMIC);
if (pprov_record) {
pprov_record->pprov_data =
pbuffer;
list_add_tail(&pprov_record->
list,
&info->prov_list);
// Move to next entry if available
pUcFile =
(u8 *) ((unsigned long) pUcFile +
(unsigned long) ((usHdrLength + 1) & 0xFFFFFFFE) + sizeof(struct pseudo_hdr));
if ((unsigned long) (pUcFile) -
(unsigned long) (pFileStart) >=
(unsigned long) FileLength) {
uiState =
STATE_DONE_FILE;
}
} else {
kfree(pbuffer);
Status = FAILURE;
}
} else {
Status = FAILURE;
}
} else {
/* Checksum did not compute */
Status = FAILURE;
}
break;
case STATE_DONE_PROV:
uiState = STATE_DONE_FILE;
break;
default:
Status = FAILURE;
break;
} /* End Switch */
} /* End while */
return Status;
}
| gpl-2.0 |
penreturns/AK-OnePone | net/sched/act_nat.c | 5458 | 7395 | /*
* Stateless NAT actions
*
* Copyright (c) 2007 Herbert Xu <herbert@gondor.apana.org.au>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 2 of the License, or (at your option)
* any later version.
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/netfilter.h>
#include <linux/rtnetlink.h>
#include <linux/skbuff.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/string.h>
#include <linux/tc_act/tc_nat.h>
#include <net/act_api.h>
#include <net/icmp.h>
#include <net/ip.h>
#include <net/netlink.h>
#include <net/tc_act/tc_nat.h>
#include <net/tcp.h>
#include <net/udp.h>
#define NAT_TAB_MASK 15
static struct tcf_common *tcf_nat_ht[NAT_TAB_MASK + 1];
static u32 nat_idx_gen;
static DEFINE_RWLOCK(nat_lock);
static struct tcf_hashinfo nat_hash_info = {
.htab = tcf_nat_ht,
.hmask = NAT_TAB_MASK,
.lock = &nat_lock,
};
static const struct nla_policy nat_policy[TCA_NAT_MAX + 1] = {
[TCA_NAT_PARMS] = { .len = sizeof(struct tc_nat) },
};
static int tcf_nat_init(struct nlattr *nla, struct nlattr *est,
struct tc_action *a, int ovr, int bind)
{
struct nlattr *tb[TCA_NAT_MAX + 1];
struct tc_nat *parm;
int ret = 0, err;
struct tcf_nat *p;
struct tcf_common *pc;
if (nla == NULL)
return -EINVAL;
err = nla_parse_nested(tb, TCA_NAT_MAX, nla, nat_policy);
if (err < 0)
return err;
if (tb[TCA_NAT_PARMS] == NULL)
return -EINVAL;
parm = nla_data(tb[TCA_NAT_PARMS]);
pc = tcf_hash_check(parm->index, a, bind, &nat_hash_info);
if (!pc) {
pc = tcf_hash_create(parm->index, est, a, sizeof(*p), bind,
&nat_idx_gen, &nat_hash_info);
if (IS_ERR(pc))
return PTR_ERR(pc);
p = to_tcf_nat(pc);
ret = ACT_P_CREATED;
} else {
p = to_tcf_nat(pc);
if (!ovr) {
tcf_hash_release(pc, bind, &nat_hash_info);
return -EEXIST;
}
}
spin_lock_bh(&p->tcf_lock);
p->old_addr = parm->old_addr;
p->new_addr = parm->new_addr;
p->mask = parm->mask;
p->flags = parm->flags;
p->tcf_action = parm->action;
spin_unlock_bh(&p->tcf_lock);
if (ret == ACT_P_CREATED)
tcf_hash_insert(pc, &nat_hash_info);
return ret;
}
static int tcf_nat_cleanup(struct tc_action *a, int bind)
{
struct tcf_nat *p = a->priv;
return tcf_hash_release(&p->common, bind, &nat_hash_info);
}
static int tcf_nat(struct sk_buff *skb, const struct tc_action *a,
struct tcf_result *res)
{
struct tcf_nat *p = a->priv;
struct iphdr *iph;
__be32 old_addr;
__be32 new_addr;
__be32 mask;
__be32 addr;
int egress;
int action;
int ihl;
int noff;
spin_lock(&p->tcf_lock);
p->tcf_tm.lastuse = jiffies;
old_addr = p->old_addr;
new_addr = p->new_addr;
mask = p->mask;
egress = p->flags & TCA_NAT_FLAG_EGRESS;
action = p->tcf_action;
bstats_update(&p->tcf_bstats, skb);
spin_unlock(&p->tcf_lock);
if (unlikely(action == TC_ACT_SHOT))
goto drop;
noff = skb_network_offset(skb);
if (!pskb_may_pull(skb, sizeof(*iph) + noff))
goto drop;
iph = ip_hdr(skb);
if (egress)
addr = iph->saddr;
else
addr = iph->daddr;
if (!((old_addr ^ addr) & mask)) {
if (skb_cloned(skb) &&
!skb_clone_writable(skb, sizeof(*iph) + noff) &&
pskb_expand_head(skb, 0, 0, GFP_ATOMIC))
goto drop;
new_addr &= mask;
new_addr |= addr & ~mask;
/* Rewrite IP header */
iph = ip_hdr(skb);
if (egress)
iph->saddr = new_addr;
else
iph->daddr = new_addr;
csum_replace4(&iph->check, addr, new_addr);
} else if ((iph->frag_off & htons(IP_OFFSET)) ||
iph->protocol != IPPROTO_ICMP) {
goto out;
}
ihl = iph->ihl * 4;
/* It would be nice to share code with stateful NAT. */
switch (iph->frag_off & htons(IP_OFFSET) ? 0 : iph->protocol) {
case IPPROTO_TCP:
{
struct tcphdr *tcph;
if (!pskb_may_pull(skb, ihl + sizeof(*tcph) + noff) ||
(skb_cloned(skb) &&
!skb_clone_writable(skb, ihl + sizeof(*tcph) + noff) &&
pskb_expand_head(skb, 0, 0, GFP_ATOMIC)))
goto drop;
tcph = (void *)(skb_network_header(skb) + ihl);
inet_proto_csum_replace4(&tcph->check, skb, addr, new_addr, 1);
break;
}
case IPPROTO_UDP:
{
struct udphdr *udph;
if (!pskb_may_pull(skb, ihl + sizeof(*udph) + noff) ||
(skb_cloned(skb) &&
!skb_clone_writable(skb, ihl + sizeof(*udph) + noff) &&
pskb_expand_head(skb, 0, 0, GFP_ATOMIC)))
goto drop;
udph = (void *)(skb_network_header(skb) + ihl);
if (udph->check || skb->ip_summed == CHECKSUM_PARTIAL) {
inet_proto_csum_replace4(&udph->check, skb, addr,
new_addr, 1);
if (!udph->check)
udph->check = CSUM_MANGLED_0;
}
break;
}
case IPPROTO_ICMP:
{
struct icmphdr *icmph;
if (!pskb_may_pull(skb, ihl + sizeof(*icmph) + noff))
goto drop;
icmph = (void *)(skb_network_header(skb) + ihl);
if ((icmph->type != ICMP_DEST_UNREACH) &&
(icmph->type != ICMP_TIME_EXCEEDED) &&
(icmph->type != ICMP_PARAMETERPROB))
break;
if (!pskb_may_pull(skb, ihl + sizeof(*icmph) + sizeof(*iph) +
noff))
goto drop;
icmph = (void *)(skb_network_header(skb) + ihl);
iph = (void *)(icmph + 1);
if (egress)
addr = iph->daddr;
else
addr = iph->saddr;
if ((old_addr ^ addr) & mask)
break;
if (skb_cloned(skb) &&
!skb_clone_writable(skb, ihl + sizeof(*icmph) +
sizeof(*iph) + noff) &&
pskb_expand_head(skb, 0, 0, GFP_ATOMIC))
goto drop;
icmph = (void *)(skb_network_header(skb) + ihl);
iph = (void *)(icmph + 1);
new_addr &= mask;
new_addr |= addr & ~mask;
/* XXX Fix up the inner checksums. */
if (egress)
iph->daddr = new_addr;
else
iph->saddr = new_addr;
inet_proto_csum_replace4(&icmph->checksum, skb, addr, new_addr,
0);
break;
}
default:
break;
}
out:
return action;
drop:
spin_lock(&p->tcf_lock);
p->tcf_qstats.drops++;
spin_unlock(&p->tcf_lock);
return TC_ACT_SHOT;
}
static int tcf_nat_dump(struct sk_buff *skb, struct tc_action *a,
int bind, int ref)
{
unsigned char *b = skb_tail_pointer(skb);
struct tcf_nat *p = a->priv;
struct tc_nat opt = {
.old_addr = p->old_addr,
.new_addr = p->new_addr,
.mask = p->mask,
.flags = p->flags,
.index = p->tcf_index,
.action = p->tcf_action,
.refcnt = p->tcf_refcnt - ref,
.bindcnt = p->tcf_bindcnt - bind,
};
struct tcf_t t;
NLA_PUT(skb, TCA_NAT_PARMS, sizeof(opt), &opt);
t.install = jiffies_to_clock_t(jiffies - p->tcf_tm.install);
t.lastuse = jiffies_to_clock_t(jiffies - p->tcf_tm.lastuse);
t.expires = jiffies_to_clock_t(p->tcf_tm.expires);
NLA_PUT(skb, TCA_NAT_TM, sizeof(t), &t);
return skb->len;
nla_put_failure:
nlmsg_trim(skb, b);
return -1;
}
static struct tc_action_ops act_nat_ops = {
.kind = "nat",
.hinfo = &nat_hash_info,
.type = TCA_ACT_NAT,
.capab = TCA_CAP_NONE,
.owner = THIS_MODULE,
.act = tcf_nat,
.dump = tcf_nat_dump,
.cleanup = tcf_nat_cleanup,
.lookup = tcf_hash_search,
.init = tcf_nat_init,
.walk = tcf_generic_walker
};
MODULE_DESCRIPTION("Stateless NAT actions");
MODULE_LICENSE("GPL");
static int __init nat_init_module(void)
{
return tcf_register_action(&act_nat_ops);
}
static void __exit nat_cleanup_module(void)
{
tcf_unregister_action(&act_nat_ops);
}
module_init(nat_init_module);
module_exit(nat_cleanup_module);
| gpl-2.0 |
nrgmilk/linux | drivers/staging/usbip/vhci_sysfs.c | 5458 | 6114 | /*
* Copyright (C) 2003-2008 Takahiro Hirofuchi
*
* This is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307,
* USA.
*/
#include <linux/kthread.h>
#include <linux/net.h>
#include "usbip_common.h"
#include "vhci.h"
/* TODO: refine locking ?*/
/* Sysfs entry to show port status */
static ssize_t show_status(struct device *dev, struct device_attribute *attr,
char *out)
{
char *s = out;
int i = 0;
BUG_ON(!the_controller || !out);
spin_lock(&the_controller->lock);
/*
* output example:
* prt sta spd dev socket local_busid
* 000 004 000 000 c5a7bb80 1-2.3
* 001 004 000 000 d8cee980 2-3.4
*
* IP address can be retrieved from a socket pointer address by looking
* up /proc/net/{tcp,tcp6}. Also, a userland program may remember a
* port number and its peer IP address.
*/
out += sprintf(out, "prt sta spd bus dev socket "
"local_busid\n");
for (i = 0; i < VHCI_NPORTS; i++) {
struct vhci_device *vdev = port_to_vdev(i);
spin_lock(&vdev->ud.lock);
out += sprintf(out, "%03u %03u ", i, vdev->ud.status);
if (vdev->ud.status == VDEV_ST_USED) {
out += sprintf(out, "%03u %08x ",
vdev->speed, vdev->devid);
out += sprintf(out, "%16p ", vdev->ud.tcp_socket);
out += sprintf(out, "%s", dev_name(&vdev->udev->dev));
} else {
out += sprintf(out, "000 000 000 0000000000000000 0-0");
}
out += sprintf(out, "\n");
spin_unlock(&vdev->ud.lock);
}
spin_unlock(&the_controller->lock);
return out - s;
}
static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
/* Sysfs entry to shutdown a virtual connection */
static int vhci_port_disconnect(__u32 rhport)
{
struct vhci_device *vdev;
usbip_dbg_vhci_sysfs("enter\n");
/* lock */
spin_lock(&the_controller->lock);
vdev = port_to_vdev(rhport);
spin_lock(&vdev->ud.lock);
if (vdev->ud.status == VDEV_ST_NULL) {
pr_err("not connected %d\n", vdev->ud.status);
/* unlock */
spin_unlock(&vdev->ud.lock);
spin_unlock(&the_controller->lock);
return -EINVAL;
}
/* unlock */
spin_unlock(&vdev->ud.lock);
spin_unlock(&the_controller->lock);
usbip_event_add(&vdev->ud, VDEV_EVENT_DOWN);
return 0;
}
static ssize_t store_detach(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int err;
__u32 rhport = 0;
sscanf(buf, "%u", &rhport);
/* check rhport */
if (rhport >= VHCI_NPORTS) {
dev_err(dev, "invalid port %u\n", rhport);
return -EINVAL;
}
err = vhci_port_disconnect(rhport);
if (err < 0)
return -EINVAL;
usbip_dbg_vhci_sysfs("Leave\n");
return count;
}
static DEVICE_ATTR(detach, S_IWUSR, NULL, store_detach);
/* Sysfs entry to establish a virtual connection */
static int valid_args(__u32 rhport, enum usb_device_speed speed)
{
/* check rhport */
if (rhport >= VHCI_NPORTS) {
pr_err("port %u\n", rhport);
return -EINVAL;
}
/* check speed */
switch (speed) {
case USB_SPEED_LOW:
case USB_SPEED_FULL:
case USB_SPEED_HIGH:
case USB_SPEED_WIRELESS:
break;
default:
pr_err("speed %d\n", speed);
return -EINVAL;
}
return 0;
}
/*
* To start a new USB/IP attachment, a userland program needs to setup a TCP
* connection and then write its socket descriptor with remote device
* information into this sysfs file.
*
* A remote device is virtually attached to the root-hub port of @rhport with
* @speed. @devid is embedded into a request to specify the remote device in a
* server host.
*
* write() returns 0 on success, else negative errno.
*/
static ssize_t store_attach(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct vhci_device *vdev;
struct socket *socket;
int sockfd = 0;
__u32 rhport = 0, devid = 0, speed = 0;
/*
* @rhport: port number of vhci_hcd
* @sockfd: socket descriptor of an established TCP connection
* @devid: unique device identifier in a remote host
* @speed: usb device speed in a remote host
*/
sscanf(buf, "%u %u %u %u", &rhport, &sockfd, &devid, &speed);
usbip_dbg_vhci_sysfs("rhport(%u) sockfd(%u) devid(%u) speed(%u)\n",
rhport, sockfd, devid, speed);
/* check received parameters */
if (valid_args(rhport, speed) < 0)
return -EINVAL;
/* check sockfd */
socket = sockfd_to_socket(sockfd);
if (!socket)
return -EINVAL;
/* now need lock until setting vdev status as used */
/* begin a lock */
spin_lock(&the_controller->lock);
vdev = port_to_vdev(rhport);
spin_lock(&vdev->ud.lock);
if (vdev->ud.status != VDEV_ST_NULL) {
/* end of the lock */
spin_unlock(&vdev->ud.lock);
spin_unlock(&the_controller->lock);
dev_err(dev, "port %d already used\n", rhport);
return -EINVAL;
}
dev_info(dev, "rhport(%u) sockfd(%d) devid(%u) speed(%u)\n",
rhport, sockfd, devid, speed);
vdev->devid = devid;
vdev->speed = speed;
vdev->ud.tcp_socket = socket;
vdev->ud.status = VDEV_ST_NOTASSIGNED;
spin_unlock(&vdev->ud.lock);
spin_unlock(&the_controller->lock);
/* end the lock */
vdev->ud.tcp_rx = kthread_run(vhci_rx_loop, &vdev->ud, "vhci_rx");
vdev->ud.tcp_tx = kthread_run(vhci_tx_loop, &vdev->ud, "vhci_tx");
rh_port_connect(rhport, speed);
return count;
}
static DEVICE_ATTR(attach, S_IWUSR, NULL, store_attach);
static struct attribute *dev_attrs[] = {
&dev_attr_status.attr,
&dev_attr_detach.attr,
&dev_attr_attach.attr,
&dev_attr_usbip_debug.attr,
NULL,
};
const struct attribute_group dev_attr_group = {
.attrs = dev_attrs,
};
| gpl-2.0 |
sakindia123/kernel_3.4_samsung_exynos4 | drivers/media/radio/radio-sf16fmi.c | 5458 | 9864 | /* SF16-FMI and SF16-FMP radio driver for Linux radio support
* heavily based on rtrack driver...
* (c) 1997 M. Kirkwood
* (c) 1998 Petr Vandrovec, vandrove@vc.cvut.cz
*
* Fitted to new interface by Alan Cox <alan@lxorguk.ukuu.org.uk>
* Made working and cleaned up functions <mikael.hedin@irf.se>
* Support for ISAPnP by Ladislav Michl <ladis@psi.cz>
*
* Notes on the hardware
*
* Frequency control is done digitally -- ie out(port,encodefreq(95.8));
* No volume control - only mute/unmute - you have to use line volume
* control on SB-part of SF16-FMI/SF16-FMP
*
* Converted to V4L2 API by Mauro Carvalho Chehab <mchehab@infradead.org>
*/
#include <linux/kernel.h> /* __setup */
#include <linux/module.h> /* Modules */
#include <linux/init.h> /* Initdata */
#include <linux/ioport.h> /* request_region */
#include <linux/delay.h> /* udelay */
#include <linux/isapnp.h>
#include <linux/mutex.h>
#include <linux/videodev2.h> /* kernel radio structs */
#include <linux/io.h> /* outb, outb_p */
#include <media/v4l2-device.h>
#include <media/v4l2-ioctl.h>
MODULE_AUTHOR("Petr Vandrovec, vandrove@vc.cvut.cz and M. Kirkwood");
MODULE_DESCRIPTION("A driver for the SF16-FMI and SF16-FMP radio.");
MODULE_LICENSE("GPL");
MODULE_VERSION("0.0.3");
static int io = -1;
static int radio_nr = -1;
module_param(io, int, 0);
MODULE_PARM_DESC(io, "I/O address of the SF16-FMI or SF16-FMP card (0x284 or 0x384)");
module_param(radio_nr, int, 0);
struct fmi
{
struct v4l2_device v4l2_dev;
struct video_device vdev;
int io;
bool mute;
unsigned long curfreq; /* freq in kHz */
struct mutex lock;
};
static struct fmi fmi_card;
static struct pnp_dev *dev;
bool pnp_attached;
/* freq is in 1/16 kHz to internal number, hw precision is 50 kHz */
/* It is only useful to give freq in interval of 800 (=0.05Mhz),
* other bits will be truncated, e.g 92.7400016 -> 92.7, but
* 92.7400017 -> 92.75
*/
#define RSF16_ENCODE(x) ((x) / 800 + 214)
#define RSF16_MINFREQ (87 * 16000)
#define RSF16_MAXFREQ (108 * 16000)
static void outbits(int bits, unsigned int data, int io)
{
while (bits--) {
if (data & 1) {
outb(5, io);
udelay(6);
outb(7, io);
udelay(6);
} else {
outb(1, io);
udelay(6);
outb(3, io);
udelay(6);
}
data >>= 1;
}
}
static inline void fmi_mute(struct fmi *fmi)
{
mutex_lock(&fmi->lock);
outb(0x00, fmi->io);
mutex_unlock(&fmi->lock);
}
static inline void fmi_unmute(struct fmi *fmi)
{
mutex_lock(&fmi->lock);
outb(0x08, fmi->io);
mutex_unlock(&fmi->lock);
}
static inline int fmi_setfreq(struct fmi *fmi, unsigned long freq)
{
mutex_lock(&fmi->lock);
fmi->curfreq = freq;
outbits(16, RSF16_ENCODE(freq), fmi->io);
outbits(8, 0xC0, fmi->io);
msleep(143); /* was schedule_timeout(HZ/7) */
mutex_unlock(&fmi->lock);
if (!fmi->mute)
fmi_unmute(fmi);
return 0;
}
static inline int fmi_getsigstr(struct fmi *fmi)
{
int val;
int res;
mutex_lock(&fmi->lock);
val = fmi->mute ? 0x00 : 0x08; /* mute/unmute */
outb(val, fmi->io);
outb(val | 0x10, fmi->io);
msleep(143); /* was schedule_timeout(HZ/7) */
res = (int)inb(fmi->io + 1);
outb(val, fmi->io);
mutex_unlock(&fmi->lock);
return (res & 2) ? 0 : 0xFFFF;
}
static int vidioc_querycap(struct file *file, void *priv,
struct v4l2_capability *v)
{
strlcpy(v->driver, "radio-sf16fmi", sizeof(v->driver));
strlcpy(v->card, "SF16-FMx radio", sizeof(v->card));
strlcpy(v->bus_info, "ISA", sizeof(v->bus_info));
v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO;
return 0;
}
static int vidioc_g_tuner(struct file *file, void *priv,
struct v4l2_tuner *v)
{
struct fmi *fmi = video_drvdata(file);
if (v->index > 0)
return -EINVAL;
strlcpy(v->name, "FM", sizeof(v->name));
v->type = V4L2_TUNER_RADIO;
v->rangelow = RSF16_MINFREQ;
v->rangehigh = RSF16_MAXFREQ;
v->rxsubchans = V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO;
v->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_LOW;
v->audmode = V4L2_TUNER_MODE_STEREO;
v->signal = fmi_getsigstr(fmi);
return 0;
}
static int vidioc_s_tuner(struct file *file, void *priv,
struct v4l2_tuner *v)
{
return v->index ? -EINVAL : 0;
}
static int vidioc_s_frequency(struct file *file, void *priv,
struct v4l2_frequency *f)
{
struct fmi *fmi = video_drvdata(file);
if (f->tuner != 0 || f->type != V4L2_TUNER_RADIO)
return -EINVAL;
if (f->frequency < RSF16_MINFREQ ||
f->frequency > RSF16_MAXFREQ)
return -EINVAL;
/* rounding in steps of 800 to match the freq
that will be used */
fmi_setfreq(fmi, (f->frequency / 800) * 800);
return 0;
}
static int vidioc_g_frequency(struct file *file, void *priv,
struct v4l2_frequency *f)
{
struct fmi *fmi = video_drvdata(file);
if (f->tuner != 0)
return -EINVAL;
f->type = V4L2_TUNER_RADIO;
f->frequency = fmi->curfreq;
return 0;
}
static int vidioc_queryctrl(struct file *file, void *priv,
struct v4l2_queryctrl *qc)
{
switch (qc->id) {
case V4L2_CID_AUDIO_MUTE:
return v4l2_ctrl_query_fill(qc, 0, 1, 1, 1);
}
return -EINVAL;
}
static int vidioc_g_ctrl(struct file *file, void *priv,
struct v4l2_control *ctrl)
{
struct fmi *fmi = video_drvdata(file);
switch (ctrl->id) {
case V4L2_CID_AUDIO_MUTE:
ctrl->value = fmi->mute;
return 0;
}
return -EINVAL;
}
static int vidioc_s_ctrl(struct file *file, void *priv,
struct v4l2_control *ctrl)
{
struct fmi *fmi = video_drvdata(file);
switch (ctrl->id) {
case V4L2_CID_AUDIO_MUTE:
if (ctrl->value)
fmi_mute(fmi);
else
fmi_unmute(fmi);
fmi->mute = ctrl->value;
return 0;
}
return -EINVAL;
}
static int vidioc_g_input(struct file *filp, void *priv, unsigned int *i)
{
*i = 0;
return 0;
}
static int vidioc_s_input(struct file *filp, void *priv, unsigned int i)
{
return i ? -EINVAL : 0;
}
static int vidioc_g_audio(struct file *file, void *priv,
struct v4l2_audio *a)
{
a->index = 0;
strlcpy(a->name, "Radio", sizeof(a->name));
a->capability = V4L2_AUDCAP_STEREO;
return 0;
}
static int vidioc_s_audio(struct file *file, void *priv,
struct v4l2_audio *a)
{
return a->index ? -EINVAL : 0;
}
static const struct v4l2_file_operations fmi_fops = {
.owner = THIS_MODULE,
.unlocked_ioctl = video_ioctl2,
};
static const struct v4l2_ioctl_ops fmi_ioctl_ops = {
.vidioc_querycap = vidioc_querycap,
.vidioc_g_tuner = vidioc_g_tuner,
.vidioc_s_tuner = vidioc_s_tuner,
.vidioc_g_audio = vidioc_g_audio,
.vidioc_s_audio = vidioc_s_audio,
.vidioc_g_input = vidioc_g_input,
.vidioc_s_input = vidioc_s_input,
.vidioc_g_frequency = vidioc_g_frequency,
.vidioc_s_frequency = vidioc_s_frequency,
.vidioc_queryctrl = vidioc_queryctrl,
.vidioc_g_ctrl = vidioc_g_ctrl,
.vidioc_s_ctrl = vidioc_s_ctrl,
};
/* ladis: this is my card. does any other types exist? */
static struct isapnp_device_id id_table[] __devinitdata = {
{ ISAPNP_ANY_ID, ISAPNP_ANY_ID,
ISAPNP_VENDOR('M','F','R'), ISAPNP_FUNCTION(0xad10), 0},
{ ISAPNP_CARD_END, },
};
MODULE_DEVICE_TABLE(isapnp, id_table);
static int __init isapnp_fmi_probe(void)
{
int i = 0;
while (id_table[i].card_vendor != 0 && dev == NULL) {
dev = pnp_find_dev(NULL, id_table[i].vendor,
id_table[i].function, NULL);
i++;
}
if (!dev)
return -ENODEV;
if (pnp_device_attach(dev) < 0)
return -EAGAIN;
if (pnp_activate_dev(dev) < 0) {
printk(KERN_ERR "radio-sf16fmi: PnP configure failed (out of resources?)\n");
pnp_device_detach(dev);
return -ENOMEM;
}
if (!pnp_port_valid(dev, 0)) {
pnp_device_detach(dev);
return -ENODEV;
}
i = pnp_port_start(dev, 0);
printk(KERN_INFO "radio-sf16fmi: PnP reports card at %#x\n", i);
return i;
}
static int __init fmi_init(void)
{
struct fmi *fmi = &fmi_card;
struct v4l2_device *v4l2_dev = &fmi->v4l2_dev;
int res, i;
int probe_ports[] = { 0, 0x284, 0x384 };
if (io < 0) {
for (i = 0; i < ARRAY_SIZE(probe_ports); i++) {
io = probe_ports[i];
if (io == 0) {
io = isapnp_fmi_probe();
if (io < 0)
continue;
pnp_attached = 1;
}
if (!request_region(io, 2, "radio-sf16fmi")) {
if (pnp_attached)
pnp_device_detach(dev);
io = -1;
continue;
}
if (pnp_attached ||
((inb(io) & 0xf9) == 0xf9 && (inb(io) & 0x4) == 0))
break;
release_region(io, 2);
io = -1;
}
} else {
if (!request_region(io, 2, "radio-sf16fmi")) {
printk(KERN_ERR "radio-sf16fmi: port %#x already in use\n", io);
return -EBUSY;
}
if (inb(io) == 0xff) {
printk(KERN_ERR "radio-sf16fmi: card not present at %#x\n", io);
release_region(io, 2);
return -ENODEV;
}
}
if (io < 0) {
printk(KERN_ERR "radio-sf16fmi: no cards found\n");
return -ENODEV;
}
strlcpy(v4l2_dev->name, "sf16fmi", sizeof(v4l2_dev->name));
fmi->io = io;
res = v4l2_device_register(NULL, v4l2_dev);
if (res < 0) {
release_region(fmi->io, 2);
if (pnp_attached)
pnp_device_detach(dev);
v4l2_err(v4l2_dev, "Could not register v4l2_device\n");
return res;
}
strlcpy(fmi->vdev.name, v4l2_dev->name, sizeof(fmi->vdev.name));
fmi->vdev.v4l2_dev = v4l2_dev;
fmi->vdev.fops = &fmi_fops;
fmi->vdev.ioctl_ops = &fmi_ioctl_ops;
fmi->vdev.release = video_device_release_empty;
video_set_drvdata(&fmi->vdev, fmi);
mutex_init(&fmi->lock);
/* mute card - prevents noisy bootups */
fmi_mute(fmi);
if (video_register_device(&fmi->vdev, VFL_TYPE_RADIO, radio_nr) < 0) {
v4l2_device_unregister(v4l2_dev);
release_region(fmi->io, 2);
if (pnp_attached)
pnp_device_detach(dev);
return -EINVAL;
}
v4l2_info(v4l2_dev, "card driver at 0x%x\n", fmi->io);
return 0;
}
static void __exit fmi_exit(void)
{
struct fmi *fmi = &fmi_card;
video_unregister_device(&fmi->vdev);
v4l2_device_unregister(&fmi->v4l2_dev);
release_region(fmi->io, 2);
if (dev && pnp_attached)
pnp_device_detach(dev);
}
module_init(fmi_init);
module_exit(fmi_exit);
| gpl-2.0 |
mastero9017/Crystal | arch/sh/kernel/cpu/sh2/setup-sh7619.c | 7506 | 5479 | /*
* SH7619 Setup
*
* Copyright (C) 2006 Yoshinori Sato
* Copyright (C) 2009 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/platform_device.h>
#include <linux/init.h>
#include <linux/serial.h>
#include <linux/serial_sci.h>
#include <linux/sh_timer.h>
#include <linux/io.h>
enum {
UNUSED = 0,
/* interrupt sources */
IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
WDT, EDMAC, CMT0, CMT1,
SCIF0, SCIF1, SCIF2,
HIF_HIFI, HIF_HIFBI,
DMAC0, DMAC1, DMAC2, DMAC3,
SIOF,
};
static struct intc_vect vectors[] __initdata = {
INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
INTC_IRQ(IRQ4, 80), INTC_IRQ(IRQ5, 81),
INTC_IRQ(IRQ6, 82), INTC_IRQ(IRQ7, 83),
INTC_IRQ(WDT, 84), INTC_IRQ(EDMAC, 85),
INTC_IRQ(CMT0, 86), INTC_IRQ(CMT1, 87),
INTC_IRQ(SCIF0, 88), INTC_IRQ(SCIF0, 89),
INTC_IRQ(SCIF0, 90), INTC_IRQ(SCIF0, 91),
INTC_IRQ(SCIF1, 92), INTC_IRQ(SCIF1, 93),
INTC_IRQ(SCIF1, 94), INTC_IRQ(SCIF1, 95),
INTC_IRQ(SCIF2, 96), INTC_IRQ(SCIF2, 97),
INTC_IRQ(SCIF2, 98), INTC_IRQ(SCIF2, 99),
INTC_IRQ(HIF_HIFI, 100), INTC_IRQ(HIF_HIFBI, 101),
INTC_IRQ(DMAC0, 104), INTC_IRQ(DMAC1, 105),
INTC_IRQ(DMAC2, 106), INTC_IRQ(DMAC3, 107),
INTC_IRQ(SIOF, 108),
};
static struct intc_prio_reg prio_registers[] __initdata = {
{ 0xf8140006, 0, 16, 4, /* IPRA */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
{ 0xf8140008, 0, 16, 4, /* IPRB */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
{ 0xf8080000, 0, 16, 4, /* IPRC */ { WDT, EDMAC, CMT0, CMT1 } },
{ 0xf8080002, 0, 16, 4, /* IPRD */ { SCIF0, SCIF1, SCIF2 } },
{ 0xf8080004, 0, 16, 4, /* IPRE */ { HIF_HIFI, HIF_HIFBI } },
{ 0xf8080006, 0, 16, 4, /* IPRF */ { DMAC0, DMAC1, DMAC2, DMAC3 } },
{ 0xf8080008, 0, 16, 4, /* IPRG */ { SIOF } },
};
static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL,
NULL, prio_registers, NULL);
static struct plat_sci_port scif0_platform_data = {
.mapbase = 0xf8400000,
.flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF,
.irqs = { 88, 88, 88, 88 },
};
static struct platform_device scif0_device = {
.name = "sh-sci",
.id = 0,
.dev = {
.platform_data = &scif0_platform_data,
},
};
static struct plat_sci_port scif1_platform_data = {
.mapbase = 0xf8410000,
.flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF,
.irqs = { 92, 92, 92, 92 },
};
static struct platform_device scif1_device = {
.name = "sh-sci",
.id = 1,
.dev = {
.platform_data = &scif1_platform_data,
},
};
static struct plat_sci_port scif2_platform_data = {
.mapbase = 0xf8420000,
.flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF,
.irqs = { 96, 96, 96, 96 },
};
static struct platform_device scif2_device = {
.name = "sh-sci",
.id = 2,
.dev = {
.platform_data = &scif2_platform_data,
},
};
static struct resource eth_resources[] = {
[0] = {
.start = 0xfb000000,
.end = 0xfb0001c8,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 85,
.end = 85,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device eth_device = {
.name = "sh-eth",
.id = -1,
.dev = {
.platform_data = (void *)1,
},
.num_resources = ARRAY_SIZE(eth_resources),
.resource = eth_resources,
};
static struct sh_timer_config cmt0_platform_data = {
.channel_offset = 0x02,
.timer_bit = 0,
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
};
static struct resource cmt0_resources[] = {
[0] = {
.start = 0xf84a0072,
.end = 0xf84a0077,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 86,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cmt0_device = {
.name = "sh_cmt",
.id = 0,
.dev = {
.platform_data = &cmt0_platform_data,
},
.resource = cmt0_resources,
.num_resources = ARRAY_SIZE(cmt0_resources),
};
static struct sh_timer_config cmt1_platform_data = {
.channel_offset = 0x08,
.timer_bit = 1,
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
};
static struct resource cmt1_resources[] = {
[0] = {
.start = 0xf84a0078,
.end = 0xf84a007d,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 87,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cmt1_device = {
.name = "sh_cmt",
.id = 1,
.dev = {
.platform_data = &cmt1_platform_data,
},
.resource = cmt1_resources,
.num_resources = ARRAY_SIZE(cmt1_resources),
};
static struct platform_device *sh7619_devices[] __initdata = {
&scif0_device,
&scif1_device,
&scif2_device,
ð_device,
&cmt0_device,
&cmt1_device,
};
static int __init sh7619_devices_setup(void)
{
return platform_add_devices(sh7619_devices,
ARRAY_SIZE(sh7619_devices));
}
arch_initcall(sh7619_devices_setup);
void __init plat_irq_setup(void)
{
register_intc_controller(&intc_desc);
}
static struct platform_device *sh7619_early_devices[] __initdata = {
&scif0_device,
&scif1_device,
&scif2_device,
&cmt0_device,
&cmt1_device,
};
#define STBCR3 0xf80a0000
void __init plat_early_device_setup(void)
{
/* enable CMT clock */
__raw_writeb(__raw_readb(STBCR3) & ~0x10, STBCR3);
early_platform_add_devices(sh7619_early_devices,
ARRAY_SIZE(sh7619_early_devices));
}
| gpl-2.0 |
VRToxin-AOSP/android_kernel_moto_shamu | fs/reiserfs/item_ops.c | 7762 | 19115 | /*
* Copyright 2000 by Hans Reiser, licensing governed by reiserfs/README
*/
#include <linux/time.h>
#include "reiserfs.h"
// this contains item handlers for old item types: sd, direct,
// indirect, directory
/* and where are the comments? how about saying where we can find an
explanation of each item handler method? -Hans */
//////////////////////////////////////////////////////////////////////////////
// stat data functions
//
static int sd_bytes_number(struct item_head *ih, int block_size)
{
return 0;
}
static void sd_decrement_key(struct cpu_key *key)
{
key->on_disk_key.k_objectid--;
set_cpu_key_k_type(key, TYPE_ANY);
set_cpu_key_k_offset(key, (loff_t)(~0ULL >> 1));
}
static int sd_is_left_mergeable(struct reiserfs_key *key, unsigned long bsize)
{
return 0;
}
static char *print_time(time_t t)
{
static char timebuf[256];
sprintf(timebuf, "%ld", t);
return timebuf;
}
static void sd_print_item(struct item_head *ih, char *item)
{
printk("\tmode | size | nlinks | first direct | mtime\n");
if (stat_data_v1(ih)) {
struct stat_data_v1 *sd = (struct stat_data_v1 *)item;
printk("\t0%-6o | %6u | %2u | %d | %s\n", sd_v1_mode(sd),
sd_v1_size(sd), sd_v1_nlink(sd),
sd_v1_first_direct_byte(sd),
print_time(sd_v1_mtime(sd)));
} else {
struct stat_data *sd = (struct stat_data *)item;
printk("\t0%-6o | %6Lu | %2u | %d | %s\n", sd_v2_mode(sd),
(unsigned long long)sd_v2_size(sd), sd_v2_nlink(sd),
sd_v2_rdev(sd), print_time(sd_v2_mtime(sd)));
}
}
static void sd_check_item(struct item_head *ih, char *item)
{
// FIXME: type something here!
}
static int sd_create_vi(struct virtual_node *vn,
struct virtual_item *vi,
int is_affected, int insert_size)
{
vi->vi_index = TYPE_STAT_DATA;
//vi->vi_type |= VI_TYPE_STAT_DATA;// not needed?
return 0;
}
static int sd_check_left(struct virtual_item *vi, int free,
int start_skip, int end_skip)
{
BUG_ON(start_skip || end_skip);
return -1;
}
static int sd_check_right(struct virtual_item *vi, int free)
{
return -1;
}
static int sd_part_size(struct virtual_item *vi, int first, int count)
{
BUG_ON(count);
return 0;
}
static int sd_unit_num(struct virtual_item *vi)
{
return vi->vi_item_len - IH_SIZE;
}
static void sd_print_vi(struct virtual_item *vi)
{
reiserfs_warning(NULL, "reiserfs-16100",
"STATDATA, index %d, type 0x%x, %h",
vi->vi_index, vi->vi_type, vi->vi_ih);
}
static struct item_operations stat_data_ops = {
.bytes_number = sd_bytes_number,
.decrement_key = sd_decrement_key,
.is_left_mergeable = sd_is_left_mergeable,
.print_item = sd_print_item,
.check_item = sd_check_item,
.create_vi = sd_create_vi,
.check_left = sd_check_left,
.check_right = sd_check_right,
.part_size = sd_part_size,
.unit_num = sd_unit_num,
.print_vi = sd_print_vi
};
//////////////////////////////////////////////////////////////////////////////
// direct item functions
//
static int direct_bytes_number(struct item_head *ih, int block_size)
{
return ih_item_len(ih);
}
// FIXME: this should probably switch to indirect as well
static void direct_decrement_key(struct cpu_key *key)
{
cpu_key_k_offset_dec(key);
if (cpu_key_k_offset(key) == 0)
set_cpu_key_k_type(key, TYPE_STAT_DATA);
}
static int direct_is_left_mergeable(struct reiserfs_key *key,
unsigned long bsize)
{
int version = le_key_version(key);
return ((le_key_k_offset(version, key) & (bsize - 1)) != 1);
}
static void direct_print_item(struct item_head *ih, char *item)
{
int j = 0;
// return;
printk("\"");
while (j < ih_item_len(ih))
printk("%c", item[j++]);
printk("\"\n");
}
static void direct_check_item(struct item_head *ih, char *item)
{
// FIXME: type something here!
}
static int direct_create_vi(struct virtual_node *vn,
struct virtual_item *vi,
int is_affected, int insert_size)
{
vi->vi_index = TYPE_DIRECT;
//vi->vi_type |= VI_TYPE_DIRECT;
return 0;
}
static int direct_check_left(struct virtual_item *vi, int free,
int start_skip, int end_skip)
{
int bytes;
bytes = free - free % 8;
return bytes ? : -1;
}
static int direct_check_right(struct virtual_item *vi, int free)
{
return direct_check_left(vi, free, 0, 0);
}
static int direct_part_size(struct virtual_item *vi, int first, int count)
{
return count;
}
static int direct_unit_num(struct virtual_item *vi)
{
return vi->vi_item_len - IH_SIZE;
}
static void direct_print_vi(struct virtual_item *vi)
{
reiserfs_warning(NULL, "reiserfs-16101",
"DIRECT, index %d, type 0x%x, %h",
vi->vi_index, vi->vi_type, vi->vi_ih);
}
static struct item_operations direct_ops = {
.bytes_number = direct_bytes_number,
.decrement_key = direct_decrement_key,
.is_left_mergeable = direct_is_left_mergeable,
.print_item = direct_print_item,
.check_item = direct_check_item,
.create_vi = direct_create_vi,
.check_left = direct_check_left,
.check_right = direct_check_right,
.part_size = direct_part_size,
.unit_num = direct_unit_num,
.print_vi = direct_print_vi
};
//////////////////////////////////////////////////////////////////////////////
// indirect item functions
//
static int indirect_bytes_number(struct item_head *ih, int block_size)
{
return ih_item_len(ih) / UNFM_P_SIZE * block_size; //- get_ih_free_space (ih);
}
// decrease offset, if it becomes 0, change type to stat data
static void indirect_decrement_key(struct cpu_key *key)
{
cpu_key_k_offset_dec(key);
if (cpu_key_k_offset(key) == 0)
set_cpu_key_k_type(key, TYPE_STAT_DATA);
}
// if it is not first item of the body, then it is mergeable
static int indirect_is_left_mergeable(struct reiserfs_key *key,
unsigned long bsize)
{
int version = le_key_version(key);
return (le_key_k_offset(version, key) != 1);
}
// printing of indirect item
static void start_new_sequence(__u32 * start, int *len, __u32 new)
{
*start = new;
*len = 1;
}
static int sequence_finished(__u32 start, int *len, __u32 new)
{
if (start == INT_MAX)
return 1;
if (start == 0 && new == 0) {
(*len)++;
return 0;
}
if (start != 0 && (start + *len) == new) {
(*len)++;
return 0;
}
return 1;
}
static void print_sequence(__u32 start, int len)
{
if (start == INT_MAX)
return;
if (len == 1)
printk(" %d", start);
else
printk(" %d(%d)", start, len);
}
static void indirect_print_item(struct item_head *ih, char *item)
{
int j;
__le32 *unp;
__u32 prev = INT_MAX;
int num = 0;
unp = (__le32 *) item;
if (ih_item_len(ih) % UNFM_P_SIZE)
reiserfs_warning(NULL, "reiserfs-16102", "invalid item len");
printk("%d pointers\n[ ", (int)I_UNFM_NUM(ih));
for (j = 0; j < I_UNFM_NUM(ih); j++) {
if (sequence_finished(prev, &num, get_block_num(unp, j))) {
print_sequence(prev, num);
start_new_sequence(&prev, &num, get_block_num(unp, j));
}
}
print_sequence(prev, num);
printk("]\n");
}
static void indirect_check_item(struct item_head *ih, char *item)
{
// FIXME: type something here!
}
static int indirect_create_vi(struct virtual_node *vn,
struct virtual_item *vi,
int is_affected, int insert_size)
{
vi->vi_index = TYPE_INDIRECT;
//vi->vi_type |= VI_TYPE_INDIRECT;
return 0;
}
static int indirect_check_left(struct virtual_item *vi, int free,
int start_skip, int end_skip)
{
int bytes;
bytes = free - free % UNFM_P_SIZE;
return bytes ? : -1;
}
static int indirect_check_right(struct virtual_item *vi, int free)
{
return indirect_check_left(vi, free, 0, 0);
}
// return size in bytes of 'units' units. If first == 0 - calculate from the head (left), otherwise - from tail (right)
static int indirect_part_size(struct virtual_item *vi, int first, int units)
{
// unit of indirect item is byte (yet)
return units;
}
static int indirect_unit_num(struct virtual_item *vi)
{
// unit of indirect item is byte (yet)
return vi->vi_item_len - IH_SIZE;
}
static void indirect_print_vi(struct virtual_item *vi)
{
reiserfs_warning(NULL, "reiserfs-16103",
"INDIRECT, index %d, type 0x%x, %h",
vi->vi_index, vi->vi_type, vi->vi_ih);
}
static struct item_operations indirect_ops = {
.bytes_number = indirect_bytes_number,
.decrement_key = indirect_decrement_key,
.is_left_mergeable = indirect_is_left_mergeable,
.print_item = indirect_print_item,
.check_item = indirect_check_item,
.create_vi = indirect_create_vi,
.check_left = indirect_check_left,
.check_right = indirect_check_right,
.part_size = indirect_part_size,
.unit_num = indirect_unit_num,
.print_vi = indirect_print_vi
};
//////////////////////////////////////////////////////////////////////////////
// direntry functions
//
static int direntry_bytes_number(struct item_head *ih, int block_size)
{
reiserfs_warning(NULL, "vs-16090",
"bytes number is asked for direntry");
return 0;
}
static void direntry_decrement_key(struct cpu_key *key)
{
cpu_key_k_offset_dec(key);
if (cpu_key_k_offset(key) == 0)
set_cpu_key_k_type(key, TYPE_STAT_DATA);
}
static int direntry_is_left_mergeable(struct reiserfs_key *key,
unsigned long bsize)
{
if (le32_to_cpu(key->u.k_offset_v1.k_offset) == DOT_OFFSET)
return 0;
return 1;
}
static void direntry_print_item(struct item_head *ih, char *item)
{
int i;
int namelen;
struct reiserfs_de_head *deh;
char *name;
static char namebuf[80];
printk("\n # %-15s%-30s%-15s%-15s%-15s\n", "Name",
"Key of pointed object", "Hash", "Gen number", "Status");
deh = (struct reiserfs_de_head *)item;
for (i = 0; i < I_ENTRY_COUNT(ih); i++, deh++) {
namelen =
(i ? (deh_location(deh - 1)) : ih_item_len(ih)) -
deh_location(deh);
name = item + deh_location(deh);
if (name[namelen - 1] == 0)
namelen = strlen(name);
namebuf[0] = '"';
if (namelen > sizeof(namebuf) - 3) {
strncpy(namebuf + 1, name, sizeof(namebuf) - 3);
namebuf[sizeof(namebuf) - 2] = '"';
namebuf[sizeof(namebuf) - 1] = 0;
} else {
memcpy(namebuf + 1, name, namelen);
namebuf[namelen + 1] = '"';
namebuf[namelen + 2] = 0;
}
printk("%d: %-15s%-15d%-15d%-15Ld%-15Ld(%s)\n",
i, namebuf,
deh_dir_id(deh), deh_objectid(deh),
GET_HASH_VALUE(deh_offset(deh)),
GET_GENERATION_NUMBER((deh_offset(deh))),
(de_hidden(deh)) ? "HIDDEN" : "VISIBLE");
}
}
static void direntry_check_item(struct item_head *ih, char *item)
{
int i;
struct reiserfs_de_head *deh;
// FIXME: type something here!
deh = (struct reiserfs_de_head *)item;
for (i = 0; i < I_ENTRY_COUNT(ih); i++, deh++) {
;
}
}
#define DIRENTRY_VI_FIRST_DIRENTRY_ITEM 1
/*
* function returns old entry number in directory item in real node
* using new entry number in virtual item in virtual node */
static inline int old_entry_num(int is_affected, int virtual_entry_num,
int pos_in_item, int mode)
{
if (mode == M_INSERT || mode == M_DELETE)
return virtual_entry_num;
if (!is_affected)
/* cut or paste is applied to another item */
return virtual_entry_num;
if (virtual_entry_num < pos_in_item)
return virtual_entry_num;
if (mode == M_CUT)
return virtual_entry_num + 1;
RFALSE(mode != M_PASTE || virtual_entry_num == 0,
"vs-8015: old_entry_num: mode must be M_PASTE (mode = \'%c\'",
mode);
return virtual_entry_num - 1;
}
/* Create an array of sizes of directory entries for virtual
item. Return space used by an item. FIXME: no control over
consuming of space used by this item handler */
static int direntry_create_vi(struct virtual_node *vn,
struct virtual_item *vi,
int is_affected, int insert_size)
{
struct direntry_uarea *dir_u = vi->vi_uarea;
int i, j;
int size = sizeof(struct direntry_uarea);
struct reiserfs_de_head *deh;
vi->vi_index = TYPE_DIRENTRY;
BUG_ON(!(vi->vi_ih) || !vi->vi_item);
dir_u->flags = 0;
if (le_ih_k_offset(vi->vi_ih) == DOT_OFFSET)
dir_u->flags |= DIRENTRY_VI_FIRST_DIRENTRY_ITEM;
deh = (struct reiserfs_de_head *)(vi->vi_item);
/* virtual directory item have this amount of entry after */
dir_u->entry_count = ih_entry_count(vi->vi_ih) +
((is_affected) ? ((vn->vn_mode == M_CUT) ? -1 :
(vn->vn_mode == M_PASTE ? 1 : 0)) : 0);
for (i = 0; i < dir_u->entry_count; i++) {
j = old_entry_num(is_affected, i, vn->vn_pos_in_item,
vn->vn_mode);
dir_u->entry_sizes[i] =
(j ? deh_location(&(deh[j - 1])) : ih_item_len(vi->vi_ih)) -
deh_location(&(deh[j])) + DEH_SIZE;
}
size += (dir_u->entry_count * sizeof(short));
/* set size of pasted entry */
if (is_affected && vn->vn_mode == M_PASTE)
dir_u->entry_sizes[vn->vn_pos_in_item] = insert_size;
#ifdef CONFIG_REISERFS_CHECK
/* compare total size of entries with item length */
{
int k, l;
l = 0;
for (k = 0; k < dir_u->entry_count; k++)
l += dir_u->entry_sizes[k];
if (l + IH_SIZE != vi->vi_item_len +
((is_affected
&& (vn->vn_mode == M_PASTE
|| vn->vn_mode == M_CUT)) ? insert_size : 0)) {
reiserfs_panic(NULL, "vs-8025", "(mode==%c, "
"insert_size==%d), invalid length of "
"directory item",
vn->vn_mode, insert_size);
}
}
#endif
return size;
}
//
// return number of entries which may fit into specified amount of
// free space, or -1 if free space is not enough even for 1 entry
//
static int direntry_check_left(struct virtual_item *vi, int free,
int start_skip, int end_skip)
{
int i;
int entries = 0;
struct direntry_uarea *dir_u = vi->vi_uarea;
for (i = start_skip; i < dir_u->entry_count - end_skip; i++) {
if (dir_u->entry_sizes[i] > free)
/* i-th entry doesn't fit into the remaining free space */
break;
free -= dir_u->entry_sizes[i];
entries++;
}
if (entries == dir_u->entry_count) {
reiserfs_panic(NULL, "item_ops-1",
"free space %d, entry_count %d", free,
dir_u->entry_count);
}
/* "." and ".." can not be separated from each other */
if (start_skip == 0 && (dir_u->flags & DIRENTRY_VI_FIRST_DIRENTRY_ITEM)
&& entries < 2)
entries = 0;
return entries ? : -1;
}
static int direntry_check_right(struct virtual_item *vi, int free)
{
int i;
int entries = 0;
struct direntry_uarea *dir_u = vi->vi_uarea;
for (i = dir_u->entry_count - 1; i >= 0; i--) {
if (dir_u->entry_sizes[i] > free)
/* i-th entry doesn't fit into the remaining free space */
break;
free -= dir_u->entry_sizes[i];
entries++;
}
BUG_ON(entries == dir_u->entry_count);
/* "." and ".." can not be separated from each other */
if ((dir_u->flags & DIRENTRY_VI_FIRST_DIRENTRY_ITEM)
&& entries > dir_u->entry_count - 2)
entries = dir_u->entry_count - 2;
return entries ? : -1;
}
/* sum of entry sizes between from-th and to-th entries including both edges */
static int direntry_part_size(struct virtual_item *vi, int first, int count)
{
int i, retval;
int from, to;
struct direntry_uarea *dir_u = vi->vi_uarea;
retval = 0;
if (first == 0)
from = 0;
else
from = dir_u->entry_count - count;
to = from + count - 1;
for (i = from; i <= to; i++)
retval += dir_u->entry_sizes[i];
return retval;
}
static int direntry_unit_num(struct virtual_item *vi)
{
struct direntry_uarea *dir_u = vi->vi_uarea;
return dir_u->entry_count;
}
static void direntry_print_vi(struct virtual_item *vi)
{
int i;
struct direntry_uarea *dir_u = vi->vi_uarea;
reiserfs_warning(NULL, "reiserfs-16104",
"DIRENTRY, index %d, type 0x%x, %h, flags 0x%x",
vi->vi_index, vi->vi_type, vi->vi_ih, dir_u->flags);
printk("%d entries: ", dir_u->entry_count);
for (i = 0; i < dir_u->entry_count; i++)
printk("%d ", dir_u->entry_sizes[i]);
printk("\n");
}
static struct item_operations direntry_ops = {
.bytes_number = direntry_bytes_number,
.decrement_key = direntry_decrement_key,
.is_left_mergeable = direntry_is_left_mergeable,
.print_item = direntry_print_item,
.check_item = direntry_check_item,
.create_vi = direntry_create_vi,
.check_left = direntry_check_left,
.check_right = direntry_check_right,
.part_size = direntry_part_size,
.unit_num = direntry_unit_num,
.print_vi = direntry_print_vi
};
//////////////////////////////////////////////////////////////////////////////
// Error catching functions to catch errors caused by incorrect item types.
//
static int errcatch_bytes_number(struct item_head *ih, int block_size)
{
reiserfs_warning(NULL, "green-16001",
"Invalid item type observed, run fsck ASAP");
return 0;
}
static void errcatch_decrement_key(struct cpu_key *key)
{
reiserfs_warning(NULL, "green-16002",
"Invalid item type observed, run fsck ASAP");
}
static int errcatch_is_left_mergeable(struct reiserfs_key *key,
unsigned long bsize)
{
reiserfs_warning(NULL, "green-16003",
"Invalid item type observed, run fsck ASAP");
return 0;
}
static void errcatch_print_item(struct item_head *ih, char *item)
{
reiserfs_warning(NULL, "green-16004",
"Invalid item type observed, run fsck ASAP");
}
static void errcatch_check_item(struct item_head *ih, char *item)
{
reiserfs_warning(NULL, "green-16005",
"Invalid item type observed, run fsck ASAP");
}
static int errcatch_create_vi(struct virtual_node *vn,
struct virtual_item *vi,
int is_affected, int insert_size)
{
reiserfs_warning(NULL, "green-16006",
"Invalid item type observed, run fsck ASAP");
return 0; // We might return -1 here as well, but it won't help as create_virtual_node() from where
// this operation is called from is of return type void.
}
static int errcatch_check_left(struct virtual_item *vi, int free,
int start_skip, int end_skip)
{
reiserfs_warning(NULL, "green-16007",
"Invalid item type observed, run fsck ASAP");
return -1;
}
static int errcatch_check_right(struct virtual_item *vi, int free)
{
reiserfs_warning(NULL, "green-16008",
"Invalid item type observed, run fsck ASAP");
return -1;
}
static int errcatch_part_size(struct virtual_item *vi, int first, int count)
{
reiserfs_warning(NULL, "green-16009",
"Invalid item type observed, run fsck ASAP");
return 0;
}
static int errcatch_unit_num(struct virtual_item *vi)
{
reiserfs_warning(NULL, "green-16010",
"Invalid item type observed, run fsck ASAP");
return 0;
}
static void errcatch_print_vi(struct virtual_item *vi)
{
reiserfs_warning(NULL, "green-16011",
"Invalid item type observed, run fsck ASAP");
}
static struct item_operations errcatch_ops = {
errcatch_bytes_number,
errcatch_decrement_key,
errcatch_is_left_mergeable,
errcatch_print_item,
errcatch_check_item,
errcatch_create_vi,
errcatch_check_left,
errcatch_check_right,
errcatch_part_size,
errcatch_unit_num,
errcatch_print_vi
};
//////////////////////////////////////////////////////////////////////////////
//
//
#if ! (TYPE_STAT_DATA == 0 && TYPE_INDIRECT == 1 && TYPE_DIRECT == 2 && TYPE_DIRENTRY == 3)
#error Item types must use disk-format assigned values.
#endif
struct item_operations *item_ops[TYPE_ANY + 1] = {
&stat_data_ops,
&indirect_ops,
&direct_ops,
&direntry_ops,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
&errcatch_ops /* This is to catch errors with invalid type (15th entry for TYPE_ANY) */
};
| gpl-2.0 |
TeamExodus/kernel_moto_shamu | arch/microblaze/kernel/cpu/mb.c | 8530 | 4196 | /*
* CPU-version specific code
*
* Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
* Copyright (C) 2006-2009 PetaLogix
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/string.h>
#include <linux/seq_file.h>
#include <linux/cpu.h>
#include <linux/initrd.h>
#include <linux/bug.h>
#include <asm/cpuinfo.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <asm/page.h>
#include <linux/param.h>
#include <asm/pvr.h>
#include <asm/sections.h>
#include <asm/setup.h>
static int show_cpuinfo(struct seq_file *m, void *v)
{
int count = 0;
char *fpga_family = "Unknown";
char *cpu_ver = "Unknown";
int i;
/* Denormalised to get the fpga family string */
for (i = 0; family_string_lookup[i].s != NULL; i++) {
if (cpuinfo.fpga_family_code == family_string_lookup[i].k) {
fpga_family = (char *)family_string_lookup[i].s;
break;
}
}
/* Denormalised to get the hw version string */
for (i = 0; cpu_ver_lookup[i].s != NULL; i++) {
if (cpuinfo.ver_code == cpu_ver_lookup[i].k) {
cpu_ver = (char *)cpu_ver_lookup[i].s;
break;
}
}
count = seq_printf(m,
"CPU-Family: MicroBlaze\n"
"FPGA-Arch: %s\n"
"CPU-Ver: %s, %s endian\n"
"CPU-MHz: %d.%02d\n"
"BogoMips: %lu.%02lu\n",
fpga_family,
cpu_ver,
cpuinfo.endian ? "little" : "big",
cpuinfo.cpu_clock_freq /
1000000,
cpuinfo.cpu_clock_freq %
1000000,
loops_per_jiffy / (500000 / HZ),
(loops_per_jiffy / (5000 / HZ)) % 100);
count += seq_printf(m,
"HW:\n Shift:\t\t%s\n"
" MSR:\t\t%s\n"
" PCMP:\t\t%s\n"
" DIV:\t\t%s\n",
(cpuinfo.use_instr & PVR0_USE_BARREL_MASK) ? "yes" : "no",
(cpuinfo.use_instr & PVR2_USE_MSR_INSTR) ? "yes" : "no",
(cpuinfo.use_instr & PVR2_USE_PCMP_INSTR) ? "yes" : "no",
(cpuinfo.use_instr & PVR0_USE_DIV_MASK) ? "yes" : "no");
count += seq_printf(m,
" MMU:\t\t%x\n",
cpuinfo.mmu);
count += seq_printf(m,
" MUL:\t\t%s\n"
" FPU:\t\t%s\n",
(cpuinfo.use_mult & PVR2_USE_MUL64_MASK) ? "v2" :
(cpuinfo.use_mult & PVR0_USE_HW_MUL_MASK) ? "v1" : "no",
(cpuinfo.use_fpu & PVR2_USE_FPU2_MASK) ? "v2" :
(cpuinfo.use_fpu & PVR0_USE_FPU_MASK) ? "v1" : "no");
count += seq_printf(m,
" Exc:\t\t%s%s%s%s%s%s%s%s\n",
(cpuinfo.use_exc & PVR2_OPCODE_0x0_ILL_MASK) ? "op0x0 " : "",
(cpuinfo.use_exc & PVR2_UNALIGNED_EXC_MASK) ? "unal " : "",
(cpuinfo.use_exc & PVR2_ILL_OPCODE_EXC_MASK) ? "ill " : "",
(cpuinfo.use_exc & PVR2_IOPB_BUS_EXC_MASK) ? "iopb " : "",
(cpuinfo.use_exc & PVR2_DOPB_BUS_EXC_MASK) ? "dopb " : "",
(cpuinfo.use_exc & PVR2_DIV_ZERO_EXC_MASK) ? "zero " : "",
(cpuinfo.use_exc & PVR2_FPU_EXC_MASK) ? "fpu " : "",
(cpuinfo.use_exc & PVR2_USE_FSL_EXC) ? "fsl " : "");
count += seq_printf(m,
"Stream-insns:\t%sprivileged\n",
cpuinfo.mmu_privins ? "un" : "");
if (cpuinfo.use_icache)
count += seq_printf(m,
"Icache:\t\t%ukB\tline length:\t%dB\n",
cpuinfo.icache_size >> 10,
cpuinfo.icache_line_length);
else
count += seq_printf(m, "Icache:\t\tno\n");
if (cpuinfo.use_dcache) {
count += seq_printf(m,
"Dcache:\t\t%ukB\tline length:\t%dB\n",
cpuinfo.dcache_size >> 10,
cpuinfo.dcache_line_length);
seq_printf(m, "Dcache-Policy:\t");
if (cpuinfo.dcache_wb)
count += seq_printf(m, "write-back\n");
else
count += seq_printf(m, "write-through\n");
} else
count += seq_printf(m, "Dcache:\t\tno\n");
count += seq_printf(m,
"HW-Debug:\t%s\n",
cpuinfo.hw_debug ? "yes" : "no");
count += seq_printf(m,
"PVR-USR1:\t%02x\n"
"PVR-USR2:\t%08x\n",
cpuinfo.pvr_user1,
cpuinfo.pvr_user2);
count += seq_printf(m, "Page size:\t%lu\n", PAGE_SIZE);
return 0;
}
static void *c_start(struct seq_file *m, loff_t *pos)
{
int i = *pos;
return i < NR_CPUS ? (void *) (i + 1) : NULL;
}
static void *c_next(struct seq_file *m, void *v, loff_t *pos)
{
++*pos;
return c_start(m, pos);
}
static void c_stop(struct seq_file *m, void *v)
{
}
const struct seq_operations cpuinfo_op = {
.start = c_start,
.next = c_next,
.stop = c_stop,
.show = show_cpuinfo,
};
| gpl-2.0 |
SomethingExplosive/android_kernel_lge_mako | drivers/macintosh/windfarm_max6690_sensor.c | 9042 | 4841 | /*
* Windfarm PowerMac thermal control. MAX6690 sensor.
*
* Copyright (C) 2005 Paul Mackerras, IBM Corp. <paulus@samba.org>
*
* Use and redistribute under the terms of the GNU GPL v2.
*/
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <asm/prom.h>
#include <asm/pmac_low_i2c.h>
#include "windfarm.h"
#define VERSION "0.2"
/* This currently only exports the external temperature sensor,
since that's all the control loops need. */
/* Some MAX6690 register numbers */
#define MAX6690_INTERNAL_TEMP 0
#define MAX6690_EXTERNAL_TEMP 1
struct wf_6690_sensor {
struct i2c_client *i2c;
struct wf_sensor sens;
};
#define wf_to_6690(x) container_of((x), struct wf_6690_sensor, sens)
static int wf_max6690_get(struct wf_sensor *sr, s32 *value)
{
struct wf_6690_sensor *max = wf_to_6690(sr);
s32 data;
if (max->i2c == NULL)
return -ENODEV;
/* chip gets initialized by firmware */
data = i2c_smbus_read_byte_data(max->i2c, MAX6690_EXTERNAL_TEMP);
if (data < 0)
return data;
*value = data << 16;
return 0;
}
static void wf_max6690_release(struct wf_sensor *sr)
{
struct wf_6690_sensor *max = wf_to_6690(sr);
kfree(max);
}
static struct wf_sensor_ops wf_max6690_ops = {
.get_value = wf_max6690_get,
.release = wf_max6690_release,
.owner = THIS_MODULE,
};
static int wf_max6690_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct wf_6690_sensor *max;
int rc;
max = kzalloc(sizeof(struct wf_6690_sensor), GFP_KERNEL);
if (max == NULL) {
printk(KERN_ERR "windfarm: Couldn't create MAX6690 sensor: "
"no memory\n");
return -ENOMEM;
}
max->i2c = client;
max->sens.name = client->dev.platform_data;
max->sens.ops = &wf_max6690_ops;
i2c_set_clientdata(client, max);
rc = wf_register_sensor(&max->sens);
if (rc) {
kfree(max);
}
return rc;
}
static struct i2c_driver wf_max6690_driver;
static struct i2c_client *wf_max6690_create(struct i2c_adapter *adapter,
u8 addr, const char *loc)
{
struct i2c_board_info info;
struct i2c_client *client;
char *name;
if (!strcmp(loc, "BACKSIDE"))
name = "backside-temp";
else if (!strcmp(loc, "NB Ambient"))
name = "north-bridge-temp";
else if (!strcmp(loc, "GPU Ambient"))
name = "gpu-temp";
else
goto fail;
memset(&info, 0, sizeof(struct i2c_board_info));
info.addr = addr >> 1;
info.platform_data = name;
strlcpy(info.type, "wf_max6690", I2C_NAME_SIZE);
client = i2c_new_device(adapter, &info);
if (client == NULL) {
printk(KERN_ERR "windfarm: failed to attach MAX6690 sensor\n");
goto fail;
}
/*
* Let i2c-core delete that device on driver removal.
* This is safe because i2c-core holds the core_lock mutex for us.
*/
list_add_tail(&client->detected, &wf_max6690_driver.clients);
return client;
fail:
return NULL;
}
static int wf_max6690_attach(struct i2c_adapter *adapter)
{
struct device_node *busnode, *dev = NULL;
struct pmac_i2c_bus *bus;
const char *loc;
bus = pmac_i2c_adapter_to_bus(adapter);
if (bus == NULL)
return -ENODEV;
busnode = pmac_i2c_get_bus_node(bus);
while ((dev = of_get_next_child(busnode, dev)) != NULL) {
u8 addr;
/* We must re-match the adapter in order to properly check
* the channel on multibus setups
*/
if (!pmac_i2c_match_adapter(dev, adapter))
continue;
if (!of_device_is_compatible(dev, "max6690"))
continue;
addr = pmac_i2c_get_dev_addr(dev);
loc = of_get_property(dev, "hwsensor-location", NULL);
if (loc == NULL || addr == 0)
continue;
printk("found max6690, loc=%s addr=0x%02x\n", loc, addr);
wf_max6690_create(adapter, addr, loc);
}
return 0;
}
static int wf_max6690_remove(struct i2c_client *client)
{
struct wf_6690_sensor *max = i2c_get_clientdata(client);
max->i2c = NULL;
wf_unregister_sensor(&max->sens);
return 0;
}
static const struct i2c_device_id wf_max6690_id[] = {
{ "wf_max6690", 0 },
{ }
};
static struct i2c_driver wf_max6690_driver = {
.driver = {
.name = "wf_max6690",
},
.attach_adapter = wf_max6690_attach,
.probe = wf_max6690_probe,
.remove = wf_max6690_remove,
.id_table = wf_max6690_id,
};
static int __init wf_max6690_sensor_init(void)
{
/* Don't register on old machines that use therm_pm72 for now */
if (of_machine_is_compatible("PowerMac7,2") ||
of_machine_is_compatible("PowerMac7,3") ||
of_machine_is_compatible("RackMac3,1"))
return -ENODEV;
return i2c_add_driver(&wf_max6690_driver);
}
static void __exit wf_max6690_sensor_exit(void)
{
i2c_del_driver(&wf_max6690_driver);
}
module_init(wf_max6690_sensor_init);
module_exit(wf_max6690_sensor_exit);
MODULE_AUTHOR("Paul Mackerras <paulus@samba.org>");
MODULE_DESCRIPTION("MAX6690 sensor objects for PowerMac thermal control");
MODULE_LICENSE("GPL");
| gpl-2.0 |
rex-xxx/Explay_A350_kernel_source_code | tools/perf/scripts/perl/Perf-Trace-Util/Context.c | 11602 | 3691 | /*
* This file was generated automatically by ExtUtils::ParseXS version 2.18_02 from the
* contents of Context.xs. Do not edit this file, edit Context.xs instead.
*
* ANY CHANGES MADE HERE WILL BE LOST!
*
*/
#line 1 "Context.xs"
/*
* Context.xs. XS interfaces for perf script.
*
* Copyright (C) 2009 Tom Zanussi <tzanussi@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include "EXTERN.h"
#include "perl.h"
#include "XSUB.h"
#include "../../../perf.h"
#include "../../../util/trace-event.h"
#ifndef PERL_UNUSED_VAR
# define PERL_UNUSED_VAR(var) if (0) var = var
#endif
#line 42 "Context.c"
XS(XS_Perf__Trace__Context_common_pc); /* prototype to pass -Wmissing-prototypes */
XS(XS_Perf__Trace__Context_common_pc)
{
#ifdef dVAR
dVAR; dXSARGS;
#else
dXSARGS;
#endif
if (items != 1)
Perl_croak(aTHX_ "Usage: %s(%s)", "Perf::Trace::Context::common_pc", "context");
PERL_UNUSED_VAR(cv); /* -W */
{
struct scripting_context * context = INT2PTR(struct scripting_context *,SvIV(ST(0)));
int RETVAL;
dXSTARG;
RETVAL = common_pc(context);
XSprePUSH; PUSHi((IV)RETVAL);
}
XSRETURN(1);
}
XS(XS_Perf__Trace__Context_common_flags); /* prototype to pass -Wmissing-prototypes */
XS(XS_Perf__Trace__Context_common_flags)
{
#ifdef dVAR
dVAR; dXSARGS;
#else
dXSARGS;
#endif
if (items != 1)
Perl_croak(aTHX_ "Usage: %s(%s)", "Perf::Trace::Context::common_flags", "context");
PERL_UNUSED_VAR(cv); /* -W */
{
struct scripting_context * context = INT2PTR(struct scripting_context *,SvIV(ST(0)));
int RETVAL;
dXSTARG;
RETVAL = common_flags(context);
XSprePUSH; PUSHi((IV)RETVAL);
}
XSRETURN(1);
}
XS(XS_Perf__Trace__Context_common_lock_depth); /* prototype to pass -Wmissing-prototypes */
XS(XS_Perf__Trace__Context_common_lock_depth)
{
#ifdef dVAR
dVAR; dXSARGS;
#else
dXSARGS;
#endif
if (items != 1)
Perl_croak(aTHX_ "Usage: %s(%s)", "Perf::Trace::Context::common_lock_depth", "context");
PERL_UNUSED_VAR(cv); /* -W */
{
struct scripting_context * context = INT2PTR(struct scripting_context *,SvIV(ST(0)));
int RETVAL;
dXSTARG;
RETVAL = common_lock_depth(context);
XSprePUSH; PUSHi((IV)RETVAL);
}
XSRETURN(1);
}
#ifdef __cplusplus
extern "C"
#endif
XS(boot_Perf__Trace__Context); /* prototype to pass -Wmissing-prototypes */
XS(boot_Perf__Trace__Context)
{
#ifdef dVAR
dVAR; dXSARGS;
#else
dXSARGS;
#endif
const char* file = __FILE__;
PERL_UNUSED_VAR(cv); /* -W */
PERL_UNUSED_VAR(items); /* -W */
XS_VERSION_BOOTCHECK ;
newXSproto("Perf::Trace::Context::common_pc", XS_Perf__Trace__Context_common_pc, file, "$");
newXSproto("Perf::Trace::Context::common_flags", XS_Perf__Trace__Context_common_flags, file, "$");
newXSproto("Perf::Trace::Context::common_lock_depth", XS_Perf__Trace__Context_common_lock_depth, file, "$");
if (PL_unitcheckav)
call_list(PL_scopestack_ix, PL_unitcheckav);
XSRETURN_YES;
}
| gpl-2.0 |
lawnn/kernel10c | drivers/usb/host/whci/asl.c | 13906 | 9704 | /*
* Wireless Host Controller (WHC) asynchronous schedule management.
*
* Copyright (C) 2007 Cambridge Silicon Radio Ltd.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License version
* 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <linux/kernel.h>
#include <linux/gfp.h>
#include <linux/dma-mapping.h>
#include <linux/uwb/umc.h>
#include <linux/usb.h>
#include "../../wusbcore/wusbhc.h"
#include "whcd.h"
static void qset_get_next_prev(struct whc *whc, struct whc_qset *qset,
struct whc_qset **next, struct whc_qset **prev)
{
struct list_head *n, *p;
BUG_ON(list_empty(&whc->async_list));
n = qset->list_node.next;
if (n == &whc->async_list)
n = n->next;
p = qset->list_node.prev;
if (p == &whc->async_list)
p = p->prev;
*next = container_of(n, struct whc_qset, list_node);
*prev = container_of(p, struct whc_qset, list_node);
}
static void asl_qset_insert_begin(struct whc *whc, struct whc_qset *qset)
{
list_move(&qset->list_node, &whc->async_list);
qset->in_sw_list = true;
}
static void asl_qset_insert(struct whc *whc, struct whc_qset *qset)
{
struct whc_qset *next, *prev;
qset_clear(whc, qset);
/* Link into ASL. */
qset_get_next_prev(whc, qset, &next, &prev);
whc_qset_set_link_ptr(&qset->qh.link, next->qset_dma);
whc_qset_set_link_ptr(&prev->qh.link, qset->qset_dma);
qset->in_hw_list = true;
}
static void asl_qset_remove(struct whc *whc, struct whc_qset *qset)
{
struct whc_qset *prev, *next;
qset_get_next_prev(whc, qset, &next, &prev);
list_move(&qset->list_node, &whc->async_removed_list);
qset->in_sw_list = false;
/*
* No more qsets in the ASL? The caller must stop the ASL as
* it's no longer valid.
*/
if (list_empty(&whc->async_list))
return;
/* Remove from ASL. */
whc_qset_set_link_ptr(&prev->qh.link, next->qset_dma);
qset->in_hw_list = false;
}
/**
* process_qset - process any recently inactivated or halted qTDs in a
* qset.
*
* After inactive qTDs are removed, new qTDs can be added if the
* urb queue still contains URBs.
*
* Returns any additional WUSBCMD bits for the ASL sync command (i.e.,
* WUSBCMD_ASYNC_QSET_RM if a halted qset was removed).
*/
static uint32_t process_qset(struct whc *whc, struct whc_qset *qset)
{
enum whc_update update = 0;
uint32_t status = 0;
while (qset->ntds) {
struct whc_qtd *td;
int t;
t = qset->td_start;
td = &qset->qtd[qset->td_start];
status = le32_to_cpu(td->status);
/*
* Nothing to do with a still active qTD.
*/
if (status & QTD_STS_ACTIVE)
break;
if (status & QTD_STS_HALTED) {
/* Ug, an error. */
process_halted_qtd(whc, qset, td);
/* A halted qTD always triggers an update
because the qset was either removed or
reactivated. */
update |= WHC_UPDATE_UPDATED;
goto done;
}
/* Mmm, a completed qTD. */
process_inactive_qtd(whc, qset, td);
}
if (!qset->remove)
update |= qset_add_qtds(whc, qset);
done:
/*
* Remove this qset from the ASL if requested, but only if has
* no qTDs.
*/
if (qset->remove && qset->ntds == 0) {
asl_qset_remove(whc, qset);
update |= WHC_UPDATE_REMOVED;
}
return update;
}
void asl_start(struct whc *whc)
{
struct whc_qset *qset;
qset = list_first_entry(&whc->async_list, struct whc_qset, list_node);
le_writeq(qset->qset_dma | QH_LINK_NTDS(8), whc->base + WUSBASYNCLISTADDR);
whc_write_wusbcmd(whc, WUSBCMD_ASYNC_EN, WUSBCMD_ASYNC_EN);
whci_wait_for(&whc->umc->dev, whc->base + WUSBSTS,
WUSBSTS_ASYNC_SCHED, WUSBSTS_ASYNC_SCHED,
1000, "start ASL");
}
void asl_stop(struct whc *whc)
{
whc_write_wusbcmd(whc, WUSBCMD_ASYNC_EN, 0);
whci_wait_for(&whc->umc->dev, whc->base + WUSBSTS,
WUSBSTS_ASYNC_SCHED, 0,
1000, "stop ASL");
}
/**
* asl_update - request an ASL update and wait for the hardware to be synced
* @whc: the WHCI HC
* @wusbcmd: WUSBCMD value to start the update.
*
* If the WUSB HC is inactive (i.e., the ASL is stopped) then the
* update must be skipped as the hardware may not respond to update
* requests.
*/
void asl_update(struct whc *whc, uint32_t wusbcmd)
{
struct wusbhc *wusbhc = &whc->wusbhc;
long t;
mutex_lock(&wusbhc->mutex);
if (wusbhc->active) {
whc_write_wusbcmd(whc, wusbcmd, wusbcmd);
t = wait_event_timeout(
whc->async_list_wq,
(le_readl(whc->base + WUSBCMD) & WUSBCMD_ASYNC_UPDATED) == 0,
msecs_to_jiffies(1000));
if (t == 0)
whc_hw_error(whc, "ASL update timeout");
}
mutex_unlock(&wusbhc->mutex);
}
/**
* scan_async_work - scan the ASL for qsets to process.
*
* Process each qset in the ASL in turn and then signal the WHC that
* the ASL has been updated.
*
* Then start, stop or update the asynchronous schedule as required.
*/
void scan_async_work(struct work_struct *work)
{
struct whc *whc = container_of(work, struct whc, async_work);
struct whc_qset *qset, *t;
enum whc_update update = 0;
spin_lock_irq(&whc->lock);
/*
* Transerve the software list backwards so new qsets can be
* safely inserted into the ASL without making it non-circular.
*/
list_for_each_entry_safe_reverse(qset, t, &whc->async_list, list_node) {
if (!qset->in_hw_list) {
asl_qset_insert(whc, qset);
update |= WHC_UPDATE_ADDED;
}
update |= process_qset(whc, qset);
}
spin_unlock_irq(&whc->lock);
if (update) {
uint32_t wusbcmd = WUSBCMD_ASYNC_UPDATED | WUSBCMD_ASYNC_SYNCED_DB;
if (update & WHC_UPDATE_REMOVED)
wusbcmd |= WUSBCMD_ASYNC_QSET_RM;
asl_update(whc, wusbcmd);
}
/*
* Now that the ASL is updated, complete the removal of any
* removed qsets.
*
* If the qset was to be reset, do so and reinsert it into the
* ASL if it has pending transfers.
*/
spin_lock_irq(&whc->lock);
list_for_each_entry_safe(qset, t, &whc->async_removed_list, list_node) {
qset_remove_complete(whc, qset);
if (qset->reset) {
qset_reset(whc, qset);
if (!list_empty(&qset->stds)) {
asl_qset_insert_begin(whc, qset);
queue_work(whc->workqueue, &whc->async_work);
}
}
}
spin_unlock_irq(&whc->lock);
}
/**
* asl_urb_enqueue - queue an URB onto the asynchronous list (ASL).
* @whc: the WHCI host controller
* @urb: the URB to enqueue
* @mem_flags: flags for any memory allocations
*
* The qset for the endpoint is obtained and the urb queued on to it.
*
* Work is scheduled to update the hardware's view of the ASL.
*/
int asl_urb_enqueue(struct whc *whc, struct urb *urb, gfp_t mem_flags)
{
struct whc_qset *qset;
int err;
unsigned long flags;
spin_lock_irqsave(&whc->lock, flags);
err = usb_hcd_link_urb_to_ep(&whc->wusbhc.usb_hcd, urb);
if (err < 0) {
spin_unlock_irqrestore(&whc->lock, flags);
return err;
}
qset = get_qset(whc, urb, GFP_ATOMIC);
if (qset == NULL)
err = -ENOMEM;
else
err = qset_add_urb(whc, qset, urb, GFP_ATOMIC);
if (!err) {
if (!qset->in_sw_list && !qset->remove)
asl_qset_insert_begin(whc, qset);
} else
usb_hcd_unlink_urb_from_ep(&whc->wusbhc.usb_hcd, urb);
spin_unlock_irqrestore(&whc->lock, flags);
if (!err)
queue_work(whc->workqueue, &whc->async_work);
return err;
}
/**
* asl_urb_dequeue - remove an URB (qset) from the async list.
* @whc: the WHCI host controller
* @urb: the URB to dequeue
* @status: the current status of the URB
*
* URBs that do yet have qTDs can simply be removed from the software
* queue, otherwise the qset must be removed from the ASL so the qTDs
* can be removed.
*/
int asl_urb_dequeue(struct whc *whc, struct urb *urb, int status)
{
struct whc_urb *wurb = urb->hcpriv;
struct whc_qset *qset = wurb->qset;
struct whc_std *std, *t;
bool has_qtd = false;
int ret;
unsigned long flags;
spin_lock_irqsave(&whc->lock, flags);
ret = usb_hcd_check_unlink_urb(&whc->wusbhc.usb_hcd, urb, status);
if (ret < 0)
goto out;
list_for_each_entry_safe(std, t, &qset->stds, list_node) {
if (std->urb == urb) {
if (std->qtd)
has_qtd = true;
qset_free_std(whc, std);
} else
std->qtd = NULL; /* so this std is re-added when the qset is */
}
if (has_qtd) {
asl_qset_remove(whc, qset);
wurb->status = status;
wurb->is_async = true;
queue_work(whc->workqueue, &wurb->dequeue_work);
} else
qset_remove_urb(whc, qset, urb, status);
out:
spin_unlock_irqrestore(&whc->lock, flags);
return ret;
}
/**
* asl_qset_delete - delete a qset from the ASL
*/
void asl_qset_delete(struct whc *whc, struct whc_qset *qset)
{
qset->remove = 1;
queue_work(whc->workqueue, &whc->async_work);
qset_delete(whc, qset);
}
/**
* asl_init - initialize the asynchronous schedule list
*
* A dummy qset with no qTDs is added to the ASL to simplify removing
* qsets (no need to stop the ASL when the last qset is removed).
*/
int asl_init(struct whc *whc)
{
struct whc_qset *qset;
qset = qset_alloc(whc, GFP_KERNEL);
if (qset == NULL)
return -ENOMEM;
asl_qset_insert_begin(whc, qset);
asl_qset_insert(whc, qset);
return 0;
}
/**
* asl_clean_up - free ASL resources
*
* The ASL is stopped and empty except for the dummy qset.
*/
void asl_clean_up(struct whc *whc)
{
struct whc_qset *qset;
if (!list_empty(&whc->async_list)) {
qset = list_first_entry(&whc->async_list, struct whc_qset, list_node);
list_del(&qset->list_node);
qset_free(whc, qset);
}
}
| gpl-2.0 |
speadup/openwrt | target/linux/ar71xx/files/arch/mips/ath79/dev-ap9x-pci.c | 83 | 3993 | /*
* Atheros AP9X reference board PCI initialization
*
* Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/pci.h>
#include <linux/ath9k_platform.h>
#include <linux/delay.h>
#include <asm/mach-ath79/ath79.h>
#include "dev-ap9x-pci.h"
#include "pci-ath9k-fixup.h"
#include "pci.h"
static struct ath9k_platform_data ap9x_wmac0_data = {
.led_pin = -1,
};
static struct ath9k_platform_data ap9x_wmac1_data = {
.led_pin = -1,
};
static char ap9x_wmac0_mac[6];
static char ap9x_wmac1_mac[6];
__init void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin)
{
switch (wmac) {
case 0:
ap9x_wmac0_data.led_pin = pin;
break;
case 1:
ap9x_wmac1_data.led_pin = pin;
break;
}
}
__init void ap9x_pci_setup_wmac_led_name(unsigned wmac, const char *led_name)
{
switch (wmac) {
case 0:
ap9x_wmac0_data.led_name = led_name;
break;
case 1:
ap9x_wmac1_data.led_name = led_name;
break;
}
}
__init struct ath9k_platform_data *ap9x_pci_get_wmac_data(unsigned wmac)
{
switch (wmac) {
case 0:
return &ap9x_wmac0_data;
case 1:
return &ap9x_wmac1_data;
}
return NULL;
}
__init void ap9x_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val)
{
switch (wmac) {
case 0:
ap9x_wmac0_data.gpio_mask = mask;
ap9x_wmac0_data.gpio_val = val;
break;
case 1:
ap9x_wmac1_data.gpio_mask = mask;
ap9x_wmac1_data.gpio_val = val;
break;
}
}
__init void ap9x_pci_setup_wmac_leds(unsigned wmac, struct gpio_led *leds,
int num_leds)
{
switch (wmac) {
case 0:
ap9x_wmac0_data.leds = leds;
ap9x_wmac0_data.num_leds = num_leds;
break;
case 1:
ap9x_wmac1_data.leds = leds;
ap9x_wmac1_data.num_leds = num_leds;
break;
}
}
__init void ap9x_pci_setup_wmac_btns(unsigned wmac,
struct gpio_keys_button *btns,
unsigned num_btns, unsigned poll_interval)
{
struct ath9k_platform_data *ap9x_wmac_data;
if (!(ap9x_wmac_data = ap9x_pci_get_wmac_data(wmac)))
return;
ap9x_wmac_data->btns = btns;
ap9x_wmac_data->num_btns = num_btns;
ap9x_wmac_data->btn_poll_interval = poll_interval;
}
static int ap91_pci_plat_dev_init(struct pci_dev *dev)
{
switch (PCI_SLOT(dev->devfn)) {
case 0:
dev->dev.platform_data = &ap9x_wmac0_data;
break;
}
return 0;
}
__init void ap91_pci_init(u8 *cal_data, u8 *mac_addr)
{
if (cal_data)
memcpy(ap9x_wmac0_data.eeprom_data, cal_data,
sizeof(ap9x_wmac0_data.eeprom_data));
if (mac_addr) {
memcpy(ap9x_wmac0_mac, mac_addr, sizeof(ap9x_wmac0_mac));
ap9x_wmac0_data.macaddr = ap9x_wmac0_mac;
}
ath79_pci_set_plat_dev_init(ap91_pci_plat_dev_init);
ath79_register_pci();
pci_enable_ath9k_fixup(0, ap9x_wmac0_data.eeprom_data);
}
__init void ap91_pci_init_simple(void)
{
ap91_pci_init(NULL, NULL);
ap9x_wmac0_data.eeprom_name = "pci_wmac0.eeprom";
}
static int ap94_pci_plat_dev_init(struct pci_dev *dev)
{
switch (PCI_SLOT(dev->devfn)) {
case 17:
dev->dev.platform_data = &ap9x_wmac0_data;
break;
case 18:
dev->dev.platform_data = &ap9x_wmac1_data;
break;
}
return 0;
}
__init void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0,
u8 *cal_data1, u8 *mac_addr1)
{
if (cal_data0)
memcpy(ap9x_wmac0_data.eeprom_data, cal_data0,
sizeof(ap9x_wmac0_data.eeprom_data));
if (cal_data1)
memcpy(ap9x_wmac1_data.eeprom_data, cal_data1,
sizeof(ap9x_wmac1_data.eeprom_data));
if (mac_addr0) {
memcpy(ap9x_wmac0_mac, mac_addr0, sizeof(ap9x_wmac0_mac));
ap9x_wmac0_data.macaddr = ap9x_wmac0_mac;
}
if (mac_addr1) {
memcpy(ap9x_wmac1_mac, mac_addr1, sizeof(ap9x_wmac1_mac));
ap9x_wmac1_data.macaddr = ap9x_wmac1_mac;
}
ath79_pci_set_plat_dev_init(ap94_pci_plat_dev_init);
ath79_register_pci();
pci_enable_ath9k_fixup(17, ap9x_wmac0_data.eeprom_data);
pci_enable_ath9k_fixup(18, ap9x_wmac1_data.eeprom_data);
}
| gpl-2.0 |
arm-embedded/newlib.debian | newlib/libc/stdlib/mbstowcs.c | 83 | 2130 | /*
FUNCTION
<<mbstowcs>>---minimal multibyte string to wide char converter
INDEX
mbstowcs
ANSI_SYNOPSIS
#include <stdlib.h>
int mbstowcs(wchar_t *restrict <[pwc]>, const char *restrict <[s]>, size_t <[n]>);
TRAD_SYNOPSIS
#include <stdlib.h>
int mbstowcs(<[pwc]>, <[s]>, <[n]>)
wchar_t *<[pwc]>;
const char *<[s]>;
size_t <[n]>;
DESCRIPTION
When _MB_CAPABLE is not defined, this is a minimal ANSI-conforming
implementation of <<mbstowcs>>. In this case, the
only ``multi-byte character sequences'' recognized are single bytes,
and they are ``converted'' to wide-char versions simply by byte
extension.
When _MB_CAPABLE is defined, this routine calls <<_mbstowcs_r>> to perform
the conversion, passing a state variable to allow state dependent
decoding. The result is based on the locale setting which may
be restricted to a defined set of locales.
RETURNS
This implementation of <<mbstowcs>> returns <<0>> if
<[s]> is <<NULL>> or is the empty string;
it returns <<-1>> if _MB_CAPABLE and one of the
multi-byte characters is invalid or incomplete;
otherwise it returns the minimum of: <<n>> or the
number of multi-byte characters in <<s>> plus 1 (to
compensate for the nul character).
If the return value is -1, the state of the <<pwc>> string is
indeterminate. If the input has a length of 0, the output
string will be modified to contain a wchar_t nul terminator.
PORTABILITY
<<mbstowcs>> is required in the ANSI C standard. However, the precise
effects vary with the locale.
<<mbstowcs>> requires no supporting OS subroutines.
*/
#ifndef _REENT_ONLY
#include <newlib.h>
#include <stdlib.h>
#include <wchar.h>
size_t
_DEFUN (mbstowcs, (pwcs, s, n),
wchar_t *__restrict pwcs _AND
const char *__restrict s _AND
size_t n)
{
#ifdef _MB_CAPABLE
mbstate_t state;
state.__count = 0;
return _mbstowcs_r (_REENT, pwcs, s, n, &state);
#else /* not _MB_CAPABLE */
int count = 0;
if (n != 0) {
do {
if ((*pwcs++ = (wchar_t) *s++) == 0)
break;
count++;
} while (--n != 0);
}
return count;
#endif /* not _MB_CAPABLE */
}
#endif /* !_REENT_ONLY */
| gpl-2.0 |
openwsn/node | cc2430zbw_iar/common/openwsn/hal/opennode2010/stm32f10x/std/src/stm32f10x_pwr.c | 595 | 8452 | /**
******************************************************************************
* @file stm32f10x_pwr.c
* @author MCD Application Team
* @version V3.5.0
* @date 11-March-2011
* @brief This file provides all the PWR firmware functions.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_pwr.h"
#include "stm32f10x_rcc.h"
/** @addtogroup STM32F10x_StdPeriph_Driver
* @{
*/
/** @defgroup PWR
* @brief PWR driver modules
* @{
*/
/** @defgroup PWR_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @defgroup PWR_Private_Defines
* @{
*/
/* --------- PWR registers bit address in the alias region ---------- */
#define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
/* --- CR Register ---*/
/* Alias word address of DBP bit */
#define CR_OFFSET (PWR_OFFSET + 0x00)
#define DBP_BitNumber 0x08
#define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
/* Alias word address of PVDE bit */
#define PVDE_BitNumber 0x04
#define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
/* --- CSR Register ---*/
/* Alias word address of EWUP bit */
#define CSR_OFFSET (PWR_OFFSET + 0x04)
#define EWUP_BitNumber 0x08
#define CSR_EWUP_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4))
/* ------------------ PWR registers bit mask ------------------------ */
/* CR register bit mask */
#define CR_DS_MASK ((uint32_t)0xFFFFFFFC)
#define CR_PLS_MASK ((uint32_t)0xFFFFFF1F)
/**
* @}
*/
/** @defgroup PWR_Private_Macros
* @{
*/
/**
* @}
*/
/** @defgroup PWR_Private_Variables
* @{
*/
/**
* @}
*/
/** @defgroup PWR_Private_FunctionPrototypes
* @{
*/
/**
* @}
*/
/** @defgroup PWR_Private_Functions
* @{
*/
/**
* @brief Deinitializes the PWR peripheral registers to their default reset values.
* @param None
* @retval None
*/
void PWR_DeInit(void)
{
RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE);
}
/**
* @brief Enables or disables access to the RTC and backup registers.
* @param NewState: new state of the access to the RTC and backup registers.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void PWR_BackupAccessCmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
*(__IO uint32_t *) CR_DBP_BB = (uint32_t)NewState;
}
/**
* @brief Enables or disables the Power Voltage Detector(PVD).
* @param NewState: new state of the PVD.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void PWR_PVDCmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
*(__IO uint32_t *) CR_PVDE_BB = (uint32_t)NewState;
}
/**
* @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
* @param PWR_PVDLevel: specifies the PVD detection level
* This parameter can be one of the following values:
* @arg PWR_PVDLevel_2V2: PVD detection level set to 2.2V
* @arg PWR_PVDLevel_2V3: PVD detection level set to 2.3V
* @arg PWR_PVDLevel_2V4: PVD detection level set to 2.4V
* @arg PWR_PVDLevel_2V5: PVD detection level set to 2.5V
* @arg PWR_PVDLevel_2V6: PVD detection level set to 2.6V
* @arg PWR_PVDLevel_2V7: PVD detection level set to 2.7V
* @arg PWR_PVDLevel_2V8: PVD detection level set to 2.8V
* @arg PWR_PVDLevel_2V9: PVD detection level set to 2.9V
* @retval None
*/
void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel)
{
uint32_t tmpreg = 0;
/* Check the parameters */
assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel));
tmpreg = PWR->CR;
/* Clear PLS[7:5] bits */
tmpreg &= CR_PLS_MASK;
/* Set PLS[7:5] bits according to PWR_PVDLevel value */
tmpreg |= PWR_PVDLevel;
/* Store the new value */
PWR->CR = tmpreg;
}
/**
* @brief Enables or disables the WakeUp Pin functionality.
* @param NewState: new state of the WakeUp Pin functionality.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void PWR_WakeUpPinCmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
*(__IO uint32_t *) CSR_EWUP_BB = (uint32_t)NewState;
}
/**
* @brief Enters STOP mode.
* @param PWR_Regulator: specifies the regulator state in STOP mode.
* This parameter can be one of the following values:
* @arg PWR_Regulator_ON: STOP mode with regulator ON
* @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode
* @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
* This parameter can be one of the following values:
* @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction
* @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction
* @retval None
*/
void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry)
{
uint32_t tmpreg = 0;
/* Check the parameters */
assert_param(IS_PWR_REGULATOR(PWR_Regulator));
assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry));
/* Select the regulator state in STOP mode ---------------------------------*/
tmpreg = PWR->CR;
/* Clear PDDS and LPDS bits */
tmpreg &= CR_DS_MASK;
/* Set LPDS bit according to PWR_Regulator value */
tmpreg |= PWR_Regulator;
/* Store the new value */
PWR->CR = tmpreg;
/* Set SLEEPDEEP bit of Cortex System Control Register */
SCB->SCR |= SCB_SCR_SLEEPDEEP;
/* Select STOP mode entry --------------------------------------------------*/
if(PWR_STOPEntry == PWR_STOPEntry_WFI)
{
/* Request Wait For Interrupt */
__WFI();
}
else
{
/* Request Wait For Event */
__WFE();
}
/* Reset SLEEPDEEP bit of Cortex System Control Register */
SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP);
}
/**
* @brief Enters STANDBY mode.
* @param None
* @retval None
*/
void PWR_EnterSTANDBYMode(void)
{
/* Clear Wake-up flag */
PWR->CR |= PWR_CR_CWUF;
/* Select STANDBY mode */
PWR->CR |= PWR_CR_PDDS;
/* Set SLEEPDEEP bit of Cortex System Control Register */
SCB->SCR |= SCB_SCR_SLEEPDEEP;
/* This option is used to ensure that store operations are completed */
#if defined ( __CC_ARM )
__force_stores();
#endif
/* Request Wait For Interrupt */
__WFI();
}
/**
* @brief Checks whether the specified PWR flag is set or not.
* @param PWR_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* @arg PWR_FLAG_WU: Wake Up flag
* @arg PWR_FLAG_SB: StandBy flag
* @arg PWR_FLAG_PVDO: PVD Output
* @retval The new state of PWR_FLAG (SET or RESET).
*/
FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG)
{
FlagStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_PWR_GET_FLAG(PWR_FLAG));
if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
/* Return the flag status */
return bitstatus;
}
/**
* @brief Clears the PWR's pending flags.
* @param PWR_FLAG: specifies the flag to clear.
* This parameter can be one of the following values:
* @arg PWR_FLAG_WU: Wake Up flag
* @arg PWR_FLAG_SB: StandBy flag
* @retval None
*/
void PWR_ClearFlag(uint32_t PWR_FLAG)
{
/* Check the parameters */
assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG));
PWR->CR |= PWR_FLAG << 2;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
| gpl-2.0 |
kevinzyuan/ok6410 | arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c | 1619 | 2622 | /*
* This file define the irq handler for MSP SLM subsystem interrupts.
*
* Copyright 2005-2006 PMC-Sierra, Inc, derived from irq_cpu.c
* Author: Andrew Hughes, Andrew_Hughes@pmc-sierra.com
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/bitops.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <msp_slp_int.h>
#include <msp_regs.h>
static inline void unmask_msp_slp_irq(unsigned int irq)
{
/* check for PER interrupt range */
if (irq < MSP_PER_INTBASE)
*SLP_INT_MSK_REG |= (1 << (irq - MSP_SLP_INTBASE));
else
*PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE));
}
static inline void mask_msp_slp_irq(unsigned int irq)
{
/* check for PER interrupt range */
if (irq < MSP_PER_INTBASE)
*SLP_INT_MSK_REG &= ~(1 << (irq - MSP_SLP_INTBASE));
else
*PER_INT_MSK_REG &= ~(1 << (irq - MSP_PER_INTBASE));
}
/*
* While we ack the interrupt interrupts are disabled and thus we don't need
* to deal with concurrency issues. Same for msp_slp_irq_end.
*/
static inline void ack_msp_slp_irq(unsigned int irq)
{
/* check for PER interrupt range */
if (irq < MSP_PER_INTBASE)
*SLP_INT_STS_REG = (1 << (irq - MSP_SLP_INTBASE));
else
*PER_INT_STS_REG = (1 << (irq - MSP_PER_INTBASE));
}
static struct irq_chip msp_slp_irq_controller = {
.name = "MSP_SLP",
.ack = ack_msp_slp_irq,
.mask = mask_msp_slp_irq,
.unmask = unmask_msp_slp_irq,
};
void __init msp_slp_irq_init(void)
{
int i;
/* Mask/clear interrupts. */
*SLP_INT_MSK_REG = 0x00000000;
*PER_INT_MSK_REG = 0x00000000;
*SLP_INT_STS_REG = 0xFFFFFFFF;
*PER_INT_STS_REG = 0xFFFFFFFF;
/* initialize all the IRQ descriptors */
for (i = MSP_SLP_INTBASE; i < MSP_PER_INTBASE + 32; i++)
set_irq_chip_and_handler(i, &msp_slp_irq_controller,
handle_level_irq);
}
void msp_slp_irq_dispatch(void)
{
u32 pending;
int intbase;
intbase = MSP_SLP_INTBASE;
pending = *SLP_INT_STS_REG & *SLP_INT_MSK_REG;
/* check for PER interrupt */
if (pending == (1 << (MSP_INT_PER - MSP_SLP_INTBASE))) {
intbase = MSP_PER_INTBASE;
pending = *PER_INT_STS_REG & *PER_INT_MSK_REG;
}
/* check for spurious interrupt */
if (pending == 0x00000000) {
printk(KERN_ERR "Spurious %s interrupt?\n",
(intbase == MSP_SLP_INTBASE) ? "SLP" : "PER");
return;
}
/* dispatch the irq */
do_IRQ(ffs(pending) + intbase - 1);
}
| gpl-2.0 |
Radium-Devices/Radium_yu | drivers/staging/csr/putest.c | 2387 | 22976 | /*
* ***************************************************************************
* FILE: putest.c
*
* PURPOSE: putest related functions.
*
* Copyright (C) 2008-2009 by Cambridge Silicon Radio Ltd.
*
* Refer to LICENSE.txt included with this source code for details on
* the license terms.
*
* ***************************************************************************
*/
#include <linux/vmalloc.h>
#include <linux/firmware.h>
#include "unifi_priv.h"
#include "csr_wifi_hip_chiphelper.h"
#define UNIFI_PROC_BOTH 3
int unifi_putest_cmd52_read(unifi_priv_t *priv, unsigned char *arg)
{
struct unifi_putest_cmd52 cmd52_params;
u8 *arg_pos;
unsigned int cmd_param_size;
int r;
CsrResult csrResult;
unsigned char ret_buffer[32];
u8 *ret_buffer_pos;
u8 retries;
arg_pos = (u8*)(((unifi_putest_command_t*)arg) + 1);
if (get_user(cmd_param_size, (int*)arg_pos)) {
unifi_error(priv,
"unifi_putest_cmd52_read: Failed to get the argument\n");
return -EFAULT;
}
if (cmd_param_size != sizeof(struct unifi_putest_cmd52)) {
unifi_error(priv,
"unifi_putest_cmd52_read: cmd52 struct mismatch\n");
return -EINVAL;
}
arg_pos += sizeof(unsigned int);
if (copy_from_user(&cmd52_params,
(void*)arg_pos,
sizeof(struct unifi_putest_cmd52))) {
unifi_error(priv,
"unifi_putest_cmd52_read: Failed to get the cmd52 params\n");
return -EFAULT;
}
unifi_trace(priv, UDBG2, "cmd52r: func=%d addr=0x%x ",
cmd52_params.funcnum, cmd52_params.addr);
retries = 3;
CsrSdioClaim(priv->sdio);
do {
if (cmd52_params.funcnum == 0) {
csrResult = CsrSdioF0Read8(priv->sdio, cmd52_params.addr, &cmd52_params.data);
} else {
csrResult = CsrSdioRead8(priv->sdio, cmd52_params.addr, &cmd52_params.data);
}
} while (--retries && ((csrResult == CSR_SDIO_RESULT_CRC_ERROR) || (csrResult == CSR_SDIO_RESULT_TIMEOUT)));
CsrSdioRelease(priv->sdio);
if (csrResult != CSR_RESULT_SUCCESS) {
unifi_error(priv,
"\nunifi_putest_cmd52_read: Read8() failed (csrResult=0x%x)\n", csrResult);
return -EFAULT;
}
unifi_trace(priv, UDBG2, "data=%d\n", cmd52_params.data);
/* Copy the info to the out buffer */
*(unifi_putest_command_t*)ret_buffer = UNIFI_PUTEST_CMD52_READ;
ret_buffer_pos = (u8*)(((unifi_putest_command_t*)ret_buffer) + 1);
*(unsigned int*)ret_buffer_pos = sizeof(struct unifi_putest_cmd52);
ret_buffer_pos += sizeof(unsigned int);
memcpy(ret_buffer_pos, &cmd52_params, sizeof(struct unifi_putest_cmd52));
ret_buffer_pos += sizeof(struct unifi_putest_cmd52);
r = copy_to_user((void*)arg,
ret_buffer,
ret_buffer_pos - ret_buffer);
if (r) {
unifi_error(priv,
"unifi_putest_cmd52_read: Failed to return the data\n");
return -EFAULT;
}
return 0;
}
int unifi_putest_cmd52_write(unifi_priv_t *priv, unsigned char *arg)
{
struct unifi_putest_cmd52 cmd52_params;
u8 *arg_pos;
unsigned int cmd_param_size;
CsrResult csrResult;
u8 retries;
arg_pos = (u8*)(((unifi_putest_command_t*)arg) + 1);
if (get_user(cmd_param_size, (int*)arg_pos)) {
unifi_error(priv,
"unifi_putest_cmd52_write: Failed to get the argument\n");
return -EFAULT;
}
if (cmd_param_size != sizeof(struct unifi_putest_cmd52)) {
unifi_error(priv,
"unifi_putest_cmd52_write: cmd52 struct mismatch\n");
return -EINVAL;
}
arg_pos += sizeof(unsigned int);
if (copy_from_user(&cmd52_params,
(void*)(arg_pos),
sizeof(struct unifi_putest_cmd52))) {
unifi_error(priv,
"unifi_putest_cmd52_write: Failed to get the cmd52 params\n");
return -EFAULT;
}
unifi_trace(priv, UDBG2, "cmd52w: func=%d addr=0x%x data=%d\n",
cmd52_params.funcnum, cmd52_params.addr, cmd52_params.data);
retries = 3;
CsrSdioClaim(priv->sdio);
do {
if (cmd52_params.funcnum == 0) {
csrResult = CsrSdioF0Write8(priv->sdio, cmd52_params.addr, cmd52_params.data);
} else {
csrResult = CsrSdioWrite8(priv->sdio, cmd52_params.addr, cmd52_params.data);
}
} while (--retries && ((csrResult == CSR_SDIO_RESULT_CRC_ERROR) || (csrResult == CSR_SDIO_RESULT_TIMEOUT)));
CsrSdioRelease(priv->sdio);
if (csrResult != CSR_RESULT_SUCCESS) {
unifi_error(priv,
"unifi_putest_cmd52_write: Write8() failed (csrResult=0x%x)\n", csrResult);
return -EFAULT;
}
return 0;
}
int unifi_putest_gp_read16(unifi_priv_t *priv, unsigned char *arg)
{
struct unifi_putest_gp_rw16 gp_r16_params;
u8 *arg_pos;
unsigned int cmd_param_size;
int r;
CsrResult csrResult;
unsigned char ret_buffer[32];
u8 *ret_buffer_pos;
arg_pos = (u8*)(((unifi_putest_command_t*)arg) + 1);
if (get_user(cmd_param_size, (int*)arg_pos)) {
unifi_error(priv,
"unifi_putest_gp_read16: Failed to get the argument\n");
return -EFAULT;
}
if (cmd_param_size != sizeof(struct unifi_putest_gp_rw16)) {
unifi_error(priv,
"unifi_putest_gp_read16: struct mismatch\n");
return -EINVAL;
}
arg_pos += sizeof(unsigned int);
if (copy_from_user(&gp_r16_params,
(void*)arg_pos,
sizeof(struct unifi_putest_gp_rw16))) {
unifi_error(priv,
"unifi_putest_gp_read16: Failed to get the params\n");
return -EFAULT;
}
CsrSdioClaim(priv->sdio);
csrResult = unifi_card_read16(priv->card, gp_r16_params.addr, &gp_r16_params.data);
CsrSdioRelease(priv->sdio);
if (csrResult != CSR_RESULT_SUCCESS) {
unifi_error(priv,
"unifi_putest_gp_read16: unifi_card_read16() GP=0x%x failed (csrResult=0x%x)\n", gp_r16_params.addr, csrResult);
return -EFAULT;
}
unifi_trace(priv, UDBG2, "gp_r16: GP=0x%08x, data=0x%04x\n", gp_r16_params.addr, gp_r16_params.data);
/* Copy the info to the out buffer */
*(unifi_putest_command_t*)ret_buffer = UNIFI_PUTEST_GP_READ16;
ret_buffer_pos = (u8*)(((unifi_putest_command_t*)ret_buffer) + 1);
*(unsigned int*)ret_buffer_pos = sizeof(struct unifi_putest_gp_rw16);
ret_buffer_pos += sizeof(unsigned int);
memcpy(ret_buffer_pos, &gp_r16_params, sizeof(struct unifi_putest_gp_rw16));
ret_buffer_pos += sizeof(struct unifi_putest_gp_rw16);
r = copy_to_user((void*)arg,
ret_buffer,
ret_buffer_pos - ret_buffer);
if (r) {
unifi_error(priv,
"unifi_putest_gp_read16: Failed to return the data\n");
return -EFAULT;
}
return 0;
}
int unifi_putest_gp_write16(unifi_priv_t *priv, unsigned char *arg)
{
struct unifi_putest_gp_rw16 gp_w16_params;
u8 *arg_pos;
unsigned int cmd_param_size;
CsrResult csrResult;
arg_pos = (u8*)(((unifi_putest_command_t*)arg) + 1);
if (get_user(cmd_param_size, (int*)arg_pos)) {
unifi_error(priv,
"unifi_putest_gp_write16: Failed to get the argument\n");
return -EFAULT;
}
if (cmd_param_size != sizeof(struct unifi_putest_gp_rw16)) {
unifi_error(priv,
"unifi_putest_gp_write16: struct mismatch\n");
return -EINVAL;
}
arg_pos += sizeof(unsigned int);
if (copy_from_user(&gp_w16_params,
(void*)(arg_pos),
sizeof(struct unifi_putest_gp_rw16))) {
unifi_error(priv,
"unifi_putest_gp_write16: Failed to get the params\n");
return -EFAULT;
}
unifi_trace(priv, UDBG2, "gp_w16: GP=0x%08x, data=0x%04x\n", gp_w16_params.addr, gp_w16_params.data);
CsrSdioClaim(priv->sdio);
csrResult = unifi_card_write16(priv->card, gp_w16_params.addr, gp_w16_params.data);
CsrSdioRelease(priv->sdio);
if (csrResult != CSR_RESULT_SUCCESS) {
unifi_error(priv,
"unifi_putest_gp_write16: unifi_card_write16() GP=%x failed (csrResult=0x%x)\n", gp_w16_params.addr, csrResult);
return -EFAULT;
}
return 0;
}
int unifi_putest_set_sdio_clock(unifi_priv_t *priv, unsigned char *arg)
{
int sdio_clock_speed;
CsrResult csrResult;
if (get_user(sdio_clock_speed, (int*)(((unifi_putest_command_t*)arg) + 1))) {
unifi_error(priv,
"unifi_putest_set_sdio_clock: Failed to get the argument\n");
return -EFAULT;
}
unifi_trace(priv, UDBG2, "set sdio clock: %d KHz\n", sdio_clock_speed);
CsrSdioClaim(priv->sdio);
csrResult = CsrSdioMaxBusClockFrequencySet(priv->sdio, sdio_clock_speed * 1000);
CsrSdioRelease(priv->sdio);
if (csrResult != CSR_RESULT_SUCCESS) {
unifi_error(priv,
"unifi_putest_set_sdio_clock: Set clock failed (csrResult=0x%x)\n", csrResult);
return -EFAULT;
}
return 0;
}
int unifi_putest_start(unifi_priv_t *priv, unsigned char *arg)
{
int r;
CsrResult csrResult;
int already_in_test = priv->ptest_mode;
/* Ensure that sme_sys_suspend() doesn't power down the chip because:
* 1) Power is needed anyway for ptest.
* 2) The app code uses the START ioctl as a reset, so it gets called
* multiple times. If the app stops the XAPs, but the power_down/up
* sequence doesn't actually power down the chip, there can be problems
* resetting, because part of the power_up sequence disables function 1
*/
priv->ptest_mode = 1;
/* Suspend the SME and UniFi */
if (priv->sme_cli) {
r = sme_sys_suspend(priv);
if (r) {
unifi_error(priv,
"unifi_putest_start: failed to suspend UniFi\n");
return r;
}
}
/* Application may have stopped the XAPs, but they are needed for reset */
if (already_in_test) {
CsrSdioClaim(priv->sdio);
csrResult = unifi_start_processors(priv->card);
CsrSdioRelease(priv->sdio);
if (csrResult != CSR_RESULT_SUCCESS) {
unifi_error(priv, "Failed to start XAPs. Hard reset required.\n");
}
} else {
/* Ensure chip is powered for the case where there's no unifi_helper */
CsrSdioClaim(priv->sdio);
csrResult = CsrSdioPowerOn(priv->sdio);
CsrSdioRelease(priv->sdio);
if (csrResult != CSR_RESULT_SUCCESS) {
unifi_error(priv, "CsrSdioPowerOn csrResult = %d\n", csrResult);
}
}
CsrSdioClaim(priv->sdio);
csrResult = unifi_init(priv->card);
CsrSdioRelease(priv->sdio);
if (csrResult != CSR_RESULT_SUCCESS) {
unifi_error(priv,
"unifi_putest_start: failed to init UniFi\n");
return CsrHipResultToStatus(csrResult);
}
return 0;
}
int unifi_putest_stop(unifi_priv_t *priv, unsigned char *arg)
{
int r = 0;
CsrResult csrResult;
/* Application may have stopped the XAPs, but they are needed for reset */
CsrSdioClaim(priv->sdio);
csrResult = unifi_start_processors(priv->card);
CsrSdioRelease(priv->sdio);
if (csrResult != CSR_RESULT_SUCCESS) {
unifi_error(priv, "Failed to start XAPs. Hard reset required.\n");
}
/* PUTEST_STOP is also used to resume the XAPs after SME coredump.
* Don't power off the chip, leave that to the normal wifi-off which is
* about to carry on. No need to resume the SME either, as it wasn't suspended.
*/
if (priv->coredump_mode) {
priv->coredump_mode = 0;
return 0;
}
/* At this point function 1 is enabled and the XAPs are running, so it is
* safe to let the card power down. Power is restored later, asynchronously,
* during the wifi_on requested by the SME.
*/
CsrSdioClaim(priv->sdio);
CsrSdioPowerOff(priv->sdio);
CsrSdioRelease(priv->sdio);
/* Resume the SME and UniFi */
if (priv->sme_cli) {
r = sme_sys_resume(priv);
if (r) {
unifi_error(priv,
"unifi_putest_stop: failed to resume SME\n");
}
}
priv->ptest_mode = 0;
return r;
}
int unifi_putest_dl_fw(unifi_priv_t *priv, unsigned char *arg)
{
#define UF_PUTEST_MAX_FW_FILE_NAME 16
#define UNIFI_MAX_FW_PATH_LEN 32
unsigned int fw_name_length;
unsigned char fw_name[UF_PUTEST_MAX_FW_FILE_NAME+1];
unsigned char *name_buffer;
int postfix;
char fw_path[UNIFI_MAX_FW_PATH_LEN];
const struct firmware *fw_entry;
struct dlpriv temp_fw_sta;
int r;
CsrResult csrResult;
/* Get the f/w file name length */
if (get_user(fw_name_length, (unsigned int*)(((unifi_putest_command_t*)arg) + 1))) {
unifi_error(priv,
"unifi_putest_dl_fw: Failed to get the length argument\n");
return -EFAULT;
}
unifi_trace(priv, UDBG2, "unifi_putest_dl_fw: file name size = %d\n", fw_name_length);
/* Sanity check for the f/w file name length */
if (fw_name_length > UF_PUTEST_MAX_FW_FILE_NAME) {
unifi_error(priv,
"unifi_putest_dl_fw: F/W file name is too long\n");
return -EINVAL;
}
/* Get the f/w file name */
name_buffer = ((unsigned char*)arg) + sizeof(unifi_putest_command_t) + sizeof(unsigned int);
if (copy_from_user(fw_name, (void*)name_buffer, fw_name_length)) {
unifi_error(priv, "unifi_putest_dl_fw: Failed to get the file name\n");
return -EFAULT;
}
fw_name[fw_name_length] = '\0';
unifi_trace(priv, UDBG2, "unifi_putest_dl_fw: file = %s\n", fw_name);
/* Keep the existing f/w to a temp, we need to restore it later */
temp_fw_sta = priv->fw_sta;
/* Get the putest f/w */
postfix = priv->instance;
scnprintf(fw_path, UNIFI_MAX_FW_PATH_LEN, "unifi-sdio-%d/%s",
postfix, fw_name);
r = request_firmware(&fw_entry, fw_path, priv->unifi_device);
if (r == 0) {
priv->fw_sta.fw_desc = (void *)fw_entry;
priv->fw_sta.dl_data = fw_entry->data;
priv->fw_sta.dl_len = fw_entry->size;
} else {
unifi_error(priv, "Firmware file not available\n");
return -EINVAL;
}
/* Application may have stopped the XAPs, but they are needed for reset */
CsrSdioClaim(priv->sdio);
csrResult = unifi_start_processors(priv->card);
CsrSdioRelease(priv->sdio);
if (csrResult != CSR_RESULT_SUCCESS) {
unifi_error(priv, "Failed to start XAPs. Hard reset required.\n");
}
/* Download the f/w. On UF6xxx this will cause the f/w file to convert
* into patch format and download via the ROM boot loader
*/
CsrSdioClaim(priv->sdio);
csrResult = unifi_download(priv->card, 0x0c00);
CsrSdioRelease(priv->sdio);
if (csrResult != CSR_RESULT_SUCCESS) {
unifi_error(priv,
"unifi_putest_dl_fw: failed to download the f/w\n");
goto free_fw;
}
/* Free the putest f/w... */
free_fw:
uf_release_firmware(priv, &priv->fw_sta);
/* ... and restore the original f/w */
priv->fw_sta = temp_fw_sta;
return CsrHipResultToStatus(csrResult);
}
int unifi_putest_dl_fw_buff(unifi_priv_t *priv, unsigned char *arg)
{
unsigned int fw_length;
unsigned char *fw_buf = NULL;
unsigned char *fw_user_ptr;
struct dlpriv temp_fw_sta;
CsrResult csrResult;
/* Get the f/w buffer length */
if (get_user(fw_length, (unsigned int*)(((unifi_putest_command_t*)arg) + 1))) {
unifi_error(priv,
"unifi_putest_dl_fw_buff: Failed to get the length arg\n");
return -EFAULT;
}
unifi_trace(priv, UDBG2, "unifi_putest_dl_fw_buff: size = %d\n", fw_length);
/* Sanity check for the buffer length */
if (fw_length == 0 || fw_length > 0xfffffff) {
unifi_error(priv,
"unifi_putest_dl_fw_buff: buffer length bad %u\n", fw_length);
return -EINVAL;
}
/* Buffer for kernel copy of the f/w image */
fw_buf = kmalloc(fw_length, GFP_KERNEL);
if (!fw_buf) {
unifi_error(priv, "unifi_putest_dl_fw_buff: malloc fail\n");
return -ENOMEM;
}
/* Get the f/w image */
fw_user_ptr = ((unsigned char*)arg) + sizeof(unifi_putest_command_t) + sizeof(unsigned int);
if (copy_from_user(fw_buf, (void*)fw_user_ptr, fw_length)) {
unifi_error(priv, "unifi_putest_dl_fw_buff: Failed to get the buffer\n");
kfree(fw_buf);
return -EFAULT;
}
/* Save the existing f/w to a temp, we need to restore it later */
temp_fw_sta = priv->fw_sta;
/* Setting fw_desc NULL indicates to the core that no f/w file was loaded
* via the kernel request_firmware() mechanism. This indicates to the core
* that it shouldn't call release_firmware() after the download is done.
*/
priv->fw_sta.fw_desc = NULL; /* No OS f/w resource */
priv->fw_sta.dl_data = fw_buf;
priv->fw_sta.dl_len = fw_length;
/* Application may have stopped the XAPs, but they are needed for reset */
CsrSdioClaim(priv->sdio);
csrResult = unifi_start_processors(priv->card);
CsrSdioRelease(priv->sdio);
if (csrResult != CSR_RESULT_SUCCESS) {
unifi_error(priv, "Failed to start XAPs. Hard reset required.\n");
}
/* Download the f/w. On UF6xxx this will cause the f/w file to convert
* into patch format and download via the ROM boot loader
*/
CsrSdioClaim(priv->sdio);
csrResult = unifi_download(priv->card, 0x0c00);
CsrSdioRelease(priv->sdio);
if (csrResult != CSR_RESULT_SUCCESS) {
unifi_error(priv,
"unifi_putest_dl_fw_buff: failed to download the f/w\n");
goto free_fw;
}
free_fw:
/* Finished with the putest f/w, so restore the station f/w */
priv->fw_sta = temp_fw_sta;
kfree(fw_buf);
return CsrHipResultToStatus(csrResult);
}
int unifi_putest_coredump_prepare(unifi_priv_t *priv, unsigned char *arg)
{
u16 data_u16;
s32 i;
CsrResult r;
unifi_info(priv, "Preparing for SDIO coredump\n");
#if defined (CSR_WIFI_HIP_DEBUG_OFFLINE)
unifi_debug_buf_dump();
#endif
/* Sanity check that userspace hasn't called a PUTEST_START, because that
* would have reset UniFi, potentially power cycling it and losing context
*/
if (priv->ptest_mode) {
unifi_error(priv, "PUTEST_START shouldn't be used before a coredump\n");
}
/* Flag that the userspace has requested coredump. Even if this preparation
* fails, the SME will call PUTEST_STOP to tidy up.
*/
priv->coredump_mode = 1;
for (i = 0; i < 3; i++) {
CsrSdioClaim(priv->sdio);
r = CsrSdioRead16(priv->sdio, CHIP_HELPER_UNIFI_GBL_CHIP_VERSION*2, &data_u16);
CsrSdioRelease(priv->sdio);
if (r != CSR_RESULT_SUCCESS) {
unifi_info(priv, "Failed to read chip version! Try %d\n", i);
/* First try, re-enable function which may have been disabled by f/w panic */
if (i == 0) {
unifi_info(priv, "Try function enable\n");
CsrSdioClaim(priv->sdio);
r = CsrSdioFunctionEnable(priv->sdio);
CsrSdioRelease(priv->sdio);
if (r != CSR_RESULT_SUCCESS) {
unifi_error(priv, "CsrSdioFunctionEnable failed %d\n", r);
}
continue;
}
/* Subsequent tries, reset */
/* Set clock speed low */
CsrSdioClaim(priv->sdio);
r = CsrSdioMaxBusClockFrequencySet(priv->sdio, UNIFI_SDIO_CLOCK_SAFE_HZ);
CsrSdioRelease(priv->sdio);
if (r != CSR_RESULT_SUCCESS) {
unifi_error(priv, "CsrSdioMaxBusClockFrequencySet() failed %d\n", r);
}
/* Card software reset */
CsrSdioClaim(priv->sdio);
r = unifi_card_hard_reset(priv->card);
CsrSdioRelease(priv->sdio);
if (r != CSR_RESULT_SUCCESS) {
unifi_error(priv, "unifi_card_hard_reset() failed %d\n", r);
}
} else {
unifi_info(priv, "Read chip version of 0x%04x\n", data_u16);
break;
}
}
if (r != CSR_RESULT_SUCCESS) {
unifi_error(priv, "Failed to prepare chip\n");
return -EIO;
}
/* Stop the XAPs for coredump. The PUTEST_STOP must be called, e.g. at
* Raw SDIO deinit, to resume them.
*/
CsrSdioClaim(priv->sdio);
r = unifi_card_stop_processor(priv->card, UNIFI_PROC_BOTH);
CsrSdioRelease(priv->sdio);
if (r != CSR_RESULT_SUCCESS) {
unifi_error(priv, "Failed to stop processors\n");
}
return 0;
}
int unifi_putest_cmd52_block_read(unifi_priv_t *priv, unsigned char *arg)
{
struct unifi_putest_block_cmd52_r block_cmd52;
u8 *arg_pos;
unsigned int cmd_param_size;
CsrResult r;
u8 *block_local_buffer;
arg_pos = (u8*)(((unifi_putest_command_t*)arg) + 1);
if (get_user(cmd_param_size, (int*)arg_pos)) {
unifi_error(priv,
"cmd52r_block: Failed to get the argument\n");
return -EFAULT;
}
if (cmd_param_size != sizeof(struct unifi_putest_block_cmd52_r)) {
unifi_error(priv,
"cmd52r_block: cmd52 struct mismatch\n");
return -EINVAL;
}
arg_pos += sizeof(unsigned int);
if (copy_from_user(&block_cmd52,
(void*)arg_pos,
sizeof(struct unifi_putest_block_cmd52_r))) {
unifi_error(priv,
"cmd52r_block: Failed to get the cmd52 params\n");
return -EFAULT;
}
unifi_trace(priv, UDBG2, "cmd52r_block: func=%d addr=0x%x len=0x%x ",
block_cmd52.funcnum, block_cmd52.addr, block_cmd52.length);
block_local_buffer = vmalloc(block_cmd52.length);
if (block_local_buffer == NULL) {
unifi_error(priv, "cmd52r_block: Failed to allocate buffer\n");
return -ENOMEM;
}
CsrSdioClaim(priv->sdio);
r = unifi_card_readn(priv->card, block_cmd52.addr, block_local_buffer, block_cmd52.length);
CsrSdioRelease(priv->sdio);
if (r != CSR_RESULT_SUCCESS) {
unifi_error(priv, "cmd52r_block: unifi_readn failed\n");
return -EIO;
}
if (copy_to_user((void*)block_cmd52.data,
block_local_buffer,
block_cmd52.length)) {
unifi_error(priv,
"cmd52r_block: Failed to return the data\n");
return -EFAULT;
}
return 0;
}
| gpl-2.0 |
CaptainThrowback/android_kernel_htc_a32e | net/nfc/hci/hcp.c | 2387 | 4283 | /*
* Copyright (C) 2012 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the
* Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#define pr_fmt(fmt) "hci: %s: " fmt, __func__
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <net/nfc/hci.h>
#include "hci.h"
/*
* Payload is the HCP message data only. Instruction will be prepended.
* Guarantees that cb will be called upon completion or timeout delay
* counted from the moment the cmd is sent to the transport.
*/
int nfc_hci_hcp_message_tx(struct nfc_hci_dev *hdev, u8 pipe,
u8 type, u8 instruction,
const u8 *payload, size_t payload_len,
data_exchange_cb_t cb, void *cb_context,
unsigned long completion_delay)
{
struct nfc_dev *ndev = hdev->ndev;
struct hci_msg *cmd;
const u8 *ptr = payload;
int hci_len, err;
bool firstfrag = true;
cmd = kzalloc(sizeof(struct hci_msg), GFP_KERNEL);
if (cmd == NULL)
return -ENOMEM;
INIT_LIST_HEAD(&cmd->msg_l);
skb_queue_head_init(&cmd->msg_frags);
cmd->wait_response = (type == NFC_HCI_HCP_COMMAND) ? true : false;
cmd->cb = cb;
cmd->cb_context = cb_context;
cmd->completion_delay = completion_delay;
hci_len = payload_len + 1;
while (hci_len > 0) {
struct sk_buff *skb;
int skb_len, data_link_len;
struct hcp_packet *packet;
if (NFC_HCI_HCP_PACKET_HEADER_LEN + hci_len <=
hdev->max_data_link_payload)
data_link_len = hci_len;
else
data_link_len = hdev->max_data_link_payload -
NFC_HCI_HCP_PACKET_HEADER_LEN;
skb_len = ndev->tx_headroom + NFC_HCI_HCP_PACKET_HEADER_LEN +
data_link_len + ndev->tx_tailroom;
hci_len -= data_link_len;
skb = alloc_skb(skb_len, GFP_KERNEL);
if (skb == NULL) {
err = -ENOMEM;
goto out_skb_err;
}
skb_reserve(skb, ndev->tx_headroom);
skb_put(skb, NFC_HCI_HCP_PACKET_HEADER_LEN + data_link_len);
/* Only the last fragment will have the cb bit set to 1 */
packet = (struct hcp_packet *)skb->data;
packet->header = pipe;
if (firstfrag) {
firstfrag = false;
packet->message.header = HCP_HEADER(type, instruction);
if (ptr) {
memcpy(packet->message.data, ptr,
data_link_len - 1);
ptr += data_link_len - 1;
}
} else {
memcpy(&packet->message, ptr, data_link_len);
ptr += data_link_len;
}
/* This is the last fragment, set the cb bit */
if (hci_len == 0)
packet->header |= ~NFC_HCI_FRAGMENT;
skb_queue_tail(&cmd->msg_frags, skb);
}
mutex_lock(&hdev->msg_tx_mutex);
if (hdev->shutting_down) {
err = -ESHUTDOWN;
mutex_unlock(&hdev->msg_tx_mutex);
goto out_skb_err;
}
list_add_tail(&cmd->msg_l, &hdev->msg_tx_queue);
mutex_unlock(&hdev->msg_tx_mutex);
schedule_work(&hdev->msg_tx_work);
return 0;
out_skb_err:
skb_queue_purge(&cmd->msg_frags);
kfree(cmd);
return err;
}
u8 nfc_hci_pipe2gate(struct nfc_hci_dev *hdev, u8 pipe)
{
int gate;
for (gate = 0; gate < NFC_HCI_MAX_GATES; gate++)
if (hdev->gate2pipe[gate] == pipe)
return gate;
return 0xff;
}
/*
* Receive hcp message for pipe, with type and cmd.
* skb contains optional message data only.
*/
void nfc_hci_hcp_message_rx(struct nfc_hci_dev *hdev, u8 pipe, u8 type,
u8 instruction, struct sk_buff *skb)
{
switch (type) {
case NFC_HCI_HCP_RESPONSE:
nfc_hci_resp_received(hdev, instruction, skb);
break;
case NFC_HCI_HCP_COMMAND:
nfc_hci_cmd_received(hdev, pipe, instruction, skb);
break;
case NFC_HCI_HCP_EVENT:
nfc_hci_event_received(hdev, pipe, instruction, skb);
break;
default:
pr_err("UNKNOWN MSG Type %d, instruction=%d\n",
type, instruction);
kfree_skb(skb);
break;
}
}
| gpl-2.0 |
javilonas/Enki-SM-G901F_OLD-4.4.4 | drivers/staging/csr/init_hw.c | 2387 | 3309 | /*
* ---------------------------------------------------------------------------
* FILE: init_hw.c
*
* PURPOSE:
* Use the HIP core lib to initialise the UniFi chip.
* It is part of the porting exercise in Linux.
*
* Copyright (C) 2009 by Cambridge Silicon Radio Ltd.
*
* Refer to LICENSE.txt included with this source code for details on
* the license terms.
*
* ---------------------------------------------------------------------------
*/
#include "csr_wifi_hip_unifi.h"
#include "unifi_priv.h"
#define MAX_INIT_ATTEMPTS 4
extern int led_mask;
/*
* ---------------------------------------------------------------------------
* uf_init_hw
*
* Resets hardware, downloads and initialises f/w.
* This function demonstrates how to use the HIP core lib API
* to implement the SME unifi_sys_wifi_on_req() part of the SYS API.
*
* In a simple implementation, all this function needs to do is call
* unifi_init_card() and then unifi_card_info().
* In the Linux implementation, it will retry to initialise UniFi or
* try to debug the reasons if unifi_init_card() returns an error.
*
* Arguments:
* ospriv Pointer to OS driver structure for the device.
*
* Returns:
* O on success, non-zero otherwise.
*
* ---------------------------------------------------------------------------
*/
int
uf_init_hw(unifi_priv_t *priv)
{
int attempts = 0;
int priv_instance;
CsrResult csrResult = CSR_RESULT_FAILURE;
priv_instance = uf_find_priv(priv);
if (priv_instance == -1) {
unifi_warning(priv, "uf_init_hw: Unknown priv instance, will use fw_init[0]\n");
priv_instance = 0;
}
while (1) {
if (attempts > MAX_INIT_ATTEMPTS) {
unifi_error(priv, "Failed to initialise UniFi after %d attempts, "
"giving up.\n",
attempts);
break;
}
attempts++;
unifi_info(priv, "Initialising UniFi, attempt %d\n", attempts);
if (fw_init[priv_instance] > 0) {
unifi_notice(priv, "f/w init prevented by module parameter\n");
break;
} else if (fw_init[priv_instance] == 0) {
fw_init[priv_instance] ++;
}
/*
* Initialise driver core. This will perform a reset of UniFi
* internals, but not the SDIO CCCR.
*/
CsrSdioClaim(priv->sdio);
csrResult = unifi_init_card(priv->card, led_mask);
CsrSdioRelease(priv->sdio);
if (csrResult == CSR_WIFI_HIP_RESULT_NO_DEVICE) {
return CsrHipResultToStatus(csrResult);
}
if (csrResult == CSR_WIFI_HIP_RESULT_NOT_FOUND) {
unifi_error(priv, "Firmware file required, but not found.\n");
return CsrHipResultToStatus(csrResult);
}
if (csrResult != CSR_RESULT_SUCCESS) {
/* failed. Reset h/w and try again */
unifi_error(priv, "Failed to initialise UniFi chip.\n");
continue;
}
/* Get the version information from the lib_hip */
unifi_card_info(priv->card, &priv->card_info);
return CsrHipResultToStatus(csrResult);
}
return CsrHipResultToStatus(csrResult);
} /* uf_init_hw */
| gpl-2.0 |
Scorpio92/android_kernel_mx2 | drivers/media/video/saa7164/saa7164-encoder.c | 2387 | 38666 | /*
* Driver for the NXP SAA7164 PCIe bridge
*
* Copyright (c) 2010 Steven Toth <stoth@kernellabs.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
*
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "saa7164.h"
#define ENCODER_MAX_BITRATE 6500000
#define ENCODER_MIN_BITRATE 1000000
#define ENCODER_DEF_BITRATE 5000000
static struct saa7164_tvnorm saa7164_tvnorms[] = {
{
.name = "NTSC-M",
.id = V4L2_STD_NTSC_M,
}, {
.name = "NTSC-JP",
.id = V4L2_STD_NTSC_M_JP,
}
};
static const u32 saa7164_v4l2_ctrls[] = {
V4L2_CID_BRIGHTNESS,
V4L2_CID_CONTRAST,
V4L2_CID_SATURATION,
V4L2_CID_HUE,
V4L2_CID_AUDIO_VOLUME,
V4L2_CID_SHARPNESS,
V4L2_CID_MPEG_STREAM_TYPE,
V4L2_CID_MPEG_VIDEO_ASPECT,
V4L2_CID_MPEG_VIDEO_B_FRAMES,
V4L2_CID_MPEG_VIDEO_GOP_SIZE,
V4L2_CID_MPEG_AUDIO_MUTE,
V4L2_CID_MPEG_VIDEO_BITRATE_MODE,
V4L2_CID_MPEG_VIDEO_BITRATE,
V4L2_CID_MPEG_VIDEO_BITRATE_PEAK,
0
};
/* Take the encoder configuration form the port struct and
* flush it to the hardware.
*/
static void saa7164_encoder_configure(struct saa7164_port *port)
{
struct saa7164_dev *dev = port->dev;
dprintk(DBGLVL_ENC, "%s()\n", __func__);
port->encoder_params.width = port->width;
port->encoder_params.height = port->height;
port->encoder_params.is_50hz =
(port->encodernorm.id & V4L2_STD_625_50) != 0;
/* Set up the DIF (enable it) for analog mode by default */
saa7164_api_initialize_dif(port);
/* Configure the correct video standard */
saa7164_api_configure_dif(port, port->encodernorm.id);
/* Ensure the audio decoder is correct configured */
saa7164_api_set_audio_std(port);
}
static int saa7164_encoder_buffers_dealloc(struct saa7164_port *port)
{
struct list_head *c, *n, *p, *q, *l, *v;
struct saa7164_dev *dev = port->dev;
struct saa7164_buffer *buf;
struct saa7164_user_buffer *ubuf;
/* Remove any allocated buffers */
mutex_lock(&port->dmaqueue_lock);
dprintk(DBGLVL_ENC, "%s(port=%d) dmaqueue\n", __func__, port->nr);
list_for_each_safe(c, n, &port->dmaqueue.list) {
buf = list_entry(c, struct saa7164_buffer, list);
list_del(c);
saa7164_buffer_dealloc(buf);
}
dprintk(DBGLVL_ENC, "%s(port=%d) used\n", __func__, port->nr);
list_for_each_safe(p, q, &port->list_buf_used.list) {
ubuf = list_entry(p, struct saa7164_user_buffer, list);
list_del(p);
saa7164_buffer_dealloc_user(ubuf);
}
dprintk(DBGLVL_ENC, "%s(port=%d) free\n", __func__, port->nr);
list_for_each_safe(l, v, &port->list_buf_free.list) {
ubuf = list_entry(l, struct saa7164_user_buffer, list);
list_del(l);
saa7164_buffer_dealloc_user(ubuf);
}
mutex_unlock(&port->dmaqueue_lock);
dprintk(DBGLVL_ENC, "%s(port=%d) done\n", __func__, port->nr);
return 0;
}
/* Dynamic buffer switch at encoder start time */
static int saa7164_encoder_buffers_alloc(struct saa7164_port *port)
{
struct saa7164_dev *dev = port->dev;
struct saa7164_buffer *buf;
struct saa7164_user_buffer *ubuf;
struct tmHWStreamParameters *params = &port->hw_streamingparams;
int result = -ENODEV, i;
int len = 0;
dprintk(DBGLVL_ENC, "%s()\n", __func__);
if (port->encoder_params.stream_type ==
V4L2_MPEG_STREAM_TYPE_MPEG2_PS) {
dprintk(DBGLVL_ENC,
"%s() type=V4L2_MPEG_STREAM_TYPE_MPEG2_PS\n",
__func__);
params->samplesperline = 128;
params->numberoflines = 256;
params->pitch = 128;
params->numpagetables = 2 +
((SAA7164_PS_NUMBER_OF_LINES * 128) / PAGE_SIZE);
} else
if (port->encoder_params.stream_type ==
V4L2_MPEG_STREAM_TYPE_MPEG2_TS) {
dprintk(DBGLVL_ENC,
"%s() type=V4L2_MPEG_STREAM_TYPE_MPEG2_TS\n",
__func__);
params->samplesperline = 188;
params->numberoflines = 312;
params->pitch = 188;
params->numpagetables = 2 +
((SAA7164_TS_NUMBER_OF_LINES * 188) / PAGE_SIZE);
} else
BUG();
/* Init and establish defaults */
params->bitspersample = 8;
params->linethreshold = 0;
params->pagetablelistvirt = NULL;
params->pagetablelistphys = NULL;
params->numpagetableentries = port->hwcfg.buffercount;
/* Allocate the PCI resources, buffers (hard) */
for (i = 0; i < port->hwcfg.buffercount; i++) {
buf = saa7164_buffer_alloc(port,
params->numberoflines *
params->pitch);
if (!buf) {
printk(KERN_ERR "%s() failed "
"(errno = %d), unable to allocate buffer\n",
__func__, result);
result = -ENOMEM;
goto failed;
} else {
mutex_lock(&port->dmaqueue_lock);
list_add_tail(&buf->list, &port->dmaqueue.list);
mutex_unlock(&port->dmaqueue_lock);
}
}
/* Allocate some kernel buffers for copying
* to userpsace.
*/
len = params->numberoflines * params->pitch;
if (encoder_buffers < 16)
encoder_buffers = 16;
if (encoder_buffers > 512)
encoder_buffers = 512;
for (i = 0; i < encoder_buffers; i++) {
ubuf = saa7164_buffer_alloc_user(dev, len);
if (ubuf) {
mutex_lock(&port->dmaqueue_lock);
list_add_tail(&ubuf->list, &port->list_buf_free.list);
mutex_unlock(&port->dmaqueue_lock);
}
}
result = 0;
failed:
return result;
}
static int saa7164_encoder_initialize(struct saa7164_port *port)
{
saa7164_encoder_configure(port);
return 0;
}
/* -- V4L2 --------------------------------------------------------- */
static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id *id)
{
struct saa7164_encoder_fh *fh = file->private_data;
struct saa7164_port *port = fh->port;
struct saa7164_dev *dev = port->dev;
unsigned int i;
dprintk(DBGLVL_ENC, "%s(id=0x%x)\n", __func__, (u32)*id);
for (i = 0; i < ARRAY_SIZE(saa7164_tvnorms); i++) {
if (*id & saa7164_tvnorms[i].id)
break;
}
if (i == ARRAY_SIZE(saa7164_tvnorms))
return -EINVAL;
port->encodernorm = saa7164_tvnorms[i];
/* Update the audio decoder while is not running in
* auto detect mode.
*/
saa7164_api_set_audio_std(port);
dprintk(DBGLVL_ENC, "%s(id=0x%x) OK\n", __func__, (u32)*id);
return 0;
}
static int vidioc_enum_input(struct file *file, void *priv,
struct v4l2_input *i)
{
int n;
char *inputs[] = { "tuner", "composite", "svideo", "aux",
"composite 2", "svideo 2", "aux 2" };
if (i->index >= 7)
return -EINVAL;
strcpy(i->name, inputs[i->index]);
if (i->index == 0)
i->type = V4L2_INPUT_TYPE_TUNER;
else
i->type = V4L2_INPUT_TYPE_CAMERA;
for (n = 0; n < ARRAY_SIZE(saa7164_tvnorms); n++)
i->std |= saa7164_tvnorms[n].id;
return 0;
}
static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
{
struct saa7164_encoder_fh *fh = file->private_data;
struct saa7164_port *port = fh->port;
struct saa7164_dev *dev = port->dev;
if (saa7164_api_get_videomux(port) != SAA_OK)
return -EIO;
*i = (port->mux_input - 1);
dprintk(DBGLVL_ENC, "%s() input=%d\n", __func__, *i);
return 0;
}
static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
{
struct saa7164_encoder_fh *fh = file->private_data;
struct saa7164_port *port = fh->port;
struct saa7164_dev *dev = port->dev;
dprintk(DBGLVL_ENC, "%s() input=%d\n", __func__, i);
if (i >= 7)
return -EINVAL;
port->mux_input = i + 1;
if (saa7164_api_set_videomux(port) != SAA_OK)
return -EIO;
return 0;
}
static int vidioc_g_tuner(struct file *file, void *priv,
struct v4l2_tuner *t)
{
struct saa7164_encoder_fh *fh = file->private_data;
struct saa7164_port *port = fh->port;
struct saa7164_dev *dev = port->dev;
if (0 != t->index)
return -EINVAL;
strcpy(t->name, "tuner");
t->type = V4L2_TUNER_ANALOG_TV;
t->capability = V4L2_TUNER_CAP_NORM | V4L2_TUNER_CAP_STEREO;
dprintk(DBGLVL_ENC, "VIDIOC_G_TUNER: tuner type %d\n", t->type);
return 0;
}
static int vidioc_s_tuner(struct file *file, void *priv,
struct v4l2_tuner *t)
{
/* Update the A/V core */
return 0;
}
static int vidioc_g_frequency(struct file *file, void *priv,
struct v4l2_frequency *f)
{
struct saa7164_encoder_fh *fh = file->private_data;
struct saa7164_port *port = fh->port;
f->type = V4L2_TUNER_ANALOG_TV;
f->frequency = port->freq;
return 0;
}
static int vidioc_s_frequency(struct file *file, void *priv,
struct v4l2_frequency *f)
{
struct saa7164_encoder_fh *fh = file->private_data;
struct saa7164_port *port = fh->port;
struct saa7164_dev *dev = port->dev;
struct saa7164_port *tsport;
struct dvb_frontend *fe;
/* TODO: Pull this for the std */
struct analog_parameters params = {
.mode = V4L2_TUNER_ANALOG_TV,
.audmode = V4L2_TUNER_MODE_STEREO,
.std = port->encodernorm.id,
.frequency = f->frequency
};
/* Stop the encoder */
dprintk(DBGLVL_ENC, "%s() frequency=%d tuner=%d\n", __func__,
f->frequency, f->tuner);
if (f->tuner != 0)
return -EINVAL;
if (f->type != V4L2_TUNER_ANALOG_TV)
return -EINVAL;
port->freq = f->frequency;
/* Update the hardware */
if (port->nr == SAA7164_PORT_ENC1)
tsport = &dev->ports[SAA7164_PORT_TS1];
else
if (port->nr == SAA7164_PORT_ENC2)
tsport = &dev->ports[SAA7164_PORT_TS2];
else
BUG();
fe = tsport->dvb.frontend;
if (fe && fe->ops.tuner_ops.set_analog_params)
fe->ops.tuner_ops.set_analog_params(fe, ¶ms);
else
printk(KERN_ERR "%s() No analog tuner, aborting\n", __func__);
saa7164_encoder_initialize(port);
return 0;
}
static int vidioc_g_ctrl(struct file *file, void *priv,
struct v4l2_control *ctl)
{
struct saa7164_encoder_fh *fh = file->private_data;
struct saa7164_port *port = fh->port;
struct saa7164_dev *dev = port->dev;
dprintk(DBGLVL_ENC, "%s(id=%d, value=%d)\n", __func__,
ctl->id, ctl->value);
switch (ctl->id) {
case V4L2_CID_BRIGHTNESS:
ctl->value = port->ctl_brightness;
break;
case V4L2_CID_CONTRAST:
ctl->value = port->ctl_contrast;
break;
case V4L2_CID_SATURATION:
ctl->value = port->ctl_saturation;
break;
case V4L2_CID_HUE:
ctl->value = port->ctl_hue;
break;
case V4L2_CID_SHARPNESS:
ctl->value = port->ctl_sharpness;
break;
case V4L2_CID_AUDIO_VOLUME:
ctl->value = port->ctl_volume;
break;
default:
return -EINVAL;
}
return 0;
}
static int vidioc_s_ctrl(struct file *file, void *priv,
struct v4l2_control *ctl)
{
struct saa7164_encoder_fh *fh = file->private_data;
struct saa7164_port *port = fh->port;
struct saa7164_dev *dev = port->dev;
int ret = 0;
dprintk(DBGLVL_ENC, "%s(id=%d, value=%d)\n", __func__,
ctl->id, ctl->value);
switch (ctl->id) {
case V4L2_CID_BRIGHTNESS:
if ((ctl->value >= 0) && (ctl->value <= 255)) {
port->ctl_brightness = ctl->value;
saa7164_api_set_usercontrol(port,
PU_BRIGHTNESS_CONTROL);
} else
ret = -EINVAL;
break;
case V4L2_CID_CONTRAST:
if ((ctl->value >= 0) && (ctl->value <= 255)) {
port->ctl_contrast = ctl->value;
saa7164_api_set_usercontrol(port, PU_CONTRAST_CONTROL);
} else
ret = -EINVAL;
break;
case V4L2_CID_SATURATION:
if ((ctl->value >= 0) && (ctl->value <= 255)) {
port->ctl_saturation = ctl->value;
saa7164_api_set_usercontrol(port,
PU_SATURATION_CONTROL);
} else
ret = -EINVAL;
break;
case V4L2_CID_HUE:
if ((ctl->value >= 0) && (ctl->value <= 255)) {
port->ctl_hue = ctl->value;
saa7164_api_set_usercontrol(port, PU_HUE_CONTROL);
} else
ret = -EINVAL;
break;
case V4L2_CID_SHARPNESS:
if ((ctl->value >= 0) && (ctl->value <= 255)) {
port->ctl_sharpness = ctl->value;
saa7164_api_set_usercontrol(port, PU_SHARPNESS_CONTROL);
} else
ret = -EINVAL;
break;
case V4L2_CID_AUDIO_VOLUME:
if ((ctl->value >= -83) && (ctl->value <= 24)) {
port->ctl_volume = ctl->value;
saa7164_api_set_audio_volume(port, port->ctl_volume);
} else
ret = -EINVAL;
break;
default:
ret = -EINVAL;
}
return ret;
}
static int saa7164_get_ctrl(struct saa7164_port *port,
struct v4l2_ext_control *ctrl)
{
struct saa7164_encoder_params *params = &port->encoder_params;
switch (ctrl->id) {
case V4L2_CID_MPEG_VIDEO_BITRATE:
ctrl->value = params->bitrate;
break;
case V4L2_CID_MPEG_STREAM_TYPE:
ctrl->value = params->stream_type;
break;
case V4L2_CID_MPEG_AUDIO_MUTE:
ctrl->value = params->ctl_mute;
break;
case V4L2_CID_MPEG_VIDEO_ASPECT:
ctrl->value = params->ctl_aspect;
break;
case V4L2_CID_MPEG_VIDEO_BITRATE_MODE:
ctrl->value = params->bitrate_mode;
break;
case V4L2_CID_MPEG_VIDEO_B_FRAMES:
ctrl->value = params->refdist;
break;
case V4L2_CID_MPEG_VIDEO_BITRATE_PEAK:
ctrl->value = params->bitrate_peak;
break;
case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
ctrl->value = params->gop_size;
break;
default:
return -EINVAL;
}
return 0;
}
static int vidioc_g_ext_ctrls(struct file *file, void *priv,
struct v4l2_ext_controls *ctrls)
{
struct saa7164_encoder_fh *fh = file->private_data;
struct saa7164_port *port = fh->port;
int i, err = 0;
if (ctrls->ctrl_class == V4L2_CTRL_CLASS_MPEG) {
for (i = 0; i < ctrls->count; i++) {
struct v4l2_ext_control *ctrl = ctrls->controls + i;
err = saa7164_get_ctrl(port, ctrl);
if (err) {
ctrls->error_idx = i;
break;
}
}
return err;
}
return -EINVAL;
}
static int saa7164_try_ctrl(struct v4l2_ext_control *ctrl, int ac3)
{
int ret = -EINVAL;
switch (ctrl->id) {
case V4L2_CID_MPEG_VIDEO_BITRATE:
if ((ctrl->value >= ENCODER_MIN_BITRATE) &&
(ctrl->value <= ENCODER_MAX_BITRATE))
ret = 0;
break;
case V4L2_CID_MPEG_STREAM_TYPE:
if ((ctrl->value == V4L2_MPEG_STREAM_TYPE_MPEG2_PS) ||
(ctrl->value == V4L2_MPEG_STREAM_TYPE_MPEG2_TS))
ret = 0;
break;
case V4L2_CID_MPEG_AUDIO_MUTE:
if ((ctrl->value >= 0) &&
(ctrl->value <= 1))
ret = 0;
break;
case V4L2_CID_MPEG_VIDEO_ASPECT:
if ((ctrl->value >= V4L2_MPEG_VIDEO_ASPECT_1x1) &&
(ctrl->value <= V4L2_MPEG_VIDEO_ASPECT_221x100))
ret = 0;
break;
case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
if ((ctrl->value >= 0) &&
(ctrl->value <= 255))
ret = 0;
break;
case V4L2_CID_MPEG_VIDEO_BITRATE_MODE:
if ((ctrl->value == V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) ||
(ctrl->value == V4L2_MPEG_VIDEO_BITRATE_MODE_CBR))
ret = 0;
break;
case V4L2_CID_MPEG_VIDEO_B_FRAMES:
if ((ctrl->value >= 1) &&
(ctrl->value <= 3))
ret = 0;
break;
case V4L2_CID_MPEG_VIDEO_BITRATE_PEAK:
if ((ctrl->value >= ENCODER_MIN_BITRATE) &&
(ctrl->value <= ENCODER_MAX_BITRATE))
ret = 0;
break;
default:
ret = -EINVAL;
}
return ret;
}
static int vidioc_try_ext_ctrls(struct file *file, void *priv,
struct v4l2_ext_controls *ctrls)
{
int i, err = 0;
if (ctrls->ctrl_class == V4L2_CTRL_CLASS_MPEG) {
for (i = 0; i < ctrls->count; i++) {
struct v4l2_ext_control *ctrl = ctrls->controls + i;
err = saa7164_try_ctrl(ctrl, 0);
if (err) {
ctrls->error_idx = i;
break;
}
}
return err;
}
return -EINVAL;
}
static int saa7164_set_ctrl(struct saa7164_port *port,
struct v4l2_ext_control *ctrl)
{
struct saa7164_encoder_params *params = &port->encoder_params;
int ret = 0;
switch (ctrl->id) {
case V4L2_CID_MPEG_VIDEO_BITRATE:
params->bitrate = ctrl->value;
break;
case V4L2_CID_MPEG_STREAM_TYPE:
params->stream_type = ctrl->value;
break;
case V4L2_CID_MPEG_AUDIO_MUTE:
params->ctl_mute = ctrl->value;
ret = saa7164_api_audio_mute(port, params->ctl_mute);
if (ret != SAA_OK) {
printk(KERN_ERR "%s() error, ret = 0x%x\n", __func__,
ret);
ret = -EIO;
}
break;
case V4L2_CID_MPEG_VIDEO_ASPECT:
params->ctl_aspect = ctrl->value;
ret = saa7164_api_set_aspect_ratio(port);
if (ret != SAA_OK) {
printk(KERN_ERR "%s() error, ret = 0x%x\n", __func__,
ret);
ret = -EIO;
}
break;
case V4L2_CID_MPEG_VIDEO_BITRATE_MODE:
params->bitrate_mode = ctrl->value;
break;
case V4L2_CID_MPEG_VIDEO_B_FRAMES:
params->refdist = ctrl->value;
break;
case V4L2_CID_MPEG_VIDEO_BITRATE_PEAK:
params->bitrate_peak = ctrl->value;
break;
case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
params->gop_size = ctrl->value;
break;
default:
return -EINVAL;
}
/* TODO: Update the hardware */
return ret;
}
static int vidioc_s_ext_ctrls(struct file *file, void *priv,
struct v4l2_ext_controls *ctrls)
{
struct saa7164_encoder_fh *fh = file->private_data;
struct saa7164_port *port = fh->port;
int i, err = 0;
if (ctrls->ctrl_class == V4L2_CTRL_CLASS_MPEG) {
for (i = 0; i < ctrls->count; i++) {
struct v4l2_ext_control *ctrl = ctrls->controls + i;
err = saa7164_try_ctrl(ctrl, 0);
if (err) {
ctrls->error_idx = i;
break;
}
err = saa7164_set_ctrl(port, ctrl);
if (err) {
ctrls->error_idx = i;
break;
}
}
return err;
}
return -EINVAL;
}
static int vidioc_querycap(struct file *file, void *priv,
struct v4l2_capability *cap)
{
struct saa7164_encoder_fh *fh = file->private_data;
struct saa7164_port *port = fh->port;
struct saa7164_dev *dev = port->dev;
strcpy(cap->driver, dev->name);
strlcpy(cap->card, saa7164_boards[dev->board].name,
sizeof(cap->card));
sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci));
cap->capabilities =
V4L2_CAP_VIDEO_CAPTURE |
V4L2_CAP_READWRITE |
0;
cap->capabilities |= V4L2_CAP_TUNER;
cap->version = 0;
return 0;
}
static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
struct v4l2_fmtdesc *f)
{
if (f->index != 0)
return -EINVAL;
strlcpy(f->description, "MPEG", sizeof(f->description));
f->pixelformat = V4L2_PIX_FMT_MPEG;
return 0;
}
static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
struct v4l2_format *f)
{
struct saa7164_encoder_fh *fh = file->private_data;
struct saa7164_port *port = fh->port;
struct saa7164_dev *dev = port->dev;
f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG;
f->fmt.pix.bytesperline = 0;
f->fmt.pix.sizeimage =
port->ts_packet_size * port->ts_packet_count;
f->fmt.pix.colorspace = 0;
f->fmt.pix.width = port->width;
f->fmt.pix.height = port->height;
dprintk(DBGLVL_ENC, "VIDIOC_G_FMT: w: %d, h: %d\n",
port->width, port->height);
return 0;
}
static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
struct v4l2_format *f)
{
struct saa7164_encoder_fh *fh = file->private_data;
struct saa7164_port *port = fh->port;
struct saa7164_dev *dev = port->dev;
f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG;
f->fmt.pix.bytesperline = 0;
f->fmt.pix.sizeimage =
port->ts_packet_size * port->ts_packet_count;
f->fmt.pix.colorspace = 0;
dprintk(DBGLVL_ENC, "VIDIOC_TRY_FMT: w: %d, h: %d\n",
port->width, port->height);
return 0;
}
static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
struct v4l2_format *f)
{
struct saa7164_encoder_fh *fh = file->private_data;
struct saa7164_port *port = fh->port;
struct saa7164_dev *dev = port->dev;
f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG;
f->fmt.pix.bytesperline = 0;
f->fmt.pix.sizeimage =
port->ts_packet_size * port->ts_packet_count;
f->fmt.pix.colorspace = 0;
dprintk(DBGLVL_ENC, "VIDIOC_S_FMT: w: %d, h: %d, f: %d\n",
f->fmt.pix.width, f->fmt.pix.height, f->fmt.pix.field);
return 0;
}
static int vidioc_log_status(struct file *file, void *priv)
{
return 0;
}
static int fill_queryctrl(struct saa7164_encoder_params *params,
struct v4l2_queryctrl *c)
{
switch (c->id) {
case V4L2_CID_BRIGHTNESS:
return v4l2_ctrl_query_fill(c, 0x0, 0xff, 1, 127);
case V4L2_CID_CONTRAST:
return v4l2_ctrl_query_fill(c, 0x0, 0xff, 1, 66);
case V4L2_CID_SATURATION:
return v4l2_ctrl_query_fill(c, 0x0, 0xff, 1, 62);
case V4L2_CID_HUE:
return v4l2_ctrl_query_fill(c, 0x0, 0xff, 1, 128);
case V4L2_CID_SHARPNESS:
return v4l2_ctrl_query_fill(c, 0x0, 0x0f, 1, 8);
case V4L2_CID_MPEG_AUDIO_MUTE:
return v4l2_ctrl_query_fill(c, 0x0, 0x01, 1, 0);
case V4L2_CID_AUDIO_VOLUME:
return v4l2_ctrl_query_fill(c, -83, 24, 1, 20);
case V4L2_CID_MPEG_VIDEO_BITRATE:
return v4l2_ctrl_query_fill(c,
ENCODER_MIN_BITRATE, ENCODER_MAX_BITRATE,
100000, ENCODER_DEF_BITRATE);
case V4L2_CID_MPEG_STREAM_TYPE:
return v4l2_ctrl_query_fill(c,
V4L2_MPEG_STREAM_TYPE_MPEG2_PS,
V4L2_MPEG_STREAM_TYPE_MPEG2_TS,
1, V4L2_MPEG_STREAM_TYPE_MPEG2_PS);
case V4L2_CID_MPEG_VIDEO_ASPECT:
return v4l2_ctrl_query_fill(c,
V4L2_MPEG_VIDEO_ASPECT_1x1,
V4L2_MPEG_VIDEO_ASPECT_221x100,
1, V4L2_MPEG_VIDEO_ASPECT_4x3);
case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
return v4l2_ctrl_query_fill(c, 1, 255, 1, 15);
case V4L2_CID_MPEG_VIDEO_BITRATE_MODE:
return v4l2_ctrl_query_fill(c,
V4L2_MPEG_VIDEO_BITRATE_MODE_VBR,
V4L2_MPEG_VIDEO_BITRATE_MODE_CBR,
1, V4L2_MPEG_VIDEO_BITRATE_MODE_VBR);
case V4L2_CID_MPEG_VIDEO_B_FRAMES:
return v4l2_ctrl_query_fill(c,
1, 3, 1, 1);
case V4L2_CID_MPEG_VIDEO_BITRATE_PEAK:
return v4l2_ctrl_query_fill(c,
ENCODER_MIN_BITRATE, ENCODER_MAX_BITRATE,
100000, ENCODER_DEF_BITRATE);
default:
return -EINVAL;
}
}
static int vidioc_queryctrl(struct file *file, void *priv,
struct v4l2_queryctrl *c)
{
struct saa7164_encoder_fh *fh = priv;
struct saa7164_port *port = fh->port;
int i, next;
u32 id = c->id;
memset(c, 0, sizeof(*c));
next = !!(id & V4L2_CTRL_FLAG_NEXT_CTRL);
c->id = id & ~V4L2_CTRL_FLAG_NEXT_CTRL;
for (i = 0; i < ARRAY_SIZE(saa7164_v4l2_ctrls); i++) {
if (next) {
if (c->id < saa7164_v4l2_ctrls[i])
c->id = saa7164_v4l2_ctrls[i];
else
continue;
}
if (c->id == saa7164_v4l2_ctrls[i])
return fill_queryctrl(&port->encoder_params, c);
if (c->id < saa7164_v4l2_ctrls[i])
break;
}
return -EINVAL;
}
static int saa7164_encoder_stop_port(struct saa7164_port *port)
{
struct saa7164_dev *dev = port->dev;
int ret;
ret = saa7164_api_transition_port(port, SAA_DMASTATE_STOP);
if ((ret != SAA_OK) && (ret != SAA_ERR_ALREADY_STOPPED)) {
printk(KERN_ERR "%s() stop transition failed, ret = 0x%x\n",
__func__, ret);
ret = -EIO;
} else {
dprintk(DBGLVL_ENC, "%s() Stopped\n", __func__);
ret = 0;
}
return ret;
}
static int saa7164_encoder_acquire_port(struct saa7164_port *port)
{
struct saa7164_dev *dev = port->dev;
int ret;
ret = saa7164_api_transition_port(port, SAA_DMASTATE_ACQUIRE);
if ((ret != SAA_OK) && (ret != SAA_ERR_ALREADY_STOPPED)) {
printk(KERN_ERR "%s() acquire transition failed, ret = 0x%x\n",
__func__, ret);
ret = -EIO;
} else {
dprintk(DBGLVL_ENC, "%s() Acquired\n", __func__);
ret = 0;
}
return ret;
}
static int saa7164_encoder_pause_port(struct saa7164_port *port)
{
struct saa7164_dev *dev = port->dev;
int ret;
ret = saa7164_api_transition_port(port, SAA_DMASTATE_PAUSE);
if ((ret != SAA_OK) && (ret != SAA_ERR_ALREADY_STOPPED)) {
printk(KERN_ERR "%s() pause transition failed, ret = 0x%x\n",
__func__, ret);
ret = -EIO;
} else {
dprintk(DBGLVL_ENC, "%s() Paused\n", __func__);
ret = 0;
}
return ret;
}
/* Firmware is very windows centric, meaning you have to transition
* the part through AVStream / KS Windows stages, forwards or backwards.
* States are: stopped, acquired (h/w), paused, started.
* We have to leave here will all of the soft buffers on the free list,
* else the cfg_post() func won't have soft buffers to correctly configure.
*/
static int saa7164_encoder_stop_streaming(struct saa7164_port *port)
{
struct saa7164_dev *dev = port->dev;
struct saa7164_buffer *buf;
struct saa7164_user_buffer *ubuf;
struct list_head *c, *n;
int ret;
dprintk(DBGLVL_ENC, "%s(port=%d)\n", __func__, port->nr);
ret = saa7164_encoder_pause_port(port);
ret = saa7164_encoder_acquire_port(port);
ret = saa7164_encoder_stop_port(port);
dprintk(DBGLVL_ENC, "%s(port=%d) Hardware stopped\n", __func__,
port->nr);
/* Reset the state of any allocated buffer resources */
mutex_lock(&port->dmaqueue_lock);
/* Reset the hard and soft buffer state */
list_for_each_safe(c, n, &port->dmaqueue.list) {
buf = list_entry(c, struct saa7164_buffer, list);
buf->flags = SAA7164_BUFFER_FREE;
buf->pos = 0;
}
list_for_each_safe(c, n, &port->list_buf_used.list) {
ubuf = list_entry(c, struct saa7164_user_buffer, list);
ubuf->pos = 0;
list_move_tail(&ubuf->list, &port->list_buf_free.list);
}
mutex_unlock(&port->dmaqueue_lock);
/* Free any allocated resources */
saa7164_encoder_buffers_dealloc(port);
dprintk(DBGLVL_ENC, "%s(port=%d) Released\n", __func__, port->nr);
return ret;
}
static int saa7164_encoder_start_streaming(struct saa7164_port *port)
{
struct saa7164_dev *dev = port->dev;
int result, ret = 0;
dprintk(DBGLVL_ENC, "%s(port=%d)\n", __func__, port->nr);
port->done_first_interrupt = 0;
/* allocate all of the PCIe DMA buffer resources on the fly,
* allowing switching between TS and PS payloads without
* requiring a complete driver reload.
*/
saa7164_encoder_buffers_alloc(port);
/* Configure the encoder with any cache values */
saa7164_api_set_encoder(port);
saa7164_api_get_encoder(port);
/* Place the empty buffers on the hardware */
saa7164_buffer_cfg_port(port);
/* Acquire the hardware */
result = saa7164_api_transition_port(port, SAA_DMASTATE_ACQUIRE);
if ((result != SAA_OK) && (result != SAA_ERR_ALREADY_STOPPED)) {
printk(KERN_ERR "%s() acquire transition failed, res = 0x%x\n",
__func__, result);
/* Stop the hardware, regardless */
result = saa7164_api_transition_port(port, SAA_DMASTATE_STOP);
if ((result != SAA_OK) && (result != SAA_ERR_ALREADY_STOPPED)) {
printk(KERN_ERR "%s() acquire/forced stop transition "
"failed, res = 0x%x\n", __func__, result);
}
ret = -EIO;
goto out;
} else
dprintk(DBGLVL_ENC, "%s() Acquired\n", __func__);
/* Pause the hardware */
result = saa7164_api_transition_port(port, SAA_DMASTATE_PAUSE);
if ((result != SAA_OK) && (result != SAA_ERR_ALREADY_STOPPED)) {
printk(KERN_ERR "%s() pause transition failed, res = 0x%x\n",
__func__, result);
/* Stop the hardware, regardless */
result = saa7164_api_transition_port(port, SAA_DMASTATE_STOP);
if ((result != SAA_OK) && (result != SAA_ERR_ALREADY_STOPPED)) {
printk(KERN_ERR "%s() pause/forced stop transition "
"failed, res = 0x%x\n", __func__, result);
}
ret = -EIO;
goto out;
} else
dprintk(DBGLVL_ENC, "%s() Paused\n", __func__);
/* Start the hardware */
result = saa7164_api_transition_port(port, SAA_DMASTATE_RUN);
if ((result != SAA_OK) && (result != SAA_ERR_ALREADY_STOPPED)) {
printk(KERN_ERR "%s() run transition failed, result = 0x%x\n",
__func__, result);
/* Stop the hardware, regardless */
result = saa7164_api_transition_port(port, SAA_DMASTATE_STOP);
if ((result != SAA_OK) && (result != SAA_ERR_ALREADY_STOPPED)) {
printk(KERN_ERR "%s() run/forced stop transition "
"failed, res = 0x%x\n", __func__, result);
}
ret = -EIO;
} else
dprintk(DBGLVL_ENC, "%s() Running\n", __func__);
out:
return ret;
}
static int fops_open(struct file *file)
{
struct saa7164_dev *dev;
struct saa7164_port *port;
struct saa7164_encoder_fh *fh;
port = (struct saa7164_port *)video_get_drvdata(video_devdata(file));
if (!port)
return -ENODEV;
dev = port->dev;
dprintk(DBGLVL_ENC, "%s()\n", __func__);
/* allocate + initialize per filehandle data */
fh = kzalloc(sizeof(*fh), GFP_KERNEL);
if (NULL == fh)
return -ENOMEM;
file->private_data = fh;
fh->port = port;
return 0;
}
static int fops_release(struct file *file)
{
struct saa7164_encoder_fh *fh = file->private_data;
struct saa7164_port *port = fh->port;
struct saa7164_dev *dev = port->dev;
dprintk(DBGLVL_ENC, "%s()\n", __func__);
/* Shut device down on last close */
if (atomic_cmpxchg(&fh->v4l_reading, 1, 0) == 1) {
if (atomic_dec_return(&port->v4l_reader_count) == 0) {
/* stop mpeg capture then cancel buffers */
saa7164_encoder_stop_streaming(port);
}
}
file->private_data = NULL;
kfree(fh);
return 0;
}
struct saa7164_user_buffer *saa7164_enc_next_buf(struct saa7164_port *port)
{
struct saa7164_user_buffer *ubuf = NULL;
struct saa7164_dev *dev = port->dev;
u32 crc;
mutex_lock(&port->dmaqueue_lock);
if (!list_empty(&port->list_buf_used.list)) {
ubuf = list_first_entry(&port->list_buf_used.list,
struct saa7164_user_buffer, list);
if (crc_checking) {
crc = crc32(0, ubuf->data, ubuf->actual_size);
if (crc != ubuf->crc) {
printk(KERN_ERR
"%s() ubuf %p crc became invalid, was 0x%x became 0x%x\n",
__func__,
ubuf, ubuf->crc, crc);
}
}
}
mutex_unlock(&port->dmaqueue_lock);
dprintk(DBGLVL_ENC, "%s() returns %p\n", __func__, ubuf);
return ubuf;
}
static ssize_t fops_read(struct file *file, char __user *buffer,
size_t count, loff_t *pos)
{
struct saa7164_encoder_fh *fh = file->private_data;
struct saa7164_port *port = fh->port;
struct saa7164_user_buffer *ubuf = NULL;
struct saa7164_dev *dev = port->dev;
int ret = 0;
int rem, cnt;
u8 *p;
port->last_read_msecs_diff = port->last_read_msecs;
port->last_read_msecs = jiffies_to_msecs(jiffies);
port->last_read_msecs_diff = port->last_read_msecs -
port->last_read_msecs_diff;
saa7164_histogram_update(&port->read_interval,
port->last_read_msecs_diff);
if (*pos) {
printk(KERN_ERR "%s() ESPIPE\n", __func__);
return -ESPIPE;
}
if (atomic_cmpxchg(&fh->v4l_reading, 0, 1) == 0) {
if (atomic_inc_return(&port->v4l_reader_count) == 1) {
if (saa7164_encoder_initialize(port) < 0) {
printk(KERN_ERR "%s() EINVAL\n", __func__);
return -EINVAL;
}
saa7164_encoder_start_streaming(port);
msleep(200);
}
}
/* blocking wait for buffer */
if ((file->f_flags & O_NONBLOCK) == 0) {
if (wait_event_interruptible(port->wait_read,
saa7164_enc_next_buf(port))) {
printk(KERN_ERR "%s() ERESTARTSYS\n", __func__);
return -ERESTARTSYS;
}
}
/* Pull the first buffer from the used list */
ubuf = saa7164_enc_next_buf(port);
while ((count > 0) && ubuf) {
/* set remaining bytes to copy */
rem = ubuf->actual_size - ubuf->pos;
cnt = rem > count ? count : rem;
p = ubuf->data + ubuf->pos;
dprintk(DBGLVL_ENC,
"%s() count=%d cnt=%d rem=%d buf=%p buf->pos=%d\n",
__func__, (int)count, cnt, rem, ubuf, ubuf->pos);
if (copy_to_user(buffer, p, cnt)) {
printk(KERN_ERR "%s() copy_to_user failed\n", __func__);
if (!ret) {
printk(KERN_ERR "%s() EFAULT\n", __func__);
ret = -EFAULT;
}
goto err;
}
ubuf->pos += cnt;
count -= cnt;
buffer += cnt;
ret += cnt;
if (ubuf->pos > ubuf->actual_size)
printk(KERN_ERR "read() pos > actual, huh?\n");
if (ubuf->pos == ubuf->actual_size) {
/* finished with current buffer, take next buffer */
/* Requeue the buffer on the free list */
ubuf->pos = 0;
mutex_lock(&port->dmaqueue_lock);
list_move_tail(&ubuf->list, &port->list_buf_free.list);
mutex_unlock(&port->dmaqueue_lock);
/* Dequeue next */
if ((file->f_flags & O_NONBLOCK) == 0) {
if (wait_event_interruptible(port->wait_read,
saa7164_enc_next_buf(port))) {
break;
}
}
ubuf = saa7164_enc_next_buf(port);
}
}
err:
if (!ret && !ubuf)
ret = -EAGAIN;
return ret;
}
static unsigned int fops_poll(struct file *file, poll_table *wait)
{
struct saa7164_encoder_fh *fh =
(struct saa7164_encoder_fh *)file->private_data;
struct saa7164_port *port = fh->port;
struct saa7164_user_buffer *ubuf;
unsigned int mask = 0;
port->last_poll_msecs_diff = port->last_poll_msecs;
port->last_poll_msecs = jiffies_to_msecs(jiffies);
port->last_poll_msecs_diff = port->last_poll_msecs -
port->last_poll_msecs_diff;
saa7164_histogram_update(&port->poll_interval,
port->last_poll_msecs_diff);
if (!video_is_registered(port->v4l_device))
return -EIO;
if (atomic_cmpxchg(&fh->v4l_reading, 0, 1) == 0) {
if (atomic_inc_return(&port->v4l_reader_count) == 1) {
if (saa7164_encoder_initialize(port) < 0)
return -EINVAL;
saa7164_encoder_start_streaming(port);
msleep(200);
}
}
/* blocking wait for buffer */
if ((file->f_flags & O_NONBLOCK) == 0) {
if (wait_event_interruptible(port->wait_read,
saa7164_enc_next_buf(port))) {
return -ERESTARTSYS;
}
}
/* Pull the first buffer from the used list */
ubuf = list_first_entry(&port->list_buf_used.list,
struct saa7164_user_buffer, list);
if (ubuf)
mask |= POLLIN | POLLRDNORM;
return mask;
}
static const struct v4l2_file_operations mpeg_fops = {
.owner = THIS_MODULE,
.open = fops_open,
.release = fops_release,
.read = fops_read,
.poll = fops_poll,
.unlocked_ioctl = video_ioctl2,
};
int saa7164_g_chip_ident(struct file *file, void *fh,
struct v4l2_dbg_chip_ident *chip)
{
struct saa7164_port *port = ((struct saa7164_encoder_fh *)fh)->port;
struct saa7164_dev *dev = port->dev;
dprintk(DBGLVL_ENC, "%s()\n", __func__);
return 0;
}
int saa7164_g_register(struct file *file, void *fh,
struct v4l2_dbg_register *reg)
{
struct saa7164_port *port = ((struct saa7164_encoder_fh *)fh)->port;
struct saa7164_dev *dev = port->dev;
dprintk(DBGLVL_ENC, "%s()\n", __func__);
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
return 0;
}
int saa7164_s_register(struct file *file, void *fh,
struct v4l2_dbg_register *reg)
{
struct saa7164_port *port = ((struct saa7164_encoder_fh *)fh)->port;
struct saa7164_dev *dev = port->dev;
dprintk(DBGLVL_ENC, "%s()\n", __func__);
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
return 0;
}
static const struct v4l2_ioctl_ops mpeg_ioctl_ops = {
.vidioc_s_std = vidioc_s_std,
.vidioc_enum_input = vidioc_enum_input,
.vidioc_g_input = vidioc_g_input,
.vidioc_s_input = vidioc_s_input,
.vidioc_g_tuner = vidioc_g_tuner,
.vidioc_s_tuner = vidioc_s_tuner,
.vidioc_g_frequency = vidioc_g_frequency,
.vidioc_s_frequency = vidioc_s_frequency,
.vidioc_s_ctrl = vidioc_s_ctrl,
.vidioc_g_ctrl = vidioc_g_ctrl,
.vidioc_querycap = vidioc_querycap,
.vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
.vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
.vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
.vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
.vidioc_g_ext_ctrls = vidioc_g_ext_ctrls,
.vidioc_s_ext_ctrls = vidioc_s_ext_ctrls,
.vidioc_try_ext_ctrls = vidioc_try_ext_ctrls,
.vidioc_log_status = vidioc_log_status,
.vidioc_queryctrl = vidioc_queryctrl,
.vidioc_g_chip_ident = saa7164_g_chip_ident,
#ifdef CONFIG_VIDEO_ADV_DEBUG
.vidioc_g_register = saa7164_g_register,
.vidioc_s_register = saa7164_s_register,
#endif
};
static struct video_device saa7164_mpeg_template = {
.name = "saa7164",
.fops = &mpeg_fops,
.ioctl_ops = &mpeg_ioctl_ops,
.minor = -1,
.tvnorms = SAA7164_NORMS,
.current_norm = V4L2_STD_NTSC_M,
};
static struct video_device *saa7164_encoder_alloc(
struct saa7164_port *port,
struct pci_dev *pci,
struct video_device *template,
char *type)
{
struct video_device *vfd;
struct saa7164_dev *dev = port->dev;
dprintk(DBGLVL_ENC, "%s()\n", __func__);
vfd = video_device_alloc();
if (NULL == vfd)
return NULL;
*vfd = *template;
snprintf(vfd->name, sizeof(vfd->name), "%s %s (%s)", dev->name,
type, saa7164_boards[dev->board].name);
vfd->parent = &pci->dev;
vfd->release = video_device_release;
return vfd;
}
int saa7164_encoder_register(struct saa7164_port *port)
{
struct saa7164_dev *dev = port->dev;
int result = -ENODEV;
dprintk(DBGLVL_ENC, "%s()\n", __func__);
if (port->type != SAA7164_MPEG_ENCODER)
BUG();
/* Sanity check that the PCI configuration space is active */
if (port->hwcfg.BARLocation == 0) {
printk(KERN_ERR "%s() failed "
"(errno = %d), NO PCI configuration\n",
__func__, result);
result = -ENOMEM;
goto failed;
}
/* Establish encoder defaults here */
/* Set default TV standard */
port->encodernorm = saa7164_tvnorms[0];
port->width = 720;
port->mux_input = 1; /* Composite */
port->video_format = EU_VIDEO_FORMAT_MPEG_2;
port->audio_format = 0;
port->video_resolution = 0;
port->ctl_brightness = 127;
port->ctl_contrast = 66;
port->ctl_hue = 128;
port->ctl_saturation = 62;
port->ctl_sharpness = 8;
port->encoder_params.bitrate = ENCODER_DEF_BITRATE;
port->encoder_params.bitrate_peak = ENCODER_DEF_BITRATE;
port->encoder_params.bitrate_mode = V4L2_MPEG_VIDEO_BITRATE_MODE_CBR;
port->encoder_params.stream_type = V4L2_MPEG_STREAM_TYPE_MPEG2_PS;
port->encoder_params.ctl_mute = 0;
port->encoder_params.ctl_aspect = V4L2_MPEG_VIDEO_ASPECT_4x3;
port->encoder_params.refdist = 1;
port->encoder_params.gop_size = SAA7164_ENCODER_DEFAULT_GOP_SIZE;
if (port->encodernorm.id & V4L2_STD_525_60)
port->height = 480;
else
port->height = 576;
/* Allocate and register the video device node */
port->v4l_device = saa7164_encoder_alloc(port,
dev->pci, &saa7164_mpeg_template, "mpeg");
if (!port->v4l_device) {
printk(KERN_INFO "%s: can't allocate mpeg device\n",
dev->name);
result = -ENOMEM;
goto failed;
}
video_set_drvdata(port->v4l_device, port);
result = video_register_device(port->v4l_device,
VFL_TYPE_GRABBER, -1);
if (result < 0) {
printk(KERN_INFO "%s: can't register mpeg device\n",
dev->name);
/* TODO: We're going to leak here if we don't dealloc
The buffers above. The unreg function can't deal wit it.
*/
goto failed;
}
printk(KERN_INFO "%s: registered device video%d [mpeg]\n",
dev->name, port->v4l_device->num);
/* Configure the hardware defaults */
saa7164_api_set_videomux(port);
saa7164_api_set_usercontrol(port, PU_BRIGHTNESS_CONTROL);
saa7164_api_set_usercontrol(port, PU_CONTRAST_CONTROL);
saa7164_api_set_usercontrol(port, PU_HUE_CONTROL);
saa7164_api_set_usercontrol(port, PU_SATURATION_CONTROL);
saa7164_api_set_usercontrol(port, PU_SHARPNESS_CONTROL);
saa7164_api_audio_mute(port, 0);
saa7164_api_set_audio_volume(port, 20);
saa7164_api_set_aspect_ratio(port);
/* Disable audio standard detection, it's buggy */
saa7164_api_set_audio_detection(port, 0);
saa7164_api_set_encoder(port);
saa7164_api_get_encoder(port);
result = 0;
failed:
return result;
}
void saa7164_encoder_unregister(struct saa7164_port *port)
{
struct saa7164_dev *dev = port->dev;
dprintk(DBGLVL_ENC, "%s(port=%d)\n", __func__, port->nr);
if (port->type != SAA7164_MPEG_ENCODER)
BUG();
if (port->v4l_device) {
if (port->v4l_device->minor != -1)
video_unregister_device(port->v4l_device);
else
video_device_release(port->v4l_device);
port->v4l_device = NULL;
}
dprintk(DBGLVL_ENC, "%s(port=%d) done\n", __func__, port->nr);
}
| gpl-2.0 |
Pulshen/XKernel | drivers/cpufreq/speedstep-ich.c | 4691 | 11267 | /*
* (C) 2001 Dave Jones, Arjan van de ven.
* (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
*
* Licensed under the terms of the GNU GPL License version 2.
* Based upon reverse engineered information, and on Intel documentation
* for chipsets ICH2-M and ICH3-M.
*
* Many thanks to Ducrot Bruno for finding and fixing the last
* "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
* for extensive testing.
*
* BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
*/
/*********************************************************************
* SPEEDSTEP - DEFINITIONS *
*********************************************************************/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/cpufreq.h>
#include <linux/pci.h>
#include <linux/sched.h>
#include <asm/cpu_device_id.h>
#include "speedstep-lib.h"
/* speedstep_chipset:
* It is necessary to know which chipset is used. As accesses to
* this device occur at various places in this module, we need a
* static struct pci_dev * pointing to that device.
*/
static struct pci_dev *speedstep_chipset_dev;
/* speedstep_processor
*/
static enum speedstep_processor speedstep_processor;
static u32 pmbase;
/*
* There are only two frequency states for each processor. Values
* are in kHz for the time being.
*/
static struct cpufreq_frequency_table speedstep_freqs[] = {
{SPEEDSTEP_HIGH, 0},
{SPEEDSTEP_LOW, 0},
{0, CPUFREQ_TABLE_END},
};
/**
* speedstep_find_register - read the PMBASE address
*
* Returns: -ENODEV if no register could be found
*/
static int speedstep_find_register(void)
{
if (!speedstep_chipset_dev)
return -ENODEV;
/* get PMBASE */
pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
if (!(pmbase & 0x01)) {
printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
return -ENODEV;
}
pmbase &= 0xFFFFFFFE;
if (!pmbase) {
printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
return -ENODEV;
}
pr_debug("pmbase is 0x%x\n", pmbase);
return 0;
}
/**
* speedstep_set_state - set the SpeedStep state
* @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
*
* Tries to change the SpeedStep state. Can be called from
* smp_call_function_single.
*/
static void speedstep_set_state(unsigned int state)
{
u8 pm2_blk;
u8 value;
unsigned long flags;
if (state > 0x1)
return;
/* Disable IRQs */
local_irq_save(flags);
/* read state */
value = inb(pmbase + 0x50);
pr_debug("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
/* write new state */
value &= 0xFE;
value |= state;
pr_debug("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);
/* Disable bus master arbitration */
pm2_blk = inb(pmbase + 0x20);
pm2_blk |= 0x01;
outb(pm2_blk, (pmbase + 0x20));
/* Actual transition */
outb(value, (pmbase + 0x50));
/* Restore bus master arbitration */
pm2_blk &= 0xfe;
outb(pm2_blk, (pmbase + 0x20));
/* check if transition was successful */
value = inb(pmbase + 0x50);
/* Enable IRQs */
local_irq_restore(flags);
pr_debug("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
if (state == (value & 0x1))
pr_debug("change to %u MHz succeeded\n",
speedstep_get_frequency(speedstep_processor) / 1000);
else
printk(KERN_ERR "cpufreq: change failed - I/O error\n");
return;
}
/* Wrapper for smp_call_function_single. */
static void _speedstep_set_state(void *_state)
{
speedstep_set_state(*(unsigned int *)_state);
}
/**
* speedstep_activate - activate SpeedStep control in the chipset
*
* Tries to activate the SpeedStep status and control registers.
* Returns -EINVAL on an unsupported chipset, and zero on success.
*/
static int speedstep_activate(void)
{
u16 value = 0;
if (!speedstep_chipset_dev)
return -EINVAL;
pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
if (!(value & 0x08)) {
value |= 0x08;
pr_debug("activating SpeedStep (TM) registers\n");
pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
}
return 0;
}
/**
* speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
*
* Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
* the LPC bridge / PM module which contains all power-management
* functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
* chipset, or zero on failure.
*/
static unsigned int speedstep_detect_chipset(void)
{
speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
PCI_DEVICE_ID_INTEL_82801DB_12,
PCI_ANY_ID, PCI_ANY_ID,
NULL);
if (speedstep_chipset_dev)
return 4; /* 4-M */
speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
PCI_DEVICE_ID_INTEL_82801CA_12,
PCI_ANY_ID, PCI_ANY_ID,
NULL);
if (speedstep_chipset_dev)
return 3; /* 3-M */
speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
PCI_DEVICE_ID_INTEL_82801BA_10,
PCI_ANY_ID, PCI_ANY_ID,
NULL);
if (speedstep_chipset_dev) {
/* speedstep.c causes lockups on Dell Inspirons 8000 and
* 8100 which use a pretty old revision of the 82815
* host brige. Abort on these systems.
*/
static struct pci_dev *hostbridge;
hostbridge = pci_get_subsys(PCI_VENDOR_ID_INTEL,
PCI_DEVICE_ID_INTEL_82815_MC,
PCI_ANY_ID, PCI_ANY_ID,
NULL);
if (!hostbridge)
return 2; /* 2-M */
if (hostbridge->revision < 5) {
pr_debug("hostbridge does not support speedstep\n");
speedstep_chipset_dev = NULL;
pci_dev_put(hostbridge);
return 0;
}
pci_dev_put(hostbridge);
return 2; /* 2-M */
}
return 0;
}
static void get_freq_data(void *_speed)
{
unsigned int *speed = _speed;
*speed = speedstep_get_frequency(speedstep_processor);
}
static unsigned int speedstep_get(unsigned int cpu)
{
unsigned int speed;
/* You're supposed to ensure CPU is online. */
if (smp_call_function_single(cpu, get_freq_data, &speed, 1) != 0)
BUG();
pr_debug("detected %u kHz as current frequency\n", speed);
return speed;
}
/**
* speedstep_target - set a new CPUFreq policy
* @policy: new policy
* @target_freq: the target frequency
* @relation: how that frequency relates to achieved frequency
* (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
*
* Sets a new CPUFreq policy.
*/
static int speedstep_target(struct cpufreq_policy *policy,
unsigned int target_freq,
unsigned int relation)
{
unsigned int newstate = 0, policy_cpu;
struct cpufreq_freqs freqs;
int i;
if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0],
target_freq, relation, &newstate))
return -EINVAL;
policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
freqs.old = speedstep_get(policy_cpu);
freqs.new = speedstep_freqs[newstate].frequency;
freqs.cpu = policy->cpu;
pr_debug("transiting from %u to %u kHz\n", freqs.old, freqs.new);
/* no transition necessary */
if (freqs.old == freqs.new)
return 0;
for_each_cpu(i, policy->cpus) {
freqs.cpu = i;
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
}
smp_call_function_single(policy_cpu, _speedstep_set_state, &newstate,
true);
for_each_cpu(i, policy->cpus) {
freqs.cpu = i;
cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
}
return 0;
}
/**
* speedstep_verify - verifies a new CPUFreq policy
* @policy: new policy
*
* Limit must be within speedstep_low_freq and speedstep_high_freq, with
* at least one border included.
*/
static int speedstep_verify(struct cpufreq_policy *policy)
{
return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
}
struct get_freqs {
struct cpufreq_policy *policy;
int ret;
};
static void get_freqs_on_cpu(void *_get_freqs)
{
struct get_freqs *get_freqs = _get_freqs;
get_freqs->ret =
speedstep_get_freqs(speedstep_processor,
&speedstep_freqs[SPEEDSTEP_LOW].frequency,
&speedstep_freqs[SPEEDSTEP_HIGH].frequency,
&get_freqs->policy->cpuinfo.transition_latency,
&speedstep_set_state);
}
static int speedstep_cpu_init(struct cpufreq_policy *policy)
{
int result;
unsigned int policy_cpu, speed;
struct get_freqs gf;
/* only run on CPU to be set, or on its sibling */
#ifdef CONFIG_SMP
cpumask_copy(policy->cpus, cpu_sibling_mask(policy->cpu));
#endif
policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
/* detect low and high frequency and transition latency */
gf.policy = policy;
smp_call_function_single(policy_cpu, get_freqs_on_cpu, &gf, 1);
if (gf.ret)
return gf.ret;
/* get current speed setting */
speed = speedstep_get(policy_cpu);
if (!speed)
return -EIO;
pr_debug("currently at %s speed setting - %i MHz\n",
(speed == speedstep_freqs[SPEEDSTEP_LOW].frequency)
? "low" : "high",
(speed / 1000));
/* cpuinfo and default policy values */
policy->cur = speed;
result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
if (result)
return result;
cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
return 0;
}
static int speedstep_cpu_exit(struct cpufreq_policy *policy)
{
cpufreq_frequency_table_put_attr(policy->cpu);
return 0;
}
static struct freq_attr *speedstep_attr[] = {
&cpufreq_freq_attr_scaling_available_freqs,
NULL,
};
static struct cpufreq_driver speedstep_driver = {
.name = "speedstep-ich",
.verify = speedstep_verify,
.target = speedstep_target,
.init = speedstep_cpu_init,
.exit = speedstep_cpu_exit,
.get = speedstep_get,
.owner = THIS_MODULE,
.attr = speedstep_attr,
};
static const struct x86_cpu_id ss_smi_ids[] = {
{ X86_VENDOR_INTEL, 6, 0xb, },
{ X86_VENDOR_INTEL, 6, 0x8, },
{ X86_VENDOR_INTEL, 15, 2 },
{}
};
#if 0
/* Autoload or not? Do not for now. */
MODULE_DEVICE_TABLE(x86cpu, ss_smi_ids);
#endif
/**
* speedstep_init - initializes the SpeedStep CPUFreq driver
*
* Initializes the SpeedStep support. Returns -ENODEV on unsupported
* devices, -EINVAL on problems during initiatization, and zero on
* success.
*/
static int __init speedstep_init(void)
{
if (!x86_match_cpu(ss_smi_ids))
return -ENODEV;
/* detect processor */
speedstep_processor = speedstep_detect_processor();
if (!speedstep_processor) {
pr_debug("Intel(R) SpeedStep(TM) capable processor "
"not found\n");
return -ENODEV;
}
/* detect chipset */
if (!speedstep_detect_chipset()) {
pr_debug("Intel(R) SpeedStep(TM) for this chipset not "
"(yet) available.\n");
return -ENODEV;
}
/* activate speedstep support */
if (speedstep_activate()) {
pci_dev_put(speedstep_chipset_dev);
return -EINVAL;
}
if (speedstep_find_register())
return -ENODEV;
return cpufreq_register_driver(&speedstep_driver);
}
/**
* speedstep_exit - unregisters SpeedStep support
*
* Unregisters SpeedStep support.
*/
static void __exit speedstep_exit(void)
{
pci_dev_put(speedstep_chipset_dev);
cpufreq_unregister_driver(&speedstep_driver);
}
MODULE_AUTHOR("Dave Jones <davej@redhat.com>, "
"Dominik Brodowski <linux@brodo.de>");
MODULE_DESCRIPTION("Speedstep driver for Intel mobile processors on chipsets "
"with ICH-M southbridges.");
MODULE_LICENSE("GPL");
module_init(speedstep_init);
module_exit(speedstep_exit);
| gpl-2.0 |
arter97/android_kernel_google_msm | drivers/staging/line6/pod.c | 4947 | 37089 | /*
* Line6 Linux USB driver - 0.9.1beta
*
* Copyright (C) 2004-2010 Markus Grabner (grabner@icg.tugraz.at)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation, version 2.
*
*/
#include <linux/slab.h>
#include <linux/wait.h>
#include <sound/control.h>
#include "audio.h"
#include "capture.h"
#include "control.h"
#include "driver.h"
#include "playback.h"
#include "pod.h"
#define POD_SYSEX_CODE 3
#define POD_BYTES_PER_FRAME 6 /* 24bit audio (stereo) */
/* *INDENT-OFF* */
enum {
POD_SYSEX_CLIP = 0x0f,
POD_SYSEX_SAVE = 0x24,
POD_SYSEX_SYSTEM = 0x56,
POD_SYSEX_SYSTEMREQ = 0x57,
/* POD_SYSEX_UPDATE = 0x6c, */ /* software update! */
POD_SYSEX_STORE = 0x71,
POD_SYSEX_FINISH = 0x72,
POD_SYSEX_DUMPMEM = 0x73,
POD_SYSEX_DUMP = 0x74,
POD_SYSEX_DUMPREQ = 0x75
/* POD_SYSEX_DUMPMEM2 = 0x76 */ /* dumps entire internal memory of PODxt Pro */
};
enum {
POD_monitor_level = 0x04,
POD_routing = 0x05,
POD_tuner_mute = 0x13,
POD_tuner_freq = 0x15,
POD_tuner_note = 0x16,
POD_tuner_pitch = 0x17,
POD_system_invalid = 0x10000
};
/* *INDENT-ON* */
enum {
POD_DUMP_MEMORY = 2
};
enum {
POD_BUSY_READ,
POD_BUSY_WRITE,
POD_CHANNEL_DIRTY,
POD_SAVE_PRESSED,
POD_BUSY_MIDISEND
};
static struct snd_ratden pod_ratden = {
.num_min = 78125,
.num_max = 78125,
.num_step = 1,
.den = 2
};
static struct line6_pcm_properties pod_pcm_properties = {
.snd_line6_playback_hw = {
.info = (SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE |
#ifdef CONFIG_PM
SNDRV_PCM_INFO_RESUME |
#endif
SNDRV_PCM_INFO_SYNC_START),
.formats = SNDRV_PCM_FMTBIT_S24_3LE,
.rates = SNDRV_PCM_RATE_KNOT,
.rate_min = 39062,
.rate_max = 39063,
.channels_min = 2,
.channels_max = 2,
.buffer_bytes_max = 60000,
.period_bytes_min = 64,
.period_bytes_max = 8192,
.periods_min = 1,
.periods_max = 1024},
.snd_line6_capture_hw = {
.info = (SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
#ifdef CONFIG_PM
SNDRV_PCM_INFO_RESUME |
#endif
SNDRV_PCM_INFO_SYNC_START),
.formats = SNDRV_PCM_FMTBIT_S24_3LE,
.rates = SNDRV_PCM_RATE_KNOT,
.rate_min = 39062,
.rate_max = 39063,
.channels_min = 2,
.channels_max = 2,
.buffer_bytes_max = 60000,
.period_bytes_min = 64,
.period_bytes_max = 8192,
.periods_min = 1,
.periods_max = 1024},
.snd_line6_rates = {
.nrats = 1,
.rats = &pod_ratden},
.bytes_per_frame = POD_BYTES_PER_FRAME
};
static const char pod_request_channel[] = {
0xf0, 0x00, 0x01, 0x0c, 0x03, 0x75, 0xf7
};
static const char pod_version_header[] = {
0xf2, 0x7e, 0x7f, 0x06, 0x02
};
/* forward declarations: */
static void pod_startup2(unsigned long data);
static void pod_startup3(struct usb_line6_pod *pod);
static void pod_startup4(struct usb_line6_pod *pod);
/*
Mark all parameters as dirty and notify waiting processes.
*/
static void pod_mark_batch_all_dirty(struct usb_line6_pod *pod)
{
int i;
for (i = 0; i < POD_CONTROL_SIZE; i++)
set_bit(i, pod->param_dirty);
}
static char *pod_alloc_sysex_buffer(struct usb_line6_pod *pod, int code,
int size)
{
return line6_alloc_sysex_buffer(&pod->line6, POD_SYSEX_CODE, code,
size);
}
/*
Send channel dump data to the PODxt Pro.
*/
static void pod_dump(struct usb_line6_pod *pod, const unsigned char *data)
{
int size = 1 + sizeof(pod->prog_data);
char *sysex = pod_alloc_sysex_buffer(pod, POD_SYSEX_DUMP, size);
if (!sysex)
return;
/* Don't know what this is good for, but PODxt Pro transmits it, so we
* also do... */
sysex[SYSEX_DATA_OFS] = 5;
memcpy(sysex + SYSEX_DATA_OFS + 1, data, sizeof(pod->prog_data));
line6_send_sysex_message(&pod->line6, sysex, size);
memcpy(&pod->prog_data, data, sizeof(pod->prog_data));
pod_mark_batch_all_dirty(pod);
kfree(sysex);
}
/*
Store parameter value in driver memory and mark it as dirty.
*/
static void pod_store_parameter(struct usb_line6_pod *pod, int param, int value)
{
pod->prog_data.control[param] = value;
set_bit(param, pod->param_dirty);
pod->dirty = 1;
}
/*
Handle SAVE button.
*/
static void pod_save_button_pressed(struct usb_line6_pod *pod, int type,
int index)
{
pod->dirty = 0;
set_bit(POD_SAVE_PRESSED, &pod->atomic_flags);
}
/*
Process a completely received message.
*/
void line6_pod_process_message(struct usb_line6_pod *pod)
{
const unsigned char *buf = pod->line6.buffer_message;
/* filter messages by type */
switch (buf[0] & 0xf0) {
case LINE6_PARAM_CHANGE:
case LINE6_PROGRAM_CHANGE:
case LINE6_SYSEX_BEGIN:
break; /* handle these further down */
default:
return; /* ignore all others */
}
/* process all remaining messages */
switch (buf[0]) {
case LINE6_PARAM_CHANGE | LINE6_CHANNEL_DEVICE:
pod_store_parameter(pod, buf[1], buf[2]);
/* intentionally no break here! */
case LINE6_PARAM_CHANGE | LINE6_CHANNEL_HOST:
if ((buf[1] == POD_amp_model_setup) ||
(buf[1] == POD_effect_setup))
/* these also affect other settings */
line6_dump_request_async(&pod->dumpreq, &pod->line6, 0,
LINE6_DUMP_CURRENT);
break;
case LINE6_PROGRAM_CHANGE | LINE6_CHANNEL_DEVICE:
case LINE6_PROGRAM_CHANGE | LINE6_CHANNEL_HOST:
pod->channel_num = buf[1];
pod->dirty = 0;
set_bit(POD_CHANNEL_DIRTY, &pod->atomic_flags);
line6_dump_request_async(&pod->dumpreq, &pod->line6, 0,
LINE6_DUMP_CURRENT);
break;
case LINE6_SYSEX_BEGIN | LINE6_CHANNEL_DEVICE:
case LINE6_SYSEX_BEGIN | LINE6_CHANNEL_UNKNOWN:
if (memcmp(buf + 1, line6_midi_id, sizeof(line6_midi_id)) == 0) {
switch (buf[5]) {
case POD_SYSEX_DUMP:
if (pod->line6.message_length ==
sizeof(pod->prog_data) + 7) {
switch (pod->dumpreq.in_progress) {
case LINE6_DUMP_CURRENT:
memcpy(&pod->prog_data, buf + 7,
sizeof(pod->prog_data));
pod_mark_batch_all_dirty(pod);
break;
case POD_DUMP_MEMORY:
memcpy(&pod->prog_data_buf,
buf + 7,
sizeof
(pod->prog_data_buf));
break;
default:
DEBUG_MESSAGES(dev_err
(pod->
line6.ifcdev,
"unknown dump code %02X\n",
pod->
dumpreq.in_progress));
}
line6_dump_finished(&pod->dumpreq);
pod_startup3(pod);
} else
DEBUG_MESSAGES(dev_err
(pod->line6.ifcdev,
"wrong size of channel dump message (%d instead of %d)\n",
pod->
line6.message_length,
(int)
sizeof(pod->prog_data) +
7));
break;
case POD_SYSEX_SYSTEM:{
short value =
((int)buf[7] << 12) | ((int)buf[8]
<< 8) |
((int)buf[9] << 4) | (int)buf[10];
#define PROCESS_SYSTEM_PARAM(x) \
case POD_ ## x: \
pod->x.value = value; \
wake_up(&pod->x.wait); \
break;
switch (buf[6]) {
PROCESS_SYSTEM_PARAM
(monitor_level);
PROCESS_SYSTEM_PARAM(routing);
PROCESS_SYSTEM_PARAM
(tuner_mute);
PROCESS_SYSTEM_PARAM
(tuner_freq);
PROCESS_SYSTEM_PARAM
(tuner_note);
PROCESS_SYSTEM_PARAM
(tuner_pitch);
#undef PROCESS_SYSTEM_PARAM
default:
DEBUG_MESSAGES(dev_err
(pod->
line6.ifcdev,
"unknown tuner/system response %02X\n",
buf[6]));
}
break;
}
case POD_SYSEX_FINISH:
/* do we need to respond to this? */
break;
case POD_SYSEX_SAVE:
pod_save_button_pressed(pod, buf[6], buf[7]);
break;
case POD_SYSEX_CLIP:
DEBUG_MESSAGES(dev_err
(pod->line6.ifcdev,
"audio clipped\n"));
pod->clipping.value = 1;
wake_up(&pod->clipping.wait);
break;
case POD_SYSEX_STORE:
DEBUG_MESSAGES(dev_err
(pod->line6.ifcdev,
"message %02X not yet implemented\n",
buf[5]));
break;
default:
DEBUG_MESSAGES(dev_err
(pod->line6.ifcdev,
"unknown sysex message %02X\n",
buf[5]));
}
} else
if (memcmp
(buf, pod_version_header,
sizeof(pod_version_header)) == 0) {
pod->firmware_version =
buf[13] * 100 + buf[14] * 10 + buf[15];
pod->device_id =
((int)buf[8] << 16) | ((int)buf[9] << 8) | (int)
buf[10];
pod_startup4(pod);
} else
DEBUG_MESSAGES(dev_err
(pod->line6.ifcdev,
"unknown sysex header\n"));
break;
case LINE6_SYSEX_END:
break;
default:
DEBUG_MESSAGES(dev_err
(pod->line6.ifcdev,
"POD: unknown message %02X\n", buf[0]));
}
}
/*
Detect some cases that require a channel dump after sending a command to the
device. Important notes:
*) The actual dump request can not be sent here since we are not allowed to
wait for the completion of the first message in this context, and sending
the dump request before completion of the previous message leaves the POD
in an undefined state. The dump request will be sent when the echoed
commands are received.
*) This method fails if a param change message is "chopped" after the first
byte.
*/
void line6_pod_midi_postprocess(struct usb_line6_pod *pod, unsigned char *data,
int length)
{
int i;
if (!pod->midi_postprocess)
return;
for (i = 0; i < length; ++i) {
if (data[i] == (LINE6_PROGRAM_CHANGE | LINE6_CHANNEL_HOST)) {
line6_invalidate_current(&pod->dumpreq);
break;
} else
if ((data[i] == (LINE6_PARAM_CHANGE | LINE6_CHANNEL_HOST))
&& (i < length - 1))
if ((data[i + 1] == POD_amp_model_setup)
|| (data[i + 1] == POD_effect_setup)) {
line6_invalidate_current(&pod->dumpreq);
break;
}
}
}
/*
Send channel number (i.e., switch to a different sound).
*/
static void pod_send_channel(struct usb_line6_pod *pod, int value)
{
line6_invalidate_current(&pod->dumpreq);
if (line6_send_program(&pod->line6, value) == 0)
pod->channel_num = value;
else
line6_dump_finished(&pod->dumpreq);
}
/*
Transmit PODxt Pro control parameter.
*/
void line6_pod_transmit_parameter(struct usb_line6_pod *pod, int param,
int value)
{
if (line6_transmit_parameter(&pod->line6, param, value) == 0)
pod_store_parameter(pod, param, value);
if ((param == POD_amp_model_setup) || (param == POD_effect_setup)) /* these also affect other settings */
line6_invalidate_current(&pod->dumpreq);
}
/*
Resolve value to memory location.
*/
static int pod_resolve(const char *buf, short block0, short block1,
unsigned char *location)
{
unsigned long value;
short block;
int ret;
ret = strict_strtoul(buf, 10, &value);
if (ret)
return ret;
block = (value < 0x40) ? block0 : block1;
value &= 0x3f;
location[0] = block >> 7;
location[1] = value | (block & 0x7f);
return 0;
}
/*
Send command to store channel/effects setup/amp setup to PODxt Pro.
*/
static ssize_t pod_send_store_command(struct device *dev, const char *buf,
size_t count, short block0, short block1)
{
struct usb_interface *interface = to_usb_interface(dev);
struct usb_line6_pod *pod = usb_get_intfdata(interface);
int ret;
int size = 3 + sizeof(pod->prog_data_buf);
char *sysex = pod_alloc_sysex_buffer(pod, POD_SYSEX_STORE, size);
if (!sysex)
return 0;
sysex[SYSEX_DATA_OFS] = 5; /* see pod_dump() */
ret = pod_resolve(buf, block0, block1, sysex + SYSEX_DATA_OFS + 1);
if (ret) {
kfree(sysex);
return ret;
}
memcpy(sysex + SYSEX_DATA_OFS + 3, &pod->prog_data_buf,
sizeof(pod->prog_data_buf));
line6_send_sysex_message(&pod->line6, sysex, size);
kfree(sysex);
/* needs some delay here on AMD64 platform */
return count;
}
/*
Send command to retrieve channel/effects setup/amp setup to PODxt Pro.
*/
static ssize_t pod_send_retrieve_command(struct device *dev, const char *buf,
size_t count, short block0,
short block1)
{
struct usb_interface *interface = to_usb_interface(dev);
struct usb_line6_pod *pod = usb_get_intfdata(interface);
int ret;
int size = 4;
char *sysex = pod_alloc_sysex_buffer(pod, POD_SYSEX_DUMPMEM, size);
if (!sysex)
return 0;
ret = pod_resolve(buf, block0, block1, sysex + SYSEX_DATA_OFS);
if (ret) {
kfree(sysex);
return ret;
}
sysex[SYSEX_DATA_OFS + 2] = 0;
sysex[SYSEX_DATA_OFS + 3] = 0;
line6_dump_started(&pod->dumpreq, POD_DUMP_MEMORY);
if (line6_send_sysex_message(&pod->line6, sysex, size) < size)
line6_dump_finished(&pod->dumpreq);
kfree(sysex);
/* needs some delay here on AMD64 platform */
return count;
}
/*
Generic get name function.
*/
static ssize_t get_name_generic(struct usb_line6_pod *pod, const char *str,
char *buf)
{
int length = 0;
const char *p1;
char *p2;
char *last_non_space = buf;
int retval = line6_dump_wait_interruptible(&pod->dumpreq);
if (retval < 0)
return retval;
for (p1 = str, p2 = buf; *p1; ++p1, ++p2) {
*p2 = *p1;
if (*p2 != ' ')
last_non_space = p2;
if (++length == POD_NAME_LENGTH)
break;
}
*(last_non_space + 1) = '\n';
return last_non_space - buf + 2;
}
/*
"read" request on "channel" special file.
*/
static ssize_t pod_get_channel(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct usb_interface *interface = to_usb_interface(dev);
struct usb_line6_pod *pod = usb_get_intfdata(interface);
return sprintf(buf, "%d\n", pod->channel_num);
}
/*
"write" request on "channel" special file.
*/
static ssize_t pod_set_channel(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct usb_interface *interface = to_usb_interface(dev);
struct usb_line6_pod *pod = usb_get_intfdata(interface);
unsigned long value;
int ret;
ret = strict_strtoul(buf, 10, &value);
if (ret)
return ret;
pod_send_channel(pod, value);
return count;
}
/*
"read" request on "name" special file.
*/
static ssize_t pod_get_name(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct usb_interface *interface = to_usb_interface(dev);
struct usb_line6_pod *pod = usb_get_intfdata(interface);
return get_name_generic(pod, pod->prog_data.header + POD_NAME_OFFSET,
buf);
}
/*
"read" request on "name" special file.
*/
static ssize_t pod_get_name_buf(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct usb_interface *interface = to_usb_interface(dev);
struct usb_line6_pod *pod = usb_get_intfdata(interface);
return get_name_generic(pod,
pod->prog_data_buf.header + POD_NAME_OFFSET,
buf);
}
/*
"read" request on "dump" special file.
*/
static ssize_t pod_get_dump(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct usb_interface *interface = to_usb_interface(dev);
struct usb_line6_pod *pod = usb_get_intfdata(interface);
int retval = line6_dump_wait_interruptible(&pod->dumpreq);
if (retval < 0)
return retval;
memcpy(buf, &pod->prog_data, sizeof(pod->prog_data));
return sizeof(pod->prog_data);
}
/*
"write" request on "dump" special file.
*/
static ssize_t pod_set_dump(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct usb_interface *interface = to_usb_interface(dev);
struct usb_line6_pod *pod = usb_get_intfdata(interface);
if (count != sizeof(pod->prog_data)) {
dev_err(pod->line6.ifcdev,
"data block must be exactly %d bytes\n",
(int)sizeof(pod->prog_data));
return -EINVAL;
}
pod_dump(pod, buf);
return sizeof(pod->prog_data);
}
/*
Identify system parameters related to the tuner.
*/
static bool pod_is_tuner(int code)
{
return
(code == POD_tuner_mute) ||
(code == POD_tuner_freq) ||
(code == POD_tuner_note) || (code == POD_tuner_pitch);
}
/*
Get system parameter (as integer).
@param tuner non-zero, if code refers to a tuner parameter
*/
static int pod_get_system_param_int(struct usb_line6_pod *pod, int *value,
int code, struct ValueWait *param, int sign)
{
char *sysex;
static const int size = 1;
int retval = 0;
if (((pod->prog_data.control[POD_tuner] & 0x40) == 0)
&& pod_is_tuner(code))
return -ENODEV;
/* send value request to device: */
param->value = POD_system_invalid;
sysex = pod_alloc_sysex_buffer(pod, POD_SYSEX_SYSTEMREQ, size);
if (!sysex)
return -ENOMEM;
sysex[SYSEX_DATA_OFS] = code;
line6_send_sysex_message(&pod->line6, sysex, size);
kfree(sysex);
/* wait for device to respond: */
retval =
wait_event_interruptible(param->wait,
param->value != POD_system_invalid);
if (retval < 0)
return retval;
*value = sign ? (int)(signed short)param->value : (int)(unsigned short)
param->value;
if (*value == POD_system_invalid)
*value = 0; /* don't report uninitialized values */
return 0;
}
/*
Get system parameter (as string).
@param tuner non-zero, if code refers to a tuner parameter
*/
static ssize_t pod_get_system_param_string(struct usb_line6_pod *pod, char *buf,
int code, struct ValueWait *param,
int sign)
{
int retval, value = 0;
retval = pod_get_system_param_int(pod, &value, code, param, sign);
if (retval < 0)
return retval;
return sprintf(buf, "%d\n", value);
}
/*
Send system parameter (from integer).
@param tuner non-zero, if code refers to a tuner parameter
*/
static int pod_set_system_param_int(struct usb_line6_pod *pod, int value,
int code)
{
char *sysex;
static const int size = 5;
if (((pod->prog_data.control[POD_tuner] & 0x40) == 0)
&& pod_is_tuner(code))
return -EINVAL;
/* send value to tuner: */
sysex = pod_alloc_sysex_buffer(pod, POD_SYSEX_SYSTEM, size);
if (!sysex)
return -ENOMEM;
sysex[SYSEX_DATA_OFS] = code;
sysex[SYSEX_DATA_OFS + 1] = (value >> 12) & 0x0f;
sysex[SYSEX_DATA_OFS + 2] = (value >> 8) & 0x0f;
sysex[SYSEX_DATA_OFS + 3] = (value >> 4) & 0x0f;
sysex[SYSEX_DATA_OFS + 4] = (value) & 0x0f;
line6_send_sysex_message(&pod->line6, sysex, size);
kfree(sysex);
return 0;
}
/*
Send system parameter (from string).
@param tuner non-zero, if code refers to a tuner parameter
*/
static ssize_t pod_set_system_param_string(struct usb_line6_pod *pod,
const char *buf, int count, int code,
unsigned short mask)
{
int retval;
unsigned short value = simple_strtoul(buf, NULL, 10) & mask;
retval = pod_set_system_param_int(pod, value, code);
return (retval < 0) ? retval : count;
}
/*
"read" request on "dump_buf" special file.
*/
static ssize_t pod_get_dump_buf(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct usb_interface *interface = to_usb_interface(dev);
struct usb_line6_pod *pod = usb_get_intfdata(interface);
int retval = line6_dump_wait_interruptible(&pod->dumpreq);
if (retval < 0)
return retval;
memcpy(buf, &pod->prog_data_buf, sizeof(pod->prog_data_buf));
return sizeof(pod->prog_data_buf);
}
/*
"write" request on "dump_buf" special file.
*/
static ssize_t pod_set_dump_buf(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct usb_interface *interface = to_usb_interface(dev);
struct usb_line6_pod *pod = usb_get_intfdata(interface);
if (count != sizeof(pod->prog_data)) {
dev_err(pod->line6.ifcdev,
"data block must be exactly %d bytes\n",
(int)sizeof(pod->prog_data));
return -EINVAL;
}
memcpy(&pod->prog_data_buf, buf, sizeof(pod->prog_data));
return sizeof(pod->prog_data);
}
/*
"write" request on "finish" special file.
*/
static ssize_t pod_set_finish(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct usb_interface *interface = to_usb_interface(dev);
struct usb_line6_pod *pod = usb_get_intfdata(interface);
int size = 0;
char *sysex = pod_alloc_sysex_buffer(pod, POD_SYSEX_FINISH, size);
if (!sysex)
return 0;
line6_send_sysex_message(&pod->line6, sysex, size);
kfree(sysex);
return count;
}
/*
"write" request on "store_channel" special file.
*/
static ssize_t pod_set_store_channel(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
return pod_send_store_command(dev, buf, count, 0x0000, 0x00c0);
}
/*
"write" request on "store_effects_setup" special file.
*/
static ssize_t pod_set_store_effects_setup(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
return pod_send_store_command(dev, buf, count, 0x0080, 0x0080);
}
/*
"write" request on "store_amp_setup" special file.
*/
static ssize_t pod_set_store_amp_setup(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
return pod_send_store_command(dev, buf, count, 0x0040, 0x0100);
}
/*
"write" request on "retrieve_channel" special file.
*/
static ssize_t pod_set_retrieve_channel(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
return pod_send_retrieve_command(dev, buf, count, 0x0000, 0x00c0);
}
/*
"write" request on "retrieve_effects_setup" special file.
*/
static ssize_t pod_set_retrieve_effects_setup(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
return pod_send_retrieve_command(dev, buf, count, 0x0080, 0x0080);
}
/*
"write" request on "retrieve_amp_setup" special file.
*/
static ssize_t pod_set_retrieve_amp_setup(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
return pod_send_retrieve_command(dev, buf, count, 0x0040, 0x0100);
}
/*
"read" request on "dirty" special file.
*/
static ssize_t pod_get_dirty(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct usb_interface *interface = to_usb_interface(dev);
struct usb_line6_pod *pod = usb_get_intfdata(interface);
buf[0] = pod->dirty ? '1' : '0';
buf[1] = '\n';
return 2;
}
/*
"read" request on "midi_postprocess" special file.
*/
static ssize_t pod_get_midi_postprocess(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct usb_interface *interface = to_usb_interface(dev);
struct usb_line6_pod *pod = usb_get_intfdata(interface);
return sprintf(buf, "%d\n", pod->midi_postprocess);
}
/*
"write" request on "midi_postprocess" special file.
*/
static ssize_t pod_set_midi_postprocess(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct usb_interface *interface = to_usb_interface(dev);
struct usb_line6_pod *pod = usb_get_intfdata(interface);
unsigned long value;
int ret;
ret = strict_strtoul(buf, 10, &value);
if (ret)
return ret;
pod->midi_postprocess = value ? 1 : 0;
return count;
}
/*
"read" request on "serial_number" special file.
*/
static ssize_t pod_get_serial_number(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct usb_interface *interface = to_usb_interface(dev);
struct usb_line6_pod *pod = usb_get_intfdata(interface);
return sprintf(buf, "%d\n", pod->serial_number);
}
/*
"read" request on "firmware_version" special file.
*/
static ssize_t pod_get_firmware_version(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct usb_interface *interface = to_usb_interface(dev);
struct usb_line6_pod *pod = usb_get_intfdata(interface);
return sprintf(buf, "%d.%02d\n", pod->firmware_version / 100,
pod->firmware_version % 100);
}
/*
"read" request on "device_id" special file.
*/
static ssize_t pod_get_device_id(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct usb_interface *interface = to_usb_interface(dev);
struct usb_line6_pod *pod = usb_get_intfdata(interface);
return sprintf(buf, "%d\n", pod->device_id);
}
/*
"read" request on "clip" special file.
*/
static ssize_t pod_wait_for_clip(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct usb_interface *interface = to_usb_interface(dev);
struct usb_line6_pod *pod = usb_get_intfdata(interface);
return wait_event_interruptible(pod->clipping.wait,
pod->clipping.value != 0);
}
/*
POD startup procedure.
This is a sequence of functions with special requirements (e.g., must
not run immediately after initialization, must not run in interrupt
context). After the last one has finished, the device is ready to use.
*/
static void pod_startup1(struct usb_line6_pod *pod)
{
CHECK_STARTUP_PROGRESS(pod->startup_progress, POD_STARTUP_INIT);
/* delay startup procedure: */
line6_start_timer(&pod->startup_timer, POD_STARTUP_DELAY, pod_startup2,
(unsigned long)pod);
}
static void pod_startup2(unsigned long data)
{
struct usb_line6_pod *pod = (struct usb_line6_pod *)data;
/* schedule another startup procedure until startup is complete: */
if (pod->startup_progress >= POD_STARTUP_LAST)
return;
pod->startup_progress = POD_STARTUP_DUMPREQ;
line6_start_timer(&pod->startup_timer, POD_STARTUP_DELAY, pod_startup2,
(unsigned long)pod);
/* current channel dump: */
line6_dump_request_async(&pod->dumpreq, &pod->line6, 0,
LINE6_DUMP_CURRENT);
}
static void pod_startup3(struct usb_line6_pod *pod)
{
struct usb_line6 *line6 = &pod->line6;
CHECK_STARTUP_PROGRESS(pod->startup_progress, POD_STARTUP_VERSIONREQ);
/* request firmware version: */
line6_version_request_async(line6);
}
static void pod_startup4(struct usb_line6_pod *pod)
{
CHECK_STARTUP_PROGRESS(pod->startup_progress, POD_STARTUP_WORKQUEUE);
/* schedule work for global work queue: */
schedule_work(&pod->startup_work);
}
static void pod_startup5(struct work_struct *work)
{
struct usb_line6_pod *pod =
container_of(work, struct usb_line6_pod, startup_work);
struct usb_line6 *line6 = &pod->line6;
CHECK_STARTUP_PROGRESS(pod->startup_progress, POD_STARTUP_SETUP);
/* serial number: */
line6_read_serial_number(&pod->line6, &pod->serial_number);
/* ALSA audio interface: */
line6_register_audio(line6);
/* device files: */
line6_pod_create_files(pod->firmware_version,
line6->properties->device_bit, line6->ifcdev);
}
#define POD_GET_SYSTEM_PARAM(code, sign) \
static ssize_t pod_get_ ## code(struct device *dev, \
struct device_attribute *attr, char *buf) \
{ \
struct usb_interface *interface = to_usb_interface(dev); \
struct usb_line6_pod *pod = usb_get_intfdata(interface); \
return pod_get_system_param_string(pod, buf, POD_ ## code, \
&pod->code, sign); \
}
#define POD_GET_SET_SYSTEM_PARAM(code, mask, sign) \
POD_GET_SYSTEM_PARAM(code, sign) \
static ssize_t pod_set_ ## code(struct device *dev, \
struct device_attribute *attr, \
const char *buf, size_t count) \
{ \
struct usb_interface *interface = to_usb_interface(dev); \
struct usb_line6_pod *pod = usb_get_intfdata(interface); \
return pod_set_system_param_string(pod, buf, count, POD_ ## code, mask); \
}
POD_GET_SET_SYSTEM_PARAM(monitor_level, 0xffff, 0);
POD_GET_SET_SYSTEM_PARAM(routing, 0x0003, 0);
POD_GET_SET_SYSTEM_PARAM(tuner_mute, 0x0001, 0);
POD_GET_SET_SYSTEM_PARAM(tuner_freq, 0xffff, 0);
POD_GET_SYSTEM_PARAM(tuner_note, 1);
POD_GET_SYSTEM_PARAM(tuner_pitch, 1);
#undef GET_SET_SYSTEM_PARAM
#undef GET_SYSTEM_PARAM
/* POD special files: */
static DEVICE_ATTR(channel, S_IWUSR | S_IRUGO, pod_get_channel,
pod_set_channel);
static DEVICE_ATTR(clip, S_IRUGO, pod_wait_for_clip, line6_nop_write);
static DEVICE_ATTR(device_id, S_IRUGO, pod_get_device_id, line6_nop_write);
static DEVICE_ATTR(dirty, S_IRUGO, pod_get_dirty, line6_nop_write);
static DEVICE_ATTR(dump, S_IWUSR | S_IRUGO, pod_get_dump, pod_set_dump);
static DEVICE_ATTR(dump_buf, S_IWUSR | S_IRUGO, pod_get_dump_buf,
pod_set_dump_buf);
static DEVICE_ATTR(finish, S_IWUSR, line6_nop_read, pod_set_finish);
static DEVICE_ATTR(firmware_version, S_IRUGO, pod_get_firmware_version,
line6_nop_write);
static DEVICE_ATTR(midi_postprocess, S_IWUSR | S_IRUGO,
pod_get_midi_postprocess, pod_set_midi_postprocess);
static DEVICE_ATTR(monitor_level, S_IWUSR | S_IRUGO, pod_get_monitor_level,
pod_set_monitor_level);
static DEVICE_ATTR(name, S_IRUGO, pod_get_name, line6_nop_write);
static DEVICE_ATTR(name_buf, S_IRUGO, pod_get_name_buf, line6_nop_write);
static DEVICE_ATTR(retrieve_amp_setup, S_IWUSR, line6_nop_read,
pod_set_retrieve_amp_setup);
static DEVICE_ATTR(retrieve_channel, S_IWUSR, line6_nop_read,
pod_set_retrieve_channel);
static DEVICE_ATTR(retrieve_effects_setup, S_IWUSR, line6_nop_read,
pod_set_retrieve_effects_setup);
static DEVICE_ATTR(routing, S_IWUSR | S_IRUGO, pod_get_routing,
pod_set_routing);
static DEVICE_ATTR(serial_number, S_IRUGO, pod_get_serial_number,
line6_nop_write);
static DEVICE_ATTR(store_amp_setup, S_IWUSR, line6_nop_read,
pod_set_store_amp_setup);
static DEVICE_ATTR(store_channel, S_IWUSR, line6_nop_read,
pod_set_store_channel);
static DEVICE_ATTR(store_effects_setup, S_IWUSR, line6_nop_read,
pod_set_store_effects_setup);
static DEVICE_ATTR(tuner_freq, S_IWUSR | S_IRUGO, pod_get_tuner_freq,
pod_set_tuner_freq);
static DEVICE_ATTR(tuner_mute, S_IWUSR | S_IRUGO, pod_get_tuner_mute,
pod_set_tuner_mute);
static DEVICE_ATTR(tuner_note, S_IRUGO, pod_get_tuner_note, line6_nop_write);
static DEVICE_ATTR(tuner_pitch, S_IRUGO, pod_get_tuner_pitch, line6_nop_write);
#ifdef CONFIG_LINE6_USB_RAW
static DEVICE_ATTR(raw, S_IWUSR, line6_nop_read, line6_set_raw);
#endif
/* control info callback */
static int snd_pod_control_monitor_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 1;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 65535;
return 0;
}
/* control get callback */
static int snd_pod_control_monitor_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_line6_pcm *line6pcm = snd_kcontrol_chip(kcontrol);
struct usb_line6_pod *pod = (struct usb_line6_pod *)line6pcm->line6;
ucontrol->value.integer.value[0] = pod->monitor_level.value;
return 0;
}
/* control put callback */
static int snd_pod_control_monitor_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_line6_pcm *line6pcm = snd_kcontrol_chip(kcontrol);
struct usb_line6_pod *pod = (struct usb_line6_pod *)line6pcm->line6;
if (ucontrol->value.integer.value[0] == pod->monitor_level.value)
return 0;
pod->monitor_level.value = ucontrol->value.integer.value[0];
pod_set_system_param_int(pod, ucontrol->value.integer.value[0],
POD_monitor_level);
return 1;
}
/* control definition */
static struct snd_kcontrol_new pod_control_monitor = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Monitor Playback Volume",
.index = 0,
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
.info = snd_pod_control_monitor_info,
.get = snd_pod_control_monitor_get,
.put = snd_pod_control_monitor_put
};
/*
POD destructor.
*/
static void pod_destruct(struct usb_interface *interface)
{
struct usb_line6_pod *pod = usb_get_intfdata(interface);
if (pod == NULL)
return;
line6_cleanup_audio(&pod->line6);
del_timer(&pod->startup_timer);
cancel_work_sync(&pod->startup_work);
/* free dump request data: */
line6_dumpreq_destruct(&pod->dumpreq);
}
/*
Create sysfs entries.
*/
static int pod_create_files2(struct device *dev)
{
int err;
CHECK_RETURN(device_create_file(dev, &dev_attr_channel));
CHECK_RETURN(device_create_file(dev, &dev_attr_clip));
CHECK_RETURN(device_create_file(dev, &dev_attr_device_id));
CHECK_RETURN(device_create_file(dev, &dev_attr_dirty));
CHECK_RETURN(device_create_file(dev, &dev_attr_dump));
CHECK_RETURN(device_create_file(dev, &dev_attr_dump_buf));
CHECK_RETURN(device_create_file(dev, &dev_attr_finish));
CHECK_RETURN(device_create_file(dev, &dev_attr_firmware_version));
CHECK_RETURN(device_create_file(dev, &dev_attr_midi_postprocess));
CHECK_RETURN(device_create_file(dev, &dev_attr_monitor_level));
CHECK_RETURN(device_create_file(dev, &dev_attr_name));
CHECK_RETURN(device_create_file(dev, &dev_attr_name_buf));
CHECK_RETURN(device_create_file(dev, &dev_attr_retrieve_amp_setup));
CHECK_RETURN(device_create_file(dev, &dev_attr_retrieve_channel));
CHECK_RETURN(device_create_file(dev, &dev_attr_retrieve_effects_setup));
CHECK_RETURN(device_create_file(dev, &dev_attr_routing));
CHECK_RETURN(device_create_file(dev, &dev_attr_serial_number));
CHECK_RETURN(device_create_file(dev, &dev_attr_store_amp_setup));
CHECK_RETURN(device_create_file(dev, &dev_attr_store_channel));
CHECK_RETURN(device_create_file(dev, &dev_attr_store_effects_setup));
CHECK_RETURN(device_create_file(dev, &dev_attr_tuner_freq));
CHECK_RETURN(device_create_file(dev, &dev_attr_tuner_mute));
CHECK_RETURN(device_create_file(dev, &dev_attr_tuner_note));
CHECK_RETURN(device_create_file(dev, &dev_attr_tuner_pitch));
#ifdef CONFIG_LINE6_USB_RAW
CHECK_RETURN(device_create_file(dev, &dev_attr_raw));
#endif
return 0;
}
/*
Try to init POD device.
*/
static int pod_try_init(struct usb_interface *interface,
struct usb_line6_pod *pod)
{
int err;
struct usb_line6 *line6 = &pod->line6;
init_timer(&pod->startup_timer);
INIT_WORK(&pod->startup_work, pod_startup5);
if ((interface == NULL) || (pod == NULL))
return -ENODEV;
pod->channel_num = 255;
/* initialize wait queues: */
init_waitqueue_head(&pod->monitor_level.wait);
init_waitqueue_head(&pod->routing.wait);
init_waitqueue_head(&pod->tuner_mute.wait);
init_waitqueue_head(&pod->tuner_freq.wait);
init_waitqueue_head(&pod->tuner_note.wait);
init_waitqueue_head(&pod->tuner_pitch.wait);
init_waitqueue_head(&pod->clipping.wait);
memset(pod->param_dirty, 0xff, sizeof(pod->param_dirty));
/* initialize USB buffers: */
err = line6_dumpreq_init(&pod->dumpreq, pod_request_channel,
sizeof(pod_request_channel));
if (err < 0) {
dev_err(&interface->dev, "Out of memory\n");
return -ENOMEM;
}
/* create sysfs entries: */
err = pod_create_files2(&interface->dev);
if (err < 0)
return err;
/* initialize audio system: */
err = line6_init_audio(line6);
if (err < 0)
return err;
/* initialize MIDI subsystem: */
err = line6_init_midi(line6);
if (err < 0)
return err;
/* initialize PCM subsystem: */
err = line6_init_pcm(line6, &pod_pcm_properties);
if (err < 0)
return err;
/* register monitor control: */
err = snd_ctl_add(line6->card,
snd_ctl_new1(&pod_control_monitor, line6->line6pcm));
if (err < 0)
return err;
/*
When the sound card is registered at this point, the PODxt Live
displays "Invalid Code Error 07", so we do it later in the event
handler.
*/
if (pod->line6.properties->capabilities & LINE6_BIT_CONTROL) {
pod->monitor_level.value = POD_system_invalid;
/* initiate startup procedure: */
pod_startup1(pod);
}
return 0;
}
/*
Init POD device (and clean up in case of failure).
*/
int line6_pod_init(struct usb_interface *interface, struct usb_line6_pod *pod)
{
int err = pod_try_init(interface, pod);
if (err < 0)
pod_destruct(interface);
return err;
}
/*
POD device disconnected.
*/
void line6_pod_disconnect(struct usb_interface *interface)
{
struct usb_line6_pod *pod;
if (interface == NULL)
return;
pod = usb_get_intfdata(interface);
if (pod != NULL) {
struct snd_line6_pcm *line6pcm = pod->line6.line6pcm;
struct device *dev = &interface->dev;
if (line6pcm != NULL)
line6_pcm_disconnect(line6pcm);
if (dev != NULL) {
/* remove sysfs entries: */
line6_pod_remove_files(pod->firmware_version,
pod->line6.
properties->device_bit, dev);
device_remove_file(dev, &dev_attr_channel);
device_remove_file(dev, &dev_attr_clip);
device_remove_file(dev, &dev_attr_device_id);
device_remove_file(dev, &dev_attr_dirty);
device_remove_file(dev, &dev_attr_dump);
device_remove_file(dev, &dev_attr_dump_buf);
device_remove_file(dev, &dev_attr_finish);
device_remove_file(dev, &dev_attr_firmware_version);
device_remove_file(dev, &dev_attr_midi_postprocess);
device_remove_file(dev, &dev_attr_monitor_level);
device_remove_file(dev, &dev_attr_name);
device_remove_file(dev, &dev_attr_name_buf);
device_remove_file(dev, &dev_attr_retrieve_amp_setup);
device_remove_file(dev, &dev_attr_retrieve_channel);
device_remove_file(dev,
&dev_attr_retrieve_effects_setup);
device_remove_file(dev, &dev_attr_routing);
device_remove_file(dev, &dev_attr_serial_number);
device_remove_file(dev, &dev_attr_store_amp_setup);
device_remove_file(dev, &dev_attr_store_channel);
device_remove_file(dev, &dev_attr_store_effects_setup);
device_remove_file(dev, &dev_attr_tuner_freq);
device_remove_file(dev, &dev_attr_tuner_mute);
device_remove_file(dev, &dev_attr_tuner_note);
device_remove_file(dev, &dev_attr_tuner_pitch);
#ifdef CONFIG_LINE6_USB_RAW
device_remove_file(dev, &dev_attr_raw);
#endif
}
}
pod_destruct(interface);
}
| gpl-2.0 |
ion-storm/Unleashed-N5 | fs/btrfs/acl.c | 4947 | 5794 | /*
* Copyright (C) 2007 Red Hat. All rights reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public
* License v2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this program; if not, write to the
* Free Software Foundation, Inc., 59 Temple Place - Suite 330,
* Boston, MA 021110-1307, USA.
*/
#include <linux/fs.h>
#include <linux/string.h>
#include <linux/xattr.h>
#include <linux/posix_acl_xattr.h>
#include <linux/posix_acl.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include "ctree.h"
#include "btrfs_inode.h"
#include "xattr.h"
struct posix_acl *btrfs_get_acl(struct inode *inode, int type)
{
int size;
const char *name;
char *value = NULL;
struct posix_acl *acl;
if (!IS_POSIXACL(inode))
return NULL;
acl = get_cached_acl(inode, type);
if (acl != ACL_NOT_CACHED)
return acl;
switch (type) {
case ACL_TYPE_ACCESS:
name = POSIX_ACL_XATTR_ACCESS;
break;
case ACL_TYPE_DEFAULT:
name = POSIX_ACL_XATTR_DEFAULT;
break;
default:
BUG();
}
size = __btrfs_getxattr(inode, name, "", 0);
if (size > 0) {
value = kzalloc(size, GFP_NOFS);
if (!value)
return ERR_PTR(-ENOMEM);
size = __btrfs_getxattr(inode, name, value, size);
}
if (size > 0) {
acl = posix_acl_from_xattr(value, size);
} else if (size == -ENOENT || size == -ENODATA || size == 0) {
/* FIXME, who returns -ENOENT? I think nobody */
acl = NULL;
} else {
acl = ERR_PTR(-EIO);
}
kfree(value);
if (!IS_ERR(acl))
set_cached_acl(inode, type, acl);
return acl;
}
static int btrfs_xattr_acl_get(struct dentry *dentry, const char *name,
void *value, size_t size, int type)
{
struct posix_acl *acl;
int ret = 0;
if (!IS_POSIXACL(dentry->d_inode))
return -EOPNOTSUPP;
acl = btrfs_get_acl(dentry->d_inode, type);
if (IS_ERR(acl))
return PTR_ERR(acl);
if (acl == NULL)
return -ENODATA;
ret = posix_acl_to_xattr(acl, value, size);
posix_acl_release(acl);
return ret;
}
/*
* Needs to be called with fs_mutex held
*/
static int btrfs_set_acl(struct btrfs_trans_handle *trans,
struct inode *inode, struct posix_acl *acl, int type)
{
int ret, size = 0;
const char *name;
char *value = NULL;
if (acl) {
ret = posix_acl_valid(acl);
if (ret < 0)
return ret;
ret = 0;
}
switch (type) {
case ACL_TYPE_ACCESS:
name = POSIX_ACL_XATTR_ACCESS;
if (acl) {
ret = posix_acl_equiv_mode(acl, &inode->i_mode);
if (ret < 0)
return ret;
}
ret = 0;
break;
case ACL_TYPE_DEFAULT:
if (!S_ISDIR(inode->i_mode))
return acl ? -EINVAL : 0;
name = POSIX_ACL_XATTR_DEFAULT;
break;
default:
return -EINVAL;
}
if (acl) {
size = posix_acl_xattr_size(acl->a_count);
value = kmalloc(size, GFP_NOFS);
if (!value) {
ret = -ENOMEM;
goto out;
}
ret = posix_acl_to_xattr(acl, value, size);
if (ret < 0)
goto out;
}
ret = __btrfs_setxattr(trans, inode, name, value, size, 0);
out:
kfree(value);
if (!ret)
set_cached_acl(inode, type, acl);
return ret;
}
static int btrfs_xattr_acl_set(struct dentry *dentry, const char *name,
const void *value, size_t size, int flags, int type)
{
int ret;
struct posix_acl *acl = NULL;
if (!inode_owner_or_capable(dentry->d_inode))
return -EPERM;
if (!IS_POSIXACL(dentry->d_inode))
return -EOPNOTSUPP;
if (value) {
acl = posix_acl_from_xattr(value, size);
if (IS_ERR(acl))
return PTR_ERR(acl);
if (acl) {
ret = posix_acl_valid(acl);
if (ret)
goto out;
}
}
ret = btrfs_set_acl(NULL, dentry->d_inode, acl, type);
out:
posix_acl_release(acl);
return ret;
}
/*
* btrfs_init_acl is already generally called under fs_mutex, so the locking
* stuff has been fixed to work with that. If the locking stuff changes, we
* need to re-evaluate the acl locking stuff.
*/
int btrfs_init_acl(struct btrfs_trans_handle *trans,
struct inode *inode, struct inode *dir)
{
struct posix_acl *acl = NULL;
int ret = 0;
/* this happens with subvols */
if (!dir)
return 0;
if (!S_ISLNK(inode->i_mode)) {
if (IS_POSIXACL(dir)) {
acl = btrfs_get_acl(dir, ACL_TYPE_DEFAULT);
if (IS_ERR(acl))
return PTR_ERR(acl);
}
if (!acl)
inode->i_mode &= ~current_umask();
}
if (IS_POSIXACL(dir) && acl) {
if (S_ISDIR(inode->i_mode)) {
ret = btrfs_set_acl(trans, inode, acl,
ACL_TYPE_DEFAULT);
if (ret)
goto failed;
}
ret = posix_acl_create(&acl, GFP_NOFS, &inode->i_mode);
if (ret < 0)
return ret;
if (ret > 0) {
/* we need an acl */
ret = btrfs_set_acl(trans, inode, acl, ACL_TYPE_ACCESS);
}
}
failed:
posix_acl_release(acl);
return ret;
}
int btrfs_acl_chmod(struct inode *inode)
{
struct posix_acl *acl;
int ret = 0;
if (S_ISLNK(inode->i_mode))
return -EOPNOTSUPP;
if (!IS_POSIXACL(inode))
return 0;
acl = btrfs_get_acl(inode, ACL_TYPE_ACCESS);
if (IS_ERR_OR_NULL(acl))
return PTR_ERR(acl);
ret = posix_acl_chmod(&acl, GFP_KERNEL, inode->i_mode);
if (ret)
return ret;
ret = btrfs_set_acl(NULL, inode, acl, ACL_TYPE_ACCESS);
posix_acl_release(acl);
return ret;
}
const struct xattr_handler btrfs_xattr_acl_default_handler = {
.prefix = POSIX_ACL_XATTR_DEFAULT,
.flags = ACL_TYPE_DEFAULT,
.get = btrfs_xattr_acl_get,
.set = btrfs_xattr_acl_set,
};
const struct xattr_handler btrfs_xattr_acl_access_handler = {
.prefix = POSIX_ACL_XATTR_ACCESS,
.flags = ACL_TYPE_ACCESS,
.get = btrfs_xattr_acl_get,
.set = btrfs_xattr_acl_set,
};
| gpl-2.0 |
oshmoun/android_kernel_sony_msm8974 | drivers/staging/bcm/led_control.c | 4947 | 26667 | #include "headers.h"
#define STATUS_IMAGE_CHECKSUM_MISMATCH -199
#define EVENT_SIGNALED 1
static B_UINT16 CFG_CalculateChecksum(B_UINT8 *pu8Buffer, B_UINT32 u32Size)
{
B_UINT16 u16CheckSum = 0;
while (u32Size--) {
u16CheckSum += (B_UINT8)~(*pu8Buffer);
pu8Buffer++;
}
return u16CheckSum;
}
BOOLEAN IsReqGpioIsLedInNVM(PMINI_ADAPTER Adapter, UINT gpios)
{
INT Status;
Status = (Adapter->gpioBitMap & gpios) ^ gpios;
if (Status)
return FALSE;
else
return TRUE;
}
static INT LED_Blink(PMINI_ADAPTER Adapter, UINT GPIO_Num, UCHAR uiLedIndex,
ULONG timeout, INT num_of_time, LedEventInfo_t currdriverstate)
{
int Status = STATUS_SUCCESS;
BOOLEAN bInfinite = FALSE;
/* Check if num_of_time is -ve. If yes, blink led in infinite loop */
if (num_of_time < 0) {
bInfinite = TRUE;
num_of_time = 1;
}
while (num_of_time) {
if (currdriverstate == Adapter->DriverState)
TURN_ON_LED(GPIO_Num, uiLedIndex);
/* Wait for timeout after setting on the LED */
Status = wait_event_interruptible_timeout(
Adapter->LEDInfo.notify_led_event,
currdriverstate != Adapter->DriverState ||
kthread_should_stop(),
msecs_to_jiffies(timeout));
if (kthread_should_stop()) {
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
DBG_LVL_ALL,
"Led thread got signal to exit..hence exiting");
Adapter->LEDInfo.led_thread_running =
BCM_LED_THREAD_DISABLED;
TURN_OFF_LED(GPIO_Num, uiLedIndex);
Status = EVENT_SIGNALED;
break;
}
if (Status) {
TURN_OFF_LED(GPIO_Num, uiLedIndex);
Status = EVENT_SIGNALED;
break;
}
TURN_OFF_LED(GPIO_Num, uiLedIndex);
Status = wait_event_interruptible_timeout(
Adapter->LEDInfo.notify_led_event,
currdriverstate != Adapter->DriverState ||
kthread_should_stop(),
msecs_to_jiffies(timeout));
if (bInfinite == FALSE)
num_of_time--;
}
return Status;
}
static INT ScaleRateofTransfer(ULONG rate)
{
if (rate <= 3)
return rate;
else if ((rate > 3) && (rate <= 100))
return 5;
else if ((rate > 100) && (rate <= 200))
return 6;
else if ((rate > 200) && (rate <= 300))
return 7;
else if ((rate > 300) && (rate <= 400))
return 8;
else if ((rate > 400) && (rate <= 500))
return 9;
else if ((rate > 500) && (rate <= 600))
return 10;
else
return MAX_NUM_OF_BLINKS;
}
static INT LED_Proportional_Blink(PMINI_ADAPTER Adapter, UCHAR GPIO_Num_tx,
UCHAR uiTxLedIndex, UCHAR GPIO_Num_rx, UCHAR uiRxLedIndex,
LedEventInfo_t currdriverstate)
{
/* Initial values of TX and RX packets */
ULONG64 Initial_num_of_packts_tx = 0, Initial_num_of_packts_rx = 0;
/* values of TX and RX packets after 1 sec */
ULONG64 Final_num_of_packts_tx = 0, Final_num_of_packts_rx = 0;
/* Rate of transfer of Tx and Rx in 1 sec */
ULONG64 rate_of_transfer_tx = 0, rate_of_transfer_rx = 0;
int Status = STATUS_SUCCESS;
INT num_of_time = 0, num_of_time_tx = 0, num_of_time_rx = 0;
UINT remDelay = 0;
BOOLEAN bBlinkBothLED = TRUE;
/* UINT GPIO_num = DISABLE_GPIO_NUM; */
ulong timeout = 0;
/* Read initial value of packets sent/received */
Initial_num_of_packts_tx = Adapter->dev->stats.tx_packets;
Initial_num_of_packts_rx = Adapter->dev->stats.rx_packets;
/* Scale the rate of transfer to no of blinks. */
num_of_time_tx = ScaleRateofTransfer((ULONG)rate_of_transfer_tx);
num_of_time_rx = ScaleRateofTransfer((ULONG)rate_of_transfer_rx);
while ((Adapter->device_removed == FALSE)) {
timeout = 50;
/*
* Blink Tx and Rx LED when both Tx and Rx is
* in normal bandwidth
*/
if (bBlinkBothLED) {
/*
* Assign minimum number of blinks of
* either Tx or Rx.
*/
if (num_of_time_tx > num_of_time_rx)
num_of_time = num_of_time_rx;
else
num_of_time = num_of_time_tx;
if (num_of_time > 0) {
/* Blink both Tx and Rx LEDs */
if (LED_Blink(Adapter, 1 << GPIO_Num_tx,
uiTxLedIndex, timeout,
num_of_time, currdriverstate)
== EVENT_SIGNALED)
return EVENT_SIGNALED;
if (LED_Blink(Adapter, 1 << GPIO_Num_rx,
uiRxLedIndex, timeout,
num_of_time, currdriverstate)
== EVENT_SIGNALED)
return EVENT_SIGNALED;
}
if (num_of_time == num_of_time_tx) {
/* Blink pending rate of Rx */
if (LED_Blink(Adapter, (1 << GPIO_Num_rx),
uiRxLedIndex, timeout,
num_of_time_rx-num_of_time,
currdriverstate)
== EVENT_SIGNALED)
return EVENT_SIGNALED;
num_of_time = num_of_time_rx;
} else {
/* Blink pending rate of Tx */
if (LED_Blink(Adapter, 1 << GPIO_Num_tx,
uiTxLedIndex, timeout,
num_of_time_tx-num_of_time,
currdriverstate)
== EVENT_SIGNALED)
return EVENT_SIGNALED;
num_of_time = num_of_time_tx;
}
} else {
if (num_of_time == num_of_time_tx) {
/* Blink pending rate of Rx */
if (LED_Blink(Adapter, 1 << GPIO_Num_tx,
uiTxLedIndex, timeout,
num_of_time, currdriverstate)
== EVENT_SIGNALED)
return EVENT_SIGNALED;
} else {
/* Blink pending rate of Tx */
if (LED_Blink(Adapter, 1 << GPIO_Num_rx,
uiRxLedIndex, timeout,
num_of_time, currdriverstate)
== EVENT_SIGNALED)
return EVENT_SIGNALED;
}
}
/*
* If Tx/Rx rate is less than maximum blinks per second,
* wait till delay completes to 1 second
*/
remDelay = MAX_NUM_OF_BLINKS - num_of_time;
if (remDelay > 0) {
timeout = 100 * remDelay;
Status = wait_event_interruptible_timeout(
Adapter->LEDInfo.notify_led_event,
currdriverstate != Adapter->DriverState
|| kthread_should_stop(),
msecs_to_jiffies(timeout));
if (kthread_should_stop()) {
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS,
LED_DUMP_INFO, DBG_LVL_ALL,
"Led thread got signal to exit..hence exiting");
Adapter->LEDInfo.led_thread_running =
BCM_LED_THREAD_DISABLED;
return EVENT_SIGNALED;
}
if (Status)
return EVENT_SIGNALED;
}
/* Turn off both Tx and Rx LEDs before next second */
TURN_OFF_LED(1 << GPIO_Num_tx, uiTxLedIndex);
TURN_OFF_LED(1 << GPIO_Num_rx, uiTxLedIndex);
/*
* Read the Tx & Rx packets transmission after 1 second and
* calculate rate of transfer
*/
Final_num_of_packts_tx = Adapter->dev->stats.tx_packets;
Final_num_of_packts_rx = Adapter->dev->stats.rx_packets;
rate_of_transfer_tx = Final_num_of_packts_tx -
Initial_num_of_packts_tx;
rate_of_transfer_rx = Final_num_of_packts_rx -
Initial_num_of_packts_rx;
/* Read initial value of packets sent/received */
Initial_num_of_packts_tx = Final_num_of_packts_tx;
Initial_num_of_packts_rx = Final_num_of_packts_rx;
/* Scale the rate of transfer to no of blinks. */
num_of_time_tx =
ScaleRateofTransfer((ULONG)rate_of_transfer_tx);
num_of_time_rx =
ScaleRateofTransfer((ULONG)rate_of_transfer_rx);
}
return Status;
}
/*
* -----------------------------------------------------------------------------
* Procedure: ValidateDSDParamsChecksum
*
* Description: Reads DSD Params and validates checkusm.
*
* Arguments:
* Adapter - Pointer to Adapter structure.
* ulParamOffset - Start offset of the DSD parameter to be read and
* validated.
* usParamLen - Length of the DSD Parameter.
*
* Returns:
* <OSAL_STATUS_CODE>
* -----------------------------------------------------------------------------
*/
static INT ValidateDSDParamsChecksum(PMINI_ADAPTER Adapter, ULONG ulParamOffset,
USHORT usParamLen)
{
INT Status = STATUS_SUCCESS;
PUCHAR puBuffer = NULL;
USHORT usChksmOrg = 0;
USHORT usChecksumCalculated = 0;
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,
"LED Thread:ValidateDSDParamsChecksum: 0x%lx 0x%X",
ulParamOffset, usParamLen);
puBuffer = kmalloc(usParamLen, GFP_KERNEL);
if (!puBuffer) {
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
DBG_LVL_ALL,
"LED Thread: ValidateDSDParamsChecksum Allocation failed");
return -ENOMEM;
}
/* Read the DSD data from the parameter offset. */
if (STATUS_SUCCESS != BeceemNVMRead(Adapter, (PUINT)puBuffer,
ulParamOffset, usParamLen)) {
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
DBG_LVL_ALL,
"LED Thread: ValidateDSDParamsChecksum BeceemNVMRead failed");
Status = STATUS_IMAGE_CHECKSUM_MISMATCH;
goto exit;
}
/* Calculate the checksum of the data read from the DSD parameter. */
usChecksumCalculated = CFG_CalculateChecksum(puBuffer, usParamLen);
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,
"LED Thread: usCheckSumCalculated = 0x%x\n",
usChecksumCalculated);
/*
* End of the DSD parameter will have a TWO bytes checksum stored in it.
* Read it and compare with the calculated Checksum.
*/
if (STATUS_SUCCESS != BeceemNVMRead(Adapter, (PUINT)&usChksmOrg,
ulParamOffset+usParamLen, 2)) {
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
DBG_LVL_ALL,
"LED Thread: ValidateDSDParamsChecksum BeceemNVMRead failed");
Status = STATUS_IMAGE_CHECKSUM_MISMATCH;
goto exit;
}
usChksmOrg = ntohs(usChksmOrg);
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,
"LED Thread: usChksmOrg = 0x%x", usChksmOrg);
/*
* Compare the checksum calculated with the checksum read
* from DSD section
*/
if (usChecksumCalculated ^ usChksmOrg) {
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
DBG_LVL_ALL,
"LED Thread: ValidateDSDParamsChecksum: Checksums don't match");
Status = STATUS_IMAGE_CHECKSUM_MISMATCH;
goto exit;
}
exit:
kfree(puBuffer);
return Status;
}
/*
* -----------------------------------------------------------------------------
* Procedure: ValidateHWParmStructure
*
* Description: Validates HW Parameters.
*
* Arguments:
* Adapter - Pointer to Adapter structure.
* ulHwParamOffset - Start offset of the HW parameter Section to be read
* and validated.
*
* Returns:
* <OSAL_STATUS_CODE>
* -----------------------------------------------------------------------------
*/
static INT ValidateHWParmStructure(PMINI_ADAPTER Adapter, ULONG ulHwParamOffset)
{
INT Status = STATUS_SUCCESS;
USHORT HwParamLen = 0;
/*
* Add DSD start offset to the hwParamOffset to get
* the actual address.
*/
ulHwParamOffset += DSD_START_OFFSET;
/* Read the Length of HW_PARAM structure */
BeceemNVMRead(Adapter, (PUINT)&HwParamLen, ulHwParamOffset, 2);
HwParamLen = ntohs(HwParamLen);
if (0 == HwParamLen || HwParamLen > Adapter->uiNVMDSDSize)
return STATUS_IMAGE_CHECKSUM_MISMATCH;
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,
"LED Thread:HwParamLen = 0x%x", HwParamLen);
Status = ValidateDSDParamsChecksum(Adapter, ulHwParamOffset,
HwParamLen);
return Status;
} /* ValidateHWParmStructure() */
static int ReadLEDInformationFromEEPROM(PMINI_ADAPTER Adapter,
UCHAR GPIO_Array[])
{
int Status = STATUS_SUCCESS;
ULONG dwReadValue = 0;
USHORT usHwParamData = 0;
USHORT usEEPROMVersion = 0;
UCHAR ucIndex = 0;
UCHAR ucGPIOInfo[32] = {0};
BeceemNVMRead(Adapter, (PUINT)&usEEPROMVersion,
EEPROM_VERSION_OFFSET, 2);
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,
"usEEPROMVersion: Minor:0x%X Major:0x%x",
usEEPROMVersion&0xFF, ((usEEPROMVersion>>8)&0xFF));
if (((usEEPROMVersion>>8)&0xFF) < EEPROM_MAP5_MAJORVERSION) {
BeceemNVMRead(Adapter, (PUINT)&usHwParamData,
EEPROM_HW_PARAM_POINTER_ADDRESS, 2);
usHwParamData = ntohs(usHwParamData);
dwReadValue = usHwParamData;
} else {
/*
* Validate Compatibility section and then read HW param
* if compatibility section is valid.
*/
Status = ValidateDSDParamsChecksum(Adapter,
DSD_START_OFFSET,
COMPATIBILITY_SECTION_LENGTH_MAP5);
if (Status != STATUS_SUCCESS)
return Status;
BeceemNVMRead(Adapter, (PUINT)&dwReadValue,
EEPROM_HW_PARAM_POINTER_ADDRRES_MAP5, 4);
dwReadValue = ntohl(dwReadValue);
}
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,
"LED Thread: Start address of HW_PARAM structure = 0x%lx",
dwReadValue);
/*
* Validate if the address read out is within the DSD.
* Adapter->uiNVMDSDSize gives whole DSD size inclusive of Autoinit.
* lower limit should be above DSD_START_OFFSET and
* upper limit should be below (Adapter->uiNVMDSDSize-DSD_START_OFFSET)
*/
if (dwReadValue < DSD_START_OFFSET ||
dwReadValue > (Adapter->uiNVMDSDSize-DSD_START_OFFSET))
return STATUS_IMAGE_CHECKSUM_MISMATCH;
Status = ValidateHWParmStructure(Adapter, dwReadValue);
if (Status)
return Status;
/*
* Add DSD_START_OFFSET to the offset read from the EEPROM.
* This will give the actual start HW Parameters start address.
* To read GPIO section, add GPIO offset further.
*/
dwReadValue +=
DSD_START_OFFSET; /* = start address of hw param section. */
dwReadValue += GPIO_SECTION_START_OFFSET;
/* = GPIO start offset within HW Param section. */
/*
* Read the GPIO values for 32 GPIOs from EEPROM and map the function
* number to GPIO pin number to GPIO_Array
*/
BeceemNVMRead(Adapter, (UINT *)ucGPIOInfo, dwReadValue, 32);
for (ucIndex = 0; ucIndex < 32; ucIndex++) {
switch (ucGPIOInfo[ucIndex]) {
case RED_LED:
GPIO_Array[RED_LED] = ucIndex;
Adapter->gpioBitMap |= (1 << ucIndex);
break;
case BLUE_LED:
GPIO_Array[BLUE_LED] = ucIndex;
Adapter->gpioBitMap |= (1 << ucIndex);
break;
case YELLOW_LED:
GPIO_Array[YELLOW_LED] = ucIndex;
Adapter->gpioBitMap |= (1 << ucIndex);
break;
case GREEN_LED:
GPIO_Array[GREEN_LED] = ucIndex;
Adapter->gpioBitMap |= (1 << ucIndex);
break;
default:
break;
}
}
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,
"GPIO's bit map correspond to LED :0x%X", Adapter->gpioBitMap);
return Status;
}
static int ReadConfigFileStructure(PMINI_ADAPTER Adapter,
BOOLEAN *bEnableThread)
{
int Status = STATUS_SUCCESS;
/* Array to store GPIO numbers from EEPROM */
UCHAR GPIO_Array[NUM_OF_LEDS+1];
UINT uiIndex = 0;
UINT uiNum_of_LED_Type = 0;
PUCHAR puCFGData = NULL;
UCHAR bData = 0;
memset(GPIO_Array, DISABLE_GPIO_NUM, NUM_OF_LEDS+1);
if (!Adapter->pstargetparams || IS_ERR(Adapter->pstargetparams)) {
BCM_DEBUG_PRINT (Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
DBG_LVL_ALL, "Target Params not Avail.\n");
return -ENOENT;
}
/* Populate GPIO_Array with GPIO numbers for LED functions */
/* Read the GPIO numbers from EEPROM */
Status = ReadLEDInformationFromEEPROM(Adapter, GPIO_Array);
if (Status == STATUS_IMAGE_CHECKSUM_MISMATCH) {
*bEnableThread = FALSE;
return STATUS_SUCCESS;
} else if (Status) {
*bEnableThread = FALSE;
return Status;
}
/*
* CONFIG file read successfully. Deallocate the memory of
* uiFileNameBufferSize
*/
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,
"LED Thread: Config file read successfully\n");
puCFGData = (PUCHAR) &Adapter->pstargetparams->HostDrvrConfig1;
/*
* Offset for HostDrvConfig1, HostDrvConfig2, HostDrvConfig3 which
* will have the information of LED type, LED on state for different
* driver state and LED blink state.
*/
for (uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) {
bData = *puCFGData;
/*
* Check Bit 8 for polarity. If it is set,
* polarity is reverse polarity
*/
if (bData & 0x80) {
Adapter->LEDInfo.LEDState[uiIndex].BitPolarity = 0;
/* unset the bit 8 */
bData = bData & 0x7f;
}
Adapter->LEDInfo.LEDState[uiIndex].LED_Type = bData;
if (bData <= NUM_OF_LEDS)
Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num =
GPIO_Array[bData];
else
Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num =
DISABLE_GPIO_NUM;
puCFGData++;
bData = *puCFGData;
Adapter->LEDInfo.LEDState[uiIndex].LED_On_State = bData;
puCFGData++;
bData = *puCFGData;
Adapter->LEDInfo.LEDState[uiIndex].LED_Blink_State = bData;
puCFGData++;
}
/*
* Check if all the LED settings are disabled. If it is disabled,
* dont launch the LED control thread.
*/
for (uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) {
if ((Adapter->LEDInfo.LEDState[uiIndex].LED_Type == DISABLE_GPIO_NUM) ||
(Adapter->LEDInfo.LEDState[uiIndex].LED_Type == 0x7f) ||
(Adapter->LEDInfo.LEDState[uiIndex].LED_Type == 0))
uiNum_of_LED_Type++;
}
if (uiNum_of_LED_Type >= NUM_OF_LEDS)
*bEnableThread = FALSE;
return Status;
}
/*
* -----------------------------------------------------------------------------
* Procedure: LedGpioInit
*
* Description: Initializes LED GPIOs. Makes the LED GPIOs to OUTPUT mode
* and make the initial state to be OFF.
*
* Arguments:
* Adapter - Pointer to MINI_ADAPTER structure.
*
* Returns: VOID
*
* -----------------------------------------------------------------------------
*/
static VOID LedGpioInit(PMINI_ADAPTER Adapter)
{
UINT uiResetValue = 0;
UINT uiIndex = 0;
/* Set all LED GPIO Mode to output mode */
if (rdmalt(Adapter, GPIO_MODE_REGISTER, &uiResetValue,
sizeof(uiResetValue)) < 0)
BCM_DEBUG_PRINT (Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
DBG_LVL_ALL, "LED Thread: RDM Failed\n");
for (uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) {
if (Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num !=
DISABLE_GPIO_NUM)
uiResetValue |= (1 << Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num);
TURN_OFF_LED(1 << Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num,
uiIndex);
}
if (wrmalt(Adapter, GPIO_MODE_REGISTER, &uiResetValue,
sizeof(uiResetValue)) < 0)
BCM_DEBUG_PRINT (Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
DBG_LVL_ALL, "LED Thread: WRM Failed\n");
Adapter->LEDInfo.bIdle_led_off = FALSE;
}
static INT BcmGetGPIOPinInfo(PMINI_ADAPTER Adapter, UCHAR *GPIO_num_tx,
UCHAR *GPIO_num_rx, UCHAR *uiLedTxIndex, UCHAR *uiLedRxIndex,
LedEventInfo_t currdriverstate)
{
UINT uiIndex = 0;
*GPIO_num_tx = DISABLE_GPIO_NUM;
*GPIO_num_rx = DISABLE_GPIO_NUM;
for (uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) {
if ((currdriverstate == NORMAL_OPERATION) ||
(currdriverstate == IDLEMODE_EXIT) ||
(currdriverstate == FW_DOWNLOAD)) {
if (Adapter->LEDInfo.LEDState[uiIndex].LED_Blink_State &
currdriverstate) {
if (Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num
!= DISABLE_GPIO_NUM) {
if (*GPIO_num_tx == DISABLE_GPIO_NUM) {
*GPIO_num_tx = Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num;
*uiLedTxIndex = uiIndex;
} else {
*GPIO_num_rx = Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num;
*uiLedRxIndex = uiIndex;
}
}
}
} else {
if (Adapter->LEDInfo.LEDState[uiIndex].LED_On_State
& currdriverstate) {
if (Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num
!= DISABLE_GPIO_NUM) {
*GPIO_num_tx = Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num;
*uiLedTxIndex = uiIndex;
}
}
}
}
return STATUS_SUCCESS;
}
static VOID LEDControlThread(PMINI_ADAPTER Adapter)
{
UINT uiIndex = 0;
UCHAR GPIO_num = 0;
UCHAR uiLedIndex = 0;
UINT uiResetValue = 0;
LedEventInfo_t currdriverstate = 0;
ulong timeout = 0;
INT Status = 0;
UCHAR dummyGPIONum = 0;
UCHAR dummyIndex = 0;
/* currdriverstate = Adapter->DriverState; */
Adapter->LEDInfo.bIdleMode_tx_from_host = FALSE;
/*
* Wait till event is triggered
*
* wait_event(Adapter->LEDInfo.notify_led_event,
* currdriverstate!= Adapter->DriverState);
*/
GPIO_num = DISABLE_GPIO_NUM;
while (TRUE) {
/* Wait till event is triggered */
if ((GPIO_num == DISABLE_GPIO_NUM)
||
((currdriverstate != FW_DOWNLOAD) &&
(currdriverstate != NORMAL_OPERATION) &&
(currdriverstate != LOWPOWER_MODE_ENTER))
||
(currdriverstate == LED_THREAD_INACTIVE))
Status = wait_event_interruptible(
Adapter->LEDInfo.notify_led_event,
currdriverstate != Adapter->DriverState
|| kthread_should_stop());
if (kthread_should_stop() || Adapter->device_removed) {
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
DBG_LVL_ALL,
"Led thread got signal to exit..hence exiting");
Adapter->LEDInfo.led_thread_running =
BCM_LED_THREAD_DISABLED;
TURN_OFF_LED(1 << GPIO_num, uiLedIndex);
return; /* STATUS_FAILURE; */
}
if (GPIO_num != DISABLE_GPIO_NUM)
TURN_OFF_LED(1 << GPIO_num, uiLedIndex);
if (Adapter->LEDInfo.bLedInitDone == FALSE) {
LedGpioInit(Adapter);
Adapter->LEDInfo.bLedInitDone = TRUE;
}
switch (Adapter->DriverState) {
case DRIVER_INIT:
currdriverstate = DRIVER_INIT;
/* Adapter->DriverState; */
BcmGetGPIOPinInfo(Adapter, &GPIO_num, &dummyGPIONum,
&uiLedIndex, &dummyIndex, currdriverstate);
if (GPIO_num != DISABLE_GPIO_NUM)
TURN_ON_LED(1 << GPIO_num, uiLedIndex);
break;
case FW_DOWNLOAD:
/*
* BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS,
* LED_DUMP_INFO, DBG_LVL_ALL,
* "LED Thread: FW_DN_DONE called\n");
*/
currdriverstate = FW_DOWNLOAD;
BcmGetGPIOPinInfo(Adapter, &GPIO_num, &dummyGPIONum,
&uiLedIndex, &dummyIndex, currdriverstate);
if (GPIO_num != DISABLE_GPIO_NUM) {
timeout = 50;
LED_Blink(Adapter, 1 << GPIO_num, uiLedIndex,
timeout, -1, currdriverstate);
}
break;
case FW_DOWNLOAD_DONE:
currdriverstate = FW_DOWNLOAD_DONE;
BcmGetGPIOPinInfo(Adapter, &GPIO_num, &dummyGPIONum,
&uiLedIndex, &dummyIndex, currdriverstate);
if (GPIO_num != DISABLE_GPIO_NUM)
TURN_ON_LED(1 << GPIO_num, uiLedIndex);
break;
case SHUTDOWN_EXIT:
/*
* no break, continue to NO_NETWORK_ENTRY
* state as well.
*/
case NO_NETWORK_ENTRY:
currdriverstate = NO_NETWORK_ENTRY;
BcmGetGPIOPinInfo(Adapter, &GPIO_num, &dummyGPIONum,
&uiLedIndex, &dummyGPIONum, currdriverstate);
if (GPIO_num != DISABLE_GPIO_NUM)
TURN_ON_LED(1 << GPIO_num, uiLedIndex);
break;
case NORMAL_OPERATION:
{
UCHAR GPIO_num_tx = DISABLE_GPIO_NUM;
UCHAR GPIO_num_rx = DISABLE_GPIO_NUM;
UCHAR uiLEDTx = 0;
UCHAR uiLEDRx = 0;
currdriverstate = NORMAL_OPERATION;
Adapter->LEDInfo.bIdle_led_off = FALSE;
BcmGetGPIOPinInfo(Adapter, &GPIO_num_tx,
&GPIO_num_rx, &uiLEDTx, &uiLEDRx,
currdriverstate);
if ((GPIO_num_tx == DISABLE_GPIO_NUM) &&
(GPIO_num_rx ==
DISABLE_GPIO_NUM)) {
GPIO_num = DISABLE_GPIO_NUM;
} else {
/*
* If single LED is selected, use same
* for both Tx and Rx
*/
if (GPIO_num_tx == DISABLE_GPIO_NUM) {
GPIO_num_tx = GPIO_num_rx;
uiLEDTx = uiLEDRx;
} else if (GPIO_num_rx ==
DISABLE_GPIO_NUM) {
GPIO_num_rx = GPIO_num_tx;
uiLEDRx = uiLEDTx;
}
/*
* Blink the LED in proportionate
* to Tx and Rx transmissions.
*/
LED_Proportional_Blink(Adapter,
GPIO_num_tx, uiLEDTx,
GPIO_num_rx, uiLEDRx,
currdriverstate);
}
}
break;
case LOWPOWER_MODE_ENTER:
currdriverstate = LOWPOWER_MODE_ENTER;
if (DEVICE_POWERSAVE_MODE_AS_MANUAL_CLOCK_GATING ==
Adapter->ulPowerSaveMode) {
/* Turn OFF all the LED */
uiResetValue = 0;
for (uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) {
if (Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num != DISABLE_GPIO_NUM)
TURN_OFF_LED((1 << Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num), uiIndex);
}
}
/* Turn off LED And WAKE-UP for Sendinf IDLE mode ACK */
Adapter->LEDInfo.bLedInitDone = FALSE;
Adapter->LEDInfo.bIdle_led_off = TRUE;
wake_up(&Adapter->LEDInfo.idleModeSyncEvent);
GPIO_num = DISABLE_GPIO_NUM;
break;
case IDLEMODE_CONTINUE:
currdriverstate = IDLEMODE_CONTINUE;
GPIO_num = DISABLE_GPIO_NUM;
break;
case IDLEMODE_EXIT:
break;
case DRIVER_HALT:
currdriverstate = DRIVER_HALT;
GPIO_num = DISABLE_GPIO_NUM;
for (uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) {
if (Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num
!= DISABLE_GPIO_NUM)
TURN_OFF_LED((1 << Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num), uiIndex);
}
/* Adapter->DriverState = DRIVER_INIT; */
break;
case LED_THREAD_INACTIVE:
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
DBG_LVL_ALL, "InActivating LED thread...");
currdriverstate = LED_THREAD_INACTIVE;
Adapter->LEDInfo.led_thread_running =
BCM_LED_THREAD_RUNNING_INACTIVELY;
Adapter->LEDInfo.bLedInitDone = FALSE;
/* disable ALL LED */
for (uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) {
if (Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num
!= DISABLE_GPIO_NUM)
TURN_OFF_LED((1 << Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num), uiIndex);
}
break;
case LED_THREAD_ACTIVE:
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
DBG_LVL_ALL, "Activating LED thread again...");
if (Adapter->LinkUpStatus == FALSE)
Adapter->DriverState = NO_NETWORK_ENTRY;
else
Adapter->DriverState = NORMAL_OPERATION;
Adapter->LEDInfo.led_thread_running =
BCM_LED_THREAD_RUNNING_ACTIVELY;
break;
/* return; */
default:
break;
}
}
Adapter->LEDInfo.led_thread_running = BCM_LED_THREAD_DISABLED;
}
int InitLedSettings(PMINI_ADAPTER Adapter)
{
int Status = STATUS_SUCCESS;
BOOLEAN bEnableThread = TRUE;
UCHAR uiIndex = 0;
/*
* Initially set BitPolarity to normal polarity. The bit 8 of LED type
* is used to change the polarity of the LED.
*/
for (uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++)
Adapter->LEDInfo.LEDState[uiIndex].BitPolarity = 1;
/*
* Read the LED settings of CONFIG file and map it
* to GPIO numbers in EEPROM
*/
Status = ReadConfigFileStructure(Adapter, &bEnableThread);
if (STATUS_SUCCESS != Status) {
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
DBG_LVL_ALL,
"LED Thread: FAILED in ReadConfigFileStructure\n");
return Status;
}
if (Adapter->LEDInfo.led_thread_running) {
if (bEnableThread) {
;
} else {
Adapter->DriverState = DRIVER_HALT;
wake_up(&Adapter->LEDInfo.notify_led_event);
Adapter->LEDInfo.led_thread_running =
BCM_LED_THREAD_DISABLED;
}
} else if (bEnableThread) {
/* Create secondary thread to handle the LEDs */
init_waitqueue_head(&Adapter->LEDInfo.notify_led_event);
init_waitqueue_head(&Adapter->LEDInfo.idleModeSyncEvent);
Adapter->LEDInfo.led_thread_running =
BCM_LED_THREAD_RUNNING_ACTIVELY;
Adapter->LEDInfo.bIdle_led_off = FALSE;
Adapter->LEDInfo.led_cntrl_threadid =
kthread_run((int (*)(void *)) LEDControlThread,
Adapter, "led_control_thread");
if (IS_ERR(Adapter->LEDInfo.led_cntrl_threadid)) {
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
DBG_LVL_ALL,
"Not able to spawn Kernel Thread\n");
Adapter->LEDInfo.led_thread_running =
BCM_LED_THREAD_DISABLED;
return PTR_ERR(Adapter->LEDInfo.led_cntrl_threadid);
}
}
return Status;
}
| gpl-2.0 |
hiikezoe/android_kernel_nec_n06e | drivers/net/can/softing/softing_main.c | 4947 | 21848 | /*
* Copyright (C) 2008-2010
*
* - Kurt Van Dijck, EIA Electronics
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the version 2 of the GNU General Public License
* as published by the Free Software Foundation
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <asm/io.h>
#include "softing.h"
#define TX_ECHO_SKB_MAX (((TXMAX+1)/2)-1)
/*
* test is a specific CAN netdev
* is online (ie. up 'n running, not sleeping, not busoff
*/
static inline int canif_is_active(struct net_device *netdev)
{
struct can_priv *can = netdev_priv(netdev);
if (!netif_running(netdev))
return 0;
return (can->state <= CAN_STATE_ERROR_PASSIVE);
}
/* reset DPRAM */
static inline void softing_set_reset_dpram(struct softing *card)
{
if (card->pdat->generation >= 2) {
spin_lock_bh(&card->spin);
iowrite8(ioread8(&card->dpram[DPRAM_V2_RESET]) & ~1,
&card->dpram[DPRAM_V2_RESET]);
spin_unlock_bh(&card->spin);
}
}
static inline void softing_clr_reset_dpram(struct softing *card)
{
if (card->pdat->generation >= 2) {
spin_lock_bh(&card->spin);
iowrite8(ioread8(&card->dpram[DPRAM_V2_RESET]) | 1,
&card->dpram[DPRAM_V2_RESET]);
spin_unlock_bh(&card->spin);
}
}
/* trigger the tx queue-ing */
static netdev_tx_t softing_netdev_start_xmit(struct sk_buff *skb,
struct net_device *dev)
{
struct softing_priv *priv = netdev_priv(dev);
struct softing *card = priv->card;
int ret;
uint8_t *ptr;
uint8_t fifo_wr, fifo_rd;
struct can_frame *cf = (struct can_frame *)skb->data;
uint8_t buf[DPRAM_TX_SIZE];
if (can_dropped_invalid_skb(dev, skb))
return NETDEV_TX_OK;
spin_lock(&card->spin);
ret = NETDEV_TX_BUSY;
if (!card->fw.up ||
(card->tx.pending >= TXMAX) ||
(priv->tx.pending >= TX_ECHO_SKB_MAX))
goto xmit_done;
fifo_wr = ioread8(&card->dpram[DPRAM_TX_WR]);
fifo_rd = ioread8(&card->dpram[DPRAM_TX_RD]);
if (fifo_wr == fifo_rd)
/* fifo full */
goto xmit_done;
memset(buf, 0, sizeof(buf));
ptr = buf;
*ptr = CMD_TX;
if (cf->can_id & CAN_RTR_FLAG)
*ptr |= CMD_RTR;
if (cf->can_id & CAN_EFF_FLAG)
*ptr |= CMD_XTD;
if (priv->index)
*ptr |= CMD_BUS2;
++ptr;
*ptr++ = cf->can_dlc;
*ptr++ = (cf->can_id >> 0);
*ptr++ = (cf->can_id >> 8);
if (cf->can_id & CAN_EFF_FLAG) {
*ptr++ = (cf->can_id >> 16);
*ptr++ = (cf->can_id >> 24);
} else {
/* increment 1, not 2 as you might think */
ptr += 1;
}
if (!(cf->can_id & CAN_RTR_FLAG))
memcpy(ptr, &cf->data[0], cf->can_dlc);
memcpy_toio(&card->dpram[DPRAM_TX + DPRAM_TX_SIZE * fifo_wr],
buf, DPRAM_TX_SIZE);
if (++fifo_wr >= DPRAM_TX_CNT)
fifo_wr = 0;
iowrite8(fifo_wr, &card->dpram[DPRAM_TX_WR]);
card->tx.last_bus = priv->index;
++card->tx.pending;
++priv->tx.pending;
can_put_echo_skb(skb, dev, priv->tx.echo_put);
++priv->tx.echo_put;
if (priv->tx.echo_put >= TX_ECHO_SKB_MAX)
priv->tx.echo_put = 0;
/* can_put_echo_skb() saves the skb, safe to return TX_OK */
ret = NETDEV_TX_OK;
xmit_done:
spin_unlock(&card->spin);
if (card->tx.pending >= TXMAX) {
int j;
for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
if (card->net[j])
netif_stop_queue(card->net[j]);
}
}
if (ret != NETDEV_TX_OK)
netif_stop_queue(dev);
return ret;
}
/*
* shortcut for skb delivery
*/
int softing_netdev_rx(struct net_device *netdev, const struct can_frame *msg,
ktime_t ktime)
{
struct sk_buff *skb;
struct can_frame *cf;
skb = alloc_can_skb(netdev, &cf);
if (!skb)
return -ENOMEM;
memcpy(cf, msg, sizeof(*msg));
skb->tstamp = ktime;
return netif_rx(skb);
}
/*
* softing_handle_1
* pop 1 entry from the DPRAM queue, and process
*/
static int softing_handle_1(struct softing *card)
{
struct net_device *netdev;
struct softing_priv *priv;
ktime_t ktime;
struct can_frame msg;
int cnt = 0, lost_msg;
uint8_t fifo_rd, fifo_wr, cmd;
uint8_t *ptr;
uint32_t tmp_u32;
uint8_t buf[DPRAM_RX_SIZE];
memset(&msg, 0, sizeof(msg));
/* test for lost msgs */
lost_msg = ioread8(&card->dpram[DPRAM_RX_LOST]);
if (lost_msg) {
int j;
/* reset condition */
iowrite8(0, &card->dpram[DPRAM_RX_LOST]);
/* prepare msg */
msg.can_id = CAN_ERR_FLAG | CAN_ERR_CRTL;
msg.can_dlc = CAN_ERR_DLC;
msg.data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
/*
* service to all busses, we don't know which it was applicable
* but only service busses that are online
*/
for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
netdev = card->net[j];
if (!netdev)
continue;
if (!canif_is_active(netdev))
/* a dead bus has no overflows */
continue;
++netdev->stats.rx_over_errors;
softing_netdev_rx(netdev, &msg, ktime_set(0, 0));
}
/* prepare for other use */
memset(&msg, 0, sizeof(msg));
++cnt;
}
fifo_rd = ioread8(&card->dpram[DPRAM_RX_RD]);
fifo_wr = ioread8(&card->dpram[DPRAM_RX_WR]);
if (++fifo_rd >= DPRAM_RX_CNT)
fifo_rd = 0;
if (fifo_wr == fifo_rd)
return cnt;
memcpy_fromio(buf, &card->dpram[DPRAM_RX + DPRAM_RX_SIZE*fifo_rd],
DPRAM_RX_SIZE);
mb();
/* trigger dual port RAM */
iowrite8(fifo_rd, &card->dpram[DPRAM_RX_RD]);
ptr = buf;
cmd = *ptr++;
if (cmd == 0xff)
/* not quite useful, probably the card has got out */
return 0;
netdev = card->net[0];
if (cmd & CMD_BUS2)
netdev = card->net[1];
priv = netdev_priv(netdev);
if (cmd & CMD_ERR) {
uint8_t can_state, state;
state = *ptr++;
msg.can_id = CAN_ERR_FLAG;
msg.can_dlc = CAN_ERR_DLC;
if (state & SF_MASK_BUSOFF) {
can_state = CAN_STATE_BUS_OFF;
msg.can_id |= CAN_ERR_BUSOFF;
state = STATE_BUSOFF;
} else if (state & SF_MASK_EPASSIVE) {
can_state = CAN_STATE_ERROR_PASSIVE;
msg.can_id |= CAN_ERR_CRTL;
msg.data[1] = CAN_ERR_CRTL_TX_PASSIVE;
state = STATE_EPASSIVE;
} else {
can_state = CAN_STATE_ERROR_ACTIVE;
msg.can_id |= CAN_ERR_CRTL;
state = STATE_EACTIVE;
}
/* update DPRAM */
iowrite8(state, &card->dpram[priv->index ?
DPRAM_INFO_BUSSTATE2 : DPRAM_INFO_BUSSTATE]);
/* timestamp */
tmp_u32 = le32_to_cpup((void *)ptr);
ptr += 4;
ktime = softing_raw2ktime(card, tmp_u32);
++netdev->stats.rx_errors;
/* update internal status */
if (can_state != priv->can.state) {
priv->can.state = can_state;
if (can_state == CAN_STATE_ERROR_PASSIVE)
++priv->can.can_stats.error_passive;
else if (can_state == CAN_STATE_BUS_OFF) {
/* this calls can_close_cleanup() */
can_bus_off(netdev);
netif_stop_queue(netdev);
}
/* trigger socketcan */
softing_netdev_rx(netdev, &msg, ktime);
}
} else {
if (cmd & CMD_RTR)
msg.can_id |= CAN_RTR_FLAG;
msg.can_dlc = get_can_dlc(*ptr++);
if (cmd & CMD_XTD) {
msg.can_id |= CAN_EFF_FLAG;
msg.can_id |= le32_to_cpup((void *)ptr);
ptr += 4;
} else {
msg.can_id |= le16_to_cpup((void *)ptr);
ptr += 2;
}
/* timestamp */
tmp_u32 = le32_to_cpup((void *)ptr);
ptr += 4;
ktime = softing_raw2ktime(card, tmp_u32);
if (!(msg.can_id & CAN_RTR_FLAG))
memcpy(&msg.data[0], ptr, 8);
ptr += 8;
/* update socket */
if (cmd & CMD_ACK) {
/* acknowledge, was tx msg */
struct sk_buff *skb;
skb = priv->can.echo_skb[priv->tx.echo_get];
if (skb)
skb->tstamp = ktime;
can_get_echo_skb(netdev, priv->tx.echo_get);
++priv->tx.echo_get;
if (priv->tx.echo_get >= TX_ECHO_SKB_MAX)
priv->tx.echo_get = 0;
if (priv->tx.pending)
--priv->tx.pending;
if (card->tx.pending)
--card->tx.pending;
++netdev->stats.tx_packets;
if (!(msg.can_id & CAN_RTR_FLAG))
netdev->stats.tx_bytes += msg.can_dlc;
} else {
int ret;
ret = softing_netdev_rx(netdev, &msg, ktime);
if (ret == NET_RX_SUCCESS) {
++netdev->stats.rx_packets;
if (!(msg.can_id & CAN_RTR_FLAG))
netdev->stats.rx_bytes += msg.can_dlc;
} else {
++netdev->stats.rx_dropped;
}
}
}
++cnt;
return cnt;
}
/*
* real interrupt handler
*/
static irqreturn_t softing_irq_thread(int irq, void *dev_id)
{
struct softing *card = (struct softing *)dev_id;
struct net_device *netdev;
struct softing_priv *priv;
int j, offset, work_done;
work_done = 0;
spin_lock_bh(&card->spin);
while (softing_handle_1(card) > 0) {
++card->irq.svc_count;
++work_done;
}
spin_unlock_bh(&card->spin);
/* resume tx queue's */
offset = card->tx.last_bus;
for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
if (card->tx.pending >= TXMAX)
break;
netdev = card->net[(j + offset + 1) % card->pdat->nbus];
if (!netdev)
continue;
priv = netdev_priv(netdev);
if (!canif_is_active(netdev))
/* it makes no sense to wake dead busses */
continue;
if (priv->tx.pending >= TX_ECHO_SKB_MAX)
continue;
++work_done;
netif_wake_queue(netdev);
}
return work_done ? IRQ_HANDLED : IRQ_NONE;
}
/*
* interrupt routines:
* schedule the 'real interrupt handler'
*/
static irqreturn_t softing_irq_v2(int irq, void *dev_id)
{
struct softing *card = (struct softing *)dev_id;
uint8_t ir;
ir = ioread8(&card->dpram[DPRAM_V2_IRQ_TOHOST]);
iowrite8(0, &card->dpram[DPRAM_V2_IRQ_TOHOST]);
return (1 == ir) ? IRQ_WAKE_THREAD : IRQ_NONE;
}
static irqreturn_t softing_irq_v1(int irq, void *dev_id)
{
struct softing *card = (struct softing *)dev_id;
uint8_t ir;
ir = ioread8(&card->dpram[DPRAM_IRQ_TOHOST]);
iowrite8(0, &card->dpram[DPRAM_IRQ_TOHOST]);
return ir ? IRQ_WAKE_THREAD : IRQ_NONE;
}
/*
* netdev/candev inter-operability
*/
static int softing_netdev_open(struct net_device *ndev)
{
int ret;
/* check or determine and set bittime */
ret = open_candev(ndev);
if (!ret)
ret = softing_startstop(ndev, 1);
return ret;
}
static int softing_netdev_stop(struct net_device *ndev)
{
int ret;
netif_stop_queue(ndev);
/* softing cycle does close_candev() */
ret = softing_startstop(ndev, 0);
return ret;
}
static int softing_candev_set_mode(struct net_device *ndev, enum can_mode mode)
{
int ret;
switch (mode) {
case CAN_MODE_START:
/* softing_startstop does close_candev() */
ret = softing_startstop(ndev, 1);
return ret;
case CAN_MODE_STOP:
case CAN_MODE_SLEEP:
return -EOPNOTSUPP;
}
return 0;
}
/*
* Softing device management helpers
*/
int softing_enable_irq(struct softing *card, int enable)
{
int ret;
if (!card->irq.nr) {
return 0;
} else if (card->irq.requested && !enable) {
free_irq(card->irq.nr, card);
card->irq.requested = 0;
} else if (!card->irq.requested && enable) {
ret = request_threaded_irq(card->irq.nr,
(card->pdat->generation >= 2) ?
softing_irq_v2 : softing_irq_v1,
softing_irq_thread, IRQF_SHARED,
dev_name(&card->pdev->dev), card);
if (ret) {
dev_alert(&card->pdev->dev,
"request_threaded_irq(%u) failed\n",
card->irq.nr);
return ret;
}
card->irq.requested = 1;
}
return 0;
}
static void softing_card_shutdown(struct softing *card)
{
int fw_up = 0;
if (mutex_lock_interruptible(&card->fw.lock))
/* return -ERESTARTSYS */;
fw_up = card->fw.up;
card->fw.up = 0;
if (card->irq.requested && card->irq.nr) {
free_irq(card->irq.nr, card);
card->irq.requested = 0;
}
if (fw_up) {
if (card->pdat->enable_irq)
card->pdat->enable_irq(card->pdev, 0);
softing_set_reset_dpram(card);
if (card->pdat->reset)
card->pdat->reset(card->pdev, 1);
}
mutex_unlock(&card->fw.lock);
}
static __devinit int softing_card_boot(struct softing *card)
{
int ret, j;
static const uint8_t stream[] = {
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, };
unsigned char back[sizeof(stream)];
if (mutex_lock_interruptible(&card->fw.lock))
return -ERESTARTSYS;
if (card->fw.up) {
mutex_unlock(&card->fw.lock);
return 0;
}
/* reset board */
if (card->pdat->enable_irq)
card->pdat->enable_irq(card->pdev, 1);
/* boot card */
softing_set_reset_dpram(card);
if (card->pdat->reset)
card->pdat->reset(card->pdev, 1);
for (j = 0; (j + sizeof(stream)) < card->dpram_size;
j += sizeof(stream)) {
memcpy_toio(&card->dpram[j], stream, sizeof(stream));
/* flush IO cache */
mb();
memcpy_fromio(back, &card->dpram[j], sizeof(stream));
if (!memcmp(back, stream, sizeof(stream)))
continue;
/* memory is not equal */
dev_alert(&card->pdev->dev, "dpram failed at 0x%04x\n", j);
ret = -EIO;
goto failed;
}
wmb();
/* load boot firmware */
ret = softing_load_fw(card->pdat->boot.fw, card, card->dpram,
card->dpram_size,
card->pdat->boot.offs - card->pdat->boot.addr);
if (ret < 0)
goto failed;
/* load loader firmware */
ret = softing_load_fw(card->pdat->load.fw, card, card->dpram,
card->dpram_size,
card->pdat->load.offs - card->pdat->load.addr);
if (ret < 0)
goto failed;
if (card->pdat->reset)
card->pdat->reset(card->pdev, 0);
softing_clr_reset_dpram(card);
ret = softing_bootloader_command(card, 0, "card boot");
if (ret < 0)
goto failed;
ret = softing_load_app_fw(card->pdat->app.fw, card);
if (ret < 0)
goto failed;
ret = softing_chip_poweron(card);
if (ret < 0)
goto failed;
card->fw.up = 1;
mutex_unlock(&card->fw.lock);
return 0;
failed:
card->fw.up = 0;
if (card->pdat->enable_irq)
card->pdat->enable_irq(card->pdev, 0);
softing_set_reset_dpram(card);
if (card->pdat->reset)
card->pdat->reset(card->pdev, 1);
mutex_unlock(&card->fw.lock);
return ret;
}
/*
* netdev sysfs
*/
static ssize_t show_channel(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct net_device *ndev = to_net_dev(dev);
struct softing_priv *priv = netdev2softing(ndev);
return sprintf(buf, "%i\n", priv->index);
}
static ssize_t show_chip(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct net_device *ndev = to_net_dev(dev);
struct softing_priv *priv = netdev2softing(ndev);
return sprintf(buf, "%i\n", priv->chip);
}
static ssize_t show_output(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct net_device *ndev = to_net_dev(dev);
struct softing_priv *priv = netdev2softing(ndev);
return sprintf(buf, "0x%02x\n", priv->output);
}
static ssize_t store_output(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct net_device *ndev = to_net_dev(dev);
struct softing_priv *priv = netdev2softing(ndev);
struct softing *card = priv->card;
unsigned long val;
int ret;
ret = strict_strtoul(buf, 0, &val);
if (ret < 0)
return ret;
val &= 0xFF;
ret = mutex_lock_interruptible(&card->fw.lock);
if (ret)
return -ERESTARTSYS;
if (netif_running(ndev)) {
mutex_unlock(&card->fw.lock);
return -EBUSY;
}
priv->output = val;
mutex_unlock(&card->fw.lock);
return count;
}
static const DEVICE_ATTR(channel, S_IRUGO, show_channel, NULL);
static const DEVICE_ATTR(chip, S_IRUGO, show_chip, NULL);
static const DEVICE_ATTR(output, S_IRUGO | S_IWUSR, show_output, store_output);
static const struct attribute *const netdev_sysfs_attrs[] = {
&dev_attr_channel.attr,
&dev_attr_chip.attr,
&dev_attr_output.attr,
NULL,
};
static const struct attribute_group netdev_sysfs_group = {
.name = NULL,
.attrs = (struct attribute **)netdev_sysfs_attrs,
};
static const struct net_device_ops softing_netdev_ops = {
.ndo_open = softing_netdev_open,
.ndo_stop = softing_netdev_stop,
.ndo_start_xmit = softing_netdev_start_xmit,
};
static const struct can_bittiming_const softing_btr_const = {
.name = "softing",
.tseg1_min = 1,
.tseg1_max = 16,
.tseg2_min = 1,
.tseg2_max = 8,
.sjw_max = 4, /* overruled */
.brp_min = 1,
.brp_max = 32, /* overruled */
.brp_inc = 1,
};
static __devinit struct net_device *softing_netdev_create(struct softing *card,
uint16_t chip_id)
{
struct net_device *netdev;
struct softing_priv *priv;
netdev = alloc_candev(sizeof(*priv), TX_ECHO_SKB_MAX);
if (!netdev) {
dev_alert(&card->pdev->dev, "alloc_candev failed\n");
return NULL;
}
priv = netdev_priv(netdev);
priv->netdev = netdev;
priv->card = card;
memcpy(&priv->btr_const, &softing_btr_const, sizeof(priv->btr_const));
priv->btr_const.brp_max = card->pdat->max_brp;
priv->btr_const.sjw_max = card->pdat->max_sjw;
priv->can.bittiming_const = &priv->btr_const;
priv->can.clock.freq = 8000000;
priv->chip = chip_id;
priv->output = softing_default_output(netdev);
SET_NETDEV_DEV(netdev, &card->pdev->dev);
netdev->flags |= IFF_ECHO;
netdev->netdev_ops = &softing_netdev_ops;
priv->can.do_set_mode = softing_candev_set_mode;
priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES;
return netdev;
}
static __devinit int softing_netdev_register(struct net_device *netdev)
{
int ret;
netdev->sysfs_groups[0] = &netdev_sysfs_group;
ret = register_candev(netdev);
if (ret) {
dev_alert(&netdev->dev, "register failed\n");
return ret;
}
return 0;
}
static void softing_netdev_cleanup(struct net_device *netdev)
{
unregister_candev(netdev);
free_candev(netdev);
}
/*
* sysfs for Platform device
*/
#define DEV_ATTR_RO(name, member) \
static ssize_t show_##name(struct device *dev, \
struct device_attribute *attr, char *buf) \
{ \
struct softing *card = platform_get_drvdata(to_platform_device(dev)); \
return sprintf(buf, "%u\n", card->member); \
} \
static DEVICE_ATTR(name, 0444, show_##name, NULL)
#define DEV_ATTR_RO_STR(name, member) \
static ssize_t show_##name(struct device *dev, \
struct device_attribute *attr, char *buf) \
{ \
struct softing *card = platform_get_drvdata(to_platform_device(dev)); \
return sprintf(buf, "%s\n", card->member); \
} \
static DEVICE_ATTR(name, 0444, show_##name, NULL)
DEV_ATTR_RO(serial, id.serial);
DEV_ATTR_RO_STR(firmware, pdat->app.fw);
DEV_ATTR_RO(firmware_version, id.fw_version);
DEV_ATTR_RO_STR(hardware, pdat->name);
DEV_ATTR_RO(hardware_version, id.hw_version);
DEV_ATTR_RO(license, id.license);
DEV_ATTR_RO(frequency, id.freq);
DEV_ATTR_RO(txpending, tx.pending);
static struct attribute *softing_pdev_attrs[] = {
&dev_attr_serial.attr,
&dev_attr_firmware.attr,
&dev_attr_firmware_version.attr,
&dev_attr_hardware.attr,
&dev_attr_hardware_version.attr,
&dev_attr_license.attr,
&dev_attr_frequency.attr,
&dev_attr_txpending.attr,
NULL,
};
static const struct attribute_group softing_pdev_group = {
.name = NULL,
.attrs = softing_pdev_attrs,
};
/*
* platform driver
*/
static __devexit int softing_pdev_remove(struct platform_device *pdev)
{
struct softing *card = platform_get_drvdata(pdev);
int j;
/* first, disable card*/
softing_card_shutdown(card);
for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
if (!card->net[j])
continue;
softing_netdev_cleanup(card->net[j]);
card->net[j] = NULL;
}
sysfs_remove_group(&pdev->dev.kobj, &softing_pdev_group);
iounmap(card->dpram);
kfree(card);
return 0;
}
static __devinit int softing_pdev_probe(struct platform_device *pdev)
{
const struct softing_platform_data *pdat = pdev->dev.platform_data;
struct softing *card;
struct net_device *netdev;
struct softing_priv *priv;
struct resource *pres;
int ret;
int j;
if (!pdat) {
dev_warn(&pdev->dev, "no platform data\n");
return -EINVAL;
}
if (pdat->nbus > ARRAY_SIZE(card->net)) {
dev_warn(&pdev->dev, "%u nets??\n", pdat->nbus);
return -EINVAL;
}
card = kzalloc(sizeof(*card), GFP_KERNEL);
if (!card)
return -ENOMEM;
card->pdat = pdat;
card->pdev = pdev;
platform_set_drvdata(pdev, card);
mutex_init(&card->fw.lock);
spin_lock_init(&card->spin);
ret = -EINVAL;
pres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!pres)
goto platform_resource_failed;
card->dpram_phys = pres->start;
card->dpram_size = resource_size(pres);
card->dpram = ioremap_nocache(card->dpram_phys, card->dpram_size);
if (!card->dpram) {
dev_alert(&card->pdev->dev, "dpram ioremap failed\n");
goto ioremap_failed;
}
pres = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (pres)
card->irq.nr = pres->start;
/* reset card */
ret = softing_card_boot(card);
if (ret < 0) {
dev_alert(&pdev->dev, "failed to boot\n");
goto boot_failed;
}
/* only now, the chip's are known */
card->id.freq = card->pdat->freq;
ret = sysfs_create_group(&pdev->dev.kobj, &softing_pdev_group);
if (ret < 0) {
dev_alert(&card->pdev->dev, "sysfs failed\n");
goto sysfs_failed;
}
ret = -ENOMEM;
for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
card->net[j] = netdev =
softing_netdev_create(card, card->id.chip[j]);
if (!netdev) {
dev_alert(&pdev->dev, "failed to make can[%i]", j);
goto netdev_failed;
}
priv = netdev_priv(card->net[j]);
priv->index = j;
ret = softing_netdev_register(netdev);
if (ret) {
free_candev(netdev);
card->net[j] = NULL;
dev_alert(&card->pdev->dev,
"failed to register can[%i]\n", j);
goto netdev_failed;
}
}
dev_info(&card->pdev->dev, "%s ready.\n", card->pdat->name);
return 0;
netdev_failed:
for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
if (!card->net[j])
continue;
softing_netdev_cleanup(card->net[j]);
}
sysfs_remove_group(&pdev->dev.kobj, &softing_pdev_group);
sysfs_failed:
softing_card_shutdown(card);
boot_failed:
iounmap(card->dpram);
ioremap_failed:
platform_resource_failed:
kfree(card);
return ret;
}
static struct platform_driver softing_driver = {
.driver = {
.name = "softing",
.owner = THIS_MODULE,
},
.probe = softing_pdev_probe,
.remove = __devexit_p(softing_pdev_remove),
};
module_platform_driver(softing_driver);
MODULE_ALIAS("platform:softing");
MODULE_DESCRIPTION("Softing DPRAM CAN driver");
MODULE_AUTHOR("Kurt Van Dijck <kurt.van.dijck@eia.be>");
MODULE_LICENSE("GPL v2");
| gpl-2.0 |
championswimmer/android_kernel_sony_msm8260 | drivers/isdn/sc/event.c | 7507 | 1733 | /* $Id: event.c,v 1.4.8.1 2001/09/23 22:24:59 kai Exp $
*
* Copyright (C) 1996 SpellCaster Telecommunications Inc.
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
* For more information, please contact gpl-info@spellcast.com or write:
*
* SpellCaster Telecommunications Inc.
* 5621 Finch Avenue East, Unit #3
* Scarborough, Ontario Canada
* M1B 2T9
* +1 (416) 297-8565
* +1 (416) 297-6433 Facsimile
*/
#include "includes.h"
#include "hardware.h"
#include "message.h"
#include "card.h"
#ifdef DEBUG
static char *events[] = { "ISDN_STAT_STAVAIL",
"ISDN_STAT_ICALL",
"ISDN_STAT_RUN",
"ISDN_STAT_STOP",
"ISDN_STAT_DCONN",
"ISDN_STAT_BCONN",
"ISDN_STAT_DHUP",
"ISDN_STAT_BHUP",
"ISDN_STAT_CINF",
"ISDN_STAT_LOAD",
"ISDN_STAT_UNLOAD",
"ISDN_STAT_BSENT",
"ISDN_STAT_NODCH",
"ISDN_STAT_ADDCH",
"ISDN_STAT_CAUSE" };
#endif
int indicate_status(int card, int event, ulong Channel, char *Data)
{
isdn_ctrl cmd;
#ifdef DEBUG
pr_debug("%s: Indicating event %s on Channel %d\n",
sc_adapter[card]->devicename, events[event - 256], Channel);
#endif
if (Data != NULL) {
pr_debug("%s: Event data: %s\n", sc_adapter[card]->devicename,
Data);
switch (event) {
case ISDN_STAT_BSENT:
memcpy(&cmd.parm.length, Data, sizeof(cmd.parm.length));
break;
case ISDN_STAT_ICALL:
memcpy(&cmd.parm.setup, Data, sizeof(cmd.parm.setup));
break;
default:
strcpy(cmd.parm.num, Data);
}
}
cmd.command = event;
cmd.driver = sc_adapter[card]->driverId;
cmd.arg = Channel;
return sc_adapter[card]->card->statcallb(&cmd);
}
| gpl-2.0 |
GalaxyTab4/android_kernel_samsung_millet | drivers/isdn/sc/event.c | 7507 | 1733 | /* $Id: event.c,v 1.4.8.1 2001/09/23 22:24:59 kai Exp $
*
* Copyright (C) 1996 SpellCaster Telecommunications Inc.
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
* For more information, please contact gpl-info@spellcast.com or write:
*
* SpellCaster Telecommunications Inc.
* 5621 Finch Avenue East, Unit #3
* Scarborough, Ontario Canada
* M1B 2T9
* +1 (416) 297-8565
* +1 (416) 297-6433 Facsimile
*/
#include "includes.h"
#include "hardware.h"
#include "message.h"
#include "card.h"
#ifdef DEBUG
static char *events[] = { "ISDN_STAT_STAVAIL",
"ISDN_STAT_ICALL",
"ISDN_STAT_RUN",
"ISDN_STAT_STOP",
"ISDN_STAT_DCONN",
"ISDN_STAT_BCONN",
"ISDN_STAT_DHUP",
"ISDN_STAT_BHUP",
"ISDN_STAT_CINF",
"ISDN_STAT_LOAD",
"ISDN_STAT_UNLOAD",
"ISDN_STAT_BSENT",
"ISDN_STAT_NODCH",
"ISDN_STAT_ADDCH",
"ISDN_STAT_CAUSE" };
#endif
int indicate_status(int card, int event, ulong Channel, char *Data)
{
isdn_ctrl cmd;
#ifdef DEBUG
pr_debug("%s: Indicating event %s on Channel %d\n",
sc_adapter[card]->devicename, events[event - 256], Channel);
#endif
if (Data != NULL) {
pr_debug("%s: Event data: %s\n", sc_adapter[card]->devicename,
Data);
switch (event) {
case ISDN_STAT_BSENT:
memcpy(&cmd.parm.length, Data, sizeof(cmd.parm.length));
break;
case ISDN_STAT_ICALL:
memcpy(&cmd.parm.setup, Data, sizeof(cmd.parm.setup));
break;
default:
strcpy(cmd.parm.num, Data);
}
}
cmd.command = event;
cmd.driver = sc_adapter[card]->driverId;
cmd.arg = Channel;
return sc_adapter[card]->card->statcallb(&cmd);
}
| gpl-2.0 |
gwindlord/android_kernel_lenovo_b8000 | drivers/staging/rtl8712/rtl871x_io.c | 7763 | 4969 | /******************************************************************************
* rtl871x_io.c
*
* Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
* Linux device driver for RTL8192SU
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* Modifications for inclusion into the Linux staging tree are
* Copyright(c) 2010 Larry Finger. All rights reserved.
*
* Contact information:
* WLAN FAE <wlanfae@realtek.com>
* Larry Finger <Larry.Finger@lwfinger.net>
*
******************************************************************************/
/*
*
* The purpose of rtl871x_io.c
*
* a. provides the API
* b. provides the protocol engine
* c. provides the software interface between caller and the hardware interface
*
* For r8712u, both sync/async operations are provided.
*
* Only sync read/write_mem operations are provided.
*
*/
#define _RTL871X_IO_C_
#include "osdep_service.h"
#include "drv_types.h"
#include "rtl871x_io.h"
#include "osdep_intf.h"
#include "usb_ops.h"
static uint _init_intf_hdl(struct _adapter *padapter,
struct intf_hdl *pintf_hdl)
{
struct intf_priv *pintf_priv;
void (*set_intf_option)(u32 *poption) = NULL;
void (*set_intf_funs)(struct intf_hdl *pintf_hdl);
void (*set_intf_ops)(struct _io_ops *pops);
uint (*init_intf_priv)(struct intf_priv *pintfpriv);
set_intf_option = &(r8712_usb_set_intf_option);
set_intf_funs = &(r8712_usb_set_intf_funs);
set_intf_ops = &r8712_usb_set_intf_ops;
init_intf_priv = &r8712_usb_init_intf_priv;
pintf_priv = pintf_hdl->pintfpriv = (struct intf_priv *)
_malloc(sizeof(struct intf_priv));
if (pintf_priv == NULL)
goto _init_intf_hdl_fail;
pintf_hdl->adapter = (u8 *)padapter;
set_intf_option(&pintf_hdl->intf_option);
set_intf_funs(pintf_hdl);
set_intf_ops(&pintf_hdl->io_ops);
pintf_priv->intf_dev = (u8 *)&(padapter->dvobjpriv);
if (init_intf_priv(pintf_priv) == _FAIL)
goto _init_intf_hdl_fail;
return _SUCCESS;
_init_intf_hdl_fail:
kfree(pintf_priv);
return _FAIL;
}
static void _unload_intf_hdl(struct intf_priv *pintfpriv)
{
void (*unload_intf_priv)(struct intf_priv *pintfpriv);
unload_intf_priv = &r8712_usb_unload_intf_priv;
unload_intf_priv(pintfpriv);
kfree(pintfpriv);
}
static uint register_intf_hdl(u8 *dev, struct intf_hdl *pintfhdl)
{
struct _adapter *adapter = (struct _adapter *)dev;
pintfhdl->intf_option = 0;
pintfhdl->adapter = dev;
pintfhdl->intf_dev = (u8 *)&(adapter->dvobjpriv);
if (_init_intf_hdl(adapter, pintfhdl) == false)
goto register_intf_hdl_fail;
return _SUCCESS;
register_intf_hdl_fail:
return false;
}
static void unregister_intf_hdl(struct intf_hdl *pintfhdl)
{
_unload_intf_hdl(pintfhdl->pintfpriv);
memset((u8 *)pintfhdl, 0, sizeof(struct intf_hdl));
}
uint r8712_alloc_io_queue(struct _adapter *adapter)
{
u32 i;
struct io_queue *pio_queue;
struct io_req *pio_req;
pio_queue = (struct io_queue *)_malloc(sizeof(struct io_queue));
if (pio_queue == NULL)
goto alloc_io_queue_fail;
_init_listhead(&pio_queue->free_ioreqs);
_init_listhead(&pio_queue->processing);
_init_listhead(&pio_queue->pending);
spin_lock_init(&pio_queue->lock);
pio_queue->pallocated_free_ioreqs_buf = (u8 *)_malloc(NUM_IOREQ *
(sizeof(struct io_req)) + 4);
if ((pio_queue->pallocated_free_ioreqs_buf) == NULL)
goto alloc_io_queue_fail;
memset(pio_queue->pallocated_free_ioreqs_buf, 0,
(NUM_IOREQ * (sizeof(struct io_req)) + 4));
pio_queue->free_ioreqs_buf = pio_queue->pallocated_free_ioreqs_buf + 4
- ((addr_t)(pio_queue->pallocated_free_ioreqs_buf)
& 3);
pio_req = (struct io_req *)(pio_queue->free_ioreqs_buf);
for (i = 0; i < NUM_IOREQ; i++) {
_init_listhead(&pio_req->list);
list_insert_tail(&pio_req->list, &pio_queue->free_ioreqs);
pio_req++;
}
if ((register_intf_hdl((u8 *)adapter, &(pio_queue->intf))) == _FAIL)
goto alloc_io_queue_fail;
adapter->pio_queue = pio_queue;
return _SUCCESS;
alloc_io_queue_fail:
if (pio_queue) {
kfree(pio_queue->pallocated_free_ioreqs_buf);
kfree((u8 *)pio_queue);
}
adapter->pio_queue = NULL;
return _FAIL;
}
void r8712_free_io_queue(struct _adapter *adapter)
{
struct io_queue *pio_queue = (struct io_queue *)(adapter->pio_queue);
if (pio_queue) {
kfree(pio_queue->pallocated_free_ioreqs_buf);
adapter->pio_queue = NULL;
unregister_intf_hdl(&pio_queue->intf);
kfree((u8 *)pio_queue);
}
}
| gpl-2.0 |
TaichiN/android_kernel_google_msm | drivers/media/dvb/mantis/mantis_vp2033.c | 8019 | 4529 | /*
Mantis VP-2033 driver
Copyright (C) Manu Abraham (abraham.manu@gmail.com)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include "dmxdev.h"
#include "dvbdev.h"
#include "dvb_demux.h"
#include "dvb_frontend.h"
#include "dvb_net.h"
#include "tda1002x.h"
#include "mantis_common.h"
#include "mantis_ioc.h"
#include "mantis_dvb.h"
#include "mantis_vp2033.h"
#define MANTIS_MODEL_NAME "VP-2033"
#define MANTIS_DEV_TYPE "DVB-C"
struct tda1002x_config vp2033_tda1002x_cu1216_config = {
.demod_address = 0x18 >> 1,
.invert = 1,
};
struct tda10023_config vp2033_tda10023_cu1216_config = {
.demod_address = 0x18 >> 1,
.invert = 1,
};
static u8 read_pwm(struct mantis_pci *mantis)
{
struct i2c_adapter *adapter = &mantis->adapter;
u8 b = 0xff;
u8 pwm;
struct i2c_msg msg[] = {
{.addr = 0x50, .flags = 0, .buf = &b, .len = 1},
{.addr = 0x50, .flags = I2C_M_RD, .buf = &pwm, .len = 1}
};
if ((i2c_transfer(adapter, msg, 2) != 2)
|| (pwm == 0xff))
pwm = 0x48;
return pwm;
}
static int tda1002x_cu1216_tuner_set(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct mantis_pci *mantis = fe->dvb->priv;
struct i2c_adapter *adapter = &mantis->adapter;
u8 buf[6];
struct i2c_msg msg = {.addr = 0x60, .flags = 0, .buf = buf, .len = sizeof(buf)};
int i;
#define CU1216_IF 36125000
#define TUNER_MUL 62500
u32 div = (p->frequency + CU1216_IF + TUNER_MUL / 2) / TUNER_MUL;
buf[0] = (div >> 8) & 0x7f;
buf[1] = div & 0xff;
buf[2] = 0xce;
buf[3] = (p->frequency < 150000000 ? 0x01 :
p->frequency < 445000000 ? 0x02 : 0x04);
buf[4] = 0xde;
buf[5] = 0x20;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
if (i2c_transfer(adapter, &msg, 1) != 1)
return -EIO;
/* wait for the pll lock */
msg.flags = I2C_M_RD;
msg.len = 1;
for (i = 0; i < 20; i++) {
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
if (i2c_transfer(adapter, &msg, 1) == 1 && (buf[0] & 0x40))
break;
msleep(10);
}
/* switch the charge pump to the lower current */
msg.flags = 0;
msg.len = 2;
msg.buf = &buf[2];
buf[2] &= ~0x40;
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
if (i2c_transfer(adapter, &msg, 1) != 1)
return -EIO;
return 0;
}
static int vp2033_frontend_init(struct mantis_pci *mantis, struct dvb_frontend *fe)
{
struct i2c_adapter *adapter = &mantis->adapter;
int err = 0;
err = mantis_frontend_power(mantis, POWER_ON);
if (err == 0) {
mantis_frontend_soft_reset(mantis);
msleep(250);
dprintk(MANTIS_ERROR, 1, "Probing for CU1216 (DVB-C)");
fe = dvb_attach(tda10021_attach, &vp2033_tda1002x_cu1216_config,
adapter,
read_pwm(mantis));
if (fe) {
dprintk(MANTIS_ERROR, 1,
"found Philips CU1216 DVB-C frontend (TDA10021) @ 0x%02x",
vp2033_tda1002x_cu1216_config.demod_address);
} else {
fe = dvb_attach(tda10023_attach, &vp2033_tda10023_cu1216_config,
adapter,
read_pwm(mantis));
if (fe) {
dprintk(MANTIS_ERROR, 1,
"found Philips CU1216 DVB-C frontend (TDA10023) @ 0x%02x",
vp2033_tda1002x_cu1216_config.demod_address);
}
}
if (fe) {
fe->ops.tuner_ops.set_params = tda1002x_cu1216_tuner_set;
dprintk(MANTIS_ERROR, 1, "Mantis DVB-C Philips CU1216 frontend attach success");
} else {
return -1;
}
} else {
dprintk(MANTIS_ERROR, 1, "Frontend on <%s> POWER ON failed! <%d>",
adapter->name,
err);
return -EIO;
}
mantis->fe = fe;
dprintk(MANTIS_DEBUG, 1, "Done!");
return 0;
}
struct mantis_hwconfig vp2033_config = {
.model_name = MANTIS_MODEL_NAME,
.dev_type = MANTIS_DEV_TYPE,
.ts_size = MANTIS_TS_204,
.baud_rate = MANTIS_BAUD_9600,
.parity = MANTIS_PARITY_NONE,
.bytes = 0,
.frontend_init = vp2033_frontend_init,
.power = GPIF_A12,
.reset = GPIF_A13,
};
| gpl-2.0 |
cmenard/kernel_smdk4412 | tools/perf/util/callchain.c | 8019 | 10730 | /*
* Copyright (C) 2009-2011, Frederic Weisbecker <fweisbec@gmail.com>
*
* Handle the callchains from the stream in an ad-hoc radix tree and then
* sort them in an rbtree.
*
* Using a radix for code path provides a fast retrieval and factorizes
* memory use. Also that lets us use the paths in a hierarchical graph view.
*
*/
#include <stdlib.h>
#include <stdio.h>
#include <stdbool.h>
#include <errno.h>
#include <math.h>
#include "util.h"
#include "callchain.h"
bool ip_callchain__valid(struct ip_callchain *chain,
const union perf_event *event)
{
unsigned int chain_size = event->header.size;
chain_size -= (unsigned long)&event->ip.__more_data - (unsigned long)event;
return chain->nr * sizeof(u64) <= chain_size;
}
#define chain_for_each_child(child, parent) \
list_for_each_entry(child, &parent->children, siblings)
#define chain_for_each_child_safe(child, next, parent) \
list_for_each_entry_safe(child, next, &parent->children, siblings)
static void
rb_insert_callchain(struct rb_root *root, struct callchain_node *chain,
enum chain_mode mode)
{
struct rb_node **p = &root->rb_node;
struct rb_node *parent = NULL;
struct callchain_node *rnode;
u64 chain_cumul = callchain_cumul_hits(chain);
while (*p) {
u64 rnode_cumul;
parent = *p;
rnode = rb_entry(parent, struct callchain_node, rb_node);
rnode_cumul = callchain_cumul_hits(rnode);
switch (mode) {
case CHAIN_FLAT:
if (rnode->hit < chain->hit)
p = &(*p)->rb_left;
else
p = &(*p)->rb_right;
break;
case CHAIN_GRAPH_ABS: /* Falldown */
case CHAIN_GRAPH_REL:
if (rnode_cumul < chain_cumul)
p = &(*p)->rb_left;
else
p = &(*p)->rb_right;
break;
case CHAIN_NONE:
default:
break;
}
}
rb_link_node(&chain->rb_node, parent, p);
rb_insert_color(&chain->rb_node, root);
}
static void
__sort_chain_flat(struct rb_root *rb_root, struct callchain_node *node,
u64 min_hit)
{
struct callchain_node *child;
chain_for_each_child(child, node)
__sort_chain_flat(rb_root, child, min_hit);
if (node->hit && node->hit >= min_hit)
rb_insert_callchain(rb_root, node, CHAIN_FLAT);
}
/*
* Once we get every callchains from the stream, we can now
* sort them by hit
*/
static void
sort_chain_flat(struct rb_root *rb_root, struct callchain_root *root,
u64 min_hit, struct callchain_param *param __used)
{
__sort_chain_flat(rb_root, &root->node, min_hit);
}
static void __sort_chain_graph_abs(struct callchain_node *node,
u64 min_hit)
{
struct callchain_node *child;
node->rb_root = RB_ROOT;
chain_for_each_child(child, node) {
__sort_chain_graph_abs(child, min_hit);
if (callchain_cumul_hits(child) >= min_hit)
rb_insert_callchain(&node->rb_root, child,
CHAIN_GRAPH_ABS);
}
}
static void
sort_chain_graph_abs(struct rb_root *rb_root, struct callchain_root *chain_root,
u64 min_hit, struct callchain_param *param __used)
{
__sort_chain_graph_abs(&chain_root->node, min_hit);
rb_root->rb_node = chain_root->node.rb_root.rb_node;
}
static void __sort_chain_graph_rel(struct callchain_node *node,
double min_percent)
{
struct callchain_node *child;
u64 min_hit;
node->rb_root = RB_ROOT;
min_hit = ceil(node->children_hit * min_percent);
chain_for_each_child(child, node) {
__sort_chain_graph_rel(child, min_percent);
if (callchain_cumul_hits(child) >= min_hit)
rb_insert_callchain(&node->rb_root, child,
CHAIN_GRAPH_REL);
}
}
static void
sort_chain_graph_rel(struct rb_root *rb_root, struct callchain_root *chain_root,
u64 min_hit __used, struct callchain_param *param)
{
__sort_chain_graph_rel(&chain_root->node, param->min_percent / 100.0);
rb_root->rb_node = chain_root->node.rb_root.rb_node;
}
int callchain_register_param(struct callchain_param *param)
{
switch (param->mode) {
case CHAIN_GRAPH_ABS:
param->sort = sort_chain_graph_abs;
break;
case CHAIN_GRAPH_REL:
param->sort = sort_chain_graph_rel;
break;
case CHAIN_FLAT:
param->sort = sort_chain_flat;
break;
case CHAIN_NONE:
default:
return -1;
}
return 0;
}
/*
* Create a child for a parent. If inherit_children, then the new child
* will become the new parent of it's parent children
*/
static struct callchain_node *
create_child(struct callchain_node *parent, bool inherit_children)
{
struct callchain_node *new;
new = zalloc(sizeof(*new));
if (!new) {
perror("not enough memory to create child for code path tree");
return NULL;
}
new->parent = parent;
INIT_LIST_HEAD(&new->children);
INIT_LIST_HEAD(&new->val);
if (inherit_children) {
struct callchain_node *next;
list_splice(&parent->children, &new->children);
INIT_LIST_HEAD(&parent->children);
chain_for_each_child(next, new)
next->parent = new;
}
list_add_tail(&new->siblings, &parent->children);
return new;
}
/*
* Fill the node with callchain values
*/
static void
fill_node(struct callchain_node *node, struct callchain_cursor *cursor)
{
struct callchain_cursor_node *cursor_node;
node->val_nr = cursor->nr - cursor->pos;
if (!node->val_nr)
pr_warning("Warning: empty node in callchain tree\n");
cursor_node = callchain_cursor_current(cursor);
while (cursor_node) {
struct callchain_list *call;
call = zalloc(sizeof(*call));
if (!call) {
perror("not enough memory for the code path tree");
return;
}
call->ip = cursor_node->ip;
call->ms.sym = cursor_node->sym;
call->ms.map = cursor_node->map;
list_add_tail(&call->list, &node->val);
callchain_cursor_advance(cursor);
cursor_node = callchain_cursor_current(cursor);
}
}
static void
add_child(struct callchain_node *parent,
struct callchain_cursor *cursor,
u64 period)
{
struct callchain_node *new;
new = create_child(parent, false);
fill_node(new, cursor);
new->children_hit = 0;
new->hit = period;
}
/*
* Split the parent in two parts (a new child is created) and
* give a part of its callchain to the created child.
* Then create another child to host the given callchain of new branch
*/
static void
split_add_child(struct callchain_node *parent,
struct callchain_cursor *cursor,
struct callchain_list *to_split,
u64 idx_parents, u64 idx_local, u64 period)
{
struct callchain_node *new;
struct list_head *old_tail;
unsigned int idx_total = idx_parents + idx_local;
/* split */
new = create_child(parent, true);
/* split the callchain and move a part to the new child */
old_tail = parent->val.prev;
list_del_range(&to_split->list, old_tail);
new->val.next = &to_split->list;
new->val.prev = old_tail;
to_split->list.prev = &new->val;
old_tail->next = &new->val;
/* split the hits */
new->hit = parent->hit;
new->children_hit = parent->children_hit;
parent->children_hit = callchain_cumul_hits(new);
new->val_nr = parent->val_nr - idx_local;
parent->val_nr = idx_local;
/* create a new child for the new branch if any */
if (idx_total < cursor->nr) {
parent->hit = 0;
add_child(parent, cursor, period);
parent->children_hit += period;
} else {
parent->hit = period;
}
}
static int
append_chain(struct callchain_node *root,
struct callchain_cursor *cursor,
u64 period);
static void
append_chain_children(struct callchain_node *root,
struct callchain_cursor *cursor,
u64 period)
{
struct callchain_node *rnode;
/* lookup in childrens */
chain_for_each_child(rnode, root) {
unsigned int ret = append_chain(rnode, cursor, period);
if (!ret)
goto inc_children_hit;
}
/* nothing in children, add to the current node */
add_child(root, cursor, period);
inc_children_hit:
root->children_hit += period;
}
static int
append_chain(struct callchain_node *root,
struct callchain_cursor *cursor,
u64 period)
{
struct callchain_cursor_node *curr_snap = cursor->curr;
struct callchain_list *cnode;
u64 start = cursor->pos;
bool found = false;
u64 matches;
/*
* Lookup in the current node
* If we have a symbol, then compare the start to match
* anywhere inside a function.
*/
list_for_each_entry(cnode, &root->val, list) {
struct callchain_cursor_node *node;
struct symbol *sym;
node = callchain_cursor_current(cursor);
if (!node)
break;
sym = node->sym;
if (cnode->ms.sym && sym) {
if (cnode->ms.sym->start != sym->start)
break;
} else if (cnode->ip != node->ip)
break;
if (!found)
found = true;
callchain_cursor_advance(cursor);
}
/* matches not, relay on the parent */
if (!found) {
cursor->curr = curr_snap;
cursor->pos = start;
return -1;
}
matches = cursor->pos - start;
/* we match only a part of the node. Split it and add the new chain */
if (matches < root->val_nr) {
split_add_child(root, cursor, cnode, start, matches, period);
return 0;
}
/* we match 100% of the path, increment the hit */
if (matches == root->val_nr && cursor->pos == cursor->nr) {
root->hit += period;
return 0;
}
/* We match the node and still have a part remaining */
append_chain_children(root, cursor, period);
return 0;
}
int callchain_append(struct callchain_root *root,
struct callchain_cursor *cursor,
u64 period)
{
if (!cursor->nr)
return 0;
callchain_cursor_commit(cursor);
append_chain_children(&root->node, cursor, period);
if (cursor->nr > root->max_depth)
root->max_depth = cursor->nr;
return 0;
}
static int
merge_chain_branch(struct callchain_cursor *cursor,
struct callchain_node *dst, struct callchain_node *src)
{
struct callchain_cursor_node **old_last = cursor->last;
struct callchain_node *child, *next_child;
struct callchain_list *list, *next_list;
int old_pos = cursor->nr;
int err = 0;
list_for_each_entry_safe(list, next_list, &src->val, list) {
callchain_cursor_append(cursor, list->ip,
list->ms.map, list->ms.sym);
list_del(&list->list);
free(list);
}
if (src->hit) {
callchain_cursor_commit(cursor);
append_chain_children(dst, cursor, src->hit);
}
chain_for_each_child_safe(child, next_child, src) {
err = merge_chain_branch(cursor, dst, child);
if (err)
break;
list_del(&child->siblings);
free(child);
}
cursor->nr = old_pos;
cursor->last = old_last;
return err;
}
int callchain_merge(struct callchain_cursor *cursor,
struct callchain_root *dst, struct callchain_root *src)
{
return merge_chain_branch(cursor, &dst->node, &src->node);
}
int callchain_cursor_append(struct callchain_cursor *cursor,
u64 ip, struct map *map, struct symbol *sym)
{
struct callchain_cursor_node *node = *cursor->last;
if (!node) {
node = calloc(sizeof(*node), 1);
if (!node)
return -ENOMEM;
*cursor->last = node;
}
node->ip = ip;
node->map = map;
node->sym = sym;
cursor->nr++;
cursor->last = &node->next;
return 0;
}
| gpl-2.0 |
novic/AniDroid-JB-N7000-Kernel | net/sunrpc/svcauth.c | 8275 | 3829 | /*
* linux/net/sunrpc/svcauth.c
*
* The generic interface for RPC authentication on the server side.
*
* Copyright (C) 1995, 1996 Olaf Kirch <okir@monad.swb.de>
*
* CHANGES
* 19-Apr-2000 Chris Evans - Security fix
*/
#include <linux/types.h>
#include <linux/module.h>
#include <linux/sunrpc/types.h>
#include <linux/sunrpc/xdr.h>
#include <linux/sunrpc/svcsock.h>
#include <linux/sunrpc/svcauth.h>
#include <linux/err.h>
#include <linux/hash.h>
#define RPCDBG_FACILITY RPCDBG_AUTH
/*
* Table of authenticators
*/
extern struct auth_ops svcauth_null;
extern struct auth_ops svcauth_unix;
static DEFINE_SPINLOCK(authtab_lock);
static struct auth_ops *authtab[RPC_AUTH_MAXFLAVOR] = {
[0] = &svcauth_null,
[1] = &svcauth_unix,
};
int
svc_authenticate(struct svc_rqst *rqstp, __be32 *authp)
{
rpc_authflavor_t flavor;
struct auth_ops *aops;
*authp = rpc_auth_ok;
flavor = svc_getnl(&rqstp->rq_arg.head[0]);
dprintk("svc: svc_authenticate (%d)\n", flavor);
spin_lock(&authtab_lock);
if (flavor >= RPC_AUTH_MAXFLAVOR || !(aops = authtab[flavor]) ||
!try_module_get(aops->owner)) {
spin_unlock(&authtab_lock);
*authp = rpc_autherr_badcred;
return SVC_DENIED;
}
spin_unlock(&authtab_lock);
rqstp->rq_authop = aops;
return aops->accept(rqstp, authp);
}
EXPORT_SYMBOL_GPL(svc_authenticate);
int svc_set_client(struct svc_rqst *rqstp)
{
return rqstp->rq_authop->set_client(rqstp);
}
EXPORT_SYMBOL_GPL(svc_set_client);
/* A request, which was authenticated, has now executed.
* Time to finalise the credentials and verifier
* and release and resources
*/
int svc_authorise(struct svc_rqst *rqstp)
{
struct auth_ops *aops = rqstp->rq_authop;
int rv = 0;
rqstp->rq_authop = NULL;
if (aops) {
rv = aops->release(rqstp);
module_put(aops->owner);
}
return rv;
}
int
svc_auth_register(rpc_authflavor_t flavor, struct auth_ops *aops)
{
int rv = -EINVAL;
spin_lock(&authtab_lock);
if (flavor < RPC_AUTH_MAXFLAVOR && authtab[flavor] == NULL) {
authtab[flavor] = aops;
rv = 0;
}
spin_unlock(&authtab_lock);
return rv;
}
EXPORT_SYMBOL_GPL(svc_auth_register);
void
svc_auth_unregister(rpc_authflavor_t flavor)
{
spin_lock(&authtab_lock);
if (flavor < RPC_AUTH_MAXFLAVOR)
authtab[flavor] = NULL;
spin_unlock(&authtab_lock);
}
EXPORT_SYMBOL_GPL(svc_auth_unregister);
/**************************************************
* 'auth_domains' are stored in a hash table indexed by name.
* When the last reference to an 'auth_domain' is dropped,
* the object is unhashed and freed.
* If auth_domain_lookup fails to find an entry, it will return
* it's second argument 'new'. If this is non-null, it will
* have been atomically linked into the table.
*/
#define DN_HASHBITS 6
#define DN_HASHMAX (1<<DN_HASHBITS)
static struct hlist_head auth_domain_table[DN_HASHMAX];
static spinlock_t auth_domain_lock =
__SPIN_LOCK_UNLOCKED(auth_domain_lock);
void auth_domain_put(struct auth_domain *dom)
{
if (atomic_dec_and_lock(&dom->ref.refcount, &auth_domain_lock)) {
hlist_del(&dom->hash);
dom->flavour->domain_release(dom);
spin_unlock(&auth_domain_lock);
}
}
EXPORT_SYMBOL_GPL(auth_domain_put);
struct auth_domain *
auth_domain_lookup(char *name, struct auth_domain *new)
{
struct auth_domain *hp;
struct hlist_head *head;
struct hlist_node *np;
head = &auth_domain_table[hash_str(name, DN_HASHBITS)];
spin_lock(&auth_domain_lock);
hlist_for_each_entry(hp, np, head, hash) {
if (strcmp(hp->name, name)==0) {
kref_get(&hp->ref);
spin_unlock(&auth_domain_lock);
return hp;
}
}
if (new)
hlist_add_head(&new->hash, head);
spin_unlock(&auth_domain_lock);
return new;
}
EXPORT_SYMBOL_GPL(auth_domain_lookup);
struct auth_domain *auth_domain_find(char *name)
{
return auth_domain_lookup(name, NULL);
}
EXPORT_SYMBOL_GPL(auth_domain_find);
| gpl-2.0 |
elefher/Donkey_Kernel_MotoG | drivers/staging/comedi/drivers/addi-data/hwdrv_apci1516.c | 8275 | 23364 | /**
@verbatim
Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
ADDI-DATA GmbH
Dieselstrasse 3
D-77833 Ottersweier
Tel: +19(0)7223/9493-0
Fax: +49(0)7223/9493-92
http://www.addi-data.com
info@addi-data.com
This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
You should also find the complete GPL in the COPYING file accompanying this source code.
@endverbatim
*/
/*
+-----------------------------------------------------------------------+
| (C) ADDI-DATA GmbH Dieselstraße 3 D-77833 Ottersweier |
+-----------------------------------------------------------------------+
| Tel : +49 (0) 7223/9493-0 | email : info@addi-data.com |
| Fax : +49 (0) 7223/9493-92 | Internet : http://www.addi-data.com |
+-------------------------------+---------------------------------------+
| Project : APCI-1516 | Compiler : GCC |
| Module name : hwdrv_apci1516.c| Version : 2.96 |
+-------------------------------+---------------------------------------+
| Project manager: Eric Stolz | Date : 02/12/2002 |
+-------------------------------+---------------------------------------+
| Description : Hardware Layer Access For APCI-1516 |
+-----------------------------------------------------------------------+
| UPDATES |
+----------+-----------+------------------------------------------------+
| Date | Author | Description of updates |
+----------+-----------+------------------------------------------------+
| | | |
| | | |
| | | |
+----------+-----------+------------------------------------------------+
*/
/*
+----------------------------------------------------------------------------+
| Included files |
+----------------------------------------------------------------------------+
*/
#include "hwdrv_apci1516.h"
/*
+----------------------------------------------------------------------------+
| Function Name : int i_APCI1516_Read1DigitalInput |
| (struct comedi_device *dev,struct comedi_subdevice *s, |
| struct comedi_insn *insn,unsigned int *data) |
+----------------------------------------------------------------------------+
| Task : Return the status of the digital input |
+----------------------------------------------------------------------------+
| Input Parameters : struct comedi_device *dev : Driver handle |
| struct comedi_subdevice *s, :pointer to subdevice structure
| struct comedi_insn *insn :pointer to insn structure |
| unsigned int *data : Data Pointer to read status |
+----------------------------------------------------------------------------+
| Output Parameters : -- |
+----------------------------------------------------------------------------+
| Return Value : TRUE : No error occur |
| : FALSE : Error occur. Return the error |
| |
+----------------------------------------------------------------------------+
*/
int i_APCI1516_Read1DigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
unsigned int ui_TmpValue = 0;
unsigned int ui_Channel;
ui_Channel = CR_CHAN(insn->chanspec);
if (ui_Channel <= 7) {
ui_TmpValue = (unsigned int) inw(devpriv->iobase + APCI1516_DIGITAL_IP);
/* since only 1 channel reqd to bring it to last bit it is rotated */
/* 8 +(chan - 1) times then ANDed with 1 for last bit. */
*data = (ui_TmpValue >> ui_Channel) & 0x1;
} /* if(ui_Channel >= 0 && ui_Channel <=7) */
else {
/* comedi_error(dev," \n chan spec wrong\n"); */
return -EINVAL; /* "sorry channel spec wrong " */
} /* else if(ui_Channel >= 0 && ui_Channel <=7) */
return insn->n;
}
/*
+----------------------------------------------------------------------------+
| Function Name : int i_APCI1516_ReadMoreDigitalInput |
| (struct comedi_device *dev,struct comedi_subdevice *s, |
| struct comedi_insn *insn,unsigned int *data) |
+----------------------------------------------------------------------------+
| Task : Return the status of the Requested digital inputs |
+----------------------------------------------------------------------------+
| Input Parameters : struct comedi_device *dev : Driver handle |
| struct comedi_subdevice *s, :pointer to subdevice structure
| struct comedi_insn *insn :pointer to insn structure |
| unsigned int *data : Data Pointer to read status |
+----------------------------------------------------------------------------+
| Output Parameters : -- |
+----------------------------------------------------------------------------+
| Return Value : TRUE : No error occur |
| : FALSE : Error occur. Return the error |
| |
+----------------------------------------------------------------------------+
*/
int i_APCI1516_ReadMoreDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
unsigned int ui_PortValue = data[0];
unsigned int ui_Mask = 0;
unsigned int ui_NoOfChannels;
ui_NoOfChannels = CR_CHAN(insn->chanspec);
*data = (unsigned int) inw(devpriv->iobase + APCI1516_DIGITAL_IP);
switch (ui_NoOfChannels) {
case 2:
ui_Mask = 3;
*data = (*data >> (2 * ui_PortValue)) & ui_Mask;
break;
case 4:
ui_Mask = 15;
*data = (*data >> (4 * ui_PortValue)) & ui_Mask;
break;
case 7:
break;
default:
printk("\nWrong parameters\n");
return -EINVAL; /* "sorry channel spec wrong " */
break;
} /* switch(ui_NoOfChannels) */
return insn->n;
}
/*
+----------------------------------------------------------------------------+
| Function Name : int i_APCI1516_ConfigDigitalOutput (struct comedi_device *dev,
| struct comedi_subdevice *s struct comedi_insn *insn,unsigned int *data) |
| |
+----------------------------------------------------------------------------+
| Task : Configures The Digital Output Subdevice. |
+----------------------------------------------------------------------------+
| Input Parameters : struct comedi_device *dev : Driver handle |
| unsigned int *data : Data Pointer contains |
| configuration parameters as below |
| struct comedi_subdevice *s, :pointer to subdevice structure
| struct comedi_insn *insn :pointer to insn structure |
| data[0] :1:Memory on |
| 0:Memory off |
| |
| |
+----------------------------------------------------------------------------+
| Output Parameters : -- |
+----------------------------------------------------------------------------+
| Return Value : TRUE : No error occur |
| : FALSE : Error occur. Return the error |
| |
+----------------------------------------------------------------------------+
*/
int i_APCI1516_ConfigDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
devpriv->b_OutputMemoryStatus = data[0];
return insn->n;
}
/*
+----------------------------------------------------------------------------+
| Function Name : int i_APCI1516_WriteDigitalOutput |
| (struct comedi_device *dev,struct comedi_subdevice *s,struct comedi_insn *insn,
| unsigned int *data) |
+----------------------------------------------------------------------------+
| Task : Writes port value To the selected port |
+----------------------------------------------------------------------------+
| Input Parameters : struct comedi_device *dev : Driver handle |
| struct comedi_subdevice *s, :pointer to subdevice structure
| struct comedi_insn *insn :pointer to insn structure |
| unsigned int *data : Data Pointer to read status |
+----------------------------------------------------------------------------+
| Output Parameters : -- |
+----------------------------------------------------------------------------+
| Return Value : TRUE : No error occur |
| : FALSE : Error occur. Return the error |
| |
+----------------------------------------------------------------------------+
*/
int i_APCI1516_WriteDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
unsigned int ui_Temp, ui_Temp1;
unsigned int ui_NoOfChannel = CR_CHAN(insn->chanspec); /* get the channel */
printk("EL311003 : @=%x\n", devpriv->iobase + APCI1516_DIGITAL_OP);
if (devpriv->b_OutputMemoryStatus) {
ui_Temp = inw(devpriv->iobase + APCI1516_DIGITAL_OP);
} /* if(devpriv->b_OutputMemoryStatus ) */
else {
ui_Temp = 0;
} /* if(devpriv->b_OutputMemoryStatus ) */
if (data[3] == 0) {
if (data[1] == 0) {
data[0] = (data[0] << ui_NoOfChannel) | ui_Temp;
outw(data[0], devpriv->iobase + APCI1516_DIGITAL_OP);
printk("EL311003 : d=%d @=%x\n", data[0],
devpriv->iobase + APCI1516_DIGITAL_OP);
} /* if(data[1]==0) */
else {
if (data[1] == 1) {
switch (ui_NoOfChannel) {
case 2:
data[0] =
(data[0] << (2 *
data[2])) | ui_Temp;
break;
case 4:
data[0] =
(data[0] << (4 *
data[2])) | ui_Temp;
break;
case 7:
data[0] = data[0] | ui_Temp;
break;
default:
comedi_error(dev, " chan spec wrong");
return -EINVAL; /* "sorry channel spec wrong " */
} /* switch(ui_NoOfChannels) */
outw(data[0],
devpriv->iobase + APCI1516_DIGITAL_OP);
printk("EL311003 : d=%d @=%x\n", data[0],
devpriv->iobase + APCI1516_DIGITAL_OP);
} /* if(data[1]==1) */
else {
printk("\nSpecified channel not supported\n");
} /* else if(data[1]==1) */
} /* elseif(data[1]==0) */
} /* if(data[3]==0) */
else {
if (data[3] == 1) {
if (data[1] == 0) {
data[0] = ~data[0] & 0x1;
ui_Temp1 = 1;
ui_Temp1 = ui_Temp1 << ui_NoOfChannel;
ui_Temp = ui_Temp | ui_Temp1;
data[0] = (data[0] << ui_NoOfChannel) ^ 0xff;
data[0] = data[0] & ui_Temp;
outw(data[0],
devpriv->iobase + APCI1516_DIGITAL_OP);
printk("EL311003 : d=%d @=%x\n", data[0],
devpriv->iobase + APCI1516_DIGITAL_OP);
} /* if(data[1]==0) */
else {
if (data[1] == 1) {
switch (ui_NoOfChannel) {
case 2:
data[0] = ~data[0] & 0x3;
ui_Temp1 = 3;
ui_Temp1 =
ui_Temp1 << 2 * data[2];
ui_Temp = ui_Temp | ui_Temp1;
data[0] =
((data[0] << (2 *
data
[2])) ^
0xff) & ui_Temp;
break;
case 4:
data[0] = ~data[0] & 0xf;
ui_Temp1 = 15;
ui_Temp1 =
ui_Temp1 << 4 * data[2];
ui_Temp = ui_Temp | ui_Temp1;
data[0] =
((data[0] << (4 *
data
[2])) ^
0xff) & ui_Temp;
break;
case 7:
break;
default:
comedi_error(dev,
" chan spec wrong");
return -EINVAL; /* "sorry channel spec wrong " */
} /* switch(ui_NoOfChannels) */
outw(data[0],
devpriv->iobase +
APCI1516_DIGITAL_OP);
printk("EL311003 : d=%d @=%x\n",
data[0],
devpriv->iobase +
APCI1516_DIGITAL_OP);
} /* if(data[1]==1) */
else {
printk("\nSpecified channel not supported\n");
} /* else if(data[1]==1) */
} /* elseif(data[1]==0) */
} /* if(data[3]==1); */
else {
printk("\nSpecified functionality does not exist\n");
return -EINVAL;
} /* if else data[3]==1) */
} /* if else data[3]==0) */
return (insn->n);
}
/*
+----------------------------------------------------------------------------+
| Function Name : int i_APCI1516_ReadDigitalOutput |
| (struct comedi_device *dev,struct comedi_subdevice *s,struct comedi_insn *insn,
| unsigned int *data) |
+----------------------------------------------------------------------------+
| Task : Read value of the selected channel or port |
+----------------------------------------------------------------------------+
| Input Parameters : struct comedi_device *dev : Driver handle |
| struct comedi_subdevice *s, :pointer to subdevice structure
| struct comedi_insn *insn :pointer to insn structure |
| unsigned int *data : Data Pointer to read status |
+----------------------------------------------------------------------------+
| Output Parameters : -- |
+----------------------------------------------------------------------------+
| Return Value : TRUE : No error occur |
| : FALSE : Error occur. Return the error |
| |
+----------------------------------------------------------------------------+
*/
int i_APCI1516_ReadDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
unsigned int ui_Temp;
unsigned int ui_NoOfChannel = CR_CHAN(insn->chanspec); /* get the channel */
ui_Temp = data[0];
*data = inw(devpriv->iobase + APCI1516_DIGITAL_OP_RW);
if (ui_Temp == 0) {
*data = (*data >> ui_NoOfChannel) & 0x1;
} /* if(ui_Temp==0) */
else {
if (ui_Temp == 1) {
switch (ui_NoOfChannel) {
case 2:
*data = (*data >> (2 * data[1])) & 3;
break;
case 4:
*data = (*data >> (4 * data[1])) & 15;
break;
case 7:
break;
default:
comedi_error(dev, " chan spec wrong");
return -EINVAL; /* "sorry channel spec wrong " */
} /* switch(ui_NoOfChannels) */
} /* if(ui_Temp==1) */
else {
printk("\nSpecified channel not supported \n");
} /* elseif(ui_Temp==1) */
} /* elseif(ui_Temp==0) */
return insn->n;
}
/*
+----------------------------------------------------------------------------+
| Function Name : int i_APCI1516_ConfigWatchdog(struct comedi_device *dev,
| struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data) |
| |
+----------------------------------------------------------------------------+
| Task : Configures The Watchdog |
+----------------------------------------------------------------------------+
| Input Parameters : struct comedi_device *dev : Driver handle |
| struct comedi_subdevice *s, :pointer to subdevice structure
| struct comedi_insn *insn :pointer to insn structure |
| unsigned int *data : Data Pointer to read status |
+----------------------------------------------------------------------------+
| Output Parameters : -- |
+----------------------------------------------------------------------------+
| Return Value : TRUE : No error occur |
| : FALSE : Error occur. Return the error |
| |
+----------------------------------------------------------------------------+
*/
int i_APCI1516_ConfigWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
if (data[0] == 0) {
/* Disable the watchdog */
outw(0x0,
devpriv->i_IobaseAddon +
APCI1516_WATCHDOG_ENABLEDISABLE);
/* Loading the Reload value */
outw(data[1],
devpriv->i_IobaseAddon +
APCI1516_WATCHDOG_RELOAD_VALUE);
data[1] = data[1] >> 16;
outw(data[1],
devpriv->i_IobaseAddon +
APCI1516_WATCHDOG_RELOAD_VALUE + 2);
} /* if(data[0]==0) */
else {
printk("\nThe input parameters are wrong\n");
return -EINVAL;
} /* elseif(data[0]==0) */
return insn->n;
}
/*
+----------------------------------------------------------------------------+
| Function Name : int i_APCI1516_StartStopWriteWatchdog |
| (struct comedi_device *dev,struct comedi_subdevice *s,
struct comedi_insn *insn,unsigned int *data); |
+----------------------------------------------------------------------------+
| Task : Start / Stop The Watchdog |
+----------------------------------------------------------------------------+
| Input Parameters : struct comedi_device *dev : Driver handle |
| struct comedi_subdevice *s, :pointer to subdevice structure
struct comedi_insn *insn :pointer to insn structure |
| unsigned int *data : Data Pointer to read status |
+----------------------------------------------------------------------------+
| Output Parameters : -- |
+----------------------------------------------------------------------------+
| Return Value : TRUE : No error occur |
| : FALSE : Error occur. Return the error |
| |
+----------------------------------------------------------------------------+
*/
int i_APCI1516_StartStopWriteWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
switch (data[0]) {
case 0: /* stop the watchdog */
outw(0x0, devpriv->i_IobaseAddon + APCI1516_WATCHDOG_ENABLEDISABLE); /* disable the watchdog */
break;
case 1: /* start the watchdog */
outw(0x0001,
devpriv->i_IobaseAddon +
APCI1516_WATCHDOG_ENABLEDISABLE);
break;
case 2: /* Software trigger */
outw(0x0201,
devpriv->i_IobaseAddon +
APCI1516_WATCHDOG_ENABLEDISABLE);
break;
default:
printk("\nSpecified functionality does not exist\n");
return -EINVAL;
} /* switch(data[0]) */
return insn->n;
}
/*
+----------------------------------------------------------------------------+
| Function Name : int i_APCI1516_ReadWatchdog |
| (struct comedi_device *dev,struct comedi_subdevice *s,struct comedi_insn *insn,
unsigned int *data); |
+----------------------------------------------------------------------------+
| Task : Read The Watchdog |
+----------------------------------------------------------------------------+
| Input Parameters : struct comedi_device *dev : Driver handle |
| struct comedi_subdevice *s, :pointer to subdevice structure
struct comedi_insn *insn :pointer to insn structure |
| unsigned int *data : Data Pointer to read status |
+----------------------------------------------------------------------------+
| Output Parameters : -- |
+----------------------------------------------------------------------------+
| Return Value : TRUE : No error occur |
| : FALSE : Error occur. Return the error |
| |
+----------------------------------------------------------------------------+
*/
int i_APCI1516_ReadWatchdog(struct comedi_device *dev, struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
data[0] = inw(devpriv->i_IobaseAddon + APCI1516_WATCHDOG_STATUS) & 0x1;
return insn->n;
}
/*
+----------------------------------------------------------------------------+
| Function Name : int i_APCI1516_Reset(struct comedi_device *dev) | |
+----------------------------------------------------------------------------+
| Task :resets all the registers |
+----------------------------------------------------------------------------+
| Input Parameters : struct comedi_device *dev
+----------------------------------------------------------------------------+
| Output Parameters : -- |
+----------------------------------------------------------------------------+
| Return Value : |
| |
+----------------------------------------------------------------------------+
*/
int i_APCI1516_Reset(struct comedi_device *dev)
{
outw(0x0, devpriv->iobase + APCI1516_DIGITAL_OP); /* RESETS THE DIGITAL OUTPUTS */
outw(0x0, devpriv->i_IobaseAddon + APCI1516_WATCHDOG_ENABLEDISABLE);
outw(0x0, devpriv->i_IobaseAddon + APCI1516_WATCHDOG_RELOAD_VALUE);
outw(0x0, devpriv->i_IobaseAddon + APCI1516_WATCHDOG_RELOAD_VALUE + 2);
return 0;
}
| gpl-2.0 |
DirtyUnicorns/android_kernel_samsung_jf | sound/soc/pxa/z2.c | 8531 | 5236 | /*
* linux/sound/soc/pxa/z2.c
*
* SoC Audio driver for Aeronix Zipit Z2
*
* Copyright (C) 2009 Ken McGuire <kenm@desertweyr.com>
* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/soc.h>
#include <sound/jack.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <mach/audio.h>
#include <mach/z2.h>
#include "../codecs/wm8750.h"
#include "pxa2xx-i2s.h"
static struct snd_soc_card snd_soc_z2;
static int z2_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *codec_dai = rtd->codec_dai;
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
unsigned int clk = 0;
int ret = 0;
switch (params_rate(params)) {
case 8000:
case 16000:
case 48000:
case 96000:
clk = 12288000;
break;
case 11025:
case 22050:
case 44100:
clk = 11289600;
break;
}
/* set the codec system clock for DAC and ADC */
ret = snd_soc_dai_set_sysclk(codec_dai, WM8750_SYSCLK, clk,
SND_SOC_CLOCK_IN);
if (ret < 0)
return ret;
/* set the I2S system clock as input (unused) */
ret = snd_soc_dai_set_sysclk(cpu_dai, PXA2XX_I2S_SYSCLK, 0,
SND_SOC_CLOCK_IN);
if (ret < 0)
return ret;
return 0;
}
static struct snd_soc_jack hs_jack;
/* Headset jack detection DAPM pins */
static struct snd_soc_jack_pin hs_jack_pins[] = {
{
.pin = "Mic Jack",
.mask = SND_JACK_MICROPHONE,
},
{
.pin = "Headphone Jack",
.mask = SND_JACK_HEADPHONE,
},
{
.pin = "Ext Spk",
.mask = SND_JACK_HEADPHONE,
.invert = 1
},
};
/* Headset jack detection gpios */
static struct snd_soc_jack_gpio hs_jack_gpios[] = {
{
.gpio = GPIO37_ZIPITZ2_HEADSET_DETECT,
.name = "hsdet-gpio",
.report = SND_JACK_HEADSET,
.debounce_time = 200,
.invert = 1,
},
};
/* z2 machine dapm widgets */
static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
SND_SOC_DAPM_HP("Headphone Jack", NULL),
SND_SOC_DAPM_MIC("Mic Jack", NULL),
SND_SOC_DAPM_SPK("Ext Spk", NULL),
/* headset is a mic and mono headphone */
SND_SOC_DAPM_HP("Headset Jack", NULL),
};
/* Z2 machine audio_map */
static const struct snd_soc_dapm_route z2_audio_map[] = {
/* headphone connected to LOUT1, ROUT1 */
{"Headphone Jack", NULL, "LOUT1"},
{"Headphone Jack", NULL, "ROUT1"},
/* ext speaker connected to LOUT2, ROUT2 */
{"Ext Spk", NULL , "ROUT2"},
{"Ext Spk", NULL , "LOUT2"},
/* mic is connected to R input 2 - with bias */
{"RINPUT2", NULL, "Mic Bias"},
{"Mic Bias", NULL, "Mic Jack"},
};
/*
* Logic for a wm8750 as connected on a Z2 Device
*/
static int z2_wm8750_init(struct snd_soc_pcm_runtime *rtd)
{
struct snd_soc_codec *codec = rtd->codec;
struct snd_soc_dapm_context *dapm = &codec->dapm;
int ret;
/* NC codec pins */
snd_soc_dapm_disable_pin(dapm, "LINPUT3");
snd_soc_dapm_disable_pin(dapm, "RINPUT3");
snd_soc_dapm_disable_pin(dapm, "OUT3");
snd_soc_dapm_disable_pin(dapm, "MONO1");
/* Jack detection API stuff */
ret = snd_soc_jack_new(codec, "Headset Jack", SND_JACK_HEADSET,
&hs_jack);
if (ret)
goto err;
ret = snd_soc_jack_add_pins(&hs_jack, ARRAY_SIZE(hs_jack_pins),
hs_jack_pins);
if (ret)
goto err;
ret = snd_soc_jack_add_gpios(&hs_jack, ARRAY_SIZE(hs_jack_gpios),
hs_jack_gpios);
if (ret)
goto err;
return 0;
err:
return ret;
}
static struct snd_soc_ops z2_ops = {
.hw_params = z2_hw_params,
};
/* z2 digital audio interface glue - connects codec <--> CPU */
static struct snd_soc_dai_link z2_dai = {
.name = "wm8750",
.stream_name = "WM8750",
.cpu_dai_name = "pxa2xx-i2s",
.codec_dai_name = "wm8750-hifi",
.platform_name = "pxa-pcm-audio",
.codec_name = "wm8750.0-001b",
.init = z2_wm8750_init,
.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
SND_SOC_DAIFMT_CBS_CFS,
.ops = &z2_ops,
};
/* z2 audio machine driver */
static struct snd_soc_card snd_soc_z2 = {
.name = "Z2",
.owner = THIS_MODULE,
.dai_link = &z2_dai,
.num_links = 1,
.dapm_widgets = wm8750_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(wm8750_dapm_widgets),
.dapm_routes = z2_audio_map,
.num_dapm_routes = ARRAY_SIZE(z2_audio_map),
};
static struct platform_device *z2_snd_device;
static int __init z2_init(void)
{
int ret;
if (!machine_is_zipit2())
return -ENODEV;
z2_snd_device = platform_device_alloc("soc-audio", -1);
if (!z2_snd_device)
return -ENOMEM;
platform_set_drvdata(z2_snd_device, &snd_soc_z2);
ret = platform_device_add(z2_snd_device);
if (ret)
platform_device_put(z2_snd_device);
return ret;
}
static void __exit z2_exit(void)
{
platform_device_unregister(z2_snd_device);
}
module_init(z2_init);
module_exit(z2_exit);
MODULE_AUTHOR("Ken McGuire <kenm@desertweyr.com>, "
"Marek Vasut <marek.vasut@gmail.com>");
MODULE_DESCRIPTION("ALSA SoC ZipitZ2");
MODULE_LICENSE("GPL");
| gpl-2.0 |
xXminiWHOOPERxX/xXminiWHOOPERxX-Kernel-m4 | drivers/ide/ide-proc.c | 9299 | 19832 | /*
* Copyright (C) 1997-1998 Mark Lord
* Copyright (C) 2003 Red Hat
*
* Some code was moved here from ide.c, see it for original copyrights.
*/
/*
* This is the /proc/ide/ filesystem implementation.
*
* Drive/Driver settings can be retrieved by reading the drive's
* "settings" files. e.g. "cat /proc/ide0/hda/settings"
* To write a new value "val" into a specific setting "name", use:
* echo "name:val" >/proc/ide/ide0/hda/settings
*/
#include <linux/module.h>
#include <asm/uaccess.h>
#include <linux/errno.h>
#include <linux/proc_fs.h>
#include <linux/stat.h>
#include <linux/mm.h>
#include <linux/pci.h>
#include <linux/ctype.h>
#include <linux/ide.h>
#include <linux/seq_file.h>
#include <linux/slab.h>
#include <asm/io.h>
static struct proc_dir_entry *proc_ide_root;
static int ide_imodel_proc_show(struct seq_file *m, void *v)
{
ide_hwif_t *hwif = (ide_hwif_t *) m->private;
const char *name;
switch (hwif->chipset) {
case ide_generic: name = "generic"; break;
case ide_pci: name = "pci"; break;
case ide_cmd640: name = "cmd640"; break;
case ide_dtc2278: name = "dtc2278"; break;
case ide_ali14xx: name = "ali14xx"; break;
case ide_qd65xx: name = "qd65xx"; break;
case ide_umc8672: name = "umc8672"; break;
case ide_ht6560b: name = "ht6560b"; break;
case ide_4drives: name = "4drives"; break;
case ide_pmac: name = "mac-io"; break;
case ide_au1xxx: name = "au1xxx"; break;
case ide_palm3710: name = "palm3710"; break;
case ide_acorn: name = "acorn"; break;
default: name = "(unknown)"; break;
}
seq_printf(m, "%s\n", name);
return 0;
}
static int ide_imodel_proc_open(struct inode *inode, struct file *file)
{
return single_open(file, ide_imodel_proc_show, PDE(inode)->data);
}
static const struct file_operations ide_imodel_proc_fops = {
.owner = THIS_MODULE,
.open = ide_imodel_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
static int ide_mate_proc_show(struct seq_file *m, void *v)
{
ide_hwif_t *hwif = (ide_hwif_t *) m->private;
if (hwif && hwif->mate)
seq_printf(m, "%s\n", hwif->mate->name);
else
seq_printf(m, "(none)\n");
return 0;
}
static int ide_mate_proc_open(struct inode *inode, struct file *file)
{
return single_open(file, ide_mate_proc_show, PDE(inode)->data);
}
static const struct file_operations ide_mate_proc_fops = {
.owner = THIS_MODULE,
.open = ide_mate_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
static int ide_channel_proc_show(struct seq_file *m, void *v)
{
ide_hwif_t *hwif = (ide_hwif_t *) m->private;
seq_printf(m, "%c\n", hwif->channel ? '1' : '0');
return 0;
}
static int ide_channel_proc_open(struct inode *inode, struct file *file)
{
return single_open(file, ide_channel_proc_show, PDE(inode)->data);
}
static const struct file_operations ide_channel_proc_fops = {
.owner = THIS_MODULE,
.open = ide_channel_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
static int ide_identify_proc_show(struct seq_file *m, void *v)
{
ide_drive_t *drive = (ide_drive_t *)m->private;
u8 *buf;
if (!drive) {
seq_putc(m, '\n');
return 0;
}
buf = kmalloc(SECTOR_SIZE, GFP_KERNEL);
if (!buf)
return -ENOMEM;
if (taskfile_lib_get_identify(drive, buf) == 0) {
__le16 *val = (__le16 *)buf;
int i;
for (i = 0; i < SECTOR_SIZE / 2; i++) {
seq_printf(m, "%04x%c", le16_to_cpu(val[i]),
(i % 8) == 7 ? '\n' : ' ');
}
} else
seq_putc(m, buf[0]);
kfree(buf);
return 0;
}
static int ide_identify_proc_open(struct inode *inode, struct file *file)
{
return single_open(file, ide_identify_proc_show, PDE(inode)->data);
}
static const struct file_operations ide_identify_proc_fops = {
.owner = THIS_MODULE,
.open = ide_identify_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
/**
* ide_find_setting - find a specific setting
* @st: setting table pointer
* @name: setting name
*
* Scan's the setting table for a matching entry and returns
* this or NULL if no entry is found. The caller must hold the
* setting semaphore
*/
static
const struct ide_proc_devset *ide_find_setting(const struct ide_proc_devset *st,
char *name)
{
while (st->name) {
if (strcmp(st->name, name) == 0)
break;
st++;
}
return st->name ? st : NULL;
}
/**
* ide_read_setting - read an IDE setting
* @drive: drive to read from
* @setting: drive setting
*
* Read a drive setting and return the value. The caller
* must hold the ide_setting_mtx when making this call.
*
* BUGS: the data return and error are the same return value
* so an error -EINVAL and true return of the same value cannot
* be told apart
*/
static int ide_read_setting(ide_drive_t *drive,
const struct ide_proc_devset *setting)
{
const struct ide_devset *ds = setting->setting;
int val = -EINVAL;
if (ds->get)
val = ds->get(drive);
return val;
}
/**
* ide_write_setting - read an IDE setting
* @drive: drive to read from
* @setting: drive setting
* @val: value
*
* Write a drive setting if it is possible. The caller
* must hold the ide_setting_mtx when making this call.
*
* BUGS: the data return and error are the same return value
* so an error -EINVAL and true return of the same value cannot
* be told apart
*
* FIXME: This should be changed to enqueue a special request
* to the driver to change settings, and then wait on a sema for completion.
* The current scheme of polling is kludgy, though safe enough.
*/
static int ide_write_setting(ide_drive_t *drive,
const struct ide_proc_devset *setting, int val)
{
const struct ide_devset *ds = setting->setting;
if (!capable(CAP_SYS_ADMIN))
return -EACCES;
if (!ds->set)
return -EPERM;
if ((ds->flags & DS_SYNC)
&& (val < setting->min || val > setting->max))
return -EINVAL;
return ide_devset_execute(drive, ds, val);
}
ide_devset_get(xfer_rate, current_speed);
static int set_xfer_rate (ide_drive_t *drive, int arg)
{
struct ide_cmd cmd;
if (arg < XFER_PIO_0 || arg > XFER_UDMA_6)
return -EINVAL;
memset(&cmd, 0, sizeof(cmd));
cmd.tf.command = ATA_CMD_SET_FEATURES;
cmd.tf.feature = SETFEATURES_XFER;
cmd.tf.nsect = (u8)arg;
cmd.valid.out.tf = IDE_VALID_FEATURE | IDE_VALID_NSECT;
cmd.valid.in.tf = IDE_VALID_NSECT;
cmd.tf_flags = IDE_TFLAG_SET_XFER;
return ide_no_data_taskfile(drive, &cmd);
}
ide_devset_rw(current_speed, xfer_rate);
ide_devset_rw_field(init_speed, init_speed);
ide_devset_rw_flag(nice1, IDE_DFLAG_NICE1);
ide_devset_rw_field(number, dn);
static const struct ide_proc_devset ide_generic_settings[] = {
IDE_PROC_DEVSET(current_speed, 0, 70),
IDE_PROC_DEVSET(init_speed, 0, 70),
IDE_PROC_DEVSET(io_32bit, 0, 1 + (SUPPORT_VLB_SYNC << 1)),
IDE_PROC_DEVSET(keepsettings, 0, 1),
IDE_PROC_DEVSET(nice1, 0, 1),
IDE_PROC_DEVSET(number, 0, 3),
IDE_PROC_DEVSET(pio_mode, 0, 255),
IDE_PROC_DEVSET(unmaskirq, 0, 1),
IDE_PROC_DEVSET(using_dma, 0, 1),
{ NULL },
};
static void proc_ide_settings_warn(void)
{
printk_once(KERN_WARNING "Warning: /proc/ide/hd?/settings interface is "
"obsolete, and will be removed soon!\n");
}
static int ide_settings_proc_show(struct seq_file *m, void *v)
{
const struct ide_proc_devset *setting, *g, *d;
const struct ide_devset *ds;
ide_drive_t *drive = (ide_drive_t *) m->private;
int rc, mul_factor, div_factor;
proc_ide_settings_warn();
mutex_lock(&ide_setting_mtx);
g = ide_generic_settings;
d = drive->settings;
seq_printf(m, "name\t\t\tvalue\t\tmin\t\tmax\t\tmode\n");
seq_printf(m, "----\t\t\t-----\t\t---\t\t---\t\t----\n");
while (g->name || (d && d->name)) {
/* read settings in the alphabetical order */
if (g->name && d && d->name) {
if (strcmp(d->name, g->name) < 0)
setting = d++;
else
setting = g++;
} else if (d && d->name) {
setting = d++;
} else
setting = g++;
mul_factor = setting->mulf ? setting->mulf(drive) : 1;
div_factor = setting->divf ? setting->divf(drive) : 1;
seq_printf(m, "%-24s", setting->name);
rc = ide_read_setting(drive, setting);
if (rc >= 0)
seq_printf(m, "%-16d", rc * mul_factor / div_factor);
else
seq_printf(m, "%-16s", "write-only");
seq_printf(m, "%-16d%-16d", (setting->min * mul_factor + div_factor - 1) / div_factor, setting->max * mul_factor / div_factor);
ds = setting->setting;
if (ds->get)
seq_printf(m, "r");
if (ds->set)
seq_printf(m, "w");
seq_printf(m, "\n");
}
mutex_unlock(&ide_setting_mtx);
return 0;
}
static int ide_settings_proc_open(struct inode *inode, struct file *file)
{
return single_open(file, ide_settings_proc_show, PDE(inode)->data);
}
#define MAX_LEN 30
static ssize_t ide_settings_proc_write(struct file *file, const char __user *buffer,
size_t count, loff_t *pos)
{
ide_drive_t *drive = (ide_drive_t *) PDE(file->f_path.dentry->d_inode)->data;
char name[MAX_LEN + 1];
int for_real = 0, mul_factor, div_factor;
unsigned long n;
const struct ide_proc_devset *setting;
char *buf, *s;
if (!capable(CAP_SYS_ADMIN))
return -EACCES;
proc_ide_settings_warn();
if (count >= PAGE_SIZE)
return -EINVAL;
s = buf = (char *)__get_free_page(GFP_USER);
if (!buf)
return -ENOMEM;
if (copy_from_user(buf, buffer, count)) {
free_page((unsigned long)buf);
return -EFAULT;
}
buf[count] = '\0';
/*
* Skip over leading whitespace
*/
while (count && isspace(*s)) {
--count;
++s;
}
/*
* Do one full pass to verify all parameters,
* then do another to actually write the new settings.
*/
do {
char *p = s;
n = count;
while (n > 0) {
unsigned val;
char *q = p;
while (n > 0 && *p != ':') {
--n;
p++;
}
if (*p != ':')
goto parse_error;
if (p - q > MAX_LEN)
goto parse_error;
memcpy(name, q, p - q);
name[p - q] = 0;
if (n > 0) {
--n;
p++;
} else
goto parse_error;
val = simple_strtoul(p, &q, 10);
n -= q - p;
p = q;
if (n > 0 && !isspace(*p))
goto parse_error;
while (n > 0 && isspace(*p)) {
--n;
++p;
}
mutex_lock(&ide_setting_mtx);
/* generic settings first, then driver specific ones */
setting = ide_find_setting(ide_generic_settings, name);
if (!setting) {
if (drive->settings)
setting = ide_find_setting(drive->settings, name);
if (!setting) {
mutex_unlock(&ide_setting_mtx);
goto parse_error;
}
}
if (for_real) {
mul_factor = setting->mulf ? setting->mulf(drive) : 1;
div_factor = setting->divf ? setting->divf(drive) : 1;
ide_write_setting(drive, setting, val * div_factor / mul_factor);
}
mutex_unlock(&ide_setting_mtx);
}
} while (!for_real++);
free_page((unsigned long)buf);
return count;
parse_error:
free_page((unsigned long)buf);
printk("%s(): parse error\n", __func__);
return -EINVAL;
}
static const struct file_operations ide_settings_proc_fops = {
.owner = THIS_MODULE,
.open = ide_settings_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
.write = ide_settings_proc_write,
};
static int ide_capacity_proc_show(struct seq_file *m, void *v)
{
seq_printf(m, "%llu\n", (long long)0x7fffffff);
return 0;
}
static int ide_capacity_proc_open(struct inode *inode, struct file *file)
{
return single_open(file, ide_capacity_proc_show, NULL);
}
const struct file_operations ide_capacity_proc_fops = {
.owner = THIS_MODULE,
.open = ide_capacity_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
EXPORT_SYMBOL_GPL(ide_capacity_proc_fops);
static int ide_geometry_proc_show(struct seq_file *m, void *v)
{
ide_drive_t *drive = (ide_drive_t *) m->private;
seq_printf(m, "physical %d/%d/%d\n",
drive->cyl, drive->head, drive->sect);
seq_printf(m, "logical %d/%d/%d\n",
drive->bios_cyl, drive->bios_head, drive->bios_sect);
return 0;
}
static int ide_geometry_proc_open(struct inode *inode, struct file *file)
{
return single_open(file, ide_geometry_proc_show, PDE(inode)->data);
}
const struct file_operations ide_geometry_proc_fops = {
.owner = THIS_MODULE,
.open = ide_geometry_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
EXPORT_SYMBOL(ide_geometry_proc_fops);
static int ide_dmodel_proc_show(struct seq_file *seq, void *v)
{
ide_drive_t *drive = (ide_drive_t *) seq->private;
char *m = (char *)&drive->id[ATA_ID_PROD];
seq_printf(seq, "%.40s\n", m[0] ? m : "(none)");
return 0;
}
static int ide_dmodel_proc_open(struct inode *inode, struct file *file)
{
return single_open(file, ide_dmodel_proc_show, PDE(inode)->data);
}
static const struct file_operations ide_dmodel_proc_fops = {
.owner = THIS_MODULE,
.open = ide_dmodel_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
static int ide_driver_proc_show(struct seq_file *m, void *v)
{
ide_drive_t *drive = (ide_drive_t *)m->private;
struct device *dev = &drive->gendev;
struct ide_driver *ide_drv;
if (dev->driver) {
ide_drv = to_ide_driver(dev->driver);
seq_printf(m, "%s version %s\n",
dev->driver->name, ide_drv->version);
} else
seq_printf(m, "ide-default version 0.9.newide\n");
return 0;
}
static int ide_driver_proc_open(struct inode *inode, struct file *file)
{
return single_open(file, ide_driver_proc_show, PDE(inode)->data);
}
static int ide_replace_subdriver(ide_drive_t *drive, const char *driver)
{
struct device *dev = &drive->gendev;
int ret = 1;
int err;
device_release_driver(dev);
/* FIXME: device can still be in use by previous driver */
strlcpy(drive->driver_req, driver, sizeof(drive->driver_req));
err = device_attach(dev);
if (err < 0)
printk(KERN_WARNING "IDE: %s: device_attach error: %d\n",
__func__, err);
drive->driver_req[0] = 0;
if (dev->driver == NULL) {
err = device_attach(dev);
if (err < 0)
printk(KERN_WARNING
"IDE: %s: device_attach(2) error: %d\n",
__func__, err);
}
if (dev->driver && !strcmp(dev->driver->name, driver))
ret = 0;
return ret;
}
static ssize_t ide_driver_proc_write(struct file *file, const char __user *buffer,
size_t count, loff_t *pos)
{
ide_drive_t *drive = (ide_drive_t *) PDE(file->f_path.dentry->d_inode)->data;
char name[32];
if (!capable(CAP_SYS_ADMIN))
return -EACCES;
if (count > 31)
count = 31;
if (copy_from_user(name, buffer, count))
return -EFAULT;
name[count] = '\0';
if (ide_replace_subdriver(drive, name))
return -EINVAL;
return count;
}
static const struct file_operations ide_driver_proc_fops = {
.owner = THIS_MODULE,
.open = ide_driver_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
.write = ide_driver_proc_write,
};
static int ide_media_proc_show(struct seq_file *m, void *v)
{
ide_drive_t *drive = (ide_drive_t *) m->private;
const char *media;
switch (drive->media) {
case ide_disk: media = "disk\n"; break;
case ide_cdrom: media = "cdrom\n"; break;
case ide_tape: media = "tape\n"; break;
case ide_floppy: media = "floppy\n"; break;
case ide_optical: media = "optical\n"; break;
default: media = "UNKNOWN\n"; break;
}
seq_puts(m, media);
return 0;
}
static int ide_media_proc_open(struct inode *inode, struct file *file)
{
return single_open(file, ide_media_proc_show, PDE(inode)->data);
}
static const struct file_operations ide_media_proc_fops = {
.owner = THIS_MODULE,
.open = ide_media_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
static ide_proc_entry_t generic_drive_entries[] = {
{ "driver", S_IFREG|S_IRUGO, &ide_driver_proc_fops },
{ "identify", S_IFREG|S_IRUSR, &ide_identify_proc_fops},
{ "media", S_IFREG|S_IRUGO, &ide_media_proc_fops },
{ "model", S_IFREG|S_IRUGO, &ide_dmodel_proc_fops },
{ "settings", S_IFREG|S_IRUSR|S_IWUSR, &ide_settings_proc_fops},
{}
};
static void ide_add_proc_entries(struct proc_dir_entry *dir, ide_proc_entry_t *p, void *data)
{
struct proc_dir_entry *ent;
if (!dir || !p)
return;
while (p->name != NULL) {
ent = proc_create_data(p->name, p->mode, dir, p->proc_fops, data);
if (!ent) return;
p++;
}
}
static void ide_remove_proc_entries(struct proc_dir_entry *dir, ide_proc_entry_t *p)
{
if (!dir || !p)
return;
while (p->name != NULL) {
remove_proc_entry(p->name, dir);
p++;
}
}
void ide_proc_register_driver(ide_drive_t *drive, struct ide_driver *driver)
{
mutex_lock(&ide_setting_mtx);
drive->settings = driver->proc_devsets(drive);
mutex_unlock(&ide_setting_mtx);
ide_add_proc_entries(drive->proc, driver->proc_entries(drive), drive);
}
EXPORT_SYMBOL(ide_proc_register_driver);
/**
* ide_proc_unregister_driver - remove driver specific data
* @drive: drive
* @driver: driver
*
* Clean up the driver specific /proc files and IDE settings
* for a given drive.
*
* Takes ide_setting_mtx.
*/
void ide_proc_unregister_driver(ide_drive_t *drive, struct ide_driver *driver)
{
ide_remove_proc_entries(drive->proc, driver->proc_entries(drive));
mutex_lock(&ide_setting_mtx);
/*
* ide_setting_mtx protects both the settings list and the use
* of settings (we cannot take a setting out that is being used).
*/
drive->settings = NULL;
mutex_unlock(&ide_setting_mtx);
}
EXPORT_SYMBOL(ide_proc_unregister_driver);
void ide_proc_port_register_devices(ide_hwif_t *hwif)
{
struct proc_dir_entry *ent;
struct proc_dir_entry *parent = hwif->proc;
ide_drive_t *drive;
char name[64];
int i;
ide_port_for_each_dev(i, drive, hwif) {
if ((drive->dev_flags & IDE_DFLAG_PRESENT) == 0)
continue;
drive->proc = proc_mkdir(drive->name, parent);
if (drive->proc)
ide_add_proc_entries(drive->proc, generic_drive_entries, drive);
sprintf(name, "ide%d/%s", (drive->name[2]-'a')/2, drive->name);
ent = proc_symlink(drive->name, proc_ide_root, name);
if (!ent) return;
}
}
void ide_proc_unregister_device(ide_drive_t *drive)
{
if (drive->proc) {
ide_remove_proc_entries(drive->proc, generic_drive_entries);
remove_proc_entry(drive->name, proc_ide_root);
remove_proc_entry(drive->name, drive->hwif->proc);
drive->proc = NULL;
}
}
static ide_proc_entry_t hwif_entries[] = {
{ "channel", S_IFREG|S_IRUGO, &ide_channel_proc_fops },
{ "mate", S_IFREG|S_IRUGO, &ide_mate_proc_fops },
{ "model", S_IFREG|S_IRUGO, &ide_imodel_proc_fops },
{}
};
void ide_proc_register_port(ide_hwif_t *hwif)
{
if (!hwif->proc) {
hwif->proc = proc_mkdir(hwif->name, proc_ide_root);
if (!hwif->proc)
return;
ide_add_proc_entries(hwif->proc, hwif_entries, hwif);
}
}
void ide_proc_unregister_port(ide_hwif_t *hwif)
{
if (hwif->proc) {
ide_remove_proc_entries(hwif->proc, hwif_entries);
remove_proc_entry(hwif->name, proc_ide_root);
hwif->proc = NULL;
}
}
static int proc_print_driver(struct device_driver *drv, void *data)
{
struct ide_driver *ide_drv = to_ide_driver(drv);
struct seq_file *s = data;
seq_printf(s, "%s version %s\n", drv->name, ide_drv->version);
return 0;
}
static int ide_drivers_show(struct seq_file *s, void *p)
{
int err;
err = bus_for_each_drv(&ide_bus_type, NULL, s, proc_print_driver);
if (err < 0)
printk(KERN_WARNING "IDE: %s: bus_for_each_drv error: %d\n",
__func__, err);
return 0;
}
static int ide_drivers_open(struct inode *inode, struct file *file)
{
return single_open(file, &ide_drivers_show, NULL);
}
static const struct file_operations ide_drivers_operations = {
.owner = THIS_MODULE,
.open = ide_drivers_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
void proc_ide_create(void)
{
proc_ide_root = proc_mkdir("ide", NULL);
if (!proc_ide_root)
return;
proc_create("drivers", 0, proc_ide_root, &ide_drivers_operations);
}
void proc_ide_destroy(void)
{
remove_proc_entry("drivers", proc_ide_root);
remove_proc_entry("ide", NULL);
}
| gpl-2.0 |
Alex131089/raspberrypi-linux-3.6 | fs/ncpfs/ncpsign_kernel.c | 12883 | 3729 | /*
* ncpsign_kernel.c
*
* Arne de Bruijn (arne@knoware.nl), 1997
*
*/
#ifdef CONFIG_NCPFS_PACKET_SIGNING
#include <linux/string.h>
#include <linux/ncp.h>
#include <linux/bitops.h>
#include "ncp_fs.h"
#include "ncpsign_kernel.h"
/* i386: 32-bit, little endian, handles mis-alignment */
#ifdef __i386__
#define GET_LE32(p) (*(const int *)(p))
#define PUT_LE32(p,v) { *(int *)(p)=v; }
#else
/* from include/ncplib.h */
#define BVAL(buf,pos) (((const __u8 *)(buf))[pos])
#define PVAL(buf,pos) ((unsigned)BVAL(buf,pos))
#define BSET(buf,pos,val) (((__u8 *)(buf))[pos] = (val))
static inline __u16
WVAL_LH(const __u8 * buf, int pos)
{
return PVAL(buf, pos) | PVAL(buf, pos + 1) << 8;
}
static inline __u32
DVAL_LH(const __u8 * buf, int pos)
{
return WVAL_LH(buf, pos) | WVAL_LH(buf, pos + 2) << 16;
}
static inline void
WSET_LH(__u8 * buf, int pos, __u16 val)
{
BSET(buf, pos, val & 0xff);
BSET(buf, pos + 1, val >> 8);
}
static inline void
DSET_LH(__u8 * buf, int pos, __u32 val)
{
WSET_LH(buf, pos, val & 0xffff);
WSET_LH(buf, pos + 2, val >> 16);
}
#define GET_LE32(p) DVAL_LH(p,0)
#define PUT_LE32(p,v) DSET_LH(p,0,v)
#endif
static void nwsign(char *r_data1, char *r_data2, char *outdata) {
int i;
unsigned int w0,w1,w2,w3;
static int rbit[4]={0, 2, 1, 3};
#ifdef __i386__
unsigned int *data2=(unsigned int *)r_data2;
#else
unsigned int data2[16];
for (i=0;i<16;i++)
data2[i]=GET_LE32(r_data2+(i<<2));
#endif
w0=GET_LE32(r_data1);
w1=GET_LE32(r_data1+4);
w2=GET_LE32(r_data1+8);
w3=GET_LE32(r_data1+12);
for (i=0;i<16;i+=4) {
w0=rol32(w0 + ((w1 & w2) | ((~w1) & w3)) + data2[i+0],3);
w3=rol32(w3 + ((w0 & w1) | ((~w0) & w2)) + data2[i+1],7);
w2=rol32(w2 + ((w3 & w0) | ((~w3) & w1)) + data2[i+2],11);
w1=rol32(w1 + ((w2 & w3) | ((~w2) & w0)) + data2[i+3],19);
}
for (i=0;i<4;i++) {
w0=rol32(w0 + (((w2 | w3) & w1) | (w2 & w3)) + 0x5a827999 + data2[i+0],3);
w3=rol32(w3 + (((w1 | w2) & w0) | (w1 & w2)) + 0x5a827999 + data2[i+4],5);
w2=rol32(w2 + (((w0 | w1) & w3) | (w0 & w1)) + 0x5a827999 + data2[i+8],9);
w1=rol32(w1 + (((w3 | w0) & w2) | (w3 & w0)) + 0x5a827999 + data2[i+12],13);
}
for (i=0;i<4;i++) {
w0=rol32(w0 + ((w1 ^ w2) ^ w3) + 0x6ed9eba1 + data2[rbit[i]+0],3);
w3=rol32(w3 + ((w0 ^ w1) ^ w2) + 0x6ed9eba1 + data2[rbit[i]+8],9);
w2=rol32(w2 + ((w3 ^ w0) ^ w1) + 0x6ed9eba1 + data2[rbit[i]+4],11);
w1=rol32(w1 + ((w2 ^ w3) ^ w0) + 0x6ed9eba1 + data2[rbit[i]+12],15);
}
PUT_LE32(outdata,(w0+GET_LE32(r_data1)) & 0xffffffff);
PUT_LE32(outdata+4,(w1+GET_LE32(r_data1+4)) & 0xffffffff);
PUT_LE32(outdata+8,(w2+GET_LE32(r_data1+8)) & 0xffffffff);
PUT_LE32(outdata+12,(w3+GET_LE32(r_data1+12)) & 0xffffffff);
}
/* Make a signature for the current packet and add it at the end of the */
/* packet. */
void __sign_packet(struct ncp_server *server, const char *packet, size_t size, __u32 totalsize, void *sign_buff) {
unsigned char data[64];
memcpy(data, server->sign_root, 8);
*(__u32*)(data + 8) = totalsize;
if (size < 52) {
memcpy(data + 12, packet, size);
memset(data + 12 + size, 0, 52 - size);
} else {
memcpy(data + 12, packet, 52);
}
nwsign(server->sign_last, data, server->sign_last);
memcpy(sign_buff, server->sign_last, 8);
}
int sign_verify_reply(struct ncp_server *server, const char *packet, size_t size, __u32 totalsize, const void *sign_buff) {
unsigned char data[64];
unsigned char hash[16];
memcpy(data, server->sign_root, 8);
*(__u32*)(data + 8) = totalsize;
if (size < 52) {
memcpy(data + 12, packet, size);
memset(data + 12 + size, 0, 52 - size);
} else {
memcpy(data + 12, packet, 52);
}
nwsign(server->sign_last, data, hash);
return memcmp(sign_buff, hash, 8);
}
#endif /* CONFIG_NCPFS_PACKET_SIGNING */
| gpl-2.0 |
AAccount/android_kernel_samsung_p4 | fs/ncpfs/ncpsign_kernel.c | 12883 | 3729 | /*
* ncpsign_kernel.c
*
* Arne de Bruijn (arne@knoware.nl), 1997
*
*/
#ifdef CONFIG_NCPFS_PACKET_SIGNING
#include <linux/string.h>
#include <linux/ncp.h>
#include <linux/bitops.h>
#include "ncp_fs.h"
#include "ncpsign_kernel.h"
/* i386: 32-bit, little endian, handles mis-alignment */
#ifdef __i386__
#define GET_LE32(p) (*(const int *)(p))
#define PUT_LE32(p,v) { *(int *)(p)=v; }
#else
/* from include/ncplib.h */
#define BVAL(buf,pos) (((const __u8 *)(buf))[pos])
#define PVAL(buf,pos) ((unsigned)BVAL(buf,pos))
#define BSET(buf,pos,val) (((__u8 *)(buf))[pos] = (val))
static inline __u16
WVAL_LH(const __u8 * buf, int pos)
{
return PVAL(buf, pos) | PVAL(buf, pos + 1) << 8;
}
static inline __u32
DVAL_LH(const __u8 * buf, int pos)
{
return WVAL_LH(buf, pos) | WVAL_LH(buf, pos + 2) << 16;
}
static inline void
WSET_LH(__u8 * buf, int pos, __u16 val)
{
BSET(buf, pos, val & 0xff);
BSET(buf, pos + 1, val >> 8);
}
static inline void
DSET_LH(__u8 * buf, int pos, __u32 val)
{
WSET_LH(buf, pos, val & 0xffff);
WSET_LH(buf, pos + 2, val >> 16);
}
#define GET_LE32(p) DVAL_LH(p,0)
#define PUT_LE32(p,v) DSET_LH(p,0,v)
#endif
static void nwsign(char *r_data1, char *r_data2, char *outdata) {
int i;
unsigned int w0,w1,w2,w3;
static int rbit[4]={0, 2, 1, 3};
#ifdef __i386__
unsigned int *data2=(unsigned int *)r_data2;
#else
unsigned int data2[16];
for (i=0;i<16;i++)
data2[i]=GET_LE32(r_data2+(i<<2));
#endif
w0=GET_LE32(r_data1);
w1=GET_LE32(r_data1+4);
w2=GET_LE32(r_data1+8);
w3=GET_LE32(r_data1+12);
for (i=0;i<16;i+=4) {
w0=rol32(w0 + ((w1 & w2) | ((~w1) & w3)) + data2[i+0],3);
w3=rol32(w3 + ((w0 & w1) | ((~w0) & w2)) + data2[i+1],7);
w2=rol32(w2 + ((w3 & w0) | ((~w3) & w1)) + data2[i+2],11);
w1=rol32(w1 + ((w2 & w3) | ((~w2) & w0)) + data2[i+3],19);
}
for (i=0;i<4;i++) {
w0=rol32(w0 + (((w2 | w3) & w1) | (w2 & w3)) + 0x5a827999 + data2[i+0],3);
w3=rol32(w3 + (((w1 | w2) & w0) | (w1 & w2)) + 0x5a827999 + data2[i+4],5);
w2=rol32(w2 + (((w0 | w1) & w3) | (w0 & w1)) + 0x5a827999 + data2[i+8],9);
w1=rol32(w1 + (((w3 | w0) & w2) | (w3 & w0)) + 0x5a827999 + data2[i+12],13);
}
for (i=0;i<4;i++) {
w0=rol32(w0 + ((w1 ^ w2) ^ w3) + 0x6ed9eba1 + data2[rbit[i]+0],3);
w3=rol32(w3 + ((w0 ^ w1) ^ w2) + 0x6ed9eba1 + data2[rbit[i]+8],9);
w2=rol32(w2 + ((w3 ^ w0) ^ w1) + 0x6ed9eba1 + data2[rbit[i]+4],11);
w1=rol32(w1 + ((w2 ^ w3) ^ w0) + 0x6ed9eba1 + data2[rbit[i]+12],15);
}
PUT_LE32(outdata,(w0+GET_LE32(r_data1)) & 0xffffffff);
PUT_LE32(outdata+4,(w1+GET_LE32(r_data1+4)) & 0xffffffff);
PUT_LE32(outdata+8,(w2+GET_LE32(r_data1+8)) & 0xffffffff);
PUT_LE32(outdata+12,(w3+GET_LE32(r_data1+12)) & 0xffffffff);
}
/* Make a signature for the current packet and add it at the end of the */
/* packet. */
void __sign_packet(struct ncp_server *server, const char *packet, size_t size, __u32 totalsize, void *sign_buff) {
unsigned char data[64];
memcpy(data, server->sign_root, 8);
*(__u32*)(data + 8) = totalsize;
if (size < 52) {
memcpy(data + 12, packet, size);
memset(data + 12 + size, 0, 52 - size);
} else {
memcpy(data + 12, packet, 52);
}
nwsign(server->sign_last, data, server->sign_last);
memcpy(sign_buff, server->sign_last, 8);
}
int sign_verify_reply(struct ncp_server *server, const char *packet, size_t size, __u32 totalsize, const void *sign_buff) {
unsigned char data[64];
unsigned char hash[16];
memcpy(data, server->sign_root, 8);
*(__u32*)(data + 8) = totalsize;
if (size < 52) {
memcpy(data + 12, packet, size);
memset(data + 12 + size, 0, 52 - size);
} else {
memcpy(data + 12, packet, 52);
}
nwsign(server->sign_last, data, hash);
return memcmp(sign_buff, hash, 8);
}
#endif /* CONFIG_NCPFS_PACKET_SIGNING */
| gpl-2.0 |
pacificIT/linux-imx6-1 | arch/mips/pci/fixup-capcella.c | 13651 | 1580 | /*
* fixup-cappcela.c, The ZAO Networks Capcella specific PCI fixups.
*
* Copyright (C) 2002,2004 Yoichi Yuasa <yuasa@linux-mips.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/pci.h>
#include <asm/vr41xx/capcella.h>
/*
* Shortcuts
*/
#define INT1 RTL8139_1_IRQ
#define INT2 RTL8139_2_IRQ
#define INTA PC104PLUS_INTA_IRQ
#define INTB PC104PLUS_INTB_IRQ
#define INTC PC104PLUS_INTC_IRQ
#define INTD PC104PLUS_INTD_IRQ
static char irq_tab_capcella[][5] __initdata = {
[11] = { -1, INT1, INT1, INT1, INT1 },
[12] = { -1, INT2, INT2, INT2, INT2 },
[14] = { -1, INTA, INTB, INTC, INTD }
};
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
return irq_tab_capcella[slot][pin];
}
/* Do platform specific device initialization at pci_enable_device() time */
int pcibios_plat_dev_init(struct pci_dev *dev)
{
return 0;
}
| gpl-2.0 |
CyanogenMod/android_kernel_lge_msm8226 | drivers/usb/host/fhci-mem.c | 13907 | 2682 | /*
* Freescale QUICC Engine USB Host Controller Driver
*
* Copyright (c) Freescale Semicondutor, Inc. 2006.
* Shlomi Gridish <gridish@freescale.com>
* Jerry Huang <Chang-Ming.Huang@freescale.com>
* Copyright (c) Logic Product Development, Inc. 2007
* Peter Barada <peterb@logicpd.com>
* Copyright (c) MontaVista Software, Inc. 2008.
* Anton Vorontsov <avorontsov@ru.mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/list.h>
#include <linux/usb.h>
#include <linux/usb/hcd.h>
#include "fhci.h"
static void init_td(struct td *td)
{
memset(td, 0, sizeof(*td));
INIT_LIST_HEAD(&td->node);
INIT_LIST_HEAD(&td->frame_lh);
}
static void init_ed(struct ed *ed)
{
memset(ed, 0, sizeof(*ed));
INIT_LIST_HEAD(&ed->td_list);
INIT_LIST_HEAD(&ed->node);
}
static struct td *get_empty_td(struct fhci_hcd *fhci)
{
struct td *td;
if (!list_empty(&fhci->empty_tds)) {
td = list_entry(fhci->empty_tds.next, struct td, node);
list_del(fhci->empty_tds.next);
} else {
td = kmalloc(sizeof(*td), GFP_ATOMIC);
if (!td)
fhci_err(fhci, "No memory to allocate to TD\n");
else
init_td(td);
}
return td;
}
void fhci_recycle_empty_td(struct fhci_hcd *fhci, struct td *td)
{
init_td(td);
list_add(&td->node, &fhci->empty_tds);
}
struct ed *fhci_get_empty_ed(struct fhci_hcd *fhci)
{
struct ed *ed;
if (!list_empty(&fhci->empty_eds)) {
ed = list_entry(fhci->empty_eds.next, struct ed, node);
list_del(fhci->empty_eds.next);
} else {
ed = kmalloc(sizeof(*ed), GFP_ATOMIC);
if (!ed)
fhci_err(fhci, "No memory to allocate to ED\n");
else
init_ed(ed);
}
return ed;
}
void fhci_recycle_empty_ed(struct fhci_hcd *fhci, struct ed *ed)
{
init_ed(ed);
list_add(&ed->node, &fhci->empty_eds);
}
struct td *fhci_td_fill(struct fhci_hcd *fhci, struct urb *urb,
struct urb_priv *urb_priv, struct ed *ed, u16 index,
enum fhci_ta_type type, int toggle, u8 *data, u32 len,
u16 interval, u16 start_frame, bool ioc)
{
struct td *td = get_empty_td(fhci);
if (!td)
return NULL;
td->urb = urb;
td->ed = ed;
td->type = type;
td->toggle = toggle;
td->data = data;
td->len = len;
td->iso_index = index;
td->interval = interval;
td->start_frame = start_frame;
td->ioc = ioc;
td->status = USB_TD_OK;
urb_priv->tds[index] = td;
return td;
}
| gpl-2.0 |
Tim1928/DBK-3.0-4.2 | drivers/usb/host/fhci-mem.c | 13907 | 2682 | /*
* Freescale QUICC Engine USB Host Controller Driver
*
* Copyright (c) Freescale Semicondutor, Inc. 2006.
* Shlomi Gridish <gridish@freescale.com>
* Jerry Huang <Chang-Ming.Huang@freescale.com>
* Copyright (c) Logic Product Development, Inc. 2007
* Peter Barada <peterb@logicpd.com>
* Copyright (c) MontaVista Software, Inc. 2008.
* Anton Vorontsov <avorontsov@ru.mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/list.h>
#include <linux/usb.h>
#include <linux/usb/hcd.h>
#include "fhci.h"
static void init_td(struct td *td)
{
memset(td, 0, sizeof(*td));
INIT_LIST_HEAD(&td->node);
INIT_LIST_HEAD(&td->frame_lh);
}
static void init_ed(struct ed *ed)
{
memset(ed, 0, sizeof(*ed));
INIT_LIST_HEAD(&ed->td_list);
INIT_LIST_HEAD(&ed->node);
}
static struct td *get_empty_td(struct fhci_hcd *fhci)
{
struct td *td;
if (!list_empty(&fhci->empty_tds)) {
td = list_entry(fhci->empty_tds.next, struct td, node);
list_del(fhci->empty_tds.next);
} else {
td = kmalloc(sizeof(*td), GFP_ATOMIC);
if (!td)
fhci_err(fhci, "No memory to allocate to TD\n");
else
init_td(td);
}
return td;
}
void fhci_recycle_empty_td(struct fhci_hcd *fhci, struct td *td)
{
init_td(td);
list_add(&td->node, &fhci->empty_tds);
}
struct ed *fhci_get_empty_ed(struct fhci_hcd *fhci)
{
struct ed *ed;
if (!list_empty(&fhci->empty_eds)) {
ed = list_entry(fhci->empty_eds.next, struct ed, node);
list_del(fhci->empty_eds.next);
} else {
ed = kmalloc(sizeof(*ed), GFP_ATOMIC);
if (!ed)
fhci_err(fhci, "No memory to allocate to ED\n");
else
init_ed(ed);
}
return ed;
}
void fhci_recycle_empty_ed(struct fhci_hcd *fhci, struct ed *ed)
{
init_ed(ed);
list_add(&ed->node, &fhci->empty_eds);
}
struct td *fhci_td_fill(struct fhci_hcd *fhci, struct urb *urb,
struct urb_priv *urb_priv, struct ed *ed, u16 index,
enum fhci_ta_type type, int toggle, u8 *data, u32 len,
u16 interval, u16 start_frame, bool ioc)
{
struct td *td = get_empty_td(fhci);
if (!td)
return NULL;
td->urb = urb;
td->ed = ed;
td->type = type;
td->toggle = toggle;
td->data = data;
td->len = len;
td->iso_index = index;
td->interval = interval;
td->start_frame = start_frame;
td->ioc = ioc;
td->status = USB_TD_OK;
urb_priv->tds[index] = td;
return td;
}
| gpl-2.0 |
Jeongduckho/E250_KITKAT | drivers/base/isa.c | 14163 | 3772 | /*
* ISA bus.
*/
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/dma-mapping.h>
#include <linux/isa.h>
static struct device isa_bus = {
.init_name = "isa"
};
struct isa_dev {
struct device dev;
struct device *next;
unsigned int id;
};
#define to_isa_dev(x) container_of((x), struct isa_dev, dev)
static int isa_bus_match(struct device *dev, struct device_driver *driver)
{
struct isa_driver *isa_driver = to_isa_driver(driver);
if (dev->platform_data == isa_driver) {
if (!isa_driver->match ||
isa_driver->match(dev, to_isa_dev(dev)->id))
return 1;
dev->platform_data = NULL;
}
return 0;
}
static int isa_bus_probe(struct device *dev)
{
struct isa_driver *isa_driver = dev->platform_data;
if (isa_driver->probe)
return isa_driver->probe(dev, to_isa_dev(dev)->id);
return 0;
}
static int isa_bus_remove(struct device *dev)
{
struct isa_driver *isa_driver = dev->platform_data;
if (isa_driver->remove)
return isa_driver->remove(dev, to_isa_dev(dev)->id);
return 0;
}
static void isa_bus_shutdown(struct device *dev)
{
struct isa_driver *isa_driver = dev->platform_data;
if (isa_driver->shutdown)
isa_driver->shutdown(dev, to_isa_dev(dev)->id);
}
static int isa_bus_suspend(struct device *dev, pm_message_t state)
{
struct isa_driver *isa_driver = dev->platform_data;
if (isa_driver->suspend)
return isa_driver->suspend(dev, to_isa_dev(dev)->id, state);
return 0;
}
static int isa_bus_resume(struct device *dev)
{
struct isa_driver *isa_driver = dev->platform_data;
if (isa_driver->resume)
return isa_driver->resume(dev, to_isa_dev(dev)->id);
return 0;
}
static struct bus_type isa_bus_type = {
.name = "isa",
.match = isa_bus_match,
.probe = isa_bus_probe,
.remove = isa_bus_remove,
.shutdown = isa_bus_shutdown,
.suspend = isa_bus_suspend,
.resume = isa_bus_resume
};
static void isa_dev_release(struct device *dev)
{
kfree(to_isa_dev(dev));
}
void isa_unregister_driver(struct isa_driver *isa_driver)
{
struct device *dev = isa_driver->devices;
while (dev) {
struct device *tmp = to_isa_dev(dev)->next;
device_unregister(dev);
dev = tmp;
}
driver_unregister(&isa_driver->driver);
}
EXPORT_SYMBOL_GPL(isa_unregister_driver);
int isa_register_driver(struct isa_driver *isa_driver, unsigned int ndev)
{
int error;
unsigned int id;
isa_driver->driver.bus = &isa_bus_type;
isa_driver->devices = NULL;
error = driver_register(&isa_driver->driver);
if (error)
return error;
for (id = 0; id < ndev; id++) {
struct isa_dev *isa_dev;
isa_dev = kzalloc(sizeof *isa_dev, GFP_KERNEL);
if (!isa_dev) {
error = -ENOMEM;
break;
}
isa_dev->dev.parent = &isa_bus;
isa_dev->dev.bus = &isa_bus_type;
dev_set_name(&isa_dev->dev, "%s.%u",
isa_driver->driver.name, id);
isa_dev->dev.platform_data = isa_driver;
isa_dev->dev.release = isa_dev_release;
isa_dev->id = id;
isa_dev->dev.coherent_dma_mask = DMA_BIT_MASK(24);
isa_dev->dev.dma_mask = &isa_dev->dev.coherent_dma_mask;
error = device_register(&isa_dev->dev);
if (error) {
put_device(&isa_dev->dev);
break;
}
if (isa_dev->dev.platform_data) {
isa_dev->next = isa_driver->devices;
isa_driver->devices = &isa_dev->dev;
} else
device_unregister(&isa_dev->dev);
}
if (!error && !isa_driver->devices)
error = -ENODEV;
if (error)
isa_unregister_driver(isa_driver);
return error;
}
EXPORT_SYMBOL_GPL(isa_register_driver);
static int __init isa_bus_init(void)
{
int error;
error = bus_register(&isa_bus_type);
if (!error) {
error = device_register(&isa_bus);
if (error)
bus_unregister(&isa_bus_type);
}
return error;
}
device_initcall(isa_bus_init);
| gpl-2.0 |
dadziokPL/android_kernel_samsung_grandprimevelte | drivers/misc/gator/gator_hrtimer_gator.c | 84 | 2084 | /**
* Copyright (C) ARM Limited 2011-2015. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
void (*callback)(void);
DEFINE_PER_CPU(struct hrtimer, percpu_hrtimer);
DEFINE_PER_CPU(ktime_t, hrtimer_expire);
DEFINE_PER_CPU(int, hrtimer_is_active);
static ktime_t profiling_interval;
static void gator_hrtimer_online(void);
static void gator_hrtimer_offline(void);
static enum hrtimer_restart gator_hrtimer_notify(struct hrtimer *hrtimer)
{
int cpu = get_logical_cpu();
hrtimer_forward(hrtimer, per_cpu(hrtimer_expire, cpu), profiling_interval);
per_cpu(hrtimer_expire, cpu) = ktime_add(per_cpu(hrtimer_expire, cpu), profiling_interval);
(*callback)();
return HRTIMER_RESTART;
}
static void gator_hrtimer_online(void)
{
int cpu = get_logical_cpu();
struct hrtimer *hrtimer = &per_cpu(percpu_hrtimer, cpu);
if (per_cpu(hrtimer_is_active, cpu) || profiling_interval.tv64 == 0)
return;
per_cpu(hrtimer_is_active, cpu) = 1;
hrtimer_init(hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
hrtimer->function = gator_hrtimer_notify;
#ifdef CONFIG_PREEMPT_RT_BASE
hrtimer->irqsafe = 1;
#endif
per_cpu(hrtimer_expire, cpu) = ktime_add(hrtimer->base->get_time(), profiling_interval);
hrtimer_start(hrtimer, per_cpu(hrtimer_expire, cpu), HRTIMER_MODE_ABS_PINNED);
}
static void gator_hrtimer_offline(void)
{
int cpu = get_logical_cpu();
struct hrtimer *hrtimer = &per_cpu(percpu_hrtimer, cpu);
if (!per_cpu(hrtimer_is_active, cpu))
return;
per_cpu(hrtimer_is_active, cpu) = 0;
hrtimer_cancel(hrtimer);
}
static int gator_hrtimer_init(int interval, void (*func)(void))
{
int cpu;
(callback) = (func);
for_each_present_cpu(cpu) {
per_cpu(hrtimer_is_active, cpu) = 0;
}
/* calculate profiling interval */
if (interval > 0)
profiling_interval = ns_to_ktime(1000000000UL / interval);
else
profiling_interval.tv64 = 0;
return 0;
}
static void gator_hrtimer_shutdown(void)
{
/* empty */
}
| gpl-2.0 |
mtitinger/linux-pm | arch/mips/jz4740/board-qi_lb60.c | 340 | 12728 | /*
* linux/arch/mips/jz4740/board-qi_lb60.c
*
* QI_LB60 board support
*
* Copyright (c) 2009 Qi Hardware inc.,
* Author: Xiangfu Liu <xiangfu@qi-hardware.com>
* Copyright 2010, Lars-Peter Clausen <lars@metafoo.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 or later
* as published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/gpio/machine.h>
#include <linux/input.h>
#include <linux/gpio_keys.h>
#include <linux/input/matrix_keypad.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_gpio.h>
#include <linux/power_supply.h>
#include <linux/power/jz4740-battery.h>
#include <linux/power/gpio-charger.h>
#include <asm/mach-jz4740/jz4740_fb.h>
#include <asm/mach-jz4740/jz4740_mmc.h>
#include <asm/mach-jz4740/jz4740_nand.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/leds_pwm.h>
#include <asm/mach-jz4740/platform.h>
#include "clock.h"
static bool is_avt2;
/* GPIOs */
#define QI_LB60_GPIO_SD_CD JZ_GPIO_PORTD(0)
#define QI_LB60_GPIO_SD_VCC_EN_N JZ_GPIO_PORTD(2)
#define QI_LB60_GPIO_KEYOUT(x) (JZ_GPIO_PORTC(10) + (x))
#define QI_LB60_GPIO_KEYIN(x) (JZ_GPIO_PORTD(18) + (x))
#define QI_LB60_GPIO_KEYIN8 JZ_GPIO_PORTD(26)
/* NAND */
static struct nand_ecclayout qi_lb60_ecclayout_1gb = {
.eccbytes = 36,
.eccpos = {
6, 7, 8, 9, 10, 11, 12, 13,
14, 15, 16, 17, 18, 19, 20, 21,
22, 23, 24, 25, 26, 27, 28, 29,
30, 31, 32, 33, 34, 35, 36, 37,
38, 39, 40, 41
},
.oobfree = {
{ .offset = 2, .length = 4 },
{ .offset = 42, .length = 22 }
},
};
/* Early prototypes of the QI LB60 had only 1GB of NAND.
* In order to support these devices as well the partition and ecc layout is
* initialized depending on the NAND size */
static struct mtd_partition qi_lb60_partitions_1gb[] = {
{
.name = "NAND BOOT partition",
.offset = 0 * 0x100000,
.size = 4 * 0x100000,
},
{
.name = "NAND KERNEL partition",
.offset = 4 * 0x100000,
.size = 4 * 0x100000,
},
{
.name = "NAND ROOTFS partition",
.offset = 8 * 0x100000,
.size = (504 + 512) * 0x100000,
},
};
static struct nand_ecclayout qi_lb60_ecclayout_2gb = {
.eccbytes = 72,
.eccpos = {
12, 13, 14, 15, 16, 17, 18, 19,
20, 21, 22, 23, 24, 25, 26, 27,
28, 29, 30, 31, 32, 33, 34, 35,
36, 37, 38, 39, 40, 41, 42, 43,
44, 45, 46, 47, 48, 49, 50, 51,
52, 53, 54, 55, 56, 57, 58, 59,
60, 61, 62, 63, 64, 65, 66, 67,
68, 69, 70, 71, 72, 73, 74, 75,
76, 77, 78, 79, 80, 81, 82, 83
},
.oobfree = {
{ .offset = 2, .length = 10 },
{ .offset = 84, .length = 44 },
},
};
static struct mtd_partition qi_lb60_partitions_2gb[] = {
{
.name = "NAND BOOT partition",
.offset = 0 * 0x100000,
.size = 4 * 0x100000,
},
{
.name = "NAND KERNEL partition",
.offset = 4 * 0x100000,
.size = 4 * 0x100000,
},
{
.name = "NAND ROOTFS partition",
.offset = 8 * 0x100000,
.size = (504 + 512 + 1024) * 0x100000,
},
};
static void qi_lb60_nand_ident(struct platform_device *pdev,
struct nand_chip *chip, struct mtd_partition **partitions,
int *num_partitions)
{
if (chip->page_shift == 12) {
chip->ecc.layout = &qi_lb60_ecclayout_2gb;
*partitions = qi_lb60_partitions_2gb;
*num_partitions = ARRAY_SIZE(qi_lb60_partitions_2gb);
} else {
chip->ecc.layout = &qi_lb60_ecclayout_1gb;
*partitions = qi_lb60_partitions_1gb;
*num_partitions = ARRAY_SIZE(qi_lb60_partitions_1gb);
}
}
static struct jz_nand_platform_data qi_lb60_nand_pdata = {
.ident_callback = qi_lb60_nand_ident,
.banks = { 1 },
};
static struct gpiod_lookup_table qi_lb60_nand_gpio_table = {
.dev_id = "jz4740-nand.0",
.table = {
GPIO_LOOKUP("Bank C", 30, "busy", 0),
{ },
},
};
/* Keyboard*/
#define KEY_QI_QI KEY_F13
#define KEY_QI_UPRED KEY_RIGHTALT
#define KEY_QI_VOLUP KEY_VOLUMEUP
#define KEY_QI_VOLDOWN KEY_VOLUMEDOWN
#define KEY_QI_FN KEY_LEFTCTRL
static const uint32_t qi_lb60_keymap[] = {
KEY(0, 0, KEY_F1), /* S2 */
KEY(0, 1, KEY_F2), /* S3 */
KEY(0, 2, KEY_F3), /* S4 */
KEY(0, 3, KEY_F4), /* S5 */
KEY(0, 4, KEY_F5), /* S6 */
KEY(0, 5, KEY_F6), /* S7 */
KEY(0, 6, KEY_F7), /* S8 */
KEY(1, 0, KEY_Q), /* S10 */
KEY(1, 1, KEY_W), /* S11 */
KEY(1, 2, KEY_E), /* S12 */
KEY(1, 3, KEY_R), /* S13 */
KEY(1, 4, KEY_T), /* S14 */
KEY(1, 5, KEY_Y), /* S15 */
KEY(1, 6, KEY_U), /* S16 */
KEY(1, 7, KEY_I), /* S17 */
KEY(2, 0, KEY_A), /* S18 */
KEY(2, 1, KEY_S), /* S19 */
KEY(2, 2, KEY_D), /* S20 */
KEY(2, 3, KEY_F), /* S21 */
KEY(2, 4, KEY_G), /* S22 */
KEY(2, 5, KEY_H), /* S23 */
KEY(2, 6, KEY_J), /* S24 */
KEY(2, 7, KEY_K), /* S25 */
KEY(3, 0, KEY_ESC), /* S26 */
KEY(3, 1, KEY_Z), /* S27 */
KEY(3, 2, KEY_X), /* S28 */
KEY(3, 3, KEY_C), /* S29 */
KEY(3, 4, KEY_V), /* S30 */
KEY(3, 5, KEY_B), /* S31 */
KEY(3, 6, KEY_N), /* S32 */
KEY(3, 7, KEY_M), /* S33 */
KEY(4, 0, KEY_TAB), /* S34 */
KEY(4, 1, KEY_CAPSLOCK), /* S35 */
KEY(4, 2, KEY_BACKSLASH), /* S36 */
KEY(4, 3, KEY_APOSTROPHE), /* S37 */
KEY(4, 4, KEY_COMMA), /* S38 */
KEY(4, 5, KEY_DOT), /* S39 */
KEY(4, 6, KEY_SLASH), /* S40 */
KEY(4, 7, KEY_UP), /* S41 */
KEY(5, 0, KEY_O), /* S42 */
KEY(5, 1, KEY_L), /* S43 */
KEY(5, 2, KEY_EQUAL), /* S44 */
KEY(5, 3, KEY_QI_UPRED), /* S45 */
KEY(5, 4, KEY_SPACE), /* S46 */
KEY(5, 5, KEY_QI_QI), /* S47 */
KEY(5, 6, KEY_RIGHTCTRL), /* S48 */
KEY(5, 7, KEY_LEFT), /* S49 */
KEY(6, 0, KEY_F8), /* S50 */
KEY(6, 1, KEY_P), /* S51 */
KEY(6, 2, KEY_BACKSPACE),/* S52 */
KEY(6, 3, KEY_ENTER), /* S53 */
KEY(6, 4, KEY_QI_VOLUP), /* S54 */
KEY(6, 5, KEY_QI_VOLDOWN), /* S55 */
KEY(6, 6, KEY_DOWN), /* S56 */
KEY(6, 7, KEY_RIGHT), /* S57 */
KEY(7, 0, KEY_LEFTSHIFT), /* S58 */
KEY(7, 1, KEY_LEFTALT), /* S59 */
KEY(7, 2, KEY_QI_FN), /* S60 */
};
static const struct matrix_keymap_data qi_lb60_keymap_data = {
.keymap = qi_lb60_keymap,
.keymap_size = ARRAY_SIZE(qi_lb60_keymap),
};
static const unsigned int qi_lb60_keypad_cols[] = {
QI_LB60_GPIO_KEYOUT(0),
QI_LB60_GPIO_KEYOUT(1),
QI_LB60_GPIO_KEYOUT(2),
QI_LB60_GPIO_KEYOUT(3),
QI_LB60_GPIO_KEYOUT(4),
QI_LB60_GPIO_KEYOUT(5),
QI_LB60_GPIO_KEYOUT(6),
QI_LB60_GPIO_KEYOUT(7),
};
static const unsigned int qi_lb60_keypad_rows[] = {
QI_LB60_GPIO_KEYIN(0),
QI_LB60_GPIO_KEYIN(1),
QI_LB60_GPIO_KEYIN(2),
QI_LB60_GPIO_KEYIN(3),
QI_LB60_GPIO_KEYIN(4),
QI_LB60_GPIO_KEYIN(5),
QI_LB60_GPIO_KEYIN(6),
QI_LB60_GPIO_KEYIN8,
};
static struct matrix_keypad_platform_data qi_lb60_pdata = {
.keymap_data = &qi_lb60_keymap_data,
.col_gpios = qi_lb60_keypad_cols,
.row_gpios = qi_lb60_keypad_rows,
.num_col_gpios = ARRAY_SIZE(qi_lb60_keypad_cols),
.num_row_gpios = ARRAY_SIZE(qi_lb60_keypad_rows),
.col_scan_delay_us = 10,
.debounce_ms = 10,
.wakeup = 1,
.active_low = 1,
};
static struct platform_device qi_lb60_keypad = {
.name = "matrix-keypad",
.id = -1,
.dev = {
.platform_data = &qi_lb60_pdata,
},
};
/* Display */
static struct fb_videomode qi_lb60_video_modes[] = {
{
.name = "320x240",
.xres = 320,
.yres = 240,
.refresh = 30,
.left_margin = 140,
.right_margin = 273,
.upper_margin = 20,
.lower_margin = 2,
.hsync_len = 1,
.vsync_len = 1,
.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,
},
};
static struct jz4740_fb_platform_data qi_lb60_fb_pdata = {
.width = 60,
.height = 45,
.num_modes = ARRAY_SIZE(qi_lb60_video_modes),
.modes = qi_lb60_video_modes,
.bpp = 24,
.lcd_type = JZ_LCD_TYPE_8BIT_SERIAL,
.pixclk_falling_edge = 1,
};
struct spi_gpio_platform_data spigpio_platform_data = {
.sck = JZ_GPIO_PORTC(23),
.mosi = JZ_GPIO_PORTC(22),
.miso = -1,
.num_chipselect = 1,
};
static struct platform_device spigpio_device = {
.name = "spi_gpio",
.id = 1,
.dev = {
.platform_data = &spigpio_platform_data,
},
};
static struct spi_board_info qi_lb60_spi_board_info[] = {
{
.modalias = "ili8960",
.controller_data = (void *)JZ_GPIO_PORTC(21),
.chip_select = 0,
.bus_num = 1,
.max_speed_hz = 30 * 1000,
.mode = SPI_3WIRE,
},
};
/* Battery */
static struct jz_battery_platform_data qi_lb60_battery_pdata = {
.gpio_charge = JZ_GPIO_PORTC(27),
.gpio_charge_active_low = 1,
.info = {
.name = "battery",
.technology = POWER_SUPPLY_TECHNOLOGY_LIPO,
.voltage_max_design = 4200000,
.voltage_min_design = 3600000,
},
};
/* GPIO Key: power */
static struct gpio_keys_button qi_lb60_gpio_keys_buttons[] = {
[0] = {
.code = KEY_POWER,
.gpio = JZ_GPIO_PORTD(29),
.active_low = 1,
.desc = "Power",
.wakeup = 1,
},
};
static struct gpio_keys_platform_data qi_lb60_gpio_keys_data = {
.nbuttons = ARRAY_SIZE(qi_lb60_gpio_keys_buttons),
.buttons = qi_lb60_gpio_keys_buttons,
};
static struct platform_device qi_lb60_gpio_keys = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &qi_lb60_gpio_keys_data,
}
};
static struct jz4740_mmc_platform_data qi_lb60_mmc_pdata = {
.gpio_card_detect = QI_LB60_GPIO_SD_CD,
.gpio_read_only = -1,
.gpio_power = QI_LB60_GPIO_SD_VCC_EN_N,
.power_active_low = 1,
};
/* OHCI */
static struct regulator_consumer_supply avt2_usb_regulator_consumer =
REGULATOR_SUPPLY("vbus", "jz4740-ohci");
static struct regulator_init_data avt2_usb_regulator_init_data = {
.num_consumer_supplies = 1,
.consumer_supplies = &avt2_usb_regulator_consumer,
.constraints = {
.name = "USB power",
.min_uV = 5000000,
.max_uV = 5000000,
.valid_modes_mask = REGULATOR_MODE_NORMAL,
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
},
};
static struct fixed_voltage_config avt2_usb_regulator_data = {
.supply_name = "USB power",
.microvolts = 5000000,
.gpio = JZ_GPIO_PORTB(17),
.init_data = &avt2_usb_regulator_init_data,
};
static struct platform_device avt2_usb_regulator_device = {
.name = "reg-fixed-voltage",
.id = -1,
.dev = {
.platform_data = &avt2_usb_regulator_data,
}
};
/* beeper */
static struct platform_device qi_lb60_pwm_beeper = {
.name = "pwm-beeper",
.id = -1,
.dev = {
.platform_data = (void *)4,
},
};
/* charger */
static char *qi_lb60_batteries[] = {
"battery",
};
static struct gpio_charger_platform_data qi_lb60_charger_pdata = {
.name = "usb",
.type = POWER_SUPPLY_TYPE_USB,
.gpio = JZ_GPIO_PORTD(28),
.gpio_active_low = 1,
.supplied_to = qi_lb60_batteries,
.num_supplicants = ARRAY_SIZE(qi_lb60_batteries),
};
static struct platform_device qi_lb60_charger_device = {
.name = "gpio-charger",
.dev = {
.platform_data = &qi_lb60_charger_pdata,
},
};
/* audio */
static struct platform_device qi_lb60_audio_device = {
.name = "qi-lb60-audio",
.id = -1,
};
static struct gpiod_lookup_table qi_lb60_audio_gpio_table = {
.dev_id = "qi-lb60-audio",
.table = {
GPIO_LOOKUP("Bank B", 29, "snd", 0),
GPIO_LOOKUP("Bank D", 4, "amp", 0),
{ },
},
};
static struct platform_device *jz_platform_devices[] __initdata = {
&jz4740_udc_device,
&jz4740_udc_xceiv_device,
&jz4740_mmc_device,
&jz4740_nand_device,
&qi_lb60_keypad,
&spigpio_device,
&jz4740_framebuffer_device,
&jz4740_pcm_device,
&jz4740_i2s_device,
&jz4740_codec_device,
&jz4740_rtc_device,
&jz4740_adc_device,
&jz4740_pwm_device,
&jz4740_dma_device,
&qi_lb60_gpio_keys,
&qi_lb60_pwm_beeper,
&qi_lb60_charger_device,
&qi_lb60_audio_device,
};
static void __init board_gpio_setup(void)
{
/* We only need to enable/disable pullup here for pins used in generic
* drivers. Everything else is done by the drivers themselves. */
jz_gpio_disable_pullup(QI_LB60_GPIO_SD_VCC_EN_N);
jz_gpio_disable_pullup(QI_LB60_GPIO_SD_CD);
}
static int __init qi_lb60_init_platform_devices(void)
{
jz4740_framebuffer_device.dev.platform_data = &qi_lb60_fb_pdata;
jz4740_nand_device.dev.platform_data = &qi_lb60_nand_pdata;
jz4740_adc_device.dev.platform_data = &qi_lb60_battery_pdata;
jz4740_mmc_device.dev.platform_data = &qi_lb60_mmc_pdata;
gpiod_add_lookup_table(&qi_lb60_audio_gpio_table);
gpiod_add_lookup_table(&qi_lb60_nand_gpio_table);
spi_register_board_info(qi_lb60_spi_board_info,
ARRAY_SIZE(qi_lb60_spi_board_info));
if (is_avt2) {
platform_device_register(&avt2_usb_regulator_device);
platform_device_register(&jz4740_usb_ohci_device);
}
return platform_add_devices(jz_platform_devices,
ARRAY_SIZE(jz_platform_devices));
}
static __init int board_avt2(char *str)
{
qi_lb60_mmc_pdata.card_detect_active_low = 1;
is_avt2 = true;
return 1;
}
__setup("avt2", board_avt2);
static int __init qi_lb60_board_setup(void)
{
printk(KERN_INFO "Qi Hardware JZ4740 QI %s setup\n",
is_avt2 ? "AVT2" : "LB60");
board_gpio_setup();
if (qi_lb60_init_platform_devices())
panic("Failed to initialize platform devices");
return 0;
}
arch_initcall(qi_lb60_board_setup);
| gpl-2.0 |
Klagopsalmer/linux | drivers/i2c/busses/i2c-dln2.c | 852 | 6277 | /*
* Driver for the Diolan DLN-2 USB-I2C adapter
*
* Copyright (c) 2014 Intel Corporation
*
* Derived from:
* i2c-diolan-u2c.c
* Copyright (c) 2010-2011 Ericsson AB
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation, version 2.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
#include <linux/mfd/dln2.h>
#define DLN2_I2C_MODULE_ID 0x03
#define DLN2_I2C_CMD(cmd) DLN2_CMD(cmd, DLN2_I2C_MODULE_ID)
/* I2C commands */
#define DLN2_I2C_GET_PORT_COUNT DLN2_I2C_CMD(0x00)
#define DLN2_I2C_ENABLE DLN2_I2C_CMD(0x01)
#define DLN2_I2C_DISABLE DLN2_I2C_CMD(0x02)
#define DLN2_I2C_IS_ENABLED DLN2_I2C_CMD(0x03)
#define DLN2_I2C_WRITE DLN2_I2C_CMD(0x06)
#define DLN2_I2C_READ DLN2_I2C_CMD(0x07)
#define DLN2_I2C_SCAN_DEVICES DLN2_I2C_CMD(0x08)
#define DLN2_I2C_PULLUP_ENABLE DLN2_I2C_CMD(0x09)
#define DLN2_I2C_PULLUP_DISABLE DLN2_I2C_CMD(0x0A)
#define DLN2_I2C_PULLUP_IS_ENABLED DLN2_I2C_CMD(0x0B)
#define DLN2_I2C_TRANSFER DLN2_I2C_CMD(0x0C)
#define DLN2_I2C_SET_MAX_REPLY_COUNT DLN2_I2C_CMD(0x0D)
#define DLN2_I2C_GET_MAX_REPLY_COUNT DLN2_I2C_CMD(0x0E)
#define DLN2_I2C_MAX_XFER_SIZE 256
#define DLN2_I2C_BUF_SIZE (DLN2_I2C_MAX_XFER_SIZE + 16)
struct dln2_i2c {
struct platform_device *pdev;
struct i2c_adapter adapter;
u8 port;
/*
* Buffer to hold the packet for read or write transfers. One is enough
* since we can't have multiple transfers in parallel on the i2c bus.
*/
void *buf;
};
static int dln2_i2c_enable(struct dln2_i2c *dln2, bool enable)
{
u16 cmd;
struct {
u8 port;
} tx;
tx.port = dln2->port;
if (enable)
cmd = DLN2_I2C_ENABLE;
else
cmd = DLN2_I2C_DISABLE;
return dln2_transfer_tx(dln2->pdev, cmd, &tx, sizeof(tx));
}
static int dln2_i2c_write(struct dln2_i2c *dln2, u8 addr,
u8 *data, u16 data_len)
{
int ret;
struct {
u8 port;
u8 addr;
u8 mem_addr_len;
__le32 mem_addr;
__le16 buf_len;
u8 buf[DLN2_I2C_MAX_XFER_SIZE];
} __packed *tx = dln2->buf;
unsigned len;
BUILD_BUG_ON(sizeof(*tx) > DLN2_I2C_BUF_SIZE);
tx->port = dln2->port;
tx->addr = addr;
tx->mem_addr_len = 0;
tx->mem_addr = 0;
tx->buf_len = cpu_to_le16(data_len);
memcpy(tx->buf, data, data_len);
len = sizeof(*tx) + data_len - DLN2_I2C_MAX_XFER_SIZE;
ret = dln2_transfer_tx(dln2->pdev, DLN2_I2C_WRITE, tx, len);
if (ret < 0)
return ret;
return data_len;
}
static int dln2_i2c_read(struct dln2_i2c *dln2, u16 addr, u8 *data,
u16 data_len)
{
int ret;
struct {
u8 port;
u8 addr;
u8 mem_addr_len;
__le32 mem_addr;
__le16 buf_len;
} __packed tx;
struct {
__le16 buf_len;
u8 buf[DLN2_I2C_MAX_XFER_SIZE];
} __packed *rx = dln2->buf;
unsigned rx_len = sizeof(*rx);
BUILD_BUG_ON(sizeof(*rx) > DLN2_I2C_BUF_SIZE);
tx.port = dln2->port;
tx.addr = addr;
tx.mem_addr_len = 0;
tx.mem_addr = 0;
tx.buf_len = cpu_to_le16(data_len);
ret = dln2_transfer(dln2->pdev, DLN2_I2C_READ, &tx, sizeof(tx),
rx, &rx_len);
if (ret < 0)
return ret;
if (rx_len < sizeof(rx->buf_len) + data_len)
return -EPROTO;
if (le16_to_cpu(rx->buf_len) != data_len)
return -EPROTO;
memcpy(data, rx->buf, data_len);
return data_len;
}
static int dln2_i2c_xfer(struct i2c_adapter *adapter,
struct i2c_msg *msgs, int num)
{
struct dln2_i2c *dln2 = i2c_get_adapdata(adapter);
struct i2c_msg *pmsg;
int i;
for (i = 0; i < num; i++) {
int ret;
pmsg = &msgs[i];
if (pmsg->flags & I2C_M_RD) {
ret = dln2_i2c_read(dln2, pmsg->addr, pmsg->buf,
pmsg->len);
if (ret < 0)
return ret;
pmsg->len = ret;
} else {
ret = dln2_i2c_write(dln2, pmsg->addr, pmsg->buf,
pmsg->len);
if (ret != pmsg->len)
return -EPROTO;
}
}
return num;
}
static u32 dln2_i2c_func(struct i2c_adapter *a)
{
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_BYTE | I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
I2C_FUNC_SMBUS_I2C_BLOCK;
}
static const struct i2c_algorithm dln2_i2c_usb_algorithm = {
.master_xfer = dln2_i2c_xfer,
.functionality = dln2_i2c_func,
};
static struct i2c_adapter_quirks dln2_i2c_quirks = {
.max_read_len = DLN2_I2C_MAX_XFER_SIZE,
.max_write_len = DLN2_I2C_MAX_XFER_SIZE,
};
static int dln2_i2c_probe(struct platform_device *pdev)
{
int ret;
struct dln2_i2c *dln2;
struct device *dev = &pdev->dev;
struct dln2_platform_data *pdata = dev_get_platdata(&pdev->dev);
dln2 = devm_kzalloc(dev, sizeof(*dln2), GFP_KERNEL);
if (!dln2)
return -ENOMEM;
dln2->buf = devm_kmalloc(dev, DLN2_I2C_BUF_SIZE, GFP_KERNEL);
if (!dln2->buf)
return -ENOMEM;
dln2->pdev = pdev;
dln2->port = pdata->port;
/* setup i2c adapter description */
dln2->adapter.owner = THIS_MODULE;
dln2->adapter.class = I2C_CLASS_HWMON;
dln2->adapter.algo = &dln2_i2c_usb_algorithm;
dln2->adapter.quirks = &dln2_i2c_quirks;
dln2->adapter.dev.parent = dev;
dln2->adapter.dev.of_node = dev->of_node;
i2c_set_adapdata(&dln2->adapter, dln2);
snprintf(dln2->adapter.name, sizeof(dln2->adapter.name), "%s-%s-%d",
"dln2-i2c", dev_name(pdev->dev.parent), dln2->port);
platform_set_drvdata(pdev, dln2);
/* initialize the i2c interface */
ret = dln2_i2c_enable(dln2, true);
if (ret < 0) {
dev_err(dev, "failed to initialize adapter: %d\n", ret);
return ret;
}
/* and finally attach to i2c layer */
ret = i2c_add_adapter(&dln2->adapter);
if (ret < 0) {
dev_err(dev, "failed to add I2C adapter: %d\n", ret);
goto out_disable;
}
return 0;
out_disable:
dln2_i2c_enable(dln2, false);
return ret;
}
static int dln2_i2c_remove(struct platform_device *pdev)
{
struct dln2_i2c *dln2 = platform_get_drvdata(pdev);
i2c_del_adapter(&dln2->adapter);
dln2_i2c_enable(dln2, false);
return 0;
}
static struct platform_driver dln2_i2c_driver = {
.driver.name = "dln2-i2c",
.probe = dln2_i2c_probe,
.remove = dln2_i2c_remove,
};
module_platform_driver(dln2_i2c_driver);
MODULE_AUTHOR("Laurentiu Palcu <laurentiu.palcu@intel.com>");
MODULE_DESCRIPTION("Driver for the Diolan DLN2 I2C master interface");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:dln2-i2c");
| gpl-2.0 |
greguu/linux-3.11.3-borzoi | fs/cifs/cifs_unicode.c | 1108 | 11423 | /*
* fs/cifs/cifs_unicode.c
*
* Copyright (c) International Business Machines Corp., 2000,2009
* Modified by Steve French (sfrench@us.ibm.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
* the GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/fs.h>
#include <linux/slab.h>
#include "cifs_unicode.h"
#include "cifs_uniupr.h"
#include "cifspdu.h"
#include "cifsglob.h"
#include "cifs_debug.h"
/*
* cifs_utf16_bytes - how long will a string be after conversion?
* @utf16 - pointer to input string
* @maxbytes - don't go past this many bytes of input string
* @codepage - destination codepage
*
* Walk a utf16le string and return the number of bytes that the string will
* be after being converted to the given charset, not including any null
* termination required. Don't walk past maxbytes in the source buffer.
*/
int
cifs_utf16_bytes(const __le16 *from, int maxbytes,
const struct nls_table *codepage)
{
int i;
int charlen, outlen = 0;
int maxwords = maxbytes / 2;
char tmp[NLS_MAX_CHARSET_SIZE];
__u16 ftmp;
for (i = 0; i < maxwords; i++) {
ftmp = get_unaligned_le16(&from[i]);
if (ftmp == 0)
break;
charlen = codepage->uni2char(ftmp, tmp, NLS_MAX_CHARSET_SIZE);
if (charlen > 0)
outlen += charlen;
else
outlen++;
}
return outlen;
}
/*
* cifs_mapchar - convert a host-endian char to proper char in codepage
* @target - where converted character should be copied
* @src_char - 2 byte host-endian source character
* @cp - codepage to which character should be converted
* @mapchar - should character be mapped according to mapchars mount option?
*
* This function handles the conversion of a single character. It is the
* responsibility of the caller to ensure that the target buffer is large
* enough to hold the result of the conversion (at least NLS_MAX_CHARSET_SIZE).
*/
static int
cifs_mapchar(char *target, const __u16 src_char, const struct nls_table *cp,
bool mapchar)
{
int len = 1;
if (!mapchar)
goto cp_convert;
/*
* BB: Cannot handle remapping UNI_SLASH until all the calls to
* build_path_from_dentry are modified, as they use slash as
* separator.
*/
switch (src_char) {
case UNI_COLON:
*target = ':';
break;
case UNI_ASTERISK:
*target = '*';
break;
case UNI_QUESTION:
*target = '?';
break;
case UNI_PIPE:
*target = '|';
break;
case UNI_GRTRTHAN:
*target = '>';
break;
case UNI_LESSTHAN:
*target = '<';
break;
default:
goto cp_convert;
}
out:
return len;
cp_convert:
len = cp->uni2char(src_char, target, NLS_MAX_CHARSET_SIZE);
if (len <= 0) {
*target = '?';
len = 1;
}
goto out;
}
/*
* cifs_from_utf16 - convert utf16le string to local charset
* @to - destination buffer
* @from - source buffer
* @tolen - destination buffer size (in bytes)
* @fromlen - source buffer size (in bytes)
* @codepage - codepage to which characters should be converted
* @mapchar - should characters be remapped according to the mapchars option?
*
* Convert a little-endian utf16le string (as sent by the server) to a string
* in the provided codepage. The tolen and fromlen parameters are to ensure
* that the code doesn't walk off of the end of the buffer (which is always
* a danger if the alignment of the source buffer is off). The destination
* string is always properly null terminated and fits in the destination
* buffer. Returns the length of the destination string in bytes (including
* null terminator).
*
* Note that some windows versions actually send multiword UTF-16 characters
* instead of straight UTF16-2. The linux nls routines however aren't able to
* deal with those characters properly. In the event that we get some of
* those characters, they won't be translated properly.
*/
int
cifs_from_utf16(char *to, const __le16 *from, int tolen, int fromlen,
const struct nls_table *codepage, bool mapchar)
{
int i, charlen, safelen;
int outlen = 0;
int nullsize = nls_nullsize(codepage);
int fromwords = fromlen / 2;
char tmp[NLS_MAX_CHARSET_SIZE];
__u16 ftmp;
/*
* because the chars can be of varying widths, we need to take care
* not to overflow the destination buffer when we get close to the
* end of it. Until we get to this offset, we don't need to check
* for overflow however.
*/
safelen = tolen - (NLS_MAX_CHARSET_SIZE + nullsize);
for (i = 0; i < fromwords; i++) {
ftmp = get_unaligned_le16(&from[i]);
if (ftmp == 0)
break;
/*
* check to see if converting this character might make the
* conversion bleed into the null terminator
*/
if (outlen >= safelen) {
charlen = cifs_mapchar(tmp, ftmp, codepage, mapchar);
if ((outlen + charlen) > (tolen - nullsize))
break;
}
/* put converted char into 'to' buffer */
charlen = cifs_mapchar(&to[outlen], ftmp, codepage, mapchar);
outlen += charlen;
}
/* properly null-terminate string */
for (i = 0; i < nullsize; i++)
to[outlen++] = 0;
return outlen;
}
/*
* NAME: cifs_strtoUTF16()
*
* FUNCTION: Convert character string to unicode string
*
*/
int
cifs_strtoUTF16(__le16 *to, const char *from, int len,
const struct nls_table *codepage)
{
int charlen;
int i;
wchar_t wchar_to; /* needed to quiet sparse */
/* special case for utf8 to handle no plane0 chars */
if (!strcmp(codepage->charset, "utf8")) {
/*
* convert utf8 -> utf16, we assume we have enough space
* as caller should have assumed conversion does not overflow
* in destination len is length in wchar_t units (16bits)
*/
i = utf8s_to_utf16s(from, len, UTF16_LITTLE_ENDIAN,
(wchar_t *) to, len);
/* if success terminate and exit */
if (i >= 0)
goto success;
/*
* if fails fall back to UCS encoding as this
* function should not return negative values
* currently can fail only if source contains
* invalid encoded characters
*/
}
for (i = 0; len && *from; i++, from += charlen, len -= charlen) {
charlen = codepage->char2uni(from, len, &wchar_to);
if (charlen < 1) {
cifs_dbg(VFS, "strtoUTF16: char2uni of 0x%x returned %d\n",
*from, charlen);
/* A question mark */
wchar_to = 0x003f;
charlen = 1;
}
put_unaligned_le16(wchar_to, &to[i]);
}
success:
put_unaligned_le16(0, &to[i]);
return i;
}
/*
* cifs_strndup_from_utf16 - copy a string from wire format to the local
* codepage
* @src - source string
* @maxlen - don't walk past this many bytes in the source string
* @is_unicode - is this a unicode string?
* @codepage - destination codepage
*
* Take a string given by the server, convert it to the local codepage and
* put it in a new buffer. Returns a pointer to the new string or NULL on
* error.
*/
char *
cifs_strndup_from_utf16(const char *src, const int maxlen,
const bool is_unicode, const struct nls_table *codepage)
{
int len;
char *dst;
if (is_unicode) {
len = cifs_utf16_bytes((__le16 *) src, maxlen, codepage);
len += nls_nullsize(codepage);
dst = kmalloc(len, GFP_KERNEL);
if (!dst)
return NULL;
cifs_from_utf16(dst, (__le16 *) src, len, maxlen, codepage,
false);
} else {
len = strnlen(src, maxlen);
len++;
dst = kmalloc(len, GFP_KERNEL);
if (!dst)
return NULL;
strlcpy(dst, src, len);
}
return dst;
}
/*
* Convert 16 bit Unicode pathname to wire format from string in current code
* page. Conversion may involve remapping up the six characters that are
* only legal in POSIX-like OS (if they are present in the string). Path
* names are little endian 16 bit Unicode on the wire
*/
int
cifsConvertToUTF16(__le16 *target, const char *source, int srclen,
const struct nls_table *cp, int mapChars)
{
int i, j, charlen;
char src_char;
__le16 dst_char;
wchar_t tmp;
if (!mapChars)
return cifs_strtoUTF16(target, source, PATH_MAX, cp);
for (i = 0, j = 0; i < srclen; j++) {
src_char = source[i];
charlen = 1;
switch (src_char) {
case 0:
put_unaligned(0, &target[j]);
goto ctoUTF16_out;
case ':':
dst_char = cpu_to_le16(UNI_COLON);
break;
case '*':
dst_char = cpu_to_le16(UNI_ASTERISK);
break;
case '?':
dst_char = cpu_to_le16(UNI_QUESTION);
break;
case '<':
dst_char = cpu_to_le16(UNI_LESSTHAN);
break;
case '>':
dst_char = cpu_to_le16(UNI_GRTRTHAN);
break;
case '|':
dst_char = cpu_to_le16(UNI_PIPE);
break;
/*
* FIXME: We can not handle remapping backslash (UNI_SLASH)
* until all the calls to build_path_from_dentry are modified,
* as they use backslash as separator.
*/
default:
charlen = cp->char2uni(source + i, srclen - i, &tmp);
dst_char = cpu_to_le16(tmp);
/*
* if no match, use question mark, which at least in
* some cases serves as wild card
*/
if (charlen < 1) {
dst_char = cpu_to_le16(0x003f);
charlen = 1;
}
}
/*
* character may take more than one byte in the source string,
* but will take exactly two bytes in the target string
*/
i += charlen;
put_unaligned(dst_char, &target[j]);
}
ctoUTF16_out:
return j;
}
#ifdef CONFIG_CIFS_SMB2
/*
* cifs_local_to_utf16_bytes - how long will a string be after conversion?
* @from - pointer to input string
* @maxbytes - don't go past this many bytes of input string
* @codepage - source codepage
*
* Walk a string and return the number of bytes that the string will
* be after being converted to the given charset, not including any null
* termination required. Don't walk past maxbytes in the source buffer.
*/
static int
cifs_local_to_utf16_bytes(const char *from, int len,
const struct nls_table *codepage)
{
int charlen;
int i;
wchar_t wchar_to;
for (i = 0; len && *from; i++, from += charlen, len -= charlen) {
charlen = codepage->char2uni(from, len, &wchar_to);
/* Failed conversion defaults to a question mark */
if (charlen < 1)
charlen = 1;
}
return 2 * i; /* UTF16 characters are two bytes */
}
/*
* cifs_strndup_to_utf16 - copy a string to wire format from the local codepage
* @src - source string
* @maxlen - don't walk past this many bytes in the source string
* @utf16_len - the length of the allocated string in bytes (including null)
* @cp - source codepage
* @remap - map special chars
*
* Take a string convert it from the local codepage to UTF16 and
* put it in a new buffer. Returns a pointer to the new string or NULL on
* error.
*/
__le16 *
cifs_strndup_to_utf16(const char *src, const int maxlen, int *utf16_len,
const struct nls_table *cp, int remap)
{
int len;
__le16 *dst;
len = cifs_local_to_utf16_bytes(src, maxlen, cp);
len += 2; /* NULL */
dst = kmalloc(len, GFP_KERNEL);
if (!dst) {
*utf16_len = 0;
return NULL;
}
cifsConvertToUTF16(dst, src, strlen(src), cp, remap);
*utf16_len = len;
return dst;
}
#endif /* CONFIG_CIFS_SMB2 */
| gpl-2.0 |
0xD34D/kernel_omap | drivers/mtd/cmdlinepart.c | 1364 | 9405 | /*
* Read flash partition table from command line
*
* Copyright 2002 SYSGO Real-Time Solutions GmbH
*
* The format for the command line is as follows:
*
* mtdparts=<mtddef>[;<mtddef]
* <mtddef> := <mtd-id>:<partdef>[,<partdef>]
* where <mtd-id> is the name from the "cat /proc/mtd" command
* <partdef> := <size>[@offset][<name>][ro][lk]
* <mtd-id> := unique name used in mapping driver/device (mtd->name)
* <size> := standard linux memsize OR "-" to denote all remaining space
* <name> := '(' NAME ')'
*
* Examples:
*
* 1 NOR Flash, with 1 single writable partition:
* edb7312-nor:-
*
* 1 NOR Flash with 2 partitions, 1 NAND with one
* edb7312-nor:256k(ARMboot)ro,-(root);edb7312-nand:-(home)
*/
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/bootmem.h>
/* error message prefix */
#define ERRP "mtd: "
/* debug macro */
#if 0
#define dbg(x) do { printk("DEBUG-CMDLINE-PART: "); printk x; } while(0)
#else
#define dbg(x)
#endif
/* special size referring to all the remaining space in a partition */
#define SIZE_REMAINING UINT_MAX
#define OFFSET_CONTINUOUS UINT_MAX
struct cmdline_mtd_partition {
struct cmdline_mtd_partition *next;
char *mtd_id;
int num_parts;
struct mtd_partition *parts;
};
/* mtdpart_setup() parses into here */
static struct cmdline_mtd_partition *partitions;
/* the command line passed to mtdpart_setupd() */
static char *cmdline;
static int cmdline_parsed = 0;
/*
* Parse one partition definition for an MTD. Since there can be many
* comma separated partition definitions, this function calls itself
* recursively until no more partition definitions are found. Nice side
* effect: the memory to keep the mtd_partition structs and the names
* is allocated upon the last definition being found. At that point the
* syntax has been verified ok.
*/
static struct mtd_partition * newpart(char *s,
char **retptr,
int *num_parts,
int this_part,
unsigned char **extra_mem_ptr,
int extra_mem_size)
{
struct mtd_partition *parts;
unsigned long size;
unsigned long offset = OFFSET_CONTINUOUS;
char *name;
int name_len;
unsigned char *extra_mem;
char delim;
unsigned int mask_flags;
/* fetch the partition size */
if (*s == '-')
{ /* assign all remaining space to this partition */
size = SIZE_REMAINING;
s++;
}
else
{
size = memparse(s, &s);
if (size < PAGE_SIZE)
{
printk(KERN_ERR ERRP "partition size too small (%lx)\n", size);
return NULL;
}
}
/* fetch partition name and flags */
mask_flags = 0; /* this is going to be a regular partition */
delim = 0;
/* check for offset */
if (*s == '@')
{
s++;
offset = memparse(s, &s);
}
/* now look for name */
if (*s == '(')
{
delim = ')';
}
if (delim)
{
char *p;
name = ++s;
p = strchr(name, delim);
if (!p)
{
printk(KERN_ERR ERRP "no closing %c found in partition name\n", delim);
return NULL;
}
name_len = p - name;
s = p + 1;
}
else
{
name = NULL;
name_len = 13; /* Partition_000 */
}
/* record name length for memory allocation later */
extra_mem_size += name_len + 1;
/* test for options */
if (strncmp(s, "ro", 2) == 0)
{
mask_flags |= MTD_WRITEABLE;
s += 2;
}
/* if lk is found do NOT unlock the MTD partition*/
if (strncmp(s, "lk", 2) == 0)
{
mask_flags |= MTD_POWERUP_LOCK;
s += 2;
}
/* test if more partitions are following */
if (*s == ',')
{
if (size == SIZE_REMAINING)
{
printk(KERN_ERR ERRP "no partitions allowed after a fill-up partition\n");
return NULL;
}
/* more partitions follow, parse them */
parts = newpart(s + 1, &s, num_parts, this_part + 1,
&extra_mem, extra_mem_size);
if (!parts)
return NULL;
}
else
{ /* this is the last partition: allocate space for all */
int alloc_size;
*num_parts = this_part + 1;
alloc_size = *num_parts * sizeof(struct mtd_partition) +
extra_mem_size;
parts = kzalloc(alloc_size, GFP_KERNEL);
if (!parts)
{
printk(KERN_ERR ERRP "out of memory\n");
return NULL;
}
extra_mem = (unsigned char *)(parts + *num_parts);
}
/* enter this partition (offset will be calculated later if it is zero at this point) */
parts[this_part].size = size;
parts[this_part].offset = offset;
parts[this_part].mask_flags = mask_flags;
if (name)
{
strlcpy(extra_mem, name, name_len + 1);
}
else
{
sprintf(extra_mem, "Partition_%03d", this_part);
}
parts[this_part].name = extra_mem;
extra_mem += name_len + 1;
dbg(("partition %d: name <%s>, offset %llx, size %llx, mask flags %x\n",
this_part,
parts[this_part].name,
parts[this_part].offset,
parts[this_part].size,
parts[this_part].mask_flags));
/* return (updated) pointer to extra_mem memory */
if (extra_mem_ptr)
*extra_mem_ptr = extra_mem;
/* return (updated) pointer command line string */
*retptr = s;
/* return partition table */
return parts;
}
/*
* Parse the command line.
*/
static int mtdpart_setup_real(char *s)
{
cmdline_parsed = 1;
for( ; s != NULL; )
{
struct cmdline_mtd_partition *this_mtd;
struct mtd_partition *parts;
int mtd_id_len;
int num_parts;
char *p, *mtd_id;
mtd_id = s;
/* fetch <mtd-id> */
if (!(p = strchr(s, ':')))
{
printk(KERN_ERR ERRP "no mtd-id\n");
return 0;
}
mtd_id_len = p - mtd_id;
dbg(("parsing <%s>\n", p+1));
/*
* parse one mtd. have it reserve memory for the
* struct cmdline_mtd_partition and the mtd-id string.
*/
parts = newpart(p + 1, /* cmdline */
&s, /* out: updated cmdline ptr */
&num_parts, /* out: number of parts */
0, /* first partition */
(unsigned char**)&this_mtd, /* out: extra mem */
mtd_id_len + 1 + sizeof(*this_mtd) +
sizeof(void*)-1 /*alignment*/);
if(!parts)
{
/*
* An error occurred. We're either:
* a) out of memory, or
* b) in the middle of the partition spec
* Either way, this mtd is hosed and we're
* unlikely to succeed in parsing any more
*/
return 0;
}
/* align this_mtd */
this_mtd = (struct cmdline_mtd_partition *)
ALIGN((unsigned long)this_mtd, sizeof(void*));
/* enter results */
this_mtd->parts = parts;
this_mtd->num_parts = num_parts;
this_mtd->mtd_id = (char*)(this_mtd + 1);
strlcpy(this_mtd->mtd_id, mtd_id, mtd_id_len + 1);
/* link into chain */
this_mtd->next = partitions;
partitions = this_mtd;
dbg(("mtdid=<%s> num_parts=<%d>\n",
this_mtd->mtd_id, this_mtd->num_parts));
/* EOS - we're done */
if (*s == 0)
break;
/* does another spec follow? */
if (*s != ';')
{
printk(KERN_ERR ERRP "bad character after partition (%c)\n", *s);
return 0;
}
s++;
}
return 1;
}
/*
* Main function to be called from the MTD mapping driver/device to
* obtain the partitioning information. At this point the command line
* arguments will actually be parsed and turned to struct mtd_partition
* information. It returns partitions for the requested mtd device, or
* the first one in the chain if a NULL mtd_id is passed in.
*/
static int parse_cmdline_partitions(struct mtd_info *master,
struct mtd_partition **pparts,
unsigned long origin)
{
unsigned long offset;
int i;
struct cmdline_mtd_partition *part;
const char *mtd_id = master->name;
/* parse command line */
if (!cmdline_parsed)
mtdpart_setup_real(cmdline);
for(part = partitions; part; part = part->next)
{
if ((!mtd_id) || (!strcmp(part->mtd_id, mtd_id)))
{
for(i = 0, offset = 0; i < part->num_parts; i++)
{
if (part->parts[i].offset == OFFSET_CONTINUOUS)
part->parts[i].offset = offset;
else
offset = part->parts[i].offset;
if (part->parts[i].size == SIZE_REMAINING)
part->parts[i].size = master->size - offset;
if (offset + part->parts[i].size > master->size)
{
printk(KERN_WARNING ERRP
"%s: partitioning exceeds flash size, truncating\n",
part->mtd_id);
part->parts[i].size = master->size - offset;
part->num_parts = i;
}
offset += part->parts[i].size;
}
*pparts = kmemdup(part->parts,
sizeof(*part->parts) * part->num_parts,
GFP_KERNEL);
if (!*pparts)
return -ENOMEM;
return part->num_parts;
}
}
return 0;
}
/*
* This is the handler for our kernel parameter, called from
* main.c::checksetup(). Note that we can not yet kmalloc() anything,
* so we only save the commandline for later processing.
*
* This function needs to be visible for bootloaders.
*/
static int mtdpart_setup(char *s)
{
cmdline = s;
return 1;
}
__setup("mtdparts=", mtdpart_setup);
static struct mtd_part_parser cmdline_parser = {
.owner = THIS_MODULE,
.parse_fn = parse_cmdline_partitions,
.name = "cmdlinepart",
};
static int __init cmdline_parser_init(void)
{
return register_mtd_parser(&cmdline_parser);
}
module_init(cmdline_parser_init);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Marius Groeger <mag@sysgo.de>");
MODULE_DESCRIPTION("Command line configuration of MTD partitions");
| gpl-2.0 |
t0mm13b/CAF-Zte-Blade-Android-MSM-2.6.35 | arch/mips/dec/kn02-irq.c | 1620 | 1879 | /*
* DECstation 5000/200 (KN02) Control and Status Register
* interrupts.
*
* Copyright (c) 2002, 2003, 2005 Maciej W. Rozycki
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/types.h>
#include <asm/dec/kn02.h>
/*
* Bits 7:0 of the Control Register are write-only -- the
* corresponding bits of the Status Register have a different
* meaning. Hence we use a cache. It speeds up things a bit
* as well.
*
* There is no default value -- it has to be initialized.
*/
u32 cached_kn02_csr;
static int kn02_irq_base;
static inline void unmask_kn02_irq(unsigned int irq)
{
volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
KN02_CSR);
cached_kn02_csr |= (1 << (irq - kn02_irq_base + 16));
*csr = cached_kn02_csr;
}
static inline void mask_kn02_irq(unsigned int irq)
{
volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
KN02_CSR);
cached_kn02_csr &= ~(1 << (irq - kn02_irq_base + 16));
*csr = cached_kn02_csr;
}
static void ack_kn02_irq(unsigned int irq)
{
mask_kn02_irq(irq);
iob();
}
static struct irq_chip kn02_irq_type = {
.name = "KN02-CSR",
.ack = ack_kn02_irq,
.mask = mask_kn02_irq,
.mask_ack = ack_kn02_irq,
.unmask = unmask_kn02_irq,
};
void __init init_kn02_irqs(int base)
{
volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
KN02_CSR);
int i;
/* Mask interrupts. */
cached_kn02_csr &= ~KN02_CSR_IOINTEN;
*csr = cached_kn02_csr;
iob();
for (i = base; i < base + KN02_IRQ_LINES; i++)
set_irq_chip_and_handler(i, &kn02_irq_type, handle_level_irq);
kn02_irq_base = base;
}
| gpl-2.0 |
sunkeqin/linux-3.19 | net/sched/em_canid.c | 1876 | 5671 | /*
* em_canid.c Ematch rule to match CAN frames according to their CAN IDs
*
* This program is free software; you can distribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* Idea: Oliver Hartkopp <oliver.hartkopp@volkswagen.de>
* Copyright: (c) 2011 Czech Technical University in Prague
* (c) 2011 Volkswagen Group Research
* Authors: Michal Sojka <sojkam1@fel.cvut.cz>
* Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Rostislav Lisovy <lisovy@gmail.cz>
* Funded by: Volkswagen Group Research
*/
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/skbuff.h>
#include <net/pkt_cls.h>
#include <linux/can.h>
#define EM_CAN_RULES_MAX 500
struct canid_match {
/* For each SFF CAN ID (11 bit) there is one record in this bitfield */
DECLARE_BITMAP(match_sff, (1 << CAN_SFF_ID_BITS));
int rules_count;
int sff_rules_count;
int eff_rules_count;
/*
* Raw rules copied from netlink message; Used for sending
* information to userspace (when 'tc filter show' is invoked)
* AND when matching EFF frames
*/
struct can_filter rules_raw[];
};
/**
* em_canid_get_id() - Extracts Can ID out of the sk_buff structure.
*/
static canid_t em_canid_get_id(struct sk_buff *skb)
{
/* CAN ID is stored within the data field */
struct can_frame *cf = (struct can_frame *)skb->data;
return cf->can_id;
}
static void em_canid_sff_match_add(struct canid_match *cm, u32 can_id,
u32 can_mask)
{
int i;
/*
* Limit can_mask and can_id to SFF range to
* protect against write after end of array
*/
can_mask &= CAN_SFF_MASK;
can_id &= can_mask;
/* Single frame */
if (can_mask == CAN_SFF_MASK) {
set_bit(can_id, cm->match_sff);
return;
}
/* All frames */
if (can_mask == 0) {
bitmap_fill(cm->match_sff, (1 << CAN_SFF_ID_BITS));
return;
}
/*
* Individual frame filter.
* Add record (set bit to 1) for each ID that
* conforms particular rule
*/
for (i = 0; i < (1 << CAN_SFF_ID_BITS); i++) {
if ((i & can_mask) == can_id)
set_bit(i, cm->match_sff);
}
}
static inline struct canid_match *em_canid_priv(struct tcf_ematch *m)
{
return (struct canid_match *)m->data;
}
static int em_canid_match(struct sk_buff *skb, struct tcf_ematch *m,
struct tcf_pkt_info *info)
{
struct canid_match *cm = em_canid_priv(m);
canid_t can_id;
int match = 0;
int i;
const struct can_filter *lp;
can_id = em_canid_get_id(skb);
if (can_id & CAN_EFF_FLAG) {
for (i = 0, lp = cm->rules_raw;
i < cm->eff_rules_count; i++, lp++) {
if (!(((lp->can_id ^ can_id) & lp->can_mask))) {
match = 1;
break;
}
}
} else { /* SFF */
can_id &= CAN_SFF_MASK;
match = (test_bit(can_id, cm->match_sff) ? 1 : 0);
}
return match;
}
static int em_canid_change(struct net *net, void *data, int len,
struct tcf_ematch *m)
{
struct can_filter *conf = data; /* Array with rules */
struct canid_match *cm;
int i;
if (!len)
return -EINVAL;
if (len % sizeof(struct can_filter))
return -EINVAL;
if (len > sizeof(struct can_filter) * EM_CAN_RULES_MAX)
return -EINVAL;
cm = kzalloc(sizeof(struct canid_match) + len, GFP_KERNEL);
if (!cm)
return -ENOMEM;
cm->rules_count = len / sizeof(struct can_filter);
/*
* We need two for() loops for copying rules into two contiguous
* areas in rules_raw to process all eff rules with a simple loop.
* NB: The configuration interface supports sff and eff rules.
* We do not support filters here that match for the same can_id
* provided in a SFF and EFF frame (e.g. 0x123 / 0x80000123).
* For this (unusual case) two filters have to be specified. The
* SFF/EFF separation is done with the CAN_EFF_FLAG in the can_id.
*/
/* Fill rules_raw with EFF rules first */
for (i = 0; i < cm->rules_count; i++) {
if (conf[i].can_id & CAN_EFF_FLAG) {
memcpy(cm->rules_raw + cm->eff_rules_count,
&conf[i],
sizeof(struct can_filter));
cm->eff_rules_count++;
}
}
/* append SFF frame rules */
for (i = 0; i < cm->rules_count; i++) {
if (!(conf[i].can_id & CAN_EFF_FLAG)) {
memcpy(cm->rules_raw
+ cm->eff_rules_count
+ cm->sff_rules_count,
&conf[i], sizeof(struct can_filter));
cm->sff_rules_count++;
em_canid_sff_match_add(cm,
conf[i].can_id, conf[i].can_mask);
}
}
m->datalen = sizeof(struct canid_match) + len;
m->data = (unsigned long)cm;
return 0;
}
static void em_canid_destroy(struct tcf_ematch *m)
{
struct canid_match *cm = em_canid_priv(m);
kfree(cm);
}
static int em_canid_dump(struct sk_buff *skb, struct tcf_ematch *m)
{
struct canid_match *cm = em_canid_priv(m);
/*
* When configuring this ematch 'rules_count' is set not to exceed
* 'rules_raw' array size
*/
if (nla_put_nohdr(skb, sizeof(struct can_filter) * cm->rules_count,
&cm->rules_raw) < 0)
return -EMSGSIZE;
return 0;
}
static struct tcf_ematch_ops em_canid_ops = {
.kind = TCF_EM_CANID,
.change = em_canid_change,
.match = em_canid_match,
.destroy = em_canid_destroy,
.dump = em_canid_dump,
.owner = THIS_MODULE,
.link = LIST_HEAD_INIT(em_canid_ops.link)
};
static int __init init_em_canid(void)
{
return tcf_em_register(&em_canid_ops);
}
static void __exit exit_em_canid(void)
{
tcf_em_unregister(&em_canid_ops);
}
MODULE_LICENSE("GPL");
module_init(init_em_canid);
module_exit(exit_em_canid);
MODULE_ALIAS_TCF_EMATCH(TCF_EM_CANID);
| gpl-2.0 |
Pafcholini/android_kernel_c8690 | arch/arm/mach-omap2/powerdomains44xx_data.c | 2132 | 10137 | /*
* OMAP4 Power domains framework
*
* Copyright (C) 2009-2010 Texas Instruments, Inc.
* Copyright (C) 2009-2011 Nokia Corporation
*
* Abhijit Pagare (abhijitpagare@ti.com)
* Benoit Cousson (b-cousson@ti.com)
* Paul Walmsley (paul@pwsan.com)
*
* This file is automatically generated from the OMAP hardware databases.
* We respectfully ask that any modifications to this file be coordinated
* with the public linux-omap@vger.kernel.org mailing list and the
* authors above to ensure that the autogeneration scripts are kept
* up-to-date with the file contents.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include "powerdomain.h"
#include "prcm-common.h"
#include "prcm44xx.h"
#include "prm-regbits-44xx.h"
#include "prm44xx.h"
#include "prcm_mpu44xx.h"
/* core_44xx_pwrdm: CORE power domain */
static struct powerdomain core_44xx_pwrdm = {
.name = "core_pwrdm",
.prcm_offs = OMAP4430_PRM_CORE_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
.banks = 5,
.pwrsts_mem_ret = {
[0] = PWRSTS_OFF, /* core_nret_bank */
[1] = PWRSTS_OFF_RET, /* core_ocmram */
[2] = PWRSTS_RET, /* core_other_bank */
[3] = PWRSTS_OFF_RET, /* ducati_l2ram */
[4] = PWRSTS_OFF_RET, /* ducati_unicache */
},
.pwrsts_mem_on = {
[0] = PWRSTS_ON, /* core_nret_bank */
[1] = PWRSTS_OFF_RET, /* core_ocmram */
[2] = PWRSTS_ON, /* core_other_bank */
[3] = PWRSTS_ON, /* ducati_l2ram */
[4] = PWRSTS_ON, /* ducati_unicache */
},
.flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
};
/* gfx_44xx_pwrdm: 3D accelerator power domain */
static struct powerdomain gfx_44xx_pwrdm = {
.name = "gfx_pwrdm",
.prcm_offs = OMAP4430_PRM_GFX_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_ON,
.banks = 1,
.pwrsts_mem_ret = {
[0] = PWRSTS_OFF, /* gfx_mem */
},
.pwrsts_mem_on = {
[0] = PWRSTS_ON, /* gfx_mem */
},
.flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
};
/* abe_44xx_pwrdm: Audio back end power domain */
static struct powerdomain abe_44xx_pwrdm = {
.name = "abe_pwrdm",
.prcm_offs = OMAP4430_PRM_ABE_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF,
.banks = 2,
.pwrsts_mem_ret = {
[0] = PWRSTS_RET, /* aessmem */
[1] = PWRSTS_OFF, /* periphmem */
},
.pwrsts_mem_on = {
[0] = PWRSTS_ON, /* aessmem */
[1] = PWRSTS_ON, /* periphmem */
},
.flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
};
/* dss_44xx_pwrdm: Display subsystem power domain */
static struct powerdomain dss_44xx_pwrdm = {
.name = "dss_pwrdm",
.prcm_offs = OMAP4430_PRM_DSS_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF,
.banks = 1,
.pwrsts_mem_ret = {
[0] = PWRSTS_OFF, /* dss_mem */
},
.pwrsts_mem_on = {
[0] = PWRSTS_ON, /* dss_mem */
},
.flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
};
/* tesla_44xx_pwrdm: Tesla processor power domain */
static struct powerdomain tesla_44xx_pwrdm = {
.name = "tesla_pwrdm",
.prcm_offs = OMAP4430_PRM_TESLA_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
.banks = 3,
.pwrsts_mem_ret = {
[0] = PWRSTS_RET, /* tesla_edma */
[1] = PWRSTS_OFF_RET, /* tesla_l1 */
[2] = PWRSTS_OFF_RET, /* tesla_l2 */
},
.pwrsts_mem_on = {
[0] = PWRSTS_ON, /* tesla_edma */
[1] = PWRSTS_ON, /* tesla_l1 */
[2] = PWRSTS_ON, /* tesla_l2 */
},
.flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
};
/* wkup_44xx_pwrdm: Wake-up power domain */
static struct powerdomain wkup_44xx_pwrdm = {
.name = "wkup_pwrdm",
.prcm_offs = OMAP4430_PRM_WKUP_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_ON,
.banks = 1,
.pwrsts_mem_ret = {
[0] = PWRSTS_OFF, /* wkup_bank */
},
.pwrsts_mem_on = {
[0] = PWRSTS_ON, /* wkup_bank */
},
};
/* cpu0_44xx_pwrdm: MPU0 processor and Neon coprocessor power domain */
static struct powerdomain cpu0_44xx_pwrdm = {
.name = "cpu0_pwrdm",
.prcm_offs = OMAP4430_PRCM_MPU_CPU0_INST,
.prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
.banks = 1,
.pwrsts_mem_ret = {
[0] = PWRSTS_OFF_RET, /* cpu0_l1 */
},
.pwrsts_mem_on = {
[0] = PWRSTS_ON, /* cpu0_l1 */
},
};
/* cpu1_44xx_pwrdm: MPU1 processor and Neon coprocessor power domain */
static struct powerdomain cpu1_44xx_pwrdm = {
.name = "cpu1_pwrdm",
.prcm_offs = OMAP4430_PRCM_MPU_CPU1_INST,
.prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
.banks = 1,
.pwrsts_mem_ret = {
[0] = PWRSTS_OFF_RET, /* cpu1_l1 */
},
.pwrsts_mem_on = {
[0] = PWRSTS_ON, /* cpu1_l1 */
},
};
/* emu_44xx_pwrdm: Emulation power domain */
static struct powerdomain emu_44xx_pwrdm = {
.name = "emu_pwrdm",
.prcm_offs = OMAP4430_PRM_EMU_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_ON,
.banks = 1,
.pwrsts_mem_ret = {
[0] = PWRSTS_OFF, /* emu_bank */
},
.pwrsts_mem_on = {
[0] = PWRSTS_ON, /* emu_bank */
},
};
/* mpu_44xx_pwrdm: Modena processor and the Neon coprocessor power domain */
static struct powerdomain mpu_44xx_pwrdm = {
.name = "mpu_pwrdm",
.prcm_offs = OMAP4430_PRM_MPU_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
.banks = 3,
.pwrsts_mem_ret = {
[0] = PWRSTS_OFF_RET, /* mpu_l1 */
[1] = PWRSTS_OFF_RET, /* mpu_l2 */
[2] = PWRSTS_RET, /* mpu_ram */
},
.pwrsts_mem_on = {
[0] = PWRSTS_ON, /* mpu_l1 */
[1] = PWRSTS_ON, /* mpu_l2 */
[2] = PWRSTS_ON, /* mpu_ram */
},
};
/* ivahd_44xx_pwrdm: IVA-HD power domain */
static struct powerdomain ivahd_44xx_pwrdm = {
.name = "ivahd_pwrdm",
.prcm_offs = OMAP4430_PRM_IVAHD_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF,
.banks = 4,
.pwrsts_mem_ret = {
[0] = PWRSTS_OFF, /* hwa_mem */
[1] = PWRSTS_OFF_RET, /* sl2_mem */
[2] = PWRSTS_OFF_RET, /* tcm1_mem */
[3] = PWRSTS_OFF_RET, /* tcm2_mem */
},
.pwrsts_mem_on = {
[0] = PWRSTS_ON, /* hwa_mem */
[1] = PWRSTS_ON, /* sl2_mem */
[2] = PWRSTS_ON, /* tcm1_mem */
[3] = PWRSTS_ON, /* tcm2_mem */
},
.flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
};
/* cam_44xx_pwrdm: Camera subsystem power domain */
static struct powerdomain cam_44xx_pwrdm = {
.name = "cam_pwrdm",
.prcm_offs = OMAP4430_PRM_CAM_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_ON,
.banks = 1,
.pwrsts_mem_ret = {
[0] = PWRSTS_OFF, /* cam_mem */
},
.pwrsts_mem_on = {
[0] = PWRSTS_ON, /* cam_mem */
},
.flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
};
/* l3init_44xx_pwrdm: L3 initators pheripherals power domain */
static struct powerdomain l3init_44xx_pwrdm = {
.name = "l3init_pwrdm",
.prcm_offs = OMAP4430_PRM_L3INIT_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
.banks = 1,
.pwrsts_mem_ret = {
[0] = PWRSTS_OFF, /* l3init_bank1 */
},
.pwrsts_mem_on = {
[0] = PWRSTS_ON, /* l3init_bank1 */
},
.flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
};
/* l4per_44xx_pwrdm: Target peripherals power domain */
static struct powerdomain l4per_44xx_pwrdm = {
.name = "l4per_pwrdm",
.prcm_offs = OMAP4430_PRM_L4PER_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
.banks = 2,
.pwrsts_mem_ret = {
[0] = PWRSTS_OFF, /* nonretained_bank */
[1] = PWRSTS_RET, /* retained_bank */
},
.pwrsts_mem_on = {
[0] = PWRSTS_ON, /* nonretained_bank */
[1] = PWRSTS_ON, /* retained_bank */
},
.flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
};
/*
* always_on_core_44xx_pwrdm: Always ON logic that sits in VDD_CORE voltage
* domain
*/
static struct powerdomain always_on_core_44xx_pwrdm = {
.name = "always_on_core_pwrdm",
.prcm_offs = OMAP4430_PRM_ALWAYS_ON_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_ON,
};
/* cefuse_44xx_pwrdm: Customer efuse controller power domain */
static struct powerdomain cefuse_44xx_pwrdm = {
.name = "cefuse_pwrdm",
.prcm_offs = OMAP4430_PRM_CEFUSE_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
.pwrsts = PWRSTS_OFF_ON,
};
/*
* The following power domains are not under SW control
*
* always_on_iva
* always_on_mpu
* stdefuse
*/
/* As powerdomains are added or removed above, this list must also be changed */
static struct powerdomain *powerdomains_omap44xx[] __initdata = {
&core_44xx_pwrdm,
&gfx_44xx_pwrdm,
&abe_44xx_pwrdm,
&dss_44xx_pwrdm,
&tesla_44xx_pwrdm,
&wkup_44xx_pwrdm,
&cpu0_44xx_pwrdm,
&cpu1_44xx_pwrdm,
&emu_44xx_pwrdm,
&mpu_44xx_pwrdm,
&ivahd_44xx_pwrdm,
&cam_44xx_pwrdm,
&l3init_44xx_pwrdm,
&l4per_44xx_pwrdm,
&always_on_core_44xx_pwrdm,
&cefuse_44xx_pwrdm,
NULL
};
void __init omap44xx_powerdomains_init(void)
{
pwrdm_init(powerdomains_omap44xx, &omap4_pwrdm_operations);
}
| gpl-2.0 |
bgly/ibmvscsi_tgt | arch/powerpc/kernel/smp-tbsync.c | 2132 | 3112 | /*
* Smp timebase synchronization for ppc.
*
* Copyright (C) 2003 Samuel Rydh (samuel@ibrium.se)
*
*/
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/smp.h>
#include <linux/unistd.h>
#include <linux/slab.h>
#include <linux/atomic.h>
#include <asm/smp.h>
#include <asm/time.h>
#define NUM_ITER 300
enum {
kExit=0, kSetAndTest, kTest
};
static struct {
volatile u64 tb;
volatile u64 mark;
volatile int cmd;
volatile int handshake;
int filler[2];
volatile int ack;
int filler2[7];
volatile int race_result;
} *tbsync;
static volatile int running;
static void enter_contest(u64 mark, long add)
{
while (get_tb() < mark)
tbsync->race_result = add;
}
void smp_generic_take_timebase(void)
{
int cmd;
u64 tb;
unsigned long flags;
local_irq_save(flags);
while (!running)
barrier();
rmb();
for (;;) {
tbsync->ack = 1;
while (!tbsync->handshake)
barrier();
rmb();
cmd = tbsync->cmd;
tb = tbsync->tb;
mb();
tbsync->ack = 0;
if (cmd == kExit)
break;
while (tbsync->handshake)
barrier();
if (cmd == kSetAndTest)
set_tb(tb >> 32, tb & 0xfffffffful);
enter_contest(tbsync->mark, -1);
}
local_irq_restore(flags);
}
static int start_contest(int cmd, long offset, int num)
{
int i, score=0;
u64 tb;
u64 mark;
tbsync->cmd = cmd;
local_irq_disable();
for (i = -3; i < num; ) {
tb = get_tb() + 400;
tbsync->tb = tb + offset;
tbsync->mark = mark = tb + 400;
wmb();
tbsync->handshake = 1;
while (tbsync->ack)
barrier();
while (get_tb() <= tb)
barrier();
tbsync->handshake = 0;
enter_contest(mark, 1);
while (!tbsync->ack)
barrier();
if (i++ > 0)
score += tbsync->race_result;
}
local_irq_enable();
return score;
}
void smp_generic_give_timebase(void)
{
int i, score, score2, old, min=0, max=5000, offset=1000;
pr_debug("Software timebase sync\n");
/* if this fails then this kernel won't work anyway... */
tbsync = kzalloc( sizeof(*tbsync), GFP_KERNEL );
mb();
running = 1;
while (!tbsync->ack)
barrier();
pr_debug("Got ack\n");
/* binary search */
for (old = -1; old != offset ; offset = (min+max) / 2) {
score = start_contest(kSetAndTest, offset, NUM_ITER);
pr_debug("score %d, offset %d\n", score, offset );
if( score > 0 )
max = offset;
else
min = offset;
old = offset;
}
score = start_contest(kSetAndTest, min, NUM_ITER);
score2 = start_contest(kSetAndTest, max, NUM_ITER);
pr_debug("Min %d (score %d), Max %d (score %d)\n",
min, score, max, score2);
score = abs(score);
score2 = abs(score2);
offset = (score < score2) ? min : max;
/* guard against inaccurate mttb */
for (i = 0; i < 10; i++) {
start_contest(kSetAndTest, offset, NUM_ITER/10);
if ((score2 = start_contest(kTest, offset, NUM_ITER)) < 0)
score2 = -score2;
if (score2 <= score || score2 < 20)
break;
}
pr_debug("Final offset: %d (%d/%d)\n", offset, score2, NUM_ITER );
/* exiting */
tbsync->cmd = kExit;
wmb();
tbsync->handshake = 1;
while (tbsync->ack)
barrier();
tbsync->handshake = 0;
kfree(tbsync);
tbsync = NULL;
running = 0;
}
| gpl-2.0 |
AD5GB/kernel_n5_3.10-experimental | sound/usb/usx2y/usb_stream.c | 4436 | 19471 | /*
* Copyright (C) 2007, 2008 Karsten Wiese <fzu@wemgehoertderstaat.de>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software Foundation,
* Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/usb.h>
#include <linux/gfp.h>
#include "usb_stream.h"
/* setup */
static unsigned usb_stream_next_packet_size(struct usb_stream_kernel *sk)
{
struct usb_stream *s = sk->s;
sk->out_phase_peeked = (sk->out_phase & 0xffff) + sk->freqn;
return (sk->out_phase_peeked >> 16) * s->cfg.frame_size;
}
static void playback_prep_freqn(struct usb_stream_kernel *sk, struct urb *urb)
{
struct usb_stream *s = sk->s;
int pack, lb = 0;
for (pack = 0; pack < sk->n_o_ps; pack++) {
int l = usb_stream_next_packet_size(sk);
if (s->idle_outsize + lb + l > s->period_size)
goto check;
sk->out_phase = sk->out_phase_peeked;
urb->iso_frame_desc[pack].offset = lb;
urb->iso_frame_desc[pack].length = l;
lb += l;
}
snd_printdd(KERN_DEBUG "%i\n", lb);
check:
urb->number_of_packets = pack;
urb->transfer_buffer_length = lb;
s->idle_outsize += lb - s->period_size;
snd_printdd(KERN_DEBUG "idle=%i ul=%i ps=%i\n", s->idle_outsize,
lb, s->period_size);
}
static void init_pipe_urbs(struct usb_stream_kernel *sk, unsigned use_packsize,
struct urb **urbs, char *transfer,
struct usb_device *dev, int pipe)
{
int u, p;
int maxpacket = use_packsize ?
use_packsize : usb_maxpacket(dev, pipe, usb_pipeout(pipe));
int transfer_length = maxpacket * sk->n_o_ps;
for (u = 0; u < USB_STREAM_NURBS;
++u, transfer += transfer_length) {
struct urb *urb = urbs[u];
struct usb_iso_packet_descriptor *desc;
urb->transfer_buffer = transfer;
urb->dev = dev;
urb->pipe = pipe;
urb->number_of_packets = sk->n_o_ps;
urb->context = sk;
urb->interval = 1;
if (usb_pipeout(pipe))
continue;
urb->transfer_buffer_length = transfer_length;
desc = urb->iso_frame_desc;
desc->offset = 0;
desc->length = maxpacket;
for (p = 1; p < sk->n_o_ps; ++p) {
desc[p].offset = desc[p - 1].offset + maxpacket;
desc[p].length = maxpacket;
}
}
}
static void init_urbs(struct usb_stream_kernel *sk, unsigned use_packsize,
struct usb_device *dev, int in_pipe, int out_pipe)
{
struct usb_stream *s = sk->s;
char *indata = (char *)s + sizeof(*s) +
sizeof(struct usb_stream_packet) *
s->inpackets;
int u;
for (u = 0; u < USB_STREAM_NURBS; ++u) {
sk->inurb[u] = usb_alloc_urb(sk->n_o_ps, GFP_KERNEL);
sk->outurb[u] = usb_alloc_urb(sk->n_o_ps, GFP_KERNEL);
}
init_pipe_urbs(sk, use_packsize, sk->inurb, indata, dev, in_pipe);
init_pipe_urbs(sk, use_packsize, sk->outurb, sk->write_page, dev,
out_pipe);
}
/*
* convert a sampling rate into our full speed format (fs/1000 in Q16.16)
* this will overflow at approx 524 kHz
*/
static inline unsigned get_usb_full_speed_rate(unsigned rate)
{
return ((rate << 13) + 62) / 125;
}
/*
* convert a sampling rate into USB high speed format (fs/8000 in Q16.16)
* this will overflow at approx 4 MHz
*/
static inline unsigned get_usb_high_speed_rate(unsigned rate)
{
return ((rate << 10) + 62) / 125;
}
void usb_stream_free(struct usb_stream_kernel *sk)
{
struct usb_stream *s;
unsigned u;
for (u = 0; u < USB_STREAM_NURBS; ++u) {
usb_free_urb(sk->inurb[u]);
sk->inurb[u] = NULL;
usb_free_urb(sk->outurb[u]);
sk->outurb[u] = NULL;
}
s = sk->s;
if (!s)
return;
free_pages((unsigned long)sk->write_page, get_order(s->write_size));
sk->write_page = NULL;
free_pages((unsigned long)s, get_order(s->read_size));
sk->s = NULL;
}
struct usb_stream *usb_stream_new(struct usb_stream_kernel *sk,
struct usb_device *dev,
unsigned in_endpoint, unsigned out_endpoint,
unsigned sample_rate, unsigned use_packsize,
unsigned period_frames, unsigned frame_size)
{
int packets, max_packsize;
int in_pipe, out_pipe;
int read_size = sizeof(struct usb_stream);
int write_size;
int usb_frames = dev->speed == USB_SPEED_HIGH ? 8000 : 1000;
int pg;
in_pipe = usb_rcvisocpipe(dev, in_endpoint);
out_pipe = usb_sndisocpipe(dev, out_endpoint);
max_packsize = use_packsize ?
use_packsize : usb_maxpacket(dev, in_pipe, 0);
/*
t_period = period_frames / sample_rate
iso_packs = t_period / t_iso_frame
= (period_frames / sample_rate) * (1 / t_iso_frame)
*/
packets = period_frames * usb_frames / sample_rate + 1;
if (dev->speed == USB_SPEED_HIGH)
packets = (packets + 7) & ~7;
read_size += packets * USB_STREAM_URBDEPTH *
(max_packsize + sizeof(struct usb_stream_packet));
max_packsize = usb_maxpacket(dev, out_pipe, 1);
write_size = max_packsize * packets * USB_STREAM_URBDEPTH;
if (read_size >= 256*PAGE_SIZE || write_size >= 256*PAGE_SIZE) {
snd_printk(KERN_WARNING "a size exceeds 128*PAGE_SIZE\n");
goto out;
}
pg = get_order(read_size);
sk->s = (void *) __get_free_pages(GFP_KERNEL|__GFP_COMP|__GFP_ZERO, pg);
if (!sk->s) {
snd_printk(KERN_WARNING "couldn't __get_free_pages()\n");
goto out;
}
sk->s->cfg.version = USB_STREAM_INTERFACE_VERSION;
sk->s->read_size = read_size;
sk->s->cfg.sample_rate = sample_rate;
sk->s->cfg.frame_size = frame_size;
sk->n_o_ps = packets;
sk->s->inpackets = packets * USB_STREAM_URBDEPTH;
sk->s->cfg.period_frames = period_frames;
sk->s->period_size = frame_size * period_frames;
sk->s->write_size = write_size;
pg = get_order(write_size);
sk->write_page =
(void *)__get_free_pages(GFP_KERNEL|__GFP_COMP|__GFP_ZERO, pg);
if (!sk->write_page) {
snd_printk(KERN_WARNING "couldn't __get_free_pages()\n");
usb_stream_free(sk);
return NULL;
}
/* calculate the frequency in 16.16 format */
if (dev->speed == USB_SPEED_FULL)
sk->freqn = get_usb_full_speed_rate(sample_rate);
else
sk->freqn = get_usb_high_speed_rate(sample_rate);
init_urbs(sk, use_packsize, dev, in_pipe, out_pipe);
sk->s->state = usb_stream_stopped;
out:
return sk->s;
}
/* start */
static bool balance_check(struct usb_stream_kernel *sk, struct urb *urb)
{
bool r;
if (unlikely(urb->status)) {
if (urb->status != -ESHUTDOWN && urb->status != -ENOENT)
snd_printk(KERN_WARNING "status=%i\n", urb->status);
sk->iso_frame_balance = 0x7FFFFFFF;
return false;
}
r = sk->iso_frame_balance == 0;
if (!r)
sk->i_urb = urb;
return r;
}
static bool balance_playback(struct usb_stream_kernel *sk, struct urb *urb)
{
sk->iso_frame_balance += urb->number_of_packets;
return balance_check(sk, urb);
}
static bool balance_capture(struct usb_stream_kernel *sk, struct urb *urb)
{
sk->iso_frame_balance -= urb->number_of_packets;
return balance_check(sk, urb);
}
static void subs_set_complete(struct urb **urbs, void (*complete)(struct urb *))
{
int u;
for (u = 0; u < USB_STREAM_NURBS; u++) {
struct urb *urb = urbs[u];
urb->complete = complete;
}
}
static int usb_stream_prepare_playback(struct usb_stream_kernel *sk,
struct urb *inurb)
{
struct usb_stream *s = sk->s;
struct urb *io;
struct usb_iso_packet_descriptor *id, *od;
int p = 0, lb = 0, l = 0;
io = sk->idle_outurb;
od = io->iso_frame_desc;
for (; s->sync_packet < 0; ++p, ++s->sync_packet) {
struct urb *ii = sk->completed_inurb;
id = ii->iso_frame_desc +
ii->number_of_packets + s->sync_packet;
l = id->actual_length;
od[p].length = l;
od[p].offset = lb;
lb += l;
}
for (;
s->sync_packet < inurb->number_of_packets && p < sk->n_o_ps;
++p, ++s->sync_packet) {
l = inurb->iso_frame_desc[s->sync_packet].actual_length;
if (s->idle_outsize + lb + l > s->period_size)
goto check_ok;
od[p].length = l;
od[p].offset = lb;
lb += l;
}
check_ok:
s->sync_packet -= inurb->number_of_packets;
if (unlikely(s->sync_packet < -2 || s->sync_packet > 0)) {
snd_printk(KERN_WARNING "invalid sync_packet = %i;"
" p=%i nop=%i %i %x %x %x > %x\n",
s->sync_packet, p, inurb->number_of_packets,
s->idle_outsize + lb + l,
s->idle_outsize, lb, l,
s->period_size);
return -1;
}
if (unlikely(lb % s->cfg.frame_size)) {
snd_printk(KERN_WARNING"invalid outsize = %i\n",
lb);
return -1;
}
s->idle_outsize += lb - s->period_size;
io->number_of_packets = p;
io->transfer_buffer_length = lb;
if (s->idle_outsize <= 0)
return 0;
snd_printk(KERN_WARNING "idle=%i\n", s->idle_outsize);
return -1;
}
static void prepare_inurb(int number_of_packets, struct urb *iu)
{
struct usb_iso_packet_descriptor *id;
int p;
iu->number_of_packets = number_of_packets;
id = iu->iso_frame_desc;
id->offset = 0;
for (p = 0; p < iu->number_of_packets - 1; ++p)
id[p + 1].offset = id[p].offset + id[p].length;
iu->transfer_buffer_length =
id[0].length * iu->number_of_packets;
}
static int submit_urbs(struct usb_stream_kernel *sk,
struct urb *inurb, struct urb *outurb)
{
int err;
prepare_inurb(sk->idle_outurb->number_of_packets, sk->idle_inurb);
err = usb_submit_urb(sk->idle_inurb, GFP_ATOMIC);
if (err < 0) {
snd_printk(KERN_ERR "%i\n", err);
return err;
}
sk->idle_inurb = sk->completed_inurb;
sk->completed_inurb = inurb;
err = usb_submit_urb(sk->idle_outurb, GFP_ATOMIC);
if (err < 0) {
snd_printk(KERN_ERR "%i\n", err);
return err;
}
sk->idle_outurb = sk->completed_outurb;
sk->completed_outurb = outurb;
return 0;
}
#ifdef DEBUG_LOOP_BACK
/*
This loop_back() shows how to read/write the period data.
*/
static void loop_back(struct usb_stream *s)
{
char *i, *o;
int il, ol, l, p;
struct urb *iu;
struct usb_iso_packet_descriptor *id;
o = s->playback1st_to;
ol = s->playback1st_size;
l = 0;
if (s->insplit_pack >= 0) {
iu = sk->idle_inurb;
id = iu->iso_frame_desc;
p = s->insplit_pack;
} else
goto second;
loop:
for (; p < iu->number_of_packets && l < s->period_size; ++p) {
i = iu->transfer_buffer + id[p].offset;
il = id[p].actual_length;
if (l + il > s->period_size)
il = s->period_size - l;
if (il <= ol) {
memcpy(o, i, il);
o += il;
ol -= il;
} else {
memcpy(o, i, ol);
singen_6pack(o, ol);
o = s->playback_to;
memcpy(o, i + ol, il - ol);
o += il - ol;
ol = s->period_size - s->playback1st_size;
}
l += il;
}
if (iu == sk->completed_inurb) {
if (l != s->period_size)
printk(KERN_DEBUG"%s:%i %i\n", __func__, __LINE__,
l/(int)s->cfg.frame_size);
return;
}
second:
iu = sk->completed_inurb;
id = iu->iso_frame_desc;
p = 0;
goto loop;
}
#else
static void loop_back(struct usb_stream *s)
{
}
#endif
static void stream_idle(struct usb_stream_kernel *sk,
struct urb *inurb, struct urb *outurb)
{
struct usb_stream *s = sk->s;
int l, p;
int insize = s->idle_insize;
int urb_size = 0;
s->inpacket_split = s->next_inpacket_split;
s->inpacket_split_at = s->next_inpacket_split_at;
s->next_inpacket_split = -1;
s->next_inpacket_split_at = 0;
for (p = 0; p < inurb->number_of_packets; ++p) {
struct usb_iso_packet_descriptor *id = inurb->iso_frame_desc;
l = id[p].actual_length;
if (unlikely(l == 0 || id[p].status)) {
snd_printk(KERN_WARNING "underrun, status=%u\n",
id[p].status);
goto err_out;
}
s->inpacket_head++;
s->inpacket_head %= s->inpackets;
if (s->inpacket_split == -1)
s->inpacket_split = s->inpacket_head;
s->inpacket[s->inpacket_head].offset =
id[p].offset + (inurb->transfer_buffer - (void *)s);
s->inpacket[s->inpacket_head].length = l;
if (insize + l > s->period_size &&
s->next_inpacket_split == -1) {
s->next_inpacket_split = s->inpacket_head;
s->next_inpacket_split_at = s->period_size - insize;
}
insize += l;
urb_size += l;
}
s->idle_insize += urb_size - s->period_size;
if (s->idle_insize < 0) {
snd_printk(KERN_WARNING "%i\n",
(s->idle_insize)/(int)s->cfg.frame_size);
goto err_out;
}
s->insize_done += urb_size;
l = s->idle_outsize;
s->outpacket[0].offset = (sk->idle_outurb->transfer_buffer -
sk->write_page) - l;
if (usb_stream_prepare_playback(sk, inurb) < 0)
goto err_out;
s->outpacket[0].length = sk->idle_outurb->transfer_buffer_length + l;
s->outpacket[1].offset = sk->completed_outurb->transfer_buffer -
sk->write_page;
if (submit_urbs(sk, inurb, outurb) < 0)
goto err_out;
loop_back(s);
s->periods_done++;
wake_up_all(&sk->sleep);
return;
err_out:
s->state = usb_stream_xrun;
wake_up_all(&sk->sleep);
}
static void i_capture_idle(struct urb *urb)
{
struct usb_stream_kernel *sk = urb->context;
if (balance_capture(sk, urb))
stream_idle(sk, urb, sk->i_urb);
}
static void i_playback_idle(struct urb *urb)
{
struct usb_stream_kernel *sk = urb->context;
if (balance_playback(sk, urb))
stream_idle(sk, sk->i_urb, urb);
}
static void stream_start(struct usb_stream_kernel *sk,
struct urb *inurb, struct urb *outurb)
{
struct usb_stream *s = sk->s;
if (s->state >= usb_stream_sync1) {
int l, p, max_diff, max_diff_0;
int urb_size = 0;
unsigned frames_per_packet, min_frames = 0;
frames_per_packet = (s->period_size - s->idle_insize);
frames_per_packet <<= 8;
frames_per_packet /=
s->cfg.frame_size * inurb->number_of_packets;
frames_per_packet++;
max_diff_0 = s->cfg.frame_size;
if (s->cfg.period_frames >= 256)
max_diff_0 <<= 1;
if (s->cfg.period_frames >= 1024)
max_diff_0 <<= 1;
max_diff = max_diff_0;
for (p = 0; p < inurb->number_of_packets; ++p) {
int diff;
l = inurb->iso_frame_desc[p].actual_length;
urb_size += l;
min_frames += frames_per_packet;
diff = urb_size -
(min_frames >> 8) * s->cfg.frame_size;
if (diff < max_diff) {
snd_printdd(KERN_DEBUG "%i %i %i %i\n",
s->insize_done,
urb_size / (int)s->cfg.frame_size,
inurb->number_of_packets, diff);
max_diff = diff;
}
}
s->idle_insize -= max_diff - max_diff_0;
s->idle_insize += urb_size - s->period_size;
if (s->idle_insize < 0) {
snd_printk(KERN_WARNING "%i %i %i\n",
s->idle_insize, urb_size, s->period_size);
return;
} else if (s->idle_insize == 0) {
s->next_inpacket_split =
(s->inpacket_head + 1) % s->inpackets;
s->next_inpacket_split_at = 0;
} else {
unsigned split = s->inpacket_head;
l = s->idle_insize;
while (l > s->inpacket[split].length) {
l -= s->inpacket[split].length;
if (split == 0)
split = s->inpackets - 1;
else
split--;
}
s->next_inpacket_split = split;
s->next_inpacket_split_at =
s->inpacket[split].length - l;
}
s->insize_done += urb_size;
if (usb_stream_prepare_playback(sk, inurb) < 0)
return;
} else
playback_prep_freqn(sk, sk->idle_outurb);
if (submit_urbs(sk, inurb, outurb) < 0)
return;
if (s->state == usb_stream_sync1 && s->insize_done > 360000) {
/* just guesswork ^^^^^^ */
s->state = usb_stream_ready;
subs_set_complete(sk->inurb, i_capture_idle);
subs_set_complete(sk->outurb, i_playback_idle);
}
}
static void i_capture_start(struct urb *urb)
{
struct usb_iso_packet_descriptor *id = urb->iso_frame_desc;
struct usb_stream_kernel *sk = urb->context;
struct usb_stream *s = sk->s;
int p;
int empty = 0;
if (urb->status) {
snd_printk(KERN_WARNING "status=%i\n", urb->status);
return;
}
for (p = 0; p < urb->number_of_packets; ++p) {
int l = id[p].actual_length;
if (l < s->cfg.frame_size) {
++empty;
if (s->state >= usb_stream_sync0) {
snd_printk(KERN_WARNING "%i\n", l);
return;
}
}
s->inpacket_head++;
s->inpacket_head %= s->inpackets;
s->inpacket[s->inpacket_head].offset =
id[p].offset + (urb->transfer_buffer - (void *)s);
s->inpacket[s->inpacket_head].length = l;
}
#ifdef SHOW_EMPTY
if (empty) {
printk(KERN_DEBUG"%s:%i: %i", __func__, __LINE__,
urb->iso_frame_desc[0].actual_length);
for (pack = 1; pack < urb->number_of_packets; ++pack) {
int l = urb->iso_frame_desc[pack].actual_length;
printk(" %i", l);
}
printk("\n");
}
#endif
if (!empty && s->state < usb_stream_sync1)
++s->state;
if (balance_capture(sk, urb))
stream_start(sk, urb, sk->i_urb);
}
static void i_playback_start(struct urb *urb)
{
struct usb_stream_kernel *sk = urb->context;
if (balance_playback(sk, urb))
stream_start(sk, sk->i_urb, urb);
}
int usb_stream_start(struct usb_stream_kernel *sk)
{
struct usb_stream *s = sk->s;
int frame = 0, iters = 0;
int u, err;
int try = 0;
if (s->state != usb_stream_stopped)
return -EAGAIN;
subs_set_complete(sk->inurb, i_capture_start);
subs_set_complete(sk->outurb, i_playback_start);
memset(sk->write_page, 0, s->write_size);
dotry:
s->insize_done = 0;
s->idle_insize = 0;
s->idle_outsize = 0;
s->sync_packet = -1;
s->inpacket_head = -1;
sk->iso_frame_balance = 0;
++try;
for (u = 0; u < 2; u++) {
struct urb *inurb = sk->inurb[u];
struct urb *outurb = sk->outurb[u];
playback_prep_freqn(sk, outurb);
inurb->number_of_packets = outurb->number_of_packets;
inurb->transfer_buffer_length =
inurb->number_of_packets *
inurb->iso_frame_desc[0].length;
if (u == 0) {
int now;
struct usb_device *dev = inurb->dev;
frame = usb_get_current_frame_number(dev);
do {
now = usb_get_current_frame_number(dev);
++iters;
} while (now > -1 && now == frame);
}
err = usb_submit_urb(inurb, GFP_ATOMIC);
if (err < 0) {
snd_printk(KERN_ERR"usb_submit_urb(sk->inurb[%i])"
" returned %i\n", u, err);
return err;
}
err = usb_submit_urb(outurb, GFP_ATOMIC);
if (err < 0) {
snd_printk(KERN_ERR"usb_submit_urb(sk->outurb[%i])"
" returned %i\n", u, err);
return err;
}
if (inurb->start_frame != outurb->start_frame) {
snd_printd(KERN_DEBUG
"u[%i] start_frames differ in:%u out:%u\n",
u, inurb->start_frame, outurb->start_frame);
goto check_retry;
}
}
snd_printdd(KERN_DEBUG "%i %i\n", frame, iters);
try = 0;
check_retry:
if (try) {
usb_stream_stop(sk);
if (try < 5) {
msleep(1500);
snd_printd(KERN_DEBUG "goto dotry;\n");
goto dotry;
}
snd_printk(KERN_WARNING"couldn't start"
" all urbs on the same start_frame.\n");
return -EFAULT;
}
sk->idle_inurb = sk->inurb[USB_STREAM_NURBS - 2];
sk->idle_outurb = sk->outurb[USB_STREAM_NURBS - 2];
sk->completed_inurb = sk->inurb[USB_STREAM_NURBS - 1];
sk->completed_outurb = sk->outurb[USB_STREAM_NURBS - 1];
/* wait, check */
{
int wait_ms = 3000;
while (s->state != usb_stream_ready && wait_ms > 0) {
snd_printdd(KERN_DEBUG "%i\n", s->state);
msleep(200);
wait_ms -= 200;
}
}
return s->state == usb_stream_ready ? 0 : -EFAULT;
}
/* stop */
void usb_stream_stop(struct usb_stream_kernel *sk)
{
int u;
if (!sk->s)
return;
for (u = 0; u < USB_STREAM_NURBS; ++u) {
usb_kill_urb(sk->inurb[u]);
usb_kill_urb(sk->outurb[u]);
}
sk->s->state = usb_stream_stopped;
msleep(400);
}
| gpl-2.0 |
davidmueller13/arter97_bb | arch/tile/kernel/pci-dma.c | 4692 | 7107 | /*
* Copyright 2010 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*/
#include <linux/mm.h>
#include <linux/dma-mapping.h>
#include <linux/vmalloc.h>
#include <linux/export.h>
#include <asm/tlbflush.h>
#include <asm/homecache.h>
/* Generic DMA mapping functions: */
/*
* Allocate what Linux calls "coherent" memory, which for us just
* means uncached.
*/
void *dma_alloc_coherent(struct device *dev,
size_t size,
dma_addr_t *dma_handle,
gfp_t gfp)
{
u64 dma_mask = dev->coherent_dma_mask ?: DMA_BIT_MASK(32);
int node = dev_to_node(dev);
int order = get_order(size);
struct page *pg;
dma_addr_t addr;
gfp |= __GFP_ZERO;
/*
* By forcing NUMA node 0 for 32-bit masks we ensure that the
* high 32 bits of the resulting PA will be zero. If the mask
* size is, e.g., 24, we may still not be able to guarantee a
* suitable memory address, in which case we will return NULL.
* But such devices are uncommon.
*/
if (dma_mask <= DMA_BIT_MASK(32))
node = 0;
pg = homecache_alloc_pages_node(node, gfp, order, PAGE_HOME_UNCACHED);
if (pg == NULL)
return NULL;
addr = page_to_phys(pg);
if (addr + size > dma_mask) {
homecache_free_pages(addr, order);
return NULL;
}
*dma_handle = addr;
return page_address(pg);
}
EXPORT_SYMBOL(dma_alloc_coherent);
/*
* Free memory that was allocated with dma_alloc_coherent.
*/
void dma_free_coherent(struct device *dev, size_t size,
void *vaddr, dma_addr_t dma_handle)
{
homecache_free_pages((unsigned long)vaddr, get_order(size));
}
EXPORT_SYMBOL(dma_free_coherent);
/*
* The map routines "map" the specified address range for DMA
* accesses. The memory belongs to the device after this call is
* issued, until it is unmapped with dma_unmap_single.
*
* We don't need to do any mapping, we just flush the address range
* out of the cache and return a DMA address.
*
* The unmap routines do whatever is necessary before the processor
* accesses the memory again, and must be called before the driver
* touches the memory. We can get away with a cache invalidate if we
* can count on nothing having been touched.
*/
/* Flush a PA range from cache page by page. */
static void __dma_map_pa_range(dma_addr_t dma_addr, size_t size)
{
struct page *page = pfn_to_page(PFN_DOWN(dma_addr));
size_t bytesleft = PAGE_SIZE - (dma_addr & (PAGE_SIZE - 1));
while ((ssize_t)size > 0) {
/* Flush the page. */
homecache_flush_cache(page++, 0);
/* Figure out if we need to continue on the next page. */
size -= bytesleft;
bytesleft = PAGE_SIZE;
}
}
/*
* dma_map_single can be passed any memory address, and there appear
* to be no alignment constraints.
*
* There is a chance that the start of the buffer will share a cache
* line with some other data that has been touched in the meantime.
*/
dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
enum dma_data_direction direction)
{
dma_addr_t dma_addr = __pa(ptr);
BUG_ON(!valid_dma_direction(direction));
WARN_ON(size == 0);
__dma_map_pa_range(dma_addr, size);
return dma_addr;
}
EXPORT_SYMBOL(dma_map_single);
void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
enum dma_data_direction direction)
{
BUG_ON(!valid_dma_direction(direction));
}
EXPORT_SYMBOL(dma_unmap_single);
int dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
enum dma_data_direction direction)
{
struct scatterlist *sg;
int i;
BUG_ON(!valid_dma_direction(direction));
WARN_ON(nents == 0 || sglist->length == 0);
for_each_sg(sglist, sg, nents, i) {
sg->dma_address = sg_phys(sg);
__dma_map_pa_range(sg->dma_address, sg->length);
}
return nents;
}
EXPORT_SYMBOL(dma_map_sg);
void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
enum dma_data_direction direction)
{
BUG_ON(!valid_dma_direction(direction));
}
EXPORT_SYMBOL(dma_unmap_sg);
dma_addr_t dma_map_page(struct device *dev, struct page *page,
unsigned long offset, size_t size,
enum dma_data_direction direction)
{
BUG_ON(!valid_dma_direction(direction));
BUG_ON(offset + size > PAGE_SIZE);
homecache_flush_cache(page, 0);
return page_to_pa(page) + offset;
}
EXPORT_SYMBOL(dma_map_page);
void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
enum dma_data_direction direction)
{
BUG_ON(!valid_dma_direction(direction));
}
EXPORT_SYMBOL(dma_unmap_page);
void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
size_t size, enum dma_data_direction direction)
{
BUG_ON(!valid_dma_direction(direction));
}
EXPORT_SYMBOL(dma_sync_single_for_cpu);
void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
size_t size, enum dma_data_direction direction)
{
unsigned long start = PFN_DOWN(dma_handle);
unsigned long end = PFN_DOWN(dma_handle + size - 1);
unsigned long i;
BUG_ON(!valid_dma_direction(direction));
for (i = start; i <= end; ++i)
homecache_flush_cache(pfn_to_page(i), 0);
}
EXPORT_SYMBOL(dma_sync_single_for_device);
void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
enum dma_data_direction direction)
{
BUG_ON(!valid_dma_direction(direction));
WARN_ON(nelems == 0 || sg[0].length == 0);
}
EXPORT_SYMBOL(dma_sync_sg_for_cpu);
/*
* Flush and invalidate cache for scatterlist.
*/
void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sglist,
int nelems, enum dma_data_direction direction)
{
struct scatterlist *sg;
int i;
BUG_ON(!valid_dma_direction(direction));
WARN_ON(nelems == 0 || sglist->length == 0);
for_each_sg(sglist, sg, nelems, i) {
dma_sync_single_for_device(dev, sg->dma_address,
sg_dma_len(sg), direction);
}
}
EXPORT_SYMBOL(dma_sync_sg_for_device);
void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
unsigned long offset, size_t size,
enum dma_data_direction direction)
{
dma_sync_single_for_cpu(dev, dma_handle + offset, size, direction);
}
EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
void dma_sync_single_range_for_device(struct device *dev,
dma_addr_t dma_handle,
unsigned long offset, size_t size,
enum dma_data_direction direction)
{
dma_sync_single_for_device(dev, dma_handle + offset, size, direction);
}
EXPORT_SYMBOL(dma_sync_single_range_for_device);
/*
* dma_alloc_noncoherent() returns non-cacheable memory, so there's no
* need to do any flushing here.
*/
void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
enum dma_data_direction direction)
{
}
EXPORT_SYMBOL(dma_cache_sync);
| gpl-2.0 |
YaDev/kernel_samsung_gardaltetmo | drivers/media/video/s5p-tv/sdo_drv.c | 4948 | 11447 | /*
* Samsung Standard Definition Output (SDO) driver
*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
*
* Tomasz Stanislawski, <t.stanislaws@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published
* by the Free Software Foundiation. either version 2 of the License,
* or (at your option) any later version
*/
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <media/v4l2-subdev.h>
#include "regs-sdo.h"
MODULE_AUTHOR("Tomasz Stanislawski, <t.stanislaws@samsung.com>");
MODULE_DESCRIPTION("Samsung Standard Definition Output (SDO)");
MODULE_LICENSE("GPL");
#define SDO_DEFAULT_STD V4L2_STD_PAL
struct sdo_format {
v4l2_std_id id;
/* all modes are 720 pixels wide */
unsigned int height;
unsigned int cookie;
};
struct sdo_device {
/** pointer to device parent */
struct device *dev;
/** base address of SDO registers */
void __iomem *regs;
/** SDO interrupt */
unsigned int irq;
/** DAC source clock */
struct clk *sclk_dac;
/** DAC clock */
struct clk *dac;
/** DAC physical interface */
struct clk *dacphy;
/** clock for control of VPLL */
struct clk *fout_vpll;
/** regulator for SDO IP power */
struct regulator *vdac;
/** regulator for SDO plug detection */
struct regulator *vdet;
/** subdev used as device interface */
struct v4l2_subdev sd;
/** current format */
const struct sdo_format *fmt;
};
static inline struct sdo_device *sd_to_sdev(struct v4l2_subdev *sd)
{
return container_of(sd, struct sdo_device, sd);
}
static inline
void sdo_write_mask(struct sdo_device *sdev, u32 reg_id, u32 value, u32 mask)
{
u32 old = readl(sdev->regs + reg_id);
value = (value & mask) | (old & ~mask);
writel(value, sdev->regs + reg_id);
}
static inline
void sdo_write(struct sdo_device *sdev, u32 reg_id, u32 value)
{
writel(value, sdev->regs + reg_id);
}
static inline
u32 sdo_read(struct sdo_device *sdev, u32 reg_id)
{
return readl(sdev->regs + reg_id);
}
static irqreturn_t sdo_irq_handler(int irq, void *dev_data)
{
struct sdo_device *sdev = dev_data;
/* clear interrupt */
sdo_write_mask(sdev, SDO_IRQ, ~0, SDO_VSYNC_IRQ_PEND);
return IRQ_HANDLED;
}
static void sdo_reg_debug(struct sdo_device *sdev)
{
#define DBGREG(reg_id) \
dev_info(sdev->dev, #reg_id " = %08x\n", \
sdo_read(sdev, reg_id))
DBGREG(SDO_CLKCON);
DBGREG(SDO_CONFIG);
DBGREG(SDO_VBI);
DBGREG(SDO_DAC);
DBGREG(SDO_IRQ);
DBGREG(SDO_IRQMASK);
DBGREG(SDO_VERSION);
}
static const struct sdo_format sdo_format[] = {
{ V4L2_STD_PAL_N, .height = 576, .cookie = SDO_PAL_N },
{ V4L2_STD_PAL_Nc, .height = 576, .cookie = SDO_PAL_NC },
{ V4L2_STD_PAL_M, .height = 480, .cookie = SDO_PAL_M },
{ V4L2_STD_PAL_60, .height = 480, .cookie = SDO_PAL_60 },
{ V4L2_STD_NTSC_443, .height = 480, .cookie = SDO_NTSC_443 },
{ V4L2_STD_PAL, .height = 576, .cookie = SDO_PAL_BGHID },
{ V4L2_STD_NTSC_M, .height = 480, .cookie = SDO_NTSC_M },
};
static const struct sdo_format *sdo_find_format(v4l2_std_id id)
{
int i;
for (i = 0; i < ARRAY_SIZE(sdo_format); ++i)
if (sdo_format[i].id & id)
return &sdo_format[i];
return NULL;
}
static int sdo_g_tvnorms_output(struct v4l2_subdev *sd, v4l2_std_id *std)
{
*std = V4L2_STD_NTSC_M | V4L2_STD_PAL_M | V4L2_STD_PAL |
V4L2_STD_PAL_N | V4L2_STD_PAL_Nc |
V4L2_STD_NTSC_443 | V4L2_STD_PAL_60;
return 0;
}
static int sdo_s_std_output(struct v4l2_subdev *sd, v4l2_std_id std)
{
struct sdo_device *sdev = sd_to_sdev(sd);
const struct sdo_format *fmt;
fmt = sdo_find_format(std);
if (fmt == NULL)
return -EINVAL;
sdev->fmt = fmt;
return 0;
}
static int sdo_g_std_output(struct v4l2_subdev *sd, v4l2_std_id *std)
{
*std = sd_to_sdev(sd)->fmt->id;
return 0;
}
static int sdo_g_mbus_fmt(struct v4l2_subdev *sd,
struct v4l2_mbus_framefmt *fmt)
{
struct sdo_device *sdev = sd_to_sdev(sd);
if (!sdev->fmt)
return -ENXIO;
/* all modes are 720 pixels wide */
fmt->width = 720;
fmt->height = sdev->fmt->height;
fmt->code = V4L2_MBUS_FMT_FIXED;
fmt->field = V4L2_FIELD_INTERLACED;
fmt->colorspace = V4L2_COLORSPACE_JPEG;
return 0;
}
static int sdo_s_power(struct v4l2_subdev *sd, int on)
{
struct sdo_device *sdev = sd_to_sdev(sd);
struct device *dev = sdev->dev;
int ret;
dev_info(dev, "sdo_s_power(%d)\n", on);
if (on)
ret = pm_runtime_get_sync(dev);
else
ret = pm_runtime_put_sync(dev);
/* only values < 0 indicate errors */
return IS_ERR_VALUE(ret) ? ret : 0;
}
static int sdo_streamon(struct sdo_device *sdev)
{
/* set proper clock for Timing Generator */
clk_set_rate(sdev->fout_vpll, 54000000);
dev_info(sdev->dev, "fout_vpll.rate = %lu\n",
clk_get_rate(sdev->fout_vpll));
/* enable clock in SDO */
sdo_write_mask(sdev, SDO_CLKCON, ~0, SDO_TVOUT_CLOCK_ON);
clk_enable(sdev->dacphy);
/* enable DAC */
sdo_write_mask(sdev, SDO_DAC, ~0, SDO_POWER_ON_DAC);
sdo_reg_debug(sdev);
return 0;
}
static int sdo_streamoff(struct sdo_device *sdev)
{
int tries;
sdo_write_mask(sdev, SDO_DAC, 0, SDO_POWER_ON_DAC);
clk_disable(sdev->dacphy);
sdo_write_mask(sdev, SDO_CLKCON, 0, SDO_TVOUT_CLOCK_ON);
for (tries = 100; tries; --tries) {
if (sdo_read(sdev, SDO_CLKCON) & SDO_TVOUT_CLOCK_READY)
break;
mdelay(1);
}
if (tries == 0)
dev_err(sdev->dev, "failed to stop streaming\n");
return tries ? 0 : -EIO;
}
static int sdo_s_stream(struct v4l2_subdev *sd, int on)
{
struct sdo_device *sdev = sd_to_sdev(sd);
return on ? sdo_streamon(sdev) : sdo_streamoff(sdev);
}
static const struct v4l2_subdev_core_ops sdo_sd_core_ops = {
.s_power = sdo_s_power,
};
static const struct v4l2_subdev_video_ops sdo_sd_video_ops = {
.s_std_output = sdo_s_std_output,
.g_std_output = sdo_g_std_output,
.g_tvnorms_output = sdo_g_tvnorms_output,
.g_mbus_fmt = sdo_g_mbus_fmt,
.s_stream = sdo_s_stream,
};
static const struct v4l2_subdev_ops sdo_sd_ops = {
.core = &sdo_sd_core_ops,
.video = &sdo_sd_video_ops,
};
static int sdo_runtime_suspend(struct device *dev)
{
struct v4l2_subdev *sd = dev_get_drvdata(dev);
struct sdo_device *sdev = sd_to_sdev(sd);
dev_info(dev, "suspend\n");
regulator_disable(sdev->vdet);
regulator_disable(sdev->vdac);
clk_disable(sdev->sclk_dac);
return 0;
}
static int sdo_runtime_resume(struct device *dev)
{
struct v4l2_subdev *sd = dev_get_drvdata(dev);
struct sdo_device *sdev = sd_to_sdev(sd);
dev_info(dev, "resume\n");
clk_enable(sdev->sclk_dac);
regulator_enable(sdev->vdac);
regulator_enable(sdev->vdet);
/* software reset */
sdo_write_mask(sdev, SDO_CLKCON, ~0, SDO_TVOUT_SW_RESET);
mdelay(10);
sdo_write_mask(sdev, SDO_CLKCON, 0, SDO_TVOUT_SW_RESET);
/* setting TV mode */
sdo_write_mask(sdev, SDO_CONFIG, sdev->fmt->cookie, SDO_STANDARD_MASK);
/* XXX: forcing interlaced mode using undocumented bit */
sdo_write_mask(sdev, SDO_CONFIG, 0, SDO_PROGRESSIVE);
/* turn all VBI off */
sdo_write_mask(sdev, SDO_VBI, 0, SDO_CVBS_WSS_INS |
SDO_CVBS_CLOSED_CAPTION_MASK);
/* turn all post processing off */
sdo_write_mask(sdev, SDO_CCCON, ~0, SDO_COMPENSATION_BHS_ADJ_OFF |
SDO_COMPENSATION_CVBS_COMP_OFF);
sdo_reg_debug(sdev);
return 0;
}
static const struct dev_pm_ops sdo_pm_ops = {
.runtime_suspend = sdo_runtime_suspend,
.runtime_resume = sdo_runtime_resume,
};
static int __devinit sdo_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct sdo_device *sdev;
struct resource *res;
int ret = 0;
struct clk *sclk_vpll;
dev_info(dev, "probe start\n");
sdev = devm_kzalloc(&pdev->dev, sizeof *sdev, GFP_KERNEL);
if (!sdev) {
dev_err(dev, "not enough memory.\n");
ret = -ENOMEM;
goto fail;
}
sdev->dev = dev;
/* mapping registers */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (res == NULL) {
dev_err(dev, "get memory resource failed.\n");
ret = -ENXIO;
goto fail;
}
sdev->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
if (sdev->regs == NULL) {
dev_err(dev, "register mapping failed.\n");
ret = -ENXIO;
goto fail;
}
/* acquiring interrupt */
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (res == NULL) {
dev_err(dev, "get interrupt resource failed.\n");
ret = -ENXIO;
goto fail;
}
ret = devm_request_irq(&pdev->dev, res->start, sdo_irq_handler, 0,
"s5p-sdo", sdev);
if (ret) {
dev_err(dev, "request interrupt failed.\n");
goto fail;
}
sdev->irq = res->start;
/* acquire clocks */
sdev->sclk_dac = clk_get(dev, "sclk_dac");
if (IS_ERR_OR_NULL(sdev->sclk_dac)) {
dev_err(dev, "failed to get clock 'sclk_dac'\n");
ret = -ENXIO;
goto fail;
}
sdev->dac = clk_get(dev, "dac");
if (IS_ERR_OR_NULL(sdev->dac)) {
dev_err(dev, "failed to get clock 'dac'\n");
ret = -ENXIO;
goto fail_sclk_dac;
}
sdev->dacphy = clk_get(dev, "dacphy");
if (IS_ERR_OR_NULL(sdev->dacphy)) {
dev_err(dev, "failed to get clock 'dacphy'\n");
ret = -ENXIO;
goto fail_dac;
}
sclk_vpll = clk_get(dev, "sclk_vpll");
if (IS_ERR_OR_NULL(sclk_vpll)) {
dev_err(dev, "failed to get clock 'sclk_vpll'\n");
ret = -ENXIO;
goto fail_dacphy;
}
clk_set_parent(sdev->sclk_dac, sclk_vpll);
clk_put(sclk_vpll);
sdev->fout_vpll = clk_get(dev, "fout_vpll");
if (IS_ERR_OR_NULL(sdev->fout_vpll)) {
dev_err(dev, "failed to get clock 'fout_vpll'\n");
goto fail_dacphy;
}
dev_info(dev, "fout_vpll.rate = %lu\n", clk_get_rate(sclk_vpll));
/* acquire regulator */
sdev->vdac = regulator_get(dev, "vdd33a_dac");
if (IS_ERR_OR_NULL(sdev->vdac)) {
dev_err(dev, "failed to get regulator 'vdac'\n");
goto fail_fout_vpll;
}
sdev->vdet = regulator_get(dev, "vdet");
if (IS_ERR_OR_NULL(sdev->vdet)) {
dev_err(dev, "failed to get regulator 'vdet'\n");
goto fail_vdac;
}
/* enable gate for dac clock, because mixer uses it */
clk_enable(sdev->dac);
/* configure power management */
pm_runtime_enable(dev);
/* configuration of interface subdevice */
v4l2_subdev_init(&sdev->sd, &sdo_sd_ops);
sdev->sd.owner = THIS_MODULE;
strlcpy(sdev->sd.name, "s5p-sdo", sizeof sdev->sd.name);
/* set default format */
sdev->fmt = sdo_find_format(SDO_DEFAULT_STD);
BUG_ON(sdev->fmt == NULL);
/* keeping subdev in device's private for use by other drivers */
dev_set_drvdata(dev, &sdev->sd);
dev_info(dev, "probe succeeded\n");
return 0;
fail_vdac:
regulator_put(sdev->vdac);
fail_fout_vpll:
clk_put(sdev->fout_vpll);
fail_dacphy:
clk_put(sdev->dacphy);
fail_dac:
clk_put(sdev->dac);
fail_sclk_dac:
clk_put(sdev->sclk_dac);
fail:
dev_info(dev, "probe failed\n");
return ret;
}
static int __devexit sdo_remove(struct platform_device *pdev)
{
struct v4l2_subdev *sd = dev_get_drvdata(&pdev->dev);
struct sdo_device *sdev = sd_to_sdev(sd);
pm_runtime_disable(&pdev->dev);
clk_disable(sdev->dac);
regulator_put(sdev->vdet);
regulator_put(sdev->vdac);
clk_put(sdev->fout_vpll);
clk_put(sdev->dacphy);
clk_put(sdev->dac);
clk_put(sdev->sclk_dac);
dev_info(&pdev->dev, "remove successful\n");
return 0;
}
static struct platform_driver sdo_driver __refdata = {
.probe = sdo_probe,
.remove = __devexit_p(sdo_remove),
.driver = {
.name = "s5p-sdo",
.owner = THIS_MODULE,
.pm = &sdo_pm_ops,
}
};
module_platform_driver(sdo_driver);
| gpl-2.0 |
Arc-Team/android_kernel_htc_msm8960 | arch/blackfin/mm/sram-alloc.c | 7252 | 20498 | /*
* SRAM allocator for Blackfin on-chip memory
*
* Copyright 2004-2009 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/miscdevice.h>
#include <linux/ioport.h>
#include <linux/fcntl.h>
#include <linux/init.h>
#include <linux/poll.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/spinlock.h>
#include <linux/rtc.h>
#include <linux/slab.h>
#include <asm/blackfin.h>
#include <asm/mem_map.h>
#include "blackfin_sram.h"
/* the data structure for L1 scratchpad and DATA SRAM */
struct sram_piece {
void *paddr;
int size;
pid_t pid;
struct sram_piece *next;
};
static DEFINE_PER_CPU_SHARED_ALIGNED(spinlock_t, l1sram_lock);
static DEFINE_PER_CPU(struct sram_piece, free_l1_ssram_head);
static DEFINE_PER_CPU(struct sram_piece, used_l1_ssram_head);
#if L1_DATA_A_LENGTH != 0
static DEFINE_PER_CPU(struct sram_piece, free_l1_data_A_sram_head);
static DEFINE_PER_CPU(struct sram_piece, used_l1_data_A_sram_head);
#endif
#if L1_DATA_B_LENGTH != 0
static DEFINE_PER_CPU(struct sram_piece, free_l1_data_B_sram_head);
static DEFINE_PER_CPU(struct sram_piece, used_l1_data_B_sram_head);
#endif
#if L1_DATA_A_LENGTH || L1_DATA_B_LENGTH
static DEFINE_PER_CPU_SHARED_ALIGNED(spinlock_t, l1_data_sram_lock);
#endif
#if L1_CODE_LENGTH != 0
static DEFINE_PER_CPU_SHARED_ALIGNED(spinlock_t, l1_inst_sram_lock);
static DEFINE_PER_CPU(struct sram_piece, free_l1_inst_sram_head);
static DEFINE_PER_CPU(struct sram_piece, used_l1_inst_sram_head);
#endif
#if L2_LENGTH != 0
static spinlock_t l2_sram_lock ____cacheline_aligned_in_smp;
static struct sram_piece free_l2_sram_head, used_l2_sram_head;
#endif
static struct kmem_cache *sram_piece_cache;
/* L1 Scratchpad SRAM initialization function */
static void __init l1sram_init(void)
{
unsigned int cpu;
unsigned long reserve;
#ifdef CONFIG_SMP
reserve = 0;
#else
reserve = sizeof(struct l1_scratch_task_info);
#endif
for (cpu = 0; cpu < num_possible_cpus(); ++cpu) {
per_cpu(free_l1_ssram_head, cpu).next =
kmem_cache_alloc(sram_piece_cache, GFP_KERNEL);
if (!per_cpu(free_l1_ssram_head, cpu).next) {
printk(KERN_INFO "Fail to initialize Scratchpad data SRAM.\n");
return;
}
per_cpu(free_l1_ssram_head, cpu).next->paddr = (void *)get_l1_scratch_start_cpu(cpu) + reserve;
per_cpu(free_l1_ssram_head, cpu).next->size = L1_SCRATCH_LENGTH - reserve;
per_cpu(free_l1_ssram_head, cpu).next->pid = 0;
per_cpu(free_l1_ssram_head, cpu).next->next = NULL;
per_cpu(used_l1_ssram_head, cpu).next = NULL;
/* mutex initialize */
spin_lock_init(&per_cpu(l1sram_lock, cpu));
printk(KERN_INFO "Blackfin Scratchpad data SRAM: %d KB\n",
L1_SCRATCH_LENGTH >> 10);
}
}
static void __init l1_data_sram_init(void)
{
#if L1_DATA_A_LENGTH != 0 || L1_DATA_B_LENGTH != 0
unsigned int cpu;
#endif
#if L1_DATA_A_LENGTH != 0
for (cpu = 0; cpu < num_possible_cpus(); ++cpu) {
per_cpu(free_l1_data_A_sram_head, cpu).next =
kmem_cache_alloc(sram_piece_cache, GFP_KERNEL);
if (!per_cpu(free_l1_data_A_sram_head, cpu).next) {
printk(KERN_INFO "Fail to initialize L1 Data A SRAM.\n");
return;
}
per_cpu(free_l1_data_A_sram_head, cpu).next->paddr =
(void *)get_l1_data_a_start_cpu(cpu) + (_ebss_l1 - _sdata_l1);
per_cpu(free_l1_data_A_sram_head, cpu).next->size =
L1_DATA_A_LENGTH - (_ebss_l1 - _sdata_l1);
per_cpu(free_l1_data_A_sram_head, cpu).next->pid = 0;
per_cpu(free_l1_data_A_sram_head, cpu).next->next = NULL;
per_cpu(used_l1_data_A_sram_head, cpu).next = NULL;
printk(KERN_INFO "Blackfin L1 Data A SRAM: %d KB (%d KB free)\n",
L1_DATA_A_LENGTH >> 10,
per_cpu(free_l1_data_A_sram_head, cpu).next->size >> 10);
}
#endif
#if L1_DATA_B_LENGTH != 0
for (cpu = 0; cpu < num_possible_cpus(); ++cpu) {
per_cpu(free_l1_data_B_sram_head, cpu).next =
kmem_cache_alloc(sram_piece_cache, GFP_KERNEL);
if (!per_cpu(free_l1_data_B_sram_head, cpu).next) {
printk(KERN_INFO "Fail to initialize L1 Data B SRAM.\n");
return;
}
per_cpu(free_l1_data_B_sram_head, cpu).next->paddr =
(void *)get_l1_data_b_start_cpu(cpu) + (_ebss_b_l1 - _sdata_b_l1);
per_cpu(free_l1_data_B_sram_head, cpu).next->size =
L1_DATA_B_LENGTH - (_ebss_b_l1 - _sdata_b_l1);
per_cpu(free_l1_data_B_sram_head, cpu).next->pid = 0;
per_cpu(free_l1_data_B_sram_head, cpu).next->next = NULL;
per_cpu(used_l1_data_B_sram_head, cpu).next = NULL;
printk(KERN_INFO "Blackfin L1 Data B SRAM: %d KB (%d KB free)\n",
L1_DATA_B_LENGTH >> 10,
per_cpu(free_l1_data_B_sram_head, cpu).next->size >> 10);
/* mutex initialize */
}
#endif
#if L1_DATA_A_LENGTH != 0 || L1_DATA_B_LENGTH != 0
for (cpu = 0; cpu < num_possible_cpus(); ++cpu)
spin_lock_init(&per_cpu(l1_data_sram_lock, cpu));
#endif
}
static void __init l1_inst_sram_init(void)
{
#if L1_CODE_LENGTH != 0
unsigned int cpu;
for (cpu = 0; cpu < num_possible_cpus(); ++cpu) {
per_cpu(free_l1_inst_sram_head, cpu).next =
kmem_cache_alloc(sram_piece_cache, GFP_KERNEL);
if (!per_cpu(free_l1_inst_sram_head, cpu).next) {
printk(KERN_INFO "Failed to initialize L1 Instruction SRAM\n");
return;
}
per_cpu(free_l1_inst_sram_head, cpu).next->paddr =
(void *)get_l1_code_start_cpu(cpu) + (_etext_l1 - _stext_l1);
per_cpu(free_l1_inst_sram_head, cpu).next->size =
L1_CODE_LENGTH - (_etext_l1 - _stext_l1);
per_cpu(free_l1_inst_sram_head, cpu).next->pid = 0;
per_cpu(free_l1_inst_sram_head, cpu).next->next = NULL;
per_cpu(used_l1_inst_sram_head, cpu).next = NULL;
printk(KERN_INFO "Blackfin L1 Instruction SRAM: %d KB (%d KB free)\n",
L1_CODE_LENGTH >> 10,
per_cpu(free_l1_inst_sram_head, cpu).next->size >> 10);
/* mutex initialize */
spin_lock_init(&per_cpu(l1_inst_sram_lock, cpu));
}
#endif
}
static void __init l2_sram_init(void)
{
#if L2_LENGTH != 0
free_l2_sram_head.next =
kmem_cache_alloc(sram_piece_cache, GFP_KERNEL);
if (!free_l2_sram_head.next) {
printk(KERN_INFO "Fail to initialize L2 SRAM.\n");
return;
}
free_l2_sram_head.next->paddr =
(void *)L2_START + (_ebss_l2 - _stext_l2);
free_l2_sram_head.next->size =
L2_LENGTH - (_ebss_l2 - _stext_l2);
free_l2_sram_head.next->pid = 0;
free_l2_sram_head.next->next = NULL;
used_l2_sram_head.next = NULL;
printk(KERN_INFO "Blackfin L2 SRAM: %d KB (%d KB free)\n",
L2_LENGTH >> 10,
free_l2_sram_head.next->size >> 10);
/* mutex initialize */
spin_lock_init(&l2_sram_lock);
#endif
}
static int __init bfin_sram_init(void)
{
sram_piece_cache = kmem_cache_create("sram_piece_cache",
sizeof(struct sram_piece),
0, SLAB_PANIC, NULL);
l1sram_init();
l1_data_sram_init();
l1_inst_sram_init();
l2_sram_init();
return 0;
}
pure_initcall(bfin_sram_init);
/* SRAM allocate function */
static void *_sram_alloc(size_t size, struct sram_piece *pfree_head,
struct sram_piece *pused_head)
{
struct sram_piece *pslot, *plast, *pavail;
if (size <= 0 || !pfree_head || !pused_head)
return NULL;
/* Align the size */
size = (size + 3) & ~3;
pslot = pfree_head->next;
plast = pfree_head;
/* search an available piece slot */
while (pslot != NULL && size > pslot->size) {
plast = pslot;
pslot = pslot->next;
}
if (!pslot)
return NULL;
if (pslot->size == size) {
plast->next = pslot->next;
pavail = pslot;
} else {
/* use atomic so our L1 allocator can be used atomically */
pavail = kmem_cache_alloc(sram_piece_cache, GFP_ATOMIC);
if (!pavail)
return NULL;
pavail->paddr = pslot->paddr;
pavail->size = size;
pslot->paddr += size;
pslot->size -= size;
}
pavail->pid = current->pid;
pslot = pused_head->next;
plast = pused_head;
/* insert new piece into used piece list !!! */
while (pslot != NULL && pavail->paddr < pslot->paddr) {
plast = pslot;
pslot = pslot->next;
}
pavail->next = pslot;
plast->next = pavail;
return pavail->paddr;
}
/* Allocate the largest available block. */
static void *_sram_alloc_max(struct sram_piece *pfree_head,
struct sram_piece *pused_head,
unsigned long *psize)
{
struct sram_piece *pslot, *pmax;
if (!pfree_head || !pused_head)
return NULL;
pmax = pslot = pfree_head->next;
/* search an available piece slot */
while (pslot != NULL) {
if (pslot->size > pmax->size)
pmax = pslot;
pslot = pslot->next;
}
if (!pmax)
return NULL;
*psize = pmax->size;
return _sram_alloc(*psize, pfree_head, pused_head);
}
/* SRAM free function */
static int _sram_free(const void *addr,
struct sram_piece *pfree_head,
struct sram_piece *pused_head)
{
struct sram_piece *pslot, *plast, *pavail;
if (!pfree_head || !pused_head)
return -1;
/* search the relevant memory slot */
pslot = pused_head->next;
plast = pused_head;
/* search an available piece slot */
while (pslot != NULL && pslot->paddr != addr) {
plast = pslot;
pslot = pslot->next;
}
if (!pslot)
return -1;
plast->next = pslot->next;
pavail = pslot;
pavail->pid = 0;
/* insert free pieces back to the free list */
pslot = pfree_head->next;
plast = pfree_head;
while (pslot != NULL && addr > pslot->paddr) {
plast = pslot;
pslot = pslot->next;
}
if (plast != pfree_head && plast->paddr + plast->size == pavail->paddr) {
plast->size += pavail->size;
kmem_cache_free(sram_piece_cache, pavail);
} else {
pavail->next = plast->next;
plast->next = pavail;
plast = pavail;
}
if (pslot && plast->paddr + plast->size == pslot->paddr) {
plast->size += pslot->size;
plast->next = pslot->next;
kmem_cache_free(sram_piece_cache, pslot);
}
return 0;
}
int sram_free(const void *addr)
{
#if L1_CODE_LENGTH != 0
if (addr >= (void *)get_l1_code_start()
&& addr < (void *)(get_l1_code_start() + L1_CODE_LENGTH))
return l1_inst_sram_free(addr);
else
#endif
#if L1_DATA_A_LENGTH != 0
if (addr >= (void *)get_l1_data_a_start()
&& addr < (void *)(get_l1_data_a_start() + L1_DATA_A_LENGTH))
return l1_data_A_sram_free(addr);
else
#endif
#if L1_DATA_B_LENGTH != 0
if (addr >= (void *)get_l1_data_b_start()
&& addr < (void *)(get_l1_data_b_start() + L1_DATA_B_LENGTH))
return l1_data_B_sram_free(addr);
else
#endif
#if L2_LENGTH != 0
if (addr >= (void *)L2_START
&& addr < (void *)(L2_START + L2_LENGTH))
return l2_sram_free(addr);
else
#endif
return -1;
}
EXPORT_SYMBOL(sram_free);
void *l1_data_A_sram_alloc(size_t size)
{
#if L1_DATA_A_LENGTH != 0
unsigned long flags;
void *addr;
unsigned int cpu;
cpu = smp_processor_id();
/* add mutex operation */
spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags);
addr = _sram_alloc(size, &per_cpu(free_l1_data_A_sram_head, cpu),
&per_cpu(used_l1_data_A_sram_head, cpu));
/* add mutex operation */
spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags);
pr_debug("Allocated address in l1_data_A_sram_alloc is 0x%lx+0x%lx\n",
(long unsigned int)addr, size);
return addr;
#else
return NULL;
#endif
}
EXPORT_SYMBOL(l1_data_A_sram_alloc);
int l1_data_A_sram_free(const void *addr)
{
#if L1_DATA_A_LENGTH != 0
unsigned long flags;
int ret;
unsigned int cpu;
cpu = smp_processor_id();
/* add mutex operation */
spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags);
ret = _sram_free(addr, &per_cpu(free_l1_data_A_sram_head, cpu),
&per_cpu(used_l1_data_A_sram_head, cpu));
/* add mutex operation */
spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags);
return ret;
#else
return -1;
#endif
}
EXPORT_SYMBOL(l1_data_A_sram_free);
void *l1_data_B_sram_alloc(size_t size)
{
#if L1_DATA_B_LENGTH != 0
unsigned long flags;
void *addr;
unsigned int cpu;
cpu = smp_processor_id();
/* add mutex operation */
spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags);
addr = _sram_alloc(size, &per_cpu(free_l1_data_B_sram_head, cpu),
&per_cpu(used_l1_data_B_sram_head, cpu));
/* add mutex operation */
spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags);
pr_debug("Allocated address in l1_data_B_sram_alloc is 0x%lx+0x%lx\n",
(long unsigned int)addr, size);
return addr;
#else
return NULL;
#endif
}
EXPORT_SYMBOL(l1_data_B_sram_alloc);
int l1_data_B_sram_free(const void *addr)
{
#if L1_DATA_B_LENGTH != 0
unsigned long flags;
int ret;
unsigned int cpu;
cpu = smp_processor_id();
/* add mutex operation */
spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags);
ret = _sram_free(addr, &per_cpu(free_l1_data_B_sram_head, cpu),
&per_cpu(used_l1_data_B_sram_head, cpu));
/* add mutex operation */
spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags);
return ret;
#else
return -1;
#endif
}
EXPORT_SYMBOL(l1_data_B_sram_free);
void *l1_data_sram_alloc(size_t size)
{
void *addr = l1_data_A_sram_alloc(size);
if (!addr)
addr = l1_data_B_sram_alloc(size);
return addr;
}
EXPORT_SYMBOL(l1_data_sram_alloc);
void *l1_data_sram_zalloc(size_t size)
{
void *addr = l1_data_sram_alloc(size);
if (addr)
memset(addr, 0x00, size);
return addr;
}
EXPORT_SYMBOL(l1_data_sram_zalloc);
int l1_data_sram_free(const void *addr)
{
int ret;
ret = l1_data_A_sram_free(addr);
if (ret == -1)
ret = l1_data_B_sram_free(addr);
return ret;
}
EXPORT_SYMBOL(l1_data_sram_free);
void *l1_inst_sram_alloc(size_t size)
{
#if L1_CODE_LENGTH != 0
unsigned long flags;
void *addr;
unsigned int cpu;
cpu = smp_processor_id();
/* add mutex operation */
spin_lock_irqsave(&per_cpu(l1_inst_sram_lock, cpu), flags);
addr = _sram_alloc(size, &per_cpu(free_l1_inst_sram_head, cpu),
&per_cpu(used_l1_inst_sram_head, cpu));
/* add mutex operation */
spin_unlock_irqrestore(&per_cpu(l1_inst_sram_lock, cpu), flags);
pr_debug("Allocated address in l1_inst_sram_alloc is 0x%lx+0x%lx\n",
(long unsigned int)addr, size);
return addr;
#else
return NULL;
#endif
}
EXPORT_SYMBOL(l1_inst_sram_alloc);
int l1_inst_sram_free(const void *addr)
{
#if L1_CODE_LENGTH != 0
unsigned long flags;
int ret;
unsigned int cpu;
cpu = smp_processor_id();
/* add mutex operation */
spin_lock_irqsave(&per_cpu(l1_inst_sram_lock, cpu), flags);
ret = _sram_free(addr, &per_cpu(free_l1_inst_sram_head, cpu),
&per_cpu(used_l1_inst_sram_head, cpu));
/* add mutex operation */
spin_unlock_irqrestore(&per_cpu(l1_inst_sram_lock, cpu), flags);
return ret;
#else
return -1;
#endif
}
EXPORT_SYMBOL(l1_inst_sram_free);
/* L1 Scratchpad memory allocate function */
void *l1sram_alloc(size_t size)
{
unsigned long flags;
void *addr;
unsigned int cpu;
cpu = smp_processor_id();
/* add mutex operation */
spin_lock_irqsave(&per_cpu(l1sram_lock, cpu), flags);
addr = _sram_alloc(size, &per_cpu(free_l1_ssram_head, cpu),
&per_cpu(used_l1_ssram_head, cpu));
/* add mutex operation */
spin_unlock_irqrestore(&per_cpu(l1sram_lock, cpu), flags);
return addr;
}
/* L1 Scratchpad memory allocate function */
void *l1sram_alloc_max(size_t *psize)
{
unsigned long flags;
void *addr;
unsigned int cpu;
cpu = smp_processor_id();
/* add mutex operation */
spin_lock_irqsave(&per_cpu(l1sram_lock, cpu), flags);
addr = _sram_alloc_max(&per_cpu(free_l1_ssram_head, cpu),
&per_cpu(used_l1_ssram_head, cpu), psize);
/* add mutex operation */
spin_unlock_irqrestore(&per_cpu(l1sram_lock, cpu), flags);
return addr;
}
/* L1 Scratchpad memory free function */
int l1sram_free(const void *addr)
{
unsigned long flags;
int ret;
unsigned int cpu;
cpu = smp_processor_id();
/* add mutex operation */
spin_lock_irqsave(&per_cpu(l1sram_lock, cpu), flags);
ret = _sram_free(addr, &per_cpu(free_l1_ssram_head, cpu),
&per_cpu(used_l1_ssram_head, cpu));
/* add mutex operation */
spin_unlock_irqrestore(&per_cpu(l1sram_lock, cpu), flags);
return ret;
}
void *l2_sram_alloc(size_t size)
{
#if L2_LENGTH != 0
unsigned long flags;
void *addr;
/* add mutex operation */
spin_lock_irqsave(&l2_sram_lock, flags);
addr = _sram_alloc(size, &free_l2_sram_head,
&used_l2_sram_head);
/* add mutex operation */
spin_unlock_irqrestore(&l2_sram_lock, flags);
pr_debug("Allocated address in l2_sram_alloc is 0x%lx+0x%lx\n",
(long unsigned int)addr, size);
return addr;
#else
return NULL;
#endif
}
EXPORT_SYMBOL(l2_sram_alloc);
void *l2_sram_zalloc(size_t size)
{
void *addr = l2_sram_alloc(size);
if (addr)
memset(addr, 0x00, size);
return addr;
}
EXPORT_SYMBOL(l2_sram_zalloc);
int l2_sram_free(const void *addr)
{
#if L2_LENGTH != 0
unsigned long flags;
int ret;
/* add mutex operation */
spin_lock_irqsave(&l2_sram_lock, flags);
ret = _sram_free(addr, &free_l2_sram_head,
&used_l2_sram_head);
/* add mutex operation */
spin_unlock_irqrestore(&l2_sram_lock, flags);
return ret;
#else
return -1;
#endif
}
EXPORT_SYMBOL(l2_sram_free);
int sram_free_with_lsl(const void *addr)
{
struct sram_list_struct *lsl, **tmp;
struct mm_struct *mm = current->mm;
int ret = -1;
for (tmp = &mm->context.sram_list; *tmp; tmp = &(*tmp)->next)
if ((*tmp)->addr == addr) {
lsl = *tmp;
ret = sram_free(addr);
*tmp = lsl->next;
kfree(lsl);
break;
}
return ret;
}
EXPORT_SYMBOL(sram_free_with_lsl);
/* Allocate memory and keep in L1 SRAM List (lsl) so that the resources are
* tracked. These are designed for userspace so that when a process exits,
* we can safely reap their resources.
*/
void *sram_alloc_with_lsl(size_t size, unsigned long flags)
{
void *addr = NULL;
struct sram_list_struct *lsl = NULL;
struct mm_struct *mm = current->mm;
lsl = kzalloc(sizeof(struct sram_list_struct), GFP_KERNEL);
if (!lsl)
return NULL;
if (flags & L1_INST_SRAM)
addr = l1_inst_sram_alloc(size);
if (addr == NULL && (flags & L1_DATA_A_SRAM))
addr = l1_data_A_sram_alloc(size);
if (addr == NULL && (flags & L1_DATA_B_SRAM))
addr = l1_data_B_sram_alloc(size);
if (addr == NULL && (flags & L2_SRAM))
addr = l2_sram_alloc(size);
if (addr == NULL) {
kfree(lsl);
return NULL;
}
lsl->addr = addr;
lsl->length = size;
lsl->next = mm->context.sram_list;
mm->context.sram_list = lsl;
return addr;
}
EXPORT_SYMBOL(sram_alloc_with_lsl);
#ifdef CONFIG_PROC_FS
/* Once we get a real allocator, we'll throw all of this away.
* Until then, we need some sort of visibility into the L1 alloc.
*/
/* Need to keep line of output the same. Currently, that is 44 bytes
* (including newline).
*/
static int _sram_proc_show(struct seq_file *m, const char *desc,
struct sram_piece *pfree_head,
struct sram_piece *pused_head)
{
struct sram_piece *pslot;
if (!pfree_head || !pused_head)
return -1;
seq_printf(m, "--- SRAM %-14s Size PID State \n", desc);
/* search the relevant memory slot */
pslot = pused_head->next;
while (pslot != NULL) {
seq_printf(m, "%p-%p %10i %5i %-10s\n",
pslot->paddr, pslot->paddr + pslot->size,
pslot->size, pslot->pid, "ALLOCATED");
pslot = pslot->next;
}
pslot = pfree_head->next;
while (pslot != NULL) {
seq_printf(m, "%p-%p %10i %5i %-10s\n",
pslot->paddr, pslot->paddr + pslot->size,
pslot->size, pslot->pid, "FREE");
pslot = pslot->next;
}
return 0;
}
static int sram_proc_show(struct seq_file *m, void *v)
{
unsigned int cpu;
for (cpu = 0; cpu < num_possible_cpus(); ++cpu) {
if (_sram_proc_show(m, "Scratchpad",
&per_cpu(free_l1_ssram_head, cpu), &per_cpu(used_l1_ssram_head, cpu)))
goto not_done;
#if L1_DATA_A_LENGTH != 0
if (_sram_proc_show(m, "L1 Data A",
&per_cpu(free_l1_data_A_sram_head, cpu),
&per_cpu(used_l1_data_A_sram_head, cpu)))
goto not_done;
#endif
#if L1_DATA_B_LENGTH != 0
if (_sram_proc_show(m, "L1 Data B",
&per_cpu(free_l1_data_B_sram_head, cpu),
&per_cpu(used_l1_data_B_sram_head, cpu)))
goto not_done;
#endif
#if L1_CODE_LENGTH != 0
if (_sram_proc_show(m, "L1 Instruction",
&per_cpu(free_l1_inst_sram_head, cpu),
&per_cpu(used_l1_inst_sram_head, cpu)))
goto not_done;
#endif
}
#if L2_LENGTH != 0
if (_sram_proc_show(m, "L2", &free_l2_sram_head, &used_l2_sram_head))
goto not_done;
#endif
not_done:
return 0;
}
static int sram_proc_open(struct inode *inode, struct file *file)
{
return single_open(file, sram_proc_show, NULL);
}
static const struct file_operations sram_proc_ops = {
.open = sram_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
static int __init sram_proc_init(void)
{
struct proc_dir_entry *ptr;
ptr = proc_create("sram", S_IRUGO, NULL, &sram_proc_ops);
if (!ptr) {
printk(KERN_WARNING "unable to create /proc/sram\n");
return -1;
}
return 0;
}
late_initcall(sram_proc_init);
#endif
| gpl-2.0 |
aquarism5-dev/android_kernel_bq_piccolo | drivers/staging/rtl8192e/rtl8192e/r8192E_hwimg.c | 8020 | 235941 | /******************************************************************************
* Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
******************************************************************************/
/*Created on 2008/11/18, 3: 7*/
#include "r8192E_hwimg.h"
u8 Rtl8192PciEFwBootArray[BootArrayLengthPciE] = {
0x10,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x3c,0x08,0xbf,0xc0,0x25,0x08,0x00,0x08,
0x3c,0x09,0xb0,0x03,0xad,0x28,0x00,0x20,0x40,0x80,0x68,0x00,0x00,0x00,0x00,0x00,
0x3c,0x0a,0xd0,0x00,0x40,0x8a,0x60,0x00,0x00,0x00,0x00,0x00,0x3c,0x08,0x80,0x01,
0x25,0x08,0xa8,0x04,0x24,0x09,0x00,0x01,0x3c,0x01,0x7f,0xff,0x34,0x21,0xff,0xff,
0x01,0x01,0x50,0x24,0x00,0x09,0x48,0x40,0x35,0x29,0x00,0x01,0x01,0x2a,0x10,0x2b,
0x14,0x40,0xff,0xfc,0x00,0x00,0x00,0x00,0x3c,0x0a,0x00,0x00,0x25,0x4a,0x00,0x00,
0x4c,0x8a,0x00,0x00,0x4c,0x89,0x08,0x00,0x00,0x00,0x00,0x00,0x3c,0x08,0x80,0x01,
0x25,0x08,0xa8,0x04,0x3c,0x01,0x80,0x00,0x01,0x21,0x48,0x25,0x3c,0x0a,0xbf,0xc0,
0x25,0x4a,0x00,0x7c,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0xad,0x00,0x00,0x00,
0x21,0x08,0x00,0x04,0x01,0x09,0x10,0x2b,0x14,0x40,0xff,0xf8,0x00,0x00,0x00,0x00,
0x3c,0x08,0x80,0x01,0x25,0x08,0x7f,0xff,0x24,0x09,0x00,0x01,0x3c,0x01,0x7f,0xff,
0x34,0x21,0xff,0xff,0x01,0x01,0x50,0x24,0x00,0x09,0x48,0x40,0x35,0x29,0x00,0x01,
0x01,0x2a,0x10,0x2b,0x14,0x40,0xff,0xfc,0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x01,
0x25,0x4a,0x00,0x00,0x3c,0x01,0x7f,0xff,0x34,0x21,0xff,0xff,0x01,0x41,0x50,0x24,
0x3c,0x09,0x00,0x01,0x35,0x29,0x7f,0xff,0x4c,0x8a,0x20,0x00,0x4c,0x89,0x28,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x24,0x08,0x04,0x10,
0x00,0x00,0x00,0x00,0x40,0x88,0xa0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x3c,0x08,0xbf,0xc0,0x00,0x00,0x00,0x00,0x8d,0x09,0x00,0x00,0x00,0x00,0x00,0x00,
0x3c,0x0a,0xbf,0xc0,0x25,0x4a,0x01,0x20,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,
0x3c,0x08,0xb0,0x03,0x8d,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x35,0x29,0x00,0x10,
0xad,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x3c,0x08,0x80,0x00,0x25,0x08,0x4b,0x94,
0x01,0x00,0x00,0x08,0x00,0x00,0x00,0x00,};
u8 Rtl8192PciEFwMainArray[MainArrayLengthPciE] = {
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x40,0x04,0x68,0x00,0x40,0x05,0x70,0x00,0x40,0x06,0x40,0x00,0x0c,0x00,0x12,0x98,
0x00,0x00,0x00,0x00,0x40,0x1a,0x68,0x00,0x33,0x5b,0x00,0x3c,0x17,0x60,0x00,0x09,
0x00,0x00,0x00,0x00,0x40,0x1b,0x60,0x00,0x00,0x00,0x00,0x00,0x03,0x5b,0xd0,0x24,
0x40,0x1a,0x70,0x00,0x03,0x40,0x00,0x08,0x42,0x00,0x00,0x10,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x3c,0x02,0xff,0xff,0x34,0x42,0xff,0xff,0x8c,0x43,0x00,0x00,
0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x00,0xd0,
0xac,0x62,0x00,0x00,0x00,0x00,0x20,0x21,0x27,0x85,0x8b,0x70,0x00,0x85,0x18,0x21,
0x24,0x84,0x00,0x01,0x28,0x82,0x00,0x0a,0x14,0x40,0xff,0xfc,0xa0,0x60,0x00,0x00,
0x27,0x82,0x8b,0x7a,0x24,0x04,0x00,0x06,0x24,0x84,0xff,0xff,0xa4,0x40,0x00,0x00,
0x04,0x81,0xff,0xfd,0x24,0x42,0x00,0x02,0x24,0x02,0x00,0x03,0xa3,0x82,0x8b,0x70,
0x24,0x02,0x00,0x0a,0x24,0x03,0x09,0xc4,0xa3,0x82,0x8b,0x72,0x24,0x02,0x00,0x04,
0x24,0x04,0x00,0x01,0x24,0x05,0x00,0x02,0xa7,0x83,0x8b,0x86,0xa3,0x82,0x8b,0x78,
0x24,0x03,0x04,0x00,0x24,0x02,0x02,0x00,0xaf,0x83,0x8b,0x8c,0xa3,0x85,0x8b,0x79,
0xa7,0x82,0x8b,0x7a,0xa7,0x84,0x8b,0x7c,0xaf,0x84,0x8b,0x88,0xa3,0x84,0x8b,0x71,
0xa3,0x80,0x8b,0x73,0xa3,0x80,0x8b,0x74,0xa3,0x80,0x8b,0x75,0xa3,0x84,0x8b,0x76,
0xa3,0x85,0x8b,0x77,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
0x3c,0x02,0x80,0x00,0x24,0x42,0x01,0x7c,0x34,0x63,0x00,0x20,0xac,0x62,0x00,0x00,
0x27,0x84,0x8b,0x98,0x00,0x00,0x10,0x21,0x24,0x42,0x00,0x01,0x00,0x02,0x16,0x00,
0x00,0x02,0x16,0x03,0x28,0x43,0x00,0x03,0xac,0x80,0xff,0xfc,0xa0,0x80,0x00,0x00,
0x14,0x60,0xff,0xf9,0x24,0x84,0x00,0x0c,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x01,0xc0,
0x3c,0x08,0xb0,0x03,0xac,0x62,0x00,0x00,0x35,0x08,0x00,0x70,0x8d,0x02,0x00,0x00,
0x00,0xa0,0x48,0x21,0x00,0x04,0x26,0x00,0x00,0x02,0x2a,0x43,0x00,0x06,0x36,0x00,
0x00,0x07,0x3e,0x00,0x00,0x02,0x12,0x03,0x29,0x23,0x00,0x03,0x00,0x04,0x56,0x03,
0x00,0x06,0x36,0x03,0x00,0x07,0x3e,0x03,0x30,0x48,0x00,0x01,0x10,0x60,0x00,0x11,
0x30,0xa5,0x00,0x07,0x24,0x02,0x00,0x02,0x00,0x49,0x10,0x23,0x00,0x45,0x10,0x07,
0x30,0x42,0x00,0x01,0x10,0x40,0x00,0x66,0x00,0x00,0x00,0x00,0x8f,0xa2,0x00,0x10,
0x00,0x00,0x00,0x00,0x00,0x02,0x21,0x43,0x11,0x00,0x00,0x10,0x00,0x07,0x20,0x0b,
0x15,0x20,0x00,0x06,0x24,0x02,0x00,0x01,0x3c,0x02,0xb0,0x05,0x34,0x42,0x01,0x20,
0xa4,0x44,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x11,0x22,0x00,0x04,
0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x05,0x08,0x00,0x00,0x94,0x34,0x42,0x01,0x24,
0x3c,0x02,0xb0,0x05,0x08,0x00,0x00,0x94,0x34,0x42,0x01,0x22,0x15,0x20,0x00,0x54,
0x24,0x02,0x00,0x01,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x74,0x90,0x43,0x00,0x00,
0x00,0x00,0x00,0x00,0xaf,0x83,0x8b,0x94,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x70,
0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x6b,0x00,0x08,0x11,0x60,0x00,0x18,
0x00,0x09,0x28,0x40,0x00,0x00,0x40,0x21,0x27,0x85,0x8b,0x90,0x8c,0xa3,0x00,0x00,
0x8c,0xa2,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x62,0x38,0x23,0x00,0x43,0x10,0x2a,
0x10,0x40,0x00,0x3d,0x00,0x00,0x00,0x00,0xac,0xa7,0x00,0x00,0x25,0x02,0x00,0x01,
0x00,0x02,0x16,0x00,0x00,0x02,0x46,0x03,0x29,0x03,0x00,0x03,0x14,0x60,0xff,0xf3,
0x24,0xa5,0x00,0x0c,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x70,0x90,0x62,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x4b,0x10,0x23,0xa0,0x62,0x00,0x00,0x00,0x09,0x28,0x40,
0x00,0xa9,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x8b,0x98,0x00,0x0a,0x20,0x0b,
0x00,0x43,0x18,0x21,0x10,0xc0,0x00,0x05,0x00,0x00,0x38,0x21,0x80,0x62,0x00,0x01,
0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x05,0x00,0x00,0x00,0x00,0x80,0x62,0x00,0x00,
0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x03,0x00,0xa9,0x10,0x21,0x24,0x07,0x00,0x01,
0x00,0xa9,0x10,0x21,0x00,0x02,0x30,0x80,0x27,0x82,0x8b,0x98,0xa0,0x67,0x00,0x01,
0x00,0xc2,0x38,0x21,0x80,0xe3,0x00,0x01,0x00,0x00,0x00,0x00,0x10,0x60,0x00,0x07,
0x00,0x00,0x00,0x00,0x27,0x83,0x8b,0x90,0x00,0xc3,0x18,0x21,0x8c,0x62,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x44,0x10,0x21,0xac,0x62,0x00,0x00,0x27,0x85,0x8b,0x94,
0x27,0x82,0x8b,0x90,0x00,0xc5,0x28,0x21,0x00,0xc2,0x10,0x21,0x8c,0x43,0x00,0x00,
0x8c,0xa4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x64,0x18,0x2a,0x14,0x60,0x00,0x03,
0x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,0xa0,0xe2,0x00,0x00,0xa0,0xe0,0x00,0x00,
0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0xb7,0xac,0xa0,0x00,0x00,
0x11,0x22,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x7c,
0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0xaf,0x83,0x8b,0xac,0x08,0x00,0x00,0xa7,
0x3c,0x02,0xb0,0x03,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x78,0x90,0x43,0x00,0x00,
0x00,0x00,0x00,0x00,0xaf,0x83,0x8b,0xa0,0x08,0x00,0x00,0xa7,0x3c,0x02,0xb0,0x03,
0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x04,0x10,
0x3c,0x05,0xb0,0x03,0xac,0x62,0x00,0x00,0x34,0xa5,0x00,0x70,0x8c,0xa2,0x00,0x00,
0x90,0x84,0x00,0x08,0x3c,0x06,0xb0,0x03,0x00,0x02,0x16,0x00,0x2c,0x83,0x00,0x03,
0x34,0xc6,0x00,0x72,0x24,0x07,0x00,0x01,0x10,0x60,0x00,0x11,0x00,0x02,0x2f,0xc2,
0x90,0xc2,0x00,0x00,0x00,0x00,0x18,0x21,0x00,0x02,0x16,0x00,0x10,0xa7,0x00,0x09,
0x00,0x02,0x16,0x03,0x14,0x80,0x00,0x0c,0x30,0x43,0x00,0x03,0x83,0x82,0x8b,0x98,
0x00,0x00,0x00,0x00,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x00,0x02,0x16,0x00,
0x00,0x02,0x1e,0x03,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x72,0xa0,0x43,0x00,0x00,
0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0x45,0x00,0x05,0x10,0x87,0x00,0x04,
0x30,0x43,0x00,0x06,0x93,0x82,0x8b,0xb0,0x08,0x00,0x01,0x1f,0x00,0x43,0x10,0x21,
0x83,0x82,0x8b,0xa4,0x00,0x00,0x00,0x00,0x00,0x02,0x10,0x40,0x08,0x00,0x01,0x1f,
0x00,0x45,0x10,0x21,0x10,0x80,0x00,0x05,0x00,0x00,0x18,0x21,0x24,0x63,0x00,0x01,
0x00,0x64,0x10,0x2b,0x14,0x40,0xff,0xfd,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x24,0x42,0x04,0xe4,
0x3c,0x04,0xb0,0x02,0x34,0x63,0x00,0x20,0xac,0x62,0x00,0x00,0x34,0x84,0x00,0x08,
0x24,0x02,0x00,0x01,0xaf,0x84,0x8b,0xc0,0xa3,0x82,0x8b,0xd0,0xa7,0x80,0x8b,0xc4,
0xa7,0x80,0x8b,0xc6,0xaf,0x80,0x8b,0xc8,0xaf,0x80,0x8b,0xcc,0x03,0xe0,0x00,0x08,
0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,
0x24,0x42,0x05,0x24,0x3c,0x04,0xb0,0x03,0xac,0x62,0x00,0x00,0x34,0x84,0x00,0xac,
0x80,0xa2,0x00,0x15,0x8c,0x83,0x00,0x00,0x27,0xbd,0xff,0xf0,0x00,0x43,0x10,0x21,
0xac,0x82,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x10,0x3c,0x02,0xb0,0x03,
0x3c,0x03,0x80,0x00,0x34,0x42,0x00,0x20,0x24,0x63,0x05,0x5c,0x27,0xbd,0xff,0xe0,
0xac,0x43,0x00,0x00,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x18,
0x8f,0x90,0x8b,0xc0,0x0c,0x00,0x02,0x98,0x00,0x80,0x88,0x21,0x14,0x40,0x00,0x2a,
0x3c,0x02,0x00,0x80,0x16,0x20,0x00,0x02,0x34,0x42,0x02,0x01,0x24,0x02,0x02,0x01,
0xae,0x02,0x00,0x00,0x97,0x84,0x8b,0xc4,0x97,0x82,0x8b,0xc6,0x3c,0x03,0xb0,0x02,
0x00,0x83,0x20,0x21,0x24,0x42,0x00,0x04,0xa7,0x82,0x8b,0xc6,0xa4,0x82,0x00,0x00,
0x8f,0x84,0x8b,0xc8,0x8f,0x82,0x8b,0xc0,0x93,0x85,0x8b,0x72,0x24,0x84,0x00,0x01,
0x24,0x42,0x00,0x04,0x24,0x03,0x8f,0xff,0x3c,0x07,0xb0,0x06,0x3c,0x06,0xb0,0x03,
0x00,0x43,0x10,0x24,0x00,0x85,0x28,0x2a,0x34,0xe7,0x80,0x18,0xaf,0x82,0x8b,0xc0,
0xaf,0x84,0x8b,0xc8,0x10,0xa0,0x00,0x08,0x34,0xc6,0x01,0x08,0x8f,0x83,0x8b,0xcc,
0x8f,0x84,0x8b,0x8c,0x8c,0xc2,0x00,0x00,0x00,0x64,0x18,0x21,0x00,0x43,0x10,0x2b,
0x14,0x40,0x00,0x09,0x00,0x00,0x00,0x00,0x8c,0xe2,0x00,0x00,0x3c,0x03,0x0f,0x00,
0x3c,0x04,0x04,0x00,0x00,0x43,0x10,0x24,0x10,0x44,0x00,0x03,0x00,0x00,0x00,0x00,
0x0c,0x00,0x04,0x96,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,
0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x27,0xbd,0xff,0xd8,0x3c,0x02,0xb0,0x03,
0x3c,0x03,0x80,0x00,0x24,0x63,0x06,0x48,0xaf,0xb0,0x00,0x10,0x34,0x42,0x00,0x20,
0x8f,0x90,0x8b,0xc0,0xac,0x43,0x00,0x00,0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,
0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x20,0x00,0x80,0x88,0x21,0x00,0xa0,0x90,0x21,
0x0c,0x00,0x02,0x98,0x00,0xc0,0x98,0x21,0x24,0x07,0x8f,0xff,0x14,0x40,0x00,0x19,
0x26,0x03,0x00,0x04,0x24,0x02,0x0e,0x03,0xae,0x02,0x00,0x00,0x00,0x67,0x80,0x24,
0x26,0x02,0x00,0x04,0xae,0x11,0x00,0x00,0x00,0x47,0x80,0x24,0x97,0x86,0x8b,0xc4,
0x26,0x03,0x00,0x04,0xae,0x12,0x00,0x00,0x00,0x67,0x80,0x24,0xae,0x13,0x00,0x00,
0x8f,0x84,0x8b,0xc0,0x3c,0x02,0xb0,0x02,0x97,0x85,0x8b,0xc6,0x00,0xc2,0x30,0x21,
0x8f,0x82,0x8b,0xc8,0x24,0x84,0x00,0x10,0x24,0xa5,0x00,0x10,0x00,0x87,0x20,0x24,
0x24,0x42,0x00,0x01,0xa7,0x85,0x8b,0xc6,0xaf,0x84,0x8b,0xc0,0xaf,0x82,0x8b,0xc8,
0xa4,0xc5,0x00,0x00,0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,
0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,
0x94,0x82,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x42,0xe0,0x00,0x14,0x40,0x00,0x14,
0x00,0x00,0x00,0x00,0x90,0x82,0x00,0x02,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfc,
0x00,0x82,0x28,0x21,0x8c,0xa4,0x00,0x00,0x3c,0x02,0x00,0x70,0x8c,0xa6,0x00,0x08,
0x00,0x82,0x10,0x21,0x2c,0x43,0x00,0x06,0x10,0x60,0x00,0x09,0x3c,0x03,0x80,0x01,
0x00,0x02,0x10,0x80,0x24,0x63,0x01,0xe8,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0xaf,0x86,0x80,0x14,
0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,
0x8c,0xa4,0x00,0x00,0x0c,0x00,0x17,0x84,0x00,0x00,0x00,0x00,0x08,0x00,0x01,0xdc,
0x00,0x00,0x00,0x00,0x0c,0x00,0x24,0x49,0x00,0xc0,0x20,0x21,0x08,0x00,0x01,0xdc,
0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x08,0x8c,0x44,0x00,0x00,
0x8f,0x82,0x80,0x18,0x3c,0x03,0x00,0x0f,0x34,0x63,0x42,0x40,0x00,0x43,0x10,0x21,
0x00,0x82,0x20,0x2b,0x10,0x80,0x00,0x09,0x24,0x03,0x00,0x05,0x8f,0x82,0x83,0x60,
0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xaf,0x82,0x83,0x60,0x10,0x43,0x00,0x03,
0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
0x8c,0x63,0x01,0x08,0x24,0x02,0x00,0x01,0xa3,0x82,0x80,0x11,0xaf,0x80,0x83,0x60,
0xaf,0x83,0x80,0x18,0x08,0x00,0x01,0xf9,0x00,0x00,0x00,0x00,0x30,0x84,0x00,0xff,
0x14,0x80,0x00,0x2f,0x00,0x00,0x00,0x00,0x8f,0x82,0x80,0x14,0xa3,0x85,0x83,0x93,
0x10,0x40,0x00,0x2b,0x2c,0xa2,0x00,0x04,0x14,0x40,0x00,0x06,0x00,0x05,0x10,0x40,
0x24,0xa2,0xff,0xfc,0x2c,0x42,0x00,0x08,0x10,0x40,0x00,0x09,0x24,0xa2,0xff,0xf0,
0x00,0x05,0x10,0x40,0x27,0x84,0x83,0x9c,0x00,0x44,0x10,0x21,0x94,0x43,0x00,0x00,
0x00,0x00,0x00,0x00,0x24,0x63,0x00,0x01,0x03,0xe0,0x00,0x08,0xa4,0x43,0x00,0x00,
0x2c,0x42,0x00,0x10,0x14,0x40,0x00,0x0a,0x00,0x05,0x10,0x40,0x24,0xa2,0xff,0xe0,
0x2c,0x42,0x00,0x10,0x14,0x40,0x00,0x06,0x00,0x05,0x10,0x40,0x24,0xa2,0xff,0xd0,
0x2c,0x42,0x00,0x10,0x10,0x40,0x00,0x09,0x24,0xa2,0xff,0xc0,0x00,0x05,0x10,0x40,
0x27,0x84,0x83,0x9c,0x00,0x44,0x10,0x21,0x94,0x43,0xff,0xf8,0x00,0x00,0x00,0x00,
0x24,0x63,0x00,0x01,0x03,0xe0,0x00,0x08,0xa4,0x43,0xff,0xf8,0x2c,0x42,0x00,0x10,
0x10,0x40,0x00,0x07,0x00,0x05,0x10,0x40,0x27,0x84,0x83,0x9c,0x00,0x44,0x10,0x21,
0x94,0x43,0xff,0xf8,0x00,0x00,0x00,0x00,0x24,0x63,0x00,0x01,0xa4,0x43,0xff,0xf8,
0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x8f,0x86,0x8b,0xc0,0x8f,0x82,0x80,0x14,
0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,0x10,0x40,0x00,0x2a,0x00,0xc0,0x38,0x21,
0x24,0x02,0x00,0x07,0x24,0x03,0xff,0x9c,0xa3,0x82,0x83,0x9b,0xa3,0x83,0x83,0x9a,
0x27,0x8a,0x83,0x98,0x00,0x00,0x20,0x21,0x24,0x09,0x8f,0xff,0x00,0x04,0x10,0x80,
0x00,0x4a,0x28,0x21,0x8c,0xa2,0x00,0x00,0x24,0xe3,0x00,0x04,0x24,0x88,0x00,0x01,
0xac,0xe2,0x00,0x00,0x10,0x80,0x00,0x02,0x00,0x69,0x38,0x24,0xac,0xa0,0x00,0x00,
0x31,0x04,0x00,0xff,0x2c,0x82,0x00,0x27,0x14,0x40,0xff,0xf5,0x00,0x04,0x10,0x80,
0x97,0x83,0x8b,0xc6,0x97,0x85,0x8b,0xc4,0x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x9c,
0x00,0xa2,0x28,0x21,0x3c,0x04,0xb0,0x06,0xa7,0x83,0x8b,0xc6,0x34,0x84,0x80,0x18,
0xa4,0xa3,0x00,0x00,0x8c,0x85,0x00,0x00,0x24,0x02,0x8f,0xff,0x24,0xc6,0x00,0x9c,
0x3c,0x03,0x0f,0x00,0x00,0xc2,0x30,0x24,0x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,
0xaf,0x86,0x8b,0xc0,0x10,0xa2,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x96,
0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
0x27,0xbd,0x00,0x18,0x8f,0x86,0x8b,0xc0,0x27,0xbd,0xff,0xc8,0x24,0x02,0x00,0x08,
0x24,0x03,0x00,0x20,0xaf,0xbf,0x00,0x30,0xa3,0xa2,0x00,0x13,0xa3,0xa3,0x00,0x12,
0xa7,0xa4,0x00,0x10,0x00,0xc0,0x28,0x21,0x27,0xa9,0x00,0x10,0x00,0x00,0x38,0x21,
0x24,0x08,0x8f,0xff,0x00,0x07,0x10,0x80,0x00,0x49,0x10,0x21,0x8c,0x44,0x00,0x00,
0x24,0xe3,0x00,0x01,0x30,0x67,0x00,0xff,0x24,0xa2,0x00,0x04,0x2c,0xe3,0x00,0x08,
0xac,0xa4,0x00,0x00,0x14,0x60,0xff,0xf7,0x00,0x48,0x28,0x24,0x97,0x83,0x8b,0xc6,
0x97,0x85,0x8b,0xc4,0x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x20,0x00,0xa2,0x28,0x21,
0x3c,0x04,0xb0,0x06,0xa7,0x83,0x8b,0xc6,0x34,0x84,0x80,0x18,0xa4,0xa3,0x00,0x00,
0x8c,0x85,0x00,0x00,0x24,0x02,0x8f,0xff,0x24,0xc6,0x00,0x20,0x3c,0x03,0x0f,0x00,
0x00,0xc2,0x30,0x24,0x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,0xaf,0x86,0x8b,0xc0,
0x10,0xa2,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x96,0x00,0x00,0x00,0x00,
0x8f,0xbf,0x00,0x30,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,
0x93,0x82,0x8b,0xd0,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x11,0x24,0x06,0x00,0x01,
0x8f,0x82,0x8b,0xc8,0x3c,0x05,0xb0,0x06,0x3c,0x04,0xb0,0x03,0x34,0xa5,0x80,0x18,
0x34,0x84,0x01,0x08,0x14,0x40,0x00,0x09,0x00,0x00,0x30,0x21,0x97,0x82,0x8b,0xc4,
0x8c,0x84,0x00,0x00,0x3c,0x03,0xb0,0x02,0x00,0x43,0x10,0x21,0xaf,0x84,0x8b,0xcc,
0xa7,0x80,0x8b,0xc6,0xac,0x40,0x00,0x00,0xac,0x40,0x00,0x04,0x8c,0xa2,0x00,0x00,
0x03,0xe0,0x00,0x08,0x00,0xc0,0x10,0x21,0x8f,0x86,0x8b,0xc0,0x8f,0x82,0x8b,0xc8,
0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,0x00,0xc0,0x40,0x21,0x14,0x40,0x00,0x0a,
0x00,0x40,0x50,0x21,0x00,0x00,0x38,0x21,0x27,0x89,0x83,0x68,0x24,0xe2,0x00,0x01,
0x00,0x07,0x18,0x80,0x30,0x47,0x00,0xff,0x00,0x69,0x18,0x21,0x2c,0xe2,0x00,0x0a,
0x14,0x40,0xff,0xfa,0xac,0x60,0x00,0x00,0x3c,0x02,0x00,0x80,0x10,0x82,0x00,0x6f,
0x00,0x00,0x00,0x00,0x97,0x82,0x83,0x6e,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,
0xa7,0x82,0x83,0x6e,0x90,0xa3,0x00,0x15,0x97,0x82,0x83,0x70,0x00,0x03,0x1e,0x00,
0x00,0x03,0x1e,0x03,0x00,0x43,0x10,0x21,0xa7,0x82,0x83,0x70,0x8c,0xa4,0x00,0x20,
0x3c,0x02,0x00,0x60,0x3c,0x03,0x00,0x20,0x00,0x82,0x20,0x24,0x10,0x83,0x00,0x54,
0x00,0x00,0x00,0x00,0x14,0x80,0x00,0x47,0x00,0x00,0x00,0x00,0x97,0x82,0x83,0x74,
0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xa7,0x82,0x83,0x74,0x84,0xa3,0x00,0x06,
0x8f,0x82,0x83,0x84,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x21,0xaf,0x82,0x83,0x84,
0x25,0x42,0x00,0x01,0x28,0x43,0x27,0x10,0xaf,0x82,0x8b,0xc8,0x10,0x60,0x00,0x09,
0x24,0x02,0x00,0x04,0x93,0x83,0x80,0x11,0x24,0x02,0x00,0x01,0x10,0x62,0x00,0x05,
0x24,0x02,0x00,0x04,0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
0x27,0xbd,0x00,0x18,0x24,0x03,0x00,0x28,0xa3,0x83,0x83,0x6a,0xa3,0x82,0x83,0x6b,
0x90,0xa2,0x00,0x18,0x93,0x83,0x83,0x93,0x00,0x00,0x38,0x21,0x00,0x02,0x16,0x00,
0x00,0x02,0x16,0x03,0xa7,0x82,0x83,0x7e,0xa3,0x83,0x83,0x8c,0x27,0x89,0x83,0x68,
0x24,0x05,0x8f,0xff,0x00,0x07,0x10,0x80,0x00,0x49,0x10,0x21,0x8c,0x44,0x00,0x00,
0x24,0xe3,0x00,0x01,0x30,0x67,0x00,0xff,0x25,0x02,0x00,0x04,0x2c,0xe3,0x00,0x0a,
0xad,0x04,0x00,0x00,0x14,0x60,0xff,0xf7,0x00,0x45,0x40,0x24,0x97,0x83,0x8b,0xc6,
0x97,0x85,0x8b,0xc4,0x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x28,0x00,0xa2,0x28,0x21,
0x3c,0x04,0xb0,0x06,0xa7,0x83,0x8b,0xc6,0x34,0x84,0x80,0x18,0xa4,0xa3,0x00,0x00,
0x8c,0x85,0x00,0x00,0x24,0x02,0x8f,0xff,0x24,0xc6,0x00,0x28,0x3c,0x03,0x0f,0x00,
0x00,0xc2,0x30,0x24,0x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,0xaf,0x86,0x8b,0xc0,
0x10,0xa2,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x96,0x00,0x00,0x00,0x00,
0x0c,0x00,0x02,0x36,0x00,0x00,0x00,0x00,0xa3,0x80,0x80,0x11,0x08,0x00,0x02,0xe5,
0x00,0x00,0x00,0x00,0x97,0x82,0x83,0x76,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,
0xa7,0x82,0x83,0x76,0x84,0xa3,0x00,0x06,0x8f,0x82,0x83,0x88,0x00,0x00,0x00,0x00,
0x00,0x43,0x10,0x21,0xaf,0x82,0x83,0x88,0x08,0x00,0x02,0xdd,0x25,0x42,0x00,0x01,
0x97,0x82,0x83,0x72,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xa7,0x82,0x83,0x72,
0x84,0xa3,0x00,0x06,0x8f,0x82,0x83,0x80,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x21,
0xaf,0x82,0x83,0x80,0x08,0x00,0x02,0xdd,0x25,0x42,0x00,0x01,0x97,0x82,0x83,0x6c,
0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xa7,0x82,0x83,0x6c,0x08,0x00,0x02,0xc5,
0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xd0,0xaf,0xbf,0x00,0x28,0x8c,0xa3,0x00,0x20,
0x8f,0x8a,0x8b,0xc0,0x3c,0x02,0x00,0x10,0x00,0x62,0x10,0x24,0x00,0xa0,0x38,0x21,
0x01,0x40,0x48,0x21,0x10,0x40,0x00,0x3d,0x00,0x80,0x28,0x21,0x8c,0xe4,0x00,0x1c,
0x34,0xa5,0x12,0x06,0xaf,0xa5,0x00,0x10,0x8c,0x82,0x00,0x08,0x00,0x03,0x1c,0x42,
0x30,0x63,0x00,0x30,0x00,0x02,0x13,0x02,0x30,0x42,0x00,0x40,0x00,0x43,0x10,0x25,
0x90,0xe6,0x00,0x10,0x90,0xe4,0x00,0x13,0x94,0xe8,0x00,0x0c,0x94,0xe3,0x00,0x1a,
0x00,0x02,0x16,0x00,0x90,0xe7,0x00,0x12,0x00,0xa2,0x28,0x25,0x24,0x02,0x12,0x34,
0xa7,0xa2,0x00,0x1c,0x24,0x02,0x56,0x78,0xaf,0xa5,0x00,0x10,0xa3,0xa6,0x00,0x18,
0xa3,0xa7,0x00,0x1f,0xa7,0xa3,0x00,0x1a,0xa3,0xa4,0x00,0x19,0xa7,0xa8,0x00,0x20,
0xa7,0xa2,0x00,0x22,0x00,0x00,0x28,0x21,0x27,0xa7,0x00,0x10,0x24,0x06,0x8f,0xff,
0x00,0x05,0x10,0x80,0x00,0x47,0x10,0x21,0x8c,0x44,0x00,0x00,0x24,0xa3,0x00,0x01,
0x30,0x65,0x00,0xff,0x25,0x22,0x00,0x04,0x2c,0xa3,0x00,0x05,0xad,0x24,0x00,0x00,
0x14,0x60,0xff,0xf7,0x00,0x46,0x48,0x24,0x97,0x83,0x8b,0xc6,0x97,0x85,0x8b,0xc4,
0x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x14,0x00,0xa2,0x28,0x21,0x3c,0x04,0xb0,0x06,
0xa7,0x83,0x8b,0xc6,0x34,0x84,0x80,0x18,0xa4,0xa3,0x00,0x00,0x8c,0x85,0x00,0x00,
0x24,0x02,0x8f,0xff,0x25,0x46,0x00,0x14,0x3c,0x03,0x0f,0x00,0x00,0xc2,0x50,0x24,
0x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,0xaf,0x8a,0x8b,0xc0,0x10,0xa2,0x00,0x03,
0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x96,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x28,
0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,0x3c,0x05,0xb0,0x03,
0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xc8,0x00,0x04,0x22,0x00,0x34,0xa5,0x00,0x20,
0x24,0x42,0x0d,0xfc,0x3c,0x03,0xb0,0x00,0xaf,0xb5,0x00,0x24,0xaf,0xb4,0x00,0x20,
0xaf,0xb2,0x00,0x18,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x30,0x00,0x83,0x80,0x21,
0xaf,0xb7,0x00,0x2c,0xaf,0xb6,0x00,0x28,0xaf,0xb3,0x00,0x1c,0xaf,0xb1,0x00,0x14,
0xac,0xa2,0x00,0x00,0x8e,0x09,0x00,0x00,0x00,0x00,0x90,0x21,0x26,0x10,0x00,0x08,
0x00,0x09,0xa6,0x02,0x12,0x80,0x00,0x13,0x00,0x00,0xa8,0x21,0x24,0x13,0x00,0x02,
0x3c,0x16,0x00,0xff,0x3c,0x17,0xff,0x00,0x8e,0x09,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x09,0x12,0x02,0x24,0x42,0x00,0x02,0x31,0x25,0x00,0xff,0x10,0xb3,0x00,0x76,
0x30,0x51,0x00,0xff,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x18,0x00,0x00,0x00,0x00,
0x02,0x51,0x10,0x21,0x30,0x52,0xff,0xff,0x02,0x54,0x18,0x2b,0x14,0x60,0xff,0xf2,
0x02,0x11,0x80,0x21,0x12,0xa0,0x00,0x0a,0x3c,0x02,0xb0,0x06,0x34,0x42,0x80,0x18,
0x8c,0x43,0x00,0x00,0x3c,0x04,0x0f,0x00,0x3c,0x02,0x04,0x00,0x00,0x64,0x18,0x24,
0x10,0x62,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x96,0x00,0x00,0x00,0x00,
0x8f,0xbf,0x00,0x30,0x7b,0xb6,0x01,0x7c,0x7b,0xb4,0x01,0x3c,0x7b,0xb2,0x00,0xfc,
0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0x8e,0x09,0x00,0x04,
0x24,0x15,0x00,0x01,0x8e,0x06,0x00,0x0c,0x00,0x09,0x11,0x42,0x00,0x09,0x18,0xc2,
0x30,0x48,0x00,0x03,0x00,0x09,0x14,0x02,0x30,0x6c,0x00,0x03,0x00,0x09,0x26,0x02,
0x11,0x15,0x00,0x45,0x30,0x43,0x00,0x0f,0x29,0x02,0x00,0x02,0x14,0x40,0x00,0x26,
0x00,0x00,0x00,0x00,0x11,0x13,0x00,0x0f,0x00,0x00,0x38,0x21,0x00,0x07,0x22,0x02,
0x30,0x84,0xff,0x00,0x3c,0x03,0x00,0xff,0x00,0x07,0x2e,0x02,0x00,0x07,0x12,0x00,
0x00,0x43,0x10,0x24,0x00,0xa4,0x28,0x25,0x00,0xa2,0x28,0x25,0x00,0x07,0x1e,0x00,
0x00,0xa3,0x28,0x25,0x0c,0x00,0x01,0x92,0x01,0x20,0x20,0x21,0x08,0x00,0x03,0xa5,
0x02,0x51,0x10,0x21,0x11,0x95,0x00,0x0f,0x00,0x00,0x00,0x00,0x11,0x88,0x00,0x07,
0x00,0x00,0x00,0x00,0x00,0x04,0x10,0x80,0x27,0x83,0x8b,0x70,0x00,0x43,0x10,0x21,
0x8c,0x47,0x00,0x18,0x08,0x00,0x03,0xcc,0x00,0x07,0x22,0x02,0x00,0x04,0x10,0x40,
0x27,0x83,0x8b,0x78,0x00,0x43,0x10,0x21,0x94,0x47,0x00,0x02,0x08,0x00,0x03,0xcc,
0x00,0x07,0x22,0x02,0x27,0x82,0x8b,0x70,0x00,0x82,0x10,0x21,0x90,0x47,0x00,0x00,
0x08,0x00,0x03,0xcc,0x00,0x07,0x22,0x02,0x15,0x00,0xff,0xdc,0x00,0x00,0x38,0x21,
0x10,0x75,0x00,0x05,0x00,0x80,0x38,0x21,0x00,0x65,0x18,0x26,0x24,0x82,0x01,0x00,
0x00,0x00,0x38,0x21,0x00,0x43,0x38,0x0a,0x24,0x02,0x00,0x01,0x11,0x82,0x00,0x0e,
0x3c,0x02,0xb0,0x03,0x24,0x02,0x00,0x02,0x11,0x82,0x00,0x06,0x00,0x00,0x00,0x00,
0x3c,0x02,0xb0,0x03,0x00,0xe2,0x10,0x21,0x8c,0x47,0x00,0x00,0x08,0x00,0x03,0xcc,
0x00,0x07,0x22,0x02,0x3c,0x02,0xb0,0x03,0x00,0xe2,0x10,0x21,0x94,0x43,0x00,0x00,
0x08,0x00,0x03,0xcb,0x30,0x67,0xff,0xff,0x00,0xe2,0x10,0x21,0x90,0x43,0x00,0x00,
0x08,0x00,0x03,0xcb,0x30,0x67,0x00,0xff,0x30,0x62,0x00,0x03,0x00,0x02,0x12,0x00,
0x11,0x95,0x00,0x07,0x00,0x44,0x38,0x21,0x11,0x93,0x00,0x03,0x00,0x00,0x00,0x00,
0x08,0x00,0x03,0xfd,0x3c,0x02,0xb0,0x0a,0x08,0x00,0x04,0x02,0x3c,0x02,0xb0,0x0a,
0x08,0x00,0x04,0x06,0x3c,0x02,0xb0,0x0a,0x8e,0x09,0x00,0x04,0x8e,0x02,0x00,0x08,
0x8e,0x03,0x00,0x0c,0x00,0x09,0x41,0x42,0x00,0x02,0x22,0x02,0x00,0x03,0x3a,0x02,
0x30,0x84,0xff,0x00,0x30,0xe7,0xff,0x00,0x00,0x02,0x5e,0x02,0x00,0x02,0x32,0x00,
0x00,0x03,0x56,0x02,0x00,0x03,0x2a,0x00,0x01,0x64,0x58,0x25,0x00,0xd6,0x30,0x24,
0x01,0x47,0x50,0x25,0x00,0x02,0x16,0x00,0x00,0xb6,0x28,0x24,0x00,0x03,0x1e,0x00,
0x01,0x66,0x58,0x25,0x01,0x45,0x50,0x25,0x00,0x57,0x10,0x24,0x00,0x77,0x18,0x24,
0x01,0x62,0x38,0x25,0x01,0x43,0x30,0x25,0x00,0x09,0x10,0xc2,0x00,0x09,0x1c,0x02,
0x31,0x08,0x00,0x03,0x30,0x4c,0x00,0x03,0x30,0x63,0x00,0x0f,0x00,0x09,0x26,0x02,
0x00,0xe0,0x58,0x21,0x15,0x00,0x00,0x28,0x00,0xc0,0x50,0x21,0x24,0x02,0x00,0x01,
0x10,0x62,0x00,0x06,0x00,0x80,0x28,0x21,0x24,0x02,0x00,0x03,0x14,0x62,0xff,0x69,
0x02,0x51,0x10,0x21,0x24,0x85,0x01,0x00,0x24,0x02,0x00,0x01,0x11,0x82,0x00,0x15,
0x24,0x02,0x00,0x02,0x11,0x82,0x00,0x0a,0x3c,0x03,0xb0,0x03,0x00,0xa3,0x18,0x21,
0x8c,0x62,0x00,0x00,0x00,0x0a,0x20,0x27,0x01,0x6a,0x28,0x24,0x00,0x44,0x10,0x24,
0x00,0x45,0x10,0x25,0xac,0x62,0x00,0x00,0x08,0x00,0x03,0xa5,0x02,0x51,0x10,0x21,
0x00,0xa3,0x18,0x21,0x94,0x62,0x00,0x00,0x00,0x0a,0x20,0x27,0x01,0x6a,0x28,0x24,
0x00,0x44,0x10,0x24,0x00,0x45,0x10,0x25,0xa4,0x62,0x00,0x00,0x08,0x00,0x03,0xa5,
0x02,0x51,0x10,0x21,0x3c,0x03,0xb0,0x03,0x00,0xa3,0x18,0x21,0x90,0x62,0x00,0x00,
0x00,0x0a,0x20,0x27,0x01,0x6a,0x28,0x24,0x00,0x44,0x10,0x24,0x00,0x45,0x10,0x25,
0x08,0x00,0x03,0xa4,0xa0,0x62,0x00,0x00,0x24,0x02,0x00,0x01,0x11,0x02,0x00,0x21,
0x00,0x00,0x00,0x00,0x15,0x13,0xff,0x42,0x00,0x00,0x00,0x00,0x11,0x82,0x00,0x17,
0x00,0x00,0x00,0x00,0x11,0x88,0x00,0x0b,0x00,0x00,0x00,0x00,0x27,0x83,0x8b,0x70,
0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x18,0x00,0x06,0x18,0x27,
0x00,0xe6,0x28,0x24,0x00,0x43,0x10,0x24,0x00,0x45,0x10,0x25,0x08,0x00,0x03,0xa4,
0xac,0x82,0x00,0x18,0x27,0x83,0x8b,0x78,0x00,0x04,0x20,0x40,0x00,0x83,0x20,0x21,
0x94,0x82,0x00,0x02,0x00,0x06,0x18,0x27,0x00,0xe6,0x28,0x24,0x00,0x43,0x10,0x24,
0x00,0x45,0x10,0x25,0x08,0x00,0x03,0xa4,0xa4,0x82,0x00,0x02,0x27,0x83,0x8b,0x70,
0x00,0x83,0x18,0x21,0x90,0x62,0x00,0x00,0x00,0x06,0x20,0x27,0x08,0x00,0x04,0x5a,
0x00,0xe6,0x28,0x24,0x30,0x62,0x00,0x07,0x00,0x02,0x12,0x00,0x11,0x88,0x00,0x0f,
0x00,0x44,0x10,0x21,0x11,0x93,0x00,0x07,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,
0x00,0x43,0x18,0x21,0x8c,0x62,0x00,0x00,0x00,0x06,0x20,0x27,0x08,0x00,0x04,0x47,
0x00,0xe6,0x28,0x24,0x3c,0x03,0xb0,0x0a,0x00,0x43,0x18,0x21,0x94,0x62,0x00,0x00,
0x00,0x06,0x20,0x27,0x08,0x00,0x04,0x50,0x00,0xe6,0x28,0x24,0x3c,0x03,0xb0,0x0a,
0x08,0x00,0x04,0x7d,0x00,0x43,0x18,0x21,0x97,0x85,0x8b,0xc4,0x3c,0x07,0xb0,0x02,
0x3c,0x04,0xb0,0x03,0x3c,0x02,0x80,0x00,0x00,0xa7,0x28,0x21,0x34,0x84,0x00,0x20,
0x24,0x42,0x12,0x58,0x24,0x03,0xff,0x80,0xac,0x82,0x00,0x00,0xa0,0xa3,0x00,0x07,
0x97,0x82,0x8b,0xc6,0x97,0x85,0x8b,0xc4,0x3c,0x06,0xb0,0x06,0x30,0x42,0xff,0xf8,
0x24,0x42,0x00,0x10,0x00,0xa2,0x10,0x21,0x30,0x42,0x0f,0xff,0x24,0x44,0x00,0x08,
0x30,0x84,0x0f,0xff,0x00,0x05,0x28,0xc2,0x3c,0x03,0x00,0x40,0x00,0xa3,0x28,0x25,
0x00,0x87,0x20,0x21,0x34,0xc6,0x80,0x18,0xac,0xc5,0x00,0x00,0xaf,0x84,0x8b,0xc0,
0xa7,0x82,0x8b,0xc4,0xa7,0x80,0x8b,0xc6,0xaf,0x80,0x8b,0xc8,0x03,0xe0,0x00,0x08,
0x00,0x00,0x00,0x00,0x30,0xa5,0x00,0xff,0x30,0x84,0x00,0xff,0x24,0x02,0x00,0x01,
0x00,0xe0,0x48,0x21,0x30,0xc6,0x00,0xff,0x8f,0xa7,0x00,0x10,0x10,0x82,0x00,0x07,
0x00,0xa0,0x40,0x21,0x24,0x02,0x00,0x03,0x10,0x82,0x00,0x03,0x00,0x00,0x00,0x00,
0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x24,0xa8,0x01,0x00,0x3c,0x03,0xb0,0x03,
0x24,0x02,0x00,0x01,0x00,0x07,0x20,0x27,0x01,0x27,0x28,0x24,0x10,0xc2,0x00,0x14,
0x01,0x03,0x18,0x21,0x24,0x02,0x00,0x02,0x10,0xc2,0x00,0x09,0x00,0x07,0x50,0x27,
0x3c,0x03,0xb0,0x03,0x01,0x03,0x18,0x21,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x4a,0x10,0x24,0x00,0x45,0x10,0x25,0x08,0x00,0x04,0xe1,0xac,0x62,0x00,0x00,
0x3c,0x03,0xb0,0x03,0x01,0x03,0x18,0x21,0x94,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x4a,0x10,0x24,0x00,0x45,0x10,0x25,0x03,0xe0,0x00,0x08,0xa4,0x62,0x00,0x00,
0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x44,0x10,0x24,0x00,0x45,0x10,0x25,
0xa0,0x62,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0x84,0x00,0x07,
0x00,0x04,0x22,0x00,0x30,0xa5,0x00,0xff,0x00,0x85,0x28,0x21,0x3c,0x02,0xb0,0x0a,
0x00,0xa2,0x40,0x21,0x30,0xc6,0x00,0xff,0x24,0x02,0x00,0x01,0x8f,0xa4,0x00,0x10,
0x10,0xc2,0x00,0x14,0x24,0x02,0x00,0x02,0x00,0x04,0x50,0x27,0x10,0xc2,0x00,0x09,
0x00,0xe4,0x48,0x24,0x3c,0x03,0xb0,0x0a,0x00,0xa3,0x18,0x21,0x8c,0x62,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x4a,0x10,0x24,0x00,0x49,0x10,0x25,0x03,0xe0,0x00,0x08,
0xac,0x62,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x00,0xa3,0x18,0x21,0x94,0x62,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x4a,0x10,0x24,0x00,0x49,0x10,0x25,0x03,0xe0,0x00,0x08,
0xa4,0x62,0x00,0x00,0x91,0x02,0x00,0x00,0x00,0x04,0x18,0x27,0x00,0xe4,0x20,0x24,
0x00,0x43,0x10,0x24,0x00,0x44,0x10,0x25,0x03,0xe0,0x00,0x08,0xa1,0x02,0x00,0x00,
0x30,0xa9,0x00,0xff,0x27,0x83,0x8b,0x70,0x30,0x85,0x00,0xff,0x24,0x02,0x00,0x01,
0x00,0x07,0x50,0x27,0x00,0xc7,0x40,0x24,0x11,0x22,0x00,0x17,0x00,0xa3,0x18,0x21,
0x00,0x05,0x20,0x40,0x27,0x82,0x8b,0x70,0x00,0x05,0x28,0x80,0x27,0x83,0x8b,0x78,
0x00,0x83,0x50,0x21,0x00,0xa2,0x20,0x21,0x24,0x02,0x00,0x02,0x00,0x07,0x40,0x27,
0x11,0x22,0x00,0x07,0x00,0xc7,0x28,0x24,0x8c,0x82,0x00,0x18,0x00,0x00,0x00,0x00,
0x00,0x48,0x10,0x24,0x00,0x45,0x10,0x25,0x03,0xe0,0x00,0x08,0xac,0x82,0x00,0x18,
0x95,0x42,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x48,0x10,0x24,0x00,0x45,0x10,0x25,
0x03,0xe0,0x00,0x08,0xa5,0x42,0x00,0x02,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x4a,0x10,0x24,0x00,0x48,0x10,0x25,0x03,0xe0,0x00,0x08,0xa0,0x62,0x00,0x00,
0x00,0x04,0x32,0x02,0x30,0xc6,0xff,0x00,0x00,0x04,0x16,0x02,0x00,0x04,0x1a,0x00,
0x3c,0x05,0x00,0xff,0x00,0x65,0x18,0x24,0x00,0x46,0x10,0x25,0x00,0x43,0x10,0x25,
0x00,0x04,0x26,0x00,0x03,0xe0,0x00,0x08,0x00,0x44,0x10,0x25,0x3c,0x03,0xb0,0x03,
0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xe8,0x34,0x63,0x00,0x20,0x24,0x42,0x14,0xdc,
0x3c,0x04,0xb0,0x03,0xaf,0xbf,0x00,0x14,0xac,0x62,0x00,0x00,0xaf,0xb0,0x00,0x10,
0x34,0x84,0x00,0x2c,0x8c,0x83,0x00,0x00,0xa7,0x80,0xbc,0x00,0x00,0x03,0x12,0x02,
0x00,0x03,0x2d,0x02,0x30,0x42,0x0f,0xff,0xa3,0x83,0xbc,0x08,0xa7,0x85,0xbc,0x0c,
0xa7,0x82,0xbc,0x0a,0xa7,0x80,0xbc,0x02,0xa7,0x80,0xbc,0x04,0xa7,0x80,0xbc,0x06,
0x0c,0x00,0x06,0xd1,0x24,0x04,0x05,0x00,0x3c,0x05,0x08,0x00,0x00,0x45,0x28,0x25,
0x24,0x04,0x05,0x00,0x0c,0x00,0x06,0xbf,0x00,0x40,0x80,0x21,0x3c,0x02,0xf7,0xff,
0x34,0x42,0xff,0xff,0x02,0x02,0x80,0x24,0x02,0x00,0x28,0x21,0x0c,0x00,0x06,0xbf,
0x24,0x04,0x05,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0xb0,0x03,0x34,0x42,0x01,0x08,
0x34,0x63,0x01,0x18,0x8c,0x45,0x00,0x00,0x8c,0x64,0x00,0x00,0x3c,0x02,0x00,0x0f,
0x3c,0x03,0x00,0x4c,0x30,0x84,0x02,0x00,0x34,0x63,0x4b,0x40,0xaf,0x85,0xbc,0x10,
0x10,0x80,0x00,0x06,0x34,0x42,0x42,0x40,0xaf,0x83,0xbc,0x14,0x8f,0xbf,0x00,0x14,
0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0xaf,0x82,0xbc,0x14,
0x08,0x00,0x05,0x67,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
0x27,0xbd,0xff,0xc8,0x34,0x63,0x00,0x20,0x24,0x42,0x15,0xb8,0x30,0x84,0x00,0xff,
0xaf,0xbf,0x00,0x30,0xaf,0xb7,0x00,0x2c,0xaf,0xb6,0x00,0x28,0xaf,0xb5,0x00,0x24,
0xaf,0xb4,0x00,0x20,0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,
0xaf,0xb0,0x00,0x10,0xac,0x62,0x00,0x00,0x10,0x80,0x00,0x1c,0x24,0x02,0x00,0x02,
0x10,0x82,0x00,0x08,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x30,0x7b,0xb6,0x01,0x7c,
0x7b,0xb4,0x01,0x3c,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
0x27,0xbd,0x00,0x38,0xa7,0x80,0xbc,0x00,0xa7,0x80,0xbc,0x02,0xa7,0x80,0xbc,0x04,
0xa7,0x80,0xbc,0x06,0x0c,0x00,0x06,0xd1,0x24,0x04,0x05,0x00,0x3c,0x05,0x08,0x00,
0x00,0x45,0x28,0x25,0x24,0x04,0x05,0x00,0x0c,0x00,0x06,0xbf,0x00,0x40,0x80,0x21,
0x3c,0x05,0xf7,0xff,0x34,0xa5,0xff,0xff,0x02,0x05,0x28,0x24,0x0c,0x00,0x06,0xbf,
0x24,0x04,0x05,0x00,0x08,0x00,0x05,0x82,0x00,0x00,0x00,0x00,0x0c,0x00,0x06,0xd1,
0x24,0x04,0x05,0xa0,0x24,0x04,0x05,0xa4,0x0c,0x00,0x06,0xd1,0x00,0x02,0xbc,0x02,
0x24,0x04,0x05,0xa8,0x00,0x02,0xb4,0x02,0x0c,0x00,0x06,0xd1,0x30,0x55,0xff,0xff,
0x00,0x40,0x80,0x21,0x97,0x84,0xbc,0x00,0x97,0x82,0xbc,0x02,0x97,0x83,0xbc,0x06,
0x02,0xe4,0x20,0x23,0x02,0xa2,0x10,0x23,0x00,0x82,0x20,0x21,0x97,0x82,0xbc,0x04,
0x32,0x14,0xff,0xff,0x02,0x83,0x18,0x23,0x02,0xc2,0x10,0x23,0x00,0x82,0x20,0x21,
0x93,0x82,0xbc,0x08,0x00,0x83,0x20,0x21,0x30,0x84,0xff,0xff,0x00,0x82,0x10,0x2b,
0x14,0x40,0x00,0xaa,0x00,0x00,0x00,0x00,0x97,0x82,0xbc,0x0c,0x00,0x00,0x00,0x00,
0x00,0x44,0x10,0x2b,0x14,0x40,0x00,0x7f,0x00,0x00,0x00,0x00,0x97,0x82,0xbc,0x0a,
0x00,0x00,0x00,0x00,0x00,0x44,0x10,0x2b,0x10,0x40,0x00,0x3a,0x00,0x00,0x00,0x00,
0x0c,0x00,0x06,0xd1,0x24,0x04,0x04,0x50,0x30,0x51,0x00,0x7f,0x00,0x40,0x80,0x21,
0x2e,0x22,0x00,0x32,0x10,0x40,0x00,0x13,0x24,0x02,0x00,0x20,0x12,0x22,0x00,0x17,
0x24,0x02,0xff,0x80,0x02,0x02,0x10,0x24,0x26,0x31,0x00,0x01,0x00,0x51,0x80,0x25,
0x02,0x00,0x28,0x21,0x0c,0x00,0x06,0xbf,0x24,0x04,0x04,0x50,0x02,0x00,0x28,0x21,
0x0c,0x00,0x06,0xbf,0x24,0x04,0x04,0x58,0x02,0x00,0x28,0x21,0x0c,0x00,0x06,0xbf,
0x24,0x04,0x04,0x60,0x02,0x00,0x28,0x21,0x24,0x04,0x04,0x68,0x0c,0x00,0x06,0xbf,
0x00,0x00,0x00,0x00,0xa7,0x97,0xbc,0x00,0xa7,0x95,0xbc,0x02,0xa7,0x96,0xbc,0x04,
0xa7,0x94,0xbc,0x06,0x08,0x00,0x05,0x82,0x00,0x00,0x00,0x00,0x0c,0x00,0x06,0xd1,
0x24,0x04,0x02,0x08,0x3c,0x04,0x00,0xc0,0x00,0x40,0x28,0x21,0x00,0x44,0x10,0x24,
0x00,0x02,0x15,0x82,0x24,0x03,0x00,0x03,0x10,0x43,0x00,0x07,0x00,0x00,0x00,0x00,
0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,0x00,0xa2,0x10,0x24,0x00,0x44,0x28,0x25,
0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x08,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x2c,
0x00,0x40,0x90,0x21,0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,0x02,0x42,0x90,0x24,
0x02,0x40,0x28,0x21,0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x2c,0x08,0x00,0x05,0xc9,
0x24,0x02,0xff,0x80,0x0c,0x00,0x06,0xd1,0x24,0x04,0x04,0x50,0x30,0x51,0x00,0x7f,
0x24,0x02,0x00,0x20,0x16,0x22,0xff,0xdb,0x00,0x00,0x00,0x00,0x0c,0x00,0x06,0xd1,
0x24,0x04,0x02,0x2c,0x34,0x52,0x40,0x00,0x02,0x40,0x28,0x21,0x0c,0x00,0x06,0xbf,
0x24,0x04,0x02,0x2c,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x58,0x24,0x04,0x02,0x5c,
0x0c,0x00,0x06,0xd1,0x00,0x02,0x9e,0x02,0x30,0x43,0x00,0xff,0x00,0x13,0x12,0x00,
0x00,0x43,0x10,0x25,0x2c,0x43,0x00,0x04,0x14,0x60,0x00,0x1d,0x2c,0x42,0x00,0x11,
0x10,0x40,0x00,0x0b,0x00,0x00,0x00,0x00,0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,
0x02,0x42,0x90,0x24,0x02,0x40,0x28,0x21,0x24,0x04,0x02,0x2c,0x0c,0x00,0x06,0xbf,
0x36,0x52,0x80,0x00,0x02,0x40,0x28,0x21,0x08,0x00,0x05,0xd7,0x24,0x04,0x02,0x2c,
0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x08,0x3c,0x04,0x00,0xc0,0x00,0x40,0x28,0x21,
0x00,0x44,0x10,0x24,0x00,0x02,0x15,0x82,0x24,0x03,0x00,0x02,0x14,0x43,0xff,0xee,
0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,0x00,0xa2,0x10,0x24,0x00,0x44,0x28,0x25,
0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x08,0x08,0x00,0x06,0x13,0x3c,0x02,0xff,0xff,
0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x08,0x00,0x40,0x28,0x21,0x00,0x02,0x15,0x82,
0x30,0x42,0x00,0x03,0x24,0x03,0x00,0x03,0x14,0x43,0xff,0xdf,0x3c,0x02,0xff,0x3f,
0x34,0x42,0xff,0xff,0x00,0xa2,0x10,0x24,0x3c,0x03,0x00,0x80,0x08,0x00,0x06,0x28,
0x00,0x43,0x28,0x25,0x0c,0x00,0x06,0xd1,0x24,0x04,0x04,0x50,0x30,0x51,0x00,0x7f,
0x00,0x40,0x80,0x21,0x2e,0x22,0x00,0x32,0x10,0x40,0xff,0x9a,0x24,0x02,0x00,0x20,
0x12,0x22,0x00,0x04,0x24,0x02,0xff,0x80,0x02,0x02,0x10,0x24,0x08,0x00,0x05,0xcb,
0x26,0x31,0x00,0x02,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x08,0x3c,0x04,0x00,0xc0,
0x00,0x40,0x28,0x21,0x00,0x44,0x10,0x24,0x00,0x02,0x15,0x82,0x24,0x03,0x00,0x03,
0x10,0x43,0x00,0x07,0x00,0x00,0x00,0x00,0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,
0x00,0xa2,0x10,0x24,0x00,0x44,0x28,0x25,0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x08,
0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x2c,0x00,0x40,0x90,0x21,0x3c,0x02,0xff,0xff,
0x34,0x42,0x3f,0xff,0x02,0x42,0x90,0x24,0x02,0x40,0x28,0x21,0x0c,0x00,0x06,0xbf,
0x24,0x04,0x02,0x2c,0x08,0x00,0x06,0x42,0x24,0x02,0xff,0x80,0x0c,0x00,0x06,0xd1,
0x24,0x04,0x04,0x50,0x00,0x40,0x80,0x21,0x30,0x51,0x00,0x7f,0x24,0x02,0x00,0x20,
0x12,0x22,0x00,0x1d,0x2e,0x22,0x00,0x21,0x14,0x40,0xff,0x72,0x24,0x02,0xff,0x80,
0x02,0x02,0x10,0x24,0x26,0x31,0xff,0xff,0x00,0x51,0x80,0x25,0x24,0x04,0x04,0x50,
0x0c,0x00,0x06,0xbf,0x02,0x00,0x28,0x21,0x24,0x04,0x04,0x58,0x0c,0x00,0x06,0xbf,
0x02,0x00,0x28,0x21,0x24,0x04,0x04,0x60,0x0c,0x00,0x06,0xbf,0x02,0x00,0x28,0x21,
0x02,0x00,0x28,0x21,0x0c,0x00,0x06,0xbf,0x24,0x04,0x04,0x68,0x24,0x02,0x00,0x20,
0x16,0x22,0xff,0x60,0x00,0x00,0x00,0x00,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x2c,
0x00,0x40,0x90,0x21,0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,0x02,0x42,0x10,0x24,
0x08,0x00,0x06,0x19,0x34,0x52,0x80,0x00,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x2c,
0x34,0x52,0x40,0x00,0x02,0x40,0x28,0x21,0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x2c,
0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x58,0x24,0x04,0x02,0x5c,0x0c,0x00,0x06,0xd1,
0x00,0x02,0x9e,0x02,0x30,0x43,0x00,0xff,0x00,0x13,0x12,0x00,0x00,0x43,0x10,0x25,
0x2c,0x43,0x00,0x04,0x14,0x60,0x00,0x20,0x2c,0x42,0x00,0x11,0x10,0x40,0x00,0x0d,
0x00,0x00,0x00,0x00,0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,0x02,0x42,0x90,0x24,
0x02,0x40,0x28,0x21,0x24,0x04,0x02,0x2c,0x0c,0x00,0x06,0xbf,0x36,0x52,0x80,0x00,
0x02,0x40,0x28,0x21,0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x2c,0x08,0x00,0x06,0x66,
0x2e,0x22,0x00,0x21,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x08,0x3c,0x04,0x00,0xc0,
0x00,0x40,0x28,0x21,0x00,0x44,0x10,0x24,0x00,0x02,0x15,0x82,0x24,0x03,0x00,0x02,
0x14,0x43,0xff,0xec,0x00,0x00,0x00,0x00,0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,
0x00,0xa2,0x10,0x24,0x00,0x44,0x28,0x25,0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x08,
0x08,0x00,0x06,0x96,0x3c,0x02,0xff,0xff,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x08,
0x00,0x40,0x28,0x21,0x00,0x02,0x15,0x82,0x30,0x42,0x00,0x03,0x24,0x03,0x00,0x03,
0x14,0x43,0xff,0xdc,0x3c,0x03,0x00,0x80,0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,
0x00,0xa2,0x10,0x24,0x08,0x00,0x06,0xae,0x00,0x43,0x28,0x25,0x30,0x83,0x00,0x03,
0x00,0x04,0x20,0x40,0x00,0x83,0x20,0x23,0x3c,0x02,0xb0,0x0a,0x00,0x82,0x20,0x21,
0x3c,0x06,0x00,0x01,0xac,0x85,0x00,0x00,0x24,0x07,0x00,0x01,0x00,0x00,0x28,0x21,
0x34,0xc6,0x86,0x9f,0x8c,0x82,0x10,0x00,0x24,0xa5,0x00,0x01,0x10,0x47,0x00,0x03,
0x00,0xc5,0x18,0x2b,0x10,0x60,0xff,0xfb,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
0x00,0x00,0x00,0x00,0x30,0x83,0x00,0x03,0x00,0x04,0x20,0x40,0x3c,0x02,0xb0,0x0a,
0x00,0x83,0x20,0x23,0x00,0x82,0x20,0x21,0x3c,0x06,0x00,0x01,0x24,0x02,0xff,0xff,
0xac,0x82,0x10,0x00,0x00,0x00,0x28,0x21,0x24,0x07,0x00,0x01,0x34,0xc6,0x86,0x9f,
0x8c,0x82,0x10,0x00,0x24,0xa5,0x00,0x01,0x10,0x47,0x00,0x03,0x00,0xc5,0x18,0x2b,
0x10,0x60,0xff,0xfb,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x00,0x03,0xe0,0x00,0x08,
0x00,0x00,0x00,0x00,0x3c,0x05,0xb0,0x03,0x3c,0x02,0x80,0x00,0x24,0x42,0x1b,0x94,
0x24,0x03,0x00,0x01,0x34,0xa5,0x00,0x20,0x3c,0x06,0xb0,0x03,0xac,0xa2,0x00,0x00,
0x34,0xc6,0x01,0x04,0xa0,0x83,0x00,0x48,0xa0,0x80,0x00,0x04,0xa0,0x80,0x00,0x05,
0xa0,0x80,0x00,0x06,0xa0,0x80,0x00,0x07,0xa0,0x80,0x00,0x08,0xa0,0x80,0x00,0x09,
0xa0,0x80,0x00,0x0a,0xa0,0x80,0x00,0x11,0xa0,0x80,0x00,0x13,0xa0,0x80,0x00,0x49,
0x94,0xc2,0x00,0x00,0xac,0x80,0x00,0x00,0xa0,0x80,0x00,0x4e,0x00,0x02,0x14,0x00,
0x00,0x02,0x14,0x03,0x30,0x43,0x00,0xff,0x30,0x42,0xff,0x00,0xa4,0x82,0x00,0x44,
0xa4,0x83,0x00,0x46,0xac,0x80,0x00,0x24,0xac,0x80,0x00,0x28,0xac,0x80,0x00,0x2c,
0xac,0x80,0x00,0x30,0xac,0x80,0x00,0x34,0xac,0x80,0x00,0x38,0xac,0x80,0x00,0x3c,
0x03,0xe0,0x00,0x08,0xac,0x80,0x00,0x40,0x84,0x83,0x00,0x0c,0x3c,0x07,0xb0,0x03,
0x34,0xe7,0x00,0x20,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
0x27,0x83,0x90,0x04,0x00,0x43,0x10,0x21,0x8c,0x48,0x00,0x18,0x3c,0x02,0x80,0x00,
0x24,0x42,0x1c,0x28,0xac,0xe2,0x00,0x00,0x8d,0x03,0x00,0x08,0x80,0x82,0x00,0x13,
0x00,0x05,0x2c,0x00,0x00,0x03,0x1e,0x02,0x00,0x02,0x12,0x00,0x30,0x63,0x00,0x7e,
0x00,0x62,0x18,0x21,0x00,0x65,0x18,0x21,0x3c,0x02,0xc0,0x00,0x3c,0x05,0xb0,0x05,
0x34,0x42,0x04,0x00,0x24,0x63,0x00,0x01,0x3c,0x07,0xb0,0x05,0x3c,0x08,0xb0,0x05,
0x34,0xa5,0x04,0x20,0xac,0xa3,0x00,0x00,0x00,0xc2,0x30,0x21,0x34,0xe7,0x04,0x24,
0x35,0x08,0x02,0x28,0x24,0x02,0x00,0x01,0x24,0x03,0x00,0x20,0xac,0xe6,0x00,0x00,
0xac,0x82,0x00,0x3c,0x03,0xe0,0x00,0x08,0xa1,0x03,0x00,0x00,0x27,0xbd,0xff,0xa8,
0x00,0x07,0x60,0x80,0x27,0x82,0xb4,0x00,0xaf,0xbe,0x00,0x50,0xaf,0xb7,0x00,0x4c,
0xaf,0xb5,0x00,0x44,0xaf,0xb4,0x00,0x40,0xaf,0xbf,0x00,0x54,0xaf,0xb6,0x00,0x48,
0xaf,0xb3,0x00,0x3c,0xaf,0xb2,0x00,0x38,0xaf,0xb1,0x00,0x34,0xaf,0xb0,0x00,0x30,
0x01,0x82,0x10,0x21,0x8c,0x43,0x00,0x00,0x00,0xe0,0x70,0x21,0x3c,0x02,0x80,0x00,
0x94,0x73,0x00,0x14,0x3c,0x07,0xb0,0x03,0x34,0xe7,0x00,0x20,0x24,0x42,0x1c,0xbc,
0x3c,0x03,0xb0,0x05,0xac,0xe2,0x00,0x00,0x34,0x63,0x01,0x28,0x90,0x67,0x00,0x00,
0x00,0x13,0xa8,0xc0,0x02,0xb3,0x18,0x21,0x27,0x82,0x90,0x04,0x00,0x03,0x18,0x80,
0x00,0x62,0x18,0x21,0x00,0x05,0x2c,0x00,0x00,0x07,0x3e,0x00,0x28,0xc2,0x00,0x03,
0x00,0xc0,0xa0,0x21,0x00,0x80,0x78,0x21,0x00,0x05,0xbc,0x03,0x8c,0x68,0x00,0x18,
0x02,0xa0,0x58,0x21,0x10,0x40,0x01,0x81,0x00,0x07,0xf6,0x03,0x00,0xde,0x10,0x07,
0x30,0x5e,0x00,0x01,0x01,0x73,0x10,0x21,0x27,0x83,0x90,0x08,0x00,0x02,0x10,0x80,
0x00,0x43,0x10,0x21,0x80,0x4d,0x00,0x06,0x8d,0x03,0x00,0x00,0x8d,0x02,0x00,0x04,
0x8d,0x0a,0x00,0x08,0x8d,0x03,0x00,0x0c,0xaf,0xa2,0x00,0x20,0x11,0xa0,0x01,0x71,
0xaf,0xa3,0x00,0x18,0x27,0x82,0xb4,0x00,0x01,0x82,0x10,0x21,0x8c,0x44,0x00,0x00,
0x00,0x00,0x00,0x00,0x90,0x83,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x04,
0x14,0x60,0x00,0x12,0x00,0x00,0xb0,0x21,0x3c,0x02,0xb0,0x09,0x34,0x42,0x01,0x46,
0x90,0x43,0x00,0x00,0x2a,0x84,0x00,0x04,0x10,0x80,0x01,0x56,0x30,0x65,0x00,0x01,
0x91,0xe2,0x00,0x09,0x00,0x00,0x00,0x00,0x12,0x82,0x00,0x02,0x00,0x00,0x00,0x00,
0x00,0x00,0x28,0x21,0x14,0xa0,0x00,0x03,0x00,0x00,0x38,0x21,0x13,0xc0,0x00,0x03,
0x38,0xf6,0x00,0x01,0x24,0x07,0x00,0x01,0x38,0xf6,0x00,0x01,0x01,0x73,0x10,0x21,
0x00,0x02,0x30,0x80,0x27,0x83,0x90,0x10,0x00,0xc3,0x48,0x21,0x91,0x25,0x00,0x00,
0x8f,0xa4,0x00,0x20,0x2c,0xa3,0x00,0x04,0x00,0x04,0x11,0xc3,0x30,0x42,0x00,0x01,
0x00,0x03,0xb0,0x0b,0x12,0xc0,0x00,0xd8,0xaf,0xa2,0x00,0x24,0x93,0x90,0xbb,0xea,
0x00,0x0a,0x16,0x42,0x30,0x52,0x00,0x3f,0x2e,0x06,0x00,0x0c,0x10,0xc0,0x00,0xc0,
0x00,0xa0,0x20,0x21,0x2c,0xa2,0x00,0x10,0x14,0x40,0x00,0x04,0x00,0x90,0x10,0x2b,
0x30,0xa2,0x00,0x07,0x24,0x44,0x00,0x04,0x00,0x90,0x10,0x2b,0x10,0x40,0x00,0x0b,
0x01,0x73,0x10,0x21,0x27,0x85,0xbb,0x1c,0x00,0x10,0x10,0x40,0x00,0x50,0x10,0x21,
0x00,0x45,0x10,0x21,0x90,0x50,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x90,0x18,0x2b,
0x14,0x60,0xff,0xfa,0x00,0x10,0x10,0x40,0x01,0x73,0x10,0x21,0x00,0x02,0x10,0x80,
0x27,0x83,0x90,0x08,0x00,0x43,0x10,0x21,0x31,0xa4,0x00,0x01,0x10,0x80,0x00,0xa5,
0xa0,0x50,0x00,0x07,0x3c,0x04,0xb0,0x05,0x34,0x84,0x00,0x08,0x24,0x02,0x00,0x01,
0x3c,0x03,0x80,0x00,0xa1,0xe2,0x00,0x4e,0xac,0x83,0x00,0x00,0x8c,0x85,0x00,0x00,
0x3c,0x02,0x00,0xf0,0x3c,0x03,0x40,0xf0,0x34,0x42,0xf0,0x00,0x34,0x63,0xf0,0x00,
0x24,0x17,0x00,0x0e,0x24,0x13,0x01,0x06,0xac,0x82,0x00,0x00,0xac,0x83,0x00,0x00,
0x27,0x82,0xb4,0x00,0x01,0x82,0x10,0x21,0x8c,0x43,0x00,0x00,0x24,0x05,0x00,0x01,
0xaf,0xa5,0x00,0x1c,0x90,0x62,0x00,0x16,0x00,0x13,0xa8,0xc0,0x32,0x51,0x00,0x02,
0x34,0x42,0x00,0x04,0xa0,0x62,0x00,0x16,0x8f,0xa3,0x00,0x20,0x8f,0xa4,0x00,0x18,
0x00,0x03,0x13,0x43,0x00,0x04,0x1a,0x02,0x30,0x47,0x00,0x01,0x12,0x20,0x00,0x04,
0x30,0x64,0x07,0xff,0x2e,0x03,0x00,0x04,0x32,0x42,0x00,0x33,0x00,0x43,0x90,0x0b,
0x8f,0xa5,0x00,0x24,0x8f,0xa6,0x00,0x1c,0x00,0x12,0x10,0x40,0x00,0x05,0x19,0xc0,
0x00,0x47,0x10,0x21,0x00,0x06,0x2a,0x80,0x00,0x43,0x10,0x21,0x00,0x10,0x32,0x00,
0x00,0x04,0x24,0x80,0x02,0x65,0x28,0x21,0x00,0xa4,0x28,0x21,0x00,0x46,0x10,0x21,
0x00,0x17,0x1c,0x00,0x3c,0x04,0xc0,0x00,0x00,0x43,0x30,0x21,0x16,0x80,0x00,0x29,
0x00,0xa4,0x28,0x21,0x3c,0x02,0xb0,0x05,0x34,0x42,0x04,0x00,0x3c,0x03,0xb0,0x05,
0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,0x34,0x63,0x04,0x04,0x34,0x84,0x02,0x28,
0x24,0x02,0x00,0x01,0xac,0x65,0x00,0x00,0xa0,0x82,0x00,0x00,0x3c,0x02,0xb0,0x09,
0x34,0x42,0x01,0x46,0x90,0x44,0x00,0x00,0x91,0xe3,0x00,0x09,0x30,0x86,0x00,0x01,
0x02,0x83,0x18,0x26,0x00,0x03,0x30,0x0b,0x14,0xc0,0x00,0x03,0x00,0x00,0x28,0x21,
0x13,0xc0,0x00,0x03,0x02,0xb3,0x10,0x21,0x24,0x05,0x00,0x01,0x02,0xb3,0x10,0x21,
0x27,0x83,0x90,0x08,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x84,0x48,0x00,0x04,
0x00,0xa0,0x30,0x21,0x00,0xe0,0x20,0x21,0x02,0x80,0x28,0x21,0x02,0xc0,0x38,0x21,
0x0c,0x00,0x00,0x70,0xaf,0xa8,0x00,0x10,0x7b,0xbe,0x02,0xbc,0x7b,0xb6,0x02,0x7c,
0x7b,0xb4,0x02,0x3c,0x7b,0xb2,0x01,0xfc,0x7b,0xb0,0x01,0xbc,0x03,0xe0,0x00,0x08,
0x27,0xbd,0x00,0x58,0x24,0x02,0x00,0x01,0x12,0x82,0x00,0x3d,0x3c,0x02,0xb0,0x05,
0x24,0x02,0x00,0x02,0x12,0x82,0x00,0x31,0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x03,
0x12,0x82,0x00,0x25,0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x10,0x12,0x82,0x00,0x19,
0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x11,0x12,0x82,0x00,0x0d,0x3c,0x02,0xb0,0x05,
0x24,0x02,0x00,0x12,0x16,0x82,0xff,0xd1,0x3c,0x02,0xb0,0x05,0x3c,0x03,0xb0,0x05,
0x34,0x42,0x04,0x20,0x3c,0x04,0xb0,0x05,0x34,0x63,0x04,0x24,0xac,0x46,0x00,0x00,
0x34,0x84,0x02,0x28,0xac,0x65,0x00,0x00,0x08,0x00,0x07,0xe6,0x24,0x02,0x00,0x20,
0x34,0x42,0x04,0x40,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,
0x34,0x63,0x04,0x44,0x34,0x84,0x02,0x28,0x24,0x02,0x00,0x40,0x08,0x00,0x07,0xe6,
0xac,0x65,0x00,0x00,0x34,0x42,0x04,0x28,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,
0xac,0x46,0x00,0x00,0x34,0x63,0x04,0x2c,0x34,0x84,0x02,0x28,0x24,0x02,0xff,0x80,
0x08,0x00,0x07,0xe6,0xac,0x65,0x00,0x00,0x34,0x42,0x04,0x18,0x3c,0x03,0xb0,0x05,
0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,0x34,0x63,0x04,0x1c,0x34,0x84,0x02,0x28,
0x24,0x02,0x00,0x08,0x08,0x00,0x07,0xe6,0xac,0x65,0x00,0x00,0x34,0x42,0x04,0x10,
0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,0x34,0x63,0x04,0x14,
0x34,0x84,0x02,0x28,0x24,0x02,0x00,0x04,0x08,0x00,0x07,0xe6,0xac,0x65,0x00,0x00,
0x34,0x42,0x04,0x08,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,
0x34,0x63,0x04,0x0c,0x34,0x84,0x02,0x28,0x24,0x02,0x00,0x02,0x08,0x00,0x07,0xe6,
0xac,0x65,0x00,0x00,0x24,0x17,0x00,0x14,0x08,0x00,0x07,0xb8,0x24,0x13,0x01,0x02,
0x30,0xa2,0x00,0x07,0x24,0x44,0x00,0x0c,0x00,0x90,0x18,0x2b,0x10,0x60,0x00,0x0c,
0x26,0x02,0x00,0x04,0x27,0x85,0xbb,0x1c,0x00,0x10,0x10,0x40,0x00,0x50,0x10,0x21,
0x00,0x45,0x10,0x21,0x90,0x50,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x90,0x18,0x2b,
0x14,0x60,0xff,0xfa,0x00,0x10,0x10,0x40,0x2e,0x06,0x00,0x0c,0x26,0x02,0x00,0x04,
0x08,0x00,0x07,0xa2,0x00,0x46,0x80,0x0a,0x27,0x82,0xb4,0x00,0x01,0x82,0x20,0x21,
0x8c,0x87,0x00,0x00,0x00,0x00,0x00,0x00,0x90,0xe2,0x00,0x19,0x00,0x00,0x00,0x00,
0x14,0x40,0x00,0x07,0x00,0x00,0x00,0x00,0x27,0x82,0x90,0x20,0x00,0xc2,0x10,0x21,
0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x60,0x00,0x14,0x00,0x00,0x00,0x00,
0x90,0xe3,0x00,0x16,0x27,0x82,0x90,0x08,0x00,0xc2,0x10,0x21,0x34,0x63,0x00,0x20,
0x90,0x50,0x00,0x07,0xa0,0xe3,0x00,0x16,0x8c,0x84,0x00,0x00,0x00,0x0a,0x1e,0x42,
0x24,0x06,0x00,0x01,0x90,0x82,0x00,0x16,0x30,0x71,0x00,0x02,0x30,0x72,0x00,0x3f,
0x30,0x42,0x00,0xfb,0x24,0x17,0x00,0x18,0x24,0x13,0x01,0x03,0x24,0x15,0x08,0x18,
0xaf,0xa6,0x00,0x1c,0x08,0x00,0x07,0xc2,0xa0,0x82,0x00,0x16,0x8d,0x02,0x00,0x04,
0x00,0x0a,0x1c,0x42,0x30,0x42,0x00,0x10,0x14,0x40,0x00,0x15,0x30,0x72,0x00,0x3f,
0x81,0x22,0x00,0x05,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x11,0x30,0x72,0x00,0x3e,
0x27,0x83,0x90,0x18,0x00,0xc3,0x18,0x21,0x80,0x64,0x00,0x00,0x27,0x83,0xb5,0x78,
0x00,0x04,0x11,0x00,0x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x23,
0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x05,0x90,0x43,0x00,0x04,
0x00,0x00,0x00,0x00,0x00,0x64,0x18,0x24,0x30,0x63,0x00,0x01,0x02,0x43,0x90,0x25,
0x27,0x85,0xb4,0x00,0x01,0x85,0x28,0x21,0x8c,0xa6,0x00,0x00,0x01,0x73,0x10,0x21,
0x27,0x83,0x90,0x10,0x90,0xc4,0x00,0x16,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,
0x30,0x84,0x00,0xdf,0x90,0x50,0x00,0x00,0xa0,0xc4,0x00,0x16,0x80,0xc6,0x00,0x12,
0x8c,0xa3,0x00,0x00,0x2d,0xc4,0x00,0x02,0xaf,0xa6,0x00,0x1c,0x90,0x62,0x00,0x16,
0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfb,0x14,0x80,0x00,0x06,0xa0,0x62,0x00,0x16,
0x24,0x02,0x00,0x06,0x11,0xc2,0x00,0x03,0x24,0x02,0x00,0x04,0x15,0xc2,0xff,0x0e,
0x32,0x51,0x00,0x02,0x32,0x51,0x00,0x02,0x2e,0x02,0x00,0x0c,0x14,0x40,0x00,0x0f,
0x00,0x11,0x18,0x2b,0x32,0x02,0x00,0x0f,0x34,0x42,0x00,0x10,0x00,0x03,0x19,0x00,
0x00,0x43,0x18,0x21,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xe0,0xa0,0x43,0x00,0x00,
0x00,0x00,0x20,0x21,0x02,0x00,0x28,0x21,0x0c,0x00,0x02,0x03,0xaf,0xaf,0x00,0x28,
0x8f,0xaf,0x00,0x28,0x08,0x00,0x07,0xc2,0x00,0x00,0x00,0x00,0x08,0x00,0x08,0xbd,
0x32,0x03,0x00,0xff,0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x42,0x90,0x62,0x00,0x00,
0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x0f,0x14,0x40,0xfe,0xaa,0x00,0x00,0x00,0x00,
0x91,0xe2,0x00,0x09,0x00,0x00,0x00,0x00,0x02,0x82,0x10,0x26,0x08,0x00,0x07,0x79,
0x00,0x02,0x28,0x0b,0x08,0x00,0x07,0x7f,0x00,0x00,0xb0,0x21,0x24,0x02,0x00,0x10,
0x10,0xc2,0x00,0x08,0x24,0x02,0x00,0x11,0x10,0xc2,0xfe,0x7d,0x00,0x07,0x17,0x83,
0x24,0x02,0x00,0x12,0x14,0xc2,0xfe,0x7b,0x00,0x07,0x17,0x43,0x08,0x00,0x07,0x59,
0x30,0x5e,0x00,0x01,0x08,0x00,0x07,0x59,0x00,0x07,0xf7,0xc2,0x00,0x04,0x10,0x40,
0x27,0x83,0x80,0x1c,0x00,0x43,0x10,0x21,0x00,0x80,0x40,0x21,0x94,0x44,0x00,0x00,
0x2d,0x07,0x00,0x04,0x24,0xc2,0x00,0x03,0x00,0x47,0x30,0x0a,0x00,0x86,0x00,0x18,
0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x23,0x8c,
0xac,0x62,0x00,0x00,0x2d,0x06,0x00,0x10,0x00,0x00,0x20,0x12,0x00,0x04,0x22,0x42,
0x24,0x84,0x00,0x01,0x24,0x83,0x00,0xc0,0x10,0xe0,0x00,0x0b,0x24,0x82,0x00,0x60,
0x00,0x40,0x20,0x21,0x00,0x65,0x20,0x0a,0x3c,0x03,0xb0,0x03,0x34,0x63,0x01,0x00,
0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x00,0x44,0x20,0x04,
0x03,0xe0,0x00,0x08,0x00,0x80,0x10,0x21,0x24,0x85,0x00,0x28,0x24,0x83,0x00,0x24,
0x31,0x02,0x00,0x08,0x14,0xc0,0xff,0xf4,0x24,0x84,0x00,0x14,0x00,0x60,0x20,0x21,
0x08,0x00,0x08,0xfa,0x00,0xa2,0x20,0x0b,0x27,0xbd,0xff,0xe0,0x3c,0x03,0xb0,0x03,
0x3c,0x02,0x80,0x00,0xaf,0xb0,0x00,0x10,0x24,0x42,0x24,0x28,0x00,0x80,0x80,0x21,
0x34,0x63,0x00,0x20,0x3c,0x04,0xb0,0x03,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,
0xaf,0xbf,0x00,0x1c,0x83,0xb1,0x00,0x33,0x83,0xa8,0x00,0x37,0x34,0x84,0x01,0x10,
0xac,0x62,0x00,0x00,0x2e,0x02,0x00,0x10,0x00,0xe0,0x90,0x21,0x8c,0x87,0x00,0x00,
0x14,0x40,0x00,0x0c,0x2e,0x02,0x00,0x0c,0x3c,0x02,0x00,0x0f,0x34,0x42,0xf0,0x00,
0x00,0xe2,0x10,0x24,0x14,0x40,0x00,0x37,0x32,0x02,0x00,0x08,0x32,0x02,0x00,0x07,
0x27,0x83,0x80,0xcc,0x00,0x43,0x10,0x21,0x90,0x50,0x00,0x00,0x00,0x00,0x00,0x00,
0x2e,0x02,0x00,0x0c,0x14,0x40,0x00,0x03,0x02,0x00,0x20,0x21,0x32,0x02,0x00,0x0f,
0x24,0x44,0x00,0x0c,0x00,0x87,0x10,0x06,0x30,0x42,0x00,0x01,0x14,0x40,0x00,0x07,
0x2c,0x82,0x00,0x0c,0x00,0x04,0x10,0x80,0x27,0x83,0xb4,0x50,0x00,0x43,0x10,0x21,
0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0x82,0x00,0x0c,0x14,0x40,0x00,0x05,
0x00,0x05,0x10,0x40,0x00,0x46,0x10,0x21,0x00,0x02,0x11,0x00,0x00,0x82,0x10,0x21,
0x24,0x44,0x00,0x04,0x15,0x00,0x00,0x02,0x24,0x06,0x00,0x20,0x24,0x06,0x00,0x0e,
0x0c,0x00,0x08,0xe3,0x00,0x00,0x00,0x00,0x00,0x40,0x30,0x21,0x3c,0x02,0xb0,0x03,
0x34,0x42,0x01,0x00,0x90,0x43,0x00,0x00,0x2e,0x04,0x00,0x04,0x24,0x02,0x00,0x10,
0x24,0x05,0x00,0x0a,0x00,0x44,0x28,0x0a,0x30,0x63,0x00,0x01,0x14,0x60,0x00,0x02,
0x00,0x05,0x10,0x40,0x00,0xa0,0x10,0x21,0x30,0x45,0x00,0xff,0x00,0xc5,0x10,0x21,
0x24,0x46,0x00,0x46,0x02,0x26,0x18,0x04,0xa6,0x43,0x00,0x00,0x8f,0xbf,0x00,0x1c,
0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x00,0xc0,0x10,0x21,0x03,0xe0,0x00,0x08,
0x27,0xbd,0x00,0x20,0x10,0x40,0xff,0xcf,0x2e,0x02,0x00,0x0c,0x32,0x02,0x00,0x07,
0x27,0x83,0x80,0xc4,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x00,0x08,0x00,0x09,0x28,
0x02,0x04,0x80,0x23,0x27,0xbd,0xff,0xb8,0x00,0x05,0x38,0x80,0x27,0x82,0xb4,0x00,
0xaf,0xbe,0x00,0x40,0xaf,0xb6,0x00,0x38,0xaf,0xb3,0x00,0x2c,0xaf,0xbf,0x00,0x44,
0xaf,0xb7,0x00,0x3c,0xaf,0xb5,0x00,0x34,0xaf,0xb4,0x00,0x30,0xaf,0xb2,0x00,0x28,
0xaf,0xb1,0x00,0x24,0xaf,0xb0,0x00,0x20,0x00,0xe2,0x38,0x21,0x8c,0xe6,0x00,0x00,
0xaf,0xa5,0x00,0x4c,0x3c,0x02,0x80,0x00,0x3c,0x05,0xb0,0x03,0x34,0xa5,0x00,0x20,
0x24,0x42,0x25,0x84,0x24,0x03,0x00,0x01,0xac,0xa2,0x00,0x00,0xa0,0xc3,0x00,0x12,
0x8c,0xe5,0x00,0x00,0x94,0xc3,0x00,0x06,0x90,0xa2,0x00,0x16,0xa4,0xc3,0x00,0x14,
0x27,0x83,0x90,0x00,0x34,0x42,0x00,0x08,0xa0,0xa2,0x00,0x16,0x8c,0xe8,0x00,0x00,
0xaf,0xa4,0x00,0x48,0x27,0x82,0x90,0x04,0x95,0x11,0x00,0x14,0x00,0x00,0x00,0x00,
0x00,0x11,0x98,0xc0,0x02,0x71,0x20,0x21,0x00,0x04,0x20,0x80,0x00,0x82,0x10,0x21,
0x8c,0x52,0x00,0x18,0x00,0x83,0x18,0x21,0x84,0x75,0x00,0x06,0x8e,0x45,0x00,0x08,
0x8e,0x46,0x00,0x04,0x8e,0x47,0x00,0x04,0x00,0x05,0x1c,0x82,0x00,0x06,0x31,0x42,
0x27,0x82,0x90,0x10,0x30,0x63,0x00,0x01,0x30,0xc6,0x00,0x01,0x00,0x82,0x20,0x21,
0xa5,0x15,0x00,0x1a,0x00,0x05,0x14,0x42,0xaf,0xa3,0x00,0x18,0xaf,0xa6,0x00,0x1c,
0x30,0xe7,0x00,0x10,0x30,0x56,0x00,0x01,0x80,0x97,0x00,0x06,0x14,0xe0,0x00,0x47,
0x00,0x05,0xf7,0xc2,0x80,0x82,0x00,0x05,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x44,
0x02,0x71,0x10,0x21,0x93,0x90,0xbb,0xe9,0x00,0x00,0x00,0x00,0x2e,0x02,0x00,0x0c,
0x14,0x40,0x00,0x06,0x02,0x00,0x20,0x21,0x00,0x16,0x10,0x40,0x00,0x43,0x10,0x21,
0x00,0x02,0x11,0x00,0x02,0x02,0x10,0x21,0x24,0x44,0x00,0x04,0x02,0x71,0x10,0x21,
0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,0x00,0x80,0x80,0x21,
0xa0,0x44,0x00,0x03,0xa0,0x44,0x00,0x00,0x02,0x00,0x20,0x21,0x02,0xc0,0x28,0x21,
0x0c,0x00,0x08,0xe3,0x02,0xa0,0x30,0x21,0x02,0x71,0x18,0x21,0x00,0x03,0x88,0x80,
0x00,0x40,0xa0,0x21,0x27,0x82,0x90,0x20,0x02,0x22,0x10,0x21,0x8c,0x44,0x00,0x00,
0x26,0xe3,0x00,0x02,0x00,0x03,0x17,0xc2,0x00,0x62,0x18,0x21,0x00,0x04,0x25,0xc2,
0x00,0x03,0x18,0x43,0x30,0x84,0x00,0x01,0x00,0x03,0x18,0x40,0x03,0xc4,0x20,0x24,
0x14,0x80,0x00,0x15,0x02,0x43,0x38,0x21,0x3c,0x08,0xb0,0x03,0x35,0x08,0x00,0x28,
0x8d,0x03,0x00,0x00,0x8f,0xa6,0x00,0x4c,0x8f,0xa4,0x00,0x48,0x27,0x82,0x90,0x08,
0x02,0x22,0x10,0x21,0x24,0x63,0x00,0x01,0x02,0xa0,0x28,0x21,0xa4,0x54,0x00,0x04,
0x00,0xc0,0x38,0x21,0x0c,0x00,0x07,0x2f,0xad,0x03,0x00,0x00,0x7b,0xbe,0x02,0x3c,
0x7b,0xb6,0x01,0xfc,0x7b,0xb4,0x01,0xbc,0x7b,0xb2,0x01,0x7c,0x7b,0xb0,0x01,0x3c,
0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x48,0x8f,0xa2,0x00,0x1c,0x8f,0xa6,0x00,0x18,
0x02,0x00,0x20,0x21,0x02,0xc0,0x28,0x21,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x09,0x0a,
0xaf,0xa0,0x00,0x14,0x08,0x00,0x09,0xc6,0x02,0x82,0xa0,0x21,0x02,0x71,0x10,0x21,
0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,0x90,0x50,0x00,0x00,
0x08,0x00,0x09,0xb2,0xa0,0x50,0x00,0x03,0x27,0xbd,0xff,0xb8,0xaf,0xb1,0x00,0x24,
0x8f,0xb1,0x00,0x5c,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,
0x24,0x42,0x27,0xa8,0xaf,0xbe,0x00,0x40,0xaf,0xb7,0x00,0x3c,0xaf,0xb6,0x00,0x38,
0xaf,0xb5,0x00,0x34,0xaf,0xb4,0x00,0x30,0xaf,0xa5,0x00,0x4c,0x8f,0xb5,0x00,0x58,
0xaf,0xbf,0x00,0x44,0xaf,0xb3,0x00,0x2c,0xaf,0xb2,0x00,0x28,0xaf,0xb0,0x00,0x20,
0x00,0xe0,0xb0,0x21,0xac,0x62,0x00,0x00,0x00,0x80,0xf0,0x21,0x00,0x00,0xb8,0x21,
0x16,0x20,0x00,0x2b,0x00,0x00,0xa0,0x21,0x27,0x85,0xb4,0x00,0x00,0x07,0x10,0x80,
0x00,0x45,0x10,0x21,0x8c,0x53,0x00,0x00,0x00,0x15,0x18,0x80,0x00,0x65,0x18,0x21,
0x92,0x62,0x00,0x16,0x8c,0x72,0x00,0x00,0x30,0x42,0x00,0x03,0x14,0x40,0x00,0x2d,
0x00,0x00,0x00,0x00,0x92,0x42,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x03,
0x14,0x40,0x00,0x28,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x34,0x00,0x00,0x00,0x00,
0x14,0x40,0x00,0x18,0x02,0x20,0x10,0x21,0x8c,0x82,0x00,0x38,0x00,0x00,0x00,0x00,
0x14,0x40,0x00,0x14,0x02,0x20,0x10,0x21,0x8c,0x82,0x00,0x3c,0x00,0x00,0x00,0x00,
0x14,0x40,0x00,0x0f,0x3c,0x03,0xb0,0x09,0x3c,0x05,0xb0,0x05,0x34,0x63,0x01,0x44,
0x34,0xa5,0x02,0x52,0x94,0x66,0x00,0x00,0x90,0xa2,0x00,0x00,0x8f,0xa3,0x00,0x4c,
0x00,0x00,0x00,0x00,0x00,0x62,0x10,0x06,0x30,0x42,0x00,0x01,0x10,0x40,0x00,0x04,
0x30,0xc6,0xff,0xff,0x2c,0xc2,0x00,0x41,0x10,0x40,0x00,0x09,0x24,0x05,0x00,0x14,
0x02,0x20,0x10,0x21,0x7b,0xbe,0x02,0x3c,0x7b,0xb6,0x01,0xfc,0x7b,0xb4,0x01,0xbc,
0x7b,0xb2,0x01,0x7c,0x7b,0xb0,0x01,0x3c,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x48,
0x0c,0x00,0x07,0x0a,0x24,0x06,0x01,0x07,0x24,0x02,0x00,0x01,0x08,0x00,0x0a,0x2c,
0xa3,0xc2,0x00,0x11,0x10,0xc0,0x00,0x1c,0x24,0x02,0x00,0x01,0x10,0xc2,0x00,0x17,
0x00,0xc0,0x88,0x21,0x96,0x54,0x00,0x1a,0x02,0xa0,0xb8,0x21,0x12,0x20,0xff,0xed,
0x02,0x20,0x10,0x21,0x27,0x83,0xb4,0x00,0x00,0x17,0x10,0x80,0x00,0x43,0x10,0x21,
0x8c,0x44,0x00,0x00,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x28,0x80,0x86,0x00,0x12,
0x8c,0x62,0x00,0x00,0x00,0x14,0x2c,0x00,0x00,0x05,0x2c,0x03,0x00,0x46,0x10,0x21,
0x8f,0xa6,0x00,0x4c,0x02,0xe0,0x38,0x21,0x03,0xc0,0x20,0x21,0x0c,0x00,0x07,0x2f,
0xac,0x62,0x00,0x00,0x08,0x00,0x0a,0x2c,0xaf,0xd1,0x00,0x40,0x96,0x74,0x00,0x1a,
0x08,0x00,0x0a,0x3f,0x02,0xc0,0xb8,0x21,0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x08,
0x8c,0x50,0x00,0x00,0x02,0x60,0x20,0x21,0x0c,0x00,0x1e,0xf3,0x02,0x00,0x28,0x21,
0x30,0x42,0x00,0xff,0x02,0x00,0x28,0x21,0x02,0x40,0x20,0x21,0x0c,0x00,0x1e,0xf3,
0xaf,0xa2,0x00,0x18,0x8f,0xa4,0x00,0x18,0x00,0x00,0x00,0x00,0x10,0x80,0x00,0xed,
0x30,0x50,0x00,0xff,0x12,0x00,0x00,0x18,0x24,0x11,0x00,0x01,0x96,0x63,0x00,0x14,
0x96,0x44,0x00,0x14,0x27,0x85,0x90,0x00,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
0x00,0x02,0x10,0x80,0x00,0x45,0x10,0x21,0x00,0x04,0x18,0xc0,0x8c,0x46,0x00,0x08,
0x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x65,0x18,0x21,0x00,0x06,0x17,0x02,
0x24,0x04,0x00,0xff,0x8c,0x63,0x00,0x08,0x10,0x44,0x00,0xd6,0x00,0x03,0x17,0x02,
0x10,0x44,0x00,0xd5,0x3c,0x02,0x80,0x00,0x00,0x66,0x18,0x2b,0x24,0x11,0x00,0x02,
0x24,0x02,0x00,0x01,0x00,0x43,0x88,0x0a,0x24,0x02,0x00,0x01,0x12,0x22,0x00,0x5a,
0x24,0x02,0x00,0x02,0x16,0x22,0xff,0xbd,0x00,0x00,0x00,0x00,0x96,0x49,0x00,0x14,
0x27,0x82,0x90,0x04,0x02,0xa0,0xb8,0x21,0x00,0x09,0x50,0xc0,0x01,0x49,0x18,0x21,
0x00,0x03,0x40,0x80,0x01,0x02,0x10,0x21,0x8c,0x43,0x00,0x18,0x00,0x00,0x00,0x00,
0x8c,0x65,0x00,0x08,0x8c,0x62,0x00,0x0c,0x8c,0x62,0x00,0x04,0x00,0x05,0x24,0x42,
0x00,0x05,0x1c,0x82,0x30,0x42,0x00,0x10,0x30,0x66,0x00,0x01,0x14,0x40,0x00,0x41,
0x30,0x87,0x00,0x01,0x27,0x82,0x90,0x18,0x01,0x02,0x10,0x21,0x80,0x44,0x00,0x00,
0x27,0x82,0xb5,0x78,0x00,0x04,0x19,0x00,0x00,0x64,0x18,0x23,0x00,0x03,0x18,0x80,
0x00,0x64,0x18,0x23,0x00,0x03,0x18,0x80,0x00,0x62,0x10,0x21,0x90,0x45,0x00,0x05,
0x27,0x84,0xb4,0xa0,0x00,0x64,0x18,0x21,0x90,0x63,0x00,0x00,0x10,0xa0,0x00,0x2b,
0x2c,0x64,0x00,0x0c,0x14,0x80,0x00,0x04,0x00,0x60,0x10,0x21,0x00,0x06,0x11,0x00,
0x00,0x62,0x10,0x21,0x24,0x42,0x00,0x24,0x3c,0x01,0xb0,0x03,0xa0,0x22,0x00,0xe1,
0x14,0x80,0x00,0x06,0x00,0x60,0x28,0x21,0x00,0x07,0x10,0x40,0x00,0x46,0x10,0x21,
0x00,0x02,0x11,0x00,0x00,0x62,0x10,0x21,0x24,0x45,0x00,0x04,0x01,0x49,0x10,0x21,
0x27,0x83,0x90,0x10,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x00,0xa0,0x18,0x21,
0xa0,0x45,0x00,0x03,0xa0,0x45,0x00,0x00,0x24,0x02,0x00,0x08,0x12,0x02,0x00,0x0b,
0x24,0x02,0x00,0x01,0x00,0x60,0x28,0x21,0x02,0x40,0x20,0x21,0x0c,0x00,0x1f,0x6f,
0xaf,0xa2,0x00,0x10,0x30,0x54,0xff,0xff,0x92,0x42,0x00,0x16,0x00,0x00,0x00,0x00,
0x02,0x02,0x10,0x25,0x08,0x00,0x0a,0x3f,0xa2,0x42,0x00,0x16,0x00,0x60,0x28,0x21,
0x02,0x40,0x20,0x21,0x0c,0x00,0x1f,0x20,0xaf,0xa0,0x00,0x10,0x08,0x00,0x0a,0xc2,
0x30,0x54,0xff,0xff,0x08,0x00,0x0a,0xaa,0x00,0x60,0x10,0x21,0x14,0x80,0xff,0xfd,
0x00,0x00,0x00,0x00,0x00,0x06,0x11,0x00,0x00,0x62,0x10,0x21,0x08,0x00,0x0a,0xaa,
0x24,0x42,0x00,0x04,0x27,0x82,0x90,0x10,0x01,0x02,0x10,0x21,0x90,0x43,0x00,0x00,
0x08,0x00,0x0a,0xba,0xa0,0x43,0x00,0x03,0x96,0x69,0x00,0x14,0x02,0xc0,0xb8,0x21,
0x24,0x0b,0x00,0x01,0x00,0x09,0x10,0xc0,0x00,0x49,0x18,0x21,0x00,0x03,0x40,0x80,
0x00,0x40,0x50,0x21,0x27,0x82,0x90,0x04,0x01,0x02,0x10,0x21,0x8c,0x43,0x00,0x18,
0x00,0x00,0x00,0x00,0x8c,0x65,0x00,0x08,0x8c,0x62,0x00,0x0c,0x8c,0x62,0x00,0x04,
0x00,0x05,0x24,0x42,0x00,0x05,0x1c,0x82,0x30,0x42,0x00,0x10,0x30,0x66,0x00,0x01,
0x10,0x40,0x00,0x0d,0x30,0x87,0x00,0x01,0x27,0x82,0x90,0x18,0x01,0x02,0x10,0x21,
0x80,0x43,0x00,0x00,0x00,0x00,0x58,0x21,0x00,0x03,0x11,0x00,0x00,0x43,0x10,0x23,
0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x23,0x00,0x02,0x10,0x80,0x27,0x83,0xb5,0x70,
0x00,0x43,0x10,0x21,0xa0,0x40,0x00,0x04,0x11,0x60,0x00,0x4f,0x00,0x00,0x00,0x00,
0x01,0x49,0x10,0x21,0x00,0x02,0x20,0x80,0x27,0x85,0x90,0x10,0x00,0x85,0x10,0x21,
0x80,0x43,0x00,0x05,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x42,0x01,0x49,0x10,0x21,
0x27,0x82,0x90,0x18,0x00,0x82,0x10,0x21,0x80,0x44,0x00,0x00,0x27,0x82,0xb5,0x78,
0x00,0x04,0x19,0x00,0x00,0x64,0x18,0x23,0x00,0x03,0x18,0x80,0x00,0x64,0x18,0x23,
0x00,0x03,0x18,0x80,0x00,0x62,0x10,0x21,0x90,0x45,0x00,0x05,0x27,0x84,0xb4,0xa0,
0x00,0x64,0x18,0x21,0x90,0x63,0x00,0x00,0x10,0xa0,0x00,0x2c,0x2c,0x64,0x00,0x0c,
0x14,0x80,0x00,0x04,0x00,0x60,0x10,0x21,0x00,0x06,0x11,0x00,0x00,0x62,0x10,0x21,
0x24,0x42,0x00,0x24,0x3c,0x01,0xb0,0x03,0xa0,0x22,0x00,0xe1,0x14,0x80,0x00,0x06,
0x00,0x60,0x28,0x21,0x00,0x07,0x10,0x40,0x00,0x46,0x10,0x21,0x00,0x02,0x11,0x00,
0x00,0x62,0x10,0x21,0x24,0x45,0x00,0x04,0x01,0x49,0x10,0x21,0x27,0x83,0x90,0x10,
0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x00,0xa0,0x18,0x21,0xa0,0x45,0x00,0x03,
0xa0,0x45,0x00,0x00,0x8f,0xa4,0x00,0x18,0x24,0x02,0x00,0x08,0x10,0x82,0x00,0x0c,
0x00,0x60,0x28,0x21,0x24,0x02,0x00,0x01,0x02,0x60,0x20,0x21,0x0c,0x00,0x1f,0x6f,
0xaf,0xa2,0x00,0x10,0x8f,0xa3,0x00,0x18,0x30,0x54,0xff,0xff,0x92,0x62,0x00,0x16,
0x00,0x00,0x00,0x00,0x00,0x62,0x10,0x25,0x08,0x00,0x0a,0x3f,0xa2,0x62,0x00,0x16,
0x02,0x60,0x20,0x21,0x0c,0x00,0x1f,0x20,0xaf,0xa0,0x00,0x10,0x08,0x00,0x0b,0x31,
0x00,0x00,0x00,0x00,0x08,0x00,0x0b,0x19,0x00,0x60,0x10,0x21,0x14,0x80,0xff,0xfd,
0x00,0x00,0x00,0x00,0x00,0x06,0x11,0x00,0x00,0x62,0x10,0x21,0x08,0x00,0x0b,0x19,
0x24,0x42,0x00,0x04,0x00,0x02,0x10,0x80,0x00,0x45,0x10,0x21,0x90,0x43,0x00,0x00,
0x08,0x00,0x0b,0x29,0xa0,0x43,0x00,0x03,0x27,0x85,0x90,0x10,0x08,0x00,0x0b,0x45,
0x01,0x49,0x10,0x21,0x3c,0x02,0x80,0x00,0x00,0x62,0x18,0x26,0x08,0x00,0x0a,0x7a,
0x00,0xc2,0x30,0x26,0x12,0x00,0xff,0x2d,0x24,0x02,0x00,0x01,0x08,0x00,0x0a,0x7f,
0x24,0x11,0x00,0x02,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xd0,
0x24,0x42,0x2d,0x54,0x34,0x63,0x00,0x20,0x3c,0x05,0xb0,0x05,0xaf,0xb3,0x00,0x24,
0xaf,0xb2,0x00,0x20,0xaf,0xb1,0x00,0x1c,0xaf,0xbf,0x00,0x28,0xaf,0xb0,0x00,0x18,
0xac,0x62,0x00,0x00,0x34,0xa5,0x02,0x42,0x90,0xa2,0x00,0x00,0x00,0x80,0x90,0x21,
0x24,0x11,0x00,0x10,0x30,0x53,0x00,0xff,0x24,0x02,0x00,0x10,0x12,0x22,0x00,0xcf,
0x00,0x00,0x18,0x21,0x24,0x02,0x00,0x11,0x12,0x22,0x00,0xc1,0x24,0x02,0x00,0x12,
0x12,0x22,0x00,0xb4,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0xad,0xae,0x43,0x00,0x40,
0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2c,0x8c,0x44,0x00,0x00,0x3c,0x03,0x00,0x02,
0x34,0x63,0x00,0xff,0x00,0x83,0x80,0x24,0x00,0x10,0x14,0x43,0x10,0x40,0x00,0x05,
0x00,0x00,0x00,0x00,0x8e,0x42,0x00,0x34,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x92,
0x00,0x00,0x00,0x00,0x93,0x83,0x8b,0x71,0x00,0x00,0x00,0x00,0x30,0x62,0x00,0x02,
0x10,0x40,0x00,0x04,0x32,0x10,0x00,0xff,0x00,0x10,0x11,0xc3,0x14,0x40,0x00,0x86,
0x00,0x00,0x00,0x00,0x16,0x00,0x00,0x15,0x02,0x00,0x10,0x21,0x26,0x22,0x00,0x01,
0x30,0x51,0x00,0xff,0x2e,0x23,0x00,0x13,0x14,0x60,0xff,0xdb,0x24,0x03,0x00,0x02,
0x12,0x63,0x00,0x73,0x24,0x02,0x00,0x05,0x2a,0x62,0x00,0x03,0x10,0x40,0x00,0x58,
0x24,0x02,0x00,0x04,0x24,0x02,0x00,0x01,0x12,0x62,0x00,0x4b,0x02,0x40,0x20,0x21,
0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2c,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
0x30,0x70,0x00,0xff,0x12,0x00,0x00,0x06,0x02,0x00,0x10,0x21,0x8f,0xbf,0x00,0x28,
0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,
0x92,0x46,0x00,0x04,0x8e,0x43,0x00,0x24,0x24,0x02,0x00,0x07,0x02,0x40,0x20,0x21,
0x00,0x00,0x28,0x21,0x24,0x07,0x00,0x06,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x09,0xea,
0xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x24,0x3c,0x02,0xb0,0x05,0x8c,0x42,0x02,0x2c,
0x00,0x00,0x00,0x00,0x30,0x50,0x00,0xff,0x16,0x00,0xff,0xec,0x02,0x00,0x10,0x21,
0x92,0x46,0x00,0x05,0x8e,0x43,0x00,0x28,0x24,0x02,0x00,0x05,0x02,0x40,0x20,0x21,
0x24,0x05,0x00,0x01,0x24,0x07,0x00,0x04,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x09,0xea,
0xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x28,0x3c,0x02,0xb0,0x05,0x8c,0x42,0x02,0x2c,
0x00,0x00,0x00,0x00,0x30,0x50,0x00,0xff,0x16,0x00,0xff,0xdc,0x02,0x00,0x10,0x21,
0x92,0x46,0x00,0x06,0x8e,0x43,0x00,0x2c,0x24,0x02,0x00,0x03,0x02,0x40,0x20,0x21,
0x24,0x05,0x00,0x02,0x00,0x00,0x38,0x21,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x09,0xea,
0xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x2c,0x3c,0x02,0xb0,0x05,0x8c,0x42,0x02,0x2c,
0x00,0x00,0x00,0x00,0x30,0x50,0x00,0xff,0x16,0x00,0xff,0xcc,0x02,0x00,0x10,0x21,
0x92,0x46,0x00,0x07,0x8e,0x43,0x00,0x30,0x24,0x02,0x00,0x02,0x02,0x40,0x20,0x21,
0x24,0x05,0x00,0x03,0x24,0x07,0x00,0x01,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x09,0xea,
0xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x30,0x3c,0x02,0xb0,0x05,0x8c,0x42,0x02,0x2c,
0x08,0x00,0x0b,0x9b,0x30,0x42,0x00,0xff,0x92,0x46,0x00,0x04,0x8e,0x43,0x00,0x24,
0x24,0x02,0x00,0x07,0x00,0x00,0x28,0x21,0x24,0x07,0x00,0x06,0xaf,0xa2,0x00,0x10,
0x0c,0x00,0x09,0xea,0xaf,0xa3,0x00,0x14,0x08,0x00,0x0b,0x94,0xae,0x42,0x00,0x24,
0x12,0x62,0x00,0x0d,0x24,0x02,0x00,0x03,0x24,0x02,0x00,0x08,0x16,0x62,0xff,0xa8,
0x02,0x40,0x20,0x21,0x92,0x46,0x00,0x07,0x8e,0x42,0x00,0x30,0x24,0x05,0x00,0x03,
0x24,0x07,0x00,0x01,0xaf,0xa3,0x00,0x10,0x0c,0x00,0x09,0xea,0xaf,0xa2,0x00,0x14,
0x08,0x00,0x0b,0x94,0xae,0x42,0x00,0x30,0x92,0x46,0x00,0x06,0x8e,0x43,0x00,0x2c,
0x02,0x40,0x20,0x21,0x24,0x05,0x00,0x02,0x00,0x00,0x38,0x21,0xaf,0xa2,0x00,0x10,
0x0c,0x00,0x09,0xea,0xaf,0xa3,0x00,0x14,0x08,0x00,0x0b,0x94,0xae,0x42,0x00,0x2c,
0x92,0x46,0x00,0x05,0x8e,0x43,0x00,0x28,0x02,0x40,0x20,0x21,0x24,0x05,0x00,0x01,
0x24,0x07,0x00,0x04,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x09,0xea,0xaf,0xa3,0x00,0x14,
0x08,0x00,0x0b,0x94,0xae,0x42,0x00,0x28,0x0c,0x00,0x01,0x57,0x24,0x04,0x00,0x01,
0x08,0x00,0x0b,0x85,0x00,0x00,0x00,0x00,0x8f,0x84,0xb4,0x40,0xae,0x40,0x00,0x34,
0x94,0x85,0x00,0x14,0x0c,0x00,0x1b,0x66,0x00,0x00,0x00,0x00,0x93,0x83,0x8b,0x71,
0x00,0x00,0x00,0x00,0x30,0x62,0x00,0x02,0x10,0x40,0xff,0x69,0x00,0x00,0x00,0x00,
0x0c,0x00,0x01,0x57,0x00,0x00,0x20,0x21,0x08,0x00,0x0b,0x7d,0x00,0x00,0x00,0x00,
0x02,0x40,0x20,0x21,0x0c,0x00,0x09,0x61,0x02,0x20,0x28,0x21,0x08,0x00,0x0b,0x71,
0x3c,0x02,0xb0,0x05,0x8e,0x42,0x00,0x3c,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x4a,
0x00,0x00,0x00,0x00,0x8f,0x82,0xb4,0x48,0x00,0x00,0x00,0x00,0x90,0x42,0x00,0x0a,
0x00,0x00,0x00,0x00,0x00,0x02,0x18,0x2b,0x08,0x00,0x0b,0x6e,0xae,0x43,0x00,0x3c,
0x8e,0x42,0x00,0x38,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x3d,0x24,0x02,0x00,0x12,
0x8f,0x82,0xb4,0x44,0x00,0x00,0x00,0x00,0x90,0x42,0x00,0x0a,0x00,0x00,0x00,0x00,
0x00,0x02,0x18,0x2b,0x08,0x00,0x0b,0x6e,0xae,0x43,0x00,0x38,0x8e,0x42,0x00,0x34,
0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x30,0x24,0x02,0x00,0x11,0x8f,0x82,0xb4,0x40,
0x00,0x00,0x00,0x00,0x90,0x42,0x00,0x0a,0x00,0x00,0x00,0x00,0x00,0x02,0x18,0x2b,
0x08,0x00,0x0b,0x6e,0xae,0x43,0x00,0x34,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
0x27,0xbd,0xff,0xe0,0x34,0x63,0x00,0x20,0x24,0x42,0x31,0x08,0x3c,0x08,0xb0,0x03,
0xaf,0xb1,0x00,0x14,0xac,0x62,0x00,0x00,0x35,0x08,0x01,0x00,0xaf,0xbf,0x00,0x18,
0xaf,0xb0,0x00,0x10,0x91,0x03,0x00,0x00,0x00,0xa0,0x48,0x21,0x24,0x11,0x00,0x0a,
0x2c,0xa5,0x00,0x04,0x24,0x02,0x00,0x10,0x00,0x45,0x88,0x0a,0x30,0x63,0x00,0x01,
0x00,0xc0,0x28,0x21,0x14,0x60,0x00,0x02,0x00,0x11,0x40,0x40,0x02,0x20,0x40,0x21,
0x84,0x83,0x00,0x0c,0x31,0x11,0x00,0xff,0x01,0x20,0x20,0x21,0x00,0x03,0x10,0xc0,
0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x08,0x00,0x43,0x10,0x21,
0x84,0x43,0x00,0x04,0x24,0x06,0x00,0x0e,0x10,0xe0,0x00,0x06,0x02,0x23,0x80,0x21,
0x02,0x00,0x10,0x21,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
0x27,0xbd,0x00,0x20,0x0c,0x00,0x08,0xe3,0x00,0x00,0x00,0x00,0x02,0x11,0x18,0x21,
0x08,0x00,0x0c,0x64,0x00,0x62,0x80,0x21,0x27,0xbd,0xff,0xd0,0xaf,0xbf,0x00,0x28,
0xaf,0xb4,0x00,0x20,0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,0xaf,0xb5,0x00,0x24,
0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0x84,0x82,0x00,0x0c,0x3c,0x06,0xb0,0x03,
0x34,0xc6,0x00,0x20,0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,0x00,0x03,0x18,0x80,
0x27,0x82,0x90,0x04,0x00,0x62,0x10,0x21,0x8c,0x55,0x00,0x18,0x3c,0x02,0x80,0x00,
0x24,0x42,0x31,0xb8,0xac,0xc2,0x00,0x00,0x8e,0xb0,0x00,0x08,0x27,0x82,0x90,0x08,
0x00,0x62,0x18,0x21,0x90,0x71,0x00,0x07,0x00,0x10,0x86,0x43,0x32,0x10,0x00,0x01,
0x00,0xa0,0x38,0x21,0x02,0x00,0x30,0x21,0x00,0xa0,0x98,0x21,0x02,0x20,0x28,0x21,
0x0c,0x00,0x0c,0x42,0x00,0x80,0x90,0x21,0x02,0x20,0x20,0x21,0x02,0x00,0x28,0x21,
0x24,0x06,0x00,0x14,0x0c,0x00,0x08,0xe3,0x00,0x40,0xa0,0x21,0x86,0x43,0x00,0x0c,
0x3c,0x09,0xb0,0x09,0x3c,0x08,0xb0,0x09,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,0x80,0x43,0x00,0x06,
0x3c,0x07,0xb0,0x09,0x3c,0x05,0xb0,0x09,0x28,0x62,0x00,0x00,0x24,0x64,0x00,0x03,
0x00,0x82,0x18,0x0b,0x00,0x03,0x18,0x83,0x3c,0x02,0xb0,0x09,0x00,0x03,0x18,0x80,
0x34,0x42,0x01,0x02,0x35,0x29,0x01,0x10,0x35,0x08,0x01,0x14,0x34,0xe7,0x01,0x20,
0x34,0xa5,0x01,0x24,0xa4,0x54,0x00,0x00,0x12,0x60,0x00,0x11,0x02,0xa3,0xa8,0x21,
0x8e,0xa2,0x00,0x0c,0x8e,0xa3,0x00,0x08,0x00,0x02,0x14,0x00,0x00,0x03,0x1c,0x02,
0x00,0x43,0x10,0x21,0xad,0x22,0x00,0x00,0x8e,0xa3,0x00,0x0c,0x00,0x00,0x00,0x00,
0x00,0x03,0x1c,0x02,0xa5,0x03,0x00,0x00,0x8f,0xbf,0x00,0x28,0x7b,0xb4,0x01,0x3c,
0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,
0x8e,0xa2,0x00,0x04,0x00,0x00,0x00,0x00,0xad,0x22,0x00,0x00,0x8e,0xa4,0x00,0x08,
0x00,0x00,0x00,0x00,0xa5,0x04,0x00,0x00,0x7a,0xa2,0x00,0x7c,0x00,0x00,0x00,0x00,
0x00,0x03,0x1c,0x00,0x00,0x02,0x14,0x02,0x00,0x62,0x18,0x21,0xac,0xe3,0x00,0x00,
0x8e,0xa2,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x02,0x14,0x02,0x08,0x00,0x0c,0xb6,
0xa4,0xa2,0x00,0x00,0x27,0xbd,0xff,0xe0,0xaf,0xb2,0x00,0x18,0xaf,0xb0,0x00,0x10,
0xaf,0xbf,0x00,0x1c,0xaf,0xb1,0x00,0x14,0x84,0x82,0x00,0x0c,0x00,0x80,0x90,0x21,
0x3c,0x05,0xb0,0x03,0x00,0x02,0x20,0xc0,0x00,0x82,0x20,0x21,0x00,0x04,0x20,0x80,
0x27,0x82,0x90,0x04,0x00,0x82,0x10,0x21,0x8c,0x51,0x00,0x18,0x3c,0x02,0x80,0x00,
0x34,0xa5,0x00,0x20,0x24,0x42,0x33,0x34,0x27,0x83,0x90,0x08,0xac,0xa2,0x00,0x00,
0x00,0x83,0x20,0x21,0x3c,0x02,0xb0,0x03,0x90,0x86,0x00,0x07,0x34,0x42,0x01,0x00,
0x8e,0x23,0x00,0x08,0x90,0x44,0x00,0x00,0x2c,0xc5,0x00,0x04,0x24,0x02,0x00,0x10,
0x24,0x10,0x00,0x0a,0x00,0x45,0x80,0x0a,0x00,0x03,0x1e,0x43,0x30,0x84,0x00,0x01,
0x30,0x65,0x00,0x01,0x14,0x80,0x00,0x02,0x00,0x10,0x10,0x40,0x02,0x00,0x10,0x21,
0x00,0xc0,0x20,0x21,0x24,0x06,0x00,0x20,0x0c,0x00,0x08,0xe3,0x30,0x50,0x00,0xff,
0x86,0x44,0x00,0x0c,0x27,0x85,0x90,0x10,0x3c,0x06,0xb0,0x09,0x00,0x04,0x18,0xc0,
0x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x65,0x18,0x21,0x80,0x64,0x00,0x06,
0x00,0x50,0x10,0x21,0x34,0xc6,0x01,0x02,0x24,0x85,0x00,0x03,0x28,0x83,0x00,0x00,
0x00,0xa3,0x20,0x0b,0x00,0x04,0x20,0x83,0x00,0x04,0x20,0x80,0xa4,0xc2,0x00,0x00,
0x02,0x24,0x20,0x21,0x8c,0x83,0x00,0x04,0x3c,0x02,0xb0,0x09,0x34,0x42,0x01,0x10,
0xac,0x43,0x00,0x00,0x8c,0x86,0x00,0x08,0x3c,0x02,0xb0,0x09,0x34,0x42,0x01,0x14,
0xa4,0x46,0x00,0x00,0x8c,0x85,0x00,0x0c,0x8c,0x82,0x00,0x08,0x3c,0x06,0xb0,0x09,
0x00,0x05,0x2c,0x00,0x00,0x02,0x14,0x02,0x00,0xa2,0x28,0x21,0x34,0xc6,0x01,0x20,
0xac,0xc5,0x00,0x00,0x8c,0x83,0x00,0x0c,0x3c,0x05,0xb0,0x09,0x34,0xa5,0x01,0x24,
0x00,0x03,0x1c,0x02,0xa4,0xa3,0x00,0x00,0x92,0x42,0x00,0x0a,0x3c,0x03,0xb0,0x09,
0x34,0x63,0x01,0x30,0x00,0x02,0x13,0x00,0x24,0x42,0x00,0x04,0x30,0x42,0xff,0xff,
0xa4,0x62,0x00,0x00,0x86,0x44,0x00,0x0c,0x27,0x83,0x90,0x18,0x8f,0xbf,0x00,0x1c,
0x00,0x04,0x10,0xc0,0x00,0x44,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,
0x94,0x44,0x00,0x02,0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x3c,0x05,0xb0,0x09,
0x34,0xa5,0x01,0x32,0xa4,0xa4,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,
0x27,0xbd,0xff,0xe0,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x00,0xaf,0xb0,0x00,0x10,
0x34,0x42,0x00,0x20,0x00,0xa0,0x80,0x21,0x24,0x63,0x34,0xc0,0x00,0x05,0x2c,0x43,
0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x18,0xac,0x43,0x00,0x00,0x10,0xa0,0x00,0x05,
0x00,0x80,0x88,0x21,0x8c,0x82,0x00,0x34,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0xb6,
0x00,0x00,0x00,0x00,0x32,0x10,0x00,0xff,0x12,0x00,0x00,0x4c,0x00,0x00,0x10,0x21,
0x24,0x02,0x00,0x08,0x12,0x02,0x00,0xa3,0x2a,0x02,0x00,0x09,0x10,0x40,0x00,0x89,
0x24,0x02,0x00,0x40,0x24,0x04,0x00,0x02,0x12,0x04,0x00,0x79,0x2a,0x02,0x00,0x03,
0x10,0x40,0x00,0x69,0x24,0x02,0x00,0x04,0x24,0x02,0x00,0x01,0x12,0x02,0x00,0x5a,
0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x05,0x34,0x42,0x00,0x08,0x3c,0x03,0x80,0x00,
0xa2,0x20,0x00,0x4e,0xac,0x43,0x00,0x00,0x82,0x24,0x00,0x11,0x92,0x27,0x00,0x11,
0x10,0x80,0x00,0x4e,0x00,0x00,0x00,0x00,0x92,0x26,0x00,0x0a,0x24,0x02,0x00,0x12,
0x10,0x46,0x00,0x09,0x30,0xc2,0x00,0xff,0x27,0x83,0xb4,0x00,0x00,0x02,0x10,0x80,
0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x94,0x83,0x00,0x14,
0x00,0x00,0x00,0x00,0xa6,0x23,0x00,0x0c,0x3c,0x02,0xb0,0x09,0x34,0x42,0x00,0x40,
0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x03,0xa2,0x23,0x00,0x10,
0x14,0x60,0x00,0x2b,0x30,0x65,0x00,0x01,0x30,0xc2,0x00,0xff,0x27,0x83,0xb4,0x00,
0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x82,0x23,0x00,0x12,
0x90,0x82,0x00,0x16,0x00,0x00,0x00,0x00,0x00,0x02,0x11,0x42,0x30,0x42,0x00,0x01,
0x00,0x62,0x18,0x21,0x00,0x03,0x26,0x00,0x14,0x80,0x00,0x18,0xa2,0x23,0x00,0x12,
0x00,0x07,0x16,0x00,0x14,0x40,0x00,0x11,0x24,0x02,0x00,0x01,0x96,0x23,0x00,0x0c,
0x27,0x84,0x90,0x10,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
0x00,0x44,0x10,0x21,0x80,0x45,0x00,0x06,0x00,0x03,0x1a,0x00,0x3c,0x02,0xb0,0x00,
0x00,0x65,0x18,0x21,0x00,0x62,0x18,0x21,0x90,0x64,0x00,0x00,0x90,0x62,0x00,0x04,
0xa2,0x20,0x00,0x15,0xa3,0x80,0x8b,0xd4,0x24,0x02,0x00,0x01,0x8f,0xbf,0x00,0x18,
0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x0c,0x00,0x0c,0xcd,
0x02,0x20,0x20,0x21,0x92,0x27,0x00,0x11,0x08,0x00,0x0d,0x7d,0x00,0x07,0x16,0x00,
0x0c,0x00,0x0c,0x6e,0x02,0x20,0x20,0x21,0x86,0x23,0x00,0x0c,0x27,0x84,0x90,0x08,
0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x44,0x20,0x21,
0x90,0x85,0x00,0x07,0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,0xa2,0x25,0x00,0x13,
0x90,0x83,0x00,0x07,0x08,0x00,0x0d,0x95,0xa0,0x43,0x00,0x02,0x92,0x26,0x00,0x0a,
0x08,0x00,0x0d,0x5e,0x30,0xc2,0x00,0xff,0x8e,0x22,0x00,0x24,0x00,0x00,0x00,0x00,
0x10,0x50,0x00,0x07,0xa2,0x20,0x00,0x08,0x24,0x02,0x00,0x07,0xa2,0x22,0x00,0x0a,
0x92,0x22,0x00,0x27,0xae,0x20,0x00,0x24,0x08,0x00,0x0d,0x51,0xa2,0x22,0x00,0x04,
0x08,0x00,0x0d,0xaf,0x24,0x02,0x00,0x06,0x16,0x02,0xff,0x9b,0x3c,0x02,0xb0,0x05,
0x8e,0x23,0x00,0x2c,0x24,0x02,0x00,0x01,0x10,0x62,0x00,0x07,0xa2,0x24,0x00,0x08,
0x24,0x02,0x00,0x03,0xa2,0x22,0x00,0x0a,0x92,0x22,0x00,0x2f,0xae,0x20,0x00,0x2c,
0x08,0x00,0x0d,0x51,0xa2,0x22,0x00,0x06,0x08,0x00,0x0d,0xbe,0xa2,0x20,0x00,0x0a,
0x8e,0x22,0x00,0x28,0x24,0x03,0x00,0x01,0x24,0x04,0x00,0x01,0x10,0x44,0x00,0x07,
0xa2,0x23,0x00,0x08,0x24,0x02,0x00,0x05,0xa2,0x22,0x00,0x0a,0x92,0x22,0x00,0x2b,
0xae,0x20,0x00,0x28,0x08,0x00,0x0d,0x51,0xa2,0x22,0x00,0x05,0x08,0x00,0x0d,0xca,
0x24,0x02,0x00,0x04,0x12,0x02,0x00,0x12,0x2a,0x02,0x00,0x41,0x10,0x40,0x00,0x09,
0x24,0x02,0x00,0x80,0x24,0x02,0x00,0x20,0x16,0x02,0xff,0x7b,0x3c,0x02,0xb0,0x05,
0x24,0x02,0x00,0x12,0xa2,0x22,0x00,0x0a,0xa2,0x22,0x00,0x08,0x08,0x00,0x0d,0x51,
0xae,0x20,0x00,0x3c,0x16,0x02,0xff,0x74,0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x10,
0xa2,0x22,0x00,0x0a,0xa2,0x22,0x00,0x08,0x08,0x00,0x0d,0x51,0xae,0x20,0x00,0x34,
0x24,0x02,0x00,0x11,0xa2,0x22,0x00,0x0a,0xa2,0x22,0x00,0x08,0x08,0x00,0x0d,0x51,
0xae,0x20,0x00,0x38,0x8e,0x24,0x00,0x30,0x24,0x02,0x00,0x03,0x24,0x03,0x00,0x01,
0x10,0x83,0x00,0x07,0xa2,0x22,0x00,0x08,0x24,0x02,0x00,0x02,0xa2,0x22,0x00,0x0a,
0x92,0x22,0x00,0x33,0xae,0x20,0x00,0x30,0x08,0x00,0x0d,0x51,0xa2,0x22,0x00,0x07,
0x08,0x00,0x0d,0xf0,0xa2,0x24,0x00,0x0a,0x8f,0x84,0xb4,0x40,0xae,0x20,0x00,0x34,
0x94,0x85,0x00,0x14,0x0c,0x00,0x1b,0x66,0x32,0x10,0x00,0xff,0x08,0x00,0x0d,0x42,
0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x24,0x42,0x37,0xf4,
0x34,0x63,0x00,0x20,0xac,0x62,0x00,0x00,0x80,0xa2,0x00,0x15,0x3c,0x06,0xb0,0x05,
0x10,0x40,0x00,0x0a,0x34,0xc6,0x02,0x54,0x83,0x83,0x8b,0xd4,0x00,0x00,0x00,0x00,
0xac,0x83,0x00,0x24,0x8c,0xc2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x17,0x42,
0x30,0x42,0x00,0x01,0x03,0xe0,0x00,0x08,0xac,0x82,0x00,0x28,0x8c,0x82,0x00,0x2c,
0x3c,0x06,0xb0,0x05,0x34,0xc6,0x04,0x50,0x00,0x02,0x18,0x43,0x30,0x63,0x00,0x01,
0x10,0x40,0x00,0x04,0x30,0x45,0x00,0x01,0xac,0x83,0x00,0x28,0x03,0xe0,0x00,0x08,
0xac,0x85,0x00,0x24,0x90,0xc2,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,
0x30,0x43,0x00,0x02,0x30,0x42,0x00,0x01,0xac,0x83,0x00,0x28,0x03,0xe0,0x00,0x08,
0xac,0x82,0x00,0x24,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xd8,
0x34,0x63,0x00,0x20,0x24,0x42,0x38,0x84,0xac,0x62,0x00,0x00,0xaf,0xb1,0x00,0x1c,
0xaf,0xbf,0x00,0x20,0xaf,0xb0,0x00,0x18,0x90,0xa6,0x00,0x0a,0x27,0x83,0xb4,0x00,
0x00,0xa0,0x88,0x21,0x00,0x06,0x10,0x80,0x00,0x43,0x10,0x21,0x8c,0x50,0x00,0x00,
0x80,0xa5,0x00,0x11,0x92,0x03,0x00,0x12,0x10,0xa0,0x00,0x04,0xa2,0x20,0x00,0x15,
0x24,0x02,0x00,0x12,0x10,0xc2,0x00,0xda,0x00,0x00,0x00,0x00,0x82,0x22,0x00,0x12,
0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x67,0x00,0x00,0x00,0x00,0xa2,0x20,0x00,0x12,
0xa2,0x00,0x00,0x19,0x86,0x23,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x03,0x10,0xc0,
0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x20,0x00,0x43,0x10,0x21,
0xa0,0x40,0x00,0x00,0x92,0x03,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0xdf,
0xa2,0x03,0x00,0x16,0x82,0x02,0x00,0x12,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x20,
0x00,0x00,0x00,0x00,0x92,0x23,0x00,0x08,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x45,
0x24,0x02,0x00,0x01,0xa2,0x20,0x00,0x04,0x92,0x08,0x00,0x04,0x00,0x00,0x00,0x00,
0x15,0x00,0x00,0x1e,0x24,0x02,0x00,0x01,0x92,0x07,0x00,0x0a,0xa2,0x02,0x00,0x17,
0x92,0x02,0x00,0x16,0x30,0xe3,0x00,0xff,0x30,0x42,0x00,0xe4,0x10,0x60,0x00,0x03,
0xa2,0x02,0x00,0x16,0x34,0x42,0x00,0x01,0xa2,0x02,0x00,0x16,0x11,0x00,0x00,0x05,
0x00,0x00,0x00,0x00,0x92,0x02,0x00,0x16,0x00,0x00,0x00,0x00,0x34,0x42,0x00,0x02,
0xa2,0x02,0x00,0x16,0x92,0x02,0x00,0x17,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x08,
0x00,0x00,0x00,0x00,0x96,0x02,0x00,0x06,0x00,0x00,0x00,0x00,0xa6,0x02,0x00,0x14,
0x8f,0xbf,0x00,0x20,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,
0x96,0x02,0x00,0x00,0x08,0x00,0x0e,0x6c,0xa6,0x02,0x00,0x14,0x92,0x07,0x00,0x0a,
0x00,0x00,0x00,0x00,0x14,0xe0,0x00,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0x0e,0x58,
0xa2,0x00,0x00,0x17,0x96,0x04,0x00,0x00,0x96,0x05,0x00,0x06,0x27,0x86,0x90,0x00,
0x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x05,0x10,0xc0,0x00,0x45,0x10,0x21,
0x00,0x03,0x18,0x80,0x00,0x66,0x18,0x21,0x00,0x02,0x10,0x80,0x00,0x46,0x10,0x21,
0x8c,0x66,0x00,0x08,0x8c,0x45,0x00,0x08,0x3c,0x03,0x80,0x00,0x00,0xc3,0x20,0x24,
0x10,0x80,0x00,0x08,0x00,0xa3,0x10,0x24,0x10,0x40,0x00,0x04,0x00,0x00,0x18,0x21,
0x10,0x80,0x00,0x02,0x24,0x03,0x00,0x01,0x00,0xa6,0x18,0x2b,0x08,0x00,0x0e,0x58,
0xa2,0x03,0x00,0x17,0x10,0x40,0xff,0xfd,0x00,0xa6,0x18,0x2b,0x08,0x00,0x0e,0x8c,
0x00,0x00,0x00,0x00,0x10,0x62,0x00,0x09,0x24,0x02,0x00,0x02,0x10,0x62,0x00,0x05,
0x24,0x02,0x00,0x03,0x14,0x62,0xff,0xb8,0x00,0x00,0x00,0x00,0x08,0x00,0x0e,0x52,
0xa2,0x20,0x00,0x07,0x08,0x00,0x0e,0x52,0xa2,0x20,0x00,0x06,0x08,0x00,0x0e,0x52,
0xa2,0x20,0x00,0x05,0x82,0x22,0x00,0x10,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x69,
0x2c,0x62,0x00,0x02,0x10,0x40,0x00,0x49,0x3c,0x02,0xb0,0x09,0x92,0x25,0x00,0x08,
0x00,0x00,0x00,0x00,0x30,0xa6,0x00,0xff,0x2c,0xc2,0x00,0x04,0x10,0x40,0x00,0x3b,
0x2c,0xc2,0x00,0x10,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,
0x24,0x02,0x00,0x01,0x00,0xc2,0x10,0x04,0x00,0x02,0x10,0x27,0x00,0x62,0x18,0x24,
0xa0,0x83,0x00,0x00,0x86,0x23,0x00,0x0c,0x96,0x26,0x00,0x0c,0x00,0x03,0x10,0xc0,
0x00,0x43,0x10,0x21,0x00,0x02,0x28,0x80,0x27,0x83,0x90,0x04,0x00,0xa3,0x18,0x21,
0x8c,0x64,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x04,0x00,0x00,0x00,0x00,
0x30,0x42,0x00,0x10,0x10,0x40,0x00,0x18,0x24,0x07,0x00,0x01,0x93,0x82,0x8b,0x71,
0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x40,0x00,0x0a,0x24,0x05,0x00,0x24,
0x00,0x06,0x2c,0x00,0x00,0x05,0x2c,0x03,0x0c,0x00,0x1b,0x66,0x02,0x00,0x20,0x21,
0x92,0x02,0x00,0x16,0xa2,0x00,0x00,0x12,0x30,0x42,0x00,0xe7,0x08,0x00,0x0e,0x49,
0xa2,0x02,0x00,0x16,0xf0,0xc5,0x00,0x06,0x00,0x00,0x28,0x12,0x27,0x82,0x90,0x00,
0x00,0xa2,0x28,0x21,0x0c,0x00,0x01,0x49,0x3c,0x04,0x00,0x80,0x96,0x26,0x00,0x0c,
0x08,0x00,0x0e,0xc9,0x00,0x06,0x2c,0x00,0x27,0x83,0x90,0x10,0x27,0x82,0x90,0x18,
0x00,0xa2,0x10,0x21,0x00,0xa3,0x18,0x21,0x90,0x44,0x00,0x00,0x90,0x65,0x00,0x05,
0x93,0x82,0x80,0x10,0x00,0x00,0x30,0x21,0x0c,0x00,0x21,0x9a,0xaf,0xa2,0x00,0x10,
0x96,0x26,0x00,0x0c,0x08,0x00,0x0e,0xc3,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xcd,
0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x30,0xa5,0x00,0x0f,
0x24,0x02,0x00,0x80,0x08,0x00,0x0e,0xb2,0x00,0xa2,0x10,0x07,0x86,0x26,0x00,0x0c,
0x3c,0x03,0xb0,0x09,0x34,0x42,0x01,0x72,0x34,0x63,0x01,0x78,0x94,0x47,0x00,0x00,
0x8c,0x65,0x00,0x00,0x00,0x06,0x10,0xc0,0x00,0x46,0x10,0x21,0x3c,0x04,0xb0,0x09,
0xae,0x25,0x00,0x1c,0x34,0x84,0x01,0x7c,0x27,0x83,0x90,0x04,0x00,0x02,0x10,0x80,
0x8c,0x85,0x00,0x00,0x00,0x43,0x10,0x21,0x8c,0x43,0x00,0x18,0xae,0x25,0x00,0x20,
0xa6,0x27,0x00,0x18,0x8c,0x66,0x00,0x08,0x02,0x20,0x20,0x21,0x0c,0x00,0x0f,0x19,
0x00,0x00,0x28,0x21,0x86,0x25,0x00,0x18,0x8e,0x26,0x00,0x1c,0x8e,0x27,0x00,0x20,
0x02,0x20,0x20,0x21,0x0c,0x00,0x1c,0x68,0xaf,0xa2,0x00,0x10,0x08,0x00,0x0e,0x49,
0xa2,0x02,0x00,0x12,0x92,0x22,0x00,0x08,0x08,0x00,0x0e,0x49,0xa2,0x22,0x00,0x09,
0xa2,0x20,0x00,0x11,0x80,0x82,0x00,0x50,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x03,
0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xd0,0xac,0x40,0x00,0x00,0x08,0x00,0x0e,0x49,
0xa0,0x80,0x00,0x50,0x94,0x8a,0x00,0x0c,0x24,0x03,0x00,0x24,0x00,0x80,0x70,0x21,
0x3c,0x02,0x80,0x00,0x3c,0x04,0xb0,0x03,0x24,0x42,0x3c,0x64,0xf1,0x43,0x00,0x06,
0x34,0x84,0x00,0x20,0x00,0x00,0x18,0x12,0x00,0xa0,0x68,0x21,0xac,0x82,0x00,0x00,
0x27,0x85,0x90,0x10,0x27,0x82,0x90,0x0f,0x27,0xbd,0xff,0xf8,0x00,0x62,0x60,0x21,
0x00,0x65,0x58,0x21,0x00,0x00,0xc0,0x21,0x11,0xa0,0x00,0xcc,0x00,0x00,0x78,0x21,
0x00,0x0a,0x1c,0x00,0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
0x00,0x02,0x10,0x80,0x00,0x45,0x10,0x21,0x91,0x87,0x00,0x00,0x80,0x48,0x00,0x04,
0x03,0xa0,0x60,0x21,0x00,0x0a,0x1c,0x00,0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,
0x00,0x43,0x10,0x21,0x00,0x02,0x48,0x80,0x27,0x83,0x90,0x04,0xa3,0xa7,0x00,0x00,
0x01,0x23,0x18,0x21,0x8c,0x64,0x00,0x18,0x25,0x02,0xff,0xff,0x00,0x48,0x40,0x0b,
0x8c,0x83,0x00,0x04,0x2d,0x05,0x00,0x07,0x24,0x02,0x00,0x06,0x30,0x63,0x00,0x08,
0x14,0x60,0x00,0x35,0x00,0x45,0x40,0x0a,0x93,0xa7,0x00,0x00,0x27,0x82,0x90,0x18,
0x01,0x22,0x10,0x21,0x30,0xe3,0x00,0xf0,0x38,0x63,0x00,0x50,0x30,0xe5,0x00,0xff,
0x00,0x05,0x20,0x2b,0x00,0x03,0x18,0x2b,0x00,0x64,0x18,0x24,0x90,0x49,0x00,0x00,
0x10,0x60,0x00,0x16,0x30,0xe4,0x00,0x0f,0x24,0x02,0x00,0x04,0x10,0xa2,0x00,0x9d,
0x00,0x00,0x00,0x00,0x11,0xa0,0x00,0x3a,0x2c,0xa2,0x00,0x0c,0x10,0x40,0x00,0x02,
0x24,0x84,0x00,0x0c,0x00,0xe0,0x20,0x21,0x30,0x84,0x00,0xff,0x00,0x04,0x10,0x40,
0x27,0x83,0xbb,0x1c,0x00,0x44,0x10,0x21,0x00,0x43,0x10,0x21,0x90,0x47,0x00,0x00,
0x00,0x00,0x00,0x00,0x2c,0xe3,0x00,0x0c,0xa3,0xa7,0x00,0x00,0x10,0x60,0x00,0x02,
0x24,0xe2,0x00,0x04,0x00,0xe0,0x10,0x21,0xa3,0xa2,0x00,0x00,0x91,0x65,0x00,0x00,
0x91,0x82,0x00,0x00,0x30,0xa3,0x00,0xff,0x00,0x62,0x10,0x2b,0x10,0x40,0x00,0x0e,
0x2c,0x62,0x00,0x0c,0x14,0x40,0x00,0x03,0x00,0x60,0x20,0x21,0x30,0xa2,0x00,0x0f,
0x24,0x44,0x00,0x0c,0x00,0x04,0x10,0x40,0x00,0x44,0x20,0x21,0x27,0x83,0xbb,0x1c,
0x00,0x83,0x18,0x21,0x90,0x62,0x00,0x02,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x05,
0x00,0x09,0x11,0x00,0xa1,0x85,0x00,0x00,0x93,0xa2,0x00,0x00,0x03,0xe0,0x00,0x08,
0x27,0xbd,0x00,0x08,0x00,0x49,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x49,0x10,0x23,
0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x21,0x27,0x83,0xb4,0xa8,0x00,0x43,0x10,0x21,
0x90,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0x83,0x00,0x0c,0x14,0x60,0x00,0x06,
0x00,0x80,0x10,0x21,0x00,0x18,0x10,0x40,0x00,0x4f,0x10,0x21,0x00,0x02,0x11,0x00,
0x00,0x82,0x10,0x21,0x24,0x42,0x00,0x04,0x08,0x00,0x0f,0x7a,0xa1,0x82,0x00,0x00,
0x8f,0x8d,0x81,0x5c,0x00,0x00,0x00,0x00,0x01,0xa8,0x10,0x21,0x90,0x43,0x00,0x00,
0x00,0x00,0x00,0x00,0x10,0x60,0xff,0xd1,0x00,0x00,0x28,0x21,0x00,0x06,0x74,0x82,
0x30,0xe2,0x00,0xff,0x2c,0x42,0x00,0x0c,0x14,0x40,0x00,0x03,0x00,0xe0,0x10,0x21,
0x30,0xe2,0x00,0x0f,0x24,0x42,0x00,0x0c,0x30,0x44,0x00,0xff,0xa3,0xa2,0x00,0x00,
0x24,0x02,0x00,0x0c,0x10,0x82,0x00,0x0d,0x00,0x09,0x11,0x00,0x00,0x49,0x10,0x23,
0x00,0x02,0x10,0x80,0x00,0x04,0x18,0x40,0x00,0x49,0x10,0x23,0x00,0x64,0x18,0x21,
0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x27,0x84,0xb4,0xa8,0x00,0x44,0x10,0x21,
0x90,0x47,0x00,0x00,0x00,0x00,0x00,0x00,0xa3,0xa7,0x00,0x00,0x00,0x0a,0x1c,0x00,
0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
0x27,0x83,0x90,0x04,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x18,0x00,0x00,0x00,0x00,
0x8c,0x83,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x10,0x14,0x60,0x00,0x33,
0x00,0x06,0x14,0x42,0x00,0x09,0x11,0x00,0x00,0x49,0x10,0x23,0x00,0x02,0x10,0x80,
0x00,0x49,0x10,0x23,0x27,0x83,0xb5,0x78,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,
0x90,0x44,0x00,0x04,0x90,0x43,0x00,0x05,0x00,0x00,0x00,0x00,0x00,0x64,0xc0,0x24,
0x93,0xa7,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0xe2,0x00,0x0f,0x10,0x40,0x00,0x0f,
0x31,0xcf,0x00,0x01,0x00,0x0a,0x1c,0x00,0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,
0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x84,0x90,0x00,0x00,0x44,0x10,0x21,
0x84,0x43,0x00,0x06,0x00,0x00,0x00,0x00,0x28,0x63,0x06,0x41,0x14,0x60,0x00,0x04,
0x30,0xe2,0x00,0xff,0x24,0x07,0x00,0x0f,0xa3,0xa7,0x00,0x00,0x30,0xe2,0x00,0xff,
0x2c,0x42,0x00,0x0c,0x14,0x40,0x00,0x06,0x00,0xe0,0x10,0x21,0x00,0x18,0x10,0x40,
0x00,0x4f,0x10,0x21,0x00,0x02,0x11,0x00,0x00,0x47,0x10,0x21,0x24,0x42,0x00,0x04,
0xa3,0xa2,0x00,0x00,0x00,0x40,0x38,0x21,0x01,0xa8,0x10,0x21,0x90,0x43,0x00,0x00,
0x24,0xa4,0x00,0x01,0x30,0x85,0xff,0xff,0x00,0xa3,0x18,0x2b,0x14,0x60,0xff,0xad,
0x30,0xe2,0x00,0xff,0x08,0x00,0x0f,0x67,0x00,0x00,0x00,0x00,0x08,0x00,0x0f,0xc8,
0x30,0x58,0x00,0x01,0x81,0xc2,0x00,0x48,0x00,0x00,0x00,0x00,0x10,0x40,0xff,0x73,
0x00,0x00,0x00,0x00,0x08,0x00,0x0f,0x55,0x00,0x00,0x00,0x00,0x00,0x0a,0x1c,0x00,
0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
0x00,0x45,0x10,0x21,0x80,0x48,0x00,0x05,0x91,0x67,0x00,0x00,0x08,0x00,0x0f,0x35,
0x03,0xa0,0x58,0x21,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,
0x24,0x42,0x40,0x04,0x03,0xe0,0x00,0x08,0xac,0x62,0x00,0x00,0x27,0xbd,0xff,0xc0,
0xaf,0xb7,0x00,0x34,0xaf,0xb6,0x00,0x30,0xaf,0xb5,0x00,0x2c,0xaf,0xb4,0x00,0x28,
0xaf,0xb3,0x00,0x24,0xaf,0xb2,0x00,0x20,0xaf,0xbf,0x00,0x3c,0xaf,0xbe,0x00,0x38,
0xaf,0xb1,0x00,0x1c,0xaf,0xb0,0x00,0x18,0x84,0x82,0x00,0x0c,0x27,0x93,0x90,0x04,
0x3c,0x05,0xb0,0x03,0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,0x00,0x03,0x18,0x80,
0x00,0x73,0x10,0x21,0x8c,0x5e,0x00,0x18,0x3c,0x02,0x80,0x00,0x34,0xa5,0x00,0x20,
0x24,0x42,0x40,0x1c,0xac,0xa2,0x00,0x00,0x8f,0xd0,0x00,0x08,0x27,0x95,0x90,0x10,
0x00,0x75,0x18,0x21,0x00,0x00,0x28,0x21,0x02,0x00,0x30,0x21,0x90,0x71,0x00,0x00,
0x0c,0x00,0x0f,0x19,0x00,0x80,0xb0,0x21,0x00,0x40,0x90,0x21,0x00,0x10,0x14,0x42,
0x30,0x54,0x00,0x01,0x02,0x40,0x20,0x21,0x00,0x10,0x14,0x82,0x02,0x80,0x28,0x21,
0x12,0x51,0x00,0x23,0x00,0x10,0xbf,0xc2,0x86,0xc3,0x00,0x0c,0x30,0x50,0x00,0x01,
0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x55,0x10,0x21,
0xa0,0x52,0x00,0x00,0x86,0xc3,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x03,0x10,0xc0,
0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x53,0x30,0x21,0x8c,0xc7,0x00,0x18,
0x27,0x83,0x90,0x00,0x00,0x43,0x10,0x21,0x8c,0xe3,0x00,0x04,0x84,0x46,0x00,0x06,
0x00,0x03,0x19,0x42,0x0c,0x00,0x08,0xe3,0x30,0x73,0x00,0x01,0x00,0x40,0x88,0x21,
0x02,0x40,0x20,0x21,0x02,0x80,0x28,0x21,0x16,0xe0,0x00,0x10,0x02,0x00,0x30,0x21,
0x86,0xc2,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,
0x00,0x03,0x18,0x80,0x27,0x82,0x90,0x08,0x00,0x62,0x18,0x21,0xa4,0x71,0x00,0x04,
0x7b,0xbe,0x01,0xfc,0x7b,0xb6,0x01,0xbc,0x7b,0xb4,0x01,0x7c,0x7b,0xb2,0x01,0x3c,
0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x40,0x86,0xc3,0x00,0x0c,
0xaf,0xb3,0x00,0x10,0xaf,0xa0,0x00,0x14,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
0x00,0x02,0x10,0x80,0x00,0x55,0x10,0x21,0x80,0x47,0x00,0x06,0x00,0x00,0x00,0x00,
0x24,0xe7,0x00,0x02,0x00,0x07,0x17,0xc2,0x00,0xe2,0x38,0x21,0x00,0x07,0x38,0x43,
0x00,0x07,0x38,0x40,0x0c,0x00,0x09,0x0a,0x03,0xc7,0x38,0x21,0x08,0x00,0x10,0x48,
0x02,0x22,0x88,0x21,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xd0,
0x34,0x63,0x00,0x20,0x24,0x42,0x41,0xa4,0xaf,0xb2,0x00,0x20,0xac,0x62,0x00,0x00,
0xaf,0xbf,0x00,0x28,0xaf,0xb3,0x00,0x24,0xaf,0xb1,0x00,0x1c,0xaf,0xb0,0x00,0x18,
0x3c,0x02,0xb0,0x03,0x90,0x83,0x00,0x0a,0x34,0x42,0x01,0x04,0x94,0x45,0x00,0x00,
0x00,0x03,0x18,0x80,0x27,0x82,0xb4,0x00,0x00,0x62,0x18,0x21,0x30,0xa6,0xff,0xff,
0x8c,0x71,0x00,0x00,0x80,0x85,0x00,0x12,0x30,0xc9,0x00,0xff,0x00,0x06,0x32,0x02,
0xa4,0x86,0x00,0x44,0xa4,0x89,0x00,0x46,0x82,0x22,0x00,0x12,0x00,0x80,0x90,0x21,
0x10,0xa0,0x00,0x1b,0xa0,0x80,0x00,0x15,0x00,0xc5,0x10,0x2a,0x10,0x40,0x00,0x14,
0x00,0x00,0x00,0x00,0xa2,0x20,0x00,0x19,0x84,0x83,0x00,0x0c,0x00,0x00,0x00,0x00,
0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x20,
0x00,0x43,0x10,0x21,0xa0,0x40,0x00,0x00,0xa0,0x80,0x00,0x12,0x92,0x22,0x00,0x16,
0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xdf,0xa2,0x22,0x00,0x16,0x8f,0xbf,0x00,0x28,
0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,
0x0c,0x00,0x10,0x01,0x00,0x00,0x00,0x00,0x08,0x00,0x10,0x97,0x00,0x00,0x00,0x00,
0x28,0x42,0x00,0x02,0x10,0x40,0x01,0x76,0x00,0x00,0x28,0x21,0x94,0x87,0x00,0x0c,
0x00,0x00,0x00,0x00,0x00,0xe0,0x10,0x21,0x00,0x02,0x14,0x00,0x00,0x02,0x14,0x03,
0x00,0x07,0x24,0x00,0x00,0x04,0x24,0x03,0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,
0x00,0x04,0x28,0xc0,0x00,0xa4,0x28,0x21,0x27,0x82,0x90,0x20,0x00,0x03,0x18,0x80,
0x00,0x62,0x18,0x21,0x00,0x05,0x28,0x80,0x27,0x82,0x90,0x08,0x00,0xa2,0x10,0x21,
0x8c,0x68,0x00,0x00,0x80,0x44,0x00,0x06,0x27,0x82,0x90,0x10,0x00,0x08,0x1d,0x02,
0x00,0xa2,0x28,0x21,0x38,0x84,0x00,0x00,0x30,0x63,0x00,0x01,0x01,0x24,0x30,0x0b,
0x80,0xaa,0x00,0x04,0x80,0xa9,0x00,0x05,0x10,0x60,0x00,0x02,0x00,0x08,0x14,0x02,
0x30,0x46,0x00,0x0f,0x15,0x20,0x00,0x28,0x01,0x49,0x10,0x21,0x15,0x40,0x00,0x11,
0x30,0xe3,0xff,0xff,0x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0xa8,0x00,0xff,
0x2d,0x02,0x00,0x04,0x10,0x40,0x01,0x46,0x2d,0x02,0x00,0x10,0x3c,0x04,0xb0,0x05,
0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x24,0x02,0x00,0x01,0x01,0x02,0x10,0x04,
0x00,0x62,0x18,0x25,0xa0,0x83,0x00,0x00,0x96,0x47,0x00,0x0c,0x00,0x00,0x00,0x00,
0x30,0xe3,0xff,0xff,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x27,0x84,0x90,0x10,
0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x21,0x80,0x45,0x00,0x06,0x00,0x03,0x1a,0x00,
0x3c,0x04,0xb0,0x00,0x00,0x65,0x18,0x21,0x00,0x64,0x20,0x21,0x94,0x82,0x00,0x00,
0x82,0x43,0x00,0x10,0x00,0x02,0x14,0x00,0x14,0x60,0x00,0x06,0x00,0x02,0x3c,0x03,
0x30,0xe2,0x00,0x04,0x14,0x40,0x00,0x04,0x01,0x49,0x10,0x21,0x34,0xe2,0x08,0x00,
0xa4,0x82,0x00,0x00,0x01,0x49,0x10,0x21,0x00,0x02,0x16,0x00,0x00,0x02,0x16,0x03,
0x00,0x46,0x10,0x2a,0x10,0x40,0x00,0x7c,0x00,0x00,0x00,0x00,0x82,0x42,0x00,0x10,
0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0e,0x00,0x00,0x00,0x00,0x86,0x43,0x00,0x0c,
0x25,0x44,0x00,0x01,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,0xa0,0x44,0x00,0x04,0x92,0x23,0x00,0x16,
0x02,0x40,0x20,0x21,0x30,0x63,0x00,0xfb,0x08,0x00,0x10,0x9c,0xa2,0x23,0x00,0x16,
0x86,0x43,0x00,0x0c,0x25,0x24,0x00,0x01,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,0xa0,0x44,0x00,0x05,
0x86,0x45,0x00,0x0c,0x0c,0x00,0x1e,0xea,0x02,0x20,0x20,0x21,0x10,0x40,0x00,0x5a,
0x00,0x00,0x00,0x00,0x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0xa6,0x00,0xff,
0x2c,0xc2,0x00,0x04,0x10,0x40,0x00,0x4c,0x2c,0xc2,0x00,0x10,0x3c,0x04,0xb0,0x05,
0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x24,0x02,0x00,0x01,0x00,0xc2,0x10,0x04,
0x00,0x02,0x10,0x27,0x00,0x62,0x18,0x24,0xa0,0x83,0x00,0x00,0x92,0x45,0x00,0x08,
0x00,0x00,0x00,0x00,0x30,0xa5,0x00,0xff,0x14,0xa0,0x00,0x33,0x24,0x02,0x00,0x01,
0xa2,0x40,0x00,0x04,0x92,0x22,0x00,0x04,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x0c,
0x24,0x02,0x00,0x01,0xa2,0x22,0x00,0x17,0x92,0x22,0x00,0x17,0x00,0x00,0x00,0x00,
0x10,0x40,0x00,0x04,0x00,0x00,0x00,0x00,0x96,0x22,0x00,0x06,0x08,0x00,0x10,0x97,
0xa6,0x22,0x00,0x14,0x96,0x22,0x00,0x00,0x08,0x00,0x10,0x97,0xa6,0x22,0x00,0x14,
0x92,0x22,0x00,0x0a,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x03,0x00,0x00,0x00,0x00,
0x08,0x00,0x11,0x26,0xa2,0x20,0x00,0x17,0x96,0x24,0x00,0x00,0x96,0x25,0x00,0x06,
0x27,0x86,0x90,0x00,0x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x05,0x10,0xc0,
0x00,0x45,0x10,0x21,0x00,0x03,0x18,0x80,0x00,0x66,0x18,0x21,0x00,0x02,0x10,0x80,
0x00,0x46,0x10,0x21,0x8c,0x65,0x00,0x08,0x8c,0x44,0x00,0x08,0x3c,0x03,0x80,0x00,
0x00,0xa3,0x30,0x24,0x10,0xc0,0x00,0x08,0x00,0x83,0x10,0x24,0x10,0x40,0x00,0x04,
0x00,0x00,0x18,0x21,0x10,0xc0,0x00,0x02,0x24,0x03,0x00,0x01,0x00,0x85,0x18,0x2b,
0x08,0x00,0x11,0x26,0xa2,0x23,0x00,0x17,0x10,0x40,0xff,0xfd,0x00,0x85,0x18,0x2b,
0x08,0x00,0x11,0x49,0x00,0x00,0x00,0x00,0x10,0xa2,0x00,0x09,0x24,0x02,0x00,0x02,
0x10,0xa2,0x00,0x05,0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xca,0x00,0x00,0x00,0x00,
0x08,0x00,0x11,0x21,0xa2,0x40,0x00,0x07,0x08,0x00,0x11,0x21,0xa2,0x40,0x00,0x06,
0x08,0x00,0x11,0x21,0xa2,0x40,0x00,0x05,0x14,0x40,0xff,0xbe,0x3c,0x04,0xb0,0x05,
0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x30,0xa5,0x00,0x0f,0x24,0x02,0x00,0x80,
0x08,0x00,0x11,0x18,0x00,0xa2,0x10,0x07,0x0c,0x00,0x10,0x07,0x02,0x40,0x20,0x21,
0x08,0x00,0x10,0x97,0x00,0x00,0x00,0x00,0x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,
0x30,0xa6,0x00,0xff,0x2c,0xc2,0x00,0x04,0x10,0x40,0x00,0x99,0x2c,0xc2,0x00,0x10,
0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x24,0x02,0x00,0x01,
0x00,0xc2,0x10,0x04,0x00,0x02,0x10,0x27,0x00,0x62,0x18,0x24,0xa0,0x83,0x00,0x00,
0x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0xa5,0x00,0xff,0x14,0xa0,0x00,0x80,
0x24,0x02,0x00,0x01,0xa2,0x40,0x00,0x04,0x86,0x43,0x00,0x0c,0x27,0x93,0x90,0x04,
0x96,0x47,0x00,0x0c,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x28,0x80,
0x00,0xb3,0x18,0x21,0x8c,0x64,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x04,
0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x10,0x10,0x40,0x00,0x64,0x00,0x00,0x30,0x21,
0x00,0x07,0x1c,0x00,0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
0x00,0x02,0x10,0x80,0x00,0x53,0x10,0x21,0x8c,0x43,0x00,0x18,0x93,0x82,0x8b,0x71,
0x8c,0x64,0x00,0x04,0x30,0x42,0x00,0x01,0x00,0x04,0x21,0x42,0x14,0x40,0x00,0x4d,
0x30,0x90,0x00,0x01,0x00,0x07,0x2c,0x00,0x00,0x05,0x2c,0x03,0x0c,0x00,0x1b,0x66,
0x02,0x20,0x20,0x21,0x96,0x26,0x00,0x06,0x12,0x00,0x00,0x14,0x30,0xc5,0xff,0xff,
0x02,0x60,0x90,0x21,0x00,0x05,0x10,0xc0,0x00,0x45,0x10,0x21,0x00,0x02,0x10,0x80,
0x00,0x52,0x18,0x21,0x92,0x22,0x00,0x0a,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0b,
0x02,0x20,0x20,0x21,0x8c,0x63,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0x62,0x00,0x04,
0x00,0x00,0x00,0x00,0x00,0x02,0x11,0x42,0x0c,0x00,0x1b,0x66,0x30,0x50,0x00,0x01,
0x96,0x26,0x00,0x06,0x16,0x00,0xff,0xef,0x30,0xc5,0xff,0xff,0x92,0x22,0x00,0x04,
0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x0d,0x24,0x02,0x00,0x01,0xa2,0x22,0x00,0x17,
0x92,0x22,0x00,0x17,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x05,0x00,0x00,0x00,0x00,
0xa6,0x26,0x00,0x14,0x92,0x22,0x00,0x16,0x08,0x00,0x10,0x96,0x30,0x42,0x00,0xc3,
0x96,0x22,0x00,0x00,0x08,0x00,0x11,0xbd,0xa6,0x22,0x00,0x14,0x92,0x22,0x00,0x0a,
0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0x11,0xb8,
0xa2,0x20,0x00,0x17,0x96,0x24,0x00,0x00,0x30,0xc5,0xff,0xff,0x00,0x05,0x18,0xc0,
0x00,0x04,0x10,0xc0,0x00,0x44,0x10,0x21,0x00,0x65,0x18,0x21,0x27,0x84,0x90,0x00,
0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x21,0x00,0x03,0x18,0x80,0x8c,0x45,0x00,0x08,
0x00,0x64,0x18,0x21,0x8c,0x64,0x00,0x08,0x3c,0x02,0x80,0x00,0x00,0xa2,0x38,0x24,
0x10,0xe0,0x00,0x08,0x00,0x82,0x10,0x24,0x10,0x40,0x00,0x04,0x00,0x00,0x18,0x21,
0x10,0xe0,0x00,0x02,0x24,0x03,0x00,0x01,0x00,0x85,0x18,0x2b,0x08,0x00,0x11,0xb8,
0xa2,0x23,0x00,0x17,0x10,0x40,0xff,0xfd,0x00,0x85,0x18,0x2b,0x08,0x00,0x11,0xdc,
0x00,0x00,0x00,0x00,0x24,0x05,0x00,0x24,0xf0,0xe5,0x00,0x06,0x00,0x00,0x28,0x12,
0x27,0x82,0x90,0x00,0x00,0xa2,0x28,0x21,0x0c,0x00,0x01,0x49,0x00,0x00,0x20,0x21,
0x96,0x47,0x00,0x0c,0x08,0x00,0x11,0x9a,0x00,0x07,0x2c,0x00,0x27,0x83,0x90,0x10,
0x27,0x82,0x90,0x18,0x00,0xa2,0x10,0x21,0x00,0xa3,0x18,0x21,0x90,0x44,0x00,0x00,
0x90,0x65,0x00,0x05,0x93,0x82,0x80,0x10,0x24,0x07,0x00,0x01,0x0c,0x00,0x21,0x9a,
0xaf,0xa2,0x00,0x10,0x96,0x47,0x00,0x0c,0x08,0x00,0x11,0x8d,0x00,0x07,0x1c,0x00,
0x10,0xa2,0x00,0x09,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x05,0x24,0x02,0x00,0x03,
0x14,0xa2,0xff,0x7d,0x00,0x00,0x00,0x00,0x08,0x00,0x11,0x7e,0xa2,0x40,0x00,0x07,
0x08,0x00,0x11,0x7e,0xa2,0x40,0x00,0x06,0x08,0x00,0x11,0x7e,0xa2,0x40,0x00,0x05,
0x14,0x40,0xff,0x71,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,
0x30,0xa5,0x00,0x0f,0x24,0x02,0x00,0x80,0x08,0x00,0x11,0x75,0x00,0xa2,0x10,0x07,
0x14,0x40,0xfe,0xc3,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,
0x30,0xa5,0x00,0x0f,0x24,0x02,0x00,0x80,0x08,0x00,0x10,0xd0,0x00,0xa2,0x10,0x07,
0x84,0x83,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x04,0x00,0x43,0x10,0x21,0x8c,0x47,0x00,0x18,
0x00,0x00,0x00,0x00,0x8c,0xe6,0x00,0x08,0x0c,0x00,0x0f,0x19,0x00,0x00,0x00,0x00,
0x02,0x40,0x20,0x21,0x00,0x00,0x28,0x21,0x00,0x00,0x30,0x21,0x00,0x00,0x38,0x21,
0x0c,0x00,0x1c,0x68,0xaf,0xa2,0x00,0x10,0x00,0x02,0x1e,0x00,0x14,0x60,0xfe,0x6b,
0xa2,0x22,0x00,0x12,0x92,0x43,0x00,0x08,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x40,
0x24,0x02,0x00,0x01,0xa2,0x40,0x00,0x04,0x92,0x28,0x00,0x04,0x00,0x00,0x00,0x00,
0x15,0x00,0x00,0x19,0x24,0x02,0x00,0x01,0x92,0x27,0x00,0x0a,0xa2,0x22,0x00,0x17,
0x92,0x22,0x00,0x17,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x10,0x00,0x00,0x00,0x00,
0x96,0x22,0x00,0x06,0x00,0x00,0x00,0x00,0xa6,0x22,0x00,0x14,0x92,0x22,0x00,0x16,
0x30,0xe3,0x00,0xff,0x30,0x42,0x00,0xc0,0x10,0x60,0x00,0x03,0xa2,0x22,0x00,0x16,
0x34,0x42,0x00,0x01,0xa2,0x22,0x00,0x16,0x11,0x00,0xfe,0x50,0x00,0x00,0x00,0x00,
0x92,0x22,0x00,0x16,0x08,0x00,0x10,0x96,0x34,0x42,0x00,0x02,0x96,0x22,0x00,0x00,
0x08,0x00,0x12,0x3f,0xa6,0x22,0x00,0x14,0x92,0x27,0x00,0x0a,0x00,0x00,0x00,0x00,
0x14,0xe0,0x00,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0x12,0x38,0xa2,0x20,0x00,0x17,
0x96,0x24,0x00,0x00,0x96,0x25,0x00,0x06,0x27,0x86,0x90,0x00,0x00,0x04,0x18,0xc0,
0x00,0x64,0x18,0x21,0x00,0x05,0x10,0xc0,0x00,0x45,0x10,0x21,0x00,0x03,0x18,0x80,
0x00,0x66,0x18,0x21,0x00,0x02,0x10,0x80,0x00,0x46,0x10,0x21,0x8c,0x65,0x00,0x08,
0x8c,0x44,0x00,0x08,0x3c,0x03,0x80,0x00,0x00,0xa3,0x30,0x24,0x10,0xc0,0x00,0x08,
0x00,0x83,0x10,0x24,0x10,0x40,0x00,0x04,0x00,0x00,0x18,0x21,0x10,0xc0,0x00,0x02,
0x24,0x03,0x00,0x01,0x00,0x85,0x18,0x2b,0x08,0x00,0x12,0x38,0xa2,0x23,0x00,0x17,
0x10,0x40,0xff,0xfd,0x00,0x85,0x18,0x2b,0x08,0x00,0x12,0x67,0x00,0x00,0x00,0x00,
0x10,0x62,0x00,0x09,0x24,0x02,0x00,0x02,0x10,0x62,0x00,0x05,0x24,0x02,0x00,0x03,
0x14,0x62,0xff,0xbd,0x00,0x00,0x00,0x00,0x08,0x00,0x12,0x32,0xa2,0x40,0x00,0x07,
0x08,0x00,0x12,0x32,0xa2,0x40,0x00,0x06,0x08,0x00,0x12,0x32,0xa2,0x40,0x00,0x05,
0x3c,0x02,0x80,0x00,0x00,0x82,0x30,0x24,0x10,0xc0,0x00,0x08,0x00,0xa2,0x18,0x24,
0x10,0x60,0x00,0x04,0x00,0x00,0x10,0x21,0x10,0xc0,0x00,0x02,0x24,0x02,0x00,0x01,
0x00,0xa4,0x10,0x2b,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x10,0x60,0xff,0xfd,
0x00,0xa4,0x10,0x2b,0x08,0x00,0x12,0x82,0x00,0x00,0x00,0x00,0x30,0x82,0xff,0xff,
0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,0x27,0x84,0x90,0x10,0x00,0x03,0x18,0x80,
0x00,0x64,0x18,0x21,0x80,0x66,0x00,0x06,0x00,0x02,0x12,0x00,0x3c,0x03,0xb0,0x00,
0x00,0x46,0x10,0x21,0x00,0x45,0x10,0x21,0x03,0xe0,0x00,0x08,0x00,0x43,0x10,0x21,
0x27,0xbd,0xff,0xe0,0x30,0x82,0x00,0x7c,0x30,0x84,0xff,0x00,0xaf,0xbf,0x00,0x1c,
0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0x14,0x40,0x00,0x41,
0x00,0x04,0x22,0x03,0x24,0x02,0x00,0x04,0x3c,0x10,0xb0,0x03,0x8e,0x10,0x00,0x00,
0x10,0x82,0x00,0x32,0x24,0x02,0x00,0x08,0x10,0x82,0x00,0x03,0x32,0x02,0x00,0x20,
0x08,0x00,0x12,0xa8,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x17,0x3c,0x02,0xb0,0x06,
0x34,0x42,0x80,0x24,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x67,0x00,0xff,
0x10,0xe0,0x00,0x23,0x00,0x00,0x88,0x21,0x8f,0x85,0x8f,0xe0,0x00,0x40,0x30,0x21,
0x94,0xa2,0x00,0x08,0x8c,0xc3,0x00,0x00,0x26,0x31,0x00,0x01,0x24,0x42,0x00,0x02,
0x30,0x42,0x01,0xff,0x34,0x63,0x01,0x00,0x02,0x27,0x20,0x2a,0xa4,0xa2,0x00,0x08,
0x14,0x80,0xff,0xf7,0xac,0xc3,0x00,0x00,0x84,0xa3,0x00,0x08,0x3c,0x02,0xb0,0x03,
0x34,0x42,0x00,0x30,0xac,0x43,0x00,0x00,0x27,0x92,0xb4,0x00,0x24,0x11,0x00,0x12,
0x8e,0x44,0x00,0x00,0x26,0x31,0xff,0xff,0x90,0x82,0x00,0x10,0x00,0x00,0x00,0x00,
0x10,0x40,0x00,0x03,0x26,0x52,0x00,0x04,0x0c,0x00,0x18,0xd0,0x00,0x00,0x00,0x00,
0x06,0x21,0xff,0xf7,0x24,0x02,0xff,0xdf,0x02,0x02,0x80,0x24,0x3c,0x01,0xb0,0x03,
0x0c,0x00,0x13,0x1c,0xac,0x30,0x00,0x00,0x08,0x00,0x12,0xa8,0x00,0x00,0x00,0x00,
0x8f,0x85,0x8f,0xe0,0x08,0x00,0x12,0xbe,0x00,0x00,0x00,0x00,0x24,0x02,0xff,0x95,
0x3c,0x03,0xb0,0x03,0x02,0x02,0x80,0x24,0x34,0x63,0x00,0x30,0x3c,0x01,0xb0,0x03,
0xac,0x30,0x00,0x00,0x0c,0x00,0x12,0xe5,0xac,0x60,0x00,0x00,0x08,0x00,0x12,0xa8,
0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x50,0x08,0x00,0x12,0xa8,
0xac,0x46,0x00,0x00,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x4b,0x94,0x3c,0x0b,0xb0,0x03,
0xad,0x6a,0x00,0x20,0x3c,0x08,0x80,0x01,0x25,0x08,0x00,0x00,0x3c,0x09,0x80,0x01,
0x25,0x29,0x03,0x50,0x11,0x09,0x00,0x10,0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x00,
0x25,0x4a,0x4b,0xbc,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0x3c,0x08,0xb0,0x06,
0x35,0x08,0x80,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x8d,0x09,0x00,0x00,
0x00,0x00,0x00,0x00,0x31,0x29,0x00,0x01,0x00,0x00,0x00,0x00,0x24,0x01,0x00,0x01,
0x15,0x21,0xff,0xf2,0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x4b,0xf8,
0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0x3c,0x02,0xb0,0x03,0x8c,0x43,0x00,0x00,
0x00,0x00,0x00,0x00,0x34,0x63,0x00,0x40,0x00,0x00,0x00,0x00,0xac,0x43,0x00,0x00,
0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x4c,0x24,0x3c,0x0b,0xb0,0x03,
0xad,0x6a,0x00,0x20,0x3c,0x02,0x80,0x01,0x24,0x42,0x00,0x00,0x3c,0x03,0x80,0x01,
0x24,0x63,0x03,0x50,0x3c,0x04,0xb0,0x00,0x8c,0x85,0x00,0x00,0x00,0x00,0x00,0x00,
0xac,0x45,0x00,0x00,0x24,0x42,0x00,0x04,0x24,0x84,0x00,0x04,0x00,0x43,0x08,0x2a,
0x14,0x20,0xff,0xf9,0x00,0x00,0x00,0x00,0x0c,0x00,0x13,0x1c,0x00,0x00,0x00,0x00,
0x3c,0x0a,0x80,0x00,0x25,0x4a,0x4c,0x70,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,
0x3c,0x02,0x80,0x01,0x24,0x42,0x03,0x50,0x3c,0x03,0x80,0x01,0x24,0x63,0x3f,0x24,
0xac,0x40,0x00,0x00,0xac,0x40,0x00,0x04,0xac,0x40,0x00,0x08,0xac,0x40,0x00,0x0c,
0x24,0x42,0x00,0x10,0x00,0x43,0x08,0x2a,0x14,0x20,0xff,0xf9,0x00,0x00,0x00,0x00,
0x3c,0x0a,0x80,0x00,0x25,0x4a,0x4c,0xb0,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,
0x3c,0x1c,0x80,0x01,0x27,0x9c,0x7f,0xf0,0x27,0x9d,0x8b,0xe0,0x00,0x00,0x00,0x00,
0x27,0x9d,0x8f,0xc8,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x4c,0xd4,0x3c,0x0b,0xb0,0x03,
0xad,0x6a,0x00,0x20,0x40,0x80,0x68,0x00,0x40,0x08,0x60,0x00,0x00,0x00,0x00,0x00,
0x35,0x08,0xff,0x01,0x40,0x88,0x60,0x00,0x00,0x00,0x00,0x00,0x0c,0x00,0x15,0x62,
0x00,0x00,0x00,0x00,0x24,0x84,0xf8,0x00,0x30,0x87,0x00,0x03,0x00,0x04,0x30,0x40,
0x00,0xc7,0x20,0x23,0x3c,0x02,0xb0,0x0a,0x27,0xbd,0xff,0xe0,0x24,0x03,0xff,0xff,
0x00,0x82,0x20,0x21,0xaf,0xb1,0x00,0x14,0xac,0x83,0x10,0x00,0xaf,0xbf,0x00,0x18,
0xaf,0xb0,0x00,0x10,0x00,0xa0,0x88,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x10,0x00,
0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0xc7,0x10,0x23,0x3c,0x03,0xb0,0x0a,
0x00,0x43,0x10,0x21,0x8c,0x50,0x00,0x00,0x0c,0x00,0x13,0x99,0x02,0x20,0x20,0x21,
0x02,0x11,0x80,0x24,0x00,0x50,0x80,0x06,0x02,0x00,0x10,0x21,0x8f,0xbf,0x00,0x18,
0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x27,0xbd,0xff,0xd8,
0xaf,0xb2,0x00,0x18,0x00,0xa0,0x90,0x21,0x24,0x05,0xff,0xff,0xaf,0xb3,0x00,0x1c,
0xaf,0xbf,0x00,0x20,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0x00,0xc0,0x98,0x21,
0x12,0x45,0x00,0x23,0x24,0x84,0xf8,0x00,0x30,0x83,0x00,0x03,0x00,0x04,0x10,0x40,
0x00,0x40,0x88,0x21,0x00,0x60,0x20,0x21,0x00,0x43,0x10,0x23,0x3c,0x03,0xb0,0x0a,
0x00,0x43,0x10,0x21,0xac,0x45,0x10,0x00,0x00,0x40,0x18,0x21,0x24,0x05,0x00,0x01,
0x8c,0x62,0x10,0x00,0x00,0x00,0x00,0x00,0x14,0x45,0xff,0xfd,0x3c,0x02,0xb0,0x0a,
0x02,0x24,0x88,0x23,0x02,0x22,0x88,0x21,0x8e,0x30,0x00,0x00,0x0c,0x00,0x13,0x99,
0x02,0x40,0x20,0x21,0x00,0x12,0x18,0x27,0x02,0x03,0x80,0x24,0x00,0x53,0x10,0x04,
0x02,0x02,0x80,0x25,0xae,0x30,0x00,0x00,0x24,0x03,0x00,0x01,0x8e,0x22,0x10,0x00,
0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x20,
0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,
0x30,0x82,0x00,0x03,0x00,0x04,0x18,0x40,0x00,0x62,0x18,0x23,0x3c,0x04,0xb0,0x0a,
0x00,0x64,0x18,0x21,0xac,0x66,0x00,0x00,0x24,0x04,0x00,0x01,0x8c,0x62,0x10,0x00,
0x00,0x00,0x00,0x00,0x14,0x44,0xff,0xfd,0x00,0x00,0x00,0x00,0x08,0x00,0x13,0x87,
0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x21,0x00,0x64,0x10,0x06,0x30,0x42,0x00,0x01,
0x14,0x40,0x00,0x05,0x00,0x00,0x00,0x00,0x24,0x63,0x00,0x01,0x2c,0x62,0x00,0x20,
0x14,0x40,0xff,0xf9,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x60,0x10,0x21,
0x27,0xbd,0xff,0xe0,0x3c,0x03,0xb0,0x05,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,
0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x1c,0x00,0x80,0x90,0x21,0x00,0xa0,0x80,0x21,
0x00,0xc0,0x88,0x21,0x34,0x63,0x02,0x2e,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
0x30,0x42,0x00,0x01,0x14,0x40,0xff,0xfc,0x24,0x04,0x08,0x24,0x3c,0x05,0x00,0xc0,
0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x03,0x24,0x04,0x08,0x34,0x3c,0x05,0x00,0xc0,
0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x03,0x3c,0x02,0xc0,0x00,0x00,0x10,0x1c,0x00,
0x34,0x42,0x04,0x00,0x3c,0x04,0xb0,0x05,0x3c,0x05,0xb0,0x05,0x24,0x63,0x16,0x09,
0x02,0x22,0x10,0x21,0x34,0x84,0x04,0x20,0x34,0xa5,0x04,0x24,0x3c,0x06,0xb0,0x05,
0xac,0x83,0x00,0x00,0x24,0x07,0x00,0x01,0xac,0xa2,0x00,0x00,0x34,0xc6,0x02,0x28,
0x24,0x02,0x00,0x20,0xae,0x47,0x00,0x3c,0x24,0x04,0x08,0x24,0xa0,0xc2,0x00,0x00,
0x3c,0x05,0x00,0xc0,0xa2,0x47,0x00,0x11,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x01,
0x24,0x04,0x08,0x34,0x3c,0x05,0x00,0xc0,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x01,
0x8f,0xbf,0x00,0x1c,0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
0x27,0xbd,0x00,0x20,0x24,0x02,0x00,0x06,0xac,0x82,0x00,0x0c,0xa0,0x80,0x00,0x50,
0xac,0x80,0x00,0x00,0xac,0x80,0x00,0x04,0xac,0x80,0x00,0x08,0xac,0x80,0x00,0x14,
0xac,0x80,0x00,0x18,0xac,0x80,0x00,0x1c,0xa4,0x80,0x00,0x20,0xac,0x80,0x00,0x24,
0xac,0x80,0x00,0x28,0xac,0x80,0x00,0x2c,0xa0,0x80,0x00,0x30,0xa0,0x80,0x00,0x31,
0xac,0x80,0x00,0x34,0xac,0x80,0x00,0x38,0xa0,0x80,0x00,0x3c,0xac,0x82,0x00,0x10,
0xa0,0x80,0x00,0x44,0xac,0x80,0x00,0x48,0x03,0xe0,0x00,0x08,0xac,0x80,0x00,0x4c,
0x3c,0x04,0xb0,0x06,0x34,0x84,0x80,0x00,0x8c,0x83,0x00,0x00,0x3c,0x02,0x12,0x00,
0x3c,0x05,0xb0,0x03,0x00,0x62,0x18,0x25,0x34,0xa5,0x00,0x8b,0x24,0x02,0xff,0x80,
0xac,0x83,0x00,0x00,0x03,0xe0,0x00,0x08,0xa0,0xa2,0x00,0x00,0x3c,0x04,0xb0,0x03,
0x34,0x84,0x00,0x0b,0x24,0x02,0x00,0x22,0x3c,0x05,0xb0,0x01,0x3c,0x06,0x45,0x67,
0x3c,0x0a,0xb0,0x09,0xa0,0x82,0x00,0x00,0x34,0xa5,0x00,0x04,0x34,0xc6,0x89,0xaa,
0x35,0x4a,0x00,0x04,0x24,0x02,0x01,0x23,0x3c,0x0b,0xb0,0x09,0x3c,0x07,0x01,0x23,
0x3c,0x0c,0xb0,0x09,0x3c,0x01,0xb0,0x01,0xac,0x20,0x00,0x00,0x27,0xbd,0xff,0xe0,
0xac,0xa0,0x00,0x00,0x35,0x6b,0x00,0x08,0x3c,0x01,0xb0,0x09,0xac,0x26,0x00,0x00,
0x34,0xe7,0x45,0x66,0xa5,0x42,0x00,0x00,0x35,0x8c,0x00,0x0c,0x24,0x02,0xcd,0xef,
0x3c,0x0d,0xb0,0x09,0x3c,0x08,0xcd,0xef,0x3c,0x0e,0xb0,0x09,0xad,0x67,0x00,0x00,
0xaf,0xb7,0x00,0x1c,0xa5,0x82,0x00,0x00,0xaf,0xb6,0x00,0x18,0xaf,0xb5,0x00,0x14,
0xaf,0xb4,0x00,0x10,0xaf,0xb3,0x00,0x0c,0xaf,0xb2,0x00,0x08,0xaf,0xb1,0x00,0x04,
0xaf,0xb0,0x00,0x00,0x35,0xad,0x00,0x10,0x35,0x08,0x01,0x22,0x35,0xce,0x00,0x14,
0x24,0x02,0x89,0xab,0x3c,0x0f,0xb0,0x09,0x3c,0x09,0x89,0xab,0x3c,0x10,0xb0,0x09,
0x3c,0x11,0xb0,0x09,0x3c,0x12,0xb0,0x09,0x3c,0x13,0xb0,0x09,0x3c,0x14,0xb0,0x09,
0x3c,0x15,0xb0,0x09,0x3c,0x16,0xb0,0x09,0x3c,0x17,0xb0,0x09,0xad,0xa8,0x00,0x00,
0x24,0x03,0xff,0xff,0xa5,0xc2,0x00,0x00,0x35,0xef,0x00,0x18,0x35,0x29,0xcd,0xee,
0x36,0x10,0x00,0x1c,0x36,0x31,0x00,0x20,0x36,0x52,0x00,0x24,0x36,0x73,0x00,0x28,
0x36,0x94,0x00,0x2c,0x36,0xb5,0x00,0x30,0x36,0xd6,0x00,0x34,0x36,0xf7,0x00,0x38,
0x24,0x02,0x45,0x67,0xad,0xe9,0x00,0x00,0xa6,0x02,0x00,0x00,0xae,0x23,0x00,0x00,
0x8f,0xb0,0x00,0x00,0xa6,0x43,0x00,0x00,0x8f,0xb1,0x00,0x04,0xae,0x63,0x00,0x00,
0x8f,0xb2,0x00,0x08,0xa6,0x83,0x00,0x00,0x8f,0xb3,0x00,0x0c,0xae,0xa3,0x00,0x00,
0x8f,0xb4,0x00,0x10,0xa6,0xc3,0x00,0x00,0x8f,0xb5,0x00,0x14,0xae,0xe3,0x00,0x00,
0x7b,0xb6,0x00,0xfc,0x3c,0x18,0xb0,0x09,0x37,0x18,0x00,0x3c,0xa7,0x03,0x00,0x00,
0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
0x34,0x63,0x00,0x20,0x24,0x42,0x51,0x48,0xac,0x62,0x00,0x00,0x8c,0x83,0x00,0x34,
0x34,0x02,0xff,0xff,0x00,0x43,0x10,0x2a,0x14,0x40,0x01,0x04,0x00,0x80,0x28,0x21,
0x8c,0x86,0x00,0x08,0x24,0x02,0x00,0x03,0x10,0xc2,0x00,0xf7,0x00,0x00,0x00,0x00,
0x8c,0xa2,0x00,0x2c,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x4f,0x24,0x02,0x00,0x06,
0x3c,0x03,0xb0,0x05,0x34,0x63,0x04,0x50,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
0x30,0x42,0x00,0xff,0x14,0x40,0x00,0xdd,0xac,0xa2,0x00,0x2c,0x24,0x02,0x00,0x01,
0x10,0xc2,0x00,0xdc,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xc2,0x00,0xca,
0x00,0x00,0x00,0x00,0x8c,0xa7,0x00,0x04,0x24,0x02,0x00,0x02,0x10,0xe2,0x00,0xc0,
0x00,0x00,0x00,0x00,0x8c,0xa2,0x00,0x14,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x09,
0x24,0x02,0x00,0x01,0x3c,0x03,0xb0,0x09,0x34,0x63,0x01,0x60,0x90,0x62,0x00,0x00,
0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0x10,0x40,0x00,0x05,0xac,0xa2,0x00,0x14,
0x24,0x02,0x00,0x01,0xac,0xa2,0x00,0x00,0x03,0xe0,0x00,0x08,0xac,0xa0,0x00,0x14,
0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xd0,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
0x04,0x61,0x00,0x19,0x3c,0x02,0xb0,0x03,0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x2e,
0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x40,0x00,0x12,
0x3c,0x02,0xb0,0x03,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x42,0x90,0x43,0x00,0x00,
0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x0c,0x3c,0x02,0xb0,0x03,0x80,0xa2,0x00,0x50,
0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x08,0x3c,0x02,0xb0,0x03,0x14,0xc0,0x00,0x07,
0x34,0x42,0x00,0x3f,0x24,0x02,0x00,0x0e,0x24,0x03,0x00,0x01,0xac,0xa2,0x00,0x00,
0x03,0xe0,0x00,0x08,0xa0,0xa3,0x00,0x50,0x34,0x42,0x00,0x3f,0x90,0x44,0x00,0x00,
0x24,0x03,0x00,0x01,0x10,0x64,0x00,0x7f,0x3c,0x03,0xb0,0x05,0x80,0xa2,0x00,0x31,
0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0a,0x3c,0x02,0xb0,0x06,0x34,0x42,0x80,0x18,
0x8c,0x43,0x00,0x00,0x3c,0x04,0xf0,0x00,0x3c,0x02,0x80,0x00,0x00,0x64,0x18,0x24,
0x10,0x62,0x00,0x03,0x24,0x02,0x00,0x09,0x03,0xe0,0x00,0x08,0xac,0xa2,0x00,0x00,
0x8c,0xa2,0x00,0x40,0x00,0x00,0x00,0x00,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
0x10,0x60,0x00,0x09,0x3c,0x03,0xb0,0x03,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2c,
0x8c,0x43,0x00,0x00,0x3c,0x04,0x00,0x02,0x00,0x64,0x18,0x24,0x14,0x60,0xff,0xf2,
0x24,0x02,0x00,0x10,0x3c,0x03,0xb0,0x03,0x34,0x63,0x02,0x01,0x90,0x62,0x00,0x00,
0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x80,0x10,0x40,0x00,0x0e,0x00,0x00,0x00,0x00,
0x8c,0xa3,0x00,0x0c,0x00,0x00,0x00,0x00,0xac,0xa3,0x00,0x10,0x3c,0x02,0xb0,0x03,
0x90,0x42,0x02,0x01,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x0f,0xac,0xa2,0x00,0x0c,
0x90,0xa3,0x00,0x0f,0x24,0x02,0x00,0x0d,0x3c,0x01,0xb0,0x03,0x08,0x00,0x14,0xb2,
0xa0,0x23,0x02,0x01,0x3c,0x02,0xb0,0x09,0x34,0x42,0x01,0x80,0x90,0x44,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x04,0x1e,0x00,0x00,0x03,0x1e,0x03,0x10,0x60,0x00,0x15,
0xa0,0xa4,0x00,0x44,0x24,0x02,0x00,0x01,0x10,0x62,0x00,0x0b,0x24,0x02,0x00,0x02,
0x10,0x62,0x00,0x03,0x24,0x03,0x00,0x0d,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
0x8c,0xa2,0x00,0x0c,0xac,0xa3,0x00,0x00,0x24,0x03,0x00,0x04,0xac,0xa2,0x00,0x10,
0x03,0xe0,0x00,0x08,0xac,0xa3,0x00,0x0c,0x24,0x02,0x00,0x0d,0xac,0xa2,0x00,0x00,
0x24,0x03,0x00,0x04,0x24,0x02,0x00,0x06,0xac,0xa3,0x00,0x10,0x03,0xe0,0x00,0x08,
0xac,0xa2,0x00,0x0c,0x8c,0xa3,0x00,0x38,0x24,0x04,0x00,0x01,0x10,0x64,0x00,0x2d,
0x24,0x02,0x00,0x02,0x10,0x60,0x00,0x19,0x00,0x00,0x00,0x00,0x10,0x62,0x00,0x10,
0x24,0x02,0x00,0x04,0x10,0x62,0x00,0x04,0x00,0x00,0x00,0x00,0xac,0xa0,0x00,0x38,
0x03,0xe0,0x00,0x08,0xac,0xa0,0x00,0x00,0x10,0xe4,0x00,0x07,0x24,0x02,0x00,0x03,
0x80,0xa2,0x00,0x30,0x00,0x00,0x00,0x00,0x00,0x02,0x18,0x0b,0xac,0xa3,0x00,0x00,
0x03,0xe0,0x00,0x08,0xac,0xa0,0x00,0x38,0x08,0x00,0x15,0x04,0xac,0xa2,0x00,0x00,
0x10,0xe4,0x00,0x02,0x24,0x02,0x00,0x03,0x24,0x02,0x00,0x0c,0xac,0xa2,0x00,0x00,
0x24,0x02,0x00,0x04,0x03,0xe0,0x00,0x08,0xac,0xa2,0x00,0x38,0x10,0xe4,0x00,0x0e,
0x3c,0x03,0xb0,0x06,0x34,0x63,0x80,0x24,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
0x30,0x42,0x00,0xff,0x10,0x40,0x00,0x06,0xac,0xa2,0x00,0x18,0x24,0x02,0x00,0x02,
0xac,0xa2,0x00,0x00,0xac,0xa0,0x00,0x18,0x08,0x00,0x15,0x0d,0x24,0x02,0x00,0x01,
0x08,0x00,0x15,0x1a,0xac,0xa0,0x00,0x00,0x24,0x02,0x00,0x03,0x08,0x00,0x15,0x1a,
0xac,0xa2,0x00,0x00,0x24,0x03,0x00,0x0b,0xac,0xa2,0x00,0x38,0x03,0xe0,0x00,0x08,
0xac,0xa3,0x00,0x00,0x34,0x63,0x02,0x2e,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
0x30,0x42,0x00,0x01,0x14,0x40,0xff,0x7d,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x42,
0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x60,0xff,0x78,0x00,0x00,0x00,0x00,
0x10,0xc0,0xff,0x81,0x24,0x02,0x00,0x0e,0x08,0x00,0x14,0xa7,0x00,0x00,0x00,0x00,
0x80,0xa2,0x00,0x30,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x3e,0x24,0x02,0x00,0x04,
0x08,0x00,0x14,0xb2,0x00,0x00,0x00,0x00,0x84,0xa2,0x00,0x20,0x00,0x00,0x00,0x00,
0x10,0x40,0xff,0x75,0x24,0x02,0x00,0x06,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2e,
0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x01,0x30,0x63,0x00,0xff,
0x00,0x60,0x10,0x21,0x14,0x40,0xff,0x2b,0xa4,0xa3,0x00,0x20,0x08,0x00,0x14,0xb2,
0x24,0x02,0x00,0x06,0x8c,0xa2,0x00,0x1c,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x66,
0x24,0x02,0x00,0x05,0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x2c,0x8c,0x62,0x00,0x00,
0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0x10,0x40,0xff,0x1b,0xac,0xa2,0x00,0x1c,
0x08,0x00,0x14,0xb2,0x24,0x02,0x00,0x05,0x3c,0x02,0xb0,0x05,0x8c,0x42,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x02,0x17,0x42,0x30,0x42,0x00,0x01,0x14,0x40,0xff,0x56,
0x24,0x02,0x00,0x06,0x08,0x00,0x14,0x60,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x0a,
0x03,0xe0,0x00,0x08,0xac,0x82,0x00,0x00,0x27,0xbd,0xff,0xd8,0xaf,0xb0,0x00,0x10,
0x27,0x90,0x86,0x58,0xaf,0xbf,0x00,0x20,0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,
0x0c,0x00,0x29,0xd5,0xaf,0xb1,0x00,0x14,0xaf,0x90,0x8f,0xe0,0x48,0x02,0x00,0x00,
0x0c,0x00,0x13,0xf0,0x00,0x00,0x00,0x00,0x0c,0x00,0x18,0x1f,0x02,0x00,0x20,0x21,
0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x3a,0x94,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
0xa3,0x83,0x8f,0xe4,0x0c,0x00,0x00,0x34,0x00,0x00,0x00,0x00,0x0c,0x00,0x13,0xfb,
0x00,0x00,0x00,0x00,0x27,0x84,0x84,0x98,0x0c,0x00,0x27,0x59,0x00,0x00,0x00,0x00,
0x93,0x84,0x80,0x10,0x0c,0x00,0x21,0x3f,0x00,0x00,0x00,0x00,0x27,0x84,0x89,0x18,
0x0c,0x00,0x06,0xe5,0x00,0x00,0x00,0x00,0x0c,0x00,0x01,0x39,0x00,0x00,0x00,0x00,
0x27,0x84,0x84,0x40,0x0c,0x00,0x13,0xd9,0x00,0x00,0x00,0x00,0x27,0x82,0x89,0x4c,
0xaf,0x82,0x84,0x80,0x0c,0x00,0x00,0x5f,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
0x34,0x63,0x01,0x08,0x3c,0x04,0xb0,0x09,0x3c,0x05,0xb0,0x09,0x8c,0x66,0x00,0x00,
0x34,0x84,0x01,0x68,0x34,0xa5,0x01,0x40,0x24,0x02,0xc8,0x80,0x24,0x03,0x00,0x0a,
0xa4,0x82,0x00,0x00,0xa4,0xa3,0x00,0x00,0x3c,0x04,0xb0,0x03,0x8c,0x82,0x00,0x00,
0x8f,0x85,0x84,0x40,0xaf,0x86,0x84,0x38,0x34,0x42,0x00,0x20,0xac,0x82,0x00,0x00,
0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x58,0x8c,0x43,0x00,0x00,0x2c,0xa4,0x00,0x11,
0x34,0x63,0x01,0x00,0xac,0x43,0x00,0x00,0x10,0x80,0xff,0xfa,0x3c,0x02,0xb0,0x03,
0x3c,0x03,0x80,0x01,0x00,0x05,0x10,0x80,0x24,0x63,0x02,0x00,0x00,0x43,0x10,0x21,
0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,
0x27,0x84,0x84,0x98,0x0c,0x00,0x26,0x8e,0x00,0x00,0x00,0x00,0x27,0x84,0x84,0x40,
0x0c,0x00,0x14,0x52,0x00,0x00,0x00,0x00,0x93,0x83,0x81,0xf1,0x24,0x02,0x00,0x01,
0x10,0x62,0x00,0x08,0x00,0x00,0x00,0x00,0x8f,0x85,0x84,0x40,0x8f,0x82,0x84,0x74,
0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xaf,0x82,0x84,0x74,0x08,0x00,0x15,0x9d,
0x3c,0x02,0xb0,0x03,0x27,0x84,0x84,0x98,0x0c,0x00,0x27,0x0d,0x00,0x00,0x00,0x00,
0x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,0x27,0x84,0x84,0x98,0x0c,0x00,0x28,0xdd,
0x00,0x00,0x00,0x00,0xa3,0x82,0x84,0x71,0x8f,0x82,0x84,0x74,0xaf,0x80,0x84,0x40,
0x24,0x42,0x00,0x01,0xaf,0x82,0x84,0x74,0x08,0x00,0x15,0x9c,0x00,0x00,0x28,0x21,
0x27,0x84,0x86,0x58,0x0c,0x00,0x19,0x5b,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,
0x14,0x40,0x00,0x05,0x3c,0x03,0xb0,0x05,0xaf,0x80,0x84,0x40,0xaf,0x80,0x84,0x44,
0x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,0x34,0x63,0x04,0x50,0x90,0x62,0x00,0x00,
0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0xaf,0x82,0x84,0x6c,0x14,0x40,0x00,0x20,
0x24,0x02,0x00,0x01,0x8f,0x84,0x84,0x48,0x00,0x00,0x00,0x00,0x10,0x82,0x00,0x20,
0x3c,0x03,0xb0,0x09,0x34,0x63,0x01,0x60,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
0x30,0x42,0x00,0xff,0xaf,0x82,0x84,0x54,0x14,0x40,0x00,0x15,0x24,0x02,0x00,0x01,
0x24,0x02,0x00,0x02,0x10,0x82,0x00,0x07,0x00,0x00,0x00,0x00,0x24,0x05,0x00,0x03,
0x24,0x02,0x00,0x01,0xaf,0x82,0x84,0x44,0xaf,0x85,0x84,0x40,0x08,0x00,0x15,0xb6,
0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2e,0x90,0x43,0x00,0x00,
0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x01,0x30,0x63,0x00,0xff,0x00,0x60,0x10,0x21,
0xa7,0x83,0x84,0x60,0x14,0x40,0xff,0xf1,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
0xaf,0x82,0x84,0x44,0xaf,0x80,0x84,0x40,0x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,
0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x2c,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
0x30,0x42,0x00,0xff,0xaf,0x82,0x84,0x5c,0x14,0x40,0xff,0xf5,0x24,0x02,0x00,0x01,
0x08,0x00,0x15,0xe1,0x3c,0x03,0xb0,0x09,0x27,0x84,0x86,0x58,0x0c,0x00,0x1a,0xd1,
0x00,0x00,0x00,0x00,0x83,0x82,0x84,0x70,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xec,
0x24,0x02,0x00,0x02,0x3c,0x03,0xb0,0x05,0x34,0x63,0x04,0x50,0x90,0x62,0x00,0x00,
0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0xaf,0x82,0x84,0x6c,0x14,0x40,0xff,0xe4,
0x24,0x02,0x00,0x02,0x8f,0x84,0x84,0x48,0x24,0x02,0x00,0x01,0x10,0x82,0x00,0x12,
0x24,0x02,0x00,0x02,0x10,0x82,0x00,0x04,0x00,0x00,0x00,0x00,0x24,0x05,0x00,0x04,
0x08,0x00,0x15,0xed,0x24,0x02,0x00,0x02,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2e,
0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x01,0x30,0x63,0x00,0xff,
0x00,0x60,0x10,0x21,0xa7,0x83,0x84,0x60,0x14,0x40,0xff,0xf4,0x00,0x00,0x00,0x00,
0x08,0x00,0x15,0xfc,0x24,0x02,0x00,0x02,0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x2c,
0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0xaf,0x82,0x84,0x5c,
0x14,0x40,0xff,0xf7,0x00,0x00,0x00,0x00,0x08,0x00,0x16,0x1d,0x24,0x02,0x00,0x02,
0x27,0x84,0x89,0x18,0x0c,0x00,0x0b,0x55,0x00,0x00,0x00,0x00,0x8f,0x83,0x84,0x44,
0xaf,0x82,0x84,0x5c,0x38,0x64,0x00,0x02,0x00,0x04,0x18,0x0a,0xaf,0x83,0x84,0x44,
0x14,0x40,0xff,0xad,0x24,0x05,0x00,0x05,0x8f,0x82,0x89,0x58,0xaf,0x80,0x84,0x40,
0x10,0x40,0x00,0x02,0x24,0x04,0x00,0x01,0xaf,0x84,0x84,0x48,0x93,0x82,0x89,0x66,
0x00,0x00,0x00,0x00,0x10,0x40,0xff,0x6c,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x05,
0x34,0x42,0x00,0x08,0x8c,0x43,0x00,0x00,0x3c,0x04,0x20,0x00,0x00,0x64,0x18,0x24,
0x10,0x60,0xff,0x65,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xa0,
0x8c,0x43,0x00,0x00,0x3c,0x04,0x80,0x00,0xaf,0x80,0x89,0x40,0x24,0x63,0x00,0x01,
0xac,0x43,0x00,0x00,0x3c,0x01,0xb0,0x05,0xac,0x24,0x00,0x08,0xaf,0x80,0x89,0x3c,
0xaf,0x80,0x89,0x44,0xaf,0x80,0x89,0x48,0xaf,0x80,0x89,0x54,0xaf,0x80,0x89,0x4c,
0x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,0x83,0x82,0x84,0x90,0x00,0x00,0x00,0x00,
0x10,0x40,0x00,0x02,0x24,0x02,0x00,0x20,0xaf,0x82,0x84,0x5c,0x8f,0x85,0x84,0x5c,
0x27,0x84,0x89,0x18,0x0c,0x00,0x0d,0x30,0x00,0x00,0x00,0x00,0x00,0x02,0x1e,0x00,
0xa3,0x82,0x84,0x70,0xaf,0x80,0x84,0x5c,0x10,0x60,0xff,0x8e,0x00,0x00,0x00,0x00,
0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2e,0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
0x30,0x63,0x00,0x01,0x30,0x63,0x00,0xff,0x00,0x60,0x10,0x21,0xa7,0x83,0x84,0x60,
0x10,0x40,0x00,0x04,0x24,0x04,0x00,0x02,0xaf,0x84,0x84,0x48,0x08,0x00,0x15,0xfd,
0x00,0x00,0x00,0x00,0x08,0x00,0x15,0xee,0x24,0x05,0x00,0x06,0x27,0x84,0x84,0x40,
0x27,0x85,0x89,0x18,0x0c,0x00,0x0d,0xfd,0x00,0x00,0x00,0x00,0x8f,0x82,0x84,0x64,
0xaf,0x80,0x84,0x6c,0x14,0x40,0x00,0x19,0x00,0x40,0x18,0x21,0x8f,0x82,0x84,0x68,
0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x15,0x24,0x02,0x00,0x02,0x8f,0x83,0x84,0x48,
0x00,0x00,0x00,0x00,0x10,0x62,0x00,0x0b,0x3c,0x02,0x40,0x00,0x8f,0x83,0x84,0x44,
0x24,0x02,0x00,0x01,0x10,0x62,0x00,0x02,0x24,0x05,0x00,0x03,0x24,0x05,0x00,0x06,
0xaf,0x85,0x84,0x40,0x24,0x04,0x00,0x03,0xaf,0x84,0x84,0x48,0x08,0x00,0x15,0xb6,
0x00,0x00,0x00,0x00,0x34,0x42,0x00,0x14,0x3c,0x01,0xb0,0x05,0xac,0x22,0x00,0x00,
0xaf,0x80,0x84,0x40,0x08,0x00,0x16,0x96,0x24,0x04,0x00,0x03,0x10,0x60,0x00,0x10,
0x00,0x00,0x00,0x00,0x27,0x85,0x89,0x18,0x27,0x84,0x84,0x40,0x0c,0x00,0x0e,0x21,
0x00,0x00,0x00,0x00,0x8f,0x83,0x84,0x44,0x24,0x02,0x00,0x01,0xa3,0x80,0x84,0x70,
0xaf,0x80,0x84,0x48,0x10,0x62,0x00,0x02,0x24,0x05,0x00,0x03,0x24,0x05,0x00,0x04,
0xaf,0x85,0x84,0x40,0xaf,0x80,0x84,0x64,0x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,
0x83,0x82,0x84,0x90,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x04,0x00,0x00,0x00,0x00,
0x27,0x84,0x89,0x18,0x0c,0x00,0x10,0x69,0x00,0x00,0x00,0x00,0x8f,0x82,0x84,0x44,
0xa3,0x80,0x84,0x70,0xaf,0x80,0x84,0x40,0xaf,0x80,0x84,0x48,0x14,0x40,0x00,0x03,
0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0xaf,0x82,0x84,0x44,0xaf,0x80,0x84,0x68,
0x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,0x27,0x84,0x84,0x40,0x27,0x85,0x89,0x18,
0x0c,0x00,0x0e,0x21,0x00,0x00,0x00,0x00,0x8f,0x82,0x84,0x44,0xa3,0x80,0x84,0x70,
0xaf,0x80,0x84,0x40,0xaf,0x80,0x84,0x48,0x14,0x40,0xfe,0xeb,0x00,0x00,0x00,0x00,
0x24,0x02,0x00,0x02,0xaf,0x82,0x84,0x44,0x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,
0x27,0x84,0x89,0x18,0x0c,0x00,0x10,0x69,0x00,0x00,0x00,0x00,0x08,0x00,0x16,0xc6,
0x00,0x00,0x00,0x00,0x27,0x84,0x84,0x98,0x0c,0x00,0x29,0x73,0x00,0x00,0x00,0x00,
0x08,0x00,0x15,0xc5,0x00,0x00,0x00,0x00,0x0c,0x00,0x24,0x05,0x00,0x00,0x00,0x00,
0x0c,0x00,0x26,0xff,0x00,0x00,0x00,0x00,0x0c,0x00,0x18,0x11,0x00,0x00,0x00,0x00,
0x93,0x83,0xbc,0x18,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x2b,0x3c,0x02,0xb0,0x03,
0x34,0x42,0x01,0x08,0x8c,0x44,0x00,0x00,0x8f,0x83,0xbc,0x10,0x8f,0x82,0xbc,0x14,
0x00,0x83,0x18,0x23,0x00,0x43,0x10,0x2b,0x10,0x40,0x00,0x23,0x3c,0x02,0xb0,0x03,
0x24,0x04,0x05,0xa0,0x34,0x42,0x01,0x18,0x8c,0x42,0x00,0x00,0x0c,0x00,0x06,0xd1,
0x00,0x00,0x00,0x00,0x24,0x04,0x05,0xa4,0x0c,0x00,0x06,0xd1,0x00,0x02,0x84,0x02,
0x30,0x51,0xff,0xff,0x24,0x04,0x05,0xa8,0x00,0x02,0x94,0x02,0x0c,0x00,0x06,0xd1,
0x3a,0x10,0xff,0xff,0x3a,0x31,0xff,0xff,0x30,0x42,0xff,0xff,0x2e,0x10,0x00,0x01,
0x2e,0x31,0x00,0x01,0x3a,0x52,0xff,0xff,0x02,0x11,0x80,0x25,0x2e,0x52,0x00,0x01,
0x38,0x42,0xff,0xff,0x02,0x12,0x80,0x25,0x2c,0x42,0x00,0x01,0x02,0x02,0x80,0x25,
0x16,0x00,0x00,0x02,0x24,0x04,0x00,0x02,0x00,0x00,0x20,0x21,0x0c,0x00,0x05,0x6e,
0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x08,0x8c,0x43,0x00,0x00,
0x00,0x00,0x00,0x00,0xaf,0x83,0xbc,0x10,0x0c,0x00,0x01,0xe9,0x00,0x00,0x00,0x00,
0xaf,0x80,0x84,0x40,0xaf,0x80,0x84,0x74,0x08,0x00,0x15,0x9c,0x00,0x00,0x28,0x21,
0x27,0x90,0xb4,0x00,0x24,0x11,0x00,0x12,0x8e,0x04,0x00,0x00,0x00,0x00,0x00,0x00,
0x90,0x82,0x00,0x10,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x03,0x00,0x00,0x00,0x00,
0x0c,0x00,0x18,0xd0,0x00,0x00,0x00,0x00,0x26,0x31,0xff,0xff,0x06,0x21,0xff,0xf6,
0x26,0x10,0x00,0x04,0xaf,0x80,0x84,0x40,0x08,0x00,0x15,0xb7,0x00,0x00,0x28,0x21,
0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x08,0x8c,0x44,0x00,0x00,0x8f,0x82,0x84,0x38,
0x00,0x04,0x19,0xc2,0x00,0x02,0x11,0xc2,0x10,0x62,0xff,0xf6,0x00,0x00,0x00,0x00,
0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x02,0x90,0x43,0x00,0x00,0x3c,0x12,0xb0,0x05,
0xaf,0x84,0x84,0x38,0x30,0x63,0x00,0xff,0x00,0x03,0x11,0x40,0x00,0x43,0x10,0x23,
0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x00,0x02,0x99,0x00,0x00,0x00,0x88,0x21,
0x36,0x52,0x02,0x2c,0x27,0x90,0xb4,0x00,0x8e,0x04,0x00,0x00,0x00,0x00,0x00,0x00,
0x90,0x83,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x62,0x00,0x03,0x10,0x40,0x00,0x06,
0x30,0x62,0x00,0x1c,0x14,0x40,0x00,0x04,0x00,0x00,0x00,0x00,0x8f,0x85,0x84,0x38,
0x0c,0x00,0x1e,0x94,0x02,0x60,0x30,0x21,0x8e,0x42,0x00,0x00,0x00,0x00,0x00,0x00,
0x30,0x42,0x00,0xff,0x14,0x40,0xff,0xd7,0x00,0x00,0x00,0x00,0x26,0x31,0x00,0x01,
0x2a,0x22,0x00,0x13,0x14,0x40,0xff,0xec,0x26,0x10,0x00,0x04,0x08,0x00,0x17,0x21,
0x00,0x00,0x00,0x00,0x8f,0x84,0x84,0x4c,0x27,0x85,0x89,0x18,0x0c,0x00,0x17,0xa4,
0x00,0x00,0x00,0x00,0x8f,0x83,0x84,0x4c,0x24,0x02,0x00,0x04,0x14,0x62,0xfe,0xa5,
0x00,0x00,0x00,0x00,0x08,0x00,0x15,0xee,0x24,0x05,0x00,0x05,0x3c,0x02,0xb0,0x03,
0x34,0x42,0x00,0x3f,0x90,0x44,0x00,0x00,0x24,0x03,0x00,0x01,0x10,0x64,0x00,0x08,
0x00,0x00,0x00,0x00,0x27,0x84,0x89,0x18,0x0c,0x00,0x24,0x2c,0x00,0x00,0x00,0x00,
0x24,0x05,0x00,0x05,0xaf,0x85,0x84,0x40,0x08,0x00,0x15,0xb7,0x00,0x00,0x00,0x00,
0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x14,0x8c,0x44,0x00,0x00,0x0c,0x00,0x24,0x49,
0x00,0x00,0x00,0x00,0x08,0x00,0x17,0x65,0x24,0x05,0x00,0x05,0x8f,0x82,0x89,0x4c,
0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0d,0x00,0x00,0x00,0x00,0x8f,0x84,0xb4,0x40,
0xaf,0x80,0x89,0x4c,0x94,0x85,0x00,0x14,0x0c,0x00,0x1b,0x66,0x00,0x00,0x00,0x00,
0x93,0x82,0x8b,0x71,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x02,0x10,0x40,0x00,0x03,
0x00,0x00,0x00,0x00,0x0c,0x00,0x01,0x57,0x00,0x00,0x20,0x21,0x8f,0x84,0xb4,0x40,
0x0c,0x00,0x18,0xd0,0x00,0x00,0x00,0x00,0x08,0x00,0x17,0x21,0x00,0x00,0x00,0x00,
0x3c,0x02,0xff,0x90,0x27,0xbd,0xff,0xe8,0x00,0x80,0x18,0x21,0x34,0x42,0x00,0x01,
0x27,0x84,0x89,0x18,0x10,0x62,0x00,0x05,0xaf,0xbf,0x00,0x10,0x8f,0xbf,0x00,0x10,
0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x06,0xe5,
0x00,0x00,0x00,0x00,0x27,0x84,0x86,0x58,0x0c,0x00,0x18,0x1f,0x00,0x00,0x00,0x00,
0x27,0x84,0x84,0x40,0x0c,0x00,0x13,0xd9,0x00,0x00,0x00,0x00,0x08,0x00,0x17,0x8b,
0x00,0x00,0x00,0x00,0x8f,0x82,0x89,0x58,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x05,
0x00,0x00,0x18,0x21,0x8f,0x82,0x84,0x48,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x02,
0x00,0x00,0x00,0x00,0x24,0x03,0x00,0x01,0x03,0xe0,0x00,0x08,0x00,0x60,0x10,0x21,
0x27,0xbd,0xff,0xe0,0x3c,0x06,0xb0,0x03,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,
0x34,0xc6,0x00,0x5f,0xaf,0xbf,0x00,0x18,0x90,0xc3,0x00,0x00,0x3c,0x07,0xb0,0x03,
0x34,0xe7,0x00,0x5d,0x34,0x63,0x00,0x01,0x3c,0x09,0xb0,0x03,0x24,0x02,0x00,0x01,
0xa0,0xc3,0x00,0x00,0x00,0x80,0x80,0x21,0xa0,0xe2,0x00,0x00,0x00,0xa0,0x88,0x21,
0x35,0x29,0x00,0x5e,0x00,0xe0,0x40,0x21,0x24,0x04,0x00,0x01,0x91,0x22,0x00,0x00,
0x91,0x03,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x83,0x00,0x03,0x30,0x42,0x00,0x01,
0x14,0x40,0xff,0xfa,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x04,0x12,0x02,0x00,0x2c,
0x24,0x05,0x0f,0x00,0x24,0x02,0x00,0x06,0x12,0x02,0x00,0x08,0x24,0x05,0x00,0x0f,
0x3c,0x02,0xb0,0x03,0x34,0x42,0x02,0x00,0xa0,0x50,0x00,0x00,0x8f,0xbf,0x00,0x18,
0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x24,0x04,0x0c,0x04,
0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x0f,0x24,0x04,0x0d,0x04,0x24,0x05,0x00,0x0f,
0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x0f,0x24,0x04,0x08,0x80,0x24,0x05,0x1e,0x00,
0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x0f,0x24,0x04,0x08,0x8c,0x24,0x05,0x0f,0x00,
0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x0f,0x24,0x04,0x08,0x24,0x3c,0x05,0x00,0x30,
0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x02,0x24,0x04,0x08,0x2c,0x3c,0x05,0x00,0x30,
0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x02,0x24,0x04,0x08,0x34,0x3c,0x05,0x00,0x30,
0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x02,0x24,0x04,0x08,0x3c,0x3c,0x05,0x00,0x30,
0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x02,0x08,0x00,0x17,0xc5,0x3c,0x02,0xb0,0x03,
0x24,0x04,0x08,0x8c,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x04,0x24,0x04,0x08,0x80,
0x24,0x05,0x1e,0x00,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x04,0x24,0x04,0x0c,0x04,
0x24,0x05,0x00,0x0f,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x04,0x24,0x04,0x0d,0x04,
0x24,0x05,0x00,0x0f,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x04,0x24,0x04,0x08,0x24,
0x3c,0x05,0x00,0x30,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x03,0x24,0x04,0x08,0x2c,
0x3c,0x05,0x00,0x30,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x03,0x24,0x04,0x08,0x34,
0x3c,0x05,0x00,0x30,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x02,0x3c,0x05,0x00,0x30,
0x24,0x06,0x00,0x03,0x0c,0x00,0x13,0x5f,0x24,0x04,0x08,0x3c,0x02,0x20,0x20,0x21,
0x24,0x05,0x00,0x14,0x0c,0x00,0x13,0xa4,0x24,0x06,0x01,0x07,0x08,0x00,0x17,0xc5,
0x3c,0x02,0xb0,0x03,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x73,0x90,0x62,0x00,0x00,
0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x02,0x14,0x40,0x00,0x04,0x00,0x00,0x00,0x00,
0xa3,0x80,0x81,0x58,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
0xa3,0x82,0x81,0x58,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
0x3c,0x02,0x80,0x00,0x00,0x80,0x70,0x21,0x34,0x63,0x00,0x20,0x24,0x42,0x60,0x7c,
0x3c,0x04,0xb0,0x03,0xac,0x62,0x00,0x00,0x34,0x84,0x00,0x30,0xad,0xc0,0x02,0xb8,
0x8c,0x83,0x00,0x00,0x24,0x02,0x00,0xff,0xa5,0xc0,0x00,0x0a,0x00,0x00,0x30,0x21,
0xa7,0x82,0x8f,0xf0,0x27,0x88,0x90,0x00,0xa5,0xc3,0x00,0x08,0x3c,0x07,0xb0,0x08,
0x30,0xc2,0xff,0xff,0x00,0x02,0x20,0xc0,0x24,0xc3,0x00,0x01,0x00,0x82,0x10,0x21,
0x00,0x60,0x30,0x21,0x00,0x02,0x10,0x80,0x30,0x63,0xff,0xff,0x00,0x48,0x10,0x21,
0x00,0x87,0x20,0x21,0x28,0xc5,0x00,0xff,0xac,0x83,0x00,0x00,0x14,0xa0,0xff,0xf4,
0xa4,0x43,0x00,0x00,0x3c,0x02,0xb0,0x08,0x34,0x03,0xff,0xff,0x25,0xc4,0x00,0x0c,
0x24,0x0a,0x00,0x02,0x34,0x42,0x07,0xf8,0x3c,0x06,0xb0,0x03,0xa7,0x83,0xb3,0xdc,
0xac,0x43,0x00,0x00,0xaf,0x84,0xb4,0x00,0x34,0xc6,0x00,0x64,0xa0,0x8a,0x00,0x18,
0x94,0xc5,0x00,0x00,0x8f,0x82,0xb4,0x00,0x25,0xc4,0x00,0x30,0x24,0x08,0x00,0x03,
0x3c,0x03,0xb0,0x03,0xa0,0x45,0x00,0x21,0x34,0x63,0x00,0x66,0xaf,0x84,0xb4,0x04,
0xa0,0x88,0x00,0x18,0x94,0x65,0x00,0x00,0x8f,0x82,0xb4,0x04,0x25,0xc4,0x00,0x54,
0x25,0xc7,0x00,0x78,0xa0,0x45,0x00,0x21,0xaf,0x84,0xb4,0x08,0xa0,0x88,0x00,0x18,
0x94,0x65,0x00,0x00,0x8f,0x82,0xb4,0x08,0x25,0xc8,0x00,0x9c,0x24,0x09,0x00,0x01,
0xa0,0x45,0x00,0x21,0xaf,0x87,0xb4,0x0c,0xa0,0xea,0x00,0x18,0x94,0xc4,0x00,0x00,
0x8f,0x82,0xb4,0x0c,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x62,0xa0,0x44,0x00,0x21,
0xaf,0x88,0xb4,0x10,0xa1,0x09,0x00,0x18,0x94,0x65,0x00,0x00,0x8f,0x82,0xb4,0x10,
0x25,0xc4,0x00,0xc0,0x3c,0x06,0xb0,0x03,0xa0,0x45,0x00,0x21,0xaf,0x84,0xb4,0x14,
0xa0,0x89,0x00,0x18,0x94,0x65,0x00,0x00,0x8f,0x82,0xb4,0x14,0x25,0xc4,0x00,0xe4,
0x34,0xc6,0x00,0x60,0xa0,0x45,0x00,0x21,0xaf,0x84,0xb4,0x18,0xa0,0x80,0x00,0x18,
0x94,0xc5,0x00,0x00,0x8f,0x82,0xb4,0x18,0x25,0xc3,0x01,0x08,0x25,0xc7,0x01,0x2c,
0xa0,0x45,0x00,0x21,0xaf,0x83,0xb4,0x1c,0xa0,0x60,0x00,0x18,0x94,0xc8,0x00,0x00,
0x8f,0x82,0xb4,0x1c,0x25,0xc4,0x01,0x50,0x25,0xc5,0x01,0x74,0xa0,0x48,0x00,0x21,
0x25,0xc6,0x01,0x98,0x25,0xc9,0x01,0xbc,0x25,0xca,0x01,0xe0,0x25,0xcb,0x02,0x04,
0x25,0xcc,0x02,0x28,0x25,0xcd,0x02,0x4c,0x24,0x02,0x00,0x10,0x3c,0x03,0xb0,0x03,
0xaf,0x87,0xb4,0x20,0x34,0x63,0x00,0x38,0xa0,0xe0,0x00,0x18,0xaf,0x84,0xb4,0x24,
0xa0,0x80,0x00,0x18,0xaf,0x85,0xb4,0x28,0xa0,0xa0,0x00,0x18,0xaf,0x86,0xb4,0x2c,
0xa0,0xc0,0x00,0x18,0xaf,0x89,0xb4,0x30,0xa1,0x20,0x00,0x18,0xaf,0x8a,0xb4,0x34,
0xa1,0x40,0x00,0x18,0xaf,0x8b,0xb4,0x38,0xa1,0x60,0x00,0x18,0xaf,0x8c,0xb4,0x3c,
0xa1,0x80,0x00,0x18,0xaf,0x8d,0xb4,0x40,0xa1,0xa2,0x00,0x18,0x94,0x64,0x00,0x00,
0x8f,0x82,0xb4,0x40,0x25,0xc5,0x02,0x70,0x3c,0x03,0xb0,0x03,0xa0,0x44,0x00,0x21,
0x24,0x02,0x00,0x11,0xaf,0x85,0xb4,0x44,0x34,0x63,0x00,0x6e,0xa0,0xa2,0x00,0x18,
0x94,0x64,0x00,0x00,0x8f,0x82,0xb4,0x44,0x25,0xc5,0x02,0x94,0x3c,0x03,0xb0,0x03,
0xa0,0x44,0x00,0x21,0x24,0x02,0x00,0x12,0xaf,0x85,0xb4,0x48,0x34,0x63,0x00,0x6c,
0xa0,0xa2,0x00,0x18,0x94,0x64,0x00,0x00,0x8f,0x82,0xb4,0x48,0x24,0x05,0xff,0xff,
0x24,0x07,0x00,0x01,0xa0,0x44,0x00,0x21,0x24,0x06,0x00,0x12,0x27,0x84,0xb4,0x00,
0x8c,0x82,0x00,0x00,0x24,0xc6,0xff,0xff,0xa0,0x40,0x00,0x04,0x8c,0x83,0x00,0x00,
0xa4,0x45,0x00,0x00,0xa4,0x45,0x00,0x02,0xa0,0x60,0x00,0x0a,0x8c,0x82,0x00,0x00,
0xa4,0x65,0x00,0x06,0xa4,0x65,0x00,0x08,0xa0,0x40,0x00,0x10,0x8c,0x83,0x00,0x00,
0xa4,0x45,0x00,0x0c,0xa4,0x45,0x00,0x0e,0xa0,0x60,0x00,0x12,0x8c,0x82,0x00,0x00,
0x00,0x00,0x00,0x00,0xa0,0x40,0x00,0x16,0x8c,0x83,0x00,0x00,0xa4,0x45,0x00,0x14,
0xa0,0x67,0x00,0x17,0x8c,0x82,0x00,0x00,0x24,0x84,0x00,0x04,0xa0,0x40,0x00,0x20,
0x04,0xc1,0xff,0xe7,0xac,0x40,0x00,0x1c,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x00,0x34,0x42,0x00,0x20,0x24,0x63,0x63,0x40,
0xac,0x43,0x00,0x00,0x90,0x82,0x00,0x10,0x00,0x80,0x60,0x21,0x10,0x40,0x00,0x56,
0x00,0x00,0x70,0x21,0x97,0x82,0x8f,0xf0,0x94,0x8a,0x00,0x0c,0x27,0x87,0x90,0x00,
0x00,0x02,0x40,0xc0,0x01,0x02,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x47,0x10,0x21,
0x90,0x8b,0x00,0x18,0xa4,0x4a,0x00,0x00,0x94,0x83,0x00,0x0e,0x39,0x64,0x00,0x10,
0x2c,0x84,0x00,0x01,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x34,0x85,0x00,0x02,
0x39,0x63,0x00,0x11,0x00,0x83,0x28,0x0b,0x34,0xa3,0x00,0x08,0x39,0x64,0x00,0x12,
0x00,0x02,0x10,0x80,0x00,0xa4,0x18,0x0b,0x00,0x47,0x10,0x21,0x94,0x49,0x00,0x04,
0x34,0x64,0x00,0x20,0x00,0x6b,0x20,0x0b,0x34,0x83,0x00,0x40,0x39,0x62,0x00,0x01,
0x00,0x82,0x18,0x0b,0x00,0x09,0x30,0xc0,0x34,0x64,0x00,0x80,0x00,0xc9,0x28,0x21,
0x39,0x62,0x00,0x02,0x00,0x60,0x68,0x21,0x00,0x82,0x68,0x0a,0x00,0x05,0x28,0x80,
0x3c,0x02,0xb0,0x08,0x00,0xa7,0x28,0x21,0x00,0xc2,0x30,0x21,0x01,0x02,0x40,0x21,
0x34,0x03,0xff,0xff,0x35,0xa4,0x01,0x00,0x39,0x62,0x00,0x03,0x2d,0x67,0x00,0x13,
0xad,0x0a,0x00,0x00,0xa4,0xa3,0x00,0x00,0xac,0xc3,0x00,0x00,0xa7,0x89,0x8f,0xf0,
0x10,0xe0,0x00,0x0f,0x00,0x82,0x68,0x0a,0x3c,0x03,0x80,0x01,0x00,0x0b,0x10,0x80,
0x24,0x63,0x02,0x44,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x60,
0x94,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x14,0x00,0x00,0x02,0x74,0x03,
0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x3a,0x94,0x44,0x00,0x00,0x93,0x83,0x8f,0xe4,
0x91,0x82,0x00,0x21,0x01,0xc4,0x20,0x21,0x91,0x85,0x00,0x10,0x00,0x04,0x24,0x00,
0x00,0x62,0x18,0x21,0x00,0x04,0x74,0x03,0x00,0x6e,0x18,0x23,0x00,0x65,0x10,0x2a,
0x00,0xa2,0x18,0x0a,0x00,0x0d,0x24,0x00,0x3c,0x02,0xb0,0x06,0x24,0x05,0xff,0xff,
0x00,0x64,0x18,0x25,0x34,0x42,0x80,0x20,0xac,0x43,0x00,0x00,0xa5,0x85,0x00,0x0e,
0xa1,0x80,0x00,0x10,0xa5,0x85,0x00,0x0c,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
0x3c,0x03,0xb0,0x03,0x08,0x00,0x19,0x14,0x34,0x63,0x00,0x62,0x3c,0x03,0xb0,0x03,
0x08,0x00,0x19,0x14,0x34,0x63,0x00,0x64,0x3c,0x03,0xb0,0x03,0x08,0x00,0x19,0x14,
0x34,0x63,0x00,0x66,0x3c,0x03,0xb0,0x03,0x08,0x00,0x19,0x14,0x34,0x63,0x00,0x38,
0x3c,0x03,0xb0,0x03,0x08,0x00,0x19,0x14,0x34,0x63,0x00,0x6e,0x3c,0x03,0xb0,0x03,
0x08,0x00,0x19,0x14,0x34,0x63,0x00,0x6c,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
0x34,0x63,0x00,0x20,0x24,0x42,0x65,0x08,0x00,0x05,0x28,0x40,0xac,0x62,0x00,0x00,
0x00,0xa6,0x28,0x21,0x2c,0xe2,0x00,0x10,0x14,0x80,0x00,0x06,0x00,0x00,0x18,0x21,
0x10,0x40,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0xe0,0x18,0x21,0x03,0xe0,0x00,0x08,
0x00,0x60,0x10,0x21,0x24,0x02,0x00,0x20,0x10,0xe2,0x00,0x06,0x2c,0xe4,0x00,0x10,
0x24,0xa2,0x00,0x01,0x10,0x80,0xff,0xf9,0x00,0x02,0x11,0x00,0x08,0x00,0x19,0x4f,
0x00,0x47,0x18,0x21,0x08,0x00,0x19,0x4f,0x24,0xa3,0x00,0x50,0x27,0xbd,0xff,0xc8,
0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x30,
0xaf,0xb7,0x00,0x2c,0xaf,0xb6,0x00,0x28,0xaf,0xb5,0x00,0x24,0xaf,0xb4,0x00,0x20,
0xaf,0xb0,0x00,0x10,0x00,0x80,0x88,0x21,0x84,0x84,0x00,0x08,0x3c,0x05,0xb0,0x03,
0x3c,0x02,0x80,0x00,0x34,0xa5,0x00,0x20,0x24,0x42,0x65,0x6c,0x3c,0x03,0xb0,0x06,
0x00,0x04,0x20,0x80,0xac,0xa2,0x00,0x00,0x00,0x83,0x20,0x21,0x3c,0x06,0xb0,0x06,
0x8c,0x82,0x00,0x00,0x34,0xc6,0x80,0x24,0x8c,0x88,0x00,0x00,0x8c,0xc4,0x00,0x00,
0x96,0x25,0x00,0x08,0x30,0x52,0xff,0xff,0x00,0x08,0x44,0x02,0x34,0x84,0x01,0x00,
0x3c,0x02,0xb0,0x00,0x00,0x08,0x18,0xc0,0x00,0x12,0x3a,0x00,0xac,0xc4,0x00,0x00,
0x00,0xe2,0x38,0x21,0xae,0x32,0x02,0xb8,0x00,0x68,0x18,0x21,0x24,0xa5,0x00,0x02,
0x8c,0xf6,0x00,0x00,0x30,0xa5,0x01,0xff,0x8c,0xf4,0x00,0x04,0x27,0x86,0x90,0x00,
0x00,0x03,0x18,0x80,0x00,0x12,0x98,0xc0,0xa6,0x25,0x00,0x08,0x00,0x66,0x18,0x21,
0x02,0x72,0x10,0x21,0x94,0x65,0x00,0x00,0x00,0x02,0x48,0x80,0x01,0x26,0x30,0x21,
0x24,0x02,0xff,0xff,0x00,0x14,0x1a,0x02,0x27,0x84,0x90,0x10,0xa4,0xc2,0x00,0x02,
0x30,0x63,0x00,0x1f,0x24,0x02,0x00,0x10,0x01,0x24,0x20,0x21,0xa4,0xc8,0x00,0x04,
0x8c,0xf0,0x00,0x08,0xa6,0x23,0x00,0x06,0xa6,0x25,0x00,0x0a,0xa0,0x82,0x00,0x06,
0x86,0x25,0x00,0x06,0x27,0x82,0x90,0x04,0x01,0x22,0x10,0x21,0x24,0x03,0x00,0x13,
0x10,0xa3,0x00,0xee,0xac,0x47,0x00,0x18,0x3c,0x03,0xb0,0x03,0x34,0x63,0x01,0x00,
0xa6,0x20,0x00,0x02,0x3c,0x02,0xb0,0x03,0x90,0x64,0x00,0x00,0x34,0x42,0x01,0x08,
0x8c,0x45,0x00,0x00,0x00,0x10,0x1b,0xc2,0x00,0x04,0x20,0x82,0x30,0x63,0x00,0x01,
0xac,0xc5,0x00,0x08,0x10,0x60,0x00,0xc7,0x30,0x97,0x00,0x01,0x00,0x10,0x16,0x82,
0x30,0x46,0x00,0x01,0x00,0x10,0x12,0x02,0x00,0x10,0x19,0xc2,0x00,0x10,0x26,0x02,
0x00,0x10,0x2e,0x42,0x30,0x48,0x00,0x7f,0x24,0x02,0x00,0x01,0x30,0x75,0x00,0x01,
0x30,0x84,0x00,0x01,0x10,0xc2,0x00,0xb3,0x30,0xa3,0x00,0x01,0x00,0x60,0x28,0x21,
0x0c,0x00,0x19,0x42,0x01,0x00,0x38,0x21,0x02,0x72,0x18,0x21,0x00,0x03,0x18,0x80,
0x2c,0x46,0x00,0x54,0x27,0x85,0x90,0x10,0x27,0x84,0x90,0x08,0x00,0x06,0x10,0x0a,
0x00,0x65,0x28,0x21,0x26,0xa6,0x00,0x02,0x00,0x64,0x18,0x21,0xa0,0xa2,0x00,0x02,
0xa0,0x66,0x00,0x06,0xa0,0x62,0x00,0x07,0xa0,0xa2,0x00,0x01,0x02,0x72,0x28,0x21,
0x00,0x05,0x28,0x80,0x27,0x82,0x90,0x04,0x00,0xa2,0x58,0x21,0x8d,0x64,0x00,0x18,
0x00,0x10,0x15,0xc2,0x30,0x42,0x00,0x01,0x8c,0x83,0x00,0x0c,0x27,0x84,0x90,0x20,
0x00,0xa4,0x48,0x21,0xa6,0x22,0x00,0x00,0xa6,0x36,0x00,0x04,0x8d,0x26,0x00,0x00,
0x00,0x03,0x19,0x42,0x3c,0x02,0xff,0xef,0x34,0x42,0xff,0xff,0x30,0x63,0x00,0x01,
0x00,0xc2,0x40,0x24,0x00,0x03,0x1d,0x00,0x01,0x03,0x40,0x25,0x00,0x08,0x15,0x02,
0x00,0x14,0x19,0x82,0x00,0x14,0x25,0x82,0x00,0x10,0x34,0x42,0x00,0x10,0x3c,0x82,
0x00,0x10,0x2c,0x02,0x30,0x42,0x00,0x01,0x30,0xcd,0x00,0x01,0x30,0x6c,0x00,0x01,
0x30,0xe6,0x00,0x01,0x30,0x8a,0x00,0x03,0x32,0x94,0x00,0x07,0x30,0xa5,0x00,0x01,
0xad,0x28,0x00,0x00,0x10,0x40,0x00,0x0b,0x32,0x07,0x00,0x7f,0x8d,0x64,0x00,0x18,
0x3c,0x03,0xff,0xf0,0x34,0x63,0xff,0xff,0x8c,0x82,0x00,0x0c,0x01,0x03,0x18,0x24,
0x00,0x02,0x13,0x82,0x30,0x42,0x00,0x0f,0x00,0x02,0x14,0x00,0x00,0x62,0x18,0x25,
0xad,0x23,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xc2,0x00,0x6a,0x00,0x00,0x00,0x00,
0x15,0x80,0x00,0x03,0x00,0x00,0x00,0x00,0x15,0x40,0x00,0x5b,0x24,0x02,0x00,0x01,
0x96,0x22,0x00,0x04,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x04,0xa6,0x22,0x00,0x04,
0x00,0xa0,0x20,0x21,0x0c,0x00,0x19,0x42,0x01,0xa0,0x28,0x21,0x02,0x72,0x18,0x21,
0x00,0x03,0x40,0x80,0x2c,0x45,0x00,0x54,0x27,0x84,0x90,0x10,0x01,0x04,0x20,0x21,
0x00,0x05,0x10,0x0a,0xa0,0x82,0x00,0x00,0xa0,0x80,0x00,0x04,0xa0,0x80,0x00,0x05,
0x96,0x23,0x00,0x04,0x27,0x82,0x90,0x00,0x01,0x02,0x10,0x21,0xa4,0x43,0x00,0x06,
0x27,0x82,0x90,0x04,0x92,0x26,0x00,0x01,0x01,0x02,0x10,0x21,0x8c,0x45,0x00,0x18,
0x27,0x83,0x90,0x20,0x01,0x03,0x18,0x21,0xa0,0x60,0x00,0x00,0xa0,0x86,0x00,0x07,
0x94,0xa2,0x00,0x10,0x24,0x03,0x00,0x04,0x30,0x42,0x00,0x0f,0x10,0x43,0x00,0x36,
0x24,0xa5,0x00,0x10,0x94,0xa3,0x00,0x16,0x27,0x87,0x90,0x18,0x01,0x07,0x10,0x21,
0xa4,0x43,0x00,0x02,0x94,0xa2,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,
0x14,0x40,0x00,0x24,0x02,0x72,0x20,0x21,0x94,0xa2,0x00,0x00,0x24,0x03,0x00,0xa4,
0x30,0x42,0x00,0xff,0x10,0x43,0x00,0x1f,0x00,0x00,0x00,0x00,0x94,0xa2,0x00,0x00,
0x24,0x03,0x00,0x88,0x30,0x42,0x00,0x88,0x10,0x43,0x00,0x14,0x02,0x72,0x18,0x21,
0x27,0x84,0x90,0x20,0x00,0x03,0x18,0x80,0x00,0x64,0x18,0x21,0x8c,0x62,0x00,0x00,
0x3c,0x04,0x00,0x80,0x00,0x44,0x10,0x25,0xac,0x62,0x00,0x00,0x02,0x72,0x10,0x21,
0x00,0x02,0x10,0x80,0x00,0x47,0x10,0x21,0xa0,0x54,0x00,0x00,0x8f,0xbf,0x00,0x30,
0x7b,0xb6,0x01,0x7c,0x7b,0xb4,0x01,0x3c,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,
0x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0x94,0xa2,0x00,0x18,
0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x60,0x10,0x40,0xff,0xe9,0x02,0x72,0x18,0x21,
0x02,0x72,0x20,0x21,0x27,0x82,0x90,0x20,0x00,0x04,0x20,0x80,0x00,0x82,0x20,0x21,
0x8c,0x83,0x00,0x00,0x3c,0x02,0xff,0x7f,0x34,0x42,0xff,0xff,0x00,0x62,0x18,0x24,
0x08,0x00,0x1a,0x37,0xac,0x83,0x00,0x00,0x27,0x87,0x90,0x18,0x01,0x07,0x10,0x21,
0x08,0x00,0x1a,0x21,0xa4,0x40,0x00,0x02,0x11,0x42,0x00,0x07,0x00,0x00,0x00,0x00,
0x2d,0x42,0x00,0x02,0x14,0x40,0xff,0xa7,0x00,0xa0,0x20,0x21,0x96,0x22,0x00,0x04,
0x08,0x00,0x19,0xff,0x24,0x42,0x00,0x0c,0x96,0x22,0x00,0x04,0x08,0x00,0x19,0xff,
0x24,0x42,0x00,0x08,0x16,0xe6,0xff,0x96,0x3c,0x02,0xff,0xfb,0x8d,0x63,0x00,0x18,
0x34,0x42,0xff,0xff,0x02,0x02,0x10,0x24,0xac,0x62,0x00,0x08,0x08,0x00,0x19,0xf8,
0x00,0x00,0x30,0x21,0x16,0xe6,0xff,0x4e,0x00,0x60,0x28,0x21,0x3c,0x02,0xfb,0xff,
0x34,0x42,0xff,0xff,0x02,0x02,0x10,0x24,0xac,0xe2,0x00,0x08,0x08,0x00,0x19,0xb7,
0x00,0x00,0x30,0x21,0x93,0x87,0xbb,0x14,0x00,0x10,0x1e,0x42,0x00,0x10,0x26,0x82,
0x27,0x82,0x90,0x08,0x2c,0xe5,0x00,0x0c,0x01,0x22,0x48,0x21,0x30,0x63,0x00,0x01,
0x30,0x86,0x00,0x01,0x14,0xa0,0x00,0x06,0x00,0xe0,0x40,0x21,0x00,0x03,0x10,0x40,
0x00,0x46,0x10,0x21,0x00,0x02,0x11,0x00,0x00,0xe2,0x10,0x21,0x24,0x48,0x00,0x04,
0x02,0x72,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x84,0x90,0x10,0x27,0x83,0x90,0x08,
0x00,0x44,0x20,0x21,0x00,0x43,0x10,0x21,0xa1,0x28,0x00,0x07,0xa0,0x40,0x00,0x06,
0xa0,0x80,0x00,0x02,0x08,0x00,0x19,0xc7,0xa0,0x80,0x00,0x01,0x24,0x02,0x00,0x01,
0xa6,0x22,0x00,0x02,0x0c,0x00,0x01,0xc2,0x00,0xe0,0x20,0x21,0x08,0x00,0x1a,0x3b,
0x00,0x00,0x00,0x00,0x30,0xa7,0xff,0xff,0x00,0x07,0x18,0xc0,0x00,0x67,0x18,0x21,
0x3c,0x06,0xb0,0x03,0x3c,0x02,0x80,0x00,0x24,0x42,0x6a,0x44,0x27,0x85,0x90,0x10,
0x00,0x03,0x18,0x80,0x34,0xc6,0x00,0x20,0x00,0x65,0x18,0x21,0xac,0xc2,0x00,0x00,
0x80,0x62,0x00,0x07,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x29,0x00,0x80,0x28,0x21,
0x90,0x82,0x00,0x16,0x00,0x00,0x00,0x00,0x34,0x42,0x00,0x02,0x30,0x43,0x00,0x01,
0x14,0x60,0x00,0x02,0xa0,0x82,0x00,0x16,0xa0,0x80,0x00,0x17,0x90,0xa2,0x00,0x04,
0x3c,0x03,0xb0,0x03,0x27,0x86,0x90,0x00,0x14,0x40,0x00,0x06,0x34,0x63,0x00,0x20,
0x24,0x02,0x00,0x01,0xa0,0xa2,0x00,0x04,0xa4,0xa7,0x00,0x02,0x03,0xe0,0x00,0x08,
0xa4,0xa7,0x00,0x00,0x94,0xa4,0x00,0x02,0x3c,0x02,0x80,0x01,0x24,0x42,0x82,0x6c,
0xac,0x62,0x00,0x00,0x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,
0x00,0x66,0x18,0x21,0x94,0x62,0x00,0x04,0xa4,0x67,0x00,0x02,0x3c,0x03,0xb0,0x08,
0x00,0x02,0x20,0xc0,0x00,0x82,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x46,0x10,0x21,
0x00,0x83,0x20,0x21,0xa4,0x47,0x00,0x00,0xac,0x87,0x00,0x00,0x90,0xa2,0x00,0x04,
0xa4,0xa7,0x00,0x02,0x24,0x42,0x00,0x01,0x03,0xe0,0x00,0x08,0xa0,0xa2,0x00,0x04,
0x90,0x82,0x00,0x16,0x24,0x85,0x00,0x06,0x34,0x42,0x00,0x01,0x30,0x43,0x00,0x02,
0x14,0x60,0xff,0xda,0xa0,0x82,0x00,0x16,0x24,0x02,0x00,0x01,0x08,0x00,0x1a,0xa7,
0xa0,0x82,0x00,0x17,0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,0x00,0x80,0x38,0x21,
0x84,0x84,0x00,0x02,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x3c,0x0a,0xb0,0x06,
0x34,0x63,0x00,0x20,0x24,0x42,0x6b,0x44,0x3c,0x0b,0xb0,0x08,0x27,0x89,0x90,0x00,
0x34,0x0c,0xff,0xff,0x35,0x4a,0x80,0x20,0x10,0x80,0x00,0x30,0xac,0x62,0x00,0x00,
0x97,0x82,0x8f,0xf0,0x94,0xe6,0x02,0xba,0x00,0x02,0x18,0xc0,0x00,0x6b,0x28,0x21,
0xac,0xa6,0x00,0x00,0x8c,0xe4,0x02,0xb8,0x00,0x62,0x18,0x21,0x00,0x03,0x18,0x80,
0x00,0x04,0x10,0xc0,0x00,0x44,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x49,0x10,0x21,
0x94,0x48,0x00,0x04,0x00,0x69,0x18,0x21,0xa4,0x66,0x00,0x00,0x00,0x08,0x28,0xc0,
0x00,0xab,0x10,0x21,0xac,0x4c,0x00,0x00,0x8c,0xe4,0x02,0xb8,0x27,0x82,0x90,0x04,
0x00,0xa8,0x28,0x21,0x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,
0x00,0x62,0x10,0x21,0x8c,0x46,0x00,0x18,0x27,0x84,0x90,0x10,0x00,0x64,0x18,0x21,
0x8c,0xc2,0x00,0x00,0x80,0x67,0x00,0x06,0x00,0x05,0x28,0x80,0x30,0x42,0xff,0xff,
0x00,0x47,0x10,0x21,0x30,0x43,0x00,0xff,0x00,0x03,0x18,0x2b,0x00,0x02,0x12,0x02,
0x00,0x43,0x10,0x21,0x3c,0x04,0x00,0x04,0x00,0xa9,0x28,0x21,0x00,0x44,0x10,0x25,
0xa4,0xac,0x00,0x00,0xad,0x42,0x00,0x00,0xa7,0x88,0x8f,0xf0,0x8f,0xbf,0x00,0x10,
0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x84,0xe3,0x00,0x06,
0x27,0x82,0xb4,0x00,0x94,0xe5,0x02,0xba,0x00,0x03,0x18,0x80,0x00,0x62,0x18,0x21,
0x8c,0x64,0x00,0x00,0x0c,0x00,0x1a,0x91,0x00,0x00,0x00,0x00,0x08,0x00,0x1b,0x0b,
0x00,0x00,0x00,0x00,0x94,0x88,0x00,0x00,0x00,0x80,0x58,0x21,0x27,0x8a,0x90,0x00,
0x00,0x08,0x18,0xc0,0x00,0x68,0x18,0x21,0x3c,0x04,0xb0,0x03,0x00,0x03,0x18,0x80,
0x3c,0x02,0x80,0x00,0x00,0x6a,0x18,0x21,0x34,0x84,0x00,0x20,0x24,0x42,0x6c,0x64,
0x30,0xa5,0xff,0xff,0xac,0x82,0x00,0x00,0x94,0x67,0x00,0x02,0x11,0x05,0x00,0x35,
0x24,0x04,0x00,0x01,0x91,0x66,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x86,0x10,0x2a,
0x10,0x40,0x00,0x10,0x00,0xc0,0x48,0x21,0x3c,0x0d,0xb0,0x03,0x01,0x40,0x60,0x21,
0x35,0xad,0x00,0x20,0x10,0xe5,0x00,0x0d,0x24,0x84,0x00,0x01,0x00,0x07,0x10,0xc0,
0x00,0x47,0x10,0x21,0x00,0x02,0x10,0x80,0x01,0x20,0x30,0x21,0x00,0x4a,0x10,0x21,
0x00,0x86,0x18,0x2a,0x00,0xe0,0x40,0x21,0x94,0x47,0x00,0x02,0x14,0x60,0xff,0xf5,
0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x10,0x21,0x00,0x08,0x20,0xc0,
0x00,0x88,0x20,0x21,0x24,0xc2,0xff,0xff,0x00,0x04,0x20,0x80,0xa1,0x62,0x00,0x04,
0x00,0x8c,0x20,0x21,0x94,0x83,0x00,0x04,0x00,0x07,0x10,0xc0,0x00,0x47,0x10,0x21,
0x00,0x02,0x10,0x80,0x00,0x4c,0x10,0x21,0x00,0x03,0x28,0xc0,0x94,0x46,0x00,0x02,
0x00,0xa3,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x6c,0x18,0x21,0xa4,0x66,0x00,0x00,
0xa4,0x86,0x00,0x02,0x95,0x64,0x00,0x02,0x3c,0x03,0xb0,0x08,0x3c,0x02,0x80,0x01,
0x00,0xa3,0x28,0x21,0x24,0x42,0x82,0x6c,0xad,0xa2,0x00,0x00,0x10,0x87,0x00,0x03,
0xac,0xa6,0x00,0x00,0x03,0xe0,0x00,0x08,0x24,0x02,0x00,0x01,0x08,0x00,0x1b,0x59,
0xa5,0x68,0x00,0x02,0x91,0x62,0x00,0x04,0xa5,0x67,0x00,0x00,0x24,0x42,0xff,0xff,
0x30,0x43,0x00,0xff,0x14,0x60,0xff,0xf7,0xa1,0x62,0x00,0x04,0x24,0x02,0xff,0xff,
0x08,0x00,0x1b,0x59,0xa5,0x62,0x00,0x02,0x00,0x05,0x40,0xc0,0x01,0x05,0x30,0x21,
0x27,0xbd,0xff,0xd8,0x00,0x06,0x30,0x80,0x27,0x82,0x90,0x04,0xaf,0xb2,0x00,0x18,
0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x20,0xaf,0xb3,0x00,0x1c,0xaf,0xb0,0x00,0x10,
0x00,0xc2,0x10,0x21,0x8c,0x47,0x00,0x18,0x00,0xa0,0x90,0x21,0x3c,0x02,0x80,0x00,
0x3c,0x05,0xb0,0x03,0x34,0xa5,0x00,0x20,0x24,0x42,0x6d,0x98,0xac,0xa2,0x00,0x00,
0x27,0x83,0x90,0x10,0x00,0xc3,0x30,0x21,0x8c,0xe2,0x00,0x00,0x80,0xc5,0x00,0x06,
0x00,0x80,0x88,0x21,0x30,0x42,0xff,0xff,0x00,0x45,0x10,0x21,0x30,0x43,0x00,0xff,
0x10,0x60,0x00,0x02,0x00,0x02,0x12,0x02,0x24,0x42,0x00,0x01,0x30,0x53,0x00,0xff,
0x01,0x12,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,
0x80,0x44,0x00,0x07,0x00,0x00,0x00,0x00,0x10,0x80,0x00,0x4b,0x26,0x24,0x00,0x06,
0x32,0x50,0xff,0xff,0x02,0x20,0x20,0x21,0x0c,0x00,0x1b,0x19,0x02,0x00,0x28,0x21,
0x92,0x22,0x00,0x10,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x2e,0x3c,0x03,0xb0,0x08,
0x3c,0x09,0x80,0x01,0x27,0x88,0x90,0x00,0xa6,0x32,0x00,0x0c,0x00,0x10,0x20,0xc0,
0x00,0x90,0x20,0x21,0x00,0x04,0x20,0x80,0x00,0x88,0x20,0x21,0x94,0x82,0x00,0x04,
0x3c,0x03,0xb0,0x08,0x3c,0x07,0xb0,0x03,0x00,0x02,0x28,0xc0,0x00,0xa2,0x10,0x21,
0x00,0x02,0x10,0x80,0x00,0x48,0x10,0x21,0x00,0xa3,0x28,0x21,0x25,0x26,0x82,0x6c,
0x34,0x03,0xff,0xff,0x34,0xe7,0x00,0x20,0xac,0xe6,0x00,0x00,0xa4,0x83,0x00,0x02,
0xa4,0x43,0x00,0x00,0xac,0xa3,0x00,0x00,0x92,0x22,0x00,0x10,0x92,0x23,0x00,0x0a,
0xa6,0x32,0x00,0x0e,0x02,0x62,0x10,0x21,0x14,0x60,0x00,0x05,0xa2,0x22,0x00,0x10,
0x92,0x22,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfe,0xa2,0x22,0x00,0x16,
0x92,0x22,0x00,0x04,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x05,0x00,0x00,0x00,0x00,
0x92,0x22,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfd,0xa2,0x22,0x00,0x16,
0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
0x27,0xbd,0x00,0x28,0x96,0x22,0x00,0x0e,0x27,0x88,0x90,0x00,0x00,0x02,0x20,0xc0,
0x00,0x82,0x20,0x21,0x00,0x04,0x20,0x80,0x00,0x88,0x20,0x21,0x94,0x82,0x00,0x04,
0x3c,0x06,0xb0,0x03,0x3c,0x09,0x80,0x01,0x00,0x02,0x28,0xc0,0x00,0xa2,0x10,0x21,
0x00,0x02,0x10,0x80,0x00,0xa3,0x28,0x21,0x00,0x48,0x10,0x21,0x34,0xc6,0x00,0x20,
0x25,0x23,0x82,0x6c,0xac,0xc3,0x00,0x00,0xa4,0x50,0x00,0x00,0xac,0xb0,0x00,0x00,
0x08,0x00,0x1b,0x97,0xa4,0x90,0x00,0x02,0x08,0x00,0x1b,0x8e,0x32,0x50,0xff,0xff,
0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x24,0x42,0x6f,0x60,0x34,0x63,0x00,0x20,
0xac,0x62,0x00,0x00,0x90,0x82,0x00,0x04,0x97,0xaa,0x00,0x12,0x00,0x80,0x60,0x21,
0x30,0xa8,0xff,0xff,0x00,0x4a,0x20,0x23,0x34,0x09,0xff,0xff,0x30,0xcf,0xff,0xff,
0x30,0xee,0xff,0xff,0x11,0x09,0x00,0x73,0xa1,0x84,0x00,0x04,0x00,0x0e,0xc0,0xc0,
0x00,0x08,0x10,0xc0,0x00,0x48,0x10,0x21,0x03,0x0e,0x20,0x21,0x27,0x8d,0x90,0x00,
0x00,0x04,0x20,0x80,0x00,0x02,0x10,0x80,0x00,0x4d,0x10,0x21,0x00,0x8d,0x20,0x21,
0x94,0x86,0x00,0x02,0x94,0x43,0x00,0x04,0x3c,0x19,0x80,0x01,0xa4,0x46,0x00,0x02,
0x00,0x03,0x28,0xc0,0x00,0xa3,0x18,0x21,0x94,0x87,0x00,0x02,0x3c,0x02,0xb0,0x08,
0x00,0x03,0x18,0x80,0x00,0xa2,0x28,0x21,0x00,0x6d,0x18,0x21,0x27,0x22,0x82,0x6c,
0x3c,0x01,0xb0,0x03,0xac,0x22,0x00,0x20,0xa4,0x66,0x00,0x00,0x10,0xe9,0x00,0x57,
0xac,0xa6,0x00,0x00,0x01,0xe0,0x30,0x21,0x11,0x40,0x00,0x1d,0x00,0x00,0x48,0x21,
0x01,0x40,0x38,0x21,0x27,0x8b,0x90,0x04,0x27,0x8a,0x90,0x10,0x00,0x06,0x40,0xc0,
0x01,0x06,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x6b,0x10,0x21,0x8c,0x44,0x00,0x18,
0x00,0x6a,0x18,0x21,0x80,0x65,0x00,0x06,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
0x30,0x42,0xff,0xff,0x00,0x45,0x10,0x21,0x30,0x44,0x00,0xff,0x00,0x02,0x12,0x02,
0x01,0x22,0x18,0x21,0x24,0x62,0x00,0x01,0x14,0x80,0x00,0x02,0x30,0x49,0x00,0xff,
0x30,0x69,0x00,0xff,0x01,0x06,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x4d,0x10,0x21,
0x24,0xe7,0xff,0xff,0x94,0x46,0x00,0x02,0x14,0xe0,0xff,0xe9,0x00,0x06,0x40,0xc0,
0x91,0x82,0x00,0x10,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x20,0x3c,0x06,0xb0,0x03,
0xa5,0x8f,0x00,0x0c,0x03,0x0e,0x20,0x21,0x00,0x04,0x20,0x80,0x00,0x8d,0x20,0x21,
0x94,0x82,0x00,0x04,0x3c,0x03,0xb0,0x08,0x3c,0x07,0xb0,0x03,0x00,0x02,0x28,0xc0,
0x00,0xa2,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x4d,0x10,0x21,0x00,0xa3,0x28,0x21,
0x27,0x26,0x82,0x6c,0x34,0x03,0xff,0xff,0x34,0xe7,0x00,0x20,0xac,0xe6,0x00,0x00,
0xa4,0x83,0x00,0x02,0xa4,0x43,0x00,0x00,0xac,0xa3,0x00,0x00,0x91,0x82,0x00,0x10,
0x91,0x83,0x00,0x04,0xa5,0x8e,0x00,0x0e,0x01,0x22,0x10,0x21,0x14,0x60,0x00,0x05,
0xa1,0x82,0x00,0x10,0x91,0x82,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfd,
0xa1,0x82,0x00,0x16,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x95,0x82,0x00,0x0e,
0x3c,0x03,0xb0,0x08,0x00,0x02,0x20,0xc0,0x00,0x82,0x20,0x21,0x00,0x04,0x20,0x80,
0x00,0x8d,0x20,0x21,0x94,0x82,0x00,0x04,0x34,0xc6,0x00,0x20,0x27,0x27,0x82,0x6c,
0x00,0x02,0x28,0xc0,0x00,0xa2,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0xa3,0x28,0x21,
0x00,0x4d,0x10,0x21,0xac,0xc7,0x00,0x00,0xa4,0x8f,0x00,0x02,0xa4,0x4f,0x00,0x00,
0xac,0xaf,0x00,0x00,0x08,0x00,0x1c,0x26,0x03,0x0e,0x20,0x21,0x08,0x00,0x1c,0x01,
0xa5,0x88,0x00,0x02,0x00,0x0e,0xc0,0xc0,0x03,0x0e,0x10,0x21,0x00,0x02,0x10,0x80,
0x27,0x8d,0x90,0x00,0x00,0x4d,0x10,0x21,0x94,0x43,0x00,0x02,0x30,0x84,0x00,0xff,
0x14,0x80,0x00,0x05,0xa5,0x83,0x00,0x00,0x24,0x02,0xff,0xff,0x3c,0x19,0x80,0x01,
0x08,0x00,0x1c,0x01,0xa5,0x82,0x00,0x02,0x08,0x00,0x1c,0x01,0x3c,0x19,0x80,0x01,
0x3c,0x08,0xb0,0x03,0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0x78,0x35,0x08,0x00,0x20,
0x24,0x42,0x71,0xa0,0xaf,0xb2,0x00,0x68,0xaf,0xb1,0x00,0x64,0xaf,0xb0,0x00,0x60,
0xad,0x02,0x00,0x00,0xaf,0xbf,0x00,0x84,0xaf,0xbe,0x00,0x80,0xaf,0xb7,0x00,0x7c,
0xaf,0xb6,0x00,0x78,0xaf,0xb5,0x00,0x74,0xaf,0xb4,0x00,0x70,0xaf,0xb3,0x00,0x6c,
0xaf,0xa4,0x00,0x88,0x90,0x83,0x00,0x0a,0x27,0x82,0xb4,0x00,0xaf,0xa6,0x00,0x90,
0x00,0x03,0x18,0x80,0x00,0x62,0x18,0x21,0x8c,0x63,0x00,0x00,0xaf,0xa7,0x00,0x94,
0x27,0x86,0x90,0x04,0xaf,0xa3,0x00,0x1c,0x94,0x63,0x00,0x14,0x30,0xb1,0xff,0xff,
0x24,0x08,0x00,0x01,0x00,0x03,0x20,0xc0,0xaf,0xa3,0x00,0x18,0x00,0x83,0x18,0x21,
0xaf,0xa4,0x00,0x54,0x00,0x03,0x18,0x80,0x27,0x84,0x90,0x10,0x00,0x64,0x20,0x21,
0x80,0x82,0x00,0x06,0x00,0x66,0x18,0x21,0x8c,0x66,0x00,0x18,0x24,0x42,0x00,0x02,
0x00,0x02,0x1f,0xc2,0x8c,0xc4,0x00,0x08,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,
0x00,0x02,0x10,0x40,0x00,0x04,0x2f,0xc2,0x00,0x04,0x1c,0x82,0x00,0xc2,0x38,0x21,
0x00,0x04,0x24,0x42,0x8f,0xa2,0x00,0x1c,0x30,0x63,0x00,0x01,0x30,0x84,0x00,0x01,
0xaf,0xa5,0x00,0x3c,0xaf,0xa3,0x00,0x34,0xaf,0xa4,0x00,0x38,0xaf,0xa0,0x00,0x40,
0xaf,0xa0,0x00,0x44,0xaf,0xa0,0x00,0x50,0xaf,0xa8,0x00,0x20,0x80,0x42,0x00,0x12,
0x8f,0xb2,0x00,0x18,0xaf,0xa2,0x00,0x28,0x8c,0xd0,0x00,0x0c,0x14,0xa0,0x01,0xe4,
0x00,0x60,0x30,0x21,0x00,0x10,0x10,0x82,0x30,0x45,0x00,0x07,0x10,0xa0,0x00,0x11,
0xaf,0xa0,0x00,0x30,0x8f,0xa4,0x00,0x98,0x27,0x82,0x80,0x1c,0x00,0x04,0x18,0x40,
0x00,0x62,0x18,0x21,0x24,0xa2,0x00,0x06,0x8f,0xa5,0x00,0x20,0x94,0x64,0x00,0x00,
0x00,0x45,0x10,0x04,0x00,0x44,0x00,0x1a,0x14,0x80,0x00,0x02,0x00,0x00,0x00,0x00,
0x00,0x07,0x00,0x0d,0x00,0x00,0x10,0x12,0x24,0x42,0x00,0x20,0x30,0x42,0xff,0xfc,
0xaf,0xa2,0x00,0x30,0x8f,0xa3,0x00,0x18,0x8f,0xa4,0x00,0x28,0x34,0x02,0xff,0xff,
0xaf,0xa0,0x00,0x2c,0xaf,0xa2,0x00,0x48,0xaf,0xa3,0x00,0x4c,0x00,0x60,0xf0,0x21,
0x00,0x00,0xb8,0x21,0x18,0x80,0x00,0x48,0xaf,0xa0,0x00,0x24,0x00,0x11,0x89,0x02,
0xaf,0xb1,0x00,0x58,0x00,0x80,0xa8,0x21,0x00,0x12,0x10,0xc0,0x00,0x52,0x18,0x21,
0x00,0x03,0x80,0x80,0x27,0x85,0x90,0x00,0x02,0x40,0x20,0x21,0x00,0x40,0xa0,0x21,
0x02,0x05,0x10,0x21,0x94,0x56,0x00,0x02,0x0c,0x00,0x12,0x8b,0x00,0x00,0x28,0x21,
0x90,0x42,0x00,0x00,0x24,0x03,0x00,0x08,0x30,0x42,0x00,0x0c,0x10,0x43,0x01,0x9e,
0x24,0x04,0x00,0x01,0x24,0x02,0x00,0x01,0x10,0x82,0x01,0x7c,0x3c,0x02,0xb0,0x03,
0x8f,0xa6,0x00,0x88,0x34,0x42,0x01,0x04,0x84,0xc5,0x00,0x0c,0x02,0x92,0x18,0x21,
0x94,0x46,0x00,0x00,0x00,0x05,0x20,0xc0,0x00,0x85,0x20,0x21,0x00,0x03,0x18,0x80,
0x27,0x82,0x90,0x10,0x27,0x85,0x90,0x08,0x00,0x65,0x28,0x21,0x00,0x62,0x18,0x21,
0x80,0x71,0x00,0x05,0x80,0x73,0x00,0x04,0x8f,0xa3,0x00,0x88,0x30,0xd0,0xff,0xff,
0x00,0x10,0x3a,0x03,0x32,0x08,0x00,0xff,0x27,0x82,0x90,0x20,0x00,0x04,0x20,0x80,
0x80,0xa6,0x00,0x06,0x00,0x82,0x20,0x21,0xa4,0x67,0x00,0x44,0xa4,0x68,0x00,0x46,
0x8c,0x84,0x00,0x00,0x38,0xc6,0x00,0x00,0x01,0x00,0x80,0x21,0x00,0x04,0x15,0x02,
0x30,0x42,0x00,0x01,0x10,0x40,0x00,0x03,0x00,0xe6,0x80,0x0a,0x00,0x04,0x14,0x02,
0x30,0x50,0x00,0x0f,0x12,0x20,0x01,0x50,0x02,0x40,0x20,0x21,0x02,0x71,0x10,0x21,
0x00,0x50,0x10,0x2a,0x14,0x40,0x00,0xed,0x02,0x92,0x10,0x21,0x93,0x82,0x8b,0x71,
0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x40,0x00,0xe0,0x02,0x92,0x28,0x21,
0x26,0xe2,0x00,0x01,0x30,0x57,0xff,0xff,0x02,0x40,0xf0,0x21,0x26,0xb5,0xff,0xff,
0x16,0xa0,0xff,0xbd,0x02,0xc0,0x90,0x21,0x16,0xe0,0x00,0xd0,0x00,0x00,0x00,0x00,
0x8f,0xa3,0x00,0x98,0x00,0x00,0x00,0x00,0x2c,0x62,0x00,0x10,0x10,0x40,0x00,0x2e,
0x00,0x00,0x00,0x00,0x8f,0xa4,0x00,0x24,0x00,0x00,0x00,0x00,0x18,0x80,0x00,0x2a,
0x24,0x03,0x00,0x01,0x8f,0xa5,0x00,0x1c,0x27,0x84,0x90,0x04,0x94,0xb2,0x00,0x14,
0xa0,0xa3,0x00,0x12,0x8f,0xa6,0x00,0x3c,0x00,0x12,0x10,0xc0,0x00,0x52,0x10,0x21,
0x00,0x02,0x80,0x80,0x27,0x82,0x90,0x10,0x02,0x02,0x10,0x21,0x80,0x43,0x00,0x06,
0x02,0x04,0x20,0x21,0x8c,0x85,0x00,0x18,0x24,0x63,0x00,0x02,0x00,0x03,0x17,0xc2,
0x00,0x62,0x18,0x21,0x00,0x03,0x18,0x43,0x00,0x03,0x18,0x40,0x14,0xc0,0x00,0x0e,
0x00,0xa3,0x38,0x21,0x27,0x82,0x90,0x00,0x02,0x02,0x10,0x21,0x94,0x43,0x00,0x06,
0x8f,0xa8,0x00,0x1c,0x24,0x02,0x00,0x01,0xa5,0x03,0x00,0x1a,0x7b,0xbe,0x04,0x3c,
0x7b,0xb6,0x03,0xfc,0x7b,0xb4,0x03,0xbc,0x7b,0xb2,0x03,0x7c,0x7b,0xb0,0x03,0x3c,
0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x88,0x8f,0xa4,0x00,0x98,0x8f,0xa5,0x00,0x38,
0x8f,0xa6,0x00,0x34,0xaf,0xa0,0x00,0x10,0x0c,0x00,0x09,0x0a,0xaf,0xa0,0x00,0x14,
0x08,0x00,0x1d,0x2d,0x00,0x00,0x00,0x00,0x8f,0xa3,0x00,0x44,0x93,0x82,0x81,0x58,
0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x61,0x30,0x69,0x00,0x03,0x8f,0xa4,0x00,0x24,
0x8f,0xa5,0x00,0x28,0x00,0x00,0x00,0x00,0x00,0x85,0x10,0x2a,0x10,0x40,0x00,0x8f,
0x00,0x00,0x00,0x00,0x8f,0xa6,0x00,0x1c,0x00,0x00,0x00,0x00,0x90,0xc4,0x00,0x04,
0x00,0x00,0x00,0x00,0x30,0x83,0x00,0xff,0x00,0xa3,0x10,0x2a,0x10,0x40,0x00,0x87,
0x00,0x00,0x00,0x00,0x8f,0xa8,0x00,0x24,0x00,0x00,0x00,0x00,0x11,0x00,0x00,0x83,
0x00,0x65,0x10,0x23,0x00,0xa8,0x18,0x23,0x00,0x62,0x10,0x2a,0x14,0x40,0x00,0x7d,
0x30,0x63,0x00,0xff,0x00,0x85,0x10,0x23,0x30,0x42,0x00,0xff,0xaf,0xa2,0x00,0x50,
0x8f,0xa2,0x00,0x50,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x73,0x00,0x00,0xa8,0x21,
0x27,0x8c,0x90,0x00,0x3c,0x0b,0x80,0xff,0x24,0x10,0x00,0x04,0x27,0x91,0x90,0x04,
0x35,0x6b,0xff,0xff,0x3c,0x0d,0x7f,0x00,0x27,0x8e,0x90,0x10,0x01,0x80,0x78,0x21,
0x00,0x12,0x30,0xc0,0x00,0xd2,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x4c,0x10,0x21,
0x94,0x42,0x00,0x06,0x8f,0xa3,0x00,0x2c,0x8f,0xa4,0x00,0x30,0xaf,0xa2,0x00,0x44,
0x8f,0xa5,0x00,0x44,0x30,0x49,0x00,0x03,0x02,0x09,0x10,0x23,0x30,0x42,0x00,0x03,
0x00,0xa2,0x10,0x21,0x8f,0xa8,0x00,0x30,0x24,0x42,0x00,0x04,0x30,0x42,0xff,0xff,
0x00,0x64,0x38,0x21,0x01,0x02,0x28,0x23,0x00,0x62,0x18,0x21,0x00,0x48,0x10,0x2b,
0x10,0x40,0x00,0x52,0x00,0x00,0x20,0x21,0x30,0xe7,0xff,0xff,0x30,0xa4,0xff,0xff,
0xaf,0xa7,0x00,0x2c,0x00,0xd2,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x51,0x18,0x21,
0x8c,0x65,0x00,0x18,0x00,0x04,0x25,0x40,0x00,0x8d,0x20,0x24,0x8c,0xa8,0x00,0x04,
0x00,0x4e,0x18,0x21,0x00,0x4f,0x50,0x21,0x01,0x0b,0x40,0x24,0x01,0x04,0x40,0x25,
0xac,0xa8,0x00,0x04,0x8f,0xa4,0x00,0x98,0x8f,0xa2,0x00,0x50,0x26,0xb5,0x00,0x01,
0xa0,0x64,0x00,0x00,0x8c,0xa4,0x00,0x08,0x00,0x00,0x00,0x00,0x04,0x81,0x00,0x0c,
0x02,0xa2,0x30,0x2a,0x80,0x62,0x00,0x06,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x02,
0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,0x00,0x02,0x10,0x40,
0x00,0xa2,0x38,0x21,0x8f,0xa5,0x00,0x40,0x00,0x00,0x00,0x00,0xa4,0xe5,0x00,0x00,
0x95,0x52,0x00,0x02,0x14,0xc0,0xff,0xc7,0x00,0x12,0x30,0xc0,0x8f,0xa4,0x00,0x24,
0x8f,0xa5,0x00,0x50,0x8f,0xa6,0x00,0x1c,0x8f,0xa3,0x00,0x2c,0x00,0x85,0x80,0x21,
0xa0,0xd0,0x00,0x12,0x00,0x09,0x10,0x23,0x30,0x42,0x00,0x03,0x8f,0xa8,0x00,0x88,
0x00,0x62,0x10,0x23,0xa4,0xc2,0x00,0x1a,0x85,0x03,0x00,0x0c,0x00,0x00,0x00,0x00,
0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x04,
0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0x83,0x00,0x04,
0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x10,0x14,0x60,0xff,0x74,0x02,0x00,0x10,0x21,
0x8f,0xa3,0x00,0x54,0x8f,0xa4,0x00,0x18,0x8f,0xa5,0x00,0x24,0x00,0x64,0x10,0x21,
0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x18,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x00,
0x10,0xa0,0x00,0x03,0x00,0x00,0x30,0x21,0x08,0x00,0x1d,0x33,0x02,0x00,0x10,0x21,
0x93,0x82,0x80,0x10,0x00,0x00,0x28,0x21,0x00,0x00,0x38,0x21,0x0c,0x00,0x21,0x9a,
0xaf,0xa2,0x00,0x10,0x08,0x00,0x1d,0x33,0x02,0x00,0x10,0x21,0x30,0x63,0xff,0xff,
0x08,0x00,0x1d,0x85,0xaf,0xa3,0x00,0x2c,0x8f,0xa8,0x00,0x44,0x08,0x00,0x1d,0xa7,
0x31,0x09,0x00,0x03,0x08,0x00,0x1d,0x60,0xaf,0xa3,0x00,0x50,0x8f,0xa6,0x00,0x44,
0xaf,0xa0,0x00,0x50,0x08,0x00,0x1d,0xa7,0x30,0xc9,0x00,0x03,0x8f,0xa5,0x00,0x48,
0x8f,0xa6,0x00,0x4c,0x8f,0xa4,0x00,0x1c,0x03,0xc0,0x38,0x21,0x0c,0x00,0x1b,0xd8,
0xaf,0xb7,0x00,0x10,0x08,0x00,0x1d,0x10,0x00,0x00,0x00,0x00,0x00,0x05,0x28,0x80,
0x27,0x82,0x90,0x00,0x00,0xa2,0x28,0x21,0x00,0x00,0x20,0x21,0x0c,0x00,0x01,0x49,
0x00,0x00,0x00,0x00,0x08,0x00,0x1d,0x09,0x26,0xe2,0x00,0x01,0x00,0x02,0x80,0x80,
0x27,0x83,0x90,0x10,0x8f,0xa4,0x00,0x1c,0x02,0x03,0x18,0x21,0x26,0x31,0x00,0x01,
0x02,0x40,0x28,0x21,0x0c,0x00,0x1e,0xea,0xa0,0x71,0x00,0x05,0x14,0x40,0xff,0x13,
0x00,0x00,0x00,0x00,0x16,0xe0,0x00,0x4d,0x03,0xc0,0x38,0x21,0x8f,0xa4,0x00,0x24,
0x8f,0xa5,0x00,0x20,0x24,0x02,0x00,0x01,0x24,0x84,0x00,0x01,0xaf,0xb2,0x00,0x48,
0xaf,0xb6,0x00,0x4c,0x02,0xc0,0xf0,0x21,0x10,0xa2,0x00,0x41,0xaf,0xa4,0x00,0x24,
0x27,0x82,0x90,0x00,0x02,0x02,0x10,0x21,0x94,0x42,0x00,0x06,0x8f,0xa4,0x00,0x30,
0xaf,0xa0,0x00,0x20,0xaf,0xa2,0x00,0x44,0x30,0x49,0x00,0x03,0x8f,0xa8,0x00,0x44,
0x00,0x09,0x10,0x23,0x30,0x42,0x00,0x03,0x01,0x02,0x10,0x21,0x24,0x42,0x00,0x04,
0x30,0x42,0xff,0xff,0x00,0x44,0x18,0x2b,0x10,0x60,0x00,0x2b,0x00,0x00,0x00,0x00,
0x8f,0xa5,0x00,0x2c,0x00,0x82,0x10,0x23,0x00,0xa4,0x18,0x21,0x30,0x63,0xff,0xff,
0x30,0x44,0xff,0xff,0xaf,0xa3,0x00,0x2c,0x02,0x92,0x28,0x21,0x00,0x05,0x28,0x80,
0x27,0x82,0x90,0x04,0x00,0xa2,0x10,0x21,0x8c,0x46,0x00,0x18,0x3c,0x03,0x80,0xff,
0x3c,0x02,0x7f,0x00,0x8c,0xc8,0x00,0x04,0x00,0x04,0x25,0x40,0x34,0x63,0xff,0xff,
0x00,0x82,0x20,0x24,0x01,0x03,0x40,0x24,0x01,0x04,0x40,0x25,0xac,0xc8,0x00,0x04,
0x8f,0xa8,0x00,0x98,0x27,0x82,0x90,0x10,0x00,0xa2,0x10,0x21,0xa0,0x48,0x00,0x00,
0x8c,0xc4,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x04,0x27,0xc2,0x10,0x80,0xfe,0xdb,
0xaf,0xa4,0x00,0x3c,0x80,0x42,0x00,0x06,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x02,
0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,0x00,0x02,0x10,0x40,
0x00,0xc2,0x38,0x21,0x8f,0xa2,0x00,0x40,0x00,0x00,0x00,0x00,0xa4,0xe2,0x00,0x00,
0x08,0x00,0x1d,0x0c,0x26,0xb5,0xff,0xff,0x8f,0xa6,0x00,0x2c,0x00,0x00,0x20,0x21,
0x00,0xc2,0x10,0x21,0x30,0x42,0xff,0xff,0x08,0x00,0x1e,0x1a,0xaf,0xa2,0x00,0x2c,
0x8f,0xa6,0x00,0x1c,0x08,0x00,0x1e,0x04,0xa4,0xd2,0x00,0x14,0x8f,0xa5,0x00,0x48,
0x8f,0xa6,0x00,0x4c,0x8f,0xa4,0x00,0x1c,0x0c,0x00,0x1b,0xd8,0xaf,0xb7,0x00,0x10,
0x08,0x00,0x1d,0xfb,0x00,0x00,0xb8,0x21,0x0c,0x00,0x12,0x8b,0x00,0x00,0x28,0x21,
0x00,0x40,0x18,0x21,0x94,0x42,0x00,0x00,0x00,0x00,0x00,0x00,0x34,0x42,0x08,0x00,
0xa4,0x62,0x00,0x00,0x08,0x00,0x1d,0x00,0x02,0x71,0x10,0x21,0x02,0x92,0x18,0x21,
0x00,0x03,0x80,0x80,0x27,0x82,0x90,0x04,0x02,0x02,0x10,0x21,0x8c,0x44,0x00,0x18,
0x00,0x00,0x00,0x00,0x8c,0x83,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x10,
0x10,0x60,0x00,0x09,0x24,0x06,0x00,0x01,0x93,0x82,0x8b,0x71,0x00,0x00,0x00,0x00,
0x30,0x42,0x00,0x01,0x10,0x40,0xfe,0xa2,0x3c,0x04,0x00,0x80,0x27,0x85,0x90,0x00,
0x08,0x00,0x1d,0xeb,0x02,0x05,0x28,0x21,0x27,0x83,0x90,0x18,0x27,0x82,0x90,0x10,
0x02,0x03,0x18,0x21,0x02,0x02,0x10,0x21,0x90,0x64,0x00,0x00,0x90,0x45,0x00,0x05,
0x93,0x83,0x80,0x10,0x00,0x00,0x38,0x21,0x0c,0x00,0x21,0x9a,0xaf,0xa3,0x00,0x10,
0x08,0x00,0x1e,0x62,0x00,0x00,0x00,0x00,0x27,0x82,0x90,0x18,0x02,0x02,0x10,0x21,
0x94,0x43,0x00,0x02,0x8f,0xa6,0x00,0x58,0x00,0x03,0x19,0x02,0x00,0x66,0x18,0x23,
0x30,0x63,0x0f,0xff,0x28,0x62,0x00,0x20,0x10,0x40,0x00,0x06,0x28,0x62,0x00,0x40,
0x8f,0xa8,0x00,0x90,0x00,0x00,0x00,0x00,0x00,0x68,0x10,0x06,0x08,0x00,0x1c,0xd9,
0x30,0x44,0x00,0x01,0x10,0x40,0x00,0x04,0x00,0x00,0x00,0x00,0x8f,0xa4,0x00,0x94,
0x08,0x00,0x1e,0x83,0x00,0x64,0x10,0x06,0x08,0x00,0x1c,0xd9,0x00,0x00,0x20,0x21,
0x8f,0xa4,0x00,0x98,0x8f,0xa5,0x00,0x38,0xaf,0xa0,0x00,0x10,0x0c,0x00,0x09,0x0a,
0xaf,0xa8,0x00,0x14,0x30,0x42,0xff,0xff,0x08,0x00,0x1c,0xa9,0xaf,0xa2,0x00,0x40,
0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x00,0x27,0xbd,0xff,0xe0,0x34,0x42,0x00,0x20,
0x24,0x63,0x7a,0x50,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x18,
0xac,0x43,0x00,0x00,0x90,0x82,0x00,0x0a,0x00,0x80,0x80,0x21,0x14,0x40,0x00,0x45,
0x00,0x00,0x88,0x21,0x92,0x02,0x00,0x04,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x3c,
0x00,0x00,0x00,0x00,0x12,0x20,0x00,0x18,0x00,0x00,0x00,0x00,0x92,0x02,0x00,0x16,
0x92,0x05,0x00,0x0a,0x30,0x42,0x00,0xfc,0x10,0xa0,0x00,0x03,0xa2,0x02,0x00,0x16,
0x34,0x42,0x00,0x01,0xa2,0x02,0x00,0x16,0x92,0x04,0x00,0x04,0x00,0x00,0x00,0x00,
0x30,0x83,0x00,0xff,0x10,0x60,0x00,0x05,0x00,0x00,0x00,0x00,0x92,0x02,0x00,0x16,
0x00,0x00,0x00,0x00,0x34,0x42,0x00,0x02,0xa2,0x02,0x00,0x16,0x10,0x60,0x00,0x0a,
0x00,0x00,0x00,0x00,0x14,0xa0,0x00,0x08,0x00,0x00,0x00,0x00,0x96,0x02,0x00,0x00,
0xa2,0x00,0x00,0x17,0xa6,0x02,0x00,0x14,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,
0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x14,0x80,0x00,0x05,0x24,0x02,0x00,0x01,
0x96,0x03,0x00,0x06,0xa2,0x02,0x00,0x17,0x08,0x00,0x1e,0xbe,0xa6,0x03,0x00,0x14,
0x96,0x04,0x00,0x00,0x96,0x05,0x00,0x06,0x27,0x86,0x90,0x00,0x00,0x04,0x10,0xc0,
0x00,0x05,0x18,0xc0,0x00,0x44,0x10,0x21,0x00,0x65,0x18,0x21,0x00,0x02,0x10,0x80,
0x00,0x03,0x18,0x80,0x00,0x66,0x18,0x21,0x00,0x46,0x10,0x21,0x8c,0x65,0x00,0x08,
0x8c,0x44,0x00,0x08,0x0c,0x00,0x12,0x7c,0x00,0x00,0x00,0x00,0x30,0x43,0x00,0xff,
0x10,0x60,0x00,0x04,0xa2,0x02,0x00,0x17,0x96,0x02,0x00,0x06,0x08,0x00,0x1e,0xbe,
0xa6,0x02,0x00,0x14,0x96,0x02,0x00,0x00,0x08,0x00,0x1e,0xbe,0xa6,0x02,0x00,0x14,
0x96,0x05,0x00,0x00,0x0c,0x00,0x1e,0xea,0x02,0x00,0x20,0x21,0x08,0x00,0x1e,0xa5,
0x02,0x22,0x88,0x21,0x94,0x85,0x00,0x06,0x0c,0x00,0x1e,0xea,0x00,0x00,0x00,0x00,
0x08,0x00,0x1e,0xa1,0x00,0x40,0x88,0x21,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
0x34,0x63,0x00,0x20,0x24,0x42,0x7b,0xa8,0x27,0xbd,0xff,0xf0,0xac,0x62,0x00,0x00,
0x00,0x00,0x10,0x21,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x10,0x3c,0x03,0xb0,0x03,
0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x7b,0xcc,0xac,0x62,0x00,0x00,
0x90,0x89,0x00,0x0a,0x00,0x80,0x30,0x21,0x11,0x20,0x00,0x05,0x00,0xa0,0x50,0x21,
0x90,0x82,0x00,0x17,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x1b,0x00,0x00,0x00,0x00,
0x90,0xc7,0x00,0x04,0x00,0x00,0x00,0x00,0x10,0xe0,0x00,0x1b,0x00,0x00,0x00,0x00,
0x94,0xc8,0x00,0x00,0x27,0x83,0x90,0x00,0x93,0x85,0x8b,0x70,0x00,0x08,0x10,0xc0,
0x00,0x48,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x08,
0x00,0xe5,0x28,0x2b,0x10,0xa0,0x00,0x06,0x01,0x44,0x18,0x23,0x8f,0x82,0x8b,0x88,
0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x2b,0x10,0x40,0x00,0x05,0x00,0x00,0x00,0x00,
0x24,0x03,0x00,0x10,0xa4,0xc8,0x00,0x14,0x03,0xe0,0x00,0x08,0x00,0x60,0x10,0x21,
0x11,0x20,0x00,0x05,0x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x06,0x24,0x03,0x00,0x08,
0x08,0x00,0x1f,0x16,0xa4,0xc2,0x00,0x14,0x08,0x00,0x1f,0x16,0x00,0x00,0x18,0x21,
0x27,0xbd,0xff,0xc8,0xaf,0xb5,0x00,0x2c,0xaf,0xb4,0x00,0x28,0xaf,0xb3,0x00,0x24,
0xaf,0xb0,0x00,0x18,0xaf,0xbf,0x00,0x30,0xaf,0xb2,0x00,0x20,0xaf,0xb1,0x00,0x1c,
0x94,0x91,0x00,0x06,0x00,0x80,0xa0,0x21,0x3c,0x02,0x80,0x00,0x3c,0x04,0xb0,0x03,
0x00,0x11,0xa8,0xc0,0x34,0x84,0x00,0x20,0x24,0x42,0x7c,0x80,0x02,0xb1,0x48,0x21,
0xac,0x82,0x00,0x00,0x00,0x09,0x48,0x80,0x24,0x03,0x00,0x01,0x27,0x82,0x90,0x10,
0xa2,0x83,0x00,0x12,0x01,0x22,0x10,0x21,0x27,0x84,0x90,0x04,0x01,0x24,0x20,0x21,
0x80,0x48,0x00,0x06,0x8c,0x8a,0x00,0x18,0x27,0x83,0x90,0x20,0x01,0x23,0x48,0x21,
0x8d,0x24,0x00,0x00,0x25,0x08,0x00,0x02,0x8d,0x42,0x00,0x00,0x8d,0x49,0x00,0x04,
0x00,0x08,0x17,0xc2,0x8d,0x43,0x00,0x08,0x01,0x02,0x40,0x21,0x00,0x04,0x25,0xc2,
0x00,0x08,0x40,0x43,0x30,0x84,0x00,0x01,0x00,0x03,0x1f,0xc2,0x00,0x08,0x40,0x40,
0x00,0xe0,0x80,0x21,0x00,0x64,0x18,0x24,0x00,0x09,0x49,0x42,0x01,0x48,0x10,0x21,
0x00,0xa0,0x98,0x21,0x00,0xa0,0x20,0x21,0x00,0x40,0x38,0x21,0x02,0x00,0x28,0x21,
0x14,0x60,0x00,0x19,0x31,0x29,0x00,0x01,0x94,0x42,0x00,0x00,0x02,0xb1,0x88,0x21,
0x02,0x00,0x28,0x21,0x00,0x11,0x88,0x80,0x27,0x90,0x90,0x00,0x02,0x30,0x80,0x21,
0x96,0x03,0x00,0x06,0x30,0x52,0xff,0xff,0x02,0x60,0x20,0x21,0x00,0x60,0x30,0x21,
0xa6,0x83,0x00,0x1a,0x27,0x82,0x90,0x08,0x0c,0x00,0x08,0xe3,0x02,0x22,0x88,0x21,
0x00,0x52,0x10,0x21,0x96,0x03,0x00,0x06,0xa6,0x22,0x00,0x04,0x8f,0xbf,0x00,0x30,
0x7b,0xb4,0x01,0x7c,0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x00,0x60,0x10,0x21,
0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0xaf,0xa9,0x00,0x10,0x0c,0x00,0x09,0x0a,
0xaf,0xa0,0x00,0x14,0x08,0x00,0x1f,0x54,0x02,0xb1,0x88,0x21,0x27,0xbd,0xff,0xc0,
0xaf,0xbe,0x00,0x38,0xaf,0xb7,0x00,0x34,0xaf,0xb6,0x00,0x30,0xaf,0xb5,0x00,0x2c,
0xaf,0xb3,0x00,0x24,0xaf,0xb1,0x00,0x1c,0xaf,0xbf,0x00,0x3c,0xaf,0xb4,0x00,0x28,
0xaf,0xb2,0x00,0x20,0xaf,0xb0,0x00,0x18,0x94,0x90,0x00,0x00,0x3c,0x08,0xb0,0x03,
0x35,0x08,0x00,0x20,0x00,0x10,0x10,0xc0,0x00,0x50,0x18,0x21,0x00,0x40,0x88,0x21,
0x3c,0x02,0x80,0x00,0x00,0x03,0x48,0x80,0x24,0x42,0x7d,0xbc,0x00,0x80,0x98,0x21,
0x27,0x84,0x90,0x10,0x01,0x24,0x20,0x21,0x93,0xb7,0x00,0x53,0xad,0x02,0x00,0x00,
0x80,0x83,0x00,0x06,0x27,0x82,0x90,0x04,0x01,0x22,0x10,0x21,0x8c,0x44,0x00,0x18,
0x24,0x63,0x00,0x02,0x00,0x03,0x17,0xc2,0x8c,0x88,0x00,0x08,0x00,0x62,0x18,0x21,
0x00,0x03,0x18,0x43,0x00,0x03,0x18,0x40,0xaf,0xa7,0x00,0x4c,0x2c,0xa2,0x00,0x10,
0x00,0xa0,0xa8,0x21,0x00,0x83,0x50,0x21,0x00,0x08,0x47,0xc2,0x00,0xc0,0x58,0x21,
0x00,0x00,0xb0,0x21,0x8c,0x92,0x00,0x0c,0x14,0x40,0x00,0x13,0x00,0x00,0xf0,0x21,
0x92,0x67,0x00,0x04,0x24,0x14,0x00,0x01,0x12,0x87,0x00,0x10,0x02,0x30,0x10,0x21,
0x27,0x83,0x90,0x18,0x01,0x23,0x18,0x21,0x80,0x64,0x00,0x00,0x27,0x83,0xb5,0x70,
0x00,0x04,0x11,0x00,0x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x23,
0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x04,0x00,0x00,0x00,0x00,
0x10,0x80,0x00,0x23,0x00,0x00,0x00,0x00,0x02,0x30,0x10,0x21,0x00,0x02,0x80,0x80,
0x24,0x04,0x00,0x01,0x27,0x83,0x90,0x20,0xa2,0x64,0x00,0x12,0x02,0x03,0x18,0x21,
0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x15,0xc2,0x30,0x42,0x00,0x01,
0x01,0x02,0x10,0x24,0x14,0x40,0x00,0x0e,0x02,0xa0,0x20,0x21,0x27,0x82,0x90,0x00,
0x02,0x02,0x10,0x21,0x94,0x43,0x00,0x06,0x00,0x00,0x00,0x00,0xa6,0x63,0x00,0x1a,
0x94,0x42,0x00,0x06,0x7b,0xbe,0x01,0xfc,0x7b,0xb6,0x01,0xbc,0x7b,0xb4,0x01,0x7c,
0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x40,
0x8f,0xa5,0x00,0x4c,0x01,0x60,0x30,0x21,0x01,0x40,0x38,0x21,0xaf,0xa0,0x00,0x10,
0x0c,0x00,0x09,0x0a,0xaf,0xa0,0x00,0x14,0x08,0x00,0x1f,0xbb,0x00,0x00,0x00,0x00,
0x27,0x83,0x90,0x20,0x01,0x23,0x18,0x21,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x02,0x15,0xc2,0x30,0x42,0x00,0x01,0x01,0x02,0x10,0x24,0x14,0x40,0x00,0xaf,
0x00,0xa0,0x20,0x21,0x32,0x4f,0x00,0x03,0x00,0x12,0x10,0x82,0x25,0xe3,0x00,0x0d,
0x30,0x45,0x00,0x07,0x00,0x74,0x78,0x04,0x10,0xa0,0x00,0x0e,0x00,0x00,0x90,0x21,
0x27,0x82,0x80,0x1c,0x00,0x15,0x18,0x40,0x00,0x62,0x18,0x21,0x94,0x64,0x00,0x00,
0x24,0xa2,0x00,0x06,0x00,0x54,0x10,0x04,0x00,0x44,0x00,0x1a,0x14,0x80,0x00,0x02,
0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x0d,0x00,0x00,0x10,0x12,0x24,0x42,0x00,0x20,
0x30,0x52,0xff,0xfc,0x02,0x30,0x10,0x21,0x27,0x83,0x90,0x10,0x00,0x02,0x10,0x80,
0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x03,0x00,0x00,0x00,0x00,0x30,0x83,0x00,0xff,
0x2c,0x62,0x00,0x0c,0x14,0x40,0x00,0x04,0x2c,0x62,0x00,0x19,0x30,0x82,0x00,0x0f,
0x24,0x43,0x00,0x0c,0x2c,0x62,0x00,0x19,0x10,0x40,0x00,0x19,0x24,0x0e,0x00,0x20,
0x24,0x62,0xff,0xe9,0x2c,0x42,0x00,0x02,0x14,0x40,0x00,0x15,0x24,0x0e,0x00,0x10,
0x24,0x62,0xff,0xeb,0x2c,0x42,0x00,0x02,0x14,0x40,0x00,0x11,0x24,0x0e,0x00,0x08,
0x24,0x02,0x00,0x14,0x10,0x62,0x00,0x0e,0x24,0x0e,0x00,0x02,0x24,0x62,0xff,0xef,
0x2c,0x42,0x00,0x03,0x14,0x40,0x00,0x0a,0x24,0x0e,0x00,0x10,0x24,0x62,0xff,0xf1,
0x2c,0x42,0x00,0x02,0x14,0x40,0x00,0x06,0x24,0x0e,0x00,0x08,0x24,0x62,0xff,0xf3,
0x2c,0x42,0x00,0x02,0x24,0x0e,0x00,0x04,0x24,0x03,0x00,0x02,0x00,0x62,0x70,0x0a,
0x30,0xe2,0x00,0xff,0x00,0x00,0x48,0x21,0x00,0x00,0x68,0x21,0x10,0x40,0x00,0x6d,
0x00,0x00,0x58,0x21,0x3c,0x14,0x80,0xff,0x27,0x99,0x90,0x00,0x01,0xf2,0xc0,0x23,
0x36,0x94,0xff,0xff,0x01,0xc9,0x10,0x2a,0x14,0x40,0x00,0x64,0x24,0x03,0x00,0x04,
0x00,0x10,0x28,0xc0,0x00,0xb0,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x59,0x10,0x21,
0x94,0x56,0x00,0x06,0x00,0x00,0x00,0x00,0x32,0xcc,0x00,0x03,0x00,0x6c,0x10,0x23,
0x30,0x42,0x00,0x03,0x02,0xc2,0x10,0x21,0x24,0x42,0x00,0x04,0x30,0x51,0xff,0xff,
0x02,0x32,0x18,0x2b,0x10,0x60,0x00,0x4d,0x01,0xf1,0x10,0x23,0x02,0x51,0x10,0x23,
0x01,0x78,0x18,0x2b,0x10,0x60,0x00,0x34,0x30,0x44,0xff,0xff,0x29,0x22,0x00,0x40,
0x10,0x40,0x00,0x31,0x01,0x72,0x18,0x21,0x25,0x22,0x00,0x01,0x00,0x02,0x16,0x00,
0x00,0x02,0x4e,0x03,0x00,0xb0,0x10,0x21,0x00,0x02,0x30,0x80,0x27,0x82,0x90,0x04,
0x30,0x6b,0xff,0xff,0x00,0xc2,0x18,0x21,0x8c,0x67,0x00,0x18,0x00,0x04,0x25,0x40,
0x3c,0x03,0x7f,0x00,0x8c,0xe2,0x00,0x04,0x00,0x83,0x20,0x24,0x27,0x83,0x90,0x10,
0x00,0x54,0x10,0x24,0x00,0xc3,0x28,0x21,0x00,0x44,0x10,0x25,0xac,0xe2,0x00,0x04,
0x16,0xe0,0x00,0x02,0xa0,0xb5,0x00,0x00,0xa0,0xb5,0x00,0x03,0x27,0x84,0x90,0x20,
0x00,0xc4,0x18,0x21,0x8c,0x62,0x00,0x00,0x8c,0xe8,0x00,0x08,0x00,0x02,0x15,0xc2,
0x00,0x08,0x47,0xc2,0x30,0x42,0x00,0x01,0x01,0x02,0x10,0x24,0x10,0x40,0x00,0x0a,
0x00,0x00,0x00,0x00,0x80,0xa2,0x00,0x06,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x02,
0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,0x00,0x02,0x10,0x40,
0x00,0xe2,0x50,0x21,0xa5,0x5e,0x00,0x00,0x92,0x62,0x00,0x04,0x25,0xad,0x00,0x01,
0x27,0x84,0x90,0x00,0x00,0xc4,0x18,0x21,0x01,0xa2,0x10,0x2a,0x94,0x70,0x00,0x02,
0x14,0x40,0xff,0xb8,0x00,0x00,0x00,0x00,0x96,0x63,0x00,0x14,0x00,0x0c,0x10,0x23,
0xa2,0x69,0x00,0x12,0x30,0x42,0x00,0x03,0x01,0x62,0x10,0x23,0x00,0x03,0x80,0xc0,
0x8f,0xa5,0x00,0x4c,0x30,0x4b,0xff,0xff,0x02,0x03,0x80,0x21,0x27,0x82,0x90,0x08,
0x00,0x10,0x80,0x80,0xa6,0x6b,0x00,0x1a,0x02,0xa0,0x20,0x21,0x01,0x60,0x30,0x21,
0x01,0x60,0x88,0x21,0x0c,0x00,0x08,0xe3,0x02,0x02,0x80,0x21,0x00,0x5e,0x10,0x21,
0xa6,0x02,0x00,0x04,0x08,0x00,0x1f,0xc1,0x02,0x20,0x10,0x21,0x01,0x62,0x10,0x2b,
0x10,0x40,0xff,0xe9,0x00,0x00,0x20,0x21,0x29,0x22,0x00,0x40,0x10,0x40,0xff,0xe6,
0x01,0x71,0x18,0x21,0x08,0x00,0x20,0x37,0x25,0x22,0x00,0x01,0x08,0x00,0x20,0x66,
0x32,0xcc,0x00,0x03,0x08,0x00,0x20,0x66,0x00,0x00,0x60,0x21,0x8f,0xa5,0x00,0x4c,
0x01,0x40,0x38,0x21,0xaf,0xa0,0x00,0x10,0x0c,0x00,0x09,0x0a,0xaf,0xb4,0x00,0x14,
0x92,0x67,0x00,0x04,0x08,0x00,0x1f,0xd9,0x30,0x5e,0xff,0xff,0x30,0x84,0xff,0xff,
0x00,0x04,0x30,0xc0,0x00,0xc4,0x20,0x21,0x00,0x04,0x20,0x80,0x27,0x82,0x90,0x00,
0x3c,0x03,0xb0,0x08,0x30,0xa5,0xff,0xff,0x00,0x82,0x20,0x21,0x00,0xc3,0x30,0x21,
0xac,0xc5,0x00,0x00,0x03,0xe0,0x00,0x08,0xa4,0x85,0x00,0x00,0x30,0x84,0xff,0xff,
0x00,0x04,0x30,0xc0,0x00,0xc4,0x30,0x21,0x27,0x88,0x90,0x00,0x00,0x06,0x30,0x80,
0x00,0xc8,0x30,0x21,0x94,0xc3,0x00,0x04,0x3c,0x02,0xb0,0x08,0x3c,0x07,0xb0,0x03,
0x00,0x03,0x20,0xc0,0x00,0x83,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x82,0x20,0x21,
0x3c,0x02,0x80,0x01,0x30,0xa5,0xff,0xff,0x00,0x68,0x18,0x21,0x34,0xe7,0x00,0x20,
0x24,0x42,0x82,0x6c,0xac,0xe2,0x00,0x00,0xa4,0xc5,0x00,0x02,0xa4,0x65,0x00,0x00,
0x03,0xe0,0x00,0x08,0xac,0x85,0x00,0x00,0x30,0x84,0xff,0xff,0x00,0x04,0x10,0xc0,
0x00,0x44,0x10,0x21,0x27,0x89,0x90,0x00,0x00,0x02,0x10,0x80,0x00,0x49,0x10,0x21,
0x97,0x83,0x8f,0xf0,0x94,0x4a,0x00,0x04,0x3c,0x02,0xb0,0x08,0x00,0x03,0x38,0xc0,
0x00,0x0a,0x40,0xc0,0x00,0xe3,0x18,0x21,0x01,0x0a,0x28,0x21,0x00,0xe2,0x38,0x21,
0x01,0x02,0x40,0x21,0x00,0x03,0x18,0x80,0x00,0x05,0x28,0x80,0x3c,0x06,0xb0,0x03,
0x3c,0x02,0x80,0x01,0x00,0xa9,0x28,0x21,0x00,0x69,0x18,0x21,0x34,0xc6,0x00,0x20,
0x34,0x09,0xff,0xff,0x24,0x42,0x82,0xc8,0xac,0xc2,0x00,0x00,0xa4,0x64,0x00,0x00,
0xac,0xe4,0x00,0x00,0xa4,0xa9,0x00,0x00,0xad,0x09,0x00,0x00,0xa7,0x8a,0x8f,0xf0,
0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,
0x34,0x63,0x00,0x20,0x24,0x42,0x83,0x48,0x3c,0x04,0xb0,0x03,0xac,0x62,0x00,0x00,
0x34,0x84,0x01,0x10,0x8c,0x82,0x00,0x00,0x97,0x83,0x81,0x60,0x30,0x42,0xff,0xff,
0x10,0x62,0x00,0x16,0x24,0x0a,0x00,0x01,0xa7,0x82,0x81,0x60,0xaf,0x80,0xb4,0x50,
0x00,0x40,0x28,0x21,0x24,0x06,0x00,0x01,0x27,0x84,0xb4,0x54,0x25,0x43,0xff,0xff,
0x00,0x66,0x10,0x04,0x00,0xa2,0x10,0x24,0x14,0x40,0x00,0x07,0x00,0x00,0x00,0x00,
0x8c,0x83,0xff,0xfc,0x00,0x00,0x00,0x00,0x00,0x66,0x10,0x04,0x00,0xa2,0x10,0x24,
0x38,0x42,0x00,0x00,0x01,0x42,0x18,0x0a,0x25,0x4a,0x00,0x01,0x2d,0x42,0x00,0x14,
0xac,0x83,0x00,0x00,0x14,0x40,0xff,0xf1,0x24,0x84,0x00,0x04,0x3c,0x0b,0xb0,0x03,
0x00,0x00,0x50,0x21,0x3c,0x0c,0x80,0x00,0x27,0x89,0xb4,0xa0,0x35,0x6b,0x01,0x20,
0x8d,0x68,0x00,0x00,0x8d,0x23,0x00,0x04,0x01,0x0c,0x10,0x24,0x00,0x02,0x17,0xc2,
0x11,0x03,0x00,0x37,0xa1,0x22,0x00,0xdc,0xa1,0x20,0x00,0xd5,0xa1,0x20,0x00,0xd6,
0x01,0x20,0x30,0x21,0x00,0x00,0x38,0x21,0x00,0x00,0x28,0x21,0x01,0x20,0x20,0x21,
0x00,0xa8,0x10,0x06,0x30,0x42,0x00,0x01,0x10,0xe0,0x00,0x10,0xa0,0x82,0x00,0x0a,
0x90,0x82,0x00,0x07,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x31,0x24,0xa2,0xff,0xff,
0xa0,0x82,0x00,0x08,0x90,0x82,0x00,0x0a,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x09,
0x00,0x00,0x00,0x00,0x90,0x83,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x03,0x10,0x40,
0x00,0x43,0x10,0x21,0x00,0x46,0x10,0x21,0xa0,0x45,0x00,0x09,0x90,0x82,0x00,0x0a,
0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x07,0x00,0x00,0x00,0x00,0x14,0xe0,0x00,0x04,
0x00,0x00,0x00,0x00,0xa0,0xc5,0x00,0xd5,0x24,0x07,0x00,0x01,0xa0,0x85,0x00,0x08,
0xa0,0xc5,0x00,0xd6,0x24,0xa5,0x00,0x01,0x2c,0xa2,0x00,0x1c,0x14,0x40,0xff,0xe0,
0x24,0x84,0x00,0x03,0x90,0xc4,0x00,0xd5,0x00,0x00,0x28,0x21,0x00,0xa4,0x10,0x2b,
0x10,0x40,0x00,0x0b,0x00,0x00,0x00,0x00,0x00,0xc0,0x18,0x21,0xa0,0x64,0x00,0x08,
0x90,0xc2,0x00,0xd5,0x24,0xa5,0x00,0x01,0xa0,0x62,0x00,0x09,0x90,0xc4,0x00,0xd5,
0x00,0x00,0x00,0x00,0x00,0xa4,0x10,0x2b,0x14,0x40,0xff,0xf8,0x24,0x63,0x00,0x03,
0x25,0x4a,0x00,0x01,0x2d,0x42,0x00,0x08,0xad,0x28,0x00,0x04,0x25,0x6b,0x00,0x04,
0x14,0x40,0xff,0xbf,0x25,0x29,0x00,0xec,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
0x90,0x82,0x00,0x05,0x08,0x00,0x21,0x0d,0xa0,0x82,0x00,0x08,0x97,0x85,0x8b,0x7a,
0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x63,0x00,0x20,
0x24,0x42,0x84,0xfc,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x62,0x00,0x00,
0x30,0x90,0x00,0xff,0x00,0x05,0x28,0x42,0x00,0x00,0x48,0x21,0x27,0x8f,0xb4,0xa4,
0x00,0x00,0x50,0x21,0x00,0x00,0x58,0x21,0x27,0x98,0xb5,0x84,0x27,0x99,0xb5,0x80,
0x27,0x8e,0xb5,0x7e,0x27,0x8c,0xb4,0xa8,0x27,0x8d,0xb5,0x00,0x27,0x88,0xb5,0x78,
0x00,0x0a,0x18,0x80,0x01,0x6f,0x10,0x21,0xac,0x40,0x00,0x00,0xac,0x45,0x00,0x58,
0x00,0x6e,0x20,0x21,0x00,0x78,0x10,0x21,0xa1,0x00,0xff,0xfc,0xad,0x00,0x00,0x00,
0xa1,0x00,0x00,0x04,0xa1,0x00,0x00,0x05,0xad,0x00,0xff,0xf8,0x00,0x79,0x18,0x21,
0x24,0x06,0x00,0x01,0x24,0xc6,0xff,0xff,0xa0,0x80,0x00,0x00,0xa4,0x60,0x00,0x00,
0xac,0x40,0x00,0x00,0x24,0x63,0x00,0x02,0x24,0x42,0x00,0x04,0x04,0xc1,0xff,0xf9,
0x24,0x84,0x00,0x01,0x00,0x0a,0x10,0x80,0x00,0x4d,0x20,0x21,0x00,0x00,0x30,0x21,
0x00,0x4c,0x18,0x21,0x27,0x87,0x81,0x64,0x8c,0xe2,0x00,0x00,0x24,0xe7,0x00,0x04,
0xac,0x82,0x00,0x00,0xa0,0x66,0x00,0x00,0xa0,0x66,0x00,0x01,0x24,0xc6,0x00,0x01,
0x28,0xc2,0x00,0x1c,0xa0,0x60,0x00,0x02,0x24,0x84,0x00,0x04,0x14,0x40,0xff,0xf6,
0x24,0x63,0x00,0x03,0x25,0x29,0x00,0x01,0x29,0x22,0x00,0x08,0x25,0x4a,0x00,0x3b,
0x25,0x08,0x00,0xec,0x14,0x40,0xff,0xd6,0x25,0x6b,0x00,0xec,0xa7,0x80,0x81,0x60,
0x00,0x00,0x48,0x21,0x27,0x83,0xb4,0x50,0xac,0x69,0x00,0x00,0x25,0x29,0x00,0x01,
0x29,0x22,0x00,0x0c,0x14,0x40,0xff,0xfc,0x24,0x63,0x00,0x04,0x0c,0x00,0x20,0xd2,
0x00,0x00,0x00,0x00,0x2e,0x04,0x00,0x14,0x27,0x83,0xb4,0xa0,0x24,0x09,0x00,0x07,
0x10,0x80,0x00,0x0a,0x00,0x00,0x00,0x00,0x90,0x62,0x00,0xd5,0x25,0x29,0xff,0xff,
0xa0,0x62,0x00,0x00,0x05,0x21,0xff,0xfa,0x24,0x63,0x00,0xec,0x8f,0xbf,0x00,0x14,
0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x90,0x62,0x00,0xd6,
0x08,0x00,0x21,0x90,0x25,0x29,0xff,0xff,0x30,0x84,0x00,0xff,0x00,0x04,0x11,0x00,
0x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,
0x27,0x83,0xb4,0xa0,0x00,0x43,0x60,0x21,0x3c,0x04,0xb0,0x03,0x3c,0x02,0x80,0x01,
0x34,0x84,0x00,0x20,0x24,0x42,0x86,0x68,0x30,0xc6,0x00,0xff,0x93,0xaa,0x00,0x13,
0x30,0xa5,0x00,0xff,0x30,0xe7,0x00,0xff,0xac,0x82,0x00,0x00,0x10,0xc0,0x00,0xe8,
0x25,0x8f,0x00,0xd0,0x91,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x24,0x42,0xff,0xfc,
0x2c,0x43,0x00,0x18,0x10,0x60,0x00,0xc7,0x3c,0x03,0x80,0x01,0x00,0x02,0x10,0x80,
0x24,0x63,0x02,0x90,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x30,0x14,0x40,0x00,0x1c,
0x00,0x00,0x00,0x00,0x10,0xa0,0x00,0x17,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
0x10,0xa2,0x00,0x11,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x0c,
0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x06,0x00,0x00,0x00,0x00,
0x8d,0x82,0x00,0xd0,0x00,0x00,0x00,0x00,0x24,0x42,0xff,0xe0,0x03,0xe0,0x00,0x08,
0xad,0x82,0x00,0xd0,0x8d,0x82,0x00,0xd0,0x08,0x00,0x21,0xcb,0x24,0x42,0xff,0xe8,
0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x21,0xcb,
0x24,0x42,0x00,0x01,0x8d,0x82,0x00,0xd0,0x08,0x00,0x21,0xcb,0x24,0x42,0x00,0x02,
0x10,0xa0,0xff,0xf9,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0x00,0x0a,
0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xe9,0x00,0x00,0x00,0x00,
0x24,0x02,0x00,0x03,0x10,0xa2,0xff,0xe6,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,
0x08,0x00,0x21,0xcb,0x24,0x42,0xff,0xd0,0x8d,0x82,0x00,0xd0,0x08,0x00,0x21,0xcb,
0x24,0x42,0xff,0xfc,0x10,0xa0,0xff,0xeb,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
0x10,0xa2,0xff,0xe5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xe0,
0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xdb,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,
0x08,0x00,0x21,0xcb,0x24,0x42,0xff,0xf8,0x2d,0x42,0x00,0x19,0x14,0x40,0xff,0xc5,
0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xdb,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
0x10,0xa2,0xff,0xd5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xd0,
0x24,0x02,0x00,0x03,0x10,0xa2,0xff,0xf1,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,
0x08,0x00,0x21,0xcb,0x24,0x42,0xff,0xf0,0x2d,0x42,0x00,0x1b,0x10,0x40,0xff,0xf1,
0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xcb,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
0x10,0xa2,0xff,0xc5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x14,0xa2,0xff,0xb5,
0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x21,0xcb,0x24,0x42,0xff,0xf4,
0x2d,0x42,0x00,0x1e,0x10,0x40,0xff,0xe3,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xbd,
0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xb5,0x24,0x02,0x00,0x02,
0x10,0xa2,0xff,0xd6,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xc6,0x24,0x02,0x00,0x03,
0x2d,0x42,0x00,0x23,0x10,0x40,0xff,0xd7,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xae,
0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xa9,0x24,0x02,0x00,0x02,
0x14,0xa2,0xff,0xb7,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0x03,0x00,0x00,0x00,0x00,
0x2d,0x42,0x00,0x25,0x10,0x40,0xff,0xcb,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xd8,
0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x16,0x14,0x40,0x00,0x0e,0x00,0x00,0x00,0x00,
0x10,0xa0,0xff,0xa0,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x9a,
0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x95,0x24,0x02,0x00,0x03,
0x14,0xa2,0xff,0xb6,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x21,0xcb,
0x24,0x42,0xff,0xfa,0x10,0xa0,0xff,0x93,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
0x10,0xa2,0xff,0x8d,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x88,
0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xf3,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x17,
0x14,0x40,0xff,0xac,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0x34,0x00,0x00,0x00,0x00,
0x2d,0x42,0x00,0x19,0x10,0x40,0xff,0xe2,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0x81,
0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x7b,0x00,0x00,0x00,0x00,
0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x76,0x24,0x02,0x00,0x03,0x10,0xa2,0xff,0x97,
0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xc8,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0x51,
0x2d,0x42,0x00,0x1b,0x2d,0x42,0x00,0x1e,0x10,0x40,0xff,0xde,0x00,0x00,0x00,0x00,
0x10,0xa0,0xff,0x70,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x6a,
0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x65,0x24,0x02,0x00,0x03,
0x10,0xa2,0xff,0x96,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xc8,0x00,0x00,0x00,0x00,
0x2d,0x42,0x00,0x23,0x14,0x40,0xff,0xf2,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xf9,
0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xf7,0x2d,0x42,0x00,0x25,0x08,0x00,0x22,0x2d,
0x2d,0x42,0x00,0x27,0x10,0xa0,0xff,0x5b,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
0x10,0xa2,0xff,0x55,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x50,
0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0x71,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xe6,
0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x27,0x14,0x40,0xff,0xad,0x00,0x00,0x00,0x00,
0x08,0x00,0x22,0x79,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x2a,0x14,0x40,0xff,0xd8,
0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xe9,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x2c,
0x14,0x40,0xff,0x78,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xbd,0x00,0x00,0x00,0x00,
0x91,0x86,0x00,0x00,0x91,0x83,0x00,0xd4,0x25,0x8d,0x00,0x5c,0x30,0xc4,0x00,0xff,
0x00,0x04,0x10,0x40,0x00,0x44,0x10,0x21,0x00,0x04,0x48,0x80,0x01,0x82,0x58,0x21,
0x01,0x89,0x40,0x21,0x25,0x78,0x00,0x08,0x10,0x60,0x00,0x37,0x25,0x0e,0x00,0x60,
0x2c,0xa2,0x00,0x03,0x14,0x40,0x00,0x25,0x00,0x00,0x00,0x00,0x91,0x82,0x00,0xdd,
0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x1e,0x00,0x00,0x00,0x00,0x27,0x87,0x81,0x64,
0x01,0x27,0x10,0x21,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0xad,0x03,0x00,0x60,
0x91,0x62,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x40,0x30,0x21,0xa1,0x82,0x00,0x00,
0x30,0xc2,0x00,0xff,0x00,0x02,0x10,0x80,0x00,0x47,0x10,0x21,0x8c,0x43,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x03,0x18,0x42,0xad,0xa3,0x00,0x00,0x91,0x84,0x00,0x00,
0x8d,0xc5,0x00,0x00,0x00,0x04,0x20,0x80,0x00,0x87,0x10,0x21,0x8c,0x43,0x00,0x00,
0x00,0x05,0x28,0x40,0x00,0x8c,0x20,0x21,0x00,0x03,0x18,0x80,0x00,0xa3,0x10,0x2b,
0x00,0x62,0x28,0x0a,0xac,0x85,0x00,0x60,0x03,0xe0,0x00,0x08,0xa1,0x80,0x00,0xd4,
0x27,0x87,0x81,0x64,0x08,0x00,0x22,0xb0,0xa1,0x80,0x00,0xdd,0x27,0x82,0x81,0xd4,
0x8d,0x83,0x00,0xd8,0x00,0x82,0x10,0x21,0x90,0x44,0x00,0x00,0x24,0x63,0x00,0x01,
0x00,0x64,0x20,0x2b,0x14,0x80,0xff,0x02,0xad,0x83,0x00,0xd8,0x8d,0x02,0x00,0x60,
0xa1,0x80,0x00,0xd4,0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,
0x03,0xe0,0x00,0x08,0xad,0x82,0x00,0x5c,0x10,0xe0,0x00,0x1d,0x24,0x83,0xff,0xfc,
0x2c,0x62,0x00,0x18,0x10,0x40,0x01,0x10,0x00,0x03,0x10,0x80,0x3c,0x03,0x80,0x01,
0x24,0x63,0x02,0xf0,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x30,0x14,0x40,0x00,0x65,
0x00,0x00,0x00,0x00,0x10,0xa0,0x00,0x60,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
0x10,0xa2,0x00,0x5a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x08,
0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x51,0x00,0x00,0x00,0x00,
0x8d,0x82,0x00,0xd0,0x00,0x00,0x00,0x00,0x24,0x42,0xff,0xe0,0xad,0x82,0x00,0xd0,
0x8d,0xe3,0x00,0x00,0x8d,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x21,
0xad,0xa2,0x00,0x00,0xad,0xe0,0x00,0x00,0x8d,0xa3,0x00,0x00,0x8d,0xc4,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x83,0x10,0x2a,0x10,0x40,0x00,0x22,0x00,0x00,0x00,0x00,
0x93,0x05,0x00,0x01,0x91,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x45,0x00,0x05,
0x24,0x02,0x00,0x01,0xa1,0x85,0x00,0x00,0xa1,0x82,0x00,0xd4,0x03,0xe0,0x00,0x08,
0xad,0x80,0x00,0xd8,0x91,0x82,0x00,0xdd,0x24,0x03,0x00,0x01,0x10,0x43,0x00,0x05,
0x00,0x00,0x00,0x00,0xa1,0x83,0x00,0xd4,0xad,0x80,0x00,0xd8,0x03,0xe0,0x00,0x08,
0xa1,0x83,0x00,0xdd,0x00,0x04,0x17,0xc2,0x00,0x82,0x10,0x21,0x00,0x02,0x10,0x43,
0xad,0xa2,0x00,0x00,0x91,0x83,0x00,0x00,0x27,0x82,0x81,0x64,0x8d,0xc5,0x00,0x00,
0x00,0x03,0x18,0x80,0x00,0x62,0x18,0x21,0x8c,0x64,0x00,0x00,0x00,0x05,0x28,0x40,
0x00,0x04,0x18,0x80,0x00,0xa3,0x10,0x2b,0x00,0x62,0x28,0x0a,0x08,0x00,0x22,0xc2,
0xad,0xc5,0x00,0x00,0x97,0x82,0x8b,0x7c,0x00,0x00,0x00,0x00,0x00,0x62,0x10,0x2a,
0x10,0x40,0xfe,0xab,0x00,0x00,0x00,0x00,0x91,0x82,0x00,0xdd,0x00,0x00,0x00,0x00,
0x14,0x40,0x00,0x15,0x00,0x00,0x00,0x00,0x91,0x83,0x00,0x00,0x27,0x82,0x81,0x64,
0x00,0x03,0x18,0x80,0x00,0x62,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x6c,0x18,0x21,
0xac,0x64,0x00,0x60,0x93,0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x10,0x80,
0x01,0x82,0x10,0x21,0x24,0x4e,0x00,0x60,0xa1,0x85,0x00,0x00,0x8d,0xc2,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,
0x03,0xe0,0x00,0x08,0xad,0xa2,0x00,0x00,0x08,0x00,0x23,0x37,0xa1,0x80,0x00,0xdd,
0x8d,0x82,0x00,0xd0,0x08,0x00,0x22,0xf3,0x24,0x42,0xff,0xe8,0x8d,0x82,0x00,0xd0,
0x08,0x00,0x22,0xf3,0x24,0x42,0x00,0x01,0x8d,0x82,0x00,0xd0,0x08,0x00,0x22,0xf3,
0x24,0x42,0x00,0x02,0x10,0xa0,0xff,0xf9,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
0x10,0xa2,0x00,0x0a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xa0,
0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x03,0x10,0xa2,0xff,0x9d,0x00,0x00,0x00,0x00,
0x8d,0x82,0x00,0xd0,0x08,0x00,0x22,0xf3,0x24,0x42,0xff,0xd0,0x8d,0x82,0x00,0xd0,
0x08,0x00,0x22,0xf3,0x24,0x42,0xff,0xfc,0x10,0xa0,0xff,0xeb,0x00,0x00,0x00,0x00,
0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xe5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
0x10,0xa2,0xff,0x93,0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xdd,0x00,0x00,0x00,0x00,
0x8d,0x82,0x00,0xd0,0x08,0x00,0x22,0xf3,0x24,0x42,0xff,0xf8,0x2d,0x42,0x00,0x19,
0x14,0x40,0xff,0x7c,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xdb,0x00,0x00,0x00,0x00,
0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xd5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
0x10,0xa2,0xff,0x83,0x24,0x02,0x00,0x03,0x10,0xa2,0xff,0xf1,0x00,0x00,0x00,0x00,
0x8d,0x82,0x00,0xd0,0x08,0x00,0x22,0xf3,0x24,0x42,0xff,0xf0,0x2d,0x42,0x00,0x1b,
0x10,0x40,0xff,0xf1,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xcb,0x00,0x00,0x00,0x00,
0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xc5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
0x14,0xa2,0xff,0x6c,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x22,0xf3,
0x24,0x42,0xff,0xf4,0x2d,0x42,0x00,0x1e,0x10,0x40,0xff,0xe3,0x00,0x00,0x00,0x00,
0x10,0xa0,0xff,0xbd,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x68,
0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xd6,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0xee,
0x24,0x02,0x00,0x03,0x2d,0x42,0x00,0x23,0x10,0x40,0xff,0xd7,0x00,0x00,0x00,0x00,
0x10,0xa0,0xff,0xae,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x5c,
0x24,0x02,0x00,0x02,0x14,0xa2,0xff,0xb7,0x00,0x00,0x00,0x00,0x08,0x00,0x23,0x74,
0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x25,0x10,0x40,0xff,0xcb,0x00,0x00,0x00,0x00,
0x08,0x00,0x23,0x49,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x16,0x14,0x40,0x00,0x0e,
0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xa0,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
0x10,0xa2,0xff,0x9a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x48,
0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xb6,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,
0x08,0x00,0x22,0xf3,0x24,0x42,0xff,0xfa,0x10,0xa0,0xff,0x93,0x00,0x00,0x00,0x00,
0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x8d,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
0x10,0xa2,0xff,0x3b,0x00,0x00,0x00,0x00,0x08,0x00,0x23,0x64,0x00,0x00,0x00,0x00,
0x2d,0x42,0x00,0x17,0x14,0x40,0xff,0xac,0x00,0x00,0x00,0x00,0x08,0x00,0x23,0xa5,
0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x19,0x10,0x40,0xff,0xe2,0x00,0x00,0x00,0x00,
0x10,0xa0,0xff,0x81,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x7b,
0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x29,0x24,0x02,0x00,0x03,
0x10,0xa2,0xff,0x97,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0xf0,0x00,0x00,0x00,0x00,
0x08,0x00,0x23,0xc2,0x2d,0x42,0x00,0x1b,0x2d,0x42,0x00,0x1e,0x10,0x40,0xff,0xde,
0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0x70,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
0x10,0xa2,0xff,0x6a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x18,
0x24,0x02,0x00,0x03,0x10,0xa2,0xff,0x96,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0xf0,
0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x23,0x14,0x40,0xff,0xf2,0x00,0x00,0x00,0x00,
0x08,0x00,0x23,0x6a,0x00,0x00,0x00,0x00,0x08,0x00,0x23,0x68,0x2d,0x42,0x00,0x25,
0x08,0x00,0x23,0x9e,0x2d,0x42,0x00,0x27,0x10,0xa0,0xff,0x5b,0x00,0x00,0x00,0x00,
0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x55,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
0x10,0xa2,0xff,0x03,0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0x71,0x00,0x00,0x00,0x00,
0x08,0x00,0x23,0x57,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x27,0x14,0x40,0xff,0xad,
0x00,0x00,0x00,0x00,0x08,0x00,0x23,0xea,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x2a,
0x14,0x40,0xff,0xd8,0x00,0x00,0x00,0x00,0x08,0x00,0x23,0x5a,0x00,0x00,0x00,0x00,
0x2d,0x42,0x00,0x2c,0x14,0x40,0xff,0x78,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0xe5,
0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xe8,0x3c,0x02,0xb0,0x03,0xaf,0xbf,0x00,0x14,
0xaf,0xb0,0x00,0x10,0x34,0x42,0x01,0x18,0x3c,0x03,0xb0,0x03,0x8c,0x50,0x00,0x00,
0x34,0x63,0x01,0x2c,0x90,0x62,0x00,0x00,0x32,0x05,0x00,0x01,0xa3,0x82,0x80,0x10,
0x14,0xa0,0x00,0x14,0x30,0x44,0x00,0xff,0x32,0x02,0x01,0x00,0x14,0x40,0x00,0x09,
0x00,0x00,0x00,0x00,0x32,0x02,0x08,0x00,0x10,0x40,0x00,0x02,0x24,0x02,0x00,0x01,
0xa3,0x82,0xbc,0x18,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,
0x27,0xbd,0x00,0x18,0x0c,0x00,0x05,0x37,0x00,0x00,0x00,0x00,0x26,0x02,0xff,0x00,
0xa3,0x80,0xbc,0x18,0x3c,0x01,0xb0,0x03,0xac,0x22,0x01,0x18,0x08,0x00,0x24,0x16,
0x32,0x02,0x08,0x00,0x0c,0x00,0x21,0x3f,0x00,0x00,0x00,0x00,0x26,0x02,0xff,0xff,
0x3c,0x01,0xb0,0x03,0xac,0x22,0x01,0x18,0x08,0x00,0x24,0x13,0x32,0x02,0x01,0x00,
0x27,0xbd,0xff,0xe0,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xd0,0xaf,0xbf,0x00,0x18,
0x8c,0x43,0x00,0x00,0x3c,0x02,0x00,0x40,0x24,0x07,0x0f,0xff,0x00,0x03,0x33,0x02,
0x00,0x03,0x2d,0x02,0x00,0x03,0x43,0x02,0x30,0x69,0x0f,0xff,0x00,0x62,0x18,0x24,
0x30,0xa5,0x00,0x03,0x30,0xc6,0x00,0xff,0x10,0x60,0x00,0x08,0x31,0x08,0x00,0xff,
0x01,0x00,0x30,0x21,0x0c,0x00,0x24,0xdf,0xaf,0xa9,0x00,0x10,0x8f,0xbf,0x00,0x18,
0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x0c,0x00,0x25,0x31,
0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0xd4,0x08,0x00,0x24,0x3f,
0xac,0x62,0x00,0x00,0x27,0xbd,0xff,0xc0,0x3c,0x02,0xb0,0x03,0xaf,0xbe,0x00,0x38,
0xaf,0xb5,0x00,0x2c,0xaf,0xb1,0x00,0x1c,0xaf,0xb0,0x00,0x18,0xaf,0xbf,0x00,0x3c,
0xaf,0xb7,0x00,0x34,0xaf,0xb6,0x00,0x30,0xaf,0xb4,0x00,0x28,0xaf,0xb3,0x00,0x24,
0xaf,0xb2,0x00,0x20,0x34,0x42,0x00,0x3f,0x90,0x43,0x00,0x00,0x00,0x80,0x80,0x21,
0x00,0x00,0xf0,0x21,0x00,0x00,0x88,0x21,0x10,0x60,0x00,0x76,0x00,0x00,0xa8,0x21,
0x3c,0x01,0xb0,0x03,0xa0,0x20,0x00,0x3f,0x00,0x10,0x12,0x02,0x24,0x04,0x06,0x14,
0x0c,0x00,0x06,0xd1,0x30,0x54,0x00,0x0f,0x24,0x04,0x06,0x14,0x0c,0x00,0x06,0xd1,
0xaf,0xa2,0x00,0x10,0x3c,0x03,0x00,0xff,0x34,0x63,0xff,0xff,0x32,0x10,0x00,0x7f,
0x00,0x43,0x10,0x24,0x00,0x10,0x86,0x00,0x02,0x02,0x80,0x25,0x02,0x00,0x28,0x21,
0x24,0x04,0x06,0x14,0x3c,0x13,0xbf,0xff,0x0c,0x00,0x06,0xbf,0x3c,0x16,0xb0,0x03,
0x00,0x00,0x90,0x21,0x3c,0x17,0x40,0x00,0x36,0x73,0xff,0xff,0x36,0xd6,0x00,0x3e,
0x0c,0x00,0x06,0xd1,0x24,0x04,0x04,0x00,0x00,0x57,0x10,0x25,0x00,0x40,0x28,0x21,
0x0c,0x00,0x06,0xbf,0x24,0x04,0x04,0x00,0x00,0x00,0x80,0x21,0x0c,0x00,0x25,0xf9,
0x00,0x00,0x00,0x00,0x26,0x03,0x00,0x01,0x10,0x40,0x00,0x46,0x30,0x70,0x00,0xff,
0x12,0x00,0xff,0xfa,0x00,0x00,0x00,0x00,0x0c,0x00,0x06,0xd1,0x24,0x04,0x04,0x00,
0x00,0x53,0x10,0x24,0x00,0x40,0x28,0x21,0x0c,0x00,0x06,0xbf,0x24,0x04,0x04,0x00,
0x24,0x02,0x00,0x01,0x12,0x82,0x00,0x37,0x00,0x00,0x00,0x00,0x12,0x80,0x00,0x35,
0x00,0x00,0x00,0x00,0x32,0x31,0x00,0x7f,0x12,0x20,0x00,0x04,0x24,0x03,0x00,0x04,
0x27,0xc2,0x00,0x01,0x30,0x5e,0x00,0xff,0x02,0xb1,0xa8,0x21,0x12,0x43,0x00,0x2a,
0x3c,0x03,0xb0,0x03,0x02,0x43,0x10,0x21,0xa0,0x51,0x00,0x34,0x26,0x42,0x00,0x01,
0x30,0x52,0x00,0xff,0x2e,0x43,0x00,0x05,0x14,0x60,0xff,0xd9,0x00,0x00,0x00,0x00,
0x8f,0xa5,0x00,0x10,0x0c,0x00,0x06,0xbf,0x24,0x04,0x06,0x14,0x12,0xa0,0x00,0x0e,
0x3c,0x02,0xb0,0x03,0x13,0xc0,0x00,0x0d,0x34,0x42,0x00,0x3c,0x00,0x15,0x10,0x40,
0x00,0x55,0x10,0x21,0x00,0x02,0x10,0xc0,0x00,0x55,0x10,0x21,0x00,0x02,0xa8,0x80,
0x02,0xbe,0x00,0x1b,0x17,0xc0,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x0d,
0x00,0x00,0xa8,0x12,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x3c,0x3c,0x03,0xb0,0x03,
0x3c,0x04,0xb0,0x03,0xa4,0x55,0x00,0x00,0x34,0x63,0x00,0x1c,0x34,0x84,0x00,0x1d,
0x24,0x02,0x00,0x01,0xa0,0x60,0x00,0x00,0xa0,0x82,0x00,0x00,0x7b,0xbe,0x01,0xfc,
0x7b,0xb6,0x01,0xbc,0x7b,0xb4,0x01,0x7c,0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,
0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x40,0xa2,0xd1,0x00,0x00,0x08,0x00,0x24,0x98,
0x26,0x42,0x00,0x01,0x0c,0x00,0x06,0xd1,0x24,0x04,0x04,0xfc,0x08,0x00,0x24,0x8d,
0x00,0x40,0x88,0x21,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x3c,0x3c,0x04,0xb0,0x03,
0x3c,0x05,0xb0,0x03,0xa4,0x60,0x00,0x00,0x34,0x84,0x00,0x1c,0x34,0xa5,0x00,0x1d,
0x24,0x02,0x00,0x02,0x24,0x03,0x00,0x01,0xa0,0x82,0x00,0x00,0x08,0x00,0x24,0xb7,
0xa0,0xa3,0x00,0x00,0x0c,0x00,0x17,0x99,0x00,0x00,0x00,0x00,0x10,0x40,0xff,0x8b,
0x00,0x10,0x12,0x02,0x3c,0x02,0xb0,0x03,0x3c,0x04,0xb0,0x03,0x34,0x42,0x00,0x3c,
0x34,0x84,0x00,0x14,0x24,0x03,0x00,0x01,0xa4,0x40,0x00,0x00,0x3c,0x01,0xb0,0x03,
0xa0,0x23,0x00,0x3f,0x08,0x00,0x24,0xb7,0xac,0x90,0x00,0x00,0x27,0xbd,0xff,0xd8,
0xaf,0xb0,0x00,0x10,0x30,0xd0,0x00,0xff,0x2e,0x02,0x00,0x2e,0xaf,0xb2,0x00,0x18,
0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x20,0xaf,0xb3,0x00,0x1c,0x30,0xb1,0x00,0xff,
0x14,0x40,0x00,0x06,0x00,0x80,0x90,0x21,0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,
0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x2e,0x13,0x00,0x10,
0x24,0x05,0x00,0x14,0x0c,0x00,0x13,0xa4,0x24,0x06,0x01,0x07,0x12,0x60,0x00,0x38,
0x02,0x00,0x30,0x21,0x8f,0xa2,0x00,0x38,0x30,0xc3,0x00,0x3f,0x3c,0x04,0xb0,0x09,
0x00,0x02,0x14,0x00,0x00,0x43,0x30,0x25,0x34,0x84,0x01,0x60,0x90,0x82,0x00,0x00,
0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xfd,0x24,0x02,0x00,0x01,0x12,0x22,0x00,0x2a,
0x2a,0x22,0x00,0x02,0x14,0x40,0x00,0x24,0x24,0x02,0x00,0x02,0x12,0x22,0x00,0x20,
0x24,0x02,0x00,0x03,0x12,0x22,0x00,0x19,0x00,0x00,0x00,0x00,0x16,0x60,0xff,0xe2,
0x24,0x02,0x00,0x01,0x12,0x22,0x00,0x13,0x2a,0x22,0x00,0x02,0x14,0x40,0x00,0x0d,
0x24,0x02,0x00,0x02,0x12,0x22,0x00,0x09,0x24,0x02,0x00,0x03,0x16,0x22,0xff,0xda,
0x00,0x00,0x00,0x00,0x24,0x04,0x08,0x4c,0x24,0x05,0xff,0xff,0x0c,0x00,0x13,0x5f,
0x3c,0x06,0x0c,0xb8,0x08,0x00,0x24,0xea,0x00,0x00,0x00,0x00,0x08,0x00,0x25,0x12,
0x24,0x04,0x08,0x48,0x16,0x20,0xff,0xd0,0x00,0x00,0x00,0x00,0x08,0x00,0x25,0x12,
0x24,0x04,0x08,0x40,0x08,0x00,0x25,0x12,0x24,0x04,0x08,0x44,0x24,0x04,0x08,0x4c,
0x0c,0x00,0x13,0x5f,0x24,0x05,0xff,0xff,0x08,0x00,0x25,0x07,0x00,0x00,0x00,0x00,
0x08,0x00,0x25,0x20,0x24,0x04,0x08,0x48,0x16,0x20,0xff,0xe0,0x00,0x00,0x00,0x00,
0x08,0x00,0x25,0x20,0x24,0x04,0x08,0x40,0x08,0x00,0x25,0x20,0x24,0x04,0x08,0x44,
0x02,0x40,0x20,0x21,0x0c,0x00,0x25,0x71,0x02,0x20,0x28,0x21,0x08,0x00,0x24,0xf5,
0x00,0x40,0x30,0x21,0x27,0xbd,0xff,0xd8,0x2c,0xc2,0x00,0x2e,0xaf,0xb2,0x00,0x18,
0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x20,0xaf,0xb3,0x00,0x1c,
0x00,0xc0,0x80,0x21,0x30,0xb1,0x00,0xff,0x00,0x80,0x90,0x21,0x14,0x40,0x00,0x07,
0x00,0x00,0x18,0x21,0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,
0x00,0x60,0x10,0x21,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x2e,0x13,0x00,0x10,
0x24,0x05,0x00,0x14,0x0c,0x00,0x13,0xa4,0x24,0x06,0x01,0x07,0x12,0x60,0x00,0x24,
0x02,0x00,0x30,0x21,0x3c,0x03,0xb0,0x09,0x34,0x63,0x01,0x60,0x90,0x62,0x00,0x00,
0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xfd,0x30,0xc5,0x00,0x3f,0x0c,0x00,0x25,0xae,
0x02,0x20,0x20,0x21,0x16,0x60,0x00,0x0a,0x00,0x40,0x80,0x21,0x24,0x02,0x00,0x01,
0x12,0x22,0x00,0x15,0x2a,0x22,0x00,0x02,0x14,0x40,0x00,0x0f,0x24,0x02,0x00,0x02,
0x12,0x22,0x00,0x0b,0x24,0x02,0x00,0x03,0x12,0x22,0x00,0x03,0x00,0x00,0x00,0x00,
0x08,0x00,0x25,0x3d,0x02,0x00,0x18,0x21,0x24,0x04,0x08,0x4c,0x24,0x05,0xff,0xff,
0x0c,0x00,0x13,0x5f,0x3c,0x06,0x0c,0xb8,0x08,0x00,0x25,0x3d,0x02,0x00,0x18,0x21,
0x08,0x00,0x25,0x5f,0x24,0x04,0x08,0x48,0x16,0x20,0xff,0xf5,0x00,0x00,0x00,0x00,
0x08,0x00,0x25,0x5f,0x24,0x04,0x08,0x40,0x08,0x00,0x25,0x5f,0x24,0x04,0x08,0x44,
0x02,0x40,0x20,0x21,0x0c,0x00,0x25,0x71,0x02,0x20,0x28,0x21,0x08,0x00,0x25,0x49,
0x00,0x40,0x30,0x21,0x27,0xbd,0xff,0xe8,0x2c,0xc2,0x00,0x1f,0xaf,0xb0,0x00,0x10,
0xaf,0xbf,0x00,0x14,0x00,0xc0,0x80,0x21,0x14,0x40,0x00,0x1d,0x30,0xa5,0x00,0xff,
0x24,0x02,0x00,0x01,0x10,0xa2,0x00,0x18,0x28,0xa2,0x00,0x02,0x14,0x40,0x00,0x12,
0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x0e,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x07,
0x24,0x04,0x08,0x4c,0x26,0x10,0xff,0xe2,0x02,0x00,0x10,0x21,0x8f,0xbf,0x00,0x14,
0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x24,0x05,0xff,0xff,
0x0c,0x00,0x13,0x5f,0x3c,0x06,0x0d,0xf8,0x08,0x00,0x25,0x82,0x26,0x10,0xff,0xe2,
0x08,0x00,0x25,0x87,0x24,0x04,0x08,0x48,0x14,0xa0,0xff,0xf2,0x24,0x04,0x08,0x40,
0x08,0x00,0x25,0x88,0x24,0x05,0xff,0xff,0x08,0x00,0x25,0x87,0x24,0x04,0x08,0x44,
0x2c,0xc2,0x00,0x10,0x14,0x40,0xff,0xec,0x24,0x02,0x00,0x01,0x10,0xa2,0x00,0x14,
0x28,0xa2,0x00,0x02,0x14,0x40,0x00,0x0e,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x0a,
0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x03,0x24,0x04,0x08,0x4c,0x08,0x00,0x25,0x82,
0x26,0x10,0xff,0xf1,0x24,0x05,0xff,0xff,0x0c,0x00,0x13,0x5f,0x3c,0x06,0x0d,0xb8,
0x08,0x00,0x25,0x82,0x26,0x10,0xff,0xf1,0x08,0x00,0x25,0xa1,0x24,0x04,0x08,0x48,
0x14,0xa0,0xff,0xf6,0x24,0x04,0x08,0x40,0x08,0x00,0x25,0xa2,0x24,0x05,0xff,0xff,
0x08,0x00,0x25,0xa1,0x24,0x04,0x08,0x44,0x27,0xbd,0xff,0xe8,0x30,0x84,0x00,0xff,
0x24,0x02,0x00,0x01,0x10,0x82,0x00,0x39,0xaf,0xbf,0x00,0x10,0x28,0x82,0x00,0x02,
0x14,0x40,0x00,0x27,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0x82,0x00,0x17,
0x00,0xa0,0x30,0x21,0x24,0x02,0x00,0x03,0x10,0x82,0x00,0x05,0x24,0x04,0x08,0x3c,
0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,
0x0c,0x00,0x13,0x5f,0x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x3c,0x3c,0x05,0x80,0x00,
0x0c,0x00,0x13,0x5f,0x00,0x00,0x30,0x21,0x24,0x04,0x08,0x3c,0x3c,0x05,0x80,0x00,
0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x01,0x24,0x04,0x08,0xac,0x0c,0x00,0x13,0x41,
0x24,0x05,0x0f,0xff,0x08,0x00,0x25,0xbc,0x00,0x00,0x00,0x00,0x24,0x04,0x08,0x34,
0x0c,0x00,0x13,0x5f,0x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x34,0x3c,0x05,0x80,0x00,
0x0c,0x00,0x13,0x5f,0x00,0x00,0x30,0x21,0x24,0x04,0x08,0x34,0x3c,0x05,0x80,0x00,
0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x01,0x08,0x00,0x25,0xcb,0x24,0x04,0x08,0xa8,
0x14,0x80,0xff,0xdf,0x00,0xa0,0x30,0x21,0x24,0x04,0x08,0x24,0x0c,0x00,0x13,0x5f,
0x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x24,0x3c,0x05,0x80,0x00,0x0c,0x00,0x13,0x5f,
0x00,0x00,0x30,0x21,0x24,0x04,0x08,0x24,0x3c,0x05,0x80,0x00,0x0c,0x00,0x13,0x5f,
0x24,0x06,0x00,0x01,0x08,0x00,0x25,0xcb,0x24,0x04,0x08,0xa0,0x00,0xa0,0x30,0x21,
0x24,0x04,0x08,0x2c,0x0c,0x00,0x13,0x5f,0x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x2c,
0x3c,0x05,0x80,0x00,0x0c,0x00,0x13,0x5f,0x00,0x00,0x30,0x21,0x24,0x04,0x08,0x2c,
0x3c,0x05,0x80,0x00,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x01,0x08,0x00,0x25,0xcb,
0x24,0x04,0x08,0xa4,0x3c,0x05,0x00,0x14,0x3c,0x02,0xb0,0x05,0x34,0x42,0x04,0x20,
0x3c,0x06,0xc0,0x00,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0x34,0xa5,0x17,0x09,
0xac,0x45,0x00,0x00,0x34,0xc6,0x05,0x07,0x34,0x63,0x04,0x24,0x34,0x84,0x02,0x28,
0x3c,0x07,0xb0,0x05,0x24,0x02,0x00,0x20,0xac,0x66,0x00,0x00,0x34,0xe7,0x04,0x50,
0xa0,0x82,0x00,0x00,0x90,0xe2,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x03,
0x10,0x40,0xff,0xfc,0x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
0x93,0x85,0x81,0xf1,0x24,0x02,0x00,0x01,0x14,0xa2,0x00,0x53,0x00,0x80,0x40,0x21,
0x8c,0x89,0x00,0x04,0x3c,0x02,0xb0,0x01,0x01,0x22,0x30,0x21,0x8c,0xc3,0x00,0x04,
0x3c,0x02,0x01,0x00,0x00,0x62,0x10,0x24,0x10,0x40,0x00,0x4b,0x30,0x62,0x00,0x08,
0x10,0x45,0x00,0x59,0x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x38,0x24,0x03,0x00,0xb4,
0x30,0x44,0x00,0xff,0x10,0x83,0x00,0x61,0x24,0x02,0x00,0xc4,0x10,0x82,0x00,0x54,
0x24,0x02,0x00,0x94,0x10,0x82,0x00,0x45,0x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x38,
0x00,0x00,0x00,0x00,0x30,0x47,0xff,0xff,0x30,0xe3,0x40,0xff,0x24,0x02,0x40,0x88,
0x14,0x62,0x00,0x39,0x30,0xe3,0x03,0x00,0x24,0x02,0x03,0x00,0x10,0x62,0x00,0x38,
0x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x56,0x00,0x00,0x00,0x00,0x30,0x47,0xff,0xff,
0x30,0xe2,0x00,0x80,0x14,0x40,0x00,0x30,0x3c,0x02,0xb0,0x01,0x01,0x22,0x30,0x21,
0x94,0xc3,0x00,0x60,0x24,0x02,0x00,0x08,0x14,0x43,0x00,0x3b,0x00,0x00,0x00,0x00,
0x90,0xc2,0x00,0x62,0x24,0x03,0x00,0x04,0x00,0x02,0x39,0x02,0x10,0xe3,0x00,0x15,
0x24,0x02,0x00,0x06,0x14,0xe2,0x00,0x34,0x00,0x00,0x00,0x00,0x8d,0x05,0x01,0xac,
0x94,0xc4,0x00,0x66,0x27,0x82,0x89,0x68,0x00,0x05,0x28,0x80,0x30,0x87,0xff,0xff,
0x00,0xa2,0x28,0x21,0x00,0x07,0x1a,0x00,0x8c,0xa4,0x00,0x00,0x00,0x07,0x12,0x02,
0x00,0x43,0x10,0x25,0x24,0x42,0x00,0x5e,0x24,0x03,0xc0,0x00,0x30,0x47,0xff,0xff,
0x00,0x83,0x20,0x24,0x00,0x87,0x20,0x25,0xac,0xa4,0x00,0x00,0x08,0x00,0x26,0x76,
0xad,0x07,0x00,0x10,0x8d,0x05,0x01,0xac,0x94,0xc4,0x00,0x64,0x27,0x82,0x89,0x68,
0x00,0x05,0x28,0x80,0x30,0x87,0xff,0xff,0x00,0xa2,0x28,0x21,0x00,0x07,0x1a,0x00,
0x8c,0xa4,0x00,0x00,0x00,0x07,0x12,0x02,0x00,0x43,0x10,0x25,0x24,0x42,0x00,0x36,
0x3c,0x03,0xff,0xff,0x30,0x47,0xff,0xff,0x00,0x83,0x20,0x24,0x00,0x87,0x20,0x25,
0xac,0xa4,0x00,0x00,0xad,0x07,0x00,0x10,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
0x94,0xc2,0x00,0x50,0x08,0x00,0x26,0x34,0x30,0x47,0xff,0xff,0x8d,0x04,0x01,0xac,
0x27,0x83,0x89,0x68,0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x00,
0x3c,0x03,0xff,0xff,0x00,0x43,0x10,0x24,0x34,0x42,0x00,0x2e,0xac,0x82,0x00,0x00,
0x24,0x03,0x00,0x2e,0xad,0x03,0x00,0x10,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
0x8d,0x04,0x01,0xac,0x27,0x83,0x89,0x68,0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,
0x8c,0x82,0x00,0x00,0x3c,0x03,0xff,0xff,0x00,0x43,0x10,0x24,0x34,0x42,0x00,0x0e,
0x24,0x03,0x00,0x0e,0x08,0x00,0x26,0x75,0xac,0x82,0x00,0x00,0x8d,0x04,0x01,0xac,
0x27,0x83,0x89,0x68,0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x00,
0x3c,0x03,0xff,0xff,0x00,0x43,0x10,0x24,0x34,0x42,0x00,0x14,0x24,0x03,0x00,0x14,
0x08,0x00,0x26,0x75,0xac,0x82,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
0x30,0xc6,0x00,0xff,0x00,0x06,0x48,0x40,0x01,0x26,0x10,0x21,0x00,0x02,0x10,0x80,
0x27,0x8b,0xbc,0x30,0x27,0x83,0xbc,0x36,0x00,0x4b,0x40,0x21,0x00,0x43,0x10,0x21,
0x94,0x47,0x00,0x00,0x30,0xa2,0x3f,0xff,0x10,0xe2,0x00,0x29,0x30,0x8a,0xff,0xff,
0x95,0x02,0x00,0x02,0x24,0x03,0x00,0x01,0x00,0x02,0x11,0x82,0x30,0x42,0x00,0x01,
0x10,0x43,0x00,0x18,0x00,0x00,0x00,0x00,0x01,0x26,0x10,0x21,0x00,0x02,0x10,0x80,
0x00,0x4b,0x30,0x21,0x94,0xc4,0x00,0x02,0x27,0x83,0xbc,0x36,0x27,0x85,0xbc,0x34,
0x00,0x45,0x28,0x21,0x30,0x84,0xff,0xdf,0x00,0x43,0x10,0x21,0xa4,0xc4,0x00,0x02,
0xa4,0x40,0x00,0x00,0xa4,0xa0,0x00,0x00,0x94,0xc3,0x00,0x02,0x3c,0x04,0xb0,0x01,
0x01,0x44,0x20,0x21,0x30,0x63,0xff,0xbf,0xa4,0xc3,0x00,0x02,0xa0,0xc0,0x00,0x00,
0x8c,0x82,0x00,0x04,0x24,0x03,0xf0,0xff,0x00,0x43,0x10,0x24,0x03,0xe0,0x00,0x08,
0xac,0x82,0x00,0x04,0x24,0x02,0xc0,0x00,0x91,0x04,0x00,0x01,0x00,0xa2,0x10,0x24,
0x00,0x47,0x28,0x25,0x3c,0x03,0xb0,0x01,0x24,0x02,0x00,0x02,0x14,0x82,0xff,0xe2,
0x01,0x43,0x18,0x21,0xac,0x65,0x00,0x00,0x08,0x00,0x26,0xa3,0x01,0x26,0x10,0x21,
0x08,0x00,0x26,0xa3,0x01,0x26,0x10,0x21,0x93,0x83,0x81,0xf1,0x24,0x02,0x00,0x01,
0x14,0x62,0x00,0x0d,0x3c,0x02,0xb0,0x01,0x8c,0x84,0x00,0x04,0x3c,0x06,0xb0,0x09,
0x00,0x82,0x20,0x21,0x8c,0x85,0x00,0x08,0x8c,0x83,0x00,0x04,0x3c,0x02,0x01,0x00,
0x34,0xc6,0x01,0x00,0x00,0x62,0x18,0x24,0x14,0x60,0x00,0x05,0x30,0xa5,0x20,0x00,
0x24,0x02,0x00,0x06,0xa0,0xc2,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
0x3c,0x03,0xb0,0x09,0x10,0xa0,0xff,0xfc,0x34,0x63,0x01,0x00,0x24,0x02,0x00,0x0e,
0x08,0x00,0x26,0xd6,0xa0,0x62,0x00,0x00,0x3c,0x02,0xb0,0x01,0x30,0xa5,0xff,0xff,
0x00,0xa2,0x28,0x21,0x8c,0xa3,0x00,0x00,0x3c,0x02,0x10,0x00,0x00,0x80,0x30,0x21,
0x00,0x62,0x18,0x24,0x8c,0xa2,0x00,0x04,0x10,0x60,0x00,0x04,0x00,0x00,0x00,0x00,
0x30,0x42,0x80,0x00,0x10,0x40,0x00,0x13,0x00,0x00,0x00,0x00,0x8c,0xc2,0x01,0xa8,
0x00,0x00,0x00,0x00,0x24,0x44,0x00,0x01,0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x40,
0x00,0x83,0x10,0x0a,0x93,0x83,0x81,0xf0,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,
0x00,0x82,0x20,0x23,0x24,0x63,0xff,0xff,0xac,0xc4,0x01,0xa8,0xa3,0x83,0x81,0xf0,
0x8c,0xc4,0x01,0xac,0x8c,0xc2,0x01,0xa8,0x00,0x00,0x00,0x00,0x00,0x44,0x10,0x26,
0x00,0x02,0x10,0x2b,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
0x34,0x63,0x00,0x73,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,
0x14,0x40,0x00,0x04,0x00,0x00,0x00,0x00,0xa3,0x80,0x81,0xf1,0x03,0xe0,0x00,0x08,
0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0xa3,0x82,0x81,0xf1,0x03,0xe0,0x00,0x08,
0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x04,0x3c,0x05,0xb0,0x01,0x00,0x80,0x50,0x21,
0x00,0x45,0x10,0x21,0x8c,0x43,0x00,0x04,0x24,0x02,0x00,0x05,0x00,0x03,0x1a,0x02,
0x30,0x69,0x00,0x0f,0x11,0x22,0x00,0x0b,0x24,0x02,0x00,0x07,0x11,0x22,0x00,0x09,
0x24,0x02,0x00,0x0a,0x11,0x22,0x00,0x07,0x24,0x02,0x00,0x0b,0x11,0x22,0x00,0x05,
0x24,0x02,0x00,0x01,0x93,0x83,0x81,0xf0,0x3c,0x04,0xb0,0x06,0x10,0x62,0x00,0x03,
0x34,0x84,0x80,0x18,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x02,0x17,0x02,0x14,0x40,0xff,0xfa,0x00,0x00,0x00,0x00,
0x8d,0x43,0x01,0xa8,0x27,0x82,0x89,0x68,0x00,0x03,0x18,0x80,0x00,0x6a,0x20,0x21,
0x8c,0x87,0x00,0xa8,0x00,0x62,0x18,0x21,0x8c,0x68,0x00,0x00,0x00,0xe5,0x28,0x21,
0x8c,0xa9,0x00,0x00,0x3c,0x02,0xff,0xff,0x27,0x83,0x8a,0x68,0x01,0x22,0x10,0x24,
0x00,0x48,0x10,0x25,0xac,0xa2,0x00,0x00,0x8d,0x44,0x01,0xa8,0x00,0x07,0x30,0xc2,
0x3c,0x02,0x00,0x80,0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x00,0x06,0x32,0x00,
0x8c,0xa9,0x00,0x04,0x00,0xc2,0x30,0x25,0x8c,0x82,0x00,0x00,0x3c,0x03,0x80,0x00,
0x01,0x22,0x10,0x25,0x00,0x43,0x10,0x25,0xac,0xa2,0x00,0x04,0xaf,0x87,0xbc,0x20,
0x8c,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0xaf,0x82,0xbc,0x28,0x8c,0xa3,0x00,0x04,
0x3c,0x01,0xb0,0x07,0xac,0x26,0x80,0x18,0x8d,0x42,0x01,0xa8,0xaf,0x83,0xbc,0x24,
0x93,0x85,0x81,0xf0,0x24,0x44,0x00,0x01,0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x40,
0x00,0x83,0x10,0x0a,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x24,0xa5,0xff,0xff,
0x00,0x82,0x20,0x23,0xad,0x44,0x01,0xa8,0xa3,0x85,0x81,0xf0,0x08,0x00,0x27,0x21,
0x00,0x00,0x00,0x00,0x3c,0x05,0xb0,0x03,0x3c,0x02,0x80,0x01,0x34,0xa5,0x00,0x20,
0x24,0x42,0x9d,0x64,0xac,0xa2,0x00,0x00,0x24,0x02,0x00,0x02,0x24,0x03,0x00,0x20,
0xac,0x82,0x00,0x64,0x3c,0x02,0x80,0x01,0xac,0x83,0x00,0x60,0xac,0x80,0x00,0x00,
0xac,0x80,0x00,0x04,0xac,0x80,0x00,0x08,0xac,0x80,0x00,0x4c,0xac,0x80,0x00,0x50,
0xac,0x80,0x00,0x54,0xac,0x80,0x00,0x0c,0xac,0x80,0x00,0x58,0xa0,0x80,0x00,0x5c,
0x24,0x42,0x9e,0x28,0x24,0x83,0x00,0x68,0x24,0x05,0x00,0x0f,0x24,0xa5,0xff,0xff,
0xac,0x62,0x00,0x00,0x04,0xa1,0xff,0xfd,0x24,0x63,0x00,0x04,0x3c,0x02,0x80,0x01,
0x24,0x42,0x9f,0x10,0xac,0x82,0x00,0x78,0x3c,0x03,0x80,0x01,0x3c,0x02,0x80,0x01,
0x24,0x63,0xa0,0x9c,0x24,0x42,0xa0,0x08,0xac,0x83,0x00,0x88,0xac,0x82,0x00,0x98,
0x3c,0x03,0x80,0x01,0x3c,0x02,0x80,0x01,0x24,0x63,0xa1,0x44,0x24,0x42,0xa2,0x5c,
0xac,0x83,0x00,0xa0,0xac,0x82,0x00,0xa4,0xa0,0x80,0x01,0xba,0xac,0x80,0x01,0xa8,
0xac,0x80,0x01,0xac,0xac,0x80,0x01,0xb0,0xac,0x80,0x01,0xb4,0xa0,0x80,0x01,0xb8,
0x03,0xe0,0x00,0x08,0xa0,0x80,0x01,0xb9,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,
0x34,0x63,0x00,0x20,0x24,0x42,0x9e,0x28,0x03,0xe0,0x00,0x08,0xac,0x62,0x00,0x00,
0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x34,0x42,0x00,0x20,0x24,0x63,0x9e,0x40,
0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x10,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x11,
0x00,0x80,0x28,0x21,0x8c,0x82,0x00,0x14,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0d,
0x00,0x00,0x00,0x00,0x8c,0x84,0x00,0x10,0x8c,0xa3,0x00,0x14,0x8c,0xa2,0x00,0x04,
0x00,0x83,0x20,0x21,0x00,0x44,0x10,0x21,0x30,0x43,0x00,0xff,0x00,0x03,0x18,0x2b,
0x00,0x02,0x12,0x02,0x00,0x43,0x10,0x21,0x00,0x02,0x12,0x00,0x30,0x42,0x3f,0xff,
0xac,0xa2,0x00,0x04,0xac,0xa0,0x00,0x00,0xac,0xa0,0x00,0x4c,0xac,0xa0,0x00,0x50,
0xac,0xa0,0x00,0x54,0x03,0xe0,0x00,0x08,0xac,0xa0,0x00,0x0c,0x3c,0x03,0xb0,0x03,
0x3c,0x02,0x80,0x01,0x34,0x63,0x00,0x20,0x24,0x42,0x9e,0xbc,0xac,0x62,0x00,0x00,
0x8c,0x86,0x00,0x04,0x3c,0x02,0xb0,0x01,0x24,0x03,0x00,0x01,0x00,0xc2,0x10,0x21,
0x8c,0x45,0x00,0x00,0xac,0x83,0x00,0x4c,0x00,0x05,0x14,0x02,0x30,0xa3,0x3f,0xff,
0x30,0x42,0x00,0xff,0xac,0x83,0x00,0x10,0xac,0x82,0x00,0x14,0x8c,0x83,0x00,0x14,
0xac,0x85,0x00,0x40,0x00,0xc3,0x30,0x21,0x03,0xe0,0x00,0x08,0xac,0x86,0x00,0x08,
0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,
0x24,0x63,0x9f,0x10,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,
0x8c,0x82,0x00,0x4c,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0a,0x00,0x80,0x80,0x21,
0xae,0x00,0x00,0x00,0xae,0x00,0x00,0x4c,0xae,0x00,0x00,0x50,0xae,0x00,0x00,0x54,
0xae,0x00,0x00,0x0c,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,
0x27,0xbd,0x00,0x18,0x0c,0x00,0x27,0xaf,0x00,0x00,0x00,0x00,0x08,0x00,0x27,0xd1,
0xae,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,
0x34,0x42,0x00,0x20,0x24,0x63,0x9f,0x74,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,
0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x4c,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x16,
0x00,0x80,0x80,0x21,0x8e,0x03,0x00,0x08,0x3c,0x02,0xb0,0x01,0x8e,0x04,0x00,0x44,
0x00,0x62,0x18,0x21,0x90,0x65,0x00,0x00,0x24,0x02,0x00,0x01,0xae,0x02,0x00,0x50,
0x30,0xa3,0x00,0xff,0x00,0x03,0x10,0x82,0x00,0x04,0x23,0x02,0x30,0x84,0x00,0x0f,
0x30,0x42,0x00,0x03,0x00,0x03,0x19,0x02,0xae,0x04,0x00,0x34,0xae,0x02,0x00,0x2c,
0xae,0x03,0x00,0x30,0xa2,0x05,0x00,0x48,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,
0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x27,0xaf,0x00,0x00,0x00,0x00,
0x08,0x00,0x27,0xe9,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,
0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,0x24,0x63,0xa0,0x08,0xaf,0xb0,0x00,0x10,
0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x50,0x00,0x00,0x00,0x00,
0x10,0x40,0x00,0x16,0x00,0x80,0x80,0x21,0x92,0x03,0x00,0x44,0x8e,0x02,0x00,0x40,
0x83,0x85,0x8b,0xd4,0x92,0x04,0x00,0x41,0x30,0x63,0x00,0x01,0x00,0x02,0x16,0x02,
0xae,0x04,0x00,0x14,0x00,0x00,0x30,0x21,0xae,0x02,0x00,0x18,0x10,0xa0,0x00,0x04,
0xae,0x03,0x00,0x3c,0x10,0x60,0x00,0x03,0x24,0x02,0x00,0x01,0x24,0x06,0x00,0x01,
0x24,0x02,0x00,0x01,0xa3,0x86,0x8b,0xd4,0x8f,0xbf,0x00,0x14,0xae,0x02,0x00,0x54,
0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x27,0xdd,
0x00,0x00,0x00,0x00,0x08,0x00,0x28,0x0e,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,
0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,0x24,0x63,0xa0,0x9c,
0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x50,
0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x1b,0x00,0x80,0x80,0x21,0x3c,0x02,0xb0,0x03,
0x8c,0x42,0x00,0x00,0x92,0x04,0x00,0x44,0x8e,0x03,0x00,0x40,0x83,0x86,0x8b,0xd4,
0x92,0x05,0x00,0x41,0x30,0x42,0x08,0x00,0x30,0x84,0x00,0x01,0x00,0x02,0x12,0xc2,
0x00,0x03,0x1e,0x02,0x00,0x82,0x20,0x25,0xae,0x05,0x00,0x14,0x00,0x00,0x38,0x21,
0xae,0x03,0x00,0x18,0x10,0xc0,0x00,0x04,0xae,0x04,0x00,0x3c,0x10,0x80,0x00,0x03,
0x24,0x02,0x00,0x01,0x24,0x07,0x00,0x01,0x24,0x02,0x00,0x01,0xa3,0x87,0x8b,0xd4,
0x8f,0xbf,0x00,0x14,0xae,0x02,0x00,0x54,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,
0x27,0xbd,0x00,0x18,0x0c,0x00,0x27,0xdd,0x00,0x00,0x00,0x00,0x08,0x00,0x28,0x33,
0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,
0x34,0x42,0x00,0x20,0x24,0x63,0xa1,0x44,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,
0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x54,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x37,
0x00,0x80,0x80,0x21,0x8e,0x04,0x00,0x04,0x8e,0x03,0x00,0x44,0x3c,0x02,0x80,0x00,
0x3c,0x05,0xb0,0x01,0x34,0x42,0x00,0x10,0x00,0x85,0x20,0x21,0x00,0x62,0x18,0x25,
0xac,0x83,0x00,0x04,0x8e,0x02,0x00,0x04,0x8e,0x03,0x01,0xac,0x02,0x00,0x20,0x21,
0x00,0x45,0x10,0x21,0x8c,0x46,0x00,0x00,0x00,0x03,0x18,0x80,0x27,0x82,0x89,0x68,
0x00,0x62,0x18,0x21,0xac,0x66,0x00,0x00,0x8e,0x02,0x00,0x04,0x8e,0x03,0x01,0xac,
0x00,0x45,0x10,0x21,0x8c,0x46,0x00,0x04,0x00,0x03,0x18,0x80,0x27,0x82,0x8a,0x68,
0x00,0x62,0x18,0x21,0x0c,0x00,0x26,0x10,0xac,0x66,0x00,0x00,0x8e,0x03,0x01,0xac,
0x8e,0x07,0x00,0x04,0x3c,0x06,0xb0,0x03,0x24,0x65,0x00,0x01,0x28,0xa4,0x00,0x00,
0x24,0x62,0x00,0x40,0x00,0xa4,0x10,0x0a,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,
0x00,0x03,0x18,0x80,0x00,0xa2,0x28,0x23,0x00,0x70,0x18,0x21,0xae,0x05,0x01,0xac,
0xac,0x67,0x00,0xa8,0x34,0xc6,0x00,0x30,0x8c,0xc3,0x00,0x00,0x93,0x82,0x81,0xf0,
0x02,0x00,0x20,0x21,0x24,0x63,0x00,0x01,0x24,0x42,0x00,0x01,0xac,0xc3,0x00,0x00,
0xa3,0x82,0x81,0xf0,0x0c,0x00,0x27,0x90,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x14,
0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x28,0x27,
0x00,0x00,0x00,0x00,0x08,0x00,0x28,0x5d,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,
0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,0x24,0x63,0xa2,0x5c,
0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x54,
0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x37,0x00,0x80,0x80,0x21,0x8e,0x04,0x00,0x04,
0x8e,0x03,0x00,0x44,0x3c,0x02,0x80,0x00,0x3c,0x05,0xb0,0x01,0x34,0x42,0x00,0x10,
0x00,0x85,0x20,0x21,0x00,0x62,0x18,0x25,0xac,0x83,0x00,0x04,0x8e,0x02,0x00,0x04,
0x8e,0x03,0x01,0xac,0x02,0x00,0x20,0x21,0x00,0x45,0x10,0x21,0x8c,0x46,0x00,0x00,
0x00,0x03,0x18,0x80,0x27,0x82,0x89,0x68,0x00,0x62,0x18,0x21,0xac,0x66,0x00,0x00,
0x8e,0x02,0x00,0x04,0x8e,0x03,0x01,0xac,0x00,0x45,0x10,0x21,0x8c,0x46,0x00,0x04,
0x00,0x03,0x18,0x80,0x27,0x82,0x8a,0x68,0x00,0x62,0x18,0x21,0x0c,0x00,0x26,0x10,
0xac,0x66,0x00,0x00,0x8e,0x03,0x01,0xac,0x8e,0x07,0x00,0x04,0x3c,0x06,0xb0,0x03,
0x24,0x65,0x00,0x01,0x28,0xa4,0x00,0x00,0x24,0x62,0x00,0x40,0x00,0xa4,0x10,0x0a,
0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x00,0x03,0x18,0x80,0x00,0xa2,0x28,0x23,
0x00,0x70,0x18,0x21,0xae,0x05,0x01,0xac,0xac,0x67,0x00,0xa8,0x34,0xc6,0x00,0x30,
0x8c,0xc3,0x00,0x00,0x93,0x82,0x81,0xf0,0x02,0x00,0x20,0x21,0x24,0x63,0x00,0x01,
0x24,0x42,0x00,0x01,0xac,0xc3,0x00,0x00,0xa3,0x82,0x81,0xf0,0x0c,0x00,0x27,0x90,
0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,
0x27,0xbd,0x00,0x18,0x0c,0x00,0x28,0x27,0x00,0x00,0x00,0x00,0x08,0x00,0x28,0xa3,
0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x34,0x42,0x00,0x20,
0x24,0x63,0xa3,0x74,0x27,0xbd,0xff,0xe0,0xac,0x43,0x00,0x00,0x3c,0x02,0x80,0x01,
0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x1c,
0x00,0x80,0x80,0x21,0x24,0x52,0x9e,0x28,0x00,0x00,0x88,0x21,0x3c,0x03,0xb0,0x09,
0x34,0x63,0x00,0x06,0x8e,0x06,0x00,0x04,0x90,0x62,0x00,0x00,0x00,0x06,0x22,0x02,
0x00,0x44,0x10,0x23,0x24,0x44,0x00,0x40,0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x7f,
0x00,0x83,0x10,0x0a,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x24,0x84,0xff,0xff,
0x10,0x44,0x00,0x68,0x00,0x00,0x28,0x21,0x3c,0x02,0xb0,0x01,0x00,0xc2,0x10,0x21,
0x8c,0x44,0x00,0x04,0x3c,0x03,0x7c,0x00,0x34,0x63,0x00,0xf0,0x00,0x83,0x18,0x24,
0xae,0x04,0x00,0x44,0x8c,0x44,0x00,0x00,0x10,0x60,0x00,0x69,0x00,0x00,0x38,0x21,
0x3c,0x09,0xb0,0x03,0x3c,0x06,0x7c,0x00,0x35,0x29,0x00,0x99,0x3c,0x0a,0xb0,0x01,
0x24,0x08,0x00,0x40,0x34,0xc6,0x00,0xf0,0x3c,0x0b,0xff,0xff,0x3c,0x0c,0x28,0x38,
0x16,0x20,0x00,0x06,0x24,0xa5,0x00,0x01,0x93,0x82,0x81,0xf6,0x24,0x11,0x00,0x01,
0x24,0x42,0x00,0x01,0xa1,0x22,0x00,0x00,0xa3,0x82,0x81,0xf6,0x8e,0x02,0x00,0x04,
0x24,0x07,0x00,0x01,0x24,0x42,0x01,0x00,0x30,0x42,0x3f,0xff,0xae,0x02,0x00,0x04,
0x00,0x4a,0x10,0x21,0x8c,0x43,0x00,0x04,0x00,0x00,0x00,0x00,0xae,0x03,0x00,0x44,
0x8c,0x44,0x00,0x00,0x10,0xa8,0x00,0x2d,0x00,0x66,0x18,0x24,0x14,0x60,0xff,0xec,
0x00,0x8b,0x10,0x24,0x14,0x4c,0xff,0xea,0x24,0x02,0x00,0x01,0x10,0xe2,0x00,0x2f,
0x3c,0x03,0xb0,0x09,0x8e,0x02,0x00,0x44,0x8e,0x04,0x00,0x60,0x00,0x02,0x1e,0x42,
0x00,0x02,0x12,0x02,0x30,0x42,0x00,0x0f,0x30,0x63,0x00,0x01,0xae,0x02,0x00,0x00,
0x10,0x44,0x00,0x1a,0xae,0x03,0x00,0x58,0x8e,0x02,0x00,0x64,0x8e,0x04,0x00,0x58,
0x00,0x00,0x00,0x00,0x10,0x82,0x00,0x05,0x00,0x00,0x00,0x00,0xae,0x00,0x00,0x4c,
0xae,0x00,0x00,0x50,0xae,0x00,0x00,0x54,0xae,0x00,0x00,0x0c,0x8e,0x03,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x03,0x10,0x80,0x00,0x50,0x10,0x21,0x8c,0x42,0x00,0x68,
0x00,0x00,0x00,0x00,0x10,0x52,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x40,0xf8,0x09,
0x02,0x00,0x20,0x21,0x8e,0x04,0x00,0x58,0x8e,0x03,0x00,0x00,0x00,0x00,0x00,0x00,
0xae,0x03,0x00,0x60,0x08,0x00,0x28,0xeb,0xae,0x04,0x00,0x64,0x8e,0x02,0x00,0x64,
0x00,0x00,0x00,0x00,0x14,0x62,0xff,0xe5,0x00,0x00,0x00,0x00,0x7a,0x02,0x0d,0x7c,
0x8f,0xbf,0x00,0x1c,0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x00,0x43,0x10,0x26,
0x00,0x02,0x10,0x2b,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x34,0x63,0x00,0x06,
0x8e,0x04,0x00,0x04,0x90,0x62,0x00,0x00,0x00,0x04,0x22,0x02,0x00,0x44,0x10,0x23,
0x24,0x44,0x00,0x40,0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x7f,0x00,0x83,0x10,0x0a,
0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x00,0x82,0x20,0x23,0x14,0x87,0xff,0xc5,
0x00,0x00,0x00,0x00,0x8e,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0x62,0x00,0x03,
0x14,0x40,0x00,0x05,0x24,0x02,0x00,0x0d,0x10,0x62,0x00,0x03,0x24,0x02,0x00,0x01,
0x08,0x00,0x29,0x4b,0xa2,0x02,0x00,0x5c,0x08,0x00,0x29,0x4b,0xa2,0x00,0x00,0x5c,
0x3c,0x02,0xff,0xff,0x00,0x82,0x10,0x24,0x3c,0x03,0x28,0x38,0x14,0x43,0xff,0x94,
0x24,0x02,0x00,0x01,0x08,0x00,0x29,0x23,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,
0x3c,0x03,0x80,0x01,0x34,0x42,0x00,0x20,0x24,0x63,0xa5,0xcc,0xac,0x43,0x00,0x00,
0x8c,0x83,0x01,0xa8,0x8c,0x82,0x01,0xac,0x00,0x80,0x40,0x21,0x10,0x62,0x00,0x20,
0x00,0x00,0x20,0x21,0x93,0x82,0x81,0xf1,0x00,0x03,0x28,0x80,0x3c,0x07,0xb0,0x06,
0x00,0xa8,0x18,0x21,0x24,0x04,0x00,0x01,0x8c,0x66,0x00,0xa8,0x10,0x44,0x00,0x1c,
0x34,0xe7,0x80,0x18,0x3c,0x05,0xb0,0x01,0xaf,0x86,0xbc,0x20,0x00,0xc5,0x28,0x21,
0x8c,0xa3,0x00,0x00,0x00,0x06,0x20,0xc2,0x3c,0x02,0x00,0x80,0x00,0x04,0x22,0x00,
0x00,0x82,0x20,0x25,0xaf,0x83,0xbc,0x28,0x8c,0xa2,0x00,0x04,0xac,0xe4,0x00,0x00,
0x8d,0x03,0x01,0xa8,0xaf,0x82,0xbc,0x24,0x24,0x64,0x00,0x01,0x04,0x80,0x00,0x0a,
0x00,0x80,0x10,0x21,0x00,0x02,0x11,0x83,0x8d,0x03,0x01,0xac,0x00,0x02,0x11,0x80,
0x00,0x82,0x10,0x23,0x00,0x43,0x18,0x26,0xad,0x02,0x01,0xa8,0x00,0x03,0x20,0x2b,
0x03,0xe0,0x00,0x08,0x00,0x80,0x10,0x21,0x08,0x00,0x29,0x95,0x24,0x62,0x00,0x40,
0x27,0x82,0x89,0x68,0x00,0x06,0x20,0xc2,0x00,0x04,0x22,0x00,0x00,0xa2,0x48,0x21,
0x3c,0x02,0x00,0x80,0x00,0x82,0x58,0x25,0x93,0x82,0x81,0xf0,0x3c,0x0a,0xb0,0x06,
0x3c,0x03,0xb0,0x01,0x2c,0x42,0x00,0x02,0x00,0xc3,0x38,0x21,0x35,0x4a,0x80,0x18,
0x14,0x40,0xff,0xef,0x00,0x00,0x20,0x21,0x8c,0xe5,0x00,0x00,0x8d,0x23,0x00,0x00,
0x24,0x02,0xc0,0x00,0x00,0xa2,0x10,0x24,0x00,0x43,0x10,0x25,0xac,0xe2,0x00,0x00,
0x8d,0x04,0x01,0xa8,0x27,0x83,0x8a,0x68,0x8c,0xe5,0x00,0x04,0x00,0x04,0x20,0x80,
0x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x00,0x3c,0x03,0x80,0x00,0x00,0xa2,0x10,0x25,
0x00,0x43,0x10,0x25,0xac,0xe2,0x00,0x04,0xaf,0x86,0xbc,0x20,0x8c,0xe2,0x00,0x00,
0x93,0x85,0x81,0xf0,0xaf,0x82,0xbc,0x28,0x8c,0xe3,0x00,0x04,0xad,0x4b,0x00,0x00,
0x8d,0x02,0x01,0xa8,0xaf,0x83,0xbc,0x24,0x24,0xa5,0xff,0xff,0x24,0x44,0x00,0x01,
0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x40,0x00,0x83,0x10,0x0a,0x00,0x02,0x11,0x83,
0x00,0x02,0x11,0x80,0x00,0x82,0x20,0x23,0xad,0x04,0x01,0xa8,0xa3,0x85,0x81,0xf0,
0x79,0x02,0x0d,0x7c,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x26,0x08,0x00,0x29,0x9c,
0x00,0x02,0x20,0x2b,0x3c,0x04,0xb0,0x03,0x3c,0x06,0xb0,0x07,0x3c,0x02,0x80,0x01,
0x34,0xc6,0x00,0x18,0x34,0x84,0x00,0x20,0x24,0x42,0xa7,0x54,0x24,0x03,0xff,0x83,
0xac,0x82,0x00,0x00,0xa0,0xc3,0x00,0x00,0x90,0xc4,0x00,0x00,0x27,0xbd,0xff,0xf8,
0x3c,0x03,0xb0,0x07,0x24,0x02,0xff,0x82,0xa3,0xa4,0x00,0x00,0xa0,0x62,0x00,0x00,
0x90,0x64,0x00,0x00,0x3c,0x02,0xb0,0x07,0x34,0x42,0x00,0x08,0xa3,0xa4,0x00,0x01,
0xa0,0x40,0x00,0x00,0x90,0x43,0x00,0x00,0x24,0x02,0x00,0x03,0x3c,0x05,0xb0,0x07,
0xa3,0xa3,0x00,0x00,0xa0,0xc2,0x00,0x00,0x90,0xc4,0x00,0x00,0x34,0xa5,0x00,0x10,
0x24,0x02,0x00,0x06,0x3c,0x03,0xb0,0x07,0xa3,0xa4,0x00,0x00,0x34,0x63,0x00,0x38,
0xa0,0xa2,0x00,0x00,0x90,0x64,0x00,0x00,0x3c,0x02,0xb0,0x07,0x34,0x42,0x00,0x20,
0xa3,0xa4,0x00,0x00,0xa0,0xa0,0x00,0x00,0x90,0xa3,0x00,0x00,0xaf,0x82,0xbf,0x30,
0xa3,0xa3,0x00,0x00,0xa0,0x40,0x00,0x00,0x90,0x43,0x00,0x00,0x03,0xe0,0x00,0x08,
0x27,0xbd,0x00,0x08,};
u8 Rtl8192PciEFwDataArray[DataArrayLengthPciE] = {
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x10,0x00,0x08,0x00,
0x02,0xe9,0x01,0x74,0x02,0xab,0x01,0xc7,0x01,0x55,0x00,0xe4,0x00,0xab,0x00,0x72,
0x00,0x55,0x00,0x4c,0x00,0x4c,0x00,0x4c,0x00,0x4c,0x00,0x4c,0x02,0x76,0x01,0x3b,
0x00,0xd2,0x00,0x9e,0x00,0x69,0x00,0x4f,0x00,0x46,0x00,0x3f,0x01,0x3b,0x00,0x9e,
0x00,0x69,0x00,0x4f,0x00,0x35,0x00,0x27,0x00,0x23,0x00,0x20,0x01,0x2f,0x00,0x98,
0x00,0x65,0x00,0x4c,0x00,0x33,0x00,0x26,0x00,0x22,0x00,0x1e,0x00,0x98,0x00,0x4c,
0x00,0x33,0x00,0x26,0x00,0x19,0x00,0x13,0x00,0x11,0x00,0x0f,0x02,0x39,0x01,0x1c,
0x00,0xbd,0x00,0x8e,0x00,0x5f,0x00,0x47,0x00,0x3f,0x00,0x39,0x01,0x1c,0x00,0x8e,
0x00,0x5f,0x00,0x47,0x00,0x2f,0x00,0x23,0x00,0x20,0x00,0x1c,0x01,0x11,0x00,0x89,
0x00,0x5b,0x00,0x44,0x00,0x2e,0x00,0x22,0x00,0x1e,0x00,0x1b,0x00,0x89,0x00,0x44,
0x00,0x2e,0x00,0x22,0x00,0x17,0x00,0x11,0x00,0x0f,0x00,0x0e,0x02,0xab,0x02,0xab,
0x02,0x66,0x02,0x66,0x07,0x06,0x06,0x06,0x05,0x06,0x07,0x08,0x04,0x06,0x07,0x08,
0x09,0x0a,0x0b,0x0b,0x49,0x6e,0x74,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x54,0x4c,
0x42,0x4d,0x4f,0x44,0x00,0x00,0x00,0x00,0x54,0x4c,0x42,0x4c,0x5f,0x64,0x61,0x74,
0x61,0x00,0x54,0x4c,0x42,0x53,0x00,0x00,0x00,0x00,0x00,0x00,0x41,0x64,0x45,0x4c,
0x5f,0x64,0x61,0x74,0x61,0x00,0x41,0x64,0x45,0x53,0x00,0x00,0x00,0x00,0x00,0x00,
0x45,0x78,0x63,0x43,0x6f,0x64,0x65,0x36,0x00,0x00,0x45,0x78,0x63,0x43,0x6f,0x64,
0x65,0x37,0x00,0x00,0x53,0x79,0x73,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x42,0x70,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x52,0x49,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x43,0x70,0x55,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x4f,0x76,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x01,0x0b,0x63,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x10,0x00,0x00,0x00,0x2c,
0x00,0x00,0x00,0x58,0x00,0x00,0x00,0x30,0x00,0x00,0x00,0x48,0x00,0x00,0x00,0x60,
0x00,0x00,0x00,0x90,0x00,0x00,0x00,0xc0,0x00,0x00,0x01,0x20,0x00,0x00,0x01,0x80,
0x00,0x00,0x01,0xb0,0x00,0x00,0x00,0x34,0x00,0x00,0x00,0x68,0x00,0x00,0x00,0x9c,
0x00,0x00,0x00,0xd0,0x00,0x00,0x01,0x38,0x00,0x00,0x01,0xa0,0x00,0x00,0x01,0xd4,
0x00,0x00,0x02,0x08,0x00,0x00,0x00,0x68,0x00,0x00,0x00,0xd0,0x00,0x00,0x01,0x38,
0x00,0x00,0x01,0xa0,0x00,0x00,0x02,0x6f,0x00,0x00,0x03,0x40,0x00,0x00,0x03,0xa8,
0x00,0x00,0x04,0x10,0x01,0x01,0x01,0x02,0x01,0x01,0x02,0x02,0x03,0x03,0x04,0x04,
0x01,0x01,0x02,0x02,0x03,0x03,0x04,0x04,0x02,0x03,0x03,0x04,0x05,0x06,0x07,0x08,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x07,0x6c,0x80,0x00,0x07,0x80,
0x80,0x00,0x07,0x80,0x80,0x00,0x07,0x70,0x80,0x00,0x07,0x70,0x80,0x00,0x07,0x94,
0x80,0x00,0x56,0xb0,0x80,0x00,0x57,0x08,0x80,0x00,0x57,0x30,0x80,0x00,0x58,0x28,
0x80,0x00,0x58,0xe0,0x80,0x00,0x59,0x88,0x80,0x00,0x59,0xfc,0x80,0x00,0x5b,0x08,
0x80,0x00,0x5b,0x40,0x80,0x00,0x5b,0x54,0x80,0x00,0x5b,0x68,0x80,0x00,0x5c,0x50,
0x80,0x00,0x5c,0x90,0x80,0x00,0x5d,0x44,0x80,0x00,0x5d,0x6c,0x80,0x00,0x56,0x70,
0x80,0x00,0x5d,0xbc,0x80,0x00,0x64,0x48,0x80,0x00,0x64,0xc0,0x80,0x00,0x64,0xcc,
0x80,0x00,0x64,0xd8,0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,
0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,
0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,
0x80,0x00,0x64,0x60,0x80,0x00,0x64,0xe4,0x80,0x00,0x64,0xf0,0x80,0x00,0x64,0xfc,
0x80,0x00,0x87,0xa4,0x80,0x00,0x87,0xa4,0x80,0x00,0x87,0xa4,0x80,0x00,0x87,0xd8,
0x80,0x00,0x88,0x18,0x80,0x00,0x88,0x50,0x80,0x00,0x88,0x80,0x80,0x00,0x88,0xb0,
0x80,0x00,0x88,0xc4,0x80,0x00,0x89,0x2c,0x80,0x00,0x89,0x40,0x80,0x00,0x89,0x7c,
0x80,0x00,0x89,0x84,0x80,0x00,0x89,0xc0,0x80,0x00,0x89,0xd4,0x80,0x00,0x89,0xdc,
0x80,0x00,0x89,0xe4,0x80,0x00,0x89,0xe4,0x80,0x00,0x89,0xe4,0x80,0x00,0x89,0xe4,
0x80,0x00,0x8a,0x14,0x80,0x00,0x8a,0x28,0x80,0x00,0x8a,0x3c,0x80,0x00,0x86,0xe8,
0x80,0x00,0x8d,0x68,0x80,0x00,0x8d,0x68,0x80,0x00,0x8d,0x68,0x80,0x00,0x8d,0x9c,
0x80,0x00,0x8d,0xdc,0x80,0x00,0x8e,0x14,0x80,0x00,0x8e,0x44,0x80,0x00,0x8e,0x74,
0x80,0x00,0x8e,0x88,0x80,0x00,0x8e,0xf0,0x80,0x00,0x8f,0x04,0x80,0x00,0x8f,0x40,
0x80,0x00,0x8f,0x48,0x80,0x00,0x8f,0x84,0x80,0x00,0x8f,0x98,0x80,0x00,0x8f,0xa0,
0x80,0x00,0x8f,0xa8,0x80,0x00,0x8f,0xa8,0x80,0x00,0x8f,0xa8,0x80,0x00,0x8f,0xa8,
0x80,0x00,0x8f,0xd8,0x80,0x00,0x8f,0xec,0x80,0x00,0x90,0x00,0x80,0x00,0x8b,0x88,
};
u32 Rtl8192PciEPHY_REGArray[PHY_REGArrayLengthPciE] = {0x0,};
u32 Rtl8192PciEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLengthPciE] = {
0x800, 0x00000000,
0x804, 0x00000001,
0x808, 0x0000fc00,
0x80c, 0x0000001c,
0x810, 0x801010aa,
0x814, 0x008514d0,
0x818, 0x00000040,
0x81c, 0x00000000,
0x820, 0x00000004,
0x824, 0x00690000,
0x828, 0x00000004,
0x82c, 0x00e90000,
0x830, 0x00000004,
0x834, 0x00690000,
0x838, 0x00000004,
0x83c, 0x00e90000,
0x840, 0x00000000,
0x844, 0x00000000,
0x848, 0x00000000,
0x84c, 0x00000000,
0x850, 0x00000000,
0x854, 0x00000000,
0x858, 0x65a965a9,
0x85c, 0x65a965a9,
0x860, 0x001f0010,
0x864, 0x007f0010,
0x868, 0x001f0010,
0x86c, 0x007f0010,
0x870, 0x0f100f70,
0x874, 0x0f100f70,
0x878, 0x00000000,
0x87c, 0x00000000,
0x880, 0x6870e36c,
0x884, 0xe3573600,
0x888, 0x4260c340,
0x88c, 0x0000ff00,
0x890, 0x00000000,
0x894, 0xfffffffe,
0x898, 0x4c42382f,
0x89c, 0x00656056,
0x8b0, 0x00000000,
0x8e0, 0x00000000,
0x8e4, 0x00000000,
0x900, 0x00000000,
0x904, 0x00000023,
0x908, 0x00000000,
0x90c, 0x31121311,
0xa00, 0x00d0c7d8,
0xa04, 0x811f0008,
0xa08, 0x80cd8300,
0xa0c, 0x2e62740f,
0xa10, 0x95009b78,
0xa14, 0x11145008,
0xa18, 0x00881117,
0xa1c, 0x89140fa0,
0xa20, 0x1a1b0000,
0xa24, 0x090e1317,
0xa28, 0x00000204,
0xa2c, 0x00000000,
0xc00, 0x00000040,
0xc04, 0x00005433,
0xc08, 0x000000e4,
0xc0c, 0x6c6c6c6c,
0xc10, 0x08800000,
0xc14, 0x40000100,
0xc18, 0x08000000,
0xc1c, 0x40000100,
0xc20, 0x08000000,
0xc24, 0x40000100,
0xc28, 0x08000000,
0xc2c, 0x40000100,
0xc30, 0x6de9ac44,
0xc34, 0x465c52cd,
0xc38, 0x497f5994,
0xc3c, 0x0a969764,
0xc40, 0x1f7c403f,
0xc44, 0x000100b7,
0xc48, 0xec020000,
0xc4c, 0x00000300,
0xc50, 0x69543420,
0xc54, 0x433c0094,
0xc58, 0x69543420,
0xc5c, 0x433c0094,
0xc60, 0x69543420,
0xc64, 0x433c0094,
0xc68, 0x69543420,
0xc6c, 0x433c0094,
0xc70, 0x2c7f000d,
0xc74, 0x0186175b,
0xc78, 0x0000001f,
0xc7c, 0x00b91612,
0xc80, 0x40000100,
0xc84, 0x20000000,
0xc88, 0x40000100,
0xc8c, 0x20200000,
0xc90, 0x40000100,
0xc94, 0x00000000,
0xc98, 0x40000100,
0xc9c, 0x00000000,
0xca0, 0x00492492,
0xca4, 0x00000000,
0xca8, 0x00000000,
0xcac, 0x00000000,
0xcb0, 0x00000000,
0xcb4, 0x00000000,
0xcb8, 0x00000000,
0xcbc, 0x00492492,
0xcc0, 0x00000000,
0xcc4, 0x00000000,
0xcc8, 0x00000000,
0xccc, 0x00000000,
0xcd0, 0x00000000,
0xcd4, 0x00000000,
0xcd8, 0x64b22427,
0xcdc, 0x00766932,
0xce0, 0x00222222,
0xd00, 0x00000750,
0xd04, 0x00000403,
0xd08, 0x0000907f,
0xd0c, 0x00000001,
0xd10, 0xa0633333,
0xd14, 0x33333c63,
0xd18, 0x6a8f5b6b,
0xd1c, 0x00000000,
0xd20, 0x00000000,
0xd24, 0x00000000,
0xd28, 0x00000000,
0xd2c, 0xcc979975,
0xd30, 0x00000000,
0xd34, 0x00000000,
0xd38, 0x00000000,
0xd3c, 0x00027293,
0xd40, 0x00000000,
0xd44, 0x00000000,
0xd48, 0x00000000,
0xd4c, 0x00000000,
0xd50, 0x6437140a,
0xd54, 0x024dbd02,
0xd58, 0x00000000,
0xd5c, 0x04032064,
0xe00, 0x161a1a1a,
0xe04, 0x12121416,
0xe08, 0x00001800,
0xe0c, 0x00000000,
0xe10, 0x161a1a1a,
0xe14, 0x12121416,
0xe18, 0x161a1a1a,
0xe1c, 0x12121416,
};
u32 Rtl8192PciERadioA_Array[RadioA_ArrayLengthPciE] = {
0x019, 0x00000003,
0x000, 0x000000bf,
0x001, 0x00000ee0,
0x002, 0x0000004c,
0x003, 0x000007f1,
0x004, 0x00000975,
0x005, 0x00000c58,
0x006, 0x00000ae6,
0x007, 0x000000ca,
0x008, 0x00000e1c,
0x009, 0x000007f0,
0x00a, 0x000009d0,
0x00b, 0x000001ba,
0x00c, 0x00000240,
0x00e, 0x00000020,
0x00f, 0x00000990,
0x012, 0x00000806,
0x014, 0x000005ab,
0x015, 0x00000f80,
0x016, 0x00000020,
0x017, 0x00000597,
0x018, 0x0000050a,
0x01a, 0x00000f80,
0x01b, 0x00000f5e,
0x01c, 0x00000008,
0x01d, 0x00000607,
0x01e, 0x000006cc,
0x01f, 0x00000000,
0x020, 0x000001a5,
0x01f, 0x00000001,
0x020, 0x00000165,
0x01f, 0x00000002,
0x020, 0x000000c6,
0x01f, 0x00000003,
0x020, 0x00000086,
0x01f, 0x00000004,
0x020, 0x00000046,
0x01f, 0x00000005,
0x020, 0x000001e6,
0x01f, 0x00000006,
0x020, 0x000001a6,
0x01f, 0x00000007,
0x020, 0x00000166,
0x01f, 0x00000008,
0x020, 0x000000c7,
0x01f, 0x00000009,
0x020, 0x00000087,
0x01f, 0x0000000a,
0x020, 0x000000f7,
0x01f, 0x0000000b,
0x020, 0x000000d7,
0x01f, 0x0000000c,
0x020, 0x000000b7,
0x01f, 0x0000000d,
0x020, 0x00000097,
0x01f, 0x0000000e,
0x020, 0x00000077,
0x01f, 0x0000000f,
0x020, 0x00000057,
0x01f, 0x00000010,
0x020, 0x00000037,
0x01f, 0x00000011,
0x020, 0x000000fb,
0x01f, 0x00000012,
0x020, 0x000000db,
0x01f, 0x00000013,
0x020, 0x000000bb,
0x01f, 0x00000014,
0x020, 0x000000ff,
0x01f, 0x00000015,
0x020, 0x000000e3,
0x01f, 0x00000016,
0x020, 0x000000c3,
0x01f, 0x00000017,
0x020, 0x000000a3,
0x01f, 0x00000018,
0x020, 0x00000083,
0x01f, 0x00000019,
0x020, 0x00000063,
0x01f, 0x0000001a,
0x020, 0x00000043,
0x01f, 0x0000001b,
0x020, 0x00000023,
0x01f, 0x0000001c,
0x020, 0x00000003,
0x01f, 0x0000001d,
0x020, 0x000001e3,
0x01f, 0x0000001e,
0x020, 0x000001c3,
0x01f, 0x0000001f,
0x020, 0x000001a3,
0x01f, 0x00000020,
0x020, 0x00000183,
0x01f, 0x00000021,
0x020, 0x00000163,
0x01f, 0x00000022,
0x020, 0x00000143,
0x01f, 0x00000023,
0x020, 0x00000123,
0x01f, 0x00000024,
0x020, 0x00000103,
0x023, 0x00000203,
0x024, 0x00000100,
0x00b, 0x000001ba,
0x02c, 0x000003d7,
0x02d, 0x00000ff0,
0x000, 0x00000037,
0x004, 0x00000160,
0x007, 0x00000080,
0x002, 0x0000088d,
0x0fe, 0x00000000,
0x0fe, 0x00000000,
0x016, 0x00000200,
0x016, 0x00000380,
0x016, 0x00000020,
0x016, 0x000001a0,
0x000, 0x000000bf,
0x00d, 0x0000001f,
0x00d, 0x00000c9f,
0x002, 0x0000004d,
0x000, 0x00000cbf,
0x004, 0x00000975,
0x007, 0x00000700,
};
u32 Rtl8192PciERadioB_Array[RadioB_ArrayLengthPciE] = {
0x019, 0x00000003,
0x000, 0x000000bf,
0x001, 0x000006e0,
0x002, 0x0000004c,
0x003, 0x000007f1,
0x004, 0x00000975,
0x005, 0x00000c58,
0x006, 0x00000ae6,
0x007, 0x000000ca,
0x008, 0x00000e1c,
0x000, 0x000000b7,
0x00a, 0x00000850,
0x000, 0x000000bf,
0x00b, 0x000001ba,
0x00c, 0x00000240,
0x00e, 0x00000020,
0x015, 0x00000f80,
0x016, 0x00000020,
0x017, 0x00000597,
0x018, 0x0000050a,
0x01a, 0x00000e00,
0x01b, 0x00000f5e,
0x01d, 0x00000607,
0x01e, 0x000006cc,
0x00b, 0x000001ba,
0x023, 0x00000203,
0x024, 0x00000100,
0x000, 0x00000037,
0x004, 0x00000160,
0x016, 0x00000200,
0x016, 0x00000380,
0x016, 0x00000020,
0x016, 0x000001a0,
0x00d, 0x00000ccc,
0x000, 0x000000bf,
0x002, 0x0000004d,
0x000, 0x00000cbf,
0x004, 0x00000975,
0x007, 0x00000700,
};
u32 Rtl8192PciERadioC_Array[RadioC_ArrayLengthPciE] = {
0x0, };
u32 Rtl8192PciERadioD_Array[RadioD_ArrayLengthPciE] = {
0x0, };
u32 Rtl8192PciEMACPHY_Array[] = {
0x03c, 0xffff0000, 0x00000f0f,
0x340, 0xffffffff, 0x161a1a1a,
0x344, 0xffffffff, 0x12121416,
0x348, 0x0000ffff, 0x00001818,
0x12c, 0xffffffff, 0x04000802,
0x318, 0x00000fff, 0x00000100,
};
u32 Rtl8192PciEMACPHY_Array_PG[] = {
0x03c, 0xffff0000, 0x00000f0f,
0xe00, 0xffffffff, 0x06090909,
0xe04, 0xffffffff, 0x00030306,
0xe08, 0x0000ff00, 0x00000000,
0xe10, 0xffffffff, 0x0a0c0d0f,
0xe14, 0xffffffff, 0x06070809,
0xe18, 0xffffffff, 0x0a0c0d0f,
0xe1c, 0xffffffff, 0x06070809,
0x12c, 0xffffffff, 0x04000802,
0x318, 0x00000fff, 0x00000800,
};
u32 Rtl8192PciEAGCTAB_Array[AGCTAB_ArrayLengthPciE] = {
0xc78, 0x7d000001,
0xc78, 0x7d010001,
0xc78, 0x7d020001,
0xc78, 0x7d030001,
0xc78, 0x7d040001,
0xc78, 0x7d050001,
0xc78, 0x7c060001,
0xc78, 0x7b070001,
0xc78, 0x7a080001,
0xc78, 0x79090001,
0xc78, 0x780a0001,
0xc78, 0x770b0001,
0xc78, 0x760c0001,
0xc78, 0x750d0001,
0xc78, 0x740e0001,
0xc78, 0x730f0001,
0xc78, 0x72100001,
0xc78, 0x71110001,
0xc78, 0x70120001,
0xc78, 0x6f130001,
0xc78, 0x6e140001,
0xc78, 0x6d150001,
0xc78, 0x6c160001,
0xc78, 0x6b170001,
0xc78, 0x6a180001,
0xc78, 0x69190001,
0xc78, 0x681a0001,
0xc78, 0x671b0001,
0xc78, 0x661c0001,
0xc78, 0x651d0001,
0xc78, 0x641e0001,
0xc78, 0x491f0001,
0xc78, 0x48200001,
0xc78, 0x47210001,
0xc78, 0x46220001,
0xc78, 0x45230001,
0xc78, 0x44240001,
0xc78, 0x43250001,
0xc78, 0x28260001,
0xc78, 0x27270001,
0xc78, 0x26280001,
0xc78, 0x25290001,
0xc78, 0x242a0001,
0xc78, 0x232b0001,
0xc78, 0x222c0001,
0xc78, 0x212d0001,
0xc78, 0x202e0001,
0xc78, 0x0a2f0001,
0xc78, 0x08300001,
0xc78, 0x06310001,
0xc78, 0x05320001,
0xc78, 0x04330001,
0xc78, 0x03340001,
0xc78, 0x02350001,
0xc78, 0x01360001,
0xc78, 0x00370001,
0xc78, 0x00380001,
0xc78, 0x00390001,
0xc78, 0x003a0001,
0xc78, 0x003b0001,
0xc78, 0x003c0001,
0xc78, 0x003d0001,
0xc78, 0x003e0001,
0xc78, 0x003f0001,
0xc78, 0x7d400001,
0xc78, 0x7d410001,
0xc78, 0x7d420001,
0xc78, 0x7d430001,
0xc78, 0x7d440001,
0xc78, 0x7d450001,
0xc78, 0x7c460001,
0xc78, 0x7b470001,
0xc78, 0x7a480001,
0xc78, 0x79490001,
0xc78, 0x784a0001,
0xc78, 0x774b0001,
0xc78, 0x764c0001,
0xc78, 0x754d0001,
0xc78, 0x744e0001,
0xc78, 0x734f0001,
0xc78, 0x72500001,
0xc78, 0x71510001,
0xc78, 0x70520001,
0xc78, 0x6f530001,
0xc78, 0x6e540001,
0xc78, 0x6d550001,
0xc78, 0x6c560001,
0xc78, 0x6b570001,
0xc78, 0x6a580001,
0xc78, 0x69590001,
0xc78, 0x685a0001,
0xc78, 0x675b0001,
0xc78, 0x665c0001,
0xc78, 0x655d0001,
0xc78, 0x645e0001,
0xc78, 0x495f0001,
0xc78, 0x48600001,
0xc78, 0x47610001,
0xc78, 0x46620001,
0xc78, 0x45630001,
0xc78, 0x44640001,
0xc78, 0x43650001,
0xc78, 0x28660001,
0xc78, 0x27670001,
0xc78, 0x26680001,
0xc78, 0x25690001,
0xc78, 0x246a0001,
0xc78, 0x236b0001,
0xc78, 0x226c0001,
0xc78, 0x216d0001,
0xc78, 0x206e0001,
0xc78, 0x0a6f0001,
0xc78, 0x08700001,
0xc78, 0x06710001,
0xc78, 0x05720001,
0xc78, 0x04730001,
0xc78, 0x03740001,
0xc78, 0x02750001,
0xc78, 0x01760001,
0xc78, 0x00770001,
0xc78, 0x00780001,
0xc78, 0x00790001,
0xc78, 0x007a0001,
0xc78, 0x007b0001,
0xc78, 0x007c0001,
0xc78, 0x007d0001,
0xc78, 0x007e0001,
0xc78, 0x007f0001,
0xc78, 0x2e00001e,
0xc78, 0x2e01001e,
0xc78, 0x2e02001e,
0xc78, 0x2e03001e,
0xc78, 0x2e04001e,
0xc78, 0x2e05001e,
0xc78, 0x3006001e,
0xc78, 0x3407001e,
0xc78, 0x3908001e,
0xc78, 0x3c09001e,
0xc78, 0x3f0a001e,
0xc78, 0x420b001e,
0xc78, 0x440c001e,
0xc78, 0x450d001e,
0xc78, 0x460e001e,
0xc78, 0x460f001e,
0xc78, 0x4710001e,
0xc78, 0x4811001e,
0xc78, 0x4912001e,
0xc78, 0x4a13001e,
0xc78, 0x4b14001e,
0xc78, 0x4b15001e,
0xc78, 0x4c16001e,
0xc78, 0x4d17001e,
0xc78, 0x4e18001e,
0xc78, 0x4f19001e,
0xc78, 0x4f1a001e,
0xc78, 0x501b001e,
0xc78, 0x511c001e,
0xc78, 0x521d001e,
0xc78, 0x521e001e,
0xc78, 0x531f001e,
0xc78, 0x5320001e,
0xc78, 0x5421001e,
0xc78, 0x5522001e,
0xc78, 0x5523001e,
0xc78, 0x5624001e,
0xc78, 0x5725001e,
0xc78, 0x5726001e,
0xc78, 0x5827001e,
0xc78, 0x5828001e,
0xc78, 0x5929001e,
0xc78, 0x592a001e,
0xc78, 0x5a2b001e,
0xc78, 0x5b2c001e,
0xc78, 0x5c2d001e,
0xc78, 0x5c2e001e,
0xc78, 0x5d2f001e,
0xc78, 0x5e30001e,
0xc78, 0x5f31001e,
0xc78, 0x6032001e,
0xc78, 0x6033001e,
0xc78, 0x6134001e,
0xc78, 0x6235001e,
0xc78, 0x6336001e,
0xc78, 0x6437001e,
0xc78, 0x6438001e,
0xc78, 0x6539001e,
0xc78, 0x663a001e,
0xc78, 0x673b001e,
0xc78, 0x673c001e,
0xc78, 0x683d001e,
0xc78, 0x693e001e,
0xc78, 0x6a3f001e,
};
| gpl-2.0 |
filippz/kernel-adaptation-n950-n9 | drivers/net/ethernet/ibm/emac/phy.c | 9300 | 12820 | /*
* drivers/net/ethernet/ibm/emac/phy.c
*
* Driver for PowerPC 4xx on-chip ethernet controller, PHY support.
* Borrowed from sungem_phy.c, though I only kept the generic MII
* driver for now.
*
* This file should be shared with other drivers or eventually
* merged as the "low level" part of miilib
*
* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
* <benh@kernel.crashing.org>
*
* Based on the arch/ppc version of the driver:
*
* (c) 2003, Benjamin Herrenscmidt (benh@kernel.crashing.org)
* (c) 2004-2005, Eugene Surovegin <ebs@ebshome.net>
*
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/netdevice.h>
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/delay.h>
#include "emac.h"
#include "phy.h"
#define phy_read _phy_read
#define phy_write _phy_write
static inline int _phy_read(struct mii_phy *phy, int reg)
{
return phy->mdio_read(phy->dev, phy->address, reg);
}
static inline void _phy_write(struct mii_phy *phy, int reg, int val)
{
phy->mdio_write(phy->dev, phy->address, reg, val);
}
static inline int gpcs_phy_read(struct mii_phy *phy, int reg)
{
return phy->mdio_read(phy->dev, phy->gpcs_address, reg);
}
static inline void gpcs_phy_write(struct mii_phy *phy, int reg, int val)
{
phy->mdio_write(phy->dev, phy->gpcs_address, reg, val);
}
int emac_mii_reset_phy(struct mii_phy *phy)
{
int val;
int limit = 10000;
val = phy_read(phy, MII_BMCR);
val &= ~(BMCR_ISOLATE | BMCR_ANENABLE);
val |= BMCR_RESET;
phy_write(phy, MII_BMCR, val);
udelay(300);
while (--limit) {
val = phy_read(phy, MII_BMCR);
if (val >= 0 && (val & BMCR_RESET) == 0)
break;
udelay(10);
}
if ((val & BMCR_ISOLATE) && limit > 0)
phy_write(phy, MII_BMCR, val & ~BMCR_ISOLATE);
return limit <= 0;
}
int emac_mii_reset_gpcs(struct mii_phy *phy)
{
int val;
int limit = 10000;
val = gpcs_phy_read(phy, MII_BMCR);
val &= ~(BMCR_ISOLATE | BMCR_ANENABLE);
val |= BMCR_RESET;
gpcs_phy_write(phy, MII_BMCR, val);
udelay(300);
while (--limit) {
val = gpcs_phy_read(phy, MII_BMCR);
if (val >= 0 && (val & BMCR_RESET) == 0)
break;
udelay(10);
}
if ((val & BMCR_ISOLATE) && limit > 0)
gpcs_phy_write(phy, MII_BMCR, val & ~BMCR_ISOLATE);
if (limit > 0 && phy->mode == PHY_MODE_SGMII) {
/* Configure GPCS interface to recommended setting for SGMII */
gpcs_phy_write(phy, 0x04, 0x8120); /* AsymPause, FDX */
gpcs_phy_write(phy, 0x07, 0x2801); /* msg_pg, toggle */
gpcs_phy_write(phy, 0x00, 0x0140); /* 1Gbps, FDX */
}
return limit <= 0;
}
static int genmii_setup_aneg(struct mii_phy *phy, u32 advertise)
{
int ctl, adv;
phy->autoneg = AUTONEG_ENABLE;
phy->speed = SPEED_10;
phy->duplex = DUPLEX_HALF;
phy->pause = phy->asym_pause = 0;
phy->advertising = advertise;
ctl = phy_read(phy, MII_BMCR);
if (ctl < 0)
return ctl;
ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_SPEED1000 | BMCR_ANENABLE);
/* First clear the PHY */
phy_write(phy, MII_BMCR, ctl);
/* Setup standard advertise */
adv = phy_read(phy, MII_ADVERTISE);
if (adv < 0)
return adv;
adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
ADVERTISE_PAUSE_ASYM);
if (advertise & ADVERTISED_10baseT_Half)
adv |= ADVERTISE_10HALF;
if (advertise & ADVERTISED_10baseT_Full)
adv |= ADVERTISE_10FULL;
if (advertise & ADVERTISED_100baseT_Half)
adv |= ADVERTISE_100HALF;
if (advertise & ADVERTISED_100baseT_Full)
adv |= ADVERTISE_100FULL;
if (advertise & ADVERTISED_Pause)
adv |= ADVERTISE_PAUSE_CAP;
if (advertise & ADVERTISED_Asym_Pause)
adv |= ADVERTISE_PAUSE_ASYM;
phy_write(phy, MII_ADVERTISE, adv);
if (phy->features &
(SUPPORTED_1000baseT_Full | SUPPORTED_1000baseT_Half)) {
adv = phy_read(phy, MII_CTRL1000);
if (adv < 0)
return adv;
adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
if (advertise & ADVERTISED_1000baseT_Full)
adv |= ADVERTISE_1000FULL;
if (advertise & ADVERTISED_1000baseT_Half)
adv |= ADVERTISE_1000HALF;
phy_write(phy, MII_CTRL1000, adv);
}
/* Start/Restart aneg */
ctl = phy_read(phy, MII_BMCR);
ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
phy_write(phy, MII_BMCR, ctl);
return 0;
}
static int genmii_setup_forced(struct mii_phy *phy, int speed, int fd)
{
int ctl;
phy->autoneg = AUTONEG_DISABLE;
phy->speed = speed;
phy->duplex = fd;
phy->pause = phy->asym_pause = 0;
ctl = phy_read(phy, MII_BMCR);
if (ctl < 0)
return ctl;
ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_SPEED1000 | BMCR_ANENABLE);
/* First clear the PHY */
phy_write(phy, MII_BMCR, ctl | BMCR_RESET);
/* Select speed & duplex */
switch (speed) {
case SPEED_10:
break;
case SPEED_100:
ctl |= BMCR_SPEED100;
break;
case SPEED_1000:
ctl |= BMCR_SPEED1000;
break;
default:
return -EINVAL;
}
if (fd == DUPLEX_FULL)
ctl |= BMCR_FULLDPLX;
phy_write(phy, MII_BMCR, ctl);
return 0;
}
static int genmii_poll_link(struct mii_phy *phy)
{
int status;
/* Clear latched value with dummy read */
phy_read(phy, MII_BMSR);
status = phy_read(phy, MII_BMSR);
if (status < 0 || (status & BMSR_LSTATUS) == 0)
return 0;
if (phy->autoneg == AUTONEG_ENABLE && !(status & BMSR_ANEGCOMPLETE))
return 0;
return 1;
}
static int genmii_read_link(struct mii_phy *phy)
{
if (phy->autoneg == AUTONEG_ENABLE) {
int glpa = 0;
int lpa = phy_read(phy, MII_LPA) & phy_read(phy, MII_ADVERTISE);
if (lpa < 0)
return lpa;
if (phy->features &
(SUPPORTED_1000baseT_Full | SUPPORTED_1000baseT_Half)) {
int adv = phy_read(phy, MII_CTRL1000);
glpa = phy_read(phy, MII_STAT1000);
if (glpa < 0 || adv < 0)
return adv;
glpa &= adv << 2;
}
phy->speed = SPEED_10;
phy->duplex = DUPLEX_HALF;
phy->pause = phy->asym_pause = 0;
if (glpa & (LPA_1000FULL | LPA_1000HALF)) {
phy->speed = SPEED_1000;
if (glpa & LPA_1000FULL)
phy->duplex = DUPLEX_FULL;
} else if (lpa & (LPA_100FULL | LPA_100HALF)) {
phy->speed = SPEED_100;
if (lpa & LPA_100FULL)
phy->duplex = DUPLEX_FULL;
} else if (lpa & LPA_10FULL)
phy->duplex = DUPLEX_FULL;
if (phy->duplex == DUPLEX_FULL) {
phy->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
phy->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
}
} else {
int bmcr = phy_read(phy, MII_BMCR);
if (bmcr < 0)
return bmcr;
if (bmcr & BMCR_FULLDPLX)
phy->duplex = DUPLEX_FULL;
else
phy->duplex = DUPLEX_HALF;
if (bmcr & BMCR_SPEED1000)
phy->speed = SPEED_1000;
else if (bmcr & BMCR_SPEED100)
phy->speed = SPEED_100;
else
phy->speed = SPEED_10;
phy->pause = phy->asym_pause = 0;
}
return 0;
}
/* Generic implementation for most 10/100/1000 PHYs */
static struct mii_phy_ops generic_phy_ops = {
.setup_aneg = genmii_setup_aneg,
.setup_forced = genmii_setup_forced,
.poll_link = genmii_poll_link,
.read_link = genmii_read_link
};
static struct mii_phy_def genmii_phy_def = {
.phy_id = 0x00000000,
.phy_id_mask = 0x00000000,
.name = "Generic MII",
.ops = &generic_phy_ops
};
/* CIS8201 */
#define MII_CIS8201_10BTCSR 0x16
#define TENBTCSR_ECHO_DISABLE 0x2000
#define MII_CIS8201_EPCR 0x17
#define EPCR_MODE_MASK 0x3000
#define EPCR_GMII_MODE 0x0000
#define EPCR_RGMII_MODE 0x1000
#define EPCR_TBI_MODE 0x2000
#define EPCR_RTBI_MODE 0x3000
#define MII_CIS8201_ACSR 0x1c
#define ACSR_PIN_PRIO_SELECT 0x0004
static int cis8201_init(struct mii_phy *phy)
{
int epcr;
epcr = phy_read(phy, MII_CIS8201_EPCR);
if (epcr < 0)
return epcr;
epcr &= ~EPCR_MODE_MASK;
switch (phy->mode) {
case PHY_MODE_TBI:
epcr |= EPCR_TBI_MODE;
break;
case PHY_MODE_RTBI:
epcr |= EPCR_RTBI_MODE;
break;
case PHY_MODE_GMII:
epcr |= EPCR_GMII_MODE;
break;
case PHY_MODE_RGMII:
default:
epcr |= EPCR_RGMII_MODE;
}
phy_write(phy, MII_CIS8201_EPCR, epcr);
/* MII regs override strap pins */
phy_write(phy, MII_CIS8201_ACSR,
phy_read(phy, MII_CIS8201_ACSR) | ACSR_PIN_PRIO_SELECT);
/* Disable TX_EN -> CRS echo mode, otherwise 10/HDX doesn't work */
phy_write(phy, MII_CIS8201_10BTCSR,
phy_read(phy, MII_CIS8201_10BTCSR) | TENBTCSR_ECHO_DISABLE);
return 0;
}
static struct mii_phy_ops cis8201_phy_ops = {
.init = cis8201_init,
.setup_aneg = genmii_setup_aneg,
.setup_forced = genmii_setup_forced,
.poll_link = genmii_poll_link,
.read_link = genmii_read_link
};
static struct mii_phy_def cis8201_phy_def = {
.phy_id = 0x000fc410,
.phy_id_mask = 0x000ffff0,
.name = "CIS8201 Gigabit Ethernet",
.ops = &cis8201_phy_ops
};
static struct mii_phy_def bcm5248_phy_def = {
.phy_id = 0x0143bc00,
.phy_id_mask = 0x0ffffff0,
.name = "BCM5248 10/100 SMII Ethernet",
.ops = &generic_phy_ops
};
static int m88e1111_init(struct mii_phy *phy)
{
pr_debug("%s: Marvell 88E1111 Ethernet\n", __func__);
phy_write(phy, 0x14, 0x0ce3);
phy_write(phy, 0x18, 0x4101);
phy_write(phy, 0x09, 0x0e00);
phy_write(phy, 0x04, 0x01e1);
phy_write(phy, 0x00, 0x9140);
phy_write(phy, 0x00, 0x1140);
return 0;
}
static int m88e1112_init(struct mii_phy *phy)
{
/*
* Marvell 88E1112 PHY needs to have the SGMII MAC
* interace (page 2) properly configured to
* communicate with the 460EX/GT GPCS interface.
*/
u16 reg_short;
pr_debug("%s: Marvell 88E1112 Ethernet\n", __func__);
/* Set access to Page 2 */
phy_write(phy, 0x16, 0x0002);
phy_write(phy, 0x00, 0x0040); /* 1Gbps */
reg_short = (u16)(phy_read(phy, 0x1a));
reg_short |= 0x8000; /* bypass Auto-Negotiation */
phy_write(phy, 0x1a, reg_short);
emac_mii_reset_phy(phy); /* reset MAC interface */
/* Reset access to Page 0 */
phy_write(phy, 0x16, 0x0000);
return 0;
}
static int et1011c_init(struct mii_phy *phy)
{
u16 reg_short;
reg_short = (u16)(phy_read(phy, 0x16));
reg_short &= ~(0x7);
reg_short |= 0x6; /* RGMII Trace Delay*/
phy_write(phy, 0x16, reg_short);
reg_short = (u16)(phy_read(phy, 0x17));
reg_short &= ~(0x40);
phy_write(phy, 0x17, reg_short);
phy_write(phy, 0x1c, 0x74f0);
return 0;
}
static struct mii_phy_ops et1011c_phy_ops = {
.init = et1011c_init,
.setup_aneg = genmii_setup_aneg,
.setup_forced = genmii_setup_forced,
.poll_link = genmii_poll_link,
.read_link = genmii_read_link
};
static struct mii_phy_def et1011c_phy_def = {
.phy_id = 0x0282f000,
.phy_id_mask = 0x0fffff00,
.name = "ET1011C Gigabit Ethernet",
.ops = &et1011c_phy_ops
};
static struct mii_phy_ops m88e1111_phy_ops = {
.init = m88e1111_init,
.setup_aneg = genmii_setup_aneg,
.setup_forced = genmii_setup_forced,
.poll_link = genmii_poll_link,
.read_link = genmii_read_link
};
static struct mii_phy_def m88e1111_phy_def = {
.phy_id = 0x01410CC0,
.phy_id_mask = 0x0ffffff0,
.name = "Marvell 88E1111 Ethernet",
.ops = &m88e1111_phy_ops,
};
static struct mii_phy_ops m88e1112_phy_ops = {
.init = m88e1112_init,
.setup_aneg = genmii_setup_aneg,
.setup_forced = genmii_setup_forced,
.poll_link = genmii_poll_link,
.read_link = genmii_read_link
};
static struct mii_phy_def m88e1112_phy_def = {
.phy_id = 0x01410C90,
.phy_id_mask = 0x0ffffff0,
.name = "Marvell 88E1112 Ethernet",
.ops = &m88e1112_phy_ops,
};
static struct mii_phy_def *mii_phy_table[] = {
&et1011c_phy_def,
&cis8201_phy_def,
&bcm5248_phy_def,
&m88e1111_phy_def,
&m88e1112_phy_def,
&genmii_phy_def,
NULL
};
int emac_mii_phy_probe(struct mii_phy *phy, int address)
{
struct mii_phy_def *def;
int i;
u32 id;
phy->autoneg = AUTONEG_DISABLE;
phy->advertising = 0;
phy->address = address;
phy->speed = SPEED_10;
phy->duplex = DUPLEX_HALF;
phy->pause = phy->asym_pause = 0;
/* Take PHY out of isolate mode and reset it. */
if (emac_mii_reset_phy(phy))
return -ENODEV;
/* Read ID and find matching entry */
id = (phy_read(phy, MII_PHYSID1) << 16) | phy_read(phy, MII_PHYSID2);
for (i = 0; (def = mii_phy_table[i]) != NULL; i++)
if ((id & def->phy_id_mask) == def->phy_id)
break;
/* Should never be NULL (we have a generic entry), but... */
if (!def)
return -ENODEV;
phy->def = def;
/* Determine PHY features if needed */
phy->features = def->features;
if (!phy->features) {
u16 bmsr = phy_read(phy, MII_BMSR);
if (bmsr & BMSR_ANEGCAPABLE)
phy->features |= SUPPORTED_Autoneg;
if (bmsr & BMSR_10HALF)
phy->features |= SUPPORTED_10baseT_Half;
if (bmsr & BMSR_10FULL)
phy->features |= SUPPORTED_10baseT_Full;
if (bmsr & BMSR_100HALF)
phy->features |= SUPPORTED_100baseT_Half;
if (bmsr & BMSR_100FULL)
phy->features |= SUPPORTED_100baseT_Full;
if (bmsr & BMSR_ESTATEN) {
u16 esr = phy_read(phy, MII_ESTATUS);
if (esr & ESTATUS_1000_TFULL)
phy->features |= SUPPORTED_1000baseT_Full;
if (esr & ESTATUS_1000_THALF)
phy->features |= SUPPORTED_1000baseT_Half;
}
phy->features |= SUPPORTED_MII;
}
/* Setup default advertising */
phy->advertising = phy->features;
return 0;
}
MODULE_LICENSE("GPL");
| gpl-2.0 |
cambridgehackers/linux-xlnx | drivers/isdn/hisax/hisax_isac.c | 9556 | 22142 | /*
* Driver for ISAC-S and ISAC-SX
* ISDN Subscriber Access Controller for Terminals
*
* Author Kai Germaschewski
* Copyright 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
* 2001 by Karsten Keil <keil@isdn4linux.de>
*
* based upon Karsten Keil's original isac.c driver
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
* Thanks to Wizard Computersysteme GmbH, Bremervoerde and
* SoHaNet Technology GmbH, Berlin
* for supporting the development of this driver
*/
/* TODO:
* specifically handle level vs edge triggered?
*/
#include <linux/module.h>
#include <linux/gfp.h>
#include <linux/init.h>
#include <linux/netdevice.h>
#include "hisax_isac.h"
// debugging cruft
#define __debug_variable debug
#include "hisax_debug.h"
#ifdef CONFIG_HISAX_DEBUG
static int debug = 1;
module_param(debug, int, 0);
static char *ISACVer[] = {
"2086/2186 V1.1",
"2085 B1",
"2085 B2",
"2085 V2.3"
};
#endif
MODULE_AUTHOR("Kai Germaschewski <kai.germaschewski@gmx.de>/Karsten Keil <kkeil@suse.de>");
MODULE_DESCRIPTION("ISAC/ISAC-SX driver");
MODULE_LICENSE("GPL");
#define DBG_WARN 0x0001
#define DBG_IRQ 0x0002
#define DBG_L1M 0x0004
#define DBG_PR 0x0008
#define DBG_RFIFO 0x0100
#define DBG_RPACKET 0x0200
#define DBG_XFIFO 0x1000
#define DBG_XPACKET 0x2000
// we need to distinguish ISAC-S and ISAC-SX
#define TYPE_ISAC 0x00
#define TYPE_ISACSX 0x01
// registers etc.
#define ISAC_MASK 0x20
#define ISAC_ISTA 0x20
#define ISAC_ISTA_EXI 0x01
#define ISAC_ISTA_SIN 0x02
#define ISAC_ISTA_CISQ 0x04
#define ISAC_ISTA_XPR 0x10
#define ISAC_ISTA_RSC 0x20
#define ISAC_ISTA_RPF 0x40
#define ISAC_ISTA_RME 0x80
#define ISAC_STAR 0x21
#define ISAC_CMDR 0x21
#define ISAC_CMDR_XRES 0x01
#define ISAC_CMDR_XME 0x02
#define ISAC_CMDR_XTF 0x08
#define ISAC_CMDR_RRES 0x40
#define ISAC_CMDR_RMC 0x80
#define ISAC_EXIR 0x24
#define ISAC_EXIR_MOS 0x04
#define ISAC_EXIR_XDU 0x40
#define ISAC_EXIR_XMR 0x80
#define ISAC_ADF2 0x39
#define ISAC_SPCR 0x30
#define ISAC_ADF1 0x38
#define ISAC_CIR0 0x31
#define ISAC_CIX0 0x31
#define ISAC_CIR0_CIC0 0x02
#define ISAC_CIR0_CIC1 0x01
#define ISAC_CIR1 0x33
#define ISAC_CIX1 0x33
#define ISAC_STCR 0x37
#define ISAC_MODE 0x22
#define ISAC_RSTA 0x27
#define ISAC_RSTA_RDO 0x40
#define ISAC_RSTA_CRC 0x20
#define ISAC_RSTA_RAB 0x10
#define ISAC_RBCL 0x25
#define ISAC_RBCH 0x2A
#define ISAC_TIMR 0x23
#define ISAC_SQXR 0x3b
#define ISAC_MOSR 0x3a
#define ISAC_MOCR 0x3a
#define ISAC_MOR0 0x32
#define ISAC_MOX0 0x32
#define ISAC_MOR1 0x34
#define ISAC_MOX1 0x34
#define ISAC_RBCH_XAC 0x80
#define ISAC_CMD_TIM 0x0
#define ISAC_CMD_RES 0x1
#define ISAC_CMD_SSP 0x2
#define ISAC_CMD_SCP 0x3
#define ISAC_CMD_AR8 0x8
#define ISAC_CMD_AR10 0x9
#define ISAC_CMD_ARL 0xa
#define ISAC_CMD_DI 0xf
#define ISACSX_MASK 0x60
#define ISACSX_ISTA 0x60
#define ISACSX_ISTA_ICD 0x01
#define ISACSX_ISTA_CIC 0x10
#define ISACSX_MASKD 0x20
#define ISACSX_ISTAD 0x20
#define ISACSX_ISTAD_XDU 0x04
#define ISACSX_ISTAD_XMR 0x08
#define ISACSX_ISTAD_XPR 0x10
#define ISACSX_ISTAD_RFO 0x20
#define ISACSX_ISTAD_RPF 0x40
#define ISACSX_ISTAD_RME 0x80
#define ISACSX_CMDRD 0x21
#define ISACSX_CMDRD_XRES 0x01
#define ISACSX_CMDRD_XME 0x02
#define ISACSX_CMDRD_XTF 0x08
#define ISACSX_CMDRD_RRES 0x40
#define ISACSX_CMDRD_RMC 0x80
#define ISACSX_MODED 0x22
#define ISACSX_RBCLD 0x26
#define ISACSX_RSTAD 0x28
#define ISACSX_RSTAD_RAB 0x10
#define ISACSX_RSTAD_CRC 0x20
#define ISACSX_RSTAD_RDO 0x40
#define ISACSX_RSTAD_VFR 0x80
#define ISACSX_CIR0 0x2e
#define ISACSX_CIR0_CIC0 0x08
#define ISACSX_CIX0 0x2e
#define ISACSX_TR_CONF0 0x30
#define ISACSX_TR_CONF2 0x32
static struct Fsm l1fsm;
enum {
ST_L1_RESET,
ST_L1_F3_PDOWN,
ST_L1_F3_PUP,
ST_L1_F3_PEND_DEACT,
ST_L1_F4,
ST_L1_F5,
ST_L1_F6,
ST_L1_F7,
ST_L1_F8,
};
#define L1_STATE_COUNT (ST_L1_F8 + 1)
static char *strL1State[] =
{
"ST_L1_RESET",
"ST_L1_F3_PDOWN",
"ST_L1_F3_PUP",
"ST_L1_F3_PEND_DEACT",
"ST_L1_F4",
"ST_L1_F5",
"ST_L1_F6",
"ST_L1_F7",
"ST_L1_F8",
};
enum {
EV_PH_DR, // 0000
EV_PH_RES, // 0001
EV_PH_TMA, // 0010
EV_PH_SLD, // 0011
EV_PH_RSY, // 0100
EV_PH_DR6, // 0101
EV_PH_EI, // 0110
EV_PH_PU, // 0111
EV_PH_AR, // 1000
EV_PH_9, // 1001
EV_PH_ARL, // 1010
EV_PH_CVR, // 1011
EV_PH_AI8, // 1100
EV_PH_AI10, // 1101
EV_PH_AIL, // 1110
EV_PH_DC, // 1111
EV_PH_ACTIVATE_REQ,
EV_PH_DEACTIVATE_REQ,
EV_TIMER3,
};
#define L1_EVENT_COUNT (EV_TIMER3 + 1)
static char *strL1Event[] =
{
"EV_PH_DR", // 0000
"EV_PH_RES", // 0001
"EV_PH_TMA", // 0010
"EV_PH_SLD", // 0011
"EV_PH_RSY", // 0100
"EV_PH_DR6", // 0101
"EV_PH_EI", // 0110
"EV_PH_PU", // 0111
"EV_PH_AR", // 1000
"EV_PH_9", // 1001
"EV_PH_ARL", // 1010
"EV_PH_CVR", // 1011
"EV_PH_AI8", // 1100
"EV_PH_AI10", // 1101
"EV_PH_AIL", // 1110
"EV_PH_DC", // 1111
"EV_PH_ACTIVATE_REQ",
"EV_PH_DEACTIVATE_REQ",
"EV_TIMER3",
};
static inline void D_L1L2(struct isac *isac, int pr, void *arg)
{
struct hisax_if *ifc = (struct hisax_if *) &isac->hisax_d_if;
DBG(DBG_PR, "pr %#x", pr);
ifc->l1l2(ifc, pr, arg);
}
static void ph_command(struct isac *isac, unsigned int command)
{
DBG(DBG_L1M, "ph_command %#x", command);
switch (isac->type) {
case TYPE_ISAC:
isac->write_isac(isac, ISAC_CIX0, (command << 2) | 3);
break;
case TYPE_ISACSX:
isac->write_isac(isac, ISACSX_CIX0, (command << 4) | (7 << 1));
break;
}
}
// ----------------------------------------------------------------------
static void l1_di(struct FsmInst *fi, int event, void *arg)
{
struct isac *isac = fi->userdata;
FsmChangeState(fi, ST_L1_RESET);
ph_command(isac, ISAC_CMD_DI);
}
static void l1_di_deact_ind(struct FsmInst *fi, int event, void *arg)
{
struct isac *isac = fi->userdata;
FsmChangeState(fi, ST_L1_RESET);
D_L1L2(isac, PH_DEACTIVATE | INDICATION, NULL);
ph_command(isac, ISAC_CMD_DI);
}
static void l1_go_f3pdown(struct FsmInst *fi, int event, void *arg)
{
FsmChangeState(fi, ST_L1_F3_PDOWN);
}
static void l1_go_f3pend_deact_ind(struct FsmInst *fi, int event, void *arg)
{
struct isac *isac = fi->userdata;
FsmChangeState(fi, ST_L1_F3_PEND_DEACT);
D_L1L2(isac, PH_DEACTIVATE | INDICATION, NULL);
ph_command(isac, ISAC_CMD_DI);
}
static void l1_go_f3pend(struct FsmInst *fi, int event, void *arg)
{
struct isac *isac = fi->userdata;
FsmChangeState(fi, ST_L1_F3_PEND_DEACT);
ph_command(isac, ISAC_CMD_DI);
}
static void l1_go_f4(struct FsmInst *fi, int event, void *arg)
{
FsmChangeState(fi, ST_L1_F4);
}
static void l1_go_f5(struct FsmInst *fi, int event, void *arg)
{
FsmChangeState(fi, ST_L1_F5);
}
static void l1_go_f6(struct FsmInst *fi, int event, void *arg)
{
FsmChangeState(fi, ST_L1_F6);
}
static void l1_go_f6_deact_ind(struct FsmInst *fi, int event, void *arg)
{
struct isac *isac = fi->userdata;
FsmChangeState(fi, ST_L1_F6);
D_L1L2(isac, PH_DEACTIVATE | INDICATION, NULL);
}
static void l1_go_f7_act_ind(struct FsmInst *fi, int event, void *arg)
{
struct isac *isac = fi->userdata;
FsmDelTimer(&isac->timer, 0);
FsmChangeState(fi, ST_L1_F7);
ph_command(isac, ISAC_CMD_AR8);
D_L1L2(isac, PH_ACTIVATE | INDICATION, NULL);
}
static void l1_go_f8(struct FsmInst *fi, int event, void *arg)
{
FsmChangeState(fi, ST_L1_F8);
}
static void l1_go_f8_deact_ind(struct FsmInst *fi, int event, void *arg)
{
struct isac *isac = fi->userdata;
FsmChangeState(fi, ST_L1_F8);
D_L1L2(isac, PH_DEACTIVATE | INDICATION, NULL);
}
static void l1_ar8(struct FsmInst *fi, int event, void *arg)
{
struct isac *isac = fi->userdata;
FsmRestartTimer(&isac->timer, TIMER3_VALUE, EV_TIMER3, NULL, 2);
ph_command(isac, ISAC_CMD_AR8);
}
static void l1_timer3(struct FsmInst *fi, int event, void *arg)
{
struct isac *isac = fi->userdata;
ph_command(isac, ISAC_CMD_DI);
D_L1L2(isac, PH_DEACTIVATE | INDICATION, NULL);
}
// state machines according to data sheet PSB 2186 / 3186
static struct FsmNode L1FnList[] __initdata =
{
{ST_L1_RESET, EV_PH_RES, l1_di},
{ST_L1_RESET, EV_PH_EI, l1_di},
{ST_L1_RESET, EV_PH_DC, l1_go_f3pdown},
{ST_L1_RESET, EV_PH_AR, l1_go_f6},
{ST_L1_RESET, EV_PH_AI8, l1_go_f7_act_ind},
{ST_L1_F3_PDOWN, EV_PH_RES, l1_di},
{ST_L1_F3_PDOWN, EV_PH_EI, l1_di},
{ST_L1_F3_PDOWN, EV_PH_AR, l1_go_f6},
{ST_L1_F3_PDOWN, EV_PH_RSY, l1_go_f5},
{ST_L1_F3_PDOWN, EV_PH_PU, l1_go_f4},
{ST_L1_F3_PDOWN, EV_PH_AI8, l1_go_f7_act_ind},
{ST_L1_F3_PDOWN, EV_PH_ACTIVATE_REQ, l1_ar8},
{ST_L1_F3_PDOWN, EV_TIMER3, l1_timer3},
{ST_L1_F3_PEND_DEACT, EV_PH_RES, l1_di},
{ST_L1_F3_PEND_DEACT, EV_PH_EI, l1_di},
{ST_L1_F3_PEND_DEACT, EV_PH_DC, l1_go_f3pdown},
{ST_L1_F3_PEND_DEACT, EV_PH_RSY, l1_go_f5},
{ST_L1_F3_PEND_DEACT, EV_PH_AR, l1_go_f6},
{ST_L1_F3_PEND_DEACT, EV_PH_AI8, l1_go_f7_act_ind},
{ST_L1_F4, EV_PH_RES, l1_di},
{ST_L1_F4, EV_PH_EI, l1_di},
{ST_L1_F4, EV_PH_RSY, l1_go_f5},
{ST_L1_F4, EV_PH_AI8, l1_go_f7_act_ind},
{ST_L1_F4, EV_TIMER3, l1_timer3},
{ST_L1_F4, EV_PH_DC, l1_go_f3pdown},
{ST_L1_F5, EV_PH_RES, l1_di},
{ST_L1_F5, EV_PH_EI, l1_di},
{ST_L1_F5, EV_PH_AR, l1_go_f6},
{ST_L1_F5, EV_PH_AI8, l1_go_f7_act_ind},
{ST_L1_F5, EV_TIMER3, l1_timer3},
{ST_L1_F5, EV_PH_DR, l1_go_f3pend},
{ST_L1_F5, EV_PH_DC, l1_go_f3pdown},
{ST_L1_F6, EV_PH_RES, l1_di},
{ST_L1_F6, EV_PH_EI, l1_di},
{ST_L1_F6, EV_PH_RSY, l1_go_f8},
{ST_L1_F6, EV_PH_AI8, l1_go_f7_act_ind},
{ST_L1_F6, EV_PH_DR6, l1_go_f3pend},
{ST_L1_F6, EV_TIMER3, l1_timer3},
{ST_L1_F6, EV_PH_DC, l1_go_f3pdown},
{ST_L1_F7, EV_PH_RES, l1_di_deact_ind},
{ST_L1_F7, EV_PH_EI, l1_di_deact_ind},
{ST_L1_F7, EV_PH_AR, l1_go_f6_deact_ind},
{ST_L1_F7, EV_PH_RSY, l1_go_f8_deact_ind},
{ST_L1_F7, EV_PH_DR, l1_go_f3pend_deact_ind},
{ST_L1_F8, EV_PH_RES, l1_di},
{ST_L1_F8, EV_PH_EI, l1_di},
{ST_L1_F8, EV_PH_AR, l1_go_f6},
{ST_L1_F8, EV_PH_DR, l1_go_f3pend},
{ST_L1_F8, EV_PH_AI8, l1_go_f7_act_ind},
{ST_L1_F8, EV_TIMER3, l1_timer3},
{ST_L1_F8, EV_PH_DC, l1_go_f3pdown},
};
static void l1m_debug(struct FsmInst *fi, char *fmt, ...)
{
va_list args;
char buf[256];
va_start(args, fmt);
vsnprintf(buf, sizeof(buf), fmt, args);
DBG(DBG_L1M, "%s", buf);
va_end(args);
}
static void isac_version(struct isac *cs)
{
int val;
val = cs->read_isac(cs, ISAC_RBCH);
DBG(1, "ISAC version (%x): %s", val, ISACVer[(val >> 5) & 3]);
}
static void isac_empty_fifo(struct isac *isac, int count)
{
// this also works for isacsx, since
// CMDR(D) register works the same
u_char *ptr;
DBG(DBG_IRQ, "count %d", count);
if ((isac->rcvidx + count) >= MAX_DFRAME_LEN_L1) {
DBG(DBG_WARN, "overrun %d", isac->rcvidx + count);
isac->write_isac(isac, ISAC_CMDR, ISAC_CMDR_RMC);
isac->rcvidx = 0;
return;
}
ptr = isac->rcvbuf + isac->rcvidx;
isac->rcvidx += count;
isac->read_isac_fifo(isac, ptr, count);
isac->write_isac(isac, ISAC_CMDR, ISAC_CMDR_RMC);
DBG_PACKET(DBG_RFIFO, ptr, count);
}
static void isac_fill_fifo(struct isac *isac)
{
// this also works for isacsx, since
// CMDR(D) register works the same
int count;
unsigned char cmd;
u_char *ptr;
BUG_ON(!isac->tx_skb);
count = isac->tx_skb->len;
BUG_ON(count <= 0);
DBG(DBG_IRQ, "count %d", count);
if (count > 0x20) {
count = 0x20;
cmd = ISAC_CMDR_XTF;
} else {
cmd = ISAC_CMDR_XTF | ISAC_CMDR_XME;
}
ptr = isac->tx_skb->data;
skb_pull(isac->tx_skb, count);
isac->tx_cnt += count;
DBG_PACKET(DBG_XFIFO, ptr, count);
isac->write_isac_fifo(isac, ptr, count);
isac->write_isac(isac, ISAC_CMDR, cmd);
}
static void isac_retransmit(struct isac *isac)
{
if (!isac->tx_skb) {
DBG(DBG_WARN, "no skb");
return;
}
skb_push(isac->tx_skb, isac->tx_cnt);
isac->tx_cnt = 0;
}
static inline void isac_cisq_interrupt(struct isac *isac)
{
unsigned char val;
val = isac->read_isac(isac, ISAC_CIR0);
DBG(DBG_IRQ, "CIR0 %#x", val);
if (val & ISAC_CIR0_CIC0) {
DBG(DBG_IRQ, "CODR0 %#x", (val >> 2) & 0xf);
FsmEvent(&isac->l1m, (val >> 2) & 0xf, NULL);
}
if (val & ISAC_CIR0_CIC1) {
val = isac->read_isac(isac, ISAC_CIR1);
DBG(DBG_WARN, "ISAC CIR1 %#x", val);
}
}
static inline void isac_rme_interrupt(struct isac *isac)
{
unsigned char val;
int count;
struct sk_buff *skb;
val = isac->read_isac(isac, ISAC_RSTA);
if ((val & (ISAC_RSTA_RDO | ISAC_RSTA_CRC | ISAC_RSTA_RAB))
!= ISAC_RSTA_CRC) {
DBG(DBG_WARN, "RSTA %#x, dropped", val);
isac->write_isac(isac, ISAC_CMDR, ISAC_CMDR_RMC);
goto out;
}
count = isac->read_isac(isac, ISAC_RBCL) & 0x1f;
DBG(DBG_IRQ, "RBCL %#x", count);
if (count == 0)
count = 0x20;
isac_empty_fifo(isac, count);
count = isac->rcvidx;
if (count < 1) {
DBG(DBG_WARN, "count %d < 1", count);
goto out;
}
skb = alloc_skb(count, GFP_ATOMIC);
if (!skb) {
DBG(DBG_WARN, "no memory, dropping\n");
goto out;
}
memcpy(skb_put(skb, count), isac->rcvbuf, count);
DBG_SKB(DBG_RPACKET, skb);
D_L1L2(isac, PH_DATA | INDICATION, skb);
out:
isac->rcvidx = 0;
}
static inline void isac_xpr_interrupt(struct isac *isac)
{
if (!isac->tx_skb)
return;
if (isac->tx_skb->len > 0) {
isac_fill_fifo(isac);
return;
}
dev_kfree_skb_irq(isac->tx_skb);
isac->tx_cnt = 0;
isac->tx_skb = NULL;
D_L1L2(isac, PH_DATA | CONFIRM, NULL);
}
static inline void isac_exi_interrupt(struct isac *isac)
{
unsigned char val;
val = isac->read_isac(isac, ISAC_EXIR);
DBG(2, "EXIR %#x", val);
if (val & ISAC_EXIR_XMR) {
DBG(DBG_WARN, "ISAC XMR");
isac_retransmit(isac);
}
if (val & ISAC_EXIR_XDU) {
DBG(DBG_WARN, "ISAC XDU");
isac_retransmit(isac);
}
if (val & ISAC_EXIR_MOS) { /* MOS */
DBG(DBG_WARN, "MOS");
val = isac->read_isac(isac, ISAC_MOSR);
DBG(2, "ISAC MOSR %#x", val);
}
}
void isac_irq(struct isac *isac)
{
unsigned char val;
val = isac->read_isac(isac, ISAC_ISTA);
DBG(DBG_IRQ, "ISTA %#x", val);
if (val & ISAC_ISTA_EXI) {
DBG(DBG_IRQ, "EXI");
isac_exi_interrupt(isac);
}
if (val & ISAC_ISTA_XPR) {
DBG(DBG_IRQ, "XPR");
isac_xpr_interrupt(isac);
}
if (val & ISAC_ISTA_RME) {
DBG(DBG_IRQ, "RME");
isac_rme_interrupt(isac);
}
if (val & ISAC_ISTA_RPF) {
DBG(DBG_IRQ, "RPF");
isac_empty_fifo(isac, 0x20);
}
if (val & ISAC_ISTA_CISQ) {
DBG(DBG_IRQ, "CISQ");
isac_cisq_interrupt(isac);
}
if (val & ISAC_ISTA_RSC) {
DBG(DBG_WARN, "RSC");
}
if (val & ISAC_ISTA_SIN) {
DBG(DBG_WARN, "SIN");
}
isac->write_isac(isac, ISAC_MASK, 0xff);
isac->write_isac(isac, ISAC_MASK, 0x00);
}
// ======================================================================
static inline void isacsx_cic_interrupt(struct isac *isac)
{
unsigned char val;
val = isac->read_isac(isac, ISACSX_CIR0);
DBG(DBG_IRQ, "CIR0 %#x", val);
if (val & ISACSX_CIR0_CIC0) {
DBG(DBG_IRQ, "CODR0 %#x", val >> 4);
FsmEvent(&isac->l1m, val >> 4, NULL);
}
}
static inline void isacsx_rme_interrupt(struct isac *isac)
{
int count;
struct sk_buff *skb;
unsigned char val;
val = isac->read_isac(isac, ISACSX_RSTAD);
if ((val & (ISACSX_RSTAD_VFR |
ISACSX_RSTAD_RDO |
ISACSX_RSTAD_CRC |
ISACSX_RSTAD_RAB))
!= (ISACSX_RSTAD_VFR | ISACSX_RSTAD_CRC)) {
DBG(DBG_WARN, "RSTAD %#x, dropped", val);
isac->write_isac(isac, ISACSX_CMDRD, ISACSX_CMDRD_RMC);
goto out;
}
count = isac->read_isac(isac, ISACSX_RBCLD) & 0x1f;
DBG(DBG_IRQ, "RBCLD %#x", count);
if (count == 0)
count = 0x20;
isac_empty_fifo(isac, count);
// strip trailing status byte
count = isac->rcvidx - 1;
if (count < 1) {
DBG(DBG_WARN, "count %d < 1", count);
goto out;
}
skb = dev_alloc_skb(count);
if (!skb) {
DBG(DBG_WARN, "no memory, dropping");
goto out;
}
memcpy(skb_put(skb, count), isac->rcvbuf, count);
DBG_SKB(DBG_RPACKET, skb);
D_L1L2(isac, PH_DATA | INDICATION, skb);
out:
isac->rcvidx = 0;
}
static inline void isacsx_xpr_interrupt(struct isac *isac)
{
if (!isac->tx_skb)
return;
if (isac->tx_skb->len > 0) {
isac_fill_fifo(isac);
return;
}
dev_kfree_skb_irq(isac->tx_skb);
isac->tx_skb = NULL;
isac->tx_cnt = 0;
D_L1L2(isac, PH_DATA | CONFIRM, NULL);
}
static inline void isacsx_icd_interrupt(struct isac *isac)
{
unsigned char val;
val = isac->read_isac(isac, ISACSX_ISTAD);
DBG(DBG_IRQ, "ISTAD %#x", val);
if (val & ISACSX_ISTAD_XDU) {
DBG(DBG_WARN, "ISTAD XDU");
isac_retransmit(isac);
}
if (val & ISACSX_ISTAD_XMR) {
DBG(DBG_WARN, "ISTAD XMR");
isac_retransmit(isac);
}
if (val & ISACSX_ISTAD_XPR) {
DBG(DBG_IRQ, "ISTAD XPR");
isacsx_xpr_interrupt(isac);
}
if (val & ISACSX_ISTAD_RFO) {
DBG(DBG_WARN, "ISTAD RFO");
isac->write_isac(isac, ISACSX_CMDRD, ISACSX_CMDRD_RMC);
}
if (val & ISACSX_ISTAD_RME) {
DBG(DBG_IRQ, "ISTAD RME");
isacsx_rme_interrupt(isac);
}
if (val & ISACSX_ISTAD_RPF) {
DBG(DBG_IRQ, "ISTAD RPF");
isac_empty_fifo(isac, 0x20);
}
}
void isacsx_irq(struct isac *isac)
{
unsigned char val;
val = isac->read_isac(isac, ISACSX_ISTA);
DBG(DBG_IRQ, "ISTA %#x", val);
if (val & ISACSX_ISTA_ICD)
isacsx_icd_interrupt(isac);
if (val & ISACSX_ISTA_CIC)
isacsx_cic_interrupt(isac);
}
void isac_init(struct isac *isac)
{
isac->tx_skb = NULL;
isac->l1m.fsm = &l1fsm;
isac->l1m.state = ST_L1_RESET;
#ifdef CONFIG_HISAX_DEBUG
isac->l1m.debug = 1;
#else
isac->l1m.debug = 0;
#endif
isac->l1m.userdata = isac;
isac->l1m.printdebug = l1m_debug;
FsmInitTimer(&isac->l1m, &isac->timer);
}
void isac_setup(struct isac *isac)
{
int val, eval;
isac->type = TYPE_ISAC;
isac_version(isac);
ph_command(isac, ISAC_CMD_RES);
isac->write_isac(isac, ISAC_MASK, 0xff);
isac->mocr = 0xaa;
if (test_bit(ISAC_IOM1, &isac->flags)) {
/* IOM 1 Mode */
isac->write_isac(isac, ISAC_ADF2, 0x0);
isac->write_isac(isac, ISAC_SPCR, 0xa);
isac->write_isac(isac, ISAC_ADF1, 0x2);
isac->write_isac(isac, ISAC_STCR, 0x70);
isac->write_isac(isac, ISAC_MODE, 0xc9);
} else {
/* IOM 2 Mode */
if (!isac->adf2)
isac->adf2 = 0x80;
isac->write_isac(isac, ISAC_ADF2, isac->adf2);
isac->write_isac(isac, ISAC_SQXR, 0x2f);
isac->write_isac(isac, ISAC_SPCR, 0x00);
isac->write_isac(isac, ISAC_STCR, 0x70);
isac->write_isac(isac, ISAC_MODE, 0xc9);
isac->write_isac(isac, ISAC_TIMR, 0x00);
isac->write_isac(isac, ISAC_ADF1, 0x00);
}
val = isac->read_isac(isac, ISAC_STAR);
DBG(2, "ISAC STAR %x", val);
val = isac->read_isac(isac, ISAC_MODE);
DBG(2, "ISAC MODE %x", val);
val = isac->read_isac(isac, ISAC_ADF2);
DBG(2, "ISAC ADF2 %x", val);
val = isac->read_isac(isac, ISAC_ISTA);
DBG(2, "ISAC ISTA %x", val);
if (val & 0x01) {
eval = isac->read_isac(isac, ISAC_EXIR);
DBG(2, "ISAC EXIR %x", eval);
}
val = isac->read_isac(isac, ISAC_CIR0);
DBG(2, "ISAC CIR0 %x", val);
FsmEvent(&isac->l1m, (val >> 2) & 0xf, NULL);
isac->write_isac(isac, ISAC_MASK, 0x0);
// RESET Receiver and Transmitter
isac->write_isac(isac, ISAC_CMDR, ISAC_CMDR_XRES | ISAC_CMDR_RRES);
}
void isacsx_setup(struct isac *isac)
{
isac->type = TYPE_ISACSX;
// clear LDD
isac->write_isac(isac, ISACSX_TR_CONF0, 0x00);
// enable transmitter
isac->write_isac(isac, ISACSX_TR_CONF2, 0x00);
// transparent mode 0, RAC, stop/go
isac->write_isac(isac, ISACSX_MODED, 0xc9);
// all HDLC IRQ unmasked
isac->write_isac(isac, ISACSX_MASKD, 0x03);
// unmask ICD, CID IRQs
isac->write_isac(isac, ISACSX_MASK,
~(ISACSX_ISTA_ICD | ISACSX_ISTA_CIC));
}
void isac_d_l2l1(struct hisax_if *hisax_d_if, int pr, void *arg)
{
struct isac *isac = hisax_d_if->priv;
struct sk_buff *skb = arg;
DBG(DBG_PR, "pr %#x", pr);
switch (pr) {
case PH_ACTIVATE | REQUEST:
FsmEvent(&isac->l1m, EV_PH_ACTIVATE_REQ, NULL);
break;
case PH_DEACTIVATE | REQUEST:
FsmEvent(&isac->l1m, EV_PH_DEACTIVATE_REQ, NULL);
break;
case PH_DATA | REQUEST:
DBG(DBG_PR, "PH_DATA REQUEST len %d", skb->len);
DBG_SKB(DBG_XPACKET, skb);
if (isac->l1m.state != ST_L1_F7) {
DBG(1, "L1 wrong state %d\n", isac->l1m.state);
dev_kfree_skb(skb);
break;
}
BUG_ON(isac->tx_skb);
isac->tx_skb = skb;
isac_fill_fifo(isac);
break;
}
}
static int __init hisax_isac_init(void)
{
printk(KERN_INFO "hisax_isac: ISAC-S/ISAC-SX ISDN driver v0.1.0\n");
l1fsm.state_count = L1_STATE_COUNT;
l1fsm.event_count = L1_EVENT_COUNT;
l1fsm.strState = strL1State;
l1fsm.strEvent = strL1Event;
return FsmNew(&l1fsm, L1FnList, ARRAY_SIZE(L1FnList));
}
static void __exit hisax_isac_exit(void)
{
FsmFree(&l1fsm);
}
EXPORT_SYMBOL(isac_init);
EXPORT_SYMBOL(isac_d_l2l1);
EXPORT_SYMBOL(isacsx_setup);
EXPORT_SYMBOL(isacsx_irq);
EXPORT_SYMBOL(isac_setup);
EXPORT_SYMBOL(isac_irq);
module_init(hisax_isac_init);
module_exit(hisax_isac_exit);
| gpl-2.0 |
Euphoria-OS-Devices/android_kernel_lge_msm8974 | arch/x86/math-emu/poly_l2.c | 14420 | 7242 | /*---------------------------------------------------------------------------+
| poly_l2.c |
| |
| Compute the base 2 log of a FPU_REG, using a polynomial approximation. |
| |
| Copyright (C) 1992,1993,1994,1997 |
| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, Australia |
| E-mail billm@suburbia.net |
| |
| |
+---------------------------------------------------------------------------*/
#include "exception.h"
#include "reg_constant.h"
#include "fpu_emu.h"
#include "fpu_system.h"
#include "control_w.h"
#include "poly.h"
static void log2_kernel(FPU_REG const *arg, u_char argsign,
Xsig * accum_result, long int *expon);
/*--- poly_l2() -------------------------------------------------------------+
| Base 2 logarithm by a polynomial approximation. |
+---------------------------------------------------------------------------*/
void poly_l2(FPU_REG *st0_ptr, FPU_REG *st1_ptr, u_char st1_sign)
{
long int exponent, expon, expon_expon;
Xsig accumulator, expon_accum, yaccum;
u_char sign, argsign;
FPU_REG x;
int tag;
exponent = exponent16(st0_ptr);
/* From st0_ptr, make a number > sqrt(2)/2 and < sqrt(2) */
if (st0_ptr->sigh > (unsigned)0xb504f334) {
/* Treat as sqrt(2)/2 < st0_ptr < 1 */
significand(&x) = -significand(st0_ptr);
setexponent16(&x, -1);
exponent++;
argsign = SIGN_NEG;
} else {
/* Treat as 1 <= st0_ptr < sqrt(2) */
x.sigh = st0_ptr->sigh - 0x80000000;
x.sigl = st0_ptr->sigl;
setexponent16(&x, 0);
argsign = SIGN_POS;
}
tag = FPU_normalize_nuo(&x);
if (tag == TAG_Zero) {
expon = 0;
accumulator.msw = accumulator.midw = accumulator.lsw = 0;
} else {
log2_kernel(&x, argsign, &accumulator, &expon);
}
if (exponent < 0) {
sign = SIGN_NEG;
exponent = -exponent;
} else
sign = SIGN_POS;
expon_accum.msw = exponent;
expon_accum.midw = expon_accum.lsw = 0;
if (exponent) {
expon_expon = 31 + norm_Xsig(&expon_accum);
shr_Xsig(&accumulator, expon_expon - expon);
if (sign ^ argsign)
negate_Xsig(&accumulator);
add_Xsig_Xsig(&accumulator, &expon_accum);
} else {
expon_expon = expon;
sign = argsign;
}
yaccum.lsw = 0;
XSIG_LL(yaccum) = significand(st1_ptr);
mul_Xsig_Xsig(&accumulator, &yaccum);
expon_expon += round_Xsig(&accumulator);
if (accumulator.msw == 0) {
FPU_copy_to_reg1(&CONST_Z, TAG_Zero);
return;
}
significand(st1_ptr) = XSIG_LL(accumulator);
setexponent16(st1_ptr, expon_expon + exponent16(st1_ptr) + 1);
tag = FPU_round(st1_ptr, 1, 0, FULL_PRECISION, sign ^ st1_sign);
FPU_settagi(1, tag);
set_precision_flag_up(); /* 80486 appears to always do this */
return;
}
/*--- poly_l2p1() -----------------------------------------------------------+
| Base 2 logarithm by a polynomial approximation. |
| log2(x+1) |
+---------------------------------------------------------------------------*/
int poly_l2p1(u_char sign0, u_char sign1,
FPU_REG * st0_ptr, FPU_REG * st1_ptr, FPU_REG * dest)
{
u_char tag;
long int exponent;
Xsig accumulator, yaccum;
if (exponent16(st0_ptr) < 0) {
log2_kernel(st0_ptr, sign0, &accumulator, &exponent);
yaccum.lsw = 0;
XSIG_LL(yaccum) = significand(st1_ptr);
mul_Xsig_Xsig(&accumulator, &yaccum);
exponent += round_Xsig(&accumulator);
exponent += exponent16(st1_ptr) + 1;
if (exponent < EXP_WAY_UNDER)
exponent = EXP_WAY_UNDER;
significand(dest) = XSIG_LL(accumulator);
setexponent16(dest, exponent);
tag = FPU_round(dest, 1, 0, FULL_PRECISION, sign0 ^ sign1);
FPU_settagi(1, tag);
if (tag == TAG_Valid)
set_precision_flag_up(); /* 80486 appears to always do this */
} else {
/* The magnitude of st0_ptr is far too large. */
if (sign0 != SIGN_POS) {
/* Trying to get the log of a negative number. */
#ifdef PECULIAR_486 /* Stupid 80486 doesn't worry about log(negative). */
changesign(st1_ptr);
#else
if (arith_invalid(1) < 0)
return 1;
#endif /* PECULIAR_486 */
}
/* 80486 appears to do this */
if (sign0 == SIGN_NEG)
set_precision_flag_down();
else
set_precision_flag_up();
}
if (exponent(dest) <= EXP_UNDER)
EXCEPTION(EX_Underflow);
return 0;
}
#undef HIPOWER
#define HIPOWER 10
static const unsigned long long logterms[HIPOWER] = {
0x2a8eca5705fc2ef0LL,
0xf6384ee1d01febceLL,
0x093bb62877cdf642LL,
0x006985d8a9ec439bLL,
0x0005212c4f55a9c8LL,
0x00004326a16927f0LL,
0x0000038d1d80a0e7LL,
0x0000003141cc80c6LL,
0x00000002b1668c9fLL,
0x000000002c7a46aaLL
};
static const unsigned long leadterm = 0xb8000000;
/*--- log2_kernel() ---------------------------------------------------------+
| Base 2 logarithm by a polynomial approximation. |
| log2(x+1) |
+---------------------------------------------------------------------------*/
static void log2_kernel(FPU_REG const *arg, u_char argsign, Xsig *accum_result,
long int *expon)
{
long int exponent, adj;
unsigned long long Xsq;
Xsig accumulator, Numer, Denom, argSignif, arg_signif;
exponent = exponent16(arg);
Numer.lsw = Denom.lsw = 0;
XSIG_LL(Numer) = XSIG_LL(Denom) = significand(arg);
if (argsign == SIGN_POS) {
shr_Xsig(&Denom, 2 - (1 + exponent));
Denom.msw |= 0x80000000;
div_Xsig(&Numer, &Denom, &argSignif);
} else {
shr_Xsig(&Denom, 1 - (1 + exponent));
negate_Xsig(&Denom);
if (Denom.msw & 0x80000000) {
div_Xsig(&Numer, &Denom, &argSignif);
exponent++;
} else {
/* Denom must be 1.0 */
argSignif.lsw = Numer.lsw;
argSignif.midw = Numer.midw;
argSignif.msw = Numer.msw;
}
}
#ifndef PECULIAR_486
/* Should check here that |local_arg| is within the valid range */
if (exponent >= -2) {
if ((exponent > -2) || (argSignif.msw > (unsigned)0xafb0ccc0)) {
/* The argument is too large */
}
}
#endif /* PECULIAR_486 */
arg_signif.lsw = argSignif.lsw;
XSIG_LL(arg_signif) = XSIG_LL(argSignif);
adj = norm_Xsig(&argSignif);
accumulator.lsw = argSignif.lsw;
XSIG_LL(accumulator) = XSIG_LL(argSignif);
mul_Xsig_Xsig(&accumulator, &accumulator);
shr_Xsig(&accumulator, 2 * (-1 - (1 + exponent + adj)));
Xsq = XSIG_LL(accumulator);
if (accumulator.lsw & 0x80000000)
Xsq++;
accumulator.msw = accumulator.midw = accumulator.lsw = 0;
/* Do the basic fixed point polynomial evaluation */
polynomial_Xsig(&accumulator, &Xsq, logterms, HIPOWER - 1);
mul_Xsig_Xsig(&accumulator, &argSignif);
shr_Xsig(&accumulator, 6 - adj);
mul32_Xsig(&arg_signif, leadterm);
add_two_Xsig(&accumulator, &arg_signif, &exponent);
*expon = exponent + 1;
accum_result->lsw = accumulator.lsw;
accum_result->midw = accumulator.midw;
accum_result->msw = accumulator.msw;
}
| gpl-2.0 |
embeddedarm/linux-3.0.35 | arch/x86/math-emu/poly_tan.c | 14420 | 6911 | /*---------------------------------------------------------------------------+
| poly_tan.c |
| |
| Compute the tan of a FPU_REG, using a polynomial approximation. |
| |
| Copyright (C) 1992,1993,1994,1997,1999 |
| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
| Australia. E-mail billm@melbpc.org.au |
| |
| |
+---------------------------------------------------------------------------*/
#include "exception.h"
#include "reg_constant.h"
#include "fpu_emu.h"
#include "fpu_system.h"
#include "control_w.h"
#include "poly.h"
#define HiPOWERop 3 /* odd poly, positive terms */
static const unsigned long long oddplterm[HiPOWERop] = {
0x0000000000000000LL,
0x0051a1cf08fca228LL,
0x0000000071284ff7LL
};
#define HiPOWERon 2 /* odd poly, negative terms */
static const unsigned long long oddnegterm[HiPOWERon] = {
0x1291a9a184244e80LL,
0x0000583245819c21LL
};
#define HiPOWERep 2 /* even poly, positive terms */
static const unsigned long long evenplterm[HiPOWERep] = {
0x0e848884b539e888LL,
0x00003c7f18b887daLL
};
#define HiPOWERen 2 /* even poly, negative terms */
static const unsigned long long evennegterm[HiPOWERen] = {
0xf1f0200fd51569ccLL,
0x003afb46105c4432LL
};
static const unsigned long long twothirds = 0xaaaaaaaaaaaaaaabLL;
/*--- poly_tan() ------------------------------------------------------------+
| |
+---------------------------------------------------------------------------*/
void poly_tan(FPU_REG *st0_ptr)
{
long int exponent;
int invert;
Xsig argSq, argSqSq, accumulatoro, accumulatore, accum,
argSignif, fix_up;
unsigned long adj;
exponent = exponent(st0_ptr);
#ifdef PARANOID
if (signnegative(st0_ptr)) { /* Can't hack a number < 0.0 */
arith_invalid(0);
return;
} /* Need a positive number */
#endif /* PARANOID */
/* Split the problem into two domains, smaller and larger than pi/4 */
if ((exponent == 0)
|| ((exponent == -1) && (st0_ptr->sigh > 0xc90fdaa2))) {
/* The argument is greater than (approx) pi/4 */
invert = 1;
accum.lsw = 0;
XSIG_LL(accum) = significand(st0_ptr);
if (exponent == 0) {
/* The argument is >= 1.0 */
/* Put the binary point at the left. */
XSIG_LL(accum) <<= 1;
}
/* pi/2 in hex is: 1.921fb54442d18469 898CC51701B839A2 52049C1 */
XSIG_LL(accum) = 0x921fb54442d18469LL - XSIG_LL(accum);
/* This is a special case which arises due to rounding. */
if (XSIG_LL(accum) == 0xffffffffffffffffLL) {
FPU_settag0(TAG_Valid);
significand(st0_ptr) = 0x8a51e04daabda360LL;
setexponent16(st0_ptr,
(0x41 + EXTENDED_Ebias) | SIGN_Negative);
return;
}
argSignif.lsw = accum.lsw;
XSIG_LL(argSignif) = XSIG_LL(accum);
exponent = -1 + norm_Xsig(&argSignif);
} else {
invert = 0;
argSignif.lsw = 0;
XSIG_LL(accum) = XSIG_LL(argSignif) = significand(st0_ptr);
if (exponent < -1) {
/* shift the argument right by the required places */
if (FPU_shrx(&XSIG_LL(accum), -1 - exponent) >=
0x80000000U)
XSIG_LL(accum)++; /* round up */
}
}
XSIG_LL(argSq) = XSIG_LL(accum);
argSq.lsw = accum.lsw;
mul_Xsig_Xsig(&argSq, &argSq);
XSIG_LL(argSqSq) = XSIG_LL(argSq);
argSqSq.lsw = argSq.lsw;
mul_Xsig_Xsig(&argSqSq, &argSqSq);
/* Compute the negative terms for the numerator polynomial */
accumulatoro.msw = accumulatoro.midw = accumulatoro.lsw = 0;
polynomial_Xsig(&accumulatoro, &XSIG_LL(argSqSq), oddnegterm,
HiPOWERon - 1);
mul_Xsig_Xsig(&accumulatoro, &argSq);
negate_Xsig(&accumulatoro);
/* Add the positive terms */
polynomial_Xsig(&accumulatoro, &XSIG_LL(argSqSq), oddplterm,
HiPOWERop - 1);
/* Compute the positive terms for the denominator polynomial */
accumulatore.msw = accumulatore.midw = accumulatore.lsw = 0;
polynomial_Xsig(&accumulatore, &XSIG_LL(argSqSq), evenplterm,
HiPOWERep - 1);
mul_Xsig_Xsig(&accumulatore, &argSq);
negate_Xsig(&accumulatore);
/* Add the negative terms */
polynomial_Xsig(&accumulatore, &XSIG_LL(argSqSq), evennegterm,
HiPOWERen - 1);
/* Multiply by arg^2 */
mul64_Xsig(&accumulatore, &XSIG_LL(argSignif));
mul64_Xsig(&accumulatore, &XSIG_LL(argSignif));
/* de-normalize and divide by 2 */
shr_Xsig(&accumulatore, -2 * (1 + exponent) + 1);
negate_Xsig(&accumulatore); /* This does 1 - accumulator */
/* Now find the ratio. */
if (accumulatore.msw == 0) {
/* accumulatoro must contain 1.0 here, (actually, 0) but it
really doesn't matter what value we use because it will
have negligible effect in later calculations
*/
XSIG_LL(accum) = 0x8000000000000000LL;
accum.lsw = 0;
} else {
div_Xsig(&accumulatoro, &accumulatore, &accum);
}
/* Multiply by 1/3 * arg^3 */
mul64_Xsig(&accum, &XSIG_LL(argSignif));
mul64_Xsig(&accum, &XSIG_LL(argSignif));
mul64_Xsig(&accum, &XSIG_LL(argSignif));
mul64_Xsig(&accum, &twothirds);
shr_Xsig(&accum, -2 * (exponent + 1));
/* tan(arg) = arg + accum */
add_two_Xsig(&accum, &argSignif, &exponent);
if (invert) {
/* We now have the value of tan(pi_2 - arg) where pi_2 is an
approximation for pi/2
*/
/* The next step is to fix the answer to compensate for the
error due to the approximation used for pi/2
*/
/* This is (approx) delta, the error in our approx for pi/2
(see above). It has an exponent of -65
*/
XSIG_LL(fix_up) = 0x898cc51701b839a2LL;
fix_up.lsw = 0;
if (exponent == 0)
adj = 0xffffffff; /* We want approx 1.0 here, but
this is close enough. */
else if (exponent > -30) {
adj = accum.msw >> -(exponent + 1); /* tan */
adj = mul_32_32(adj, adj); /* tan^2 */
} else
adj = 0;
adj = mul_32_32(0x898cc517, adj); /* delta * tan^2 */
fix_up.msw += adj;
if (!(fix_up.msw & 0x80000000)) { /* did fix_up overflow ? */
/* Yes, we need to add an msb */
shr_Xsig(&fix_up, 1);
fix_up.msw |= 0x80000000;
shr_Xsig(&fix_up, 64 + exponent);
} else
shr_Xsig(&fix_up, 65 + exponent);
add_two_Xsig(&accum, &fix_up, &exponent);
/* accum now contains tan(pi/2 - arg).
Use tan(arg) = 1.0 / tan(pi/2 - arg)
*/
accumulatoro.lsw = accumulatoro.midw = 0;
accumulatoro.msw = 0x80000000;
div_Xsig(&accumulatoro, &accum, &accum);
exponent = -exponent - 1;
}
/* Transfer the result */
round_Xsig(&accum);
FPU_settag0(TAG_Valid);
significand(st0_ptr) = XSIG_LL(accum);
setexponent16(st0_ptr, exponent + EXTENDED_Ebias); /* Result is positive. */
}
| gpl-2.0 |
bigzz/linux-stable | net/bridge/br_sysfs_br.c | 85 | 24197 | /*
* Sysfs attributes of bridge
* Linux ethernet bridge
*
* Authors:
* Stephen Hemminger <shemminger@osdl.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/capability.h>
#include <linux/kernel.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/if_bridge.h>
#include <linux/rtnetlink.h>
#include <linux/spinlock.h>
#include <linux/times.h>
#include "br_private.h"
#define to_bridge(cd) ((struct net_bridge *)netdev_priv(to_net_dev(cd)))
/*
* Common code for storing bridge parameters.
*/
static ssize_t store_bridge_parm(struct device *d,
const char *buf, size_t len,
int (*set)(struct net_bridge *, unsigned long))
{
struct net_bridge *br = to_bridge(d);
char *endp;
unsigned long val;
int err;
if (!ns_capable(dev_net(br->dev)->user_ns, CAP_NET_ADMIN))
return -EPERM;
val = simple_strtoul(buf, &endp, 0);
if (endp == buf)
return -EINVAL;
err = (*set)(br, val);
return err ? err : len;
}
static ssize_t forward_delay_show(struct device *d,
struct device_attribute *attr, char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%lu\n", jiffies_to_clock_t(br->forward_delay));
}
static ssize_t forward_delay_store(struct device *d,
struct device_attribute *attr,
const char *buf, size_t len)
{
return store_bridge_parm(d, buf, len, br_set_forward_delay);
}
static DEVICE_ATTR_RW(forward_delay);
static ssize_t hello_time_show(struct device *d, struct device_attribute *attr,
char *buf)
{
return sprintf(buf, "%lu\n",
jiffies_to_clock_t(to_bridge(d)->hello_time));
}
static ssize_t hello_time_store(struct device *d,
struct device_attribute *attr, const char *buf,
size_t len)
{
return store_bridge_parm(d, buf, len, br_set_hello_time);
}
static DEVICE_ATTR_RW(hello_time);
static ssize_t max_age_show(struct device *d, struct device_attribute *attr,
char *buf)
{
return sprintf(buf, "%lu\n",
jiffies_to_clock_t(to_bridge(d)->max_age));
}
static ssize_t max_age_store(struct device *d, struct device_attribute *attr,
const char *buf, size_t len)
{
return store_bridge_parm(d, buf, len, br_set_max_age);
}
static DEVICE_ATTR_RW(max_age);
static ssize_t ageing_time_show(struct device *d,
struct device_attribute *attr, char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%lu\n", jiffies_to_clock_t(br->ageing_time));
}
static int set_ageing_time(struct net_bridge *br, unsigned long val)
{
int ret;
if (!rtnl_trylock())
return restart_syscall();
ret = br_set_ageing_time(br, val);
rtnl_unlock();
return ret;
}
static ssize_t ageing_time_store(struct device *d,
struct device_attribute *attr,
const char *buf, size_t len)
{
return store_bridge_parm(d, buf, len, set_ageing_time);
}
static DEVICE_ATTR_RW(ageing_time);
static ssize_t stp_state_show(struct device *d,
struct device_attribute *attr, char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%d\n", br->stp_enabled);
}
static ssize_t stp_state_store(struct device *d,
struct device_attribute *attr, const char *buf,
size_t len)
{
struct net_bridge *br = to_bridge(d);
char *endp;
unsigned long val;
if (!ns_capable(dev_net(br->dev)->user_ns, CAP_NET_ADMIN))
return -EPERM;
val = simple_strtoul(buf, &endp, 0);
if (endp == buf)
return -EINVAL;
if (!rtnl_trylock())
return restart_syscall();
br_stp_set_enabled(br, val);
rtnl_unlock();
return len;
}
static DEVICE_ATTR_RW(stp_state);
static ssize_t group_fwd_mask_show(struct device *d,
struct device_attribute *attr,
char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%#x\n", br->group_fwd_mask);
}
static ssize_t group_fwd_mask_store(struct device *d,
struct device_attribute *attr,
const char *buf,
size_t len)
{
struct net_bridge *br = to_bridge(d);
char *endp;
unsigned long val;
if (!ns_capable(dev_net(br->dev)->user_ns, CAP_NET_ADMIN))
return -EPERM;
val = simple_strtoul(buf, &endp, 0);
if (endp == buf)
return -EINVAL;
if (val & BR_GROUPFWD_RESTRICTED)
return -EINVAL;
br->group_fwd_mask = val;
return len;
}
static DEVICE_ATTR_RW(group_fwd_mask);
static ssize_t priority_show(struct device *d, struct device_attribute *attr,
char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%d\n",
(br->bridge_id.prio[0] << 8) | br->bridge_id.prio[1]);
}
static int set_priority(struct net_bridge *br, unsigned long val)
{
br_stp_set_bridge_priority(br, (u16) val);
return 0;
}
static ssize_t priority_store(struct device *d, struct device_attribute *attr,
const char *buf, size_t len)
{
return store_bridge_parm(d, buf, len, set_priority);
}
static DEVICE_ATTR_RW(priority);
static ssize_t root_id_show(struct device *d, struct device_attribute *attr,
char *buf)
{
return br_show_bridge_id(buf, &to_bridge(d)->designated_root);
}
static DEVICE_ATTR_RO(root_id);
static ssize_t bridge_id_show(struct device *d, struct device_attribute *attr,
char *buf)
{
return br_show_bridge_id(buf, &to_bridge(d)->bridge_id);
}
static DEVICE_ATTR_RO(bridge_id);
static ssize_t root_port_show(struct device *d, struct device_attribute *attr,
char *buf)
{
return sprintf(buf, "%d\n", to_bridge(d)->root_port);
}
static DEVICE_ATTR_RO(root_port);
static ssize_t root_path_cost_show(struct device *d,
struct device_attribute *attr, char *buf)
{
return sprintf(buf, "%d\n", to_bridge(d)->root_path_cost);
}
static DEVICE_ATTR_RO(root_path_cost);
static ssize_t topology_change_show(struct device *d,
struct device_attribute *attr, char *buf)
{
return sprintf(buf, "%d\n", to_bridge(d)->topology_change);
}
static DEVICE_ATTR_RO(topology_change);
static ssize_t topology_change_detected_show(struct device *d,
struct device_attribute *attr,
char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%d\n", br->topology_change_detected);
}
static DEVICE_ATTR_RO(topology_change_detected);
static ssize_t hello_timer_show(struct device *d,
struct device_attribute *attr, char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%ld\n", br_timer_value(&br->hello_timer));
}
static DEVICE_ATTR_RO(hello_timer);
static ssize_t tcn_timer_show(struct device *d, struct device_attribute *attr,
char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%ld\n", br_timer_value(&br->tcn_timer));
}
static DEVICE_ATTR_RO(tcn_timer);
static ssize_t topology_change_timer_show(struct device *d,
struct device_attribute *attr,
char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%ld\n", br_timer_value(&br->topology_change_timer));
}
static DEVICE_ATTR_RO(topology_change_timer);
static ssize_t gc_timer_show(struct device *d, struct device_attribute *attr,
char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%ld\n", br_timer_value(&br->gc_timer));
}
static DEVICE_ATTR_RO(gc_timer);
static ssize_t group_addr_show(struct device *d,
struct device_attribute *attr, char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%x:%x:%x:%x:%x:%x\n",
br->group_addr[0], br->group_addr[1],
br->group_addr[2], br->group_addr[3],
br->group_addr[4], br->group_addr[5]);
}
static ssize_t group_addr_store(struct device *d,
struct device_attribute *attr,
const char *buf, size_t len)
{
struct net_bridge *br = to_bridge(d);
u8 new_addr[6];
int i;
if (!ns_capable(dev_net(br->dev)->user_ns, CAP_NET_ADMIN))
return -EPERM;
if (sscanf(buf, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx",
&new_addr[0], &new_addr[1], &new_addr[2],
&new_addr[3], &new_addr[4], &new_addr[5]) != 6)
return -EINVAL;
if (!is_link_local_ether_addr(new_addr))
return -EINVAL;
if (new_addr[5] == 1 || /* 802.3x Pause address */
new_addr[5] == 2 || /* 802.3ad Slow protocols */
new_addr[5] == 3) /* 802.1X PAE address */
return -EINVAL;
if (!rtnl_trylock())
return restart_syscall();
spin_lock_bh(&br->lock);
for (i = 0; i < 6; i++)
br->group_addr[i] = new_addr[i];
spin_unlock_bh(&br->lock);
br->group_addr_set = true;
br_recalculate_fwd_mask(br);
rtnl_unlock();
return len;
}
static DEVICE_ATTR_RW(group_addr);
static ssize_t flush_store(struct device *d,
struct device_attribute *attr,
const char *buf, size_t len)
{
struct net_bridge *br = to_bridge(d);
if (!ns_capable(dev_net(br->dev)->user_ns, CAP_NET_ADMIN))
return -EPERM;
br_fdb_flush(br);
return len;
}
static DEVICE_ATTR_WO(flush);
#ifdef CONFIG_BRIDGE_IGMP_SNOOPING
static ssize_t multicast_router_show(struct device *d,
struct device_attribute *attr, char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%d\n", br->multicast_router);
}
static ssize_t multicast_router_store(struct device *d,
struct device_attribute *attr,
const char *buf, size_t len)
{
return store_bridge_parm(d, buf, len, br_multicast_set_router);
}
static DEVICE_ATTR_RW(multicast_router);
static ssize_t multicast_snooping_show(struct device *d,
struct device_attribute *attr,
char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%d\n", !br->multicast_disabled);
}
static ssize_t multicast_snooping_store(struct device *d,
struct device_attribute *attr,
const char *buf, size_t len)
{
return store_bridge_parm(d, buf, len, br_multicast_toggle);
}
static DEVICE_ATTR_RW(multicast_snooping);
static ssize_t multicast_query_use_ifaddr_show(struct device *d,
struct device_attribute *attr,
char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%d\n", br->multicast_query_use_ifaddr);
}
static int set_query_use_ifaddr(struct net_bridge *br, unsigned long val)
{
br->multicast_query_use_ifaddr = !!val;
return 0;
}
static ssize_t
multicast_query_use_ifaddr_store(struct device *d,
struct device_attribute *attr,
const char *buf, size_t len)
{
return store_bridge_parm(d, buf, len, set_query_use_ifaddr);
}
static DEVICE_ATTR_RW(multicast_query_use_ifaddr);
static ssize_t multicast_querier_show(struct device *d,
struct device_attribute *attr,
char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%d\n", br->multicast_querier);
}
static ssize_t multicast_querier_store(struct device *d,
struct device_attribute *attr,
const char *buf, size_t len)
{
return store_bridge_parm(d, buf, len, br_multicast_set_querier);
}
static DEVICE_ATTR_RW(multicast_querier);
static ssize_t hash_elasticity_show(struct device *d,
struct device_attribute *attr, char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%u\n", br->hash_elasticity);
}
static int set_elasticity(struct net_bridge *br, unsigned long val)
{
br->hash_elasticity = val;
return 0;
}
static ssize_t hash_elasticity_store(struct device *d,
struct device_attribute *attr,
const char *buf, size_t len)
{
return store_bridge_parm(d, buf, len, set_elasticity);
}
static DEVICE_ATTR_RW(hash_elasticity);
static ssize_t hash_max_show(struct device *d, struct device_attribute *attr,
char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%u\n", br->hash_max);
}
static ssize_t hash_max_store(struct device *d, struct device_attribute *attr,
const char *buf, size_t len)
{
return store_bridge_parm(d, buf, len, br_multicast_set_hash_max);
}
static DEVICE_ATTR_RW(hash_max);
static ssize_t multicast_last_member_count_show(struct device *d,
struct device_attribute *attr,
char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%u\n", br->multicast_last_member_count);
}
static int set_last_member_count(struct net_bridge *br, unsigned long val)
{
br->multicast_last_member_count = val;
return 0;
}
static ssize_t multicast_last_member_count_store(struct device *d,
struct device_attribute *attr,
const char *buf, size_t len)
{
return store_bridge_parm(d, buf, len, set_last_member_count);
}
static DEVICE_ATTR_RW(multicast_last_member_count);
static ssize_t multicast_startup_query_count_show(
struct device *d, struct device_attribute *attr, char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%u\n", br->multicast_startup_query_count);
}
static int set_startup_query_count(struct net_bridge *br, unsigned long val)
{
br->multicast_startup_query_count = val;
return 0;
}
static ssize_t multicast_startup_query_count_store(
struct device *d, struct device_attribute *attr, const char *buf,
size_t len)
{
return store_bridge_parm(d, buf, len, set_startup_query_count);
}
static DEVICE_ATTR_RW(multicast_startup_query_count);
static ssize_t multicast_last_member_interval_show(
struct device *d, struct device_attribute *attr, char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%lu\n",
jiffies_to_clock_t(br->multicast_last_member_interval));
}
static int set_last_member_interval(struct net_bridge *br, unsigned long val)
{
br->multicast_last_member_interval = clock_t_to_jiffies(val);
return 0;
}
static ssize_t multicast_last_member_interval_store(
struct device *d, struct device_attribute *attr, const char *buf,
size_t len)
{
return store_bridge_parm(d, buf, len, set_last_member_interval);
}
static DEVICE_ATTR_RW(multicast_last_member_interval);
static ssize_t multicast_membership_interval_show(
struct device *d, struct device_attribute *attr, char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%lu\n",
jiffies_to_clock_t(br->multicast_membership_interval));
}
static int set_membership_interval(struct net_bridge *br, unsigned long val)
{
br->multicast_membership_interval = clock_t_to_jiffies(val);
return 0;
}
static ssize_t multicast_membership_interval_store(
struct device *d, struct device_attribute *attr, const char *buf,
size_t len)
{
return store_bridge_parm(d, buf, len, set_membership_interval);
}
static DEVICE_ATTR_RW(multicast_membership_interval);
static ssize_t multicast_querier_interval_show(struct device *d,
struct device_attribute *attr,
char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%lu\n",
jiffies_to_clock_t(br->multicast_querier_interval));
}
static int set_querier_interval(struct net_bridge *br, unsigned long val)
{
br->multicast_querier_interval = clock_t_to_jiffies(val);
return 0;
}
static ssize_t multicast_querier_interval_store(struct device *d,
struct device_attribute *attr,
const char *buf, size_t len)
{
return store_bridge_parm(d, buf, len, set_querier_interval);
}
static DEVICE_ATTR_RW(multicast_querier_interval);
static ssize_t multicast_query_interval_show(struct device *d,
struct device_attribute *attr,
char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%lu\n",
jiffies_to_clock_t(br->multicast_query_interval));
}
static int set_query_interval(struct net_bridge *br, unsigned long val)
{
br->multicast_query_interval = clock_t_to_jiffies(val);
return 0;
}
static ssize_t multicast_query_interval_store(struct device *d,
struct device_attribute *attr,
const char *buf, size_t len)
{
return store_bridge_parm(d, buf, len, set_query_interval);
}
static DEVICE_ATTR_RW(multicast_query_interval);
static ssize_t multicast_query_response_interval_show(
struct device *d, struct device_attribute *attr, char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(
buf, "%lu\n",
jiffies_to_clock_t(br->multicast_query_response_interval));
}
static int set_query_response_interval(struct net_bridge *br, unsigned long val)
{
br->multicast_query_response_interval = clock_t_to_jiffies(val);
return 0;
}
static ssize_t multicast_query_response_interval_store(
struct device *d, struct device_attribute *attr, const char *buf,
size_t len)
{
return store_bridge_parm(d, buf, len, set_query_response_interval);
}
static DEVICE_ATTR_RW(multicast_query_response_interval);
static ssize_t multicast_startup_query_interval_show(
struct device *d, struct device_attribute *attr, char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(
buf, "%lu\n",
jiffies_to_clock_t(br->multicast_startup_query_interval));
}
static int set_startup_query_interval(struct net_bridge *br, unsigned long val)
{
br->multicast_startup_query_interval = clock_t_to_jiffies(val);
return 0;
}
static ssize_t multicast_startup_query_interval_store(
struct device *d, struct device_attribute *attr, const char *buf,
size_t len)
{
return store_bridge_parm(d, buf, len, set_startup_query_interval);
}
static DEVICE_ATTR_RW(multicast_startup_query_interval);
#endif
#if IS_ENABLED(CONFIG_BRIDGE_NETFILTER)
static ssize_t nf_call_iptables_show(
struct device *d, struct device_attribute *attr, char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%u\n", br->nf_call_iptables);
}
static int set_nf_call_iptables(struct net_bridge *br, unsigned long val)
{
br->nf_call_iptables = val ? true : false;
return 0;
}
static ssize_t nf_call_iptables_store(
struct device *d, struct device_attribute *attr, const char *buf,
size_t len)
{
return store_bridge_parm(d, buf, len, set_nf_call_iptables);
}
static DEVICE_ATTR_RW(nf_call_iptables);
static ssize_t nf_call_ip6tables_show(
struct device *d, struct device_attribute *attr, char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%u\n", br->nf_call_ip6tables);
}
static int set_nf_call_ip6tables(struct net_bridge *br, unsigned long val)
{
br->nf_call_ip6tables = val ? true : false;
return 0;
}
static ssize_t nf_call_ip6tables_store(
struct device *d, struct device_attribute *attr, const char *buf,
size_t len)
{
return store_bridge_parm(d, buf, len, set_nf_call_ip6tables);
}
static DEVICE_ATTR_RW(nf_call_ip6tables);
static ssize_t nf_call_arptables_show(
struct device *d, struct device_attribute *attr, char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%u\n", br->nf_call_arptables);
}
static int set_nf_call_arptables(struct net_bridge *br, unsigned long val)
{
br->nf_call_arptables = val ? true : false;
return 0;
}
static ssize_t nf_call_arptables_store(
struct device *d, struct device_attribute *attr, const char *buf,
size_t len)
{
return store_bridge_parm(d, buf, len, set_nf_call_arptables);
}
static DEVICE_ATTR_RW(nf_call_arptables);
#endif
#ifdef CONFIG_BRIDGE_VLAN_FILTERING
static ssize_t vlan_filtering_show(struct device *d,
struct device_attribute *attr,
char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%d\n", br->vlan_enabled);
}
static ssize_t vlan_filtering_store(struct device *d,
struct device_attribute *attr,
const char *buf, size_t len)
{
return store_bridge_parm(d, buf, len, br_vlan_filter_toggle);
}
static DEVICE_ATTR_RW(vlan_filtering);
static ssize_t vlan_protocol_show(struct device *d,
struct device_attribute *attr,
char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%#06x\n", ntohs(br->vlan_proto));
}
static ssize_t vlan_protocol_store(struct device *d,
struct device_attribute *attr,
const char *buf, size_t len)
{
return store_bridge_parm(d, buf, len, br_vlan_set_proto);
}
static DEVICE_ATTR_RW(vlan_protocol);
static ssize_t default_pvid_show(struct device *d,
struct device_attribute *attr,
char *buf)
{
struct net_bridge *br = to_bridge(d);
return sprintf(buf, "%d\n", br->default_pvid);
}
static ssize_t default_pvid_store(struct device *d,
struct device_attribute *attr,
const char *buf, size_t len)
{
return store_bridge_parm(d, buf, len, br_vlan_set_default_pvid);
}
static DEVICE_ATTR_RW(default_pvid);
#endif
static struct attribute *bridge_attrs[] = {
&dev_attr_forward_delay.attr,
&dev_attr_hello_time.attr,
&dev_attr_max_age.attr,
&dev_attr_ageing_time.attr,
&dev_attr_stp_state.attr,
&dev_attr_group_fwd_mask.attr,
&dev_attr_priority.attr,
&dev_attr_bridge_id.attr,
&dev_attr_root_id.attr,
&dev_attr_root_path_cost.attr,
&dev_attr_root_port.attr,
&dev_attr_topology_change.attr,
&dev_attr_topology_change_detected.attr,
&dev_attr_hello_timer.attr,
&dev_attr_tcn_timer.attr,
&dev_attr_topology_change_timer.attr,
&dev_attr_gc_timer.attr,
&dev_attr_group_addr.attr,
&dev_attr_flush.attr,
#ifdef CONFIG_BRIDGE_IGMP_SNOOPING
&dev_attr_multicast_router.attr,
&dev_attr_multicast_snooping.attr,
&dev_attr_multicast_querier.attr,
&dev_attr_multicast_query_use_ifaddr.attr,
&dev_attr_hash_elasticity.attr,
&dev_attr_hash_max.attr,
&dev_attr_multicast_last_member_count.attr,
&dev_attr_multicast_startup_query_count.attr,
&dev_attr_multicast_last_member_interval.attr,
&dev_attr_multicast_membership_interval.attr,
&dev_attr_multicast_querier_interval.attr,
&dev_attr_multicast_query_interval.attr,
&dev_attr_multicast_query_response_interval.attr,
&dev_attr_multicast_startup_query_interval.attr,
#endif
#if IS_ENABLED(CONFIG_BRIDGE_NETFILTER)
&dev_attr_nf_call_iptables.attr,
&dev_attr_nf_call_ip6tables.attr,
&dev_attr_nf_call_arptables.attr,
#endif
#ifdef CONFIG_BRIDGE_VLAN_FILTERING
&dev_attr_vlan_filtering.attr,
&dev_attr_vlan_protocol.attr,
&dev_attr_default_pvid.attr,
#endif
NULL
};
static struct attribute_group bridge_group = {
.name = SYSFS_BRIDGE_ATTR,
.attrs = bridge_attrs,
};
/*
* Export the forwarding information table as a binary file
* The records are struct __fdb_entry.
*
* Returns the number of bytes read.
*/
static ssize_t brforward_read(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
struct device *dev = kobj_to_dev(kobj);
struct net_bridge *br = to_bridge(dev);
int n;
/* must read whole records */
if (off % sizeof(struct __fdb_entry) != 0)
return -EINVAL;
n = br_fdb_fillbuf(br, buf,
count / sizeof(struct __fdb_entry),
off / sizeof(struct __fdb_entry));
if (n > 0)
n *= sizeof(struct __fdb_entry);
return n;
}
static struct bin_attribute bridge_forward = {
.attr = { .name = SYSFS_BRIDGE_FDB,
.mode = S_IRUGO, },
.read = brforward_read,
};
/*
* Add entries in sysfs onto the existing network class device
* for the bridge.
* Adds a attribute group "bridge" containing tuning parameters.
* Binary attribute containing the forward table
* Sub directory to hold links to interfaces.
*
* Note: the ifobj exists only to be a subdirectory
* to hold links. The ifobj exists in same data structure
* as it's parent the bridge so reference counting works.
*/
int br_sysfs_addbr(struct net_device *dev)
{
struct kobject *brobj = &dev->dev.kobj;
struct net_bridge *br = netdev_priv(dev);
int err;
err = sysfs_create_group(brobj, &bridge_group);
if (err) {
pr_info("%s: can't create group %s/%s\n",
__func__, dev->name, bridge_group.name);
goto out1;
}
err = sysfs_create_bin_file(brobj, &bridge_forward);
if (err) {
pr_info("%s: can't create attribute file %s/%s\n",
__func__, dev->name, bridge_forward.attr.name);
goto out2;
}
br->ifobj = kobject_create_and_add(SYSFS_BRIDGE_PORT_SUBDIR, brobj);
if (!br->ifobj) {
pr_info("%s: can't add kobject (directory) %s/%s\n",
__func__, dev->name, SYSFS_BRIDGE_PORT_SUBDIR);
goto out3;
}
return 0;
out3:
sysfs_remove_bin_file(&dev->dev.kobj, &bridge_forward);
out2:
sysfs_remove_group(&dev->dev.kobj, &bridge_group);
out1:
return err;
}
void br_sysfs_delbr(struct net_device *dev)
{
struct kobject *kobj = &dev->dev.kobj;
struct net_bridge *br = netdev_priv(dev);
kobject_put(br->ifobj);
sysfs_remove_bin_file(kobj, &bridge_forward);
sysfs_remove_group(kobj, &bridge_group);
}
| gpl-2.0 |
Evervolv/android_kernel_samsung_msm8660 | drivers/media/video/msm/msm_vpe1.c | 85 | 40513 | /* Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/uaccess.h>
#include <linux/interrupt.h>
#include <mach/irqs.h>
#include <linux/io.h>
#include <linux/slab.h>
#include "msm_vpe1.h"
#include <linux/pm_qos_params.h>
#include <linux/clk.h>
#include <mach/clk.h>
#include <asm/div64.h>
static int vpe_enable(uint32_t);
static int vpe_disable(void);
static int vpe_update_scaler(struct video_crop_t *pcrop);
static struct vpe_device_type vpe_device_data;
static struct vpe_device_type *vpe_device;
struct vpe_ctrl_type *vpe_ctrl;
char *vpe_general_cmd[] = {
"VPE_DUMMY_0", /* 0 */
"VPE_SET_CLK",
"VPE_RESET",
"VPE_START",
"VPE_ABORT",
"VPE_OPERATION_MODE_CFG", /* 5 */
"VPE_INPUT_PLANE_CFG",
"VPE_OUTPUT_PLANE_CFG",
"VPE_INPUT_PLANE_UPDATE",
"VPE_SCALE_CFG_TYPE",
"VPE_ROTATION_CFG_TYPE", /* 10 */
"VPE_AXI_OUT_CFG",
"VPE_CMD_DIS_OFFSET_CFG",
"VPE_ENABLE",
"VPE_DISABLE",
};
static uint32_t orig_src_y, orig_src_cbcr;
#define CHECKED_COPY_FROM_USER(in) { \
if (copy_from_user((in), (void __user *)cmd->value, \
cmd->length)) { \
rc = -EFAULT; \
break; \
} \
}
#define msm_dequeue_vpe(queue, member) ({ \
unsigned long flags; \
struct msm_device_queue *__q = (queue); \
struct msm_queue_cmd *qcmd = 0; \
spin_lock_irqsave(&__q->lock, flags); \
if (!list_empty(&__q->list)) { \
__q->len--; \
qcmd = list_first_entry(&__q->list, \
struct msm_queue_cmd, member); \
list_del_init(&qcmd->member); \
} \
spin_unlock_irqrestore(&__q->lock, flags); \
qcmd; \
})
/*
static struct vpe_cmd_type vpe_cmd[] = {
{VPE_DUMMY_0, 0},
{VPE_SET_CLK, 0},
{VPE_RESET, 0},
{VPE_START, 0},
{VPE_ABORT, 0},
{VPE_OPERATION_MODE_CFG, VPE_OPERATION_MODE_CFG_LEN},
{VPE_INPUT_PLANE_CFG, VPE_INPUT_PLANE_CFG_LEN},
{VPE_OUTPUT_PLANE_CFG, VPE_OUTPUT_PLANE_CFG_LEN},
{VPE_INPUT_PLANE_UPDATE, VPE_INPUT_PLANE_UPDATE_LEN},
{VPE_SCALE_CFG_TYPE, VPE_SCALER_CONFIG_LEN},
{VPE_ROTATION_CFG_TYPE, 0},
{VPE_AXI_OUT_CFG, 0},
{VPE_CMD_DIS_OFFSET_CFG, VPE_DIS_OFFSET_CFG_LEN},
};
*/
static long long vpe_do_div(long long num, long long den)
{
do_div(num, den);
return num;
}
static int vpe_start(void)
{
/* enable the frame irq, bit 0 = Display list 0 ROI done */
msm_io_w(1, vpe_device->vpebase + VPE_INTR_ENABLE_OFFSET);
msm_io_dump(vpe_device->vpebase + 0x10000, 0x250);
/* this triggers the operation. */
msm_io_w(1, vpe_device->vpebase + VPE_DL0_START_OFFSET);
return 0;
}
void vpe_reset_state_variables(void)
{
/* initialize local variables for state control, etc.*/
vpe_ctrl->op_mode = 0;
vpe_ctrl->state = VPE_STATE_INIT;
spin_lock_init(&vpe_ctrl->tasklet_lock);
spin_lock_init(&vpe_ctrl->state_lock);
INIT_LIST_HEAD(&vpe_ctrl->tasklet_q);
}
static void vpe_config_axi_default(void)
{
msm_io_w(0x25, vpe_device->vpebase + VPE_AXI_ARB_2_OFFSET);
CDBG("%s: yaddr %ld cbcraddr %ld", __func__,
vpe_ctrl->out_y_addr, vpe_ctrl->out_cbcr_addr);
if (!vpe_ctrl->out_y_addr || !vpe_ctrl->out_cbcr_addr)
return;
msm_io_w(vpe_ctrl->out_y_addr,
vpe_device->vpebase + VPE_OUTP0_ADDR_OFFSET);
/* for video CbCr address */
msm_io_w(vpe_ctrl->out_cbcr_addr,
vpe_device->vpebase + VPE_OUTP1_ADDR_OFFSET);
}
static int vpe_reset(void)
{
uint32_t vpe_version;
uint32_t rc;
vpe_reset_state_variables();
vpe_version = msm_io_r(vpe_device->vpebase + VPE_HW_VERSION_OFFSET);
CDBG("vpe_version = 0x%x\n", vpe_version);
/* disable all interrupts.*/
msm_io_w(0, vpe_device->vpebase + VPE_INTR_ENABLE_OFFSET);
/* clear all pending interrupts*/
msm_io_w(0x1fffff, vpe_device->vpebase + VPE_INTR_CLEAR_OFFSET);
/* write sw_reset to reset the core. */
msm_io_w(0x10, vpe_device->vpebase + VPE_SW_RESET_OFFSET);
/* then poll the reset bit, it should be self-cleared. */
while (1) {
rc =
msm_io_r(vpe_device->vpebase + VPE_SW_RESET_OFFSET) & 0x10;
if (rc == 0)
break;
}
/* at this point, hardware is reset. Then pogram to default
values. */
msm_io_w(VPE_AXI_RD_ARB_CONFIG_VALUE,
vpe_device->vpebase + VPE_AXI_RD_ARB_CONFIG_OFFSET);
msm_io_w(VPE_CGC_ENABLE_VALUE,
vpe_device->vpebase + VPE_CGC_EN_OFFSET);
msm_io_w(1, vpe_device->vpebase + VPE_CMD_MODE_OFFSET);
msm_io_w(VPE_DEFAULT_OP_MODE_VALUE,
vpe_device->vpebase + VPE_OP_MODE_OFFSET);
msm_io_w(VPE_DEFAULT_SCALE_CONFIG,
vpe_device->vpebase + VPE_SCALE_CONFIG_OFFSET);
vpe_config_axi_default();
return 0;
}
int msm_vpe_cfg_update(void *pinfo)
{
uint32_t rot_flag, rc = 0;
struct video_crop_t *pcrop = (struct video_crop_t *)pinfo;
rot_flag = msm_io_r(vpe_device->vpebase +
VPE_OP_MODE_OFFSET) & 0xE00;
if (pinfo != NULL) {
CDBG("Crop info in2_w = %d, in2_h = %d "
"out2_h = %d out2_w = %d \n", pcrop->in2_w,
pcrop->in2_h,
pcrop->out2_h, pcrop->out2_w);
rc = vpe_update_scaler(pcrop);
}
CDBG("return rc = %d rot_flag = %d\n", rc, rot_flag);
rc |= rot_flag;
return rc;
}
void vpe_update_scale_coef(uint32_t *p)
{
uint32_t i, offset;
offset = *p;
for (i = offset; i < (VPE_SCALE_COEFF_NUM + offset); i++) {
msm_io_w(*(++p), vpe_device->vpebase + VPE_SCALE_COEFF_LSBn(i));
msm_io_w(*(++p), vpe_device->vpebase + VPE_SCALE_COEFF_MSBn(i));
}
}
void vpe_input_plane_config(uint32_t *p)
{
msm_io_w(*p, vpe_device->vpebase + VPE_SRC_FORMAT_OFFSET);
msm_io_w(*(++p), vpe_device->vpebase + VPE_SRC_UNPACK_PATTERN1_OFFSET);
msm_io_w(*(++p), vpe_device->vpebase + VPE_SRC_IMAGE_SIZE_OFFSET);
msm_io_w(*(++p), vpe_device->vpebase + VPE_SRC_YSTRIDE1_OFFSET);
msm_io_w(*(++p), vpe_device->vpebase + VPE_SRC_SIZE_OFFSET);
vpe_ctrl->in_h_w = *p;
msm_io_w(*(++p), vpe_device->vpebase + VPE_SRC_XY_OFFSET);
}
void vpe_output_plane_config(uint32_t *p)
{
msm_io_w(*p, vpe_device->vpebase + VPE_OUT_FORMAT_OFFSET);
msm_io_w(*(++p), vpe_device->vpebase + VPE_OUT_PACK_PATTERN1_OFFSET);
msm_io_w(*(++p), vpe_device->vpebase + VPE_OUT_YSTRIDE1_OFFSET);
msm_io_w(*(++p), vpe_device->vpebase + VPE_OUT_SIZE_OFFSET);
msm_io_w(*(++p), vpe_device->vpebase + VPE_OUT_XY_OFFSET);
vpe_ctrl->pcbcr_dis_offset = *(++p);
}
static int vpe_operation_config(uint32_t *p)
{
uint32_t outw, outh, temp;
msm_io_w(*p, vpe_device->vpebase + VPE_OP_MODE_OFFSET);
temp = msm_io_r(vpe_device->vpebase + VPE_OUT_SIZE_OFFSET);
outw = temp & 0xFFF;
outh = (temp & 0xFFF0000) >> 16;
if (*p++ & 0xE00) {
/* rotation enabled. */
vpe_ctrl->out_w = outh;
vpe_ctrl->out_h = outw;
} else {
vpe_ctrl->out_w = outw;
vpe_ctrl->out_h = outh;
}
vpe_ctrl->dis_en = *p;
return 0;
}
/* Later we can separate the rotation and scaler calc. If
* rotation is enabled, simply swap the destination dimension.
* And then pass the already swapped output size to this
* function. */
static int vpe_update_scaler(struct video_crop_t *pcrop)
{
uint32_t out_ROI_width, out_ROI_height;
uint32_t src_ROI_width, src_ROI_height;
uint32_t rc = 0; /* default to no zoom. */
/*
* phase_step_x, phase_step_y, phase_init_x and phase_init_y
* are represented in fixed-point, unsigned 3.29 format
*/
uint32_t phase_step_x = 0;
uint32_t phase_step_y = 0;
uint32_t phase_init_x = 0;
uint32_t phase_init_y = 0;
uint32_t src_roi, src_x, src_y, src_xy, temp;
uint32_t yscale_filter_sel, xscale_filter_sel;
uint32_t scale_unit_sel_x, scale_unit_sel_y;
uint64_t numerator, denominator;
if ((pcrop->in2_w >= pcrop->out2_w) &&
(pcrop->in2_h >= pcrop->out2_h)) {
CDBG(" =======VPE no zoom needed.\n");
temp = msm_io_r(vpe_device->vpebase + VPE_OP_MODE_OFFSET)
& 0xfffffffc;
msm_io_w(temp, vpe_device->vpebase + VPE_OP_MODE_OFFSET);
msm_io_w(0, vpe_device->vpebase + VPE_SRC_XY_OFFSET);
CDBG("vpe_ctrl->in_h_w = %d \n", vpe_ctrl->in_h_w);
msm_io_w(vpe_ctrl->in_h_w , vpe_device->vpebase +
VPE_SRC_SIZE_OFFSET);
return rc;
}
/* If fall through then scaler is needed.*/
CDBG("========VPE zoom needed.\n");
/* assumption is both direction need zoom. this can be
improved. */
temp =
msm_io_r(vpe_device->vpebase + VPE_OP_MODE_OFFSET) | 0x3;
msm_io_w(temp, vpe_device->vpebase + VPE_OP_MODE_OFFSET);
src_ROI_width = pcrop->in2_w;
src_ROI_height = pcrop->in2_h;
out_ROI_width = pcrop->out2_w;
out_ROI_height = pcrop->out2_h;
CDBG("src w = 0x%x, h=0x%x, dst w = 0x%x, h =0x%x.\n",
src_ROI_width, src_ROI_height, out_ROI_width,
out_ROI_height);
src_roi = (src_ROI_height << 16) + src_ROI_width;
msm_io_w(src_roi, vpe_device->vpebase + VPE_SRC_SIZE_OFFSET);
src_x = (out_ROI_width - src_ROI_width)/2;
src_y = (out_ROI_height - src_ROI_height)/2;
CDBG("src_x = %d, src_y=%d.\n", src_x, src_y);
src_xy = src_y*(1<<16) + src_x;
msm_io_w(src_xy, vpe_device->vpebase +
VPE_SRC_XY_OFFSET);
CDBG("src_xy = %d, src_roi=%d.\n", src_xy, src_roi);
/* decide whether to use FIR or M/N for scaling */
if ((out_ROI_width == 1 && src_ROI_width < 4) ||
(src_ROI_width < 4 * out_ROI_width - 3))
scale_unit_sel_x = 0;/* use FIR scalar */
else
scale_unit_sel_x = 1;/* use M/N scalar */
if ((out_ROI_height == 1 && src_ROI_height < 4) ||
(src_ROI_height < 4 * out_ROI_height - 3))
scale_unit_sel_y = 0;/* use FIR scalar */
else
scale_unit_sel_y = 1;/* use M/N scalar */
/* calculate phase step for the x direction */
/* if destination is only 1 pixel wide,
the value of phase_step_x
is unimportant. Assigning phase_step_x to
src ROI width as an arbitrary value. */
if (out_ROI_width == 1)
phase_step_x = (uint32_t) ((src_ROI_width) <<
SCALER_PHASE_BITS);
/* if using FIR scalar */
else if (scale_unit_sel_x == 0) {
/* Calculate the quotient ( src_ROI_width - 1 )
/ ( out_ROI_width - 1)
with u3.29 precision. Quotient is rounded up to
the larger 29th decimal point. */
numerator = (uint64_t)(src_ROI_width - 1) <<
SCALER_PHASE_BITS;
/* never equals to 0 because of the
"(out_ROI_width == 1 )"*/
denominator = (uint64_t)(out_ROI_width - 1);
/* divide and round up to the larger 29th
decimal point. */
phase_step_x = (uint32_t) vpe_do_div((numerator +
denominator - 1), denominator);
} else if (scale_unit_sel_x == 1) { /* if M/N scalar */
/* Calculate the quotient ( src_ROI_width ) /
( out_ROI_width)
with u3.29 precision. Quotient is rounded down to the
smaller 29th decimal point. */
numerator = (uint64_t)(src_ROI_width) <<
SCALER_PHASE_BITS;
denominator = (uint64_t)(out_ROI_width);
phase_step_x =
(uint32_t) vpe_do_div(numerator, denominator);
}
/* calculate phase step for the y direction */
/* if destination is only 1 pixel wide, the value of
phase_step_x is unimportant. Assigning phase_step_x
to src ROI width as an arbitrary value. */
if (out_ROI_height == 1)
phase_step_y =
(uint32_t) ((src_ROI_height) << SCALER_PHASE_BITS);
/* if FIR scalar */
else if (scale_unit_sel_y == 0) {
/* Calculate the quotient ( src_ROI_height - 1 ) /
( out_ROI_height - 1)
with u3.29 precision. Quotient is rounded up to the
larger 29th decimal point. */
numerator = (uint64_t)(src_ROI_height - 1) <<
SCALER_PHASE_BITS;
/* never equals to 0 because of the "
( out_ROI_height == 1 )" case */
denominator = (uint64_t)(out_ROI_height - 1);
/* Quotient is rounded up to the larger
29th decimal point. */
phase_step_y =
(uint32_t) vpe_do_div(
(numerator + denominator - 1), denominator);
} else if (scale_unit_sel_y == 1) { /* if M/N scalar */
/* Calculate the quotient ( src_ROI_height )
/ ( out_ROI_height)
with u3.29 precision. Quotient is rounded down
to the smaller 29th decimal point. */
numerator = (uint64_t)(src_ROI_height) <<
SCALER_PHASE_BITS;
denominator = (uint64_t)(out_ROI_height);
phase_step_y = (uint32_t) vpe_do_div(
numerator, denominator);
}
/* decide which set of FIR coefficients to use */
if (phase_step_x > HAL_MDP_PHASE_STEP_2P50)
xscale_filter_sel = 0;
else if (phase_step_x > HAL_MDP_PHASE_STEP_1P66)
xscale_filter_sel = 1;
else if (phase_step_x > HAL_MDP_PHASE_STEP_1P25)
xscale_filter_sel = 2;
else
xscale_filter_sel = 3;
if (phase_step_y > HAL_MDP_PHASE_STEP_2P50)
yscale_filter_sel = 0;
else if (phase_step_y > HAL_MDP_PHASE_STEP_1P66)
yscale_filter_sel = 1;
else if (phase_step_y > HAL_MDP_PHASE_STEP_1P25)
yscale_filter_sel = 2;
else
yscale_filter_sel = 3;
/* calculate phase init for the x direction */
/* if using FIR scalar */
if (scale_unit_sel_x == 0) {
if (out_ROI_width == 1)
phase_init_x =
(uint32_t) ((src_ROI_width - 1) <<
SCALER_PHASE_BITS);
else
phase_init_x = 0;
} else if (scale_unit_sel_x == 1) /* M over N scalar */
phase_init_x = 0;
/* calculate phase init for the y direction
if using FIR scalar */
if (scale_unit_sel_y == 0) {
if (out_ROI_height == 1)
phase_init_y =
(uint32_t) ((src_ROI_height -
1) << SCALER_PHASE_BITS);
else
phase_init_y = 0;
} else if (scale_unit_sel_y == 1) /* M over N scalar */
phase_init_y = 0;
CDBG("phase step x = %d, step y = %d.\n",
phase_step_x, phase_step_y);
CDBG("phase init x = %d, init y = %d.\n",
phase_init_x, phase_init_y);
msm_io_w(phase_step_x, vpe_device->vpebase +
VPE_SCALE_PHASEX_STEP_OFFSET);
msm_io_w(phase_step_y, vpe_device->vpebase +
VPE_SCALE_PHASEY_STEP_OFFSET);
msm_io_w(phase_init_x, vpe_device->vpebase +
VPE_SCALE_PHASEX_INIT_OFFSET);
msm_io_w(phase_init_y, vpe_device->vpebase +
VPE_SCALE_PHASEY_INIT_OFFSET);
return 1;
}
static int vpe_update_scaler_with_dis(struct video_crop_t *pcrop,
struct dis_offset_type *dis_offset)
{
uint32_t out_ROI_width, out_ROI_height;
uint32_t src_ROI_width, src_ROI_height;
uint32_t rc = 0; /* default to no zoom. */
/*
* phase_step_x, phase_step_y, phase_init_x and phase_init_y
* are represented in fixed-point, unsigned 3.29 format
*/
uint32_t phase_step_x = 0;
uint32_t phase_step_y = 0;
uint32_t phase_init_x = 0;
uint32_t phase_init_y = 0;
uint32_t src_roi, temp;
int32_t src_x, src_y, src_xy;
uint32_t yscale_filter_sel, xscale_filter_sel;
uint32_t scale_unit_sel_x, scale_unit_sel_y;
uint64_t numerator, denominator;
int32_t zoom_dis_x, zoom_dis_y;
CDBG("%s: pcrop->in2_w = %d, pcrop->in2_h = %d\n", __func__,
pcrop->in2_w, pcrop->in2_h);
CDBG("%s: pcrop->out2_w = %d, pcrop->out2_h = %d\n", __func__,
pcrop->out2_w, pcrop->out2_h);
if ((pcrop->in2_w >= pcrop->out2_w) &&
(pcrop->in2_h >= pcrop->out2_h)) {
CDBG(" =======VPE no zoom needed, DIS is still enabled. \n");
temp = msm_io_r(vpe_device->vpebase + VPE_OP_MODE_OFFSET)
& 0xfffffffc;
msm_io_w(temp, vpe_device->vpebase + VPE_OP_MODE_OFFSET);
/* no zoom, use dis offset directly. */
src_xy = dis_offset->dis_offset_y * (1<<16) +
dis_offset->dis_offset_x;
msm_io_w(src_xy, vpe_device->vpebase + VPE_SRC_XY_OFFSET);
CDBG("vpe_ctrl->in_h_w = 0x%x \n", vpe_ctrl->in_h_w);
msm_io_w(vpe_ctrl->in_h_w, vpe_device->vpebase +
VPE_SRC_SIZE_OFFSET);
return rc;
}
/* If fall through then scaler is needed.*/
CDBG("========VPE zoom needed + DIS enabled.\n");
/* assumption is both direction need zoom. this can be
improved. */
temp = msm_io_r(vpe_device->vpebase +
VPE_OP_MODE_OFFSET) | 0x3;
msm_io_w(temp, vpe_device->vpebase +
VPE_OP_MODE_OFFSET);
zoom_dis_x = dis_offset->dis_offset_x *
pcrop->in2_w / pcrop->out2_w;
zoom_dis_y = dis_offset->dis_offset_y *
pcrop->in2_h / pcrop->out2_h;
src_x = zoom_dis_x + (pcrop->out2_w-pcrop->in2_w)/2;
src_y = zoom_dis_y + (pcrop->out2_h-pcrop->in2_h)/2;
out_ROI_width = vpe_ctrl->out_w;
out_ROI_height = vpe_ctrl->out_h;
src_ROI_width = out_ROI_width * pcrop->in2_w / pcrop->out2_w;
src_ROI_height = out_ROI_height * pcrop->in2_h / pcrop->out2_h;
/* clamp to output size. This is because along
processing, we mostly do truncation, therefore
dis_offset tends to be
smaller values. The intention was to make sure that the
offset does not exceed margin. But in the case it could
result src_roi bigger, due to subtract a smaller value. */
CDBG("src w = 0x%x, h=0x%x, dst w = 0x%x, h =0x%x.\n",
src_ROI_width, src_ROI_height, out_ROI_width,
out_ROI_height);
src_roi = (src_ROI_height << 16) + src_ROI_width;
msm_io_w(src_roi, vpe_device->vpebase + VPE_SRC_SIZE_OFFSET);
CDBG("src_x = %d, src_y=%d.\n", src_x, src_y);
src_xy = src_y*(1<<16) + src_x;
msm_io_w(src_xy, vpe_device->vpebase +
VPE_SRC_XY_OFFSET);
CDBG("src_xy = 0x%x, src_roi=0x%x.\n", src_xy, src_roi);
/* decide whether to use FIR or M/N for scaling */
if ((out_ROI_width == 1 && src_ROI_width < 4) ||
(src_ROI_width < 4 * out_ROI_width - 3))
scale_unit_sel_x = 0;/* use FIR scalar */
else
scale_unit_sel_x = 1;/* use M/N scalar */
if ((out_ROI_height == 1 && src_ROI_height < 4) ||
(src_ROI_height < 4 * out_ROI_height - 3))
scale_unit_sel_y = 0;/* use FIR scalar */
else
scale_unit_sel_y = 1;/* use M/N scalar */
/* calculate phase step for the x direction */
/* if destination is only 1 pixel wide, the value of
phase_step_x is unimportant. Assigning phase_step_x
to src ROI width as an arbitrary value. */
if (out_ROI_width == 1)
phase_step_x = (uint32_t) ((src_ROI_width) <<
SCALER_PHASE_BITS);
else if (scale_unit_sel_x == 0) { /* if using FIR scalar */
/* Calculate the quotient ( src_ROI_width - 1 )
/ ( out_ROI_width - 1)with u3.29 precision.
Quotient is rounded up to the larger
29th decimal point. */
numerator =
(uint64_t)(src_ROI_width - 1) <<
SCALER_PHASE_BITS;
/* never equals to 0 because of the "
(out_ROI_width == 1 )"*/
denominator = (uint64_t)(out_ROI_width - 1);
/* divide and round up to the larger 29th
decimal point. */
phase_step_x = (uint32_t) vpe_do_div(
(numerator + denominator - 1), denominator);
} else if (scale_unit_sel_x == 1) { /* if M/N scalar */
/* Calculate the quotient
( src_ROI_width ) / ( out_ROI_width)
with u3.29 precision. Quotient is rounded
down to the smaller 29th decimal point. */
numerator = (uint64_t)(src_ROI_width) <<
SCALER_PHASE_BITS;
denominator = (uint64_t)(out_ROI_width);
phase_step_x =
(uint32_t) vpe_do_div(numerator, denominator);
}
/* calculate phase step for the y direction */
/* if destination is only 1 pixel wide, the value of
phase_step_x is unimportant. Assigning phase_step_x
to src ROI width as an arbitrary value. */
if (out_ROI_height == 1)
phase_step_y =
(uint32_t) ((src_ROI_height) << SCALER_PHASE_BITS);
else if (scale_unit_sel_y == 0) { /* if FIR scalar */
/* Calculate the quotient
( src_ROI_height - 1 ) / ( out_ROI_height - 1)
with u3.29 precision. Quotient is rounded up to the
larger 29th decimal point. */
numerator = (uint64_t)(src_ROI_height - 1) <<
SCALER_PHASE_BITS;
/* never equals to 0 because of the
"( out_ROI_height == 1 )" case */
denominator = (uint64_t)(out_ROI_height - 1);
/* Quotient is rounded up to the larger 29th
decimal point. */
phase_step_y =
(uint32_t) vpe_do_div(
(numerator + denominator - 1), denominator);
} else if (scale_unit_sel_y == 1) { /* if M/N scalar */
/* Calculate the quotient ( src_ROI_height ) / ( out_ROI_height)
with u3.29 precision. Quotient is rounded down to the smaller
29th decimal point. */
numerator = (uint64_t)(src_ROI_height) <<
SCALER_PHASE_BITS;
denominator = (uint64_t)(out_ROI_height);
phase_step_y = (uint32_t) vpe_do_div(
numerator, denominator);
}
/* decide which set of FIR coefficients to use */
if (phase_step_x > HAL_MDP_PHASE_STEP_2P50)
xscale_filter_sel = 0;
else if (phase_step_x > HAL_MDP_PHASE_STEP_1P66)
xscale_filter_sel = 1;
else if (phase_step_x > HAL_MDP_PHASE_STEP_1P25)
xscale_filter_sel = 2;
else
xscale_filter_sel = 3;
if (phase_step_y > HAL_MDP_PHASE_STEP_2P50)
yscale_filter_sel = 0;
else if (phase_step_y > HAL_MDP_PHASE_STEP_1P66)
yscale_filter_sel = 1;
else if (phase_step_y > HAL_MDP_PHASE_STEP_1P25)
yscale_filter_sel = 2;
else
yscale_filter_sel = 3;
/* calculate phase init for the x direction */
/* if using FIR scalar */
if (scale_unit_sel_x == 0) {
if (out_ROI_width == 1)
phase_init_x =
(uint32_t) ((src_ROI_width - 1) <<
SCALER_PHASE_BITS);
else
phase_init_x = 0;
} else if (scale_unit_sel_x == 1) /* M over N scalar */
phase_init_x = 0;
/* calculate phase init for the y direction
if using FIR scalar */
if (scale_unit_sel_y == 0) {
if (out_ROI_height == 1)
phase_init_y =
(uint32_t) ((src_ROI_height -
1) << SCALER_PHASE_BITS);
else
phase_init_y = 0;
} else if (scale_unit_sel_y == 1) /* M over N scalar */
phase_init_y = 0;
CDBG("phase step x = %d, step y = %d.\n",
phase_step_x, phase_step_y);
CDBG("phase init x = %d, init y = %d.\n",
phase_init_x, phase_init_y);
msm_io_w(phase_step_x, vpe_device->vpebase +
VPE_SCALE_PHASEX_STEP_OFFSET);
msm_io_w(phase_step_y, vpe_device->vpebase +
VPE_SCALE_PHASEY_STEP_OFFSET);
msm_io_w(phase_init_x, vpe_device->vpebase +
VPE_SCALE_PHASEX_INIT_OFFSET);
msm_io_w(phase_init_y, vpe_device->vpebase +
VPE_SCALE_PHASEY_INIT_OFFSET);
return 1;
}
void msm_send_frame_to_vpe(uint32_t p0_phy_add, uint32_t p1_phy_add,
struct timespec *ts, int output_type)
{
uint32_t temp_pyaddr = 0, temp_pcbcraddr = 0;
CDBG("vpe input, p0_phy_add = 0x%x, p1_phy_add = 0x%x\n",
p0_phy_add, p1_phy_add);
msm_io_w(p0_phy_add, vpe_device->vpebase + VPE_SRCP0_ADDR_OFFSET);
msm_io_w(p1_phy_add, vpe_device->vpebase + VPE_SRCP1_ADDR_OFFSET);
if (vpe_ctrl->state == VPE_STATE_ACTIVE)
CDBG(" =====VPE is busy!!! Wrong!========\n");
if (output_type != OUTPUT_TYPE_ST_R)
vpe_ctrl->ts = *ts;
if (output_type == OUTPUT_TYPE_ST_L) {
vpe_ctrl->pcbcr_before_dis = msm_io_r(vpe_device->vpebase +
VPE_OUTP1_ADDR_OFFSET);
temp_pyaddr = msm_io_r(vpe_device->vpebase +
VPE_OUTP0_ADDR_OFFSET);
temp_pcbcraddr = temp_pyaddr + PAD_TO_2K(vpe_ctrl->out_w *
vpe_ctrl->out_h * 2, vpe_ctrl->pad_2k_bool);
msm_io_w(temp_pcbcraddr, vpe_device->vpebase +
VPE_OUTP1_ADDR_OFFSET);
}
if (vpe_ctrl->dis_en) {
/* Changing the VPE output CBCR address,
to make Y/CBCR continuous */
vpe_ctrl->pcbcr_before_dis = msm_io_r(vpe_device->vpebase +
VPE_OUTP1_ADDR_OFFSET);
temp_pyaddr = msm_io_r(vpe_device->vpebase +
VPE_OUTP0_ADDR_OFFSET);
temp_pcbcraddr = temp_pyaddr + vpe_ctrl->pcbcr_dis_offset;
msm_io_w(temp_pcbcraddr, vpe_device->vpebase +
VPE_OUTP1_ADDR_OFFSET);
}
vpe_ctrl->output_type = output_type;
vpe_ctrl->state = VPE_STATE_ACTIVE;
vpe_start();
}
static int vpe_proc_general(struct msm_vpe_cmd *cmd)
{
int rc = 0;
uint32_t *cmdp = NULL;
struct msm_queue_cmd *qcmd = NULL;
struct msm_vpe_buf_info *vpe_buf;
int turbo_mode = 0;
struct msm_sync *sync = (struct msm_sync *)vpe_ctrl->syncdata;
CDBG("vpe_proc_general: cmdID = %s, length = %d\n",
vpe_general_cmd[cmd->id], cmd->length);
switch (cmd->id) {
case VPE_ENABLE:
cmdp = kmalloc(cmd->length, GFP_ATOMIC);
if (!cmdp) {
rc = -ENOMEM;
goto vpe_proc_general_done;
}
if (copy_from_user(cmdp,
(void __user *)(cmd->value),
cmd->length)) {
rc = -EFAULT;
goto vpe_proc_general_done;
}
turbo_mode = *((int *)(cmd->value));
rc = turbo_mode ? vpe_enable(VPE_TURBO_MODE_CLOCK_RATE)
: vpe_enable(VPE_NORMAL_MODE_CLOCK_RATE);
break;
case VPE_DISABLE:
rc = vpe_disable();
break;
case VPE_RESET:
case VPE_ABORT:
rc = vpe_reset();
break;
case VPE_START:
rc = vpe_start();
break;
case VPE_INPUT_PLANE_CFG:
cmdp = kmalloc(cmd->length, GFP_ATOMIC);
if (!cmdp) {
rc = -ENOMEM;
goto vpe_proc_general_done;
}
if (copy_from_user(cmdp,
(void __user *)(cmd->value),
cmd->length)) {
rc = -EFAULT;
goto vpe_proc_general_done;
}
vpe_input_plane_config(cmdp);
break;
case VPE_OPERATION_MODE_CFG:
CDBG("cmd->length = %d \n", cmd->length);
if (cmd->length != VPE_OPERATION_MODE_CFG_LEN) {
rc = -EINVAL;
goto vpe_proc_general_done;
}
cmdp = kmalloc(VPE_OPERATION_MODE_CFG_LEN,
GFP_ATOMIC);
if (copy_from_user(cmdp,
(void __user *)(cmd->value),
VPE_OPERATION_MODE_CFG_LEN)) {
rc = -EFAULT;
goto vpe_proc_general_done;
}
rc = vpe_operation_config(cmdp);
CDBG("rc = %d \n", rc);
break;
case VPE_OUTPUT_PLANE_CFG:
cmdp = kmalloc(cmd->length, GFP_ATOMIC);
if (!cmdp) {
rc = -ENOMEM;
goto vpe_proc_general_done;
}
if (copy_from_user(cmdp,
(void __user *)(cmd->value),
cmd->length)) {
rc = -EFAULT;
goto vpe_proc_general_done;
}
vpe_output_plane_config(cmdp);
break;
case VPE_SCALE_CFG_TYPE:
cmdp = kmalloc(cmd->length, GFP_ATOMIC);
if (!cmdp) {
rc = -ENOMEM;
goto vpe_proc_general_done;
}
if (copy_from_user(cmdp,
(void __user *)(cmd->value),
cmd->length)) {
rc = -EFAULT;
goto vpe_proc_general_done;
}
vpe_update_scale_coef(cmdp);
break;
case VPE_CMD_DIS_OFFSET_CFG: {
struct msm_vfe_resp *vdata;
/* first get the dis offset and frame id. */
cmdp = kmalloc(cmd->length, GFP_ATOMIC);
if (!cmdp) {
rc = -ENOMEM;
goto vpe_proc_general_done;
}
if (copy_from_user(cmdp,
(void __user *)(cmd->value),
cmd->length)) {
rc = -EFAULT;
goto vpe_proc_general_done;
}
/* get the offset. */
vpe_ctrl->dis_offset = *(struct dis_offset_type *)cmdp;
qcmd = msm_dequeue_vpe(&sync->vpe_q, list_vpe_frame);
if (!qcmd) {
pr_err("%s: no video frame.\n", __func__);
kfree(cmdp);
return -EAGAIN;
}
vdata = (struct msm_vfe_resp *)(qcmd->command);
vpe_buf = &vdata->vpe_bf;
vpe_update_scaler_with_dis(&(vpe_buf->vpe_crop),
&(vpe_ctrl->dis_offset));
msm_send_frame_to_vpe(vpe_buf->p0_phy, vpe_buf->p1_phy,
&(vpe_buf->ts), OUTPUT_TYPE_V);
if (!qcmd || !atomic_read(&qcmd->on_heap)) {
kfree(cmdp);
return -EAGAIN;
}
if (!atomic_sub_return(1, &qcmd->on_heap))
kfree(qcmd);
break;
}
default:
break;
}
vpe_proc_general_done:
kfree(cmdp);
return rc;
}
static void vpe_addr_convert(struct msm_vpe_phy_info *pinfo,
enum vpe_resp_msg type, void *data, void **ext, int32_t *elen)
{
CDBG("In vpe_addr_convert type = %d\n", type);
switch (type) {
case VPE_MSG_OUTPUT_V:
pinfo->output_id = OUTPUT_TYPE_V;
break;
case VPE_MSG_OUTPUT_ST_R:
/* output_id will be used by user space only. */
pinfo->output_id = OUTPUT_TYPE_V;
break;
default:
break;
} /* switch */
CDBG("In vpe_addr_convert output_id = %d\n", pinfo->output_id);
pinfo->p0_phy =
((struct vpe_message *)data)->_u.msgOut.p0_Buffer;
pinfo->p1_phy =
((struct vpe_message *)data)->_u.msgOut.p1_Buffer;
*ext = vpe_ctrl->extdata;
*elen = vpe_ctrl->extlen;
}
void vpe_proc_ops(uint8_t id, void *msg, size_t len)
{
struct msm_vpe_resp *rp;
rp = vpe_ctrl->resp->vpe_alloc(sizeof(struct msm_vpe_resp),
vpe_ctrl->syncdata, GFP_ATOMIC);
if (!rp) {
CDBG("rp: cannot allocate buffer\n");
return;
}
CDBG("vpe_proc_ops, msgId = %d rp->evt_msg.msg_id = %d\n",
id, rp->evt_msg.msg_id);
rp->evt_msg.type = MSM_CAMERA_MSG;
rp->evt_msg.msg_id = id;
rp->evt_msg.len = len;
rp->evt_msg.data = msg;
switch (rp->evt_msg.msg_id) {
case MSG_ID_VPE_OUTPUT_V:
rp->type = VPE_MSG_OUTPUT_V;
vpe_addr_convert(&(rp->phy), VPE_MSG_OUTPUT_V,
rp->evt_msg.data, &(rp->extdata),
&(rp->extlen));
break;
case MSG_ID_VPE_OUTPUT_ST_R:
rp->type = VPE_MSG_OUTPUT_ST_R;
vpe_addr_convert(&(rp->phy), VPE_MSG_OUTPUT_ST_R,
rp->evt_msg.data, &(rp->extdata),
&(rp->extlen));
break;
case MSG_ID_VPE_OUTPUT_ST_L:
rp->type = VPE_MSG_OUTPUT_ST_L;
break;
default:
rp->type = VPE_MSG_GENERAL;
break;
}
CDBG("%s: time = %ld\n",
__func__, vpe_ctrl->ts.tv_nsec);
vpe_ctrl->resp->vpe_resp(rp, MSM_CAM_Q_VPE_MSG,
vpe_ctrl->syncdata,
&(vpe_ctrl->ts), GFP_ATOMIC);
}
int vpe_config_axi(struct axidata *ad)
{
uint32_t p1;
struct msm_pmem_region *regp1 = NULL;
CDBG("vpe_config_axi:bufnum1 = %d.\n", ad->bufnum1);
if (ad->bufnum1 != 1)
return -EINVAL;
regp1 = &(ad->region[0]);
/* for video Y address */
p1 = (regp1->paddr + regp1->info.planar0_off);
msm_io_w(p1, vpe_device->vpebase + VPE_OUTP0_ADDR_OFFSET);
/* for video CbCr address */
p1 = (regp1->paddr + regp1->info.planar1_off);
msm_io_w(p1, vpe_device->vpebase + VPE_OUTP1_ADDR_OFFSET);
return 0;
}
int msm_vpe_config(struct msm_vpe_cfg_cmd *cmd, void *data)
{
struct msm_vpe_cmd vpecmd;
int rc = 0;
if (copy_from_user(&vpecmd,
(void __user *)(cmd->value),
sizeof(vpecmd))) {
pr_err("%s %d: copy_from_user failed\n", __func__,
__LINE__);
return -EFAULT;
}
CDBG("%s: cmd_type %d\n", __func__, cmd->cmd_type);
switch (cmd->cmd_type) {
case CMD_VPE:
rc = vpe_proc_general(&vpecmd);
CDBG(" rc = %d\n", rc);
break;
case CMD_AXI_CFG_VPE:
case CMD_AXI_CFG_SNAP_VPE:
case CMD_AXI_CFG_SNAP_THUMB_VPE: {
struct axidata *axid;
axid = data;
if (!axid)
return -EFAULT;
vpe_config_axi(axid);
break;
}
default:
break;
}
CDBG("%s: rc = %d\n", __func__, rc);
return rc;
}
void msm_vpe_offset_update(int frame_pack, uint32_t pyaddr, uint32_t pcbcraddr,
struct timespec *ts, int output_id, struct msm_st_half st_half,
int frameid)
{
struct msm_vpe_buf_info vpe_buf;
uint32_t input_stride;
vpe_buf.vpe_crop.in2_w = st_half.stCropInfo.in_w;
vpe_buf.vpe_crop.in2_h = st_half.stCropInfo.in_h;
vpe_buf.vpe_crop.out2_w = st_half.stCropInfo.out_w;
vpe_buf.vpe_crop.out2_h = st_half.stCropInfo.out_h;
vpe_ctrl->dis_offset.dis_offset_x = st_half.pix_x_off;
vpe_ctrl->dis_offset.dis_offset_y = st_half.pix_y_off;
vpe_ctrl->dis_offset.frame_id = frameid;
vpe_ctrl->frame_pack = frame_pack;
vpe_ctrl->output_type = output_id;
input_stride = (st_half.buf_p1_stride * (1<<16)) +
st_half.buf_p0_stride;
msm_io_w(input_stride, vpe_device->vpebase + VPE_SRC_YSTRIDE1_OFFSET);
vpe_update_scaler_with_dis(&(vpe_buf.vpe_crop),
&(vpe_ctrl->dis_offset));
msm_send_frame_to_vpe(pyaddr, pcbcraddr, ts, output_id);
}
static void vpe_send_outmsg(uint8_t msgid, uint32_t p0_addr,
uint32_t p1_addr, uint32_t p2_addr)
{
struct vpe_message msg;
uint8_t outid;
msg._d = outid = msgid;
msg._u.msgOut.output_id = msgid;
msg._u.msgOut.p0_Buffer = p0_addr;
msg._u.msgOut.p1_Buffer = p1_addr;
msg._u.msgOut.p2_Buffer = p2_addr;
vpe_proc_ops(outid, &msg, sizeof(struct vpe_message));
return;
}
int msm_vpe_reg(struct msm_vpe_callback *presp)
{
if (presp && presp->vpe_resp)
vpe_ctrl->resp = presp;
return 0;
}
static void vpe_send_msg_no_payload(enum VPE_MESSAGE_ID id)
{
struct vpe_message msg;
CDBG("vfe31_send_msg_no_payload\n");
msg._d = id;
vpe_proc_ops(id, &msg, 0);
}
static void vpe_do_tasklet(unsigned long data)
{
unsigned long flags;
uint32_t pyaddr = 0, pcbcraddr = 0;
uint32_t src_y, src_cbcr, temp;
struct vpe_isr_queue_cmd_type *qcmd = NULL;
CDBG("=== vpe_do_tasklet start === \n");
spin_lock_irqsave(&vpe_ctrl->tasklet_lock, flags);
qcmd = list_first_entry(&vpe_ctrl->tasklet_q,
struct vpe_isr_queue_cmd_type, list);
if (!qcmd) {
spin_unlock_irqrestore(&vpe_ctrl->tasklet_lock, flags);
return;
}
list_del(&qcmd->list);
spin_unlock_irqrestore(&vpe_ctrl->tasklet_lock, flags);
/* interrupt to be processed, *qcmd has the payload. */
if (qcmd->irq_status & 0x1) {
if (vpe_ctrl->output_type == OUTPUT_TYPE_ST_L) {
CDBG("vpe left frame done.\n");
vpe_ctrl->output_type = 0;
CDBG("vpe send out msg.\n");
orig_src_y = msm_io_r(vpe_device->vpebase +
VPE_SRCP0_ADDR_OFFSET);
orig_src_cbcr = msm_io_r(vpe_device->vpebase +
VPE_SRCP1_ADDR_OFFSET);
pyaddr = msm_io_r(vpe_device->vpebase +
VPE_OUTP0_ADDR_OFFSET);
pcbcraddr = msm_io_r(vpe_device->vpebase +
VPE_OUTP1_ADDR_OFFSET);
CDBG("%s: out_w = %d, out_h = %d\n", __func__,
vpe_ctrl->out_w, vpe_ctrl->out_h);
if ((vpe_ctrl->frame_pack == TOP_DOWN_FULL) ||
(vpe_ctrl->frame_pack == TOP_DOWN_HALF)) {
msm_io_w(pyaddr + (vpe_ctrl->out_w *
vpe_ctrl->out_h), vpe_device->vpebase +
VPE_OUTP0_ADDR_OFFSET);
msm_io_w(pcbcraddr + (vpe_ctrl->out_w *
vpe_ctrl->out_h/2),
vpe_device->vpebase +
VPE_OUTP1_ADDR_OFFSET);
} else if ((vpe_ctrl->frame_pack ==
SIDE_BY_SIDE_HALF) || (vpe_ctrl->frame_pack ==
SIDE_BY_SIDE_FULL)) {
msm_io_w(pyaddr + vpe_ctrl->out_w,
vpe_device->vpebase +
VPE_OUTP0_ADDR_OFFSET);
msm_io_w(pcbcraddr + vpe_ctrl->out_w,
vpe_device->vpebase +
VPE_OUTP1_ADDR_OFFSET);
} else
CDBG("%s: Invalid packing = %d\n", __func__,
vpe_ctrl->frame_pack);
vpe_send_msg_no_payload(MSG_ID_VPE_OUTPUT_ST_L);
vpe_ctrl->state = VPE_STATE_INIT;
kfree(qcmd);
return;
} else if (vpe_ctrl->output_type == OUTPUT_TYPE_ST_R) {
src_y = orig_src_y;
src_cbcr = orig_src_cbcr;
CDBG("%s: out_w = %d, out_h = %d\n", __func__,
vpe_ctrl->out_w, vpe_ctrl->out_h);
if ((vpe_ctrl->frame_pack == TOP_DOWN_FULL) ||
(vpe_ctrl->frame_pack == TOP_DOWN_HALF)) {
pyaddr = msm_io_r(vpe_device->vpebase +
VPE_OUTP0_ADDR_OFFSET) -
(vpe_ctrl->out_w * vpe_ctrl->out_h);
} else if ((vpe_ctrl->frame_pack ==
SIDE_BY_SIDE_HALF) || (vpe_ctrl->frame_pack ==
SIDE_BY_SIDE_FULL)) {
pyaddr = msm_io_r(vpe_device->vpebase +
VPE_OUTP0_ADDR_OFFSET) - vpe_ctrl->out_w;
} else
CDBG("%s: Invalid packing = %d\n", __func__,
vpe_ctrl->frame_pack);
pcbcraddr = vpe_ctrl->pcbcr_before_dis;
} else {
src_y = msm_io_r(vpe_device->vpebase +
VPE_SRCP0_ADDR_OFFSET);
src_cbcr = msm_io_r(vpe_device->vpebase +
VPE_SRCP1_ADDR_OFFSET);
pyaddr = msm_io_r(vpe_device->vpebase +
VPE_OUTP0_ADDR_OFFSET);
pcbcraddr = msm_io_r(vpe_device->vpebase +
VPE_OUTP1_ADDR_OFFSET);
}
if (vpe_ctrl->dis_en)
pcbcraddr = vpe_ctrl->pcbcr_before_dis;
msm_io_w(src_y,
vpe_device->vpebase + VPE_OUTP0_ADDR_OFFSET);
msm_io_w(src_cbcr,
vpe_device->vpebase + VPE_OUTP1_ADDR_OFFSET);
temp = msm_io_r(vpe_device->vpebase + VPE_OP_MODE_OFFSET) &
0xFFFFFFFC;
msm_io_w(temp, vpe_device->vpebase + VPE_OP_MODE_OFFSET);
/* now pass this frame to msm_camera.c. */
if (vpe_ctrl->output_type == OUTPUT_TYPE_ST_R) {
CDBG("vpe send out R msg.\n");
vpe_send_outmsg(MSG_ID_VPE_OUTPUT_ST_R, pyaddr,
pcbcraddr, pyaddr);
} else if (vpe_ctrl->output_type == OUTPUT_TYPE_V) {
CDBG("vpe send out V msg.\n");
vpe_send_outmsg(MSG_ID_VPE_OUTPUT_V, pyaddr,
pcbcraddr, pyaddr);
}
vpe_ctrl->output_type = 0;
vpe_ctrl->state = VPE_STATE_INIT; /* put it back to idle. */
}
kfree(qcmd);
}
DECLARE_TASKLET(vpe_tasklet, vpe_do_tasklet, 0);
static irqreturn_t vpe_parse_irq(int irq_num, void *data)
{
unsigned long flags;
uint32_t irq_status = 0;
struct vpe_isr_queue_cmd_type *qcmd;
CDBG("vpe_parse_irq.\n");
/* read and clear back-to-back. */
irq_status = msm_io_r_mb(vpe_device->vpebase +
VPE_INTR_STATUS_OFFSET);
msm_io_w_mb(irq_status, vpe_device->vpebase +
VPE_INTR_CLEAR_OFFSET);
msm_io_w(0, vpe_device->vpebase + VPE_INTR_ENABLE_OFFSET);
if (irq_status == 0) {
pr_err("%s: irq_status = 0,Something is wrong!\n", __func__);
return IRQ_HANDLED;
}
irq_status &= 0x1;
/* apply mask. only interested in bit 0. */
if (irq_status) {
qcmd = kzalloc(sizeof(struct vpe_isr_queue_cmd_type),
GFP_ATOMIC);
if (!qcmd) {
pr_err("%s: qcmd malloc failed!\n", __func__);
return IRQ_HANDLED;
}
/* must be 0x1 now. so in bottom half we don't really
need to check. */
qcmd->irq_status = irq_status & 0x1;
spin_lock_irqsave(&vpe_ctrl->tasklet_lock, flags);
list_add_tail(&qcmd->list, &vpe_ctrl->tasklet_q);
spin_unlock_irqrestore(&vpe_ctrl->tasklet_lock, flags);
tasklet_schedule(&vpe_tasklet);
}
return IRQ_HANDLED;
}
static int vpe_enable_irq(void)
{
uint32_t rc = 0;
rc = request_irq(vpe_device->vpeirq,
vpe_parse_irq,
IRQF_TRIGGER_HIGH, "vpe", 0);
return rc;
}
int msm_vpe_open(void)
{
int rc = 0;
CDBG("%s: In \n", __func__);
vpe_ctrl = kzalloc(sizeof(struct vpe_ctrl_type), GFP_KERNEL);
if (!vpe_ctrl) {
pr_err("%s: no memory!\n", __func__);
return -ENOMEM;
}
spin_lock_init(&vpe_ctrl->ops_lock);
CDBG("%s: Out\n", __func__);
return rc;
}
int msm_vpe_release(void)
{
/* clean up....*/
int rc = 0;
CDBG("%s: state %d\n", __func__, vpe_ctrl->state);
if (vpe_ctrl->state != VPE_STATE_IDLE)
rc = vpe_disable();
kfree(vpe_ctrl);
return rc;
}
int vpe_enable(uint32_t clk_rate)
{
int rc = 0;
unsigned long flags = 0;
/* don't change the order of clock and irq.*/
CDBG("%s: enable_clock rate %u\n", __func__, clk_rate);
spin_lock_irqsave(&vpe_ctrl->ops_lock, flags);
if (vpe_ctrl->state != VPE_STATE_IDLE) {
CDBG("%s: VPE already enabled", __func__);
spin_unlock_irqrestore(&vpe_ctrl->ops_lock, flags);
return 0;
}
vpe_ctrl->state = VPE_STATE_INIT;
spin_unlock_irqrestore(&vpe_ctrl->ops_lock, flags);
rc = msm_camio_vpe_clk_enable(clk_rate);
if (rc < 0) {
pr_err("%s: msm_camio_vpe_clk_enable failed", __func__);
vpe_ctrl->state = VPE_STATE_IDLE;
return rc;
}
CDBG("%s: enable_irq\n", __func__);
vpe_enable_irq();
/* initialize the data structure - lock, queue etc. */
spin_lock_init(&vpe_ctrl->tasklet_lock);
INIT_LIST_HEAD(&vpe_ctrl->tasklet_q);
return rc;
}
int vpe_disable(void)
{
int rc = 0;
unsigned long flags = 0;
CDBG("%s: called", __func__);
spin_lock_irqsave(&vpe_ctrl->ops_lock, flags);
if (vpe_ctrl->state == VPE_STATE_IDLE) {
CDBG("%s: VPE already disabled", __func__);
spin_unlock_irqrestore(&vpe_ctrl->ops_lock, flags);
return 0;
}
vpe_ctrl->state = VPE_STATE_IDLE;
spin_unlock_irqrestore(&vpe_ctrl->ops_lock, flags);
vpe_ctrl->out_y_addr = msm_io_r(vpe_device->vpebase +
VPE_OUTP0_ADDR_OFFSET);
vpe_ctrl->out_cbcr_addr = msm_io_r(vpe_device->vpebase +
VPE_OUTP1_ADDR_OFFSET);
free_irq(vpe_device->vpeirq, 0);
tasklet_kill(&vpe_tasklet);
rc = msm_camio_vpe_clk_disable();
return rc;
}
static int __msm_vpe_probe(struct platform_device *pdev)
{
int rc = 0;
struct resource *vpemem, *vpeirq, *vpeio;
void __iomem *vpebase;
/* first allocate */
vpe_device = &vpe_device_data;
memset(vpe_device, 0, sizeof(struct vpe_device_type));
/* does the device exist? */
vpeirq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!vpeirq) {
pr_err("%s: no vpe irq resource.\n", __func__);
rc = -ENODEV;
goto vpe_free_device;
}
vpemem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!vpemem) {
pr_err("%s: no vpe mem resource!\n", __func__);
rc = -ENODEV;
goto vpe_free_device;
}
vpeio = request_mem_region(vpemem->start,
resource_size(vpemem), pdev->name);
if (!vpeio) {
pr_err("%s: VPE region already claimed.\n", __func__);
rc = -EBUSY;
goto vpe_free_device;
}
vpebase =
ioremap(vpemem->start,
(vpemem->end - vpemem->start) + 1);
if (!vpebase) {
pr_err("%s: vpe ioremap failed.\n", __func__);
rc = -ENOMEM;
goto vpe_release_mem_region;
}
/* Fall through, _probe is successful. */
vpe_device->vpeirq = vpeirq->start;
vpe_device->vpemem = vpemem;
vpe_device->vpeio = vpeio;
vpe_device->vpebase = vpebase;
return rc; /* this rc should be zero.*/
iounmap(vpe_device->vpebase); /* this path should never occur */
vpe_device->vpebase = NULL;
/* from this part it is error handling. */
vpe_release_mem_region:
release_mem_region(vpemem->start, (vpemem->end - vpemem->start) + 1);
vpe_free_device:
return rc; /* this rc should have error code. */
}
static int __msm_vpe_remove(struct platform_device *pdev)
{
struct resource *vpemem;
vpemem = vpe_device->vpemem;
iounmap(vpe_device->vpebase);
vpe_device->vpebase = NULL;
release_mem_region(vpemem->start,
(vpemem->end - vpemem->start) + 1);
return 0;
}
static struct platform_driver msm_vpe_driver = {
.probe = __msm_vpe_probe,
.remove = __msm_vpe_remove,
.driver = {
.name = "msm_vpe",
.owner = THIS_MODULE,
},
};
static int __init msm_vpe_init(void)
{
return platform_driver_register(&msm_vpe_driver);
}
module_init(msm_vpe_init);
static void __exit msm_vpe_exit(void)
{
platform_driver_unregister(&msm_vpe_driver);
}
module_exit(msm_vpe_exit);
MODULE_DESCRIPTION("msm vpe 1.0 driver");
MODULE_VERSION("msm vpe driver 1.0");
MODULE_LICENSE("GPL v2");
| gpl-2.0 |
zheharry/linux-sh4-2.6.23.17_stm23_A18B | arch/ppc/platforms/85xx/sbc85xx.c | 85 | 4593 | /*
* WindRiver PowerQUICC III SBC85xx board common routines
*
* Copyright 2002, 2003 Motorola Inc.
* Copyright 2004 Red Hat, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/reboot.h>
#include <linux/pci.h>
#include <linux/kdev_t.h>
#include <linux/major.h>
#include <linux/console.h>
#include <linux/delay.h>
#include <linux/seq_file.h>
#include <linux/serial.h>
#include <linux/module.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/atomic.h>
#include <asm/time.h>
#include <asm/io.h>
#include <asm/machdep.h>
#include <asm/open_pic.h>
#include <asm/bootinfo.h>
#include <asm/pci-bridge.h>
#include <asm/mpc85xx.h>
#include <asm/irq.h>
#include <asm/immap_85xx.h>
#include <asm/ppc_sys.h>
#include <mm/mmu_decl.h>
#include <platforms/85xx/sbc85xx.h>
unsigned char __res[sizeof (bd_t)];
#ifndef CONFIG_PCI
unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;
unsigned long pci_dram_offset = 0;
#endif
extern unsigned long total_memory; /* in mm/init */
/* Internal interrupts are all Level Sensitive, and Positive Polarity */
static u_char sbc8560_openpic_initsenses[] __initdata = {
MPC85XX_INTERNAL_IRQ_SENSES,
0x0, /* External 0: */
0x0, /* External 1: */
#if defined(CONFIG_PCI)
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 2: PCI slot 0 */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 3: PCI slot 1 */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 4: PCI slot 2 */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 5: PCI slot 3 */
#else
0x0, /* External 2: */
0x0, /* External 3: */
0x0, /* External 4: */
0x0, /* External 5: */
#endif
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 6: PHY */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 7: PHY */
0x0, /* External 8: */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* External 9: PHY */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* External 10: PHY */
0x0, /* External 11: */
};
/* ************************************************************************ */
int
sbc8560_show_cpuinfo(struct seq_file *m)
{
uint pvid, svid, phid1;
uint memsize = total_memory;
bd_t *binfo = (bd_t *) __res;
unsigned int freq;
/* get the core frequency */
freq = binfo->bi_intfreq;
pvid = mfspr(SPRN_PVR);
svid = mfspr(SPRN_SVR);
seq_printf(m, "Vendor\t\t: Wind River\n");
seq_printf(m, "Machine\t\t: SBC%s\n", cur_ppc_sys_spec->ppc_sys_name);
seq_printf(m, "clock\t\t: %dMHz\n", freq / 1000000);
seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
seq_printf(m, "SVR\t\t: 0x%x\n", svid);
/* Display cpu Pll setting */
phid1 = mfspr(SPRN_HID1);
seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
/* Display the amount of memory */
seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
return 0;
}
void __init
sbc8560_init_IRQ(void)
{
bd_t *binfo = (bd_t *) __res;
/* Determine the Physical Address of the OpenPIC regs */
phys_addr_t OpenPIC_PAddr =
binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
OpenPIC_Addr = ioremap(OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE);
OpenPIC_InitSenses = sbc8560_openpic_initsenses;
OpenPIC_NumInitSenses = sizeof (sbc8560_openpic_initsenses);
/* Skip reserved space and internal sources */
openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200);
/* Map PIC IRQs 0-11 */
openpic_set_sources(48, 12, OpenPIC_Addr + 0x10000);
/* we let openpic interrupts starting from an offset, to
* leave space for cascading interrupts underneath.
*/
openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
return;
}
/*
* interrupt routing
*/
#ifdef CONFIG_PCI
int mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel,
unsigned char pin)
{
static char pci_irq_table[][4] =
/*
* PCI IDSEL/INTPIN->INTLINE
* A B C D
*/
{
{PIRQA, PIRQB, PIRQC, PIRQD},
{PIRQD, PIRQA, PIRQB, PIRQC},
{PIRQC, PIRQD, PIRQA, PIRQB},
{PIRQB, PIRQC, PIRQD, PIRQA},
};
const long min_idsel = 12, max_idsel = 15, irqs_per_slot = 4;
return PCI_IRQ_TABLE_LOOKUP;
}
int mpc85xx_exclude_device(u_char bus, u_char devfn)
{
if (bus == 0 && PCI_SLOT(devfn) == 0)
return PCIBIOS_DEVICE_NOT_FOUND;
else
return PCIBIOS_SUCCESSFUL;
}
#endif /* CONFIG_PCI */
| gpl-2.0 |
zarboz/brick_kernel_msm8960 | drivers/media/video/msm/csi/msm_ispif.c | 85 | 15268 | /* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <mach/gpio.h>
#include <mach/camera.h>
#include "msm_ispif.h"
#include "msm.h"
#define V4L2_IDENT_ISPIF 50001
#define CSID_VERSION_V2 0x2000011
/* ISPIF registers */
#define ISPIF_RST_CMD_ADDR 0X00
#define ISPIF_INTF_CMD_ADDR 0X04
#define ISPIF_CTRL_ADDR 0X08
#define ISPIF_INPUT_SEL_ADDR 0X0C
#define ISPIF_PIX_INTF_CID_MASK_ADDR 0X10
#define ISPIF_RDI_INTF_CID_MASK_ADDR 0X14
#define ISPIF_PIX_1_INTF_CID_MASK_ADDR 0X38
#define ISPIF_RDI_1_INTF_CID_MASK_ADDR 0X3C
#define ISPIF_PIX_STATUS_ADDR 0X24
#define ISPIF_RDI_STATUS_ADDR 0X28
#define ISPIF_RDI_1_STATUS_ADDR 0X64
#define ISPIF_IRQ_MASK_ADDR 0X0100
#define ISPIF_IRQ_CLEAR_ADDR 0X0104
#define ISPIF_IRQ_STATUS_ADDR 0X0108
#define ISPIF_IRQ_MASK_1_ADDR 0X010C
#define ISPIF_IRQ_CLEAR_1_ADDR 0X0110
#define ISPIF_IRQ_STATUS_1_ADDR 0X0114
#define ISPIF_IRQ_GLOBAL_CLEAR_CMD_ADDR 0x0124
/*ISPIF RESET BITS*/
#define VFE_CLK_DOMAIN_RST 31
#define RDI_CLK_DOMAIN_RST 30
#define PIX_CLK_DOMAIN_RST 29
#define AHB_CLK_DOMAIN_RST 28
#define RDI_1_CLK_DOMAIN_RST 27
#define RDI_1_VFE_RST_STB 13
#define RDI_1_CSID_RST_STB 12
#define RDI_VFE_RST_STB 7
#define RDI_CSID_RST_STB 6
#define PIX_VFE_RST_STB 4
#define PIX_CSID_RST_STB 3
#define SW_REG_RST_STB 2
#define MISC_LOGIC_RST_STB 1
#define STROBED_RST_EN 0
#define PIX_INTF_0_OVERFLOW_IRQ 12
#define RAW_INTF_0_OVERFLOW_IRQ 25
#define RAW_INTF_1_OVERFLOW_IRQ 25
#define RESET_DONE_IRQ 27
#define ISPIF_IRQ_STATUS_MASK 0xA493000
#define ISPIF_IRQ_1_STATUS_MASK 0xA493000
#define ISPIF_IRQ_STATUS_RDI_SOF_MASK 0x492000
#define ISPIF_IRQ_GLOBAL_CLEAR_CMD 0x1
#define MAX_CID 15
static struct ispif_device *ispif;
static uint32_t global_intf_cmd_mask = 0xFFFFFFFF;
static int msm_ispif_intf_reset(uint8_t intftype)
{
int rc = 0;
uint32_t data;
switch (intftype) {
case PIX0:
data = (0x1 << STROBED_RST_EN) +
(0x1 << PIX_VFE_RST_STB) +
(0x1 << PIX_CSID_RST_STB);
msm_io_w(data, ispif->base + ISPIF_RST_CMD_ADDR);
break;
case RDI0:
data = (0x1 << STROBED_RST_EN) +
(0x1 << RDI_VFE_RST_STB) +
(0x1 << RDI_CSID_RST_STB);
msm_io_w(data, ispif->base + ISPIF_RST_CMD_ADDR);
break;
case RDI1:
data = (0x1 << STROBED_RST_EN) +
(0x1 << RDI_1_VFE_RST_STB) +
(0x1 << RDI_1_CSID_RST_STB);
msm_io_w(data, ispif->base + ISPIF_RST_CMD_ADDR);
break;
default:
rc = -EINVAL;
break;
}
if (rc >= 0)
rc = wait_for_completion_interruptible(
&ispif->reset_complete);
return rc;
}
static int msm_ispif_reset(void)
{
uint32_t data = (0x1 << STROBED_RST_EN) +
(0x1 << SW_REG_RST_STB) +
(0x1 << MISC_LOGIC_RST_STB) +
(0x1 << PIX_VFE_RST_STB) +
(0x1 << PIX_CSID_RST_STB) +
(0x1 << RDI_VFE_RST_STB) +
(0x1 << RDI_CSID_RST_STB) +
(0x1 << RDI_1_VFE_RST_STB) +
(0x1 << RDI_1_CSID_RST_STB);
msm_io_w(data, ispif->base + ISPIF_RST_CMD_ADDR);
return wait_for_completion_interruptible(&ispif->reset_complete);
}
static int msm_ispif_subdev_g_chip_ident(struct v4l2_subdev *sd,
struct v4l2_dbg_chip_ident *chip)
{
BUG_ON(!chip);
chip->ident = V4L2_IDENT_ISPIF;
chip->revision = 0;
return 0;
}
static void msm_ispif_sel_csid_core(uint8_t intftype, uint8_t csid)
{
int rc = 0;
uint32_t data;
if (ispif->ispif_clk[intftype] == NULL) {
pr_err("%s: ispif NULL clk\n", __func__);
return;
}
rc = clk_set_rate(ispif->ispif_clk[intftype], csid);
if (rc < 0)
pr_err("%s: clk_set_rate failed %d\n", __func__, rc);
data = msm_io_r(ispif->base + ISPIF_INPUT_SEL_ADDR);
data |= csid<<(intftype*4);
msm_io_w(data, ispif->base + ISPIF_INPUT_SEL_ADDR);
}
static void msm_ispif_enable_intf_cids(uint8_t intftype, uint16_t cid_mask)
{
uint32_t data;
mutex_lock(&ispif->mutex);
switch (intftype) {
case PIX0:
data = msm_io_r(ispif->base +
ISPIF_PIX_INTF_CID_MASK_ADDR);
data |= cid_mask;
msm_io_w(data, ispif->base +
ISPIF_PIX_INTF_CID_MASK_ADDR);
break;
case RDI0:
data = msm_io_r(ispif->base +
ISPIF_RDI_INTF_CID_MASK_ADDR);
data |= cid_mask;
msm_io_w(data, ispif->base +
ISPIF_RDI_INTF_CID_MASK_ADDR);
break;
case RDI1:
data = msm_io_r(ispif->base +
ISPIF_RDI_1_INTF_CID_MASK_ADDR);
data |= cid_mask;
msm_io_w(data, ispif->base +
ISPIF_RDI_1_INTF_CID_MASK_ADDR);
break;
}
mutex_unlock(&ispif->mutex);
}
static int msm_ispif_config(struct msm_ispif_params_list *params_list)
{
uint32_t params_len;
struct msm_ispif_params *ispif_params;
uint32_t data, data1;
int rc = 0, i = 0;
params_len = params_list->len;
ispif_params = params_list->params;
CDBG("Enable interface\n");
data = msm_io_r(ispif->base + ISPIF_PIX_STATUS_ADDR);
data1 = msm_io_r(ispif->base + ISPIF_RDI_STATUS_ADDR);
if (((data & 0xf) != 0xf) || ((data1 & 0xf) != 0xf))
return -EBUSY;
msm_io_w(0x00000000, ispif->base + ISPIF_IRQ_MASK_ADDR);
for (i = 0; i < params_len; i++) {
msm_ispif_sel_csid_core(ispif_params[i].intftype,
ispif_params[i].csid);
msm_ispif_enable_intf_cids(ispif_params[i].intftype,
ispif_params[i].cid_mask);
}
msm_io_w(ISPIF_IRQ_STATUS_MASK, ispif->base +
ISPIF_IRQ_MASK_ADDR);
msm_io_w(ISPIF_IRQ_STATUS_MASK, ispif->base +
ISPIF_IRQ_CLEAR_ADDR);
msm_io_w(ISPIF_IRQ_GLOBAL_CLEAR_CMD, ispif->base +
ISPIF_IRQ_GLOBAL_CLEAR_CMD_ADDR);
return rc;
}
static uint32_t msm_ispif_get_cid_mask(uint8_t intftype)
{
uint32_t mask = 0;
switch (intftype) {
case PIX0:
mask = msm_io_r(ispif->base +
ISPIF_PIX_INTF_CID_MASK_ADDR);
break;
case RDI0:
mask = msm_io_r(ispif->base +
ISPIF_RDI_INTF_CID_MASK_ADDR);
break;
case RDI1:
mask = msm_io_r(ispif->base +
ISPIF_RDI_1_INTF_CID_MASK_ADDR);
break;
default:
break;
}
return mask;
}
static void
msm_ispif_intf_cmd(uint8_t intftype, uint8_t intf_cmd_mask)
{
uint8_t vc = 0, val = 0;
uint32_t cid_mask = msm_ispif_get_cid_mask(intftype);
while (cid_mask != 0) {
if ((cid_mask & 0xf) != 0x0) {
val = (intf_cmd_mask>>(vc*2)) & 0x3;
global_intf_cmd_mask &= ~((0x3 & ~val)
<<((vc*2)+(intftype*8)));
CDBG("intf cmd 0x%x\n", global_intf_cmd_mask);
msm_io_w(global_intf_cmd_mask,
ispif->base + ISPIF_INTF_CMD_ADDR);
}
vc++;
cid_mask >>= 4;
}
}
static int msm_ispif_abort_intf_transfer(uint8_t intf)
{
int rc = 0;
uint8_t intf_cmd_mask = 0xAA;
CDBG("abort stream request\n");
mutex_lock(&ispif->mutex);
msm_ispif_intf_cmd(intf, intf_cmd_mask);
rc = msm_ispif_intf_reset(intf);
global_intf_cmd_mask |= 0xFF<<(intf * 8);
mutex_unlock(&ispif->mutex);
return rc;
}
static int msm_ispif_start_intf_transfer(uint8_t intf)
{
uint32_t data;
uint8_t intf_cmd_mask = 0x55;
int rc = 0;
CDBG("start stream request\n");
mutex_lock(&ispif->mutex);
switch (intf) {
case PIX0:
data = msm_io_r(ispif->base + ISPIF_PIX_STATUS_ADDR);
if ((data & 0xf) != 0xf) {
CDBG("interface is busy\n");
mutex_unlock(&ispif->mutex);
return -EBUSY;
}
break;
case RDI0:
data = msm_io_r(ispif->base + ISPIF_RDI_STATUS_ADDR);
ispif->start_ack_pending = 1;
break;
case RDI1:
data = msm_io_r(ispif->base + ISPIF_RDI_1_STATUS_ADDR);
ispif->start_ack_pending = 1;
break;
}
msm_ispif_intf_cmd(intf, intf_cmd_mask);
mutex_unlock(&ispif->mutex);
return rc;
}
static int msm_ispif_stop_intf_transfer(uint8_t intf)
{
int rc = 0;
uint8_t intf_cmd_mask = 0x00;
CDBG("stop stream request\n");
mutex_lock(&ispif->mutex);
msm_ispif_intf_cmd(intf, intf_cmd_mask);
switch (intf) {
case PIX0:
while ((msm_io_r(ispif->base + ISPIF_PIX_STATUS_ADDR)
& 0xf) != 0xf) {
CDBG("Wait for Idle\n");
}
break;
case RDI0:
while ((msm_io_r(ispif->base + ISPIF_RDI_STATUS_ADDR)
& 0xf) != 0xf) {
CDBG("Wait for Idle\n");
}
break;
default:
break;
}
global_intf_cmd_mask |= 0xFF<<(intf * 8);
mutex_unlock(&ispif->mutex);
return rc;
}
static int msm_ispif_subdev_video_s_stream(struct v4l2_subdev *sd, int enable)
{
struct ispif_device *ispif =
(struct ispif_device *)v4l2_get_subdevdata(sd);
int32_t cmd = enable & ((1<<ISPIF_S_STREAM_SHIFT)-1);
enum msm_ispif_intftype intf = enable >> ISPIF_S_STREAM_SHIFT;
int rc = -EINVAL;
BUG_ON(!ispif);
switch (cmd) {
case ISPIF_ON_FRAME_BOUNDARY:
rc = msm_ispif_start_intf_transfer(intf);
break;
case ISPIF_OFF_FRAME_BOUNDARY:
rc = msm_ispif_stop_intf_transfer(intf);
break;
case ISPIF_OFF_IMMEDIATELY:
rc = msm_ispif_abort_intf_transfer(intf);
break;
default:
break;
}
return rc;
}
static inline void msm_ispif_read_irq_status(struct ispif_irq_status *out)
{
out->ispifIrqStatus0 = msm_io_r(ispif->base +
ISPIF_IRQ_STATUS_ADDR);
CDBG("ispif->irq: Irq_status0 = 0x%x\n",
out->ispifIrqStatus0);
if (out->ispifIrqStatus0 & ISPIF_IRQ_STATUS_MASK) {
if (out->ispifIrqStatus0 & (0x1 << RESET_DONE_IRQ))
complete(&ispif->reset_complete);
if (out->ispifIrqStatus0 & (0x1 << PIX_INTF_0_OVERFLOW_IRQ))
pr_err("%s: pix intf 0 overflow.\n", __func__);
if (out->ispifIrqStatus0 & (0x1 << RAW_INTF_0_OVERFLOW_IRQ))
pr_err("%s: rdi intf 0 overflow.\n", __func__);
if (out->ispifIrqStatus0 & ISPIF_IRQ_STATUS_RDI_SOF_MASK) {
if (ispif->start_ack_pending) {
v4l2_subdev_notify(&ispif->subdev,
NOTIFY_ISP_MSG_EVT,
(void *)MSG_ID_START_ACK);
ispif->start_ack_pending = 0;
/* stop stream at frame boundary */
msm_ispif_stop_intf_transfer(RDI0);
}
v4l2_subdev_notify(&ispif->subdev, NOTIFY_ISP_MSG_EVT,
(void *)MSG_ID_SOF_ACK);
}
}
msm_io_w(out->ispifIrqStatus0,
ispif->base + ISPIF_IRQ_CLEAR_ADDR);
msm_io_w(ISPIF_IRQ_GLOBAL_CLEAR_CMD, ispif->base +
ISPIF_IRQ_GLOBAL_CLEAR_CMD_ADDR);
}
static irqreturn_t msm_io_ispif_irq(int irq_num, void *data)
{
struct ispif_irq_status irq;
msm_ispif_read_irq_status(&irq);
return IRQ_HANDLED;
}
static struct msm_cam_clk_info ispif_clk_info[] = {
{"csi_pix_clk", 0},
{"csi_rdi_clk", 0},
{"csi_pix1_clk", 0},
{"csi_rdi1_clk", 0},
{"csi_rdi2_clk", 0},
};
static int msm_ispif_init(const uint32_t *csid_version)
{
int rc = 0;
rc = request_irq(ispif->irq->start, msm_io_ispif_irq,
IRQF_TRIGGER_RISING, "ispif", 0);
global_intf_cmd_mask = 0xFFFFFFFF;
init_completion(&ispif->reset_complete);
ispif->csid_version = *csid_version;
if (ispif->csid_version == CSID_VERSION_V2) {
rc = msm_cam_clk_enable(&ispif->pdev->dev, ispif_clk_info,
ispif->ispif_clk, ARRAY_SIZE(ispif_clk_info), 1);
if (rc < 0)
return rc;
} else {
rc = msm_cam_clk_enable(&ispif->pdev->dev, ispif_clk_info,
ispif->ispif_clk, 2, 1);
if (rc < 0)
return rc;
}
rc = msm_ispif_reset();
return rc;
}
static void msm_ispif_release(struct v4l2_subdev *sd)
{
struct ispif_device *ispif =
(struct ispif_device *)v4l2_get_subdevdata(sd);
if (ispif->csid_version == CSID_VERSION_V2)
msm_cam_clk_enable(&ispif->pdev->dev, ispif_clk_info,
ispif->ispif_clk, ARRAY_SIZE(ispif_clk_info), 0);
else
msm_cam_clk_enable(&ispif->pdev->dev, ispif_clk_info,
ispif->ispif_clk, 2, 0);
CDBG("%s, free_irq\n", __func__);
free_irq(ispif->irq->start, 0);
}
void msm_ispif_vfe_get_cid(uint8_t intftype, char *cids, int *num)
{
uint32_t data = 0;
int i = 0, j = 0;
switch (intftype) {
case PIX0:
data = msm_io_r(ispif->base +
ISPIF_PIX_INTF_CID_MASK_ADDR);
break;
case RDI0:
data = msm_io_r(ispif->base +
ISPIF_RDI_INTF_CID_MASK_ADDR);
break;
case RDI1:
data = msm_io_r(ispif->base +
ISPIF_RDI_1_INTF_CID_MASK_ADDR);
break;
default:
break;
}
for (i = 0; i <= MAX_CID; i++) {
if ((data & 0x1) == 0x1) {
cids[j++] = i;
(*num)++;
}
data >>= 1;
}
}
static long msm_ispif_subdev_ioctl(struct v4l2_subdev *sd, unsigned int cmd,
void *arg)
{
switch (cmd) {
case VIDIOC_MSM_ISPIF_CFG:
return msm_ispif_config((struct msm_ispif_params_list *)arg);
case VIDIOC_MSM_ISPIF_INIT:
return msm_ispif_init((uint32_t *)arg);
case VIDIOC_MSM_ISPIF_RELEASE:
msm_ispif_release(sd);
default:
return -ENOIOCTLCMD;
}
}
static struct v4l2_subdev_core_ops msm_ispif_subdev_core_ops = {
.g_chip_ident = &msm_ispif_subdev_g_chip_ident,
.ioctl = &msm_ispif_subdev_ioctl,
};
static struct v4l2_subdev_video_ops msm_ispif_subdev_video_ops = {
.s_stream = &msm_ispif_subdev_video_s_stream,
};
static const struct v4l2_subdev_ops msm_ispif_subdev_ops = {
.core = &msm_ispif_subdev_core_ops,
.video = &msm_ispif_subdev_video_ops,
};
static int __devinit ispif_probe(struct platform_device *pdev)
{
int rc = 0;
CDBG("%s\n", __func__);
ispif = kzalloc(sizeof(struct ispif_device), GFP_KERNEL);
if (!ispif) {
pr_err("%s: no enough memory\n", __func__);
return -ENOMEM;
}
v4l2_subdev_init(&ispif->subdev, &msm_ispif_subdev_ops);
v4l2_set_subdevdata(&ispif->subdev, ispif);
platform_set_drvdata(pdev, &ispif->subdev);
snprintf(ispif->subdev.name, sizeof(ispif->subdev.name),
"ispif");
mutex_init(&ispif->mutex);
ispif->mem = platform_get_resource_byname(pdev,
IORESOURCE_MEM, "ispif");
if (!ispif->mem) {
pr_err("%s: no mem resource?\n", __func__);
rc = -ENODEV;
goto ispif_no_resource;
}
ispif->irq = platform_get_resource_byname(pdev,
IORESOURCE_IRQ, "ispif");
if (!ispif->irq) {
pr_err("%s: no irq resource?\n", __func__);
rc = -ENODEV;
goto ispif_no_resource;
}
ispif->io = request_mem_region(ispif->mem->start,
resource_size(ispif->mem), pdev->name);
if (!ispif->io) {
pr_err("%s: no valid mem region\n", __func__);
rc = -EBUSY;
goto ispif_no_resource;
}
ispif->base = ioremap(ispif->mem->start,
resource_size(ispif->mem));
if (!ispif->base) {
rc = -ENOMEM;
goto ispif_no_mem;
}
ispif->pdev = pdev;
return 0;
ispif_no_mem:
release_mem_region(ispif->mem->start,
resource_size(ispif->mem));
ispif_no_resource:
mutex_destroy(&ispif->mutex);
kfree(ispif);
return rc;
}
static struct platform_driver ispif_driver = {
.probe = ispif_probe,
.driver = {
.name = MSM_ISPIF_DRV_NAME,
.owner = THIS_MODULE,
},
};
static int __init msm_ispif_init_module(void)
{
return platform_driver_register(&ispif_driver);
}
static void __exit msm_ispif_exit_module(void)
{
platform_driver_unregister(&ispif_driver);
}
module_init(msm_ispif_init_module);
module_exit(msm_ispif_exit_module);
MODULE_DESCRIPTION("MSM ISP Interface driver");
MODULE_LICENSE("GPL v2");
| gpl-2.0 |
aeroevan/linux | mm/quicklist.c | 341 | 2450 | /*
* Quicklist support.
*
* Quicklists are light weight lists of pages that have a defined state
* on alloc and free. Pages must be in the quicklist specific defined state
* (zero by default) when the page is freed. It seems that the initial idea
* for such lists first came from Dave Miller and then various other people
* improved on it.
*
* Copyright (C) 2007 SGI,
* Christoph Lameter <cl@linux.com>
* Generalized, added support for multiple lists and
* constructors / destructors.
*/
#include <linux/kernel.h>
#include <linux/gfp.h>
#include <linux/mm.h>
#include <linux/mmzone.h>
#include <linux/quicklist.h>
DEFINE_PER_CPU(struct quicklist [CONFIG_NR_QUICK], quicklist);
#define FRACTION_OF_NODE_MEM 16
static unsigned long max_pages(unsigned long min_pages)
{
unsigned long node_free_pages, max;
int node = numa_node_id();
struct zone *zones = NODE_DATA(node)->node_zones;
int num_cpus_on_node;
node_free_pages =
#ifdef CONFIG_ZONE_DMA
zone_page_state(&zones[ZONE_DMA], NR_FREE_PAGES) +
#endif
#ifdef CONFIG_ZONE_DMA32
zone_page_state(&zones[ZONE_DMA32], NR_FREE_PAGES) +
#endif
zone_page_state(&zones[ZONE_NORMAL], NR_FREE_PAGES);
max = node_free_pages / FRACTION_OF_NODE_MEM;
num_cpus_on_node = cpumask_weight(cpumask_of_node(node));
max /= num_cpus_on_node;
return max(max, min_pages);
}
static long min_pages_to_free(struct quicklist *q,
unsigned long min_pages, long max_free)
{
long pages_to_free;
pages_to_free = q->nr_pages - max_pages(min_pages);
return min(pages_to_free, max_free);
}
/*
* Trim down the number of pages in the quicklist
*/
void quicklist_trim(int nr, void (*dtor)(void *),
unsigned long min_pages, unsigned long max_free)
{
long pages_to_free;
struct quicklist *q;
q = &get_cpu_var(quicklist)[nr];
if (q->nr_pages > min_pages) {
pages_to_free = min_pages_to_free(q, min_pages, max_free);
while (pages_to_free > 0) {
/*
* We pass a gfp_t of 0 to quicklist_alloc here
* because we will never call into the page allocator.
*/
void *p = quicklist_alloc(nr, 0, NULL);
if (dtor)
dtor(p);
free_page((unsigned long)p);
pages_to_free--;
}
}
put_cpu_var(quicklist);
}
unsigned long quicklist_total_size(void)
{
unsigned long count = 0;
int cpu;
struct quicklist *ql, *q;
for_each_online_cpu(cpu) {
ql = per_cpu(quicklist, cpu);
for (q = ql; q < ql + CONFIG_NR_QUICK; q++)
count += q->nr_pages;
}
return count;
}
| gpl-2.0 |
gabwerkz/bproj-ics | sound/soc/codecs/wm8711.c | 597 | 12625 | /*
* wm8711.c -- WM8711 ALSA SoC Audio driver
*
* Copyright 2006 Wolfson Microelectronics
*
* Author: Mike Arthur <linux@wolfsonmicro.com>
*
* Based on wm8731.c by Richard Purdie
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/tlv.h>
#include <sound/initval.h>
#include "wm8711.h"
/* codec private data */
struct wm8711_priv {
enum snd_soc_control_type bus_type;
unsigned int sysclk;
};
/*
* wm8711 register cache
* We can't read the WM8711 register space when we are
* using 2 wire for device control, so we cache them instead.
* There is no point in caching the reset register
*/
static const u16 wm8711_reg[WM8711_CACHEREGNUM] = {
0x0079, 0x0079, 0x000a, 0x0008,
0x009f, 0x000a, 0x0000, 0x0000
};
#define wm8711_reset(c) snd_soc_write(c, WM8711_RESET, 0)
static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
static const struct snd_kcontrol_new wm8711_snd_controls[] = {
SOC_DOUBLE_R_TLV("Master Playback Volume", WM8711_LOUT1V, WM8711_ROUT1V,
0, 127, 0, out_tlv),
SOC_DOUBLE_R("Master Playback ZC Switch", WM8711_LOUT1V, WM8711_ROUT1V,
7, 1, 0),
};
/* Output Mixer */
static const struct snd_kcontrol_new wm8711_output_mixer_controls[] = {
SOC_DAPM_SINGLE("Line Bypass Switch", WM8711_APANA, 3, 1, 0),
SOC_DAPM_SINGLE("HiFi Playback Switch", WM8711_APANA, 4, 1, 0),
};
static const struct snd_soc_dapm_widget wm8711_dapm_widgets[] = {
SND_SOC_DAPM_MIXER("Output Mixer", WM8711_PWR, 4, 1,
&wm8711_output_mixer_controls[0],
ARRAY_SIZE(wm8711_output_mixer_controls)),
SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8711_PWR, 3, 1),
SND_SOC_DAPM_OUTPUT("LOUT"),
SND_SOC_DAPM_OUTPUT("LHPOUT"),
SND_SOC_DAPM_OUTPUT("ROUT"),
SND_SOC_DAPM_OUTPUT("RHPOUT"),
};
static const struct snd_soc_dapm_route wm8711_intercon[] = {
/* output mixer */
{"Output Mixer", "Line Bypass Switch", "Line Input"},
{"Output Mixer", "HiFi Playback Switch", "DAC"},
/* outputs */
{"RHPOUT", NULL, "Output Mixer"},
{"ROUT", NULL, "Output Mixer"},
{"LHPOUT", NULL, "Output Mixer"},
{"LOUT", NULL, "Output Mixer"},
};
struct _coeff_div {
u32 mclk;
u32 rate;
u16 fs;
u8 sr:4;
u8 bosr:1;
u8 usb:1;
};
/* codec mclk clock divider coefficients */
static const struct _coeff_div coeff_div[] = {
/* 48k */
{12288000, 48000, 256, 0x0, 0x0, 0x0},
{18432000, 48000, 384, 0x0, 0x1, 0x0},
{12000000, 48000, 250, 0x0, 0x0, 0x1},
/* 32k */
{12288000, 32000, 384, 0x6, 0x0, 0x0},
{18432000, 32000, 576, 0x6, 0x1, 0x0},
{12000000, 32000, 375, 0x6, 0x0, 0x1},
/* 8k */
{12288000, 8000, 1536, 0x3, 0x0, 0x0},
{18432000, 8000, 2304, 0x3, 0x1, 0x0},
{11289600, 8000, 1408, 0xb, 0x0, 0x0},
{16934400, 8000, 2112, 0xb, 0x1, 0x0},
{12000000, 8000, 1500, 0x3, 0x0, 0x1},
/* 96k */
{12288000, 96000, 128, 0x7, 0x0, 0x0},
{18432000, 96000, 192, 0x7, 0x1, 0x0},
{12000000, 96000, 125, 0x7, 0x0, 0x1},
/* 44.1k */
{11289600, 44100, 256, 0x8, 0x0, 0x0},
{16934400, 44100, 384, 0x8, 0x1, 0x0},
{12000000, 44100, 272, 0x8, 0x1, 0x1},
/* 88.2k */
{11289600, 88200, 128, 0xf, 0x0, 0x0},
{16934400, 88200, 192, 0xf, 0x1, 0x0},
{12000000, 88200, 136, 0xf, 0x1, 0x1},
};
static inline int get_coeff(int mclk, int rate)
{
int i;
for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
return i;
}
return 0;
}
static int wm8711_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
struct wm8711_priv *wm8711 = snd_soc_codec_get_drvdata(codec);
u16 iface = snd_soc_read(codec, WM8711_IFACE) & 0xfffc;
int i = get_coeff(wm8711->sysclk, params_rate(params));
u16 srate = (coeff_div[i].sr << 2) |
(coeff_div[i].bosr << 1) | coeff_div[i].usb;
snd_soc_write(codec, WM8711_SRATE, srate);
/* bit size */
switch (params_format(params)) {
case SNDRV_PCM_FORMAT_S16_LE:
break;
case SNDRV_PCM_FORMAT_S20_3LE:
iface |= 0x0004;
break;
case SNDRV_PCM_FORMAT_S24_LE:
iface |= 0x0008;
break;
}
snd_soc_write(codec, WM8711_IFACE, iface);
return 0;
}
static int wm8711_pcm_prepare(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
/* set active */
snd_soc_write(codec, WM8711_ACTIVE, 0x0001);
return 0;
}
static void wm8711_shutdown(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
/* deactivate */
if (!codec->active) {
udelay(50);
snd_soc_write(codec, WM8711_ACTIVE, 0x0);
}
}
static int wm8711_mute(struct snd_soc_dai *dai, int mute)
{
struct snd_soc_codec *codec = dai->codec;
u16 mute_reg = snd_soc_read(codec, WM8711_APDIGI) & 0xfff7;
if (mute)
snd_soc_write(codec, WM8711_APDIGI, mute_reg | 0x8);
else
snd_soc_write(codec, WM8711_APDIGI, mute_reg);
return 0;
}
static int wm8711_set_dai_sysclk(struct snd_soc_dai *codec_dai,
int clk_id, unsigned int freq, int dir)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct wm8711_priv *wm8711 = snd_soc_codec_get_drvdata(codec);
switch (freq) {
case 11289600:
case 12000000:
case 12288000:
case 16934400:
case 18432000:
wm8711->sysclk = freq;
return 0;
}
return -EINVAL;
}
static int wm8711_set_dai_fmt(struct snd_soc_dai *codec_dai,
unsigned int fmt)
{
struct snd_soc_codec *codec = codec_dai->codec;
u16 iface = 0;
/* set master/slave audio interface */
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBM_CFM:
iface |= 0x0040;
break;
case SND_SOC_DAIFMT_CBS_CFS:
break;
default:
return -EINVAL;
}
/* interface format */
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_I2S:
iface |= 0x0002;
break;
case SND_SOC_DAIFMT_RIGHT_J:
break;
case SND_SOC_DAIFMT_LEFT_J:
iface |= 0x0001;
break;
case SND_SOC_DAIFMT_DSP_A:
iface |= 0x0003;
break;
case SND_SOC_DAIFMT_DSP_B:
iface |= 0x0013;
break;
default:
return -EINVAL;
}
/* clock inversion */
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
case SND_SOC_DAIFMT_NB_NF:
break;
case SND_SOC_DAIFMT_IB_IF:
iface |= 0x0090;
break;
case SND_SOC_DAIFMT_IB_NF:
iface |= 0x0080;
break;
case SND_SOC_DAIFMT_NB_IF:
iface |= 0x0010;
break;
default:
return -EINVAL;
}
/* set iface */
snd_soc_write(codec, WM8711_IFACE, iface);
return 0;
}
static int wm8711_set_bias_level(struct snd_soc_codec *codec,
enum snd_soc_bias_level level)
{
u16 reg = snd_soc_read(codec, WM8711_PWR) & 0xff7f;
switch (level) {
case SND_SOC_BIAS_ON:
snd_soc_write(codec, WM8711_PWR, reg);
break;
case SND_SOC_BIAS_PREPARE:
break;
case SND_SOC_BIAS_STANDBY:
snd_soc_write(codec, WM8711_PWR, reg | 0x0040);
break;
case SND_SOC_BIAS_OFF:
snd_soc_write(codec, WM8711_ACTIVE, 0x0);
snd_soc_write(codec, WM8711_PWR, 0xffff);
break;
}
codec->dapm.bias_level = level;
return 0;
}
#define WM8711_RATES SNDRV_PCM_RATE_8000_96000
#define WM8711_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
SNDRV_PCM_FMTBIT_S24_LE)
static struct snd_soc_dai_ops wm8711_ops = {
.prepare = wm8711_pcm_prepare,
.hw_params = wm8711_hw_params,
.shutdown = wm8711_shutdown,
.digital_mute = wm8711_mute,
.set_sysclk = wm8711_set_dai_sysclk,
.set_fmt = wm8711_set_dai_fmt,
};
static struct snd_soc_dai_driver wm8711_dai = {
.name = "wm8711-hifi",
.playback = {
.stream_name = "Playback",
.channels_min = 1,
.channels_max = 2,
.rates = WM8711_RATES,
.formats = WM8711_FORMATS,
},
.ops = &wm8711_ops,
};
static int wm8711_suspend(struct snd_soc_codec *codec, pm_message_t state)
{
snd_soc_write(codec, WM8711_ACTIVE, 0x0);
wm8711_set_bias_level(codec, SND_SOC_BIAS_OFF);
return 0;
}
static int wm8711_resume(struct snd_soc_codec *codec)
{
int i;
u8 data[2];
u16 *cache = codec->reg_cache;
/* Sync reg_cache with the hardware */
for (i = 0; i < ARRAY_SIZE(wm8711_reg); i++) {
data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
data[1] = cache[i] & 0x00ff;
codec->hw_write(codec->control_data, data, 2);
}
wm8711_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
return 0;
}
static int wm8711_probe(struct snd_soc_codec *codec)
{
struct wm8711_priv *wm8711 = snd_soc_codec_get_drvdata(codec);
int ret, reg;
ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8711->bus_type);
if (ret < 0) {
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
return ret;
}
ret = wm8711_reset(codec);
if (ret < 0) {
dev_err(codec->dev, "Failed to issue reset\n");
return ret;
}
wm8711_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
/* Latch the update bits */
reg = snd_soc_read(codec, WM8711_LOUT1V);
snd_soc_write(codec, WM8711_LOUT1V, reg | 0x0100);
reg = snd_soc_read(codec, WM8711_ROUT1V);
snd_soc_write(codec, WM8711_ROUT1V, reg | 0x0100);
snd_soc_add_controls(codec, wm8711_snd_controls,
ARRAY_SIZE(wm8711_snd_controls));
return ret;
}
/* power down chip */
static int wm8711_remove(struct snd_soc_codec *codec)
{
wm8711_set_bias_level(codec, SND_SOC_BIAS_OFF);
return 0;
}
static struct snd_soc_codec_driver soc_codec_dev_wm8711 = {
.probe = wm8711_probe,
.remove = wm8711_remove,
.suspend = wm8711_suspend,
.resume = wm8711_resume,
.set_bias_level = wm8711_set_bias_level,
.reg_cache_size = ARRAY_SIZE(wm8711_reg),
.reg_word_size = sizeof(u16),
.reg_cache_default = wm8711_reg,
.dapm_widgets = wm8711_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(wm8711_dapm_widgets),
.dapm_routes = wm8711_intercon,
.num_dapm_routes = ARRAY_SIZE(wm8711_intercon),
};
#if defined(CONFIG_SPI_MASTER)
static int __devinit wm8711_spi_probe(struct spi_device *spi)
{
struct wm8711_priv *wm8711;
int ret;
wm8711 = kzalloc(sizeof(struct wm8711_priv), GFP_KERNEL);
if (wm8711 == NULL)
return -ENOMEM;
spi_set_drvdata(spi, wm8711);
wm8711->bus_type = SND_SOC_SPI;
ret = snd_soc_register_codec(&spi->dev,
&soc_codec_dev_wm8711, &wm8711_dai, 1);
if (ret < 0)
kfree(wm8711);
return ret;
}
static int __devexit wm8711_spi_remove(struct spi_device *spi)
{
snd_soc_unregister_codec(&spi->dev);
kfree(spi_get_drvdata(spi));
return 0;
}
static struct spi_driver wm8711_spi_driver = {
.driver = {
.name = "wm8711-codec",
.owner = THIS_MODULE,
},
.probe = wm8711_spi_probe,
.remove = __devexit_p(wm8711_spi_remove),
};
#endif /* CONFIG_SPI_MASTER */
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
static __devinit int wm8711_i2c_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct wm8711_priv *wm8711;
int ret;
wm8711 = kzalloc(sizeof(struct wm8711_priv), GFP_KERNEL);
if (wm8711 == NULL)
return -ENOMEM;
i2c_set_clientdata(client, wm8711);
wm8711->bus_type = SND_SOC_I2C;
ret = snd_soc_register_codec(&client->dev,
&soc_codec_dev_wm8711, &wm8711_dai, 1);
if (ret < 0)
kfree(wm8711);
return ret;
}
static __devexit int wm8711_i2c_remove(struct i2c_client *client)
{
snd_soc_unregister_codec(&client->dev);
kfree(i2c_get_clientdata(client));
return 0;
}
static const struct i2c_device_id wm8711_i2c_id[] = {
{ "wm8711", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, wm8711_i2c_id);
static struct i2c_driver wm8711_i2c_driver = {
.driver = {
.name = "wm8711-codec",
.owner = THIS_MODULE,
},
.probe = wm8711_i2c_probe,
.remove = __devexit_p(wm8711_i2c_remove),
.id_table = wm8711_i2c_id,
};
#endif
static int __init wm8711_modinit(void)
{
int ret;
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
ret = i2c_add_driver(&wm8711_i2c_driver);
if (ret != 0) {
printk(KERN_ERR "Failed to register WM8711 I2C driver: %d\n",
ret);
}
#endif
#if defined(CONFIG_SPI_MASTER)
ret = spi_register_driver(&wm8711_spi_driver);
if (ret != 0) {
printk(KERN_ERR "Failed to register WM8711 SPI driver: %d\n",
ret);
}
#endif
return 0;
}
module_init(wm8711_modinit);
static void __exit wm8711_exit(void)
{
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
i2c_del_driver(&wm8711_i2c_driver);
#endif
#if defined(CONFIG_SPI_MASTER)
spi_unregister_driver(&wm8711_spi_driver);
#endif
}
module_exit(wm8711_exit);
MODULE_DESCRIPTION("ASoC WM8711 driver");
MODULE_AUTHOR("Mike Arthur");
MODULE_LICENSE("GPL");
| gpl-2.0 |
Soaa-/-lightspeed-vision | drivers/isdn/hisax/q931.c | 1365 | 31811 | /* $Id: q931.c,v 1.12.2.3 2004/01/13 14:31:26 keil Exp $
*
* code to decode ITU Q.931 call control messages
*
* Author Jan den Ouden
* Copyright by Jan den Ouden
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
* Changelog:
*
* Pauline Middelink general improvements
* Beat Doebeli cause texts, display information element
* Karsten Keil cause texts, display information element for 1TR6
*
*/
#include "hisax.h"
#include "l3_1tr6.h"
void
iecpy(u_char * dest, u_char * iestart, int ieoffset)
{
u_char *p;
int l;
p = iestart + ieoffset + 2;
l = iestart[1] - ieoffset;
while (l--)
*dest++ = *p++;
*dest++ = '\0';
}
/*
* According to Table 4-2/Q.931
*/
static
struct MessageType {
u_char nr;
char *descr;
} mtlist[] = {
{
0x1, "ALERTING"
},
{
0x2, "CALL PROCEEDING"
},
{
0x7, "CONNECT"
},
{
0xf, "CONNECT ACKNOWLEDGE"
},
{
0x3, "PROGRESS"
},
{
0x5, "SETUP"
},
{
0xd, "SETUP ACKNOWLEDGE"
},
{
0x24, "HOLD"
},
{
0x28, "HOLD ACKNOWLEDGE"
},
{
0x30, "HOLD REJECT"
},
{
0x31, "RETRIEVE"
},
{
0x33, "RETRIEVE ACKNOWLEDGE"
},
{
0x37, "RETRIEVE REJECT"
},
{
0x26, "RESUME"
},
{
0x2e, "RESUME ACKNOWLEDGE"
},
{
0x22, "RESUME REJECT"
},
{
0x25, "SUSPEND"
},
{
0x2d, "SUSPEND ACKNOWLEDGE"
},
{
0x21, "SUSPEND REJECT"
},
{
0x20, "USER INFORMATION"
},
{
0x45, "DISCONNECT"
},
{
0x4d, "RELEASE"
},
{
0x5a, "RELEASE COMPLETE"
},
{
0x46, "RESTART"
},
{
0x4e, "RESTART ACKNOWLEDGE"
},
{
0x60, "SEGMENT"
},
{
0x79, "CONGESTION CONTROL"
},
{
0x7b, "INFORMATION"
},
{
0x62, "FACILITY"
},
{
0x6e, "NOTIFY"
},
{
0x7d, "STATUS"
},
{
0x75, "STATUS ENQUIRY"
}
};
#define MTSIZE ARRAY_SIZE(mtlist)
static
struct MessageType mt_n0[] =
{
{MT_N0_REG_IND, "REGister INDication"},
{MT_N0_CANC_IND, "CANCel INDication"},
{MT_N0_FAC_STA, "FACility STAtus"},
{MT_N0_STA_ACK, "STAtus ACKnowledge"},
{MT_N0_STA_REJ, "STAtus REJect"},
{MT_N0_FAC_INF, "FACility INFormation"},
{MT_N0_INF_ACK, "INFormation ACKnowledge"},
{MT_N0_INF_REJ, "INFormation REJect"},
{MT_N0_CLOSE, "CLOSE"},
{MT_N0_CLO_ACK, "CLOse ACKnowledge"}
};
#define MT_N0_LEN ARRAY_SIZE(mt_n0)
static
struct MessageType mt_n1[] =
{
{MT_N1_ESC, "ESCape"},
{MT_N1_ALERT, "ALERT"},
{MT_N1_CALL_SENT, "CALL SENT"},
{MT_N1_CONN, "CONNect"},
{MT_N1_CONN_ACK, "CONNect ACKnowledge"},
{MT_N1_SETUP, "SETUP"},
{MT_N1_SETUP_ACK, "SETUP ACKnowledge"},
{MT_N1_RES, "RESume"},
{MT_N1_RES_ACK, "RESume ACKnowledge"},
{MT_N1_RES_REJ, "RESume REJect"},
{MT_N1_SUSP, "SUSPend"},
{MT_N1_SUSP_ACK, "SUSPend ACKnowledge"},
{MT_N1_SUSP_REJ, "SUSPend REJect"},
{MT_N1_USER_INFO, "USER INFO"},
{MT_N1_DET, "DETach"},
{MT_N1_DISC, "DISConnect"},
{MT_N1_REL, "RELease"},
{MT_N1_REL_ACK, "RELease ACKnowledge"},
{MT_N1_CANC_ACK, "CANCel ACKnowledge"},
{MT_N1_CANC_REJ, "CANCel REJect"},
{MT_N1_CON_CON, "CONgestion CONtrol"},
{MT_N1_FAC, "FACility"},
{MT_N1_FAC_ACK, "FACility ACKnowledge"},
{MT_N1_FAC_CAN, "FACility CANcel"},
{MT_N1_FAC_REG, "FACility REGister"},
{MT_N1_FAC_REJ, "FACility REJect"},
{MT_N1_INFO, "INFOrmation"},
{MT_N1_REG_ACK, "REGister ACKnowledge"},
{MT_N1_REG_REJ, "REGister REJect"},
{MT_N1_STAT, "STATus"}
};
#define MT_N1_LEN ARRAY_SIZE(mt_n1)
static int
prbits(char *dest, u_char b, int start, int len)
{
char *dp = dest;
b = b << (8 - start);
while (len--) {
if (b & 0x80)
*dp++ = '1';
else
*dp++ = '0';
b = b << 1;
}
return (dp - dest);
}
static
u_char *
skipext(u_char * p)
{
while (!(*p++ & 0x80));
return (p);
}
/*
* Cause Values According to Q.850
* edescr: English description
* ddescr: German description used by Swissnet II (Swiss Telecom
* not yet written...
*/
static
struct CauseValue {
u_char nr;
char *edescr;
char *ddescr;
} cvlist[] = {
{
0x01, "Unallocated (unassigned) number", "Nummer nicht zugeteilt"
},
{
0x02, "No route to specified transit network", ""
},
{
0x03, "No route to destination", ""
},
{
0x04, "Send special information tone", ""
},
{
0x05, "Misdialled trunk prefix", ""
},
{
0x06, "Channel unacceptable", "Kanal nicht akzeptierbar"
},
{
0x07, "Channel awarded and being delivered in an established channel", ""
},
{
0x08, "Preemption", ""
},
{
0x09, "Preemption - circuit reserved for reuse", ""
},
{
0x10, "Normal call clearing", "Normale Ausloesung"
},
{
0x11, "User busy", "TNB besetzt"
},
{
0x12, "No user responding", ""
},
{
0x13, "No answer from user (user alerted)", ""
},
{
0x14, "Subscriber absent", ""
},
{
0x15, "Call rejected", ""
},
{
0x16, "Number changed", ""
},
{
0x1a, "non-selected user clearing", ""
},
{
0x1b, "Destination out of order", ""
},
{
0x1c, "Invalid number format (address incomplete)", ""
},
{
0x1d, "Facility rejected", ""
},
{
0x1e, "Response to Status enquiry", ""
},
{
0x1f, "Normal, unspecified", ""
},
{
0x22, "No circuit/channel available", ""
},
{
0x26, "Network out of order", ""
},
{
0x27, "Permanent frame mode connection out-of-service", ""
},
{
0x28, "Permanent frame mode connection operational", ""
},
{
0x29, "Temporary failure", ""
},
{
0x2a, "Switching equipment congestion", ""
},
{
0x2b, "Access information discarded", ""
},
{
0x2c, "Requested circuit/channel not available", ""
},
{
0x2e, "Precedence call blocked", ""
},
{
0x2f, "Resource unavailable, unspecified", ""
},
{
0x31, "Quality of service unavailable", ""
},
{
0x32, "Requested facility not subscribed", ""
},
{
0x35, "Outgoing calls barred within CUG", ""
},
{
0x37, "Incoming calls barred within CUG", ""
},
{
0x39, "Bearer capability not authorized", ""
},
{
0x3a, "Bearer capability not presently available", ""
},
{
0x3e, "Inconsistency in designated outgoing access information and subscriber class ", " "
},
{
0x3f, "Service or option not available, unspecified", ""
},
{
0x41, "Bearer capability not implemented", ""
},
{
0x42, "Channel type not implemented", ""
},
{
0x43, "Requested facility not implemented", ""
},
{
0x44, "Only restricted digital information bearer capability is available", ""
},
{
0x4f, "Service or option not implemented", ""
},
{
0x51, "Invalid call reference value", ""
},
{
0x52, "Identified channel does not exist", ""
},
{
0x53, "A suspended call exists, but this call identity does not", ""
},
{
0x54, "Call identity in use", ""
},
{
0x55, "No call suspended", ""
},
{
0x56, "Call having the requested call identity has been cleared", ""
},
{
0x57, "User not member of CUG", ""
},
{
0x58, "Incompatible destination", ""
},
{
0x5a, "Non-existent CUG", ""
},
{
0x5b, "Invalid transit network selection", ""
},
{
0x5f, "Invalid message, unspecified", ""
},
{
0x60, "Mandatory information element is missing", ""
},
{
0x61, "Message type non-existent or not implemented", ""
},
{
0x62, "Message not compatible with call state or message type non-existent or not implemented ", " "
},
{
0x63, "Information element/parameter non-existent or not implemented", ""
},
{
0x64, "Invalid information element contents", ""
},
{
0x65, "Message not compatible with call state", ""
},
{
0x66, "Recovery on timer expiry", ""
},
{
0x67, "Parameter non-existent or not implemented - passed on", ""
},
{
0x6e, "Message with unrecognized parameter discarded", ""
},
{
0x6f, "Protocol error, unspecified", ""
},
{
0x7f, "Interworking, unspecified", ""
},
};
#define CVSIZE ARRAY_SIZE(cvlist)
static
int
prcause(char *dest, u_char * p)
{
u_char *end;
char *dp = dest;
int i, cause;
end = p + p[1] + 1;
p += 2;
dp += sprintf(dp, " coding ");
dp += prbits(dp, *p, 7, 2);
dp += sprintf(dp, " location ");
dp += prbits(dp, *p, 4, 4);
*dp++ = '\n';
p = skipext(p);
cause = 0x7f & *p++;
/* locate cause value */
for (i = 0; i < CVSIZE; i++)
if (cvlist[i].nr == cause)
break;
/* display cause value if it exists */
if (i == CVSIZE)
dp += sprintf(dp, "Unknown cause type %x!\n", cause);
else
dp += sprintf(dp, " cause value %x : %s \n", cause, cvlist[i].edescr);
while (!0) {
if (p > end)
break;
dp += sprintf(dp, " diag attribute %d ", *p++ & 0x7f);
dp += sprintf(dp, " rej %d ", *p & 0x7f);
if (*p & 0x80) {
*dp++ = '\n';
break;
} else
dp += sprintf(dp, " av %d\n", (*++p) & 0x7f);
}
return (dp - dest);
}
static
struct MessageType cause_1tr6[] =
{
{CAUSE_InvCRef, "Invalid Call Reference"},
{CAUSE_BearerNotImpl, "Bearer Service Not Implemented"},
{CAUSE_CIDunknown, "Caller Identity unknown"},
{CAUSE_CIDinUse, "Caller Identity in Use"},
{CAUSE_NoChans, "No Channels available"},
{CAUSE_FacNotImpl, "Facility Not Implemented"},
{CAUSE_FacNotSubscr, "Facility Not Subscribed"},
{CAUSE_OutgoingBarred, "Outgoing calls barred"},
{CAUSE_UserAccessBusy, "User Access Busy"},
{CAUSE_NegativeGBG, "Negative GBG"},
{CAUSE_UnknownGBG, "Unknown GBG"},
{CAUSE_NoSPVknown, "No SPV known"},
{CAUSE_DestNotObtain, "Destination not obtainable"},
{CAUSE_NumberChanged, "Number changed"},
{CAUSE_OutOfOrder, "Out Of Order"},
{CAUSE_NoUserResponse, "No User Response"},
{CAUSE_UserBusy, "User Busy"},
{CAUSE_IncomingBarred, "Incoming Barred"},
{CAUSE_CallRejected, "Call Rejected"},
{CAUSE_NetworkCongestion, "Network Congestion"},
{CAUSE_RemoteUser, "Remote User initiated"},
{CAUSE_LocalProcErr, "Local Procedure Error"},
{CAUSE_RemoteProcErr, "Remote Procedure Error"},
{CAUSE_RemoteUserSuspend, "Remote User Suspend"},
{CAUSE_RemoteUserResumed, "Remote User Resumed"},
{CAUSE_UserInfoDiscarded, "User Info Discarded"}
};
static int cause_1tr6_len = ARRAY_SIZE(cause_1tr6);
static int
prcause_1tr6(char *dest, u_char * p)
{
char *dp = dest;
int i, cause;
p++;
if (0 == *p) {
dp += sprintf(dp, " OK (cause length=0)\n");
return (dp - dest);
} else if (*p > 1) {
dp += sprintf(dp, " coding ");
dp += prbits(dp, p[2], 7, 2);
dp += sprintf(dp, " location ");
dp += prbits(dp, p[2], 4, 4);
*dp++ = '\n';
}
p++;
cause = 0x7f & *p;
/* locate cause value */
for (i = 0; i < cause_1tr6_len; i++)
if (cause_1tr6[i].nr == cause)
break;
/* display cause value if it exists */
if (i == cause_1tr6_len)
dp += sprintf(dp, "Unknown cause type %x!\n", cause);
else
dp += sprintf(dp, " cause value %x : %s \n", cause, cause_1tr6[i].descr);
return (dp - dest);
}
static int
prchident(char *dest, u_char * p)
{
char *dp = dest;
p += 2;
dp += sprintf(dp, " octet 3 ");
dp += prbits(dp, *p, 8, 8);
*dp++ = '\n';
return (dp - dest);
}
static int
prcalled(char *dest, u_char * p)
{
int l;
char *dp = dest;
p++;
l = *p++ - 1;
dp += sprintf(dp, " octet 3 ");
dp += prbits(dp, *p++, 8, 8);
*dp++ = '\n';
dp += sprintf(dp, " number digits ");
while (l--)
*dp++ = *p++;
*dp++ = '\n';
return (dp - dest);
}
static int
prcalling(char *dest, u_char * p)
{
int l;
char *dp = dest;
p++;
l = *p++ - 1;
dp += sprintf(dp, " octet 3 ");
dp += prbits(dp, *p, 8, 8);
*dp++ = '\n';
if (!(*p & 0x80)) {
dp += sprintf(dp, " octet 3a ");
dp += prbits(dp, *++p, 8, 8);
*dp++ = '\n';
l--;
};
p++;
dp += sprintf(dp, " number digits ");
while (l--)
*dp++ = *p++;
*dp++ = '\n';
return (dp - dest);
}
static
int
prbearer(char *dest, u_char * p)
{
char *dp = dest, ch;
p += 2;
dp += sprintf(dp, " octet 3 ");
dp += prbits(dp, *p++, 8, 8);
*dp++ = '\n';
dp += sprintf(dp, " octet 4 ");
dp += prbits(dp, *p, 8, 8);
*dp++ = '\n';
if ((*p++ & 0x1f) == 0x18) {
dp += sprintf(dp, " octet 4.1 ");
dp += prbits(dp, *p++, 8, 8);
*dp++ = '\n';
}
/* check for user information layer 1 */
if ((*p & 0x60) == 0x20) {
ch = ' ';
do {
dp += sprintf(dp, " octet 5%c ", ch);
dp += prbits(dp, *p, 8, 8);
*dp++ = '\n';
if (ch == ' ')
ch = 'a';
else
ch++;
}
while (!(*p++ & 0x80));
}
/* check for user information layer 2 */
if ((*p & 0x60) == 0x40) {
dp += sprintf(dp, " octet 6 ");
dp += prbits(dp, *p++, 8, 8);
*dp++ = '\n';
}
/* check for user information layer 3 */
if ((*p & 0x60) == 0x60) {
dp += sprintf(dp, " octet 7 ");
dp += prbits(dp, *p++, 8, 8);
*dp++ = '\n';
}
return (dp - dest);
}
static
int
prbearer_ni1(char *dest, u_char * p)
{
char *dp = dest;
u_char len;
p++;
len = *p++;
dp += sprintf(dp, " octet 3 ");
dp += prbits(dp, *p, 8, 8);
switch (*p++) {
case 0x80:
dp += sprintf(dp, " Speech");
break;
case 0x88:
dp += sprintf(dp, " Unrestricted digital information");
break;
case 0x90:
dp += sprintf(dp, " 3.1 kHz audio");
break;
default:
dp += sprintf(dp, " Unknown information-transfer capability");
}
*dp++ = '\n';
dp += sprintf(dp, " octet 4 ");
dp += prbits(dp, *p, 8, 8);
switch (*p++) {
case 0x90:
dp += sprintf(dp, " 64 kbps, circuit mode");
break;
case 0xc0:
dp += sprintf(dp, " Packet mode");
break;
default:
dp += sprintf(dp, " Unknown transfer mode");
}
*dp++ = '\n';
if (len > 2) {
dp += sprintf(dp, " octet 5 ");
dp += prbits(dp, *p, 8, 8);
switch (*p++) {
case 0x21:
dp += sprintf(dp, " Rate adaption\n");
dp += sprintf(dp, " octet 5a ");
dp += prbits(dp, *p, 8, 8);
break;
case 0xa2:
dp += sprintf(dp, " u-law");
break;
default:
dp += sprintf(dp, " Unknown UI layer 1 protocol");
}
*dp++ = '\n';
}
return (dp - dest);
}
static int
general(char *dest, u_char * p)
{
char *dp = dest;
char ch = ' ';
int l, octet = 3;
p++;
l = *p++;
/* Iterate over all octets in the information element */
while (l--) {
dp += sprintf(dp, " octet %d%c ", octet, ch);
dp += prbits(dp, *p++, 8, 8);
*dp++ = '\n';
/* last octet in group? */
if (*p & 0x80) {
octet++;
ch = ' ';
} else if (ch == ' ')
ch = 'a';
else
ch++;
}
return (dp - dest);
}
static int
general_ni1(char *dest, u_char * p)
{
char *dp = dest;
char ch = ' ';
int l, octet = 3;
p++;
l = *p++;
/* Iterate over all octets in the information element */
while (l--) {
dp += sprintf(dp, " octet %d%c ", octet, ch);
dp += prbits(dp, *p, 8, 8);
*dp++ = '\n';
/* last octet in group? */
if (*p++ & 0x80) {
octet++;
ch = ' ';
} else if (ch == ' ')
ch = 'a';
else
ch++;
}
return (dp - dest);
}
static int
prcharge(char *dest, u_char * p)
{
char *dp = dest;
int l;
p++;
l = *p++ - 1;
dp += sprintf(dp, " GEA ");
dp += prbits(dp, *p++, 8, 8);
dp += sprintf(dp, " Anzahl: ");
/* Iterate over all octets in the * information element */
while (l--)
*dp++ = *p++;
*dp++ = '\n';
return (dp - dest);
}
static int
prtext(char *dest, u_char * p)
{
char *dp = dest;
int l;
p++;
l = *p++;
dp += sprintf(dp, " ");
/* Iterate over all octets in the * information element */
while (l--)
*dp++ = *p++;
*dp++ = '\n';
return (dp - dest);
}
static int
prfeatureind(char *dest, u_char * p)
{
char *dp = dest;
p += 2; /* skip id, len */
dp += sprintf(dp, " octet 3 ");
dp += prbits(dp, *p, 8, 8);
*dp++ = '\n';
if (!(*p++ & 80)) {
dp += sprintf(dp, " octet 4 ");
dp += prbits(dp, *p++, 8, 8);
*dp++ = '\n';
}
dp += sprintf(dp, " Status: ");
switch (*p) {
case 0:
dp += sprintf(dp, "Idle");
break;
case 1:
dp += sprintf(dp, "Active");
break;
case 2:
dp += sprintf(dp, "Prompt");
break;
case 3:
dp += sprintf(dp, "Pending");
break;
default:
dp += sprintf(dp, "(Reserved)");
break;
}
*dp++ = '\n';
return (dp - dest);
}
static
struct DTag { /* Display tags */
u_char nr;
char *descr;
} dtaglist[] = {
{ 0x82, "Continuation" },
{ 0x83, "Called address" },
{ 0x84, "Cause" },
{ 0x85, "Progress indicator" },
{ 0x86, "Notification indicator" },
{ 0x87, "Prompt" },
{ 0x88, "Accumlated digits" },
{ 0x89, "Status" },
{ 0x8a, "Inband" },
{ 0x8b, "Calling address" },
{ 0x8c, "Reason" },
{ 0x8d, "Calling party name" },
{ 0x8e, "Called party name" },
{ 0x8f, "Orignal called name" },
{ 0x90, "Redirecting name" },
{ 0x91, "Connected name" },
{ 0x92, "Originating restrictions" },
{ 0x93, "Date & time of day" },
{ 0x94, "Call Appearance ID" },
{ 0x95, "Feature address" },
{ 0x96, "Redirection name" },
{ 0x9e, "Text" },
};
#define DTAGSIZE ARRAY_SIZE(dtaglist)
static int
disptext_ni1(char *dest, u_char * p)
{
char *dp = dest;
int l, tag, len, i;
p++;
l = *p++ - 1;
if (*p++ != 0x80) {
dp += sprintf(dp, " Unknown display type\n");
return (dp - dest);
}
/* Iterate over all tag,length,text fields */
while (l > 0) {
tag = *p++;
len = *p++;
l -= len + 2;
/* Don't space or skip */
if ((tag == 0x80) || (tag == 0x81)) p++;
else {
for (i = 0; i < DTAGSIZE; i++)
if (tag == dtaglist[i].nr)
break;
/* When not found, give appropriate msg */
if (i != DTAGSIZE) {
dp += sprintf(dp, " %s: ", dtaglist[i].descr);
while (len--)
*dp++ = *p++;
} else {
dp += sprintf(dp, " (unknown display tag %2x): ", tag);
while (len--)
*dp++ = *p++;
}
dp += sprintf(dp, "\n");
}
}
return (dp - dest);
}
static int
display(char *dest, u_char * p)
{
char *dp = dest;
char ch = ' ';
int l, octet = 3;
p++;
l = *p++;
/* Iterate over all octets in the * display-information element */
dp += sprintf(dp, " \"");
while (l--) {
dp += sprintf(dp, "%c", *p++);
/* last octet in group? */
if (*p & 0x80) {
octet++;
ch = ' ';
} else if (ch == ' ')
ch = 'a';
else
ch++;
}
*dp++ = '\"';
*dp++ = '\n';
return (dp - dest);
}
static int
prfacility(char *dest, u_char * p)
{
char *dp = dest;
int l, l2;
p++;
l = *p++;
dp += sprintf(dp, " octet 3 ");
dp += prbits(dp, *p++, 8, 8);
dp += sprintf(dp, "\n");
l -= 1;
while (l > 0) {
dp += sprintf(dp, " octet 4 ");
dp += prbits(dp, *p++, 8, 8);
dp += sprintf(dp, "\n");
dp += sprintf(dp, " octet 5 %d\n", l2 = *p++ & 0x7f);
l -= 2;
dp += sprintf(dp, " contents ");
while (l2--) {
dp += sprintf(dp, "%2x ", *p++);
l--;
}
dp += sprintf(dp, "\n");
}
return (dp - dest);
}
static
struct InformationElement {
u_char nr;
char *descr;
int (*f) (char *, u_char *);
} ielist[] = {
{
0x00, "Segmented message", general
},
{
0x04, "Bearer capability", prbearer
},
{
0x08, "Cause", prcause
},
{
0x10, "Call identity", general
},
{
0x14, "Call state", general
},
{
0x18, "Channel identification", prchident
},
{
0x1c, "Facility", prfacility
},
{
0x1e, "Progress indicator", general
},
{
0x20, "Network-specific facilities", general
},
{
0x27, "Notification indicator", general
},
{
0x28, "Display", display
},
{
0x29, "Date/Time", general
},
{
0x2c, "Keypad facility", general
},
{
0x34, "Signal", general
},
{
0x40, "Information rate", general
},
{
0x42, "End-to-end delay", general
},
{
0x43, "Transit delay selection and indication", general
},
{
0x44, "Packet layer binary parameters", general
},
{
0x45, "Packet layer window size", general
},
{
0x46, "Packet size", general
},
{
0x47, "Closed user group", general
},
{
0x4a, "Reverse charge indication", general
},
{
0x6c, "Calling party number", prcalling
},
{
0x6d, "Calling party subaddress", general
},
{
0x70, "Called party number", prcalled
},
{
0x71, "Called party subaddress", general
},
{
0x74, "Redirecting number", general
},
{
0x78, "Transit network selection", general
},
{
0x79, "Restart indicator", general
},
{
0x7c, "Low layer compatibility", general
},
{
0x7d, "High layer compatibility", general
},
{
0x7e, "User-user", general
},
{
0x7f, "Escape for extension", general
},
};
#define IESIZE ARRAY_SIZE(ielist)
static
struct InformationElement ielist_ni1[] = {
{ 0x04, "Bearer Capability", prbearer_ni1 },
{ 0x08, "Cause", prcause },
{ 0x14, "Call State", general_ni1 },
{ 0x18, "Channel Identification", prchident },
{ 0x1e, "Progress Indicator", general_ni1 },
{ 0x27, "Notification Indicator", general_ni1 },
{ 0x2c, "Keypad Facility", prtext },
{ 0x32, "Information Request", general_ni1 },
{ 0x34, "Signal", general_ni1 },
{ 0x38, "Feature Activation", general_ni1 },
{ 0x39, "Feature Indication", prfeatureind },
{ 0x3a, "Service Profile Identification (SPID)", prtext },
{ 0x3b, "Endpoint Identifier", general_ni1 },
{ 0x6c, "Calling Party Number", prcalling },
{ 0x6d, "Calling Party Subaddress", general_ni1 },
{ 0x70, "Called Party Number", prcalled },
{ 0x71, "Called Party Subaddress", general_ni1 },
{ 0x74, "Redirecting Number", general_ni1 },
{ 0x78, "Transit Network Selection", general_ni1 },
{ 0x7c, "Low Layer Compatibility", general_ni1 },
{ 0x7d, "High Layer Compatibility", general_ni1 },
};
#define IESIZE_NI1 ARRAY_SIZE(ielist_ni1)
static
struct InformationElement ielist_ni1_cs5[] = {
{ 0x1d, "Operator system access", general_ni1 },
{ 0x2a, "Display text", disptext_ni1 },
};
#define IESIZE_NI1_CS5 ARRAY_SIZE(ielist_ni1_cs5)
static
struct InformationElement ielist_ni1_cs6[] = {
{ 0x7b, "Call appearance", general_ni1 },
};
#define IESIZE_NI1_CS6 ARRAY_SIZE(ielist_ni1_cs6)
static struct InformationElement we_0[] =
{
{WE0_cause, "Cause", prcause_1tr6},
{WE0_connAddr, "Connecting Address", prcalled},
{WE0_callID, "Call IDentity", general},
{WE0_chanID, "Channel IDentity", general},
{WE0_netSpecFac, "Network Specific Facility", general},
{WE0_display, "Display", general},
{WE0_keypad, "Keypad", general},
{WE0_origAddr, "Origination Address", prcalled},
{WE0_destAddr, "Destination Address", prcalled},
{WE0_userInfo, "User Info", general}
};
#define WE_0_LEN ARRAY_SIZE(we_0)
static struct InformationElement we_6[] =
{
{WE6_serviceInd, "Service Indicator", general},
{WE6_chargingInfo, "Charging Information", prcharge},
{WE6_date, "Date", prtext},
{WE6_facSelect, "Facility Select", general},
{WE6_facStatus, "Facility Status", general},
{WE6_statusCalled, "Status Called", general},
{WE6_addTransAttr, "Additional Transmission Attributes", general}
};
#define WE_6_LEN ARRAY_SIZE(we_6)
int
QuickHex(char *txt, u_char * p, int cnt)
{
register int i;
register char *t = txt;
register u_char w;
for (i = 0; i < cnt; i++) {
*t++ = ' ';
w = (p[i] >> 4) & 0x0f;
if (w < 10)
*t++ = '0' + w;
else
*t++ = 'A' - 10 + w;
w = p[i] & 0x0f;
if (w < 10)
*t++ = '0' + w;
else
*t++ = 'A' - 10 + w;
}
*t++ = 0;
return (t - txt);
}
void
LogFrame(struct IsdnCardState *cs, u_char * buf, int size)
{
char *dp;
if (size < 1)
return;
dp = cs->dlog;
if (size < MAX_DLOG_SPACE / 3 - 10) {
*dp++ = 'H';
*dp++ = 'E';
*dp++ = 'X';
*dp++ = ':';
dp += QuickHex(dp, buf, size);
dp--;
*dp++ = '\n';
*dp = 0;
HiSax_putstatus(cs, NULL, cs->dlog);
} else
HiSax_putstatus(cs, "LogFrame: ", "warning Frame too big (%d)", size);
}
void
dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir)
{
u_char *bend, *buf;
char *dp;
unsigned char pd, cr_l, cr, mt;
unsigned char sapi, tei, ftyp;
int i, cset = 0, cs_old = 0, cs_fest = 0;
int size, finish = 0;
if (skb->len < 3)
return;
/* display header */
dp = cs->dlog;
dp += jiftime(dp, jiffies);
*dp++ = ' ';
sapi = skb->data[0] >> 2;
tei = skb->data[1] >> 1;
ftyp = skb->data[2];
buf = skb->data;
dp += sprintf(dp, "frame %s ", dir ? "network->user" : "user->network");
size = skb->len;
if (tei == GROUP_TEI) {
if (sapi == CTRL_SAPI) { /* sapi 0 */
if (ftyp == 3) {
dp += sprintf(dp, "broadcast\n");
buf += 3;
size -= 3;
} else {
dp += sprintf(dp, "no UI broadcast\n");
finish = 1;
}
} else if (sapi == TEI_SAPI) {
dp += sprintf(dp, "tei management\n");
finish = 1;
} else {
dp += sprintf(dp, "unknown sapi %d broadcast\n", sapi);
finish = 1;
}
} else {
if (sapi == CTRL_SAPI) {
if (!(ftyp & 1)) { /* IFrame */
dp += sprintf(dp, "with tei %d\n", tei);
buf += 4;
size -= 4;
} else {
dp += sprintf(dp, "SFrame with tei %d\n", tei);
finish = 1;
}
} else {
dp += sprintf(dp, "unknown sapi %d tei %d\n", sapi, tei);
finish = 1;
}
}
bend = skb->data + skb->len;
if (buf >= bend) {
dp += sprintf(dp, "frame too short\n");
finish = 1;
}
if (finish) {
*dp = 0;
HiSax_putstatus(cs, NULL, cs->dlog);
return;
}
if ((0xfe & buf[0]) == PROTO_DIS_N0) { /* 1TR6 */
/* locate message type */
pd = *buf++;
cr_l = *buf++;
if (cr_l)
cr = *buf++;
else
cr = 0;
mt = *buf++;
if (pd == PROTO_DIS_N0) { /* N0 */
for (i = 0; i < MT_N0_LEN; i++)
if (mt_n0[i].nr == mt)
break;
/* display message type if it exists */
if (i == MT_N0_LEN)
dp += sprintf(dp, "callref %d %s size %d unknown message type N0 %x!\n",
cr & 0x7f, (cr & 0x80) ? "called" : "caller",
size, mt);
else
dp += sprintf(dp, "callref %d %s size %d message type %s\n",
cr & 0x7f, (cr & 0x80) ? "called" : "caller",
size, mt_n0[i].descr);
} else { /* N1 */
for (i = 0; i < MT_N1_LEN; i++)
if (mt_n1[i].nr == mt)
break;
/* display message type if it exists */
if (i == MT_N1_LEN)
dp += sprintf(dp, "callref %d %s size %d unknown message type N1 %x!\n",
cr & 0x7f, (cr & 0x80) ? "called" : "caller",
size, mt);
else
dp += sprintf(dp, "callref %d %s size %d message type %s\n",
cr & 0x7f, (cr & 0x80) ? "called" : "caller",
size, mt_n1[i].descr);
}
/* display each information element */
while (buf < bend) {
/* Is it a single octet information element? */
if (*buf & 0x80) {
switch ((*buf >> 4) & 7) {
case 1:
dp += sprintf(dp, " Shift %x\n", *buf & 0xf);
cs_old = cset;
cset = *buf & 7;
cs_fest = *buf & 8;
break;
case 3:
dp += sprintf(dp, " Congestion level %x\n", *buf & 0xf);
break;
case 2:
if (*buf == 0xa0) {
dp += sprintf(dp, " More data\n");
break;
}
if (*buf == 0xa1) {
dp += sprintf(dp, " Sending complete\n");
}
break;
/* fall through */
default:
dp += sprintf(dp, " Reserved %x\n", *buf);
break;
}
buf++;
continue;
}
/* No, locate it in the table */
if (cset == 0) {
for (i = 0; i < WE_0_LEN; i++)
if (*buf == we_0[i].nr)
break;
/* When found, give appropriate msg */
if (i != WE_0_LEN) {
dp += sprintf(dp, " %s\n", we_0[i].descr);
dp += we_0[i].f(dp, buf);
} else
dp += sprintf(dp, " Codeset %d attribute %x attribute size %d\n", cset, *buf, buf[1]);
} else if (cset == 6) {
for (i = 0; i < WE_6_LEN; i++)
if (*buf == we_6[i].nr)
break;
/* When found, give appropriate msg */
if (i != WE_6_LEN) {
dp += sprintf(dp, " %s\n", we_6[i].descr);
dp += we_6[i].f(dp, buf);
} else
dp += sprintf(dp, " Codeset %d attribute %x attribute size %d\n", cset, *buf, buf[1]);
} else
dp += sprintf(dp, " Unknown Codeset %d attribute %x attribute size %d\n", cset, *buf, buf[1]);
/* Skip to next element */
if (cs_fest == 8) {
cset = cs_old;
cs_old = 0;
cs_fest = 0;
}
buf += buf[1] + 2;
}
} else if ((buf[0] == 8) && (cs->protocol == ISDN_PTYPE_NI1)) { /* NI-1 */
/* locate message type */
buf++;
cr_l = *buf++;
if (cr_l)
cr = *buf++;
else
cr = 0;
mt = *buf++;
for (i = 0; i < MTSIZE; i++)
if (mtlist[i].nr == mt)
break;
/* display message type if it exists */
if (i == MTSIZE)
dp += sprintf(dp, "callref %d %s size %d unknown message type %x!\n",
cr & 0x7f, (cr & 0x80) ? "called" : "caller",
size, mt);
else
dp += sprintf(dp, "callref %d %s size %d message type %s\n",
cr & 0x7f, (cr & 0x80) ? "called" : "caller",
size, mtlist[i].descr);
/* display each information element */
while (buf < bend) {
/* Is it a single octet information element? */
if (*buf & 0x80) {
switch ((*buf >> 4) & 7) {
case 1:
dp += sprintf(dp, " Shift %x\n", *buf & 0xf);
cs_old = cset;
cset = *buf & 7;
cs_fest = *buf & 8;
break;
default:
dp += sprintf(dp, " Unknown single-octet IE %x\n", *buf);
break;
}
buf++;
continue;
}
/* No, locate it in the table */
if (cset == 0) {
for (i = 0; i < IESIZE_NI1; i++)
if (*buf == ielist_ni1[i].nr)
break;
/* When not found, give appropriate msg */
if (i != IESIZE_NI1) {
dp += sprintf(dp, " %s\n", ielist_ni1[i].descr);
dp += ielist_ni1[i].f(dp, buf);
} else
dp += sprintf(dp, " attribute %x attribute size %d\n", *buf, buf[1]);
} else if (cset == 5) {
for (i = 0; i < IESIZE_NI1_CS5; i++)
if (*buf == ielist_ni1_cs5[i].nr)
break;
/* When not found, give appropriate msg */
if (i != IESIZE_NI1_CS5) {
dp += sprintf(dp, " %s\n", ielist_ni1_cs5[i].descr);
dp += ielist_ni1_cs5[i].f(dp, buf);
} else
dp += sprintf(dp, " attribute %x attribute size %d\n", *buf, buf[1]);
} else if (cset == 6) {
for (i = 0; i < IESIZE_NI1_CS6; i++)
if (*buf == ielist_ni1_cs6[i].nr)
break;
/* When not found, give appropriate msg */
if (i != IESIZE_NI1_CS6) {
dp += sprintf(dp, " %s\n", ielist_ni1_cs6[i].descr);
dp += ielist_ni1_cs6[i].f(dp, buf);
} else
dp += sprintf(dp, " attribute %x attribute size %d\n", *buf, buf[1]);
} else
dp += sprintf(dp, " Unknown Codeset %d attribute %x attribute size %d\n", cset, *buf, buf[1]);
/* Skip to next element */
if (cs_fest == 8) {
cset = cs_old;
cs_old = 0;
cs_fest = 0;
}
buf += buf[1] + 2;
}
} else if ((buf[0] == 8) && (cs->protocol == ISDN_PTYPE_EURO)) { /* EURO */
/* locate message type */
buf++;
cr_l = *buf++;
if (cr_l)
cr = *buf++;
else
cr = 0;
mt = *buf++;
for (i = 0; i < MTSIZE; i++)
if (mtlist[i].nr == mt)
break;
/* display message type if it exists */
if (i == MTSIZE)
dp += sprintf(dp, "callref %d %s size %d unknown message type %x!\n",
cr & 0x7f, (cr & 0x80) ? "called" : "caller",
size, mt);
else
dp += sprintf(dp, "callref %d %s size %d message type %s\n",
cr & 0x7f, (cr & 0x80) ? "called" : "caller",
size, mtlist[i].descr);
/* display each information element */
while (buf < bend) {
/* Is it a single octet information element? */
if (*buf & 0x80) {
switch ((*buf >> 4) & 7) {
case 1:
dp += sprintf(dp, " Shift %x\n", *buf & 0xf);
break;
case 3:
dp += sprintf(dp, " Congestion level %x\n", *buf & 0xf);
break;
case 5:
dp += sprintf(dp, " Repeat indicator %x\n", *buf & 0xf);
break;
case 2:
if (*buf == 0xa0) {
dp += sprintf(dp, " More data\n");
break;
}
if (*buf == 0xa1) {
dp += sprintf(dp, " Sending complete\n");
}
break;
/* fall through */
default:
dp += sprintf(dp, " Reserved %x\n", *buf);
break;
}
buf++;
continue;
}
/* No, locate it in the table */
for (i = 0; i < IESIZE; i++)
if (*buf == ielist[i].nr)
break;
/* When not found, give appropriate msg */
if (i != IESIZE) {
dp += sprintf(dp, " %s\n", ielist[i].descr);
dp += ielist[i].f(dp, buf);
} else
dp += sprintf(dp, " attribute %x attribute size %d\n", *buf, buf[1]);
/* Skip to next element */
buf += buf[1] + 2;
}
} else {
dp += sprintf(dp, "Unknown protocol %x!", buf[0]);
}
*dp = 0;
HiSax_putstatus(cs, NULL, cs->dlog);
}
| gpl-2.0 |
TeamGlide/android_kernel_htc_msm7x30 | arch/x86/platform/uv/tlb_uv.c | 1621 | 49318 | /*
* SGI UltraViolet TLB flush routines.
*
* (c) 2008-2011 Cliff Wickman <cpw@sgi.com>, SGI.
*
* This code is released under the GNU General Public License version 2 or
* later.
*/
#include <linux/seq_file.h>
#include <linux/proc_fs.h>
#include <linux/debugfs.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <asm/mmu_context.h>
#include <asm/uv/uv.h>
#include <asm/uv/uv_mmrs.h>
#include <asm/uv/uv_hub.h>
#include <asm/uv/uv_bau.h>
#include <asm/apic.h>
#include <asm/idle.h>
#include <asm/tsc.h>
#include <asm/irq_vectors.h>
#include <asm/timer.h>
/* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
static int timeout_base_ns[] = {
20,
160,
1280,
10240,
81920,
655360,
5242880,
167772160
};
static int timeout_us;
static int nobau;
static int baudisabled;
static spinlock_t disable_lock;
static cycles_t congested_cycles;
/* tunables: */
static int max_concurr = MAX_BAU_CONCURRENT;
static int max_concurr_const = MAX_BAU_CONCURRENT;
static int plugged_delay = PLUGGED_DELAY;
static int plugsb4reset = PLUGSB4RESET;
static int timeoutsb4reset = TIMEOUTSB4RESET;
static int ipi_reset_limit = IPI_RESET_LIMIT;
static int complete_threshold = COMPLETE_THRESHOLD;
static int congested_respns_us = CONGESTED_RESPONSE_US;
static int congested_reps = CONGESTED_REPS;
static int congested_period = CONGESTED_PERIOD;
static struct tunables tunables[] = {
{&max_concurr, MAX_BAU_CONCURRENT}, /* must be [0] */
{&plugged_delay, PLUGGED_DELAY},
{&plugsb4reset, PLUGSB4RESET},
{&timeoutsb4reset, TIMEOUTSB4RESET},
{&ipi_reset_limit, IPI_RESET_LIMIT},
{&complete_threshold, COMPLETE_THRESHOLD},
{&congested_respns_us, CONGESTED_RESPONSE_US},
{&congested_reps, CONGESTED_REPS},
{&congested_period, CONGESTED_PERIOD}
};
static struct dentry *tunables_dir;
static struct dentry *tunables_file;
/* these correspond to the statistics printed by ptc_seq_show() */
static char *stat_description[] = {
"sent: number of shootdown messages sent",
"stime: time spent sending messages",
"numuvhubs: number of hubs targeted with shootdown",
"numuvhubs16: number times 16 or more hubs targeted",
"numuvhubs8: number times 8 or more hubs targeted",
"numuvhubs4: number times 4 or more hubs targeted",
"numuvhubs2: number times 2 or more hubs targeted",
"numuvhubs1: number times 1 hub targeted",
"numcpus: number of cpus targeted with shootdown",
"dto: number of destination timeouts",
"retries: destination timeout retries sent",
"rok: : destination timeouts successfully retried",
"resetp: ipi-style resource resets for plugs",
"resett: ipi-style resource resets for timeouts",
"giveup: fall-backs to ipi-style shootdowns",
"sto: number of source timeouts",
"bz: number of stay-busy's",
"throt: number times spun in throttle",
"swack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE",
"recv: shootdown messages received",
"rtime: time spent processing messages",
"all: shootdown all-tlb messages",
"one: shootdown one-tlb messages",
"mult: interrupts that found multiple messages",
"none: interrupts that found no messages",
"retry: number of retry messages processed",
"canc: number messages canceled by retries",
"nocan: number retries that found nothing to cancel",
"reset: number of ipi-style reset requests processed",
"rcan: number messages canceled by reset requests",
"disable: number times use of the BAU was disabled",
"enable: number times use of the BAU was re-enabled"
};
static int __init
setup_nobau(char *arg)
{
nobau = 1;
return 0;
}
early_param("nobau", setup_nobau);
/* base pnode in this partition */
static int uv_base_pnode __read_mostly;
static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
static DEFINE_PER_CPU(struct bau_control, bau_control);
static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
/*
* Determine the first node on a uvhub. 'Nodes' are used for kernel
* memory allocation.
*/
static int __init uvhub_to_first_node(int uvhub)
{
int node, b;
for_each_online_node(node) {
b = uv_node_to_blade_id(node);
if (uvhub == b)
return node;
}
return -1;
}
/*
* Determine the apicid of the first cpu on a uvhub.
*/
static int __init uvhub_to_first_apicid(int uvhub)
{
int cpu;
for_each_present_cpu(cpu)
if (uvhub == uv_cpu_to_blade_id(cpu))
return per_cpu(x86_cpu_to_apicid, cpu);
return -1;
}
/*
* Free a software acknowledge hardware resource by clearing its Pending
* bit. This will return a reply to the sender.
* If the message has timed out, a reply has already been sent by the
* hardware but the resource has not been released. In that case our
* clear of the Timeout bit (as well) will free the resource. No reply will
* be sent (the hardware will only do one reply per message).
*/
static void reply_to_message(struct msg_desc *mdp, struct bau_control *bcp)
{
unsigned long dw;
struct bau_pq_entry *msg;
msg = mdp->msg;
if (!msg->canceled) {
dw = (msg->swack_vec << UV_SW_ACK_NPENDING) | msg->swack_vec;
write_mmr_sw_ack(dw);
}
msg->replied_to = 1;
msg->swack_vec = 0;
}
/*
* Process the receipt of a RETRY message
*/
static void bau_process_retry_msg(struct msg_desc *mdp,
struct bau_control *bcp)
{
int i;
int cancel_count = 0;
unsigned long msg_res;
unsigned long mmr = 0;
struct bau_pq_entry *msg = mdp->msg;
struct bau_pq_entry *msg2;
struct ptc_stats *stat = bcp->statp;
stat->d_retries++;
/*
* cancel any message from msg+1 to the retry itself
*/
for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
if (msg2 > mdp->queue_last)
msg2 = mdp->queue_first;
if (msg2 == msg)
break;
/* same conditions for cancellation as do_reset */
if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
(msg2->swack_vec) && ((msg2->swack_vec &
msg->swack_vec) == 0) &&
(msg2->sending_cpu == msg->sending_cpu) &&
(msg2->msg_type != MSG_NOOP)) {
mmr = read_mmr_sw_ack();
msg_res = msg2->swack_vec;
/*
* This is a message retry; clear the resources held
* by the previous message only if they timed out.
* If it has not timed out we have an unexpected
* situation to report.
*/
if (mmr & (msg_res << UV_SW_ACK_NPENDING)) {
unsigned long mr;
/*
* is the resource timed out?
* make everyone ignore the cancelled message.
*/
msg2->canceled = 1;
stat->d_canceled++;
cancel_count++;
mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
write_mmr_sw_ack(mr);
}
}
}
if (!cancel_count)
stat->d_nocanceled++;
}
/*
* Do all the things a cpu should do for a TLB shootdown message.
* Other cpu's may come here at the same time for this message.
*/
static void bau_process_message(struct msg_desc *mdp,
struct bau_control *bcp)
{
short socket_ack_count = 0;
short *sp;
struct atomic_short *asp;
struct ptc_stats *stat = bcp->statp;
struct bau_pq_entry *msg = mdp->msg;
struct bau_control *smaster = bcp->socket_master;
/*
* This must be a normal message, or retry of a normal message
*/
if (msg->address == TLB_FLUSH_ALL) {
local_flush_tlb();
stat->d_alltlb++;
} else {
__flush_tlb_one(msg->address);
stat->d_onetlb++;
}
stat->d_requestee++;
/*
* One cpu on each uvhub has the additional job on a RETRY
* of releasing the resource held by the message that is
* being retried. That message is identified by sending
* cpu number.
*/
if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
bau_process_retry_msg(mdp, bcp);
/*
* This is a swack message, so we have to reply to it.
* Count each responding cpu on the socket. This avoids
* pinging the count's cache line back and forth between
* the sockets.
*/
sp = &smaster->socket_acknowledge_count[mdp->msg_slot];
asp = (struct atomic_short *)sp;
socket_ack_count = atom_asr(1, asp);
if (socket_ack_count == bcp->cpus_in_socket) {
int msg_ack_count;
/*
* Both sockets dump their completed count total into
* the message's count.
*/
smaster->socket_acknowledge_count[mdp->msg_slot] = 0;
asp = (struct atomic_short *)&msg->acknowledge_count;
msg_ack_count = atom_asr(socket_ack_count, asp);
if (msg_ack_count == bcp->cpus_in_uvhub) {
/*
* All cpus in uvhub saw it; reply
*/
reply_to_message(mdp, bcp);
}
}
return;
}
/*
* Determine the first cpu on a uvhub.
*/
static int uvhub_to_first_cpu(int uvhub)
{
int cpu;
for_each_present_cpu(cpu)
if (uvhub == uv_cpu_to_blade_id(cpu))
return cpu;
return -1;
}
/*
* Last resort when we get a large number of destination timeouts is
* to clear resources held by a given cpu.
* Do this with IPI so that all messages in the BAU message queue
* can be identified by their nonzero swack_vec field.
*
* This is entered for a single cpu on the uvhub.
* The sender want's this uvhub to free a specific message's
* swack resources.
*/
static void do_reset(void *ptr)
{
int i;
struct bau_control *bcp = &per_cpu(bau_control, smp_processor_id());
struct reset_args *rap = (struct reset_args *)ptr;
struct bau_pq_entry *msg;
struct ptc_stats *stat = bcp->statp;
stat->d_resets++;
/*
* We're looking for the given sender, and
* will free its swack resource.
* If all cpu's finally responded after the timeout, its
* message 'replied_to' was set.
*/
for (msg = bcp->queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
unsigned long msg_res;
/* do_reset: same conditions for cancellation as
bau_process_retry_msg() */
if ((msg->replied_to == 0) &&
(msg->canceled == 0) &&
(msg->sending_cpu == rap->sender) &&
(msg->swack_vec) &&
(msg->msg_type != MSG_NOOP)) {
unsigned long mmr;
unsigned long mr;
/*
* make everyone else ignore this message
*/
msg->canceled = 1;
/*
* only reset the resource if it is still pending
*/
mmr = read_mmr_sw_ack();
msg_res = msg->swack_vec;
mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
if (mmr & msg_res) {
stat->d_rcanceled++;
write_mmr_sw_ack(mr);
}
}
}
return;
}
/*
* Use IPI to get all target uvhubs to release resources held by
* a given sending cpu number.
*/
static void reset_with_ipi(struct bau_targ_hubmask *distribution, int sender)
{
int uvhub;
int maskbits;
cpumask_t mask;
struct reset_args reset_args;
reset_args.sender = sender;
cpus_clear(mask);
/* find a single cpu for each uvhub in this distribution mask */
maskbits = sizeof(struct bau_targ_hubmask) * BITSPERBYTE;
for (uvhub = 0; uvhub < maskbits; uvhub++) {
int cpu;
if (!bau_uvhub_isset(uvhub, distribution))
continue;
/* find a cpu for this uvhub */
cpu = uvhub_to_first_cpu(uvhub);
cpu_set(cpu, mask);
}
/* IPI all cpus; preemption is already disabled */
smp_call_function_many(&mask, do_reset, (void *)&reset_args, 1);
return;
}
static inline unsigned long cycles_2_us(unsigned long long cyc)
{
unsigned long long ns;
unsigned long us;
int cpu = smp_processor_id();
ns = (cyc * per_cpu(cyc2ns, cpu)) >> CYC2NS_SCALE_FACTOR;
us = ns / 1000;
return us;
}
/*
* wait for all cpus on this hub to finish their sends and go quiet
* leaves uvhub_quiesce set so that no new broadcasts are started by
* bau_flush_send_and_wait()
*/
static inline void quiesce_local_uvhub(struct bau_control *hmaster)
{
atom_asr(1, (struct atomic_short *)&hmaster->uvhub_quiesce);
}
/*
* mark this quiet-requestor as done
*/
static inline void end_uvhub_quiesce(struct bau_control *hmaster)
{
atom_asr(-1, (struct atomic_short *)&hmaster->uvhub_quiesce);
}
static unsigned long uv1_read_status(unsigned long mmr_offset, int right_shift)
{
unsigned long descriptor_status;
descriptor_status = uv_read_local_mmr(mmr_offset);
descriptor_status >>= right_shift;
descriptor_status &= UV_ACT_STATUS_MASK;
return descriptor_status;
}
/*
* Wait for completion of a broadcast software ack message
* return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
*/
static int uv1_wait_completion(struct bau_desc *bau_desc,
unsigned long mmr_offset, int right_shift,
struct bau_control *bcp, long try)
{
unsigned long descriptor_status;
cycles_t ttm;
struct ptc_stats *stat = bcp->statp;
descriptor_status = uv1_read_status(mmr_offset, right_shift);
/* spin on the status MMR, waiting for it to go idle */
while ((descriptor_status != DS_IDLE)) {
/*
* Our software ack messages may be blocked because
* there are no swack resources available. As long
* as none of them has timed out hardware will NACK
* our message and its state will stay IDLE.
*/
if (descriptor_status == DS_SOURCE_TIMEOUT) {
stat->s_stimeout++;
return FLUSH_GIVEUP;
} else if (descriptor_status == DS_DESTINATION_TIMEOUT) {
stat->s_dtimeout++;
ttm = get_cycles();
/*
* Our retries may be blocked by all destination
* swack resources being consumed, and a timeout
* pending. In that case hardware returns the
* ERROR that looks like a destination timeout.
*/
if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
bcp->conseccompletes = 0;
return FLUSH_RETRY_PLUGGED;
}
bcp->conseccompletes = 0;
return FLUSH_RETRY_TIMEOUT;
} else {
/*
* descriptor_status is still BUSY
*/
cpu_relax();
}
descriptor_status = uv1_read_status(mmr_offset, right_shift);
}
bcp->conseccompletes++;
return FLUSH_COMPLETE;
}
/*
* UV2 has an extra bit of status in the ACTIVATION_STATUS_2 register.
*/
static unsigned long uv2_read_status(unsigned long offset, int rshft, int cpu)
{
unsigned long descriptor_status;
unsigned long descriptor_status2;
descriptor_status = ((read_lmmr(offset) >> rshft) & UV_ACT_STATUS_MASK);
descriptor_status2 = (read_mmr_uv2_status() >> cpu) & 0x1UL;
descriptor_status = (descriptor_status << 1) | descriptor_status2;
return descriptor_status;
}
static int uv2_wait_completion(struct bau_desc *bau_desc,
unsigned long mmr_offset, int right_shift,
struct bau_control *bcp, long try)
{
unsigned long descriptor_stat;
cycles_t ttm;
int cpu = bcp->uvhub_cpu;
struct ptc_stats *stat = bcp->statp;
descriptor_stat = uv2_read_status(mmr_offset, right_shift, cpu);
/* spin on the status MMR, waiting for it to go idle */
while (descriptor_stat != UV2H_DESC_IDLE) {
/*
* Our software ack messages may be blocked because
* there are no swack resources available. As long
* as none of them has timed out hardware will NACK
* our message and its state will stay IDLE.
*/
if ((descriptor_stat == UV2H_DESC_SOURCE_TIMEOUT) ||
(descriptor_stat == UV2H_DESC_DEST_STRONG_NACK) ||
(descriptor_stat == UV2H_DESC_DEST_PUT_ERR)) {
stat->s_stimeout++;
return FLUSH_GIVEUP;
} else if (descriptor_stat == UV2H_DESC_DEST_TIMEOUT) {
stat->s_dtimeout++;
ttm = get_cycles();
/*
* Our retries may be blocked by all destination
* swack resources being consumed, and a timeout
* pending. In that case hardware returns the
* ERROR that looks like a destination timeout.
*/
if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
bcp->conseccompletes = 0;
return FLUSH_RETRY_PLUGGED;
}
bcp->conseccompletes = 0;
return FLUSH_RETRY_TIMEOUT;
} else {
/*
* descriptor_stat is still BUSY
*/
cpu_relax();
}
descriptor_stat = uv2_read_status(mmr_offset, right_shift, cpu);
}
bcp->conseccompletes++;
return FLUSH_COMPLETE;
}
/*
* There are 2 status registers; each and array[32] of 2 bits. Set up for
* which register to read and position in that register based on cpu in
* current hub.
*/
static int wait_completion(struct bau_desc *bau_desc,
struct bau_control *bcp, long try)
{
int right_shift;
unsigned long mmr_offset;
int cpu = bcp->uvhub_cpu;
if (cpu < UV_CPUS_PER_AS) {
mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
right_shift = cpu * UV_ACT_STATUS_SIZE;
} else {
mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
right_shift = ((cpu - UV_CPUS_PER_AS) * UV_ACT_STATUS_SIZE);
}
if (is_uv1_hub())
return uv1_wait_completion(bau_desc, mmr_offset, right_shift,
bcp, try);
else
return uv2_wait_completion(bau_desc, mmr_offset, right_shift,
bcp, try);
}
static inline cycles_t sec_2_cycles(unsigned long sec)
{
unsigned long ns;
cycles_t cyc;
ns = sec * 1000000000;
cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
return cyc;
}
/*
* Our retries are blocked by all destination sw ack resources being
* in use, and a timeout is pending. In that case hardware immediately
* returns the ERROR that looks like a destination timeout.
*/
static void destination_plugged(struct bau_desc *bau_desc,
struct bau_control *bcp,
struct bau_control *hmaster, struct ptc_stats *stat)
{
udelay(bcp->plugged_delay);
bcp->plugged_tries++;
if (bcp->plugged_tries >= bcp->plugsb4reset) {
bcp->plugged_tries = 0;
quiesce_local_uvhub(hmaster);
spin_lock(&hmaster->queue_lock);
reset_with_ipi(&bau_desc->distribution, bcp->cpu);
spin_unlock(&hmaster->queue_lock);
end_uvhub_quiesce(hmaster);
bcp->ipi_attempts++;
stat->s_resets_plug++;
}
}
static void destination_timeout(struct bau_desc *bau_desc,
struct bau_control *bcp, struct bau_control *hmaster,
struct ptc_stats *stat)
{
hmaster->max_concurr = 1;
bcp->timeout_tries++;
if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
bcp->timeout_tries = 0;
quiesce_local_uvhub(hmaster);
spin_lock(&hmaster->queue_lock);
reset_with_ipi(&bau_desc->distribution, bcp->cpu);
spin_unlock(&hmaster->queue_lock);
end_uvhub_quiesce(hmaster);
bcp->ipi_attempts++;
stat->s_resets_timeout++;
}
}
/*
* Completions are taking a very long time due to a congested numalink
* network.
*/
static void disable_for_congestion(struct bau_control *bcp,
struct ptc_stats *stat)
{
/* let only one cpu do this disabling */
spin_lock(&disable_lock);
if (!baudisabled && bcp->period_requests &&
((bcp->period_time / bcp->period_requests) > congested_cycles)) {
int tcpu;
struct bau_control *tbcp;
/* it becomes this cpu's job to turn on the use of the
BAU again */
baudisabled = 1;
bcp->set_bau_off = 1;
bcp->set_bau_on_time = get_cycles();
bcp->set_bau_on_time += sec_2_cycles(bcp->cong_period);
stat->s_bau_disabled++;
for_each_present_cpu(tcpu) {
tbcp = &per_cpu(bau_control, tcpu);
tbcp->baudisabled = 1;
}
}
spin_unlock(&disable_lock);
}
static void count_max_concurr(int stat, struct bau_control *bcp,
struct bau_control *hmaster)
{
bcp->plugged_tries = 0;
bcp->timeout_tries = 0;
if (stat != FLUSH_COMPLETE)
return;
if (bcp->conseccompletes <= bcp->complete_threshold)
return;
if (hmaster->max_concurr >= hmaster->max_concurr_const)
return;
hmaster->max_concurr++;
}
static void record_send_stats(cycles_t time1, cycles_t time2,
struct bau_control *bcp, struct ptc_stats *stat,
int completion_status, int try)
{
cycles_t elapsed;
if (time2 > time1) {
elapsed = time2 - time1;
stat->s_time += elapsed;
if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
bcp->period_requests++;
bcp->period_time += elapsed;
if ((elapsed > congested_cycles) &&
(bcp->period_requests > bcp->cong_reps))
disable_for_congestion(bcp, stat);
}
} else
stat->s_requestor--;
if (completion_status == FLUSH_COMPLETE && try > 1)
stat->s_retriesok++;
else if (completion_status == FLUSH_GIVEUP)
stat->s_giveup++;
}
/*
* Because of a uv1 hardware bug only a limited number of concurrent
* requests can be made.
*/
static void uv1_throttle(struct bau_control *hmaster, struct ptc_stats *stat)
{
spinlock_t *lock = &hmaster->uvhub_lock;
atomic_t *v;
v = &hmaster->active_descriptor_count;
if (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr)) {
stat->s_throttles++;
do {
cpu_relax();
} while (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr));
}
}
/*
* Handle the completion status of a message send.
*/
static void handle_cmplt(int completion_status, struct bau_desc *bau_desc,
struct bau_control *bcp, struct bau_control *hmaster,
struct ptc_stats *stat)
{
if (completion_status == FLUSH_RETRY_PLUGGED)
destination_plugged(bau_desc, bcp, hmaster, stat);
else if (completion_status == FLUSH_RETRY_TIMEOUT)
destination_timeout(bau_desc, bcp, hmaster, stat);
}
/*
* Send a broadcast and wait for it to complete.
*
* The flush_mask contains the cpus the broadcast is to be sent to including
* cpus that are on the local uvhub.
*
* Returns 0 if all flushing represented in the mask was done.
* Returns 1 if it gives up entirely and the original cpu mask is to be
* returned to the kernel.
*/
int uv_flush_send_and_wait(struct bau_desc *bau_desc,
struct cpumask *flush_mask, struct bau_control *bcp)
{
int seq_number = 0;
int completion_stat = 0;
long try = 0;
unsigned long index;
cycles_t time1;
cycles_t time2;
struct ptc_stats *stat = bcp->statp;
struct bau_control *hmaster = bcp->uvhub_master;
if (is_uv1_hub())
uv1_throttle(hmaster, stat);
while (hmaster->uvhub_quiesce)
cpu_relax();
time1 = get_cycles();
do {
if (try == 0) {
bau_desc->header.msg_type = MSG_REGULAR;
seq_number = bcp->message_number++;
} else {
bau_desc->header.msg_type = MSG_RETRY;
stat->s_retry_messages++;
}
bau_desc->header.sequence = seq_number;
index = (1UL << AS_PUSH_SHIFT) | bcp->uvhub_cpu;
bcp->send_message = get_cycles();
write_mmr_activation(index);
try++;
completion_stat = wait_completion(bau_desc, bcp, try);
handle_cmplt(completion_stat, bau_desc, bcp, hmaster, stat);
if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
bcp->ipi_attempts = 0;
completion_stat = FLUSH_GIVEUP;
break;
}
cpu_relax();
} while ((completion_stat == FLUSH_RETRY_PLUGGED) ||
(completion_stat == FLUSH_RETRY_TIMEOUT));
time2 = get_cycles();
count_max_concurr(completion_stat, bcp, hmaster);
while (hmaster->uvhub_quiesce)
cpu_relax();
atomic_dec(&hmaster->active_descriptor_count);
record_send_stats(time1, time2, bcp, stat, completion_stat, try);
if (completion_stat == FLUSH_GIVEUP)
return 1;
return 0;
}
/*
* The BAU is disabled. When the disabled time period has expired, the cpu
* that disabled it must re-enable it.
* Return 0 if it is re-enabled for all cpus.
*/
static int check_enable(struct bau_control *bcp, struct ptc_stats *stat)
{
int tcpu;
struct bau_control *tbcp;
if (bcp->set_bau_off) {
if (get_cycles() >= bcp->set_bau_on_time) {
stat->s_bau_reenabled++;
baudisabled = 0;
for_each_present_cpu(tcpu) {
tbcp = &per_cpu(bau_control, tcpu);
tbcp->baudisabled = 0;
tbcp->period_requests = 0;
tbcp->period_time = 0;
}
return 0;
}
}
return -1;
}
static void record_send_statistics(struct ptc_stats *stat, int locals, int hubs,
int remotes, struct bau_desc *bau_desc)
{
stat->s_requestor++;
stat->s_ntargcpu += remotes + locals;
stat->s_ntargremotes += remotes;
stat->s_ntarglocals += locals;
/* uvhub statistics */
hubs = bau_uvhub_weight(&bau_desc->distribution);
if (locals) {
stat->s_ntarglocaluvhub++;
stat->s_ntargremoteuvhub += (hubs - 1);
} else
stat->s_ntargremoteuvhub += hubs;
stat->s_ntarguvhub += hubs;
if (hubs >= 16)
stat->s_ntarguvhub16++;
else if (hubs >= 8)
stat->s_ntarguvhub8++;
else if (hubs >= 4)
stat->s_ntarguvhub4++;
else if (hubs >= 2)
stat->s_ntarguvhub2++;
else
stat->s_ntarguvhub1++;
}
/*
* Translate a cpu mask to the uvhub distribution mask in the BAU
* activation descriptor.
*/
static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,
struct bau_desc *bau_desc, int *localsp, int *remotesp)
{
int cpu;
int pnode;
int cnt = 0;
struct hub_and_pnode *hpp;
for_each_cpu(cpu, flush_mask) {
/*
* The distribution vector is a bit map of pnodes, relative
* to the partition base pnode (and the partition base nasid
* in the header).
* Translate cpu to pnode and hub using a local memory array.
*/
hpp = &bcp->socket_master->thp[cpu];
pnode = hpp->pnode - bcp->partition_base_pnode;
bau_uvhub_set(pnode, &bau_desc->distribution);
cnt++;
if (hpp->uvhub == bcp->uvhub)
(*localsp)++;
else
(*remotesp)++;
}
if (!cnt)
return 1;
return 0;
}
/*
* globally purge translation cache of a virtual address or all TLB's
* @cpumask: mask of all cpu's in which the address is to be removed
* @mm: mm_struct containing virtual address range
* @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu)
* @cpu: the current cpu
*
* This is the entry point for initiating any UV global TLB shootdown.
*
* Purges the translation caches of all specified processors of the given
* virtual address, or purges all TLB's on specified processors.
*
* The caller has derived the cpumask from the mm_struct. This function
* is called only if there are bits set in the mask. (e.g. flush_tlb_page())
*
* The cpumask is converted into a uvhubmask of the uvhubs containing
* those cpus.
*
* Note that this function should be called with preemption disabled.
*
* Returns NULL if all remote flushing was done.
* Returns pointer to cpumask if some remote flushing remains to be
* done. The returned pointer is valid till preemption is re-enabled.
*/
const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
struct mm_struct *mm, unsigned long va,
unsigned int cpu)
{
int locals = 0;
int remotes = 0;
int hubs = 0;
struct bau_desc *bau_desc;
struct cpumask *flush_mask;
struct ptc_stats *stat;
struct bau_control *bcp;
/* kernel was booted 'nobau' */
if (nobau)
return cpumask;
bcp = &per_cpu(bau_control, cpu);
stat = bcp->statp;
/* bau was disabled due to slow response */
if (bcp->baudisabled) {
if (check_enable(bcp, stat))
return cpumask;
}
/*
* Each sending cpu has a per-cpu mask which it fills from the caller's
* cpu mask. All cpus are converted to uvhubs and copied to the
* activation descriptor.
*/
flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
/* don't actually do a shootdown of the local cpu */
cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
if (cpu_isset(cpu, *cpumask))
stat->s_ntargself++;
bau_desc = bcp->descriptor_base;
bau_desc += ITEMS_PER_DESC * bcp->uvhub_cpu;
bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
if (set_distrib_bits(flush_mask, bcp, bau_desc, &locals, &remotes))
return NULL;
record_send_statistics(stat, locals, hubs, remotes, bau_desc);
bau_desc->payload.address = va;
bau_desc->payload.sending_cpu = cpu;
/*
* uv_flush_send_and_wait returns 0 if all cpu's were messaged,
* or 1 if it gave up and the original cpumask should be returned.
*/
if (!uv_flush_send_and_wait(bau_desc, flush_mask, bcp))
return NULL;
else
return cpumask;
}
/*
* The BAU message interrupt comes here. (registered by set_intr_gate)
* See entry_64.S
*
* We received a broadcast assist message.
*
* Interrupts are disabled; this interrupt could represent
* the receipt of several messages.
*
* All cores/threads on this hub get this interrupt.
* The last one to see it does the software ack.
* (the resource will not be freed until noninterruptable cpus see this
* interrupt; hardware may timeout the s/w ack and reply ERROR)
*/
void uv_bau_message_interrupt(struct pt_regs *regs)
{
int count = 0;
cycles_t time_start;
struct bau_pq_entry *msg;
struct bau_control *bcp;
struct ptc_stats *stat;
struct msg_desc msgdesc;
time_start = get_cycles();
bcp = &per_cpu(bau_control, smp_processor_id());
stat = bcp->statp;
msgdesc.queue_first = bcp->queue_first;
msgdesc.queue_last = bcp->queue_last;
msg = bcp->bau_msg_head;
while (msg->swack_vec) {
count++;
msgdesc.msg_slot = msg - msgdesc.queue_first;
msgdesc.swack_slot = ffs(msg->swack_vec) - 1;
msgdesc.msg = msg;
bau_process_message(&msgdesc, bcp);
msg++;
if (msg > msgdesc.queue_last)
msg = msgdesc.queue_first;
bcp->bau_msg_head = msg;
}
stat->d_time += (get_cycles() - time_start);
if (!count)
stat->d_nomsg++;
else if (count > 1)
stat->d_multmsg++;
ack_APIC_irq();
}
/*
* Each target uvhub (i.e. a uvhub that has cpu's) needs to have
* shootdown message timeouts enabled. The timeout does not cause
* an interrupt, but causes an error message to be returned to
* the sender.
*/
static void __init enable_timeouts(void)
{
int uvhub;
int nuvhubs;
int pnode;
unsigned long mmr_image;
nuvhubs = uv_num_possible_blades();
for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
if (!uv_blade_nr_possible_cpus(uvhub))
continue;
pnode = uv_blade_to_pnode(uvhub);
mmr_image = read_mmr_misc_control(pnode);
/*
* Set the timeout period and then lock it in, in three
* steps; captures and locks in the period.
*
* To program the period, the SOFT_ACK_MODE must be off.
*/
mmr_image &= ~(1L << SOFTACK_MSHIFT);
write_mmr_misc_control(pnode, mmr_image);
/*
* Set the 4-bit period.
*/
mmr_image &= ~((unsigned long)0xf << SOFTACK_PSHIFT);
mmr_image |= (SOFTACK_TIMEOUT_PERIOD << SOFTACK_PSHIFT);
write_mmr_misc_control(pnode, mmr_image);
/*
* UV1:
* Subsequent reversals of the timebase bit (3) cause an
* immediate timeout of one or all INTD resources as
* indicated in bits 2:0 (7 causes all of them to timeout).
*/
mmr_image |= (1L << SOFTACK_MSHIFT);
if (is_uv2_hub()) {
mmr_image |= (1L << UV2_LEG_SHFT);
mmr_image |= (1L << UV2_EXT_SHFT);
}
write_mmr_misc_control(pnode, mmr_image);
}
}
static void *ptc_seq_start(struct seq_file *file, loff_t *offset)
{
if (*offset < num_possible_cpus())
return offset;
return NULL;
}
static void *ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
{
(*offset)++;
if (*offset < num_possible_cpus())
return offset;
return NULL;
}
static void ptc_seq_stop(struct seq_file *file, void *data)
{
}
static inline unsigned long long usec_2_cycles(unsigned long microsec)
{
unsigned long ns;
unsigned long long cyc;
ns = microsec * 1000;
cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
return cyc;
}
/*
* Display the statistics thru /proc/sgi_uv/ptc_statistics
* 'data' points to the cpu number
* Note: see the descriptions in stat_description[].
*/
static int ptc_seq_show(struct seq_file *file, void *data)
{
struct ptc_stats *stat;
int cpu;
cpu = *(loff_t *)data;
if (!cpu) {
seq_printf(file,
"# cpu sent stime self locals remotes ncpus localhub ");
seq_printf(file,
"remotehub numuvhubs numuvhubs16 numuvhubs8 ");
seq_printf(file,
"numuvhubs4 numuvhubs2 numuvhubs1 dto retries rok ");
seq_printf(file,
"resetp resett giveup sto bz throt swack recv rtime ");
seq_printf(file,
"all one mult none retry canc nocan reset rcan ");
seq_printf(file,
"disable enable\n");
}
if (cpu < num_possible_cpus() && cpu_online(cpu)) {
stat = &per_cpu(ptcstats, cpu);
/* source side statistics */
seq_printf(file,
"cpu %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
cpu, stat->s_requestor, cycles_2_us(stat->s_time),
stat->s_ntargself, stat->s_ntarglocals,
stat->s_ntargremotes, stat->s_ntargcpu,
stat->s_ntarglocaluvhub, stat->s_ntargremoteuvhub,
stat->s_ntarguvhub, stat->s_ntarguvhub16);
seq_printf(file, "%ld %ld %ld %ld %ld ",
stat->s_ntarguvhub8, stat->s_ntarguvhub4,
stat->s_ntarguvhub2, stat->s_ntarguvhub1,
stat->s_dtimeout);
seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
stat->s_retry_messages, stat->s_retriesok,
stat->s_resets_plug, stat->s_resets_timeout,
stat->s_giveup, stat->s_stimeout,
stat->s_busy, stat->s_throttles);
/* destination side statistics */
seq_printf(file,
"%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
read_gmmr_sw_ack(uv_cpu_to_pnode(cpu)),
stat->d_requestee, cycles_2_us(stat->d_time),
stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
stat->d_nomsg, stat->d_retries, stat->d_canceled,
stat->d_nocanceled, stat->d_resets,
stat->d_rcanceled);
seq_printf(file, "%ld %ld\n",
stat->s_bau_disabled, stat->s_bau_reenabled);
}
return 0;
}
/*
* Display the tunables thru debugfs
*/
static ssize_t tunables_read(struct file *file, char __user *userbuf,
size_t count, loff_t *ppos)
{
char *buf;
int ret;
buf = kasprintf(GFP_KERNEL, "%s %s %s\n%d %d %d %d %d %d %d %d %d\n",
"max_concur plugged_delay plugsb4reset",
"timeoutsb4reset ipi_reset_limit complete_threshold",
"congested_response_us congested_reps congested_period",
max_concurr, plugged_delay, plugsb4reset,
timeoutsb4reset, ipi_reset_limit, complete_threshold,
congested_respns_us, congested_reps, congested_period);
if (!buf)
return -ENOMEM;
ret = simple_read_from_buffer(userbuf, count, ppos, buf, strlen(buf));
kfree(buf);
return ret;
}
/*
* handle a write to /proc/sgi_uv/ptc_statistics
* -1: reset the statistics
* 0: display meaning of the statistics
*/
static ssize_t ptc_proc_write(struct file *file, const char __user *user,
size_t count, loff_t *data)
{
int cpu;
int i;
int elements;
long input_arg;
char optstr[64];
struct ptc_stats *stat;
if (count == 0 || count > sizeof(optstr))
return -EINVAL;
if (copy_from_user(optstr, user, count))
return -EFAULT;
optstr[count - 1] = '\0';
if (strict_strtol(optstr, 10, &input_arg) < 0) {
printk(KERN_DEBUG "%s is invalid\n", optstr);
return -EINVAL;
}
if (input_arg == 0) {
elements = sizeof(stat_description)/sizeof(*stat_description);
printk(KERN_DEBUG "# cpu: cpu number\n");
printk(KERN_DEBUG "Sender statistics:\n");
for (i = 0; i < elements; i++)
printk(KERN_DEBUG "%s\n", stat_description[i]);
} else if (input_arg == -1) {
for_each_present_cpu(cpu) {
stat = &per_cpu(ptcstats, cpu);
memset(stat, 0, sizeof(struct ptc_stats));
}
}
return count;
}
static int local_atoi(const char *name)
{
int val = 0;
for (;; name++) {
switch (*name) {
case '0' ... '9':
val = 10*val+(*name-'0');
break;
default:
return val;
}
}
}
/*
* Parse the values written to /sys/kernel/debug/sgi_uv/bau_tunables.
* Zero values reset them to defaults.
*/
static int parse_tunables_write(struct bau_control *bcp, char *instr,
int count)
{
char *p;
char *q;
int cnt = 0;
int val;
int e = sizeof(tunables) / sizeof(*tunables);
p = instr + strspn(instr, WHITESPACE);
q = p;
for (; *p; p = q + strspn(q, WHITESPACE)) {
q = p + strcspn(p, WHITESPACE);
cnt++;
if (q == p)
break;
}
if (cnt != e) {
printk(KERN_INFO "bau tunable error: should be %d values\n", e);
return -EINVAL;
}
p = instr + strspn(instr, WHITESPACE);
q = p;
for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
q = p + strcspn(p, WHITESPACE);
val = local_atoi(p);
switch (cnt) {
case 0:
if (val == 0) {
max_concurr = MAX_BAU_CONCURRENT;
max_concurr_const = MAX_BAU_CONCURRENT;
continue;
}
if (val < 1 || val > bcp->cpus_in_uvhub) {
printk(KERN_DEBUG
"Error: BAU max concurrent %d is invalid\n",
val);
return -EINVAL;
}
max_concurr = val;
max_concurr_const = val;
continue;
default:
if (val == 0)
*tunables[cnt].tunp = tunables[cnt].deflt;
else
*tunables[cnt].tunp = val;
continue;
}
if (q == p)
break;
}
return 0;
}
/*
* Handle a write to debugfs. (/sys/kernel/debug/sgi_uv/bau_tunables)
*/
static ssize_t tunables_write(struct file *file, const char __user *user,
size_t count, loff_t *data)
{
int cpu;
int ret;
char instr[100];
struct bau_control *bcp;
if (count == 0 || count > sizeof(instr)-1)
return -EINVAL;
if (copy_from_user(instr, user, count))
return -EFAULT;
instr[count] = '\0';
bcp = &per_cpu(bau_control, smp_processor_id());
ret = parse_tunables_write(bcp, instr, count);
if (ret)
return ret;
for_each_present_cpu(cpu) {
bcp = &per_cpu(bau_control, cpu);
bcp->max_concurr = max_concurr;
bcp->max_concurr_const = max_concurr;
bcp->plugged_delay = plugged_delay;
bcp->plugsb4reset = plugsb4reset;
bcp->timeoutsb4reset = timeoutsb4reset;
bcp->ipi_reset_limit = ipi_reset_limit;
bcp->complete_threshold = complete_threshold;
bcp->cong_response_us = congested_respns_us;
bcp->cong_reps = congested_reps;
bcp->cong_period = congested_period;
}
return count;
}
static const struct seq_operations uv_ptc_seq_ops = {
.start = ptc_seq_start,
.next = ptc_seq_next,
.stop = ptc_seq_stop,
.show = ptc_seq_show
};
static int ptc_proc_open(struct inode *inode, struct file *file)
{
return seq_open(file, &uv_ptc_seq_ops);
}
static int tunables_open(struct inode *inode, struct file *file)
{
return 0;
}
static const struct file_operations proc_uv_ptc_operations = {
.open = ptc_proc_open,
.read = seq_read,
.write = ptc_proc_write,
.llseek = seq_lseek,
.release = seq_release,
};
static const struct file_operations tunables_fops = {
.open = tunables_open,
.read = tunables_read,
.write = tunables_write,
.llseek = default_llseek,
};
static int __init uv_ptc_init(void)
{
struct proc_dir_entry *proc_uv_ptc;
if (!is_uv_system())
return 0;
proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
&proc_uv_ptc_operations);
if (!proc_uv_ptc) {
printk(KERN_ERR "unable to create %s proc entry\n",
UV_PTC_BASENAME);
return -EINVAL;
}
tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
if (!tunables_dir) {
printk(KERN_ERR "unable to create debugfs directory %s\n",
UV_BAU_TUNABLES_DIR);
return -EINVAL;
}
tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
tunables_dir, NULL, &tunables_fops);
if (!tunables_file) {
printk(KERN_ERR "unable to create debugfs file %s\n",
UV_BAU_TUNABLES_FILE);
return -EINVAL;
}
return 0;
}
/*
* Initialize the sending side's sending buffers.
*/
static void activation_descriptor_init(int node, int pnode, int base_pnode)
{
int i;
int cpu;
unsigned long gpa;
unsigned long m;
unsigned long n;
size_t dsize;
struct bau_desc *bau_desc;
struct bau_desc *bd2;
struct bau_control *bcp;
/*
* each bau_desc is 64 bytes; there are 8 (ITEMS_PER_DESC)
* per cpu; and one per cpu on the uvhub (ADP_SZ)
*/
dsize = sizeof(struct bau_desc) * ADP_SZ * ITEMS_PER_DESC;
bau_desc = kmalloc_node(dsize, GFP_KERNEL, node);
BUG_ON(!bau_desc);
gpa = uv_gpa(bau_desc);
n = uv_gpa_to_gnode(gpa);
m = uv_gpa_to_offset(gpa);
/* the 14-bit pnode */
write_mmr_descriptor_base(pnode, (n << UV_DESC_PSHIFT | m));
/*
* Initializing all 8 (ITEMS_PER_DESC) descriptors for each
* cpu even though we only use the first one; one descriptor can
* describe a broadcast to 256 uv hubs.
*/
for (i = 0, bd2 = bau_desc; i < (ADP_SZ * ITEMS_PER_DESC); i++, bd2++) {
memset(bd2, 0, sizeof(struct bau_desc));
bd2->header.swack_flag = 1;
/*
* The base_dest_nasid set in the message header is the nasid
* of the first uvhub in the partition. The bit map will
* indicate destination pnode numbers relative to that base.
* They may not be consecutive if nasid striding is being used.
*/
bd2->header.base_dest_nasid = UV_PNODE_TO_NASID(base_pnode);
bd2->header.dest_subnodeid = UV_LB_SUBNODEID;
bd2->header.command = UV_NET_ENDPOINT_INTD;
bd2->header.int_both = 1;
/*
* all others need to be set to zero:
* fairness chaining multilevel count replied_to
*/
}
for_each_present_cpu(cpu) {
if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
continue;
bcp = &per_cpu(bau_control, cpu);
bcp->descriptor_base = bau_desc;
}
}
/*
* initialize the destination side's receiving buffers
* entered for each uvhub in the partition
* - node is first node (kernel memory notion) on the uvhub
* - pnode is the uvhub's physical identifier
*/
static void pq_init(int node, int pnode)
{
int cpu;
size_t plsize;
char *cp;
void *vp;
unsigned long pn;
unsigned long first;
unsigned long pn_first;
unsigned long last;
struct bau_pq_entry *pqp;
struct bau_control *bcp;
plsize = (DEST_Q_SIZE + 1) * sizeof(struct bau_pq_entry);
vp = kmalloc_node(plsize, GFP_KERNEL, node);
pqp = (struct bau_pq_entry *)vp;
BUG_ON(!pqp);
cp = (char *)pqp + 31;
pqp = (struct bau_pq_entry *)(((unsigned long)cp >> 5) << 5);
for_each_present_cpu(cpu) {
if (pnode != uv_cpu_to_pnode(cpu))
continue;
/* for every cpu on this pnode: */
bcp = &per_cpu(bau_control, cpu);
bcp->queue_first = pqp;
bcp->bau_msg_head = pqp;
bcp->queue_last = pqp + (DEST_Q_SIZE - 1);
}
/*
* need the gnode of where the memory was really allocated
*/
pn = uv_gpa_to_gnode(uv_gpa(pqp));
first = uv_physnodeaddr(pqp);
pn_first = ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) | first;
last = uv_physnodeaddr(pqp + (DEST_Q_SIZE - 1));
write_mmr_payload_first(pnode, pn_first);
write_mmr_payload_tail(pnode, first);
write_mmr_payload_last(pnode, last);
/* in effect, all msg_type's are set to MSG_NOOP */
memset(pqp, 0, sizeof(struct bau_pq_entry) * DEST_Q_SIZE);
}
/*
* Initialization of each UV hub's structures
*/
static void __init init_uvhub(int uvhub, int vector, int base_pnode)
{
int node;
int pnode;
unsigned long apicid;
node = uvhub_to_first_node(uvhub);
pnode = uv_blade_to_pnode(uvhub);
activation_descriptor_init(node, pnode, base_pnode);
pq_init(node, pnode);
/*
* The below initialization can't be in firmware because the
* messaging IRQ will be determined by the OS.
*/
apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits;
write_mmr_data_config(pnode, ((apicid << 32) | vector));
}
/*
* We will set BAU_MISC_CONTROL with a timeout period.
* But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
* So the destination timeout period has to be calculated from them.
*/
static int calculate_destination_timeout(void)
{
unsigned long mmr_image;
int mult1;
int mult2;
int index;
int base;
int ret;
unsigned long ts_ns;
if (is_uv1_hub()) {
mult1 = SOFTACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
base = timeout_base_ns[index];
ts_ns = base * mult1 * mult2;
ret = ts_ns / 1000;
} else {
/* 4 bits 0/1 for 10/80us base, 3 bits of multiplier */
mmr_image = uv_read_local_mmr(UVH_LB_BAU_MISC_CONTROL);
mmr_image = (mmr_image & UV_SA_MASK) >> UV_SA_SHFT;
if (mmr_image & (1L << UV2_ACK_UNITS_SHFT))
base = 80;
else
base = 10;
mult1 = mmr_image & UV2_ACK_MASK;
ret = mult1 * base;
}
return ret;
}
static void __init init_per_cpu_tunables(void)
{
int cpu;
struct bau_control *bcp;
for_each_present_cpu(cpu) {
bcp = &per_cpu(bau_control, cpu);
bcp->baudisabled = 0;
bcp->statp = &per_cpu(ptcstats, cpu);
/* time interval to catch a hardware stay-busy bug */
bcp->timeout_interval = usec_2_cycles(2*timeout_us);
bcp->max_concurr = max_concurr;
bcp->max_concurr_const = max_concurr;
bcp->plugged_delay = plugged_delay;
bcp->plugsb4reset = plugsb4reset;
bcp->timeoutsb4reset = timeoutsb4reset;
bcp->ipi_reset_limit = ipi_reset_limit;
bcp->complete_threshold = complete_threshold;
bcp->cong_response_us = congested_respns_us;
bcp->cong_reps = congested_reps;
bcp->cong_period = congested_period;
}
}
/*
* Scan all cpus to collect blade and socket summaries.
*/
static int __init get_cpu_topology(int base_pnode,
struct uvhub_desc *uvhub_descs,
unsigned char *uvhub_mask)
{
int cpu;
int pnode;
int uvhub;
int socket;
struct bau_control *bcp;
struct uvhub_desc *bdp;
struct socket_desc *sdp;
for_each_present_cpu(cpu) {
bcp = &per_cpu(bau_control, cpu);
memset(bcp, 0, sizeof(struct bau_control));
pnode = uv_cpu_hub_info(cpu)->pnode;
if ((pnode - base_pnode) >= UV_DISTRIBUTION_SIZE) {
printk(KERN_EMERG
"cpu %d pnode %d-%d beyond %d; BAU disabled\n",
cpu, pnode, base_pnode, UV_DISTRIBUTION_SIZE);
return 1;
}
bcp->osnode = cpu_to_node(cpu);
bcp->partition_base_pnode = base_pnode;
uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
*(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8));
bdp = &uvhub_descs[uvhub];
bdp->num_cpus++;
bdp->uvhub = uvhub;
bdp->pnode = pnode;
/* kludge: 'assuming' one node per socket, and assuming that
disabling a socket just leaves a gap in node numbers */
socket = bcp->osnode & 1;
bdp->socket_mask |= (1 << socket);
sdp = &bdp->socket[socket];
sdp->cpu_number[sdp->num_cpus] = cpu;
sdp->num_cpus++;
if (sdp->num_cpus > MAX_CPUS_PER_SOCKET) {
printk(KERN_EMERG "%d cpus per socket invalid\n",
sdp->num_cpus);
return 1;
}
}
return 0;
}
/*
* Each socket is to get a local array of pnodes/hubs.
*/
static void make_per_cpu_thp(struct bau_control *smaster)
{
int cpu;
size_t hpsz = sizeof(struct hub_and_pnode) * num_possible_cpus();
smaster->thp = kmalloc_node(hpsz, GFP_KERNEL, smaster->osnode);
memset(smaster->thp, 0, hpsz);
for_each_present_cpu(cpu) {
smaster->thp[cpu].pnode = uv_cpu_hub_info(cpu)->pnode;
smaster->thp[cpu].uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
}
}
/*
* Initialize all the per_cpu information for the cpu's on a given socket,
* given what has been gathered into the socket_desc struct.
* And reports the chosen hub and socket masters back to the caller.
*/
static int scan_sock(struct socket_desc *sdp, struct uvhub_desc *bdp,
struct bau_control **smasterp,
struct bau_control **hmasterp)
{
int i;
int cpu;
struct bau_control *bcp;
for (i = 0; i < sdp->num_cpus; i++) {
cpu = sdp->cpu_number[i];
bcp = &per_cpu(bau_control, cpu);
bcp->cpu = cpu;
if (i == 0) {
*smasterp = bcp;
if (!(*hmasterp))
*hmasterp = bcp;
}
bcp->cpus_in_uvhub = bdp->num_cpus;
bcp->cpus_in_socket = sdp->num_cpus;
bcp->socket_master = *smasterp;
bcp->uvhub = bdp->uvhub;
bcp->uvhub_master = *hmasterp;
bcp->uvhub_cpu = uv_cpu_hub_info(cpu)->blade_processor_id;
if (bcp->uvhub_cpu >= MAX_CPUS_PER_UVHUB) {
printk(KERN_EMERG "%d cpus per uvhub invalid\n",
bcp->uvhub_cpu);
return 1;
}
}
return 0;
}
/*
* Summarize the blade and socket topology into the per_cpu structures.
*/
static int __init summarize_uvhub_sockets(int nuvhubs,
struct uvhub_desc *uvhub_descs,
unsigned char *uvhub_mask)
{
int socket;
int uvhub;
unsigned short socket_mask;
for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
struct uvhub_desc *bdp;
struct bau_control *smaster = NULL;
struct bau_control *hmaster = NULL;
if (!(*(uvhub_mask + (uvhub/8)) & (1 << (uvhub%8))))
continue;
bdp = &uvhub_descs[uvhub];
socket_mask = bdp->socket_mask;
socket = 0;
while (socket_mask) {
struct socket_desc *sdp;
if ((socket_mask & 1)) {
sdp = &bdp->socket[socket];
if (scan_sock(sdp, bdp, &smaster, &hmaster))
return 1;
}
socket++;
socket_mask = (socket_mask >> 1);
make_per_cpu_thp(smaster);
}
}
return 0;
}
/*
* initialize the bau_control structure for each cpu
*/
static int __init init_per_cpu(int nuvhubs, int base_part_pnode)
{
unsigned char *uvhub_mask;
void *vp;
struct uvhub_desc *uvhub_descs;
timeout_us = calculate_destination_timeout();
vp = kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
uvhub_descs = (struct uvhub_desc *)vp;
memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
if (get_cpu_topology(base_part_pnode, uvhub_descs, uvhub_mask))
return 1;
if (summarize_uvhub_sockets(nuvhubs, uvhub_descs, uvhub_mask))
return 1;
kfree(uvhub_descs);
kfree(uvhub_mask);
init_per_cpu_tunables();
return 0;
}
/*
* Initialization of BAU-related structures
*/
static int __init uv_bau_init(void)
{
int uvhub;
int pnode;
int nuvhubs;
int cur_cpu;
int cpus;
int vector;
cpumask_var_t *mask;
if (!is_uv_system())
return 0;
if (nobau)
return 0;
for_each_possible_cpu(cur_cpu) {
mask = &per_cpu(uv_flush_tlb_mask, cur_cpu);
zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_node(cur_cpu));
}
nuvhubs = uv_num_possible_blades();
spin_lock_init(&disable_lock);
congested_cycles = usec_2_cycles(congested_respns_us);
uv_base_pnode = 0x7fffffff;
for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
cpus = uv_blade_nr_possible_cpus(uvhub);
if (cpus && (uv_blade_to_pnode(uvhub) < uv_base_pnode))
uv_base_pnode = uv_blade_to_pnode(uvhub);
}
enable_timeouts();
if (init_per_cpu(nuvhubs, uv_base_pnode)) {
nobau = 1;
return 0;
}
vector = UV_BAU_MESSAGE;
for_each_possible_blade(uvhub)
if (uv_blade_nr_possible_cpus(uvhub))
init_uvhub(uvhub, vector, uv_base_pnode);
alloc_intr_gate(vector, uv_bau_message_intr1);
for_each_possible_blade(uvhub) {
if (uv_blade_nr_possible_cpus(uvhub)) {
unsigned long val;
unsigned long mmr;
pnode = uv_blade_to_pnode(uvhub);
/* INIT the bau */
val = 1L << 63;
write_gmmr_activation(pnode, val);
mmr = 1; /* should be 1 to broadcast to both sockets */
write_mmr_data_broadcast(pnode, mmr);
}
}
return 0;
}
core_initcall(uv_bau_init);
fs_initcall(uv_ptc_init);
| gpl-2.0 |
ribalda/linux-old | fs/compat_binfmt_elf.c | 2389 | 3807 | /*
* 32-bit compatibility support for ELF format executables and core dumps.
*
* Copyright (C) 2007 Red Hat, Inc. All rights reserved.
*
* This copyrighted material is made available to anyone wishing to use,
* modify, copy, or redistribute it subject to the terms and conditions
* of the GNU General Public License v.2.
*
* Red Hat Author: Roland McGrath.
*
* This file is used in a 64-bit kernel that wants to support 32-bit ELF.
* asm/elf.h is responsible for defining the compat_* and COMPAT_* macros
* used below, with definitions appropriate for 32-bit ABI compatibility.
*
* We use macros to rename the ABI types and machine-dependent
* functions used in binfmt_elf.c to compat versions.
*/
#include <linux/elfcore-compat.h>
#include <linux/time.h>
/*
* Rename the basic ELF layout types to refer to the 32-bit class of files.
*/
#undef ELF_CLASS
#define ELF_CLASS ELFCLASS32
#undef elfhdr
#undef elf_phdr
#undef elf_shdr
#undef elf_note
#undef elf_addr_t
#define elfhdr elf32_hdr
#define elf_phdr elf32_phdr
#define elf_shdr elf32_shdr
#define elf_note elf32_note
#define elf_addr_t Elf32_Addr
/*
* Some data types as stored in coredump.
*/
#define user_long_t compat_long_t
#define user_siginfo_t compat_siginfo_t
#define copy_siginfo_to_user copy_siginfo_to_user32
/*
* The machine-dependent core note format types are defined in elfcore-compat.h,
* which requires asm/elf.h to define compat_elf_gregset_t et al.
*/
#define elf_prstatus compat_elf_prstatus
#define elf_prpsinfo compat_elf_prpsinfo
/*
* Compat version of cputime_to_compat_timeval, perhaps this
* should be an inline in <linux/compat.h>.
*/
static void cputime_to_compat_timeval(const cputime_t cputime,
struct compat_timeval *value)
{
struct timeval tv;
cputime_to_timeval(cputime, &tv);
value->tv_sec = tv.tv_sec;
value->tv_usec = tv.tv_usec;
}
#undef cputime_to_timeval
#define cputime_to_timeval cputime_to_compat_timeval
/*
* To use this file, asm/elf.h must define compat_elf_check_arch.
* The other following macros can be defined if the compat versions
* differ from the native ones, or omitted when they match.
*/
#undef ELF_ARCH
#undef elf_check_arch
#define elf_check_arch compat_elf_check_arch
#ifdef COMPAT_ELF_PLATFORM
#undef ELF_PLATFORM
#define ELF_PLATFORM COMPAT_ELF_PLATFORM
#endif
#ifdef COMPAT_ELF_HWCAP
#undef ELF_HWCAP
#define ELF_HWCAP COMPAT_ELF_HWCAP
#endif
#ifdef COMPAT_ELF_HWCAP2
#undef ELF_HWCAP2
#define ELF_HWCAP2 COMPAT_ELF_HWCAP2
#endif
#ifdef COMPAT_ARCH_DLINFO
#undef ARCH_DLINFO
#define ARCH_DLINFO COMPAT_ARCH_DLINFO
#endif
#ifdef COMPAT_ELF_ET_DYN_BASE
#undef ELF_ET_DYN_BASE
#define ELF_ET_DYN_BASE COMPAT_ELF_ET_DYN_BASE
#endif
#ifdef COMPAT_ELF_EXEC_PAGESIZE
#undef ELF_EXEC_PAGESIZE
#define ELF_EXEC_PAGESIZE COMPAT_ELF_EXEC_PAGESIZE
#endif
#ifdef COMPAT_ELF_PLAT_INIT
#undef ELF_PLAT_INIT
#define ELF_PLAT_INIT COMPAT_ELF_PLAT_INIT
#endif
#ifdef COMPAT_SET_PERSONALITY
#undef SET_PERSONALITY
#define SET_PERSONALITY COMPAT_SET_PERSONALITY
#endif
#ifdef compat_start_thread
#undef start_thread
#define start_thread compat_start_thread
#endif
#ifdef compat_arch_setup_additional_pages
#undef ARCH_HAS_SETUP_ADDITIONAL_PAGES
#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
#undef arch_setup_additional_pages
#define arch_setup_additional_pages compat_arch_setup_additional_pages
#endif
/*
* Rename a few of the symbols that binfmt_elf.c will define.
* These are all local so the names don't really matter, but it
* might make some debugging less confusing not to duplicate them.
*/
#define elf_format compat_elf_format
#define init_elf_binfmt init_compat_elf_binfmt
#define exit_elf_binfmt exit_compat_elf_binfmt
/*
* We share all the actual code with the native (64-bit) version.
*/
#include "binfmt_elf.c"
| gpl-2.0 |
HandyMenny/android_kernel_samsung_msm | drivers/net/wireless/iwlwifi/iwl-2000.c | 2389 | 12069 | /******************************************************************************
*
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* Intel Linux Wireless <ilw@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <linux/delay.h>
#include <linux/skbuff.h>
#include <linux/netdevice.h>
#include <linux/wireless.h>
#include <net/mac80211.h>
#include <linux/etherdevice.h>
#include <asm/unaligned.h>
#include <linux/stringify.h>
#include "iwl-eeprom.h"
#include "iwl-dev.h"
#include "iwl-core.h"
#include "iwl-io.h"
#include "iwl-sta.h"
#include "iwl-agn.h"
#include "iwl-helpers.h"
#include "iwl-agn-hw.h"
#include "iwl-6000-hw.h"
/* Highest firmware API version supported */
#define IWL2030_UCODE_API_MAX 5
#define IWL2000_UCODE_API_MAX 5
#define IWL105_UCODE_API_MAX 5
/* Lowest firmware API version supported */
#define IWL2030_UCODE_API_MIN 5
#define IWL2000_UCODE_API_MIN 5
#define IWL105_UCODE_API_MIN 5
#define IWL2030_FW_PRE "iwlwifi-2030-"
#define IWL2030_MODULE_FIRMWARE(api) IWL2030_FW_PRE __stringify(api) ".ucode"
#define IWL2000_FW_PRE "iwlwifi-2000-"
#define IWL2000_MODULE_FIRMWARE(api) IWL2000_FW_PRE __stringify(api) ".ucode"
#define IWL105_FW_PRE "iwlwifi-105-"
#define IWL105_MODULE_FIRMWARE(api) IWL105_FW_PRE __stringify(api) ".ucode"
static void iwl2000_set_ct_threshold(struct iwl_priv *priv)
{
/* want Celsius */
priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD;
priv->hw_params.ct_kill_exit_threshold = CT_KILL_EXIT_THRESHOLD;
}
/* NIC configuration for 2000 series */
static void iwl2000_nic_config(struct iwl_priv *priv)
{
u16 radio_cfg;
radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
/* write radio config values to register */
if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) <= EEPROM_RF_CONFIG_TYPE_MAX)
iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
EEPROM_RF_CFG_DASH_MSK(radio_cfg));
/* set CSR_HW_CONFIG_REG for uCode use */
iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
if (priv->cfg->iq_invert)
iwl_set_bit(priv, CSR_GP_DRIVER_REG,
CSR_GP_DRIVER_REG_BIT_RADIO_IQ_INVER);
if (priv->cfg->disable_otp_refresh)
iwl_write_prph(priv, APMG_ANALOG_SVR_REG, 0x80000010);
}
static struct iwl_sensitivity_ranges iwl2000_sensitivity = {
.min_nrg_cck = 97,
.max_nrg_cck = 0, /* not used, set to 0 */
.auto_corr_min_ofdm = 80,
.auto_corr_min_ofdm_mrc = 128,
.auto_corr_min_ofdm_x1 = 105,
.auto_corr_min_ofdm_mrc_x1 = 192,
.auto_corr_max_ofdm = 145,
.auto_corr_max_ofdm_mrc = 232,
.auto_corr_max_ofdm_x1 = 110,
.auto_corr_max_ofdm_mrc_x1 = 232,
.auto_corr_min_cck = 125,
.auto_corr_max_cck = 175,
.auto_corr_min_cck_mrc = 160,
.auto_corr_max_cck_mrc = 310,
.nrg_th_cck = 97,
.nrg_th_ofdm = 100,
.barker_corr_th_min = 190,
.barker_corr_th_min_mrc = 390,
.nrg_th_cca = 62,
};
static int iwl2000_hw_set_hw_params(struct iwl_priv *priv)
{
if (iwlagn_mod_params.num_of_queues >= IWL_MIN_NUM_QUEUES &&
iwlagn_mod_params.num_of_queues <= IWLAGN_NUM_QUEUES)
priv->cfg->base_params->num_of_queues =
iwlagn_mod_params.num_of_queues;
priv->hw_params.max_txq_num = priv->cfg->base_params->num_of_queues;
priv->hw_params.dma_chnl_num = FH50_TCSR_CHNL_NUM;
priv->hw_params.scd_bc_tbls_size =
priv->cfg->base_params->num_of_queues *
sizeof(struct iwlagn_scd_bc_tbl);
priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
priv->hw_params.max_stations = IWLAGN_STATION_COUNT;
priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWLAGN_BROADCAST_ID;
priv->hw_params.max_data_size = IWL60_RTC_DATA_SIZE;
priv->hw_params.max_inst_size = IWL60_RTC_INST_SIZE;
priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) |
BIT(IEEE80211_BAND_5GHZ);
priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
if (priv->cfg->rx_with_siso_diversity)
priv->hw_params.rx_chains_num = 1;
else
priv->hw_params.rx_chains_num =
num_of_ant(priv->cfg->valid_rx_ant);
priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
iwl2000_set_ct_threshold(priv);
/* Set initial sensitivity parameters */
/* Set initial calibration set */
priv->hw_params.sens = &iwl2000_sensitivity;
priv->hw_params.calib_init_cfg =
BIT(IWL_CALIB_XTAL) |
BIT(IWL_CALIB_LO) |
BIT(IWL_CALIB_TX_IQ) |
BIT(IWL_CALIB_BASE_BAND);
if (priv->cfg->need_dc_calib)
priv->hw_params.calib_rt_cfg |= BIT(IWL_CALIB_CFG_DC_IDX);
if (priv->cfg->need_temp_offset_calib)
priv->hw_params.calib_init_cfg |= BIT(IWL_CALIB_TEMP_OFFSET);
priv->hw_params.beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS;
return 0;
}
static struct iwl_lib_ops iwl2000_lib = {
.set_hw_params = iwl2000_hw_set_hw_params,
.rx_handler_setup = iwlagn_rx_handler_setup,
.setup_deferred_work = iwlagn_bt_setup_deferred_work,
.cancel_deferred_work = iwlagn_bt_cancel_deferred_work,
.is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
.send_tx_power = iwlagn_send_tx_power,
.update_chain_flags = iwl_update_chain_flags,
.apm_ops = {
.init = iwl_apm_init,
.config = iwl2000_nic_config,
},
.eeprom_ops = {
.regulatory_bands = {
EEPROM_REG_BAND_1_CHANNELS,
EEPROM_REG_BAND_2_CHANNELS,
EEPROM_REG_BAND_3_CHANNELS,
EEPROM_REG_BAND_4_CHANNELS,
EEPROM_REG_BAND_5_CHANNELS,
EEPROM_6000_REG_BAND_24_HT40_CHANNELS,
EEPROM_REGULATORY_BAND_NO_HT40,
},
.query_addr = iwlagn_eeprom_query_addr,
.update_enhanced_txpower = iwlcore_eeprom_enhanced_txpower,
},
.temp_ops = {
.temperature = iwlagn_temperature,
},
.txfifo_flush = iwlagn_txfifo_flush,
.dev_txfifo_flush = iwlagn_dev_txfifo_flush,
};
static const struct iwl_ops iwl2000_ops = {
.lib = &iwl2000_lib,
.hcmd = &iwlagn_hcmd,
.utils = &iwlagn_hcmd_utils,
};
static const struct iwl_ops iwl2030_ops = {
.lib = &iwl2000_lib,
.hcmd = &iwlagn_bt_hcmd,
.utils = &iwlagn_hcmd_utils,
};
static const struct iwl_ops iwl105_ops = {
.lib = &iwl2000_lib,
.hcmd = &iwlagn_hcmd,
.utils = &iwlagn_hcmd_utils,
};
static const struct iwl_ops iwl135_ops = {
.lib = &iwl2000_lib,
.hcmd = &iwlagn_bt_hcmd,
.utils = &iwlagn_hcmd_utils,
};
static struct iwl_base_params iwl2000_base_params = {
.eeprom_size = OTP_LOW_IMAGE_SIZE,
.num_of_queues = IWLAGN_NUM_QUEUES,
.num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,
.pll_cfg_val = 0,
.max_ll_items = OTP_MAX_LL_ITEMS_2x00,
.shadow_ram_support = true,
.led_compensation = 51,
.chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
.adv_thermal_throttle = true,
.support_ct_kill_exit = true,
.plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
.chain_noise_scale = 1000,
.wd_timeout = IWL_DEF_WD_TIMEOUT,
.max_event_log_size = 512,
.shadow_reg_enable = true,
};
static struct iwl_base_params iwl2030_base_params = {
.eeprom_size = OTP_LOW_IMAGE_SIZE,
.num_of_queues = IWLAGN_NUM_QUEUES,
.num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,
.pll_cfg_val = 0,
.max_ll_items = OTP_MAX_LL_ITEMS_2x00,
.shadow_ram_support = true,
.led_compensation = 57,
.chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
.adv_thermal_throttle = true,
.support_ct_kill_exit = true,
.plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
.chain_noise_scale = 1000,
.wd_timeout = IWL_LONG_WD_TIMEOUT,
.max_event_log_size = 512,
.shadow_reg_enable = true,
};
static struct iwl_ht_params iwl2000_ht_params = {
.ht_greenfield_support = true,
.use_rts_for_aggregation = true, /* use rts/cts protection */
};
static struct iwl_bt_params iwl2030_bt_params = {
/* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */
.advanced_bt_coexist = true,
.agg_time_limit = BT_AGG_THRESHOLD_DEF,
.bt_init_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_NONE,
.bt_prio_boost = IWLAGN_BT_PRIO_BOOST_DEFAULT,
.bt_sco_disable = true,
.bt_session_2 = true,
};
#define IWL_DEVICE_2000 \
.fw_name_pre = IWL2000_FW_PRE, \
.ucode_api_max = IWL2000_UCODE_API_MAX, \
.ucode_api_min = IWL2000_UCODE_API_MIN, \
.eeprom_ver = EEPROM_2000_EEPROM_VERSION, \
.eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION, \
.ops = &iwl2000_ops, \
.base_params = &iwl2000_base_params, \
.need_dc_calib = true, \
.need_temp_offset_calib = true, \
.led_mode = IWL_LED_RF_STATE, \
.iq_invert = true, \
.disable_otp_refresh = true \
struct iwl_cfg iwl2000_2bgn_cfg = {
.name = "2000 Series 2x2 BGN",
IWL_DEVICE_2000,
.ht_params = &iwl2000_ht_params,
};
struct iwl_cfg iwl2000_2bg_cfg = {
.name = "2000 Series 2x2 BG",
IWL_DEVICE_2000,
};
#define IWL_DEVICE_2030 \
.fw_name_pre = IWL2030_FW_PRE, \
.ucode_api_max = IWL2030_UCODE_API_MAX, \
.ucode_api_min = IWL2030_UCODE_API_MIN, \
.eeprom_ver = EEPROM_2000_EEPROM_VERSION, \
.eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION, \
.ops = &iwl2030_ops, \
.base_params = &iwl2030_base_params, \
.bt_params = &iwl2030_bt_params, \
.need_dc_calib = true, \
.need_temp_offset_calib = true, \
.led_mode = IWL_LED_RF_STATE, \
.adv_pm = true, \
.iq_invert = true \
struct iwl_cfg iwl2030_2bgn_cfg = {
.name = "2000 Series 2x2 BGN/BT",
IWL_DEVICE_2030,
.ht_params = &iwl2000_ht_params,
};
struct iwl_cfg iwl2030_2bg_cfg = {
.name = "2000 Series 2x2 BG/BT",
IWL_DEVICE_2030,
};
#define IWL_DEVICE_105 \
.fw_name_pre = IWL105_FW_PRE, \
.ucode_api_max = IWL105_UCODE_API_MAX, \
.ucode_api_min = IWL105_UCODE_API_MIN, \
.eeprom_ver = EEPROM_2000_EEPROM_VERSION, \
.eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION, \
.ops = &iwl105_ops, \
.base_params = &iwl2000_base_params, \
.need_dc_calib = true, \
.need_temp_offset_calib = true, \
.led_mode = IWL_LED_RF_STATE, \
.adv_pm = true, \
.rx_with_siso_diversity = true \
struct iwl_cfg iwl105_bg_cfg = {
.name = "105 Series 1x1 BG",
IWL_DEVICE_105,
};
struct iwl_cfg iwl105_bgn_cfg = {
.name = "105 Series 1x1 BGN",
IWL_DEVICE_105,
.ht_params = &iwl2000_ht_params,
};
#define IWL_DEVICE_135 \
.fw_name_pre = IWL105_FW_PRE, \
.ucode_api_max = IWL105_UCODE_API_MAX, \
.ucode_api_min = IWL105_UCODE_API_MIN, \
.eeprom_ver = EEPROM_2000_EEPROM_VERSION, \
.eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION, \
.ops = &iwl135_ops, \
.base_params = &iwl2030_base_params, \
.bt_params = &iwl2030_bt_params, \
.need_dc_calib = true, \
.need_temp_offset_calib = true, \
.led_mode = IWL_LED_RF_STATE, \
.adv_pm = true, \
.rx_with_siso_diversity = true \
struct iwl_cfg iwl135_bg_cfg = {
.name = "105 Series 1x1 BG/BT",
IWL_DEVICE_135,
};
struct iwl_cfg iwl135_bgn_cfg = {
.name = "105 Series 1x1 BGN/BT",
IWL_DEVICE_135,
.ht_params = &iwl2000_ht_params,
};
MODULE_FIRMWARE(IWL2000_MODULE_FIRMWARE(IWL2000_UCODE_API_MAX));
MODULE_FIRMWARE(IWL2030_MODULE_FIRMWARE(IWL2030_UCODE_API_MAX));
MODULE_FIRMWARE(IWL105_MODULE_FIRMWARE(IWL105_UCODE_API_MAX));
| gpl-2.0 |
XePeleato/ALE-L21_ESAL | ipc/msgutil.c | 2645 | 3680 | /*
* linux/ipc/msgutil.c
* Copyright (C) 1999, 2004 Manfred Spraul
*
* This file is released under GNU General Public Licence version 2 or
* (at your option) any later version.
*
* See the file COPYING for more details.
*/
#include <linux/spinlock.h>
#include <linux/init.h>
#include <linux/security.h>
#include <linux/slab.h>
#include <linux/ipc.h>
#include <linux/msg.h>
#include <linux/ipc_namespace.h>
#include <linux/utsname.h>
#include <linux/proc_ns.h>
#include <linux/uaccess.h>
#include "util.h"
DEFINE_SPINLOCK(mq_lock);
/*
* The next 2 defines are here bc this is the only file
* compiled when either CONFIG_SYSVIPC and CONFIG_POSIX_MQUEUE
* and not CONFIG_IPC_NS.
*/
struct ipc_namespace init_ipc_ns = {
.count = ATOMIC_INIT(1),
.user_ns = &init_user_ns,
.proc_inum = PROC_IPC_INIT_INO,
};
atomic_t nr_ipc_ns = ATOMIC_INIT(1);
struct msg_msgseg {
struct msg_msgseg *next;
/* the next part of the message follows immediately */
};
#define DATALEN_MSG ((size_t)PAGE_SIZE-sizeof(struct msg_msg))
#define DATALEN_SEG ((size_t)PAGE_SIZE-sizeof(struct msg_msgseg))
static struct msg_msg *alloc_msg(size_t len)
{
struct msg_msg *msg;
struct msg_msgseg **pseg;
size_t alen;
alen = min(len, DATALEN_MSG);
msg = kmalloc(sizeof(*msg) + alen, GFP_KERNEL);
if (msg == NULL)
return NULL;
msg->next = NULL;
msg->security = NULL;
len -= alen;
pseg = &msg->next;
while (len > 0) {
struct msg_msgseg *seg;
alen = min(len, DATALEN_SEG);
seg = kmalloc(sizeof(*seg) + alen, GFP_KERNEL);
if (seg == NULL)
goto out_err;
*pseg = seg;
seg->next = NULL;
pseg = &seg->next;
len -= alen;
}
return msg;
out_err:
free_msg(msg);
return NULL;
}
struct msg_msg *load_msg(const void __user *src, size_t len)
{
struct msg_msg *msg;
struct msg_msgseg *seg;
int err = -EFAULT;
size_t alen;
msg = alloc_msg(len);
if (msg == NULL)
return ERR_PTR(-ENOMEM);
alen = min(len, DATALEN_MSG);
if (copy_from_user(msg + 1, src, alen))
goto out_err;
for (seg = msg->next; seg != NULL; seg = seg->next) {
len -= alen;
src = (char __user *)src + alen;
alen = min(len, DATALEN_SEG);
if (copy_from_user(seg + 1, src, alen))
goto out_err;
}
err = security_msg_msg_alloc(msg);
if (err)
goto out_err;
return msg;
out_err:
free_msg(msg);
return ERR_PTR(err);
}
#ifdef CONFIG_CHECKPOINT_RESTORE
struct msg_msg *copy_msg(struct msg_msg *src, struct msg_msg *dst)
{
struct msg_msgseg *dst_pseg, *src_pseg;
size_t len = src->m_ts;
size_t alen;
BUG_ON(dst == NULL);
if (src->m_ts > dst->m_ts)
return ERR_PTR(-EINVAL);
alen = min(len, DATALEN_MSG);
memcpy(dst + 1, src + 1, alen);
for (dst_pseg = dst->next, src_pseg = src->next;
src_pseg != NULL;
dst_pseg = dst_pseg->next, src_pseg = src_pseg->next) {
len -= alen;
alen = min(len, DATALEN_SEG);
memcpy(dst_pseg + 1, src_pseg + 1, alen);
}
dst->m_type = src->m_type;
dst->m_ts = src->m_ts;
return dst;
}
#else
struct msg_msg *copy_msg(struct msg_msg *src, struct msg_msg *dst)
{
return ERR_PTR(-ENOSYS);
}
#endif
int store_msg(void __user *dest, struct msg_msg *msg, size_t len)
{
size_t alen;
struct msg_msgseg *seg;
alen = min(len, DATALEN_MSG);
if (copy_to_user(dest, msg + 1, alen))
return -1;
for (seg = msg->next; seg != NULL; seg = seg->next) {
len -= alen;
dest = (char __user *)dest + alen;
alen = min(len, DATALEN_SEG);
if (copy_to_user(dest, seg + 1, alen))
return -1;
}
return 0;
}
void free_msg(struct msg_msg *msg)
{
struct msg_msgseg *seg;
security_msg_msg_free(msg);
seg = msg->next;
kfree(msg);
while (seg != NULL) {
struct msg_msgseg *tmp = seg->next;
kfree(seg);
seg = tmp;
}
}
| gpl-2.0 |
VRToxin-AOSP/android_kernel_moto_shamu | drivers/ata/pata_cs5536.c | 2645 | 7700 | /*
* pata_cs5536.c - CS5536 PATA for new ATA layer
* (C) 2007 Martin K. Petersen <mkp@mkp.net>
* (C) 2011 Bartlomiej Zolnierkiewicz
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* Documentation:
* Available from AMD web site.
*
* The IDE timing registers for the CS5536 live in the Geode Machine
* Specific Register file and not PCI config space. Most BIOSes
* virtualize the PCI registers so the chip looks like a standard IDE
* controller. Unfortunately not all implementations get this right.
* In particular some have problems with unaligned accesses to the
* virtualized PCI registers. This driver always does full dword
* writes to work around the issue. Also, in case of a bad BIOS this
* driver can be loaded with the "msr=1" parameter which forces using
* the Machine Specific Registers to configure the device.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/libata.h>
#include <scsi/scsi_host.h>
#include <linux/dmi.h>
#ifdef CONFIG_X86_32
#include <asm/msr.h>
static int use_msr;
module_param_named(msr, use_msr, int, 0644);
MODULE_PARM_DESC(msr, "Force using MSR to configure IDE function (Default: 0)");
#else
#undef rdmsr /* avoid accidental MSR usage on, e.g. x86-64 */
#undef wrmsr
#define rdmsr(x, y, z) do { } while (0)
#define wrmsr(x, y, z) do { } while (0)
#define use_msr 0
#endif
#define DRV_NAME "pata_cs5536"
#define DRV_VERSION "0.0.8"
enum {
MSR_IDE_CFG = 0x51300010,
PCI_IDE_CFG = 0x40,
CFG = 0,
DTC = 2,
CAST = 3,
ETC = 4,
IDE_CFG_CHANEN = (1 << 1),
IDE_CFG_CABLE = (1 << 17) | (1 << 16),
IDE_D0_SHIFT = 24,
IDE_D1_SHIFT = 16,
IDE_DRV_MASK = 0xff,
IDE_CAST_D0_SHIFT = 6,
IDE_CAST_D1_SHIFT = 4,
IDE_CAST_DRV_MASK = 0x3,
IDE_CAST_CMD_MASK = 0xff,
IDE_CAST_CMD_SHIFT = 24,
IDE_ETC_UDMA_MASK = 0xc0,
};
/* Some Bachmann OT200 devices have a non working UDMA support due a
* missing resistor.
*/
static const struct dmi_system_id udma_quirk_dmi_table[] = {
{
.ident = "Bachmann electronic OT200",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Bachmann electronic"),
DMI_MATCH(DMI_PRODUCT_NAME, "OT200"),
DMI_MATCH(DMI_PRODUCT_VERSION, "1")
},
},
{ }
};
static int cs5536_read(struct pci_dev *pdev, int reg, u32 *val)
{
if (unlikely(use_msr)) {
u32 dummy __maybe_unused;
rdmsr(MSR_IDE_CFG + reg, *val, dummy);
return 0;
}
return pci_read_config_dword(pdev, PCI_IDE_CFG + reg * 4, val);
}
static int cs5536_write(struct pci_dev *pdev, int reg, int val)
{
if (unlikely(use_msr)) {
wrmsr(MSR_IDE_CFG + reg, val, 0);
return 0;
}
return pci_write_config_dword(pdev, PCI_IDE_CFG + reg * 4, val);
}
static void cs5536_program_dtc(struct ata_device *adev, u8 tim)
{
struct pci_dev *pdev = to_pci_dev(adev->link->ap->host->dev);
int dshift = adev->devno ? IDE_D1_SHIFT : IDE_D0_SHIFT;
u32 dtc;
cs5536_read(pdev, DTC, &dtc);
dtc &= ~(IDE_DRV_MASK << dshift);
dtc |= tim << dshift;
cs5536_write(pdev, DTC, dtc);
}
/**
* cs5536_cable_detect - detect cable type
* @ap: Port to detect on
*
* Perform cable detection for ATA66 capable cable.
*
* Returns a cable type.
*/
static int cs5536_cable_detect(struct ata_port *ap)
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
u32 cfg;
cs5536_read(pdev, CFG, &cfg);
if (cfg & IDE_CFG_CABLE)
return ATA_CBL_PATA80;
else
return ATA_CBL_PATA40;
}
/**
* cs5536_set_piomode - PIO setup
* @ap: ATA interface
* @adev: device on the interface
*/
static void cs5536_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
static const u8 drv_timings[5] = {
0x98, 0x55, 0x32, 0x21, 0x20,
};
static const u8 addr_timings[5] = {
0x2, 0x1, 0x0, 0x0, 0x0,
};
static const u8 cmd_timings[5] = {
0x99, 0x92, 0x90, 0x22, 0x20,
};
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
struct ata_device *pair = ata_dev_pair(adev);
int mode = adev->pio_mode - XFER_PIO_0;
int cmdmode = mode;
int cshift = adev->devno ? IDE_CAST_D1_SHIFT : IDE_CAST_D0_SHIFT;
u32 cast;
if (pair)
cmdmode = min(mode, pair->pio_mode - XFER_PIO_0);
cs5536_program_dtc(adev, drv_timings[mode]);
cs5536_read(pdev, CAST, &cast);
cast &= ~(IDE_CAST_DRV_MASK << cshift);
cast |= addr_timings[mode] << cshift;
cast &= ~(IDE_CAST_CMD_MASK << IDE_CAST_CMD_SHIFT);
cast |= cmd_timings[cmdmode] << IDE_CAST_CMD_SHIFT;
cs5536_write(pdev, CAST, cast);
}
/**
* cs5536_set_dmamode - DMA timing setup
* @ap: ATA interface
* @adev: Device being configured
*
*/
static void cs5536_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{
static const u8 udma_timings[6] = {
0xc2, 0xc1, 0xc0, 0xc4, 0xc5, 0xc6,
};
static const u8 mwdma_timings[3] = {
0x67, 0x21, 0x20,
};
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
u32 etc;
int mode = adev->dma_mode;
int dshift = adev->devno ? IDE_D1_SHIFT : IDE_D0_SHIFT;
cs5536_read(pdev, ETC, &etc);
if (mode >= XFER_UDMA_0) {
etc &= ~(IDE_DRV_MASK << dshift);
etc |= udma_timings[mode - XFER_UDMA_0] << dshift;
} else { /* MWDMA */
etc &= ~(IDE_ETC_UDMA_MASK << dshift);
cs5536_program_dtc(adev, mwdma_timings[mode - XFER_MW_DMA_0]);
}
cs5536_write(pdev, ETC, etc);
}
static struct scsi_host_template cs5536_sht = {
ATA_BMDMA_SHT(DRV_NAME),
};
static struct ata_port_operations cs5536_port_ops = {
.inherits = &ata_bmdma32_port_ops,
.cable_detect = cs5536_cable_detect,
.set_piomode = cs5536_set_piomode,
.set_dmamode = cs5536_set_dmamode,
};
/**
* cs5536_init_one
* @dev: PCI device
* @id: Entry in match table
*
*/
static int cs5536_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
static const struct ata_port_info info = {
.flags = ATA_FLAG_SLAVE_POSS,
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2,
.udma_mask = ATA_UDMA5,
.port_ops = &cs5536_port_ops,
};
static const struct ata_port_info no_udma_info = {
.flags = ATA_FLAG_SLAVE_POSS,
.pio_mask = ATA_PIO4,
.port_ops = &cs5536_port_ops,
};
const struct ata_port_info *ppi[2];
u32 cfg;
if (dmi_check_system(udma_quirk_dmi_table))
ppi[0] = &no_udma_info;
else
ppi[0] = &info;
ppi[1] = &ata_dummy_port_info;
if (use_msr)
printk(KERN_ERR DRV_NAME ": Using MSR regs instead of PCI\n");
cs5536_read(dev, CFG, &cfg);
if ((cfg & IDE_CFG_CHANEN) == 0) {
printk(KERN_ERR DRV_NAME ": disabled by BIOS\n");
return -ENODEV;
}
return ata_pci_bmdma_init_one(dev, ppi, &cs5536_sht, NULL, 0);
}
static const struct pci_device_id cs5536[] = {
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5536_IDE), },
{ },
};
static struct pci_driver cs5536_pci_driver = {
.name = DRV_NAME,
.id_table = cs5536,
.probe = cs5536_init_one,
.remove = ata_pci_remove_one,
#ifdef CONFIG_PM
.suspend = ata_pci_device_suspend,
.resume = ata_pci_device_resume,
#endif
};
module_pci_driver(cs5536_pci_driver);
MODULE_AUTHOR("Martin K. Petersen");
MODULE_DESCRIPTION("low-level driver for the CS5536 IDE controller");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, cs5536);
MODULE_VERSION(DRV_VERSION);
| gpl-2.0 |
davidmueller13/Googy-Max3-Kernel | arch/arm/mach-msm/rpcrouter_smd_xprt.c | 3413 | 8423 | /* Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
/*
* RPCROUTER SMD XPRT module.
*/
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/types.h>
#include <linux/export.h>
#include <mach/msm_smd.h>
#include "smd_rpcrouter.h"
#include "smd_private.h"
struct rpcrouter_smd_xprt {
struct rpcrouter_xprt xprt;
smd_channel_t *channel;
};
static struct rpcrouter_smd_xprt smd_remote_xprt;
#ifdef CONFIG_ARCH_FSM9XXX
static struct rpcrouter_smd_xprt smd_remote_qdsp_xprt;
#endif
static int rpcrouter_smd_remote_read_avail(void)
{
return smd_read_avail(smd_remote_xprt.channel);
}
static int rpcrouter_smd_remote_read(void *data, uint32_t len)
{
return smd_read(smd_remote_xprt.channel, data, len);
}
static int rpcrouter_smd_remote_write_avail(void)
{
return smd_write_avail(smd_remote_xprt.channel);
}
static int rpcrouter_smd_remote_write(void *data, uint32_t len, uint32_t type)
{
return smd_write(smd_remote_xprt.channel, data, len);
}
static int rpcrouter_smd_remote_close(void)
{
smsm_change_state(SMSM_APPS_STATE, SMSM_RPCINIT, 0);
return smd_close(smd_remote_xprt.channel);
}
static void rpcrouter_smd_remote_notify(void *_dev, unsigned event)
{
switch (event) {
case SMD_EVENT_DATA:
msm_rpcrouter_xprt_notify(&smd_remote_xprt.xprt,
RPCROUTER_XPRT_EVENT_DATA);
break;
case SMD_EVENT_OPEN:
pr_info("%s: smd opened 0x%p\n", __func__, _dev);
msm_rpcrouter_xprt_notify(&smd_remote_xprt.xprt,
RPCROUTER_XPRT_EVENT_OPEN);
break;
case SMD_EVENT_CLOSE:
pr_info("%s: smd closed 0x%p\n", __func__, _dev);
msm_rpcrouter_xprt_notify(&smd_remote_xprt.xprt,
RPCROUTER_XPRT_EVENT_CLOSE);
break;
}
}
#ifdef CONFIG_ARCH_FSM9XXX
static int rpcrouter_smd_remote_qdsp_read_avail(void)
{
return smd_read_avail(smd_remote_qdsp_xprt.channel);
}
static int rpcrouter_smd_remote_qdsp_read(void *data, uint32_t len)
{
return smd_read(smd_remote_qdsp_xprt.channel, data, len);
}
static int rpcrouter_smd_remote_qdsp_write_avail(void)
{
return smd_write_avail(smd_remote_qdsp_xprt.channel);
}
static int rpcrouter_smd_remote_qdsp_write(void *data,
uint32_t len, uint32_t type)
{
return smd_write(smd_remote_qdsp_xprt.channel, data, len);
}
static int rpcrouter_smd_remote_qdsp_close(void)
{
/*
* TBD: Implement when we have N way SMSM ported
* smsm_change_state(SMSM_APPS_STATE, SMSM_RPCINIT, 0);
*/
return smd_close(smd_remote_qdsp_xprt.channel);
}
static void rpcrouter_smd_remote_qdsp_notify(void *_dev, unsigned event)
{
switch (event) {
case SMD_EVENT_DATA:
msm_rpcrouter_xprt_notify(&smd_remote_qdsp_xprt.xprt,
RPCROUTER_XPRT_EVENT_DATA);
break;
case SMD_EVENT_OPEN:
/* Print log info */
pr_debug("%s: smd opened\n", __func__);
msm_rpcrouter_xprt_notify(&smd_remote_qdsp_xprt.xprt,
RPCROUTER_XPRT_EVENT_OPEN);
break;
case SMD_EVENT_CLOSE:
/* Print log info */
pr_debug("%s: smd closed\n", __func__);
msm_rpcrouter_xprt_notify(&smd_remote_qdsp_xprt.xprt,
RPCROUTER_XPRT_EVENT_CLOSE);
break;
}
}
static int rpcrouter_smd_remote_qdsp_probe(struct platform_device *pdev)
{
int rc;
smd_remote_qdsp_xprt.xprt.name = "rpcrotuer_smd_qdsp_xprt";
smd_remote_qdsp_xprt.xprt.read_avail =
rpcrouter_smd_remote_qdsp_read_avail;
smd_remote_qdsp_xprt.xprt.read = rpcrouter_smd_remote_qdsp_read;
smd_remote_qdsp_xprt.xprt.write_avail =
rpcrouter_smd_remote_qdsp_write_avail;
smd_remote_qdsp_xprt.xprt.write = rpcrouter_smd_remote_qdsp_write;
smd_remote_qdsp_xprt.xprt.close = rpcrouter_smd_remote_qdsp_close;
smd_remote_qdsp_xprt.xprt.priv = NULL;
/* Open up SMD channel */
rc = smd_named_open_on_edge("RPCCALL_QDSP", SMD_APPS_QDSP,
&smd_remote_qdsp_xprt.channel, NULL,
rpcrouter_smd_remote_qdsp_notify);
if (rc < 0)
return rc;
smd_disable_read_intr(smd_remote_qdsp_xprt.channel);
return 0;
}
static struct platform_driver rpcrouter_smd_remote_qdsp_driver = {
.probe = rpcrouter_smd_remote_qdsp_probe,
.driver = {
.name = "RPCCALL_QDSP",
.owner = THIS_MODULE,
},
};
static inline int register_smd_remote_qpsp_driver(void)
{
return platform_driver_register(&rpcrouter_smd_remote_qdsp_driver);
}
#else /* CONFIG_ARCH_FSM9XXX */
static inline int register_smd_remote_qpsp_driver(void)
{
return 0;
}
#endif
#if defined(CONFIG_MSM_RPC_LOOPBACK_XPRT)
static struct rpcrouter_smd_xprt smd_loopback_xprt;
static int rpcrouter_smd_loopback_read_avail(void)
{
return smd_read_avail(smd_loopback_xprt.channel);
}
static int rpcrouter_smd_loopback_read(void *data, uint32_t len)
{
return smd_read(smd_loopback_xprt.channel, data, len);
}
static int rpcrouter_smd_loopback_write_avail(void)
{
return smd_write_avail(smd_loopback_xprt.channel);
}
static int rpcrouter_smd_loopback_write(void *data, uint32_t len, uint32 type)
{
return smd_write(smd_loopback_xprt.channel, data, len);
}
static int rpcrouter_smd_loopback_close(void)
{
return smd_close(smd_loopback_xprt.channel);
}
static void rpcrouter_smd_loopback_notify(void *_dev, unsigned event)
{
switch (event) {
case SMD_EVENT_DATA:
msm_rpcrouter_xprt_notify(&smd_loopback_xprt.xprt,
RPCROUTER_XPRT_EVENT_DATA);
break;
case SMD_EVENT_OPEN:
pr_debug("%s: smd loopback opened 0x%p\n", __func__, _dev);
msm_rpcrouter_xprt_notify(&smd_loopback_xprt.xprt,
RPCROUTER_XPRT_EVENT_OPEN);
break;
case SMD_EVENT_CLOSE:
pr_debug("%s: smd loopback closed 0x%p\n", __func__, _dev);
msm_rpcrouter_xprt_notify(&smd_loopback_xprt.xprt,
RPCROUTER_XPRT_EVENT_CLOSE);
break;
}
}
static int rpcrouter_smd_loopback_probe(struct platform_device *pdev)
{
int rc;
smd_loopback_xprt.xprt.name = "rpcrouter_loopback_xprt";
smd_loopback_xprt.xprt.read_avail = rpcrouter_smd_loopback_read_avail;
smd_loopback_xprt.xprt.read = rpcrouter_smd_loopback_read;
smd_loopback_xprt.xprt.write_avail = rpcrouter_smd_loopback_write_avail;
smd_loopback_xprt.xprt.write = rpcrouter_smd_loopback_write;
smd_loopback_xprt.xprt.close = rpcrouter_smd_loopback_close;
smd_loopback_xprt.xprt.priv = NULL;
/* Open up SMD LOOPBACK channel */
rc = smd_named_open_on_edge("local_loopback", SMD_LOOPBACK_TYPE,
&smd_loopback_xprt.channel, NULL,
rpcrouter_smd_loopback_notify);
if (rc < 0)
return rc;
smd_disable_read_intr(smd_remote_xprt.channel);
return 0;
}
static struct platform_driver rpcrouter_smd_loopback_driver = {
.probe = rpcrouter_smd_loopback_probe,
.driver = {
.name = "local_loopback",
.owner = THIS_MODULE,
},
};
static inline int register_smd_loopback_driver(void)
{
return platform_driver_register(&rpcrouter_smd_loopback_driver);
}
#else /* CONFIG_MSM_RPC_LOOPBACK_XPRT */
static inline int register_smd_loopback_driver(void)
{
return 0;
}
#endif
static int rpcrouter_smd_remote_probe(struct platform_device *pdev)
{
int rc;
smd_remote_xprt.xprt.name = "rpcrotuer_smd_xprt";
smd_remote_xprt.xprt.read_avail = rpcrouter_smd_remote_read_avail;
smd_remote_xprt.xprt.read = rpcrouter_smd_remote_read;
smd_remote_xprt.xprt.write_avail = rpcrouter_smd_remote_write_avail;
smd_remote_xprt.xprt.write = rpcrouter_smd_remote_write;
smd_remote_xprt.xprt.close = rpcrouter_smd_remote_close;
smd_remote_xprt.xprt.priv = NULL;
/* Open up SMD channel */
rc = smd_open("RPCCALL", &smd_remote_xprt.channel, NULL,
rpcrouter_smd_remote_notify);
if (rc < 0)
return rc;
smd_disable_read_intr(smd_remote_xprt.channel);
return 0;
}
static struct platform_driver rpcrouter_smd_remote_driver = {
.probe = rpcrouter_smd_remote_probe,
.driver = {
.name = "RPCCALL",
.owner = THIS_MODULE,
},
};
static int __init rpcrouter_smd_init(void)
{
int rc;
rc = register_smd_loopback_driver();
if (rc < 0)
return rc;
rc = register_smd_remote_qpsp_driver();
if (rc < 0)
return rc;
return platform_driver_register(&rpcrouter_smd_remote_driver);
}
module_init(rpcrouter_smd_init);
MODULE_DESCRIPTION("RPC Router SMD XPRT");
MODULE_LICENSE("GPL v2");
| gpl-2.0 |
MassStash/android_kernel_htc_msm8974 | arch/mips/vr41xx/common/pmu.c | 4693 | 3140 | /*
* pmu.c, Power Management Unit routines for NEC VR4100 series.
*
* Copyright (C) 2003-2007 Yoichi Yuasa <yuasa@linux-mips.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/pm.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <asm/cacheflush.h>
#include <asm/cpu.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/reboot.h>
#define PMU_TYPE1_BASE 0x0b0000a0UL
#define PMU_TYPE1_SIZE 0x0eUL
#define PMU_TYPE2_BASE 0x0f0000c0UL
#define PMU_TYPE2_SIZE 0x10UL
#define PMUCNT2REG 0x06
#define SOFTRST 0x0010
static void __iomem *pmu_base;
#define pmu_read(offset) readw(pmu_base + (offset))
#define pmu_write(offset, value) writew((value), pmu_base + (offset))
static void vr41xx_cpu_wait(void)
{
local_irq_disable();
if (!need_resched())
/*
* "standby" sets IE bit of the CP0_STATUS to 1.
*/
__asm__("standby;\n");
else
local_irq_enable();
}
static inline void software_reset(void)
{
uint16_t pmucnt2;
switch (current_cpu_type()) {
case CPU_VR4122:
case CPU_VR4131:
case CPU_VR4133:
pmucnt2 = pmu_read(PMUCNT2REG);
pmucnt2 |= SOFTRST;
pmu_write(PMUCNT2REG, pmucnt2);
break;
default:
set_c0_status(ST0_BEV | ST0_ERL);
change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
flush_cache_all();
write_c0_wired(0);
__asm__("jr %0"::"r"(0xbfc00000));
break;
}
}
static void vr41xx_restart(char *command)
{
local_irq_disable();
software_reset();
while (1) ;
}
static void vr41xx_halt(void)
{
local_irq_disable();
printk(KERN_NOTICE "\nYou can turn off the power supply\n");
__asm__("hibernate;\n");
}
static int __init vr41xx_pmu_init(void)
{
unsigned long start, size;
switch (current_cpu_type()) {
case CPU_VR4111:
case CPU_VR4121:
start = PMU_TYPE1_BASE;
size = PMU_TYPE1_SIZE;
break;
case CPU_VR4122:
case CPU_VR4131:
case CPU_VR4133:
start = PMU_TYPE2_BASE;
size = PMU_TYPE2_SIZE;
break;
default:
printk("Unexpected CPU of NEC VR4100 series\n");
return -ENODEV;
}
if (request_mem_region(start, size, "PMU") == NULL)
return -EBUSY;
pmu_base = ioremap(start, size);
if (pmu_base == NULL) {
release_mem_region(start, size);
return -EBUSY;
}
cpu_wait = vr41xx_cpu_wait;
_machine_restart = vr41xx_restart;
_machine_halt = vr41xx_halt;
pm_power_off = vr41xx_halt;
return 0;
}
core_initcall(vr41xx_pmu_init);
| gpl-2.0 |
sbreen94/Zeus_S4_r3 | arch/mips/lantiq/xway/prom-xway.c | 4693 | 1148 | /*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
* Copyright (C) 2010 John Crispin <blogic@openwrt.org>
*/
#include <linux/export.h>
#include <linux/clk.h>
#include <asm/bootinfo.h>
#include <asm/time.h>
#include <lantiq_soc.h>
#include "../prom.h"
#define SOC_DANUBE "Danube"
#define SOC_TWINPASS "Twinpass"
#define SOC_AR9 "AR9"
#define PART_SHIFT 12
#define PART_MASK 0x0FFFFFFF
#define REV_SHIFT 28
#define REV_MASK 0xF0000000
void __init ltq_soc_detect(struct ltq_soc_info *i)
{
i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT;
i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT;
switch (i->partnum) {
case SOC_ID_DANUBE1:
case SOC_ID_DANUBE2:
i->name = SOC_DANUBE;
i->type = SOC_TYPE_DANUBE;
break;
case SOC_ID_TWINPASS:
i->name = SOC_TWINPASS;
i->type = SOC_TYPE_DANUBE;
break;
case SOC_ID_ARX188:
case SOC_ID_ARX168:
case SOC_ID_ARX182:
i->name = SOC_AR9;
i->type = SOC_TYPE_AR9;
break;
default:
unreachable();
break;
}
}
| gpl-2.0 |
victormlourenco/kernel_msm | sound/soc/samsung/smdk_wm8994pcm.c | 4949 | 4126 | /*
* sound/soc/samsung/smdk_wm8994pcm.c
*
* Copyright (c) 2011 Samsung Electronics Co., Ltd
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/module.h>
#include <sound/soc.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include "../codecs/wm8994.h"
#include "dma.h"
#include "pcm.h"
/*
* Board Settings:
* o '1' means 'ON'
* o '0' means 'OFF'
* o 'X' means 'Don't care'
*
* SMDKC210, SMDKV310: CFG3- 1001, CFG5-1000, CFG7-111111
*/
/*
* Configure audio route as :-
* $ amixer sset 'DAC1' on,on
* $ amixer sset 'Right Headphone Mux' 'DAC'
* $ amixer sset 'Left Headphone Mux' 'DAC'
* $ amixer sset 'DAC1R Mixer AIF1.1' on
* $ amixer sset 'DAC1L Mixer AIF1.1' on
* $ amixer sset 'IN2L' on
* $ amixer sset 'IN2L PGA IN2LN' on
* $ amixer sset 'MIXINL IN2L' on
* $ amixer sset 'AIF1ADC1L Mixer ADC/DMIC' on
* $ amixer sset 'IN2R' on
* $ amixer sset 'IN2R PGA IN2RN' on
* $ amixer sset 'MIXINR IN2R' on
* $ amixer sset 'AIF1ADC1R Mixer ADC/DMIC' on
*/
/* SMDK has a 16.9344MHZ crystal attached to WM8994 */
#define SMDK_WM8994_FREQ 16934400
static int smdk_wm8994_pcm_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *codec_dai = rtd->codec_dai;
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
unsigned long mclk_freq;
int rfs, ret;
switch(params_rate(params)) {
case 8000:
rfs = 512;
break;
default:
dev_err(cpu_dai->dev, "%s:%d Sampling Rate %u not supported!\n",
__func__, __LINE__, params_rate(params));
return -EINVAL;
}
mclk_freq = params_rate(params) * rfs;
/* Set the codec DAI configuration */
ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_B
| SND_SOC_DAIFMT_IB_NF
| SND_SOC_DAIFMT_CBS_CFS);
if (ret < 0)
return ret;
/* Set the cpu DAI configuration */
ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_DSP_B
| SND_SOC_DAIFMT_IB_NF
| SND_SOC_DAIFMT_CBS_CFS);
if (ret < 0)
return ret;
ret = snd_soc_dai_set_sysclk(codec_dai, WM8994_SYSCLK_FLL1,
mclk_freq, SND_SOC_CLOCK_IN);
if (ret < 0)
return ret;
ret = snd_soc_dai_set_pll(codec_dai, WM8994_FLL1, WM8994_FLL_SRC_MCLK1,
SMDK_WM8994_FREQ, mclk_freq);
if (ret < 0)
return ret;
/* Set PCM source clock on CPU */
ret = snd_soc_dai_set_sysclk(cpu_dai, S3C_PCM_CLKSRC_MUX,
mclk_freq, SND_SOC_CLOCK_IN);
if (ret < 0)
return ret;
/* Set SCLK_DIV for making bclk */
ret = snd_soc_dai_set_clkdiv(cpu_dai, S3C_PCM_SCLK_PER_FS, rfs);
if (ret < 0)
return ret;
return 0;
}
static struct snd_soc_ops smdk_wm8994_pcm_ops = {
.hw_params = smdk_wm8994_pcm_hw_params,
};
static struct snd_soc_dai_link smdk_dai[] = {
{
.name = "WM8994 PAIF PCM",
.stream_name = "Primary PCM",
.cpu_dai_name = "samsung-pcm.0",
.codec_dai_name = "wm8994-aif1",
.platform_name = "samsung-audio",
.codec_name = "wm8994-codec",
.ops = &smdk_wm8994_pcm_ops,
},
};
static struct snd_soc_card smdk_pcm = {
.name = "SMDK-PCM",
.owner = THIS_MODULE,
.dai_link = smdk_dai,
.num_links = 1,
};
static int __devinit snd_smdk_probe(struct platform_device *pdev)
{
int ret = 0;
smdk_pcm.dev = &pdev->dev;
ret = snd_soc_register_card(&smdk_pcm);
if (ret) {
dev_err(&pdev->dev, "snd_soc_register_card failed %d\n", ret);
return ret;
}
return 0;
}
static int __devexit snd_smdk_remove(struct platform_device *pdev)
{
snd_soc_unregister_card(&smdk_pcm);
platform_set_drvdata(pdev, NULL);
return 0;
}
static struct platform_driver snd_smdk_driver = {
.driver = {
.owner = THIS_MODULE,
.name = "samsung-smdk-pcm",
},
.probe = snd_smdk_probe,
.remove = __devexit_p(snd_smdk_remove),
};
module_platform_driver(snd_smdk_driver);
MODULE_AUTHOR("Sangbeom Kim, <sbkim73@samsung.com>");
MODULE_DESCRIPTION("ALSA SoC SMDK WM8994 for PCM");
MODULE_LICENSE("GPL");
| gpl-2.0 |
TipsyOs-Devices/android_kernel_htc_msm8974 | sound/soc/samsung/smdk_wm8994pcm.c | 4949 | 4126 | /*
* sound/soc/samsung/smdk_wm8994pcm.c
*
* Copyright (c) 2011 Samsung Electronics Co., Ltd
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/module.h>
#include <sound/soc.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include "../codecs/wm8994.h"
#include "dma.h"
#include "pcm.h"
/*
* Board Settings:
* o '1' means 'ON'
* o '0' means 'OFF'
* o 'X' means 'Don't care'
*
* SMDKC210, SMDKV310: CFG3- 1001, CFG5-1000, CFG7-111111
*/
/*
* Configure audio route as :-
* $ amixer sset 'DAC1' on,on
* $ amixer sset 'Right Headphone Mux' 'DAC'
* $ amixer sset 'Left Headphone Mux' 'DAC'
* $ amixer sset 'DAC1R Mixer AIF1.1' on
* $ amixer sset 'DAC1L Mixer AIF1.1' on
* $ amixer sset 'IN2L' on
* $ amixer sset 'IN2L PGA IN2LN' on
* $ amixer sset 'MIXINL IN2L' on
* $ amixer sset 'AIF1ADC1L Mixer ADC/DMIC' on
* $ amixer sset 'IN2R' on
* $ amixer sset 'IN2R PGA IN2RN' on
* $ amixer sset 'MIXINR IN2R' on
* $ amixer sset 'AIF1ADC1R Mixer ADC/DMIC' on
*/
/* SMDK has a 16.9344MHZ crystal attached to WM8994 */
#define SMDK_WM8994_FREQ 16934400
static int smdk_wm8994_pcm_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *codec_dai = rtd->codec_dai;
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
unsigned long mclk_freq;
int rfs, ret;
switch(params_rate(params)) {
case 8000:
rfs = 512;
break;
default:
dev_err(cpu_dai->dev, "%s:%d Sampling Rate %u not supported!\n",
__func__, __LINE__, params_rate(params));
return -EINVAL;
}
mclk_freq = params_rate(params) * rfs;
/* Set the codec DAI configuration */
ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_B
| SND_SOC_DAIFMT_IB_NF
| SND_SOC_DAIFMT_CBS_CFS);
if (ret < 0)
return ret;
/* Set the cpu DAI configuration */
ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_DSP_B
| SND_SOC_DAIFMT_IB_NF
| SND_SOC_DAIFMT_CBS_CFS);
if (ret < 0)
return ret;
ret = snd_soc_dai_set_sysclk(codec_dai, WM8994_SYSCLK_FLL1,
mclk_freq, SND_SOC_CLOCK_IN);
if (ret < 0)
return ret;
ret = snd_soc_dai_set_pll(codec_dai, WM8994_FLL1, WM8994_FLL_SRC_MCLK1,
SMDK_WM8994_FREQ, mclk_freq);
if (ret < 0)
return ret;
/* Set PCM source clock on CPU */
ret = snd_soc_dai_set_sysclk(cpu_dai, S3C_PCM_CLKSRC_MUX,
mclk_freq, SND_SOC_CLOCK_IN);
if (ret < 0)
return ret;
/* Set SCLK_DIV for making bclk */
ret = snd_soc_dai_set_clkdiv(cpu_dai, S3C_PCM_SCLK_PER_FS, rfs);
if (ret < 0)
return ret;
return 0;
}
static struct snd_soc_ops smdk_wm8994_pcm_ops = {
.hw_params = smdk_wm8994_pcm_hw_params,
};
static struct snd_soc_dai_link smdk_dai[] = {
{
.name = "WM8994 PAIF PCM",
.stream_name = "Primary PCM",
.cpu_dai_name = "samsung-pcm.0",
.codec_dai_name = "wm8994-aif1",
.platform_name = "samsung-audio",
.codec_name = "wm8994-codec",
.ops = &smdk_wm8994_pcm_ops,
},
};
static struct snd_soc_card smdk_pcm = {
.name = "SMDK-PCM",
.owner = THIS_MODULE,
.dai_link = smdk_dai,
.num_links = 1,
};
static int __devinit snd_smdk_probe(struct platform_device *pdev)
{
int ret = 0;
smdk_pcm.dev = &pdev->dev;
ret = snd_soc_register_card(&smdk_pcm);
if (ret) {
dev_err(&pdev->dev, "snd_soc_register_card failed %d\n", ret);
return ret;
}
return 0;
}
static int __devexit snd_smdk_remove(struct platform_device *pdev)
{
snd_soc_unregister_card(&smdk_pcm);
platform_set_drvdata(pdev, NULL);
return 0;
}
static struct platform_driver snd_smdk_driver = {
.driver = {
.owner = THIS_MODULE,
.name = "samsung-smdk-pcm",
},
.probe = snd_smdk_probe,
.remove = __devexit_p(snd_smdk_remove),
};
module_platform_driver(snd_smdk_driver);
MODULE_AUTHOR("Sangbeom Kim, <sbkim73@samsung.com>");
MODULE_DESCRIPTION("ALSA SoC SMDK WM8994 for PCM");
MODULE_LICENSE("GPL");
| gpl-2.0 |
KylinUI/android_kernel_samsung_exynos5410 | net/dccp/feat.c | 4949 | 48261 | /*
* net/dccp/feat.c
*
* Feature negotiation for the DCCP protocol (RFC 4340, section 6)
*
* Copyright (c) 2008 Gerrit Renker <gerrit@erg.abdn.ac.uk>
* Rewrote from scratch, some bits from earlier code by
* Copyright (c) 2005 Andrea Bittau <a.bittau@cs.ucl.ac.uk>
*
*
* ASSUMPTIONS
* -----------
* o Feature negotiation is coordinated with connection setup (as in TCP), wild
* changes of parameters of an established connection are not supported.
* o Changing non-negotiable (NN) values is supported in state OPEN/PARTOPEN.
* o All currently known SP features have 1-byte quantities. If in the future
* extensions of RFCs 4340..42 define features with item lengths larger than
* one byte, a feature-specific extension of the code will be required.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/module.h>
#include <linux/slab.h>
#include "ccid.h"
#include "feat.h"
/* feature-specific sysctls - initialised to the defaults from RFC 4340, 6.4 */
unsigned long sysctl_dccp_sequence_window __read_mostly = 100;
int sysctl_dccp_rx_ccid __read_mostly = 2,
sysctl_dccp_tx_ccid __read_mostly = 2;
/*
* Feature activation handlers.
*
* These all use an u64 argument, to provide enough room for NN/SP features. At
* this stage the negotiated values have been checked to be within their range.
*/
static int dccp_hdlr_ccid(struct sock *sk, u64 ccid, bool rx)
{
struct dccp_sock *dp = dccp_sk(sk);
struct ccid *new_ccid = ccid_new(ccid, sk, rx);
if (new_ccid == NULL)
return -ENOMEM;
if (rx) {
ccid_hc_rx_delete(dp->dccps_hc_rx_ccid, sk);
dp->dccps_hc_rx_ccid = new_ccid;
} else {
ccid_hc_tx_delete(dp->dccps_hc_tx_ccid, sk);
dp->dccps_hc_tx_ccid = new_ccid;
}
return 0;
}
static int dccp_hdlr_seq_win(struct sock *sk, u64 seq_win, bool rx)
{
struct dccp_sock *dp = dccp_sk(sk);
if (rx) {
dp->dccps_r_seq_win = seq_win;
/* propagate changes to update SWL/SWH */
dccp_update_gsr(sk, dp->dccps_gsr);
} else {
dp->dccps_l_seq_win = seq_win;
/* propagate changes to update AWL */
dccp_update_gss(sk, dp->dccps_gss);
}
return 0;
}
static int dccp_hdlr_ack_ratio(struct sock *sk, u64 ratio, bool rx)
{
if (rx)
dccp_sk(sk)->dccps_r_ack_ratio = ratio;
else
dccp_sk(sk)->dccps_l_ack_ratio = ratio;
return 0;
}
static int dccp_hdlr_ackvec(struct sock *sk, u64 enable, bool rx)
{
struct dccp_sock *dp = dccp_sk(sk);
if (rx) {
if (enable && dp->dccps_hc_rx_ackvec == NULL) {
dp->dccps_hc_rx_ackvec = dccp_ackvec_alloc(gfp_any());
if (dp->dccps_hc_rx_ackvec == NULL)
return -ENOMEM;
} else if (!enable) {
dccp_ackvec_free(dp->dccps_hc_rx_ackvec);
dp->dccps_hc_rx_ackvec = NULL;
}
}
return 0;
}
static int dccp_hdlr_ndp(struct sock *sk, u64 enable, bool rx)
{
if (!rx)
dccp_sk(sk)->dccps_send_ndp_count = (enable > 0);
return 0;
}
/*
* Minimum Checksum Coverage is located at the RX side (9.2.1). This means that
* `rx' holds when the sending peer informs about his partial coverage via a
* ChangeR() option. In the other case, we are the sender and the receiver
* announces its coverage via ChangeL() options. The policy here is to honour
* such communication by enabling the corresponding partial coverage - but only
* if it has not been set manually before; the warning here means that all
* packets will be dropped.
*/
static int dccp_hdlr_min_cscov(struct sock *sk, u64 cscov, bool rx)
{
struct dccp_sock *dp = dccp_sk(sk);
if (rx)
dp->dccps_pcrlen = cscov;
else {
if (dp->dccps_pcslen == 0)
dp->dccps_pcslen = cscov;
else if (cscov > dp->dccps_pcslen)
DCCP_WARN("CsCov %u too small, peer requires >= %u\n",
dp->dccps_pcslen, (u8)cscov);
}
return 0;
}
static const struct {
u8 feat_num; /* DCCPF_xxx */
enum dccp_feat_type rxtx; /* RX or TX */
enum dccp_feat_type reconciliation; /* SP or NN */
u8 default_value; /* as in 6.4 */
int (*activation_hdlr)(struct sock *sk, u64 val, bool rx);
/*
* Lookup table for location and type of features (from RFC 4340/4342)
* +--------------------------+----+-----+----+----+---------+-----------+
* | Feature | Location | Reconc. | Initial | Section |
* | | RX | TX | SP | NN | Value | Reference |
* +--------------------------+----+-----+----+----+---------+-----------+
* | DCCPF_CCID | | X | X | | 2 | 10 |
* | DCCPF_SHORT_SEQNOS | | X | X | | 0 | 7.6.1 |
* | DCCPF_SEQUENCE_WINDOW | | X | | X | 100 | 7.5.2 |
* | DCCPF_ECN_INCAPABLE | X | | X | | 0 | 12.1 |
* | DCCPF_ACK_RATIO | | X | | X | 2 | 11.3 |
* | DCCPF_SEND_ACK_VECTOR | X | | X | | 0 | 11.5 |
* | DCCPF_SEND_NDP_COUNT | | X | X | | 0 | 7.7.2 |
* | DCCPF_MIN_CSUM_COVER | X | | X | | 0 | 9.2.1 |
* | DCCPF_DATA_CHECKSUM | X | | X | | 0 | 9.3.1 |
* | DCCPF_SEND_LEV_RATE | X | | X | | 0 | 4342/8.4 |
* +--------------------------+----+-----+----+----+---------+-----------+
*/
} dccp_feat_table[] = {
{ DCCPF_CCID, FEAT_AT_TX, FEAT_SP, 2, dccp_hdlr_ccid },
{ DCCPF_SHORT_SEQNOS, FEAT_AT_TX, FEAT_SP, 0, NULL },
{ DCCPF_SEQUENCE_WINDOW, FEAT_AT_TX, FEAT_NN, 100, dccp_hdlr_seq_win },
{ DCCPF_ECN_INCAPABLE, FEAT_AT_RX, FEAT_SP, 0, NULL },
{ DCCPF_ACK_RATIO, FEAT_AT_TX, FEAT_NN, 2, dccp_hdlr_ack_ratio},
{ DCCPF_SEND_ACK_VECTOR, FEAT_AT_RX, FEAT_SP, 0, dccp_hdlr_ackvec },
{ DCCPF_SEND_NDP_COUNT, FEAT_AT_TX, FEAT_SP, 0, dccp_hdlr_ndp },
{ DCCPF_MIN_CSUM_COVER, FEAT_AT_RX, FEAT_SP, 0, dccp_hdlr_min_cscov},
{ DCCPF_DATA_CHECKSUM, FEAT_AT_RX, FEAT_SP, 0, NULL },
{ DCCPF_SEND_LEV_RATE, FEAT_AT_RX, FEAT_SP, 0, NULL },
};
#define DCCP_FEAT_SUPPORTED_MAX ARRAY_SIZE(dccp_feat_table)
/**
* dccp_feat_index - Hash function to map feature number into array position
* Returns consecutive array index or -1 if the feature is not understood.
*/
static int dccp_feat_index(u8 feat_num)
{
/* The first 9 entries are occupied by the types from RFC 4340, 6.4 */
if (feat_num > DCCPF_RESERVED && feat_num <= DCCPF_DATA_CHECKSUM)
return feat_num - 1;
/*
* Other features: add cases for new feature types here after adding
* them to the above table.
*/
switch (feat_num) {
case DCCPF_SEND_LEV_RATE:
return DCCP_FEAT_SUPPORTED_MAX - 1;
}
return -1;
}
static u8 dccp_feat_type(u8 feat_num)
{
int idx = dccp_feat_index(feat_num);
if (idx < 0)
return FEAT_UNKNOWN;
return dccp_feat_table[idx].reconciliation;
}
static int dccp_feat_default_value(u8 feat_num)
{
int idx = dccp_feat_index(feat_num);
/*
* There are no default values for unknown features, so encountering a
* negative index here indicates a serious problem somewhere else.
*/
DCCP_BUG_ON(idx < 0);
return idx < 0 ? 0 : dccp_feat_table[idx].default_value;
}
/*
* Debugging and verbose-printing section
*/
static const char *dccp_feat_fname(const u8 feat)
{
static const char *const feature_names[] = {
[DCCPF_RESERVED] = "Reserved",
[DCCPF_CCID] = "CCID",
[DCCPF_SHORT_SEQNOS] = "Allow Short Seqnos",
[DCCPF_SEQUENCE_WINDOW] = "Sequence Window",
[DCCPF_ECN_INCAPABLE] = "ECN Incapable",
[DCCPF_ACK_RATIO] = "Ack Ratio",
[DCCPF_SEND_ACK_VECTOR] = "Send ACK Vector",
[DCCPF_SEND_NDP_COUNT] = "Send NDP Count",
[DCCPF_MIN_CSUM_COVER] = "Min. Csum Coverage",
[DCCPF_DATA_CHECKSUM] = "Send Data Checksum",
};
if (feat > DCCPF_DATA_CHECKSUM && feat < DCCPF_MIN_CCID_SPECIFIC)
return feature_names[DCCPF_RESERVED];
if (feat == DCCPF_SEND_LEV_RATE)
return "Send Loss Event Rate";
if (feat >= DCCPF_MIN_CCID_SPECIFIC)
return "CCID-specific";
return feature_names[feat];
}
static const char *const dccp_feat_sname[] = {
"DEFAULT", "INITIALISING", "CHANGING", "UNSTABLE", "STABLE",
};
#ifdef CONFIG_IP_DCCP_DEBUG
static const char *dccp_feat_oname(const u8 opt)
{
switch (opt) {
case DCCPO_CHANGE_L: return "Change_L";
case DCCPO_CONFIRM_L: return "Confirm_L";
case DCCPO_CHANGE_R: return "Change_R";
case DCCPO_CONFIRM_R: return "Confirm_R";
}
return NULL;
}
static void dccp_feat_printval(u8 feat_num, dccp_feat_val const *val)
{
u8 i, type = dccp_feat_type(feat_num);
if (val == NULL || (type == FEAT_SP && val->sp.vec == NULL))
dccp_pr_debug_cat("(NULL)");
else if (type == FEAT_SP)
for (i = 0; i < val->sp.len; i++)
dccp_pr_debug_cat("%s%u", i ? " " : "", val->sp.vec[i]);
else if (type == FEAT_NN)
dccp_pr_debug_cat("%llu", (unsigned long long)val->nn);
else
dccp_pr_debug_cat("unknown type %u", type);
}
static void dccp_feat_printvals(u8 feat_num, u8 *list, u8 len)
{
u8 type = dccp_feat_type(feat_num);
dccp_feat_val fval = { .sp.vec = list, .sp.len = len };
if (type == FEAT_NN)
fval.nn = dccp_decode_value_var(list, len);
dccp_feat_printval(feat_num, &fval);
}
static void dccp_feat_print_entry(struct dccp_feat_entry const *entry)
{
dccp_debug(" * %s %s = ", entry->is_local ? "local" : "remote",
dccp_feat_fname(entry->feat_num));
dccp_feat_printval(entry->feat_num, &entry->val);
dccp_pr_debug_cat(", state=%s %s\n", dccp_feat_sname[entry->state],
entry->needs_confirm ? "(Confirm pending)" : "");
}
#define dccp_feat_print_opt(opt, feat, val, len, mandatory) do { \
dccp_pr_debug("%s(%s, ", dccp_feat_oname(opt), dccp_feat_fname(feat));\
dccp_feat_printvals(feat, val, len); \
dccp_pr_debug_cat(") %s\n", mandatory ? "!" : ""); } while (0)
#define dccp_feat_print_fnlist(fn_list) { \
const struct dccp_feat_entry *___entry; \
\
dccp_pr_debug("List Dump:\n"); \
list_for_each_entry(___entry, fn_list, node) \
dccp_feat_print_entry(___entry); \
}
#else /* ! CONFIG_IP_DCCP_DEBUG */
#define dccp_feat_print_opt(opt, feat, val, len, mandatory)
#define dccp_feat_print_fnlist(fn_list)
#endif
static int __dccp_feat_activate(struct sock *sk, const int idx,
const bool is_local, dccp_feat_val const *fval)
{
bool rx;
u64 val;
if (idx < 0 || idx >= DCCP_FEAT_SUPPORTED_MAX)
return -1;
if (dccp_feat_table[idx].activation_hdlr == NULL)
return 0;
if (fval == NULL) {
val = dccp_feat_table[idx].default_value;
} else if (dccp_feat_table[idx].reconciliation == FEAT_SP) {
if (fval->sp.vec == NULL) {
/*
* This can happen when an empty Confirm is sent
* for an SP (i.e. known) feature. In this case
* we would be using the default anyway.
*/
DCCP_CRIT("Feature #%d undefined: using default", idx);
val = dccp_feat_table[idx].default_value;
} else {
val = fval->sp.vec[0];
}
} else {
val = fval->nn;
}
/* Location is RX if this is a local-RX or remote-TX feature */
rx = (is_local == (dccp_feat_table[idx].rxtx == FEAT_AT_RX));
dccp_debug(" -> activating %s %s, %sval=%llu\n", rx ? "RX" : "TX",
dccp_feat_fname(dccp_feat_table[idx].feat_num),
fval ? "" : "default ", (unsigned long long)val);
return dccp_feat_table[idx].activation_hdlr(sk, val, rx);
}
/**
* dccp_feat_activate - Activate feature value on socket
* @sk: fully connected DCCP socket (after handshake is complete)
* @feat_num: feature to activate, one of %dccp_feature_numbers
* @local: whether local (1) or remote (0) @feat_num is meant
* @fval: the value (SP or NN) to activate, or NULL to use the default value
* For general use this function is preferable over __dccp_feat_activate().
*/
static int dccp_feat_activate(struct sock *sk, u8 feat_num, bool local,
dccp_feat_val const *fval)
{
return __dccp_feat_activate(sk, dccp_feat_index(feat_num), local, fval);
}
/* Test for "Req'd" feature (RFC 4340, 6.4) */
static inline int dccp_feat_must_be_understood(u8 feat_num)
{
return feat_num == DCCPF_CCID || feat_num == DCCPF_SHORT_SEQNOS ||
feat_num == DCCPF_SEQUENCE_WINDOW;
}
/* copy constructor, fval must not already contain allocated memory */
static int dccp_feat_clone_sp_val(dccp_feat_val *fval, u8 const *val, u8 len)
{
fval->sp.len = len;
if (fval->sp.len > 0) {
fval->sp.vec = kmemdup(val, len, gfp_any());
if (fval->sp.vec == NULL) {
fval->sp.len = 0;
return -ENOBUFS;
}
}
return 0;
}
static void dccp_feat_val_destructor(u8 feat_num, dccp_feat_val *val)
{
if (unlikely(val == NULL))
return;
if (dccp_feat_type(feat_num) == FEAT_SP)
kfree(val->sp.vec);
memset(val, 0, sizeof(*val));
}
static struct dccp_feat_entry *
dccp_feat_clone_entry(struct dccp_feat_entry const *original)
{
struct dccp_feat_entry *new;
u8 type = dccp_feat_type(original->feat_num);
if (type == FEAT_UNKNOWN)
return NULL;
new = kmemdup(original, sizeof(struct dccp_feat_entry), gfp_any());
if (new == NULL)
return NULL;
if (type == FEAT_SP && dccp_feat_clone_sp_val(&new->val,
original->val.sp.vec,
original->val.sp.len)) {
kfree(new);
return NULL;
}
return new;
}
static void dccp_feat_entry_destructor(struct dccp_feat_entry *entry)
{
if (entry != NULL) {
dccp_feat_val_destructor(entry->feat_num, &entry->val);
kfree(entry);
}
}
/*
* List management functions
*
* Feature negotiation lists rely on and maintain the following invariants:
* - each feat_num in the list is known, i.e. we know its type and default value
* - each feat_num/is_local combination is unique (old entries are overwritten)
* - SP values are always freshly allocated
* - list is sorted in increasing order of feature number (faster lookup)
*/
static struct dccp_feat_entry *dccp_feat_list_lookup(struct list_head *fn_list,
u8 feat_num, bool is_local)
{
struct dccp_feat_entry *entry;
list_for_each_entry(entry, fn_list, node) {
if (entry->feat_num == feat_num && entry->is_local == is_local)
return entry;
else if (entry->feat_num > feat_num)
break;
}
return NULL;
}
/**
* dccp_feat_entry_new - Central list update routine (called by all others)
* @head: list to add to
* @feat: feature number
* @local: whether the local (1) or remote feature with number @feat is meant
* This is the only constructor and serves to ensure the above invariants.
*/
static struct dccp_feat_entry *
dccp_feat_entry_new(struct list_head *head, u8 feat, bool local)
{
struct dccp_feat_entry *entry;
list_for_each_entry(entry, head, node)
if (entry->feat_num == feat && entry->is_local == local) {
dccp_feat_val_destructor(entry->feat_num, &entry->val);
return entry;
} else if (entry->feat_num > feat) {
head = &entry->node;
break;
}
entry = kmalloc(sizeof(*entry), gfp_any());
if (entry != NULL) {
entry->feat_num = feat;
entry->is_local = local;
list_add_tail(&entry->node, head);
}
return entry;
}
/**
* dccp_feat_push_change - Add/overwrite a Change option in the list
* @fn_list: feature-negotiation list to update
* @feat: one of %dccp_feature_numbers
* @local: whether local (1) or remote (0) @feat_num is meant
* @needs_mandatory: whether to use Mandatory feature negotiation options
* @fval: pointer to NN/SP value to be inserted (will be copied)
*/
static int dccp_feat_push_change(struct list_head *fn_list, u8 feat, u8 local,
u8 mandatory, dccp_feat_val *fval)
{
struct dccp_feat_entry *new = dccp_feat_entry_new(fn_list, feat, local);
if (new == NULL)
return -ENOMEM;
new->feat_num = feat;
new->is_local = local;
new->state = FEAT_INITIALISING;
new->needs_confirm = false;
new->empty_confirm = false;
new->val = *fval;
new->needs_mandatory = mandatory;
return 0;
}
/**
* dccp_feat_push_confirm - Add a Confirm entry to the FN list
* @fn_list: feature-negotiation list to add to
* @feat: one of %dccp_feature_numbers
* @local: whether local (1) or remote (0) @feat_num is being confirmed
* @fval: pointer to NN/SP value to be inserted or NULL
* Returns 0 on success, a Reset code for further processing otherwise.
*/
static int dccp_feat_push_confirm(struct list_head *fn_list, u8 feat, u8 local,
dccp_feat_val *fval)
{
struct dccp_feat_entry *new = dccp_feat_entry_new(fn_list, feat, local);
if (new == NULL)
return DCCP_RESET_CODE_TOO_BUSY;
new->feat_num = feat;
new->is_local = local;
new->state = FEAT_STABLE; /* transition in 6.6.2 */
new->needs_confirm = true;
new->empty_confirm = (fval == NULL);
new->val.nn = 0; /* zeroes the whole structure */
if (!new->empty_confirm)
new->val = *fval;
new->needs_mandatory = false;
return 0;
}
static int dccp_push_empty_confirm(struct list_head *fn_list, u8 feat, u8 local)
{
return dccp_feat_push_confirm(fn_list, feat, local, NULL);
}
static inline void dccp_feat_list_pop(struct dccp_feat_entry *entry)
{
list_del(&entry->node);
dccp_feat_entry_destructor(entry);
}
void dccp_feat_list_purge(struct list_head *fn_list)
{
struct dccp_feat_entry *entry, *next;
list_for_each_entry_safe(entry, next, fn_list, node)
dccp_feat_entry_destructor(entry);
INIT_LIST_HEAD(fn_list);
}
EXPORT_SYMBOL_GPL(dccp_feat_list_purge);
/* generate @to as full clone of @from - @to must not contain any nodes */
int dccp_feat_clone_list(struct list_head const *from, struct list_head *to)
{
struct dccp_feat_entry *entry, *new;
INIT_LIST_HEAD(to);
list_for_each_entry(entry, from, node) {
new = dccp_feat_clone_entry(entry);
if (new == NULL)
goto cloning_failed;
list_add_tail(&new->node, to);
}
return 0;
cloning_failed:
dccp_feat_list_purge(to);
return -ENOMEM;
}
/**
* dccp_feat_valid_nn_length - Enforce length constraints on NN options
* Length is between 0 and %DCCP_OPTVAL_MAXLEN. Used for outgoing packets only,
* incoming options are accepted as long as their values are valid.
*/
static u8 dccp_feat_valid_nn_length(u8 feat_num)
{
if (feat_num == DCCPF_ACK_RATIO) /* RFC 4340, 11.3 and 6.6.8 */
return 2;
if (feat_num == DCCPF_SEQUENCE_WINDOW) /* RFC 4340, 7.5.2 and 6.5 */
return 6;
return 0;
}
static u8 dccp_feat_is_valid_nn_val(u8 feat_num, u64 val)
{
switch (feat_num) {
case DCCPF_ACK_RATIO:
return val <= DCCPF_ACK_RATIO_MAX;
case DCCPF_SEQUENCE_WINDOW:
return val >= DCCPF_SEQ_WMIN && val <= DCCPF_SEQ_WMAX;
}
return 0; /* feature unknown - so we can't tell */
}
/* check that SP values are within the ranges defined in RFC 4340 */
static u8 dccp_feat_is_valid_sp_val(u8 feat_num, u8 val)
{
switch (feat_num) {
case DCCPF_CCID:
return val == DCCPC_CCID2 || val == DCCPC_CCID3;
/* Type-check Boolean feature values: */
case DCCPF_SHORT_SEQNOS:
case DCCPF_ECN_INCAPABLE:
case DCCPF_SEND_ACK_VECTOR:
case DCCPF_SEND_NDP_COUNT:
case DCCPF_DATA_CHECKSUM:
case DCCPF_SEND_LEV_RATE:
return val < 2;
case DCCPF_MIN_CSUM_COVER:
return val < 16;
}
return 0; /* feature unknown */
}
static u8 dccp_feat_sp_list_ok(u8 feat_num, u8 const *sp_list, u8 sp_len)
{
if (sp_list == NULL || sp_len < 1)
return 0;
while (sp_len--)
if (!dccp_feat_is_valid_sp_val(feat_num, *sp_list++))
return 0;
return 1;
}
/**
* dccp_feat_insert_opts - Generate FN options from current list state
* @skb: next sk_buff to be sent to the peer
* @dp: for client during handshake and general negotiation
* @dreq: used by the server only (all Changes/Confirms in LISTEN/RESPOND)
*/
int dccp_feat_insert_opts(struct dccp_sock *dp, struct dccp_request_sock *dreq,
struct sk_buff *skb)
{
struct list_head *fn = dreq ? &dreq->dreq_featneg : &dp->dccps_featneg;
struct dccp_feat_entry *pos, *next;
u8 opt, type, len, *ptr, nn_in_nbo[DCCP_OPTVAL_MAXLEN];
bool rpt;
/* put entries into @skb in the order they appear in the list */
list_for_each_entry_safe_reverse(pos, next, fn, node) {
opt = dccp_feat_genopt(pos);
type = dccp_feat_type(pos->feat_num);
rpt = false;
if (pos->empty_confirm) {
len = 0;
ptr = NULL;
} else {
if (type == FEAT_SP) {
len = pos->val.sp.len;
ptr = pos->val.sp.vec;
rpt = pos->needs_confirm;
} else if (type == FEAT_NN) {
len = dccp_feat_valid_nn_length(pos->feat_num);
ptr = nn_in_nbo;
dccp_encode_value_var(pos->val.nn, ptr, len);
} else {
DCCP_BUG("unknown feature %u", pos->feat_num);
return -1;
}
}
dccp_feat_print_opt(opt, pos->feat_num, ptr, len, 0);
if (dccp_insert_fn_opt(skb, opt, pos->feat_num, ptr, len, rpt))
return -1;
if (pos->needs_mandatory && dccp_insert_option_mandatory(skb))
return -1;
if (skb->sk->sk_state == DCCP_OPEN &&
(opt == DCCPO_CONFIRM_R || opt == DCCPO_CONFIRM_L)) {
/*
* Confirms don't get retransmitted (6.6.3) once the
* connection is in state OPEN
*/
dccp_feat_list_pop(pos);
} else {
/*
* Enter CHANGING after transmitting the Change
* option (6.6.2).
*/
if (pos->state == FEAT_INITIALISING)
pos->state = FEAT_CHANGING;
}
}
return 0;
}
/**
* __feat_register_nn - Register new NN value on socket
* @fn: feature-negotiation list to register with
* @feat: an NN feature from %dccp_feature_numbers
* @mandatory: use Mandatory option if 1
* @nn_val: value to register (restricted to 4 bytes)
* Note that NN features are local by definition (RFC 4340, 6.3.2).
*/
static int __feat_register_nn(struct list_head *fn, u8 feat,
u8 mandatory, u64 nn_val)
{
dccp_feat_val fval = { .nn = nn_val };
if (dccp_feat_type(feat) != FEAT_NN ||
!dccp_feat_is_valid_nn_val(feat, nn_val))
return -EINVAL;
/* Don't bother with default values, they will be activated anyway. */
if (nn_val - (u64)dccp_feat_default_value(feat) == 0)
return 0;
return dccp_feat_push_change(fn, feat, 1, mandatory, &fval);
}
/**
* __feat_register_sp - Register new SP value/list on socket
* @fn: feature-negotiation list to register with
* @feat: an SP feature from %dccp_feature_numbers
* @is_local: whether the local (1) or the remote (0) @feat is meant
* @mandatory: use Mandatory option if 1
* @sp_val: SP value followed by optional preference list
* @sp_len: length of @sp_val in bytes
*/
static int __feat_register_sp(struct list_head *fn, u8 feat, u8 is_local,
u8 mandatory, u8 const *sp_val, u8 sp_len)
{
dccp_feat_val fval;
if (dccp_feat_type(feat) != FEAT_SP ||
!dccp_feat_sp_list_ok(feat, sp_val, sp_len))
return -EINVAL;
/* Avoid negotiating alien CCIDs by only advertising supported ones */
if (feat == DCCPF_CCID && !ccid_support_check(sp_val, sp_len))
return -EOPNOTSUPP;
if (dccp_feat_clone_sp_val(&fval, sp_val, sp_len))
return -ENOMEM;
return dccp_feat_push_change(fn, feat, is_local, mandatory, &fval);
}
/**
* dccp_feat_register_sp - Register requests to change SP feature values
* @sk: client or listening socket
* @feat: one of %dccp_feature_numbers
* @is_local: whether the local (1) or remote (0) @feat is meant
* @list: array of preferred values, in descending order of preference
* @len: length of @list in bytes
*/
int dccp_feat_register_sp(struct sock *sk, u8 feat, u8 is_local,
u8 const *list, u8 len)
{ /* any changes must be registered before establishing the connection */
if (sk->sk_state != DCCP_CLOSED)
return -EISCONN;
if (dccp_feat_type(feat) != FEAT_SP)
return -EINVAL;
return __feat_register_sp(&dccp_sk(sk)->dccps_featneg, feat, is_local,
0, list, len);
}
/**
* dccp_feat_nn_get - Query current/pending value of NN feature
* @sk: DCCP socket of an established connection
* @feat: NN feature number from %dccp_feature_numbers
* For a known NN feature, returns value currently being negotiated, or
* current (confirmed) value if no negotiation is going on.
*/
u64 dccp_feat_nn_get(struct sock *sk, u8 feat)
{
if (dccp_feat_type(feat) == FEAT_NN) {
struct dccp_sock *dp = dccp_sk(sk);
struct dccp_feat_entry *entry;
entry = dccp_feat_list_lookup(&dp->dccps_featneg, feat, 1);
if (entry != NULL)
return entry->val.nn;
switch (feat) {
case DCCPF_ACK_RATIO:
return dp->dccps_l_ack_ratio;
case DCCPF_SEQUENCE_WINDOW:
return dp->dccps_l_seq_win;
}
}
DCCP_BUG("attempt to look up unsupported feature %u", feat);
return 0;
}
EXPORT_SYMBOL_GPL(dccp_feat_nn_get);
/**
* dccp_feat_signal_nn_change - Update NN values for an established connection
* @sk: DCCP socket of an established connection
* @feat: NN feature number from %dccp_feature_numbers
* @nn_val: the new value to use
* This function is used to communicate NN updates out-of-band.
*/
int dccp_feat_signal_nn_change(struct sock *sk, u8 feat, u64 nn_val)
{
struct list_head *fn = &dccp_sk(sk)->dccps_featneg;
dccp_feat_val fval = { .nn = nn_val };
struct dccp_feat_entry *entry;
if (sk->sk_state != DCCP_OPEN && sk->sk_state != DCCP_PARTOPEN)
return 0;
if (dccp_feat_type(feat) != FEAT_NN ||
!dccp_feat_is_valid_nn_val(feat, nn_val))
return -EINVAL;
if (nn_val == dccp_feat_nn_get(sk, feat))
return 0; /* already set or negotiation under way */
entry = dccp_feat_list_lookup(fn, feat, 1);
if (entry != NULL) {
dccp_pr_debug("Clobbering existing NN entry %llu -> %llu\n",
(unsigned long long)entry->val.nn,
(unsigned long long)nn_val);
dccp_feat_list_pop(entry);
}
inet_csk_schedule_ack(sk);
return dccp_feat_push_change(fn, feat, 1, 0, &fval);
}
EXPORT_SYMBOL_GPL(dccp_feat_signal_nn_change);
/*
* Tracking features whose value depend on the choice of CCID
*
* This is designed with an extension in mind so that a list walk could be done
* before activating any features. However, the existing framework was found to
* work satisfactorily up until now, the automatic verification is left open.
* When adding new CCIDs, add a corresponding dependency table here.
*/
static const struct ccid_dependency *dccp_feat_ccid_deps(u8 ccid, bool is_local)
{
static const struct ccid_dependency ccid2_dependencies[2][2] = {
/*
* CCID2 mandates Ack Vectors (RFC 4341, 4.): as CCID is a TX
* feature and Send Ack Vector is an RX feature, `is_local'
* needs to be reversed.
*/
{ /* Dependencies of the receiver-side (remote) CCID2 */
{
.dependent_feat = DCCPF_SEND_ACK_VECTOR,
.is_local = true,
.is_mandatory = true,
.val = 1
},
{ 0, 0, 0, 0 }
},
{ /* Dependencies of the sender-side (local) CCID2 */
{
.dependent_feat = DCCPF_SEND_ACK_VECTOR,
.is_local = false,
.is_mandatory = true,
.val = 1
},
{ 0, 0, 0, 0 }
}
};
static const struct ccid_dependency ccid3_dependencies[2][5] = {
{ /*
* Dependencies of the receiver-side CCID3
*/
{ /* locally disable Ack Vectors */
.dependent_feat = DCCPF_SEND_ACK_VECTOR,
.is_local = true,
.is_mandatory = false,
.val = 0
},
{ /* see below why Send Loss Event Rate is on */
.dependent_feat = DCCPF_SEND_LEV_RATE,
.is_local = true,
.is_mandatory = true,
.val = 1
},
{ /* NDP Count is needed as per RFC 4342, 6.1.1 */
.dependent_feat = DCCPF_SEND_NDP_COUNT,
.is_local = false,
.is_mandatory = true,
.val = 1
},
{ 0, 0, 0, 0 },
},
{ /*
* CCID3 at the TX side: we request that the HC-receiver
* will not send Ack Vectors (they will be ignored, so
* Mandatory is not set); we enable Send Loss Event Rate
* (Mandatory since the implementation does not support
* the Loss Intervals option of RFC 4342, 8.6).
* The last two options are for peer's information only.
*/
{
.dependent_feat = DCCPF_SEND_ACK_VECTOR,
.is_local = false,
.is_mandatory = false,
.val = 0
},
{
.dependent_feat = DCCPF_SEND_LEV_RATE,
.is_local = false,
.is_mandatory = true,
.val = 1
},
{ /* this CCID does not support Ack Ratio */
.dependent_feat = DCCPF_ACK_RATIO,
.is_local = true,
.is_mandatory = false,
.val = 0
},
{ /* tell receiver we are sending NDP counts */
.dependent_feat = DCCPF_SEND_NDP_COUNT,
.is_local = true,
.is_mandatory = false,
.val = 1
},
{ 0, 0, 0, 0 }
}
};
switch (ccid) {
case DCCPC_CCID2:
return ccid2_dependencies[is_local];
case DCCPC_CCID3:
return ccid3_dependencies[is_local];
default:
return NULL;
}
}
/**
* dccp_feat_propagate_ccid - Resolve dependencies of features on choice of CCID
* @fn: feature-negotiation list to update
* @id: CCID number to track
* @is_local: whether TX CCID (1) or RX CCID (0) is meant
* This function needs to be called after registering all other features.
*/
static int dccp_feat_propagate_ccid(struct list_head *fn, u8 id, bool is_local)
{
const struct ccid_dependency *table = dccp_feat_ccid_deps(id, is_local);
int i, rc = (table == NULL);
for (i = 0; rc == 0 && table[i].dependent_feat != DCCPF_RESERVED; i++)
if (dccp_feat_type(table[i].dependent_feat) == FEAT_SP)
rc = __feat_register_sp(fn, table[i].dependent_feat,
table[i].is_local,
table[i].is_mandatory,
&table[i].val, 1);
else
rc = __feat_register_nn(fn, table[i].dependent_feat,
table[i].is_mandatory,
table[i].val);
return rc;
}
/**
* dccp_feat_finalise_settings - Finalise settings before starting negotiation
* @dp: client or listening socket (settings will be inherited)
* This is called after all registrations (socket initialisation, sysctls, and
* sockopt calls), and before sending the first packet containing Change options
* (ie. client-Request or server-Response), to ensure internal consistency.
*/
int dccp_feat_finalise_settings(struct dccp_sock *dp)
{
struct list_head *fn = &dp->dccps_featneg;
struct dccp_feat_entry *entry;
int i = 2, ccids[2] = { -1, -1 };
/*
* Propagating CCIDs:
* 1) not useful to propagate CCID settings if this host advertises more
* than one CCID: the choice of CCID may still change - if this is
* the client, or if this is the server and the client sends
* singleton CCID values.
* 2) since is that propagate_ccid changes the list, we defer changing
* the sorted list until after the traversal.
*/
list_for_each_entry(entry, fn, node)
if (entry->feat_num == DCCPF_CCID && entry->val.sp.len == 1)
ccids[entry->is_local] = entry->val.sp.vec[0];
while (i--)
if (ccids[i] > 0 && dccp_feat_propagate_ccid(fn, ccids[i], i))
return -1;
dccp_feat_print_fnlist(fn);
return 0;
}
/**
* dccp_feat_server_ccid_dependencies - Resolve CCID-dependent features
* It is the server which resolves the dependencies once the CCID has been
* fully negotiated. If no CCID has been negotiated, it uses the default CCID.
*/
int dccp_feat_server_ccid_dependencies(struct dccp_request_sock *dreq)
{
struct list_head *fn = &dreq->dreq_featneg;
struct dccp_feat_entry *entry;
u8 is_local, ccid;
for (is_local = 0; is_local <= 1; is_local++) {
entry = dccp_feat_list_lookup(fn, DCCPF_CCID, is_local);
if (entry != NULL && !entry->empty_confirm)
ccid = entry->val.sp.vec[0];
else
ccid = dccp_feat_default_value(DCCPF_CCID);
if (dccp_feat_propagate_ccid(fn, ccid, is_local))
return -1;
}
return 0;
}
/* Select the first entry in @servlist that also occurs in @clilist (6.3.1) */
static int dccp_feat_preflist_match(u8 *servlist, u8 slen, u8 *clilist, u8 clen)
{
u8 c, s;
for (s = 0; s < slen; s++)
for (c = 0; c < clen; c++)
if (servlist[s] == clilist[c])
return servlist[s];
return -1;
}
/**
* dccp_feat_prefer - Move preferred entry to the start of array
* Reorder the @array_len elements in @array so that @preferred_value comes
* first. Returns >0 to indicate that @preferred_value does occur in @array.
*/
static u8 dccp_feat_prefer(u8 preferred_value, u8 *array, u8 array_len)
{
u8 i, does_occur = 0;
if (array != NULL) {
for (i = 0; i < array_len; i++)
if (array[i] == preferred_value) {
array[i] = array[0];
does_occur++;
}
if (does_occur)
array[0] = preferred_value;
}
return does_occur;
}
/**
* dccp_feat_reconcile - Reconcile SP preference lists
* @fval: SP list to reconcile into
* @arr: received SP preference list
* @len: length of @arr in bytes
* @is_server: whether this side is the server (and @fv is the server's list)
* @reorder: whether to reorder the list in @fv after reconciling with @arr
* When successful, > 0 is returned and the reconciled list is in @fval.
* A value of 0 means that negotiation failed (no shared entry).
*/
static int dccp_feat_reconcile(dccp_feat_val *fv, u8 *arr, u8 len,
bool is_server, bool reorder)
{
int rc;
if (!fv->sp.vec || !arr) {
DCCP_CRIT("NULL feature value or array");
return 0;
}
if (is_server)
rc = dccp_feat_preflist_match(fv->sp.vec, fv->sp.len, arr, len);
else
rc = dccp_feat_preflist_match(arr, len, fv->sp.vec, fv->sp.len);
if (!reorder)
return rc;
if (rc < 0)
return 0;
/*
* Reorder list: used for activating features and in dccp_insert_fn_opt.
*/
return dccp_feat_prefer(rc, fv->sp.vec, fv->sp.len);
}
/**
* dccp_feat_change_recv - Process incoming ChangeL/R options
* @fn: feature-negotiation list to update
* @is_mandatory: whether the Change was preceded by a Mandatory option
* @opt: %DCCPO_CHANGE_L or %DCCPO_CHANGE_R
* @feat: one of %dccp_feature_numbers
* @val: NN value or SP value/preference list
* @len: length of @val in bytes
* @server: whether this node is the server (1) or the client (0)
*/
static u8 dccp_feat_change_recv(struct list_head *fn, u8 is_mandatory, u8 opt,
u8 feat, u8 *val, u8 len, const bool server)
{
u8 defval, type = dccp_feat_type(feat);
const bool local = (opt == DCCPO_CHANGE_R);
struct dccp_feat_entry *entry;
dccp_feat_val fval;
if (len == 0 || type == FEAT_UNKNOWN) /* 6.1 and 6.6.8 */
goto unknown_feature_or_value;
dccp_feat_print_opt(opt, feat, val, len, is_mandatory);
/*
* Negotiation of NN features: Change R is invalid, so there is no
* simultaneous negotiation; hence we do not look up in the list.
*/
if (type == FEAT_NN) {
if (local || len > sizeof(fval.nn))
goto unknown_feature_or_value;
/* 6.3.2: "The feature remote MUST accept any valid value..." */
fval.nn = dccp_decode_value_var(val, len);
if (!dccp_feat_is_valid_nn_val(feat, fval.nn))
goto unknown_feature_or_value;
return dccp_feat_push_confirm(fn, feat, local, &fval);
}
/*
* Unidirectional/simultaneous negotiation of SP features (6.3.1)
*/
entry = dccp_feat_list_lookup(fn, feat, local);
if (entry == NULL) {
/*
* No particular preferences have been registered. We deal with
* this situation by assuming that all valid values are equally
* acceptable, and apply the following checks:
* - if the peer's list is a singleton, we accept a valid value;
* - if we are the server, we first try to see if the peer (the
* client) advertises the default value. If yes, we use it,
* otherwise we accept the preferred value;
* - else if we are the client, we use the first list element.
*/
if (dccp_feat_clone_sp_val(&fval, val, 1))
return DCCP_RESET_CODE_TOO_BUSY;
if (len > 1 && server) {
defval = dccp_feat_default_value(feat);
if (dccp_feat_preflist_match(&defval, 1, val, len) > -1)
fval.sp.vec[0] = defval;
} else if (!dccp_feat_is_valid_sp_val(feat, fval.sp.vec[0])) {
kfree(fval.sp.vec);
goto unknown_feature_or_value;
}
/* Treat unsupported CCIDs like invalid values */
if (feat == DCCPF_CCID && !ccid_support_check(fval.sp.vec, 1)) {
kfree(fval.sp.vec);
goto not_valid_or_not_known;
}
return dccp_feat_push_confirm(fn, feat, local, &fval);
} else if (entry->state == FEAT_UNSTABLE) { /* 6.6.2 */
return 0;
}
if (dccp_feat_reconcile(&entry->val, val, len, server, true)) {
entry->empty_confirm = false;
} else if (is_mandatory) {
return DCCP_RESET_CODE_MANDATORY_ERROR;
} else if (entry->state == FEAT_INITIALISING) {
/*
* Failed simultaneous negotiation (server only): try to `save'
* the connection by checking whether entry contains the default
* value for @feat. If yes, send an empty Confirm to signal that
* the received Change was not understood - which implies using
* the default value.
* If this also fails, we use Reset as the last resort.
*/
WARN_ON(!server);
defval = dccp_feat_default_value(feat);
if (!dccp_feat_reconcile(&entry->val, &defval, 1, server, true))
return DCCP_RESET_CODE_OPTION_ERROR;
entry->empty_confirm = true;
}
entry->needs_confirm = true;
entry->needs_mandatory = false;
entry->state = FEAT_STABLE;
return 0;
unknown_feature_or_value:
if (!is_mandatory)
return dccp_push_empty_confirm(fn, feat, local);
not_valid_or_not_known:
return is_mandatory ? DCCP_RESET_CODE_MANDATORY_ERROR
: DCCP_RESET_CODE_OPTION_ERROR;
}
/**
* dccp_feat_confirm_recv - Process received Confirm options
* @fn: feature-negotiation list to update
* @is_mandatory: whether @opt was preceded by a Mandatory option
* @opt: %DCCPO_CONFIRM_L or %DCCPO_CONFIRM_R
* @feat: one of %dccp_feature_numbers
* @val: NN value or SP value/preference list
* @len: length of @val in bytes
* @server: whether this node is server (1) or client (0)
*/
static u8 dccp_feat_confirm_recv(struct list_head *fn, u8 is_mandatory, u8 opt,
u8 feat, u8 *val, u8 len, const bool server)
{
u8 *plist, plen, type = dccp_feat_type(feat);
const bool local = (opt == DCCPO_CONFIRM_R);
struct dccp_feat_entry *entry = dccp_feat_list_lookup(fn, feat, local);
dccp_feat_print_opt(opt, feat, val, len, is_mandatory);
if (entry == NULL) { /* nothing queued: ignore or handle error */
if (is_mandatory && type == FEAT_UNKNOWN)
return DCCP_RESET_CODE_MANDATORY_ERROR;
if (!local && type == FEAT_NN) /* 6.3.2 */
goto confirmation_failed;
return 0;
}
if (entry->state != FEAT_CHANGING) /* 6.6.2 */
return 0;
if (len == 0) {
if (dccp_feat_must_be_understood(feat)) /* 6.6.7 */
goto confirmation_failed;
/*
* Empty Confirm during connection setup: this means reverting
* to the `old' value, which in this case is the default. Since
* we handle default values automatically when no other values
* have been set, we revert to the old value by removing this
* entry from the list.
*/
dccp_feat_list_pop(entry);
return 0;
}
if (type == FEAT_NN) {
if (len > sizeof(entry->val.nn))
goto confirmation_failed;
if (entry->val.nn == dccp_decode_value_var(val, len))
goto confirmation_succeeded;
DCCP_WARN("Bogus Confirm for non-existing value\n");
goto confirmation_failed;
}
/*
* Parsing SP Confirms: the first element of @val is the preferred
* SP value which the peer confirms, the remainder depends on @len.
* Note that only the confirmed value need to be a valid SP value.
*/
if (!dccp_feat_is_valid_sp_val(feat, *val))
goto confirmation_failed;
if (len == 1) { /* peer didn't supply a preference list */
plist = val;
plen = len;
} else { /* preferred value + preference list */
plist = val + 1;
plen = len - 1;
}
/* Check whether the peer got the reconciliation right (6.6.8) */
if (dccp_feat_reconcile(&entry->val, plist, plen, server, 0) != *val) {
DCCP_WARN("Confirm selected the wrong value %u\n", *val);
return DCCP_RESET_CODE_OPTION_ERROR;
}
entry->val.sp.vec[0] = *val;
confirmation_succeeded:
entry->state = FEAT_STABLE;
return 0;
confirmation_failed:
DCCP_WARN("Confirmation failed\n");
return is_mandatory ? DCCP_RESET_CODE_MANDATORY_ERROR
: DCCP_RESET_CODE_OPTION_ERROR;
}
/**
* dccp_feat_handle_nn_established - Fast-path reception of NN options
* @sk: socket of an established DCCP connection
* @mandatory: whether @opt was preceded by a Mandatory option
* @opt: %DCCPO_CHANGE_L | %DCCPO_CONFIRM_R (NN only)
* @feat: NN number, one of %dccp_feature_numbers
* @val: NN value
* @len: length of @val in bytes
* This function combines the functionality of change_recv/confirm_recv, with
* the following differences (reset codes are the same):
* - cleanup after receiving the Confirm;
* - values are directly activated after successful parsing;
* - deliberately restricted to NN features.
* The restriction to NN features is essential since SP features can have non-
* predictable outcomes (depending on the remote configuration), and are inter-
* dependent (CCIDs for instance cause further dependencies).
*/
static u8 dccp_feat_handle_nn_established(struct sock *sk, u8 mandatory, u8 opt,
u8 feat, u8 *val, u8 len)
{
struct list_head *fn = &dccp_sk(sk)->dccps_featneg;
const bool local = (opt == DCCPO_CONFIRM_R);
struct dccp_feat_entry *entry;
u8 type = dccp_feat_type(feat);
dccp_feat_val fval;
dccp_feat_print_opt(opt, feat, val, len, mandatory);
/* Ignore non-mandatory unknown and non-NN features */
if (type == FEAT_UNKNOWN) {
if (local && !mandatory)
return 0;
goto fast_path_unknown;
} else if (type != FEAT_NN) {
return 0;
}
/*
* We don't accept empty Confirms, since in fast-path feature
* negotiation the values are enabled immediately after sending
* the Change option.
* Empty Changes on the other hand are invalid (RFC 4340, 6.1).
*/
if (len == 0 || len > sizeof(fval.nn))
goto fast_path_unknown;
if (opt == DCCPO_CHANGE_L) {
fval.nn = dccp_decode_value_var(val, len);
if (!dccp_feat_is_valid_nn_val(feat, fval.nn))
goto fast_path_unknown;
if (dccp_feat_push_confirm(fn, feat, local, &fval) ||
dccp_feat_activate(sk, feat, local, &fval))
return DCCP_RESET_CODE_TOO_BUSY;
/* set the `Ack Pending' flag to piggyback a Confirm */
inet_csk_schedule_ack(sk);
} else if (opt == DCCPO_CONFIRM_R) {
entry = dccp_feat_list_lookup(fn, feat, local);
if (entry == NULL || entry->state != FEAT_CHANGING)
return 0;
fval.nn = dccp_decode_value_var(val, len);
/*
* Just ignore a value that doesn't match our current value.
* If the option changes twice within two RTTs, then at least
* one CONFIRM will be received for the old value after a
* new CHANGE was sent.
*/
if (fval.nn != entry->val.nn)
return 0;
/* Only activate after receiving the Confirm option (6.6.1). */
dccp_feat_activate(sk, feat, local, &fval);
/* It has been confirmed - so remove the entry */
dccp_feat_list_pop(entry);
} else {
DCCP_WARN("Received illegal option %u\n", opt);
goto fast_path_failed;
}
return 0;
fast_path_unknown:
if (!mandatory)
return dccp_push_empty_confirm(fn, feat, local);
fast_path_failed:
return mandatory ? DCCP_RESET_CODE_MANDATORY_ERROR
: DCCP_RESET_CODE_OPTION_ERROR;
}
/**
* dccp_feat_parse_options - Process Feature-Negotiation Options
* @sk: for general use and used by the client during connection setup
* @dreq: used by the server during connection setup
* @mandatory: whether @opt was preceded by a Mandatory option
* @opt: %DCCPO_CHANGE_L | %DCCPO_CHANGE_R | %DCCPO_CONFIRM_L | %DCCPO_CONFIRM_R
* @feat: one of %dccp_feature_numbers
* @val: value contents of @opt
* @len: length of @val in bytes
* Returns 0 on success, a Reset code for ending the connection otherwise.
*/
int dccp_feat_parse_options(struct sock *sk, struct dccp_request_sock *dreq,
u8 mandatory, u8 opt, u8 feat, u8 *val, u8 len)
{
struct dccp_sock *dp = dccp_sk(sk);
struct list_head *fn = dreq ? &dreq->dreq_featneg : &dp->dccps_featneg;
bool server = false;
switch (sk->sk_state) {
/*
* Negotiation during connection setup
*/
case DCCP_LISTEN:
server = true; /* fall through */
case DCCP_REQUESTING:
switch (opt) {
case DCCPO_CHANGE_L:
case DCCPO_CHANGE_R:
return dccp_feat_change_recv(fn, mandatory, opt, feat,
val, len, server);
case DCCPO_CONFIRM_R:
case DCCPO_CONFIRM_L:
return dccp_feat_confirm_recv(fn, mandatory, opt, feat,
val, len, server);
}
break;
/*
* Support for exchanging NN options on an established connection.
*/
case DCCP_OPEN:
case DCCP_PARTOPEN:
return dccp_feat_handle_nn_established(sk, mandatory, opt, feat,
val, len);
}
return 0; /* ignore FN options in all other states */
}
/**
* dccp_feat_init - Seed feature negotiation with host-specific defaults
* This initialises global defaults, depending on the value of the sysctls.
* These can later be overridden by registering changes via setsockopt calls.
* The last link in the chain is finalise_settings, to make sure that between
* here and the start of actual feature negotiation no inconsistencies enter.
*
* All features not appearing below use either defaults or are otherwise
* later adjusted through dccp_feat_finalise_settings().
*/
int dccp_feat_init(struct sock *sk)
{
struct list_head *fn = &dccp_sk(sk)->dccps_featneg;
u8 on = 1, off = 0;
int rc;
struct {
u8 *val;
u8 len;
} tx, rx;
/* Non-negotiable (NN) features */
rc = __feat_register_nn(fn, DCCPF_SEQUENCE_WINDOW, 0,
sysctl_dccp_sequence_window);
if (rc)
return rc;
/* Server-priority (SP) features */
/* Advertise that short seqnos are not supported (7.6.1) */
rc = __feat_register_sp(fn, DCCPF_SHORT_SEQNOS, true, true, &off, 1);
if (rc)
return rc;
/* RFC 4340 12.1: "If a DCCP is not ECN capable, ..." */
rc = __feat_register_sp(fn, DCCPF_ECN_INCAPABLE, true, true, &on, 1);
if (rc)
return rc;
/*
* We advertise the available list of CCIDs and reorder according to
* preferences, to avoid failure resulting from negotiating different
* singleton values (which always leads to failure).
* These settings can still (later) be overridden via sockopts.
*/
if (ccid_get_builtin_ccids(&tx.val, &tx.len) ||
ccid_get_builtin_ccids(&rx.val, &rx.len))
return -ENOBUFS;
if (!dccp_feat_prefer(sysctl_dccp_tx_ccid, tx.val, tx.len) ||
!dccp_feat_prefer(sysctl_dccp_rx_ccid, rx.val, rx.len))
goto free_ccid_lists;
rc = __feat_register_sp(fn, DCCPF_CCID, true, false, tx.val, tx.len);
if (rc)
goto free_ccid_lists;
rc = __feat_register_sp(fn, DCCPF_CCID, false, false, rx.val, rx.len);
free_ccid_lists:
kfree(tx.val);
kfree(rx.val);
return rc;
}
int dccp_feat_activate_values(struct sock *sk, struct list_head *fn_list)
{
struct dccp_sock *dp = dccp_sk(sk);
struct dccp_feat_entry *cur, *next;
int idx;
dccp_feat_val *fvals[DCCP_FEAT_SUPPORTED_MAX][2] = {
[0 ... DCCP_FEAT_SUPPORTED_MAX-1] = { NULL, NULL }
};
list_for_each_entry(cur, fn_list, node) {
/*
* An empty Confirm means that either an unknown feature type
* or an invalid value was present. In the first case there is
* nothing to activate, in the other the default value is used.
*/
if (cur->empty_confirm)
continue;
idx = dccp_feat_index(cur->feat_num);
if (idx < 0) {
DCCP_BUG("Unknown feature %u", cur->feat_num);
goto activation_failed;
}
if (cur->state != FEAT_STABLE) {
DCCP_CRIT("Negotiation of %s %s failed in state %s",
cur->is_local ? "local" : "remote",
dccp_feat_fname(cur->feat_num),
dccp_feat_sname[cur->state]);
goto activation_failed;
}
fvals[idx][cur->is_local] = &cur->val;
}
/*
* Activate in decreasing order of index, so that the CCIDs are always
* activated as the last feature. This avoids the case where a CCID
* relies on the initialisation of one or more features that it depends
* on (e.g. Send NDP Count, Send Ack Vector, and Ack Ratio features).
*/
for (idx = DCCP_FEAT_SUPPORTED_MAX; --idx >= 0;)
if (__dccp_feat_activate(sk, idx, 0, fvals[idx][0]) ||
__dccp_feat_activate(sk, idx, 1, fvals[idx][1])) {
DCCP_CRIT("Could not activate %d", idx);
goto activation_failed;
}
/* Clean up Change options which have been confirmed already */
list_for_each_entry_safe(cur, next, fn_list, node)
if (!cur->needs_confirm)
dccp_feat_list_pop(cur);
dccp_pr_debug("Activation OK\n");
return 0;
activation_failed:
/*
* We clean up everything that may have been allocated, since
* it is difficult to track at which stage negotiation failed.
* This is ok, since all allocation functions below are robust
* against NULL arguments.
*/
ccid_hc_rx_delete(dp->dccps_hc_rx_ccid, sk);
ccid_hc_tx_delete(dp->dccps_hc_tx_ccid, sk);
dp->dccps_hc_rx_ccid = dp->dccps_hc_tx_ccid = NULL;
dccp_ackvec_free(dp->dccps_hc_rx_ackvec);
dp->dccps_hc_rx_ackvec = NULL;
return -1;
}
| gpl-2.0 |
viaembedded/vab820-kernel-bsp | drivers/staging/omapdrm/omap_encoder.c | 4949 | 4581 | /*
* drivers/staging/omapdrm/omap_encoder.c
*
* Copyright (C) 2011 Texas Instruments
* Author: Rob Clark <rob@ti.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "omap_drv.h"
#include "drm_crtc.h"
#include "drm_crtc_helper.h"
/*
* encoder funcs
*/
#define to_omap_encoder(x) container_of(x, struct omap_encoder, base)
struct omap_encoder {
struct drm_encoder base;
struct omap_overlay_manager *mgr;
};
static void omap_encoder_destroy(struct drm_encoder *encoder)
{
struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
DBG("%s", omap_encoder->mgr->name);
drm_encoder_cleanup(encoder);
kfree(omap_encoder);
}
static void omap_encoder_dpms(struct drm_encoder *encoder, int mode)
{
struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
DBG("%s: %d", omap_encoder->mgr->name, mode);
}
static bool omap_encoder_mode_fixup(struct drm_encoder *encoder,
struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
{
struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
DBG("%s", omap_encoder->mgr->name);
return true;
}
static void omap_encoder_mode_set(struct drm_encoder *encoder,
struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
{
struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
struct drm_device *dev = encoder->dev;
struct omap_drm_private *priv = dev->dev_private;
int i;
mode = adjusted_mode;
DBG("%s: set mode: %dx%d", omap_encoder->mgr->name,
mode->hdisplay, mode->vdisplay);
for (i = 0; i < priv->num_connectors; i++) {
struct drm_connector *connector = priv->connectors[i];
if (connector->encoder == encoder) {
omap_connector_mode_set(connector, mode);
}
}
}
static void omap_encoder_prepare(struct drm_encoder *encoder)
{
struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
struct drm_encoder_helper_funcs *encoder_funcs =
encoder->helper_private;
DBG("%s", omap_encoder->mgr->name);
encoder_funcs->dpms(encoder, DRM_MODE_DPMS_OFF);
}
static void omap_encoder_commit(struct drm_encoder *encoder)
{
struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
struct drm_encoder_helper_funcs *encoder_funcs =
encoder->helper_private;
DBG("%s", omap_encoder->mgr->name);
omap_encoder->mgr->apply(omap_encoder->mgr);
encoder_funcs->dpms(encoder, DRM_MODE_DPMS_ON);
}
static const struct drm_encoder_funcs omap_encoder_funcs = {
.destroy = omap_encoder_destroy,
};
static const struct drm_encoder_helper_funcs omap_encoder_helper_funcs = {
.dpms = omap_encoder_dpms,
.mode_fixup = omap_encoder_mode_fixup,
.mode_set = omap_encoder_mode_set,
.prepare = omap_encoder_prepare,
.commit = omap_encoder_commit,
};
struct omap_overlay_manager *omap_encoder_get_manager(
struct drm_encoder *encoder)
{
struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
return omap_encoder->mgr;
}
/* initialize encoder */
struct drm_encoder *omap_encoder_init(struct drm_device *dev,
struct omap_overlay_manager *mgr)
{
struct drm_encoder *encoder = NULL;
struct omap_encoder *omap_encoder;
struct omap_overlay_manager_info info;
int ret;
DBG("%s", mgr->name);
omap_encoder = kzalloc(sizeof(*omap_encoder), GFP_KERNEL);
if (!omap_encoder) {
dev_err(dev->dev, "could not allocate encoder\n");
goto fail;
}
omap_encoder->mgr = mgr;
encoder = &omap_encoder->base;
drm_encoder_init(dev, encoder, &omap_encoder_funcs,
DRM_MODE_ENCODER_TMDS);
drm_encoder_helper_add(encoder, &omap_encoder_helper_funcs);
mgr->get_manager_info(mgr, &info);
/* TODO: fix hard-coded setup.. */
info.default_color = 0x00000000;
info.trans_key = 0x00000000;
info.trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
info.trans_enabled = false;
ret = mgr->set_manager_info(mgr, &info);
if (ret) {
dev_err(dev->dev, "could not set manager info\n");
goto fail;
}
ret = mgr->apply(mgr);
if (ret) {
dev_err(dev->dev, "could not apply\n");
goto fail;
}
return encoder;
fail:
if (encoder) {
omap_encoder_destroy(encoder);
}
return NULL;
}
| gpl-2.0 |
jawad6233/android_kernel_jiayu_g4 | drivers/net/wireless/orinoco/orinoco_tmd.c | 5717 | 6541 | /* orinoco_tmd.c
*
* Driver for Prism II devices which would usually be driven by orinoco_cs,
* but are connected to the PCI bus by a TMD7160.
*
* Copyright (C) 2003 Joerg Dorchain <joerg AT dorchain.net>
* based heavily upon orinoco_plx.c Copyright (C) 2001 Daniel Barlow
*
* The contents of this file are subject to the Mozilla Public License
* Version 1.1 (the "License"); you may not use this file except in
* compliance with the License. You may obtain a copy of the License
* at http://www.mozilla.org/MPL/
*
* Software distributed under the License is distributed on an "AS IS"
* basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
* the License for the specific language governing rights and
* limitations under the License.
*
* Alternatively, the contents of this file may be used under the
* terms of the GNU General Public License version 2 (the "GPL"), in
* which case the provisions of the GPL are applicable instead of the
* above. If you wish to allow the use of your version of this file
* only under the terms of the GPL and not to allow others to use your
* version of this file under the MPL, indicate your decision by
* deleting the provisions above and replace them with the notice and
* other provisions required by the GPL. If you do not delete the
* provisions above, a recipient may use your version of this file
* under either the MPL or the GPL.
*
* The actual driving is done by main.c, this is just resource
* allocation stuff.
*
* This driver is modeled after the orinoco_plx driver. The main
* difference is that the TMD chip has only IO port ranges and doesn't
* provide access to the PCMCIA attribute space.
*
* Pheecom sells cards with the TMD chip as "ASIC version"
*/
#define DRIVER_NAME "orinoco_tmd"
#define PFX DRIVER_NAME ": "
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <pcmcia/cisreg.h>
#include "orinoco.h"
#include "orinoco_pci.h"
#define COR_VALUE (COR_LEVEL_REQ | COR_FUNC_ENA) /* Enable PC card with interrupt in level trigger */
#define COR_RESET (0x80) /* reset bit in the COR register */
#define TMD_RESET_TIME (500) /* milliseconds */
/*
* Do a soft reset of the card using the Configuration Option Register
*/
static int orinoco_tmd_cor_reset(struct orinoco_private *priv)
{
struct hermes *hw = &priv->hw;
struct orinoco_pci_card *card = priv->card;
unsigned long timeout;
u16 reg;
iowrite8(COR_VALUE | COR_RESET, card->bridge_io);
mdelay(1);
iowrite8(COR_VALUE, card->bridge_io);
mdelay(1);
/* Just in case, wait more until the card is no longer busy */
timeout = jiffies + (TMD_RESET_TIME * HZ / 1000);
reg = hermes_read_regn(hw, CMD);
while (time_before(jiffies, timeout) && (reg & HERMES_CMD_BUSY)) {
mdelay(1);
reg = hermes_read_regn(hw, CMD);
}
/* Still busy? */
if (reg & HERMES_CMD_BUSY) {
printk(KERN_ERR PFX "Busy timeout\n");
return -ETIMEDOUT;
}
return 0;
}
static int orinoco_tmd_init_one(struct pci_dev *pdev,
const struct pci_device_id *ent)
{
int err;
struct orinoco_private *priv;
struct orinoco_pci_card *card;
void __iomem *hermes_io, *bridge_io;
err = pci_enable_device(pdev);
if (err) {
printk(KERN_ERR PFX "Cannot enable PCI device\n");
return err;
}
err = pci_request_regions(pdev, DRIVER_NAME);
if (err) {
printk(KERN_ERR PFX "Cannot obtain PCI resources\n");
goto fail_resources;
}
bridge_io = pci_iomap(pdev, 1, 0);
if (!bridge_io) {
printk(KERN_ERR PFX "Cannot map bridge registers\n");
err = -EIO;
goto fail_map_bridge;
}
hermes_io = pci_iomap(pdev, 2, 0);
if (!hermes_io) {
printk(KERN_ERR PFX "Cannot map chipset registers\n");
err = -EIO;
goto fail_map_hermes;
}
/* Allocate network device */
priv = alloc_orinocodev(sizeof(*card), &pdev->dev,
orinoco_tmd_cor_reset, NULL);
if (!priv) {
printk(KERN_ERR PFX "Cannot allocate network device\n");
err = -ENOMEM;
goto fail_alloc;
}
card = priv->card;
card->bridge_io = bridge_io;
hermes_struct_init(&priv->hw, hermes_io, HERMES_16BIT_REGSPACING);
err = request_irq(pdev->irq, orinoco_interrupt, IRQF_SHARED,
DRIVER_NAME, priv);
if (err) {
printk(KERN_ERR PFX "Cannot allocate IRQ %d\n", pdev->irq);
err = -EBUSY;
goto fail_irq;
}
err = orinoco_tmd_cor_reset(priv);
if (err) {
printk(KERN_ERR PFX "Initial reset failed\n");
goto fail;
}
err = orinoco_init(priv);
if (err) {
printk(KERN_ERR PFX "orinoco_init() failed\n");
goto fail;
}
err = orinoco_if_add(priv, 0, 0, NULL);
if (err) {
printk(KERN_ERR PFX "orinoco_if_add() failed\n");
goto fail;
}
pci_set_drvdata(pdev, priv);
return 0;
fail:
free_irq(pdev->irq, priv);
fail_irq:
pci_set_drvdata(pdev, NULL);
free_orinocodev(priv);
fail_alloc:
pci_iounmap(pdev, hermes_io);
fail_map_hermes:
pci_iounmap(pdev, bridge_io);
fail_map_bridge:
pci_release_regions(pdev);
fail_resources:
pci_disable_device(pdev);
return err;
}
static void __devexit orinoco_tmd_remove_one(struct pci_dev *pdev)
{
struct orinoco_private *priv = pci_get_drvdata(pdev);
struct orinoco_pci_card *card = priv->card;
orinoco_if_del(priv);
free_irq(pdev->irq, priv);
pci_set_drvdata(pdev, NULL);
free_orinocodev(priv);
pci_iounmap(pdev, priv->hw.iobase);
pci_iounmap(pdev, card->bridge_io);
pci_release_regions(pdev);
pci_disable_device(pdev);
}
static DEFINE_PCI_DEVICE_TABLE(orinoco_tmd_id_table) = {
{0x15e8, 0x0131, PCI_ANY_ID, PCI_ANY_ID,}, /* NDC and OEMs, e.g. pheecom */
{0,},
};
MODULE_DEVICE_TABLE(pci, orinoco_tmd_id_table);
static struct pci_driver orinoco_tmd_driver = {
.name = DRIVER_NAME,
.id_table = orinoco_tmd_id_table,
.probe = orinoco_tmd_init_one,
.remove = __devexit_p(orinoco_tmd_remove_one),
.suspend = orinoco_pci_suspend,
.resume = orinoco_pci_resume,
};
static char version[] __initdata = DRIVER_NAME " " DRIVER_VERSION
" (Joerg Dorchain <joerg@dorchain.net>)";
MODULE_AUTHOR("Joerg Dorchain <joerg@dorchain.net>");
MODULE_DESCRIPTION("Driver for wireless LAN cards using the TMD7160 PCI bridge");
MODULE_LICENSE("Dual MPL/GPL");
static int __init orinoco_tmd_init(void)
{
printk(KERN_DEBUG "%s\n", version);
return pci_register_driver(&orinoco_tmd_driver);
}
static void __exit orinoco_tmd_exit(void)
{
pci_unregister_driver(&orinoco_tmd_driver);
}
module_init(orinoco_tmd_init);
module_exit(orinoco_tmd_exit);
/*
* Local variables:
* c-indent-level: 8
* c-basic-offset: 8
* tab-width: 8
* End:
*/
| gpl-2.0 |
ReVolt-ROM/android_kernel_htc_m7 | drivers/net/wireless/orinoco/orinoco_plx.c | 5717 | 11744 | /* orinoco_plx.c
*
* Driver for Prism II devices which would usually be driven by orinoco_cs,
* but are connected to the PCI bus by a PLX9052.
*
* Current maintainers are:
* Pavel Roskin <proski AT gnu.org>
* and David Gibson <hermes AT gibson.dropbear.id.au>
*
* (C) Copyright David Gibson, IBM Corp. 2001-2003.
* Copyright (C) 2001 Daniel Barlow
*
* The contents of this file are subject to the Mozilla Public License
* Version 1.1 (the "License"); you may not use this file except in
* compliance with the License. You may obtain a copy of the License
* at http://www.mozilla.org/MPL/
*
* Software distributed under the License is distributed on an "AS IS"
* basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
* the License for the specific language governing rights and
* limitations under the License.
*
* Alternatively, the contents of this file may be used under the
* terms of the GNU General Public License version 2 (the "GPL"), in
* which case the provisions of the GPL are applicable instead of the
* above. If you wish to allow the use of your version of this file
* only under the terms of the GPL and not to allow others to use your
* version of this file under the MPL, indicate your decision by
* deleting the provisions above and replace them with the notice and
* other provisions required by the GPL. If you do not delete the
* provisions above, a recipient may use your version of this file
* under either the MPL or the GPL.
*
* Here's the general details on how the PLX9052 adapter works:
*
* - Two PCI I/O address spaces, one 0x80 long which contains the
* PLX9052 registers, and one that's 0x40 long mapped to the PCMCIA
* slot I/O address space.
*
* - One PCI memory address space, mapped to the PCMCIA attribute space
* (containing the CIS).
*
* Using the later, you can read through the CIS data to make sure the
* card is compatible with the driver. Keep in mind that the PCMCIA
* spec specifies the CIS as the lower 8 bits of each word read from
* the CIS, so to read the bytes of the CIS, read every other byte
* (0,2,4,...). Passing that test, you need to enable the I/O address
* space on the PCMCIA card via the PCMCIA COR register. This is the
* first byte following the CIS. In my case (which may not have any
* relation to what's on the PRISM2 cards), COR was at offset 0x800
* within the PCI memory space. Write 0x41 to the COR register to
* enable I/O mode and to select level triggered interrupts. To
* confirm you actually succeeded, read the COR register back and make
* sure it actually got set to 0x41, in case you have an unexpected
* card inserted.
*
* Following that, you can treat the second PCI I/O address space (the
* one that's not 0x80 in length) as the PCMCIA I/O space.
*
* Note that in the Eumitcom's source for their drivers, they register
* the interrupt as edge triggered when registering it with the
* Windows kernel. I don't recall how to register edge triggered on
* Linux (if it can be done at all). But in some experimentation, I
* don't see much operational difference between using either
* interrupt mode. Don't mess with the interrupt mode in the COR
* register though, as the PLX9052 wants level triggers with the way
* the serial EEPROM configures it on the WL11000.
*
* There's some other little quirks related to timing that I bumped
* into, but I don't recall right now. Also, there's two variants of
* the WL11000 I've seen, revision A1 and T2. These seem to differ
* slightly in the timings configured in the wait-state generator in
* the PLX9052. There have also been some comments from Eumitcom that
* cards shouldn't be hot swapped, apparently due to risk of cooking
* the PLX9052. I'm unsure why they believe this, as I can't see
* anything in the design that would really cause a problem, except
* for crashing drivers not written to expect it. And having developed
* drivers for the WL11000, I'd say it's quite tricky to write code
* that will successfully deal with a hot unplug. Very odd things
* happen on the I/O side of things. But anyway, be warned. Despite
* that, I've hot-swapped a number of times during debugging and
* driver development for various reasons (stuck WAIT# line after the
* radio card's firmware locks up).
*/
#define DRIVER_NAME "orinoco_plx"
#define PFX DRIVER_NAME ": "
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <pcmcia/cisreg.h>
#include "orinoco.h"
#include "orinoco_pci.h"
#define COR_OFFSET (0x3e0) /* COR attribute offset of Prism2 PC card */
#define COR_VALUE (COR_LEVEL_REQ | COR_FUNC_ENA) /* Enable PC card with interrupt in level trigger */
#define COR_RESET (0x80) /* reset bit in the COR register */
#define PLX_RESET_TIME (500) /* milliseconds */
#define PLX_INTCSR 0x4c /* Interrupt Control & Status Register */
#define PLX_INTCSR_INTEN (1 << 6) /* Interrupt Enable bit */
/*
* Do a soft reset of the card using the Configuration Option Register
*/
static int orinoco_plx_cor_reset(struct orinoco_private *priv)
{
struct hermes *hw = &priv->hw;
struct orinoco_pci_card *card = priv->card;
unsigned long timeout;
u16 reg;
iowrite8(COR_VALUE | COR_RESET, card->attr_io + COR_OFFSET);
mdelay(1);
iowrite8(COR_VALUE, card->attr_io + COR_OFFSET);
mdelay(1);
/* Just in case, wait more until the card is no longer busy */
timeout = jiffies + (PLX_RESET_TIME * HZ / 1000);
reg = hermes_read_regn(hw, CMD);
while (time_before(jiffies, timeout) && (reg & HERMES_CMD_BUSY)) {
mdelay(1);
reg = hermes_read_regn(hw, CMD);
}
/* Still busy? */
if (reg & HERMES_CMD_BUSY) {
printk(KERN_ERR PFX "Busy timeout\n");
return -ETIMEDOUT;
}
return 0;
}
static int orinoco_plx_hw_init(struct orinoco_pci_card *card)
{
int i;
u32 csr_reg;
static const u8 cis_magic[] = {
0x01, 0x03, 0x00, 0x00, 0xff, 0x17, 0x04, 0x67
};
printk(KERN_DEBUG PFX "CIS: ");
for (i = 0; i < 16; i++)
printk("%02X:", ioread8(card->attr_io + (i << 1)));
printk("\n");
/* Verify whether a supported PC card is present */
/* FIXME: we probably need to be smarted about this */
for (i = 0; i < sizeof(cis_magic); i++) {
if (cis_magic[i] != ioread8(card->attr_io + (i << 1))) {
printk(KERN_ERR PFX "The CIS value of Prism2 PC "
"card is unexpected\n");
return -ENODEV;
}
}
/* bjoern: We need to tell the card to enable interrupts, in
case the serial eprom didn't do this already. See the
PLX9052 data book, p8-1 and 8-24 for reference. */
csr_reg = ioread32(card->bridge_io + PLX_INTCSR);
if (!(csr_reg & PLX_INTCSR_INTEN)) {
csr_reg |= PLX_INTCSR_INTEN;
iowrite32(csr_reg, card->bridge_io + PLX_INTCSR);
csr_reg = ioread32(card->bridge_io + PLX_INTCSR);
if (!(csr_reg & PLX_INTCSR_INTEN)) {
printk(KERN_ERR PFX "Cannot enable interrupts\n");
return -EIO;
}
}
return 0;
}
static int orinoco_plx_init_one(struct pci_dev *pdev,
const struct pci_device_id *ent)
{
int err;
struct orinoco_private *priv;
struct orinoco_pci_card *card;
void __iomem *hermes_io, *attr_io, *bridge_io;
err = pci_enable_device(pdev);
if (err) {
printk(KERN_ERR PFX "Cannot enable PCI device\n");
return err;
}
err = pci_request_regions(pdev, DRIVER_NAME);
if (err) {
printk(KERN_ERR PFX "Cannot obtain PCI resources\n");
goto fail_resources;
}
bridge_io = pci_iomap(pdev, 1, 0);
if (!bridge_io) {
printk(KERN_ERR PFX "Cannot map bridge registers\n");
err = -EIO;
goto fail_map_bridge;
}
attr_io = pci_iomap(pdev, 2, 0);
if (!attr_io) {
printk(KERN_ERR PFX "Cannot map PCMCIA attributes\n");
err = -EIO;
goto fail_map_attr;
}
hermes_io = pci_iomap(pdev, 3, 0);
if (!hermes_io) {
printk(KERN_ERR PFX "Cannot map chipset registers\n");
err = -EIO;
goto fail_map_hermes;
}
/* Allocate network device */
priv = alloc_orinocodev(sizeof(*card), &pdev->dev,
orinoco_plx_cor_reset, NULL);
if (!priv) {
printk(KERN_ERR PFX "Cannot allocate network device\n");
err = -ENOMEM;
goto fail_alloc;
}
card = priv->card;
card->bridge_io = bridge_io;
card->attr_io = attr_io;
hermes_struct_init(&priv->hw, hermes_io, HERMES_16BIT_REGSPACING);
err = request_irq(pdev->irq, orinoco_interrupt, IRQF_SHARED,
DRIVER_NAME, priv);
if (err) {
printk(KERN_ERR PFX "Cannot allocate IRQ %d\n", pdev->irq);
err = -EBUSY;
goto fail_irq;
}
err = orinoco_plx_hw_init(card);
if (err) {
printk(KERN_ERR PFX "Hardware initialization failed\n");
goto fail;
}
err = orinoco_plx_cor_reset(priv);
if (err) {
printk(KERN_ERR PFX "Initial reset failed\n");
goto fail;
}
err = orinoco_init(priv);
if (err) {
printk(KERN_ERR PFX "orinoco_init() failed\n");
goto fail;
}
err = orinoco_if_add(priv, 0, 0, NULL);
if (err) {
printk(KERN_ERR PFX "orinoco_if_add() failed\n");
goto fail;
}
pci_set_drvdata(pdev, priv);
return 0;
fail:
free_irq(pdev->irq, priv);
fail_irq:
pci_set_drvdata(pdev, NULL);
free_orinocodev(priv);
fail_alloc:
pci_iounmap(pdev, hermes_io);
fail_map_hermes:
pci_iounmap(pdev, attr_io);
fail_map_attr:
pci_iounmap(pdev, bridge_io);
fail_map_bridge:
pci_release_regions(pdev);
fail_resources:
pci_disable_device(pdev);
return err;
}
static void __devexit orinoco_plx_remove_one(struct pci_dev *pdev)
{
struct orinoco_private *priv = pci_get_drvdata(pdev);
struct orinoco_pci_card *card = priv->card;
orinoco_if_del(priv);
free_irq(pdev->irq, priv);
pci_set_drvdata(pdev, NULL);
free_orinocodev(priv);
pci_iounmap(pdev, priv->hw.iobase);
pci_iounmap(pdev, card->attr_io);
pci_iounmap(pdev, card->bridge_io);
pci_release_regions(pdev);
pci_disable_device(pdev);
}
static DEFINE_PCI_DEVICE_TABLE(orinoco_plx_id_table) = {
{0x111a, 0x1023, PCI_ANY_ID, PCI_ANY_ID,}, /* Siemens SpeedStream SS1023 */
{0x1385, 0x4100, PCI_ANY_ID, PCI_ANY_ID,}, /* Netgear MA301 */
{0x15e8, 0x0130, PCI_ANY_ID, PCI_ANY_ID,}, /* Correga - does this work? */
{0x1638, 0x1100, PCI_ANY_ID, PCI_ANY_ID,}, /* SMC EZConnect SMC2602W,
Eumitcom PCI WL11000,
Addtron AWA-100 */
{0x16ab, 0x1100, PCI_ANY_ID, PCI_ANY_ID,}, /* Global Sun Tech GL24110P */
{0x16ab, 0x1101, PCI_ANY_ID, PCI_ANY_ID,}, /* Reported working, but unknown */
{0x16ab, 0x1102, PCI_ANY_ID, PCI_ANY_ID,}, /* Linksys WDT11 */
{0x16ec, 0x3685, PCI_ANY_ID, PCI_ANY_ID,}, /* USR 2415 */
{0xec80, 0xec00, PCI_ANY_ID, PCI_ANY_ID,}, /* Belkin F5D6000 tested by
Brendan W. McAdams <rit AT jacked-in.org> */
{0x10b7, 0x7770, PCI_ANY_ID, PCI_ANY_ID,}, /* 3Com AirConnect PCI tested by
Damien Persohn <damien AT persohn.net> */
{0,},
};
MODULE_DEVICE_TABLE(pci, orinoco_plx_id_table);
static struct pci_driver orinoco_plx_driver = {
.name = DRIVER_NAME,
.id_table = orinoco_plx_id_table,
.probe = orinoco_plx_init_one,
.remove = __devexit_p(orinoco_plx_remove_one),
.suspend = orinoco_pci_suspend,
.resume = orinoco_pci_resume,
};
static char version[] __initdata = DRIVER_NAME " " DRIVER_VERSION
" (Pavel Roskin <proski@gnu.org>,"
" David Gibson <hermes@gibson.dropbear.id.au>,"
" Daniel Barlow <dan@telent.net>)";
MODULE_AUTHOR("Daniel Barlow <dan@telent.net>");
MODULE_DESCRIPTION("Driver for wireless LAN cards using the PLX9052 PCI bridge");
MODULE_LICENSE("Dual MPL/GPL");
static int __init orinoco_plx_init(void)
{
printk(KERN_DEBUG "%s\n", version);
return pci_register_driver(&orinoco_plx_driver);
}
static void __exit orinoco_plx_exit(void)
{
pci_unregister_driver(&orinoco_plx_driver);
}
module_init(orinoco_plx_init);
module_exit(orinoco_plx_exit);
/*
* Local variables:
* c-indent-level: 8
* c-basic-offset: 8
* tab-width: 8
* End:
*/
| gpl-2.0 |
lujiefeng/gzsd210_Android4.0.4_kernel | arch/arm/plat-iop/setup.c | 9557 | 1124 | /*
* arch/arm/plat-iop/setup.c
*
* Author: Nicolas Pitre <nico@fluxnic.net>
* Copyright (C) 2001 MontaVista Software, Inc.
* Copyright (C) 2004 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/mm.h>
#include <linux/init.h>
#include <asm/mach/map.h>
#include <asm/hardware/iop3xx.h>
/*
* Standard IO mapping for all IOP3xx based systems. Note that
* the IOP3xx OCCDR must be mapped uncached and unbuffered.
*/
static struct map_desc iop3xx_std_desc[] __initdata = {
{ /* mem mapped registers */
.virtual = IOP3XX_PERIPHERAL_VIRT_BASE,
.pfn = __phys_to_pfn(IOP3XX_PERIPHERAL_PHYS_BASE),
.length = IOP3XX_PERIPHERAL_SIZE,
.type = MT_UNCACHED,
}, { /* PCI IO space */
.virtual = IOP3XX_PCI_LOWER_IO_VA,
.pfn = __phys_to_pfn(IOP3XX_PCI_LOWER_IO_PA),
.length = IOP3XX_PCI_IO_WINDOW_SIZE,
.type = MT_DEVICE,
},
};
void __init iop3xx_map_io(void)
{
iotable_init(iop3xx_std_desc, ARRAY_SIZE(iop3xx_std_desc));
}
| gpl-2.0 |
SOKP/kernel_moto_shamu | drivers/isdn/gigaset/asyncdata.c | 9557 | 17022 | /*
* Common data handling layer for ser_gigaset and usb_gigaset
*
* Copyright (c) 2005 by Tilman Schmidt <tilman@imap.cc>,
* Hansjoerg Lipp <hjlipp@web.de>,
* Stefan Eilers.
*
* =====================================================================
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
* =====================================================================
*/
#include "gigaset.h"
#include <linux/crc-ccitt.h>
#include <linux/bitrev.h>
#include <linux/export.h>
/* check if byte must be stuffed/escaped
* I'm not sure which data should be encoded.
* Therefore I will go the hard way and encode every value
* less than 0x20, the flag sequence and the control escape char.
*/
static inline int muststuff(unsigned char c)
{
if (c < PPP_TRANS) return 1;
if (c == PPP_FLAG) return 1;
if (c == PPP_ESCAPE) return 1;
/* other possible candidates: */
/* 0x91: XON with parity set */
/* 0x93: XOFF with parity set */
return 0;
}
/* == data input =========================================================== */
/* process a block of received bytes in command mode
* (mstate != MS_LOCKED && (inputstate & INS_command))
* Append received bytes to the command response buffer and forward them
* line by line to the response handler. Exit whenever a mode/state change
* might have occurred.
* Note: Received lines may be terminated by CR, LF, or CR LF, which will be
* removed before passing the line to the response handler.
* Return value:
* number of processed bytes
*/
static unsigned cmd_loop(unsigned numbytes, struct inbuf_t *inbuf)
{
unsigned char *src = inbuf->data + inbuf->head;
struct cardstate *cs = inbuf->cs;
unsigned cbytes = cs->cbytes;
unsigned procbytes = 0;
unsigned char c;
while (procbytes < numbytes) {
c = *src++;
procbytes++;
switch (c) {
case '\n':
if (cbytes == 0 && cs->respdata[0] == '\r') {
/* collapse LF with preceding CR */
cs->respdata[0] = 0;
break;
}
/* --v-- fall through --v-- */
case '\r':
/* end of message line, pass to response handler */
if (cbytes >= MAX_RESP_SIZE) {
dev_warn(cs->dev, "response too large (%d)\n",
cbytes);
cbytes = MAX_RESP_SIZE;
}
cs->cbytes = cbytes;
gigaset_dbg_buffer(DEBUG_TRANSCMD, "received response",
cbytes, cs->respdata);
gigaset_handle_modem_response(cs);
cbytes = 0;
/* store EOL byte for CRLF collapsing */
cs->respdata[0] = c;
/* cs->dle may have changed */
if (cs->dle && !(inbuf->inputstate & INS_DLE_command))
inbuf->inputstate &= ~INS_command;
/* return for reevaluating state */
goto exit;
case DLE_FLAG:
if (inbuf->inputstate & INS_DLE_char) {
/* quoted DLE: clear quote flag */
inbuf->inputstate &= ~INS_DLE_char;
} else if (cs->dle ||
(inbuf->inputstate & INS_DLE_command)) {
/* DLE escape, pass up for handling */
inbuf->inputstate |= INS_DLE_char;
goto exit;
}
/* quoted or not in DLE mode: treat as regular data */
/* --v-- fall through --v-- */
default:
/* append to line buffer if possible */
if (cbytes < MAX_RESP_SIZE)
cs->respdata[cbytes] = c;
cbytes++;
}
}
exit:
cs->cbytes = cbytes;
return procbytes;
}
/* process a block of received bytes in lock mode
* All received bytes are passed unmodified to the tty i/f.
* Return value:
* number of processed bytes
*/
static unsigned lock_loop(unsigned numbytes, struct inbuf_t *inbuf)
{
unsigned char *src = inbuf->data + inbuf->head;
gigaset_dbg_buffer(DEBUG_LOCKCMD, "received response", numbytes, src);
gigaset_if_receive(inbuf->cs, src, numbytes);
return numbytes;
}
/* process a block of received bytes in HDLC data mode
* (mstate != MS_LOCKED && !(inputstate & INS_command) && proto2 == L2_HDLC)
* Collect HDLC frames, undoing byte stuffing and watching for DLE escapes.
* When a frame is complete, check the FCS and pass valid frames to the LL.
* If DLE is encountered, return immediately to let the caller handle it.
* Return value:
* number of processed bytes
*/
static unsigned hdlc_loop(unsigned numbytes, struct inbuf_t *inbuf)
{
struct cardstate *cs = inbuf->cs;
struct bc_state *bcs = cs->bcs;
int inputstate = bcs->inputstate;
__u16 fcs = bcs->rx_fcs;
struct sk_buff *skb = bcs->rx_skb;
unsigned char *src = inbuf->data + inbuf->head;
unsigned procbytes = 0;
unsigned char c;
if (inputstate & INS_byte_stuff) {
if (!numbytes)
return 0;
inputstate &= ~INS_byte_stuff;
goto byte_stuff;
}
while (procbytes < numbytes) {
c = *src++;
procbytes++;
if (c == DLE_FLAG) {
if (inputstate & INS_DLE_char) {
/* quoted DLE: clear quote flag */
inputstate &= ~INS_DLE_char;
} else if (cs->dle || (inputstate & INS_DLE_command)) {
/* DLE escape, pass up for handling */
inputstate |= INS_DLE_char;
break;
}
}
if (c == PPP_ESCAPE) {
/* byte stuffing indicator: pull in next byte */
if (procbytes >= numbytes) {
/* end of buffer, save for later processing */
inputstate |= INS_byte_stuff;
break;
}
byte_stuff:
c = *src++;
procbytes++;
if (c == DLE_FLAG) {
if (inputstate & INS_DLE_char) {
/* quoted DLE: clear quote flag */
inputstate &= ~INS_DLE_char;
} else if (cs->dle ||
(inputstate & INS_DLE_command)) {
/* DLE escape, pass up for handling */
inputstate |=
INS_DLE_char | INS_byte_stuff;
break;
}
}
c ^= PPP_TRANS;
#ifdef CONFIG_GIGASET_DEBUG
if (!muststuff(c))
gig_dbg(DEBUG_HDLC, "byte stuffed: 0x%02x", c);
#endif
} else if (c == PPP_FLAG) {
/* end of frame: process content if any */
if (inputstate & INS_have_data) {
gig_dbg(DEBUG_HDLC,
"7e----------------------------");
/* check and pass received frame */
if (!skb) {
/* skipped frame */
gigaset_isdn_rcv_err(bcs);
} else if (skb->len < 2) {
/* frame too short for FCS */
dev_warn(cs->dev,
"short frame (%d)\n",
skb->len);
gigaset_isdn_rcv_err(bcs);
dev_kfree_skb_any(skb);
} else if (fcs != PPP_GOODFCS) {
/* frame check error */
dev_err(cs->dev,
"Checksum failed, %u bytes corrupted!\n",
skb->len);
gigaset_isdn_rcv_err(bcs);
dev_kfree_skb_any(skb);
} else {
/* good frame */
__skb_trim(skb, skb->len - 2);
gigaset_skb_rcvd(bcs, skb);
}
/* prepare reception of next frame */
inputstate &= ~INS_have_data;
skb = gigaset_new_rx_skb(bcs);
} else {
/* empty frame (7E 7E) */
#ifdef CONFIG_GIGASET_DEBUG
++bcs->emptycount;
#endif
if (!skb) {
/* skipped (?) */
gigaset_isdn_rcv_err(bcs);
skb = gigaset_new_rx_skb(bcs);
}
}
fcs = PPP_INITFCS;
continue;
#ifdef CONFIG_GIGASET_DEBUG
} else if (muststuff(c)) {
/* Should not happen. Possible after ZDLE=1<CR><LF>. */
gig_dbg(DEBUG_HDLC, "not byte stuffed: 0x%02x", c);
#endif
}
/* regular data byte, append to skb */
#ifdef CONFIG_GIGASET_DEBUG
if (!(inputstate & INS_have_data)) {
gig_dbg(DEBUG_HDLC, "7e (%d x) ================",
bcs->emptycount);
bcs->emptycount = 0;
}
#endif
inputstate |= INS_have_data;
if (skb) {
if (skb->len >= bcs->rx_bufsize) {
dev_warn(cs->dev, "received packet too long\n");
dev_kfree_skb_any(skb);
/* skip remainder of packet */
bcs->rx_skb = skb = NULL;
} else {
*__skb_put(skb, 1) = c;
fcs = crc_ccitt_byte(fcs, c);
}
}
}
bcs->inputstate = inputstate;
bcs->rx_fcs = fcs;
return procbytes;
}
/* process a block of received bytes in transparent data mode
* (mstate != MS_LOCKED && !(inputstate & INS_command) && proto2 != L2_HDLC)
* Invert bytes, undoing byte stuffing and watching for DLE escapes.
* If DLE is encountered, return immediately to let the caller handle it.
* Return value:
* number of processed bytes
*/
static unsigned iraw_loop(unsigned numbytes, struct inbuf_t *inbuf)
{
struct cardstate *cs = inbuf->cs;
struct bc_state *bcs = cs->bcs;
int inputstate = bcs->inputstate;
struct sk_buff *skb = bcs->rx_skb;
unsigned char *src = inbuf->data + inbuf->head;
unsigned procbytes = 0;
unsigned char c;
if (!skb) {
/* skip this block */
gigaset_new_rx_skb(bcs);
return numbytes;
}
while (procbytes < numbytes && skb->len < bcs->rx_bufsize) {
c = *src++;
procbytes++;
if (c == DLE_FLAG) {
if (inputstate & INS_DLE_char) {
/* quoted DLE: clear quote flag */
inputstate &= ~INS_DLE_char;
} else if (cs->dle || (inputstate & INS_DLE_command)) {
/* DLE escape, pass up for handling */
inputstate |= INS_DLE_char;
break;
}
}
/* regular data byte: append to current skb */
inputstate |= INS_have_data;
*__skb_put(skb, 1) = bitrev8(c);
}
/* pass data up */
if (inputstate & INS_have_data) {
gigaset_skb_rcvd(bcs, skb);
inputstate &= ~INS_have_data;
gigaset_new_rx_skb(bcs);
}
bcs->inputstate = inputstate;
return procbytes;
}
/* process DLE escapes
* Called whenever a DLE sequence might be encountered in the input stream.
* Either processes the entire DLE sequence or, if that isn't possible,
* notes the fact that an initial DLE has been received in the INS_DLE_char
* inputstate flag and resumes processing of the sequence on the next call.
*/
static void handle_dle(struct inbuf_t *inbuf)
{
struct cardstate *cs = inbuf->cs;
if (cs->mstate == MS_LOCKED)
return; /* no DLE processing in lock mode */
if (!(inbuf->inputstate & INS_DLE_char)) {
/* no DLE pending */
if (inbuf->data[inbuf->head] == DLE_FLAG &&
(cs->dle || inbuf->inputstate & INS_DLE_command)) {
/* start of DLE sequence */
inbuf->head++;
if (inbuf->head == inbuf->tail ||
inbuf->head == RBUFSIZE) {
/* end of buffer, save for later processing */
inbuf->inputstate |= INS_DLE_char;
return;
}
} else {
/* regular data byte */
return;
}
}
/* consume pending DLE */
inbuf->inputstate &= ~INS_DLE_char;
switch (inbuf->data[inbuf->head]) {
case 'X': /* begin of event message */
if (inbuf->inputstate & INS_command)
dev_notice(cs->dev,
"received <DLE>X in command mode\n");
inbuf->inputstate |= INS_command | INS_DLE_command;
inbuf->head++; /* byte consumed */
break;
case '.': /* end of event message */
if (!(inbuf->inputstate & INS_DLE_command))
dev_notice(cs->dev,
"received <DLE>. without <DLE>X\n");
inbuf->inputstate &= ~INS_DLE_command;
/* return to data mode if in DLE mode */
if (cs->dle)
inbuf->inputstate &= ~INS_command;
inbuf->head++; /* byte consumed */
break;
case DLE_FLAG: /* DLE in data stream */
/* mark as quoted */
inbuf->inputstate |= INS_DLE_char;
if (!(cs->dle || inbuf->inputstate & INS_DLE_command))
dev_notice(cs->dev,
"received <DLE><DLE> not in DLE mode\n");
break; /* quoted byte left in buffer */
default:
dev_notice(cs->dev, "received <DLE><%02x>\n",
inbuf->data[inbuf->head]);
/* quoted byte left in buffer */
}
}
/**
* gigaset_m10x_input() - process a block of data received from the device
* @inbuf: received data and device descriptor structure.
*
* Called by hardware module {ser,usb}_gigaset with a block of received
* bytes. Separates the bytes received over the serial data channel into
* user data and command replies (locked/unlocked) according to the
* current state of the interface.
*/
void gigaset_m10x_input(struct inbuf_t *inbuf)
{
struct cardstate *cs = inbuf->cs;
unsigned numbytes, procbytes;
gig_dbg(DEBUG_INTR, "buffer state: %u -> %u", inbuf->head, inbuf->tail);
while (inbuf->head != inbuf->tail) {
/* check for DLE escape */
handle_dle(inbuf);
/* process a contiguous block of bytes */
numbytes = (inbuf->head > inbuf->tail ?
RBUFSIZE : inbuf->tail) - inbuf->head;
gig_dbg(DEBUG_INTR, "processing %u bytes", numbytes);
/*
* numbytes may be 0 if handle_dle() ate the last byte.
* This does no harm, *_loop() will just return 0 immediately.
*/
if (cs->mstate == MS_LOCKED)
procbytes = lock_loop(numbytes, inbuf);
else if (inbuf->inputstate & INS_command)
procbytes = cmd_loop(numbytes, inbuf);
else if (cs->bcs->proto2 == L2_HDLC)
procbytes = hdlc_loop(numbytes, inbuf);
else
procbytes = iraw_loop(numbytes, inbuf);
inbuf->head += procbytes;
/* check for buffer wraparound */
if (inbuf->head >= RBUFSIZE)
inbuf->head = 0;
gig_dbg(DEBUG_INTR, "head set to %u", inbuf->head);
}
}
EXPORT_SYMBOL_GPL(gigaset_m10x_input);
/* == data output ========================================================== */
/*
* Encode a data packet into an octet stuffed HDLC frame with FCS,
* opening and closing flags, preserving headroom data.
* parameters:
* skb skb containing original packet (freed upon return)
* Return value:
* pointer to newly allocated skb containing the result frame
* and the original link layer header, NULL on error
*/
static struct sk_buff *HDLC_Encode(struct sk_buff *skb)
{
struct sk_buff *hdlc_skb;
__u16 fcs;
unsigned char c;
unsigned char *cp;
int len;
unsigned int stuf_cnt;
stuf_cnt = 0;
fcs = PPP_INITFCS;
cp = skb->data;
len = skb->len;
while (len--) {
if (muststuff(*cp))
stuf_cnt++;
fcs = crc_ccitt_byte(fcs, *cp++);
}
fcs ^= 0xffff; /* complement */
/* size of new buffer: original size + number of stuffing bytes
* + 2 bytes FCS + 2 stuffing bytes for FCS (if needed) + 2 flag bytes
* + room for link layer header
*/
hdlc_skb = dev_alloc_skb(skb->len + stuf_cnt + 6 + skb->mac_len);
if (!hdlc_skb) {
dev_kfree_skb_any(skb);
return NULL;
}
/* Copy link layer header into new skb */
skb_reset_mac_header(hdlc_skb);
skb_reserve(hdlc_skb, skb->mac_len);
memcpy(skb_mac_header(hdlc_skb), skb_mac_header(skb), skb->mac_len);
hdlc_skb->mac_len = skb->mac_len;
/* Add flag sequence in front of everything.. */
*(skb_put(hdlc_skb, 1)) = PPP_FLAG;
/* Perform byte stuffing while copying data. */
while (skb->len--) {
if (muststuff(*skb->data)) {
*(skb_put(hdlc_skb, 1)) = PPP_ESCAPE;
*(skb_put(hdlc_skb, 1)) = (*skb->data++) ^ PPP_TRANS;
} else
*(skb_put(hdlc_skb, 1)) = *skb->data++;
}
/* Finally add FCS (byte stuffed) and flag sequence */
c = (fcs & 0x00ff); /* least significant byte first */
if (muststuff(c)) {
*(skb_put(hdlc_skb, 1)) = PPP_ESCAPE;
c ^= PPP_TRANS;
}
*(skb_put(hdlc_skb, 1)) = c;
c = ((fcs >> 8) & 0x00ff);
if (muststuff(c)) {
*(skb_put(hdlc_skb, 1)) = PPP_ESCAPE;
c ^= PPP_TRANS;
}
*(skb_put(hdlc_skb, 1)) = c;
*(skb_put(hdlc_skb, 1)) = PPP_FLAG;
dev_kfree_skb_any(skb);
return hdlc_skb;
}
/*
* Encode a data packet into an octet stuffed raw bit inverted frame,
* preserving headroom data.
* parameters:
* skb skb containing original packet (freed upon return)
* Return value:
* pointer to newly allocated skb containing the result frame
* and the original link layer header, NULL on error
*/
static struct sk_buff *iraw_encode(struct sk_buff *skb)
{
struct sk_buff *iraw_skb;
unsigned char c;
unsigned char *cp;
int len;
/* size of new buffer (worst case = every byte must be stuffed):
* 2 * original size + room for link layer header
*/
iraw_skb = dev_alloc_skb(2 * skb->len + skb->mac_len);
if (!iraw_skb) {
dev_kfree_skb_any(skb);
return NULL;
}
/* copy link layer header into new skb */
skb_reset_mac_header(iraw_skb);
skb_reserve(iraw_skb, skb->mac_len);
memcpy(skb_mac_header(iraw_skb), skb_mac_header(skb), skb->mac_len);
iraw_skb->mac_len = skb->mac_len;
/* copy and stuff data */
cp = skb->data;
len = skb->len;
while (len--) {
c = bitrev8(*cp++);
if (c == DLE_FLAG)
*(skb_put(iraw_skb, 1)) = c;
*(skb_put(iraw_skb, 1)) = c;
}
dev_kfree_skb_any(skb);
return iraw_skb;
}
/**
* gigaset_m10x_send_skb() - queue an skb for sending
* @bcs: B channel descriptor structure.
* @skb: data to send.
*
* Called by LL to encode and queue an skb for sending, and start
* transmission if necessary.
* Once the payload data has been transmitted completely, gigaset_skb_sent()
* will be called with the skb's link layer header preserved.
*
* Return value:
* number of bytes accepted for sending (skb->len) if ok,
* error code < 0 (eg. -ENOMEM) on error
*/
int gigaset_m10x_send_skb(struct bc_state *bcs, struct sk_buff *skb)
{
struct cardstate *cs = bcs->cs;
unsigned len = skb->len;
unsigned long flags;
if (bcs->proto2 == L2_HDLC)
skb = HDLC_Encode(skb);
else
skb = iraw_encode(skb);
if (!skb) {
dev_err(cs->dev,
"unable to allocate memory for encoding!\n");
return -ENOMEM;
}
skb_queue_tail(&bcs->squeue, skb);
spin_lock_irqsave(&cs->lock, flags);
if (cs->connected)
tasklet_schedule(&cs->write_tasklet);
spin_unlock_irqrestore(&cs->lock, flags);
return len; /* ok so far */
}
EXPORT_SYMBOL_GPL(gigaset_m10x_send_skb);
| gpl-2.0 |
zarboz/Evita-Jellybean | arch/x86/mm/kmemcheck/error.c | 10069 | 5353 | #include <linux/interrupt.h>
#include <linux/kdebug.h>
#include <linux/kmemcheck.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/ptrace.h>
#include <linux/stacktrace.h>
#include <linux/string.h>
#include "error.h"
#include "shadow.h"
enum kmemcheck_error_type {
KMEMCHECK_ERROR_INVALID_ACCESS,
KMEMCHECK_ERROR_BUG,
};
#define SHADOW_COPY_SIZE (1 << CONFIG_KMEMCHECK_SHADOW_COPY_SHIFT)
struct kmemcheck_error {
enum kmemcheck_error_type type;
union {
/* KMEMCHECK_ERROR_INVALID_ACCESS */
struct {
/* Kind of access that caused the error */
enum kmemcheck_shadow state;
/* Address and size of the erroneous read */
unsigned long address;
unsigned int size;
};
};
struct pt_regs regs;
struct stack_trace trace;
unsigned long trace_entries[32];
/* We compress it to a char. */
unsigned char shadow_copy[SHADOW_COPY_SIZE];
unsigned char memory_copy[SHADOW_COPY_SIZE];
};
/*
* Create a ring queue of errors to output. We can't call printk() directly
* from the kmemcheck traps, since this may call the console drivers and
* result in a recursive fault.
*/
static struct kmemcheck_error error_fifo[CONFIG_KMEMCHECK_QUEUE_SIZE];
static unsigned int error_count;
static unsigned int error_rd;
static unsigned int error_wr;
static unsigned int error_missed_count;
static struct kmemcheck_error *error_next_wr(void)
{
struct kmemcheck_error *e;
if (error_count == ARRAY_SIZE(error_fifo)) {
++error_missed_count;
return NULL;
}
e = &error_fifo[error_wr];
if (++error_wr == ARRAY_SIZE(error_fifo))
error_wr = 0;
++error_count;
return e;
}
static struct kmemcheck_error *error_next_rd(void)
{
struct kmemcheck_error *e;
if (error_count == 0)
return NULL;
e = &error_fifo[error_rd];
if (++error_rd == ARRAY_SIZE(error_fifo))
error_rd = 0;
--error_count;
return e;
}
void kmemcheck_error_recall(void)
{
static const char *desc[] = {
[KMEMCHECK_SHADOW_UNALLOCATED] = "unallocated",
[KMEMCHECK_SHADOW_UNINITIALIZED] = "uninitialized",
[KMEMCHECK_SHADOW_INITIALIZED] = "initialized",
[KMEMCHECK_SHADOW_FREED] = "freed",
};
static const char short_desc[] = {
[KMEMCHECK_SHADOW_UNALLOCATED] = 'a',
[KMEMCHECK_SHADOW_UNINITIALIZED] = 'u',
[KMEMCHECK_SHADOW_INITIALIZED] = 'i',
[KMEMCHECK_SHADOW_FREED] = 'f',
};
struct kmemcheck_error *e;
unsigned int i;
e = error_next_rd();
if (!e)
return;
switch (e->type) {
case KMEMCHECK_ERROR_INVALID_ACCESS:
printk(KERN_WARNING "WARNING: kmemcheck: Caught %d-bit read from %s memory (%p)\n",
8 * e->size, e->state < ARRAY_SIZE(desc) ?
desc[e->state] : "(invalid shadow state)",
(void *) e->address);
printk(KERN_WARNING);
for (i = 0; i < SHADOW_COPY_SIZE; ++i)
printk(KERN_CONT "%02x", e->memory_copy[i]);
printk(KERN_CONT "\n");
printk(KERN_WARNING);
for (i = 0; i < SHADOW_COPY_SIZE; ++i) {
if (e->shadow_copy[i] < ARRAY_SIZE(short_desc))
printk(KERN_CONT " %c", short_desc[e->shadow_copy[i]]);
else
printk(KERN_CONT " ?");
}
printk(KERN_CONT "\n");
printk(KERN_WARNING "%*c\n", 2 + 2
* (int) (e->address & (SHADOW_COPY_SIZE - 1)), '^');
break;
case KMEMCHECK_ERROR_BUG:
printk(KERN_EMERG "ERROR: kmemcheck: Fatal error\n");
break;
}
__show_regs(&e->regs, 1);
print_stack_trace(&e->trace, 0);
}
static void do_wakeup(unsigned long data)
{
while (error_count > 0)
kmemcheck_error_recall();
if (error_missed_count > 0) {
printk(KERN_WARNING "kmemcheck: Lost %d error reports because "
"the queue was too small\n", error_missed_count);
error_missed_count = 0;
}
}
static DECLARE_TASKLET(kmemcheck_tasklet, &do_wakeup, 0);
/*
* Save the context of an error report.
*/
void kmemcheck_error_save(enum kmemcheck_shadow state,
unsigned long address, unsigned int size, struct pt_regs *regs)
{
static unsigned long prev_ip;
struct kmemcheck_error *e;
void *shadow_copy;
void *memory_copy;
/* Don't report several adjacent errors from the same EIP. */
if (regs->ip == prev_ip)
return;
prev_ip = regs->ip;
e = error_next_wr();
if (!e)
return;
e->type = KMEMCHECK_ERROR_INVALID_ACCESS;
e->state = state;
e->address = address;
e->size = size;
/* Save regs */
memcpy(&e->regs, regs, sizeof(*regs));
/* Save stack trace */
e->trace.nr_entries = 0;
e->trace.entries = e->trace_entries;
e->trace.max_entries = ARRAY_SIZE(e->trace_entries);
e->trace.skip = 0;
save_stack_trace_regs(regs, &e->trace);
/* Round address down to nearest 16 bytes */
shadow_copy = kmemcheck_shadow_lookup(address
& ~(SHADOW_COPY_SIZE - 1));
BUG_ON(!shadow_copy);
memcpy(e->shadow_copy, shadow_copy, SHADOW_COPY_SIZE);
kmemcheck_show_addr(address);
memory_copy = (void *) (address & ~(SHADOW_COPY_SIZE - 1));
memcpy(e->memory_copy, memory_copy, SHADOW_COPY_SIZE);
kmemcheck_hide_addr(address);
tasklet_hi_schedule_first(&kmemcheck_tasklet);
}
/*
* Save the context of a kmemcheck bug.
*/
void kmemcheck_error_save_bug(struct pt_regs *regs)
{
struct kmemcheck_error *e;
e = error_next_wr();
if (!e)
return;
e->type = KMEMCHECK_ERROR_BUG;
memcpy(&e->regs, regs, sizeof(*regs));
e->trace.nr_entries = 0;
e->trace.entries = e->trace_entries;
e->trace.max_entries = ARRAY_SIZE(e->trace_entries);
e->trace.skip = 1;
save_stack_trace(&e->trace);
tasklet_hi_schedule_first(&kmemcheck_tasklet);
}
| gpl-2.0 |
nychitman1/android_kernel_samsung_manta | arch/x86/math-emu/poly_2xm1.c | 14421 | 4476 | /*---------------------------------------------------------------------------+
| poly_2xm1.c |
| |
| Function to compute 2^x-1 by a polynomial approximation. |
| |
| Copyright (C) 1992,1993,1994,1997 |
| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, Australia |
| E-mail billm@suburbia.net |
| |
| |
+---------------------------------------------------------------------------*/
#include "exception.h"
#include "reg_constant.h"
#include "fpu_emu.h"
#include "fpu_system.h"
#include "control_w.h"
#include "poly.h"
#define HIPOWER 11
static const unsigned long long lterms[HIPOWER] = {
0x0000000000000000LL, /* This term done separately as 12 bytes */
0xf5fdeffc162c7543LL,
0x1c6b08d704a0bfa6LL,
0x0276556df749cc21LL,
0x002bb0ffcf14f6b8LL,
0x0002861225ef751cLL,
0x00001ffcbfcd5422LL,
0x00000162c005d5f1LL,
0x0000000da96ccb1bLL,
0x0000000078d1b897LL,
0x000000000422b029LL
};
static const Xsig hiterm = MK_XSIG(0xb17217f7, 0xd1cf79ab, 0xc8a39194);
/* Four slices: 0.0 : 0.25 : 0.50 : 0.75 : 1.0,
These numbers are 2^(1/4), 2^(1/2), and 2^(3/4)
*/
static const Xsig shiftterm0 = MK_XSIG(0, 0, 0);
static const Xsig shiftterm1 = MK_XSIG(0x9837f051, 0x8db8a96f, 0x46ad2318);
static const Xsig shiftterm2 = MK_XSIG(0xb504f333, 0xf9de6484, 0x597d89b3);
static const Xsig shiftterm3 = MK_XSIG(0xd744fcca, 0xd69d6af4, 0x39a68bb9);
static const Xsig *shiftterm[] = { &shiftterm0, &shiftterm1,
&shiftterm2, &shiftterm3
};
/*--- poly_2xm1() -----------------------------------------------------------+
| Requires st(0) which is TAG_Valid and < 1. |
+---------------------------------------------------------------------------*/
int poly_2xm1(u_char sign, FPU_REG *arg, FPU_REG *result)
{
long int exponent, shift;
unsigned long long Xll;
Xsig accumulator, Denom, argSignif;
u_char tag;
exponent = exponent16(arg);
#ifdef PARANOID
if (exponent >= 0) { /* Don't want a |number| >= 1.0 */
/* Number negative, too large, or not Valid. */
EXCEPTION(EX_INTERNAL | 0x127);
return 1;
}
#endif /* PARANOID */
argSignif.lsw = 0;
XSIG_LL(argSignif) = Xll = significand(arg);
if (exponent == -1) {
shift = (argSignif.msw & 0x40000000) ? 3 : 2;
/* subtract 0.5 or 0.75 */
exponent -= 2;
XSIG_LL(argSignif) <<= 2;
Xll <<= 2;
} else if (exponent == -2) {
shift = 1;
/* subtract 0.25 */
exponent--;
XSIG_LL(argSignif) <<= 1;
Xll <<= 1;
} else
shift = 0;
if (exponent < -2) {
/* Shift the argument right by the required places. */
if (FPU_shrx(&Xll, -2 - exponent) >= 0x80000000U)
Xll++; /* round up */
}
accumulator.lsw = accumulator.midw = accumulator.msw = 0;
polynomial_Xsig(&accumulator, &Xll, lterms, HIPOWER - 1);
mul_Xsig_Xsig(&accumulator, &argSignif);
shr_Xsig(&accumulator, 3);
mul_Xsig_Xsig(&argSignif, &hiterm); /* The leading term */
add_two_Xsig(&accumulator, &argSignif, &exponent);
if (shift) {
/* The argument is large, use the identity:
f(x+a) = f(a) * (f(x) + 1) - 1;
*/
shr_Xsig(&accumulator, -exponent);
accumulator.msw |= 0x80000000; /* add 1.0 */
mul_Xsig_Xsig(&accumulator, shiftterm[shift]);
accumulator.msw &= 0x3fffffff; /* subtract 1.0 */
exponent = 1;
}
if (sign != SIGN_POS) {
/* The argument is negative, use the identity:
f(-x) = -f(x) / (1 + f(x))
*/
Denom.lsw = accumulator.lsw;
XSIG_LL(Denom) = XSIG_LL(accumulator);
if (exponent < 0)
shr_Xsig(&Denom, -exponent);
else if (exponent > 0) {
/* exponent must be 1 here */
XSIG_LL(Denom) <<= 1;
if (Denom.lsw & 0x80000000)
XSIG_LL(Denom) |= 1;
(Denom.lsw) <<= 1;
}
Denom.msw |= 0x80000000; /* add 1.0 */
div_Xsig(&accumulator, &Denom, &accumulator);
}
/* Convert to 64 bit signed-compatible */
exponent += round_Xsig(&accumulator);
result = &st(0);
significand(result) = XSIG_LL(accumulator);
setexponent16(result, exponent);
tag = FPU_round(result, 1, 0, FULL_PRECISION, sign);
setsign(result, sign);
FPU_settag0(tag);
return 0;
}
| gpl-2.0 |
herophj/linux_kerner_2_6 | arch/powerpc/kernel/prom_init.c | 86 | 70669 | /*
* Procedures for interfacing to Open Firmware.
*
* Paul Mackerras August 1996.
* Copyright (C) 1996-2005 Paul Mackerras.
*
* Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
* {engebret|bergner}@us.ibm.com
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#undef DEBUG_PROM
#include <stdarg.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/threads.h>
#include <linux/spinlock.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/proc_fs.h>
#include <linux/stringify.h>
#include <linux/delay.h>
#include <linux/initrd.h>
#include <linux/bitops.h>
#include <asm/prom.h>
#include <asm/rtas.h>
#include <asm/page.h>
#include <asm/processor.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/smp.h>
#include <asm/system.h>
#include <asm/mmu.h>
#include <asm/pgtable.h>
#include <asm/pci.h>
#include <asm/iommu.h>
#include <asm/btext.h>
#include <asm/sections.h>
#include <asm/machdep.h>
#include <linux/linux_logo.h>
/*
* Properties whose value is longer than this get excluded from our
* copy of the device tree. This value does need to be big enough to
* ensure that we don't lose things like the interrupt-map property
* on a PCI-PCI bridge.
*/
#define MAX_PROPERTY_LENGTH (1UL * 1024 * 1024)
/*
* Eventually bump that one up
*/
#define DEVTREE_CHUNK_SIZE 0x100000
/*
* This is the size of the local memory reserve map that gets copied
* into the boot params passed to the kernel. That size is totally
* flexible as the kernel just reads the list until it encounters an
* entry with size 0, so it can be changed without breaking binary
* compatibility
*/
#define MEM_RESERVE_MAP_SIZE 8
/*
* prom_init() is called very early on, before the kernel text
* and data have been mapped to KERNELBASE. At this point the code
* is running at whatever address it has been loaded at.
* On ppc32 we compile with -mrelocatable, which means that references
* to extern and static variables get relocated automatically.
* On ppc64 we have to relocate the references explicitly with
* RELOC. (Note that strings count as static variables.)
*
* Because OF may have mapped I/O devices into the area starting at
* KERNELBASE, particularly on CHRP machines, we can't safely call
* OF once the kernel has been mapped to KERNELBASE. Therefore all
* OF calls must be done within prom_init().
*
* ADDR is used in calls to call_prom. The 4th and following
* arguments to call_prom should be 32-bit values.
* On ppc64, 64 bit values are truncated to 32 bits (and
* fortunately don't get interpreted as two arguments).
*/
#ifdef CONFIG_PPC64
#define RELOC(x) (*PTRRELOC(&(x)))
#define ADDR(x) (u32) add_reloc_offset((unsigned long)(x))
#define OF_WORKAROUNDS 0
#else
#define RELOC(x) (x)
#define ADDR(x) (u32) (x)
#define OF_WORKAROUNDS of_workarounds
int of_workarounds;
#endif
#define OF_WA_CLAIM 1 /* do phys/virt claim separately, then map */
#define OF_WA_LONGTRAIL 2 /* work around longtrail bugs */
#define PROM_BUG() do { \
prom_printf("kernel BUG at %s line 0x%x!\n", \
RELOC(__FILE__), __LINE__); \
__asm__ __volatile__(".long " BUG_ILLEGAL_INSTR); \
} while (0)
#ifdef DEBUG_PROM
#define prom_debug(x...) prom_printf(x)
#else
#define prom_debug(x...)
#endif
typedef u32 prom_arg_t;
struct prom_args {
u32 service;
u32 nargs;
u32 nret;
prom_arg_t args[10];
};
struct prom_t {
ihandle root;
phandle chosen;
int cpu;
ihandle stdout;
ihandle mmumap;
ihandle memory;
};
struct mem_map_entry {
u64 base;
u64 size;
};
typedef u32 cell_t;
extern void __start(unsigned long r3, unsigned long r4, unsigned long r5);
#ifdef CONFIG_PPC64
extern int enter_prom(struct prom_args *args, unsigned long entry);
#else
static inline int enter_prom(struct prom_args *args, unsigned long entry)
{
return ((int (*)(struct prom_args *))entry)(args);
}
#endif
extern void copy_and_flush(unsigned long dest, unsigned long src,
unsigned long size, unsigned long offset);
/* prom structure */
static struct prom_t __initdata prom;
static unsigned long prom_entry __initdata;
#define PROM_SCRATCH_SIZE 256
static char __initdata of_stdout_device[256];
static char __initdata prom_scratch[PROM_SCRATCH_SIZE];
static unsigned long __initdata dt_header_start;
static unsigned long __initdata dt_struct_start, dt_struct_end;
static unsigned long __initdata dt_string_start, dt_string_end;
static unsigned long __initdata prom_initrd_start, prom_initrd_end;
#ifdef CONFIG_PPC64
static int __initdata prom_iommu_force_on;
static int __initdata prom_iommu_off;
static unsigned long __initdata prom_tce_alloc_start;
static unsigned long __initdata prom_tce_alloc_end;
#endif
/* Platforms codes are now obsolete in the kernel. Now only used within this
* file and ultimately gone too. Feel free to change them if you need, they
* are not shared with anything outside of this file anymore
*/
#define PLATFORM_PSERIES 0x0100
#define PLATFORM_PSERIES_LPAR 0x0101
#define PLATFORM_LPAR 0x0001
#define PLATFORM_POWERMAC 0x0400
#define PLATFORM_GENERIC 0x0500
static int __initdata of_platform;
static char __initdata prom_cmd_line[COMMAND_LINE_SIZE];
static unsigned long __initdata prom_memory_limit;
static unsigned long __initdata alloc_top;
static unsigned long __initdata alloc_top_high;
static unsigned long __initdata alloc_bottom;
static unsigned long __initdata rmo_top;
static unsigned long __initdata ram_top;
static struct mem_map_entry __initdata mem_reserve_map[MEM_RESERVE_MAP_SIZE];
static int __initdata mem_reserve_cnt;
static cell_t __initdata regbuf[1024];
/*
* Error results ... some OF calls will return "-1" on error, some
* will return 0, some will return either. To simplify, here are
* macros to use with any ihandle or phandle return value to check if
* it is valid
*/
#define PROM_ERROR (-1u)
#define PHANDLE_VALID(p) ((p) != 0 && (p) != PROM_ERROR)
#define IHANDLE_VALID(i) ((i) != 0 && (i) != PROM_ERROR)
/* This is the one and *ONLY* place where we actually call open
* firmware.
*/
static int __init call_prom(const char *service, int nargs, int nret, ...)
{
int i;
struct prom_args args;
va_list list;
args.service = ADDR(service);
args.nargs = nargs;
args.nret = nret;
va_start(list, nret);
for (i = 0; i < nargs; i++)
args.args[i] = va_arg(list, prom_arg_t);
va_end(list);
for (i = 0; i < nret; i++)
args.args[nargs+i] = 0;
if (enter_prom(&args, RELOC(prom_entry)) < 0)
return PROM_ERROR;
return (nret > 0) ? args.args[nargs] : 0;
}
static int __init call_prom_ret(const char *service, int nargs, int nret,
prom_arg_t *rets, ...)
{
int i;
struct prom_args args;
va_list list;
args.service = ADDR(service);
args.nargs = nargs;
args.nret = nret;
va_start(list, rets);
for (i = 0; i < nargs; i++)
args.args[i] = va_arg(list, prom_arg_t);
va_end(list);
for (i = 0; i < nret; i++)
args.args[nargs+i] = 0;
if (enter_prom(&args, RELOC(prom_entry)) < 0)
return PROM_ERROR;
if (rets != NULL)
for (i = 1; i < nret; ++i)
rets[i-1] = args.args[nargs+i];
return (nret > 0) ? args.args[nargs] : 0;
}
static void __init prom_print(const char *msg)
{
const char *p, *q;
struct prom_t *_prom = &RELOC(prom);
if (_prom->stdout == 0)
return;
for (p = msg; *p != 0; p = q) {
for (q = p; *q != 0 && *q != '\n'; ++q)
;
if (q > p)
call_prom("write", 3, 1, _prom->stdout, p, q - p);
if (*q == 0)
break;
++q;
call_prom("write", 3, 1, _prom->stdout, ADDR("\r\n"), 2);
}
}
static void __init prom_print_hex(unsigned long val)
{
int i, nibbles = sizeof(val)*2;
char buf[sizeof(val)*2+1];
struct prom_t *_prom = &RELOC(prom);
for (i = nibbles-1; i >= 0; i--) {
buf[i] = (val & 0xf) + '0';
if (buf[i] > '9')
buf[i] += ('a'-'0'-10);
val >>= 4;
}
buf[nibbles] = '\0';
call_prom("write", 3, 1, _prom->stdout, buf, nibbles);
}
static void __init prom_printf(const char *format, ...)
{
const char *p, *q, *s;
va_list args;
unsigned long v;
struct prom_t *_prom = &RELOC(prom);
va_start(args, format);
#ifdef CONFIG_PPC64
format = PTRRELOC(format);
#endif
for (p = format; *p != 0; p = q) {
for (q = p; *q != 0 && *q != '\n' && *q != '%'; ++q)
;
if (q > p)
call_prom("write", 3, 1, _prom->stdout, p, q - p);
if (*q == 0)
break;
if (*q == '\n') {
++q;
call_prom("write", 3, 1, _prom->stdout,
ADDR("\r\n"), 2);
continue;
}
++q;
if (*q == 0)
break;
switch (*q) {
case 's':
++q;
s = va_arg(args, const char *);
prom_print(s);
break;
case 'x':
++q;
v = va_arg(args, unsigned long);
prom_print_hex(v);
break;
}
}
}
static unsigned int __init prom_claim(unsigned long virt, unsigned long size,
unsigned long align)
{
struct prom_t *_prom = &RELOC(prom);
if (align == 0 && (OF_WORKAROUNDS & OF_WA_CLAIM)) {
/*
* Old OF requires we claim physical and virtual separately
* and then map explicitly (assuming virtual mode)
*/
int ret;
prom_arg_t result;
ret = call_prom_ret("call-method", 5, 2, &result,
ADDR("claim"), _prom->memory,
align, size, virt);
if (ret != 0 || result == -1)
return -1;
ret = call_prom_ret("call-method", 5, 2, &result,
ADDR("claim"), _prom->mmumap,
align, size, virt);
if (ret != 0) {
call_prom("call-method", 4, 1, ADDR("release"),
_prom->memory, size, virt);
return -1;
}
/* the 0x12 is M (coherence) + PP == read/write */
call_prom("call-method", 6, 1,
ADDR("map"), _prom->mmumap, 0x12, size, virt, virt);
return virt;
}
return call_prom("claim", 3, 1, (prom_arg_t)virt, (prom_arg_t)size,
(prom_arg_t)align);
}
static void __init __attribute__((noreturn)) prom_panic(const char *reason)
{
#ifdef CONFIG_PPC64
reason = PTRRELOC(reason);
#endif
prom_print(reason);
/* Do not call exit because it clears the screen on pmac
* it also causes some sort of double-fault on early pmacs */
if (RELOC(of_platform) == PLATFORM_POWERMAC)
asm("trap\n");
/* ToDo: should put up an SRC here on p/iSeries */
call_prom("exit", 0, 0);
for (;;) /* should never get here */
;
}
static int __init prom_next_node(phandle *nodep)
{
phandle node;
if ((node = *nodep) != 0
&& (*nodep = call_prom("child", 1, 1, node)) != 0)
return 1;
if ((*nodep = call_prom("peer", 1, 1, node)) != 0)
return 1;
for (;;) {
if ((node = call_prom("parent", 1, 1, node)) == 0)
return 0;
if ((*nodep = call_prom("peer", 1, 1, node)) != 0)
return 1;
}
}
static int inline prom_getprop(phandle node, const char *pname,
void *value, size_t valuelen)
{
return call_prom("getprop", 4, 1, node, ADDR(pname),
(u32)(unsigned long) value, (u32) valuelen);
}
static int inline prom_getproplen(phandle node, const char *pname)
{
return call_prom("getproplen", 2, 1, node, ADDR(pname));
}
static void add_string(char **str, const char *q)
{
char *p = *str;
while (*q)
*p++ = *q++;
*p++ = ' ';
*str = p;
}
static char *tohex(unsigned int x)
{
static char digits[] = "0123456789abcdef";
static char result[9];
int i;
result[8] = 0;
i = 8;
do {
--i;
result[i] = digits[x & 0xf];
x >>= 4;
} while (x != 0 && i > 0);
return &result[i];
}
static int __init prom_setprop(phandle node, const char *nodename,
const char *pname, void *value, size_t valuelen)
{
char cmd[256], *p;
if (!(OF_WORKAROUNDS & OF_WA_LONGTRAIL))
return call_prom("setprop", 4, 1, node, ADDR(pname),
(u32)(unsigned long) value, (u32) valuelen);
/* gah... setprop doesn't work on longtrail, have to use interpret */
p = cmd;
add_string(&p, "dev");
add_string(&p, nodename);
add_string(&p, tohex((u32)(unsigned long) value));
add_string(&p, tohex(valuelen));
add_string(&p, tohex(ADDR(pname)));
add_string(&p, tohex(strlen(RELOC(pname))));
add_string(&p, "property");
*p = 0;
return call_prom("interpret", 1, 1, (u32)(unsigned long) cmd);
}
/* We can't use the standard versions because of RELOC headaches. */
#define isxdigit(c) (('0' <= (c) && (c) <= '9') \
|| ('a' <= (c) && (c) <= 'f') \
|| ('A' <= (c) && (c) <= 'F'))
#define isdigit(c) ('0' <= (c) && (c) <= '9')
#define islower(c) ('a' <= (c) && (c) <= 'z')
#define toupper(c) (islower(c) ? ((c) - 'a' + 'A') : (c))
unsigned long prom_strtoul(const char *cp, const char **endp)
{
unsigned long result = 0, base = 10, value;
if (*cp == '0') {
base = 8;
cp++;
if (toupper(*cp) == 'X') {
cp++;
base = 16;
}
}
while (isxdigit(*cp) &&
(value = isdigit(*cp) ? *cp - '0' : toupper(*cp) - 'A' + 10) < base) {
result = result * base + value;
cp++;
}
if (endp)
*endp = cp;
return result;
}
unsigned long prom_memparse(const char *ptr, const char **retptr)
{
unsigned long ret = prom_strtoul(ptr, retptr);
int shift = 0;
/*
* We can't use a switch here because GCC *may* generate a
* jump table which won't work, because we're not running at
* the address we're linked at.
*/
if ('G' == **retptr || 'g' == **retptr)
shift = 30;
if ('M' == **retptr || 'm' == **retptr)
shift = 20;
if ('K' == **retptr || 'k' == **retptr)
shift = 10;
if (shift) {
ret <<= shift;
(*retptr)++;
}
return ret;
}
/*
* Early parsing of the command line passed to the kernel, used for
* "mem=x" and the options that affect the iommu
*/
static void __init early_cmdline_parse(void)
{
struct prom_t *_prom = &RELOC(prom);
const char *opt;
char *p;
int l = 0;
RELOC(prom_cmd_line[0]) = 0;
p = RELOC(prom_cmd_line);
if ((long)_prom->chosen > 0)
l = prom_getprop(_prom->chosen, "bootargs", p, COMMAND_LINE_SIZE-1);
#ifdef CONFIG_CMDLINE
if (l <= 0 || p[0] == '\0') /* dbl check */
strlcpy(RELOC(prom_cmd_line),
RELOC(CONFIG_CMDLINE), sizeof(prom_cmd_line));
#endif /* CONFIG_CMDLINE */
prom_printf("command line: %s\n", RELOC(prom_cmd_line));
#ifdef CONFIG_PPC64
opt = strstr(RELOC(prom_cmd_line), RELOC("iommu="));
if (opt) {
prom_printf("iommu opt is: %s\n", opt);
opt += 6;
while (*opt && *opt == ' ')
opt++;
if (!strncmp(opt, RELOC("off"), 3))
RELOC(prom_iommu_off) = 1;
else if (!strncmp(opt, RELOC("force"), 5))
RELOC(prom_iommu_force_on) = 1;
}
#endif
opt = strstr(RELOC(prom_cmd_line), RELOC("mem="));
if (opt) {
opt += 4;
RELOC(prom_memory_limit) = prom_memparse(opt, (const char **)&opt);
#ifdef CONFIG_PPC64
/* Align to 16 MB == size of ppc64 large page */
RELOC(prom_memory_limit) = ALIGN(RELOC(prom_memory_limit), 0x1000000);
#endif
}
}
#ifdef CONFIG_PPC_PSERIES
/*
* There are two methods for telling firmware what our capabilities are.
* Newer machines have an "ibm,client-architecture-support" method on the
* root node. For older machines, we have to call the "process-elf-header"
* method in the /packages/elf-loader node, passing it a fake 32-bit
* ELF header containing a couple of PT_NOTE sections that contain
* structures that contain various information.
*/
/*
* New method - extensible architecture description vector.
*
* Because the description vector contains a mix of byte and word
* values, we declare it as an unsigned char array, and use this
* macro to put word values in.
*/
#define W(x) ((x) >> 24) & 0xff, ((x) >> 16) & 0xff, \
((x) >> 8) & 0xff, (x) & 0xff
/* Option vector bits - generic bits in byte 1 */
#define OV_IGNORE 0x80 /* ignore this vector */
#define OV_CESSATION_POLICY 0x40 /* halt if unsupported option present*/
/* Option vector 1: processor architectures supported */
#define OV1_PPC_2_00 0x80 /* set if we support PowerPC 2.00 */
#define OV1_PPC_2_01 0x40 /* set if we support PowerPC 2.01 */
#define OV1_PPC_2_02 0x20 /* set if we support PowerPC 2.02 */
#define OV1_PPC_2_03 0x10 /* set if we support PowerPC 2.03 */
#define OV1_PPC_2_04 0x08 /* set if we support PowerPC 2.04 */
#define OV1_PPC_2_05 0x04 /* set if we support PowerPC 2.05 */
#define OV1_PPC_2_06 0x02 /* set if we support PowerPC 2.06 */
/* Option vector 2: Open Firmware options supported */
#define OV2_REAL_MODE 0x20 /* set if we want OF in real mode */
/* Option vector 3: processor options supported */
#define OV3_FP 0x80 /* floating point */
#define OV3_VMX 0x40 /* VMX/Altivec */
#define OV3_DFP 0x20 /* decimal FP */
/* Option vector 5: PAPR/OF options supported */
#define OV5_LPAR 0x80 /* logical partitioning supported */
#define OV5_SPLPAR 0x40 /* shared-processor LPAR supported */
/* ibm,dynamic-reconfiguration-memory property supported */
#define OV5_DRCONF_MEMORY 0x20
#define OV5_LARGE_PAGES 0x10 /* large pages supported */
#define OV5_DONATE_DEDICATE_CPU 0x02 /* donate dedicated CPU support */
/* PCIe/MSI support. Without MSI full PCIe is not supported */
#ifdef CONFIG_PCI_MSI
#define OV5_MSI 0x01 /* PCIe/MSI support */
#else
#define OV5_MSI 0x00
#endif /* CONFIG_PCI_MSI */
#ifdef CONFIG_PPC_SMLPAR
#define OV5_CMO 0x80 /* Cooperative Memory Overcommitment */
#else
#define OV5_CMO 0x00
#endif
/*
* The architecture vector has an array of PVR mask/value pairs,
* followed by # option vectors - 1, followed by the option vectors.
*/
static unsigned char ibm_architecture_vec[] = {
W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */
W(0xffff0000), W(0x003e0000), /* POWER6 */
W(0xffff0000), W(0x003f0000), /* POWER7 */
W(0xffffffff), W(0x0f000003), /* all 2.06-compliant */
W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */
W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */
5 - 1, /* 5 option vectors */
/* option vector 1: processor architectures supported */
3 - 2, /* length */
0, /* don't ignore, don't halt */
OV1_PPC_2_00 | OV1_PPC_2_01 | OV1_PPC_2_02 | OV1_PPC_2_03 |
OV1_PPC_2_04 | OV1_PPC_2_05 | OV1_PPC_2_06,
/* option vector 2: Open Firmware options supported */
34 - 2, /* length */
OV2_REAL_MODE,
0, 0,
W(0xffffffff), /* real_base */
W(0xffffffff), /* real_size */
W(0xffffffff), /* virt_base */
W(0xffffffff), /* virt_size */
W(0xffffffff), /* load_base */
W(64), /* 64MB min RMA */
W(0xffffffff), /* full client load */
0, /* min RMA percentage of total RAM */
48, /* max log_2(hash table size) */
/* option vector 3: processor options supported */
3 - 2, /* length */
0, /* don't ignore, don't halt */
OV3_FP | OV3_VMX | OV3_DFP,
/* option vector 4: IBM PAPR implementation */
2 - 2, /* length */
0, /* don't halt */
/* option vector 5: PAPR/OF options */
5 - 2, /* length */
0, /* don't ignore, don't halt */
OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES | OV5_DRCONF_MEMORY |
OV5_DONATE_DEDICATE_CPU | OV5_MSI,
0,
OV5_CMO,
};
/* Old method - ELF header with PT_NOTE sections */
static struct fake_elf {
Elf32_Ehdr elfhdr;
Elf32_Phdr phdr[2];
struct chrpnote {
u32 namesz;
u32 descsz;
u32 type;
char name[8]; /* "PowerPC" */
struct chrpdesc {
u32 real_mode;
u32 real_base;
u32 real_size;
u32 virt_base;
u32 virt_size;
u32 load_base;
} chrpdesc;
} chrpnote;
struct rpanote {
u32 namesz;
u32 descsz;
u32 type;
char name[24]; /* "IBM,RPA-Client-Config" */
struct rpadesc {
u32 lpar_affinity;
u32 min_rmo_size;
u32 min_rmo_percent;
u32 max_pft_size;
u32 splpar;
u32 min_load;
u32 new_mem_def;
u32 ignore_me;
} rpadesc;
} rpanote;
} fake_elf = {
.elfhdr = {
.e_ident = { 0x7f, 'E', 'L', 'F',
ELFCLASS32, ELFDATA2MSB, EV_CURRENT },
.e_type = ET_EXEC, /* yeah right */
.e_machine = EM_PPC,
.e_version = EV_CURRENT,
.e_phoff = offsetof(struct fake_elf, phdr),
.e_phentsize = sizeof(Elf32_Phdr),
.e_phnum = 2
},
.phdr = {
[0] = {
.p_type = PT_NOTE,
.p_offset = offsetof(struct fake_elf, chrpnote),
.p_filesz = sizeof(struct chrpnote)
}, [1] = {
.p_type = PT_NOTE,
.p_offset = offsetof(struct fake_elf, rpanote),
.p_filesz = sizeof(struct rpanote)
}
},
.chrpnote = {
.namesz = sizeof("PowerPC"),
.descsz = sizeof(struct chrpdesc),
.type = 0x1275,
.name = "PowerPC",
.chrpdesc = {
.real_mode = ~0U, /* ~0 means "don't care" */
.real_base = ~0U,
.real_size = ~0U,
.virt_base = ~0U,
.virt_size = ~0U,
.load_base = ~0U
},
},
.rpanote = {
.namesz = sizeof("IBM,RPA-Client-Config"),
.descsz = sizeof(struct rpadesc),
.type = 0x12759999,
.name = "IBM,RPA-Client-Config",
.rpadesc = {
.lpar_affinity = 0,
.min_rmo_size = 64, /* in megabytes */
.min_rmo_percent = 0,
.max_pft_size = 48, /* 2^48 bytes max PFT size */
.splpar = 1,
.min_load = ~0U,
.new_mem_def = 0
}
}
};
static void __init prom_send_capabilities(void)
{
ihandle elfloader, root;
prom_arg_t ret;
root = call_prom("open", 1, 1, ADDR("/"));
if (root != 0) {
/* try calling the ibm,client-architecture-support method */
prom_printf("Calling ibm,client-architecture-support...");
if (call_prom_ret("call-method", 3, 2, &ret,
ADDR("ibm,client-architecture-support"),
root,
ADDR(ibm_architecture_vec)) == 0) {
/* the call exists... */
if (ret)
prom_printf("\nWARNING: ibm,client-architecture"
"-support call FAILED!\n");
call_prom("close", 1, 0, root);
prom_printf(" done\n");
return;
}
call_prom("close", 1, 0, root);
prom_printf(" not implemented\n");
}
/* no ibm,client-architecture-support call, try the old way */
elfloader = call_prom("open", 1, 1, ADDR("/packages/elf-loader"));
if (elfloader == 0) {
prom_printf("couldn't open /packages/elf-loader\n");
return;
}
call_prom("call-method", 3, 1, ADDR("process-elf-header"),
elfloader, ADDR(&fake_elf));
call_prom("close", 1, 0, elfloader);
}
#endif
/*
* Memory allocation strategy... our layout is normally:
*
* at 14Mb or more we have vmlinux, then a gap and initrd. In some
* rare cases, initrd might end up being before the kernel though.
* We assume this won't override the final kernel at 0, we have no
* provision to handle that in this version, but it should hopefully
* never happen.
*
* alloc_top is set to the top of RMO, eventually shrink down if the
* TCEs overlap
*
* alloc_bottom is set to the top of kernel/initrd
*
* from there, allocations are done this way : rtas is allocated
* topmost, and the device-tree is allocated from the bottom. We try
* to grow the device-tree allocation as we progress. If we can't,
* then we fail, we don't currently have a facility to restart
* elsewhere, but that shouldn't be necessary.
*
* Note that calls to reserve_mem have to be done explicitly, memory
* allocated with either alloc_up or alloc_down isn't automatically
* reserved.
*/
/*
* Allocates memory in the RMO upward from the kernel/initrd
*
* When align is 0, this is a special case, it means to allocate in place
* at the current location of alloc_bottom or fail (that is basically
* extending the previous allocation). Used for the device-tree flattening
*/
static unsigned long __init alloc_up(unsigned long size, unsigned long align)
{
unsigned long base = RELOC(alloc_bottom);
unsigned long addr = 0;
if (align)
base = _ALIGN_UP(base, align);
prom_debug("alloc_up(%x, %x)\n", size, align);
if (RELOC(ram_top) == 0)
prom_panic("alloc_up() called with mem not initialized\n");
if (align)
base = _ALIGN_UP(RELOC(alloc_bottom), align);
else
base = RELOC(alloc_bottom);
for(; (base + size) <= RELOC(alloc_top);
base = _ALIGN_UP(base + 0x100000, align)) {
prom_debug(" trying: 0x%x\n\r", base);
addr = (unsigned long)prom_claim(base, size, 0);
if (addr != PROM_ERROR && addr != 0)
break;
addr = 0;
if (align == 0)
break;
}
if (addr == 0)
return 0;
RELOC(alloc_bottom) = addr + size;
prom_debug(" -> %x\n", addr);
prom_debug(" alloc_bottom : %x\n", RELOC(alloc_bottom));
prom_debug(" alloc_top : %x\n", RELOC(alloc_top));
prom_debug(" alloc_top_hi : %x\n", RELOC(alloc_top_high));
prom_debug(" rmo_top : %x\n", RELOC(rmo_top));
prom_debug(" ram_top : %x\n", RELOC(ram_top));
return addr;
}
/*
* Allocates memory downward, either from top of RMO, or if highmem
* is set, from the top of RAM. Note that this one doesn't handle
* failures. It does claim memory if highmem is not set.
*/
static unsigned long __init alloc_down(unsigned long size, unsigned long align,
int highmem)
{
unsigned long base, addr = 0;
prom_debug("alloc_down(%x, %x, %s)\n", size, align,
highmem ? RELOC("(high)") : RELOC("(low)"));
if (RELOC(ram_top) == 0)
prom_panic("alloc_down() called with mem not initialized\n");
if (highmem) {
/* Carve out storage for the TCE table. */
addr = _ALIGN_DOWN(RELOC(alloc_top_high) - size, align);
if (addr <= RELOC(alloc_bottom))
return 0;
/* Will we bump into the RMO ? If yes, check out that we
* didn't overlap existing allocations there, if we did,
* we are dead, we must be the first in town !
*/
if (addr < RELOC(rmo_top)) {
/* Good, we are first */
if (RELOC(alloc_top) == RELOC(rmo_top))
RELOC(alloc_top) = RELOC(rmo_top) = addr;
else
return 0;
}
RELOC(alloc_top_high) = addr;
goto bail;
}
base = _ALIGN_DOWN(RELOC(alloc_top) - size, align);
for (; base > RELOC(alloc_bottom);
base = _ALIGN_DOWN(base - 0x100000, align)) {
prom_debug(" trying: 0x%x\n\r", base);
addr = (unsigned long)prom_claim(base, size, 0);
if (addr != PROM_ERROR && addr != 0)
break;
addr = 0;
}
if (addr == 0)
return 0;
RELOC(alloc_top) = addr;
bail:
prom_debug(" -> %x\n", addr);
prom_debug(" alloc_bottom : %x\n", RELOC(alloc_bottom));
prom_debug(" alloc_top : %x\n", RELOC(alloc_top));
prom_debug(" alloc_top_hi : %x\n", RELOC(alloc_top_high));
prom_debug(" rmo_top : %x\n", RELOC(rmo_top));
prom_debug(" ram_top : %x\n", RELOC(ram_top));
return addr;
}
/*
* Parse a "reg" cell
*/
static unsigned long __init prom_next_cell(int s, cell_t **cellp)
{
cell_t *p = *cellp;
unsigned long r = 0;
/* Ignore more than 2 cells */
while (s > sizeof(unsigned long) / 4) {
p++;
s--;
}
r = *p++;
#ifdef CONFIG_PPC64
if (s > 1) {
r <<= 32;
r |= *(p++);
}
#endif
*cellp = p;
return r;
}
/*
* Very dumb function for adding to the memory reserve list, but
* we don't need anything smarter at this point
*
* XXX Eventually check for collisions. They should NEVER happen.
* If problems seem to show up, it would be a good start to track
* them down.
*/
static void __init reserve_mem(u64 base, u64 size)
{
u64 top = base + size;
unsigned long cnt = RELOC(mem_reserve_cnt);
if (size == 0)
return;
/* We need to always keep one empty entry so that we
* have our terminator with "size" set to 0 since we are
* dumb and just copy this entire array to the boot params
*/
base = _ALIGN_DOWN(base, PAGE_SIZE);
top = _ALIGN_UP(top, PAGE_SIZE);
size = top - base;
if (cnt >= (MEM_RESERVE_MAP_SIZE - 1))
prom_panic("Memory reserve map exhausted !\n");
RELOC(mem_reserve_map)[cnt].base = base;
RELOC(mem_reserve_map)[cnt].size = size;
RELOC(mem_reserve_cnt) = cnt + 1;
}
/*
* Initialize memory allocation mechanism, parse "memory" nodes and
* obtain that way the top of memory and RMO to setup out local allocator
*/
static void __init prom_init_mem(void)
{
phandle node;
char *path, type[64];
unsigned int plen;
cell_t *p, *endp;
struct prom_t *_prom = &RELOC(prom);
u32 rac, rsc;
/*
* We iterate the memory nodes to find
* 1) top of RMO (first node)
* 2) top of memory
*/
rac = 2;
prom_getprop(_prom->root, "#address-cells", &rac, sizeof(rac));
rsc = 1;
prom_getprop(_prom->root, "#size-cells", &rsc, sizeof(rsc));
prom_debug("root_addr_cells: %x\n", (unsigned long) rac);
prom_debug("root_size_cells: %x\n", (unsigned long) rsc);
prom_debug("scanning memory:\n");
path = RELOC(prom_scratch);
for (node = 0; prom_next_node(&node); ) {
type[0] = 0;
prom_getprop(node, "device_type", type, sizeof(type));
if (type[0] == 0) {
/*
* CHRP Longtrail machines have no device_type
* on the memory node, so check the name instead...
*/
prom_getprop(node, "name", type, sizeof(type));
}
if (strcmp(type, RELOC("memory")))
continue;
plen = prom_getprop(node, "reg", RELOC(regbuf), sizeof(regbuf));
if (plen > sizeof(regbuf)) {
prom_printf("memory node too large for buffer !\n");
plen = sizeof(regbuf);
}
p = RELOC(regbuf);
endp = p + (plen / sizeof(cell_t));
#ifdef DEBUG_PROM
memset(path, 0, PROM_SCRATCH_SIZE);
call_prom("package-to-path", 3, 1, node, path, PROM_SCRATCH_SIZE-1);
prom_debug(" node %s :\n", path);
#endif /* DEBUG_PROM */
while ((endp - p) >= (rac + rsc)) {
unsigned long base, size;
base = prom_next_cell(rac, &p);
size = prom_next_cell(rsc, &p);
if (size == 0)
continue;
prom_debug(" %x %x\n", base, size);
if (base == 0 && (RELOC(of_platform) & PLATFORM_LPAR))
RELOC(rmo_top) = size;
if ((base + size) > RELOC(ram_top))
RELOC(ram_top) = base + size;
}
}
RELOC(alloc_bottom) = PAGE_ALIGN((unsigned long)&RELOC(_end) + 0x4000);
/* Check if we have an initrd after the kernel, if we do move our bottom
* point to after it
*/
if (RELOC(prom_initrd_start)) {
if (RELOC(prom_initrd_end) > RELOC(alloc_bottom))
RELOC(alloc_bottom) = PAGE_ALIGN(RELOC(prom_initrd_end));
}
/*
* If prom_memory_limit is set we reduce the upper limits *except* for
* alloc_top_high. This must be the real top of RAM so we can put
* TCE's up there.
*/
RELOC(alloc_top_high) = RELOC(ram_top);
if (RELOC(prom_memory_limit)) {
if (RELOC(prom_memory_limit) <= RELOC(alloc_bottom)) {
prom_printf("Ignoring mem=%x <= alloc_bottom.\n",
RELOC(prom_memory_limit));
RELOC(prom_memory_limit) = 0;
} else if (RELOC(prom_memory_limit) >= RELOC(ram_top)) {
prom_printf("Ignoring mem=%x >= ram_top.\n",
RELOC(prom_memory_limit));
RELOC(prom_memory_limit) = 0;
} else {
RELOC(ram_top) = RELOC(prom_memory_limit);
RELOC(rmo_top) = min(RELOC(rmo_top), RELOC(prom_memory_limit));
}
}
/*
* Setup our top alloc point, that is top of RMO or top of
* segment 0 when running non-LPAR.
* Some RS64 machines have buggy firmware where claims up at
* 1GB fail. Cap at 768MB as a workaround.
* Since 768MB is plenty of room, and we need to cap to something
* reasonable on 32-bit, cap at 768MB on all machines.
*/
if (!RELOC(rmo_top))
RELOC(rmo_top) = RELOC(ram_top);
RELOC(rmo_top) = min(0x30000000ul, RELOC(rmo_top));
RELOC(alloc_top) = RELOC(rmo_top);
RELOC(alloc_top_high) = RELOC(ram_top);
prom_printf("memory layout at init:\n");
prom_printf(" memory_limit : %x (16 MB aligned)\n", RELOC(prom_memory_limit));
prom_printf(" alloc_bottom : %x\n", RELOC(alloc_bottom));
prom_printf(" alloc_top : %x\n", RELOC(alloc_top));
prom_printf(" alloc_top_hi : %x\n", RELOC(alloc_top_high));
prom_printf(" rmo_top : %x\n", RELOC(rmo_top));
prom_printf(" ram_top : %x\n", RELOC(ram_top));
}
/*
* Allocate room for and instantiate RTAS
*/
static void __init prom_instantiate_rtas(void)
{
phandle rtas_node;
ihandle rtas_inst;
u32 base, entry = 0;
u32 size = 0;
prom_debug("prom_instantiate_rtas: start...\n");
rtas_node = call_prom("finddevice", 1, 1, ADDR("/rtas"));
prom_debug("rtas_node: %x\n", rtas_node);
if (!PHANDLE_VALID(rtas_node))
return;
prom_getprop(rtas_node, "rtas-size", &size, sizeof(size));
if (size == 0)
return;
base = alloc_down(size, PAGE_SIZE, 0);
if (base == 0) {
prom_printf("RTAS allocation failed !\n");
return;
}
rtas_inst = call_prom("open", 1, 1, ADDR("/rtas"));
if (!IHANDLE_VALID(rtas_inst)) {
prom_printf("opening rtas package failed (%x)\n", rtas_inst);
return;
}
prom_printf("instantiating rtas at 0x%x...", base);
if (call_prom_ret("call-method", 3, 2, &entry,
ADDR("instantiate-rtas"),
rtas_inst, base) != 0
|| entry == 0) {
prom_printf(" failed\n");
return;
}
prom_printf(" done\n");
reserve_mem(base, size);
prom_setprop(rtas_node, "/rtas", "linux,rtas-base",
&base, sizeof(base));
prom_setprop(rtas_node, "/rtas", "linux,rtas-entry",
&entry, sizeof(entry));
prom_debug("rtas base = 0x%x\n", base);
prom_debug("rtas entry = 0x%x\n", entry);
prom_debug("rtas size = 0x%x\n", (long)size);
prom_debug("prom_instantiate_rtas: end...\n");
}
#ifdef CONFIG_PPC64
/*
* Allocate room for and initialize TCE tables
*/
static void __init prom_initialize_tce_table(void)
{
phandle node;
ihandle phb_node;
char compatible[64], type[64], model[64];
char *path = RELOC(prom_scratch);
u64 base, align;
u32 minalign, minsize;
u64 tce_entry, *tce_entryp;
u64 local_alloc_top, local_alloc_bottom;
u64 i;
if (RELOC(prom_iommu_off))
return;
prom_debug("starting prom_initialize_tce_table\n");
/* Cache current top of allocs so we reserve a single block */
local_alloc_top = RELOC(alloc_top_high);
local_alloc_bottom = local_alloc_top;
/* Search all nodes looking for PHBs. */
for (node = 0; prom_next_node(&node); ) {
compatible[0] = 0;
type[0] = 0;
model[0] = 0;
prom_getprop(node, "compatible",
compatible, sizeof(compatible));
prom_getprop(node, "device_type", type, sizeof(type));
prom_getprop(node, "model", model, sizeof(model));
if ((type[0] == 0) || (strstr(type, RELOC("pci")) == NULL))
continue;
/* Keep the old logic intact to avoid regression. */
if (compatible[0] != 0) {
if ((strstr(compatible, RELOC("python")) == NULL) &&
(strstr(compatible, RELOC("Speedwagon")) == NULL) &&
(strstr(compatible, RELOC("Winnipeg")) == NULL))
continue;
} else if (model[0] != 0) {
if ((strstr(model, RELOC("ython")) == NULL) &&
(strstr(model, RELOC("peedwagon")) == NULL) &&
(strstr(model, RELOC("innipeg")) == NULL))
continue;
}
if (prom_getprop(node, "tce-table-minalign", &minalign,
sizeof(minalign)) == PROM_ERROR)
minalign = 0;
if (prom_getprop(node, "tce-table-minsize", &minsize,
sizeof(minsize)) == PROM_ERROR)
minsize = 4UL << 20;
/*
* Even though we read what OF wants, we just set the table
* size to 4 MB. This is enough to map 2GB of PCI DMA space.
* By doing this, we avoid the pitfalls of trying to DMA to
* MMIO space and the DMA alias hole.
*
* On POWER4, firmware sets the TCE region by assuming
* each TCE table is 8MB. Using this memory for anything
* else will impact performance, so we always allocate 8MB.
* Anton
*/
if (__is_processor(PV_POWER4) || __is_processor(PV_POWER4p))
minsize = 8UL << 20;
else
minsize = 4UL << 20;
/* Align to the greater of the align or size */
align = max(minalign, minsize);
base = alloc_down(minsize, align, 1);
if (base == 0)
prom_panic("ERROR, cannot find space for TCE table.\n");
if (base < local_alloc_bottom)
local_alloc_bottom = base;
/* It seems OF doesn't null-terminate the path :-( */
memset(path, 0, PROM_SCRATCH_SIZE);
/* Call OF to setup the TCE hardware */
if (call_prom("package-to-path", 3, 1, node,
path, PROM_SCRATCH_SIZE-1) == PROM_ERROR) {
prom_printf("package-to-path failed\n");
}
/* Save away the TCE table attributes for later use. */
prom_setprop(node, path, "linux,tce-base", &base, sizeof(base));
prom_setprop(node, path, "linux,tce-size", &minsize, sizeof(minsize));
prom_debug("TCE table: %s\n", path);
prom_debug("\tnode = 0x%x\n", node);
prom_debug("\tbase = 0x%x\n", base);
prom_debug("\tsize = 0x%x\n", minsize);
/* Initialize the table to have a one-to-one mapping
* over the allocated size.
*/
tce_entryp = (u64 *)base;
for (i = 0; i < (minsize >> 3) ;tce_entryp++, i++) {
tce_entry = (i << PAGE_SHIFT);
tce_entry |= 0x3;
*tce_entryp = tce_entry;
}
prom_printf("opening PHB %s", path);
phb_node = call_prom("open", 1, 1, path);
if (phb_node == 0)
prom_printf("... failed\n");
else
prom_printf("... done\n");
call_prom("call-method", 6, 0, ADDR("set-64-bit-addressing"),
phb_node, -1, minsize,
(u32) base, (u32) (base >> 32));
call_prom("close", 1, 0, phb_node);
}
reserve_mem(local_alloc_bottom, local_alloc_top - local_alloc_bottom);
/* These are only really needed if there is a memory limit in
* effect, but we don't know so export them always. */
RELOC(prom_tce_alloc_start) = local_alloc_bottom;
RELOC(prom_tce_alloc_end) = local_alloc_top;
/* Flag the first invalid entry */
prom_debug("ending prom_initialize_tce_table\n");
}
#endif
/*
* With CHRP SMP we need to use the OF to start the other processors.
* We can't wait until smp_boot_cpus (the OF is trashed by then)
* so we have to put the processors into a holding pattern controlled
* by the kernel (not OF) before we destroy the OF.
*
* This uses a chunk of low memory, puts some holding pattern
* code there and sends the other processors off to there until
* smp_boot_cpus tells them to do something. The holding pattern
* checks that address until its cpu # is there, when it is that
* cpu jumps to __secondary_start(). smp_boot_cpus() takes care
* of setting those values.
*
* We also use physical address 0x4 here to tell when a cpu
* is in its holding pattern code.
*
* -- Cort
*/
/*
* We want to reference the copy of __secondary_hold_* in the
* 0 - 0x100 address range
*/
#define LOW_ADDR(x) (((unsigned long) &(x)) & 0xff)
static void __init prom_hold_cpus(void)
{
unsigned long i;
unsigned int reg;
phandle node;
char type[64];
struct prom_t *_prom = &RELOC(prom);
unsigned long *spinloop
= (void *) LOW_ADDR(__secondary_hold_spinloop);
unsigned long *acknowledge
= (void *) LOW_ADDR(__secondary_hold_acknowledge);
unsigned long secondary_hold = LOW_ADDR(__secondary_hold);
prom_debug("prom_hold_cpus: start...\n");
prom_debug(" 1) spinloop = 0x%x\n", (unsigned long)spinloop);
prom_debug(" 1) *spinloop = 0x%x\n", *spinloop);
prom_debug(" 1) acknowledge = 0x%x\n",
(unsigned long)acknowledge);
prom_debug(" 1) *acknowledge = 0x%x\n", *acknowledge);
prom_debug(" 1) secondary_hold = 0x%x\n", secondary_hold);
/* Set the common spinloop variable, so all of the secondary cpus
* will block when they are awakened from their OF spinloop.
* This must occur for both SMP and non SMP kernels, since OF will
* be trashed when we move the kernel.
*/
*spinloop = 0;
/* look for cpus */
for (node = 0; prom_next_node(&node); ) {
type[0] = 0;
prom_getprop(node, "device_type", type, sizeof(type));
if (strcmp(type, RELOC("cpu")) != 0)
continue;
/* Skip non-configured cpus. */
if (prom_getprop(node, "status", type, sizeof(type)) > 0)
if (strcmp(type, RELOC("okay")) != 0)
continue;
reg = -1;
prom_getprop(node, "reg", ®, sizeof(reg));
prom_debug("cpu hw idx = 0x%x\n", reg);
/* Init the acknowledge var which will be reset by
* the secondary cpu when it awakens from its OF
* spinloop.
*/
*acknowledge = (unsigned long)-1;
if (reg != _prom->cpu) {
/* Primary Thread of non-boot cpu */
prom_printf("starting cpu hw idx %x... ", reg);
call_prom("start-cpu", 3, 0, node,
secondary_hold, reg);
for (i = 0; (i < 100000000) &&
(*acknowledge == ((unsigned long)-1)); i++ )
mb();
if (*acknowledge == reg)
prom_printf("done\n");
else
prom_printf("failed: %x\n", *acknowledge);
}
#ifdef CONFIG_SMP
else
prom_printf("boot cpu hw idx %x\n", reg);
#endif /* CONFIG_SMP */
}
prom_debug("prom_hold_cpus: end...\n");
}
static void __init prom_init_client_services(unsigned long pp)
{
struct prom_t *_prom = &RELOC(prom);
/* Get a handle to the prom entry point before anything else */
RELOC(prom_entry) = pp;
/* get a handle for the stdout device */
_prom->chosen = call_prom("finddevice", 1, 1, ADDR("/chosen"));
if (!PHANDLE_VALID(_prom->chosen))
prom_panic("cannot find chosen"); /* msg won't be printed :( */
/* get device tree root */
_prom->root = call_prom("finddevice", 1, 1, ADDR("/"));
if (!PHANDLE_VALID(_prom->root))
prom_panic("cannot find device tree root"); /* msg won't be printed :( */
_prom->mmumap = 0;
}
#ifdef CONFIG_PPC32
/*
* For really old powermacs, we need to map things we claim.
* For that, we need the ihandle of the mmu.
* Also, on the longtrail, we need to work around other bugs.
*/
static void __init prom_find_mmu(void)
{
struct prom_t *_prom = &RELOC(prom);
phandle oprom;
char version[64];
oprom = call_prom("finddevice", 1, 1, ADDR("/openprom"));
if (!PHANDLE_VALID(oprom))
return;
if (prom_getprop(oprom, "model", version, sizeof(version)) <= 0)
return;
version[sizeof(version) - 1] = 0;
/* XXX might need to add other versions here */
if (strcmp(version, "Open Firmware, 1.0.5") == 0)
of_workarounds = OF_WA_CLAIM;
else if (strncmp(version, "FirmWorks,3.", 12) == 0) {
of_workarounds = OF_WA_CLAIM | OF_WA_LONGTRAIL;
call_prom("interpret", 1, 1, "dev /memory 0 to allow-reclaim");
} else
return;
_prom->memory = call_prom("open", 1, 1, ADDR("/memory"));
prom_getprop(_prom->chosen, "mmu", &_prom->mmumap,
sizeof(_prom->mmumap));
if (!IHANDLE_VALID(_prom->memory) || !IHANDLE_VALID(_prom->mmumap))
of_workarounds &= ~OF_WA_CLAIM; /* hmmm */
}
#else
#define prom_find_mmu()
#endif
static void __init prom_init_stdout(void)
{
struct prom_t *_prom = &RELOC(prom);
char *path = RELOC(of_stdout_device);
char type[16];
u32 val;
if (prom_getprop(_prom->chosen, "stdout", &val, sizeof(val)) <= 0)
prom_panic("cannot find stdout");
_prom->stdout = val;
/* Get the full OF pathname of the stdout device */
memset(path, 0, 256);
call_prom("instance-to-path", 3, 1, _prom->stdout, path, 255);
val = call_prom("instance-to-package", 1, 1, _prom->stdout);
prom_setprop(_prom->chosen, "/chosen", "linux,stdout-package",
&val, sizeof(val));
prom_printf("OF stdout device is: %s\n", RELOC(of_stdout_device));
prom_setprop(_prom->chosen, "/chosen", "linux,stdout-path",
path, strlen(path) + 1);
/* If it's a display, note it */
memset(type, 0, sizeof(type));
prom_getprop(val, "device_type", type, sizeof(type));
if (strcmp(type, RELOC("display")) == 0)
prom_setprop(val, path, "linux,boot-display", NULL, 0);
}
static void __init prom_close_stdin(void)
{
struct prom_t *_prom = &RELOC(prom);
ihandle val;
if (prom_getprop(_prom->chosen, "stdin", &val, sizeof(val)) > 0)
call_prom("close", 1, 0, val);
}
static int __init prom_find_machine_type(void)
{
struct prom_t *_prom = &RELOC(prom);
char compat[256];
int len, i = 0;
#ifdef CONFIG_PPC64
phandle rtas;
int x;
#endif
/* Look for a PowerMac */
len = prom_getprop(_prom->root, "compatible",
compat, sizeof(compat)-1);
if (len > 0) {
compat[len] = 0;
while (i < len) {
char *p = &compat[i];
int sl = strlen(p);
if (sl == 0)
break;
if (strstr(p, RELOC("Power Macintosh")) ||
strstr(p, RELOC("MacRISC")))
return PLATFORM_POWERMAC;
#ifdef CONFIG_PPC64
/* We must make sure we don't detect the IBM Cell
* blades as pSeries due to some firmware issues,
* so we do it here.
*/
if (strstr(p, RELOC("IBM,CBEA")) ||
strstr(p, RELOC("IBM,CPBW-1.0")))
return PLATFORM_GENERIC;
#endif /* CONFIG_PPC64 */
i += sl + 1;
}
}
#ifdef CONFIG_PPC64
/* If not a mac, try to figure out if it's an IBM pSeries or any other
* PAPR compliant platform. We assume it is if :
* - /device_type is "chrp" (please, do NOT use that for future
* non-IBM designs !
* - it has /rtas
*/
len = prom_getprop(_prom->root, "device_type",
compat, sizeof(compat)-1);
if (len <= 0)
return PLATFORM_GENERIC;
if (strcmp(compat, RELOC("chrp")))
return PLATFORM_GENERIC;
/* Default to pSeries. We need to know if we are running LPAR */
rtas = call_prom("finddevice", 1, 1, ADDR("/rtas"));
if (!PHANDLE_VALID(rtas))
return PLATFORM_GENERIC;
x = prom_getproplen(rtas, "ibm,hypertas-functions");
if (x != PROM_ERROR) {
prom_debug("Hypertas detected, assuming LPAR !\n");
return PLATFORM_PSERIES_LPAR;
}
return PLATFORM_PSERIES;
#else
return PLATFORM_GENERIC;
#endif
}
static int __init prom_set_color(ihandle ih, int i, int r, int g, int b)
{
return call_prom("call-method", 6, 1, ADDR("color!"), ih, i, b, g, r);
}
/*
* If we have a display that we don't know how to drive,
* we will want to try to execute OF's open method for it
* later. However, OF will probably fall over if we do that
* we've taken over the MMU.
* So we check whether we will need to open the display,
* and if so, open it now.
*/
static void __init prom_check_displays(void)
{
char type[16], *path;
phandle node;
ihandle ih;
int i;
static unsigned char default_colors[] = {
0x00, 0x00, 0x00,
0x00, 0x00, 0xaa,
0x00, 0xaa, 0x00,
0x00, 0xaa, 0xaa,
0xaa, 0x00, 0x00,
0xaa, 0x00, 0xaa,
0xaa, 0xaa, 0x00,
0xaa, 0xaa, 0xaa,
0x55, 0x55, 0x55,
0x55, 0x55, 0xff,
0x55, 0xff, 0x55,
0x55, 0xff, 0xff,
0xff, 0x55, 0x55,
0xff, 0x55, 0xff,
0xff, 0xff, 0x55,
0xff, 0xff, 0xff
};
const unsigned char *clut;
prom_debug("Looking for displays\n");
for (node = 0; prom_next_node(&node); ) {
memset(type, 0, sizeof(type));
prom_getprop(node, "device_type", type, sizeof(type));
if (strcmp(type, RELOC("display")) != 0)
continue;
/* It seems OF doesn't null-terminate the path :-( */
path = RELOC(prom_scratch);
memset(path, 0, PROM_SCRATCH_SIZE);
/*
* leave some room at the end of the path for appending extra
* arguments
*/
if (call_prom("package-to-path", 3, 1, node, path,
PROM_SCRATCH_SIZE-10) == PROM_ERROR)
continue;
prom_printf("found display : %s, opening... ", path);
ih = call_prom("open", 1, 1, path);
if (ih == 0) {
prom_printf("failed\n");
continue;
}
/* Success */
prom_printf("done\n");
prom_setprop(node, path, "linux,opened", NULL, 0);
/* Setup a usable color table when the appropriate
* method is available. Should update this to set-colors */
clut = RELOC(default_colors);
for (i = 0; i < 32; i++, clut += 3)
if (prom_set_color(ih, i, clut[0], clut[1],
clut[2]) != 0)
break;
#ifdef CONFIG_LOGO_LINUX_CLUT224
clut = PTRRELOC(RELOC(logo_linux_clut224.clut));
for (i = 0; i < RELOC(logo_linux_clut224.clutsize); i++, clut += 3)
if (prom_set_color(ih, i + 32, clut[0], clut[1],
clut[2]) != 0)
break;
#endif /* CONFIG_LOGO_LINUX_CLUT224 */
}
}
/* Return (relocated) pointer to this much memory: moves initrd if reqd. */
static void __init *make_room(unsigned long *mem_start, unsigned long *mem_end,
unsigned long needed, unsigned long align)
{
void *ret;
*mem_start = _ALIGN(*mem_start, align);
while ((*mem_start + needed) > *mem_end) {
unsigned long room, chunk;
prom_debug("Chunk exhausted, claiming more at %x...\n",
RELOC(alloc_bottom));
room = RELOC(alloc_top) - RELOC(alloc_bottom);
if (room > DEVTREE_CHUNK_SIZE)
room = DEVTREE_CHUNK_SIZE;
if (room < PAGE_SIZE)
prom_panic("No memory for flatten_device_tree (no room)");
chunk = alloc_up(room, 0);
if (chunk == 0)
prom_panic("No memory for flatten_device_tree (claim failed)");
*mem_end = chunk + room;
}
ret = (void *)*mem_start;
*mem_start += needed;
return ret;
}
#define dt_push_token(token, mem_start, mem_end) \
do { *((u32 *)make_room(mem_start, mem_end, 4, 4)) = token; } while(0)
static unsigned long __init dt_find_string(char *str)
{
char *s, *os;
s = os = (char *)RELOC(dt_string_start);
s += 4;
while (s < (char *)RELOC(dt_string_end)) {
if (strcmp(s, str) == 0)
return s - os;
s += strlen(s) + 1;
}
return 0;
}
/*
* The Open Firmware 1275 specification states properties must be 31 bytes or
* less, however not all firmwares obey this. Make it 64 bytes to be safe.
*/
#define MAX_PROPERTY_NAME 64
static void __init scan_dt_build_strings(phandle node,
unsigned long *mem_start,
unsigned long *mem_end)
{
char *prev_name, *namep, *sstart;
unsigned long soff;
phandle child;
sstart = (char *)RELOC(dt_string_start);
/* get and store all property names */
prev_name = RELOC("");
for (;;) {
/* 64 is max len of name including nul. */
namep = make_room(mem_start, mem_end, MAX_PROPERTY_NAME, 1);
if (call_prom("nextprop", 3, 1, node, prev_name, namep) != 1) {
/* No more nodes: unwind alloc */
*mem_start = (unsigned long)namep;
break;
}
/* skip "name" */
if (strcmp(namep, RELOC("name")) == 0) {
*mem_start = (unsigned long)namep;
prev_name = RELOC("name");
continue;
}
/* get/create string entry */
soff = dt_find_string(namep);
if (soff != 0) {
*mem_start = (unsigned long)namep;
namep = sstart + soff;
} else {
/* Trim off some if we can */
*mem_start = (unsigned long)namep + strlen(namep) + 1;
RELOC(dt_string_end) = *mem_start;
}
prev_name = namep;
}
/* do all our children */
child = call_prom("child", 1, 1, node);
while (child != 0) {
scan_dt_build_strings(child, mem_start, mem_end);
child = call_prom("peer", 1, 1, child);
}
}
static void __init scan_dt_build_struct(phandle node, unsigned long *mem_start,
unsigned long *mem_end)
{
phandle child;
char *namep, *prev_name, *sstart, *p, *ep, *lp, *path;
unsigned long soff;
unsigned char *valp;
static char pname[MAX_PROPERTY_NAME];
int l, room;
dt_push_token(OF_DT_BEGIN_NODE, mem_start, mem_end);
/* get the node's full name */
namep = (char *)*mem_start;
room = *mem_end - *mem_start;
if (room > 255)
room = 255;
l = call_prom("package-to-path", 3, 1, node, namep, room);
if (l >= 0) {
/* Didn't fit? Get more room. */
if (l >= room) {
if (l >= *mem_end - *mem_start)
namep = make_room(mem_start, mem_end, l+1, 1);
call_prom("package-to-path", 3, 1, node, namep, l);
}
namep[l] = '\0';
/* Fixup an Apple bug where they have bogus \0 chars in the
* middle of the path in some properties, and extract
* the unit name (everything after the last '/').
*/
for (lp = p = namep, ep = namep + l; p < ep; p++) {
if (*p == '/')
lp = namep;
else if (*p != 0)
*lp++ = *p;
}
*lp = 0;
*mem_start = _ALIGN((unsigned long)lp + 1, 4);
}
/* get it again for debugging */
path = RELOC(prom_scratch);
memset(path, 0, PROM_SCRATCH_SIZE);
call_prom("package-to-path", 3, 1, node, path, PROM_SCRATCH_SIZE-1);
/* get and store all properties */
prev_name = RELOC("");
sstart = (char *)RELOC(dt_string_start);
for (;;) {
if (call_prom("nextprop", 3, 1, node, prev_name,
RELOC(pname)) != 1)
break;
/* skip "name" */
if (strcmp(RELOC(pname), RELOC("name")) == 0) {
prev_name = RELOC("name");
continue;
}
/* find string offset */
soff = dt_find_string(RELOC(pname));
if (soff == 0) {
prom_printf("WARNING: Can't find string index for"
" <%s>, node %s\n", RELOC(pname), path);
break;
}
prev_name = sstart + soff;
/* get length */
l = call_prom("getproplen", 2, 1, node, RELOC(pname));
/* sanity checks */
if (l == PROM_ERROR)
continue;
if (l > MAX_PROPERTY_LENGTH) {
prom_printf("WARNING: ignoring large property ");
/* It seems OF doesn't null-terminate the path :-( */
prom_printf("[%s] ", path);
prom_printf("%s length 0x%x\n", RELOC(pname), l);
continue;
}
/* push property head */
dt_push_token(OF_DT_PROP, mem_start, mem_end);
dt_push_token(l, mem_start, mem_end);
dt_push_token(soff, mem_start, mem_end);
/* push property content */
valp = make_room(mem_start, mem_end, l, 4);
call_prom("getprop", 4, 1, node, RELOC(pname), valp, l);
*mem_start = _ALIGN(*mem_start, 4);
}
/* Add a "linux,phandle" property. */
soff = dt_find_string(RELOC("linux,phandle"));
if (soff == 0)
prom_printf("WARNING: Can't find string index for"
" <linux-phandle> node %s\n", path);
else {
dt_push_token(OF_DT_PROP, mem_start, mem_end);
dt_push_token(4, mem_start, mem_end);
dt_push_token(soff, mem_start, mem_end);
valp = make_room(mem_start, mem_end, 4, 4);
*(u32 *)valp = node;
}
/* do all our children */
child = call_prom("child", 1, 1, node);
while (child != 0) {
scan_dt_build_struct(child, mem_start, mem_end);
child = call_prom("peer", 1, 1, child);
}
dt_push_token(OF_DT_END_NODE, mem_start, mem_end);
}
static void __init flatten_device_tree(void)
{
phandle root;
unsigned long mem_start, mem_end, room;
struct boot_param_header *hdr;
struct prom_t *_prom = &RELOC(prom);
char *namep;
u64 *rsvmap;
/*
* Check how much room we have between alloc top & bottom (+/- a
* few pages), crop to 4Mb, as this is our "chuck" size
*/
room = RELOC(alloc_top) - RELOC(alloc_bottom) - 0x4000;
if (room > DEVTREE_CHUNK_SIZE)
room = DEVTREE_CHUNK_SIZE;
prom_debug("starting device tree allocs at %x\n", RELOC(alloc_bottom));
/* Now try to claim that */
mem_start = (unsigned long)alloc_up(room, PAGE_SIZE);
if (mem_start == 0)
prom_panic("Can't allocate initial device-tree chunk\n");
mem_end = mem_start + room;
/* Get root of tree */
root = call_prom("peer", 1, 1, (phandle)0);
if (root == (phandle)0)
prom_panic ("couldn't get device tree root\n");
/* Build header and make room for mem rsv map */
mem_start = _ALIGN(mem_start, 4);
hdr = make_room(&mem_start, &mem_end,
sizeof(struct boot_param_header), 4);
RELOC(dt_header_start) = (unsigned long)hdr;
rsvmap = make_room(&mem_start, &mem_end, sizeof(mem_reserve_map), 8);
/* Start of strings */
mem_start = PAGE_ALIGN(mem_start);
RELOC(dt_string_start) = mem_start;
mem_start += 4; /* hole */
/* Add "linux,phandle" in there, we'll need it */
namep = make_room(&mem_start, &mem_end, 16, 1);
strcpy(namep, RELOC("linux,phandle"));
mem_start = (unsigned long)namep + strlen(namep) + 1;
/* Build string array */
prom_printf("Building dt strings...\n");
scan_dt_build_strings(root, &mem_start, &mem_end);
RELOC(dt_string_end) = mem_start;
/* Build structure */
mem_start = PAGE_ALIGN(mem_start);
RELOC(dt_struct_start) = mem_start;
prom_printf("Building dt structure...\n");
scan_dt_build_struct(root, &mem_start, &mem_end);
dt_push_token(OF_DT_END, &mem_start, &mem_end);
RELOC(dt_struct_end) = PAGE_ALIGN(mem_start);
/* Finish header */
hdr->boot_cpuid_phys = _prom->cpu;
hdr->magic = OF_DT_HEADER;
hdr->totalsize = RELOC(dt_struct_end) - RELOC(dt_header_start);
hdr->off_dt_struct = RELOC(dt_struct_start) - RELOC(dt_header_start);
hdr->off_dt_strings = RELOC(dt_string_start) - RELOC(dt_header_start);
hdr->dt_strings_size = RELOC(dt_string_end) - RELOC(dt_string_start);
hdr->off_mem_rsvmap = ((unsigned long)rsvmap) - RELOC(dt_header_start);
hdr->version = OF_DT_VERSION;
/* Version 16 is not backward compatible */
hdr->last_comp_version = 0x10;
/* Copy the reserve map in */
memcpy(rsvmap, RELOC(mem_reserve_map), sizeof(mem_reserve_map));
#ifdef DEBUG_PROM
{
int i;
prom_printf("reserved memory map:\n");
for (i = 0; i < RELOC(mem_reserve_cnt); i++)
prom_printf(" %x - %x\n",
RELOC(mem_reserve_map)[i].base,
RELOC(mem_reserve_map)[i].size);
}
#endif
/* Bump mem_reserve_cnt to cause further reservations to fail
* since it's too late.
*/
RELOC(mem_reserve_cnt) = MEM_RESERVE_MAP_SIZE;
prom_printf("Device tree strings 0x%x -> 0x%x\n",
RELOC(dt_string_start), RELOC(dt_string_end));
prom_printf("Device tree struct 0x%x -> 0x%x\n",
RELOC(dt_struct_start), RELOC(dt_struct_end));
}
#ifdef CONFIG_PPC_MAPLE
/* PIBS Version 1.05.0000 04/26/2005 has an incorrect /ht/isa/ranges property.
* The values are bad, and it doesn't even have the right number of cells. */
static void __init fixup_device_tree_maple(void)
{
phandle isa;
u32 rloc = 0x01002000; /* IO space; PCI device = 4 */
u32 isa_ranges[6];
char *name;
name = "/ht@0/isa@4";
isa = call_prom("finddevice", 1, 1, ADDR(name));
if (!PHANDLE_VALID(isa)) {
name = "/ht@0/isa@6";
isa = call_prom("finddevice", 1, 1, ADDR(name));
rloc = 0x01003000; /* IO space; PCI device = 6 */
}
if (!PHANDLE_VALID(isa))
return;
if (prom_getproplen(isa, "ranges") != 12)
return;
if (prom_getprop(isa, "ranges", isa_ranges, sizeof(isa_ranges))
== PROM_ERROR)
return;
if (isa_ranges[0] != 0x1 ||
isa_ranges[1] != 0xf4000000 ||
isa_ranges[2] != 0x00010000)
return;
prom_printf("Fixing up bogus ISA range on Maple/Apache...\n");
isa_ranges[0] = 0x1;
isa_ranges[1] = 0x0;
isa_ranges[2] = rloc;
isa_ranges[3] = 0x0;
isa_ranges[4] = 0x0;
isa_ranges[5] = 0x00010000;
prom_setprop(isa, name, "ranges",
isa_ranges, sizeof(isa_ranges));
}
#define CPC925_MC_START 0xf8000000
#define CPC925_MC_LENGTH 0x1000000
/* The values for memory-controller don't have right number of cells */
static void __init fixup_device_tree_maple_memory_controller(void)
{
phandle mc;
u32 mc_reg[4];
char *name = "/hostbridge@f8000000";
struct prom_t *_prom = &RELOC(prom);
u32 ac, sc;
mc = call_prom("finddevice", 1, 1, ADDR(name));
if (!PHANDLE_VALID(mc))
return;
if (prom_getproplen(mc, "reg") != 8)
return;
prom_getprop(_prom->root, "#address-cells", &ac, sizeof(ac));
prom_getprop(_prom->root, "#size-cells", &sc, sizeof(sc));
if ((ac != 2) || (sc != 2))
return;
if (prom_getprop(mc, "reg", mc_reg, sizeof(mc_reg)) == PROM_ERROR)
return;
if (mc_reg[0] != CPC925_MC_START || mc_reg[1] != CPC925_MC_LENGTH)
return;
prom_printf("Fixing up bogus hostbridge on Maple...\n");
mc_reg[0] = 0x0;
mc_reg[1] = CPC925_MC_START;
mc_reg[2] = 0x0;
mc_reg[3] = CPC925_MC_LENGTH;
prom_setprop(mc, name, "reg", mc_reg, sizeof(mc_reg));
}
#else
#define fixup_device_tree_maple()
#define fixup_device_tree_maple_memory_controller()
#endif
#ifdef CONFIG_PPC_CHRP
/*
* Pegasos and BriQ lacks the "ranges" property in the isa node
* Pegasos needs decimal IRQ 14/15, not hexadecimal
* Pegasos has the IDE configured in legacy mode, but advertised as native
*/
static void __init fixup_device_tree_chrp(void)
{
phandle ph;
u32 prop[6];
u32 rloc = 0x01006000; /* IO space; PCI device = 12 */
char *name;
int rc;
name = "/pci@80000000/isa@c";
ph = call_prom("finddevice", 1, 1, ADDR(name));
if (!PHANDLE_VALID(ph)) {
name = "/pci@ff500000/isa@6";
ph = call_prom("finddevice", 1, 1, ADDR(name));
rloc = 0x01003000; /* IO space; PCI device = 6 */
}
if (PHANDLE_VALID(ph)) {
rc = prom_getproplen(ph, "ranges");
if (rc == 0 || rc == PROM_ERROR) {
prom_printf("Fixing up missing ISA range on Pegasos...\n");
prop[0] = 0x1;
prop[1] = 0x0;
prop[2] = rloc;
prop[3] = 0x0;
prop[4] = 0x0;
prop[5] = 0x00010000;
prom_setprop(ph, name, "ranges", prop, sizeof(prop));
}
}
name = "/pci@80000000/ide@C,1";
ph = call_prom("finddevice", 1, 1, ADDR(name));
if (PHANDLE_VALID(ph)) {
prom_printf("Fixing up IDE interrupt on Pegasos...\n");
prop[0] = 14;
prop[1] = 0x0;
prom_setprop(ph, name, "interrupts", prop, 2*sizeof(u32));
prom_printf("Fixing up IDE class-code on Pegasos...\n");
rc = prom_getprop(ph, "class-code", prop, sizeof(u32));
if (rc == sizeof(u32)) {
prop[0] &= ~0x5;
prom_setprop(ph, name, "class-code", prop, sizeof(u32));
}
}
}
#else
#define fixup_device_tree_chrp()
#endif
#if defined(CONFIG_PPC64) && defined(CONFIG_PPC_PMAC)
static void __init fixup_device_tree_pmac(void)
{
phandle u3, i2c, mpic;
u32 u3_rev;
u32 interrupts[2];
u32 parent;
/* Some G5s have a missing interrupt definition, fix it up here */
u3 = call_prom("finddevice", 1, 1, ADDR("/u3@0,f8000000"));
if (!PHANDLE_VALID(u3))
return;
i2c = call_prom("finddevice", 1, 1, ADDR("/u3@0,f8000000/i2c@f8001000"));
if (!PHANDLE_VALID(i2c))
return;
mpic = call_prom("finddevice", 1, 1, ADDR("/u3@0,f8000000/mpic@f8040000"));
if (!PHANDLE_VALID(mpic))
return;
/* check if proper rev of u3 */
if (prom_getprop(u3, "device-rev", &u3_rev, sizeof(u3_rev))
== PROM_ERROR)
return;
if (u3_rev < 0x35 || u3_rev > 0x39)
return;
/* does it need fixup ? */
if (prom_getproplen(i2c, "interrupts") > 0)
return;
prom_printf("fixing up bogus interrupts for u3 i2c...\n");
/* interrupt on this revision of u3 is number 0 and level */
interrupts[0] = 0;
interrupts[1] = 1;
prom_setprop(i2c, "/u3@0,f8000000/i2c@f8001000", "interrupts",
&interrupts, sizeof(interrupts));
parent = (u32)mpic;
prom_setprop(i2c, "/u3@0,f8000000/i2c@f8001000", "interrupt-parent",
&parent, sizeof(parent));
}
#else
#define fixup_device_tree_pmac()
#endif
#ifdef CONFIG_PPC_EFIKA
/*
* The MPC5200 FEC driver requires an phy-handle property to tell it how
* to talk to the phy. If the phy-handle property is missing, then this
* function is called to add the appropriate nodes and link it to the
* ethernet node.
*/
static void __init fixup_device_tree_efika_add_phy(void)
{
u32 node;
char prop[64];
int rv;
/* Check if /builtin/ethernet exists - bail if it doesn't */
node = call_prom("finddevice", 1, 1, ADDR("/builtin/ethernet"));
if (!PHANDLE_VALID(node))
return;
/* Check if the phy-handle property exists - bail if it does */
rv = prom_getprop(node, "phy-handle", prop, sizeof(prop));
if (!rv)
return;
/*
* At this point the ethernet device doesn't have a phy described.
* Now we need to add the missing phy node and linkage
*/
/* Check for an MDIO bus node - if missing then create one */
node = call_prom("finddevice", 1, 1, ADDR("/builtin/mdio"));
if (!PHANDLE_VALID(node)) {
prom_printf("Adding Ethernet MDIO node\n");
call_prom("interpret", 1, 1,
" s\" /builtin\" find-device"
" new-device"
" 1 encode-int s\" #address-cells\" property"
" 0 encode-int s\" #size-cells\" property"
" s\" mdio\" device-name"
" s\" fsl,mpc5200b-mdio\" encode-string"
" s\" compatible\" property"
" 0xf0003000 0x400 reg"
" 0x2 encode-int"
" 0x5 encode-int encode+"
" 0x3 encode-int encode+"
" s\" interrupts\" property"
" finish-device");
};
/* Check for a PHY device node - if missing then create one and
* give it's phandle to the ethernet node */
node = call_prom("finddevice", 1, 1,
ADDR("/builtin/mdio/ethernet-phy"));
if (!PHANDLE_VALID(node)) {
prom_printf("Adding Ethernet PHY node\n");
call_prom("interpret", 1, 1,
" s\" /builtin/mdio\" find-device"
" new-device"
" s\" ethernet-phy\" device-name"
" 0x10 encode-int s\" reg\" property"
" my-self"
" ihandle>phandle"
" finish-device"
" s\" /builtin/ethernet\" find-device"
" encode-int"
" s\" phy-handle\" property"
" device-end");
}
}
static void __init fixup_device_tree_efika(void)
{
int sound_irq[3] = { 2, 2, 0 };
int bcomm_irq[3*16] = { 3,0,0, 3,1,0, 3,2,0, 3,3,0,
3,4,0, 3,5,0, 3,6,0, 3,7,0,
3,8,0, 3,9,0, 3,10,0, 3,11,0,
3,12,0, 3,13,0, 3,14,0, 3,15,0 };
u32 node;
char prop[64];
int rv, len;
/* Check if we're really running on a EFIKA */
node = call_prom("finddevice", 1, 1, ADDR("/"));
if (!PHANDLE_VALID(node))
return;
rv = prom_getprop(node, "model", prop, sizeof(prop));
if (rv == PROM_ERROR)
return;
if (strcmp(prop, "EFIKA5K2"))
return;
prom_printf("Applying EFIKA device tree fixups\n");
/* Claiming to be 'chrp' is death */
node = call_prom("finddevice", 1, 1, ADDR("/"));
rv = prom_getprop(node, "device_type", prop, sizeof(prop));
if (rv != PROM_ERROR && (strcmp(prop, "chrp") == 0))
prom_setprop(node, "/", "device_type", "efika", sizeof("efika"));
/* CODEGEN,description is exposed in /proc/cpuinfo so
fix that too */
rv = prom_getprop(node, "CODEGEN,description", prop, sizeof(prop));
if (rv != PROM_ERROR && (strstr(prop, "CHRP")))
prom_setprop(node, "/", "CODEGEN,description",
"Efika 5200B PowerPC System",
sizeof("Efika 5200B PowerPC System"));
/* Fixup bestcomm interrupts property */
node = call_prom("finddevice", 1, 1, ADDR("/builtin/bestcomm"));
if (PHANDLE_VALID(node)) {
len = prom_getproplen(node, "interrupts");
if (len == 12) {
prom_printf("Fixing bestcomm interrupts property\n");
prom_setprop(node, "/builtin/bestcom", "interrupts",
bcomm_irq, sizeof(bcomm_irq));
}
}
/* Fixup sound interrupts property */
node = call_prom("finddevice", 1, 1, ADDR("/builtin/sound"));
if (PHANDLE_VALID(node)) {
rv = prom_getprop(node, "interrupts", prop, sizeof(prop));
if (rv == PROM_ERROR) {
prom_printf("Adding sound interrupts property\n");
prom_setprop(node, "/builtin/sound", "interrupts",
sound_irq, sizeof(sound_irq));
}
}
/* Make sure ethernet phy-handle property exists */
fixup_device_tree_efika_add_phy();
}
#else
#define fixup_device_tree_efika()
#endif
static void __init fixup_device_tree(void)
{
fixup_device_tree_maple();
fixup_device_tree_maple_memory_controller();
fixup_device_tree_chrp();
fixup_device_tree_pmac();
fixup_device_tree_efika();
}
static void __init prom_find_boot_cpu(void)
{
struct prom_t *_prom = &RELOC(prom);
u32 getprop_rval;
ihandle prom_cpu;
phandle cpu_pkg;
_prom->cpu = 0;
if (prom_getprop(_prom->chosen, "cpu", &prom_cpu, sizeof(prom_cpu)) <= 0)
return;
cpu_pkg = call_prom("instance-to-package", 1, 1, prom_cpu);
prom_getprop(cpu_pkg, "reg", &getprop_rval, sizeof(getprop_rval));
_prom->cpu = getprop_rval;
prom_debug("Booting CPU hw index = 0x%x\n", _prom->cpu);
}
static void __init prom_check_initrd(unsigned long r3, unsigned long r4)
{
#ifdef CONFIG_BLK_DEV_INITRD
struct prom_t *_prom = &RELOC(prom);
if (r3 && r4 && r4 != 0xdeadbeef) {
unsigned long val;
RELOC(prom_initrd_start) = is_kernel_addr(r3) ? __pa(r3) : r3;
RELOC(prom_initrd_end) = RELOC(prom_initrd_start) + r4;
val = RELOC(prom_initrd_start);
prom_setprop(_prom->chosen, "/chosen", "linux,initrd-start",
&val, sizeof(val));
val = RELOC(prom_initrd_end);
prom_setprop(_prom->chosen, "/chosen", "linux,initrd-end",
&val, sizeof(val));
reserve_mem(RELOC(prom_initrd_start),
RELOC(prom_initrd_end) - RELOC(prom_initrd_start));
prom_debug("initrd_start=0x%x\n", RELOC(prom_initrd_start));
prom_debug("initrd_end=0x%x\n", RELOC(prom_initrd_end));
}
#endif /* CONFIG_BLK_DEV_INITRD */
}
/*
* We enter here early on, when the Open Firmware prom is still
* handling exceptions and the MMU hash table for us.
*/
unsigned long __init prom_init(unsigned long r3, unsigned long r4,
unsigned long pp,
unsigned long r6, unsigned long r7,
unsigned long kbase)
{
struct prom_t *_prom;
unsigned long hdr;
#ifdef CONFIG_PPC32
unsigned long offset = reloc_offset();
reloc_got2(offset);
#endif
_prom = &RELOC(prom);
/*
* First zero the BSS
*/
memset(&RELOC(__bss_start), 0, __bss_stop - __bss_start);
/*
* Init interface to Open Firmware, get some node references,
* like /chosen
*/
prom_init_client_services(pp);
/*
* See if this OF is old enough that we need to do explicit maps
* and other workarounds
*/
prom_find_mmu();
/*
* Init prom stdout device
*/
prom_init_stdout();
prom_printf("Preparing to boot %s", RELOC(linux_banner));
/*
* Get default machine type. At this point, we do not differentiate
* between pSeries SMP and pSeries LPAR
*/
RELOC(of_platform) = prom_find_machine_type();
#ifndef CONFIG_RELOCATABLE
/* Bail if this is a kdump kernel. */
if (PHYSICAL_START > 0)
prom_panic("Error: You can't boot a kdump kernel from OF!\n");
#endif
/*
* Check for an initrd
*/
prom_check_initrd(r3, r4);
#ifdef CONFIG_PPC_PSERIES
/*
* On pSeries, inform the firmware about our capabilities
*/
if (RELOC(of_platform) == PLATFORM_PSERIES ||
RELOC(of_platform) == PLATFORM_PSERIES_LPAR)
prom_send_capabilities();
#endif
/*
* Copy the CPU hold code
*/
if (RELOC(of_platform) != PLATFORM_POWERMAC)
copy_and_flush(0, kbase, 0x100, 0);
/*
* Do early parsing of command line
*/
early_cmdline_parse();
/*
* Initialize memory management within prom_init
*/
prom_init_mem();
/*
* Determine which cpu is actually running right _now_
*/
prom_find_boot_cpu();
/*
* Initialize display devices
*/
prom_check_displays();
#ifdef CONFIG_PPC64
/*
* Initialize IOMMU (TCE tables) on pSeries. Do that before anything else
* that uses the allocator, we need to make sure we get the top of memory
* available for us here...
*/
if (RELOC(of_platform) == PLATFORM_PSERIES)
prom_initialize_tce_table();
#endif
/*
* On non-powermacs, try to instantiate RTAS and puts all CPUs
* in spin-loops. PowerMacs don't have a working RTAS and use
* a different way to spin CPUs
*/
if (RELOC(of_platform) != PLATFORM_POWERMAC) {
prom_instantiate_rtas();
prom_hold_cpus();
}
/*
* Fill in some infos for use by the kernel later on
*/
if (RELOC(prom_memory_limit))
prom_setprop(_prom->chosen, "/chosen", "linux,memory-limit",
&RELOC(prom_memory_limit),
sizeof(prom_memory_limit));
#ifdef CONFIG_PPC64
if (RELOC(prom_iommu_off))
prom_setprop(_prom->chosen, "/chosen", "linux,iommu-off",
NULL, 0);
if (RELOC(prom_iommu_force_on))
prom_setprop(_prom->chosen, "/chosen", "linux,iommu-force-on",
NULL, 0);
if (RELOC(prom_tce_alloc_start)) {
prom_setprop(_prom->chosen, "/chosen", "linux,tce-alloc-start",
&RELOC(prom_tce_alloc_start),
sizeof(prom_tce_alloc_start));
prom_setprop(_prom->chosen, "/chosen", "linux,tce-alloc-end",
&RELOC(prom_tce_alloc_end),
sizeof(prom_tce_alloc_end));
}
#endif
/*
* Fixup any known bugs in the device-tree
*/
fixup_device_tree();
/*
* Now finally create the flattened device-tree
*/
prom_printf("copying OF device tree...\n");
flatten_device_tree();
/*
* in case stdin is USB and still active on IBM machines...
* Unfortunately quiesce crashes on some powermacs if we have
* closed stdin already (in particular the powerbook 101).
*/
if (RELOC(of_platform) != PLATFORM_POWERMAC)
prom_close_stdin();
/*
* Call OF "quiesce" method to shut down pending DMA's from
* devices etc...
*/
prom_printf("Calling quiesce...\n");
call_prom("quiesce", 0, 0);
/*
* And finally, call the kernel passing it the flattened device
* tree and NULL as r5, thus triggering the new entry point which
* is common to us and kexec
*/
hdr = RELOC(dt_header_start);
prom_printf("returning from prom_init\n");
prom_debug("->dt_header_start=0x%x\n", hdr);
#ifdef CONFIG_PPC32
reloc_got2(-offset);
#endif
__start(hdr, kbase, 0);
return 0;
}
| gpl-2.0 |
Kenthliu/linux | drivers/hwtracing/stm/console.c | 598 | 2187 | /*
* Simple kernel console driver for STM devices
* Copyright (c) 2014, Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* STM console will send kernel messages over STM devices to a trace host.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/console.h>
#include <linux/slab.h>
#include <linux/stm.h>
static int stm_console_link(struct stm_source_data *data);
static void stm_console_unlink(struct stm_source_data *data);
static struct stm_console {
struct stm_source_data data;
struct console console;
} stm_console = {
.data = {
.name = "console",
.nr_chans = 1,
.link = stm_console_link,
.unlink = stm_console_unlink,
},
};
static void
stm_console_write(struct console *con, const char *buf, unsigned len)
{
struct stm_console *sc = container_of(con, struct stm_console, console);
stm_source_write(&sc->data, 0, buf, len);
}
static int stm_console_link(struct stm_source_data *data)
{
struct stm_console *sc = container_of(data, struct stm_console, data);
strcpy(sc->console.name, "stm_console");
sc->console.write = stm_console_write;
sc->console.flags = CON_ENABLED | CON_PRINTBUFFER;
register_console(&sc->console);
return 0;
}
static void stm_console_unlink(struct stm_source_data *data)
{
struct stm_console *sc = container_of(data, struct stm_console, data);
unregister_console(&sc->console);
}
static int stm_console_init(void)
{
return stm_source_register_device(NULL, &stm_console.data);
}
static void stm_console_exit(void)
{
stm_source_unregister_device(&stm_console.data);
}
module_init(stm_console_init);
module_exit(stm_console_exit);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("stm_console driver");
MODULE_AUTHOR("Alexander Shishkin <alexander.shishkin@linux.intel.com>");
| gpl-2.0 |
Shimejing/jz2440 | arch/x86/platform/intel-mid/device_libs/platform_msic_thermal.c | 1878 | 1050 | /*
* platform_msic_thermal.c: msic_thermal platform data initilization file
*
* (C) Copyright 2013 Intel Corporation
* Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; version 2
* of the License.
*/
#include <linux/input.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/mfd/intel_msic.h>
#include <asm/intel-mid.h>
#include "platform_msic.h"
#include "platform_ipc.h"
static void __init *msic_thermal_platform_data(void *info)
{
return msic_generic_platform_data(info, INTEL_MSIC_BLOCK_THERMAL);
}
static const struct devs_id msic_thermal_dev_id __initconst = {
.name = "msic_thermal",
.type = SFI_DEV_TYPE_IPC,
.delay = 1,
.get_platform_data = &msic_thermal_platform_data,
.device_handler = &ipc_device_handler,
};
sfi_device(msic_thermal_dev_id);
| gpl-2.0 |
dkthompson/MSM-8x60-ICS | drivers/scsi/bfa/bfa_ioc_ct.c | 2390 | 15402 | /*
* Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
* All rights reserved
* www.brocade.com
*
* Linux driver for Brocade Fibre Channel Host Bus Adapter.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License (GPL) Version 2 as
* published by the Free Software Foundation
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*/
#include "bfad_drv.h"
#include "bfa_ioc.h"
#include "bfi_ctreg.h"
#include "bfa_defs.h"
BFA_TRC_FILE(CNA, IOC_CT);
#define bfa_ioc_ct_sync_pos(__ioc) \
((uint32_t) (1 << bfa_ioc_pcifn(__ioc)))
#define BFA_IOC_SYNC_REQD_SH 16
#define bfa_ioc_ct_get_sync_ackd(__val) (__val & 0x0000ffff)
#define bfa_ioc_ct_clear_sync_ackd(__val) (__val & 0xffff0000)
#define bfa_ioc_ct_get_sync_reqd(__val) (__val >> BFA_IOC_SYNC_REQD_SH)
#define bfa_ioc_ct_sync_reqd_pos(__ioc) \
(bfa_ioc_ct_sync_pos(__ioc) << BFA_IOC_SYNC_REQD_SH)
/*
* forward declarations
*/
static bfa_boolean_t bfa_ioc_ct_firmware_lock(struct bfa_ioc_s *ioc);
static void bfa_ioc_ct_firmware_unlock(struct bfa_ioc_s *ioc);
static void bfa_ioc_ct_reg_init(struct bfa_ioc_s *ioc);
static void bfa_ioc_ct_map_port(struct bfa_ioc_s *ioc);
static void bfa_ioc_ct_isr_mode_set(struct bfa_ioc_s *ioc, bfa_boolean_t msix);
static void bfa_ioc_ct_notify_fail(struct bfa_ioc_s *ioc);
static void bfa_ioc_ct_ownership_reset(struct bfa_ioc_s *ioc);
static bfa_boolean_t bfa_ioc_ct_sync_start(struct bfa_ioc_s *ioc);
static void bfa_ioc_ct_sync_join(struct bfa_ioc_s *ioc);
static void bfa_ioc_ct_sync_leave(struct bfa_ioc_s *ioc);
static void bfa_ioc_ct_sync_ack(struct bfa_ioc_s *ioc);
static bfa_boolean_t bfa_ioc_ct_sync_complete(struct bfa_ioc_s *ioc);
static struct bfa_ioc_hwif_s hwif_ct;
/*
* Called from bfa_ioc_attach() to map asic specific calls.
*/
void
bfa_ioc_set_ct_hwif(struct bfa_ioc_s *ioc)
{
hwif_ct.ioc_pll_init = bfa_ioc_ct_pll_init;
hwif_ct.ioc_firmware_lock = bfa_ioc_ct_firmware_lock;
hwif_ct.ioc_firmware_unlock = bfa_ioc_ct_firmware_unlock;
hwif_ct.ioc_reg_init = bfa_ioc_ct_reg_init;
hwif_ct.ioc_map_port = bfa_ioc_ct_map_port;
hwif_ct.ioc_isr_mode_set = bfa_ioc_ct_isr_mode_set;
hwif_ct.ioc_notify_fail = bfa_ioc_ct_notify_fail;
hwif_ct.ioc_ownership_reset = bfa_ioc_ct_ownership_reset;
hwif_ct.ioc_sync_start = bfa_ioc_ct_sync_start;
hwif_ct.ioc_sync_join = bfa_ioc_ct_sync_join;
hwif_ct.ioc_sync_leave = bfa_ioc_ct_sync_leave;
hwif_ct.ioc_sync_ack = bfa_ioc_ct_sync_ack;
hwif_ct.ioc_sync_complete = bfa_ioc_ct_sync_complete;
ioc->ioc_hwif = &hwif_ct;
}
/*
* Return true if firmware of current driver matches the running firmware.
*/
static bfa_boolean_t
bfa_ioc_ct_firmware_lock(struct bfa_ioc_s *ioc)
{
enum bfi_ioc_state ioc_fwstate;
u32 usecnt;
struct bfi_ioc_image_hdr_s fwhdr;
/*
* Firmware match check is relevant only for CNA.
*/
if (!ioc->cna)
return BFA_TRUE;
/*
* If bios boot (flash based) -- do not increment usage count
*/
if (bfa_cb_image_get_size(BFA_IOC_FWIMG_TYPE(ioc)) <
BFA_IOC_FWIMG_MINSZ)
return BFA_TRUE;
bfa_ioc_sem_get(ioc->ioc_regs.ioc_usage_sem_reg);
usecnt = readl(ioc->ioc_regs.ioc_usage_reg);
/*
* If usage count is 0, always return TRUE.
*/
if (usecnt == 0) {
writel(1, ioc->ioc_regs.ioc_usage_reg);
writel(1, ioc->ioc_regs.ioc_usage_sem_reg);
writel(0, ioc->ioc_regs.ioc_fail_sync);
bfa_trc(ioc, usecnt);
return BFA_TRUE;
}
ioc_fwstate = readl(ioc->ioc_regs.ioc_fwstate);
bfa_trc(ioc, ioc_fwstate);
/*
* Use count cannot be non-zero and chip in uninitialized state.
*/
WARN_ON(ioc_fwstate == BFI_IOC_UNINIT);
/*
* Check if another driver with a different firmware is active
*/
bfa_ioc_fwver_get(ioc, &fwhdr);
if (!bfa_ioc_fwver_cmp(ioc, &fwhdr)) {
writel(1, ioc->ioc_regs.ioc_usage_sem_reg);
bfa_trc(ioc, usecnt);
return BFA_FALSE;
}
/*
* Same firmware version. Increment the reference count.
*/
usecnt++;
writel(usecnt, ioc->ioc_regs.ioc_usage_reg);
writel(1, ioc->ioc_regs.ioc_usage_sem_reg);
bfa_trc(ioc, usecnt);
return BFA_TRUE;
}
static void
bfa_ioc_ct_firmware_unlock(struct bfa_ioc_s *ioc)
{
u32 usecnt;
/*
* Firmware lock is relevant only for CNA.
*/
if (!ioc->cna)
return;
/*
* If bios boot (flash based) -- do not decrement usage count
*/
if (bfa_cb_image_get_size(BFA_IOC_FWIMG_TYPE(ioc)) <
BFA_IOC_FWIMG_MINSZ)
return;
/*
* decrement usage count
*/
bfa_ioc_sem_get(ioc->ioc_regs.ioc_usage_sem_reg);
usecnt = readl(ioc->ioc_regs.ioc_usage_reg);
WARN_ON(usecnt <= 0);
usecnt--;
writel(usecnt, ioc->ioc_regs.ioc_usage_reg);
bfa_trc(ioc, usecnt);
writel(1, ioc->ioc_regs.ioc_usage_sem_reg);
}
/*
* Notify other functions on HB failure.
*/
static void
bfa_ioc_ct_notify_fail(struct bfa_ioc_s *ioc)
{
if (ioc->cna) {
writel(__FW_INIT_HALT_P, ioc->ioc_regs.ll_halt);
writel(__FW_INIT_HALT_P, ioc->ioc_regs.alt_ll_halt);
/* Wait for halt to take effect */
readl(ioc->ioc_regs.ll_halt);
readl(ioc->ioc_regs.alt_ll_halt);
} else {
writel(__PSS_ERR_STATUS_SET, ioc->ioc_regs.err_set);
readl(ioc->ioc_regs.err_set);
}
}
/*
* Host to LPU mailbox message addresses
*/
static struct { u32 hfn_mbox, lpu_mbox, hfn_pgn; } iocreg_fnreg[] = {
{ HOSTFN0_LPU_MBOX0_0, LPU_HOSTFN0_MBOX0_0, HOST_PAGE_NUM_FN0 },
{ HOSTFN1_LPU_MBOX0_8, LPU_HOSTFN1_MBOX0_8, HOST_PAGE_NUM_FN1 },
{ HOSTFN2_LPU_MBOX0_0, LPU_HOSTFN2_MBOX0_0, HOST_PAGE_NUM_FN2 },
{ HOSTFN3_LPU_MBOX0_8, LPU_HOSTFN3_MBOX0_8, HOST_PAGE_NUM_FN3 }
};
/*
* Host <-> LPU mailbox command/status registers - port 0
*/
static struct { u32 hfn, lpu; } iocreg_mbcmd_p0[] = {
{ HOSTFN0_LPU0_MBOX0_CMD_STAT, LPU0_HOSTFN0_MBOX0_CMD_STAT },
{ HOSTFN1_LPU0_MBOX0_CMD_STAT, LPU0_HOSTFN1_MBOX0_CMD_STAT },
{ HOSTFN2_LPU0_MBOX0_CMD_STAT, LPU0_HOSTFN2_MBOX0_CMD_STAT },
{ HOSTFN3_LPU0_MBOX0_CMD_STAT, LPU0_HOSTFN3_MBOX0_CMD_STAT }
};
/*
* Host <-> LPU mailbox command/status registers - port 1
*/
static struct { u32 hfn, lpu; } iocreg_mbcmd_p1[] = {
{ HOSTFN0_LPU1_MBOX0_CMD_STAT, LPU1_HOSTFN0_MBOX0_CMD_STAT },
{ HOSTFN1_LPU1_MBOX0_CMD_STAT, LPU1_HOSTFN1_MBOX0_CMD_STAT },
{ HOSTFN2_LPU1_MBOX0_CMD_STAT, LPU1_HOSTFN2_MBOX0_CMD_STAT },
{ HOSTFN3_LPU1_MBOX0_CMD_STAT, LPU1_HOSTFN3_MBOX0_CMD_STAT }
};
static void
bfa_ioc_ct_reg_init(struct bfa_ioc_s *ioc)
{
void __iomem *rb;
int pcifn = bfa_ioc_pcifn(ioc);
rb = bfa_ioc_bar0(ioc);
ioc->ioc_regs.hfn_mbox = rb + iocreg_fnreg[pcifn].hfn_mbox;
ioc->ioc_regs.lpu_mbox = rb + iocreg_fnreg[pcifn].lpu_mbox;
ioc->ioc_regs.host_page_num_fn = rb + iocreg_fnreg[pcifn].hfn_pgn;
if (ioc->port_id == 0) {
ioc->ioc_regs.heartbeat = rb + BFA_IOC0_HBEAT_REG;
ioc->ioc_regs.ioc_fwstate = rb + BFA_IOC0_STATE_REG;
ioc->ioc_regs.alt_ioc_fwstate = rb + BFA_IOC1_STATE_REG;
ioc->ioc_regs.hfn_mbox_cmd = rb + iocreg_mbcmd_p0[pcifn].hfn;
ioc->ioc_regs.lpu_mbox_cmd = rb + iocreg_mbcmd_p0[pcifn].lpu;
ioc->ioc_regs.ll_halt = rb + FW_INIT_HALT_P0;
ioc->ioc_regs.alt_ll_halt = rb + FW_INIT_HALT_P1;
} else {
ioc->ioc_regs.heartbeat = (rb + BFA_IOC1_HBEAT_REG);
ioc->ioc_regs.ioc_fwstate = (rb + BFA_IOC1_STATE_REG);
ioc->ioc_regs.alt_ioc_fwstate = rb + BFA_IOC0_STATE_REG;
ioc->ioc_regs.hfn_mbox_cmd = rb + iocreg_mbcmd_p1[pcifn].hfn;
ioc->ioc_regs.lpu_mbox_cmd = rb + iocreg_mbcmd_p1[pcifn].lpu;
ioc->ioc_regs.ll_halt = rb + FW_INIT_HALT_P1;
ioc->ioc_regs.alt_ll_halt = rb + FW_INIT_HALT_P0;
}
/*
* PSS control registers
*/
ioc->ioc_regs.pss_ctl_reg = (rb + PSS_CTL_REG);
ioc->ioc_regs.pss_err_status_reg = (rb + PSS_ERR_STATUS_REG);
ioc->ioc_regs.app_pll_fast_ctl_reg = (rb + APP_PLL_425_CTL_REG);
ioc->ioc_regs.app_pll_slow_ctl_reg = (rb + APP_PLL_312_CTL_REG);
/*
* IOC semaphore registers and serialization
*/
ioc->ioc_regs.ioc_sem_reg = (rb + HOST_SEM0_REG);
ioc->ioc_regs.ioc_usage_sem_reg = (rb + HOST_SEM1_REG);
ioc->ioc_regs.ioc_init_sem_reg = (rb + HOST_SEM2_REG);
ioc->ioc_regs.ioc_usage_reg = (rb + BFA_FW_USE_COUNT);
ioc->ioc_regs.ioc_fail_sync = (rb + BFA_IOC_FAIL_SYNC);
/*
* sram memory access
*/
ioc->ioc_regs.smem_page_start = (rb + PSS_SMEM_PAGE_START);
ioc->ioc_regs.smem_pg0 = BFI_IOC_SMEM_PG0_CT;
/*
* err set reg : for notification of hb failure in fcmode
*/
ioc->ioc_regs.err_set = (rb + ERR_SET_REG);
}
/*
* Initialize IOC to port mapping.
*/
#define FNC_PERS_FN_SHIFT(__fn) ((__fn) * 8)
static void
bfa_ioc_ct_map_port(struct bfa_ioc_s *ioc)
{
void __iomem *rb = ioc->pcidev.pci_bar_kva;
u32 r32;
/*
* For catapult, base port id on personality register and IOC type
*/
r32 = readl(rb + FNC_PERS_REG);
r32 >>= FNC_PERS_FN_SHIFT(bfa_ioc_pcifn(ioc));
ioc->port_id = (r32 & __F0_PORT_MAP_MK) >> __F0_PORT_MAP_SH;
bfa_trc(ioc, bfa_ioc_pcifn(ioc));
bfa_trc(ioc, ioc->port_id);
}
/*
* Set interrupt mode for a function: INTX or MSIX
*/
static void
bfa_ioc_ct_isr_mode_set(struct bfa_ioc_s *ioc, bfa_boolean_t msix)
{
void __iomem *rb = ioc->pcidev.pci_bar_kva;
u32 r32, mode;
r32 = readl(rb + FNC_PERS_REG);
bfa_trc(ioc, r32);
mode = (r32 >> FNC_PERS_FN_SHIFT(bfa_ioc_pcifn(ioc))) &
__F0_INTX_STATUS;
/*
* If already in desired mode, do not change anything
*/
if (!msix && mode)
return;
if (msix)
mode = __F0_INTX_STATUS_MSIX;
else
mode = __F0_INTX_STATUS_INTA;
r32 &= ~(__F0_INTX_STATUS << FNC_PERS_FN_SHIFT(bfa_ioc_pcifn(ioc)));
r32 |= (mode << FNC_PERS_FN_SHIFT(bfa_ioc_pcifn(ioc)));
bfa_trc(ioc, r32);
writel(r32, rb + FNC_PERS_REG);
}
/*
* Cleanup hw semaphore and usecnt registers
*/
static void
bfa_ioc_ct_ownership_reset(struct bfa_ioc_s *ioc)
{
if (ioc->cna) {
bfa_ioc_sem_get(ioc->ioc_regs.ioc_usage_sem_reg);
writel(0, ioc->ioc_regs.ioc_usage_reg);
writel(1, ioc->ioc_regs.ioc_usage_sem_reg);
}
/*
* Read the hw sem reg to make sure that it is locked
* before we clear it. If it is not locked, writing 1
* will lock it instead of clearing it.
*/
readl(ioc->ioc_regs.ioc_sem_reg);
writel(1, ioc->ioc_regs.ioc_sem_reg);
}
static bfa_boolean_t
bfa_ioc_ct_sync_start(struct bfa_ioc_s *ioc)
{
uint32_t r32 = readl(ioc->ioc_regs.ioc_fail_sync);
uint32_t sync_reqd = bfa_ioc_ct_get_sync_reqd(r32);
/*
* Driver load time. If the sync required bit for this PCI fn
* is set, it is due to an unclean exit by the driver for this
* PCI fn in the previous incarnation. Whoever comes here first
* should clean it up, no matter which PCI fn.
*/
if (sync_reqd & bfa_ioc_ct_sync_pos(ioc)) {
writel(0, ioc->ioc_regs.ioc_fail_sync);
writel(1, ioc->ioc_regs.ioc_usage_reg);
writel(BFI_IOC_UNINIT, ioc->ioc_regs.ioc_fwstate);
writel(BFI_IOC_UNINIT, ioc->ioc_regs.alt_ioc_fwstate);
return BFA_TRUE;
}
return bfa_ioc_ct_sync_complete(ioc);
}
/*
* Synchronized IOC failure processing routines
*/
static void
bfa_ioc_ct_sync_join(struct bfa_ioc_s *ioc)
{
uint32_t r32 = readl(ioc->ioc_regs.ioc_fail_sync);
uint32_t sync_pos = bfa_ioc_ct_sync_reqd_pos(ioc);
writel((r32 | sync_pos), ioc->ioc_regs.ioc_fail_sync);
}
static void
bfa_ioc_ct_sync_leave(struct bfa_ioc_s *ioc)
{
uint32_t r32 = readl(ioc->ioc_regs.ioc_fail_sync);
uint32_t sync_msk = bfa_ioc_ct_sync_reqd_pos(ioc) |
bfa_ioc_ct_sync_pos(ioc);
writel((r32 & ~sync_msk), ioc->ioc_regs.ioc_fail_sync);
}
static void
bfa_ioc_ct_sync_ack(struct bfa_ioc_s *ioc)
{
uint32_t r32 = readl(ioc->ioc_regs.ioc_fail_sync);
writel((r32 | bfa_ioc_ct_sync_pos(ioc)),
ioc->ioc_regs.ioc_fail_sync);
}
static bfa_boolean_t
bfa_ioc_ct_sync_complete(struct bfa_ioc_s *ioc)
{
uint32_t r32 = readl(ioc->ioc_regs.ioc_fail_sync);
uint32_t sync_reqd = bfa_ioc_ct_get_sync_reqd(r32);
uint32_t sync_ackd = bfa_ioc_ct_get_sync_ackd(r32);
uint32_t tmp_ackd;
if (sync_ackd == 0)
return BFA_TRUE;
/*
* The check below is to see whether any other PCI fn
* has reinitialized the ASIC (reset sync_ackd bits)
* and failed again while this IOC was waiting for hw
* semaphore (in bfa_iocpf_sm_semwait()).
*/
tmp_ackd = sync_ackd;
if ((sync_reqd & bfa_ioc_ct_sync_pos(ioc)) &&
!(sync_ackd & bfa_ioc_ct_sync_pos(ioc)))
sync_ackd |= bfa_ioc_ct_sync_pos(ioc);
if (sync_reqd == sync_ackd) {
writel(bfa_ioc_ct_clear_sync_ackd(r32),
ioc->ioc_regs.ioc_fail_sync);
writel(BFI_IOC_FAIL, ioc->ioc_regs.ioc_fwstate);
writel(BFI_IOC_FAIL, ioc->ioc_regs.alt_ioc_fwstate);
return BFA_TRUE;
}
/*
* If another PCI fn reinitialized and failed again while
* this IOC was waiting for hw sem, the sync_ackd bit for
* this IOC need to be set again to allow reinitialization.
*/
if (tmp_ackd != sync_ackd)
writel((r32 | sync_ackd), ioc->ioc_regs.ioc_fail_sync);
return BFA_FALSE;
}
/*
* Check the firmware state to know if pll_init has been completed already
*/
bfa_boolean_t
bfa_ioc_ct_pll_init_complete(void __iomem *rb)
{
if ((readl(rb + BFA_IOC0_STATE_REG) == BFI_IOC_OP) ||
(readl(rb + BFA_IOC1_STATE_REG) == BFI_IOC_OP))
return BFA_TRUE;
return BFA_FALSE;
}
bfa_status_t
bfa_ioc_ct_pll_init(void __iomem *rb, bfa_boolean_t fcmode)
{
u32 pll_sclk, pll_fclk, r32;
pll_sclk = __APP_PLL_312_LRESETN | __APP_PLL_312_ENARST |
__APP_PLL_312_RSEL200500 | __APP_PLL_312_P0_1(3U) |
__APP_PLL_312_JITLMT0_1(3U) |
__APP_PLL_312_CNTLMT0_1(1U);
pll_fclk = __APP_PLL_425_LRESETN | __APP_PLL_425_ENARST |
__APP_PLL_425_RSEL200500 | __APP_PLL_425_P0_1(3U) |
__APP_PLL_425_JITLMT0_1(3U) |
__APP_PLL_425_CNTLMT0_1(1U);
if (fcmode) {
writel(0, (rb + OP_MODE));
writel(__APP_EMS_CMLCKSEL | __APP_EMS_REFCKBUFEN2 |
__APP_EMS_CHANNEL_SEL, (rb + ETH_MAC_SER_REG));
} else {
writel(__GLOBAL_FCOE_MODE, (rb + OP_MODE));
writel(__APP_EMS_REFCKBUFEN1, (rb + ETH_MAC_SER_REG));
}
writel(BFI_IOC_UNINIT, (rb + BFA_IOC0_STATE_REG));
writel(BFI_IOC_UNINIT, (rb + BFA_IOC1_STATE_REG));
writel(0xffffffffU, (rb + HOSTFN0_INT_MSK));
writel(0xffffffffU, (rb + HOSTFN1_INT_MSK));
writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS));
writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS));
writel(0xffffffffU, (rb + HOSTFN0_INT_MSK));
writel(0xffffffffU, (rb + HOSTFN1_INT_MSK));
writel(pll_sclk | __APP_PLL_312_LOGIC_SOFT_RESET,
rb + APP_PLL_312_CTL_REG);
writel(pll_fclk | __APP_PLL_425_LOGIC_SOFT_RESET,
rb + APP_PLL_425_CTL_REG);
writel(pll_sclk | __APP_PLL_312_LOGIC_SOFT_RESET | __APP_PLL_312_ENABLE,
rb + APP_PLL_312_CTL_REG);
writel(pll_fclk | __APP_PLL_425_LOGIC_SOFT_RESET | __APP_PLL_425_ENABLE,
rb + APP_PLL_425_CTL_REG);
readl(rb + HOSTFN0_INT_MSK);
udelay(2000);
writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS));
writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS));
writel(pll_sclk | __APP_PLL_312_ENABLE, rb + APP_PLL_312_CTL_REG);
writel(pll_fclk | __APP_PLL_425_ENABLE, rb + APP_PLL_425_CTL_REG);
if (!fcmode) {
writel(__PMM_1T_RESET_P, (rb + PMM_1T_RESET_REG_P0));
writel(__PMM_1T_RESET_P, (rb + PMM_1T_RESET_REG_P1));
}
r32 = readl((rb + PSS_CTL_REG));
r32 &= ~__PSS_LMEM_RESET;
writel(r32, (rb + PSS_CTL_REG));
udelay(1000);
if (!fcmode) {
writel(0, (rb + PMM_1T_RESET_REG_P0));
writel(0, (rb + PMM_1T_RESET_REG_P1));
}
writel(__EDRAM_BISTR_START, (rb + MBIST_CTL_REG));
udelay(1000);
r32 = readl((rb + MBIST_STAT_REG));
writel(0, (rb + MBIST_CTL_REG));
return BFA_STATUS_OK;
}
| gpl-2.0 |
verygreen/green_kernel_omap | fs/nfs/getroot.c | 3158 | 6746 | /* getroot.c: get the root dentry for an NFS mount
*
* Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/time.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/string.h>
#include <linux/stat.h>
#include <linux/errno.h>
#include <linux/unistd.h>
#include <linux/sunrpc/clnt.h>
#include <linux/sunrpc/stats.h>
#include <linux/nfs_fs.h>
#include <linux/nfs_mount.h>
#include <linux/nfs4_mount.h>
#include <linux/lockd/bind.h>
#include <linux/seq_file.h>
#include <linux/mount.h>
#include <linux/nfs_idmap.h>
#include <linux/vfs.h>
#include <linux/namei.h>
#include <linux/security.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include "nfs4_fs.h"
#include "delegation.h"
#include "internal.h"
#define NFSDBG_FACILITY NFSDBG_CLIENT
/*
* Set the superblock root dentry.
* Note that this function frees the inode in case of error.
*/
static int nfs_superblock_set_dummy_root(struct super_block *sb, struct inode *inode)
{
/* The mntroot acts as the dummy root dentry for this superblock */
if (sb->s_root == NULL) {
sb->s_root = d_alloc_root(inode);
if (sb->s_root == NULL) {
iput(inode);
return -ENOMEM;
}
ihold(inode);
/*
* Ensure that this dentry is invisible to d_find_alias().
* Otherwise, it may be spliced into the tree by
* d_materialise_unique if a parent directory from the same
* filesystem gets mounted at a later time.
* This again causes shrink_dcache_for_umount_subtree() to
* Oops, since the test for IS_ROOT() will fail.
*/
spin_lock(&sb->s_root->d_inode->i_lock);
spin_lock(&sb->s_root->d_lock);
list_del_init(&sb->s_root->d_alias);
spin_unlock(&sb->s_root->d_lock);
spin_unlock(&sb->s_root->d_inode->i_lock);
}
return 0;
}
/*
* get an NFS2/NFS3 root dentry from the root filehandle
*/
struct dentry *nfs_get_root(struct super_block *sb, struct nfs_fh *mntfh,
const char *devname)
{
struct nfs_server *server = NFS_SB(sb);
struct nfs_fsinfo fsinfo;
struct dentry *ret;
struct inode *inode;
void *name = kstrdup(devname, GFP_KERNEL);
int error;
if (!name)
return ERR_PTR(-ENOMEM);
/* get the actual root for this mount */
fsinfo.fattr = nfs_alloc_fattr();
if (fsinfo.fattr == NULL) {
kfree(name);
return ERR_PTR(-ENOMEM);
}
error = server->nfs_client->rpc_ops->getroot(server, mntfh, &fsinfo);
if (error < 0) {
dprintk("nfs_get_root: getattr error = %d\n", -error);
ret = ERR_PTR(error);
goto out;
}
inode = nfs_fhget(sb, mntfh, fsinfo.fattr);
if (IS_ERR(inode)) {
dprintk("nfs_get_root: get root inode failed\n");
ret = ERR_CAST(inode);
goto out;
}
error = nfs_superblock_set_dummy_root(sb, inode);
if (error != 0) {
ret = ERR_PTR(error);
goto out;
}
/* root dentries normally start off anonymous and get spliced in later
* if the dentry tree reaches them; however if the dentry already
* exists, we'll pick it up at this point and use it as the root
*/
ret = d_obtain_alias(inode);
if (IS_ERR(ret)) {
dprintk("nfs_get_root: get root dentry failed\n");
goto out;
}
security_d_instantiate(ret, inode);
spin_lock(&ret->d_lock);
if (IS_ROOT(ret) && !(ret->d_flags & DCACHE_NFSFS_RENAMED)) {
ret->d_fsdata = name;
name = NULL;
}
spin_unlock(&ret->d_lock);
out:
if (name)
kfree(name);
nfs_free_fattr(fsinfo.fattr);
return ret;
}
#ifdef CONFIG_NFS_V4
int nfs4_get_rootfh(struct nfs_server *server, struct nfs_fh *mntfh)
{
struct nfs_fsinfo fsinfo;
int ret = -ENOMEM;
dprintk("--> nfs4_get_rootfh()\n");
fsinfo.fattr = nfs_alloc_fattr();
if (fsinfo.fattr == NULL)
goto out;
/* Start by getting the root filehandle from the server */
ret = server->nfs_client->rpc_ops->getroot(server, mntfh, &fsinfo);
if (ret < 0) {
dprintk("nfs4_get_rootfh: getroot error = %d\n", -ret);
goto out;
}
if (!(fsinfo.fattr->valid & NFS_ATTR_FATTR_TYPE)
|| !S_ISDIR(fsinfo.fattr->mode)) {
printk(KERN_ERR "nfs4_get_rootfh:"
" getroot encountered non-directory\n");
ret = -ENOTDIR;
goto out;
}
if (fsinfo.fattr->valid & NFS_ATTR_FATTR_V4_REFERRAL) {
printk(KERN_ERR "nfs4_get_rootfh:"
" getroot obtained referral\n");
ret = -EREMOTE;
goto out;
}
memcpy(&server->fsid, &fsinfo.fattr->fsid, sizeof(server->fsid));
out:
nfs_free_fattr(fsinfo.fattr);
dprintk("<-- nfs4_get_rootfh() = %d\n", ret);
return ret;
}
/*
* get an NFS4 root dentry from the root filehandle
*/
struct dentry *nfs4_get_root(struct super_block *sb, struct nfs_fh *mntfh,
const char *devname)
{
struct nfs_server *server = NFS_SB(sb);
struct nfs_fattr *fattr = NULL;
struct dentry *ret;
struct inode *inode;
void *name = kstrdup(devname, GFP_KERNEL);
int error;
dprintk("--> nfs4_get_root()\n");
if (!name)
return ERR_PTR(-ENOMEM);
/* get the info about the server and filesystem */
error = nfs4_server_capabilities(server, mntfh);
if (error < 0) {
dprintk("nfs_get_root: getcaps error = %d\n",
-error);
kfree(name);
return ERR_PTR(error);
}
fattr = nfs_alloc_fattr();
if (fattr == NULL) {
kfree(name);
return ERR_PTR(-ENOMEM);
}
/* get the actual root for this mount */
error = server->nfs_client->rpc_ops->getattr(server, mntfh, fattr);
if (error < 0) {
dprintk("nfs_get_root: getattr error = %d\n", -error);
ret = ERR_PTR(error);
goto out;
}
if (fattr->valid & NFS_ATTR_FATTR_FSID &&
!nfs_fsid_equal(&server->fsid, &fattr->fsid))
memcpy(&server->fsid, &fattr->fsid, sizeof(server->fsid));
inode = nfs_fhget(sb, mntfh, fattr);
if (IS_ERR(inode)) {
dprintk("nfs_get_root: get root inode failed\n");
ret = ERR_CAST(inode);
goto out;
}
error = nfs_superblock_set_dummy_root(sb, inode);
if (error != 0) {
ret = ERR_PTR(error);
goto out;
}
/* root dentries normally start off anonymous and get spliced in later
* if the dentry tree reaches them; however if the dentry already
* exists, we'll pick it up at this point and use it as the root
*/
ret = d_obtain_alias(inode);
if (IS_ERR(ret)) {
dprintk("nfs_get_root: get root dentry failed\n");
goto out;
}
security_d_instantiate(ret, inode);
spin_lock(&ret->d_lock);
if (IS_ROOT(ret) && !(ret->d_flags & DCACHE_NFSFS_RENAMED)) {
ret->d_fsdata = name;
name = NULL;
}
spin_unlock(&ret->d_lock);
out:
if (name)
kfree(name);
nfs_free_fattr(fattr);
dprintk("<-- nfs4_get_root()\n");
return ret;
}
#endif /* CONFIG_NFS_V4 */
| gpl-2.0 |
DirtyDevs/android_kernel_motorola_ghost | arch/x86/kernel/cpu/match.c | 4694 | 2495 | #include <asm/cpu_device_id.h>
#include <asm/processor.h>
#include <linux/cpu.h>
#include <linux/module.h>
#include <linux/slab.h>
/**
* x86_match_cpu - match current CPU again an array of x86_cpu_ids
* @match: Pointer to array of x86_cpu_ids. Last entry terminated with
* {}.
*
* Return the entry if the current CPU matches the entries in the
* passed x86_cpu_id match table. Otherwise NULL. The match table
* contains vendor (X86_VENDOR_*), family, model and feature bits or
* respective wildcard entries.
*
* A typical table entry would be to match a specific CPU
* { X86_VENDOR_INTEL, 6, 0x12 }
* or to match a specific CPU feature
* { X86_FEATURE_MATCH(X86_FEATURE_FOOBAR) }
*
* Fields can be wildcarded with %X86_VENDOR_ANY, %X86_FAMILY_ANY,
* %X86_MODEL_ANY, %X86_FEATURE_ANY or 0 (except for vendor)
*
* Arrays used to match for this should also be declared using
* MODULE_DEVICE_TABLE(x86_cpu, ...)
*
* This always matches against the boot cpu, assuming models and features are
* consistent over all CPUs.
*/
const struct x86_cpu_id *x86_match_cpu(const struct x86_cpu_id *match)
{
const struct x86_cpu_id *m;
struct cpuinfo_x86 *c = &boot_cpu_data;
for (m = match; m->vendor | m->family | m->model | m->feature; m++) {
if (m->vendor != X86_VENDOR_ANY && c->x86_vendor != m->vendor)
continue;
if (m->family != X86_FAMILY_ANY && c->x86 != m->family)
continue;
if (m->model != X86_MODEL_ANY && c->x86_model != m->model)
continue;
if (m->feature != X86_FEATURE_ANY && !cpu_has(c, m->feature))
continue;
return m;
}
return NULL;
}
EXPORT_SYMBOL(x86_match_cpu);
ssize_t arch_print_cpu_modalias(struct device *dev,
struct device_attribute *attr,
char *bufptr)
{
int size = PAGE_SIZE;
int i, n;
char *buf = bufptr;
n = snprintf(buf, size, "x86cpu:vendor:%04X:family:%04X:"
"model:%04X:feature:",
boot_cpu_data.x86_vendor,
boot_cpu_data.x86,
boot_cpu_data.x86_model);
size -= n;
buf += n;
size -= 1;
for (i = 0; i < NCAPINTS*32; i++) {
if (boot_cpu_has(i)) {
n = snprintf(buf, size, ",%04X", i);
if (n >= size) {
WARN(1, "x86 features overflow page\n");
break;
}
size -= n;
buf += n;
}
}
*buf++ = '\n';
return buf - bufptr;
}
int arch_cpu_uevent(struct device *dev, struct kobj_uevent_env *env)
{
char *buf = kzalloc(PAGE_SIZE, GFP_KERNEL);
if (buf) {
arch_print_cpu_modalias(NULL, NULL, buf);
add_uevent_var(env, "MODALIAS=%s", buf);
kfree(buf);
}
return 0;
}
| gpl-2.0 |
jmztaylor/android_kernel_htc_k2plccl | drivers/scsi/cxgbi/cxgb4i/cxgb4i.c | 4950 | 46049 | /*
* cxgb4i.c: Chelsio T4 iSCSI driver.
*
* Copyright (c) 2010 Chelsio Communications, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation.
*
* Written by: Karen Xie (kxie@chelsio.com)
* Rakesh Ranjan (rranjan@chelsio.com)
*/
#define pr_fmt(fmt) KBUILD_MODNAME ":%s: " fmt, __func__
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <scsi/scsi_host.h>
#include <net/tcp.h>
#include <net/dst.h>
#include <linux/netdevice.h>
#include "t4_msg.h"
#include "cxgb4.h"
#include "cxgb4_uld.h"
#include "t4fw_api.h"
#include "l2t.h"
#include "cxgb4i.h"
static unsigned int dbg_level;
#include "../libcxgbi.h"
#define DRV_MODULE_NAME "cxgb4i"
#define DRV_MODULE_DESC "Chelsio T4 iSCSI Driver"
#define DRV_MODULE_VERSION "0.9.1"
#define DRV_MODULE_RELDATE "Aug. 2010"
static char version[] =
DRV_MODULE_DESC " " DRV_MODULE_NAME
" v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
MODULE_AUTHOR("Chelsio Communications, Inc.");
MODULE_DESCRIPTION(DRV_MODULE_DESC);
MODULE_VERSION(DRV_MODULE_VERSION);
MODULE_LICENSE("GPL");
module_param(dbg_level, uint, 0644);
MODULE_PARM_DESC(dbg_level, "Debug flag (default=0)");
static int cxgb4i_rcv_win = 256 * 1024;
module_param(cxgb4i_rcv_win, int, 0644);
MODULE_PARM_DESC(cxgb4i_rcv_win, "TCP reveive window in bytes");
static int cxgb4i_snd_win = 128 * 1024;
module_param(cxgb4i_snd_win, int, 0644);
MODULE_PARM_DESC(cxgb4i_snd_win, "TCP send window in bytes");
static int cxgb4i_rx_credit_thres = 10 * 1024;
module_param(cxgb4i_rx_credit_thres, int, 0644);
MODULE_PARM_DESC(cxgb4i_rx_credit_thres,
"RX credits return threshold in bytes (default=10KB)");
static unsigned int cxgb4i_max_connect = (8 * 1024);
module_param(cxgb4i_max_connect, uint, 0644);
MODULE_PARM_DESC(cxgb4i_max_connect, "Maximum number of connections");
static unsigned short cxgb4i_sport_base = 20000;
module_param(cxgb4i_sport_base, ushort, 0644);
MODULE_PARM_DESC(cxgb4i_sport_base, "Starting port number (default 20000)");
typedef void (*cxgb4i_cplhandler_func)(struct cxgbi_device *, struct sk_buff *);
static void *t4_uld_add(const struct cxgb4_lld_info *);
static int t4_uld_rx_handler(void *, const __be64 *, const struct pkt_gl *);
static int t4_uld_state_change(void *, enum cxgb4_state state);
static const struct cxgb4_uld_info cxgb4i_uld_info = {
.name = DRV_MODULE_NAME,
.add = t4_uld_add,
.rx_handler = t4_uld_rx_handler,
.state_change = t4_uld_state_change,
};
static struct scsi_host_template cxgb4i_host_template = {
.module = THIS_MODULE,
.name = DRV_MODULE_NAME,
.proc_name = DRV_MODULE_NAME,
.can_queue = CXGB4I_SCSI_HOST_QDEPTH,
.queuecommand = iscsi_queuecommand,
.change_queue_depth = iscsi_change_queue_depth,
.sg_tablesize = SG_ALL,
.max_sectors = 0xFFFF,
.cmd_per_lun = ISCSI_DEF_CMD_PER_LUN,
.eh_abort_handler = iscsi_eh_abort,
.eh_device_reset_handler = iscsi_eh_device_reset,
.eh_target_reset_handler = iscsi_eh_recover_target,
.target_alloc = iscsi_target_alloc,
.use_clustering = DISABLE_CLUSTERING,
.this_id = -1,
};
static struct iscsi_transport cxgb4i_iscsi_transport = {
.owner = THIS_MODULE,
.name = DRV_MODULE_NAME,
.caps = CAP_RECOVERY_L0 | CAP_MULTI_R2T | CAP_HDRDGST |
CAP_DATADGST | CAP_DIGEST_OFFLOAD |
CAP_PADDING_OFFLOAD | CAP_TEXT_NEGO,
.attr_is_visible = cxgbi_attr_is_visible,
.get_host_param = cxgbi_get_host_param,
.set_host_param = cxgbi_set_host_param,
/* session management */
.create_session = cxgbi_create_session,
.destroy_session = cxgbi_destroy_session,
.get_session_param = iscsi_session_get_param,
/* connection management */
.create_conn = cxgbi_create_conn,
.bind_conn = cxgbi_bind_conn,
.destroy_conn = iscsi_tcp_conn_teardown,
.start_conn = iscsi_conn_start,
.stop_conn = iscsi_conn_stop,
.get_conn_param = iscsi_conn_get_param,
.set_param = cxgbi_set_conn_param,
.get_stats = cxgbi_get_conn_stats,
/* pdu xmit req from user space */
.send_pdu = iscsi_conn_send_pdu,
/* task */
.init_task = iscsi_tcp_task_init,
.xmit_task = iscsi_tcp_task_xmit,
.cleanup_task = cxgbi_cleanup_task,
/* pdu */
.alloc_pdu = cxgbi_conn_alloc_pdu,
.init_pdu = cxgbi_conn_init_pdu,
.xmit_pdu = cxgbi_conn_xmit_pdu,
.parse_pdu_itt = cxgbi_parse_pdu_itt,
/* TCP connect/disconnect */
.get_ep_param = cxgbi_get_ep_param,
.ep_connect = cxgbi_ep_connect,
.ep_poll = cxgbi_ep_poll,
.ep_disconnect = cxgbi_ep_disconnect,
/* Error recovery timeout call */
.session_recovery_timedout = iscsi_session_recovery_timedout,
};
static struct scsi_transport_template *cxgb4i_stt;
/*
* CPL (Chelsio Protocol Language) defines a message passing interface between
* the host driver and Chelsio asic.
* The section below implments CPLs that related to iscsi tcp connection
* open/close/abort and data send/receive.
*/
#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
#define RCV_BUFSIZ_MASK 0x3FFU
#define MAX_IMM_TX_PKT_LEN 128
static inline void set_queue(struct sk_buff *skb, unsigned int queue,
const struct cxgbi_sock *csk)
{
skb->queue_mapping = queue;
}
static int push_tx_frames(struct cxgbi_sock *, int);
/*
* is_ofld_imm - check whether a packet can be sent as immediate data
* @skb: the packet
*
* Returns true if a packet can be sent as an offload WR with immediate
* data. We currently use the same limit as for Ethernet packets.
*/
static inline int is_ofld_imm(const struct sk_buff *skb)
{
return skb->len <= (MAX_IMM_TX_PKT_LEN -
sizeof(struct fw_ofld_tx_data_wr));
}
static void send_act_open_req(struct cxgbi_sock *csk, struct sk_buff *skb,
struct l2t_entry *e)
{
struct cpl_act_open_req *req;
int wscale = cxgbi_sock_compute_wscale(csk->mss_idx);
unsigned long long opt0;
unsigned int opt2;
unsigned int qid_atid = ((unsigned int)csk->atid) |
(((unsigned int)csk->rss_qid) << 14);
opt0 = KEEP_ALIVE(1) |
WND_SCALE(wscale) |
MSS_IDX(csk->mss_idx) |
L2T_IDX(((struct l2t_entry *)csk->l2t)->idx) |
TX_CHAN(csk->tx_chan) |
SMAC_SEL(csk->smac_idx) |
ULP_MODE(ULP_MODE_ISCSI) |
RCV_BUFSIZ(cxgb4i_rcv_win >> 10);
opt2 = RX_CHANNEL(0) |
RSS_QUEUE_VALID |
(1 << 20) | (1 << 22) |
RSS_QUEUE(csk->rss_qid);
set_wr_txq(skb, CPL_PRIORITY_SETUP, csk->port_id);
req = (struct cpl_act_open_req *)skb->head;
INIT_TP_WR(req, 0);
OPCODE_TID(req) = cpu_to_be32(MK_OPCODE_TID(CPL_ACT_OPEN_REQ,
qid_atid));
req->local_port = csk->saddr.sin_port;
req->peer_port = csk->daddr.sin_port;
req->local_ip = csk->saddr.sin_addr.s_addr;
req->peer_ip = csk->daddr.sin_addr.s_addr;
req->opt0 = cpu_to_be64(opt0);
req->params = 0;
req->opt2 = cpu_to_be32(opt2);
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p, %pI4:%u-%pI4:%u, atid %d, qid %u.\n",
csk, &req->local_ip, ntohs(req->local_port),
&req->peer_ip, ntohs(req->peer_port),
csk->atid, csk->rss_qid);
cxgb4_l2t_send(csk->cdev->ports[csk->port_id], skb, csk->l2t);
}
static void send_close_req(struct cxgbi_sock *csk)
{
struct sk_buff *skb = csk->cpl_close;
struct cpl_close_con_req *req = (struct cpl_close_con_req *)skb->head;
unsigned int tid = csk->tid;
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p,%u,0x%lx, tid %u.\n",
csk, csk->state, csk->flags, csk->tid);
csk->cpl_close = NULL;
set_wr_txq(skb, CPL_PRIORITY_DATA, csk->port_id);
INIT_TP_WR(req, tid);
OPCODE_TID(req) = cpu_to_be32(MK_OPCODE_TID(CPL_CLOSE_CON_REQ, tid));
req->rsvd = 0;
cxgbi_sock_skb_entail(csk, skb);
if (csk->state >= CTP_ESTABLISHED)
push_tx_frames(csk, 1);
}
static void abort_arp_failure(void *handle, struct sk_buff *skb)
{
struct cxgbi_sock *csk = (struct cxgbi_sock *)handle;
struct cpl_abort_req *req;
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p,%u,0x%lx, tid %u, abort.\n",
csk, csk->state, csk->flags, csk->tid);
req = (struct cpl_abort_req *)skb->data;
req->cmd = CPL_ABORT_NO_RST;
cxgb4_ofld_send(csk->cdev->ports[csk->port_id], skb);
}
static void send_abort_req(struct cxgbi_sock *csk)
{
struct cpl_abort_req *req;
struct sk_buff *skb = csk->cpl_abort_req;
if (unlikely(csk->state == CTP_ABORTING) || !skb || !csk->cdev)
return;
cxgbi_sock_set_state(csk, CTP_ABORTING);
cxgbi_sock_set_flag(csk, CTPF_ABORT_RPL_PENDING);
cxgbi_sock_purge_write_queue(csk);
csk->cpl_abort_req = NULL;
req = (struct cpl_abort_req *)skb->head;
set_queue(skb, CPL_PRIORITY_DATA, csk);
req->cmd = CPL_ABORT_SEND_RST;
t4_set_arp_err_handler(skb, csk, abort_arp_failure);
INIT_TP_WR(req, csk->tid);
OPCODE_TID(req) = cpu_to_be32(MK_OPCODE_TID(CPL_ABORT_REQ, csk->tid));
req->rsvd0 = htonl(csk->snd_nxt);
req->rsvd1 = !cxgbi_sock_flag(csk, CTPF_TX_DATA_SENT);
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p,%u,0x%lx,%u, snd_nxt %u, 0x%x.\n",
csk, csk->state, csk->flags, csk->tid, csk->snd_nxt,
req->rsvd1);
cxgb4_l2t_send(csk->cdev->ports[csk->port_id], skb, csk->l2t);
}
static void send_abort_rpl(struct cxgbi_sock *csk, int rst_status)
{
struct sk_buff *skb = csk->cpl_abort_rpl;
struct cpl_abort_rpl *rpl = (struct cpl_abort_rpl *)skb->head;
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p,%u,0x%lx,%u, status %d.\n",
csk, csk->state, csk->flags, csk->tid, rst_status);
csk->cpl_abort_rpl = NULL;
set_queue(skb, CPL_PRIORITY_DATA, csk);
INIT_TP_WR(rpl, csk->tid);
OPCODE_TID(rpl) = cpu_to_be32(MK_OPCODE_TID(CPL_ABORT_RPL, csk->tid));
rpl->cmd = rst_status;
cxgb4_ofld_send(csk->cdev->ports[csk->port_id], skb);
}
/*
* CPL connection rx data ack: host ->
* Send RX credits through an RX_DATA_ACK CPL message. Returns the number of
* credits sent.
*/
static u32 send_rx_credits(struct cxgbi_sock *csk, u32 credits)
{
struct sk_buff *skb;
struct cpl_rx_data_ack *req;
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_PDU_RX,
"csk 0x%p,%u,0x%lx,%u, credit %u.\n",
csk, csk->state, csk->flags, csk->tid, credits);
skb = alloc_wr(sizeof(*req), 0, GFP_ATOMIC);
if (!skb) {
pr_info("csk 0x%p, credit %u, OOM.\n", csk, credits);
return 0;
}
req = (struct cpl_rx_data_ack *)skb->head;
set_wr_txq(skb, CPL_PRIORITY_ACK, csk->port_id);
INIT_TP_WR(req, csk->tid);
OPCODE_TID(req) = cpu_to_be32(MK_OPCODE_TID(CPL_RX_DATA_ACK,
csk->tid));
req->credit_dack = cpu_to_be32(RX_CREDITS(credits) | RX_FORCE_ACK(1));
cxgb4_ofld_send(csk->cdev->ports[csk->port_id], skb);
return credits;
}
/*
* sgl_len - calculates the size of an SGL of the given capacity
* @n: the number of SGL entries
* Calculates the number of flits needed for a scatter/gather list that
* can hold the given number of entries.
*/
static inline unsigned int sgl_len(unsigned int n)
{
n--;
return (3 * n) / 2 + (n & 1) + 2;
}
/*
* calc_tx_flits_ofld - calculate # of flits for an offload packet
* @skb: the packet
*
* Returns the number of flits needed for the given offload packet.
* These packets are already fully constructed and no additional headers
* will be added.
*/
static inline unsigned int calc_tx_flits_ofld(const struct sk_buff *skb)
{
unsigned int flits, cnt;
if (is_ofld_imm(skb))
return DIV_ROUND_UP(skb->len, 8);
flits = skb_transport_offset(skb) / 8;
cnt = skb_shinfo(skb)->nr_frags;
if (skb->tail != skb->transport_header)
cnt++;
return flits + sgl_len(cnt);
}
static inline void send_tx_flowc_wr(struct cxgbi_sock *csk)
{
struct sk_buff *skb;
struct fw_flowc_wr *flowc;
int flowclen, i;
flowclen = 80;
skb = alloc_wr(flowclen, 0, GFP_ATOMIC);
flowc = (struct fw_flowc_wr *)skb->head;
flowc->op_to_nparams =
htonl(FW_WR_OP(FW_FLOWC_WR) | FW_FLOWC_WR_NPARAMS(8));
flowc->flowid_len16 =
htonl(FW_WR_LEN16(DIV_ROUND_UP(72, 16)) |
FW_WR_FLOWID(csk->tid));
flowc->mnemval[0].mnemonic = FW_FLOWC_MNEM_PFNVFN;
flowc->mnemval[0].val = htonl(csk->cdev->pfvf);
flowc->mnemval[1].mnemonic = FW_FLOWC_MNEM_CH;
flowc->mnemval[1].val = htonl(csk->tx_chan);
flowc->mnemval[2].mnemonic = FW_FLOWC_MNEM_PORT;
flowc->mnemval[2].val = htonl(csk->tx_chan);
flowc->mnemval[3].mnemonic = FW_FLOWC_MNEM_IQID;
flowc->mnemval[3].val = htonl(csk->rss_qid);
flowc->mnemval[4].mnemonic = FW_FLOWC_MNEM_SNDNXT;
flowc->mnemval[4].val = htonl(csk->snd_nxt);
flowc->mnemval[5].mnemonic = FW_FLOWC_MNEM_RCVNXT;
flowc->mnemval[5].val = htonl(csk->rcv_nxt);
flowc->mnemval[6].mnemonic = FW_FLOWC_MNEM_SNDBUF;
flowc->mnemval[6].val = htonl(cxgb4i_snd_win);
flowc->mnemval[7].mnemonic = FW_FLOWC_MNEM_MSS;
flowc->mnemval[7].val = htonl(csk->advmss);
flowc->mnemval[8].mnemonic = 0;
flowc->mnemval[8].val = 0;
for (i = 0; i < 9; i++) {
flowc->mnemval[i].r4[0] = 0;
flowc->mnemval[i].r4[1] = 0;
flowc->mnemval[i].r4[2] = 0;
}
set_queue(skb, CPL_PRIORITY_DATA, csk);
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p, tid 0x%x, %u,%u,%u,%u,%u,%u,%u.\n",
csk, csk->tid, 0, csk->tx_chan, csk->rss_qid,
csk->snd_nxt, csk->rcv_nxt, cxgb4i_snd_win,
csk->advmss);
cxgb4_ofld_send(csk->cdev->ports[csk->port_id], skb);
}
static inline void make_tx_data_wr(struct cxgbi_sock *csk, struct sk_buff *skb,
int dlen, int len, u32 credits, int compl)
{
struct fw_ofld_tx_data_wr *req;
unsigned int submode = cxgbi_skcb_ulp_mode(skb) & 3;
unsigned int wr_ulp_mode = 0;
req = (struct fw_ofld_tx_data_wr *)__skb_push(skb, sizeof(*req));
if (is_ofld_imm(skb)) {
req->op_to_immdlen = htonl(FW_WR_OP(FW_OFLD_TX_DATA_WR) |
FW_WR_COMPL(1) |
FW_WR_IMMDLEN(dlen));
req->flowid_len16 = htonl(FW_WR_FLOWID(csk->tid) |
FW_WR_LEN16(credits));
} else {
req->op_to_immdlen =
cpu_to_be32(FW_WR_OP(FW_OFLD_TX_DATA_WR) |
FW_WR_COMPL(1) |
FW_WR_IMMDLEN(0));
req->flowid_len16 =
cpu_to_be32(FW_WR_FLOWID(csk->tid) |
FW_WR_LEN16(credits));
}
if (submode)
wr_ulp_mode = FW_OFLD_TX_DATA_WR_ULPMODE(ULP2_MODE_ISCSI) |
FW_OFLD_TX_DATA_WR_ULPSUBMODE(submode);
req->tunnel_to_proxy = htonl(wr_ulp_mode) |
FW_OFLD_TX_DATA_WR_SHOVE(skb_peek(&csk->write_queue) ? 0 : 1);
req->plen = htonl(len);
if (!cxgbi_sock_flag(csk, CTPF_TX_DATA_SENT))
cxgbi_sock_set_flag(csk, CTPF_TX_DATA_SENT);
}
static void arp_failure_skb_discard(void *handle, struct sk_buff *skb)
{
kfree_skb(skb);
}
static int push_tx_frames(struct cxgbi_sock *csk, int req_completion)
{
int total_size = 0;
struct sk_buff *skb;
if (unlikely(csk->state < CTP_ESTABLISHED ||
csk->state == CTP_CLOSE_WAIT_1 || csk->state >= CTP_ABORTING)) {
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK |
1 << CXGBI_DBG_PDU_TX,
"csk 0x%p,%u,0x%lx,%u, in closing state.\n",
csk, csk->state, csk->flags, csk->tid);
return 0;
}
while (csk->wr_cred && (skb = skb_peek(&csk->write_queue)) != NULL) {
int dlen = skb->len;
int len = skb->len;
unsigned int credits_needed;
skb_reset_transport_header(skb);
if (is_ofld_imm(skb))
credits_needed = DIV_ROUND_UP(dlen +
sizeof(struct fw_ofld_tx_data_wr), 16);
else
credits_needed = DIV_ROUND_UP(8*calc_tx_flits_ofld(skb)
+ sizeof(struct fw_ofld_tx_data_wr),
16);
if (csk->wr_cred < credits_needed) {
log_debug(1 << CXGBI_DBG_PDU_TX,
"csk 0x%p, skb %u/%u, wr %d < %u.\n",
csk, skb->len, skb->data_len,
credits_needed, csk->wr_cred);
break;
}
__skb_unlink(skb, &csk->write_queue);
set_queue(skb, CPL_PRIORITY_DATA, csk);
skb->csum = credits_needed;
csk->wr_cred -= credits_needed;
csk->wr_una_cred += credits_needed;
cxgbi_sock_enqueue_wr(csk, skb);
log_debug(1 << CXGBI_DBG_PDU_TX,
"csk 0x%p, skb %u/%u, wr %d, left %u, unack %u.\n",
csk, skb->len, skb->data_len, credits_needed,
csk->wr_cred, csk->wr_una_cred);
if (likely(cxgbi_skcb_test_flag(skb, SKCBF_TX_NEED_HDR))) {
if (!cxgbi_sock_flag(csk, CTPF_TX_DATA_SENT)) {
send_tx_flowc_wr(csk);
skb->csum += 5;
csk->wr_cred -= 5;
csk->wr_una_cred += 5;
}
len += cxgbi_ulp_extra_len(cxgbi_skcb_ulp_mode(skb));
make_tx_data_wr(csk, skb, dlen, len, credits_needed,
req_completion);
csk->snd_nxt += len;
cxgbi_skcb_clear_flag(skb, SKCBF_TX_NEED_HDR);
}
total_size += skb->truesize;
t4_set_arp_err_handler(skb, csk, arp_failure_skb_discard);
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_PDU_TX,
"csk 0x%p,%u,0x%lx,%u, skb 0x%p, %u.\n",
csk, csk->state, csk->flags, csk->tid, skb, len);
cxgb4_l2t_send(csk->cdev->ports[csk->port_id], skb, csk->l2t);
}
return total_size;
}
static inline void free_atid(struct cxgbi_sock *csk)
{
struct cxgb4_lld_info *lldi = cxgbi_cdev_priv(csk->cdev);
if (cxgbi_sock_flag(csk, CTPF_HAS_ATID)) {
cxgb4_free_atid(lldi->tids, csk->atid);
cxgbi_sock_clear_flag(csk, CTPF_HAS_ATID);
cxgbi_sock_put(csk);
}
}
static void do_act_establish(struct cxgbi_device *cdev, struct sk_buff *skb)
{
struct cxgbi_sock *csk;
struct cpl_act_establish *req = (struct cpl_act_establish *)skb->data;
unsigned short tcp_opt = ntohs(req->tcp_opt);
unsigned int tid = GET_TID(req);
unsigned int atid = GET_TID_TID(ntohl(req->tos_atid));
struct cxgb4_lld_info *lldi = cxgbi_cdev_priv(cdev);
struct tid_info *t = lldi->tids;
u32 rcv_isn = be32_to_cpu(req->rcv_isn);
csk = lookup_atid(t, atid);
if (unlikely(!csk)) {
pr_err("NO conn. for atid %u, cdev 0x%p.\n", atid, cdev);
goto rel_skb;
}
if (csk->atid != atid) {
pr_err("bad conn atid %u, csk 0x%p,%u,0x%lx,tid %u, atid %u.\n",
atid, csk, csk->state, csk->flags, csk->tid, csk->atid);
goto rel_skb;
}
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p,%u,0x%lx, tid %u, atid %u, rseq %u.\n",
csk, csk->state, csk->flags, tid, atid, rcv_isn);
cxgbi_sock_get(csk);
csk->tid = tid;
cxgb4_insert_tid(lldi->tids, csk, tid);
cxgbi_sock_set_flag(csk, CTPF_HAS_TID);
free_atid(csk);
spin_lock_bh(&csk->lock);
if (unlikely(csk->state != CTP_ACTIVE_OPEN))
pr_info("csk 0x%p,%u,0x%lx,%u, got EST.\n",
csk, csk->state, csk->flags, csk->tid);
if (csk->retry_timer.function) {
del_timer(&csk->retry_timer);
csk->retry_timer.function = NULL;
}
csk->copied_seq = csk->rcv_wup = csk->rcv_nxt = rcv_isn;
/*
* Causes the first RX_DATA_ACK to supply any Rx credits we couldn't
* pass through opt0.
*/
if (cxgb4i_rcv_win > (RCV_BUFSIZ_MASK << 10))
csk->rcv_wup -= cxgb4i_rcv_win - (RCV_BUFSIZ_MASK << 10);
csk->advmss = lldi->mtus[GET_TCPOPT_MSS(tcp_opt)] - 40;
if (GET_TCPOPT_TSTAMP(tcp_opt))
csk->advmss -= 12;
if (csk->advmss < 128)
csk->advmss = 128;
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p, mss_idx %u, advmss %u.\n",
csk, GET_TCPOPT_MSS(tcp_opt), csk->advmss);
cxgbi_sock_established(csk, ntohl(req->snd_isn), ntohs(req->tcp_opt));
if (unlikely(cxgbi_sock_flag(csk, CTPF_ACTIVE_CLOSE_NEEDED)))
send_abort_req(csk);
else {
if (skb_queue_len(&csk->write_queue))
push_tx_frames(csk, 0);
cxgbi_conn_tx_open(csk);
}
spin_unlock_bh(&csk->lock);
rel_skb:
__kfree_skb(skb);
}
static int act_open_rpl_status_to_errno(int status)
{
switch (status) {
case CPL_ERR_CONN_RESET:
return -ECONNREFUSED;
case CPL_ERR_ARP_MISS:
return -EHOSTUNREACH;
case CPL_ERR_CONN_TIMEDOUT:
return -ETIMEDOUT;
case CPL_ERR_TCAM_FULL:
return -ENOMEM;
case CPL_ERR_CONN_EXIST:
return -EADDRINUSE;
default:
return -EIO;
}
}
static void csk_act_open_retry_timer(unsigned long data)
{
struct sk_buff *skb;
struct cxgbi_sock *csk = (struct cxgbi_sock *)data;
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p,%u,0x%lx,%u.\n",
csk, csk->state, csk->flags, csk->tid);
cxgbi_sock_get(csk);
spin_lock_bh(&csk->lock);
skb = alloc_wr(sizeof(struct cpl_act_open_req), 0, GFP_ATOMIC);
if (!skb)
cxgbi_sock_fail_act_open(csk, -ENOMEM);
else {
skb->sk = (struct sock *)csk;
t4_set_arp_err_handler(skb, csk,
cxgbi_sock_act_open_req_arp_failure);
send_act_open_req(csk, skb, csk->l2t);
}
spin_unlock_bh(&csk->lock);
cxgbi_sock_put(csk);
}
static void do_act_open_rpl(struct cxgbi_device *cdev, struct sk_buff *skb)
{
struct cxgbi_sock *csk;
struct cpl_act_open_rpl *rpl = (struct cpl_act_open_rpl *)skb->data;
unsigned int tid = GET_TID(rpl);
unsigned int atid =
GET_TID_TID(GET_AOPEN_ATID(be32_to_cpu(rpl->atid_status)));
unsigned int status = GET_AOPEN_STATUS(be32_to_cpu(rpl->atid_status));
struct cxgb4_lld_info *lldi = cxgbi_cdev_priv(cdev);
struct tid_info *t = lldi->tids;
csk = lookup_atid(t, atid);
if (unlikely(!csk)) {
pr_err("NO matching conn. atid %u, tid %u.\n", atid, tid);
goto rel_skb;
}
pr_info("%pI4:%u-%pI4:%u, atid %u,%u, status %u, csk 0x%p,%u,0x%lx.\n",
&csk->saddr.sin_addr.s_addr, ntohs(csk->saddr.sin_port),
&csk->daddr.sin_addr.s_addr, ntohs(csk->daddr.sin_port),
atid, tid, status, csk, csk->state, csk->flags);
if (status == CPL_ERR_RTX_NEG_ADVICE)
goto rel_skb;
if (status && status != CPL_ERR_TCAM_FULL &&
status != CPL_ERR_CONN_EXIST &&
status != CPL_ERR_ARP_MISS)
cxgb4_remove_tid(lldi->tids, csk->port_id, GET_TID(rpl));
cxgbi_sock_get(csk);
spin_lock_bh(&csk->lock);
if (status == CPL_ERR_CONN_EXIST &&
csk->retry_timer.function != csk_act_open_retry_timer) {
csk->retry_timer.function = csk_act_open_retry_timer;
mod_timer(&csk->retry_timer, jiffies + HZ / 2);
} else
cxgbi_sock_fail_act_open(csk,
act_open_rpl_status_to_errno(status));
spin_unlock_bh(&csk->lock);
cxgbi_sock_put(csk);
rel_skb:
__kfree_skb(skb);
}
static void do_peer_close(struct cxgbi_device *cdev, struct sk_buff *skb)
{
struct cxgbi_sock *csk;
struct cpl_peer_close *req = (struct cpl_peer_close *)skb->data;
unsigned int tid = GET_TID(req);
struct cxgb4_lld_info *lldi = cxgbi_cdev_priv(cdev);
struct tid_info *t = lldi->tids;
csk = lookup_tid(t, tid);
if (unlikely(!csk)) {
pr_err("can't find connection for tid %u.\n", tid);
goto rel_skb;
}
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p,%u,0x%lx,%u.\n",
csk, csk->state, csk->flags, csk->tid);
cxgbi_sock_rcv_peer_close(csk);
rel_skb:
__kfree_skb(skb);
}
static void do_close_con_rpl(struct cxgbi_device *cdev, struct sk_buff *skb)
{
struct cxgbi_sock *csk;
struct cpl_close_con_rpl *rpl = (struct cpl_close_con_rpl *)skb->data;
unsigned int tid = GET_TID(rpl);
struct cxgb4_lld_info *lldi = cxgbi_cdev_priv(cdev);
struct tid_info *t = lldi->tids;
csk = lookup_tid(t, tid);
if (unlikely(!csk)) {
pr_err("can't find connection for tid %u.\n", tid);
goto rel_skb;
}
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p,%u,0x%lx,%u.\n",
csk, csk->state, csk->flags, csk->tid);
cxgbi_sock_rcv_close_conn_rpl(csk, ntohl(rpl->snd_nxt));
rel_skb:
__kfree_skb(skb);
}
static int abort_status_to_errno(struct cxgbi_sock *csk, int abort_reason,
int *need_rst)
{
switch (abort_reason) {
case CPL_ERR_BAD_SYN: /* fall through */
case CPL_ERR_CONN_RESET:
return csk->state > CTP_ESTABLISHED ?
-EPIPE : -ECONNRESET;
case CPL_ERR_XMIT_TIMEDOUT:
case CPL_ERR_PERSIST_TIMEDOUT:
case CPL_ERR_FINWAIT2_TIMEDOUT:
case CPL_ERR_KEEPALIVE_TIMEDOUT:
return -ETIMEDOUT;
default:
return -EIO;
}
}
static void do_abort_req_rss(struct cxgbi_device *cdev, struct sk_buff *skb)
{
struct cxgbi_sock *csk;
struct cpl_abort_req_rss *req = (struct cpl_abort_req_rss *)skb->data;
unsigned int tid = GET_TID(req);
struct cxgb4_lld_info *lldi = cxgbi_cdev_priv(cdev);
struct tid_info *t = lldi->tids;
int rst_status = CPL_ABORT_NO_RST;
csk = lookup_tid(t, tid);
if (unlikely(!csk)) {
pr_err("can't find connection for tid %u.\n", tid);
goto rel_skb;
}
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p,%u,0x%lx, tid %u, status 0x%x.\n",
csk, csk->state, csk->flags, csk->tid, req->status);
if (req->status == CPL_ERR_RTX_NEG_ADVICE ||
req->status == CPL_ERR_PERSIST_NEG_ADVICE)
goto rel_skb;
cxgbi_sock_get(csk);
spin_lock_bh(&csk->lock);
if (!cxgbi_sock_flag(csk, CTPF_ABORT_REQ_RCVD)) {
cxgbi_sock_set_flag(csk, CTPF_ABORT_REQ_RCVD);
cxgbi_sock_set_state(csk, CTP_ABORTING);
goto done;
}
cxgbi_sock_clear_flag(csk, CTPF_ABORT_REQ_RCVD);
send_abort_rpl(csk, rst_status);
if (!cxgbi_sock_flag(csk, CTPF_ABORT_RPL_PENDING)) {
csk->err = abort_status_to_errno(csk, req->status, &rst_status);
cxgbi_sock_closed(csk);
}
done:
spin_unlock_bh(&csk->lock);
cxgbi_sock_put(csk);
rel_skb:
__kfree_skb(skb);
}
static void do_abort_rpl_rss(struct cxgbi_device *cdev, struct sk_buff *skb)
{
struct cxgbi_sock *csk;
struct cpl_abort_rpl_rss *rpl = (struct cpl_abort_rpl_rss *)skb->data;
unsigned int tid = GET_TID(rpl);
struct cxgb4_lld_info *lldi = cxgbi_cdev_priv(cdev);
struct tid_info *t = lldi->tids;
csk = lookup_tid(t, tid);
if (!csk)
goto rel_skb;
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"status 0x%x, csk 0x%p, s %u, 0x%lx.\n",
rpl->status, csk, csk ? csk->state : 0,
csk ? csk->flags : 0UL);
if (rpl->status == CPL_ERR_ABORT_FAILED)
goto rel_skb;
cxgbi_sock_rcv_abort_rpl(csk);
rel_skb:
__kfree_skb(skb);
}
static void do_rx_iscsi_hdr(struct cxgbi_device *cdev, struct sk_buff *skb)
{
struct cxgbi_sock *csk;
struct cpl_iscsi_hdr *cpl = (struct cpl_iscsi_hdr *)skb->data;
unsigned short pdu_len_ddp = be16_to_cpu(cpl->pdu_len_ddp);
unsigned int tid = GET_TID(cpl);
struct cxgb4_lld_info *lldi = cxgbi_cdev_priv(cdev);
struct tid_info *t = lldi->tids;
csk = lookup_tid(t, tid);
if (unlikely(!csk)) {
pr_err("can't find conn. for tid %u.\n", tid);
goto rel_skb;
}
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_PDU_RX,
"csk 0x%p,%u,0x%lx, tid %u, skb 0x%p,%u, 0x%x.\n",
csk, csk->state, csk->flags, csk->tid, skb, skb->len,
pdu_len_ddp);
spin_lock_bh(&csk->lock);
if (unlikely(csk->state >= CTP_PASSIVE_CLOSE)) {
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p,%u,0x%lx,%u, bad state.\n",
csk, csk->state, csk->flags, csk->tid);
if (csk->state != CTP_ABORTING)
goto abort_conn;
else
goto discard;
}
cxgbi_skcb_tcp_seq(skb) = ntohl(cpl->seq);
cxgbi_skcb_flags(skb) = 0;
skb_reset_transport_header(skb);
__skb_pull(skb, sizeof(*cpl));
__pskb_trim(skb, ntohs(cpl->len));
if (!csk->skb_ulp_lhdr) {
unsigned char *bhs;
unsigned int hlen, dlen;
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_PDU_RX,
"csk 0x%p,%u,0x%lx, tid %u, skb 0x%p header.\n",
csk, csk->state, csk->flags, csk->tid, skb);
csk->skb_ulp_lhdr = skb;
cxgbi_skcb_set_flag(skb, SKCBF_RX_HDR);
if (cxgbi_skcb_tcp_seq(skb) != csk->rcv_nxt) {
pr_info("tid %u, CPL_ISCSI_HDR, bad seq, 0x%x/0x%x.\n",
csk->tid, cxgbi_skcb_tcp_seq(skb),
csk->rcv_nxt);
goto abort_conn;
}
bhs = skb->data;
hlen = ntohs(cpl->len);
dlen = ntohl(*(unsigned int *)(bhs + 4)) & 0xFFFFFF;
if ((hlen + dlen) != ISCSI_PDU_LEN(pdu_len_ddp) - 40) {
pr_info("tid 0x%x, CPL_ISCSI_HDR, pdu len "
"mismatch %u != %u + %u, seq 0x%x.\n",
csk->tid, ISCSI_PDU_LEN(pdu_len_ddp) - 40,
hlen, dlen, cxgbi_skcb_tcp_seq(skb));
goto abort_conn;
}
cxgbi_skcb_rx_pdulen(skb) = (hlen + dlen + 3) & (~0x3);
if (dlen)
cxgbi_skcb_rx_pdulen(skb) += csk->dcrc_len;
csk->rcv_nxt += cxgbi_skcb_rx_pdulen(skb);
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_PDU_RX,
"csk 0x%p, skb 0x%p, 0x%x,%u+%u,0x%x,0x%x.\n",
csk, skb, *bhs, hlen, dlen,
ntohl(*((unsigned int *)(bhs + 16))),
ntohl(*((unsigned int *)(bhs + 24))));
} else {
struct sk_buff *lskb = csk->skb_ulp_lhdr;
cxgbi_skcb_set_flag(lskb, SKCBF_RX_DATA);
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_PDU_RX,
"csk 0x%p,%u,0x%lx, skb 0x%p data, 0x%p.\n",
csk, csk->state, csk->flags, skb, lskb);
}
__skb_queue_tail(&csk->receive_queue, skb);
spin_unlock_bh(&csk->lock);
return;
abort_conn:
send_abort_req(csk);
discard:
spin_unlock_bh(&csk->lock);
rel_skb:
__kfree_skb(skb);
}
static void do_rx_data_ddp(struct cxgbi_device *cdev,
struct sk_buff *skb)
{
struct cxgbi_sock *csk;
struct sk_buff *lskb;
struct cpl_rx_data_ddp *rpl = (struct cpl_rx_data_ddp *)skb->data;
unsigned int tid = GET_TID(rpl);
struct cxgb4_lld_info *lldi = cxgbi_cdev_priv(cdev);
struct tid_info *t = lldi->tids;
unsigned int status = ntohl(rpl->ddpvld);
csk = lookup_tid(t, tid);
if (unlikely(!csk)) {
pr_err("can't find connection for tid %u.\n", tid);
goto rel_skb;
}
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_PDU_RX,
"csk 0x%p,%u,0x%lx, skb 0x%p,0x%x, lhdr 0x%p.\n",
csk, csk->state, csk->flags, skb, status, csk->skb_ulp_lhdr);
spin_lock_bh(&csk->lock);
if (unlikely(csk->state >= CTP_PASSIVE_CLOSE)) {
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p,%u,0x%lx,%u, bad state.\n",
csk, csk->state, csk->flags, csk->tid);
if (csk->state != CTP_ABORTING)
goto abort_conn;
else
goto discard;
}
if (!csk->skb_ulp_lhdr) {
pr_err("tid 0x%x, rcv RX_DATA_DDP w/o pdu bhs.\n", csk->tid);
goto abort_conn;
}
lskb = csk->skb_ulp_lhdr;
csk->skb_ulp_lhdr = NULL;
cxgbi_skcb_rx_ddigest(lskb) = ntohl(rpl->ulp_crc);
if (ntohs(rpl->len) != cxgbi_skcb_rx_pdulen(lskb))
pr_info("tid 0x%x, RX_DATA_DDP pdulen %u != %u.\n",
csk->tid, ntohs(rpl->len), cxgbi_skcb_rx_pdulen(lskb));
if (status & (1 << CPL_RX_DDP_STATUS_HCRC_SHIFT)) {
pr_info("csk 0x%p, lhdr 0x%p, status 0x%x, hcrc bad 0x%lx.\n",
csk, lskb, status, cxgbi_skcb_flags(lskb));
cxgbi_skcb_set_flag(lskb, SKCBF_RX_HCRC_ERR);
}
if (status & (1 << CPL_RX_DDP_STATUS_DCRC_SHIFT)) {
pr_info("csk 0x%p, lhdr 0x%p, status 0x%x, dcrc bad 0x%lx.\n",
csk, lskb, status, cxgbi_skcb_flags(lskb));
cxgbi_skcb_set_flag(lskb, SKCBF_RX_DCRC_ERR);
}
if (status & (1 << CPL_RX_DDP_STATUS_PAD_SHIFT)) {
log_debug(1 << CXGBI_DBG_PDU_RX,
"csk 0x%p, lhdr 0x%p, status 0x%x, pad bad.\n",
csk, lskb, status);
cxgbi_skcb_set_flag(lskb, SKCBF_RX_PAD_ERR);
}
if ((status & (1 << CPL_RX_DDP_STATUS_DDP_SHIFT)) &&
!cxgbi_skcb_test_flag(lskb, SKCBF_RX_DATA)) {
log_debug(1 << CXGBI_DBG_PDU_RX,
"csk 0x%p, lhdr 0x%p, 0x%x, data ddp'ed.\n",
csk, lskb, status);
cxgbi_skcb_set_flag(lskb, SKCBF_RX_DATA_DDPD);
}
log_debug(1 << CXGBI_DBG_PDU_RX,
"csk 0x%p, lskb 0x%p, f 0x%lx.\n",
csk, lskb, cxgbi_skcb_flags(lskb));
cxgbi_skcb_set_flag(lskb, SKCBF_RX_STATUS);
cxgbi_conn_pdu_ready(csk);
spin_unlock_bh(&csk->lock);
goto rel_skb;
abort_conn:
send_abort_req(csk);
discard:
spin_unlock_bh(&csk->lock);
rel_skb:
__kfree_skb(skb);
}
static void do_fw4_ack(struct cxgbi_device *cdev, struct sk_buff *skb)
{
struct cxgbi_sock *csk;
struct cpl_fw4_ack *rpl = (struct cpl_fw4_ack *)skb->data;
unsigned int tid = GET_TID(rpl);
struct cxgb4_lld_info *lldi = cxgbi_cdev_priv(cdev);
struct tid_info *t = lldi->tids;
csk = lookup_tid(t, tid);
if (unlikely(!csk))
pr_err("can't find connection for tid %u.\n", tid);
else {
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p,%u,0x%lx,%u.\n",
csk, csk->state, csk->flags, csk->tid);
cxgbi_sock_rcv_wr_ack(csk, rpl->credits, ntohl(rpl->snd_una),
rpl->seq_vld);
}
__kfree_skb(skb);
}
static void do_set_tcb_rpl(struct cxgbi_device *cdev, struct sk_buff *skb)
{
struct cpl_set_tcb_rpl *rpl = (struct cpl_set_tcb_rpl *)skb->data;
unsigned int tid = GET_TID(rpl);
struct cxgb4_lld_info *lldi = cxgbi_cdev_priv(cdev);
struct tid_info *t = lldi->tids;
struct cxgbi_sock *csk;
csk = lookup_tid(t, tid);
if (!csk)
pr_err("can't find conn. for tid %u.\n", tid);
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p,%u,%lx,%u, status 0x%x.\n",
csk, csk->state, csk->flags, csk->tid, rpl->status);
if (rpl->status != CPL_ERR_NONE)
pr_err("csk 0x%p,%u, SET_TCB_RPL status %u.\n",
csk, tid, rpl->status);
__kfree_skb(skb);
}
static int alloc_cpls(struct cxgbi_sock *csk)
{
csk->cpl_close = alloc_wr(sizeof(struct cpl_close_con_req),
0, GFP_KERNEL);
if (!csk->cpl_close)
return -ENOMEM;
csk->cpl_abort_req = alloc_wr(sizeof(struct cpl_abort_req),
0, GFP_KERNEL);
if (!csk->cpl_abort_req)
goto free_cpls;
csk->cpl_abort_rpl = alloc_wr(sizeof(struct cpl_abort_rpl),
0, GFP_KERNEL);
if (!csk->cpl_abort_rpl)
goto free_cpls;
return 0;
free_cpls:
cxgbi_sock_free_cpl_skbs(csk);
return -ENOMEM;
}
static inline void l2t_put(struct cxgbi_sock *csk)
{
if (csk->l2t) {
cxgb4_l2t_release(csk->l2t);
csk->l2t = NULL;
cxgbi_sock_put(csk);
}
}
static void release_offload_resources(struct cxgbi_sock *csk)
{
struct cxgb4_lld_info *lldi;
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p,%u,0x%lx,%u.\n",
csk, csk->state, csk->flags, csk->tid);
cxgbi_sock_free_cpl_skbs(csk);
if (csk->wr_cred != csk->wr_max_cred) {
cxgbi_sock_purge_wr_queue(csk);
cxgbi_sock_reset_wr_list(csk);
}
l2t_put(csk);
if (cxgbi_sock_flag(csk, CTPF_HAS_ATID))
free_atid(csk);
else if (cxgbi_sock_flag(csk, CTPF_HAS_TID)) {
lldi = cxgbi_cdev_priv(csk->cdev);
cxgb4_remove_tid(lldi->tids, 0, csk->tid);
cxgbi_sock_clear_flag(csk, CTPF_HAS_TID);
cxgbi_sock_put(csk);
}
csk->dst = NULL;
csk->cdev = NULL;
}
static int init_act_open(struct cxgbi_sock *csk)
{
struct cxgbi_device *cdev = csk->cdev;
struct cxgb4_lld_info *lldi = cxgbi_cdev_priv(cdev);
struct net_device *ndev = cdev->ports[csk->port_id];
struct port_info *pi = netdev_priv(ndev);
struct sk_buff *skb = NULL;
struct neighbour *n;
unsigned int step;
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p,%u,0x%lx,%u.\n",
csk, csk->state, csk->flags, csk->tid);
csk->atid = cxgb4_alloc_atid(lldi->tids, csk);
if (csk->atid < 0) {
pr_err("%s, NO atid available.\n", ndev->name);
return -EINVAL;
}
cxgbi_sock_set_flag(csk, CTPF_HAS_ATID);
cxgbi_sock_get(csk);
n = dst_get_neighbour_noref(csk->dst);
if (!n) {
pr_err("%s, can't get neighbour of csk->dst.\n", ndev->name);
goto rel_resource;
}
csk->l2t = cxgb4_l2t_get(lldi->l2t, n, ndev, 0);
if (!csk->l2t) {
pr_err("%s, cannot alloc l2t.\n", ndev->name);
goto rel_resource;
}
cxgbi_sock_get(csk);
skb = alloc_wr(sizeof(struct cpl_act_open_req), 0, GFP_KERNEL);
if (!skb)
goto rel_resource;
skb->sk = (struct sock *)csk;
t4_set_arp_err_handler(skb, csk, cxgbi_sock_act_open_req_arp_failure);
if (!csk->mtu)
csk->mtu = dst_mtu(csk->dst);
cxgb4_best_mtu(lldi->mtus, csk->mtu, &csk->mss_idx);
csk->tx_chan = cxgb4_port_chan(ndev);
/* SMT two entries per row */
csk->smac_idx = ((cxgb4_port_viid(ndev) & 0x7F)) << 1;
step = lldi->ntxq / lldi->nchan;
csk->txq_idx = cxgb4_port_idx(ndev) * step;
step = lldi->nrxq / lldi->nchan;
csk->rss_qid = lldi->rxq_ids[cxgb4_port_idx(ndev) * step];
csk->wr_max_cred = csk->wr_cred = lldi->wr_cred;
csk->wr_una_cred = 0;
cxgbi_sock_reset_wr_list(csk);
csk->err = 0;
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p,p%d,%s, %u,%u,%u, mss %u,%u, smac %u.\n",
csk, pi->port_id, ndev->name, csk->tx_chan,
csk->txq_idx, csk->rss_qid, csk->mtu, csk->mss_idx,
csk->smac_idx);
cxgbi_sock_set_state(csk, CTP_ACTIVE_OPEN);
send_act_open_req(csk, skb, csk->l2t);
return 0;
rel_resource:
if (skb)
__kfree_skb(skb);
return -EINVAL;
}
cxgb4i_cplhandler_func cxgb4i_cplhandlers[NUM_CPL_CMDS] = {
[CPL_ACT_ESTABLISH] = do_act_establish,
[CPL_ACT_OPEN_RPL] = do_act_open_rpl,
[CPL_PEER_CLOSE] = do_peer_close,
[CPL_ABORT_REQ_RSS] = do_abort_req_rss,
[CPL_ABORT_RPL_RSS] = do_abort_rpl_rss,
[CPL_CLOSE_CON_RPL] = do_close_con_rpl,
[CPL_FW4_ACK] = do_fw4_ack,
[CPL_ISCSI_HDR] = do_rx_iscsi_hdr,
[CPL_SET_TCB_RPL] = do_set_tcb_rpl,
[CPL_RX_DATA_DDP] = do_rx_data_ddp,
};
int cxgb4i_ofld_init(struct cxgbi_device *cdev)
{
int rc;
if (cxgb4i_max_connect > CXGB4I_MAX_CONN)
cxgb4i_max_connect = CXGB4I_MAX_CONN;
rc = cxgbi_device_portmap_create(cdev, cxgb4i_sport_base,
cxgb4i_max_connect);
if (rc < 0)
return rc;
cdev->csk_release_offload_resources = release_offload_resources;
cdev->csk_push_tx_frames = push_tx_frames;
cdev->csk_send_abort_req = send_abort_req;
cdev->csk_send_close_req = send_close_req;
cdev->csk_send_rx_credits = send_rx_credits;
cdev->csk_alloc_cpls = alloc_cpls;
cdev->csk_init_act_open = init_act_open;
pr_info("cdev 0x%p, offload up, added.\n", cdev);
return 0;
}
/*
* functions to program the pagepod in h/w
*/
#define ULPMEM_IDATA_MAX_NPPODS 4 /* 256/PPOD_SIZE */
static inline void ulp_mem_io_set_hdr(struct ulp_mem_io *req,
unsigned int wr_len, unsigned int dlen,
unsigned int pm_addr)
{
struct ulptx_idata *idata = (struct ulptx_idata *)(req + 1);
INIT_ULPTX_WR(req, wr_len, 0, 0);
req->cmd = htonl(ULPTX_CMD(ULP_TX_MEM_WRITE) | (1 << 23));
req->dlen = htonl(ULP_MEMIO_DATA_LEN(dlen >> 5));
req->lock_addr = htonl(ULP_MEMIO_ADDR(pm_addr >> 5));
req->len16 = htonl(DIV_ROUND_UP(wr_len - sizeof(req->wr), 16));
idata->cmd_more = htonl(ULPTX_CMD(ULP_TX_SC_IMM));
idata->len = htonl(dlen);
}
static int ddp_ppod_write_idata(struct cxgbi_device *cdev, unsigned int port_id,
struct cxgbi_pagepod_hdr *hdr, unsigned int idx,
unsigned int npods,
struct cxgbi_gather_list *gl,
unsigned int gl_pidx)
{
struct cxgbi_ddp_info *ddp = cdev->ddp;
struct sk_buff *skb;
struct ulp_mem_io *req;
struct ulptx_idata *idata;
struct cxgbi_pagepod *ppod;
unsigned int pm_addr = idx * PPOD_SIZE + ddp->llimit;
unsigned int dlen = PPOD_SIZE * npods;
unsigned int wr_len = roundup(sizeof(struct ulp_mem_io) +
sizeof(struct ulptx_idata) + dlen, 16);
unsigned int i;
skb = alloc_wr(wr_len, 0, GFP_ATOMIC);
if (!skb) {
pr_err("cdev 0x%p, idx %u, npods %u, OOM.\n",
cdev, idx, npods);
return -ENOMEM;
}
req = (struct ulp_mem_io *)skb->head;
set_queue(skb, CPL_PRIORITY_CONTROL, NULL);
ulp_mem_io_set_hdr(req, wr_len, dlen, pm_addr);
idata = (struct ulptx_idata *)(req + 1);
ppod = (struct cxgbi_pagepod *)(idata + 1);
for (i = 0; i < npods; i++, ppod++, gl_pidx += PPOD_PAGES_MAX) {
if (!hdr && !gl)
cxgbi_ddp_ppod_clear(ppod);
else
cxgbi_ddp_ppod_set(ppod, hdr, gl, gl_pidx);
}
cxgb4_ofld_send(cdev->ports[port_id], skb);
return 0;
}
static int ddp_set_map(struct cxgbi_sock *csk, struct cxgbi_pagepod_hdr *hdr,
unsigned int idx, unsigned int npods,
struct cxgbi_gather_list *gl)
{
unsigned int i, cnt;
int err = 0;
for (i = 0; i < npods; i += cnt, idx += cnt) {
cnt = npods - i;
if (cnt > ULPMEM_IDATA_MAX_NPPODS)
cnt = ULPMEM_IDATA_MAX_NPPODS;
err = ddp_ppod_write_idata(csk->cdev, csk->port_id, hdr,
idx, cnt, gl, 4 * i);
if (err < 0)
break;
}
return err;
}
static void ddp_clear_map(struct cxgbi_hba *chba, unsigned int tag,
unsigned int idx, unsigned int npods)
{
unsigned int i, cnt;
int err;
for (i = 0; i < npods; i += cnt, idx += cnt) {
cnt = npods - i;
if (cnt > ULPMEM_IDATA_MAX_NPPODS)
cnt = ULPMEM_IDATA_MAX_NPPODS;
err = ddp_ppod_write_idata(chba->cdev, chba->port_id, NULL,
idx, cnt, NULL, 0);
if (err < 0)
break;
}
}
static int ddp_setup_conn_pgidx(struct cxgbi_sock *csk, unsigned int tid,
int pg_idx, bool reply)
{
struct sk_buff *skb;
struct cpl_set_tcb_field *req;
if (!pg_idx || pg_idx >= DDP_PGIDX_MAX)
return 0;
skb = alloc_wr(sizeof(*req), 0, GFP_KERNEL);
if (!skb)
return -ENOMEM;
/* set up ulp page size */
req = (struct cpl_set_tcb_field *)skb->head;
INIT_TP_WR(req, csk->tid);
OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SET_TCB_FIELD, csk->tid));
req->reply_ctrl = htons(NO_REPLY(reply) | QUEUENO(csk->rss_qid));
req->word_cookie = htons(0);
req->mask = cpu_to_be64(0x3 << 8);
req->val = cpu_to_be64(pg_idx << 8);
set_wr_txq(skb, CPL_PRIORITY_CONTROL, csk->port_id);
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p, tid 0x%x, pg_idx %u.\n", csk, csk->tid, pg_idx);
cxgb4_ofld_send(csk->cdev->ports[csk->port_id], skb);
return 0;
}
static int ddp_setup_conn_digest(struct cxgbi_sock *csk, unsigned int tid,
int hcrc, int dcrc, int reply)
{
struct sk_buff *skb;
struct cpl_set_tcb_field *req;
if (!hcrc && !dcrc)
return 0;
skb = alloc_wr(sizeof(*req), 0, GFP_KERNEL);
if (!skb)
return -ENOMEM;
csk->hcrc_len = (hcrc ? 4 : 0);
csk->dcrc_len = (dcrc ? 4 : 0);
/* set up ulp submode */
req = (struct cpl_set_tcb_field *)skb->head;
INIT_TP_WR(req, tid);
OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SET_TCB_FIELD, tid));
req->reply_ctrl = htons(NO_REPLY(reply) | QUEUENO(csk->rss_qid));
req->word_cookie = htons(0);
req->mask = cpu_to_be64(0x3 << 4);
req->val = cpu_to_be64(((hcrc ? ULP_CRC_HEADER : 0) |
(dcrc ? ULP_CRC_DATA : 0)) << 4);
set_wr_txq(skb, CPL_PRIORITY_CONTROL, csk->port_id);
log_debug(1 << CXGBI_DBG_TOE | 1 << CXGBI_DBG_SOCK,
"csk 0x%p, tid 0x%x, crc %d,%d.\n", csk, csk->tid, hcrc, dcrc);
cxgb4_ofld_send(csk->cdev->ports[csk->port_id], skb);
return 0;
}
static int cxgb4i_ddp_init(struct cxgbi_device *cdev)
{
struct cxgb4_lld_info *lldi = cxgbi_cdev_priv(cdev);
struct cxgbi_ddp_info *ddp = cdev->ddp;
unsigned int tagmask, pgsz_factor[4];
int err;
if (ddp) {
kref_get(&ddp->refcnt);
pr_warn("cdev 0x%p, ddp 0x%p already set up.\n",
cdev, cdev->ddp);
return -EALREADY;
}
err = cxgbi_ddp_init(cdev, lldi->vr->iscsi.start,
lldi->vr->iscsi.start + lldi->vr->iscsi.size - 1,
lldi->iscsi_iolen, lldi->iscsi_iolen);
if (err < 0)
return err;
ddp = cdev->ddp;
tagmask = ddp->idx_mask << PPOD_IDX_SHIFT;
cxgbi_ddp_page_size_factor(pgsz_factor);
cxgb4_iscsi_init(lldi->ports[0], tagmask, pgsz_factor);
cdev->csk_ddp_setup_digest = ddp_setup_conn_digest;
cdev->csk_ddp_setup_pgidx = ddp_setup_conn_pgidx;
cdev->csk_ddp_set = ddp_set_map;
cdev->csk_ddp_clear = ddp_clear_map;
pr_info("cxgb4i 0x%p tag: sw %u, rsvd %u,%u, mask 0x%x.\n",
cdev, cdev->tag_format.sw_bits, cdev->tag_format.rsvd_bits,
cdev->tag_format.rsvd_shift, cdev->tag_format.rsvd_mask);
pr_info("cxgb4i 0x%p, nppods %u, bits %u, mask 0x%x,0x%x pkt %u/%u, "
" %u/%u.\n",
cdev, ddp->nppods, ddp->idx_bits, ddp->idx_mask,
ddp->rsvd_tag_mask, ddp->max_txsz, lldi->iscsi_iolen,
ddp->max_rxsz, lldi->iscsi_iolen);
pr_info("cxgb4i 0x%p max payload size: %u/%u, %u/%u.\n",
cdev, cdev->tx_max_size, ddp->max_txsz, cdev->rx_max_size,
ddp->max_rxsz);
return 0;
}
static void *t4_uld_add(const struct cxgb4_lld_info *lldi)
{
struct cxgbi_device *cdev;
struct port_info *pi;
int i, rc;
cdev = cxgbi_device_register(sizeof(*lldi), lldi->nports);
if (!cdev) {
pr_info("t4 device 0x%p, register failed.\n", lldi);
return NULL;
}
pr_info("0x%p,0x%x, ports %u,%s, chan %u, q %u,%u, wr %u.\n",
cdev, lldi->adapter_type, lldi->nports,
lldi->ports[0]->name, lldi->nchan, lldi->ntxq,
lldi->nrxq, lldi->wr_cred);
for (i = 0; i < lldi->nrxq; i++)
log_debug(1 << CXGBI_DBG_DEV,
"t4 0x%p, rxq id #%d: %u.\n",
cdev, i, lldi->rxq_ids[i]);
memcpy(cxgbi_cdev_priv(cdev), lldi, sizeof(*lldi));
cdev->flags = CXGBI_FLAG_DEV_T4;
cdev->pdev = lldi->pdev;
cdev->ports = lldi->ports;
cdev->nports = lldi->nports;
cdev->mtus = lldi->mtus;
cdev->nmtus = NMTUS;
cdev->snd_win = cxgb4i_snd_win;
cdev->rcv_win = cxgb4i_rcv_win;
cdev->rx_credit_thres = cxgb4i_rx_credit_thres;
cdev->skb_tx_rsvd = CXGB4I_TX_HEADER_LEN;
cdev->skb_rx_extra = sizeof(struct cpl_iscsi_hdr);
cdev->itp = &cxgb4i_iscsi_transport;
cdev->pfvf = FW_VIID_PFN_GET(cxgb4_port_viid(lldi->ports[0])) << 8;
pr_info("cdev 0x%p,%s, pfvf %u.\n",
cdev, lldi->ports[0]->name, cdev->pfvf);
rc = cxgb4i_ddp_init(cdev);
if (rc) {
pr_info("t4 0x%p ddp init failed.\n", cdev);
goto err_out;
}
rc = cxgb4i_ofld_init(cdev);
if (rc) {
pr_info("t4 0x%p ofld init failed.\n", cdev);
goto err_out;
}
rc = cxgbi_hbas_add(cdev, CXGB4I_MAX_LUN, CXGBI_MAX_CONN,
&cxgb4i_host_template, cxgb4i_stt);
if (rc)
goto err_out;
for (i = 0; i < cdev->nports; i++) {
pi = netdev_priv(lldi->ports[i]);
cdev->hbas[i]->port_id = pi->port_id;
}
return cdev;
err_out:
cxgbi_device_unregister(cdev);
return ERR_PTR(-ENOMEM);
}
#define RX_PULL_LEN 128
static int t4_uld_rx_handler(void *handle, const __be64 *rsp,
const struct pkt_gl *pgl)
{
const struct cpl_act_establish *rpl;
struct sk_buff *skb;
unsigned int opc;
struct cxgbi_device *cdev = handle;
if (pgl == NULL) {
unsigned int len = 64 - sizeof(struct rsp_ctrl) - 8;
skb = alloc_wr(len, 0, GFP_ATOMIC);
if (!skb)
goto nomem;
skb_copy_to_linear_data(skb, &rsp[1], len);
} else {
if (unlikely(*(u8 *)rsp != *(u8 *)pgl->va)) {
pr_info("? FL 0x%p,RSS%#llx,FL %#llx,len %u.\n",
pgl->va, be64_to_cpu(*rsp),
be64_to_cpu(*(u64 *)pgl->va),
pgl->tot_len);
return 0;
}
skb = cxgb4_pktgl_to_skb(pgl, RX_PULL_LEN, RX_PULL_LEN);
if (unlikely(!skb))
goto nomem;
}
rpl = (struct cpl_act_establish *)skb->data;
opc = rpl->ot.opcode;
log_debug(1 << CXGBI_DBG_TOE,
"cdev %p, opcode 0x%x(0x%x,0x%x), skb %p.\n",
cdev, opc, rpl->ot.opcode_tid, ntohl(rpl->ot.opcode_tid), skb);
if (cxgb4i_cplhandlers[opc])
cxgb4i_cplhandlers[opc](cdev, skb);
else {
pr_err("No handler for opcode 0x%x.\n", opc);
__kfree_skb(skb);
}
return 0;
nomem:
log_debug(1 << CXGBI_DBG_TOE, "OOM bailing out.\n");
return 1;
}
static int t4_uld_state_change(void *handle, enum cxgb4_state state)
{
struct cxgbi_device *cdev = handle;
switch (state) {
case CXGB4_STATE_UP:
pr_info("cdev 0x%p, UP.\n", cdev);
/* re-initialize */
break;
case CXGB4_STATE_START_RECOVERY:
pr_info("cdev 0x%p, RECOVERY.\n", cdev);
/* close all connections */
break;
case CXGB4_STATE_DOWN:
pr_info("cdev 0x%p, DOWN.\n", cdev);
break;
case CXGB4_STATE_DETACH:
pr_info("cdev 0x%p, DETACH.\n", cdev);
break;
default:
pr_info("cdev 0x%p, unknown state %d.\n", cdev, state);
break;
}
return 0;
}
static int __init cxgb4i_init_module(void)
{
int rc;
printk(KERN_INFO "%s", version);
rc = cxgbi_iscsi_init(&cxgb4i_iscsi_transport, &cxgb4i_stt);
if (rc < 0)
return rc;
cxgb4_register_uld(CXGB4_ULD_ISCSI, &cxgb4i_uld_info);
return 0;
}
static void __exit cxgb4i_exit_module(void)
{
cxgb4_unregister_uld(CXGB4_ULD_ISCSI);
cxgbi_device_unregister_all(CXGBI_FLAG_DEV_T4);
cxgbi_iscsi_cleanup(&cxgb4i_iscsi_transport, &cxgb4i_stt);
}
module_init(cxgb4i_init_module);
module_exit(cxgb4i_exit_module);
| gpl-2.0 |
grzmot22/android_kernel_htc_protou | drivers/media/video/gspca/m5602/m5602_core.c | 4950 | 10244 | /*
* USB Driver for ALi m5602 based webcams
*
* Copyright (C) 2008 Erik Andrén
* Copyright (C) 2007 Ilyes Gouta. Based on the m5603x Linux Driver Project.
* Copyright (C) 2005 m5603x Linux Driver Project <m5602@x3ng.com.br>
*
* Portions of code to USB interface and ALi driver software,
* Copyright (c) 2006 Willem Duinker
* v4l2 interface modeled after the V4L2 driver
* for SN9C10x PC Camera Controllers
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation, version 2.
*
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include "m5602_ov9650.h"
#include "m5602_ov7660.h"
#include "m5602_mt9m111.h"
#include "m5602_po1030.h"
#include "m5602_s5k83a.h"
#include "m5602_s5k4aa.h"
/* Kernel module parameters */
int force_sensor;
static bool dump_bridge;
bool dump_sensor;
static const struct usb_device_id m5602_table[] = {
{USB_DEVICE(0x0402, 0x5602)},
{}
};
MODULE_DEVICE_TABLE(usb, m5602_table);
/* Reads a byte from the m5602 */
int m5602_read_bridge(struct sd *sd, const u8 address, u8 *i2c_data)
{
int err;
struct usb_device *udev = sd->gspca_dev.dev;
__u8 *buf = sd->gspca_dev.usb_buf;
err = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
0x04, 0xc0, 0x14,
0x8100 + address, buf,
1, M5602_URB_MSG_TIMEOUT);
*i2c_data = buf[0];
PDEBUG(D_CONF, "Reading bridge register 0x%x containing 0x%x",
address, *i2c_data);
/* usb_control_msg(...) returns the number of bytes sent upon success,
mask that and return zero instead*/
return (err < 0) ? err : 0;
}
/* Writes a byte to the m5602 */
int m5602_write_bridge(struct sd *sd, const u8 address, const u8 i2c_data)
{
int err;
struct usb_device *udev = sd->gspca_dev.dev;
__u8 *buf = sd->gspca_dev.usb_buf;
PDEBUG(D_CONF, "Writing bridge register 0x%x with 0x%x",
address, i2c_data);
memcpy(buf, bridge_urb_skeleton,
sizeof(bridge_urb_skeleton));
buf[1] = address;
buf[3] = i2c_data;
err = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
0x04, 0x40, 0x19,
0x0000, buf,
4, M5602_URB_MSG_TIMEOUT);
/* usb_control_msg(...) returns the number of bytes sent upon success,
mask that and return zero instead */
return (err < 0) ? err : 0;
}
static int m5602_wait_for_i2c(struct sd *sd)
{
int err;
u8 data;
do {
err = m5602_read_bridge(sd, M5602_XB_I2C_STATUS, &data);
} while ((data & I2C_BUSY) && !err);
return err;
}
int m5602_read_sensor(struct sd *sd, const u8 address,
u8 *i2c_data, const u8 len)
{
int err, i;
if (!len || len > sd->sensor->i2c_regW)
return -EINVAL;
err = m5602_wait_for_i2c(sd);
if (err < 0)
return err;
err = m5602_write_bridge(sd, M5602_XB_I2C_DEV_ADDR,
sd->sensor->i2c_slave_id);
if (err < 0)
return err;
err = m5602_write_bridge(sd, M5602_XB_I2C_REG_ADDR, address);
if (err < 0)
return err;
/* Sensors with registers that are of only
one byte width are differently read */
/* FIXME: This works with the ov9650, but has issues with the po1030 */
if (sd->sensor->i2c_regW == 1) {
err = m5602_write_bridge(sd, M5602_XB_I2C_CTRL, 1);
if (err < 0)
return err;
err = m5602_write_bridge(sd, M5602_XB_I2C_CTRL, 0x08);
} else {
err = m5602_write_bridge(sd, M5602_XB_I2C_CTRL, 0x18 + len);
}
for (i = 0; (i < len) && !err; i++) {
err = m5602_wait_for_i2c(sd);
if (err < 0)
return err;
err = m5602_read_bridge(sd, M5602_XB_I2C_DATA, &(i2c_data[i]));
PDEBUG(D_CONF, "Reading sensor register "
"0x%x containing 0x%x ", address, *i2c_data);
}
return err;
}
int m5602_write_sensor(struct sd *sd, const u8 address,
u8 *i2c_data, const u8 len)
{
int err, i;
u8 *p;
struct usb_device *udev = sd->gspca_dev.dev;
__u8 *buf = sd->gspca_dev.usb_buf;
/* No sensor with a data width larger than 16 bits has yet been seen */
if (len > sd->sensor->i2c_regW || !len)
return -EINVAL;
memcpy(buf, sensor_urb_skeleton,
sizeof(sensor_urb_skeleton));
buf[11] = sd->sensor->i2c_slave_id;
buf[15] = address;
/* Special case larger sensor writes */
p = buf + 16;
/* Copy a four byte write sequence for each byte to be written to */
for (i = 0; i < len; i++) {
memcpy(p, sensor_urb_skeleton + 16, 4);
p[3] = i2c_data[i];
p += 4;
PDEBUG(D_CONF, "Writing sensor register 0x%x with 0x%x",
address, i2c_data[i]);
}
/* Copy the tailer */
memcpy(p, sensor_urb_skeleton + 20, 4);
/* Set the total length */
p[3] = 0x10 + len;
err = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
0x04, 0x40, 0x19,
0x0000, buf,
20 + len * 4, M5602_URB_MSG_TIMEOUT);
return (err < 0) ? err : 0;
}
/* Dump all the registers of the m5602 bridge,
unfortunately this breaks the camera until it's power cycled */
static void m5602_dump_bridge(struct sd *sd)
{
int i;
for (i = 0; i < 0x80; i++) {
unsigned char val = 0;
m5602_read_bridge(sd, i, &val);
pr_info("ALi m5602 address 0x%x contains 0x%x\n", i, val);
}
pr_info("Warning: The ALi m5602 webcam probably won't work until it's power cycled\n");
}
static int m5602_probe_sensor(struct sd *sd)
{
/* Try the po1030 */
sd->sensor = &po1030;
if (!sd->sensor->probe(sd))
return 0;
/* Try the mt9m111 sensor */
sd->sensor = &mt9m111;
if (!sd->sensor->probe(sd))
return 0;
/* Try the s5k4aa */
sd->sensor = &s5k4aa;
if (!sd->sensor->probe(sd))
return 0;
/* Try the ov9650 */
sd->sensor = &ov9650;
if (!sd->sensor->probe(sd))
return 0;
/* Try the ov7660 */
sd->sensor = &ov7660;
if (!sd->sensor->probe(sd))
return 0;
/* Try the s5k83a */
sd->sensor = &s5k83a;
if (!sd->sensor->probe(sd))
return 0;
/* More sensor probe function goes here */
pr_info("Failed to find a sensor\n");
sd->sensor = NULL;
return -ENODEV;
}
static int m5602_configure(struct gspca_dev *gspca_dev,
const struct usb_device_id *id);
static int m5602_init(struct gspca_dev *gspca_dev)
{
struct sd *sd = (struct sd *) gspca_dev;
int err;
PDEBUG(D_CONF, "Initializing ALi m5602 webcam");
/* Run the init sequence */
err = sd->sensor->init(sd);
return err;
}
static int m5602_start_transfer(struct gspca_dev *gspca_dev)
{
struct sd *sd = (struct sd *) gspca_dev;
__u8 *buf = sd->gspca_dev.usb_buf;
int err;
/* Send start command to the camera */
const u8 buffer[4] = {0x13, 0xf9, 0x0f, 0x01};
if (sd->sensor->start)
sd->sensor->start(sd);
memcpy(buf, buffer, sizeof(buffer));
err = usb_control_msg(gspca_dev->dev,
usb_sndctrlpipe(gspca_dev->dev, 0),
0x04, 0x40, 0x19, 0x0000, buf,
sizeof(buffer), M5602_URB_MSG_TIMEOUT);
PDEBUG(D_STREAM, "Transfer started");
return (err < 0) ? err : 0;
}
static void m5602_urb_complete(struct gspca_dev *gspca_dev,
u8 *data, int len)
{
struct sd *sd = (struct sd *) gspca_dev;
if (len < 6) {
PDEBUG(D_PACK, "Packet is less than 6 bytes");
return;
}
/* Frame delimiter: ff xx xx xx ff ff */
if (data[0] == 0xff && data[4] == 0xff && data[5] == 0xff &&
data[2] != sd->frame_id) {
PDEBUG(D_FRAM, "Frame delimiter detected");
sd->frame_id = data[2];
/* Remove the extra fluff appended on each header */
data += 6;
len -= 6;
/* Complete the last frame (if any) */
gspca_frame_add(gspca_dev, LAST_PACKET,
NULL, 0);
sd->frame_count++;
/* Create a new frame */
gspca_frame_add(gspca_dev, FIRST_PACKET, data, len);
PDEBUG(D_FRAM, "Starting new frame %d",
sd->frame_count);
} else {
int cur_frame_len;
cur_frame_len = gspca_dev->image_len;
/* Remove urb header */
data += 4;
len -= 4;
if (cur_frame_len + len <= gspca_dev->frsz) {
PDEBUG(D_FRAM, "Continuing frame %d copying %d bytes",
sd->frame_count, len);
gspca_frame_add(gspca_dev, INTER_PACKET,
data, len);
} else {
/* Add the remaining data up to frame size */
gspca_frame_add(gspca_dev, INTER_PACKET, data,
gspca_dev->frsz - cur_frame_len);
}
}
}
static void m5602_stop_transfer(struct gspca_dev *gspca_dev)
{
struct sd *sd = (struct sd *) gspca_dev;
/* Run the sensor specific end transfer sequence */
if (sd->sensor->stop)
sd->sensor->stop(sd);
}
/* sub-driver description, the ctrl and nctrl is filled at probe time */
static struct sd_desc sd_desc = {
.name = MODULE_NAME,
.config = m5602_configure,
.init = m5602_init,
.start = m5602_start_transfer,
.stopN = m5602_stop_transfer,
.pkt_scan = m5602_urb_complete
};
/* this function is called at probe time */
static int m5602_configure(struct gspca_dev *gspca_dev,
const struct usb_device_id *id)
{
struct sd *sd = (struct sd *) gspca_dev;
struct cam *cam;
int err;
cam = &gspca_dev->cam;
sd->desc = &sd_desc;
if (dump_bridge)
m5602_dump_bridge(sd);
/* Probe sensor */
err = m5602_probe_sensor(sd);
if (err)
goto fail;
return 0;
fail:
PDEBUG(D_ERR, "ALi m5602 webcam failed");
cam->cam_mode = NULL;
cam->nmodes = 0;
return err;
}
static int m5602_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
THIS_MODULE);
}
static void m5602_disconnect(struct usb_interface *intf)
{
struct gspca_dev *gspca_dev = usb_get_intfdata(intf);
struct sd *sd = (struct sd *) gspca_dev;
if (sd->sensor->disconnect)
sd->sensor->disconnect(sd);
gspca_disconnect(intf);
}
static struct usb_driver sd_driver = {
.name = MODULE_NAME,
.id_table = m5602_table,
.probe = m5602_probe,
#ifdef CONFIG_PM
.suspend = gspca_suspend,
.resume = gspca_resume,
#endif
.disconnect = m5602_disconnect
};
module_usb_driver(sd_driver);
MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL");
module_param(force_sensor, int, S_IRUGO | S_IWUSR);
MODULE_PARM_DESC(force_sensor,
"forces detection of a sensor, "
"1 = OV9650, 2 = S5K83A, 3 = S5K4AA, "
"4 = MT9M111, 5 = PO1030, 6 = OV7660");
module_param(dump_bridge, bool, S_IRUGO | S_IWUSR);
MODULE_PARM_DESC(dump_bridge, "Dumps all usb bridge registers at startup");
module_param(dump_sensor, bool, S_IRUGO | S_IWUSR);
MODULE_PARM_DESC(dump_sensor, "Dumps all usb sensor registers "
"at startup providing a sensor is found");
| gpl-2.0 |
LiquidSmokeX64/android_kernel_oneplus_msm8974-UR3.6 | drivers/s390/char/vmur.c | 4950 | 24761 | /*
* Linux driver for System z and s390 unit record devices
* (z/VM virtual punch, reader, printer)
*
* Copyright IBM Corp. 2001, 2009
* Authors: Malcolm Beattie <beattiem@uk.ibm.com>
* Michael Holzheu <holzheu@de.ibm.com>
* Frank Munzert <munzert@de.ibm.com>
*/
#define KMSG_COMPONENT "vmur"
#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
#include <linux/cdev.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <asm/uaccess.h>
#include <asm/cio.h>
#include <asm/ccwdev.h>
#include <asm/debug.h>
#include <asm/diag.h>
#include "vmur.h"
/*
* Driver overview
*
* Unit record device support is implemented as a character device driver.
* We can fit at least 16 bits into a device minor number and use the
* simple method of mapping a character device number with minor abcd
* to the unit record device with devno abcd.
* I/O to virtual unit record devices is handled as follows:
* Reads: Diagnose code 0x14 (input spool file manipulation)
* is used to read spool data page-wise.
* Writes: The CCW used is WRITE_CCW_CMD (0x01). The device's record length
* is available by reading sysfs attr reclen. Each write() to the device
* must specify an integral multiple (maximal 511) of reclen.
*/
static char ur_banner[] = "z/VM virtual unit record device driver";
MODULE_AUTHOR("IBM Corporation");
MODULE_DESCRIPTION("s390 z/VM virtual unit record device driver");
MODULE_LICENSE("GPL");
static dev_t ur_first_dev_maj_min;
static struct class *vmur_class;
static struct debug_info *vmur_dbf;
/* We put the device's record length (for writes) in the driver_info field */
static struct ccw_device_id ur_ids[] = {
{ CCWDEV_CU_DI(READER_PUNCH_DEVTYPE, 80) },
{ CCWDEV_CU_DI(PRINTER_DEVTYPE, 132) },
{ /* end of list */ }
};
MODULE_DEVICE_TABLE(ccw, ur_ids);
static int ur_probe(struct ccw_device *cdev);
static void ur_remove(struct ccw_device *cdev);
static int ur_set_online(struct ccw_device *cdev);
static int ur_set_offline(struct ccw_device *cdev);
static int ur_pm_suspend(struct ccw_device *cdev);
static struct ccw_driver ur_driver = {
.driver = {
.name = "vmur",
.owner = THIS_MODULE,
},
.ids = ur_ids,
.probe = ur_probe,
.remove = ur_remove,
.set_online = ur_set_online,
.set_offline = ur_set_offline,
.freeze = ur_pm_suspend,
.int_class = IOINT_VMR,
};
static DEFINE_MUTEX(vmur_mutex);
/*
* Allocation, freeing, getting and putting of urdev structures
*
* Each ur device (urd) contains a reference to its corresponding ccw device
* (cdev) using the urd->cdev pointer. Each ccw device has a reference to the
* ur device using dev_get_drvdata(&cdev->dev) pointer.
*
* urd references:
* - ur_probe gets a urd reference, ur_remove drops the reference
* dev_get_drvdata(&cdev->dev)
* - ur_open gets a urd reference, ur_relase drops the reference
* (urf->urd)
*
* cdev references:
* - urdev_alloc get a cdev reference (urd->cdev)
* - urdev_free drops the cdev reference (urd->cdev)
*
* Setting and clearing of dev_get_drvdata(&cdev->dev) is protected by the ccwdev lock
*/
static struct urdev *urdev_alloc(struct ccw_device *cdev)
{
struct urdev *urd;
urd = kzalloc(sizeof(struct urdev), GFP_KERNEL);
if (!urd)
return NULL;
urd->reclen = cdev->id.driver_info;
ccw_device_get_id(cdev, &urd->dev_id);
mutex_init(&urd->io_mutex);
init_waitqueue_head(&urd->wait);
spin_lock_init(&urd->open_lock);
atomic_set(&urd->ref_count, 1);
urd->cdev = cdev;
get_device(&cdev->dev);
return urd;
}
static void urdev_free(struct urdev *urd)
{
TRACE("urdev_free: %p\n", urd);
if (urd->cdev)
put_device(&urd->cdev->dev);
kfree(urd);
}
static void urdev_get(struct urdev *urd)
{
atomic_inc(&urd->ref_count);
}
static struct urdev *urdev_get_from_cdev(struct ccw_device *cdev)
{
struct urdev *urd;
unsigned long flags;
spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
urd = dev_get_drvdata(&cdev->dev);
if (urd)
urdev_get(urd);
spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
return urd;
}
static struct urdev *urdev_get_from_devno(u16 devno)
{
char bus_id[16];
struct ccw_device *cdev;
struct urdev *urd;
sprintf(bus_id, "0.0.%04x", devno);
cdev = get_ccwdev_by_busid(&ur_driver, bus_id);
if (!cdev)
return NULL;
urd = urdev_get_from_cdev(cdev);
put_device(&cdev->dev);
return urd;
}
static void urdev_put(struct urdev *urd)
{
if (atomic_dec_and_test(&urd->ref_count))
urdev_free(urd);
}
/*
* State and contents of ur devices can be changed by class D users issuing
* CP commands such as PURGE or TRANSFER, while the Linux guest is suspended.
* Also the Linux guest might be logged off, which causes all active spool
* files to be closed.
* So we cannot guarantee that spool files are still the same when the Linux
* guest is resumed. In order to avoid unpredictable results at resume time
* we simply refuse to suspend if a ur device node is open.
*/
static int ur_pm_suspend(struct ccw_device *cdev)
{
struct urdev *urd = dev_get_drvdata(&cdev->dev);
TRACE("ur_pm_suspend: cdev=%p\n", cdev);
if (urd->open_flag) {
pr_err("Unit record device %s is busy, %s refusing to "
"suspend.\n", dev_name(&cdev->dev), ur_banner);
return -EBUSY;
}
return 0;
}
/*
* Low-level functions to do I/O to a ur device.
* alloc_chan_prog
* free_chan_prog
* do_ur_io
* ur_int_handler
*
* alloc_chan_prog allocates and builds the channel program
* free_chan_prog frees memory of the channel program
*
* do_ur_io issues the channel program to the device and blocks waiting
* on a completion event it publishes at urd->io_done. The function
* serialises itself on the device's mutex so that only one I/O
* is issued at a time (and that I/O is synchronous).
*
* ur_int_handler catches the "I/O done" interrupt, writes the
* subchannel status word into the scsw member of the urdev structure
* and complete()s the io_done to wake the waiting do_ur_io.
*
* The caller of do_ur_io is responsible for kfree()ing the channel program
* address pointer that alloc_chan_prog returned.
*/
static void free_chan_prog(struct ccw1 *cpa)
{
struct ccw1 *ptr = cpa;
while (ptr->cda) {
kfree((void *)(addr_t) ptr->cda);
ptr++;
}
kfree(cpa);
}
/*
* alloc_chan_prog
* The channel program we use is write commands chained together
* with a final NOP CCW command-chained on (which ensures that CE and DE
* are presented together in a single interrupt instead of as separate
* interrupts unless an incorrect length indication kicks in first). The
* data length in each CCW is reclen.
*/
static struct ccw1 *alloc_chan_prog(const char __user *ubuf, int rec_count,
int reclen)
{
struct ccw1 *cpa;
void *kbuf;
int i;
TRACE("alloc_chan_prog(%p, %i, %i)\n", ubuf, rec_count, reclen);
/*
* We chain a NOP onto the writes to force CE+DE together.
* That means we allocate room for CCWs to cover count/reclen
* records plus a NOP.
*/
cpa = kzalloc((rec_count + 1) * sizeof(struct ccw1),
GFP_KERNEL | GFP_DMA);
if (!cpa)
return ERR_PTR(-ENOMEM);
for (i = 0; i < rec_count; i++) {
cpa[i].cmd_code = WRITE_CCW_CMD;
cpa[i].flags = CCW_FLAG_CC | CCW_FLAG_SLI;
cpa[i].count = reclen;
kbuf = kmalloc(reclen, GFP_KERNEL | GFP_DMA);
if (!kbuf) {
free_chan_prog(cpa);
return ERR_PTR(-ENOMEM);
}
cpa[i].cda = (u32)(addr_t) kbuf;
if (copy_from_user(kbuf, ubuf, reclen)) {
free_chan_prog(cpa);
return ERR_PTR(-EFAULT);
}
ubuf += reclen;
}
/* The following NOP CCW forces CE+DE to be presented together */
cpa[i].cmd_code = CCW_CMD_NOOP;
return cpa;
}
static int do_ur_io(struct urdev *urd, struct ccw1 *cpa)
{
int rc;
struct ccw_device *cdev = urd->cdev;
DECLARE_COMPLETION_ONSTACK(event);
TRACE("do_ur_io: cpa=%p\n", cpa);
rc = mutex_lock_interruptible(&urd->io_mutex);
if (rc)
return rc;
urd->io_done = &event;
spin_lock_irq(get_ccwdev_lock(cdev));
rc = ccw_device_start(cdev, cpa, 1, 0, 0);
spin_unlock_irq(get_ccwdev_lock(cdev));
TRACE("do_ur_io: ccw_device_start returned %d\n", rc);
if (rc)
goto out;
wait_for_completion(&event);
TRACE("do_ur_io: I/O complete\n");
rc = 0;
out:
mutex_unlock(&urd->io_mutex);
return rc;
}
/*
* ur interrupt handler, called from the ccw_device layer
*/
static void ur_int_handler(struct ccw_device *cdev, unsigned long intparm,
struct irb *irb)
{
struct urdev *urd;
TRACE("ur_int_handler: intparm=0x%lx cstat=%02x dstat=%02x res=%u\n",
intparm, irb->scsw.cmd.cstat, irb->scsw.cmd.dstat,
irb->scsw.cmd.count);
if (!intparm) {
TRACE("ur_int_handler: unsolicited interrupt\n");
return;
}
urd = dev_get_drvdata(&cdev->dev);
BUG_ON(!urd);
/* On special conditions irb is an error pointer */
if (IS_ERR(irb))
urd->io_request_rc = PTR_ERR(irb);
else if (irb->scsw.cmd.dstat == (DEV_STAT_CHN_END | DEV_STAT_DEV_END))
urd->io_request_rc = 0;
else
urd->io_request_rc = -EIO;
complete(urd->io_done);
}
/*
* reclen sysfs attribute - The record length to be used for write CCWs
*/
static ssize_t ur_attr_reclen_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct urdev *urd;
int rc;
urd = urdev_get_from_cdev(to_ccwdev(dev));
if (!urd)
return -ENODEV;
rc = sprintf(buf, "%zu\n", urd->reclen);
urdev_put(urd);
return rc;
}
static DEVICE_ATTR(reclen, 0444, ur_attr_reclen_show, NULL);
static int ur_create_attributes(struct device *dev)
{
return device_create_file(dev, &dev_attr_reclen);
}
static void ur_remove_attributes(struct device *dev)
{
device_remove_file(dev, &dev_attr_reclen);
}
/*
* diagnose code 0x210 - retrieve device information
* cc=0 normal completion, we have a real device
* cc=1 CP paging error
* cc=2 The virtual device exists, but is not associated with a real device
* cc=3 Invalid device address, or the virtual device does not exist
*/
static int get_urd_class(struct urdev *urd)
{
static struct diag210 ur_diag210;
int cc;
ur_diag210.vrdcdvno = urd->dev_id.devno;
ur_diag210.vrdclen = sizeof(struct diag210);
cc = diag210(&ur_diag210);
switch (cc) {
case 0:
return -EOPNOTSUPP;
case 2:
return ur_diag210.vrdcvcla; /* virtual device class */
case 3:
return -ENODEV;
default:
return -EIO;
}
}
/*
* Allocation and freeing of urfile structures
*/
static struct urfile *urfile_alloc(struct urdev *urd)
{
struct urfile *urf;
urf = kzalloc(sizeof(struct urfile), GFP_KERNEL);
if (!urf)
return NULL;
urf->urd = urd;
TRACE("urfile_alloc: urd=%p urf=%p rl=%zu\n", urd, urf,
urf->dev_reclen);
return urf;
}
static void urfile_free(struct urfile *urf)
{
TRACE("urfile_free: urf=%p urd=%p\n", urf, urf->urd);
kfree(urf);
}
/*
* The fops implementation of the character device driver
*/
static ssize_t do_write(struct urdev *urd, const char __user *udata,
size_t count, size_t reclen, loff_t *ppos)
{
struct ccw1 *cpa;
int rc;
cpa = alloc_chan_prog(udata, count / reclen, reclen);
if (IS_ERR(cpa))
return PTR_ERR(cpa);
rc = do_ur_io(urd, cpa);
if (rc)
goto fail_kfree_cpa;
if (urd->io_request_rc) {
rc = urd->io_request_rc;
goto fail_kfree_cpa;
}
*ppos += count;
rc = count;
fail_kfree_cpa:
free_chan_prog(cpa);
return rc;
}
static ssize_t ur_write(struct file *file, const char __user *udata,
size_t count, loff_t *ppos)
{
struct urfile *urf = file->private_data;
TRACE("ur_write: count=%zu\n", count);
if (count == 0)
return 0;
if (count % urf->dev_reclen)
return -EINVAL; /* count must be a multiple of reclen */
if (count > urf->dev_reclen * MAX_RECS_PER_IO)
count = urf->dev_reclen * MAX_RECS_PER_IO;
return do_write(urf->urd, udata, count, urf->dev_reclen, ppos);
}
/*
* diagnose code 0x14 subcode 0x0028 - position spool file to designated
* record
* cc=0 normal completion
* cc=2 no file active on the virtual reader or device not ready
* cc=3 record specified is beyond EOF
*/
static int diag_position_to_record(int devno, int record)
{
int cc;
cc = diag14(record, devno, 0x28);
switch (cc) {
case 0:
return 0;
case 2:
return -ENOMEDIUM;
case 3:
return -ENODATA; /* position beyond end of file */
default:
return -EIO;
}
}
/*
* diagnose code 0x14 subcode 0x0000 - read next spool file buffer
* cc=0 normal completion
* cc=1 EOF reached
* cc=2 no file active on the virtual reader, and no file eligible
* cc=3 file already active on the virtual reader or specified virtual
* reader does not exist or is not a reader
*/
static int diag_read_file(int devno, char *buf)
{
int cc;
cc = diag14((unsigned long) buf, devno, 0x00);
switch (cc) {
case 0:
return 0;
case 1:
return -ENODATA;
case 2:
return -ENOMEDIUM;
default:
return -EIO;
}
}
static ssize_t diag14_read(struct file *file, char __user *ubuf, size_t count,
loff_t *offs)
{
size_t len, copied, res;
char *buf;
int rc;
u16 reclen;
struct urdev *urd;
urd = ((struct urfile *) file->private_data)->urd;
reclen = ((struct urfile *) file->private_data)->file_reclen;
rc = diag_position_to_record(urd->dev_id.devno, *offs / PAGE_SIZE + 1);
if (rc == -ENODATA)
return 0;
if (rc)
return rc;
len = min((size_t) PAGE_SIZE, count);
buf = (char *) __get_free_page(GFP_KERNEL | GFP_DMA);
if (!buf)
return -ENOMEM;
copied = 0;
res = (size_t) (*offs % PAGE_SIZE);
do {
rc = diag_read_file(urd->dev_id.devno, buf);
if (rc == -ENODATA) {
break;
}
if (rc)
goto fail;
if (reclen && (copied == 0) && (*offs < PAGE_SIZE))
*((u16 *) &buf[FILE_RECLEN_OFFSET]) = reclen;
len = min(count - copied, PAGE_SIZE - res);
if (copy_to_user(ubuf + copied, buf + res, len)) {
rc = -EFAULT;
goto fail;
}
res = 0;
copied += len;
} while (copied != count);
*offs += copied;
rc = copied;
fail:
free_page((unsigned long) buf);
return rc;
}
static ssize_t ur_read(struct file *file, char __user *ubuf, size_t count,
loff_t *offs)
{
struct urdev *urd;
int rc;
TRACE("ur_read: count=%zu ppos=%li\n", count, (unsigned long) *offs);
if (count == 0)
return 0;
urd = ((struct urfile *) file->private_data)->urd;
rc = mutex_lock_interruptible(&urd->io_mutex);
if (rc)
return rc;
rc = diag14_read(file, ubuf, count, offs);
mutex_unlock(&urd->io_mutex);
return rc;
}
/*
* diagnose code 0x14 subcode 0x0fff - retrieve next file descriptor
* cc=0 normal completion
* cc=1 no files on reader queue or no subsequent file
* cc=2 spid specified is invalid
*/
static int diag_read_next_file_info(struct file_control_block *buf, int spid)
{
int cc;
cc = diag14((unsigned long) buf, spid, 0xfff);
switch (cc) {
case 0:
return 0;
default:
return -ENODATA;
}
}
static int verify_uri_device(struct urdev *urd)
{
struct file_control_block *fcb;
char *buf;
int rc;
fcb = kmalloc(sizeof(*fcb), GFP_KERNEL | GFP_DMA);
if (!fcb)
return -ENOMEM;
/* check for empty reader device (beginning of chain) */
rc = diag_read_next_file_info(fcb, 0);
if (rc)
goto fail_free_fcb;
/* if file is in hold status, we do not read it */
if (fcb->file_stat & (FLG_SYSTEM_HOLD | FLG_USER_HOLD)) {
rc = -EPERM;
goto fail_free_fcb;
}
/* open file on virtual reader */
buf = (char *) __get_free_page(GFP_KERNEL | GFP_DMA);
if (!buf) {
rc = -ENOMEM;
goto fail_free_fcb;
}
rc = diag_read_file(urd->dev_id.devno, buf);
if ((rc != 0) && (rc != -ENODATA)) /* EOF does not hurt */
goto fail_free_buf;
/* check if the file on top of the queue is open now */
rc = diag_read_next_file_info(fcb, 0);
if (rc)
goto fail_free_buf;
if (!(fcb->file_stat & FLG_IN_USE)) {
rc = -EMFILE;
goto fail_free_buf;
}
rc = 0;
fail_free_buf:
free_page((unsigned long) buf);
fail_free_fcb:
kfree(fcb);
return rc;
}
static int verify_device(struct urdev *urd)
{
switch (urd->class) {
case DEV_CLASS_UR_O:
return 0; /* no check needed here */
case DEV_CLASS_UR_I:
return verify_uri_device(urd);
default:
return -EOPNOTSUPP;
}
}
static int get_uri_file_reclen(struct urdev *urd)
{
struct file_control_block *fcb;
int rc;
fcb = kmalloc(sizeof(*fcb), GFP_KERNEL | GFP_DMA);
if (!fcb)
return -ENOMEM;
rc = diag_read_next_file_info(fcb, 0);
if (rc)
goto fail_free;
if (fcb->file_stat & FLG_CP_DUMP)
rc = 0;
else
rc = fcb->rec_len;
fail_free:
kfree(fcb);
return rc;
}
static int get_file_reclen(struct urdev *urd)
{
switch (urd->class) {
case DEV_CLASS_UR_O:
return 0;
case DEV_CLASS_UR_I:
return get_uri_file_reclen(urd);
default:
return -EOPNOTSUPP;
}
}
static int ur_open(struct inode *inode, struct file *file)
{
u16 devno;
struct urdev *urd;
struct urfile *urf;
unsigned short accmode;
int rc;
accmode = file->f_flags & O_ACCMODE;
if (accmode == O_RDWR)
return -EACCES;
/*
* We treat the minor number as the devno of the ur device
* to find in the driver tree.
*/
devno = MINOR(file->f_dentry->d_inode->i_rdev);
urd = urdev_get_from_devno(devno);
if (!urd) {
rc = -ENXIO;
goto out;
}
spin_lock(&urd->open_lock);
while (urd->open_flag) {
spin_unlock(&urd->open_lock);
if (file->f_flags & O_NONBLOCK) {
rc = -EBUSY;
goto fail_put;
}
if (wait_event_interruptible(urd->wait, urd->open_flag == 0)) {
rc = -ERESTARTSYS;
goto fail_put;
}
spin_lock(&urd->open_lock);
}
urd->open_flag++;
spin_unlock(&urd->open_lock);
TRACE("ur_open\n");
if (((accmode == O_RDONLY) && (urd->class != DEV_CLASS_UR_I)) ||
((accmode == O_WRONLY) && (urd->class != DEV_CLASS_UR_O))) {
TRACE("ur_open: unsupported dev class (%d)\n", urd->class);
rc = -EACCES;
goto fail_unlock;
}
rc = verify_device(urd);
if (rc)
goto fail_unlock;
urf = urfile_alloc(urd);
if (!urf) {
rc = -ENOMEM;
goto fail_unlock;
}
urf->dev_reclen = urd->reclen;
rc = get_file_reclen(urd);
if (rc < 0)
goto fail_urfile_free;
urf->file_reclen = rc;
file->private_data = urf;
return 0;
fail_urfile_free:
urfile_free(urf);
fail_unlock:
spin_lock(&urd->open_lock);
urd->open_flag--;
spin_unlock(&urd->open_lock);
fail_put:
urdev_put(urd);
out:
return rc;
}
static int ur_release(struct inode *inode, struct file *file)
{
struct urfile *urf = file->private_data;
TRACE("ur_release\n");
spin_lock(&urf->urd->open_lock);
urf->urd->open_flag--;
spin_unlock(&urf->urd->open_lock);
wake_up_interruptible(&urf->urd->wait);
urdev_put(urf->urd);
urfile_free(urf);
return 0;
}
static loff_t ur_llseek(struct file *file, loff_t offset, int whence)
{
loff_t newpos;
if ((file->f_flags & O_ACCMODE) != O_RDONLY)
return -ESPIPE; /* seek allowed only for reader */
if (offset % PAGE_SIZE)
return -ESPIPE; /* only multiples of 4K allowed */
switch (whence) {
case 0: /* SEEK_SET */
newpos = offset;
break;
case 1: /* SEEK_CUR */
newpos = file->f_pos + offset;
break;
default:
return -EINVAL;
}
file->f_pos = newpos;
return newpos;
}
static const struct file_operations ur_fops = {
.owner = THIS_MODULE,
.open = ur_open,
.release = ur_release,
.read = ur_read,
.write = ur_write,
.llseek = ur_llseek,
};
/*
* ccw_device infrastructure:
* ur_probe creates the struct urdev (with refcount = 1), the device
* attributes, sets up the interrupt handler and validates the virtual
* unit record device.
* ur_remove removes the device attributes and drops the reference to
* struct urdev.
*
* ur_probe, ur_remove, ur_set_online and ur_set_offline are serialized
* by the vmur_mutex lock.
*
* urd->char_device is used as indication that the online function has
* been completed successfully.
*/
static int ur_probe(struct ccw_device *cdev)
{
struct urdev *urd;
int rc;
TRACE("ur_probe: cdev=%p\n", cdev);
mutex_lock(&vmur_mutex);
urd = urdev_alloc(cdev);
if (!urd) {
rc = -ENOMEM;
goto fail_unlock;
}
rc = ur_create_attributes(&cdev->dev);
if (rc) {
rc = -ENOMEM;
goto fail_urdev_put;
}
cdev->handler = ur_int_handler;
/* validate virtual unit record device */
urd->class = get_urd_class(urd);
if (urd->class < 0) {
rc = urd->class;
goto fail_remove_attr;
}
if ((urd->class != DEV_CLASS_UR_I) && (urd->class != DEV_CLASS_UR_O)) {
rc = -EOPNOTSUPP;
goto fail_remove_attr;
}
spin_lock_irq(get_ccwdev_lock(cdev));
dev_set_drvdata(&cdev->dev, urd);
spin_unlock_irq(get_ccwdev_lock(cdev));
mutex_unlock(&vmur_mutex);
return 0;
fail_remove_attr:
ur_remove_attributes(&cdev->dev);
fail_urdev_put:
urdev_put(urd);
fail_unlock:
mutex_unlock(&vmur_mutex);
return rc;
}
static int ur_set_online(struct ccw_device *cdev)
{
struct urdev *urd;
int minor, major, rc;
char node_id[16];
TRACE("ur_set_online: cdev=%p\n", cdev);
mutex_lock(&vmur_mutex);
urd = urdev_get_from_cdev(cdev);
if (!urd) {
/* ur_remove already deleted our urd */
rc = -ENODEV;
goto fail_unlock;
}
if (urd->char_device) {
/* Another ur_set_online was faster */
rc = -EBUSY;
goto fail_urdev_put;
}
minor = urd->dev_id.devno;
major = MAJOR(ur_first_dev_maj_min);
urd->char_device = cdev_alloc();
if (!urd->char_device) {
rc = -ENOMEM;
goto fail_urdev_put;
}
urd->char_device->ops = &ur_fops;
urd->char_device->dev = MKDEV(major, minor);
urd->char_device->owner = ur_fops.owner;
rc = cdev_add(urd->char_device, urd->char_device->dev, 1);
if (rc)
goto fail_free_cdev;
if (urd->cdev->id.cu_type == READER_PUNCH_DEVTYPE) {
if (urd->class == DEV_CLASS_UR_I)
sprintf(node_id, "vmrdr-%s", dev_name(&cdev->dev));
if (urd->class == DEV_CLASS_UR_O)
sprintf(node_id, "vmpun-%s", dev_name(&cdev->dev));
} else if (urd->cdev->id.cu_type == PRINTER_DEVTYPE) {
sprintf(node_id, "vmprt-%s", dev_name(&cdev->dev));
} else {
rc = -EOPNOTSUPP;
goto fail_free_cdev;
}
urd->device = device_create(vmur_class, NULL, urd->char_device->dev,
NULL, "%s", node_id);
if (IS_ERR(urd->device)) {
rc = PTR_ERR(urd->device);
TRACE("ur_set_online: device_create rc=%d\n", rc);
goto fail_free_cdev;
}
urdev_put(urd);
mutex_unlock(&vmur_mutex);
return 0;
fail_free_cdev:
cdev_del(urd->char_device);
urd->char_device = NULL;
fail_urdev_put:
urdev_put(urd);
fail_unlock:
mutex_unlock(&vmur_mutex);
return rc;
}
static int ur_set_offline_force(struct ccw_device *cdev, int force)
{
struct urdev *urd;
int rc;
TRACE("ur_set_offline: cdev=%p\n", cdev);
urd = urdev_get_from_cdev(cdev);
if (!urd)
/* ur_remove already deleted our urd */
return -ENODEV;
if (!urd->char_device) {
/* Another ur_set_offline was faster */
rc = -EBUSY;
goto fail_urdev_put;
}
if (!force && (atomic_read(&urd->ref_count) > 2)) {
/* There is still a user of urd (e.g. ur_open) */
TRACE("ur_set_offline: BUSY\n");
rc = -EBUSY;
goto fail_urdev_put;
}
device_destroy(vmur_class, urd->char_device->dev);
cdev_del(urd->char_device);
urd->char_device = NULL;
rc = 0;
fail_urdev_put:
urdev_put(urd);
return rc;
}
static int ur_set_offline(struct ccw_device *cdev)
{
int rc;
mutex_lock(&vmur_mutex);
rc = ur_set_offline_force(cdev, 0);
mutex_unlock(&vmur_mutex);
return rc;
}
static void ur_remove(struct ccw_device *cdev)
{
unsigned long flags;
TRACE("ur_remove\n");
mutex_lock(&vmur_mutex);
if (cdev->online)
ur_set_offline_force(cdev, 1);
ur_remove_attributes(&cdev->dev);
spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
urdev_put(dev_get_drvdata(&cdev->dev));
dev_set_drvdata(&cdev->dev, NULL);
spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
mutex_unlock(&vmur_mutex);
}
/*
* Module initialisation and cleanup
*/
static int __init ur_init(void)
{
int rc;
dev_t dev;
if (!MACHINE_IS_VM) {
pr_err("The %s cannot be loaded without z/VM\n",
ur_banner);
return -ENODEV;
}
vmur_dbf = debug_register("vmur", 4, 1, 4 * sizeof(long));
if (!vmur_dbf)
return -ENOMEM;
rc = debug_register_view(vmur_dbf, &debug_sprintf_view);
if (rc)
goto fail_free_dbf;
debug_set_level(vmur_dbf, 6);
vmur_class = class_create(THIS_MODULE, "vmur");
if (IS_ERR(vmur_class)) {
rc = PTR_ERR(vmur_class);
goto fail_free_dbf;
}
rc = ccw_driver_register(&ur_driver);
if (rc)
goto fail_class_destroy;
rc = alloc_chrdev_region(&dev, 0, NUM_MINORS, "vmur");
if (rc) {
pr_err("Kernel function alloc_chrdev_region failed with "
"error code %d\n", rc);
goto fail_unregister_driver;
}
ur_first_dev_maj_min = MKDEV(MAJOR(dev), 0);
pr_info("%s loaded.\n", ur_banner);
return 0;
fail_unregister_driver:
ccw_driver_unregister(&ur_driver);
fail_class_destroy:
class_destroy(vmur_class);
fail_free_dbf:
debug_unregister(vmur_dbf);
return rc;
}
static void __exit ur_exit(void)
{
unregister_chrdev_region(ur_first_dev_maj_min, NUM_MINORS);
ccw_driver_unregister(&ur_driver);
class_destroy(vmur_class);
debug_unregister(vmur_dbf);
pr_info("%s unloaded.\n", ur_banner);
}
module_init(ur_init);
module_exit(ur_exit);
| gpl-2.0 |
Swapnil133609/Zeus_exp | net/dccp/diag.c | 8534 | 2305 | /*
* net/dccp/diag.c
*
* An implementation of the DCCP protocol
* Arnaldo Carvalho de Melo <acme@mandriva.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/module.h>
#include <linux/inet_diag.h>
#include "ccid.h"
#include "dccp.h"
static void dccp_get_info(struct sock *sk, struct tcp_info *info)
{
struct dccp_sock *dp = dccp_sk(sk);
const struct inet_connection_sock *icsk = inet_csk(sk);
memset(info, 0, sizeof(*info));
info->tcpi_state = sk->sk_state;
info->tcpi_retransmits = icsk->icsk_retransmits;
info->tcpi_probes = icsk->icsk_probes_out;
info->tcpi_backoff = icsk->icsk_backoff;
info->tcpi_pmtu = icsk->icsk_pmtu_cookie;
if (dp->dccps_hc_rx_ackvec != NULL)
info->tcpi_options |= TCPI_OPT_SACK;
if (dp->dccps_hc_rx_ccid != NULL)
ccid_hc_rx_get_info(dp->dccps_hc_rx_ccid, sk, info);
if (dp->dccps_hc_tx_ccid != NULL)
ccid_hc_tx_get_info(dp->dccps_hc_tx_ccid, sk, info);
}
static void dccp_diag_get_info(struct sock *sk, struct inet_diag_msg *r,
void *_info)
{
r->idiag_rqueue = r->idiag_wqueue = 0;
if (_info != NULL)
dccp_get_info(sk, _info);
}
static void dccp_diag_dump(struct sk_buff *skb, struct netlink_callback *cb,
struct inet_diag_req_v2 *r, struct nlattr *bc)
{
inet_diag_dump_icsk(&dccp_hashinfo, skb, cb, r, bc);
}
static int dccp_diag_dump_one(struct sk_buff *in_skb, const struct nlmsghdr *nlh,
struct inet_diag_req_v2 *req)
{
return inet_diag_dump_one_icsk(&dccp_hashinfo, in_skb, nlh, req);
}
static const struct inet_diag_handler dccp_diag_handler = {
.dump = dccp_diag_dump,
.dump_one = dccp_diag_dump_one,
.idiag_get_info = dccp_diag_get_info,
.idiag_type = IPPROTO_DCCP,
};
static int __init dccp_diag_init(void)
{
return inet_diag_register(&dccp_diag_handler);
}
static void __exit dccp_diag_fini(void)
{
inet_diag_unregister(&dccp_diag_handler);
}
module_init(dccp_diag_init);
module_exit(dccp_diag_fini);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Arnaldo Carvalho de Melo <acme@mandriva.com>");
MODULE_DESCRIPTION("DCCP inet_diag handler");
MODULE_ALIAS_NET_PF_PROTO_TYPE(PF_NETLINK, NETLINK_SOCK_DIAG, 2-33 /* AF_INET - IPPROTO_DCCP */);
| gpl-2.0 |
Tim1928/DBK-3.0-4.2 | drivers/ata/pata_jmicron.c | 9046 | 4695 | /*
* pata_jmicron.c - JMicron ATA driver for non AHCI mode. This drives the
* PATA port of the controller. The SATA ports are
* driven by AHCI in the usual configuration although
* this driver can handle other setups if we need it.
*
* (c) 2006 Red Hat
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>
#include <linux/ata.h>
#define DRV_NAME "pata_jmicron"
#define DRV_VERSION "0.1.5"
typedef enum {
PORT_PATA0 = 0,
PORT_PATA1 = 1,
PORT_SATA = 2,
} port_type;
/**
* jmicron_pre_reset - check for 40/80 pin
* @link: ATA link
* @deadline: deadline jiffies for the operation
*
* Perform the PATA port setup we need.
*
* On the Jmicron 361/363 there is a single PATA port that can be mapped
* either as primary or secondary (or neither). We don't do any policy
* and setup here. We assume that has been done by init_one and the
* BIOS.
*/
static int jmicron_pre_reset(struct ata_link *link, unsigned long deadline)
{
struct ata_port *ap = link->ap;
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
u32 control;
u32 control5;
int port_mask = 1<< (4 * ap->port_no);
int port = ap->port_no;
port_type port_map[2];
/* Check if our port is enabled */
pci_read_config_dword(pdev, 0x40, &control);
if ((control & port_mask) == 0)
return -ENOENT;
/* There are two basic mappings. One has the two SATA ports merged
as master/slave and the secondary as PATA, the other has only the
SATA port mapped */
if (control & (1 << 23)) {
port_map[0] = PORT_SATA;
port_map[1] = PORT_PATA0;
} else {
port_map[0] = PORT_SATA;
port_map[1] = PORT_SATA;
}
/* The 365/366 may have this bit set to map the second PATA port
as the internal primary channel */
pci_read_config_dword(pdev, 0x80, &control5);
if (control5 & (1<<24))
port_map[0] = PORT_PATA1;
/* The two ports may then be logically swapped by the firmware */
if (control & (1 << 22))
port = port ^ 1;
/*
* Now we know which physical port we are talking about we can
* actually do our cable checking etc. Thankfully we don't need
* to do the plumbing for other cases.
*/
switch (port_map[port]) {
case PORT_PATA0:
if ((control & (1 << 5)) == 0)
return -ENOENT;
if (control & (1 << 3)) /* 40/80 pin primary */
ap->cbl = ATA_CBL_PATA40;
else
ap->cbl = ATA_CBL_PATA80;
break;
case PORT_PATA1:
/* Bit 21 is set if the port is enabled */
if ((control5 & (1 << 21)) == 0)
return -ENOENT;
if (control5 & (1 << 19)) /* 40/80 pin secondary */
ap->cbl = ATA_CBL_PATA40;
else
ap->cbl = ATA_CBL_PATA80;
break;
case PORT_SATA:
ap->cbl = ATA_CBL_SATA;
break;
}
return ata_sff_prereset(link, deadline);
}
/* No PIO or DMA methods needed for this device */
static struct scsi_host_template jmicron_sht = {
ATA_BMDMA_SHT(DRV_NAME),
};
static struct ata_port_operations jmicron_ops = {
.inherits = &ata_bmdma_port_ops,
.prereset = jmicron_pre_reset,
};
/**
* jmicron_init_one - Register Jmicron ATA PCI device with kernel services
* @pdev: PCI device to register
* @ent: Entry in jmicron_pci_tbl matching with @pdev
*
* Called from kernel PCI layer.
*
* LOCKING:
* Inherited from PCI layer (may sleep).
*
* RETURNS:
* Zero on success, or -ERRNO value.
*/
static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
{
static const struct ata_port_info info = {
.flags = ATA_FLAG_SLAVE_POSS,
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2,
.udma_mask = ATA_UDMA5,
.port_ops = &jmicron_ops,
};
const struct ata_port_info *ppi[] = { &info, NULL };
return ata_pci_bmdma_init_one(pdev, ppi, &jmicron_sht, NULL, 0);
}
static const struct pci_device_id jmicron_pci_tbl[] = {
{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 },
{ } /* terminate list */
};
static struct pci_driver jmicron_pci_driver = {
.name = DRV_NAME,
.id_table = jmicron_pci_tbl,
.probe = jmicron_init_one,
.remove = ata_pci_remove_one,
#ifdef CONFIG_PM
.suspend = ata_pci_device_suspend,
.resume = ata_pci_device_resume,
#endif
};
static int __init jmicron_init(void)
{
return pci_register_driver(&jmicron_pci_driver);
}
static void __exit jmicron_exit(void)
{
pci_unregister_driver(&jmicron_pci_driver);
}
module_init(jmicron_init);
module_exit(jmicron_exit);
MODULE_AUTHOR("Alan Cox");
MODULE_DESCRIPTION("SCSI low-level driver for Jmicron PATA ports");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, jmicron_pci_tbl);
MODULE_VERSION(DRV_VERSION);
| gpl-2.0 |
pacificIT/udoo_kernel_imx | drivers/ata/pata_jmicron.c | 9046 | 4695 | /*
* pata_jmicron.c - JMicron ATA driver for non AHCI mode. This drives the
* PATA port of the controller. The SATA ports are
* driven by AHCI in the usual configuration although
* this driver can handle other setups if we need it.
*
* (c) 2006 Red Hat
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>
#include <linux/ata.h>
#define DRV_NAME "pata_jmicron"
#define DRV_VERSION "0.1.5"
typedef enum {
PORT_PATA0 = 0,
PORT_PATA1 = 1,
PORT_SATA = 2,
} port_type;
/**
* jmicron_pre_reset - check for 40/80 pin
* @link: ATA link
* @deadline: deadline jiffies for the operation
*
* Perform the PATA port setup we need.
*
* On the Jmicron 361/363 there is a single PATA port that can be mapped
* either as primary or secondary (or neither). We don't do any policy
* and setup here. We assume that has been done by init_one and the
* BIOS.
*/
static int jmicron_pre_reset(struct ata_link *link, unsigned long deadline)
{
struct ata_port *ap = link->ap;
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
u32 control;
u32 control5;
int port_mask = 1<< (4 * ap->port_no);
int port = ap->port_no;
port_type port_map[2];
/* Check if our port is enabled */
pci_read_config_dword(pdev, 0x40, &control);
if ((control & port_mask) == 0)
return -ENOENT;
/* There are two basic mappings. One has the two SATA ports merged
as master/slave and the secondary as PATA, the other has only the
SATA port mapped */
if (control & (1 << 23)) {
port_map[0] = PORT_SATA;
port_map[1] = PORT_PATA0;
} else {
port_map[0] = PORT_SATA;
port_map[1] = PORT_SATA;
}
/* The 365/366 may have this bit set to map the second PATA port
as the internal primary channel */
pci_read_config_dword(pdev, 0x80, &control5);
if (control5 & (1<<24))
port_map[0] = PORT_PATA1;
/* The two ports may then be logically swapped by the firmware */
if (control & (1 << 22))
port = port ^ 1;
/*
* Now we know which physical port we are talking about we can
* actually do our cable checking etc. Thankfully we don't need
* to do the plumbing for other cases.
*/
switch (port_map[port]) {
case PORT_PATA0:
if ((control & (1 << 5)) == 0)
return -ENOENT;
if (control & (1 << 3)) /* 40/80 pin primary */
ap->cbl = ATA_CBL_PATA40;
else
ap->cbl = ATA_CBL_PATA80;
break;
case PORT_PATA1:
/* Bit 21 is set if the port is enabled */
if ((control5 & (1 << 21)) == 0)
return -ENOENT;
if (control5 & (1 << 19)) /* 40/80 pin secondary */
ap->cbl = ATA_CBL_PATA40;
else
ap->cbl = ATA_CBL_PATA80;
break;
case PORT_SATA:
ap->cbl = ATA_CBL_SATA;
break;
}
return ata_sff_prereset(link, deadline);
}
/* No PIO or DMA methods needed for this device */
static struct scsi_host_template jmicron_sht = {
ATA_BMDMA_SHT(DRV_NAME),
};
static struct ata_port_operations jmicron_ops = {
.inherits = &ata_bmdma_port_ops,
.prereset = jmicron_pre_reset,
};
/**
* jmicron_init_one - Register Jmicron ATA PCI device with kernel services
* @pdev: PCI device to register
* @ent: Entry in jmicron_pci_tbl matching with @pdev
*
* Called from kernel PCI layer.
*
* LOCKING:
* Inherited from PCI layer (may sleep).
*
* RETURNS:
* Zero on success, or -ERRNO value.
*/
static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
{
static const struct ata_port_info info = {
.flags = ATA_FLAG_SLAVE_POSS,
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2,
.udma_mask = ATA_UDMA5,
.port_ops = &jmicron_ops,
};
const struct ata_port_info *ppi[] = { &info, NULL };
return ata_pci_bmdma_init_one(pdev, ppi, &jmicron_sht, NULL, 0);
}
static const struct pci_device_id jmicron_pci_tbl[] = {
{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 },
{ } /* terminate list */
};
static struct pci_driver jmicron_pci_driver = {
.name = DRV_NAME,
.id_table = jmicron_pci_tbl,
.probe = jmicron_init_one,
.remove = ata_pci_remove_one,
#ifdef CONFIG_PM
.suspend = ata_pci_device_suspend,
.resume = ata_pci_device_resume,
#endif
};
static int __init jmicron_init(void)
{
return pci_register_driver(&jmicron_pci_driver);
}
static void __exit jmicron_exit(void)
{
pci_unregister_driver(&jmicron_pci_driver);
}
module_init(jmicron_init);
module_exit(jmicron_exit);
MODULE_AUTHOR("Alan Cox");
MODULE_DESCRIPTION("SCSI low-level driver for Jmicron PATA ports");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, jmicron_pci_tbl);
MODULE_VERSION(DRV_VERSION);
| gpl-2.0 |
vm03/android_kernel_asus_P024 | drivers/video/via/global.c | 10070 | 1741 | /*
* Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
* Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public
* License as published by the Free Software Foundation;
* either version 2, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
* the implied warranty of MERCHANTABILITY or FITNESS FOR
* A PARTICULAR PURPOSE.See the GNU General Public License
* for more details.
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#include "global.h"
int viafb_platform_epia_dvi = STATE_OFF;
int viafb_device_lcd_dualedge = STATE_OFF;
int viafb_bus_width = 12;
int viafb_display_hardware_layout = HW_LAYOUT_LCD_DVI;
int viafb_DeviceStatus = CRT_Device;
int viafb_hotplug;
int viafb_refresh = 60;
int viafb_refresh1 = 60;
int viafb_lcd_dsp_method = LCD_EXPANDSION;
int viafb_lcd_mode = LCD_OPENLDI;
int viafb_CRT_ON = 1;
int viafb_DVI_ON;
int viafb_LCD_ON ;
int viafb_LCD2_ON;
int viafb_SAMM_ON;
int viafb_dual_fb;
unsigned int viafb_second_xres = 640;
unsigned int viafb_second_yres = 480;
int viafb_hotplug_Xres = 640;
int viafb_hotplug_Yres = 480;
int viafb_hotplug_bpp = 32;
int viafb_hotplug_refresh = 60;
int viafb_primary_dev = None_Device;
int viafb_lcd_panel_id = LCD_PANEL_ID_MAXIMUM + 1;
struct fb_info *viafbinfo;
struct fb_info *viafbinfo1;
struct viafb_par *viaparinfo;
struct viafb_par *viaparinfo1;
| gpl-2.0 |
shukiz/VAR-SOM-AM43-SDK7_1-KERNEL-3-12 | sound/soc/pxa/mmp-sspa.c | 87 | 12334 | /*
* linux/sound/soc/pxa/mmp-sspa.c
* Base on pxa2xx-ssp.c
*
* Copyright (C) 2011 Marvell International Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/slab.h>
#include <linux/pxa2xx_ssp.h>
#include <linux/io.h>
#include <linux/dmaengine.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/initval.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/pxa2xx-lib.h>
#include <sound/dmaengine_pcm.h>
#include "mmp-sspa.h"
/*
* SSPA audio private data
*/
struct sspa_priv {
struct ssp_device *sspa;
struct snd_dmaengine_dai_dma_data *dma_params;
struct clk *audio_clk;
struct clk *sysclk;
int dai_fmt;
int running_cnt;
};
static void mmp_sspa_write_reg(struct ssp_device *sspa, u32 reg, u32 val)
{
__raw_writel(val, sspa->mmio_base + reg);
}
static u32 mmp_sspa_read_reg(struct ssp_device *sspa, u32 reg)
{
return __raw_readl(sspa->mmio_base + reg);
}
static void mmp_sspa_tx_enable(struct ssp_device *sspa)
{
unsigned int sspa_sp;
sspa_sp = mmp_sspa_read_reg(sspa, SSPA_TXSP);
sspa_sp |= SSPA_SP_S_EN;
sspa_sp |= SSPA_SP_WEN;
mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
}
static void mmp_sspa_tx_disable(struct ssp_device *sspa)
{
unsigned int sspa_sp;
sspa_sp = mmp_sspa_read_reg(sspa, SSPA_TXSP);
sspa_sp &= ~SSPA_SP_S_EN;
sspa_sp |= SSPA_SP_WEN;
mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
}
static void mmp_sspa_rx_enable(struct ssp_device *sspa)
{
unsigned int sspa_sp;
sspa_sp = mmp_sspa_read_reg(sspa, SSPA_RXSP);
sspa_sp |= SSPA_SP_S_EN;
sspa_sp |= SSPA_SP_WEN;
mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
}
static void mmp_sspa_rx_disable(struct ssp_device *sspa)
{
unsigned int sspa_sp;
sspa_sp = mmp_sspa_read_reg(sspa, SSPA_RXSP);
sspa_sp &= ~SSPA_SP_S_EN;
sspa_sp |= SSPA_SP_WEN;
mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
}
static int mmp_sspa_startup(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct sspa_priv *priv = snd_soc_dai_get_drvdata(dai);
clk_enable(priv->sysclk);
clk_enable(priv->sspa->clk);
return 0;
}
static void mmp_sspa_shutdown(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct sspa_priv *priv = snd_soc_dai_get_drvdata(dai);
clk_disable(priv->sspa->clk);
clk_disable(priv->sysclk);
return;
}
/*
* Set the SSP ports SYSCLK.
*/
static int mmp_sspa_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
int clk_id, unsigned int freq, int dir)
{
struct sspa_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
int ret = 0;
switch (clk_id) {
case MMP_SSPA_CLK_AUDIO:
ret = clk_set_rate(priv->audio_clk, freq);
if (ret)
return ret;
break;
case MMP_SSPA_CLK_PLL:
case MMP_SSPA_CLK_VCXO:
/* not support yet */
return -EINVAL;
default:
return -EINVAL;
}
return 0;
}
static int mmp_sspa_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
int source, unsigned int freq_in,
unsigned int freq_out)
{
struct sspa_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
int ret = 0;
switch (pll_id) {
case MMP_SYSCLK:
ret = clk_set_rate(priv->sysclk, freq_out);
if (ret)
return ret;
break;
case MMP_SSPA_CLK:
ret = clk_set_rate(priv->sspa->clk, freq_out);
if (ret)
return ret;
break;
default:
return -ENODEV;
}
return 0;
}
/*
* Set up the sspa dai format. The sspa port must be inactive
* before calling this function as the physical
* interface format is changed.
*/
static int mmp_sspa_set_dai_fmt(struct snd_soc_dai *cpu_dai,
unsigned int fmt)
{
struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(cpu_dai);
struct ssp_device *sspa = sspa_priv->sspa;
u32 sspa_sp, sspa_ctrl;
/* check if we need to change anything at all */
if (sspa_priv->dai_fmt == fmt)
return 0;
/* we can only change the settings if the port is not in use */
if ((mmp_sspa_read_reg(sspa, SSPA_TXSP) & SSPA_SP_S_EN) ||
(mmp_sspa_read_reg(sspa, SSPA_RXSP) & SSPA_SP_S_EN)) {
dev_err(&sspa->pdev->dev,
"can't change hardware dai format: stream is in use\n");
return -EINVAL;
}
/* reset port settings */
sspa_sp = SSPA_SP_WEN | SSPA_SP_S_RST | SSPA_SP_FFLUSH;
sspa_ctrl = 0;
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBS_CFS:
sspa_sp |= SSPA_SP_MSL;
break;
case SND_SOC_DAIFMT_CBM_CFM:
break;
default:
return -EINVAL;
}
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
case SND_SOC_DAIFMT_NB_NF:
sspa_sp |= SSPA_SP_FSP;
break;
default:
return -EINVAL;
}
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_I2S:
sspa_sp |= SSPA_TXSP_FPER(63);
sspa_sp |= SSPA_SP_FWID(31);
sspa_ctrl |= SSPA_CTL_XDATDLY(1);
break;
default:
return -EINVAL;
}
mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
sspa_sp &= ~(SSPA_SP_S_RST | SSPA_SP_FFLUSH);
mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
/*
* FIXME: hw issue, for the tx serial port,
* can not config the master/slave mode;
* so must clean this bit.
* The master/slave mode has been set in the
* rx port.
*/
sspa_sp &= ~SSPA_SP_MSL;
mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
mmp_sspa_write_reg(sspa, SSPA_TXCTL, sspa_ctrl);
mmp_sspa_write_reg(sspa, SSPA_RXCTL, sspa_ctrl);
/* Since we are configuring the timings for the format by hand
* we have to defer some things until hw_params() where we
* know parameters like the sample size.
*/
sspa_priv->dai_fmt = fmt;
return 0;
}
/*
* Set the SSPA audio DMA parameters and sample size.
* Can be called multiple times by oss emulation.
*/
static int mmp_sspa_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai);
struct ssp_device *sspa = sspa_priv->sspa;
struct snd_dmaengine_dai_dma_data *dma_params;
u32 sspa_ctrl;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
sspa_ctrl = mmp_sspa_read_reg(sspa, SSPA_TXCTL);
else
sspa_ctrl = mmp_sspa_read_reg(sspa, SSPA_RXCTL);
sspa_ctrl &= ~SSPA_CTL_XFRLEN1_MASK;
sspa_ctrl |= SSPA_CTL_XFRLEN1(params_channels(params) - 1);
sspa_ctrl &= ~SSPA_CTL_XWDLEN1_MASK;
sspa_ctrl |= SSPA_CTL_XWDLEN1(SSPA_CTL_32_BITS);
sspa_ctrl &= ~SSPA_CTL_XSSZ1_MASK;
switch (params_format(params)) {
case SNDRV_PCM_FORMAT_S8:
sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_8_BITS);
break;
case SNDRV_PCM_FORMAT_S16_LE:
sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_16_BITS);
break;
case SNDRV_PCM_FORMAT_S20_3LE:
sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_20_BITS);
break;
case SNDRV_PCM_FORMAT_S24_3LE:
sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_24_BITS);
break;
case SNDRV_PCM_FORMAT_S32_LE:
sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_32_BITS);
break;
default:
return -EINVAL;
}
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
mmp_sspa_write_reg(sspa, SSPA_TXCTL, sspa_ctrl);
mmp_sspa_write_reg(sspa, SSPA_TXFIFO_LL, 0x1);
} else {
mmp_sspa_write_reg(sspa, SSPA_RXCTL, sspa_ctrl);
mmp_sspa_write_reg(sspa, SSPA_RXFIFO_UL, 0x0);
}
dma_params = &sspa_priv->dma_params[substream->stream];
dma_params->addr = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
(sspa->phys_base + SSPA_TXD) :
(sspa->phys_base + SSPA_RXD);
snd_soc_dai_set_dma_data(cpu_dai, substream, dma_params);
return 0;
}
static int mmp_sspa_trigger(struct snd_pcm_substream *substream, int cmd,
struct snd_soc_dai *dai)
{
struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai);
struct ssp_device *sspa = sspa_priv->sspa;
int ret = 0;
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
/*
* whatever playback or capture, must enable rx.
* this is a hw issue, so need check if rx has been
* enabled or not; if has been enabled by another
* stream, do not enable again.
*/
if (!sspa_priv->running_cnt)
mmp_sspa_rx_enable(sspa);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
mmp_sspa_tx_enable(sspa);
sspa_priv->running_cnt++;
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
sspa_priv->running_cnt--;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
mmp_sspa_tx_disable(sspa);
/* have no capture stream, disable rx port */
if (!sspa_priv->running_cnt)
mmp_sspa_rx_disable(sspa);
break;
default:
ret = -EINVAL;
}
return ret;
}
static int mmp_sspa_probe(struct snd_soc_dai *dai)
{
struct sspa_priv *priv = dev_get_drvdata(dai->dev);
snd_soc_dai_set_drvdata(dai, priv);
return 0;
}
#define MMP_SSPA_RATES SNDRV_PCM_RATE_8000_192000
#define MMP_SSPA_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
SNDRV_PCM_FMTBIT_S16_LE | \
SNDRV_PCM_FMTBIT_S24_LE | \
SNDRV_PCM_FMTBIT_S24_LE | \
SNDRV_PCM_FMTBIT_S32_LE)
static struct snd_soc_dai_ops mmp_sspa_dai_ops = {
.startup = mmp_sspa_startup,
.shutdown = mmp_sspa_shutdown,
.trigger = mmp_sspa_trigger,
.hw_params = mmp_sspa_hw_params,
.set_sysclk = mmp_sspa_set_dai_sysclk,
.set_pll = mmp_sspa_set_dai_pll,
.set_fmt = mmp_sspa_set_dai_fmt,
};
static struct snd_soc_dai_driver mmp_sspa_dai = {
.probe = mmp_sspa_probe,
.playback = {
.channels_min = 1,
.channels_max = 128,
.rates = MMP_SSPA_RATES,
.formats = MMP_SSPA_FORMATS,
},
.capture = {
.channels_min = 1,
.channels_max = 2,
.rates = MMP_SSPA_RATES,
.formats = MMP_SSPA_FORMATS,
},
.ops = &mmp_sspa_dai_ops,
};
static const struct snd_soc_component_driver mmp_sspa_component = {
.name = "mmp-sspa",
};
static int asoc_mmp_sspa_probe(struct platform_device *pdev)
{
struct sspa_priv *priv;
struct resource *res;
priv = devm_kzalloc(&pdev->dev,
sizeof(struct sspa_priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->sspa = devm_kzalloc(&pdev->dev,
sizeof(struct ssp_device), GFP_KERNEL);
if (priv->sspa == NULL)
return -ENOMEM;
priv->dma_params = devm_kzalloc(&pdev->dev,
2 * sizeof(struct snd_dmaengine_dai_dma_data),
GFP_KERNEL);
if (priv->dma_params == NULL)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
priv->sspa->mmio_base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(priv->sspa->mmio_base))
return PTR_ERR(priv->sspa->mmio_base);
priv->sspa->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(priv->sspa->clk))
return PTR_ERR(priv->sspa->clk);
priv->audio_clk = clk_get(NULL, "mmp-audio");
if (IS_ERR(priv->audio_clk))
return PTR_ERR(priv->audio_clk);
priv->sysclk = clk_get(NULL, "mmp-sysclk");
if (IS_ERR(priv->sysclk)) {
clk_put(priv->audio_clk);
return PTR_ERR(priv->sysclk);
}
clk_enable(priv->audio_clk);
priv->dai_fmt = (unsigned int) -1;
platform_set_drvdata(pdev, priv);
return snd_soc_register_component(&pdev->dev, &mmp_sspa_component,
&mmp_sspa_dai, 1);
}
static int asoc_mmp_sspa_remove(struct platform_device *pdev)
{
struct sspa_priv *priv = platform_get_drvdata(pdev);
clk_disable(priv->audio_clk);
clk_put(priv->audio_clk);
clk_put(priv->sysclk);
snd_soc_unregister_component(&pdev->dev);
return 0;
}
static struct platform_driver asoc_mmp_sspa_driver = {
.driver = {
.name = "mmp-sspa-dai",
.owner = THIS_MODULE,
},
.probe = asoc_mmp_sspa_probe,
.remove = asoc_mmp_sspa_remove,
};
module_platform_driver(asoc_mmp_sspa_driver);
MODULE_AUTHOR("Leo Yan <leoy@marvell.com>");
MODULE_DESCRIPTION("MMP SSPA SoC Interface");
MODULE_LICENSE("GPL");
| gpl-2.0 |
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