idx int64 | func_before string | Vulnerability Classification string | vul int64 | func_after string | patch string | CWE ID string | lines_before string | lines_after string |
|---|---|---|---|---|---|---|---|---|
12,500 | ssh_stdio_confirm(int id, int success, void *arg)
{
if (!success)
fatal("stdio forwarding failed");
}
| null | 0 | ssh_stdio_confirm(int id, int success, void *arg)
{
if (!success)
fatal("stdio forwarding failed");
}
| @@ -1,4 +1,4 @@
-/* $OpenBSD: ssh.c,v 1.432 2015/12/11 03:20:09 djm Exp $ */
+/* $OpenBSD: ssh.c,v 1.433 2016/01/13 23:04:47 djm Exp $ */
/*
* Author: Tatu Ylonen <ylo@cs.hut.fi>
* Copyright (c) 1995 Tatu Ylonen <ylo@cs.hut.fi>, Espoo, Finland
@@ -1626,6 +1626,7 @@ ssh_session(void)
struct winsize ws;
char *cp... | CWE-254 | null | null |
12,501 | usage(void)
{
fprintf(stderr,
"usage: ssh [-1246AaCfGgKkMNnqsTtVvXxYy] [-b bind_address] [-c cipher_spec]\n"
" [-D [bind_address:]port] [-E log_file] [-e escape_char]\n"
" [-F configfile] [-I pkcs11] [-i identity_file] [-L address]\n"
" [-l login_name] [-m mac_spec] [-O ctl_cmd] [-o optio... | null | 0 | usage(void)
{
fprintf(stderr,
"usage: ssh [-1246AaCfGgKkMNnqsTtVvXxYy] [-b bind_address] [-c cipher_spec]\n"
" [-D [bind_address:]port] [-E log_file] [-e escape_char]\n"
" [-F configfile] [-I pkcs11] [-i identity_file] [-L address]\n"
" [-l login_name] [-m mac_spec] [-O ctl_cmd] [-o optio... | @@ -1,4 +1,4 @@
-/* $OpenBSD: ssh.c,v 1.432 2015/12/11 03:20:09 djm Exp $ */
+/* $OpenBSD: ssh.c,v 1.433 2016/01/13 23:04:47 djm Exp $ */
/*
* Author: Tatu Ylonen <ylo@cs.hut.fi>
* Copyright (c) 1995 Tatu Ylonen <ylo@cs.hut.fi>, Espoo, Finland
@@ -1626,6 +1626,7 @@ ssh_session(void)
struct winsize ws;
char *cp... | CWE-254 | null | null |
12,502 | static void vmxnet3_ack_events(VMXNET3State *s, uint32_t val)
{
uint32_t events;
VMW_CBPRN("Clearing events: 0x%x", val);
events = VMXNET3_READ_DRV_SHARED32(s->drv_shmem, ecr) & ~val;
VMXNET3_WRITE_DRV_SHARED32(s->drv_shmem, ecr, events);
}
| DoS Exec Code | 0 | static void vmxnet3_ack_events(VMXNET3State *s, uint32_t val)
{
uint32_t events;
VMW_CBPRN("Clearing events: 0x%x", val);
events = VMXNET3_READ_DRV_SHARED32(s->drv_shmem, ecr) & ~val;
VMXNET3_WRITE_DRV_SHARED32(s->drv_shmem, ecr, events);
}
| @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,503 | static void vmxnet3_adjust_by_guest_type(VMXNET3State *s)
{
struct Vmxnet3_GOSInfo gos;
VMXNET3_READ_DRV_SHARED(s->drv_shmem, devRead.misc.driverInfo.gos,
&gos, sizeof(gos));
s->rx_packets_compound =
(gos.gosType == VMXNET3_GOS_TYPE_WIN) ? false : true;
VMW_CFPRN("G... | DoS Exec Code | 0 | static void vmxnet3_adjust_by_guest_type(VMXNET3State *s)
{
struct Vmxnet3_GOSInfo gos;
VMXNET3_READ_DRV_SHARED(s->drv_shmem, devRead.misc.driverInfo.gos,
&gos, sizeof(gos));
s->rx_packets_compound =
(gos.gosType == VMXNET3_GOS_TYPE_WIN) ? false : true;
VMW_CFPRN("G... | @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,504 | static void vmxnet3_class_init(ObjectClass *class, void *data)
{
DeviceClass *dc = DEVICE_CLASS(class);
PCIDeviceClass *c = PCI_DEVICE_CLASS(class);
c->init = vmxnet3_pci_init;
c->exit = vmxnet3_pci_uninit;
c->vendor_id = PCI_VENDOR_ID_VMWARE;
c->device_id = PCI_DEVICE_ID_VMWARE_VMXNET3;
c-... | DoS Exec Code | 0 | static void vmxnet3_class_init(ObjectClass *class, void *data)
{
DeviceClass *dc = DEVICE_CLASS(class);
PCIDeviceClass *c = PCI_DEVICE_CLASS(class);
c->init = vmxnet3_pci_init;
c->exit = vmxnet3_pci_uninit;
c->vendor_id = PCI_VENDOR_ID_VMWARE;
c->device_id = PCI_DEVICE_ID_VMWARE_VMXNET3;
c-... | @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,505 | static void vmxnet3_cleanup(NetClientState *nc)
{
VMXNET3State *s = qemu_get_nic_opaque(nc);
s->nic = NULL;
}
| DoS Exec Code | 0 | static void vmxnet3_cleanup(NetClientState *nc)
{
VMXNET3State *s = qemu_get_nic_opaque(nc);
s->nic = NULL;
}
| @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,506 | vmxnet3_cleanup_msi(VMXNET3State *s)
{
PCIDevice *d = PCI_DEVICE(s);
if (s->msi_used) {
msi_uninit(d);
}
}
| DoS Exec Code | 0 | vmxnet3_cleanup_msi(VMXNET3State *s)
{
PCIDevice *d = PCI_DEVICE(s);
if (s->msi_used) {
msi_uninit(d);
}
}
| @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,507 | static void vmxnet3_fill_stats(VMXNET3State *s)
{
int i;
for (i = 0; i < s->txq_num; i++) {
cpu_physical_memory_write(s->txq_descr[i].tx_stats_pa,
&s->txq_descr[i].txq_stats,
sizeof(s->txq_descr[i].txq_stats));
}
for (i = 0; i ... | DoS Exec Code | 0 | static void vmxnet3_fill_stats(VMXNET3State *s)
{
int i;
for (i = 0; i < s->txq_num; i++) {
cpu_physical_memory_write(s->txq_descr[i].tx_stats_pa,
&s->txq_descr[i].txq_stats,
sizeof(s->txq_descr[i].txq_stats));
}
for (i = 0; i ... | @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,508 | static uint64_t vmxnet3_get_command_status(VMXNET3State *s)
{
uint64_t ret;
switch (s->last_command) {
case VMXNET3_CMD_ACTIVATE_DEV:
ret = (s->device_active) ? 0 : -1;
VMW_CFPRN("Device active: %" PRIx64, ret);
break;
case VMXNET3_CMD_RESET_DEV:
case VMXNET3_CMD_QUIESCE_DE... | DoS Exec Code | 0 | static uint64_t vmxnet3_get_command_status(VMXNET3State *s)
{
uint64_t ret;
switch (s->last_command) {
case VMXNET3_CMD_ACTIVATE_DEV:
ret = (s->device_active) ? 0 : -1;
VMW_CFPRN("Device active: %" PRIx64, ret);
break;
case VMXNET3_CMD_RESET_DEV:
case VMXNET3_CMD_QUIESCE_DE... | @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,509 | static void vmxnet3_handle_command(VMXNET3State *s, uint64_t cmd)
{
s->last_command = cmd;
switch (cmd) {
case VMXNET3_CMD_GET_PERM_MAC_HI:
VMW_CBPRN("Set: Get upper part of permanent MAC");
break;
case VMXNET3_CMD_GET_PERM_MAC_LO:
VMW_CBPRN("Set: Get lower part of permanent MA... | DoS Exec Code | 0 | static void vmxnet3_handle_command(VMXNET3State *s, uint64_t cmd)
{
s->last_command = cmd;
switch (cmd) {
case VMXNET3_CMD_GET_PERM_MAC_HI:
VMW_CBPRN("Set: Get upper part of permanent MAC");
break;
case VMXNET3_CMD_GET_PERM_MAC_LO:
VMW_CBPRN("Set: Get lower part of permanent MA... | @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,510 | vmxnet3_io_bar0_read(void *opaque, hwaddr addr, unsigned size)
{
if (VMW_IS_MULTIREG_ADDR(addr, VMXNET3_REG_IMR,
VMXNET3_MAX_INTRS, VMXNET3_REG_ALIGN)) {
g_assert_not_reached();
}
VMW_CBPRN("BAR0 unknown read [%" PRIx64 "], size %d", addr, size);
return 0;
}
| DoS Exec Code | 0 | vmxnet3_io_bar0_read(void *opaque, hwaddr addr, unsigned size)
{
if (VMW_IS_MULTIREG_ADDR(addr, VMXNET3_REG_IMR,
VMXNET3_MAX_INTRS, VMXNET3_REG_ALIGN)) {
g_assert_not_reached();
}
VMW_CBPRN("BAR0 unknown read [%" PRIx64 "], size %d", addr, size);
return 0;
}
| @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,511 | vmxnet3_io_bar1_read(void *opaque, hwaddr addr, unsigned size)
{
VMXNET3State *s = opaque;
uint64_t ret = 0;
switch (addr) {
/* Vmxnet3 Revision Report Selection */
case VMXNET3_REG_VRRS:
VMW_CBPRN("Read BAR1 [VMXNET3_REG_VRRS], size %d", size);
ret = VMX... | DoS Exec Code | 0 | vmxnet3_io_bar1_read(void *opaque, hwaddr addr, unsigned size)
{
VMXNET3State *s = opaque;
uint64_t ret = 0;
switch (addr) {
/* Vmxnet3 Revision Report Selection */
case VMXNET3_REG_VRRS:
VMW_CBPRN("Read BAR1 [VMXNET3_REG_VRRS], size %d", size);
ret = VMX... | @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,512 | vmxnet3_io_bar1_write(void *opaque,
hwaddr addr,
uint64_t val,
unsigned size)
{
VMXNET3State *s = opaque;
switch (addr) {
/* Vmxnet3 Revision Report Selection */
case VMXNET3_REG_VRRS:
VMW_CBPRN("Write BAR1 [VMXNET3_REG_VRRS] = %... | DoS Exec Code | 0 | vmxnet3_io_bar1_write(void *opaque,
hwaddr addr,
uint64_t val,
unsigned size)
{
VMXNET3State *s = opaque;
switch (addr) {
/* Vmxnet3 Revision Report Selection */
case VMXNET3_REG_VRRS:
VMW_CBPRN("Write BAR1 [VMXNET3_REG_VRRS] = %... | @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,513 | static void vmxnet3_net_uninit(VMXNET3State *s)
{
g_free(s->mcast_list);
vmxnet_tx_pkt_reset(s->tx_pkt);
vmxnet_tx_pkt_uninit(s->tx_pkt);
vmxnet_rx_pkt_uninit(s->rx_pkt);
qemu_del_nic(s->nic);
}
| DoS Exec Code | 0 | static void vmxnet3_net_uninit(VMXNET3State *s)
{
g_free(s->mcast_list);
vmxnet_tx_pkt_reset(s->tx_pkt);
vmxnet_tx_pkt_uninit(s->tx_pkt);
vmxnet_rx_pkt_uninit(s->rx_pkt);
qemu_del_nic(s->nic);
}
| @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,514 | static int vmxnet3_pci_init(PCIDevice *pci_dev)
{
DeviceState *dev = DEVICE(pci_dev);
VMXNET3State *s = VMXNET3(pci_dev);
VMW_CBPRN("Starting init...");
memory_region_init_io(&s->bar0, OBJECT(s), &b0_ops, s,
"vmxnet3-b0", VMXNET3_PT_REG_SIZE);
pci_register_bar(pci_dev, VM... | DoS Exec Code | 0 | static int vmxnet3_pci_init(PCIDevice *pci_dev)
{
DeviceState *dev = DEVICE(pci_dev);
VMXNET3State *s = VMXNET3(pci_dev);
VMW_CBPRN("Starting init...");
memory_region_init_io(&s->bar0, OBJECT(s), &b0_ops, s,
"vmxnet3-b0", VMXNET3_PT_REG_SIZE);
pci_register_bar(pci_dev, VM... | @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,515 | static void vmxnet3_pci_uninit(PCIDevice *pci_dev)
{
DeviceState *dev = DEVICE(pci_dev);
VMXNET3State *s = VMXNET3(pci_dev);
VMW_CBPRN("Starting uninit...");
unregister_savevm(dev, "vmxnet3-msix", s);
vmxnet3_net_uninit(s);
vmxnet3_cleanup_msix(s);
vmxnet3_cleanup_msi(s);
memory_re... | DoS Exec Code | 0 | static void vmxnet3_pci_uninit(PCIDevice *pci_dev)
{
DeviceState *dev = DEVICE(pci_dev);
VMXNET3State *s = VMXNET3(pci_dev);
VMW_CBPRN("Starting uninit...");
unregister_savevm(dev, "vmxnet3-msix", s);
vmxnet3_net_uninit(s);
vmxnet3_cleanup_msix(s);
vmxnet3_cleanup_msi(s);
memory_re... | @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,516 | static bool vmxnet3_peer_has_vnet_hdr(VMXNET3State *s)
{
NetClientState *nc = qemu_get_queue(s->nic);
if (qemu_has_vnet_hdr(nc->peer)) {
return true;
}
VMW_WRPRN("Peer has no virtio extension. Task offloads will be emulated.");
return false;
}
| DoS Exec Code | 0 | static bool vmxnet3_peer_has_vnet_hdr(VMXNET3State *s)
{
NetClientState *nc = qemu_get_queue(s->nic);
if (qemu_has_vnet_hdr(nc->peer)) {
return true;
}
VMW_WRPRN("Peer has no virtio extension. Task offloads will be emulated.");
return false;
}
| @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,517 | vmxnet3_physical_memory_writev(const struct iovec *iov,
size_t start_iov_off,
hwaddr target_addr,
size_t bytes_to_copy)
{
size_t curr_off = 0;
size_t copied = 0;
while (bytes_to_copy) {
if (start_iov_off < ... | DoS Exec Code | 0 | vmxnet3_physical_memory_writev(const struct iovec *iov,
size_t start_iov_off,
hwaddr target_addr,
size_t bytes_to_copy)
{
size_t curr_off = 0;
size_t copied = 0;
while (bytes_to_copy) {
if (start_iov_off < ... | @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,518 | vmxnet3_pop_rxc_descr(VMXNET3State *s, int qidx, uint32_t *descr_gen)
{
uint8_t ring_gen;
struct Vmxnet3_RxCompDesc rxcd;
hwaddr daddr =
vmxnet3_ring_curr_cell_pa(&s->rxq_descr[qidx].comp_ring);
cpu_physical_memory_read(daddr, &rxcd, sizeof(struct Vmxnet3_RxCompDesc));
ring_gen = vmxnet3_r... | DoS Exec Code | 0 | vmxnet3_pop_rxc_descr(VMXNET3State *s, int qidx, uint32_t *descr_gen)
{
uint8_t ring_gen;
struct Vmxnet3_RxCompDesc rxcd;
hwaddr daddr =
vmxnet3_ring_curr_cell_pa(&s->rxq_descr[qidx].comp_ring);
cpu_physical_memory_read(daddr, &rxcd, sizeof(struct Vmxnet3_RxCompDesc));
ring_gen = vmxnet3_r... | @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,519 | static void vmxnet3_process_tx_queue(VMXNET3State *s, int qidx)
{
struct Vmxnet3_TxDesc txd;
uint32_t txd_idx;
uint32_t data_len;
hwaddr data_pa;
for (;;) {
if (!vmxnet3_pop_next_tx_descr(s, qidx, &txd, &txd_idx)) {
break;
}
vmxnet3_dump_tx_descr(&txd);
... | DoS Exec Code | 0 | static void vmxnet3_process_tx_queue(VMXNET3State *s, int qidx)
{
struct Vmxnet3_TxDesc txd;
uint32_t txd_idx;
uint32_t data_len;
hwaddr data_pa;
for (;;) {
if (!vmxnet3_pop_next_tx_descr(s, qidx, &txd, &txd_idx)) {
break;
}
vmxnet3_dump_tx_descr(&txd);
... | @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,520 | vmxnet3_read_next_rx_descr(VMXNET3State *s, int qidx, int ridx,
struct Vmxnet3_RxDesc *dbuf, uint32_t *didx)
{
Vmxnet3Ring *ring = &s->rxq_descr[qidx].rx_ring[ridx];
*didx = vmxnet3_ring_curr_cell_idx(ring);
vmxnet3_ring_read_curr_cell(ring, dbuf);
}
| DoS Exec Code | 0 | vmxnet3_read_next_rx_descr(VMXNET3State *s, int qidx, int ridx,
struct Vmxnet3_RxDesc *dbuf, uint32_t *didx)
{
Vmxnet3Ring *ring = &s->rxq_descr[qidx].rx_ring[ridx];
*didx = vmxnet3_ring_curr_cell_idx(ring);
vmxnet3_ring_read_curr_cell(ring, dbuf);
}
| @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,521 | vmxnet3_receive(NetClientState *nc, const uint8_t *buf, size_t size)
{
VMXNET3State *s = qemu_get_nic_opaque(nc);
size_t bytes_indicated;
if (!vmxnet3_can_receive(nc)) {
VMW_PKPRN("Cannot receive now");
return -1;
}
if (s->peer_has_vhdr) {
vmxnet_rx_pkt_set_vhdr(s->rx_pkt, ... | DoS Exec Code | 0 | vmxnet3_receive(NetClientState *nc, const uint8_t *buf, size_t size)
{
VMXNET3State *s = qemu_get_nic_opaque(nc);
size_t bytes_indicated;
if (!vmxnet3_can_receive(nc)) {
VMW_PKPRN("Cannot receive now");
return -1;
}
if (s->peer_has_vhdr) {
vmxnet_rx_pkt_set_vhdr(s->rx_pkt, ... | @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,522 | static void vmxnet3_reset(VMXNET3State *s)
{
VMW_CBPRN("Resetting vmxnet3...");
vmxnet3_deactivate_device(s);
vmxnet3_reset_interrupt_states(s);
vmxnet_tx_pkt_reset(s->tx_pkt);
s->drv_shmem = 0;
s->tx_sop = true;
s->skip_current_tx_pkt = false;
}
| DoS Exec Code | 0 | static void vmxnet3_reset(VMXNET3State *s)
{
VMW_CBPRN("Resetting vmxnet3...");
vmxnet3_deactivate_device(s);
vmxnet3_reset_interrupt_states(s);
vmxnet_tx_pkt_reset(s->tx_pkt);
s->drv_shmem = 0;
s->tx_sop = true;
s->skip_current_tx_pkt = false;
}
| @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,523 | static void vmxnet3_reset_mac(VMXNET3State *s)
{
memcpy(&s->conf.macaddr.a, &s->perm_mac.a, sizeof(s->perm_mac.a));
VMW_CFPRN("MAC address set to: " VMXNET_MF, VMXNET_MA(s->conf.macaddr.a));
}
| DoS Exec Code | 0 | static void vmxnet3_reset_mac(VMXNET3State *s)
{
memcpy(&s->conf.macaddr.a, &s->perm_mac.a, sizeof(s->perm_mac.a));
VMW_CFPRN("MAC address set to: " VMXNET_MF, VMXNET_MA(s->conf.macaddr.a));
}
| @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,524 | static void vmxnet3_rx_update_descr(struct VmxnetRxPkt *pkt,
struct Vmxnet3_RxCompDesc *rxcd)
{
int csum_ok, is_gso;
bool isip4, isip6, istcp, isudp;
struct virtio_net_hdr *vhdr;
uint8_t offload_type;
if (vmxnet_rx_pkt_is_vlan_stripped(pkt)) {
rxcd->ts = 1;
rxcd->tci = vmxnet_rx... | DoS Exec Code | 0 | static void vmxnet3_rx_update_descr(struct VmxnetRxPkt *pkt,
struct Vmxnet3_RxCompDesc *rxcd)
{
int csum_ok, is_gso;
bool isip4, isip6, istcp, isudp;
struct virtio_net_hdr *vhdr;
uint8_t offload_type;
if (vmxnet_rx_pkt_is_vlan_stripped(pkt)) {
rxcd->ts = 1;
rxcd->tci = vmxnet_rx... | @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,525 | static void vmxnet3_set_events(VMXNET3State *s, uint32_t val)
{
uint32_t events;
VMW_CBPRN("Setting events: 0x%x", val);
events = VMXNET3_READ_DRV_SHARED32(s->drv_shmem, ecr) | val;
VMXNET3_WRITE_DRV_SHARED32(s->drv_shmem, ecr, events);
}
| DoS Exec Code | 0 | static void vmxnet3_set_events(VMXNET3State *s, uint32_t val)
{
uint32_t events;
VMW_CBPRN("Setting events: 0x%x", val);
events = VMXNET3_READ_DRV_SHARED32(s->drv_shmem, ecr) | val;
VMXNET3_WRITE_DRV_SHARED32(s->drv_shmem, ecr, events);
}
| @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,526 | static void vmxnet3_update_features(VMXNET3State *s)
{
uint32_t guest_features;
int rxcso_supported;
guest_features = VMXNET3_READ_DRV_SHARED32(s->drv_shmem,
devRead.misc.uptFeatures);
rxcso_supported = VMXNET_FLAG_IS_SET(guest_features, UPT1_F_RXCSUM);
... | DoS Exec Code | 0 | static void vmxnet3_update_features(VMXNET3State *s)
{
uint32_t guest_features;
int rxcso_supported;
guest_features = VMXNET3_READ_DRV_SHARED32(s->drv_shmem,
devRead.misc.uptFeatures);
rxcso_supported = VMXNET_FLAG_IS_SET(guest_features, UPT1_F_RXCSUM);
... | @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,527 | static void vmxnet3_update_mcast_filters(VMXNET3State *s)
{
uint16_t list_bytes =
VMXNET3_READ_DRV_SHARED16(s->drv_shmem,
devRead.rxFilterConf.mfTableLen);
s->mcast_list_len = list_bytes / sizeof(s->mcast_list[0]);
s->mcast_list = g_realloc(s->mcast_list, list_byt... | DoS Exec Code | 0 | static void vmxnet3_update_mcast_filters(VMXNET3State *s)
{
uint16_t list_bytes =
VMXNET3_READ_DRV_SHARED16(s->drv_shmem,
devRead.rxFilterConf.mfTableLen);
s->mcast_list_len = list_bytes / sizeof(s->mcast_list[0]);
s->mcast_list = g_realloc(s->mcast_list, list_byt... | @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,528 | static void vmxnet3_update_pm_state(VMXNET3State *s)
{
struct Vmxnet3_VariableLenConfDesc pm_descr;
pm_descr.confLen =
VMXNET3_READ_DRV_SHARED32(s->drv_shmem, devRead.pmConfDesc.confLen);
pm_descr.confVer =
VMXNET3_READ_DRV_SHARED32(s->drv_shmem, devRead.pmConfDesc.confVer);
pm_descr.co... | DoS Exec Code | 0 | static void vmxnet3_update_pm_state(VMXNET3State *s)
{
struct Vmxnet3_VariableLenConfDesc pm_descr;
pm_descr.confLen =
VMXNET3_READ_DRV_SHARED32(s->drv_shmem, devRead.pmConfDesc.confLen);
pm_descr.confVer =
VMXNET3_READ_DRV_SHARED32(s->drv_shmem, devRead.pmConfDesc.confVer);
pm_descr.co... | @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,529 | static void vmxnet3_update_rx_mode(VMXNET3State *s)
{
s->rx_mode = VMXNET3_READ_DRV_SHARED32(s->drv_shmem,
devRead.rxFilterConf.rxMode);
VMW_CFPRN("RX mode: 0x%08X", s->rx_mode);
}
| DoS Exec Code | 0 | static void vmxnet3_update_rx_mode(VMXNET3State *s)
{
s->rx_mode = VMXNET3_READ_DRV_SHARED32(s->drv_shmem,
devRead.rxFilterConf.rxMode);
VMW_CFPRN("RX mode: 0x%08X", s->rx_mode);
}
| @@ -2391,6 +2391,8 @@ static int vmxnet3_post_load(void *opaque, int version_id)
}
}
+ vmxnet3_validate_interrupts(s);
+
return 0;
} | CWE-20 | null | null |
12,530 | static int vmxnet3_post_load(void *opaque, int version_id)
{
VMXNET3State *s = opaque;
PCIDevice *d = PCI_DEVICE(s);
vmxnet_tx_pkt_init(&s->tx_pkt, s->max_tx_frags, s->peer_has_vhdr);
vmxnet_rx_pkt_init(&s->rx_pkt, s->peer_has_vhdr);
if (s->msix_used) {
if (!vmxnet3_use_msix_vectors(s, VM... | DoS Exec Code | 0 | static int vmxnet3_post_load(void *opaque, int version_id)
{
VMXNET3State *s = opaque;
PCIDevice *d = PCI_DEVICE(s);
vmxnet_tx_pkt_init(&s->tx_pkt, s->max_tx_frags, s->peer_has_vhdr);
vmxnet_rx_pkt_init(&s->rx_pkt, s->peer_has_vhdr);
if (s->msix_used) {
if (!vmxnet3_use_msix_vectors(s, VM... | @@ -1336,6 +1336,23 @@ static void vmxnet3_validate_interrupts(VMXNET3State *s)
}
}
+static void vmxnet3_validate_queues(VMXNET3State *s)
+{
+ /*
+ * txq_num and rxq_num are total number of queues
+ * configured by guest. These numbers must not
+ * exceed corresponding maximal values.
+ */
+
+ ... | CWE-20 | null | null |
12,531 | static void vmxnet3_validate_interrupts(VMXNET3State *s)
{
int i;
VMW_CFPRN("Verifying event interrupt index (%d)", s->event_int_idx);
vmxnet3_validate_interrupt_idx(s->msix_used, s->event_int_idx);
for (i = 0; i < s->txq_num; i++) {
int idx = s->txq_descr[i].intr_idx;
VMW_CFPRN("Verif... | DoS Exec Code | 0 | static void vmxnet3_validate_interrupts(VMXNET3State *s)
{
int i;
VMW_CFPRN("Verifying event interrupt index (%d)", s->event_int_idx);
vmxnet3_validate_interrupt_idx(s->msix_used, s->event_int_idx);
for (i = 0; i < s->txq_num; i++) {
int idx = s->txq_descr[i].intr_idx;
VMW_CFPRN("Verif... | @@ -1336,6 +1336,23 @@ static void vmxnet3_validate_interrupts(VMXNET3State *s)
}
}
+static void vmxnet3_validate_queues(VMXNET3State *s)
+{
+ /*
+ * txq_num and rxq_num are total number of queues
+ * configured by guest. These numbers must not
+ * exceed corresponding maximal values.
+ */
+
+ ... | CWE-20 | null | null |
12,532 | static void qemu_sgl_init_external(VirtIOSCSIReq *req, struct iovec *sg,
hwaddr *addr, int num)
{
QEMUSGList *qsgl = &req->qsgl;
qemu_sglist_init(qsgl, DEVICE(req->dev), num, &address_space_memory);
while (num--) {
qemu_sglist_add(qsgl, *(addr++), (sg++)->iov_len)... | Exec Code Overflow | 0 | static void qemu_sgl_init_external(VirtIOSCSIReq *req, struct iovec *sg,
hwaddr *addr, int num)
{
QEMUSGList *qsgl = &req->qsgl;
qemu_sglist_init(qsgl, DEVICE(req->dev), num, &address_space_memory);
while (num--) {
qemu_sglist_add(qsgl, *(addr++), (sg++)->iov_len)... | @@ -147,6 +147,15 @@ static void *virtio_scsi_load_request(QEMUFile *f, SCSIRequest *sreq)
qemu_get_be32s(f, &n);
assert(n < vs->conf.num_queues);
qemu_get_buffer(f, (unsigned char *)&req->elem, sizeof(req->elem));
+ /* TODO: add a way for SCSIBusInfo's load_request to fail,
+ * and fail migration... | CWE-119 | null | null |
12,533 | static void virtio_scsi_bad_req(void)
{
error_report("wrong size for virtio-scsi headers");
exit(1);
}
| Exec Code Overflow | 0 | static void virtio_scsi_bad_req(void)
{
error_report("wrong size for virtio-scsi headers");
exit(1);
}
| @@ -147,6 +147,15 @@ static void *virtio_scsi_load_request(QEMUFile *f, SCSIRequest *sreq)
qemu_get_be32s(f, &n);
assert(n < vs->conf.num_queues);
qemu_get_buffer(f, (unsigned char *)&req->elem, sizeof(req->elem));
+ /* TODO: add a way for SCSIBusInfo's load_request to fail,
+ * and fail migration... | CWE-119 | null | null |
12,534 | static void virtio_scsi_complete_req(VirtIOSCSIReq *req)
{
VirtIOSCSI *s = req->dev;
VirtQueue *vq = req->vq;
VirtIODevice *vdev = VIRTIO_DEVICE(s);
virtqueue_push(vq, &req->elem, req->qsgl.size + req->elem.in_sg[0].iov_len);
qemu_sglist_destroy(&req->qsgl);
if (req->sreq) {
req->sreq->h... | Exec Code Overflow | 0 | static void virtio_scsi_complete_req(VirtIOSCSIReq *req)
{
VirtIOSCSI *s = req->dev;
VirtQueue *vq = req->vq;
VirtIODevice *vdev = VIRTIO_DEVICE(s);
virtqueue_push(vq, &req->elem, req->qsgl.size + req->elem.in_sg[0].iov_len);
qemu_sglist_destroy(&req->qsgl);
if (req->sreq) {
req->sreq->h... | @@ -147,6 +147,15 @@ static void *virtio_scsi_load_request(QEMUFile *f, SCSIRequest *sreq)
qemu_get_be32s(f, &n);
assert(n < vs->conf.num_queues);
qemu_get_buffer(f, (unsigned char *)&req->elem, sizeof(req->elem));
+ /* TODO: add a way for SCSIBusInfo's load_request to fail,
+ * and fail migration... | CWE-119 | null | null |
12,535 | static inline SCSIDevice *virtio_scsi_device_find(VirtIOSCSI *s, uint8_t *lun)
{
if (lun[0] != 1) {
return NULL;
}
if (lun[2] != 0 && !(lun[2] >= 0x40 && lun[2] < 0x80)) {
return NULL;
}
return scsi_device_find(&s->bus, 0, lun[1], virtio_scsi_get_lun(lun));
}
| Exec Code Overflow | 0 | static inline SCSIDevice *virtio_scsi_device_find(VirtIOSCSI *s, uint8_t *lun)
{
if (lun[0] != 1) {
return NULL;
}
if (lun[2] != 0 && !(lun[2] >= 0x40 && lun[2] < 0x80)) {
return NULL;
}
return scsi_device_find(&s->bus, 0, lun[1], virtio_scsi_get_lun(lun));
}
| @@ -147,6 +147,15 @@ static void *virtio_scsi_load_request(QEMUFile *f, SCSIRequest *sreq)
qemu_get_be32s(f, &n);
assert(n < vs->conf.num_queues);
qemu_get_buffer(f, (unsigned char *)&req->elem, sizeof(req->elem));
+ /* TODO: add a way for SCSIBusInfo's load_request to fail,
+ * and fail migration... | CWE-119 | null | null |
12,536 | static inline int virtio_scsi_get_lun(uint8_t *lun)
{
return ((lun[2] << 8) | lun[3]) & 0x3FFF;
}
| Exec Code Overflow | 0 | static inline int virtio_scsi_get_lun(uint8_t *lun)
{
return ((lun[2] << 8) | lun[3]) & 0x3FFF;
}
| @@ -147,6 +147,15 @@ static void *virtio_scsi_load_request(QEMUFile *f, SCSIRequest *sreq)
qemu_get_be32s(f, &n);
assert(n < vs->conf.num_queues);
qemu_get_buffer(f, (unsigned char *)&req->elem, sizeof(req->elem));
+ /* TODO: add a way for SCSIBusInfo's load_request to fail,
+ * and fail migration... | CWE-119 | null | null |
12,537 | static void usb_bus_class_init(ObjectClass *klass, void *data)
{
BusClass *k = BUS_CLASS(klass);
k->print_dev = usb_bus_dev_print;
k->get_dev_path = usb_get_dev_path;
k->get_fw_dev_path = usb_get_fw_dev_path;
}
| Exec Code Overflow | 0 | static void usb_bus_class_init(ObjectClass *klass, void *data)
{
BusClass *k = BUS_CLASS(klass);
k->print_dev = usb_bus_dev_print;
k->get_dev_path = usb_get_dev_path;
k->get_fw_dev_path = usb_get_fw_dev_path;
}
| @@ -49,7 +49,9 @@ static int usb_device_post_load(void *opaque, int version_id)
} else {
dev->attached = 1;
}
- if (dev->setup_index >= sizeof(dev->data_buf) ||
+ if (dev->setup_index < 0 ||
+ dev->setup_len < 0 ||
+ dev->setup_index >= sizeof(dev->data_buf) ||
dev->setup... | CWE-119 | null | null |
12,538 | static void scoop_gpio_set(void *opaque, int line, int level)
{
ScoopInfo *s = (ScoopInfo *) opaque;
if (level)
s->gpio_level |= (1 << line);
else
s->gpio_level &= ~(1 << line);
}
| Exec Code Overflow | 0 | static void scoop_gpio_set(void *opaque, int line, int level)
{
ScoopInfo *s = (ScoopInfo *) opaque;
if (level)
s->gpio_level |= (1 << line);
else
s->gpio_level &= ~(1 << line);
}
| @@ -203,6 +203,15 @@ static bool is_version_0 (void *opaque, int version_id)
return version_id == 0;
}
+static bool vmstate_scoop_validate(void *opaque, int version_id)
+{
+ ScoopInfo *s = opaque;
+
+ return !(s->prev_level & 0xffff0000) &&
+ !(s->gpio_level & 0xffff0000) &&
+ !(s->gpio_dir ... | CWE-119 | null | null |
12,539 | static int scoop_post_load(void *opaque, int version_id)
{
ScoopInfo *s = (ScoopInfo *) opaque;
int i;
uint32_t level;
level = s->gpio_level & s->gpio_dir;
for (i = 0; i < 16; i++) {
qemu_set_irq(s->handler[i], (level >> i) & 1);
}
s->prev_level = level;
return 0;
}
| Exec Code Overflow | 0 | static int scoop_post_load(void *opaque, int version_id)
{
ScoopInfo *s = (ScoopInfo *) opaque;
int i;
uint32_t level;
level = s->gpio_level & s->gpio_dir;
for (i = 0; i < 16; i++) {
qemu_set_irq(s->handler[i], (level >> i) & 1);
}
s->prev_level = level;
return 0;
}
| @@ -203,6 +203,15 @@ static bool is_version_0 (void *opaque, int version_id)
return version_id == 0;
}
+static bool vmstate_scoop_validate(void *opaque, int version_id)
+{
+ ScoopInfo *s = opaque;
+
+ return !(s->prev_level & 0xffff0000) &&
+ !(s->gpio_level & 0xffff0000) &&
+ !(s->gpio_dir ... | CWE-119 | null | null |
12,540 | static uint64_t scoop_read(void *opaque, hwaddr addr,
unsigned size)
{
ScoopInfo *s = (ScoopInfo *) opaque;
switch (addr & 0x3f) {
case SCOOP_MCR:
return s->mcr;
case SCOOP_CDR:
return s->cdr;
case SCOOP_CSR:
return s->status;
case SCOOP_CPR:
... | Exec Code Overflow | 0 | static uint64_t scoop_read(void *opaque, hwaddr addr,
unsigned size)
{
ScoopInfo *s = (ScoopInfo *) opaque;
switch (addr & 0x3f) {
case SCOOP_MCR:
return s->mcr;
case SCOOP_CDR:
return s->cdr;
case SCOOP_CSR:
return s->status;
case SCOOP_CPR:
... | @@ -203,6 +203,15 @@ static bool is_version_0 (void *opaque, int version_id)
return version_id == 0;
}
+static bool vmstate_scoop_validate(void *opaque, int version_id)
+{
+ ScoopInfo *s = opaque;
+
+ return !(s->prev_level & 0xffff0000) &&
+ !(s->gpio_level & 0xffff0000) &&
+ !(s->gpio_dir ... | CWE-119 | null | null |
12,541 | static void scoop_register_types(void)
{
type_register_static(&scoop_sysbus_info);
}
| Exec Code Overflow | 0 | static void scoop_register_types(void)
{
type_register_static(&scoop_sysbus_info);
}
| @@ -203,6 +203,15 @@ static bool is_version_0 (void *opaque, int version_id)
return version_id == 0;
}
+static bool vmstate_scoop_validate(void *opaque, int version_id)
+{
+ ScoopInfo *s = opaque;
+
+ return !(s->prev_level & 0xffff0000) &&
+ !(s->gpio_level & 0xffff0000) &&
+ !(s->gpio_dir ... | CWE-119 | null | null |
12,542 | static void scoop_sysbus_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = scoop_init;
dc->desc = "Scoop2 Sharp custom ASIC";
dc->vmsd = &vmstate_scoop_regs;
dc->props = scoop_sysbus_properties;
}
| Exec Code Overflow | 0 | static void scoop_sysbus_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = scoop_init;
dc->desc = "Scoop2 Sharp custom ASIC";
dc->vmsd = &vmstate_scoop_regs;
dc->props = scoop_sysbus_properties;
}
| @@ -203,6 +203,15 @@ static bool is_version_0 (void *opaque, int version_id)
return version_id == 0;
}
+static bool vmstate_scoop_validate(void *opaque, int version_id)
+{
+ ScoopInfo *s = opaque;
+
+ return !(s->prev_level & 0xffff0000) &&
+ !(s->gpio_level & 0xffff0000) &&
+ !(s->gpio_dir ... | CWE-119 | null | null |
12,543 | static void scoop_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
ScoopInfo *s = (ScoopInfo *) opaque;
value &= 0xffff;
switch (addr & 0x3f) {
case SCOOP_MCR:
s->mcr = value;
break;
case SCOOP_CDR:
s->cdr = value;
break;
... | Exec Code Overflow | 0 | static void scoop_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
ScoopInfo *s = (ScoopInfo *) opaque;
value &= 0xffff;
switch (addr & 0x3f) {
case SCOOP_MCR:
s->mcr = value;
break;
case SCOOP_CDR:
s->cdr = value;
break;
... | @@ -203,6 +203,15 @@ static bool is_version_0 (void *opaque, int version_id)
return version_id == 0;
}
+static bool vmstate_scoop_validate(void *opaque, int version_id)
+{
+ ScoopInfo *s = opaque;
+
+ return !(s->prev_level & 0xffff0000) &&
+ !(s->gpio_level & 0xffff0000) &&
+ !(s->gpio_dir ... | CWE-119 | null | null |
12,544 | static void tsc2102_audio_output_update(TSC210xState *s)
{
int enable;
struct audsettings fmt;
if (s->dac_voice[0]) {
tsc210x_out_flush(s, s->codec.out.len);
s->codec.out.size = 0;
AUD_set_active_out(s->dac_voice[0], 0);
AUD_close_out(&s->card, s->dac_voice[0]);
s->d... | Exec Code Overflow | 0 | static void tsc2102_audio_output_update(TSC210xState *s)
{
int enable;
struct audsettings fmt;
if (s->dac_voice[0]) {
tsc210x_out_flush(s, s->codec.out.len);
s->codec.out.size = 0;
AUD_set_active_out(s->dac_voice[0], 0);
AUD_close_out(&s->card, s->dac_voice[0]);
s->d... | @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,545 | static uint16_t tsc2102_audio_register_read(TSC210xState *s, int reg)
{
int l_ch, r_ch;
uint16_t val;
switch (reg) {
case 0x00: /* Audio Control 1 */
return s->audio_ctrl1;
case 0x01:
return 0xff00;
case 0x02: /* DAC Volume Control */
return s->volume;
case 0x03:
... | Exec Code Overflow | 0 | static uint16_t tsc2102_audio_register_read(TSC210xState *s, int reg)
{
int l_ch, r_ch;
uint16_t val;
switch (reg) {
case 0x00: /* Audio Control 1 */
return s->audio_ctrl1;
case 0x01:
return 0xff00;
case 0x02: /* DAC Volume Control */
return s->volume;
case 0x03:
... | @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,546 | static void tsc2102_audio_register_write(
TSC210xState *s, int reg, uint16_t value)
{
switch (reg) {
case 0x00: /* Audio Control 1 */
s->audio_ctrl1 = value & 0x0f3f;
#ifdef TSC_VERBOSE
if ((value & ~0x0f3f) || ((value & 7) != ((value >> 3) & 7)))
fprintf(stderr, "tsc... | Exec Code Overflow | 0 | static void tsc2102_audio_register_write(
TSC210xState *s, int reg, uint16_t value)
{
switch (reg) {
case 0x00: /* Audio Control 1 */
s->audio_ctrl1 = value & 0x0f3f;
#ifdef TSC_VERBOSE
if ((value & ~0x0f3f) || ((value & 7) != ((value >> 3) & 7)))
fprintf(stderr, "tsc... | @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,547 | static uint16_t tsc2102_control_register_read(
TSC210xState *s, int reg)
{
switch (reg) {
case 0x00: /* TSC ADC */
return (s->pressure << 15) | ((!s->busy) << 14) |
(s->nextfunction << 10) | (s->nextprecision << 8) | s->filter;
case 0x01: /* Status / Keypad Control ... | Exec Code Overflow | 0 | static uint16_t tsc2102_control_register_read(
TSC210xState *s, int reg)
{
switch (reg) {
case 0x00: /* TSC ADC */
return (s->pressure << 15) | ((!s->busy) << 14) |
(s->nextfunction << 10) | (s->nextprecision << 8) | s->filter;
case 0x01: /* Status / Keypad Control ... | @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,548 | static void tsc2102_control_register_write(
TSC210xState *s, int reg, uint16_t value)
{
switch (reg) {
case 0x00: /* TSC ADC */
s->host_mode = value >> 15;
s->enabled = !(value & 0x4000);
if (s->busy && !s->enabled)
timer_del(s->timer);
s->busy &= s->e... | Exec Code Overflow | 0 | static void tsc2102_control_register_write(
TSC210xState *s, int reg, uint16_t value)
{
switch (reg) {
case 0x00: /* TSC ADC */
s->host_mode = value >> 15;
s->enabled = !(value & 0x4000);
if (s->busy && !s->enabled)
timer_del(s->timer);
s->busy &= s->e... | @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,549 | static uint16_t tsc2102_data_register_read(TSC210xState *s, int reg)
{
switch (reg) {
case 0x00: /* X */
s->dav &= 0xfbff;
return TSC_CUT_RESOLUTION(X_TRANSFORM(s), s->precision) +
(s->noise & 3);
case 0x01: /* Y */
s->noise ++;
s->dav &= 0xfdff;
retu... | Exec Code Overflow | 0 | static uint16_t tsc2102_data_register_read(TSC210xState *s, int reg)
{
switch (reg) {
case 0x00: /* X */
s->dav &= 0xfbff;
return TSC_CUT_RESOLUTION(X_TRANSFORM(s), s->precision) +
(s->noise & 3);
case 0x01: /* Y */
s->noise ++;
s->dav &= 0xfdff;
retu... | @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,550 | static void tsc2102_data_register_write(
TSC210xState *s, int reg, uint16_t value)
{
switch (reg) {
case 0x00: /* X */
case 0x01: /* Y */
case 0x02: /* Z1 */
case 0x03: /* Z2 */
case 0x05: /* BAT1 */
case 0x06: /* BAT2 */
case 0x07: /* AUX1 */
case 0x08: /* AUX2 */
... | Exec Code Overflow | 0 | static void tsc2102_data_register_write(
TSC210xState *s, int reg, uint16_t value)
{
switch (reg) {
case 0x00: /* X */
case 0x01: /* Y */
case 0x02: /* Z1 */
case 0x03: /* Z2 */
case 0x05: /* BAT1 */
case 0x06: /* BAT2 */
case 0x07: /* AUX1 */
case 0x08: /* AUX2 */
... | @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,551 | static void tsc210x_audio_out_cb(TSC210xState *s, int free_b)
{
if (s->codec.out.len >= free_b) {
tsc210x_out_flush(s, free_b);
return;
}
s->codec.out.size = MIN(free_b, 16384);
qemu_irq_raise(s->codec.tx_start);
}
| Exec Code Overflow | 0 | static void tsc210x_audio_out_cb(TSC210xState *s, int free_b)
{
if (s->codec.out.len >= free_b) {
tsc210x_out_flush(s, free_b);
return;
}
s->codec.out.size = MIN(free_b, 16384);
qemu_irq_raise(s->codec.tx_start);
}
| @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,552 | static void tsc210x_i2s_set_rate(TSC210xState *s, int in, int out)
{
s->i2s_tx_rate = out;
s->i2s_rx_rate = in;
}
| Exec Code Overflow | 0 | static void tsc210x_i2s_set_rate(TSC210xState *s, int in, int out)
{
s->i2s_tx_rate = out;
s->i2s_rx_rate = in;
}
| @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,553 | static void tsc210x_i2s_swallow(TSC210xState *s)
{
if (s->dac_voice[0])
tsc210x_out_flush(s, s->codec.out.len);
else
s->codec.out.len = 0;
}
| Exec Code Overflow | 0 | static void tsc210x_i2s_swallow(TSC210xState *s)
{
if (s->dac_voice[0])
tsc210x_out_flush(s, s->codec.out.len);
else
s->codec.out.len = 0;
}
| @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,554 | void tsc210x_key_event(uWireSlave *chip, int key, int down)
{
TSC210xState *s = (TSC210xState *) chip->opaque;
if (down)
s->kb.down |= 1 << key;
else
s->kb.down &= ~(1 << key);
if (down && (s->kb.down & ~s->kb.mask) && !s->kb.intr) {
s->kb.intr = 1;
qemu_irq_lower(s->kb... | Exec Code Overflow | 0 | void tsc210x_key_event(uWireSlave *chip, int key, int down)
{
TSC210xState *s = (TSC210xState *) chip->opaque;
if (down)
s->kb.down |= 1 << key;
else
s->kb.down &= ~(1 << key);
if (down && (s->kb.down & ~s->kb.mask) && !s->kb.intr) {
s->kb.intr = 1;
qemu_irq_lower(s->kb... | @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,555 | static inline void tsc210x_out_flush(TSC210xState *s, int len)
{
uint8_t *data = s->codec.out.fifo + s->codec.out.start;
uint8_t *end = data + len;
while (data < end)
data += AUD_write(s->dac_voice[0], data, end - data) ?: (end - data);
s->codec.out.len -= len;
if (s->codec.out.len)
... | Exec Code Overflow | 0 | static inline void tsc210x_out_flush(TSC210xState *s, int len)
{
uint8_t *data = s->codec.out.fifo + s->codec.out.start;
uint8_t *end = data + len;
while (data < end)
data += AUD_write(s->dac_voice[0], data, end - data) ?: (end - data);
s->codec.out.len -= len;
if (s->codec.out.len)
... | @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,556 | static uint16_t tsc210x_read(TSC210xState *s)
{
uint16_t ret = 0x0000;
if (!s->command)
fprintf(stderr, "tsc210x_read: SPI underrun!\n");
switch (s->page) {
case TSC_DATA_REGISTERS_PAGE:
ret = tsc2102_data_register_read(s, s->offset);
if (!s->dav)
qemu_irq_raise(s->... | Exec Code Overflow | 0 | static uint16_t tsc210x_read(TSC210xState *s)
{
uint16_t ret = 0x0000;
if (!s->command)
fprintf(stderr, "tsc210x_read: SPI underrun!\n");
switch (s->page) {
case TSC_DATA_REGISTERS_PAGE:
ret = tsc2102_data_register_read(s, s->offset);
if (!s->dav)
qemu_irq_raise(s->... | @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,557 | static void tsc210x_reset(TSC210xState *s)
{
s->state = 0;
s->pin_func = 2;
s->enabled = 0;
s->busy = 0;
s->nextfunction = 0;
s->ref = 0;
s->timing = 0;
s->irq = 0;
s->dav = 0;
s->audio_ctrl1 = 0x0000;
s->audio_ctrl2 = 0x4410;
s->audio_ctrl3 = 0x0000;
s->pll[0] = 0x1... | Exec Code Overflow | 0 | static void tsc210x_reset(TSC210xState *s)
{
s->state = 0;
s->pin_func = 2;
s->enabled = 0;
s->busy = 0;
s->nextfunction = 0;
s->ref = 0;
s->timing = 0;
s->irq = 0;
s->dav = 0;
s->audio_ctrl1 = 0x0000;
s->audio_ctrl2 = 0x4410;
s->audio_ctrl3 = 0x0000;
s->pll[0] = 0x1... | @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,558 | static void tsc210x_save(QEMUFile *f, void *opaque)
{
TSC210xState *s = (TSC210xState *) opaque;
int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
int i;
qemu_put_be16(f, s->x);
qemu_put_be16(f, s->y);
qemu_put_byte(f, s->pressure);
qemu_put_byte(f, s->state);
qemu_put_byte(f, s->pa... | Exec Code Overflow | 0 | static void tsc210x_save(QEMUFile *f, void *opaque)
{
TSC210xState *s = (TSC210xState *) opaque;
int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
int i;
qemu_put_be16(f, s->x);
qemu_put_be16(f, s->y);
qemu_put_byte(f, s->pressure);
qemu_put_byte(f, s->state);
qemu_put_byte(f, s->pa... | @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,559 | void tsc210x_set_transform(uWireSlave *chip,
MouseTransformInfo *info)
{
TSC210xState *s = (TSC210xState *) chip->opaque;
#if 0
int64_t ltr[8];
ltr[0] = (int64_t) info->a[1] * info->y;
ltr[1] = (int64_t) info->a[4] * info->x;
ltr[2] = (int64_t) info->a[1] * info->a[3] -
... | Exec Code Overflow | 0 | void tsc210x_set_transform(uWireSlave *chip,
MouseTransformInfo *info)
{
TSC210xState *s = (TSC210xState *) chip->opaque;
#if 0
int64_t ltr[8];
ltr[0] = (int64_t) info->a[1] * info->y;
ltr[1] = (int64_t) info->a[4] * info->x;
ltr[2] = (int64_t) info->a[1] * info->a[3] -
... | @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,560 | static void tsc210x_timer_tick(void *opaque)
{
TSC210xState *s = opaque;
/* Timer ticked -- a set of conversions has been finished. */
if (!s->busy)
return;
s->busy = 0;
s->dav |= mode_regs[s->function];
tsc210x_pin_update(s);
qemu_irq_lower(s->davint);
}
| Exec Code Overflow | 0 | static void tsc210x_timer_tick(void *opaque)
{
TSC210xState *s = opaque;
/* Timer ticked -- a set of conversions has been finished. */
if (!s->busy)
return;
s->busy = 0;
s->dav |= mode_regs[s->function];
tsc210x_pin_update(s);
qemu_irq_lower(s->davint);
}
| @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,561 | uint32_t tsc210x_txrx(void *opaque, uint32_t value, int len)
{
TSC210xState *s = opaque;
uint32_t ret = 0;
if (len != 16)
hw_error("%s: FIXME: bad SPI word width %i\n", __FUNCTION__, len);
/* TODO: sequential reads etc - how do we make sure the host doesn't
* unintentionally read out a co... | Exec Code Overflow | 0 | uint32_t tsc210x_txrx(void *opaque, uint32_t value, int len)
{
TSC210xState *s = opaque;
uint32_t ret = 0;
if (len != 16)
hw_error("%s: FIXME: bad SPI word width %i\n", __FUNCTION__, len);
/* TODO: sequential reads etc - how do we make sure the host doesn't
* unintentionally read out a co... | @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,562 | static void tsc210x_write(TSC210xState *s, uint16_t value)
{
/*
* This is a two-state state machine for reading
* command and data every second time.
*/
if (!s->state) {
s->command = value >> 15;
s->page = (value >> 11) & 0x0f;
s->offset = (value >> 5) & 0x3f;
s->s... | Exec Code Overflow | 0 | static void tsc210x_write(TSC210xState *s, uint16_t value)
{
/*
* This is a two-state state machine for reading
* command and data every second time.
*/
if (!s->state) {
s->command = value >> 15;
s->page = (value >> 11) & 0x0f;
s->offset = (value >> 5) & 0x3f;
s->s... | @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,563 | uWireSlave *tsc2301_init(qemu_irq penirq, qemu_irq kbirq, qemu_irq dav)
{
TSC210xState *s;
s = (TSC210xState *)
g_malloc0(sizeof(TSC210xState));
memset(s, 0, sizeof(TSC210xState));
s->x = 400;
s->y = 240;
s->pressure = 0;
s->precision = s->nextprecision = 0;
s->timer = timer... | Exec Code Overflow | 0 | uWireSlave *tsc2301_init(qemu_irq penirq, qemu_irq kbirq, qemu_irq dav)
{
TSC210xState *s;
s = (TSC210xState *)
g_malloc0(sizeof(TSC210xState));
memset(s, 0, sizeof(TSC210xState));
s->x = 400;
s->y = 240;
s->pressure = 0;
s->precision = s->nextprecision = 0;
s->timer = timer... | @@ -1070,9 +1070,21 @@ static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
s->enabled = qemu_get_byte(f);
s->host_mode = qemu_get_byte(f);
s->function = qemu_get_byte(f);
+ if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
+ return -EINVAL;
+ }
s->nextfunctio... | CWE-119 | null | null |
12,564 | static void ssd03232_register_types(void)
{
type_register_static(&ssd0323_info);
}
| DoS Exec Code Overflow Mem. Corr. | 0 | static void ssd03232_register_types(void)
{
type_register_static(&ssd0323_info);
}
| @@ -312,18 +312,42 @@ static int ssd0323_load(QEMUFile *f, void *opaque, int version_id)
return -EINVAL;
s->cmd_len = qemu_get_be32(f);
+ if (s->cmd_len < 0 || s->cmd_len > ARRAY_SIZE(s->cmd_data)) {
+ return -EINVAL;
+ }
s->cmd = qemu_get_be32(f);
for (i = 0; i < 8; i++)
... | CWE-119 | null | null |
12,565 | static void ssd0323_cd(void *opaque, int n, int level)
{
ssd0323_state *s = (ssd0323_state *)opaque;
DPRINTF("%s mode\n", level ? "Data" : "Command");
s->mode = level ? SSD0323_DATA : SSD0323_CMD;
}
| DoS Exec Code Overflow Mem. Corr. | 0 | static void ssd0323_cd(void *opaque, int n, int level)
{
ssd0323_state *s = (ssd0323_state *)opaque;
DPRINTF("%s mode\n", level ? "Data" : "Command");
s->mode = level ? SSD0323_DATA : SSD0323_CMD;
}
| @@ -312,18 +312,42 @@ static int ssd0323_load(QEMUFile *f, void *opaque, int version_id)
return -EINVAL;
s->cmd_len = qemu_get_be32(f);
+ if (s->cmd_len < 0 || s->cmd_len > ARRAY_SIZE(s->cmd_data)) {
+ return -EINVAL;
+ }
s->cmd = qemu_get_be32(f);
for (i = 0; i < 8; i++)
... | CWE-119 | null | null |
12,566 | static void ssd0323_invalidate_display(void * opaque)
{
ssd0323_state *s = (ssd0323_state *)opaque;
s->redraw = 1;
}
| DoS Exec Code Overflow Mem. Corr. | 0 | static void ssd0323_invalidate_display(void * opaque)
{
ssd0323_state *s = (ssd0323_state *)opaque;
s->redraw = 1;
}
| @@ -312,18 +312,42 @@ static int ssd0323_load(QEMUFile *f, void *opaque, int version_id)
return -EINVAL;
s->cmd_len = qemu_get_be32(f);
+ if (s->cmd_len < 0 || s->cmd_len > ARRAY_SIZE(s->cmd_data)) {
+ return -EINVAL;
+ }
s->cmd = qemu_get_be32(f);
for (i = 0; i < 8; i++)
... | CWE-119 | null | null |
12,567 | static void ssd0323_save(QEMUFile *f, void *opaque)
{
SSISlave *ss = SSI_SLAVE(opaque);
ssd0323_state *s = (ssd0323_state *)opaque;
int i;
qemu_put_be32(f, s->cmd_len);
qemu_put_be32(f, s->cmd);
for (i = 0; i < 8; i++)
qemu_put_be32(f, s->cmd_data[i]);
qemu_put_be32(f, s->row);
... | DoS Exec Code Overflow Mem. Corr. | 0 | static void ssd0323_save(QEMUFile *f, void *opaque)
{
SSISlave *ss = SSI_SLAVE(opaque);
ssd0323_state *s = (ssd0323_state *)opaque;
int i;
qemu_put_be32(f, s->cmd_len);
qemu_put_be32(f, s->cmd);
for (i = 0; i < 8; i++)
qemu_put_be32(f, s->cmd_data[i]);
qemu_put_be32(f, s->row);
... | @@ -312,18 +312,42 @@ static int ssd0323_load(QEMUFile *f, void *opaque, int version_id)
return -EINVAL;
s->cmd_len = qemu_get_be32(f);
+ if (s->cmd_len < 0 || s->cmd_len > ARRAY_SIZE(s->cmd_data)) {
+ return -EINVAL;
+ }
s->cmd = qemu_get_be32(f);
for (i = 0; i < 8; i++)
... | CWE-119 | null | null |
12,568 | static uint32_t ssd0323_transfer(SSISlave *dev, uint32_t data)
{
ssd0323_state *s = FROM_SSI_SLAVE(ssd0323_state, dev);
switch (s->mode) {
case SSD0323_DATA:
DPRINTF("data 0x%02x\n", data);
s->framebuffer[s->col + s->row * 64] = data;
if (s->remap & REMAP_VERTICAL) {
s->... | DoS Exec Code Overflow Mem. Corr. | 0 | static uint32_t ssd0323_transfer(SSISlave *dev, uint32_t data)
{
ssd0323_state *s = FROM_SSI_SLAVE(ssd0323_state, dev);
switch (s->mode) {
case SSD0323_DATA:
DPRINTF("data 0x%02x\n", data);
s->framebuffer[s->col + s->row * 64] = data;
if (s->remap & REMAP_VERTICAL) {
s->... | @@ -312,18 +312,42 @@ static int ssd0323_load(QEMUFile *f, void *opaque, int version_id)
return -EINVAL;
s->cmd_len = qemu_get_be32(f);
+ if (s->cmd_len < 0 || s->cmd_len > ARRAY_SIZE(s->cmd_data)) {
+ return -EINVAL;
+ }
s->cmd = qemu_get_be32(f);
for (i = 0; i < 8; i++)
... | CWE-119 | null | null |
12,569 | static void ssd0323_update_display(void *opaque)
{
ssd0323_state *s = (ssd0323_state *)opaque;
DisplaySurface *surface = qemu_console_surface(s->con);
uint8_t *dest;
uint8_t *src;
int x;
int y;
int i;
int line;
char *colors[16];
char colortab[MAGNIFY * 64];
char *p;
int d... | DoS Exec Code Overflow Mem. Corr. | 0 | static void ssd0323_update_display(void *opaque)
{
ssd0323_state *s = (ssd0323_state *)opaque;
DisplaySurface *surface = qemu_console_surface(s->con);
uint8_t *dest;
uint8_t *src;
int x;
int y;
int i;
int line;
char *colors[16];
char colortab[MAGNIFY * 64];
char *p;
int d... | @@ -312,18 +312,42 @@ static int ssd0323_load(QEMUFile *f, void *opaque, int version_id)
return -EINVAL;
s->cmd_len = qemu_get_be32(f);
+ if (s->cmd_len < 0 || s->cmd_len > ARRAY_SIZE(s->cmd_data)) {
+ return -EINVAL;
+ }
s->cmd = qemu_get_be32(f);
for (i = 0; i < 8; i++)
... | CWE-119 | null | null |
12,570 | static void ssi_sd_class_init(ObjectClass *klass, void *data)
{
SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
k->init = ssi_sd_init;
k->transfer = ssi_sd_transfer;
k->cs_polarity = SSI_CS_LOW;
}
| Exec Code | 0 | static void ssi_sd_class_init(ObjectClass *klass, void *data)
{
SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
k->init = ssi_sd_init;
k->transfer = ssi_sd_transfer;
k->cs_polarity = SSI_CS_LOW;
}
| @@ -230,8 +230,17 @@ static int ssi_sd_load(QEMUFile *f, void *opaque, int version_id)
for (i = 0; i < 5; i++)
s->response[i] = qemu_get_be32(f);
s->arglen = qemu_get_be32(f);
+ if (s->mode == SSI_SD_CMDARG &&
+ (s->arglen < 0 || s->arglen >= ARRAY_SIZE(s->cmdarg))) {
+ return -EINVA... | CWE-94 | null | null |
12,571 | static void ssi_sd_register_types(void)
{
type_register_static(&ssi_sd_info);
}
| Exec Code | 0 | static void ssi_sd_register_types(void)
{
type_register_static(&ssi_sd_info);
}
| @@ -230,8 +230,17 @@ static int ssi_sd_load(QEMUFile *f, void *opaque, int version_id)
for (i = 0; i < 5; i++)
s->response[i] = qemu_get_be32(f);
s->arglen = qemu_get_be32(f);
+ if (s->mode == SSI_SD_CMDARG &&
+ (s->arglen < 0 || s->arglen >= ARRAY_SIZE(s->cmdarg))) {
+ return -EINVA... | CWE-94 | null | null |
12,572 | static void ssi_sd_save(QEMUFile *f, void *opaque)
{
SSISlave *ss = SSI_SLAVE(opaque);
ssi_sd_state *s = (ssi_sd_state *)opaque;
int i;
qemu_put_be32(f, s->mode);
qemu_put_be32(f, s->cmd);
for (i = 0; i < 4; i++)
qemu_put_be32(f, s->cmdarg[i]);
for (i = 0; i < 5; i++)
qemu_p... | Exec Code | 0 | static void ssi_sd_save(QEMUFile *f, void *opaque)
{
SSISlave *ss = SSI_SLAVE(opaque);
ssi_sd_state *s = (ssi_sd_state *)opaque;
int i;
qemu_put_be32(f, s->mode);
qemu_put_be32(f, s->cmd);
for (i = 0; i < 4; i++)
qemu_put_be32(f, s->cmdarg[i]);
for (i = 0; i < 5; i++)
qemu_p... | @@ -230,8 +230,17 @@ static int ssi_sd_load(QEMUFile *f, void *opaque, int version_id)
for (i = 0; i < 5; i++)
s->response[i] = qemu_get_be32(f);
s->arglen = qemu_get_be32(f);
+ if (s->mode == SSI_SD_CMDARG &&
+ (s->arglen < 0 || s->arglen >= ARRAY_SIZE(s->cmdarg))) {
+ return -EINVA... | CWE-94 | null | null |
12,573 | static void IRQ_check(OpenPICState *opp, IRQQueue *q)
{
int irq = -1;
int next = -1;
int priority = -1;
for (;;) {
irq = find_next_bit(q->queue, opp->max_irq, irq + 1);
if (irq == opp->max_irq) {
break;
}
DPRINTF("IRQ_check: irq %d set ivpr_pr=%d pr=%d\n",
... | DoS Exec Code Overflow | 0 | static void IRQ_check(OpenPICState *opp, IRQQueue *q)
{
int irq = -1;
int next = -1;
int priority = -1;
for (;;) {
irq = find_next_bit(q->queue, opp->max_irq, irq + 1);
if (irq == opp->max_irq) {
break;
}
DPRINTF("IRQ_check: irq %d set ivpr_pr=%d pr=%d\n",
... | @@ -41,6 +41,7 @@
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
#include "qemu/bitops.h"
+#include "qapi/qmp/qerror.h"
//#define DEBUG_OPENPIC
@@ -1416,7 +1417,7 @@ static void openpic_load_IRQ_queue(QEMUFile* f, IRQQueue *q)
static int openpic_load(QEMUFile* f, void *opaque, int version_id)
{
OpenPICSt... | CWE-119 | null | null |
12,574 | static int IRQ_get_next(OpenPICState *opp, IRQQueue *q)
{
/* XXX: optimize */
IRQ_check(opp, q);
return q->next;
}
| DoS Exec Code Overflow | 0 | static int IRQ_get_next(OpenPICState *opp, IRQQueue *q)
{
/* XXX: optimize */
IRQ_check(opp, q);
return q->next;
}
| @@ -41,6 +41,7 @@
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
#include "qemu/bitops.h"
+#include "qapi/qmp/qerror.h"
//#define DEBUG_OPENPIC
@@ -1416,7 +1417,7 @@ static void openpic_load_IRQ_queue(QEMUFile* f, IRQQueue *q)
static int openpic_load(QEMUFile* f, void *opaque, int version_id)
{
OpenPICSt... | CWE-119 | null | null |
12,575 | static void IRQ_local_pipe(OpenPICState *opp, int n_CPU, int n_IRQ,
bool active, bool was_active)
{
IRQDest *dst;
IRQSource *src;
int priority;
dst = &opp->dst[n_CPU];
src = &opp->src[n_IRQ];
DPRINTF("%s: IRQ %d active %d was %d\n",
__func__, n_IRQ, activ... | DoS Exec Code Overflow | 0 | static void IRQ_local_pipe(OpenPICState *opp, int n_CPU, int n_IRQ,
bool active, bool was_active)
{
IRQDest *dst;
IRQSource *src;
int priority;
dst = &opp->dst[n_CPU];
src = &opp->src[n_IRQ];
DPRINTF("%s: IRQ %d active %d was %d\n",
__func__, n_IRQ, activ... | @@ -41,6 +41,7 @@
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
#include "qemu/bitops.h"
+#include "qapi/qmp/qerror.h"
//#define DEBUG_OPENPIC
@@ -1416,7 +1417,7 @@ static void openpic_load_IRQ_queue(QEMUFile* f, IRQQueue *q)
static int openpic_load(QEMUFile* f, void *opaque, int version_id)
{
OpenPICSt... | CWE-119 | null | null |
12,576 | static inline void IRQ_setbit(IRQQueue *q, int n_IRQ)
{
set_bit(n_IRQ, q->queue);
}
| DoS Exec Code Overflow | 0 | static inline void IRQ_setbit(IRQQueue *q, int n_IRQ)
{
set_bit(n_IRQ, q->queue);
}
| @@ -41,6 +41,7 @@
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
#include "qemu/bitops.h"
+#include "qapi/qmp/qerror.h"
//#define DEBUG_OPENPIC
@@ -1416,7 +1417,7 @@ static void openpic_load_IRQ_queue(QEMUFile* f, IRQQueue *q)
static int openpic_load(QEMUFile* f, void *opaque, int version_id)
{
OpenPICSt... | CWE-119 | null | null |
12,577 | static inline int IRQ_testbit(IRQQueue *q, int n_IRQ)
{
return test_bit(n_IRQ, q->queue);
}
| DoS Exec Code Overflow | 0 | static inline int IRQ_testbit(IRQQueue *q, int n_IRQ)
{
return test_bit(n_IRQ, q->queue);
}
| @@ -41,6 +41,7 @@
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
#include "qemu/bitops.h"
+#include "qapi/qmp/qerror.h"
//#define DEBUG_OPENPIC
@@ -1416,7 +1417,7 @@ static void openpic_load_IRQ_queue(QEMUFile* f, IRQQueue *q)
static int openpic_load(QEMUFile* f, void *opaque, int version_id)
{
OpenPICSt... | CWE-119 | null | null |
12,578 | static int inttgt_to_output(int inttgt)
{
int i;
for (i = 0; i < ARRAY_SIZE(inttgt_output); i++) {
if (inttgt_output[i][0] == inttgt) {
return inttgt_output[i][1];
}
}
fprintf(stderr, "%s: unsupported inttgt %d\n", __func__, inttgt);
return OPENPIC_OUTPUT_INT;
}
| DoS Exec Code Overflow | 0 | static int inttgt_to_output(int inttgt)
{
int i;
for (i = 0; i < ARRAY_SIZE(inttgt_output); i++) {
if (inttgt_output[i][0] == inttgt) {
return inttgt_output[i][1];
}
}
fprintf(stderr, "%s: unsupported inttgt %d\n", __func__, inttgt);
return OPENPIC_OUTPUT_INT;
}
| @@ -41,6 +41,7 @@
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
#include "qemu/bitops.h"
+#include "qapi/qmp/qerror.h"
//#define DEBUG_OPENPIC
@@ -1416,7 +1417,7 @@ static void openpic_load_IRQ_queue(QEMUFile* f, IRQQueue *q)
static int openpic_load(QEMUFile* f, void *opaque, int version_id)
{
OpenPICSt... | CWE-119 | null | null |
12,579 | static uint64_t openpic_cpu_read(void *opaque, hwaddr addr, unsigned len)
{
return openpic_cpu_read_internal(opaque, addr, (addr & 0x1f000) >> 12);
}
| DoS Exec Code Overflow | 0 | static uint64_t openpic_cpu_read(void *opaque, hwaddr addr, unsigned len)
{
return openpic_cpu_read_internal(opaque, addr, (addr & 0x1f000) >> 12);
}
| @@ -41,6 +41,7 @@
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
#include "qemu/bitops.h"
+#include "qapi/qmp/qerror.h"
//#define DEBUG_OPENPIC
@@ -1416,7 +1417,7 @@ static void openpic_load_IRQ_queue(QEMUFile* f, IRQQueue *q)
static int openpic_load(QEMUFile* f, void *opaque, int version_id)
{
OpenPICSt... | CWE-119 | null | null |
12,580 | static void openpic_cpu_write(void *opaque, hwaddr addr, uint64_t val,
unsigned len)
{
openpic_cpu_write_internal(opaque, addr, val, (addr & 0x1f000) >> 12);
}
| DoS Exec Code Overflow | 0 | static void openpic_cpu_write(void *opaque, hwaddr addr, uint64_t val,
unsigned len)
{
openpic_cpu_write_internal(opaque, addr, val, (addr & 0x1f000) >> 12);
}
| @@ -41,6 +41,7 @@
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
#include "qemu/bitops.h"
+#include "qapi/qmp/qerror.h"
//#define DEBUG_OPENPIC
@@ -1416,7 +1417,7 @@ static void openpic_load_IRQ_queue(QEMUFile* f, IRQQueue *q)
static int openpic_load(QEMUFile* f, void *opaque, int version_id)
{
OpenPICSt... | CWE-119 | null | null |
12,581 | static void openpic_cpu_write_internal(void *opaque, hwaddr addr,
uint32_t val, int idx)
{
OpenPICState *opp = opaque;
IRQSource *src;
IRQDest *dst;
int s_IRQ, n_IRQ;
DPRINTF("%s: cpu %d addr %#" HWADDR_PRIx " <= 0x%08x\n", __func__, idx,
addr, val... | DoS Exec Code Overflow | 0 | static void openpic_cpu_write_internal(void *opaque, hwaddr addr,
uint32_t val, int idx)
{
OpenPICState *opp = opaque;
IRQSource *src;
IRQDest *dst;
int s_IRQ, n_IRQ;
DPRINTF("%s: cpu %d addr %#" HWADDR_PRIx " <= 0x%08x\n", __func__, idx,
addr, val... | @@ -41,6 +41,7 @@
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
#include "qemu/bitops.h"
+#include "qapi/qmp/qerror.h"
//#define DEBUG_OPENPIC
@@ -1416,7 +1417,7 @@ static void openpic_load_IRQ_queue(QEMUFile* f, IRQQueue *q)
static int openpic_load(QEMUFile* f, void *opaque, int version_id)
{
OpenPICSt... | CWE-119 | null | null |
12,582 | static uint64_t openpic_gbl_read(void *opaque, hwaddr addr, unsigned len)
{
OpenPICState *opp = opaque;
uint32_t retval;
DPRINTF("%s: addr %#" HWADDR_PRIx "\n", __func__, addr);
retval = 0xFFFFFFFF;
if (addr & 0xF) {
return retval;
}
switch (addr) {
case 0x1000: /* FRR */
... | DoS Exec Code Overflow | 0 | static uint64_t openpic_gbl_read(void *opaque, hwaddr addr, unsigned len)
{
OpenPICState *opp = opaque;
uint32_t retval;
DPRINTF("%s: addr %#" HWADDR_PRIx "\n", __func__, addr);
retval = 0xFFFFFFFF;
if (addr & 0xF) {
return retval;
}
switch (addr) {
case 0x1000: /* FRR */
... | @@ -41,6 +41,7 @@
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
#include "qemu/bitops.h"
+#include "qapi/qmp/qerror.h"
//#define DEBUG_OPENPIC
@@ -1416,7 +1417,7 @@ static void openpic_load_IRQ_queue(QEMUFile* f, IRQQueue *q)
static int openpic_load(QEMUFile* f, void *opaque, int version_id)
{
OpenPICSt... | CWE-119 | null | null |
12,583 | static void openpic_gbl_write(void *opaque, hwaddr addr, uint64_t val,
unsigned len)
{
OpenPICState *opp = opaque;
IRQDest *dst;
int idx;
DPRINTF("%s: addr %#" HWADDR_PRIx " <= %08" PRIx64 "\n",
__func__, addr, val);
if (addr & 0xF) {
return;
}
... | DoS Exec Code Overflow | 0 | static void openpic_gbl_write(void *opaque, hwaddr addr, uint64_t val,
unsigned len)
{
OpenPICState *opp = opaque;
IRQDest *dst;
int idx;
DPRINTF("%s: addr %#" HWADDR_PRIx " <= %08" PRIx64 "\n",
__func__, addr, val);
if (addr & 0xF) {
return;
}
... | @@ -41,6 +41,7 @@
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
#include "qemu/bitops.h"
+#include "qapi/qmp/qerror.h"
//#define DEBUG_OPENPIC
@@ -1416,7 +1417,7 @@ static void openpic_load_IRQ_queue(QEMUFile* f, IRQQueue *q)
static int openpic_load(QEMUFile* f, void *opaque, int version_id)
{
OpenPICSt... | CWE-119 | null | null |
12,584 | static void openpic_gcr_write(OpenPICState *opp, uint64_t val)
{
bool mpic_proxy = false;
if (val & GCR_RESET) {
openpic_reset(DEVICE(opp));
return;
}
opp->gcr &= ~opp->mpic_mode_mask;
opp->gcr |= val & opp->mpic_mode_mask;
/* Set external proxy mode */
if ((val & opp->mpi... | DoS Exec Code Overflow | 0 | static void openpic_gcr_write(OpenPICState *opp, uint64_t val)
{
bool mpic_proxy = false;
if (val & GCR_RESET) {
openpic_reset(DEVICE(opp));
return;
}
opp->gcr &= ~opp->mpic_mode_mask;
opp->gcr |= val & opp->mpic_mode_mask;
/* Set external proxy mode */
if ((val & opp->mpi... | @@ -41,6 +41,7 @@
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
#include "qemu/bitops.h"
+#include "qapi/qmp/qerror.h"
//#define DEBUG_OPENPIC
@@ -1416,7 +1417,7 @@ static void openpic_load_IRQ_queue(QEMUFile* f, IRQQueue *q)
static int openpic_load(QEMUFile* f, void *opaque, int version_id)
{
OpenPICSt... | CWE-119 | null | null |
12,585 | static void pxa2xx_clkcfg_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
PXA2xxState *s = (PXA2xxState *)ri->opaque;
s->clkcfg = value & 0xf;
if (value & 2) {
printf("%s: CPU frequency change attempt\n", __func__);
}
}
| DoS Exec Code Overflow | 0 | static void pxa2xx_clkcfg_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
PXA2xxState *s = (PXA2xxState *)ri->opaque;
s->clkcfg = value & 0xf;
if (value & 2) {
printf("%s: CPU frequency change attempt\n", __func__);
}
}
| @@ -732,7 +732,7 @@ static void pxa2xx_ssp_save(QEMUFile *f, void *opaque)
static int pxa2xx_ssp_load(QEMUFile *f, void *opaque, int version_id)
{
PXA2xxSSPState *s = (PXA2xxSSPState *) opaque;
- int i;
+ int i, v;
s->enable = qemu_get_be32(f);
@@ -746,7 +746,11 @@ static int pxa2xx_ssp_load(QEMUF... | CWE-119 | null | null |
12,586 | static uint64_t pxa2xx_cm_read(void *opaque, hwaddr addr,
unsigned size)
{
PXA2xxState *s = (PXA2xxState *) opaque;
switch (addr) {
case CCCR:
case CKEN:
case OSCC:
return s->cm_regs[addr >> 2];
case CCSR:
return s->cm_regs[CCCR >> 2] | (3 << 28);... | DoS Exec Code Overflow | 0 | static uint64_t pxa2xx_cm_read(void *opaque, hwaddr addr,
unsigned size)
{
PXA2xxState *s = (PXA2xxState *) opaque;
switch (addr) {
case CCCR:
case CKEN:
case OSCC:
return s->cm_regs[addr >> 2];
case CCSR:
return s->cm_regs[CCCR >> 2] | (3 << 28);... | @@ -732,7 +732,7 @@ static void pxa2xx_ssp_save(QEMUFile *f, void *opaque)
static int pxa2xx_ssp_load(QEMUFile *f, void *opaque, int version_id)
{
PXA2xxSSPState *s = (PXA2xxSSPState *) opaque;
- int i;
+ int i, v;
s->enable = qemu_get_be32(f);
@@ -746,7 +746,11 @@ static int pxa2xx_ssp_load(QEMUF... | CWE-119 | null | null |
12,587 | static void pxa2xx_cm_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
PXA2xxState *s = (PXA2xxState *) opaque;
switch (addr) {
case CCCR:
case CKEN:
s->cm_regs[addr >> 2] = value;
break;
case OSCC:
s->cm_regs[addr >> 2] &= ~0x6c... | DoS Exec Code Overflow | 0 | static void pxa2xx_cm_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
PXA2xxState *s = (PXA2xxState *) opaque;
switch (addr) {
case CCCR:
case CKEN:
s->cm_regs[addr >> 2] = value;
break;
case OSCC:
s->cm_regs[addr >> 2] &= ~0x6c... | @@ -732,7 +732,7 @@ static void pxa2xx_ssp_save(QEMUFile *f, void *opaque)
static int pxa2xx_ssp_load(QEMUFile *f, void *opaque, int version_id)
{
PXA2xxSSPState *s = (PXA2xxSSPState *) opaque;
- int i;
+ int i, v;
s->enable = qemu_get_be32(f);
@@ -746,7 +746,11 @@ static int pxa2xx_ssp_load(QEMUF... | CWE-119 | null | null |
12,588 | static void pxa2xx_cppmnc_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
PXA2xxState *s = (PXA2xxState *)ri->opaque;
s->pmnc = value;
}
| DoS Exec Code Overflow | 0 | static void pxa2xx_cppmnc_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
PXA2xxState *s = (PXA2xxState *)ri->opaque;
s->pmnc = value;
}
| @@ -732,7 +732,7 @@ static void pxa2xx_ssp_save(QEMUFile *f, void *opaque)
static int pxa2xx_ssp_load(QEMUFile *f, void *opaque, int version_id)
{
PXA2xxSSPState *s = (PXA2xxSSPState *) opaque;
- int i;
+ int i, v;
s->enable = qemu_get_be32(f);
@@ -746,7 +746,11 @@ static int pxa2xx_ssp_load(QEMUF... | CWE-119 | null | null |
12,589 | static uint64_t pxa2xx_mm_read(void *opaque, hwaddr addr,
unsigned size)
{
PXA2xxState *s = (PXA2xxState *) opaque;
switch (addr) {
case MDCNFG ... SA1110:
if ((addr & 3) == 0)
return s->mm_regs[addr >> 2];
default:
printf("%s: Bad register " ... | DoS Exec Code Overflow | 0 | static uint64_t pxa2xx_mm_read(void *opaque, hwaddr addr,
unsigned size)
{
PXA2xxState *s = (PXA2xxState *) opaque;
switch (addr) {
case MDCNFG ... SA1110:
if ((addr & 3) == 0)
return s->mm_regs[addr >> 2];
default:
printf("%s: Bad register " ... | @@ -732,7 +732,7 @@ static void pxa2xx_ssp_save(QEMUFile *f, void *opaque)
static int pxa2xx_ssp_load(QEMUFile *f, void *opaque, int version_id)
{
PXA2xxSSPState *s = (PXA2xxSSPState *) opaque;
- int i;
+ int i, v;
s->enable = qemu_get_be32(f);
@@ -746,7 +746,11 @@ static int pxa2xx_ssp_load(QEMUF... | CWE-119 | null | null |
12,590 | static uint64_t pxa2xx_pm_read(void *opaque, hwaddr addr,
unsigned size)
{
PXA2xxState *s = (PXA2xxState *) opaque;
switch (addr) {
case PMCR ... PCMD31:
if (addr & 3)
goto fail;
return s->pm_regs[addr >> 2];
default:
fail:
printf(... | DoS Exec Code Overflow | 0 | static uint64_t pxa2xx_pm_read(void *opaque, hwaddr addr,
unsigned size)
{
PXA2xxState *s = (PXA2xxState *) opaque;
switch (addr) {
case PMCR ... PCMD31:
if (addr & 3)
goto fail;
return s->pm_regs[addr >> 2];
default:
fail:
printf(... | @@ -732,7 +732,7 @@ static void pxa2xx_ssp_save(QEMUFile *f, void *opaque)
static int pxa2xx_ssp_load(QEMUFile *f, void *opaque, int version_id)
{
PXA2xxSSPState *s = (PXA2xxSSPState *) opaque;
- int i;
+ int i, v;
s->enable = qemu_get_be32(f);
@@ -746,7 +746,11 @@ static int pxa2xx_ssp_load(QEMUF... | CWE-119 | null | null |
12,591 | static void pxa2xx_pm_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
PXA2xxState *s = (PXA2xxState *) opaque;
switch (addr) {
case PMCR:
/* Clear the write-one-to-clear bits... */
s->pm_regs[addr >> 2] &= ~(value & 0x2a);
/* ...and set ... | DoS Exec Code Overflow | 0 | static void pxa2xx_pm_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
PXA2xxState *s = (PXA2xxState *) opaque;
switch (addr) {
case PMCR:
/* Clear the write-one-to-clear bits... */
s->pm_regs[addr >> 2] &= ~(value & 0x2a);
/* ...and set ... | @@ -732,7 +732,7 @@ static void pxa2xx_ssp_save(QEMUFile *f, void *opaque)
static int pxa2xx_ssp_load(QEMUFile *f, void *opaque, int version_id)
{
PXA2xxSSPState *s = (PXA2xxSSPState *) opaque;
- int i;
+ int i, v;
s->enable = qemu_get_be32(f);
@@ -746,7 +746,11 @@ static int pxa2xx_ssp_load(QEMUF... | CWE-119 | null | null |
12,592 | static void pxa2xx_pwrmode_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
PXA2xxState *s = (PXA2xxState *)ri->opaque;
static const char *pwrmode[8] = {
"Normal", "Idle", "Deep-idle", "Standby",
"Sleep", "reserved (!)", "reserved (!)", "Deep-sle... | DoS Exec Code Overflow | 0 | static void pxa2xx_pwrmode_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
PXA2xxState *s = (PXA2xxState *)ri->opaque;
static const char *pwrmode[8] = {
"Normal", "Idle", "Deep-idle", "Standby",
"Sleep", "reserved (!)", "reserved (!)", "Deep-sle... | @@ -732,7 +732,7 @@ static void pxa2xx_ssp_save(QEMUFile *f, void *opaque)
static int pxa2xx_ssp_load(QEMUFile *f, void *opaque, int version_id)
{
PXA2xxSSPState *s = (PXA2xxSSPState *) opaque;
- int i;
+ int i, v;
s->enable = qemu_get_be32(f);
@@ -746,7 +746,11 @@ static int pxa2xx_ssp_load(QEMUF... | CWE-119 | null | null |
12,593 | static void pxa2xx_setup_cp14(PXA2xxState *s)
{
define_arm_cp_regs_with_opaque(s->cpu, pxa_cp_reginfo, s);
}
| DoS Exec Code Overflow | 0 | static void pxa2xx_setup_cp14(PXA2xxState *s)
{
define_arm_cp_regs_with_opaque(s->cpu, pxa_cp_reginfo, s);
}
| @@ -732,7 +732,7 @@ static void pxa2xx_ssp_save(QEMUFile *f, void *opaque)
static int pxa2xx_ssp_load(QEMUFile *f, void *opaque, int version_id)
{
PXA2xxSSPState *s = (PXA2xxSSPState *) opaque;
- int i;
+ int i, v;
s->enable = qemu_get_be32(f);
@@ -746,7 +746,11 @@ static int pxa2xx_ssp_load(QEMUF... | CWE-119 | null | null |
12,594 | static void pxa2xx_ssp_fifo_update(PXA2xxSSPState *s)
{
s->sssr &= ~(0xf << 12); /* Clear RFL */
s->sssr &= ~(0xf << 8); /* Clear TFL */
s->sssr &= ~SSSR_TFS;
s->sssr &= ~SSSR_TNF;
if (s->enable) {
s->sssr |= ((s->rx_level - 1) & 0xf) << 12;
if (s->rx_level >= SSCR1_RFT(s->sscr[1]))
... | DoS Exec Code Overflow | 0 | static void pxa2xx_ssp_fifo_update(PXA2xxSSPState *s)
{
s->sssr &= ~(0xf << 12); /* Clear RFL */
s->sssr &= ~(0xf << 8); /* Clear TFL */
s->sssr &= ~SSSR_TFS;
s->sssr &= ~SSSR_TNF;
if (s->enable) {
s->sssr |= ((s->rx_level - 1) & 0xf) << 12;
if (s->rx_level >= SSCR1_RFT(s->sscr[1]))
... | @@ -732,7 +732,7 @@ static void pxa2xx_ssp_save(QEMUFile *f, void *opaque)
static int pxa2xx_ssp_load(QEMUFile *f, void *opaque, int version_id)
{
PXA2xxSSPState *s = (PXA2xxSSPState *) opaque;
- int i;
+ int i, v;
s->enable = qemu_get_be32(f);
@@ -746,7 +746,11 @@ static int pxa2xx_ssp_load(QEMUF... | CWE-119 | null | null |
12,595 | static void pxa2xx_ssp_int_update(PXA2xxSSPState *s)
{
int level = 0;
level |= s->ssitr & SSITR_INT;
level |= (s->sssr & SSSR_BCE) && (s->sscr[1] & SSCR1_EBCEI);
level |= (s->sssr & SSSR_TUR) && !(s->sscr[0] & SSCR0_TIM);
level |= (s->sssr & SSSR_EOC) && (s->sssr & (SSSR_TINT | SSSR_PINT));
... | DoS Exec Code Overflow | 0 | static void pxa2xx_ssp_int_update(PXA2xxSSPState *s)
{
int level = 0;
level |= s->ssitr & SSITR_INT;
level |= (s->sssr & SSSR_BCE) && (s->sscr[1] & SSCR1_EBCEI);
level |= (s->sssr & SSSR_TUR) && !(s->sscr[0] & SSCR0_TIM);
level |= (s->sssr & SSSR_EOC) && (s->sssr & (SSSR_TINT | SSSR_PINT));
... | @@ -732,7 +732,7 @@ static void pxa2xx_ssp_save(QEMUFile *f, void *opaque)
static int pxa2xx_ssp_load(QEMUFile *f, void *opaque, int version_id)
{
PXA2xxSSPState *s = (PXA2xxSSPState *) opaque;
- int i;
+ int i, v;
s->enable = qemu_get_be32(f);
@@ -746,7 +746,11 @@ static int pxa2xx_ssp_load(QEMUF... | CWE-119 | null | null |
12,596 | static int get_bitmap(QEMUFile *f, void *pv, size_t size)
{
unsigned long *bmp = pv;
int i, idx = 0;
for (i = 0; i < BITS_TO_U64S(size); i++) {
uint64_t w = qemu_get_be64(f);
bmp[idx++] = w;
if (sizeof(unsigned long) == 4 && idx < BITS_TO_LONGS(size)) {
bmp[idx++] = w >> ... | DoS Exec Code Overflow | 0 | static int get_bitmap(QEMUFile *f, void *pv, size_t size)
{
unsigned long *bmp = pv;
int i, idx = 0;
for (i = 0; i < BITS_TO_U64S(size); i++) {
uint64_t w = qemu_get_be64(f);
bmp[idx++] = w;
if (sizeof(unsigned long) == 4 && idx < BITS_TO_LONGS(size)) {
bmp[idx++] = w >> ... | @@ -337,8 +337,9 @@ const VMStateInfo vmstate_info_int32_equal = {
.put = put_int32,
};
-/* 32 bit int. Check that the received value is less than or equal to
- the one in the field */
+/* 32 bit int. Check that the received value is non-negative
+ * and less than or equal to the one in the field.
+ */
st... | CWE-119 | null | null |
12,597 | static int get_buffer(QEMUFile *f, void *pv, size_t size)
{
uint8_t *v = pv;
qemu_get_buffer(f, v, size);
return 0;
}
| DoS Exec Code Overflow | 0 | static int get_buffer(QEMUFile *f, void *pv, size_t size)
{
uint8_t *v = pv;
qemu_get_buffer(f, v, size);
return 0;
}
| @@ -337,8 +337,9 @@ const VMStateInfo vmstate_info_int32_equal = {
.put = put_int32,
};
-/* 32 bit int. Check that the received value is less than or equal to
- the one in the field */
+/* 32 bit int. Check that the received value is non-negative
+ * and less than or equal to the one in the field.
+ */
st... | CWE-119 | null | null |
12,598 | static int get_float64(QEMUFile *f, void *pv, size_t size)
{
float64 *v = pv;
*v = make_float64(qemu_get_be64(f));
return 0;
}
| DoS Exec Code Overflow | 0 | static int get_float64(QEMUFile *f, void *pv, size_t size)
{
float64 *v = pv;
*v = make_float64(qemu_get_be64(f));
return 0;
}
| @@ -337,8 +337,9 @@ const VMStateInfo vmstate_info_int32_equal = {
.put = put_int32,
};
-/* 32 bit int. Check that the received value is less than or equal to
- the one in the field */
+/* 32 bit int. Check that the received value is non-negative
+ * and less than or equal to the one in the field.
+ */
st... | CWE-119 | null | null |
12,599 | static int get_int32(QEMUFile *f, void *pv, size_t size)
{
int32_t *v = pv;
qemu_get_sbe32s(f, v);
return 0;
}
| DoS Exec Code Overflow | 0 | static int get_int32(QEMUFile *f, void *pv, size_t size)
{
int32_t *v = pv;
qemu_get_sbe32s(f, v);
return 0;
}
| @@ -337,8 +337,9 @@ const VMStateInfo vmstate_info_int32_equal = {
.put = put_int32,
};
-/* 32 bit int. Check that the received value is less than or equal to
- the one in the field */
+/* 32 bit int. Check that the received value is non-negative
+ * and less than or equal to the one in the field.
+ */
st... | CWE-119 | null | null |
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