idx int64 | func_before string | Vulnerability Classification string | vul int64 | func_after string | patch string | CWE ID string | lines_before string | lines_after string |
|---|---|---|---|---|---|---|---|---|
21,100 | ttwu_do_activate(struct rq *rq, struct task_struct *p, int wake_flags)
{
#ifdef CONFIG_SMP
if (p->sched_contributes_to_load)
rq->nr_uninterruptible--;
#endif
ttwu_activate(rq, p, ENQUEUE_WAKEUP | ENQUEUE_WAKING);
ttwu_do_wakeup(rq, p, wake_flags);
}
| DoS Overflow | 0 | ttwu_do_activate(struct rq *rq, struct task_struct *p, int wake_flags)
{
#ifdef CONFIG_SMP
if (p->sched_contributes_to_load)
rq->nr_uninterruptible--;
#endif
ttwu_activate(rq, p, ENQUEUE_WAKEUP | ENQUEUE_WAKING);
ttwu_do_wakeup(rq, p, wake_flags);
}
| @@ -2220,7 +2220,7 @@ void set_task_cpu(struct task_struct *p, unsigned int new_cpu)
if (task_cpu(p) != new_cpu) {
p->se.nr_migrations++;
- perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, 1, NULL, 0);
+ perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, NULL, 0);
}
__set_task_cpu(p, new_cpu); | CWE-399 | null | null |
21,101 | ttwu_do_wakeup(struct rq *rq, struct task_struct *p, int wake_flags)
{
trace_sched_wakeup(p, true);
check_preempt_curr(rq, p, wake_flags);
p->state = TASK_RUNNING;
#ifdef CONFIG_SMP
if (p->sched_class->task_woken)
p->sched_class->task_woken(rq, p);
if (unlikely(rq->idle_stamp)) {
u64 delta = rq->clock - rq->idle_stamp;
u64 max = 2*sysctl_sched_migration_cost;
if (delta > max)
rq->avg_idle = max;
else
update_avg(&rq->avg_idle, delta);
rq->idle_stamp = 0;
}
#endif
}
| DoS Overflow | 0 | ttwu_do_wakeup(struct rq *rq, struct task_struct *p, int wake_flags)
{
trace_sched_wakeup(p, true);
check_preempt_curr(rq, p, wake_flags);
p->state = TASK_RUNNING;
#ifdef CONFIG_SMP
if (p->sched_class->task_woken)
p->sched_class->task_woken(rq, p);
if (unlikely(rq->idle_stamp)) {
u64 delta = rq->clock - rq->idle_stamp;
u64 max = 2*sysctl_sched_migration_cost;
if (delta > max)
rq->avg_idle = max;
else
update_avg(&rq->avg_idle, delta);
rq->idle_stamp = 0;
}
#endif
}
| @@ -2220,7 +2220,7 @@ void set_task_cpu(struct task_struct *p, unsigned int new_cpu)
if (task_cpu(p) != new_cpu) {
p->se.nr_migrations++;
- perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, 1, NULL, 0);
+ perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, NULL, 0);
}
__set_task_cpu(p, new_cpu); | CWE-399 | null | null |
21,102 | static void ttwu_queue_remote(struct task_struct *p, int cpu)
{
struct rq *rq = cpu_rq(cpu);
struct task_struct *next = rq->wake_list;
for (;;) {
struct task_struct *old = next;
p->wake_entry = next;
next = cmpxchg(&rq->wake_list, old, p);
if (next == old)
break;
}
if (!next)
smp_send_reschedule(cpu);
}
| DoS Overflow | 0 | static void ttwu_queue_remote(struct task_struct *p, int cpu)
{
struct rq *rq = cpu_rq(cpu);
struct task_struct *next = rq->wake_list;
for (;;) {
struct task_struct *old = next;
p->wake_entry = next;
next = cmpxchg(&rq->wake_list, old, p);
if (next == old)
break;
}
if (!next)
smp_send_reschedule(cpu);
}
| @@ -2220,7 +2220,7 @@ void set_task_cpu(struct task_struct *p, unsigned int new_cpu)
if (task_cpu(p) != new_cpu) {
p->se.nr_migrations++;
- perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, 1, NULL, 0);
+ perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, NULL, 0);
}
__set_task_cpu(p, new_cpu); | CWE-399 | null | null |
21,103 | static int ttwu_remote(struct task_struct *p, int wake_flags)
{
struct rq *rq;
int ret = 0;
rq = __task_rq_lock(p);
if (p->on_rq) {
ttwu_do_wakeup(rq, p, wake_flags);
ret = 1;
}
__task_rq_unlock(rq);
return ret;
}
| DoS Overflow | 0 | static int ttwu_remote(struct task_struct *p, int wake_flags)
{
struct rq *rq;
int ret = 0;
rq = __task_rq_lock(p);
if (p->on_rq) {
ttwu_do_wakeup(rq, p, wake_flags);
ret = 1;
}
__task_rq_unlock(rq);
return ret;
}
| @@ -2220,7 +2220,7 @@ void set_task_cpu(struct task_struct *p, unsigned int new_cpu)
if (task_cpu(p) != new_cpu) {
p->se.nr_migrations++;
- perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, 1, NULL, 0);
+ perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, NULL, 0);
}
__set_task_cpu(p, new_cpu); | CWE-399 | null | null |
21,104 | ttwu_stat(struct task_struct *p, int cpu, int wake_flags)
{
#ifdef CONFIG_SCHEDSTATS
struct rq *rq = this_rq();
#ifdef CONFIG_SMP
int this_cpu = smp_processor_id();
if (cpu == this_cpu) {
schedstat_inc(rq, ttwu_local);
schedstat_inc(p, se.statistics.nr_wakeups_local);
} else {
struct sched_domain *sd;
schedstat_inc(p, se.statistics.nr_wakeups_remote);
rcu_read_lock();
for_each_domain(this_cpu, sd) {
if (cpumask_test_cpu(cpu, sched_domain_span(sd))) {
schedstat_inc(sd, ttwu_wake_remote);
break;
}
}
rcu_read_unlock();
}
if (wake_flags & WF_MIGRATED)
schedstat_inc(p, se.statistics.nr_wakeups_migrate);
#endif /* CONFIG_SMP */
schedstat_inc(rq, ttwu_count);
schedstat_inc(p, se.statistics.nr_wakeups);
if (wake_flags & WF_SYNC)
schedstat_inc(p, se.statistics.nr_wakeups_sync);
#endif /* CONFIG_SCHEDSTATS */
}
| DoS Overflow | 0 | ttwu_stat(struct task_struct *p, int cpu, int wake_flags)
{
#ifdef CONFIG_SCHEDSTATS
struct rq *rq = this_rq();
#ifdef CONFIG_SMP
int this_cpu = smp_processor_id();
if (cpu == this_cpu) {
schedstat_inc(rq, ttwu_local);
schedstat_inc(p, se.statistics.nr_wakeups_local);
} else {
struct sched_domain *sd;
schedstat_inc(p, se.statistics.nr_wakeups_remote);
rcu_read_lock();
for_each_domain(this_cpu, sd) {
if (cpumask_test_cpu(cpu, sched_domain_span(sd))) {
schedstat_inc(sd, ttwu_wake_remote);
break;
}
}
rcu_read_unlock();
}
if (wake_flags & WF_MIGRATED)
schedstat_inc(p, se.statistics.nr_wakeups_migrate);
#endif /* CONFIG_SMP */
schedstat_inc(rq, ttwu_count);
schedstat_inc(p, se.statistics.nr_wakeups);
if (wake_flags & WF_SYNC)
schedstat_inc(p, se.statistics.nr_wakeups_sync);
#endif /* CONFIG_SCHEDSTATS */
}
| @@ -2220,7 +2220,7 @@ void set_task_cpu(struct task_struct *p, unsigned int new_cpu)
if (task_cpu(p) != new_cpu) {
p->se.nr_migrations++;
- perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, 1, NULL, 0);
+ perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, NULL, 0);
}
__set_task_cpu(p, new_cpu); | CWE-399 | null | null |
21,105 | static inline void update_load_set(struct load_weight *lw, unsigned long w)
{
lw->weight = w;
lw->inv_weight = 0;
}
| DoS Overflow | 0 | static inline void update_load_set(struct load_weight *lw, unsigned long w)
{
lw->weight = w;
lw->inv_weight = 0;
}
| @@ -2220,7 +2220,7 @@ void set_task_cpu(struct task_struct *p, unsigned int new_cpu)
if (task_cpu(p) != new_cpu) {
p->se.nr_migrations++;
- perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, 1, NULL, 0);
+ perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, NULL, 0);
}
__set_task_cpu(p, new_cpu); | CWE-399 | null | null |
21,106 | static void update_rq_clock(struct rq *rq)
{
s64 delta;
if (rq->skip_clock_update > 0)
return;
delta = sched_clock_cpu(cpu_of(rq)) - rq->clock;
rq->clock += delta;
update_rq_clock_task(rq, delta);
}
| DoS Overflow | 0 | static void update_rq_clock(struct rq *rq)
{
s64 delta;
if (rq->skip_clock_update > 0)
return;
delta = sched_clock_cpu(cpu_of(rq)) - rq->clock;
rq->clock += delta;
update_rq_clock_task(rq, delta);
}
| @@ -2220,7 +2220,7 @@ void set_task_cpu(struct task_struct *p, unsigned int new_cpu)
if (task_cpu(p) != new_cpu) {
p->se.nr_migrations++;
- perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, 1, NULL, 0);
+ perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, NULL, 0);
}
__set_task_cpu(p, new_cpu); | CWE-399 | null | null |
21,107 | static void update_rq_clock_task(struct rq *rq, s64 delta)
{
s64 irq_delta;
irq_delta = irq_time_read(cpu_of(rq)) - rq->prev_irq_time;
/*
* Since irq_time is only updated on {soft,}irq_exit, we might run into
* this case when a previous update_rq_clock() happened inside a
* {soft,}irq region.
*
* When this happens, we stop ->clock_task and only update the
* prev_irq_time stamp to account for the part that fit, so that a next
* update will consume the rest. This ensures ->clock_task is
* monotonic.
*
* It does however cause some slight miss-attribution of {soft,}irq
* time, a more accurate solution would be to update the irq_time using
* the current rq->clock timestamp, except that would require using
* atomic ops.
*/
if (irq_delta > delta)
irq_delta = delta;
rq->prev_irq_time += irq_delta;
delta -= irq_delta;
rq->clock_task += delta;
if (irq_delta && sched_feat(NONIRQ_POWER))
sched_rt_avg_update(rq, irq_delta);
}
| DoS Overflow | 0 | static void update_rq_clock_task(struct rq *rq, s64 delta)
{
s64 irq_delta;
irq_delta = irq_time_read(cpu_of(rq)) - rq->prev_irq_time;
/*
* Since irq_time is only updated on {soft,}irq_exit, we might run into
* this case when a previous update_rq_clock() happened inside a
* {soft,}irq region.
*
* When this happens, we stop ->clock_task and only update the
* prev_irq_time stamp to account for the part that fit, so that a next
* update will consume the rest. This ensures ->clock_task is
* monotonic.
*
* It does however cause some slight miss-attribution of {soft,}irq
* time, a more accurate solution would be to update the irq_time using
* the current rq->clock timestamp, except that would require using
* atomic ops.
*/
if (irq_delta > delta)
irq_delta = delta;
rq->prev_irq_time += irq_delta;
delta -= irq_delta;
rq->clock_task += delta;
if (irq_delta && sched_feat(NONIRQ_POWER))
sched_rt_avg_update(rq, irq_delta);
}
| @@ -2220,7 +2220,7 @@ void set_task_cpu(struct task_struct *p, unsigned int new_cpu)
if (task_cpu(p) != new_cpu) {
p->se.nr_migrations++;
- perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, 1, NULL, 0);
+ perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, NULL, 0);
}
__set_task_cpu(p, new_cpu); | CWE-399 | null | null |
21,108 | bool __sched yield_to(struct task_struct *p, bool preempt)
{
struct task_struct *curr = current;
struct rq *rq, *p_rq;
unsigned long flags;
bool yielded = 0;
local_irq_save(flags);
rq = this_rq();
again:
p_rq = task_rq(p);
double_rq_lock(rq, p_rq);
while (task_rq(p) != p_rq) {
double_rq_unlock(rq, p_rq);
goto again;
}
if (!curr->sched_class->yield_to_task)
goto out;
if (curr->sched_class != p->sched_class)
goto out;
if (task_running(p_rq, p) || p->state)
goto out;
yielded = curr->sched_class->yield_to_task(rq, p, preempt);
if (yielded) {
schedstat_inc(rq, yld_count);
/*
* Make p's CPU reschedule; pick_next_entity takes care of
* fairness.
*/
if (preempt && rq != p_rq)
resched_task(p_rq->curr);
}
out:
double_rq_unlock(rq, p_rq);
local_irq_restore(flags);
if (yielded)
schedule();
return yielded;
}
| DoS Overflow | 0 | bool __sched yield_to(struct task_struct *p, bool preempt)
{
struct task_struct *curr = current;
struct rq *rq, *p_rq;
unsigned long flags;
bool yielded = 0;
local_irq_save(flags);
rq = this_rq();
again:
p_rq = task_rq(p);
double_rq_lock(rq, p_rq);
while (task_rq(p) != p_rq) {
double_rq_unlock(rq, p_rq);
goto again;
}
if (!curr->sched_class->yield_to_task)
goto out;
if (curr->sched_class != p->sched_class)
goto out;
if (task_running(p_rq, p) || p->state)
goto out;
yielded = curr->sched_class->yield_to_task(rq, p, preempt);
if (yielded) {
schedstat_inc(rq, yld_count);
/*
* Make p's CPU reschedule; pick_next_entity takes care of
* fairness.
*/
if (preempt && rq != p_rq)
resched_task(p_rq->curr);
}
out:
double_rq_unlock(rq, p_rq);
local_irq_restore(flags);
if (yielded)
schedule();
return yielded;
}
| @@ -2220,7 +2220,7 @@ void set_task_cpu(struct task_struct *p, unsigned int new_cpu)
if (task_cpu(p) != new_cpu) {
p->se.nr_migrations++;
- perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, 1, NULL, 0);
+ perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, NULL, 0);
}
__set_task_cpu(p, new_cpu); | CWE-399 | null | null |
21,109 | static void __touch_watchdog(void)
{
int this_cpu = smp_processor_id();
__this_cpu_write(watchdog_touch_ts, get_timestamp(this_cpu));
}
| DoS Overflow | 0 | static void __touch_watchdog(void)
{
int this_cpu = smp_processor_id();
__this_cpu_write(watchdog_touch_ts, get_timestamp(this_cpu));
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,110 | cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
{
int hotcpu = (unsigned long)hcpu;
switch (action) {
case CPU_UP_PREPARE:
case CPU_UP_PREPARE_FROZEN:
watchdog_prepare_cpu(hotcpu);
break;
case CPU_ONLINE:
case CPU_ONLINE_FROZEN:
if (watchdog_enabled)
watchdog_enable(hotcpu);
break;
#ifdef CONFIG_HOTPLUG_CPU
case CPU_UP_CANCELED:
case CPU_UP_CANCELED_FROZEN:
watchdog_disable(hotcpu);
break;
case CPU_DEAD:
case CPU_DEAD_FROZEN:
watchdog_disable(hotcpu);
break;
#endif /* CONFIG_HOTPLUG_CPU */
}
/*
* hardlockup and softlockup are not important enough
* to block cpu bring up. Just always succeed and
* rely on printk output to flag problems.
*/
return NOTIFY_OK;
}
| DoS Overflow | 0 | cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
{
int hotcpu = (unsigned long)hcpu;
switch (action) {
case CPU_UP_PREPARE:
case CPU_UP_PREPARE_FROZEN:
watchdog_prepare_cpu(hotcpu);
break;
case CPU_ONLINE:
case CPU_ONLINE_FROZEN:
if (watchdog_enabled)
watchdog_enable(hotcpu);
break;
#ifdef CONFIG_HOTPLUG_CPU
case CPU_UP_CANCELED:
case CPU_UP_CANCELED_FROZEN:
watchdog_disable(hotcpu);
break;
case CPU_DEAD:
case CPU_DEAD_FROZEN:
watchdog_disable(hotcpu);
break;
#endif /* CONFIG_HOTPLUG_CPU */
}
/*
* hardlockup and softlockup are not important enough
* to block cpu bring up. Just always succeed and
* rely on printk output to flag problems.
*/
return NOTIFY_OK;
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,111 | static int get_softlockup_thresh(void)
{
return watchdog_thresh * 2;
}
| DoS Overflow | 0 | static int get_softlockup_thresh(void)
{
return watchdog_thresh * 2;
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,112 | static int __init hardlockup_panic_setup(char *str)
{
if (!strncmp(str, "panic", 5))
hardlockup_panic = 1;
else if (!strncmp(str, "nopanic", 7))
hardlockup_panic = 0;
else if (!strncmp(str, "0", 1))
watchdog_enabled = 0;
return 1;
}
| DoS Overflow | 0 | static int __init hardlockup_panic_setup(char *str)
{
if (!strncmp(str, "panic", 5))
hardlockup_panic = 1;
else if (!strncmp(str, "nopanic", 7))
hardlockup_panic = 0;
else if (!strncmp(str, "0", 1))
watchdog_enabled = 0;
return 1;
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,113 | static int is_hardlockup(void)
{
unsigned long hrint = __this_cpu_read(hrtimer_interrupts);
if (__this_cpu_read(hrtimer_interrupts_saved) == hrint)
return 1;
__this_cpu_write(hrtimer_interrupts_saved, hrint);
return 0;
}
| DoS Overflow | 0 | static int is_hardlockup(void)
{
unsigned long hrint = __this_cpu_read(hrtimer_interrupts);
if (__this_cpu_read(hrtimer_interrupts_saved) == hrint)
return 1;
__this_cpu_write(hrtimer_interrupts_saved, hrint);
return 0;
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,114 | void __init lockup_detector_init(void)
{
void *cpu = (void *)(long)smp_processor_id();
int err;
err = cpu_callback(&cpu_nfb, CPU_UP_PREPARE, cpu);
WARN_ON(notifier_to_errno(err));
cpu_callback(&cpu_nfb, CPU_ONLINE, cpu);
register_cpu_notifier(&cpu_nfb);
return;
}
| DoS Overflow | 0 | void __init lockup_detector_init(void)
{
void *cpu = (void *)(long)smp_processor_id();
int err;
err = cpu_callback(&cpu_nfb, CPU_UP_PREPARE, cpu);
WARN_ON(notifier_to_errno(err));
cpu_callback(&cpu_nfb, CPU_ONLINE, cpu);
register_cpu_notifier(&cpu_nfb);
return;
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,115 | static int __init nosoftlockup_setup(char *str)
{
watchdog_enabled = 0;
return 1;
}
| DoS Overflow | 0 | static int __init nosoftlockup_setup(char *str)
{
watchdog_enabled = 0;
return 1;
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,116 | int proc_dowatchdog(struct ctl_table *table, int write,
void __user *buffer, size_t *lenp, loff_t *ppos)
{
int ret;
ret = proc_dointvec_minmax(table, write, buffer, lenp, ppos);
if (ret || !write)
goto out;
if (watchdog_enabled && watchdog_thresh)
watchdog_enable_all_cpus();
else
watchdog_disable_all_cpus();
out:
return ret;
}
| DoS Overflow | 0 | int proc_dowatchdog(struct ctl_table *table, int write,
void __user *buffer, size_t *lenp, loff_t *ppos)
{
int ret;
ret = proc_dointvec_minmax(table, write, buffer, lenp, ppos);
if (ret || !write)
goto out;
if (watchdog_enabled && watchdog_thresh)
watchdog_enable_all_cpus();
else
watchdog_disable_all_cpus();
out:
return ret;
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,117 | static int __init softlockup_panic_setup(char *str)
{
softlockup_panic = simple_strtoul(str, NULL, 0);
return 1;
}
| DoS Overflow | 0 | static int __init softlockup_panic_setup(char *str)
{
softlockup_panic = simple_strtoul(str, NULL, 0);
return 1;
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,118 | void touch_all_softlockup_watchdogs(void)
{
int cpu;
/*
* this is done lockless
* do we care if a 0 races with a timestamp?
* all it means is the softlock check starts one cycle later
*/
for_each_online_cpu(cpu)
per_cpu(watchdog_touch_ts, cpu) = 0;
}
| DoS Overflow | 0 | void touch_all_softlockup_watchdogs(void)
{
int cpu;
/*
* this is done lockless
* do we care if a 0 races with a timestamp?
* all it means is the softlock check starts one cycle later
*/
for_each_online_cpu(cpu)
per_cpu(watchdog_touch_ts, cpu) = 0;
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,119 | void touch_nmi_watchdog(void)
{
if (watchdog_enabled) {
unsigned cpu;
for_each_present_cpu(cpu) {
if (per_cpu(watchdog_nmi_touch, cpu) != true)
per_cpu(watchdog_nmi_touch, cpu) = true;
}
}
touch_softlockup_watchdog();
}
| DoS Overflow | 0 | void touch_nmi_watchdog(void)
{
if (watchdog_enabled) {
unsigned cpu;
for_each_present_cpu(cpu) {
if (per_cpu(watchdog_nmi_touch, cpu) != true)
per_cpu(watchdog_nmi_touch, cpu) = true;
}
}
touch_softlockup_watchdog();
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,120 | void touch_softlockup_watchdog(void)
{
__this_cpu_write(watchdog_touch_ts, 0);
}
| DoS Overflow | 0 | void touch_softlockup_watchdog(void)
{
__this_cpu_write(watchdog_touch_ts, 0);
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,121 | void touch_softlockup_watchdog_sync(void)
{
__raw_get_cpu_var(softlockup_touch_sync) = true;
__raw_get_cpu_var(watchdog_touch_ts) = 0;
}
| DoS Overflow | 0 | void touch_softlockup_watchdog_sync(void)
{
__raw_get_cpu_var(softlockup_touch_sync) = true;
__raw_get_cpu_var(watchdog_touch_ts) = 0;
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,122 | static int watchdog(void *unused)
{
static struct sched_param param = { .sched_priority = MAX_RT_PRIO-1 };
struct hrtimer *hrtimer = &__raw_get_cpu_var(watchdog_hrtimer);
sched_setscheduler(current, SCHED_FIFO, ¶m);
/* initialize timestamp */
__touch_watchdog();
/* kick off the timer for the hardlockup detector */
/* done here because hrtimer_start can only pin to smp_processor_id() */
hrtimer_start(hrtimer, ns_to_ktime(get_sample_period()),
HRTIMER_MODE_REL_PINNED);
set_current_state(TASK_INTERRUPTIBLE);
/*
* Run briefly once per second to reset the softlockup timestamp.
* If this gets delayed for more than 60 seconds then the
* debug-printout triggers in watchdog_timer_fn().
*/
while (!kthread_should_stop()) {
__touch_watchdog();
schedule();
if (kthread_should_stop())
break;
set_current_state(TASK_INTERRUPTIBLE);
}
__set_current_state(TASK_RUNNING);
return 0;
}
| DoS Overflow | 0 | static int watchdog(void *unused)
{
static struct sched_param param = { .sched_priority = MAX_RT_PRIO-1 };
struct hrtimer *hrtimer = &__raw_get_cpu_var(watchdog_hrtimer);
sched_setscheduler(current, SCHED_FIFO, ¶m);
/* initialize timestamp */
__touch_watchdog();
/* kick off the timer for the hardlockup detector */
/* done here because hrtimer_start can only pin to smp_processor_id() */
hrtimer_start(hrtimer, ns_to_ktime(get_sample_period()),
HRTIMER_MODE_REL_PINNED);
set_current_state(TASK_INTERRUPTIBLE);
/*
* Run briefly once per second to reset the softlockup timestamp.
* If this gets delayed for more than 60 seconds then the
* debug-printout triggers in watchdog_timer_fn().
*/
while (!kthread_should_stop()) {
__touch_watchdog();
schedule();
if (kthread_should_stop())
break;
set_current_state(TASK_INTERRUPTIBLE);
}
__set_current_state(TASK_RUNNING);
return 0;
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,123 | static void watchdog_disable_all_cpus(void)
{
int cpu;
for_each_online_cpu(cpu)
watchdog_disable(cpu);
/* if all watchdogs are disabled, then they are disabled for the system */
watchdog_enabled = 0;
}
| DoS Overflow | 0 | static void watchdog_disable_all_cpus(void)
{
int cpu;
for_each_online_cpu(cpu)
watchdog_disable(cpu);
/* if all watchdogs are disabled, then they are disabled for the system */
watchdog_enabled = 0;
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,124 | static int watchdog_enable(int cpu)
{
struct task_struct *p = per_cpu(softlockup_watchdog, cpu);
int err = 0;
/* enable the perf event */
err = watchdog_nmi_enable(cpu);
/* Regardless of err above, fall through and start softlockup */
/* create the watchdog thread */
if (!p) {
p = kthread_create(watchdog, (void *)(unsigned long)cpu, "watchdog/%d", cpu);
if (IS_ERR(p)) {
printk(KERN_ERR "softlockup watchdog for %i failed\n", cpu);
if (!err) {
/* if hardlockup hasn't already set this */
err = PTR_ERR(p);
/* and disable the perf event */
watchdog_nmi_disable(cpu);
}
goto out;
}
kthread_bind(p, cpu);
per_cpu(watchdog_touch_ts, cpu) = 0;
per_cpu(softlockup_watchdog, cpu) = p;
wake_up_process(p);
}
out:
return err;
}
| DoS Overflow | 0 | static int watchdog_enable(int cpu)
{
struct task_struct *p = per_cpu(softlockup_watchdog, cpu);
int err = 0;
/* enable the perf event */
err = watchdog_nmi_enable(cpu);
/* Regardless of err above, fall through and start softlockup */
/* create the watchdog thread */
if (!p) {
p = kthread_create(watchdog, (void *)(unsigned long)cpu, "watchdog/%d", cpu);
if (IS_ERR(p)) {
printk(KERN_ERR "softlockup watchdog for %i failed\n", cpu);
if (!err) {
/* if hardlockup hasn't already set this */
err = PTR_ERR(p);
/* and disable the perf event */
watchdog_nmi_disable(cpu);
}
goto out;
}
kthread_bind(p, cpu);
per_cpu(watchdog_touch_ts, cpu) = 0;
per_cpu(softlockup_watchdog, cpu) = p;
wake_up_process(p);
}
out:
return err;
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,125 | static void watchdog_enable_all_cpus(void)
{
int cpu;
watchdog_enabled = 0;
for_each_online_cpu(cpu)
if (!watchdog_enable(cpu))
/* if any cpu succeeds, watchdog is considered
enabled for the system */
watchdog_enabled = 1;
if (!watchdog_enabled)
printk(KERN_ERR "watchdog: failed to be enabled on some cpus\n");
}
| DoS Overflow | 0 | static void watchdog_enable_all_cpus(void)
{
int cpu;
watchdog_enabled = 0;
for_each_online_cpu(cpu)
if (!watchdog_enable(cpu))
/* if any cpu succeeds, watchdog is considered
enabled for the system */
watchdog_enabled = 1;
if (!watchdog_enabled)
printk(KERN_ERR "watchdog: failed to be enabled on some cpus\n");
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,126 | static void watchdog_interrupt_count(void)
{
__this_cpu_inc(hrtimer_interrupts);
}
| DoS Overflow | 0 | static void watchdog_interrupt_count(void)
{
__this_cpu_inc(hrtimer_interrupts);
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,127 | static inline void watchdog_interrupt_count(void) { return; }
| DoS Overflow | 0 | static inline void watchdog_interrupt_count(void) { return; }
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,128 | static int watchdog_nmi_enable(int cpu)
{
struct perf_event_attr *wd_attr;
struct perf_event *event = per_cpu(watchdog_ev, cpu);
/* is it already setup and enabled? */
if (event && event->state > PERF_EVENT_STATE_OFF)
goto out;
/* it is setup but not enabled */
if (event != NULL)
goto out_enable;
wd_attr = &wd_hw_attr;
wd_attr->sample_period = hw_nmi_get_sample_period(watchdog_thresh);
hw_nmi_watchdog_set_attr(wd_attr);
/* Try to register using hardware perf events */
event = perf_event_create_kernel_counter(wd_attr, cpu, NULL, watchdog_overflow_callback);
if (!IS_ERR(event)) {
printk(KERN_INFO "NMI watchdog enabled, takes one hw-pmu counter.\n");
goto out_save;
}
/* vary the KERN level based on the returned errno */
if (PTR_ERR(event) == -EOPNOTSUPP)
printk(KERN_INFO "NMI watchdog disabled (cpu%i): not supported (no LAPIC?)\n", cpu);
else if (PTR_ERR(event) == -ENOENT)
printk(KERN_WARNING "NMI watchdog disabled (cpu%i): hardware events not enabled\n", cpu);
else
printk(KERN_ERR "NMI watchdog disabled (cpu%i): unable to create perf event: %ld\n", cpu, PTR_ERR(event));
return PTR_ERR(event);
/* success path */
out_save:
per_cpu(watchdog_ev, cpu) = event;
out_enable:
perf_event_enable(per_cpu(watchdog_ev, cpu));
out:
return 0;
}
| DoS Overflow | 0 | static int watchdog_nmi_enable(int cpu)
{
struct perf_event_attr *wd_attr;
struct perf_event *event = per_cpu(watchdog_ev, cpu);
/* is it already setup and enabled? */
if (event && event->state > PERF_EVENT_STATE_OFF)
goto out;
/* it is setup but not enabled */
if (event != NULL)
goto out_enable;
wd_attr = &wd_hw_attr;
wd_attr->sample_period = hw_nmi_get_sample_period(watchdog_thresh);
hw_nmi_watchdog_set_attr(wd_attr);
/* Try to register using hardware perf events */
event = perf_event_create_kernel_counter(wd_attr, cpu, NULL, watchdog_overflow_callback);
if (!IS_ERR(event)) {
printk(KERN_INFO "NMI watchdog enabled, takes one hw-pmu counter.\n");
goto out_save;
}
/* vary the KERN level based on the returned errno */
if (PTR_ERR(event) == -EOPNOTSUPP)
printk(KERN_INFO "NMI watchdog disabled (cpu%i): not supported (no LAPIC?)\n", cpu);
else if (PTR_ERR(event) == -ENOENT)
printk(KERN_WARNING "NMI watchdog disabled (cpu%i): hardware events not enabled\n", cpu);
else
printk(KERN_ERR "NMI watchdog disabled (cpu%i): unable to create perf event: %ld\n", cpu, PTR_ERR(event));
return PTR_ERR(event);
/* success path */
out_save:
per_cpu(watchdog_ev, cpu) = event;
out_enable:
perf_event_enable(per_cpu(watchdog_ev, cpu));
out:
return 0;
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,129 | static void watchdog_prepare_cpu(int cpu)
{
struct hrtimer *hrtimer = &per_cpu(watchdog_hrtimer, cpu);
WARN_ON(per_cpu(softlockup_watchdog, cpu));
hrtimer_init(hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
hrtimer->function = watchdog_timer_fn;
}
| DoS Overflow | 0 | static void watchdog_prepare_cpu(int cpu)
{
struct hrtimer *hrtimer = &per_cpu(watchdog_hrtimer, cpu);
WARN_ON(per_cpu(softlockup_watchdog, cpu));
hrtimer_init(hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
hrtimer->function = watchdog_timer_fn;
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,130 | static enum hrtimer_restart watchdog_timer_fn(struct hrtimer *hrtimer)
{
unsigned long touch_ts = __this_cpu_read(watchdog_touch_ts);
struct pt_regs *regs = get_irq_regs();
int duration;
/* kick the hardlockup detector */
watchdog_interrupt_count();
/* kick the softlockup detector */
wake_up_process(__this_cpu_read(softlockup_watchdog));
/* .. and repeat */
hrtimer_forward_now(hrtimer, ns_to_ktime(get_sample_period()));
if (touch_ts == 0) {
if (unlikely(__this_cpu_read(softlockup_touch_sync))) {
/*
* If the time stamp was touched atomically
* make sure the scheduler tick is up to date.
*/
__this_cpu_write(softlockup_touch_sync, false);
sched_clock_tick();
}
__touch_watchdog();
return HRTIMER_RESTART;
}
/* check for a softlockup
* This is done by making sure a high priority task is
* being scheduled. The task touches the watchdog to
* indicate it is getting cpu time. If it hasn't then
* this is a good indication some task is hogging the cpu
*/
duration = is_softlockup(touch_ts);
if (unlikely(duration)) {
/* only warn once */
if (__this_cpu_read(soft_watchdog_warn) == true)
return HRTIMER_RESTART;
printk(KERN_ERR "BUG: soft lockup - CPU#%d stuck for %us! [%s:%d]\n",
smp_processor_id(), duration,
current->comm, task_pid_nr(current));
print_modules();
print_irqtrace_events(current);
if (regs)
show_regs(regs);
else
dump_stack();
if (softlockup_panic)
panic("softlockup: hung tasks");
__this_cpu_write(soft_watchdog_warn, true);
} else
__this_cpu_write(soft_watchdog_warn, false);
return HRTIMER_RESTART;
}
| DoS Overflow | 0 | static enum hrtimer_restart watchdog_timer_fn(struct hrtimer *hrtimer)
{
unsigned long touch_ts = __this_cpu_read(watchdog_touch_ts);
struct pt_regs *regs = get_irq_regs();
int duration;
/* kick the hardlockup detector */
watchdog_interrupt_count();
/* kick the softlockup detector */
wake_up_process(__this_cpu_read(softlockup_watchdog));
/* .. and repeat */
hrtimer_forward_now(hrtimer, ns_to_ktime(get_sample_period()));
if (touch_ts == 0) {
if (unlikely(__this_cpu_read(softlockup_touch_sync))) {
/*
* If the time stamp was touched atomically
* make sure the scheduler tick is up to date.
*/
__this_cpu_write(softlockup_touch_sync, false);
sched_clock_tick();
}
__touch_watchdog();
return HRTIMER_RESTART;
}
/* check for a softlockup
* This is done by making sure a high priority task is
* being scheduled. The task touches the watchdog to
* indicate it is getting cpu time. If it hasn't then
* this is a good indication some task is hogging the cpu
*/
duration = is_softlockup(touch_ts);
if (unlikely(duration)) {
/* only warn once */
if (__this_cpu_read(soft_watchdog_warn) == true)
return HRTIMER_RESTART;
printk(KERN_ERR "BUG: soft lockup - CPU#%d stuck for %us! [%s:%d]\n",
smp_processor_id(), duration,
current->comm, task_pid_nr(current));
print_modules();
print_irqtrace_events(current);
if (regs)
show_regs(regs);
else
dump_stack();
if (softlockup_panic)
panic("softlockup: hung tasks");
__this_cpu_write(soft_watchdog_warn, true);
} else
__this_cpu_write(soft_watchdog_warn, false);
return HRTIMER_RESTART;
}
| @@ -211,7 +211,7 @@ static struct perf_event_attr wd_hw_attr = {
};
/* Callback function for perf event subsystem */
-static void watchdog_overflow_callback(struct perf_event *event, int nmi,
+static void watchdog_overflow_callback(struct perf_event *event,
struct perf_sample_data *data,
struct pt_regs *regs)
{ | CWE-399 | null | null |
21,131 | static void _pmcraid_fire_command(struct pmcraid_cmd *cmd)
{
struct pmcraid_instance *pinstance = cmd->drv_inst;
unsigned long lock_flags;
/* Add this command block to pending cmd pool. We do this prior to
* writting IOARCB to ioarrin because IOA might complete the command
* by the time we are about to add it to the list. Response handler
* (isr/tasklet) looks for cmd block in the pending pending list.
*/
spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool);
spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
atomic_inc(&pinstance->outstanding_cmds);
/* driver writes lower 32-bit value of IOARCB address only */
mb();
iowrite32(le32_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr),
pinstance->ioarrin);
}
| DoS Mem. Corr. | 0 | static void _pmcraid_fire_command(struct pmcraid_cmd *cmd)
{
struct pmcraid_instance *pinstance = cmd->drv_inst;
unsigned long lock_flags;
/* Add this command block to pending cmd pool. We do this prior to
* writting IOARCB to ioarrin because IOA might complete the command
* by the time we are about to add it to the list. Response handler
* (isr/tasklet) looks for cmd block in the pending pending list.
*/
spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool);
spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
atomic_inc(&pinstance->outstanding_cmds);
/* driver writes lower 32-bit value of IOARCB address only */
mb();
iowrite32(le32_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr),
pinstance->ioarrin);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,132 | static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc)
{
struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
int rc = 0;
scsi_set_resid(scsi_cmd, reslen);
pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n",
le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
cmd->ioa_cb->ioarcb.cdb[0],
ioasc, scsi_cmd->result);
if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0)
rc = pmcraid_error_handler(cmd);
if (rc == 0) {
scsi_dma_unmap(scsi_cmd);
scsi_cmd->scsi_done(scsi_cmd);
}
return rc;
}
| DoS Mem. Corr. | 0 | static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc)
{
struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
int rc = 0;
scsi_set_resid(scsi_cmd, reslen);
pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n",
le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
cmd->ioa_cb->ioarcb.cdb[0],
ioasc, scsi_cmd->result);
if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0)
rc = pmcraid_error_handler(cmd);
if (rc == 0) {
scsi_dma_unmap(scsi_cmd);
scsi_cmd->scsi_done(scsi_cmd);
}
return rc;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,133 | static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd)
{
struct pmcraid_cmd *cancel_cmd;
struct pmcraid_instance *pinstance;
struct pmcraid_resource_entry *res;
pinstance = (struct pmcraid_instance *)cmd->drv_inst;
res = cmd->scsi_cmd->device->hostdata;
cancel_cmd = pmcraid_get_free_cmd(pinstance);
if (cancel_cmd == NULL) {
pmcraid_err("%s: no cmd blocks are available\n", __func__);
return NULL;
}
pmcraid_prepare_cancel_cmd(cancel_cmd, cmd);
pmcraid_info("aborting command CDB[0]= %x with index = %d\n",
cmd->ioa_cb->ioarcb.cdb[0],
cmd->ioa_cb->ioarcb.response_handle >> 2);
init_completion(&cancel_cmd->wait_for_completion);
cancel_cmd->completion_req = 1;
pmcraid_info("command (%d) CDB[0] = %x for %x\n",
le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2,
cancel_cmd->ioa_cb->ioarcb.cdb[0],
le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle));
pmcraid_send_cmd(cancel_cmd,
pmcraid_internal_done,
PMCRAID_INTERNAL_TIMEOUT,
pmcraid_timeout_handler);
return cancel_cmd;
}
| DoS Mem. Corr. | 0 | static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd)
{
struct pmcraid_cmd *cancel_cmd;
struct pmcraid_instance *pinstance;
struct pmcraid_resource_entry *res;
pinstance = (struct pmcraid_instance *)cmd->drv_inst;
res = cmd->scsi_cmd->device->hostdata;
cancel_cmd = pmcraid_get_free_cmd(pinstance);
if (cancel_cmd == NULL) {
pmcraid_err("%s: no cmd blocks are available\n", __func__);
return NULL;
}
pmcraid_prepare_cancel_cmd(cancel_cmd, cmd);
pmcraid_info("aborting command CDB[0]= %x with index = %d\n",
cmd->ioa_cb->ioarcb.cdb[0],
cmd->ioa_cb->ioarcb.response_handle >> 2);
init_completion(&cancel_cmd->wait_for_completion);
cancel_cmd->completion_req = 1;
pmcraid_info("command (%d) CDB[0] = %x for %x\n",
le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2,
cancel_cmd->ioa_cb->ioarcb.cdb[0],
le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle));
pmcraid_send_cmd(cancel_cmd,
pmcraid_internal_done,
PMCRAID_INTERNAL_TIMEOUT,
pmcraid_timeout_handler);
return cancel_cmd;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,134 | static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen)
{
struct pmcraid_sglist *sglist;
struct scatterlist *scatterlist;
struct page *page;
int num_elem, i, j;
int sg_size;
int order;
int bsize_elem;
sg_size = buflen / (PMCRAID_MAX_IOADLS - 1);
order = (sg_size > 0) ? get_order(sg_size) : 0;
bsize_elem = PAGE_SIZE * (1 << order);
/* Determine the actual number of sg entries needed */
if (buflen % bsize_elem)
num_elem = (buflen / bsize_elem) + 1;
else
num_elem = buflen / bsize_elem;
/* Allocate a scatter/gather list for the DMA */
sglist = kzalloc(sizeof(struct pmcraid_sglist) +
(sizeof(struct scatterlist) * (num_elem - 1)),
GFP_KERNEL);
if (sglist == NULL)
return NULL;
scatterlist = sglist->scatterlist;
sg_init_table(scatterlist, num_elem);
sglist->order = order;
sglist->num_sg = num_elem;
sg_size = buflen;
for (i = 0; i < num_elem; i++) {
page = alloc_pages(GFP_KERNEL|GFP_DMA|__GFP_ZERO, order);
if (!page) {
for (j = i - 1; j >= 0; j--)
__free_pages(sg_page(&scatterlist[j]), order);
kfree(sglist);
return NULL;
}
sg_set_page(&scatterlist[i], page,
sg_size < bsize_elem ? sg_size : bsize_elem, 0);
sg_size -= bsize_elem;
}
return sglist;
}
| DoS Mem. Corr. | 0 | static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen)
{
struct pmcraid_sglist *sglist;
struct scatterlist *scatterlist;
struct page *page;
int num_elem, i, j;
int sg_size;
int order;
int bsize_elem;
sg_size = buflen / (PMCRAID_MAX_IOADLS - 1);
order = (sg_size > 0) ? get_order(sg_size) : 0;
bsize_elem = PAGE_SIZE * (1 << order);
/* Determine the actual number of sg entries needed */
if (buflen % bsize_elem)
num_elem = (buflen / bsize_elem) + 1;
else
num_elem = buflen / bsize_elem;
/* Allocate a scatter/gather list for the DMA */
sglist = kzalloc(sizeof(struct pmcraid_sglist) +
(sizeof(struct scatterlist) * (num_elem - 1)),
GFP_KERNEL);
if (sglist == NULL)
return NULL;
scatterlist = sglist->scatterlist;
sg_init_table(scatterlist, num_elem);
sglist->order = order;
sglist->num_sg = num_elem;
sg_size = buflen;
for (i = 0; i < num_elem; i++) {
page = alloc_pages(GFP_KERNEL|GFP_DMA|__GFP_ZERO, order);
if (!page) {
for (j = i - 1; j >= 0; j--)
__free_pages(sg_page(&scatterlist[j]), order);
kfree(sglist);
return NULL;
}
sg_set_page(&scatterlist[i], page,
sg_size < bsize_elem ? sg_size : bsize_elem, 0);
sg_size -= bsize_elem;
}
return sglist;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,135 | pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance)
{
int i;
sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d",
pinstance->host->unique_id);
pinstance->control_pool =
pci_pool_create(pinstance->ctl_pool_name,
pinstance->pdev,
sizeof(struct pmcraid_control_block),
PMCRAID_IOARCB_ALIGNMENT, 0);
if (!pinstance->control_pool)
return -ENOMEM;
for (i = 0; i < PMCRAID_MAX_CMD; i++) {
pinstance->cmd_list[i]->ioa_cb =
pci_pool_alloc(
pinstance->control_pool,
GFP_KERNEL,
&(pinstance->cmd_list[i]->ioa_cb_bus_addr));
if (!pinstance->cmd_list[i]->ioa_cb) {
pmcraid_release_control_blocks(pinstance, i);
return -ENOMEM;
}
memset(pinstance->cmd_list[i]->ioa_cb, 0,
sizeof(struct pmcraid_control_block));
}
return 0;
}
| DoS Mem. Corr. | 0 | pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance)
{
int i;
sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d",
pinstance->host->unique_id);
pinstance->control_pool =
pci_pool_create(pinstance->ctl_pool_name,
pinstance->pdev,
sizeof(struct pmcraid_control_block),
PMCRAID_IOARCB_ALIGNMENT, 0);
if (!pinstance->control_pool)
return -ENOMEM;
for (i = 0; i < PMCRAID_MAX_CMD; i++) {
pinstance->cmd_list[i]->ioa_cb =
pci_pool_alloc(
pinstance->control_pool,
GFP_KERNEL,
&(pinstance->cmd_list[i]->ioa_cb_bus_addr));
if (!pinstance->cmd_list[i]->ioa_cb) {
pmcraid_release_control_blocks(pinstance, i);
return -ENOMEM;
}
memset(pinstance->cmd_list[i]->ioa_cb, 0,
sizeof(struct pmcraid_control_block));
}
return 0;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,136 | static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance)
{
pinstance->ccn.msg = pci_alloc_consistent(
pinstance->pdev,
PMCRAID_AEN_HDR_SIZE +
sizeof(struct pmcraid_hcam_ccn_ext),
&(pinstance->ccn.baddr));
pinstance->ldn.msg = pci_alloc_consistent(
pinstance->pdev,
PMCRAID_AEN_HDR_SIZE +
sizeof(struct pmcraid_hcam_ldn),
&(pinstance->ldn.baddr));
if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) {
pmcraid_release_hcams(pinstance);
} else {
pinstance->ccn.hcam =
(void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE;
pinstance->ldn.hcam =
(void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE;
atomic_set(&pinstance->ccn.ignore, 0);
atomic_set(&pinstance->ldn.ignore, 0);
}
return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0;
}
| DoS Mem. Corr. | 0 | static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance)
{
pinstance->ccn.msg = pci_alloc_consistent(
pinstance->pdev,
PMCRAID_AEN_HDR_SIZE +
sizeof(struct pmcraid_hcam_ccn_ext),
&(pinstance->ccn.baddr));
pinstance->ldn.msg = pci_alloc_consistent(
pinstance->pdev,
PMCRAID_AEN_HDR_SIZE +
sizeof(struct pmcraid_hcam_ldn),
&(pinstance->ldn.baddr));
if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) {
pmcraid_release_hcams(pinstance);
} else {
pinstance->ccn.hcam =
(void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE;
pinstance->ldn.hcam =
(void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE;
atomic_set(&pinstance->ccn.ignore, 0);
atomic_set(&pinstance->ldn.ignore, 0);
}
return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,137 | pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance)
{
int i, buffer_size;
buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
for (i = 0; i < pinstance->num_hrrq; i++) {
pinstance->hrrq_start[i] =
pci_alloc_consistent(
pinstance->pdev,
buffer_size,
&(pinstance->hrrq_start_bus_addr[i]));
if (pinstance->hrrq_start[i] == 0) {
pmcraid_err("pci_alloc failed for hrrq vector : %d\n",
i);
pmcraid_release_host_rrqs(pinstance, i);
return -ENOMEM;
}
memset(pinstance->hrrq_start[i], 0, buffer_size);
pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
pinstance->hrrq_end[i] =
pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
pinstance->host_toggle_bit[i] = 1;
spin_lock_init(&pinstance->hrrq_lock[i]);
}
return 0;
}
| DoS Mem. Corr. | 0 | pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance)
{
int i, buffer_size;
buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
for (i = 0; i < pinstance->num_hrrq; i++) {
pinstance->hrrq_start[i] =
pci_alloc_consistent(
pinstance->pdev,
buffer_size,
&(pinstance->hrrq_start_bus_addr[i]));
if (pinstance->hrrq_start[i] == 0) {
pmcraid_err("pci_alloc failed for hrrq vector : %d\n",
i);
pmcraid_release_host_rrqs(pinstance, i);
return -ENOMEM;
}
memset(pinstance->hrrq_start[i], 0, buffer_size);
pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
pinstance->hrrq_end[i] =
pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
pinstance->host_toggle_bit[i] = 1;
spin_lock_init(&pinstance->hrrq_lock[i]);
}
return 0;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,138 | static void pmcraid_bist_done(struct pmcraid_cmd *cmd)
{
struct pmcraid_instance *pinstance = cmd->drv_inst;
unsigned long lock_flags;
int rc;
u16 pci_reg;
rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
/* If PCI config space can't be accessed wait for another two secs */
if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
cmd->time_left > 0) {
pmcraid_info("BIST not complete, waiting another 2 secs\n");
cmd->timer.expires = jiffies + cmd->time_left;
cmd->time_left = 0;
cmd->timer.data = (unsigned long)cmd;
cmd->timer.function =
(void (*)(unsigned long))pmcraid_bist_done;
add_timer(&cmd->timer);
} else {
cmd->time_left = 0;
pmcraid_info("BIST is complete, proceeding with reset\n");
spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
pmcraid_ioa_reset(cmd);
spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
}
}
| DoS Mem. Corr. | 0 | static void pmcraid_bist_done(struct pmcraid_cmd *cmd)
{
struct pmcraid_instance *pinstance = cmd->drv_inst;
unsigned long lock_flags;
int rc;
u16 pci_reg;
rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
/* If PCI config space can't be accessed wait for another two secs */
if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
cmd->time_left > 0) {
pmcraid_info("BIST not complete, waiting another 2 secs\n");
cmd->timer.expires = jiffies + cmd->time_left;
cmd->time_left = 0;
cmd->timer.data = (unsigned long)cmd;
cmd->timer.function =
(void (*)(unsigned long))pmcraid_bist_done;
add_timer(&cmd->timer);
} else {
cmd->time_left = 0;
pmcraid_info("BIST is complete, proceeding with reset\n");
spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
pmcraid_ioa_reset(cmd);
spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
}
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,139 | static int pmcraid_build_ioadl(
struct pmcraid_instance *pinstance,
struct pmcraid_cmd *cmd
)
{
int i, nseg;
struct scatterlist *sglist;
struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
u32 length = scsi_bufflen(scsi_cmd);
if (!length)
return 0;
nseg = scsi_dma_map(scsi_cmd);
if (nseg < 0) {
scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n");
return -1;
} else if (nseg > PMCRAID_MAX_IOADLS) {
scsi_dma_unmap(scsi_cmd);
scmd_printk(KERN_ERR, scsi_cmd,
"sg count is (%d) more than allowed!\n", nseg);
return -1;
}
/* Initialize IOARCB data transfer length fields */
if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE)
ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
ioarcb->request_flags0 |= NO_LINK_DESCS;
ioarcb->data_transfer_length = cpu_to_le32(length);
ioadl = pmcraid_init_ioadls(cmd, nseg);
/* Initialize IOADL descriptor addresses */
scsi_for_each_sg(scsi_cmd, sglist, nseg, i) {
ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist));
ioadl[i].address = cpu_to_le64(sg_dma_address(sglist));
ioadl[i].flags = 0;
}
/* setup last descriptor */
ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
return 0;
}
| DoS Mem. Corr. | 0 | static int pmcraid_build_ioadl(
struct pmcraid_instance *pinstance,
struct pmcraid_cmd *cmd
)
{
int i, nseg;
struct scatterlist *sglist;
struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
u32 length = scsi_bufflen(scsi_cmd);
if (!length)
return 0;
nseg = scsi_dma_map(scsi_cmd);
if (nseg < 0) {
scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n");
return -1;
} else if (nseg > PMCRAID_MAX_IOADLS) {
scsi_dma_unmap(scsi_cmd);
scmd_printk(KERN_ERR, scsi_cmd,
"sg count is (%d) more than allowed!\n", nseg);
return -1;
}
/* Initialize IOARCB data transfer length fields */
if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE)
ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
ioarcb->request_flags0 |= NO_LINK_DESCS;
ioarcb->data_transfer_length = cpu_to_le32(length);
ioadl = pmcraid_init_ioadls(cmd, nseg);
/* Initialize IOADL descriptor addresses */
scsi_for_each_sg(scsi_cmd, sglist, nseg, i) {
ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist));
ioadl[i].address = cpu_to_le64(sg_dma_address(sglist));
ioadl[i].flags = 0;
}
/* setup last descriptor */
ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
return 0;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,140 | static int pmcraid_build_passthrough_ioadls(
struct pmcraid_cmd *cmd,
int buflen,
int direction
)
{
struct pmcraid_sglist *sglist = NULL;
struct scatterlist *sg = NULL;
struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
struct pmcraid_ioadl_desc *ioadl;
int i;
sglist = pmcraid_alloc_sglist(buflen);
if (!sglist) {
pmcraid_err("can't allocate memory for passthrough SGls\n");
return -ENOMEM;
}
sglist->num_dma_sg = pci_map_sg(cmd->drv_inst->pdev,
sglist->scatterlist,
sglist->num_sg, direction);
if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) {
dev_err(&cmd->drv_inst->pdev->dev,
"Failed to map passthrough buffer!\n");
pmcraid_free_sglist(sglist);
return -EIO;
}
cmd->sglist = sglist;
ioarcb->request_flags0 |= NO_LINK_DESCS;
ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg);
/* Initialize IOADL descriptor addresses */
for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) {
ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg));
ioadl[i].address = cpu_to_le64(sg_dma_address(sg));
ioadl[i].flags = 0;
}
/* setup the last descriptor */
ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
return 0;
}
| DoS Mem. Corr. | 0 | static int pmcraid_build_passthrough_ioadls(
struct pmcraid_cmd *cmd,
int buflen,
int direction
)
{
struct pmcraid_sglist *sglist = NULL;
struct scatterlist *sg = NULL;
struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
struct pmcraid_ioadl_desc *ioadl;
int i;
sglist = pmcraid_alloc_sglist(buflen);
if (!sglist) {
pmcraid_err("can't allocate memory for passthrough SGls\n");
return -ENOMEM;
}
sglist->num_dma_sg = pci_map_sg(cmd->drv_inst->pdev,
sglist->scatterlist,
sglist->num_sg, direction);
if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) {
dev_err(&cmd->drv_inst->pdev->dev,
"Failed to map passthrough buffer!\n");
pmcraid_free_sglist(sglist);
return -EIO;
}
cmd->sglist = sglist;
ioarcb->request_flags0 |= NO_LINK_DESCS;
ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg);
/* Initialize IOADL descriptor addresses */
for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) {
ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg));
ioadl[i].address = cpu_to_le64(sg_dma_address(sg));
ioadl[i].flags = 0;
}
/* setup the last descriptor */
ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
return 0;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,141 | static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, u32 sense)
{
struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
void (*cmd_done) (struct pmcraid_cmd *) = sense ? pmcraid_erp_done
: pmcraid_request_sense;
memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
ioarcb->request_flags0 = SYNC_OVERRIDE;
ioarcb->request_type = REQ_TYPE_IOACMD;
ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS;
if (RES_IS_GSCSI(res->cfg_entry))
ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL;
ioarcb->ioadl_bus_addr = 0;
ioarcb->ioadl_length = 0;
ioarcb->data_transfer_length = 0;
ioarcb->ioarcb_bus_addr &= (~0x1FULL);
/* writing to IOARRIN must be protected by host_lock, as mid-layer
* schedule queuecommand while we are doing this
*/
pmcraid_send_cmd(cmd, cmd_done,
PMCRAID_REQUEST_SENSE_TIMEOUT,
pmcraid_timeout_handler);
}
| DoS Mem. Corr. | 0 | static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, u32 sense)
{
struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
void (*cmd_done) (struct pmcraid_cmd *) = sense ? pmcraid_erp_done
: pmcraid_request_sense;
memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
ioarcb->request_flags0 = SYNC_OVERRIDE;
ioarcb->request_type = REQ_TYPE_IOACMD;
ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS;
if (RES_IS_GSCSI(res->cfg_entry))
ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL;
ioarcb->ioadl_bus_addr = 0;
ioarcb->ioadl_length = 0;
ioarcb->data_transfer_length = 0;
ioarcb->ioarcb_bus_addr &= (~0x1FULL);
/* writing to IOARRIN must be protected by host_lock, as mid-layer
* schedule queuecommand while we are doing this
*/
pmcraid_send_cmd(cmd, cmd_done,
PMCRAID_REQUEST_SENSE_TIMEOUT,
pmcraid_timeout_handler);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,142 | static void pmcraid_cancel_hcam(
struct pmcraid_cmd *cmd,
u8 type,
void (*cmd_done) (struct pmcraid_cmd *)
)
{
struct pmcraid_instance *pinstance;
struct pmcraid_hostrcb *hcam;
pinstance = cmd->drv_inst;
hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ?
&pinstance->ldn : &pinstance->ccn;
/* prepare for cancelling previous hcam command. If the HCAM is
* currently not pending with IOA, we would have hcam->cmd as non-null
*/
if (hcam->cmd == NULL)
return;
pmcraid_prepare_cancel_cmd(cmd, hcam->cmd);
/* writing to IOARRIN must be protected by host_lock, as mid-layer
* schedule queuecommand while we are doing this
*/
pmcraid_send_cmd(cmd, cmd_done,
PMCRAID_INTERNAL_TIMEOUT,
pmcraid_timeout_handler);
}
| DoS Mem. Corr. | 0 | static void pmcraid_cancel_hcam(
struct pmcraid_cmd *cmd,
u8 type,
void (*cmd_done) (struct pmcraid_cmd *)
)
{
struct pmcraid_instance *pinstance;
struct pmcraid_hostrcb *hcam;
pinstance = cmd->drv_inst;
hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ?
&pinstance->ldn : &pinstance->ccn;
/* prepare for cancelling previous hcam command. If the HCAM is
* currently not pending with IOA, we would have hcam->cmd as non-null
*/
if (hcam->cmd == NULL)
return;
pmcraid_prepare_cancel_cmd(cmd, hcam->cmd);
/* writing to IOARRIN must be protected by host_lock, as mid-layer
* schedule queuecommand while we are doing this
*/
pmcraid_send_cmd(cmd, cmd_done,
PMCRAID_INTERNAL_TIMEOUT,
pmcraid_timeout_handler);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,143 | static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd)
{
pmcraid_cancel_hcam(cmd,
PMCRAID_HCAM_CODE_LOG_DATA,
pmcraid_cancel_ccn);
}
| DoS Mem. Corr. | 0 | static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd)
{
pmcraid_cancel_hcam(cmd,
PMCRAID_HCAM_CODE_LOG_DATA,
pmcraid_cancel_ccn);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,144 | static int pmcraid_change_queue_type(struct scsi_device *scsi_dev, int tag)
{
struct pmcraid_resource_entry *res;
res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
if ((res) && scsi_dev->tagged_supported &&
(RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry))) {
scsi_set_tag_type(scsi_dev, tag);
if (tag)
scsi_activate_tcq(scsi_dev, scsi_dev->queue_depth);
else
scsi_deactivate_tcq(scsi_dev, scsi_dev->queue_depth);
} else
tag = 0;
return tag;
}
| DoS Mem. Corr. | 0 | static int pmcraid_change_queue_type(struct scsi_device *scsi_dev, int tag)
{
struct pmcraid_resource_entry *res;
res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
if ((res) && scsi_dev->tagged_supported &&
(RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry))) {
scsi_set_tag_type(scsi_dev, tag);
if (tag)
scsi_activate_tcq(scsi_dev, scsi_dev->queue_depth);
else
scsi_deactivate_tcq(scsi_dev, scsi_dev->queue_depth);
} else
tag = 0;
return tag;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,145 | static int pmcraid_check_ioctl_buffer(
int cmd,
void __user *arg,
struct pmcraid_ioctl_header *hdr
)
{
int rc = 0;
int access = VERIFY_READ;
if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) {
pmcraid_err("couldn't copy ioctl header from user buffer\n");
return -EFAULT;
}
/* check for valid driver signature */
rc = memcmp(hdr->signature,
PMCRAID_IOCTL_SIGNATURE,
sizeof(hdr->signature));
if (rc) {
pmcraid_err("signature verification failed\n");
return -EINVAL;
}
/* check for appropriate buffer access */
if ((_IOC_DIR(cmd) & _IOC_READ) == _IOC_READ)
access = VERIFY_WRITE;
rc = access_ok(access,
(arg + sizeof(struct pmcraid_ioctl_header)),
hdr->buffer_length);
if (!rc) {
pmcraid_err("access failed for user buffer of size %d\n",
hdr->buffer_length);
return -EFAULT;
}
return 0;
}
| DoS Mem. Corr. | 0 | static int pmcraid_check_ioctl_buffer(
int cmd,
void __user *arg,
struct pmcraid_ioctl_header *hdr
)
{
int rc = 0;
int access = VERIFY_READ;
if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) {
pmcraid_err("couldn't copy ioctl header from user buffer\n");
return -EFAULT;
}
/* check for valid driver signature */
rc = memcmp(hdr->signature,
PMCRAID_IOCTL_SIGNATURE,
sizeof(hdr->signature));
if (rc) {
pmcraid_err("signature verification failed\n");
return -EINVAL;
}
/* check for appropriate buffer access */
if ((_IOC_DIR(cmd) & _IOC_READ) == _IOC_READ)
access = VERIFY_WRITE;
rc = access_ok(access,
(arg + sizeof(struct pmcraid_ioctl_header)),
hdr->buffer_length);
if (!rc) {
pmcraid_err("access failed for user buffer of size %d\n",
hdr->buffer_length);
return -EFAULT;
}
return 0;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,146 | static int pmcraid_chr_fasync(int fd, struct file *filep, int mode)
{
struct pmcraid_instance *pinstance;
int rc;
pinstance = filep->private_data;
mutex_lock(&pinstance->aen_queue_lock);
rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue);
mutex_unlock(&pinstance->aen_queue_lock);
return rc;
}
| DoS Mem. Corr. | 0 | static int pmcraid_chr_fasync(int fd, struct file *filep, int mode)
{
struct pmcraid_instance *pinstance;
int rc;
pinstance = filep->private_data;
mutex_lock(&pinstance->aen_queue_lock);
rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue);
mutex_unlock(&pinstance->aen_queue_lock);
return rc;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,147 | static int pmcraid_chr_open(struct inode *inode, struct file *filep)
{
struct pmcraid_instance *pinstance;
if (!capable(CAP_SYS_ADMIN))
return -EACCES;
/* Populate adapter instance * pointer for use by ioctl */
pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev);
filep->private_data = pinstance;
return 0;
}
| DoS Mem. Corr. | 0 | static int pmcraid_chr_open(struct inode *inode, struct file *filep)
{
struct pmcraid_instance *pinstance;
if (!capable(CAP_SYS_ADMIN))
return -EACCES;
/* Populate adapter instance * pointer for use by ioctl */
pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev);
filep->private_data = pinstance;
return 0;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,148 | static int pmcraid_chr_release(struct inode *inode, struct file *filep)
{
struct pmcraid_instance *pinstance = filep->private_data;
filep->private_data = NULL;
fasync_helper(-1, filep, 0, &pinstance->aen_queue);
return 0;
}
| DoS Mem. Corr. | 0 | static int pmcraid_chr_release(struct inode *inode, struct file *filep)
{
struct pmcraid_instance *pinstance = filep->private_data;
filep->private_data = NULL;
fasync_helper(-1, filep, 0, &pinstance->aen_queue);
return 0;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,149 | static void pmcraid_clr_trans_op(
struct pmcraid_instance *pinstance
)
{
unsigned long lock_flags;
if (!pinstance->interrupt_mode) {
iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
pinstance->int_regs.ioa_host_interrupt_mask_reg);
ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
pinstance->int_regs.ioa_host_interrupt_clr_reg);
ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg);
}
if (pinstance->reset_cmd != NULL) {
del_timer(&pinstance->reset_cmd->timer);
spin_lock_irqsave(
pinstance->host->host_lock, lock_flags);
pinstance->reset_cmd->cmd_done(pinstance->reset_cmd);
spin_unlock_irqrestore(
pinstance->host->host_lock, lock_flags);
}
}
| DoS Mem. Corr. | 0 | static void pmcraid_clr_trans_op(
struct pmcraid_instance *pinstance
)
{
unsigned long lock_flags;
if (!pinstance->interrupt_mode) {
iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
pinstance->int_regs.ioa_host_interrupt_mask_reg);
ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
pinstance->int_regs.ioa_host_interrupt_clr_reg);
ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg);
}
if (pinstance->reset_cmd != NULL) {
del_timer(&pinstance->reset_cmd->timer);
spin_lock_irqsave(
pinstance->host->host_lock, lock_flags);
pinstance->reset_cmd->cmd_done(pinstance->reset_cmd);
spin_unlock_irqrestore(
pinstance->host->host_lock, lock_flags);
}
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,150 | static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd)
{
struct pmcraid_instance *pinstance = cmd->drv_inst;
unsigned long flags;
spin_lock_irqsave(pinstance->host->host_lock, flags);
pmcraid_ioa_reset(cmd);
spin_unlock_irqrestore(pinstance->host->host_lock, flags);
scsi_unblock_requests(pinstance->host);
schedule_work(&pinstance->worker_q);
}
| DoS Mem. Corr. | 0 | static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd)
{
struct pmcraid_instance *pinstance = cmd->drv_inst;
unsigned long flags;
spin_lock_irqsave(pinstance->host->host_lock, flags);
pmcraid_ioa_reset(cmd);
spin_unlock_irqrestore(pinstance->host->host_lock, flags);
scsi_unblock_requests(pinstance->host);
schedule_work(&pinstance->worker_q);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,151 | static int pmcraid_copy_sglist(
struct pmcraid_sglist *sglist,
unsigned long buffer,
u32 len,
int direction
)
{
struct scatterlist *scatterlist;
void *kaddr;
int bsize_elem;
int i;
int rc = 0;
/* Determine the actual number of bytes per element */
bsize_elem = PAGE_SIZE * (1 << sglist->order);
scatterlist = sglist->scatterlist;
for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
struct page *page = sg_page(&scatterlist[i]);
kaddr = kmap(page);
if (direction == DMA_TO_DEVICE)
rc = __copy_from_user(kaddr,
(void *)buffer,
bsize_elem);
else
rc = __copy_to_user((void *)buffer, kaddr, bsize_elem);
kunmap(page);
if (rc) {
pmcraid_err("failed to copy user data into sg list\n");
return -EFAULT;
}
scatterlist[i].length = bsize_elem;
}
if (len % bsize_elem) {
struct page *page = sg_page(&scatterlist[i]);
kaddr = kmap(page);
if (direction == DMA_TO_DEVICE)
rc = __copy_from_user(kaddr,
(void *)buffer,
len % bsize_elem);
else
rc = __copy_to_user((void *)buffer,
kaddr,
len % bsize_elem);
kunmap(page);
scatterlist[i].length = len % bsize_elem;
}
if (rc) {
pmcraid_err("failed to copy user data into sg list\n");
rc = -EFAULT;
}
return rc;
}
| DoS Mem. Corr. | 0 | static int pmcraid_copy_sglist(
struct pmcraid_sglist *sglist,
unsigned long buffer,
u32 len,
int direction
)
{
struct scatterlist *scatterlist;
void *kaddr;
int bsize_elem;
int i;
int rc = 0;
/* Determine the actual number of bytes per element */
bsize_elem = PAGE_SIZE * (1 << sglist->order);
scatterlist = sglist->scatterlist;
for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
struct page *page = sg_page(&scatterlist[i]);
kaddr = kmap(page);
if (direction == DMA_TO_DEVICE)
rc = __copy_from_user(kaddr,
(void *)buffer,
bsize_elem);
else
rc = __copy_to_user((void *)buffer, kaddr, bsize_elem);
kunmap(page);
if (rc) {
pmcraid_err("failed to copy user data into sg list\n");
return -EFAULT;
}
scatterlist[i].length = bsize_elem;
}
if (len % bsize_elem) {
struct page *page = sg_page(&scatterlist[i]);
kaddr = kmap(page);
if (direction == DMA_TO_DEVICE)
rc = __copy_from_user(kaddr,
(void *)buffer,
len % bsize_elem);
else
rc = __copy_to_user((void *)buffer,
kaddr,
len % bsize_elem);
kunmap(page);
scatterlist[i].length = len % bsize_elem;
}
if (rc) {
pmcraid_err("failed to copy user data into sg list\n");
rc = -EFAULT;
}
return rc;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,152 | static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd)
{
struct pmcraid_instance *pinstance;
struct pmcraid_cmd *cmd;
struct pmcraid_resource_entry *res;
unsigned long host_lock_flags;
unsigned long pending_lock_flags;
struct pmcraid_cmd *cancel_cmd = NULL;
int cmd_found = 0;
int rc = FAILED;
pinstance =
(struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
scmd_printk(KERN_INFO, scsi_cmd,
"I/O command timed out, aborting it.\n");
res = scsi_cmd->device->hostdata;
if (res == NULL)
return rc;
/* If we are currently going through reset/reload, return failed.
* This will force the mid-layer to eventually call
* pmcraid_eh_host_reset which will then go to sleep and wait for the
* reset to complete
*/
spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags);
if (pinstance->ioa_reset_in_progress ||
pinstance->ioa_state == IOA_STATE_DEAD) {
spin_unlock_irqrestore(pinstance->host->host_lock,
host_lock_flags);
return rc;
}
/* loop over pending cmd list to find cmd corresponding to this
* scsi_cmd. Note that this command might not have been completed
* already. locking: all pending commands are protected with
* pending_pool_lock.
*/
spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags);
list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) {
if (cmd->scsi_cmd == scsi_cmd) {
cmd_found = 1;
break;
}
}
spin_unlock_irqrestore(&pinstance->pending_pool_lock,
pending_lock_flags);
/* If the command to be aborted was given to IOA and still pending with
* it, send ABORT_TASK to abort this and wait for its completion
*/
if (cmd_found)
cancel_cmd = pmcraid_abort_cmd(cmd);
spin_unlock_irqrestore(pinstance->host->host_lock,
host_lock_flags);
if (cancel_cmd) {
cancel_cmd->res = cmd->scsi_cmd->device->hostdata;
rc = pmcraid_abort_complete(cancel_cmd);
}
return cmd_found ? rc : SUCCESS;
}
| DoS Mem. Corr. | 0 | static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd)
{
struct pmcraid_instance *pinstance;
struct pmcraid_cmd *cmd;
struct pmcraid_resource_entry *res;
unsigned long host_lock_flags;
unsigned long pending_lock_flags;
struct pmcraid_cmd *cancel_cmd = NULL;
int cmd_found = 0;
int rc = FAILED;
pinstance =
(struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
scmd_printk(KERN_INFO, scsi_cmd,
"I/O command timed out, aborting it.\n");
res = scsi_cmd->device->hostdata;
if (res == NULL)
return rc;
/* If we are currently going through reset/reload, return failed.
* This will force the mid-layer to eventually call
* pmcraid_eh_host_reset which will then go to sleep and wait for the
* reset to complete
*/
spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags);
if (pinstance->ioa_reset_in_progress ||
pinstance->ioa_state == IOA_STATE_DEAD) {
spin_unlock_irqrestore(pinstance->host->host_lock,
host_lock_flags);
return rc;
}
/* loop over pending cmd list to find cmd corresponding to this
* scsi_cmd. Note that this command might not have been completed
* already. locking: all pending commands are protected with
* pending_pool_lock.
*/
spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags);
list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) {
if (cmd->scsi_cmd == scsi_cmd) {
cmd_found = 1;
break;
}
}
spin_unlock_irqrestore(&pinstance->pending_pool_lock,
pending_lock_flags);
/* If the command to be aborted was given to IOA and still pending with
* it, send ABORT_TASK to abort this and wait for its completion
*/
if (cmd_found)
cancel_cmd = pmcraid_abort_cmd(cmd);
spin_unlock_irqrestore(pinstance->host->host_lock,
host_lock_flags);
if (cancel_cmd) {
cancel_cmd->res = cmd->scsi_cmd->device->hostdata;
rc = pmcraid_abort_complete(cancel_cmd);
}
return cmd_found ? rc : SUCCESS;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,153 | static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd)
{
scmd_printk(KERN_INFO, scmd,
"Doing bus reset due to an I/O command timeout.\n");
return pmcraid_reset_device(scmd,
PMCRAID_RESET_BUS_TIMEOUT,
RESET_DEVICE_BUS);
}
| DoS Mem. Corr. | 0 | static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd)
{
scmd_printk(KERN_INFO, scmd,
"Doing bus reset due to an I/O command timeout.\n");
return pmcraid_reset_device(scmd,
PMCRAID_RESET_BUS_TIMEOUT,
RESET_DEVICE_BUS);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,154 | static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd)
{
scmd_printk(KERN_INFO, scmd,
"resetting device due to an I/O command timeout.\n");
return pmcraid_reset_device(scmd,
PMCRAID_INTERNAL_TIMEOUT,
RESET_DEVICE_LUN);
}
| DoS Mem. Corr. | 0 | static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd)
{
scmd_printk(KERN_INFO, scmd,
"resetting device due to an I/O command timeout.\n");
return pmcraid_reset_device(scmd,
PMCRAID_INTERNAL_TIMEOUT,
RESET_DEVICE_LUN);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,155 | static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd)
{
scmd_printk(KERN_INFO, scmd,
"Doing target reset due to an I/O command timeout.\n");
return pmcraid_reset_device(scmd,
PMCRAID_INTERNAL_TIMEOUT,
RESET_DEVICE_TARGET);
}
| DoS Mem. Corr. | 0 | static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd)
{
scmd_printk(KERN_INFO, scmd,
"Doing target reset due to an I/O command timeout.\n");
return pmcraid_reset_device(scmd,
PMCRAID_INTERNAL_TIMEOUT,
RESET_DEVICE_TARGET);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,156 | static void pmcraid_erp_done(struct pmcraid_cmd *cmd)
{
struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
struct pmcraid_instance *pinstance = cmd->drv_inst;
u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) {
scsi_cmd->result |= (DID_ERROR << 16);
scmd_printk(KERN_INFO, scsi_cmd,
"command CDB[0] = %x failed with IOASC: 0x%08X\n",
cmd->ioa_cb->ioarcb.cdb[0], ioasc);
}
/* if we had allocated sense buffers for request sense, copy the sense
* release the buffers
*/
if (cmd->sense_buffer != NULL) {
memcpy(scsi_cmd->sense_buffer,
cmd->sense_buffer,
SCSI_SENSE_BUFFERSIZE);
pci_free_consistent(pinstance->pdev,
SCSI_SENSE_BUFFERSIZE,
cmd->sense_buffer, cmd->sense_buffer_dma);
cmd->sense_buffer = NULL;
cmd->sense_buffer_dma = 0;
}
scsi_dma_unmap(scsi_cmd);
pmcraid_return_cmd(cmd);
scsi_cmd->scsi_done(scsi_cmd);
}
| DoS Mem. Corr. | 0 | static void pmcraid_erp_done(struct pmcraid_cmd *cmd)
{
struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
struct pmcraid_instance *pinstance = cmd->drv_inst;
u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) {
scsi_cmd->result |= (DID_ERROR << 16);
scmd_printk(KERN_INFO, scsi_cmd,
"command CDB[0] = %x failed with IOASC: 0x%08X\n",
cmd->ioa_cb->ioarcb.cdb[0], ioasc);
}
/* if we had allocated sense buffers for request sense, copy the sense
* release the buffers
*/
if (cmd->sense_buffer != NULL) {
memcpy(scsi_cmd->sense_buffer,
cmd->sense_buffer,
SCSI_SENSE_BUFFERSIZE);
pci_free_consistent(pinstance->pdev,
SCSI_SENSE_BUFFERSIZE,
cmd->sense_buffer, cmd->sense_buffer_dma);
cmd->sense_buffer = NULL;
cmd->sense_buffer_dma = 0;
}
scsi_dma_unmap(scsi_cmd);
pmcraid_return_cmd(cmd);
scsi_cmd->scsi_done(scsi_cmd);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,157 | static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
{
struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
struct pmcraid_instance *pinstance = cmd->drv_inst;
struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
u32 ioasc = le32_to_cpu(ioasa->ioasc);
u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK;
u32 sense_copied = 0;
if (!res) {
pmcraid_info("resource pointer is NULL\n");
return 0;
}
/* If this was a SCSI read/write command keep count of errors */
if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD)
atomic_inc(&res->read_failures);
else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD)
atomic_inc(&res->write_failures);
if (!RES_IS_GSCSI(res->cfg_entry) &&
masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) {
pmcraid_frame_auto_sense(cmd);
}
/* Log IOASC/IOASA information based on user settings */
pmcraid_ioasc_logger(ioasc, cmd);
switch (masked_ioasc) {
case PMCRAID_IOASC_AC_TERMINATED_BY_HOST:
scsi_cmd->result |= (DID_ABORT << 16);
break;
case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE:
case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE:
scsi_cmd->result |= (DID_NO_CONNECT << 16);
break;
case PMCRAID_IOASC_NR_SYNC_REQUIRED:
res->sync_reqd = 1;
scsi_cmd->result |= (DID_IMM_RETRY << 16);
break;
case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC:
scsi_cmd->result |= (DID_PASSTHROUGH << 16);
break;
case PMCRAID_IOASC_UA_BUS_WAS_RESET:
case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER:
if (!res->reset_progress)
scsi_report_bus_reset(pinstance->host,
scsi_cmd->device->channel);
scsi_cmd->result |= (DID_ERROR << 16);
break;
case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR:
scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc);
res->sync_reqd = 1;
/* if check_condition is not active return with error otherwise
* get/frame the sense buffer
*/
if (PMCRAID_IOASC_SENSE_STATUS(ioasc) !=
SAM_STAT_CHECK_CONDITION &&
PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE)
return 0;
/* If we have auto sense data as part of IOASA pass it to
* mid-layer
*/
if (ioasa->auto_sense_length != 0) {
short sense_len = ioasa->auto_sense_length;
int data_size = min_t(u16, le16_to_cpu(sense_len),
SCSI_SENSE_BUFFERSIZE);
memcpy(scsi_cmd->sense_buffer,
ioasa->sense_data,
data_size);
sense_copied = 1;
}
if (RES_IS_GSCSI(res->cfg_entry))
pmcraid_cancel_all(cmd, sense_copied);
else if (sense_copied)
pmcraid_erp_done(cmd);
else
pmcraid_request_sense(cmd);
return 1;
case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED:
break;
default:
if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
scsi_cmd->result |= (DID_ERROR << 16);
break;
}
return 0;
}
| DoS Mem. Corr. | 0 | static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
{
struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
struct pmcraid_instance *pinstance = cmd->drv_inst;
struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
u32 ioasc = le32_to_cpu(ioasa->ioasc);
u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK;
u32 sense_copied = 0;
if (!res) {
pmcraid_info("resource pointer is NULL\n");
return 0;
}
/* If this was a SCSI read/write command keep count of errors */
if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD)
atomic_inc(&res->read_failures);
else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD)
atomic_inc(&res->write_failures);
if (!RES_IS_GSCSI(res->cfg_entry) &&
masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) {
pmcraid_frame_auto_sense(cmd);
}
/* Log IOASC/IOASA information based on user settings */
pmcraid_ioasc_logger(ioasc, cmd);
switch (masked_ioasc) {
case PMCRAID_IOASC_AC_TERMINATED_BY_HOST:
scsi_cmd->result |= (DID_ABORT << 16);
break;
case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE:
case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE:
scsi_cmd->result |= (DID_NO_CONNECT << 16);
break;
case PMCRAID_IOASC_NR_SYNC_REQUIRED:
res->sync_reqd = 1;
scsi_cmd->result |= (DID_IMM_RETRY << 16);
break;
case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC:
scsi_cmd->result |= (DID_PASSTHROUGH << 16);
break;
case PMCRAID_IOASC_UA_BUS_WAS_RESET:
case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER:
if (!res->reset_progress)
scsi_report_bus_reset(pinstance->host,
scsi_cmd->device->channel);
scsi_cmd->result |= (DID_ERROR << 16);
break;
case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR:
scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc);
res->sync_reqd = 1;
/* if check_condition is not active return with error otherwise
* get/frame the sense buffer
*/
if (PMCRAID_IOASC_SENSE_STATUS(ioasc) !=
SAM_STAT_CHECK_CONDITION &&
PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE)
return 0;
/* If we have auto sense data as part of IOASA pass it to
* mid-layer
*/
if (ioasa->auto_sense_length != 0) {
short sense_len = ioasa->auto_sense_length;
int data_size = min_t(u16, le16_to_cpu(sense_len),
SCSI_SENSE_BUFFERSIZE);
memcpy(scsi_cmd->sense_buffer,
ioasa->sense_data,
data_size);
sense_copied = 1;
}
if (RES_IS_GSCSI(res->cfg_entry))
pmcraid_cancel_all(cmd, sense_copied);
else if (sense_copied)
pmcraid_erp_done(cmd);
else
pmcraid_request_sense(cmd);
return 1;
case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED:
break;
default:
if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
scsi_cmd->result |= (DID_ERROR << 16);
break;
}
return 0;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,158 | static void __exit pmcraid_exit(void)
{
pmcraid_netlink_release();
unregister_chrdev_region(MKDEV(pmcraid_major, 0),
PMCRAID_MAX_ADAPTERS);
pci_unregister_driver(&pmcraid_driver);
class_destroy(pmcraid_class);
}
| DoS Mem. Corr. | 0 | static void __exit pmcraid_exit(void)
{
pmcraid_netlink_release();
unregister_chrdev_region(MKDEV(pmcraid_major, 0),
PMCRAID_MAX_ADAPTERS);
pci_unregister_driver(&pmcraid_driver);
class_destroy(pmcraid_class);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,159 | static int pmcraid_expose_resource(u16 fw_version,
struct pmcraid_config_table_entry *cfgte)
{
int retval = 0;
if (cfgte->resource_type == RES_TYPE_VSET) {
if (fw_version <= PMCRAID_FW_VERSION_1)
retval = ((cfgte->unique_flags1 & 0x80) == 0);
else
retval = ((cfgte->unique_flags0 & 0x80) == 0 &&
(cfgte->unique_flags1 & 0x80) == 0);
} else if (cfgte->resource_type == RES_TYPE_GSCSI)
retval = (RES_BUS(cfgte->resource_address) !=
PMCRAID_VIRTUAL_ENCL_BUS_ID);
return retval;
}
| DoS Mem. Corr. | 0 | static int pmcraid_expose_resource(u16 fw_version,
struct pmcraid_config_table_entry *cfgte)
{
int retval = 0;
if (cfgte->resource_type == RES_TYPE_VSET) {
if (fw_version <= PMCRAID_FW_VERSION_1)
retval = ((cfgte->unique_flags1 & 0x80) == 0);
else
retval = ((cfgte->unique_flags0 & 0x80) == 0 &&
(cfgte->unique_flags1 & 0x80) == 0);
} else if (cfgte->resource_type == RES_TYPE_GSCSI)
retval = (RES_BUS(cfgte->resource_address) !=
PMCRAID_VIRTUAL_ENCL_BUS_ID);
return retval;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,160 | static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd)
{
u8 *sense_buf = cmd->scsi_cmd->sense_buffer;
struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata;
struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
u32 ioasc = le32_to_cpu(ioasa->ioasc);
u32 failing_lba = 0;
memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
if (RES_IS_VSET(res->cfg_entry) &&
ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC &&
ioasa->u.vset.failing_lba_hi != 0) {
sense_buf[0] = 0x72;
sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc);
sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc);
sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
sense_buf[7] = 12;
sense_buf[8] = 0;
sense_buf[9] = 0x0A;
sense_buf[10] = 0x80;
failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi);
sense_buf[12] = (failing_lba & 0xff000000) >> 24;
sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
sense_buf[15] = failing_lba & 0x000000ff;
failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo);
sense_buf[16] = (failing_lba & 0xff000000) >> 24;
sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
sense_buf[19] = failing_lba & 0x000000ff;
} else {
sense_buf[0] = 0x70;
sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc);
sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc);
sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) {
if (RES_IS_VSET(res->cfg_entry))
failing_lba =
le32_to_cpu(ioasa->u.
vset.failing_lba_lo);
sense_buf[0] |= 0x80;
sense_buf[3] = (failing_lba >> 24) & 0xff;
sense_buf[4] = (failing_lba >> 16) & 0xff;
sense_buf[5] = (failing_lba >> 8) & 0xff;
sense_buf[6] = failing_lba & 0xff;
}
sense_buf[7] = 6; /* additional length */
}
}
| DoS Mem. Corr. | 0 | static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd)
{
u8 *sense_buf = cmd->scsi_cmd->sense_buffer;
struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata;
struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
u32 ioasc = le32_to_cpu(ioasa->ioasc);
u32 failing_lba = 0;
memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
if (RES_IS_VSET(res->cfg_entry) &&
ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC &&
ioasa->u.vset.failing_lba_hi != 0) {
sense_buf[0] = 0x72;
sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc);
sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc);
sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
sense_buf[7] = 12;
sense_buf[8] = 0;
sense_buf[9] = 0x0A;
sense_buf[10] = 0x80;
failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi);
sense_buf[12] = (failing_lba & 0xff000000) >> 24;
sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
sense_buf[15] = failing_lba & 0x000000ff;
failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo);
sense_buf[16] = (failing_lba & 0xff000000) >> 24;
sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
sense_buf[19] = failing_lba & 0x000000ff;
} else {
sense_buf[0] = 0x70;
sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc);
sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc);
sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) {
if (RES_IS_VSET(res->cfg_entry))
failing_lba =
le32_to_cpu(ioasa->u.
vset.failing_lba_lo);
sense_buf[0] |= 0x80;
sense_buf[3] = (failing_lba >> 24) & 0xff;
sense_buf[4] = (failing_lba >> 16) & 0xff;
sense_buf[5] = (failing_lba >> 8) & 0xff;
sense_buf[6] = failing_lba & 0xff;
}
sense_buf[7] = 6; /* additional length */
}
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,161 | static void pmcraid_free_sglist(struct pmcraid_sglist *sglist)
{
int i;
for (i = 0; i < sglist->num_sg; i++)
__free_pages(sg_page(&(sglist->scatterlist[i])),
sglist->order);
kfree(sglist);
}
| DoS Mem. Corr. | 0 | static void pmcraid_free_sglist(struct pmcraid_sglist *sglist)
{
int i;
for (i = 0; i < sglist->num_sg; i++)
__free_pages(sg_page(&(sglist->scatterlist[i])),
sglist->order);
kfree(sglist);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,162 | static void pmcraid_get_dump(struct pmcraid_instance *pinstance)
{
pmcraid_info("%s is not yet implemented\n", __func__);
}
| DoS Mem. Corr. | 0 | static void pmcraid_get_dump(struct pmcraid_instance *pinstance)
{
pmcraid_info("%s is not yet implemented\n", __func__);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,163 | static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc)
{
int i;
for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) {
if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc)
return &pmcraid_ioasc_error_table[i];
}
return NULL;
}
| DoS Mem. Corr. | 0 | static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc)
{
int i;
for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) {
if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc)
return &pmcraid_ioasc_error_table[i];
}
return NULL;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,164 | static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd)
{
struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
struct pmcraid_instance *pinstance = cmd->drv_inst;
u16 data_size = sizeof(struct pmcraid_inquiry_data);
pmcraid_reinit_cmdblk(cmd);
ioarcb->request_type = REQ_TYPE_SCSI;
ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
ioarcb->cdb[0] = INQUIRY;
ioarcb->cdb[1] = 1;
ioarcb->cdb[2] = 0xD0;
ioarcb->cdb[3] = (data_size >> 8) & 0xFF;
ioarcb->cdb[4] = data_size & 0xFF;
/* Since entire inquiry data it can be part of IOARCB itself
*/
ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
offsetof(struct pmcraid_ioarcb,
add_data.u.ioadl[0]));
ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
ioarcb->request_flags0 |= NO_LINK_DESCS;
ioarcb->data_transfer_length = cpu_to_le32(data_size);
ioadl = &(ioarcb->add_data.u.ioadl[0]);
ioadl->flags = IOADL_FLAGS_LAST_DESC;
ioadl->address = cpu_to_le64(pinstance->inq_data_baddr);
ioadl->data_len = cpu_to_le32(data_size);
pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done,
PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
}
| DoS Mem. Corr. | 0 | static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd)
{
struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
struct pmcraid_instance *pinstance = cmd->drv_inst;
u16 data_size = sizeof(struct pmcraid_inquiry_data);
pmcraid_reinit_cmdblk(cmd);
ioarcb->request_type = REQ_TYPE_SCSI;
ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
ioarcb->cdb[0] = INQUIRY;
ioarcb->cdb[1] = 1;
ioarcb->cdb[2] = 0xD0;
ioarcb->cdb[3] = (data_size >> 8) & 0xFF;
ioarcb->cdb[4] = data_size & 0xFF;
/* Since entire inquiry data it can be part of IOARCB itself
*/
ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
offsetof(struct pmcraid_ioarcb,
add_data.u.ioadl[0]));
ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
ioarcb->request_flags0 |= NO_LINK_DESCS;
ioarcb->data_transfer_length = cpu_to_le32(data_size);
ioadl = &(ioarcb->add_data.u.ioadl[0]);
ioadl->flags = IOADL_FLAGS_LAST_DESC;
ioadl->address = cpu_to_le64(pinstance->inq_data_baddr);
ioadl->data_len = cpu_to_le32(data_size);
pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done,
PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,165 | static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd)
{
struct pmcraid_instance *pinstance = cmd->drv_inst;
u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
unsigned long lock_flags;
/* configuration table entry size depends on firmware version. If fw
* version is not known, it is not possible to interpret IOA config
* table
*/
if (ioasc) {
pmcraid_err("IOA Inquiry failed with %x\n", ioasc);
spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
pmcraid_reset_alert(cmd);
spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
} else {
pmcraid_querycfg(cmd);
}
}
| DoS Mem. Corr. | 0 | static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd)
{
struct pmcraid_instance *pinstance = cmd->drv_inst;
u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
unsigned long lock_flags;
/* configuration table entry size depends on firmware version. If fw
* version is not known, it is not possible to interpret IOA config
* table
*/
if (ioasc) {
pmcraid_err("IOA Inquiry failed with %x\n", ioasc);
spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
pmcraid_reset_alert(cmd);
spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
} else {
pmcraid_querycfg(cmd);
}
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,166 | static unsigned short pmcraid_get_minor(void)
{
int minor;
minor = find_first_zero_bit(pmcraid_minor, sizeof(pmcraid_minor));
__set_bit(minor, pmcraid_minor);
return minor;
}
| DoS Mem. Corr. | 0 | static unsigned short pmcraid_get_minor(void)
{
int minor;
minor = find_first_zero_bit(pmcraid_minor, sizeof(pmcraid_minor));
__set_bit(minor, pmcraid_minor);
return minor;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,167 | static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd)
{
struct pmcraid_instance *pinstance = cmd->drv_inst;
struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
int index = cmd->hrrq_index;
__be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]);
u32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD);
void (*done_function)(struct pmcraid_cmd *);
pmcraid_reinit_cmdblk(cmd);
cmd->hrrq_index = index + 1;
if (cmd->hrrq_index < pinstance->num_hrrq) {
done_function = pmcraid_identify_hrrq;
} else {
cmd->hrrq_index = 0;
done_function = pmcraid_get_fwversion;
}
/* Initialize ioarcb */
ioarcb->request_type = REQ_TYPE_IOACMD;
ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
/* initialize the hrrq number where IOA will respond to this command */
ioarcb->hrrq_id = index;
ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ;
ioarcb->cdb[1] = index;
/* IOA expects 64-bit pci address to be written in B.E format
* (i.e cdb[2]=MSByte..cdb[9]=LSB.
*/
pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n",
hrrq_addr, ioarcb->ioarcb_bus_addr, index);
memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr));
memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size));
/* Subsequent commands require HRRQ identification to be successful.
* Note that this gets called even during reset from SCSI mid-layer
* or tasklet
*/
pmcraid_send_cmd(cmd, done_function,
PMCRAID_INTERNAL_TIMEOUT,
pmcraid_timeout_handler);
}
| DoS Mem. Corr. | 0 | static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd)
{
struct pmcraid_instance *pinstance = cmd->drv_inst;
struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
int index = cmd->hrrq_index;
__be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]);
u32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD);
void (*done_function)(struct pmcraid_cmd *);
pmcraid_reinit_cmdblk(cmd);
cmd->hrrq_index = index + 1;
if (cmd->hrrq_index < pinstance->num_hrrq) {
done_function = pmcraid_identify_hrrq;
} else {
cmd->hrrq_index = 0;
done_function = pmcraid_get_fwversion;
}
/* Initialize ioarcb */
ioarcb->request_type = REQ_TYPE_IOACMD;
ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
/* initialize the hrrq number where IOA will respond to this command */
ioarcb->hrrq_id = index;
ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ;
ioarcb->cdb[1] = index;
/* IOA expects 64-bit pci address to be written in B.E format
* (i.e cdb[2]=MSByte..cdb[9]=LSB.
*/
pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n",
hrrq_addr, ioarcb->ioarcb_bus_addr, index);
memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr));
memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size));
/* Subsequent commands require HRRQ identification to be successful.
* Note that this gets called even during reset from SCSI mid-layer
* or tasklet
*/
pmcraid_send_cmd(cmd, done_function,
PMCRAID_INTERNAL_TIMEOUT,
pmcraid_timeout_handler);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,168 | static int __init pmcraid_init(void)
{
dev_t dev;
int error;
pmcraid_info("%s Device Driver version: %s\n",
PMCRAID_DRIVER_NAME, PMCRAID_DRIVER_VERSION);
error = alloc_chrdev_region(&dev, 0,
PMCRAID_MAX_ADAPTERS,
PMCRAID_DEVFILE);
if (error) {
pmcraid_err("failed to get a major number for adapters\n");
goto out_init;
}
pmcraid_major = MAJOR(dev);
pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE);
if (IS_ERR(pmcraid_class)) {
error = PTR_ERR(pmcraid_class);
pmcraid_err("failed to register with with sysfs, error = %x\n",
error);
goto out_unreg_chrdev;
}
error = pmcraid_netlink_init();
if (error)
goto out_unreg_chrdev;
error = pci_register_driver(&pmcraid_driver);
if (error == 0)
goto out_init;
pmcraid_err("failed to register pmcraid driver, error = %x\n",
error);
class_destroy(pmcraid_class);
pmcraid_netlink_release();
out_unreg_chrdev:
unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS);
out_init:
return error;
}
| DoS Mem. Corr. | 0 | static int __init pmcraid_init(void)
{
dev_t dev;
int error;
pmcraid_info("%s Device Driver version: %s\n",
PMCRAID_DRIVER_NAME, PMCRAID_DRIVER_VERSION);
error = alloc_chrdev_region(&dev, 0,
PMCRAID_MAX_ADAPTERS,
PMCRAID_DEVFILE);
if (error) {
pmcraid_err("failed to get a major number for adapters\n");
goto out_init;
}
pmcraid_major = MAJOR(dev);
pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE);
if (IS_ERR(pmcraid_class)) {
error = PTR_ERR(pmcraid_class);
pmcraid_err("failed to register with with sysfs, error = %x\n",
error);
goto out_unreg_chrdev;
}
error = pmcraid_netlink_init();
if (error)
goto out_unreg_chrdev;
error = pci_register_driver(&pmcraid_driver);
if (error == 0)
goto out_init;
pmcraid_err("failed to register pmcraid driver, error = %x\n",
error);
class_destroy(pmcraid_class);
pmcraid_netlink_release();
out_unreg_chrdev:
unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS);
out_init:
return error;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,169 | static int __devinit pmcraid_init_buffers(struct pmcraid_instance *pinstance)
{
int i;
if (pmcraid_allocate_host_rrqs(pinstance)) {
pmcraid_err("couldn't allocate memory for %d host rrqs\n",
pinstance->num_hrrq);
return -ENOMEM;
}
if (pmcraid_allocate_config_buffers(pinstance)) {
pmcraid_err("couldn't allocate memory for config buffers\n");
pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
return -ENOMEM;
}
if (pmcraid_allocate_cmd_blocks(pinstance)) {
pmcraid_err("couldn't allocate memory for cmd blocks\n");
pmcraid_release_config_buffers(pinstance);
pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
return -ENOMEM;
}
if (pmcraid_allocate_control_blocks(pinstance)) {
pmcraid_err("couldn't allocate memory control blocks\n");
pmcraid_release_config_buffers(pinstance);
pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
return -ENOMEM;
}
/* allocate DMAable memory for page D0 INQUIRY buffer */
pinstance->inq_data = pci_alloc_consistent(
pinstance->pdev,
sizeof(struct pmcraid_inquiry_data),
&pinstance->inq_data_baddr);
if (pinstance->inq_data == NULL) {
pmcraid_err("couldn't allocate DMA memory for INQUIRY\n");
pmcraid_release_buffers(pinstance);
return -ENOMEM;
}
/* allocate DMAable memory for set timestamp data buffer */
pinstance->timestamp_data = pci_alloc_consistent(
pinstance->pdev,
sizeof(struct pmcraid_timestamp_data),
&pinstance->timestamp_data_baddr);
if (pinstance->timestamp_data == NULL) {
pmcraid_err("couldn't allocate DMA memory for \
set time_stamp \n");
pmcraid_release_buffers(pinstance);
return -ENOMEM;
}
/* Initialize all the command blocks and add them to free pool. No
* need to lock (free_pool_lock) as this is done in initialization
* itself
*/
for (i = 0; i < PMCRAID_MAX_CMD; i++) {
struct pmcraid_cmd *cmdp = pinstance->cmd_list[i];
pmcraid_init_cmdblk(cmdp, i);
cmdp->drv_inst = pinstance;
list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool);
}
return 0;
}
| DoS Mem. Corr. | 0 | static int __devinit pmcraid_init_buffers(struct pmcraid_instance *pinstance)
{
int i;
if (pmcraid_allocate_host_rrqs(pinstance)) {
pmcraid_err("couldn't allocate memory for %d host rrqs\n",
pinstance->num_hrrq);
return -ENOMEM;
}
if (pmcraid_allocate_config_buffers(pinstance)) {
pmcraid_err("couldn't allocate memory for config buffers\n");
pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
return -ENOMEM;
}
if (pmcraid_allocate_cmd_blocks(pinstance)) {
pmcraid_err("couldn't allocate memory for cmd blocks\n");
pmcraid_release_config_buffers(pinstance);
pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
return -ENOMEM;
}
if (pmcraid_allocate_control_blocks(pinstance)) {
pmcraid_err("couldn't allocate memory control blocks\n");
pmcraid_release_config_buffers(pinstance);
pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
return -ENOMEM;
}
/* allocate DMAable memory for page D0 INQUIRY buffer */
pinstance->inq_data = pci_alloc_consistent(
pinstance->pdev,
sizeof(struct pmcraid_inquiry_data),
&pinstance->inq_data_baddr);
if (pinstance->inq_data == NULL) {
pmcraid_err("couldn't allocate DMA memory for INQUIRY\n");
pmcraid_release_buffers(pinstance);
return -ENOMEM;
}
/* allocate DMAable memory for set timestamp data buffer */
pinstance->timestamp_data = pci_alloc_consistent(
pinstance->pdev,
sizeof(struct pmcraid_timestamp_data),
&pinstance->timestamp_data_baddr);
if (pinstance->timestamp_data == NULL) {
pmcraid_err("couldn't allocate DMA memory for \
set time_stamp \n");
pmcraid_release_buffers(pinstance);
return -ENOMEM;
}
/* Initialize all the command blocks and add them to free pool. No
* need to lock (free_pool_lock) as this is done in initialization
* itself
*/
for (i = 0; i < PMCRAID_MAX_CMD; i++) {
struct pmcraid_cmd *cmdp = pinstance->cmd_list[i];
pmcraid_init_cmdblk(cmdp, i);
cmdp->drv_inst = pinstance;
list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool);
}
return 0;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,170 | void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index)
{
struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
dma_addr_t dma_addr = cmd->ioa_cb_bus_addr;
if (index >= 0) {
/* first time initialization (called from probe) */
u32 ioasa_offset =
offsetof(struct pmcraid_control_block, ioasa);
cmd->index = index;
ioarcb->response_handle = cpu_to_le32(index << 2);
ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr);
ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset);
ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa));
} else {
/* re-initialization of various lengths, called once command is
* processed by IOA
*/
memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN);
ioarcb->hrrq_id = 0;
ioarcb->request_flags0 = 0;
ioarcb->request_flags1 = 0;
ioarcb->cmd_timeout = 0;
ioarcb->ioarcb_bus_addr &= (~0x1FULL);
ioarcb->ioadl_bus_addr = 0;
ioarcb->ioadl_length = 0;
ioarcb->data_transfer_length = 0;
ioarcb->add_cmd_param_length = 0;
ioarcb->add_cmd_param_offset = 0;
cmd->ioa_cb->ioasa.ioasc = 0;
cmd->ioa_cb->ioasa.residual_data_length = 0;
cmd->time_left = 0;
}
cmd->cmd_done = NULL;
cmd->scsi_cmd = NULL;
cmd->release = 0;
cmd->completion_req = 0;
cmd->sense_buffer = 0;
cmd->sense_buffer_dma = 0;
cmd->dma_handle = 0;
init_timer(&cmd->timer);
}
| DoS Mem. Corr. | 0 | void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index)
{
struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
dma_addr_t dma_addr = cmd->ioa_cb_bus_addr;
if (index >= 0) {
/* first time initialization (called from probe) */
u32 ioasa_offset =
offsetof(struct pmcraid_control_block, ioasa);
cmd->index = index;
ioarcb->response_handle = cpu_to_le32(index << 2);
ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr);
ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset);
ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa));
} else {
/* re-initialization of various lengths, called once command is
* processed by IOA
*/
memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN);
ioarcb->hrrq_id = 0;
ioarcb->request_flags0 = 0;
ioarcb->request_flags1 = 0;
ioarcb->cmd_timeout = 0;
ioarcb->ioarcb_bus_addr &= (~0x1FULL);
ioarcb->ioadl_bus_addr = 0;
ioarcb->ioadl_length = 0;
ioarcb->data_transfer_length = 0;
ioarcb->add_cmd_param_length = 0;
ioarcb->add_cmd_param_offset = 0;
cmd->ioa_cb->ioasa.ioasc = 0;
cmd->ioa_cb->ioasa.residual_data_length = 0;
cmd->time_left = 0;
}
cmd->cmd_done = NULL;
cmd->scsi_cmd = NULL;
cmd->release = 0;
cmd->completion_req = 0;
cmd->sense_buffer = 0;
cmd->sense_buffer_dma = 0;
cmd->dma_handle = 0;
init_timer(&cmd->timer);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,171 | static struct pmcraid_cmd *pmcraid_init_hcam
(
struct pmcraid_instance *pinstance,
u8 type
)
{
struct pmcraid_cmd *cmd;
struct pmcraid_ioarcb *ioarcb;
struct pmcraid_ioadl_desc *ioadl;
struct pmcraid_hostrcb *hcam;
void (*cmd_done) (struct pmcraid_cmd *);
dma_addr_t dma;
int rcb_size;
cmd = pmcraid_get_free_cmd(pinstance);
if (!cmd) {
pmcraid_err("no free command blocks for hcam\n");
return cmd;
}
if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) {
rcb_size = sizeof(struct pmcraid_hcam_ccn_ext);
cmd_done = pmcraid_process_ccn;
dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE;
hcam = &pinstance->ccn;
} else {
rcb_size = sizeof(struct pmcraid_hcam_ldn);
cmd_done = pmcraid_process_ldn;
dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE;
hcam = &pinstance->ldn;
}
/* initialize command pointer used for HCAM registration */
hcam->cmd = cmd;
ioarcb = &cmd->ioa_cb->ioarcb;
ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
offsetof(struct pmcraid_ioarcb,
add_data.u.ioadl[0]));
ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
ioadl = ioarcb->add_data.u.ioadl;
/* Initialize ioarcb */
ioarcb->request_type = REQ_TYPE_HCAM;
ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC;
ioarcb->cdb[1] = type;
ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF;
ioarcb->cdb[8] = (rcb_size) & 0xFF;
ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
ioadl[0].data_len = cpu_to_le32(rcb_size);
ioadl[0].address = cpu_to_le32(dma);
cmd->cmd_done = cmd_done;
return cmd;
}
| DoS Mem. Corr. | 0 | static struct pmcraid_cmd *pmcraid_init_hcam
(
struct pmcraid_instance *pinstance,
u8 type
)
{
struct pmcraid_cmd *cmd;
struct pmcraid_ioarcb *ioarcb;
struct pmcraid_ioadl_desc *ioadl;
struct pmcraid_hostrcb *hcam;
void (*cmd_done) (struct pmcraid_cmd *);
dma_addr_t dma;
int rcb_size;
cmd = pmcraid_get_free_cmd(pinstance);
if (!cmd) {
pmcraid_err("no free command blocks for hcam\n");
return cmd;
}
if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) {
rcb_size = sizeof(struct pmcraid_hcam_ccn_ext);
cmd_done = pmcraid_process_ccn;
dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE;
hcam = &pinstance->ccn;
} else {
rcb_size = sizeof(struct pmcraid_hcam_ldn);
cmd_done = pmcraid_process_ldn;
dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE;
hcam = &pinstance->ldn;
}
/* initialize command pointer used for HCAM registration */
hcam->cmd = cmd;
ioarcb = &cmd->ioa_cb->ioarcb;
ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
offsetof(struct pmcraid_ioarcb,
add_data.u.ioadl[0]));
ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
ioadl = ioarcb->add_data.u.ioadl;
/* Initialize ioarcb */
ioarcb->request_type = REQ_TYPE_HCAM;
ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC;
ioarcb->cdb[1] = type;
ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF;
ioarcb->cdb[8] = (rcb_size) & 0xFF;
ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
ioadl[0].data_len = cpu_to_le32(rcb_size);
ioadl[0].address = cpu_to_le32(dma);
cmd->cmd_done = cmd_done;
return cmd;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,172 | static int __devinit pmcraid_init_instance(
struct pci_dev *pdev,
struct Scsi_Host *host,
void __iomem *mapped_pci_addr
)
{
struct pmcraid_instance *pinstance =
(struct pmcraid_instance *)host->hostdata;
pinstance->host = host;
pinstance->pdev = pdev;
/* Initialize register addresses */
pinstance->mapped_dma_addr = mapped_pci_addr;
/* Initialize chip-specific details */
{
struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg;
struct pmcraid_interrupts *pint_regs = &pinstance->int_regs;
pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin;
pint_regs->ioa_host_interrupt_reg =
mapped_pci_addr + chip_cfg->ioa_host_intr;
pint_regs->ioa_host_interrupt_clr_reg =
mapped_pci_addr + chip_cfg->ioa_host_intr_clr;
pint_regs->ioa_host_msix_interrupt_reg =
mapped_pci_addr + chip_cfg->ioa_host_msix_intr;
pint_regs->host_ioa_interrupt_reg =
mapped_pci_addr + chip_cfg->host_ioa_intr;
pint_regs->host_ioa_interrupt_clr_reg =
mapped_pci_addr + chip_cfg->host_ioa_intr_clr;
/* Current version of firmware exposes interrupt mask set
* and mask clr registers through memory mapped bar0.
*/
pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox;
pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus;
pint_regs->ioa_host_interrupt_mask_reg =
mapped_pci_addr + chip_cfg->ioa_host_mask;
pint_regs->ioa_host_interrupt_mask_clr_reg =
mapped_pci_addr + chip_cfg->ioa_host_mask_clr;
pint_regs->global_interrupt_mask_reg =
mapped_pci_addr + chip_cfg->global_intr_mask;
};
pinstance->ioa_reset_attempts = 0;
init_waitqueue_head(&pinstance->reset_wait_q);
atomic_set(&pinstance->outstanding_cmds, 0);
atomic_set(&pinstance->last_message_id, 0);
atomic_set(&pinstance->expose_resources, 0);
INIT_LIST_HEAD(&pinstance->free_res_q);
INIT_LIST_HEAD(&pinstance->used_res_q);
INIT_LIST_HEAD(&pinstance->free_cmd_pool);
INIT_LIST_HEAD(&pinstance->pending_cmd_pool);
spin_lock_init(&pinstance->free_pool_lock);
spin_lock_init(&pinstance->pending_pool_lock);
spin_lock_init(&pinstance->resource_lock);
mutex_init(&pinstance->aen_queue_lock);
/* Work-queue (Shared) for deferred processing error handling */
INIT_WORK(&pinstance->worker_q, pmcraid_worker_function);
/* Initialize the default log_level */
pinstance->current_log_level = pmcraid_log_level;
/* Setup variables required for reset engine */
pinstance->ioa_state = IOA_STATE_UNKNOWN;
pinstance->reset_cmd = NULL;
return 0;
}
| DoS Mem. Corr. | 0 | static int __devinit pmcraid_init_instance(
struct pci_dev *pdev,
struct Scsi_Host *host,
void __iomem *mapped_pci_addr
)
{
struct pmcraid_instance *pinstance =
(struct pmcraid_instance *)host->hostdata;
pinstance->host = host;
pinstance->pdev = pdev;
/* Initialize register addresses */
pinstance->mapped_dma_addr = mapped_pci_addr;
/* Initialize chip-specific details */
{
struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg;
struct pmcraid_interrupts *pint_regs = &pinstance->int_regs;
pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin;
pint_regs->ioa_host_interrupt_reg =
mapped_pci_addr + chip_cfg->ioa_host_intr;
pint_regs->ioa_host_interrupt_clr_reg =
mapped_pci_addr + chip_cfg->ioa_host_intr_clr;
pint_regs->ioa_host_msix_interrupt_reg =
mapped_pci_addr + chip_cfg->ioa_host_msix_intr;
pint_regs->host_ioa_interrupt_reg =
mapped_pci_addr + chip_cfg->host_ioa_intr;
pint_regs->host_ioa_interrupt_clr_reg =
mapped_pci_addr + chip_cfg->host_ioa_intr_clr;
/* Current version of firmware exposes interrupt mask set
* and mask clr registers through memory mapped bar0.
*/
pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox;
pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus;
pint_regs->ioa_host_interrupt_mask_reg =
mapped_pci_addr + chip_cfg->ioa_host_mask;
pint_regs->ioa_host_interrupt_mask_clr_reg =
mapped_pci_addr + chip_cfg->ioa_host_mask_clr;
pint_regs->global_interrupt_mask_reg =
mapped_pci_addr + chip_cfg->global_intr_mask;
};
pinstance->ioa_reset_attempts = 0;
init_waitqueue_head(&pinstance->reset_wait_q);
atomic_set(&pinstance->outstanding_cmds, 0);
atomic_set(&pinstance->last_message_id, 0);
atomic_set(&pinstance->expose_resources, 0);
INIT_LIST_HEAD(&pinstance->free_res_q);
INIT_LIST_HEAD(&pinstance->used_res_q);
INIT_LIST_HEAD(&pinstance->free_cmd_pool);
INIT_LIST_HEAD(&pinstance->pending_cmd_pool);
spin_lock_init(&pinstance->free_pool_lock);
spin_lock_init(&pinstance->pending_pool_lock);
spin_lock_init(&pinstance->resource_lock);
mutex_init(&pinstance->aen_queue_lock);
/* Work-queue (Shared) for deferred processing error handling */
INIT_WORK(&pinstance->worker_q, pmcraid_worker_function);
/* Initialize the default log_level */
pinstance->current_log_level = pmcraid_log_level;
/* Setup variables required for reset engine */
pinstance->ioa_state = IOA_STATE_UNKNOWN;
pinstance->reset_cmd = NULL;
return 0;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,173 | pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount)
{
struct pmcraid_ioadl_desc *ioadl;
struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
int ioadl_count = 0;
if (ioarcb->add_cmd_param_length)
ioadl_count = DIV_ROUND_UP(ioarcb->add_cmd_param_length, 16);
ioarcb->ioadl_length =
sizeof(struct pmcraid_ioadl_desc) * sgcount;
if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) {
/* external ioadls start at offset 0x80 from control_block
* structure, re-using 24 out of 27 ioadls part of IOARCB.
* It is necessary to indicate to firmware that driver is
* using ioadls to be treated as external to IOARCB.
*/
ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
ioarcb->ioadl_bus_addr =
cpu_to_le64((cmd->ioa_cb_bus_addr) +
offsetof(struct pmcraid_ioarcb,
add_data.u.ioadl[3]));
ioadl = &ioarcb->add_data.u.ioadl[3];
} else {
ioarcb->ioadl_bus_addr =
cpu_to_le64((cmd->ioa_cb_bus_addr) +
offsetof(struct pmcraid_ioarcb,
add_data.u.ioadl[ioadl_count]));
ioadl = &ioarcb->add_data.u.ioadl[ioadl_count];
ioarcb->ioarcb_bus_addr |=
DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8);
}
return ioadl;
}
| DoS Mem. Corr. | 0 | pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount)
{
struct pmcraid_ioadl_desc *ioadl;
struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
int ioadl_count = 0;
if (ioarcb->add_cmd_param_length)
ioadl_count = DIV_ROUND_UP(ioarcb->add_cmd_param_length, 16);
ioarcb->ioadl_length =
sizeof(struct pmcraid_ioadl_desc) * sgcount;
if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) {
/* external ioadls start at offset 0x80 from control_block
* structure, re-using 24 out of 27 ioadls part of IOARCB.
* It is necessary to indicate to firmware that driver is
* using ioadls to be treated as external to IOARCB.
*/
ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
ioarcb->ioadl_bus_addr =
cpu_to_le64((cmd->ioa_cb_bus_addr) +
offsetof(struct pmcraid_ioarcb,
add_data.u.ioadl[3]));
ioadl = &ioarcb->add_data.u.ioadl[3];
} else {
ioarcb->ioadl_bus_addr =
cpu_to_le64((cmd->ioa_cb_bus_addr) +
offsetof(struct pmcraid_ioarcb,
add_data.u.ioadl[ioadl_count]));
ioadl = &ioarcb->add_data.u.ioadl[ioadl_count];
ioarcb->ioarcb_bus_addr |=
DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8);
}
return ioadl;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,174 | static void pmcraid_init_res_table(struct pmcraid_cmd *cmd)
{
struct pmcraid_instance *pinstance = cmd->drv_inst;
struct pmcraid_resource_entry *res, *temp;
struct pmcraid_config_table_entry *cfgte;
unsigned long lock_flags;
int found, rc, i;
u16 fw_version;
LIST_HEAD(old_res);
if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED)
pmcraid_err("IOA requires microcode download\n");
fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
/* resource list is protected by pinstance->resource_lock.
* init_res_table can be called from probe (user-thread) or runtime
* reset (timer/tasklet)
*/
spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue)
list_move_tail(&res->queue, &old_res);
for (i = 0; i < pinstance->cfg_table->num_entries; i++) {
if (be16_to_cpu(pinstance->inq_data->fw_version) <=
PMCRAID_FW_VERSION_1)
cfgte = &pinstance->cfg_table->entries[i];
else
cfgte = (struct pmcraid_config_table_entry *)
&pinstance->cfg_table->entries_ext[i];
if (!pmcraid_expose_resource(fw_version, cfgte))
continue;
found = 0;
/* If this entry was already detected and initialized */
list_for_each_entry_safe(res, temp, &old_res, queue) {
rc = memcmp(&res->cfg_entry.resource_address,
&cfgte->resource_address,
sizeof(cfgte->resource_address));
if (!rc) {
list_move_tail(&res->queue,
&pinstance->used_res_q);
found = 1;
break;
}
}
/* If this is new entry, initialize it and add it the queue */
if (!found) {
if (list_empty(&pinstance->free_res_q)) {
pmcraid_err("Too many devices attached\n");
break;
}
found = 1;
res = list_entry(pinstance->free_res_q.next,
struct pmcraid_resource_entry, queue);
res->scsi_dev = NULL;
res->change_detected = RES_CHANGE_ADD;
res->reset_progress = 0;
list_move_tail(&res->queue, &pinstance->used_res_q);
}
/* copy new configuration table entry details into driver
* maintained resource entry
*/
if (found) {
memcpy(&res->cfg_entry, cfgte,
pinstance->config_table_entry_size);
pmcraid_info("New res type:%x, vset:%x, addr:%x:\n",
res->cfg_entry.resource_type,
(fw_version <= PMCRAID_FW_VERSION_1 ?
res->cfg_entry.unique_flags1 :
res->cfg_entry.array_id & 0xFF),
le32_to_cpu(res->cfg_entry.resource_address));
}
}
/* Detect any deleted entries, mark them for deletion from mid-layer */
list_for_each_entry_safe(res, temp, &old_res, queue) {
if (res->scsi_dev) {
res->change_detected = RES_CHANGE_DEL;
res->cfg_entry.resource_handle =
PMCRAID_INVALID_RES_HANDLE;
list_move_tail(&res->queue, &pinstance->used_res_q);
} else {
list_move_tail(&res->queue, &pinstance->free_res_q);
}
}
/* release the resource list lock */
spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
pmcraid_set_timestamp(cmd);
}
| DoS Mem. Corr. | 0 | static void pmcraid_init_res_table(struct pmcraid_cmd *cmd)
{
struct pmcraid_instance *pinstance = cmd->drv_inst;
struct pmcraid_resource_entry *res, *temp;
struct pmcraid_config_table_entry *cfgte;
unsigned long lock_flags;
int found, rc, i;
u16 fw_version;
LIST_HEAD(old_res);
if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED)
pmcraid_err("IOA requires microcode download\n");
fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
/* resource list is protected by pinstance->resource_lock.
* init_res_table can be called from probe (user-thread) or runtime
* reset (timer/tasklet)
*/
spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue)
list_move_tail(&res->queue, &old_res);
for (i = 0; i < pinstance->cfg_table->num_entries; i++) {
if (be16_to_cpu(pinstance->inq_data->fw_version) <=
PMCRAID_FW_VERSION_1)
cfgte = &pinstance->cfg_table->entries[i];
else
cfgte = (struct pmcraid_config_table_entry *)
&pinstance->cfg_table->entries_ext[i];
if (!pmcraid_expose_resource(fw_version, cfgte))
continue;
found = 0;
/* If this entry was already detected and initialized */
list_for_each_entry_safe(res, temp, &old_res, queue) {
rc = memcmp(&res->cfg_entry.resource_address,
&cfgte->resource_address,
sizeof(cfgte->resource_address));
if (!rc) {
list_move_tail(&res->queue,
&pinstance->used_res_q);
found = 1;
break;
}
}
/* If this is new entry, initialize it and add it the queue */
if (!found) {
if (list_empty(&pinstance->free_res_q)) {
pmcraid_err("Too many devices attached\n");
break;
}
found = 1;
res = list_entry(pinstance->free_res_q.next,
struct pmcraid_resource_entry, queue);
res->scsi_dev = NULL;
res->change_detected = RES_CHANGE_ADD;
res->reset_progress = 0;
list_move_tail(&res->queue, &pinstance->used_res_q);
}
/* copy new configuration table entry details into driver
* maintained resource entry
*/
if (found) {
memcpy(&res->cfg_entry, cfgte,
pinstance->config_table_entry_size);
pmcraid_info("New res type:%x, vset:%x, addr:%x:\n",
res->cfg_entry.resource_type,
(fw_version <= PMCRAID_FW_VERSION_1 ?
res->cfg_entry.unique_flags1 :
res->cfg_entry.array_id & 0xFF),
le32_to_cpu(res->cfg_entry.resource_address));
}
}
/* Detect any deleted entries, mark them for deletion from mid-layer */
list_for_each_entry_safe(res, temp, &old_res, queue) {
if (res->scsi_dev) {
res->change_detected = RES_CHANGE_DEL;
res->cfg_entry.resource_handle =
PMCRAID_INVALID_RES_HANDLE;
list_move_tail(&res->queue, &pinstance->used_res_q);
} else {
list_move_tail(&res->queue, &pinstance->free_res_q);
}
}
/* release the resource list lock */
spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
pmcraid_set_timestamp(cmd);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,175 | static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance)
{
int i;
for (i = 0; i < pinstance->num_hrrq; i++)
tasklet_init(&pinstance->isr_tasklet[i],
pmcraid_tasklet_function,
(unsigned long)&pinstance->hrrq_vector[i]);
}
| DoS Mem. Corr. | 0 | static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance)
{
int i;
for (i = 0; i < pinstance->num_hrrq; i++)
tasklet_init(&pinstance->isr_tasklet[i],
pmcraid_tasklet_function,
(unsigned long)&pinstance->hrrq_vector[i]);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,176 | static void pmcraid_internal_done(struct pmcraid_cmd *cmd)
{
pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
cmd->ioa_cb->ioarcb.cdb[0],
le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
/* Some of the internal commands are sent with callers blocking for the
* response. Same will be indicated as part of cmd->completion_req
* field. Response path needs to wake up any waiters waiting for cmd
* completion if this flag is set.
*/
if (cmd->completion_req) {
cmd->completion_req = 0;
complete(&cmd->wait_for_completion);
}
/* most of the internal commands are completed by caller itself, so
* no need to return the command block back to free pool until we are
* required to do so (e.g once done with initialization).
*/
if (cmd->release) {
cmd->release = 0;
pmcraid_return_cmd(cmd);
}
}
| DoS Mem. Corr. | 0 | static void pmcraid_internal_done(struct pmcraid_cmd *cmd)
{
pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
cmd->ioa_cb->ioarcb.cdb[0],
le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
/* Some of the internal commands are sent with callers blocking for the
* response. Same will be indicated as part of cmd->completion_req
* field. Response path needs to wake up any waiters waiting for cmd
* completion if this flag is set.
*/
if (cmd->completion_req) {
cmd->completion_req = 0;
complete(&cmd->wait_for_completion);
}
/* most of the internal commands are completed by caller itself, so
* no need to return the command block back to free pool until we are
* required to do so (e.g once done with initialization).
*/
if (cmd->release) {
cmd->release = 0;
pmcraid_return_cmd(cmd);
}
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,177 | static void pmcraid_io_done(struct pmcraid_cmd *cmd)
{
u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length);
if (_pmcraid_io_done(cmd, reslen, ioasc) == 0)
pmcraid_return_cmd(cmd);
}
| DoS Mem. Corr. | 0 | static void pmcraid_io_done(struct pmcraid_cmd *cmd)
{
u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length);
if (_pmcraid_io_done(cmd, reslen, ioasc) == 0)
pmcraid_return_cmd(cmd);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,178 | static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd)
{
pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n",
cmd->ioa_cb->ioarcb.cdb[0],
le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
/* Note that commands sent during reset require next command to be sent
* to IOA. Hence reinit the done function as well as timeout function
*/
pmcraid_reinit_cmdblk(cmd);
cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD;
cmd->ioa_cb->ioarcb.resource_handle =
cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN;
cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL;
/* fire shutdown command to hardware. */
pmcraid_info("firing normal shutdown command (%d) to IOA\n",
le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle));
pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START);
pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done,
PMCRAID_SHUTDOWN_TIMEOUT,
pmcraid_timeout_handler);
}
| DoS Mem. Corr. | 0 | static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd)
{
pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n",
cmd->ioa_cb->ioarcb.cdb[0],
le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
/* Note that commands sent during reset require next command to be sent
* to IOA. Hence reinit the done function as well as timeout function
*/
pmcraid_reinit_cmdblk(cmd);
cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD;
cmd->ioa_cb->ioarcb.resource_handle =
cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN;
cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL;
/* fire shutdown command to hardware. */
pmcraid_info("firing normal shutdown command (%d) to IOA\n",
le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle));
pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START);
pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done,
PMCRAID_SHUTDOWN_TIMEOUT,
pmcraid_timeout_handler);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,179 | void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd)
{
struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc);
if (error_info == NULL ||
cmd->drv_inst->current_log_level < error_info->log_level)
return;
/* log the error string */
pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n",
cmd->ioa_cb->ioarcb.cdb[0],
cmd->ioa_cb->ioarcb.resource_handle,
le32_to_cpu(ioasc), error_info->error_string);
}
| DoS Mem. Corr. | 0 | void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd)
{
struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc);
if (error_info == NULL ||
cmd->drv_inst->current_log_level < error_info->log_level)
return;
/* log the error string */
pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n",
cmd->ioa_cb->ioarcb.cdb[0],
cmd->ioa_cb->ioarcb.resource_handle,
le32_to_cpu(ioasc), error_info->error_string);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,180 | static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id)
{
struct pmcraid_isr_param *hrrq_vector;
struct pmcraid_instance *pinstance;
unsigned long lock_flags;
u32 intrs_val;
int hrrq_id;
hrrq_vector = (struct pmcraid_isr_param *)dev_id;
hrrq_id = hrrq_vector->hrrq_id;
pinstance = hrrq_vector->drv_inst;
if (!hrrq_id) {
/* Read the interrupt */
intrs_val = pmcraid_read_interrupts(pinstance);
if (intrs_val &&
((ioread32(pinstance->int_regs.host_ioa_interrupt_reg)
& DOORBELL_INTR_MSIX_CLR) == 0)) {
/* Any error interrupts including unit_check,
* initiate IOA reset.In case of unit check indicate
* to reset_sequence that IOA unit checked and prepare
* for a dump during reset sequence
*/
if (intrs_val & PMCRAID_ERROR_INTERRUPTS) {
if (intrs_val & INTRS_IOA_UNIT_CHECK)
pinstance->ioa_unit_check = 1;
pmcraid_err("ISR: error interrupts: %x \
initiating reset\n", intrs_val);
spin_lock_irqsave(pinstance->host->host_lock,
lock_flags);
pmcraid_initiate_reset(pinstance);
spin_unlock_irqrestore(
pinstance->host->host_lock,
lock_flags);
}
/* If interrupt was as part of the ioa initialization,
* clear it. Delete the timer and wakeup the
* reset engine to proceed with reset sequence
*/
if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL)
pmcraid_clr_trans_op(pinstance);
/* Clear the interrupt register by writing
* to host to ioa doorbell. Once done
* FW will clear the interrupt.
*/
iowrite32(DOORBELL_INTR_MSIX_CLR,
pinstance->int_regs.host_ioa_interrupt_reg);
ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
}
}
tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id]));
return IRQ_HANDLED;
}
| DoS Mem. Corr. | 0 | static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id)
{
struct pmcraid_isr_param *hrrq_vector;
struct pmcraid_instance *pinstance;
unsigned long lock_flags;
u32 intrs_val;
int hrrq_id;
hrrq_vector = (struct pmcraid_isr_param *)dev_id;
hrrq_id = hrrq_vector->hrrq_id;
pinstance = hrrq_vector->drv_inst;
if (!hrrq_id) {
/* Read the interrupt */
intrs_val = pmcraid_read_interrupts(pinstance);
if (intrs_val &&
((ioread32(pinstance->int_regs.host_ioa_interrupt_reg)
& DOORBELL_INTR_MSIX_CLR) == 0)) {
/* Any error interrupts including unit_check,
* initiate IOA reset.In case of unit check indicate
* to reset_sequence that IOA unit checked and prepare
* for a dump during reset sequence
*/
if (intrs_val & PMCRAID_ERROR_INTERRUPTS) {
if (intrs_val & INTRS_IOA_UNIT_CHECK)
pinstance->ioa_unit_check = 1;
pmcraid_err("ISR: error interrupts: %x \
initiating reset\n", intrs_val);
spin_lock_irqsave(pinstance->host->host_lock,
lock_flags);
pmcraid_initiate_reset(pinstance);
spin_unlock_irqrestore(
pinstance->host->host_lock,
lock_flags);
}
/* If interrupt was as part of the ioa initialization,
* clear it. Delete the timer and wakeup the
* reset engine to proceed with reset sequence
*/
if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL)
pmcraid_clr_trans_op(pinstance);
/* Clear the interrupt register by writing
* to host to ioa doorbell. Once done
* FW will clear the interrupt.
*/
iowrite32(DOORBELL_INTR_MSIX_CLR,
pinstance->int_regs.host_ioa_interrupt_reg);
ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
}
}
tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id]));
return IRQ_HANDLED;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,181 | static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance)
{
int i;
for (i = 0; i < pinstance->num_hrrq; i++)
tasklet_kill(&pinstance->isr_tasklet[i]);
}
| DoS Mem. Corr. | 0 | static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance)
{
int i;
for (i = 0; i < pinstance->num_hrrq; i++)
tasklet_kill(&pinstance->isr_tasklet[i]);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,182 | static int pmcraid_netlink_init(void)
{
int result;
result = genl_register_family(&pmcraid_event_family);
if (result)
return result;
pmcraid_info("registered NETLINK GENERIC group: %d\n",
pmcraid_event_family.id);
return result;
}
| DoS Mem. Corr. | 0 | static int pmcraid_netlink_init(void)
{
int result;
result = genl_register_family(&pmcraid_event_family);
if (result)
return result;
pmcraid_info("registered NETLINK GENERIC group: %d\n",
pmcraid_event_family.id);
return result;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,183 | static void pmcraid_netlink_release(void)
{
genl_unregister_family(&pmcraid_event_family);
}
| DoS Mem. Corr. | 0 | static void pmcraid_netlink_release(void)
{
genl_unregister_family(&pmcraid_event_family);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,184 | static int pmcraid_notify_aen(
struct pmcraid_instance *pinstance,
struct pmcraid_aen_msg *aen_msg,
u32 data_size
)
{
struct sk_buff *skb;
void *msg_header;
u32 total_size, nla_genl_hdr_total_size;
int result;
aen_msg->hostno = (pinstance->host->unique_id << 16 |
MINOR(pinstance->cdev.dev));
aen_msg->length = data_size;
data_size += sizeof(*aen_msg);
total_size = nla_total_size(data_size);
/* Add GENL_HDR to total_size */
nla_genl_hdr_total_size =
(total_size + (GENL_HDRLEN +
((struct genl_family *)&pmcraid_event_family)->hdrsize)
+ NLMSG_HDRLEN);
skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC);
if (!skb) {
pmcraid_err("Failed to allocate aen data SKB of size: %x\n",
total_size);
return -ENOMEM;
}
/* add the genetlink message header */
msg_header = genlmsg_put(skb, 0, 0,
&pmcraid_event_family, 0,
PMCRAID_AEN_CMD_EVENT);
if (!msg_header) {
pmcraid_err("failed to copy command details\n");
nlmsg_free(skb);
return -ENOMEM;
}
result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg);
if (result) {
pmcraid_err("failed to copy AEN attribute data\n");
nlmsg_free(skb);
return -EINVAL;
}
/* send genetlink multicast message to notify appplications */
result = genlmsg_end(skb, msg_header);
if (result < 0) {
pmcraid_err("genlmsg_end failed\n");
nlmsg_free(skb);
return result;
}
result =
genlmsg_multicast(skb, 0, pmcraid_event_family.id, GFP_ATOMIC);
/* If there are no listeners, genlmsg_multicast may return non-zero
* value.
*/
if (result)
pmcraid_info("error (%x) sending aen event message\n", result);
return result;
}
| DoS Mem. Corr. | 0 | static int pmcraid_notify_aen(
struct pmcraid_instance *pinstance,
struct pmcraid_aen_msg *aen_msg,
u32 data_size
)
{
struct sk_buff *skb;
void *msg_header;
u32 total_size, nla_genl_hdr_total_size;
int result;
aen_msg->hostno = (pinstance->host->unique_id << 16 |
MINOR(pinstance->cdev.dev));
aen_msg->length = data_size;
data_size += sizeof(*aen_msg);
total_size = nla_total_size(data_size);
/* Add GENL_HDR to total_size */
nla_genl_hdr_total_size =
(total_size + (GENL_HDRLEN +
((struct genl_family *)&pmcraid_event_family)->hdrsize)
+ NLMSG_HDRLEN);
skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC);
if (!skb) {
pmcraid_err("Failed to allocate aen data SKB of size: %x\n",
total_size);
return -ENOMEM;
}
/* add the genetlink message header */
msg_header = genlmsg_put(skb, 0, 0,
&pmcraid_event_family, 0,
PMCRAID_AEN_CMD_EVENT);
if (!msg_header) {
pmcraid_err("failed to copy command details\n");
nlmsg_free(skb);
return -ENOMEM;
}
result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg);
if (result) {
pmcraid_err("failed to copy AEN attribute data\n");
nlmsg_free(skb);
return -EINVAL;
}
/* send genetlink multicast message to notify appplications */
result = genlmsg_end(skb, msg_header);
if (result < 0) {
pmcraid_err("genlmsg_end failed\n");
nlmsg_free(skb);
return result;
}
result =
genlmsg_multicast(skb, 0, pmcraid_event_family.id, GFP_ATOMIC);
/* If there are no listeners, genlmsg_multicast may return non-zero
* value.
*/
if (result)
pmcraid_info("error (%x) sending aen event message\n", result);
return result;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,185 | static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance)
{
return pmcraid_notify_aen(pinstance,
pinstance->ccn.msg,
pinstance->ccn.hcam->data_len +
sizeof(struct pmcraid_hcam_hdr));
}
| DoS Mem. Corr. | 0 | static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance)
{
return pmcraid_notify_aen(pinstance,
pinstance->ccn.msg,
pinstance->ccn.hcam->data_len +
sizeof(struct pmcraid_hcam_hdr));
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,186 | static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt)
{
pinstance->scn.ioa_state = evt;
pmcraid_notify_aen(pinstance,
&pinstance->scn.msg,
sizeof(u32));
}
| DoS Mem. Corr. | 0 | static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt)
{
pinstance->scn.ioa_state = evt;
pmcraid_notify_aen(pinstance,
&pinstance->scn.msg,
sizeof(u32));
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,187 | static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance)
{
return pmcraid_notify_aen(pinstance,
pinstance->ldn.msg,
pinstance->ldn.hcam->data_len +
sizeof(struct pmcraid_hcam_hdr));
}
| DoS Mem. Corr. | 0 | static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance)
{
return pmcraid_notify_aen(pinstance,
pinstance->ldn.msg,
pinstance->ldn.hcam->data_len +
sizeof(struct pmcraid_hcam_hdr));
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,188 | static void pmcraid_prepare_cancel_cmd(
struct pmcraid_cmd *cmd,
struct pmcraid_cmd *cmd_to_cancel
)
{
struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
__be64 ioarcb_addr = cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr;
/* Get the resource handle to where the command to be aborted has been
* sent.
*/
ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle;
ioarcb->request_type = REQ_TYPE_IOACMD;
memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
ioarcb->cdb[0] = PMCRAID_ABORT_CMD;
/* IOARCB address of the command to be cancelled is given in
* cdb[2]..cdb[9] is Big-Endian format. Note that length bits in
* IOARCB address are not masked.
*/
ioarcb_addr = cpu_to_be64(ioarcb_addr);
memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr));
}
| DoS Mem. Corr. | 0 | static void pmcraid_prepare_cancel_cmd(
struct pmcraid_cmd *cmd,
struct pmcraid_cmd *cmd_to_cancel
)
{
struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
__be64 ioarcb_addr = cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr;
/* Get the resource handle to where the command to be aborted has been
* sent.
*/
ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle;
ioarcb->request_type = REQ_TYPE_IOACMD;
memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
ioarcb->cdb[0] = PMCRAID_ABORT_CMD;
/* IOARCB address of the command to be cancelled is given in
* cdb[2]..cdb[9] is Big-Endian format. Note that length bits in
* IOARCB address are not masked.
*/
ioarcb_addr = cpu_to_be64(ioarcb_addr);
memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr));
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,189 | static int __devinit pmcraid_probe(
struct pci_dev *pdev,
const struct pci_device_id *dev_id
)
{
struct pmcraid_instance *pinstance;
struct Scsi_Host *host;
void __iomem *mapped_pci_addr;
int rc = PCIBIOS_SUCCESSFUL;
if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
pmcraid_err
("maximum number(%d) of supported adapters reached\n",
atomic_read(&pmcraid_adapter_count));
return -ENOMEM;
}
atomic_inc(&pmcraid_adapter_count);
rc = pci_enable_device(pdev);
if (rc) {
dev_err(&pdev->dev, "Cannot enable adapter\n");
atomic_dec(&pmcraid_adapter_count);
return rc;
}
dev_info(&pdev->dev,
"Found new IOA(%x:%x), Total IOA count: %d\n",
pdev->vendor, pdev->device,
atomic_read(&pmcraid_adapter_count));
rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME);
if (rc < 0) {
dev_err(&pdev->dev,
"Couldn't register memory range of registers\n");
goto out_disable_device;
}
mapped_pci_addr = pci_iomap(pdev, 0, 0);
if (!mapped_pci_addr) {
dev_err(&pdev->dev, "Couldn't map PCI registers memory\n");
rc = -ENOMEM;
goto out_release_regions;
}
pci_set_master(pdev);
/* Firmware requires the system bus address of IOARCB to be within
* 32-bit addressable range though it has 64-bit IOARRIN register.
* However, firmware supports 64-bit streaming DMA buffers, whereas
* coherent buffers are to be 32-bit. Since pci_alloc_consistent always
* returns memory within 4GB (if not, change this logic), coherent
* buffers are within firmware acceptable address ranges.
*/
if ((sizeof(dma_addr_t) == 4) ||
pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
/* firmware expects 32-bit DMA addresses for IOARRIN register; set 32
* bit mask for pci_alloc_consistent to return addresses within 4GB
*/
if (rc == 0)
rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
if (rc != 0) {
dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
goto cleanup_nomem;
}
host = scsi_host_alloc(&pmcraid_host_template,
sizeof(struct pmcraid_instance));
if (!host) {
dev_err(&pdev->dev, "scsi_host_alloc failed!\n");
rc = -ENOMEM;
goto cleanup_nomem;
}
host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS;
host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET;
host->unique_id = host->host_no;
host->max_channel = PMCRAID_MAX_BUS_TO_SCAN;
host->max_cmd_len = PMCRAID_MAX_CDB_LEN;
/* zero out entire instance structure */
pinstance = (struct pmcraid_instance *)host->hostdata;
memset(pinstance, 0, sizeof(*pinstance));
pinstance->chip_cfg =
(struct pmcraid_chip_details *)(dev_id->driver_data);
rc = pmcraid_init_instance(pdev, host, mapped_pci_addr);
if (rc < 0) {
dev_err(&pdev->dev, "failed to initialize adapter instance\n");
goto out_scsi_host_put;
}
pci_set_drvdata(pdev, pinstance);
/* Save PCI config-space for use following the reset */
rc = pci_save_state(pinstance->pdev);
if (rc != 0) {
dev_err(&pdev->dev, "Failed to save PCI config space\n");
goto out_scsi_host_put;
}
pmcraid_disable_interrupts(pinstance, ~0);
rc = pmcraid_register_interrupt_handler(pinstance);
if (rc) {
dev_err(&pdev->dev, "couldn't register interrupt handler\n");
goto out_scsi_host_put;
}
pmcraid_init_tasklets(pinstance);
/* allocate verious buffers used by LLD.*/
rc = pmcraid_init_buffers(pinstance);
if (rc) {
pmcraid_err("couldn't allocate memory blocks\n");
goto out_unregister_isr;
}
/* check the reset type required */
pmcraid_reset_type(pinstance);
pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
/* Start IOA firmware initialization and bring card to Operational
* state.
*/
pmcraid_info("starting IOA initialization sequence\n");
if (pmcraid_reset_bringup(pinstance)) {
dev_err(&pdev->dev, "couldn't initialize IOA\n");
rc = 1;
goto out_release_bufs;
}
/* Add adapter instance into mid-layer list */
rc = scsi_add_host(pinstance->host, &pdev->dev);
if (rc != 0) {
pmcraid_err("couldn't add host into mid-layer: %d\n", rc);
goto out_release_bufs;
}
scsi_scan_host(pinstance->host);
rc = pmcraid_setup_chrdev(pinstance);
if (rc != 0) {
pmcraid_err("couldn't create mgmt interface, error: %x\n",
rc);
goto out_remove_host;
}
/* Schedule worker thread to handle CCN and take care of adding and
* removing devices to OS
*/
atomic_set(&pinstance->expose_resources, 1);
schedule_work(&pinstance->worker_q);
return rc;
out_remove_host:
scsi_remove_host(host);
out_release_bufs:
pmcraid_release_buffers(pinstance);
out_unregister_isr:
pmcraid_kill_tasklets(pinstance);
pmcraid_unregister_interrupt_handler(pinstance);
out_scsi_host_put:
scsi_host_put(host);
cleanup_nomem:
iounmap(mapped_pci_addr);
out_release_regions:
pci_release_regions(pdev);
out_disable_device:
atomic_dec(&pmcraid_adapter_count);
pci_set_drvdata(pdev, NULL);
pci_disable_device(pdev);
return -ENODEV;
}
| DoS Mem. Corr. | 0 | static int __devinit pmcraid_probe(
struct pci_dev *pdev,
const struct pci_device_id *dev_id
)
{
struct pmcraid_instance *pinstance;
struct Scsi_Host *host;
void __iomem *mapped_pci_addr;
int rc = PCIBIOS_SUCCESSFUL;
if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
pmcraid_err
("maximum number(%d) of supported adapters reached\n",
atomic_read(&pmcraid_adapter_count));
return -ENOMEM;
}
atomic_inc(&pmcraid_adapter_count);
rc = pci_enable_device(pdev);
if (rc) {
dev_err(&pdev->dev, "Cannot enable adapter\n");
atomic_dec(&pmcraid_adapter_count);
return rc;
}
dev_info(&pdev->dev,
"Found new IOA(%x:%x), Total IOA count: %d\n",
pdev->vendor, pdev->device,
atomic_read(&pmcraid_adapter_count));
rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME);
if (rc < 0) {
dev_err(&pdev->dev,
"Couldn't register memory range of registers\n");
goto out_disable_device;
}
mapped_pci_addr = pci_iomap(pdev, 0, 0);
if (!mapped_pci_addr) {
dev_err(&pdev->dev, "Couldn't map PCI registers memory\n");
rc = -ENOMEM;
goto out_release_regions;
}
pci_set_master(pdev);
/* Firmware requires the system bus address of IOARCB to be within
* 32-bit addressable range though it has 64-bit IOARRIN register.
* However, firmware supports 64-bit streaming DMA buffers, whereas
* coherent buffers are to be 32-bit. Since pci_alloc_consistent always
* returns memory within 4GB (if not, change this logic), coherent
* buffers are within firmware acceptable address ranges.
*/
if ((sizeof(dma_addr_t) == 4) ||
pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
/* firmware expects 32-bit DMA addresses for IOARRIN register; set 32
* bit mask for pci_alloc_consistent to return addresses within 4GB
*/
if (rc == 0)
rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
if (rc != 0) {
dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
goto cleanup_nomem;
}
host = scsi_host_alloc(&pmcraid_host_template,
sizeof(struct pmcraid_instance));
if (!host) {
dev_err(&pdev->dev, "scsi_host_alloc failed!\n");
rc = -ENOMEM;
goto cleanup_nomem;
}
host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS;
host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET;
host->unique_id = host->host_no;
host->max_channel = PMCRAID_MAX_BUS_TO_SCAN;
host->max_cmd_len = PMCRAID_MAX_CDB_LEN;
/* zero out entire instance structure */
pinstance = (struct pmcraid_instance *)host->hostdata;
memset(pinstance, 0, sizeof(*pinstance));
pinstance->chip_cfg =
(struct pmcraid_chip_details *)(dev_id->driver_data);
rc = pmcraid_init_instance(pdev, host, mapped_pci_addr);
if (rc < 0) {
dev_err(&pdev->dev, "failed to initialize adapter instance\n");
goto out_scsi_host_put;
}
pci_set_drvdata(pdev, pinstance);
/* Save PCI config-space for use following the reset */
rc = pci_save_state(pinstance->pdev);
if (rc != 0) {
dev_err(&pdev->dev, "Failed to save PCI config space\n");
goto out_scsi_host_put;
}
pmcraid_disable_interrupts(pinstance, ~0);
rc = pmcraid_register_interrupt_handler(pinstance);
if (rc) {
dev_err(&pdev->dev, "couldn't register interrupt handler\n");
goto out_scsi_host_put;
}
pmcraid_init_tasklets(pinstance);
/* allocate verious buffers used by LLD.*/
rc = pmcraid_init_buffers(pinstance);
if (rc) {
pmcraid_err("couldn't allocate memory blocks\n");
goto out_unregister_isr;
}
/* check the reset type required */
pmcraid_reset_type(pinstance);
pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
/* Start IOA firmware initialization and bring card to Operational
* state.
*/
pmcraid_info("starting IOA initialization sequence\n");
if (pmcraid_reset_bringup(pinstance)) {
dev_err(&pdev->dev, "couldn't initialize IOA\n");
rc = 1;
goto out_release_bufs;
}
/* Add adapter instance into mid-layer list */
rc = scsi_add_host(pinstance->host, &pdev->dev);
if (rc != 0) {
pmcraid_err("couldn't add host into mid-layer: %d\n", rc);
goto out_release_bufs;
}
scsi_scan_host(pinstance->host);
rc = pmcraid_setup_chrdev(pinstance);
if (rc != 0) {
pmcraid_err("couldn't create mgmt interface, error: %x\n",
rc);
goto out_remove_host;
}
/* Schedule worker thread to handle CCN and take care of adding and
* removing devices to OS
*/
atomic_set(&pinstance->expose_resources, 1);
schedule_work(&pinstance->worker_q);
return rc;
out_remove_host:
scsi_remove_host(host);
out_release_bufs:
pmcraid_release_buffers(pinstance);
out_unregister_isr:
pmcraid_kill_tasklets(pinstance);
pmcraid_unregister_interrupt_handler(pinstance);
out_scsi_host_put:
scsi_host_put(host);
cleanup_nomem:
iounmap(mapped_pci_addr);
out_release_regions:
pci_release_regions(pdev);
out_disable_device:
atomic_dec(&pmcraid_adapter_count);
pci_set_drvdata(pdev, NULL);
pci_disable_device(pdev);
return -ENODEV;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,190 | static void pmcraid_process_ccn(struct pmcraid_cmd *cmd)
{
struct pmcraid_instance *pinstance = cmd->drv_inst;
u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
unsigned long lock_flags;
pinstance->ccn.cmd = NULL;
pmcraid_return_cmd(cmd);
/* If driver initiated IOA reset happened while this hcam was pending
* with IOA, or IOA bringdown sequence is in progress, no need to
* re-register the hcam
*/
if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
atomic_read(&pinstance->ccn.ignore) == 1) {
return;
} else if (ioasc) {
dev_info(&pinstance->pdev->dev,
"Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc);
spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
} else {
pmcraid_handle_config_change(pinstance);
}
}
| DoS Mem. Corr. | 0 | static void pmcraid_process_ccn(struct pmcraid_cmd *cmd)
{
struct pmcraid_instance *pinstance = cmd->drv_inst;
u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
unsigned long lock_flags;
pinstance->ccn.cmd = NULL;
pmcraid_return_cmd(cmd);
/* If driver initiated IOA reset happened while this hcam was pending
* with IOA, or IOA bringdown sequence is in progress, no need to
* re-register the hcam
*/
if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
atomic_read(&pinstance->ccn.ignore) == 1) {
return;
} else if (ioasc) {
dev_info(&pinstance->pdev->dev,
"Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc);
spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
} else {
pmcraid_handle_config_change(pinstance);
}
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,191 | static void pmcraid_process_ldn(struct pmcraid_cmd *cmd)
{
struct pmcraid_instance *pinstance = cmd->drv_inst;
struct pmcraid_hcam_ldn *ldn_hcam =
(struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc);
unsigned long lock_flags;
/* return the command block back to freepool */
pinstance->ldn.cmd = NULL;
pmcraid_return_cmd(cmd);
/* If driver initiated IOA reset happened while this hcam was pending
* with IOA, no need to re-register the hcam as reset engine will do it
* once reset sequence is complete
*/
if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
atomic_read(&pinstance->ccn.ignore) == 1) {
return;
} else if (!ioasc) {
pmcraid_handle_error_log(pinstance);
if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) {
spin_lock_irqsave(pinstance->host->host_lock,
lock_flags);
pmcraid_initiate_reset(pinstance);
spin_unlock_irqrestore(pinstance->host->host_lock,
lock_flags);
return;
}
if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) {
pinstance->timestamp_error = 1;
pmcraid_set_timestamp(cmd);
}
} else {
dev_info(&pinstance->pdev->dev,
"Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc);
}
/* send netlink message for HCAM notification if enabled */
if (!pmcraid_disable_aen)
pmcraid_notify_ldn(pinstance);
cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
if (cmd)
pmcraid_send_hcam_cmd(cmd);
}
| DoS Mem. Corr. | 0 | static void pmcraid_process_ldn(struct pmcraid_cmd *cmd)
{
struct pmcraid_instance *pinstance = cmd->drv_inst;
struct pmcraid_hcam_ldn *ldn_hcam =
(struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc);
unsigned long lock_flags;
/* return the command block back to freepool */
pinstance->ldn.cmd = NULL;
pmcraid_return_cmd(cmd);
/* If driver initiated IOA reset happened while this hcam was pending
* with IOA, no need to re-register the hcam as reset engine will do it
* once reset sequence is complete
*/
if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
atomic_read(&pinstance->ccn.ignore) == 1) {
return;
} else if (!ioasc) {
pmcraid_handle_error_log(pinstance);
if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) {
spin_lock_irqsave(pinstance->host->host_lock,
lock_flags);
pmcraid_initiate_reset(pinstance);
spin_unlock_irqrestore(pinstance->host->host_lock,
lock_flags);
return;
}
if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) {
pinstance->timestamp_error = 1;
pmcraid_set_timestamp(cmd);
}
} else {
dev_info(&pinstance->pdev->dev,
"Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc);
}
/* send netlink message for HCAM notification if enabled */
if (!pmcraid_disable_aen)
pmcraid_notify_ldn(pinstance);
cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
if (cmd)
pmcraid_send_hcam_cmd(cmd);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,192 | static int pmcraid_queuecommand_lck(
struct scsi_cmnd *scsi_cmd,
void (*done) (struct scsi_cmnd *)
)
{
struct pmcraid_instance *pinstance;
struct pmcraid_resource_entry *res;
struct pmcraid_ioarcb *ioarcb;
struct pmcraid_cmd *cmd;
u32 fw_version;
int rc = 0;
pinstance =
(struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
scsi_cmd->scsi_done = done;
res = scsi_cmd->device->hostdata;
scsi_cmd->result = (DID_OK << 16);
/* if adapter is marked as dead, set result to DID_NO_CONNECT complete
* the command
*/
if (pinstance->ioa_state == IOA_STATE_DEAD) {
pmcraid_info("IOA is dead, but queuecommand is scheduled\n");
scsi_cmd->result = (DID_NO_CONNECT << 16);
scsi_cmd->scsi_done(scsi_cmd);
return 0;
}
/* If IOA reset is in progress, can't queue the commands */
if (pinstance->ioa_reset_in_progress)
return SCSI_MLQUEUE_HOST_BUSY;
/* Firmware doesn't support SYNCHRONIZE_CACHE command (0x35), complete
* the command here itself with success return
*/
if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) {
pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n");
scsi_cmd->scsi_done(scsi_cmd);
return 0;
}
/* initialize the command and IOARCB to be sent to IOA */
cmd = pmcraid_get_free_cmd(pinstance);
if (cmd == NULL) {
pmcraid_err("free command block is not available\n");
return SCSI_MLQUEUE_HOST_BUSY;
}
cmd->scsi_cmd = scsi_cmd;
ioarcb = &(cmd->ioa_cb->ioarcb);
memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
ioarcb->resource_handle = res->cfg_entry.resource_handle;
ioarcb->request_type = REQ_TYPE_SCSI;
/* set hrrq number where the IOA should respond to. Note that all cmds
* generated internally uses hrrq_id 0, exception to this is the cmd
* block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
* hrrq_id assigned here in queuecommand
*/
ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
pinstance->num_hrrq;
cmd->cmd_done = pmcraid_io_done;
if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) {
if (scsi_cmd->underflow == 0)
ioarcb->request_flags0 |= INHIBIT_UL_CHECK;
if (res->sync_reqd) {
ioarcb->request_flags0 |= SYNC_COMPLETE;
res->sync_reqd = 0;
}
ioarcb->request_flags0 |= NO_LINK_DESCS;
ioarcb->request_flags1 |= pmcraid_task_attributes(scsi_cmd);
if (RES_IS_GSCSI(res->cfg_entry))
ioarcb->request_flags1 |= DELAY_AFTER_RESET;
}
rc = pmcraid_build_ioadl(pinstance, cmd);
pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n",
le32_to_cpu(ioarcb->response_handle) >> 2,
scsi_cmd->cmnd[0], pinstance->host->unique_id,
RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID :
PMCRAID_PHYS_BUS_ID,
RES_IS_VSET(res->cfg_entry) ?
(fw_version <= PMCRAID_FW_VERSION_1 ?
res->cfg_entry.unique_flags1 :
res->cfg_entry.array_id & 0xFF) :
RES_TARGET(res->cfg_entry.resource_address),
RES_LUN(res->cfg_entry.resource_address));
if (likely(rc == 0)) {
_pmcraid_fire_command(cmd);
} else {
pmcraid_err("queuecommand could not build ioadl\n");
pmcraid_return_cmd(cmd);
rc = SCSI_MLQUEUE_HOST_BUSY;
}
return rc;
}
| DoS Mem. Corr. | 0 | static int pmcraid_queuecommand_lck(
struct scsi_cmnd *scsi_cmd,
void (*done) (struct scsi_cmnd *)
)
{
struct pmcraid_instance *pinstance;
struct pmcraid_resource_entry *res;
struct pmcraid_ioarcb *ioarcb;
struct pmcraid_cmd *cmd;
u32 fw_version;
int rc = 0;
pinstance =
(struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
scsi_cmd->scsi_done = done;
res = scsi_cmd->device->hostdata;
scsi_cmd->result = (DID_OK << 16);
/* if adapter is marked as dead, set result to DID_NO_CONNECT complete
* the command
*/
if (pinstance->ioa_state == IOA_STATE_DEAD) {
pmcraid_info("IOA is dead, but queuecommand is scheduled\n");
scsi_cmd->result = (DID_NO_CONNECT << 16);
scsi_cmd->scsi_done(scsi_cmd);
return 0;
}
/* If IOA reset is in progress, can't queue the commands */
if (pinstance->ioa_reset_in_progress)
return SCSI_MLQUEUE_HOST_BUSY;
/* Firmware doesn't support SYNCHRONIZE_CACHE command (0x35), complete
* the command here itself with success return
*/
if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) {
pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n");
scsi_cmd->scsi_done(scsi_cmd);
return 0;
}
/* initialize the command and IOARCB to be sent to IOA */
cmd = pmcraid_get_free_cmd(pinstance);
if (cmd == NULL) {
pmcraid_err("free command block is not available\n");
return SCSI_MLQUEUE_HOST_BUSY;
}
cmd->scsi_cmd = scsi_cmd;
ioarcb = &(cmd->ioa_cb->ioarcb);
memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
ioarcb->resource_handle = res->cfg_entry.resource_handle;
ioarcb->request_type = REQ_TYPE_SCSI;
/* set hrrq number where the IOA should respond to. Note that all cmds
* generated internally uses hrrq_id 0, exception to this is the cmd
* block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
* hrrq_id assigned here in queuecommand
*/
ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
pinstance->num_hrrq;
cmd->cmd_done = pmcraid_io_done;
if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) {
if (scsi_cmd->underflow == 0)
ioarcb->request_flags0 |= INHIBIT_UL_CHECK;
if (res->sync_reqd) {
ioarcb->request_flags0 |= SYNC_COMPLETE;
res->sync_reqd = 0;
}
ioarcb->request_flags0 |= NO_LINK_DESCS;
ioarcb->request_flags1 |= pmcraid_task_attributes(scsi_cmd);
if (RES_IS_GSCSI(res->cfg_entry))
ioarcb->request_flags1 |= DELAY_AFTER_RESET;
}
rc = pmcraid_build_ioadl(pinstance, cmd);
pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n",
le32_to_cpu(ioarcb->response_handle) >> 2,
scsi_cmd->cmnd[0], pinstance->host->unique_id,
RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID :
PMCRAID_PHYS_BUS_ID,
RES_IS_VSET(res->cfg_entry) ?
(fw_version <= PMCRAID_FW_VERSION_1 ?
res->cfg_entry.unique_flags1 :
res->cfg_entry.array_id & 0xFF) :
RES_TARGET(res->cfg_entry.resource_address),
RES_LUN(res->cfg_entry.resource_address));
if (likely(rc == 0)) {
_pmcraid_fire_command(cmd);
} else {
pmcraid_err("queuecommand could not build ioadl\n");
pmcraid_return_cmd(cmd);
rc = SCSI_MLQUEUE_HOST_BUSY;
}
return rc;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,193 | static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance)
{
return (pinstance->interrupt_mode) ?
ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) :
ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
}
| DoS Mem. Corr. | 0 | static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance)
{
return (pinstance->interrupt_mode) ?
ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) :
ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,194 | static void pmcraid_register_hcams(struct pmcraid_instance *pinstance)
{
pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
}
| DoS Mem. Corr. | 0 | static void pmcraid_register_hcams(struct pmcraid_instance *pinstance)
{
pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,195 | pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance)
{
int rc;
struct pci_dev *pdev = pinstance->pdev;
if ((pmcraid_enable_msix) &&
(pci_find_capability(pdev, PCI_CAP_ID_MSIX))) {
int num_hrrq = PMCRAID_NUM_MSIX_VECTORS;
struct msix_entry entries[PMCRAID_NUM_MSIX_VECTORS];
int i;
for (i = 0; i < PMCRAID_NUM_MSIX_VECTORS; i++)
entries[i].entry = i;
rc = pci_enable_msix(pdev, entries, num_hrrq);
if (rc < 0)
goto pmcraid_isr_legacy;
/* Check how many MSIX vectors are allocated and register
* msi-x handlers for each of them giving appropriate buffer
*/
if (rc > 0) {
num_hrrq = rc;
if (pci_enable_msix(pdev, entries, num_hrrq))
goto pmcraid_isr_legacy;
}
for (i = 0; i < num_hrrq; i++) {
pinstance->hrrq_vector[i].hrrq_id = i;
pinstance->hrrq_vector[i].drv_inst = pinstance;
pinstance->hrrq_vector[i].vector = entries[i].vector;
rc = request_irq(pinstance->hrrq_vector[i].vector,
pmcraid_isr_msix, 0,
PMCRAID_DRIVER_NAME,
&(pinstance->hrrq_vector[i]));
if (rc) {
int j;
for (j = 0; j < i; j++)
free_irq(entries[j].vector,
&(pinstance->hrrq_vector[j]));
pci_disable_msix(pdev);
goto pmcraid_isr_legacy;
}
}
pinstance->num_hrrq = num_hrrq;
pinstance->interrupt_mode = 1;
iowrite32(DOORBELL_INTR_MODE_MSIX,
pinstance->int_regs.host_ioa_interrupt_reg);
ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
goto pmcraid_isr_out;
}
pmcraid_isr_legacy:
/* If MSI-X registration failed fallback to legacy mode, where
* only one hrrq entry will be used
*/
pinstance->hrrq_vector[0].hrrq_id = 0;
pinstance->hrrq_vector[0].drv_inst = pinstance;
pinstance->hrrq_vector[0].vector = pdev->irq;
pinstance->num_hrrq = 1;
rc = 0;
rc = request_irq(pdev->irq, pmcraid_isr, IRQF_SHARED,
PMCRAID_DRIVER_NAME, &pinstance->hrrq_vector[0]);
pmcraid_isr_out:
return rc;
}
| DoS Mem. Corr. | 0 | pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance)
{
int rc;
struct pci_dev *pdev = pinstance->pdev;
if ((pmcraid_enable_msix) &&
(pci_find_capability(pdev, PCI_CAP_ID_MSIX))) {
int num_hrrq = PMCRAID_NUM_MSIX_VECTORS;
struct msix_entry entries[PMCRAID_NUM_MSIX_VECTORS];
int i;
for (i = 0; i < PMCRAID_NUM_MSIX_VECTORS; i++)
entries[i].entry = i;
rc = pci_enable_msix(pdev, entries, num_hrrq);
if (rc < 0)
goto pmcraid_isr_legacy;
/* Check how many MSIX vectors are allocated and register
* msi-x handlers for each of them giving appropriate buffer
*/
if (rc > 0) {
num_hrrq = rc;
if (pci_enable_msix(pdev, entries, num_hrrq))
goto pmcraid_isr_legacy;
}
for (i = 0; i < num_hrrq; i++) {
pinstance->hrrq_vector[i].hrrq_id = i;
pinstance->hrrq_vector[i].drv_inst = pinstance;
pinstance->hrrq_vector[i].vector = entries[i].vector;
rc = request_irq(pinstance->hrrq_vector[i].vector,
pmcraid_isr_msix, 0,
PMCRAID_DRIVER_NAME,
&(pinstance->hrrq_vector[i]));
if (rc) {
int j;
for (j = 0; j < i; j++)
free_irq(entries[j].vector,
&(pinstance->hrrq_vector[j]));
pci_disable_msix(pdev);
goto pmcraid_isr_legacy;
}
}
pinstance->num_hrrq = num_hrrq;
pinstance->interrupt_mode = 1;
iowrite32(DOORBELL_INTR_MODE_MSIX,
pinstance->int_regs.host_ioa_interrupt_reg);
ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
goto pmcraid_isr_out;
}
pmcraid_isr_legacy:
/* If MSI-X registration failed fallback to legacy mode, where
* only one hrrq entry will be used
*/
pinstance->hrrq_vector[0].hrrq_id = 0;
pinstance->hrrq_vector[0].drv_inst = pinstance;
pinstance->hrrq_vector[0].vector = pdev->irq;
pinstance->num_hrrq = 1;
rc = 0;
rc = request_irq(pdev->irq, pmcraid_isr, IRQF_SHARED,
PMCRAID_DRIVER_NAME, &pinstance->hrrq_vector[0]);
pmcraid_isr_out:
return rc;
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,196 | static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance)
{
int i;
int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
for (i = 0; i < pinstance->num_hrrq; i++) {
memset(pinstance->hrrq_start[i], 0, buffer_size);
pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
pinstance->hrrq_end[i] =
pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
pinstance->host_toggle_bit[i] = 1;
}
}
| DoS Mem. Corr. | 0 | static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance)
{
int i;
int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
for (i = 0; i < pinstance->num_hrrq; i++) {
memset(pinstance->hrrq_start[i], 0, buffer_size);
pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
pinstance->hrrq_end[i] =
pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
pinstance->host_toggle_bit[i] = 1;
}
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,197 | static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd)
{
pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
cmd->ioa_cb->ioarcb.cdb[0],
le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
if (cmd->release) {
cmd->release = 0;
pmcraid_return_cmd(cmd);
}
pmcraid_info("scheduling worker for config table reinitialization\n");
schedule_work(&cmd->drv_inst->worker_q);
}
| DoS Mem. Corr. | 0 | static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd)
{
pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
cmd->ioa_cb->ioarcb.cdb[0],
le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
if (cmd->release) {
cmd->release = 0;
pmcraid_return_cmd(cmd);
}
pmcraid_info("scheduling worker for config table reinitialization\n");
schedule_work(&cmd->drv_inst->worker_q);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,198 | static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd)
{
pmcraid_init_cmdblk(cmd, -1);
}
| DoS Mem. Corr. | 0 | static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd)
{
pmcraid_init_cmdblk(cmd, -1);
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
21,199 | static void pmcraid_release_buffers(struct pmcraid_instance *pinstance)
{
pmcraid_release_config_buffers(pinstance);
pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD);
pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
if (pinstance->inq_data != NULL) {
pci_free_consistent(pinstance->pdev,
sizeof(struct pmcraid_inquiry_data),
pinstance->inq_data,
pinstance->inq_data_baddr);
pinstance->inq_data = NULL;
pinstance->inq_data_baddr = 0;
}
if (pinstance->timestamp_data != NULL) {
pci_free_consistent(pinstance->pdev,
sizeof(struct pmcraid_timestamp_data),
pinstance->timestamp_data,
pinstance->timestamp_data_baddr);
pinstance->timestamp_data = NULL;
pinstance->timestamp_data_baddr = 0;
}
}
| DoS Mem. Corr. | 0 | static void pmcraid_release_buffers(struct pmcraid_instance *pinstance)
{
pmcraid_release_config_buffers(pinstance);
pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD);
pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
if (pinstance->inq_data != NULL) {
pci_free_consistent(pinstance->pdev,
sizeof(struct pmcraid_inquiry_data),
pinstance->inq_data,
pinstance->inq_data_baddr);
pinstance->inq_data = NULL;
pinstance->inq_data_baddr = 0;
}
if (pinstance->timestamp_data != NULL) {
pci_free_consistent(pinstance->pdev,
sizeof(struct pmcraid_timestamp_data),
pinstance->timestamp_data,
pinstance->timestamp_data_baddr);
pinstance->timestamp_data = NULL;
pinstance->timestamp_data_baddr = 0;
}
}
| @@ -3871,6 +3871,9 @@ static long pmcraid_ioctl_passthrough(
pmcraid_err("couldn't build passthrough ioadls\n");
goto out_free_buffer;
}
+ } else if (request_size < 0) {
+ rc = -EINVAL;
+ goto out_free_buffer;
}
/* If data is being written into the device, copy the data from user | CWE-189 | null | null |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.