idx int64 | func_before string | Vulnerability Classification string | vul int64 | func_after string | patch string | CWE ID string | lines_before string | lines_after string |
|---|---|---|---|---|---|---|---|---|
4,500 | static TRBCCode xhci_alloc_device_streams(XHCIState *xhci, unsigned int slotid,
uint32_t epmask)
{
XHCIEPContext *epctxs[30];
USBEndpoint *eps[30];
int i, r, nr_eps, req_nr_streams, dev_max_streams;
nr_eps = xhci_epmask_to_eps_with_streams(xhci, slotid, epmask,... | DoS | 0 | static TRBCCode xhci_alloc_device_streams(XHCIState *xhci, unsigned int slotid,
uint32_t epmask)
{
XHCIEPContext *epctxs[30];
USBEndpoint *eps[30];
int i, r, nr_eps, req_nr_streams, dev_max_streams;
nr_eps = xhci_epmask_to_eps_with_streams(xhci, slotid, epmask,... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,501 | static XHCIEPContext *xhci_alloc_epctx(XHCIState *xhci,
unsigned int slotid,
unsigned int epid)
{
XHCIEPContext *epctx;
epctx = g_new0(XHCIEPContext, 1);
epctx->xhci = xhci;
epctx->slotid = slotid;
epctx->epid = epid;
... | DoS | 0 | static XHCIEPContext *xhci_alloc_epctx(XHCIState *xhci,
unsigned int slotid,
unsigned int epid)
{
XHCIEPContext *epctx;
epctx = g_new0(XHCIEPContext, 1);
epctx->xhci = xhci;
epctx->slotid = slotid;
epctx->epid = epid;
... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,502 | static void xhci_alloc_streams(XHCIEPContext *epctx, dma_addr_t base)
{
assert(epctx->pstreams == NULL);
epctx->nr_pstreams = 2 << epctx->max_pstreams;
epctx->pstreams = xhci_alloc_stream_contexts(epctx->nr_pstreams, base);
}
| DoS | 0 | static void xhci_alloc_streams(XHCIEPContext *epctx, dma_addr_t base)
{
assert(epctx->pstreams == NULL);
epctx->nr_pstreams = 2 << epctx->max_pstreams;
epctx->pstreams = xhci_alloc_stream_contexts(epctx->nr_pstreams, base);
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,503 | static void xhci_calc_intr_kick(XHCIState *xhci, XHCITransfer *xfer,
XHCIEPContext *epctx, uint64_t mfindex)
{
uint64_t asap = ((mfindex + epctx->interval - 1) &
~(epctx->interval-1));
uint64_t kick = epctx->mfindex_last + epctx->interval;
assert(epctx->... | DoS | 0 | static void xhci_calc_intr_kick(XHCIState *xhci, XHCITransfer *xfer,
XHCIEPContext *epctx, uint64_t mfindex)
{
uint64_t asap = ((mfindex + epctx->interval - 1) &
~(epctx->interval-1));
uint64_t kick = epctx->mfindex_last + epctx->interval;
assert(epctx->... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,504 | static uint64_t xhci_cap_read(void *ptr, hwaddr reg, unsigned size)
{
XHCIState *xhci = ptr;
uint32_t ret;
switch (reg) {
case 0x00: /* HCIVERSION, CAPLENGTH */
ret = 0x01000000 | LEN_CAP;
break;
case 0x04: /* HCSPARAMS 1 */
ret = ((xhci->numports_2+xhci->numports_3)<<24)
... | DoS | 0 | static uint64_t xhci_cap_read(void *ptr, hwaddr reg, unsigned size)
{
XHCIState *xhci = ptr;
uint32_t ret;
switch (reg) {
case 0x00: /* HCIVERSION, CAPLENGTH */
ret = 0x01000000 | LEN_CAP;
break;
case 0x04: /* HCSPARAMS 1 */
ret = ((xhci->numports_2+xhci->numports_3)<<24)
... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,505 | static void xhci_cap_write(void *opaque, hwaddr addr, uint64_t val,
unsigned width)
{
/* nothing */
}
| DoS | 0 | static void xhci_cap_write(void *opaque, hwaddr addr, uint64_t val,
unsigned width)
{
/* nothing */
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,506 | static void xhci_check_intr_iso_kick(XHCIState *xhci, XHCITransfer *xfer,
XHCIEPContext *epctx, uint64_t mfindex)
{
if (xfer->mfindex_kick > mfindex) {
timer_mod(epctx->kick_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
(xfer->mfindex_kick - mfind... | DoS | 0 | static void xhci_check_intr_iso_kick(XHCIState *xhci, XHCITransfer *xfer,
XHCIEPContext *epctx, uint64_t mfindex)
{
if (xfer->mfindex_kick > mfindex) {
timer_mod(epctx->kick_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
(xfer->mfindex_kick - mfind... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,507 | static void xhci_child_detach(USBPort *uport, USBDevice *child)
{
USBBus *bus = usb_bus_from_device(child);
XHCIState *xhci = container_of(bus, XHCIState, bus);
xhci_detach_slot(xhci, child->port);
}
| DoS | 0 | static void xhci_child_detach(USBPort *uport, USBDevice *child)
{
USBBus *bus = usb_bus_from_device(child);
XHCIState *xhci = container_of(bus, XHCIState, bus);
xhci_detach_slot(xhci, child->port);
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,508 | static void xhci_class_init(ObjectClass *klass, void *data)
{
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_xhci;
dc->props = xhci_properties;
dc->reset = xhci_reset;
set_bit(DEVICE_CATEGORY_USB, dc->categories);
k->realize ... | DoS | 0 | static void xhci_class_init(ObjectClass *klass, void *data)
{
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_xhci;
dc->props = xhci_properties;
dc->reset = xhci_reset;
set_bit(DEVICE_CATEGORY_USB, dc->categories);
k->realize ... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,509 | static void xhci_complete(USBPort *port, USBPacket *packet)
{
XHCITransfer *xfer = container_of(packet, XHCITransfer, packet);
if (packet->status == USB_RET_REMOVE_FROM_QUEUE) {
xhci_ep_nuke_one_xfer(xfer, 0);
return;
}
xhci_try_complete_packet(xfer);
xhci_kick_epctx(xfer->epctx, xf... | DoS | 0 | static void xhci_complete(USBPort *port, USBPacket *packet)
{
XHCITransfer *xfer = container_of(packet, XHCITransfer, packet);
if (packet->status == USB_RET_REMOVE_FROM_QUEUE) {
xhci_ep_nuke_one_xfer(xfer, 0);
return;
}
xhci_try_complete_packet(xfer);
xhci_kick_epctx(xfer->epctx, xf... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,510 | static TRBCCode xhci_configure_slot(XHCIState *xhci, unsigned int slotid,
uint64_t pictx, bool dc)
{
dma_addr_t ictx, octx;
uint32_t ictl_ctx[2];
uint32_t slot_ctx[4];
uint32_t islot_ctx[4];
uint32_t ep_ctx[5];
int i;
TRBCCode res;
trace_usb_xhci_slot_c... | DoS | 0 | static TRBCCode xhci_configure_slot(XHCIState *xhci, unsigned int slotid,
uint64_t pictx, bool dc)
{
dma_addr_t ictx, octx;
uint32_t ictl_ctx[2];
uint32_t slot_ctx[4];
uint32_t islot_ctx[4];
uint32_t ep_ctx[5];
int i;
TRBCCode res;
trace_usb_xhci_slot_c... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,511 | static void xhci_detach(USBPort *usbport)
{
XHCIState *xhci = usbport->opaque;
XHCIPort *port = xhci_lookup_port(xhci, usbport);
xhci_detach_slot(xhci, usbport);
xhci_port_update(port, 1);
}
| DoS | 0 | static void xhci_detach(USBPort *usbport)
{
XHCIState *xhci = usbport->opaque;
XHCIPort *port = xhci_lookup_port(xhci, usbport);
xhci_detach_slot(xhci, usbport);
xhci_port_update(port, 1);
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,512 | static void xhci_detach_slot(XHCIState *xhci, USBPort *uport)
{
int slot, ep;
for (slot = 0; slot < xhci->numslots; slot++) {
if (xhci->slots[slot].uport == uport) {
break;
}
}
if (slot == xhci->numslots) {
return;
}
for (ep = 0; ep < 31; ep++) {
if ... | DoS | 0 | static void xhci_detach_slot(XHCIState *xhci, USBPort *uport)
{
int slot, ep;
for (slot = 0; slot < xhci->numslots; slot++) {
if (xhci->slots[slot].uport == uport) {
break;
}
}
if (slot == xhci->numslots) {
return;
}
for (ep = 0; ep < 31; ep++) {
if ... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,513 | static void xhci_die(XHCIState *xhci)
{
xhci->usbsts |= USBSTS_HCE;
DPRINTF("xhci: asserted controller error\n");
}
| DoS | 0 | static void xhci_die(XHCIState *xhci)
{
xhci->usbsts |= USBSTS_HCE;
DPRINTF("xhci: asserted controller error\n");
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,514 | static TRBCCode xhci_disable_slot(XHCIState *xhci, unsigned int slotid)
{
int i;
trace_usb_xhci_slot_disable(slotid);
assert(slotid >= 1 && slotid <= xhci->numslots);
for (i = 1; i <= 31; i++) {
if (xhci->slots[slotid-1].eps[i-1]) {
xhci_disable_ep(xhci, slotid, i);
}
}... | DoS | 0 | static TRBCCode xhci_disable_slot(XHCIState *xhci, unsigned int slotid)
{
int i;
trace_usb_xhci_slot_disable(slotid);
assert(slotid >= 1 && slotid <= xhci->numslots);
for (i = 1; i <= 31; i++) {
if (xhci->slots[slotid-1].eps[i-1]) {
xhci_disable_ep(xhci, slotid, i);
}
}... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,515 | static inline void xhci_dma_read_u32s(XHCIState *xhci, dma_addr_t addr,
uint32_t *buf, size_t len)
{
int i;
assert((len % sizeof(uint32_t)) == 0);
pci_dma_read(PCI_DEVICE(xhci), addr, buf, len);
for (i = 0; i < (len / sizeof(uint32_t)); i++) {
buf[i] = le... | DoS | 0 | static inline void xhci_dma_read_u32s(XHCIState *xhci, dma_addr_t addr,
uint32_t *buf, size_t len)
{
int i;
assert((len % sizeof(uint32_t)) == 0);
pci_dma_read(PCI_DEVICE(xhci), addr, buf, len);
for (i = 0; i < (len / sizeof(uint32_t)); i++) {
buf[i] = le... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,516 | static uint64_t xhci_doorbell_read(void *ptr, hwaddr reg,
unsigned size)
{
/* doorbells always read as 0 */
trace_usb_xhci_doorbell_read(reg, 0);
return 0;
}
| DoS | 0 | static uint64_t xhci_doorbell_read(void *ptr, hwaddr reg,
unsigned size)
{
/* doorbells always read as 0 */
trace_usb_xhci_doorbell_read(reg, 0);
return 0;
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,517 | static void xhci_doorbell_write(void *ptr, hwaddr reg,
uint64_t val, unsigned size)
{
XHCIState *xhci = ptr;
unsigned int epid, streamid;
trace_usb_xhci_doorbell_write(reg, val);
if (!xhci_running(xhci)) {
DPRINTF("xhci: wrote doorbell while xHC stopped or pause... | DoS | 0 | static void xhci_doorbell_write(void *ptr, hwaddr reg,
uint64_t val, unsigned size)
{
XHCIState *xhci = ptr;
unsigned int epid, streamid;
trace_usb_xhci_doorbell_write(reg, val);
if (!xhci_running(xhci)) {
DPRINTF("xhci: wrote doorbell while xHC stopped or pause... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,518 | static XHCITransfer *xhci_ep_alloc_xfer(XHCIEPContext *epctx,
uint32_t length)
{
uint32_t limit = epctx->nr_pstreams + 16;
XHCITransfer *xfer;
if (epctx->xfer_count >= limit) {
return NULL;
}
xfer = g_new0(XHCITransfer, 1);
xfer->epctx = epctx;
... | DoS | 0 | static XHCITransfer *xhci_ep_alloc_xfer(XHCIEPContext *epctx,
uint32_t length)
{
uint32_t limit = epctx->nr_pstreams + 16;
XHCITransfer *xfer;
if (epctx->xfer_count >= limit) {
return NULL;
}
xfer = g_new0(XHCITransfer, 1);
xfer->epctx = epctx;
... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,519 | static int xhci_ep_nuke_one_xfer(XHCITransfer *t, TRBCCode report)
{
int killed = 0;
if (report && (t->running_async || t->running_retry)) {
t->status = report;
xhci_xfer_report(t);
}
if (t->running_async) {
usb_cancel_packet(&t->packet);
t->running_async = 0;
k... | DoS | 0 | static int xhci_ep_nuke_one_xfer(XHCITransfer *t, TRBCCode report)
{
int killed = 0;
if (report && (t->running_async || t->running_retry)) {
t->status = report;
xhci_xfer_report(t);
}
if (t->running_async) {
usb_cancel_packet(&t->packet);
t->running_async = 0;
k... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,520 | static int xhci_ep_nuke_xfers(XHCIState *xhci, unsigned int slotid,
unsigned int epid, TRBCCode report)
{
XHCISlot *slot;
XHCIEPContext *epctx;
XHCITransfer *xfer;
int killed = 0;
USBEndpoint *ep = NULL;
assert(slotid >= 1 && slotid <= xhci->numslots);
assert(e... | DoS | 0 | static int xhci_ep_nuke_xfers(XHCIState *xhci, unsigned int slotid,
unsigned int epid, TRBCCode report)
{
XHCISlot *slot;
XHCIEPContext *epctx;
XHCITransfer *xfer;
int killed = 0;
USBEndpoint *ep = NULL;
assert(slotid >= 1 && slotid <= xhci->numslots);
assert(e... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,521 | static USBEndpoint *xhci_epid_to_usbep(XHCIEPContext *epctx)
{
USBPort *uport;
uint32_t token;
if (!epctx) {
return NULL;
}
uport = epctx->xhci->slots[epctx->slotid - 1].uport;
token = (epctx->epid & 1) ? USB_TOKEN_IN : USB_TOKEN_OUT;
if (!uport) {
return NULL;
}
ret... | DoS | 0 | static USBEndpoint *xhci_epid_to_usbep(XHCIEPContext *epctx)
{
USBPort *uport;
uint32_t token;
if (!epctx) {
return NULL;
}
uport = epctx->xhci->slots[epctx->slotid - 1].uport;
token = (epctx->epid & 1) ? USB_TOKEN_IN : USB_TOKEN_OUT;
if (!uport) {
return NULL;
}
ret... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,522 | static bool xhci_er_full(void *opaque, int version_id)
{
struct XHCIInterrupter *intr = opaque;
return intr->er_full;
}
| DoS | 0 | static bool xhci_er_full(void *opaque, int version_id)
{
struct XHCIInterrupter *intr = opaque;
return intr->er_full;
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,523 | static void xhci_er_reset(XHCIState *xhci, int v)
{
XHCIInterrupter *intr = &xhci->intr[v];
XHCIEvRingSeg seg;
if (intr->erstsz == 0) {
/* disabled */
intr->er_start = 0;
intr->er_size = 0;
return;
}
/* cache the (sole) event ring segment location */
if (intr->er... | DoS | 0 | static void xhci_er_reset(XHCIState *xhci, int v)
{
XHCIInterrupter *intr = &xhci->intr[v];
XHCIEvRingSeg seg;
if (intr->erstsz == 0) {
/* disabled */
intr->er_start = 0;
intr->er_size = 0;
return;
}
/* cache the (sole) event ring segment location */
if (intr->er... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,524 | static TRBCCode xhci_evaluate_slot(XHCIState *xhci, unsigned int slotid,
uint64_t pictx)
{
dma_addr_t ictx, octx;
uint32_t ictl_ctx[2];
uint32_t iep0_ctx[5];
uint32_t ep0_ctx[5];
uint32_t islot_ctx[4];
uint32_t slot_ctx[4];
trace_usb_xhci_slot_evaluate(slo... | DoS | 0 | static TRBCCode xhci_evaluate_slot(XHCIState *xhci, unsigned int slotid,
uint64_t pictx)
{
dma_addr_t ictx, octx;
uint32_t ictl_ctx[2];
uint32_t iep0_ctx[5];
uint32_t ep0_ctx[5];
uint32_t islot_ctx[4];
uint32_t slot_ctx[4];
trace_usb_xhci_slot_evaluate(slo... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,525 | static void xhci_events_update(XHCIState *xhci, int v)
{
XHCIInterrupter *intr = &xhci->intr[v];
dma_addr_t erdp;
unsigned int dp_idx;
bool do_irq = 0;
if (xhci->usbsts & USBSTS_HCH) {
return;
}
erdp = xhci_addr64(intr->erdp_low, intr->erdp_high);
if (erdp < intr->er_start ||
... | DoS | 0 | static void xhci_events_update(XHCIState *xhci, int v)
{
XHCIInterrupter *intr = &xhci->intr[v];
dma_addr_t erdp;
unsigned int dp_idx;
bool do_irq = 0;
if (xhci->usbsts & USBSTS_HCH) {
return;
}
erdp = xhci_addr64(intr->erdp_low, intr->erdp_high);
if (erdp < intr->er_start ||
... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,526 | static int xhci_find_epid(USBEndpoint *ep)
{
if (ep->nr == 0) {
return 1;
}
if (ep->pid == USB_TOKEN_IN) {
return ep->nr * 2 + 1;
} else {
return ep->nr * 2;
}
}
| DoS | 0 | static int xhci_find_epid(USBEndpoint *ep)
{
if (ep->nr == 0) {
return 1;
}
if (ep->pid == USB_TOKEN_IN) {
return ep->nr * 2 + 1;
} else {
return ep->nr * 2;
}
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,527 | static XHCIStreamContext *xhci_find_stream(XHCIEPContext *epctx,
unsigned int streamid,
uint32_t *cc_error)
{
XHCIStreamContext *sctx;
dma_addr_t base;
uint32_t ctx[2], sct;
assert(streamid != 0);
if (epctx->lsa) ... | DoS | 0 | static XHCIStreamContext *xhci_find_stream(XHCIEPContext *epctx,
unsigned int streamid,
uint32_t *cc_error)
{
XHCIStreamContext *sctx;
dma_addr_t base;
uint32_t ctx[2], sct;
assert(streamid != 0);
if (epctx->lsa) ... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,528 | static int xhci_fire_ctl_transfer(XHCIState *xhci, XHCITransfer *xfer)
{
XHCITRB *trb_setup, *trb_status;
uint8_t bmRequestType;
trb_setup = &xfer->trbs[0];
trb_status = &xfer->trbs[xfer->trb_count-1];
trace_usb_xhci_xfer_start(xfer, xfer->epctx->slotid,
xfer->epctx->... | DoS | 0 | static int xhci_fire_ctl_transfer(XHCIState *xhci, XHCITransfer *xfer)
{
XHCITRB *trb_setup, *trb_status;
uint8_t bmRequestType;
trb_setup = &xfer->trbs[0];
trb_status = &xfer->trbs[xfer->trb_count-1];
trace_usb_xhci_xfer_start(xfer, xfer->epctx->slotid,
xfer->epctx->... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,529 | static int xhci_fire_transfer(XHCIState *xhci, XHCITransfer *xfer, XHCIEPContext *epctx)
{
trace_usb_xhci_xfer_start(xfer, xfer->epctx->slotid,
xfer->epctx->epid, xfer->streamid);
return xhci_submit(xhci, xfer, epctx);
}
| DoS | 0 | static int xhci_fire_transfer(XHCIState *xhci, XHCITransfer *xfer, XHCIEPContext *epctx)
{
trace_usb_xhci_xfer_start(xfer, xfer->epctx->slotid,
xfer->epctx->epid, xfer->streamid);
return xhci_submit(xhci, xfer, epctx);
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,530 | static void xhci_free_device_streams(XHCIState *xhci, unsigned int slotid,
uint32_t epmask)
{
USBEndpoint *eps[30];
int nr_eps;
nr_eps = xhci_epmask_to_eps_with_streams(xhci, slotid, epmask, NULL, eps);
if (nr_eps) {
usb_device_free_streams(eps[0]->dev, eps,... | DoS | 0 | static void xhci_free_device_streams(XHCIState *xhci, unsigned int slotid,
uint32_t epmask)
{
USBEndpoint *eps[30];
int nr_eps;
nr_eps = xhci_epmask_to_eps_with_streams(xhci, slotid, epmask, NULL, eps);
if (nr_eps) {
usb_device_free_streams(eps[0]->dev, eps,... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,531 | static void xhci_free_streams(XHCIEPContext *epctx)
{
assert(epctx->pstreams != NULL);
g_free(epctx->pstreams);
epctx->pstreams = NULL;
epctx->nr_pstreams = 0;
}
| DoS | 0 | static void xhci_free_streams(XHCIEPContext *epctx)
{
assert(epctx->pstreams != NULL);
g_free(epctx->pstreams);
epctx->pstreams = NULL;
epctx->nr_pstreams = 0;
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,532 | static bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit)
{
return xhci->flags & (1 << bit);
}
| DoS | 0 | static bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit)
{
return xhci->flags & (1 << bit);
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,533 | static TRBCCode xhci_get_port_bandwidth(XHCIState *xhci, uint64_t pctx)
{
dma_addr_t ctx;
uint8_t bw_ctx[xhci->numports+1];
DPRINTF("xhci_get_port_bandwidth()\n");
ctx = xhci_mask64(pctx);
DPRINTF("xhci: bandwidth context at "DMA_ADDR_FMT"\n", ctx);
/* TODO: actually implement real values he... | DoS | 0 | static TRBCCode xhci_get_port_bandwidth(XHCIState *xhci, uint64_t pctx)
{
dma_addr_t ctx;
uint8_t bw_ctx[xhci->numports+1];
DPRINTF("xhci_get_port_bandwidth()\n");
ctx = xhci_mask64(pctx);
DPRINTF("xhci: bandwidth context at "DMA_ADDR_FMT"\n", ctx);
/* TODO: actually implement real values he... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,534 | static void xhci_init_epctx(XHCIEPContext *epctx,
dma_addr_t pctx, uint32_t *ctx)
{
dma_addr_t dequeue;
dequeue = xhci_addr64(ctx[2] & ~0xf, ctx[3]);
epctx->type = (ctx[1] >> EP_TYPE_SHIFT) & EP_TYPE_MASK;
epctx->pctx = pctx;
epctx->max_psize = ctx[1]>>16;
epctx->ma... | DoS | 0 | static void xhci_init_epctx(XHCIEPContext *epctx,
dma_addr_t pctx, uint32_t *ctx)
{
dma_addr_t dequeue;
dequeue = xhci_addr64(ctx[2] & ~0xf, ctx[3]);
epctx->type = (ctx[1] >> EP_TYPE_SHIFT) & EP_TYPE_MASK;
epctx->pctx = pctx;
epctx->max_psize = ctx[1]>>16;
epctx->ma... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,535 | static void xhci_intr_raise(XHCIState *xhci, int v)
{
PCIDevice *pci_dev = PCI_DEVICE(xhci);
xhci->intr[v].erdp_low |= ERDP_EHB;
xhci->intr[v].iman |= IMAN_IP;
xhci->usbsts |= USBSTS_EINT;
if (!(xhci->intr[v].iman & IMAN_IE)) {
return;
}
if (!(xhci->usbcmd & USBCMD_INTE)) {
... | DoS | 0 | static void xhci_intr_raise(XHCIState *xhci, int v)
{
PCIDevice *pci_dev = PCI_DEVICE(xhci);
xhci->intr[v].erdp_low |= ERDP_EHB;
xhci->intr[v].iman |= IMAN_IP;
xhci->usbsts |= USBSTS_EINT;
if (!(xhci->intr[v].iman & IMAN_IE)) {
return;
}
if (!(xhci->usbcmd & USBCMD_INTE)) {
... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,536 | static void xhci_intx_update(XHCIState *xhci)
{
PCIDevice *pci_dev = PCI_DEVICE(xhci);
int level = 0;
if (msix_enabled(pci_dev) ||
msi_enabled(pci_dev)) {
return;
}
if (xhci->intr[0].iman & IMAN_IP &&
xhci->intr[0].iman & IMAN_IE &&
xhci->usbcmd & USBCMD_INTE) {
... | DoS | 0 | static void xhci_intx_update(XHCIState *xhci)
{
PCIDevice *pci_dev = PCI_DEVICE(xhci);
int level = 0;
if (msix_enabled(pci_dev) ||
msi_enabled(pci_dev)) {
return;
}
if (xhci->intr[0].iman & IMAN_IP &&
xhci->intr[0].iman & IMAN_IE &&
xhci->usbcmd & USBCMD_INTE) {
... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,537 | static XHCIPort *xhci_lookup_port(XHCIState *xhci, struct USBPort *uport)
{
int index;
if (!uport->dev) {
return NULL;
}
switch (uport->dev->speed) {
case USB_SPEED_LOW:
case USB_SPEED_FULL:
case USB_SPEED_HIGH:
if (xhci_get_flag(xhci, XHCI_FLAG_SS_FIRST)) {
inde... | DoS | 0 | static XHCIPort *xhci_lookup_port(XHCIState *xhci, struct USBPort *uport)
{
int index;
if (!uport->dev) {
return NULL;
}
switch (uport->dev->speed) {
case USB_SPEED_LOW:
case USB_SPEED_FULL:
case USB_SPEED_HIGH:
if (xhci_get_flag(xhci, XHCI_FLAG_SS_FIRST)) {
inde... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,538 | static inline dma_addr_t xhci_mask64(uint64_t addr)
{
if (sizeof(dma_addr_t) == 4) {
return addr & 0xffffffff;
} else {
return addr;
}
}
| DoS | 0 | static inline dma_addr_t xhci_mask64(uint64_t addr)
{
if (sizeof(dma_addr_t) == 4) {
return addr & 0xffffffff;
} else {
return addr;
}
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,539 | static uint64_t xhci_mfindex_get(XHCIState *xhci)
{
int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
return (now - xhci->mfindex_start) / 125000;
}
| DoS | 0 | static uint64_t xhci_mfindex_get(XHCIState *xhci)
{
int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
return (now - xhci->mfindex_start) / 125000;
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,540 | static void xhci_mfwrap_update(XHCIState *xhci)
{
const uint32_t bits = USBCMD_RS | USBCMD_EWE;
uint32_t mfindex, left;
int64_t now;
if ((xhci->usbcmd & bits) == bits) {
now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
mfindex = ((now - xhci->mfindex_start) / 125000) & 0x3fff;
left ... | DoS | 0 | static void xhci_mfwrap_update(XHCIState *xhci)
{
const uint32_t bits = USBCMD_RS | USBCMD_EWE;
uint32_t mfindex, left;
int64_t now;
if ((xhci->usbcmd & bits) == bits) {
now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
mfindex = ((now - xhci->mfindex_start) / 125000) & 0x3fff;
left ... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,541 | static void xhci_msix_update(XHCIState *xhci, int v)
{
PCIDevice *pci_dev = PCI_DEVICE(xhci);
bool enabled;
if (!msix_enabled(pci_dev)) {
return;
}
enabled = xhci->intr[v].iman & IMAN_IE;
if (enabled == xhci->intr[v].msix_used) {
return;
}
if (enabled) {
trace_... | DoS | 0 | static void xhci_msix_update(XHCIState *xhci, int v)
{
PCIDevice *pci_dev = PCI_DEVICE(xhci);
bool enabled;
if (!msix_enabled(pci_dev)) {
return;
}
enabled = xhci->intr[v].iman & IMAN_IE;
if (enabled == xhci->intr[v].msix_used) {
return;
}
if (enabled) {
trace_... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,542 | static uint32_t xhci_nec_challenge(uint32_t hi, uint32_t lo)
{
uint32_t val;
val = rotl(lo - 0x49434878, 32 - ((hi>>8) & 0x1F));
val += rotl(lo + 0x49434878, hi & 0x1F);
val -= rotl(hi ^ 0x49434878, (lo >> 16) & 0x1F);
return ~val;
}
| DoS | 0 | static uint32_t xhci_nec_challenge(uint32_t hi, uint32_t lo)
{
uint32_t val;
val = rotl(lo - 0x49434878, 32 - ((hi>>8) & 0x1F));
val += rotl(lo + 0x49434878, hi & 0x1F);
val -= rotl(hi ^ 0x49434878, (lo >> 16) & 0x1F);
return ~val;
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,543 | static uint64_t xhci_oper_read(void *ptr, hwaddr reg, unsigned size)
{
XHCIState *xhci = ptr;
uint32_t ret;
switch (reg) {
case 0x00: /* USBCMD */
ret = xhci->usbcmd;
break;
case 0x04: /* USBSTS */
ret = xhci->usbsts;
break;
case 0x08: /* PAGESIZE */
ret ... | DoS | 0 | static uint64_t xhci_oper_read(void *ptr, hwaddr reg, unsigned size)
{
XHCIState *xhci = ptr;
uint32_t ret;
switch (reg) {
case 0x00: /* USBCMD */
ret = xhci->usbcmd;
break;
case 0x04: /* USBSTS */
ret = xhci->usbsts;
break;
case 0x08: /* PAGESIZE */
ret ... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,544 | static void xhci_oper_write(void *ptr, hwaddr reg,
uint64_t val, unsigned size)
{
XHCIState *xhci = ptr;
DeviceState *d = DEVICE(ptr);
trace_usb_xhci_oper_write(reg, val);
switch (reg) {
case 0x00: /* USBCMD */
if ((val & USBCMD_RS) && !(xhci->usbcmd & USBCMD_RS... | DoS | 0 | static void xhci_oper_write(void *ptr, hwaddr reg,
uint64_t val, unsigned size)
{
XHCIState *xhci = ptr;
DeviceState *d = DEVICE(ptr);
trace_usb_xhci_oper_write(reg, val);
switch (reg) {
case 0x00: /* USBCMD */
if ((val & USBCMD_RS) && !(xhci->usbcmd & USBCMD_RS... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,545 | static bool xhci_port_have_device(XHCIPort *port)
{
if (!port->uport->dev || !port->uport->dev->attached) {
return false; /* no device present */
}
if (!((1 << port->uport->dev->speed) & port->speedmask)) {
return false; /* speed mismatch */
}
return true;
}
| DoS | 0 | static bool xhci_port_have_device(XHCIPort *port)
{
if (!port->uport->dev || !port->uport->dev->attached) {
return false; /* no device present */
}
if (!((1 << port->uport->dev->speed) & port->speedmask)) {
return false; /* speed mismatch */
}
return true;
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,546 | static void xhci_port_update(XHCIPort *port, int is_detach)
{
uint32_t pls = PLS_RX_DETECT;
port->portsc = PORTSC_PP;
if (!is_detach && xhci_port_have_device(port)) {
port->portsc |= PORTSC_CCS;
switch (port->uport->dev->speed) {
case USB_SPEED_LOW:
port->portsc |= PORTS... | DoS | 0 | static void xhci_port_update(XHCIPort *port, int is_detach)
{
uint32_t pls = PLS_RX_DETECT;
port->portsc = PORTSC_PP;
if (!is_detach && xhci_port_have_device(port)) {
port->portsc |= PORTSC_CCS;
switch (port->uport->dev->speed) {
case USB_SPEED_LOW:
port->portsc |= PORTS... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,547 | static void xhci_port_write(void *ptr, hwaddr reg,
uint64_t val, unsigned size)
{
XHCIPort *port = ptr;
uint32_t portsc, notify;
trace_usb_xhci_port_write(port->portnr, reg, val);
switch (reg) {
case 0x00: /* PORTSC */
/* write-1-to-start bits */
if (val... | DoS | 0 | static void xhci_port_write(void *ptr, hwaddr reg,
uint64_t val, unsigned size)
{
XHCIPort *port = ptr;
uint32_t portsc, notify;
trace_usb_xhci_port_write(port->portnr, reg, val);
switch (reg) {
case 0x00: /* PORTSC */
/* write-1-to-start bits */
if (val... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,548 | static void xhci_register_types(void)
{
type_register_static(&xhci_info);
}
| DoS | 0 | static void xhci_register_types(void)
{
type_register_static(&xhci_info);
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,549 | static void xhci_reset(DeviceState *dev)
{
XHCIState *xhci = XHCI(dev);
int i;
trace_usb_xhci_reset();
if (!(xhci->usbsts & USBSTS_HCH)) {
DPRINTF("xhci: reset while running!\n");
}
xhci->usbcmd = 0;
xhci->usbsts = USBSTS_HCH;
xhci->dnctrl = 0;
xhci->crcr_low = 0;
xhci-... | DoS | 0 | static void xhci_reset(DeviceState *dev)
{
XHCIState *xhci = XHCI(dev);
int i;
trace_usb_xhci_reset();
if (!(xhci->usbsts & USBSTS_HCH)) {
DPRINTF("xhci: reset while running!\n");
}
xhci->usbcmd = 0;
xhci->usbsts = USBSTS_HCH;
xhci->dnctrl = 0;
xhci->crcr_low = 0;
xhci-... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,550 | static TRBCCode xhci_reset_slot(XHCIState *xhci, unsigned int slotid)
{
uint32_t slot_ctx[4];
dma_addr_t octx;
int i;
trace_usb_xhci_slot_reset(slotid);
assert(slotid >= 1 && slotid <= xhci->numslots);
octx = xhci->slots[slotid-1].ctx;
DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", o... | DoS | 0 | static TRBCCode xhci_reset_slot(XHCIState *xhci, unsigned int slotid)
{
uint32_t slot_ctx[4];
dma_addr_t octx;
int i;
trace_usb_xhci_slot_reset(slotid);
assert(slotid >= 1 && slotid <= xhci->numslots);
octx = xhci->slots[slotid-1].ctx;
DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", o... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,551 | static void xhci_reset_streams(XHCIEPContext *epctx)
{
unsigned int i;
for (i = 0; i < epctx->nr_pstreams; i++) {
epctx->pstreams[i].sct = -1;
}
}
| DoS | 0 | static void xhci_reset_streams(XHCIEPContext *epctx)
{
unsigned int i;
for (i = 0; i < epctx->nr_pstreams; i++) {
epctx->pstreams[i].sct = -1;
}
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,552 | static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring)
{
PCIDevice *pci_dev = PCI_DEVICE(xhci);
XHCITRB trb;
int length = 0;
dma_addr_t dequeue = ring->dequeue;
bool ccs = ring->ccs;
/* hack to bundle together the two/three TDs that make a setup transfer */
bool control_td_... | DoS | 0 | static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring)
{
PCIDevice *pci_dev = PCI_DEVICE(xhci);
XHCITRB trb;
int length = 0;
dma_addr_t dequeue = ring->dequeue;
bool ccs = ring->ccs;
/* hack to bundle together the two/three TDs that make a setup transfer */
bool control_td_... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,553 | static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *trb,
dma_addr_t *addr)
{
PCIDevice *pci_dev = PCI_DEVICE(xhci);
uint32_t link_cnt = 0;
while (1) {
TRBType type;
pci_dma_read(pci_dev, ring->dequeue, trb, TRB_SIZE);
trb->addr = r... | DoS | 0 | static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *trb,
dma_addr_t *addr)
{
PCIDevice *pci_dev = PCI_DEVICE(xhci);
uint32_t link_cnt = 0;
while (1) {
TRBType type;
pci_dma_read(pci_dev, ring->dequeue, trb, TRB_SIZE);
trb->addr = r... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,554 | static void xhci_ring_init(XHCIState *xhci, XHCIRing *ring,
dma_addr_t base)
{
ring->dequeue = base;
ring->ccs = 1;
}
| DoS | 0 | static void xhci_ring_init(XHCIState *xhci, XHCIRing *ring,
dma_addr_t base)
{
ring->dequeue = base;
ring->ccs = 1;
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,555 | static inline int xhci_running(XHCIState *xhci)
{
return !(xhci->usbsts & USBSTS_HCH) && !xhci->intr[0].er_full;
}
| DoS | 0 | static inline int xhci_running(XHCIState *xhci)
{
return !(xhci->usbsts & USBSTS_HCH) && !xhci->intr[0].er_full;
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,556 | static void xhci_runtime_write(void *ptr, hwaddr reg,
uint64_t val, unsigned size)
{
XHCIState *xhci = ptr;
int v = (reg - 0x20) / 0x20;
XHCIInterrupter *intr = &xhci->intr[v];
trace_usb_xhci_runtime_write(reg, val);
if (reg < 0x20) {
trace_usb_xhci_unimplemen... | DoS | 0 | static void xhci_runtime_write(void *ptr, hwaddr reg,
uint64_t val, unsigned size)
{
XHCIState *xhci = ptr;
int v = (reg - 0x20) / 0x20;
XHCIInterrupter *intr = &xhci->intr[v];
trace_usb_xhci_runtime_write(reg, val);
if (reg < 0x20) {
trace_usb_xhci_unimplemen... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,557 | static TRBCCode xhci_set_ep_dequeue(XHCIState *xhci, unsigned int slotid,
unsigned int epid, unsigned int streamid,
uint64_t pdequeue)
{
XHCISlot *slot;
XHCIEPContext *epctx;
XHCIStreamContext *sctx;
dma_addr_t dequeue;
assert(... | DoS | 0 | static TRBCCode xhci_set_ep_dequeue(XHCIState *xhci, unsigned int slotid,
unsigned int epid, unsigned int streamid,
uint64_t pdequeue)
{
XHCISlot *slot;
XHCIEPContext *epctx;
XHCIStreamContext *sctx;
dma_addr_t dequeue;
assert(... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,558 | static void xhci_set_ep_state(XHCIState *xhci, XHCIEPContext *epctx,
XHCIStreamContext *sctx, uint32_t state)
{
XHCIRing *ring = NULL;
uint32_t ctx[5];
uint32_t ctx2[2];
xhci_dma_read_u32s(xhci, epctx->pctx, ctx, sizeof(ctx));
ctx[0] &= ~EP_STATE_MASK;
ctx[0] |= st... | DoS | 0 | static void xhci_set_ep_state(XHCIState *xhci, XHCIEPContext *epctx,
XHCIStreamContext *sctx, uint32_t state)
{
XHCIRing *ring = NULL;
uint32_t ctx[5];
uint32_t ctx2[2];
xhci_dma_read_u32s(xhci, epctx->pctx, ctx, sizeof(ctx));
ctx[0] &= ~EP_STATE_MASK;
ctx[0] |= st... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,559 | static int xhci_setup_packet(XHCITransfer *xfer)
{
USBEndpoint *ep;
int dir;
dir = xfer->in_xfer ? USB_TOKEN_IN : USB_TOKEN_OUT;
if (xfer->packet.ep) {
ep = xfer->packet.ep;
} else {
ep = xhci_epid_to_usbep(xfer->epctx);
if (!ep) {
DPRINTF("xhci: slot %d has no ... | DoS | 0 | static int xhci_setup_packet(XHCITransfer *xfer)
{
USBEndpoint *ep;
int dir;
dir = xfer->in_xfer ? USB_TOKEN_IN : USB_TOKEN_OUT;
if (xfer->packet.ep) {
ep = xfer->packet.ep;
} else {
ep = xhci_epid_to_usbep(xfer->epctx);
if (!ep) {
DPRINTF("xhci: slot %d has no ... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,560 | static void xhci_stall_ep(XHCITransfer *xfer)
{
XHCIEPContext *epctx = xfer->epctx;
XHCIState *xhci = epctx->xhci;
uint32_t err;
XHCIStreamContext *sctx;
if (epctx->nr_pstreams) {
sctx = xhci_find_stream(epctx, xfer->streamid, &err);
if (sctx == NULL) {
return;
}... | DoS | 0 | static void xhci_stall_ep(XHCITransfer *xfer)
{
XHCIEPContext *epctx = xfer->epctx;
XHCIState *xhci = epctx->xhci;
uint32_t err;
XHCIStreamContext *sctx;
if (epctx->nr_pstreams) {
sctx = xhci_find_stream(epctx, xfer->streamid, &err);
if (sctx == NULL) {
return;
}... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,561 | static void xhci_stop(XHCIState *xhci)
{
trace_usb_xhci_stop();
xhci->usbsts |= USBSTS_HCH;
xhci->crcr_low &= ~CRCR_CRR;
}
| DoS | 0 | static void xhci_stop(XHCIState *xhci)
{
trace_usb_xhci_stop();
xhci->usbsts |= USBSTS_HCH;
xhci->crcr_low &= ~CRCR_CRR;
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,562 | static int xhci_try_complete_packet(XHCITransfer *xfer)
{
if (xfer->packet.status == USB_RET_ASYNC) {
trace_usb_xhci_xfer_async(xfer);
xfer->running_async = 1;
xfer->running_retry = 0;
xfer->complete = 0;
return 0;
} else if (xfer->packet.status == USB_RET_NAK) {
... | DoS | 0 | static int xhci_try_complete_packet(XHCITransfer *xfer)
{
if (xfer->packet.status == USB_RET_ASYNC) {
trace_usb_xhci_xfer_async(xfer);
xfer->running_async = 1;
xfer->running_retry = 0;
xfer->complete = 0;
return 0;
} else if (xfer->packet.status == USB_RET_NAK) {
... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,563 | static void xhci_via_challenge(XHCIState *xhci, uint64_t addr)
{
PCIDevice *pci_dev = PCI_DEVICE(xhci);
uint32_t buf[8];
uint32_t obuf[8];
dma_addr_t paddr = xhci_mask64(addr);
pci_dma_read(pci_dev, paddr, &buf, 32);
memcpy(obuf, buf, sizeof(obuf));
if ((buf[0] & 0xff) == 2) {
obu... | DoS | 0 | static void xhci_via_challenge(XHCIState *xhci, uint64_t addr)
{
PCIDevice *pci_dev = PCI_DEVICE(xhci);
uint32_t buf[8];
uint32_t obuf[8];
dma_addr_t paddr = xhci_mask64(addr);
pci_dma_read(pci_dev, paddr, &buf, 32);
memcpy(obuf, buf, sizeof(obuf));
if ((buf[0] & 0xff) == 2) {
obu... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,564 | static void xhci_wakeup(USBPort *usbport)
{
XHCIState *xhci = usbport->opaque;
XHCIPort *port = xhci_lookup_port(xhci, usbport);
if (get_field(port->portsc, PORTSC_PLS) != PLS_U3) {
return;
}
set_field(&port->portsc, PLS_RESUME, PORTSC_PLS);
xhci_port_notify(port, PORTSC_PLC);
}
| DoS | 0 | static void xhci_wakeup(USBPort *usbport)
{
XHCIState *xhci = usbport->opaque;
XHCIPort *port = xhci_lookup_port(xhci, usbport);
if (get_field(port->portsc, PORTSC_PLS) != PLS_U3) {
return;
}
set_field(&port->portsc, PLS_RESUME, PORTSC_PLS);
xhci_port_notify(port, PORTSC_PLC);
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,565 | static void xhci_wakeup_endpoint(USBBus *bus, USBEndpoint *ep,
unsigned int stream)
{
XHCIState *xhci = container_of(bus, XHCIState, bus);
int slotid;
DPRINTF("%s\n", __func__);
slotid = ep->dev->addr;
if (slotid == 0 || !xhci->slots[slotid-1].enabled) {
DPR... | DoS | 0 | static void xhci_wakeup_endpoint(USBBus *bus, USBEndpoint *ep,
unsigned int stream)
{
XHCIState *xhci = container_of(bus, XHCIState, bus);
int slotid;
DPRINTF("%s\n", __func__);
slotid = ep->dev->addr;
if (slotid == 0 || !xhci->slots[slotid-1].enabled) {
DPR... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,566 | static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v)
{
PCIDevice *pci_dev = PCI_DEVICE(xhci);
XHCIInterrupter *intr = &xhci->intr[v];
XHCITRB ev_trb;
dma_addr_t addr;
ev_trb.parameter = cpu_to_le64(event->ptr);
ev_trb.status = cpu_to_le32(event->length | (event->ccode << 24));... | DoS | 0 | static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v)
{
PCIDevice *pci_dev = PCI_DEVICE(xhci);
XHCIInterrupter *intr = &xhci->intr[v];
XHCITRB ev_trb;
dma_addr_t addr;
ev_trb.parameter = cpu_to_le64(event->ptr);
ev_trb.status = cpu_to_le32(event->length | (event->ccode << 24));... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,567 | static void xhci_xfer_report(XHCITransfer *xfer)
{
uint32_t edtla = 0;
unsigned int left;
bool reported = 0;
bool shortpkt = 0;
XHCIEvent event = {ER_TRANSFER, CC_SUCCESS};
XHCIState *xhci = xfer->epctx->xhci;
int i;
left = xfer->packet.actual_length;
for (i = 0; i < xfer->trb_coun... | DoS | 0 | static void xhci_xfer_report(XHCITransfer *xfer)
{
uint32_t edtla = 0;
unsigned int left;
bool reported = 0;
bool shortpkt = 0;
XHCIEvent event = {ER_TRANSFER, CC_SUCCESS};
XHCIState *xhci = xfer->epctx->xhci;
int i;
left = xfer->packet.actual_length;
for (i = 0; i < xfer->trb_coun... | @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,568 | static void xhci_xfer_unmap(XHCITransfer *xfer)
{
usb_packet_unmap(&xfer->packet, &xfer->sgl);
qemu_sglist_destroy(&xfer->sgl);
}
| DoS | 0 | static void xhci_xfer_unmap(XHCITransfer *xfer)
{
usb_packet_unmap(&xfer->packet, &xfer->sgl);
qemu_sglist_destroy(&xfer->sgl);
}
| @@ -390,6 +390,7 @@ struct XHCIEPContext {
dma_addr_t pctx;
unsigned int max_psize;
uint32_t state;
+ uint32_t kick_active;
/* streams */
unsigned int max_pstreams;
@@ -2131,6 +2132,9 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
return;
}
+ if (epctx... | CWE-835 | null | null |
4,569 | static void usb_ehci_pci_init(Object *obj)
{
DeviceClass *dc = OBJECT_GET_CLASS(DeviceClass, obj, TYPE_DEVICE);
EHCIPCIState *i = PCI_EHCI(obj);
EHCIState *s = &i->ehci;
s->caps[0x09] = 0x68; /* EECP */
s->capsbase = 0x00;
s->opregbase = 0x20;
s->portscbase = 0x44;
s->portnr = N... | DoS | 0 | static void usb_ehci_pci_init(Object *obj)
{
DeviceClass *dc = OBJECT_GET_CLASS(DeviceClass, obj, TYPE_DEVICE);
EHCIPCIState *i = PCI_EHCI(obj);
EHCIState *s = &i->ehci;
s->caps[0x09] = 0x68; /* EECP */
s->capsbase = 0x00;
s->opregbase = 0x20;
s->portscbase = 0x44;
s->portnr = N... | @@ -89,6 +89,14 @@ static void usb_ehci_pci_init(Object *obj)
usb_ehci_init(s, DEVICE(obj));
}
+static void usb_ehci_pci_finalize(Object *obj)
+{
+ EHCIPCIState *i = PCI_EHCI(obj);
+ EHCIState *s = &i->ehci;
+
+ usb_ehci_finalize(s);
+}
+
static void usb_ehci_pci_exit(PCIDevice *dev)
{
EHCIPCISt... | CWE-772 | null | null |
4,570 | static void usb_ehci_pci_realize(PCIDevice *dev, Error **errp)
{
EHCIPCIState *i = PCI_EHCI(dev);
EHCIState *s = &i->ehci;
uint8_t *pci_conf = dev->config;
pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20);
/* capabilities pointer */
pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00);
/* pci_s... | DoS | 0 | static void usb_ehci_pci_realize(PCIDevice *dev, Error **errp)
{
EHCIPCIState *i = PCI_EHCI(dev);
EHCIState *s = &i->ehci;
uint8_t *pci_conf = dev->config;
pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20);
/* capabilities pointer */
pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00);
/* pci_s... | @@ -89,6 +89,14 @@ static void usb_ehci_pci_init(Object *obj)
usb_ehci_init(s, DEVICE(obj));
}
+static void usb_ehci_pci_finalize(Object *obj)
+{
+ EHCIPCIState *i = PCI_EHCI(obj);
+ EHCIState *s = &i->ehci;
+
+ usb_ehci_finalize(s);
+}
+
static void usb_ehci_pci_exit(PCIDevice *dev)
{
EHCIPCISt... | CWE-772 | null | null |
4,571 | static void ehci_advance_async_state(EHCIState *ehci)
{
const int async = 1;
switch(ehci_get_state(ehci, async)) {
case EST_INACTIVE:
if (!ehci_async_enabled(ehci)) {
break;
}
ehci_set_state(ehci, async, EST_ACTIVE);
case EST_ACTIVE:
if (!ehci_async_enabled(... | DoS | 0 | static void ehci_advance_async_state(EHCIState *ehci)
{
const int async = 1;
switch(ehci_get_state(ehci, async)) {
case EST_INACTIVE:
if (!ehci_async_enabled(ehci)) {
break;
}
ehci_set_state(ehci, async, EST_ACTIVE);
case EST_ACTIVE:
if (!ehci_async_enabled(... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,572 | static void ehci_advance_periodic_state(EHCIState *ehci)
{
uint32_t entry;
uint32_t list;
const int async = 0;
switch(ehci_get_state(ehci, async)) {
case EST_INACTIVE:
if (!(ehci->frindex & 7) && ehci_periodic_enabled(ehci)) {
ehci_set_state(ehci, async, EST_ACTIVE);
} ... | DoS | 0 | static void ehci_advance_periodic_state(EHCIState *ehci)
{
uint32_t entry;
uint32_t list;
const int async = 0;
switch(ehci_get_state(ehci, async)) {
case EST_INACTIVE:
if (!(ehci->frindex & 7) && ehci_periodic_enabled(ehci)) {
ehci_set_state(ehci, async, EST_ACTIVE);
} ... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,573 | static EHCIQueue *ehci_alloc_queue(EHCIState *ehci, uint32_t addr, int async)
{
EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues;
EHCIQueue *q;
q = g_malloc0(sizeof(*q));
q->ehci = ehci;
q->qhaddr = addr;
q->async = async;
QTAILQ_INIT(&q->packets);
QTAILQ_INSERT_HEAD(head, ... | DoS | 0 | static EHCIQueue *ehci_alloc_queue(EHCIState *ehci, uint32_t addr, int async)
{
EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues;
EHCIQueue *q;
q = g_malloc0(sizeof(*q));
q->ehci = ehci;
q->qhaddr = addr;
q->async = async;
QTAILQ_INIT(&q->packets);
QTAILQ_INSERT_HEAD(head, ... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,574 | static inline bool ehci_async_enabled(EHCIState *s)
{
return ehci_enabled(s) && (s->usbcmd & USBCMD_ASE);
}
| DoS | 0 | static inline bool ehci_async_enabled(EHCIState *s)
{
return ehci_enabled(s) && (s->usbcmd & USBCMD_ASE);
}
| @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,575 | static void ehci_attach(USBPort *port)
{
EHCIState *s = port->opaque;
uint32_t *portsc = &s->portsc[port->index];
const char *owner = (*portsc & PORTSC_POWNER) ? "comp" : "ehci";
trace_usb_ehci_port_attach(port->index, owner, port->dev->product_desc);
if (*portsc & PORTSC_POWNER) {
USBPort... | DoS | 0 | static void ehci_attach(USBPort *port)
{
EHCIState *s = port->opaque;
uint32_t *portsc = &s->portsc[port->index];
const char *owner = (*portsc & PORTSC_POWNER) ? "comp" : "ehci";
trace_usb_ehci_port_attach(port->index, owner, port->dev->product_desc);
if (*portsc & PORTSC_POWNER) {
USBPort... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,576 | static inline void ehci_clear_usbsts(EHCIState *s, int mask)
{
if ((s->usbsts & mask) == 0) {
return;
}
ehci_trace_usbsts(mask, 0);
s->usbsts &= ~mask;
}
| DoS | 0 | static inline void ehci_clear_usbsts(EHCIState *s, int mask)
{
if ((s->usbsts & mask) == 0) {
return;
}
ehci_trace_usbsts(mask, 0);
s->usbsts &= ~mask;
}
| @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,577 | static void ehci_detach(USBPort *port)
{
EHCIState *s = port->opaque;
uint32_t *portsc = &s->portsc[port->index];
const char *owner = (*portsc & PORTSC_POWNER) ? "comp" : "ehci";
trace_usb_ehci_port_detach(port->index, owner);
if (*portsc & PORTSC_POWNER) {
USBPort *companion = s->companio... | DoS | 0 | static void ehci_detach(USBPort *port)
{
EHCIState *s = port->opaque;
uint32_t *portsc = &s->portsc[port->index];
const char *owner = (*portsc & PORTSC_POWNER) ? "comp" : "ehci";
trace_usb_ehci_port_detach(port->index, owner);
if (*portsc & PORTSC_POWNER) {
USBPort *companion = s->companio... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,578 | static inline bool ehci_enabled(EHCIState *s)
{
return s->usbcmd & USBCMD_RUNSTOP;
}
| DoS | 0 | static inline bool ehci_enabled(EHCIState *s)
{
return s->usbcmd & USBCMD_RUNSTOP;
}
| @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,579 | static int ehci_execute(EHCIPacket *p, const char *action)
{
USBEndpoint *ep;
int endp;
bool spd;
assert(p->async == EHCI_ASYNC_NONE ||
p->async == EHCI_ASYNC_INITIALIZED);
if (!(p->qtd.token & QTD_TOKEN_ACTIVE)) {
fprintf(stderr, "Attempting to execute inactive qtd\n");
... | DoS | 0 | static int ehci_execute(EHCIPacket *p, const char *action)
{
USBEndpoint *ep;
int endp;
bool spd;
assert(p->async == EHCI_ASYNC_NONE ||
p->async == EHCI_ASYNC_INITIALIZED);
if (!(p->qtd.token & QTD_TOKEN_ACTIVE)) {
fprintf(stderr, "Attempting to execute inactive qtd\n");
... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,580 | static void ehci_execute_complete(EHCIQueue *q)
{
EHCIPacket *p = QTAILQ_FIRST(&q->packets);
uint32_t tbytes;
assert(p != NULL);
assert(p->qtdaddr == q->qtdaddr);
assert(p->async == EHCI_ASYNC_INITIALIZED ||
p->async == EHCI_ASYNC_FINISHED);
DPRINTF("execute_complete: qhaddr 0x%x, n... | DoS | 0 | static void ehci_execute_complete(EHCIQueue *q)
{
EHCIPacket *p = QTAILQ_FIRST(&q->packets);
uint32_t tbytes;
assert(p != NULL);
assert(p->qtdaddr == q->qtdaddr);
assert(p->async == EHCI_ASYNC_INITIALIZED ||
p->async == EHCI_ASYNC_FINISHED);
DPRINTF("execute_complete: qhaddr 0x%x, n... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,581 | static int ehci_fill_queue(EHCIPacket *p)
{
USBEndpoint *ep = p->packet.ep;
EHCIQueue *q = p->queue;
EHCIqtd qtd = p->qtd;
uint32_t qtdaddr;
for (;;) {
if (NLPTR_TBIT(qtd.next) != 0) {
break;
}
qtdaddr = qtd.next;
/*
* Detect circular td lists, W... | DoS | 0 | static int ehci_fill_queue(EHCIPacket *p)
{
USBEndpoint *ep = p->packet.ep;
EHCIQueue *q = p->queue;
EHCIqtd qtd = p->qtd;
uint32_t qtdaddr;
for (;;) {
if (NLPTR_TBIT(qtd.next) != 0) {
break;
}
qtdaddr = qtd.next;
/*
* Detect circular td lists, W... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,582 | static USBDevice *ehci_find_device(EHCIState *ehci, uint8_t addr)
{
USBDevice *dev;
USBPort *port;
int i;
for (i = 0; i < NB_PORTS; i++) {
port = &ehci->ports[i];
if (!(ehci->portsc[i] & PORTSC_PED)) {
DPRINTF("Port %d not enabled\n", i);
continue;
}
... | DoS | 0 | static USBDevice *ehci_find_device(EHCIState *ehci, uint8_t addr)
{
USBDevice *dev;
USBPort *port;
int i;
for (i = 0; i < NB_PORTS; i++) {
port = &ehci->ports[i];
if (!(ehci->portsc[i] & PORTSC_PED)) {
DPRINTF("Port %d not enabled\n", i);
continue;
}
... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,583 | static void ehci_finish_transfer(EHCIQueue *q, int len)
{
uint32_t cpage, offset;
if (len > 0) {
/* update cpage & offset */
cpage = get_field(q->qh.token, QTD_TOKEN_CPAGE);
offset = q->qh.bufptr[0] & ~QTD_BUFPTR_MASK;
offset += len;
cpage += offset >> QTD_BUFPTR_SH;
... | DoS | 0 | static void ehci_finish_transfer(EHCIQueue *q, int len)
{
uint32_t cpage, offset;
if (len > 0) {
/* update cpage & offset */
cpage = get_field(q->qh.token, QTD_TOKEN_CPAGE);
offset = q->qh.bufptr[0] & ~QTD_BUFPTR_MASK;
offset += len;
cpage += offset >> QTD_BUFPTR_SH;
... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,584 | static void ehci_flush_qh(EHCIQueue *q)
{
uint32_t *qh = (uint32_t *) &q->qh;
uint32_t dwords = sizeof(EHCIqh) >> 2;
uint32_t addr = NLPTR_GET(q->qhaddr);
put_dwords(q->ehci, addr + 3 * sizeof(uint32_t), qh + 3, dwords - 3);
}
| DoS | 0 | static void ehci_flush_qh(EHCIQueue *q)
{
uint32_t *qh = (uint32_t *) &q->qh;
uint32_t dwords = sizeof(EHCIqh) >> 2;
uint32_t addr = NLPTR_GET(q->qhaddr);
put_dwords(q->ehci, addr + 3 * sizeof(uint32_t), qh + 3, dwords - 3);
}
| @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,585 | static void ehci_frame_timer(void *opaque)
{
EHCIState *ehci = opaque;
int need_timer = 0;
int64_t expire_time, t_now;
uint64_t ns_elapsed;
int uframes, skipped_uframes;
int i;
t_now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
ns_elapsed = t_now - ehci->last_run_ns;
uframes = ns_elapse... | DoS | 0 | static void ehci_frame_timer(void *opaque)
{
EHCIState *ehci = opaque;
int need_timer = 0;
int64_t expire_time, t_now;
uint64_t ns_elapsed;
int uframes, skipped_uframes;
int i;
t_now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
ns_elapsed = t_now - ehci->last_run_ns;
uframes = ns_elapse... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,586 | static void ehci_free_packet(EHCIPacket *p)
{
if (p->async == EHCI_ASYNC_FINISHED &&
!(p->queue->qh.token & QTD_TOKEN_HALT)) {
ehci_writeback_async_complete_packet(p);
return;
}
trace_usb_ehci_packet_action(p->queue, p, "free");
if (p->async == EHCI_ASYNC_INFLIGHT) {
... | DoS | 0 | static void ehci_free_packet(EHCIPacket *p)
{
if (p->async == EHCI_ASYNC_FINISHED &&
!(p->queue->qh.token & QTD_TOKEN_HALT)) {
ehci_writeback_async_complete_packet(p);
return;
}
trace_usb_ehci_packet_action(p->queue, p, "free");
if (p->async == EHCI_ASYNC_INFLIGHT) {
... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,587 | static void ehci_free_queue(EHCIQueue *q, const char *warn)
{
EHCIQueueHead *head = q->async ? &q->ehci->aqueues : &q->ehci->pqueues;
int cancelled;
trace_usb_ehci_queue_action(q, "free");
cancelled = ehci_cancel_queue(q);
if (warn && cancelled > 0) {
ehci_trace_guest_bug(q->ehci, warn);
... | DoS | 0 | static void ehci_free_queue(EHCIQueue *q, const char *warn)
{
EHCIQueueHead *head = q->async ? &q->ehci->aqueues : &q->ehci->pqueues;
int cancelled;
trace_usb_ehci_queue_action(q, "free");
cancelled = ehci_cancel_queue(q);
if (warn && cancelled > 0) {
ehci_trace_guest_bug(q->ehci, warn);
... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,588 | static int ehci_get_fetch_addr(EHCIState *s, int async)
{
return async ? s->a_fetch_addr : s->p_fetch_addr;
}
| DoS | 0 | static int ehci_get_fetch_addr(EHCIState *s, int async)
{
return async ? s->a_fetch_addr : s->p_fetch_addr;
}
| @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,589 | static int ehci_get_pid(EHCIqtd *qtd)
{
switch (get_field(qtd->token, QTD_TOKEN_PID)) {
case 0:
return USB_TOKEN_OUT;
case 1:
return USB_TOKEN_IN;
case 2:
return USB_TOKEN_SETUP;
default:
fprintf(stderr, "bad token\n");
return 0;
}
}
| DoS | 0 | static int ehci_get_pid(EHCIqtd *qtd)
{
switch (get_field(qtd->token, QTD_TOKEN_PID)) {
case 0:
return USB_TOKEN_OUT;
case 1:
return USB_TOKEN_IN;
case 2:
return USB_TOKEN_SETUP;
default:
fprintf(stderr, "bad token\n");
return 0;
}
}
| @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,590 | static int ehci_init_transfer(EHCIPacket *p)
{
uint32_t cpage, offset, bytes, plen;
dma_addr_t page;
cpage = get_field(p->qtd.token, QTD_TOKEN_CPAGE);
bytes = get_field(p->qtd.token, QTD_TOKEN_TBYTES);
offset = p->qtd.bufptr[0] & ~QTD_BUFPTR_MASK;
qemu_sglist_init(&p->sgl, p->queue->ehci->dev... | DoS | 0 | static int ehci_init_transfer(EHCIPacket *p)
{
uint32_t cpage, offset, bytes, plen;
dma_addr_t page;
cpage = get_field(p->qtd.token, QTD_TOKEN_CPAGE);
bytes = get_field(p->qtd.token, QTD_TOKEN_TBYTES);
offset = p->qtd.bufptr[0] & ~QTD_BUFPTR_MASK;
qemu_sglist_init(&p->sgl, p->queue->ehci->dev... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,591 | static uint64_t ehci_opreg_read(void *ptr, hwaddr addr,
unsigned size)
{
EHCIState *s = ptr;
uint32_t val;
switch (addr) {
case FRINDEX:
/* Round down to mult of 8, else it can go backwards on migration */
val = s->frindex & ~7;
break;
default... | DoS | 0 | static uint64_t ehci_opreg_read(void *ptr, hwaddr addr,
unsigned size)
{
EHCIState *s = ptr;
uint32_t val;
switch (addr) {
case FRINDEX:
/* Round down to mult of 8, else it can go backwards on migration */
val = s->frindex & ~7;
break;
default... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,592 | static void ehci_opreg_write(void *ptr, hwaddr addr,
uint64_t val, unsigned size)
{
EHCIState *s = ptr;
uint32_t *mmio = s->opreg + (addr >> 2);
uint32_t old = *mmio;
int i;
trace_usb_ehci_opreg_write(addr + s->opregbase, addr2str(addr), val);
switch (addr) {
c... | DoS | 0 | static void ehci_opreg_write(void *ptr, hwaddr addr,
uint64_t val, unsigned size)
{
EHCIState *s = ptr;
uint32_t *mmio = s->opreg + (addr >> 2);
uint32_t old = *mmio;
int i;
trace_usb_ehci_opreg_write(addr + s->opregbase, addr2str(addr), val);
switch (addr) {
c... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,593 | static void ehci_port_write(void *ptr, hwaddr addr,
uint64_t val, unsigned size)
{
EHCIState *s = ptr;
int port = addr >> 2;
uint32_t *portsc = &s->portsc[port];
uint32_t old = *portsc;
USBDevice *dev = s->ports[port].dev;
trace_usb_ehci_portsc_write(addr + s->portsc... | DoS | 0 | static void ehci_port_write(void *ptr, hwaddr addr,
uint64_t val, unsigned size)
{
EHCIState *s = ptr;
int port = addr >> 2;
uint32_t *portsc = &s->portsc[port];
uint32_t old = *portsc;
USBDevice *dev = s->ports[port].dev;
trace_usb_ehci_portsc_write(addr + s->portsc... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,594 | static int ehci_process_itd(EHCIState *ehci,
EHCIitd *itd,
uint32_t addr)
{
USBDevice *dev;
USBEndpoint *ep;
uint32_t i, len, pid, dir, devaddr, endp;
uint32_t pg, off, ptr1, ptr2, max, mult;
ehci->periodic_sched_active = PERIODIC_ACTIVE;
... | DoS | 0 | static int ehci_process_itd(EHCIState *ehci,
EHCIitd *itd,
uint32_t addr)
{
USBDevice *dev;
USBEndpoint *ep;
uint32_t i, len, pid, dir, devaddr, endp;
uint32_t pg, off, ptr1, ptr2, max, mult;
ehci->periodic_sched_active = PERIODIC_ACTIVE;
... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,595 | static int ehci_qh_do_overlay(EHCIQueue *q)
{
EHCIPacket *p = QTAILQ_FIRST(&q->packets);
int i;
int dtoggle;
int ping;
int eps;
int reload;
assert(p != NULL);
assert(p->qtdaddr == q->qtdaddr);
dtoggle = q->qh.token & QTD_TOKEN_DTOGGLE;
ping = q->qh.token & QTD_TOKEN_PING;
... | DoS | 0 | static int ehci_qh_do_overlay(EHCIQueue *q)
{
EHCIPacket *p = QTAILQ_FIRST(&q->packets);
int i;
int dtoggle;
int ping;
int eps;
int reload;
assert(p != NULL);
assert(p->qtdaddr == q->qtdaddr);
dtoggle = q->qh.token & QTD_TOKEN_DTOGGLE;
ping = q->qh.token & QTD_TOKEN_PING;
... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,596 | static void ehci_queues_rip_all(EHCIState *ehci, int async)
{
EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues;
const char *warn = async ? "guest stopped busy async schedule" : NULL;
EHCIQueue *q, *tmp;
QTAILQ_FOREACH_SAFE(q, head, next, tmp) {
ehci_free_queue(q, warn);
}
}
| DoS | 0 | static void ehci_queues_rip_all(EHCIState *ehci, int async)
{
EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues;
const char *warn = async ? "guest stopped busy async schedule" : NULL;
EHCIQueue *q, *tmp;
QTAILQ_FOREACH_SAFE(q, head, next, tmp) {
ehci_free_queue(q, warn);
}
}
| @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,597 | static void ehci_queues_rip_device(EHCIState *ehci, USBDevice *dev, int async)
{
EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues;
EHCIQueue *q, *tmp;
QTAILQ_FOREACH_SAFE(q, head, next, tmp) {
if (q->dev != dev) {
continue;
}
ehci_free_queue(q, NULL);
}
... | DoS | 0 | static void ehci_queues_rip_device(EHCIState *ehci, USBDevice *dev, int async)
{
EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues;
EHCIQueue *q, *tmp;
QTAILQ_FOREACH_SAFE(q, head, next, tmp) {
if (q->dev != dev) {
continue;
}
ehci_free_queue(q, NULL);
}
... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,598 | static void ehci_queues_rip_unseen(EHCIState *ehci, int async)
{
EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues;
EHCIQueue *q, *tmp;
QTAILQ_FOREACH_SAFE(q, head, next, tmp) {
if (!q->seen) {
ehci_free_queue(q, NULL);
}
}
}
| DoS | 0 | static void ehci_queues_rip_unseen(EHCIState *ehci, int async)
{
EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues;
EHCIQueue *q, *tmp;
QTAILQ_FOREACH_SAFE(q, head, next, tmp) {
if (!q->seen) {
ehci_free_queue(q, NULL);
}
}
}
| @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
4,599 | static void ehci_queues_rip_unused(EHCIState *ehci, int async)
{
EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues;
const char *warn = async ? "guest unlinked busy QH" : NULL;
uint64_t maxage = FRAME_TIMER_NS * ehci->maxframes * 4;
EHCIQueue *q, *tmp;
QTAILQ_FOREACH_SAFE(q, head, next, ... | DoS | 0 | static void ehci_queues_rip_unused(EHCIState *ehci, int async)
{
EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues;
const char *warn = async ? "guest unlinked busy QH" : NULL;
uint64_t maxage = FRAME_TIMER_NS * ehci->maxframes * 4;
EHCIQueue *q, *tmp;
QTAILQ_FOREACH_SAFE(q, head, next, ... | @@ -2545,6 +2545,11 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
&s->mem_ports);
}
+void usb_ehci_finalize(EHCIState *s)
+{
+ usb_packet_cleanup(&s->ipacket);
+}
+
/*
* vim: expandtab ts=4
*/ | CWE-772 | null | null |
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