idx
int64
func_before
string
Vulnerability Classification
string
vul
int64
func_after
string
patch
string
CWE ID
string
lines_before
string
lines_after
string
7,200
static bool vmxnet3_mc_list_needed(void *opaque) { return true; }
+Info
0
static bool vmxnet3_mc_list_needed(void *opaque) { return true; }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,201
static int vmxnet3_mcast_list_pre_load(void *opaque) { VMXNET3State *s = opaque; s->mcast_list = g_malloc(s->mcast_list_buff_size); return 0; }
+Info
0
static int vmxnet3_mcast_list_pre_load(void *opaque) { VMXNET3State *s = opaque; s->mcast_list = g_malloc(s->mcast_list_buff_size); return 0; }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,202
vmxnet3_msix_load(QEMUFile *f, void *opaque, int version_id) { PCIDevice *d = PCI_DEVICE(opaque); msix_load(d, f); return 0; }
+Info
0
vmxnet3_msix_load(QEMUFile *f, void *opaque, int version_id) { PCIDevice *d = PCI_DEVICE(opaque); msix_load(d, f); return 0; }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,203
vmxnet3_msix_save(QEMUFile *f, void *opaque) { PCIDevice *d = PCI_DEVICE(opaque); msix_save(d, f); }
+Info
0
vmxnet3_msix_save(QEMUFile *f, void *opaque) { PCIDevice *d = PCI_DEVICE(opaque); msix_save(d, f); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,204
static void vmxnet3_net_init(VMXNET3State *s) { DeviceState *d = DEVICE(s); VMW_CBPRN("vmxnet3_net_init called..."); qemu_macaddr_default_if_unset(&s->conf.macaddr); /* Windows guest will query the address that was set on init */ memcpy(&s->perm_mac.a, &s->conf.macaddr.a, sizeof(s->perm_mac.a)); s->mcast_list = NULL; s->mcast_list_len = 0; s->link_status_and_speed = VMXNET3_LINK_SPEED | VMXNET3_LINK_STATUS_UP; VMW_CFPRN("Permanent MAC: " MAC_FMT, MAC_ARG(s->perm_mac.a)); s->nic = qemu_new_nic(&net_vmxnet3_info, &s->conf, object_get_typename(OBJECT(s)), d->id, s); s->peer_has_vhdr = vmxnet3_peer_has_vnet_hdr(s); s->tx_sop = true; s->skip_current_tx_pkt = false; s->tx_pkt = NULL; s->rx_pkt = NULL; s->rx_vlan_stripping = false; s->lro_supported = false; if (s->peer_has_vhdr) { qemu_set_vnet_hdr_len(qemu_get_queue(s->nic)->peer, sizeof(struct virtio_net_hdr)); qemu_using_vnet_hdr(qemu_get_queue(s->nic)->peer, 1); } qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a); }
+Info
0
static void vmxnet3_net_init(VMXNET3State *s) { DeviceState *d = DEVICE(s); VMW_CBPRN("vmxnet3_net_init called..."); qemu_macaddr_default_if_unset(&s->conf.macaddr); /* Windows guest will query the address that was set on init */ memcpy(&s->perm_mac.a, &s->conf.macaddr.a, sizeof(s->perm_mac.a)); s->mcast_list = NULL; s->mcast_list_len = 0; s->link_status_and_speed = VMXNET3_LINK_SPEED | VMXNET3_LINK_STATUS_UP; VMW_CFPRN("Permanent MAC: " MAC_FMT, MAC_ARG(s->perm_mac.a)); s->nic = qemu_new_nic(&net_vmxnet3_info, &s->conf, object_get_typename(OBJECT(s)), d->id, s); s->peer_has_vhdr = vmxnet3_peer_has_vnet_hdr(s); s->tx_sop = true; s->skip_current_tx_pkt = false; s->tx_pkt = NULL; s->rx_pkt = NULL; s->rx_vlan_stripping = false; s->lro_supported = false; if (s->peer_has_vhdr) { qemu_set_vnet_hdr_len(qemu_get_queue(s->nic)->peer, sizeof(struct virtio_net_hdr)); qemu_using_vnet_hdr(qemu_get_queue(s->nic)->peer, 1); } qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,205
vmxnet3_on_interrupt_mask_changed(VMXNET3State *s, int lidx, bool is_masked) { s->interrupt_states[lidx].is_masked = is_masked; vmxnet3_update_interrupt_line_state(s, lidx); }
+Info
0
vmxnet3_on_interrupt_mask_changed(VMXNET3State *s, int lidx, bool is_masked) { s->interrupt_states[lidx].is_masked = is_masked; vmxnet3_update_interrupt_line_state(s, lidx); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,206
vmxnet3_on_rx_done_update_stats(VMXNET3State *s, int qidx, Vmxnet3PktStatus status) { struct UPT1_RxStats *stats = &s->rxq_descr[qidx].rxq_stats; size_t tot_len = net_rx_pkt_get_total_len(s->rx_pkt); switch (status) { case VMXNET3_PKT_STATUS_OUT_OF_BUF: stats->pktsRxOutOfBuf++; break; case VMXNET3_PKT_STATUS_ERROR: stats->pktsRxError++; break; case VMXNET3_PKT_STATUS_OK: switch (net_rx_pkt_get_packet_type(s->rx_pkt)) { case ETH_PKT_BCAST: stats->bcastPktsRxOK++; stats->bcastBytesRxOK += tot_len; break; case ETH_PKT_MCAST: stats->mcastPktsRxOK++; stats->mcastBytesRxOK += tot_len; break; case ETH_PKT_UCAST: stats->ucastPktsRxOK++; stats->ucastBytesRxOK += tot_len; break; default: g_assert_not_reached(); } if (tot_len > s->mtu) { stats->LROPktsRxOK++; stats->LROBytesRxOK += tot_len; } break; default: g_assert_not_reached(); } }
+Info
0
vmxnet3_on_rx_done_update_stats(VMXNET3State *s, int qidx, Vmxnet3PktStatus status) { struct UPT1_RxStats *stats = &s->rxq_descr[qidx].rxq_stats; size_t tot_len = net_rx_pkt_get_total_len(s->rx_pkt); switch (status) { case VMXNET3_PKT_STATUS_OUT_OF_BUF: stats->pktsRxOutOfBuf++; break; case VMXNET3_PKT_STATUS_ERROR: stats->pktsRxError++; break; case VMXNET3_PKT_STATUS_OK: switch (net_rx_pkt_get_packet_type(s->rx_pkt)) { case ETH_PKT_BCAST: stats->bcastPktsRxOK++; stats->bcastBytesRxOK += tot_len; break; case ETH_PKT_MCAST: stats->mcastPktsRxOK++; stats->mcastBytesRxOK += tot_len; break; case ETH_PKT_UCAST: stats->ucastPktsRxOK++; stats->ucastBytesRxOK += tot_len; break; default: g_assert_not_reached(); } if (tot_len > s->mtu) { stats->LROPktsRxOK++; stats->LROBytesRxOK += tot_len; } break; default: g_assert_not_reached(); } }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,207
vmxnet3_on_tx_done_update_stats(VMXNET3State *s, int qidx, Vmxnet3PktStatus status) { size_t tot_len = net_tx_pkt_get_total_len(s->tx_pkt); struct UPT1_TxStats *stats = &s->txq_descr[qidx].txq_stats; switch (status) { case VMXNET3_PKT_STATUS_OK: switch (net_tx_pkt_get_packet_type(s->tx_pkt)) { case ETH_PKT_BCAST: stats->bcastPktsTxOK++; stats->bcastBytesTxOK += tot_len; break; case ETH_PKT_MCAST: stats->mcastPktsTxOK++; stats->mcastBytesTxOK += tot_len; break; case ETH_PKT_UCAST: stats->ucastPktsTxOK++; stats->ucastBytesTxOK += tot_len; break; default: g_assert_not_reached(); } if (s->offload_mode == VMXNET3_OM_TSO) { /* * According to VMWARE headers this statistic is a number * of packets after segmentation but since we don't have * this information in QEMU model, the best we can do is to * provide number of non-segmented packets */ stats->TSOPktsTxOK++; stats->TSOBytesTxOK += tot_len; } break; case VMXNET3_PKT_STATUS_DISCARD: stats->pktsTxDiscard++; break; case VMXNET3_PKT_STATUS_ERROR: stats->pktsTxError++; break; default: g_assert_not_reached(); } }
+Info
0
vmxnet3_on_tx_done_update_stats(VMXNET3State *s, int qidx, Vmxnet3PktStatus status) { size_t tot_len = net_tx_pkt_get_total_len(s->tx_pkt); struct UPT1_TxStats *stats = &s->txq_descr[qidx].txq_stats; switch (status) { case VMXNET3_PKT_STATUS_OK: switch (net_tx_pkt_get_packet_type(s->tx_pkt)) { case ETH_PKT_BCAST: stats->bcastPktsTxOK++; stats->bcastBytesTxOK += tot_len; break; case ETH_PKT_MCAST: stats->mcastPktsTxOK++; stats->mcastBytesTxOK += tot_len; break; case ETH_PKT_UCAST: stats->ucastPktsTxOK++; stats->ucastBytesTxOK += tot_len; break; default: g_assert_not_reached(); } if (s->offload_mode == VMXNET3_OM_TSO) { /* * According to VMWARE headers this statistic is a number * of packets after segmentation but since we don't have * this information in QEMU model, the best we can do is to * provide number of non-segmented packets */ stats->TSOPktsTxOK++; stats->TSOBytesTxOK += tot_len; } break; case VMXNET3_PKT_STATUS_DISCARD: stats->pktsTxDiscard++; break; case VMXNET3_PKT_STATUS_ERROR: stats->pktsTxError++; break; default: g_assert_not_reached(); } }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,208
static void vmxnet3_pci_realize(PCIDevice *pci_dev, Error **errp) { DeviceState *dev = DEVICE(pci_dev); VMXNET3State *s = VMXNET3(pci_dev); int ret; VMW_CBPRN("Starting init..."); memory_region_init_io(&s->bar0, OBJECT(s), &b0_ops, s, "vmxnet3-b0", VMXNET3_PT_REG_SIZE); pci_register_bar(pci_dev, VMXNET3_BAR0_IDX, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar0); memory_region_init_io(&s->bar1, OBJECT(s), &b1_ops, s, "vmxnet3-b1", VMXNET3_VD_REG_SIZE); pci_register_bar(pci_dev, VMXNET3_BAR1_IDX, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar1); memory_region_init(&s->msix_bar, OBJECT(s), "vmxnet3-msix-bar", VMXNET3_MSIX_BAR_SIZE); pci_register_bar(pci_dev, VMXNET3_MSIX_BAR_IDX, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->msix_bar); vmxnet3_reset_interrupt_states(s); /* Interrupt pin A */ pci_dev->config[PCI_INTERRUPT_PIN] = 0x01; ret = msi_init(pci_dev, VMXNET3_MSI_OFFSET(s), VMXNET3_MAX_NMSIX_INTRS, VMXNET3_USE_64BIT, VMXNET3_PER_VECTOR_MASK, NULL); /* Any error other than -ENOTSUP(board's MSI support is broken) * is a programming error. Fall back to INTx silently on -ENOTSUP */ assert(!ret || ret == -ENOTSUP); if (!vmxnet3_init_msix(s)) { VMW_WRPRN("Failed to initialize MSI-X, configuration is inconsistent."); } vmxnet3_net_init(s); if (pci_is_express(pci_dev)) { if (pci_bus_is_express(pci_dev->bus)) { pcie_endpoint_cap_init(pci_dev, VMXNET3_EXP_EP_OFFSET); } pcie_dev_ser_num_init(pci_dev, VMXNET3_DSN_OFFSET, vmxnet3_device_serial_num(s)); } register_savevm(dev, "vmxnet3-msix", -1, 1, vmxnet3_msix_save, vmxnet3_msix_load, s); }
+Info
0
static void vmxnet3_pci_realize(PCIDevice *pci_dev, Error **errp) { DeviceState *dev = DEVICE(pci_dev); VMXNET3State *s = VMXNET3(pci_dev); int ret; VMW_CBPRN("Starting init..."); memory_region_init_io(&s->bar0, OBJECT(s), &b0_ops, s, "vmxnet3-b0", VMXNET3_PT_REG_SIZE); pci_register_bar(pci_dev, VMXNET3_BAR0_IDX, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar0); memory_region_init_io(&s->bar1, OBJECT(s), &b1_ops, s, "vmxnet3-b1", VMXNET3_VD_REG_SIZE); pci_register_bar(pci_dev, VMXNET3_BAR1_IDX, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar1); memory_region_init(&s->msix_bar, OBJECT(s), "vmxnet3-msix-bar", VMXNET3_MSIX_BAR_SIZE); pci_register_bar(pci_dev, VMXNET3_MSIX_BAR_IDX, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->msix_bar); vmxnet3_reset_interrupt_states(s); /* Interrupt pin A */ pci_dev->config[PCI_INTERRUPT_PIN] = 0x01; ret = msi_init(pci_dev, VMXNET3_MSI_OFFSET(s), VMXNET3_MAX_NMSIX_INTRS, VMXNET3_USE_64BIT, VMXNET3_PER_VECTOR_MASK, NULL); /* Any error other than -ENOTSUP(board's MSI support is broken) * is a programming error. Fall back to INTx silently on -ENOTSUP */ assert(!ret || ret == -ENOTSUP); if (!vmxnet3_init_msix(s)) { VMW_WRPRN("Failed to initialize MSI-X, configuration is inconsistent."); } vmxnet3_net_init(s); if (pci_is_express(pci_dev)) { if (pci_bus_is_express(pci_dev->bus)) { pcie_endpoint_cap_init(pci_dev, VMXNET3_EXP_EP_OFFSET); } pcie_dev_ser_num_init(pci_dev, VMXNET3_DSN_OFFSET, vmxnet3_device_serial_num(s)); } register_savevm(dev, "vmxnet3-msix", -1, 1, vmxnet3_msix_save, vmxnet3_msix_load, s); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,209
static void vmxnet3_pci_uninit(PCIDevice *pci_dev) { DeviceState *dev = DEVICE(pci_dev); VMXNET3State *s = VMXNET3(pci_dev); VMW_CBPRN("Starting uninit..."); unregister_savevm(dev, "vmxnet3-msix", s); vmxnet3_net_uninit(s); vmxnet3_cleanup_msix(s); vmxnet3_cleanup_msi(s); }
+Info
0
static void vmxnet3_pci_uninit(PCIDevice *pci_dev) { DeviceState *dev = DEVICE(pci_dev); VMXNET3State *s = VMXNET3(pci_dev); VMW_CBPRN("Starting uninit..."); unregister_savevm(dev, "vmxnet3-msix", s); vmxnet3_net_uninit(s); vmxnet3_cleanup_msix(s); vmxnet3_cleanup_msi(s); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,210
static bool vmxnet3_peer_has_vnet_hdr(VMXNET3State *s) { NetClientState *nc = qemu_get_queue(s->nic); if (qemu_has_vnet_hdr(nc->peer)) { return true; } return false; }
+Info
0
static bool vmxnet3_peer_has_vnet_hdr(VMXNET3State *s) { NetClientState *nc = qemu_get_queue(s->nic); if (qemu_has_vnet_hdr(nc->peer)) { return true; } return false; }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,211
vmxnet3_pop_next_tx_descr(VMXNET3State *s, int qidx, struct Vmxnet3_TxDesc *txd, uint32_t *descr_idx) { Vmxnet3Ring *ring = &s->txq_descr[qidx].tx_ring; PCIDevice *d = PCI_DEVICE(s); vmxnet3_ring_read_curr_cell(d, ring, txd); if (txd->gen == vmxnet3_ring_curr_gen(ring)) { /* Only read after generation field verification */ smp_rmb(); /* Re-read to be sure we got the latest version */ vmxnet3_ring_read_curr_cell(d, ring, txd); VMXNET3_RING_DUMP(VMW_RIPRN, "TX", qidx, ring); *descr_idx = vmxnet3_ring_curr_cell_idx(ring); vmxnet3_inc_tx_consumption_counter(s, qidx); return true; } return false; }
+Info
0
vmxnet3_pop_next_tx_descr(VMXNET3State *s, int qidx, struct Vmxnet3_TxDesc *txd, uint32_t *descr_idx) { Vmxnet3Ring *ring = &s->txq_descr[qidx].tx_ring; PCIDevice *d = PCI_DEVICE(s); vmxnet3_ring_read_curr_cell(d, ring, txd); if (txd->gen == vmxnet3_ring_curr_gen(ring)) { /* Only read after generation field verification */ smp_rmb(); /* Re-read to be sure we got the latest version */ vmxnet3_ring_read_curr_cell(d, ring, txd); VMXNET3_RING_DUMP(VMW_RIPRN, "TX", qidx, ring); *descr_idx = vmxnet3_ring_curr_cell_idx(ring); vmxnet3_inc_tx_consumption_counter(s, qidx); return true; } return false; }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,212
static int vmxnet3_post_load(void *opaque, int version_id) { VMXNET3State *s = opaque; PCIDevice *d = PCI_DEVICE(s); net_tx_pkt_init(&s->tx_pkt, PCI_DEVICE(s), s->max_tx_frags, s->peer_has_vhdr); net_rx_pkt_init(&s->rx_pkt, s->peer_has_vhdr); if (s->msix_used) { if (!vmxnet3_use_msix_vectors(s, VMXNET3_MAX_INTRS)) { VMW_WRPRN("Failed to re-use MSI-X vectors"); msix_uninit(d, &s->msix_bar, &s->msix_bar); s->msix_used = false; return -1; } } vmxnet3_validate_queues(s); vmxnet3_validate_interrupts(s); return 0; }
+Info
0
static int vmxnet3_post_load(void *opaque, int version_id) { VMXNET3State *s = opaque; PCIDevice *d = PCI_DEVICE(s); net_tx_pkt_init(&s->tx_pkt, PCI_DEVICE(s), s->max_tx_frags, s->peer_has_vhdr); net_rx_pkt_init(&s->rx_pkt, s->peer_has_vhdr); if (s->msix_used) { if (!vmxnet3_use_msix_vectors(s, VMXNET3_MAX_INTRS)) { VMW_WRPRN("Failed to re-use MSI-X vectors"); msix_uninit(d, &s->msix_bar, &s->msix_bar); s->msix_used = false; return -1; } } vmxnet3_validate_queues(s); vmxnet3_validate_interrupts(s); return 0; }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,213
static void vmxnet3_process_tx_queue(VMXNET3State *s, int qidx) { struct Vmxnet3_TxDesc txd; uint32_t txd_idx; uint32_t data_len; hwaddr data_pa; for (;;) { if (!vmxnet3_pop_next_tx_descr(s, qidx, &txd, &txd_idx)) { break; } vmxnet3_dump_tx_descr(&txd); if (!s->skip_current_tx_pkt) { data_len = (txd.len > 0) ? txd.len : VMXNET3_MAX_TX_BUF_SIZE; data_pa = le64_to_cpu(txd.addr); if (!net_tx_pkt_add_raw_fragment(s->tx_pkt, data_pa, data_len)) { s->skip_current_tx_pkt = true; } } if (s->tx_sop) { vmxnet3_tx_retrieve_metadata(s, &txd); s->tx_sop = false; } if (txd.eop) { if (!s->skip_current_tx_pkt && net_tx_pkt_parse(s->tx_pkt)) { if (s->needs_vlan) { net_tx_pkt_setup_vlan_header(s->tx_pkt, s->tci); } vmxnet3_send_packet(s, qidx); } else { vmxnet3_on_tx_done_update_stats(s, qidx, VMXNET3_PKT_STATUS_ERROR); } vmxnet3_complete_packet(s, qidx, txd_idx); s->tx_sop = true; s->skip_current_tx_pkt = false; net_tx_pkt_reset(s->tx_pkt); } } }
+Info
0
static void vmxnet3_process_tx_queue(VMXNET3State *s, int qidx) { struct Vmxnet3_TxDesc txd; uint32_t txd_idx; uint32_t data_len; hwaddr data_pa; for (;;) { if (!vmxnet3_pop_next_tx_descr(s, qidx, &txd, &txd_idx)) { break; } vmxnet3_dump_tx_descr(&txd); if (!s->skip_current_tx_pkt) { data_len = (txd.len > 0) ? txd.len : VMXNET3_MAX_TX_BUF_SIZE; data_pa = le64_to_cpu(txd.addr); if (!net_tx_pkt_add_raw_fragment(s->tx_pkt, data_pa, data_len)) { s->skip_current_tx_pkt = true; } } if (s->tx_sop) { vmxnet3_tx_retrieve_metadata(s, &txd); s->tx_sop = false; } if (txd.eop) { if (!s->skip_current_tx_pkt && net_tx_pkt_parse(s->tx_pkt)) { if (s->needs_vlan) { net_tx_pkt_setup_vlan_header(s->tx_pkt, s->tci); } vmxnet3_send_packet(s, qidx); } else { vmxnet3_on_tx_done_update_stats(s, qidx, VMXNET3_PKT_STATUS_ERROR); } vmxnet3_complete_packet(s, qidx, txd_idx); s->tx_sop = true; s->skip_current_tx_pkt = false; net_tx_pkt_reset(s->tx_pkt); } } }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,214
static void vmxnet3_put_int_state(QEMUFile *f, void *pv, size_t size) { Vmxnet3IntState *r = pv; qemu_put_byte(f, r->is_masked); qemu_put_byte(f, r->is_pending); qemu_put_byte(f, r->is_asserted); }
+Info
0
static void vmxnet3_put_int_state(QEMUFile *f, void *pv, size_t size) { Vmxnet3IntState *r = pv; qemu_put_byte(f, r->is_masked); qemu_put_byte(f, r->is_pending); qemu_put_byte(f, r->is_asserted); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,215
static void vmxnet3_put_ring_to_file(QEMUFile *f, Vmxnet3Ring *r) { qemu_put_be64(f, r->pa); qemu_put_be32(f, r->size); qemu_put_be32(f, r->cell_size); qemu_put_be32(f, r->next); qemu_put_byte(f, r->gen); }
+Info
0
static void vmxnet3_put_ring_to_file(QEMUFile *f, Vmxnet3Ring *r) { qemu_put_be64(f, r->pa); qemu_put_be32(f, r->size); qemu_put_be32(f, r->cell_size); qemu_put_be32(f, r->next); qemu_put_byte(f, r->gen); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,216
static void vmxnet3_put_rx_stats_to_file(QEMUFile *f, struct UPT1_RxStats *rx_stat) { qemu_put_be64(f, rx_stat->LROPktsRxOK); qemu_put_be64(f, rx_stat->LROBytesRxOK); qemu_put_be64(f, rx_stat->ucastPktsRxOK); qemu_put_be64(f, rx_stat->ucastBytesRxOK); qemu_put_be64(f, rx_stat->mcastPktsRxOK); qemu_put_be64(f, rx_stat->mcastBytesRxOK); qemu_put_be64(f, rx_stat->bcastPktsRxOK); qemu_put_be64(f, rx_stat->bcastBytesRxOK); qemu_put_be64(f, rx_stat->pktsRxOutOfBuf); qemu_put_be64(f, rx_stat->pktsRxError); }
+Info
0
static void vmxnet3_put_rx_stats_to_file(QEMUFile *f, struct UPT1_RxStats *rx_stat) { qemu_put_be64(f, rx_stat->LROPktsRxOK); qemu_put_be64(f, rx_stat->LROBytesRxOK); qemu_put_be64(f, rx_stat->ucastPktsRxOK); qemu_put_be64(f, rx_stat->ucastBytesRxOK); qemu_put_be64(f, rx_stat->mcastPktsRxOK); qemu_put_be64(f, rx_stat->mcastBytesRxOK); qemu_put_be64(f, rx_stat->bcastPktsRxOK); qemu_put_be64(f, rx_stat->bcastBytesRxOK); qemu_put_be64(f, rx_stat->pktsRxOutOfBuf); qemu_put_be64(f, rx_stat->pktsRxError); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,217
static void vmxnet3_put_rxq_descr(QEMUFile *f, void *pv, size_t size) { Vmxnet3RxqDescr *r = pv; int i; for (i = 0; i < VMXNET3_RX_RINGS_PER_QUEUE; i++) { vmxnet3_put_ring_to_file(f, &r->rx_ring[i]); } vmxnet3_put_ring_to_file(f, &r->comp_ring); qemu_put_byte(f, r->intr_idx); qemu_put_be64(f, r->rx_stats_pa); vmxnet3_put_rx_stats_to_file(f, &r->rxq_stats); }
+Info
0
static void vmxnet3_put_rxq_descr(QEMUFile *f, void *pv, size_t size) { Vmxnet3RxqDescr *r = pv; int i; for (i = 0; i < VMXNET3_RX_RINGS_PER_QUEUE; i++) { vmxnet3_put_ring_to_file(f, &r->rx_ring[i]); } vmxnet3_put_ring_to_file(f, &r->comp_ring); qemu_put_byte(f, r->intr_idx); qemu_put_be64(f, r->rx_stats_pa); vmxnet3_put_rx_stats_to_file(f, &r->rxq_stats); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,218
static void vmxnet3_put_tx_stats_to_file(QEMUFile *f, struct UPT1_TxStats *tx_stat) { qemu_put_be64(f, tx_stat->TSOPktsTxOK); qemu_put_be64(f, tx_stat->TSOBytesTxOK); qemu_put_be64(f, tx_stat->ucastPktsTxOK); qemu_put_be64(f, tx_stat->ucastBytesTxOK); qemu_put_be64(f, tx_stat->mcastPktsTxOK); qemu_put_be64(f, tx_stat->mcastBytesTxOK); qemu_put_be64(f, tx_stat->bcastPktsTxOK); qemu_put_be64(f, tx_stat->bcastBytesTxOK); qemu_put_be64(f, tx_stat->pktsTxError); qemu_put_be64(f, tx_stat->pktsTxDiscard); }
+Info
0
static void vmxnet3_put_tx_stats_to_file(QEMUFile *f, struct UPT1_TxStats *tx_stat) { qemu_put_be64(f, tx_stat->TSOPktsTxOK); qemu_put_be64(f, tx_stat->TSOBytesTxOK); qemu_put_be64(f, tx_stat->ucastPktsTxOK); qemu_put_be64(f, tx_stat->ucastBytesTxOK); qemu_put_be64(f, tx_stat->mcastPktsTxOK); qemu_put_be64(f, tx_stat->mcastBytesTxOK); qemu_put_be64(f, tx_stat->bcastPktsTxOK); qemu_put_be64(f, tx_stat->bcastBytesTxOK); qemu_put_be64(f, tx_stat->pktsTxError); qemu_put_be64(f, tx_stat->pktsTxDiscard); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,219
static void vmxnet3_put_txq_descr(QEMUFile *f, void *pv, size_t size) { Vmxnet3TxqDescr *r = pv; vmxnet3_put_ring_to_file(f, &r->tx_ring); vmxnet3_put_ring_to_file(f, &r->comp_ring); qemu_put_byte(f, r->intr_idx); qemu_put_be64(f, r->tx_stats_pa); vmxnet3_put_tx_stats_to_file(f, &r->txq_stats); }
+Info
0
static void vmxnet3_put_txq_descr(QEMUFile *f, void *pv, size_t size) { Vmxnet3TxqDescr *r = pv; vmxnet3_put_ring_to_file(f, &r->tx_ring); vmxnet3_put_ring_to_file(f, &r->comp_ring); qemu_put_byte(f, r->intr_idx); qemu_put_be64(f, r->tx_stats_pa); vmxnet3_put_tx_stats_to_file(f, &r->txq_stats); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,220
static void vmxnet3_qdev_reset(DeviceState *dev) { PCIDevice *d = PCI_DEVICE(dev); VMXNET3State *s = VMXNET3(d); VMW_CBPRN("Starting QDEV reset..."); vmxnet3_reset(s); }
+Info
0
static void vmxnet3_qdev_reset(DeviceState *dev) { PCIDevice *d = PCI_DEVICE(dev); VMXNET3State *s = VMXNET3(d); VMW_CBPRN("Starting QDEV reset..."); vmxnet3_reset(s); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,221
vmxnet3_read_next_rx_descr(VMXNET3State *s, int qidx, int ridx, struct Vmxnet3_RxDesc *dbuf, uint32_t *didx) { PCIDevice *d = PCI_DEVICE(s); Vmxnet3Ring *ring = &s->rxq_descr[qidx].rx_ring[ridx]; *didx = vmxnet3_ring_curr_cell_idx(ring); vmxnet3_ring_read_curr_cell(d, ring, dbuf); }
+Info
0
vmxnet3_read_next_rx_descr(VMXNET3State *s, int qidx, int ridx, struct Vmxnet3_RxDesc *dbuf, uint32_t *didx) { PCIDevice *d = PCI_DEVICE(s); Vmxnet3Ring *ring = &s->rxq_descr[qidx].rx_ring[ridx]; *didx = vmxnet3_ring_curr_cell_idx(ring); vmxnet3_ring_read_curr_cell(d, ring, dbuf); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,222
static void vmxnet3_realize(DeviceState *qdev, Error **errp) { VMXNET3Class *vc = VMXNET3_DEVICE_GET_CLASS(qdev); PCIDevice *pci_dev = PCI_DEVICE(qdev); VMXNET3State *s = VMXNET3(qdev); if (!(s->compat_flags & VMXNET3_COMPAT_FLAG_DISABLE_PCIE)) { pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS; } vc->parent_dc_realize(qdev, errp); }
+Info
0
static void vmxnet3_realize(DeviceState *qdev, Error **errp) { VMXNET3Class *vc = VMXNET3_DEVICE_GET_CLASS(qdev); PCIDevice *pci_dev = PCI_DEVICE(qdev); VMXNET3State *s = VMXNET3(qdev); if (!(s->compat_flags & VMXNET3_COMPAT_FLAG_DISABLE_PCIE)) { pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS; } vc->parent_dc_realize(qdev, errp); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,223
vmxnet3_receive(NetClientState *nc, const uint8_t *buf, size_t size) { VMXNET3State *s = qemu_get_nic_opaque(nc); size_t bytes_indicated; uint8_t min_buf[MIN_BUF_SIZE]; if (!vmxnet3_can_receive(nc)) { VMW_PKPRN("Cannot receive now"); return -1; } if (s->peer_has_vhdr) { net_rx_pkt_set_vhdr(s->rx_pkt, (struct virtio_net_hdr *)buf); buf += sizeof(struct virtio_net_hdr); size -= sizeof(struct virtio_net_hdr); } /* Pad to minimum Ethernet frame length */ if (size < sizeof(min_buf)) { memcpy(min_buf, buf, size); memset(&min_buf[size], 0, sizeof(min_buf) - size); buf = min_buf; size = sizeof(min_buf); } net_rx_pkt_set_packet_type(s->rx_pkt, get_eth_packet_type(PKT_GET_ETH_HDR(buf))); if (vmxnet3_rx_filter_may_indicate(s, buf, size)) { net_rx_pkt_set_protocols(s->rx_pkt, buf, size); vmxnet3_rx_need_csum_calculate(s->rx_pkt, buf, size); net_rx_pkt_attach_data(s->rx_pkt, buf, size, s->rx_vlan_stripping); bytes_indicated = vmxnet3_indicate_packet(s) ? size : -1; if (bytes_indicated < size) { VMW_PKPRN("RX: %zu of %zu bytes indicated", bytes_indicated, size); } } else { VMW_PKPRN("Packet dropped by RX filter"); bytes_indicated = size; } assert(size > 0); assert(bytes_indicated != 0); return bytes_indicated; }
+Info
0
vmxnet3_receive(NetClientState *nc, const uint8_t *buf, size_t size) { VMXNET3State *s = qemu_get_nic_opaque(nc); size_t bytes_indicated; uint8_t min_buf[MIN_BUF_SIZE]; if (!vmxnet3_can_receive(nc)) { VMW_PKPRN("Cannot receive now"); return -1; } if (s->peer_has_vhdr) { net_rx_pkt_set_vhdr(s->rx_pkt, (struct virtio_net_hdr *)buf); buf += sizeof(struct virtio_net_hdr); size -= sizeof(struct virtio_net_hdr); } /* Pad to minimum Ethernet frame length */ if (size < sizeof(min_buf)) { memcpy(min_buf, buf, size); memset(&min_buf[size], 0, sizeof(min_buf) - size); buf = min_buf; size = sizeof(min_buf); } net_rx_pkt_set_packet_type(s->rx_pkt, get_eth_packet_type(PKT_GET_ETH_HDR(buf))); if (vmxnet3_rx_filter_may_indicate(s, buf, size)) { net_rx_pkt_set_protocols(s->rx_pkt, buf, size); vmxnet3_rx_need_csum_calculate(s->rx_pkt, buf, size); net_rx_pkt_attach_data(s->rx_pkt, buf, size, s->rx_vlan_stripping); bytes_indicated = vmxnet3_indicate_packet(s) ? size : -1; if (bytes_indicated < size) { VMW_PKPRN("RX: %zu of %zu bytes indicated", bytes_indicated, size); } } else { VMW_PKPRN("Packet dropped by RX filter"); bytes_indicated = size; } assert(size > 0); assert(bytes_indicated != 0); return bytes_indicated; }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,224
static void vmxnet3_register_types(void) { VMW_CBPRN("vmxnet3_register_types called..."); type_register_static(&vmxnet3_info); }
+Info
0
static void vmxnet3_register_types(void) { VMW_CBPRN("vmxnet3_register_types called..."); type_register_static(&vmxnet3_info); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,225
static void vmxnet3_reset_mac(VMXNET3State *s) { memcpy(&s->conf.macaddr.a, &s->perm_mac.a, sizeof(s->perm_mac.a)); VMW_CFPRN("MAC address set to: " MAC_FMT, MAC_ARG(s->conf.macaddr.a)); }
+Info
0
static void vmxnet3_reset_mac(VMXNET3State *s) { memcpy(&s->conf.macaddr.a, &s->perm_mac.a, sizeof(s->perm_mac.a)); VMW_CFPRN("MAC address set to: " MAC_FMT, MAC_ARG(s->conf.macaddr.a)); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,226
vmxnet3_revert_rxc_descr(VMXNET3State *s, int qidx) { vmxnet3_dec_rx_completion_counter(s, qidx); }
+Info
0
vmxnet3_revert_rxc_descr(VMXNET3State *s, int qidx) { vmxnet3_dec_rx_completion_counter(s, qidx); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,227
static inline size_t vmxnet3_ring_curr_cell_idx(Vmxnet3Ring *ring) { return ring->next; }
+Info
0
static inline size_t vmxnet3_ring_curr_cell_idx(Vmxnet3Ring *ring) { return ring->next; }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,228
static inline hwaddr vmxnet3_ring_curr_cell_pa(Vmxnet3Ring *ring) { return ring->pa + ring->next * ring->cell_size; }
+Info
0
static inline hwaddr vmxnet3_ring_curr_cell_pa(Vmxnet3Ring *ring) { return ring->pa + ring->next * ring->cell_size; }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,229
static inline uint8_t vmxnet3_ring_curr_gen(Vmxnet3Ring *ring) { return ring->gen; }
+Info
0
static inline uint8_t vmxnet3_ring_curr_gen(Vmxnet3Ring *ring) { return ring->gen; }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,230
static inline void vmxnet3_ring_dec(Vmxnet3Ring *ring) { if (ring->next-- == 0) { ring->next = ring->size - 1; ring->gen ^= 1; } }
+Info
0
static inline void vmxnet3_ring_dec(Vmxnet3Ring *ring) { if (ring->next-- == 0) { ring->next = ring->size - 1; ring->gen ^= 1; } }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,231
static inline void vmxnet3_ring_init(PCIDevice *d, Vmxnet3Ring *ring, hwaddr pa, size_t size, size_t cell_size, bool zero_region) { ring->pa = pa; ring->size = size; ring->cell_size = cell_size; ring->gen = VMXNET3_INIT_GEN; ring->next = 0; if (zero_region) { vmw_shmem_set(d, pa, 0, size * cell_size); } }
+Info
0
static inline void vmxnet3_ring_init(PCIDevice *d, Vmxnet3Ring *ring, hwaddr pa, size_t size, size_t cell_size, bool zero_region) { ring->pa = pa; ring->size = size; ring->cell_size = cell_size; ring->gen = VMXNET3_INIT_GEN; ring->next = 0; if (zero_region) { vmw_shmem_set(d, pa, 0, size * cell_size); } }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,232
static inline void vmxnet3_ring_read_curr_cell(PCIDevice *d, Vmxnet3Ring *ring, void *buff) { vmw_shmem_read(d, vmxnet3_ring_curr_cell_pa(ring), buff, ring->cell_size); }
+Info
0
static inline void vmxnet3_ring_read_curr_cell(PCIDevice *d, Vmxnet3Ring *ring, void *buff) { vmw_shmem_read(d, vmxnet3_ring_curr_cell_pa(ring), buff, ring->cell_size); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,233
static inline void vmxnet3_ring_write_curr_cell(PCIDevice *d, Vmxnet3Ring *ring, void *buff) { vmw_shmem_write(d, vmxnet3_ring_curr_cell_pa(ring), buff, ring->cell_size); }
+Info
0
static inline void vmxnet3_ring_write_curr_cell(PCIDevice *d, Vmxnet3Ring *ring, void *buff) { vmw_shmem_write(d, vmxnet3_ring_curr_cell_pa(ring), buff, ring->cell_size); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,234
vmxnet3_rx_filter_may_indicate(VMXNET3State *s, const void *data, size_t size) { struct eth_header *ehdr = PKT_GET_ETH_HDR(data); if (VMXNET_FLAG_IS_SET(s->rx_mode, VMXNET3_RXM_PROMISC)) { return true; } if (!vmxnet3_is_registered_vlan(s, data)) { return false; } switch (net_rx_pkt_get_packet_type(s->rx_pkt)) { case ETH_PKT_UCAST: if (!VMXNET_FLAG_IS_SET(s->rx_mode, VMXNET3_RXM_UCAST)) { return false; } if (memcmp(s->conf.macaddr.a, ehdr->h_dest, ETH_ALEN)) { return false; } break; case ETH_PKT_BCAST: if (!VMXNET_FLAG_IS_SET(s->rx_mode, VMXNET3_RXM_BCAST)) { return false; } break; case ETH_PKT_MCAST: if (VMXNET_FLAG_IS_SET(s->rx_mode, VMXNET3_RXM_ALL_MULTI)) { return true; } if (!VMXNET_FLAG_IS_SET(s->rx_mode, VMXNET3_RXM_MCAST)) { return false; } if (!vmxnet3_is_allowed_mcast_group(s, ehdr->h_dest)) { return false; } break; default: g_assert_not_reached(); } return true; }
+Info
0
vmxnet3_rx_filter_may_indicate(VMXNET3State *s, const void *data, size_t size) { struct eth_header *ehdr = PKT_GET_ETH_HDR(data); if (VMXNET_FLAG_IS_SET(s->rx_mode, VMXNET3_RXM_PROMISC)) { return true; } if (!vmxnet3_is_registered_vlan(s, data)) { return false; } switch (net_rx_pkt_get_packet_type(s->rx_pkt)) { case ETH_PKT_UCAST: if (!VMXNET_FLAG_IS_SET(s->rx_mode, VMXNET3_RXM_UCAST)) { return false; } if (memcmp(s->conf.macaddr.a, ehdr->h_dest, ETH_ALEN)) { return false; } break; case ETH_PKT_BCAST: if (!VMXNET_FLAG_IS_SET(s->rx_mode, VMXNET3_RXM_BCAST)) { return false; } break; case ETH_PKT_MCAST: if (VMXNET_FLAG_IS_SET(s->rx_mode, VMXNET3_RXM_ALL_MULTI)) { return true; } if (!VMXNET_FLAG_IS_SET(s->rx_mode, VMXNET3_RXM_MCAST)) { return false; } if (!vmxnet3_is_allowed_mcast_group(s, ehdr->h_dest)) { return false; } break; default: g_assert_not_reached(); } return true; }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,235
static void vmxnet3_rx_update_descr(struct NetRxPkt *pkt, struct Vmxnet3_RxCompDesc *rxcd) { int csum_ok, is_gso; bool isip4, isip6, istcp, isudp; struct virtio_net_hdr *vhdr; uint8_t offload_type; if (net_rx_pkt_is_vlan_stripped(pkt)) { rxcd->ts = 1; rxcd->tci = net_rx_pkt_get_vlan_tag(pkt); } if (!net_rx_pkt_has_virt_hdr(pkt)) { goto nocsum; } vhdr = net_rx_pkt_get_vhdr(pkt); /* * Checksum is valid when lower level tell so or when lower level * requires checksum offload telling that packet produced/bridged * locally and did travel over network after last checksum calculation * or production */ csum_ok = VMXNET_FLAG_IS_SET(vhdr->flags, VIRTIO_NET_HDR_F_DATA_VALID) || VMXNET_FLAG_IS_SET(vhdr->flags, VIRTIO_NET_HDR_F_NEEDS_CSUM); offload_type = vhdr->gso_type & ~VIRTIO_NET_HDR_GSO_ECN; is_gso = (offload_type != VIRTIO_NET_HDR_GSO_NONE) ? 1 : 0; if (!csum_ok && !is_gso) { goto nocsum; } net_rx_pkt_get_protocols(pkt, &isip4, &isip6, &isudp, &istcp); if ((!istcp && !isudp) || (!isip4 && !isip6)) { goto nocsum; } rxcd->cnc = 0; rxcd->v4 = isip4 ? 1 : 0; rxcd->v6 = isip6 ? 1 : 0; rxcd->tcp = istcp ? 1 : 0; rxcd->udp = isudp ? 1 : 0; rxcd->fcs = rxcd->tuc = rxcd->ipc = 1; return; nocsum: rxcd->cnc = 1; return; }
+Info
0
static void vmxnet3_rx_update_descr(struct NetRxPkt *pkt, struct Vmxnet3_RxCompDesc *rxcd) { int csum_ok, is_gso; bool isip4, isip6, istcp, isudp; struct virtio_net_hdr *vhdr; uint8_t offload_type; if (net_rx_pkt_is_vlan_stripped(pkt)) { rxcd->ts = 1; rxcd->tci = net_rx_pkt_get_vlan_tag(pkt); } if (!net_rx_pkt_has_virt_hdr(pkt)) { goto nocsum; } vhdr = net_rx_pkt_get_vhdr(pkt); /* * Checksum is valid when lower level tell so or when lower level * requires checksum offload telling that packet produced/bridged * locally and did travel over network after last checksum calculation * or production */ csum_ok = VMXNET_FLAG_IS_SET(vhdr->flags, VIRTIO_NET_HDR_F_DATA_VALID) || VMXNET_FLAG_IS_SET(vhdr->flags, VIRTIO_NET_HDR_F_NEEDS_CSUM); offload_type = vhdr->gso_type & ~VIRTIO_NET_HDR_GSO_ECN; is_gso = (offload_type != VIRTIO_NET_HDR_GSO_NONE) ? 1 : 0; if (!csum_ok && !is_gso) { goto nocsum; } net_rx_pkt_get_protocols(pkt, &isip4, &isip6, &isudp, &istcp); if ((!istcp && !isudp) || (!isip4 && !isip6)) { goto nocsum; } rxcd->cnc = 0; rxcd->v4 = isip4 ? 1 : 0; rxcd->v6 = isip6 ? 1 : 0; rxcd->tcp = istcp ? 1 : 0; rxcd->udp = isudp ? 1 : 0; rxcd->fcs = rxcd->tuc = rxcd->ipc = 1; return; nocsum: rxcd->cnc = 1; return; }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,236
vmxnet3_send_packet(VMXNET3State *s, uint32_t qidx) { Vmxnet3PktStatus status = VMXNET3_PKT_STATUS_OK; if (!vmxnet3_setup_tx_offloads(s)) { status = VMXNET3_PKT_STATUS_ERROR; goto func_exit; } /* debug prints */ vmxnet3_dump_virt_hdr(net_tx_pkt_get_vhdr(s->tx_pkt)); net_tx_pkt_dump(s->tx_pkt); if (!net_tx_pkt_send(s->tx_pkt, qemu_get_queue(s->nic))) { status = VMXNET3_PKT_STATUS_DISCARD; goto func_exit; } func_exit: vmxnet3_on_tx_done_update_stats(s, qidx, status); return (status == VMXNET3_PKT_STATUS_OK); }
+Info
0
vmxnet3_send_packet(VMXNET3State *s, uint32_t qidx) { Vmxnet3PktStatus status = VMXNET3_PKT_STATUS_OK; if (!vmxnet3_setup_tx_offloads(s)) { status = VMXNET3_PKT_STATUS_ERROR; goto func_exit; } /* debug prints */ vmxnet3_dump_virt_hdr(net_tx_pkt_get_vhdr(s->tx_pkt)); net_tx_pkt_dump(s->tx_pkt); if (!net_tx_pkt_send(s->tx_pkt, qemu_get_queue(s->nic))) { status = VMXNET3_PKT_STATUS_DISCARD; goto func_exit; } func_exit: vmxnet3_on_tx_done_update_stats(s, qidx, status); return (status == VMXNET3_PKT_STATUS_OK); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,237
static void vmxnet3_set_events(VMXNET3State *s, uint32_t val) { uint32_t events; PCIDevice *d = PCI_DEVICE(s); VMW_CBPRN("Setting events: 0x%x", val); events = VMXNET3_READ_DRV_SHARED32(d, s->drv_shmem, ecr) | val; VMXNET3_WRITE_DRV_SHARED32(d, s->drv_shmem, ecr, events); }
+Info
0
static void vmxnet3_set_events(VMXNET3State *s, uint32_t val) { uint32_t events; PCIDevice *d = PCI_DEVICE(s); VMW_CBPRN("Setting events: 0x%x", val); events = VMXNET3_READ_DRV_SHARED32(d, s->drv_shmem, ecr) | val; VMXNET3_WRITE_DRV_SHARED32(d, s->drv_shmem, ecr, events); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,238
static void vmxnet3_set_link_status(NetClientState *nc) { VMXNET3State *s = qemu_get_nic_opaque(nc); if (nc->link_down) { s->link_status_and_speed &= ~VMXNET3_LINK_STATUS_UP; } else { s->link_status_and_speed |= VMXNET3_LINK_STATUS_UP; } vmxnet3_set_events(s, VMXNET3_ECR_LINK); vmxnet3_trigger_interrupt(s, s->event_int_idx); }
+Info
0
static void vmxnet3_set_link_status(NetClientState *nc) { VMXNET3State *s = qemu_get_nic_opaque(nc); if (nc->link_down) { s->link_status_and_speed &= ~VMXNET3_LINK_STATUS_UP; } else { s->link_status_and_speed |= VMXNET3_LINK_STATUS_UP; } vmxnet3_set_events(s, VMXNET3_ECR_LINK); vmxnet3_trigger_interrupt(s, s->event_int_idx); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,239
static void vmxnet3_set_variable_mac(VMXNET3State *s, uint32_t h, uint32_t l) { s->conf.macaddr.a[0] = VMXNET3_GET_BYTE(l, 0); s->conf.macaddr.a[1] = VMXNET3_GET_BYTE(l, 1); s->conf.macaddr.a[2] = VMXNET3_GET_BYTE(l, 2); s->conf.macaddr.a[3] = VMXNET3_GET_BYTE(l, 3); s->conf.macaddr.a[4] = VMXNET3_GET_BYTE(h, 0); s->conf.macaddr.a[5] = VMXNET3_GET_BYTE(h, 1); VMW_CFPRN("Variable MAC: " MAC_FMT, MAC_ARG(s->conf.macaddr.a)); qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a); }
+Info
0
static void vmxnet3_set_variable_mac(VMXNET3State *s, uint32_t h, uint32_t l) { s->conf.macaddr.a[0] = VMXNET3_GET_BYTE(l, 0); s->conf.macaddr.a[1] = VMXNET3_GET_BYTE(l, 1); s->conf.macaddr.a[2] = VMXNET3_GET_BYTE(l, 2); s->conf.macaddr.a[3] = VMXNET3_GET_BYTE(l, 3); s->conf.macaddr.a[4] = VMXNET3_GET_BYTE(h, 0); s->conf.macaddr.a[5] = VMXNET3_GET_BYTE(h, 1); VMW_CFPRN("Variable MAC: " MAC_FMT, MAC_ARG(s->conf.macaddr.a)); qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,240
static void vmxnet3_setup_rx_filtering(VMXNET3State *s) { vmxnet3_update_rx_mode(s); vmxnet3_update_vlan_filters(s); vmxnet3_update_mcast_filters(s); }
+Info
0
static void vmxnet3_setup_rx_filtering(VMXNET3State *s) { vmxnet3_update_rx_mode(s); vmxnet3_update_vlan_filters(s); vmxnet3_update_mcast_filters(s); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,241
vmxnet3_setup_tx_offloads(VMXNET3State *s) { switch (s->offload_mode) { case VMXNET3_OM_NONE: net_tx_pkt_build_vheader(s->tx_pkt, false, false, 0); break; case VMXNET3_OM_CSUM: net_tx_pkt_build_vheader(s->tx_pkt, false, true, 0); VMW_PKPRN("L4 CSO requested\n"); break; case VMXNET3_OM_TSO: net_tx_pkt_build_vheader(s->tx_pkt, true, true, s->cso_or_gso_size); net_tx_pkt_update_ip_checksums(s->tx_pkt); VMW_PKPRN("GSO offload requested."); break; default: g_assert_not_reached(); return false; } return true; }
+Info
0
vmxnet3_setup_tx_offloads(VMXNET3State *s) { switch (s->offload_mode) { case VMXNET3_OM_NONE: net_tx_pkt_build_vheader(s->tx_pkt, false, false, 0); break; case VMXNET3_OM_CSUM: net_tx_pkt_build_vheader(s->tx_pkt, false, true, 0); VMW_PKPRN("L4 CSO requested\n"); break; case VMXNET3_OM_TSO: net_tx_pkt_build_vheader(s->tx_pkt, true, true, s->cso_or_gso_size); net_tx_pkt_update_ip_checksums(s->tx_pkt); VMW_PKPRN("GSO offload requested."); break; default: g_assert_not_reached(); return false; } return true; }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,242
static void vmxnet3_trigger_interrupt(VMXNET3State *s, int lidx) { PCIDevice *d = PCI_DEVICE(s); s->interrupt_states[lidx].is_pending = true; vmxnet3_update_interrupt_line_state(s, lidx); if (s->msix_used && msix_enabled(d) && s->auto_int_masking) { goto do_automask; } if (msi_enabled(d) && s->auto_int_masking) { goto do_automask; } return; do_automask: s->interrupt_states[lidx].is_masked = true; vmxnet3_update_interrupt_line_state(s, lidx); }
+Info
0
static void vmxnet3_trigger_interrupt(VMXNET3State *s, int lidx) { PCIDevice *d = PCI_DEVICE(s); s->interrupt_states[lidx].is_pending = true; vmxnet3_update_interrupt_line_state(s, lidx); if (s->msix_used && msix_enabled(d) && s->auto_int_masking) { goto do_automask; } if (msi_enabled(d) && s->auto_int_masking) { goto do_automask; } return; do_automask: s->interrupt_states[lidx].is_masked = true; vmxnet3_update_interrupt_line_state(s, lidx); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,243
vmxnet3_tx_retrieve_metadata(VMXNET3State *s, const struct Vmxnet3_TxDesc *txd) { s->offload_mode = txd->om; s->cso_or_gso_size = txd->msscof; s->tci = txd->tci; s->needs_vlan = txd->ti; }
+Info
0
vmxnet3_tx_retrieve_metadata(VMXNET3State *s, const struct Vmxnet3_TxDesc *txd) { s->offload_mode = txd->om; s->cso_or_gso_size = txd->msscof; s->tci = txd->tci; s->needs_vlan = txd->ti; }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,244
vmxnet3_unuse_msix_vectors(VMXNET3State *s, int num_vectors) { PCIDevice *d = PCI_DEVICE(s); int i; for (i = 0; i < num_vectors; i++) { msix_vector_unuse(d, i); } }
+Info
0
vmxnet3_unuse_msix_vectors(VMXNET3State *s, int num_vectors) { PCIDevice *d = PCI_DEVICE(s); int i; for (i = 0; i < num_vectors; i++) { msix_vector_unuse(d, i); } }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,245
static void vmxnet3_update_features(VMXNET3State *s) { uint32_t guest_features; int rxcso_supported; PCIDevice *d = PCI_DEVICE(s); guest_features = VMXNET3_READ_DRV_SHARED32(d, s->drv_shmem, devRead.misc.uptFeatures); rxcso_supported = VMXNET_FLAG_IS_SET(guest_features, UPT1_F_RXCSUM); s->rx_vlan_stripping = VMXNET_FLAG_IS_SET(guest_features, UPT1_F_RXVLAN); s->lro_supported = VMXNET_FLAG_IS_SET(guest_features, UPT1_F_LRO); VMW_CFPRN("Features configuration: LRO: %d, RXCSUM: %d, VLANSTRIP: %d", s->lro_supported, rxcso_supported, s->rx_vlan_stripping); if (s->peer_has_vhdr) { qemu_set_offload(qemu_get_queue(s->nic)->peer, rxcso_supported, s->lro_supported, s->lro_supported, 0, 0); } }
+Info
0
static void vmxnet3_update_features(VMXNET3State *s) { uint32_t guest_features; int rxcso_supported; PCIDevice *d = PCI_DEVICE(s); guest_features = VMXNET3_READ_DRV_SHARED32(d, s->drv_shmem, devRead.misc.uptFeatures); rxcso_supported = VMXNET_FLAG_IS_SET(guest_features, UPT1_F_RXCSUM); s->rx_vlan_stripping = VMXNET_FLAG_IS_SET(guest_features, UPT1_F_RXVLAN); s->lro_supported = VMXNET_FLAG_IS_SET(guest_features, UPT1_F_LRO); VMW_CFPRN("Features configuration: LRO: %d, RXCSUM: %d, VLANSTRIP: %d", s->lro_supported, rxcso_supported, s->rx_vlan_stripping); if (s->peer_has_vhdr) { qemu_set_offload(qemu_get_queue(s->nic)->peer, rxcso_supported, s->lro_supported, s->lro_supported, 0, 0); } }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,246
static void vmxnet3_update_interrupt_line_state(VMXNET3State *s, int lidx) { if (!s->interrupt_states[lidx].is_pending && s->interrupt_states[lidx].is_asserted) { VMW_IRPRN("New interrupt line state for index %d is DOWN", lidx); _vmxnet3_deassert_interrupt_line(s, lidx); s->interrupt_states[lidx].is_asserted = false; return; } if (s->interrupt_states[lidx].is_pending && !s->interrupt_states[lidx].is_masked && !s->interrupt_states[lidx].is_asserted) { VMW_IRPRN("New interrupt line state for index %d is UP", lidx); s->interrupt_states[lidx].is_asserted = _vmxnet3_assert_interrupt_line(s, lidx); s->interrupt_states[lidx].is_pending = false; return; } }
+Info
0
static void vmxnet3_update_interrupt_line_state(VMXNET3State *s, int lidx) { if (!s->interrupt_states[lidx].is_pending && s->interrupt_states[lidx].is_asserted) { VMW_IRPRN("New interrupt line state for index %d is DOWN", lidx); _vmxnet3_deassert_interrupt_line(s, lidx); s->interrupt_states[lidx].is_asserted = false; return; } if (s->interrupt_states[lidx].is_pending && !s->interrupt_states[lidx].is_masked && !s->interrupt_states[lidx].is_asserted) { VMW_IRPRN("New interrupt line state for index %d is UP", lidx); s->interrupt_states[lidx].is_asserted = _vmxnet3_assert_interrupt_line(s, lidx); s->interrupt_states[lidx].is_pending = false; return; } }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,247
static void vmxnet3_update_mcast_filters(VMXNET3State *s) { PCIDevice *d = PCI_DEVICE(s); uint16_t list_bytes = VMXNET3_READ_DRV_SHARED16(d, s->drv_shmem, devRead.rxFilterConf.mfTableLen); s->mcast_list_len = list_bytes / sizeof(s->mcast_list[0]); s->mcast_list = g_realloc(s->mcast_list, list_bytes); if (!s->mcast_list) { if (s->mcast_list_len == 0) { VMW_CFPRN("Current multicast list is empty"); } else { VMW_ERPRN("Failed to allocate multicast list of %d elements", s->mcast_list_len); } s->mcast_list_len = 0; } else { int i; hwaddr mcast_list_pa = VMXNET3_READ_DRV_SHARED64(d, s->drv_shmem, devRead.rxFilterConf.mfTablePA); pci_dma_read(d, mcast_list_pa, s->mcast_list, list_bytes); VMW_CFPRN("Current multicast list len is %d:", s->mcast_list_len); for (i = 0; i < s->mcast_list_len; i++) { VMW_CFPRN("\t" MAC_FMT, MAC_ARG(s->mcast_list[i].a)); } } }
+Info
0
static void vmxnet3_update_mcast_filters(VMXNET3State *s) { PCIDevice *d = PCI_DEVICE(s); uint16_t list_bytes = VMXNET3_READ_DRV_SHARED16(d, s->drv_shmem, devRead.rxFilterConf.mfTableLen); s->mcast_list_len = list_bytes / sizeof(s->mcast_list[0]); s->mcast_list = g_realloc(s->mcast_list, list_bytes); if (!s->mcast_list) { if (s->mcast_list_len == 0) { VMW_CFPRN("Current multicast list is empty"); } else { VMW_ERPRN("Failed to allocate multicast list of %d elements", s->mcast_list_len); } s->mcast_list_len = 0; } else { int i; hwaddr mcast_list_pa = VMXNET3_READ_DRV_SHARED64(d, s->drv_shmem, devRead.rxFilterConf.mfTablePA); pci_dma_read(d, mcast_list_pa, s->mcast_list, list_bytes); VMW_CFPRN("Current multicast list len is %d:", s->mcast_list_len); for (i = 0; i < s->mcast_list_len; i++) { VMW_CFPRN("\t" MAC_FMT, MAC_ARG(s->mcast_list[i].a)); } } }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,248
static void vmxnet3_update_rx_mode(VMXNET3State *s) { PCIDevice *d = PCI_DEVICE(s); s->rx_mode = VMXNET3_READ_DRV_SHARED32(d, s->drv_shmem, devRead.rxFilterConf.rxMode); VMW_CFPRN("RX mode: 0x%08X", s->rx_mode); }
+Info
0
static void vmxnet3_update_rx_mode(VMXNET3State *s) { PCIDevice *d = PCI_DEVICE(s); s->rx_mode = VMXNET3_READ_DRV_SHARED32(d, s->drv_shmem, devRead.rxFilterConf.rxMode); VMW_CFPRN("RX mode: 0x%08X", s->rx_mode); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,249
static void vmxnet3_update_vlan_filters(VMXNET3State *s) { int i; PCIDevice *d = PCI_DEVICE(s); /* Copy configuration from shared memory */ VMXNET3_READ_DRV_SHARED(d, s->drv_shmem, devRead.rxFilterConf.vfTable, s->vlan_table, sizeof(s->vlan_table)); /* Invert byte order when needed */ for (i = 0; i < ARRAY_SIZE(s->vlan_table); i++) { s->vlan_table[i] = le32_to_cpu(s->vlan_table[i]); } /* Dump configuration for debugging purposes */ VMW_CFPRN("Configured VLANs:"); for (i = 0; i < sizeof(s->vlan_table) * 8; i++) { if (VMXNET3_VFTABLE_ENTRY_IS_SET(s->vlan_table, i)) { VMW_CFPRN("\tVLAN %d is present", i); } } }
+Info
0
static void vmxnet3_update_vlan_filters(VMXNET3State *s) { int i; PCIDevice *d = PCI_DEVICE(s); /* Copy configuration from shared memory */ VMXNET3_READ_DRV_SHARED(d, s->drv_shmem, devRead.rxFilterConf.vfTable, s->vlan_table, sizeof(s->vlan_table)); /* Invert byte order when needed */ for (i = 0; i < ARRAY_SIZE(s->vlan_table); i++) { s->vlan_table[i] = le32_to_cpu(s->vlan_table[i]); } /* Dump configuration for debugging purposes */ VMW_CFPRN("Configured VLANs:"); for (i = 0; i < sizeof(s->vlan_table) * 8; i++) { if (VMXNET3_VFTABLE_ENTRY_IS_SET(s->vlan_table, i)) { VMW_CFPRN("\tVLAN %d is present", i); } } }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,250
vmxnet3_use_msix_vectors(VMXNET3State *s, int num_vectors) { PCIDevice *d = PCI_DEVICE(s); int i; for (i = 0; i < num_vectors; i++) { int res = msix_vector_use(d, i); if (0 > res) { VMW_WRPRN("Failed to use MSI-X vector %d, error %d", i, res); vmxnet3_unuse_msix_vectors(s, i); return false; } } return true; }
+Info
0
vmxnet3_use_msix_vectors(VMXNET3State *s, int num_vectors) { PCIDevice *d = PCI_DEVICE(s); int i; for (i = 0; i < num_vectors; i++) { int res = msix_vector_use(d, i); if (0 > res) { VMW_WRPRN("Failed to use MSI-X vector %d, error %d", i, res); vmxnet3_unuse_msix_vectors(s, i); return false; } } return true; }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,251
static void vmxnet3_validate_interrupt_idx(bool is_msix, int idx) { int max_ints = is_msix ? VMXNET3_MAX_INTRS : VMXNET3_MAX_NMSIX_INTRS; if (idx >= max_ints) { hw_error("Bad interrupt index: %d\n", idx); } }
+Info
0
static void vmxnet3_validate_interrupt_idx(bool is_msix, int idx) { int max_ints = is_msix ? VMXNET3_MAX_INTRS : VMXNET3_MAX_NMSIX_INTRS; if (idx >= max_ints) { hw_error("Bad interrupt index: %d\n", idx); } }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,252
static bool vmxnet3_verify_intx(VMXNET3State *s, int intx) { return s->msix_used || msi_enabled(PCI_DEVICE(s)) || intx == pci_get_byte(s->parent_obj.config + PCI_INTERRUPT_PIN) - 1; }
+Info
0
static bool vmxnet3_verify_intx(VMXNET3State *s, int intx) { return s->msix_used || msi_enabled(PCI_DEVICE(s)) || intx == pci_get_byte(s->parent_obj.config + PCI_INTERRUPT_PIN) - 1; }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,253
static bool vmxnet3_vmstate_need_pcie_device(void *opaque) { VMXNET3State *s = VMXNET3(opaque); return !(s->compat_flags & VMXNET3_COMPAT_FLAG_DISABLE_PCIE); }
+Info
0
static bool vmxnet3_vmstate_need_pcie_device(void *opaque) { VMXNET3State *s = VMXNET3(opaque); return !(s->compat_flags & VMXNET3_COMPAT_FLAG_DISABLE_PCIE); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,254
static bool vmxnet3_vmstate_test_pci_device(void *opaque, int version_id) { return !vmxnet3_vmstate_need_pcie_device(opaque); }
+Info
0
static bool vmxnet3_vmstate_test_pci_device(void *opaque, int version_id) { return !vmxnet3_vmstate_need_pcie_device(opaque); }
@@ -531,6 +531,7 @@ static void vmxnet3_complete_packet(VMXNET3State *s, int qidx, uint32_t tx_ridx) VMXNET3_RING_DUMP(VMW_RIPRN, "TXC", qidx, &s->txq_descr[qidx].comp_ring); + memset(&txcq_descr, 0, sizeof(txcq_descr)); txcq_descr.txdIdx = tx_ridx; txcq_descr.gen = vmxnet3_ring_curr_gen(&s->txq_descr[qidx].comp_ring);
CWE-200
null
null
7,255
static inline uint32_t get_buf_entry(struct vrend_decode_ctx *ctx, uint32_t offset) { return ctx->ds->buf[ctx->ds->buf_offset + offset]; }
DoS
0
static inline uint32_t get_buf_entry(struct vrend_decode_ctx *ctx, uint32_t offset) { return ctx->ds->buf[ctx->ds->buf_offset + offset]; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,256
static float uif(unsigned int ui) { union { float f; unsigned int ui; } myuif; myuif.ui = ui; return myuif.f; }
DoS
0
static float uif(unsigned int ui) { union { float f; unsigned int ui; } myuif; myuif.ui = ui; return myuif.f; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,257
static int vrend_decode_begin_query(struct vrend_decode_ctx *ctx, int length) { if (length != 1) return EINVAL; uint32_t handle = get_buf_entry(ctx, VIRGL_QUERY_BEGIN_HANDLE); vrend_begin_query(ctx->grctx, handle); return 0; }
DoS
0
static int vrend_decode_begin_query(struct vrend_decode_ctx *ctx, int length) { if (length != 1) return EINVAL; uint32_t handle = get_buf_entry(ctx, VIRGL_QUERY_BEGIN_HANDLE); vrend_begin_query(ctx->grctx, handle); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,258
static int vrend_decode_bind_object(struct vrend_decode_ctx *ctx, uint16_t length) { if (length != 1) return EINVAL; uint32_t header = get_buf_entry(ctx, VIRGL_OBJ_BIND_HEADER); uint32_t handle = get_buf_entry(ctx, VIRGL_OBJ_BIND_HANDLE); uint8_t obj_type = (header >> 8) & 0xff; switch (obj_type) { case VIRGL_OBJECT_BLEND: vrend_object_bind_blend(ctx->grctx, handle); break; case VIRGL_OBJECT_DSA: vrend_object_bind_dsa(ctx->grctx, handle); break; case VIRGL_OBJECT_RASTERIZER: vrend_object_bind_rasterizer(ctx->grctx, handle); break; case VIRGL_OBJECT_VERTEX_ELEMENTS: vrend_bind_vertex_elements_state(ctx->grctx, handle); break; default: return EINVAL; } return 0; }
DoS
0
static int vrend_decode_bind_object(struct vrend_decode_ctx *ctx, uint16_t length) { if (length != 1) return EINVAL; uint32_t header = get_buf_entry(ctx, VIRGL_OBJ_BIND_HEADER); uint32_t handle = get_buf_entry(ctx, VIRGL_OBJ_BIND_HANDLE); uint8_t obj_type = (header >> 8) & 0xff; switch (obj_type) { case VIRGL_OBJECT_BLEND: vrend_object_bind_blend(ctx->grctx, handle); break; case VIRGL_OBJECT_DSA: vrend_object_bind_dsa(ctx->grctx, handle); break; case VIRGL_OBJECT_RASTERIZER: vrend_object_bind_rasterizer(ctx->grctx, handle); break; case VIRGL_OBJECT_VERTEX_ELEMENTS: vrend_bind_vertex_elements_state(ctx->grctx, handle); break; default: return EINVAL; } return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,259
static int vrend_decode_bind_sampler_states(struct vrend_decode_ctx *ctx, int length) { if (length < 2) return EINVAL; uint32_t shader_type = get_buf_entry(ctx, VIRGL_BIND_SAMPLER_STATES_SHADER_TYPE); uint32_t start_slot = get_buf_entry(ctx, VIRGL_BIND_SAMPLER_STATES_START_SLOT); uint32_t num_states = length - 2; if (shader_type >= PIPE_SHADER_TYPES) return EINVAL; vrend_bind_sampler_states(ctx->grctx, shader_type, start_slot, num_states, get_buf_ptr(ctx, VIRGL_BIND_SAMPLER_STATES_S0_HANDLE)); return 0; }
DoS
0
static int vrend_decode_bind_sampler_states(struct vrend_decode_ctx *ctx, int length) { if (length < 2) return EINVAL; uint32_t shader_type = get_buf_entry(ctx, VIRGL_BIND_SAMPLER_STATES_SHADER_TYPE); uint32_t start_slot = get_buf_entry(ctx, VIRGL_BIND_SAMPLER_STATES_START_SLOT); uint32_t num_states = length - 2; if (shader_type >= PIPE_SHADER_TYPES) return EINVAL; vrend_bind_sampler_states(ctx->grctx, shader_type, start_slot, num_states, get_buf_ptr(ctx, VIRGL_BIND_SAMPLER_STATES_S0_HANDLE)); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,260
static int vrend_decode_bind_shader(struct vrend_decode_ctx *ctx, int length) { uint32_t handle, type; if (length != VIRGL_BIND_SHADER_SIZE) return EINVAL; handle = get_buf_entry(ctx, VIRGL_BIND_SHADER_HANDLE); type = get_buf_entry(ctx, VIRGL_BIND_SHADER_TYPE); vrend_bind_shader(ctx->grctx, handle, type); return 0; }
DoS
0
static int vrend_decode_bind_shader(struct vrend_decode_ctx *ctx, int length) { uint32_t handle, type; if (length != VIRGL_BIND_SHADER_SIZE) return EINVAL; handle = get_buf_entry(ctx, VIRGL_BIND_SHADER_HANDLE); type = get_buf_entry(ctx, VIRGL_BIND_SHADER_TYPE); vrend_bind_shader(ctx->grctx, handle, type); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,261
static int vrend_decode_blit(struct vrend_decode_ctx *ctx, int length) { struct pipe_blit_info info; uint32_t dst_handle, src_handle, temp; if (length != VIRGL_CMD_BLIT_SIZE) return EINVAL; temp = get_buf_entry(ctx, VIRGL_CMD_BLIT_S0); info.mask = temp & 0xff; info.filter = (temp >> 8) & 0x3; info.scissor_enable = (temp >> 10) & 0x1; info.render_condition_enable = (temp >> 11) & 0x1; info.alpha_blend = (temp >> 12) & 0x1; temp = get_buf_entry(ctx, VIRGL_CMD_BLIT_SCISSOR_MINX_MINY); info.scissor.minx = temp & 0xffff; info.scissor.miny = (temp >> 16) & 0xffff; temp = get_buf_entry(ctx, VIRGL_CMD_BLIT_SCISSOR_MAXX_MAXY); info.scissor.maxx = temp & 0xffff; info.scissor.maxy = (temp >> 16) & 0xffff; dst_handle = get_buf_entry(ctx, VIRGL_CMD_BLIT_DST_RES_HANDLE); info.dst.level = get_buf_entry(ctx, VIRGL_CMD_BLIT_DST_LEVEL); info.dst.format = get_buf_entry(ctx, VIRGL_CMD_BLIT_DST_FORMAT); info.dst.box.x = get_buf_entry(ctx, VIRGL_CMD_BLIT_DST_X); info.dst.box.y = get_buf_entry(ctx, VIRGL_CMD_BLIT_DST_Y); info.dst.box.z = get_buf_entry(ctx, VIRGL_CMD_BLIT_DST_Z); info.dst.box.width = get_buf_entry(ctx, VIRGL_CMD_BLIT_DST_W); info.dst.box.height = get_buf_entry(ctx, VIRGL_CMD_BLIT_DST_H); info.dst.box.depth = get_buf_entry(ctx, VIRGL_CMD_BLIT_DST_D); src_handle = get_buf_entry(ctx, VIRGL_CMD_BLIT_SRC_RES_HANDLE); info.src.level = get_buf_entry(ctx, VIRGL_CMD_BLIT_SRC_LEVEL); info.src.format = get_buf_entry(ctx, VIRGL_CMD_BLIT_SRC_FORMAT); info.src.box.x = get_buf_entry(ctx, VIRGL_CMD_BLIT_SRC_X); info.src.box.y = get_buf_entry(ctx, VIRGL_CMD_BLIT_SRC_Y); info.src.box.z = get_buf_entry(ctx, VIRGL_CMD_BLIT_SRC_Z); info.src.box.width = get_buf_entry(ctx, VIRGL_CMD_BLIT_SRC_W); info.src.box.height = get_buf_entry(ctx, VIRGL_CMD_BLIT_SRC_H); info.src.box.depth = get_buf_entry(ctx, VIRGL_CMD_BLIT_SRC_D); vrend_renderer_blit(ctx->grctx, dst_handle, src_handle, &info); return 0; }
DoS
0
static int vrend_decode_blit(struct vrend_decode_ctx *ctx, int length) { struct pipe_blit_info info; uint32_t dst_handle, src_handle, temp; if (length != VIRGL_CMD_BLIT_SIZE) return EINVAL; temp = get_buf_entry(ctx, VIRGL_CMD_BLIT_S0); info.mask = temp & 0xff; info.filter = (temp >> 8) & 0x3; info.scissor_enable = (temp >> 10) & 0x1; info.render_condition_enable = (temp >> 11) & 0x1; info.alpha_blend = (temp >> 12) & 0x1; temp = get_buf_entry(ctx, VIRGL_CMD_BLIT_SCISSOR_MINX_MINY); info.scissor.minx = temp & 0xffff; info.scissor.miny = (temp >> 16) & 0xffff; temp = get_buf_entry(ctx, VIRGL_CMD_BLIT_SCISSOR_MAXX_MAXY); info.scissor.maxx = temp & 0xffff; info.scissor.maxy = (temp >> 16) & 0xffff; dst_handle = get_buf_entry(ctx, VIRGL_CMD_BLIT_DST_RES_HANDLE); info.dst.level = get_buf_entry(ctx, VIRGL_CMD_BLIT_DST_LEVEL); info.dst.format = get_buf_entry(ctx, VIRGL_CMD_BLIT_DST_FORMAT); info.dst.box.x = get_buf_entry(ctx, VIRGL_CMD_BLIT_DST_X); info.dst.box.y = get_buf_entry(ctx, VIRGL_CMD_BLIT_DST_Y); info.dst.box.z = get_buf_entry(ctx, VIRGL_CMD_BLIT_DST_Z); info.dst.box.width = get_buf_entry(ctx, VIRGL_CMD_BLIT_DST_W); info.dst.box.height = get_buf_entry(ctx, VIRGL_CMD_BLIT_DST_H); info.dst.box.depth = get_buf_entry(ctx, VIRGL_CMD_BLIT_DST_D); src_handle = get_buf_entry(ctx, VIRGL_CMD_BLIT_SRC_RES_HANDLE); info.src.level = get_buf_entry(ctx, VIRGL_CMD_BLIT_SRC_LEVEL); info.src.format = get_buf_entry(ctx, VIRGL_CMD_BLIT_SRC_FORMAT); info.src.box.x = get_buf_entry(ctx, VIRGL_CMD_BLIT_SRC_X); info.src.box.y = get_buf_entry(ctx, VIRGL_CMD_BLIT_SRC_Y); info.src.box.z = get_buf_entry(ctx, VIRGL_CMD_BLIT_SRC_Z); info.src.box.width = get_buf_entry(ctx, VIRGL_CMD_BLIT_SRC_W); info.src.box.height = get_buf_entry(ctx, VIRGL_CMD_BLIT_SRC_H); info.src.box.depth = get_buf_entry(ctx, VIRGL_CMD_BLIT_SRC_D); vrend_renderer_blit(ctx->grctx, dst_handle, src_handle, &info); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,262
static int vrend_decode_clear(struct vrend_decode_ctx *ctx, int length) { union pipe_color_union color; double depth; unsigned stencil, buffers; int i; if (length != VIRGL_OBJ_CLEAR_SIZE) return EINVAL; buffers = get_buf_entry(ctx, VIRGL_OBJ_CLEAR_BUFFERS); for (i = 0; i < 4; i++) color.ui[i] = get_buf_entry(ctx, VIRGL_OBJ_CLEAR_COLOR_0 + i); depth = *(double *)(uint64_t *)get_buf_ptr(ctx, VIRGL_OBJ_CLEAR_DEPTH_0); stencil = get_buf_entry(ctx, VIRGL_OBJ_CLEAR_STENCIL); vrend_clear(ctx->grctx, buffers, &color, depth, stencil); return 0; }
DoS
0
static int vrend_decode_clear(struct vrend_decode_ctx *ctx, int length) { union pipe_color_union color; double depth; unsigned stencil, buffers; int i; if (length != VIRGL_OBJ_CLEAR_SIZE) return EINVAL; buffers = get_buf_entry(ctx, VIRGL_OBJ_CLEAR_BUFFERS); for (i = 0; i < 4; i++) color.ui[i] = get_buf_entry(ctx, VIRGL_OBJ_CLEAR_COLOR_0 + i); depth = *(double *)(uint64_t *)get_buf_ptr(ctx, VIRGL_OBJ_CLEAR_DEPTH_0); stencil = get_buf_entry(ctx, VIRGL_OBJ_CLEAR_STENCIL); vrend_clear(ctx->grctx, buffers, &color, depth, stencil); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,263
static int vrend_decode_create_blend(struct vrend_decode_ctx *ctx, uint32_t handle, uint16_t length) { struct pipe_blend_state *blend_state; uint32_t tmp; int i; if (length != VIRGL_OBJ_BLEND_SIZE) { return EINVAL; } blend_state = CALLOC_STRUCT(pipe_blend_state); if (!blend_state) return ENOMEM; tmp = get_buf_entry(ctx, VIRGL_OBJ_BLEND_S0); blend_state->independent_blend_enable = (tmp & 1); blend_state->logicop_enable = (tmp >> 1) & 0x1; blend_state->dither = (tmp >> 2) & 0x1; blend_state->alpha_to_coverage = (tmp >> 3) & 0x1; blend_state->alpha_to_one = (tmp >> 4) & 0x1; tmp = get_buf_entry(ctx, VIRGL_OBJ_BLEND_S1); blend_state->logicop_func = tmp & 0xf; for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) { tmp = get_buf_entry(ctx, VIRGL_OBJ_BLEND_S2(i)); blend_state->rt[i].blend_enable = tmp & 0x1; blend_state->rt[i].rgb_func = (tmp >> 1) & 0x7; blend_state->rt[i].rgb_src_factor = (tmp >> 4) & 0x1f; blend_state->rt[i].rgb_dst_factor = (tmp >> 9) & 0x1f; blend_state->rt[i].alpha_func = (tmp >> 14) & 0x7; blend_state->rt[i].alpha_src_factor = (tmp >> 17) & 0x1f; blend_state->rt[i].alpha_dst_factor = (tmp >> 22) & 0x1f; blend_state->rt[i].colormask = (tmp >> 27) & 0xf; } tmp = vrend_renderer_object_insert(ctx->grctx, blend_state, sizeof(struct pipe_blend_state), handle, VIRGL_OBJECT_BLEND); if (tmp == 0) { FREE(blend_state); return ENOMEM; } return 0; }
DoS
0
static int vrend_decode_create_blend(struct vrend_decode_ctx *ctx, uint32_t handle, uint16_t length) { struct pipe_blend_state *blend_state; uint32_t tmp; int i; if (length != VIRGL_OBJ_BLEND_SIZE) { return EINVAL; } blend_state = CALLOC_STRUCT(pipe_blend_state); if (!blend_state) return ENOMEM; tmp = get_buf_entry(ctx, VIRGL_OBJ_BLEND_S0); blend_state->independent_blend_enable = (tmp & 1); blend_state->logicop_enable = (tmp >> 1) & 0x1; blend_state->dither = (tmp >> 2) & 0x1; blend_state->alpha_to_coverage = (tmp >> 3) & 0x1; blend_state->alpha_to_one = (tmp >> 4) & 0x1; tmp = get_buf_entry(ctx, VIRGL_OBJ_BLEND_S1); blend_state->logicop_func = tmp & 0xf; for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) { tmp = get_buf_entry(ctx, VIRGL_OBJ_BLEND_S2(i)); blend_state->rt[i].blend_enable = tmp & 0x1; blend_state->rt[i].rgb_func = (tmp >> 1) & 0x7; blend_state->rt[i].rgb_src_factor = (tmp >> 4) & 0x1f; blend_state->rt[i].rgb_dst_factor = (tmp >> 9) & 0x1f; blend_state->rt[i].alpha_func = (tmp >> 14) & 0x7; blend_state->rt[i].alpha_src_factor = (tmp >> 17) & 0x1f; blend_state->rt[i].alpha_dst_factor = (tmp >> 22) & 0x1f; blend_state->rt[i].colormask = (tmp >> 27) & 0xf; } tmp = vrend_renderer_object_insert(ctx->grctx, blend_state, sizeof(struct pipe_blend_state), handle, VIRGL_OBJECT_BLEND); if (tmp == 0) { FREE(blend_state); return ENOMEM; } return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,264
static int vrend_decode_create_dsa(struct vrend_decode_ctx *ctx, uint32_t handle, uint16_t length) { int i; struct pipe_depth_stencil_alpha_state *dsa_state; uint32_t tmp; if (length != VIRGL_OBJ_DSA_SIZE) return EINVAL; dsa_state = CALLOC_STRUCT(pipe_depth_stencil_alpha_state); if (!dsa_state) return ENOMEM; tmp = get_buf_entry(ctx, VIRGL_OBJ_DSA_S0); dsa_state->depth.enabled = tmp & 0x1; dsa_state->depth.writemask = (tmp >> 1) & 0x1; dsa_state->depth.func = (tmp >> 2) & 0x7; dsa_state->alpha.enabled = (tmp >> 8) & 0x1; dsa_state->alpha.func = (tmp >> 9) & 0x7; for (i = 0; i < 2; i++) { tmp = get_buf_entry(ctx, VIRGL_OBJ_DSA_S1 + i); dsa_state->stencil[i].enabled = tmp & 0x1; dsa_state->stencil[i].func = (tmp >> 1) & 0x7; dsa_state->stencil[i].fail_op = (tmp >> 4) & 0x7; dsa_state->stencil[i].zpass_op = (tmp >> 7) & 0x7; dsa_state->stencil[i].zfail_op = (tmp >> 10) & 0x7; dsa_state->stencil[i].valuemask = (tmp >> 13) & 0xff; dsa_state->stencil[i].writemask = (tmp >> 21) & 0xff; } tmp = get_buf_entry(ctx, VIRGL_OBJ_DSA_ALPHA_REF); dsa_state->alpha.ref_value = uif(tmp); tmp = vrend_renderer_object_insert(ctx->grctx, dsa_state, sizeof(struct pipe_depth_stencil_alpha_state), handle, VIRGL_OBJECT_DSA); if (tmp == 0) { FREE(dsa_state); return ENOMEM; } return 0; }
DoS
0
static int vrend_decode_create_dsa(struct vrend_decode_ctx *ctx, uint32_t handle, uint16_t length) { int i; struct pipe_depth_stencil_alpha_state *dsa_state; uint32_t tmp; if (length != VIRGL_OBJ_DSA_SIZE) return EINVAL; dsa_state = CALLOC_STRUCT(pipe_depth_stencil_alpha_state); if (!dsa_state) return ENOMEM; tmp = get_buf_entry(ctx, VIRGL_OBJ_DSA_S0); dsa_state->depth.enabled = tmp & 0x1; dsa_state->depth.writemask = (tmp >> 1) & 0x1; dsa_state->depth.func = (tmp >> 2) & 0x7; dsa_state->alpha.enabled = (tmp >> 8) & 0x1; dsa_state->alpha.func = (tmp >> 9) & 0x7; for (i = 0; i < 2; i++) { tmp = get_buf_entry(ctx, VIRGL_OBJ_DSA_S1 + i); dsa_state->stencil[i].enabled = tmp & 0x1; dsa_state->stencil[i].func = (tmp >> 1) & 0x7; dsa_state->stencil[i].fail_op = (tmp >> 4) & 0x7; dsa_state->stencil[i].zpass_op = (tmp >> 7) & 0x7; dsa_state->stencil[i].zfail_op = (tmp >> 10) & 0x7; dsa_state->stencil[i].valuemask = (tmp >> 13) & 0xff; dsa_state->stencil[i].writemask = (tmp >> 21) & 0xff; } tmp = get_buf_entry(ctx, VIRGL_OBJ_DSA_ALPHA_REF); dsa_state->alpha.ref_value = uif(tmp); tmp = vrend_renderer_object_insert(ctx->grctx, dsa_state, sizeof(struct pipe_depth_stencil_alpha_state), handle, VIRGL_OBJECT_DSA); if (tmp == 0) { FREE(dsa_state); return ENOMEM; } return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,265
static int vrend_decode_create_object(struct vrend_decode_ctx *ctx, int length) { if (length < 1) return EINVAL; uint32_t header = get_buf_entry(ctx, VIRGL_OBJ_CREATE_HEADER); uint32_t handle = get_buf_entry(ctx, VIRGL_OBJ_CREATE_HANDLE); uint8_t obj_type = (header >> 8) & 0xff; int ret = 0; if (handle == 0) return EINVAL; switch (obj_type){ case VIRGL_OBJECT_BLEND: ret = vrend_decode_create_blend(ctx, handle, length); break; case VIRGL_OBJECT_DSA: ret = vrend_decode_create_dsa(ctx, handle, length); break; case VIRGL_OBJECT_RASTERIZER: ret = vrend_decode_create_rasterizer(ctx, handle, length); break; case VIRGL_OBJECT_SHADER: ret = vrend_decode_create_shader(ctx, handle, length); break; case VIRGL_OBJECT_VERTEX_ELEMENTS: ret = vrend_decode_create_ve(ctx, handle, length); break; case VIRGL_OBJECT_SURFACE: ret = vrend_decode_create_surface(ctx, handle, length); break; case VIRGL_OBJECT_SAMPLER_VIEW: ret = vrend_decode_create_sampler_view(ctx, handle, length); break; case VIRGL_OBJECT_SAMPLER_STATE: ret = vrend_decode_create_sampler_state(ctx, handle, length); break; case VIRGL_OBJECT_QUERY: ret = vrend_decode_create_query(ctx, handle, length); break; case VIRGL_OBJECT_STREAMOUT_TARGET: ret = vrend_decode_create_stream_output_target(ctx, handle, length); break; default: return EINVAL; } return ret; }
DoS
0
static int vrend_decode_create_object(struct vrend_decode_ctx *ctx, int length) { if (length < 1) return EINVAL; uint32_t header = get_buf_entry(ctx, VIRGL_OBJ_CREATE_HEADER); uint32_t handle = get_buf_entry(ctx, VIRGL_OBJ_CREATE_HANDLE); uint8_t obj_type = (header >> 8) & 0xff; int ret = 0; if (handle == 0) return EINVAL; switch (obj_type){ case VIRGL_OBJECT_BLEND: ret = vrend_decode_create_blend(ctx, handle, length); break; case VIRGL_OBJECT_DSA: ret = vrend_decode_create_dsa(ctx, handle, length); break; case VIRGL_OBJECT_RASTERIZER: ret = vrend_decode_create_rasterizer(ctx, handle, length); break; case VIRGL_OBJECT_SHADER: ret = vrend_decode_create_shader(ctx, handle, length); break; case VIRGL_OBJECT_VERTEX_ELEMENTS: ret = vrend_decode_create_ve(ctx, handle, length); break; case VIRGL_OBJECT_SURFACE: ret = vrend_decode_create_surface(ctx, handle, length); break; case VIRGL_OBJECT_SAMPLER_VIEW: ret = vrend_decode_create_sampler_view(ctx, handle, length); break; case VIRGL_OBJECT_SAMPLER_STATE: ret = vrend_decode_create_sampler_state(ctx, handle, length); break; case VIRGL_OBJECT_QUERY: ret = vrend_decode_create_query(ctx, handle, length); break; case VIRGL_OBJECT_STREAMOUT_TARGET: ret = vrend_decode_create_stream_output_target(ctx, handle, length); break; default: return EINVAL; } return ret; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,266
static int vrend_decode_create_query(struct vrend_decode_ctx *ctx, uint32_t handle, uint16_t length) { uint32_t query_type; uint32_t query_index; uint32_t res_handle; uint32_t offset; uint32_t tmp; if (length != VIRGL_OBJ_QUERY_SIZE) return EINVAL; tmp = get_buf_entry(ctx, VIRGL_OBJ_QUERY_TYPE_INDEX); query_type = VIRGL_OBJ_QUERY_TYPE(tmp); query_index = VIRGL_OBJ_QUERY_INDEX(tmp); offset = get_buf_entry(ctx, VIRGL_OBJ_QUERY_OFFSET); res_handle = get_buf_entry(ctx, VIRGL_OBJ_QUERY_RES_HANDLE); return vrend_create_query(ctx->grctx, handle, query_type, query_index, res_handle, offset); }
DoS
0
static int vrend_decode_create_query(struct vrend_decode_ctx *ctx, uint32_t handle, uint16_t length) { uint32_t query_type; uint32_t query_index; uint32_t res_handle; uint32_t offset; uint32_t tmp; if (length != VIRGL_OBJ_QUERY_SIZE) return EINVAL; tmp = get_buf_entry(ctx, VIRGL_OBJ_QUERY_TYPE_INDEX); query_type = VIRGL_OBJ_QUERY_TYPE(tmp); query_index = VIRGL_OBJ_QUERY_INDEX(tmp); offset = get_buf_entry(ctx, VIRGL_OBJ_QUERY_OFFSET); res_handle = get_buf_entry(ctx, VIRGL_OBJ_QUERY_RES_HANDLE); return vrend_create_query(ctx->grctx, handle, query_type, query_index, res_handle, offset); }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,267
static int vrend_decode_create_rasterizer(struct vrend_decode_ctx *ctx, uint32_t handle, uint16_t length) { struct pipe_rasterizer_state *rs_state; uint32_t tmp; if (length != VIRGL_OBJ_RS_SIZE) return EINVAL; rs_state = CALLOC_STRUCT(pipe_rasterizer_state); if (!rs_state) return ENOMEM; tmp = get_buf_entry(ctx, VIRGL_OBJ_RS_S0); #define ebit(name, bit) rs_state->name = (tmp >> bit) & 0x1 #define emask(name, bit, mask) rs_state->name = (tmp >> bit) & mask ebit(flatshade, 0); ebit(depth_clip, 1); ebit(clip_halfz, 2); ebit(rasterizer_discard, 3); ebit(flatshade_first, 4); ebit(light_twoside, 5); ebit(sprite_coord_mode, 6); ebit(point_quad_rasterization, 7); emask(cull_face, 8, 0x3); emask(fill_front, 10, 0x3); emask(fill_back, 12, 0x3); ebit(scissor, 14); ebit(front_ccw, 15); ebit(clamp_vertex_color, 16); ebit(clamp_fragment_color, 17); ebit(offset_line, 18); ebit(offset_point, 19); ebit(offset_tri, 20); ebit(poly_smooth, 21); ebit(poly_stipple_enable, 22); ebit(point_smooth, 23); ebit(point_size_per_vertex, 24); ebit(multisample, 25); ebit(line_smooth, 26); ebit(line_stipple_enable, 27); ebit(line_last_pixel, 28); ebit(half_pixel_center, 29); ebit(bottom_edge_rule, 30); rs_state->point_size = uif(get_buf_entry(ctx, VIRGL_OBJ_RS_POINT_SIZE)); rs_state->sprite_coord_enable = get_buf_entry(ctx, VIRGL_OBJ_RS_SPRITE_COORD_ENABLE); tmp = get_buf_entry(ctx, VIRGL_OBJ_RS_S3); emask(line_stipple_pattern, 0, 0xffff); emask(line_stipple_factor, 16, 0xff); emask(clip_plane_enable, 24, 0xff); rs_state->line_width = uif(get_buf_entry(ctx, VIRGL_OBJ_RS_LINE_WIDTH)); rs_state->offset_units = uif(get_buf_entry(ctx, VIRGL_OBJ_RS_OFFSET_UNITS)); rs_state->offset_scale = uif(get_buf_entry(ctx, VIRGL_OBJ_RS_OFFSET_SCALE)); rs_state->offset_clamp = uif(get_buf_entry(ctx, VIRGL_OBJ_RS_OFFSET_CLAMP)); tmp = vrend_renderer_object_insert(ctx->grctx, rs_state, sizeof(struct pipe_rasterizer_state), handle, VIRGL_OBJECT_RASTERIZER); if (tmp == 0) { FREE(rs_state); return ENOMEM; } return 0; }
DoS
0
static int vrend_decode_create_rasterizer(struct vrend_decode_ctx *ctx, uint32_t handle, uint16_t length) { struct pipe_rasterizer_state *rs_state; uint32_t tmp; if (length != VIRGL_OBJ_RS_SIZE) return EINVAL; rs_state = CALLOC_STRUCT(pipe_rasterizer_state); if (!rs_state) return ENOMEM; tmp = get_buf_entry(ctx, VIRGL_OBJ_RS_S0); #define ebit(name, bit) rs_state->name = (tmp >> bit) & 0x1 #define emask(name, bit, mask) rs_state->name = (tmp >> bit) & mask ebit(flatshade, 0); ebit(depth_clip, 1); ebit(clip_halfz, 2); ebit(rasterizer_discard, 3); ebit(flatshade_first, 4); ebit(light_twoside, 5); ebit(sprite_coord_mode, 6); ebit(point_quad_rasterization, 7); emask(cull_face, 8, 0x3); emask(fill_front, 10, 0x3); emask(fill_back, 12, 0x3); ebit(scissor, 14); ebit(front_ccw, 15); ebit(clamp_vertex_color, 16); ebit(clamp_fragment_color, 17); ebit(offset_line, 18); ebit(offset_point, 19); ebit(offset_tri, 20); ebit(poly_smooth, 21); ebit(poly_stipple_enable, 22); ebit(point_smooth, 23); ebit(point_size_per_vertex, 24); ebit(multisample, 25); ebit(line_smooth, 26); ebit(line_stipple_enable, 27); ebit(line_last_pixel, 28); ebit(half_pixel_center, 29); ebit(bottom_edge_rule, 30); rs_state->point_size = uif(get_buf_entry(ctx, VIRGL_OBJ_RS_POINT_SIZE)); rs_state->sprite_coord_enable = get_buf_entry(ctx, VIRGL_OBJ_RS_SPRITE_COORD_ENABLE); tmp = get_buf_entry(ctx, VIRGL_OBJ_RS_S3); emask(line_stipple_pattern, 0, 0xffff); emask(line_stipple_factor, 16, 0xff); emask(clip_plane_enable, 24, 0xff); rs_state->line_width = uif(get_buf_entry(ctx, VIRGL_OBJ_RS_LINE_WIDTH)); rs_state->offset_units = uif(get_buf_entry(ctx, VIRGL_OBJ_RS_OFFSET_UNITS)); rs_state->offset_scale = uif(get_buf_entry(ctx, VIRGL_OBJ_RS_OFFSET_SCALE)); rs_state->offset_clamp = uif(get_buf_entry(ctx, VIRGL_OBJ_RS_OFFSET_CLAMP)); tmp = vrend_renderer_object_insert(ctx->grctx, rs_state, sizeof(struct pipe_rasterizer_state), handle, VIRGL_OBJECT_RASTERIZER); if (tmp == 0) { FREE(rs_state); return ENOMEM; } return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,268
static int vrend_decode_create_sampler_state(struct vrend_decode_ctx *ctx, uint32_t handle, uint16_t length) { struct pipe_sampler_state state; int i; uint32_t tmp; if (length != VIRGL_OBJ_SAMPLER_STATE_SIZE) return EINVAL; tmp = get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_STATE_S0); state.wrap_s = tmp & 0x7; state.wrap_t = (tmp >> 3) & 0x7; state.wrap_r = (tmp >> 6) & 0x7; state.min_img_filter = (tmp >> 9) & 0x3; state.min_mip_filter = (tmp >> 11) & 0x3; state.mag_img_filter = (tmp >> 13) & 0x3; state.compare_mode = (tmp >> 15) & 0x1; state.compare_func = (tmp >> 16) & 0x7; state.lod_bias = uif(get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_STATE_LOD_BIAS)); state.min_lod = uif(get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_STATE_MIN_LOD)); state.max_lod = uif(get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_STATE_MAX_LOD)); for (i = 0; i < 4; i++) state.border_color.ui[i] = get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_STATE_BORDER_COLOR(i)); return vrend_create_sampler_state(ctx->grctx, handle, &state); }
DoS
0
static int vrend_decode_create_sampler_state(struct vrend_decode_ctx *ctx, uint32_t handle, uint16_t length) { struct pipe_sampler_state state; int i; uint32_t tmp; if (length != VIRGL_OBJ_SAMPLER_STATE_SIZE) return EINVAL; tmp = get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_STATE_S0); state.wrap_s = tmp & 0x7; state.wrap_t = (tmp >> 3) & 0x7; state.wrap_r = (tmp >> 6) & 0x7; state.min_img_filter = (tmp >> 9) & 0x3; state.min_mip_filter = (tmp >> 11) & 0x3; state.mag_img_filter = (tmp >> 13) & 0x3; state.compare_mode = (tmp >> 15) & 0x1; state.compare_func = (tmp >> 16) & 0x7; state.lod_bias = uif(get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_STATE_LOD_BIAS)); state.min_lod = uif(get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_STATE_MIN_LOD)); state.max_lod = uif(get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_STATE_MAX_LOD)); for (i = 0; i < 4; i++) state.border_color.ui[i] = get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_STATE_BORDER_COLOR(i)); return vrend_create_sampler_state(ctx->grctx, handle, &state); }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,269
static int vrend_decode_create_sampler_view(struct vrend_decode_ctx *ctx, uint32_t handle, uint16_t length) { uint32_t res_handle, format, val0, val1, swizzle_packed; if (length != VIRGL_OBJ_SAMPLER_VIEW_SIZE) return EINVAL; res_handle = get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_VIEW_RES_HANDLE); format = get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_VIEW_FORMAT); val0 = get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_VIEW_BUFFER_FIRST_ELEMENT); val1 = get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_VIEW_BUFFER_LAST_ELEMENT); swizzle_packed = get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_VIEW_SWIZZLE); return vrend_create_sampler_view(ctx->grctx, handle, res_handle, format, val0, val1,swizzle_packed); }
DoS
0
static int vrend_decode_create_sampler_view(struct vrend_decode_ctx *ctx, uint32_t handle, uint16_t length) { uint32_t res_handle, format, val0, val1, swizzle_packed; if (length != VIRGL_OBJ_SAMPLER_VIEW_SIZE) return EINVAL; res_handle = get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_VIEW_RES_HANDLE); format = get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_VIEW_FORMAT); val0 = get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_VIEW_BUFFER_FIRST_ELEMENT); val1 = get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_VIEW_BUFFER_LAST_ELEMENT); swizzle_packed = get_buf_entry(ctx, VIRGL_OBJ_SAMPLER_VIEW_SWIZZLE); return vrend_create_sampler_view(ctx->grctx, handle, res_handle, format, val0, val1,swizzle_packed); }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,270
static int vrend_decode_create_stream_output_target(struct vrend_decode_ctx *ctx, uint32_t handle, uint16_t length) { uint32_t res_handle, buffer_size, buffer_offset; if (length != VIRGL_OBJ_STREAMOUT_SIZE) return EINVAL; res_handle = get_buf_entry(ctx, VIRGL_OBJ_STREAMOUT_RES_HANDLE); buffer_offset = get_buf_entry(ctx, VIRGL_OBJ_STREAMOUT_BUFFER_OFFSET); buffer_size = get_buf_entry(ctx, VIRGL_OBJ_STREAMOUT_BUFFER_SIZE); return vrend_create_so_target(ctx->grctx, handle, res_handle, buffer_offset, buffer_size); }
DoS
0
static int vrend_decode_create_stream_output_target(struct vrend_decode_ctx *ctx, uint32_t handle, uint16_t length) { uint32_t res_handle, buffer_size, buffer_offset; if (length != VIRGL_OBJ_STREAMOUT_SIZE) return EINVAL; res_handle = get_buf_entry(ctx, VIRGL_OBJ_STREAMOUT_RES_HANDLE); buffer_offset = get_buf_entry(ctx, VIRGL_OBJ_STREAMOUT_BUFFER_OFFSET); buffer_size = get_buf_entry(ctx, VIRGL_OBJ_STREAMOUT_BUFFER_SIZE); return vrend_create_so_target(ctx->grctx, handle, res_handle, buffer_offset, buffer_size); }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,271
static int vrend_decode_create_surface(struct vrend_decode_ctx *ctx, uint32_t handle, uint16_t length) { uint32_t res_handle, format, val0, val1; int ret; if (length != VIRGL_OBJ_SURFACE_SIZE) return EINVAL; res_handle = get_buf_entry(ctx, VIRGL_OBJ_SURFACE_RES_HANDLE); format = get_buf_entry(ctx, VIRGL_OBJ_SURFACE_FORMAT); /* decide later if these are texture or buffer */ val0 = get_buf_entry(ctx, VIRGL_OBJ_SURFACE_BUFFER_FIRST_ELEMENT); val1 = get_buf_entry(ctx, VIRGL_OBJ_SURFACE_BUFFER_LAST_ELEMENT); ret = vrend_create_surface(ctx->grctx, handle, res_handle, format, val0, val1); return ret; }
DoS
0
static int vrend_decode_create_surface(struct vrend_decode_ctx *ctx, uint32_t handle, uint16_t length) { uint32_t res_handle, format, val0, val1; int ret; if (length != VIRGL_OBJ_SURFACE_SIZE) return EINVAL; res_handle = get_buf_entry(ctx, VIRGL_OBJ_SURFACE_RES_HANDLE); format = get_buf_entry(ctx, VIRGL_OBJ_SURFACE_FORMAT); /* decide later if these are texture or buffer */ val0 = get_buf_entry(ctx, VIRGL_OBJ_SURFACE_BUFFER_FIRST_ELEMENT); val1 = get_buf_entry(ctx, VIRGL_OBJ_SURFACE_BUFFER_LAST_ELEMENT); ret = vrend_create_surface(ctx->grctx, handle, res_handle, format, val0, val1); return ret; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,272
static int vrend_decode_create_ve(struct vrend_decode_ctx *ctx, uint32_t handle, uint16_t length) { struct pipe_vertex_element *ve = NULL; int num_elements; int i; int ret; if (length < 1) return EINVAL; if ((length - 1) % 4) return EINVAL; num_elements = (length - 1) / 4; if (num_elements) { ve = calloc(num_elements, sizeof(struct pipe_vertex_element)); if (!ve) return ENOMEM; for (i = 0; i < num_elements; i++) { ve[i].src_offset = get_buf_entry(ctx, VIRGL_OBJ_VERTEX_ELEMENTS_V0_SRC_OFFSET(i)); ve[i].instance_divisor = get_buf_entry(ctx, VIRGL_OBJ_VERTEX_ELEMENTS_V0_INSTANCE_DIVISOR(i)); ve[i].vertex_buffer_index = get_buf_entry(ctx, VIRGL_OBJ_VERTEX_ELEMENTS_V0_VERTEX_BUFFER_INDEX(i)); if (ve[i].vertex_buffer_index >= PIPE_MAX_ATTRIBS) return EINVAL; ve[i].src_format = get_buf_entry(ctx, VIRGL_OBJ_VERTEX_ELEMENTS_V0_SRC_FORMAT(i)); } } ret = vrend_create_vertex_elements_state(ctx->grctx, handle, num_elements, ve); FREE(ve); return ret; }
DoS
0
static int vrend_decode_create_ve(struct vrend_decode_ctx *ctx, uint32_t handle, uint16_t length) { struct pipe_vertex_element *ve = NULL; int num_elements; int i; int ret; if (length < 1) return EINVAL; if ((length - 1) % 4) return EINVAL; num_elements = (length - 1) / 4; if (num_elements) { ve = calloc(num_elements, sizeof(struct pipe_vertex_element)); if (!ve) return ENOMEM; for (i = 0; i < num_elements; i++) { ve[i].src_offset = get_buf_entry(ctx, VIRGL_OBJ_VERTEX_ELEMENTS_V0_SRC_OFFSET(i)); ve[i].instance_divisor = get_buf_entry(ctx, VIRGL_OBJ_VERTEX_ELEMENTS_V0_INSTANCE_DIVISOR(i)); ve[i].vertex_buffer_index = get_buf_entry(ctx, VIRGL_OBJ_VERTEX_ELEMENTS_V0_VERTEX_BUFFER_INDEX(i)); if (ve[i].vertex_buffer_index >= PIPE_MAX_ATTRIBS) return EINVAL; ve[i].src_format = get_buf_entry(ctx, VIRGL_OBJ_VERTEX_ELEMENTS_V0_SRC_FORMAT(i)); } } ret = vrend_create_vertex_elements_state(ctx->grctx, handle, num_elements, ve); FREE(ve); return ret; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,273
static int vrend_decode_destroy_object(struct vrend_decode_ctx *ctx, int length) { if (length != 1) return EINVAL; uint32_t handle = get_buf_entry(ctx, VIRGL_OBJ_DESTROY_HANDLE); vrend_renderer_object_destroy(ctx->grctx, handle); return 0; }
DoS
0
static int vrend_decode_destroy_object(struct vrend_decode_ctx *ctx, int length) { if (length != 1) return EINVAL; uint32_t handle = get_buf_entry(ctx, VIRGL_OBJ_DESTROY_HANDLE); vrend_renderer_object_destroy(ctx->grctx, handle); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,274
static int vrend_decode_destroy_sub_ctx(struct vrend_decode_ctx *ctx, int length) { if (length != 1) return EINVAL; uint32_t ctx_sub_id = get_buf_entry(ctx, 1); vrend_renderer_destroy_sub_ctx(ctx->grctx, ctx_sub_id); return 0; }
DoS
0
static int vrend_decode_destroy_sub_ctx(struct vrend_decode_ctx *ctx, int length) { if (length != 1) return EINVAL; uint32_t ctx_sub_id = get_buf_entry(ctx, 1); vrend_renderer_destroy_sub_ctx(ctx->grctx, ctx_sub_id); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,275
static int vrend_decode_end_query(struct vrend_decode_ctx *ctx, int length) { if (length != 1) return EINVAL; uint32_t handle = get_buf_entry(ctx, VIRGL_QUERY_END_HANDLE); vrend_end_query(ctx->grctx, handle); return 0; }
DoS
0
static int vrend_decode_end_query(struct vrend_decode_ctx *ctx, int length) { if (length != 1) return EINVAL; uint32_t handle = get_buf_entry(ctx, VIRGL_QUERY_END_HANDLE); vrend_end_query(ctx->grctx, handle); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,276
static int vrend_decode_get_query_result(struct vrend_decode_ctx *ctx, int length) { if (length != 2) return EINVAL; uint32_t handle = get_buf_entry(ctx, VIRGL_QUERY_RESULT_HANDLE); uint32_t wait = get_buf_entry(ctx, VIRGL_QUERY_RESULT_WAIT); vrend_get_query_result(ctx->grctx, handle, wait); return 0; }
DoS
0
static int vrend_decode_get_query_result(struct vrend_decode_ctx *ctx, int length) { if (length != 2) return EINVAL; uint32_t handle = get_buf_entry(ctx, VIRGL_QUERY_RESULT_HANDLE); uint32_t wait = get_buf_entry(ctx, VIRGL_QUERY_RESULT_WAIT); vrend_get_query_result(ctx->grctx, handle, wait); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,277
static int vrend_decode_resource_inline_write(struct vrend_decode_ctx *ctx, uint16_t length) { struct vrend_transfer_info info; struct pipe_box box; uint32_t res_handle; uint32_t level, usage, stride, layer_stride, data_len; struct iovec dataiovec; void *data; if (length < 12) return EINVAL; if (length + ctx->ds->buf_offset > ctx->ds->buf_total) return EINVAL; res_handle = get_buf_entry(ctx, VIRGL_RESOURCE_IW_RES_HANDLE); data_len = (length - 11) * 4; level = get_buf_entry(ctx, VIRGL_RESOURCE_IW_LEVEL); usage = get_buf_entry(ctx, VIRGL_RESOURCE_IW_USAGE); stride = get_buf_entry(ctx, VIRGL_RESOURCE_IW_STRIDE); layer_stride = get_buf_entry(ctx, VIRGL_RESOURCE_IW_LAYER_STRIDE); box.x = get_buf_entry(ctx, VIRGL_RESOURCE_IW_X); box.y = get_buf_entry(ctx, VIRGL_RESOURCE_IW_Y); box.z = get_buf_entry(ctx, VIRGL_RESOURCE_IW_Z); box.width = get_buf_entry(ctx, VIRGL_RESOURCE_IW_W); box.height = get_buf_entry(ctx, VIRGL_RESOURCE_IW_H); box.depth = get_buf_entry(ctx, VIRGL_RESOURCE_IW_D); data = get_buf_ptr(ctx, VIRGL_RESOURCE_IW_DATA_START); info.handle = res_handle; info.ctx_id = 0; info.level = level; info.stride = stride; info.layer_stride = layer_stride; info.box = &box; info.offset = 0; dataiovec.iov_base = data; dataiovec.iov_len = data_len; info.iovec = &dataiovec; info.iovec_cnt = 1; return vrend_transfer_inline_write(ctx->grctx, &info, usage); }
DoS
0
static int vrend_decode_resource_inline_write(struct vrend_decode_ctx *ctx, uint16_t length) { struct vrend_transfer_info info; struct pipe_box box; uint32_t res_handle; uint32_t level, usage, stride, layer_stride, data_len; struct iovec dataiovec; void *data; if (length < 12) return EINVAL; if (length + ctx->ds->buf_offset > ctx->ds->buf_total) return EINVAL; res_handle = get_buf_entry(ctx, VIRGL_RESOURCE_IW_RES_HANDLE); data_len = (length - 11) * 4; level = get_buf_entry(ctx, VIRGL_RESOURCE_IW_LEVEL); usage = get_buf_entry(ctx, VIRGL_RESOURCE_IW_USAGE); stride = get_buf_entry(ctx, VIRGL_RESOURCE_IW_STRIDE); layer_stride = get_buf_entry(ctx, VIRGL_RESOURCE_IW_LAYER_STRIDE); box.x = get_buf_entry(ctx, VIRGL_RESOURCE_IW_X); box.y = get_buf_entry(ctx, VIRGL_RESOURCE_IW_Y); box.z = get_buf_entry(ctx, VIRGL_RESOURCE_IW_Z); box.width = get_buf_entry(ctx, VIRGL_RESOURCE_IW_W); box.height = get_buf_entry(ctx, VIRGL_RESOURCE_IW_H); box.depth = get_buf_entry(ctx, VIRGL_RESOURCE_IW_D); data = get_buf_ptr(ctx, VIRGL_RESOURCE_IW_DATA_START); info.handle = res_handle; info.ctx_id = 0; info.level = level; info.stride = stride; info.layer_stride = layer_stride; info.box = &box; info.offset = 0; dataiovec.iov_base = data; dataiovec.iov_len = data_len; info.iovec = &dataiovec; info.iovec_cnt = 1; return vrend_transfer_inline_write(ctx->grctx, &info, usage); }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,278
static int vrend_decode_set_blend_color(struct vrend_decode_ctx *ctx, int length) { struct pipe_blend_color color; int i; if (length != VIRGL_SET_BLEND_COLOR_SIZE) return EINVAL; for (i = 0; i < 4; i++) color.color[i] = uif(get_buf_entry(ctx, VIRGL_SET_BLEND_COLOR(i))); vrend_set_blend_color(ctx->grctx, &color); return 0; }
DoS
0
static int vrend_decode_set_blend_color(struct vrend_decode_ctx *ctx, int length) { struct pipe_blend_color color; int i; if (length != VIRGL_SET_BLEND_COLOR_SIZE) return EINVAL; for (i = 0; i < 4; i++) color.color[i] = uif(get_buf_entry(ctx, VIRGL_SET_BLEND_COLOR(i))); vrend_set_blend_color(ctx->grctx, &color); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,279
static int vrend_decode_set_constant_buffer(struct vrend_decode_ctx *ctx, uint16_t length) { uint32_t shader; uint32_t index; int nc = (length - 2); if (length < 2) return EINVAL; shader = get_buf_entry(ctx, VIRGL_SET_CONSTANT_BUFFER_SHADER_TYPE); index = get_buf_entry(ctx, VIRGL_SET_CONSTANT_BUFFER_INDEX); if (shader >= PIPE_SHADER_TYPES) return EINVAL; vrend_set_constants(ctx->grctx, shader, index, nc, get_buf_ptr(ctx, VIRGL_SET_CONSTANT_BUFFER_DATA_START)); return 0; }
DoS
0
static int vrend_decode_set_constant_buffer(struct vrend_decode_ctx *ctx, uint16_t length) { uint32_t shader; uint32_t index; int nc = (length - 2); if (length < 2) return EINVAL; shader = get_buf_entry(ctx, VIRGL_SET_CONSTANT_BUFFER_SHADER_TYPE); index = get_buf_entry(ctx, VIRGL_SET_CONSTANT_BUFFER_INDEX); if (shader >= PIPE_SHADER_TYPES) return EINVAL; vrend_set_constants(ctx->grctx, shader, index, nc, get_buf_ptr(ctx, VIRGL_SET_CONSTANT_BUFFER_DATA_START)); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,280
static int vrend_decode_set_framebuffer_state(struct vrend_decode_ctx *ctx, int length) { if (length < 2) return EINVAL; uint32_t nr_cbufs = get_buf_entry(ctx, VIRGL_SET_FRAMEBUFFER_STATE_NR_CBUFS); uint32_t zsurf_handle = get_buf_entry(ctx, VIRGL_SET_FRAMEBUFFER_STATE_NR_ZSURF_HANDLE); uint32_t surf_handle[8]; int i; if (length != (2 + nr_cbufs)) return EINVAL; if (nr_cbufs > 8) return EINVAL; for (i = 0; i < nr_cbufs; i++) surf_handle[i] = get_buf_entry(ctx, VIRGL_SET_FRAMEBUFFER_STATE_CBUF_HANDLE(i)); vrend_set_framebuffer_state(ctx->grctx, nr_cbufs, surf_handle, zsurf_handle); return 0; }
DoS
0
static int vrend_decode_set_framebuffer_state(struct vrend_decode_ctx *ctx, int length) { if (length < 2) return EINVAL; uint32_t nr_cbufs = get_buf_entry(ctx, VIRGL_SET_FRAMEBUFFER_STATE_NR_CBUFS); uint32_t zsurf_handle = get_buf_entry(ctx, VIRGL_SET_FRAMEBUFFER_STATE_NR_ZSURF_HANDLE); uint32_t surf_handle[8]; int i; if (length != (2 + nr_cbufs)) return EINVAL; if (nr_cbufs > 8) return EINVAL; for (i = 0; i < nr_cbufs; i++) surf_handle[i] = get_buf_entry(ctx, VIRGL_SET_FRAMEBUFFER_STATE_CBUF_HANDLE(i)); vrend_set_framebuffer_state(ctx->grctx, nr_cbufs, surf_handle, zsurf_handle); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,281
static int vrend_decode_set_polygon_stipple(struct vrend_decode_ctx *ctx, int length) { struct pipe_poly_stipple ps; int i; if (length != VIRGL_POLYGON_STIPPLE_SIZE) return EINVAL; for (i = 0; i < 32; i++) ps.stipple[i] = get_buf_entry(ctx, VIRGL_POLYGON_STIPPLE_P0 + i); vrend_set_polygon_stipple(ctx->grctx, &ps); return 0; }
DoS
0
static int vrend_decode_set_polygon_stipple(struct vrend_decode_ctx *ctx, int length) { struct pipe_poly_stipple ps; int i; if (length != VIRGL_POLYGON_STIPPLE_SIZE) return EINVAL; for (i = 0; i < 32; i++) ps.stipple[i] = get_buf_entry(ctx, VIRGL_POLYGON_STIPPLE_P0 + i); vrend_set_polygon_stipple(ctx->grctx, &ps); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,282
static int vrend_decode_set_render_condition(struct vrend_decode_ctx *ctx, int length) { if (length != VIRGL_RENDER_CONDITION_SIZE) return EINVAL; uint32_t handle = get_buf_entry(ctx, VIRGL_RENDER_CONDITION_HANDLE); bool condition = get_buf_entry(ctx, VIRGL_RENDER_CONDITION_CONDITION) & 1; uint mode = get_buf_entry(ctx, VIRGL_RENDER_CONDITION_MODE); vrend_render_condition(ctx->grctx, handle, condition, mode); return 0; }
DoS
0
static int vrend_decode_set_render_condition(struct vrend_decode_ctx *ctx, int length) { if (length != VIRGL_RENDER_CONDITION_SIZE) return EINVAL; uint32_t handle = get_buf_entry(ctx, VIRGL_RENDER_CONDITION_HANDLE); bool condition = get_buf_entry(ctx, VIRGL_RENDER_CONDITION_CONDITION) & 1; uint mode = get_buf_entry(ctx, VIRGL_RENDER_CONDITION_MODE); vrend_render_condition(ctx->grctx, handle, condition, mode); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,283
static int vrend_decode_set_sample_mask(struct vrend_decode_ctx *ctx, int length) { unsigned mask; if (length != VIRGL_SET_SAMPLE_MASK_SIZE) return EINVAL; mask = get_buf_entry(ctx, VIRGL_SET_SAMPLE_MASK_MASK); vrend_set_sample_mask(ctx->grctx, mask); return 0; }
DoS
0
static int vrend_decode_set_sample_mask(struct vrend_decode_ctx *ctx, int length) { unsigned mask; if (length != VIRGL_SET_SAMPLE_MASK_SIZE) return EINVAL; mask = get_buf_entry(ctx, VIRGL_SET_SAMPLE_MASK_MASK); vrend_set_sample_mask(ctx->grctx, mask); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,284
static int vrend_decode_set_stencil_ref(struct vrend_decode_ctx *ctx, int length) { if (length != VIRGL_SET_STENCIL_REF_SIZE) return EINVAL; struct pipe_stencil_ref ref; uint32_t val = get_buf_entry(ctx, VIRGL_SET_STENCIL_REF); ref.ref_value[0] = val & 0xff; ref.ref_value[1] = (val >> 8) & 0xff; vrend_set_stencil_ref(ctx->grctx, &ref); return 0; }
DoS
0
static int vrend_decode_set_stencil_ref(struct vrend_decode_ctx *ctx, int length) { if (length != VIRGL_SET_STENCIL_REF_SIZE) return EINVAL; struct pipe_stencil_ref ref; uint32_t val = get_buf_entry(ctx, VIRGL_SET_STENCIL_REF); ref.ref_value[0] = val & 0xff; ref.ref_value[1] = (val >> 8) & 0xff; vrend_set_stencil_ref(ctx->grctx, &ref); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,285
static int vrend_decode_set_streamout_targets(struct vrend_decode_ctx *ctx, uint16_t length) { uint32_t handles[16]; uint32_t num_handles = length - 1; uint32_t append_bitmask; int i; if (length < 1) return EINVAL; if (num_handles > ARRAY_SIZE(handles)) return EINVAL; append_bitmask = get_buf_entry(ctx, VIRGL_SET_STREAMOUT_TARGETS_APPEND_BITMASK); for (i = 0; i < num_handles; i++) handles[i] = get_buf_entry(ctx, VIRGL_SET_STREAMOUT_TARGETS_H0 + i); vrend_set_streamout_targets(ctx->grctx, append_bitmask, num_handles, handles); return 0; }
DoS
0
static int vrend_decode_set_streamout_targets(struct vrend_decode_ctx *ctx, uint16_t length) { uint32_t handles[16]; uint32_t num_handles = length - 1; uint32_t append_bitmask; int i; if (length < 1) return EINVAL; if (num_handles > ARRAY_SIZE(handles)) return EINVAL; append_bitmask = get_buf_entry(ctx, VIRGL_SET_STREAMOUT_TARGETS_APPEND_BITMASK); for (i = 0; i < num_handles; i++) handles[i] = get_buf_entry(ctx, VIRGL_SET_STREAMOUT_TARGETS_H0 + i); vrend_set_streamout_targets(ctx->grctx, append_bitmask, num_handles, handles); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,286
static int vrend_decode_set_sub_ctx(struct vrend_decode_ctx *ctx, int length) { if (length != 1) return EINVAL; uint32_t ctx_sub_id = get_buf_entry(ctx, 1); vrend_renderer_set_sub_ctx(ctx->grctx, ctx_sub_id); return 0; }
DoS
0
static int vrend_decode_set_sub_ctx(struct vrend_decode_ctx *ctx, int length) { if (length != 1) return EINVAL; uint32_t ctx_sub_id = get_buf_entry(ctx, 1); vrend_renderer_set_sub_ctx(ctx->grctx, ctx_sub_id); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,287
static int vrend_decode_set_uniform_buffer(struct vrend_decode_ctx *ctx, int length) { if (length != VIRGL_SET_UNIFORM_BUFFER_SIZE) return EINVAL; uint32_t shader = get_buf_entry(ctx, VIRGL_SET_UNIFORM_BUFFER_SHADER_TYPE); uint32_t index = get_buf_entry(ctx, VIRGL_SET_UNIFORM_BUFFER_INDEX); uint32_t offset = get_buf_entry(ctx, VIRGL_SET_UNIFORM_BUFFER_OFFSET); uint32_t blength = get_buf_entry(ctx, VIRGL_SET_UNIFORM_BUFFER_LENGTH); uint32_t handle = get_buf_entry(ctx, VIRGL_SET_UNIFORM_BUFFER_RES_HANDLE); if (shader >= PIPE_SHADER_TYPES) return EINVAL; if (index >= PIPE_MAX_CONSTANT_BUFFERS) return EINVAL; vrend_set_uniform_buffer(ctx->grctx, shader, index, offset, blength, handle); return 0; }
DoS
0
static int vrend_decode_set_uniform_buffer(struct vrend_decode_ctx *ctx, int length) { if (length != VIRGL_SET_UNIFORM_BUFFER_SIZE) return EINVAL; uint32_t shader = get_buf_entry(ctx, VIRGL_SET_UNIFORM_BUFFER_SHADER_TYPE); uint32_t index = get_buf_entry(ctx, VIRGL_SET_UNIFORM_BUFFER_INDEX); uint32_t offset = get_buf_entry(ctx, VIRGL_SET_UNIFORM_BUFFER_OFFSET); uint32_t blength = get_buf_entry(ctx, VIRGL_SET_UNIFORM_BUFFER_LENGTH); uint32_t handle = get_buf_entry(ctx, VIRGL_SET_UNIFORM_BUFFER_RES_HANDLE); if (shader >= PIPE_SHADER_TYPES) return EINVAL; if (index >= PIPE_MAX_CONSTANT_BUFFERS) return EINVAL; vrend_set_uniform_buffer(ctx->grctx, shader, index, offset, blength, handle); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,288
static int vrend_decode_set_vertex_buffers(struct vrend_decode_ctx *ctx, uint16_t length) { int num_vbo; int i; /* must be a multiple of 3 */ if (length && (length % 3)) return EINVAL; num_vbo = (length / 3); if (num_vbo > PIPE_MAX_ATTRIBS) return EINVAL; for (i = 0; i < num_vbo; i++) { vrend_set_single_vbo(ctx->grctx, i, get_buf_entry(ctx, VIRGL_SET_VERTEX_BUFFER_STRIDE(i)), get_buf_entry(ctx, VIRGL_SET_VERTEX_BUFFER_OFFSET(i)), get_buf_entry(ctx, VIRGL_SET_VERTEX_BUFFER_HANDLE(i))); } vrend_set_num_vbo(ctx->grctx, num_vbo); return 0; }
DoS
0
static int vrend_decode_set_vertex_buffers(struct vrend_decode_ctx *ctx, uint16_t length) { int num_vbo; int i; /* must be a multiple of 3 */ if (length && (length % 3)) return EINVAL; num_vbo = (length / 3); if (num_vbo > PIPE_MAX_ATTRIBS) return EINVAL; for (i = 0; i < num_vbo; i++) { vrend_set_single_vbo(ctx->grctx, i, get_buf_entry(ctx, VIRGL_SET_VERTEX_BUFFER_STRIDE(i)), get_buf_entry(ctx, VIRGL_SET_VERTEX_BUFFER_OFFSET(i)), get_buf_entry(ctx, VIRGL_SET_VERTEX_BUFFER_HANDLE(i))); } vrend_set_num_vbo(ctx->grctx, num_vbo); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,289
static int vrend_decode_set_viewport_state(struct vrend_decode_ctx *ctx, int length) { struct pipe_viewport_state vps[PIPE_MAX_VIEWPORTS]; int i, v; uint32_t num_viewports, start_slot; if (length < 1) return EINVAL; if ((length - 1) % 6) return EINVAL; num_viewports = (length - 1) / 6; start_slot = get_buf_entry(ctx, VIRGL_SET_VIEWPORT_START_SLOT); if (num_viewports > PIPE_MAX_VIEWPORTS || start_slot > (PIPE_MAX_VIEWPORTS - num_viewports)) return EINVAL; for (v = 0; v < num_viewports; v++) { for (i = 0; i < 3; i++) vps[v].scale[i] = uif(get_buf_entry(ctx, VIRGL_SET_VIEWPORT_STATE_SCALE_0(v) + i)); for (i = 0; i < 3; i++) vps[v].translate[i] = uif(get_buf_entry(ctx, VIRGL_SET_VIEWPORT_STATE_TRANSLATE_0(v) + i)); } vrend_set_viewport_states(ctx->grctx, start_slot, num_viewports, vps); return 0; }
DoS
0
static int vrend_decode_set_viewport_state(struct vrend_decode_ctx *ctx, int length) { struct pipe_viewport_state vps[PIPE_MAX_VIEWPORTS]; int i, v; uint32_t num_viewports, start_slot; if (length < 1) return EINVAL; if ((length - 1) % 6) return EINVAL; num_viewports = (length - 1) / 6; start_slot = get_buf_entry(ctx, VIRGL_SET_VIEWPORT_START_SLOT); if (num_viewports > PIPE_MAX_VIEWPORTS || start_slot > (PIPE_MAX_VIEWPORTS - num_viewports)) return EINVAL; for (v = 0; v < num_viewports; v++) { for (i = 0; i < 3; i++) vps[v].scale[i] = uif(get_buf_entry(ctx, VIRGL_SET_VIEWPORT_STATE_SCALE_0(v) + i)); for (i = 0; i < 3; i++) vps[v].translate[i] = uif(get_buf_entry(ctx, VIRGL_SET_VIEWPORT_STATE_TRANSLATE_0(v) + i)); } vrend_set_viewport_states(ctx->grctx, start_slot, num_viewports, vps); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,290
struct vrend_context *vrend_lookup_renderer_ctx(uint32_t ctx_id) { if (ctx_id >= VREND_MAX_CTX) return NULL; if (dec_ctx[ctx_id] == NULL) return NULL; return dec_ctx[ctx_id]->grctx; }
DoS
0
struct vrend_context *vrend_lookup_renderer_ctx(uint32_t ctx_id) { if (ctx_id >= VREND_MAX_CTX) return NULL; if (dec_ctx[ctx_id] == NULL) return NULL; return dec_ctx[ctx_id]->grctx; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,291
int vrend_renderer_context_create(uint32_t handle, uint32_t nlen, const char *debug_name) { if (handle >= VREND_MAX_CTX) return EINVAL; /* context 0 is always available with no guarantees */ if (handle == 0) return EINVAL; vrend_renderer_context_create_internal(handle, nlen, debug_name); return 0; }
DoS
0
int vrend_renderer_context_create(uint32_t handle, uint32_t nlen, const char *debug_name) { if (handle >= VREND_MAX_CTX) return EINVAL; /* context 0 is always available with no guarantees */ if (handle == 0) return EINVAL; vrend_renderer_context_create_internal(handle, nlen, debug_name); return 0; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,292
void vrend_renderer_context_create_internal(uint32_t handle, uint32_t nlen, const char *debug_name) { struct vrend_decode_ctx *dctx; if (handle >= VREND_MAX_CTX) return; dctx = dec_ctx[handle]; if (dctx) return; dctx = malloc(sizeof(struct vrend_decode_ctx)); if (!dctx) return; dctx->grctx = vrend_create_context(handle, nlen, debug_name); if (!dctx->grctx) { free(dctx); return; } dctx->ds = &dctx->ids; dec_ctx[handle] = dctx; }
DoS
0
void vrend_renderer_context_create_internal(uint32_t handle, uint32_t nlen, const char *debug_name) { struct vrend_decode_ctx *dctx; if (handle >= VREND_MAX_CTX) return; dctx = dec_ctx[handle]; if (dctx) return; dctx = malloc(sizeof(struct vrend_decode_ctx)); if (!dctx) return; dctx->grctx = vrend_create_context(handle, nlen, debug_name); if (!dctx->grctx) { free(dctx); return; } dctx->ds = &dctx->ids; dec_ctx[handle] = dctx; }
@@ -1093,6 +1093,11 @@ void vrend_renderer_context_destroy(uint32_t handle) if (handle >= VREND_MAX_CTX) return; + /* never destroy context 0 here, it will be destroyed in vrend_decode_reset()*/ + if (handle == 0) { + return; + } + ctx = dec_ctx[handle]; if (!ctx) return;
CWE-476
null
null
7,293
static void vmxnet_tx_pkt_calculate_hdr_len(struct VmxnetTxPkt *pkt) { pkt->hdr_len = pkt->vec[VMXNET_TX_PKT_L2HDR_FRAG].iov_len + pkt->vec[VMXNET_TX_PKT_L3HDR_FRAG].iov_len; }
DoS Overflow
0
static void vmxnet_tx_pkt_calculate_hdr_len(struct VmxnetTxPkt *pkt) { pkt->hdr_len = pkt->vec[VMXNET_TX_PKT_L2HDR_FRAG].iov_len + pkt->vec[VMXNET_TX_PKT_L3HDR_FRAG].iov_len; }
@@ -178,6 +178,11 @@ static bool vmxnet_tx_pkt_parse_headers(struct VmxnetTxPkt *pkt) } l3_hdr->iov_len = IP_HDR_GET_LEN(l3_hdr->iov_base); + if(l3_hdr->iov_len < sizeof(struct ip_header)) + { + l3_hdr->iov_len = 0; + return false; + } pkt->l4proto = ((struct ip_header *) l3_hdr->iov_base)->ip_p; /* copy optional IPv4 header data */
CWE-119
null
null
7,294
void vmxnet_tx_pkt_init(struct VmxnetTxPkt **pkt, uint32_t max_frags, bool has_virt_hdr) { struct VmxnetTxPkt *p = g_malloc0(sizeof *p); p->vec = g_malloc((sizeof *p->vec) * (max_frags + VMXNET_TX_PKT_PL_START_FRAG)); p->raw = g_malloc((sizeof *p->raw) * max_frags); p->max_payload_frags = max_frags; p->max_raw_frags = max_frags; p->has_virt_hdr = has_virt_hdr; p->vec[VMXNET_TX_PKT_VHDR_FRAG].iov_base = &p->virt_hdr; p->vec[VMXNET_TX_PKT_VHDR_FRAG].iov_len = p->has_virt_hdr ? sizeof p->virt_hdr : 0; p->vec[VMXNET_TX_PKT_L2HDR_FRAG].iov_base = &p->l2_hdr; p->vec[VMXNET_TX_PKT_L3HDR_FRAG].iov_base = NULL; p->vec[VMXNET_TX_PKT_L3HDR_FRAG].iov_len = 0; *pkt = p; }
DoS Overflow
0
void vmxnet_tx_pkt_init(struct VmxnetTxPkt **pkt, uint32_t max_frags, bool has_virt_hdr) { struct VmxnetTxPkt *p = g_malloc0(sizeof *p); p->vec = g_malloc((sizeof *p->vec) * (max_frags + VMXNET_TX_PKT_PL_START_FRAG)); p->raw = g_malloc((sizeof *p->raw) * max_frags); p->max_payload_frags = max_frags; p->max_raw_frags = max_frags; p->has_virt_hdr = has_virt_hdr; p->vec[VMXNET_TX_PKT_VHDR_FRAG].iov_base = &p->virt_hdr; p->vec[VMXNET_TX_PKT_VHDR_FRAG].iov_len = p->has_virt_hdr ? sizeof p->virt_hdr : 0; p->vec[VMXNET_TX_PKT_L2HDR_FRAG].iov_base = &p->l2_hdr; p->vec[VMXNET_TX_PKT_L3HDR_FRAG].iov_base = NULL; p->vec[VMXNET_TX_PKT_L3HDR_FRAG].iov_len = 0; *pkt = p; }
@@ -178,6 +178,11 @@ static bool vmxnet_tx_pkt_parse_headers(struct VmxnetTxPkt *pkt) } l3_hdr->iov_len = IP_HDR_GET_LEN(l3_hdr->iov_base); + if(l3_hdr->iov_len < sizeof(struct ip_header)) + { + l3_hdr->iov_len = 0; + return false; + } pkt->l4proto = ((struct ip_header *) l3_hdr->iov_base)->ip_p; /* copy optional IPv4 header data */
CWE-119
null
null
7,295
static void eat_opt_white( const char **pcur ) { while (**pcur == ' ' || **pcur == '\t' || **pcur == '\n') (*pcur)++; }
DoS Overflow
0
static void eat_opt_white( const char **pcur ) { while (**pcur == ' ' || **pcur == '\t' || **pcur == '\n') (*pcur)++; }
@@ -180,14 +180,17 @@ static boolean parse_int( const char **pcur, int *val ) return FALSE; } -static boolean parse_identifier( const char **pcur, char *ret ) +static boolean parse_identifier( const char **pcur, char *ret, size_t len ) { const char *cur = *pcur; int i = 0; if (is_alpha_underscore( cur )) { ret[i++] = *cur++; - while (is_alpha_underscore( cur ) || is_digit( cur )) + while (is_alpha_underscore( cur ) || is_digit( cur )) { + if (i == len - 1) + return FALSE; ret[i++] = *cur++; + } ret[i++] = '\0'; *pcur = cur; return TRUE; @@ -1590,7 +1593,7 @@ static boolean parse_property( struct translate_ctx *ctx ) report_error( ctx, "Syntax error" ); return FALSE; } - if (!parse_identifier( &ctx->cur, id )) { + if (!parse_identifier( &ctx->cur, id, sizeof(id) )) { report_error( ctx, "Syntax error" ); return FALSE; }
CWE-119
null
null
7,296
static void eat_until_eol( const char **pcur ) { while (**pcur != '\0' && **pcur != '\n') (*pcur)++; }
DoS Overflow
0
static void eat_until_eol( const char **pcur ) { while (**pcur != '\0' && **pcur != '\n') (*pcur)++; }
@@ -180,14 +180,17 @@ static boolean parse_int( const char **pcur, int *val ) return FALSE; } -static boolean parse_identifier( const char **pcur, char *ret ) +static boolean parse_identifier( const char **pcur, char *ret, size_t len ) { const char *cur = *pcur; int i = 0; if (is_alpha_underscore( cur )) { ret[i++] = *cur++; - while (is_alpha_underscore( cur ) || is_digit( cur )) + while (is_alpha_underscore( cur ) || is_digit( cur )) { + if (i == len - 1) + return FALSE; ret[i++] = *cur++; + } ret[i++] = '\0'; *pcur = cur; return TRUE; @@ -1590,7 +1593,7 @@ static boolean parse_property( struct translate_ctx *ctx ) report_error( ctx, "Syntax error" ); return FALSE; } - if (!parse_identifier( &ctx->cur, id )) { + if (!parse_identifier( &ctx->cur, id, sizeof(id) )) { report_error( ctx, "Syntax error" ); return FALSE; }
CWE-119
null
null
7,297
static boolean eat_white( const char **pcur ) { const char *cur = *pcur; eat_opt_white( pcur ); return *pcur > cur; }
DoS Overflow
0
static boolean eat_white( const char **pcur ) { const char *cur = *pcur; eat_opt_white( pcur ); return *pcur > cur; }
@@ -180,14 +180,17 @@ static boolean parse_int( const char **pcur, int *val ) return FALSE; } -static boolean parse_identifier( const char **pcur, char *ret ) +static boolean parse_identifier( const char **pcur, char *ret, size_t len ) { const char *cur = *pcur; int i = 0; if (is_alpha_underscore( cur )) { ret[i++] = *cur++; - while (is_alpha_underscore( cur ) || is_digit( cur )) + while (is_alpha_underscore( cur ) || is_digit( cur )) { + if (i == len - 1) + return FALSE; ret[i++] = *cur++; + } ret[i++] = '\0'; *pcur = cur; return TRUE; @@ -1590,7 +1593,7 @@ static boolean parse_property( struct translate_ctx *ctx ) report_error( ctx, "Syntax error" ); return FALSE; } - if (!parse_identifier( &ctx->cur, id )) { + if (!parse_identifier( &ctx->cur, id, sizeof(id) )) { report_error( ctx, "Syntax error" ); return FALSE; }
CWE-119
null
null
7,298
static boolean is_alpha_underscore( const char *cur ) { return (*cur >= 'a' && *cur <= 'z') || (*cur >= 'A' && *cur <= 'Z') || *cur == '_'; }
DoS Overflow
0
static boolean is_alpha_underscore( const char *cur ) { return (*cur >= 'a' && *cur <= 'z') || (*cur >= 'A' && *cur <= 'Z') || *cur == '_'; }
@@ -180,14 +180,17 @@ static boolean parse_int( const char **pcur, int *val ) return FALSE; } -static boolean parse_identifier( const char **pcur, char *ret ) +static boolean parse_identifier( const char **pcur, char *ret, size_t len ) { const char *cur = *pcur; int i = 0; if (is_alpha_underscore( cur )) { ret[i++] = *cur++; - while (is_alpha_underscore( cur ) || is_digit( cur )) + while (is_alpha_underscore( cur ) || is_digit( cur )) { + if (i == len - 1) + return FALSE; ret[i++] = *cur++; + } ret[i++] = '\0'; *pcur = cur; return TRUE; @@ -1590,7 +1593,7 @@ static boolean parse_property( struct translate_ctx *ctx ) report_error( ctx, "Syntax error" ); return FALSE; } - if (!parse_identifier( &ctx->cur, id )) { + if (!parse_identifier( &ctx->cur, id, sizeof(id) )) { report_error( ctx, "Syntax error" ); return FALSE; }
CWE-119
null
null
7,299
static boolean is_digit_alpha_underscore( const char *cur ) { return is_digit( cur ) || is_alpha_underscore( cur ); }
DoS Overflow
0
static boolean is_digit_alpha_underscore( const char *cur ) { return is_digit( cur ) || is_alpha_underscore( cur ); }
@@ -180,14 +180,17 @@ static boolean parse_int( const char **pcur, int *val ) return FALSE; } -static boolean parse_identifier( const char **pcur, char *ret ) +static boolean parse_identifier( const char **pcur, char *ret, size_t len ) { const char *cur = *pcur; int i = 0; if (is_alpha_underscore( cur )) { ret[i++] = *cur++; - while (is_alpha_underscore( cur ) || is_digit( cur )) + while (is_alpha_underscore( cur ) || is_digit( cur )) { + if (i == len - 1) + return FALSE; ret[i++] = *cur++; + } ret[i++] = '\0'; *pcur = cur; return TRUE; @@ -1590,7 +1593,7 @@ static boolean parse_property( struct translate_ctx *ctx ) report_error( ctx, "Syntax error" ); return FALSE; } - if (!parse_identifier( &ctx->cur, id )) { + if (!parse_identifier( &ctx->cur, id, sizeof(id) )) { report_error( ctx, "Syntax error" ); return FALSE; }
CWE-119
null
null