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elsif This'Address = TIM8_Base then
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RCC_Periph.APB2RSTR.TIM8RST := True;
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RCC_Periph.APB2RSTR.TIM8RST := False;
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elsif This'Address = TIM9_Base then
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RCC_Periph.APB2RSTR.TIM9RST := True;
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RCC_Periph.APB2RSTR.TIM9RST := False;
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elsif This'Address = TIM10_Base then
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RCC_Periph.APB2RSTR.TIM10RST := True;
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RCC_Periph.APB2RSTR.TIM10RST := False;
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elsif This'Address = TIM11_Base then
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RCC_Periph.APB2RSTR.TIM11RST := True;
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RCC_Periph.APB2RSTR.TIM11RST := False;
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elsif This'Address = TIM12_Base then
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RCC_Periph.APB1RSTR.TIM12RST := True;
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RCC_Periph.APB1RSTR.TIM12RST := False;
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elsif This'Address = TIM13_Base then
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RCC_Periph.APB1RSTR.TIM13RST := True;
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RCC_Periph.APB1RSTR.TIM13RST := False;
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elsif This'Address = TIM14_Base then
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RCC_Periph.APB1RSTR.TIM14RST := True;
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RCC_Periph.APB1RSTR.TIM14RST := False;
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else
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raise Unknown_Device;
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end if;
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end Reset;
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------------------
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-- Enable_Clock --
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------------------
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procedure Enable_Clock (This : in out SAI_Port)
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is
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begin
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pragma Assert (This'Address = SAI_Base);
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RCC_Periph.APB2ENR.SAI1EN := True;
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end Enable_Clock;
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-----------
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-- Reset --
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-----------
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procedure Reset (This : in out SAI_Port)
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is
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begin
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pragma Assert (This'Address = SAI_Base);
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RCC_Periph.APB2RSTR.SAI1RST := True;
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RCC_Periph.APB2RSTR.SAI1RST := False;
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end Reset;
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---------------------
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-- Get_Input_Clock --
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---------------------
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function Get_Input_Clock (Periph : SAI_Port) return UInt32
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is
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Input_Selector : UInt2;
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VCO_Input : UInt32;
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SAI_First_Level : UInt32;
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begin
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if Periph'Address /= SAI_Base then
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raise Unknown_Device;
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end if;
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Input_Selector := RCC_Periph.DCKCFGR.SAI1ASRC;
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-- This driver doesn't support external source clock
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if Input_Selector > 1 then
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raise Constraint_Error
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with "External PLL SAI source clock unsupported";
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end if;
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if not RCC_Periph.PLLCFGR.PLLSRC then
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-- PLLSAI SRC is HSI
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VCO_Input := HSI_VALUE / UInt32 (RCC_Periph.PLLCFGR.PLLM);
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else
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-- PLLSAI SRC is HSE
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VCO_Input := HSE_VALUE / UInt32 (RCC_Periph.PLLCFGR.PLLM);
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end if;
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if Input_Selector = 0 then
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-- PLLSAI is the clock source
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-- VCO out = VCO in & PLLSAIN
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-- SAI firstlevel = VCO out / PLLSAIQ
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SAI_First_Level :=
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VCO_Input * UInt32 (RCC_Periph.PLLSAICFGR.PLLSAIN) /
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UInt32 (RCC_Periph.PLLSAICFGR.PLLSAIQ);
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-- SAI frequency is SAI First level / PLLSAIDIVQ
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return SAI_First_Level / UInt32 (RCC_Periph.DCKCFGR.PLLSAIDIVQ);
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else
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-- PLLI2S as clock source
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SAI_First_Level :=
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VCO_Input * UInt32 (RCC_Periph.PLLI2SCFGR.PLLI2SN) /
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UInt32 (RCC_Periph.PLLI2SCFGR.PLLI2SQ);
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-- SAI frequency is SAI First level / PLLI2SDIVQ
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return SAI_First_Level / UInt32 (RCC_Periph.DCKCFGR.PLLIS2DIVQ + 1);
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end if;
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end Get_Input_Clock;
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