IR_x86 stringlengths 97 189k | IR_arm stringlengths 544 93.4k | filename stringlengths 19 186 |
|---|---|---|
; ModuleID = 'obs-studio_libobs_graphics_extr_..utillexer.h_strref_copy.so'
source_filename = "obs-studio_libobs_graphics_extr_..utillexer.h_strref_copy.so"
define dso_local i64 @strref_copy(i64 %arg1, i64 %arg2) {
entry:
%0 = inttoptr i64 %arg2 to ptr
%memload = load i64, ptr %0, align 1
%1 = inttoptr i64 %arg1 to ptr
store i64 %memload, ptr %1, align 1
ret i64 %memload
}
| ; ModuleID = 'AnghaBench/obs-studio/libobs/graphics/extr_..utillexer.h_strref_copy.c'
source_filename = "AnghaBench/obs-studio/libobs/graphics/extr_..utillexer.h_strref_copy.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @strref_copy], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync)
define internal void @strref_copy(ptr nocapture noundef writeonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load <2 x i32>, ptr %1, align 4, !tbaa !6
store <2 x i32> %3, ptr %0, align 4, !tbaa !6
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| obs-studio_libobs_graphics_extr_..utillexer.h_strref_copy |
; ModuleID = 'fastsocket_kernel_drivers_net_extr_au1000_eth.c_GetFreeDB.so'
source_filename = "fastsocket_kernel_drivers_net_extr_au1000_eth.c_GetFreeDB.so"
define dso_local i64 @GetFreeDB(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%1 = and i64 %memload, %memload
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %1, 0
%2 = and i64 %1, 255
%3 = call i64 @llvm.ctpop.i64(i64 %2)
%4 = and i64 %3, 1
%PF = icmp eq i64 %4, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%5 = inttoptr i64 %memload to ptr
%memload1 = load i64, ptr %5, align 1
%6 = inttoptr i64 %arg1 to ptr
store i64 %memload1, ptr %6, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %entry
ret i64 %memload
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_au1000_eth.c_GetFreeDB.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_au1000_eth.c_GetFreeDB.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @GetFreeDB], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal ptr @GetFreeDB(ptr nocapture noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = icmp eq ptr %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = load ptr, ptr %2, align 8, !tbaa !11
store ptr %5, ptr %0, align 8, !tbaa !6
br label %6
6: ; preds = %4, %1
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"au1000_private", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_3__", !8, i64 0}
| fastsocket_kernel_drivers_net_extr_au1000_eth.c_GetFreeDB |
; ModuleID = 'linux_drivers_hv_extr_vmbus_drv.c_vmbus_exists.so'
source_filename = "linux_drivers_hv_extr_vmbus_drv.c_vmbus_exists.so"
@hv_acpi_dev = common dso_local global i64 0, align 8
@ENODEV = common dso_local global i32 0, align 4
define dso_local i32 @vmbus_exists() {
entry:
%0 = load i32, ptr @ENODEV, align 4
%EAX = sub i32 0, %0
%1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 0, i32 %0)
%CF = extractvalue { i32, i1 } %1, 1
%ZF = icmp eq i32 %EAX, 0
%highbit = and i32 -2147483648, %EAX
%SF = icmp ne i32 %highbit, 0
%2 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 0, i32 %0)
%OF = extractvalue { i32, i1 } %2, 1
%3 = and i32 %EAX, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
%6 = load i64, ptr @hv_acpi_dev, align 8
%7 = sub i64 %6, 0
%8 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %6, i64 0)
%CF1 = extractvalue { i64, i1 } %8, 1
%ZF2 = icmp eq i64 %7, 0
%highbit3 = and i64 -9223372036854775808, %7
%SF4 = icmp ne i64 %highbit3, 0
%9 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %6, i64 0)
%OF5 = extractvalue { i64, i1 } %9, 1
%10 = and i64 %7, 255
%11 = call i64 @llvm.ctpop.i64(i64 %10)
%12 = and i64 %11, 1
%PF6 = icmp eq i64 %12, 0
%Cond_CMOVNE = icmp eq i1 %ZF2, false
%CMOV = select i1 %Cond_CMOVNE, i32 0, i32 %EAX
ret i32 %CMOV
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/hv/extr_vmbus_drv.c_vmbus_exists.c'
source_filename = "AnghaBench/linux/drivers/hv/extr_vmbus_drv.c_vmbus_exists.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@hv_acpi_dev = common local_unnamed_addr global ptr null, align 8
@ENODEV = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @vmbus_exists], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @vmbus_exists() #0 {
%1 = load ptr, ptr @hv_acpi_dev, align 8, !tbaa !6
%2 = icmp eq ptr %1, null
%3 = load i32, ptr @ENODEV, align 4
%4 = sub nsw i32 0, %3
%5 = select i1 %2, i32 %4, i32 0
ret i32 %5
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_hv_extr_vmbus_drv.c_vmbus_exists |
; ModuleID = 'openssl_crypto_bio_extr_bss_dgram.c_BIO_s_datagram_sctp.so'
source_filename = "openssl_crypto_bio_extr_bss_dgram.c_BIO_s_datagram_sctp.so"
@methods_dgramp_sctp = dso_local global i32 0, align 4
define dso_local i64 @BIO_s_datagram_sctp() {
entry:
%0 = ptrtoint ptr @methods_dgramp_sctp to i64
ret i64 %0
}
| ; ModuleID = 'AnghaBench/openssl/crypto/bio/extr_bss_dgram.c_BIO_s_datagram_sctp.c'
source_filename = "AnghaBench/openssl/crypto/bio/extr_bss_dgram.c_BIO_s_datagram_sctp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@methods_dgramp_sctp = common global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef nonnull ptr @BIO_s_datagram_sctp() local_unnamed_addr #0 {
ret ptr @methods_dgramp_sctp
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| openssl_crypto_bio_extr_bss_dgram.c_BIO_s_datagram_sctp |
; ModuleID = 'freebsd_sys_x86_x86_extr_identcpu.c_cpu_getmaxphyaddr.so'
source_filename = "freebsd_sys_x86_x86_extr_identcpu.c_cpu_getmaxphyaddr.so"
@cpu_maxphyaddr = common dso_local global i64 0, align 8
define dso_local i32 @cpu_getmaxphyaddr() {
entry:
%memload = load i32, ptr @cpu_maxphyaddr, align 1
%0 = trunc i32 %memload to i8
%ECX = zext i8 %0 to i32
%RAX = sext i32 -1 to i64
%1 = trunc i32 %ECX to i8
%2 = zext i8 %1 to i64
%shift-cnt-msk = and i64 %2, 31
%RAX1 = shl i64 %RAX, %shift-cnt-msk
%shrd_cf_count_cmp = icmp sgt i64 %shift-cnt-msk, 0
%3 = sub i64 64, %shift-cnt-msk
%shld_cf_count_shift = shl i64 1, %3
%shld_cf_count_and = and i64 %RAX, %shld_cf_count_shift
%shld_cf_count_shft_out = icmp sgt i64 %shld_cf_count_and, 0
%shld_cf_update = select i1 %shrd_cf_count_cmp, i1 %shld_cf_count_shft_out, i1 false
%ZF = icmp eq i64 %RAX1, 0
%highbit = and i64 -9223372036854775808, %RAX1
%SF = icmp ne i64 %highbit, 0
%4 = trunc i64 %RAX1 to i32
%EAX = xor i32 %4, -1
ret i32 %EAX
}
| ; ModuleID = 'AnghaBench/freebsd/sys/x86/x86/extr_identcpu.c_cpu_getmaxphyaddr.c'
source_filename = "AnghaBench/freebsd/sys/x86/x86/extr_identcpu.c_cpu_getmaxphyaddr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cpu_maxphyaddr = common local_unnamed_addr global i64 0, align 8
@pae_mode = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define i32 @cpu_getmaxphyaddr() local_unnamed_addr #0 {
%1 = load i64, ptr @cpu_maxphyaddr, align 8, !tbaa !6
%2 = shl nsw i64 -1, %1
%3 = trunc i64 %2 to i32
%4 = xor i32 %3, -1
ret i32 %4
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_x86_x86_extr_identcpu.c_cpu_getmaxphyaddr |
; ModuleID = 'xLua_build_luajit-2.1.0b3_src_host_extr_minilua.c_libsize.so'
source_filename = "xLua_build_luajit-2.1.0b3_src_host_extr_minilua.c_libsize.so"
define dso_local i64 @libsize(i64 %arg1) {
entry:
%RAX-SKT-LOC = alloca i64, align 8
%0 = inttoptr i64 %arg1 to ptr
%1 = load i64, ptr %0, align 1
%2 = sub i64 %1, 0
%3 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %1, i64 0)
%CF = extractvalue { i64, i1 } %3, 1
%ZF = icmp eq i64 %2, 0
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%4 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %1, i64 0)
%OF = extractvalue { i64, i1 } %4, 1
%5 = and i64 %2, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF = icmp eq i64 %7, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%8 = zext i32 0 to i64
store i64 %8, ptr %RAX-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.2
%RAX = load i64, ptr %RAX-SKT-LOC, align 1
%memref-idxreg = mul i64 8, %RAX
%memref-basereg = add i64 %arg1, %memref-idxreg
%memref-disp = add i64 %memref-basereg, 8
%9 = inttoptr i64 %memref-disp to ptr
%10 = load i64, ptr %9, align 1
%11 = sub i64 %10, 0
%12 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %10, i64 0)
%CF1 = extractvalue { i64, i1 } %12, 1
%ZF2 = icmp eq i64 %11, 0
%highbit3 = and i64 -9223372036854775808, %11
%SF4 = icmp ne i64 %highbit3, 0
%13 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %10, i64 0)
%OF5 = extractvalue { i64, i1 } %13, 1
%14 = and i64 %11, 255
%15 = call i64 @llvm.ctpop.i64(i64 %14)
%16 = and i64 %15, 1
%PF6 = icmp eq i64 %16, 0
%memref-disp7 = add i64 %RAX, 1
%CmpZF_JNE = icmp eq i1 %ZF2, false
store i64 %memref-disp7, ptr %RAX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.2, label %bb.3
bb.3: ; preds = %bb.2
%ld-stk-prom = load i64, ptr %RAX-SKT-LOC, align 8
br label %UnifiedReturnBlock
bb.4: ; preds = %entry
%17 = zext i32 0 to i64
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.4, %bb.3
%UnifiedRetVal = phi i64 [ %ld-stk-prom, %bb.3 ], [ %17, %bb.4 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/xLua/build/luajit-2.1.0b3/src/host/extr_minilua.c_libsize.c'
source_filename = "AnghaBench/xLua/build/luajit-2.1.0b3/src/host/extr_minilua.c_libsize.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @libsize], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @libsize(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = icmp eq i64 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = phi ptr [ %8, %4 ], [ %0, %1 ]
%7 = add nuw nsw i32 %5, 1
%8 = getelementptr inbounds i8, ptr %6, i64 8
%9 = load i64, ptr %8, align 8, !tbaa !6
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %4, !llvm.loop !11
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %12
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
| xLua_build_luajit-2.1.0b3_src_host_extr_minilua.c_libsize |
; ModuleID = 'sqlcipher_src_extr_test_onefile.c_fsDeviceCharacteristics.so'
source_filename = "sqlcipher_src_extr_test_onefile.c_fsDeviceCharacteristics.so"
define dso_local i32 @fsDeviceCharacteristics() {
entry:
ret i32 0
}
| ; ModuleID = 'AnghaBench/sqlcipher/src/extr_test_onefile.c_fsDeviceCharacteristics.c'
source_filename = "AnghaBench/sqlcipher/src/extr_test_onefile.c_fsDeviceCharacteristics.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @fsDeviceCharacteristics], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @fsDeviceCharacteristics(ptr nocapture readnone %0) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| sqlcipher_src_extr_test_onefile.c_fsDeviceCharacteristics |
; ModuleID = 'exploitdb_exploits_windows_local_extr_19585.c_search_mem.so'
source_filename = "exploitdb_exploits_windows_local_extr_19585.c_search_mem.so"
define dso_local i32 @search_mem(i64 %arg1, i64 %arg2, i64 %arg3, i8 %arg4, i8 %arg5) {
entry:
%EAX-SKT-LOC = alloca i32, align 4
%RSI-SKT-LOC = alloca i64, align 8
%SIL-SKT-LOC = alloca i64, align 8
%R9-SKT-LOC = alloca i64, align 8
%0 = sub i64 %arg2, %arg3
%1 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %arg2, i64 %arg3)
%CF = extractvalue { i64, i1 } %1, 1
%ZF = icmp eq i64 %0, 0
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%2 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %arg2, i64 %arg3)
%OF = extractvalue { i64, i1 } %2, 1
%3 = and i64 %0, 255
%4 = call i64 @llvm.ctpop.i64(i64 %3)
%5 = and i64 %4, 1
%PF = icmp eq i64 %5, 0
store i64 %arg2, ptr %SIL-SKT-LOC, align 1
store i64 %arg2, ptr %RSI-SKT-LOC, align 1
store i32 0, ptr %EAX-SKT-LOC, align 1
%CFCmp_JAE = icmp eq i1 %CF, false
br i1 %CFCmp_JAE, label %bb.11, label %bb.1
bb.1: ; preds = %entry
%R9 = add i64 %arg2, 1
%6 = and i64 %R9, 255
%7 = call i64 @llvm.ctpop.i64(i64 %6)
%8 = and i64 %7, 1
%PF1 = icmp eq i64 %8, 0
%ZF2 = icmp eq i64 %R9, 0
%highbit3 = and i64 -9223372036854775808, %R9
%SF4 = icmp ne i64 %highbit3, 0
store i64 %R9, ptr %R9-SKT-LOC, align 1
br label %bb.4
bb.4: ; preds = %bb.3, %bb.1
%R95 = load i64, ptr %R9-SKT-LOC, align 1
%memref-disp = add i64 %R95, -1
%9 = inttoptr i64 %memref-disp to ptr
%10 = load i8, ptr %9, align 1
%11 = zext i8 %10 to i64
%12 = zext i8 %arg4 to i64
%13 = sub i64 %11, %12
%14 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %11, i64 %12)
%CF6 = extractvalue { i64, i1 } %14, 1
%ZF7 = icmp eq i64 %13, 0
%highbit8 = and i64 -9223372036854775808, %13
%SF9 = icmp ne i64 %highbit8, 0
%15 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %11, i64 %12)
%OF10 = extractvalue { i64, i1 } %15, 1
%16 = and i64 %13, 255
%17 = call i64 @llvm.ctpop.i64(i64 %16)
%18 = and i64 %17, 1
%PF11 = icmp eq i64 %18, 0
%CmpZF_JNE = icmp eq i1 %ZF7, false
br i1 %CmpZF_JNE, label %bb.3, label %bb.5
bb.5: ; preds = %bb.4
%19 = inttoptr i64 %R95 to ptr
%20 = load i8, ptr %19, align 1
%21 = zext i8 %20 to i64
%22 = zext i8 %arg5 to i64
%23 = sub i64 %21, %22
%24 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %21, i64 %22)
%CF12 = extractvalue { i64, i1 } %24, 1
%ZF13 = icmp eq i64 %23, 0
%highbit14 = and i64 -9223372036854775808, %23
%SF15 = icmp ne i64 %highbit14, 0
%25 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %21, i64 %22)
%OF16 = extractvalue { i64, i1 } %25, 1
%26 = and i64 %23, 255
%27 = call i64 @llvm.ctpop.i64(i64 %26)
%28 = and i64 %27, 1
%PF17 = icmp eq i64 %28, 0
%CmpZF_JNE56 = icmp eq i1 %ZF13, false
br i1 %CmpZF_JNE56, label %bb.3, label %bb.6
bb.6: ; preds = %bb.5
%29 = load i64, ptr %SIL-SKT-LOC, align 1
%SIL = trunc i64 %29 to i8
%30 = and i8 %SIL, %SIL
%highbit18 = and i8 -128, %30
%SF19 = icmp ne i8 %highbit18, 0
%ZF20 = icmp eq i8 %30, 0
%31 = call i8 @llvm.ctpop.i8(i8 %30)
%32 = and i8 %31, 1
%PF21 = icmp eq i8 %32, 0
%33 = zext i8 %SIL to i64
store i64 %33, ptr %RSI-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF20, true
br i1 %CmpZF_JE, label %bb.3, label %bb.7
bb.7: ; preds = %bb.6
%EDI = zext i8 %SIL to i32
%EDI26 = and i32 %EDI, 65280
%34 = and i32 %EDI26, 255
%35 = call i32 @llvm.ctpop.i32(i32 %34)
%36 = and i32 %35, 1
%PF22 = icmp eq i32 %36, 0
%ZF23 = icmp eq i32 %EDI26, 0
%highbit24 = and i32 -2147483648, %EDI26
%SF25 = icmp ne i32 %highbit24, 0
%CmpZF_JE57 = icmp eq i1 %ZF23, true
br i1 %CmpZF_JE57, label %bb.3, label %bb.8
bb.8: ; preds = %bb.7
%EDI27 = zext i8 %SIL to i32
%EDI32 = and i32 %EDI27, 16711680
%37 = and i32 %EDI32, 255
%38 = call i32 @llvm.ctpop.i32(i32 %37)
%39 = and i32 %38, 1
%PF28 = icmp eq i32 %39, 0
%ZF29 = icmp eq i32 %EDI32, 0
%highbit30 = and i32 -2147483648, %EDI32
%SF31 = icmp ne i32 %highbit30, 0
%CmpZF_JE58 = icmp eq i1 %ZF29, true
br i1 %CmpZF_JE58, label %bb.3, label %bb.9
bb.9: ; preds = %bb.8
%40 = zext i8 %SIL to i32
%41 = zext i8 -1 to i32
%42 = sub i32 %40, %41
%43 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %40, i32 %41)
%CF33 = extractvalue { i32, i1 } %43, 1
%ZF34 = icmp eq i32 %42, 0
%highbit35 = and i32 -2147483648, %42
%SF36 = icmp ne i32 %highbit35, 0
%44 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %40, i32 %41)
%OF37 = extractvalue { i32, i1 } %44, 1
%45 = and i32 %42, 255
%46 = call i32 @llvm.ctpop.i32(i32 %45)
%47 = and i32 %46, 1
%PF38 = icmp eq i32 %47, 0
%CFCmp_JBE = icmp eq i1 %CF33, true
%ZFCmp_JBE = icmp eq i1 %ZF34, true
%CFAndZF_JBE = or i1 %ZFCmp_JBE, %CFCmp_JBE
br i1 %CFAndZF_JBE, label %bb.3, label %bb.10
bb.10: ; preds = %bb.9
%EAX = zext i8 %SIL to i32
store i32 %EAX, ptr %EAX-SKT-LOC, align 1
br label %bb.11
bb.3: ; preds = %bb.9, %bb.8, %bb.7, %bb.6, %bb.5, %bb.4
%RSI = load i64, ptr %RSI-SKT-LOC, align 1
%RSI43 = add i64 %RSI, 1
%48 = and i64 %RSI43, 255
%49 = call i64 @llvm.ctpop.i64(i64 %48)
%50 = and i64 %49, 1
%PF39 = icmp eq i64 %50, 0
%ZF40 = icmp eq i64 %RSI43, 0
%highbit41 = and i64 -9223372036854775808, %RSI43
%SF42 = icmp ne i64 %highbit41, 0
%R948 = add i64 %R95, 1
%51 = and i64 %R948, 255
%52 = call i64 @llvm.ctpop.i64(i64 %51)
%53 = and i64 %52, 1
%PF44 = icmp eq i64 %53, 0
%ZF45 = icmp eq i64 %R948, 0
%highbit46 = and i64 -9223372036854775808, %R948
%SF47 = icmp ne i64 %highbit46, 0
%54 = sub i64 %arg3, %RSI43
%55 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %arg3, i64 %RSI43)
%CF49 = extractvalue { i64, i1 } %55, 1
%ZF50 = icmp eq i64 %54, 0
%highbit51 = and i64 -9223372036854775808, %54
%SF52 = icmp ne i64 %highbit51, 0
%56 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %arg3, i64 %RSI43)
%OF53 = extractvalue { i64, i1 } %56, 1
%57 = and i64 %54, 255
%58 = call i64 @llvm.ctpop.i64(i64 %57)
%59 = and i64 %58, 1
%PF54 = icmp eq i64 %59, 0
%CmpZF_JE59 = icmp eq i1 %ZF50, true
store i64 %RSI43, ptr %RSI-SKT-LOC, align 1
store i64 %RSI43, ptr %SIL-SKT-LOC, align 1
store i64 %R948, ptr %R9-SKT-LOC, align 1
br i1 %CmpZF_JE59, label %bb.11, label %bb.4
bb.11: ; preds = %bb.10, %bb.3, %entry
%EAX55 = load i32, ptr %EAX-SKT-LOC, align 1
ret i32 %EAX55
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/exploitdb/exploits/windows/local/extr_19585.c_search_mem.c'
source_filename = "AnghaBench/exploitdb/exploits/windows/local/extr_19585.c_search_mem.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define noundef i32 @search_mem(ptr nocapture noundef readnone %0, ptr noundef %1, ptr noundef readnone %2, i8 noundef zeroext %3, i8 noundef zeroext %4) local_unnamed_addr #0 {
%6 = icmp ult ptr %1, %2
br i1 %6, label %7, label %31
7: ; preds = %5, %28
%8 = phi ptr [ %29, %28 ], [ %1, %5 ]
%9 = load i8, ptr %8, align 1, !tbaa !6
%10 = icmp eq i8 %9, %3
br i1 %10, label %11, label %28
11: ; preds = %7
%12 = getelementptr inbounds i8, ptr %8, i64 1
%13 = load i8, ptr %12, align 1, !tbaa !6
%14 = icmp eq i8 %13, %4
br i1 %14, label %15, label %28
15: ; preds = %11
%16 = ptrtoint ptr %8 to i64
%17 = trunc i64 %16 to i32
%18 = and i32 %17, 255
%19 = icmp eq i32 %18, 0
%20 = and i32 %17, 65280
%21 = icmp eq i32 %20, 0
%22 = or i1 %19, %21
%23 = and i32 %17, 16711680
%24 = icmp eq i32 %23, 0
%25 = or i1 %24, %22
%26 = icmp ult i32 %17, 16777216
%27 = or i1 %26, %25
br i1 %27, label %28, label %31
28: ; preds = %7, %11, %15
%29 = getelementptr inbounds i8, ptr %8, i64 1
%30 = icmp eq ptr %29, %2
br i1 %30, label %31, label %7, !llvm.loop !9
31: ; preds = %15, %28, %5
%32 = phi i32 [ 0, %5 ], [ 0, %28 ], [ %17, %15 ]
ret i32 %32
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| exploitdb_exploits_windows_local_extr_19585.c_search_mem |
; ModuleID = 'radare2_libr_asm_arch_arm_extr_armass64.c_isMask.so'
source_filename = "radare2_libr_asm_arch_arm_extr_armass64.c_isMask.so"
define dso_local i32 @isMask(i64 %arg1) {
entry:
%0 = trunc i64 %arg1 to i32
%1 = trunc i64 %arg1 to i32
%2 = and i32 %0, %1
%highbit = and i32 -2147483648, %2
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %2, 0
%3 = and i32 %2, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
%AL = icmp eq i1 %ZF, false
%memref-disp = add i64 %arg1, 1
%ECX = trunc i64 %memref-disp to i32
%6 = trunc i64 %arg1 to i32
%7 = and i32 %ECX, %6
%highbit1 = and i32 -2147483648, %7
%SF2 = icmp ne i32 %highbit1, 0
%ZF3 = icmp eq i32 %7, 0
%8 = and i32 %7, 255
%9 = call i32 @llvm.ctpop.i32(i32 %8)
%10 = and i32 %9, 1
%PF4 = icmp eq i32 %10, 0
%CL = icmp eq i1 %ZF3, true
%11 = zext i1 %CL to i8
%12 = zext i1 %AL to i8
%CL9 = and i8 %11, %12
%highbit5 = and i8 -128, %CL9
%SF6 = icmp ne i8 %highbit5, 0
%ZF7 = icmp eq i8 %CL9, 0
%13 = call i8 @llvm.ctpop.i8(i8 %CL9)
%14 = and i8 %13, 1
%PF8 = icmp eq i8 %14, 0
%EAX = zext i8 %CL9 to i32
ret i32 %EAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/radare2/libr/asm/arch/arm/extr_armass64.c_isMask.c'
source_filename = "AnghaBench/radare2/libr/asm/arch/arm/extr_armass64.c_isMask.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @isMask], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal range(i32 0, 2) i32 @isMask(i32 noundef %0) #0 {
%2 = icmp ne i32 %0, 0
%3 = add nsw i32 %0, 1
%4 = and i32 %3, %0
%5 = icmp eq i32 %4, 0
%6 = select i1 %2, i1 %5, i1 false
%7 = zext i1 %6 to i32
ret i32 %7
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| radare2_libr_asm_arch_arm_extr_armass64.c_isMask |
; ModuleID = 'linux_drivers_mmc_host_extr_s3cmci.c_dbg_dumpregs.so'
source_filename = "linux_drivers_mmc_host_extr_s3cmci.c_dbg_dumpregs.so"
define dso_local void @dbg_dumpregs() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/linux/drivers/mmc/host/extr_s3cmci.c_dbg_dumpregs.c'
source_filename = "AnghaBench/linux/drivers/mmc/host/extr_s3cmci.c_dbg_dumpregs.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @dbg_dumpregs], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @dbg_dumpregs(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_mmc_host_extr_s3cmci.c_dbg_dumpregs |
; ModuleID = 'redis_src_extr_module.c_zsetKeyReset.so'
source_filename = "redis_src_extr_module.c_zsetKeyReset.so"
@REDISMODULE_ZSET_RANGE_NONE = common dso_local global i32 0, align 4
define dso_local i32 @zsetKeyReset(i64 %arg1) {
entry:
%memload = load i32, ptr @REDISMODULE_ZSET_RANGE_NONE, align 1
%memref-disp = add i64 %arg1, 16
%0 = inttoptr i64 %memref-disp to ptr
store i32 %memload, ptr %0, align 1
%memref-disp1 = add i64 %arg1, 8
%1 = inttoptr i64 %memref-disp1 to ptr
%2 = sext i32 0 to i64
store i64 %2, ptr %1, align 1
%3 = inttoptr i64 %arg1 to ptr
store i32 1, ptr %3, align 1
ret i32 %memload
}
| ; ModuleID = 'AnghaBench/redis/src/extr_module.c_zsetKeyReset.c'
source_filename = "AnghaBench/redis/src/extr_module.c_zsetKeyReset.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@REDISMODULE_ZSET_RANGE_NONE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync)
define void @zsetKeyReset(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr @REDISMODULE_ZSET_RANGE_NONE, align 4, !tbaa !6
%3 = getelementptr inbounds i8, ptr %0, i64 16
store i32 %2, ptr %3, align 8, !tbaa !10
%4 = getelementptr inbounds i8, ptr %0, i64 8
store ptr null, ptr %4, align 8, !tbaa !13
store i32 1, ptr %0, align 8, !tbaa !14
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 16}
!11 = !{!"TYPE_3__", !7, i64 0, !12, i64 8, !7, i64 16}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!11, !7, i64 0}
| redis_src_extr_module.c_zsetKeyReset |
; ModuleID = 'freebsd_contrib_gdb_gdb_extr_remote-rdp.c_remote_rdp_attach.so'
source_filename = "freebsd_contrib_gdb_gdb_extr_remote-rdp.c_remote_rdp_attach.so"
define dso_local void @remote_rdp_attach() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_remote-rdp.c_remote_rdp_attach.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_remote-rdp.c_remote_rdp_attach.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @remote_rdp_attach], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @remote_rdp_attach(ptr nocapture readnone %0, i32 %1) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_contrib_gdb_gdb_extr_remote-rdp.c_remote_rdp_attach |
; ModuleID = 'RetroArch_wii_libogc_libdb_uIP_extr_uip_netif.c_uip_netif_setup.so'
source_filename = "RetroArch_wii_libogc_libdb_uIP_extr_uip_netif.c_uip_netif_setup.so"
@UIP_NETIF_FLAG_UP = common dso_local global i32 0, align 4
define dso_local i32 @uip_netif_setup(i64 %arg1) {
entry:
%memload = load i32, ptr @UIP_NETIF_FLAG_UP, align 1
%0 = inttoptr i64 %arg1 to ptr
%1 = load i32, ptr %0, align 1
%2 = or i32 %1, %memload
%3 = and i32 %2, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
store i32 %2, ptr %0, align 1
ret i32 %memload
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/RetroArch/wii/libogc/libdb/uIP/extr_uip_netif.c_uip_netif_setup.c'
source_filename = "AnghaBench/RetroArch/wii/libogc/libdb/uIP/extr_uip_netif.c_uip_netif_setup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@UIP_NETIF_FLAG_UP = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define void @uip_netif_setup(ptr nocapture noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @UIP_NETIF_FLAG_UP, align 4, !tbaa !6
%3 = load i32, ptr %0, align 4, !tbaa !10
%4 = or i32 %3, %2
store i32 %4, ptr %0, align 4, !tbaa !10
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"uip_netif", !7, i64 0}
| RetroArch_wii_libogc_libdb_uIP_extr_uip_netif.c_uip_netif_setup |
; ModuleID = 'freebsd_contrib_wpa_src_p2p_extr_p2p.c_p2p_set_dev_persistent.so'
source_filename = "freebsd_contrib_wpa_src_p2p_extr_p2p.c_p2p_set_dev_persistent.so"
@P2P_DEV_PREFER_PERSISTENT_GROUP = common dso_local global i32 0, align 4
@P2P_DEV_PREFER_PERSISTENT_RECONN = common dso_local global i32 0, align 4
define dso_local void @p2p_set_dev_persistent(i64 %arg1, i32 %arg2) {
entry:
%EAX-SKT-LOC = alloca i32, align 4
%0 = sub i32 %arg2, 2
%1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %arg2, i32 2)
%CF = extractvalue { i32, i1 } %1, 1
%ZF = icmp eq i32 %0, 0
%highbit = and i32 -2147483648, %0
%SF = icmp ne i32 %highbit, 0
%2 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %arg2, i32 2)
%OF = extractvalue { i32, i1 } %2, 1
%3 = and i32 %0, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%6 = sub i32 %arg2, 1
%7 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %arg2, i32 1)
%CF1 = extractvalue { i32, i1 } %7, 1
%ZF2 = icmp eq i32 %6, 0
%highbit3 = and i32 -2147483648, %6
%SF4 = icmp ne i32 %highbit3, 0
%8 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %arg2, i32 1)
%OF5 = extractvalue { i32, i1 } %8, 1
%9 = and i32 %6, 255
%10 = call i32 @llvm.ctpop.i32(i32 %9)
%11 = and i32 %10, 1
%PF6 = icmp eq i32 %11, 0
%CmpZF_JE1 = icmp eq i1 %ZF2, true
br i1 %CmpZF_JE1, label %bb.5, label %bb.2
bb.2: ; preds = %bb.1
%12 = and i32 %arg2, %arg2
%highbit7 = and i32 -2147483648, %12
%SF8 = icmp ne i32 %highbit7, 0
%ZF9 = icmp eq i32 %12, 0
%13 = and i32 %12, 255
%14 = call i32 @llvm.ctpop.i32(i32 %13)
%15 = and i32 %14, 1
%PF10 = icmp eq i32 %15, 0
%CmpZF_JNE = icmp eq i1 %ZF9, false
br i1 %CmpZF_JNE, label %bb.7, label %bb.3
bb.3: ; preds = %bb.2
%memload = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_RECONN, align 1
%memload11 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_GROUP, align 1
%EAX = or i32 %memload, %memload11
%16 = and i32 %EAX, 255
%17 = call i32 @llvm.ctpop.i32(i32 %16)
%18 = and i32 %17, 1
%PF12 = icmp eq i32 %18, 0
%EAX13 = xor i32 %EAX, -1
%19 = inttoptr i64 %arg1 to ptr
%memload14 = load i32, ptr %19, align 1
%EAX16 = and i32 %EAX13, %memload14
%20 = and i32 %EAX16, 255
%21 = call i32 @llvm.ctpop.i32(i32 %20)
%22 = and i32 %21, 1
%PF15 = icmp eq i32 %22, 0
store i32 %EAX16, ptr %EAX-SKT-LOC, align 1
br label %bb.6
bb.5: ; preds = %bb.1
%23 = inttoptr i64 %arg1 to ptr
%memload17 = load i32, ptr %23, align 1
%memload18 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_GROUP, align 1
%ECX = or i32 %memload17, %memload18
%24 = and i32 %ECX, 255
%25 = call i32 @llvm.ctpop.i32(i32 %24)
%26 = and i32 %25, 1
%PF19 = icmp eq i32 %26, 0
%27 = inttoptr i64 %arg1 to ptr
store i32 %ECX, ptr %27, align 1
%memload20 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_RECONN, align 1
%EAX21 = xor i32 %memload20, -1
%EAX26 = and i32 %EAX21, %ECX
%highbit22 = and i32 -2147483648, %EAX26
%SF23 = icmp ne i32 %highbit22, 0
%ZF24 = icmp eq i32 %EAX26, 0
%28 = and i32 %EAX26, 255
%29 = call i32 @llvm.ctpop.i32(i32 %28)
%30 = and i32 %29, 1
%PF25 = icmp eq i32 %30, 0
store i32 %EAX26, ptr %EAX-SKT-LOC, align 1
br label %bb.6
bb.4: ; preds = %entry
%memload27 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_RECONN, align 1
%memload28 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_GROUP, align 1
%EAX30 = or i32 %memload27, %memload28
%31 = and i32 %EAX30, 255
%32 = call i32 @llvm.ctpop.i32(i32 %31)
%33 = and i32 %32, 1
%PF29 = icmp eq i32 %33, 0
%34 = inttoptr i64 %arg1 to ptr
%memload31 = load i32, ptr %34, align 1
%EAX33 = or i32 %EAX30, %memload31
%35 = and i32 %EAX33, 255
%36 = call i32 @llvm.ctpop.i32(i32 %35)
%37 = and i32 %36, 1
%PF32 = icmp eq i32 %37, 0
store i32 %EAX33, ptr %EAX-SKT-LOC, align 1
br label %bb.6
bb.6: ; preds = %bb.5, %bb.4, %bb.3
%EAX34 = load i32, ptr %EAX-SKT-LOC, align 1
%38 = inttoptr i64 %arg1 to ptr
store i32 %EAX34, ptr %38, align 1
br label %bb.7
bb.7: ; preds = %bb.6, %bb.2
ret void
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/p2p/extr_p2p.c_p2p_set_dev_persistent.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/p2p/extr_p2p.c_p2p_set_dev_persistent.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@P2P_DEV_PREFER_PERSISTENT_GROUP = common local_unnamed_addr global i32 0, align 4
@P2P_DEV_PREFER_PERSISTENT_RECONN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @p2p_set_dev_persistent], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @p2p_set_dev_persistent(ptr nocapture noundef %0, i32 noundef %1) #0 {
switch i32 %1, label %25 [
i32 0, label %3
i32 1, label %10
i32 2, label %17
]
3: ; preds = %2
%4 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_GROUP, align 4, !tbaa !6
%5 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_RECONN, align 4, !tbaa !6
%6 = or i32 %5, %4
%7 = xor i32 %6, -1
%8 = load i32, ptr %0, align 4, !tbaa !10
%9 = and i32 %8, %7
br label %23
10: ; preds = %2
%11 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_GROUP, align 4, !tbaa !6
%12 = load i32, ptr %0, align 4, !tbaa !10
%13 = or i32 %12, %11
store i32 %13, ptr %0, align 4, !tbaa !10
%14 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_RECONN, align 4, !tbaa !6
%15 = xor i32 %14, -1
%16 = and i32 %13, %15
br label %23
17: ; preds = %2
%18 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_GROUP, align 4, !tbaa !6
%19 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_RECONN, align 4, !tbaa !6
%20 = or i32 %19, %18
%21 = load i32, ptr %0, align 4, !tbaa !10
%22 = or i32 %20, %21
br label %23
23: ; preds = %3, %10, %17
%24 = phi i32 [ %22, %17 ], [ %16, %10 ], [ %9, %3 ]
store i32 %24, ptr %0, align 4, !tbaa !10
br label %25
25: ; preds = %23, %2
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"p2p_device", !7, i64 0}
| freebsd_contrib_wpa_src_p2p_extr_p2p.c_p2p_set_dev_persistent |
; ModuleID = 'linux_kernel_sched_extr_loadavg.c_calc_global_nohz.so'
source_filename = "linux_kernel_sched_extr_loadavg.c_calc_global_nohz.so"
define dso_local void @calc_global_nohz() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/linux/kernel/sched/extr_loadavg.c_calc_global_nohz.c'
source_filename = "AnghaBench/linux/kernel/sched/extr_loadavg.c_calc_global_nohz.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @calc_global_nohz], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @calc_global_nohz() #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_kernel_sched_extr_loadavg.c_calc_global_nohz |
; ModuleID = 'freebsd_sys_dev_nvme_extr_nvme.c_nvme_unregister_consumer.so'
source_filename = "freebsd_sys_dev_nvme_extr_nvme.c_nvme_unregister_consumer.so"
@INVALID_CONSUMER_ID = common dso_local global i32 0, align 4
define dso_local i32 @nvme_unregister_consumer(i64 %arg1) {
entry:
%memload = load i32, ptr @INVALID_CONSUMER_ID, align 1
%0 = inttoptr i64 %arg1 to ptr
store i32 %memload, ptr %0, align 1
ret i32 %memload
}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/nvme/extr_nvme.c_nvme_unregister_consumer.c'
source_filename = "AnghaBench/freebsd/sys/dev/nvme/extr_nvme.c_nvme_unregister_consumer.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@INVALID_CONSUMER_ID = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync)
define void @nvme_unregister_consumer(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr @INVALID_CONSUMER_ID, align 4, !tbaa !6
store i32 %2, ptr %0, align 4, !tbaa !10
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"nvme_consumer", !7, i64 0}
| freebsd_sys_dev_nvme_extr_nvme.c_nvme_unregister_consumer |
; ModuleID = 'freebsd_sys_dev_usb_extr_usb_transfer.c_usbd_xfer_maxp_was_clamped.so'
source_filename = "freebsd_sys_dev_usb_extr_usb_transfer.c_usbd_xfer_maxp_was_clamped.so"
define dso_local i32 @usbd_xfer_maxp_was_clamped(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
ret i32 %memload
}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/usb/extr_usb_transfer.c_usbd_xfer_maxp_was_clamped.c'
source_filename = "AnghaBench/freebsd/sys/dev/usb/extr_usb_transfer.c_usbd_xfer_maxp_was_clamped.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define i32 @usbd_xfer_maxp_was_clamped(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
ret i32 %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"usb_xfer", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_dev_usb_extr_usb_transfer.c_usbd_xfer_maxp_was_clamped |
; ModuleID = 'ish_emu_extr_float80.c_f80_neg.so'
source_filename = "ish_emu_extr_float80.c_f80_neg.so"
define dso_local i32 @f80_neg(i32 %arg1) {
entry:
%EAX = xor i32 %arg1, -1
ret i32 %EAX
}
| ; ModuleID = 'AnghaBench/ish/emu/extr_float80.c_f80_neg.c'
source_filename = "AnghaBench/ish/emu/extr_float80.c_f80_neg.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define i32 @f80_neg(i64 %0) local_unnamed_addr #0 {
%2 = trunc i64 %0 to i32
%3 = xor i32 %2, -1
ret i32 %3
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| ish_emu_extr_float80.c_f80_neg |
; ModuleID = 'fastsocket_kernel_arch_arm_plat-omap_extr_mailbox.c_find_mboxes.so'
source_filename = "fastsocket_kernel_arch_arm_plat-omap_extr_mailbox.c_find_mboxes.so"
@mboxes = common dso_local global i64 0, align 8
declare dso_local i32 @strcmp(ptr, ptr)
define dso_local i64 @find_mboxes(i64 %arg1) {
entry:
%RBX-SKT-LOC17 = alloca i64, align 8
%RBX-SKT-LOC = alloca i64, align 8
%RAX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memload = load i64, ptr @mboxes, align 1
%0 = and i64 %memload, %memload
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %0, 0
%1 = and i64 %0, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
store i64 %memload, ptr %RAX-SKT-LOC, align 1
%4 = ptrtoint ptr @mboxes to i64
store i64 %4, ptr %RBX-SKT-LOC17, align 1
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%5 = ptrtoint ptr @mboxes to i64
store i64 %5, ptr %RBX-SKT-LOC, align 1
%6 = ptrtoint ptr @mboxes to i64
store i64 %6, ptr %RBX-SKT-LOC17, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.3
%RAX = load i64, ptr %RAX-SKT-LOC, align 1
%7 = inttoptr i64 %RAX to ptr
%memload1 = load i32, ptr %7, align 1
%8 = inttoptr i32 %memload1 to ptr
%9 = inttoptr i64 %arg1 to ptr
%EAX = call i32 @strcmp(ptr %8, ptr %9)
%10 = zext i32 %EAX to i64
%11 = zext i32 %EAX to i64
%12 = and i64 %10, %11
%highbit2 = and i64 -9223372036854775808, %12
%SF3 = icmp ne i64 %highbit2, 0
%ZF4 = icmp eq i64 %12, 0
%13 = and i64 %12, 255
%14 = call i64 @llvm.ctpop.i64(i64 %13)
%15 = and i64 %14, 1
%PF5 = icmp eq i64 %15, 0
%CmpZF_JE19 = icmp eq i1 %ZF4, true
br i1 %CmpZF_JE19, label %bb.4, label %bb.3
bb.3: ; preds = %bb.2
%RBX = load i64, ptr %RBX-SKT-LOC, align 1
%16 = inttoptr i64 %RBX to ptr
%memload6 = load i64, ptr %16, align 1
%memref-disp = add i64 %memload6, 8
%17 = inttoptr i64 %memref-disp to ptr
%memload7 = load i64, ptr %17, align 1
%RBX12 = add i64 %memload6, 8
%18 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %memload6, i64 8)
%CF = extractvalue { i64, i1 } %18, 1
%19 = and i64 %RBX12, 255
%20 = call i64 @llvm.ctpop.i64(i64 %19)
%21 = and i64 %20, 1
%PF8 = icmp eq i64 %21, 0
%ZF9 = icmp eq i64 %RBX12, 0
%highbit10 = and i64 -9223372036854775808, %RBX12
%SF11 = icmp ne i64 %highbit10, 0
%22 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %memload6, i64 8)
%OF = extractvalue { i64, i1 } %22, 1
%23 = and i64 %memload7, %memload7
%highbit13 = and i64 -9223372036854775808, %23
%SF14 = icmp ne i64 %highbit13, 0
%ZF15 = icmp eq i64 %23, 0
%24 = and i64 %23, 255
%25 = call i64 @llvm.ctpop.i64(i64 %24)
%26 = and i64 %25, 1
%PF16 = icmp eq i64 %26, 0
store i64 %RBX12, ptr %RBX-SKT-LOC17, align 1
%CmpZF_JNE = icmp eq i1 %ZF15, false
store i64 %memload7, ptr %RAX-SKT-LOC, align 1
store i64 %RBX12, ptr %RBX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.2, label %bb.4
bb.4: ; preds = %bb.3, %bb.2, %entry
%RBX18 = load i64, ptr %RBX-SKT-LOC17, align 1
ret i64 %RBX18
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/plat-omap/extr_mailbox.c_find_mboxes.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/plat-omap/extr_mailbox.c_find_mboxes.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@mboxes = common global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @find_mboxes], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef nonnull ptr @find_mboxes(ptr noundef %0) #0 {
%2 = load ptr, ptr @mboxes, align 8, !tbaa !6
%3 = icmp eq ptr %2, null
br i1 %3, label %15, label %4
4: ; preds = %1, %10
%5 = phi ptr [ %13, %10 ], [ %2, %1 ]
%6 = phi ptr [ %12, %10 ], [ @mboxes, %1 ]
%7 = load i32, ptr %5, align 8, !tbaa !10
%8 = tail call i64 @strcmp(i32 noundef %7, ptr noundef %0) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %15, label %10
10: ; preds = %4
%11 = load ptr, ptr %6, align 8, !tbaa !6
%12 = getelementptr inbounds i8, ptr %11, i64 8
%13 = load ptr, ptr %12, align 8, !tbaa !6
%14 = icmp eq ptr %13, null
br i1 %14, label %15, label %4, !llvm.loop !13
15: ; preds = %10, %4, %1
%16 = phi ptr [ @mboxes, %1 ], [ %6, %4 ], [ %12, %10 ]
ret ptr %16
}
declare i64 @strcmp(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"omap_mbox", !12, i64 0, !7, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| fastsocket_kernel_arch_arm_plat-omap_extr_mailbox.c_find_mboxes |
; ModuleID = 'timescaledb_src_extr_dimension.c_interval_to_usec.so'
source_filename = "timescaledb_src_extr_dimension.c_interval_to_usec.so"
@DAYS_PER_MONTH = common dso_local global i32 0, align 4
@USECS_PER_DAY = common dso_local global i32 0, align 4
define dso_local i64 @interval_to_usec(i64 %arg1) {
entry:
%memload = load i32, ptr @DAYS_PER_MONTH, align 1
%0 = inttoptr i64 %arg1 to ptr
%memload1 = load i32, ptr %0, align 1
%EAX = mul i32 %memload, %memload1
%memref-disp = add i64 %arg1, 4
%1 = inttoptr i64 %memref-disp to ptr
%memload2 = load i32, ptr %1, align 1
%EAX3 = add i32 %EAX, %memload2
%2 = and i32 %EAX3, 255
%3 = call i32 @llvm.ctpop.i32(i32 %2)
%4 = and i32 %3, 1
%PF = icmp eq i32 %4, 0
%memload4 = load i32, ptr @USECS_PER_DAY, align 1
%EAX5 = mul i32 %EAX3, %memload4
%RAX = sext i32 %EAX5 to i64
%memref-disp6 = add i64 %arg1, 8
%5 = inttoptr i64 %memref-disp6 to ptr
%memload7 = load i64, ptr %5, align 1
%RAX9 = add i64 %RAX, %memload7
%6 = and i64 %RAX9, 255
%7 = call i64 @llvm.ctpop.i64(i64 %6)
%8 = and i64 %7, 1
%PF8 = icmp eq i64 %8, 0
ret i64 %RAX9
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/timescaledb/src/extr_dimension.c_interval_to_usec.c'
source_filename = "AnghaBench/timescaledb/src/extr_dimension.c_interval_to_usec.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DAYS_PER_MONTH = common local_unnamed_addr global i32 0, align 4
@USECS_PER_DAY = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @interval_to_usec], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal i64 @interval_to_usec(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !6
%3 = load i32, ptr @DAYS_PER_MONTH, align 4, !tbaa !12
%4 = mul nsw i32 %3, %2
%5 = load i32, ptr @USECS_PER_DAY, align 4, !tbaa !12
%6 = getelementptr inbounds i8, ptr %0, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !13
%8 = add i32 %7, %4
%9 = mul i32 %8, %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, ptr %0, i64 8
%12 = load i64, ptr %11, align 8, !tbaa !14
%13 = add nsw i64 %12, %10
ret i64 %13
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !8, i64 4}
!14 = !{!7, !11, i64 8}
| timescaledb_src_extr_dimension.c_interval_to_usec |
; ModuleID = 'linux_drivers_media_usb_gspca_extr_se401.c_sd_init.so'
source_filename = "linux_drivers_media_usb_gspca_extr_se401.c_sd_init.so"
define dso_local i32 @sd_init() {
entry:
ret i32 0
}
| ; ModuleID = 'AnghaBench/linux/drivers/media/usb/gspca/extr_se401.c_sd_init.c'
source_filename = "AnghaBench/linux/drivers/media/usb/gspca/extr_se401.c_sd_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @sd_init], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @sd_init(ptr nocapture readnone %0) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_media_usb_gspca_extr_se401.c_sd_init |
; ModuleID = 'fastsocket_kernel_sound_pci_ac97_extr_ac97_codec.c_snd_ac97_info_enum_double.so'
source_filename = "fastsocket_kernel_sound_pci_ac97_extr_ac97_codec.c_snd_ac97_info_enum_double.so"
@SNDRV_CTL_ELEM_TYPE_ENUMERATED = common dso_local global i32 0, align 4
declare dso_local ptr @strcpy(ptr, ptr)
define dso_local i32 @snd_ac97_info_enum_double(i64 %arg1, i64 %arg2) {
entry:
%EDX-SKT-LOC = alloca i32, align 4
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%memload1 = load i32, ptr @SNDRV_CTL_ELEM_TYPE_ENUMERATED, align 1
%memref-disp = add i64 %arg2, 16
%1 = inttoptr i64 %memref-disp to ptr
store i32 %memload1, ptr %1, align 1
%2 = inttoptr i64 %memload to ptr
%memload2 = load i64, ptr %2, align 1
%memref-disp3 = add i64 %memload, 8
%3 = inttoptr i64 %memref-disp3 to ptr
%4 = load i64, ptr %3, align 1
%5 = sub i64 %memload2, %4
%6 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload2, i64 %4)
%CF = extractvalue { i64, i1 } %6, 1
%ZF = icmp eq i64 %5, 0
%highbit = and i64 -9223372036854775808, %5
%SF = icmp ne i64 %highbit, 0
%7 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload2, i64 %4)
%OF = extractvalue { i64, i1 } %7, 1
%8 = and i64 %5, 255
%9 = call i64 @llvm.ctpop.i64(i64 %8)
%10 = and i64 %9, 1
%PF = icmp eq i64 %10, 0
%DL = icmp eq i1 %ZF, true
%11 = zext i1 %DL to i32
%ECX = sub i32 2, %11
%12 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 2, i32 %11)
%CF4 = extractvalue { i32, i1 } %12, 1
%ZF5 = icmp eq i32 %ECX, 0
%highbit6 = and i32 -2147483648, %ECX
%SF7 = icmp ne i32 %highbit6, 0
%13 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 2, i32 %11)
%OF8 = extractvalue { i32, i1 } %13, 1
%14 = and i32 %ECX, 255
%15 = call i32 @llvm.ctpop.i32(i32 %14)
%16 = and i32 %15, 1
%PF9 = icmp eq i32 %16, 0
%17 = inttoptr i64 %arg2 to ptr
store i32 %ECX, ptr %17, align 1
%memref-disp10 = add i64 %memload, 16
%18 = inttoptr i64 %memref-disp10 to ptr
%memload11 = load i32, ptr %18, align 1
%memref-disp12 = add i64 %arg2, 4
%19 = inttoptr i64 %memref-disp12 to ptr
store i32 %memload11, ptr %19, align 1
%memref-disp13 = add i64 %arg2, 8
%20 = inttoptr i64 %memref-disp13 to ptr
%memload14 = load i32, ptr %20, align 1
%21 = sub i32 %memload14, %memload11
%22 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload14, i32 %memload11)
%CF15 = extractvalue { i32, i1 } %22, 1
%ZF16 = icmp eq i32 %21, 0
%highbit17 = and i32 -2147483648, %21
%SF18 = icmp ne i32 %highbit17, 0
%23 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload14, i32 %memload11)
%OF19 = extractvalue { i32, i1 } %23, 1
%24 = and i32 %21, 255
%25 = call i32 @llvm.ctpop.i32(i32 %24)
%26 = and i32 %25, 1
%PF20 = icmp eq i32 %26, 0
store i32 %memload14, ptr %EDX-SKT-LOC, align 1
%SFAndOF_JL = icmp ne i1 %SF18, %OF19
br i1 %SFAndOF_JL, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%ECX25 = sub i32 %memload11, 1
%27 = and i32 %ECX25, 255
%28 = call i32 @llvm.ctpop.i32(i32 %27)
%29 = and i32 %28, 1
%PF21 = icmp eq i32 %29, 0
%ZF22 = icmp eq i32 %ECX25, 0
%highbit23 = and i32 -2147483648, %ECX25
%SF24 = icmp ne i32 %highbit23, 0
%memref-disp26 = add i64 %arg2, 8
%30 = inttoptr i64 %memref-disp26 to ptr
store i32 %ECX25, ptr %30, align 1
store i32 %ECX25, ptr %EDX-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %entry
%memref-disp27 = add i64 %arg2, 12
%31 = inttoptr i64 %memref-disp27 to ptr
%memload28 = load i32, ptr %31, align 1
%memref-disp29 = add i64 %memload, 24
%32 = inttoptr i64 %memref-disp29 to ptr
%memload30 = load i64, ptr %32, align 1
%EDX = load i32, ptr %EDX-SKT-LOC, align 1
%RCX = sext i32 %EDX to i64
%memref-idxreg = mul i64 4, %RCX
%memref-basereg = add i64 %memload30, %memref-idxreg
%33 = inttoptr i64 %memref-basereg to ptr
%memload31 = load i32, ptr %33, align 1
%34 = inttoptr i32 %memload28 to ptr
%35 = inttoptr i32 %memload31 to ptr
%36 = call ptr @strcpy(ptr %34, ptr %35)
%RAX = ptrtoint ptr %36 to i64
ret i32 0
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/ac97/extr_ac97_codec.c_snd_ac97_info_enum_double.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/ac97/extr_ac97_codec.c_snd_ac97_info_enum_double.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SNDRV_CTL_ELEM_TYPE_ENUMERATED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @snd_ac97_info_enum_double], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @snd_ac97_info_enum_double(ptr nocapture noundef readonly %0, ptr nocapture noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = inttoptr i64 %3 to ptr
%5 = load i32, ptr @SNDRV_CTL_ELEM_TYPE_ENUMERATED, align 4, !tbaa !11
%6 = getelementptr inbounds i8, ptr %1, i64 16
store i32 %5, ptr %6, align 4, !tbaa !13
%7 = load i64, ptr %4, align 8, !tbaa !17
%8 = getelementptr inbounds i8, ptr %4, i64 8
%9 = load i64, ptr %8, align 8, !tbaa !20
%10 = icmp eq i64 %7, %9
%11 = select i1 %10, i32 1, i32 2
store i32 %11, ptr %1, align 4, !tbaa !21
%12 = getelementptr inbounds i8, ptr %4, i64 16
%13 = load i32, ptr %12, align 8, !tbaa !22
%14 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %13, ptr %14, align 4, !tbaa !23
%15 = getelementptr inbounds i8, ptr %1, i64 8
%16 = load i32, ptr %15, align 4, !tbaa !24
%17 = icmp slt i32 %16, %13
br i1 %17, label %20, label %18
18: ; preds = %2
%19 = add nsw i32 %13, -1
store i32 %19, ptr %15, align 4, !tbaa !24
br label %20
20: ; preds = %18, %2
%21 = phi i32 [ %19, %18 ], [ %16, %2 ]
%22 = getelementptr inbounds i8, ptr %1, i64 12
%23 = load i32, ptr %22, align 4, !tbaa !25
%24 = getelementptr inbounds i8, ptr %4, i64 24
%25 = load ptr, ptr %24, align 8, !tbaa !26
%26 = sext i32 %21 to i64
%27 = getelementptr inbounds i32, ptr %25, i64 %26
%28 = load i32, ptr %27, align 4, !tbaa !11
%29 = tail call i32 @strcpy(i32 noundef %23, i32 noundef %28) #2
ret i32 0
}
declare i32 @strcpy(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"snd_kcontrol", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !12, i64 16}
!14 = !{!"snd_ctl_elem_info", !12, i64 0, !15, i64 4, !12, i64 16}
!15 = !{!"TYPE_4__", !16, i64 0}
!16 = !{!"TYPE_3__", !12, i64 0, !12, i64 4, !12, i64 8}
!17 = !{!18, !8, i64 0}
!18 = !{!"ac97_enum", !8, i64 0, !8, i64 8, !12, i64 16, !19, i64 24}
!19 = !{!"any pointer", !9, i64 0}
!20 = !{!18, !8, i64 8}
!21 = !{!14, !12, i64 0}
!22 = !{!18, !12, i64 16}
!23 = !{!14, !12, i64 4}
!24 = !{!14, !12, i64 8}
!25 = !{!14, !12, i64 12}
!26 = !{!18, !19, i64 24}
| fastsocket_kernel_sound_pci_ac97_extr_ac97_codec.c_snd_ac97_info_enum_double |
; ModuleID = 'linux_arch_arm_mach-pxa_extr_gumstix.c_am300_init.so'
source_filename = "linux_arch_arm_mach-pxa_extr_gumstix.c_am300_init.so"
define dso_local i32 @am300_init() {
entry:
ret i32 0
}
| ; ModuleID = 'AnghaBench/linux/arch/arm/mach-pxa/extr_gumstix.c_am300_init.c'
source_filename = "AnghaBench/linux/arch/arm/mach-pxa/extr_gumstix.c_am300_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define weak i32 @am300_init() local_unnamed_addr #0 {
ret i32 0
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_arch_arm_mach-pxa_extr_gumstix.c_am300_init |
; ModuleID = 'fastsocket_kernel_net_rds_extr_ib_rdma.c_rds_ib_get_mr_info.so'
source_filename = "fastsocket_kernel_net_rds_extr_ib_rdma.c_rds_ib_get_mr_info.so"
define dso_local i64 @rds_ib_get_mr_info(i64 %arg1, i64 %arg2) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%1 = inttoptr i64 %memload to ptr
%memload1 = load i64, ptr %1, align 1
%2 = inttoptr i64 %arg2 to ptr
store i64 %memload1, ptr %2, align 1
ret i64 %memload1
}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/rds/extr_ib_rdma.c_rds_ib_get_mr_info.c'
source_filename = "AnghaBench/fastsocket/kernel/net/rds/extr_ib_rdma.c_rds_ib_get_mr_info.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define void @rds_ib_get_mr_info(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load <2 x i32>, ptr %3, align 4, !tbaa !11
store <2 x i32> %4, ptr %1, align 4, !tbaa !11
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"rds_ib_device", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
| fastsocket_kernel_net_rds_extr_ib_rdma.c_rds_ib_get_mr_info |
; ModuleID = 'linux_drivers_scsi_device_handler_extr_scsi_dh_emc.c_clariion_check_sense.so'
source_filename = "linux_drivers_scsi_device_handler_extr_scsi_dh_emc.c_clariion_check_sense.so"
@SUCCESS = common dso_local global i32 0, align 4
@ADD_TO_MLQUEUE = common dso_local global i32 0, align 4
@SCSI_RETURN_NOT_HANDLED = common dso_local global i32 0, align 4
define dso_local i32 @clariion_check_sense(i64 %arg1, i64 %arg2) {
entry:
%0 = inttoptr i64 %arg2 to ptr
%memload = load i32, ptr %0, align 1
%1 = sub i32 %memload, 128
%2 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload, i32 128)
%CF = extractvalue { i32, i1 } %2, 1
%ZF = icmp eq i32 %1, 0
%highbit = and i32 -2147483648, %1
%SF = icmp ne i32 %highbit, 0
%3 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload, i32 128)
%OF = extractvalue { i32, i1 } %3, 1
%4 = and i32 %1, 255
%5 = call i32 @llvm.ctpop.i32(i32 %4)
%6 = and i32 %5, 1
%PF = icmp eq i32 %6, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.6, label %bb.1
bb.1: ; preds = %entry
%7 = sub i32 %memload, 130
%8 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload, i32 130)
%CF1 = extractvalue { i32, i1 } %8, 1
%ZF2 = icmp eq i32 %7, 0
%highbit3 = and i32 -2147483648, %7
%SF4 = icmp ne i32 %highbit3, 0
%9 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload, i32 130)
%OF5 = extractvalue { i32, i1 } %9, 1
%10 = and i32 %7, 255
%11 = call i32 @llvm.ctpop.i32(i32 %10)
%12 = and i32 %11, 1
%PF6 = icmp eq i32 %12, 0
%CmpZF_JE57 = icmp eq i1 %ZF2, true
br i1 %CmpZF_JE57, label %bb.9, label %bb.2
bb.2: ; preds = %bb.1
%13 = sub i32 %memload, 129
%14 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload, i32 129)
%CF7 = extractvalue { i32, i1 } %14, 1
%ZF8 = icmp eq i32 %13, 0
%highbit9 = and i32 -2147483648, %13
%SF10 = icmp ne i32 %highbit9, 0
%15 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload, i32 129)
%OF11 = extractvalue { i32, i1 } %15, 1
%16 = and i32 %13, 255
%17 = call i32 @llvm.ctpop.i32(i32 %16)
%18 = and i32 %17, 1
%PF12 = icmp eq i32 %18, 0
%CmpZF_JNE = icmp eq i1 %ZF8, false
br i1 %CmpZF_JNE, label %bb.12, label %bb.3
bb.3: ; preds = %bb.2
%memref-disp = add i64 %arg2, 4
%19 = inttoptr i64 %memref-disp to ptr
%20 = load i32, ptr %19, align 1
%21 = zext i32 %20 to i64
%22 = zext i32 4 to i64
%23 = sub i64 %21, %22
%24 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %21, i64 %22)
%CF13 = extractvalue { i64, i1 } %24, 1
%ZF14 = icmp eq i64 %23, 0
%highbit15 = and i64 -9223372036854775808, %23
%SF16 = icmp ne i64 %highbit15, 0
%25 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %21, i64 %22)
%OF17 = extractvalue { i64, i1 } %25, 1
%26 = and i64 %23, 255
%27 = call i64 @llvm.ctpop.i64(i64 %26)
%28 = and i64 %27, 1
%PF18 = icmp eq i64 %28, 0
%CmpZF_JNE58 = icmp eq i1 %ZF14, false
br i1 %CmpZF_JNE58, label %bb.12, label %bb.4
bb.4: ; preds = %bb.3
%memref-disp19 = add i64 %arg2, 8
%29 = inttoptr i64 %memref-disp19 to ptr
%30 = load i32, ptr %29, align 1
%31 = zext i32 %30 to i64
%32 = zext i32 3 to i64
%33 = sub i64 %31, %32
%34 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %31, i64 %32)
%CF20 = extractvalue { i64, i1 } %34, 1
%ZF21 = icmp eq i64 %33, 0
%highbit22 = and i64 -9223372036854775808, %33
%SF23 = icmp ne i64 %highbit22, 0
%35 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %31, i64 %32)
%OF24 = extractvalue { i64, i1 } %35, 1
%36 = and i64 %33, 255
%37 = call i64 @llvm.ctpop.i64(i64 %36)
%38 = and i64 %37, 1
%PF25 = icmp eq i64 %38, 0
%CmpZF_JNE59 = icmp eq i1 %ZF21, false
br i1 %CmpZF_JNE59, label %bb.12, label %bb.5
bb.5: ; preds = %bb.4
br label %bb.11
bb.9: ; preds = %bb.1
%memref-disp26 = add i64 %arg2, 4
%39 = inttoptr i64 %memref-disp26 to ptr
%40 = load i32, ptr %39, align 1
%41 = zext i32 %40 to i64
%42 = zext i32 37 to i64
%43 = sub i64 %41, %42
%44 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %41, i64 %42)
%CF27 = extractvalue { i64, i1 } %44, 1
%ZF28 = icmp eq i64 %43, 0
%highbit29 = and i64 -9223372036854775808, %43
%SF30 = icmp ne i64 %highbit29, 0
%45 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %41, i64 %42)
%OF31 = extractvalue { i64, i1 } %45, 1
%46 = and i64 %43, 255
%47 = call i64 @llvm.ctpop.i64(i64 %46)
%48 = and i64 %47, 1
%PF32 = icmp eq i64 %48, 0
%CmpZF_JNE60 = icmp eq i1 %ZF28, false
br i1 %CmpZF_JNE60, label %bb.12, label %bb.10
bb.10: ; preds = %bb.9
%memref-disp33 = add i64 %arg2, 8
%49 = inttoptr i64 %memref-disp33 to ptr
%50 = load i32, ptr %49, align 1
%51 = zext i32 %50 to i64
%52 = zext i32 1 to i64
%53 = sub i64 %51, %52
%54 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %51, i64 %52)
%CF34 = extractvalue { i64, i1 } %54, 1
%ZF35 = icmp eq i64 %53, 0
%highbit36 = and i64 -9223372036854775808, %53
%SF37 = icmp ne i64 %highbit36, 0
%55 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %51, i64 %52)
%OF38 = extractvalue { i64, i1 } %55, 1
%56 = and i64 %53, 255
%57 = call i64 @llvm.ctpop.i64(i64 %56)
%58 = and i64 %57, 1
%PF39 = icmp eq i64 %58, 0
%CmpZF_JNE61 = icmp eq i1 %ZF35, false
br i1 %CmpZF_JNE61, label %bb.12, label %bb.11
bb.11: ; preds = %bb.10, %bb.5
%memload40 = load i32, ptr @SUCCESS, align 1
br label %UnifiedReturnBlock
bb.6: ; preds = %entry
%memref-disp41 = add i64 %arg2, 4
%59 = inttoptr i64 %memref-disp41 to ptr
%60 = load i32, ptr %59, align 1
%61 = zext i32 %60 to i64
%62 = zext i32 41 to i64
%63 = sub i64 %61, %62
%64 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %61, i64 %62)
%CF42 = extractvalue { i64, i1 } %64, 1
%ZF43 = icmp eq i64 %63, 0
%highbit44 = and i64 -9223372036854775808, %63
%SF45 = icmp ne i64 %highbit44, 0
%65 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %61, i64 %62)
%OF46 = extractvalue { i64, i1 } %65, 1
%66 = and i64 %63, 255
%67 = call i64 @llvm.ctpop.i64(i64 %66)
%68 = and i64 %67, 1
%PF47 = icmp eq i64 %68, 0
%CmpZF_JNE62 = icmp eq i1 %ZF43, false
br i1 %CmpZF_JNE62, label %bb.12, label %bb.7
bb.7: ; preds = %bb.6
%memref-disp48 = add i64 %arg2, 8
%69 = inttoptr i64 %memref-disp48 to ptr
%70 = load i32, ptr %69, align 1
%71 = zext i32 %70 to i64
%72 = zext i32 0 to i64
%73 = sub i64 %71, %72
%74 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %71, i64 %72)
%CF49 = extractvalue { i64, i1 } %74, 1
%ZF50 = icmp eq i64 %73, 0
%highbit51 = and i64 -9223372036854775808, %73
%SF52 = icmp ne i64 %highbit51, 0
%75 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %71, i64 %72)
%OF53 = extractvalue { i64, i1 } %75, 1
%76 = and i64 %73, 255
%77 = call i64 @llvm.ctpop.i64(i64 %76)
%78 = and i64 %77, 1
%PF54 = icmp eq i64 %78, 0
%CmpZF_JNE63 = icmp eq i1 %ZF50, false
br i1 %CmpZF_JNE63, label %bb.12, label %bb.8
bb.8: ; preds = %bb.7
%memload55 = load i32, ptr @ADD_TO_MLQUEUE, align 1
br label %UnifiedReturnBlock
bb.12: ; preds = %bb.7, %bb.6, %bb.10, %bb.9, %bb.4, %bb.3, %bb.2
%memload56 = load i32, ptr @SCSI_RETURN_NOT_HANDLED, align 1
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.12, %bb.8, %bb.11
%UnifiedRetVal = phi i32 [ %memload40, %bb.11 ], [ %memload55, %bb.8 ], [ %memload56, %bb.12 ]
ret i32 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/device_handler/extr_scsi_dh_emc.c_clariion_check_sense.c'
source_filename = "AnghaBench/linux/drivers/scsi/device_handler/extr_scsi_dh_emc.c_clariion_check_sense.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SUCCESS = common local_unnamed_addr global i32 0, align 4
@ADD_TO_MLQUEUE = common local_unnamed_addr global i32 0, align 4
@SCSI_RETURN_NOT_HANDLED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @clariion_check_sense], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @clariion_check_sense(ptr nocapture readnone %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr %1, align 4, !tbaa !6
switch i32 %3, label %28 [
i32 129, label %4
i32 130, label %12
i32 128, label %20
]
4: ; preds = %2
%5 = getelementptr inbounds i8, ptr %1, i64 4
%6 = load i32, ptr %5, align 4, !tbaa !11
%7 = icmp eq i32 %6, 4
br i1 %7, label %8, label %28
8: ; preds = %4
%9 = getelementptr inbounds i8, ptr %1, i64 8
%10 = load i32, ptr %9, align 4, !tbaa !12
%11 = icmp eq i32 %10, 3
br i1 %11, label %29, label %28
12: ; preds = %2
%13 = getelementptr inbounds i8, ptr %1, i64 4
%14 = load i32, ptr %13, align 4, !tbaa !11
%15 = icmp eq i32 %14, 37
br i1 %15, label %16, label %28
16: ; preds = %12
%17 = getelementptr inbounds i8, ptr %1, i64 8
%18 = load i32, ptr %17, align 4, !tbaa !12
%19 = icmp eq i32 %18, 1
br i1 %19, label %29, label %28
20: ; preds = %2
%21 = getelementptr inbounds i8, ptr %1, i64 4
%22 = load i32, ptr %21, align 4, !tbaa !11
%23 = icmp eq i32 %22, 41
br i1 %23, label %24, label %28
24: ; preds = %20
%25 = getelementptr inbounds i8, ptr %1, i64 8
%26 = load i32, ptr %25, align 4, !tbaa !12
%27 = icmp eq i32 %26, 0
br i1 %27, label %29, label %28
28: ; preds = %20, %24, %12, %16, %4, %8, %2
br label %29
29: ; preds = %24, %16, %8, %28
%30 = phi ptr [ @SCSI_RETURN_NOT_HANDLED, %28 ], [ @SUCCESS, %8 ], [ @SUCCESS, %16 ], [ @ADD_TO_MLQUEUE, %24 ]
%31 = load i32, ptr %30, align 4, !tbaa !13
ret i32 %31
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"scsi_sense_hdr", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = !{!7, !8, i64 8}
!13 = !{!8, !8, i64 0}
| linux_drivers_scsi_device_handler_extr_scsi_dh_emc.c_clariion_check_sense |
; ModuleID = 'freebsd_contrib_binutils_libiberty_extr_cp-demangle.c_d_print_saw_error.so'
source_filename = "freebsd_contrib_binutils_libiberty_extr_cp-demangle.c_d_print_saw_error.so"
define dso_local i8 @d_print_saw_error(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%1 = load i64, ptr %0, align 1
%2 = sub i64 %1, 0
%3 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %1, i64 0)
%CF = extractvalue { i64, i1 } %3, 1
%ZF = icmp eq i64 %2, 0
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%4 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %1, i64 0)
%OF = extractvalue { i64, i1 } %4, 1
%5 = and i64 %2, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF = icmp eq i64 %7, 0
%AL = icmp eq i1 %ZF, false
%8 = zext i1 %AL to i8
ret i8 %8
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/contrib/binutils/libiberty/extr_cp-demangle.c_d_print_saw_error.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/libiberty/extr_cp-demangle.c_d_print_saw_error.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @d_print_saw_error], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal range(i32 0, 2) i32 @d_print_saw_error(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"d_print_info", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_binutils_libiberty_extr_cp-demangle.c_d_print_saw_error |
; ModuleID = 'radare2_libr_asm_p_extr_asm_xtensa.c_xtensa_buffer_read_memory.so'
source_filename = "radare2_libr_asm_p_extr_asm_xtensa.c_xtensa_buffer_read_memory.so"
@INSN_BUFFER_SIZE = common dso_local global i64 0, align 8
@bytes = common dso_local global i32 0, align 4
declare dso_local ptr @memcpy(ptr, ptr, i64)
define dso_local i32 @xtensa_buffer_read_memory(i64 %arg1, i64 %arg2, i64 %arg3) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%memload = load i64, ptr @INSN_BUFFER_SIZE, align 1
%0 = sub i64 %memload, %arg3
%1 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload, i64 %arg3)
%CF = extractvalue { i64, i1 } %1, 1
%ZF = icmp eq i64 %0, 0
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%2 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload, i64 %arg3)
%OF = extractvalue { i64, i1 } %2, 1
%3 = and i64 %0, 255
%4 = call i64 @llvm.ctpop.i64(i64 %3)
%5 = and i64 %4, 1
%PF = icmp eq i64 %5, 0
%Cond_CMOVL = icmp ne i1 %SF, %OF
%CMOV = select i1 %Cond_CMOVL, i64 %memload, i64 %arg3
%memload1 = load i32, ptr @bytes, align 1
%6 = inttoptr i64 %arg2 to ptr
%7 = inttoptr i32 %memload1 to ptr
%8 = call ptr @memcpy(ptr %6, ptr %7, i64 %CMOV)
%RAX = ptrtoint ptr %8 to i64
ret i32 0
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/radare2/libr/asm/p/extr_asm_xtensa.c_xtensa_buffer_read_memory.c'
source_filename = "AnghaBench/radare2/libr/asm/p/extr_asm_xtensa.c_xtensa_buffer_read_memory.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@INSN_BUFFER_SIZE = common local_unnamed_addr global i64 0, align 8
@bytes = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @xtensa_buffer_read_memory], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @xtensa_buffer_read_memory(i32 %0, ptr noundef %1, i64 noundef %2, ptr nocapture readnone %3) #0 {
%5 = load i64, ptr @INSN_BUFFER_SIZE, align 8, !tbaa !6
%6 = tail call i64 @llvm.smin.i64(i64 %5, i64 %2)
%7 = load i32, ptr @bytes, align 4, !tbaa !10
%8 = tail call i32 @memcpy(ptr noundef %1, i32 noundef %7, i64 noundef %6) #3
ret i32 0
}
declare i32 @memcpy(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.smin.i64(i64, i64) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| radare2_libr_asm_p_extr_asm_xtensa.c_xtensa_buffer_read_memory |
; ModuleID = 'linux_drivers_infiniband_core_extr_cm_msgs.h_cm_req_get_alt_local_ack_timeout.so'
source_filename = "linux_drivers_infiniband_core_extr_cm_msgs.h_cm_req_get_alt_local_ack_timeout.so"
define dso_local i32 @cm_req_get_alt_local_ack_timeout(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
%EAX = lshr i32 %memload, 3
%ZF = icmp eq i32 %EAX, 0
%highbit = and i32 -2147483648, %EAX
%SF = icmp ne i32 %highbit, 0
ret i32 %EAX
}
| ; ModuleID = 'AnghaBench/linux/drivers/infiniband/core/extr_cm_msgs.h_cm_req_get_alt_local_ack_timeout.c'
source_filename = "AnghaBench/linux/drivers/infiniband/core/extr_cm_msgs.h_cm_req_get_alt_local_ack_timeout.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @cm_req_get_alt_local_ack_timeout], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal range(i32 -268435456, 268435456) i32 @cm_req_get_alt_local_ack_timeout(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = ashr i32 %2, 3
ret i32 %3
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"cm_req_msg", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_infiniband_core_extr_cm_msgs.h_cm_req_get_alt_local_ack_timeout |
; ModuleID = 'freebsd_tools_test_testfloat_extr_testfloat.c_catchSIGINT.so'
source_filename = "freebsd_tools_test_testfloat_extr_testfloat.c_catchSIGINT.so"
@stop = common dso_local global i64 0, align 8
@TRUE = common dso_local global i64 0, align 8
@EXIT_FAILURE = common dso_local global i32 0, align 4
declare dso_local void @exit(i32)
define dso_local i64 @catchSIGINT() {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%0 = load i64, ptr @stop, align 8
%1 = sub i64 %0, 0
%2 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %0, i64 0)
%CF = extractvalue { i64, i1 } %2, 1
%ZF = icmp eq i64 %1, 0
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%3 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %0, i64 0)
%OF = extractvalue { i64, i1 } %3, 1
%4 = and i64 %1, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
%CmpZF_JNE = icmp eq i1 %ZF, false
br i1 %CmpZF_JNE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%memload = load i64, ptr @TRUE, align 1
store i64 %memload, ptr @stop, align 1
%7 = ptrtoint ptr @stop to i64
ret i64 %7
bb.2: ; preds = %entry
%memload1 = load i32, ptr @EXIT_FAILURE, align 1
tail call void @exit(i32 %memload1)
unreachable
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/tools/test/testfloat/extr_testfloat.c_catchSIGINT.c'
source_filename = "AnghaBench/freebsd/tools/test/testfloat/extr_testfloat.c_catchSIGINT.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@stop = common local_unnamed_addr global i64 0, align 8
@EXIT_FAILURE = common local_unnamed_addr global i32 0, align 4
@TRUE = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @catchSIGINT], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @catchSIGINT(i32 %0) #0 {
%2 = load i64, ptr @stop, align 8, !tbaa !6
%3 = icmp eq i64 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = load i32, ptr @EXIT_FAILURE, align 4, !tbaa !10
%6 = tail call i32 @exit(i32 noundef %5) #2
unreachable
7: ; preds = %1
%8 = load i64, ptr @TRUE, align 8, !tbaa !6
store i64 %8, ptr @stop, align 8, !tbaa !6
ret void
}
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { noreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| freebsd_tools_test_testfloat_extr_testfloat.c_catchSIGINT |
; ModuleID = 'radare2_libr_asm_p_extr_asm_nios2.c_nios2_buffer_read_memory.so'
source_filename = "radare2_libr_asm_p_extr_asm_nios2.c_nios2_buffer_read_memory.so"
@bytes = common dso_local global i32 0, align 4
declare dso_local ptr @memcpy(ptr, ptr, i64)
define dso_local i32 @nios2_buffer_read_memory(i64 %arg1, i64 %arg2, i64 %arg3) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%memload = load i32, ptr @bytes, align 1
%0 = inttoptr i64 %arg2 to ptr
%1 = inttoptr i32 %memload to ptr
%2 = call ptr @memcpy(ptr %0, ptr %1, i64 %arg3)
%RAX = ptrtoint ptr %2 to i64
ret i32 0
}
| ; ModuleID = 'AnghaBench/radare2/libr/asm/p/extr_asm_nios2.c_nios2_buffer_read_memory.c'
source_filename = "AnghaBench/radare2/libr/asm/p/extr_asm_nios2.c_nios2_buffer_read_memory.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@bytes = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @nios2_buffer_read_memory], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @nios2_buffer_read_memory(i32 %0, ptr noundef %1, i32 noundef %2, ptr nocapture readnone %3) #0 {
%5 = load i32, ptr @bytes, align 4, !tbaa !6
%6 = tail call i32 @memcpy(ptr noundef %1, i32 noundef %5, i32 noundef %2) #2
ret i32 0
}
declare i32 @memcpy(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| radare2_libr_asm_p_extr_asm_nios2.c_nios2_buffer_read_memory |
; ModuleID = 'postgres_src_bin_pg_dump_extr_pg_backup_utils.c_exit_nicely.so'
source_filename = "postgres_src_bin_pg_dump_extr_pg_backup_utils.c_exit_nicely.so"
@on_exit_nicely_index = common dso_local global i32 0, align 4
@on_exit_nicely_list = common dso_local global i64 0, align 8
declare dso_local void @exit(i32)
define dso_local void @exit_nicely(i32 %arg1) {
entry:
%RBX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memload = load i32, ptr @on_exit_nicely_index, align 1
%0 = and i32 %memload, %memload
%highbit = and i32 -2147483648, %0
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %0, 0
%1 = and i32 %0, 255
%2 = call i32 @llvm.ctpop.i32(i32 %1)
%3 = and i32 %2, 1
%PF = icmp eq i32 %3, 0
%CmpZF_JLE = icmp eq i1 %ZF, true
%CmpOF_JLE = icmp ne i1 %SF, false
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
br i1 %ZFOrSF_JLE, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%4 = zext i32 %memload to i64
%RBX = add i64 %4, 1
%5 = and i64 %RBX, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF1 = icmp eq i64 %7, 0
%ZF2 = icmp eq i64 %RBX, 0
%highbit3 = and i64 -9223372036854775808, %RBX
%SF4 = icmp ne i64 %highbit3, 0
store i64 %RBX, ptr %RBX-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.2
%RBX5 = load i64, ptr %RBX-SKT-LOC, align 1
%memref-disp = add i64 %RBX5, -2
%EAX = trunc i64 %memref-disp to i32
%memload6 = load i64, ptr @on_exit_nicely_list, align 1
%8 = zext i32 %EAX to i64
%RAX = shl i64 %8, 4
%ZF7 = icmp eq i64 %RAX, 0
%highbit8 = and i64 -9223372036854775808, %RAX
%SF9 = icmp ne i64 %highbit8, 0
%memref-basereg = add i64 %memload6, %RAX
%9 = inttoptr i64 %memref-basereg to ptr
%memload10 = load i32, ptr %9, align 1
%memref-basereg11 = add i64 %memload6, %RAX
%memref-disp12 = add i64 %memref-basereg11, 8
%10 = inttoptr i64 %memref-disp12 to ptr
%memload13 = load i64, ptr %10, align 1
%11 = inttoptr i64 %memload13 to ptr
call void %11(i32 %arg1, i32 %memload10)
%RBX18 = sub i64 %RBX5, 1
%12 = and i64 %RBX18, 255
%13 = call i64 @llvm.ctpop.i64(i64 %12)
%14 = and i64 %13, 1
%PF14 = icmp eq i64 %14, 0
%ZF15 = icmp eq i64 %RBX18, 0
%highbit16 = and i64 -9223372036854775808, %RBX18
%SF17 = icmp ne i64 %highbit16, 0
%15 = sub i64 %RBX18, 1
%16 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RBX18, i64 1)
%CF = extractvalue { i64, i1 } %16, 1
%ZF19 = icmp eq i64 %15, 0
%highbit20 = and i64 -9223372036854775808, %15
%SF21 = icmp ne i64 %highbit20, 0
%17 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RBX18, i64 1)
%OF = extractvalue { i64, i1 } %17, 1
%18 = and i64 %15, 255
%19 = call i64 @llvm.ctpop.i64(i64 %18)
%20 = and i64 %19, 1
%PF22 = icmp eq i64 %20, 0
%CFCmp_JA = icmp eq i1 %CF, false
%ZFCmp_JA = icmp eq i1 %ZF19, false
%CFAndZF_JA = and i1 %ZFCmp_JA, %CFCmp_JA
store i64 %RBX18, ptr %RBX-SKT-LOC, align 1
br i1 %CFAndZF_JA, label %bb.2, label %bb.3
bb.3: ; preds = %bb.2, %entry
tail call void @exit(i32 %arg1)
unreachable
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/postgres/src/bin/pg_dump/extr_pg_backup_utils.c_exit_nicely.c'
source_filename = "AnghaBench/postgres/src/bin/pg_dump/extr_pg_backup_utils.c_exit_nicely.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32, ptr }
@on_exit_nicely_index = common local_unnamed_addr global i32 0, align 4
@on_exit_nicely_list = common local_unnamed_addr global ptr null, align 8
@mainThreadId = common local_unnamed_addr global i64 0, align 8
@parallel_init_done = common local_unnamed_addr global i64 0, align 8
; Function Attrs: noreturn nounwind ssp uwtable(sync)
define void @exit_nicely(i32 noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @on_exit_nicely_index, align 4, !tbaa !6
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %16
4: ; preds = %1
%5 = zext nneg i32 %2 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ %5, %4 ], [ %8, %6 ]
%8 = add nsw i64 %7, -1
%9 = load ptr, ptr @on_exit_nicely_list, align 8, !tbaa !10
%10 = getelementptr inbounds %struct.TYPE_2__, ptr %9, i64 %8
%11 = getelementptr inbounds i8, ptr %10, i64 8
%12 = load ptr, ptr %11, align 8, !tbaa !12
%13 = load i32, ptr %10, align 8, !tbaa !14
%14 = tail call i32 %12(i32 noundef %0, i32 noundef %13) #2
%15 = icmp ugt i64 %7, 1
br i1 %15, label %6, label %16, !llvm.loop !15
16: ; preds = %6, %1
%17 = tail call i32 @exit(i32 noundef %0) #3
unreachable
}
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #1
attributes #0 = { noreturn nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { noreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
attributes #3 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !11, i64 8}
!13 = !{!"TYPE_2__", !7, i64 0, !11, i64 8}
!14 = !{!13, !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| postgres_src_bin_pg_dump_extr_pg_backup_utils.c_exit_nicely |
; ModuleID = 'Quake-III-Arena_code_game_extr_g_items.c_Pickup_Holdable.so'
source_filename = "Quake-III-Arena_code_game_extr_g_items.c_Pickup_Holdable.so"
@bg_itemlist = common dso_local global i32 0, align 4
@STAT_HOLDABLE_ITEM = common dso_local global i64 0, align 8
@HI_KAMIKAZE = common dso_local global i64 0, align 8
@EF_KAMIKAZE = common dso_local global i32 0, align 4
@RESPAWN_HOLDABLE = common dso_local global i32 0, align 4
define dso_local i32 @Pickup_Holdable(i64 %arg1, i64 %arg2) {
entry:
%memref-disp = add i64 %arg1, 8
%0 = inttoptr i64 %memref-disp to ptr
%memload = load i64, ptr %0, align 1
%memload1 = load i64, ptr @bg_itemlist, align 1
%1 = trunc i64 %memload1 to i32
%RCX = sext i32 %1 to i64
%RCX2 = shl i64 %RCX, 3
%ZF = icmp eq i64 %RCX2, 0
%highbit = and i64 -9223372036854775808, %RCX2
%SF = icmp ne i64 %highbit, 0
%RAX = sub i64 %memload, %RCX2
%2 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload, i64 %RCX2)
%CF = extractvalue { i64, i1 } %2, 1
%ZF3 = icmp eq i64 %RAX, 0
%highbit4 = and i64 -9223372036854775808, %RAX
%SF5 = icmp ne i64 %highbit4, 0
%3 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload, i64 %RCX2)
%OF = extractvalue { i64, i1 } %3, 1
%4 = and i64 %RAX, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
%7 = inttoptr i64 %arg2 to ptr
%memload6 = load i64, ptr %7, align 1
%memref-disp7 = add i64 %memload6, 8
%8 = inttoptr i64 %memref-disp7 to ptr
%memload8 = load i64, ptr %8, align 1
%memload9 = load i64, ptr @STAT_HOLDABLE_ITEM, align 1
%memref-idxreg = mul i64 8, %memload9
%memref-basereg = add i64 %memload8, %memref-idxreg
%9 = inttoptr i64 %memref-basereg to ptr
store i64 %RAX, ptr %9, align 1
%memref-disp10 = add i64 %arg1, 8
%10 = inttoptr i64 %memref-disp10 to ptr
%memload11 = load i64, ptr %10, align 1
%11 = inttoptr i64 %memload11 to ptr
%memload12 = load i64, ptr %11, align 1
%12 = load i64, ptr @HI_KAMIKAZE, align 8
%13 = sub i64 %memload12, %12
%14 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload12, i64 %12)
%CF13 = extractvalue { i64, i1 } %14, 1
%ZF14 = icmp eq i64 %13, 0
%highbit15 = and i64 -9223372036854775808, %13
%SF16 = icmp ne i64 %highbit15, 0
%15 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload12, i64 %12)
%OF17 = extractvalue { i64, i1 } %15, 1
%16 = and i64 %13, 255
%17 = call i64 @llvm.ctpop.i64(i64 %16)
%18 = and i64 %17, 1
%PF18 = icmp eq i64 %18, 0
%CmpZF_JNE = icmp eq i1 %ZF14, false
br i1 %CmpZF_JNE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%memload19 = load i32, ptr @EF_KAMIKAZE, align 1
%19 = inttoptr i64 %arg2 to ptr
%memload20 = load i64, ptr %19, align 1
%20 = inttoptr i64 %memload20 to ptr
%21 = load i32, ptr %20, align 1
%22 = or i32 %21, %memload19
%23 = and i32 %22, 255
%24 = call i32 @llvm.ctpop.i32(i32 %23)
%25 = and i32 %24, 1
%PF21 = icmp eq i32 %25, 0
store i32 %22, ptr %20, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %entry
%memload22 = load i32, ptr @RESPAWN_HOLDABLE, align 1
ret i32 %memload22
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/Quake-III-Arena/code/game/extr_g_items.c_Pickup_Holdable.c'
source_filename = "AnghaBench/Quake-III-Arena/code/game/extr_g_items.c_Pickup_Holdable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_7__ = type { i64 }
@bg_itemlist = common local_unnamed_addr global i32 0, align 4
@STAT_HOLDABLE_ITEM = common local_unnamed_addr global i64 0, align 8
@HI_KAMIKAZE = common local_unnamed_addr global i64 0, align 8
@EF_KAMIKAZE = common local_unnamed_addr global i32 0, align 4
@RESPAWN_HOLDABLE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync)
define i32 @Pickup_Holdable(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load i32, ptr @bg_itemlist, align 4, !tbaa !11
%6 = sext i32 %5 to i64
%7 = sub nsw i64 0, %6
%8 = getelementptr inbounds %struct.TYPE_7__, ptr %4, i64 %7
%9 = load ptr, ptr %1, align 8, !tbaa !13
%10 = getelementptr inbounds i8, ptr %9, i64 8
%11 = load ptr, ptr %10, align 8, !tbaa !14
%12 = load i64, ptr @STAT_HOLDABLE_ITEM, align 8, !tbaa !17
%13 = getelementptr inbounds ptr, ptr %11, i64 %12
store ptr %8, ptr %13, align 8, !tbaa !19
%14 = load ptr, ptr %3, align 8, !tbaa !6
%15 = load i64, ptr %14, align 8, !tbaa !20
%16 = load i64, ptr @HI_KAMIKAZE, align 8, !tbaa !17
%17 = icmp eq i64 %15, %16
br i1 %17, label %18, label %23
18: ; preds = %2
%19 = load i32, ptr @EF_KAMIKAZE, align 4, !tbaa !11
%20 = load ptr, ptr %1, align 8, !tbaa !13
%21 = load i32, ptr %20, align 8, !tbaa !22
%22 = or i32 %21, %19
store i32 %22, ptr %20, align 8, !tbaa !22
br label %23
23: ; preds = %18, %2
%24 = load i32, ptr @RESPAWN_HOLDABLE, align 4, !tbaa !11
ret i32 %24
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"TYPE_10__", !8, i64 0, !8, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!15, !8, i64 8}
!15 = !{!"TYPE_9__", !16, i64 0}
!16 = !{!"TYPE_8__", !12, i64 0, !8, i64 8}
!17 = !{!18, !18, i64 0}
!18 = !{!"long", !9, i64 0}
!19 = !{!8, !8, i64 0}
!20 = !{!21, !18, i64 0}
!21 = !{!"TYPE_7__", !18, i64 0}
!22 = !{!15, !12, i64 0}
| Quake-III-Arena_code_game_extr_g_items.c_Pickup_Holdable |
; ModuleID = 'freebsd_crypto_openssl_crypto_engine_extr_eng_lib.c_ENGINE_get_id.so'
source_filename = "freebsd_crypto_openssl_crypto_engine_extr_eng_lib.c_ENGINE_get_id.so"
define dso_local i64 @ENGINE_get_id(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
ret i64 %memload
}
| ; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/engine/extr_eng_lib.c_ENGINE_get_id.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/engine/extr_eng_lib.c_ENGINE_get_id.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define ptr @ENGINE_get_id(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_crypto_openssl_crypto_engine_extr_eng_lib.c_ENGINE_get_id |
; ModuleID = 'qmk_firmware_keyboards_40percentclub_6lit_keymaps_macro_extr_keymap.c_process_record_user.so'
source_filename = "qmk_firmware_keyboards_40percentclub_6lit_keymaps_macro_extr_keymap.c_process_record_user.so"
define dso_local i32 @process_record_user() {
entry:
ret i32 1
}
| ; ModuleID = 'AnghaBench/qmk_firmware/keyboards/40percentclub/6lit/keymaps/macro/extr_keymap.c_process_record_user.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/40percentclub/6lit/keymaps/macro/extr_keymap.c_process_record_user.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef i32 @process_record_user(i32 noundef %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 {
ret i32 1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| qmk_firmware_keyboards_40percentclub_6lit_keymaps_macro_extr_keymap.c_process_record_user |
; ModuleID = 'linux_drivers_scsi_csiostor_extr_csio_defs.h_csio_get_state.so'
source_filename = "linux_drivers_scsi_csiostor_extr_csio_defs.h_csio_get_state.so"
define dso_local i32 @csio_get_state(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
ret i32 %memload
}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/csiostor/extr_csio_defs.h_csio_get_state.c'
source_filename = "AnghaBench/linux/drivers/scsi/csiostor/extr_csio_defs.h_csio_get_state.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @csio_get_state], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal i32 @csio_get_state(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
ret i32 %2
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"csio_sm", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_scsi_csiostor_extr_csio_defs.h_csio_get_state |
; ModuleID = 'radare2_shlr_grub_kern_extr_env.c_grub_env_hashval.so'
source_filename = "radare2_shlr_grub_kern_extr_env.c_grub_env_hashval.so"
@HASHSZ = common dso_local global i32 0, align 4
define dso_local i32 @grub_env_hashval(i64 %arg1) {
entry:
%EAX-SKT-LOC24 = alloca i32, align 4
%RDI-SKT-LOC = alloca i64, align 8
%EAX-SKT-LOC = alloca i64, align 8
%CL-SKT-LOC = alloca i64, align 8
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
%1 = trunc i32 %memload to i8
%ECX = zext i8 %1 to i32
%2 = trunc i32 %ECX to i8
%3 = trunc i32 %ECX to i8
%4 = and i8 %2, %3
%highbit = and i8 -128, %4
%SF = icmp ne i8 %highbit, 0
%ZF = icmp eq i8 %4, 0
%5 = call i8 @llvm.ctpop.i8(i8 %4)
%6 = and i8 %5, 1
%PF = icmp eq i8 %6, 0
%7 = zext i32 %ECX to i64
store i64 %7, ptr %CL-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%RDI = add i64 %arg1, 1
%8 = and i64 %RDI, 255
%9 = call i64 @llvm.ctpop.i64(i64 %8)
%10 = and i64 %9, 1
%PF1 = icmp eq i64 %10, 0
%ZF2 = icmp eq i64 %RDI, 0
%highbit3 = and i64 -9223372036854775808, %RDI
%SF4 = icmp ne i64 %highbit3, 0
%11 = zext i32 0 to i64
store i64 %11, ptr %EAX-SKT-LOC, align 1
store i64 %RDI, ptr %RDI-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.2
%12 = load i64, ptr %CL-SKT-LOC, align 1
%CL = trunc i64 %12 to i8
%ECX5 = sext i8 %CL to i32
%13 = zext i32 %ECX5 to i64
%memref-idxreg = mul i64 4, %13
%14 = zext i32 %ECX5 to i64
%memref-basereg = add i64 %14, %memref-idxreg
%ECX6 = trunc i64 %memref-basereg to i32
%15 = load i64, ptr %EAX-SKT-LOC, align 1
%EAX = trunc i64 %15 to i32
%EAX10 = add nsw i32 %EAX, %ECX6
%highbit7 = and i32 -2147483648, %EAX10
%SF8 = icmp ne i32 %highbit7, 0
%ZF9 = icmp eq i32 %EAX10, 0
%RDI11 = load i64, ptr %RDI-SKT-LOC, align 1
%16 = inttoptr i64 %RDI11 to ptr
%memload12 = load i32, ptr %16, align 1
%17 = trunc i32 %memload12 to i8
%ECX13 = zext i8 %17 to i32
%RDI18 = add i64 %RDI11, 1
%18 = and i64 %RDI18, 255
%19 = call i64 @llvm.ctpop.i64(i64 %18)
%20 = and i64 %19, 1
%PF14 = icmp eq i64 %20, 0
%ZF15 = icmp eq i64 %RDI18, 0
%highbit16 = and i64 -9223372036854775808, %RDI18
%SF17 = icmp ne i64 %highbit16, 0
%21 = trunc i32 %ECX13 to i8
%22 = trunc i32 %ECX13 to i8
%23 = and i8 %21, %22
%highbit19 = and i8 -128, %23
%SF20 = icmp ne i8 %highbit19, 0
%ZF21 = icmp eq i8 %23, 0
%24 = call i8 @llvm.ctpop.i8(i8 %23)
%25 = and i8 %24, 1
%PF22 = icmp eq i8 %25, 0
store i32 %EAX10, ptr %EAX-SKT-LOC24, align 1
%CmpZF_JNE = icmp eq i1 %ZF21, false
%26 = zext i32 %ECX13 to i64
store i64 %26, ptr %CL-SKT-LOC, align 1
%27 = zext i32 %EAX10 to i64
store i64 %27, ptr %EAX-SKT-LOC, align 1
store i64 %RDI18, ptr %RDI-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.2, label %bb.3
bb.3: ; preds = %bb.2
br label %bb.5
bb.4: ; preds = %entry
store i32 0, ptr %EAX-SKT-LOC24, align 1
br label %bb.5
bb.5: ; preds = %bb.4, %bb.3
%memload23 = load i32, ptr @HASHSZ, align 1
%EAX25 = load i32, ptr %EAX-SKT-LOC24, align 1
%28 = zext i32 %EAX25 to i64
%29 = zext i32 0 to i64
%div_hb_ls = shl nuw i64 %29, 32
%dividend = or i64 %div_hb_ls, %28
%30 = zext i32 %memload23 to i64
%div_q = udiv i64 %dividend, %30
%EAX26 = trunc i64 %div_q to i32
%div_r = urem i64 %dividend, %30
%EDX = trunc i64 %div_r to i32
ret i32 %EDX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/radare2/shlr/grub/kern/extr_env.c_grub_env_hashval.c'
source_filename = "AnghaBench/radare2/shlr/grub/kern/extr_env.c_grub_env_hashval.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@HASHSZ = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @grub_env_hashval], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @grub_env_hashval(ptr nocapture noundef readonly %0) #0 {
%2 = load i8, ptr %0, align 1, !tbaa !6
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 0, %1 ]
%7 = phi ptr [ %8, %4 ], [ %0, %1 ]
%8 = getelementptr inbounds i8, ptr %7, i64 1
%9 = sext i8 %5 to i32
%10 = mul nsw i32 %9, 5
%11 = add i32 %10, %6
%12 = load i8, ptr %8, align 1, !tbaa !6
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4, !llvm.loop !9
14: ; preds = %4, %1
%15 = phi i32 [ 0, %1 ], [ %11, %4 ]
%16 = load i32, ptr @HASHSZ, align 4, !tbaa !11
%17 = urem i32 %15, %16
ret i32 %17
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
| radare2_shlr_grub_kern_extr_env.c_grub_env_hashval |
; ModuleID = 'linux_drivers_net_wireless_ath_ath9k_extr_dfs_debug.h_ath9k_dfs_init_debug.so'
source_filename = "linux_drivers_net_wireless_ath_ath9k_extr_dfs_debug.h_ath9k_dfs_init_debug.so"
define dso_local void @ath9k_dfs_init_debug() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_dfs_debug.h_ath9k_dfs_init_debug.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_dfs_debug.h_ath9k_dfs_init_debug.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ath9k_dfs_init_debug], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @ath9k_dfs_init_debug(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_net_wireless_ath_ath9k_extr_dfs_debug.h_ath9k_dfs_init_debug |
; ModuleID = 'fastsocket_kernel_scripts_mod_extr_modpost.c_is_vmlinux.so'
source_filename = "fastsocket_kernel_scripts_mod_extr_modpost.c_is_vmlinux.so"
@0 = private unnamed_addr constant [18 x i8] c"vmlinux\00vmlinux.o\00", align 1, !ROData_SecInfo !0
declare dso_local ptr @strrchr(ptr, i32)
declare dso_local i32 @strcmp(ptr, ptr)
define dso_local i8 @is_vmlinux(i64 %arg1) {
entry:
%AL-SKT-LOC = alloca i32, align 4
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%1 = inttoptr i64 %arg1 to ptr
%2 = call ptr @strrchr(ptr %1, i32 47)
%RAX = ptrtoint ptr %2 to i64
%memref-disp = add i64 %RAX, 1
%3 = and i64 %RAX, %RAX
%highbit = and i64 -9223372036854775808, %3
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %3, 0
%4 = and i64 %3, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
%Cond_CMOVE = icmp eq i1 %ZF, true
%CMOV = select i1 %Cond_CMOVE, i64 %arg1, i64 %memref-disp
%7 = inttoptr i64 %CMOV to ptr
%EAX = call i32 @strcmp(ptr %7, ptr @0)
%8 = zext i32 %EAX to i64
%9 = zext i32 %EAX to i64
%10 = and i64 %8, %9
%highbit1 = and i64 -9223372036854775808, %10
%SF2 = icmp ne i64 %highbit1, 0
%ZF3 = icmp eq i64 %10, 0
%11 = and i64 %10, 255
%12 = call i64 @llvm.ctpop.i64(i64 %11)
%13 = and i64 %12, 1
%PF4 = icmp eq i64 %13, 0
%CmpZF_JE = icmp eq i1 %ZF3, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%14 = inttoptr i64 %CMOV to ptr
%EAX6 = call i32 @strcmp(ptr %14, ptr getelementptr inbounds ([18 x i8], ptr @0, i32 0, i32 8))
%RCX = zext i32 %EAX6 to i64
%15 = and i64 %RCX, %RCX
%highbit7 = and i64 -9223372036854775808, %15
%SF8 = icmp ne i64 %highbit7, 0
%ZF9 = icmp eq i64 %15, 0
%16 = and i64 %15, 255
%17 = call i64 @llvm.ctpop.i64(i64 %16)
%18 = and i64 %17, 1
%PF10 = icmp eq i64 %18, 0
%AL = icmp eq i1 %ZF9, true
%19 = zext i1 %AL to i32
store i32 %19, ptr %AL-SKT-LOC, align 1
br label %bb.3
bb.2: ; preds = %entry
store i32 1, ptr %AL-SKT-LOC, align 1
br label %bb.3
bb.3: ; preds = %bb.2, %bb.1
%20 = load i32, ptr %AL-SKT-LOC, align 1
%AL11 = trunc i32 %20 to i8
ret i8 %AL11
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/scripts/mod/extr_modpost.c_is_vmlinux.c'
source_filename = "AnghaBench/fastsocket/kernel/scripts/mod/extr_modpost.c_is_vmlinux.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [8 x i8] c"vmlinux\00", align 1
@.str.1 = private unnamed_addr constant [10 x i8] c"vmlinux.o\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @is_vmlinux], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @is_vmlinux(ptr noundef %0) #0 {
%2 = tail call ptr @strrchr(ptr noundef %0, i8 noundef signext 47) #2
%3 = icmp eq ptr %2, null
%4 = getelementptr inbounds i8, ptr %2, i64 1
%5 = select i1 %3, ptr %0, ptr %4
%6 = tail call i64 @strcmp(ptr noundef %5, ptr noundef nonnull @.str) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = tail call i64 @strcmp(ptr noundef %5, ptr noundef nonnull @.str.1) #2
%10 = icmp eq i64 %9, 0
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %8, %1
%13 = phi i32 [ 1, %1 ], [ %11, %8 ]
ret i32 %13
}
declare ptr @strrchr(ptr noundef, i8 noundef signext) local_unnamed_addr #1
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_scripts_mod_extr_modpost.c_is_vmlinux |
; ModuleID = 'freebsd_contrib_ofed_infiniband-diags_src_extr_ibccconfig.c_parselonglongint.so'
source_filename = "freebsd_contrib_ofed_infiniband-diags_src_extr_ibccconfig.c_parselonglongint.so"
@errno = common dso_local global i64 0, align 8
@ERANGE = common dso_local global i64 0, align 8
@rodata_13 = private unnamed_addr constant [41 x i8] c"value out of range\00invalid integer input\00", align 1, !ROData_SecInfo !0
declare dso_local i64 @strtoull(ptr, ptr, i32)
define dso_local i32 @parselonglongint(i64 %arg1, i64 %arg2) {
entry:
%EAX-SKT-LOC = alloca i64, align 8
%RAX-SKT-LOC = alloca i64, align 8
%0 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %0 to i64
store i64 3735928559, ptr %0, align 8
store i64 3735928559, ptr %0, align 8
store i64 3735928559, ptr %0, align 8
%1 = sext i32 0 to i64
store i64 %1, ptr %0, align 1
%2 = sext i32 0 to i64
store i64 %2, ptr @errno, align 1
%3 = inttoptr i64 %arg1 to ptr
%RAX = call i64 @strtoull(ptr %3, ptr %0, i32 0)
%4 = trunc i64 %RAX to i32
%5 = inttoptr i64 %arg2 to ptr
store i32 %4, ptr %5, align 1
%memload = load i64, ptr %0, align 1
%6 = and i64 %memload, %memload
%highbit = and i64 -9223372036854775808, %6
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %6, 0
%7 = and i64 %6, 255
%8 = call i64 @llvm.ctpop.i64(i64 %7)
%9 = and i64 %8, 1
%PF = icmp eq i64 %9, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%10 = inttoptr i64 %memload to ptr
%11 = load i8, ptr %10, align 1
%12 = zext i8 %11 to i64
%13 = zext i8 0 to i64
%14 = sub i64 %12, %13
%15 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %12, i64 %13)
%CF = extractvalue { i64, i1 } %15, 1
%ZF1 = icmp eq i64 %14, 0
%highbit2 = and i64 -9223372036854775808, %14
%SF3 = icmp ne i64 %highbit2, 0
%16 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %12, i64 %13)
%OF = extractvalue { i64, i1 } %16, 1
%17 = and i64 %14, 255
%18 = call i64 @llvm.ctpop.i64(i64 %17)
%19 = and i64 %18, 1
%PF4 = icmp eq i64 %19, 0
%memload5 = load i64, ptr @errno, align 1
store i64 %memload5, ptr %RAX-SKT-LOC, align 1
%CmpZF_JNE = icmp eq i1 %ZF1, false
br i1 %CmpZF_JNE, label %bb.5, label %bb.2
bb.2: ; preds = %bb.1
%20 = and i64 %memload5, %memload5
%highbit6 = and i64 -9223372036854775808, %20
%SF7 = icmp ne i64 %highbit6, 0
%ZF8 = icmp eq i64 %20, 0
%21 = and i64 %20, 255
%22 = call i64 @llvm.ctpop.i64(i64 %21)
%23 = and i64 %22, 1
%PF9 = icmp eq i64 %23, 0
%CmpZF_JNE23 = icmp eq i1 %ZF8, false
br i1 %CmpZF_JNE23, label %bb.5, label %bb.3
bb.4: ; preds = %entry
%memload10 = load i64, ptr @errno, align 1
%24 = and i64 %memload10, %memload10
%highbit11 = and i64 -9223372036854775808, %24
%SF12 = icmp ne i64 %highbit11, 0
%ZF13 = icmp eq i64 %24, 0
%25 = and i64 %24, 255
%26 = call i64 @llvm.ctpop.i64(i64 %25)
%27 = and i64 %26, 1
%PF14 = icmp eq i64 %27, 0
store i64 %memload10, ptr %RAX-SKT-LOC, align 1
%CmpZF_JE24 = icmp eq i1 %ZF13, true
br i1 %CmpZF_JE24, label %bb.3, label %bb.5
bb.5: ; preds = %bb.4, %bb.2, %bb.1
%28 = load i64, ptr @ERANGE, align 8
%RAX15 = load i64, ptr %RAX-SKT-LOC, align 1
%29 = sub i64 %RAX15, %28
%30 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RAX15, i64 %28)
%CF16 = extractvalue { i64, i1 } %30, 1
%ZF17 = icmp eq i64 %29, 0
%highbit18 = and i64 -9223372036854775808, %29
%SF19 = icmp ne i64 %highbit18, 0
%31 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RAX15, i64 %28)
%OF20 = extractvalue { i64, i1 } %31, 1
%32 = and i64 %29, 255
%33 = call i64 @llvm.ctpop.i64(i64 %32)
%34 = and i64 %33, 1
%PF21 = icmp eq i64 %34, 0
%RCX = ptrtoint ptr @rodata_13 to i64
%RAX22 = ptrtoint ptr getelementptr inbounds ([41 x i8], ptr @rodata_13, i32 0, i32 19) to i64, !ROData_Index !1
%Cond_CMOVE = icmp eq i1 %ZF17, true
%CMOV = select i1 %Cond_CMOVE, i64 %RCX, i64 %RAX22
store i64 %CMOV, ptr %EAX-SKT-LOC, align 1
br label %bb.6
bb.3: ; preds = %bb.4, %bb.2
%35 = zext i32 0 to i64
store i64 %35, ptr %EAX-SKT-LOC, align 1
br label %bb.6
bb.6: ; preds = %bb.5, %bb.3
%36 = load i64, ptr %EAX-SKT-LOC, align 1
%EAX = trunc i64 %36 to i32
ret i32 %EAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
!1 = !{ptr getelementptr inbounds ([41 x i8], ptr @rodata_13, i32 0, i32 19)}
| ; ModuleID = 'AnghaBench/freebsd/contrib/ofed/infiniband-diags/src/extr_ibccconfig.c_parselonglongint.c'
source_filename = "AnghaBench/freebsd/contrib/ofed/infiniband-diags/src/extr_ibccconfig.c_parselonglongint.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@errno = common local_unnamed_addr global i64 0, align 8
@ERANGE = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [19 x i8] c"value out of range\00", align 1
@.str.1 = private unnamed_addr constant [22 x i8] c"invalid integer input\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @parselonglongint], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @parselonglongint(ptr noundef %0, ptr nocapture noundef writeonly %1) #0 {
%3 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
store ptr null, ptr %3, align 8, !tbaa !6
store i64 0, ptr @errno, align 8, !tbaa !10
%4 = call i32 @strtoull(ptr noundef %0, ptr noundef nonnull %3, i32 noundef 0) #3
store i32 %4, ptr %1, align 4, !tbaa !12
%5 = load ptr, ptr %3, align 8, !tbaa !6
%6 = icmp eq ptr %5, null
br i1 %6, label %13, label %7
7: ; preds = %2
%8 = load i8, ptr %5, align 1, !tbaa !14
%9 = icmp ne i8 %8, 0
%10 = load i64, ptr @errno, align 8
%11 = icmp ne i64 %10, 0
%12 = select i1 %9, i1 true, i1 %11
br i1 %12, label %16, label %21
13: ; preds = %2
%14 = load i64, ptr @errno, align 8, !tbaa !10
%15 = icmp eq i64 %14, 0
br i1 %15, label %21, label %16
16: ; preds = %13, %7
%17 = phi i64 [ %14, %13 ], [ %10, %7 ]
%18 = load i64, ptr @ERANGE, align 8, !tbaa !10
%19 = icmp eq i64 %17, %18
%20 = select i1 %19, ptr @.str, ptr @.str.1
br label %21
21: ; preds = %13, %7, %16
%22 = phi ptr [ %20, %16 ], [ null, %7 ], [ null, %13 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret ptr %22
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @strtoull(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!8, !8, i64 0}
| freebsd_contrib_ofed_infiniband-diags_src_extr_ibccconfig.c_parselonglongint |
; ModuleID = 'ccv_lib_extr_ccv_util.c_ccv_array_clear.so'
source_filename = "ccv_lib_extr_ccv_util.c_ccv_array_clear.so"
define dso_local void @ccv_array_clear(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%1 = sext i32 0 to i64
store i64 %1, ptr %0, align 1
ret void
}
| ; ModuleID = 'AnghaBench/ccv/lib/extr_ccv_util.c_ccv_array_clear.c'
source_filename = "AnghaBench/ccv/lib/extr_ccv_util.c_ccv_array_clear.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync)
define void @ccv_array_clear(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
store i64 0, ptr %0, align 8, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| ccv_lib_extr_ccv_util.c_ccv_array_clear |
; ModuleID = 'linux_net_ipv6_extr_..bridgebr_private.h_br_sysfs_delbr.so'
source_filename = "linux_net_ipv6_extr_..bridgebr_private.h_br_sysfs_delbr.so"
define dso_local void @br_sysfs_delbr() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/linux/net/ipv6/extr_..bridgebr_private.h_br_sysfs_delbr.c'
source_filename = "AnghaBench/linux/net/ipv6/extr_..bridgebr_private.h_br_sysfs_delbr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @br_sysfs_delbr], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @br_sysfs_delbr(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_net_ipv6_extr_..bridgebr_private.h_br_sysfs_delbr |
; ModuleID = 'DOOM_linuxdoom-1.10_extr_am_map.c_AM_drawCrosshair.so'
source_filename = "DOOM_linuxdoom-1.10_extr_am_map.c_AM_drawCrosshair.so"
@fb = common dso_local global i64 0, align 8
@f_w = common dso_local global i32 0, align 4
@f_h = common dso_local global i32 0, align 4
define dso_local i64 @AM_drawCrosshair(i32 %arg1) {
entry:
%memload = load i64, ptr @fb, align 1
%memload1 = load i32, ptr @f_h, align 1
%EDX = add i32 %memload1, 1
%0 = and i32 %EDX, 255
%1 = call i32 @llvm.ctpop.i32(i32 %0)
%2 = and i32 %1, 1
%PF = icmp eq i32 %2, 0
%ZF = icmp eq i32 %EDX, 0
%highbit = and i32 -2147483648, %EDX
%SF = icmp ne i32 %highbit, 0
%memload2 = load i32, ptr @f_w, align 1
%EDX3 = mul i32 %EDX, %memload2
%ECX = lshr i32 %EDX3, 31
%ZF4 = icmp eq i32 %ECX, 0
%highbit5 = and i32 -2147483648, %ECX
%SF6 = icmp ne i32 %highbit5, 0
%ECX10 = add nsw i32 %ECX, %EDX3
%highbit7 = and i32 -2147483648, %ECX10
%SF8 = icmp ne i32 %highbit7, 0
%ZF9 = icmp eq i32 %ECX10, 0
%ECX14 = lshr i32 %ECX10, 1
%ZF11 = icmp eq i32 %ECX14, 0
%highbit12 = and i32 -2147483648, %ECX14
%SF13 = icmp ne i32 %highbit12, 0
%RCX = sext i32 %ECX14 to i64
%memref-idxreg = mul i64 4, %RCX
%memref-basereg = add i64 %memload, %memref-idxreg
%3 = inttoptr i64 %memref-basereg to ptr
store i32 %arg1, ptr %3, align 1
ret i64 %memload
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/DOOM/linuxdoom-1.10/extr_am_map.c_AM_drawCrosshair.c'
source_filename = "AnghaBench/DOOM/linuxdoom-1.10/extr_am_map.c_AM_drawCrosshair.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@fb = common local_unnamed_addr global ptr null, align 8
@f_w = common local_unnamed_addr global i32 0, align 4
@f_h = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: write, inaccessiblemem: none) uwtable(sync)
define void @AM_drawCrosshair(i32 noundef %0) local_unnamed_addr #0 {
%2 = load ptr, ptr @fb, align 8, !tbaa !6
%3 = load i32, ptr @f_w, align 4, !tbaa !10
%4 = load i32, ptr @f_h, align 4, !tbaa !10
%5 = add nsw i32 %4, 1
%6 = mul nsw i32 %5, %3
%7 = sdiv i32 %6, 2
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, ptr %2, i64 %8
store i32 %0, ptr %9, align 4, !tbaa !10
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| DOOM_linuxdoom-1.10_extr_am_map.c_AM_drawCrosshair |
; ModuleID = 'kphp-kdb_vkext_extr_vkext_schema_memcache.c_tls_pop.so'
source_filename = "kphp-kdb_vkext_extr_vkext_schema_memcache.c_tls_pop.so"
define dso_local void @tls_pop() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/kphp-kdb/vkext/extr_vkext_schema_memcache.c_tls_pop.c'
source_filename = "AnghaBench/kphp-kdb/vkext/extr_vkext_schema_memcache.c_tls_pop.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TLUNI_NEXT = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noalias ptr @tls_pop(ptr nocapture noundef readnone %0, ptr nocapture noundef readnone %1, ptr nocapture noundef readnone %2, ptr nocapture noundef readnone %3) local_unnamed_addr #0 {
ret ptr undef
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| kphp-kdb_vkext_extr_vkext_schema_memcache.c_tls_pop |
; ModuleID = 'linux_fs_ubifs_extr_lpt.c_calc_pnode_num_from_parent.so'
source_filename = "linux_fs_ubifs_extr_lpt.c_calc_pnode_num_from_parent.so"
@UBIFS_LPT_FANOUT_SHIFT = common dso_local global i32 0, align 4
@UBIFS_LPT_FANOUT = common dso_local global i32 0, align 4
define dso_local i32 @calc_pnode_num_from_parent(i64 %arg1, i64 %arg2, i32 %arg3) {
entry:
%CL-SKT-LOC = alloca i32, align 4
%EAX-SKT-LOC193 = alloca i32, align 4
%R9D-SKT-LOC = alloca i64, align 8
%ESI-SKT-LOC164 = alloca i64, align 8
%EAX-SKT-LOC152 = alloca i64, align 8
%R10D-SKT-LOC = alloca i64, align 8
%ESI-SKT-LOC = alloca i64, align 8
%EAX-SKT-LOC = alloca i64, align 8
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
%1 = sub i32 %memload, 1
%2 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload, i32 1)
%CF = extractvalue { i32, i1 } %2, 1
%ZF = icmp eq i32 %1, 0
%highbit = and i32 -2147483648, %1
%SF = icmp ne i32 %highbit, 0
%3 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload, i32 1)
%OF = extractvalue { i32, i1 } %3, 1
%4 = and i32 %1, 255
%5 = call i32 @llvm.ctpop.i32(i32 %4)
%6 = and i32 %5, 1
%PF = icmp eq i32 %6, 0
%CmpZF_JLE = icmp eq i1 %ZF, true
%CmpOF_JLE = icmp ne i1 %SF, %OF
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
br i1 %ZFOrSF_JLE, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%7 = inttoptr i64 %arg2 to ptr
%memload1 = load i32, ptr %7, align 1
%memload2 = load i32, ptr @UBIFS_LPT_FANOUT_SHIFT, align 1
%memload3 = load i32, ptr @UBIFS_LPT_FANOUT, align 1
%R8D = sub i32 %memload3, 1
%8 = and i32 %R8D, 255
%9 = call i32 @llvm.ctpop.i32(i32 %8)
%10 = and i32 %9, 1
%PF4 = icmp eq i32 %10, 0
%ZF5 = icmp eq i32 %R8D, 0
%highbit6 = and i32 -2147483648, %R8D
%SF7 = icmp ne i32 %highbit6, 0
%memref-disp = add i32 %memload, -2
%R10D = sub i32 %memload, 1
%11 = and i32 %R10D, 255
%12 = call i32 @llvm.ctpop.i32(i32 %11)
%13 = and i32 %12, 1
%PF8 = icmp eq i32 %13, 0
%ZF9 = icmp eq i32 %R10D, 0
%highbit10 = and i32 -2147483648, %R10D
%SF11 = icmp ne i32 %highbit10, 0
%R9D = and i32 %R10D, 3
%14 = and i32 %R9D, 255
%15 = call i32 @llvm.ctpop.i32(i32 %14)
%16 = and i32 %15, 1
%PF12 = icmp eq i32 %16, 0
%ZF13 = icmp eq i32 %R9D, 0
%highbit14 = and i32 -2147483648, %R9D
%SF15 = icmp ne i32 %highbit14, 0
%17 = sub i32 %memref-disp, 3
%18 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memref-disp, i32 3)
%CF16 = extractvalue { i32, i1 } %18, 1
%ZF17 = icmp eq i32 %17, 0
%highbit18 = and i32 -2147483648, %17
%SF19 = icmp ne i32 %highbit18, 0
%19 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memref-disp, i32 3)
%OF20 = extractvalue { i32, i1 } %19, 1
%20 = and i32 %17, 255
%21 = call i32 @llvm.ctpop.i32(i32 %20)
%22 = and i32 %21, 1
%PF21 = icmp eq i32 %22, 0
%23 = zext i32 %memload1 to i64
store i64 %23, ptr %ESI-SKT-LOC, align 1
%24 = zext i32 %memload1 to i64
store i64 %24, ptr %ESI-SKT-LOC164, align 1
%25 = zext i32 %R9D to i64
store i64 %25, ptr %R9D-SKT-LOC, align 1
store i32 %memload2, ptr %CL-SKT-LOC, align 1
%CFCmp_JAE = icmp eq i1 %CF16, false
br i1 %CFCmp_JAE, label %bb.4, label %bb.2
bb.2: ; preds = %bb.1
%26 = zext i32 0 to i64
store i64 %26, ptr %EAX-SKT-LOC152, align 1
store i32 0, ptr %EAX-SKT-LOC193, align 1
br label %bb.6
bb.4: ; preds = %bb.1
%R10D26 = and i32 %R10D, -4
%27 = and i32 %R10D26, 255
%28 = call i32 @llvm.ctpop.i32(i32 %27)
%29 = and i32 %28, 1
%PF22 = icmp eq i32 %29, 0
%ZF23 = icmp eq i32 %R10D26, 0
%highbit24 = and i32 -2147483648, %R10D26
%SF25 = icmp ne i32 %highbit24, 0
%30 = zext i32 0 to i64
store i64 %30, ptr %EAX-SKT-LOC, align 1
%31 = zext i32 %R10D26 to i64
store i64 %31, ptr %R10D-SKT-LOC, align 1
br label %bb.5
bb.5: ; preds = %bb.4, %bb.5
%32 = load i64, ptr %EAX-SKT-LOC, align 1
%EAX = trunc i64 %32 to i32
%33 = trunc i32 %memload2 to i8
%34 = zext i8 %33 to i32
%shift-cnt-msk = and i32 %34, 63
%EAX30 = shl i32 %EAX, %shift-cnt-msk
%shrd_cf_count_cmp = icmp sgt i32 %shift-cnt-msk, 0
%35 = sub i32 32, %shift-cnt-msk
%shld_cf_count_shift = shl i32 1, %35
%shld_cf_count_and = and i32 %EAX, %shld_cf_count_shift
%shld_cf_count_shft_out = icmp sgt i32 %shld_cf_count_and, 0
%shld_cf_update = select i1 %shrd_cf_count_cmp, i1 %shld_cf_count_shft_out, i1 false
%ZF27 = icmp eq i32 %EAX30, 0
%highbit28 = and i32 -2147483648, %EAX30
%SF29 = icmp ne i32 %highbit28, 0
%36 = load i64, ptr %ESI-SKT-LOC, align 1
%ESI = trunc i64 %36 to i32
%EDI = and i32 %R8D, %ESI
%highbit31 = and i32 -2147483648, %EDI
%SF32 = icmp ne i32 %highbit31, 0
%ZF33 = icmp eq i32 %EDI, 0
%37 = and i32 %EDI, 255
%38 = call i32 @llvm.ctpop.i32(i32 %37)
%39 = and i32 %38, 1
%PF34 = icmp eq i32 %39, 0
%EDI39 = or i32 %EDI, %EAX30
%highbit35 = and i32 -2147483648, %EDI39
%SF36 = icmp ne i32 %highbit35, 0
%ZF37 = icmp eq i32 %EDI39, 0
%40 = and i32 %EDI39, 255
%41 = call i32 @llvm.ctpop.i32(i32 %40)
%42 = and i32 %41, 1
%PF38 = icmp eq i32 %42, 0
%43 = trunc i32 %memload2 to i8
%44 = zext i8 %43 to i32
%shift-cnt-msk40 = and i32 %44, 63
%ESI49 = ashr i32 %ESI, %shift-cnt-msk40
%shrd_cf_count_cmp41 = icmp sgt i32 %shift-cnt-msk40, 0
%45 = sub i32 32, %shift-cnt-msk40
%shld_cf_count_shift42 = shl i32 1, %45
%shld_cf_count_and43 = and i32 %ESI, %shld_cf_count_shift42
%shld_cf_count_shft_out44 = icmp sgt i32 %shld_cf_count_and43, 0
%shld_cf_update45 = select i1 %shrd_cf_count_cmp41, i1 %shld_cf_count_shft_out44, i1 false
%ZF46 = icmp eq i32 %ESI49, 0
%highbit47 = and i32 -2147483648, %ESI49
%SF48 = icmp ne i32 %highbit47, 0
%46 = trunc i32 %memload2 to i8
%47 = zext i8 %46 to i32
%shift-cnt-msk50 = and i32 %47, 63
%EDI59 = shl i32 %EDI39, %shift-cnt-msk50
%shrd_cf_count_cmp51 = icmp sgt i32 %shift-cnt-msk50, 0
%48 = sub i32 32, %shift-cnt-msk50
%shld_cf_count_shift52 = shl i32 1, %48
%shld_cf_count_and53 = and i32 %EDI39, %shld_cf_count_shift52
%shld_cf_count_shft_out54 = icmp sgt i32 %shld_cf_count_and53, 0
%shld_cf_update55 = select i1 %shrd_cf_count_cmp51, i1 %shld_cf_count_shft_out54, i1 %shld_cf_update45
%ZF56 = icmp eq i32 %EDI59, 0
%highbit57 = and i32 -2147483648, %EDI59
%SF58 = icmp ne i32 %highbit57, 0
%EAX64 = and i32 %R8D, %ESI49
%highbit60 = and i32 -2147483648, %EAX64
%SF61 = icmp ne i32 %highbit60, 0
%ZF62 = icmp eq i32 %EAX64, 0
%49 = and i32 %EAX64, 255
%50 = call i32 @llvm.ctpop.i32(i32 %49)
%51 = and i32 %50, 1
%PF63 = icmp eq i32 %51, 0
%EAX69 = or i32 %EAX64, %EDI59
%highbit65 = and i32 -2147483648, %EAX69
%SF66 = icmp ne i32 %highbit65, 0
%ZF67 = icmp eq i32 %EAX69, 0
%52 = and i32 %EAX69, 255
%53 = call i32 @llvm.ctpop.i32(i32 %52)
%54 = and i32 %53, 1
%PF68 = icmp eq i32 %54, 0
%55 = trunc i32 %memload2 to i8
%56 = zext i8 %55 to i32
%shift-cnt-msk70 = and i32 %56, 63
%ESI79 = ashr i32 %ESI49, %shift-cnt-msk70
%shrd_cf_count_cmp71 = icmp sgt i32 %shift-cnt-msk70, 0
%57 = sub i32 32, %shift-cnt-msk70
%shld_cf_count_shift72 = shl i32 1, %57
%shld_cf_count_and73 = and i32 %ESI49, %shld_cf_count_shift72
%shld_cf_count_shft_out74 = icmp sgt i32 %shld_cf_count_and73, 0
%shld_cf_update75 = select i1 %shrd_cf_count_cmp71, i1 %shld_cf_count_shft_out74, i1 false
%ZF76 = icmp eq i32 %ESI79, 0
%highbit77 = and i32 -2147483648, %ESI79
%SF78 = icmp ne i32 %highbit77, 0
%58 = trunc i32 %memload2 to i8
%59 = zext i8 %58 to i32
%shift-cnt-msk80 = and i32 %59, 63
%EAX89 = shl i32 %EAX69, %shift-cnt-msk80
%shrd_cf_count_cmp81 = icmp sgt i32 %shift-cnt-msk80, 0
%60 = sub i32 32, %shift-cnt-msk80
%shld_cf_count_shift82 = shl i32 1, %60
%shld_cf_count_and83 = and i32 %EAX69, %shld_cf_count_shift82
%shld_cf_count_shft_out84 = icmp sgt i32 %shld_cf_count_and83, 0
%shld_cf_update85 = select i1 %shrd_cf_count_cmp81, i1 %shld_cf_count_shft_out84, i1 %shld_cf_update75
%ZF86 = icmp eq i32 %EAX89, 0
%highbit87 = and i32 -2147483648, %EAX89
%SF88 = icmp ne i32 %highbit87, 0
%EDI94 = and i32 %R8D, %ESI79
%highbit90 = and i32 -2147483648, %EDI94
%SF91 = icmp ne i32 %highbit90, 0
%ZF92 = icmp eq i32 %EDI94, 0
%61 = and i32 %EDI94, 255
%62 = call i32 @llvm.ctpop.i32(i32 %61)
%63 = and i32 %62, 1
%PF93 = icmp eq i32 %63, 0
%EDI99 = or i32 %EDI94, %EAX89
%highbit95 = and i32 -2147483648, %EDI99
%SF96 = icmp ne i32 %highbit95, 0
%ZF97 = icmp eq i32 %EDI99, 0
%64 = and i32 %EDI99, 255
%65 = call i32 @llvm.ctpop.i32(i32 %64)
%66 = and i32 %65, 1
%PF98 = icmp eq i32 %66, 0
%67 = trunc i32 %memload2 to i8
%68 = zext i8 %67 to i32
%shift-cnt-msk100 = and i32 %68, 63
%ESI109 = ashr i32 %ESI79, %shift-cnt-msk100
%shrd_cf_count_cmp101 = icmp sgt i32 %shift-cnt-msk100, 0
%69 = sub i32 32, %shift-cnt-msk100
%shld_cf_count_shift102 = shl i32 1, %69
%shld_cf_count_and103 = and i32 %ESI79, %shld_cf_count_shift102
%shld_cf_count_shft_out104 = icmp sgt i32 %shld_cf_count_and103, 0
%shld_cf_update105 = select i1 %shrd_cf_count_cmp101, i1 %shld_cf_count_shft_out104, i1 false
%ZF106 = icmp eq i32 %ESI109, 0
%highbit107 = and i32 -2147483648, %ESI109
%SF108 = icmp ne i32 %highbit107, 0
%70 = trunc i32 %memload2 to i8
%71 = zext i8 %70 to i32
%shift-cnt-msk110 = and i32 %71, 63
%EDI119 = shl i32 %EDI99, %shift-cnt-msk110
%shrd_cf_count_cmp111 = icmp sgt i32 %shift-cnt-msk110, 0
%72 = sub i32 32, %shift-cnt-msk110
%shld_cf_count_shift112 = shl i32 1, %72
%shld_cf_count_and113 = and i32 %EDI99, %shld_cf_count_shift112
%shld_cf_count_shft_out114 = icmp sgt i32 %shld_cf_count_and113, 0
%shld_cf_update115 = select i1 %shrd_cf_count_cmp111, i1 %shld_cf_count_shft_out114, i1 %shld_cf_update105
%ZF116 = icmp eq i32 %EDI119, 0
%highbit117 = and i32 -2147483648, %EDI119
%SF118 = icmp ne i32 %highbit117, 0
%EAX124 = and i32 %R8D, %ESI109
%highbit120 = and i32 -2147483648, %EAX124
%SF121 = icmp ne i32 %highbit120, 0
%ZF122 = icmp eq i32 %EAX124, 0
%73 = and i32 %EAX124, 255
%74 = call i32 @llvm.ctpop.i32(i32 %73)
%75 = and i32 %74, 1
%PF123 = icmp eq i32 %75, 0
%EAX129 = or i32 %EAX124, %EDI119
%highbit125 = and i32 -2147483648, %EAX129
%SF126 = icmp ne i32 %highbit125, 0
%ZF127 = icmp eq i32 %EAX129, 0
%76 = and i32 %EAX129, 255
%77 = call i32 @llvm.ctpop.i32(i32 %76)
%78 = and i32 %77, 1
%PF128 = icmp eq i32 %78, 0
%79 = trunc i32 %memload2 to i8
%80 = zext i8 %79 to i32
%shift-cnt-msk130 = and i32 %80, 63
%ESI139 = ashr i32 %ESI109, %shift-cnt-msk130
%shrd_cf_count_cmp131 = icmp sgt i32 %shift-cnt-msk130, 0
%81 = sub i32 32, %shift-cnt-msk130
%shld_cf_count_shift132 = shl i32 1, %81
%shld_cf_count_and133 = and i32 %ESI109, %shld_cf_count_shift132
%shld_cf_count_shft_out134 = icmp sgt i32 %shld_cf_count_and133, 0
%shld_cf_update135 = select i1 %shrd_cf_count_cmp131, i1 %shld_cf_count_shft_out134, i1 false
%ZF136 = icmp eq i32 %ESI139, 0
%highbit137 = and i32 -2147483648, %ESI139
%SF138 = icmp ne i32 %highbit137, 0
%82 = load i64, ptr %R10D-SKT-LOC, align 1
%R10D140 = trunc i64 %82 to i32
%R10D147 = add i32 %R10D140, -4
%83 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %R10D140, i32 -4)
%CF141 = extractvalue { i32, i1 } %83, 1
%84 = and i32 %R10D147, 255
%85 = call i32 @llvm.ctpop.i32(i32 %84)
%86 = and i32 %85, 1
%PF142 = icmp eq i32 %86, 0
%ZF143 = icmp eq i32 %R10D147, 0
%highbit144 = and i32 -2147483648, %R10D147
%SF145 = icmp ne i32 %highbit144, 0
%87 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %R10D140, i32 -4)
%OF146 = extractvalue { i32, i1 } %87, 1
%88 = zext i32 %EAX129 to i64
store i64 %88, ptr %EAX-SKT-LOC152, align 1
%89 = zext i32 %ESI139 to i64
store i64 %89, ptr %ESI-SKT-LOC164, align 1
store i32 %EAX129, ptr %EAX-SKT-LOC193, align 1
%CmpZF_JNE = icmp eq i1 %ZF143, false
%90 = zext i32 %EAX129 to i64
store i64 %90, ptr %EAX-SKT-LOC, align 1
%91 = zext i32 %ESI139 to i64
store i64 %91, ptr %ESI-SKT-LOC, align 1
%92 = zext i32 %R10D147 to i64
store i64 %92, ptr %R10D-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.5, label %bb.6
bb.6: ; preds = %bb.5, %bb.2
%93 = and i32 %R9D, %R9D
%highbit148 = and i32 -2147483648, %93
%SF149 = icmp ne i32 %highbit148, 0
%ZF150 = icmp eq i32 %93, 0
%94 = and i32 %93, 255
%95 = call i32 @llvm.ctpop.i32(i32 %94)
%96 = and i32 %95, 1
%PF151 = icmp eq i32 %96, 0
%CmpZF_JE = icmp eq i1 %ZF150, true
br i1 %CmpZF_JE, label %bb.9, label %bb.8
bb.8: ; preds = %bb.8, %bb.6
%97 = load i64, ptr %EAX-SKT-LOC152, align 1
%EAX153 = trunc i64 %97 to i32
%98 = trunc i32 %memload2 to i8
%99 = zext i8 %98 to i32
%shift-cnt-msk154 = and i32 %99, 63
%EDI163 = shl i32 %EAX153, %shift-cnt-msk154
%shrd_cf_count_cmp155 = icmp sgt i32 %shift-cnt-msk154, 0
%100 = sub i32 32, %shift-cnt-msk154
%shld_cf_count_shift156 = shl i32 1, %100
%shld_cf_count_and157 = and i32 %EAX153, %shld_cf_count_shift156
%shld_cf_count_shft_out158 = icmp sgt i32 %shld_cf_count_and157, 0
%shld_cf_update159 = select i1 %shrd_cf_count_cmp155, i1 %shld_cf_count_shft_out158, i1 false
%ZF160 = icmp eq i32 %EDI163, 0
%highbit161 = and i32 -2147483648, %EDI163
%SF162 = icmp ne i32 %highbit161, 0
%101 = load i64, ptr %ESI-SKT-LOC164, align 1
%ESI165 = trunc i64 %101 to i32
%EAX170 = and i32 %R8D, %ESI165
%highbit166 = and i32 -2147483648, %EAX170
%SF167 = icmp ne i32 %highbit166, 0
%ZF168 = icmp eq i32 %EAX170, 0
%102 = and i32 %EAX170, 255
%103 = call i32 @llvm.ctpop.i32(i32 %102)
%104 = and i32 %103, 1
%PF169 = icmp eq i32 %104, 0
%EAX175 = or i32 %EAX170, %EDI163
%highbit171 = and i32 -2147483648, %EAX175
%SF172 = icmp ne i32 %highbit171, 0
%ZF173 = icmp eq i32 %EAX175, 0
%105 = and i32 %EAX175, 255
%106 = call i32 @llvm.ctpop.i32(i32 %105)
%107 = and i32 %106, 1
%PF174 = icmp eq i32 %107, 0
%108 = trunc i32 %memload2 to i8
%109 = zext i8 %108 to i32
%shift-cnt-msk176 = and i32 %109, 63
%ESI185 = ashr i32 %ESI165, %shift-cnt-msk176
%shrd_cf_count_cmp177 = icmp sgt i32 %shift-cnt-msk176, 0
%110 = sub i32 32, %shift-cnt-msk176
%shld_cf_count_shift178 = shl i32 1, %110
%shld_cf_count_and179 = and i32 %ESI165, %shld_cf_count_shift178
%shld_cf_count_shft_out180 = icmp sgt i32 %shld_cf_count_and179, 0
%shld_cf_update181 = select i1 %shrd_cf_count_cmp177, i1 %shld_cf_count_shft_out180, i1 false
%ZF182 = icmp eq i32 %ESI185, 0
%highbit183 = and i32 -2147483648, %ESI185
%SF184 = icmp ne i32 %highbit183, 0
%111 = load i64, ptr %R9D-SKT-LOC, align 1
%R9D186 = trunc i64 %111 to i32
%R9D191 = sub i32 %R9D186, 1
%112 = and i32 %R9D191, 255
%113 = call i32 @llvm.ctpop.i32(i32 %112)
%114 = and i32 %113, 1
%PF187 = icmp eq i32 %114, 0
%ZF188 = icmp eq i32 %R9D191, 0
%highbit189 = and i32 -2147483648, %R9D191
%SF190 = icmp ne i32 %highbit189, 0
store i32 %EAX175, ptr %EAX-SKT-LOC193, align 1
%CmpZF_JNE210 = icmp eq i1 %ZF188, false
%115 = zext i32 %EAX175 to i64
store i64 %115, ptr %EAX-SKT-LOC152, align 1
%116 = zext i32 %ESI185 to i64
store i64 %116, ptr %ESI-SKT-LOC164, align 1
%117 = zext i32 %R9D191 to i64
store i64 %117, ptr %R9D-SKT-LOC, align 1
br i1 %CmpZF_JNE210, label %bb.8, label %bb.9
bb.3: ; preds = %entry
%memload192 = load i32, ptr @UBIFS_LPT_FANOUT_SHIFT, align 1
store i32 0, ptr %EAX-SKT-LOC193, align 1
store i32 %memload192, ptr %CL-SKT-LOC, align 1
br label %bb.9
bb.9: ; preds = %bb.3, %bb.8, %bb.6
%EAX194 = load i32, ptr %EAX-SKT-LOC193, align 1
%118 = load i32, ptr %CL-SKT-LOC, align 1
%CL = trunc i32 %118 to i8
%119 = zext i8 %CL to i32
%shift-cnt-msk195 = and i32 %119, 63
%EAX204 = shl i32 %EAX194, %shift-cnt-msk195
%shrd_cf_count_cmp196 = icmp sgt i32 %shift-cnt-msk195, 0
%120 = sub i32 32, %shift-cnt-msk195
%shld_cf_count_shift197 = shl i32 1, %120
%shld_cf_count_and198 = and i32 %EAX194, %shld_cf_count_shift197
%shld_cf_count_shft_out199 = icmp sgt i32 %shld_cf_count_and198, 0
%shld_cf_update200 = select i1 %shrd_cf_count_cmp196, i1 %shld_cf_count_shft_out199, i1 false
%ZF201 = icmp eq i32 %EAX204, 0
%highbit202 = and i32 -2147483648, %EAX204
%SF203 = icmp ne i32 %highbit202, 0
%EAX209 = or i32 %EAX204, %arg3
%highbit205 = and i32 -2147483648, %EAX209
%SF206 = icmp ne i32 %highbit205, 0
%ZF207 = icmp eq i32 %EAX209, 0
%121 = and i32 %EAX209, 255
%122 = call i32 @llvm.ctpop.i32(i32 %121)
%123 = and i32 %122, 1
%PF208 = icmp eq i32 %123, 0
ret i32 %EAX209
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/fs/ubifs/extr_lpt.c_calc_pnode_num_from_parent.c'
source_filename = "AnghaBench/linux/fs/ubifs/extr_lpt.c_calc_pnode_num_from_parent.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@UBIFS_LPT_FANOUT_SHIFT = common local_unnamed_addr global i32 0, align 4
@UBIFS_LPT_FANOUT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @calc_pnode_num_from_parent], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @calc_pnode_num_from_parent(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i32 noundef %2) #0 {
%4 = load i32, ptr %0, align 4, !tbaa !6
%5 = icmp sgt i32 %4, 1
%6 = load i32, ptr @UBIFS_LPT_FANOUT_SHIFT, align 4, !tbaa !11
br i1 %5, label %7, label %22
7: ; preds = %3
%8 = load i32, ptr %1, align 4, !tbaa !12
%9 = load i32, ptr @UBIFS_LPT_FANOUT, align 4, !tbaa !11
%10 = add nsw i32 %9, -1
%11 = add nsw i32 %4, -2
br label %12
12: ; preds = %7, %12
%13 = phi i32 [ 0, %7 ], [ %18, %12 ]
%14 = phi i32 [ %8, %7 ], [ %19, %12 ]
%15 = phi i32 [ 0, %7 ], [ %20, %12 ]
%16 = shl i32 %13, %6
%17 = and i32 %10, %14
%18 = or i32 %17, %16
%19 = ashr i32 %14, %6
%20 = add nuw nsw i32 %15, 1
%21 = icmp eq i32 %15, %11
br i1 %21, label %22, label %12, !llvm.loop !14
22: ; preds = %12, %3
%23 = phi i32 [ 0, %3 ], [ %18, %12 ]
%24 = shl i32 %23, %6
%25 = or i32 %24, %2
ret i32 %25
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ubifs_info", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"ubifs_nnode", !8, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
| linux_fs_ubifs_extr_lpt.c_calc_pnode_num_from_parent |
; ModuleID = 'darwin-xnu_osfmk_arm64_extr_machine_routines.c_ml_cause_interrupt.so'
source_filename = "darwin-xnu_osfmk_arm64_extr_machine_routines.c_ml_cause_interrupt.so"
define dso_local void @ml_cause_interrupt() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/darwin-xnu/osfmk/arm64/extr_machine_routines.c_ml_cause_interrupt.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/arm64/extr_machine_routines.c_ml_cause_interrupt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define void @ml_cause_interrupt() local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| darwin-xnu_osfmk_arm64_extr_machine_routines.c_ml_cause_interrupt |
; ModuleID = 'freebsd_contrib_libdivsufsort_lib_extr_utils.c__compare.so'
source_filename = "freebsd_contrib_libdivsufsort_lib_extr_utils.c__compare.so"
define dso_local i64 @_compare(i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %arg5, i64 %arg6) {
entry:
%R10-SKT-LOC41 = alloca i64, align 8
%R10-SKT-LOC = alloca i64, align 8
%0 = inttoptr i64 %arg6 to ptr
%memload = load i64, ptr %0, align 1
%memref-basereg = add i64 %memload, %arg5
%1 = sub i64 %memref-basereg, %arg2
%2 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memref-basereg, i64 %arg2)
%CF = extractvalue { i64, i1 } %2, 1
%ZF = icmp eq i64 %1, 0
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%3 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memref-basereg, i64 %arg2)
%OF = extractvalue { i64, i1 } %3, 1
%4 = and i64 %1, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
store i64 %memload, ptr %R10-SKT-LOC, align 1
store i64 %memload, ptr %R10-SKT-LOC41, align 1
%CFCmp_JAE = icmp eq i1 %CF, false
br i1 %CFCmp_JAE, label %bb.6, label %bb.1
bb.1: ; preds = %entry
%7 = sub i64 %memload, %arg4
%8 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload, i64 %arg4)
%CF1 = extractvalue { i64, i1 } %8, 1
%ZF2 = icmp eq i64 %7, 0
%highbit3 = and i64 -9223372036854775808, %7
%SF4 = icmp ne i64 %highbit3, 0
%9 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload, i64 %arg4)
%OF5 = extractvalue { i64, i1 } %9, 1
%10 = and i64 %7, 255
%11 = call i64 @llvm.ctpop.i64(i64 %10)
%12 = and i64 %11, 1
%PF6 = icmp eq i64 %12, 0
%CFCmp_JAE57 = icmp eq i1 %CF1, false
br i1 %CFCmp_JAE57, label %bb.6, label %bb.2
bb.2: ; preds = %bb.1
%memref-idxreg = mul i64 8, %arg5
%memref-basereg7 = add i64 %arg1, %memref-idxreg
%R8 = add i64 %arg5, 1
%13 = and i64 %R8, 255
%14 = call i64 @llvm.ctpop.i64(i64 %13)
%15 = and i64 %14, 1
%PF8 = icmp eq i64 %15, 0
%ZF9 = icmp eq i64 %R8, 0
%highbit10 = and i64 -9223372036854775808, %R8
%SF11 = icmp ne i64 %highbit10, 0
br label %bb.3
bb.3: ; preds = %bb.2, %bb.5
%R10 = load i64, ptr %R10-SKT-LOC, align 1
%memref-idxreg12 = mul i64 8, %R10
%memref-basereg13 = add i64 %memref-basereg7, %memref-idxreg12
%16 = inttoptr i64 %memref-basereg13 to ptr
%memload14 = load i64, ptr %16, align 1
%memref-idxreg15 = mul i64 8, %R10
%memref-basereg16 = add i64 %arg3, %memref-idxreg15
%17 = inttoptr i64 %memref-basereg16 to ptr
%18 = load i64, ptr %17, align 1
%RAX = sub i64 %memload14, %18
%19 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload14, i64 %18)
%CF17 = extractvalue { i64, i1 } %19, 1
%ZF18 = icmp eq i64 %RAX, 0
%highbit19 = and i64 -9223372036854775808, %RAX
%SF20 = icmp ne i64 %highbit19, 0
%20 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload14, i64 %18)
%OF21 = extractvalue { i64, i1 } %20, 1
%21 = and i64 %RAX, 255
%22 = call i64 @llvm.ctpop.i64(i64 %21)
%23 = and i64 %22, 1
%PF22 = icmp eq i64 %23, 0
%CmpZF_JNE = icmp eq i1 %ZF18, false
br i1 %CmpZF_JNE, label %bb.7, label %bb.4
bb.4: ; preds = %bb.3
%memref-basereg23 = add i64 %R8, %R10
%R1028 = add i64 %R10, 1
%24 = and i64 %R1028, 255
%25 = call i64 @llvm.ctpop.i64(i64 %24)
%26 = and i64 %25, 1
%PF24 = icmp eq i64 %26, 0
%ZF25 = icmp eq i64 %R1028, 0
%highbit26 = and i64 -9223372036854775808, %R1028
%SF27 = icmp ne i64 %highbit26, 0
%27 = sub i64 %memref-basereg23, %arg2
%28 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memref-basereg23, i64 %arg2)
%CF29 = extractvalue { i64, i1 } %28, 1
%ZF30 = icmp eq i64 %27, 0
%highbit31 = and i64 -9223372036854775808, %27
%SF32 = icmp ne i64 %highbit31, 0
%29 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memref-basereg23, i64 %arg2)
%OF33 = extractvalue { i64, i1 } %29, 1
%30 = and i64 %27, 255
%31 = call i64 @llvm.ctpop.i64(i64 %30)
%32 = and i64 %31, 1
%PF34 = icmp eq i64 %32, 0
store i64 %R1028, ptr %R10-SKT-LOC41, align 1
%CFCmp_JAE58 = icmp eq i1 %CF29, false
store i64 %R1028, ptr %R10-SKT-LOC, align 1
br i1 %CFCmp_JAE58, label %bb.6, label %bb.5
bb.5: ; preds = %bb.4
%ld-stk-prom43 = load i64, ptr %R10-SKT-LOC41, align 8
%33 = sub i64 %ld-stk-prom43, %arg4
%ld-stk-prom42 = load i64, ptr %R10-SKT-LOC41, align 8
%34 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %ld-stk-prom42, i64 %arg4)
%CF35 = extractvalue { i64, i1 } %34, 1
%ZF36 = icmp eq i64 %33, 0
%highbit37 = and i64 -9223372036854775808, %33
%SF38 = icmp ne i64 %highbit37, 0
%ld-stk-prom = load i64, ptr %R10-SKT-LOC41, align 8
%35 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %ld-stk-prom, i64 %arg4)
%OF39 = extractvalue { i64, i1 } %35, 1
%36 = and i64 %33, 255
%37 = call i64 @llvm.ctpop.i64(i64 %36)
%38 = and i64 %37, 1
%PF40 = icmp eq i64 %38, 0
%CmpCF_JB = icmp eq i1 %CF35, true
br i1 %CmpCF_JB, label %bb.3, label %bb.6
bb.7: ; preds = %bb.3
%39 = inttoptr i64 %arg6 to ptr
store i64 %R10, ptr %39, align 1
br label %UnifiedReturnBlock
bb.6: ; preds = %bb.5, %bb.4, %bb.1, %entry
%R1044 = load i64, ptr %R10-SKT-LOC41, align 1
%40 = inttoptr i64 %arg6 to ptr
store i64 %R1044, ptr %40, align 1
%41 = sub i64 %R1044, %arg4
%42 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R1044, i64 %arg4)
%CF45 = extractvalue { i64, i1 } %42, 1
%ZF46 = icmp eq i64 %41, 0
%highbit47 = and i64 -9223372036854775808, %41
%SF48 = icmp ne i64 %highbit47, 0
%43 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R1044, i64 %arg4)
%OF49 = extractvalue { i64, i1 } %43, 1
%44 = and i64 %41, 255
%45 = call i64 @llvm.ctpop.i64(i64 %44)
%46 = and i64 %45, 1
%PF50 = icmp eq i64 %46, 0
%AL = icmp eq i1 %ZF46, false
%47 = zext i1 %AL to i64
%CF51 = icmp ne i64 0, 0
%RAX56 = sub i64 0, %47
%ZF52 = icmp eq i64 %RAX56, 0
%highbit53 = and i64 -9223372036854775808, %RAX56
%SF54 = icmp ne i64 %highbit53, 0
%48 = and i64 %RAX56, 255
%49 = call i64 @llvm.ctpop.i64(i64 %48)
%50 = and i64 %49, 1
%PF55 = icmp eq i64 %50, 0
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.6, %bb.7
%UnifiedRetVal = phi i64 [ %RAX, %bb.7 ], [ %RAX56, %bb.6 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/contrib/libdivsufsort/lib/extr_utils.c__compare.c'
source_filename = "AnghaBench/freebsd/contrib/libdivsufsort/lib/extr_utils.c__compare.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @_compare], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(argmem: readwrite) uwtable(sync)
define internal i32 @_compare(ptr nocapture noundef readonly %0, i64 noundef %1, ptr nocapture noundef readonly %2, i64 noundef %3, i64 noundef %4, ptr nocapture noundef %5) #0 {
%7 = load i64, ptr %5, align 8, !tbaa !6
%8 = add i64 %7, %4
%9 = icmp ult i64 %8, %1
%10 = icmp ult i64 %7, %3
%11 = and i1 %9, %10
br i1 %11, label %12, label %28
12: ; preds = %6, %21
%13 = phi i64 [ %23, %21 ], [ %7, %6 ]
%14 = phi i64 [ %22, %21 ], [ %8, %6 ]
%15 = getelementptr inbounds i64, ptr %0, i64 %14
%16 = load i64, ptr %15, align 8, !tbaa !6
%17 = getelementptr inbounds i64, ptr %2, i64 %13
%18 = load i64, ptr %17, align 8, !tbaa !6
%19 = sub nsw i64 %16, %18
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %27
21: ; preds = %12
%22 = add nuw i64 %14, 1
%23 = add nuw i64 %13, 1
%24 = icmp ult i64 %22, %1
%25 = icmp ult i64 %23, %3
%26 = select i1 %24, i1 %25, i1 false
br i1 %26, label %12, label %28, !llvm.loop !10
27: ; preds = %12
store i64 %13, ptr %5, align 8, !tbaa !6
br label %32
28: ; preds = %21, %6
%29 = phi i64 [ %7, %6 ], [ %23, %21 ]
store i64 %29, ptr %5, align 8, !tbaa !6
%30 = icmp ne i64 %29, %3
%31 = sext i1 %30 to i64
br label %32
32: ; preds = %27, %28
%33 = phi i64 [ %31, %28 ], [ %19, %27 ]
%34 = trunc i64 %33 to i32
ret i32 %34
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| freebsd_contrib_libdivsufsort_lib_extr_utils.c__compare |
; ModuleID = 'Provenance_Cores_PicoDrive_pico_extr_z80if.c_z80_exit.so'
source_filename = "Provenance_Cores_PicoDrive_pico_extr_z80if.c_z80_exit.so"
define dso_local void @z80_exit() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/Provenance/Cores/PicoDrive/pico/extr_z80if.c_z80_exit.c'
source_filename = "AnghaBench/Provenance/Cores/PicoDrive/pico/extr_z80if.c_z80_exit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define void @z80_exit() local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| Provenance_Cores_PicoDrive_pico_extr_z80if.c_z80_exit |
; ModuleID = 'linux_arch_x86_events_extr_core.c_x86_event_sysfs_show.so'
source_filename = "linux_arch_x86_events_extr_core.c_x86_event_sysfs_show.so"
@ARCH_PERFMON_EVENTSEL_UMASK = common dso_local global i32 0, align 4
@ARCH_PERFMON_EVENTSEL_CMASK = common dso_local global i32 0, align 4
@ARCH_PERFMON_EVENTSEL_EDGE = common dso_local global i32 0, align 4
@ARCH_PERFMON_EVENTSEL_PIN_CONTROL = common dso_local global i32 0, align 4
@ARCH_PERFMON_EVENTSEL_ANY = common dso_local global i32 0, align 4
@ARCH_PERFMON_EVENTSEL_INV = common dso_local global i32 0, align 4
@0 = private unnamed_addr constant [63 x i8] c"event=0x%02llx\00,umask=0x%02llx\00,edge\00,any\00,inv\00,cmask=0x%02llx\00", align 1, !ROData_SecInfo !0
declare dso_local i32 @sprintf(ptr, ptr, ...)
define dso_local i32 @x86_event_sysfs_show(i64 %arg1, i32 %arg2) {
entry:
%EBP-SKT-LOC110 = alloca i32, align 4
%EBP-SKT-LOC100 = alloca i32, align 4
%EBP-SKT-LOC77 = alloca i32, align 4
%EBP-SKT-LOC60 = alloca i32, align 4
%EBP-SKT-LOC45 = alloca i32, align 4
%EBP-SKT-LOC = alloca i32, align 4
%stktop_8 = alloca i8, i32 48, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 0
%RSP_P.0 = inttoptr i64 %0 to ptr
%1 = add i64 %tos, 12
%RSP_P.12 = inttoptr i64 %1 to ptr
%2 = add i64 %tos, 16
%RSP_P.16 = inttoptr i64 %2 to ptr
%3 = add i64 %tos, 20
%RSP_P.20 = inttoptr i64 %3 to ptr
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%memload = load i32, ptr @ARCH_PERFMON_EVENTSEL_UMASK, align 1
%EBX = and i32 %memload, %arg2
%highbit = and i32 -2147483648, %EBX
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %EBX, 0
%4 = and i32 %EBX, 255
%5 = call i32 @llvm.ctpop.i32(i32 %4)
%6 = and i32 %5, 1
%PF = icmp eq i32 %6, 0
%memload1 = load i32, ptr @ARCH_PERFMON_EVENTSEL_CMASK, align 1
%R14D = and i32 %memload1, %arg2
%highbit2 = and i32 -2147483648, %R14D
%SF3 = icmp ne i32 %highbit2, 0
%ZF4 = icmp eq i32 %R14D, 0
%7 = and i32 %R14D, 255
%8 = call i32 @llvm.ctpop.i32(i32 %7)
%9 = and i32 %8, 1
%PF5 = icmp eq i32 %9, 0
%memload6 = load i32, ptr @ARCH_PERFMON_EVENTSEL_EDGE, align 1
%memload7 = load i32, ptr @ARCH_PERFMON_EVENTSEL_PIN_CONTROL, align 1
store i32 %memload7, ptr %RSP_P.12, align 1
%memload8 = load i32, ptr @ARCH_PERFMON_EVENTSEL_ANY, align 1
store i32 %memload8, ptr %RSP_P.16, align 1
%memload9 = load i32, ptr @ARCH_PERFMON_EVENTSEL_INV, align 1
store i32 %memload9, ptr %RSP_P.20, align 1
%10 = inttoptr i64 %arg1 to ptr
%EAX = call i32 (ptr, ptr, ...) @sprintf(ptr %10, ptr @0)
%11 = sub i32 %EBX, 256
%12 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EBX, i32 256)
%CF = extractvalue { i32, i1 } %12, 1
%ZF10 = icmp eq i32 %11, 0
%highbit11 = and i32 -2147483648, %11
%SF12 = icmp ne i32 %highbit11, 0
%13 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EBX, i32 256)
%OF = extractvalue { i32, i1 } %13, 1
%14 = and i32 %11, 255
%15 = call i32 @llvm.ctpop.i32(i32 %14)
%16 = and i32 %15, 1
%PF13 = icmp eq i32 %16, 0
store i32 %EAX, ptr %EBP-SKT-LOC, align 1
store i32 %EAX, ptr %EBP-SKT-LOC45, align 1
store i32 %EAX, ptr %EBP-SKT-LOC60, align 1
store i32 %EAX, ptr %EBP-SKT-LOC77, align 1
store i32 %EAX, ptr %EBP-SKT-LOC100, align 1
store i32 %EAX, ptr %EBP-SKT-LOC110, align 1
%CmpCF_JB = icmp eq i1 %CF, true
br i1 %CmpCF_JB, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%EBX17 = lshr i32 %EBX, 8
%ZF14 = icmp eq i32 %EBX17, 0
%highbit15 = and i32 -2147483648, %EBX17
%SF16 = icmp ne i32 %highbit15, 0
%ld-stk-prom31 = load i32, ptr %EBP-SKT-LOC, align 4
%RDI = sext i32 %ld-stk-prom31 to i64
%RDI21 = add nsw i64 %RDI, %arg1
%highbit18 = and i64 -9223372036854775808, %RDI21
%SF19 = icmp ne i64 %highbit18, 0
%ZF20 = icmp eq i64 %RDI21, 0
%17 = inttoptr i64 %RDI21 to ptr
%EAX23 = call i32 (ptr, ptr, ...) @sprintf(ptr %17, ptr getelementptr inbounds ([63 x i8], ptr @0, i32 0, i32 15), i32 %EBX17)
%ld-stk-prom = load i32, ptr %EBP-SKT-LOC, align 4
%EBP = add nsw i32 %ld-stk-prom, %EAX23
%highbit24 = and i32 -2147483648, %EBP
%SF25 = icmp ne i32 %highbit24, 0
%ZF26 = icmp eq i32 %EBP, 0
store i32 %EBP, ptr %EBP-SKT-LOC, align 1
store i32 %EBP, ptr %EBP-SKT-LOC45, align 1
store i32 %EBP, ptr %EBP-SKT-LOC60, align 1
store i32 %EBP, ptr %EBP-SKT-LOC77, align 1
store i32 %EBP, ptr %EBP-SKT-LOC100, align 1
store i32 %EBP, ptr %EBP-SKT-LOC110, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %entry
%18 = and i32 %memload6, %arg2
%highbit27 = and i32 -2147483648, %18
%SF28 = icmp ne i32 %highbit27, 0
%ZF29 = icmp eq i32 %18, 0
%19 = and i32 %18, 255
%20 = call i32 @llvm.ctpop.i32(i32 %19)
%21 = and i32 %20, 1
%PF30 = icmp eq i32 %21, 0
%CmpZF_JE = icmp eq i1 %ZF29, true
br i1 %CmpZF_JE, label %bb.4, label %bb.3
bb.3: ; preds = %bb.2
%EBP32 = load i32, ptr %EBP-SKT-LOC, align 1
%RBP = sext i32 %EBP32 to i64
%memref-basereg = add i64 %arg1, %RBP
%memref-disp = add i64 %memref-basereg, 4
%22 = inttoptr i64 %memref-disp to ptr
store i16 101, ptr %22, align 1
%memref-basereg33 = add i64 %arg1, %RBP
%23 = inttoptr i64 %memref-basereg33 to ptr
store i32 1734632748, ptr %23, align 1
%24 = trunc i64 %RBP to i32
%EBP40 = add i32 %24, 5
%25 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %24, i32 5)
%CF34 = extractvalue { i32, i1 } %25, 1
%26 = and i32 %EBP40, 255
%27 = call i32 @llvm.ctpop.i32(i32 %26)
%28 = and i32 %27, 1
%PF35 = icmp eq i32 %28, 0
%ZF36 = icmp eq i32 %EBP40, 0
%highbit37 = and i32 -2147483648, %EBP40
%SF38 = icmp ne i32 %highbit37, 0
%29 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %24, i32 5)
%OF39 = extractvalue { i32, i1 } %29, 1
store i32 %EBP40, ptr %EBP-SKT-LOC45, align 1
store i32 %EBP40, ptr %EBP-SKT-LOC60, align 1
store i32 %EBP40, ptr %EBP-SKT-LOC77, align 1
store i32 %EBP40, ptr %EBP-SKT-LOC100, align 1
store i32 %EBP40, ptr %EBP-SKT-LOC110, align 1
br label %bb.4
bb.4: ; preds = %bb.3, %bb.2
%30 = load i32, ptr %RSP_P.12, align 1
%31 = zext i32 %30 to i64
%32 = zext i32 %arg2 to i64
%33 = and i64 %31, %32
%ZF41 = icmp eq i64 %33, 0
%highbit42 = and i64 -9223372036854775808, %33
%SF43 = icmp ne i64 %highbit42, 0
%34 = and i64 %33, 255
%35 = call i64 @llvm.ctpop.i64(i64 %34)
%36 = and i64 %35, 1
%PF44 = icmp eq i64 %36, 0
%CmpZF_JE118 = icmp eq i1 %ZF41, true
br i1 %CmpZF_JE118, label %bb.6, label %bb.5
bb.5: ; preds = %bb.4
%EBP46 = load i32, ptr %EBP-SKT-LOC45, align 1
%RBP47 = sext i32 %EBP46 to i64
%memref-basereg48 = add i64 %arg1, %RBP47
%37 = inttoptr i64 %memref-basereg48 to ptr
store i32 6516780, ptr %37, align 1
%38 = trunc i64 %RBP47 to i32
%EBP55 = add i32 %38, 3
%39 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %38, i32 3)
%CF49 = extractvalue { i32, i1 } %39, 1
%40 = and i32 %EBP55, 255
%41 = call i32 @llvm.ctpop.i32(i32 %40)
%42 = and i32 %41, 1
%PF50 = icmp eq i32 %42, 0
%ZF51 = icmp eq i32 %EBP55, 0
%highbit52 = and i32 -2147483648, %EBP55
%SF53 = icmp ne i32 %highbit52, 0
%43 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %38, i32 3)
%OF54 = extractvalue { i32, i1 } %43, 1
store i32 %EBP55, ptr %EBP-SKT-LOC60, align 1
store i32 %EBP55, ptr %EBP-SKT-LOC77, align 1
store i32 %EBP55, ptr %EBP-SKT-LOC100, align 1
store i32 %EBP55, ptr %EBP-SKT-LOC110, align 1
br label %bb.6
bb.6: ; preds = %bb.5, %bb.4
%44 = load i32, ptr %RSP_P.16, align 1
%45 = zext i32 %44 to i64
%46 = zext i32 %arg2 to i64
%47 = and i64 %45, %46
%ZF56 = icmp eq i64 %47, 0
%highbit57 = and i64 -9223372036854775808, %47
%SF58 = icmp ne i64 %highbit57, 0
%48 = and i64 %47, 255
%49 = call i64 @llvm.ctpop.i64(i64 %48)
%50 = and i64 %49, 1
%PF59 = icmp eq i64 %50, 0
%CmpZF_JE119 = icmp eq i1 %ZF56, true
br i1 %CmpZF_JE119, label %bb.8, label %bb.7
bb.7: ; preds = %bb.6
%EBP61 = load i32, ptr %EBP-SKT-LOC60, align 1
%RBP62 = sext i32 %EBP61 to i64
%memref-basereg63 = add i64 %arg1, %RBP62
%memref-disp64 = add i64 %memref-basereg63, 4
%51 = inttoptr i64 %memref-disp64 to ptr
store i8 0, ptr %51, align 1
%memref-basereg65 = add i64 %arg1, %RBP62
%52 = inttoptr i64 %memref-basereg65 to ptr
store i32 2037276972, ptr %52, align 1
%53 = trunc i64 %RBP62 to i32
%EBP72 = add i32 %53, 4
%54 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %53, i32 4)
%CF66 = extractvalue { i32, i1 } %54, 1
%55 = and i32 %EBP72, 255
%56 = call i32 @llvm.ctpop.i32(i32 %55)
%57 = and i32 %56, 1
%PF67 = icmp eq i32 %57, 0
%ZF68 = icmp eq i32 %EBP72, 0
%highbit69 = and i32 -2147483648, %EBP72
%SF70 = icmp ne i32 %highbit69, 0
%58 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %53, i32 4)
%OF71 = extractvalue { i32, i1 } %58, 1
store i32 %EBP72, ptr %EBP-SKT-LOC77, align 1
store i32 %EBP72, ptr %EBP-SKT-LOC100, align 1
store i32 %EBP72, ptr %EBP-SKT-LOC110, align 1
br label %bb.8
bb.8: ; preds = %bb.7, %bb.6
%59 = load i32, ptr %RSP_P.20, align 1
%60 = zext i32 %59 to i64
%61 = zext i32 %arg2 to i64
%62 = and i64 %60, %61
%ZF73 = icmp eq i64 %62, 0
%highbit74 = and i64 -9223372036854775808, %62
%SF75 = icmp ne i64 %highbit74, 0
%63 = and i64 %62, 255
%64 = call i64 @llvm.ctpop.i64(i64 %63)
%65 = and i64 %64, 1
%PF76 = icmp eq i64 %65, 0
%CmpZF_JE120 = icmp eq i1 %ZF73, true
br i1 %CmpZF_JE120, label %bb.10, label %bb.9
bb.9: ; preds = %bb.8
%EBP78 = load i32, ptr %EBP-SKT-LOC77, align 1
%RBP79 = sext i32 %EBP78 to i64
%memref-basereg80 = add i64 %arg1, %RBP79
%memref-disp81 = add i64 %memref-basereg80, 4
%66 = inttoptr i64 %memref-disp81 to ptr
store i8 0, ptr %66, align 1
%memref-basereg82 = add i64 %arg1, %RBP79
%67 = inttoptr i64 %memref-basereg82 to ptr
store i32 1986947372, ptr %67, align 1
%68 = trunc i64 %RBP79 to i32
%EBP89 = add i32 %68, 4
%69 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %68, i32 4)
%CF83 = extractvalue { i32, i1 } %69, 1
%70 = and i32 %EBP89, 255
%71 = call i32 @llvm.ctpop.i32(i32 %70)
%72 = and i32 %71, 1
%PF84 = icmp eq i32 %72, 0
%ZF85 = icmp eq i32 %EBP89, 0
%highbit86 = and i32 -2147483648, %EBP89
%SF87 = icmp ne i32 %highbit86, 0
%73 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %68, i32 4)
%OF88 = extractvalue { i32, i1 } %73, 1
store i32 %EBP89, ptr %EBP-SKT-LOC100, align 1
store i32 %EBP89, ptr %EBP-SKT-LOC110, align 1
br label %bb.10
bb.10: ; preds = %bb.9, %bb.8
%74 = sub i32 %R14D, 16777216
%75 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %R14D, i32 16777216)
%CF90 = extractvalue { i32, i1 } %75, 1
%ZF91 = icmp eq i32 %74, 0
%highbit92 = and i32 -2147483648, %74
%SF93 = icmp ne i32 %highbit92, 0
%76 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %R14D, i32 16777216)
%OF94 = extractvalue { i32, i1 } %76, 1
%77 = and i32 %74, 255
%78 = call i32 @llvm.ctpop.i32(i32 %77)
%79 = and i32 %78, 1
%PF95 = icmp eq i32 %79, 0
%CmpCF_JB121 = icmp eq i1 %CF90, true
br i1 %CmpCF_JB121, label %bb.12, label %bb.11
bb.11: ; preds = %bb.10
%R14D99 = lshr i32 %R14D, 24
%ZF96 = icmp eq i32 %R14D99, 0
%highbit97 = and i32 -2147483648, %R14D99
%SF98 = icmp ne i32 %highbit97, 0
%EBP101 = load i32, ptr %EBP-SKT-LOC100, align 1
%RBP102 = sext i32 %EBP101 to i64
%memref-basereg103 = add i64 %arg1, %RBP102
%80 = inttoptr i64 %memref-basereg103 to ptr
%EAX105 = call i32 (ptr, ptr, ...) @sprintf(ptr %80, ptr getelementptr inbounds ([63 x i8], ptr @0, i32 0, i32 47), i32 %R14D99)
%81 = trunc i64 %RBP102 to i32
%EBP109 = add nsw i32 %81, %EAX105
%highbit106 = and i32 -2147483648, %EBP109
%SF107 = icmp ne i32 %highbit106, 0
%ZF108 = icmp eq i32 %EBP109, 0
store i32 %EBP109, ptr %EBP-SKT-LOC110, align 1
br label %bb.12
bb.12: ; preds = %bb.11, %bb.10
%EBP111 = load i32, ptr %EBP-SKT-LOC110, align 1
%RAX = sext i32 %EBP111 to i64
%memref-basereg112 = add i64 %arg1, %RAX
%82 = inttoptr i64 %memref-basereg112 to ptr
store i16 10, ptr %82, align 1
%83 = trunc i64 %RAX to i32
%EAX117 = add i32 %83, 1
%84 = and i32 %EAX117, 255
%85 = call i32 @llvm.ctpop.i32(i32 %84)
%86 = and i32 %85, 1
%PF113 = icmp eq i32 %86, 0
%ZF114 = icmp eq i32 %EAX117, 0
%highbit115 = and i32 -2147483648, %EAX117
%SF116 = icmp ne i32 %highbit115, 0
ret i32 %EAX117
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/linux/arch/x86/events/extr_core.c_x86_event_sysfs_show.c'
source_filename = "AnghaBench/linux/arch/x86/events/extr_core.c_x86_event_sysfs_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ARCH_PERFMON_EVENTSEL_UMASK = common local_unnamed_addr global i32 0, align 4
@ARCH_PERFMON_EVENTSEL_CMASK = common local_unnamed_addr global i32 0, align 4
@ARCH_PERFMON_EVENTSEL_EDGE = common local_unnamed_addr global i32 0, align 4
@ARCH_PERFMON_EVENTSEL_PIN_CONTROL = common local_unnamed_addr global i32 0, align 4
@ARCH_PERFMON_EVENTSEL_ANY = common local_unnamed_addr global i32 0, align 4
@ARCH_PERFMON_EVENTSEL_INV = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [15 x i8] c"event=0x%02llx\00", align 1
@.str.1 = private unnamed_addr constant [16 x i8] c",umask=0x%02llx\00", align 1
@.str.2 = private unnamed_addr constant [6 x i8] c",edge\00", align 1
@.str.4 = private unnamed_addr constant [5 x i8] c",any\00", align 1
@.str.5 = private unnamed_addr constant [5 x i8] c",inv\00", align 1
@.str.6 = private unnamed_addr constant [16 x i8] c",cmask=0x%02llx\00", align 1
; Function Attrs: nofree nounwind ssp uwtable(sync)
define i32 @x86_event_sysfs_show(ptr nocapture noundef writeonly %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @ARCH_PERFMON_EVENTSEL_UMASK, align 4, !tbaa !6
%5 = and i32 %4, %1
%6 = load i32, ptr @ARCH_PERFMON_EVENTSEL_CMASK, align 4, !tbaa !6
%7 = and i32 %6, %1
%8 = ashr i32 %7, 24
%9 = load i32, ptr @ARCH_PERFMON_EVENTSEL_EDGE, align 4, !tbaa !6
%10 = and i32 %9, %1
%11 = load i32, ptr @ARCH_PERFMON_EVENTSEL_PIN_CONTROL, align 4, !tbaa !6
%12 = and i32 %11, %1
%13 = load i32, ptr @ARCH_PERFMON_EVENTSEL_ANY, align 4, !tbaa !6
%14 = and i32 %13, %1
%15 = load i32, ptr @ARCH_PERFMON_EVENTSEL_INV, align 4, !tbaa !6
%16 = and i32 %15, %1
%17 = tail call i32 (ptr, ptr, ...) @sprintf(ptr noundef nonnull dereferenceable(1) %0, ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %2)
%18 = icmp ult i32 %5, 256
br i1 %18, label %25, label %19
19: ; preds = %3
%20 = ashr i32 %5, 8
%21 = sext i32 %17 to i64
%22 = getelementptr inbounds i8, ptr %0, i64 %21
%23 = tail call i32 (ptr, ptr, ...) @sprintf(ptr noundef nonnull dereferenceable(1) %22, ptr noundef nonnull dereferenceable(1) @.str.1, i32 noundef %20)
%24 = add nsw i32 %23, %17
br label %25
25: ; preds = %19, %3
%26 = phi i32 [ %24, %19 ], [ %17, %3 ]
%27 = icmp eq i32 %10, 0
br i1 %27, label %32, label %28
28: ; preds = %25
%29 = sext i32 %26 to i64
%30 = getelementptr inbounds i8, ptr %0, i64 %29
tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(6) %30, ptr noundef nonnull align 1 dereferenceable(6) @.str.2, i64 6, i1 false)
%31 = add nsw i32 %26, 5
br label %32
32: ; preds = %28, %25
%33 = phi i32 [ %31, %28 ], [ %26, %25 ]
%34 = icmp eq i32 %12, 0
br i1 %34, label %39, label %35
35: ; preds = %32
%36 = sext i32 %33 to i64
%37 = getelementptr inbounds i8, ptr %0, i64 %36
store i32 6516780, ptr %37, align 1
%38 = add nsw i32 %33, 3
br label %39
39: ; preds = %35, %32
%40 = phi i32 [ %38, %35 ], [ %33, %32 ]
%41 = icmp eq i32 %14, 0
br i1 %41, label %46, label %42
42: ; preds = %39
%43 = sext i32 %40 to i64
%44 = getelementptr inbounds i8, ptr %0, i64 %43
tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(5) %44, ptr noundef nonnull align 1 dereferenceable(5) @.str.4, i64 5, i1 false)
%45 = add nsw i32 %40, 4
br label %46
46: ; preds = %42, %39
%47 = phi i32 [ %45, %42 ], [ %40, %39 ]
%48 = icmp eq i32 %16, 0
br i1 %48, label %53, label %49
49: ; preds = %46
%50 = sext i32 %47 to i64
%51 = getelementptr inbounds i8, ptr %0, i64 %50
tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(5) %51, ptr noundef nonnull align 1 dereferenceable(5) @.str.5, i64 5, i1 false)
%52 = add nsw i32 %47, 4
br label %53
53: ; preds = %49, %46
%54 = phi i32 [ %52, %49 ], [ %47, %46 ]
%55 = icmp ult i32 %7, 16777216
br i1 %55, label %61, label %56
56: ; preds = %53
%57 = sext i32 %54 to i64
%58 = getelementptr inbounds i8, ptr %0, i64 %57
%59 = tail call i32 (ptr, ptr, ...) @sprintf(ptr noundef nonnull dereferenceable(1) %58, ptr noundef nonnull dereferenceable(1) @.str.6, i32 noundef %8)
%60 = add nsw i32 %59, %54
br label %61
61: ; preds = %56, %53
%62 = phi i32 [ %60, %56 ], [ %54, %53 ]
%63 = sext i32 %62 to i64
%64 = getelementptr inbounds i8, ptr %0, i64 %63
store i16 10, ptr %64, align 1
%65 = add nsw i32 %62, 1
ret i32 %65
}
; Function Attrs: nofree nounwind
declare noundef i32 @sprintf(ptr noalias nocapture noundef writeonly, ptr nocapture noundef readonly, ...) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2
attributes #0 = { nofree nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_arch_x86_events_extr_core.c_x86_event_sysfs_show |
; ModuleID = 'linux_drivers_net_ethernet_freescale_extr_fec_main.c_fec_enet_get_prevdesc.so'
source_filename = "linux_drivers_net_ethernet_freescale_extr_fec_main.c_fec_enet_get_prevdesc.so"
define dso_local i64 @fec_enet_get_prevdesc(i64 %arg1, i64 %arg2) {
entry:
%memref-disp = add i64 %arg2, 16
%0 = inttoptr i64 %memref-disp to ptr
%1 = load i64, ptr %0, align 1
%2 = sub i64 %1, %arg1
%3 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %1, i64 %arg1)
%CF = extractvalue { i64, i1 } %3, 1
%ZF = icmp eq i64 %2, 0
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%4 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %1, i64 %arg1)
%OF = extractvalue { i64, i1 } %4, 1
%5 = and i64 %2, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF = icmp eq i64 %7, 0
%CFCmp_JAE = icmp eq i1 %CF, false
br i1 %CFCmp_JAE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%8 = inttoptr i64 %arg2 to ptr
%9 = load i64, ptr %8, align 1
%RAX = sub i64 %arg1, %9
%10 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %arg1, i64 %9)
%CF1 = extractvalue { i64, i1 } %10, 1
%ZF2 = icmp eq i64 %RAX, 0
%highbit3 = and i64 -9223372036854775808, %RAX
%SF4 = icmp ne i64 %highbit3, 0
%11 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %arg1, i64 %9)
%OF5 = extractvalue { i64, i1 } %11, 1
%12 = and i64 %RAX, 255
%13 = call i64 @llvm.ctpop.i64(i64 %12)
%14 = and i64 %13, 1
%PF6 = icmp eq i64 %14, 0
br label %UnifiedReturnBlock
bb.2: ; preds = %entry
%memref-disp7 = add i64 %arg2, 8
%15 = inttoptr i64 %memref-disp7 to ptr
%memload = load i64, ptr %15, align 1
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.2, %bb.1
%UnifiedRetVal = phi i64 [ %RAX, %bb.1 ], [ %memload, %bb.2 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/freescale/extr_fec_main.c_fec_enet_get_prevdesc.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/freescale/extr_fec_main.c_fec_enet_get_prevdesc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @fec_enet_get_prevdesc], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal ptr @fec_enet_get_prevdesc(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 16
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = icmp ult ptr %4, %0
br i1 %5, label %9, label %6
6: ; preds = %2
%7 = getelementptr inbounds i8, ptr %1, i64 8
%8 = load ptr, ptr %7, align 8, !tbaa !11
br label %15
9: ; preds = %2
%10 = load ptr, ptr %1, align 8, !tbaa !12
%11 = ptrtoint ptr %0 to i64
%12 = ptrtoint ptr %10 to i64
%13 = sub i64 %11, %12
%14 = inttoptr i64 %13 to ptr
br label %15
15: ; preds = %9, %6
%16 = phi ptr [ %8, %6 ], [ %14, %9 ]
ret ptr %16
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"bufdesc_prop", !8, i64 0, !8, i64 8, !8, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 8}
!12 = !{!7, !8, i64 0}
| linux_drivers_net_ethernet_freescale_extr_fec_main.c_fec_enet_get_prevdesc |
; ModuleID = 'RetroArch_gfx_include_userland_containers_core_extr_containers_uri.c_vc_uri_userinfo.so'
source_filename = "RetroArch_gfx_include_userland_containers_core_extr_containers_uri.c_vc_uri_userinfo.so"
define dso_local i64 @vc_uri_userinfo(i64 %arg1) {
entry:
%0 = and i64 %arg1, %arg1
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %0, 0
%1 = and i64 %0, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%4 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %4, align 1
br label %UnifiedReturnBlock
bb.2: ; preds = %entry
%5 = zext i32 0 to i64
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.2, %bb.1
%UnifiedRetVal = phi i64 [ %memload, %bb.1 ], [ %5, %bb.2 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/containers/core/extr_containers_uri.c_vc_uri_userinfo.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/containers/core/extr_containers_uri.c_vc_uri_userinfo.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define ptr @vc_uri_userinfo(ptr noundef readonly %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = load ptr, ptr %0, align 8, !tbaa !6
br label %5
5: ; preds = %1, %3
%6 = phi ptr [ %4, %3 ], [ null, %1 ]
ret ptr %6
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| RetroArch_gfx_include_userland_containers_core_extr_containers_uri.c_vc_uri_userinfo |
; ModuleID = 'exploitdb_exploits_multiple_dos_extr_146.c_corruptor.so'
source_filename = "exploitdb_exploits_multiple_dos_extr_146.c_corruptor.so"
declare dso_local i32 @rand()
define dso_local i32 @corruptor(i64 %arg1, i32 %arg2) {
entry:
%EAX-SKT-LOC = alloca i32, align 4
%EBX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%EAX = call i32 @rand()
%RBX = sext i32 %EAX to i64
%RAX = mul i64 %RBX, -2004318071
%0 = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 %RBX, i64 -2004318071)
%OF = extractvalue { i64, i1 } %0, 1
%RAX1 = lshr i64 %RAX, 32
%ZF = icmp eq i64 %RAX1, 0
%highbit = and i64 -9223372036854775808, %RAX1
%SF = icmp ne i64 %highbit, 0
%1 = trunc i64 %RAX1 to i32
%2 = trunc i64 %RBX to i32
%EAX5 = add nsw i32 %1, %2
%highbit2 = and i32 -2147483648, %EAX5
%SF3 = icmp ne i32 %highbit2, 0
%ZF4 = icmp eq i32 %EAX5, 0
%ECX = lshr i32 %EAX5, 31
%ZF6 = icmp eq i32 %ECX, 0
%highbit7 = and i32 -2147483648, %ECX
%SF8 = icmp ne i32 %highbit7, 0
%EAX12 = lshr i32 %EAX5, 3
%ZF9 = icmp eq i32 %EAX12, 0
%highbit10 = and i32 -2147483648, %EAX12
%SF11 = icmp ne i32 %highbit10, 0
%EAX16 = add nsw i32 %EAX12, %ECX
%highbit13 = and i32 -2147483648, %EAX16
%SF14 = icmp ne i32 %highbit13, 0
%ZF15 = icmp eq i32 %EAX16, 0
%3 = zext i32 %EAX16 to i64
%memref-idxreg = mul i64 4, %3
%4 = zext i32 %EAX16 to i64
%memref-basereg = add i64 %4, %memref-idxreg
%EAX17 = trunc i64 %memref-basereg to i32
%5 = zext i32 %EAX17 to i64
%memref-idxreg18 = mul i64 2, %5
%6 = zext i32 %EAX17 to i64
%memref-basereg19 = add i64 %6, %memref-idxreg18
%EAX20 = trunc i64 %memref-basereg19 to i32
%7 = trunc i64 %RBX to i32
%EBX = sub i32 %7, %EAX20
%8 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %7, i32 %EAX20)
%CF = extractvalue { i32, i1 } %8, 1
%ZF21 = icmp eq i32 %EBX, 0
%highbit22 = and i32 -2147483648, %EBX
%SF23 = icmp ne i32 %highbit22, 0
%9 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %7, i32 %EAX20)
%OF24 = extractvalue { i32, i1 } %9, 1
%10 = and i32 %EBX, 255
%11 = call i32 @llvm.ctpop.i32(i32 %10)
%12 = and i32 %11, 1
%PF = icmp eq i32 %12, 0
store i32 %EAX20, ptr %EAX-SKT-LOC, align 1
%CmpSF_JS = icmp eq i1 %SF23, true
br i1 %CmpSF_JS, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%EBX29 = add i32 %EBX, 1
%13 = and i32 %EBX29, 255
%14 = call i32 @llvm.ctpop.i32(i32 %13)
%15 = and i32 %14, 1
%PF25 = icmp eq i32 %15, 0
%ZF26 = icmp eq i32 %EBX29, 0
%highbit27 = and i32 -2147483648, %EBX29
%SF28 = icmp ne i32 %highbit27, 0
%16 = zext i32 %EBX29 to i64
store i64 %16, ptr %EBX-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.2
%EAX30 = call i32 @rand()
%17 = sext i32 %EAX30 to i64
%18 = lshr i64 %17, 32
%EDX = trunc i64 %18 to i32
%19 = sext i32 %EAX30 to i64
%20 = sext i32 %EDX to i64
%div_hb_ls = shl nuw i64 %20, 32
%dividend = or i64 %div_hb_ls, %19
%21 = sext i32 %arg2 to i64
%div_q = sdiv i64 %dividend, %21
%EAX31 = trunc i64 %div_q to i32
%div_r = srem i64 %dividend, %21
%EDX32 = trunc i64 %div_r to i32
%EAX33 = call i32 @rand()
%RCX = sext i32 %EDX32 to i64
%memref-basereg34 = add i64 %arg1, %RCX
%22 = trunc i32 %EAX33 to i8
%23 = inttoptr i64 %memref-basereg34 to ptr
store i8 %22, ptr %23, align 1
%24 = load i64, ptr %EBX-SKT-LOC, align 1
%EBX35 = trunc i64 %24 to i32
%EBX40 = sub i32 %EBX35, 1
%25 = and i32 %EBX40, 255
%26 = call i32 @llvm.ctpop.i32(i32 %25)
%27 = and i32 %26, 1
%PF36 = icmp eq i32 %27, 0
%ZF37 = icmp eq i32 %EBX40, 0
%highbit38 = and i32 -2147483648, %EBX40
%SF39 = icmp ne i32 %highbit38, 0
store i32 %EAX33, ptr %EAX-SKT-LOC, align 1
%CmpZF_JNE = icmp eq i1 %ZF37, false
%28 = zext i32 %EBX40 to i64
store i64 %28, ptr %EBX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.2, label %bb.3
bb.3: ; preds = %bb.2, %entry
%EAX41 = load i32, ptr %EAX-SKT-LOC, align 1
ret i32 %EAX41
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.smul.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/exploitdb/exploits/multiple/dos/extr_146.c_corruptor.c'
source_filename = "AnghaBench/exploitdb/exploits/multiple/dos/extr_146.c_corruptor.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @corruptor(ptr nocapture noundef writeonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @rand() #2
%4 = srem i32 %3, 15
%5 = icmp slt i32 %4, 0
br i1 %5, label %16, label %6
6: ; preds = %2, %6
%7 = phi i32 [ %14, %6 ], [ 0, %2 ]
%8 = tail call i32 @rand() #2
%9 = srem i32 %8, %1
%10 = tail call i32 @rand() #2
%11 = trunc i32 %10 to i8
%12 = sext i32 %9 to i64
%13 = getelementptr inbounds i8, ptr %0, i64 %12
store i8 %11, ptr %13, align 1, !tbaa !6
%14 = add nuw nsw i32 %7, 1
%15 = icmp eq i32 %7, %4
br i1 %15, label %16, label %6, !llvm.loop !9
16: ; preds = %6, %2
ret void
}
declare i32 @rand(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| exploitdb_exploits_multiple_dos_extr_146.c_corruptor |
; ModuleID = 'linux_tools_perf_extr_utilblock-range.h_block_range_iter__valid.so'
source_filename = "linux_tools_perf_extr_utilblock-range.h_block_range_iter__valid.so"
define dso_local i8 @block_range_iter__valid(i64 %arg1) {
entry:
%memref-disp = add i64 %arg1, 4
%0 = inttoptr i64 %memref-disp to ptr
%1 = load i32, ptr %0, align 1
%2 = zext i32 %1 to i64
%3 = zext i32 0 to i64
%4 = sub i64 %2, %3
%5 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %2, i64 %3)
%CF = extractvalue { i64, i1 } %5, 1
%ZF = icmp eq i64 %4, 0
%highbit = and i64 -9223372036854775808, %4
%SF = icmp ne i64 %highbit, 0
%6 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %2, i64 %3)
%OF = extractvalue { i64, i1 } %6, 1
%7 = and i64 %4, 255
%8 = call i64 @llvm.ctpop.i64(i64 %7)
%9 = and i64 %8, 1
%PF = icmp eq i64 %9, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%10 = inttoptr i64 %arg1 to ptr
%11 = load i32, ptr %10, align 1
%12 = zext i32 %11 to i64
%13 = zext i32 0 to i64
%14 = sub i64 %12, %13
%15 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %12, i64 %13)
%CF1 = extractvalue { i64, i1 } %15, 1
%ZF2 = icmp eq i64 %14, 0
%highbit3 = and i64 -9223372036854775808, %14
%SF4 = icmp ne i64 %highbit3, 0
%16 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %12, i64 %13)
%OF5 = extractvalue { i64, i1 } %16, 1
%17 = and i64 %14, 255
%18 = call i64 @llvm.ctpop.i64(i64 %17)
%19 = and i64 %18, 1
%PF6 = icmp eq i64 %19, 0
%AL = icmp eq i1 %ZF2, false
%20 = zext i1 %AL to i8
br label %UnifiedReturnBlock
bb.2: ; preds = %entry
%21 = trunc i32 0 to i8
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.2, %bb.1
%UnifiedRetVal = phi i8 [ %20, %bb.1 ], [ %21, %bb.2 ]
ret i8 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/tools/perf/extr_utilblock-range.h_block_range_iter__valid.c'
source_filename = "AnghaBench/linux/tools/perf/extr_utilblock-range.h_block_range_iter__valid.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @block_range_iter__valid], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal range(i32 0, 2) i32 @block_range_iter__valid(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 4
%3 = load i32, ptr %2, align 4, !tbaa !6
%4 = icmp eq i32 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = load i32, ptr %0, align 4, !tbaa !11
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %5, %1
%10 = phi i32 [ 0, %1 ], [ %8, %5 ]
ret i32 %10
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"block_range_iter", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
| linux_tools_perf_extr_utilblock-range.h_block_range_iter__valid |
; ModuleID = 'fastsocket_kernel_fs_ocfs2_cluster_extr_tcp.c_o2net_reconnect_delay.so'
source_filename = "fastsocket_kernel_fs_ocfs2_cluster_extr_tcp.c_o2net_reconnect_delay.so"
@o2nm_single_cluster = common dso_local global i64 0, align 8
define dso_local i32 @o2net_reconnect_delay() {
entry:
%memload = load i64, ptr @o2nm_single_cluster, align 1
%0 = inttoptr i64 %memload to ptr
%memload1 = load i32, ptr %0, align 1
ret i32 %memload1
}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/fs/ocfs2/cluster/extr_tcp.c_o2net_reconnect_delay.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/ocfs2/cluster/extr_tcp.c_o2net_reconnect_delay.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@o2nm_single_cluster = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @o2net_reconnect_delay], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @o2net_reconnect_delay() #0 {
%1 = load ptr, ptr @o2nm_single_cluster, align 8, !tbaa !6
%2 = load i32, ptr %1, align 4, !tbaa !10
ret i32 %2
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
| fastsocket_kernel_fs_ocfs2_cluster_extr_tcp.c_o2net_reconnect_delay |
; ModuleID = 'fastsocket_kernel_arch_powerpc_sysdev_extr_fsl_rio.c_fsl_rio_get_cmdline.so'
source_filename = "fastsocket_kernel_arch_powerpc_sysdev_extr_fsl_rio.c_fsl_rio_get_cmdline.so"
@cmdline = common dso_local global i64 0, align 8
define dso_local i32 @fsl_rio_get_cmdline(i64 %arg1) {
entry:
%0 = and i64 %arg1, %arg1
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %0, 0
%1 = and i64 %0, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
store i64 %arg1, ptr @cmdline, align 1
br label %UnifiedReturnBlock
bb.2: ; preds = %entry
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.2, %bb.1
%UnifiedRetVal = phi i32 [ 1, %bb.1 ], [ 0, %bb.2 ]
ret i32 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/powerpc/sysdev/extr_fsl_rio.c_fsl_rio_get_cmdline.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/powerpc/sysdev/extr_fsl_rio.c_fsl_rio_get_cmdline.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cmdline = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @fsl_rio_get_cmdline], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal range(i32 0, 2) i32 @fsl_rio_get_cmdline(ptr noundef %0) #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %4, label %3
3: ; preds = %1
store ptr %0, ptr @cmdline, align 8, !tbaa !6
br label %4
4: ; preds = %1, %3
%5 = phi i32 [ 1, %3 ], [ 0, %1 ]
ret i32 %5
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_arch_powerpc_sysdev_extr_fsl_rio.c_fsl_rio_get_cmdline |
; ModuleID = 'freebsd_contrib_wpa_wpa_supplicant_dbus_extr_..p2p_supplicant.h_wpas_p2p_indicate_state_change.so'
source_filename = "freebsd_contrib_wpa_wpa_supplicant_dbus_extr_..p2p_supplicant.h_wpas_p2p_indicate_state_change.so"
define dso_local void @wpas_p2p_indicate_state_change() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/freebsd/contrib/wpa/wpa_supplicant/dbus/extr_..p2p_supplicant.h_wpas_p2p_indicate_state_change.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/wpa_supplicant/dbus/extr_..p2p_supplicant.h_wpas_p2p_indicate_state_change.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @wpas_p2p_indicate_state_change], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @wpas_p2p_indicate_state_change(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_contrib_wpa_wpa_supplicant_dbus_extr_..p2p_supplicant.h_wpas_p2p_indicate_state_change |
; ModuleID = 'curl_tests_libtest_extr_lib1507.c_read_callback.so'
source_filename = "curl_tests_libtest_extr_lib1507.c_read_callback.so"
@CURL_READFUNC_ABORT = common dso_local global i64 0, align 8
define dso_local i64 @read_callback() {
entry:
%memload = load i64, ptr @CURL_READFUNC_ABORT, align 1
ret i64 %memload
}
| ; ModuleID = 'AnghaBench/curl/tests/libtest/extr_lib1507.c_read_callback.c'
source_filename = "AnghaBench/curl/tests/libtest/extr_lib1507.c_read_callback.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CURL_READFUNC_ABORT = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @read_callback], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal i64 @read_callback(ptr nocapture readnone %0, i64 %1, i64 %2, ptr nocapture readnone %3) #0 {
%5 = load i64, ptr @CURL_READFUNC_ABORT, align 8, !tbaa !6
ret i64 %5
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| curl_tests_libtest_extr_lib1507.c_read_callback |
; ModuleID = 'linux_arch_x86_kvm_vmx_extr_capabilities.h_cpu_has_vmx_invpcid.so'
source_filename = "linux_arch_x86_kvm_vmx_extr_capabilities.h_cpu_has_vmx_invpcid.so"
@vmcs_config = common dso_local global i32 0, align 4
@SECONDARY_EXEC_ENABLE_INVPCID = common dso_local global i32 0, align 4
define dso_local i32 @cpu_has_vmx_invpcid() {
entry:
%memload = load i32, ptr @SECONDARY_EXEC_ENABLE_INVPCID, align 1
%memload1 = load i32, ptr @vmcs_config, align 1
%EAX = and i32 %memload, %memload1
%0 = and i32 %EAX, 255
%1 = call i32 @llvm.ctpop.i32(i32 %0)
%2 = and i32 %1, 1
%PF = icmp eq i32 %2, 0
ret i32 %EAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/arch/x86/kvm/vmx/extr_capabilities.h_cpu_has_vmx_invpcid.c'
source_filename = "AnghaBench/linux/arch/x86/kvm/vmx/extr_capabilities.h_cpu_has_vmx_invpcid.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32 }
@vmcs_config = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
@SECONDARY_EXEC_ENABLE_INVPCID = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cpu_has_vmx_invpcid], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal i32 @cpu_has_vmx_invpcid() #0 {
%1 = load i32, ptr @vmcs_config, align 4, !tbaa !6
%2 = load i32, ptr @SECONDARY_EXEC_ENABLE_INVPCID, align 4, !tbaa !11
%3 = and i32 %2, %1
ret i32 %3
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| linux_arch_x86_kvm_vmx_extr_capabilities.h_cpu_has_vmx_invpcid |
; ModuleID = 'linux_sound_usb_extr_mixer_scarlett_gen2.c_scarlett2_volume_ctl_info.so'
source_filename = "linux_sound_usb_extr_mixer_scarlett_gen2.c_scarlett2_volume_ctl_info.so"
@SNDRV_CTL_ELEM_TYPE_INTEGER = common dso_local global i32 0, align 4
@SCARLETT2_VOLUME_BIAS = common dso_local global i32 0, align 4
define dso_local i32 @scarlett2_volume_ctl_info(i64 %arg1, i64 %arg2) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%memload1 = load i32, ptr @SNDRV_CTL_ELEM_TYPE_INTEGER, align 1
%memref-disp = add i64 %arg2, 20
%1 = inttoptr i64 %memref-disp to ptr
store i32 %memload1, ptr %1, align 1
%2 = inttoptr i64 %memload to ptr
%memload2 = load i32, ptr %2, align 1
%memref-disp3 = add i64 %arg2, 16
%3 = inttoptr i64 %memref-disp3 to ptr
store i32 %memload2, ptr %3, align 1
%memref-disp4 = add i64 %arg2, 8
%4 = inttoptr i64 %memref-disp4 to ptr
%5 = sext i32 0 to i64
store i64 %5, ptr %4, align 1
%memload5 = load i32, ptr @SCARLETT2_VOLUME_BIAS, align 1
%memref-disp6 = add i64 %arg2, 4
%6 = inttoptr i64 %memref-disp6 to ptr
store i32 %memload5, ptr %6, align 1
%7 = inttoptr i64 %arg2 to ptr
store i32 1, ptr %7, align 1
ret i32 0
}
| ; ModuleID = 'AnghaBench/linux/sound/usb/extr_mixer_scarlett_gen2.c_scarlett2_volume_ctl_info.c'
source_filename = "AnghaBench/linux/sound/usb/extr_mixer_scarlett_gen2.c_scarlett2_volume_ctl_info.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SNDRV_CTL_ELEM_TYPE_INTEGER = common local_unnamed_addr global i32 0, align 4
@SCARLETT2_VOLUME_BIAS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @scarlett2_volume_ctl_info], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal noundef i32 @scarlett2_volume_ctl_info(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load i32, ptr @SNDRV_CTL_ELEM_TYPE_INTEGER, align 4, !tbaa !11
%5 = getelementptr inbounds i8, ptr %1, i64 20
store i32 %4, ptr %5, align 4, !tbaa !13
%6 = load i32, ptr %3, align 4, !tbaa !18
%7 = getelementptr inbounds i8, ptr %1, i64 16
store i32 %6, ptr %7, align 8, !tbaa !20
%8 = getelementptr inbounds i8, ptr %1, i64 8
store i64 0, ptr %8, align 8, !tbaa !21
%9 = load i32, ptr @SCARLETT2_VOLUME_BIAS, align 4, !tbaa !11
%10 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %9, ptr %10, align 4, !tbaa !22
store i32 1, ptr %1, align 8, !tbaa !23
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"snd_kcontrol", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !12, i64 20}
!14 = !{!"snd_ctl_elem_info", !15, i64 0, !12, i64 16, !12, i64 20}
!15 = !{!"TYPE_3__", !16, i64 0}
!16 = !{!"TYPE_4__", !12, i64 0, !12, i64 4, !17, i64 8}
!17 = !{!"long", !9, i64 0}
!18 = !{!19, !12, i64 0}
!19 = !{!"usb_mixer_elem_info", !12, i64 0}
!20 = !{!14, !12, i64 16}
!21 = !{!14, !17, i64 8}
!22 = !{!14, !12, i64 4}
!23 = !{!14, !12, i64 0}
| linux_sound_usb_extr_mixer_scarlett_gen2.c_scarlett2_volume_ctl_info |
; ModuleID = 'linux_arch_x86_kvm_extr_mmu.c_kvm_mmu_audit.so'
source_filename = "linux_arch_x86_kvm_extr_mmu.c_kvm_mmu_audit.so"
define dso_local void @kvm_mmu_audit() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/linux/arch/x86/kvm/extr_mmu.c_kvm_mmu_audit.c'
source_filename = "AnghaBench/linux/arch/x86/kvm/extr_mmu.c_kvm_mmu_audit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @kvm_mmu_audit], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @kvm_mmu_audit(ptr nocapture readnone %0, i32 %1) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_arch_x86_kvm_extr_mmu.c_kvm_mmu_audit |
; ModuleID = 'linux_drivers_net_ethernet_cisco_enic_extr_enic.h_vnic_get_netdev.so'
source_filename = "linux_drivers_net_ethernet_cisco_enic_extr_enic.h_vnic_get_netdev.so"
define dso_local i64 @vnic_get_netdev(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%1 = inttoptr i64 %memload to ptr
%memload1 = load i64, ptr %1, align 1
ret i64 %memload1
}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/cisco/enic/extr_enic.h_vnic_get_netdev.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/cisco/enic/extr_enic.h_vnic_get_netdev.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @vnic_get_netdev], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal ptr @vnic_get_netdev(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = load ptr, ptr %2, align 8, !tbaa !11
ret ptr %3
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"vnic_dev", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"enic", !8, i64 0}
| linux_drivers_net_ethernet_cisco_enic_extr_enic.h_vnic_get_netdev |
; ModuleID = 'fastsocket_kernel_kernel_trace_extr_trace_functions_graph.c_set_graph_array.so'
source_filename = "fastsocket_kernel_kernel_trace_extr_trace_functions_graph.c_set_graph_array.so"
@graph_array = common dso_local global i64 0, align 8
define dso_local i64 @set_graph_array(i64 %arg1) {
entry:
store i64 %arg1, ptr @graph_array, align 1
%0 = ptrtoint ptr @graph_array to i64
ret i64 %0
}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/kernel/trace/extr_trace_functions_graph.c_set_graph_array.c'
source_filename = "AnghaBench/fastsocket/kernel/kernel/trace/extr_trace_functions_graph.c_set_graph_array.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@graph_array = common local_unnamed_addr global ptr null, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable(sync)
define void @set_graph_array(ptr noundef %0) local_unnamed_addr #0 {
store ptr %0, ptr @graph_array, align 8, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_kernel_trace_extr_trace_functions_graph.c_set_graph_array |
; ModuleID = 'freebsd_stand_efi_loader_extr_framebuffer.c_efifb_color_depth.so'
source_filename = "freebsd_stand_efi_loader_extr_framebuffer.c_efifb_color_depth.so"
define dso_local i32 @efifb_color_depth(i64 %arg1) {
entry:
%EAX-SKT-LOC = alloca i64, align 8
%ECX-SKT-LOC = alloca i64, align 8
%0 = inttoptr i64 %arg1 to ptr
%memload = load <4 x i32>, ptr %0, align 1
%1 = extractelement <4 x i32> %memload, i32 2
%2 = insertelement <4 x i32> zeroinitializer, i32 %1, i32 0
%3 = extractelement <4 x i32> %memload, i32 3
%4 = insertelement <4 x i32> %2, i32 %3, i32 1
%5 = extractelement <4 x i32> %memload, i32 2
%6 = insertelement <4 x i32> %4, i32 %5, i32 2
%7 = extractelement <4 x i32> %memload, i32 3
%XMM1 = insertelement <4 x i32> %6, i32 %7, i32 3
%bitwise_operand = bitcast <4 x i32> %XMM1 to i128
%bitwise_operand1 = bitcast <4 x i32> %memload to i128
%or_result = or i128 %bitwise_operand, %bitwise_operand1
%bitcast_result = bitcast i128 %or_result to <4 x i32>
%8 = extractelement <4 x i32> %bitcast_result, i32 1
%9 = insertelement <4 x i32> zeroinitializer, i32 %8, i32 0
%10 = extractelement <4 x i32> %bitcast_result, i32 1
%11 = insertelement <4 x i32> %9, i32 %10, i32 1
%12 = extractelement <4 x i32> %bitcast_result, i32 1
%13 = insertelement <4 x i32> %11, i32 %12, i32 2
%14 = extractelement <4 x i32> %bitcast_result, i32 1
%XMM0 = insertelement <4 x i32> %13, i32 %14, i32 3
%bitwise_operand2 = bitcast <4 x i32> %XMM0 to i128
%bitwise_operand3 = bitcast <4 x i32> %bitcast_result to i128
%or_result4 = or i128 %bitwise_operand2, %bitwise_operand3
%bitcast_result5 = bitcast i128 %or_result4 to <4 x i32>
%15 = bitcast <4 x i32> %bitcast_result5 to <4 x i32>
%ECX = extractelement <4 x i32> %15, i64 0
%16 = sub i32 %ECX, 2
%17 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %ECX, i32 2)
%CF = extractvalue { i32, i1 } %17, 1
%ZF = icmp eq i32 %16, 0
%highbit = and i32 -2147483648, %16
%SF = icmp ne i32 %highbit, 0
%18 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %ECX, i32 2)
%OF = extractvalue { i32, i1 } %18, 1
%19 = and i32 %16, 255
%20 = call i32 @llvm.ctpop.i32(i32 %19)
%21 = and i32 %20, 1
%PF = icmp eq i32 %21, 0
%22 = zext i32 %ECX to i64
store i64 %22, ptr %ECX-SKT-LOC, align 1
%CFCmp_JAE = icmp eq i1 %CF, false
br i1 %CFCmp_JAE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
br label %UnifiedReturnBlock
bb.2: ; preds = %entry
%23 = zext i32 1 to i64
store i64 %23, ptr %EAX-SKT-LOC, align 1
br label %bb.3
bb.3: ; preds = %bb.2, %bb.3
%24 = load i64, ptr %ECX-SKT-LOC, align 1
%ECX6 = trunc i64 %24 to i32
%ECX10 = lshr i32 %ECX6, 1
%ZF7 = icmp eq i32 %ECX10, 0
%highbit8 = and i32 -2147483648, %ECX10
%SF9 = icmp ne i32 %highbit8, 0
%25 = load i64, ptr %EAX-SKT-LOC, align 1
%EAX = trunc i64 %25 to i32
%EAX15 = add i32 %EAX, 1
%26 = and i32 %EAX15, 255
%27 = call i32 @llvm.ctpop.i32(i32 %26)
%28 = and i32 %27, 1
%PF11 = icmp eq i32 %28, 0
%ZF12 = icmp eq i32 %EAX15, 0
%highbit13 = and i32 -2147483648, %EAX15
%SF14 = icmp ne i32 %highbit13, 0
%29 = sub i32 %ECX10, 1
%30 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %ECX10, i32 1)
%CF16 = extractvalue { i32, i1 } %30, 1
%ZF17 = icmp eq i32 %29, 0
%highbit18 = and i32 -2147483648, %29
%SF19 = icmp ne i32 %highbit18, 0
%31 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %ECX10, i32 1)
%OF20 = extractvalue { i32, i1 } %31, 1
%32 = and i32 %29, 255
%33 = call i32 @llvm.ctpop.i32(i32 %32)
%34 = and i32 %33, 1
%PF21 = icmp eq i32 %34, 0
%CmpZF_JNE = icmp eq i1 %ZF17, false
%35 = zext i32 %EAX15 to i64
store i64 %35, ptr %EAX-SKT-LOC, align 1
%36 = zext i32 %ECX10 to i64
store i64 %36, ptr %ECX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.3, label %bb.4
bb.4: ; preds = %bb.3
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.4, %bb.1
%UnifiedRetVal = phi i32 [ %ECX, %bb.1 ], [ %EAX15, %bb.4 ]
ret i32 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/stand/efi/loader/extr_framebuffer.c_efifb_color_depth.c'
source_filename = "AnghaBench/freebsd/stand/efi/loader/extr_framebuffer.c_efifb_color_depth.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @efifb_color_depth], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(argmem: read) uwtable(sync)
define internal i32 @efifb_color_depth(ptr nocapture noundef readonly %0) #0 {
%2 = load <4 x i32>, ptr %0, align 4, !tbaa !6
%3 = tail call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %2)
%4 = icmp ult i32 %3, 2
br i1 %4, label %11, label %5
5: ; preds = %1, %5
%6 = phi i32 [ %9, %5 ], [ 1, %1 ]
%7 = phi i32 [ %8, %5 ], [ %3, %1 ]
%8 = ashr i32 %7, 1
%9 = add nuw nsw i32 %6, 1
%10 = icmp eq i32 %8, 1
br i1 %10, label %11, label %5, !llvm.loop !10
11: ; preds = %5, %1
%12 = phi i32 [ %3, %1 ], [ %9, %5 ]
ret i32 %12
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.or.v4i32(<4 x i32>) #1
attributes #0 = { nofree norecurse nosync nounwind ssp memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| freebsd_stand_efi_loader_extr_framebuffer.c_efifb_color_depth |
; ModuleID = 'linux_drivers_video_fbdev_sis_extr_sis_main.c_sisfb_get_dram_size.so'
source_filename = "linux_drivers_video_fbdev_sis_extr_sis_main.c_sisfb_get_dram_size.so"
define dso_local i32 @sisfb_get_dram_size(i64 %arg1) {
entry:
%memref-disp = add i64 %arg1, 8
%0 = inttoptr i64 %memref-disp to ptr
store i32 0, ptr %0, align 1
%1 = inttoptr i64 %arg1 to ptr
%2 = sext i32 0 to i64
store i64 %2, ptr %1, align 1
ret i32 -1
}
| ; ModuleID = 'AnghaBench/linux/drivers/video/fbdev/sis/extr_sis_main.c_sisfb_get_dram_size.c'
source_filename = "AnghaBench/linux/drivers/video/fbdev/sis/extr_sis_main.c_sisfb_get_dram_size.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SISCR = common local_unnamed_addr global i32 0, align 4
@SISSR = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sisfb_get_dram_size], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync)
define internal noundef i32 @sisfb_get_dram_size(ptr nocapture noundef writeonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
store i32 0, ptr %2, align 4, !tbaa !6
store <2 x i32> zeroinitializer, ptr %0, align 4, !tbaa !11
ret i32 -1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"sis_video_info", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| linux_drivers_video_fbdev_sis_extr_sis_main.c_sisfb_get_dram_size |
; ModuleID = 'radare2_libr_anal_p_extr_anal_sysz.c_archinfo.so'
source_filename = "radare2_libr_anal_p_extr_anal_sysz.c_archinfo.so"
define dso_local i32 @archinfo(i64 %arg1, i32 %arg2) {
entry:
%0 = sub i32 %arg2, 129
%1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %arg2, i32 129)
%CF = extractvalue { i32, i1 } %1, 1
%ZF = icmp eq i32 %0, 0
%highbit = and i32 -2147483648, %0
%SF = icmp ne i32 %highbit, 0
%2 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %arg2, i32 129)
%OF = extractvalue { i32, i1 } %2, 1
%3 = and i32 %0, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
%AL = icmp eq i1 %ZF, true
%6 = zext i1 %AL to i32
%7 = zext i1 %AL to i32
%EAX = add nsw i32 %6, %7
%highbit1 = and i32 -2147483648, %EAX
%SF2 = icmp ne i32 %highbit1, 0
%ZF3 = icmp eq i32 %EAX, 0
%EAX10 = add i32 %EAX, 2
%8 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %EAX, i32 2)
%CF4 = extractvalue { i32, i1 } %8, 1
%9 = and i32 %EAX10, 255
%10 = call i32 @llvm.ctpop.i32(i32 %9)
%11 = and i32 %10, 1
%PF5 = icmp eq i32 %11, 0
%ZF6 = icmp eq i32 %EAX10, 0
%highbit7 = and i32 -2147483648, %EAX10
%SF8 = icmp ne i32 %highbit7, 0
%12 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %EAX, i32 2)
%OF9 = extractvalue { i32, i1 } %12, 1
ret i32 %EAX10
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/radare2/libr/anal/p/extr_anal_sysz.c_archinfo.c'
source_filename = "AnghaBench/radare2/libr/anal/p/extr_anal_sysz.c_archinfo.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @archinfo], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef range(i32 2, 5) i32 @archinfo(ptr nocapture readnone %0, i32 noundef %1) #0 {
%3 = icmp eq i32 %1, 129
%4 = select i1 %3, i32 4, i32 2
ret i32 %4
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| radare2_libr_anal_p_extr_anal_sysz.c_archinfo |
; ModuleID = 'sumatrapdf_ext_harfbuzz_test_api_extr_test-unicode.c_data_fixture_init.so'
source_filename = "sumatrapdf_ext_harfbuzz_test_api_extr_test-unicode.c_data_fixture_init.so"
@MAGIC0 = common dso_local global i32 0, align 4
@MAGIC1 = common dso_local global i32 0, align 4
define dso_local i32 @data_fixture_init(i64 %arg1) {
entry:
%memload = load i32, ptr @MAGIC0, align 1
%0 = inttoptr i64 %arg1 to ptr
%memload1 = load i64, ptr %0, align 1
%1 = inttoptr i64 %memload1 to ptr
store i32 %memload, ptr %1, align 1
%memload2 = load i32, ptr @MAGIC1, align 1
%memref-disp = add i64 %memload1, 4
%2 = inttoptr i64 %memref-disp to ptr
store i32 %memload2, ptr %2, align 1
ret i32 %memload2
}
| ; ModuleID = 'AnghaBench/sumatrapdf/ext/harfbuzz/test/api/extr_test-unicode.c_data_fixture_init.c'
source_filename = "AnghaBench/sumatrapdf/ext/harfbuzz/test/api/extr_test-unicode.c_data_fixture_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MAGIC0 = common local_unnamed_addr global i32 0, align 4
@MAGIC1 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @data_fixture_init], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @data_fixture_init(ptr nocapture noundef readonly %0, i32 %1) #0 {
%3 = load i32, ptr @MAGIC0, align 4, !tbaa !6
%4 = load ptr, ptr %0, align 8, !tbaa !10
store i32 %3, ptr %4, align 4, !tbaa !13
%5 = load i32, ptr @MAGIC1, align 4, !tbaa !6
%6 = getelementptr inbounds i8, ptr %4, i64 4
store i32 %5, ptr %6, align 4, !tbaa !13
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_5__", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_4__", !7, i64 0}
| sumatrapdf_ext_harfbuzz_test_api_extr_test-unicode.c_data_fixture_init |
; ModuleID = 'linux_scripts_extr_kallsyms.c_find_best_token.so'
source_filename = "linux_scripts_extr_kallsyms.c_find_best_token.so"
@token_profit = common dso_local global i64 0, align 8
define dso_local i32 @find_best_token() {
entry:
%EAX-SKT-LOC54 = alloca i32, align 4
%EDI-SKT-LOC = alloca i32, align 4
%ECX-SKT-LOC = alloca i32, align 4
%EAX-SKT-LOC = alloca i64, align 8
%ESI-SKT-LOC = alloca i64, align 8
%RDX-SKT-LOC = alloca i64, align 8
%memload = load i64, ptr @token_profit, align 1
%0 = zext i32 0 to i64
store i64 %0, ptr %RDX-SKT-LOC, align 1
%1 = zext i32 -10000 to i64
store i64 %1, ptr %ESI-SKT-LOC, align 1
%2 = zext i32 0 to i64
store i64 %2, ptr %EAX-SKT-LOC, align 1
br label %bb.4
bb.4: ; preds = %bb.3, %entry
%RDX = load i64, ptr %RDX-SKT-LOC, align 1
%memref-idxreg = mul i64 4, %RDX
%memref-basereg = add i64 %memload, %memref-idxreg
%3 = inttoptr i64 %memref-basereg to ptr
%memload1 = load i32, ptr %3, align 1
%4 = load i64, ptr %ESI-SKT-LOC, align 1
%ESI = trunc i64 %4 to i32
%5 = sub i32 %memload1, %ESI
%6 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload1, i32 %ESI)
%CF = extractvalue { i32, i1 } %6, 1
%ZF = icmp eq i32 %5, 0
%highbit = and i32 -2147483648, %5
%SF = icmp ne i32 %highbit, 0
%7 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload1, i32 %ESI)
%OF = extractvalue { i32, i1 } %7, 1
%8 = and i32 %5, 255
%9 = call i32 @llvm.ctpop.i32(i32 %8)
%10 = and i32 %9, 1
%PF = icmp eq i32 %10, 0
%11 = trunc i64 %RDX to i32
%12 = trunc i64 %RDX to i32
%13 = load i64, ptr %EAX-SKT-LOC, align 1
%EAX = trunc i64 %13 to i32
%ZFCmp_CMOVG = icmp eq i1 %ZF, false
%SFOFCmp_CMOVG = icmp eq i1 %SF, %OF
%Cond_CMOVG = and i1 %ZFCmp_CMOVG, %SFOFCmp_CMOVG
%CMOV = select i1 %Cond_CMOVG, i32 %12, i32 %EAX
%memref-idxreg2 = mul i64 4, %RDX
%memref-basereg3 = add i64 %memload, %memref-idxreg2
%memref-disp = add i64 %memref-basereg3, 4
%14 = inttoptr i64 %memref-disp to ptr
%memload4 = load i32, ptr %14, align 1
%ZFCmp_CMOVG5 = icmp eq i1 %ZF, false
%SFOFCmp_CMOVG6 = icmp eq i1 %SF, %OF
%Cond_CMOVG7 = and i1 %ZFCmp_CMOVG5, %SFOFCmp_CMOVG6
%CMOV8 = select i1 %Cond_CMOVG7, i32 %memload1, i32 %ESI
%15 = sub i32 %memload4, %CMOV8
%16 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload4, i32 %CMOV8)
%CF9 = extractvalue { i32, i1 } %16, 1
%ZF10 = icmp eq i32 %15, 0
%highbit11 = and i32 -2147483648, %15
%SF12 = icmp ne i32 %highbit11, 0
%17 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload4, i32 %CMOV8)
%OF13 = extractvalue { i32, i1 } %17, 1
%18 = and i32 %15, 255
%19 = call i32 @llvm.ctpop.i32(i32 %18)
%20 = and i32 %19, 1
%PF14 = icmp eq i32 %20, 0
store i32 %memload4, ptr %ECX-SKT-LOC, align 1
store i32 %CMOV, ptr %EAX-SKT-LOC54, align 1
%ZFCmp_JG = icmp eq i1 %ZF10, false
%SFOFCmp_JG = icmp eq i1 %SF12, %OF13
%ZFAndSFOF_JG = and i1 %ZFCmp_JG, %SFOFCmp_JG
%21 = zext i32 %CMOV to i64
store i64 %21, ptr %EAX-SKT-LOC, align 1
br i1 %ZFAndSFOF_JG, label %bb.7, label %bb.5
bb.5: ; preds = %bb.4
store i32 %CMOV8, ptr %ECX-SKT-LOC, align 1
br label %bb.8
bb.7: ; preds = %bb.4
%memref-disp15 = add i64 %RDX, 1
%EAX16 = trunc i64 %memref-disp15 to i32
store i32 %EAX16, ptr %EAX-SKT-LOC54, align 1
%22 = zext i32 %EAX16 to i64
store i64 %22, ptr %EAX-SKT-LOC, align 1
br label %bb.8
bb.8: ; preds = %bb.7, %bb.5
%memref-idxreg17 = mul i64 4, %RDX
%memref-basereg18 = add i64 %memload, %memref-idxreg17
%memref-disp19 = add i64 %memref-basereg18, 8
%23 = inttoptr i64 %memref-disp19 to ptr
%memload20 = load i32, ptr %23, align 1
%ECX = load i32, ptr %ECX-SKT-LOC, align 1
%24 = sub i32 %memload20, %ECX
%25 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload20, i32 %ECX)
%CF21 = extractvalue { i32, i1 } %25, 1
%ZF22 = icmp eq i32 %24, 0
%highbit23 = and i32 -2147483648, %24
%SF24 = icmp ne i32 %highbit23, 0
%26 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload20, i32 %ECX)
%OF25 = extractvalue { i32, i1 } %26, 1
%27 = and i32 %24, 255
%28 = call i32 @llvm.ctpop.i32(i32 %27)
%29 = and i32 %28, 1
%PF26 = icmp eq i32 %29, 0
store i32 %memload20, ptr %EDI-SKT-LOC, align 1
%ZFCmp_JG56 = icmp eq i1 %ZF22, false
%SFOFCmp_JG57 = icmp eq i1 %SF24, %OF25
%ZFAndSFOF_JG58 = and i1 %ZFCmp_JG56, %SFOFCmp_JG57
br i1 %ZFAndSFOF_JG58, label %bb.10, label %bb.9
bb.9: ; preds = %bb.8
store i32 %ECX, ptr %EDI-SKT-LOC, align 1
br label %bb.11
bb.10: ; preds = %bb.8
%memref-disp27 = add i64 %RDX, 2
%EAX28 = trunc i64 %memref-disp27 to i32
store i32 %EAX28, ptr %EAX-SKT-LOC54, align 1
%30 = zext i32 %EAX28 to i64
store i64 %30, ptr %EAX-SKT-LOC, align 1
br label %bb.11
bb.11: ; preds = %bb.10, %bb.9
%memref-idxreg29 = mul i64 4, %RDX
%memref-basereg30 = add i64 %memload, %memref-idxreg29
%memref-disp31 = add i64 %memref-basereg30, 12
%31 = inttoptr i64 %memref-disp31 to ptr
%memload32 = load i32, ptr %31, align 1
%EDI = load i32, ptr %EDI-SKT-LOC, align 1
%32 = sub i32 %memload32, %EDI
%33 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload32, i32 %EDI)
%CF33 = extractvalue { i32, i1 } %33, 1
%ZF34 = icmp eq i32 %32, 0
%highbit35 = and i32 -2147483648, %32
%SF36 = icmp ne i32 %highbit35, 0
%34 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload32, i32 %EDI)
%OF37 = extractvalue { i32, i1 } %34, 1
%35 = and i32 %32, 255
%36 = call i32 @llvm.ctpop.i32(i32 %35)
%37 = and i32 %36, 1
%PF38 = icmp eq i32 %37, 0
%CmpZF_JLE = icmp eq i1 %ZF34, true
%CmpOF_JLE = icmp ne i1 %SF36, %OF37
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
%38 = zext i32 %memload32 to i64
store i64 %38, ptr %ESI-SKT-LOC, align 1
br i1 %ZFOrSF_JLE, label %bb.2, label %bb.12
bb.12: ; preds = %bb.11
%memref-disp39 = add i64 %RDX, 3
%EAX40 = trunc i64 %memref-disp39 to i32
store i32 %EAX40, ptr %EAX-SKT-LOC54, align 1
%39 = zext i32 %EAX40 to i64
store i64 %39, ptr %EAX-SKT-LOC, align 1
br label %bb.3
bb.2: ; preds = %bb.11
%40 = zext i32 %EDI to i64
store i64 %40, ptr %ESI-SKT-LOC, align 1
br label %bb.3
bb.3: ; preds = %bb.2, %bb.12
%RDX47 = add i64 %RDX, 4
%41 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RDX, i64 4)
%CF41 = extractvalue { i64, i1 } %41, 1
%42 = and i64 %RDX47, 255
%43 = call i64 @llvm.ctpop.i64(i64 %42)
%44 = and i64 %43, 1
%PF42 = icmp eq i64 %44, 0
%ZF43 = icmp eq i64 %RDX47, 0
%highbit44 = and i64 -9223372036854775808, %RDX47
%SF45 = icmp ne i64 %highbit44, 0
%45 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RDX, i64 4)
%OF46 = extractvalue { i64, i1 } %45, 1
%46 = sub i64 %RDX47, 65536
%47 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RDX47, i64 65536)
%CF48 = extractvalue { i64, i1 } %47, 1
%ZF49 = icmp eq i64 %46, 0
%highbit50 = and i64 -9223372036854775808, %46
%SF51 = icmp ne i64 %highbit50, 0
%48 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RDX47, i64 65536)
%OF52 = extractvalue { i64, i1 } %48, 1
%49 = and i64 %46, 255
%50 = call i64 @llvm.ctpop.i64(i64 %49)
%51 = and i64 %50, 1
%PF53 = icmp eq i64 %51, 0
%CmpZF_JE = icmp eq i1 %ZF49, true
store i64 %RDX47, ptr %RDX-SKT-LOC, align 1
br i1 %CmpZF_JE, label %bb.13, label %bb.4
bb.13: ; preds = %bb.3
%EAX55 = load i32, ptr %EAX-SKT-LOC54, align 1
ret i32 %EAX55
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/scripts/extr_kallsyms.c_find_best_token.c'
source_filename = "AnghaBench/linux/scripts/extr_kallsyms.c_find_best_token.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@token_profit = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @find_best_token], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @find_best_token() #0 {
%1 = load ptr, ptr @token_profit, align 8, !tbaa !6
br label %2
2: ; preds = %0, %2
%3 = phi i64 [ 0, %0 ], [ %12, %2 ]
%4 = phi i32 [ -10000, %0 ], [ %11, %2 ]
%5 = phi i32 [ 0, %0 ], [ %10, %2 ]
%6 = getelementptr inbounds i32, ptr %1, i64 %3
%7 = load i32, ptr %6, align 4, !tbaa !10
%8 = icmp sgt i32 %7, %4
%9 = trunc nuw nsw i64 %3 to i32
%10 = select i1 %8, i32 %9, i32 %5
%11 = tail call i32 @llvm.smax.i32(i32 %7, i32 %4)
%12 = add nuw nsw i64 %3, 1
%13 = icmp eq i64 %12, 65536
br i1 %13, label %14, label %2, !llvm.loop !12
14: ; preds = %2
ret i32 %10
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #1
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
| linux_scripts_extr_kallsyms.c_find_best_token |
; ModuleID = 'linux_net_dccp_ccids_extr_libloss_interval.h_tfrc_lh_is_initialised.so'
source_filename = "linux_net_dccp_ccids_extr_libloss_interval.h_tfrc_lh_is_initialised.so"
define dso_local i8 @tfrc_lh_is_initialised(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%1 = load i64, ptr %0, align 1
%2 = sub i64 %1, 0
%3 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %1, i64 0)
%CF = extractvalue { i64, i1 } %3, 1
%ZF = icmp eq i64 %2, 0
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%4 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %1, i64 0)
%OF = extractvalue { i64, i1 } %4, 1
%5 = and i64 %2, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF = icmp eq i64 %7, 0
%ZFCmp_CMOVG = icmp eq i1 %ZF, false
%SFOFCmp_CMOVG = icmp eq i1 %SF, %OF
%Cond_CMOVG = and i1 %ZFCmp_CMOVG, %SFOFCmp_CMOVG
%8 = zext i1 %Cond_CMOVG to i8
ret i8 %8
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/net/dccp/ccids/extr_libloss_interval.h_tfrc_lh_is_initialised.c'
source_filename = "AnghaBench/linux/net/dccp/ccids/extr_libloss_interval.h_tfrc_lh_is_initialised.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @tfrc_lh_is_initialised], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal range(i32 0, 2) i32 @tfrc_lh_is_initialised(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = icmp sgt i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"tfrc_loss_hist", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_net_dccp_ccids_extr_libloss_interval.h_tfrc_lh_is_initialised |
; ModuleID = 'linux_drivers_ata_extr_libata-core.c_ata_xfer_mode2shift.so'
source_filename = "linux_drivers_ata_extr_libata-core.c_ata_xfer_mode2shift.so"
@ata_xfer_tbl = common dso_local global i64 0, align 8
define dso_local i32 @ata_xfer_mode2shift(i64 %arg1) {
entry:
%EAX-SKT-LOC = alloca i32, align 4
%EDX-SKT-LOC = alloca i64, align 8
%RCX-SKT-LOC = alloca i64, align 8
%memload = load i64, ptr @ata_xfer_tbl, align 1
%0 = inttoptr i64 %memload to ptr
%memload1 = load i64, ptr %0, align 1
%1 = and i64 %memload1, %memload1
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %1, 0
%2 = and i64 %1, 255
%3 = call i64 @llvm.ctpop.i64(i64 %2)
%4 = and i64 %3, 1
%PF = icmp eq i64 %4, 0
store i64 %memload1, ptr %EDX-SKT-LOC, align 1
store i32 -1, ptr %EAX-SKT-LOC, align 1
%CmpSF_JS = icmp eq i1 %SF, true
br i1 %CmpSF_JS, label %bb.7, label %bb.1
bb.1: ; preds = %entry
%RCX = add i64 %memload, 24
%5 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %memload, i64 24)
%CF = extractvalue { i64, i1 } %5, 1
%6 = and i64 %RCX, 255
%7 = call i64 @llvm.ctpop.i64(i64 %6)
%8 = and i64 %7, 1
%PF2 = icmp eq i64 %8, 0
%ZF3 = icmp eq i64 %RCX, 0
%highbit4 = and i64 -9223372036854775808, %RCX
%SF5 = icmp ne i64 %highbit4, 0
%9 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %memload, i64 24)
%OF = extractvalue { i64, i1 } %9, 1
store i64 %RCX, ptr %RCX-SKT-LOC, align 1
br label %bb.4
bb.4: ; preds = %bb.3, %bb.1
%RCX6 = load i64, ptr %RCX-SKT-LOC, align 1
%memref-disp = add i64 %RCX6, -16
%10 = inttoptr i64 %memref-disp to ptr
%memload7 = load i64, ptr %10, align 1
%11 = sub i64 %memload7, %arg1
%12 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload7, i64 %arg1)
%CF8 = extractvalue { i64, i1 } %12, 1
%ZF9 = icmp eq i64 %11, 0
%highbit10 = and i64 -9223372036854775808, %11
%SF11 = icmp ne i64 %highbit10, 0
%13 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload7, i64 %arg1)
%OF12 = extractvalue { i64, i1 } %13, 1
%14 = and i64 %11, 255
%15 = call i64 @llvm.ctpop.i64(i64 %14)
%16 = and i64 %15, 1
%PF13 = icmp eq i64 %16, 0
%CFCmp_JA = icmp eq i1 %CF8, false
%ZFCmp_JA = icmp eq i1 %ZF9, false
%CFAndZF_JA = and i1 %ZFCmp_JA, %CFCmp_JA
br i1 %CFAndZF_JA, label %bb.3, label %bb.5
bb.5: ; preds = %bb.4
%memref-disp14 = add i64 %RCX6, -8
%17 = inttoptr i64 %memref-disp14 to ptr
%memload15 = load i64, ptr %17, align 1
%RSI = add i64 %memload7, %memload15
%18 = and i64 %RSI, 255
%19 = call i64 @llvm.ctpop.i64(i64 %18)
%20 = and i64 %19, 1
%PF16 = icmp eq i64 %20, 0
%21 = sub i64 %RSI, %arg1
%22 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RSI, i64 %arg1)
%CF17 = extractvalue { i64, i1 } %22, 1
%ZF18 = icmp eq i64 %21, 0
%highbit19 = and i64 -9223372036854775808, %21
%SF20 = icmp ne i64 %highbit19, 0
%23 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RSI, i64 %arg1)
%OF21 = extractvalue { i64, i1 } %23, 1
%24 = and i64 %21, 255
%25 = call i64 @llvm.ctpop.i64(i64 %24)
%26 = and i64 %25, 1
%PF22 = icmp eq i64 %26, 0
%CFCmp_JBE = icmp eq i1 %CF17, true
%ZFCmp_JBE = icmp eq i1 %ZF18, true
%CFAndZF_JBE = or i1 %ZFCmp_JBE, %CFCmp_JBE
br i1 %CFAndZF_JBE, label %bb.3, label %bb.6
bb.6: ; preds = %bb.5
%27 = load i64, ptr %EDX-SKT-LOC, align 1
%EDX = trunc i64 %27 to i32
store i32 %EDX, ptr %EAX-SKT-LOC, align 1
br label %bb.7
bb.3: ; preds = %bb.5, %bb.4
%28 = inttoptr i64 %RCX6 to ptr
%memload23 = load i64, ptr %28, align 1
%RCX30 = add i64 %RCX6, 24
%29 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RCX6, i64 24)
%CF24 = extractvalue { i64, i1 } %29, 1
%30 = and i64 %RCX30, 255
%31 = call i64 @llvm.ctpop.i64(i64 %30)
%32 = and i64 %31, 1
%PF25 = icmp eq i64 %32, 0
%ZF26 = icmp eq i64 %RCX30, 0
%highbit27 = and i64 -9223372036854775808, %RCX30
%SF28 = icmp ne i64 %highbit27, 0
%33 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RCX6, i64 24)
%OF29 = extractvalue { i64, i1 } %33, 1
%34 = and i64 %memload23, %memload23
%highbit31 = and i64 -9223372036854775808, %34
%SF32 = icmp ne i64 %highbit31, 0
%ZF33 = icmp eq i64 %34, 0
%35 = and i64 %34, 255
%36 = call i64 @llvm.ctpop.i64(i64 %35)
%37 = and i64 %36, 1
%PF34 = icmp eq i64 %37, 0
%CmpSF_JS35 = icmp eq i1 %SF32, true
store i64 %memload23, ptr %EDX-SKT-LOC, align 1
store i64 %RCX30, ptr %RCX-SKT-LOC, align 1
br i1 %CmpSF_JS35, label %bb.7, label %bb.4
bb.7: ; preds = %bb.6, %bb.3, %entry
%EAX = load i32, ptr %EAX-SKT-LOC, align 1
ret i32 %EAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/ata/extr_libata-core.c_ata_xfer_mode2shift.c'
source_filename = "AnghaBench/linux/drivers/ata/extr_libata-core.c_ata_xfer_mode2shift.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ata_xfer_tbl = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define i32 @ata_xfer_mode2shift(i64 noundef %0) local_unnamed_addr #0 {
%2 = load ptr, ptr @ata_xfer_tbl, align 8, !tbaa !6
%3 = load i64, ptr %2, align 8, !tbaa !10
%4 = icmp sgt i64 %3, -1
br i1 %4, label %5, label %22
5: ; preds = %1, %18
%6 = phi i64 [ %20, %18 ], [ %3, %1 ]
%7 = phi ptr [ %19, %18 ], [ %2, %1 ]
%8 = getelementptr inbounds i8, ptr %7, i64 8
%9 = load i64, ptr %8, align 8, !tbaa !13
%10 = icmp ugt i64 %9, %0
br i1 %10, label %18, label %11
11: ; preds = %5
%12 = getelementptr inbounds i8, ptr %7, i64 16
%13 = load i64, ptr %12, align 8, !tbaa !14
%14 = add i64 %13, %9
%15 = icmp ugt i64 %14, %0
br i1 %15, label %16, label %18
16: ; preds = %11
%17 = trunc i64 %6 to i32
br label %22
18: ; preds = %5, %11
%19 = getelementptr inbounds i8, ptr %7, i64 24
%20 = load i64, ptr %19, align 8, !tbaa !10
%21 = icmp sgt i64 %20, -1
br i1 %21, label %5, label %22, !llvm.loop !15
22: ; preds = %18, %1, %16
%23 = phi i32 [ %17, %16 ], [ -1, %1 ], [ -1, %18 ]
ret i32 %23
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"ata_xfer_ent", !12, i64 0, !12, i64 8, !12, i64 16}
!12 = !{!"long", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!11, !12, i64 16}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| linux_drivers_ata_extr_libata-core.c_ata_xfer_mode2shift |
; ModuleID = 'fastsocket_kernel_drivers_staging_comedi_drivers_extr_ni_stc.h_MSeries_PFI_Output_Select_Bits.so'
source_filename = "fastsocket_kernel_drivers_staging_comedi_drivers_extr_ni_stc.h_MSeries_PFI_Output_Select_Bits.so"
define dso_local i32 @MSeries_PFI_Output_Select_Bits(i32 %arg1, i32 %arg2) {
entry:
%EAX = and i32 %arg2, 31
%0 = and i32 %EAX, 255
%1 = call i32 @llvm.ctpop.i32(i32 %0)
%2 = and i32 %1, 1
%PF = icmp eq i32 %2, 0
%ZF = icmp eq i32 %EAX, 0
%highbit = and i32 -2147483648, %EAX
%SF = icmp ne i32 %highbit, 0
%3 = zext i32 -1431655765 to i64
%4 = zext i32 %arg1 to i64
%RDX = mul nsw i64 %3, %4
%RDX4 = lshr i64 %RDX, 33
%ZF1 = icmp eq i64 %RDX4, 0
%highbit2 = and i64 -9223372036854775808, %RDX4
%SF3 = icmp ne i64 %highbit2, 0
%memref-idxreg = mul i64 2, %RDX4
%memref-basereg = add i64 %RDX4, %memref-idxreg
%ECX = trunc i64 %memref-basereg to i32
%EDI = sub i32 %arg1, %ECX
%5 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %arg1, i32 %ECX)
%CF = extractvalue { i32, i1 } %5, 1
%ZF5 = icmp eq i32 %EDI, 0
%highbit6 = and i32 -2147483648, %EDI
%SF7 = icmp ne i32 %highbit6, 0
%6 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %arg1, i32 %ECX)
%OF = extractvalue { i32, i1 } %6, 1
%7 = and i32 %EDI, 255
%8 = call i32 @llvm.ctpop.i32(i32 %7)
%9 = and i32 %8, 1
%PF8 = icmp eq i32 %9, 0
%10 = zext i32 %EDI to i64
%memref-idxreg9 = mul i64 4, %10
%11 = zext i32 %EDI to i64
%memref-basereg10 = add i64 %11, %memref-idxreg9
%ECX11 = trunc i64 %memref-basereg10 to i32
%12 = trunc i32 %ECX11 to i8
%13 = zext i8 %12 to i32
%shift-cnt-msk = and i32 %13, 63
%EAX15 = shl i32 %EAX, %shift-cnt-msk
%shrd_cf_count_cmp = icmp sgt i32 %shift-cnt-msk, 0
%14 = sub i32 32, %shift-cnt-msk
%shld_cf_count_shift = shl i32 1, %14
%shld_cf_count_and = and i32 %EAX, %shld_cf_count_shift
%shld_cf_count_shft_out = icmp sgt i32 %shld_cf_count_and, 0
%shld_cf_update = select i1 %shrd_cf_count_cmp, i1 %shld_cf_count_shft_out, i1 %CF
%ZF12 = icmp eq i32 %EAX15, 0
%highbit13 = and i32 -2147483648, %EAX15
%SF14 = icmp ne i32 %highbit13, 0
ret i32 %EAX15
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_ni_stc.h_MSeries_PFI_Output_Select_Bits.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_ni_stc.h_MSeries_PFI_Output_Select_Bits.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @MSeries_PFI_Output_Select_Bits], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal range(i32 0, 31745) i32 @MSeries_PFI_Output_Select_Bits(i32 noundef %0, i32 noundef %1) #0 {
%3 = and i32 %1, 31
%4 = urem i32 %0, 3
%5 = mul nuw nsw i32 %4, 5
%6 = shl nuw nsw i32 %3, %5
ret i32 %6
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_staging_comedi_drivers_extr_ni_stc.h_MSeries_PFI_Output_Select_Bits |
; ModuleID = 'lab_q3map2_q3map2_extr_portals.c_FloodSkyboxArea_r.so'
source_filename = "lab_q3map2_q3map2_extr_portals.c_FloodSkyboxArea_r.so"
@skyboxArea = common dso_local global i64 0, align 8
@PLANENUM_LEAF = common dso_local global i64 0, align 8
@qtrue = common dso_local global i32 0, align 4
define dso_local i64 @FloodSkyboxArea_r(i64 %arg1) {
entry:
%RAX-SKT-LOC43 = alloca i64, align 8
%RAX-SKT-LOC = alloca i64, align 8
%RBX-SKT-LOC24 = alloca i64, align 8
%RBX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memload = load i64, ptr @skyboxArea, align 1
%0 = and i64 %memload, %memload
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %0, 0
%1 = and i64 %0, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
store i64 %memload, ptr %RAX-SKT-LOC, align 1
store i64 %memload, ptr %RAX-SKT-LOC43, align 1
%CmpSF_JS = icmp eq i1 %SF, true
br i1 %CmpSF_JS, label %bb.8, label %bb.1
bb.1: ; preds = %entry
%4 = inttoptr i64 %arg1 to ptr
%memload1 = load i64, ptr %4, align 1
%5 = load i64, ptr @PLANENUM_LEAF, align 8
%6 = sub i64 %memload1, %5
%7 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload1, i64 %5)
%CF = extractvalue { i64, i1 } %7, 1
%ZF2 = icmp eq i64 %6, 0
%highbit3 = and i64 -9223372036854775808, %6
%SF4 = icmp ne i64 %highbit3, 0
%8 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload1, i64 %5)
%OF = extractvalue { i64, i1 } %8, 1
%9 = and i64 %6, 255
%10 = call i64 @llvm.ctpop.i64(i64 %9)
%11 = and i64 %10, 1
%PF5 = icmp eq i64 %11, 0
store i64 %arg1, ptr %RBX-SKT-LOC, align 1
store i64 %arg1, ptr %RBX-SKT-LOC24, align 1
%CmpZF_JE = icmp eq i1 %ZF2, true
br i1 %CmpZF_JE, label %bb.5, label %bb.3
bb.3: ; preds = %bb.4, %bb.1
%RBX = load i64, ptr %RBX-SKT-LOC, align 1
%memref-disp = add i64 %RBX, 32
%12 = inttoptr i64 %memref-disp to ptr
%memload6 = load i64, ptr %12, align 1
%13 = inttoptr i64 %memload6 to ptr
%memload7 = load i64, ptr %13, align 1
%RAX = call i64 @FloodSkyboxArea_r(i64 %memload7)
%memload8 = load i64, ptr @skyboxArea, align 1
%14 = and i64 %memload8, %memload8
%highbit9 = and i64 -9223372036854775808, %14
%SF10 = icmp ne i64 %highbit9, 0
%ZF11 = icmp eq i64 %14, 0
%15 = and i64 %14, 255
%16 = call i64 @llvm.ctpop.i64(i64 %15)
%17 = and i64 %16, 1
%PF12 = icmp eq i64 %17, 0
store i64 %memload8, ptr %RAX-SKT-LOC, align 1
store i64 %memload8, ptr %RAX-SKT-LOC43, align 1
%CmpSF_JS45 = icmp eq i1 %SF10, true
br i1 %CmpSF_JS45, label %bb.8, label %bb.4
bb.4: ; preds = %bb.3
%memref-disp13 = add i64 %RBX, 32
%18 = inttoptr i64 %memref-disp13 to ptr
%memload14 = load i64, ptr %18, align 1
%memref-disp15 = add i64 %memload14, 8
%19 = inttoptr i64 %memref-disp15 to ptr
%memload16 = load i64, ptr %19, align 1
%20 = inttoptr i64 %memload16 to ptr
%memload17 = load i64, ptr %20, align 1
%21 = load i64, ptr @PLANENUM_LEAF, align 8
%22 = sub i64 %memload17, %21
%23 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload17, i64 %21)
%CF18 = extractvalue { i64, i1 } %23, 1
%ZF19 = icmp eq i64 %22, 0
%highbit20 = and i64 -9223372036854775808, %22
%SF21 = icmp ne i64 %highbit20, 0
%24 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload17, i64 %21)
%OF22 = extractvalue { i64, i1 } %24, 1
%25 = and i64 %22, 255
%26 = call i64 @llvm.ctpop.i64(i64 %25)
%27 = and i64 %26, 1
%PF23 = icmp eq i64 %27, 0
store i64 %memload16, ptr %RBX-SKT-LOC24, align 1
%CmpZF_JNE = icmp eq i1 %ZF19, false
store i64 %memload16, ptr %RBX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.3, label %bb.5
bb.5: ; preds = %bb.4, %bb.1
%RBX25 = load i64, ptr %RBX-SKT-LOC24, align 1
%memref-disp26 = add i64 %RBX25, 24
%28 = inttoptr i64 %memref-disp26 to ptr
%29 = load i64, ptr %28, align 1
%30 = sub i64 %29, 0
%31 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %29, i64 0)
%CF27 = extractvalue { i64, i1 } %31, 1
%ZF28 = icmp eq i64 %30, 0
%highbit29 = and i64 -9223372036854775808, %30
%SF30 = icmp ne i64 %highbit29, 0
%32 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %29, i64 0)
%OF31 = extractvalue { i64, i1 } %32, 1
%33 = and i64 %30, 255
%34 = call i64 @llvm.ctpop.i64(i64 %33)
%35 = and i64 %34, 1
%PF32 = icmp eq i64 %35, 0
%CmpZF_JNE46 = icmp eq i1 %ZF28, false
br i1 %CmpZF_JNE46, label %bb.8, label %bb.6
bb.6: ; preds = %bb.5
%memref-disp33 = add i64 %RBX25, 8
%36 = inttoptr i64 %memref-disp33 to ptr
%37 = load i64, ptr %36, align 1
%RAX34 = load i64, ptr %RAX-SKT-LOC, align 1
%38 = sub i64 %37, %RAX34
%39 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %37, i64 %RAX34)
%CF35 = extractvalue { i64, i1 } %39, 1
%ZF36 = icmp eq i64 %38, 0
%highbit37 = and i64 -9223372036854775808, %38
%SF38 = icmp ne i64 %highbit37, 0
%40 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %37, i64 %RAX34)
%OF39 = extractvalue { i64, i1 } %40, 1
%41 = and i64 %38, 255
%42 = call i64 @llvm.ctpop.i64(i64 %41)
%43 = and i64 %42, 1
%PF40 = icmp eq i64 %43, 0
store i64 %RAX34, ptr %RAX-SKT-LOC43, align 1
%CmpZF_JNE47 = icmp eq i1 %ZF36, false
br i1 %CmpZF_JNE47, label %bb.8, label %bb.7
bb.7: ; preds = %bb.6
%memload41 = load i32, ptr @qtrue, align 1
%memref-disp42 = add i64 %RBX25, 16
%44 = inttoptr i64 %memref-disp42 to ptr
store i32 %memload41, ptr %44, align 1
%45 = zext i32 %memload41 to i64
store i64 %45, ptr %RAX-SKT-LOC43, align 1
br label %bb.8
bb.8: ; preds = %bb.7, %bb.6, %bb.5, %bb.3, %entry
%RAX44 = load i64, ptr %RAX-SKT-LOC43, align 1
ret i64 %RAX44
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/lab/q3map2/q3map2/extr_portals.c_FloodSkyboxArea_r.c'
source_filename = "AnghaBench/lab/q3map2/q3map2/extr_portals.c_FloodSkyboxArea_r.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@skyboxArea = common local_unnamed_addr global i64 0, align 8
@PLANENUM_LEAF = common local_unnamed_addr global i64 0, align 8
@qtrue = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nofree nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync)
define void @FloodSkyboxArea_r(ptr nocapture noundef %0) local_unnamed_addr #0 {
%2 = load i64, ptr @skyboxArea, align 8, !tbaa !6
%3 = icmp slt i64 %2, 0
br i1 %3, label %35, label %4
4: ; preds = %1
%5 = load i64, ptr %0, align 8, !tbaa !10
%6 = load i64, ptr @PLANENUM_LEAF, align 8, !tbaa !6
%7 = icmp eq i64 %5, %6
br i1 %7, label %22, label %15
8: ; preds = %15
%9 = load ptr, ptr %17, align 8, !tbaa !14
%10 = getelementptr inbounds i8, ptr %9, i64 8
%11 = load ptr, ptr %10, align 8, !tbaa !15
%12 = load i64, ptr %11, align 8, !tbaa !10
%13 = load i64, ptr @PLANENUM_LEAF, align 8, !tbaa !6
%14 = icmp eq i64 %12, %13
br i1 %14, label %22, label %15
15: ; preds = %4, %8
%16 = phi ptr [ %11, %8 ], [ %0, %4 ]
%17 = getelementptr inbounds i8, ptr %16, i64 32
%18 = load ptr, ptr %17, align 8, !tbaa !14
%19 = load ptr, ptr %18, align 8, !tbaa !15
tail call void @FloodSkyboxArea_r(ptr noundef %19)
%20 = load i64, ptr @skyboxArea, align 8, !tbaa !6
%21 = icmp slt i64 %20, 0
br i1 %21, label %35, label %8
22: ; preds = %8, %4
%23 = phi i64 [ %2, %4 ], [ %20, %8 ]
%24 = phi ptr [ %0, %4 ], [ %11, %8 ]
%25 = getelementptr inbounds i8, ptr %24, i64 24
%26 = load i64, ptr %25, align 8, !tbaa !16
%27 = icmp eq i64 %26, 0
br i1 %27, label %28, label %35
28: ; preds = %22
%29 = getelementptr inbounds i8, ptr %24, i64 8
%30 = load i64, ptr %29, align 8, !tbaa !17
%31 = icmp eq i64 %30, %23
br i1 %31, label %32, label %35
32: ; preds = %28
%33 = load i32, ptr @qtrue, align 4, !tbaa !18
%34 = getelementptr inbounds i8, ptr %24, i64 16
store i32 %33, ptr %34, align 8, !tbaa !19
br label %35
35: ; preds = %15, %1, %22, %28, %32
ret void
}
attributes #0 = { nofree nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_3__", !7, i64 0, !7, i64 8, !12, i64 16, !7, i64 24, !13, i64 32}
!12 = !{!"int", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!11, !13, i64 32}
!15 = !{!13, !13, i64 0}
!16 = !{!11, !7, i64 24}
!17 = !{!11, !7, i64 8}
!18 = !{!12, !12, i64 0}
!19 = !{!11, !12, i64 16}
| lab_q3map2_q3map2_extr_portals.c_FloodSkyboxArea_r |
; ModuleID = 'reactos_base_services_nfsd_extr_daemon_debug.c_print_windows_access_mask.so'
source_filename = "reactos_base_services_nfsd_extr_daemon_debug.c_print_windows_access_mask.so"
@0 = private unnamed_addr constant [631 x i8] c"--> print_windows_access_mask: %x\0A\00\09GENERIC_READ\0A\00\09GENERIC_WRITE\0A\00\09GENERIC_EXECUTE\0A\00\09GENERIC_ALL\0A\00\09MAXIMUM_ALLOWED\0A\00\09ACCESS_SYSTEM_SECURITY\0A\00\09SPECIFIC_RIGHTS_ALL\0A\00\09STANDARD_RIGHTS_ALL\0A\00\09STANDARD_RIGHTS_REQUIRED\0A\00\09SYNCHRONIZE\0A\00\09WRITE_OWNER\0A\00\09WRITE_DAC\0A\00\09READ_CONTROL\0A\00\09DELETE\0A\00\09FILE_READ_DATA\0A\00\09FILE_LIST_DIRECTORY\0A\00\09FILE_WRITE_DATA\0A\00\09FILE_ADD_FILE\0A\00\09FILE_APPEND_DATA\0A\00\09FILE_ADD_SUBDIRECTORY\0A\00\09FILE_CREATE_PIPE_INSTANCE\0A\00\09FILE_READ_EA\0A\00\09FILE_WRITE_EA\0A\00\09FILE_EXECUTE\0A\00\09FILE_TRAVERSE\0A\00\09FILE_DELETE_CHILD\0A\00\09FILE_READ_ATTRIBUTES\0A\00\09FILE_WRITE_ATTRIBUTES\0A\00\09FILE_ALL_ACCESS\0A\00\09FILE_GENERIC_READ\0A\00\09FILE_GENERIC_WRITE\0A\00\09FILE_GENERIC_EXECUTE\0A\00", align 1, !ROData_SecInfo !0
@GENERIC_READ = common dso_local global i32 0, align 4
@GENERIC_WRITE = common dso_local global i32 0, align 4
@GENERIC_EXECUTE = common dso_local global i32 0, align 4
@GENERIC_ALL = common dso_local global i32 0, align 4
@MAXIMUM_ALLOWED = common dso_local global i32 0, align 4
@ACCESS_SYSTEM_SECURITY = common dso_local global i32 0, align 4
@SPECIFIC_RIGHTS_ALL = common dso_local global i32 0, align 4
@STANDARD_RIGHTS_ALL = common dso_local global i32 0, align 4
@STANDARD_RIGHTS_REQUIRED = common dso_local global i32 0, align 4
@SYNCHRONIZE = common dso_local global i32 0, align 4
@WRITE_OWNER = common dso_local global i32 0, align 4
@WRITE_DAC = common dso_local global i32 0, align 4
@READ_CONTROL = common dso_local global i32 0, align 4
@DELETE = common dso_local global i32 0, align 4
@FILE_READ_DATA = common dso_local global i32 0, align 4
@FILE_LIST_DIRECTORY = common dso_local global i32 0, align 4
@FILE_WRITE_DATA = common dso_local global i32 0, align 4
@FILE_ADD_FILE = common dso_local global i32 0, align 4
@FILE_APPEND_DATA = common dso_local global i32 0, align 4
@FILE_ADD_SUBDIRECTORY = common dso_local global i32 0, align 4
@FILE_CREATE_PIPE_INSTANCE = common dso_local global i32 0, align 4
@FILE_READ_EA = common dso_local global i32 0, align 4
@FILE_WRITE_EA = common dso_local global i32 0, align 4
@FILE_EXECUTE = common dso_local global i32 0, align 4
@FILE_TRAVERSE = common dso_local global i32 0, align 4
@FILE_DELETE_CHILD = common dso_local global i32 0, align 4
@FILE_READ_ATTRIBUTES = common dso_local global i32 0, align 4
@FILE_WRITE_ATTRIBUTES = common dso_local global i32 0, align 4
@FILE_ALL_ACCESS = common dso_local global i32 0, align 4
@FILE_GENERIC_READ = common dso_local global i32 0, align 4
@FILE_GENERIC_WRITE = common dso_local global i32 0, align 4
@FILE_GENERIC_EXECUTE = common dso_local global i32 0, align 4
declare dso_local i32 @dprintf(i32, ptr, ...)
define dso_local void @print_windows_access_mask(i32 %arg1, i32 %arg2) {
entry:
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSP_P.8 = inttoptr i64 %0 to ptr
%1 = and i32 %arg1, %arg1
%highbit = and i32 -2147483648, %1
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %1, 0
%2 = and i32 %1, 255
%3 = call i32 @llvm.ctpop.i32(i32 %2)
%4 = and i32 %3, 1
%PF = icmp eq i32 %4, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.65, label %bb.1
bb.1: ; preds = %entry
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%EAX = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr @0, i32 %arg2)
%5 = load i32, ptr @GENERIC_READ, align 4
%6 = zext i32 %5 to i64
%7 = zext i32 %arg2 to i64
%8 = and i64 %6, %7
%ZF1 = icmp eq i64 %8, 0
%highbit2 = and i64 -9223372036854775808, %8
%SF3 = icmp ne i64 %highbit2, 0
%9 = and i64 %8, 255
%10 = call i64 @llvm.ctpop.i64(i64 %9)
%11 = and i64 %10, 1
%PF4 = icmp eq i64 %11, 0
%CmpZF_JE1 = icmp eq i1 %ZF1, true
br i1 %CmpZF_JE1, label %bb.3, label %bb.2
bb.2: ; preds = %bb.1
%EAX6 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 35))
br label %bb.3
bb.3: ; preds = %bb.2, %bb.1
%12 = load i32, ptr @GENERIC_WRITE, align 4
%13 = zext i32 %12 to i64
%14 = zext i32 %arg2 to i64
%15 = and i64 %13, %14
%ZF7 = icmp eq i64 %15, 0
%highbit8 = and i64 -9223372036854775808, %15
%SF9 = icmp ne i64 %highbit8, 0
%16 = and i64 %15, 255
%17 = call i64 @llvm.ctpop.i64(i64 %16)
%18 = and i64 %17, 1
%PF10 = icmp eq i64 %18, 0
%CmpZF_JE2 = icmp eq i1 %ZF7, true
br i1 %CmpZF_JE2, label %bb.5, label %bb.4
bb.4: ; preds = %bb.3
%EAX12 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 50))
br label %bb.5
bb.5: ; preds = %bb.4, %bb.3
%19 = load i32, ptr @GENERIC_EXECUTE, align 4
%20 = zext i32 %19 to i64
%21 = zext i32 %arg2 to i64
%22 = and i64 %20, %21
%ZF13 = icmp eq i64 %22, 0
%highbit14 = and i64 -9223372036854775808, %22
%SF15 = icmp ne i64 %highbit14, 0
%23 = and i64 %22, 255
%24 = call i64 @llvm.ctpop.i64(i64 %23)
%25 = and i64 %24, 1
%PF16 = icmp eq i64 %25, 0
%CmpZF_JE3 = icmp eq i1 %ZF13, true
br i1 %CmpZF_JE3, label %bb.7, label %bb.6
bb.6: ; preds = %bb.5
%EAX18 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 66))
br label %bb.7
bb.7: ; preds = %bb.6, %bb.5
%26 = load i32, ptr @GENERIC_ALL, align 4
%27 = zext i32 %26 to i64
%28 = zext i32 %arg2 to i64
%29 = and i64 %27, %28
%ZF19 = icmp eq i64 %29, 0
%highbit20 = and i64 -9223372036854775808, %29
%SF21 = icmp ne i64 %highbit20, 0
%30 = and i64 %29, 255
%31 = call i64 @llvm.ctpop.i64(i64 %30)
%32 = and i64 %31, 1
%PF22 = icmp eq i64 %32, 0
%CmpZF_JE4 = icmp eq i1 %ZF19, true
br i1 %CmpZF_JE4, label %bb.9, label %bb.8
bb.8: ; preds = %bb.7
%EAX24 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 84))
br label %bb.9
bb.9: ; preds = %bb.8, %bb.7
%33 = load i32, ptr @MAXIMUM_ALLOWED, align 4
%34 = zext i32 %33 to i64
%35 = zext i32 %arg2 to i64
%36 = and i64 %34, %35
%ZF25 = icmp eq i64 %36, 0
%highbit26 = and i64 -9223372036854775808, %36
%SF27 = icmp ne i64 %highbit26, 0
%37 = and i64 %36, 255
%38 = call i64 @llvm.ctpop.i64(i64 %37)
%39 = and i64 %38, 1
%PF28 = icmp eq i64 %39, 0
%CmpZF_JE5 = icmp eq i1 %ZF25, true
br i1 %CmpZF_JE5, label %bb.11, label %bb.10
bb.10: ; preds = %bb.9
%EAX30 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 98))
br label %bb.11
bb.11: ; preds = %bb.10, %bb.9
%40 = load i32, ptr @ACCESS_SYSTEM_SECURITY, align 4
%41 = zext i32 %40 to i64
%42 = zext i32 %arg2 to i64
%43 = and i64 %41, %42
%ZF31 = icmp eq i64 %43, 0
%highbit32 = and i64 -9223372036854775808, %43
%SF33 = icmp ne i64 %highbit32, 0
%44 = and i64 %43, 255
%45 = call i64 @llvm.ctpop.i64(i64 %44)
%46 = and i64 %45, 1
%PF34 = icmp eq i64 %46, 0
%CmpZF_JE6 = icmp eq i1 %ZF31, true
br i1 %CmpZF_JE6, label %bb.13, label %bb.12
bb.12: ; preds = %bb.11
%EAX36 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 116))
br label %bb.13
bb.13: ; preds = %bb.12, %bb.11
%EBP = xor i32 %arg2, -1
%47 = load i32, ptr @SPECIFIC_RIGHTS_ALL, align 4
%48 = zext i32 %47 to i64
%49 = zext i32 %EBP to i64
%50 = and i64 %48, %49
%ZF37 = icmp eq i64 %50, 0
%highbit38 = and i64 -9223372036854775808, %50
%SF39 = icmp ne i64 %highbit38, 0
%51 = and i64 %50, 255
%52 = call i64 @llvm.ctpop.i64(i64 %51)
%53 = and i64 %52, 1
%PF40 = icmp eq i64 %53, 0
%CmpZF_JNE = icmp eq i1 %ZF37, false
br i1 %CmpZF_JNE, label %bb.15, label %bb.14
bb.14: ; preds = %bb.13
%EAX42 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 141))
br label %bb.15
bb.15: ; preds = %bb.14, %bb.13
%54 = load i32, ptr @STANDARD_RIGHTS_ALL, align 4
%55 = zext i32 %54 to i64
%56 = zext i32 %EBP to i64
%57 = and i64 %55, %56
%ZF43 = icmp eq i64 %57, 0
%highbit44 = and i64 -9223372036854775808, %57
%SF45 = icmp ne i64 %highbit44, 0
%58 = and i64 %57, 255
%59 = call i64 @llvm.ctpop.i64(i64 %58)
%60 = and i64 %59, 1
%PF46 = icmp eq i64 %60, 0
%CmpZF_JNE7 = icmp eq i1 %ZF43, false
br i1 %CmpZF_JNE7, label %bb.17, label %bb.16
bb.16: ; preds = %bb.15
%EAX48 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 163))
br label %bb.17
bb.17: ; preds = %bb.16, %bb.15
%61 = load i32, ptr @STANDARD_RIGHTS_REQUIRED, align 4
%62 = zext i32 %61 to i64
%63 = zext i32 %EBP to i64
%64 = and i64 %62, %63
%ZF49 = icmp eq i64 %64, 0
%highbit50 = and i64 -9223372036854775808, %64
%SF51 = icmp ne i64 %highbit50, 0
%65 = and i64 %64, 255
%66 = call i64 @llvm.ctpop.i64(i64 %65)
%67 = and i64 %66, 1
%PF52 = icmp eq i64 %67, 0
%CmpZF_JNE8 = icmp eq i1 %ZF49, false
br i1 %CmpZF_JNE8, label %bb.19, label %bb.18
bb.18: ; preds = %bb.17
%EAX54 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 185))
br label %bb.19
bb.19: ; preds = %bb.18, %bb.17
%68 = load i32, ptr @SYNCHRONIZE, align 4
%69 = zext i32 %68 to i64
%70 = zext i32 %arg2 to i64
%71 = and i64 %69, %70
%ZF55 = icmp eq i64 %71, 0
%highbit56 = and i64 -9223372036854775808, %71
%SF57 = icmp ne i64 %highbit56, 0
%72 = and i64 %71, 255
%73 = call i64 @llvm.ctpop.i64(i64 %72)
%74 = and i64 %73, 1
%PF58 = icmp eq i64 %74, 0
%CmpZF_JE9 = icmp eq i1 %ZF55, true
br i1 %CmpZF_JE9, label %bb.21, label %bb.20
bb.20: ; preds = %bb.19
%EAX60 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 212))
br label %bb.21
bb.21: ; preds = %bb.20, %bb.19
%75 = load i32, ptr @WRITE_OWNER, align 4
%76 = zext i32 %75 to i64
%77 = zext i32 %arg2 to i64
%78 = and i64 %76, %77
%ZF61 = icmp eq i64 %78, 0
%highbit62 = and i64 -9223372036854775808, %78
%SF63 = icmp ne i64 %highbit62, 0
%79 = and i64 %78, 255
%80 = call i64 @llvm.ctpop.i64(i64 %79)
%81 = and i64 %80, 1
%PF64 = icmp eq i64 %81, 0
%CmpZF_JE10 = icmp eq i1 %ZF61, true
br i1 %CmpZF_JE10, label %bb.23, label %bb.22
bb.22: ; preds = %bb.21
%EAX66 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 226))
br label %bb.23
bb.23: ; preds = %bb.22, %bb.21
%82 = load i32, ptr @WRITE_DAC, align 4
%83 = zext i32 %82 to i64
%84 = zext i32 %arg2 to i64
%85 = and i64 %83, %84
%ZF67 = icmp eq i64 %85, 0
%highbit68 = and i64 -9223372036854775808, %85
%SF69 = icmp ne i64 %highbit68, 0
%86 = and i64 %85, 255
%87 = call i64 @llvm.ctpop.i64(i64 %86)
%88 = and i64 %87, 1
%PF70 = icmp eq i64 %88, 0
%CmpZF_JE11 = icmp eq i1 %ZF67, true
br i1 %CmpZF_JE11, label %bb.25, label %bb.24
bb.24: ; preds = %bb.23
%EAX72 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 240))
br label %bb.25
bb.25: ; preds = %bb.24, %bb.23
%89 = load i32, ptr @READ_CONTROL, align 4
%90 = zext i32 %89 to i64
%91 = zext i32 %arg2 to i64
%92 = and i64 %90, %91
%ZF73 = icmp eq i64 %92, 0
%highbit74 = and i64 -9223372036854775808, %92
%SF75 = icmp ne i64 %highbit74, 0
%93 = and i64 %92, 255
%94 = call i64 @llvm.ctpop.i64(i64 %93)
%95 = and i64 %94, 1
%PF76 = icmp eq i64 %95, 0
%CmpZF_JE12 = icmp eq i1 %ZF73, true
br i1 %CmpZF_JE12, label %bb.27, label %bb.26
bb.26: ; preds = %bb.25
%EAX78 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 252))
br label %bb.27
bb.27: ; preds = %bb.26, %bb.25
%96 = load i32, ptr @DELETE, align 4
%97 = zext i32 %96 to i64
%98 = zext i32 %arg2 to i64
%99 = and i64 %97, %98
%ZF79 = icmp eq i64 %99, 0
%highbit80 = and i64 -9223372036854775808, %99
%SF81 = icmp ne i64 %highbit80, 0
%100 = and i64 %99, 255
%101 = call i64 @llvm.ctpop.i64(i64 %100)
%102 = and i64 %101, 1
%PF82 = icmp eq i64 %102, 0
%CmpZF_JE13 = icmp eq i1 %ZF79, true
br i1 %CmpZF_JE13, label %bb.29, label %bb.28
bb.28: ; preds = %bb.27
%EAX84 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 267))
br label %bb.29
bb.29: ; preds = %bb.28, %bb.27
%103 = load i32, ptr @FILE_READ_DATA, align 4
%104 = zext i32 %103 to i64
%105 = zext i32 %arg2 to i64
%106 = and i64 %104, %105
%ZF85 = icmp eq i64 %106, 0
%highbit86 = and i64 -9223372036854775808, %106
%SF87 = icmp ne i64 %highbit86, 0
%107 = and i64 %106, 255
%108 = call i64 @llvm.ctpop.i64(i64 %107)
%109 = and i64 %108, 1
%PF88 = icmp eq i64 %109, 0
%CmpZF_JE14 = icmp eq i1 %ZF85, true
br i1 %CmpZF_JE14, label %bb.31, label %bb.30
bb.30: ; preds = %bb.29
%EAX90 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 276))
br label %bb.31
bb.31: ; preds = %bb.30, %bb.29
%110 = load i32, ptr @FILE_LIST_DIRECTORY, align 4
%111 = zext i32 %110 to i64
%112 = zext i32 %arg2 to i64
%113 = and i64 %111, %112
%ZF91 = icmp eq i64 %113, 0
%highbit92 = and i64 -9223372036854775808, %113
%SF93 = icmp ne i64 %highbit92, 0
%114 = and i64 %113, 255
%115 = call i64 @llvm.ctpop.i64(i64 %114)
%116 = and i64 %115, 1
%PF94 = icmp eq i64 %116, 0
%CmpZF_JE15 = icmp eq i1 %ZF91, true
br i1 %CmpZF_JE15, label %bb.33, label %bb.32
bb.32: ; preds = %bb.31
%EAX96 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 293))
br label %bb.33
bb.33: ; preds = %bb.32, %bb.31
%117 = load i32, ptr @FILE_WRITE_DATA, align 4
%118 = zext i32 %117 to i64
%119 = zext i32 %arg2 to i64
%120 = and i64 %118, %119
%ZF97 = icmp eq i64 %120, 0
%highbit98 = and i64 -9223372036854775808, %120
%SF99 = icmp ne i64 %highbit98, 0
%121 = and i64 %120, 255
%122 = call i64 @llvm.ctpop.i64(i64 %121)
%123 = and i64 %122, 1
%PF100 = icmp eq i64 %123, 0
%CmpZF_JE16 = icmp eq i1 %ZF97, true
br i1 %CmpZF_JE16, label %bb.35, label %bb.34
bb.34: ; preds = %bb.33
%EAX102 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 315))
br label %bb.35
bb.35: ; preds = %bb.34, %bb.33
%124 = load i32, ptr @FILE_ADD_FILE, align 4
%125 = zext i32 %124 to i64
%126 = zext i32 %arg2 to i64
%127 = and i64 %125, %126
%ZF103 = icmp eq i64 %127, 0
%highbit104 = and i64 -9223372036854775808, %127
%SF105 = icmp ne i64 %highbit104, 0
%128 = and i64 %127, 255
%129 = call i64 @llvm.ctpop.i64(i64 %128)
%130 = and i64 %129, 1
%PF106 = icmp eq i64 %130, 0
%CmpZF_JE17 = icmp eq i1 %ZF103, true
br i1 %CmpZF_JE17, label %bb.37, label %bb.36
bb.36: ; preds = %bb.35
%EAX108 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 333))
br label %bb.37
bb.37: ; preds = %bb.36, %bb.35
%131 = load i32, ptr @FILE_APPEND_DATA, align 4
%132 = zext i32 %131 to i64
%133 = zext i32 %arg2 to i64
%134 = and i64 %132, %133
%ZF109 = icmp eq i64 %134, 0
%highbit110 = and i64 -9223372036854775808, %134
%SF111 = icmp ne i64 %highbit110, 0
%135 = and i64 %134, 255
%136 = call i64 @llvm.ctpop.i64(i64 %135)
%137 = and i64 %136, 1
%PF112 = icmp eq i64 %137, 0
%CmpZF_JE18 = icmp eq i1 %ZF109, true
br i1 %CmpZF_JE18, label %bb.39, label %bb.38
bb.38: ; preds = %bb.37
%EAX114 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 349))
br label %bb.39
bb.39: ; preds = %bb.38, %bb.37
%138 = load i32, ptr @FILE_ADD_SUBDIRECTORY, align 4
%139 = zext i32 %138 to i64
%140 = zext i32 %arg2 to i64
%141 = and i64 %139, %140
%ZF115 = icmp eq i64 %141, 0
%highbit116 = and i64 -9223372036854775808, %141
%SF117 = icmp ne i64 %highbit116, 0
%142 = and i64 %141, 255
%143 = call i64 @llvm.ctpop.i64(i64 %142)
%144 = and i64 %143, 1
%PF118 = icmp eq i64 %144, 0
%CmpZF_JE19 = icmp eq i1 %ZF115, true
br i1 %CmpZF_JE19, label %bb.41, label %bb.40
bb.40: ; preds = %bb.39
%EAX120 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 368))
br label %bb.41
bb.41: ; preds = %bb.40, %bb.39
%145 = load i32, ptr @FILE_CREATE_PIPE_INSTANCE, align 4
%146 = zext i32 %145 to i64
%147 = zext i32 %arg2 to i64
%148 = and i64 %146, %147
%ZF121 = icmp eq i64 %148, 0
%highbit122 = and i64 -9223372036854775808, %148
%SF123 = icmp ne i64 %highbit122, 0
%149 = and i64 %148, 255
%150 = call i64 @llvm.ctpop.i64(i64 %149)
%151 = and i64 %150, 1
%PF124 = icmp eq i64 %151, 0
%CmpZF_JE20 = icmp eq i1 %ZF121, true
br i1 %CmpZF_JE20, label %bb.43, label %bb.42
bb.42: ; preds = %bb.41
%EAX126 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 392))
br label %bb.43
bb.43: ; preds = %bb.42, %bb.41
%152 = load i32, ptr @FILE_READ_EA, align 4
%153 = zext i32 %152 to i64
%154 = zext i32 %arg2 to i64
%155 = and i64 %153, %154
%ZF127 = icmp eq i64 %155, 0
%highbit128 = and i64 -9223372036854775808, %155
%SF129 = icmp ne i64 %highbit128, 0
%156 = and i64 %155, 255
%157 = call i64 @llvm.ctpop.i64(i64 %156)
%158 = and i64 %157, 1
%PF130 = icmp eq i64 %158, 0
%CmpZF_JE21 = icmp eq i1 %ZF127, true
br i1 %CmpZF_JE21, label %bb.45, label %bb.44
bb.44: ; preds = %bb.43
%EAX132 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 420))
br label %bb.45
bb.45: ; preds = %bb.44, %bb.43
%159 = load i32, ptr @FILE_WRITE_EA, align 4
%160 = zext i32 %159 to i64
%161 = zext i32 %arg2 to i64
%162 = and i64 %160, %161
%ZF133 = icmp eq i64 %162, 0
%highbit134 = and i64 -9223372036854775808, %162
%SF135 = icmp ne i64 %highbit134, 0
%163 = and i64 %162, 255
%164 = call i64 @llvm.ctpop.i64(i64 %163)
%165 = and i64 %164, 1
%PF136 = icmp eq i64 %165, 0
%CmpZF_JE22 = icmp eq i1 %ZF133, true
br i1 %CmpZF_JE22, label %bb.47, label %bb.46
bb.46: ; preds = %bb.45
%EAX138 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 435))
br label %bb.47
bb.47: ; preds = %bb.46, %bb.45
%166 = load i32, ptr @FILE_EXECUTE, align 4
%167 = zext i32 %166 to i64
%168 = zext i32 %arg2 to i64
%169 = and i64 %167, %168
%ZF139 = icmp eq i64 %169, 0
%highbit140 = and i64 -9223372036854775808, %169
%SF141 = icmp ne i64 %highbit140, 0
%170 = and i64 %169, 255
%171 = call i64 @llvm.ctpop.i64(i64 %170)
%172 = and i64 %171, 1
%PF142 = icmp eq i64 %172, 0
%CmpZF_JE23 = icmp eq i1 %ZF139, true
br i1 %CmpZF_JE23, label %bb.49, label %bb.48
bb.48: ; preds = %bb.47
%EAX144 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 451))
br label %bb.49
bb.49: ; preds = %bb.48, %bb.47
%173 = load i32, ptr @FILE_TRAVERSE, align 4
%174 = zext i32 %173 to i64
%175 = zext i32 %arg2 to i64
%176 = and i64 %174, %175
%ZF145 = icmp eq i64 %176, 0
%highbit146 = and i64 -9223372036854775808, %176
%SF147 = icmp ne i64 %highbit146, 0
%177 = and i64 %176, 255
%178 = call i64 @llvm.ctpop.i64(i64 %177)
%179 = and i64 %178, 1
%PF148 = icmp eq i64 %179, 0
%CmpZF_JE24 = icmp eq i1 %ZF145, true
br i1 %CmpZF_JE24, label %bb.51, label %bb.50
bb.50: ; preds = %bb.49
%EAX150 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 466))
br label %bb.51
bb.51: ; preds = %bb.50, %bb.49
%180 = load i32, ptr @FILE_DELETE_CHILD, align 4
%181 = zext i32 %180 to i64
%182 = zext i32 %arg2 to i64
%183 = and i64 %181, %182
%ZF151 = icmp eq i64 %183, 0
%highbit152 = and i64 -9223372036854775808, %183
%SF153 = icmp ne i64 %highbit152, 0
%184 = and i64 %183, 255
%185 = call i64 @llvm.ctpop.i64(i64 %184)
%186 = and i64 %185, 1
%PF154 = icmp eq i64 %186, 0
%CmpZF_JE25 = icmp eq i1 %ZF151, true
br i1 %CmpZF_JE25, label %bb.53, label %bb.52
bb.52: ; preds = %bb.51
%EAX156 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 482))
br label %bb.53
bb.53: ; preds = %bb.52, %bb.51
%187 = load i32, ptr @FILE_READ_ATTRIBUTES, align 4
%188 = zext i32 %187 to i64
%189 = zext i32 %arg2 to i64
%190 = and i64 %188, %189
%ZF157 = icmp eq i64 %190, 0
%highbit158 = and i64 -9223372036854775808, %190
%SF159 = icmp ne i64 %highbit158, 0
%191 = and i64 %190, 255
%192 = call i64 @llvm.ctpop.i64(i64 %191)
%193 = and i64 %192, 1
%PF160 = icmp eq i64 %193, 0
%CmpZF_JE26 = icmp eq i1 %ZF157, true
br i1 %CmpZF_JE26, label %bb.55, label %bb.54
bb.54: ; preds = %bb.53
%EAX162 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 502))
br label %bb.55
bb.55: ; preds = %bb.54, %bb.53
%194 = load i32, ptr @FILE_WRITE_ATTRIBUTES, align 4
%195 = zext i32 %194 to i64
%196 = zext i32 %arg2 to i64
%197 = and i64 %195, %196
%ZF163 = icmp eq i64 %197, 0
%highbit164 = and i64 -9223372036854775808, %197
%SF165 = icmp ne i64 %highbit164, 0
%198 = and i64 %197, 255
%199 = call i64 @llvm.ctpop.i64(i64 %198)
%200 = and i64 %199, 1
%PF166 = icmp eq i64 %200, 0
%CmpZF_JE27 = icmp eq i1 %ZF163, true
br i1 %CmpZF_JE27, label %bb.57, label %bb.56
bb.56: ; preds = %bb.55
%EAX168 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 525))
br label %bb.57
bb.57: ; preds = %bb.56, %bb.55
%201 = load i32, ptr @FILE_ALL_ACCESS, align 4
%202 = zext i32 %201 to i64
%203 = zext i32 %EBP to i64
%204 = and i64 %202, %203
%ZF169 = icmp eq i64 %204, 0
%highbit170 = and i64 -9223372036854775808, %204
%SF171 = icmp ne i64 %highbit170, 0
%205 = and i64 %204, 255
%206 = call i64 @llvm.ctpop.i64(i64 %205)
%207 = and i64 %206, 1
%PF172 = icmp eq i64 %207, 0
%CmpZF_JNE28 = icmp eq i1 %ZF169, false
br i1 %CmpZF_JNE28, label %bb.59, label %bb.58
bb.58: ; preds = %bb.57
%EAX174 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 549))
br label %bb.59
bb.59: ; preds = %bb.58, %bb.57
%208 = load i32, ptr @FILE_GENERIC_READ, align 4
%209 = zext i32 %208 to i64
%210 = zext i32 %EBP to i64
%211 = and i64 %209, %210
%ZF175 = icmp eq i64 %211, 0
%highbit176 = and i64 -9223372036854775808, %211
%SF177 = icmp ne i64 %highbit176, 0
%212 = and i64 %211, 255
%213 = call i64 @llvm.ctpop.i64(i64 %212)
%214 = and i64 %213, 1
%PF178 = icmp eq i64 %214, 0
%CmpZF_JNE29 = icmp eq i1 %ZF175, false
br i1 %CmpZF_JNE29, label %bb.61, label %bb.60
bb.60: ; preds = %bb.59
%EAX180 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 567))
br label %bb.61
bb.61: ; preds = %bb.60, %bb.59
%215 = load i32, ptr @FILE_GENERIC_WRITE, align 4
%216 = zext i32 %215 to i64
%217 = zext i32 %EBP to i64
%218 = and i64 %216, %217
%ZF181 = icmp eq i64 %218, 0
%highbit182 = and i64 -9223372036854775808, %218
%SF183 = icmp ne i64 %highbit182, 0
%219 = and i64 %218, 255
%220 = call i64 @llvm.ctpop.i64(i64 %219)
%221 = and i64 %220, 1
%PF184 = icmp eq i64 %221, 0
%CmpZF_JNE30 = icmp eq i1 %ZF181, false
br i1 %CmpZF_JNE30, label %bb.63, label %bb.62
bb.62: ; preds = %bb.61
%EAX186 = call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 587))
br label %bb.63
bb.63: ; preds = %bb.62, %bb.61
%222 = load i32, ptr @FILE_GENERIC_EXECUTE, align 4
%223 = zext i32 %222 to i64
%224 = zext i32 %EBP to i64
%225 = and i64 %223, %224
%ZF187 = icmp eq i64 %225, 0
%highbit188 = and i64 -9223372036854775808, %225
%SF189 = icmp ne i64 %highbit188, 0
%226 = and i64 %225, 255
%227 = call i64 @llvm.ctpop.i64(i64 %226)
%228 = and i64 %227, 1
%PF190 = icmp eq i64 %228, 0
%RSP = ptrtoint ptr %RSP_P.8 to i64
%CmpZF_JNE31 = icmp eq i1 %ZF187, false
br i1 %CmpZF_JNE31, label %bb.65, label %bb.64
bb.64: ; preds = %bb.63
%EAX192 = tail call i32 (i32, ptr, ...) @dprintf(i32 1, ptr getelementptr inbounds ([631 x i8], ptr @0, i32 0, i32 608))
br label %UnifiedReturnBlock
bb.65: ; preds = %bb.63, %entry
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.65, %bb.64
ret void
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/reactos/base/services/nfsd/extr_daemon_debug.c_print_windows_access_mask.c'
source_filename = "AnghaBench/reactos/base/services/nfsd/extr_daemon_debug.c_print_windows_access_mask.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [35 x i8] c"--> print_windows_access_mask: %x\0A\00", align 1
@GENERIC_READ = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [15 x i8] c"\09GENERIC_READ\0A\00", align 1
@GENERIC_WRITE = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [16 x i8] c"\09GENERIC_WRITE\0A\00", align 1
@GENERIC_EXECUTE = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [18 x i8] c"\09GENERIC_EXECUTE\0A\00", align 1
@GENERIC_ALL = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [14 x i8] c"\09GENERIC_ALL\0A\00", align 1
@MAXIMUM_ALLOWED = common local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [18 x i8] c"\09MAXIMUM_ALLOWED\0A\00", align 1
@ACCESS_SYSTEM_SECURITY = common local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [25 x i8] c"\09ACCESS_SYSTEM_SECURITY\0A\00", align 1
@SPECIFIC_RIGHTS_ALL = common local_unnamed_addr global i32 0, align 4
@.str.7 = private unnamed_addr constant [22 x i8] c"\09SPECIFIC_RIGHTS_ALL\0A\00", align 1
@STANDARD_RIGHTS_ALL = common local_unnamed_addr global i32 0, align 4
@.str.8 = private unnamed_addr constant [22 x i8] c"\09STANDARD_RIGHTS_ALL\0A\00", align 1
@STANDARD_RIGHTS_REQUIRED = common local_unnamed_addr global i32 0, align 4
@.str.9 = private unnamed_addr constant [27 x i8] c"\09STANDARD_RIGHTS_REQUIRED\0A\00", align 1
@SYNCHRONIZE = common local_unnamed_addr global i32 0, align 4
@.str.10 = private unnamed_addr constant [14 x i8] c"\09SYNCHRONIZE\0A\00", align 1
@WRITE_OWNER = common local_unnamed_addr global i32 0, align 4
@.str.11 = private unnamed_addr constant [14 x i8] c"\09WRITE_OWNER\0A\00", align 1
@WRITE_DAC = common local_unnamed_addr global i32 0, align 4
@.str.12 = private unnamed_addr constant [12 x i8] c"\09WRITE_DAC\0A\00", align 1
@READ_CONTROL = common local_unnamed_addr global i32 0, align 4
@.str.13 = private unnamed_addr constant [15 x i8] c"\09READ_CONTROL\0A\00", align 1
@DELETE = common local_unnamed_addr global i32 0, align 4
@.str.14 = private unnamed_addr constant [9 x i8] c"\09DELETE\0A\00", align 1
@FILE_READ_DATA = common local_unnamed_addr global i32 0, align 4
@.str.15 = private unnamed_addr constant [17 x i8] c"\09FILE_READ_DATA\0A\00", align 1
@FILE_LIST_DIRECTORY = common local_unnamed_addr global i32 0, align 4
@.str.16 = private unnamed_addr constant [22 x i8] c"\09FILE_LIST_DIRECTORY\0A\00", align 1
@FILE_WRITE_DATA = common local_unnamed_addr global i32 0, align 4
@.str.17 = private unnamed_addr constant [18 x i8] c"\09FILE_WRITE_DATA\0A\00", align 1
@FILE_ADD_FILE = common local_unnamed_addr global i32 0, align 4
@.str.18 = private unnamed_addr constant [16 x i8] c"\09FILE_ADD_FILE\0A\00", align 1
@FILE_APPEND_DATA = common local_unnamed_addr global i32 0, align 4
@.str.19 = private unnamed_addr constant [19 x i8] c"\09FILE_APPEND_DATA\0A\00", align 1
@FILE_ADD_SUBDIRECTORY = common local_unnamed_addr global i32 0, align 4
@.str.20 = private unnamed_addr constant [24 x i8] c"\09FILE_ADD_SUBDIRECTORY\0A\00", align 1
@FILE_CREATE_PIPE_INSTANCE = common local_unnamed_addr global i32 0, align 4
@.str.21 = private unnamed_addr constant [28 x i8] c"\09FILE_CREATE_PIPE_INSTANCE\0A\00", align 1
@FILE_READ_EA = common local_unnamed_addr global i32 0, align 4
@.str.22 = private unnamed_addr constant [15 x i8] c"\09FILE_READ_EA\0A\00", align 1
@FILE_WRITE_EA = common local_unnamed_addr global i32 0, align 4
@.str.23 = private unnamed_addr constant [16 x i8] c"\09FILE_WRITE_EA\0A\00", align 1
@FILE_EXECUTE = common local_unnamed_addr global i32 0, align 4
@.str.24 = private unnamed_addr constant [15 x i8] c"\09FILE_EXECUTE\0A\00", align 1
@FILE_TRAVERSE = common local_unnamed_addr global i32 0, align 4
@.str.25 = private unnamed_addr constant [16 x i8] c"\09FILE_TRAVERSE\0A\00", align 1
@FILE_DELETE_CHILD = common local_unnamed_addr global i32 0, align 4
@.str.26 = private unnamed_addr constant [20 x i8] c"\09FILE_DELETE_CHILD\0A\00", align 1
@FILE_READ_ATTRIBUTES = common local_unnamed_addr global i32 0, align 4
@.str.27 = private unnamed_addr constant [23 x i8] c"\09FILE_READ_ATTRIBUTES\0A\00", align 1
@FILE_WRITE_ATTRIBUTES = common local_unnamed_addr global i32 0, align 4
@.str.28 = private unnamed_addr constant [24 x i8] c"\09FILE_WRITE_ATTRIBUTES\0A\00", align 1
@FILE_ALL_ACCESS = common local_unnamed_addr global i32 0, align 4
@.str.29 = private unnamed_addr constant [18 x i8] c"\09FILE_ALL_ACCESS\0A\00", align 1
@FILE_GENERIC_READ = common local_unnamed_addr global i32 0, align 4
@.str.30 = private unnamed_addr constant [20 x i8] c"\09FILE_GENERIC_READ\0A\00", align 1
@FILE_GENERIC_WRITE = common local_unnamed_addr global i32 0, align 4
@.str.31 = private unnamed_addr constant [21 x i8] c"\09FILE_GENERIC_WRITE\0A\00", align 1
@FILE_GENERIC_EXECUTE = common local_unnamed_addr global i32 0, align 4
@.str.32 = private unnamed_addr constant [23 x i8] c"\09FILE_GENERIC_EXECUTE\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @print_windows_access_mask(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq i32 %0, 0
br i1 %3, label %197, label %4
4: ; preds = %2
%5 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str, i32 noundef %1) #2
%6 = load i32, ptr @GENERIC_READ, align 4, !tbaa !6
%7 = and i32 %6, %1
%8 = icmp eq i32 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %4
%10 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.1) #2
br label %11
11: ; preds = %9, %4
%12 = load i32, ptr @GENERIC_WRITE, align 4, !tbaa !6
%13 = and i32 %12, %1
%14 = icmp eq i32 %13, 0
br i1 %14, label %17, label %15
15: ; preds = %11
%16 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.2) #2
br label %17
17: ; preds = %15, %11
%18 = load i32, ptr @GENERIC_EXECUTE, align 4, !tbaa !6
%19 = and i32 %18, %1
%20 = icmp eq i32 %19, 0
br i1 %20, label %23, label %21
21: ; preds = %17
%22 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.3) #2
br label %23
23: ; preds = %21, %17
%24 = load i32, ptr @GENERIC_ALL, align 4, !tbaa !6
%25 = and i32 %24, %1
%26 = icmp eq i32 %25, 0
br i1 %26, label %29, label %27
27: ; preds = %23
%28 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.4) #2
br label %29
29: ; preds = %27, %23
%30 = load i32, ptr @MAXIMUM_ALLOWED, align 4, !tbaa !6
%31 = and i32 %30, %1
%32 = icmp eq i32 %31, 0
br i1 %32, label %35, label %33
33: ; preds = %29
%34 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.5) #2
br label %35
35: ; preds = %33, %29
%36 = load i32, ptr @ACCESS_SYSTEM_SECURITY, align 4, !tbaa !6
%37 = and i32 %36, %1
%38 = icmp eq i32 %37, 0
br i1 %38, label %41, label %39
39: ; preds = %35
%40 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.6) #2
br label %41
41: ; preds = %39, %35
%42 = load i32, ptr @SPECIFIC_RIGHTS_ALL, align 4, !tbaa !6
%43 = and i32 %42, %1
%44 = icmp eq i32 %43, %42
br i1 %44, label %45, label %47
45: ; preds = %41
%46 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.7) #2
br label %47
47: ; preds = %45, %41
%48 = load i32, ptr @STANDARD_RIGHTS_ALL, align 4, !tbaa !6
%49 = and i32 %48, %1
%50 = icmp eq i32 %49, %48
br i1 %50, label %51, label %53
51: ; preds = %47
%52 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.8) #2
br label %53
53: ; preds = %51, %47
%54 = load i32, ptr @STANDARD_RIGHTS_REQUIRED, align 4, !tbaa !6
%55 = and i32 %54, %1
%56 = icmp eq i32 %55, %54
br i1 %56, label %57, label %59
57: ; preds = %53
%58 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.9) #2
br label %59
59: ; preds = %57, %53
%60 = load i32, ptr @SYNCHRONIZE, align 4, !tbaa !6
%61 = and i32 %60, %1
%62 = icmp eq i32 %61, 0
br i1 %62, label %65, label %63
63: ; preds = %59
%64 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.10) #2
br label %65
65: ; preds = %63, %59
%66 = load i32, ptr @WRITE_OWNER, align 4, !tbaa !6
%67 = and i32 %66, %1
%68 = icmp eq i32 %67, 0
br i1 %68, label %71, label %69
69: ; preds = %65
%70 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.11) #2
br label %71
71: ; preds = %69, %65
%72 = load i32, ptr @WRITE_DAC, align 4, !tbaa !6
%73 = and i32 %72, %1
%74 = icmp eq i32 %73, 0
br i1 %74, label %77, label %75
75: ; preds = %71
%76 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.12) #2
br label %77
77: ; preds = %75, %71
%78 = load i32, ptr @READ_CONTROL, align 4, !tbaa !6
%79 = and i32 %78, %1
%80 = icmp eq i32 %79, 0
br i1 %80, label %83, label %81
81: ; preds = %77
%82 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.13) #2
br label %83
83: ; preds = %81, %77
%84 = load i32, ptr @DELETE, align 4, !tbaa !6
%85 = and i32 %84, %1
%86 = icmp eq i32 %85, 0
br i1 %86, label %89, label %87
87: ; preds = %83
%88 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.14) #2
br label %89
89: ; preds = %87, %83
%90 = load i32, ptr @FILE_READ_DATA, align 4, !tbaa !6
%91 = and i32 %90, %1
%92 = icmp eq i32 %91, 0
br i1 %92, label %95, label %93
93: ; preds = %89
%94 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.15) #2
br label %95
95: ; preds = %93, %89
%96 = load i32, ptr @FILE_LIST_DIRECTORY, align 4, !tbaa !6
%97 = and i32 %96, %1
%98 = icmp eq i32 %97, 0
br i1 %98, label %101, label %99
99: ; preds = %95
%100 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.16) #2
br label %101
101: ; preds = %99, %95
%102 = load i32, ptr @FILE_WRITE_DATA, align 4, !tbaa !6
%103 = and i32 %102, %1
%104 = icmp eq i32 %103, 0
br i1 %104, label %107, label %105
105: ; preds = %101
%106 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.17) #2
br label %107
107: ; preds = %105, %101
%108 = load i32, ptr @FILE_ADD_FILE, align 4, !tbaa !6
%109 = and i32 %108, %1
%110 = icmp eq i32 %109, 0
br i1 %110, label %113, label %111
111: ; preds = %107
%112 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.18) #2
br label %113
113: ; preds = %111, %107
%114 = load i32, ptr @FILE_APPEND_DATA, align 4, !tbaa !6
%115 = and i32 %114, %1
%116 = icmp eq i32 %115, 0
br i1 %116, label %119, label %117
117: ; preds = %113
%118 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.19) #2
br label %119
119: ; preds = %117, %113
%120 = load i32, ptr @FILE_ADD_SUBDIRECTORY, align 4, !tbaa !6
%121 = and i32 %120, %1
%122 = icmp eq i32 %121, 0
br i1 %122, label %125, label %123
123: ; preds = %119
%124 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.20) #2
br label %125
125: ; preds = %123, %119
%126 = load i32, ptr @FILE_CREATE_PIPE_INSTANCE, align 4, !tbaa !6
%127 = and i32 %126, %1
%128 = icmp eq i32 %127, 0
br i1 %128, label %131, label %129
129: ; preds = %125
%130 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.21) #2
br label %131
131: ; preds = %129, %125
%132 = load i32, ptr @FILE_READ_EA, align 4, !tbaa !6
%133 = and i32 %132, %1
%134 = icmp eq i32 %133, 0
br i1 %134, label %137, label %135
135: ; preds = %131
%136 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.22) #2
br label %137
137: ; preds = %135, %131
%138 = load i32, ptr @FILE_WRITE_EA, align 4, !tbaa !6
%139 = and i32 %138, %1
%140 = icmp eq i32 %139, 0
br i1 %140, label %143, label %141
141: ; preds = %137
%142 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.23) #2
br label %143
143: ; preds = %141, %137
%144 = load i32, ptr @FILE_EXECUTE, align 4, !tbaa !6
%145 = and i32 %144, %1
%146 = icmp eq i32 %145, 0
br i1 %146, label %149, label %147
147: ; preds = %143
%148 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.24) #2
br label %149
149: ; preds = %147, %143
%150 = load i32, ptr @FILE_TRAVERSE, align 4, !tbaa !6
%151 = and i32 %150, %1
%152 = icmp eq i32 %151, 0
br i1 %152, label %155, label %153
153: ; preds = %149
%154 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.25) #2
br label %155
155: ; preds = %153, %149
%156 = load i32, ptr @FILE_DELETE_CHILD, align 4, !tbaa !6
%157 = and i32 %156, %1
%158 = icmp eq i32 %157, 0
br i1 %158, label %161, label %159
159: ; preds = %155
%160 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.26) #2
br label %161
161: ; preds = %159, %155
%162 = load i32, ptr @FILE_READ_ATTRIBUTES, align 4, !tbaa !6
%163 = and i32 %162, %1
%164 = icmp eq i32 %163, 0
br i1 %164, label %167, label %165
165: ; preds = %161
%166 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.27) #2
br label %167
167: ; preds = %165, %161
%168 = load i32, ptr @FILE_WRITE_ATTRIBUTES, align 4, !tbaa !6
%169 = and i32 %168, %1
%170 = icmp eq i32 %169, 0
br i1 %170, label %173, label %171
171: ; preds = %167
%172 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.28) #2
br label %173
173: ; preds = %171, %167
%174 = load i32, ptr @FILE_ALL_ACCESS, align 4, !tbaa !6
%175 = and i32 %174, %1
%176 = icmp eq i32 %175, %174
br i1 %176, label %177, label %179
177: ; preds = %173
%178 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.29) #2
br label %179
179: ; preds = %177, %173
%180 = load i32, ptr @FILE_GENERIC_READ, align 4, !tbaa !6
%181 = and i32 %180, %1
%182 = icmp eq i32 %181, %180
br i1 %182, label %183, label %185
183: ; preds = %179
%184 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.30) #2
br label %185
185: ; preds = %183, %179
%186 = load i32, ptr @FILE_GENERIC_WRITE, align 4, !tbaa !6
%187 = and i32 %186, %1
%188 = icmp eq i32 %187, %186
br i1 %188, label %189, label %191
189: ; preds = %185
%190 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.31) #2
br label %191
191: ; preds = %189, %185
%192 = load i32, ptr @FILE_GENERIC_EXECUTE, align 4, !tbaa !6
%193 = and i32 %192, %1
%194 = icmp eq i32 %193, %192
br i1 %194, label %195, label %197
195: ; preds = %191
%196 = tail call i32 (i32, ptr, ...) @dprintf(i32 noundef 1, ptr noundef nonnull @.str.32) #2
br label %197
197: ; preds = %2, %195, %191
ret void
}
declare i32 @dprintf(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| reactos_base_services_nfsd_extr_daemon_debug.c_print_windows_access_mask |
; ModuleID = 'Provenance_Cores_Yabause_yabause_src_extr_vidsoft.c_CheckDil.so'
source_filename = "Provenance_Cores_Yabause_yabause_src_extr_vidsoft.c_CheckDil.so"
@vdp1interlace = common dso_local global i32 0, align 4
define dso_local i32 @CheckDil(i8 %arg1, i64 %arg2) {
entry:
%EAX-SKT-LOC = alloca i32, align 4
%0 = load i32, ptr @vdp1interlace, align 4
%1 = zext i32 %0 to i64
%2 = zext i32 2 to i64
%3 = sub i64 %1, %2
%4 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %1, i64 %2)
%CF = extractvalue { i64, i1 } %4, 1
%ZF = icmp eq i64 %3, 0
%highbit = and i64 -9223372036854775808, %3
%SF = icmp ne i64 %highbit, 0
%5 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %1, i64 %2)
%OF = extractvalue { i64, i1 } %5, 1
%6 = and i64 %3, 255
%7 = call i64 @llvm.ctpop.i64(i64 %6)
%8 = and i64 %7, 1
%PF = icmp eq i64 %8, 0
%CmpZF_JNE = icmp eq i1 %ZF, false
br i1 %CmpZF_JNE, label %bb.5, label %bb.1
bb.1: ; preds = %entry
%9 = inttoptr i64 %arg2 to ptr
%10 = load i8, ptr %9, align 1
%11 = zext i8 %10 to i64
%12 = zext i8 4 to i64
%13 = and i64 %11, %12
%ZF1 = icmp eq i64 %13, 0
%highbit2 = and i64 -9223372036854775808, %13
%SF3 = icmp ne i64 %highbit2, 0
%14 = and i64 %13, 255
%15 = call i64 @llvm.ctpop.i64(i64 %14)
%16 = and i64 %15, 1
%PF4 = icmp eq i64 %16, 0
%CmpZF_JNE13 = icmp eq i1 %ZF1, false
br i1 %CmpZF_JNE13, label %bb.4, label %bb.2
bb.2: ; preds = %bb.1
%17 = and i8 %arg1, 1
%18 = call i8 @llvm.ctpop.i8(i8 %17)
%19 = and i8 %18, 1
%PF5 = icmp eq i8 %19, 0
%ZF6 = icmp eq i8 %17, 0
%highbit7 = and i8 -128, %17
%SF8 = icmp ne i8 %highbit7, 0
store i32 1, ptr %EAX-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF6, true
br i1 %CmpZF_JE, label %bb.5, label %bb.3
bb.3: ; preds = %bb.2
br label %bb.6
bb.4: ; preds = %bb.1
%20 = and i8 %arg1, 1
%21 = call i8 @llvm.ctpop.i8(i8 %20)
%22 = and i8 %21, 1
%PF9 = icmp eq i8 %22, 0
%ZF10 = icmp eq i8 %20, 0
%highbit11 = and i8 -128, %20
%SF12 = icmp ne i8 %highbit11, 0
store i32 1, ptr %EAX-SKT-LOC, align 1
%CmpZF_JE14 = icmp eq i1 %ZF10, true
br i1 %CmpZF_JE14, label %bb.6, label %bb.5
bb.5: ; preds = %bb.4, %bb.2, %entry
store i32 0, ptr %EAX-SKT-LOC, align 1
br label %bb.6
bb.6: ; preds = %bb.5, %bb.4, %bb.3
%EAX = load i32, ptr %EAX-SKT-LOC, align 1
ret i32 %EAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/extr_vidsoft.c_CheckDil.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/extr_vidsoft.c_CheckDil.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@vdp1interlace = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @CheckDil], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal range(i32 0, 2) i32 @CheckDil(i32 noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr @vdp1interlace, align 4, !tbaa !6
%4 = icmp eq i32 %3, 2
br i1 %4, label %5, label %13
5: ; preds = %2
%6 = load i32, ptr %1, align 4, !tbaa !10
%7 = and i32 %6, 4
%8 = icmp eq i32 %7, 0
%9 = and i32 %0, 1
%10 = icmp eq i32 %9, 0
br i1 %8, label %12, label %11
11: ; preds = %5
br i1 %10, label %14, label %13
12: ; preds = %5
br i1 %10, label %13, label %14
13: ; preds = %11, %12, %2
br label %14
14: ; preds = %12, %11, %13
%15 = phi i32 [ 0, %13 ], [ 1, %11 ], [ 1, %12 ]
ret i32 %15
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_3__", !7, i64 0}
| Provenance_Cores_Yabause_yabause_src_extr_vidsoft.c_CheckDil |
; ModuleID = 'linux_drivers_crypto_chelsio_extr_chcr_core.h_sgl_len.so'
source_filename = "linux_drivers_crypto_chelsio_extr_chcr_core.h_sgl_len.so"
define dso_local i32 @sgl_len(i32 %arg1) {
entry:
%EDI = sub i32 %arg1, 1
%0 = and i32 %EDI, 255
%1 = call i32 @llvm.ctpop.i32(i32 %0)
%2 = and i32 %1, 1
%PF = icmp eq i32 %2, 0
%ZF = icmp eq i32 %EDI, 0
%highbit = and i32 -2147483648, %EDI
%SF = icmp ne i32 %highbit, 0
%3 = zext i32 %EDI to i64
%memref-idxreg = mul i64 2, %3
%4 = zext i32 %EDI to i64
%memref-basereg = add i64 %4, %memref-idxreg
%EAX = trunc i64 %memref-basereg to i32
%EAX4 = lshr i32 %EAX, 1
%ZF1 = icmp eq i32 %EAX4, 0
%highbit2 = and i32 -2147483648, %EAX4
%SF3 = icmp ne i32 %highbit2, 0
%EDI9 = and i32 %EDI, 1
%5 = and i32 %EDI9, 255
%6 = call i32 @llvm.ctpop.i32(i32 %5)
%7 = and i32 %6, 1
%PF5 = icmp eq i32 %7, 0
%ZF6 = icmp eq i32 %EDI9, 0
%highbit7 = and i32 -2147483648, %EDI9
%SF8 = icmp ne i32 %highbit7, 0
%EAX13 = add nsw i32 %EAX4, %EDI9
%highbit10 = and i32 -2147483648, %EAX13
%SF11 = icmp ne i32 %highbit10, 0
%ZF12 = icmp eq i32 %EAX13, 0
%EAX18 = add i32 %EAX13, 2
%8 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %EAX13, i32 2)
%CF = extractvalue { i32, i1 } %8, 1
%9 = and i32 %EAX18, 255
%10 = call i32 @llvm.ctpop.i32(i32 %9)
%11 = and i32 %10, 1
%PF14 = icmp eq i32 %11, 0
%ZF15 = icmp eq i32 %EAX18, 0
%highbit16 = and i32 -2147483648, %EAX18
%SF17 = icmp ne i32 %highbit16, 0
%12 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %EAX13, i32 2)
%OF = extractvalue { i32, i1 } %12, 1
ret i32 %EAX18
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/crypto/chelsio/extr_chcr_core.h_sgl_len.c'
source_filename = "AnghaBench/linux/drivers/crypto/chelsio/extr_chcr_core.h_sgl_len.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @sgl_len], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal range(i32 2, -2147483645) i32 @sgl_len(i32 noundef %0) #0 {
%2 = add i32 %0, -1
%3 = mul i32 %2, 3
%4 = lshr i32 %3, 1
%5 = and i32 %2, 1
%6 = or disjoint i32 %5, 2
%7 = add nuw i32 %6, %4
ret i32 %7
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_crypto_chelsio_extr_chcr_core.h_sgl_len |
; ModuleID = 'fastsocket_kernel_arch_mips_vr41xx_common_extr_bcu.c_vr41xx_get_vtclock_frequency.so'
source_filename = "fastsocket_kernel_arch_mips_vr41xx_common_extr_bcu.c_vr41xx_get_vtclock_frequency.so"
@vr41xx_vtclock = common dso_local global i64 0, align 8
define dso_local i64 @vr41xx_get_vtclock_frequency() {
entry:
%memload = load i64, ptr @vr41xx_vtclock, align 1
ret i64 %memload
}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/mips/vr41xx/common/extr_bcu.c_vr41xx_get_vtclock_frequency.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/mips/vr41xx/common/extr_bcu.c_vr41xx_get_vtclock_frequency.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@vr41xx_vtclock = common local_unnamed_addr global i64 0, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define i64 @vr41xx_get_vtclock_frequency() local_unnamed_addr #0 {
%1 = load i64, ptr @vr41xx_vtclock, align 8, !tbaa !6
ret i64 %1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_arch_mips_vr41xx_common_extr_bcu.c_vr41xx_get_vtclock_frequency |
; ModuleID = 'macvim_src_extr_popupmnu.c_pum_visible.so'
source_filename = "macvim_src_extr_popupmnu.c_pum_visible.so"
@pum_do_redraw = common dso_local global i32 0, align 4
@pum_array = common dso_local global i64 0, align 8
define dso_local i32 @pum_visible() {
entry:
%0 = load i32, ptr @pum_do_redraw, align 4
%1 = zext i32 %0 to i64
%2 = zext i32 0 to i64
%3 = sub i64 %1, %2
%4 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %1, i64 %2)
%CF = extractvalue { i64, i1 } %4, 1
%ZF = icmp eq i64 %3, 0
%highbit = and i64 -9223372036854775808, %3
%SF = icmp ne i64 %highbit, 0
%5 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %1, i64 %2)
%OF = extractvalue { i64, i1 } %5, 1
%6 = and i64 %3, 255
%7 = call i64 @llvm.ctpop.i64(i64 %6)
%8 = and i64 %7, 1
%PF = icmp eq i64 %8, 0
%AL = icmp eq i1 %ZF, true
%9 = load i64, ptr @pum_array, align 8
%10 = sub i64 %9, 0
%11 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %9, i64 0)
%CF1 = extractvalue { i64, i1 } %11, 1
%ZF2 = icmp eq i64 %10, 0
%highbit3 = and i64 -9223372036854775808, %10
%SF4 = icmp ne i64 %highbit3, 0
%12 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %9, i64 0)
%OF5 = extractvalue { i64, i1 } %12, 1
%13 = and i64 %10, 255
%14 = call i64 @llvm.ctpop.i64(i64 %13)
%15 = and i64 %14, 1
%PF6 = icmp eq i64 %15, 0
%CL = icmp eq i1 %ZF2, false
%16 = zext i1 %CL to i8
%17 = zext i1 %AL to i8
%CL11 = and i8 %16, %17
%highbit7 = and i8 -128, %CL11
%SF8 = icmp ne i8 %highbit7, 0
%ZF9 = icmp eq i8 %CL11, 0
%18 = call i8 @llvm.ctpop.i8(i8 %CL11)
%19 = and i8 %18, 1
%PF10 = icmp eq i8 %19, 0
%EAX = zext i8 %CL11 to i32
ret i32 %EAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/macvim/src/extr_popupmnu.c_pum_visible.c'
source_filename = "AnghaBench/macvim/src/extr_popupmnu.c_pum_visible.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@pum_do_redraw = common local_unnamed_addr global i32 0, align 4
@pum_array = common local_unnamed_addr global ptr null, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define range(i32 0, 2) i32 @pum_visible() local_unnamed_addr #0 {
%1 = load i32, ptr @pum_do_redraw, align 4, !tbaa !6
%2 = icmp eq i32 %1, 0
%3 = load ptr, ptr @pum_array, align 8
%4 = icmp ne ptr %3, null
%5 = select i1 %2, i1 %4, i1 false
%6 = zext i1 %5 to i32
ret i32 %6
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| macvim_src_extr_popupmnu.c_pum_visible |
; ModuleID = 'reactos_sdk_lib_3rdparty_freetype_src_raster_extr_ftraster.c_Split_Conic.so'
source_filename = "reactos_sdk_lib_3rdparty_freetype_src_raster_extr_ftraster.c_Split_Conic.so"
define dso_local <4 x i32> @Split_Conic(i64 %arg1) {
entry:
%memref-disp = add i64 %arg1, 8
%0 = inttoptr i64 %memref-disp to ptr
%memload = load <4 x i32>, ptr %0, align 1
%1 = inttoptr i64 %arg1 to ptr
%memload1 = load <4 x i32>, ptr %1, align 1
%2 = bitcast <4 x i32> %memload1 to <4 x i32>
%3 = bitcast <4 x i32> %memload to <4 x i32>
%XMM1 = add <4 x i32> %2, %3
}
| ; ModuleID = 'AnghaBench/reactos/sdk/lib/3rdparty/freetype/src/raster/extr_ftraster.c_Split_Conic.c'
source_filename = "AnghaBench/reactos/sdk/lib/3rdparty/freetype/src/raster/extr_ftraster.c_Split_Conic.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @Split_Conic], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync)
define internal void @Split_Conic(ptr nocapture noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = load i32, ptr %2, align 4, !tbaa !6
%4 = getelementptr inbounds i8, ptr %0, i64 32
store i32 %3, ptr %4, align 4, !tbaa !6
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load i32, ptr %5, align 4, !tbaa !6
%7 = add nsw i32 %6, %3
%8 = sdiv i32 %7, 2
%9 = getelementptr inbounds i8, ptr %0, i64 24
store i32 %8, ptr %9, align 4, !tbaa !6
%10 = load i32, ptr %0, align 4, !tbaa !6
%11 = add nsw i32 %10, %6
%12 = sdiv i32 %11, 2
store i32 %12, ptr %5, align 4, !tbaa !6
%13 = add nsw i32 %12, %8
%14 = sdiv i32 %13, 2
store i32 %14, ptr %2, align 4, !tbaa !6
%15 = getelementptr inbounds i8, ptr %0, i64 20
%16 = load i32, ptr %15, align 4, !tbaa !11
%17 = getelementptr inbounds i8, ptr %0, i64 36
store i32 %16, ptr %17, align 4, !tbaa !11
%18 = getelementptr inbounds i8, ptr %0, i64 12
%19 = load i32, ptr %18, align 4, !tbaa !11
%20 = add nsw i32 %19, %16
%21 = sdiv i32 %20, 2
%22 = getelementptr inbounds i8, ptr %0, i64 28
store i32 %21, ptr %22, align 4, !tbaa !11
%23 = getelementptr inbounds i8, ptr %0, i64 4
%24 = load i32, ptr %23, align 4, !tbaa !11
%25 = add nsw i32 %24, %19
%26 = sdiv i32 %25, 2
store i32 %26, ptr %18, align 4, !tbaa !11
%27 = add nsw i32 %26, %21
%28 = sdiv i32 %27, 2
store i32 %28, ptr %15, align 4, !tbaa !11
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
| reactos_sdk_lib_3rdparty_freetype_src_raster_extr_ftraster.c_Split_Conic |
; ModuleID = 'linux_drivers_hwmon_extr_lm93.c_LM93_IN_REL_FROM_REG.so'
source_filename = "linux_drivers_hwmon_extr_lm93.c_LM93_IN_REL_FROM_REG.so"
define dso_local i32 @LM93_IN_REL_FROM_REG(i32 %arg1, i32 %arg2, i32 %arg3) {
entry:
%EAX = lshr i32 %arg1, 4
%ZF = icmp eq i32 %EAX, 0
%highbit = and i32 -2147483648, %EAX
%SF = icmp ne i32 %highbit, 0
%0 = and i32 %arg2, %arg2
%highbit1 = and i32 -2147483648, %0
%SF2 = icmp ne i32 %highbit1, 0
%ZF3 = icmp eq i32 %0, 0
%1 = and i32 %0, 255
%2 = call i32 @llvm.ctpop.i32(i32 %1)
%3 = and i32 %2, 1
%PF = icmp eq i32 %3, 0
%Cond_CMOVE = icmp eq i1 %ZF3, true
%CMOV = select i1 %Cond_CMOVE, i32 %arg1, i32 %EAX
%Cond_CMOVE4 = icmp eq i1 %ZF3, true
%CMOV5 = select i1 %Cond_CMOVE4, i32 -25000, i32 12500
%EAX10 = and i32 %CMOV, 15
%4 = and i32 %EAX10, 255
%5 = call i32 @llvm.ctpop.i32(i32 %4)
%6 = and i32 %5, 1
%PF6 = icmp eq i32 %6, 0
%ZF7 = icmp eq i32 %EAX10, 0
%highbit8 = and i32 -2147483648, %EAX10
%SF9 = icmp ne i32 %highbit8, 0
%EAX11 = mul nsw i32 %EAX10, %CMOV5
%EAX15 = add nsw i32 %EAX11, %CMOV5
%highbit12 = and i32 -2147483648, %EAX15
%SF13 = icmp ne i32 %highbit12, 0
%ZF14 = icmp eq i32 %EAX15, 0
%RAX = sext i32 %EAX15 to i64
%ECX = mul i32 %arg3, 1000
%7 = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %arg3, i32 1000)
%OF = extractvalue { i32, i1 } %7, 1
%RCX = sext i32 %ECX to i64
%RAX19 = add nsw i64 %RAX, %RCX
%highbit16 = and i64 -9223372036854775808, %RAX19
%SF17 = icmp ne i64 %highbit16, 0
%ZF18 = icmp eq i64 %RAX19, 0
%RAX25 = add i64 %RAX19, 5000
%8 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RAX19, i64 5000)
%CF = extractvalue { i64, i1 } %8, 1
%9 = and i64 %RAX25, 255
%10 = call i64 @llvm.ctpop.i64(i64 %9)
%11 = and i64 %10, 1
%PF20 = icmp eq i64 %11, 0
%ZF21 = icmp eq i64 %RAX25, 0
%highbit22 = and i64 -9223372036854775808, %RAX25
%SF23 = icmp ne i64 %highbit22, 0
%12 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RAX19, i64 5000)
%OF24 = extractvalue { i64, i1 } %12, 1
%13 = sext i64 %RAX25 to i128
%14 = sext i64 3777893186295716171 to i128
%15 = mul nsw i128 %13, %14
%16 = lshr i128 %15, 64
%RDX = trunc i128 %16 to i64
%RAX26 = trunc i128 %15 to i64
%17 = sext i64 %RAX26 to i128
%18 = icmp ne i128 %17, %15
%RAX30 = lshr i64 %RDX, 63
%ZF27 = icmp eq i64 %RAX30, 0
%highbit28 = and i64 -9223372036854775808, %RAX30
%SF29 = icmp ne i64 %highbit28, 0
%RDX34 = lshr i64 %RDX, 11
%ZF31 = icmp eq i64 %RDX34, 0
%highbit32 = and i64 -9223372036854775808, %RDX34
%SF33 = icmp ne i64 %highbit32, 0
%19 = trunc i64 %RAX30 to i32
%20 = trunc i64 %RDX34 to i32
%EAX38 = add nsw i32 %19, %20
%highbit35 = and i32 -2147483648, %EAX38
%SF36 = icmp ne i32 %highbit35, 0
%ZF37 = icmp eq i32 %EAX38, 0
ret i32 %EAX38
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.smul.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/hwmon/extr_lm93.c_LM93_IN_REL_FROM_REG.c'
source_filename = "AnghaBench/linux/drivers/hwmon/extr_lm93.c_LM93_IN_REL_FROM_REG.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @LM93_IN_REL_FROM_REG], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal range(i32 -214787, 214769) i32 @LM93_IN_REL_FROM_REG(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = icmp eq i32 %1, 0
%5 = lshr i32 %0, 4
%6 = select i1 %4, i32 %0, i32 %5
%7 = select i1 %4, i32 -25000, i32 12500
%8 = and i32 %6, 15
%9 = add nuw nsw i32 %8, 1
%10 = mul nsw i32 %9, %7
%11 = sext i32 %10 to i64
%12 = mul nsw i32 %2, 1000
%13 = sext i32 %12 to i64
%14 = add nsw i64 %13, 5000
%15 = add nsw i64 %14, %11
%16 = sdiv i64 %15, 10000
%17 = trunc nsw i64 %16 to i32
ret i32 %17
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_hwmon_extr_lm93.c_LM93_IN_REL_FROM_REG |
; ModuleID = 'linux_drivers_net_wireless_intel_iwlegacy_extr_3945.c_il3945_hwrate_to_plcp_idx.so'
source_filename = "linux_drivers_net_wireless_intel_iwlegacy_extr_3945.c_il3945_hwrate_to_plcp_idx.so"
@RATE_COUNT_3945 = common dso_local global i32 0, align 4
@il3945_rates = common dso_local global i64 0, align 8
define dso_local i32 @il3945_hwrate_to_plcp_idx(i64 %arg1) {
entry:
%RDX-SKT-LOC = alloca i64, align 8
%memload = load i32, ptr @RATE_COUNT_3945, align 1
%0 = and i32 %memload, %memload
%highbit = and i32 -2147483648, %0
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %0, 0
%1 = and i32 %0, 255
%2 = call i32 @llvm.ctpop.i32(i32 %1)
%3 = and i32 %2, 1
%PF = icmp eq i32 %3, 0
%CmpZF_JLE = icmp eq i1 %ZF, true
%CmpOF_JLE = icmp ne i1 %SF, false
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
br i1 %ZFOrSF_JLE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%memload1 = load i64, ptr @il3945_rates, align 1
%4 = zext i32 0 to i64
store i64 %4, ptr %RDX-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.3
%RDX = load i64, ptr %RDX-SKT-LOC, align 1
%memref-idxreg = mul i64 8, %RDX
%memref-basereg = add i64 %memload1, %memref-idxreg
%5 = inttoptr i64 %memref-basereg to ptr
%6 = load i64, ptr %5, align 1
%7 = sub i64 %6, %arg1
%8 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %6, i64 %arg1)
%CF = extractvalue { i64, i1 } %8, 1
%ZF2 = icmp eq i64 %7, 0
%highbit3 = and i64 -9223372036854775808, %7
%SF4 = icmp ne i64 %highbit3, 0
%9 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %6, i64 %arg1)
%OF = extractvalue { i64, i1 } %9, 1
%10 = and i64 %7, 255
%11 = call i64 @llvm.ctpop.i64(i64 %10)
%12 = and i64 %11, 1
%PF5 = icmp eq i64 %12, 0
%CmpZF_JE = icmp eq i1 %ZF2, true
br i1 %CmpZF_JE, label %bb.5, label %bb.3
bb.3: ; preds = %bb.2
%RDX10 = add i64 %RDX, 1
%13 = and i64 %RDX10, 255
%14 = call i64 @llvm.ctpop.i64(i64 %13)
%15 = and i64 %14, 1
%PF6 = icmp eq i64 %15, 0
%ZF7 = icmp eq i64 %RDX10, 0
%highbit8 = and i64 -9223372036854775808, %RDX10
%SF9 = icmp ne i64 %highbit8, 0
%16 = zext i32 %memload to i64
%17 = sub i64 %16, %RDX10
%18 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %16, i64 %RDX10)
%CF11 = extractvalue { i64, i1 } %18, 1
%ZF12 = icmp eq i64 %17, 0
%highbit13 = and i64 -9223372036854775808, %17
%SF14 = icmp ne i64 %highbit13, 0
%19 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %16, i64 %RDX10)
%OF15 = extractvalue { i64, i1 } %19, 1
%20 = and i64 %17, 255
%21 = call i64 @llvm.ctpop.i64(i64 %20)
%22 = and i64 %21, 1
%PF16 = icmp eq i64 %22, 0
%CmpZF_JNE = icmp eq i1 %ZF12, false
store i64 %RDX10, ptr %RDX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.2, label %bb.4
bb.5: ; preds = %bb.2
%EAX = trunc i64 %RDX to i32
br label %UnifiedReturnBlock
bb.4: ; preds = %bb.3, %entry
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.4, %bb.5
%UnifiedRetVal = phi i32 [ %EAX, %bb.5 ], [ -1, %bb.4 ]
ret i32 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intel/iwlegacy/extr_3945.c_il3945_hwrate_to_plcp_idx.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/intel/iwlegacy/extr_3945.c_il3945_hwrate_to_plcp_idx.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i64 }
@RATE_COUNT_3945 = common local_unnamed_addr global i32 0, align 4
@il3945_rates = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @il3945_hwrate_to_plcp_idx], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @il3945_hwrate_to_plcp_idx(i64 noundef %0) #0 {
%2 = load i32, ptr @RATE_COUNT_3945, align 4, !tbaa !6
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %17
4: ; preds = %1
%5 = load ptr, ptr @il3945_rates, align 8, !tbaa !10
%6 = zext nneg i32 %2 to i64
br label %7
7: ; preds = %4, %12
%8 = phi i64 [ 0, %4 ], [ %13, %12 ]
%9 = getelementptr inbounds %struct.TYPE_2__, ptr %5, i64 %8
%10 = load i64, ptr %9, align 8, !tbaa !12
%11 = icmp eq i64 %10, %0
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %6
br i1 %14, label %17, label %7, !llvm.loop !15
15: ; preds = %7
%16 = trunc nuw nsw i64 %8 to i32
br label %17
17: ; preds = %12, %15, %1
%18 = phi i32 [ -1, %1 ], [ %16, %15 ], [ -1, %12 ]
ret i32 %18
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_2__", !14, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| linux_drivers_net_wireless_intel_iwlegacy_extr_3945.c_il3945_hwrate_to_plcp_idx |
; ModuleID = 'freebsd_contrib_binutils_bfd_extr_netbsd-core.c_netbsd_core_file_failing_signal.so'
source_filename = "freebsd_contrib_binutils_bfd_extr_netbsd-core.c_netbsd_core_file_failing_signal.so"
define dso_local i32 @netbsd_core_file_failing_signal(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%1 = inttoptr i64 %memload to ptr
%memload1 = load i32, ptr %1, align 1
ret i32 %memload1
}
| ; ModuleID = 'AnghaBench/freebsd/contrib/binutils/bfd/extr_netbsd-core.c_netbsd_core_file_failing_signal.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/bfd/extr_netbsd-core.c_netbsd_core_file_failing_signal.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @netbsd_core_file_failing_signal], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @netbsd_core_file_failing_signal(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = load i32, ptr %2, align 4, !tbaa !12
ret i32 %3
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"TYPE_9__", !8, i64 0}
!8 = !{!"TYPE_8__", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!13, !15, i64 0}
!13 = !{!"TYPE_7__", !14, i64 0}
!14 = !{!"TYPE_6__", !15, i64 0}
!15 = !{!"int", !10, i64 0}
| freebsd_contrib_binutils_bfd_extr_netbsd-core.c_netbsd_core_file_failing_signal |
; ModuleID = 'freebsd_crypto_openssl_crypto_blake2_extr_m_blake2s.c_EVP_blake2s256.so'
source_filename = "freebsd_crypto_openssl_crypto_blake2_extr_m_blake2s.c_EVP_blake2s256.so"
@blake2s_md = dso_local global i32 0, align 4
define dso_local i64 @EVP_blake2s256() {
entry:
%0 = ptrtoint ptr @blake2s_md to i64
ret i64 %0
}
| ; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/blake2/extr_m_blake2s.c_EVP_blake2s256.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/blake2/extr_m_blake2s.c_EVP_blake2s256.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@blake2s_md = common global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef nonnull ptr @EVP_blake2s256() local_unnamed_addr #0 {
ret ptr @blake2s_md
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_crypto_openssl_crypto_blake2_extr_m_blake2s.c_EVP_blake2s256 |
; ModuleID = 'linux_sound_pci_hda_extr_hda_local.h_snd_hda_codec_proc_new.so'
source_filename = "linux_sound_pci_hda_extr_hda_local.h_snd_hda_codec_proc_new.so"
define dso_local i32 @snd_hda_codec_proc_new() {
entry:
ret i32 0
}
| ; ModuleID = 'AnghaBench/linux/sound/pci/hda/extr_hda_local.h_snd_hda_codec_proc_new.c'
source_filename = "AnghaBench/linux/sound/pci/hda/extr_hda_local.h_snd_hda_codec_proc_new.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @snd_hda_codec_proc_new], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @snd_hda_codec_proc_new(ptr nocapture readnone %0) #0 {
ret i32 0
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_sound_pci_hda_extr_hda_local.h_snd_hda_codec_proc_new |
; ModuleID = 'esp-idf_components_lwip_test_afl_host_extr_network_mock.c_pbuf_free.so'
source_filename = "esp-idf_components_lwip_test_afl_host_extr_network_mock.c_pbuf_free.so"
declare dso_local void @free(ptr)
define dso_local i32 @pbuf_free(i64 %arg1) {
entry:
%RSP_P.0 = alloca i64, align 1
%0 = and i64 %arg1, %arg1
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %0, 0
%1 = and i64 %0, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
store i64 3735928559, ptr %RSP_P.0, align 8
%4 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %4, align 1
%5 = and i64 %memload, %memload
%highbit1 = and i64 -9223372036854775808, %5
%SF2 = icmp ne i64 %highbit1, 0
%ZF3 = icmp eq i64 %5, 0
%6 = and i64 %5, 255
%7 = call i64 @llvm.ctpop.i64(i64 %6)
%8 = and i64 %7, 1
%PF4 = icmp eq i64 %8, 0
%CmpZF_JE5 = icmp eq i1 %ZF3, true
br i1 %CmpZF_JE5, label %bb.3, label %bb.2
bb.2: ; preds = %bb.1
%9 = inttoptr i64 %memload to ptr
call void @free(ptr %9)
br label %bb.3
bb.3: ; preds = %bb.2, %bb.1
%10 = inttoptr i64 %arg1 to ptr
call void @free(ptr %10)
br label %bb.4
bb.4: ; preds = %bb.3, %entry
ret i32 1
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/esp-idf/components/lwip/test_afl_host/extr_network_mock.c_pbuf_free.c'
source_filename = "AnghaBench/esp-idf/components/lwip/test_afl_host/extr_network_mock.c_pbuf_free.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @pbuf_free(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = icmp eq ptr %4, null
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @free(ptr noundef nonnull %4) #2
store ptr null, ptr %0, align 8, !tbaa !6
br label %8
8: ; preds = %6, %3
%9 = tail call i32 @free(ptr noundef nonnull %0) #2
br label %10
10: ; preds = %8, %1
ret i32 1
}
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"pbuf", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| esp-idf_components_lwip_test_afl_host_extr_network_mock.c_pbuf_free |
; ModuleID = 'linux_sound_usb_caiaq_extr_audio.c_all_substreams_zero.so'
source_filename = "linux_sound_usb_caiaq_extr_audio.c_all_substreams_zero.so"
@MAX_STREAMS = common dso_local global i32 0, align 4
define dso_local i32 @all_substreams_zero(i64 %arg1) {
entry:
%RDX-SKT-LOC = alloca i64, align 8
%memload = load i32, ptr @MAX_STREAMS, align 1
%0 = and i32 %memload, %memload
%highbit = and i32 -2147483648, %0
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %0, 0
%1 = and i32 %0, 255
%2 = call i32 @llvm.ctpop.i32(i32 %1)
%3 = and i32 %2, 1
%PF = icmp eq i32 %3, 0
%CmpZF_JLE = icmp eq i1 %ZF, true
%CmpOF_JLE = icmp ne i1 %SF, false
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
br i1 %ZFOrSF_JLE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%4 = zext i32 0 to i64
store i64 %4, ptr %RDX-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.3
%RDX = load i64, ptr %RDX-SKT-LOC, align 1
%memref-idxreg = mul i64 8, %RDX
%memref-basereg = add i64 %arg1, %memref-idxreg
%5 = inttoptr i64 %memref-basereg to ptr
%6 = load i64, ptr %5, align 1
%7 = sub i64 %6, 0
%8 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %6, i64 0)
%CF = extractvalue { i64, i1 } %8, 1
%ZF1 = icmp eq i64 %7, 0
%highbit2 = and i64 -9223372036854775808, %7
%SF3 = icmp ne i64 %highbit2, 0
%9 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %6, i64 0)
%OF = extractvalue { i64, i1 } %9, 1
%10 = and i64 %7, 255
%11 = call i64 @llvm.ctpop.i64(i64 %10)
%12 = and i64 %11, 1
%PF4 = icmp eq i64 %12, 0
%CmpZF_JNE = icmp eq i1 %ZF1, false
br i1 %CmpZF_JNE, label %bb.5, label %bb.3
bb.3: ; preds = %bb.2
%RDX9 = add i64 %RDX, 1
%13 = and i64 %RDX9, 255
%14 = call i64 @llvm.ctpop.i64(i64 %13)
%15 = and i64 %14, 1
%PF5 = icmp eq i64 %15, 0
%ZF6 = icmp eq i64 %RDX9, 0
%highbit7 = and i64 -9223372036854775808, %RDX9
%SF8 = icmp ne i64 %highbit7, 0
%16 = zext i32 %memload to i64
%17 = sub i64 %16, %RDX9
%18 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %16, i64 %RDX9)
%CF10 = extractvalue { i64, i1 } %18, 1
%ZF11 = icmp eq i64 %17, 0
%highbit12 = and i64 -9223372036854775808, %17
%SF13 = icmp ne i64 %highbit12, 0
%19 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %16, i64 %RDX9)
%OF14 = extractvalue { i64, i1 } %19, 1
%20 = and i64 %17, 255
%21 = call i64 @llvm.ctpop.i64(i64 %20)
%22 = and i64 %21, 1
%PF15 = icmp eq i64 %22, 0
%CmpZF_JNE16 = icmp eq i1 %ZF11, false
store i64 %RDX9, ptr %RDX-SKT-LOC, align 1
br i1 %CmpZF_JNE16, label %bb.2, label %bb.4
bb.5: ; preds = %bb.2
br label %UnifiedReturnBlock
bb.4: ; preds = %bb.3, %entry
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.4, %bb.5
%UnifiedRetVal = phi i32 [ 0, %bb.5 ], [ 1, %bb.4 ]
ret i32 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/sound/usb/caiaq/extr_audio.c_all_substreams_zero.c'
source_filename = "AnghaBench/linux/sound/usb/caiaq/extr_audio.c_all_substreams_zero.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MAX_STREAMS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @all_substreams_zero], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal range(i32 0, 2) i32 @all_substreams_zero(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr @MAX_STREAMS, align 4, !tbaa !6
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %14
4: ; preds = %1
%5 = zext nneg i32 %2 to i64
br label %9
6: ; preds = %9
%7 = add nuw nsw i64 %10, 1
%8 = icmp eq i64 %7, %5
br i1 %8, label %14, label %9, !llvm.loop !10
9: ; preds = %4, %6
%10 = phi i64 [ 0, %4 ], [ %7, %6 ]
%11 = getelementptr inbounds ptr, ptr %0, i64 %10
%12 = load ptr, ptr %11, align 8, !tbaa !12
%13 = icmp eq ptr %12, null
br i1 %13, label %6, label %14
14: ; preds = %9, %6, %1
%15 = phi i32 [ 1, %1 ], [ 1, %6 ], [ 0, %9 ]
ret i32 %15
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
| linux_sound_usb_caiaq_extr_audio.c_all_substreams_zero |
; ModuleID = 'freebsd_crypto_openssl_apps_extr_apps.c_set_table_opts.so'
source_filename = "freebsd_crypto_openssl_apps_extr_apps.c_set_table_opts.so"
declare dso_local i32 @strcasecmp(ptr, ptr)
define dso_local i32 @set_table_opts(i64 %arg1, i64 %arg2, i64 %arg3) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%0 = inttoptr i64 %arg2 to ptr
%memload = load i32, ptr %0, align 1
%1 = trunc i32 %memload to i8
%R12D = zext i8 %1 to i32
%memref-disp = add i32 %R12D, -43
%2 = trunc i32 %memref-disp to i8
%AL = and i8 %2, -3
%3 = call i8 @llvm.ctpop.i8(i8 %AL)
%4 = and i8 %3, 1
%PF = icmp eq i8 %4, 0
%ZF = icmp eq i8 %AL, 0
%highbit = and i8 -128, %AL
%SF = icmp ne i8 %highbit, 0
%5 = sub i8 %AL, 1
%6 = call { i8, i1 } @llvm.usub.with.overflow.i8(i8 %AL, i8 1)
%CF = extractvalue { i8, i1 } %6, 1
%ZF1 = icmp eq i8 %5, 0
%highbit2 = and i8 -128, %5
%SF3 = icmp ne i8 %highbit2, 0
%7 = call { i8, i1 } @llvm.ssub.with.overflow.i8(i8 %AL, i8 1)
%OF = extractvalue { i8, i1 } %7, 1
%8 = call i8 @llvm.ctpop.i8(i8 %5)
%9 = and i8 %8, 1
%PF4 = icmp eq i8 %9, 0
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i8, i1 } @llvm.usub.with.overflow.i8(i8, i8) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i8, i1 } @llvm.ssub.with.overflow.i8(i8, i8) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/crypto/openssl/apps/extr_apps.c_set_table_opts.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/apps/extr_apps.c_set_table_opts.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @set_table_opts], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @set_table_opts(ptr nocapture noundef %0, ptr noundef %1, ptr nocapture noundef readonly %2) #0 {
%4 = load i8, ptr %1, align 1, !tbaa !6
%5 = icmp eq i8 %4, 45
%6 = icmp eq i8 %4, 43
%7 = or i1 %5, %6
%8 = zext i1 %7 to i64
%9 = getelementptr inbounds i8, ptr %1, i64 %8
%10 = getelementptr inbounds i8, ptr %2, i64 16
%11 = load i64, ptr %10, align 8, !tbaa !9
%12 = icmp eq i64 %11, 0
br i1 %12, label %34, label %13
13: ; preds = %3, %29
%14 = phi i64 [ %32, %29 ], [ %11, %3 ]
%15 = phi ptr [ %30, %29 ], [ %2, %3 ]
%16 = tail call i64 @strcasecmp(ptr noundef nonnull %9, i64 noundef %14) #2
%17 = icmp eq i64 %16, 0
br i1 %17, label %18, label %29
18: ; preds = %13
%19 = load i64, ptr %15, align 8, !tbaa !12
%20 = xor i64 %19, -1
%21 = load i64, ptr %0, align 8, !tbaa !13
%22 = and i64 %21, %20
store i64 %22, ptr %0, align 8, !tbaa !13
%23 = getelementptr inbounds i8, ptr %15, i64 8
%24 = load i64, ptr %23, align 8, !tbaa !14
%25 = xor i64 %24, -1
%26 = and i64 %22, %25
%27 = or i64 %24, %22
%28 = select i1 %5, i64 %26, i64 %27
store i64 %28, ptr %0, align 8, !tbaa !13
br label %34
29: ; preds = %13
%30 = getelementptr inbounds i8, ptr %15, i64 24
%31 = getelementptr inbounds i8, ptr %15, i64 40
%32 = load i64, ptr %31, align 8, !tbaa !9
%33 = icmp eq i64 %32, 0
br i1 %33, label %34, label %13, !llvm.loop !15
34: ; preds = %29, %3, %18
%35 = phi i32 [ 1, %18 ], [ 0, %3 ], [ 0, %29 ]
ret i32 %35
}
declare i64 @strcasecmp(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 16}
!10 = !{!"TYPE_3__", !11, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"long", !7, i64 0}
!12 = !{!10, !11, i64 0}
!13 = !{!11, !11, i64 0}
!14 = !{!10, !11, i64 8}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| freebsd_crypto_openssl_apps_extr_apps.c_set_table_opts |
; ModuleID = 'TDengine_src_system_detail_src_extr_vnodeUtil.c_vnodeCreateFileHeader.so'
source_filename = "TDengine_src_system_detail_src_extr_vnodeUtil.c_vnodeCreateFileHeader.so"
@TSDB_FILE_HEADER_LEN = common dso_local global i32 0, align 4
@vnodeFileVersion = common dso_local global i32 0, align 4
@version = common dso_local global i64 0, align 8
@0 = private unnamed_addr constant [18 x i8] c"tsdb version: %s\0A\00", align 1, !ROData_SecInfo !0
@SEEK_SET = common dso_local global i32 0, align 4
declare dso_local ptr @memset(ptr, i32, i64)
declare dso_local i32 @sprintf(ptr, ptr, ...)
declare dso_local i32 @fseek(ptr, i64, i32)
declare dso_local i64 @fwrite(ptr, i64, i64, ptr)
define dso_local i64 @vnodeCreateFileHeader(i64 %arg1) {
entry:
%stktop_8 = alloca i8, i32 48, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 0
%RSP_P.0 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %RSP_P.0, align 8
%RBP = ptrtoint ptr %RSP_P.0 to i64
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%memload = load i32, ptr @TSDB_FILE_HEADER_LEN, align 1
%memref-disp = add i32 %memload, 3
%1 = and i32 %memload, %memload
%highbit = and i32 -2147483648, %1
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %1, 0
%2 = and i32 %1, 255
%3 = call i32 @llvm.ctpop.i32(i32 %2)
%4 = and i32 %3, 1
%PF = icmp eq i32 %4, 0
%Cond_CMOVNS = icmp eq i1 %SF, false
%CMOV = select i1 %Cond_CMOVNS, i32 %memload, i32 %memref-disp
%R15D = lshr i32 %CMOV, 2
%ZF1 = icmp eq i32 %R15D, 0
%highbit2 = and i32 -2147483648, %R15D
%SF3 = icmp ne i32 %highbit2, 0
%memref-disp4 = add i32 %R15D, 15
%RBX = zext i32 %memref-disp4 to i64
%RBX9 = and i64 %RBX, -16
%5 = and i64 %RBX9, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF5 = icmp eq i64 %7, 0
%ZF6 = icmp eq i64 %RBX9, 0
%highbit7 = and i64 -9223372036854775808, %RBX9
%SF8 = icmp ne i64 %highbit7, 0
%R13 = ptrtoint ptr %RSP_P.0 to i64
%R12 = sub i64 %R13, %RBX9
%8 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R13, i64 %RBX9)
%CF = extractvalue { i64, i1 } %8, 1
%ZF10 = icmp eq i64 %R12, 0
%highbit11 = and i64 -9223372036854775808, %R12
%SF12 = icmp ne i64 %highbit11, 0
%9 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R13, i64 %RBX9)
%OF = extractvalue { i64, i1 } %9, 1
%10 = and i64 %R12, 255
%11 = call i64 @llvm.ctpop.i64(i64 %10)
%12 = and i64 %11, 1
%PF13 = icmp eq i64 %12, 0
%CF14 = icmp ne i64 0, 0
%RBX19 = sub i64 0, %RBX9
%ZF15 = icmp eq i64 %RBX19, 0
%highbit16 = and i64 -9223372036854775808, %RBX19
%SF17 = icmp ne i64 %highbit16, 0
%13 = and i64 %RBX19, 255
%14 = call i64 @llvm.ctpop.i64(i64 %13)
%15 = and i64 %14, 1
%PF18 = icmp eq i64 %15, 0
%16 = inttoptr i64 %R12 to ptr
%17 = zext i32 %R15D to i64
%18 = call ptr @memset(ptr %16, i32 0, i64 %17)
%RAX = ptrtoint ptr %18 to i64
%memload20 = load i32, ptr @vnodeFileVersion, align 1
%19 = getelementptr i8, ptr %RSP_P.0, i64 %RBX19
store i32 %memload20, ptr %19, align 1
%memref-disp21 = add i64 %R12, 4
%memload22 = load i64, ptr @version, align 1
%20 = inttoptr i64 %memref-disp21 to ptr
%EAX = call i32 (ptr, ptr, ...) @sprintf(ptr %20, ptr @0, i64 %memload22)
%memload23 = load i32, ptr @SEEK_SET, align 1
%21 = inttoptr i64 %arg1 to ptr
%22 = zext i32 0 to i64
%EAX24 = call i32 @fseek(ptr %21, i64 %22, i32 %memload23)
%23 = inttoptr i64 %R12 to ptr
%24 = zext i32 %R15D to i64
%25 = zext i32 1 to i64
%26 = inttoptr i64 %arg1 to ptr
%RAX25 = call i64 @fwrite(ptr %23, i64 %24, i64 %25, ptr %26)
%27 = inttoptr i64 %R12 to ptr
%28 = zext i32 %R15D to i64
%29 = call ptr @memset(ptr %27, i32 0, i64 %28)
%RAX26 = ptrtoint ptr %29 to i64
%30 = inttoptr i64 %R12 to ptr
%31 = zext i32 %R15D to i64
%32 = zext i32 1 to i64
%33 = inttoptr i64 %arg1 to ptr
%RAX27 = call i64 @fwrite(ptr %30, i64 %31, i64 %32, ptr %33)
%34 = inttoptr i64 %R12 to ptr
%35 = zext i32 %R15D to i64
%36 = call ptr @memset(ptr %34, i32 0, i64 %35)
%RAX28 = ptrtoint ptr %36 to i64
%37 = inttoptr i64 %R12 to ptr
%38 = zext i32 %R15D to i64
%39 = zext i32 1 to i64
%40 = inttoptr i64 %arg1 to ptr
%RAX29 = call i64 @fwrite(ptr %37, i64 %38, i64 %39, ptr %40)
%41 = inttoptr i64 %R12 to ptr
%42 = zext i32 %R15D to i64
%43 = zext i32 1 to i64
%44 = inttoptr i64 %arg1 to ptr
%RAX30 = call i64 @fwrite(ptr %41, i64 %42, i64 %43, ptr %44)
%RSP = ptrtoint ptr %stktop_8 to i64
ret i64 %RAX30
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/TDengine/src/system/detail/src/extr_vnodeUtil.c_vnodeCreateFileHeader.c'
source_filename = "AnghaBench/TDengine/src/system/detail/src/extr_vnodeUtil.c_vnodeCreateFileHeader.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TSDB_FILE_HEADER_LEN = common local_unnamed_addr global i32 0, align 4
@vnodeFileVersion = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [18 x i8] c"tsdb version: %s\0A\00", align 1
@version = common local_unnamed_addr global ptr null, align 8
@SEEK_SET = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @vnodeCreateFileHeader(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @TSDB_FILE_HEADER_LEN, align 4, !tbaa !6
%3 = sdiv i32 %2, 4
%4 = zext i32 %3 to i64
%5 = alloca i8, i64 %4, align 4
%6 = call i32 @memset(ptr noundef nonnull %5, i32 noundef 0, i32 noundef %3) #3
%7 = load i32, ptr @vnodeFileVersion, align 4, !tbaa !6
store i32 %7, ptr %5, align 4, !tbaa !6
%8 = getelementptr inbounds i8, ptr %5, i64 4
%9 = load ptr, ptr @version, align 8, !tbaa !10
%10 = call i32 @sprintf(ptr noundef nonnull %8, ptr noundef nonnull @.str, ptr noundef %9) #3
%11 = load i32, ptr @SEEK_SET, align 4, !tbaa !6
%12 = call i32 @fseek(ptr noundef %0, i32 noundef 0, i32 noundef %11)
%13 = call i32 @fwrite(ptr noundef nonnull %5, i32 noundef %3, i32 noundef 1, ptr noundef %0) #3
%14 = call i32 @memset(ptr noundef nonnull %5, i32 noundef 0, i32 noundef %3) #3
%15 = call i32 @fwrite(ptr noundef nonnull %5, i32 noundef %3, i32 noundef 1, ptr noundef %0) #3
%16 = call i32 @memset(ptr noundef nonnull %5, i32 noundef 0, i32 noundef %3) #3
%17 = call i32 @fwrite(ptr noundef nonnull %5, i32 noundef %3, i32 noundef 1, ptr noundef %0) #3
%18 = call i32 @fwrite(ptr noundef nonnull %5, i32 noundef %3, i32 noundef 1, ptr noundef %0) #3
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @fseek(ptr nocapture noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @fwrite(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
| TDengine_src_system_detail_src_extr_vnodeUtil.c_vnodeCreateFileHeader |
; ModuleID = 'Provenance_Cores_Atari800_atari800-src_extr_mzpokeysnd.c_event3_p4_p5.so'
source_filename = "Provenance_Cores_Atari800_atari800-src_extr_mzpokeysnd.c_event3_p4_p5.so"
define dso_local i32 @event3_p4_p5(i64 %arg1, i32 %arg2, i32 %arg3) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%1 = load i32, ptr %0, align 1
%2 = zext i32 %1 to i64
%3 = zext i32 0 to i64
%4 = sub i64 %2, %3
%5 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %2, i64 %3)
%CF = extractvalue { i64, i1 } %5, 1
%ZF = icmp eq i64 %4, 0
%highbit = and i64 -9223372036854775808, %4
%SF = icmp ne i64 %highbit, 0
%6 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %2, i64 %3)
%OF = extractvalue { i64, i1 } %6, 1
%7 = and i64 %4, 255
%8 = call i64 @llvm.ctpop.i64(i64 %7)
%9 = and i64 %8, 1
%PF = icmp eq i64 %9, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%memref-disp = add i64 %arg1, 4
%10 = inttoptr i64 %memref-disp to ptr
store i32 %arg3, ptr %10, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %entry
%11 = inttoptr i64 %arg1 to ptr
store i32 %arg2, ptr %11, align 1
%memref-disp1 = add i64 %arg1, 8
%12 = inttoptr i64 %memref-disp1 to ptr
%memload = load i32, ptr %12, align 1
%memref-disp2 = add i64 %arg1, 12
%13 = inttoptr i64 %memref-disp2 to ptr
store i32 %memload, ptr %13, align 1
ret i32 %memload
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/Provenance/Cores/Atari800/atari800-src/extr_mzpokeysnd.c_event3_p4_p5.c'
source_filename = "AnghaBench/Provenance/Cores/Atari800/atari800-src/extr_mzpokeysnd.c_event3_p4_p5.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @event3_p4_p5], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync)
define internal void @event3_p4_p5(ptr nocapture noundef %0, i32 noundef %1, i32 noundef %2, i32 %3) #0 {
%5 = load i32, ptr %0, align 4, !tbaa !6
%6 = icmp eq i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = getelementptr inbounds i8, ptr %0, i64 4
store i32 %2, ptr %8, align 4, !tbaa !11
br label %9
9: ; preds = %7, %4
store i32 %1, ptr %0, align 4, !tbaa !6
%10 = getelementptr inbounds i8, ptr %0, i64 8
%11 = load i32, ptr %10, align 4, !tbaa !12
%12 = getelementptr inbounds i8, ptr %0, i64 12
store i32 %11, ptr %12, align 4, !tbaa !13
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = !{!7, !8, i64 8}
!13 = !{!7, !8, i64 12}
| Provenance_Cores_Atari800_atari800-src_extr_mzpokeysnd.c_event3_p4_p5 |
; ModuleID = 'SoftEtherVPN_src_Cedar_extr_Listener.c_CompareListener.so'
source_filename = "SoftEtherVPN_src_Cedar_extr_Listener.c_CompareListener.so"
define dso_local i32 @CompareListener(i64 %arg1, i64 %arg2) {
entry:
%EAX-SKT-LOC = alloca i32, align 4
%0 = and i64 %arg1, %arg1
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %0, 0
%1 = and i64 %0, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
store i32 0, ptr %EAX-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.8, label %bb.1
bb.1: ; preds = %entry
%4 = and i64 %arg2, %arg2
%highbit1 = and i64 -9223372036854775808, %4
%SF2 = icmp ne i64 %highbit1, 0
%ZF3 = icmp eq i64 %4, 0
%5 = and i64 %4, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF4 = icmp eq i64 %7, 0
%CmpZF_JE34 = icmp eq i1 %ZF3, true
br i1 %CmpZF_JE34, label %bb.8, label %bb.2
bb.2: ; preds = %bb.1
%8 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %8, align 1
%9 = and i64 %memload, %memload
%highbit5 = and i64 -9223372036854775808, %9
%SF6 = icmp ne i64 %highbit5, 0
%ZF7 = icmp eq i64 %9, 0
%10 = and i64 %9, 255
%11 = call i64 @llvm.ctpop.i64(i64 %10)
%12 = and i64 %11, 1
%PF8 = icmp eq i64 %12, 0
%CmpZF_JE35 = icmp eq i1 %ZF7, true
br i1 %CmpZF_JE35, label %bb.8, label %bb.3
bb.3: ; preds = %bb.2
%13 = inttoptr i64 %arg2 to ptr
%memload9 = load i64, ptr %13, align 1
%14 = and i64 %memload9, %memload9
%highbit10 = and i64 -9223372036854775808, %14
%SF11 = icmp ne i64 %highbit10, 0
%ZF12 = icmp eq i64 %14, 0
%15 = and i64 %14, 255
%16 = call i64 @llvm.ctpop.i64(i64 %15)
%17 = and i64 %16, 1
%PF13 = icmp eq i64 %17, 0
%CmpZF_JE36 = icmp eq i1 %ZF12, true
br i1 %CmpZF_JE36, label %bb.8, label %bb.4
bb.4: ; preds = %bb.3
%18 = inttoptr i64 %memload9 to ptr
%memload14 = load i64, ptr %18, align 1
%19 = inttoptr i64 %memload to ptr
%20 = load i64, ptr %19, align 1
%21 = sub i64 %20, %memload14
%22 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %20, i64 %memload14)
%CF = extractvalue { i64, i1 } %22, 1
%ZF15 = icmp eq i64 %21, 0
%highbit16 = and i64 -9223372036854775808, %21
%SF17 = icmp ne i64 %highbit16, 0
%23 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %20, i64 %memload14)
%OF = extractvalue { i64, i1 } %23, 1
%24 = and i64 %21, 255
%25 = call i64 @llvm.ctpop.i64(i64 %24)
%26 = and i64 %25, 1
%PF18 = icmp eq i64 %26, 0
store i32 1, ptr %EAX-SKT-LOC, align 1
%ZFCmp_JG = icmp eq i1 %ZF15, false
%SFOFCmp_JG = icmp eq i1 %SF17, %OF
%ZFAndSFOF_JG = and i1 %ZFCmp_JG, %SFOFCmp_JG
br i1 %ZFAndSFOF_JG, label %bb.8, label %bb.5
bb.5: ; preds = %bb.4
store i32 -1, ptr %EAX-SKT-LOC, align 1
%SFAndOF_JL = icmp ne i1 %SF17, %OF
br i1 %SFAndOF_JL, label %bb.8, label %bb.6
bb.6: ; preds = %bb.5
%memref-disp = add i64 %memload9, 8
%27 = inttoptr i64 %memref-disp to ptr
%memload19 = load i64, ptr %27, align 1
%memref-disp20 = add i64 %memload, 8
%28 = inttoptr i64 %memref-disp20 to ptr
%29 = load i64, ptr %28, align 1
%30 = sub i64 %29, %memload19
%31 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %29, i64 %memload19)
%CF21 = extractvalue { i64, i1 } %31, 1
%ZF22 = icmp eq i64 %30, 0
%highbit23 = and i64 -9223372036854775808, %30
%SF24 = icmp ne i64 %highbit23, 0
%32 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %29, i64 %memload19)
%OF25 = extractvalue { i64, i1 } %32, 1
%33 = and i64 %30, 255
%34 = call i64 @llvm.ctpop.i64(i64 %33)
%35 = and i64 %34, 1
%PF26 = icmp eq i64 %35, 0
store i32 1, ptr %EAX-SKT-LOC, align 1
%ZFCmp_JG37 = icmp eq i1 %ZF22, false
%SFOFCmp_JG38 = icmp eq i1 %SF24, %OF25
%ZFAndSFOF_JG39 = and i1 %ZFCmp_JG37, %SFOFCmp_JG38
br i1 %ZFAndSFOF_JG39, label %bb.8, label %bb.7
bb.7: ; preds = %bb.6
%AL = icmp ne i1 %SF24, %OF25
%36 = zext i1 %AL to i8
%EAX = zext i8 %36 to i32
%CF27 = icmp ne i32 0, 0
%EAX32 = sub i32 0, %EAX
%ZF28 = icmp eq i32 %EAX32, 0
%highbit29 = and i32 -2147483648, %EAX32
%SF30 = icmp ne i32 %highbit29, 0
%37 = and i32 %EAX32, 255
%38 = call i32 @llvm.ctpop.i32(i32 %37)
%39 = and i32 %38, 1
%PF31 = icmp eq i32 %39, 0
store i32 %EAX32, ptr %EAX-SKT-LOC, align 1
br label %bb.8
bb.8: ; preds = %bb.7, %bb.6, %bb.5, %bb.4, %bb.3, %bb.2, %bb.1, %entry
%EAX33 = load i32, ptr %EAX-SKT-LOC, align 1
ret i32 %EAX33
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Listener.c_CompareListener.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Listener.c_CompareListener.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define range(i32 -1, 2) i32 @CompareListener(ptr noundef readonly %0, ptr noundef readonly %1) local_unnamed_addr #0 {
%3 = icmp eq ptr %0, null
%4 = icmp eq ptr %1, null
%5 = or i1 %3, %4
br i1 %5, label %27, label %6
6: ; preds = %2
%7 = load ptr, ptr %0, align 8, !tbaa !6
%8 = load ptr, ptr %1, align 8, !tbaa !6
%9 = icmp eq ptr %7, null
%10 = icmp eq ptr %8, null
%11 = select i1 %9, i1 true, i1 %10
br i1 %11, label %27, label %12
12: ; preds = %6
%13 = load i64, ptr %7, align 8, !tbaa !10
%14 = load i64, ptr %8, align 8, !tbaa !10
%15 = icmp sgt i64 %13, %14
br i1 %15, label %27, label %16
16: ; preds = %12
%17 = icmp slt i64 %13, %14
br i1 %17, label %27, label %18
18: ; preds = %16
%19 = getelementptr inbounds i8, ptr %7, i64 8
%20 = load i64, ptr %19, align 8, !tbaa !13
%21 = getelementptr inbounds i8, ptr %8, i64 8
%22 = load i64, ptr %21, align 8, !tbaa !13
%23 = icmp sgt i64 %20, %22
br i1 %23, label %27, label %24
24: ; preds = %18
%25 = icmp slt i64 %20, %22
%26 = sext i1 %25 to i32
br label %27
27: ; preds = %24, %18, %16, %12, %6, %2
%28 = phi i32 [ 0, %2 ], [ 0, %6 ], [ 1, %12 ], [ -1, %16 ], [ 1, %18 ], [ %26, %24 ]
ret i32 %28
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0, !12, i64 8}
!12 = !{!"long", !8, i64 0}
!13 = !{!11, !12, i64 8}
| SoftEtherVPN_src_Cedar_extr_Listener.c_CompareListener |
; ModuleID = 'linux_fs_proc_extr_proc_net.c_proc_net_d_revalidate.so'
source_filename = "linux_fs_proc_extr_proc_net.c_proc_net_d_revalidate.so"
define dso_local i32 @proc_net_d_revalidate() {
entry:
ret i32 0
}
| ; ModuleID = 'AnghaBench/linux/fs/proc/extr_proc_net.c_proc_net_d_revalidate.c'
source_filename = "AnghaBench/linux/fs/proc/extr_proc_net.c_proc_net_d_revalidate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @proc_net_d_revalidate], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @proc_net_d_revalidate(ptr nocapture readnone %0, i32 %1) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_fs_proc_extr_proc_net.c_proc_net_d_revalidate |
; ModuleID = 'freebsd_contrib_libevent_extr_evrpc.c_evrpc_get_request.so'
source_filename = "freebsd_contrib_libevent_extr_evrpc.c_evrpc_get_request.so"
define dso_local i64 @evrpc_get_request(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
ret i64 %memload
}
| ; ModuleID = 'AnghaBench/freebsd/contrib/libevent/extr_evrpc.c_evrpc_get_request.c'
source_filename = "AnghaBench/freebsd/contrib/libevent/extr_evrpc.c_evrpc_get_request.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define ptr @evrpc_get_request(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"evrpc_req_generic", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_libevent_extr_evrpc.c_evrpc_get_request |
; ModuleID = 'radare2_shlr_grub_kern_extr_misc.c_grub_memmove.so'
source_filename = "radare2_shlr_grub_kern_extr_misc.c_grub_memmove.so"
define dso_local i64 @grub_memmove(i64 %arg1, i64 %arg2, i64 %arg3) {
entry:
%RDI-SKT-LOC701 = alloca i64, align 8
%RSI-SKT-LOC695 = alloca i64, align 8
%RCX-SKT-LOC693 = alloca i64, align 8
%EDX-SKT-LOC685 = alloca i64, align 8
%ECX-SKT-LOC = alloca i64, align 8
%RDI-SKT-LOC652 = alloca i64, align 8
%RSI-SKT-LOC643 = alloca i64, align 8
%RDX-SKT-LOC634 = alloca i64, align 8
%R9-SKT-LOC = alloca i64, align 8
%R11-SKT-LOC615 = alloca i64, align 8
%RCX-SKT-LOC568 = alloca i64, align 8
%RCX-SKT-LOC546 = alloca i64, align 8
%RBX-SKT-LOC487 = alloca i64, align 8
%RDI-SKT-LOC457 = alloca i64, align 8
%RBX-SKT-LOC438 = alloca i64, align 8
%RDI-SKT-LOC411 = alloca i64, align 8
%R11-SKT-LOC276 = alloca i64, align 8
%RDI-SKT-LOC271 = alloca i64, align 8
%RSI-SKT-LOC = alloca i64, align 8
%EDX-SKT-LOC = alloca i64, align 8
%R11-SKT-LOC = alloca i64, align 8
%RDI-SKT-LOC231 = alloca i64, align 8
%RBX-SKT-LOC229 = alloca i64, align 8
%RDX-SKT-LOC = alloca i64, align 8
%R10-SKT-LOC = alloca i64, align 8
%RCX-SKT-LOC = alloca i64, align 8
%RBX-SKT-LOC108 = alloca i64, align 8
%RDI-SKT-LOC = alloca i64, align 8
%RBX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%RCX = sub i64 %arg1, %arg2
%0 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %arg1, i64 %arg2)
%CF = extractvalue { i64, i1 } %0, 1
%ZF = icmp eq i64 %RCX, 0
%highbit = and i64 -9223372036854775808, %RCX
%SF = icmp ne i64 %highbit, 0
%1 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %arg1, i64 %arg2)
%OF = extractvalue { i64, i1 } %1, 1
%2 = and i64 %RCX, 255
%3 = call i64 @llvm.ctpop.i64(i64 %2)
%4 = and i64 %3, 1
%PF = icmp eq i64 %4, 0
store i64 %arg3, ptr %RDX-SKT-LOC, align 1
store i64 %arg3, ptr %RDX-SKT-LOC634, align 1
%CFCmp_JAE = icmp eq i1 %CF, false
br i1 %CFCmp_JAE, label %bb.6, label %bb.1
bb.1: ; preds = %entry
%5 = trunc i64 %arg3 to i32
%6 = trunc i64 %arg3 to i32
%7 = and i32 %5, %6
%highbit1 = and i32 -2147483648, %7
%SF2 = icmp ne i32 %highbit1, 0
%ZF3 = icmp eq i32 %7, 0
%8 = and i32 %7, 255
%9 = call i32 @llvm.ctpop.i32(i32 %8)
%10 = and i32 %9, 1
%PF4 = icmp eq i32 %10, 0
%CmpZF_JE = icmp eq i1 %ZF3, true
br i1 %CmpZF_JE, label %bb.56, label %bb.2
bb.2: ; preds = %bb.1
%memref-disp = add i64 %arg3, -1
%EDI = trunc i64 %memref-disp to i32
%11 = sub i32 %EDI, 7
%12 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EDI, i32 7)
%CF5 = extractvalue { i32, i1 } %12, 1
%ZF6 = icmp eq i32 %11, 0
%highbit7 = and i32 -2147483648, %11
%SF8 = icmp ne i32 %highbit7, 0
%13 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EDI, i32 7)
%OF9 = extractvalue { i32, i1 } %13, 1
%14 = and i32 %11, 255
%15 = call i32 @llvm.ctpop.i32(i32 %14)
%16 = and i32 %15, 1
%PF10 = icmp eq i32 %16, 0
%CmpCF_JB = icmp eq i1 %CF5, true
br i1 %CmpCF_JB, label %bb.18, label %bb.3
bb.3: ; preds = %bb.2
%17 = sub i64 %RCX, 32
%18 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RCX, i64 32)
%CF11 = extractvalue { i64, i1 } %18, 1
%ZF12 = icmp eq i64 %17, 0
%highbit13 = and i64 -9223372036854775808, %17
%SF14 = icmp ne i64 %highbit13, 0
%19 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RCX, i64 32)
%OF15 = extractvalue { i64, i1 } %19, 1
%20 = and i64 %17, 255
%21 = call i64 @llvm.ctpop.i64(i64 %20)
%22 = and i64 %21, 1
%PF16 = icmp eq i64 %22, 0
%CmpCF_JB760 = icmp eq i1 %CF11, true
br i1 %CmpCF_JB760, label %bb.18, label %bb.4
bb.4: ; preds = %bb.3
%memref-disp17 = add i32 %EDI, 1
%R8 = zext i32 %memref-disp17 to i64
%23 = sub i32 %EDI, 31
%24 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EDI, i32 31)
%CF18 = extractvalue { i32, i1 } %24, 1
%ZF19 = icmp eq i32 %23, 0
%highbit20 = and i32 -2147483648, %23
%SF21 = icmp ne i32 %highbit20, 0
%25 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EDI, i32 31)
%OF22 = extractvalue { i32, i1 } %25, 1
%26 = and i32 %23, 255
%27 = call i32 @llvm.ctpop.i32(i32 %26)
%28 = and i32 %27, 1
%PF23 = icmp eq i32 %28, 0
%CFCmp_JAE761 = icmp eq i1 %CF18, false
br i1 %CFCmp_JAE761, label %bb.19, label %bb.5
bb.5: ; preds = %bb.4
%29 = zext i32 0 to i64
store i64 %29, ptr %R10-SKT-LOC, align 1
br label %bb.30
bb.19: ; preds = %bb.4
%R10 = and i64 %R8, 8589934560
%highbit24 = and i64 -9223372036854775808, %R10
%SF25 = icmp ne i64 %highbit24, 0
%ZF26 = icmp eq i64 %R10, 0
%30 = and i64 %R10, 255
%31 = call i64 @llvm.ctpop.i64(i64 %30)
%32 = and i64 %31, 1
%PF27 = icmp eq i64 %32, 0
%memref-disp28 = add i64 %R10, -32
%RDI = lshr i64 %memref-disp28, 5
%ZF29 = icmp eq i64 %RDI, 0
%highbit30 = and i64 -9223372036854775808, %RDI
%SF31 = icmp ne i64 %highbit30, 0
%RDI36 = add i64 %RDI, 1
%33 = and i64 %RDI36, 255
%34 = call i64 @llvm.ctpop.i64(i64 %33)
%35 = and i64 %34, 1
%PF32 = icmp eq i64 %35, 0
%ZF33 = icmp eq i64 %RDI36, 0
%highbit34 = and i64 -9223372036854775808, %RDI36
%SF35 = icmp ne i64 %highbit34, 0
%R11D = trunc i64 %RDI36 to i32
%R11D41 = and i32 %R11D, 3
%36 = and i32 %R11D41, 255
%37 = call i32 @llvm.ctpop.i32(i32 %36)
%38 = and i32 %37, 1
%PF37 = icmp eq i32 %38, 0
%ZF38 = icmp eq i32 %R11D41, 0
%highbit39 = and i32 -2147483648, %R11D41
%SF40 = icmp ne i32 %highbit39, 0
%39 = sub i64 %memref-disp28, 96
%40 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memref-disp28, i64 96)
%CF42 = extractvalue { i64, i1 } %40, 1
%ZF43 = icmp eq i64 %39, 0
%highbit44 = and i64 -9223372036854775808, %39
%SF45 = icmp ne i64 %highbit44, 0
%41 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memref-disp28, i64 96)
%OF46 = extractvalue { i64, i1 } %41, 1
%42 = and i64 %39, 255
%43 = call i64 @llvm.ctpop.i64(i64 %42)
%44 = and i64 %43, 1
%PF47 = icmp eq i64 %44, 0
store i64 %R10, ptr %R10-SKT-LOC, align 1
%CFCmp_JAE762 = icmp eq i1 %CF42, false
br i1 %CFCmp_JAE762, label %bb.23, label %bb.20
bb.20: ; preds = %bb.19
%45 = zext i32 0 to i64
store i64 %45, ptr %RBX-SKT-LOC108, align 1
br label %bb.25
bb.23: ; preds = %bb.19
%RDI52 = and i64 %RDI36, -4
%46 = and i64 %RDI52, 255
%47 = call i64 @llvm.ctpop.i64(i64 %46)
%48 = and i64 %47, 1
%PF48 = icmp eq i64 %48, 0
%ZF49 = icmp eq i64 %RDI52, 0
%highbit50 = and i64 -9223372036854775808, %RDI52
%SF51 = icmp ne i64 %highbit50, 0
%49 = zext i32 0 to i64
store i64 %49, ptr %RBX-SKT-LOC, align 1
store i64 %RDI52, ptr %RDI-SKT-LOC, align 1
br label %bb.24
bb.24: ; preds = %bb.23, %bb.24
%RBX = load i64, ptr %RBX-SKT-LOC, align 1
%memref-basereg = add i64 %arg2, %RBX
%50 = inttoptr i64 %memref-basereg to ptr
%memload = load <4 x float>, ptr %50, align 1
%memref-basereg53 = add i64 %arg2, %RBX
%memref-disp54 = add i64 %memref-basereg53, 16
%51 = inttoptr i64 %memref-disp54 to ptr
%memload55 = load <4 x float>, ptr %51, align 1
%memref-basereg56 = add i64 %arg1, %RBX
%52 = inttoptr i64 %memref-basereg56 to ptr
store <4 x float> %memload, ptr %52, align 1
%memref-basereg57 = add i64 %arg1, %RBX
%memref-disp58 = add i64 %memref-basereg57, 16
%53 = inttoptr i64 %memref-disp58 to ptr
store <4 x float> %memload55, ptr %53, align 1
%memref-basereg59 = add i64 %arg2, %RBX
%memref-disp60 = add i64 %memref-basereg59, 32
%54 = inttoptr i64 %memref-disp60 to ptr
%memload61 = load <4 x float>, ptr %54, align 1
%memref-basereg62 = add i64 %arg2, %RBX
%memref-disp63 = add i64 %memref-basereg62, 48
%55 = inttoptr i64 %memref-disp63 to ptr
%memload64 = load <4 x float>, ptr %55, align 1
%memref-basereg65 = add i64 %arg1, %RBX
%memref-disp66 = add i64 %memref-basereg65, 32
%56 = inttoptr i64 %memref-disp66 to ptr
store <4 x float> %memload61, ptr %56, align 1
%memref-basereg67 = add i64 %arg1, %RBX
%memref-disp68 = add i64 %memref-basereg67, 48
%57 = inttoptr i64 %memref-disp68 to ptr
store <4 x float> %memload64, ptr %57, align 1
%memref-basereg69 = add i64 %arg2, %RBX
%memref-disp70 = add i64 %memref-basereg69, 64
%58 = inttoptr i64 %memref-disp70 to ptr
%memload71 = load <4 x float>, ptr %58, align 1
%memref-basereg72 = add i64 %arg2, %RBX
%memref-disp73 = add i64 %memref-basereg72, 80
%59 = inttoptr i64 %memref-disp73 to ptr
%memload74 = load <4 x float>, ptr %59, align 1
%memref-basereg75 = add i64 %arg1, %RBX
%memref-disp76 = add i64 %memref-basereg75, 64
%60 = inttoptr i64 %memref-disp76 to ptr
store <4 x float> %memload71, ptr %60, align 1
%memref-basereg77 = add i64 %arg1, %RBX
%memref-disp78 = add i64 %memref-basereg77, 80
%61 = inttoptr i64 %memref-disp78 to ptr
store <4 x float> %memload74, ptr %61, align 1
%memref-basereg79 = add i64 %arg2, %RBX
%memref-disp80 = add i64 %memref-basereg79, 96
%62 = inttoptr i64 %memref-disp80 to ptr
%memload81 = load <4 x float>, ptr %62, align 1
%memref-basereg82 = add i64 %arg2, %RBX
%memref-disp83 = add i64 %memref-basereg82, 112
%63 = inttoptr i64 %memref-disp83 to ptr
%memload84 = load <4 x float>, ptr %63, align 1
%memref-basereg85 = add i64 %arg1, %RBX
%memref-disp86 = add i64 %memref-basereg85, 96
%64 = inttoptr i64 %memref-disp86 to ptr
store <4 x float> %memload81, ptr %64, align 1
%memref-basereg87 = add i64 %arg1, %RBX
%memref-disp88 = add i64 %memref-basereg87, 112
%65 = inttoptr i64 %memref-disp88 to ptr
store <4 x float> %memload84, ptr %65, align 1
%RBX95 = sub i64 %RBX, -128
%66 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RBX, i64 -128)
%CF89 = extractvalue { i64, i1 } %66, 1
%67 = and i64 %RBX95, 255
%68 = call i64 @llvm.ctpop.i64(i64 %67)
%69 = and i64 %68, 1
%PF90 = icmp eq i64 %69, 0
%ZF91 = icmp eq i64 %RBX95, 0
%highbit92 = and i64 -9223372036854775808, %RBX95
%SF93 = icmp ne i64 %highbit92, 0
%70 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RBX, i64 -128)
%OF94 = extractvalue { i64, i1 } %70, 1
%RDI96 = load i64, ptr %RDI-SKT-LOC, align 1
%RDI103 = add i64 %RDI96, -4
%71 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RDI96, i64 -4)
%CF97 = extractvalue { i64, i1 } %71, 1
%72 = and i64 %RDI103, 255
%73 = call i64 @llvm.ctpop.i64(i64 %72)
%74 = and i64 %73, 1
%PF98 = icmp eq i64 %74, 0
%ZF99 = icmp eq i64 %RDI103, 0
%highbit100 = and i64 -9223372036854775808, %RDI103
%SF101 = icmp ne i64 %highbit100, 0
%75 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RDI96, i64 -4)
%OF102 = extractvalue { i64, i1 } %75, 1
store i64 %RBX95, ptr %RBX-SKT-LOC108, align 1
%CmpZF_JNE = icmp eq i1 %ZF99, false
store i64 %RBX95, ptr %RBX-SKT-LOC, align 1
store i64 %RDI103, ptr %RDI-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.24, label %bb.25
bb.25: ; preds = %bb.24, %bb.20
%76 = zext i32 %R11D41 to i64
%77 = zext i32 %R11D41 to i64
%78 = and i64 %76, %77
%highbit104 = and i64 -9223372036854775808, %78
%SF105 = icmp ne i64 %highbit104, 0
%ZF106 = icmp eq i64 %78, 0
%79 = and i64 %78, 255
%80 = call i64 @llvm.ctpop.i64(i64 %79)
%81 = and i64 %80, 1
%PF107 = icmp eq i64 %81, 0
%CmpZF_JE763 = icmp eq i1 %ZF106, true
br i1 %CmpZF_JE763, label %bb.28, label %bb.26
bb.26: ; preds = %bb.25
%RBX109 = load i64, ptr %RBX-SKT-LOC108, align 1
%memref-basereg110 = add i64 %arg1, %RBX109
%RDI117 = add i64 %memref-basereg110, 16
%82 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %memref-basereg110, i64 16)
%CF111 = extractvalue { i64, i1 } %82, 1
%83 = and i64 %RDI117, 255
%84 = call i64 @llvm.ctpop.i64(i64 %83)
%85 = and i64 %84, 1
%PF112 = icmp eq i64 %85, 0
%ZF113 = icmp eq i64 %RDI117, 0
%highbit114 = and i64 -9223372036854775808, %RDI117
%SF115 = icmp ne i64 %highbit114, 0
%86 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %memref-basereg110, i64 16)
%OF116 = extractvalue { i64, i1 } %86, 1
%RBX121 = add nsw i64 %RBX109, %arg2
%highbit118 = and i64 -9223372036854775808, %RBX121
%SF119 = icmp ne i64 %highbit118, 0
%ZF120 = icmp eq i64 %RBX121, 0
%RBX128 = add i64 %RBX121, 16
%87 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RBX121, i64 16)
%CF122 = extractvalue { i64, i1 } %87, 1
%88 = and i64 %RBX128, 255
%89 = call i64 @llvm.ctpop.i64(i64 %88)
%90 = and i64 %89, 1
%PF123 = icmp eq i64 %90, 0
%ZF124 = icmp eq i64 %RBX128, 0
%highbit125 = and i64 -9223372036854775808, %RBX128
%SF126 = icmp ne i64 %highbit125, 0
%91 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RBX121, i64 16)
%OF127 = extractvalue { i64, i1 } %91, 1
%92 = zext i32 %R11D41 to i64
%R11 = shl i64 %92, 5
%ZF129 = icmp eq i64 %R11, 0
%highbit130 = and i64 -9223372036854775808, %R11
%SF131 = icmp ne i64 %highbit130, 0
%93 = zext i32 0 to i64
store i64 %93, ptr %RCX-SKT-LOC, align 1
br label %bb.27
bb.27: ; preds = %bb.26, %bb.27
%RCX132 = load i64, ptr %RCX-SKT-LOC, align 1
%memref-basereg133 = add i64 %RBX128, %RCX132
%memref-disp134 = add i64 %memref-basereg133, -16
%94 = inttoptr i64 %memref-disp134 to ptr
%memload135 = load <4 x float>, ptr %94, align 1
%memref-basereg136 = add i64 %RBX128, %RCX132
%95 = inttoptr i64 %memref-basereg136 to ptr
%memload137 = load <4 x float>, ptr %95, align 1
%memref-basereg138 = add i64 %RDI117, %RCX132
%memref-disp139 = add i64 %memref-basereg138, -16
%96 = inttoptr i64 %memref-disp139 to ptr
store <4 x float> %memload135, ptr %96, align 1
%memref-basereg140 = add i64 %RDI117, %RCX132
%97 = inttoptr i64 %memref-basereg140 to ptr
store <4 x float> %memload137, ptr %97, align 1
%RCX147 = add i64 %RCX132, 32
%98 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RCX132, i64 32)
%CF141 = extractvalue { i64, i1 } %98, 1
%99 = and i64 %RCX147, 255
%100 = call i64 @llvm.ctpop.i64(i64 %99)
%101 = and i64 %100, 1
%PF142 = icmp eq i64 %101, 0
%ZF143 = icmp eq i64 %RCX147, 0
%highbit144 = and i64 -9223372036854775808, %RCX147
%SF145 = icmp ne i64 %highbit144, 0
%102 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RCX132, i64 32)
%OF146 = extractvalue { i64, i1 } %102, 1
%103 = sub i64 %R11, %RCX147
%104 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R11, i64 %RCX147)
%CF148 = extractvalue { i64, i1 } %104, 1
%ZF149 = icmp eq i64 %103, 0
%highbit150 = and i64 -9223372036854775808, %103
%SF151 = icmp ne i64 %highbit150, 0
%105 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R11, i64 %RCX147)
%OF152 = extractvalue { i64, i1 } %105, 1
%106 = and i64 %103, 255
%107 = call i64 @llvm.ctpop.i64(i64 %106)
%108 = and i64 %107, 1
%PF153 = icmp eq i64 %108, 0
%CmpZF_JNE764 = icmp eq i1 %ZF149, false
store i64 %RCX147, ptr %RCX-SKT-LOC, align 1
br i1 %CmpZF_JNE764, label %bb.27, label %bb.28
bb.28: ; preds = %bb.27, %bb.25
%ld-stk-prom184 = load i64, ptr %R10-SKT-LOC, align 8
%109 = sub i64 %R8, %ld-stk-prom184
%ld-stk-prom183 = load i64, ptr %R10-SKT-LOC, align 8
%110 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R8, i64 %ld-stk-prom183)
%CF154 = extractvalue { i64, i1 } %110, 1
%ZF155 = icmp eq i64 %109, 0
%highbit156 = and i64 -9223372036854775808, %109
%SF157 = icmp ne i64 %highbit156, 0
%ld-stk-prom = load i64, ptr %R10-SKT-LOC, align 8
%111 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R8, i64 %ld-stk-prom)
%OF158 = extractvalue { i64, i1 } %111, 1
%112 = and i64 %109, 255
%113 = call i64 @llvm.ctpop.i64(i64 %112)
%114 = and i64 %113, 1
%PF159 = icmp eq i64 %114, 0
%CmpZF_JE765 = icmp eq i1 %ZF155, true
br i1 %CmpZF_JE765, label %bb.56, label %bb.29
bb.29: ; preds = %bb.28
%115 = trunc i64 %R8 to i8
%116 = and i8 %115, 24
%117 = call i8 @llvm.ctpop.i8(i8 %116)
%118 = and i8 %117, 1
%PF160 = icmp eq i8 %118, 0
%ZF161 = icmp eq i8 %116, 0
%highbit162 = and i8 -128, %116
%SF163 = icmp ne i8 %highbit162, 0
%CmpZF_JE766 = icmp eq i1 %ZF161, true
br i1 %CmpZF_JE766, label %bb.48, label %bb.30
bb.30: ; preds = %bb.29, %bb.5
%R9 = add i64 8589934560, 24
%119 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 8589934560, i64 24)
%CF164 = extractvalue { i64, i1 } %119, 1
%120 = and i64 %R9, 255
%121 = call i64 @llvm.ctpop.i64(i64 %120)
%122 = and i64 %121, 1
%PF165 = icmp eq i64 %122, 0
%ZF166 = icmp eq i64 %R9, 0
%highbit167 = and i64 -9223372036854775808, %R9
%SF168 = icmp ne i64 %highbit167, 0
%123 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 8589934560, i64 24)
%OF169 = extractvalue { i64, i1 } %123, 1
%R9174 = and i64 %R9, %R8
%highbit170 = and i64 -9223372036854775808, %R9174
%SF171 = icmp ne i64 %highbit170, 0
%ZF172 = icmp eq i64 %R9174, 0
%124 = and i64 %R9174, 255
%125 = call i64 @llvm.ctpop.i64(i64 %124)
%126 = and i64 %125, 1
%PF173 = icmp eq i64 %126, 0
%memref-basereg175 = add i64 %arg2, %R9174
%memref-basereg176 = add i64 %arg1, %R9174
%127 = trunc i64 %arg3 to i32
%128 = trunc i64 %R9174 to i32
%EDX = sub i32 %127, %128
%129 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %127, i32 %128)
%CF177 = extractvalue { i32, i1 } %129, 1
%ZF178 = icmp eq i32 %EDX, 0
%highbit179 = and i32 -2147483648, %EDX
%SF180 = icmp ne i32 %highbit179, 0
%130 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %127, i32 %128)
%OF181 = extractvalue { i32, i1 } %130, 1
%131 = and i32 %EDX, 255
%132 = call i32 @llvm.ctpop.i32(i32 %131)
%133 = and i32 %132, 1
%PF182 = icmp eq i32 %133, 0
%134 = zext i32 %EDX to i64
store i64 %134, ptr %RDX-SKT-LOC, align 1
store i64 %memref-basereg175, ptr %RDI-SKT-LOC231, align 1
store i64 %memref-basereg176, ptr %R11-SKT-LOC, align 1
store i64 %memref-basereg175, ptr %RDI-SKT-LOC271, align 1
store i64 %memref-basereg176, ptr %R11-SKT-LOC276, align 1
br label %bb.31
bb.31: ; preds = %bb.30, %bb.31
%R10185 = load i64, ptr %R10-SKT-LOC, align 1
%memref-basereg186 = add i64 %arg2, %R10185
%135 = inttoptr i64 %memref-basereg186 to ptr
%memload187 = load i64, ptr %135, align 1
%memref-basereg188 = add i64 %arg1, %R10185
%136 = inttoptr i64 %memref-basereg188 to ptr
store i64 %memload187, ptr %136, align 1
%R10195 = add i64 %R10185, 8
%137 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %R10185, i64 8)
%CF189 = extractvalue { i64, i1 } %137, 1
%138 = and i64 %R10195, 255
%139 = call i64 @llvm.ctpop.i64(i64 %138)
%140 = and i64 %139, 1
%PF190 = icmp eq i64 %140, 0
%ZF191 = icmp eq i64 %R10195, 0
%highbit192 = and i64 -9223372036854775808, %R10195
%SF193 = icmp ne i64 %highbit192, 0
%141 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %R10185, i64 8)
%OF194 = extractvalue { i64, i1 } %141, 1
%142 = sub i64 %R9174, %R10195
%143 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R9174, i64 %R10195)
%CF196 = extractvalue { i64, i1 } %143, 1
%ZF197 = icmp eq i64 %142, 0
%highbit198 = and i64 -9223372036854775808, %142
%SF199 = icmp ne i64 %highbit198, 0
%144 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R9174, i64 %R10195)
%OF200 = extractvalue { i64, i1 } %144, 1
%145 = and i64 %142, 255
%146 = call i64 @llvm.ctpop.i64(i64 %145)
%147 = and i64 %146, 1
%PF201 = icmp eq i64 %147, 0
%CmpZF_JNE767 = icmp eq i1 %ZF197, false
store i64 %R10195, ptr %R10-SKT-LOC, align 1
br i1 %CmpZF_JNE767, label %bb.31, label %bb.32
bb.32: ; preds = %bb.31
%148 = sub i64 %R8, %R9174
%149 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R8, i64 %R9174)
%CF202 = extractvalue { i64, i1 } %149, 1
%ZF203 = icmp eq i64 %148, 0
%highbit204 = and i64 -9223372036854775808, %148
%SF205 = icmp ne i64 %highbit204, 0
%150 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R8, i64 %R9174)
%OF206 = extractvalue { i64, i1 } %150, 1
%151 = and i64 %148, 255
%152 = call i64 @llvm.ctpop.i64(i64 %151)
%153 = and i64 %152, 1
%PF207 = icmp eq i64 %153, 0
%CmpZF_JNE768 = icmp eq i1 %ZF203, false
br i1 %CmpZF_JNE768, label %bb.49, label %bb.33
bb.33: ; preds = %bb.32
br label %bb.56
bb.48: ; preds = %bb.29
%154 = trunc i64 %arg3 to i32
%155 = trunc i64 %R10 to i32
%EDX208 = sub i32 %154, %155
%156 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %154, i32 %155)
%CF209 = extractvalue { i32, i1 } %156, 1
%ZF210 = icmp eq i32 %EDX208, 0
%highbit211 = and i32 -2147483648, %EDX208
%SF212 = icmp ne i32 %highbit211, 0
%157 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %154, i32 %155)
%OF213 = extractvalue { i32, i1 } %157, 1
%158 = and i32 %EDX208, 255
%159 = call i32 @llvm.ctpop.i32(i32 %158)
%160 = and i32 %159, 1
%PF214 = icmp eq i32 %160, 0
%memref-basereg215 = add i64 %arg1, %R10
%RSI = add nsw i64 %arg2, %R10
%highbit216 = and i64 -9223372036854775808, %RSI
%SF217 = icmp ne i64 %highbit216, 0
%ZF218 = icmp eq i64 %RSI, 0
%161 = zext i32 %EDX208 to i64
store i64 %161, ptr %RDX-SKT-LOC, align 1
store i64 %RSI, ptr %RDI-SKT-LOC231, align 1
store i64 %memref-basereg215, ptr %R11-SKT-LOC, align 1
store i64 %RSI, ptr %RDI-SKT-LOC271, align 1
store i64 %memref-basereg215, ptr %R11-SKT-LOC276, align 1
br label %bb.49
bb.18: ; preds = %bb.3, %bb.2
store i64 %arg2, ptr %RDI-SKT-LOC231, align 1
store i64 %arg1, ptr %R11-SKT-LOC, align 1
store i64 %arg2, ptr %RDI-SKT-LOC271, align 1
store i64 %arg1, ptr %R11-SKT-LOC276, align 1
br label %bb.49
bb.49: ; preds = %bb.48, %bb.18, %bb.32
%RDX = load i64, ptr %RDX-SKT-LOC, align 1
%memref-disp219 = add i64 %RDX, -1
%R8D = trunc i64 %memref-disp219 to i32
%162 = trunc i64 %RDX to i8
%163 = and i8 %162, 7
%164 = call i8 @llvm.ctpop.i8(i8 %163)
%165 = and i8 %164, 1
%PF220 = icmp eq i8 %165, 0
%ZF221 = icmp eq i8 %163, 0
%highbit222 = and i8 -128, %163
%SF223 = icmp ne i8 %highbit222, 0
store i64 %RDX, ptr %EDX-SKT-LOC, align 1
%CmpZF_JE769 = icmp eq i1 %ZF221, true
br i1 %CmpZF_JE769, label %bb.53, label %bb.50
bb.50: ; preds = %bb.49
%ESI = trunc i64 %RDX to i32
%ESI228 = and i32 %ESI, 7
%166 = and i32 %ESI228, 255
%167 = call i32 @llvm.ctpop.i32(i32 %166)
%168 = and i32 %167, 1
%PF224 = icmp eq i32 %168, 0
%ZF225 = icmp eq i32 %ESI228, 0
%highbit226 = and i32 -2147483648, %ESI228
%SF227 = icmp ne i32 %highbit226, 0
%169 = zext i32 0 to i64
store i64 %169, ptr %RBX-SKT-LOC229, align 1
br label %bb.51
bb.51: ; preds = %bb.50, %bb.51
%RBX230 = load i64, ptr %RBX-SKT-LOC229, align 1
%RDI232 = load i64, ptr %RDI-SKT-LOC231, align 1
%memref-basereg233 = add i64 %RDI232, %RBX230
%170 = inttoptr i64 %memref-basereg233 to ptr
%memload234 = load i32, ptr %170, align 1
%171 = trunc i32 %memload234 to i8
%ECX = zext i8 %171 to i32
%R11235 = load i64, ptr %R11-SKT-LOC, align 1
%memref-basereg236 = add i64 %R11235, %RBX230
%172 = trunc i32 %ECX to i8
%173 = inttoptr i64 %memref-basereg236 to ptr
store i8 %172, ptr %173, align 1
%RBX241 = add i64 %RBX230, 1
%174 = and i64 %RBX241, 255
%175 = call i64 @llvm.ctpop.i64(i64 %174)
%176 = and i64 %175, 1
%PF237 = icmp eq i64 %176, 0
%ZF238 = icmp eq i64 %RBX241, 0
%highbit239 = and i64 -9223372036854775808, %RBX241
%SF240 = icmp ne i64 %highbit239, 0
%177 = trunc i64 %RBX241 to i32
%178 = sub i32 %ESI228, %177
%179 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %ESI228, i32 %177)
%CF242 = extractvalue { i32, i1 } %179, 1
%ZF243 = icmp eq i32 %178, 0
%highbit244 = and i32 -2147483648, %178
%SF245 = icmp ne i32 %highbit244, 0
%180 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %ESI228, i32 %177)
%OF246 = extractvalue { i32, i1 } %180, 1
%181 = and i32 %178, 255
%182 = call i32 @llvm.ctpop.i32(i32 %181)
%183 = and i32 %182, 1
%PF247 = icmp eq i32 %183, 0
%CmpZF_JNE770 = icmp eq i1 %ZF243, false
store i64 %RBX241, ptr %RBX-SKT-LOC229, align 1
br i1 %CmpZF_JNE770, label %bb.51, label %bb.52
bb.52: ; preds = %bb.51
%ld-stk-prom791 = load i64, ptr %RBX-SKT-LOC229, align 8
%RDI251 = add nsw i64 %RDI232, %ld-stk-prom791
%highbit248 = and i64 -9223372036854775808, %RDI251
%SF249 = icmp ne i64 %highbit248, 0
%ZF250 = icmp eq i64 %RDI251, 0
%ld-stk-prom790 = load i64, ptr %RBX-SKT-LOC229, align 8
%R11255 = add nsw i64 %R11235, %ld-stk-prom790
%highbit252 = and i64 -9223372036854775808, %R11255
%SF253 = icmp ne i64 %highbit252, 0
%ZF254 = icmp eq i64 %R11255, 0
%184 = trunc i64 %RDX to i32
%ld-stk-prom789 = load i64, ptr %RBX-SKT-LOC229, align 8
%185 = trunc i64 %ld-stk-prom789 to i32
%EDX256 = sub i32 %184, %185
%186 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %184, i32 %185)
%CF257 = extractvalue { i32, i1 } %186, 1
%ZF258 = icmp eq i32 %EDX256, 0
%highbit259 = and i32 -2147483648, %EDX256
%SF260 = icmp ne i32 %highbit259, 0
%187 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %184, i32 %185)
%OF261 = extractvalue { i32, i1 } %187, 1
%188 = and i32 %EDX256, 255
%189 = call i32 @llvm.ctpop.i32(i32 %188)
%190 = and i32 %189, 1
%PF262 = icmp eq i32 %190, 0
%191 = zext i32 %EDX256 to i64
store i64 %191, ptr %EDX-SKT-LOC, align 1
store i64 %RDI251, ptr %RDI-SKT-LOC271, align 1
store i64 %R11255, ptr %R11-SKT-LOC276, align 1
br label %bb.53
bb.53: ; preds = %bb.52, %bb.49
%192 = sub i32 %R8D, 7
%193 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %R8D, i32 7)
%CF263 = extractvalue { i32, i1 } %193, 1
%ZF264 = icmp eq i32 %192, 0
%highbit265 = and i32 -2147483648, %192
%SF266 = icmp ne i32 %highbit265, 0
%194 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %R8D, i32 7)
%OF267 = extractvalue { i32, i1 } %194, 1
%195 = and i32 %192, 255
%196 = call i32 @llvm.ctpop.i32(i32 %195)
%197 = and i32 %196, 1
%PF268 = icmp eq i32 %197, 0
%CmpCF_JB771 = icmp eq i1 %CF263, true
br i1 %CmpCF_JB771, label %bb.56, label %bb.54
bb.54: ; preds = %bb.53
%198 = load i64, ptr %EDX-SKT-LOC, align 1
%EDX269 = trunc i64 %198 to i32
%199 = zext i32 0 to i64
store i64 %199, ptr %RSI-SKT-LOC, align 1
br label %bb.55
bb.55: ; preds = %bb.54, %bb.55
%RSI270 = load i64, ptr %RSI-SKT-LOC, align 1
%RDI272 = load i64, ptr %RDI-SKT-LOC271, align 1
%memref-basereg273 = add i64 %RDI272, %RSI270
%200 = inttoptr i64 %memref-basereg273 to ptr
%memload274 = load i32, ptr %200, align 1
%201 = trunc i32 %memload274 to i8
%ECX275 = zext i8 %201 to i32
%R11277 = load i64, ptr %R11-SKT-LOC276, align 1
%memref-basereg278 = add i64 %R11277, %RSI270
%202 = trunc i32 %ECX275 to i8
%203 = inttoptr i64 %memref-basereg278 to ptr
store i8 %202, ptr %203, align 1
%memref-basereg279 = add i64 %RDI272, %RSI270
%memref-disp280 = add i64 %memref-basereg279, 1
%204 = inttoptr i64 %memref-disp280 to ptr
%memload281 = load i32, ptr %204, align 1
%205 = trunc i32 %memload281 to i8
%ECX282 = zext i8 %205 to i32
%memref-basereg283 = add i64 %R11277, %RSI270
%memref-disp284 = add i64 %memref-basereg283, 1
%206 = trunc i32 %ECX282 to i8
%207 = inttoptr i64 %memref-disp284 to ptr
store i8 %206, ptr %207, align 1
%memref-basereg285 = add i64 %RDI272, %RSI270
%memref-disp286 = add i64 %memref-basereg285, 2
%208 = inttoptr i64 %memref-disp286 to ptr
%memload287 = load i32, ptr %208, align 1
%209 = trunc i32 %memload287 to i8
%ECX288 = zext i8 %209 to i32
%memref-basereg289 = add i64 %R11277, %RSI270
%memref-disp290 = add i64 %memref-basereg289, 2
%210 = trunc i32 %ECX288 to i8
%211 = inttoptr i64 %memref-disp290 to ptr
store i8 %210, ptr %211, align 1
%memref-basereg291 = add i64 %RDI272, %RSI270
%memref-disp292 = add i64 %memref-basereg291, 3
%212 = inttoptr i64 %memref-disp292 to ptr
%memload293 = load i32, ptr %212, align 1
%213 = trunc i32 %memload293 to i8
%ECX294 = zext i8 %213 to i32
%memref-basereg295 = add i64 %R11277, %RSI270
%memref-disp296 = add i64 %memref-basereg295, 3
%214 = trunc i32 %ECX294 to i8
%215 = inttoptr i64 %memref-disp296 to ptr
store i8 %214, ptr %215, align 1
%memref-basereg297 = add i64 %RDI272, %RSI270
%memref-disp298 = add i64 %memref-basereg297, 4
%216 = inttoptr i64 %memref-disp298 to ptr
%memload299 = load i32, ptr %216, align 1
%217 = trunc i32 %memload299 to i8
%ECX300 = zext i8 %217 to i32
%memref-basereg301 = add i64 %R11277, %RSI270
%memref-disp302 = add i64 %memref-basereg301, 4
%218 = trunc i32 %ECX300 to i8
%219 = inttoptr i64 %memref-disp302 to ptr
store i8 %218, ptr %219, align 1
%memref-basereg303 = add i64 %RDI272, %RSI270
%memref-disp304 = add i64 %memref-basereg303, 5
%220 = inttoptr i64 %memref-disp304 to ptr
%memload305 = load i32, ptr %220, align 1
%221 = trunc i32 %memload305 to i8
%ECX306 = zext i8 %221 to i32
%memref-basereg307 = add i64 %R11277, %RSI270
%memref-disp308 = add i64 %memref-basereg307, 5
%222 = trunc i32 %ECX306 to i8
%223 = inttoptr i64 %memref-disp308 to ptr
store i8 %222, ptr %223, align 1
%memref-basereg309 = add i64 %RDI272, %RSI270
%memref-disp310 = add i64 %memref-basereg309, 6
%224 = inttoptr i64 %memref-disp310 to ptr
%memload311 = load i32, ptr %224, align 1
%225 = trunc i32 %memload311 to i8
%ECX312 = zext i8 %225 to i32
%memref-basereg313 = add i64 %R11277, %RSI270
%memref-disp314 = add i64 %memref-basereg313, 6
%226 = trunc i32 %ECX312 to i8
%227 = inttoptr i64 %memref-disp314 to ptr
store i8 %226, ptr %227, align 1
%memref-basereg315 = add i64 %RDI272, %RSI270
%memref-disp316 = add i64 %memref-basereg315, 7
%228 = inttoptr i64 %memref-disp316 to ptr
%memload317 = load i32, ptr %228, align 1
%229 = trunc i32 %memload317 to i8
%ECX318 = zext i8 %229 to i32
%memref-basereg319 = add i64 %R11277, %RSI270
%memref-disp320 = add i64 %memref-basereg319, 7
%230 = trunc i32 %ECX318 to i8
%231 = inttoptr i64 %memref-disp320 to ptr
store i8 %230, ptr %231, align 1
%RSI327 = add i64 %RSI270, 8
%232 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RSI270, i64 8)
%CF321 = extractvalue { i64, i1 } %232, 1
%233 = and i64 %RSI327, 255
%234 = call i64 @llvm.ctpop.i64(i64 %233)
%235 = and i64 %234, 1
%PF322 = icmp eq i64 %235, 0
%ZF323 = icmp eq i64 %RSI327, 0
%highbit324 = and i64 -9223372036854775808, %RSI327
%SF325 = icmp ne i64 %highbit324, 0
%236 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RSI270, i64 8)
%OF326 = extractvalue { i64, i1 } %236, 1
%237 = trunc i64 %RSI327 to i32
%238 = sub i32 %EDX269, %237
%239 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EDX269, i32 %237)
%CF328 = extractvalue { i32, i1 } %239, 1
%ZF329 = icmp eq i32 %238, 0
%highbit330 = and i32 -2147483648, %238
%SF331 = icmp ne i32 %highbit330, 0
%240 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EDX269, i32 %237)
%OF332 = extractvalue { i32, i1 } %240, 1
%241 = and i32 %238, 255
%242 = call i32 @llvm.ctpop.i32(i32 %241)
%243 = and i32 %242, 1
%PF333 = icmp eq i32 %243, 0
%CmpZF_JNE772 = icmp eq i1 %ZF329, false
store i64 %RSI327, ptr %RSI-SKT-LOC, align 1
br i1 %CmpZF_JNE772, label %bb.55, label %bb.56
bb.6: ; preds = %entry
%244 = trunc i64 %arg3 to i32
%245 = trunc i64 %arg3 to i32
%246 = and i32 %244, %245
%highbit334 = and i32 -2147483648, %246
%SF335 = icmp ne i32 %highbit334, 0
%ZF336 = icmp eq i32 %246, 0
%247 = and i32 %246, 255
%248 = call i32 @llvm.ctpop.i32(i32 %247)
%249 = and i32 %248, 1
%PF337 = icmp eq i32 %249, 0
%CmpZF_JE773 = icmp eq i1 %ZF336, true
br i1 %CmpZF_JE773, label %bb.56, label %bb.7
bb.7: ; preds = %bb.6
%250 = trunc i64 %arg3 to i32
%R15 = sext i32 %250 to i64
%memref-basereg338 = add i64 %arg2, %R15
%memref-basereg339 = add i64 %arg1, %R15
%memref-disp340 = add i64 %arg3, -1
%ECX341 = trunc i64 %memref-disp340 to i32
%251 = sub i32 %ECX341, 3
%252 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %ECX341, i32 3)
%CF342 = extractvalue { i32, i1 } %252, 1
%ZF343 = icmp eq i32 %251, 0
%highbit344 = and i32 -2147483648, %251
%SF345 = icmp ne i32 %highbit344, 0
%253 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %ECX341, i32 3)
%OF346 = extractvalue { i32, i1 } %253, 1
%254 = and i32 %251, 255
%255 = call i32 @llvm.ctpop.i32(i32 %254)
%256 = and i32 %255, 1
%PF347 = icmp eq i32 %256, 0
store i64 %memref-basereg338, ptr %R11-SKT-LOC615, align 1
store i64 %memref-basereg339, ptr %R9-SKT-LOC, align 1
%CmpCF_JB774 = icmp eq i1 %CF342, true
br i1 %CmpCF_JB774, label %bb.9, label %bb.8
bb.8: ; preds = %bb.7
%memref-basereg348 = add i64 %arg2, %R15
%RDI349 = sub i64 %memref-basereg348, %arg1
%257 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memref-basereg348, i64 %arg1)
%CF350 = extractvalue { i64, i1 } %257, 1
%ZF351 = icmp eq i64 %RDI349, 0
%highbit352 = and i64 -9223372036854775808, %RDI349
%SF353 = icmp ne i64 %highbit352, 0
%258 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memref-basereg348, i64 %arg1)
%OF354 = extractvalue { i64, i1 } %258, 1
%259 = and i64 %RDI349, 255
%260 = call i64 @llvm.ctpop.i64(i64 %259)
%261 = and i64 %260, 1
%PF355 = icmp eq i64 %261, 0
%RDI356 = sub i64 %RDI349, %R15
%262 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RDI349, i64 %R15)
%CF357 = extractvalue { i64, i1 } %262, 1
%ZF358 = icmp eq i64 %RDI356, 0
%highbit359 = and i64 -9223372036854775808, %RDI356
%SF360 = icmp ne i64 %highbit359, 0
%263 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RDI349, i64 %R15)
%OF361 = extractvalue { i64, i1 } %263, 1
%264 = and i64 %RDI356, 255
%265 = call i64 @llvm.ctpop.i64(i64 %264)
%266 = and i64 %265, 1
%PF362 = icmp eq i64 %266, 0
%267 = sub i64 %RDI356, 16
%268 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RDI356, i64 16)
%CF363 = extractvalue { i64, i1 } %268, 1
%ZF364 = icmp eq i64 %267, 0
%highbit365 = and i64 -9223372036854775808, %267
%SF366 = icmp ne i64 %highbit365, 0
%269 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RDI356, i64 16)
%OF367 = extractvalue { i64, i1 } %269, 1
%270 = and i64 %267, 255
%271 = call i64 @llvm.ctpop.i64(i64 %270)
%272 = and i64 %271, 1
%PF368 = icmp eq i64 %272, 0
%CFCmp_JAE775 = icmp eq i1 %CF363, false
br i1 %CFCmp_JAE775, label %bb.21, label %bb.9
bb.21: ; preds = %bb.8
%memref-disp369 = add i32 %ECX341, 1
%R8370 = zext i32 %memref-disp369 to i64
%273 = sub i32 %ECX341, 15
%274 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %ECX341, i32 15)
%CF371 = extractvalue { i32, i1 } %274, 1
%ZF372 = icmp eq i32 %273, 0
%highbit373 = and i32 -2147483648, %273
%SF374 = icmp ne i32 %highbit373, 0
%275 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %ECX341, i32 15)
%OF375 = extractvalue { i32, i1 } %275, 1
%276 = and i32 %273, 255
%277 = call i32 @llvm.ctpop.i32(i32 %276)
%278 = and i32 %277, 1
%PF376 = icmp eq i32 %278, 0
%CFCmp_JAE776 = icmp eq i1 %CF371, false
br i1 %CFCmp_JAE776, label %bb.34, label %bb.22
bb.22: ; preds = %bb.21
%279 = zext i32 0 to i64
store i64 %279, ptr %RCX-SKT-LOC546, align 1
br label %bb.44
bb.34: ; preds = %bb.21
%memref-disp377 = add i64 8589934560, 16
%RCX382 = and i64 %memref-disp377, %R8370
%highbit378 = and i64 -9223372036854775808, %RCX382
%SF379 = icmp ne i64 %highbit378, 0
%ZF380 = icmp eq i64 %RCX382, 0
%280 = and i64 %RCX382, 255
%281 = call i64 @llvm.ctpop.i64(i64 %280)
%282 = and i64 %281, 1
%PF381 = icmp eq i64 %282, 0
%memref-disp383 = add i64 %RCX382, -16
%RBX387 = lshr i64 %memref-disp383, 4
%ZF384 = icmp eq i64 %RBX387, 0
%highbit385 = and i64 -9223372036854775808, %RBX387
%SF386 = icmp ne i64 %highbit385, 0
%RBX392 = add i64 %RBX387, 1
%283 = and i64 %RBX392, 255
%284 = call i64 @llvm.ctpop.i64(i64 %283)
%285 = and i64 %284, 1
%PF388 = icmp eq i64 %285, 0
%ZF389 = icmp eq i64 %RBX392, 0
%highbit390 = and i64 -9223372036854775808, %RBX392
%SF391 = icmp ne i64 %highbit390, 0
%R14D = trunc i64 %RBX392 to i32
%R14D397 = and i32 %R14D, 3
%286 = and i32 %R14D397, 255
%287 = call i32 @llvm.ctpop.i32(i32 %286)
%288 = and i32 %287, 1
%PF393 = icmp eq i32 %288, 0
%ZF394 = icmp eq i32 %R14D397, 0
%highbit395 = and i32 -2147483648, %R14D397
%SF396 = icmp ne i32 %highbit395, 0
%289 = sub i64 %memref-disp383, 48
%290 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memref-disp383, i64 48)
%CF398 = extractvalue { i64, i1 } %290, 1
%ZF399 = icmp eq i64 %289, 0
%highbit400 = and i64 -9223372036854775808, %289
%SF401 = icmp ne i64 %highbit400, 0
%291 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memref-disp383, i64 48)
%OF402 = extractvalue { i64, i1 } %291, 1
%292 = and i64 %289, 255
%293 = call i64 @llvm.ctpop.i64(i64 %292)
%294 = and i64 %293, 1
%PF403 = icmp eq i64 %294, 0
store i64 %RCX382, ptr %RCX-SKT-LOC546, align 1
%CFCmp_JAE777 = icmp eq i1 %CF398, false
br i1 %CFCmp_JAE777, label %bb.36, label %bb.35
bb.35: ; preds = %bb.34
%295 = zext i32 0 to i64
store i64 %295, ptr %RDI-SKT-LOC457, align 1
br label %bb.39
bb.36: ; preds = %bb.34
%RBX408 = and i64 %RBX392, -4
%296 = and i64 %RBX408, 255
%297 = call i64 @llvm.ctpop.i64(i64 %296)
%298 = and i64 %297, 1
%PF404 = icmp eq i64 %298, 0
%ZF405 = icmp eq i64 %RBX408, 0
%highbit406 = and i64 -9223372036854775808, %RBX408
%SF407 = icmp ne i64 %highbit406, 0
%ld-stk-prom623 = load i64, ptr %R11-SKT-LOC615, align 8
%memref-disp409 = add i64 %ld-stk-prom623, -16
%ld-stk-prom632 = load i64, ptr %R9-SKT-LOC, align 8
%memref-disp410 = add i64 %ld-stk-prom632, -16
%299 = zext i32 0 to i64
store i64 %299, ptr %RDI-SKT-LOC411, align 1
store i64 %RBX408, ptr %RBX-SKT-LOC438, align 1
br label %bb.37
bb.37: ; preds = %bb.36, %bb.37
%RDI412 = load i64, ptr %RDI-SKT-LOC411, align 1
%memref-basereg413 = add i64 %memref-disp409, %RDI412
%300 = inttoptr i64 %memref-basereg413 to ptr
%memload414 = load <4 x float>, ptr %300, align 1
%memref-basereg415 = add i64 %memref-disp410, %RDI412
%301 = inttoptr i64 %memref-basereg415 to ptr
store <4 x float> %memload414, ptr %301, align 1
%memref-basereg416 = add i64 %memref-disp409, %RDI412
%memref-disp417 = add i64 %memref-basereg416, -16
%302 = inttoptr i64 %memref-disp417 to ptr
%memload418 = load <4 x float>, ptr %302, align 1
%memref-basereg419 = add i64 %memref-disp410, %RDI412
%memref-disp420 = add i64 %memref-basereg419, -16
%303 = inttoptr i64 %memref-disp420 to ptr
store <4 x float> %memload418, ptr %303, align 1
%memref-basereg421 = add i64 %memref-disp409, %RDI412
%memref-disp422 = add i64 %memref-basereg421, -32
%304 = inttoptr i64 %memref-disp422 to ptr
%memload423 = load <4 x float>, ptr %304, align 1
%memref-basereg424 = add i64 %memref-disp410, %RDI412
%memref-disp425 = add i64 %memref-basereg424, -32
%305 = inttoptr i64 %memref-disp425 to ptr
store <4 x float> %memload423, ptr %305, align 1
%memref-basereg426 = add i64 %memref-disp409, %RDI412
%memref-disp427 = add i64 %memref-basereg426, -48
%306 = inttoptr i64 %memref-disp427 to ptr
%memload428 = load <4 x float>, ptr %306, align 1
%memref-basereg429 = add i64 %memref-disp410, %RDI412
%memref-disp430 = add i64 %memref-basereg429, -48
%307 = inttoptr i64 %memref-disp430 to ptr
store <4 x float> %memload428, ptr %307, align 1
%RDI437 = add i64 %RDI412, -64
%308 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RDI412, i64 -64)
%CF431 = extractvalue { i64, i1 } %308, 1
%309 = and i64 %RDI437, 255
%310 = call i64 @llvm.ctpop.i64(i64 %309)
%311 = and i64 %310, 1
%PF432 = icmp eq i64 %311, 0
%ZF433 = icmp eq i64 %RDI437, 0
%highbit434 = and i64 -9223372036854775808, %RDI437
%SF435 = icmp ne i64 %highbit434, 0
%312 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RDI412, i64 -64)
%OF436 = extractvalue { i64, i1 } %312, 1
%RBX439 = load i64, ptr %RBX-SKT-LOC438, align 1
%RBX446 = add i64 %RBX439, -4
%313 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RBX439, i64 -4)
%CF440 = extractvalue { i64, i1 } %313, 1
%314 = and i64 %RBX446, 255
%315 = call i64 @llvm.ctpop.i64(i64 %314)
%316 = and i64 %315, 1
%PF441 = icmp eq i64 %316, 0
%ZF442 = icmp eq i64 %RBX446, 0
%highbit443 = and i64 -9223372036854775808, %RBX446
%SF444 = icmp ne i64 %highbit443, 0
%317 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RBX439, i64 -4)
%OF445 = extractvalue { i64, i1 } %317, 1
%CmpZF_JNE778 = icmp eq i1 %ZF442, false
store i64 %RBX446, ptr %RBX-SKT-LOC438, align 1
store i64 %RDI437, ptr %RDI-SKT-LOC411, align 1
br i1 %CmpZF_JNE778, label %bb.37, label %bb.38
bb.38: ; preds = %bb.37
%CF447 = icmp ne i64 0, 0
%ld-stk-prom792 = load i64, ptr %RDI-SKT-LOC411, align 8
%RDI452 = sub i64 0, %ld-stk-prom792
%ZF448 = icmp eq i64 %RDI452, 0
%highbit449 = and i64 -9223372036854775808, %RDI452
%SF450 = icmp ne i64 %highbit449, 0
%318 = and i64 %RDI452, 255
%319 = call i64 @llvm.ctpop.i64(i64 %318)
%320 = and i64 %319, 1
%PF451 = icmp eq i64 %320, 0
store i64 %RDI452, ptr %RDI-SKT-LOC457, align 1
br label %bb.39
bb.39: ; preds = %bb.38, %bb.35
%321 = zext i32 %R14D397 to i64
%322 = zext i32 %R14D397 to i64
%323 = and i64 %321, %322
%highbit453 = and i64 -9223372036854775808, %323
%SF454 = icmp ne i64 %highbit453, 0
%ZF455 = icmp eq i64 %323, 0
%324 = and i64 %323, 255
%325 = call i64 @llvm.ctpop.i64(i64 %324)
%326 = and i64 %325, 1
%PF456 = icmp eq i64 %326, 0
%CmpZF_JE779 = icmp eq i1 %ZF455, true
br i1 %CmpZF_JE779, label %bb.42, label %bb.40
bb.40: ; preds = %bb.39
%RDI458 = load i64, ptr %RDI-SKT-LOC457, align 1
%R15459 = sub i64 %R15, %RDI458
%327 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R15, i64 %RDI458)
%CF460 = extractvalue { i64, i1 } %327, 1
%ZF461 = icmp eq i64 %R15459, 0
%highbit462 = and i64 -9223372036854775808, %R15459
%SF463 = icmp ne i64 %highbit462, 0
%328 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R15, i64 %RDI458)
%OF464 = extractvalue { i64, i1 } %328, 1
%329 = and i64 %R15459, 255
%330 = call i64 @llvm.ctpop.i64(i64 %329)
%331 = and i64 %330, 1
%PF465 = icmp eq i64 %331, 0
%memref-basereg466 = add i64 %arg1, %R15459
%R12 = add i64 %memref-basereg466, -16
%332 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %memref-basereg466, i64 -16)
%CF467 = extractvalue { i64, i1 } %332, 1
%333 = and i64 %R12, 255
%334 = call i64 @llvm.ctpop.i64(i64 %333)
%335 = and i64 %334, 1
%PF468 = icmp eq i64 %335, 0
%ZF469 = icmp eq i64 %R12, 0
%highbit470 = and i64 -9223372036854775808, %R12
%SF471 = icmp ne i64 %highbit470, 0
%336 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %memref-basereg466, i64 -16)
%OF472 = extractvalue { i64, i1 } %336, 1
%RSI476 = add nsw i64 %arg2, %R15459
%highbit473 = and i64 -9223372036854775808, %RSI476
%SF474 = icmp ne i64 %highbit473, 0
%ZF475 = icmp eq i64 %RSI476, 0
%RSI483 = add i64 %RSI476, -16
%337 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RSI476, i64 -16)
%CF477 = extractvalue { i64, i1 } %337, 1
%338 = and i64 %RSI483, 255
%339 = call i64 @llvm.ctpop.i64(i64 %338)
%340 = and i64 %339, 1
%PF478 = icmp eq i64 %340, 0
%ZF479 = icmp eq i64 %RSI483, 0
%highbit480 = and i64 -9223372036854775808, %RSI483
%SF481 = icmp ne i64 %highbit480, 0
%341 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RSI476, i64 -16)
%OF482 = extractvalue { i64, i1 } %341, 1
%342 = zext i32 %R14D397 to i64
%R14 = shl i64 %342, 4
%ZF484 = icmp eq i64 %R14, 0
%highbit485 = and i64 -9223372036854775808, %R14
%SF486 = icmp ne i64 %highbit485, 0
%343 = zext i32 0 to i64
store i64 %343, ptr %RBX-SKT-LOC487, align 1
br label %bb.41
bb.41: ; preds = %bb.40, %bb.41
%RBX488 = load i64, ptr %RBX-SKT-LOC487, align 1
%memref-basereg489 = add i64 %RSI483, %RBX488
%344 = inttoptr i64 %memref-basereg489 to ptr
%memload490 = load <4 x float>, ptr %344, align 1
%memref-basereg491 = add i64 %R12, %RBX488
%345 = inttoptr i64 %memref-basereg491 to ptr
store <4 x float> %memload490, ptr %345, align 1
%RBX498 = add i64 %RBX488, -16
%346 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RBX488, i64 -16)
%CF492 = extractvalue { i64, i1 } %346, 1
%347 = and i64 %RBX498, 255
%348 = call i64 @llvm.ctpop.i64(i64 %347)
%349 = and i64 %348, 1
%PF493 = icmp eq i64 %349, 0
%ZF494 = icmp eq i64 %RBX498, 0
%highbit495 = and i64 -9223372036854775808, %RBX498
%SF496 = icmp ne i64 %highbit495, 0
%350 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RBX488, i64 -16)
%OF497 = extractvalue { i64, i1 } %350, 1
%RDI502 = add nsw i64 %R14, %RBX498
%highbit499 = and i64 -9223372036854775808, %RDI502
%SF500 = icmp ne i64 %highbit499, 0
%ZF501 = icmp eq i64 %RDI502, 0
%CmpZF_JNE780 = icmp eq i1 %ZF501, false
store i64 %RBX498, ptr %RBX-SKT-LOC487, align 1
br i1 %CmpZF_JNE780, label %bb.41, label %bb.42
bb.42: ; preds = %bb.41, %bb.39
%ld-stk-prom549 = load i64, ptr %RCX-SKT-LOC546, align 8
%351 = sub i64 %R8370, %ld-stk-prom549
%ld-stk-prom548 = load i64, ptr %RCX-SKT-LOC546, align 8
%352 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R8370, i64 %ld-stk-prom548)
%CF503 = extractvalue { i64, i1 } %352, 1
%ZF504 = icmp eq i64 %351, 0
%highbit505 = and i64 -9223372036854775808, %351
%SF506 = icmp ne i64 %highbit505, 0
%ld-stk-prom547 = load i64, ptr %RCX-SKT-LOC546, align 8
%353 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R8370, i64 %ld-stk-prom547)
%OF507 = extractvalue { i64, i1 } %353, 1
%354 = and i64 %351, 255
%355 = call i64 @llvm.ctpop.i64(i64 %354)
%356 = and i64 %355, 1
%PF508 = icmp eq i64 %356, 0
%CmpZF_JE781 = icmp eq i1 %ZF504, true
br i1 %CmpZF_JE781, label %bb.56, label %bb.43
bb.43: ; preds = %bb.42
%357 = trunc i64 %R8370 to i8
%358 = and i8 %357, 12
%359 = call i8 @llvm.ctpop.i8(i8 %358)
%360 = and i8 %359, 1
%PF509 = icmp eq i8 %360, 0
%ZF510 = icmp eq i8 %358, 0
%highbit511 = and i8 -128, %358
%SF512 = icmp ne i8 %highbit511, 0
%CmpZF_JE782 = icmp eq i1 %ZF510, true
br i1 %CmpZF_JE782, label %bb.57, label %bb.44
bb.44: ; preds = %bb.43, %bb.22
%R10519 = add i64 8589934560, 28
%361 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 8589934560, i64 28)
%CF513 = extractvalue { i64, i1 } %361, 1
%362 = and i64 %R10519, 255
%363 = call i64 @llvm.ctpop.i64(i64 %362)
%364 = and i64 %363, 1
%PF514 = icmp eq i64 %364, 0
%ZF515 = icmp eq i64 %R10519, 0
%highbit516 = and i64 -9223372036854775808, %R10519
%SF517 = icmp ne i64 %highbit516, 0
%365 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 8589934560, i64 28)
%OF518 = extractvalue { i64, i1 } %365, 1
%R10524 = and i64 %R10519, %R8370
%highbit520 = and i64 -9223372036854775808, %R10524
%SF521 = icmp ne i64 %highbit520, 0
%ZF522 = icmp eq i64 %R10524, 0
%366 = and i64 %R10524, 255
%367 = call i64 @llvm.ctpop.i64(i64 %366)
%368 = and i64 %367, 1
%PF523 = icmp eq i64 %368, 0
%ld-stk-prom622 = load i64, ptr %R11-SKT-LOC615, align 8
%RSI525 = sub i64 %ld-stk-prom622, %R10524
%ld-stk-prom621 = load i64, ptr %R11-SKT-LOC615, align 8
%369 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %ld-stk-prom621, i64 %R10524)
%CF526 = extractvalue { i64, i1 } %369, 1
%ZF527 = icmp eq i64 %RSI525, 0
%highbit528 = and i64 -9223372036854775808, %RSI525
%SF529 = icmp ne i64 %highbit528, 0
%ld-stk-prom620 = load i64, ptr %R11-SKT-LOC615, align 8
%370 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %ld-stk-prom620, i64 %R10524)
%OF530 = extractvalue { i64, i1 } %370, 1
%371 = and i64 %RSI525, 255
%372 = call i64 @llvm.ctpop.i64(i64 %371)
%373 = and i64 %372, 1
%PF531 = icmp eq i64 %373, 0
%ld-stk-prom631 = load i64, ptr %R9-SKT-LOC, align 8
%RDI532 = sub i64 %ld-stk-prom631, %R10524
%ld-stk-prom630 = load i64, ptr %R9-SKT-LOC, align 8
%374 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %ld-stk-prom630, i64 %R10524)
%CF533 = extractvalue { i64, i1 } %374, 1
%ZF534 = icmp eq i64 %RDI532, 0
%highbit535 = and i64 -9223372036854775808, %RDI532
%SF536 = icmp ne i64 %highbit535, 0
%ld-stk-prom629 = load i64, ptr %R9-SKT-LOC, align 8
%375 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %ld-stk-prom629, i64 %R10524)
%OF537 = extractvalue { i64, i1 } %375, 1
%376 = and i64 %RDI532, 255
%377 = call i64 @llvm.ctpop.i64(i64 %376)
%378 = and i64 %377, 1
%PF538 = icmp eq i64 %378, 0
%379 = trunc i64 %arg3 to i32
%380 = trunc i64 %R10524 to i32
%EDX539 = sub i32 %379, %380
%381 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %379, i32 %380)
%CF540 = extractvalue { i32, i1 } %381, 1
%ZF541 = icmp eq i32 %EDX539, 0
%highbit542 = and i32 -2147483648, %EDX539
%SF543 = icmp ne i32 %highbit542, 0
%382 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %379, i32 %380)
%OF544 = extractvalue { i32, i1 } %382, 1
%383 = and i32 %EDX539, 255
%384 = call i32 @llvm.ctpop.i32(i32 %383)
%385 = and i32 %384, 1
%PF545 = icmp eq i32 %385, 0
%RCX550 = load i64, ptr %RCX-SKT-LOC546, align 1
%CF551 = icmp ne i64 0, 0
%RCX556 = sub i64 0, %RCX550
%ZF552 = icmp eq i64 %RCX556, 0
%highbit553 = and i64 -9223372036854775808, %RCX556
%SF554 = icmp ne i64 %highbit553, 0
%386 = and i64 %RCX556, 255
%387 = call i64 @llvm.ctpop.i64(i64 %386)
%388 = and i64 %387, 1
%PF555 = icmp eq i64 %388, 0
%RBX561 = and i64 %R8370, -4
%389 = and i64 %RBX561, 255
%390 = call i64 @llvm.ctpop.i64(i64 %389)
%391 = and i64 %390, 1
%PF557 = icmp eq i64 %391, 0
%ZF558 = icmp eq i64 %RBX561, 0
%highbit559 = and i64 -9223372036854775808, %RBX561
%SF560 = icmp ne i64 %highbit559, 0
%CF562 = icmp ne i64 0, 0
%RBX567 = sub i64 0, %RBX561
%ZF563 = icmp eq i64 %RBX567, 0
%highbit564 = and i64 -9223372036854775808, %RBX567
%SF565 = icmp ne i64 %highbit564, 0
%392 = and i64 %RBX567, 255
%393 = call i64 @llvm.ctpop.i64(i64 %392)
%394 = and i64 %393, 1
%PF566 = icmp eq i64 %394, 0
store i64 %RCX556, ptr %RCX-SKT-LOC568, align 1
%395 = zext i32 %EDX539 to i64
store i64 %395, ptr %RDX-SKT-LOC634, align 1
store i64 %RSI525, ptr %RSI-SKT-LOC643, align 1
store i64 %RDI532, ptr %RDI-SKT-LOC652, align 1
store i64 %RSI525, ptr %RSI-SKT-LOC695, align 1
store i64 %RDI532, ptr %RDI-SKT-LOC701, align 1
br label %bb.45
bb.45: ; preds = %bb.44, %bb.45
%RCX569 = load i64, ptr %RCX-SKT-LOC568, align 1
%ld-stk-prom619 = load i64, ptr %R11-SKT-LOC615, align 8
%memref-basereg570 = add i64 %ld-stk-prom619, %RCX569
%memref-disp571 = add i64 %memref-basereg570, -4
%396 = inttoptr i64 %memref-disp571 to ptr
%memload572 = load i32, ptr %396, align 1
%ld-stk-prom628 = load i64, ptr %R9-SKT-LOC, align 8
%memref-basereg573 = add i64 %ld-stk-prom628, %RCX569
%memref-disp574 = add i64 %memref-basereg573, -4
%397 = inttoptr i64 %memref-disp574 to ptr
store i32 %memload572, ptr %397, align 1
%RCX581 = add i64 %RCX569, -4
%398 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RCX569, i64 -4)
%CF575 = extractvalue { i64, i1 } %398, 1
%399 = and i64 %RCX581, 255
%400 = call i64 @llvm.ctpop.i64(i64 %399)
%401 = and i64 %400, 1
%PF576 = icmp eq i64 %401, 0
%ZF577 = icmp eq i64 %RCX581, 0
%highbit578 = and i64 -9223372036854775808, %RCX581
%SF579 = icmp ne i64 %highbit578, 0
%402 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RCX569, i64 -4)
%OF580 = extractvalue { i64, i1 } %402, 1
%403 = sub i64 %RBX567, %RCX581
%404 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RBX567, i64 %RCX581)
%CF582 = extractvalue { i64, i1 } %404, 1
%ZF583 = icmp eq i64 %403, 0
%highbit584 = and i64 -9223372036854775808, %403
%SF585 = icmp ne i64 %highbit584, 0
%405 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RBX567, i64 %RCX581)
%OF586 = extractvalue { i64, i1 } %405, 1
%406 = and i64 %403, 255
%407 = call i64 @llvm.ctpop.i64(i64 %406)
%408 = and i64 %407, 1
%PF587 = icmp eq i64 %408, 0
%CmpZF_JNE783 = icmp eq i1 %ZF583, false
store i64 %RCX581, ptr %RCX-SKT-LOC568, align 1
br i1 %CmpZF_JNE783, label %bb.45, label %bb.46
bb.46: ; preds = %bb.45
%409 = sub i64 %R8370, %R10524
%410 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R8370, i64 %R10524)
%CF588 = extractvalue { i64, i1 } %410, 1
%ZF589 = icmp eq i64 %409, 0
%highbit590 = and i64 -9223372036854775808, %409
%SF591 = icmp ne i64 %highbit590, 0
%411 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R8370, i64 %R10524)
%OF592 = extractvalue { i64, i1 } %411, 1
%412 = and i64 %409, 255
%413 = call i64 @llvm.ctpop.i64(i64 %412)
%414 = and i64 %413, 1
%PF593 = icmp eq i64 %414, 0
%CmpZF_JNE784 = icmp eq i1 %ZF589, false
br i1 %CmpZF_JNE784, label %bb.10, label %bb.47
bb.47: ; preds = %bb.46
br label %bb.56
bb.57: ; preds = %bb.43
%415 = trunc i64 %arg3 to i32
%416 = trunc i64 %RCX382 to i32
%EDX594 = sub i32 %415, %416
%417 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %415, i32 %416)
%CF595 = extractvalue { i32, i1 } %417, 1
%ZF596 = icmp eq i32 %EDX594, 0
%highbit597 = and i32 -2147483648, %EDX594
%SF598 = icmp ne i32 %highbit597, 0
%418 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %415, i32 %416)
%OF599 = extractvalue { i32, i1 } %418, 1
%419 = and i32 %EDX594, 255
%420 = call i32 @llvm.ctpop.i32(i32 %419)
%421 = and i32 %420, 1
%PF600 = icmp eq i32 %421, 0
%ld-stk-prom627 = load i64, ptr %R9-SKT-LOC, align 8
%R9601 = sub i64 %ld-stk-prom627, %RCX382
%ld-stk-prom626 = load i64, ptr %R9-SKT-LOC, align 8
%422 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %ld-stk-prom626, i64 %RCX382)
%CF602 = extractvalue { i64, i1 } %422, 1
%ZF603 = icmp eq i64 %R9601, 0
%highbit604 = and i64 -9223372036854775808, %R9601
%SF605 = icmp ne i64 %highbit604, 0
%ld-stk-prom625 = load i64, ptr %R9-SKT-LOC, align 8
%423 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %ld-stk-prom625, i64 %RCX382)
%OF606 = extractvalue { i64, i1 } %423, 1
%424 = and i64 %R9601, 255
%425 = call i64 @llvm.ctpop.i64(i64 %424)
%426 = and i64 %425, 1
%PF607 = icmp eq i64 %426, 0
%ld-stk-prom618 = load i64, ptr %R11-SKT-LOC615, align 8
%R11608 = sub i64 %ld-stk-prom618, %RCX382
%ld-stk-prom617 = load i64, ptr %R11-SKT-LOC615, align 8
%427 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %ld-stk-prom617, i64 %RCX382)
%CF609 = extractvalue { i64, i1 } %427, 1
%ZF610 = icmp eq i64 %R11608, 0
%highbit611 = and i64 -9223372036854775808, %R11608
%SF612 = icmp ne i64 %highbit611, 0
%ld-stk-prom616 = load i64, ptr %R11-SKT-LOC615, align 8
%428 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %ld-stk-prom616, i64 %RCX382)
%OF613 = extractvalue { i64, i1 } %428, 1
%429 = and i64 %R11608, 255
%430 = call i64 @llvm.ctpop.i64(i64 %429)
%431 = and i64 %430, 1
%PF614 = icmp eq i64 %431, 0
store i64 %R11608, ptr %R11-SKT-LOC615, align 1
store i64 %R9601, ptr %R9-SKT-LOC, align 1
%432 = zext i32 %EDX594 to i64
store i64 %432, ptr %RDX-SKT-LOC634, align 1
br label %bb.9
bb.9: ; preds = %bb.57, %bb.8, %bb.7
%R11624 = load i64, ptr %R11-SKT-LOC615, align 1
%R9633 = load i64, ptr %R9-SKT-LOC, align 1
store i64 %R11624, ptr %RSI-SKT-LOC643, align 1
store i64 %R9633, ptr %RDI-SKT-LOC652, align 1
store i64 %R11624, ptr %RSI-SKT-LOC695, align 1
store i64 %R9633, ptr %RDI-SKT-LOC701, align 1
br label %bb.10
bb.10: ; preds = %bb.9, %bb.46
%RDX635 = load i64, ptr %RDX-SKT-LOC634, align 1
%memref-disp636 = add i64 %RDX635, -1
%R8D637 = trunc i64 %memref-disp636 to i32
%EBP = trunc i64 %RDX635 to i32
%EBP642 = and i32 %EBP, 7
%433 = and i32 %EBP642, 255
%434 = call i32 @llvm.ctpop.i32(i32 %433)
%435 = and i32 %434, 1
%PF638 = icmp eq i32 %435, 0
%ZF639 = icmp eq i32 %EBP642, 0
%highbit640 = and i32 -2147483648, %EBP642
%SF641 = icmp ne i32 %highbit640, 0
store i64 %RDX635, ptr %EDX-SKT-LOC685, align 1
%CmpZF_JE785 = icmp eq i1 %ZF639, true
br i1 %CmpZF_JE785, label %bb.14, label %bb.11
bb.11: ; preds = %bb.10
%436 = zext i32 0 to i64
store i64 %436, ptr %ECX-SKT-LOC, align 1
br label %bb.12
bb.12: ; preds = %bb.11, %bb.12
%RSI644 = load i64, ptr %RSI-SKT-LOC643, align 1
%memref-disp645 = add i64 %RSI644, -1
%437 = inttoptr i64 %memref-disp645 to ptr
%memload646 = load i32, ptr %437, align 1
%438 = trunc i32 %memload646 to i8
%EBX = zext i8 %438 to i32
%RSI651 = sub i64 %RSI644, 1
%439 = and i64 %RSI651, 255
%440 = call i64 @llvm.ctpop.i64(i64 %439)
%441 = and i64 %440, 1
%PF647 = icmp eq i64 %441, 0
%ZF648 = icmp eq i64 %RSI651, 0
%highbit649 = and i64 -9223372036854775808, %RSI651
%SF650 = icmp ne i64 %highbit649, 0
%RDI653 = load i64, ptr %RDI-SKT-LOC652, align 1
%memref-disp654 = add i64 %RDI653, -1
%442 = trunc i32 %EBX to i8
%443 = inttoptr i64 %memref-disp654 to ptr
store i8 %442, ptr %443, align 1
%RDI659 = sub i64 %RDI653, 1
%444 = and i64 %RDI659, 255
%445 = call i64 @llvm.ctpop.i64(i64 %444)
%446 = and i64 %445, 1
%PF655 = icmp eq i64 %446, 0
%ZF656 = icmp eq i64 %RDI659, 0
%highbit657 = and i64 -9223372036854775808, %RDI659
%SF658 = icmp ne i64 %highbit657, 0
%447 = load i64, ptr %ECX-SKT-LOC, align 1
%ECX660 = trunc i64 %447 to i32
%ECX665 = add i32 %ECX660, 1
%448 = and i32 %ECX665, 255
%449 = call i32 @llvm.ctpop.i32(i32 %448)
%450 = and i32 %449, 1
%PF661 = icmp eq i32 %450, 0
%ZF662 = icmp eq i32 %ECX665, 0
%highbit663 = and i32 -2147483648, %ECX665
%SF664 = icmp ne i32 %highbit663, 0
%451 = sub i32 %EBP642, %ECX665
%452 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EBP642, i32 %ECX665)
%CF666 = extractvalue { i32, i1 } %452, 1
%ZF667 = icmp eq i32 %451, 0
%highbit668 = and i32 -2147483648, %451
%SF669 = icmp ne i32 %highbit668, 0
%453 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EBP642, i32 %ECX665)
%OF670 = extractvalue { i32, i1 } %453, 1
%454 = and i32 %451, 255
%455 = call i32 @llvm.ctpop.i32(i32 %454)
%456 = and i32 %455, 1
%PF671 = icmp eq i32 %456, 0
store i64 %RSI651, ptr %RSI-SKT-LOC695, align 1
store i64 %RDI659, ptr %RDI-SKT-LOC701, align 1
%CmpZF_JNE786 = icmp eq i1 %ZF667, false
%457 = zext i32 %ECX665 to i64
store i64 %457, ptr %ECX-SKT-LOC, align 1
store i64 %RDI659, ptr %RDI-SKT-LOC652, align 1
store i64 %RSI651, ptr %RSI-SKT-LOC643, align 1
br i1 %CmpZF_JNE786, label %bb.12, label %bb.13
bb.13: ; preds = %bb.12
%458 = trunc i64 %RDX635 to i32
%EDX672 = sub i32 %458, %ECX665
%459 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %458, i32 %ECX665)
%CF673 = extractvalue { i32, i1 } %459, 1
%ZF674 = icmp eq i32 %EDX672, 0
%highbit675 = and i32 -2147483648, %EDX672
%SF676 = icmp ne i32 %highbit675, 0
%460 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %458, i32 %ECX665)
%OF677 = extractvalue { i32, i1 } %460, 1
%461 = and i32 %EDX672, 255
%462 = call i32 @llvm.ctpop.i32(i32 %461)
%463 = and i32 %462, 1
%PF678 = icmp eq i32 %463, 0
%464 = zext i32 %EDX672 to i64
store i64 %464, ptr %EDX-SKT-LOC685, align 1
br label %bb.14
bb.14: ; preds = %bb.13, %bb.10
%465 = sub i32 %R8D637, 7
%466 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %R8D637, i32 7)
%CF679 = extractvalue { i32, i1 } %466, 1
%ZF680 = icmp eq i32 %465, 0
%highbit681 = and i32 -2147483648, %465
%SF682 = icmp ne i32 %highbit681, 0
%467 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %R8D637, i32 7)
%OF683 = extractvalue { i32, i1 } %467, 1
%468 = and i32 %465, 255
%469 = call i32 @llvm.ctpop.i32(i32 %468)
%470 = and i32 %469, 1
%PF684 = icmp eq i32 %470, 0
%CmpCF_JB787 = icmp eq i1 %CF679, true
br i1 %CmpCF_JB787, label %bb.56, label %bb.15
bb.15: ; preds = %bb.14
%471 = load i64, ptr %EDX-SKT-LOC685, align 1
%EDX686 = trunc i64 %471 to i32
%CF687 = icmp ne i32 0, 0
%EDX692 = sub i32 0, %EDX686
%ZF688 = icmp eq i32 %EDX692, 0
%highbit689 = and i32 -2147483648, %EDX692
%SF690 = icmp ne i32 %highbit689, 0
%472 = and i32 %EDX692, 255
%473 = call i32 @llvm.ctpop.i32(i32 %472)
%474 = and i32 %473, 1
%PF691 = icmp eq i32 %474, 0
%475 = zext i32 0 to i64
store i64 %475, ptr %RCX-SKT-LOC693, align 1
br label %bb.16
bb.16: ; preds = %bb.15, %bb.16
%RCX694 = load i64, ptr %RCX-SKT-LOC693, align 1
%RSI696 = load i64, ptr %RSI-SKT-LOC695, align 1
%memref-basereg697 = add i64 %RSI696, %RCX694
%memref-disp698 = add i64 %memref-basereg697, -1
%476 = inttoptr i64 %memref-disp698 to ptr
%memload699 = load i32, ptr %476, align 1
%477 = trunc i32 %memload699 to i8
%EBX700 = zext i8 %477 to i32
%RDI702 = load i64, ptr %RDI-SKT-LOC701, align 1
%memref-basereg703 = add i64 %RDI702, %RCX694
%memref-disp704 = add i64 %memref-basereg703, -1
%478 = trunc i32 %EBX700 to i8
%479 = inttoptr i64 %memref-disp704 to ptr
store i8 %478, ptr %479, align 1
%memref-basereg705 = add i64 %RSI696, %RCX694
%memref-disp706 = add i64 %memref-basereg705, -2
%480 = inttoptr i64 %memref-disp706 to ptr
%memload707 = load i32, ptr %480, align 1
%481 = trunc i32 %memload707 to i8
%EBX708 = zext i8 %481 to i32
%memref-basereg709 = add i64 %RDI702, %RCX694
%memref-disp710 = add i64 %memref-basereg709, -2
%482 = trunc i32 %EBX708 to i8
%483 = inttoptr i64 %memref-disp710 to ptr
store i8 %482, ptr %483, align 1
%memref-basereg711 = add i64 %RSI696, %RCX694
%memref-disp712 = add i64 %memref-basereg711, -3
%484 = inttoptr i64 %memref-disp712 to ptr
%memload713 = load i32, ptr %484, align 1
%485 = trunc i32 %memload713 to i8
%EBX714 = zext i8 %485 to i32
%memref-basereg715 = add i64 %RDI702, %RCX694
%memref-disp716 = add i64 %memref-basereg715, -3
%486 = trunc i32 %EBX714 to i8
%487 = inttoptr i64 %memref-disp716 to ptr
store i8 %486, ptr %487, align 1
%memref-basereg717 = add i64 %RSI696, %RCX694
%memref-disp718 = add i64 %memref-basereg717, -4
%488 = inttoptr i64 %memref-disp718 to ptr
%memload719 = load i32, ptr %488, align 1
%489 = trunc i32 %memload719 to i8
%EBX720 = zext i8 %489 to i32
%memref-basereg721 = add i64 %RDI702, %RCX694
%memref-disp722 = add i64 %memref-basereg721, -4
%490 = trunc i32 %EBX720 to i8
%491 = inttoptr i64 %memref-disp722 to ptr
store i8 %490, ptr %491, align 1
%memref-basereg723 = add i64 %RSI696, %RCX694
%memref-disp724 = add i64 %memref-basereg723, -5
%492 = inttoptr i64 %memref-disp724 to ptr
%memload725 = load i32, ptr %492, align 1
%493 = trunc i32 %memload725 to i8
%EBX726 = zext i8 %493 to i32
%memref-basereg727 = add i64 %RDI702, %RCX694
%memref-disp728 = add i64 %memref-basereg727, -5
%494 = trunc i32 %EBX726 to i8
%495 = inttoptr i64 %memref-disp728 to ptr
store i8 %494, ptr %495, align 1
%memref-basereg729 = add i64 %RSI696, %RCX694
%memref-disp730 = add i64 %memref-basereg729, -6
%496 = inttoptr i64 %memref-disp730 to ptr
%memload731 = load i32, ptr %496, align 1
%497 = trunc i32 %memload731 to i8
%EBX732 = zext i8 %497 to i32
%memref-basereg733 = add i64 %RDI702, %RCX694
%memref-disp734 = add i64 %memref-basereg733, -6
%498 = trunc i32 %EBX732 to i8
%499 = inttoptr i64 %memref-disp734 to ptr
store i8 %498, ptr %499, align 1
%memref-basereg735 = add i64 %RSI696, %RCX694
%memref-disp736 = add i64 %memref-basereg735, -7
%500 = inttoptr i64 %memref-disp736 to ptr
%memload737 = load i32, ptr %500, align 1
%501 = trunc i32 %memload737 to i8
%EBX738 = zext i8 %501 to i32
%memref-basereg739 = add i64 %RDI702, %RCX694
%memref-disp740 = add i64 %memref-basereg739, -7
%502 = trunc i32 %EBX738 to i8
%503 = inttoptr i64 %memref-disp740 to ptr
store i8 %502, ptr %503, align 1
%memref-basereg741 = add i64 %RSI696, %RCX694
%memref-disp742 = add i64 %memref-basereg741, -8
%504 = inttoptr i64 %memref-disp742 to ptr
%memload743 = load i32, ptr %504, align 1
%505 = trunc i32 %memload743 to i8
%EBX744 = zext i8 %505 to i32
%memref-basereg745 = add i64 %RDI702, %RCX694
%memref-disp746 = add i64 %memref-basereg745, -8
%506 = trunc i32 %EBX744 to i8
%507 = inttoptr i64 %memref-disp746 to ptr
store i8 %506, ptr %507, align 1
%RCX753 = add i64 %RCX694, -8
%508 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RCX694, i64 -8)
%CF747 = extractvalue { i64, i1 } %508, 1
%509 = and i64 %RCX753, 255
%510 = call i64 @llvm.ctpop.i64(i64 %509)
%511 = and i64 %510, 1
%PF748 = icmp eq i64 %511, 0
%ZF749 = icmp eq i64 %RCX753, 0
%highbit750 = and i64 -9223372036854775808, %RCX753
%SF751 = icmp ne i64 %highbit750, 0
%512 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RCX694, i64 -8)
%OF752 = extractvalue { i64, i1 } %512, 1
%513 = trunc i64 %RCX753 to i32
%514 = sub i32 %EDX692, %513
%515 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EDX692, i32 %513)
%CF754 = extractvalue { i32, i1 } %515, 1
%ZF755 = icmp eq i32 %514, 0
%highbit756 = and i32 -2147483648, %514
%SF757 = icmp ne i32 %highbit756, 0
%516 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EDX692, i32 %513)
%OF758 = extractvalue { i32, i1 } %516, 1
%517 = and i32 %514, 255
%518 = call i32 @llvm.ctpop.i32(i32 %517)
%519 = and i32 %518, 1
%PF759 = icmp eq i32 %519, 0
%CmpZF_JNE788 = icmp eq i1 %ZF755, false
store i64 %RCX753, ptr %RCX-SKT-LOC693, align 1
br i1 %CmpZF_JNE788, label %bb.16, label %bb.17
bb.17: ; preds = %bb.16
br label %bb.56
bb.56: ; preds = %bb.17, %bb.14, %bb.47, %bb.42, %bb.6, %bb.55, %bb.53, %bb.33, %bb.28, %bb.1
ret i64 %arg1
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/radare2/shlr/grub/kern/extr_misc.c_grub_memmove.c'
source_filename = "AnghaBench/radare2/shlr/grub/kern/extr_misc.c_grub_memmove.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync)
define noundef ptr @grub_memmove(ptr noundef returned writeonly %0, ptr noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = ptrtoint ptr %1 to i64
%5 = ptrtoint ptr %0 to i64
%6 = ptrtoint ptr %1 to i64
%7 = icmp ult ptr %0, %1
%8 = icmp eq i32 %2, 0
br i1 %7, label %9, label %74
9: ; preds = %3
br i1 %8, label %154, label %10
10: ; preds = %9
%11 = zext i32 %2 to i64
%12 = icmp ult i32 %2, 8
%13 = sub i64 %5, %4
%14 = icmp ult i64 %13, 64
%15 = or i1 %12, %14
br i1 %15, label %61, label %16
16: ; preds = %10
%17 = icmp ult i32 %2, 64
br i1 %17, label %45, label %18
18: ; preds = %16
%19 = and i64 %11, 4294967232
br label %20
20: ; preds = %20, %18
%21 = phi i64 [ 0, %18 ], [ %34, %20 ]
%22 = getelementptr i8, ptr %1, i64 %21
%23 = getelementptr i8, ptr %0, i64 %21
%24 = getelementptr i8, ptr %22, i64 16
%25 = getelementptr i8, ptr %22, i64 32
%26 = getelementptr i8, ptr %22, i64 48
%27 = load <16 x i8>, ptr %22, align 1, !tbaa !6
%28 = load <16 x i8>, ptr %24, align 1, !tbaa !6
%29 = load <16 x i8>, ptr %25, align 1, !tbaa !6
%30 = load <16 x i8>, ptr %26, align 1, !tbaa !6
%31 = getelementptr i8, ptr %23, i64 16
%32 = getelementptr i8, ptr %23, i64 32
%33 = getelementptr i8, ptr %23, i64 48
store <16 x i8> %27, ptr %23, align 1, !tbaa !6
store <16 x i8> %28, ptr %31, align 1, !tbaa !6
store <16 x i8> %29, ptr %32, align 1, !tbaa !6
store <16 x i8> %30, ptr %33, align 1, !tbaa !6
%34 = add nuw i64 %21, 64
%35 = icmp eq i64 %34, %19
br i1 %35, label %36, label %20, !llvm.loop !9
36: ; preds = %20
%37 = icmp eq i64 %19, %11
br i1 %37, label %154, label %38
38: ; preds = %36
%39 = trunc nuw i64 %19 to i32
%40 = sub i32 %2, %39
%41 = getelementptr i8, ptr %0, i64 %19
%42 = getelementptr i8, ptr %1, i64 %19
%43 = and i64 %11, 56
%44 = icmp eq i64 %43, 0
br i1 %44, label %61, label %45
45: ; preds = %16, %38
%46 = phi i64 [ %19, %38 ], [ 0, %16 ]
%47 = and i64 %11, 4294967288
%48 = getelementptr i8, ptr %1, i64 %47
%49 = getelementptr i8, ptr %0, i64 %47
%50 = trunc nuw i64 %47 to i32
%51 = sub i32 %2, %50
br label %52
52: ; preds = %52, %45
%53 = phi i64 [ %46, %45 ], [ %57, %52 ]
%54 = getelementptr i8, ptr %1, i64 %53
%55 = getelementptr i8, ptr %0, i64 %53
%56 = load <8 x i8>, ptr %54, align 1, !tbaa !6
store <8 x i8> %56, ptr %55, align 1, !tbaa !6
%57 = add nuw i64 %53, 8
%58 = icmp eq i64 %57, %47
br i1 %58, label %59, label %52, !llvm.loop !13
59: ; preds = %52
%60 = icmp eq i64 %47, %11
br i1 %60, label %154, label %61
61: ; preds = %59, %10, %38
%62 = phi ptr [ %1, %10 ], [ %42, %38 ], [ %48, %59 ]
%63 = phi ptr [ %0, %10 ], [ %41, %38 ], [ %49, %59 ]
%64 = phi i32 [ %2, %10 ], [ %40, %38 ], [ %51, %59 ]
br label %65
65: ; preds = %61, %65
%66 = phi ptr [ %70, %65 ], [ %62, %61 ]
%67 = phi ptr [ %72, %65 ], [ %63, %61 ]
%68 = phi i32 [ %69, %65 ], [ %64, %61 ]
%69 = add nsw i32 %68, -1
%70 = getelementptr inbounds i8, ptr %66, i64 1
%71 = load i8, ptr %66, align 1, !tbaa !6
%72 = getelementptr inbounds i8, ptr %67, i64 1
store i8 %71, ptr %67, align 1, !tbaa !6
%73 = icmp eq i32 %69, 0
br i1 %73, label %154, label %65, !llvm.loop !14
74: ; preds = %3
br i1 %8, label %154, label %75
75: ; preds = %74
%76 = sext i32 %2 to i64
%77 = getelementptr inbounds i8, ptr %1, i64 %76
%78 = getelementptr inbounds i8, ptr %0, i64 %76
%79 = zext i32 %2 to i64
%80 = icmp ult i32 %2, 8
%81 = sub i64 %6, %5
%82 = icmp ult i64 %81, 64
%83 = or i1 %80, %82
br i1 %83, label %141, label %84
84: ; preds = %75
%85 = icmp ult i32 %2, 64
br i1 %85, label %119, label %86
86: ; preds = %84
%87 = and i64 %79, 4294967232
br label %88
88: ; preds = %88, %86
%89 = phi i64 [ 0, %86 ], [ %106, %88 ]
%90 = sub i64 0, %89
%91 = getelementptr i8, ptr %77, i64 %90
%92 = sub i64 0, %89
%93 = getelementptr i8, ptr %78, i64 %92
%94 = getelementptr inbounds i8, ptr %91, i64 -16
%95 = getelementptr inbounds i8, ptr %91, i64 -32
%96 = getelementptr inbounds i8, ptr %91, i64 -48
%97 = getelementptr inbounds i8, ptr %91, i64 -64
%98 = load <16 x i8>, ptr %94, align 1, !tbaa !6
%99 = load <16 x i8>, ptr %95, align 1, !tbaa !6
%100 = load <16 x i8>, ptr %96, align 1, !tbaa !6
%101 = load <16 x i8>, ptr %97, align 1, !tbaa !6
%102 = getelementptr inbounds i8, ptr %93, i64 -16
%103 = getelementptr inbounds i8, ptr %93, i64 -32
%104 = getelementptr inbounds i8, ptr %93, i64 -48
%105 = getelementptr inbounds i8, ptr %93, i64 -64
store <16 x i8> %98, ptr %102, align 1, !tbaa !6
store <16 x i8> %99, ptr %103, align 1, !tbaa !6
store <16 x i8> %100, ptr %104, align 1, !tbaa !6
store <16 x i8> %101, ptr %105, align 1, !tbaa !6
%106 = add nuw i64 %89, 64
%107 = icmp eq i64 %106, %87
br i1 %107, label %108, label %88, !llvm.loop !15
108: ; preds = %88
%109 = icmp eq i64 %87, %79
br i1 %109, label %154, label %110
110: ; preds = %108
%111 = trunc nuw i64 %87 to i32
%112 = sub i32 %2, %111
%113 = sub nsw i64 0, %87
%114 = getelementptr i8, ptr %78, i64 %113
%115 = sub nsw i64 0, %87
%116 = getelementptr i8, ptr %77, i64 %115
%117 = and i64 %79, 56
%118 = icmp eq i64 %117, 0
br i1 %118, label %141, label %119
119: ; preds = %84, %110
%120 = phi i64 [ %87, %110 ], [ 0, %84 ]
%121 = and i64 %79, 4294967288
%122 = sub nsw i64 0, %121
%123 = getelementptr i8, ptr %77, i64 %122
%124 = sub nsw i64 0, %121
%125 = getelementptr i8, ptr %78, i64 %124
%126 = trunc nuw i64 %121 to i32
%127 = sub i32 %2, %126
%128 = getelementptr i8, ptr %77, i64 -8
%129 = getelementptr i8, ptr %78, i64 -8
br label %130
130: ; preds = %130, %119
%131 = phi i64 [ %120, %119 ], [ %137, %130 ]
%132 = sub i64 0, %131
%133 = sub i64 0, %131
%134 = getelementptr i8, ptr %128, i64 %132
%135 = load <8 x i8>, ptr %134, align 1, !tbaa !6
%136 = getelementptr i8, ptr %129, i64 %133
store <8 x i8> %135, ptr %136, align 1, !tbaa !6
%137 = add nuw i64 %131, 8
%138 = icmp eq i64 %137, %121
br i1 %138, label %139, label %130, !llvm.loop !16
139: ; preds = %130
%140 = icmp eq i64 %121, %79
br i1 %140, label %154, label %141
141: ; preds = %139, %75, %110
%142 = phi ptr [ %77, %75 ], [ %116, %110 ], [ %123, %139 ]
%143 = phi ptr [ %78, %75 ], [ %114, %110 ], [ %125, %139 ]
%144 = phi i32 [ %2, %75 ], [ %112, %110 ], [ %127, %139 ]
br label %145
145: ; preds = %141, %145
%146 = phi ptr [ %150, %145 ], [ %142, %141 ]
%147 = phi ptr [ %152, %145 ], [ %143, %141 ]
%148 = phi i32 [ %149, %145 ], [ %144, %141 ]
%149 = add nsw i32 %148, -1
%150 = getelementptr inbounds i8, ptr %146, i64 -1
%151 = load i8, ptr %150, align 1, !tbaa !6
%152 = getelementptr inbounds i8, ptr %147, i64 -1
store i8 %151, ptr %152, align 1, !tbaa !6
%153 = icmp eq i32 %149, 0
br i1 %153, label %154, label %145, !llvm.loop !17
154: ; preds = %145, %65, %108, %139, %36, %59, %74, %9
ret ptr %0
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !11, !12}
!14 = distinct !{!14, !10, !11}
!15 = distinct !{!15, !10, !11, !12}
!16 = distinct !{!16, !10, !11, !12}
!17 = distinct !{!17, !10, !11}
| radare2_shlr_grub_kern_extr_misc.c_grub_memmove |
; ModuleID = 'linux_net_sctp_extr_stream_sched.c_sctp_sched_fcfs_sched_all.so'
source_filename = "linux_net_sctp_extr_stream_sched.c_sctp_sched_fcfs_sched_all.so"
define dso_local void @sctp_sched_fcfs_sched_all() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/linux/net/sctp/extr_stream_sched.c_sctp_sched_fcfs_sched_all.c'
source_filename = "AnghaBench/linux/net/sctp/extr_stream_sched.c_sctp_sched_fcfs_sched_all.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @sctp_sched_fcfs_sched_all], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @sctp_sched_fcfs_sched_all(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_net_sctp_extr_stream_sched.c_sctp_sched_fcfs_sched_all |
; ModuleID = 'freebsd_stand_kshim_extr_bsd_kernel.c_rman_get_bustag.so'
source_filename = "freebsd_stand_kshim_extr_bsd_kernel.c_rman_get_bustag.so"
define dso_local i32 @rman_get_bustag(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
ret i32 %memload
}
| ; ModuleID = 'AnghaBench/freebsd/stand/kshim/extr_bsd_kernel.c_rman_get_bustag.c'
source_filename = "AnghaBench/freebsd/stand/kshim/extr_bsd_kernel.c_rman_get_bustag.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define i32 @rman_get_bustag(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
ret i32 %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"resource", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_stand_kshim_extr_bsd_kernel.c_rman_get_bustag |
; ModuleID = 'fastsocket_kernel_drivers_ata_extr_libata-core.c_atapi_cmd_type.so'
source_filename = "fastsocket_kernel_drivers_ata_extr_libata-core.c_atapi_cmd_type.so"
@ATAPI_WRITE = common dso_local global i32 0, align 4
@ATAPI_READ_CD = common dso_local global i32 0, align 4
@atapi_passthru16 = common dso_local global i32 0, align 4
@ATAPI_PASS_THRU = common dso_local global i32 0, align 4
@ATAPI_MISC = common dso_local global i32 0, align 4
define dso_local i32 @atapi_cmd_type(i32 %arg1) {
entry:
%EDI = add i32 %arg1, -128
%0 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %arg1, i32 -128)
%CF = extractvalue { i32, i1 } %0, 1
%1 = and i32 %EDI, 255
%2 = call i32 @llvm.ctpop.i32(i32 %1)
%3 = and i32 %2, 1
%PF = icmp eq i32 %3, 0
%ZF = icmp eq i32 %EDI, 0
%highbit = and i32 -2147483648, %EDI
%SF = icmp ne i32 %highbit, 0
%4 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %arg1, i32 -128)
%OF = extractvalue { i32, i1 } %4, 1
%5 = sub i32 %EDI, 8
%6 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EDI, i32 8)
%CF1 = extractvalue { i32, i1 } %6, 1
%ZF2 = icmp eq i32 %5, 0
%highbit3 = and i32 -2147483648, %5
%SF4 = icmp ne i32 %highbit3, 0
%7 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EDI, i32 8)
%OF5 = extractvalue { i32, i1 } %7, 1
%8 = and i32 %5, 255
%9 = call i32 @llvm.ctpop.i32(i32 %8)
%10 = and i32 %9, 1
%PF6 = icmp eq i32 %10, 0
switch i32 %arg1, label %bb.4 [
i32 0, label %bb.2
i32 1, label %bb.2
i32 2, label %bb.2
i32 3, label %bb.2
i32 4, label %bb.2
i32 5, label %bb.4
i32 6, label %bb.4
i32 7, label %bb.2
i32 8, label %bb.2
]
bb.2: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry
%memload = load i32, ptr @ATAPI_WRITE, align 1
ret i32 %memload
%memload7 = load i32, ptr @ATAPI_READ_CD, align 1
ret i32 %memload7
%11 = load i32, ptr @atapi_passthru16, align 4
%12 = zext i32 %11 to i64
%13 = zext i32 0 to i64
%14 = sub i64 %12, %13
%15 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %12, i64 %13)
%CF8 = extractvalue { i64, i1 } %15, 1
%ZF9 = icmp eq i64 %14, 0
%highbit10 = and i64 -9223372036854775808, %14
%SF11 = icmp ne i64 %highbit10, 0
%16 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %12, i64 %13)
%OF12 = extractvalue { i64, i1 } %16, 1
%17 = and i64 %14, 255
%18 = call i64 @llvm.ctpop.i64(i64 %17)
%19 = and i64 %18, 1
%PF13 = icmp eq i64 %19, 0
%CmpZF_JE = icmp eq i1 %ZF9, true
br i1 %CmpZF_JE, label %bb.4, label %bb.3
bb.3: ; preds = %bb.2
%memload14 = load i32, ptr @ATAPI_PASS_THRU, align 1
br label %UnifiedReturnBlock
bb.4: ; preds = %bb.2, %entry, %entry, %entry
%memload15 = load i32, ptr @ATAPI_MISC, align 1
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.4, %bb.3
%UnifiedRetVal = phi i32 [ %memload14, %bb.3 ], [ %memload15, %bb.4 ]
ret i32 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/ata/extr_libata-core.c_atapi_cmd_type.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/ata/extr_libata-core.c_atapi_cmd_type.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ATAPI_READ = common local_unnamed_addr global i32 0, align 4
@ATAPI_WRITE = common local_unnamed_addr global i32 0, align 4
@ATAPI_READ_CD = common local_unnamed_addr global i32 0, align 4
@atapi_passthru16 = common local_unnamed_addr global i32 0, align 4
@ATAPI_PASS_THRU = common local_unnamed_addr global i32 0, align 4
@ATAPI_MISC = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define i32 @atapi_cmd_type(i32 noundef %0) local_unnamed_addr #0 {
switch i32 %0, label %7 [
i32 134, label %8
i32 133, label %8
i32 130, label %2
i32 129, label %2
i32 128, label %2
i32 132, label %3
i32 131, label %3
i32 135, label %4
i32 136, label %4
]
2: ; preds = %1, %1, %1
br label %8
3: ; preds = %1, %1
br label %8
4: ; preds = %1, %1
%5 = load i32, ptr @atapi_passthru16, align 4, !tbaa !6
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %4, %1
br label %8
8: ; preds = %4, %1, %1, %7, %3, %2
%9 = phi ptr [ @ATAPI_MISC, %7 ], [ @ATAPI_READ_CD, %3 ], [ @ATAPI_WRITE, %2 ], [ @ATAPI_READ, %1 ], [ @ATAPI_READ, %1 ], [ @ATAPI_PASS_THRU, %4 ]
%10 = load i32, ptr %9, align 4, !tbaa !6
ret i32 %10
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_ata_extr_libata-core.c_atapi_cmd_type |
; ModuleID = 'freebsd_contrib_gdb_gdb_extr_lin-lwp.c_resumed_callback.so'
source_filename = "freebsd_contrib_gdb_gdb_extr_lin-lwp.c_resumed_callback.so"
define dso_local i32 @resumed_callback(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
ret i32 %memload
}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_lin-lwp.c_resumed_callback.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_lin-lwp.c_resumed_callback.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @resumed_callback], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal i32 @resumed_callback(ptr nocapture noundef readonly %0, ptr nocapture readnone %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
ret i32 %3
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"lwp_info", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_gdb_gdb_extr_lin-lwp.c_resumed_callback |
; ModuleID = 'linux_tools_testing_selftests_vDSO_extr_..kselftest.h_ksft_print_header.so'
source_filename = "linux_tools_testing_selftests_vDSO_extr_..kselftest.h_ksft_print_header.so"
@0 = private unnamed_addr constant [30 x i8] c"KSFT_TAP_LEVEL\00TAP version 13\00", align 1, !ROData_SecInfo !0
declare dso_local ptr @getenv(ptr)
declare dso_local i32 @puts(ptr)
define dso_local i32 @ksft_print_header() {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%0 = call ptr @getenv(ptr @0)
%RAX = ptrtoint ptr %0 to i64
%1 = trunc i64 %RAX to i32
%2 = trunc i64 %RAX to i32
%3 = and i32 %1, %2
%highbit = and i32 -2147483648, %3
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %3, 0
%4 = and i32 %3, 255
%5 = call i32 @llvm.ctpop.i32(i32 %4)
%6 = and i32 %5, 1
%PF = icmp eq i32 %6, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%7 = trunc i64 %RAX to i32
br label %UnifiedReturnBlock
bb.2: ; preds = %entry
%EAX = tail call i32 @puts(ptr getelementptr inbounds ([30 x i8], ptr @0, i32 0, i32 15))
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.2, %bb.1
%UnifiedRetVal = phi i32 [ %7, %bb.1 ], [ %EAX, %bb.2 ]
ret i32 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/linux/tools/testing/selftests/vDSO/extr_..kselftest.h_ksft_print_header.c'
source_filename = "AnghaBench/linux/tools/testing/selftests/vDSO/extr_..kselftest.h_ksft_print_header.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [15 x i8] c"KSFT_TAP_LEVEL\00", align 1
@.str.1 = private unnamed_addr constant [16 x i8] c"TAP version 13\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ksft_print_header], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @ksft_print_header() #0 {
%1 = tail call i32 @getenv(ptr noundef nonnull @.str) #2
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @printf(ptr noundef nonnull @.str.1) #2
br label %5
5: ; preds = %3, %0
ret void
}
declare i32 @getenv(ptr noundef) local_unnamed_addr #1
declare i32 @printf(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_tools_testing_selftests_vDSO_extr_..kselftest.h_ksft_print_header |
; ModuleID = 'fastsocket_kernel_net_sctp_extr_protocol.c_sctp_inet_send_verify.so'
source_filename = "fastsocket_kernel_net_sctp_extr_protocol.c_sctp_inet_send_verify.so"
define dso_local i32 @sctp_inet_send_verify() {
entry:
ret i32 1
}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/sctp/extr_protocol.c_sctp_inet_send_verify.c'
source_filename = "AnghaBench/fastsocket/kernel/net/sctp/extr_protocol.c_sctp_inet_send_verify.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @sctp_inet_send_verify], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @sctp_inet_send_verify(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
ret i32 1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_net_sctp_extr_protocol.c_sctp_inet_send_verify |
; ModuleID = 'linux_drivers_gpu_drm_extr_drm_crtc_helper_internal.h_drm_dp_aux_unregister_devnode.so'
source_filename = "linux_drivers_gpu_drm_extr_drm_crtc_helper_internal.h_drm_dp_aux_unregister_devnode.so"
define dso_local void @drm_dp_aux_unregister_devnode() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/extr_drm_crtc_helper_internal.h_drm_dp_aux_unregister_devnode.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/extr_drm_crtc_helper_internal.h_drm_dp_aux_unregister_devnode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @drm_dp_aux_unregister_devnode], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @drm_dp_aux_unregister_devnode(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_gpu_drm_extr_drm_crtc_helper_internal.h_drm_dp_aux_unregister_devnode |
; ModuleID = 'git_extr_wt-status.c_wt_status_check_worktree_changes.so'
source_filename = "git_extr_wt-status.c_wt_status_check_worktree_changes.so"
@DIFF_STATUS_DELETED = common dso_local global i64 0, align 8
@DIFF_STATUS_UNMERGED = common dso_local global i64 0, align 8
define dso_local i32 @wt_status_check_worktree_changes(i64 %arg1, i64 %arg2) {
entry:
%EAX-SKT-LOC44 = alloca i32, align 4
%R15D-SKT-LOC = alloca i32, align 4
%EBP-SKT-LOC = alloca i32, align 4
%EAX-SKT-LOC = alloca i64, align 8
%R11-SKT-LOC = alloca i64, align 8
%RDX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%0 = inttoptr i64 %arg2 to ptr
store i32 0, ptr %0, align 1
%1 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %1, align 1
%2 = and i32 %memload, %memload
%highbit = and i32 -2147483648, %2
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %2, 0
%3 = and i32 %2, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
store i32 %memload, ptr %R15D-SKT-LOC, align 1
%CmpZF_JLE = icmp eq i1 %ZF, true
%CmpOF_JLE = icmp ne i1 %SF, false
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
br i1 %ZFOrSF_JLE, label %bb.11, label %bb.1
bb.1: ; preds = %entry
%memref-disp = add i64 %arg1, 8
%6 = inttoptr i64 %memref-disp to ptr
%memload1 = load i64, ptr %6, align 1
%memload2 = load i64, ptr @DIFF_STATUS_DELETED, align 1
%memload3 = load i64, ptr @DIFF_STATUS_UNMERGED, align 1
%7 = zext i32 0 to i64
store i64 %7, ptr %RDX-SKT-LOC, align 1
store i64 %memload3, ptr %R11-SKT-LOC, align 1
%8 = zext i32 0 to i64
store i64 %8, ptr %EAX-SKT-LOC, align 1
store i32 0, ptr %EAX-SKT-LOC44, align 1
br label %bb.5
bb.5: ; preds = %bb.4, %bb.1
%RDX = load i64, ptr %RDX-SKT-LOC, align 1
%memref-idxreg = mul i64 8, %RDX
%memref-basereg = add i64 %memload1, %memref-idxreg
%9 = inttoptr i64 %memref-basereg to ptr
%memload4 = load i64, ptr %9, align 1
%10 = inttoptr i64 %memload4 to ptr
%memload5 = load i64, ptr %10, align 1
%11 = and i64 %memload5, %memload5
%highbit6 = and i64 -9223372036854775808, %11
%SF7 = icmp ne i64 %highbit6, 0
%ZF8 = icmp eq i64 %11, 0
%12 = and i64 %11, 255
%13 = call i64 @llvm.ctpop.i64(i64 %12)
%14 = and i64 %13, 1
%PF9 = icmp eq i64 %14, 0
%CmpZF_JE = icmp eq i1 %ZF8, true
br i1 %CmpZF_JE, label %bb.4, label %bb.6
bb.6: ; preds = %bb.5
%R11 = load i64, ptr %R11-SKT-LOC, align 1
%15 = sub i64 %memload5, %R11
%16 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload5, i64 %R11)
%CF = extractvalue { i64, i1 } %16, 1
%ZF10 = icmp eq i64 %15, 0
%highbit11 = and i64 -9223372036854775808, %15
%SF12 = icmp ne i64 %highbit11, 0
%17 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload5, i64 %R11)
%OF = extractvalue { i64, i1 } %17, 1
%18 = and i64 %15, 255
%19 = call i64 @llvm.ctpop.i64(i64 %18)
%20 = and i64 %19, 1
%PF13 = icmp eq i64 %20, 0
%CmpZF_JE46 = icmp eq i1 %ZF10, true
br i1 %CmpZF_JE46, label %bb.4, label %bb.7
bb.7: ; preds = %bb.6
%21 = load i64, ptr %EAX-SKT-LOC, align 1
%EAX = trunc i64 %21 to i32
%22 = and i32 %EAX, %EAX
%highbit14 = and i32 -2147483648, %22
%SF15 = icmp ne i32 %highbit14, 0
%ZF16 = icmp eq i32 %22, 0
%23 = and i32 %22, 255
%24 = call i32 @llvm.ctpop.i32(i32 %23)
%25 = and i32 %24, 1
%PF17 = icmp eq i32 %25, 0
store i32 1, ptr %EBP-SKT-LOC, align 1
%CmpZF_JE47 = icmp eq i1 %ZF16, true
br i1 %CmpZF_JE47, label %bb.9, label %bb.8
bb.8: ; preds = %bb.7
store i32 %EAX, ptr %EBP-SKT-LOC, align 1
br label %bb.9
bb.9: ; preds = %bb.8, %bb.7
%memref-disp18 = add i64 %memload4, 8
%26 = inttoptr i64 %memref-disp18 to ptr
%27 = load i64, ptr %26, align 1
%28 = sub i64 %27, 0
%29 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %27, i64 0)
%CF19 = extractvalue { i64, i1 } %29, 1
%ZF20 = icmp eq i64 %28, 0
%highbit21 = and i64 -9223372036854775808, %28
%SF22 = icmp ne i64 %highbit21, 0
%30 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %27, i64 0)
%OF23 = extractvalue { i64, i1 } %30, 1
%31 = and i64 %28, 255
%32 = call i64 @llvm.ctpop.i64(i64 %31)
%33 = and i64 %32, 1
%PF24 = icmp eq i64 %33, 0
%CmpZF_JE48 = icmp eq i1 %ZF20, true
br i1 %CmpZF_JE48, label %bb.3, label %bb.10
bb.10: ; preds = %bb.9
%34 = inttoptr i64 %arg2 to ptr
store i32 1, ptr %34, align 1
%memload25 = load i64, ptr @DIFF_STATUS_UNMERGED, align 1
%35 = inttoptr i64 %arg1 to ptr
%memload26 = load i32, ptr %35, align 1
store i32 %memload26, ptr %R15D-SKT-LOC, align 1
store i64 %memload25, ptr %R11-SKT-LOC, align 1
br label %bb.3
bb.3: ; preds = %bb.10, %bb.9
%36 = sub i64 %memload5, %memload2
%37 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload5, i64 %memload2)
%CF27 = extractvalue { i64, i1 } %37, 1
%ZF28 = icmp eq i64 %36, 0
%highbit29 = and i64 -9223372036854775808, %36
%SF30 = icmp ne i64 %highbit29, 0
%38 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload5, i64 %memload2)
%OF31 = extractvalue { i64, i1 } %38, 1
%39 = and i64 %36, 255
%40 = call i64 @llvm.ctpop.i64(i64 %39)
%41 = and i64 %40, 1
%PF32 = icmp eq i64 %41, 0
%EBP = load i32, ptr %EBP-SKT-LOC, align 1
%Cond_CMOVE = icmp eq i1 %ZF28, true
%CMOV = select i1 %Cond_CMOVE, i32 -1, i32 %EBP
store i32 %CMOV, ptr %EAX-SKT-LOC44, align 1
%42 = zext i32 %CMOV to i64
store i64 %42, ptr %EAX-SKT-LOC, align 1
br label %bb.4
bb.4: ; preds = %bb.3, %bb.6, %bb.5
%RDX37 = add i64 %RDX, 1
%43 = and i64 %RDX37, 255
%44 = call i64 @llvm.ctpop.i64(i64 %43)
%45 = and i64 %44, 1
%PF33 = icmp eq i64 %45, 0
%ZF34 = icmp eq i64 %RDX37, 0
%highbit35 = and i64 -9223372036854775808, %RDX37
%SF36 = icmp ne i64 %highbit35, 0
%R15D = load i32, ptr %R15D-SKT-LOC, align 1
%RCX = sext i32 %R15D to i64
%46 = sub i64 %RDX37, %RCX
%47 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RDX37, i64 %RCX)
%CF38 = extractvalue { i64, i1 } %47, 1
%ZF39 = icmp eq i64 %46, 0
%highbit40 = and i64 -9223372036854775808, %46
%SF41 = icmp ne i64 %highbit40, 0
%48 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RDX37, i64 %RCX)
%OF42 = extractvalue { i64, i1 } %48, 1
%49 = and i64 %46, 255
%50 = call i64 @llvm.ctpop.i64(i64 %49)
%51 = and i64 %50, 1
%PF43 = icmp eq i64 %51, 0
%CmpSFOF_JGE = icmp eq i1 %SF41, %OF42
store i64 %RDX37, ptr %RDX-SKT-LOC, align 1
br i1 %CmpSFOF_JGE, label %bb.12, label %bb.5
bb.11: ; preds = %entry
store i32 0, ptr %EAX-SKT-LOC44, align 1
br label %bb.12
bb.12: ; preds = %bb.11, %bb.4
%EAX45 = load i32, ptr %EAX-SKT-LOC44, align 1
ret i32 %EAX45
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/git/extr_wt-status.c_wt_status_check_worktree_changes.c'
source_filename = "AnghaBench/git/extr_wt-status.c_wt_status_check_worktree_changes.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_3__ = type { ptr }
@DIFF_STATUS_UNMERGED = common local_unnamed_addr global i64 0, align 8
@DIFF_STATUS_DELETED = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @wt_status_check_worktree_changes], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal range(i32 -1, 2) i32 @wt_status_check_worktree_changes(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) #0 {
store i32 0, ptr %1, align 4, !tbaa !6
%3 = load i32, ptr %0, align 8, !tbaa !10
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %43
5: ; preds = %2
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load ptr, ptr %6, align 8, !tbaa !14
%8 = load i64, ptr @DIFF_STATUS_DELETED, align 8
%9 = load i64, ptr @DIFF_STATUS_UNMERGED, align 8
br label %10
10: ; preds = %5, %35
%11 = phi i32 [ %3, %5 ], [ %36, %35 ]
%12 = phi i32 [ %3, %5 ], [ %37, %35 ]
%13 = phi i64 [ %9, %5 ], [ %38, %35 ]
%14 = phi i64 [ 0, %5 ], [ %40, %35 ]
%15 = phi i32 [ 0, %5 ], [ %39, %35 ]
%16 = getelementptr inbounds %struct.TYPE_3__, ptr %7, i64 %14
%17 = load ptr, ptr %16, align 8, !tbaa !15
%18 = load i64, ptr %17, align 8, !tbaa !17
%19 = icmp eq i64 %18, 0
%20 = icmp eq i64 %18, %13
%21 = select i1 %19, i1 true, i1 %20
br i1 %21, label %35, label %22
22: ; preds = %10
%23 = tail call i32 @llvm.umax.i32(i32 %15, i32 1)
%24 = getelementptr inbounds i8, ptr %17, i64 8
%25 = load i64, ptr %24, align 8, !tbaa !20
%26 = icmp eq i64 %25, 0
br i1 %26, label %30, label %27
27: ; preds = %22
store i32 1, ptr %1, align 4, !tbaa !6
%28 = load i64, ptr @DIFF_STATUS_UNMERGED, align 8
%29 = load i32, ptr %0, align 8, !tbaa !10
br label %30
30: ; preds = %27, %22
%31 = phi i32 [ %29, %27 ], [ %11, %22 ]
%32 = phi i64 [ %28, %27 ], [ %13, %22 ]
%33 = icmp eq i64 %18, %8
%34 = select i1 %33, i32 -1, i32 %23
br label %35
35: ; preds = %10, %30
%36 = phi i32 [ %31, %30 ], [ %11, %10 ]
%37 = phi i32 [ %31, %30 ], [ %12, %10 ]
%38 = phi i64 [ %32, %30 ], [ %13, %10 ]
%39 = phi i32 [ %34, %30 ], [ %15, %10 ]
%40 = add nuw nsw i64 %14, 1
%41 = sext i32 %37 to i64
%42 = icmp slt i64 %40, %41
br i1 %42, label %10, label %43, !llvm.loop !21
43: ; preds = %35, %2
%44 = phi i32 [ 0, %2 ], [ %39, %35 ]
ret i32 %44
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #1
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"wt_status", !12, i64 0}
!12 = !{!"TYPE_4__", !7, i64 0, !13, i64 8}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!11, !13, i64 8}
!15 = !{!16, !13, i64 0}
!16 = !{!"TYPE_3__", !13, i64 0}
!17 = !{!18, !19, i64 0}
!18 = !{!"wt_status_change_data", !19, i64 0, !19, i64 8}
!19 = !{!"long", !8, i64 0}
!20 = !{!18, !19, i64 8}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
| git_extr_wt-status.c_wt_status_check_worktree_changes |
; ModuleID = 'linux_drivers_irqchip_extr_irq-bcm2836.c_bcm2836_arm_irqchip_mask_gpu_irq.so'
source_filename = "linux_drivers_irqchip_extr_irq-bcm2836.c_bcm2836_arm_irqchip_mask_gpu_irq.so"
define dso_local void @bcm2836_arm_irqchip_mask_gpu_irq() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/linux/drivers/irqchip/extr_irq-bcm2836.c_bcm2836_arm_irqchip_mask_gpu_irq.c'
source_filename = "AnghaBench/linux/drivers/irqchip/extr_irq-bcm2836.c_bcm2836_arm_irqchip_mask_gpu_irq.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @bcm2836_arm_irqchip_mask_gpu_irq], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @bcm2836_arm_irqchip_mask_gpu_irq(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_irqchip_extr_irq-bcm2836.c_bcm2836_arm_irqchip_mask_gpu_irq |
; ModuleID = 'fastsocket_kernel_net_netfilter_extr_nf_conntrack_proto_generic.c_new.so'
source_filename = "fastsocket_kernel_net_netfilter_extr_nf_conntrack_proto_generic.c_new.so"
define dso_local i32 @new() {
entry:
ret i32 1
}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/netfilter/extr_nf_conntrack_proto_generic.c_new.c'
source_filename = "AnghaBench/fastsocket/kernel/net/netfilter/extr_nf_conntrack_proto_generic.c_new.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @new], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @new(ptr nocapture readnone %0, ptr nocapture readnone %1, i32 %2) #0 {
ret i32 1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_net_netfilter_extr_nf_conntrack_proto_generic.c_new |
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