IR_x86 stringlengths 97 189k | IR_arm stringlengths 544 93.4k | filename stringlengths 19 186 |
|---|---|---|
; ModuleID = 'darwin-xnu_libkern_kxld_extr_kxld_kext.c_kxld_kext_sizeof.so'
source_filename = "darwin-xnu_libkern_kxld_extr_kxld_kext.c_kxld_kext_sizeof.so"
define dso_local i32 @kxld_kext_sizeof() {
entry:
ret i32 4
}
| ; ModuleID = 'AnghaBench/darwin-xnu/libkern/kxld/extr_kxld_kext.c_kxld_kext_sizeof.c'
source_filename = "AnghaBench/darwin-xnu/libkern/kxld/extr_kxld_kext.c_kxld_kext_sizeof.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef i64 @kxld_kext_sizeof() local_unnamed_addr #0 {
ret i64 4
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| darwin-xnu_libkern_kxld_extr_kxld_kext.c_kxld_kext_sizeof |
; ModuleID = 'fastsocket_kernel_fs_nfsd_extr_nfs4state.c_is_delegation_stateid.so'
source_filename = "fastsocket_kernel_fs_nfsd_extr_nfs4state.c_is_delegation_stateid.so"
define dso_local i8 @is_delegation_stateid(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%1 = load i64, ptr %0, align 1
%2 = sub i64 %1, 0
%3 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %1, i64 0)
%CF = extractvalue { i64, i1 } %3, 1
%ZF = icmp eq i64 %2, 0
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%4 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %1, i64 0)
%OF = extractvalue { i64, i1 } %4, 1
%5 = and i64 %2, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF = icmp eq i64 %7, 0
%AL = icmp eq i1 %ZF, true
%8 = zext i1 %AL to i8
ret i8 %8
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/fs/nfsd/extr_nfs4state.c_is_delegation_stateid.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/nfsd/extr_nfs4state.c_is_delegation_stateid.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @is_delegation_stateid], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal range(i32 0, 2) i32 @is_delegation_stateid(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_fs_nfsd_extr_nfs4state.c_is_delegation_stateid |
; ModuleID = 'fastsocket_kernel_drivers_staging_zram_extr_zram_drv.c_update_position.so'
source_filename = "fastsocket_kernel_drivers_staging_zram_extr_zram_drv.c_update_position.so"
@PAGE_SIZE = common dso_local global i32 0, align 4
define dso_local i32 @update_position(i64 %arg1, i64 %arg2, i64 %arg3) {
entry:
%ECX-SKT-LOC = alloca i32, align 4
%EAX-SKT-LOC = alloca i32, align 4
%0 = inttoptr i64 %arg3 to ptr
%memload = load i32, ptr %0, align 1
%1 = inttoptr i64 %arg2 to ptr
%memload1 = load i32, ptr %1, align 1
%EAX = add i32 %memload, %memload1
%2 = and i32 %EAX, 255
%3 = call i32 @llvm.ctpop.i32(i32 %2)
%4 = and i32 %3, 1
%PF = icmp eq i32 %4, 0
%memload2 = load i32, ptr @PAGE_SIZE, align 1
%5 = sub i32 %EAX, %memload2
%6 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EAX, i32 %memload2)
%CF = extractvalue { i32, i1 } %6, 1
%ZF = icmp eq i32 %5, 0
%highbit = and i32 -2147483648, %5
%SF = icmp ne i32 %highbit, 0
%7 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EAX, i32 %memload2)
%OF = extractvalue { i32, i1 } %7, 1
%8 = and i32 %5, 255
%9 = call i32 @llvm.ctpop.i32(i32 %8)
%10 = and i32 %9, 1
%PF3 = icmp eq i32 %10, 0
store i32 %EAX, ptr %EAX-SKT-LOC, align 1
store i32 %memload2, ptr %ECX-SKT-LOC, align 1
%SFAndOF_JL = icmp ne i1 %SF, %OF
br i1 %SFAndOF_JL, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%11 = inttoptr i64 %arg1 to ptr
%memload4 = load i32, ptr %11, align 1
%12 = add i32 %memload4, 1
store i32 %12, ptr %11, align 4
%13 = inttoptr i64 %arg3 to ptr
%memload5 = load i32, ptr %13, align 1
%memload6 = load i32, ptr @PAGE_SIZE, align 1
%14 = inttoptr i64 %arg2 to ptr
%memload7 = load i32, ptr %14, align 1
%EAX9 = add i32 %memload5, %memload7
%15 = and i32 %EAX9, 255
%16 = call i32 @llvm.ctpop.i32(i32 %15)
%17 = and i32 %16, 1
%PF8 = icmp eq i32 %17, 0
store i32 %EAX9, ptr %EAX-SKT-LOC, align 1
store i32 %memload6, ptr %ECX-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %entry
%EAX10 = load i32, ptr %EAX-SKT-LOC, align 1
%18 = sext i32 %EAX10 to i64
%19 = lshr i64 %18, 32
%EDX = trunc i64 %19 to i32
%ECX = load i32, ptr %ECX-SKT-LOC, align 1
%20 = sext i32 %EAX10 to i64
%21 = sext i32 %EDX to i64
%div_hb_ls = shl nuw i64 %21, 32
%dividend = or i64 %div_hb_ls, %20
%22 = sext i32 %ECX to i64
%div_q = sdiv i64 %dividend, %22
%EAX11 = trunc i64 %div_q to i32
%div_r = srem i64 %dividend, %22
%EDX12 = trunc i64 %div_r to i32
%23 = inttoptr i64 %arg2 to ptr
store i32 %EDX12, ptr %23, align 1
ret i32 %EAX11
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/zram/extr_zram_drv.c_update_position.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/zram/extr_zram_drv.c_update_position.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PAGE_SIZE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @update_position], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @update_position(ptr nocapture noundef %0, ptr nocapture noundef %1, ptr nocapture noundef readonly %2) #0 {
%4 = load i32, ptr %1, align 4, !tbaa !6
%5 = load i32, ptr %2, align 4, !tbaa !10
%6 = add nsw i32 %5, %4
%7 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !6
%8 = icmp slt i32 %6, %7
br i1 %8, label %16, label %9
9: ; preds = %3
%10 = load i32, ptr %0, align 4, !tbaa !6
%11 = add nsw i32 %10, 1
store i32 %11, ptr %0, align 4, !tbaa !6
%12 = load i32, ptr %1, align 4, !tbaa !6
%13 = load i32, ptr %2, align 4, !tbaa !10
%14 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !6
%15 = add nsw i32 %13, %12
br label %16
16: ; preds = %9, %3
%17 = phi i32 [ %15, %9 ], [ %6, %3 ]
%18 = phi i32 [ %14, %9 ], [ %7, %3 ]
%19 = srem i32 %17, %18
store i32 %19, ptr %1, align 4, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"bio_vec", !7, i64 0}
| fastsocket_kernel_drivers_staging_zram_extr_zram_drv.c_update_position |
; ModuleID = 'rofi_source_dialogs_extr_script.c_get_index.so'
source_filename = "rofi_source_dialogs_extr_script.c_get_index.so"
@UINT_MAX = common dso_local global i32 0, align 4
define dso_local i32 @get_index(i32 %arg1, i32 %arg2) {
entry:
%0 = and i32 %arg2, %arg2
%highbit = and i32 -2147483648, %0
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %0, 0
%1 = and i32 %0, 255
%2 = call i32 @llvm.ctpop.i32(i32 %1)
%3 = and i32 %2, 1
%PF = icmp eq i32 %3, 0
%CmpSF_JS = icmp eq i1 %SF, true
br i1 %CmpSF_JS, label %bb.2, label %bb.1
bb.1: ; preds = %entry
br label %UnifiedReturnBlock
bb.2: ; preds = %entry
%CF = icmp ne i32 0, 0
%ECX = sub i32 0, %arg2
%ZF1 = icmp eq i32 %ECX, 0
%highbit2 = and i32 -2147483648, %ECX
%SF3 = icmp ne i32 %highbit2, 0
%4 = and i32 %ECX, 255
%5 = call i32 @llvm.ctpop.i32(i32 %4)
%6 = and i32 %5, 1
%PF4 = icmp eq i32 %6, 0
%7 = sub i32 %ECX, %arg1
%8 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %ECX, i32 %arg1)
%CF5 = extractvalue { i32, i1 } %8, 1
%ZF6 = icmp eq i32 %7, 0
%highbit7 = and i32 -2147483648, %7
%SF8 = icmp ne i32 %highbit7, 0
%9 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %ECX, i32 %arg1)
%OF = extractvalue { i32, i1 } %9, 1
%10 = and i32 %7, 255
%11 = call i32 @llvm.ctpop.i32(i32 %10)
%12 = and i32 %11, 1
%PF9 = icmp eq i32 %12, 0
%CFCmp_JBE = icmp eq i1 %CF5, true
%ZFCmp_JBE = icmp eq i1 %ZF6, true
%CFAndZF_JBE = or i1 %ZFCmp_JBE, %CFCmp_JBE
br i1 %CFAndZF_JBE, label %bb.4, label %bb.3
bb.3: ; preds = %bb.2
%memload = load i32, ptr @UINT_MAX, align 1
br label %UnifiedReturnBlock
bb.4: ; preds = %bb.2
%EAX = add nsw i32 %arg2, %arg1
%highbit10 = and i32 -2147483648, %EAX
%SF11 = icmp ne i32 %highbit10, 0
%ZF12 = icmp eq i32 %EAX, 0
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.4, %bb.3, %bb.1
%UnifiedRetVal = phi i32 [ %arg2, %bb.1 ], [ %memload, %bb.3 ], [ %EAX, %bb.4 ]
ret i32 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/rofi/source/dialogs/extr_script.c_get_index.c'
source_filename = "AnghaBench/rofi/source/dialogs/extr_script.c_get_index.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@UINT_MAX = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @get_index], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal i32 @get_index(i32 noundef %0, i32 noundef %1) #0 {
%3 = icmp sgt i32 %1, -1
br i1 %3, label %11, label %4
4: ; preds = %2
%5 = sub nsw i32 0, %1
%6 = icmp ugt i32 %5, %0
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = add i32 %1, %0
br label %11
9: ; preds = %4
%10 = load i32, ptr @UINT_MAX, align 4, !tbaa !6
br label %11
11: ; preds = %2, %9, %7
%12 = phi i32 [ %8, %7 ], [ %10, %9 ], [ %1, %2 ]
ret i32 %12
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| rofi_source_dialogs_extr_script.c_get_index |
; ModuleID = 'linux_drivers_media_dvb-frontends_extr_or51211.c_or51211_read_ucblocks.so'
source_filename = "linux_drivers_media_dvb-frontends_extr_or51211.c_or51211_read_ucblocks.so"
@ENOSYS = common dso_local global i32 0, align 4
define dso_local i32 @or51211_read_ucblocks(i64 %arg1, i64 %arg2) {
entry:
%0 = load i32, ptr @ENOSYS, align 4
%ECX = sub i32 0, %0
%1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 0, i32 %0)
%CF = extractvalue { i32, i1 } %1, 1
%ZF = icmp eq i32 %ECX, 0
%highbit = and i32 -2147483648, %ECX
%SF = icmp ne i32 %highbit, 0
%2 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 0, i32 %0)
%OF = extractvalue { i32, i1 } %2, 1
%3 = and i32 %ECX, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
%6 = inttoptr i64 %arg2 to ptr
store i32 %ECX, ptr %6, align 1
ret i32 0
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/media/dvb-frontends/extr_or51211.c_or51211_read_ucblocks.c'
source_filename = "AnghaBench/linux/drivers/media/dvb-frontends/extr_or51211.c_or51211_read_ucblocks.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENOSYS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @or51211_read_ucblocks], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync)
define internal noundef i32 @or51211_read_ucblocks(ptr nocapture readnone %0, ptr nocapture noundef writeonly %1) #0 {
%3 = load i32, ptr @ENOSYS, align 4, !tbaa !6
%4 = sub nsw i32 0, %3
store i32 %4, ptr %1, align 4, !tbaa !6
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_media_dvb-frontends_extr_or51211.c_or51211_read_ucblocks |
; ModuleID = 'freebsd_contrib_ofed_opensm_opensm_extr_osm_ucast_dfsssp.c_set_default_vertex.so'
source_filename = "freebsd_contrib_ofed_opensm_opensm_extr_osm_ucast_dfsssp.c_set_default_vertex.so"
@UNDISCOVERED = common dso_local global i32 0, align 4
@FALSE = common dso_local global i32 0, align 4
define dso_local i32 @set_default_vertex(i64 %arg1) {
entry:
%memref-disp = add i64 %arg1, 64
%0 = inttoptr i64 %memref-disp to ptr
store <4 x float> zeroinitializer, ptr %0, align 1
%memref-disp1 = add i64 %arg1, 48
%1 = inttoptr i64 %memref-disp1 to ptr
store <4 x float> zeroinitializer, ptr %1, align 1
%memref-disp2 = add i64 %arg1, 32
%2 = inttoptr i64 %memref-disp2 to ptr
store <4 x float> zeroinitializer, ptr %2, align 1
%memref-disp3 = add i64 %arg1, 80
%3 = inttoptr i64 %memref-disp3 to ptr
%4 = sext i32 0 to i64
store i64 %4, ptr %3, align 1
%memload = load i32, ptr @UNDISCOVERED, align 1
%memref-disp4 = add i64 %arg1, 24
%5 = inttoptr i64 %memref-disp4 to ptr
store i32 %memload, ptr %5, align 1
%memref-disp5 = add i64 %arg1, 8
%6 = inttoptr i64 %memref-disp5 to ptr
store <4 x float> zeroinitializer, ptr %6, align 1
%memload6 = load i32, ptr @FALSE, align 1
%7 = inttoptr i64 %arg1 to ptr
store i32 %memload6, ptr %7, align 1
ret i32 %memload6
}
| ; ModuleID = 'AnghaBench/freebsd/contrib/ofed/opensm/opensm/extr_osm_ucast_dfsssp.c_set_default_vertex.c'
source_filename = "AnghaBench/freebsd/contrib/ofed/opensm/opensm/extr_osm_ucast_dfsssp.c_set_default_vertex.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@UNDISCOVERED = common local_unnamed_addr global i32 0, align 4
@FALSE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @set_default_vertex], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync)
define internal void @set_default_vertex(ptr nocapture noundef writeonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 32
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(56) %2, i8 0, i64 56, i1 false)
%3 = load i32, ptr @UNDISCOVERED, align 4, !tbaa !6
%4 = getelementptr inbounds i8, ptr %0, i64 24
store i32 %3, ptr %4, align 8, !tbaa !10
%5 = getelementptr inbounds i8, ptr %0, i64 8
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %5, i8 0, i64 16, i1 false)
%6 = load i32, ptr @FALSE, align 4, !tbaa !6
store i32 %6, ptr %0, align 8, !tbaa !14
ret void
}
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 24}
!11 = !{!"TYPE_3__", !7, i64 0, !12, i64 8, !13, i64 16, !7, i64 24, !13, i64 32, !12, i64 40, !13, i64 48, !12, i64 56, !13, i64 64, !13, i64 72, !13, i64 80}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!11, !7, i64 0}
| freebsd_contrib_ofed_opensm_opensm_extr_osm_ucast_dfsssp.c_set_default_vertex |
; ModuleID = 'linux_drivers_i2c_extr_i2c-core-base.c_dummy_probe.so'
source_filename = "linux_drivers_i2c_extr_i2c-core-base.c_dummy_probe.so"
define dso_local i32 @dummy_probe() {
entry:
ret i32 0
}
| ; ModuleID = 'AnghaBench/linux/drivers/i2c/extr_i2c-core-base.c_dummy_probe.c'
source_filename = "AnghaBench/linux/drivers/i2c/extr_i2c-core-base.c_dummy_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @dummy_probe], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @dummy_probe(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_i2c_extr_i2c-core-base.c_dummy_probe |
; ModuleID = 'linux_drivers_gpu_drm_amd_display_dc_dce_extr_dce_link_encoder.c_dce110_link_encoder_validate_dp_output.so'
source_filename = "linux_drivers_gpu_drm_amd_display_dc_dce_extr_dce_link_encoder.c_dce110_link_encoder_validate_dp_output.so"
@PIXEL_ENCODING_YCBCR420 = common dso_local global i64 0, align 8
define dso_local i8 @dce110_link_encoder_validate_dp_output(i64 %arg1, i64 %arg2) {
entry:
%0 = inttoptr i64 %arg2 to ptr
%memload = load i64, ptr %0, align 1
%1 = load i64, ptr @PIXEL_ENCODING_YCBCR420, align 8
%2 = sub i64 %memload, %1
%3 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload, i64 %1)
%CF = extractvalue { i64, i1 } %3, 1
%ZF = icmp eq i64 %2, 0
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%4 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload, i64 %1)
%OF = extractvalue { i64, i1 } %4, 1
%5 = and i64 %2, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF = icmp eq i64 %7, 0
%AL = icmp eq i1 %ZF, false
%8 = zext i1 %AL to i8
ret i8 %8
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/display/dc/dce/extr_dce_link_encoder.c_dce110_link_encoder_validate_dp_output.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/display/dc/dce/extr_dce_link_encoder.c_dce110_link_encoder_validate_dp_output.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PIXEL_ENCODING_YCBCR420 = common local_unnamed_addr global i64 0, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define range(i32 0, 2) i32 @dce110_link_encoder_validate_dp_output(ptr nocapture noundef readnone %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = load i64, ptr %1, align 8, !tbaa !6
%4 = load i64, ptr @PIXEL_ENCODING_YCBCR420, align 8, !tbaa !11
%5 = icmp ne i64 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"dc_crtc_timing", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| linux_drivers_gpu_drm_amd_display_dc_dce_extr_dce_link_encoder.c_dce110_link_encoder_validate_dp_output |
; ModuleID = 'freebsd_crypto_openssl_crypto_asn1_extr_tasn_prn.c_ASN1_PCTX_set_oid_flags.so'
source_filename = "freebsd_crypto_openssl_crypto_asn1_extr_tasn_prn.c_ASN1_PCTX_set_oid_flags.so"
define dso_local void @ASN1_PCTX_set_oid_flags(i64 %arg1, i64 %arg2) {
entry:
%0 = inttoptr i64 %arg1 to ptr
store i64 %arg2, ptr %0, align 1
ret void
}
| ; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/asn1/extr_tasn_prn.c_ASN1_PCTX_set_oid_flags.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/asn1/extr_tasn_prn.c_ASN1_PCTX_set_oid_flags.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync)
define void @ASN1_PCTX_set_oid_flags(ptr nocapture noundef writeonly %0, i64 noundef %1) local_unnamed_addr #0 {
store i64 %1, ptr %0, align 8, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_crypto_openssl_crypto_asn1_extr_tasn_prn.c_ASN1_PCTX_set_oid_flags |
; ModuleID = 'freebsd_contrib_libarchive_libarchive_extr_archive_pack_dev.c_compare_format.so'
source_filename = "freebsd_contrib_libarchive_libarchive_extr_archive_pack_dev.c_compare_format.so"
declare dso_local i32 @strcmp(ptr, ptr)
define dso_local i32 @compare_format(i64 %arg1, i64 %arg2) {
entry:
%0 = inttoptr i64 %arg2 to ptr
%memload = load i32, ptr %0, align 1
%1 = inttoptr i64 %arg1 to ptr
%2 = inttoptr i32 %memload to ptr
%EAX = tail call i32 @strcmp(ptr %1, ptr %2)
ret i32 %EAX
}
| ; ModuleID = 'AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_pack_dev.c_compare_format.c'
source_filename = "AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_pack_dev.c_compare_format.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @compare_format], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @compare_format(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr %1, align 4, !tbaa !6
%4 = tail call i32 @strcmp(ptr noundef %0, i32 noundef %3) #2
ret i32 %4
}
declare i32 @strcmp(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"format", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_libarchive_libarchive_extr_archive_pack_dev.c_compare_format |
; ModuleID = 'openssl_crypto_evp_extr_e_null.c_null_cipher.so'
source_filename = "openssl_crypto_evp_extr_e_null.c_null_cipher.so"
declare dso_local ptr @memcpy(ptr, ptr, i64)
define dso_local i32 @null_cipher(i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4) {
entry:
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
%1 = sub i64 %arg3, %arg2
%2 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %arg3, i64 %arg2)
%CF = extractvalue { i64, i1 } %2, 1
%ZF = icmp eq i64 %1, 0
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%3 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %arg3, i64 %arg2)
%OF = extractvalue { i64, i1 } %3, 1
%4 = and i64 %1, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
store i64 3735928559, ptr %stktop_8, align 8
%7 = inttoptr i64 %arg2 to ptr
%8 = inttoptr i64 %arg3 to ptr
%9 = call ptr @memcpy(ptr %7, ptr %8, i64 %arg4)
%RAX = ptrtoint ptr %9 to i64
br label %bb.2
bb.2: ; preds = %bb.1, %entry
ret i32 1
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/openssl/crypto/evp/extr_e_null.c_null_cipher.c'
source_filename = "AnghaBench/openssl/crypto/evp/extr_e_null.c_null_cipher.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @null_cipher], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @null_cipher(ptr nocapture readnone %0, ptr noundef %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = icmp eq ptr %2, %1
br i1 %5, label %8, label %6
6: ; preds = %4
%7 = tail call i32 @memcpy(ptr noundef %1, ptr noundef %2, i64 noundef %3) #2
br label %8
8: ; preds = %6, %4
ret i32 1
}
declare i32 @memcpy(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| openssl_crypto_evp_extr_e_null.c_null_cipher |
; ModuleID = 'freebsd_contrib_gcclibs_libcpp_extr_expr.c_interpret_int_suffix.so'
source_filename = "freebsd_contrib_gcclibs_libcpp_extr_expr.c_interpret_int_suffix.so"
@CPP_N_IMAGINARY = common dso_local global i32 0, align 4
@CPP_N_UNSIGNED = common dso_local global i32 0, align 4
@CPP_N_MEDIUM = common dso_local global i32 0, align 4
@CPP_N_LARGE = common dso_local global i32 0, align 4
@CPP_N_SMALL = common dso_local global i32 0, align 4
define dso_local i32 @interpret_int_suffix(i64 %arg1, i64 %arg2) {
entry:
%EAX-SKT-LOC98 = alloca i32, align 4
%RCX-SKT-LOC = alloca i64, align 8
%ESI-SKT-LOC = alloca i32, align 4
%EAX-SKT-LOC = alloca i32, align 4
%RDX-SKT-LOC59 = alloca i64, align 8
%R8-SKT-LOC51 = alloca i64, align 8
%R14-SKT-LOC43 = alloca i64, align 8
%OF-SKT-LOC = alloca i1, align 1
%CF-SKT-LOC = alloca i1, align 1
%RDX-SKT-LOC = alloca i64, align 8
%R14-SKT-LOC = alloca i64, align 8
%R8-SKT-LOC = alloca i64, align 8
%RSI-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%0 = and i64 %arg2, %arg2
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %0, 0
%1 = and i64 %0, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
store i64 %arg2, ptr %RSI-SKT-LOC, align 1
store i32 0, ptr %EAX-SKT-LOC98, align 1
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.14, label %bb.1
bb.1: ; preds = %entry
%4 = zext i32 0 to i64
store i64 %4, ptr %R8-SKT-LOC, align 1
%5 = zext i32 0 to i64
store i64 %5, ptr %R14-SKT-LOC, align 1
%6 = zext i32 0 to i64
store i64 %6, ptr %RDX-SKT-LOC, align 1
%7 = zext i32 0 to i64
store i64 %7, ptr %R14-SKT-LOC43, align 1
%8 = zext i32 0 to i64
store i64 %8, ptr %R8-SKT-LOC51, align 1
%9 = zext i32 0 to i64
store i64 %9, ptr %RDX-SKT-LOC59, align 1
br label %bb.5
bb.5: ; preds = %bb.4, %bb.1
%RSI = load i64, ptr %RSI-SKT-LOC, align 1
%memref-idxreg = mul i64 4, %RSI
%memref-basereg = add i64 %arg1, %memref-idxreg
%memref-disp = add i64 %memref-basereg, -4
%10 = inttoptr i64 %memref-disp to ptr
%memload = load i32, ptr %10, align 1
%memref-disp1 = add i32 %memload, -73
%11 = sub i32 %memref-disp1, 44
%12 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memref-disp1, i32 44)
%CF = extractvalue { i32, i1 } %12, 1
%ZF2 = icmp eq i32 %11, 0
%highbit3 = and i32 -2147483648, %11
%SF4 = icmp ne i32 %highbit3, 0
%13 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memref-disp1, i32 44)
%OF = extractvalue { i32, i1 } %13, 1
%14 = and i32 %11, 255
%15 = call i32 @llvm.ctpop.i32(i32 %14)
%16 = and i32 %15, 1
%PF5 = icmp eq i32 %16, 0
store i1 %OF, ptr %OF-SKT-LOC, align 1
%CFCmp_JA = icmp eq i1 %CF, false
%ZFCmp_JA = icmp eq i1 %ZF2, false
%CFAndZF_JA = and i1 %ZFCmp_JA, %CFCmp_JA
br i1 %CFAndZF_JA, label %bb.13, label %bb.6
bb.6: ; preds = %bb.5
%17 = zext i32 %memref-disp1 to i64
%18 = urem i64 %17, 64
%19 = shl i64 1, %18
%20 = and i64 12884901891, %19
%CF6 = icmp ne i64 %20, 0
store i1 %CF6, ptr %CF-SKT-LOC, align 1
%CmpCF_JB = icmp eq i1 %CF6, true
br i1 %CmpCF_JB, label %bb.3, label %bb.7
bb.7: ; preds = %bb.6
%21 = zext i32 %memref-disp1 to i64
%22 = urem i64 %21, 64
%23 = shl i64 1, %22
%24 = and i64 34359738376, %23
%CF7 = icmp ne i64 %24, 0
%CmpCF_JB100 = icmp eq i1 %CF7, true
br i1 %CmpCF_JB100, label %bb.11, label %bb.8
bb.8: ; preds = %bb.7
%25 = zext i32 %memref-disp1 to i64
%26 = urem i64 %25, 64
%27 = shl i64 1, %26
%28 = and i64 17592186048512, %27
%CF8 = icmp ne i64 %28, 0
store i1 %CF8, ptr %CF-SKT-LOC, align 1
%CFCmp_JAE = icmp eq i1 %CF8, false
br i1 %CFCmp_JAE, label %bb.13, label %bb.9
bb.9: ; preds = %bb.8
%R8 = load i64, ptr %R8-SKT-LOC, align 1
%R813 = add i64 %R8, 1
%29 = and i64 %R813, 255
%30 = call i64 @llvm.ctpop.i64(i64 %29)
%31 = and i64 %30, 1
%PF9 = icmp eq i64 %31, 0
%ZF10 = icmp eq i64 %R813, 0
%highbit11 = and i64 -9223372036854775808, %R813
%SF12 = icmp ne i64 %highbit11, 0
store i64 %R813, ptr %R8-SKT-LOC51, align 1
store i64 %R813, ptr %R8-SKT-LOC, align 1
br label %bb.4
bb.11: ; preds = %bb.7
%R14 = load i64, ptr %R14-SKT-LOC, align 1
%R1418 = add i64 %R14, 1
%32 = and i64 %R1418, 255
%33 = call i64 @llvm.ctpop.i64(i64 %32)
%34 = and i64 %33, 1
%PF14 = icmp eq i64 %34, 0
%ZF15 = icmp eq i64 %R1418, 0
%highbit16 = and i64 -9223372036854775808, %R1418
%SF17 = icmp ne i64 %highbit16, 0
%35 = sub i64 %R1418, 2
%36 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R1418, i64 2)
%CF19 = extractvalue { i64, i1 } %36, 1
%ZF20 = icmp eq i64 %35, 0
%highbit21 = and i64 -9223372036854775808, %35
%SF22 = icmp ne i64 %highbit21, 0
%37 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R1418, i64 2)
%OF23 = extractvalue { i64, i1 } %37, 1
%38 = and i64 %35, 255
%39 = call i64 @llvm.ctpop.i64(i64 %38)
%40 = and i64 %39, 1
%PF24 = icmp eq i64 %40, 0
store i1 %CF19, ptr %CF-SKT-LOC, align 1
store i1 %OF23, ptr %OF-SKT-LOC, align 1
store i64 %R1418, ptr %R14-SKT-LOC43, align 1
%CmpZF_JNE = icmp eq i1 %ZF20, false
store i64 %R1418, ptr %R14-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.4, label %bb.12
bb.12: ; preds = %bb.11
%memref-idxreg25 = mul i64 4, %RSI
%memref-basereg26 = add i64 %arg1, %memref-idxreg25
%41 = inttoptr i64 %memref-basereg26 to ptr
%42 = load i32, ptr %41, align 1
%43 = sub i32 %memload, %42
%44 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload, i32 %42)
%CF27 = extractvalue { i32, i1 } %44, 1
%ZF28 = icmp eq i32 %43, 0
%highbit29 = and i32 -2147483648, %43
%SF30 = icmp ne i32 %highbit29, 0
%45 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload, i32 %42)
%OF31 = extractvalue { i32, i1 } %45, 1
%46 = and i32 %43, 255
%47 = call i32 @llvm.ctpop.i32(i32 %46)
%48 = and i32 %47, 1
%PF32 = icmp eq i32 %48, 0
store i1 %CF27, ptr %CF-SKT-LOC, align 1
store i1 %OF31, ptr %OF-SKT-LOC, align 1
%49 = zext i32 2 to i64
store i64 %49, ptr %R14-SKT-LOC43, align 1
%CmpZF_JE101 = icmp eq i1 %ZF28, true
%50 = zext i32 2 to i64
store i64 %50, ptr %R14-SKT-LOC, align 1
br i1 %CmpZF_JE101, label %bb.4, label %bb.13
bb.3: ; preds = %bb.6
%RDX = load i64, ptr %RDX-SKT-LOC, align 1
%RDX37 = add i64 %RDX, 1
%51 = and i64 %RDX37, 255
%52 = call i64 @llvm.ctpop.i64(i64 %51)
%53 = and i64 %52, 1
%PF33 = icmp eq i64 %53, 0
%ZF34 = icmp eq i64 %RDX37, 0
%highbit35 = and i64 -9223372036854775808, %RDX37
%SF36 = icmp ne i64 %highbit35, 0
store i64 %RDX37, ptr %RDX-SKT-LOC59, align 1
store i64 %RDX37, ptr %RDX-SKT-LOC, align 1
br label %bb.4
bb.4: ; preds = %bb.3, %bb.12, %bb.11, %bb.9
%RSI42 = sub i64 %RSI, 1
%54 = and i64 %RSI42, 255
%55 = call i64 @llvm.ctpop.i64(i64 %54)
%56 = and i64 %55, 1
%PF38 = icmp eq i64 %56, 0
%ZF39 = icmp eq i64 %RSI42, 0
%highbit40 = and i64 -9223372036854775808, %RSI42
%SF41 = icmp ne i64 %highbit40, 0
%57 = load i1, ptr %CF-SKT-LOC, align 1
%58 = load i1, ptr %OF-SKT-LOC, align 1
%CmpZF_JE102 = icmp eq i1 %ZF39, true
store i64 %RSI42, ptr %RSI-SKT-LOC, align 1
br i1 %CmpZF_JE102, label %bb.15, label %bb.5
bb.13: ; preds = %bb.12, %bb.8, %bb.5
store i32 0, ptr %EAX-SKT-LOC98, align 1
br label %bb.28
bb.14: ; preds = %entry
%59 = zext i32 0 to i64
store i64 %59, ptr %R14-SKT-LOC43, align 1
%60 = zext i32 0 to i64
store i64 %60, ptr %R8-SKT-LOC51, align 1
%61 = zext i32 0 to i64
store i64 %61, ptr %RDX-SKT-LOC59, align 1
br label %bb.15
bb.15: ; preds = %bb.14, %bb.4
%R1444 = load i64, ptr %R14-SKT-LOC43, align 1
%62 = sub i64 %R1444, 2
%63 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R1444, i64 2)
%CF45 = extractvalue { i64, i1 } %63, 1
%ZF46 = icmp eq i64 %62, 0
%highbit47 = and i64 -9223372036854775808, %62
%SF48 = icmp ne i64 %highbit47, 0
%64 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R1444, i64 2)
%OF49 = extractvalue { i64, i1 } %64, 1
%65 = and i64 %62, 255
%66 = call i64 @llvm.ctpop.i64(i64 %65)
%67 = and i64 %66, 1
%PF50 = icmp eq i64 %67, 0
%CFCmp_JA103 = icmp eq i1 %CF45, false
%ZFCmp_JA104 = icmp eq i1 %ZF46, false
%CFAndZF_JA105 = and i1 %ZFCmp_JA104, %CFCmp_JA103
br i1 %CFAndZF_JA105, label %bb.28, label %bb.16
bb.16: ; preds = %bb.15
%R852 = load i64, ptr %R8-SKT-LOC51, align 1
%68 = sub i64 %R852, 1
%69 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R852, i64 1)
%CF53 = extractvalue { i64, i1 } %69, 1
%ZF54 = icmp eq i64 %68, 0
%highbit55 = and i64 -9223372036854775808, %68
%SF56 = icmp ne i64 %highbit55, 0
%70 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R852, i64 1)
%OF57 = extractvalue { i64, i1 } %70, 1
%71 = and i64 %68, 255
%72 = call i64 @llvm.ctpop.i64(i64 %71)
%73 = and i64 %72, 1
%PF58 = icmp eq i64 %73, 0
%CFCmp_JA106 = icmp eq i1 %CF53, false
%ZFCmp_JA107 = icmp eq i1 %ZF54, false
%CFAndZF_JA108 = and i1 %ZFCmp_JA107, %CFCmp_JA106
br i1 %CFAndZF_JA108, label %bb.28, label %bb.17
bb.17: ; preds = %bb.16
%RDX60 = load i64, ptr %RDX-SKT-LOC59, align 1
%74 = sub i64 %RDX60, 1
%75 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RDX60, i64 1)
%CF61 = extractvalue { i64, i1 } %75, 1
%ZF62 = icmp eq i64 %74, 0
%highbit63 = and i64 -9223372036854775808, %74
%SF64 = icmp ne i64 %highbit63, 0
%76 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RDX60, i64 1)
%OF65 = extractvalue { i64, i1 } %76, 1
%77 = and i64 %74, 255
%78 = call i64 @llvm.ctpop.i64(i64 %77)
%79 = and i64 %78, 1
%PF66 = icmp eq i64 %79, 0
%CFCmp_JA109 = icmp eq i1 %CF61, false
%ZFCmp_JA110 = icmp eq i1 %ZF62, false
%CFAndZF_JA111 = and i1 %ZFCmp_JA110, %CFCmp_JA109
br i1 %CFAndZF_JA111, label %bb.28, label %bb.18
bb.18: ; preds = %bb.17
%80 = and i64 %RDX60, %RDX60
%highbit67 = and i64 -9223372036854775808, %80
%SF68 = icmp ne i64 %highbit67, 0
%ZF69 = icmp eq i64 %80, 0
%81 = and i64 %80, 255
%82 = call i64 @llvm.ctpop.i64(i64 %81)
%83 = and i64 %82, 1
%PF70 = icmp eq i64 %83, 0
store i32 0, ptr %EAX-SKT-LOC, align 1
store i32 0, ptr %ESI-SKT-LOC, align 1
%CmpZF_JE112 = icmp eq i1 %ZF69, true
br i1 %CmpZF_JE112, label %bb.20, label %bb.19
bb.19: ; preds = %bb.18
%memload71 = load i32, ptr @CPP_N_IMAGINARY, align 1
store i32 %memload71, ptr %ESI-SKT-LOC, align 1
br label %bb.20
bb.20: ; preds = %bb.19, %bb.18
%84 = and i64 %R852, %R852
%highbit72 = and i64 -9223372036854775808, %84
%SF73 = icmp ne i64 %highbit72, 0
%ZF74 = icmp eq i64 %84, 0
%85 = and i64 %84, 255
%86 = call i64 @llvm.ctpop.i64(i64 %85)
%87 = and i64 %86, 1
%PF75 = icmp eq i64 %87, 0
%CmpZF_JE113 = icmp eq i1 %ZF74, true
br i1 %CmpZF_JE113, label %bb.22, label %bb.21
bb.21: ; preds = %bb.20
%memload76 = load i32, ptr @CPP_N_UNSIGNED, align 1
store i32 %memload76, ptr %EAX-SKT-LOC, align 1
br label %bb.22
bb.22: ; preds = %bb.21, %bb.20
%EAX = load i32, ptr %EAX-SKT-LOC, align 1
%ESI = load i32, ptr %ESI-SKT-LOC, align 1
%EAX81 = or i32 %EAX, %ESI
%highbit77 = and i32 -2147483648, %EAX81
%SF78 = icmp ne i32 %highbit77, 0
%ZF79 = icmp eq i32 %EAX81, 0
%88 = and i32 %EAX81, 255
%89 = call i32 @llvm.ctpop.i32(i32 %88)
%90 = and i32 %89, 1
%PF80 = icmp eq i32 %90, 0
%91 = and i64 %R1444, %R1444
%highbit82 = and i64 -9223372036854775808, %91
%SF83 = icmp ne i64 %highbit82, 0
%ZF84 = icmp eq i64 %91, 0
%92 = and i64 %91, 255
%93 = call i64 @llvm.ctpop.i64(i64 %92)
%94 = and i64 %93, 1
%PF85 = icmp eq i64 %94, 0
%CmpZF_JE114 = icmp eq i1 %ZF84, true
br i1 %CmpZF_JE114, label %bb.25, label %bb.23
bb.23: ; preds = %bb.22
%95 = sub i64 %R1444, 1
%96 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R1444, i64 1)
%CF86 = extractvalue { i64, i1 } %96, 1
%ZF87 = icmp eq i64 %95, 0
%highbit88 = and i64 -9223372036854775808, %95
%SF89 = icmp ne i64 %highbit88, 0
%97 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R1444, i64 1)
%OF90 = extractvalue { i64, i1 } %97, 1
%98 = and i64 %95, 255
%99 = call i64 @llvm.ctpop.i64(i64 %98)
%100 = and i64 %99, 1
%PF91 = icmp eq i64 %100, 0
%CmpZF_JNE115 = icmp eq i1 %ZF87, false
br i1 %CmpZF_JNE115, label %bb.26, label %bb.24
bb.24: ; preds = %bb.23
%101 = ptrtoint ptr @CPP_N_MEDIUM to i64
store i64 %101, ptr %RCX-SKT-LOC, align 1
br label %bb.27
bb.26: ; preds = %bb.23
%102 = ptrtoint ptr @CPP_N_LARGE to i64
store i64 %102, ptr %RCX-SKT-LOC, align 1
br label %bb.27
bb.25: ; preds = %bb.22
%103 = ptrtoint ptr @CPP_N_SMALL to i64
store i64 %103, ptr %RCX-SKT-LOC, align 1
br label %bb.27
bb.27: ; preds = %bb.26, %bb.25, %bb.24
%RCX = load i64, ptr %RCX-SKT-LOC, align 1
%104 = inttoptr i64 %RCX to ptr
%memload92 = load i32, ptr %104, align 1
%EAX97 = or i32 %EAX81, %memload92
%highbit93 = and i32 -2147483648, %EAX97
%SF94 = icmp ne i32 %highbit93, 0
%ZF95 = icmp eq i32 %EAX97, 0
%105 = and i32 %EAX97, 255
%106 = call i32 @llvm.ctpop.i32(i32 %105)
%107 = and i32 %106, 1
%PF96 = icmp eq i32 %107, 0
store i32 %EAX97, ptr %EAX-SKT-LOC98, align 1
br label %bb.28
bb.28: ; preds = %bb.27, %bb.17, %bb.16, %bb.15, %bb.13
%EAX99 = load i32, ptr %EAX-SKT-LOC98, align 1
ret i32 %EAX99
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/contrib/gcclibs/libcpp/extr_expr.c_interpret_int_suffix.c'
source_filename = "AnghaBench/freebsd/contrib/gcclibs/libcpp/extr_expr.c_interpret_int_suffix.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CPP_N_IMAGINARY = common local_unnamed_addr global i32 0, align 4
@CPP_N_UNSIGNED = common local_unnamed_addr global i32 0, align 4
@CPP_N_SMALL = common local_unnamed_addr global i32 0, align 4
@CPP_N_MEDIUM = common local_unnamed_addr global i32 0, align 4
@CPP_N_LARGE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @interpret_int_suffix], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @interpret_int_suffix(ptr nocapture noundef readonly %0, i64 noundef %1) #0 {
%3 = icmp eq i64 %1, 0
br i1 %3, label %28, label %4
4: ; preds = %2, %23
%5 = phi i64 [ %26, %23 ], [ 0, %2 ]
%6 = phi i64 [ %25, %23 ], [ 0, %2 ]
%7 = phi i64 [ %24, %23 ], [ 0, %2 ]
%8 = phi i64 [ %9, %23 ], [ %1, %2 ]
%9 = add i64 %8, -1
%10 = getelementptr inbounds i32, ptr %0, i64 %9
%11 = load i32, ptr %10, align 4, !tbaa !6
switch i32 %11, label %56 [
i32 117, label %12
i32 85, label %12
i32 105, label %14
i32 73, label %14
i32 106, label %14
i32 74, label %14
i32 108, label %16
i32 76, label %16
]
12: ; preds = %4, %4
%13 = add i64 %7, 1
br label %23
14: ; preds = %4, %4, %4, %4
%15 = add i64 %5, 1
br label %23
16: ; preds = %4, %4
%17 = add i64 %6, 1
%18 = icmp eq i64 %17, 2
br i1 %18, label %19, label %23
19: ; preds = %16
%20 = getelementptr inbounds i32, ptr %0, i64 %8
%21 = load i32, ptr %20, align 4, !tbaa !6
%22 = icmp eq i32 %11, %21
br i1 %22, label %23, label %56
23: ; preds = %16, %19, %14, %12
%24 = phi i64 [ %7, %19 ], [ %7, %16 ], [ %7, %14 ], [ %13, %12 ]
%25 = phi i64 [ 2, %19 ], [ %17, %16 ], [ %6, %14 ], [ %6, %12 ]
%26 = phi i64 [ %5, %19 ], [ %5, %16 ], [ %15, %14 ], [ %5, %12 ]
%27 = icmp eq i64 %9, 0
br i1 %27, label %28, label %4, !llvm.loop !10
28: ; preds = %23, %2
%29 = phi i64 [ 0, %2 ], [ %24, %23 ]
%30 = phi i64 [ 0, %2 ], [ %25, %23 ]
%31 = phi i64 [ 0, %2 ], [ %26, %23 ]
%32 = icmp ugt i64 %30, 2
%33 = icmp ugt i64 %29, 1
%34 = select i1 %32, i1 true, i1 %33
%35 = icmp ugt i64 %31, 1
%36 = select i1 %34, i1 true, i1 %35
br i1 %36, label %56, label %37
37: ; preds = %28
%38 = icmp eq i64 %31, 0
%39 = load i32, ptr @CPP_N_IMAGINARY, align 4
%40 = select i1 %38, i32 0, i32 %39
%41 = icmp eq i64 %29, 0
%42 = load i32, ptr @CPP_N_UNSIGNED, align 4
%43 = select i1 %41, i32 0, i32 %42
%44 = or i32 %43, %40
%45 = icmp eq i64 %30, 0
br i1 %45, label %46, label %48
46: ; preds = %37
%47 = load i32, ptr @CPP_N_SMALL, align 4, !tbaa !6
br label %53
48: ; preds = %37
%49 = icmp eq i64 %30, 1
%50 = load i32, ptr @CPP_N_MEDIUM, align 4
%51 = load i32, ptr @CPP_N_LARGE, align 4
%52 = select i1 %49, i32 %50, i32 %51
br label %53
53: ; preds = %48, %46
%54 = phi i32 [ %47, %46 ], [ %52, %48 ]
%55 = or i32 %44, %54
br label %56
56: ; preds = %4, %19, %28, %53
%57 = phi i32 [ %55, %53 ], [ 0, %28 ], [ 0, %19 ], [ 0, %4 ]
ret i32 %57
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| freebsd_contrib_gcclibs_libcpp_extr_expr.c_interpret_int_suffix |
; ModuleID = 'fastsocket_kernel_arch_powerpc_oprofile_cell_extr_spu_profiler.c_set_spu_profiling_frequency.so'
source_filename = "fastsocket_kernel_arch_powerpc_oprofile_cell_extr_spu_profiler.c_set_spu_profiling_frequency.so"
@ppc_proc_freq = common dso_local global i32 0, align 4
@USEC_PER_SEC = common dso_local global i32 0, align 4
@SCALE_SHIFT = common dso_local global i32 0, align 4
@profiling_interval = common dso_local global i64 0, align 8
define dso_local i64 @set_spu_profiling_frequency(i32 %arg1, i32 %arg2) {
entry:
%EDI-SKT-LOC = alloca i32, align 4
%0 = and i32 %arg1, %arg1
%highbit = and i32 -2147483648, %0
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %0, 0
%1 = and i32 %0, 255
%2 = call i32 @llvm.ctpop.i32(i32 %1)
%3 = and i32 %2, 1
%PF = icmp eq i32 %3, 0
store i32 %arg1, ptr %EDI-SKT-LOC, align 1
%CmpZF_JNE = icmp eq i1 %ZF, false
br i1 %CmpZF_JNE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%memload = load i64, ptr @ppc_proc_freq, align 1
%4 = trunc i64 %memload to i32
%RAX = sext i32 %4 to i64
%RDI = mul i64 %RAX, 274877907
%5 = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 %RAX, i64 274877907)
%OF = extractvalue { i64, i1 } %5, 1
%RAX4 = lshr i64 %RDI, 63
%ZF1 = icmp eq i64 %RAX4, 0
%highbit2 = and i64 -9223372036854775808, %RAX4
%SF3 = icmp ne i64 %highbit2, 0
%RDI8 = lshr i64 %RDI, 38
%ZF5 = icmp eq i64 %RDI8, 0
%highbit6 = and i64 -9223372036854775808, %RDI8
%SF7 = icmp ne i64 %highbit6, 0
%6 = trunc i64 %RDI8 to i32
%7 = trunc i64 %RAX4 to i32
%EDI = add nsw i32 %6, %7
%highbit9 = and i32 -2147483648, %EDI
%SF10 = icmp ne i32 %highbit9, 0
%ZF11 = icmp eq i32 %EDI, 0
store i32 %EDI, ptr %EDI-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %entry
%memload12 = load i32, ptr @USEC_PER_SEC, align 1
%memload13 = load i32, ptr @SCALE_SHIFT, align 1
%8 = trunc i32 %memload13 to i8
%ECX = zext i8 %8 to i32
%9 = trunc i32 %ECX to i8
%10 = zext i8 %9 to i32
%shift-cnt-msk = and i32 %10, 63
%EAX = shl i32 %memload12, %shift-cnt-msk
%shrd_cf_count_cmp = icmp sgt i32 %shift-cnt-msk, 0
%11 = sub i32 32, %shift-cnt-msk
%shld_cf_count_shift = shl i32 1, %11
%shld_cf_count_and = and i32 %memload12, %shld_cf_count_shift
%shld_cf_count_shft_out = icmp sgt i32 %shld_cf_count_and, 0
%shld_cf_update = select i1 %shrd_cf_count_cmp, i1 %shld_cf_count_shft_out, i1 false
%ZF14 = icmp eq i32 %EAX, 0
%highbit15 = and i32 -2147483648, %EAX
%SF16 = icmp ne i32 %highbit15, 0
%EDI17 = load i32, ptr %EDI-SKT-LOC, align 1
%12 = zext i32 %EAX to i64
%13 = zext i32 0 to i64
%div_hb_ls = shl nuw i64 %13, 32
%dividend = or i64 %div_hb_ls, %12
%14 = zext i32 %EDI17 to i64
%div_q = udiv i64 %dividend, %14
%EAX18 = trunc i64 %div_q to i32
%div_r = urem i64 %dividend, %14
%EDX = trunc i64 %div_r to i32
%15 = zext i32 %arg2 to i64
%16 = zext i32 %EAX18 to i64
%RDX = mul nsw i64 %15, %16
%17 = trunc i32 %ECX to i8
%18 = zext i8 %17 to i64
%shift-cnt-msk19 = and i64 %18, 31
%RDX28 = lshr i64 %RDX, %shift-cnt-msk19
%shrd_cf_count_cmp20 = icmp sgt i64 %shift-cnt-msk19, 0
%19 = sub i64 64, %shift-cnt-msk19
%shld_cf_count_shift21 = shl i64 1, %19
%shld_cf_count_and22 = and i64 %RDX, %shld_cf_count_shift21
%shld_cf_count_shft_out23 = icmp sgt i64 %shld_cf_count_and22, 0
%shld_cf_update24 = select i1 %shrd_cf_count_cmp20, i1 %shld_cf_count_shft_out23, i1 false
%ZF25 = icmp eq i64 %RDX28, 0
%highbit26 = and i64 -9223372036854775808, %RDX28
%SF27 = icmp ne i64 %highbit26, 0
store i64 %RDX28, ptr @profiling_interval, align 1
%20 = ptrtoint ptr @profiling_interval to i64
ret i64 %20
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.smul.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/powerpc/oprofile/cell/extr_spu_profiler.c_set_spu_profiling_frequency.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/powerpc/oprofile/cell/extr_spu_profiler.c_set_spu_profiling_frequency.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ppc_proc_freq = common local_unnamed_addr global i32 0, align 4
@USEC_PER_SEC = common local_unnamed_addr global i32 0, align 4
@SCALE_SHIFT = common local_unnamed_addr global i32 0, align 4
@profiling_interval = common local_unnamed_addr global i64 0, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable(sync)
define void @set_spu_profiling_frequency(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq i32 %0, 0
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = load i32, ptr @ppc_proc_freq, align 4, !tbaa !6
%6 = sdiv i32 %5, 1000
br label %7
7: ; preds = %4, %2
%8 = phi i32 [ %0, %2 ], [ %6, %4 ]
%9 = load i32, ptr @USEC_PER_SEC, align 4, !tbaa !6
%10 = load i32, ptr @SCALE_SHIFT, align 4, !tbaa !6
%11 = shl i32 %9, %10
%12 = udiv i32 %11, %8
%13 = zext i32 %12 to i64
%14 = zext i32 %1 to i64
%15 = mul nuw i64 %13, %14
%16 = zext nneg i32 %10 to i64
%17 = lshr i64 %15, %16
store i64 %17, ptr @profiling_interval, align 8, !tbaa !10
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
| fastsocket_kernel_arch_powerpc_oprofile_cell_extr_spu_profiler.c_set_spu_profiling_frequency |
; ModuleID = 'fastsocket_kernel_drivers_net_stmmac_extr_stmmac_main.c_stmmacphy_dvr_remove.so'
source_filename = "fastsocket_kernel_drivers_net_stmmac_extr_stmmac_main.c_stmmacphy_dvr_remove.so"
define dso_local i32 @stmmacphy_dvr_remove() {
entry:
ret i32 0
}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/stmmac/extr_stmmac_main.c_stmmacphy_dvr_remove.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/stmmac/extr_stmmac_main.c_stmmacphy_dvr_remove.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @stmmacphy_dvr_remove], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @stmmacphy_dvr_remove(ptr nocapture readnone %0) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_net_stmmac_extr_stmmac_main.c_stmmacphy_dvr_remove |
; ModuleID = 'reactos_modules_rostests_winetests_user32_extr_dialog.c_id.so'
source_filename = "reactos_modules_rostests_winetests_user32_extr_dialog.c_id.so"
@numwnds = common dso_local global i32 0, align 4
@hwnd = common dso_local global i64 0, align 8
define dso_local i32 @id(i64 %arg1) {
entry:
%RDX-SKT-LOC = alloca i64, align 8
%memload = load i32, ptr @numwnds, align 1
%0 = zext i32 %memload to i64
%1 = zext i32 %memload to i64
%2 = and i64 %0, %1
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %2, 0
%3 = and i64 %2, 255
%4 = call i64 @llvm.ctpop.i64(i64 %3)
%5 = and i64 %4, 1
%PF = icmp eq i64 %5, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%memload1 = load i64, ptr @hwnd, align 1
%6 = zext i32 0 to i64
store i64 %6, ptr %RDX-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.3
%RDX = load i64, ptr %RDX-SKT-LOC, align 1
%memref-idxreg = mul i64 8, %RDX
%memref-basereg = add i64 %memload1, %memref-idxreg
%7 = inttoptr i64 %memref-basereg to ptr
%8 = load i64, ptr %7, align 1
%9 = sub i64 %8, %arg1
%10 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %8, i64 %arg1)
%CF = extractvalue { i64, i1 } %10, 1
%ZF2 = icmp eq i64 %9, 0
%highbit3 = and i64 -9223372036854775808, %9
%SF4 = icmp ne i64 %highbit3, 0
%11 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %8, i64 %arg1)
%OF = extractvalue { i64, i1 } %11, 1
%12 = and i64 %9, 255
%13 = call i64 @llvm.ctpop.i64(i64 %12)
%14 = and i64 %13, 1
%PF5 = icmp eq i64 %14, 0
%CmpZF_JE17 = icmp eq i1 %ZF2, true
br i1 %CmpZF_JE17, label %bb.5, label %bb.3
bb.3: ; preds = %bb.2
%RDX10 = add i64 %RDX, 1
%15 = and i64 %RDX10, 255
%16 = call i64 @llvm.ctpop.i64(i64 %15)
%17 = and i64 %16, 1
%PF6 = icmp eq i64 %17, 0
%ZF7 = icmp eq i64 %RDX10, 0
%highbit8 = and i64 -9223372036854775808, %RDX10
%SF9 = icmp ne i64 %highbit8, 0
%18 = zext i32 %memload to i64
%19 = sub i64 %18, %RDX10
%20 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %18, i64 %RDX10)
%CF11 = extractvalue { i64, i1 } %20, 1
%ZF12 = icmp eq i64 %19, 0
%highbit13 = and i64 -9223372036854775808, %19
%SF14 = icmp ne i64 %highbit13, 0
%21 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %18, i64 %RDX10)
%OF15 = extractvalue { i64, i1 } %21, 1
%22 = and i64 %19, 255
%23 = call i64 @llvm.ctpop.i64(i64 %22)
%24 = and i64 %23, 1
%PF16 = icmp eq i64 %24, 0
%CmpZF_JNE = icmp eq i1 %ZF12, false
store i64 %RDX10, ptr %RDX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.2, label %bb.4
bb.5: ; preds = %bb.2
%EAX = trunc i64 %RDX to i32
br label %UnifiedReturnBlock
bb.4: ; preds = %bb.3, %entry
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.4, %bb.5
%UnifiedRetVal = phi i32 [ %EAX, %bb.5 ], [ -1, %bb.4 ]
ret i32 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/user32/extr_dialog.c_id.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/user32/extr_dialog.c_id.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@numwnds = common local_unnamed_addr global i32 0, align 4
@hwnd = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @id], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @id(i64 noundef %0) #0 {
%2 = load i32, ptr @numwnds, align 4, !tbaa !6
%3 = icmp eq i32 %2, 0
br i1 %3, label %17, label %4
4: ; preds = %1
%5 = load ptr, ptr @hwnd, align 8, !tbaa !10
%6 = zext i32 %2 to i64
br label %7
7: ; preds = %4, %12
%8 = phi i64 [ 0, %4 ], [ %13, %12 ]
%9 = getelementptr inbounds i64, ptr %5, i64 %8
%10 = load i64, ptr %9, align 8, !tbaa !12
%11 = icmp eq i64 %10, %0
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %6
br i1 %14, label %17, label %7, !llvm.loop !14
15: ; preds = %7
%16 = trunc nuw i64 %8 to i32
br label %17
17: ; preds = %12, %15, %1
%18 = phi i32 [ -1, %1 ], [ %16, %15 ], [ -1, %12 ]
ret i32 %18
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
| reactos_modules_rostests_winetests_user32_extr_dialog.c_id |
; ModuleID = 'linux_lib_extr_string.c_strstr.so'
source_filename = "linux_lib_extr_string.c_strstr.so"
declare dso_local i64 @strlen(ptr)
declare dso_local i32 @bcmp(ptr, ptr, i64)
define dso_local i64 @strstr(i64 %arg1, i64 %arg2) {
entry:
%R12-SKT-LOC26 = alloca i64, align 8
%RBX-SKT-LOC = alloca i64, align 8
%R12-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%0 = inttoptr i64 %arg2 to ptr
%RAX = call i64 @strlen(ptr %0)
%1 = and i64 %RAX, %RAX
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %1, 0
%2 = and i64 %1, 255
%3 = call i64 @llvm.ctpop.i64(i64 %2)
%4 = and i64 %3, 1
%PF = icmp eq i64 %4, 0
store i64 %arg1, ptr %R12-SKT-LOC, align 1
store i64 %arg1, ptr %R12-SKT-LOC26, align 1
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.6, label %bb.1
bb.1: ; preds = %entry
%5 = inttoptr i64 %arg1 to ptr
%RAX1 = call i64 @strlen(ptr %5)
%6 = sub i64 %RAX1, %RAX
%7 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RAX1, i64 %RAX)
%CF = extractvalue { i64, i1 } %7, 1
%ZF2 = icmp eq i64 %6, 0
%highbit3 = and i64 -9223372036854775808, %6
%SF4 = icmp ne i64 %highbit3, 0
%8 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RAX1, i64 %RAX)
%OF = extractvalue { i64, i1 } %8, 1
%9 = and i64 %6, 255
%10 = call i64 @llvm.ctpop.i64(i64 %9)
%11 = and i64 %10, 1
%PF5 = icmp eq i64 %11, 0
%CmpCF_JB = icmp eq i1 %CF, true
br i1 %CmpCF_JB, label %bb.5, label %bb.2
bb.2: ; preds = %bb.1
store i64 %RAX1, ptr %RBX-SKT-LOC, align 1
br label %bb.3
bb.3: ; preds = %bb.2, %bb.4
%R12 = load i64, ptr %R12-SKT-LOC, align 1
%12 = inttoptr i64 %R12 to ptr
%13 = inttoptr i64 %arg2 to ptr
%EAX = call i32 @bcmp(ptr %12, ptr %13, i64 %RAX)
%14 = and i32 %EAX, %EAX
%highbit6 = and i32 -2147483648, %14
%SF7 = icmp ne i32 %highbit6, 0
%ZF8 = icmp eq i32 %14, 0
%15 = and i32 %14, 255
%16 = call i32 @llvm.ctpop.i32(i32 %15)
%17 = and i32 %16, 1
%PF9 = icmp eq i32 %17, 0
store i64 %R12, ptr %R12-SKT-LOC26, align 1
%CmpZF_JE28 = icmp eq i1 %ZF8, true
br i1 %CmpZF_JE28, label %bb.6, label %bb.4
bb.4: ; preds = %bb.3
%RBX = load i64, ptr %RBX-SKT-LOC, align 1
%RBX14 = sub i64 %RBX, 1
%18 = and i64 %RBX14, 255
%19 = call i64 @llvm.ctpop.i64(i64 %18)
%20 = and i64 %19, 1
%PF10 = icmp eq i64 %20, 0
%ZF11 = icmp eq i64 %RBX14, 0
%highbit12 = and i64 -9223372036854775808, %RBX14
%SF13 = icmp ne i64 %highbit12, 0
%R1219 = add i64 %R12, 1
%21 = and i64 %R1219, 255
%22 = call i64 @llvm.ctpop.i64(i64 %21)
%23 = and i64 %22, 1
%PF15 = icmp eq i64 %23, 0
%ZF16 = icmp eq i64 %R1219, 0
%highbit17 = and i64 -9223372036854775808, %R1219
%SF18 = icmp ne i64 %highbit17, 0
%24 = sub i64 %RBX14, %RAX
%25 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RBX14, i64 %RAX)
%CF20 = extractvalue { i64, i1 } %25, 1
%ZF21 = icmp eq i64 %24, 0
%highbit22 = and i64 -9223372036854775808, %24
%SF23 = icmp ne i64 %highbit22, 0
%26 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RBX14, i64 %RAX)
%OF24 = extractvalue { i64, i1 } %26, 1
%27 = and i64 %24, 255
%28 = call i64 @llvm.ctpop.i64(i64 %27)
%29 = and i64 %28, 1
%PF25 = icmp eq i64 %29, 0
%CFCmp_JAE = icmp eq i1 %CF20, false
store i64 %RBX14, ptr %RBX-SKT-LOC, align 1
store i64 %R1219, ptr %R12-SKT-LOC, align 1
br i1 %CFCmp_JAE, label %bb.3, label %bb.5
bb.5: ; preds = %bb.4, %bb.1
%30 = zext i32 0 to i64
store i64 %30, ptr %R12-SKT-LOC26, align 1
br label %bb.6
bb.6: ; preds = %bb.5, %bb.3, %entry
%R1227 = load i64, ptr %R12-SKT-LOC26, align 1
ret i64 %R1227
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/lib/extr_string.c_strstr.c'
source_filename = "AnghaBench/linux/lib/extr_string.c_strstr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nofree nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define noundef ptr @strstr(ptr noundef readonly %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %1) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %17, label %5
5: ; preds = %2
%6 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %0) #2
%7 = icmp ult i64 %6, %3
br i1 %7, label %17, label %8
8: ; preds = %5, %13
%9 = phi i64 [ %14, %13 ], [ %6, %5 ]
%10 = phi ptr [ %15, %13 ], [ %0, %5 ]
%11 = tail call i32 @memcmp(ptr noundef %10, ptr noundef %1, i64 noundef %3)
%12 = icmp eq i32 %11, 0
br i1 %12, label %17, label %13
13: ; preds = %8
%14 = add i64 %9, -1
%15 = getelementptr inbounds i8, ptr %10, i64 1
%16 = icmp ult i64 %14, %3
br i1 %16, label %17, label %8, !llvm.loop !6
17: ; preds = %8, %13, %5, %2
%18 = phi ptr [ %0, %2 ], [ null, %5 ], [ %10, %8 ], [ null, %13 ]
ret ptr %18
}
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i64 @strlen(ptr nocapture noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @memcmp(ptr nocapture noundef, ptr nocapture noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nofree nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(argmem: read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = distinct !{!6, !7}
!7 = !{!"llvm.loop.mustprogress"}
| linux_lib_extr_string.c_strstr |
; ModuleID = 'freebsd_sys_dev_sound_pci_extr_emu10kx-pcm.c_emu_efxmixer_set.so'
source_filename = "freebsd_sys_dev_sound_pci_extr_emu10kx-pcm.c_emu_efxmixer_set.so"
define dso_local i32 @emu_efxmixer_set() {
entry:
ret i32 0
}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/sound/pci/extr_emu10kx-pcm.c_emu_efxmixer_set.c'
source_filename = "AnghaBench/freebsd/sys/dev/sound/pci/extr_emu10kx-pcm.c_emu_efxmixer_set.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @emu_efxmixer_set], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @emu_efxmixer_set(ptr nocapture readnone %0, i32 %1, i32 %2, i32 %3) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_sys_dev_sound_pci_extr_emu10kx-pcm.c_emu_efxmixer_set |
; ModuleID = 'fastsocket_kernel_drivers_acpi_extr_glue.c_acpi_glue_data_handler.so'
source_filename = "fastsocket_kernel_drivers_acpi_extr_glue.c_acpi_glue_data_handler.so"
define dso_local void @acpi_glue_data_handler() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/acpi/extr_glue.c_acpi_glue_data_handler.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/acpi/extr_glue.c_acpi_glue_data_handler.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @acpi_glue_data_handler], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @acpi_glue_data_handler(i32 %0, ptr nocapture readnone %1) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_acpi_extr_glue.c_acpi_glue_data_handler |
; ModuleID = 'linux_drivers_usb_host_extr_uhci-hcd.h_hcd_to_uhci.so'
source_filename = "linux_drivers_usb_host_extr_uhci-hcd.h_hcd_to_uhci.so"
define dso_local i64 @hcd_to_uhci(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
ret i64 %memload
}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/host/extr_uhci-hcd.h_hcd_to_uhci.c'
source_filename = "AnghaBench/linux/drivers/usb/host/extr_uhci-hcd.h_hcd_to_uhci.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @hcd_to_uhci], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal ptr @hcd_to_uhci(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = inttoptr i64 %2 to ptr
ret ptr %3
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"usb_hcd", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_usb_host_extr_uhci-hcd.h_hcd_to_uhci |
; ModuleID = 'linux_drivers_net_ethernet_intel_ixgbe_extr_ixgbe_x550.c_ixgbe_read_phy_reg_x550em.so'
source_filename = "linux_drivers_net_ethernet_intel_ixgbe_extr_ixgbe_x550.c_ixgbe_read_phy_reg_x550em.so"
@IXGBE_NOT_IMPLEMENTED = common dso_local global i32 0, align 4
define dso_local i32 @ixgbe_read_phy_reg_x550em() {
entry:
%memload = load i32, ptr @IXGBE_NOT_IMPLEMENTED, align 1
ret i32 %memload
}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/intel/ixgbe/extr_ixgbe_x550.c_ixgbe_read_phy_reg_x550em.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/intel/ixgbe/extr_ixgbe_x550.c_ixgbe_read_phy_reg_x550em.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IXGBE_NOT_IMPLEMENTED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ixgbe_read_phy_reg_x550em], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal i32 @ixgbe_read_phy_reg_x550em(ptr nocapture readnone %0, i32 %1, i32 %2, ptr nocapture readnone %3) #0 {
%5 = load i32, ptr @IXGBE_NOT_IMPLEMENTED, align 4, !tbaa !6
ret i32 %5
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_net_ethernet_intel_ixgbe_extr_ixgbe_x550.c_ixgbe_read_phy_reg_x550em |
; ModuleID = 'linux_drivers_staging_rtl8188eu_hal_extr_hal8188e_rate_adaptive.c_odm_PTTryState_8188E.so'
source_filename = "linux_drivers_staging_rtl8188eu_hal_extr_hal8188e_rate_adaptive.c_odm_PTTryState_8188E.so"
define dso_local void @odm_PTTryState_8188E(i64 %arg1) {
entry:
%CL-SKT-LOC = alloca i64, align 8
%0 = inttoptr i64 %arg1 to ptr
store i32 0, ptr %0, align 1
%memref-disp = add i64 %arg1, 4
%1 = inttoptr i64 %memref-disp to ptr
%memload = load i32, ptr %1, align 1
%2 = zext i32 %memload to i64
%3 = zext i32 3 to i64
%4 = sub i64 %2, %3
%5 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %2, i64 %3)
%CF = extractvalue { i64, i1 } %5, 1
%ZF = icmp eq i64 %4, 0
%highbit = and i64 -9223372036854775808, %4
%SF = icmp ne i64 %highbit, 0
%6 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %2, i64 %3)
%OF = extractvalue { i64, i1 } %6, 1
%7 = and i64 %4, 255
%8 = call i64 @llvm.ctpop.i64(i64 %7)
%9 = and i64 %8, 1
%PF = icmp eq i64 %9, 0
switch i64 %memref-disp, label %bb.5 [
i64 0, label %bb.2
i64 1, label %bb.4
i64 2, label %bb.16
i64 3, label %bb.18
]
bb.18: ; preds = %entry
%memref-disp1 = add i64 %arg1, 8
%10 = inttoptr i64 %memref-disp1 to ptr
%11 = load i32, ptr %10, align 1
%12 = zext i32 %11 to i64
%13 = zext i32 24 to i64
%14 = sub i64 %12, %13
%15 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %12, i64 %13)
%CF2 = extractvalue { i64, i1 } %15, 1
%ZF3 = icmp eq i64 %14, 0
%highbit4 = and i64 -9223372036854775808, %14
%SF5 = icmp ne i64 %highbit4, 0
%16 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %12, i64 %13)
%OF6 = extractvalue { i64, i1 } %16, 1
%17 = and i64 %14, 255
%18 = call i64 @llvm.ctpop.i64(i64 %17)
%19 = and i64 %18, 1
%PF7 = icmp eq i64 %19, 0
%CmpZF_JLE = icmp eq i1 %ZF3, true
%CmpOF_JLE = icmp ne i1 %SF5, %OF6
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
br i1 %ZFOrSF_JLE, label %bb.5, label %bb.19
bb.19: ; preds = %bb.18
br label %bb.3
bb.4: ; preds = %entry
%memref-disp8 = add i64 %arg1, 8
%20 = inttoptr i64 %memref-disp8 to ptr
%21 = load i32, ptr %20, align 1
%22 = zext i32 %21 to i64
%23 = zext i32 9 to i64
%24 = sub i64 %22, %23
%25 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %22, i64 %23)
%CF9 = extractvalue { i64, i1 } %25, 1
%ZF10 = icmp eq i64 %24, 0
%highbit11 = and i64 -9223372036854775808, %24
%SF12 = icmp ne i64 %highbit11, 0
%26 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %22, i64 %23)
%OF13 = extractvalue { i64, i1 } %26, 1
%27 = and i64 %24, 255
%28 = call i64 @llvm.ctpop.i64(i64 %27)
%29 = and i64 %28, 1
%PF14 = icmp eq i64 %29, 0
%ZFCmp_JG = icmp eq i1 %ZF10, false
%SFOFCmp_JG = icmp eq i1 %SF12, %OF13
%ZFAndSFOF_JG = and i1 %ZFCmp_JG, %SFOFCmp_JG
br i1 %ZFAndSFOF_JG, label %bb.3, label %bb.5
bb.2: ; preds = %entry
%memref-disp15 = add i64 %arg1, 8
%30 = inttoptr i64 %memref-disp15 to ptr
%31 = load i32, ptr %30, align 1
%32 = zext i32 %31 to i64
%33 = zext i32 3 to i64
%34 = sub i64 %32, %33
%35 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %32, i64 %33)
%CF16 = extractvalue { i64, i1 } %35, 1
%ZF17 = icmp eq i64 %34, 0
%highbit18 = and i64 -9223372036854775808, %34
%SF19 = icmp ne i64 %highbit18, 0
%36 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %32, i64 %33)
%OF20 = extractvalue { i64, i1 } %36, 1
%37 = and i64 %34, 255
%38 = call i64 @llvm.ctpop.i64(i64 %37)
%39 = and i64 %38, 1
%PF21 = icmp eq i64 %39, 0
%SFAndOF_JL = icmp ne i1 %SF19, %OF20
br i1 %SFAndOF_JL, label %bb.5, label %bb.3
bb.5: ; preds = %bb.16, %bb.2, %bb.4, %bb.18, %entry
%40 = zext i32 0 to i64
store i64 %40, ptr %CL-SKT-LOC, align 1
br label %bb.6
bb.6: ; preds = %bb.5, %bb.3
%memref-disp22 = add i64 %arg1, 12
%41 = inttoptr i64 %memref-disp22 to ptr
%memload23 = load i32, ptr %41, align 1
%42 = sub i32 %memload23, 47
%43 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload23, i32 47)
%CF24 = extractvalue { i32, i1 } %43, 1
%ZF25 = icmp eq i32 %42, 0
%highbit26 = and i32 -2147483648, %42
%SF27 = icmp ne i32 %highbit26, 0
%44 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload23, i32 47)
%OF28 = extractvalue { i32, i1 } %44, 1
%45 = and i32 %42, 255
%46 = call i32 @llvm.ctpop.i32(i32 %45)
%47 = and i32 %46, 1
%PF29 = icmp eq i32 %47, 0
%ZFCmp_JG111 = icmp eq i1 %ZF25, false
%SFOFCmp_JG112 = icmp eq i1 %SF27, %OF28
%ZFAndSFOF_JG113 = and i1 %ZFCmp_JG111, %SFOFCmp_JG112
br i1 %ZFAndSFOF_JG113, label %bb.8, label %bb.7
bb.7: ; preds = %bb.6
%memref-disp30 = add i64 %arg1, 16
%48 = inttoptr i64 %memref-disp30 to ptr
store i32 0, ptr %48, align 1
br label %bb.16
bb.8: ; preds = %bb.6
%49 = load i64, ptr %CL-SKT-LOC, align 1
%CL = trunc i64 %49 to i8
%50 = and i8 %CL, %CL
%highbit31 = and i8 -128, %50
%SF32 = icmp ne i8 %highbit31, 0
%ZF33 = icmp eq i8 %50, 0
%51 = call i8 @llvm.ctpop.i8(i8 %50)
%52 = and i8 %51, 1
%PF34 = icmp eq i8 %52, 0
%CmpZF_JE = icmp eq i1 %ZF33, true
br i1 %CmpZF_JE, label %bb.14, label %bb.9
bb.9: ; preds = %bb.8
%memref-disp35 = add i64 %arg1, 20
%53 = inttoptr i64 %memref-disp35 to ptr
%memload36 = load i32, ptr %53, align 1
%54 = sub i32 %memload36, 9
%55 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload36, i32 9)
%CF37 = extractvalue { i32, i1 } %55, 1
%ZF38 = icmp eq i32 %54, 0
%highbit39 = and i32 -2147483648, %54
%SF40 = icmp ne i32 %highbit39, 0
%56 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload36, i32 9)
%OF41 = extractvalue { i32, i1 } %56, 1
%57 = and i32 %54, 255
%58 = call i32 @llvm.ctpop.i32(i32 %57)
%59 = and i32 %58, 1
%PF42 = icmp eq i32 %59, 0
%ZFCmp_JG114 = icmp eq i1 %ZF38, false
%SFOFCmp_JG115 = icmp eq i1 %SF40, %OF41
%ZFAndSFOF_JG116 = and i1 %ZFCmp_JG114, %SFOFCmp_JG115
br i1 %ZFAndSFOF_JG116, label %bb.15, label %bb.10
bb.10: ; preds = %bb.9
%memref-disp43 = add i64 %arg1, 24
%60 = inttoptr i64 %memref-disp43 to ptr
%memload44 = load i32, ptr %60, align 1
%memref-disp45 = add i32 %memload23, 5
%61 = sub i32 %memload44, %memref-disp45
%62 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload44, i32 %memref-disp45)
%CF46 = extractvalue { i32, i1 } %62, 1
%ZF47 = icmp eq i32 %61, 0
%highbit48 = and i32 -2147483648, %61
%SF49 = icmp ne i32 %highbit48, 0
%63 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload44, i32 %memref-disp45)
%OF50 = extractvalue { i32, i1 } %63, 1
%64 = and i32 %61, 255
%65 = call i32 @llvm.ctpop.i32(i32 %64)
%66 = and i32 %65, 1
%PF51 = icmp eq i32 %66, 0
%ZFCmp_JG117 = icmp eq i1 %ZF47, false
%SFOFCmp_JG118 = icmp eq i1 %SF49, %OF50
%ZFAndSFOF_JG119 = and i1 %ZFCmp_JG117, %SFOFCmp_JG118
br i1 %ZFAndSFOF_JG119, label %bb.15, label %bb.11
bb.11: ; preds = %bb.10
%memref-disp52 = add i32 %memload23, -5
%67 = sub i32 %memload44, %memref-disp52
%68 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload44, i32 %memref-disp52)
%CF53 = extractvalue { i32, i1 } %68, 1
%ZF54 = icmp eq i32 %67, 0
%highbit55 = and i32 -2147483648, %67
%SF56 = icmp ne i32 %highbit55, 0
%69 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload44, i32 %memref-disp52)
%OF57 = extractvalue { i32, i1 } %69, 1
%70 = and i32 %67, 255
%71 = call i32 @llvm.ctpop.i32(i32 %70)
%72 = and i32 %71, 1
%PF58 = icmp eq i32 %72, 0
%SFAndOF_JL120 = icmp ne i1 %SF56, %OF57
br i1 %SFAndOF_JL120, label %bb.15, label %bb.12
bb.12: ; preds = %bb.11
%memref-disp59 = add i64 %arg1, 8
%73 = inttoptr i64 %memref-disp59 to ptr
%memload60 = load i64, ptr %73, align 1
%74 = trunc i64 %memload60 to i32
%RDX = sext i32 %74 to i64
%memref-disp61 = add i64 %arg1, 32
%75 = inttoptr i64 %memref-disp61 to ptr
%76 = load i64, ptr %75, align 1
%77 = sub i64 %76, %RDX
%78 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %76, i64 %RDX)
%CF62 = extractvalue { i64, i1 } %78, 1
%ZF63 = icmp eq i64 %77, 0
%highbit64 = and i64 -9223372036854775808, %77
%SF65 = icmp ne i64 %highbit64, 0
%79 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %76, i64 %RDX)
%OF66 = extractvalue { i64, i1 } %79, 1
%80 = and i64 %77, 255
%81 = call i64 @llvm.ctpop.i64(i64 %80)
%82 = and i64 %81, 1
%PF67 = icmp eq i64 %82, 0
%CmpZF_JNE = icmp eq i1 %ZF63, false
br i1 %CmpZF_JNE, label %bb.15, label %bb.13
bb.13: ; preds = %bb.12
%memref-disp68 = add i64 %arg1, 40
%83 = inttoptr i64 %memref-disp68 to ptr
%84 = sext i32 0 to i64
store i64 %84, ptr %83, align 1
%ECX = add i32 %memload36, 1
%85 = and i32 %ECX, 255
%86 = call i32 @llvm.ctpop.i32(i32 %85)
%87 = and i32 %86, 1
%PF69 = icmp eq i32 %87, 0
%ZF70 = icmp eq i32 %ECX, 0
%highbit71 = and i32 -2147483648, %ECX
%SF72 = icmp ne i32 %highbit71, 0
%memref-disp73 = add i64 %arg1, 20
%88 = inttoptr i64 %memref-disp73 to ptr
store i32 %ECX, ptr %88, align 1
br label %bb.16
bb.15: ; preds = %bb.12, %bb.11, %bb.10, %bb.9
%memref-disp74 = add i64 %arg1, 16
%89 = inttoptr i64 %memref-disp74 to ptr
%memload75 = load i32, ptr %89, align 1
%90 = sub i32 %memload75, 1
%91 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload75, i32 1)
%CF76 = extractvalue { i32, i1 } %91, 1
%ZF77 = icmp eq i32 %90, 0
%highbit78 = and i32 -2147483648, %90
%SF79 = icmp ne i32 %highbit78, 0
%92 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload75, i32 1)
%OF80 = extractvalue { i32, i1 } %92, 1
%93 = and i32 %90, 255
%94 = call i32 @llvm.ctpop.i32(i32 %93)
%95 = and i32 %94, 1
%PF81 = icmp eq i32 %95, 0
%DL = icmp eq i1 %ZF77, false
%96 = zext i1 %DL to i32
%97 = zext i1 %DL to i32
%EDX = add nsw i32 %96, %97
%highbit82 = and i32 -2147483648, %EDX
%SF83 = icmp ne i32 %highbit82, 0
%ZF84 = icmp eq i32 %EDX, 0
%EDX91 = add i32 %EDX, 3
%98 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %EDX, i32 3)
%CF85 = extractvalue { i32, i1 } %98, 1
%99 = and i32 %EDX91, 255
%100 = call i32 @llvm.ctpop.i32(i32 %99)
%101 = and i32 %100, 1
%PF86 = icmp eq i32 %101, 0
%ZF87 = icmp eq i32 %EDX91, 0
%highbit88 = and i32 -2147483648, %EDX91
%SF89 = icmp ne i32 %highbit88, 0
%102 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %EDX, i32 3)
%OF90 = extractvalue { i32, i1 } %102, 1
%103 = and i32 %memload75, %memload75
%highbit92 = and i32 -2147483648, %103
%SF93 = icmp ne i32 %highbit92, 0
%ZF94 = icmp eq i32 %103, 0
%104 = and i32 %103, 255
%105 = call i32 @llvm.ctpop.i32(i32 %104)
%106 = and i32 %105, 1
%PF95 = icmp eq i32 %106, 0
%Cond_CMOVNE = icmp eq i1 %ZF94, false
%CMOV = select i1 %Cond_CMOVNE, i32 %EDX91, i32 1
%memref-disp96 = add i64 %arg1, 16
%107 = inttoptr i64 %memref-disp96 to ptr
store i32 %CMOV, ptr %107, align 1
%memref-disp97 = add i64 %arg1, 24
%108 = inttoptr i64 %memref-disp97 to ptr
store i32 %memload23, ptr %108, align 1
%memref-disp98 = add i64 %arg1, 20
%109 = inttoptr i64 %memref-disp98 to ptr
store i32 0, ptr %109, align 1
br label %bb.16
bb.14: ; preds = %bb.8
%memref-disp99 = add i64 %arg1, 16
%110 = inttoptr i64 %memref-disp99 to ptr
store i32 0, ptr %110, align 1
%memref-disp100 = add i64 %arg1, 40
%111 = inttoptr i64 %memref-disp100 to ptr
%112 = sext i32 0 to i64
store i64 %112, ptr %111, align 1
br label %bb.16
bb.16: ; preds = %bb.15, %bb.14, %bb.13, %bb.7, %entry
%memref-disp101 = add i64 %arg1, 8
%113 = inttoptr i64 %memref-disp101 to ptr
%memload102 = load i64, ptr %113, align 1
%114 = trunc i64 %memload102 to i32
%RAX = sext i32 %114 to i64
%memref-disp103 = add i64 %arg1, 32
%115 = inttoptr i64 %memref-disp103 to ptr
store i64 %RAX, ptr %115, align 1
ret void
%memref-disp104 = add i64 %arg1, 8
%116 = inttoptr i64 %memref-disp104 to ptr
%117 = load i32, ptr %116, align 1
%118 = zext i32 %117 to i64
%119 = zext i32 16 to i64
%120 = sub i64 %118, %119
%121 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %118, i64 %119)
%CF105 = extractvalue { i64, i1 } %121, 1
%ZF106 = icmp eq i64 %120, 0
%highbit107 = and i64 -9223372036854775808, %120
%SF108 = icmp ne i64 %highbit107, 0
%122 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %118, i64 %119)
%OF109 = extractvalue { i64, i1 } %122, 1
%123 = and i64 %120, 255
%124 = call i64 @llvm.ctpop.i64(i64 %123)
%125 = and i64 %124, 1
%PF110 = icmp eq i64 %125, 0
%CmpZF_JLE121 = icmp eq i1 %ZF106, true
%CmpOF_JLE122 = icmp ne i1 %SF108, %OF109
%ZFOrSF_JLE123 = or i1 %CmpZF_JLE121, %CmpOF_JLE122
br i1 %ZFOrSF_JLE123, label %bb.5, label %bb.17
bb.17: ; preds = %bb.16
br label %bb.3
bb.3: ; preds = %bb.17, %bb.2, %bb.4, %bb.19
%126 = inttoptr i64 %arg1 to ptr
store i32 1, ptr %126, align 1
%127 = zext i8 1 to i64
store i64 %127, ptr %CL-SKT-LOC, align 1
br label %bb.6
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/staging/rtl8188eu/hal/extr_hal8188e_rate_adaptive.c_odm_PTTryState_8188E.c'
source_filename = "AnghaBench/linux/drivers/staging/rtl8188eu/hal/extr_hal8188e_rate_adaptive.c_odm_PTTryState_8188E.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @odm_PTTryState_8188E], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync)
define internal void @odm_PTTryState_8188E(ptr nocapture noundef %0) #0 {
store i32 0, ptr %0, align 8, !tbaa !6
%2 = getelementptr inbounds i8, ptr %0, i64 4
%3 = load i32, ptr %2, align 4, !tbaa !12
switch i32 %3, label %21 [
i32 3, label %4
i32 2, label %8
i32 1, label %12
i32 0, label %16
]
4: ; preds = %1
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load i32, ptr %5, align 8, !tbaa !13
%7 = icmp sgt i32 %6, 24
br i1 %7, label %20, label %21
8: ; preds = %1
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = load i32, ptr %9, align 8, !tbaa !13
%11 = icmp sgt i32 %10, 16
br i1 %11, label %20, label %21
12: ; preds = %1
%13 = getelementptr inbounds i8, ptr %0, i64 8
%14 = load i32, ptr %13, align 8, !tbaa !13
%15 = icmp sgt i32 %14, 9
br i1 %15, label %20, label %21
16: ; preds = %1
%17 = getelementptr inbounds i8, ptr %0, i64 8
%18 = load i32, ptr %17, align 8, !tbaa !13
%19 = icmp sgt i32 %18, 2
br i1 %19, label %20, label %21
20: ; preds = %16, %12, %8, %4
store i32 1, ptr %0, align 8, !tbaa !6
br label %21
21: ; preds = %20, %1, %16, %12, %8, %4
%22 = phi i1 [ false, %16 ], [ false, %12 ], [ false, %8 ], [ false, %4 ], [ false, %1 ], [ true, %20 ]
%23 = getelementptr inbounds i8, ptr %0, i64 12
%24 = load i32, ptr %23, align 4, !tbaa !14
%25 = icmp slt i32 %24, 48
br i1 %25, label %26, label %28
26: ; preds = %21
%27 = getelementptr inbounds i8, ptr %0, i64 16
store i32 0, ptr %27, align 8, !tbaa !15
br label %62
28: ; preds = %21
br i1 %22, label %29, label %59
29: ; preds = %28
%30 = getelementptr inbounds i8, ptr %0, i64 20
%31 = load i32, ptr %30, align 4, !tbaa !16
%32 = icmp sgt i32 %31, 9
br i1 %32, label %48, label %33
33: ; preds = %29
%34 = getelementptr inbounds i8, ptr %0, i64 24
%35 = load i32, ptr %34, align 8, !tbaa !17
%36 = add nuw nsw i32 %24, 5
%37 = icmp sgt i32 %35, %36
%38 = add nsw i32 %24, -5
%39 = icmp slt i32 %35, %38
%40 = select i1 %37, i1 true, i1 %39
br i1 %40, label %48, label %41
41: ; preds = %33
%42 = getelementptr inbounds i8, ptr %0, i64 8
%43 = load i32, ptr %42, align 8, !tbaa !13
%44 = sext i32 %43 to i64
%45 = getelementptr inbounds i8, ptr %0, i64 32
%46 = load i64, ptr %45, align 8, !tbaa !18
%47 = icmp eq i64 %46, %44
br i1 %47, label %56, label %48
48: ; preds = %41, %33, %29
%49 = getelementptr inbounds i8, ptr %0, i64 16
%50 = load i32, ptr %49, align 8, !tbaa !15
%51 = icmp eq i32 %50, 1
%52 = select i1 %51, i32 3, i32 5
%53 = icmp eq i32 %50, 0
%54 = select i1 %53, i32 1, i32 %52
store i32 %54, ptr %49, align 8, !tbaa !15
%55 = getelementptr inbounds i8, ptr %0, i64 24
store i32 %24, ptr %55, align 8, !tbaa !17
store i32 0, ptr %30, align 4, !tbaa !16
br label %62
56: ; preds = %41
%57 = getelementptr inbounds i8, ptr %0, i64 40
store i64 0, ptr %57, align 8, !tbaa !19
%58 = add nsw i32 %31, 1
store i32 %58, ptr %30, align 4, !tbaa !16
br label %62
59: ; preds = %28
%60 = getelementptr inbounds i8, ptr %0, i64 16
store i32 0, ptr %60, align 8, !tbaa !15
%61 = getelementptr inbounds i8, ptr %0, i64 40
store i64 0, ptr %61, align 8, !tbaa !19
br label %62
62: ; preds = %59, %56, %48, %26
%63 = getelementptr inbounds i8, ptr %0, i64 8
%64 = load i32, ptr %63, align 8, !tbaa !13
%65 = sext i32 %64 to i64
%66 = getelementptr inbounds i8, ptr %0, i64 32
store i64 %65, ptr %66, align 8, !tbaa !18
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"odm_ra_info", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !8, i64 24, !11, i64 32, !11, i64 40}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !8, i64 4}
!13 = !{!7, !8, i64 8}
!14 = !{!7, !8, i64 12}
!15 = !{!7, !8, i64 16}
!16 = !{!7, !8, i64 20}
!17 = !{!7, !8, i64 24}
!18 = !{!7, !11, i64 32}
!19 = !{!7, !11, i64 40}
| linux_drivers_staging_rtl8188eu_hal_extr_hal8188e_rate_adaptive.c_odm_PTTryState_8188E |
; ModuleID = 'exploitdb_exploits_unix_remote_extr_22964.c_usage.so'
source_filename = "exploitdb_exploits_unix_remote_extr_22964.c_usage.so"
@stderr = external dso_local global i32, align 4
@0 = private unnamed_addr constant [179 x i8] c"mSQLexploit\0A\0A\00 -l\09\09list available targets.\0A\00 -t target\09target selection.\0A\00 *** MANUAL ATTACK ***\0A\00 -s [addr]\09smash address.\0A\00 -w [addr]\09write address.\0A\00 -p [num]\09number of pops.\0A\00", align 1, !ROData_SecInfo !0
declare dso_local i32 @fprintf(ptr, ptr, ...)
declare dso_local void @exit(i32)
define dso_local void @usage() {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%memload = load i64, ptr @stderr, align 1
%0 = inttoptr i64 %memload to ptr
%memload1 = load i32, ptr %0, align 1
%1 = inttoptr i32 %memload1 to ptr
%EAX = call i32 (ptr, ptr, ...) @fprintf(ptr %1, ptr @0)
%2 = inttoptr i64 %memload to ptr
%memload2 = load i32, ptr %2, align 1
%3 = inttoptr i32 %memload2 to ptr
%EAX4 = call i32 (ptr, ptr, ...) @fprintf(ptr %3, ptr getelementptr inbounds ([179 x i8], ptr @0, i32 0, i32 14))
%4 = inttoptr i64 %memload to ptr
%memload5 = load i32, ptr %4, align 1
%5 = inttoptr i32 %memload5 to ptr
%EAX7 = call i32 (ptr, ptr, ...) @fprintf(ptr %5, ptr getelementptr inbounds ([179 x i8], ptr @0, i32 0, i32 44))
%6 = inttoptr i64 %memload to ptr
%memload8 = load i32, ptr %6, align 1
%7 = inttoptr i32 %memload8 to ptr
%EAX10 = call i32 (ptr, ptr, ...) @fprintf(ptr %7, ptr getelementptr inbounds ([179 x i8], ptr @0, i32 0, i32 74))
%8 = inttoptr i64 %memload to ptr
%memload11 = load i32, ptr %8, align 1
%9 = inttoptr i32 %memload11 to ptr
%EAX13 = call i32 (ptr, ptr, ...) @fprintf(ptr %9, ptr getelementptr inbounds ([179 x i8], ptr @0, i32 0, i32 98))
%10 = inttoptr i64 %memload to ptr
%memload14 = load i32, ptr %10, align 1
%11 = inttoptr i32 %memload14 to ptr
%EAX16 = call i32 (ptr, ptr, ...) @fprintf(ptr %11, ptr getelementptr inbounds ([179 x i8], ptr @0, i32 0, i32 125))
%12 = inttoptr i64 %memload to ptr
%memload17 = load i32, ptr %12, align 1
%13 = inttoptr i32 %memload17 to ptr
%EAX19 = call i32 (ptr, ptr, ...) @fprintf(ptr %13, ptr getelementptr inbounds ([179 x i8], ptr @0, i32 0, i32 152))
tail call void @exit(i32 1)
unreachable
}
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/exploitdb/exploits/unix/remote/extr_22964.c_usage.c'
source_filename = "AnghaBench/exploitdb/exploits/unix/remote/extr_22964.c_usage.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@stderr = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [14 x i8] c"mSQLexploit\0A\0A\00", align 1
@.str.1 = private unnamed_addr constant [30 x i8] c" -l\09\09list available targets.\0A\00", align 1
@.str.2 = private unnamed_addr constant [30 x i8] c" -t target\09target selection.\0A\00", align 1
@.str.3 = private unnamed_addr constant [24 x i8] c" *** MANUAL ATTACK ***\0A\00", align 1
@.str.4 = private unnamed_addr constant [27 x i8] c" -s [addr]\09smash address.\0A\00", align 1
@.str.5 = private unnamed_addr constant [27 x i8] c" -w [addr]\09write address.\0A\00", align 1
@.str.6 = private unnamed_addr constant [27 x i8] c" -p [num]\09number of pops.\0A\00", align 1
; Function Attrs: noreturn nounwind ssp uwtable(sync)
define void @usage() local_unnamed_addr #0 {
%1 = load i32, ptr @stderr, align 4, !tbaa !6
%2 = tail call i32 @fprintf(i32 noundef %1, ptr noundef nonnull @.str) #3
%3 = load i32, ptr @stderr, align 4, !tbaa !6
%4 = tail call i32 @fprintf(i32 noundef %3, ptr noundef nonnull @.str.1) #3
%5 = load i32, ptr @stderr, align 4, !tbaa !6
%6 = tail call i32 @fprintf(i32 noundef %5, ptr noundef nonnull @.str.2) #3
%7 = load i32, ptr @stderr, align 4, !tbaa !6
%8 = tail call i32 @fprintf(i32 noundef %7, ptr noundef nonnull @.str.3) #3
%9 = load i32, ptr @stderr, align 4, !tbaa !6
%10 = tail call i32 @fprintf(i32 noundef %9, ptr noundef nonnull @.str.4) #3
%11 = load i32, ptr @stderr, align 4, !tbaa !6
%12 = tail call i32 @fprintf(i32 noundef %11, ptr noundef nonnull @.str.5) #3
%13 = load i32, ptr @stderr, align 4, !tbaa !6
%14 = tail call i32 @fprintf(i32 noundef %13, ptr noundef nonnull @.str.6) #3
%15 = tail call i32 @exit(i32 noundef 1) #4
unreachable
}
declare i32 @fprintf(i32 noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
attributes #0 = { noreturn nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { noreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| exploitdb_exploits_unix_remote_extr_22964.c_usage |
; ModuleID = 'reactos_drivers_bus_acpi_acpica_utilities_extr_utclib.c_strchr.so'
source_filename = "reactos_drivers_bus_acpi_acpica_utilities_extr_utclib.c_strchr.so"
define dso_local i32 @strchr(i64 %arg1, i8 %arg2) {
entry:
%EAX-SKT-LOC = alloca i64, align 8
%RAX-SKT-LOC = alloca i64, align 8
%CL-SKT-LOC = alloca i64, align 8
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
%1 = trunc i32 %memload to i8
%ECX = zext i8 %1 to i32
%2 = trunc i32 %ECX to i8
%3 = trunc i32 %ECX to i8
%4 = and i8 %2, %3
%highbit = and i8 -128, %4
%SF = icmp ne i8 %highbit, 0
%ZF = icmp eq i8 %4, 0
%5 = call i8 @llvm.ctpop.i8(i8 %4)
%6 = and i8 %5, 1
%PF = icmp eq i8 %6, 0
%7 = zext i32 %ECX to i64
store i64 %7, ptr %CL-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%EDX = sext i8 %arg2 to i32
store i64 %arg1, ptr %RAX-SKT-LOC, align 1
store i64 %arg1, ptr %EAX-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.3
%8 = load i64, ptr %CL-SKT-LOC, align 1
%CL = trunc i64 %8 to i8
%ECX1 = sext i8 %CL to i32
%9 = sub i32 %EDX, %ECX1
%10 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EDX, i32 %ECX1)
%CF = extractvalue { i32, i1 } %10, 1
%ZF2 = icmp eq i32 %9, 0
%highbit3 = and i32 -2147483648, %9
%SF4 = icmp ne i32 %highbit3, 0
%11 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EDX, i32 %ECX1)
%OF = extractvalue { i32, i1 } %11, 1
%12 = and i32 %9, 255
%13 = call i32 @llvm.ctpop.i32(i32 %12)
%14 = and i32 %13, 1
%PF5 = icmp eq i32 %14, 0
%CmpZF_JE17 = icmp eq i1 %ZF2, true
br i1 %CmpZF_JE17, label %bb.5, label %bb.3
bb.3: ; preds = %bb.2
%RAX = load i64, ptr %RAX-SKT-LOC, align 1
%memref-disp = add i64 %RAX, 1
%15 = inttoptr i64 %memref-disp to ptr
%memload6 = load i32, ptr %15, align 1
%16 = trunc i32 %memload6 to i8
%ECX7 = zext i8 %16 to i32
%RAX12 = add i64 %RAX, 1
%17 = and i64 %RAX12, 255
%18 = call i64 @llvm.ctpop.i64(i64 %17)
%19 = and i64 %18, 1
%PF8 = icmp eq i64 %19, 0
%ZF9 = icmp eq i64 %RAX12, 0
%highbit10 = and i64 -9223372036854775808, %RAX12
%SF11 = icmp ne i64 %highbit10, 0
%20 = trunc i32 %ECX7 to i8
%21 = trunc i32 %ECX7 to i8
%22 = and i8 %20, %21
%highbit13 = and i8 -128, %22
%SF14 = icmp ne i8 %highbit13, 0
%ZF15 = icmp eq i8 %22, 0
%23 = call i8 @llvm.ctpop.i8(i8 %22)
%24 = and i8 %23, 1
%PF16 = icmp eq i8 %24, 0
store i64 %RAX12, ptr %EAX-SKT-LOC, align 1
%CmpZF_JNE = icmp eq i1 %ZF15, false
%25 = zext i32 %ECX7 to i64
store i64 %25, ptr %CL-SKT-LOC, align 1
store i64 %RAX12, ptr %RAX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.2, label %bb.4
bb.4: ; preds = %bb.3, %entry
%26 = zext i32 0 to i64
store i64 %26, ptr %EAX-SKT-LOC, align 1
br label %bb.5
bb.5: ; preds = %bb.4, %bb.2
%27 = load i64, ptr %EAX-SKT-LOC, align 1
%EAX = trunc i64 %27 to i32
ret i32 %EAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/reactos/drivers/bus/acpi/acpica/utilities/extr_utclib.c_strchr.c'
source_filename = "AnghaBench/reactos/drivers/bus/acpi/acpica/utilities/extr_utclib.c_strchr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define noundef ptr @strchr(ptr noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i8, ptr %0, align 1, !tbaa !6
%4 = icmp eq i8 %3, 0
br i1 %4, label %17, label %5
5: ; preds = %2
%6 = shl i32 %1, 24
%7 = ashr exact i32 %6, 24
br label %8
8: ; preds = %5, %13
%9 = phi i8 [ %3, %5 ], [ %15, %13 ]
%10 = phi ptr [ %0, %5 ], [ %14, %13 ]
%11 = sext i8 %9 to i32
%12 = icmp eq i32 %7, %11
br i1 %12, label %17, label %13
13: ; preds = %8
%14 = getelementptr inbounds i8, ptr %10, i64 1
%15 = load i8, ptr %14, align 1, !tbaa !6
%16 = icmp eq i8 %15, 0
br i1 %16, label %17, label %8, !llvm.loop !9
17: ; preds = %8, %13, %2
%18 = phi ptr [ null, %2 ], [ null, %13 ], [ %10, %8 ]
ret ptr %18
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| reactos_drivers_bus_acpi_acpica_utilities_extr_utclib.c_strchr |
; ModuleID = 'fastsocket_kernel_net_openvswitch_extr_datapath.c_clear_stats.so'
source_filename = "fastsocket_kernel_net_openvswitch_extr_datapath.c_clear_stats.so"
define dso_local <4 x float> @clear_stats(i64 %arg1) {
entry:
%memref-disp = add i64 %arg1, 16
%0 = inttoptr i64 %memref-disp to ptr
store <4 x float> zeroinitializer, ptr %0, align 1
%1 = inttoptr i64 %arg1 to ptr
store <4 x float> zeroinitializer, ptr %1, align 1
ret <4 x float> zeroinitializer
}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/openvswitch/extr_datapath.c_clear_stats.c'
source_filename = "AnghaBench/fastsocket/kernel/net/openvswitch/extr_datapath.c_clear_stats.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @clear_stats], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync)
define internal void @clear_stats(ptr nocapture noundef writeonly %0) #0 {
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %0, i8 0, i64 32, i1 false)
ret void
}
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_net_openvswitch_extr_datapath.c_clear_stats |
; ModuleID = 'linux_sound_pci_extr_via82xx.c_snd_via82xx_mixer_free_ac97_bus.so'
source_filename = "linux_sound_pci_extr_via82xx.c_snd_via82xx_mixer_free_ac97_bus.so"
define dso_local i64 @snd_via82xx_mixer_free_ac97_bus(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%1 = inttoptr i64 %memload to ptr
%2 = sext i32 0 to i64
store i64 %2, ptr %1, align 1
ret i64 %memload
}
| ; ModuleID = 'AnghaBench/linux/sound/pci/extr_via82xx.c_snd_via82xx_mixer_free_ac97_bus.c'
source_filename = "AnghaBench/linux/sound/pci/extr_via82xx.c_snd_via82xx_mixer_free_ac97_bus.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @snd_via82xx_mixer_free_ac97_bus], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @snd_via82xx_mixer_free_ac97_bus(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
store ptr null, ptr %2, align 8, !tbaa !11
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"snd_ac97_bus", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"via82xx", !8, i64 0}
| linux_sound_pci_extr_via82xx.c_snd_via82xx_mixer_free_ac97_bus |
; ModuleID = 'fastsocket_kernel_drivers_net_wireless_brcm80211_brcmsmac_extr_main.c_brcms_c_init_scb.so'
source_filename = "fastsocket_kernel_drivers_net_wireless_brcm80211_brcmsmac_extr_main.c_brcms_c_init_scb.so"
@SCB_WMECAP = common dso_local global i32 0, align 4
@SCB_HTCAP = common dso_local global i32 0, align 4
@NUMPRIO = common dso_local global i32 0, align 4
@SCB_MAGIC = common dso_local global i32 0, align 4
declare dso_local ptr @memset(ptr, i32, i64)
define dso_local i32 @brcms_c_init_scb(i64 %arg1) {
entry:
%RSI-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
%0 = inttoptr i64 %arg1 to ptr
%1 = zext i32 32 to i64
%2 = call ptr @memset(ptr %0, i32 0, i64 %1)
%RAX = ptrtoint ptr %2 to i64
%memload = load i32, ptr @SCB_HTCAP, align 1
%memload1 = load i32, ptr @SCB_WMECAP, align 1
%ECX = or i32 %memload, %memload1
%3 = and i32 %ECX, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
%6 = inttoptr i64 %arg1 to ptr
store i32 %ECX, ptr %6, align 1
%7 = load i32, ptr @NUMPRIO, align 4
%8 = zext i32 %7 to i64
%9 = zext i32 0 to i64
%10 = sub i64 %8, %9
%11 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %8, i64 %9)
%CF = extractvalue { i64, i1 } %11, 1
%ZF = icmp eq i64 %10, 0
%highbit = and i64 -9223372036854775808, %10
%SF = icmp ne i64 %highbit, 0
%12 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %8, i64 %9)
%OF = extractvalue { i64, i1 } %12, 1
%13 = and i64 %10, 255
%14 = call i64 @llvm.ctpop.i64(i64 %13)
%15 = and i64 %14, 1
%PF2 = icmp eq i64 %15, 0
%CmpZF_JLE = icmp eq i1 %ZF, true
%CmpOF_JLE = icmp ne i1 %SF, %OF
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
br i1 %ZFOrSF_JLE, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%memref-disp = add i64 %arg1, 8
%16 = inttoptr i64 %memref-disp to ptr
%memload3 = load i64, ptr %16, align 1
%memref-disp4 = add i64 %arg1, 24
%17 = inttoptr i64 %memref-disp4 to ptr
%memload5 = load i64, ptr %17, align 1
%18 = zext i32 0 to i64
store i64 %18, ptr %RSI-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.2
%RSI = load i64, ptr %RSI-SKT-LOC, align 1
%memref-idxreg = mul i64 8, %RSI
%memref-basereg = add i64 %memload5, %memref-idxreg
%19 = inttoptr i64 %memref-basereg to ptr
%20 = sext i32 0 to i64
store i64 %20, ptr %19, align 1
%memref-idxreg6 = mul i64 4, %RSI
%memref-basereg7 = add i64 %memload3, %memref-idxreg6
%21 = inttoptr i64 %memref-basereg7 to ptr
store i32 65535, ptr %21, align 1
%RSI12 = add i64 %RSI, 1
%22 = and i64 %RSI12, 255
%23 = call i64 @llvm.ctpop.i64(i64 %22)
%24 = and i64 %23, 1
%PF8 = icmp eq i64 %24, 0
%ZF9 = icmp eq i64 %RSI12, 0
%highbit10 = and i64 -9223372036854775808, %RSI12
%SF11 = icmp ne i64 %highbit10, 0
%memload13 = load i64, ptr @NUMPRIO, align 1
%25 = trunc i64 %memload13 to i32
%RDI = sext i32 %25 to i64
%26 = sub i64 %RSI12, %RDI
%27 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RSI12, i64 %RDI)
%CF14 = extractvalue { i64, i1 } %27, 1
%ZF15 = icmp eq i64 %26, 0
%highbit16 = and i64 -9223372036854775808, %26
%SF17 = icmp ne i64 %highbit16, 0
%28 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RSI12, i64 %RDI)
%OF18 = extractvalue { i64, i1 } %28, 1
%29 = and i64 %26, 255
%30 = call i64 @llvm.ctpop.i64(i64 %29)
%31 = and i64 %30, 1
%PF19 = icmp eq i64 %31, 0
%SFAndOF_JL = icmp ne i1 %SF17, %OF18
store i64 %RSI12, ptr %RSI-SKT-LOC, align 1
br i1 %SFAndOF_JL, label %bb.2, label %bb.3
bb.3: ; preds = %bb.2, %entry
%memref-disp20 = add i64 %arg1, 16
%32 = inttoptr i64 %memref-disp20 to ptr
store i32 65535, ptr %32, align 1
%memload21 = load i32, ptr @SCB_MAGIC, align 1
%memref-disp22 = add i64 %arg1, 20
%33 = inttoptr i64 %memref-disp22 to ptr
store i32 %memload21, ptr %33, align 1
ret i32 %memload21
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/brcm80211/brcmsmac/extr_main.c_brcms_c_init_scb.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/brcm80211/brcmsmac/extr_main.c_brcms_c_init_scb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SCB_WMECAP = common local_unnamed_addr global i32 0, align 4
@SCB_HTCAP = common local_unnamed_addr global i32 0, align 4
@NUMPRIO = common local_unnamed_addr global i32 0, align 4
@SCB_MAGIC = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @brcms_c_init_scb(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @memset(ptr noundef %0, i32 noundef 0, i32 noundef 32) #2
%3 = load i32, ptr @SCB_WMECAP, align 4, !tbaa !6
%4 = load i32, ptr @SCB_HTCAP, align 4, !tbaa !6
%5 = or i32 %4, %3
store i32 %5, ptr %0, align 8, !tbaa !10
%6 = load i32, ptr @NUMPRIO, align 4, !tbaa !6
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %21
8: ; preds = %1
%9 = getelementptr inbounds i8, ptr %0, i64 24
%10 = load ptr, ptr %9, align 8, !tbaa !13
%11 = getelementptr inbounds i8, ptr %0, i64 8
%12 = load ptr, ptr %11, align 8, !tbaa !14
br label %13
13: ; preds = %8, %13
%14 = phi i64 [ 0, %8 ], [ %17, %13 ]
%15 = getelementptr inbounds i64, ptr %10, i64 %14
store i64 0, ptr %15, align 8, !tbaa !15
%16 = getelementptr inbounds i32, ptr %12, i64 %14
store i32 65535, ptr %16, align 4, !tbaa !6
%17 = add nuw nsw i64 %14, 1
%18 = load i32, ptr @NUMPRIO, align 4, !tbaa !6
%19 = sext i32 %18 to i64
%20 = icmp slt i64 %17, %19
br i1 %20, label %13, label %21, !llvm.loop !17
21: ; preds = %13, %1
%22 = getelementptr inbounds i8, ptr %0, i64 16
store i32 65535, ptr %22, align 8, !tbaa !19
%23 = load i32, ptr @SCB_MAGIC, align 4, !tbaa !6
%24 = getelementptr inbounds i8, ptr %0, i64 20
store i32 %23, ptr %24, align 4, !tbaa !20
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"scb", !7, i64 0, !12, i64 8, !7, i64 16, !7, i64 20, !12, i64 24}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 24}
!14 = !{!11, !12, i64 8}
!15 = !{!16, !16, i64 0}
!16 = !{!"long", !8, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!11, !7, i64 16}
!20 = !{!11, !7, i64 20}
| fastsocket_kernel_drivers_net_wireless_brcm80211_brcmsmac_extr_main.c_brcms_c_init_scb |
; ModuleID = 'RetroArch_menu_drivers_display_extr_menu_display_null.c_menu_display_null_get_default_vertices.so'
source_filename = "RetroArch_menu_drivers_display_extr_menu_display_null.c_menu_display_null_get_default_vertices.so"
@menu_display_null_get_default_vertices.dummy = common dso_local global [64 x i8] zeroinitializer, align 16
define dso_local i64 @menu_display_null_get_default_vertices() {
entry:
%0 = bitcast ptr @menu_display_null_get_default_vertices.dummy to ptr
%1 = getelementptr inbounds [8 x i64], ptr %0, i32 0, i32 0
%RAX = ptrtoint ptr %1 to i64
ret i64 %RAX
}
| ; ModuleID = 'AnghaBench/RetroArch/menu/drivers_display/extr_menu_display_null.c_menu_display_null_get_default_vertices.c'
source_filename = "AnghaBench/RetroArch/menu/drivers_display/extr_menu_display_null.c_menu_display_null_get_default_vertices.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@menu_display_null_get_default_vertices.dummy = internal global [16 x float] zeroinitializer, align 4
@llvm.used = appending global [1 x ptr] [ptr @menu_display_null_get_default_vertices], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef nonnull ptr @menu_display_null_get_default_vertices() #0 {
ret ptr @menu_display_null_get_default_vertices.dummy
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| RetroArch_menu_drivers_display_extr_menu_display_null.c_menu_display_null_get_default_vertices |
; ModuleID = 'linux_drivers_isdn_mISDN_extr_layer2.c_cansend.so'
source_filename = "linux_drivers_isdn_mISDN_extr_layer2.c_cansend.so"
| ; ModuleID = 'AnghaBench/linux/drivers/isdn/mISDN/extr_layer2.c_cansend.c'
source_filename = "AnghaBench/linux/drivers/isdn/mISDN/extr_layer2.c_cansend.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FLG_MOD128 = common local_unnamed_addr global i32 0, align 4
@FLG_PEER_BUSY = common local_unnamed_addr global i32 0, align 4
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_isdn_mISDN_extr_layer2.c_cansend |
; ModuleID = 'FFmpeg_libavformat_extr_rtp.c_ff_rtp_get_codec_info.so'
source_filename = "FFmpeg_libavformat_extr_rtp.c_ff_rtp_get_codec_info.so"
@rtp_payload_types = common dso_local global i64 0, align 8
@AV_CODEC_ID_NONE = common dso_local global i64 0, align 8
define dso_local i32 @ff_rtp_get_codec_info(i64 %arg1, i32 %arg2) {
entry:
%EAX-SKT-LOC = alloca i32, align 4
%RCX-SKT-LOC43 = alloca i64, align 8
%RDX-SKT-LOC = alloca i64, align 8
%EDX-SKT-LOC = alloca i64, align 8
%RCX-SKT-LOC = alloca i64, align 8
%R10D-SKT-LOC = alloca i64, align 8
%memload = load i64, ptr @rtp_payload_types, align 1
%0 = inttoptr i64 %memload to ptr
%memload1 = load i32, ptr %0, align 1
%1 = and i32 %memload1, %memload1
%highbit = and i32 -2147483648, %1
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %1, 0
%2 = and i32 %1, 255
%3 = call i32 @llvm.ctpop.i32(i32 %2)
%4 = and i32 %3, 1
%PF = icmp eq i32 %4, 0
%5 = zext i32 %memload1 to i64
store i64 %5, ptr %R10D-SKT-LOC, align 1
store i32 -1, ptr %EAX-SKT-LOC, align 1
%CmpSF_JS = icmp eq i1 %SF, true
br i1 %CmpSF_JS, label %bb.10, label %bb.1
bb.1: ; preds = %entry
%memload2 = load i64, ptr @AV_CODEC_ID_NONE, align 1
%memref-disp = add i64 %memload, 40
store i64 %memref-disp, ptr %RCX-SKT-LOC, align 1
%6 = zext i32 0 to i64
store i64 %6, ptr %EDX-SKT-LOC, align 1
%7 = zext i32 0 to i64
store i64 %7, ptr %RDX-SKT-LOC, align 1
store i64 %memref-disp, ptr %RCX-SKT-LOC43, align 1
br label %bb.4
bb.4: ; preds = %bb.3, %bb.1
%8 = load i64, ptr %R10D-SKT-LOC, align 1
%R10D = trunc i64 %8 to i32
%9 = sub i32 %R10D, %arg2
%10 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %R10D, i32 %arg2)
%CF = extractvalue { i32, i1 } %10, 1
%ZF3 = icmp eq i32 %9, 0
%highbit4 = and i32 -2147483648, %9
%SF5 = icmp ne i32 %highbit4, 0
%11 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %R10D, i32 %arg2)
%OF = extractvalue { i32, i1 } %11, 1
%12 = and i32 %9, 255
%13 = call i32 @llvm.ctpop.i32(i32 %12)
%14 = and i32 %13, 1
%PF6 = icmp eq i32 %14, 0
%CmpZF_JNE = icmp eq i1 %ZF3, false
br i1 %CmpZF_JNE, label %bb.3, label %bb.5
bb.5: ; preds = %bb.4
%RCX = load i64, ptr %RCX-SKT-LOC, align 1
%memref-disp7 = add i64 %RCX, -32
%15 = inttoptr i64 %memref-disp7 to ptr
%memload8 = load i64, ptr %15, align 1
%16 = sub i64 %memload8, %memload2
%17 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload8, i64 %memload2)
%CF9 = extractvalue { i64, i1 } %17, 1
%ZF10 = icmp eq i64 %16, 0
%highbit11 = and i64 -9223372036854775808, %16
%SF12 = icmp ne i64 %highbit11, 0
%18 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload8, i64 %memload2)
%OF13 = extractvalue { i64, i1 } %18, 1
%19 = and i64 %16, 255
%20 = call i64 @llvm.ctpop.i64(i64 %19)
%21 = and i64 %20, 1
%PF14 = icmp eq i64 %21, 0
store i64 %RCX, ptr %RCX-SKT-LOC43, align 1
%CmpZF_JE = icmp eq i1 %ZF10, true
br i1 %CmpZF_JE, label %bb.3, label %bb.6
bb.6: ; preds = %bb.5
%22 = load i64, ptr %EDX-SKT-LOC, align 1
%EDX = trunc i64 %22 to i32
%23 = zext i32 %EDX to i64
%memref-idxreg = mul i64 4, %23
%24 = zext i32 %EDX to i64
%memref-basereg = add i64 %24, %memref-idxreg
%memref-idxreg15 = mul i64 8, %memref-basereg
%memref-basereg16 = add i64 %memload, %memref-idxreg15
%memref-disp17 = add i64 %memref-basereg16, 32
%25 = inttoptr i64 %memref-disp17 to ptr
%memload18 = load i32, ptr %25, align 1
%memref-disp19 = add i64 %arg1, 24
%26 = inttoptr i64 %memref-disp19 to ptr
store i32 %memload18, ptr %26, align 1
%27 = inttoptr i64 %arg1 to ptr
store i64 %memload8, ptr %27, align 1
%memref-idxreg20 = mul i64 8, %memref-basereg
%memref-basereg21 = add i64 %memload, %memref-idxreg20
%memref-disp22 = add i64 %memref-basereg21, 16
%28 = inttoptr i64 %memref-disp22 to ptr
%memload23 = load i64, ptr %28, align 1
%29 = and i64 %memload23, %memload23
%highbit24 = and i64 -9223372036854775808, %29
%SF25 = icmp ne i64 %highbit24, 0
%ZF26 = icmp eq i64 %29, 0
%30 = and i64 %29, 255
%31 = call i64 @llvm.ctpop.i64(i64 %30)
%32 = and i64 %31, 1
%PF27 = icmp eq i64 %32, 0
%CmpZF_JLE = icmp eq i1 %ZF26, true
%CmpOF_JLE = icmp ne i1 %SF25, false
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
br i1 %ZFOrSF_JLE, label %bb.8, label %bb.7
bb.7: ; preds = %bb.6
%memref-disp28 = add i64 %arg1, 8
%33 = inttoptr i64 %memref-disp28 to ptr
store i64 %memload23, ptr %33, align 1
br label %bb.8
bb.8: ; preds = %bb.7, %bb.6
%memref-idxreg29 = mul i64 8, %memref-basereg
%memref-basereg30 = add i64 %memload, %memref-idxreg29
%memref-disp31 = add i64 %memref-basereg30, 24
%34 = inttoptr i64 %memref-disp31 to ptr
%memload32 = load i64, ptr %34, align 1
%35 = and i64 %memload32, %memload32
%highbit33 = and i64 -9223372036854775808, %35
%SF34 = icmp ne i64 %highbit33, 0
%ZF35 = icmp eq i64 %35, 0
%36 = and i64 %35, 255
%37 = call i64 @llvm.ctpop.i64(i64 %36)
%38 = and i64 %37, 1
%PF36 = icmp eq i64 %38, 0
store i32 0, ptr %EAX-SKT-LOC, align 1
%CmpZF_JLE57 = icmp eq i1 %ZF35, true
%CmpOF_JLE58 = icmp ne i1 %SF34, false
%ZFOrSF_JLE59 = or i1 %CmpZF_JLE57, %CmpOF_JLE58
br i1 %ZFOrSF_JLE59, label %bb.10, label %bb.9
bb.9: ; preds = %bb.8
%memref-disp37 = add i64 %arg1, 16
%39 = inttoptr i64 %memref-disp37 to ptr
store i64 %memload32, ptr %39, align 1
br label %bb.10
bb.3: ; preds = %bb.5, %bb.4
%RDX = load i64, ptr %RDX-SKT-LOC, align 1
%RDX42 = add i64 %RDX, 1
%40 = and i64 %RDX42, 255
%41 = call i64 @llvm.ctpop.i64(i64 %40)
%42 = and i64 %41, 1
%PF38 = icmp eq i64 %42, 0
%ZF39 = icmp eq i64 %RDX42, 0
%highbit40 = and i64 -9223372036854775808, %RDX42
%SF41 = icmp ne i64 %highbit40, 0
%RCX44 = load i64, ptr %RCX-SKT-LOC43, align 1
%43 = inttoptr i64 %RCX44 to ptr
%memload45 = load i32, ptr %43, align 1
%RCX52 = add i64 %RCX44, 40
%44 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RCX44, i64 40)
%CF46 = extractvalue { i64, i1 } %44, 1
%45 = and i64 %RCX52, 255
%46 = call i64 @llvm.ctpop.i64(i64 %45)
%47 = and i64 %46, 1
%PF47 = icmp eq i64 %47, 0
%ZF48 = icmp eq i64 %RCX52, 0
%highbit49 = and i64 -9223372036854775808, %RCX52
%SF50 = icmp ne i64 %highbit49, 0
%48 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RCX44, i64 40)
%OF51 = extractvalue { i64, i1 } %48, 1
%49 = and i32 %memload45, %memload45
%highbit53 = and i32 -2147483648, %49
%SF54 = icmp ne i32 %highbit53, 0
%ZF55 = icmp eq i32 %49, 0
%50 = and i32 %49, 255
%51 = call i32 @llvm.ctpop.i32(i32 %50)
%52 = and i32 %51, 1
%PF56 = icmp eq i32 %52, 0
%CmpSF_JS60 = icmp eq i1 %SF54, true
store i64 %RDX42, ptr %EDX-SKT-LOC, align 1
store i64 %RCX52, ptr %RCX-SKT-LOC43, align 1
store i64 %RCX52, ptr %RCX-SKT-LOC, align 1
store i64 %RDX42, ptr %RDX-SKT-LOC, align 1
%53 = zext i32 %memload45 to i64
store i64 %53, ptr %R10D-SKT-LOC, align 1
br i1 %CmpSF_JS60, label %bb.10, label %bb.4
bb.10: ; preds = %bb.9, %bb.3, %bb.8, %entry
%EAX = load i32, ptr %EAX-SKT-LOC, align 1
ret i32 %EAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/FFmpeg/libavformat/extr_rtp.c_ff_rtp_get_codec_info.c'
source_filename = "AnghaBench/FFmpeg/libavformat/extr_rtp.c_ff_rtp_get_codec_info.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_5__ = type { i32, i64, i64, i64, i32 }
@rtp_payload_types = common local_unnamed_addr global ptr null, align 8
@AV_CODEC_ID_NONE = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define range(i32 -1, 1) i32 @ff_rtp_get_codec_info(ptr nocapture noundef writeonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load ptr, ptr @rtp_payload_types, align 8, !tbaa !6
%4 = load i32, ptr %3, align 8, !tbaa !10
%5 = icmp sgt i32 %4, -1
br i1 %5, label %6, label %39
6: ; preds = %2
%7 = load i64, ptr @AV_CODEC_ID_NONE, align 8
br label %8
8: ; preds = %6, %34
%9 = phi i64 [ 0, %6 ], [ %35, %34 ]
%10 = phi i32 [ %4, %6 ], [ %37, %34 ]
%11 = icmp eq i32 %10, %1
br i1 %11, label %12, label %34
12: ; preds = %8
%13 = getelementptr inbounds %struct.TYPE_5__, ptr %3, i64 %9
%14 = getelementptr inbounds i8, ptr %13, i64 8
%15 = load i64, ptr %14, align 8, !tbaa !14
%16 = icmp eq i64 %15, %7
br i1 %16, label %34, label %17
17: ; preds = %12
%18 = getelementptr inbounds i8, ptr %13, i64 32
%19 = load i32, ptr %18, align 8, !tbaa !15
%20 = getelementptr inbounds i8, ptr %0, i64 24
store i32 %19, ptr %20, align 8, !tbaa !16
%21 = getelementptr inbounds %struct.TYPE_5__, ptr %3, i64 %9, i32 1
%22 = load i64, ptr %21, align 8, !tbaa !14
store i64 %22, ptr %0, align 8, !tbaa !18
%23 = getelementptr inbounds %struct.TYPE_5__, ptr %3, i64 %9, i32 2
%24 = load i64, ptr %23, align 8, !tbaa !19
%25 = icmp sgt i64 %24, 0
br i1 %25, label %26, label %28
26: ; preds = %17
%27 = getelementptr inbounds i8, ptr %0, i64 8
store i64 %24, ptr %27, align 8, !tbaa !20
br label %28
28: ; preds = %26, %17
%29 = getelementptr inbounds %struct.TYPE_5__, ptr %3, i64 %9, i32 3
%30 = load i64, ptr %29, align 8, !tbaa !21
%31 = icmp sgt i64 %30, 0
br i1 %31, label %32, label %39
32: ; preds = %28
%33 = getelementptr inbounds i8, ptr %0, i64 16
store i64 %30, ptr %33, align 8, !tbaa !22
br label %39
34: ; preds = %8, %12
%35 = add nuw nsw i64 %9, 1
%36 = getelementptr inbounds %struct.TYPE_5__, ptr %3, i64 %35
%37 = load i32, ptr %36, align 8, !tbaa !10
%38 = icmp sgt i32 %37, -1
br i1 %38, label %8, label %39, !llvm.loop !23
39: ; preds = %34, %2, %28, %32
%40 = phi i32 [ 0, %32 ], [ 0, %28 ], [ -1, %2 ], [ -1, %34 ]
ret i32 %40
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_5__", !12, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !12, i64 32}
!12 = !{!"int", !8, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!11, !13, i64 8}
!15 = !{!11, !12, i64 32}
!16 = !{!17, !12, i64 24}
!17 = !{!"TYPE_4__", !13, i64 0, !13, i64 8, !13, i64 16, !12, i64 24}
!18 = !{!17, !13, i64 0}
!19 = !{!11, !13, i64 16}
!20 = !{!17, !13, i64 8}
!21 = !{!11, !13, i64 24}
!22 = !{!17, !13, i64 16}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
| FFmpeg_libavformat_extr_rtp.c_ff_rtp_get_codec_info |
; ModuleID = 'linux_drivers_tty_serial_extr_sirfsoc_uart.c_sirfsoc_uart_calc_sample_div.so'
source_filename = "linux_drivers_tty_serial_extr_sirfsoc_uart.c_sirfsoc_uart_calc_sample_div.so"
@SIRF_MIN_SAMPLE_DIV = common dso_local global i16 0, align 2
@SIRF_MAX_SAMPLE_DIV = common dso_local global i16 0, align 2
@SIRF_IOCLK_DIV_MASK = common dso_local global i32 0, align 4
@SIRF_SAMPLE_DIV_MASK = common dso_local global i32 0, align 4
@SIRF_SAMPLE_DIV_SHIFT = common dso_local global i16 0, align 2
@SIRF_IOCLK_DIV_MAX = common dso_local global i64 0, align 8
define dso_local i32 @sirfsoc_uart_calc_sample_div(i64 %arg1, i64 %arg2, i64 %arg3) {
entry:
%R15D-SKT-LOC106 = alloca i32, align 4
%RDX-SKT-LOC = alloca i64, align 8
%RBP-SKT-LOC97 = alloca i64, align 8
%R15D-SKT-LOC = alloca i64, align 8
%RBP-SKT-LOC = alloca i64, align 8
%EAX-SKT-LOC = alloca i64, align 8
%R13-SKT-LOC = alloca i64, align 8
%RSI-SKT-LOC = alloca i64, align 8
%BX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 0
%RSP_P.0 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 %arg3, ptr %stktop_8, align 1
%memload = load i32, ptr @SIRF_MIN_SAMPLE_DIV, align 1
%1 = trunc i32 %memload to i16
%EBX = zext i16 %1 to i32
%memload1 = load i32, ptr @SIRF_MAX_SAMPLE_DIV, align 1
%2 = trunc i32 %memload1 to i16
%R11D = zext i16 %2 to i32
%3 = trunc i32 %EBX to i16
%4 = trunc i32 %R11D to i16
%5 = sub i16 %3, %4
%6 = call { i16, i1 } @llvm.usub.with.overflow.i16(i16 %3, i16 %4)
%CF = extractvalue { i16, i1 } %6, 1
%ZF = icmp eq i16 %5, 0
%highbit = and i16 -32768, %5
%SF = icmp ne i16 %highbit, 0
%7 = call { i16, i1 } @llvm.ssub.with.overflow.i16(i16 %3, i16 %4)
%OF = extractvalue { i16, i1 } %7, 1
%8 = and i16 %5, 255
%9 = call i16 @llvm.ctpop.i16(i16 %8)
%10 = and i16 %9, 1
%PF = icmp eq i16 %10, 0
%11 = zext i32 %EBX to i64
store i64 %11, ptr %BX-SKT-LOC, align 1
store i32 0, ptr %R15D-SKT-LOC106, align 1
%CFCmp_JBE = icmp eq i1 %CF, true
%ZFCmp_JBE = icmp eq i1 %ZF, true
%CFAndZF_JBE = or i1 %ZFCmp_JBE, %CFCmp_JBE
br i1 %CFAndZF_JBE, label %bb.2, label %bb.1
bb.2: ; preds = %entry
%memload2 = load i32, ptr @SIRF_IOCLK_DIV_MASK, align 1
%R14D = xor i32 %memload2, -1
%memload3 = load i32, ptr @SIRF_SAMPLE_DIV_MASK, align 1
%R12D = xor i32 %memload3, -1
%memload4 = load i32, ptr @SIRF_SAMPLE_DIV_SHIFT, align 1
%12 = trunc i32 %memload4 to i16
%ECX = zext i16 %12 to i32
%memload5 = load i64, ptr @SIRF_IOCLK_DIV_MAX, align 1
%RBP = sext i32 -1 to i64
store i64 %memload5, ptr %R13-SKT-LOC, align 1
store i64 %RBP, ptr %RBP-SKT-LOC, align 1
%13 = zext i32 0 to i64
store i64 %13, ptr %R15D-SKT-LOC, align 1
store i64 %RBP, ptr %RBP-SKT-LOC97, align 1
store i32 0, ptr %R15D-SKT-LOC106, align 1
br label %bb.6
bb.6: ; preds = %bb.5, %bb.2
%14 = load i64, ptr %BX-SKT-LOC, align 1
%BX = trunc i64 %14 to i16
%R9D = zext i16 %BX to i32
%memref-disp = add i32 %R9D, 1
%RSI = zext i32 %memref-disp to i64
%RSI6 = mul nsw i64 %RSI, %arg1
%RAX = or i64 %arg2, %RSI6
%highbit7 = and i64 -9223372036854775808, %RAX
%SF8 = icmp ne i64 %highbit7, 0
%ZF9 = icmp eq i64 %RAX, 0
%15 = and i64 %RAX, 255
%16 = call i64 @llvm.ctpop.i64(i64 %15)
%17 = and i64 %16, 1
%PF10 = icmp eq i64 %17, 0
%RAX14 = lshr i64 %RAX, 32
%ZF11 = icmp eq i64 %RAX14, 0
%highbit12 = and i64 -9223372036854775808, %RAX14
%SF13 = icmp ne i64 %highbit12, 0
%CmpZF_JE = icmp eq i1 %ZF11, true
%18 = zext i32 %memref-disp to i64
store i64 %18, ptr %BX-SKT-LOC, align 1
br i1 %CmpZF_JE, label %bb.9, label %bb.7
bb.7: ; preds = %bb.6
%19 = zext i32 0 to i64
%20 = zext i64 %arg2 to i128
%21 = zext i64 %19 to i128
%div_hb_ls = shl nuw i128 %21, 64
%dividend = or i128 %div_hb_ls, %20
%22 = zext i64 %RSI6 to i128
%div_q = udiv i128 %dividend, %22
%RAX15 = trunc i128 %div_q to i64
%div_r = urem i128 %dividend, %22
%RDX = trunc i128 %div_r to i64
store i64 %RAX15, ptr %RSI-SKT-LOC, align 1
br label %bb.10
bb.9: ; preds = %bb.6
%EAX = trunc i64 %arg2 to i32
%23 = zext i32 %EAX to i64
%24 = zext i32 0 to i64
%div_hb_ls16 = shl nuw i64 %24, 32
%dividend17 = or i64 %div_hb_ls16, %23
%div_q18 = udiv i64 %dividend17, %RSI6
%EAX19 = trunc i64 %div_q18 to i32
%div_r20 = urem i64 %dividend17, %RSI6
%EDX = trunc i64 %div_r20 to i32
%25 = zext i32 %EAX19 to i64
store i64 %25, ptr %RSI-SKT-LOC, align 1
br label %bb.10
bb.10: ; preds = %bb.9, %bb.7
%RSI21 = load i64, ptr %RSI-SKT-LOC, align 1
%memref-disp22 = add i64 %RSI21, -1
%R13 = load i64, ptr %R13-SKT-LOC, align 1
%26 = sub i64 %memref-disp22, %R13
%27 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memref-disp22, i64 %R13)
%CF23 = extractvalue { i64, i1 } %27, 1
%ZF24 = icmp eq i64 %26, 0
%highbit25 = and i64 -9223372036854775808, %26
%SF26 = icmp ne i64 %highbit25, 0
%28 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memref-disp22, i64 %R13)
%OF27 = extractvalue { i64, i1 } %28, 1
%29 = and i64 %26, 255
%30 = call i64 @llvm.ctpop.i64(i64 %29)
%31 = and i64 %30, 1
%PF28 = icmp eq i64 %31, 0
%CFCmp_JA = icmp eq i1 %CF23, false
%ZFCmp_JA = icmp eq i1 %ZF24, false
%CFAndZF_JA = and i1 %ZFCmp_JA, %CFCmp_JA
br i1 %CFAndZF_JA, label %bb.4, label %bb.11
bb.11: ; preds = %bb.10
%32 = zext i32 %memref-disp to i64
%RSI29 = mul nsw i64 %RSI21, %32
%RAX34 = or i64 %arg2, %RSI29
%highbit30 = and i64 -9223372036854775808, %RAX34
%SF31 = icmp ne i64 %highbit30, 0
%ZF32 = icmp eq i64 %RAX34, 0
%33 = and i64 %RAX34, 255
%34 = call i64 @llvm.ctpop.i64(i64 %33)
%35 = and i64 %34, 1
%PF33 = icmp eq i64 %35, 0
%RAX38 = lshr i64 %RAX34, 32
%ZF35 = icmp eq i64 %RAX38, 0
%highbit36 = and i64 -9223372036854775808, %RAX38
%SF37 = icmp ne i64 %highbit36, 0
%CmpZF_JE108 = icmp eq i1 %ZF35, true
br i1 %CmpZF_JE108, label %bb.13, label %bb.12
bb.12: ; preds = %bb.11
%36 = zext i32 0 to i64
%37 = zext i64 %arg2 to i128
%38 = zext i64 %36 to i128
%div_hb_ls39 = shl nuw i128 %38, 64
%dividend40 = or i128 %div_hb_ls39, %37
%39 = zext i64 %RSI29 to i128
%div_q41 = udiv i128 %dividend40, %39
%RAX42 = trunc i128 %div_q41 to i64
%div_r43 = urem i128 %dividend40, %39
%RDX44 = trunc i128 %div_r43 to i64
store i64 %RAX42, ptr %EAX-SKT-LOC, align 1
br label %bb.14
bb.13: ; preds = %bb.11
%EAX45 = trunc i64 %arg2 to i32
%40 = zext i32 %EAX45 to i64
%41 = zext i32 0 to i64
%div_hb_ls46 = shl nuw i64 %41, 32
%dividend47 = or i64 %div_hb_ls46, %40
%div_q48 = udiv i64 %dividend47, %RSI29
%EAX49 = trunc i64 %div_q48 to i32
%div_r50 = urem i64 %dividend47, %RSI29
%EDX51 = trunc i64 %div_r50 to i32
%42 = zext i32 %EAX49 to i64
store i64 %42, ptr %EAX-SKT-LOC, align 1
br label %bb.14
bb.14: ; preds = %bb.13, %bb.12
%43 = load i64, ptr %EAX-SKT-LOC, align 1
%EAX52 = trunc i64 %43 to i32
%44 = trunc i64 %arg1 to i32
%ESI = sub i32 %EAX52, %44
%45 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EAX52, i32 %44)
%CF53 = extractvalue { i32, i1 } %45, 1
%ZF54 = icmp eq i32 %ESI, 0
%highbit55 = and i32 -2147483648, %ESI
%SF56 = icmp ne i32 %highbit55, 0
%46 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EAX52, i32 %44)
%OF57 = extractvalue { i32, i1 } %46, 1
%47 = and i32 %ESI, 255
%48 = call i32 @llvm.ctpop.i32(i32 %47)
%49 = and i32 %48, 1
%PF58 = icmp eq i32 %49, 0
%CF59 = icmp ne i32 0, 0
%EDX64 = sub i32 0, %ESI
%ZF60 = icmp eq i32 %EDX64, 0
%highbit61 = and i32 -2147483648, %EDX64
%SF62 = icmp ne i32 %highbit61, 0
%50 = and i32 %EDX64, 255
%51 = call i32 @llvm.ctpop.i32(i32 %50)
%52 = and i32 %51, 1
%PF63 = icmp eq i32 %52, 0
%Cond_CMOVS = icmp eq i1 %SF62, true
%CMOV = select i1 %Cond_CMOVS, i32 %ESI, i32 %EDX64
%RBP65 = load i64, ptr %RBP-SKT-LOC, align 1
%53 = zext i32 %CMOV to i64
%54 = sub i64 %RBP65, %53
%55 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RBP65, i64 %53)
%CF66 = extractvalue { i64, i1 } %55, 1
%ZF67 = icmp eq i64 %54, 0
%highbit68 = and i64 -9223372036854775808, %54
%SF69 = icmp ne i64 %highbit68, 0
%56 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RBP65, i64 %53)
%OF70 = extractvalue { i64, i1 } %56, 1
%57 = and i64 %54, 255
%58 = call i64 @llvm.ctpop.i64(i64 %57)
%59 = and i64 %58, 1
%PF71 = icmp eq i64 %59, 0
store i64 %RBP65, ptr %RBP-SKT-LOC97, align 1
%60 = zext i32 %CMOV to i64
store i64 %60, ptr %RDX-SKT-LOC, align 1
%CFCmp_JBE109 = icmp eq i1 %CF66, true
%ZFCmp_JBE110 = icmp eq i1 %ZF67, true
%CFAndZF_JBE111 = or i1 %ZFCmp_JBE110, %CFCmp_JBE109
br i1 %CFAndZF_JBE111, label %bb.4, label %bb.15
bb.15: ; preds = %bb.14
%61 = load i64, ptr %R15D-SKT-LOC, align 1
%R15D = trunc i64 %61 to i32
%R15D76 = and i32 %R15D, %R14D
%highbit72 = and i32 -2147483648, %R15D76
%SF73 = icmp ne i32 %highbit72, 0
%ZF74 = icmp eq i32 %R15D76, 0
%62 = and i32 %R15D76, 255
%63 = call i32 @llvm.ctpop.i32(i32 %62)
%64 = and i32 %63, 1
%PF75 = icmp eq i32 %64, 0
%65 = trunc i64 %memref-disp22 to i32
%R8D = or i32 %65, %R15D76
%highbit77 = and i32 -2147483648, %R8D
%SF78 = icmp ne i32 %highbit77, 0
%ZF79 = icmp eq i32 %R8D, 0
%66 = and i32 %R8D, 255
%67 = call i32 @llvm.ctpop.i32(i32 %66)
%68 = and i32 %67, 1
%PF80 = icmp eq i32 %68, 0
%R8D85 = and i32 %R8D, %R12D
%highbit81 = and i32 -2147483648, %R8D85
%SF82 = icmp ne i32 %highbit81, 0
%ZF83 = icmp eq i32 %R8D85, 0
%69 = and i32 %R8D85, 255
%70 = call i32 @llvm.ctpop.i32(i32 %69)
%71 = and i32 %70, 1
%PF84 = icmp eq i32 %71, 0
%72 = trunc i32 %ECX to i8
%73 = zext i8 %72 to i32
%shift-cnt-msk = and i32 %73, 63
%R9D89 = shl i32 %R9D, %shift-cnt-msk
%shrd_cf_count_cmp = icmp sgt i32 %shift-cnt-msk, 0
%74 = sub i32 32, %shift-cnt-msk
%shld_cf_count_shift = shl i32 1, %74
%shld_cf_count_and = and i32 %R9D, %shld_cf_count_shift
%shld_cf_count_shft_out = icmp sgt i32 %shld_cf_count_and, 0
%shld_cf_update = select i1 %shrd_cf_count_cmp, i1 %shld_cf_count_shft_out, i1 false
%ZF86 = icmp eq i32 %R9D89, 0
%highbit87 = and i32 -2147483648, %R9D89
%SF88 = icmp ne i32 %highbit87, 0
%R9D94 = or i32 %R9D89, %R8D85
%highbit90 = and i32 -2147483648, %R9D94
%SF91 = icmp ne i32 %highbit90, 0
%ZF92 = icmp eq i32 %R9D94, 0
%75 = and i32 %R9D94, 255
%76 = call i32 @llvm.ctpop.i32(i32 %75)
%77 = and i32 %76, 1
%PF93 = icmp eq i32 %77, 0
%memload95 = load i64, ptr %stktop_8, align 1
%78 = zext i32 %EAX52 to i64
%79 = inttoptr i64 %memload95 to ptr
store i64 %78, ptr %79, align 1
%memload96 = load i64, ptr @SIRF_IOCLK_DIV_MAX, align 1
store i32 %R9D94, ptr %R15D-SKT-LOC106, align 1
store i64 %memload96, ptr %R13-SKT-LOC, align 1
%80 = zext i32 %R9D94 to i64
store i64 %80, ptr %R15D-SKT-LOC, align 1
br label %bb.5
bb.4: ; preds = %bb.14, %bb.10
%RBP98 = load i64, ptr %RBP-SKT-LOC97, align 1
store i64 %RBP98, ptr %RDX-SKT-LOC, align 1
br label %bb.5
bb.5: ; preds = %bb.4, %bb.15
%RDX99 = load i64, ptr %RDX-SKT-LOC, align 1
%81 = trunc i32 %memref-disp to i16
%82 = trunc i32 %R11D to i16
%83 = sub i16 %81, %82
%84 = call { i16, i1 } @llvm.usub.with.overflow.i16(i16 %81, i16 %82)
%CF100 = extractvalue { i16, i1 } %84, 1
%ZF101 = icmp eq i16 %83, 0
%highbit102 = and i16 -32768, %83
%SF103 = icmp ne i16 %highbit102, 0
%85 = call { i16, i1 } @llvm.ssub.with.overflow.i16(i16 %81, i16 %82)
%OF104 = extractvalue { i16, i1 } %85, 1
%86 = and i16 %83, 255
%87 = call i16 @llvm.ctpop.i16(i16 %86)
%88 = and i16 %87, 1
%PF105 = icmp eq i16 %88, 0
%CFCmp_JA112 = icmp eq i1 %CF100, false
%ZFCmp_JA113 = icmp eq i1 %ZF101, false
%CFAndZF_JA114 = and i1 %ZFCmp_JA113, %CFCmp_JA112
store i64 %RDX99, ptr %RBP-SKT-LOC, align 1
store i64 %RDX99, ptr %RBP-SKT-LOC97, align 1
br i1 %CFAndZF_JA114, label %bb.1, label %bb.6
bb.1: ; preds = %bb.5, %entry
%R15D107 = load i32, ptr %R15D-SKT-LOC106, align 1
ret i32 %R15D107
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i16, i1 } @llvm.usub.with.overflow.i16(i16, i16) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i16, i1 } @llvm.ssub.with.overflow.i16(i16, i16) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i16 @llvm.ctpop.i16(i16) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/tty/serial/extr_sirfsoc_uart.c_sirfsoc_uart_calc_sample_div.c'
source_filename = "AnghaBench/linux/drivers/tty/serial/extr_sirfsoc_uart.c_sirfsoc_uart_calc_sample_div.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SIRF_MIN_SAMPLE_DIV = common local_unnamed_addr global i16 0, align 2
@SIRF_MAX_SAMPLE_DIV = common local_unnamed_addr global i16 0, align 2
@SIRF_IOCLK_DIV_MAX = common local_unnamed_addr global i64 0, align 8
@SIRF_IOCLK_DIV_MASK = common local_unnamed_addr global i32 0, align 4
@SIRF_SAMPLE_DIV_MASK = common local_unnamed_addr global i32 0, align 4
@SIRF_SAMPLE_DIV_SHIFT = common local_unnamed_addr global i16 0, align 2
@llvm.used = appending global [1 x ptr] [ptr @sirfsoc_uart_calc_sample_div], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, argmem: write, inaccessiblemem: none) uwtable(sync)
define internal i32 @sirfsoc_uart_calc_sample_div(i64 noundef %0, i64 noundef %1, ptr nocapture noundef writeonly %2) #0 {
%4 = load i16, ptr @SIRF_MIN_SAMPLE_DIV, align 2, !tbaa !6
%5 = load i16, ptr @SIRF_MAX_SAMPLE_DIV, align 2, !tbaa !6
%6 = icmp ugt i16 %4, %5
br i1 %6, label %49, label %7
7: ; preds = %3
%8 = load i32, ptr @SIRF_IOCLK_DIV_MASK, align 4
%9 = xor i32 %8, -1
%10 = load i32, ptr @SIRF_SAMPLE_DIV_MASK, align 4
%11 = xor i32 %10, -1
%12 = load i16, ptr @SIRF_SAMPLE_DIV_SHIFT, align 2
%13 = zext nneg i16 %12 to i32
%14 = load i64, ptr @SIRF_IOCLK_DIV_MAX, align 8, !tbaa !10
br label %15
15: ; preds = %7, %43
%16 = phi i64 [ %14, %7 ], [ %44, %43 ]
%17 = phi i64 [ -1, %7 ], [ %46, %43 ]
%18 = phi i16 [ %4, %7 ], [ %47, %43 ]
%19 = phi i32 [ 0, %7 ], [ %45, %43 ]
%20 = zext i16 %18 to i32
%21 = add nuw nsw i32 %20, 1
%22 = zext nneg i32 %21 to i64
%23 = mul i64 %22, %0
%24 = udiv i64 %1, %23
%25 = add i64 %24, -1
%26 = icmp ugt i64 %25, %16
br i1 %26, label %43, label %27
27: ; preds = %15
%28 = mul i64 %24, %22
%29 = udiv i64 %1, %28
%30 = sub i64 %29, %0
%31 = trunc i64 %30 to i32
%32 = tail call i32 @llvm.abs.i32(i32 %31, i1 true)
%33 = zext nneg i32 %32 to i64
%34 = icmp ugt i64 %17, %33
br i1 %34, label %35, label %43
35: ; preds = %27
%36 = and i32 %19, %9
%37 = trunc i64 %25 to i32
%38 = or i32 %36, %37
%39 = and i32 %38, %11
%40 = shl i32 %20, %13
%41 = or i32 %40, %39
store i64 %29, ptr %2, align 8, !tbaa !10
%42 = load i64, ptr @SIRF_IOCLK_DIV_MAX, align 8, !tbaa !10
br label %43
43: ; preds = %27, %35, %15
%44 = phi i64 [ %16, %15 ], [ %42, %35 ], [ %16, %27 ]
%45 = phi i32 [ %19, %15 ], [ %41, %35 ], [ %19, %27 ]
%46 = phi i64 [ %17, %15 ], [ %33, %35 ], [ %17, %27 ]
%47 = add i16 %18, 1
%48 = icmp ugt i16 %47, %5
br i1 %48, label %49, label %15, !llvm.loop !12
49: ; preds = %43, %3
%50 = phi i32 [ 0, %3 ], [ %45, %43 ]
ret i32 %50
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #1
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"short", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
| linux_drivers_tty_serial_extr_sirfsoc_uart.c_sirfsoc_uart_calc_sample_div |
; ModuleID = 'fastsocket_kernel_drivers_net_wireless_extr_mwl8k.c_legacy_rate_mask_to_array.so'
source_filename = "fastsocket_kernel_drivers_net_wireless_extr_mwl8k.c_legacy_rate_mask_to_array.so"
@mwl8k_rates_24 = common dso_local global i64 0, align 8
define dso_local i64 @legacy_rate_mask_to_array(i64 %arg1, i32 %arg2) {
entry:
%ECX-SKT-LOC197 = alloca i32, align 4
%ECX-SKT-LOC182 = alloca i32, align 4
%ECX-SKT-LOC159 = alloca i32, align 4
%ECX-SKT-LOC144 = alloca i32, align 4
%ECX-SKT-LOC121 = alloca i32, align 4
%ECX-SKT-LOC106 = alloca i32, align 4
%ECX-SKT-LOC83 = alloca i32, align 4
%ECX-SKT-LOC68 = alloca i32, align 4
%ECX-SKT-LOC45 = alloca i32, align 4
%ECX-SKT-LOC30 = alloca i32, align 4
%ECX-SKT-LOC = alloca i32, align 4
%memload = load i64, ptr @mwl8k_rates_24, align 1
%0 = trunc i32 %arg2 to i8
%1 = and i8 %0, 1
%2 = call i8 @llvm.ctpop.i8(i8 %1)
%3 = and i8 %2, 1
%PF = icmp eq i8 %3, 0
%ZF = icmp eq i8 %1, 0
%highbit = and i8 -128, %1
%SF = icmp ne i8 %highbit, 0
store i32 0, ptr %ECX-SKT-LOC, align 1
store i32 0, ptr %ECX-SKT-LOC30, align 1
store i32 0, ptr %ECX-SKT-LOC45, align 1
store i32 0, ptr %ECX-SKT-LOC68, align 1
store i32 0, ptr %ECX-SKT-LOC83, align 1
store i32 0, ptr %ECX-SKT-LOC106, align 1
store i32 0, ptr %ECX-SKT-LOC121, align 1
store i32 0, ptr %ECX-SKT-LOC144, align 1
store i32 0, ptr %ECX-SKT-LOC159, align 1
store i32 0, ptr %ECX-SKT-LOC182, align 1
store i32 0, ptr %ECX-SKT-LOC197, align 1
%CmpZF_JNE = icmp eq i1 %ZF, false
br i1 %CmpZF_JNE, label %bb.13, label %bb.1
bb.1: ; preds = %entry
%4 = trunc i32 %arg2 to i8
%5 = and i8 %4, 2
%6 = call i8 @llvm.ctpop.i8(i8 %5)
%7 = and i8 %6, 1
%PF1 = icmp eq i8 %7, 0
%ZF2 = icmp eq i8 %5, 0
%highbit3 = and i8 -128, %5
%SF4 = icmp ne i8 %highbit3, 0
%CmpZF_JNE201 = icmp eq i1 %ZF2, false
br i1 %CmpZF_JNE201, label %bb.14, label %bb.2
bb.13: ; preds = %entry
%8 = inttoptr i64 %memload to ptr
%memload5 = load i32, ptr %8, align 1
%9 = inttoptr i64 %arg1 to ptr
store i32 %memload5, ptr %9, align 1
%10 = trunc i32 %arg2 to i8
%11 = and i8 %10, 2
%12 = call i8 @llvm.ctpop.i8(i8 %11)
%13 = and i8 %12, 1
%PF6 = icmp eq i8 %13, 0
%ZF7 = icmp eq i8 %11, 0
%highbit8 = and i8 -128, %11
%SF9 = icmp ne i8 %highbit8, 0
store i32 1, ptr %ECX-SKT-LOC, align 1
store i32 1, ptr %ECX-SKT-LOC30, align 1
store i32 1, ptr %ECX-SKT-LOC45, align 1
store i32 1, ptr %ECX-SKT-LOC68, align 1
store i32 1, ptr %ECX-SKT-LOC83, align 1
store i32 1, ptr %ECX-SKT-LOC106, align 1
store i32 1, ptr %ECX-SKT-LOC121, align 1
store i32 1, ptr %ECX-SKT-LOC144, align 1
store i32 1, ptr %ECX-SKT-LOC159, align 1
store i32 1, ptr %ECX-SKT-LOC182, align 1
store i32 1, ptr %ECX-SKT-LOC197, align 1
%CmpZF_JE = icmp eq i1 %ZF7, true
br i1 %CmpZF_JE, label %bb.2, label %bb.14
bb.14: ; preds = %bb.13, %bb.1
%memref-disp = add i64 %memload, 4
%14 = inttoptr i64 %memref-disp to ptr
%memload10 = load i32, ptr %14, align 1
%ECX = load i32, ptr %ECX-SKT-LOC, align 1
%ECX15 = add i32 %ECX, 1
%15 = and i32 %ECX15, 255
%16 = call i32 @llvm.ctpop.i32(i32 %15)
%17 = and i32 %16, 1
%PF11 = icmp eq i32 %17, 0
%ZF12 = icmp eq i32 %ECX15, 0
%highbit13 = and i32 -2147483648, %ECX15
%SF14 = icmp ne i32 %highbit13, 0
%18 = zext i32 %ECX to i64
%memref-idxreg = mul i64 4, %18
%memref-basereg = add i64 %arg1, %memref-idxreg
%19 = inttoptr i64 %memref-basereg to ptr
store i32 %memload10, ptr %19, align 1
%20 = trunc i32 %arg2 to i8
%21 = and i8 %20, 4
%22 = call i8 @llvm.ctpop.i8(i8 %21)
%23 = and i8 %22, 1
%PF16 = icmp eq i8 %23, 0
%ZF17 = icmp eq i8 %21, 0
%highbit18 = and i8 -128, %21
%SF19 = icmp ne i8 %highbit18, 0
store i32 %ECX15, ptr %ECX-SKT-LOC30, align 1
store i32 %ECX15, ptr %ECX-SKT-LOC45, align 1
store i32 %ECX15, ptr %ECX-SKT-LOC68, align 1
store i32 %ECX15, ptr %ECX-SKT-LOC83, align 1
store i32 %ECX15, ptr %ECX-SKT-LOC106, align 1
store i32 %ECX15, ptr %ECX-SKT-LOC121, align 1
store i32 %ECX15, ptr %ECX-SKT-LOC144, align 1
store i32 %ECX15, ptr %ECX-SKT-LOC159, align 1
store i32 %ECX15, ptr %ECX-SKT-LOC182, align 1
store i32 %ECX15, ptr %ECX-SKT-LOC197, align 1
%CmpZF_JE202 = icmp eq i1 %ZF17, true
br i1 %CmpZF_JE202, label %bb.3, label %bb.15
bb.2: ; preds = %bb.13, %bb.1
%24 = trunc i32 %arg2 to i8
%25 = and i8 %24, 4
%26 = call i8 @llvm.ctpop.i8(i8 %25)
%27 = and i8 %26, 1
%PF20 = icmp eq i8 %27, 0
%ZF21 = icmp eq i8 %25, 0
%highbit22 = and i8 -128, %25
%SF23 = icmp ne i8 %highbit22, 0
%CmpZF_JNE203 = icmp eq i1 %ZF21, false
br i1 %CmpZF_JNE203, label %bb.15, label %bb.3
bb.3: ; preds = %bb.2, %bb.14
%28 = trunc i32 %arg2 to i8
%29 = and i8 %28, 8
%30 = call i8 @llvm.ctpop.i8(i8 %29)
%31 = and i8 %30, 1
%PF24 = icmp eq i8 %31, 0
%ZF25 = icmp eq i8 %29, 0
%highbit26 = and i8 -128, %29
%SF27 = icmp ne i8 %highbit26, 0
%CmpZF_JNE204 = icmp eq i1 %ZF25, false
br i1 %CmpZF_JNE204, label %bb.16, label %bb.4
bb.15: ; preds = %bb.2, %bb.14
%memref-disp28 = add i64 %memload, 8
%32 = inttoptr i64 %memref-disp28 to ptr
%memload29 = load i32, ptr %32, align 1
%ECX31 = load i32, ptr %ECX-SKT-LOC30, align 1
%ECX36 = add i32 %ECX31, 1
%33 = and i32 %ECX36, 255
%34 = call i32 @llvm.ctpop.i32(i32 %33)
%35 = and i32 %34, 1
%PF32 = icmp eq i32 %35, 0
%ZF33 = icmp eq i32 %ECX36, 0
%highbit34 = and i32 -2147483648, %ECX36
%SF35 = icmp ne i32 %highbit34, 0
%36 = zext i32 %ECX31 to i64
%memref-idxreg37 = mul i64 4, %36
%memref-basereg38 = add i64 %arg1, %memref-idxreg37
%37 = inttoptr i64 %memref-basereg38 to ptr
store i32 %memload29, ptr %37, align 1
%38 = trunc i32 %arg2 to i8
%39 = and i8 %38, 8
%40 = call i8 @llvm.ctpop.i8(i8 %39)
%41 = and i8 %40, 1
%PF39 = icmp eq i8 %41, 0
%ZF40 = icmp eq i8 %39, 0
%highbit41 = and i8 -128, %39
%SF42 = icmp ne i8 %highbit41, 0
store i32 %ECX36, ptr %ECX-SKT-LOC45, align 1
store i32 %ECX36, ptr %ECX-SKT-LOC68, align 1
store i32 %ECX36, ptr %ECX-SKT-LOC83, align 1
store i32 %ECX36, ptr %ECX-SKT-LOC106, align 1
store i32 %ECX36, ptr %ECX-SKT-LOC121, align 1
store i32 %ECX36, ptr %ECX-SKT-LOC144, align 1
store i32 %ECX36, ptr %ECX-SKT-LOC159, align 1
store i32 %ECX36, ptr %ECX-SKT-LOC182, align 1
store i32 %ECX36, ptr %ECX-SKT-LOC197, align 1
%CmpZF_JE205 = icmp eq i1 %ZF40, true
br i1 %CmpZF_JE205, label %bb.4, label %bb.16
bb.16: ; preds = %bb.15, %bb.3
%memref-disp43 = add i64 %memload, 12
%42 = inttoptr i64 %memref-disp43 to ptr
%memload44 = load i32, ptr %42, align 1
%ECX46 = load i32, ptr %ECX-SKT-LOC45, align 1
%ECX51 = add i32 %ECX46, 1
%43 = and i32 %ECX51, 255
%44 = call i32 @llvm.ctpop.i32(i32 %43)
%45 = and i32 %44, 1
%PF47 = icmp eq i32 %45, 0
%ZF48 = icmp eq i32 %ECX51, 0
%highbit49 = and i32 -2147483648, %ECX51
%SF50 = icmp ne i32 %highbit49, 0
%46 = zext i32 %ECX46 to i64
%memref-idxreg52 = mul i64 4, %46
%memref-basereg53 = add i64 %arg1, %memref-idxreg52
%47 = inttoptr i64 %memref-basereg53 to ptr
store i32 %memload44, ptr %47, align 1
%48 = trunc i32 %arg2 to i8
%49 = and i8 %48, 32
%50 = call i8 @llvm.ctpop.i8(i8 %49)
%51 = and i8 %50, 1
%PF54 = icmp eq i8 %51, 0
%ZF55 = icmp eq i8 %49, 0
%highbit56 = and i8 -128, %49
%SF57 = icmp ne i8 %highbit56, 0
store i32 %ECX51, ptr %ECX-SKT-LOC68, align 1
store i32 %ECX51, ptr %ECX-SKT-LOC83, align 1
store i32 %ECX51, ptr %ECX-SKT-LOC106, align 1
store i32 %ECX51, ptr %ECX-SKT-LOC121, align 1
store i32 %ECX51, ptr %ECX-SKT-LOC144, align 1
store i32 %ECX51, ptr %ECX-SKT-LOC159, align 1
store i32 %ECX51, ptr %ECX-SKT-LOC182, align 1
store i32 %ECX51, ptr %ECX-SKT-LOC197, align 1
%CmpZF_JE206 = icmp eq i1 %ZF55, true
br i1 %CmpZF_JE206, label %bb.5, label %bb.17
bb.4: ; preds = %bb.15, %bb.3
%52 = trunc i32 %arg2 to i8
%53 = and i8 %52, 32
%54 = call i8 @llvm.ctpop.i8(i8 %53)
%55 = and i8 %54, 1
%PF58 = icmp eq i8 %55, 0
%ZF59 = icmp eq i8 %53, 0
%highbit60 = and i8 -128, %53
%SF61 = icmp ne i8 %highbit60, 0
%CmpZF_JNE207 = icmp eq i1 %ZF59, false
br i1 %CmpZF_JNE207, label %bb.17, label %bb.5
bb.5: ; preds = %bb.4, %bb.16
%56 = trunc i32 %arg2 to i8
%57 = and i8 %56, 64
%58 = call i8 @llvm.ctpop.i8(i8 %57)
%59 = and i8 %58, 1
%PF62 = icmp eq i8 %59, 0
%ZF63 = icmp eq i8 %57, 0
%highbit64 = and i8 -128, %57
%SF65 = icmp ne i8 %highbit64, 0
%CmpZF_JNE208 = icmp eq i1 %ZF63, false
br i1 %CmpZF_JNE208, label %bb.18, label %bb.6
bb.17: ; preds = %bb.4, %bb.16
%memref-disp66 = add i64 %memload, 20
%60 = inttoptr i64 %memref-disp66 to ptr
%memload67 = load i32, ptr %60, align 1
%ECX69 = load i32, ptr %ECX-SKT-LOC68, align 1
%ECX74 = add i32 %ECX69, 1
%61 = and i32 %ECX74, 255
%62 = call i32 @llvm.ctpop.i32(i32 %61)
%63 = and i32 %62, 1
%PF70 = icmp eq i32 %63, 0
%ZF71 = icmp eq i32 %ECX74, 0
%highbit72 = and i32 -2147483648, %ECX74
%SF73 = icmp ne i32 %highbit72, 0
%64 = zext i32 %ECX69 to i64
%memref-idxreg75 = mul i64 4, %64
%memref-basereg76 = add i64 %arg1, %memref-idxreg75
%65 = inttoptr i64 %memref-basereg76 to ptr
store i32 %memload67, ptr %65, align 1
%66 = trunc i32 %arg2 to i8
%67 = and i8 %66, 64
%68 = call i8 @llvm.ctpop.i8(i8 %67)
%69 = and i8 %68, 1
%PF77 = icmp eq i8 %69, 0
%ZF78 = icmp eq i8 %67, 0
%highbit79 = and i8 -128, %67
%SF80 = icmp ne i8 %highbit79, 0
store i32 %ECX74, ptr %ECX-SKT-LOC83, align 1
store i32 %ECX74, ptr %ECX-SKT-LOC106, align 1
store i32 %ECX74, ptr %ECX-SKT-LOC121, align 1
store i32 %ECX74, ptr %ECX-SKT-LOC144, align 1
store i32 %ECX74, ptr %ECX-SKT-LOC159, align 1
store i32 %ECX74, ptr %ECX-SKT-LOC182, align 1
store i32 %ECX74, ptr %ECX-SKT-LOC197, align 1
%CmpZF_JE209 = icmp eq i1 %ZF78, true
br i1 %CmpZF_JE209, label %bb.6, label %bb.18
bb.18: ; preds = %bb.17, %bb.5
%memref-disp81 = add i64 %memload, 24
%70 = inttoptr i64 %memref-disp81 to ptr
%memload82 = load i32, ptr %70, align 1
%ECX84 = load i32, ptr %ECX-SKT-LOC83, align 1
%ECX89 = add i32 %ECX84, 1
%71 = and i32 %ECX89, 255
%72 = call i32 @llvm.ctpop.i32(i32 %71)
%73 = and i32 %72, 1
%PF85 = icmp eq i32 %73, 0
%ZF86 = icmp eq i32 %ECX89, 0
%highbit87 = and i32 -2147483648, %ECX89
%SF88 = icmp ne i32 %highbit87, 0
%74 = zext i32 %ECX84 to i64
%memref-idxreg90 = mul i64 4, %74
%memref-basereg91 = add i64 %arg1, %memref-idxreg90
%75 = inttoptr i64 %memref-basereg91 to ptr
store i32 %memload82, ptr %75, align 1
%76 = trunc i32 %arg2 to i8
%77 = and i8 %76, -128
%78 = call i8 @llvm.ctpop.i8(i8 %77)
%79 = and i8 %78, 1
%PF92 = icmp eq i8 %79, 0
%ZF93 = icmp eq i8 %77, 0
%highbit94 = and i8 -128, %77
%SF95 = icmp ne i8 %highbit94, 0
store i32 %ECX89, ptr %ECX-SKT-LOC106, align 1
store i32 %ECX89, ptr %ECX-SKT-LOC121, align 1
store i32 %ECX89, ptr %ECX-SKT-LOC144, align 1
store i32 %ECX89, ptr %ECX-SKT-LOC159, align 1
store i32 %ECX89, ptr %ECX-SKT-LOC182, align 1
store i32 %ECX89, ptr %ECX-SKT-LOC197, align 1
%CmpZF_JE210 = icmp eq i1 %ZF93, true
br i1 %CmpZF_JE210, label %bb.7, label %bb.19
bb.6: ; preds = %bb.17, %bb.5
%80 = trunc i32 %arg2 to i8
%81 = and i8 %80, -128
%82 = call i8 @llvm.ctpop.i8(i8 %81)
%83 = and i8 %82, 1
%PF96 = icmp eq i8 %83, 0
%ZF97 = icmp eq i8 %81, 0
%highbit98 = and i8 -128, %81
%SF99 = icmp ne i8 %highbit98, 0
%CmpZF_JNE211 = icmp eq i1 %ZF97, false
br i1 %CmpZF_JNE211, label %bb.19, label %bb.7
bb.7: ; preds = %bb.6, %bb.18
%84 = and i32 %arg2, 256
%85 = and i32 %84, 255
%86 = call i32 @llvm.ctpop.i32(i32 %85)
%87 = and i32 %86, 1
%PF100 = icmp eq i32 %87, 0
%ZF101 = icmp eq i32 %84, 0
%highbit102 = and i32 -2147483648, %84
%SF103 = icmp ne i32 %highbit102, 0
%CmpZF_JNE212 = icmp eq i1 %ZF101, false
br i1 %CmpZF_JNE212, label %bb.20, label %bb.8
bb.19: ; preds = %bb.6, %bb.18
%memref-disp104 = add i64 %memload, 28
%88 = inttoptr i64 %memref-disp104 to ptr
%memload105 = load i32, ptr %88, align 1
%ECX107 = load i32, ptr %ECX-SKT-LOC106, align 1
%ECX112 = add i32 %ECX107, 1
%89 = and i32 %ECX112, 255
%90 = call i32 @llvm.ctpop.i32(i32 %89)
%91 = and i32 %90, 1
%PF108 = icmp eq i32 %91, 0
%ZF109 = icmp eq i32 %ECX112, 0
%highbit110 = and i32 -2147483648, %ECX112
%SF111 = icmp ne i32 %highbit110, 0
%92 = zext i32 %ECX107 to i64
%memref-idxreg113 = mul i64 4, %92
%memref-basereg114 = add i64 %arg1, %memref-idxreg113
%93 = inttoptr i64 %memref-basereg114 to ptr
store i32 %memload105, ptr %93, align 1
%94 = and i32 %arg2, 256
%95 = and i32 %94, 255
%96 = call i32 @llvm.ctpop.i32(i32 %95)
%97 = and i32 %96, 1
%PF115 = icmp eq i32 %97, 0
%ZF116 = icmp eq i32 %94, 0
%highbit117 = and i32 -2147483648, %94
%SF118 = icmp ne i32 %highbit117, 0
store i32 %ECX112, ptr %ECX-SKT-LOC121, align 1
store i32 %ECX112, ptr %ECX-SKT-LOC144, align 1
store i32 %ECX112, ptr %ECX-SKT-LOC159, align 1
store i32 %ECX112, ptr %ECX-SKT-LOC182, align 1
store i32 %ECX112, ptr %ECX-SKT-LOC197, align 1
%CmpZF_JE213 = icmp eq i1 %ZF116, true
br i1 %CmpZF_JE213, label %bb.8, label %bb.20
bb.20: ; preds = %bb.19, %bb.7
%memref-disp119 = add i64 %memload, 32
%98 = inttoptr i64 %memref-disp119 to ptr
%memload120 = load i32, ptr %98, align 1
%ECX122 = load i32, ptr %ECX-SKT-LOC121, align 1
%ECX127 = add i32 %ECX122, 1
%99 = and i32 %ECX127, 255
%100 = call i32 @llvm.ctpop.i32(i32 %99)
%101 = and i32 %100, 1
%PF123 = icmp eq i32 %101, 0
%ZF124 = icmp eq i32 %ECX127, 0
%highbit125 = and i32 -2147483648, %ECX127
%SF126 = icmp ne i32 %highbit125, 0
%102 = zext i32 %ECX122 to i64
%memref-idxreg128 = mul i64 4, %102
%memref-basereg129 = add i64 %arg1, %memref-idxreg128
%103 = inttoptr i64 %memref-basereg129 to ptr
store i32 %memload120, ptr %103, align 1
%104 = and i32 %arg2, 512
%105 = and i32 %104, 255
%106 = call i32 @llvm.ctpop.i32(i32 %105)
%107 = and i32 %106, 1
%PF130 = icmp eq i32 %107, 0
%ZF131 = icmp eq i32 %104, 0
%highbit132 = and i32 -2147483648, %104
%SF133 = icmp ne i32 %highbit132, 0
store i32 %ECX127, ptr %ECX-SKT-LOC144, align 1
store i32 %ECX127, ptr %ECX-SKT-LOC159, align 1
store i32 %ECX127, ptr %ECX-SKT-LOC182, align 1
store i32 %ECX127, ptr %ECX-SKT-LOC197, align 1
%CmpZF_JE214 = icmp eq i1 %ZF131, true
br i1 %CmpZF_JE214, label %bb.9, label %bb.21
bb.8: ; preds = %bb.19, %bb.7
%108 = and i32 %arg2, 512
%109 = and i32 %108, 255
%110 = call i32 @llvm.ctpop.i32(i32 %109)
%111 = and i32 %110, 1
%PF134 = icmp eq i32 %111, 0
%ZF135 = icmp eq i32 %108, 0
%highbit136 = and i32 -2147483648, %108
%SF137 = icmp ne i32 %highbit136, 0
%CmpZF_JNE215 = icmp eq i1 %ZF135, false
br i1 %CmpZF_JNE215, label %bb.21, label %bb.9
bb.9: ; preds = %bb.8, %bb.20
%112 = and i32 %arg2, 1024
%113 = and i32 %112, 255
%114 = call i32 @llvm.ctpop.i32(i32 %113)
%115 = and i32 %114, 1
%PF138 = icmp eq i32 %115, 0
%ZF139 = icmp eq i32 %112, 0
%highbit140 = and i32 -2147483648, %112
%SF141 = icmp ne i32 %highbit140, 0
%CmpZF_JNE216 = icmp eq i1 %ZF139, false
br i1 %CmpZF_JNE216, label %bb.22, label %bb.10
bb.21: ; preds = %bb.8, %bb.20
%memref-disp142 = add i64 %memload, 36
%116 = inttoptr i64 %memref-disp142 to ptr
%memload143 = load i32, ptr %116, align 1
%ECX145 = load i32, ptr %ECX-SKT-LOC144, align 1
%ECX150 = add i32 %ECX145, 1
%117 = and i32 %ECX150, 255
%118 = call i32 @llvm.ctpop.i32(i32 %117)
%119 = and i32 %118, 1
%PF146 = icmp eq i32 %119, 0
%ZF147 = icmp eq i32 %ECX150, 0
%highbit148 = and i32 -2147483648, %ECX150
%SF149 = icmp ne i32 %highbit148, 0
%120 = zext i32 %ECX145 to i64
%memref-idxreg151 = mul i64 4, %120
%memref-basereg152 = add i64 %arg1, %memref-idxreg151
%121 = inttoptr i64 %memref-basereg152 to ptr
store i32 %memload143, ptr %121, align 1
%122 = and i32 %arg2, 1024
%123 = and i32 %122, 255
%124 = call i32 @llvm.ctpop.i32(i32 %123)
%125 = and i32 %124, 1
%PF153 = icmp eq i32 %125, 0
%ZF154 = icmp eq i32 %122, 0
%highbit155 = and i32 -2147483648, %122
%SF156 = icmp ne i32 %highbit155, 0
store i32 %ECX150, ptr %ECX-SKT-LOC159, align 1
store i32 %ECX150, ptr %ECX-SKT-LOC182, align 1
store i32 %ECX150, ptr %ECX-SKT-LOC197, align 1
%CmpZF_JE217 = icmp eq i1 %ZF154, true
br i1 %CmpZF_JE217, label %bb.10, label %bb.22
bb.22: ; preds = %bb.21, %bb.9
%memref-disp157 = add i64 %memload, 40
%126 = inttoptr i64 %memref-disp157 to ptr
%memload158 = load i32, ptr %126, align 1
%ECX160 = load i32, ptr %ECX-SKT-LOC159, align 1
%ECX165 = add i32 %ECX160, 1
%127 = and i32 %ECX165, 255
%128 = call i32 @llvm.ctpop.i32(i32 %127)
%129 = and i32 %128, 1
%PF161 = icmp eq i32 %129, 0
%ZF162 = icmp eq i32 %ECX165, 0
%highbit163 = and i32 -2147483648, %ECX165
%SF164 = icmp ne i32 %highbit163, 0
%130 = zext i32 %ECX160 to i64
%memref-idxreg166 = mul i64 4, %130
%memref-basereg167 = add i64 %arg1, %memref-idxreg166
%131 = inttoptr i64 %memref-basereg167 to ptr
store i32 %memload158, ptr %131, align 1
%132 = and i32 %arg2, 2048
%133 = and i32 %132, 255
%134 = call i32 @llvm.ctpop.i32(i32 %133)
%135 = and i32 %134, 1
%PF168 = icmp eq i32 %135, 0
%ZF169 = icmp eq i32 %132, 0
%highbit170 = and i32 -2147483648, %132
%SF171 = icmp ne i32 %highbit170, 0
store i32 %ECX165, ptr %ECX-SKT-LOC182, align 1
store i32 %ECX165, ptr %ECX-SKT-LOC197, align 1
%CmpZF_JE218 = icmp eq i1 %ZF169, true
br i1 %CmpZF_JE218, label %bb.11, label %bb.23
bb.10: ; preds = %bb.21, %bb.9
%136 = and i32 %arg2, 2048
%137 = and i32 %136, 255
%138 = call i32 @llvm.ctpop.i32(i32 %137)
%139 = and i32 %138, 1
%PF172 = icmp eq i32 %139, 0
%ZF173 = icmp eq i32 %136, 0
%highbit174 = and i32 -2147483648, %136
%SF175 = icmp ne i32 %highbit174, 0
%CmpZF_JNE219 = icmp eq i1 %ZF173, false
br i1 %CmpZF_JNE219, label %bb.23, label %bb.11
bb.11: ; preds = %bb.10, %bb.22
%140 = and i32 %arg2, 4096
%141 = and i32 %140, 255
%142 = call i32 @llvm.ctpop.i32(i32 %141)
%143 = and i32 %142, 1
%PF176 = icmp eq i32 %143, 0
%ZF177 = icmp eq i32 %140, 0
%highbit178 = and i32 -2147483648, %140
%SF179 = icmp ne i32 %highbit178, 0
%CmpZF_JNE220 = icmp eq i1 %ZF177, false
br i1 %CmpZF_JNE220, label %bb.24, label %bb.12
bb.23: ; preds = %bb.10, %bb.22
%memref-disp180 = add i64 %memload, 44
%144 = inttoptr i64 %memref-disp180 to ptr
%memload181 = load i32, ptr %144, align 1
%ECX183 = load i32, ptr %ECX-SKT-LOC182, align 1
%ECX188 = add i32 %ECX183, 1
%145 = and i32 %ECX188, 255
%146 = call i32 @llvm.ctpop.i32(i32 %145)
%147 = and i32 %146, 1
%PF184 = icmp eq i32 %147, 0
%ZF185 = icmp eq i32 %ECX188, 0
%highbit186 = and i32 -2147483648, %ECX188
%SF187 = icmp ne i32 %highbit186, 0
%148 = zext i32 %ECX183 to i64
%memref-idxreg189 = mul i64 4, %148
%memref-basereg190 = add i64 %arg1, %memref-idxreg189
%149 = inttoptr i64 %memref-basereg190 to ptr
store i32 %memload181, ptr %149, align 1
%150 = and i32 %arg2, 4096
%151 = and i32 %150, 255
%152 = call i32 @llvm.ctpop.i32(i32 %151)
%153 = and i32 %152, 1
%PF191 = icmp eq i32 %153, 0
%ZF192 = icmp eq i32 %150, 0
%highbit193 = and i32 -2147483648, %150
%SF194 = icmp ne i32 %highbit193, 0
store i32 %ECX188, ptr %ECX-SKT-LOC197, align 1
%CmpZF_JE221 = icmp eq i1 %ZF192, true
br i1 %CmpZF_JE221, label %bb.12, label %bb.24
bb.24: ; preds = %bb.23, %bb.11
%memref-disp195 = add i64 %memload, 48
%154 = inttoptr i64 %memref-disp195 to ptr
%memload196 = load i32, ptr %154, align 1
%ECX198 = load i32, ptr %ECX-SKT-LOC197, align 1
%155 = zext i32 %ECX198 to i64
%memref-idxreg199 = mul i64 4, %155
%memref-basereg200 = add i64 %arg1, %memref-idxreg199
%156 = inttoptr i64 %memref-basereg200 to ptr
store i32 %memload196, ptr %156, align 1
%157 = zext i32 %memload196 to i64
br label %UnifiedReturnBlock
bb.12: ; preds = %bb.23, %bb.11
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.12, %bb.24
%UnifiedRetVal = phi i64 [ %157, %bb.24 ], [ %memload, %bb.12 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/extr_mwl8k.c_legacy_rate_mask_to_array.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/extr_mwl8k.c_legacy_rate_mask_to_array.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@mwl8k_rates_24 = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @legacy_rate_mask_to_array], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @legacy_rate_mask_to_array(ptr nocapture noundef writeonly %0, i32 noundef %1) #0 {
%3 = load ptr, ptr @mwl8k_rates_24, align 8
%4 = and i32 %1, 1
%5 = icmp eq i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = load i32, ptr %3, align 4, !tbaa !6
store i32 %7, ptr %0, align 4, !tbaa !11
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ 1, %6 ], [ 0, %2 ]
%10 = and i32 %1, 2
%11 = icmp eq i32 %10, 0
br i1 %11, label %18, label %12
12: ; preds = %8
%13 = getelementptr inbounds i8, ptr %3, i64 4
%14 = load i32, ptr %13, align 4, !tbaa !6
%15 = add nuw nsw i32 %9, 1
%16 = zext nneg i32 %9 to i64
%17 = getelementptr inbounds i32, ptr %0, i64 %16
store i32 %14, ptr %17, align 4, !tbaa !11
br label %18
18: ; preds = %12, %8
%19 = phi i32 [ %15, %12 ], [ %9, %8 ]
%20 = and i32 %1, 4
%21 = icmp eq i32 %20, 0
br i1 %21, label %28, label %22
22: ; preds = %18
%23 = getelementptr inbounds i8, ptr %3, i64 8
%24 = load i32, ptr %23, align 4, !tbaa !6
%25 = add nuw nsw i32 %19, 1
%26 = zext nneg i32 %19 to i64
%27 = getelementptr inbounds i32, ptr %0, i64 %26
store i32 %24, ptr %27, align 4, !tbaa !11
br label %28
28: ; preds = %22, %18
%29 = phi i32 [ %25, %22 ], [ %19, %18 ]
%30 = and i32 %1, 8
%31 = icmp eq i32 %30, 0
br i1 %31, label %38, label %32
32: ; preds = %28
%33 = getelementptr inbounds i8, ptr %3, i64 12
%34 = load i32, ptr %33, align 4, !tbaa !6
%35 = add nuw nsw i32 %29, 1
%36 = zext nneg i32 %29 to i64
%37 = getelementptr inbounds i32, ptr %0, i64 %36
store i32 %34, ptr %37, align 4, !tbaa !11
br label %38
38: ; preds = %28, %32
%39 = phi i32 [ %35, %32 ], [ %29, %28 ]
%40 = and i32 %1, 32
%41 = icmp eq i32 %40, 0
br i1 %41, label %48, label %42
42: ; preds = %38
%43 = getelementptr inbounds i8, ptr %3, i64 20
%44 = load i32, ptr %43, align 4, !tbaa !6
%45 = add nuw nsw i32 %39, 1
%46 = zext nneg i32 %39 to i64
%47 = getelementptr inbounds i32, ptr %0, i64 %46
store i32 %44, ptr %47, align 4, !tbaa !11
br label %48
48: ; preds = %42, %38
%49 = phi i32 [ %45, %42 ], [ %39, %38 ]
%50 = and i32 %1, 64
%51 = icmp eq i32 %50, 0
br i1 %51, label %58, label %52
52: ; preds = %48
%53 = getelementptr inbounds i8, ptr %3, i64 24
%54 = load i32, ptr %53, align 4, !tbaa !6
%55 = add nuw nsw i32 %49, 1
%56 = zext nneg i32 %49 to i64
%57 = getelementptr inbounds i32, ptr %0, i64 %56
store i32 %54, ptr %57, align 4, !tbaa !11
br label %58
58: ; preds = %52, %48
%59 = phi i32 [ %55, %52 ], [ %49, %48 ]
%60 = and i32 %1, 128
%61 = icmp eq i32 %60, 0
br i1 %61, label %68, label %62
62: ; preds = %58
%63 = getelementptr inbounds i8, ptr %3, i64 28
%64 = load i32, ptr %63, align 4, !tbaa !6
%65 = add nuw nsw i32 %59, 1
%66 = zext nneg i32 %59 to i64
%67 = getelementptr inbounds i32, ptr %0, i64 %66
store i32 %64, ptr %67, align 4, !tbaa !11
br label %68
68: ; preds = %62, %58
%69 = phi i32 [ %65, %62 ], [ %59, %58 ]
%70 = and i32 %1, 256
%71 = icmp eq i32 %70, 0
br i1 %71, label %78, label %72
72: ; preds = %68
%73 = getelementptr inbounds i8, ptr %3, i64 32
%74 = load i32, ptr %73, align 4, !tbaa !6
%75 = add nuw nsw i32 %69, 1
%76 = zext nneg i32 %69 to i64
%77 = getelementptr inbounds i32, ptr %0, i64 %76
store i32 %74, ptr %77, align 4, !tbaa !11
br label %78
78: ; preds = %72, %68
%79 = phi i32 [ %75, %72 ], [ %69, %68 ]
%80 = and i32 %1, 512
%81 = icmp eq i32 %80, 0
br i1 %81, label %88, label %82
82: ; preds = %78
%83 = getelementptr inbounds i8, ptr %3, i64 36
%84 = load i32, ptr %83, align 4, !tbaa !6
%85 = add nuw nsw i32 %79, 1
%86 = zext nneg i32 %79 to i64
%87 = getelementptr inbounds i32, ptr %0, i64 %86
store i32 %84, ptr %87, align 4, !tbaa !11
br label %88
88: ; preds = %82, %78
%89 = phi i32 [ %85, %82 ], [ %79, %78 ]
%90 = and i32 %1, 1024
%91 = icmp eq i32 %90, 0
br i1 %91, label %98, label %92
92: ; preds = %88
%93 = getelementptr inbounds i8, ptr %3, i64 40
%94 = load i32, ptr %93, align 4, !tbaa !6
%95 = add nuw nsw i32 %89, 1
%96 = zext nneg i32 %89 to i64
%97 = getelementptr inbounds i32, ptr %0, i64 %96
store i32 %94, ptr %97, align 4, !tbaa !11
br label %98
98: ; preds = %92, %88
%99 = phi i32 [ %95, %92 ], [ %89, %88 ]
%100 = and i32 %1, 2048
%101 = icmp eq i32 %100, 0
br i1 %101, label %108, label %102
102: ; preds = %98
%103 = getelementptr inbounds i8, ptr %3, i64 44
%104 = load i32, ptr %103, align 4, !tbaa !6
%105 = add nuw nsw i32 %99, 1
%106 = zext nneg i32 %99 to i64
%107 = getelementptr inbounds i32, ptr %0, i64 %106
store i32 %104, ptr %107, align 4, !tbaa !11
br label %108
108: ; preds = %102, %98
%109 = phi i32 [ %105, %102 ], [ %99, %98 ]
%110 = and i32 %1, 4096
%111 = icmp eq i32 %110, 0
br i1 %111, label %117, label %112
112: ; preds = %108
%113 = getelementptr inbounds i8, ptr %3, i64 48
%114 = load i32, ptr %113, align 4, !tbaa !6
%115 = zext nneg i32 %109 to i64
%116 = getelementptr inbounds i32, ptr %0, i64 %115
store i32 %114, ptr %116, align 4, !tbaa !11
br label %117
117: ; preds = %112, %108
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| fastsocket_kernel_drivers_net_wireless_extr_mwl8k.c_legacy_rate_mask_to_array |
; ModuleID = 'borg_scripts_fuzz-cache-sync_extr_....srcborgcache_synccache_sync.c_cache_sync_size_totals.so'
source_filename = "borg_scripts_fuzz-cache-sync_extr_....srcborgcache_synccache_sync.c_cache_sync_size_totals.so"
define dso_local i32 @cache_sync_size_totals(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
ret i32 %memload
}
| ; ModuleID = 'AnghaBench/borg/scripts/fuzz-cache-sync/extr_....srcborgcache_synccache_sync.c_cache_sync_size_totals.c'
source_filename = "AnghaBench/borg/scripts/fuzz-cache-sync/extr_....srcborgcache_synccache_sync.c_cache_sync_size_totals.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @cache_sync_size_totals], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal i32 @cache_sync_size_totals(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
ret i32 %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 0}
!7 = !{!"TYPE_9__", !8, i64 0}
!8 = !{!"TYPE_8__", !9, i64 0}
!9 = !{!"TYPE_7__", !10, i64 0}
!10 = !{!"TYPE_6__", !11, i64 0}
!11 = !{!"int", !12, i64 0}
!12 = !{!"omnipotent char", !13, i64 0}
!13 = !{!"Simple C/C++ TBAA"}
| borg_scripts_fuzz-cache-sync_extr_....srcborgcache_synccache_sync.c_cache_sync_size_totals |
; ModuleID = 'freebsd_contrib_libevent_test_extr_regress.gen.c_kill_complete.so'
source_filename = "freebsd_contrib_libevent_test_extr_regress.gen.c_kill_complete.so"
define dso_local i32 @kill_complete(i64 %arg1) {
entry:
%memref-disp = add i64 %arg1, 4
%0 = inttoptr i64 %memref-disp to ptr
%1 = load i32, ptr %0, align 1
%2 = zext i32 %1 to i64
%3 = zext i32 0 to i64
%4 = sub i64 %2, %3
%5 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %2, i64 %3)
%CF = extractvalue { i64, i1 } %5, 1
%ZF = icmp eq i64 %4, 0
%highbit = and i64 -9223372036854775808, %4
%SF = icmp ne i64 %highbit, 0
%6 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %2, i64 %3)
%OF = extractvalue { i64, i1 } %6, 1
%7 = and i64 %4, 255
%8 = call i64 @llvm.ctpop.i64(i64 %7)
%9 = and i64 %8, 1
%PF = icmp eq i64 %9, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%10 = inttoptr i64 %arg1 to ptr
%11 = load i32, ptr %10, align 1
%12 = zext i32 %11 to i64
%13 = zext i32 1 to i64
%14 = sub i64 %12, %13
%15 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %12, i64 %13)
%CF1 = extractvalue { i64, i1 } %15, 1
%ZF2 = icmp eq i64 %14, 0
%highbit3 = and i64 -9223372036854775808, %14
%SF4 = icmp ne i64 %highbit3, 0
%16 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %12, i64 %13)
%OF5 = extractvalue { i64, i1 } %16, 1
%17 = and i64 %14, 255
%18 = call i64 @llvm.ctpop.i64(i64 %17)
%19 = and i64 %18, 1
%PF6 = icmp eq i64 %19, 0
%20 = zext i1 %CF1 to i32
%21 = add i32 0, %20
%EAX = sub i32 0, %21
%22 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 0, i32 %21)
%OF7 = extractvalue { i32, i1 } %22, 1
%23 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 0, i32 %21)
%CF8 = extractvalue { i32, i1 } %23, 1
br label %UnifiedReturnBlock
bb.2: ; preds = %entry
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.2, %bb.1
%UnifiedRetVal = phi i32 [ %EAX, %bb.1 ], [ -1, %bb.2 ]
ret i32 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/contrib/libevent/test/extr_regress.gen.c_kill_complete.c'
source_filename = "AnghaBench/freebsd/contrib/libevent/test/extr_regress.gen.c_kill_complete.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define range(i32 -1, 1) i32 @kill_complete(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 4
%3 = load i32, ptr %2, align 4, !tbaa !6
%4 = icmp eq i32 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = load i32, ptr %0, align 4, !tbaa !11
%7 = icmp eq i32 %6, 0
%8 = sext i1 %7 to i32
br label %9
9: ; preds = %5, %1
%10 = phi i32 [ -1, %1 ], [ %8, %5 ]
ret i32 %10
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"kill", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
| freebsd_contrib_libevent_test_extr_regress.gen.c_kill_complete |
; ModuleID = 'fastsocket_kernel_drivers_net_extr_iseries_veth.c_veth_change_mtu.so'
source_filename = "fastsocket_kernel_drivers_net_extr_iseries_veth.c_veth_change_mtu.so"
@VETH_MAX_MTU = common dso_local global i32 0, align 4
@EINVAL = common dso_local global i32 0, align 4
define dso_local i32 @veth_change_mtu(i64 %arg1, i32 %arg2) {
entry:
%0 = sub i32 %arg2, 68
%1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %arg2, i32 68)
%CF = extractvalue { i32, i1 } %1, 1
%ZF = icmp eq i32 %0, 0
%highbit = and i32 -2147483648, %0
%SF = icmp ne i32 %highbit, 0
%2 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %arg2, i32 68)
%OF = extractvalue { i32, i1 } %2, 1
%3 = and i32 %0, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
%SFAndOF_JL = icmp ne i1 %SF, %OF
br i1 %SFAndOF_JL, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%6 = load i32, ptr @VETH_MAX_MTU, align 4
%7 = zext i32 %6 to i64
%8 = zext i32 %arg2 to i64
%9 = sub i64 %7, %8
%10 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %7, i64 %8)
%CF1 = extractvalue { i64, i1 } %10, 1
%ZF2 = icmp eq i64 %9, 0
%highbit3 = and i64 -9223372036854775808, %9
%SF4 = icmp ne i64 %highbit3, 0
%11 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %7, i64 %8)
%OF5 = extractvalue { i64, i1 } %11, 1
%12 = and i64 %9, 255
%13 = call i64 @llvm.ctpop.i64(i64 %12)
%14 = and i64 %13, 1
%PF6 = icmp eq i64 %14, 0
%SFAndOF_JL13 = icmp ne i1 %SF4, %OF5
br i1 %SFAndOF_JL13, label %bb.3, label %bb.2
bb.2: ; preds = %bb.1
%15 = inttoptr i64 %arg1 to ptr
store i32 %arg2, ptr %15, align 1
br label %UnifiedReturnBlock
bb.3: ; preds = %bb.1, %entry
%16 = load i32, ptr @EINVAL, align 4
%EAX = sub i32 0, %16
%17 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 0, i32 %16)
%CF7 = extractvalue { i32, i1 } %17, 1
%ZF8 = icmp eq i32 %EAX, 0
%highbit9 = and i32 -2147483648, %EAX
%SF10 = icmp ne i32 %highbit9, 0
%18 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 0, i32 %16)
%OF11 = extractvalue { i32, i1 } %18, 1
%19 = and i32 %EAX, 255
%20 = call i32 @llvm.ctpop.i32(i32 %19)
%21 = and i32 %20, 1
%PF12 = icmp eq i32 %21, 0
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.3, %bb.2
%UnifiedRetVal = phi i32 [ 0, %bb.2 ], [ %EAX, %bb.3 ]
ret i32 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_iseries_veth.c_veth_change_mtu.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_iseries_veth.c_veth_change_mtu.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VETH_MAX_MTU = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @veth_change_mtu], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @veth_change_mtu(ptr nocapture noundef writeonly %0, i32 noundef %1) #0 {
%3 = icmp slt i32 %1, 68
%4 = load i32, ptr @VETH_MAX_MTU, align 4
%5 = icmp slt i32 %4, %1
%6 = select i1 %3, i1 true, i1 %5
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, ptr @EINVAL, align 4, !tbaa !6
%9 = sub nsw i32 0, %8
br label %11
10: ; preds = %2
store i32 %1, ptr %0, align 4, !tbaa !10
br label %11
11: ; preds = %10, %7
%12 = phi i32 [ %9, %7 ], [ 0, %10 ]
ret i32 %12
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"net_device", !7, i64 0}
| fastsocket_kernel_drivers_net_extr_iseries_veth.c_veth_change_mtu |
; ModuleID = 'linux_drivers_net_ethernet_amd_xgbe_extr_xgbe-mdio.c_xgbe_init_function_ptrs_phy.so'
source_filename = "linux_drivers_net_ethernet_amd_xgbe_extr_xgbe-mdio.c_xgbe_init_function_ptrs_phy.so"
@xgbe_phy_init = common dso_local global i32 0, align 4
@xgbe_phy_exit = common dso_local global i32 0, align 4
@xgbe_phy_reset = common dso_local global i32 0, align 4
@xgbe_phy_start = common dso_local global i32 0, align 4
@xgbe_phy_stop = common dso_local global i32 0, align 4
@xgbe_phy_status = common dso_local global i32 0, align 4
@xgbe_phy_config_aneg = common dso_local global i32 0, align 4
@xgbe_phy_valid_speed = common dso_local global i32 0, align 4
@xgbe_an_combined_isr = common dso_local global i32 0, align 4
@xgbe_phy_module_info = common dso_local global i32 0, align 4
@xgbe_phy_module_eeprom = common dso_local global i32 0, align 4
define dso_local i32 @xgbe_init_function_ptrs_phy(i64 %arg1) {
entry:
%memload = load i32, ptr @xgbe_phy_init, align 1
%memref-disp = add i64 %arg1, 40
%0 = inttoptr i64 %memref-disp to ptr
store i32 %memload, ptr %0, align 1
%memload1 = load i32, ptr @xgbe_phy_exit, align 1
%memref-disp2 = add i64 %arg1, 36
%1 = inttoptr i64 %memref-disp2 to ptr
store i32 %memload1, ptr %1, align 1
%memload3 = load i32, ptr @xgbe_phy_reset, align 1
%memref-disp4 = add i64 %arg1, 32
%2 = inttoptr i64 %memref-disp4 to ptr
store i32 %memload3, ptr %2, align 1
%memload5 = load i32, ptr @xgbe_phy_start, align 1
%memref-disp6 = add i64 %arg1, 28
%3 = inttoptr i64 %memref-disp6 to ptr
store i32 %memload5, ptr %3, align 1
%memload7 = load i32, ptr @xgbe_phy_stop, align 1
%memref-disp8 = add i64 %arg1, 24
%4 = inttoptr i64 %memref-disp8 to ptr
store i32 %memload7, ptr %4, align 1
%memload9 = load i32, ptr @xgbe_phy_status, align 1
%memref-disp10 = add i64 %arg1, 20
%5 = inttoptr i64 %memref-disp10 to ptr
store i32 %memload9, ptr %5, align 1
%memload11 = load i32, ptr @xgbe_phy_config_aneg, align 1
%memref-disp12 = add i64 %arg1, 16
%6 = inttoptr i64 %memref-disp12 to ptr
store i32 %memload11, ptr %6, align 1
%memload13 = load i32, ptr @xgbe_phy_valid_speed, align 1
%memref-disp14 = add i64 %arg1, 12
%7 = inttoptr i64 %memref-disp14 to ptr
store i32 %memload13, ptr %7, align 1
%memload15 = load i32, ptr @xgbe_an_combined_isr, align 1
%memref-disp16 = add i64 %arg1, 8
%8 = inttoptr i64 %memref-disp16 to ptr
store i32 %memload15, ptr %8, align 1
%memload17 = load i32, ptr @xgbe_phy_module_info, align 1
%memref-disp18 = add i64 %arg1, 4
%9 = inttoptr i64 %memref-disp18 to ptr
store i32 %memload17, ptr %9, align 1
%memload19 = load i32, ptr @xgbe_phy_module_eeprom, align 1
%10 = inttoptr i64 %arg1 to ptr
store i32 %memload19, ptr %10, align 1
ret i32 %memload19
}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/amd/xgbe/extr_xgbe-mdio.c_xgbe_init_function_ptrs_phy.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/amd/xgbe/extr_xgbe-mdio.c_xgbe_init_function_ptrs_phy.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@xgbe_phy_init = common local_unnamed_addr global i32 0, align 4
@xgbe_phy_exit = common local_unnamed_addr global i32 0, align 4
@xgbe_phy_reset = common local_unnamed_addr global i32 0, align 4
@xgbe_phy_start = common local_unnamed_addr global i32 0, align 4
@xgbe_phy_stop = common local_unnamed_addr global i32 0, align 4
@xgbe_phy_status = common local_unnamed_addr global i32 0, align 4
@xgbe_phy_config_aneg = common local_unnamed_addr global i32 0, align 4
@xgbe_phy_valid_speed = common local_unnamed_addr global i32 0, align 4
@xgbe_an_combined_isr = common local_unnamed_addr global i32 0, align 4
@xgbe_phy_module_info = common local_unnamed_addr global i32 0, align 4
@xgbe_phy_module_eeprom = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync)
define void @xgbe_init_function_ptrs_phy(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr @xgbe_phy_init, align 4, !tbaa !6
%3 = getelementptr inbounds i8, ptr %0, i64 40
store i32 %2, ptr %3, align 4, !tbaa !10
%4 = load i32, ptr @xgbe_phy_exit, align 4, !tbaa !6
%5 = getelementptr inbounds i8, ptr %0, i64 36
store i32 %4, ptr %5, align 4, !tbaa !12
%6 = load i32, ptr @xgbe_phy_reset, align 4, !tbaa !6
%7 = getelementptr inbounds i8, ptr %0, i64 32
store i32 %6, ptr %7, align 4, !tbaa !13
%8 = load i32, ptr @xgbe_phy_start, align 4, !tbaa !6
%9 = getelementptr inbounds i8, ptr %0, i64 28
store i32 %8, ptr %9, align 4, !tbaa !14
%10 = load i32, ptr @xgbe_phy_stop, align 4, !tbaa !6
%11 = getelementptr inbounds i8, ptr %0, i64 24
store i32 %10, ptr %11, align 4, !tbaa !15
%12 = load i32, ptr @xgbe_phy_status, align 4, !tbaa !6
%13 = getelementptr inbounds i8, ptr %0, i64 20
store i32 %12, ptr %13, align 4, !tbaa !16
%14 = load i32, ptr @xgbe_phy_config_aneg, align 4, !tbaa !6
%15 = getelementptr inbounds i8, ptr %0, i64 16
store i32 %14, ptr %15, align 4, !tbaa !17
%16 = load i32, ptr @xgbe_phy_valid_speed, align 4, !tbaa !6
%17 = getelementptr inbounds i8, ptr %0, i64 12
store i32 %16, ptr %17, align 4, !tbaa !18
%18 = load i32, ptr @xgbe_an_combined_isr, align 4, !tbaa !6
%19 = getelementptr inbounds i8, ptr %0, i64 8
store i32 %18, ptr %19, align 4, !tbaa !19
%20 = load i32, ptr @xgbe_phy_module_info, align 4, !tbaa !6
%21 = getelementptr inbounds i8, ptr %0, i64 4
store i32 %20, ptr %21, align 4, !tbaa !20
%22 = load i32, ptr @xgbe_phy_module_eeprom, align 4, !tbaa !6
store i32 %22, ptr %0, align 4, !tbaa !21
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 40}
!11 = !{!"xgbe_phy_if", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40}
!12 = !{!11, !7, i64 36}
!13 = !{!11, !7, i64 32}
!14 = !{!11, !7, i64 28}
!15 = !{!11, !7, i64 24}
!16 = !{!11, !7, i64 20}
!17 = !{!11, !7, i64 16}
!18 = !{!11, !7, i64 12}
!19 = !{!11, !7, i64 8}
!20 = !{!11, !7, i64 4}
!21 = !{!11, !7, i64 0}
| linux_drivers_net_ethernet_amd_xgbe_extr_xgbe-mdio.c_xgbe_init_function_ptrs_phy |
; ModuleID = 'ish_util_extr_fifo.c_fifo_destroy.so'
source_filename = "ish_util_extr_fifo.c_fifo_destroy.so"
declare dso_local void @free(ptr)
define dso_local void @fifo_destroy(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
%1 = inttoptr i32 %memload to ptr
tail call void @free(ptr %1)
ret void
}
| ; ModuleID = 'AnghaBench/ish/util/extr_fifo.c_fifo_destroy.c'
source_filename = "AnghaBench/ish/util/extr_fifo.c_fifo_destroy.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @fifo_destroy(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = tail call i32 @free(i32 noundef %2) #2
ret void
}
declare i32 @free(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"fifo", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| ish_util_extr_fifo.c_fifo_destroy |
; ModuleID = 'esp-idf_examples_wifi_iperf_components_iperf_extr_iperf.c_iperf_is_udp_server.so'
source_filename = "esp-idf_examples_wifi_iperf_components_iperf_extr_iperf.c_iperf_is_udp_server.so"
@s_iperf_ctrl = common dso_local global i32 0, align 4
@IPERF_FLAG_SERVER = common dso_local global i32 0, align 4
@IPERF_FLAG_UDP = common dso_local global i32 0, align 4
define dso_local i32 @iperf_is_udp_server() {
entry:
%memload = load i32, ptr @s_iperf_ctrl, align 1
%0 = load i32, ptr @IPERF_FLAG_SERVER, align 4
%1 = zext i32 %0 to i64
%2 = zext i32 %memload to i64
%3 = and i64 %1, %2
%ZF = icmp eq i64 %3, 0
%highbit = and i64 -9223372036854775808, %3
%SF = icmp ne i64 %highbit, 0
%4 = and i64 %3, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
%CL = icmp eq i1 %ZF, false
%7 = load i32, ptr @IPERF_FLAG_UDP, align 4
%8 = zext i32 %7 to i64
%9 = zext i32 %memload to i64
%10 = and i64 %8, %9
%ZF1 = icmp eq i64 %10, 0
%highbit2 = and i64 -9223372036854775808, %10
%SF3 = icmp ne i64 %highbit2, 0
%11 = and i64 %10, 255
%12 = call i64 @llvm.ctpop.i64(i64 %11)
%13 = and i64 %12, 1
%PF4 = icmp eq i64 %13, 0
%AL = icmp eq i1 %ZF1, false
%14 = zext i1 %AL to i8
%15 = zext i1 %CL to i8
%AL9 = and i8 %14, %15
%highbit5 = and i8 -128, %AL9
%SF6 = icmp ne i8 %highbit5, 0
%ZF7 = icmp eq i8 %AL9, 0
%16 = call i8 @llvm.ctpop.i8(i8 %AL9)
%17 = and i8 %16, 1
%PF8 = icmp eq i8 %17, 0
%EAX = zext i8 %AL9 to i32
ret i32 %EAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/esp-idf/examples/wifi/iperf/components/iperf/extr_iperf.c_iperf_is_udp_server.c'
source_filename = "AnghaBench/esp-idf/examples/wifi/iperf/components/iperf/extr_iperf.c_iperf_is_udp_server.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
@s_iperf_ctrl = common local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 4
@IPERF_FLAG_SERVER = common local_unnamed_addr global i32 0, align 4
@IPERF_FLAG_UDP = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @iperf_is_udp_server], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal range(i32 0, 2) i32 @iperf_is_udp_server() #0 {
%1 = load i32, ptr @s_iperf_ctrl, align 4
%2 = load i32, ptr @IPERF_FLAG_SERVER, align 4, !tbaa !6
%3 = and i32 %2, %1
%4 = icmp ne i32 %3, 0
%5 = load i32, ptr @IPERF_FLAG_UDP, align 4
%6 = and i32 %5, %1
%7 = icmp ne i32 %6, 0
%8 = select i1 %4, i1 %7, i1 false
%9 = zext i1 %8 to i32
ret i32 %9
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| esp-idf_examples_wifi_iperf_components_iperf_extr_iperf.c_iperf_is_udp_server |
; ModuleID = 'openssl_crypto_asn1_extr_asn1_lib.c_asn1_put_length.so'
source_filename = "openssl_crypto_asn1_extr_asn1_lib.c_asn1_put_length.so"
define dso_local void @asn1_put_length(i64 %arg1, i32 %arg2) {
entry:
%ESI-SKT-LOC = alloca i64, align 8
%RDX-SKT-LOC61 = alloca i64, align 8
%RAX-SKT-LOC = alloca i64, align 8
%SIL-SKT-LOC = alloca i64, align 8
%RDX-SKT-LOC = alloca i64, align 8
%EAX-SKT-LOC = alloca i64, align 8
%R10-SKT-LOC = alloca i64, align 8
%EDX-SKT-LOC = alloca i64, align 8
%ECX-SKT-LOC = alloca i64, align 8
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%1 = sub i32 %arg2, 128
%2 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %arg2, i32 128)
%CF = extractvalue { i32, i1 } %2, 1
%ZF = icmp eq i32 %1, 0
%highbit = and i32 -2147483648, %1
%SF = icmp ne i32 %highbit, 0
%3 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %arg2, i32 128)
%OF = extractvalue { i32, i1 } %3, 1
%4 = and i32 %1, 255
%5 = call i32 @llvm.ctpop.i32(i32 %4)
%6 = and i32 %5, 1
%PF = icmp eq i32 %6, 0
%7 = zext i32 %arg2 to i64
store i64 %7, ptr %SIL-SKT-LOC, align 1
%8 = zext i32 %arg2 to i64
store i64 %8, ptr %ESI-SKT-LOC, align 1
bb.1: ; No predecessors!
%9 = trunc i32 %arg2 to i8
%10 = inttoptr i64 %memload to ptr
store i8 %9, ptr %10, align 1
%R9 = add i64 %memload, 1
%11 = and i64 %R9, 255
%12 = call i64 @llvm.ctpop.i64(i64 %11)
%13 = and i64 %12, 1
%PF1 = icmp eq i64 %13, 0
%ZF2 = icmp eq i64 %R9, 0
%highbit3 = and i64 -9223372036854775808, %R9
%SF4 = icmp ne i64 %highbit3, 0
%14 = inttoptr i64 %arg1 to ptr
store i64 %R9, ptr %14, align 1
ret void
bb.2: ; No predecessors!
%15 = zext i8 1 to i64
store i64 %15, ptr %ECX-SKT-LOC, align 1
%16 = zext i32 %arg2 to i64
store i64 %16, ptr %EDX-SKT-LOC, align 1
%17 = zext i32 0 to i64
store i64 %17, ptr %R10-SKT-LOC, align 1
%18 = zext i32 %arg2 to i64
store i64 %18, ptr %EAX-SKT-LOC, align 1
bb.3: ; No predecessors!
%19 = load i64, ptr %ECX-SKT-LOC, align 1
%ECX = trunc i64 %19 to i32
%20 = load i64, ptr %EDX-SKT-LOC, align 1
%EDX = trunc i64 %20 to i32
%EDX8 = lshr i32 %EDX, 8
%ZF5 = icmp eq i32 %EDX8, 0
%highbit6 = and i32 -2147483648, %EDX8
%SF7 = icmp ne i32 %highbit6, 0
%memref-disp = add i32 %ECX, 1
%R10 = load i64, ptr %R10-SKT-LOC, align 1
%R1013 = add i64 %R10, 1
%21 = and i64 %R1013, 255
%22 = call i64 @llvm.ctpop.i64(i64 %21)
%23 = and i64 %22, 1
%PF9 = icmp eq i64 %23, 0
%ZF10 = icmp eq i64 %R1013, 0
%highbit11 = and i64 -9223372036854775808, %R1013
%SF12 = icmp ne i64 %highbit11, 0
%24 = load i64, ptr %EAX-SKT-LOC, align 1
%EAX = trunc i64 %24 to i32
%25 = sub i32 %EAX, 255
%26 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EAX, i32 255)
%CF14 = extractvalue { i32, i1 } %26, 1
%ZF15 = icmp eq i32 %25, 0
%highbit16 = and i32 -2147483648, %25
%SF17 = icmp ne i32 %highbit16, 0
%27 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EAX, i32 255)
%OF18 = extractvalue { i32, i1 } %27, 1
%28 = and i32 %25, 255
%29 = call i32 @llvm.ctpop.i32(i32 %28)
%30 = and i32 %29, 1
%PF19 = icmp eq i32 %30, 0
bb.4: ; No predecessors!
%EAX20 = trunc i64 %R1013 to i32
%31 = trunc i32 %EAX20 to i8
%AL = or i8 %31, -128
%32 = call i8 @llvm.ctpop.i8(i8 %AL)
%33 = and i8 %32, 1
%PF21 = icmp eq i8 %33, 0
%ZF22 = icmp eq i8 %AL, 0
%highbit23 = and i8 -128, %AL
%SF24 = icmp ne i8 %highbit23, 0
%34 = inttoptr i64 %memload to ptr
store i8 %AL, ptr %34, align 1
%memref-disp25 = add i64 %R1013, -1
%35 = trunc i64 %R1013 to i8
%36 = and i8 %35, 3
%37 = call i8 @llvm.ctpop.i8(i8 %36)
%38 = and i8 %37, 1
%PF26 = icmp eq i8 %38, 0
%ZF27 = icmp eq i8 %36, 0
%highbit28 = and i8 -128, %36
%SF29 = icmp ne i8 %highbit28, 0
bb.5: ; No predecessors!
%39 = trunc i32 %ECX to i8
%EAX30 = zext i8 %39 to i32
%EAX35 = and i32 %EAX30, 3
%40 = and i32 %EAX35, 255
%41 = call i32 @llvm.ctpop.i32(i32 %40)
%42 = and i32 %41, 1
%PF31 = icmp eq i32 %42, 0
%ZF32 = icmp eq i32 %EAX35, 0
%highbit33 = and i32 -2147483648, %EAX35
%SF34 = icmp ne i32 %highbit33, 0
store i64 %R1013, ptr %RDX-SKT-LOC, align 1
%43 = zext i32 %EAX35 to i64
store i64 %43, ptr %RAX-SKT-LOC, align 1
bb.6: ; No predecessors!
%RDX = load i64, ptr %RDX-SKT-LOC, align 1
%memref-basereg = add i64 %memload, %RDX
%44 = load i64, ptr %SIL-SKT-LOC, align 1
%SIL = trunc i64 %44 to i8
%45 = inttoptr i64 %memref-basereg to ptr
store i8 %SIL, ptr %45, align 1
%RDX40 = sub i64 %RDX, 1
%46 = and i64 %RDX40, 255
%47 = call i64 @llvm.ctpop.i64(i64 %46)
%48 = and i64 %47, 1
%PF36 = icmp eq i64 %48, 0
%ZF37 = icmp eq i64 %RDX40, 0
%highbit38 = and i64 -9223372036854775808, %RDX40
%SF39 = icmp ne i64 %highbit38, 0
%49 = zext i8 %SIL to i32
%ESI = lshr i32 %49, 8
%ZF41 = icmp eq i32 %ESI, 0
%highbit42 = and i32 -2147483648, %ESI
%SF43 = icmp ne i32 %highbit42, 0
%RAX = load i64, ptr %RAX-SKT-LOC, align 1
%RAX48 = sub i64 %RAX, 1
%50 = and i64 %RAX48, 255
%51 = call i64 @llvm.ctpop.i64(i64 %50)
%52 = and i64 %51, 1
%PF44 = icmp eq i64 %52, 0
%ZF45 = icmp eq i64 %RAX48, 0
%highbit46 = and i64 -9223372036854775808, %RAX48
%SF47 = icmp ne i64 %highbit46, 0
store i64 %RDX40, ptr %RDX-SKT-LOC61, align 1
%53 = zext i32 %ESI to i64
store i64 %53, ptr %ESI-SKT-LOC, align 1
bb.7: ; No predecessors!
%54 = sub i64 %memref-disp25, 3
%55 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memref-disp25, i64 3)
%CF49 = extractvalue { i64, i1 } %55, 1
%ZF50 = icmp eq i64 %54, 0
%highbit51 = and i64 -9223372036854775808, %54
%SF52 = icmp ne i64 %highbit51, 0
%56 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memref-disp25, i64 3)
%OF53 = extractvalue { i64, i1 } %56, 1
%57 = and i64 %54, 255
%58 = call i64 @llvm.ctpop.i64(i64 %57)
%59 = and i64 %58, 1
%PF54 = icmp eq i64 %59, 0
bb.9: ; No predecessors!
%60 = sub i64 %memref-disp25, 3
%61 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memref-disp25, i64 3)
%CF55 = extractvalue { i64, i1 } %61, 1
%ZF56 = icmp eq i64 %60, 0
%highbit57 = and i64 -9223372036854775808, %60
%SF58 = icmp ne i64 %highbit57, 0
%62 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memref-disp25, i64 3)
%OF59 = extractvalue { i64, i1 } %62, 1
%63 = and i64 %60, 255
%64 = call i64 @llvm.ctpop.i64(i64 %63)
%65 = and i64 %64, 1
%PF60 = icmp eq i64 %65, 0
store i64 %R1013, ptr %RDX-SKT-LOC61, align 1
bb.10: ; No predecessors!
%RDX62 = load i64, ptr %RDX-SKT-LOC61, align 1
%RDX67 = add i64 %RDX62, 1
%66 = and i64 %RDX67, 255
%67 = call i64 @llvm.ctpop.i64(i64 %66)
%68 = and i64 %67, 1
%PF63 = icmp eq i64 %68, 0
%ZF64 = icmp eq i64 %RDX67, 0
%highbit65 = and i64 -9223372036854775808, %RDX67
%SF66 = icmp ne i64 %highbit65, 0
bb.11: ; No predecessors!
%69 = load i64, ptr %ESI-SKT-LOC, align 1
%ESI68 = trunc i64 %69 to i32
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/openssl/crypto/asn1/extr_asn1_lib.c_asn1_put_length.c'
source_filename = "AnghaBench/openssl/crypto/asn1/extr_asn1_lib.c_asn1_put_length.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @asn1_put_length], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(write, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @asn1_put_length(ptr nocapture noundef %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = icmp slt i32 %1, 128
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = trunc i32 %1 to i8
%7 = getelementptr inbounds i8, ptr %3, i64 1
store i8 %6, ptr %3, align 1, !tbaa !10
br label %32
8: ; preds = %2, %8
%9 = phi i64 [ %15, %8 ], [ 1, %2 ]
%10 = phi i32 [ %12, %8 ], [ %1, %2 ]
%11 = phi i32 [ %13, %8 ], [ 0, %2 ]
%12 = lshr i32 %10, 8
%13 = add nuw nsw i32 %11, 1
%14 = icmp ult i32 %10, 256
%15 = add nuw nsw i64 %9, 1
br i1 %14, label %16, label %8, !llvm.loop !11
16: ; preds = %8
%17 = trunc i32 %13 to i8
%18 = or i8 %17, -128
%19 = getelementptr inbounds i8, ptr %3, i64 1
store i8 %18, ptr %3, align 1, !tbaa !10
br label %20
20: ; preds = %16, %20
%21 = phi i64 [ %9, %16 ], [ %23, %20 ]
%22 = phi i32 [ %1, %16 ], [ %27, %20 ]
%23 = add nsw i64 %21, -1
%24 = trunc i32 %22 to i8
%25 = and i64 %23, 4294967295
%26 = getelementptr inbounds i8, ptr %19, i64 %25
store i8 %24, ptr %26, align 1, !tbaa !10
%27 = lshr i32 %22, 8
%28 = icmp sgt i64 %21, 1
br i1 %28, label %20, label %29, !llvm.loop !13
29: ; preds = %20
%30 = zext nneg i32 %13 to i64
%31 = getelementptr inbounds i8, ptr %19, i64 %30
br label %32
32: ; preds = %29, %5
%33 = phi ptr [ %7, %5 ], [ %31, %29 ]
store ptr %33, ptr %0, align 8, !tbaa !6
ret void
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(write, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
| openssl_crypto_asn1_extr_asn1_lib.c_asn1_put_length |
; ModuleID = 'FFmpeg_libavfilter_extr_vf_waveform.c_update_cr.so'
source_filename = "FFmpeg_libavfilter_extr_vf_waveform.c_update_cr.so"
define dso_local i32 @update_cr(i64 %arg1, i64 %arg2, i32 %arg3) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
%EAX = sub i32 %memload, %arg3
%1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload, i32 %arg3)
%CF = extractvalue { i32, i1 } %1, 1
%ZF = icmp eq i32 %EAX, 0
%highbit = and i32 -2147483648, %EAX
%SF = icmp ne i32 %highbit, 0
%2 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload, i32 %arg3)
%OF = extractvalue { i32, i1 } %2, 1
%3 = and i32 %EAX, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
%6 = and i32 %EAX, %EAX
%highbit1 = and i32 -2147483648, %6
%SF2 = icmp ne i32 %highbit1, 0
%ZF3 = icmp eq i32 %6, 0
%7 = and i32 %6, 255
%8 = call i32 @llvm.ctpop.i32(i32 %7)
%9 = and i32 %8, 1
%PF4 = icmp eq i32 %9, 0
%ZFCmp_CMOVG = icmp eq i1 %ZF3, false
%SFOFCmp_CMOVG = icmp eq i1 %SF2, false
%Cond_CMOVG = and i1 %ZFCmp_CMOVG, %SFOFCmp_CMOVG
%CMOV = select i1 %Cond_CMOVG, i32 %EAX, i32 0
%10 = inttoptr i64 %arg1 to ptr
store i32 %CMOV, ptr %10, align 1
ret i32 %EAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/FFmpeg/libavfilter/extr_vf_waveform.c_update_cr.c'
source_filename = "AnghaBench/FFmpeg/libavfilter/extr_vf_waveform.c_update_cr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @update_cr], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync)
define internal void @update_cr(ptr nocapture noundef %0, i32 %1, i32 noundef %2) #0 {
%4 = load i32, ptr %0, align 4, !tbaa !6
%5 = sub nsw i32 %4, %2
%6 = tail call i32 @llvm.smax.i32(i32 %5, i32 0)
store i32 %6, ptr %0, align 4, !tbaa !6
ret void
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #1
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| FFmpeg_libavfilter_extr_vf_waveform.c_update_cr |
; ModuleID = 'qmk_firmware_keyboards_planck_keymaps_mjtnumsym_extr_keymap.c_matrix_init_user.so'
source_filename = "qmk_firmware_keyboards_planck_keymaps_mjtnumsym_extr_keymap.c_matrix_init_user.so"
define dso_local void @matrix_init_user() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/qmk_firmware/keyboards/planck/keymaps/mjtnumsym/extr_keymap.c_matrix_init_user.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/planck/keymaps/mjtnumsym/extr_keymap.c_matrix_init_user.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define void @matrix_init_user() local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| qmk_firmware_keyboards_planck_keymaps_mjtnumsym_extr_keymap.c_matrix_init_user |
; ModuleID = 'hashcat_src_extr_rp_cpu.c_mangle_double.so'
source_filename = "hashcat_src_extr_rp_cpu.c_mangle_double.so"
@RP_PASSWORD_SIZE = common dso_local global i32 0, align 4
declare dso_local ptr @memcpy(ptr, ptr, i64)
define dso_local i32 @mangle_double(i64 %arg1, i64 %arg2) {
entry:
%EBX-SKT-LOC = alloca i32, align 4
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
%memref-basereg = add i64 %arg2, %arg2
%EBX = trunc i64 %memref-basereg to i32
%0 = load i32, ptr @RP_PASSWORD_SIZE, align 4
%1 = sub i32 %EBX, %0
%2 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EBX, i32 %0)
%CF = extractvalue { i32, i1 } %2, 1
%ZF = icmp eq i32 %1, 0
%highbit = and i32 -2147483648, %1
%SF = icmp ne i32 %highbit, 0
%3 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EBX, i32 %0)
%OF = extractvalue { i32, i1 } %3, 1
%4 = and i32 %1, 255
%5 = call i32 @llvm.ctpop.i32(i32 %4)
%6 = and i32 %5, 1
%PF = icmp eq i32 %6, 0
store i32 %EBX, ptr %EBX-SKT-LOC, align 1
%CmpSFOF_JGE = icmp eq i1 %SF, %OF
br i1 %CmpSFOF_JGE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%7 = trunc i64 %arg2 to i32
%RDX = sext i32 %7 to i64
%RDI = add nsw i64 %arg1, %RDX
%highbit1 = and i64 -9223372036854775808, %RDI
%SF2 = icmp ne i64 %highbit1, 0
%ZF3 = icmp eq i64 %RDI, 0
%8 = inttoptr i64 %RDI to ptr
%9 = inttoptr i64 %arg1 to ptr
%10 = call ptr @memcpy(ptr %8, ptr %9, i64 %RDX)
%RAX = ptrtoint ptr %10 to i64
br label %bb.3
bb.2: ; preds = %entry
%EBX4 = trunc i64 %arg2 to i32
store i32 %EBX4, ptr %EBX-SKT-LOC, align 1
br label %bb.3
bb.3: ; preds = %bb.2, %bb.1
%EBX5 = load i32, ptr %EBX-SKT-LOC, align 1
ret i32 %EBX5
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/hashcat/src/extr_rp_cpu.c_mangle_double.c'
source_filename = "AnghaBench/hashcat/src/extr_rp_cpu.c_mangle_double.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@RP_PASSWORD_SIZE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mangle_double], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @mangle_double(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @RP_PASSWORD_SIZE, align 4, !tbaa !6
%4 = shl nsw i32 %1, 1
%5 = icmp slt i32 %4, %3
br i1 %5, label %6, label %10
6: ; preds = %2
%7 = sext i32 %1 to i64
%8 = getelementptr inbounds i8, ptr %0, i64 %7
%9 = tail call i32 @memcpy(ptr noundef %8, ptr noundef %0, i64 noundef %7) #2
br label %10
10: ; preds = %2, %6
%11 = phi i32 [ %4, %6 ], [ %1, %2 ]
ret i32 %11
}
declare i32 @memcpy(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| hashcat_src_extr_rp_cpu.c_mangle_double |
; ModuleID = 'fastsocket_kernel_drivers_usb_core_extr_hub.c_usb_set_lpm_sel.so'
source_filename = "fastsocket_kernel_drivers_usb_core_extr_hub.c_usb_set_lpm_sel.so"
define dso_local i32 @usb_set_lpm_sel(i64 %arg1, i64 %arg2) {
entry:
%EDI-SKT-LOC = alloca i64, align 8
%ECX-SKT-LOC = alloca i64, align 8
%EAX-SKT-LOC = alloca i64, align 8
%RDX-SKT-LOC = alloca i64, align 8
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%1 = inttoptr i64 %arg2 to ptr
%2 = load i32, ptr %1, align 1
%EAX = sub i32 250, %2
%3 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 250, i32 %2)
%CF = extractvalue { i32, i1 } %3, 1
%ZF = icmp eq i32 %EAX, 0
%highbit = and i32 -2147483648, %EAX
%SF = icmp ne i32 %highbit, 0
%4 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 250, i32 %2)
%OF = extractvalue { i32, i1 } %4, 1
%5 = and i32 %EAX, 255
%6 = call i32 @llvm.ctpop.i32(i32 %5)
%7 = and i32 %6, 1
%PF = icmp eq i32 %7, 0
store i64 %memload, ptr %RDX-SKT-LOC, align 1
%8 = zext i32 %EAX to i64
store i64 %8, ptr %EAX-SKT-LOC, align 1
%9 = zext i32 1600 to i64
store i64 %9, ptr %ECX-SKT-LOC, align 1
%10 = zext i32 1 to i64
store i64 %10, ptr %EDI-SKT-LOC, align 1
br label %bb.1
bb.1: ; preds = %entry, %bb.1
%RDX = load i64, ptr %RDX-SKT-LOC, align 1
%11 = inttoptr i64 %RDX to ptr
%memload1 = load i64, ptr %11, align 1
%12 = load i64, ptr %EAX-SKT-LOC, align 1
%EAX2 = trunc i64 %12 to i32
%EAX9 = add i32 %EAX2, -250
%13 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %EAX2, i32 -250)
%CF3 = extractvalue { i32, i1 } %13, 1
%14 = and i32 %EAX9, 255
%15 = call i32 @llvm.ctpop.i32(i32 %14)
%16 = and i32 %15, 1
%PF4 = icmp eq i32 %16, 0
%ZF5 = icmp eq i32 %EAX9, 0
%highbit6 = and i32 -2147483648, %EAX9
%SF7 = icmp ne i32 %highbit6, 0
%17 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %EAX2, i32 -250)
%OF8 = extractvalue { i32, i1 } %17, 1
%18 = load i64, ptr %ECX-SKT-LOC, align 1
%ECX = trunc i64 %18 to i32
%ECX16 = add i32 %ECX, 250
%19 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %ECX, i32 250)
%CF10 = extractvalue { i32, i1 } %19, 1
%20 = and i32 %ECX16, 255
%21 = call i32 @llvm.ctpop.i32(i32 %20)
%22 = and i32 %21, 1
%PF11 = icmp eq i32 %22, 0
%ZF12 = icmp eq i32 %ECX16, 0
%highbit13 = and i32 -2147483648, %ECX16
%SF14 = icmp ne i32 %highbit13, 0
%23 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %ECX, i32 250)
%OF15 = extractvalue { i32, i1 } %23, 1
%24 = load i64, ptr %EDI-SKT-LOC, align 1
%EDI = trunc i64 %24 to i32
%EDI21 = sub i32 %EDI, 1
%25 = and i32 %EDI21, 255
%26 = call i32 @llvm.ctpop.i32(i32 %25)
%27 = and i32 %26, 1
%PF17 = icmp eq i32 %27, 0
%ZF18 = icmp eq i32 %EDI21, 0
%highbit19 = and i32 -2147483648, %EDI21
%SF20 = icmp ne i32 %highbit19, 0
%28 = and i64 %memload1, %memload1
%highbit22 = and i64 -9223372036854775808, %28
%SF23 = icmp ne i64 %highbit22, 0
%ZF24 = icmp eq i64 %28, 0
%29 = and i64 %28, 255
%30 = call i64 @llvm.ctpop.i64(i64 %29)
%31 = and i64 %30, 1
%PF25 = icmp eq i64 %31, 0
%CmpZF_JNE = icmp eq i1 %ZF24, false
%32 = zext i32 %EAX9 to i64
store i64 %32, ptr %EAX-SKT-LOC, align 1
%33 = zext i32 %ECX16 to i64
store i64 %33, ptr %ECX-SKT-LOC, align 1
%34 = zext i32 %EDI21 to i64
store i64 %34, ptr %EDI-SKT-LOC, align 1
store i64 %memload1, ptr %RDX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.1, label %bb.2
bb.2: ; preds = %bb.1
%35 = and i32 %EDI21, %EDI21
%highbit26 = and i32 -2147483648, %35
%SF27 = icmp ne i32 %highbit26, 0
%ZF28 = icmp eq i32 %35, 0
%36 = and i32 %35, 255
%37 = call i32 @llvm.ctpop.i32(i32 %36)
%38 = and i32 %37, 1
%PF29 = icmp eq i32 %38, 0
%Cond_CMOVE = icmp eq i1 %ZF28, true
%CMOV = select i1 %Cond_CMOVE, i32 %EDI21, i32 %ECX16
%ECX30 = sub i32 %CMOV, %EAX9
%39 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %CMOV, i32 %EAX9)
%CF31 = extractvalue { i32, i1 } %39, 1
%ZF32 = icmp eq i32 %ECX30, 0
%highbit33 = and i32 -2147483648, %ECX30
%SF34 = icmp ne i32 %highbit33, 0
%40 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %CMOV, i32 %EAX9)
%OF35 = extractvalue { i32, i1 } %40, 1
%41 = and i32 %ECX30, 255
%42 = call i32 @llvm.ctpop.i32(i32 %41)
%43 = and i32 %42, 1
%PF36 = icmp eq i32 %43, 0
%memref-disp = add i64 %arg2, 4
%44 = inttoptr i64 %memref-disp to ptr
store i32 %ECX30, ptr %44, align 1
ret i32 %EAX9
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/usb/core/extr_hub.c_usb_set_lpm_sel.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/usb/core/extr_hub.c_usb_set_lpm_sel.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @usb_set_lpm_sel], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @usb_set_lpm_sel(ptr nocapture noundef readonly %0, ptr nocapture noundef %1) #0 {
%3 = load i32, ptr %1, align 4, !tbaa !6
%4 = load ptr, ptr %0, align 8, !tbaa !11
br label %5
5: ; preds = %5, %2
%6 = phi ptr [ %4, %2 ], [ %8, %5 ]
%7 = phi i32 [ 0, %2 ], [ %10, %5 ]
%8 = load ptr, ptr %6, align 8, !tbaa !11
%9 = icmp eq ptr %8, null
%10 = add i32 %7, 1
br i1 %9, label %11, label %5, !llvm.loop !14
11: ; preds = %5
%12 = icmp eq i32 %7, 0
%13 = mul i32 %7, 250
%14 = add i32 %13, 1850
%15 = select i1 %12, i32 0, i32 %14
%16 = add i32 %13, %3
%17 = add i32 %16, %15
%18 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %17, ptr %18, align 4, !tbaa !16
ret void
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"usb3_lpm_parameters", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"usb_device", !13, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!7, !8, i64 4}
| fastsocket_kernel_drivers_usb_core_extr_hub.c_usb_set_lpm_sel |
; ModuleID = 'linux_drivers_staging_isdn_gigaset_extr_dummyll.c_gigaset_isdn_hupD.so'
source_filename = "linux_drivers_staging_isdn_gigaset_extr_dummyll.c_gigaset_isdn_hupD.so"
define dso_local void @gigaset_isdn_hupD() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/linux/drivers/staging/isdn/gigaset/extr_dummyll.c_gigaset_isdn_hupD.c'
source_filename = "AnghaBench/linux/drivers/staging/isdn/gigaset/extr_dummyll.c_gigaset_isdn_hupD.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define void @gigaset_isdn_hupD(ptr nocapture noundef readnone %0) local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_staging_isdn_gigaset_extr_dummyll.c_gigaset_isdn_hupD |
; ModuleID = 'sumatrapdf_ext_freetype_src_tools_ftrandom_extr_ftrandom.c_usage.so'
source_filename = "sumatrapdf_ext_freetype_src_tools_ftrandom_extr_ftrandom.c_usage.so"
@default_dir_list = common dso_local global i64 0, align 8
@default_ext_list = common dso_local global i64 0, align 8
@0 = private unnamed_addr constant [1171 x i8] c"%s [options] -- Generate random erroneous fonts\0A and attempt to parse them with FreeType.\0A\0A\00 --all All non-directory files are assumed to be fonts.\0A\00 --check-outlines Make sure we can parse the outlines of each glyph.\0A\00 --dir <path> Append <path> to list of font search directories\0A (no recursive search).\0A\00 --error-count <cnt> Introduce <cnt> single byte errors into each font\0A (default: 1)\0A\00 --error-fraction <frac> Introduce <frac>*filesize single byte errors\0A into each font (default: 0.0).\0A\00 --ext <ext> Add <ext> to list of extensions indicating fonts.\0A\00 --help Print this.\0A\00 --nohints Turn off hinting.\0A\00 --rasterize Attempt to rasterize each glyph.\0A\00 --results <path> Place the created test fonts into <path>\0A (default: `results')\0A\00 --size <float> Use the given font size for the tests.\0A\00 --test <file> Run a single test on an already existing file.\0A\00Default font extensions:\0A\00 .%s\00Default font directories:\0A\00 %s\00", align 1, !ROData_SecInfo !0
declare dso_local i32 @fprintf(ptr, ptr, ...)
declare dso_local i64 @fwrite(ptr, i64, i64, ptr)
declare dso_local i32 @fputc(i32, ptr)
define dso_local i32 @usage(i64 %arg1, i64 %arg2) {
entry:
%R12-SKT-LOC = alloca i64, align 8
%RBX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memload = load i64, ptr @default_dir_list, align 1
%memload1 = load i64, ptr @default_ext_list, align 1
%0 = inttoptr i64 %arg1 to ptr
%EAX = call i32 (ptr, ptr, ...) @fprintf(ptr %0, ptr @0)
%1 = zext i32 76 to i64
%2 = zext i32 1 to i64
%3 = inttoptr i64 %arg1 to ptr
%RAX = call i64 @fwrite(ptr getelementptr inbounds ([1171 x i8], ptr @0, i32 0, i32 93), i64 %1, i64 %2, ptr %3)
%4 = zext i32 78 to i64
%5 = zext i32 1 to i64
%6 = inttoptr i64 %arg1 to ptr
%RAX3 = call i64 @fwrite(ptr getelementptr inbounds ([1171 x i8], ptr @0, i32 0, i32 170), i64 %4, i64 %5, ptr %6)
%7 = zext i32 126 to i64
%8 = zext i32 1 to i64
%9 = inttoptr i64 %arg1 to ptr
%RAX5 = call i64 @fwrite(ptr getelementptr inbounds ([1171 x i8], ptr @0, i32 0, i32 249), i64 %7, i64 %8, ptr %9)
%10 = zext i32 117 to i64
%11 = zext i32 1 to i64
%12 = inttoptr i64 %arg1 to ptr
%RAX7 = call i64 @fwrite(ptr getelementptr inbounds ([1171 x i8], ptr @0, i32 0, i32 376), i64 %10, i64 %11, ptr %12)
%13 = zext i32 130 to i64
%14 = zext i32 1 to i64
%15 = inttoptr i64 %arg1 to ptr
%RAX9 = call i64 @fwrite(ptr getelementptr inbounds ([1171 x i8], ptr @0, i32 0, i32 494), i64 %13, i64 %14, ptr %15)
%16 = zext i32 77 to i64
%17 = zext i32 1 to i64
%18 = inttoptr i64 %arg1 to ptr
%RAX11 = call i64 @fwrite(ptr getelementptr inbounds ([1171 x i8], ptr @0, i32 0, i32 625), i64 %16, i64 %17, ptr %18)
%19 = zext i32 39 to i64
%20 = zext i32 1 to i64
%21 = inttoptr i64 %arg1 to ptr
%RAX13 = call i64 @fwrite(ptr getelementptr inbounds ([1171 x i8], ptr @0, i32 0, i32 703), i64 %19, i64 %20, ptr %21)
%22 = zext i32 45 to i64
%23 = zext i32 1 to i64
%24 = inttoptr i64 %arg1 to ptr
%RAX15 = call i64 @fwrite(ptr getelementptr inbounds ([1171 x i8], ptr @0, i32 0, i32 743), i64 %22, i64 %23, ptr %24)
%25 = zext i32 60 to i64
%26 = zext i32 1 to i64
%27 = inttoptr i64 %arg1 to ptr
%RAX17 = call i64 @fwrite(ptr getelementptr inbounds ([1171 x i8], ptr @0, i32 0, i32 789), i64 %25, i64 %26, ptr %27)
%28 = zext i32 116 to i64
%29 = zext i32 1 to i64
%30 = inttoptr i64 %arg1 to ptr
%RAX19 = call i64 @fwrite(ptr getelementptr inbounds ([1171 x i8], ptr @0, i32 0, i32 850), i64 %28, i64 %29, ptr %30)
%31 = zext i32 66 to i64
%32 = zext i32 1 to i64
%33 = inttoptr i64 %arg1 to ptr
%RAX21 = call i64 @fwrite(ptr getelementptr inbounds ([1171 x i8], ptr @0, i32 0, i32 967), i64 %31, i64 %32, ptr %33)
%34 = zext i32 74 to i64
%35 = zext i32 1 to i64
%36 = inttoptr i64 %arg1 to ptr
%RAX23 = call i64 @fwrite(ptr getelementptr inbounds ([1171 x i8], ptr @0, i32 0, i32 1034), i64 %34, i64 %35, ptr %36)
%37 = inttoptr i64 %arg1 to ptr
%EAX24 = call i32 @fputc(i32 10, ptr %37)
%38 = zext i32 25 to i64
%39 = zext i32 1 to i64
%40 = inttoptr i64 %arg1 to ptr
%RAX26 = call i64 @fwrite(ptr getelementptr inbounds ([1171 x i8], ptr @0, i32 0, i32 1109), i64 %38, i64 %39, ptr %40)
%41 = inttoptr i64 %arg1 to ptr
%EAX27 = call i32 @fputc(i32 32, ptr %41)
%42 = inttoptr i64 %memload1 to ptr
%memload28 = load i64, ptr %42, align 1
%43 = and i64 %memload28, %memload28
%highbit = and i64 -9223372036854775808, %43
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %43, 0
%44 = and i64 %43, 255
%45 = call i64 @llvm.ctpop.i64(i64 %44)
%46 = and i64 %45, 1
%PF = icmp eq i64 %46, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%RBX = add i64 %memload1, 8
%47 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %memload1, i64 8)
%CF = extractvalue { i64, i1 } %47, 1
%48 = and i64 %RBX, 255
%49 = call i64 @llvm.ctpop.i64(i64 %48)
%50 = and i64 %49, 1
%PF29 = icmp eq i64 %50, 0
%ZF30 = icmp eq i64 %RBX, 0
%highbit31 = and i64 -9223372036854775808, %RBX
%SF32 = icmp ne i64 %highbit31, 0
%51 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %memload1, i64 8)
%OF = extractvalue { i64, i1 } %51, 1
store i64 %RBX, ptr %RBX-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.2
%52 = inttoptr i64 %arg1 to ptr
%EAX33 = call i32 (ptr, ptr, ...) @fprintf(ptr %52, ptr getelementptr inbounds ([1171 x i8], ptr @0, i32 0, i32 1135))
%RBX34 = load i64, ptr %RBX-SKT-LOC, align 1
%53 = inttoptr i64 %RBX34 to ptr
%memload35 = load i64, ptr %53, align 1
%RBX42 = add i64 %RBX34, 8
%54 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RBX34, i64 8)
%CF36 = extractvalue { i64, i1 } %54, 1
%55 = and i64 %RBX42, 255
%56 = call i64 @llvm.ctpop.i64(i64 %55)
%57 = and i64 %56, 1
%PF37 = icmp eq i64 %57, 0
%ZF38 = icmp eq i64 %RBX42, 0
%highbit39 = and i64 -9223372036854775808, %RBX42
%SF40 = icmp ne i64 %highbit39, 0
%58 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RBX34, i64 8)
%OF41 = extractvalue { i64, i1 } %58, 1
%59 = and i64 %memload35, %memload35
%highbit43 = and i64 -9223372036854775808, %59
%SF44 = icmp ne i64 %highbit43, 0
%ZF45 = icmp eq i64 %59, 0
%60 = and i64 %59, 255
%61 = call i64 @llvm.ctpop.i64(i64 %60)
%62 = and i64 %61, 1
%PF46 = icmp eq i64 %62, 0
%CmpZF_JNE = icmp eq i1 %ZF45, false
store i64 %RBX42, ptr %RBX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.2, label %bb.3
bb.3: ; preds = %bb.2, %entry
%63 = inttoptr i64 %arg1 to ptr
%EAX47 = call i32 @fputc(i32 10, ptr %63)
%64 = zext i32 26 to i64
%65 = zext i32 1 to i64
%66 = inttoptr i64 %arg1 to ptr
%RAX49 = call i64 @fwrite(ptr getelementptr inbounds ([1171 x i8], ptr @0, i32 0, i32 1140), i64 %64, i64 %65, ptr %66)
%67 = inttoptr i64 %arg1 to ptr
%EAX50 = call i32 @fputc(i32 32, ptr %67)
%68 = inttoptr i64 %memload to ptr
%memload51 = load i64, ptr %68, align 1
%69 = and i64 %memload51, %memload51
%highbit52 = and i64 -9223372036854775808, %69
%SF53 = icmp ne i64 %highbit52, 0
%ZF54 = icmp eq i64 %69, 0
%70 = and i64 %69, 255
%71 = call i64 @llvm.ctpop.i64(i64 %70)
%72 = and i64 %71, 1
%PF55 = icmp eq i64 %72, 0
%CmpZF_JE78 = icmp eq i1 %ZF54, true
br i1 %CmpZF_JE78, label %bb.6, label %bb.4
bb.4: ; preds = %bb.3
%R12 = add i64 %memload, 8
%73 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %memload, i64 8)
%CF56 = extractvalue { i64, i1 } %73, 1
%74 = and i64 %R12, 255
%75 = call i64 @llvm.ctpop.i64(i64 %74)
%76 = and i64 %75, 1
%PF57 = icmp eq i64 %76, 0
%ZF58 = icmp eq i64 %R12, 0
%highbit59 = and i64 -9223372036854775808, %R12
%SF60 = icmp ne i64 %highbit59, 0
%77 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %memload, i64 8)
%OF61 = extractvalue { i64, i1 } %77, 1
store i64 %R12, ptr %R12-SKT-LOC, align 1
br label %bb.5
bb.5: ; preds = %bb.4, %bb.5
%78 = inttoptr i64 %arg1 to ptr
%EAX63 = call i32 (ptr, ptr, ...) @fprintf(ptr %78, ptr getelementptr inbounds ([1171 x i8], ptr @0, i32 0, i32 1167))
%R1264 = load i64, ptr %R12-SKT-LOC, align 1
%79 = inttoptr i64 %R1264 to ptr
%memload65 = load i64, ptr %79, align 1
%R1272 = add i64 %R1264, 8
%80 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %R1264, i64 8)
%CF66 = extractvalue { i64, i1 } %80, 1
%81 = and i64 %R1272, 255
%82 = call i64 @llvm.ctpop.i64(i64 %81)
%83 = and i64 %82, 1
%PF67 = icmp eq i64 %83, 0
%ZF68 = icmp eq i64 %R1272, 0
%highbit69 = and i64 -9223372036854775808, %R1272
%SF70 = icmp ne i64 %highbit69, 0
%84 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %R1264, i64 8)
%OF71 = extractvalue { i64, i1 } %84, 1
%85 = and i64 %memload65, %memload65
%highbit73 = and i64 -9223372036854775808, %85
%SF74 = icmp ne i64 %highbit73, 0
%ZF75 = icmp eq i64 %85, 0
%86 = and i64 %85, 255
%87 = call i64 @llvm.ctpop.i64(i64 %86)
%88 = and i64 %87, 1
%PF76 = icmp eq i64 %88, 0
%CmpZF_JNE79 = icmp eq i1 %ZF75, false
store i64 %R1272, ptr %R12-SKT-LOC, align 1
br i1 %CmpZF_JNE79, label %bb.5, label %bb.6
bb.6: ; preds = %bb.5, %bb.3
%89 = inttoptr i64 %arg1 to ptr
%EAX77 = tail call i32 @fputc(i32 10, ptr %89)
ret i32 %EAX77
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/sumatrapdf/ext/freetype/src/tools/ftrandom/extr_ftrandom.c_usage.c'
source_filename = "AnghaBench/sumatrapdf/ext/freetype/src/tools/ftrandom/extr_ftrandom.c_usage.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@default_dir_list = common local_unnamed_addr global ptr null, align 8
@default_ext_list = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [93 x i8] c"%s [options] -- Generate random erroneous fonts\0A and attempt to parse them with FreeType.\0A\0A\00", align 1
@.str.1 = private unnamed_addr constant [77 x i8] c" --all All non-directory files are assumed to be fonts.\0A\00", align 1
@.str.2 = private unnamed_addr constant [79 x i8] c" --check-outlines Make sure we can parse the outlines of each glyph.\0A\00", align 1
@.str.3 = private unnamed_addr constant [127 x i8] c" --dir <path> Append <path> to list of font search directories\0A (no recursive search).\0A\00", align 1
@.str.4 = private unnamed_addr constant [118 x i8] c" --error-count <cnt> Introduce <cnt> single byte errors into each font\0A (default: 1)\0A\00", align 1
@.str.5 = private unnamed_addr constant [131 x i8] c" --error-fraction <frac> Introduce <frac>*filesize single byte errors\0A into each font (default: 0.0).\0A\00", align 1
@.str.6 = private unnamed_addr constant [78 x i8] c" --ext <ext> Add <ext> to list of extensions indicating fonts.\0A\00", align 1
@.str.7 = private unnamed_addr constant [40 x i8] c" --help Print this.\0A\00", align 1
@.str.8 = private unnamed_addr constant [46 x i8] c" --nohints Turn off hinting.\0A\00", align 1
@.str.9 = private unnamed_addr constant [61 x i8] c" --rasterize Attempt to rasterize each glyph.\0A\00", align 1
@.str.10 = private unnamed_addr constant [117 x i8] c" --results <path> Place the created test fonts into <path>\0A (default: `results')\0A\00", align 1
@.str.11 = private unnamed_addr constant [67 x i8] c" --size <float> Use the given font size for the tests.\0A\00", align 1
@.str.12 = private unnamed_addr constant [75 x i8] c" --test <file> Run a single test on an already existing file.\0A\00", align 1
@.str.14 = private unnamed_addr constant [26 x i8] c"Default font extensions:\0A\00", align 1
@.str.16 = private unnamed_addr constant [5 x i8] c" .%s\00", align 1
@.str.17 = private unnamed_addr constant [27 x i8] c"Default font directories:\0A\00", align 1
@.str.18 = private unnamed_addr constant [4 x i8] c" %s\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @usage], section "llvm.metadata"
; Function Attrs: nofree nounwind ssp uwtable(sync)
define internal void @usage(ptr nocapture noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr @default_dir_list, align 8, !tbaa !6
%4 = load ptr, ptr @default_ext_list, align 8, !tbaa !6
%5 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %0, ptr noundef nonnull @.str, ptr noundef %1)
%6 = tail call i64 @fwrite(ptr nonnull @.str.1, i64 76, i64 1, ptr %0)
%7 = tail call i64 @fwrite(ptr nonnull @.str.2, i64 78, i64 1, ptr %0)
%8 = tail call i64 @fwrite(ptr nonnull @.str.3, i64 126, i64 1, ptr %0)
%9 = tail call i64 @fwrite(ptr nonnull @.str.4, i64 117, i64 1, ptr %0)
%10 = tail call i64 @fwrite(ptr nonnull @.str.5, i64 130, i64 1, ptr %0)
%11 = tail call i64 @fwrite(ptr nonnull @.str.6, i64 77, i64 1, ptr %0)
%12 = tail call i64 @fwrite(ptr nonnull @.str.7, i64 39, i64 1, ptr %0)
%13 = tail call i64 @fwrite(ptr nonnull @.str.8, i64 45, i64 1, ptr %0)
%14 = tail call i64 @fwrite(ptr nonnull @.str.9, i64 60, i64 1, ptr %0)
%15 = tail call i64 @fwrite(ptr nonnull @.str.10, i64 116, i64 1, ptr %0)
%16 = tail call i64 @fwrite(ptr nonnull @.str.11, i64 66, i64 1, ptr %0)
%17 = tail call i64 @fwrite(ptr nonnull @.str.12, i64 74, i64 1, ptr %0)
%18 = tail call i32 @fputc(i32 10, ptr %0)
%19 = tail call i64 @fwrite(ptr nonnull @.str.14, i64 25, i64 1, ptr %0)
%20 = tail call i32 @fputc(i32 32, ptr %0)
%21 = load ptr, ptr %4, align 8, !tbaa !6
%22 = icmp eq ptr %21, null
br i1 %22, label %30, label %23
23: ; preds = %2, %23
%24 = phi ptr [ %28, %23 ], [ %21, %2 ]
%25 = phi ptr [ %26, %23 ], [ %4, %2 ]
%26 = getelementptr inbounds i8, ptr %25, i64 8
%27 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %0, ptr noundef nonnull @.str.16, ptr noundef nonnull %24)
%28 = load ptr, ptr %26, align 8, !tbaa !6
%29 = icmp eq ptr %28, null
br i1 %29, label %30, label %23, !llvm.loop !10
30: ; preds = %23, %2
%31 = tail call i32 @fputc(i32 10, ptr %0)
%32 = tail call i64 @fwrite(ptr nonnull @.str.17, i64 26, i64 1, ptr %0)
%33 = tail call i32 @fputc(i32 32, ptr %0)
%34 = load ptr, ptr %3, align 8, !tbaa !6
%35 = icmp eq ptr %34, null
br i1 %35, label %43, label %36
36: ; preds = %30, %36
%37 = phi ptr [ %41, %36 ], [ %34, %30 ]
%38 = phi ptr [ %39, %36 ], [ %3, %30 ]
%39 = getelementptr inbounds i8, ptr %38, i64 8
%40 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %0, ptr noundef nonnull @.str.18, ptr noundef nonnull %37)
%41 = load ptr, ptr %39, align 8, !tbaa !6
%42 = icmp eq ptr %41, null
br i1 %42, label %43, label %36, !llvm.loop !12
43: ; preds = %36, %30
%44 = tail call i32 @fputc(i32 10, ptr %0)
ret void
}
; Function Attrs: nofree nounwind
declare noundef i32 @fprintf(ptr nocapture noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i64 @fwrite(ptr nocapture noundef, i64 noundef, i64 noundef, ptr nocapture noundef) local_unnamed_addr #2
; Function Attrs: nofree nounwind
declare noundef i32 @fputc(i32 noundef, ptr nocapture noundef) local_unnamed_addr #2
attributes #0 = { nofree nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nofree nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
| sumatrapdf_ext_freetype_src_tools_ftrandom_extr_ftrandom.c_usage |
; ModuleID = 'fastsocket_kernel_drivers_misc_sgi-gru_extr_gruhandles.h_get_cch.so'
source_filename = "fastsocket_kernel_drivers_misc_sgi-gru_extr_gruhandles.h_get_cch.so"
@GRU_CCH_BASE = common dso_local global i32 0, align 4
@GRU_HANDLE_STRIDE = common dso_local global i32 0, align 4
define dso_local i64 @get_cch(i64 %arg1, i32 %arg2) {
entry:
%memload = load i64, ptr @GRU_CCH_BASE, align 1
%0 = trunc i64 %memload to i32
%RCX = sext i32 %0 to i64
%RCX1 = add nsw i64 %RCX, %arg1
%highbit = and i64 -9223372036854775808, %RCX1
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %RCX1, 0
%memload2 = load i64, ptr @GRU_HANDLE_STRIDE, align 1
%1 = trunc i64 %memload2 to i32
%RDX = sext i32 %1 to i64
%RAX = sext i32 %arg2 to i64
%RAX3 = mul nsw i64 %RAX, %RDX
%RAX7 = add nsw i64 %RAX3, %RCX1
%highbit4 = and i64 -9223372036854775808, %RAX7
%SF5 = icmp ne i64 %highbit4, 0
%ZF6 = icmp eq i64 %RAX7, 0
ret i64 %RAX7
}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/misc/sgi-gru/extr_gruhandles.h_get_cch.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/misc/sgi-gru/extr_gruhandles.h_get_cch.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GRU_CCH_BASE = common local_unnamed_addr global i32 0, align 4
@GRU_HANDLE_STRIDE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @get_cch], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal ptr @get_cch(ptr noundef readnone %0, i32 noundef %1) #0 {
%3 = load i32, ptr @GRU_CCH_BASE, align 4, !tbaa !6
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, ptr %0, i64 %4
%6 = load i32, ptr @GRU_HANDLE_STRIDE, align 4, !tbaa !6
%7 = mul nsw i32 %6, %1
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, ptr %5, i64 %8
ret ptr %9
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_misc_sgi-gru_extr_gruhandles.h_get_cch |
; ModuleID = 'lab_engine_code_qcommon_extr_q_math.c_ClampChar.so'
source_filename = "lab_engine_code_qcommon_extr_q_math.c_ClampChar.so"
define dso_local i32 @ClampChar(i32 %arg1) {
entry:
%0 = sub i32 %arg1, 127
%1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %arg1, i32 127)
%CF = extractvalue { i32, i1 } %1, 1
%ZF = icmp eq i32 %0, 0
%highbit = and i32 -2147483648, %0
%SF = icmp ne i32 %highbit, 0
%2 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %arg1, i32 127)
%OF = extractvalue { i32, i1 } %2, 1
%3 = and i32 %0, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
%Cond_CMOVL = icmp ne i1 %SF, %OF
%CMOV = select i1 %Cond_CMOVL, i32 %arg1, i32 127
%6 = sub i32 %CMOV, -127
%7 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %CMOV, i32 -127)
%CF1 = extractvalue { i32, i1 } %7, 1
%ZF2 = icmp eq i32 %6, 0
%highbit3 = and i32 -2147483648, %6
%SF4 = icmp ne i32 %highbit3, 0
%8 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %CMOV, i32 -127)
%OF5 = extractvalue { i32, i1 } %8, 1
%9 = and i32 %6, 255
%10 = call i32 @llvm.ctpop.i32(i32 %9)
%11 = and i32 %10, 1
%PF6 = icmp eq i32 %11, 0
%Cond_CMOVGE = icmp eq i1 %SF4, %OF5
%CMOV7 = select i1 %Cond_CMOVGE, i32 %CMOV, i32 -128
ret i32 %CMOV7
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/lab/engine/code/qcommon/extr_q_math.c_ClampChar.c'
source_filename = "AnghaBench/lab/engine/code/qcommon/extr_q_math.c_ClampChar.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define signext i8 @ClampChar(i32 noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @llvm.smin.i32(i32 %0, i32 127)
%3 = tail call i32 @llvm.smax.i32(i32 %2, i32 -128)
%4 = trunc nsw i32 %3 to i8
ret i8 %4
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #1
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| lab_engine_code_qcommon_extr_q_math.c_ClampChar |
; ModuleID = 'linux_drivers_usb_gadget_udc_extr_net2272.c_net2272_pci_register.so'
source_filename = "linux_drivers_usb_gadget_udc_extr_net2272.c_net2272_pci_register.so"
define dso_local i32 @net2272_pci_register() {
entry:
ret i32 0
}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/gadget/udc/extr_net2272.c_net2272_pci_register.c'
source_filename = "AnghaBench/linux/drivers/usb/gadget/udc/extr_net2272.c_net2272_pci_register.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @net2272_pci_register], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @net2272_pci_register() #0 {
ret i32 0
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_usb_gadget_udc_extr_net2272.c_net2272_pci_register |
; ModuleID = 'reactos_modules_rostests_tests_edit_extr_utils.c_strcpyw_.so'
source_filename = "reactos_modules_rostests_tests_edit_extr_utils.c_strcpyw_.so"
define dso_local i64 @strcpyw_(i64 %arg1, i64 %arg2) {
entry:
%RAX-SKT-LOC = alloca i64, align 8
%0 = zext i32 0 to i64
store i64 %0, ptr %RAX-SKT-LOC, align 1
br label %bb.1
bb.1: ; preds = %entry, %bb.1
%RAX = load i64, ptr %RAX-SKT-LOC, align 1
%memref-basereg = add i64 %arg2, %RAX
%1 = inttoptr i64 %memref-basereg to ptr
%memload = load i32, ptr %1, align 1
%memref-basereg1 = add i64 %arg1, %RAX
%2 = inttoptr i64 %memref-basereg1 to ptr
store i32 %memload, ptr %2, align 1
%RAX2 = add i64 %RAX, 4
%3 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RAX, i64 4)
%CF = extractvalue { i64, i1 } %3, 1
%4 = and i64 %RAX2, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
%ZF = icmp eq i64 %RAX2, 0
%highbit = and i64 -9223372036854775808, %RAX2
%SF = icmp ne i64 %highbit, 0
%7 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RAX, i64 4)
%OF = extractvalue { i64, i1 } %7, 1
%8 = and i32 %memload, %memload
%highbit3 = and i32 -2147483648, %8
%SF4 = icmp ne i32 %highbit3, 0
%ZF5 = icmp eq i32 %8, 0
%9 = and i32 %8, 255
%10 = call i32 @llvm.ctpop.i32(i32 %9)
%11 = and i32 %10, 1
%PF6 = icmp eq i32 %11, 0
%CmpZF_JNE = icmp eq i1 %ZF5, false
store i64 %RAX2, ptr %RAX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.1, label %bb.2
bb.2: ; preds = %bb.1
%ld-stk-prom = load i64, ptr %RAX-SKT-LOC, align 8
ret i64 %ld-stk-prom
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/reactos/modules/rostests/tests/edit/extr_utils.c_strcpyw_.c'
source_filename = "AnghaBench/reactos/modules/rostests/tests/edit/extr_utils.c_strcpyw_.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync)
define i32 @strcpyw_(ptr nocapture noundef writeonly %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
br label %3
3: ; preds = %3, %2
%4 = phi ptr [ %0, %2 ], [ %8, %3 ]
%5 = phi ptr [ %1, %2 ], [ %6, %3 ]
%6 = getelementptr inbounds i8, ptr %5, i64 4
%7 = load i32, ptr %5, align 4, !tbaa !6
%8 = getelementptr inbounds i8, ptr %4, i64 4
store i32 %7, ptr %4, align 4, !tbaa !6
%9 = icmp eq i32 %7, 0
br i1 %9, label %10, label %3, !llvm.loop !10
10: ; preds = %3
ret i32 undef
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| reactos_modules_rostests_tests_edit_extr_utils.c_strcpyw_ |
; ModuleID = 'h2o_deps_picotls_deps_cifra_src_extr_curve25519.tweetnacl.c_sel25519.so'
source_filename = "h2o_deps_picotls_deps_cifra_src_extr_curve25519.tweetnacl.c_sel25519.so"
define dso_local i64 @sel25519(i64 %arg1, i64 %arg2, i32 %arg3) {
entry:
%RAX-SKT-LOC158 = alloca i64, align 8
%RAX-SKT-LOC = alloca i64, align 8
%CF = icmp ne i32 0, 0
%EDX = sub i32 0, %arg3
%ZF = icmp eq i32 %EDX, 0
%highbit = and i32 -2147483648, %EDX
%SF = icmp ne i32 %highbit, 0
%0 = and i32 %EDX, 255
%1 = call i32 @llvm.ctpop.i32(i32 %0)
%2 = and i32 %1, 1
%PF = icmp eq i32 %2, 0
%memref-disp = add i64 %arg2, 64
%3 = sub i64 %memref-disp, %arg1
%4 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memref-disp, i64 %arg1)
%CF1 = extractvalue { i64, i1 } %4, 1
%ZF2 = icmp eq i64 %3, 0
%highbit3 = and i64 -9223372036854775808, %3
%SF4 = icmp ne i64 %highbit3, 0
%5 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memref-disp, i64 %arg1)
%OF = extractvalue { i64, i1 } %5, 1
%6 = and i64 %3, 255
%7 = call i64 @llvm.ctpop.i64(i64 %6)
%8 = and i64 %7, 1
%PF5 = icmp eq i64 %8, 0
store i64 %memref-disp, ptr %RAX-SKT-LOC158, align 1
%CFCmp_JBE = icmp eq i1 %CF1, true
%ZFCmp_JBE = icmp eq i1 %ZF2, true
%CFAndZF_JBE = or i1 %ZFCmp_JBE, %CFCmp_JBE
br i1 %CFAndZF_JBE, label %bb.5, label %bb.1
bb.1: ; preds = %entry
%memref-disp6 = add i64 %arg1, 64
%9 = sub i64 %memref-disp6, %arg2
%10 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memref-disp6, i64 %arg2)
%CF7 = extractvalue { i64, i1 } %10, 1
%ZF8 = icmp eq i64 %9, 0
%highbit9 = and i64 -9223372036854775808, %9
%SF10 = icmp ne i64 %highbit9, 0
%11 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memref-disp6, i64 %arg2)
%OF11 = extractvalue { i64, i1 } %11, 1
%12 = and i64 %9, 255
%13 = call i64 @llvm.ctpop.i64(i64 %12)
%14 = and i64 %13, 1
%PF12 = icmp eq i64 %14, 0
store i64 %memref-disp6, ptr %RAX-SKT-LOC158, align 1
%CFCmp_JBE160 = icmp eq i1 %CF7, true
%ZFCmp_JBE161 = icmp eq i1 %ZF8, true
%CFAndZF_JBE162 = or i1 %ZFCmp_JBE161, %CFCmp_JBE160
br i1 %CFAndZF_JBE162, label %bb.5, label %bb.2
bb.2: ; preds = %bb.1
%15 = zext i32 0 to i64
store i64 %15, ptr %RAX-SKT-LOC, align 1
br label %bb.3
bb.3: ; preds = %bb.2, %bb.3
%RAX = load i64, ptr %RAX-SKT-LOC, align 1
%memref-idxreg = mul i64 4, %RAX
%memref-basereg = add i64 %arg1, %memref-idxreg
%16 = inttoptr i64 %memref-basereg to ptr
%memload = load i32, ptr %16, align 1
%memref-idxreg13 = mul i64 4, %RAX
%memref-basereg14 = add i64 %arg2, %memref-idxreg13
%17 = inttoptr i64 %memref-basereg14 to ptr
%memload15 = load i32, ptr %17, align 1
%ECX = xor i32 %memload15, %memload
%highbit16 = and i32 -2147483648, %ECX
%SF17 = icmp ne i32 %highbit16, 0
%ZF18 = icmp eq i32 %ECX, 0
%18 = and i32 %ECX, 255
%19 = call i32 @llvm.ctpop.i32(i32 %18)
%20 = and i32 %19, 1
%PF19 = icmp eq i32 %20, 0
%ECX24 = and i32 %ECX, %EDX
%highbit20 = and i32 -2147483648, %ECX24
%SF21 = icmp ne i32 %highbit20, 0
%ZF22 = icmp eq i32 %ECX24, 0
%21 = and i32 %ECX24, 255
%22 = call i32 @llvm.ctpop.i32(i32 %21)
%23 = and i32 %22, 1
%PF23 = icmp eq i32 %23, 0
%R8D = xor i32 %memload, %ECX24
%highbit25 = and i32 -2147483648, %R8D
%SF26 = icmp ne i32 %highbit25, 0
%ZF27 = icmp eq i32 %R8D, 0
%24 = and i32 %R8D, 255
%25 = call i32 @llvm.ctpop.i32(i32 %24)
%26 = and i32 %25, 1
%PF28 = icmp eq i32 %26, 0
%memref-idxreg29 = mul i64 4, %RAX
%memref-basereg30 = add i64 %arg1, %memref-idxreg29
%27 = inttoptr i64 %memref-basereg30 to ptr
store i32 %R8D, ptr %27, align 1
%memref-idxreg31 = mul i64 4, %RAX
%memref-basereg32 = add i64 %arg2, %memref-idxreg31
%28 = inttoptr i64 %memref-basereg32 to ptr
%29 = load i32, ptr %28, align 1
%30 = xor i32 %29, %ECX24
%31 = and i32 %30, 255
%32 = call i32 @llvm.ctpop.i32(i32 %31)
%33 = and i32 %32, 1
%PF33 = icmp eq i32 %33, 0
store i32 %30, ptr %28, align 1
%memref-idxreg34 = mul i64 4, %RAX
%memref-basereg35 = add i64 %arg1, %memref-idxreg34
%memref-disp36 = add i64 %memref-basereg35, 4
%34 = inttoptr i64 %memref-disp36 to ptr
%memload37 = load i32, ptr %34, align 1
%memref-idxreg38 = mul i64 4, %RAX
%memref-basereg39 = add i64 %arg2, %memref-idxreg38
%memref-disp40 = add i64 %memref-basereg39, 4
%35 = inttoptr i64 %memref-disp40 to ptr
%memload41 = load i32, ptr %35, align 1
%ECX46 = xor i32 %memload41, %memload37
%highbit42 = and i32 -2147483648, %ECX46
%SF43 = icmp ne i32 %highbit42, 0
%ZF44 = icmp eq i32 %ECX46, 0
%36 = and i32 %ECX46, 255
%37 = call i32 @llvm.ctpop.i32(i32 %36)
%38 = and i32 %37, 1
%PF45 = icmp eq i32 %38, 0
%ECX51 = and i32 %ECX46, %EDX
%highbit47 = and i32 -2147483648, %ECX51
%SF48 = icmp ne i32 %highbit47, 0
%ZF49 = icmp eq i32 %ECX51, 0
%39 = and i32 %ECX51, 255
%40 = call i32 @llvm.ctpop.i32(i32 %39)
%41 = and i32 %40, 1
%PF50 = icmp eq i32 %41, 0
%R8D56 = xor i32 %memload37, %ECX51
%highbit52 = and i32 -2147483648, %R8D56
%SF53 = icmp ne i32 %highbit52, 0
%ZF54 = icmp eq i32 %R8D56, 0
%42 = and i32 %R8D56, 255
%43 = call i32 @llvm.ctpop.i32(i32 %42)
%44 = and i32 %43, 1
%PF55 = icmp eq i32 %44, 0
%memref-idxreg57 = mul i64 4, %RAX
%memref-basereg58 = add i64 %arg1, %memref-idxreg57
%memref-disp59 = add i64 %memref-basereg58, 4
%45 = inttoptr i64 %memref-disp59 to ptr
store i32 %R8D56, ptr %45, align 1
%memref-idxreg60 = mul i64 4, %RAX
%memref-basereg61 = add i64 %arg2, %memref-idxreg60
%memref-disp62 = add i64 %memref-basereg61, 4
%46 = inttoptr i64 %memref-disp62 to ptr
%47 = load i32, ptr %46, align 1
%48 = xor i32 %47, %ECX51
%49 = and i32 %48, 255
%50 = call i32 @llvm.ctpop.i32(i32 %49)
%51 = and i32 %50, 1
%PF63 = icmp eq i32 %51, 0
store i32 %48, ptr %46, align 1
%RAX70 = add i64 %RAX, 2
%52 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RAX, i64 2)
%CF64 = extractvalue { i64, i1 } %52, 1
%53 = and i64 %RAX70, 255
%54 = call i64 @llvm.ctpop.i64(i64 %53)
%55 = and i64 %54, 1
%PF65 = icmp eq i64 %55, 0
%ZF66 = icmp eq i64 %RAX70, 0
%highbit67 = and i64 -9223372036854775808, %RAX70
%SF68 = icmp ne i64 %highbit67, 0
%56 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RAX, i64 2)
%OF69 = extractvalue { i64, i1 } %56, 1
%57 = sub i64 %RAX70, 16
%58 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RAX70, i64 16)
%CF71 = extractvalue { i64, i1 } %58, 1
%ZF72 = icmp eq i64 %57, 0
%highbit73 = and i64 -9223372036854775808, %57
%SF74 = icmp ne i64 %highbit73, 0
%59 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RAX70, i64 16)
%OF75 = extractvalue { i64, i1 } %59, 1
%60 = and i64 %57, 255
%61 = call i64 @llvm.ctpop.i64(i64 %60)
%62 = and i64 %61, 1
%PF76 = icmp eq i64 %62, 0
%CmpZF_JNE = icmp eq i1 %ZF72, false
store i64 %RAX70, ptr %RAX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.3, label %bb.4
bb.4: ; preds = %bb.3
%ld-stk-prom = load i64, ptr %RAX-SKT-LOC, align 8
br label %UnifiedReturnBlock
bb.5: ; preds = %bb.1, %entry
%XMM0 = bitcast i32 %EDX to float
%63 = insertelement <4 x float> zeroinitializer, float %XMM0, i64 0
%64 = bitcast <4 x float> %63 to <4 x i32>
%65 = extractelement <4 x i32> %64, i32 0
%66 = insertelement <4 x i32> zeroinitializer, i32 %65, i32 0
%67 = extractelement <4 x i32> %64, i32 0
%68 = insertelement <4 x i32> %66, i32 %67, i32 1
%69 = extractelement <4 x i32> %64, i32 0
%70 = insertelement <4 x i32> %68, i32 %69, i32 2
%71 = extractelement <4 x i32> %64, i32 0
%XMM077 = insertelement <4 x i32> %70, i32 %71, i32 3
%72 = inttoptr i64 %arg1 to ptr
%memload78 = load <4 x i32>, ptr %72, align 1
%73 = inttoptr i64 %arg2 to ptr
%memload79 = load <4 x i32>, ptr %73, align 1
%bitwise_operand = bitcast <4 x i32> %memload79 to i128
%bitwise_operand80 = bitcast <4 x i32> %memload78 to i128
%xor_result = xor i128 %bitwise_operand, %bitwise_operand80
%bitcast_result = bitcast i128 %xor_result to <4 x i32>
%bitwise_operand81 = bitcast <4 x i32> %bitcast_result to i128
%bitwise_operand82 = bitcast <4 x i32> %XMM077 to i128
%and_result = and i128 %bitwise_operand81, %bitwise_operand82
%bitcast_result83 = bitcast i128 %and_result to <4 x i32>
%bitwise_operand84 = bitcast <4 x i32> %memload78 to i128
%bitwise_operand85 = bitcast <4 x i32> %bitcast_result83 to i128
%xor_result86 = xor i128 %bitwise_operand84, %bitwise_operand85
%bitcast_result87 = bitcast i128 %xor_result86 to <4 x i32>
%74 = inttoptr i64 %arg1 to ptr
store <4 x i32> %bitcast_result87, ptr %74, align 1
%bitwise_operand88 = bitcast <4 x i32> %bitcast_result83 to i128
%bitwise_operand89 = bitcast <4 x i32> %memload79 to i128
%xor_result90 = xor i128 %bitwise_operand88, %bitwise_operand89
%bitcast_result91 = bitcast i128 %xor_result90 to <4 x i32>
%75 = inttoptr i64 %arg2 to ptr
store <4 x i32> %bitcast_result91, ptr %75, align 1
%memref-disp92 = add i64 %arg1, 16
%76 = inttoptr i64 %memref-disp92 to ptr
%memload93 = load <4 x i32>, ptr %76, align 1
%memref-disp94 = add i64 %arg2, 16
%77 = inttoptr i64 %memref-disp94 to ptr
%memload95 = load <4 x i32>, ptr %77, align 1
%bitwise_operand96 = bitcast <4 x i32> %memload95 to i128
%bitwise_operand97 = bitcast <4 x i32> %memload93 to i128
%xor_result98 = xor i128 %bitwise_operand96, %bitwise_operand97
%bitcast_result99 = bitcast i128 %xor_result98 to <4 x i32>
%bitwise_operand100 = bitcast <4 x i32> %bitcast_result99 to i128
%bitwise_operand101 = bitcast <4 x i32> %XMM077 to i128
%and_result102 = and i128 %bitwise_operand100, %bitwise_operand101
%bitcast_result103 = bitcast i128 %and_result102 to <4 x i32>
%bitwise_operand104 = bitcast <4 x i32> %memload93 to i128
%bitwise_operand105 = bitcast <4 x i32> %bitcast_result103 to i128
%xor_result106 = xor i128 %bitwise_operand104, %bitwise_operand105
%bitcast_result107 = bitcast i128 %xor_result106 to <4 x i32>
%memref-disp108 = add i64 %arg1, 16
%78 = inttoptr i64 %memref-disp108 to ptr
store <4 x i32> %bitcast_result107, ptr %78, align 1
%bitwise_operand109 = bitcast <4 x i32> %bitcast_result103 to i128
%bitwise_operand110 = bitcast <4 x i32> %memload95 to i128
%xor_result111 = xor i128 %bitwise_operand109, %bitwise_operand110
%bitcast_result112 = bitcast i128 %xor_result111 to <4 x i32>
%memref-disp113 = add i64 %arg2, 16
%79 = inttoptr i64 %memref-disp113 to ptr
store <4 x i32> %bitcast_result112, ptr %79, align 1
%memref-disp114 = add i64 %arg1, 32
%80 = inttoptr i64 %memref-disp114 to ptr
%memload115 = load <4 x i32>, ptr %80, align 1
%memref-disp116 = add i64 %arg2, 32
%81 = inttoptr i64 %memref-disp116 to ptr
%memload117 = load <4 x i32>, ptr %81, align 1
%bitwise_operand118 = bitcast <4 x i32> %memload117 to i128
%bitwise_operand119 = bitcast <4 x i32> %memload115 to i128
%xor_result120 = xor i128 %bitwise_operand118, %bitwise_operand119
%bitcast_result121 = bitcast i128 %xor_result120 to <4 x i32>
%bitwise_operand122 = bitcast <4 x i32> %bitcast_result121 to i128
%bitwise_operand123 = bitcast <4 x i32> %XMM077 to i128
%and_result124 = and i128 %bitwise_operand122, %bitwise_operand123
%bitcast_result125 = bitcast i128 %and_result124 to <4 x i32>
%bitwise_operand126 = bitcast <4 x i32> %memload115 to i128
%bitwise_operand127 = bitcast <4 x i32> %bitcast_result125 to i128
%xor_result128 = xor i128 %bitwise_operand126, %bitwise_operand127
%bitcast_result129 = bitcast i128 %xor_result128 to <4 x i32>
%memref-disp130 = add i64 %arg1, 32
%82 = inttoptr i64 %memref-disp130 to ptr
store <4 x i32> %bitcast_result129, ptr %82, align 1
%bitwise_operand131 = bitcast <4 x i32> %bitcast_result125 to i128
%bitwise_operand132 = bitcast <4 x i32> %memload117 to i128
%xor_result133 = xor i128 %bitwise_operand131, %bitwise_operand132
%bitcast_result134 = bitcast i128 %xor_result133 to <4 x i32>
%memref-disp135 = add i64 %arg2, 32
%83 = inttoptr i64 %memref-disp135 to ptr
store <4 x i32> %bitcast_result134, ptr %83, align 1
%memref-disp136 = add i64 %arg1, 48
%84 = inttoptr i64 %memref-disp136 to ptr
%memload137 = load <4 x i32>, ptr %84, align 1
%memref-disp138 = add i64 %arg2, 48
%85 = inttoptr i64 %memref-disp138 to ptr
%memload139 = load <4 x i32>, ptr %85, align 1
%bitwise_operand140 = bitcast <4 x i32> %memload139 to i128
%bitwise_operand141 = bitcast <4 x i32> %memload137 to i128
%xor_result142 = xor i128 %bitwise_operand140, %bitwise_operand141
%bitcast_result143 = bitcast i128 %xor_result142 to <4 x i32>
%bitwise_operand144 = bitcast <4 x i32> %bitcast_result143 to i128
%bitwise_operand145 = bitcast <4 x i32> %XMM077 to i128
%and_result146 = and i128 %bitwise_operand144, %bitwise_operand145
%bitcast_result147 = bitcast i128 %and_result146 to <4 x i32>
%bitwise_operand148 = bitcast <4 x i32> %memload137 to i128
%bitwise_operand149 = bitcast <4 x i32> %bitcast_result147 to i128
%xor_result150 = xor i128 %bitwise_operand148, %bitwise_operand149
%bitcast_result151 = bitcast i128 %xor_result150 to <4 x i32>
%memref-disp152 = add i64 %arg1, 48
%86 = inttoptr i64 %memref-disp152 to ptr
store <4 x i32> %bitcast_result151, ptr %86, align 1
%bitwise_operand153 = bitcast <4 x i32> %bitcast_result147 to i128
%bitwise_operand154 = bitcast <4 x i32> %memload139 to i128
%xor_result155 = xor i128 %bitwise_operand153, %bitwise_operand154
%bitcast_result156 = bitcast i128 %xor_result155 to <4 x i32>
%memref-disp157 = add i64 %arg2, 48
%87 = inttoptr i64 %memref-disp157 to ptr
store <4 x i32> %bitcast_result156, ptr %87, align 1
%RAX159 = load i64, ptr %RAX-SKT-LOC158, align 1
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.5, %bb.4
%UnifiedRetVal = phi i64 [ %ld-stk-prom, %bb.4 ], [ %RAX159, %bb.5 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/h2o/deps/picotls/deps/cifra/src/extr_curve25519.tweetnacl.c_sel25519.c'
source_filename = "AnghaBench/h2o/deps/picotls/deps/cifra/src/extr_curve25519.tweetnacl.c_sel25519.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @sel25519], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(argmem: readwrite) uwtable(sync)
define internal void @sel25519(ptr nocapture noundef %0, ptr nocapture noundef %1, i32 noundef %2) #0 {
%4 = sub i32 0, %2
%5 = getelementptr i8, ptr %0, i64 64
%6 = getelementptr i8, ptr %1, i64 64
%7 = icmp ugt ptr %6, %0
%8 = icmp ugt ptr %5, %1
%9 = and i1 %7, %8
br i1 %9, label %47, label %10
10: ; preds = %3
%11 = insertelement <4 x i32> poison, i32 %4, i64 0
%12 = shufflevector <4 x i32> %11, <4 x i32> poison, <4 x i32> zeroinitializer
%13 = getelementptr inbounds i8, ptr %0, i64 16
%14 = load <4 x i32>, ptr %0, align 4, !tbaa !6, !alias.scope !10, !noalias !13
%15 = load <4 x i32>, ptr %13, align 4, !tbaa !6, !alias.scope !10, !noalias !13
%16 = getelementptr inbounds i8, ptr %1, i64 16
%17 = load <4 x i32>, ptr %1, align 4, !tbaa !6, !alias.scope !13
%18 = load <4 x i32>, ptr %16, align 4, !tbaa !6, !alias.scope !13
%19 = xor <4 x i32> %17, %14
%20 = xor <4 x i32> %18, %15
%21 = and <4 x i32> %19, %12
%22 = and <4 x i32> %20, %12
%23 = xor <4 x i32> %21, %14
%24 = xor <4 x i32> %22, %15
store <4 x i32> %23, ptr %0, align 4, !tbaa !6, !alias.scope !10, !noalias !13
store <4 x i32> %24, ptr %13, align 4, !tbaa !6, !alias.scope !10, !noalias !13
%25 = load <4 x i32>, ptr %1, align 4, !tbaa !6, !alias.scope !13
%26 = load <4 x i32>, ptr %16, align 4, !tbaa !6, !alias.scope !13
%27 = xor <4 x i32> %25, %21
%28 = xor <4 x i32> %26, %22
store <4 x i32> %27, ptr %1, align 4, !tbaa !6, !alias.scope !13
store <4 x i32> %28, ptr %16, align 4, !tbaa !6, !alias.scope !13
%29 = getelementptr inbounds i8, ptr %0, i64 32
%30 = getelementptr inbounds i8, ptr %0, i64 48
%31 = load <4 x i32>, ptr %29, align 4, !tbaa !6, !alias.scope !10, !noalias !13
%32 = load <4 x i32>, ptr %30, align 4, !tbaa !6, !alias.scope !10, !noalias !13
%33 = getelementptr inbounds i8, ptr %1, i64 32
%34 = getelementptr inbounds i8, ptr %1, i64 48
%35 = load <4 x i32>, ptr %33, align 4, !tbaa !6, !alias.scope !13
%36 = load <4 x i32>, ptr %34, align 4, !tbaa !6, !alias.scope !13
%37 = xor <4 x i32> %35, %31
%38 = xor <4 x i32> %36, %32
%39 = and <4 x i32> %37, %12
%40 = and <4 x i32> %38, %12
%41 = xor <4 x i32> %39, %31
%42 = xor <4 x i32> %40, %32
store <4 x i32> %41, ptr %29, align 4, !tbaa !6, !alias.scope !10, !noalias !13
store <4 x i32> %42, ptr %30, align 4, !tbaa !6, !alias.scope !10, !noalias !13
%43 = load <4 x i32>, ptr %33, align 4, !tbaa !6, !alias.scope !13
%44 = load <4 x i32>, ptr %34, align 4, !tbaa !6, !alias.scope !13
%45 = xor <4 x i32> %43, %39
%46 = xor <4 x i32> %44, %40
store <4 x i32> %45, ptr %33, align 4, !tbaa !6, !alias.scope !13
store <4 x i32> %46, ptr %34, align 4, !tbaa !6, !alias.scope !13
br label %60
47: ; preds = %3, %47
%48 = phi i64 [ %58, %47 ], [ 0, %3 ]
%49 = getelementptr inbounds i32, ptr %0, i64 %48
%50 = load i32, ptr %49, align 4, !tbaa !6
%51 = getelementptr inbounds i32, ptr %1, i64 %48
%52 = load i32, ptr %51, align 4, !tbaa !6
%53 = xor i32 %52, %50
%54 = and i32 %53, %4
%55 = xor i32 %54, %50
store i32 %55, ptr %49, align 4, !tbaa !6
%56 = load i32, ptr %51, align 4, !tbaa !6
%57 = xor i32 %56, %54
store i32 %57, ptr %51, align 4, !tbaa !6
%58 = add nuw nsw i64 %48, 1
%59 = icmp eq i64 %58, 16
br i1 %59, label %60, label %47, !llvm.loop !15
60: ; preds = %47, %10
ret void
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11}
!11 = distinct !{!11, !12}
!12 = distinct !{!12, !"LVerDomain"}
!13 = !{!14}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !16, !17}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!"llvm.loop.isvectorized", i32 1}
| h2o_deps_picotls_deps_cifra_src_extr_curve25519.tweetnacl.c_sel25519 |
; ModuleID = 'linux_sound_pci_oxygen_extr_se6x.c_se6x_control_filter.so'
source_filename = "linux_sound_pci_oxygen_extr_se6x.c_se6x_control_filter.so"
@0 = private unnamed_addr constant [17 x i8] c"Master Playback \00", align 1, !ROData_SecInfo !0
declare dso_local i32 @strncmp(ptr, ptr, i64)
define dso_local i32 @se6x_control_filter(i64 %arg1) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
%1 = inttoptr i32 %memload to ptr
%2 = zext i32 16 to i64
%EAX = call i32 @strncmp(ptr %1, ptr @0, i64 %2)
%3 = and i32 %EAX, %EAX
%highbit = and i32 -2147483648, %3
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %3, 0
%4 = and i32 %3, 255
%5 = call i32 @llvm.ctpop.i32(i32 %4)
%6 = and i32 %5, 1
%PF = icmp eq i32 %6, 0
%CL = icmp eq i1 %ZF, true
%EAX1 = zext i1 %CL to i32
ret i32 %EAX1
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/linux/sound/pci/oxygen/extr_se6x.c_se6x_control_filter.c'
source_filename = "AnghaBench/linux/sound/pci/oxygen/extr_se6x.c_se6x_control_filter.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [17 x i8] c"Master Playback \00", align 1
@llvm.used = appending global [1 x ptr] [ptr @se6x_control_filter], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @se6x_control_filter(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = tail call i32 @strncmp(i32 noundef %2, ptr noundef nonnull @.str, i32 noundef 16) #2
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
declare i32 @strncmp(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"snd_kcontrol_new", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_sound_pci_oxygen_extr_se6x.c_se6x_control_filter |
; ModuleID = 'fastsocket_kernel_drivers_base_extr_powerpower.h_pm_runtime_init.so'
source_filename = "fastsocket_kernel_drivers_base_extr_powerpower.h_pm_runtime_init.so"
define dso_local void @pm_runtime_init() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/base/extr_powerpower.h_pm_runtime_init.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/base/extr_powerpower.h_pm_runtime_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @pm_runtime_init], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @pm_runtime_init(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_base_extr_powerpower.h_pm_runtime_init |
; ModuleID = 'linux_drivers_media_rc_img-ir_extr_img-ir-hw.c_img_ir_probe_hw_caps.so'
source_filename = "linux_drivers_media_rc_img-ir_extr_img-ir-hw.c_img_ir_probe_hw_caps.so"
@IMG_IR_QUIRK_CODE_LEN_INCR = common dso_local global i32 0, align 4
@IMG_IR_CODETYPE_PULSELEN = common dso_local global i64 0, align 8
@IMG_IR_QUIRK_CODE_IRQ = common dso_local global i32 0, align 4
@IMG_IR_CODETYPE_BIPHASE = common dso_local global i64 0, align 8
@IMG_IR_QUIRK_CODE_BROKEN = common dso_local global i32 0, align 4
@IMG_IR_CODETYPE_2BITPULSEPOS = common dso_local global i64 0, align 8
define dso_local i32 @img_ir_probe_hw_caps(i64 %arg1) {
entry:
%memload = load i32, ptr @IMG_IR_QUIRK_CODE_LEN_INCR, align 1
%0 = inttoptr i64 %arg1 to ptr
%memload1 = load i64, ptr %0, align 1
%memload2 = load i64, ptr @IMG_IR_CODETYPE_PULSELEN, align 1
%memref-idxreg = mul i64 4, %memload2
%memref-basereg = add i64 %memload1, %memref-idxreg
%1 = inttoptr i64 %memref-basereg to ptr
%2 = load i32, ptr %1, align 1
%3 = or i32 %2, %memload
%4 = and i32 %3, 255
%5 = call i32 @llvm.ctpop.i32(i32 %4)
%6 = and i32 %5, 1
%PF = icmp eq i32 %6, 0
store i32 %3, ptr %1, align 1
%memload3 = load i32, ptr @IMG_IR_QUIRK_CODE_IRQ, align 1
%memload4 = load i64, ptr @IMG_IR_CODETYPE_BIPHASE, align 1
%memref-idxreg5 = mul i64 4, %memload4
%memref-basereg6 = add i64 %memload1, %memref-idxreg5
%7 = inttoptr i64 %memref-basereg6 to ptr
%8 = load i32, ptr %7, align 1
%9 = or i32 %8, %memload3
%10 = and i32 %9, 255
%11 = call i32 @llvm.ctpop.i32(i32 %10)
%12 = and i32 %11, 1
%PF7 = icmp eq i32 %12, 0
store i32 %9, ptr %7, align 1
%memload8 = load i32, ptr @IMG_IR_QUIRK_CODE_BROKEN, align 1
%memload9 = load i64, ptr @IMG_IR_CODETYPE_2BITPULSEPOS, align 1
%memref-idxreg10 = mul i64 4, %memload9
%memref-basereg11 = add i64 %memload1, %memref-idxreg10
%13 = inttoptr i64 %memref-basereg11 to ptr
%14 = load i32, ptr %13, align 1
%15 = or i32 %14, %memload8
%16 = and i32 %15, 255
%17 = call i32 @llvm.ctpop.i32(i32 %16)
%18 = and i32 %17, 1
%PF12 = icmp eq i32 %18, 0
store i32 %15, ptr %13, align 1
ret i32 %memload8
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/media/rc/img-ir/extr_img-ir-hw.c_img_ir_probe_hw_caps.c'
source_filename = "AnghaBench/linux/drivers/media/rc/img-ir/extr_img-ir-hw.c_img_ir_probe_hw_caps.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IMG_IR_QUIRK_CODE_LEN_INCR = common local_unnamed_addr global i32 0, align 4
@IMG_IR_CODETYPE_PULSELEN = common local_unnamed_addr global i64 0, align 8
@IMG_IR_QUIRK_CODE_IRQ = common local_unnamed_addr global i32 0, align 4
@IMG_IR_CODETYPE_BIPHASE = common local_unnamed_addr global i64 0, align 8
@IMG_IR_QUIRK_CODE_BROKEN = common local_unnamed_addr global i32 0, align 4
@IMG_IR_CODETYPE_2BITPULSEPOS = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @img_ir_probe_hw_caps], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @img_ir_probe_hw_caps(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr @IMG_IR_QUIRK_CODE_LEN_INCR, align 4, !tbaa !6
%3 = load ptr, ptr %0, align 8, !tbaa !10
%4 = load i64, ptr @IMG_IR_CODETYPE_PULSELEN, align 8, !tbaa !13
%5 = getelementptr inbounds i32, ptr %3, i64 %4
%6 = load i32, ptr %5, align 4, !tbaa !6
%7 = or i32 %6, %2
store i32 %7, ptr %5, align 4, !tbaa !6
%8 = load i32, ptr @IMG_IR_QUIRK_CODE_IRQ, align 4, !tbaa !6
%9 = load i64, ptr @IMG_IR_CODETYPE_BIPHASE, align 8, !tbaa !13
%10 = getelementptr inbounds i32, ptr %3, i64 %9
%11 = load i32, ptr %10, align 4, !tbaa !6
%12 = or i32 %11, %8
store i32 %12, ptr %10, align 4, !tbaa !6
%13 = load i32, ptr @IMG_IR_QUIRK_CODE_BROKEN, align 4, !tbaa !6
%14 = load i64, ptr @IMG_IR_CODETYPE_2BITPULSEPOS, align 8, !tbaa !13
%15 = getelementptr inbounds i32, ptr %3, i64 %14
%16 = load i32, ptr %15, align 4, !tbaa !6
%17 = or i32 %16, %13
store i32 %17, ptr %15, align 4, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"img_ir_priv_hw", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !8, i64 0}
| linux_drivers_media_rc_img-ir_extr_img-ir-hw.c_img_ir_probe_hw_caps |
; ModuleID = 'linux_drivers_infiniband_hw_hfi1_extr_chip.c_vl_arb_set_cache.so'
source_filename = "linux_drivers_infiniband_hw_hfi1_extr_chip.c_vl_arb_set_cache.so"
@VL_ARB_TABLE_SIZE = common dso_local global i32 0, align 4
declare dso_local ptr @memcpy(ptr, ptr, i64)
define dso_local i64 @vl_arb_set_cache(i64 %arg1, i64 %arg2) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
%memload1 = load i32, ptr @VL_ARB_TABLE_SIZE, align 1
%EDX = shl i32 %memload1, 2
%ZF = icmp eq i32 %EDX, 0
%highbit = and i32 -2147483648, %EDX
%SF = icmp ne i32 %highbit, 0
%1 = inttoptr i32 %memload to ptr
%2 = inttoptr i64 %arg2 to ptr
%3 = zext i32 %EDX to i64
%4 = tail call ptr @memcpy(ptr %1, ptr %2, i64 %3)
%RAX = ptrtoint ptr %4 to i64
ret i64 %RAX
}
| ; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/hfi1/extr_chip.c_vl_arb_set_cache.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/hfi1/extr_chip.c_vl_arb_set_cache.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VL_ARB_TABLE_SIZE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @vl_arb_set_cache], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @vl_arb_set_cache(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = load i32, ptr @VL_ARB_TABLE_SIZE, align 4, !tbaa !11
%5 = shl i32 %4, 2
%6 = tail call i32 @memcpy(i32 noundef %3, ptr noundef %1, i32 noundef %5) #2
ret void
}
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"vl_arb_cache", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| linux_drivers_infiniband_hw_hfi1_extr_chip.c_vl_arb_set_cache |
; ModuleID = 'sumatrapdf_mupdf_source_pdf_extr_pdf-annot.c_pdf_annot_type_from_string.so'
source_filename = "sumatrapdf_mupdf_source_pdf_extr_pdf-annot.c_pdf_annot_type_from_string.so"
@0 = private unnamed_addr constant [187 x i8] c"Link\00FreeText\00Square\00Circle\00Polygon\00PolyLine\00Highlight\00Underline\00Squiggly\00StrikeOut\00Redact\00Stamp\00Caret\00Ink\00Popup\00FileAttachment\00Sound\00Movie\00Widget\00Screen\00PrinterMark\00TrapNet\00Watermark\003D\00", align 1, !ROData_SecInfo !0
@PDF_ANNOT_3D = common dso_local global i32 0, align 4
@PDF_ANNOT_UNKNOWN = common dso_local global i32 0, align 4
@PDF_ANNOT_WATERMARK = common dso_local global i32 0, align 4
@PDF_ANNOT_TRAP_NET = common dso_local global i32 0, align 4
@PDF_ANNOT_PRINTER_MARK = common dso_local global i32 0, align 4
@PDF_ANNOT_SCREEN = common dso_local global i32 0, align 4
@PDF_ANNOT_WIDGET = common dso_local global i32 0, align 4
@PDF_ANNOT_MOVIE = common dso_local global i32 0, align 4
@PDF_ANNOT_SOUND = common dso_local global i32 0, align 4
@PDF_ANNOT_FILE_ATTACHMENT = common dso_local global i32 0, align 4
@PDF_ANNOT_POPUP = common dso_local global i32 0, align 4
@PDF_ANNOT_INK = common dso_local global i32 0, align 4
@PDF_ANNOT_CARET = common dso_local global i32 0, align 4
@PDF_ANNOT_STAMP = common dso_local global i32 0, align 4
@PDF_ANNOT_REDACT = common dso_local global i32 0, align 4
@PDF_ANNOT_STRIKE_OUT = common dso_local global i32 0, align 4
@PDF_ANNOT_SQUIGGLY = common dso_local global i32 0, align 4
@PDF_ANNOT_UNDERLINE = common dso_local global i32 0, align 4
@PDF_ANNOT_HIGHLIGHT = common dso_local global i32 0, align 4
@PDF_ANNOT_POLY_LINE = common dso_local global i32 0, align 4
@PDF_ANNOT_POLYGON = common dso_local global i32 0, align 4
@PDF_ANNOT_CIRCLE = common dso_local global i32 0, align 4
@PDF_ANNOT_SQUARE = common dso_local global i32 0, align 4
@PDF_ANNOT_LINE = common dso_local global i32 0, align 4
@PDF_ANNOT_FREE_TEXT = common dso_local global i32 0, align 4
@PDF_ANNOT_LINK = common dso_local global i32 0, align 4
@PDF_ANNOT_TEXT = common dso_local global i32 0, align 4
declare dso_local i32 @strcmp(ptr, ptr)
define dso_local i32 @pdf_annot_type_from_string(i64 %arg1, i64 %arg2) {
entry:
%RAX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
%0 = inttoptr i64 %arg2 to ptr
%EAX = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 9), ptr %0)
%1 = and i32 %EAX, %EAX
%highbit = and i32 -2147483648, %1
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %1, 0
%2 = and i32 %1, 255
%3 = call i32 @llvm.ctpop.i32(i32 %2)
%4 = and i32 %3, 1
%PF = icmp eq i32 %4, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.27, label %bb.1
bb.1: ; preds = %entry
%5 = inttoptr i64 %arg2 to ptr
%EAX2 = call i32 @strcmp(ptr @0, ptr %5)
%6 = and i32 %EAX2, %EAX2
%highbit3 = and i32 -2147483648, %6
%SF4 = icmp ne i32 %highbit3, 0
%ZF5 = icmp eq i32 %6, 0
%7 = and i32 %6, 255
%8 = call i32 @llvm.ctpop.i32(i32 %7)
%9 = and i32 %8, 1
%PF6 = icmp eq i32 %9, 0
%CmpZF_JE151 = icmp eq i1 %ZF5, true
br i1 %CmpZF_JE151, label %bb.28, label %bb.2
bb.2: ; preds = %bb.1
%10 = inttoptr i64 %arg2 to ptr
%EAX8 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 5), ptr %10)
%11 = and i32 %EAX8, %EAX8
%highbit9 = and i32 -2147483648, %11
%SF10 = icmp ne i32 %highbit9, 0
%ZF11 = icmp eq i32 %11, 0
%12 = and i32 %11, 255
%13 = call i32 @llvm.ctpop.i32(i32 %12)
%14 = and i32 %13, 1
%PF12 = icmp eq i32 %14, 0
%CmpZF_JE152 = icmp eq i1 %ZF11, true
br i1 %CmpZF_JE152, label %bb.29, label %bb.3
bb.3: ; preds = %bb.2
%15 = inttoptr i64 %arg2 to ptr
%EAX14 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 40), ptr %15)
%16 = and i32 %EAX14, %EAX14
%highbit15 = and i32 -2147483648, %16
%SF16 = icmp ne i32 %highbit15, 0
%ZF17 = icmp eq i32 %16, 0
%17 = and i32 %16, 255
%18 = call i32 @llvm.ctpop.i32(i32 %17)
%19 = and i32 %18, 1
%PF18 = icmp eq i32 %19, 0
%CmpZF_JE153 = icmp eq i1 %ZF17, true
br i1 %CmpZF_JE153, label %bb.30, label %bb.4
bb.4: ; preds = %bb.3
%20 = inttoptr i64 %arg2 to ptr
%EAX20 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 14), ptr %20)
%21 = and i32 %EAX20, %EAX20
%highbit21 = and i32 -2147483648, %21
%SF22 = icmp ne i32 %highbit21, 0
%ZF23 = icmp eq i32 %21, 0
%22 = and i32 %21, 255
%23 = call i32 @llvm.ctpop.i32(i32 %22)
%24 = and i32 %23, 1
%PF24 = icmp eq i32 %24, 0
%CmpZF_JE154 = icmp eq i1 %ZF23, true
br i1 %CmpZF_JE154, label %bb.31, label %bb.5
bb.5: ; preds = %bb.4
%25 = inttoptr i64 %arg2 to ptr
%EAX26 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 21), ptr %25)
%26 = and i32 %EAX26, %EAX26
%highbit27 = and i32 -2147483648, %26
%SF28 = icmp ne i32 %highbit27, 0
%ZF29 = icmp eq i32 %26, 0
%27 = and i32 %26, 255
%28 = call i32 @llvm.ctpop.i32(i32 %27)
%29 = and i32 %28, 1
%PF30 = icmp eq i32 %29, 0
%CmpZF_JE155 = icmp eq i1 %ZF29, true
br i1 %CmpZF_JE155, label %bb.32, label %bb.6
bb.6: ; preds = %bb.5
%30 = inttoptr i64 %arg2 to ptr
%EAX32 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 28), ptr %30)
%31 = and i32 %EAX32, %EAX32
%highbit33 = and i32 -2147483648, %31
%SF34 = icmp ne i32 %highbit33, 0
%ZF35 = icmp eq i32 %31, 0
%32 = and i32 %31, 255
%33 = call i32 @llvm.ctpop.i32(i32 %32)
%34 = and i32 %33, 1
%PF36 = icmp eq i32 %34, 0
%CmpZF_JE156 = icmp eq i1 %ZF35, true
br i1 %CmpZF_JE156, label %bb.33, label %bb.7
bb.7: ; preds = %bb.6
%35 = inttoptr i64 %arg2 to ptr
%EAX38 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 36), ptr %35)
%36 = and i32 %EAX38, %EAX38
%highbit39 = and i32 -2147483648, %36
%SF40 = icmp ne i32 %highbit39, 0
%ZF41 = icmp eq i32 %36, 0
%37 = and i32 %36, 255
%38 = call i32 @llvm.ctpop.i32(i32 %37)
%39 = and i32 %38, 1
%PF42 = icmp eq i32 %39, 0
%CmpZF_JE157 = icmp eq i1 %ZF41, true
br i1 %CmpZF_JE157, label %bb.34, label %bb.8
bb.8: ; preds = %bb.7
%40 = inttoptr i64 %arg2 to ptr
%EAX44 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 45), ptr %40)
%41 = and i32 %EAX44, %EAX44
%highbit45 = and i32 -2147483648, %41
%SF46 = icmp ne i32 %highbit45, 0
%ZF47 = icmp eq i32 %41, 0
%42 = and i32 %41, 255
%43 = call i32 @llvm.ctpop.i32(i32 %42)
%44 = and i32 %43, 1
%PF48 = icmp eq i32 %44, 0
%CmpZF_JE158 = icmp eq i1 %ZF47, true
br i1 %CmpZF_JE158, label %bb.35, label %bb.9
bb.9: ; preds = %bb.8
%45 = inttoptr i64 %arg2 to ptr
%EAX50 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 55), ptr %45)
%46 = and i32 %EAX50, %EAX50
%highbit51 = and i32 -2147483648, %46
%SF52 = icmp ne i32 %highbit51, 0
%ZF53 = icmp eq i32 %46, 0
%47 = and i32 %46, 255
%48 = call i32 @llvm.ctpop.i32(i32 %47)
%49 = and i32 %48, 1
%PF54 = icmp eq i32 %49, 0
%CmpZF_JE159 = icmp eq i1 %ZF53, true
br i1 %CmpZF_JE159, label %bb.36, label %bb.10
bb.10: ; preds = %bb.9
%50 = inttoptr i64 %arg2 to ptr
%EAX56 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 65), ptr %50)
%51 = and i32 %EAX56, %EAX56
%highbit57 = and i32 -2147483648, %51
%SF58 = icmp ne i32 %highbit57, 0
%ZF59 = icmp eq i32 %51, 0
%52 = and i32 %51, 255
%53 = call i32 @llvm.ctpop.i32(i32 %52)
%54 = and i32 %53, 1
%PF60 = icmp eq i32 %54, 0
%CmpZF_JE160 = icmp eq i1 %ZF59, true
br i1 %CmpZF_JE160, label %bb.37, label %bb.11
bb.11: ; preds = %bb.10
%55 = inttoptr i64 %arg2 to ptr
%EAX62 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 74), ptr %55)
%56 = and i32 %EAX62, %EAX62
%highbit63 = and i32 -2147483648, %56
%SF64 = icmp ne i32 %highbit63, 0
%ZF65 = icmp eq i32 %56, 0
%57 = and i32 %56, 255
%58 = call i32 @llvm.ctpop.i32(i32 %57)
%59 = and i32 %58, 1
%PF66 = icmp eq i32 %59, 0
%CmpZF_JE161 = icmp eq i1 %ZF65, true
br i1 %CmpZF_JE161, label %bb.38, label %bb.12
bb.12: ; preds = %bb.11
%60 = inttoptr i64 %arg2 to ptr
%EAX68 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 84), ptr %60)
%61 = and i32 %EAX68, %EAX68
%highbit69 = and i32 -2147483648, %61
%SF70 = icmp ne i32 %highbit69, 0
%ZF71 = icmp eq i32 %61, 0
%62 = and i32 %61, 255
%63 = call i32 @llvm.ctpop.i32(i32 %62)
%64 = and i32 %63, 1
%PF72 = icmp eq i32 %64, 0
%CmpZF_JE162 = icmp eq i1 %ZF71, true
br i1 %CmpZF_JE162, label %bb.39, label %bb.13
bb.13: ; preds = %bb.12
%65 = inttoptr i64 %arg2 to ptr
%EAX74 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 91), ptr %65)
%66 = and i32 %EAX74, %EAX74
%highbit75 = and i32 -2147483648, %66
%SF76 = icmp ne i32 %highbit75, 0
%ZF77 = icmp eq i32 %66, 0
%67 = and i32 %66, 255
%68 = call i32 @llvm.ctpop.i32(i32 %67)
%69 = and i32 %68, 1
%PF78 = icmp eq i32 %69, 0
%CmpZF_JE163 = icmp eq i1 %ZF77, true
br i1 %CmpZF_JE163, label %bb.40, label %bb.14
bb.14: ; preds = %bb.13
%70 = inttoptr i64 %arg2 to ptr
%EAX80 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 97), ptr %70)
%71 = and i32 %EAX80, %EAX80
%highbit81 = and i32 -2147483648, %71
%SF82 = icmp ne i32 %highbit81, 0
%ZF83 = icmp eq i32 %71, 0
%72 = and i32 %71, 255
%73 = call i32 @llvm.ctpop.i32(i32 %72)
%74 = and i32 %73, 1
%PF84 = icmp eq i32 %74, 0
%CmpZF_JE164 = icmp eq i1 %ZF83, true
br i1 %CmpZF_JE164, label %bb.41, label %bb.15
bb.15: ; preds = %bb.14
%75 = inttoptr i64 %arg2 to ptr
%EAX86 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 103), ptr %75)
%76 = and i32 %EAX86, %EAX86
%highbit87 = and i32 -2147483648, %76
%SF88 = icmp ne i32 %highbit87, 0
%ZF89 = icmp eq i32 %76, 0
%77 = and i32 %76, 255
%78 = call i32 @llvm.ctpop.i32(i32 %77)
%79 = and i32 %78, 1
%PF90 = icmp eq i32 %79, 0
%CmpZF_JE165 = icmp eq i1 %ZF89, true
br i1 %CmpZF_JE165, label %bb.42, label %bb.16
bb.16: ; preds = %bb.15
%80 = inttoptr i64 %arg2 to ptr
%EAX92 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 107), ptr %80)
%81 = and i32 %EAX92, %EAX92
%highbit93 = and i32 -2147483648, %81
%SF94 = icmp ne i32 %highbit93, 0
%ZF95 = icmp eq i32 %81, 0
%82 = and i32 %81, 255
%83 = call i32 @llvm.ctpop.i32(i32 %82)
%84 = and i32 %83, 1
%PF96 = icmp eq i32 %84, 0
%CmpZF_JE166 = icmp eq i1 %ZF95, true
br i1 %CmpZF_JE166, label %bb.43, label %bb.17
bb.17: ; preds = %bb.16
%85 = inttoptr i64 %arg2 to ptr
%EAX98 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 113), ptr %85)
%86 = and i32 %EAX98, %EAX98
%highbit99 = and i32 -2147483648, %86
%SF100 = icmp ne i32 %highbit99, 0
%ZF101 = icmp eq i32 %86, 0
%87 = and i32 %86, 255
%88 = call i32 @llvm.ctpop.i32(i32 %87)
%89 = and i32 %88, 1
%PF102 = icmp eq i32 %89, 0
%CmpZF_JE167 = icmp eq i1 %ZF101, true
br i1 %CmpZF_JE167, label %bb.44, label %bb.18
bb.18: ; preds = %bb.17
%90 = inttoptr i64 %arg2 to ptr
%EAX104 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 128), ptr %90)
%91 = and i32 %EAX104, %EAX104
%highbit105 = and i32 -2147483648, %91
%SF106 = icmp ne i32 %highbit105, 0
%ZF107 = icmp eq i32 %91, 0
%92 = and i32 %91, 255
%93 = call i32 @llvm.ctpop.i32(i32 %92)
%94 = and i32 %93, 1
%PF108 = icmp eq i32 %94, 0
%CmpZF_JE168 = icmp eq i1 %ZF107, true
br i1 %CmpZF_JE168, label %bb.45, label %bb.19
bb.19: ; preds = %bb.18
%95 = inttoptr i64 %arg2 to ptr
%EAX110 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 134), ptr %95)
%96 = and i32 %EAX110, %EAX110
%highbit111 = and i32 -2147483648, %96
%SF112 = icmp ne i32 %highbit111, 0
%ZF113 = icmp eq i32 %96, 0
%97 = and i32 %96, 255
%98 = call i32 @llvm.ctpop.i32(i32 %97)
%99 = and i32 %98, 1
%PF114 = icmp eq i32 %99, 0
%CmpZF_JE169 = icmp eq i1 %ZF113, true
br i1 %CmpZF_JE169, label %bb.46, label %bb.20
bb.20: ; preds = %bb.19
%100 = inttoptr i64 %arg2 to ptr
%EAX116 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 140), ptr %100)
%101 = and i32 %EAX116, %EAX116
%highbit117 = and i32 -2147483648, %101
%SF118 = icmp ne i32 %highbit117, 0
%ZF119 = icmp eq i32 %101, 0
%102 = and i32 %101, 255
%103 = call i32 @llvm.ctpop.i32(i32 %102)
%104 = and i32 %103, 1
%PF120 = icmp eq i32 %104, 0
%CmpZF_JE170 = icmp eq i1 %ZF119, true
br i1 %CmpZF_JE170, label %bb.47, label %bb.21
bb.21: ; preds = %bb.20
%105 = inttoptr i64 %arg2 to ptr
%EAX122 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 147), ptr %105)
%106 = and i32 %EAX122, %EAX122
%highbit123 = and i32 -2147483648, %106
%SF124 = icmp ne i32 %highbit123, 0
%ZF125 = icmp eq i32 %106, 0
%107 = and i32 %106, 255
%108 = call i32 @llvm.ctpop.i32(i32 %107)
%109 = and i32 %108, 1
%PF126 = icmp eq i32 %109, 0
%CmpZF_JE171 = icmp eq i1 %ZF125, true
br i1 %CmpZF_JE171, label %bb.48, label %bb.22
bb.22: ; preds = %bb.21
%110 = inttoptr i64 %arg2 to ptr
%EAX128 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 154), ptr %110)
%111 = and i32 %EAX128, %EAX128
%highbit129 = and i32 -2147483648, %111
%SF130 = icmp ne i32 %highbit129, 0
%ZF131 = icmp eq i32 %111, 0
%112 = and i32 %111, 255
%113 = call i32 @llvm.ctpop.i32(i32 %112)
%114 = and i32 %113, 1
%PF132 = icmp eq i32 %114, 0
%CmpZF_JE172 = icmp eq i1 %ZF131, true
br i1 %CmpZF_JE172, label %bb.49, label %bb.23
bb.23: ; preds = %bb.22
%115 = inttoptr i64 %arg2 to ptr
%EAX134 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 166), ptr %115)
%116 = and i32 %EAX134, %EAX134
%highbit135 = and i32 -2147483648, %116
%SF136 = icmp ne i32 %highbit135, 0
%ZF137 = icmp eq i32 %116, 0
%117 = and i32 %116, 255
%118 = call i32 @llvm.ctpop.i32(i32 %117)
%119 = and i32 %118, 1
%PF138 = icmp eq i32 %119, 0
%CmpZF_JE173 = icmp eq i1 %ZF137, true
br i1 %CmpZF_JE173, label %bb.50, label %bb.24
bb.24: ; preds = %bb.23
%120 = inttoptr i64 %arg2 to ptr
%EAX140 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 174), ptr %120)
%121 = and i32 %EAX140, %EAX140
%highbit141 = and i32 -2147483648, %121
%SF142 = icmp ne i32 %highbit141, 0
%ZF143 = icmp eq i32 %121, 0
%122 = and i32 %121, 255
%123 = call i32 @llvm.ctpop.i32(i32 %122)
%124 = and i32 %123, 1
%PF144 = icmp eq i32 %124, 0
%CmpZF_JE174 = icmp eq i1 %ZF143, true
br i1 %CmpZF_JE174, label %bb.51, label %bb.25
bb.25: ; preds = %bb.24
%125 = inttoptr i64 %arg2 to ptr
%EAX146 = call i32 @strcmp(ptr getelementptr inbounds ([187 x i8], ptr @0, i32 0, i32 184), ptr %125)
%126 = and i32 %EAX146, %EAX146
%highbit147 = and i32 -2147483648, %126
%SF148 = icmp ne i32 %highbit147, 0
%ZF149 = icmp eq i32 %126, 0
%127 = and i32 %126, 255
%128 = call i32 @llvm.ctpop.i32(i32 %127)
%129 = and i32 %128, 1
%PF150 = icmp eq i32 %129, 0
%CmpZF_JNE = icmp eq i1 %ZF149, false
br i1 %CmpZF_JNE, label %bb.52, label %bb.26
bb.26: ; preds = %bb.25
%130 = ptrtoint ptr @PDF_ANNOT_3D to i64
store i64 %130, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.52: ; preds = %bb.25
%131 = ptrtoint ptr @PDF_ANNOT_UNKNOWN to i64
store i64 %131, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.51: ; preds = %bb.24
%132 = ptrtoint ptr @PDF_ANNOT_WATERMARK to i64
store i64 %132, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.50: ; preds = %bb.23
%133 = ptrtoint ptr @PDF_ANNOT_TRAP_NET to i64
store i64 %133, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.49: ; preds = %bb.22
%134 = ptrtoint ptr @PDF_ANNOT_PRINTER_MARK to i64
store i64 %134, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.48: ; preds = %bb.21
%135 = ptrtoint ptr @PDF_ANNOT_SCREEN to i64
store i64 %135, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.47: ; preds = %bb.20
%136 = ptrtoint ptr @PDF_ANNOT_WIDGET to i64
store i64 %136, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.46: ; preds = %bb.19
%137 = ptrtoint ptr @PDF_ANNOT_MOVIE to i64
store i64 %137, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.45: ; preds = %bb.18
%138 = ptrtoint ptr @PDF_ANNOT_SOUND to i64
store i64 %138, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.44: ; preds = %bb.17
%139 = ptrtoint ptr @PDF_ANNOT_FILE_ATTACHMENT to i64
store i64 %139, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.43: ; preds = %bb.16
%140 = ptrtoint ptr @PDF_ANNOT_POPUP to i64
store i64 %140, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.42: ; preds = %bb.15
%141 = ptrtoint ptr @PDF_ANNOT_INK to i64
store i64 %141, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.41: ; preds = %bb.14
%142 = ptrtoint ptr @PDF_ANNOT_CARET to i64
store i64 %142, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.40: ; preds = %bb.13
%143 = ptrtoint ptr @PDF_ANNOT_STAMP to i64
store i64 %143, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.39: ; preds = %bb.12
%144 = ptrtoint ptr @PDF_ANNOT_REDACT to i64
store i64 %144, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.38: ; preds = %bb.11
%145 = ptrtoint ptr @PDF_ANNOT_STRIKE_OUT to i64
store i64 %145, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.37: ; preds = %bb.10
%146 = ptrtoint ptr @PDF_ANNOT_SQUIGGLY to i64
store i64 %146, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.36: ; preds = %bb.9
%147 = ptrtoint ptr @PDF_ANNOT_UNDERLINE to i64
store i64 %147, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.35: ; preds = %bb.8
%148 = ptrtoint ptr @PDF_ANNOT_HIGHLIGHT to i64
store i64 %148, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.34: ; preds = %bb.7
%149 = ptrtoint ptr @PDF_ANNOT_POLY_LINE to i64
store i64 %149, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.33: ; preds = %bb.6
%150 = ptrtoint ptr @PDF_ANNOT_POLYGON to i64
store i64 %150, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.32: ; preds = %bb.5
%151 = ptrtoint ptr @PDF_ANNOT_CIRCLE to i64
store i64 %151, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.31: ; preds = %bb.4
%152 = ptrtoint ptr @PDF_ANNOT_SQUARE to i64
store i64 %152, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.30: ; preds = %bb.3
%153 = ptrtoint ptr @PDF_ANNOT_LINE to i64
store i64 %153, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.29: ; preds = %bb.2
%154 = ptrtoint ptr @PDF_ANNOT_FREE_TEXT to i64
store i64 %154, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.28: ; preds = %bb.1
%155 = ptrtoint ptr @PDF_ANNOT_LINK to i64
store i64 %155, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.27: ; preds = %entry
%156 = ptrtoint ptr @PDF_ANNOT_TEXT to i64
store i64 %156, ptr %RAX-SKT-LOC, align 1
br label %bb.53
bb.53: ; preds = %bb.52, %bb.27, %bb.28, %bb.29, %bb.30, %bb.31, %bb.32, %bb.33, %bb.34, %bb.35, %bb.36, %bb.37, %bb.38, %bb.39, %bb.40, %bb.41, %bb.42, %bb.43, %bb.44, %bb.45, %bb.46, %bb.47, %bb.48, %bb.49, %bb.50, %bb.51, %bb.26
%RAX = load i64, ptr %RAX-SKT-LOC, align 1
%157 = inttoptr i64 %RAX to ptr
%memload = load i32, ptr %157, align 1
ret i32 %memload
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/sumatrapdf/mupdf/source/pdf/extr_pdf-annot.c_pdf_annot_type_from_string.c'
source_filename = "AnghaBench/sumatrapdf/mupdf/source/pdf/extr_pdf-annot.c_pdf_annot_type_from_string.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [5 x i8] c"Text\00", align 1
@PDF_ANNOT_TEXT = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [5 x i8] c"Link\00", align 1
@PDF_ANNOT_LINK = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [9 x i8] c"FreeText\00", align 1
@PDF_ANNOT_FREE_TEXT = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [5 x i8] c"Line\00", align 1
@PDF_ANNOT_LINE = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [7 x i8] c"Square\00", align 1
@PDF_ANNOT_SQUARE = common local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [7 x i8] c"Circle\00", align 1
@PDF_ANNOT_CIRCLE = common local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [8 x i8] c"Polygon\00", align 1
@PDF_ANNOT_POLYGON = common local_unnamed_addr global i32 0, align 4
@.str.7 = private unnamed_addr constant [9 x i8] c"PolyLine\00", align 1
@PDF_ANNOT_POLY_LINE = common local_unnamed_addr global i32 0, align 4
@.str.8 = private unnamed_addr constant [10 x i8] c"Highlight\00", align 1
@PDF_ANNOT_HIGHLIGHT = common local_unnamed_addr global i32 0, align 4
@.str.9 = private unnamed_addr constant [10 x i8] c"Underline\00", align 1
@PDF_ANNOT_UNDERLINE = common local_unnamed_addr global i32 0, align 4
@.str.10 = private unnamed_addr constant [9 x i8] c"Squiggly\00", align 1
@PDF_ANNOT_SQUIGGLY = common local_unnamed_addr global i32 0, align 4
@.str.11 = private unnamed_addr constant [10 x i8] c"StrikeOut\00", align 1
@PDF_ANNOT_STRIKE_OUT = common local_unnamed_addr global i32 0, align 4
@.str.12 = private unnamed_addr constant [7 x i8] c"Redact\00", align 1
@PDF_ANNOT_REDACT = common local_unnamed_addr global i32 0, align 4
@.str.13 = private unnamed_addr constant [6 x i8] c"Stamp\00", align 1
@PDF_ANNOT_STAMP = common local_unnamed_addr global i32 0, align 4
@.str.14 = private unnamed_addr constant [6 x i8] c"Caret\00", align 1
@PDF_ANNOT_CARET = common local_unnamed_addr global i32 0, align 4
@.str.15 = private unnamed_addr constant [4 x i8] c"Ink\00", align 1
@PDF_ANNOT_INK = common local_unnamed_addr global i32 0, align 4
@.str.16 = private unnamed_addr constant [6 x i8] c"Popup\00", align 1
@PDF_ANNOT_POPUP = common local_unnamed_addr global i32 0, align 4
@.str.17 = private unnamed_addr constant [15 x i8] c"FileAttachment\00", align 1
@PDF_ANNOT_FILE_ATTACHMENT = common local_unnamed_addr global i32 0, align 4
@.str.18 = private unnamed_addr constant [6 x i8] c"Sound\00", align 1
@PDF_ANNOT_SOUND = common local_unnamed_addr global i32 0, align 4
@.str.19 = private unnamed_addr constant [6 x i8] c"Movie\00", align 1
@PDF_ANNOT_MOVIE = common local_unnamed_addr global i32 0, align 4
@.str.20 = private unnamed_addr constant [7 x i8] c"Widget\00", align 1
@PDF_ANNOT_WIDGET = common local_unnamed_addr global i32 0, align 4
@.str.21 = private unnamed_addr constant [7 x i8] c"Screen\00", align 1
@PDF_ANNOT_SCREEN = common local_unnamed_addr global i32 0, align 4
@.str.22 = private unnamed_addr constant [12 x i8] c"PrinterMark\00", align 1
@PDF_ANNOT_PRINTER_MARK = common local_unnamed_addr global i32 0, align 4
@.str.23 = private unnamed_addr constant [8 x i8] c"TrapNet\00", align 1
@PDF_ANNOT_TRAP_NET = common local_unnamed_addr global i32 0, align 4
@.str.24 = private unnamed_addr constant [10 x i8] c"Watermark\00", align 1
@PDF_ANNOT_WATERMARK = common local_unnamed_addr global i32 0, align 4
@PDF_ANNOT_3D = common local_unnamed_addr global i32 0, align 4
@PDF_ANNOT_UNKNOWN = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define i32 @pdf_annot_type_from_string(ptr nocapture noundef readnone %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(5) @.str, ptr noundef nonnull dereferenceable(1) %1)
%4 = icmp eq i32 %3, 0
br i1 %4, label %97, label %5
5: ; preds = %2
%6 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(5) @.str.1, ptr noundef nonnull dereferenceable(1) %1)
%7 = icmp eq i32 %6, 0
br i1 %7, label %97, label %8
8: ; preds = %5
%9 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(9) @.str.2, ptr noundef nonnull dereferenceable(1) %1)
%10 = icmp eq i32 %9, 0
br i1 %10, label %97, label %11
11: ; preds = %8
%12 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(5) @.str.3, ptr noundef nonnull dereferenceable(1) %1)
%13 = icmp eq i32 %12, 0
br i1 %13, label %97, label %14
14: ; preds = %11
%15 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(7) @.str.4, ptr noundef nonnull dereferenceable(1) %1)
%16 = icmp eq i32 %15, 0
br i1 %16, label %97, label %17
17: ; preds = %14
%18 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(7) @.str.5, ptr noundef nonnull dereferenceable(1) %1)
%19 = icmp eq i32 %18, 0
br i1 %19, label %97, label %20
20: ; preds = %17
%21 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(8) @.str.6, ptr noundef nonnull dereferenceable(1) %1)
%22 = icmp eq i32 %21, 0
br i1 %22, label %97, label %23
23: ; preds = %20
%24 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(9) @.str.7, ptr noundef nonnull dereferenceable(1) %1)
%25 = icmp eq i32 %24, 0
br i1 %25, label %97, label %26
26: ; preds = %23
%27 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(10) @.str.8, ptr noundef nonnull dereferenceable(1) %1)
%28 = icmp eq i32 %27, 0
br i1 %28, label %97, label %29
29: ; preds = %26
%30 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(10) @.str.9, ptr noundef nonnull dereferenceable(1) %1)
%31 = icmp eq i32 %30, 0
br i1 %31, label %97, label %32
32: ; preds = %29
%33 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(9) @.str.10, ptr noundef nonnull dereferenceable(1) %1)
%34 = icmp eq i32 %33, 0
br i1 %34, label %97, label %35
35: ; preds = %32
%36 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(10) @.str.11, ptr noundef nonnull dereferenceable(1) %1)
%37 = icmp eq i32 %36, 0
br i1 %37, label %97, label %38
38: ; preds = %35
%39 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(7) @.str.12, ptr noundef nonnull dereferenceable(1) %1)
%40 = icmp eq i32 %39, 0
br i1 %40, label %97, label %41
41: ; preds = %38
%42 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(6) @.str.13, ptr noundef nonnull dereferenceable(1) %1)
%43 = icmp eq i32 %42, 0
br i1 %43, label %97, label %44
44: ; preds = %41
%45 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(6) @.str.14, ptr noundef nonnull dereferenceable(1) %1)
%46 = icmp eq i32 %45, 0
br i1 %46, label %97, label %47
47: ; preds = %44
%48 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(4) @.str.15, ptr noundef nonnull dereferenceable(1) %1)
%49 = icmp eq i32 %48, 0
br i1 %49, label %97, label %50
50: ; preds = %47
%51 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(6) @.str.16, ptr noundef nonnull dereferenceable(1) %1)
%52 = icmp eq i32 %51, 0
br i1 %52, label %97, label %53
53: ; preds = %50
%54 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(15) @.str.17, ptr noundef nonnull dereferenceable(1) %1)
%55 = icmp eq i32 %54, 0
br i1 %55, label %97, label %56
56: ; preds = %53
%57 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(6) @.str.18, ptr noundef nonnull dereferenceable(1) %1)
%58 = icmp eq i32 %57, 0
br i1 %58, label %97, label %59
59: ; preds = %56
%60 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(6) @.str.19, ptr noundef nonnull dereferenceable(1) %1)
%61 = icmp eq i32 %60, 0
br i1 %61, label %97, label %62
62: ; preds = %59
%63 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(7) @.str.20, ptr noundef nonnull dereferenceable(1) %1)
%64 = icmp eq i32 %63, 0
br i1 %64, label %97, label %65
65: ; preds = %62
%66 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(7) @.str.21, ptr noundef nonnull dereferenceable(1) %1)
%67 = icmp eq i32 %66, 0
br i1 %67, label %97, label %68
68: ; preds = %65
%69 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(12) @.str.22, ptr noundef nonnull dereferenceable(1) %1)
%70 = icmp eq i32 %69, 0
br i1 %70, label %97, label %71
71: ; preds = %68
%72 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(8) @.str.23, ptr noundef nonnull dereferenceable(1) %1)
%73 = icmp eq i32 %72, 0
br i1 %73, label %97, label %74
74: ; preds = %71
%75 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(10) @.str.24, ptr noundef nonnull dereferenceable(1) %1)
%76 = icmp eq i32 %75, 0
br i1 %76, label %97, label %77
77: ; preds = %74
%78 = load i8, ptr %1, align 1
%79 = zext i8 %78 to i32
%80 = sub nsw i32 51, %79
%81 = icmp eq i8 %78, 51
br i1 %81, label %82, label %93
82: ; preds = %77
%83 = getelementptr inbounds i8, ptr %1, i64 1
%84 = load i8, ptr %83, align 1
%85 = zext i8 %84 to i32
%86 = sub nsw i32 68, %85
%87 = icmp eq i8 %84, 68
br i1 %87, label %88, label %93
88: ; preds = %82
%89 = getelementptr inbounds i8, ptr %1, i64 2
%90 = load i8, ptr %89, align 1
%91 = zext i8 %90 to i32
%92 = sub nsw i32 0, %91
br label %93
93: ; preds = %77, %82, %88
%94 = phi i32 [ %80, %77 ], [ %86, %82 ], [ %92, %88 ]
%95 = icmp eq i32 %94, 0
%96 = select i1 %95, ptr @PDF_ANNOT_3D, ptr @PDF_ANNOT_UNKNOWN
br label %97
97: ; preds = %93, %74, %71, %68, %65, %62, %59, %56, %53, %50, %47, %44, %41, %38, %35, %32, %29, %26, %23, %20, %17, %14, %11, %8, %5, %2
%98 = phi ptr [ @PDF_ANNOT_TEXT, %2 ], [ @PDF_ANNOT_LINK, %5 ], [ @PDF_ANNOT_FREE_TEXT, %8 ], [ @PDF_ANNOT_LINE, %11 ], [ @PDF_ANNOT_SQUARE, %14 ], [ @PDF_ANNOT_CIRCLE, %17 ], [ @PDF_ANNOT_POLYGON, %20 ], [ @PDF_ANNOT_POLY_LINE, %23 ], [ @PDF_ANNOT_HIGHLIGHT, %26 ], [ @PDF_ANNOT_UNDERLINE, %29 ], [ @PDF_ANNOT_SQUIGGLY, %32 ], [ @PDF_ANNOT_STRIKE_OUT, %35 ], [ @PDF_ANNOT_REDACT, %38 ], [ @PDF_ANNOT_STAMP, %41 ], [ @PDF_ANNOT_CARET, %44 ], [ @PDF_ANNOT_INK, %47 ], [ @PDF_ANNOT_POPUP, %50 ], [ @PDF_ANNOT_FILE_ATTACHMENT, %53 ], [ @PDF_ANNOT_SOUND, %56 ], [ @PDF_ANNOT_MOVIE, %59 ], [ @PDF_ANNOT_WIDGET, %62 ], [ @PDF_ANNOT_SCREEN, %65 ], [ @PDF_ANNOT_PRINTER_MARK, %68 ], [ @PDF_ANNOT_TRAP_NET, %71 ], [ @PDF_ANNOT_WATERMARK, %74 ], [ %96, %93 ]
%99 = load i32, ptr %98, align 4, !tbaa !6
ret i32 %99
}
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @strcmp(ptr nocapture noundef, ptr nocapture noundef) local_unnamed_addr #1
attributes #0 = { mustprogress nofree nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(argmem: read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| sumatrapdf_mupdf_source_pdf_extr_pdf-annot.c_pdf_annot_type_from_string |
; ModuleID = 'postgres_contrib_hstore_extr_hstore_io.c_comparePairs.so'
source_filename = "postgres_contrib_hstore_extr_hstore_io.c_comparePairs.so"
declare dso_local i32 @memcmp(ptr, ptr, i64)
define dso_local i32 @comparePairs(i64 %arg1, i64 %arg2) {
entry:
%EAX-SKT-LOC = alloca i32, align 4
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%1 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %1, align 1
%2 = inttoptr i64 %arg2 to ptr
%3 = load i64, ptr %2, align 1
%4 = sub i64 %memload, %3
%5 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload, i64 %3)
%CF = extractvalue { i64, i1 } %5, 1
%ZF = icmp eq i64 %4, 0
%highbit = and i64 -9223372036854775808, %4
%SF = icmp ne i64 %highbit, 0
%6 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload, i64 %3)
%OF = extractvalue { i64, i1 } %6, 1
%7 = and i64 %4, 255
%8 = call i64 @llvm.ctpop.i64(i64 %7)
%9 = and i64 %8, 1
%PF = icmp eq i64 %9, 0
%CmpZF_JNE = icmp eq i1 %ZF, false
br i1 %CmpZF_JNE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%memref-disp = add i64 %arg1, 16
%10 = inttoptr i64 %memref-disp to ptr
%memload1 = load i32, ptr %10, align 1
%memref-disp2 = add i64 %arg2, 16
%11 = inttoptr i64 %memref-disp2 to ptr
%memload3 = load i32, ptr %11, align 1
%12 = inttoptr i32 %memload1 to ptr
%13 = inttoptr i32 %memload3 to ptr
%EAX = call i32 @memcmp(ptr %12, ptr %13, i64 %memload)
%14 = and i32 %EAX, %EAX
%highbit4 = and i32 -2147483648, %14
%SF5 = icmp ne i32 %highbit4, 0
%ZF6 = icmp eq i32 %14, 0
%15 = and i32 %14, 255
%16 = call i32 @llvm.ctpop.i32(i32 %15)
%17 = and i32 %16, 1
%PF7 = icmp eq i32 %17, 0
store i32 %EAX, ptr %EAX-SKT-LOC, align 1
%CmpZF_JNE42 = icmp eq i1 %ZF6, false
br i1 %CmpZF_JNE42, label %bb.5, label %bb.2
bb.2: ; preds = %bb.1
%memref-disp8 = add i64 %arg1, 8
%18 = inttoptr i64 %memref-disp8 to ptr
%memload9 = load i64, ptr %18, align 1
%memref-disp10 = add i64 %arg2, 8
%19 = inttoptr i64 %memref-disp10 to ptr
%20 = load i64, ptr %19, align 1
%21 = sub i64 %20, %memload9
%22 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %20, i64 %memload9)
%CF11 = extractvalue { i64, i1 } %22, 1
%ZF12 = icmp eq i64 %21, 0
%highbit13 = and i64 -9223372036854775808, %21
%SF14 = icmp ne i64 %highbit13, 0
%23 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %20, i64 %memload9)
%OF15 = extractvalue { i64, i1 } %23, 1
%24 = and i64 %21, 255
%25 = call i64 @llvm.ctpop.i64(i64 %24)
%26 = and i64 %25, 1
%PF16 = icmp eq i64 %26, 0
store i32 0, ptr %EAX-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF12, true
br i1 %CmpZF_JE, label %bb.5, label %bb.3
bb.3: ; preds = %bb.2
%27 = sub i64 %memload9, 1
%28 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload9, i64 1)
%CF17 = extractvalue { i64, i1 } %28, 1
%ZF18 = icmp eq i64 %27, 0
%highbit19 = and i64 -9223372036854775808, %27
%SF20 = icmp ne i64 %highbit19, 0
%29 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload9, i64 1)
%OF21 = extractvalue { i64, i1 } %29, 1
%30 = and i64 %27, 255
%31 = call i64 @llvm.ctpop.i64(i64 %30)
%32 = and i64 %31, 1
%PF22 = icmp eq i64 %32, 0
%33 = zext i1 %CF17 to i32
%34 = add i32 0, %33
%EAX23 = sub i32 0, %34
%35 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 0, i32 %34)
%OF24 = extractvalue { i32, i1 } %35, 1
%36 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 0, i32 %34)
%CF25 = extractvalue { i32, i1 } %36, 1
%EAX30 = or i32 %EAX23, 1
%37 = and i32 %EAX30, 255
%38 = call i32 @llvm.ctpop.i32(i32 %37)
%39 = and i32 %38, 1
%PF26 = icmp eq i32 %39, 0
%ZF27 = icmp eq i32 %EAX30, 0
%highbit28 = and i32 -2147483648, %EAX30
%SF29 = icmp ne i32 %highbit28, 0
store i32 %EAX30, ptr %EAX-SKT-LOC, align 1
br label %bb.5
bb.4: ; preds = %entry
%ZFCmp_CMOVG = icmp eq i1 %ZF, false
%SFOFCmp_CMOVG = icmp eq i1 %SF, %OF
%Cond_CMOVG = and i1 %ZFCmp_CMOVG, %SFOFCmp_CMOVG
%40 = zext i1 %Cond_CMOVG to i8
%EAX31 = zext i8 %40 to i32
%EAX35 = add nsw i32 %EAX31, %EAX31
%highbit32 = and i32 -2147483648, %EAX35
%SF33 = icmp ne i32 %highbit32, 0
%ZF34 = icmp eq i32 %EAX35, 0
%EAX40 = sub i32 %EAX35, 1
%41 = and i32 %EAX40, 255
%42 = call i32 @llvm.ctpop.i32(i32 %41)
%43 = and i32 %42, 1
%PF36 = icmp eq i32 %43, 0
%ZF37 = icmp eq i32 %EAX40, 0
%highbit38 = and i32 -2147483648, %EAX40
%SF39 = icmp ne i32 %highbit38, 0
store i32 %EAX40, ptr %EAX-SKT-LOC, align 1
br label %bb.5
bb.5: ; preds = %bb.4, %bb.3, %bb.2, %bb.1
%EAX41 = load i32, ptr %EAX-SKT-LOC, align 1
ret i32 %EAX41
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/postgres/contrib/hstore/extr_hstore_io.c_comparePairs.c'
source_filename = "AnghaBench/postgres/contrib/hstore/extr_hstore_io.c_comparePairs.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @comparePairs], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @comparePairs(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = load i64, ptr %1, align 8, !tbaa !6
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %22
6: ; preds = %2
%7 = getelementptr inbounds i8, ptr %0, i64 16
%8 = load i32, ptr %7, align 8, !tbaa !12
%9 = getelementptr inbounds i8, ptr %1, i64 16
%10 = load i32, ptr %9, align 8, !tbaa !12
%11 = tail call i32 @memcmp(i32 noundef %8, i32 noundef %10, i64 noundef %3) #2
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %25
13: ; preds = %6
%14 = getelementptr inbounds i8, ptr %1, i64 8
%15 = load i64, ptr %14, align 8, !tbaa !13
%16 = getelementptr inbounds i8, ptr %0, i64 8
%17 = load i64, ptr %16, align 8, !tbaa !13
%18 = icmp eq i64 %15, %17
br i1 %18, label %25, label %19
19: ; preds = %13
%20 = icmp eq i64 %17, 0
%21 = select i1 %20, i32 -1, i32 1
br label %25
22: ; preds = %2
%23 = icmp sgt i64 %3, %4
%24 = select i1 %23, i32 1, i32 -1
br label %25
25: ; preds = %6, %13, %19, %22
%26 = phi i32 [ %24, %22 ], [ %11, %6 ], [ 0, %13 ], [ %21, %19 ]
ret i32 %26
}
declare i32 @memcmp(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0, !8, i64 8, !11, i64 16}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !11, i64 16}
!13 = !{!7, !8, i64 8}
| postgres_contrib_hstore_extr_hstore_io.c_comparePairs |
; ModuleID = 'fastsocket_kernel_sound_core_seq_extr_seq_midi_event.c_pitchbend_decode.so'
source_filename = "fastsocket_kernel_sound_core_seq_extr_seq_midi_event.c_pitchbend_decode.so"
@eh_frame_hdr_12 = private unnamed_addr constant [36 x i8] c"\01\1B\03;$\00\00\00\03\00\00\00 \F0\FF\FF@\00\00\000\F0\FF\FFh\00\00\00\00\F1\FF\FF\80\00\00\00", align 4, !ROData_SecInfo !0
define dso_local i8 @pitchbend_decode(i64 %arg1, i64 %arg2) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
%memref-disp = add i32 %memload, 8192
%1 = trunc i32 %memload to i8
%AL = and i8 %1, 127
%2 = call i8 @llvm.ctpop.i8(i8 %AL)
%3 = and i8 %2, 1
%PF = icmp eq i8 %3, 0
%ZF = icmp eq i8 %AL, 0
%highbit = and i8 -128, %AL
%SF = icmp ne i8 %highbit, 0
%4 = inttoptr i64 %arg2 to ptr
store i8 %AL, ptr %4, align 1
%ECX = lshr i32 %memref-disp, 7
%ZF1 = icmp eq i32 %ECX, 0
%highbit2 = and i32 -2147483648, %ECX
%SF3 = icmp ne i32 %highbit2, 0
%5 = trunc i32 %ECX to i8
%CL = and i8 %5, 127
%6 = call i8 @llvm.ctpop.i8(i8 %CL)
%7 = and i8 %6, 1
%PF4 = icmp eq i8 %7, 0
%ZF5 = icmp eq i8 %CL, 0
%highbit6 = and i8 -128, %CL
%SF7 = icmp ne i8 %highbit6, 0
%memref-disp8 = add i64 %arg2, 1
%8 = inttoptr i64 %memref-disp8 to ptr
store i8 %CL, ptr %8, align 1
ret i8 %AL
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/sound/core/seq/extr_seq_midi_event.c_pitchbend_decode.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/core/seq/extr_seq_midi_event.c_pitchbend_decode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @pitchbend_decode], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync)
define internal void @pitchbend_decode(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = trunc i32 %3 to i8
%5 = and i8 %4, 127
store i8 %5, ptr %1, align 1, !tbaa !13
%6 = lshr i32 %3, 7
%7 = trunc i32 %6 to i8
%8 = and i8 %7, 127
%9 = xor i8 %8, 64
%10 = getelementptr inbounds i8, ptr %1, i64 1
store i8 %9, ptr %10, align 1, !tbaa !13
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !10, i64 0}
!7 = !{!"snd_seq_event", !8, i64 0}
!8 = !{!"TYPE_4__", !9, i64 0}
!9 = !{!"TYPE_3__", !10, i64 0}
!10 = !{!"int", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C/C++ TBAA"}
!13 = !{!11, !11, i64 0}
| fastsocket_kernel_sound_core_seq_extr_seq_midi_event.c_pitchbend_decode |
; ModuleID = 'freebsd_contrib_wpa_src_utils_extr_edit_readline.c_trunc_nl.so'
source_filename = "freebsd_contrib_wpa_src_utils_extr_edit_readline.c_trunc_nl.so"
define dso_local i32 @trunc_nl(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
%1 = trunc i32 %memload to i8
%EAX = zext i8 %1 to i32
%2 = and i32 %EAX, %EAX
%highbit = and i32 -2147483648, %2
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %2, 0
%3 = and i32 %2, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%6 = sub i32 %EAX, 10
%7 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EAX, i32 10)
%CF = extractvalue { i32, i1 } %7, 1
%ZF1 = icmp eq i32 %6, 0
%highbit2 = and i32 -2147483648, %6
%SF3 = icmp ne i32 %highbit2, 0
%8 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EAX, i32 10)
%OF = extractvalue { i32, i1 } %8, 1
%9 = and i32 %6, 255
%10 = call i32 @llvm.ctpop.i32(i32 %9)
%11 = and i32 %10, 1
%PF4 = icmp eq i32 %11, 0
%CmpZF_JE9 = icmp eq i1 %ZF1, true
br i1 %CmpZF_JE9, label %bb.3, label %bb.2
bb.2: ; preds = %bb.1
%RDI = add i64 %arg1, 1
%12 = and i64 %RDI, 255
%13 = call i64 @llvm.ctpop.i64(i64 %12)
%14 = and i64 %13, 1
%PF5 = icmp eq i64 %14, 0
%ZF6 = icmp eq i64 %RDI, 0
%highbit7 = and i64 -9223372036854775808, %RDI
%SF8 = icmp ne i64 %highbit7, 0
br label %entry
bb.3: ; preds = %bb.1
%15 = inttoptr i64 %arg1 to ptr
store i8 0, ptr %15, align 1
br label %bb.4
bb.4: ; preds = %bb.3, %entry
ret i32 %EAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/utils/extr_edit_readline.c_trunc_nl.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/utils/extr_edit_readline.c_trunc_nl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @trunc_nl], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @trunc_nl(ptr nocapture noundef %0) #0 {
br label %2
2: ; preds = %6, %1
%3 = phi ptr [ %0, %1 ], [ %7, %6 ]
%4 = load i8, ptr %3, align 1, !tbaa !6
switch i8 %4, label %6 [
i8 0, label %8
i8 10, label %5
]
5: ; preds = %2
store i8 0, ptr %3, align 1, !tbaa !6
br label %8
6: ; preds = %2
%7 = getelementptr inbounds i8, ptr %3, i64 1
br label %2, !llvm.loop !9
8: ; preds = %2, %5
ret void
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| freebsd_contrib_wpa_src_utils_extr_edit_readline.c_trunc_nl |
; ModuleID = 'linux_drivers_crypto_qat_qat_dh895xcc_extr_adf_dh895xcc_hw_data.c_get_accel_mask.so'
source_filename = "linux_drivers_crypto_qat_qat_dh895xcc_extr_adf_dh895xcc_hw_data.c_get_accel_mask.so"
@ADF_DH895XCC_ACCELERATORS_REG_OFFSET = common dso_local global i32 0, align 4
@ADF_DH895XCC_ACCELERATORS_MASK = common dso_local global i32 0, align 4
define dso_local i32 @get_accel_mask(i32 %arg1) {
entry:
%memload = load i32, ptr @ADF_DH895XCC_ACCELERATORS_REG_OFFSET, align 1
%0 = trunc i32 %memload to i8
%ECX = zext i8 %0 to i32
%1 = trunc i32 %ECX to i8
%2 = zext i8 %1 to i32
%shift-cnt-msk = and i32 %2, 63
%EAX = ashr i32 %arg1, %shift-cnt-msk
%shrd_cf_count_cmp = icmp sgt i32 %shift-cnt-msk, 0
%3 = sub i32 32, %shift-cnt-msk
%shld_cf_count_shift = shl i32 1, %3
%shld_cf_count_and = and i32 %arg1, %shld_cf_count_shift
%shld_cf_count_shft_out = icmp sgt i32 %shld_cf_count_and, 0
%shld_cf_update = select i1 %shrd_cf_count_cmp, i1 %shld_cf_count_shft_out, i1 false
%ZF = icmp eq i32 %EAX, 0
%highbit = and i32 -2147483648, %EAX
%SF = icmp ne i32 %highbit, 0
%EAX1 = xor i32 %EAX, -1
%memload2 = load i32, ptr @ADF_DH895XCC_ACCELERATORS_MASK, align 1
%EAX3 = and i32 %EAX1, %memload2
%4 = and i32 %EAX3, 255
%5 = call i32 @llvm.ctpop.i32(i32 %4)
%6 = and i32 %5, 1
%PF = icmp eq i32 %6, 0
ret i32 %EAX3
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/crypto/qat/qat_dh895xcc/extr_adf_dh895xcc_hw_data.c_get_accel_mask.c'
source_filename = "AnghaBench/linux/drivers/crypto/qat/qat_dh895xcc/extr_adf_dh895xcc_hw_data.c_get_accel_mask.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ADF_DH895XCC_ACCELERATORS_REG_OFFSET = common local_unnamed_addr global i32 0, align 4
@ADF_DH895XCC_ACCELERATORS_MASK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @get_accel_mask], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal i32 @get_accel_mask(i32 noundef %0) #0 {
%2 = load i32, ptr @ADF_DH895XCC_ACCELERATORS_REG_OFFSET, align 4, !tbaa !6
%3 = ashr i32 %0, %2
%4 = xor i32 %3, -1
%5 = load i32, ptr @ADF_DH895XCC_ACCELERATORS_MASK, align 4, !tbaa !6
%6 = and i32 %5, %4
ret i32 %6
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_crypto_qat_qat_dh895xcc_extr_adf_dh895xcc_hw_data.c_get_accel_mask |
; ModuleID = 'freebsd_crypto_openssl_ssl_extr_ssl_lib.c_SSL_CTX_get_num_tickets.so'
source_filename = "freebsd_crypto_openssl_ssl_extr_ssl_lib.c_SSL_CTX_get_num_tickets.so"
define dso_local i64 @SSL_CTX_get_num_tickets(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
ret i64 %memload
}
| ; ModuleID = 'AnghaBench/freebsd/crypto/openssl/ssl/extr_ssl_lib.c_SSL_CTX_get_num_tickets.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/ssl/extr_ssl_lib.c_SSL_CTX_get_num_tickets.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define i64 @SSL_CTX_get_num_tickets(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
ret i64 %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_crypto_openssl_ssl_extr_ssl_lib.c_SSL_CTX_get_num_tickets |
; ModuleID = 'esp-idf_components_protocomm_test_extr_test_protocomm.c_flip_endian.so'
source_filename = "esp-idf_components_protocomm_test_extr_test_protocomm.c_flip_endian.so"
define dso_local void @flip_endian(i64 %arg1, i64 %arg2) {
entry:
%RAX-SKT-LOC76 = alloca i64, align 8
%RAX-SKT-LOC = alloca i64, align 8
%RDX-SKT-LOC = alloca i64, align 8
%0 = sub i64 %arg2, 2
%1 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %arg2, i64 2)
%CF = extractvalue { i64, i1 } %1, 1
%ZF = icmp eq i64 %0, 0
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%2 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %arg2, i64 2)
%OF = extractvalue { i64, i1 } %2, 1
%3 = and i64 %0, 255
%4 = call i64 @llvm.ctpop.i64(i64 %3)
%5 = and i64 %4, 1
%PF = icmp eq i64 %5, 0
%CmpCF_JB = icmp eq i1 %CF, true
br i1 %CmpCF_JB, label %bb.8, label %bb.1
bb.1: ; preds = %entry
%R8 = lshr i64 %arg2, 1
%ZF1 = icmp eq i64 %R8, 0
%highbit2 = and i64 -9223372036854775808, %R8
%SF3 = icmp ne i64 %highbit2, 0
%6 = sub i64 %R8, 1
%7 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R8, i64 1)
%CF4 = extractvalue { i64, i1 } %7, 1
%ZF5 = icmp eq i64 %6, 0
%highbit6 = and i64 -9223372036854775808, %6
%SF7 = icmp ne i64 %highbit6, 0
%8 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R8, i64 1)
%OF8 = extractvalue { i64, i1 } %8, 1
%9 = and i64 %6, 255
%10 = call i64 @llvm.ctpop.i64(i64 %9)
%11 = and i64 %10, 1
%PF9 = icmp eq i64 %11, 0
%CmpZF_JNE = icmp eq i1 %ZF5, false
br i1 %CmpZF_JNE, label %bb.4, label %bb.2
bb.2: ; preds = %bb.1
%12 = trunc i64 %arg2 to i8
%13 = and i8 %12, 2
%14 = call i8 @llvm.ctpop.i8(i8 %13)
%15 = and i8 %14, 1
%PF10 = icmp eq i8 %15, 0
%ZF11 = icmp eq i8 %13, 0
%highbit12 = and i8 -128, %13
%SF13 = icmp ne i8 %highbit12, 0
%16 = zext i32 0 to i64
store i64 %16, ptr %RAX-SKT-LOC76, align 1
%CmpZF_JNE93 = icmp eq i1 %ZF11, false
br i1 %CmpZF_JNE93, label %bb.7, label %bb.3
bb.3: ; preds = %bb.2
br label %bb.8
bb.4: ; preds = %bb.1
%memref-disp = add i64 %arg1, 4
%memref-idxreg = mul i64 4, %arg2
%memref-basereg = add i64 %arg1, %memref-idxreg
%R10 = add i64 %memref-basereg, -4
%17 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %memref-basereg, i64 -4)
%CF14 = extractvalue { i64, i1 } %17, 1
%18 = and i64 %R10, 255
%19 = call i64 @llvm.ctpop.i64(i64 %18)
%20 = and i64 %19, 1
%PF15 = icmp eq i64 %20, 0
%ZF16 = icmp eq i64 %R10, 0
%highbit17 = and i64 -9223372036854775808, %R10
%SF18 = icmp ne i64 %highbit17, 0
%21 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %memref-basereg, i64 -4)
%OF19 = extractvalue { i64, i1 } %21, 1
%R824 = and i64 %R8, -2
%22 = and i64 %R824, 255
%23 = call i64 @llvm.ctpop.i64(i64 %22)
%24 = and i64 %23, 1
%PF20 = icmp eq i64 %24, 0
%ZF21 = icmp eq i64 %R824, 0
%highbit22 = and i64 -9223372036854775808, %R824
%SF23 = icmp ne i64 %highbit22, 0
%CF25 = icmp ne i64 0, 0
%R830 = sub i64 0, %R824
%ZF26 = icmp eq i64 %R830, 0
%highbit27 = and i64 -9223372036854775808, %R830
%SF28 = icmp ne i64 %highbit27, 0
%25 = and i64 %R830, 255
%26 = call i64 @llvm.ctpop.i64(i64 %25)
%27 = and i64 %26, 1
%PF29 = icmp eq i64 %27, 0
store i64 %memref-disp, ptr %RDX-SKT-LOC, align 1
%28 = zext i32 0 to i64
store i64 %28, ptr %RAX-SKT-LOC, align 1
br label %bb.5
bb.5: ; preds = %bb.4, %bb.5
%RDX = load i64, ptr %RDX-SKT-LOC, align 1
%memref-disp31 = add i64 %RDX, -4
%29 = inttoptr i64 %memref-disp31 to ptr
%memload = load i32, ptr %29, align 1
%RAX = load i64, ptr %RAX-SKT-LOC, align 1
%memref-idxreg32 = mul i64 4, %RAX
%memref-basereg33 = add i64 %R10, %memref-idxreg32
%30 = inttoptr i64 %memref-basereg33 to ptr
%memload34 = load i32, ptr %30, align 1
%memref-disp35 = add i64 %RDX, -4
%31 = inttoptr i64 %memref-disp35 to ptr
store i32 %memload34, ptr %31, align 1
%memref-idxreg36 = mul i64 4, %RAX
%memref-basereg37 = add i64 %R10, %memref-idxreg36
%32 = inttoptr i64 %memref-basereg37 to ptr
store i32 %memload, ptr %32, align 1
%33 = inttoptr i64 %RDX to ptr
%memload38 = load i32, ptr %33, align 1
%memref-idxreg39 = mul i64 4, %RAX
%memref-basereg40 = add i64 %R10, %memref-idxreg39
%memref-disp41 = add i64 %memref-basereg40, -4
%34 = inttoptr i64 %memref-disp41 to ptr
%memload42 = load i32, ptr %34, align 1
%35 = inttoptr i64 %RDX to ptr
store i32 %memload42, ptr %35, align 1
%memref-idxreg43 = mul i64 4, %RAX
%memref-basereg44 = add i64 %R10, %memref-idxreg43
%memref-disp45 = add i64 %memref-basereg44, -4
%36 = inttoptr i64 %memref-disp45 to ptr
store i32 %memload38, ptr %36, align 1
%RDX52 = add i64 %RDX, 8
%37 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RDX, i64 8)
%CF46 = extractvalue { i64, i1 } %37, 1
%38 = and i64 %RDX52, 255
%39 = call i64 @llvm.ctpop.i64(i64 %38)
%40 = and i64 %39, 1
%PF47 = icmp eq i64 %40, 0
%ZF48 = icmp eq i64 %RDX52, 0
%highbit49 = and i64 -9223372036854775808, %RDX52
%SF50 = icmp ne i64 %highbit49, 0
%41 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RDX, i64 8)
%OF51 = extractvalue { i64, i1 } %41, 1
%RAX59 = add i64 %RAX, -2
%42 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RAX, i64 -2)
%CF53 = extractvalue { i64, i1 } %42, 1
%43 = and i64 %RAX59, 255
%44 = call i64 @llvm.ctpop.i64(i64 %43)
%45 = and i64 %44, 1
%PF54 = icmp eq i64 %45, 0
%ZF55 = icmp eq i64 %RAX59, 0
%highbit56 = and i64 -9223372036854775808, %RAX59
%SF57 = icmp ne i64 %highbit56, 0
%46 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RAX, i64 -2)
%OF58 = extractvalue { i64, i1 } %46, 1
%47 = sub i64 %R830, %RAX59
%48 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R830, i64 %RAX59)
%CF60 = extractvalue { i64, i1 } %48, 1
%ZF61 = icmp eq i64 %47, 0
%highbit62 = and i64 -9223372036854775808, %47
%SF63 = icmp ne i64 %highbit62, 0
%49 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R830, i64 %RAX59)
%OF64 = extractvalue { i64, i1 } %49, 1
%50 = and i64 %47, 255
%51 = call i64 @llvm.ctpop.i64(i64 %50)
%52 = and i64 %51, 1
%PF65 = icmp eq i64 %52, 0
%CmpZF_JNE94 = icmp eq i1 %ZF61, false
store i64 %RAX59, ptr %RAX-SKT-LOC, align 1
store i64 %RDX52, ptr %RDX-SKT-LOC, align 1
br i1 %CmpZF_JNE94, label %bb.5, label %bb.6
bb.6: ; preds = %bb.5
%CF66 = icmp ne i64 0, 0
%ld-stk-prom = load i64, ptr %RAX-SKT-LOC, align 8
%RAX71 = sub i64 0, %ld-stk-prom
%ZF67 = icmp eq i64 %RAX71, 0
%highbit68 = and i64 -9223372036854775808, %RAX71
%SF69 = icmp ne i64 %highbit68, 0
%53 = and i64 %RAX71, 255
%54 = call i64 @llvm.ctpop.i64(i64 %53)
%55 = and i64 %54, 1
%PF70 = icmp eq i64 %55, 0
%56 = trunc i64 %arg2 to i8
%57 = and i8 %56, 2
%58 = call i8 @llvm.ctpop.i8(i8 %57)
%59 = and i8 %58, 1
%PF72 = icmp eq i8 %59, 0
%ZF73 = icmp eq i8 %57, 0
%highbit74 = and i8 -128, %57
%SF75 = icmp ne i8 %highbit74, 0
store i64 %RAX71, ptr %RAX-SKT-LOC76, align 1
%CmpZF_JE = icmp eq i1 %ZF73, true
br i1 %CmpZF_JE, label %bb.8, label %bb.7
bb.7: ; preds = %bb.6, %bb.2
%RAX77 = load i64, ptr %RAX-SKT-LOC76, align 1
%memref-idxreg78 = mul i64 4, %RAX77
%memref-basereg79 = add i64 %arg1, %memref-idxreg78
%60 = inttoptr i64 %memref-basereg79 to ptr
%memload80 = load i32, ptr %60, align 1
%RDX81 = xor i64 %RAX77, -1
%RDX85 = add nsw i64 %RDX81, %arg2
%highbit82 = and i64 -9223372036854775808, %RDX85
%SF83 = icmp ne i64 %highbit82, 0
%ZF84 = icmp eq i64 %RDX85, 0
%memref-idxreg86 = mul i64 4, %RDX85
%memref-basereg87 = add i64 %arg1, %memref-idxreg86
%61 = inttoptr i64 %memref-basereg87 to ptr
%memload88 = load i32, ptr %61, align 1
%memref-idxreg89 = mul i64 4, %RAX77
%memref-basereg90 = add i64 %arg1, %memref-idxreg89
%62 = inttoptr i64 %memref-basereg90 to ptr
store i32 %memload88, ptr %62, align 1
%memref-idxreg91 = mul i64 4, %RDX85
%memref-basereg92 = add i64 %arg1, %memref-idxreg91
%63 = inttoptr i64 %memref-basereg92 to ptr
store i32 %memload80, ptr %63, align 1
br label %bb.8
bb.8: ; preds = %bb.7, %bb.6, %bb.3, %entry
ret void
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/esp-idf/components/protocomm/test/extr_test_protocomm.c_flip_endian.c'
source_filename = "AnghaBench/esp-idf/components/protocomm/test/extr_test_protocomm.c_flip_endian.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @flip_endian], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(argmem: readwrite) uwtable(sync)
define internal void @flip_endian(ptr nocapture noundef %0, i64 noundef %1) #0 {
%3 = lshr i64 %1, 1
%4 = getelementptr i32, ptr %0, i64 %1
%5 = icmp ult i64 %1, 2
br i1 %5, label %6, label %7
6: ; preds = %7, %2
ret void
7: ; preds = %2, %7
%8 = phi i64 [ %14, %7 ], [ 0, %2 ]
%9 = getelementptr inbounds i32, ptr %0, i64 %8
%10 = load i32, ptr %9, align 4, !tbaa !6
%11 = xor i64 %8, -1
%12 = getelementptr i32, ptr %4, i64 %11
%13 = load i32, ptr %12, align 4, !tbaa !6
store i32 %13, ptr %9, align 4, !tbaa !6
store i32 %10, ptr %12, align 4, !tbaa !6
%14 = add nuw nsw i64 %8, 1
%15 = icmp eq i64 %14, %3
br i1 %15, label %6, label %7, !llvm.loop !10
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| esp-idf_components_protocomm_test_extr_test_protocomm.c_flip_endian |
; ModuleID = 'mruby_mrbgems_mruby-compiler_core_extr_codegen.c_new_label.so'
source_filename = "mruby_mrbgems_mruby-compiler_core_extr_codegen.c_new_label.so"
define dso_local i32 @new_label(i64 %arg1) {
entry:
%memref-disp = add i64 %arg1, 4
%0 = inttoptr i64 %memref-disp to ptr
%memload = load i32, ptr %0, align 1
%1 = inttoptr i64 %arg1 to ptr
store i32 %memload, ptr %1, align 1
ret i32 %memload
}
| ; ModuleID = 'AnghaBench/mruby/mrbgems/mruby-compiler/core/extr_codegen.c_new_label.c'
source_filename = "AnghaBench/mruby/mrbgems/mruby-compiler/core/extr_codegen.c_new_label.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @new_label], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync)
define internal i32 @new_label(ptr nocapture noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 4
%3 = load i32, ptr %2, align 4, !tbaa !6
store i32 %3, ptr %0, align 4, !tbaa !11
ret i32 %3
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
| mruby_mrbgems_mruby-compiler_core_extr_codegen.c_new_label |
; ModuleID = 'reactos_dll_win32_hhctrl.ocx_extr_content.c_insert_item.so'
source_filename = "reactos_dll_win32_hhctrl.ocx_extr_content.c_insert_item.so"
define dso_local i32 @insert_item(i64 %arg1, i64 %arg2, i32 %arg3) {
entry:
%EAX-SKT-LOC = alloca i64, align 8
%RDI-SKT-LOC = alloca i64, align 8
%RCX-SKT-LOC = alloca i64, align 8
%RDX-SKT-LOC = alloca i64, align 8
%0 = and i64 %arg1, %arg1
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %0, 0
%1 = and i64 %0, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
store i64 %arg1, ptr %RDI-SKT-LOC, align 1
store i64 %arg2, ptr %EAX-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.13, label %bb.1
bb.1: ; preds = %entry
%4 = and i64 %arg2, %arg2
%highbit1 = and i64 -9223372036854775808, %4
%SF2 = icmp ne i64 %highbit1, 0
%ZF3 = icmp eq i64 %4, 0
%5 = and i64 %4, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF4 = icmp eq i64 %7, 0
%CmpZF_JE38 = icmp eq i1 %ZF3, true
br i1 %CmpZF_JE38, label %bb.12, label %bb.2
bb.2: ; preds = %bb.1
%8 = sub i32 %arg3, 129
%9 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %arg3, i32 129)
%CF = extractvalue { i32, i1 } %9, 1
%ZF5 = icmp eq i32 %8, 0
%highbit6 = and i32 -2147483648, %8
%SF7 = icmp ne i32 %highbit6, 0
%10 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %arg3, i32 129)
%OF = extractvalue { i32, i1 } %10, 1
%11 = and i32 %8, 255
%12 = call i32 @llvm.ctpop.i32(i32 %11)
%13 = and i32 %12, 1
%PF8 = icmp eq i32 %13, 0
%CmpZF_JE39 = icmp eq i1 %ZF5, true
br i1 %CmpZF_JE39, label %bb.5, label %bb.3
bb.3: ; preds = %bb.2
%14 = sub i32 %arg3, 128
%15 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %arg3, i32 128)
%CF9 = extractvalue { i32, i1 } %15, 1
%ZF10 = icmp eq i32 %14, 0
%highbit11 = and i32 -2147483648, %14
%SF12 = icmp ne i32 %highbit11, 0
%16 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %arg3, i32 128)
%OF13 = extractvalue { i32, i1 } %16, 1
%17 = and i32 %14, 255
%18 = call i32 @llvm.ctpop.i32(i32 %17)
%19 = and i32 %18, 1
%PF14 = icmp eq i32 %19, 0
%CmpZF_JNE = icmp eq i1 %ZF10, false
br i1 %CmpZF_JNE, label %bb.9, label %bb.4
bb.4: ; preds = %bb.3
%RDI = add i64 %arg1, 8
%20 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %arg1, i64 8)
%CF15 = extractvalue { i64, i1 } %20, 1
%21 = and i64 %RDI, 255
%22 = call i64 @llvm.ctpop.i64(i64 %21)
%23 = and i64 %22, 1
%PF16 = icmp eq i64 %23, 0
%ZF17 = icmp eq i64 %RDI, 0
%highbit18 = and i64 -9223372036854775808, %RDI
%SF19 = icmp ne i64 %highbit18, 0
%24 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %arg1, i64 8)
%OF20 = extractvalue { i64, i1 } %24, 1
store i64 %RDI, ptr %RCX-SKT-LOC, align 1
store i64 %arg2, ptr %RDI-SKT-LOC, align 1
br label %bb.11
bb.9: ; preds = %bb.3
br label %UnifiedReturnBlock
bb.5: ; preds = %bb.2
%25 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %25, align 1
%26 = and i64 %memload, %memload
%highbit21 = and i64 -9223372036854775808, %26
%SF22 = icmp ne i64 %highbit21, 0
%ZF23 = icmp eq i64 %26, 0
%27 = and i64 %26, 255
%28 = call i64 @llvm.ctpop.i64(i64 %27)
%29 = and i64 %28, 1
%PF24 = icmp eq i64 %29, 0
store i64 %memload, ptr %RDX-SKT-LOC, align 1
%CmpZF_JE40 = icmp eq i1 %ZF23, true
br i1 %CmpZF_JE40, label %bb.10, label %bb.7
bb.7: ; preds = %bb.7, %bb.5
%RDX = load i64, ptr %RDX-SKT-LOC, align 1
%memref-disp = add i64 %RDX, 8
%30 = inttoptr i64 %memref-disp to ptr
%memload25 = load i64, ptr %30, align 1
%31 = and i64 %memload25, %memload25
%highbit26 = and i64 -9223372036854775808, %31
%SF27 = icmp ne i64 %highbit26, 0
%ZF28 = icmp eq i64 %31, 0
%32 = and i64 %31, 255
%33 = call i64 @llvm.ctpop.i64(i64 %32)
%34 = and i64 %33, 1
%PF29 = icmp eq i64 %34, 0
%CmpZF_JNE41 = icmp eq i1 %ZF28, false
store i64 %memload25, ptr %RDX-SKT-LOC, align 1
br i1 %CmpZF_JNE41, label %bb.7, label %bb.8
bb.8: ; preds = %bb.7
%RCX = add i64 %RDX, 8
%35 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RDX, i64 8)
%CF30 = extractvalue { i64, i1 } %35, 1
%36 = and i64 %RCX, 255
%37 = call i64 @llvm.ctpop.i64(i64 %36)
%38 = and i64 %37, 1
%PF31 = icmp eq i64 %38, 0
%ZF32 = icmp eq i64 %RCX, 0
%highbit33 = and i64 -9223372036854775808, %RCX
%SF34 = icmp ne i64 %highbit33, 0
%39 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RDX, i64 8)
%OF35 = extractvalue { i64, i1 } %39, 1
store i64 %RCX, ptr %RCX-SKT-LOC, align 1
br label %bb.11
bb.10: ; preds = %bb.5
store i64 %arg1, ptr %RCX-SKT-LOC, align 1
br label %bb.11
bb.11: ; preds = %bb.10, %bb.8, %bb.4
%RCX36 = load i64, ptr %RCX-SKT-LOC, align 1
%40 = inttoptr i64 %RCX36 to ptr
store i64 %arg2, ptr %40, align 1
br label %bb.12
bb.12: ; preds = %bb.11, %bb.1
%RDI37 = load i64, ptr %RDI-SKT-LOC, align 1
store i64 %RDI37, ptr %EAX-SKT-LOC, align 1
br label %bb.13
bb.13: ; preds = %bb.12, %entry
%41 = load i64, ptr %EAX-SKT-LOC, align 1
%EAX = trunc i64 %41 to i32
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.13, %bb.9
%UnifiedRetVal = phi i32 [ 0, %bb.9 ], [ %EAX, %bb.13 ]
ret i32 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/reactos/dll/win32/hhctrl.ocx/extr_content.c_insert_item.c'
source_filename = "AnghaBench/reactos/dll/win32/hhctrl.ocx/extr_content.c_insert_item.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @insert_item], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync)
define internal noundef ptr @insert_item(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = icmp eq ptr %0, null
br i1 %4, label %23, label %5
5: ; preds = %3
%6 = icmp eq ptr %1, null
br i1 %6, label %23, label %7
7: ; preds = %5
switch i32 %2, label %23 [
i32 128, label %8
i32 129, label %10
]
8: ; preds = %7
%9 = getelementptr inbounds i8, ptr %0, i64 8
br label %20
10: ; preds = %7
%11 = load ptr, ptr %0, align 8, !tbaa !6
%12 = icmp eq ptr %11, null
br i1 %12, label %20, label %13
13: ; preds = %10, %13
%14 = phi ptr [ %16, %13 ], [ %11, %10 ]
%15 = getelementptr inbounds i8, ptr %14, i64 8
%16 = load ptr, ptr %15, align 8, !tbaa !11
%17 = icmp eq ptr %16, null
br i1 %17, label %18, label %13, !llvm.loop !12
18: ; preds = %13
%19 = getelementptr inbounds i8, ptr %14, i64 8
br label %20
20: ; preds = %18, %10, %8
%21 = phi ptr [ %9, %8 ], [ %0, %10 ], [ %19, %18 ]
%22 = phi ptr [ %1, %8 ], [ %0, %10 ], [ %0, %18 ]
store ptr %1, ptr %21, align 8, !tbaa !14
br label %23
23: ; preds = %20, %7, %5, %3
%24 = phi ptr [ %1, %3 ], [ %0, %5 ], [ null, %7 ], [ %22, %20 ]
ret ptr %24
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0, !8, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 8}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!8, !8, i64 0}
| reactos_dll_win32_hhctrl.ocx_extr_content.c_insert_item |
; ModuleID = 'reactos_sdk_lib_3rdparty_freetype_src_bdf_extr_bdflib.c__bdf_list_shift.so'
source_filename = "reactos_sdk_lib_3rdparty_freetype_src_bdf_extr_bdflib.c__bdf_list_shift.so"
define dso_local void @_bdf_list_shift(i64 %arg1, i64 %arg2) {
entry:
%R10-SKT-LOC = alloca i64, align 8
%RDX-SKT-LOC = alloca i64, align 8
%R8-SKT-LOC = alloca i64, align 8
%RAX-SKT-LOC131 = alloca i64, align 8
%RAX-SKT-LOC109 = alloca i64, align 8
%RCX-SKT-LOC = alloca i64, align 8
%RAX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
%0 = and i64 %arg1, %arg1
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %0, 0
%1 = and i64 %0, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.18, label %bb.1
bb.1: ; preds = %entry
%4 = and i64 %arg2, %arg2
%highbit1 = and i64 -9223372036854775808, %4
%SF2 = icmp ne i64 %highbit1, 0
%ZF3 = icmp eq i64 %4, 0
%5 = and i64 %4, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF4 = icmp eq i64 %7, 0
%CmpZF_JE178 = icmp eq i1 %ZF3, true
br i1 %CmpZF_JE178, label %bb.18, label %bb.2
bb.2: ; preds = %bb.1
%8 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %8, align 1
%9 = and i64 %memload, %memload
%highbit5 = and i64 -9223372036854775808, %9
%SF6 = icmp ne i64 %highbit5, 0
%ZF7 = icmp eq i64 %9, 0
%10 = and i64 %9, 255
%11 = call i64 @llvm.ctpop.i64(i64 %10)
%12 = and i64 %11, 1
%PF8 = icmp eq i64 %12, 0
%CmpZF_JE179 = icmp eq i1 %ZF7, true
br i1 %CmpZF_JE179, label %bb.18, label %bb.3
bb.3: ; preds = %bb.2
%R10 = sub i64 %memload, %arg2
%13 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload, i64 %arg2)
%CF = extractvalue { i64, i1 } %13, 1
%ZF9 = icmp eq i64 %R10, 0
%highbit10 = and i64 -9223372036854775808, %R10
%SF11 = icmp ne i64 %highbit10, 0
%14 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload, i64 %arg2)
%OF = extractvalue { i64, i1 } %14, 1
%15 = and i64 %R10, 255
%16 = call i64 @llvm.ctpop.i64(i64 %15)
%17 = and i64 %16, 1
%PF12 = icmp eq i64 %17, 0
store i64 %R10, ptr %R10-SKT-LOC, align 1
%CFCmp_JBE = icmp eq i1 %CF, true
%ZFCmp_JBE = icmp eq i1 %ZF9, true
%CFAndZF_JBE = or i1 %ZFCmp_JBE, %CFCmp_JBE
br i1 %CFAndZF_JBE, label %bb.13, label %bb.4
bb.4: ; preds = %bb.3
%memref-disp = add i64 %arg1, 8
%18 = inttoptr i64 %memref-disp to ptr
%memload13 = load i64, ptr %18, align 1
%ld-stk-prom176 = load i64, ptr %R10-SKT-LOC, align 8
%19 = sub i64 %ld-stk-prom176, 8
%ld-stk-prom175 = load i64, ptr %R10-SKT-LOC, align 8
%20 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %ld-stk-prom175, i64 8)
%CF14 = extractvalue { i64, i1 } %20, 1
%ZF15 = icmp eq i64 %19, 0
%highbit16 = and i64 -9223372036854775808, %19
%SF17 = icmp ne i64 %highbit16, 0
%ld-stk-prom174 = load i64, ptr %R10-SKT-LOC, align 8
%21 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %ld-stk-prom174, i64 8)
%OF18 = extractvalue { i64, i1 } %21, 1
%22 = and i64 %19, 255
%23 = call i64 @llvm.ctpop.i64(i64 %22)
%24 = and i64 %23, 1
%PF19 = icmp eq i64 %24, 0
%25 = zext i32 0 to i64
store i64 %25, ptr %R8-SKT-LOC, align 1
%CmpCF_JB = icmp eq i1 %CF14, true
br i1 %CmpCF_JB, label %bb.14, label %bb.5
bb.5: ; preds = %bb.4
%memref-idxreg = mul i64 4, %arg2
%CF20 = icmp ne i64 0, 0
%RCX = sub i64 0, %memref-idxreg
%ZF21 = icmp eq i64 %RCX, 0
%highbit22 = and i64 -9223372036854775808, %RCX
%SF23 = icmp ne i64 %highbit22, 0
%26 = and i64 %RCX, 255
%27 = call i64 @llvm.ctpop.i64(i64 %26)
%28 = and i64 %27, 1
%PF24 = icmp eq i64 %28, 0
%29 = sub i64 %RCX, 32
%30 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RCX, i64 32)
%CF25 = extractvalue { i64, i1 } %30, 1
%ZF26 = icmp eq i64 %29, 0
%highbit27 = and i64 -9223372036854775808, %29
%SF28 = icmp ne i64 %highbit27, 0
%31 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RCX, i64 32)
%OF29 = extractvalue { i64, i1 } %31, 1
%32 = and i64 %29, 255
%33 = call i64 @llvm.ctpop.i64(i64 %32)
%34 = and i64 %33, 1
%PF30 = icmp eq i64 %34, 0
store i64 %arg2, ptr %RAX-SKT-LOC131, align 1
%CmpCF_JB180 = icmp eq i1 %CF25, true
br i1 %CmpCF_JB180, label %bb.15, label %bb.6
bb.6: ; preds = %bb.5
%ld-stk-prom173 = load i64, ptr %R10-SKT-LOC, align 8
%R8 = and i64 %ld-stk-prom173, -8
%35 = and i64 %R8, 255
%36 = call i64 @llvm.ctpop.i64(i64 %35)
%37 = and i64 %36, 1
%PF31 = icmp eq i64 %37, 0
%ZF32 = icmp eq i64 %R8, 0
%highbit33 = and i64 -9223372036854775808, %R8
%SF34 = icmp ne i64 %highbit33, 0
%memref-disp35 = add i64 %R8, -8
%R9 = lshr i64 %memref-disp35, 3
%ZF36 = icmp eq i64 %R9, 0
%highbit37 = and i64 -9223372036854775808, %R9
%SF38 = icmp ne i64 %highbit37, 0
%R943 = add i64 %R9, 1
%38 = and i64 %R943, 255
%39 = call i64 @llvm.ctpop.i64(i64 %38)
%40 = and i64 %39, 1
%PF39 = icmp eq i64 %40, 0
%ZF40 = icmp eq i64 %R943, 0
%highbit41 = and i64 -9223372036854775808, %R943
%SF42 = icmp ne i64 %highbit41, 0
%41 = and i64 %memref-disp35, %memref-disp35
%highbit44 = and i64 -9223372036854775808, %41
%SF45 = icmp ne i64 %highbit44, 0
%ZF46 = icmp eq i64 %41, 0
%42 = and i64 %41, 255
%43 = call i64 @llvm.ctpop.i64(i64 %42)
%44 = and i64 %43, 1
%PF47 = icmp eq i64 %44, 0
store i64 %R8, ptr %R8-SKT-LOC, align 1
%CmpZF_JE181 = icmp eq i1 %ZF46, true
br i1 %CmpZF_JE181, label %bb.19, label %bb.7
bb.7: ; preds = %bb.6
%RCX52 = and i64 %R943, -2
%45 = and i64 %RCX52, 255
%46 = call i64 @llvm.ctpop.i64(i64 %45)
%47 = and i64 %46, 1
%PF48 = icmp eq i64 %47, 0
%ZF49 = icmp eq i64 %RCX52, 0
%highbit50 = and i64 -9223372036854775808, %RCX52
%SF51 = icmp ne i64 %highbit50, 0
%memref-idxreg53 = mul i64 4, %arg2
%memref-basereg = add i64 %memload13, %memref-idxreg53
%RBX = add i64 %memref-basereg, 48
%48 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %memref-basereg, i64 48)
%CF54 = extractvalue { i64, i1 } %48, 1
%49 = and i64 %RBX, 255
%50 = call i64 @llvm.ctpop.i64(i64 %49)
%51 = and i64 %50, 1
%PF55 = icmp eq i64 %51, 0
%ZF56 = icmp eq i64 %RBX, 0
%highbit57 = and i64 -9223372036854775808, %RBX
%SF58 = icmp ne i64 %highbit57, 0
%52 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %memref-basereg, i64 48)
%OF59 = extractvalue { i64, i1 } %52, 1
%53 = zext i32 0 to i64
store i64 %53, ptr %RAX-SKT-LOC, align 1
store i64 %RCX52, ptr %RCX-SKT-LOC, align 1
br label %bb.8
bb.8: ; preds = %bb.7, %bb.8
%RAX = load i64, ptr %RAX-SKT-LOC, align 1
%memref-idxreg60 = mul i64 4, %RAX
%memref-basereg61 = add i64 %RBX, %memref-idxreg60
%memref-disp62 = add i64 %memref-basereg61, -48
%54 = inttoptr i64 %memref-disp62 to ptr
%memload63 = load <4 x float>, ptr %54, align 1
%memref-idxreg64 = mul i64 4, %RAX
%memref-basereg65 = add i64 %RBX, %memref-idxreg64
%memref-disp66 = add i64 %memref-basereg65, -32
%55 = inttoptr i64 %memref-disp66 to ptr
%memload67 = load <4 x float>, ptr %55, align 1
%memref-idxreg68 = mul i64 4, %RAX
%memref-basereg69 = add i64 %memload13, %memref-idxreg68
%56 = inttoptr i64 %memref-basereg69 to ptr
store <4 x float> %memload63, ptr %56, align 1
%memref-idxreg70 = mul i64 4, %RAX
%memref-basereg71 = add i64 %memload13, %memref-idxreg70
%memref-disp72 = add i64 %memref-basereg71, 16
%57 = inttoptr i64 %memref-disp72 to ptr
store <4 x float> %memload67, ptr %57, align 1
%memref-idxreg73 = mul i64 4, %RAX
%memref-basereg74 = add i64 %RBX, %memref-idxreg73
%memref-disp75 = add i64 %memref-basereg74, -16
%58 = inttoptr i64 %memref-disp75 to ptr
%memload76 = load <4 x float>, ptr %58, align 1
%memref-idxreg77 = mul i64 4, %RAX
%memref-basereg78 = add i64 %RBX, %memref-idxreg77
%59 = inttoptr i64 %memref-basereg78 to ptr
%memload79 = load <4 x float>, ptr %59, align 1
%memref-idxreg80 = mul i64 4, %RAX
%memref-basereg81 = add i64 %memload13, %memref-idxreg80
%memref-disp82 = add i64 %memref-basereg81, 32
%60 = inttoptr i64 %memref-disp82 to ptr
store <4 x float> %memload76, ptr %60, align 1
%memref-idxreg83 = mul i64 4, %RAX
%memref-basereg84 = add i64 %memload13, %memref-idxreg83
%memref-disp85 = add i64 %memref-basereg84, 48
%61 = inttoptr i64 %memref-disp85 to ptr
store <4 x float> %memload79, ptr %61, align 1
%RAX92 = add i64 %RAX, 16
%62 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RAX, i64 16)
%CF86 = extractvalue { i64, i1 } %62, 1
%63 = and i64 %RAX92, 255
%64 = call i64 @llvm.ctpop.i64(i64 %63)
%65 = and i64 %64, 1
%PF87 = icmp eq i64 %65, 0
%ZF88 = icmp eq i64 %RAX92, 0
%highbit89 = and i64 -9223372036854775808, %RAX92
%SF90 = icmp ne i64 %highbit89, 0
%66 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RAX, i64 16)
%OF91 = extractvalue { i64, i1 } %66, 1
%RCX93 = load i64, ptr %RCX-SKT-LOC, align 1
%RCX100 = add i64 %RCX93, -2
%67 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RCX93, i64 -2)
%CF94 = extractvalue { i64, i1 } %67, 1
%68 = and i64 %RCX100, 255
%69 = call i64 @llvm.ctpop.i64(i64 %68)
%70 = and i64 %69, 1
%PF95 = icmp eq i64 %70, 0
%ZF96 = icmp eq i64 %RCX100, 0
%highbit97 = and i64 -9223372036854775808, %RCX100
%SF98 = icmp ne i64 %highbit97, 0
%71 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RCX93, i64 -2)
%OF99 = extractvalue { i64, i1 } %71, 1
store i64 %RAX92, ptr %RAX-SKT-LOC109, align 1
%CmpZF_JNE = icmp eq i1 %ZF96, false
store i64 %RAX92, ptr %RAX-SKT-LOC, align 1
store i64 %RCX100, ptr %RCX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.8, label %bb.9
bb.9: ; preds = %bb.8
%72 = trunc i64 %R943 to i8
%73 = and i8 %72, 1
%74 = call i8 @llvm.ctpop.i8(i8 %73)
%75 = and i8 %74, 1
%PF101 = icmp eq i8 %75, 0
%ZF102 = icmp eq i8 %73, 0
%highbit103 = and i8 -128, %73
%SF104 = icmp ne i8 %highbit103, 0
%CmpZF_JE182 = icmp eq i1 %ZF102, true
br i1 %CmpZF_JE182, label %bb.11, label %bb.10
bb.19: ; preds = %bb.6
%76 = trunc i64 %R943 to i8
%77 = and i8 %76, 1
%78 = call i8 @llvm.ctpop.i8(i8 %77)
%79 = and i8 %78, 1
%PF105 = icmp eq i8 %79, 0
%ZF106 = icmp eq i8 %77, 0
%highbit107 = and i8 -128, %77
%SF108 = icmp ne i8 %highbit107, 0
%80 = zext i32 0 to i64
store i64 %80, ptr %RAX-SKT-LOC109, align 1
%CmpZF_JNE183 = icmp eq i1 %ZF106, false
br i1 %CmpZF_JNE183, label %bb.10, label %bb.20
bb.20: ; preds = %bb.19
br label %bb.11
bb.10: ; preds = %bb.19, %bb.9
%RAX110 = load i64, ptr %RAX-SKT-LOC109, align 1
%memref-basereg111 = add i64 %RAX110, %arg2
%memref-idxreg112 = mul i64 4, %memref-basereg111
%memref-basereg113 = add i64 %memload13, %memref-idxreg112
%81 = inttoptr i64 %memref-basereg113 to ptr
%memload114 = load <4 x float>, ptr %81, align 1
%memref-idxreg115 = mul i64 4, %memref-basereg111
%memref-basereg116 = add i64 %memload13, %memref-idxreg115
%memref-disp117 = add i64 %memref-basereg116, 16
%82 = inttoptr i64 %memref-disp117 to ptr
%memload118 = load <4 x float>, ptr %82, align 1
%memref-idxreg119 = mul i64 4, %RAX110
%memref-basereg120 = add i64 %memload13, %memref-idxreg119
%83 = inttoptr i64 %memref-basereg120 to ptr
store <4 x float> %memload114, ptr %83, align 1
%memref-idxreg121 = mul i64 4, %RAX110
%memref-basereg122 = add i64 %memload13, %memref-idxreg121
%memref-disp123 = add i64 %memref-basereg122, 16
%84 = inttoptr i64 %memref-disp123 to ptr
store <4 x float> %memload118, ptr %84, align 1
br label %bb.11
bb.11: ; preds = %bb.10, %bb.20, %bb.9
%ld-stk-prom137 = load i64, ptr %R8-SKT-LOC, align 8
%ld-stk-prom172 = load i64, ptr %R10-SKT-LOC, align 8
%85 = sub i64 %ld-stk-prom172, %ld-stk-prom137
%ld-stk-prom136 = load i64, ptr %R8-SKT-LOC, align 8
%ld-stk-prom171 = load i64, ptr %R10-SKT-LOC, align 8
%86 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %ld-stk-prom171, i64 %ld-stk-prom136)
%CF124 = extractvalue { i64, i1 } %86, 1
%ZF125 = icmp eq i64 %85, 0
%highbit126 = and i64 -9223372036854775808, %85
%SF127 = icmp ne i64 %highbit126, 0
%ld-stk-prom135 = load i64, ptr %R8-SKT-LOC, align 8
%ld-stk-prom170 = load i64, ptr %R10-SKT-LOC, align 8
%87 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %ld-stk-prom170, i64 %ld-stk-prom135)
%OF128 = extractvalue { i64, i1 } %87, 1
%88 = and i64 %85, 255
%89 = call i64 @llvm.ctpop.i64(i64 %88)
%90 = and i64 %89, 1
%PF129 = icmp eq i64 %90, 0
%CmpZF_JE184 = icmp eq i1 %ZF125, true
br i1 %CmpZF_JE184, label %bb.17, label %bb.12
bb.12: ; preds = %bb.11
%ld-stk-prom = load i64, ptr %R8-SKT-LOC, align 8
%memref-basereg130 = add i64 %ld-stk-prom, %arg2
store i64 %memref-basereg130, ptr %RAX-SKT-LOC131, align 1
br label %bb.15
bb.14: ; preds = %bb.4
store i64 %arg2, ptr %RAX-SKT-LOC131, align 1
br label %bb.15
bb.15: ; preds = %bb.14, %bb.12, %bb.5
%RAX132 = load i64, ptr %RAX-SKT-LOC131, align 1
%memref-idxreg133 = mul i64 4, %RAX132
%memref-basereg134 = add i64 %memload13, %memref-idxreg133
%R8138 = load i64, ptr %R8-SKT-LOC, align 1
%memref-idxreg139 = mul i64 4, %R8138
%memref-basereg140 = add i64 %memload13, %memref-idxreg139
%R11 = sub i64 %memload, %R8138
%91 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload, i64 %R8138)
%CF141 = extractvalue { i64, i1 } %91, 1
%ZF142 = icmp eq i64 %R11, 0
%highbit143 = and i64 -9223372036854775808, %R11
%SF144 = icmp ne i64 %highbit143, 0
%92 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload, i64 %R8138)
%OF145 = extractvalue { i64, i1 } %92, 1
%93 = and i64 %R11, 255
%94 = call i64 @llvm.ctpop.i64(i64 %93)
%95 = and i64 %94, 1
%PF146 = icmp eq i64 %95, 0
%R11147 = sub i64 %R11, %arg2
%96 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R11, i64 %arg2)
%CF148 = extractvalue { i64, i1 } %96, 1
%ZF149 = icmp eq i64 %R11147, 0
%highbit150 = and i64 -9223372036854775808, %R11147
%SF151 = icmp ne i64 %highbit150, 0
%97 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R11, i64 %arg2)
%OF152 = extractvalue { i64, i1 } %97, 1
%98 = and i64 %R11147, 255
%99 = call i64 @llvm.ctpop.i64(i64 %98)
%100 = and i64 %99, 1
%PF153 = icmp eq i64 %100, 0
%101 = zext i32 0 to i64
store i64 %101, ptr %RDX-SKT-LOC, align 1
br label %bb.16
bb.16: ; preds = %bb.15, %bb.16
%RDX = load i64, ptr %RDX-SKT-LOC, align 1
%memref-idxreg154 = mul i64 4, %RDX
%memref-basereg155 = add i64 %memref-basereg134, %memref-idxreg154
%102 = inttoptr i64 %memref-basereg155 to ptr
%memload156 = load i32, ptr %102, align 1
%memref-idxreg157 = mul i64 4, %RDX
%memref-basereg158 = add i64 %memref-basereg140, %memref-idxreg157
%103 = inttoptr i64 %memref-basereg158 to ptr
store i32 %memload156, ptr %103, align 1
%RDX163 = add i64 %RDX, 1
%104 = and i64 %RDX163, 255
%105 = call i64 @llvm.ctpop.i64(i64 %104)
%106 = and i64 %105, 1
%PF159 = icmp eq i64 %106, 0
%ZF160 = icmp eq i64 %RDX163, 0
%highbit161 = and i64 -9223372036854775808, %RDX163
%SF162 = icmp ne i64 %highbit161, 0
%107 = sub i64 %R11147, %RDX163
%108 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R11147, i64 %RDX163)
%CF164 = extractvalue { i64, i1 } %108, 1
%ZF165 = icmp eq i64 %107, 0
%highbit166 = and i64 -9223372036854775808, %107
%SF167 = icmp ne i64 %highbit166, 0
%109 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R11147, i64 %RDX163)
%OF168 = extractvalue { i64, i1 } %109, 1
%110 = and i64 %107, 255
%111 = call i64 @llvm.ctpop.i64(i64 %110)
%112 = and i64 %111, 1
%PF169 = icmp eq i64 %112, 0
%CmpZF_JNE185 = icmp eq i1 %ZF165, false
store i64 %RDX163, ptr %RDX-SKT-LOC, align 1
br i1 %CmpZF_JNE185, label %bb.16, label %bb.17
bb.13: ; preds = %bb.3
%113 = zext i32 0 to i64
store i64 %113, ptr %R10-SKT-LOC, align 1
br label %bb.17
bb.17: ; preds = %bb.13, %bb.16, %bb.11
%R10177 = load i64, ptr %R10-SKT-LOC, align 1
%114 = inttoptr i64 %arg1 to ptr
store i64 %R10177, ptr %114, align 1
br label %bb.18
bb.18: ; preds = %bb.17, %bb.2, %bb.1, %entry
ret void
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/reactos/sdk/lib/3rdparty/freetype/src/bdf/extr_bdflib.c__bdf_list_shift.c'
source_filename = "AnghaBench/reactos/sdk/lib/3rdparty/freetype/src/bdf/extr_bdflib.c__bdf_list_shift.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @_bdf_list_shift], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @_bdf_list_shift(ptr noundef %0, i64 noundef %1) #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %55, label %4
4: ; preds = %2
%5 = load i64, ptr %0, align 8, !tbaa !6
%6 = icmp eq i64 %5, 0
%7 = icmp eq i64 %1, 0
%8 = or i1 %7, %6
br i1 %8, label %55, label %9
9: ; preds = %4
%10 = icmp ugt i64 %5, %1
br i1 %10, label %11, label %53
11: ; preds = %9
%12 = getelementptr inbounds i8, ptr %0, i64 8
%13 = load ptr, ptr %12, align 8, !tbaa !12
%14 = sub i64 %5, %1
%15 = icmp ult i64 %14, 16
%16 = mul i64 %1, -4
%17 = icmp ult i64 %16, 64
%18 = or i1 %15, %17
br i1 %18, label %41, label %19
19: ; preds = %11
%20 = and i64 %14, -16
%21 = add i64 %20, %1
%22 = getelementptr i32, ptr %13, i64 %1
br label %23
23: ; preds = %23, %19
%24 = phi i64 [ 0, %19 ], [ %37, %23 ]
%25 = getelementptr i32, ptr %22, i64 %24
%26 = getelementptr inbounds i8, ptr %25, i64 16
%27 = getelementptr inbounds i8, ptr %25, i64 32
%28 = getelementptr inbounds i8, ptr %25, i64 48
%29 = load <4 x i32>, ptr %25, align 4, !tbaa !13
%30 = load <4 x i32>, ptr %26, align 4, !tbaa !13
%31 = load <4 x i32>, ptr %27, align 4, !tbaa !13
%32 = load <4 x i32>, ptr %28, align 4, !tbaa !13
%33 = getelementptr inbounds i32, ptr %13, i64 %24
%34 = getelementptr inbounds i8, ptr %33, i64 16
%35 = getelementptr inbounds i8, ptr %33, i64 32
%36 = getelementptr inbounds i8, ptr %33, i64 48
store <4 x i32> %29, ptr %33, align 4, !tbaa !13
store <4 x i32> %30, ptr %34, align 4, !tbaa !13
store <4 x i32> %31, ptr %35, align 4, !tbaa !13
store <4 x i32> %32, ptr %36, align 4, !tbaa !13
%37 = add nuw i64 %24, 16
%38 = icmp eq i64 %37, %20
br i1 %38, label %39, label %23, !llvm.loop !15
39: ; preds = %23
%40 = icmp eq i64 %14, %20
br i1 %40, label %53, label %41
41: ; preds = %39, %11
%42 = phi i64 [ %1, %11 ], [ %21, %39 ]
%43 = phi i64 [ 0, %11 ], [ %20, %39 ]
br label %44
44: ; preds = %41, %44
%45 = phi i64 [ %51, %44 ], [ %42, %41 ]
%46 = phi i64 [ %50, %44 ], [ %43, %41 ]
%47 = getelementptr inbounds i32, ptr %13, i64 %45
%48 = load i32, ptr %47, align 4, !tbaa !13
%49 = getelementptr inbounds i32, ptr %13, i64 %46
store i32 %48, ptr %49, align 4, !tbaa !13
%50 = add i64 %46, 1
%51 = add nuw i64 %45, 1
%52 = icmp eq i64 %50, %14
br i1 %52, label %53, label %44, !llvm.loop !19
53: ; preds = %44, %39, %9
%54 = phi i64 [ 0, %9 ], [ %14, %39 ], [ %14, %44 ]
store i64 %54, ptr %0, align 8, !tbaa !6
br label %55
55: ; preds = %53, %2, %4
ret void
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = distinct !{!15, !16, !17, !18}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!"llvm.loop.isvectorized", i32 1}
!18 = !{!"llvm.loop.unroll.runtime.disable"}
!19 = distinct !{!19, !16, !17}
| reactos_sdk_lib_3rdparty_freetype_src_bdf_extr_bdflib.c__bdf_list_shift |
; ModuleID = 'linux_drivers_scsi_aic7xxx_extr_aic79xx_core.c_ahd_find_syncrate.so'
source_filename = "linux_drivers_scsi_aic7xxx_extr_aic79xx_core.c_ahd_find_syncrate.so"
@MSG_EXT_PPR_DT_REQ = common dso_local global i64 0, align 8
@AHD_SYNCRATE_MIN_DT = common dso_local global i64 0, align 8
@AHD_SYNCRATE_MIN = common dso_local global i64 0, align 8
@AHD_SYNCRATE_PACED = common dso_local global i64 0, align 8
@MSG_EXT_PPR_RTI = common dso_local global i64 0, align 8
@MSG_EXT_PPR_IU_REQ = common dso_local global i64 0, align 8
@MSG_EXT_PPR_QAS_REQ = common dso_local global i64 0, align 8
define dso_local i64 @ahd_find_syncrate(i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4) {
entry:
%RCX-SKT-LOC = alloca i64, align 8
%RDI-SKT-LOC26 = alloca i64, align 8
%RDI-SKT-LOC18 = alloca i64, align 8
%RDI-SKT-LOC = alloca i64, align 8
%0 = inttoptr i64 %arg2 to ptr
%memload = load i64, ptr %0, align 1
%1 = sub i64 %memload, %arg4
%2 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload, i64 %arg4)
%CF = extractvalue { i64, i1 } %2, 1
%ZF = icmp eq i64 %1, 0
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%3 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload, i64 %arg4)
%OF = extractvalue { i64, i1 } %3, 1
%4 = and i64 %1, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
store i64 %memload, ptr %RDI-SKT-LOC, align 1
store i64 %memload, ptr %RDI-SKT-LOC18, align 1
bb.1: ; No predecessors!
%7 = inttoptr i64 %arg2 to ptr
store i64 %arg4, ptr %7, align 1
store i64 %arg4, ptr %RDI-SKT-LOC, align 1
store i64 %arg4, ptr %RDI-SKT-LOC18, align 1
bb.2: ; No predecessors!
%8 = inttoptr i64 %arg3 to ptr
%memload1 = load i64, ptr %8, align 1
%memload2 = load i64, ptr @MSG_EXT_PPR_DT_REQ, align 1
%9 = and i64 %memload2, %memload1
%highbit3 = and i64 -9223372036854775808, %9
%SF4 = icmp ne i64 %highbit3, 0
%ZF5 = icmp eq i64 %9, 0
%10 = and i64 %9, 255
%11 = call i64 @llvm.ctpop.i64(i64 %10)
%12 = and i64 %11, 1
%PF6 = icmp eq i64 %12, 0
bb.3: ; No predecessors!
%13 = load i64, ptr @AHD_SYNCRATE_MIN_DT, align 8
%RDI = load i64, ptr %RDI-SKT-LOC, align 1
%14 = sub i64 %RDI, %13
%15 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RDI, i64 %13)
%CF7 = extractvalue { i64, i1 } %15, 1
%ZF8 = icmp eq i64 %14, 0
%highbit9 = and i64 -9223372036854775808, %14
%SF10 = icmp ne i64 %highbit9, 0
%16 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RDI, i64 %13)
%OF11 = extractvalue { i64, i1 } %16, 1
%17 = and i64 %14, 255
%18 = call i64 @llvm.ctpop.i64(i64 %17)
%19 = and i64 %18, 1
%PF12 = icmp eq i64 %19, 0
store i64 %RDI, ptr %RDI-SKT-LOC18, align 1
bb.4: ; No predecessors!
%RAX = xor i64 %memload2, -1
%R9 = and i64 %memload1, %RAX
%highbit13 = and i64 -9223372036854775808, %R9
%SF14 = icmp ne i64 %highbit13, 0
%ZF15 = icmp eq i64 %R9, 0
%20 = and i64 %R9, 255
%21 = call i64 @llvm.ctpop.i64(i64 %20)
%22 = and i64 %21, 1
%PF16 = icmp eq i64 %22, 0
%23 = inttoptr i64 %arg3 to ptr
store i64 %R9, ptr %23, align 1
%24 = inttoptr i64 %arg2 to ptr
%memload17 = load i64, ptr %24, align 1
store i64 %memload17, ptr %RDI-SKT-LOC18, align 1
bb.5: ; No predecessors!
%25 = load i64, ptr @AHD_SYNCRATE_MIN, align 8
%RDI19 = load i64, ptr %RDI-SKT-LOC18, align 1
%26 = sub i64 %RDI19, %25
%27 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RDI19, i64 %25)
%CF20 = extractvalue { i64, i1 } %27, 1
%ZF21 = icmp eq i64 %26, 0
%highbit22 = and i64 -9223372036854775808, %26
%SF23 = icmp ne i64 %highbit22, 0
%28 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RDI19, i64 %25)
%OF24 = extractvalue { i64, i1 } %28, 1
%29 = and i64 %26, 255
%30 = call i64 @llvm.ctpop.i64(i64 %29)
%31 = and i64 %30, 1
%PF25 = icmp eq i64 %31, 0
store i64 %RDI19, ptr %RDI-SKT-LOC26, align 1
bb.6: ; No predecessors!
%32 = inttoptr i64 %arg2 to ptr
%33 = sext i32 0 to i64
store i64 %33, ptr %32, align 1
%34 = zext i32 0 to i64
store i64 %34, ptr %RDI-SKT-LOC26, align 1
bb.7: ; No predecessors!
%35 = load i64, ptr @AHD_SYNCRATE_PACED, align 8
%RDI27 = load i64, ptr %RDI-SKT-LOC26, align 1
%36 = sub i64 %RDI27, %35
%37 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RDI27, i64 %35)
%CF28 = extractvalue { i64, i1 } %37, 1
%ZF29 = icmp eq i64 %36, 0
%highbit30 = and i64 -9223372036854775808, %36
%SF31 = icmp ne i64 %highbit30, 0
%38 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RDI27, i64 %35)
%OF32 = extractvalue { i64, i1 } %38, 1
%39 = and i64 %36, 255
%40 = call i64 @llvm.ctpop.i64(i64 %39)
%41 = and i64 %40, 1
%PF33 = icmp eq i64 %41, 0
bb.8: ; No predecessors!
%memload34 = load i64, ptr @MSG_EXT_PPR_RTI, align 1
%RCX = xor i64 %memload34, -1
%42 = inttoptr i64 %arg3 to ptr
%memload35 = load i64, ptr %42, align 1
%RCX37 = and i64 %RCX, %memload35
%43 = and i64 %RCX37, 255
%44 = call i64 @llvm.ctpop.i64(i64 %43)
%45 = and i64 %44, 1
%PF36 = icmp eq i64 %45, 0
%46 = inttoptr i64 %arg3 to ptr
store i64 %RCX37, ptr %46, align 1
store i64 %RCX37, ptr %RCX-SKT-LOC, align 1
bb.9: ; No predecessors!
%47 = inttoptr i64 %arg3 to ptr
%memload38 = load i64, ptr %47, align 1
store i64 %memload38, ptr %RCX-SKT-LOC, align 1
bb.10: ; No predecessors!
%48 = load i64, ptr @MSG_EXT_PPR_IU_REQ, align 8
%RCX39 = load i64, ptr %RCX-SKT-LOC, align 1
%49 = and i64 %48, %RCX39
%ZF40 = icmp eq i64 %49, 0
%highbit41 = and i64 -9223372036854775808, %49
%SF42 = icmp ne i64 %highbit41, 0
%50 = and i64 %49, 255
%51 = call i64 @llvm.ctpop.i64(i64 %50)
%52 = and i64 %51, 1
%PF43 = icmp eq i64 %52, 0
bb.11: ; No predecessors!
%53 = load i64, ptr @MSG_EXT_PPR_DT_REQ, align 8
%54 = and i64 %53, %RCX39
%ZF44 = icmp eq i64 %54, 0
%highbit45 = and i64 -9223372036854775808, %54
%SF46 = icmp ne i64 %highbit45, 0
%55 = and i64 %54, 255
%56 = call i64 @llvm.ctpop.i64(i64 %55)
%57 = and i64 %56, 1
%PF47 = icmp eq i64 %57, 0
bb.14: ; No predecessors!
%memload48 = load i64, ptr @MSG_EXT_PPR_QAS_REQ, align 1
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/aic7xxx/extr_aic79xx_core.c_ahd_find_syncrate.c'
source_filename = "AnghaBench/linux/drivers/scsi/aic7xxx/extr_aic79xx_core.c_ahd_find_syncrate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MSG_EXT_PPR_DT_REQ = common local_unnamed_addr global i64 0, align 8
@AHD_SYNCRATE_MIN_DT = common local_unnamed_addr global i64 0, align 8
@AHD_SYNCRATE_MIN = common local_unnamed_addr global i64 0, align 8
@AHD_SYNCRATE_PACED = common local_unnamed_addr global i64 0, align 8
@MSG_EXT_PPR_RTI = common local_unnamed_addr global i64 0, align 8
@MSG_EXT_PPR_IU_REQ = common local_unnamed_addr global i64 0, align 8
@MSG_EXT_PPR_QAS_REQ = common local_unnamed_addr global i64 0, align 8
@AHD_SYNCRATE_DT = common local_unnamed_addr global i64 0, align 8
@AHD_SYNCRATE_ULTRA2 = common local_unnamed_addr global i64 0, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define void @ahd_find_syncrate(ptr nocapture noundef readnone %0, ptr nocapture noundef %1, ptr nocapture noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = load i64, ptr %1, align 8, !tbaa !6
%6 = icmp slt i64 %5, %3
br i1 %6, label %7, label %8
7: ; preds = %4
store i64 %3, ptr %1, align 8, !tbaa !6
br label %8
8: ; preds = %7, %4
%9 = phi i64 [ %3, %7 ], [ %5, %4 ]
%10 = load i64, ptr %2, align 8, !tbaa !6
%11 = load i64, ptr @MSG_EXT_PPR_DT_REQ, align 8, !tbaa !6
%12 = and i64 %11, %10
%13 = icmp ne i64 %12, 0
%14 = load i64, ptr @AHD_SYNCRATE_MIN_DT, align 8
%15 = icmp sgt i64 %9, %14
%16 = select i1 %13, i1 %15, i1 false
br i1 %16, label %17, label %21
17: ; preds = %8
%18 = xor i64 %11, -1
%19 = and i64 %10, %18
store i64 %19, ptr %2, align 8, !tbaa !6
%20 = load i64, ptr %1, align 8, !tbaa !6
br label %21
21: ; preds = %17, %8
%22 = phi i64 [ %19, %17 ], [ %10, %8 ]
%23 = phi i64 [ %20, %17 ], [ %9, %8 ]
%24 = load i64, ptr @AHD_SYNCRATE_MIN, align 8, !tbaa !6
%25 = icmp sgt i64 %23, %24
br i1 %25, label %26, label %28
26: ; preds = %21
store i64 0, ptr %1, align 8, !tbaa !6
%27 = load i64, ptr %2, align 8, !tbaa !6
br label %28
28: ; preds = %26, %21
%29 = phi i64 [ %27, %26 ], [ %22, %21 ]
%30 = phi i64 [ 0, %26 ], [ %23, %21 ]
%31 = load i64, ptr @AHD_SYNCRATE_PACED, align 8, !tbaa !6
%32 = icmp sgt i64 %30, %31
br i1 %32, label %33, label %37
33: ; preds = %28
%34 = load i64, ptr @MSG_EXT_PPR_RTI, align 8, !tbaa !6
%35 = xor i64 %34, -1
%36 = and i64 %29, %35
store i64 %36, ptr %2, align 8, !tbaa !6
br label %37
37: ; preds = %33, %28
%38 = phi i64 [ %36, %33 ], [ %29, %28 ]
%39 = load i64, ptr @MSG_EXT_PPR_IU_REQ, align 8, !tbaa !6
%40 = and i64 %39, %38
%41 = icmp eq i64 %40, 0
%42 = load i64, ptr @MSG_EXT_PPR_DT_REQ, align 8, !tbaa !6
br i1 %41, label %43, label %48
43: ; preds = %37
%44 = load i64, ptr @MSG_EXT_PPR_QAS_REQ, align 8, !tbaa !6
%45 = or i64 %44, %42
%46 = and i64 %45, %38
store i64 %46, ptr %2, align 8, !tbaa !6
%47 = load i64, ptr @MSG_EXT_PPR_DT_REQ, align 8, !tbaa !6
br label %48
48: ; preds = %43, %37
%49 = phi i64 [ %47, %43 ], [ %42, %37 ]
%50 = phi i64 [ %46, %43 ], [ %38, %37 ]
%51 = and i64 %49, %50
%52 = icmp eq i64 %51, 0
br i1 %52, label %53, label %56
53: ; preds = %48
%54 = load i64, ptr @MSG_EXT_PPR_QAS_REQ, align 8, !tbaa !6
%55 = and i64 %54, %50
store i64 %55, ptr %2, align 8, !tbaa !6
br label %56
56: ; preds = %53, %48
%57 = phi i64 [ %55, %53 ], [ %50, %48 ]
%58 = load i64, ptr @MSG_EXT_PPR_IU_REQ, align 8, !tbaa !6
%59 = and i64 %58, %57
%60 = icmp eq i64 %59, 0
br i1 %60, label %61, label %67
61: ; preds = %56
%62 = load i64, ptr %1, align 8, !tbaa !6
%63 = load i64, ptr @AHD_SYNCRATE_DT, align 8, !tbaa !6
%64 = icmp slt i64 %62, %63
br i1 %64, label %65, label %67
65: ; preds = %61
store i64 %63, ptr %1, align 8, !tbaa !6
%66 = load i64, ptr %2, align 8, !tbaa !6
br label %67
67: ; preds = %65, %61, %56
%68 = phi i64 [ %66, %65 ], [ %57, %61 ], [ %57, %56 ]
%69 = load i64, ptr @MSG_EXT_PPR_DT_REQ, align 8, !tbaa !6
%70 = and i64 %69, %68
%71 = icmp eq i64 %70, 0
br i1 %71, label %72, label %77
72: ; preds = %67
%73 = load i64, ptr %1, align 8, !tbaa !6
%74 = load i64, ptr @AHD_SYNCRATE_ULTRA2, align 8, !tbaa !6
%75 = icmp slt i64 %73, %74
br i1 %75, label %76, label %77
76: ; preds = %72
store i64 %74, ptr %1, align 8, !tbaa !6
br label %77
77: ; preds = %76, %72, %67
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_scsi_aic7xxx_extr_aic79xx_core.c_ahd_find_syncrate |
; ModuleID = 'linux_drivers_net_ethernet_mellanox_mlxsw_extr_core_acl_flex_actions.c_mlxsw_afa_block_first_set.so'
source_filename = "linux_drivers_net_ethernet_mellanox_mlxsw_extr_core_acl_flex_actions.c_mlxsw_afa_block_first_set.so"
define dso_local i64 @mlxsw_afa_block_first_set(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%1 = inttoptr i64 %memload to ptr
%memload1 = load i64, ptr %1, align 1
ret i64 %memload1
}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_core_acl_flex_actions.c_mlxsw_afa_block_first_set.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_core_acl_flex_actions.c_mlxsw_afa_block_first_set.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define ptr @mlxsw_afa_block_first_set(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = load ptr, ptr %2, align 8, !tbaa !11
ret ptr %3
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"mlxsw_afa_block", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_4__", !13, i64 0}
!13 = !{!"TYPE_3__", !8, i64 0}
| linux_drivers_net_ethernet_mellanox_mlxsw_extr_core_acl_flex_actions.c_mlxsw_afa_block_first_set |
; ModuleID = 'fastsocket_kernel_drivers_base_extr_dd.c_dev_get_drvdata.so'
source_filename = "fastsocket_kernel_drivers_base_extr_dd.c_dev_get_drvdata.so"
define dso_local i64 @dev_get_drvdata(i64 %arg1) {
entry:
%0 = and i64 %arg1, %arg1
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %0, 0
%1 = and i64 %0, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%4 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %4, align 1
%5 = and i64 %memload, %memload
%highbit1 = and i64 -9223372036854775808, %5
%SF2 = icmp ne i64 %highbit1, 0
%ZF3 = icmp eq i64 %5, 0
%6 = and i64 %5, 255
%7 = call i64 @llvm.ctpop.i64(i64 %6)
%8 = and i64 %7, 1
%PF4 = icmp eq i64 %8, 0
%CmpZF_JE6 = icmp eq i1 %ZF3, true
br i1 %CmpZF_JE6, label %bb.3, label %bb.2
bb.2: ; preds = %bb.1
%9 = inttoptr i64 %memload to ptr
%memload5 = load i64, ptr %9, align 1
br label %UnifiedReturnBlock
bb.3: ; preds = %bb.1, %entry
%10 = zext i32 0 to i64
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.3, %bb.2
%UnifiedRetVal = phi i64 [ %memload5, %bb.2 ], [ %10, %bb.3 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/base/extr_dd.c_dev_get_drvdata.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/base/extr_dd.c_dev_get_drvdata.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define ptr @dev_get_drvdata(ptr noundef readonly %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = icmp eq ptr %4, null
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = load ptr, ptr %4, align 8, !tbaa !11
br label %8
8: ; preds = %1, %3, %6
%9 = phi ptr [ %7, %6 ], [ null, %3 ], [ null, %1 ]
ret ptr %9
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"device", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_2__", !8, i64 0}
| fastsocket_kernel_drivers_base_extr_dd.c_dev_get_drvdata |
; ModuleID = 'linux_drivers_net_ethernet_mellanox_mlxsw_extr_spectrum_router.c_mlxsw_sp_rif_dev.so'
source_filename = "linux_drivers_net_ethernet_mellanox_mlxsw_extr_spectrum_router.c_mlxsw_sp_rif_dev.so"
define dso_local i64 @mlxsw_sp_rif_dev(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
ret i64 %memload
}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_router.c_mlxsw_sp_rif_dev.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_router.c_mlxsw_sp_rif_dev.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define ptr @mlxsw_sp_rif_dev(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"mlxsw_sp_rif", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_net_ethernet_mellanox_mlxsw_extr_spectrum_router.c_mlxsw_sp_rif_dev |
; ModuleID = 'Provenance_Cores_Yabause_yabause_src_sh2_dynarec_extr_assem_arm.c_do_preload_rhash.so'
source_filename = "Provenance_Cores_Yabause_yabause_src_sh2_dynarec_extr_assem_arm.c_do_preload_rhash.so"
define dso_local void @do_preload_rhash() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/sh2_dynarec/extr_assem_arm.c_do_preload_rhash.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/sh2_dynarec/extr_assem_arm.c_do_preload_rhash.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define void @do_preload_rhash(i32 noundef %0) local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| Provenance_Cores_Yabause_yabause_src_sh2_dynarec_extr_assem_arm.c_do_preload_rhash |
; ModuleID = 'linux_net_ipv4_extr_inetpeer.c_inet_peer_xrlim_allow.so'
source_filename = "linux_net_ipv4_extr_inetpeer.c_inet_peer_xrlim_allow.so"
@jiffies = common dso_local global i64 0, align 8
@XRLIM_BURST_FACTOR = common dso_local global i32 0, align 4
define dso_local i8 @inet_peer_xrlim_allow(i64 %arg1, i32 %arg2) {
entry:
%0 = and i64 %arg1, %arg1
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %0, 0
%1 = and i64 %0, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%memload = load i64, ptr @jiffies, align 1
%4 = inttoptr i64 %arg1 to ptr
%memload1 = load i64, ptr %4, align 1
%RCX = add nsw i64 %memload1, %memload
%highbit2 = and i64 -9223372036854775808, %RCX
%SF3 = icmp ne i64 %highbit2, 0
%ZF4 = icmp eq i64 %RCX, 0
%memref-disp = add i64 %arg1, 8
%5 = inttoptr i64 %memref-disp to ptr
%6 = load i64, ptr %5, align 1
%RCX5 = sub i64 %RCX, %6
%7 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RCX, i64 %6)
%CF = extractvalue { i64, i1 } %7, 1
%ZF6 = icmp eq i64 %RCX5, 0
%highbit7 = and i64 -9223372036854775808, %RCX5
%SF8 = icmp ne i64 %highbit7, 0
%8 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RCX, i64 %6)
%OF = extractvalue { i64, i1 } %8, 1
%9 = and i64 %RCX5, 255
%10 = call i64 @llvm.ctpop.i64(i64 %9)
%11 = and i64 %10, 1
%PF9 = icmp eq i64 %11, 0
%memref-disp10 = add i64 %arg1, 8
%12 = inttoptr i64 %memref-disp10 to ptr
store i64 %memload, ptr %12, align 1
%memload11 = load i64, ptr @XRLIM_BURST_FACTOR, align 1
%13 = trunc i64 %memload11 to i32
%RDX = sext i32 %13 to i64
%RSI = sext i32 %arg2 to i64
%RDX12 = mul nsw i64 %RDX, %RSI
%14 = sub i64 %RCX5, %RDX12
%15 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RCX5, i64 %RDX12)
%CF13 = extractvalue { i64, i1 } %15, 1
%ZF14 = icmp eq i64 %14, 0
%highbit15 = and i64 -9223372036854775808, %14
%SF16 = icmp ne i64 %highbit15, 0
%16 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RCX5, i64 %RDX12)
%OF17 = extractvalue { i64, i1 } %16, 1
%17 = and i64 %14, 255
%18 = call i64 @llvm.ctpop.i64(i64 %17)
%19 = and i64 %18, 1
%PF18 = icmp eq i64 %19, 0
%Cond_CMOVB = icmp eq i1 %CF13, true
%CMOV = select i1 %Cond_CMOVB, i64 %RCX5, i64 %RDX12
%20 = sub i64 %CMOV, %RSI
%21 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %CMOV, i64 %RSI)
%CF19 = extractvalue { i64, i1 } %21, 1
%ZF20 = icmp eq i64 %20, 0
%highbit21 = and i64 -9223372036854775808, %20
%SF22 = icmp ne i64 %highbit21, 0
%22 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %CMOV, i64 %RSI)
%OF23 = extractvalue { i64, i1 } %22, 1
%23 = and i64 %20, 255
%24 = call i64 @llvm.ctpop.i64(i64 %23)
%25 = and i64 %24, 1
%PF24 = icmp eq i64 %25, 0
%AL = icmp eq i1 %CF19, false
%Cond_CMOVAE = icmp eq i1 %CF19, false
%26 = zext i32 0 to i64
%CMOV25 = select i1 %Cond_CMOVAE, i64 %RSI, i64 %26
%RDX26 = sub i64 %CMOV, %CMOV25
%27 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %CMOV, i64 %CMOV25)
%CF27 = extractvalue { i64, i1 } %27, 1
%ZF28 = icmp eq i64 %RDX26, 0
%highbit29 = and i64 -9223372036854775808, %RDX26
%SF30 = icmp ne i64 %highbit29, 0
%28 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %CMOV, i64 %CMOV25)
%OF31 = extractvalue { i64, i1 } %28, 1
%29 = and i64 %RDX26, 255
%30 = call i64 @llvm.ctpop.i64(i64 %29)
%31 = and i64 %30, 1
%PF32 = icmp eq i64 %31, 0
%32 = inttoptr i64 %arg1 to ptr
store i64 %RDX26, ptr %32, align 1
%33 = zext i1 %AL to i8
br label %UnifiedReturnBlock
bb.2: ; preds = %entry
%34 = trunc i32 1 to i8
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.2, %bb.1
%UnifiedRetVal = phi i8 [ %33, %bb.1 ], [ %34, %bb.2 ]
ret i8 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/net/ipv4/extr_inetpeer.c_inet_peer_xrlim_allow.c'
source_filename = "AnghaBench/linux/net/ipv4/extr_inetpeer.c_inet_peer_xrlim_allow.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@jiffies = common local_unnamed_addr global i64 0, align 8
@XRLIM_BURST_FACTOR = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define range(i32 0, 2) i32 @inet_peer_xrlim_allow(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %20, label %4
4: ; preds = %2
%5 = load i64, ptr %0, align 8, !tbaa !6
%6 = load i64, ptr @jiffies, align 8, !tbaa !11
%7 = getelementptr inbounds i8, ptr %0, i64 8
%8 = load i64, ptr %7, align 8, !tbaa !12
%9 = add i64 %6, %5
%10 = sub i64 %9, %8
store i64 %6, ptr %7, align 8, !tbaa !12
%11 = load i32, ptr @XRLIM_BURST_FACTOR, align 4, !tbaa !13
%12 = mul nsw i32 %11, %1
%13 = sext i32 %12 to i64
%14 = tail call i64 @llvm.umin.i64(i64 %10, i64 %13)
%15 = sext i32 %1 to i64
%16 = icmp uge i64 %14, %15
%17 = select i1 %16, i64 %15, i64 0
%18 = sub i64 %14, %17
%19 = zext i1 %16 to i32
store i64 %18, ptr %0, align 8, !tbaa !6
br label %20
20: ; preds = %2, %4
%21 = phi i32 [ %19, %4 ], [ 1, %2 ]
ret i32 %21
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umin.i64(i64, i64) #1
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"inet_peer", !8, i64 0, !8, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!7, !8, i64 8}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !9, i64 0}
| linux_net_ipv4_extr_inetpeer.c_inet_peer_xrlim_allow |
; ModuleID = 'freebsd_sys_contrib_ncsw_Peripherals_QM_extr_qman_low.h_qm_eqcr_get_fill.so'
source_filename = "freebsd_sys_contrib_ncsw_Peripherals_QM_extr_qman_low.h_qm_eqcr_get_fill.so"
@QM_EQCR_SIZE = common dso_local global i32 0, align 4
define dso_local i32 @qm_eqcr_get_fill(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
%EAX = xor i32 %memload, -1
%memload1 = load i32, ptr @QM_EQCR_SIZE, align 1
%EAX2 = add i32 %EAX, %memload1
%1 = and i32 %EAX2, 255
%2 = call i32 @llvm.ctpop.i32(i32 %1)
%3 = and i32 %2, 1
%PF = icmp eq i32 %3, 0
ret i32 %EAX2
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/sys/contrib/ncsw/Peripherals/QM/extr_qman_low.h_qm_eqcr_get_fill.c'
source_filename = "AnghaBench/freebsd/sys/contrib/ncsw/Peripherals/QM/extr_qman_low.h_qm_eqcr_get_fill.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@QM_EQCR_SIZE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @qm_eqcr_get_fill], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @qm_eqcr_get_fill(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr @QM_EQCR_SIZE, align 4, !tbaa !6
%3 = load i32, ptr %0, align 4, !tbaa !10
%4 = xor i32 %3, -1
%5 = add i32 %2, %4
ret i32 %5
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"qm_eqcr", !7, i64 0}
| freebsd_sys_contrib_ncsw_Peripherals_QM_extr_qman_low.h_qm_eqcr_get_fill |
; ModuleID = 'fastsocket_kernel_drivers_net_wireless_brcm80211_brcmsmac_phy_extr_phy_cmn.c_wlc_phy_bf_preempt_enable.so'
source_filename = "fastsocket_kernel_drivers_net_wireless_brcm80211_brcmsmac_phy_extr_phy_cmn.c_wlc_phy_bf_preempt_enable.so"
define dso_local void @wlc_phy_bf_preempt_enable(i64 %arg1, i32 %arg2) {
entry:
%0 = inttoptr i64 %arg1 to ptr
store i32 %arg2, ptr %0, align 1
ret void
}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/brcm80211/brcmsmac/phy/extr_phy_cmn.c_wlc_phy_bf_preempt_enable.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/brcm80211/brcmsmac/phy/extr_phy_cmn.c_wlc_phy_bf_preempt_enable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync)
define void @wlc_phy_bf_preempt_enable(ptr nocapture noundef writeonly %0, i32 noundef %1) local_unnamed_addr #0 {
store i32 %1, ptr %0, align 4, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"brcms_phy", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_net_wireless_brcm80211_brcmsmac_phy_extr_phy_cmn.c_wlc_phy_bf_preempt_enable |
; ModuleID = 'Quake-III-Arena_code_bspc_extr_l_threads.c_ThreadUnlock.so'
source_filename = "Quake-III-Arena_code_bspc_extr_l_threads.c_ThreadUnlock.so"
define dso_local void @ThreadUnlock() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/Quake-III-Arena/code/bspc/extr_l_threads.c_ThreadUnlock.c'
source_filename = "AnghaBench/Quake-III-Arena/code/bspc/extr_l_threads.c_ThreadUnlock.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define void @ThreadUnlock() local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| Quake-III-Arena_code_bspc_extr_l_threads.c_ThreadUnlock |
; ModuleID = 'freebsd_contrib_xz_src_liblzma_check_extr_....commontuklib_integer.h_unaligned_read16le.so'
source_filename = "freebsd_contrib_xz_src_liblzma_check_extr_....commontuklib_integer.h_unaligned_read16le.so"
define dso_local i32 @unaligned_read16le(i64 %arg1) {
entry:
%memref-disp = add i64 %arg1, 8
%0 = inttoptr i64 %memref-disp to ptr
%memload = load i32, ptr %0, align 1
%EAX = shl i32 %memload, 8
%ZF = icmp eq i32 %EAX, 0
%highbit = and i32 -2147483648, %EAX
%SF = icmp ne i32 %highbit, 0
%1 = inttoptr i64 %arg1 to ptr
%memload1 = load i32, ptr %1, align 1
%EAX2 = or i32 %EAX, %memload1
%2 = and i32 %EAX2, 255
%3 = call i32 @llvm.ctpop.i32(i32 %2)
%4 = and i32 %3, 1
%PF = icmp eq i32 %4, 0
ret i32 %EAX2
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/contrib/xz/src/liblzma/check/extr_....commontuklib_integer.h_unaligned_read16le.c'
source_filename = "AnghaBench/freebsd/contrib/xz/src/liblzma/check/extr_....commontuklib_integer.h_unaligned_read16le.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @unaligned_read16le], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal i32 @unaligned_read16le(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = trunc i64 %2 to i32
%4 = getelementptr inbounds i8, ptr %0, i64 8
%5 = load i64, ptr %4, align 8, !tbaa !6
%6 = trunc i64 %5 to i32
%7 = shl i32 %6, 8
%8 = or i32 %7, %3
ret i32 %8
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_xz_src_liblzma_check_extr_....commontuklib_integer.h_unaligned_read16le |
; ModuleID = 'linux_drivers_usb_gadget_function_extr_f_mass_storage.c_fsg_lun_release.so'
source_filename = "linux_drivers_usb_gadget_function_extr_f_mass_storage.c_fsg_lun_release.so"
define dso_local void @fsg_lun_release() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/gadget/function/extr_f_mass_storage.c_fsg_lun_release.c'
source_filename = "AnghaBench/linux/drivers/usb/gadget/function/extr_f_mass_storage.c_fsg_lun_release.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @fsg_lun_release], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @fsg_lun_release(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_usb_gadget_function_extr_f_mass_storage.c_fsg_lun_release |
; ModuleID = 'RetroArch_deps_7zip_extr_LzmaEnc.c_RangeEnc_Free.so'
source_filename = "RetroArch_deps_7zip_extr_LzmaEnc.c_RangeEnc_Free.so"
define dso_local void @RangeEnc_Free(i64 %arg1, i64 %arg2) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%1 = inttoptr i64 %arg2 to ptr
%memload1 = load i64, ptr %1, align 1
%2 = inttoptr i64 %memload1 to ptr
call void %2(i64 %arg2, i64 %memload)
%3 = inttoptr i64 %arg1 to ptr
%4 = sext i32 0 to i64
store i64 %4, ptr %3, align 1
ret void
}
| ; ModuleID = 'AnghaBench/RetroArch/deps/7zip/extr_LzmaEnc.c_RangeEnc_Free.c'
source_filename = "AnghaBench/RetroArch/deps/7zip/extr_LzmaEnc.c_RangeEnc_Free.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @RangeEnc_Free], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @RangeEnc_Free(ptr nocapture noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !6
%4 = load i64, ptr %0, align 8, !tbaa !11
%5 = tail call i32 %3(ptr noundef nonnull %1, i64 noundef %4) #1
store i64 0, ptr %0, align 8, !tbaa !11
ret void
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_7__", !13, i64 0}
!13 = !{!"long", !9, i64 0}
| RetroArch_deps_7zip_extr_LzmaEnc.c_RangeEnc_Free |
; ModuleID = 'freebsd_contrib_byacc_extr_output.c_putl_code.so'
source_filename = "freebsd_contrib_byacc_extr_output.c_putl_code.so"
@code_file = common dso_local global i64 0, align 8
@outline = common dso_local global i32 0, align 4
declare dso_local i32 @fputs(ptr, ptr)
define dso_local i32 @putl_code(i64 %arg1, i64 %arg2) {
entry:
%0 = load i64, ptr @code_file, align 8
%1 = sub i64 %0, %arg1
%2 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %0, i64 %arg1)
%CF = extractvalue { i64, i1 } %2, 1
%ZF = icmp eq i64 %1, 0
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%3 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %0, i64 %arg1)
%OF = extractvalue { i64, i1 } %3, 1
%4 = and i64 %1, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%7 = inttoptr i64 %arg2 to ptr
%8 = inttoptr i64 %arg1 to ptr
%EAX = tail call i32 @fputs(ptr %7, ptr %8)
br label %UnifiedReturnBlock
bb.2: ; preds = %entry
%9 = bitcast ptr @outline to ptr
%memload = load i32, ptr %9, align 1
%10 = add i32 %memload, 1
store i32 %10, ptr %9, align 4
%11 = inttoptr i64 %arg2 to ptr
%12 = inttoptr i64 %arg1 to ptr
%EAX1 = tail call i32 @fputs(ptr %11, ptr %12)
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.2, %bb.1
%UnifiedRetVal = phi i32 [ %EAX, %bb.1 ], [ %EAX1, %bb.2 ]
ret i32 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/contrib/byacc/extr_output.c_putl_code.c'
source_filename = "AnghaBench/freebsd/contrib/byacc/extr_output.c_putl_code.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@code_file = common local_unnamed_addr global ptr null, align 8
@outline = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @putl_code], section "llvm.metadata"
; Function Attrs: nofree nounwind ssp uwtable(sync)
define internal void @putl_code(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr @code_file, align 8, !tbaa !6
%4 = icmp eq ptr %3, %0
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = load i32, ptr @outline, align 4, !tbaa !10
%7 = add nsw i32 %6, 1
store i32 %7, ptr @outline, align 4, !tbaa !10
br label %8
8: ; preds = %5, %2
%9 = tail call i32 @fputs(ptr noundef %1, ptr noundef %0)
ret void
}
; Function Attrs: nofree nounwind
declare noundef i32 @fputs(ptr nocapture noundef readonly, ptr nocapture noundef) local_unnamed_addr #1
attributes #0 = { nofree nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| freebsd_contrib_byacc_extr_output.c_putl_code |
; ModuleID = 'freebsd_sys_contrib_zstd_contrib_seekable_format_examples_extr_parallel_processing.c_realloc_orDie.so'
source_filename = "freebsd_sys_contrib_zstd_contrib_seekable_format_examples_extr_parallel_processing.c_realloc_orDie.so"
@0 = private unnamed_addr constant [8 x i8] c"realloc\00", align 1, !ROData_SecInfo !0
declare dso_local ptr @realloc(ptr, i64)
declare dso_local void @perror(ptr)
declare dso_local void @exit(i32)
define dso_local ptr @realloc_orDie(i64 %arg1, i64 %arg2) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%0 = inttoptr i64 %arg1 to ptr
%1 = call ptr @realloc(ptr %0, i64 %arg2)
%RAX = ptrtoint ptr %1 to i64
%2 = and i64 %RAX, %RAX
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %2, 0
%3 = and i64 %2, 255
%4 = call i64 @llvm.ctpop.i64(i64 %3)
%5 = and i64 %4, 1
%PF = icmp eq i64 %5, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
ret ptr %1
bb.2: ; preds = %entry
call void @perror(ptr @0)
tail call void @exit(i32 1)
unreachable
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/freebsd/sys/contrib/zstd/contrib/seekable_format/examples/extr_parallel_processing.c_realloc_orDie.c'
source_filename = "AnghaBench/freebsd/sys/contrib/zstd/contrib/seekable_format/examples/extr_parallel_processing.c_realloc_orDie.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [8 x i8] c"realloc\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @realloc_orDie], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noalias noundef ptr @realloc_orDie(ptr nocapture noundef %0, i64 noundef %1) #0 {
%3 = tail call ptr @realloc(ptr noundef %0, i64 noundef %1) #4
%4 = icmp eq ptr %3, null
br i1 %4, label %6, label %5
5: ; preds = %2
ret ptr %3
6: ; preds = %2
%7 = tail call i32 @perror(ptr noundef nonnull @.str) #5
%8 = tail call i32 @exit(i32 noundef 1) #6
unreachable
}
; Function Attrs: mustprogress nounwind willreturn allockind("realloc") allocsize(1) memory(argmem: readwrite, inaccessiblemem: readwrite)
declare noalias noundef ptr @realloc(ptr allocptr nocapture noundef, i64 noundef) local_unnamed_addr #1
declare i32 @perror(ptr noundef) local_unnamed_addr #2
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nounwind willreturn allockind("realloc") allocsize(1) memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { noreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { allocsize(1) }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_sys_contrib_zstd_contrib_seekable_format_examples_extr_parallel_processing.c_realloc_orDie |
; ModuleID = 'fastsocket_kernel_sound_pci_vx222_extr_vx222_ops.c_vx2_reg_addr.so'
source_filename = "fastsocket_kernel_sound_pci_vx222_extr_vx222_ops.c_vx2_reg_addr.so"
@vx2_reg_index = common dso_local global i64 0, align 8
@vx2_reg_offset = common dso_local global i64 0, align 8
define dso_local i64 @vx2_reg_addr(i64 %arg1, i32 %arg2) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%memload1 = load i64, ptr @vx2_reg_index, align 1
%RDX = sext i32 %arg2 to i64
%memref-idxreg = mul i64 8, %RDX
%memref-basereg = add i64 %memload1, %memref-idxreg
%1 = inttoptr i64 %memref-basereg to ptr
%memload2 = load i64, ptr %1, align 1
%memload3 = load i64, ptr @vx2_reg_offset, align 1
%memref-idxreg4 = mul i64 8, %RDX
%memref-basereg5 = add i64 %memload3, %memref-idxreg4
%2 = inttoptr i64 %memref-basereg5 to ptr
%memload6 = load i64, ptr %2, align 1
%memref-idxreg7 = mul i64 8, %memload2
%memref-basereg8 = add i64 %memload, %memref-idxreg7
%3 = inttoptr i64 %memref-basereg8 to ptr
%memload9 = load i64, ptr %3, align 1
%RAX = add i64 %memload6, %memload9
%4 = and i64 %RAX, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
ret i64 %RAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/vx222/extr_vx222_ops.c_vx2_reg_addr.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/vx222/extr_vx222_ops.c_vx2_reg_addr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@vx2_reg_index = common local_unnamed_addr global ptr null, align 8
@vx2_reg_offset = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @vx2_reg_addr], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal i64 @vx2_reg_addr(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load ptr, ptr @vx2_reg_index, align 8, !tbaa !11
%5 = sext i32 %1 to i64
%6 = getelementptr inbounds i64, ptr %4, i64 %5
%7 = load i64, ptr %6, align 8, !tbaa !12
%8 = getelementptr inbounds i64, ptr %3, i64 %7
%9 = load i64, ptr %8, align 8, !tbaa !12
%10 = load ptr, ptr @vx2_reg_offset, align 8, !tbaa !11
%11 = getelementptr inbounds i64, ptr %10, i64 %5
%12 = load i64, ptr %11, align 8, !tbaa !12
%13 = add i64 %12, %9
ret i64 %13
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"snd_vx222", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !9, i64 0}
| fastsocket_kernel_sound_pci_vx222_extr_vx222_ops.c_vx2_reg_addr |
; ModuleID = 'linux_drivers_fpga_extr_dfl.h_dfl_fpga_pdata_set_private.so'
source_filename = "linux_drivers_fpga_extr_dfl.h_dfl_fpga_pdata_set_private.so"
define dso_local void @dfl_fpga_pdata_set_private(i64 %arg1, i64 %arg2) {
entry:
%0 = inttoptr i64 %arg1 to ptr
store i64 %arg2, ptr %0, align 1
ret void
}
| ; ModuleID = 'AnghaBench/linux/drivers/fpga/extr_dfl.h_dfl_fpga_pdata_set_private.c'
source_filename = "AnghaBench/linux/drivers/fpga/extr_dfl.h_dfl_fpga_pdata_set_private.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @dfl_fpga_pdata_set_private], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync)
define internal void @dfl_fpga_pdata_set_private(ptr nocapture noundef writeonly %0, ptr noundef %1) #0 {
store ptr %1, ptr %0, align 8, !tbaa !6
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"dfl_feature_platform_data", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_fpga_extr_dfl.h_dfl_fpga_pdata_set_private |
; ModuleID = 'openpilot_phonelibs_nanovg_extr_nanovg.c_nvgInternalParams.so'
source_filename = "openpilot_phonelibs_nanovg_extr_nanovg.c_nvgInternalParams.so"
define dso_local i64 @nvgInternalParams(i64 %arg1) {
entry:
ret i64 %arg1
}
| ; ModuleID = 'AnghaBench/openpilot/phonelibs/nanovg/extr_nanovg.c_nvgInternalParams.c'
source_filename = "AnghaBench/openpilot/phonelibs/nanovg/extr_nanovg.c_nvgInternalParams.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef ptr @nvgInternalParams(ptr noundef readnone returned %0) local_unnamed_addr #0 {
ret ptr %0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| openpilot_phonelibs_nanovg_extr_nanovg.c_nvgInternalParams |
; ModuleID = 'fastsocket_kernel_drivers_block_paride_extr_pcd.c_pcd_release.so'
source_filename = "fastsocket_kernel_drivers_block_paride_extr_pcd.c_pcd_release.so"
define dso_local void @pcd_release() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/block/paride/extr_pcd.c_pcd_release.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/block/paride/extr_pcd.c_pcd_release.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @pcd_release], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @pcd_release(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_block_paride_extr_pcd.c_pcd_release |
; ModuleID = 'darwin-xnu_osfmk_arm_extr_status.c_get_user_regs.so'
source_filename = "darwin-xnu_osfmk_arm_extr_status.c_get_user_regs.so"
define dso_local i64 @get_user_regs(i64 %arg1) {
entry:
ret i64 %arg1
}
| ; ModuleID = 'AnghaBench/darwin-xnu/osfmk/arm/extr_status.c_get_user_regs.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/arm/extr_status.c_get_user_regs.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef ptr @get_user_regs(ptr noundef readnone returned %0) local_unnamed_addr #0 {
ret ptr %0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| darwin-xnu_osfmk_arm_extr_status.c_get_user_regs |
; ModuleID = 'freebsd_contrib_telnet_telnet_extr_ring.c_ring_init.so'
source_filename = "freebsd_contrib_telnet_telnet_extr_ring.c_ring_init.so"
declare dso_local ptr @memset(ptr, i32, i64)
define dso_local i32 @ring_init(i64 %arg1, i64 %arg2, i32 %arg3) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%0 = inttoptr i64 %arg1 to ptr
%1 = zext i32 48 to i64
%2 = call ptr @memset(ptr %0, i32 0, i64 %1)
%RAX = ptrtoint ptr %2 to i64
%3 = inttoptr i64 %arg1 to ptr
store i32 %arg3, ptr %3, align 1
%memref-disp = add i64 %arg1, 24
%4 = inttoptr i64 %memref-disp to ptr
store i64 %arg2, ptr %4, align 1
%memref-disp1 = add i64 %arg1, 16
%5 = inttoptr i64 %memref-disp1 to ptr
store i64 %arg2, ptr %5, align 1
%memref-disp2 = add i64 %arg1, 8
%6 = inttoptr i64 %memref-disp2 to ptr
store i64 %arg2, ptr %6, align 1
%RAX3 = sext i32 %arg3 to i64
%RAX4 = add nsw i64 %RAX3, %arg2
%highbit = and i64 -9223372036854775808, %RAX4
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %RAX4, 0
%memref-disp5 = add i64 %arg1, 32
%7 = inttoptr i64 %memref-disp5 to ptr
store i64 %RAX4, ptr %7, align 1
ret i32 1
}
| ; ModuleID = 'AnghaBench/freebsd/contrib/telnet/telnet/extr_ring.c_ring_init.c'
source_filename = "AnghaBench/freebsd/contrib/telnet/telnet/extr_ring.c_ring_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @ring_init(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = tail call i32 @memset(ptr noundef %0, i32 noundef 0, i32 noundef 48) #2
store i32 %2, ptr %0, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %0, i64 24
store ptr %1, ptr %5, align 8, !tbaa !13
%6 = getelementptr inbounds i8, ptr %0, i64 16
store ptr %1, ptr %6, align 8, !tbaa !14
%7 = getelementptr inbounds i8, ptr %0, i64 8
store ptr %1, ptr %7, align 8, !tbaa !15
%8 = sext i32 %2 to i64
%9 = getelementptr inbounds i8, ptr %1, i64 %8
%10 = getelementptr inbounds i8, ptr %0, i64 32
store ptr %9, ptr %10, align 8, !tbaa !16
ret i32 1
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !12, i64 40}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!7, !11, i64 24}
!14 = !{!7, !11, i64 16}
!15 = !{!7, !11, i64 8}
!16 = !{!7, !11, i64 32}
| freebsd_contrib_telnet_telnet_extr_ring.c_ring_init |
; ModuleID = 'Provenance_Cores_PicoDrive_cpu_musashi_extr_m68kdasm.c_d68000_lsl_r_32.so'
source_filename = "Provenance_Cores_PicoDrive_cpu_musashi_extr_m68kdasm.c_d68000_lsl_r_32.so"
@g_dasm_str = common dso_local global i32 0, align 4
@g_cpu_ir = common dso_local global i32 0, align 4
@0 = private unnamed_addr constant [17 x i8] c"lsl.l D%d, D%d\00", align 1, !ROData_SecInfo !0
declare dso_local i32 @sprintf(ptr, ptr, ...)
define dso_local i32 @d68000_lsl_r_32() {
entry:
%memload = load i32, ptr @g_dasm_str, align 1
%memload1 = load i32, ptr @g_cpu_ir, align 1
%EDX = lshr i32 %memload1, 9
%ZF = icmp eq i32 %EDX, 0
%highbit = and i32 -2147483648, %EDX
%SF = icmp ne i32 %highbit, 0
%EDX5 = and i32 %EDX, 7
%0 = and i32 %EDX5, 255
%1 = call i32 @llvm.ctpop.i32(i32 %0)
%2 = and i32 %1, 1
%PF = icmp eq i32 %2, 0
%ZF2 = icmp eq i32 %EDX5, 0
%highbit3 = and i32 -2147483648, %EDX5
%SF4 = icmp ne i32 %highbit3, 0
%ECX = and i32 %memload1, 7
%3 = and i32 %ECX, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF6 = icmp eq i32 %5, 0
%ZF7 = icmp eq i32 %ECX, 0
%highbit8 = and i32 -2147483648, %ECX
%SF9 = icmp ne i32 %highbit8, 0
%6 = inttoptr i32 %memload to ptr
%EAX = tail call i32 (ptr, ptr, ...) @sprintf(ptr %6, ptr @0, i32 %EDX5, i32 %ECX)
ret i32 %EAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/Provenance/Cores/PicoDrive/cpu/musashi/extr_m68kdasm.c_d68000_lsl_r_32.c'
source_filename = "AnghaBench/Provenance/Cores/PicoDrive/cpu/musashi/extr_m68kdasm.c_d68000_lsl_r_32.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@g_dasm_str = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [17 x i8] c"lsl.l D%d, D%d\00", align 1
@g_cpu_ir = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @d68000_lsl_r_32], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @d68000_lsl_r_32() #0 {
%1 = load i32, ptr @g_dasm_str, align 4, !tbaa !6
%2 = load i32, ptr @g_cpu_ir, align 4, !tbaa !6
%3 = lshr i32 %2, 9
%4 = and i32 %3, 7
%5 = and i32 %2, 7
%6 = tail call i32 @sprintf(i32 noundef %1, ptr noundef nonnull @.str, i32 noundef %4, i32 noundef %5) #2
ret void
}
declare i32 @sprintf(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| Provenance_Cores_PicoDrive_cpu_musashi_extr_m68kdasm.c_d68000_lsl_r_32 |
; ModuleID = 'freebsd_contrib_ntp_ntpd_extr_ntp_leapsec.c_do_leap_hash.so'
source_filename = "freebsd_contrib_ntp_ntpd_extr_ntp_leapsec.c_do_leap_hash.so"
@0 = private unnamed_addr constant [23 x i8] c" %lx %lx %lx %lx %lx%n\00", align 1, !ROData_SecInfo !0
@FALSE = common dso_local global i32 0, align 4
@TRUE = common dso_local global i32 0, align 4
declare dso_local ptr @memset(ptr, i32, i64)
declare dso_local i32 @sscanf(ptr, ptr, ...)
define dso_local i32 @do_leap_hash(i64 %arg1, i64 %arg2) {
entry:
%RCX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 116, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 0
%RSP_P.0 = inttoptr i64 %0 to ptr
%1 = add i64 %tos, 8
%RSP_P.8 = inttoptr i64 %1 to ptr
%2 = add i64 %tos, 16
%RSP_P.16 = inttoptr i64 %2 to ptr
%3 = add i64 %tos, 24
%RSP_P.24 = inttoptr i64 %3 to ptr
%4 = add i64 %tos, 32
%RSP_P.32 = inttoptr i64 %4 to ptr
%5 = add i64 %tos, 52
%RSP_P.52 = inttoptr i64 %5 to ptr
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%6 = inttoptr i64 %arg1 to ptr
%7 = zext i32 8 to i64
%8 = call ptr @memset(ptr %6, i32 0, i64 %7)
%RAX = ptrtoint ptr %8 to i64
%RCX = ptrtoint ptr %RSP_P.8 to i64
%R8 = ptrtoint ptr %RSP_P.16 to i64
%R9 = ptrtoint ptr %RSP_P.24 to i64
%R10 = ptrtoint ptr %RSP_P.32 to i64
%RAX1 = ptrtoint ptr %RSP_P.52 to i64
%RDX = ptrtoint ptr %stktop_8 to i64
store i64 %RAX1, ptr %stktop_8, align 8
store i64 %R10, ptr %stktop_8, align 8
%9 = inttoptr i64 %arg2 to ptr
%EAX = call i32 (ptr, ptr, ...) @sscanf(ptr %9, ptr @0, i64 %RDX, i64 %RCX, i64 %R8, i64 %R9)
%10 = sub i32 %EAX, 5
%11 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EAX, i32 5)
%CF = extractvalue { i32, i1 } %11, 1
%ZF = icmp eq i32 %10, 0
%highbit = and i32 -2147483648, %10
%SF = icmp ne i32 %highbit, 0
%12 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EAX, i32 5)
%OF = extractvalue { i32, i1 } %12, 1
%13 = and i32 %10, 255
%14 = call i32 @llvm.ctpop.i32(i32 %13)
%15 = and i32 %14, 1
%PF = icmp eq i32 %15, 0
%16 = ptrtoint ptr @FALSE to i64
store i64 %16, ptr %RCX-SKT-LOC, align 1
%CmpZF_JNE = icmp eq i1 %ZF, false
br i1 %CmpZF_JNE, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%memload = load i64, ptr %RSP_P.52, align 1
%17 = trunc i64 %memload to i32
%RAX2 = sext i32 %17 to i64
%memref-basereg = add i64 %arg2, %RAX2
%18 = inttoptr i64 %memref-basereg to ptr
%19 = load i8, ptr %18, align 1
%20 = zext i8 %19 to i64
%21 = zext i8 32 to i64
%22 = sub i64 %20, %21
%23 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %20, i64 %21)
%CF3 = extractvalue { i64, i1 } %23, 1
%ZF4 = icmp eq i64 %22, 0
%highbit5 = and i64 -9223372036854775808, %22
%SF6 = icmp ne i64 %highbit5, 0
%24 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %20, i64 %21)
%OF7 = extractvalue { i64, i1 } %24, 1
%25 = and i64 %22, 255
%26 = call i64 @llvm.ctpop.i64(i64 %25)
%27 = and i64 %26, 1
%PF8 = icmp eq i64 %27, 0
%ZFCmp_JG = icmp eq i1 %ZF4, false
%SFOFCmp_JG = icmp eq i1 %SF6, %OF7
%ZFAndSFOF_JG = and i1 %ZFCmp_JG, %SFOFCmp_JG
br i1 %ZFAndSFOF_JG, label %bb.3, label %bb.2
bb.2: ; preds = %bb.1
%memload9 = load i32, ptr %RSP_P.16, align 1
%28 = trunc i32 %memload9 to i8
%EAX10 = zext i8 %28 to i32
%29 = inttoptr i64 %arg1 to ptr
%memload11 = load i64, ptr %29, align 1
%memref-disp = add i64 %memload11, 3
%30 = trunc i32 %EAX10 to i8
%31 = inttoptr i64 %memref-disp to ptr
store i8 %30, ptr %31, align 1
%memload12 = load i64, ptr %RSP_P.16, align 1
%RAX16 = lshr i64 %memload12, 8
%ZF13 = icmp eq i64 %RAX16, 0
%highbit14 = and i64 -9223372036854775808, %RAX16
%SF15 = icmp ne i64 %highbit14, 0
store i64 %RAX16, ptr %RSP_P.16, align 1
%32 = inttoptr i64 %arg1 to ptr
%memload17 = load i64, ptr %32, align 1
%memref-disp18 = add i64 %memload17, 2
%33 = trunc i64 %RAX16 to i8
%34 = inttoptr i64 %memref-disp18 to ptr
store i8 %33, ptr %34, align 1
%memload19 = load i64, ptr %RSP_P.16, align 1
%RAX23 = lshr i64 %memload19, 8
%ZF20 = icmp eq i64 %RAX23, 0
%highbit21 = and i64 -9223372036854775808, %RAX23
%SF22 = icmp ne i64 %highbit21, 0
store i64 %RAX23, ptr %RSP_P.16, align 1
%35 = inttoptr i64 %arg1 to ptr
%memload24 = load i64, ptr %35, align 1
%memref-disp25 = add i64 %memload24, 1
%36 = trunc i64 %RAX23 to i8
%37 = inttoptr i64 %memref-disp25 to ptr
store i8 %36, ptr %37, align 1
%memload26 = load i64, ptr %RSP_P.16, align 1
%RAX30 = lshr i64 %memload26, 8
%ZF27 = icmp eq i64 %RAX30, 0
%highbit28 = and i64 -9223372036854775808, %RAX30
%SF29 = icmp ne i64 %highbit28, 0
store i64 %RAX30, ptr %RSP_P.16, align 1
%38 = inttoptr i64 %arg1 to ptr
%memload31 = load i64, ptr %38, align 1
%39 = trunc i64 %RAX30 to i8
%40 = inttoptr i64 %memload31 to ptr
store i8 %39, ptr %40, align 1
%41 = zext i8 8 to i64
%42 = load i64, ptr %RSP_P.16, align 1
%43 = lshr i64 %42, %41
store i64 %43, ptr %RSP_P.16, align 1
%memload32 = load i32, ptr %RSP_P.8, align 1
%44 = trunc i32 %memload32 to i8
%EAX33 = zext i8 %44 to i32
%45 = inttoptr i64 %arg1 to ptr
%memload34 = load i64, ptr %45, align 1
%memref-disp35 = add i64 %memload34, 7
%46 = trunc i32 %EAX33 to i8
%47 = inttoptr i64 %memref-disp35 to ptr
store i8 %46, ptr %47, align 1
%memload36 = load i64, ptr %RSP_P.8, align 1
%RAX40 = lshr i64 %memload36, 8
%ZF37 = icmp eq i64 %RAX40, 0
%highbit38 = and i64 -9223372036854775808, %RAX40
%SF39 = icmp ne i64 %highbit38, 0
store i64 %RAX40, ptr %RSP_P.8, align 1
%48 = inttoptr i64 %arg1 to ptr
%memload41 = load i64, ptr %48, align 1
%memref-disp42 = add i64 %memload41, 6
%49 = trunc i64 %RAX40 to i8
%50 = inttoptr i64 %memref-disp42 to ptr
store i8 %49, ptr %50, align 1
%memload43 = load i64, ptr %RSP_P.8, align 1
%RAX47 = lshr i64 %memload43, 8
%ZF44 = icmp eq i64 %RAX47, 0
%highbit45 = and i64 -9223372036854775808, %RAX47
%SF46 = icmp ne i64 %highbit45, 0
store i64 %RAX47, ptr %RSP_P.8, align 1
%51 = inttoptr i64 %arg1 to ptr
%memload48 = load i64, ptr %51, align 1
%memref-disp49 = add i64 %memload48, 5
%52 = trunc i64 %RAX47 to i8
%53 = inttoptr i64 %memref-disp49 to ptr
store i8 %52, ptr %53, align 1
%memload50 = load i64, ptr %RSP_P.8, align 1
%RAX54 = lshr i64 %memload50, 8
%ZF51 = icmp eq i64 %RAX54, 0
%highbit52 = and i64 -9223372036854775808, %RAX54
%SF53 = icmp ne i64 %highbit52, 0
store i64 %RAX54, ptr %RSP_P.8, align 1
%54 = inttoptr i64 %arg1 to ptr
%memload55 = load i64, ptr %54, align 1
%memref-disp56 = add i64 %memload55, 4
%55 = trunc i64 %RAX54 to i8
%56 = inttoptr i64 %memref-disp56 to ptr
store i8 %55, ptr %56, align 1
%57 = zext i8 8 to i64
%58 = load i64, ptr %RSP_P.8, align 1
%59 = lshr i64 %58, %57
store i64 %59, ptr %RSP_P.8, align 1
%memload57 = load i32, ptr %RSP_P.16, align 1
%60 = trunc i32 %memload57 to i8
%EAX58 = zext i8 %60 to i32
%61 = inttoptr i64 %arg1 to ptr
%memload59 = load i64, ptr %61, align 1
%memref-disp60 = add i64 %memload59, 11
%62 = trunc i32 %EAX58 to i8
%63 = inttoptr i64 %memref-disp60 to ptr
store i8 %62, ptr %63, align 1
%memload61 = load i64, ptr %RSP_P.16, align 1
%RAX65 = lshr i64 %memload61, 8
%ZF62 = icmp eq i64 %RAX65, 0
%highbit63 = and i64 -9223372036854775808, %RAX65
%SF64 = icmp ne i64 %highbit63, 0
store i64 %RAX65, ptr %RSP_P.16, align 1
%64 = inttoptr i64 %arg1 to ptr
%memload66 = load i64, ptr %64, align 1
%memref-disp67 = add i64 %memload66, 10
%65 = trunc i64 %RAX65 to i8
%66 = inttoptr i64 %memref-disp67 to ptr
store i8 %65, ptr %66, align 1
%memload68 = load i64, ptr %RSP_P.16, align 1
%RAX72 = lshr i64 %memload68, 8
%ZF69 = icmp eq i64 %RAX72, 0
%highbit70 = and i64 -9223372036854775808, %RAX72
%SF71 = icmp ne i64 %highbit70, 0
store i64 %RAX72, ptr %RSP_P.16, align 1
%67 = inttoptr i64 %arg1 to ptr
%memload73 = load i64, ptr %67, align 1
%memref-disp74 = add i64 %memload73, 9
%68 = trunc i64 %RAX72 to i8
%69 = inttoptr i64 %memref-disp74 to ptr
store i8 %68, ptr %69, align 1
%memload75 = load i64, ptr %RSP_P.16, align 1
%RAX79 = lshr i64 %memload75, 8
%ZF76 = icmp eq i64 %RAX79, 0
%highbit77 = and i64 -9223372036854775808, %RAX79
%SF78 = icmp ne i64 %highbit77, 0
store i64 %RAX79, ptr %RSP_P.16, align 1
%70 = inttoptr i64 %arg1 to ptr
%memload80 = load i64, ptr %70, align 1
%memref-disp81 = add i64 %memload80, 8
%71 = trunc i64 %RAX79 to i8
%72 = inttoptr i64 %memref-disp81 to ptr
store i8 %71, ptr %72, align 1
%73 = zext i8 8 to i64
%74 = load i64, ptr %RSP_P.16, align 1
%75 = lshr i64 %74, %73
store i64 %75, ptr %RSP_P.16, align 1
%memload82 = load i32, ptr %RSP_P.24, align 1
%76 = trunc i32 %memload82 to i8
%EAX83 = zext i8 %76 to i32
%77 = inttoptr i64 %arg1 to ptr
%memload84 = load i64, ptr %77, align 1
%memref-disp85 = add i64 %memload84, 15
%78 = trunc i32 %EAX83 to i8
%79 = inttoptr i64 %memref-disp85 to ptr
store i8 %78, ptr %79, align 1
%memload86 = load i64, ptr %RSP_P.24, align 1
%RAX90 = lshr i64 %memload86, 8
%ZF87 = icmp eq i64 %RAX90, 0
%highbit88 = and i64 -9223372036854775808, %RAX90
%SF89 = icmp ne i64 %highbit88, 0
store i64 %RAX90, ptr %RSP_P.24, align 1
%80 = inttoptr i64 %arg1 to ptr
%memload91 = load i64, ptr %80, align 1
%memref-disp92 = add i64 %memload91, 14
%81 = trunc i64 %RAX90 to i8
%82 = inttoptr i64 %memref-disp92 to ptr
store i8 %81, ptr %82, align 1
%memload93 = load i64, ptr %RSP_P.24, align 1
%RAX97 = lshr i64 %memload93, 8
%ZF94 = icmp eq i64 %RAX97, 0
%highbit95 = and i64 -9223372036854775808, %RAX97
%SF96 = icmp ne i64 %highbit95, 0
store i64 %RAX97, ptr %RSP_P.24, align 1
%83 = inttoptr i64 %arg1 to ptr
%memload98 = load i64, ptr %83, align 1
%memref-disp99 = add i64 %memload98, 13
%84 = trunc i64 %RAX97 to i8
%85 = inttoptr i64 %memref-disp99 to ptr
store i8 %84, ptr %85, align 1
%memload100 = load i64, ptr %RSP_P.24, align 1
%RAX104 = lshr i64 %memload100, 8
%ZF101 = icmp eq i64 %RAX104, 0
%highbit102 = and i64 -9223372036854775808, %RAX104
%SF103 = icmp ne i64 %highbit102, 0
store i64 %RAX104, ptr %RSP_P.24, align 1
%86 = inttoptr i64 %arg1 to ptr
%memload105 = load i64, ptr %86, align 1
%memref-disp106 = add i64 %memload105, 12
%87 = trunc i64 %RAX104 to i8
%88 = inttoptr i64 %memref-disp106 to ptr
store i8 %87, ptr %88, align 1
%89 = zext i8 8 to i64
%90 = load i64, ptr %RSP_P.24, align 1
%91 = lshr i64 %90, %89
store i64 %91, ptr %RSP_P.24, align 1
%memload107 = load i32, ptr %RSP_P.32, align 1
%92 = trunc i32 %memload107 to i8
%EAX108 = zext i8 %92 to i32
%93 = inttoptr i64 %arg1 to ptr
%memload109 = load i64, ptr %93, align 1
%memref-disp110 = add i64 %memload109, 19
%94 = trunc i32 %EAX108 to i8
%95 = inttoptr i64 %memref-disp110 to ptr
store i8 %94, ptr %95, align 1
%memload111 = load i64, ptr %RSP_P.32, align 1
%RAX115 = lshr i64 %memload111, 8
%ZF112 = icmp eq i64 %RAX115, 0
%highbit113 = and i64 -9223372036854775808, %RAX115
%SF114 = icmp ne i64 %highbit113, 0
store i64 %RAX115, ptr %RSP_P.32, align 1
%96 = inttoptr i64 %arg1 to ptr
%memload116 = load i64, ptr %96, align 1
%memref-disp117 = add i64 %memload116, 18
%97 = trunc i64 %RAX115 to i8
%98 = inttoptr i64 %memref-disp117 to ptr
store i8 %97, ptr %98, align 1
%memload118 = load i64, ptr %RSP_P.32, align 1
%RAX122 = lshr i64 %memload118, 8
%ZF119 = icmp eq i64 %RAX122, 0
%highbit120 = and i64 -9223372036854775808, %RAX122
%SF121 = icmp ne i64 %highbit120, 0
store i64 %RAX122, ptr %RSP_P.32, align 1
%99 = inttoptr i64 %arg1 to ptr
%memload123 = load i64, ptr %99, align 1
%memref-disp124 = add i64 %memload123, 17
%100 = trunc i64 %RAX122 to i8
%101 = inttoptr i64 %memref-disp124 to ptr
store i8 %100, ptr %101, align 1
%102 = getelementptr i8, ptr %RSP_P.32, i64 1
%memload125 = load i32, ptr %102, align 1
%103 = trunc i32 %memload125 to i8
%EAX126 = zext i8 %103 to i32
%104 = inttoptr i64 %arg1 to ptr
%memload127 = load i64, ptr %104, align 1
%memref-disp128 = add i64 %memload127, 16
%105 = trunc i32 %EAX126 to i8
%106 = inttoptr i64 %memref-disp128 to ptr
store i8 %105, ptr %106, align 1
%107 = ptrtoint ptr @TRUE to i64
store i64 %107, ptr %RCX-SKT-LOC, align 1
br label %bb.3
bb.3: ; preds = %bb.2, %bb.1, %entry
%RCX129 = load i64, ptr %RCX-SKT-LOC, align 1
%108 = inttoptr i64 %RCX129 to ptr
%memload130 = load i32, ptr %108, align 1
ret i32 %memload130
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/freebsd/contrib/ntp/ntpd/extr_ntp_leapsec.c_do_leap_hash.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/ntpd/extr_ntp_leapsec.c_do_leap_hash.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [23 x i8] c" %lx %lx %lx %lx %lx%n\00", align 1
@FALSE = common local_unnamed_addr global i32 0, align 4
@TRUE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @do_leap_hash], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @do_leap_hash(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca i32, align 4
%4 = alloca [5 x i64], align 8
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %4) #3
%5 = tail call i32 @memset(ptr noundef %0, i32 noundef 0, i32 noundef 8) #3
%6 = getelementptr inbounds i8, ptr %4, i64 8
%7 = getelementptr inbounds i8, ptr %4, i64 16
%8 = getelementptr inbounds i8, ptr %4, i64 24
%9 = getelementptr inbounds i8, ptr %4, i64 32
%10 = call i32 @sscanf(ptr noundef %1, ptr noundef nonnull @.str, ptr noundef nonnull %4, ptr noundef nonnull %6, ptr noundef nonnull %7, ptr noundef nonnull %8, ptr noundef nonnull %9, ptr noundef nonnull %3) #3
%11 = icmp eq i32 %10, 5
br i1 %11, label %12, label %113
12: ; preds = %2
%13 = load i32, ptr %3, align 4, !tbaa !6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, ptr %1, i64 %14
%16 = load i8, ptr %15, align 1, !tbaa !10
%17 = icmp sgt i8 %16, 32
br i1 %17, label %113, label %18
18: ; preds = %12
%19 = load i64, ptr %4, align 8, !tbaa !11
%20 = trunc i64 %19 to i8
%21 = load ptr, ptr %0, align 8, !tbaa !13
%22 = getelementptr inbounds i8, ptr %21, i64 3
store i8 %20, ptr %22, align 1, !tbaa !10
%23 = load i64, ptr %4, align 8, !tbaa !11
%24 = lshr i64 %23, 8
store i64 %24, ptr %4, align 8, !tbaa !11
%25 = trunc i64 %24 to i8
%26 = load ptr, ptr %0, align 8, !tbaa !13
%27 = getelementptr inbounds i8, ptr %26, i64 2
store i8 %25, ptr %27, align 1, !tbaa !10
%28 = load i64, ptr %4, align 8, !tbaa !11
%29 = lshr i64 %28, 8
store i64 %29, ptr %4, align 8, !tbaa !11
%30 = trunc i64 %29 to i8
%31 = load ptr, ptr %0, align 8, !tbaa !13
%32 = getelementptr inbounds i8, ptr %31, i64 1
store i8 %30, ptr %32, align 1, !tbaa !10
%33 = load i64, ptr %4, align 8, !tbaa !11
%34 = lshr i64 %33, 8
%35 = trunc i64 %34 to i8
%36 = load ptr, ptr %0, align 8, !tbaa !13
store i8 %35, ptr %36, align 1, !tbaa !10
%37 = load i64, ptr %6, align 8, !tbaa !11
%38 = trunc i64 %37 to i8
%39 = load ptr, ptr %0, align 8, !tbaa !13
%40 = getelementptr inbounds i8, ptr %39, i64 7
store i8 %38, ptr %40, align 1, !tbaa !10
%41 = load i64, ptr %6, align 8, !tbaa !11
%42 = lshr i64 %41, 8
store i64 %42, ptr %6, align 8, !tbaa !11
%43 = trunc i64 %42 to i8
%44 = load ptr, ptr %0, align 8, !tbaa !13
%45 = getelementptr inbounds i8, ptr %44, i64 6
store i8 %43, ptr %45, align 1, !tbaa !10
%46 = load i64, ptr %6, align 8, !tbaa !11
%47 = lshr i64 %46, 8
store i64 %47, ptr %6, align 8, !tbaa !11
%48 = trunc i64 %47 to i8
%49 = load ptr, ptr %0, align 8, !tbaa !13
%50 = getelementptr inbounds i8, ptr %49, i64 5
store i8 %48, ptr %50, align 1, !tbaa !10
%51 = load i64, ptr %6, align 8, !tbaa !11
%52 = lshr i64 %51, 8
%53 = trunc i64 %52 to i8
%54 = load ptr, ptr %0, align 8, !tbaa !13
%55 = getelementptr inbounds i8, ptr %54, i64 4
store i8 %53, ptr %55, align 1, !tbaa !10
%56 = load i64, ptr %7, align 8, !tbaa !11
%57 = trunc i64 %56 to i8
%58 = load ptr, ptr %0, align 8, !tbaa !13
%59 = getelementptr inbounds i8, ptr %58, i64 11
store i8 %57, ptr %59, align 1, !tbaa !10
%60 = load i64, ptr %7, align 8, !tbaa !11
%61 = lshr i64 %60, 8
store i64 %61, ptr %7, align 8, !tbaa !11
%62 = trunc i64 %61 to i8
%63 = load ptr, ptr %0, align 8, !tbaa !13
%64 = getelementptr inbounds i8, ptr %63, i64 10
store i8 %62, ptr %64, align 1, !tbaa !10
%65 = load i64, ptr %7, align 8, !tbaa !11
%66 = lshr i64 %65, 8
store i64 %66, ptr %7, align 8, !tbaa !11
%67 = trunc i64 %66 to i8
%68 = load ptr, ptr %0, align 8, !tbaa !13
%69 = getelementptr inbounds i8, ptr %68, i64 9
store i8 %67, ptr %69, align 1, !tbaa !10
%70 = load i64, ptr %7, align 8, !tbaa !11
%71 = lshr i64 %70, 8
%72 = trunc i64 %71 to i8
%73 = load ptr, ptr %0, align 8, !tbaa !13
%74 = getelementptr inbounds i8, ptr %73, i64 8
store i8 %72, ptr %74, align 1, !tbaa !10
%75 = load i64, ptr %8, align 8, !tbaa !11
%76 = trunc i64 %75 to i8
%77 = load ptr, ptr %0, align 8, !tbaa !13
%78 = getelementptr inbounds i8, ptr %77, i64 15
store i8 %76, ptr %78, align 1, !tbaa !10
%79 = load i64, ptr %8, align 8, !tbaa !11
%80 = lshr i64 %79, 8
store i64 %80, ptr %8, align 8, !tbaa !11
%81 = trunc i64 %80 to i8
%82 = load ptr, ptr %0, align 8, !tbaa !13
%83 = getelementptr inbounds i8, ptr %82, i64 14
store i8 %81, ptr %83, align 1, !tbaa !10
%84 = load i64, ptr %8, align 8, !tbaa !11
%85 = lshr i64 %84, 8
store i64 %85, ptr %8, align 8, !tbaa !11
%86 = trunc i64 %85 to i8
%87 = load ptr, ptr %0, align 8, !tbaa !13
%88 = getelementptr inbounds i8, ptr %87, i64 13
store i8 %86, ptr %88, align 1, !tbaa !10
%89 = load i64, ptr %8, align 8, !tbaa !11
%90 = lshr i64 %89, 8
%91 = trunc i64 %90 to i8
%92 = load ptr, ptr %0, align 8, !tbaa !13
%93 = getelementptr inbounds i8, ptr %92, i64 12
store i8 %91, ptr %93, align 1, !tbaa !10
%94 = load i64, ptr %9, align 8, !tbaa !11
%95 = trunc i64 %94 to i8
%96 = load ptr, ptr %0, align 8, !tbaa !13
%97 = getelementptr inbounds i8, ptr %96, i64 19
store i8 %95, ptr %97, align 1, !tbaa !10
%98 = load i64, ptr %9, align 8, !tbaa !11
%99 = lshr i64 %98, 8
store i64 %99, ptr %9, align 8, !tbaa !11
%100 = trunc i64 %99 to i8
%101 = load ptr, ptr %0, align 8, !tbaa !13
%102 = getelementptr inbounds i8, ptr %101, i64 18
store i8 %100, ptr %102, align 1, !tbaa !10
%103 = load i64, ptr %9, align 8, !tbaa !11
%104 = lshr i64 %103, 8
store i64 %104, ptr %9, align 8, !tbaa !11
%105 = trunc i64 %104 to i8
%106 = load ptr, ptr %0, align 8, !tbaa !13
%107 = getelementptr inbounds i8, ptr %106, i64 17
store i8 %105, ptr %107, align 1, !tbaa !10
%108 = load i64, ptr %9, align 8, !tbaa !11
%109 = lshr i64 %108, 8
%110 = trunc i64 %109 to i8
%111 = load ptr, ptr %0, align 8, !tbaa !13
%112 = getelementptr inbounds i8, ptr %111, i64 16
store i8 %110, ptr %112, align 1, !tbaa !10
br label %113
113: ; preds = %18, %2, %12
%114 = phi ptr [ @FALSE, %12 ], [ @FALSE, %2 ], [ @TRUE, %18 ]
%115 = load i32, ptr %114, align 4, !tbaa !6
call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %115
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @sscanf(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"TYPE_4__", !15, i64 0}
!15 = !{!"any pointer", !8, i64 0}
| freebsd_contrib_ntp_ntpd_extr_ntp_leapsec.c_do_leap_hash |
; ModuleID = 'linux_drivers_gpu_drm_amd_display_dc_dcn21_extr_dcn21_hubp.c_hubp21_construct.so'
source_filename = "linux_drivers_gpu_drm_amd_display_dc_dcn21_extr_dcn21_hubp.c_hubp21_construct.so"
@dcn21_hubp_funcs = common dso_local global i32 0, align 4
@OPP_ID_INVALID = common dso_local global i32 0, align 4
define dso_local i32 @hubp21_construct(i64 %arg1, i64 %arg2, i32 %arg3, i64 %arg4, i64 %arg5, i64 %arg6) {
entry:
%memref-disp = add i64 %arg1, 24
%0 = ptrtoint ptr @dcn21_hubp_funcs to i64
%1 = inttoptr i64 %memref-disp to ptr
store i64 %0, ptr %1, align 1
%memref-disp1 = add i64 %arg1, 16
%2 = inttoptr i64 %memref-disp1 to ptr
store i64 %arg2, ptr %2, align 1
%memref-disp2 = add i64 %arg1, 48
%3 = inttoptr i64 %memref-disp2 to ptr
store i64 %arg4, ptr %3, align 1
%memref-disp3 = add i64 %arg1, 40
%4 = inttoptr i64 %memref-disp3 to ptr
store i64 %arg5, ptr %4, align 1
%memref-disp4 = add i64 %arg1, 32
%5 = inttoptr i64 %memref-disp4 to ptr
store i64 %arg6, ptr %5, align 1
%memref-disp5 = add i64 %arg1, 8
%6 = inttoptr i64 %memref-disp5 to ptr
store i32 %arg3, ptr %6, align 1
%memload = load i32, ptr @OPP_ID_INVALID, align 1
%memref-disp6 = add i64 %arg1, 4
%7 = inttoptr i64 %memref-disp6 to ptr
store i32 %memload, ptr %7, align 1
%8 = inttoptr i64 %arg1 to ptr
store i32 15, ptr %8, align 1
ret i32 1
}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/display/dc/dcn21/extr_dcn21_hubp.c_hubp21_construct.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/display/dc/dcn21/extr_dcn21_hubp.c_hubp21_construct.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@dcn21_hubp_funcs = common global i32 0, align 4
@OPP_ID_INVALID = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync)
define noundef i32 @hubp21_construct(ptr nocapture noundef writeonly %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5) local_unnamed_addr #0 {
%7 = getelementptr inbounds i8, ptr %0, i64 24
store ptr @dcn21_hubp_funcs, ptr %7, align 8, !tbaa !6
%8 = getelementptr inbounds i8, ptr %0, i64 16
store ptr %1, ptr %8, align 8, !tbaa !13
%9 = getelementptr inbounds i8, ptr %0, i64 48
store ptr %3, ptr %9, align 8, !tbaa !14
%10 = getelementptr inbounds i8, ptr %0, i64 40
store ptr %4, ptr %10, align 8, !tbaa !15
%11 = getelementptr inbounds i8, ptr %0, i64 32
store ptr %5, ptr %11, align 8, !tbaa !16
%12 = getelementptr inbounds i8, ptr %0, i64 8
store i32 %2, ptr %12, align 8, !tbaa !17
%13 = load i32, ptr @OPP_ID_INVALID, align 4, !tbaa !18
%14 = getelementptr inbounds i8, ptr %0, i64 4
store i32 %13, ptr %14, align 4, !tbaa !19
store i32 15, ptr %0, align 8, !tbaa !20
ret i32 1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 24}
!7 = !{!"dcn21_hubp", !8, i64 0, !12, i64 32, !12, i64 40, !12, i64 48}
!8 = !{!"TYPE_2__", !9, i64 0, !9, i64 4, !9, i64 8, !12, i64 16, !12, i64 24}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!7, !12, i64 16}
!14 = !{!7, !12, i64 48}
!15 = !{!7, !12, i64 40}
!16 = !{!7, !12, i64 32}
!17 = !{!7, !9, i64 8}
!18 = !{!9, !9, i64 0}
!19 = !{!7, !9, i64 4}
!20 = !{!7, !9, i64 0}
| linux_drivers_gpu_drm_amd_display_dc_dcn21_extr_dcn21_hubp.c_hubp21_construct |
; ModuleID = 'fastsocket_kernel_net_sctp_extr_outqueue.c_sctp_cacc_skip_3_1_d.so'
source_filename = "fastsocket_kernel_net_sctp_extr_outqueue.c_sctp_cacc_skip_3_1_d.so"
define dso_local i32 @sctp_cacc_skip_3_1_d(i64 %arg1, i64 %arg2, i32 %arg3) {
entry:
%0 = sub i32 %arg3, 2
%1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %arg3, i32 2)
%CF = extractvalue { i32, i1 } %1, 1
%ZF = icmp eq i32 %0, 0
%highbit = and i32 -2147483648, %0
%SF = icmp ne i32 %highbit, 0
%2 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %arg3, i32 2)
%OF = extractvalue { i32, i1 } %2, 1
%3 = and i32 %0, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
%Cond_SETGE = icmp eq i1 %SF, %OF
%6 = sub i64 %arg2, %arg1
%7 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %arg2, i64 %arg1)
%CF1 = extractvalue { i64, i1 } %7, 1
%ZF2 = icmp eq i64 %6, 0
%highbit3 = and i64 -9223372036854775808, %6
%SF4 = icmp ne i64 %highbit3, 0
%8 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %arg2, i64 %arg1)
%OF5 = extractvalue { i64, i1 } %8, 1
%9 = and i64 %6, 255
%10 = call i64 @llvm.ctpop.i64(i64 %9)
%11 = and i64 %10, 1
%PF6 = icmp eq i64 %11, 0
%CL = icmp eq i1 %ZF2, false
%12 = zext i1 %CL to i8
%13 = zext i1 %Cond_SETGE to i8
%CL11 = and i8 %12, %13
%highbit7 = and i8 -128, %CL11
%SF8 = icmp ne i8 %highbit7, 0
%ZF9 = icmp eq i8 %CL11, 0
%14 = call i8 @llvm.ctpop.i8(i8 %CL11)
%15 = and i8 %14, 1
%PF10 = icmp eq i8 %15, 0
%EAX = zext i8 %CL11 to i32
ret i32 %EAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/sctp/extr_outqueue.c_sctp_cacc_skip_3_1_d.c'
source_filename = "AnghaBench/fastsocket/kernel/net/sctp/extr_outqueue.c_sctp_cacc_skip_3_1_d.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @sctp_cacc_skip_3_1_d], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal range(i32 0, 2) i32 @sctp_cacc_skip_3_1_d(ptr noundef readnone %0, ptr noundef readnone %1, i32 noundef %2) #0 {
%4 = icmp sgt i32 %2, 1
%5 = icmp ne ptr %1, %0
%6 = and i1 %5, %4
%7 = zext i1 %6 to i32
ret i32 %7
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_net_sctp_extr_outqueue.c_sctp_cacc_skip_3_1_d |
; ModuleID = 'freebsd_contrib_gcc_extr_real.c_lshift_significand.so'
source_filename = "freebsd_contrib_gcc_extr_real.c_lshift_significand.so"
@HOST_BITS_PER_LONG = common dso_local global i32 0, align 4
@SIGSZ = common dso_local global i32 0, align 4
define dso_local i32 @lshift_significand(i64 %arg1, i64 %arg2, i32 %arg3) {
entry:
%EAX-SKT-LOC = alloca i64, align 8
%ECX-SKT-LOC192 = alloca i64, align 8
%ESI-SKT-LOC = alloca i64, align 8
%EDX-SKT-LOC183 = alloca i64, align 8
%EDX-SKT-LOC173 = alloca i32, align 4
%ECX-SKT-LOC171 = alloca i32, align 4
%ECX-SKT-LOC = alloca i64, align 8
%EDX-SKT-LOC121 = alloca i64, align 8
%EBX-SKT-LOC = alloca i64, align 8
%R13D-SKT-LOC = alloca i32, align 4
%EDI-SKT-LOC = alloca i32, align 4
%R12D-SKT-LOC = alloca i64, align 8
%R15D-SKT-LOC = alloca i32, align 4
%EDX-SKT-LOC = alloca i64, align 8
%RBX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memload = load i32, ptr @HOST_BITS_PER_LONG, align 1
%0 = zext i32 %arg3 to i64
%1 = zext i32 0 to i64
%div_hb_ls = shl nuw i64 %1, 32
%dividend = or i64 %div_hb_ls, %0
%2 = zext i32 %memload to i64
%div_q = udiv i64 %dividend, %2
%EAX = trunc i64 %div_q to i32
%div_r = urem i64 %dividend, %2
%EDX = trunc i64 %div_r to i32
%R8D = sub i32 %memload, 1
%3 = and i32 %R8D, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
%ZF = icmp eq i32 %R8D, 0
%highbit = and i32 -2147483648, %R8D
%SF = icmp ne i32 %highbit, 0
%memload1 = load i32, ptr @SIGSZ, align 1
%R8D6 = and i32 %R8D, %arg3
%highbit2 = and i32 -2147483648, %R8D6
%SF3 = icmp ne i32 %highbit2, 0
%ZF4 = icmp eq i32 %R8D6, 0
%6 = and i32 %R8D6, 255
%7 = call i32 @llvm.ctpop.i32(i32 %6)
%8 = and i32 %7, 1
%PF5 = icmp eq i32 %8, 0
%9 = zext i32 %memload1 to i64
store i64 %9, ptr %EDX-SKT-LOC, align 1
%10 = zext i32 %memload1 to i64
store i64 %10, ptr %EDX-SKT-LOC121, align 1
store i32 0, ptr %ECX-SKT-LOC171, align 1
store i32 %memload1, ptr %EDX-SKT-LOC173, align 1
%11 = zext i32 %EAX to i64
store i64 %11, ptr %EAX-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF4, true
br i1 %CmpZF_JE, label %bb.9, label %bb.1
bb.1: ; preds = %entry
%12 = and i32 %memload1, %memload1
%highbit7 = and i32 -2147483648, %12
%SF8 = icmp ne i32 %highbit7, 0
%ZF9 = icmp eq i32 %12, 0
%13 = and i32 %12, 255
%14 = call i32 @llvm.ctpop.i32(i32 %13)
%15 = and i32 %14, 1
%PF10 = icmp eq i32 %15, 0
%CmpZF_JE212 = icmp eq i1 %ZF9, true
br i1 %CmpZF_JE212, label %bb.16, label %bb.2
bb.2: ; preds = %bb.1
%R11D = xor i32 %EAX, -1
%16 = inttoptr i64 %arg1 to ptr
%memload11 = load i64, ptr %16, align 1
%17 = zext i32 0 to i64
store i64 %17, ptr %RBX-SKT-LOC, align 1
%18 = zext i32 -1 to i64
store i64 %18, ptr %R12D-SKT-LOC, align 1
br label %bb.5
bb.5: ; preds = %bb.4, %bb.2
%19 = zext i32 %EAX to i64
%RBX = load i64, ptr %RBX-SKT-LOC, align 1
%memref-basereg = add i64 %RBX, %19
%EBP = trunc i64 %memref-basereg to i32
%20 = load i64, ptr %EDX-SKT-LOC, align 1
%EDX12 = trunc i64 %20 to i32
%21 = sub i32 %EBP, %EDX12
%22 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EBP, i32 %EDX12)
%CF = extractvalue { i32, i1 } %22, 1
%ZF13 = icmp eq i32 %21, 0
%highbit14 = and i32 -2147483648, %21
%SF15 = icmp ne i32 %highbit14, 0
%23 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EBP, i32 %EDX12)
%OF = extractvalue { i32, i1 } %23, 1
%24 = and i32 %21, 255
%25 = call i32 @llvm.ctpop.i32(i32 %24)
%26 = and i32 %25, 1
%PF16 = icmp eq i32 %26, 0
store i32 0, ptr %R15D-SKT-LOC, align 1
%CFCmp_JAE = icmp eq i1 %CF, false
br i1 %CFCmp_JAE, label %bb.7, label %bb.6
bb.6: ; preds = %bb.5
%27 = inttoptr i64 %arg2 to ptr
%memload17 = load i64, ptr %27, align 1
%EDI = trunc i64 %RBX to i32
%EDI18 = xor i32 %EDI, -1
%EDI19 = sub i32 %EDI18, %EAX
%28 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EDI18, i32 %EAX)
%CF20 = extractvalue { i32, i1 } %28, 1
%ZF21 = icmp eq i32 %EDI19, 0
%highbit22 = and i32 -2147483648, %EDI19
%SF23 = icmp ne i32 %highbit22, 0
%29 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EDI18, i32 %EAX)
%OF24 = extractvalue { i32, i1 } %29, 1
%30 = and i32 %EDI19, 255
%31 = call i32 @llvm.ctpop.i32(i32 %30)
%32 = and i32 %31, 1
%PF25 = icmp eq i32 %32, 0
%EDI29 = add nsw i32 %EDI19, %EDX12
%highbit26 = and i32 -2147483648, %EDI29
%SF27 = icmp ne i32 %highbit26, 0
%ZF28 = icmp eq i32 %EDI29, 0
%33 = zext i32 %EDI29 to i64
%memref-idxreg = mul i64 4, %33
%memref-basereg30 = add i64 %memload17, %memref-idxreg
%34 = inttoptr i64 %memref-basereg30 to ptr
%memload31 = load i32, ptr %34, align 1
store i32 %memload31, ptr %R15D-SKT-LOC, align 1
br label %bb.7
bb.7: ; preds = %bb.6, %bb.5
%R15D = load i32, ptr %R15D-SKT-LOC, align 1
%35 = trunc i32 %R8D6 to i8
%36 = zext i8 %35 to i32
%shift-cnt-msk = and i32 %36, 63
%R15D35 = shl i32 %R15D, %shift-cnt-msk
%shrd_cf_count_cmp = icmp sgt i32 %shift-cnt-msk, 0
%37 = sub i32 32, %shift-cnt-msk
%shld_cf_count_shift = shl i32 1, %37
%shld_cf_count_and = and i32 %R15D, %shld_cf_count_shift
%shld_cf_count_shft_out = icmp sgt i32 %shld_cf_count_and, 0
%shld_cf_update = select i1 %shrd_cf_count_cmp, i1 %shld_cf_count_shft_out, i1 false
%ZF32 = icmp eq i32 %R15D35, 0
%highbit33 = and i32 -2147483648, %R15D35
%SF34 = icmp ne i32 %highbit33, 0
%EBP40 = add i32 %EBP, 1
%38 = and i32 %EBP40, 255
%39 = call i32 @llvm.ctpop.i32(i32 %38)
%40 = and i32 %39, 1
%PF36 = icmp eq i32 %40, 0
%ZF37 = icmp eq i32 %EBP40, 0
%highbit38 = and i32 -2147483648, %EBP40
%SF39 = icmp ne i32 %highbit38, 0
%41 = load i64, ptr %R12D-SKT-LOC, align 1
%R12D = trunc i64 %41 to i32
%42 = sub i32 %EBP40, %EDX12
%43 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EBP40, i32 %EDX12)
%CF41 = extractvalue { i32, i1 } %43, 1
%ZF42 = icmp eq i32 %42, 0
%highbit43 = and i32 -2147483648, %42
%SF44 = icmp ne i32 %highbit43, 0
%44 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EBP40, i32 %EDX12)
%OF45 = extractvalue { i32, i1 } %44, 1
%45 = and i32 %42, 255
%46 = call i32 @llvm.ctpop.i32(i32 %45)
%47 = and i32 %46, 1
%PF46 = icmp eq i32 %47, 0
store i32 0, ptr %EDI-SKT-LOC, align 1
store i32 %R12D, ptr %R13D-SKT-LOC, align 1
%CFCmp_JAE213 = icmp eq i1 %CF41, false
br i1 %CFCmp_JAE213, label %bb.4, label %bb.8
bb.8: ; preds = %bb.7
%48 = inttoptr i64 %arg2 to ptr
%memload47 = load i64, ptr %48, align 1
%R13D = trunc i64 %RBX to i32
%R13D48 = xor i32 %R13D, -1
%49 = zext i32 %R13D48 to i64
%50 = zext i32 %R11D to i64
%memref-basereg49 = add i64 %50, %49
%EDI50 = trunc i64 %memref-basereg49 to i32
%EDI54 = add nsw i32 %EDI50, %EDX12
%highbit51 = and i32 -2147483648, %EDI54
%SF52 = icmp ne i32 %highbit51, 0
%ZF53 = icmp eq i32 %EDI54, 0
%51 = zext i32 %EDI54 to i64
%memref-idxreg55 = mul i64 4, %51
%memref-basereg56 = add i64 %memload47, %memref-idxreg55
%52 = inttoptr i64 %memref-basereg56 to ptr
%memload57 = load i32, ptr %52, align 1
store i32 %memload57, ptr %EDI-SKT-LOC, align 1
store i32 %R13D48, ptr %R13D-SKT-LOC, align 1
br label %bb.4
bb.4: ; preds = %bb.8, %bb.7
%memload58 = load i32, ptr @HOST_BITS_PER_LONG, align 1
%ECX = sub i32 %memload58, %R8D6
%53 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload58, i32 %R8D6)
%CF59 = extractvalue { i32, i1 } %53, 1
%ZF60 = icmp eq i32 %ECX, 0
%highbit61 = and i32 -2147483648, %ECX
%SF62 = icmp ne i32 %highbit61, 0
%54 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload58, i32 %R8D6)
%OF63 = extractvalue { i32, i1 } %54, 1
%55 = and i32 %ECX, 255
%56 = call i32 @llvm.ctpop.i32(i32 %55)
%57 = and i32 %56, 1
%PF64 = icmp eq i32 %57, 0
%EDI65 = load i32, ptr %EDI-SKT-LOC, align 1
%58 = trunc i32 %ECX to i8
%59 = zext i8 %58 to i32
%shift-cnt-msk66 = and i32 %59, 63
%EDI75 = lshr i32 %EDI65, %shift-cnt-msk66
%shrd_cf_count_cmp67 = icmp sgt i32 %shift-cnt-msk66, 0
%60 = sub i32 32, %shift-cnt-msk66
%shld_cf_count_shift68 = shl i32 1, %60
%shld_cf_count_and69 = and i32 %EDI65, %shld_cf_count_shift68
%shld_cf_count_shft_out70 = icmp sgt i32 %shld_cf_count_and69, 0
%shld_cf_update71 = select i1 %shrd_cf_count_cmp67, i1 %shld_cf_count_shft_out70, i1 %CF59
%ZF72 = icmp eq i32 %EDI75, 0
%highbit73 = and i32 -2147483648, %EDI75
%SF74 = icmp ne i32 %highbit73, 0
%EDI80 = or i32 %EDI75, %R15D35
%highbit76 = and i32 -2147483648, %EDI80
%SF77 = icmp ne i32 %highbit76, 0
%ZF78 = icmp eq i32 %EDI80, 0
%61 = and i32 %EDI80, 255
%62 = call i32 @llvm.ctpop.i32(i32 %61)
%63 = and i32 %62, 1
%PF79 = icmp eq i32 %63, 0
%R13D81 = load i32, ptr %R13D-SKT-LOC, align 1
%EDX85 = add nsw i32 %EDX12, %R13D81
%highbit82 = and i32 -2147483648, %EDX85
%SF83 = icmp ne i32 %highbit82, 0
%ZF84 = icmp eq i32 %EDX85, 0
%64 = zext i32 %EDX85 to i64
%memref-idxreg86 = mul i64 4, %64
%memref-basereg87 = add i64 %memload11, %memref-idxreg86
%65 = inttoptr i64 %memref-basereg87 to ptr
store i32 %EDI80, ptr %65, align 1
%66 = trunc i64 %RBX to i32
%EBX = add i32 %66, 1
%67 = and i32 %EBX, 255
%68 = call i32 @llvm.ctpop.i32(i32 %67)
%69 = and i32 %68, 1
%PF88 = icmp eq i32 %69, 0
%ZF89 = icmp eq i32 %EBX, 0
%highbit90 = and i32 -2147483648, %EBX
%SF91 = icmp ne i32 %highbit90, 0
%memload92 = load i32, ptr @SIGSZ, align 1
%R12D97 = sub i32 %R12D, 1
%70 = and i32 %R12D97, 255
%71 = call i32 @llvm.ctpop.i32(i32 %70)
%72 = and i32 %71, 1
%PF93 = icmp eq i32 %72, 0
%ZF94 = icmp eq i32 %R12D97, 0
%highbit95 = and i32 -2147483648, %R12D97
%SF96 = icmp ne i32 %highbit95, 0
%73 = sub i32 %EBX, %memload92
%74 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EBX, i32 %memload92)
%CF98 = extractvalue { i32, i1 } %74, 1
%ZF99 = icmp eq i32 %73, 0
%highbit100 = and i32 -2147483648, %73
%SF101 = icmp ne i32 %highbit100, 0
%75 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EBX, i32 %memload92)
%OF102 = extractvalue { i32, i1 } %75, 1
%76 = and i32 %73, 255
%77 = call i32 @llvm.ctpop.i32(i32 %76)
%78 = and i32 %77, 1
%PF103 = icmp eq i32 %78, 0
%CFCmp_JAE214 = icmp eq i1 %CF98, false
%79 = zext i32 %memload92 to i64
store i64 %79, ptr %EDX-SKT-LOC, align 1
%80 = zext i32 %EBX to i64
store i64 %80, ptr %RBX-SKT-LOC, align 1
%81 = zext i32 %R12D97 to i64
store i64 %81, ptr %R12D-SKT-LOC, align 1
br i1 %CFCmp_JAE214, label %bb.16, label %bb.5
bb.9: ; preds = %entry
%82 = sub i32 %EAX, %memload1
%83 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EAX, i32 %memload1)
%CF104 = extractvalue { i32, i1 } %83, 1
%ZF105 = icmp eq i32 %82, 0
%highbit106 = and i32 -2147483648, %82
%SF107 = icmp ne i32 %highbit106, 0
%84 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EAX, i32 %memload1)
%OF108 = extractvalue { i32, i1 } %84, 1
%85 = and i32 %82, 255
%86 = call i32 @llvm.ctpop.i32(i32 %85)
%87 = and i32 %86, 1
%PF109 = icmp eq i32 %87, 0
%CFCmp_JAE215 = icmp eq i1 %CF104, false
br i1 %CFCmp_JAE215, label %bb.13, label %bb.10
bb.10: ; preds = %bb.9
%88 = inttoptr i64 %arg2 to ptr
%memload110 = load i64, ptr %88, align 1
%89 = inttoptr i64 %arg1 to ptr
%memload111 = load i64, ptr %89, align 1
%90 = zext i32 0 to i64
store i64 %90, ptr %EBX-SKT-LOC, align 1
%91 = zext i32 0 to i64
store i64 %91, ptr %ECX-SKT-LOC, align 1
br label %bb.11
bb.11: ; preds = %bb.10, %bb.11
%92 = load i64, ptr %EBX-SKT-LOC, align 1
%EBX112 = trunc i64 %92 to i32
%93 = zext i32 %EAX to i64
%94 = zext i32 %EBX112 to i64
%memref-basereg113 = add i64 %94, %93
%EBP114 = trunc i64 %memref-basereg113 to i32
%EBP119 = add i32 %EBP114, 1
%95 = and i32 %EBP119, 255
%96 = call i32 @llvm.ctpop.i32(i32 %95)
%97 = and i32 %96, 1
%PF115 = icmp eq i32 %97, 0
%ZF116 = icmp eq i32 %EBP119, 0
%highbit117 = and i32 -2147483648, %EBP119
%SF118 = icmp ne i32 %highbit117, 0
%EBX120 = xor i32 %EBX112, -1
%98 = load i64, ptr %EDX-SKT-LOC121, align 1
%EDX122 = trunc i64 %98 to i32
%EBX126 = add nsw i32 %EBX120, %EDX122
%highbit123 = and i32 -2147483648, %EBX126
%SF124 = icmp ne i32 %highbit123, 0
%ZF125 = icmp eq i32 %EBX126, 0
%99 = load i64, ptr %ECX-SKT-LOC, align 1
%ECX127 = trunc i64 %99 to i32
%EDX131 = add nsw i32 %EDX122, %ECX127
%highbit128 = and i32 -2147483648, %EDX131
%SF129 = icmp ne i32 %highbit128, 0
%ZF130 = icmp eq i32 %EDX131, 0
%EDX136 = sub i32 %EDX131, 1
%100 = and i32 %EDX136, 255
%101 = call i32 @llvm.ctpop.i32(i32 %100)
%102 = and i32 %101, 1
%PF132 = icmp eq i32 %102, 0
%ZF133 = icmp eq i32 %EDX136, 0
%highbit134 = and i32 -2147483648, %EDX136
%SF135 = icmp ne i32 %highbit134, 0
%EBX137 = sub i32 %EBX126, %EAX
%103 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EBX126, i32 %EAX)
%CF138 = extractvalue { i32, i1 } %103, 1
%ZF139 = icmp eq i32 %EBX137, 0
%highbit140 = and i32 -2147483648, %EBX137
%SF141 = icmp ne i32 %highbit140, 0
%104 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EBX126, i32 %EAX)
%OF142 = extractvalue { i32, i1 } %104, 1
%105 = and i32 %EBX137, 255
%106 = call i32 @llvm.ctpop.i32(i32 %105)
%107 = and i32 %106, 1
%PF143 = icmp eq i32 %107, 0
%108 = zext i32 %EBX137 to i64
%memref-idxreg144 = mul i64 4, %108
%memref-basereg145 = add i64 %memload110, %memref-idxreg144
%109 = inttoptr i64 %memref-basereg145 to ptr
%memload146 = load i32, ptr %109, align 1
%110 = zext i32 %EDX136 to i64
%memref-idxreg147 = mul i64 4, %110
%memref-basereg148 = add i64 %memload111, %memref-idxreg147
%111 = inttoptr i64 %memref-basereg148 to ptr
store i32 %memload146, ptr %111, align 1
%ESI = add i32 %EBX112, 1
%112 = and i32 %ESI, 255
%113 = call i32 @llvm.ctpop.i32(i32 %112)
%114 = and i32 %113, 1
%PF149 = icmp eq i32 %114, 0
%ZF150 = icmp eq i32 %ESI, 0
%highbit151 = and i32 -2147483648, %ESI
%SF152 = icmp ne i32 %highbit151, 0
%memload153 = load i32, ptr @SIGSZ, align 1
%ECX158 = sub i32 %ECX127, 1
%115 = and i32 %ECX158, 255
%116 = call i32 @llvm.ctpop.i32(i32 %115)
%117 = and i32 %116, 1
%PF154 = icmp eq i32 %117, 0
%ZF155 = icmp eq i32 %ECX158, 0
%highbit156 = and i32 -2147483648, %ECX158
%SF157 = icmp ne i32 %highbit156, 0
%118 = sub i32 %EBP119, %memload153
%119 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EBP119, i32 %memload153)
%CF159 = extractvalue { i32, i1 } %119, 1
%ZF160 = icmp eq i32 %118, 0
%highbit161 = and i32 -2147483648, %118
%SF162 = icmp ne i32 %highbit161, 0
%120 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EBP119, i32 %memload153)
%OF163 = extractvalue { i32, i1 } %120, 1
%121 = and i32 %118, 255
%122 = call i32 @llvm.ctpop.i32(i32 %121)
%123 = and i32 %122, 1
%PF164 = icmp eq i32 %123, 0
store i32 %memload153, ptr %EDX-SKT-LOC173, align 1
%CmpCF_JB = icmp eq i1 %CF159, true
%124 = zext i32 %ESI to i64
store i64 %124, ptr %EBX-SKT-LOC, align 1
%125 = zext i32 %ECX158 to i64
store i64 %125, ptr %ECX-SKT-LOC, align 1
%126 = zext i32 %memload153 to i64
store i64 %126, ptr %EDX-SKT-LOC121, align 1
br i1 %CmpCF_JB, label %bb.11, label %bb.12
bb.12: ; preds = %bb.11
%CF165 = icmp ne i32 0, 0
%ECX170 = sub i32 0, %ECX158
%ZF166 = icmp eq i32 %ECX170, 0
%highbit167 = and i32 -2147483648, %ECX170
%SF168 = icmp ne i32 %highbit167, 0
%127 = and i32 %ECX170, 255
%128 = call i32 @llvm.ctpop.i32(i32 %127)
%129 = and i32 %128, 1
%PF169 = icmp eq i32 %129, 0
store i32 %ECX170, ptr %ECX-SKT-LOC171, align 1
br label %bb.13
bb.13: ; preds = %bb.12, %bb.9
%ECX172 = load i32, ptr %ECX-SKT-LOC171, align 1
%EDX174 = load i32, ptr %EDX-SKT-LOC173, align 1
%130 = sub i32 %ECX172, %EDX174
%131 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %ECX172, i32 %EDX174)
%CF175 = extractvalue { i32, i1 } %131, 1
%ZF176 = icmp eq i32 %130, 0
%highbit177 = and i32 -2147483648, %130
%SF178 = icmp ne i32 %highbit177, 0
%132 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %ECX172, i32 %EDX174)
%OF179 = extractvalue { i32, i1 } %132, 1
%133 = and i32 %130, 255
%134 = call i32 @llvm.ctpop.i32(i32 %133)
%135 = and i32 %134, 1
%PF180 = icmp eq i32 %135, 0
%136 = zext i32 %EDX174 to i64
store i64 %136, ptr %EDX-SKT-LOC183, align 1
%137 = zext i32 %ECX172 to i64
store i64 %137, ptr %ECX-SKT-LOC192, align 1
%CFCmp_JAE216 = icmp eq i1 %CF175, false
br i1 %CFCmp_JAE216, label %bb.16, label %bb.14
bb.14: ; preds = %bb.13
%138 = inttoptr i64 %arg1 to ptr
%memload181 = load i64, ptr %138, align 1
%ESI182 = xor i32 %ECX172, -1
%139 = zext i32 %ESI182 to i64
store i64 %139, ptr %ESI-SKT-LOC, align 1
store i64 %memload181, ptr %EAX-SKT-LOC, align 1
br label %bb.15
bb.15: ; preds = %bb.14, %bb.15
%140 = load i64, ptr %EDX-SKT-LOC183, align 1
%EDX184 = trunc i64 %140 to i32
%141 = load i64, ptr %ESI-SKT-LOC, align 1
%ESI185 = trunc i64 %141 to i32
%EDX189 = add nsw i32 %EDX184, %ESI185
%highbit186 = and i32 -2147483648, %EDX189
%SF187 = icmp ne i32 %highbit186, 0
%ZF188 = icmp eq i32 %EDX189, 0
%142 = zext i32 %EDX189 to i64
%memref-idxreg190 = mul i64 4, %142
%memref-basereg191 = add i64 %memload181, %memref-idxreg190
%143 = inttoptr i64 %memref-basereg191 to ptr
store i32 0, ptr %143, align 1
%144 = load i64, ptr %ECX-SKT-LOC192, align 1
%ECX193 = trunc i64 %144 to i32
%ECX198 = add i32 %ECX193, 1
%145 = and i32 %ECX198, 255
%146 = call i32 @llvm.ctpop.i32(i32 %145)
%147 = and i32 %146, 1
%PF194 = icmp eq i32 %147, 0
%ZF195 = icmp eq i32 %ECX198, 0
%highbit196 = and i32 -2147483648, %ECX198
%SF197 = icmp ne i32 %highbit196, 0
%memload199 = load i32, ptr @SIGSZ, align 1
%ESI204 = sub i32 %ESI185, 1
%148 = and i32 %ESI204, 255
%149 = call i32 @llvm.ctpop.i32(i32 %148)
%150 = and i32 %149, 1
%PF200 = icmp eq i32 %150, 0
%ZF201 = icmp eq i32 %ESI204, 0
%highbit202 = and i32 -2147483648, %ESI204
%SF203 = icmp ne i32 %highbit202, 0
%151 = sub i32 %ECX198, %memload199
%152 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %ECX198, i32 %memload199)
%CF205 = extractvalue { i32, i1 } %152, 1
%ZF206 = icmp eq i32 %151, 0
%highbit207 = and i32 -2147483648, %151
%SF208 = icmp ne i32 %highbit207, 0
%153 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %ECX198, i32 %memload199)
%OF209 = extractvalue { i32, i1 } %153, 1
%154 = and i32 %151, 255
%155 = call i32 @llvm.ctpop.i32(i32 %154)
%156 = and i32 %155, 1
%PF210 = icmp eq i32 %156, 0
%CmpCF_JB217 = icmp eq i1 %CF205, true
%157 = zext i32 %ECX198 to i64
store i64 %157, ptr %ECX-SKT-LOC192, align 1
%158 = zext i32 %memload199 to i64
store i64 %158, ptr %EDX-SKT-LOC183, align 1
%159 = zext i32 %ESI204 to i64
store i64 %159, ptr %ESI-SKT-LOC, align 1
br i1 %CmpCF_JB217, label %bb.15, label %bb.16
bb.16: ; preds = %bb.15, %bb.13, %bb.4, %bb.1
%160 = load i64, ptr %EAX-SKT-LOC, align 1
%EAX211 = trunc i64 %160 to i32
ret i32 %EAX211
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_real.c_lshift_significand.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_real.c_lshift_significand.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@HOST_BITS_PER_LONG = common local_unnamed_addr global i32 0, align 4
@SIGSZ = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @lshift_significand], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @lshift_significand(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i32 noundef %2) #0 {
%4 = load i32, ptr @HOST_BITS_PER_LONG, align 4, !tbaa !6
%5 = udiv i32 %2, %4
%6 = add i32 %4, -1
%7 = and i32 %6, %2
%8 = icmp eq i32 %7, 0
%9 = load i32, ptr @SIGSZ, align 4, !tbaa !6
br i1 %8, label %14, label %10
10: ; preds = %3
%11 = icmp eq i32 %9, 0
br i1 %11, label %88, label %12
12: ; preds = %10
%13 = load ptr, ptr %0, align 8, !tbaa !10
br label %50
14: ; preds = %3
%15 = icmp ult i32 %5, %9
br i1 %15, label %16, label %19
16: ; preds = %14
%17 = load ptr, ptr %1, align 8, !tbaa !10
%18 = load ptr, ptr %0, align 8, !tbaa !10
br label %25
19: ; preds = %25, %14
%20 = phi i32 [ %9, %14 ], [ %38, %25 ]
%21 = phi i32 [ 0, %14 ], [ %36, %25 ]
%22 = icmp ult i32 %21, %20
br i1 %22, label %23, label %88
23: ; preds = %19
%24 = load ptr, ptr %0, align 8, !tbaa !10
br label %40
25: ; preds = %16, %25
%26 = phi i32 [ %9, %16 ], [ %38, %25 ]
%27 = phi i32 [ 0, %16 ], [ %36, %25 ]
%28 = xor i32 %27, -1
%29 = add i32 %26, %28
%30 = sub i32 %29, %5
%31 = zext i32 %30 to i64
%32 = getelementptr inbounds i32, ptr %17, i64 %31
%33 = load i32, ptr %32, align 4, !tbaa !6
%34 = zext i32 %29 to i64
%35 = getelementptr inbounds i32, ptr %18, i64 %34
store i32 %33, ptr %35, align 4, !tbaa !6
%36 = add i32 %27, 1
%37 = add i32 %36, %5
%38 = load i32, ptr @SIGSZ, align 4, !tbaa !6
%39 = icmp ult i32 %37, %38
br i1 %39, label %25, label %19, !llvm.loop !13
40: ; preds = %23, %40
%41 = phi i32 [ %20, %23 ], [ %48, %40 ]
%42 = phi i32 [ %21, %23 ], [ %47, %40 ]
%43 = xor i32 %42, -1
%44 = add i32 %41, %43
%45 = zext i32 %44 to i64
%46 = getelementptr inbounds i32, ptr %24, i64 %45
store i32 0, ptr %46, align 4, !tbaa !6
%47 = add nuw i32 %42, 1
%48 = load i32, ptr @SIGSZ, align 4, !tbaa !6
%49 = icmp ult i32 %47, %48
br i1 %49, label %40, label %88, !llvm.loop !15
50: ; preds = %12, %75
%51 = phi i32 [ %9, %12 ], [ %86, %75 ]
%52 = phi i32 [ 0, %12 ], [ %85, %75 ]
%53 = add i32 %52, %5
%54 = icmp ult i32 %53, %51
br i1 %54, label %55, label %63
55: ; preds = %50
%56 = load ptr, ptr %1, align 8, !tbaa !10
%57 = xor i32 %52, -1
%58 = sub i32 %57, %5
%59 = add i32 %58, %51
%60 = zext i32 %59 to i64
%61 = getelementptr inbounds i32, ptr %56, i64 %60
%62 = load i32, ptr %61, align 4, !tbaa !6
br label %63
63: ; preds = %50, %55
%64 = phi i32 [ %62, %55 ], [ 0, %50 ]
%65 = shl i32 %64, %7
%66 = add i32 %53, 1
%67 = icmp ult i32 %66, %51
br i1 %67, label %68, label %75
68: ; preds = %63
%69 = load ptr, ptr %1, align 8, !tbaa !10
%70 = sub i32 %51, %53
%71 = add i32 %70, -2
%72 = zext i32 %71 to i64
%73 = getelementptr inbounds i32, ptr %69, i64 %72
%74 = load i32, ptr %73, align 4, !tbaa !6
br label %75
75: ; preds = %63, %68
%76 = phi i32 [ %74, %68 ], [ 0, %63 ]
%77 = load i32, ptr @HOST_BITS_PER_LONG, align 4, !tbaa !6
%78 = sub i32 %77, %7
%79 = lshr i32 %76, %78
%80 = or i32 %79, %65
%81 = xor i32 %52, -1
%82 = add i32 %51, %81
%83 = zext i32 %82 to i64
%84 = getelementptr inbounds i32, ptr %13, i64 %83
store i32 %80, ptr %84, align 4, !tbaa !6
%85 = add nuw i32 %52, 1
%86 = load i32, ptr @SIGSZ, align 4, !tbaa !6
%87 = icmp ult i32 %85, %86
br i1 %87, label %50, label %88, !llvm.loop !16
88: ; preds = %75, %40, %10, %19
ret void
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}
| freebsd_contrib_gcc_extr_real.c_lshift_significand |
; ModuleID = 'freebsd_contrib_ntp_libntp_extr_recvbuff.c_free_recvbuffs.so'
source_filename = "freebsd_contrib_ntp_libntp_extr_recvbuff.c_free_recvbuffs.so"
@free_recvbufs = common dso_local global i32 0, align 4
define dso_local i32 @free_recvbuffs() {
entry:
%memload = load i32, ptr @free_recvbufs, align 1
ret i32 %memload
}
| ; ModuleID = 'AnghaBench/freebsd/contrib/ntp/libntp/extr_recvbuff.c_free_recvbuffs.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/libntp/extr_recvbuff.c_free_recvbuffs.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@free_recvbufs = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define i32 @free_recvbuffs() local_unnamed_addr #0 {
%1 = load i32, ptr @free_recvbufs, align 4, !tbaa !6
ret i32 %1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_ntp_libntp_extr_recvbuff.c_free_recvbuffs |
; ModuleID = 'qmk_firmware_keyboards_dz60_keymaps_marianas_extr_relativity.c_addKeyCode.so'
source_filename = "qmk_firmware_keyboards_dz60_keymaps_marianas_extr_relativity.c_addKeyCode.so"
@macroTapsLen = common dso_local global i32 0, align 4
@macroTaps = common dso_local global i64 0, align 8
define dso_local i64 @addKeyCode(i64 %arg1) {
entry:
%EDX-SKT-LOC = alloca i64, align 8
%RDX-SKT-LOC = alloca i64, align 8
%memload = load i32, ptr @macroTapsLen, align 1
%memload1 = load i64, ptr @macroTaps, align 1
%0 = sub i32 %memload, 3
%1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload, i32 3)
%CF = extractvalue { i32, i1 } %1, 1
%ZF = icmp eq i32 %0, 0
%highbit = and i32 -2147483648, %0
%SF = icmp ne i32 %highbit, 0
%2 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload, i32 3)
%OF = extractvalue { i32, i1 } %2, 1
%3 = and i32 %0, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
%6 = zext i32 0 to i64
store i64 %6, ptr %EDX-SKT-LOC, align 1
%SFAndOF_JL = icmp ne i1 %SF, %OF
br i1 %SFAndOF_JL, label %bb.5, label %bb.1
bb.1: ; preds = %entry
%ECX = add i32 %memload, -2
%7 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %memload, i32 -2)
%CF2 = extractvalue { i32, i1 } %7, 1
%8 = and i32 %ECX, 255
%9 = call i32 @llvm.ctpop.i32(i32 %8)
%10 = and i32 %9, 1
%PF3 = icmp eq i32 %10, 0
%ZF4 = icmp eq i32 %ECX, 0
%highbit5 = and i32 -2147483648, %ECX
%SF6 = icmp ne i32 %highbit5, 0
%11 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %memload, i32 -2)
%OF7 = extractvalue { i32, i1 } %11, 1
%12 = zext i32 0 to i64
store i64 %12, ptr %RDX-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.3
%RDX = load i64, ptr %RDX-SKT-LOC, align 1
%memref-idxreg = mul i64 8, %RDX
%memref-basereg = add i64 %memload1, %memref-idxreg
%13 = inttoptr i64 %memref-basereg to ptr
%14 = load i64, ptr %13, align 1
%15 = sub i64 %14, 0
%16 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %14, i64 0)
%CF8 = extractvalue { i64, i1 } %16, 1
%ZF9 = icmp eq i64 %15, 0
%highbit10 = and i64 -9223372036854775808, %15
%SF11 = icmp ne i64 %highbit10, 0
%17 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %14, i64 0)
%OF12 = extractvalue { i64, i1 } %17, 1
%18 = and i64 %15, 255
%19 = call i64 @llvm.ctpop.i64(i64 %18)
%20 = and i64 %19, 1
%PF13 = icmp eq i64 %20, 0
store i64 %RDX, ptr %EDX-SKT-LOC, align 1
%CmpZF_JLE = icmp eq i1 %ZF9, true
%CmpOF_JLE = icmp ne i1 %SF11, %OF12
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
br i1 %ZFOrSF_JLE, label %bb.5, label %bb.3
bb.3: ; preds = %bb.2
%RDX18 = add i64 %RDX, 1
%21 = and i64 %RDX18, 255
%22 = call i64 @llvm.ctpop.i64(i64 %21)
%23 = and i64 %22, 1
%PF14 = icmp eq i64 %23, 0
%ZF15 = icmp eq i64 %RDX18, 0
%highbit16 = and i64 -9223372036854775808, %RDX18
%SF17 = icmp ne i64 %highbit16, 0
%24 = zext i32 %ECX to i64
%25 = sub i64 %24, %RDX18
%26 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %24, i64 %RDX18)
%CF19 = extractvalue { i64, i1 } %26, 1
%ZF20 = icmp eq i64 %25, 0
%highbit21 = and i64 -9223372036854775808, %25
%SF22 = icmp ne i64 %highbit21, 0
%27 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %24, i64 %RDX18)
%OF23 = extractvalue { i64, i1 } %27, 1
%28 = and i64 %25, 255
%29 = call i64 @llvm.ctpop.i64(i64 %28)
%30 = and i64 %29, 1
%PF24 = icmp eq i64 %30, 0
%CmpZF_JNE = icmp eq i1 %ZF20, false
store i64 %RDX18, ptr %RDX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.2, label %bb.4
bb.4: ; preds = %bb.3
%31 = zext i32 %ECX to i64
store i64 %31, ptr %EDX-SKT-LOC, align 1
br label %bb.5
bb.5: ; preds = %bb.4, %bb.2, %entry
%32 = load i64, ptr %EDX-SKT-LOC, align 1
%EDX = trunc i64 %32 to i32
%33 = zext i32 %EDX to i64
%memref-idxreg25 = mul i64 8, %33
%memref-basereg26 = add i64 %memload1, %memref-idxreg25
%34 = inttoptr i64 %memref-basereg26 to ptr
%35 = load i64, ptr %34, align 1
%36 = sub i64 %35, 0
%37 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %35, i64 0)
%CF27 = extractvalue { i64, i1 } %37, 1
%ZF28 = icmp eq i64 %36, 0
%highbit29 = and i64 -9223372036854775808, %36
%SF30 = icmp ne i64 %highbit29, 0
%38 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %35, i64 0)
%OF31 = extractvalue { i64, i1 } %38, 1
%39 = and i64 %36, 255
%40 = call i64 @llvm.ctpop.i64(i64 %39)
%41 = and i64 %40, 1
%PF32 = icmp eq i64 %41, 0
%CmpZF_JE = icmp eq i1 %ZF28, true
br i1 %CmpZF_JE, label %bb.7, label %bb.6
bb.6: ; preds = %bb.5
br label %UnifiedReturnBlock
bb.7: ; preds = %bb.5
%42 = zext i32 %EDX to i64
%memref-idxreg33 = mul i64 8, %42
%memref-basereg34 = add i64 %memload1, %memref-idxreg33
%43 = inttoptr i64 %memref-basereg34 to ptr
store i64 %arg1, ptr %43, align 1
%44 = zext i32 %EDX to i64
%memref-idxreg35 = mul i64 8, %44
%memref-basereg36 = add i64 %memload1, %memref-idxreg35
%memref-disp = add i64 %memref-basereg36, 8
%45 = inttoptr i64 %memref-disp to ptr
%46 = sext i32 0 to i64
store i64 %46, ptr %45, align 1
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.7, %bb.6
%UnifiedRetVal = phi i64 [ %memload1, %bb.6 ], [ %memload1, %bb.7 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/qmk_firmware/keyboards/dz60/keymaps/marianas/extr_relativity.c_addKeyCode.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/dz60/keymaps/marianas/extr_relativity.c_addKeyCode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@macroTapsLen = common local_unnamed_addr global i32 0, align 4
@macroTaps = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync)
define void @addKeyCode(i64 noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @macroTapsLen, align 4, !tbaa !6
%3 = add i32 %2, -2
%4 = icmp sgt i32 %2, 2
%5 = load ptr, ptr @macroTaps, align 8, !tbaa !10
br i1 %4, label %6, label %21
6: ; preds = %1
%7 = zext nneg i32 %3 to i64
br label %8
8: ; preds = %6, %13
%9 = phi i64 [ 0, %6 ], [ %14, %13 ]
%10 = getelementptr inbounds i64, ptr %5, i64 %9
%11 = load i64, ptr %10, align 8, !tbaa !12
%12 = icmp sgt i64 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %8
%14 = add nuw nsw i64 %9, 1
%15 = icmp eq i64 %14, %7
br i1 %15, label %18, label %8, !llvm.loop !14
16: ; preds = %8
%17 = trunc nuw nsw i64 %9 to i32
br label %18
18: ; preds = %13, %16
%19 = phi i32 [ %17, %16 ], [ %3, %13 ]
%20 = zext nneg i32 %19 to i64
br label %21
21: ; preds = %18, %1
%22 = phi i64 [ 0, %1 ], [ %20, %18 ]
%23 = getelementptr inbounds i64, ptr %5, i64 %22
%24 = load i64, ptr %23, align 8, !tbaa !12
%25 = icmp eq i64 %24, 0
br i1 %25, label %26, label %28
26: ; preds = %21
store i64 %0, ptr %23, align 8, !tbaa !12
%27 = getelementptr inbounds i8, ptr %23, i64 8
store i64 0, ptr %27, align 8, !tbaa !12
br label %28
28: ; preds = %26, %21
ret void
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
| qmk_firmware_keyboards_dz60_keymaps_marianas_extr_relativity.c_addKeyCode |
; ModuleID = 'fastsocket_kernel_drivers_staging_rt2870_extr_..rt2860sta_ioctl.c_rt_ioctl_giwgenie.so'
source_filename = "fastsocket_kernel_drivers_staging_rt2870_extr_..rt2860sta_ioctl.c_rt_ioctl_giwgenie.so"
@Ndis802_11AuthModeWPA = common dso_local global i64 0, align 8
@WPA_SUPPLICANT_ENABLE = common dso_local global i64 0, align 8
@E2BIG = common dso_local global i32 0, align 4
@IE_WPA = common dso_local global i64 0, align 8
@Ndis802_11AuthModeWPA2PSK = common dso_local global i64 0, align 8
@Ndis802_11AuthModeWPA2 = common dso_local global i64 0, align 8
@IE_RSN = common dso_local global i64 0, align 8
declare dso_local ptr @memcpy(ptr, ptr, i64)
define dso_local i32 @rt_ioctl_giwgenie(i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4) {
entry:
%RCX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%1 = inttoptr i64 %memload to ptr
%memload1 = load i32, ptr %1, align 1
%2 = and i32 %memload1, %memload1
%highbit = and i32 -2147483648, %2
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %2, 0
%3 = and i32 %2, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
store i64 %arg4, ptr %RCX-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%memref-disp = add i64 %memload, 8
%6 = inttoptr i64 %memref-disp to ptr
%memload2 = load i64, ptr %6, align 1
%7 = load i64, ptr @Ndis802_11AuthModeWPA, align 8
%8 = sub i64 %memload2, %7
%9 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload2, i64 %7)
%CF = extractvalue { i64, i1 } %9, 1
%ZF3 = icmp eq i64 %8, 0
%highbit4 = and i64 -9223372036854775808, %8
%SF5 = icmp ne i64 %highbit4, 0
%10 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload2, i64 %7)
%OF = extractvalue { i64, i1 } %10, 1
%11 = and i64 %8, 255
%12 = call i64 @llvm.ctpop.i64(i64 %11)
%13 = and i64 %12, 1
%PF6 = icmp eq i64 %13, 0
%CmpSFOF_JGE = icmp eq i1 %SF5, %OF
br i1 %CmpSFOF_JGE, label %bb.4, label %bb.2
bb.4: ; preds = %bb.1
%memref-disp7 = add i64 %memload, 16
%14 = inttoptr i64 %memref-disp7 to ptr
%memload8 = load i64, ptr %14, align 1
%15 = inttoptr i64 %arg3 to ptr
%memload9 = load i32, ptr %15, align 1
%16 = load i64, ptr @WPA_SUPPLICANT_ENABLE, align 8
%17 = sub i64 %memload8, %16
%18 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload8, i64 %16)
%CF10 = extractvalue { i64, i1 } %18, 1
%ZF11 = icmp eq i64 %17, 0
%highbit12 = and i64 -9223372036854775808, %17
%SF13 = icmp ne i64 %highbit12, 0
%19 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload8, i64 %16)
%OF14 = extractvalue { i64, i1 } %19, 1
%20 = and i64 %17, 255
%21 = call i64 @llvm.ctpop.i64(i64 %20)
%22 = and i64 %21, 1
%PF15 = icmp eq i64 %22, 0
%CmpZF_JNE = icmp eq i1 %ZF11, false
br i1 %CmpZF_JNE, label %bb.7, label %bb.5
bb.5: ; preds = %bb.4
%23 = sub i32 %memload9, %memload1
%24 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload9, i32 %memload1)
%CF16 = extractvalue { i32, i1 } %24, 1
%ZF17 = icmp eq i32 %23, 0
%highbit18 = and i32 -2147483648, %23
%SF19 = icmp ne i32 %highbit18, 0
%25 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload9, i32 %memload1)
%OF20 = extractvalue { i32, i1 } %25, 1
%26 = and i32 %23, 255
%27 = call i32 @llvm.ctpop.i32(i32 %26)
%28 = and i32 %27, 1
%PF21 = icmp eq i32 %28, 0
%SFAndOF_JL = icmp ne i1 %SF19, %OF20
br i1 %SFAndOF_JL, label %bb.8, label %bb.6
bb.6: ; preds = %bb.5
%29 = inttoptr i64 %arg3 to ptr
store i32 %memload1, ptr %29, align 1
br label %bb.10
bb.7: ; preds = %bb.4
%ESI = add i32 %memload1, 2
%30 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %memload1, i32 2)
%CF22 = extractvalue { i32, i1 } %30, 1
%31 = and i32 %ESI, 255
%32 = call i32 @llvm.ctpop.i32(i32 %31)
%33 = and i32 %32, 1
%PF23 = icmp eq i32 %33, 0
%ZF24 = icmp eq i32 %ESI, 0
%highbit25 = and i32 -2147483648, %ESI
%SF26 = icmp ne i32 %highbit25, 0
%34 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %memload1, i32 2)
%OF27 = extractvalue { i32, i1 } %34, 1
%35 = sub i32 %memload9, %ESI
%36 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload9, i32 %ESI)
%CF28 = extractvalue { i32, i1 } %36, 1
%ZF29 = icmp eq i32 %35, 0
%highbit30 = and i32 -2147483648, %35
%SF31 = icmp ne i32 %highbit30, 0
%37 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload9, i32 %ESI)
%OF32 = extractvalue { i32, i1 } %37, 1
%38 = and i32 %35, 255
%39 = call i32 @llvm.ctpop.i32(i32 %38)
%40 = and i32 %39, 1
%PF33 = icmp eq i32 %40, 0
%CmpSFOF_JGE71 = icmp eq i1 %SF31, %OF32
br i1 %CmpSFOF_JGE71, label %bb.9, label %bb.8
bb.8: ; preds = %bb.7, %bb.5
%41 = load i32, ptr @E2BIG, align 4
%EAX = sub i32 0, %41
%42 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 0, i32 %41)
%CF34 = extractvalue { i32, i1 } %42, 1
%ZF35 = icmp eq i32 %EAX, 0
%highbit36 = and i32 -2147483648, %EAX
%SF37 = icmp ne i32 %highbit36, 0
%43 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 0, i32 %41)
%OF38 = extractvalue { i32, i1 } %43, 1
%44 = and i32 %EAX, 255
%45 = call i32 @llvm.ctpop.i32(i32 %44)
%46 = and i32 %45, 1
%PF39 = icmp eq i32 %46, 0
br label %UnifiedReturnBlock
bb.9: ; preds = %bb.7
%memload40 = load i32, ptr @IE_WPA, align 1
%47 = inttoptr i64 %arg3 to ptr
store i32 %ESI, ptr %47, align 1
%memref-disp41 = add i64 %memload, 8
%48 = inttoptr i64 %memref-disp41 to ptr
%memload42 = load i64, ptr %48, align 1
%49 = load i64, ptr @Ndis802_11AuthModeWPA2, align 8
%50 = sub i64 %memload42, %49
%51 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload42, i64 %49)
%CF43 = extractvalue { i64, i1 } %51, 1
%ZF44 = icmp eq i64 %50, 0
%highbit45 = and i64 -9223372036854775808, %50
%SF46 = icmp ne i64 %highbit45, 0
%52 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload42, i64 %49)
%OF47 = extractvalue { i64, i1 } %52, 1
%53 = and i64 %50, 255
%54 = call i64 @llvm.ctpop.i64(i64 %53)
%55 = and i64 %54, 1
%PF48 = icmp eq i64 %55, 0
%memload49 = load i32, ptr @IE_RSN, align 1
%Cond_CMOVE = icmp eq i1 %ZF44, true
%CMOV = select i1 %Cond_CMOVE, i32 %memload49, i32 %memload40
%56 = load i64, ptr @Ndis802_11AuthModeWPA2PSK, align 8
%57 = sub i64 %memload42, %56
%58 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload42, i64 %56)
%CF50 = extractvalue { i64, i1 } %58, 1
%ZF51 = icmp eq i64 %57, 0
%highbit52 = and i64 -9223372036854775808, %57
%SF53 = icmp ne i64 %highbit52, 0
%59 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload42, i64 %56)
%OF54 = extractvalue { i64, i1 } %59, 1
%60 = and i64 %57, 255
%61 = call i64 @llvm.ctpop.i64(i64 %60)
%62 = and i64 %61, 1
%PF55 = icmp eq i64 %62, 0
%Cond_CMOVE56 = icmp eq i1 %ZF51, true
%CMOV57 = select i1 %Cond_CMOVE56, i32 %memload49, i32 %CMOV
%63 = trunc i32 %CMOV57 to i8
%64 = inttoptr i64 %arg4 to ptr
store i8 %63, ptr %64, align 1
%65 = inttoptr i64 %memload to ptr
%memload58 = load i32, ptr %65, align 1
%66 = trunc i32 %memload58 to i8
%EAX59 = zext i8 %66 to i32
%memref-disp60 = add i64 %arg4, 1
%67 = trunc i32 %EAX59 to i8
%68 = inttoptr i64 %memref-disp60 to ptr
store i8 %67, ptr %68, align 1
%RCX = add i64 %arg4, 2
%69 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %arg4, i64 2)
%CF61 = extractvalue { i64, i1 } %69, 1
%70 = and i64 %RCX, 255
%71 = call i64 @llvm.ctpop.i64(i64 %70)
%72 = and i64 %71, 1
%PF62 = icmp eq i64 %72, 0
%ZF63 = icmp eq i64 %RCX, 0
%highbit64 = and i64 -9223372036854775808, %RCX
%SF65 = icmp ne i64 %highbit64, 0
%73 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %arg4, i64 2)
%OF66 = extractvalue { i64, i1 } %73, 1
store i64 %RCX, ptr %RCX-SKT-LOC, align 1
br label %bb.10
bb.10: ; preds = %bb.9, %bb.6
%memref-disp67 = add i64 %memload, 24
%74 = inttoptr i64 %memref-disp67 to ptr
%memload68 = load i64, ptr %74, align 1
%75 = inttoptr i64 %memload to ptr
%memload69 = load i32, ptr %75, align 1
%RCX70 = load i64, ptr %RCX-SKT-LOC, align 1
%76 = inttoptr i64 %RCX70 to ptr
%77 = inttoptr i64 %memload68 to ptr
%78 = zext i32 %memload69 to i64
%79 = call ptr @memcpy(ptr %76, ptr %77, i64 %78)
%RAX = ptrtoint ptr %79 to i64
br label %bb.3
bb.2: ; preds = %bb.1, %entry
%80 = inttoptr i64 %arg3 to ptr
store i32 0, ptr %80, align 1
br label %bb.3
bb.3: ; preds = %bb.2, %bb.10
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.3, %bb.8
%UnifiedRetVal = phi i32 [ %EAX, %bb.8 ], [ 0, %bb.3 ]
ret i32 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/rt2870/extr_..rt2860sta_ioctl.c_rt_ioctl_giwgenie.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/rt2870/extr_..rt2860sta_ioctl.c_rt_ioctl_giwgenie.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@Ndis802_11AuthModeWPA = common local_unnamed_addr global i64 0, align 8
@WPA_SUPPLICANT_ENABLE = common local_unnamed_addr global i64 0, align 8
@E2BIG = common local_unnamed_addr global i32 0, align 4
@IE_WPA = common local_unnamed_addr global i64 0, align 8
@Ndis802_11AuthModeWPA2PSK = common local_unnamed_addr global i64 0, align 8
@Ndis802_11AuthModeWPA2 = common local_unnamed_addr global i64 0, align 8
@IE_RSN = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @rt_ioctl_giwgenie(ptr nocapture noundef readonly %0, ptr nocapture noundef readnone %1, ptr nocapture noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = load ptr, ptr %0, align 8, !tbaa !6
%6 = load i32, ptr %5, align 8, !tbaa !11
%7 = icmp eq i32 %6, 0
br i1 %7, label %13, label %8
8: ; preds = %4
%9 = getelementptr inbounds i8, ptr %5, i64 8
%10 = load i64, ptr %9, align 8, !tbaa !16
%11 = load i64, ptr @Ndis802_11AuthModeWPA, align 8, !tbaa !17
%12 = icmp slt i64 %10, %11
br i1 %12, label %13, label %14
13: ; preds = %8, %4
store i32 0, ptr %2, align 4, !tbaa !18
br label %55
14: ; preds = %8
%15 = getelementptr inbounds i8, ptr %5, i64 16
%16 = load i64, ptr %15, align 8, !tbaa !19
%17 = load i64, ptr @WPA_SUPPLICANT_ENABLE, align 8, !tbaa !17
%18 = icmp eq i64 %16, %17
%19 = load i32, ptr %2, align 4, !tbaa !18
br i1 %18, label %20, label %30
20: ; preds = %14
%21 = icmp slt i32 %19, %6
br i1 %21, label %22, label %25
22: ; preds = %20
%23 = load i32, ptr @E2BIG, align 4, !tbaa !20
%24 = sub nsw i32 0, %23
br label %55
25: ; preds = %20
store i32 %6, ptr %2, align 4, !tbaa !18
%26 = getelementptr inbounds i8, ptr %5, i64 24
%27 = load ptr, ptr %26, align 8, !tbaa !21
%28 = load i32, ptr %5, align 8, !tbaa !11
%29 = tail call i32 @memcpy(ptr noundef %3, ptr noundef %27, i32 noundef %28) #2
br label %55
30: ; preds = %14
%31 = add nsw i32 %6, 2
%32 = icmp slt i32 %19, %31
br i1 %32, label %33, label %36
33: ; preds = %30
%34 = load i32, ptr @E2BIG, align 4, !tbaa !20
%35 = sub nsw i32 0, %34
br label %55
36: ; preds = %30
%37 = load i64, ptr @IE_WPA, align 8, !tbaa !17
store i32 %31, ptr %2, align 4, !tbaa !18
%38 = load i64, ptr %9, align 8, !tbaa !16
%39 = load i64, ptr @Ndis802_11AuthModeWPA2PSK, align 8, !tbaa !17
%40 = icmp eq i64 %38, %39
%41 = load i64, ptr @Ndis802_11AuthModeWPA2, align 8
%42 = icmp eq i64 %38, %41
%43 = select i1 %40, i1 true, i1 %42
%44 = load i64, ptr @IE_RSN, align 8
%45 = select i1 %43, i64 %44, i64 %37
%46 = trunc i64 %45 to i8
store i8 %46, ptr %3, align 1, !tbaa !18
%47 = load i32, ptr %5, align 8, !tbaa !11
%48 = trunc i32 %47 to i8
%49 = getelementptr inbounds i8, ptr %3, i64 1
store i8 %48, ptr %49, align 1, !tbaa !18
%50 = getelementptr inbounds i8, ptr %3, i64 2
%51 = getelementptr inbounds i8, ptr %5, i64 24
%52 = load ptr, ptr %51, align 8, !tbaa !21
%53 = load i32, ptr %5, align 8, !tbaa !11
%54 = tail call i32 @memcpy(ptr noundef nonnull %50, ptr noundef %52, i32 noundef %53) #2
br label %55
55: ; preds = %25, %36, %33, %22, %13
%56 = phi i32 [ 0, %13 ], [ %24, %22 ], [ %35, %33 ], [ 0, %36 ], [ 0, %25 ]
ret i32 %56
}
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"net_device", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !14, i64 0}
!12 = !{!"TYPE_6__", !13, i64 0}
!13 = !{!"TYPE_5__", !14, i64 0, !15, i64 8, !15, i64 16, !8, i64 24}
!14 = !{!"int", !9, i64 0}
!15 = !{!"long", !9, i64 0}
!16 = !{!12, !15, i64 8}
!17 = !{!15, !15, i64 0}
!18 = !{!9, !9, i64 0}
!19 = !{!12, !15, i64 16}
!20 = !{!14, !14, i64 0}
!21 = !{!12, !8, i64 24}
| fastsocket_kernel_drivers_staging_rt2870_extr_..rt2860sta_ioctl.c_rt_ioctl_giwgenie |
; ModuleID = 'freebsd_contrib_wpa_src_radius_extr_radius.c_cmp_int.so'
source_filename = "freebsd_contrib_wpa_src_radius_extr_radius.c_cmp_int.so"
define dso_local i32 @cmp_int(i64 %arg1, i64 %arg2) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
%1 = inttoptr i64 %arg2 to ptr
%2 = load i32, ptr %1, align 1
%EAX = sub i32 %memload, %2
%3 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload, i32 %2)
%CF = extractvalue { i32, i1 } %3, 1
%ZF = icmp eq i32 %EAX, 0
%highbit = and i32 -2147483648, %EAX
%SF = icmp ne i32 %highbit, 0
%4 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload, i32 %2)
%OF = extractvalue { i32, i1 } %4, 1
%5 = and i32 %EAX, 255
%6 = call i32 @llvm.ctpop.i32(i32 %5)
%7 = and i32 %6, 1
%PF = icmp eq i32 %7, 0
ret i32 %EAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/radius/extr_radius.c_cmp_int.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/radius/extr_radius.c_cmp_int.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @cmp_int], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal i32 @cmp_int(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = load i32, ptr %1, align 4, !tbaa !6
%5 = sub nsw i32 %3, %4
ret i32 %5
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_wpa_src_radius_extr_radius.c_cmp_int |
; ModuleID = 'linux_fs_cifs_extr_smb2ops.c_smb2_need_neg.so'
source_filename = "linux_fs_cifs_extr_smb2ops.c_smb2_need_neg.so"
define dso_local i8 @smb2_need_neg(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%1 = load i64, ptr %0, align 1
%2 = sub i64 %1, 0
%3 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %1, i64 0)
%CF = extractvalue { i64, i1 } %3, 1
%ZF = icmp eq i64 %2, 0
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%4 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %1, i64 0)
%OF = extractvalue { i64, i1 } %4, 1
%5 = and i64 %2, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF = icmp eq i64 %7, 0
%AL = icmp eq i1 %ZF, true
%8 = zext i1 %AL to i8
ret i8 %8
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/fs/cifs/extr_smb2ops.c_smb2_need_neg.c'
source_filename = "AnghaBench/linux/fs/cifs/extr_smb2ops.c_smb2_need_neg.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @smb2_need_neg], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal range(i32 0, 2) i32 @smb2_need_neg(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TCP_Server_Info", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_fs_cifs_extr_smb2ops.c_smb2_need_neg |
; ModuleID = 'freebsd_sbin_umount_extr_umount.c_sacmp.so'
source_filename = "freebsd_sbin_umount_extr_umount.c_sacmp.so"
declare dso_local i32 @memcmp(ptr, ptr, i64)
define dso_local i32 @sacmp(i64 %arg1, i64 %arg2) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
%1 = inttoptr i64 %arg2 to ptr
%2 = load i32, ptr %1, align 1
%3 = sub i32 %memload, %2
%4 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload, i32 %2)
%CF = extractvalue { i32, i1 } %4, 1
%ZF = icmp eq i32 %3, 0
%highbit = and i32 -2147483648, %3
%SF = icmp ne i32 %highbit, 0
%5 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload, i32 %2)
%OF = extractvalue { i32, i1 } %5, 1
%6 = and i32 %3, 255
%7 = call i32 @llvm.ctpop.i32(i32 %6)
%8 = and i32 %7, 1
%PF = icmp eq i32 %8, 0
%CmpZF_JNE = icmp eq i1 %ZF, false
br i1 %CmpZF_JNE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%9 = sub i32 %memload, 129
%10 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload, i32 129)
%CF1 = extractvalue { i32, i1 } %10, 1
%ZF2 = icmp eq i32 %9, 0
%highbit3 = and i32 -2147483648, %9
%SF4 = icmp ne i32 %highbit3, 0
%11 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload, i32 129)
%OF5 = extractvalue { i32, i1 } %11, 1
%12 = and i32 %9, 255
%13 = call i32 @llvm.ctpop.i32(i32 %12)
%14 = and i32 %13, 1
%PF6 = icmp eq i32 %14, 0
%CmpZF_JE = icmp eq i1 %ZF2, true
br i1 %CmpZF_JE, label %bb.5, label %bb.2
bb.2: ; preds = %bb.1
%15 = sub i32 %memload, 128
%16 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload, i32 128)
%CF7 = extractvalue { i32, i1 } %16, 1
%ZF8 = icmp eq i32 %15, 0
%highbit9 = and i32 -2147483648, %15
%SF10 = icmp ne i32 %highbit9, 0
%17 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload, i32 128)
%OF11 = extractvalue { i32, i1 } %17, 1
%18 = and i32 %15, 255
%19 = call i32 @llvm.ctpop.i32(i32 %18)
%20 = and i32 %19, 1
%PF12 = icmp eq i32 %20, 0
%CmpZF_JNE26 = icmp eq i1 %ZF8, false
br i1 %CmpZF_JNE26, label %bb.4, label %bb.3
bb.3: ; preds = %bb.2
%RDI = add i64 %arg1, 4
%21 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %arg1, i64 4)
%CF13 = extractvalue { i64, i1 } %21, 1
%22 = and i64 %RDI, 255
%23 = call i64 @llvm.ctpop.i64(i64 %22)
%24 = and i64 %23, 1
%PF14 = icmp eq i64 %24, 0
%ZF15 = icmp eq i64 %RDI, 0
%highbit16 = and i64 -9223372036854775808, %RDI
%SF17 = icmp ne i64 %highbit16, 0
%25 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %arg1, i64 4)
%OF18 = extractvalue { i64, i1 } %25, 1
%RSI = add i64 %arg2, 4
%26 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %arg2, i64 4)
%CF19 = extractvalue { i64, i1 } %26, 1
%27 = and i64 %RSI, 255
%28 = call i64 @llvm.ctpop.i64(i64 %27)
%29 = and i64 %28, 1
%PF20 = icmp eq i64 %29, 0
%ZF21 = icmp eq i64 %RSI, 0
%highbit22 = and i64 -9223372036854775808, %RSI
%SF23 = icmp ne i64 %highbit22, 0
%30 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %arg2, i64 4)
%OF24 = extractvalue { i64, i1 } %30, 1
%31 = inttoptr i64 %RDI to ptr
%32 = inttoptr i64 %RSI to ptr
%33 = zext i32 16 to i64
%EAX = tail call i32 @memcmp(ptr %31, ptr %32, i64 %33)
br label %UnifiedReturnBlock
bb.5: ; preds = %bb.1
%34 = inttoptr i64 %arg1 to ptr
%35 = inttoptr i64 %arg2 to ptr
%36 = zext i32 4 to i64
%EAX25 = tail call i32 @memcmp(ptr %34, ptr %35, i64 %36)
br label %UnifiedReturnBlock
bb.4: ; preds = %bb.2, %entry
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.4, %bb.5, %bb.3
%UnifiedRetVal = phi i32 [ %EAX, %bb.3 ], [ %EAX25, %bb.5 ], [ 1, %bb.4 ]
ret i32 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/sbin/umount/extr_umount.c_sacmp.c'
source_filename = "AnghaBench/freebsd/sbin/umount/extr_umount.c_sacmp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @sacmp(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = load i32, ptr %1, align 4, !tbaa !6
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %15
6: ; preds = %2
switch i32 %3, label %15 [
i32 129, label %10
i32 128, label %7
]
7: ; preds = %6
%8 = getelementptr inbounds i8, ptr %0, i64 4
%9 = getelementptr inbounds i8, ptr %1, i64 4
br label %10
10: ; preds = %6, %7
%11 = phi ptr [ %8, %7 ], [ %0, %6 ]
%12 = phi ptr [ %9, %7 ], [ %1, %6 ]
%13 = phi i32 [ 16, %7 ], [ 4, %6 ]
%14 = tail call i32 @memcmp(ptr noundef nonnull %11, ptr noundef nonnull %12, i32 noundef %13) #2
br label %15
15: ; preds = %6, %2, %10
%16 = phi i32 [ %14, %10 ], [ 1, %2 ], [ 1, %6 ]
ret i32 %16
}
declare i32 @memcmp(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_sbin_umount_extr_umount.c_sacmp |
; ModuleID = 'Quake-III-Arena_code_game_extr_g_active.c_G_SetClientSound.so'
source_filename = "Quake-III-Arena_code_game_extr_g_active.c_G_SetClientSound.so"
@CONTENTS_LAVA = common dso_local global i32 0, align 4
@CONTENTS_SLIME = common dso_local global i32 0, align 4
@level = common dso_local global i64 0, align 8
define dso_local i64 @G_SetClientSound(i64 %arg1) {
entry:
%RAX-SKT-LOC = alloca i64, align 8
%memref-disp = add i64 %arg1, 16
%0 = inttoptr i64 %memref-disp to ptr
%1 = load i64, ptr %0, align 1
%2 = sub i64 %1, 0
%3 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %1, i64 0)
%CF = extractvalue { i64, i1 } %3, 1
%ZF = icmp eq i64 %2, 0
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%4 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %1, i64 0)
%OF = extractvalue { i64, i1 } %4, 1
%5 = and i64 %2, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF = icmp eq i64 %7, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%memload = load i32, ptr @CONTENTS_SLIME, align 1
%memload1 = load i32, ptr @CONTENTS_LAVA, align 1
%ECX = or i32 %memload, %memload1
%8 = and i32 %ECX, 255
%9 = call i32 @llvm.ctpop.i32(i32 %8)
%10 = and i32 %9, 1
%PF2 = icmp eq i32 %10, 0
%11 = inttoptr i64 %arg1 to ptr
%12 = load i32, ptr %11, align 1
%13 = zext i32 %12 to i64
%14 = zext i32 %ECX to i64
%15 = and i64 %13, %14
%ZF3 = icmp eq i64 %15, 0
%highbit4 = and i64 -9223372036854775808, %15
%SF5 = icmp ne i64 %highbit4, 0
%16 = and i64 %15, 255
%17 = call i64 @llvm.ctpop.i64(i64 %16)
%18 = and i64 %17, 1
%PF6 = icmp eq i64 %18, 0
%CmpZF_JE10 = icmp eq i1 %ZF3, true
br i1 %CmpZF_JE10, label %bb.3, label %bb.2
bb.2: ; preds = %bb.1
%memload7 = load i64, ptr @level, align 1
store i64 %memload7, ptr %RAX-SKT-LOC, align 1
br label %bb.4
bb.3: ; preds = %bb.1, %entry
%19 = zext i32 0 to i64
store i64 %19, ptr %RAX-SKT-LOC, align 1
br label %bb.4
bb.4: ; preds = %bb.3, %bb.2
%memref-disp8 = add i64 %arg1, 8
%20 = inttoptr i64 %memref-disp8 to ptr
%memload9 = load i64, ptr %20, align 1
%RAX = load i64, ptr %RAX-SKT-LOC, align 1
%21 = inttoptr i64 %memload9 to ptr
store i64 %RAX, ptr %21, align 1
ret i64 %RAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/Quake-III-Arena/code/game/extr_g_active.c_G_SetClientSound.c'
source_filename = "AnghaBench/Quake-III-Arena/code/game/extr_g_active.c_G_SetClientSound.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_11__ = type { i64 }
@CONTENTS_LAVA = common local_unnamed_addr global i32 0, align 4
@CONTENTS_SLIME = common local_unnamed_addr global i32 0, align 4
@level = common local_unnamed_addr global %struct.TYPE_11__ zeroinitializer, align 8
@EF_TICKING = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync)
define void @G_SetClientSound(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = load i64, ptr %2, align 8, !tbaa !6
%4 = icmp eq i64 %3, 0
br i1 %4, label %14, label %5
5: ; preds = %1
%6 = load i32, ptr %0, align 8, !tbaa !14
%7 = load i32, ptr @CONTENTS_LAVA, align 4, !tbaa !15
%8 = load i32, ptr @CONTENTS_SLIME, align 4, !tbaa !15
%9 = or i32 %8, %7
%10 = and i32 %9, %6
%11 = icmp eq i32 %10, 0
%12 = load i64, ptr @level, align 8
%13 = select i1 %11, i64 0, i64 %12
br label %14
14: ; preds = %5, %1
%15 = phi i64 [ 0, %1 ], [ %13, %5 ]
%16 = getelementptr inbounds i8, ptr %0, i64 8
%17 = load ptr, ptr %16, align 8, !tbaa !16
store i64 %15, ptr %17, align 8, !tbaa !17
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 16}
!7 = !{!"TYPE_10__", !8, i64 0, !11, i64 8, !12, i64 16, !13, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!"TYPE_7__", !8, i64 0}
!14 = !{!7, !8, i64 0}
!15 = !{!8, !8, i64 0}
!16 = !{!7, !11, i64 8}
!17 = !{!18, !12, i64 0}
!18 = !{!"TYPE_9__", !19, i64 0}
!19 = !{!"TYPE_8__", !12, i64 0}
| Quake-III-Arena_code_game_extr_g_active.c_G_SetClientSound |
; ModuleID = 'freebsd_sys_dev_qlnx_qlnxe_extr_ecore_dbg_fw_funcs.c_ecore_is_mode_match.so'
source_filename = "freebsd_sys_dev_qlnx_qlnxe_extr_ecore_dbg_fw_funcs.c_ecore_is_mode_match.so"
@s_dbg_arrays = common dso_local global i64 0, align 8
@BIN_BUF_DBG_MODE_TREE = common dso_local global i64 0, align 8
@MAX_INIT_MODE_OPS = common dso_local global i32 0, align 4
define dso_local i32 @ecore_is_mode_match(i64 %arg1, i64 %arg2) {
entry:
%AL-SKT-LOC = alloca i8, align 1
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memload = load i64, ptr @s_dbg_arrays, align 1
%memload1 = load i64, ptr @BIN_BUF_DBG_MODE_TREE, align 1
%memref-idxreg = mul i64 8, %memload1
%memref-basereg = add i64 %memload, %memref-idxreg
%1 = inttoptr i64 %memref-basereg to ptr
%memload2 = load i64, ptr %1, align 1
%2 = inttoptr i64 %arg2 to ptr
%memload3 = load i64, ptr %2, align 1
%3 = trunc i64 %memload3 to i32
%RCX = sext i32 %3 to i64
%memref-disp = add i64 %RCX, 1
%EDX = trunc i64 %memref-disp to i32
%4 = inttoptr i64 %arg2 to ptr
store i32 %EDX, ptr %4, align 1
%memref-idxreg4 = mul i64 4, %RCX
%memref-basereg5 = add i64 %memload2, %memref-idxreg4
%5 = inttoptr i64 %memref-basereg5 to ptr
%memload6 = load i64, ptr %5, align 1
%6 = trunc i64 %memload6 to i32
%RBP = sext i32 %6 to i64
%7 = sub i64 %RBP, 128
%8 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RBP, i64 128)
%CF = extractvalue { i64, i1 } %8, 1
%ZF = icmp eq i64 %7, 0
%highbit = and i64 -9223372036854775808, %7
%SF = icmp ne i64 %highbit, 0
%9 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RBP, i64 128)
%OF = extractvalue { i64, i1 } %9, 1
%10 = and i64 %7, 255
%11 = call i64 @llvm.ctpop.i64(i64 %10)
%12 = and i64 %11, 1
%PF = icmp eq i64 %12, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%13 = trunc i64 %RBP to i32
%14 = trunc i64 130 to i32
%15 = sub i32 %13, %14
%16 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %13, i32 %14)
%CF7 = extractvalue { i32, i1 } %16, 1
%ZF8 = icmp eq i32 %15, 0
%highbit9 = and i32 -2147483648, %15
%SF10 = icmp ne i32 %highbit9, 0
%17 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %13, i32 %14)
%OF11 = extractvalue { i32, i1 } %17, 1
%18 = and i32 %15, 255
%19 = call i32 @llvm.ctpop.i32(i32 %18)
%20 = and i32 %19, 1
%PF12 = icmp eq i32 %20, 0
%CmpZF_JE70 = icmp eq i1 %ZF8, true
br i1 %CmpZF_JE70, label %bb.4, label %bb.2
bb.2: ; preds = %bb.1
%21 = trunc i64 %RBP to i32
%22 = trunc i64 129 to i32
%23 = sub i32 %21, %22
%24 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %21, i32 %22)
%CF13 = extractvalue { i32, i1 } %24, 1
%ZF14 = icmp eq i32 %23, 0
%highbit15 = and i32 -2147483648, %23
%SF16 = icmp ne i32 %highbit15, 0
%25 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %21, i32 %22)
%OF17 = extractvalue { i32, i1 } %25, 1
%26 = and i32 %23, 255
%27 = call i32 @llvm.ctpop.i32(i32 %26)
%28 = and i32 %27, 1
%PF18 = icmp eq i32 %28, 0
%CmpZF_JNE = icmp eq i1 %ZF14, false
br i1 %CmpZF_JNE, label %bb.6, label %bb.3
bb.3: ; preds = %bb.2
%EAX = call i32 @ecore_is_mode_match(i64 %arg1, i64 %arg2)
%29 = and i32 %EAX, %EAX
%highbit19 = and i32 -2147483648, %29
%SF20 = icmp ne i32 %highbit19, 0
%ZF21 = icmp eq i32 %29, 0
%30 = and i32 %29, 255
%31 = call i32 @llvm.ctpop.i32(i32 %30)
%32 = and i32 %31, 1
%PF22 = icmp eq i32 %32, 0
%AL = icmp eq i1 %ZF21, true
%33 = zext i1 %AL to i8
store i8 %33, ptr %AL-SKT-LOC, align 1
br label %bb.8
bb.6: ; preds = %bb.2
%34 = inttoptr i64 %arg1 to ptr
%memload23 = load i64, ptr %34, align 1
%memload24 = load i64, ptr @MAX_INIT_MODE_OPS, align 1
%35 = trunc i64 %memload24 to i32
%RCX25 = sext i32 %35 to i64
%RBP26 = sub i64 %RBP, %RCX25
%36 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RBP, i64 %RCX25)
%CF27 = extractvalue { i64, i1 } %36, 1
%ZF28 = icmp eq i64 %RBP26, 0
%highbit29 = and i64 -9223372036854775808, %RBP26
%SF30 = icmp ne i64 %highbit29, 0
%37 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RBP, i64 %RCX25)
%OF31 = extractvalue { i64, i1 } %37, 1
%38 = and i64 %RBP26, 255
%39 = call i64 @llvm.ctpop.i64(i64 %38)
%40 = and i64 %39, 1
%PF32 = icmp eq i64 %40, 0
%memref-idxreg33 = mul i64 4, %RBP26
%memref-basereg34 = add i64 %memload23, %memref-idxreg33
%41 = inttoptr i64 %memref-basereg34 to ptr
%42 = load i32, ptr %41, align 1
%43 = zext i32 %42 to i64
%44 = zext i32 0 to i64
%45 = sub i64 %43, %44
%46 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %43, i64 %44)
%CF35 = extractvalue { i64, i1 } %46, 1
%ZF36 = icmp eq i64 %45, 0
%highbit37 = and i64 -9223372036854775808, %45
%SF38 = icmp ne i64 %highbit37, 0
%47 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %43, i64 %44)
%OF39 = extractvalue { i64, i1 } %47, 1
%48 = and i64 %45, 255
%49 = call i64 @llvm.ctpop.i64(i64 %48)
%50 = and i64 %49, 1
%PF40 = icmp eq i64 %50, 0
%ZFCmp_CMOVG = icmp eq i1 %ZF36, false
%SFOFCmp_CMOVG = icmp eq i1 %SF38, %OF39
%Cond_CMOVG = and i1 %ZFCmp_CMOVG, %SFOFCmp_CMOVG
%51 = zext i1 %Cond_CMOVG to i8
store i8 %51, ptr %AL-SKT-LOC, align 1
br label %bb.8
bb.4: ; preds = %bb.1, %entry
%EAX41 = call i32 @ecore_is_mode_match(i64 %arg1, i64 %arg2)
%EAX42 = call i32 @ecore_is_mode_match(i64 %arg1, i64 %arg2)
%52 = trunc i64 %RBP to i32
%53 = trunc i64 128 to i32
%54 = sub i32 %52, %53
%55 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %52, i32 %53)
%CF43 = extractvalue { i32, i1 } %55, 1
%ZF44 = icmp eq i32 %54, 0
%highbit45 = and i32 -2147483648, %54
%SF46 = icmp ne i32 %highbit45, 0
%56 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %52, i32 %53)
%OF47 = extractvalue { i32, i1 } %56, 1
%57 = and i32 %54, 255
%58 = call i32 @llvm.ctpop.i32(i32 %57)
%59 = and i32 %58, 1
%PF48 = icmp eq i32 %59, 0
%CmpZF_JNE71 = icmp eq i1 %ZF44, false
br i1 %CmpZF_JNE71, label %bb.7, label %bb.5
bb.5: ; preds = %bb.4
%R15D = or i32 %EAX41, %EAX42
%highbit49 = and i32 -2147483648, %R15D
%SF50 = icmp ne i32 %highbit49, 0
%ZF51 = icmp eq i32 %R15D, 0
%60 = and i32 %R15D, 255
%61 = call i32 @llvm.ctpop.i32(i32 %60)
%62 = and i32 %61, 1
%PF52 = icmp eq i32 %62, 0
%AL53 = icmp eq i1 %ZF51, false
%63 = zext i1 %AL53 to i8
store i8 %63, ptr %AL-SKT-LOC, align 1
br label %bb.8
bb.7: ; preds = %bb.4
%64 = and i32 %EAX42, %EAX42
%highbit54 = and i32 -2147483648, %64
%SF55 = icmp ne i32 %highbit54, 0
%ZF56 = icmp eq i32 %64, 0
%65 = and i32 %64, 255
%66 = call i32 @llvm.ctpop.i32(i32 %65)
%67 = and i32 %66, 1
%PF57 = icmp eq i32 %67, 0
%CL = icmp eq i1 %ZF56, false
%68 = and i32 %EAX41, %EAX41
%highbit58 = and i32 -2147483648, %68
%SF59 = icmp ne i32 %highbit58, 0
%ZF60 = icmp eq i32 %68, 0
%69 = and i32 %68, 255
%70 = call i32 @llvm.ctpop.i32(i32 %69)
%71 = and i32 %70, 1
%PF61 = icmp eq i32 %71, 0
%AL62 = icmp eq i1 %ZF60, false
%72 = zext i1 %AL62 to i8
%73 = zext i1 %CL to i8
%AL67 = and i8 %72, %73
%highbit63 = and i8 -128, %AL67
%SF64 = icmp ne i8 %highbit63, 0
%ZF65 = icmp eq i8 %AL67, 0
%74 = call i8 @llvm.ctpop.i8(i8 %AL67)
%75 = and i8 %74, 1
%PF66 = icmp eq i8 %75, 0
store i8 %AL67, ptr %AL-SKT-LOC, align 1
br label %bb.8
bb.8: ; preds = %bb.7, %bb.5, %bb.6, %bb.3
%AL68 = load i8, ptr %AL-SKT-LOC, align 1
%EAX69 = zext i8 %AL68 to i32
ret i32 %EAX69
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_dbg_fw_funcs.c_ecore_is_mode_match.c'
source_filename = "AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_dbg_fw_funcs.c_ecore_is_mode_match.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i64 }
@s_dbg_arrays = common local_unnamed_addr global ptr null, align 8
@BIN_BUF_DBG_MODE_TREE = common local_unnamed_addr global i64 0, align 8
@MAX_INIT_MODE_OPS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ecore_is_mode_match], section "llvm.metadata"
; Function Attrs: nofree nosync nounwind ssp memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal range(i32 0, 2) i32 @ecore_is_mode_match(ptr noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr @s_dbg_arrays, align 8, !tbaa !6
%4 = load i64, ptr @BIN_BUF_DBG_MODE_TREE, align 8, !tbaa !10
%5 = getelementptr inbounds %struct.TYPE_2__, ptr %3, i64 %4
%6 = load i64, ptr %5, align 8, !tbaa !12
%7 = inttoptr i64 %6 to ptr
%8 = load i32, ptr %1, align 4, !tbaa !14
%9 = sext i32 %8 to i64
br label %10
10: ; preds = %17, %2
%11 = phi i64 [ %13, %17 ], [ %9, %2 ]
%12 = phi i32 [ %18, %17 ], [ 0, %2 ]
%13 = add nsw i64 %11, 1
%14 = trunc nsw i64 %13 to i32
store i32 %14, ptr %1, align 4, !tbaa !14
%15 = getelementptr inbounds i32, ptr %7, i64 %11
%16 = load i32, ptr %15, align 4, !tbaa !14
switch i32 %16, label %29 [
i32 129, label %17
i32 128, label %19
i32 130, label %19
]
17: ; preds = %10
%18 = xor i32 %12, 1
br label %10
19: ; preds = %10, %10
%20 = tail call i32 @ecore_is_mode_match(ptr noundef %0, ptr noundef nonnull %1)
%21 = tail call i32 @ecore_is_mode_match(ptr noundef %0, ptr noundef nonnull %1)
%22 = icmp eq i32 %16, 128
%23 = icmp ne i32 %20, 0
%24 = icmp ne i32 %21, 0
br i1 %22, label %25, label %27
25: ; preds = %19
%26 = select i1 %23, i1 true, i1 %24
br label %37
27: ; preds = %19
%28 = select i1 %23, i1 %24, i1 false
br label %37
29: ; preds = %10
%30 = load ptr, ptr %0, align 8, !tbaa !16
%31 = load i32, ptr @MAX_INIT_MODE_OPS, align 4, !tbaa !14
%32 = sub nsw i32 %16, %31
%33 = sext i32 %32 to i64
%34 = getelementptr inbounds i32, ptr %30, i64 %33
%35 = load i32, ptr %34, align 4, !tbaa !14
%36 = icmp sgt i32 %35, 0
br label %37
37: ; preds = %25, %27, %29
%38 = phi i1 [ %36, %29 ], [ %26, %25 ], [ %28, %27 ]
%39 = zext i1 %38 to i32
%40 = xor i32 %12, %39
ret i32 %40
}
attributes #0 = { nofree nosync nounwind ssp memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_2__", !11, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !8, i64 0}
!16 = !{!17, !7, i64 0}
!17 = !{!"dbg_tools_data", !7, i64 0}
| freebsd_sys_dev_qlnx_qlnxe_extr_ecore_dbg_fw_funcs.c_ecore_is_mode_match |
; ModuleID = 'fastsocket_kernel_arch_x86_kernel_apic_extr_numaq_32.c_numaq_check_phys_apicid_present.so'
source_filename = "fastsocket_kernel_arch_x86_kernel_apic_extr_numaq_32.c_numaq_check_phys_apicid_present.so"
define dso_local i32 @numaq_check_phys_apicid_present() {
entry:
ret i32 1
}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/kernel/apic/extr_numaq_32.c_numaq_check_phys_apicid_present.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/kernel/apic/extr_numaq_32.c_numaq_check_phys_apicid_present.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @numaq_check_phys_apicid_present], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @numaq_check_phys_apicid_present(i32 %0) #0 {
ret i32 1
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_arch_x86_kernel_apic_extr_numaq_32.c_numaq_check_phys_apicid_present |
; ModuleID = 'freebsd_contrib_wpa_src_eap_server_extr_eap_server_pax.c_eap_pax_isSuccess.so'
source_filename = "freebsd_contrib_wpa_src_eap_server_extr_eap_server_pax.c_eap_pax_isSuccess.so"
@SUCCESS = common dso_local global i64 0, align 8
define dso_local i8 @eap_pax_isSuccess(i64 %arg1, i64 %arg2) {
entry:
%0 = inttoptr i64 %arg2 to ptr
%memload = load i64, ptr %0, align 1
%1 = load i64, ptr @SUCCESS, align 8
%2 = sub i64 %memload, %1
%3 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload, i64 %1)
%CF = extractvalue { i64, i1 } %3, 1
%ZF = icmp eq i64 %2, 0
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%4 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload, i64 %1)
%OF = extractvalue { i64, i1 } %4, 1
%5 = and i64 %2, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF = icmp eq i64 %7, 0
%AL = icmp eq i1 %ZF, true
%8 = zext i1 %AL to i8
ret i8 %8
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/eap_server/extr_eap_server_pax.c_eap_pax_isSuccess.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/eap_server/extr_eap_server_pax.c_eap_pax_isSuccess.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SUCCESS = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @eap_pax_isSuccess], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal range(i32 0, 2) i32 @eap_pax_isSuccess(ptr nocapture readnone %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i64, ptr %1, align 8, !tbaa !6
%4 = load i64, ptr @SUCCESS, align 8, !tbaa !11
%5 = icmp eq i64 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"eap_pax_data", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| freebsd_contrib_wpa_src_eap_server_extr_eap_server_pax.c_eap_pax_isSuccess |
; ModuleID = 'radare2_libr_asm_arch_arm_aarch64_extr_aarch64-opc.c_aarch64_sys_reg_deprecated_p.so'
source_filename = "radare2_libr_asm_arch_arm_aarch64_extr_aarch64-opc.c_aarch64_sys_reg_deprecated_p.so"
@F_DEPRECATED = common dso_local global i32 0, align 4
define dso_local i8 @aarch64_sys_reg_deprecated_p(i64 %arg1) {
entry:
%memload = load i32, ptr @F_DEPRECATED, align 1
%0 = inttoptr i64 %arg1 to ptr
%1 = load i32, ptr %0, align 1
%2 = zext i32 %1 to i64
%3 = zext i32 %memload to i64
%4 = and i64 %2, %3
%ZF = icmp eq i64 %4, 0
%highbit = and i64 -9223372036854775808, %4
%SF = icmp ne i64 %highbit, 0
%5 = and i64 %4, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF = icmp eq i64 %7, 0
%AL = icmp eq i1 %ZF, false
%8 = zext i1 %AL to i8
ret i8 %8
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/radare2/libr/asm/arch/arm/aarch64/extr_aarch64-opc.c_aarch64_sys_reg_deprecated_p.c'
source_filename = "AnghaBench/radare2/libr/asm/arch/arm/aarch64/extr_aarch64-opc.c_aarch64_sys_reg_deprecated_p.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@F_DEPRECATED = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define range(i32 0, 2) i32 @aarch64_sys_reg_deprecated_p(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = load i32, ptr @F_DEPRECATED, align 4, !tbaa !11
%4 = and i32 %3, %2
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| radare2_libr_asm_arch_arm_aarch64_extr_aarch64-opc.c_aarch64_sys_reg_deprecated_p |
; ModuleID = 'glfw_src_extr_osmesa_context.c_swapIntervalOSMesa.so'
source_filename = "glfw_src_extr_osmesa_context.c_swapIntervalOSMesa.so"
define dso_local void @swapIntervalOSMesa() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/glfw/src/extr_osmesa_context.c_swapIntervalOSMesa.c'
source_filename = "AnghaBench/glfw/src/extr_osmesa_context.c_swapIntervalOSMesa.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @swapIntervalOSMesa], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @swapIntervalOSMesa(i32 %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| glfw_src_extr_osmesa_context.c_swapIntervalOSMesa |
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