asm stuff
Collection
4 items • Updated
IR_x86 stringlengths 97 228k | IR_arm stringlengths 544 250k | filename stringlengths 17 187 |
|---|---|---|
; ModuleID = 'linux_net_9p_extr_trans_rdma.c_qp_event_handler.so'
source_filename = "linux_net_9p_extr_trans_rdma.c_qp_event_handler.so"
@P9_DEBUG_ERROR = common dso_local global i32 0, align 4
@rodata_13 = private unnamed_addr constant [24 x i8] c"QP event %d context %p\0A\00", align 1, !ROData_SecInfo !0
declare dso_local ptr @p9_debug()
define dso_local i64 @qp_event_handler(i64 %arg1, i64 %arg2) {
entry:
%memload = load i32, ptr @P9_DEBUG_ERROR, align 1
%0 = inttoptr i64 %arg1 to ptr
%memload1 = load i32, ptr %0, align 1
%RSI = ptrtoint ptr @rodata_13 to i64
%1 = tail call ptr @p9_debug()
%RAX = ptrtoint ptr %1 to i64
ret i64 %RAX
}
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/linux/net/9p/extr_trans_rdma.c_qp_event_handler.c'
source_filename = "AnghaBench/linux/net/9p/extr_trans_rdma.c_qp_event_handler.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@P9_DEBUG_ERROR = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [24 x i8] c"QP event %d context %p\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @qp_event_handler], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @qp_event_handler(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = load i32, ptr @P9_DEBUG_ERROR, align 4, !tbaa !6
%4 = load i32, ptr %0, align 4, !tbaa !10
%5 = tail call i32 @p9_debug(i32 noundef %3, ptr noundef nonnull @.str, i32 noundef %4, ptr noundef %1) #2
ret void
}
declare i32 @p9_debug(i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"ib_event", !7, i64 0}
| linux_net_9p_extr_trans_rdma.c_qp_event_handler |
; ModuleID = 'freebsd_sys_sparc64_sparc64_extr_autoconf.c_configure_first.so'
source_filename = "freebsd_sys_sparc64_sparc64_extr_autoconf.c_configure_first.so"
@root_bus = common dso_local global i32 0, align 4
@rodata_13 = private unnamed_addr constant [6 x i8] c"nexus\00", align 1, !ROData_SecInfo !0
@nexusdev = common dso_local global i32 0, align 4
declare dso_local ptr @device_add_child()
define dso_local i64 @configure_first() {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%memload = load i32, ptr @root_bus, align 1
%RSI = ptrtoint ptr @rodata_13 to i64
%0 = call ptr @device_add_child()
%RAX = ptrtoint ptr %0 to i64
%1 = trunc i64 %RAX to i32
store i32 %1, ptr @nexusdev, align 1
ret i64 %RAX
}
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/freebsd/sys/sparc64/sparc64/extr_autoconf.c_configure_first.c'
source_filename = "AnghaBench/freebsd/sys/sparc64/sparc64/extr_autoconf.c_configure_first.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@root_bus = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [6 x i8] c"nexus\00", align 1
@nexusdev = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @configure_first], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @configure_first(ptr nocapture readnone %0) #0 {
%2 = load i32, ptr @root_bus, align 4, !tbaa !6
%3 = tail call i32 @device_add_child(i32 noundef %2, ptr noundef nonnull @.str, i32 noundef 0) #2
store i32 %3, ptr @nexusdev, align 4, !tbaa !6
ret void
}
declare i32 @device_add_child(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_sparc64_sparc64_extr_autoconf.c_configure_first |
; ModuleID = 'linux_drivers_usb_chipidea_extr_core.c_ci_get_otg_capable.so'
source_filename = "linux_drivers_usb_chipidea_extr_core.c_ci_get_otg_capable.so"
@CI_HDRC_DUAL_ROLE_NOT_OTG = common dso_local global i32 0, align 4
@CAP_DCCPARAMS = common dso_local global i32 0, align 4
@DCCPARAMS_DC = common dso_local global i32 0, align 4
@DCCPARAMS_HC = common dso_local global i32 0, align 4
@rodata_13 = private unnamed_addr constant [30 x i8] c"It is OTG capable controller\0A\00", align 1, !ROData_SecInfo !0
@OTGSC_INT_EN_BITS = common dso_local global i32 0, align 4
@OTGSC_INT_STATUS_BITS = common dso_local global i32 0, align 4
declare dso_local ptr @hw_read()
declare dso_local ptr @dev_dbg()
declare dso_local ptr @hw_write_otgsc()
define dso_local i64 @ci_get_otg_capable(i64 %arg1) {
entry:
%RAX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memref-disp = add i64 %arg1, 8
%0 = inttoptr i64 %memref-disp to ptr
%memload = load i64, ptr %0, align 1
%memload1 = load i32, ptr @CI_HDRC_DUAL_ROLE_NOT_OTG, align 1
%1 = inttoptr i64 %memload to ptr
%2 = load i32, ptr %1, align 1
%3 = zext i32 %2 to i64
%4 = zext i32 %memload1 to i64
%5 = and i64 %3, %4
%ZF = icmp eq i64 %5, 0
%highbit = and i64 -9223372036854775808, %5
%SF = icmp ne i64 %highbit, 0
%6 = and i64 %5, 255
%7 = call i64 @llvm.ctpop.i64(i64 %6)
%8 = and i64 %7, 1
%PF = icmp eq i64 %8, 0
store i64 %memload, ptr %RAX-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%9 = inttoptr i64 %arg1 to ptr
store i32 0, ptr %9, align 1
br label %bb.4
bb.2: ; preds = %entry
%memload2 = load i32, ptr @CAP_DCCPARAMS, align 1
%memload3 = load i32, ptr @DCCPARAMS_HC, align 1
%memload4 = load i32, ptr @DCCPARAMS_DC, align 1
%EDX = or i32 %memload3, %memload4
%10 = and i32 %EDX, 255
%11 = call i32 @llvm.ctpop.i32(i32 %10)
%12 = and i32 %11, 1
%PF5 = icmp eq i32 %12, 0
%13 = call ptr @hw_read()
%RAX = ptrtoint ptr %13 to i64
%memload6 = load i32, ptr @DCCPARAMS_HC, align 1
%memload7 = load i32, ptr @DCCPARAMS_DC, align 1
%ECX = or i32 %memload6, %memload7
%14 = and i32 %ECX, 255
%15 = call i32 @llvm.ctpop.i32(i32 %14)
%16 = and i32 %15, 1
%PF8 = icmp eq i32 %16, 0
%17 = trunc i64 %RAX to i32
%18 = sub i32 %17, %ECX
%19 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %17, i32 %ECX)
%CF = extractvalue { i32, i1 } %19, 1
%ZF9 = icmp eq i32 %18, 0
%highbit10 = and i32 -2147483648, %18
%SF11 = icmp ne i32 %highbit10, 0
%20 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %17, i32 %ECX)
%OF = extractvalue { i32, i1 } %20, 1
%21 = and i32 %18, 255
%22 = call i32 @llvm.ctpop.i32(i32 %21)
%23 = and i32 %22, 1
%PF12 = icmp eq i32 %23, 0
%DL = icmp eq i1 %ZF9, true
%24 = zext i1 %DL to i32
%25 = inttoptr i64 %arg1 to ptr
store i32 %24, ptr %25, align 1
store i64 %RAX, ptr %RAX-SKT-LOC, align 1
%CmpZF_JNE = icmp eq i1 %ZF9, false
br i1 %CmpZF_JNE, label %bb.4, label %bb.3
bb.3: ; preds = %bb.2
%memref-disp13 = add i64 %arg1, 4
%26 = inttoptr i64 %memref-disp13 to ptr
%memload14 = load i32, ptr %26, align 1
%RSI = ptrtoint ptr @rodata_13 to i64
%27 = call ptr @dev_dbg()
%RAX15 = ptrtoint ptr %27 to i64
%memload16 = load i32, ptr @OTGSC_INT_STATUS_BITS, align 1
%memload17 = load i32, ptr @OTGSC_INT_EN_BITS, align 1
%ESI = or i32 %memload17, %memload16
%highbit18 = and i32 -2147483648, %ESI
%SF19 = icmp ne i32 %highbit18, 0
%ZF20 = icmp eq i32 %ESI, 0
%28 = and i32 %ESI, 255
%29 = call i32 @llvm.ctpop.i32(i32 %28)
%30 = and i32 %29, 1
%PF21 = icmp eq i32 %30, 0
%31 = tail call ptr @hw_write_otgsc()
%RAX22 = ptrtoint ptr %31 to i64
br label %UnifiedReturnBlock
bb.4: ; preds = %bb.2, %bb.1
%RAX1 = load i64, ptr %RAX-SKT-LOC, align 1
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.4, %bb.3
%UnifiedRetVal = phi i64 [ %RAX22, %bb.3 ], [ %RAX1, %bb.4 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/chipidea/extr_core.c_ci_get_otg_capable.c'
source_filename = "AnghaBench/linux/drivers/usb/chipidea/extr_core.c_ci_get_otg_capable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CI_HDRC_DUAL_ROLE_NOT_OTG = common local_unnamed_addr global i32 0, align 4
@CAP_DCCPARAMS = common local_unnamed_addr global i32 0, align 4
@DCCPARAMS_DC = common local_unnamed_addr global i32 0, align 4
@DCCPARAMS_HC = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [30 x i8] c"It is OTG capable controller\0A\00", align 1
@OTGSC_INT_EN_BITS = common local_unnamed_addr global i32 0, align 4
@OTGSC_INT_STATUS_BITS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ci_get_otg_capable], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ci_get_otg_capable(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load i32, ptr %3, align 4, !tbaa !12
%5 = load i32, ptr @CI_HDRC_DUAL_ROLE_NOT_OTG, align 4, !tbaa !14
%6 = and i32 %5, %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %9, label %8
8: ; preds = %1
store i32 0, ptr %0, align 8, !tbaa !15
br label %28
9: ; preds = %1
%10 = load i32, ptr @CAP_DCCPARAMS, align 4, !tbaa !14
%11 = load i32, ptr @DCCPARAMS_DC, align 4, !tbaa !14
%12 = load i32, ptr @DCCPARAMS_HC, align 4, !tbaa !14
%13 = or i32 %12, %11
%14 = tail call i32 @hw_read(ptr noundef nonnull %0, i32 noundef %10, i32 noundef %13) #2
%15 = load i32, ptr @DCCPARAMS_DC, align 4, !tbaa !14
%16 = load i32, ptr @DCCPARAMS_HC, align 4, !tbaa !14
%17 = or i32 %16, %15
%18 = icmp eq i32 %14, %17
%19 = zext i1 %18 to i32
store i32 %19, ptr %0, align 8, !tbaa !15
br i1 %18, label %20, label %28
20: ; preds = %9
%21 = getelementptr inbounds i8, ptr %0, i64 4
%22 = load i32, ptr %21, align 4, !tbaa !16
%23 = tail call i32 @dev_dbg(i32 noundef %22, ptr noundef nonnull @.str) #2
%24 = load i32, ptr @OTGSC_INT_EN_BITS, align 4, !tbaa !14
%25 = load i32, ptr @OTGSC_INT_STATUS_BITS, align 4, !tbaa !14
%26 = or i32 %25, %24
%27 = tail call i32 @hw_write_otgsc(ptr noundef nonnull %0, i32 noundef %26, i32 noundef %25) #2
br label %28
28: ; preds = %8, %20, %9
ret void
}
declare i32 @hw_read(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_dbg(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @hw_write_otgsc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"ci_hdrc", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"TYPE_2__", !8, i64 0}
!14 = !{!8, !8, i64 0}
!15 = !{!7, !8, i64 0}
!16 = !{!7, !8, i64 4}
| linux_drivers_usb_chipidea_extr_core.c_ci_get_otg_capable |
; ModuleID = 'linux_drivers_gpu_drm_scheduler_extr_sched_entity.c_drm_sched_entity_flush.so'
source_filename = "linux_drivers_gpu_drm_scheduler_extr_sched_entity.c_drm_sched_entity_flush.so"
@current = common dso_local global i64 0, align 8
@PF_EXITING = common dso_local global i32 0, align 4
@SIGKILL = common dso_local global i64 0, align 8
declare dso_local ptr @drm_sched_entity_is_idle()
declare dso_local ptr @wait_event_timeout()
declare dso_local ptr @wait_event_killable()
declare dso_local ptr @cmpxchg()
declare dso_local ptr @spin_lock()
declare dso_local ptr @drm_sched_rq_remove_entity()
declare dso_local ptr @spin_unlock()
define dso_local i64 @drm_sched_entity_flush(i64 %arg1, i64 %arg2) {
entry:
%R14-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memref-disp = add i64 %arg1, 8
%0 = inttoptr i64 %memref-disp to ptr
%memload = load i64, ptr %0, align 1
%1 = and i64 %memload, %memload
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %1, 0
%2 = and i64 %1, 255
%3 = call i64 @llvm.ctpop.i64(i64 %2)
%4 = and i64 %3, 1
%PF = icmp eq i64 %4, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%5 = inttoptr i64 %memload to ptr
%memload1 = load i64, ptr %5, align 1
%memload2 = load i64, ptr @current, align 1
%memload3 = load i32, ptr @PF_EXITING, align 1
%6 = inttoptr i64 %memload2 to ptr
%7 = load i32, ptr %6, align 1
%8 = zext i32 %7 to i64
%9 = zext i32 %memload3 to i64
%10 = and i64 %8, %9
%ZF4 = icmp eq i64 %10, 0
%highbit5 = and i64 -9223372036854775808, %10
%SF6 = icmp ne i64 %highbit5, 0
%11 = and i64 %10, 255
%12 = call i64 @llvm.ctpop.i64(i64 %11)
%13 = and i64 %12, 1
%PF7 = icmp eq i64 %13, 0
store i64 %arg2, ptr %R14-SKT-LOC, align 1
%CmpZF_JE52 = icmp eq i1 %ZF4, true
br i1 %CmpZF_JE52, label %bb.5, label %bb.2
bb.2: ; preds = %bb.1
%14 = and i64 %arg2, %arg2
%highbit8 = and i64 -9223372036854775808, %14
%SF9 = icmp ne i64 %highbit8, 0
%ZF10 = icmp eq i64 %14, 0
%15 = and i64 %14, 255
%16 = call i64 @llvm.ctpop.i64(i64 %15)
%17 = and i64 %16, 1
%PF11 = icmp eq i64 %17, 0
%CmpZF_JE53 = icmp eq i1 %ZF10, true
br i1 %CmpZF_JE53, label %bb.6, label %bb.3
bb.3: ; preds = %bb.2
%18 = inttoptr i64 %memload1 to ptr
%memload12 = load i32, ptr %18, align 1
%19 = call ptr @drm_sched_entity_is_idle()
%RAX = ptrtoint ptr %19 to i64
%ESI = trunc i64 %RAX to i32
%20 = call ptr @wait_event_timeout()
%RAX13 = ptrtoint ptr %20 to i64
store i64 %RAX13, ptr %R14-SKT-LOC, align 1
br label %bb.7
bb.6: ; preds = %bb.2
%21 = zext i32 0 to i64
store i64 %21, ptr %R14-SKT-LOC, align 1
br label %bb.7
bb.5: ; preds = %bb.1
%22 = inttoptr i64 %memload1 to ptr
%memload14 = load i32, ptr %22, align 1
%23 = call ptr @drm_sched_entity_is_idle()
%RAX15 = ptrtoint ptr %23 to i64
%ESI16 = trunc i64 %RAX15 to i32
%24 = call ptr @wait_event_killable()
%RAX17 = ptrtoint ptr %24 to i64
br label %bb.7
bb.7: ; preds = %bb.6, %bb.5, %bb.3
%memref-disp18 = add i64 %arg1, 16
%memload19 = load i64, ptr @current, align 1
%memref-disp20 = add i64 %memload19, 16
%25 = inttoptr i64 %memref-disp20 to ptr
%memload21 = load i64, ptr %25, align 1
%26 = call ptr @cmpxchg()
%RAX22 = ptrtoint ptr %26 to i64
%memload23 = load i64, ptr @current, align 1
%27 = and i64 %RAX22, %RAX22
%highbit24 = and i64 -9223372036854775808, %27
%SF25 = icmp ne i64 %highbit24, 0
%ZF26 = icmp eq i64 %27, 0
%28 = and i64 %27, 255
%29 = call i64 @llvm.ctpop.i64(i64 %28)
%30 = and i64 %29, 1
%PF27 = icmp eq i64 %30, 0
%CmpZF_JE54 = icmp eq i1 %ZF26, true
br i1 %CmpZF_JE54, label %bb.9, label %bb.8
bb.8: ; preds = %bb.7
%memref-disp28 = add i64 %memload23, 16
%31 = inttoptr i64 %memref-disp28 to ptr
%32 = load i64, ptr %31, align 1
%33 = sub i64 %RAX22, %32
%34 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RAX22, i64 %32)
%CF = extractvalue { i64, i1 } %34, 1
%ZF29 = icmp eq i64 %33, 0
%highbit30 = and i64 -9223372036854775808, %33
%SF31 = icmp ne i64 %highbit30, 0
%35 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RAX22, i64 %32)
%OF = extractvalue { i64, i1 } %35, 1
%36 = and i64 %33, 255
%37 = call i64 @llvm.ctpop.i64(i64 %36)
%38 = and i64 %37, 1
%PF32 = icmp eq i64 %38, 0
%CmpZF_JNE = icmp eq i1 %ZF29, false
br i1 %CmpZF_JNE, label %bb.12, label %bb.9
bb.9: ; preds = %bb.8, %bb.7
%memload33 = load i32, ptr @PF_EXITING, align 1
%39 = inttoptr i64 %memload23 to ptr
%40 = load i32, ptr %39, align 1
%41 = zext i32 %40 to i64
%42 = zext i32 %memload33 to i64
%43 = and i64 %41, %42
%ZF34 = icmp eq i64 %43, 0
%highbit35 = and i64 -9223372036854775808, %43
%SF36 = icmp ne i64 %highbit35, 0
%44 = and i64 %43, 255
%45 = call i64 @llvm.ctpop.i64(i64 %44)
%46 = and i64 %45, 1
%PF37 = icmp eq i64 %46, 0
%CmpZF_JE55 = icmp eq i1 %ZF34, true
br i1 %CmpZF_JE55, label %bb.12, label %bb.10
bb.10: ; preds = %bb.9
%memref-disp38 = add i64 %memload23, 8
%47 = inttoptr i64 %memref-disp38 to ptr
%memload39 = load i64, ptr %47, align 1
%48 = load i64, ptr @SIGKILL, align 8
%49 = sub i64 %memload39, %48
%50 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload39, i64 %48)
%CF40 = extractvalue { i64, i1 } %50, 1
%ZF41 = icmp eq i64 %49, 0
%highbit42 = and i64 -9223372036854775808, %49
%SF43 = icmp ne i64 %highbit42, 0
%51 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload39, i64 %48)
%OF44 = extractvalue { i64, i1 } %51, 1
%52 = and i64 %49, 255
%53 = call i64 @llvm.ctpop.i64(i64 %52)
%54 = and i64 %53, 1
%PF45 = icmp eq i64 %54, 0
%CmpZF_JNE56 = icmp eq i1 %ZF41, false
br i1 %CmpZF_JNE56, label %bb.12, label %bb.11
bb.11: ; preds = %bb.10
%memref-disp46 = add i64 %arg1, 4
%55 = call ptr @spin_lock()
%RAX47 = ptrtoint ptr %55 to i64
%56 = inttoptr i64 %arg1 to ptr
store i32 1, ptr %56, align 1
%memref-disp48 = add i64 %arg1, 8
%57 = inttoptr i64 %memref-disp48 to ptr
%memload49 = load i64, ptr %57, align 1
%58 = call ptr @drm_sched_rq_remove_entity()
%RAX50 = ptrtoint ptr %58 to i64
%59 = call ptr @spin_unlock()
%RAX51 = ptrtoint ptr %59 to i64
br label %bb.12
bb.4: ; preds = %entry
%60 = zext i32 0 to i64
store i64 %60, ptr %R14-SKT-LOC, align 1
br label %bb.12
bb.12: ; preds = %bb.11, %bb.4, %bb.10, %bb.9, %bb.8
%R14 = load i64, ptr %R14-SKT-LOC, align 1
ret i64 %R14
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/scheduler/extr_sched_entity.c_drm_sched_entity_flush.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/scheduler/extr_sched_entity.c_drm_sched_entity_flush.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@current = common local_unnamed_addr global ptr null, align 8
@PF_EXITING = common local_unnamed_addr global i32 0, align 4
@SIGKILL = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @drm_sched_entity_flush(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = icmp eq ptr %4, null
br i1 %5, label %52, label %6
6: ; preds = %2
%7 = load ptr, ptr %4, align 8, !tbaa !12
%8 = load ptr, ptr @current, align 8, !tbaa !14
%9 = load i32, ptr %8, align 8, !tbaa !15
%10 = load i32, ptr @PF_EXITING, align 4, !tbaa !18
%11 = and i32 %10, %9
%12 = icmp eq i32 %11, 0
br i1 %12, label %19, label %13
13: ; preds = %6
%14 = icmp eq i64 %1, 0
br i1 %14, label %23, label %15
15: ; preds = %13
%16 = load i32, ptr %7, align 4, !tbaa !19
%17 = tail call i32 @drm_sched_entity_is_idle(ptr noundef nonnull %0) #2
%18 = tail call i64 @wait_event_timeout(i32 noundef %16, i32 noundef %17, i64 noundef %1) #2
br label %23
19: ; preds = %6
%20 = load i32, ptr %7, align 4, !tbaa !19
%21 = tail call i32 @drm_sched_entity_is_idle(ptr noundef nonnull %0) #2
%22 = tail call i32 @wait_event_killable(i32 noundef %20, i32 noundef %21) #2
br label %23
23: ; preds = %13, %15, %19
%24 = phi i64 [ %18, %15 ], [ 0, %13 ], [ %1, %19 ]
%25 = getelementptr inbounds i8, ptr %0, i64 16
%26 = load ptr, ptr @current, align 8, !tbaa !14
%27 = getelementptr inbounds i8, ptr %26, i64 16
%28 = load ptr, ptr %27, align 8, !tbaa !21
%29 = tail call ptr @cmpxchg(ptr noundef nonnull %25, ptr noundef %28, ptr noundef null) #2
%30 = icmp eq ptr %29, null
%31 = load ptr, ptr @current, align 8, !tbaa !14
br i1 %30, label %36, label %32
32: ; preds = %23
%33 = getelementptr inbounds i8, ptr %31, i64 16
%34 = load ptr, ptr %33, align 8, !tbaa !21
%35 = icmp eq ptr %29, %34
br i1 %35, label %36, label %52
36: ; preds = %32, %23
%37 = load i32, ptr %31, align 8, !tbaa !15
%38 = load i32, ptr @PF_EXITING, align 4, !tbaa !18
%39 = and i32 %38, %37
%40 = icmp eq i32 %39, 0
br i1 %40, label %52, label %41
41: ; preds = %36
%42 = getelementptr inbounds i8, ptr %31, i64 8
%43 = load i64, ptr %42, align 8, !tbaa !22
%44 = load i64, ptr @SIGKILL, align 8, !tbaa !23
%45 = icmp eq i64 %43, %44
br i1 %45, label %46, label %52
46: ; preds = %41
%47 = getelementptr inbounds i8, ptr %0, i64 4
%48 = tail call i32 @spin_lock(ptr noundef nonnull %47) #2
store i32 1, ptr %0, align 8, !tbaa !24
%49 = load ptr, ptr %3, align 8, !tbaa !6
%50 = tail call i32 @drm_sched_rq_remove_entity(ptr noundef %49, ptr noundef nonnull %0) #2
%51 = tail call i32 @spin_unlock(ptr noundef nonnull %47) #2
br label %52
52: ; preds = %32, %36, %41, %46, %2
%53 = phi i64 [ 0, %2 ], [ %24, %46 ], [ %24, %41 ], [ %24, %36 ], [ %24, %32 ]
ret i64 %53
}
declare i64 @wait_event_timeout(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @drm_sched_entity_is_idle(ptr noundef) local_unnamed_addr #1
declare i32 @wait_event_killable(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @cmpxchg(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @drm_sched_rq_remove_entity(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"drm_sched_entity", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_3__", !11, i64 0}
!14 = !{!11, !11, i64 0}
!15 = !{!16, !8, i64 0}
!16 = !{!"TYPE_4__", !8, i64 0, !17, i64 8, !11, i64 16}
!17 = !{!"long", !9, i64 0}
!18 = !{!8, !8, i64 0}
!19 = !{!20, !8, i64 0}
!20 = !{!"drm_gpu_scheduler", !8, i64 0}
!21 = !{!16, !11, i64 16}
!22 = !{!16, !17, i64 8}
!23 = !{!17, !17, i64 0}
!24 = !{!7, !8, i64 0}
| linux_drivers_gpu_drm_scheduler_extr_sched_entity.c_drm_sched_entity_flush |
; ModuleID = 'fastsocket_kernel_drivers_net_extr_au1000_eth.c_GetFreeDB.so'
source_filename = "fastsocket_kernel_drivers_net_extr_au1000_eth.c_GetFreeDB.so"
define dso_local i64 @GetFreeDB(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%1 = and i64 %memload, %memload
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %1, 0
%2 = and i64 %1, 255
%3 = call i64 @llvm.ctpop.i64(i64 %2)
%4 = and i64 %3, 1
%PF = icmp eq i64 %4, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%5 = inttoptr i64 %memload to ptr
%memload1 = load i64, ptr %5, align 1
%6 = inttoptr i64 %arg1 to ptr
store i64 %memload1, ptr %6, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %entry
ret i64 %memload
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_au1000_eth.c_GetFreeDB.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_au1000_eth.c_GetFreeDB.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @GetFreeDB], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal ptr @GetFreeDB(ptr nocapture noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = icmp eq ptr %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = load ptr, ptr %2, align 8, !tbaa !11
store ptr %5, ptr %0, align 8, !tbaa !6
br label %6
6: ; preds = %4, %1
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"au1000_private", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_3__", !8, i64 0}
| fastsocket_kernel_drivers_net_extr_au1000_eth.c_GetFreeDB |
; ModuleID = 'linux_sound_soc_img_extr_img-spdif-in.c_img_spdif_in_runtime_resume.so'
source_filename = "linux_sound_soc_img_extr_img-spdif-in.c_img_spdif_in_runtime_resume.so"
@rodata_13 = private unnamed_addr constant [28 x i8] c"Unable to enable sys clock\0A\00", align 1, !ROData_SecInfo !0
declare dso_local ptr @dev_get_drvdata()
declare dso_local ptr @clk_prepare_enable()
declare dso_local ptr @dev_err()
define dso_local i32 @img_spdif_in_runtime_resume(i64 %arg1) {
entry:
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%1 = call ptr @dev_get_drvdata()
%memload = load i32, ptr %1, align 1
%2 = call ptr @clk_prepare_enable()
%RAX1 = ptrtoint ptr %2 to i64
%EBP = trunc i64 %RAX1 to i32
%3 = trunc i64 %RAX1 to i32
%4 = trunc i64 %RAX1 to i32
%5 = and i32 %3, %4
%highbit = and i32 -2147483648, %5
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %5, 0
%6 = and i32 %5, 255
%7 = call i32 @llvm.ctpop.i32(i32 %6)
%8 = and i32 %7, 1
%PF = icmp eq i32 %8, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%RSI = ptrtoint ptr @rodata_13 to i64
%9 = call ptr @dev_err()
%RAX2 = ptrtoint ptr %9 to i64
br label %bb.2
bb.2: ; preds = %bb.1, %entry
ret i32 %EBP
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/linux/sound/soc/img/extr_img-spdif-in.c_img_spdif_in_runtime_resume.c'
source_filename = "AnghaBench/linux/sound/soc/img/extr_img-spdif-in.c_img_spdif_in_runtime_resume.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [28 x i8] c"Unable to enable sys clock\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @img_spdif_in_runtime_resume], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @img_spdif_in_runtime_resume(ptr noundef %0) #0 {
%2 = tail call ptr @dev_get_drvdata(ptr noundef %0) #2
%3 = load i32, ptr %2, align 4, !tbaa !6
%4 = tail call i32 @clk_prepare_enable(i32 noundef %3) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str) #2
br label %8
8: ; preds = %1, %6
ret i32 %4
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @clk_prepare_enable(i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"img_spdif_in", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_sound_soc_img_extr_img-spdif-in.c_img_spdif_in_runtime_resume |
; ModuleID = 'mjolnir_Mjolnir_lua_extr_liolib.c_io_output.so'
source_filename = "mjolnir_Mjolnir_lua_extr_liolib.c_io_output.so"
@IO_OUTPUT = common dso_local global i32 0, align 4
@rodata_13 = private unnamed_addr constant [2 x i8] c"w\00", align 1, !ROData_SecInfo !0
declare dso_local ptr @g_iofile()
define dso_local i64 @io_output() {
entry:
%memload = load i32, ptr @IO_OUTPUT, align 1
%RDX = ptrtoint ptr @rodata_13 to i64
%0 = tail call ptr @g_iofile()
%RAX = ptrtoint ptr %0 to i64
ret i64 %RAX
}
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/mjolnir/Mjolnir/lua/extr_liolib.c_io_output.c'
source_filename = "AnghaBench/mjolnir/Mjolnir/lua/extr_liolib.c_io_output.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IO_OUTPUT = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [2 x i8] c"w\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @io_output], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @io_output(ptr noundef %0) #0 {
%2 = load i32, ptr @IO_OUTPUT, align 4, !tbaa !6
%3 = tail call i32 @g_iofile(ptr noundef %0, i32 noundef %2, ptr noundef nonnull @.str) #2
ret i32 %3
}
declare i32 @g_iofile(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| mjolnir_Mjolnir_lua_extr_liolib.c_io_output |
; ModuleID = 'openssl_crypto_bio_extr_bss_dgram.c_BIO_s_datagram_sctp.so'
source_filename = "openssl_crypto_bio_extr_bss_dgram.c_BIO_s_datagram_sctp.so"
@methods_dgramp_sctp = dso_local global i32 0, align 4
define dso_local i64 @BIO_s_datagram_sctp() {
entry:
%0 = ptrtoint ptr @methods_dgramp_sctp to i64
ret i64 %0
}
| ; ModuleID = 'AnghaBench/openssl/crypto/bio/extr_bss_dgram.c_BIO_s_datagram_sctp.c'
source_filename = "AnghaBench/openssl/crypto/bio/extr_bss_dgram.c_BIO_s_datagram_sctp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@methods_dgramp_sctp = common global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef nonnull ptr @BIO_s_datagram_sctp() local_unnamed_addr #0 {
ret ptr @methods_dgramp_sctp
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| openssl_crypto_bio_extr_bss_dgram.c_BIO_s_datagram_sctp |
; ModuleID = 'fastsocket_kernel_drivers_input_tablet_extr_wacom_sys.c_input_dev_g.so'
source_filename = "fastsocket_kernel_drivers_input_tablet_extr_wacom_sys.c_input_dev_g.so"
@EV_REL = common dso_local global i32 0, align 4
@REL_WHEEL = common dso_local global i32 0, align 4
@BTN_LEFT = common dso_local global i32 0, align 4
@BTN_RIGHT = common dso_local global i32 0, align 4
@BTN_MIDDLE = common dso_local global i32 0, align 4
@BTN_MOUSE = common dso_local global i32 0, align 4
@BTN_TOOL_RUBBER = common dso_local global i32 0, align 4
@BTN_TOOL_PEN = common dso_local global i32 0, align 4
@BTN_STYLUS = common dso_local global i32 0, align 4
@BTN_TOOL_MOUSE = common dso_local global i32 0, align 4
@BTN_STYLUS2 = common dso_local global i32 0, align 4
@BTN_DIGI = common dso_local global i32 0, align 4
@ABS_DISTANCE = common dso_local global i32 0, align 4
declare dso_local ptr @BIT_MASK()
declare dso_local ptr @BIT_WORD()
declare dso_local ptr @input_set_abs_params()
define dso_local i64 @input_dev_g(i64 %arg1, i64 %arg2) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%memload = load i32, ptr @EV_REL, align 1
%0 = call ptr @BIT_MASK()
%RAX = ptrtoint ptr %0 to i64
%1 = inttoptr i64 %arg1 to ptr
%memload1 = load i64, ptr %1, align 1
%2 = trunc i64 %RAX to i32
%3 = inttoptr i64 %memload1 to ptr
%4 = load i32, ptr %3, align 1
%5 = or i32 %4, %2
%6 = and i32 %5, 255
%7 = call i32 @llvm.ctpop.i32(i32 %6)
%8 = and i32 %7, 1
%PF = icmp eq i32 %8, 0
store i32 %5, ptr %3, align 1
%memload2 = load i32, ptr @REL_WHEEL, align 1
%9 = call ptr @BIT_MASK()
%RAX3 = ptrtoint ptr %9 to i64
%memref-disp = add i64 %arg1, 8
%10 = inttoptr i64 %memref-disp to ptr
%memload4 = load i64, ptr %10, align 1
%11 = trunc i64 %RAX3 to i32
%12 = inttoptr i64 %memload4 to ptr
%13 = load i32, ptr %12, align 1
%14 = or i32 %13, %11
%15 = and i32 %14, 255
%16 = call i32 @llvm.ctpop.i32(i32 %15)
%17 = and i32 %16, 1
%PF5 = icmp eq i32 %17, 0
store i32 %14, ptr %12, align 1
%memload6 = load i32, ptr @BTN_LEFT, align 1
%18 = call ptr @BIT_MASK()
%RAX7 = ptrtoint ptr %18 to i64
%EBP = trunc i64 %RAX7 to i32
%memload8 = load i32, ptr @BTN_RIGHT, align 1
%19 = call ptr @BIT_MASK()
%RAX9 = ptrtoint ptr %19 to i64
%EBX = trunc i64 %RAX9 to i32
%EBX11 = or i32 %EBX, %EBP
%highbit = and i32 -2147483648, %EBX11
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %EBX11, 0
%20 = and i32 %EBX11, 255
%21 = call i32 @llvm.ctpop.i32(i32 %20)
%22 = and i32 %21, 1
%PF10 = icmp eq i32 %22, 0
%memload12 = load i32, ptr @BTN_MIDDLE, align 1
%23 = call ptr @BIT_MASK()
%RAX13 = ptrtoint ptr %23 to i64
%EBP14 = trunc i64 %RAX13 to i32
%EBP19 = or i32 %EBP14, %EBX11
%highbit15 = and i32 -2147483648, %EBP19
%SF16 = icmp ne i32 %highbit15, 0
%ZF17 = icmp eq i32 %EBP19, 0
%24 = and i32 %EBP19, 255
%25 = call i32 @llvm.ctpop.i32(i32 %24)
%26 = and i32 %25, 1
%PF18 = icmp eq i32 %26, 0
%memref-disp20 = add i64 %arg1, 16
%27 = inttoptr i64 %memref-disp20 to ptr
%memload21 = load i64, ptr %27, align 1
%memload22 = load i32, ptr @BTN_MOUSE, align 1
%28 = call ptr @BIT_WORD()
%RAX23 = ptrtoint ptr %28 to i64
%memref-idxreg = mul i64 4, %RAX23
%memref-basereg = add i64 %memload21, %memref-idxreg
%29 = inttoptr i64 %memref-basereg to ptr
%30 = load i32, ptr %29, align 1
%31 = or i32 %30, %EBP19
%32 = and i32 %31, 255
%33 = call i32 @llvm.ctpop.i32(i32 %32)
%34 = and i32 %33, 1
%PF24 = icmp eq i32 %34, 0
store i32 %31, ptr %29, align 1
%memload25 = load i32, ptr @BTN_TOOL_RUBBER, align 1
%35 = call ptr @BIT_MASK()
%RAX26 = ptrtoint ptr %35 to i64
%EBX27 = trunc i64 %RAX26 to i32
%memload28 = load i32, ptr @BTN_TOOL_PEN, align 1
%36 = call ptr @BIT_MASK()
%RAX29 = ptrtoint ptr %36 to i64
%EBP30 = trunc i64 %RAX29 to i32
%EBP35 = or i32 %EBP30, %EBX27
%highbit31 = and i32 -2147483648, %EBP35
%SF32 = icmp ne i32 %highbit31, 0
%ZF33 = icmp eq i32 %EBP35, 0
%37 = and i32 %EBP35, 255
%38 = call i32 @llvm.ctpop.i32(i32 %37)
%39 = and i32 %38, 1
%PF34 = icmp eq i32 %39, 0
%memload36 = load i32, ptr @BTN_STYLUS, align 1
%40 = call ptr @BIT_MASK()
%RAX37 = ptrtoint ptr %40 to i64
%R12D = trunc i64 %RAX37 to i32
%memload38 = load i32, ptr @BTN_TOOL_MOUSE, align 1
%41 = call ptr @BIT_MASK()
%RAX39 = ptrtoint ptr %41 to i64
%EBX40 = trunc i64 %RAX39 to i32
%EBX45 = or i32 %EBX40, %R12D
%highbit41 = and i32 -2147483648, %EBX45
%SF42 = icmp ne i32 %highbit41, 0
%ZF43 = icmp eq i32 %EBX45, 0
%42 = and i32 %EBX45, 255
%43 = call i32 @llvm.ctpop.i32(i32 %42)
%44 = and i32 %43, 1
%PF44 = icmp eq i32 %44, 0
%EBX50 = or i32 %EBX45, %EBP35
%highbit46 = and i32 -2147483648, %EBX50
%SF47 = icmp ne i32 %highbit46, 0
%ZF48 = icmp eq i32 %EBX50, 0
%45 = and i32 %EBX50, 255
%46 = call i32 @llvm.ctpop.i32(i32 %45)
%47 = and i32 %46, 1
%PF49 = icmp eq i32 %47, 0
%memload51 = load i32, ptr @BTN_STYLUS2, align 1
%48 = call ptr @BIT_MASK()
%RAX52 = ptrtoint ptr %48 to i64
%EBP53 = trunc i64 %RAX52 to i32
%EBP58 = or i32 %EBP53, %EBX50
%highbit54 = and i32 -2147483648, %EBP58
%SF55 = icmp ne i32 %highbit54, 0
%ZF56 = icmp eq i32 %EBP58, 0
%49 = and i32 %EBP58, 255
%50 = call i32 @llvm.ctpop.i32(i32 %49)
%51 = and i32 %50, 1
%PF57 = icmp eq i32 %51, 0
%memref-disp59 = add i64 %arg1, 16
%52 = inttoptr i64 %memref-disp59 to ptr
%memload60 = load i64, ptr %52, align 1
%memload61 = load i32, ptr @BTN_DIGI, align 1
%53 = call ptr @BIT_WORD()
%RAX62 = ptrtoint ptr %53 to i64
%memref-idxreg63 = mul i64 4, %RAX62
%memref-basereg64 = add i64 %memload60, %memref-idxreg63
%54 = inttoptr i64 %memref-basereg64 to ptr
%55 = load i32, ptr %54, align 1
%56 = or i32 %55, %EBP58
%57 = and i32 %56, 255
%58 = call i32 @llvm.ctpop.i32(i32 %57)
%59 = and i32 %58, 1
%PF65 = icmp eq i32 %59, 0
store i32 %56, ptr %54, align 1
%memload66 = load i32, ptr @ABS_DISTANCE, align 1
%60 = inttoptr i64 %arg2 to ptr
%memload67 = load i64, ptr %60, align 1
%61 = inttoptr i64 %memload67 to ptr
%memload68 = load i32, ptr %61, align 1
%62 = tail call ptr @input_set_abs_params()
%RAX69 = ptrtoint ptr %62 to i64
ret i64 %RAX69
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/input/tablet/extr_wacom_sys.c_input_dev_g.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/input/tablet/extr_wacom_sys.c_input_dev_g.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EV_REL = common local_unnamed_addr global i32 0, align 4
@REL_WHEEL = common local_unnamed_addr global i32 0, align 4
@BTN_LEFT = common local_unnamed_addr global i32 0, align 4
@BTN_RIGHT = common local_unnamed_addr global i32 0, align 4
@BTN_MIDDLE = common local_unnamed_addr global i32 0, align 4
@BTN_MOUSE = common local_unnamed_addr global i32 0, align 4
@BTN_TOOL_RUBBER = common local_unnamed_addr global i32 0, align 4
@BTN_TOOL_PEN = common local_unnamed_addr global i32 0, align 4
@BTN_STYLUS = common local_unnamed_addr global i32 0, align 4
@BTN_TOOL_MOUSE = common local_unnamed_addr global i32 0, align 4
@BTN_STYLUS2 = common local_unnamed_addr global i32 0, align 4
@BTN_DIGI = common local_unnamed_addr global i32 0, align 4
@ABS_DISTANCE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @input_dev_g(ptr noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = load i32, ptr @EV_REL, align 4, !tbaa !6
%4 = tail call i32 @BIT_MASK(i32 noundef %3) #2
%5 = load ptr, ptr %0, align 8, !tbaa !10
%6 = load i32, ptr %5, align 4, !tbaa !6
%7 = or i32 %6, %4
store i32 %7, ptr %5, align 4, !tbaa !6
%8 = load i32, ptr @REL_WHEEL, align 4, !tbaa !6
%9 = tail call i32 @BIT_MASK(i32 noundef %8) #2
%10 = getelementptr inbounds i8, ptr %0, i64 8
%11 = load ptr, ptr %10, align 8, !tbaa !13
%12 = load i32, ptr %11, align 4, !tbaa !6
%13 = or i32 %12, %9
store i32 %13, ptr %11, align 4, !tbaa !6
%14 = load i32, ptr @BTN_LEFT, align 4, !tbaa !6
%15 = tail call i32 @BIT_MASK(i32 noundef %14) #2
%16 = load i32, ptr @BTN_RIGHT, align 4, !tbaa !6
%17 = tail call i32 @BIT_MASK(i32 noundef %16) #2
%18 = or i32 %17, %15
%19 = load i32, ptr @BTN_MIDDLE, align 4, !tbaa !6
%20 = tail call i32 @BIT_MASK(i32 noundef %19) #2
%21 = or i32 %18, %20
%22 = getelementptr inbounds i8, ptr %0, i64 16
%23 = load ptr, ptr %22, align 8, !tbaa !14
%24 = load i32, ptr @BTN_MOUSE, align 4, !tbaa !6
%25 = tail call i64 @BIT_WORD(i32 noundef %24) #2
%26 = getelementptr inbounds i32, ptr %23, i64 %25
%27 = load i32, ptr %26, align 4, !tbaa !6
%28 = or i32 %21, %27
store i32 %28, ptr %26, align 4, !tbaa !6
%29 = load i32, ptr @BTN_TOOL_RUBBER, align 4, !tbaa !6
%30 = tail call i32 @BIT_MASK(i32 noundef %29) #2
%31 = load i32, ptr @BTN_TOOL_PEN, align 4, !tbaa !6
%32 = tail call i32 @BIT_MASK(i32 noundef %31) #2
%33 = or i32 %32, %30
%34 = load i32, ptr @BTN_STYLUS, align 4, !tbaa !6
%35 = tail call i32 @BIT_MASK(i32 noundef %34) #2
%36 = or i32 %33, %35
%37 = load i32, ptr @BTN_TOOL_MOUSE, align 4, !tbaa !6
%38 = tail call i32 @BIT_MASK(i32 noundef %37) #2
%39 = or i32 %36, %38
%40 = load i32, ptr @BTN_STYLUS2, align 4, !tbaa !6
%41 = tail call i32 @BIT_MASK(i32 noundef %40) #2
%42 = or i32 %39, %41
%43 = load ptr, ptr %22, align 8, !tbaa !14
%44 = load i32, ptr @BTN_DIGI, align 4, !tbaa !6
%45 = tail call i64 @BIT_WORD(i32 noundef %44) #2
%46 = getelementptr inbounds i32, ptr %43, i64 %45
%47 = load i32, ptr %46, align 4, !tbaa !6
%48 = or i32 %42, %47
store i32 %48, ptr %46, align 4, !tbaa !6
%49 = load i32, ptr @ABS_DISTANCE, align 4, !tbaa !6
%50 = load ptr, ptr %1, align 8, !tbaa !15
%51 = load i32, ptr %50, align 4, !tbaa !17
%52 = tail call i32 @input_set_abs_params(ptr noundef nonnull %0, i32 noundef %49, i32 noundef 0, i32 noundef %51, i32 noundef 0, i32 noundef 0) #2
ret void
}
declare i32 @BIT_MASK(i32 noundef) local_unnamed_addr #1
declare i64 @BIT_WORD(i32 noundef) local_unnamed_addr #1
declare i32 @input_set_abs_params(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"input_dev", !12, i64 0, !12, i64 8, !12, i64 16}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!11, !12, i64 16}
!15 = !{!16, !12, i64 0}
!16 = !{!"wacom_wac", !12, i64 0}
!17 = !{!18, !7, i64 0}
!18 = !{!"TYPE_2__", !7, i64 0}
| fastsocket_kernel_drivers_input_tablet_extr_wacom_sys.c_input_dev_g |
; ModuleID = 'lede_target_linux_ath79_files_drivers_net_ethernet_atheros_ag71xx_extr_ag71xx_debugfs.c_ag71xx_debugfs_root_exit.so'
source_filename = "lede_target_linux_ath79_files_drivers_net_ethernet_atheros_ag71xx_extr_ag71xx_debugfs.c_ag71xx_debugfs_root_exit.so"
@ag71xx_debugfs_root = common dso_local global i64 0, align 8
declare dso_local ptr @debugfs_remove()
define dso_local ptr @ag71xx_debugfs_root_exit() {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%memload = load i64, ptr @ag71xx_debugfs_root, align 1
%0 = call ptr @debugfs_remove()
%1 = sext i32 0 to i64
store i64 %1, ptr @ag71xx_debugfs_root, align 1
ret ptr %0
}
| ; ModuleID = 'AnghaBench/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/extr_ag71xx_debugfs.c_ag71xx_debugfs_root_exit.c'
source_filename = "AnghaBench/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/extr_ag71xx_debugfs.c_ag71xx_debugfs_root_exit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ag71xx_debugfs_root = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @ag71xx_debugfs_root_exit() local_unnamed_addr #0 {
%1 = load ptr, ptr @ag71xx_debugfs_root, align 8, !tbaa !6
%2 = tail call i32 @debugfs_remove(ptr noundef %1) #2
store ptr null, ptr @ag71xx_debugfs_root, align 8, !tbaa !6
ret void
}
declare i32 @debugfs_remove(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| lede_target_linux_ath79_files_drivers_net_ethernet_atheros_ag71xx_extr_ag71xx_debugfs.c_ag71xx_debugfs_root_exit |
; ModuleID = 'FFmpeg_libavcodec_extr_hevc_cabac.c_ff_hevc_cbf_cb_cr_decode.so'
source_filename = "FFmpeg_libavcodec_extr_hevc_cabac.c_ff_hevc_cbf_cb_cr_decode.so"
@elem_offset = common dso_local global i64 0, align 8
@CBF_CB_CR = common dso_local global i64 0, align 8
declare dso_local ptr @GET_CABAC()
define dso_local i64 @ff_hevc_cbf_cb_cr_decode(i64 %arg1, i32 %arg2) {
entry:
%memload = load i64, ptr @elem_offset, align 1
%memload1 = load i64, ptr @CBF_CB_CR, align 1
%RDI = sext i32 %arg2 to i64
%memref-idxreg = mul i64 8, %memload1
%memref-basereg = add i64 %memload, %memref-idxreg
%0 = inttoptr i64 %memref-basereg to ptr
%memload2 = load i64, ptr %0, align 1
%RDI3 = add i64 %RDI, %memload2
%1 = and i64 %RDI3, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
%4 = tail call ptr @GET_CABAC()
%RAX = ptrtoint ptr %4 to i64
ret i64 %RAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_hevc_cabac.c_ff_hevc_cbf_cb_cr_decode.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_hevc_cabac.c_ff_hevc_cbf_cb_cr_decode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@elem_offset = common local_unnamed_addr global ptr null, align 8
@CBF_CB_CR = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @ff_hevc_cbf_cb_cr_decode(ptr nocapture noundef readnone %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load ptr, ptr @elem_offset, align 8, !tbaa !6
%4 = load i64, ptr @CBF_CB_CR, align 8, !tbaa !10
%5 = getelementptr inbounds i64, ptr %3, i64 %4
%6 = load i64, ptr %5, align 8, !tbaa !10
%7 = sext i32 %1 to i64
%8 = add nsw i64 %6, %7
%9 = tail call i32 @GET_CABAC(i64 noundef %8) #2
ret i32 %9
}
declare i32 @GET_CABAC(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
| FFmpeg_libavcodec_extr_hevc_cabac.c_ff_hevc_cbf_cb_cr_decode |
; ModuleID = 'freebsd_sys_x86_x86_extr_identcpu.c_cpu_getmaxphyaddr.so'
source_filename = "freebsd_sys_x86_x86_extr_identcpu.c_cpu_getmaxphyaddr.so"
@cpu_maxphyaddr = common dso_local global i64 0, align 8
define dso_local i32 @cpu_getmaxphyaddr() {
entry:
%memload = load i32, ptr @cpu_maxphyaddr, align 1
%0 = trunc i32 %memload to i8
%ECX = zext i8 %0 to i32
%RAX = sext i32 -1 to i64
%1 = trunc i32 %ECX to i8
%2 = zext i8 %1 to i64
%shift-cnt-msk = and i64 %2, 31
%RAX1 = shl i64 %RAX, %shift-cnt-msk
%shrd_cf_count_cmp = icmp sgt i64 %shift-cnt-msk, 0
%3 = sub i64 64, %shift-cnt-msk
%shld_cf_count_shift = shl i64 1, %3
%shld_cf_count_and = and i64 %RAX, %shld_cf_count_shift
%shld_cf_count_shft_out = icmp sgt i64 %shld_cf_count_and, 0
%shld_cf_update = select i1 %shrd_cf_count_cmp, i1 %shld_cf_count_shft_out, i1 false
%ZF = icmp eq i64 %RAX1, 0
%highbit = and i64 -9223372036854775808, %RAX1
%SF = icmp ne i64 %highbit, 0
%4 = trunc i64 %RAX1 to i32
%EAX = xor i32 %4, -1
ret i32 %EAX
}
| ; ModuleID = 'AnghaBench/freebsd/sys/x86/x86/extr_identcpu.c_cpu_getmaxphyaddr.c'
source_filename = "AnghaBench/freebsd/sys/x86/x86/extr_identcpu.c_cpu_getmaxphyaddr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cpu_maxphyaddr = common local_unnamed_addr global i64 0, align 8
@pae_mode = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define i32 @cpu_getmaxphyaddr() local_unnamed_addr #0 {
%1 = load i64, ptr @cpu_maxphyaddr, align 8, !tbaa !6
%2 = shl nsw i64 -1, %1
%3 = trunc i64 %2 to i32
%4 = xor i32 %3, -1
ret i32 %4
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_x86_x86_extr_identcpu.c_cpu_getmaxphyaddr |
; ModuleID = 'xLua_build_luajit-2.1.0b3_src_host_extr_minilua.c_libsize.so'
source_filename = "xLua_build_luajit-2.1.0b3_src_host_extr_minilua.c_libsize.so"
define dso_local i64 @libsize(i64 %arg1) {
entry:
%RAX-SKT-LOC = alloca i64, align 8
%0 = inttoptr i64 %arg1 to ptr
%1 = load i64, ptr %0, align 1
%2 = sub i64 %1, 0
%3 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %1, i64 0)
%CF = extractvalue { i64, i1 } %3, 1
%ZF = icmp eq i64 %2, 0
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%4 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %1, i64 0)
%OF = extractvalue { i64, i1 } %4, 1
%5 = and i64 %2, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF = icmp eq i64 %7, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%8 = zext i32 0 to i64
store i64 %8, ptr %RAX-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.2
%RAX = load i64, ptr %RAX-SKT-LOC, align 1
%memref-idxreg = mul i64 8, %RAX
%memref-basereg = add i64 %arg1, %memref-idxreg
%memref-disp = add i64 %memref-basereg, 8
%9 = inttoptr i64 %memref-disp to ptr
%10 = load i64, ptr %9, align 1
%11 = sub i64 %10, 0
%12 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %10, i64 0)
%CF1 = extractvalue { i64, i1 } %12, 1
%ZF2 = icmp eq i64 %11, 0
%highbit3 = and i64 -9223372036854775808, %11
%SF4 = icmp ne i64 %highbit3, 0
%13 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %10, i64 0)
%OF5 = extractvalue { i64, i1 } %13, 1
%14 = and i64 %11, 255
%15 = call i64 @llvm.ctpop.i64(i64 %14)
%16 = and i64 %15, 1
%PF6 = icmp eq i64 %16, 0
%memref-disp7 = add i64 %RAX, 1
%CmpZF_JNE = icmp eq i1 %ZF2, false
store i64 %memref-disp7, ptr %RAX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.2, label %bb.3
bb.3: ; preds = %bb.2
%ld-stk-prom = load i64, ptr %RAX-SKT-LOC, align 8
br label %UnifiedReturnBlock
bb.4: ; preds = %entry
%17 = zext i32 0 to i64
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.4, %bb.3
%UnifiedRetVal = phi i64 [ %ld-stk-prom, %bb.3 ], [ %17, %bb.4 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/xLua/build/luajit-2.1.0b3/src/host/extr_minilua.c_libsize.c'
source_filename = "AnghaBench/xLua/build/luajit-2.1.0b3/src/host/extr_minilua.c_libsize.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @libsize], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @libsize(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = icmp eq i64 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = phi ptr [ %8, %4 ], [ %0, %1 ]
%7 = add nuw nsw i32 %5, 1
%8 = getelementptr inbounds i8, ptr %6, i64 8
%9 = load i64, ptr %8, align 8, !tbaa !6
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %4, !llvm.loop !11
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %12
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
| xLua_build_luajit-2.1.0b3_src_host_extr_minilua.c_libsize |
; ModuleID = 'linux_fs_ocfs2_extr_dcache.c_ocfs2_dentry_iput.so'
source_filename = "linux_fs_ocfs2_extr_dcache.c_ocfs2_dentry_iput.so"
@rodata_13 = private unnamed_addr constant [97 x i8] c"Dentry is missing cluster lock. inode: %llu, d_flags: 0x%x, d_name: %pd\0A\00dentry: %pd, count: %u\0A\00", align 1, !ROData_SecInfo !0
@DCACHE_DISCONNECTED = common dso_local global i32 0, align 4
@ML_ERROR = common dso_local global i32 0, align 4
declare dso_local ptr @mlog_bug_on_msg()
declare dso_local ptr @OCFS2_SB()
declare dso_local ptr @ocfs2_dentry_lock_put()
declare dso_local ptr @d_unhashed()
declare dso_local ptr @OCFS2_I()
declare dso_local ptr @mlog()
declare dso_local ptr @iput()
define dso_local i64 @ocfs2_dentry_iput(i64 %arg1, i64 %arg2) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%memref-disp = add i64 %arg1, 8
%0 = inttoptr i64 %memref-disp to ptr
%memload = load i64, ptr %0, align 1
%1 = and i64 %memload, %memload
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %1, 0
%2 = and i64 %1, 255
%3 = call i64 @llvm.ctpop.i64(i64 %2)
%4 = and i64 %3, 1
%PF = icmp eq i64 %4, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%5 = inttoptr i64 %memload to ptr
%memload1 = load i64, ptr %5, align 1
%6 = and i64 %memload1, %memload1
%highbit2 = and i64 -9223372036854775808, %6
%SF3 = icmp ne i64 %highbit2, 0
%ZF4 = icmp eq i64 %6, 0
%7 = and i64 %6, 255
%8 = call i64 @llvm.ctpop.i64(i64 %7)
%9 = and i64 %8, 1
%PF5 = icmp eq i64 %9, 0
%DIL = icmp eq i1 %ZF4, true
%RSI = ptrtoint ptr getelementptr inbounds ([97 x i8], ptr @rodata_13, i32 0, i32 73) to i64, !ROData_Index !1
%10 = call ptr @mlog_bug_on_msg()
%RAX = ptrtoint ptr %10 to i64
%memref-disp6 = add i64 %arg1, 4
%11 = inttoptr i64 %memref-disp6 to ptr
%memload7 = load i32, ptr %11, align 1
%12 = call ptr @OCFS2_SB()
%RAX8 = ptrtoint ptr %12 to i64
%EDI = trunc i64 %RAX8 to i32
%13 = call ptr @ocfs2_dentry_lock_put()
%RAX9 = ptrtoint ptr %13 to i64
br label %bb.8
bb.2: ; preds = %entry
%memload10 = load i32, ptr @DCACHE_DISCONNECTED, align 1
%14 = inttoptr i64 %arg1 to ptr
%15 = load i32, ptr %14, align 1
%16 = zext i32 %15 to i64
%17 = zext i32 %memload10 to i64
%18 = and i64 %16, %17
%ZF11 = icmp eq i64 %18, 0
%highbit12 = and i64 -9223372036854775808, %18
%SF13 = icmp ne i64 %highbit12, 0
%19 = and i64 %18, 255
%20 = call i64 @llvm.ctpop.i64(i64 %19)
%21 = and i64 %20, 1
%PF14 = icmp eq i64 %21, 0
%CmpZF_JNE = icmp eq i1 %ZF11, false
br i1 %CmpZF_JNE, label %bb.8, label %bb.3
bb.3: ; preds = %bb.2
%22 = call ptr @d_unhashed()
%RAX15 = ptrtoint ptr %22 to i64
%23 = trunc i64 %RAX15 to i32
%24 = trunc i64 %RAX15 to i32
%25 = and i32 %23, %24
%highbit16 = and i32 -2147483648, %25
%SF17 = icmp ne i32 %highbit16, 0
%ZF18 = icmp eq i32 %25, 0
%26 = and i32 %25, 255
%27 = call i32 @llvm.ctpop.i32(i32 %26)
%28 = and i32 %27, 1
%PF19 = icmp eq i32 %28, 0
%CmpZF_JNE1 = icmp eq i1 %ZF18, false
br i1 %CmpZF_JNE1, label %bb.8, label %bb.4
bb.4: ; preds = %bb.3
%29 = and i64 %arg2, %arg2
%highbit20 = and i64 -9223372036854775808, %29
%SF21 = icmp ne i64 %highbit20, 0
%ZF22 = icmp eq i64 %29, 0
%30 = and i64 %29, 255
%31 = call i64 @llvm.ctpop.i64(i64 %30)
%32 = and i64 %31, 1
%PF23 = icmp eq i64 %32, 0
%CmpZF_JE2 = icmp eq i1 %ZF22, true
br i1 %CmpZF_JE2, label %bb.6, label %bb.5
bb.5: ; preds = %bb.4
%33 = call ptr @OCFS2_I()
%memload25 = load i64, ptr %33, align 1
br label %bb.7
bb.6: ; preds = %bb.4
br label %bb.7
bb.7: ; preds = %bb.6, %bb.5
%memload26 = load i32, ptr @ML_ERROR, align 1
%34 = inttoptr i64 %arg1 to ptr
%memload27 = load i32, ptr %34, align 1
%RSI28 = ptrtoint ptr @rodata_13 to i64
%35 = call ptr @mlog()
%RAX29 = ptrtoint ptr %35 to i64
br label %bb.8
bb.8: ; preds = %bb.7, %bb.3, %bb.2, %bb.1
%36 = tail call ptr @iput()
%RAX30 = ptrtoint ptr %36 to i64
ret i64 %RAX30
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
!1 = !{ptr getelementptr inbounds ([97 x i8], ptr @rodata_13, i32 0, i32 73)}
| ; ModuleID = 'AnghaBench/linux/fs/ocfs2/extr_dcache.c_ocfs2_dentry_iput.c'
source_filename = "AnghaBench/linux/fs/ocfs2/extr_dcache.c_ocfs2_dentry_iput.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DCACHE_DISCONNECTED = common local_unnamed_addr global i32 0, align 4
@ML_ERROR = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [73 x i8] c"Dentry is missing cluster lock. inode: %llu, d_flags: 0x%x, d_name: %pd\0A\00", align 1
@.str.1 = private unnamed_addr constant [24 x i8] c"dentry: %pd, count: %u\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ocfs2_dentry_iput], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ocfs2_dentry_iput(ptr noundef %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %24
6: ; preds = %2
%7 = load i32, ptr %0, align 8, !tbaa !12
%8 = load i32, ptr @DCACHE_DISCONNECTED, align 4, !tbaa !13
%9 = and i32 %8, %7
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %33
11: ; preds = %6
%12 = tail call i32 @d_unhashed(ptr noundef nonnull %0) #2
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %33
14: ; preds = %11
%15 = icmp eq ptr %1, null
br i1 %15, label %19, label %16
16: ; preds = %14
%17 = tail call ptr @OCFS2_I(ptr noundef nonnull %1) #2
%18 = load i64, ptr %17, align 8, !tbaa !14
br label %19
19: ; preds = %16, %14
%20 = phi i64 [ %18, %16 ], [ 0, %14 ]
%21 = load i32, ptr @ML_ERROR, align 4, !tbaa !13
%22 = load i32, ptr %0, align 8, !tbaa !12
%23 = tail call i32 @mlog(i32 noundef %21, ptr noundef nonnull @.str, i64 noundef %20, i32 noundef %22, ptr noundef nonnull %0) #2
br label %33
24: ; preds = %2
%25 = load i64, ptr %4, align 8, !tbaa !17
%26 = icmp eq i64 %25, 0
%27 = zext i1 %26 to i32
%28 = tail call i32 @mlog_bug_on_msg(i32 noundef %27, ptr noundef nonnull @.str.1, ptr noundef nonnull %0, i64 noundef %25) #2
%29 = getelementptr inbounds i8, ptr %0, i64 4
%30 = load i32, ptr %29, align 4, !tbaa !19
%31 = tail call i32 @OCFS2_SB(i32 noundef %30) #2
%32 = tail call i32 @ocfs2_dentry_lock_put(i32 noundef %31, ptr noundef nonnull %4) #2
br label %33
33: ; preds = %6, %11, %19, %24
%34 = tail call i32 @iput(ptr noundef %1) #2
ret void
}
declare i32 @d_unhashed(ptr noundef) local_unnamed_addr #1
declare ptr @OCFS2_I(ptr noundef) local_unnamed_addr #1
declare i32 @mlog(i32 noundef, ptr noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mlog_bug_on_msg(i32 noundef, ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ocfs2_dentry_lock_put(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @OCFS2_SB(i32 noundef) local_unnamed_addr #1
declare i32 @iput(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"dentry", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!15, !16, i64 0}
!15 = !{!"TYPE_2__", !16, i64 0}
!16 = !{!"long", !9, i64 0}
!17 = !{!18, !16, i64 0}
!18 = !{!"ocfs2_dentry_lock", !16, i64 0}
!19 = !{!7, !8, i64 4}
| linux_fs_ocfs2_extr_dcache.c_ocfs2_dentry_iput |
; ModuleID = 'linux_drivers_hsi_controllers_extr_omap_ssi_core.c_ssi_remove.so'
source_filename = "linux_drivers_hsi_controllers_extr_omap_ssi_core.c_ssi_remove.so"
@ssi_remove_ports = common dso_local global i32 0, align 4
declare dso_local ptr @platform_get_drvdata()
declare dso_local ptr @device_for_each_child()
declare dso_local ptr @ssi_remove_controller()
declare dso_local ptr @platform_set_drvdata()
declare dso_local ptr @pm_runtime_disable()
define dso_local i32 @ssi_remove(i64 %arg1) {
entry:
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%1 = call ptr @platform_get_drvdata()
%RAX = ptrtoint ptr %1 to i64
%memload = load i32, ptr @ssi_remove_ports, align 1
%2 = call ptr @device_for_each_child()
%RAX1 = ptrtoint ptr %2 to i64
%3 = call ptr @ssi_remove_controller()
%RAX2 = ptrtoint ptr %3 to i64
%4 = call ptr @platform_set_drvdata()
%RAX3 = ptrtoint ptr %4 to i64
%5 = call ptr @pm_runtime_disable()
%RAX4 = ptrtoint ptr %5 to i64
ret i32 0
}
| ; ModuleID = 'AnghaBench/linux/drivers/hsi/controllers/extr_omap_ssi_core.c_ssi_remove.c'
source_filename = "AnghaBench/linux/drivers/hsi/controllers/extr_omap_ssi_core.c_ssi_remove.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ssi_remove_ports = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ssi_remove], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @ssi_remove(ptr noundef %0) #0 {
%2 = tail call ptr @platform_get_drvdata(ptr noundef %0) #2
%3 = load i32, ptr @ssi_remove_ports, align 4, !tbaa !6
%4 = tail call i32 @device_for_each_child(ptr noundef %0, ptr noundef null, i32 noundef %3) #2
%5 = tail call i32 @ssi_remove_controller(ptr noundef %2) #2
%6 = tail call i32 @platform_set_drvdata(ptr noundef %0, ptr noundef null) #2
%7 = tail call i32 @pm_runtime_disable(ptr noundef %0) #2
ret i32 0
}
declare ptr @platform_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @device_for_each_child(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ssi_remove_controller(ptr noundef) local_unnamed_addr #1
declare i32 @platform_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @pm_runtime_disable(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_hsi_controllers_extr_omap_ssi_core.c_ssi_remove |
; ModuleID = 'reactos_dll_cpl_desk_extr_appearance.c_AppearancePage_LoadSelectedScheme.so'
source_filename = "reactos_dll_cpl_desk_extr_appearance.c_AppearancePage_LoadSelectedScheme.so"
@FALSE = common dso_local global i64 0, align 8
@COLOR_DESKTOP = common dso_local global i64 0, align 8
@g_GlobalData = common dso_local global i32 0, align 4
declare dso_local ptr @LoadSchemeFromReg()
declare dso_local ptr @LoadSchemeFromTheme()
define dso_local i32 @AppearancePage_LoadSelectedScheme(i64 %arg1, i64 %arg2) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%RSI = add i64 %arg2, 8
%0 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %arg2, i64 8)
%CF = extractvalue { i64, i1 } %0, 1
%1 = and i64 %RSI, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
%ZF = icmp eq i64 %RSI, 0
%highbit = and i64 -9223372036854775808, %RSI
%SF = icmp ne i64 %highbit, 0
%4 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %arg2, i64 8)
%OF = extractvalue { i64, i1 } %4, 1
%memref-disp = add i64 %arg2, 8
%5 = inttoptr i64 %memref-disp to ptr
%memload = load i64, ptr %5, align 1
%6 = load i64, ptr @FALSE, align 8
%7 = sub i64 %memload, %6
%8 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload, i64 %6)
%CF1 = extractvalue { i64, i1 } %8, 1
%ZF2 = icmp eq i64 %7, 0
%highbit3 = and i64 -9223372036854775808, %7
%SF4 = icmp ne i64 %highbit3, 0
%9 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload, i64 %6)
%OF5 = extractvalue { i64, i1 } %9, 1
%10 = and i64 %7, 255
%11 = call i64 @llvm.ctpop.i64(i64 %10)
%12 = and i64 %11, 1
%PF6 = icmp eq i64 %12, 0
%CmpZF_JNE = icmp eq i1 %ZF2, false
br i1 %CmpZF_JNE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%13 = call ptr @LoadSchemeFromReg()
%RAX = ptrtoint ptr %13 to i64
br label %bb.3
bb.2: ; preds = %entry
%14 = call ptr @LoadSchemeFromTheme()
%RAX7 = ptrtoint ptr %14 to i64
br label %bb.3
bb.3: ; preds = %bb.2, %bb.1
%15 = inttoptr i64 %arg2 to ptr
%memload8 = load i64, ptr %15, align 1
%memload9 = load i64, ptr @COLOR_DESKTOP, align 1
%memref-idxreg = mul i64 4, %memload9
%memref-basereg = add i64 %memload8, %memref-idxreg
%16 = inttoptr i64 %memref-basereg to ptr
%memload10 = load i32, ptr %16, align 1
store i32 %memload10, ptr @g_GlobalData, align 1
ret i32 %memload10
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/reactos/dll/cpl/desk/extr_appearance.c_AppearancePage_LoadSelectedScheme.c'
source_filename = "AnghaBench/reactos/dll/cpl/desk/extr_appearance.c_AppearancePage_LoadSelectedScheme.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_9__ = type { i32 }
@FALSE = common local_unnamed_addr global i64 0, align 8
@COLOR_DESKTOP = common local_unnamed_addr global i64 0, align 8
@g_GlobalData = common local_unnamed_addr global %struct.TYPE_9__ zeroinitializer, align 4
@llvm.used = appending global [1 x ptr] [ptr @AppearancePage_LoadSelectedScheme], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @AppearancePage_LoadSelectedScheme(i32 %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 8
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = load i64, ptr @FALSE, align 8, !tbaa !14
%6 = icmp eq i64 %4, %5
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = tail call i32 @LoadSchemeFromReg(ptr noundef nonnull %1, ptr noundef nonnull %3) #2
br label %11
9: ; preds = %2
%10 = tail call i32 @LoadSchemeFromTheme(ptr noundef nonnull %1, ptr noundef nonnull %3) #2
br label %11
11: ; preds = %9, %7
%12 = load ptr, ptr %1, align 8, !tbaa !15
%13 = load i64, ptr @COLOR_DESKTOP, align 8, !tbaa !14
%14 = getelementptr inbounds i32, ptr %12, i64 %13
%15 = load i32, ptr %14, align 4, !tbaa !16
store i32 %15, ptr @g_GlobalData, align 4, !tbaa !18
ret void
}
declare i32 @LoadSchemeFromReg(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @LoadSchemeFromTheme(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !13, i64 8}
!7 = !{!"TYPE_8__", !8, i64 0, !12, i64 8}
!8 = !{!"TYPE_10__", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"TYPE_11__", !13, i64 0}
!13 = !{!"long", !10, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!7, !9, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"int", !10, i64 0}
!18 = !{!19, !17, i64 0}
!19 = !{!"TYPE_9__", !17, i64 0}
| reactos_dll_cpl_desk_extr_appearance.c_AppearancePage_LoadSelectedScheme |
; ModuleID = 'radare2_libr_asm_arch_arm_extr_armass64.c_isMask.so'
source_filename = "radare2_libr_asm_arch_arm_extr_armass64.c_isMask.so"
define dso_local i32 @isMask(i64 %arg1) {
entry:
%0 = trunc i64 %arg1 to i32
%1 = trunc i64 %arg1 to i32
%2 = and i32 %0, %1
%highbit = and i32 -2147483648, %2
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %2, 0
%3 = and i32 %2, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
%AL = icmp eq i1 %ZF, false
%memref-disp = add i64 %arg1, 1
%ECX = trunc i64 %memref-disp to i32
%6 = trunc i64 %arg1 to i32
%7 = and i32 %ECX, %6
%highbit1 = and i32 -2147483648, %7
%SF2 = icmp ne i32 %highbit1, 0
%ZF3 = icmp eq i32 %7, 0
%8 = and i32 %7, 255
%9 = call i32 @llvm.ctpop.i32(i32 %8)
%10 = and i32 %9, 1
%PF4 = icmp eq i32 %10, 0
%CL = icmp eq i1 %ZF3, true
%11 = zext i1 %CL to i8
%12 = zext i1 %AL to i8
%CL9 = and i8 %11, %12
%highbit5 = and i8 -128, %CL9
%SF6 = icmp ne i8 %highbit5, 0
%ZF7 = icmp eq i8 %CL9, 0
%13 = call i8 @llvm.ctpop.i8(i8 %CL9)
%14 = and i8 %13, 1
%PF8 = icmp eq i8 %14, 0
%EAX = zext i8 %CL9 to i32
ret i32 %EAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/radare2/libr/asm/arch/arm/extr_armass64.c_isMask.c'
source_filename = "AnghaBench/radare2/libr/asm/arch/arm/extr_armass64.c_isMask.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @isMask], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal range(i32 0, 2) i32 @isMask(i32 noundef %0) #0 {
%2 = icmp ne i32 %0, 0
%3 = add nsw i32 %0, 1
%4 = and i32 %3, %0
%5 = icmp eq i32 %4, 0
%6 = select i1 %2, i1 %5, i1 false
%7 = zext i1 %6 to i32
ret i32 %7
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| radare2_libr_asm_arch_arm_extr_armass64.c_isMask |
; ModuleID = 'HandBrake_libhb_extr_deccc608sub.c_general_608_close.so'
source_filename = "HandBrake_libhb_extr_deccc608sub.c_general_608_close.so"
declare dso_local void @free(ptr)
declare dso_local ptr @hb_buffer_list_close()
define dso_local i64 @general_608_close(i64 %arg1) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%memref-disp = add i64 %arg1, 32
%0 = inttoptr i64 %memref-disp to ptr
%memload = load i64, ptr %0, align 1
%1 = and i64 %memload, %memload
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %1, 0
%2 = and i64 %1, 255
%3 = call i64 @llvm.ctpop.i64(i64 %2)
%4 = and i64 %3, 1
%PF = icmp eq i64 %4, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%5 = inttoptr i64 %memload to ptr
call void @free(ptr %5)
%memref-disp1 = add i64 %arg1, 16
%6 = inttoptr i64 %memref-disp1 to ptr
store <4 x float> zeroinitializer, ptr %6, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %entry
%memref-disp2 = add i64 %arg1, 8
%7 = inttoptr i64 %memref-disp2 to ptr
%memload3 = load i64, ptr %7, align 1
%8 = and i64 %memload3, %memload3
%highbit4 = and i64 -9223372036854775808, %8
%SF5 = icmp ne i64 %highbit4, 0
%ZF6 = icmp eq i64 %8, 0
%9 = and i64 %8, 255
%10 = call i64 @llvm.ctpop.i64(i64 %9)
%11 = and i64 %10, 1
%PF7 = icmp eq i64 %11, 0
%CmpZF_JE1 = icmp eq i1 %ZF6, true
br i1 %CmpZF_JE1, label %bb.4, label %bb.3
bb.3: ; preds = %bb.2
%12 = inttoptr i64 %memload3 to ptr
call void @free(ptr %12)
br label %bb.4
bb.4: ; preds = %bb.3, %bb.2
%13 = tail call ptr @hb_buffer_list_close()
%RAX = ptrtoint ptr %13 to i64
ret i64 %RAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/HandBrake/libhb/extr_deccc608sub.c_general_608_close.c'
source_filename = "AnghaBench/HandBrake/libhb/extr_deccc608sub.c_general_608_close.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @general_608_close], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @general_608_close(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 32
%3 = load i64, ptr %2, align 8, !tbaa !6
%4 = icmp eq i64 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = tail call i32 @free(i64 noundef %3) #3
%7 = getelementptr inbounds i8, ptr %0, i64 16
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %7, i8 0, i64 16, i1 false)
br label %8
8: ; preds = %5, %1
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = load i64, ptr %9, align 8, !tbaa !12
%11 = icmp eq i64 %10, 0
br i1 %11, label %14, label %12
12: ; preds = %8
%13 = tail call i32 @free(i64 noundef %10) #3
br label %14
14: ; preds = %12, %8
%15 = tail call i32 @hb_buffer_list_close(ptr noundef nonnull %0) #3
ret void
}
declare i32 @free(i64 noundef) local_unnamed_addr #1
declare i32 @hb_buffer_list_close(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 32}
!7 = !{!"s_write", !8, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !11, i64 8}
| HandBrake_libhb_extr_deccc608sub.c_general_608_close |
; ModuleID = 'FFmpeg_libavformat_extr_mpegts.c_mpegts_free.so'
source_filename = "FFmpeg_libavformat_extr_mpegts.c_mpegts_free.so"
@NB_PID_MAX = common dso_local global i32 0, align 4
declare dso_local ptr @clear_programs()
declare dso_local ptr @mpegts_close_filter()
define dso_local i32 @mpegts_free(i64 %arg1) {
entry:
%EAX-SKT-LOC18 = alloca i32, align 4
%EAX-SKT-LOC = alloca i32, align 4
%RBX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%0 = call ptr @clear_programs()
%RAX = ptrtoint ptr %0 to i64
%memload = load i32, ptr @NB_PID_MAX, align 1
%1 = and i32 %memload, %memload
%highbit = and i32 -2147483648, %1
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %1, 0
%2 = and i32 %1, 255
%3 = call i32 @llvm.ctpop.i32(i32 %2)
%4 = and i32 %3, 1
%PF = icmp eq i32 %4, 0
store i32 %memload, ptr %EAX-SKT-LOC, align 1
store i32 %memload, ptr %EAX-SKT-LOC18, align 1
%CmpZF_JLE = icmp eq i1 %ZF, true
%CmpOF_JLE = icmp ne i1 %SF, false
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
br i1 %ZFOrSF_JLE, label %bb.6, label %bb.1
bb.1: ; preds = %entry
%5 = zext i32 0 to i64
store i64 %5, ptr %RBX-SKT-LOC, align 1
br label %bb.4
bb.4: ; preds = %bb.3, %bb.1
%6 = inttoptr i64 %arg1 to ptr
%memload1 = load i64, ptr %6, align 1
%RBX = load i64, ptr %RBX-SKT-LOC, align 1
%memref-idxreg = mul i64 8, %RBX
%memref-basereg = add i64 %memload1, %memref-idxreg
%7 = inttoptr i64 %memref-basereg to ptr
%memload2 = load i64, ptr %7, align 1
%8 = and i64 %memload2, %memload2
%highbit3 = and i64 -9223372036854775808, %8
%SF4 = icmp ne i64 %highbit3, 0
%ZF5 = icmp eq i64 %8, 0
%9 = and i64 %8, 255
%10 = call i64 @llvm.ctpop.i64(i64 %9)
%11 = and i64 %10, 1
%PF6 = icmp eq i64 %11, 0
%CmpZF_JE = icmp eq i1 %ZF5, true
br i1 %CmpZF_JE, label %bb.3, label %bb.5
bb.5: ; preds = %bb.4
%12 = call ptr @mpegts_close_filter()
%RAX7 = ptrtoint ptr %12 to i64
%memload8 = load i32, ptr @NB_PID_MAX, align 1
store i32 %memload8, ptr %EAX-SKT-LOC, align 1
br label %bb.3
bb.3: ; preds = %bb.5, %bb.4
%RBX13 = add i64 %RBX, 1
%13 = and i64 %RBX13, 255
%14 = call i64 @llvm.ctpop.i64(i64 %13)
%15 = and i64 %14, 1
%PF9 = icmp eq i64 %15, 0
%ZF10 = icmp eq i64 %RBX13, 0
%highbit11 = and i64 -9223372036854775808, %RBX13
%SF12 = icmp ne i64 %highbit11, 0
%EAX = load i32, ptr %EAX-SKT-LOC, align 1
%RCX = sext i32 %EAX to i64
%16 = sub i64 %RBX13, %RCX
%17 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RBX13, i64 %RCX)
%CF = extractvalue { i64, i1 } %17, 1
%ZF14 = icmp eq i64 %16, 0
%highbit15 = and i64 -9223372036854775808, %16
%SF16 = icmp ne i64 %highbit15, 0
%18 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RBX13, i64 %RCX)
%OF = extractvalue { i64, i1 } %18, 1
%19 = and i64 %16, 255
%20 = call i64 @llvm.ctpop.i64(i64 %19)
%21 = and i64 %20, 1
%PF17 = icmp eq i64 %21, 0
store i32 %EAX, ptr %EAX-SKT-LOC18, align 1
%CmpSFOF_JGE = icmp eq i1 %SF16, %OF
store i64 %RBX13, ptr %RBX-SKT-LOC, align 1
br i1 %CmpSFOF_JGE, label %bb.6, label %bb.4
bb.6: ; preds = %bb.3, %entry
%EAX19 = load i32, ptr %EAX-SKT-LOC18, align 1
ret i32 %EAX19
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/FFmpeg/libavformat/extr_mpegts.c_mpegts_free.c'
source_filename = "AnghaBench/FFmpeg/libavformat/extr_mpegts.c_mpegts_free.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NB_PID_MAX = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mpegts_free], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @mpegts_free(ptr noundef %0) #0 {
%2 = tail call i32 @clear_programs(ptr noundef %0) #2
%3 = load i32, ptr @NB_PID_MAX, align 4, !tbaa !6
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %20
5: ; preds = %1, %15
%6 = phi i32 [ %16, %15 ], [ %3, %1 ]
%7 = phi i64 [ %17, %15 ], [ 0, %1 ]
%8 = load ptr, ptr %0, align 8, !tbaa !10
%9 = getelementptr inbounds i64, ptr %8, i64 %7
%10 = load i64, ptr %9, align 8, !tbaa !13
%11 = icmp eq i64 %10, 0
br i1 %11, label %15, label %12
12: ; preds = %5
%13 = tail call i32 @mpegts_close_filter(ptr noundef nonnull %0, i64 noundef %10) #2
%14 = load i32, ptr @NB_PID_MAX, align 4, !tbaa !6
br label %15
15: ; preds = %5, %12
%16 = phi i32 [ %6, %5 ], [ %14, %12 ]
%17 = add nuw nsw i64 %7, 1
%18 = sext i32 %16 to i64
%19 = icmp slt i64 %17, %18
br i1 %19, label %5, label %20, !llvm.loop !15
20: ; preds = %15, %1
ret void
}
declare i32 @clear_programs(ptr noundef) local_unnamed_addr #1
declare i32 @mpegts_close_filter(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_5__", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| FFmpeg_libavformat_extr_mpegts.c_mpegts_free |
; ModuleID = 'mruby_mrbgems_mruby-io_src_extr_io.c_mrb_io_sysread.so'
source_filename = "mruby_mrbgems_mruby-io_src_extr_io.c_mrb_io_sysread.so"
@rodata_13 = private unnamed_addr constant [101 x i8] c"i|S\00negative expanding string size\00not opened for reading\00sysread failed: End of File\00sysread failed\00", align 1, !ROData_SecInfo !0
@E_ARGUMENT_ERROR = common dso_local global i32 0, align 4
@E_IO_ERROR = common dso_local global i32 0, align 4
@E_EOF_ERROR = common dso_local global i32 0, align 4
declare dso_local ptr @mrb_nil_value()
declare dso_local ptr @mrb_get_args()
declare dso_local ptr @mrb_str_new()
declare dso_local ptr @mrb_raise()
declare dso_local ptr @mrb_nil_p()
declare dso_local ptr @RSTRING_LEN()
declare dso_local ptr @RSTRING()
declare dso_local ptr @mrb_str_modify()
declare dso_local ptr @mrb_str_resize()
declare dso_local ptr @io_get_open_fptr()
declare dso_local ptr @RSTRING_PTR()
declare dso_local ptr @read()
declare dso_local ptr @mrb_str_new_cstr()
declare dso_local ptr @mrb_sys_fail()
define dso_local ptr @mrb_io_sysread(i64 %arg1, i32 %arg2) {
entry:
%RAX-SKT-LOC = alloca i64, align 8
%EAX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 48, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 0
%RSP_P.0 = inttoptr i64 %0 to ptr
%1 = add i64 %tos, 12
%RSP_P.12 = inttoptr i64 %1 to ptr
%2 = add i64 %tos, 16
%RSP_P.16 = inttoptr i64 %2 to ptr
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%3 = call ptr @mrb_nil_value()
%RAX = ptrtoint ptr %3 to i64
%4 = trunc i64 %RAX to i32
store i32 %4, ptr %RSP_P.12, align 1
%RSI = ptrtoint ptr @rodata_13 to i64
%RDX = ptrtoint ptr %RSP_P.16 to i64
%RCX = ptrtoint ptr %RSP_P.12 to i64
%5 = call ptr @mrb_get_args()
%RAX1 = ptrtoint ptr %5 to i64
%6 = load i64, ptr %RSP_P.16, align 1
%7 = sub i64 %6, 0
%8 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %6, i64 0)
%CF = extractvalue { i64, i1 } %8, 1
%ZF = icmp eq i64 %7, 0
%highbit = and i64 -9223372036854775808, %7
%SF = icmp ne i64 %highbit, 0
%9 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %6, i64 0)
%OF = extractvalue { i64, i1 } %9, 1
%10 = and i64 %7, 255
%11 = call i64 @llvm.ctpop.i64(i64 %10)
%12 = and i64 %11, 1
%PF = icmp eq i64 %12, 0
%CmpSF_JS = icmp eq i1 %SF, true
br i1 %CmpSF_JS, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%CmpZF_JNE = icmp eq i1 %ZF, false
br i1 %CmpZF_JNE, label %bb.4, label %bb.2
bb.2: ; preds = %bb.1
%13 = call ptr @mrb_str_new()
%RAX2 = ptrtoint ptr %13 to i64
store i64 %RAX2, ptr %RAX-SKT-LOC, align 1
br label %bb.22
bb.3: ; preds = %entry
%memload = load i32, ptr @E_ARGUMENT_ERROR, align 1
%RDX3 = ptrtoint ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 4) to i64, !ROData_Index !1
%14 = call ptr @mrb_raise()
%RAX4 = ptrtoint ptr %14 to i64
br label %bb.4
bb.4: ; preds = %bb.3, %bb.1
%memload5 = load i32, ptr %RSP_P.12, align 1
%15 = call ptr @mrb_nil_p()
%RAX6 = ptrtoint ptr %15 to i64
%16 = and i64 %RAX6, %RAX6
%highbit7 = and i64 -9223372036854775808, %16
%SF8 = icmp ne i64 %highbit7, 0
%ZF9 = icmp eq i64 %16, 0
%17 = and i64 %16, 255
%18 = call i64 @llvm.ctpop.i64(i64 %17)
%19 = and i64 %18, 1
%PF10 = icmp eq i64 %19, 0
%CmpZF_JE = icmp eq i1 %ZF9, true
br i1 %CmpZF_JE, label %bb.6, label %bb.5
bb.5: ; preds = %bb.4
%memload11 = load i64, ptr %RSP_P.16, align 1
%20 = call ptr @mrb_str_new()
%RAX12 = ptrtoint ptr %20 to i64
%EDI = trunc i64 %RAX12 to i32
%21 = trunc i64 %RAX12 to i32
store i32 %21, ptr %RSP_P.12, align 1
br label %bb.7
bb.6: ; preds = %bb.4
%memload13 = load i32, ptr %RSP_P.12, align 1
br label %bb.7
bb.7: ; preds = %bb.6, %bb.5
%22 = call ptr @RSTRING_LEN()
%RAX14 = ptrtoint ptr %22 to i64
%23 = trunc i64 %RAX14 to i32
%RAX15 = sext i32 %23 to i64
%memload16 = load i64, ptr %RSP_P.16, align 1
%memload17 = load i32, ptr %RSP_P.12, align 1
%24 = sub i64 %memload16, %RAX15
%25 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload16, i64 %RAX15)
%CF18 = extractvalue { i64, i1 } %25, 1
%ZF19 = icmp eq i64 %24, 0
%highbit20 = and i64 -9223372036854775808, %24
%SF21 = icmp ne i64 %highbit20, 0
%26 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload16, i64 %RAX15)
%OF22 = extractvalue { i64, i1 } %26, 1
%27 = and i64 %24, 255
%28 = call i64 @llvm.ctpop.i64(i64 %27)
%29 = and i64 %28, 1
%PF23 = icmp eq i64 %29, 0
%CmpZF_JNE78 = icmp eq i1 %ZF19, false
br i1 %CmpZF_JNE78, label %bb.9, label %bb.8
bb.8: ; preds = %bb.7
%30 = call ptr @RSTRING()
%RAX24 = ptrtoint ptr %30 to i64
%ESI = trunc i64 %RAX24 to i32
%31 = call ptr @mrb_str_modify()
%RAX25 = ptrtoint ptr %31 to i64
br label %bb.10
bb.9: ; preds = %bb.7
%32 = call ptr @mrb_str_resize()
%RAX26 = ptrtoint ptr %32 to i64
%33 = trunc i64 %RAX26 to i32
store i32 %33, ptr %RSP_P.12, align 1
br label %bb.10
bb.10: ; preds = %bb.9, %bb.8
%34 = call ptr @io_get_open_fptr()
%RAX27 = ptrtoint ptr %34 to i64
%memref-disp = add i64 %RAX27, 4
%35 = inttoptr i64 %memref-disp to ptr
%36 = load i32, ptr %35, align 1
%37 = zext i32 %36 to i64
%38 = zext i32 0 to i64
%39 = sub i64 %37, %38
%40 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %37, i64 %38)
%CF28 = extractvalue { i64, i1 } %40, 1
%ZF29 = icmp eq i64 %39, 0
%highbit30 = and i64 -9223372036854775808, %39
%SF31 = icmp ne i64 %highbit30, 0
%41 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %37, i64 %38)
%OF32 = extractvalue { i64, i1 } %41, 1
%42 = and i64 %39, 255
%43 = call i64 @llvm.ctpop.i64(i64 %42)
%44 = and i64 %43, 1
%PF33 = icmp eq i64 %44, 0
%CmpZF_JNE79 = icmp eq i1 %ZF29, false
br i1 %CmpZF_JNE79, label %bb.12, label %bb.11
bb.11: ; preds = %bb.10
%memload34 = load i32, ptr @E_IO_ERROR, align 1
%RDX35 = ptrtoint ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 35) to i64, !ROData_Index !2
%45 = call ptr @mrb_raise()
%RAX36 = ptrtoint ptr %45 to i64
br label %bb.12
bb.12: ; preds = %bb.11, %bb.10
%memload37 = load i32, ptr %34, align 1
%memload38 = load i32, ptr %RSP_P.12, align 1
%46 = call ptr @RSTRING_PTR()
%RAX39 = ptrtoint ptr %46 to i64
%memload40 = load i32, ptr %RSP_P.16, align 1
%ESI41 = trunc i64 %RAX39 to i32
%47 = call ptr @read()
%RAX42 = ptrtoint ptr %47 to i64
%48 = trunc i64 %RAX42 to i32
%49 = trunc i64 -1 to i32
%50 = sub i32 %48, %49
%51 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %48, i32 %49)
%CF43 = extractvalue { i32, i1 } %51, 1
%ZF44 = icmp eq i32 %50, 0
%highbit45 = and i32 -2147483648, %50
%SF46 = icmp ne i32 %highbit45, 0
%52 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %48, i32 %49)
%OF47 = extractvalue { i32, i1 } %52, 1
%53 = and i32 %50, 255
%54 = call i32 @llvm.ctpop.i32(i32 %53)
%55 = and i32 %54, 1
%PF48 = icmp eq i32 %55, 0
%CmpZF_JE80 = icmp eq i1 %ZF44, true
br i1 %CmpZF_JE80, label %bb.16, label %bb.13
bb.13: ; preds = %bb.12
%EBP = trunc i64 %RAX42 to i32
%56 = trunc i64 %RAX42 to i32
%57 = trunc i64 %RAX42 to i32
%58 = and i32 %56, %57
%highbit49 = and i32 -2147483648, %58
%SF50 = icmp ne i32 %highbit49, 0
%ZF51 = icmp eq i32 %58, 0
%59 = and i32 %58, 255
%60 = call i32 @llvm.ctpop.i32(i32 %59)
%61 = and i32 %60, 1
%PF52 = icmp eq i32 %61, 0
%CmpZF_JNE81 = icmp eq i1 %ZF51, false
br i1 %CmpZF_JNE81, label %bb.17, label %bb.14
bb.14: ; preds = %bb.13
%62 = load i64, ptr %RSP_P.16, align 1
%63 = sub i64 %62, 0
%64 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %62, i64 0)
%CF53 = extractvalue { i64, i1 } %64, 1
%ZF54 = icmp eq i64 %63, 0
%highbit55 = and i64 -9223372036854775808, %63
%SF56 = icmp ne i64 %highbit55, 0
%65 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %62, i64 0)
%OF57 = extractvalue { i64, i1 } %65, 1
%66 = and i64 %63, 255
%67 = call i64 @llvm.ctpop.i64(i64 %66)
%68 = and i64 %67, 1
%PF58 = icmp eq i64 %68, 0
%CmpZF_JE82 = icmp eq i1 %ZF54, true
br i1 %CmpZF_JE82, label %bb.19, label %bb.15
bb.15: ; preds = %bb.14
%memload59 = load i32, ptr @E_EOF_ERROR, align 1
%RDX60 = ptrtoint ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 58) to i64, !ROData_Index !3
%69 = call ptr @mrb_raise()
%RAX61 = ptrtoint ptr %69 to i64
br label %bb.21
bb.19: ; preds = %bb.14
%RSI62 = ptrtoint ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 3) to i64, !ROData_Index !4
%70 = call ptr @mrb_str_new_cstr()
%RAX63 = ptrtoint ptr %70 to i64
store i64 %RAX63, ptr %EAX-SKT-LOC, align 1
br label %bb.20
bb.17: ; preds = %bb.13
%memload64 = load i32, ptr %RSP_P.12, align 1
%71 = call ptr @RSTRING_LEN()
%RAX65 = ptrtoint ptr %71 to i64
%72 = trunc i64 %RAX65 to i32
%73 = sub i32 %72, %EBP
%74 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %72, i32 %EBP)
%CF66 = extractvalue { i32, i1 } %74, 1
%ZF67 = icmp eq i32 %73, 0
%highbit68 = and i32 -2147483648, %73
%SF69 = icmp ne i32 %highbit68, 0
%75 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %72, i32 %EBP)
%OF70 = extractvalue { i32, i1 } %75, 1
%76 = and i32 %73, 255
%77 = call i32 @llvm.ctpop.i32(i32 %76)
%78 = and i32 %77, 1
%PF71 = icmp eq i32 %78, 0
%CmpZF_JE83 = icmp eq i1 %ZF67, true
br i1 %CmpZF_JE83, label %bb.21, label %bb.18
bb.18: ; preds = %bb.17
%memload72 = load i32, ptr %RSP_P.12, align 1
%79 = call ptr @mrb_str_resize()
%RAX73 = ptrtoint ptr %79 to i64
store i64 %RAX73, ptr %EAX-SKT-LOC, align 1
br label %bb.20
bb.20: ; preds = %bb.19, %bb.18
%80 = load i64, ptr %EAX-SKT-LOC, align 1
%EAX = trunc i64 %80 to i32
store i32 %EAX, ptr %RSP_P.12, align 1
br label %bb.21
bb.16: ; preds = %bb.12
%RSI74 = ptrtoint ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 86) to i64, !ROData_Index !5
%81 = call ptr @mrb_sys_fail()
%RAX75 = ptrtoint ptr %81 to i64
br label %bb.21
bb.21: ; preds = %bb.20, %bb.16, %bb.17, %bb.15
%memload76 = load i32, ptr %RSP_P.12, align 1
%82 = zext i32 %memload76 to i64
store i64 %82, ptr %RAX-SKT-LOC, align 1
br label %bb.22
bb.22: ; preds = %bb.21, %bb.2
%RAX77 = load i64, ptr %RAX-SKT-LOC, align 1
%83 = inttoptr i64 %RAX77 to ptr
ret ptr %83
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
!1 = !{ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 4)}
!2 = !{ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 35)}
!3 = !{ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 58)}
!4 = !{ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 3)}
!5 = !{ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 86)}
| ; ModuleID = 'AnghaBench/mruby/mrbgems/mruby-io/src/extr_io.c_mrb_io_sysread.c'
source_filename = "AnghaBench/mruby/mrbgems/mruby-io/src/extr_io.c_mrb_io_sysread.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [4 x i8] c"i|S\00", align 1
@E_ARGUMENT_ERROR = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [31 x i8] c"negative expanding string size\00", align 1
@E_IO_ERROR = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [23 x i8] c"not opened for reading\00", align 1
@.str.3 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@E_EOF_ERROR = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [28 x i8] c"sysread failed: End of File\00", align 1
@.str.5 = private unnamed_addr constant [15 x i8] c"sysread failed\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @mrb_io_sysread(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
%4 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%5 = tail call i32 @mrb_nil_value() #3
store i32 %5, ptr %3, align 4, !tbaa !6
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%6 = call i32 @mrb_get_args(ptr noundef %0, ptr noundef nonnull @.str, ptr noundef nonnull %4, ptr noundef nonnull %3) #3
%7 = load i64, ptr %4, align 8, !tbaa !10
%8 = icmp slt i64 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load i32, ptr @E_ARGUMENT_ERROR, align 4, !tbaa !6
%11 = call i32 @mrb_raise(ptr noundef %0, i32 noundef %10, ptr noundef nonnull @.str.1) #3
br label %16
12: ; preds = %2
%13 = icmp eq i64 %7, 0
br i1 %13, label %14, label %16
14: ; preds = %12
%15 = call i32 @mrb_str_new(ptr noundef %0, ptr noundef null, i64 noundef 0) #3
br label %73
16: ; preds = %12, %9
%17 = load i32, ptr %3, align 4, !tbaa !6
%18 = call i64 @mrb_nil_p(i32 noundef %17) #3
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %22
20: ; preds = %16
%21 = load i32, ptr %3, align 4, !tbaa !6
br label %25
22: ; preds = %16
%23 = load i64, ptr %4, align 8, !tbaa !10
%24 = call i32 @mrb_str_new(ptr noundef %0, ptr noundef null, i64 noundef %23) #3
store i32 %24, ptr %3, align 4, !tbaa !6
br label %25
25: ; preds = %20, %22
%26 = phi i32 [ %21, %20 ], [ %24, %22 ]
%27 = call i32 @RSTRING_LEN(i32 noundef %26) #3
%28 = sext i32 %27 to i64
%29 = load i64, ptr %4, align 8, !tbaa !10
%30 = icmp eq i64 %29, %28
%31 = load i32, ptr %3, align 4, !tbaa !6
br i1 %30, label %35, label %32
32: ; preds = %25
%33 = trunc i64 %29 to i32
%34 = call i32 @mrb_str_resize(ptr noundef %0, i32 noundef %31, i32 noundef %33) #3
store i32 %34, ptr %3, align 4, !tbaa !6
br label %38
35: ; preds = %25
%36 = call i32 @RSTRING(i32 noundef %31) #3
%37 = call i32 @mrb_str_modify(ptr noundef %0, i32 noundef %36) #3
br label %38
38: ; preds = %35, %32
%39 = call i64 @io_get_open_fptr(ptr noundef %0, i32 noundef %1) #3
%40 = inttoptr i64 %39 to ptr
%41 = getelementptr inbounds i8, ptr %40, i64 4
%42 = load i32, ptr %41, align 4, !tbaa !12
%43 = icmp eq i32 %42, 0
br i1 %43, label %44, label %47
44: ; preds = %38
%45 = load i32, ptr @E_IO_ERROR, align 4, !tbaa !6
%46 = call i32 @mrb_raise(ptr noundef %0, i32 noundef %45, ptr noundef nonnull @.str.2) #3
br label %47
47: ; preds = %44, %38
%48 = load i32, ptr %40, align 4, !tbaa !14
%49 = load i32, ptr %3, align 4, !tbaa !6
%50 = call i32 @RSTRING_PTR(i32 noundef %49) #3
%51 = load i64, ptr %4, align 8, !tbaa !10
%52 = trunc i64 %51 to i32
%53 = call i32 @read(i32 noundef %48, i32 noundef %50, i32 noundef %52) #3
switch i32 %53, label %64 [
i32 0, label %54
i32 -1, label %62
]
54: ; preds = %47
%55 = load i64, ptr %4, align 8, !tbaa !10
%56 = icmp eq i64 %55, 0
br i1 %56, label %57, label %59
57: ; preds = %54
%58 = call i32 @mrb_str_new_cstr(ptr noundef %0, ptr noundef nonnull @.str.3) #3
store i32 %58, ptr %3, align 4, !tbaa !6
br label %71
59: ; preds = %54
%60 = load i32, ptr @E_EOF_ERROR, align 4, !tbaa !6
%61 = call i32 @mrb_raise(ptr noundef %0, i32 noundef %60, ptr noundef nonnull @.str.4) #3
br label %71
62: ; preds = %47
%63 = call i32 @mrb_sys_fail(ptr noundef %0, ptr noundef nonnull @.str.5) #3
br label %71
64: ; preds = %47
%65 = load i32, ptr %3, align 4, !tbaa !6
%66 = call i32 @RSTRING_LEN(i32 noundef %65) #3
%67 = icmp eq i32 %66, %53
br i1 %67, label %71, label %68
68: ; preds = %64
%69 = load i32, ptr %3, align 4, !tbaa !6
%70 = call i32 @mrb_str_resize(ptr noundef %0, i32 noundef %69, i32 noundef %53) #3
store i32 %70, ptr %3, align 4, !tbaa !6
br label %71
71: ; preds = %64, %68, %57, %59, %62
%72 = load i32, ptr %3, align 4, !tbaa !6
br label %73
73: ; preds = %71, %14
%74 = phi i32 [ %72, %71 ], [ %15, %14 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %74
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @mrb_nil_value(...) local_unnamed_addr #2
declare i32 @mrb_get_args(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @mrb_raise(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @mrb_str_new(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @mrb_nil_p(i32 noundef) local_unnamed_addr #2
declare i32 @RSTRING_LEN(i32 noundef) local_unnamed_addr #2
declare i32 @mrb_str_resize(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mrb_str_modify(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @RSTRING(i32 noundef) local_unnamed_addr #2
declare i64 @io_get_open_fptr(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @read(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @RSTRING_PTR(i32 noundef) local_unnamed_addr #2
declare i32 @mrb_str_new_cstr(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @mrb_sys_fail(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !7, i64 4}
!13 = !{!"mrb_io", !7, i64 0, !7, i64 4}
!14 = !{!13, !7, i64 0}
| mruby_mrbgems_mruby-io_src_extr_io.c_mrb_io_sysread |
; ModuleID = 'linux_kernel_extr_softirq.c_wakeup_softirqd.so'
source_filename = "linux_kernel_extr_softirq.c_wakeup_softirqd.so"
@ksoftirqd = common dso_local global i32 0, align 4
@TASK_RUNNING = common dso_local global i64 0, align 8
declare dso_local ptr @__this_cpu_read()
declare dso_local ptr @wake_up_process()
define dso_local i64 @wakeup_softirqd() {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%memload = load i32, ptr @ksoftirqd, align 1
%0 = call ptr @__this_cpu_read()
%RAX = ptrtoint ptr %0 to i64
%1 = and i64 %RAX, %RAX
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %1, 0
%2 = and i64 %1, 255
%3 = call i64 @llvm.ctpop.i64(i64 %2)
%4 = and i64 %3, 1
%PF = icmp eq i64 %4, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%memload1 = load i64, ptr %0, align 1
%5 = load i64, ptr @TASK_RUNNING, align 8
%6 = sub i64 %memload1, %5
%7 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload1, i64 %5)
%CF = extractvalue { i64, i1 } %7, 1
%ZF2 = icmp eq i64 %6, 0
%highbit3 = and i64 -9223372036854775808, %6
%SF4 = icmp ne i64 %highbit3, 0
%8 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload1, i64 %5)
%OF = extractvalue { i64, i1 } %8, 1
%9 = and i64 %6, 255
%10 = call i64 @llvm.ctpop.i64(i64 %9)
%11 = and i64 %10, 1
%PF5 = icmp eq i64 %11, 0
%CmpZF_JNE = icmp eq i1 %ZF2, false
br i1 %CmpZF_JNE, label %bb.3, label %bb.2
bb.3: ; preds = %bb.1
%12 = tail call ptr @wake_up_process()
%RAX6 = ptrtoint ptr %12 to i64
br label %UnifiedReturnBlock
bb.2: ; preds = %bb.1, %entry
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.2, %bb.3
%UnifiedRetVal = phi i64 [ %RAX6, %bb.3 ], [ %RAX, %bb.2 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/kernel/extr_softirq.c_wakeup_softirqd.c'
source_filename = "AnghaBench/linux/kernel/extr_softirq.c_wakeup_softirqd.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ksoftirqd = common local_unnamed_addr global i32 0, align 4
@TASK_RUNNING = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @wakeup_softirqd], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @wakeup_softirqd() #0 {
%1 = load i32, ptr @ksoftirqd, align 4, !tbaa !6
%2 = tail call ptr @__this_cpu_read(i32 noundef %1) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %10, label %4
4: ; preds = %0
%5 = load i64, ptr %2, align 8, !tbaa !10
%6 = load i64, ptr @TASK_RUNNING, align 8, !tbaa !13
%7 = icmp eq i64 %5, %6
br i1 %7, label %10, label %8
8: ; preds = %4
%9 = tail call i32 @wake_up_process(ptr noundef nonnull %2) #2
br label %10
10: ; preds = %8, %4, %0
ret void
}
declare ptr @__this_cpu_read(i32 noundef) local_unnamed_addr #1
declare i32 @wake_up_process(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"task_struct", !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!12, !12, i64 0}
| linux_kernel_extr_softirq.c_wakeup_softirqd |
; ModuleID = 'linux_drivers_gpu_drm_i915_gvt_extr_kvmgt.c_intel_vgpu_set_msi_trigger.so'
source_filename = "linux_drivers_gpu_drm_i915_gvt_extr_kvmgt.c_intel_vgpu_set_msi_trigger.so"
@VFIO_IRQ_SET_DATA_EVENTFD = common dso_local global i32 0, align 4
@rodata_13 = private unnamed_addr constant [26 x i8] c"eventfd_ctx_fdget failed\0A\00", align 1, !ROData_SecInfo !0
@VFIO_IRQ_SET_DATA_NONE = common dso_local global i32 0, align 4
declare dso_local ptr @eventfd_ctx_fdget()
declare dso_local ptr @IS_ERR()
declare dso_local ptr @gvt_vgpu_err()
declare dso_local ptr @PTR_ERR()
declare dso_local ptr @intel_vgpu_release_msi_eventfd_ctx()
define dso_local i64 @intel_vgpu_set_msi_trigger(i64 %arg1, i64 %arg2, i64 %arg3, i32 %arg4, i32 %arg5, i64 %arg6) {
entry:
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%1 = load i32, ptr @VFIO_IRQ_SET_DATA_EVENTFD, align 4
%2 = zext i32 %1 to i64
%3 = zext i32 %arg5 to i64
%4 = and i64 %2, %3
%ZF = icmp eq i64 %4, 0
%highbit = and i64 -9223372036854775808, %4
%SF = icmp ne i64 %highbit, 0
%5 = and i64 %4, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF = icmp eq i64 %7, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%8 = inttoptr i64 %arg6 to ptr
%memload = load i32, ptr %8, align 1
%9 = call ptr @eventfd_ctx_fdget()
%RAX = ptrtoint ptr %9 to i64
%10 = call ptr @IS_ERR()
%RAX1 = ptrtoint ptr %10 to i64
%11 = and i64 %RAX1, %RAX1
%highbit2 = and i64 -9223372036854775808, %11
%SF3 = icmp ne i64 %highbit2, 0
%ZF4 = icmp eq i64 %11, 0
%12 = and i64 %11, 255
%13 = call i64 @llvm.ctpop.i64(i64 %12)
%14 = and i64 %13, 1
%PF5 = icmp eq i64 %14, 0
%CmpZF_JE9 = icmp eq i1 %ZF4, true
br i1 %CmpZF_JE9, label %bb.6, label %bb.2
bb.2: ; preds = %bb.1
%RDI = ptrtoint ptr @rodata_13 to i64
%15 = call ptr @gvt_vgpu_err()
%RAX6 = ptrtoint ptr %15 to i64
%16 = tail call ptr @PTR_ERR()
%RAX7 = ptrtoint ptr %16 to i64
br label %UnifiedReturnBlock
bb.6: ; preds = %bb.1
%17 = inttoptr i64 %RDI to ptr
store i64 %RAX, ptr %17, align 1
br label %bb.7
bb.3: ; preds = %entry
%18 = and i32 %arg4, %arg4
%highbit1 = and i32 -2147483648, %18
%SF2 = icmp ne i32 %highbit1, 0
%ZF3 = icmp eq i32 %18, 0
%19 = and i32 %18, 255
%20 = call i32 @llvm.ctpop.i32(i32 %19)
%21 = and i32 %20, 1
%PF4 = icmp eq i32 %21, 0
%CmpZF_JNE = icmp eq i1 %ZF3, false
br i1 %CmpZF_JNE, label %bb.7, label %bb.4
bb.4: ; preds = %bb.3
%memload5 = load i32, ptr @VFIO_IRQ_SET_DATA_NONE, align 1
%R8D = and i32 %arg5, %memload5
%22 = and i32 %R8D, 255
%23 = call i32 @llvm.ctpop.i32(i32 %22)
%24 = and i32 %23, 1
%PF6 = icmp eq i32 %24, 0
%CmpZF_JE10 = icmp eq i1 %ZF3, true
br i1 %CmpZF_JE10, label %bb.7, label %bb.5
bb.5: ; preds = %bb.4
%25 = call ptr @intel_vgpu_release_msi_eventfd_ctx()
%RAX8 = ptrtoint ptr %25 to i64
br label %bb.7
bb.7: ; preds = %bb.6, %bb.5, %bb.4, %bb.3
%26 = zext i32 0 to i64
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.7, %bb.2
%UnifiedRetVal = phi i64 [ %RAX7, %bb.2 ], [ %26, %bb.7 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/gvt/extr_kvmgt.c_intel_vgpu_set_msi_trigger.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/gvt/extr_kvmgt.c_intel_vgpu_set_msi_trigger.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VFIO_IRQ_SET_DATA_EVENTFD = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [26 x i8] c"eventfd_ctx_fdget failed\0A\00", align 1
@VFIO_IRQ_SET_DATA_NONE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @intel_vgpu_set_msi_trigger], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @intel_vgpu_set_msi_trigger(ptr noundef %0, i32 %1, i32 %2, i32 noundef %3, i32 noundef %4, ptr nocapture noundef readonly %5) #0 {
%7 = load i32, ptr @VFIO_IRQ_SET_DATA_EVENTFD, align 4, !tbaa !6
%8 = and i32 %7, %4
%9 = icmp eq i32 %8, 0
br i1 %9, label %19, label %10
10: ; preds = %6
%11 = load i32, ptr %5, align 4, !tbaa !6
%12 = tail call ptr @eventfd_ctx_fdget(i32 noundef %11) #2
%13 = tail call i64 @IS_ERR(ptr noundef %12) #2
%14 = icmp eq i64 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %10
store ptr %12, ptr %0, align 8, !tbaa !10
br label %27
16: ; preds = %10
%17 = tail call i32 @gvt_vgpu_err(ptr noundef nonnull @.str) #2
%18 = tail call i32 @PTR_ERR(ptr noundef %12) #2
br label %27
19: ; preds = %6
%20 = load i32, ptr @VFIO_IRQ_SET_DATA_NONE, align 4, !tbaa !6
%21 = and i32 %20, %4
%22 = icmp eq i32 %21, 0
%23 = icmp ne i32 %3, 0
%24 = or i1 %23, %22
br i1 %24, label %27, label %25
25: ; preds = %19
%26 = tail call i32 @intel_vgpu_release_msi_eventfd_ctx(ptr noundef %0) #2
br label %27
27: ; preds = %25, %19, %15, %16
%28 = phi i32 [ %18, %16 ], [ 0, %15 ], [ 0, %19 ], [ 0, %25 ]
ret i32 %28
}
declare ptr @eventfd_ctx_fdget(i32 noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @gvt_vgpu_err(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @intel_vgpu_release_msi_eventfd_ctx(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 0}
!11 = !{!"intel_vgpu", !12, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
| linux_drivers_gpu_drm_i915_gvt_extr_kvmgt.c_intel_vgpu_set_msi_trigger |
; ModuleID = 'php-src_ext_opcache_jit_dynasm_extr_minilua.c_tohex.so'
source_filename = "php-src_ext_opcache_jit_dynasm_extr_minilua.c_tohex.so"
@rodata_13 = private unnamed_addr constant [34 x i8] c"0123456789abcdef\000123456789ABCDEF\00", align 1, !ROData_SecInfo !0
declare dso_local ptr @barg()
declare dso_local ptr @lua_isnone()
declare dso_local ptr @lua_pushlstring()
define dso_local i32 @tohex(i64 %arg1) {
entry:
%R8-SKT-LOC = alloca i64, align 8
%ECX-SKT-LOC = alloca i32, align 4
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%1 = call ptr @barg()
%RAX = ptrtoint ptr %1 to i64
%R14D = trunc i64 %RAX to i32
%2 = call ptr @lua_isnone()
%RAX1 = ptrtoint ptr %2 to i64
%3 = and i64 %RAX1, %RAX1
%highbit = and i64 -9223372036854775808, %3
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %3, 0
%4 = and i64 %3, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%R8 = ptrtoint ptr @rodata_13 to i64
store i32 8, ptr %ECX-SKT-LOC, align 1
store i64 %R8, ptr %R8-SKT-LOC, align 1
br label %bb.3
bb.2: ; preds = %entry
%7 = call ptr @barg()
%RAX2 = ptrtoint ptr %7 to i64
%ECX = trunc i64 %RAX2 to i32
%CF = icmp ne i32 0, 0
%ECX7 = sub i32 0, %ECX
%ZF3 = icmp eq i32 %ECX7, 0
%highbit4 = and i32 -2147483648, %ECX7
%SF5 = icmp ne i32 %highbit4, 0
%8 = and i32 %ECX7, 255
%9 = call i32 @llvm.ctpop.i32(i32 %8)
%10 = and i32 %9, 1
%PF6 = icmp eq i32 %10, 0
%11 = trunc i64 %RAX2 to i32
%12 = trunc i64 %RAX2 to i32
%Cond_CMOVS = icmp eq i1 %SF5, true
%CMOV = select i1 %Cond_CMOVS, i32 %12, i32 %ECX7
%13 = trunc i64 %RAX2 to i32
%14 = trunc i64 %RAX2 to i32
%15 = and i32 %13, %14
%highbit8 = and i32 -2147483648, %15
%SF9 = icmp ne i32 %highbit8, 0
%ZF10 = icmp eq i32 %15, 0
%16 = and i32 %15, 255
%17 = call i32 @llvm.ctpop.i32(i32 %16)
%18 = and i32 %17, 1
%PF11 = icmp eq i32 %18, 0
%RDX = ptrtoint ptr getelementptr inbounds ([34 x i8], ptr @rodata_13, i32 0, i32 17) to i64, !ROData_Index !1
%R812 = ptrtoint ptr @rodata_13 to i64
%Cond_CMOVS13 = icmp eq i1 %SF9, true
%CMOV14 = select i1 %Cond_CMOVS13, i64 %RDX, i64 %R812
store i32 %CMOV, ptr %ECX-SKT-LOC, align 1
store i64 %CMOV14, ptr %R8-SKT-LOC, align 1
br label %bb.3
bb.3: ; preds = %bb.2, %bb.1
%ECX15 = load i32, ptr %ECX-SKT-LOC, align 1
%19 = sub i32 %ECX15, 8
%20 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %ECX15, i32 8)
%CF16 = extractvalue { i32, i1 } %20, 1
%ZF17 = icmp eq i32 %19, 0
%highbit18 = and i32 -2147483648, %19
%SF19 = icmp ne i32 %highbit18, 0
%21 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %ECX15, i32 8)
%OF = extractvalue { i32, i1 } %21, 1
%22 = and i32 %19, 255
%23 = call i32 @llvm.ctpop.i32(i32 %22)
%24 = and i32 %23, 1
%PF20 = icmp eq i32 %24, 0
%Cond_CMOVL = icmp ne i1 %SF19, %OF
%CMOV21 = select i1 %Cond_CMOVL, i32 %ECX15, i32 8
%25 = and i32 %CMOV21, %CMOV21
%highbit22 = and i32 -2147483648, %25
%SF23 = icmp ne i32 %highbit22, 0
%ZF24 = icmp eq i32 %25, 0
%26 = and i32 %25, 255
%27 = call i32 @llvm.ctpop.i32(i32 %26)
%28 = and i32 %27, 1
%PF25 = icmp eq i32 %28, 0
%CmpZF_JE181 = icmp eq i1 %ZF24, true
br i1 %CmpZF_JE181, label %bb.12, label %bb.4
bb.4: ; preds = %bb.3
%memref-disp = add i32 %CMOV21, -1
%RSI = zext i32 %memref-disp to i64
%ECX30 = and i32 %R14D, 15
%29 = and i32 %ECX30, 255
%30 = call i32 @llvm.ctpop.i32(i32 %29)
%31 = and i32 %30, 1
%PF26 = icmp eq i32 %31, 0
%ZF27 = icmp eq i32 %ECX30, 0
%highbit28 = and i32 -2147483648, %ECX30
%SF29 = icmp ne i32 %highbit28, 0
%32 = zext i32 %ECX30 to i64
%R831 = load i64, ptr %R8-SKT-LOC, align 1
%memref-basereg = add i64 %R831, %32
%33 = inttoptr i64 %memref-basereg to ptr
%memload = load i32, ptr %33, align 1
%34 = trunc i32 %memload to i8
%ECX32 = zext i8 %34 to i32
%EAX = trunc i64 %RSI to i32
%35 = ptrtoint ptr %stktop_8 to i64
%36 = zext i32 %EAX to i64
%idx-a = add i64 %35, %36
%37 = inttoptr i64 %idx-a to ptr
%38 = trunc i32 %ECX32 to i8
store i8 %38, ptr %37, align 1
%39 = sub i32 %CMOV21, 2
%40 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %CMOV21, i32 2)
%CF33 = extractvalue { i32, i1 } %40, 1
%ZF34 = icmp eq i32 %39, 0
%highbit35 = and i32 -2147483648, %39
%SF36 = icmp ne i32 %highbit35, 0
%41 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %CMOV21, i32 2)
%OF37 = extractvalue { i32, i1 } %41, 1
%42 = and i32 %39, 255
%43 = call i32 @llvm.ctpop.i32(i32 %42)
%44 = and i32 %43, 1
%PF38 = icmp eq i32 %44, 0
%CmpCF_JB = icmp eq i1 %CF33, true
br i1 %CmpCF_JB, label %bb.13, label %bb.5
bb.5: ; preds = %bb.4
%EAX42 = lshr i32 %R14D, 4
%ZF39 = icmp eq i32 %EAX42, 0
%highbit40 = and i32 -2147483648, %EAX42
%SF41 = icmp ne i32 %highbit40, 0
%memref-disp43 = add i32 %CMOV21, -2
%RCX = zext i32 %memref-disp43 to i64
%EAX48 = and i32 %EAX42, 15
%45 = and i32 %EAX48, 255
%46 = call i32 @llvm.ctpop.i32(i32 %45)
%47 = and i32 %46, 1
%PF44 = icmp eq i32 %47, 0
%ZF45 = icmp eq i32 %EAX48, 0
%highbit46 = and i32 -2147483648, %EAX48
%SF47 = icmp ne i32 %highbit46, 0
%48 = zext i32 %EAX48 to i64
%memref-basereg49 = add i64 %R831, %48
%49 = inttoptr i64 %memref-basereg49 to ptr
%memload50 = load i32, ptr %49, align 1
%50 = trunc i32 %memload50 to i8
%EAX51 = zext i8 %50 to i32
%EDI = trunc i64 %RCX to i32
%51 = ptrtoint ptr %stktop_8 to i64
%52 = zext i32 %EDI to i64
%idx-a52 = add i64 %51, %52
%53 = inttoptr i64 %idx-a52 to ptr
%54 = trunc i32 %EAX51 to i8
store i8 %54, ptr %53, align 1
%55 = trunc i64 %RSI to i32
%56 = trunc i64 2 to i32
%57 = sub i32 %55, %56
%58 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %55, i32 %56)
%CF53 = extractvalue { i32, i1 } %58, 1
%ZF54 = icmp eq i32 %57, 0
%highbit55 = and i32 -2147483648, %57
%SF56 = icmp ne i32 %highbit55, 0
%59 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %55, i32 %56)
%OF57 = extractvalue { i32, i1 } %59, 1
%60 = and i32 %57, 255
%61 = call i32 @llvm.ctpop.i32(i32 %60)
%62 = and i32 %61, 1
%PF58 = icmp eq i32 %62, 0
%SFAndOF_JL = icmp ne i1 %SF56, %OF57
br i1 %SFAndOF_JL, label %bb.13, label %bb.6
bb.6: ; preds = %bb.5
%EAX62 = lshr i32 %R14D, 8
%ZF59 = icmp eq i32 %EAX62, 0
%highbit60 = and i32 -2147483648, %EAX62
%SF61 = icmp ne i32 %highbit60, 0
%memref-disp63 = add i32 %CMOV21, -3
%RSI64 = zext i32 %memref-disp63 to i64
%EAX69 = and i32 %EAX62, 15
%63 = and i32 %EAX69, 255
%64 = call i32 @llvm.ctpop.i32(i32 %63)
%65 = and i32 %64, 1
%PF65 = icmp eq i32 %65, 0
%ZF66 = icmp eq i32 %EAX69, 0
%highbit67 = and i32 -2147483648, %EAX69
%SF68 = icmp ne i32 %highbit67, 0
%66 = zext i32 %EAX69 to i64
%memref-basereg70 = add i64 %R831, %66
%67 = inttoptr i64 %memref-basereg70 to ptr
%memload71 = load i32, ptr %67, align 1
%68 = trunc i32 %memload71 to i8
%EAX72 = zext i8 %68 to i32
%EDI73 = trunc i64 %RSI64 to i32
%69 = ptrtoint ptr %stktop_8 to i64
%70 = zext i32 %EDI73 to i64
%idx-a74 = add i64 %69, %70
%71 = inttoptr i64 %idx-a74 to ptr
%72 = trunc i32 %EAX72 to i8
store i8 %72, ptr %71, align 1
%73 = trunc i64 %RCX to i32
%74 = trunc i64 2 to i32
%75 = sub i32 %73, %74
%76 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %73, i32 %74)
%CF75 = extractvalue { i32, i1 } %76, 1
%ZF76 = icmp eq i32 %75, 0
%highbit77 = and i32 -2147483648, %75
%SF78 = icmp ne i32 %highbit77, 0
%77 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %73, i32 %74)
%OF79 = extractvalue { i32, i1 } %77, 1
%78 = and i32 %75, 255
%79 = call i32 @llvm.ctpop.i32(i32 %78)
%80 = and i32 %79, 1
%PF80 = icmp eq i32 %80, 0
%SFAndOF_JL182 = icmp ne i1 %SF78, %OF79
br i1 %SFAndOF_JL182, label %bb.13, label %bb.7
bb.7: ; preds = %bb.6
%EAX84 = lshr i32 %R14D, 12
%ZF81 = icmp eq i32 %EAX84, 0
%highbit82 = and i32 -2147483648, %EAX84
%SF83 = icmp ne i32 %highbit82, 0
%memref-disp85 = add i32 %CMOV21, -4
%RCX86 = zext i32 %memref-disp85 to i64
%EAX91 = and i32 %EAX84, 15
%81 = and i32 %EAX91, 255
%82 = call i32 @llvm.ctpop.i32(i32 %81)
%83 = and i32 %82, 1
%PF87 = icmp eq i32 %83, 0
%ZF88 = icmp eq i32 %EAX91, 0
%highbit89 = and i32 -2147483648, %EAX91
%SF90 = icmp ne i32 %highbit89, 0
%84 = zext i32 %EAX91 to i64
%memref-basereg92 = add i64 %R831, %84
%85 = inttoptr i64 %memref-basereg92 to ptr
%memload93 = load i32, ptr %85, align 1
%86 = trunc i32 %memload93 to i8
%EAX94 = zext i8 %86 to i32
%EDI95 = trunc i64 %RCX86 to i32
%87 = ptrtoint ptr %stktop_8 to i64
%88 = zext i32 %EDI95 to i64
%idx-a96 = add i64 %87, %88
%89 = inttoptr i64 %idx-a96 to ptr
%90 = trunc i32 %EAX94 to i8
store i8 %90, ptr %89, align 1
%91 = trunc i64 %RSI64 to i32
%92 = trunc i64 2 to i32
%93 = sub i32 %91, %92
%94 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %91, i32 %92)
%CF97 = extractvalue { i32, i1 } %94, 1
%ZF98 = icmp eq i32 %93, 0
%highbit99 = and i32 -2147483648, %93
%SF100 = icmp ne i32 %highbit99, 0
%95 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %91, i32 %92)
%OF101 = extractvalue { i32, i1 } %95, 1
%96 = and i32 %93, 255
%97 = call i32 @llvm.ctpop.i32(i32 %96)
%98 = and i32 %97, 1
%PF102 = icmp eq i32 %98, 0
%SFAndOF_JL183 = icmp ne i1 %SF100, %OF101
br i1 %SFAndOF_JL183, label %bb.13, label %bb.8
bb.8: ; preds = %bb.7
%EAX106 = lshr i32 %R14D, 16
%ZF103 = icmp eq i32 %EAX106, 0
%highbit104 = and i32 -2147483648, %EAX106
%SF105 = icmp ne i32 %highbit104, 0
%memref-disp107 = add i32 %CMOV21, -5
%RSI108 = zext i32 %memref-disp107 to i64
%EAX113 = and i32 %EAX106, 15
%99 = and i32 %EAX113, 255
%100 = call i32 @llvm.ctpop.i32(i32 %99)
%101 = and i32 %100, 1
%PF109 = icmp eq i32 %101, 0
%ZF110 = icmp eq i32 %EAX113, 0
%highbit111 = and i32 -2147483648, %EAX113
%SF112 = icmp ne i32 %highbit111, 0
%102 = zext i32 %EAX113 to i64
%memref-basereg114 = add i64 %R831, %102
%103 = inttoptr i64 %memref-basereg114 to ptr
%memload115 = load i32, ptr %103, align 1
%104 = trunc i32 %memload115 to i8
%EAX116 = zext i8 %104 to i32
%EDI117 = trunc i64 %RSI108 to i32
%105 = ptrtoint ptr %stktop_8 to i64
%106 = zext i32 %EDI117 to i64
%idx-a118 = add i64 %105, %106
%107 = inttoptr i64 %idx-a118 to ptr
%108 = trunc i32 %EAX116 to i8
store i8 %108, ptr %107, align 1
%109 = trunc i64 %RCX86 to i32
%110 = trunc i64 2 to i32
%111 = sub i32 %109, %110
%112 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %109, i32 %110)
%CF119 = extractvalue { i32, i1 } %112, 1
%ZF120 = icmp eq i32 %111, 0
%highbit121 = and i32 -2147483648, %111
%SF122 = icmp ne i32 %highbit121, 0
%113 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %109, i32 %110)
%OF123 = extractvalue { i32, i1 } %113, 1
%114 = and i32 %111, 255
%115 = call i32 @llvm.ctpop.i32(i32 %114)
%116 = and i32 %115, 1
%PF124 = icmp eq i32 %116, 0
%SFAndOF_JL184 = icmp ne i1 %SF122, %OF123
br i1 %SFAndOF_JL184, label %bb.13, label %bb.9
bb.9: ; preds = %bb.8
%EAX128 = lshr i32 %R14D, 20
%ZF125 = icmp eq i32 %EAX128, 0
%highbit126 = and i32 -2147483648, %EAX128
%SF127 = icmp ne i32 %highbit126, 0
%memref-disp129 = add i32 %CMOV21, -6
%RCX130 = zext i32 %memref-disp129 to i64
%EAX135 = and i32 %EAX128, 15
%117 = and i32 %EAX135, 255
%118 = call i32 @llvm.ctpop.i32(i32 %117)
%119 = and i32 %118, 1
%PF131 = icmp eq i32 %119, 0
%ZF132 = icmp eq i32 %EAX135, 0
%highbit133 = and i32 -2147483648, %EAX135
%SF134 = icmp ne i32 %highbit133, 0
%120 = zext i32 %EAX135 to i64
%memref-basereg136 = add i64 %R831, %120
%121 = inttoptr i64 %memref-basereg136 to ptr
%memload137 = load i32, ptr %121, align 1
%122 = trunc i32 %memload137 to i8
%EAX138 = zext i8 %122 to i32
%EDI139 = trunc i64 %RCX130 to i32
%123 = ptrtoint ptr %stktop_8 to i64
%124 = zext i32 %EDI139 to i64
%idx-a140 = add i64 %123, %124
%125 = inttoptr i64 %idx-a140 to ptr
%126 = trunc i32 %EAX138 to i8
store i8 %126, ptr %125, align 1
%127 = trunc i64 %RSI108 to i32
%128 = trunc i64 2 to i32
%129 = sub i32 %127, %128
%130 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %127, i32 %128)
%CF141 = extractvalue { i32, i1 } %130, 1
%ZF142 = icmp eq i32 %129, 0
%highbit143 = and i32 -2147483648, %129
%SF144 = icmp ne i32 %highbit143, 0
%131 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %127, i32 %128)
%OF145 = extractvalue { i32, i1 } %131, 1
%132 = and i32 %129, 255
%133 = call i32 @llvm.ctpop.i32(i32 %132)
%134 = and i32 %133, 1
%PF146 = icmp eq i32 %134, 0
%SFAndOF_JL185 = icmp ne i1 %SF144, %OF145
br i1 %SFAndOF_JL185, label %bb.13, label %bb.10
bb.10: ; preds = %bb.9
%EAX150 = lshr i32 %R14D, 24
%ZF147 = icmp eq i32 %EAX150, 0
%highbit148 = and i32 -2147483648, %EAX150
%SF149 = icmp ne i32 %highbit148, 0
%memref-disp151 = add i32 %CMOV21, -7
%EAX156 = and i32 %EAX150, 15
%135 = and i32 %EAX156, 255
%136 = call i32 @llvm.ctpop.i32(i32 %135)
%137 = and i32 %136, 1
%PF152 = icmp eq i32 %137, 0
%ZF153 = icmp eq i32 %EAX156, 0
%highbit154 = and i32 -2147483648, %EAX156
%SF155 = icmp ne i32 %highbit154, 0
%138 = zext i32 %EAX156 to i64
%memref-basereg157 = add i64 %R831, %138
%139 = inttoptr i64 %memref-basereg157 to ptr
%memload158 = load i32, ptr %139, align 1
%140 = trunc i32 %memload158 to i8
%EAX159 = zext i8 %140 to i32
%141 = ptrtoint ptr %stktop_8 to i64
%142 = zext i32 %memref-disp151 to i64
%idx-a160 = add i64 %141, %142
%143 = inttoptr i64 %idx-a160 to ptr
%144 = trunc i32 %EAX159 to i8
store i8 %144, ptr %143, align 1
%145 = trunc i64 %RCX130 to i32
%146 = trunc i64 2 to i32
%147 = sub i32 %145, %146
%148 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %145, i32 %146)
%CF161 = extractvalue { i32, i1 } %148, 1
%ZF162 = icmp eq i32 %147, 0
%highbit163 = and i32 -2147483648, %147
%SF164 = icmp ne i32 %highbit163, 0
%149 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %145, i32 %146)
%OF165 = extractvalue { i32, i1 } %149, 1
%150 = and i32 %147, 255
%151 = call i32 @llvm.ctpop.i32(i32 %150)
%152 = and i32 %151, 1
%PF166 = icmp eq i32 %152, 0
%SFAndOF_JL186 = icmp ne i1 %SF164, %OF165
br i1 %SFAndOF_JL186, label %bb.13, label %bb.11
bb.11: ; preds = %bb.10
%153 = zext i32 %R14D to i64
%RCX170 = lshr i64 %153, 28
%ZF167 = icmp eq i64 %RCX170, 0
%highbit168 = and i64 -9223372036854775808, %RCX170
%SF169 = icmp ne i64 %highbit168, 0
%EAX174 = add nsw i32 -8, %CMOV21
%highbit171 = and i32 -2147483648, %EAX174
%SF172 = icmp ne i32 %highbit171, 0
%ZF173 = icmp eq i32 %EAX174, 0
%memref-basereg175 = add i64 %R831, %RCX170
%154 = inttoptr i64 %memref-basereg175 to ptr
%memload176 = load i32, ptr %154, align 1
%155 = trunc i32 %memload176 to i8
%ECX177 = zext i8 %155 to i32
%156 = ptrtoint ptr %stktop_8 to i64
%157 = zext i32 %EAX174 to i64
%idx-a178 = add i64 %156, %157
%158 = inttoptr i64 %idx-a178 to ptr
%159 = trunc i32 %ECX177 to i8
store i8 %159, ptr %158, align 1
br label %bb.13
bb.12: ; preds = %bb.3
br label %bb.13
bb.13: ; preds = %bb.12, %bb.11, %bb.10, %bb.9, %bb.8, %bb.7, %bb.6, %bb.5, %bb.4
%RSI179 = ptrtoint ptr %stktop_8 to i64
%160 = call ptr @lua_pushlstring()
%RAX180 = ptrtoint ptr %160 to i64
ret i32 1
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
!1 = !{ptr getelementptr inbounds ([34 x i8], ptr @rodata_13, i32 0, i32 17)}
| ; ModuleID = 'AnghaBench/php-src/ext/opcache/jit/dynasm/extr_minilua.c_tohex.c'
source_filename = "AnghaBench/php-src/ext/opcache/jit/dynasm/extr_minilua.c_tohex.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [17 x i8] c"0123456789abcdef\00", align 1
@.str.1 = private unnamed_addr constant [17 x i8] c"0123456789ABCDEF\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @tohex], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @tohex(ptr noundef %0) #0 {
%2 = alloca [8 x i8], align 1
%3 = tail call i32 @barg(ptr noundef %0, i32 noundef 1) #4
%4 = tail call i64 @lua_isnone(ptr noundef %0, i32 noundef 2) #4
%5 = icmp eq i64 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %1
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #4
br label %13
7: ; preds = %1
%8 = tail call i32 @barg(ptr noundef %0, i32 noundef 2) #4
%9 = freeze i32 %8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #4
%10 = icmp slt i32 %9, 0
%11 = select i1 %10, ptr @.str.1, ptr @.str
%12 = icmp eq i32 %9, 0
br i1 %12, label %101, label %13
13: ; preds = %6, %7
%14 = phi ptr [ @.str, %6 ], [ %11, %7 ]
%15 = phi i32 [ 8, %6 ], [ %9, %7 ]
%16 = tail call i32 @llvm.abs.i32(i32 %15, i1 false)
%17 = tail call i32 @llvm.smin.i32(i32 %16, i32 8)
%18 = zext i32 %17 to i64
%19 = add nsw i64 %18, -1
%20 = and i32 %3, 15
%21 = zext nneg i32 %20 to i64
%22 = getelementptr inbounds i8, ptr %14, i64 %21
%23 = load i8, ptr %22, align 1, !tbaa !6
%24 = and i64 %19, 4294967295
%25 = getelementptr inbounds [8 x i8], ptr %2, i64 0, i64 %24
store i8 %23, ptr %25, align 1, !tbaa !6
%26 = icmp sgt i32 %16, 1
br i1 %26, label %27, label %101, !llvm.loop !9
27: ; preds = %13
%28 = lshr i32 %3, 4
%29 = add nsw i64 %18, -2
%30 = and i32 %28, 15
%31 = zext nneg i32 %30 to i64
%32 = getelementptr inbounds i8, ptr %14, i64 %31
%33 = load i8, ptr %32, align 1, !tbaa !6
%34 = and i64 %29, 4294967295
%35 = getelementptr inbounds [8 x i8], ptr %2, i64 0, i64 %34
store i8 %33, ptr %35, align 1, !tbaa !6
%36 = trunc nuw i64 %19 to i32
%37 = icmp sgt i32 %36, 1
br i1 %37, label %38, label %101, !llvm.loop !9
38: ; preds = %27
%39 = lshr i32 %3, 8
%40 = add nsw i64 %18, -3
%41 = and i32 %39, 15
%42 = zext nneg i32 %41 to i64
%43 = getelementptr inbounds i8, ptr %14, i64 %42
%44 = load i8, ptr %43, align 1, !tbaa !6
%45 = and i64 %40, 4294967295
%46 = getelementptr inbounds [8 x i8], ptr %2, i64 0, i64 %45
store i8 %44, ptr %46, align 1, !tbaa !6
%47 = trunc nuw i64 %29 to i32
%48 = icmp sgt i32 %47, 1
br i1 %48, label %49, label %101, !llvm.loop !9
49: ; preds = %38
%50 = lshr i32 %3, 12
%51 = add nsw i64 %18, -4
%52 = and i32 %50, 15
%53 = zext nneg i32 %52 to i64
%54 = getelementptr inbounds i8, ptr %14, i64 %53
%55 = load i8, ptr %54, align 1, !tbaa !6
%56 = and i64 %51, 4294967295
%57 = getelementptr inbounds [8 x i8], ptr %2, i64 0, i64 %56
store i8 %55, ptr %57, align 1, !tbaa !6
%58 = trunc nuw i64 %40 to i32
%59 = icmp sgt i32 %58, 1
br i1 %59, label %60, label %101, !llvm.loop !9
60: ; preds = %49
%61 = lshr i32 %3, 16
%62 = add nsw i64 %18, -5
%63 = and i32 %61, 15
%64 = zext nneg i32 %63 to i64
%65 = getelementptr inbounds i8, ptr %14, i64 %64
%66 = load i8, ptr %65, align 1, !tbaa !6
%67 = and i64 %62, 4294967295
%68 = getelementptr inbounds [8 x i8], ptr %2, i64 0, i64 %67
store i8 %66, ptr %68, align 1, !tbaa !6
%69 = trunc nuw i64 %51 to i32
%70 = icmp sgt i32 %69, 1
br i1 %70, label %71, label %101, !llvm.loop !9
71: ; preds = %60
%72 = lshr i32 %3, 20
%73 = add nsw i64 %18, -6
%74 = and i32 %72, 15
%75 = zext nneg i32 %74 to i64
%76 = getelementptr inbounds i8, ptr %14, i64 %75
%77 = load i8, ptr %76, align 1, !tbaa !6
%78 = and i64 %73, 4294967295
%79 = getelementptr inbounds [8 x i8], ptr %2, i64 0, i64 %78
store i8 %77, ptr %79, align 1, !tbaa !6
%80 = trunc nuw i64 %62 to i32
%81 = icmp sgt i32 %80, 1
br i1 %81, label %82, label %101, !llvm.loop !9
82: ; preds = %71
%83 = lshr i32 %3, 24
%84 = add nuw nsw i64 %18, 4294967289
%85 = and i32 %83, 15
%86 = zext nneg i32 %85 to i64
%87 = getelementptr inbounds i8, ptr %14, i64 %86
%88 = load i8, ptr %87, align 1, !tbaa !6
%89 = and i64 %84, 4294967295
%90 = getelementptr inbounds [8 x i8], ptr %2, i64 0, i64 %89
store i8 %88, ptr %90, align 1, !tbaa !6
%91 = trunc nuw i64 %73 to i32
%92 = icmp sgt i32 %91, 1
br i1 %92, label %93, label %101, !llvm.loop !9
93: ; preds = %82
%94 = lshr i32 %3, 28
%95 = add nuw nsw i64 %18, 4294967288
%96 = zext nneg i32 %94 to i64
%97 = getelementptr inbounds i8, ptr %14, i64 %96
%98 = load i8, ptr %97, align 1, !tbaa !6
%99 = and i64 %95, 4294967295
%100 = getelementptr inbounds [8 x i8], ptr %2, i64 0, i64 %99
store i8 %98, ptr %100, align 1, !tbaa !6
br label %101
101: ; preds = %13, %27, %38, %49, %60, %71, %82, %93, %7
%102 = phi i32 [ 0, %7 ], [ %15, %93 ], [ %15, %82 ], [ %15, %71 ], [ %15, %60 ], [ %15, %49 ], [ %15, %38 ], [ %15, %27 ], [ %15, %13 ]
%103 = tail call i32 @llvm.abs.i32(i32 %102, i1 true)
%104 = tail call i32 @llvm.umin.i32(i32 %103, i32 8)
%105 = zext nneg i32 %104 to i64
%106 = call i32 @lua_pushlstring(ptr noundef %0, ptr noundef nonnull %2, i64 noundef %105) #4
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #4
ret i32 1
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @barg(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @lua_isnone(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @lua_pushlstring(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #3
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #3
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| php-src_ext_opcache_jit_dynasm_extr_minilua.c_tohex |
; ModuleID = 'Quake-III-Arena_code_client_extr_cl_cin.c_yuv_to_rgb24.so'
source_filename = "Quake-III-Arena_code_client_extr_cl_cin.c_yuv_to_rgb24.so"
@ROQ_YY_tab = common dso_local global i64 0, align 8
@ROQ_VR_tab = common dso_local global i64 0, align 8
@ROQ_UG_tab = common dso_local global i64 0, align 8
@ROQ_VG_tab = common dso_local global i64 0, align 8
@ROQ_UB_tab = common dso_local global i64 0, align 8
declare dso_local ptr @LittleLong()
define dso_local i64 @yuv_to_rgb24(i64 %arg1, i64 %arg2, i64 %arg3) {
entry:
%memload = load i64, ptr @ROQ_YY_tab, align 1
%memref-idxreg = mul i64 8, %arg1
%memref-basereg = add i64 %memload, %memref-idxreg
%0 = inttoptr i64 %memref-basereg to ptr
%memload1 = load i64, ptr %0, align 1
%memload2 = load i64, ptr @ROQ_VR_tab, align 1
%memref-idxreg3 = mul i64 8, %arg3
%memref-basereg4 = add i64 %memload2, %memref-idxreg3
%1 = inttoptr i64 %memref-basereg4 to ptr
%memload5 = load i64, ptr %1, align 1
%R8 = add nsw i64 %memload5, %memload1
%highbit = and i64 -9223372036854775808, %R8
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %R8, 0
%R89 = lshr i64 %R8, 6
%ZF6 = icmp eq i64 %R89, 0
%highbit7 = and i64 -9223372036854775808, %R89
%SF8 = icmp ne i64 %highbit7, 0
%memload10 = load i64, ptr @ROQ_UG_tab, align 1
%memref-idxreg11 = mul i64 8, %arg2
%memref-basereg12 = add i64 %memload10, %memref-idxreg11
%2 = inttoptr i64 %memref-basereg12 to ptr
%memload13 = load i64, ptr %2, align 1
%RCX = add nsw i64 %memload13, %memload1
%highbit14 = and i64 -9223372036854775808, %RCX
%SF15 = icmp ne i64 %highbit14, 0
%ZF16 = icmp eq i64 %RCX, 0
%memload17 = load i64, ptr @ROQ_VG_tab, align 1
%memref-idxreg18 = mul i64 8, %arg3
%memref-basereg19 = add i64 %memload17, %memref-idxreg18
%3 = inttoptr i64 %memref-basereg19 to ptr
%memload20 = load i64, ptr %3, align 1
%RCX21 = add i64 %RCX, %memload20
%4 = and i64 %RCX21, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
%RCX25 = lshr i64 %RCX21, 6
%ZF22 = icmp eq i64 %RCX25, 0
%highbit23 = and i64 -9223372036854775808, %RCX25
%SF24 = icmp ne i64 %highbit23, 0
%memload26 = load i64, ptr @ROQ_UB_tab, align 1
%memref-idxreg27 = mul i64 8, %arg2
%memref-basereg28 = add i64 %memload26, %memref-idxreg27
%7 = inttoptr i64 %memref-basereg28 to ptr
%memload29 = load i64, ptr %7, align 1
%RDI = add i64 %memload1, %memload29
%8 = and i64 %RDI, 255
%9 = call i64 @llvm.ctpop.i64(i64 %8)
%10 = and i64 %9, 1
%PF30 = icmp eq i64 %10, 0
%RDI34 = lshr i64 %RDI, 6
%ZF31 = icmp eq i64 %RDI34, 0
%highbit32 = and i64 -9223372036854775808, %RDI34
%SF33 = icmp ne i64 %highbit32, 0
%11 = and i64 %R89, %R89
%highbit35 = and i64 -9223372036854775808, %11
%SF36 = icmp ne i64 %highbit35, 0
%ZF37 = icmp eq i64 %11, 0
%12 = and i64 %11, 255
%13 = call i64 @llvm.ctpop.i64(i64 %12)
%14 = and i64 %13, 1
%PF38 = icmp eq i64 %14, 0
%15 = zext i32 0 to i64
%16 = zext i32 0 to i64
%ZFCmp_CMOVLE = icmp eq i1 %ZF37, true
%SFOFCmp_CMOVLE = icmp ne i1 %SF36, false
%Cond_CMOVLE = or i1 %ZFCmp_CMOVLE, %SFOFCmp_CMOVLE
%CMOV = select i1 %Cond_CMOVLE, i64 %16, i64 %R89
%17 = and i64 %RCX25, %RCX25
%highbit39 = and i64 -9223372036854775808, %17
%SF40 = icmp ne i64 %highbit39, 0
%ZF41 = icmp eq i64 %17, 0
%18 = and i64 %17, 255
%19 = call i64 @llvm.ctpop.i64(i64 %18)
%20 = and i64 %19, 1
%PF42 = icmp eq i64 %20, 0
%21 = zext i32 0 to i64
%22 = zext i32 0 to i64
%ZFCmp_CMOVLE43 = icmp eq i1 %ZF41, true
%SFOFCmp_CMOVLE44 = icmp ne i1 %SF40, false
%Cond_CMOVLE45 = or i1 %ZFCmp_CMOVLE43, %SFOFCmp_CMOVLE44
%CMOV46 = select i1 %Cond_CMOVLE45, i64 %22, i64 %RCX25
%23 = and i64 %RDI34, %RDI34
%highbit47 = and i64 -9223372036854775808, %23
%SF48 = icmp ne i64 %highbit47, 0
%ZF49 = icmp eq i64 %23, 0
%24 = and i64 %23, 255
%25 = call i64 @llvm.ctpop.i64(i64 %24)
%26 = and i64 %25, 1
%PF50 = icmp eq i64 %26, 0
%27 = zext i32 0 to i64
%28 = zext i32 0 to i64
%ZFCmp_CMOVLE51 = icmp eq i1 %ZF49, true
%SFOFCmp_CMOVLE52 = icmp ne i1 %SF48, false
%Cond_CMOVLE53 = or i1 %ZFCmp_CMOVLE51, %SFOFCmp_CMOVLE52
%CMOV54 = select i1 %Cond_CMOVLE53, i64 %28, i64 %RDI34
%29 = sub i64 %CMOV, 255
%30 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %CMOV, i64 255)
%CF = extractvalue { i64, i1 } %30, 1
%ZF55 = icmp eq i64 %29, 0
%highbit56 = and i64 -9223372036854775808, %29
%SF57 = icmp ne i64 %highbit56, 0
%31 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %CMOV, i64 255)
%OF = extractvalue { i64, i1 } %31, 1
%32 = and i64 %29, 255
%33 = call i64 @llvm.ctpop.i64(i64 %32)
%34 = and i64 %33, 1
%PF58 = icmp eq i64 %34, 0
%35 = zext i32 255 to i64
%36 = zext i32 255 to i64
%Cond_CMOVAE = icmp eq i1 %CF, false
%CMOV59 = select i1 %Cond_CMOVAE, i64 %36, i64 %CMOV
%37 = sub i64 %CMOV46, 255
%38 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %CMOV46, i64 255)
%CF60 = extractvalue { i64, i1 } %38, 1
%ZF61 = icmp eq i64 %37, 0
%highbit62 = and i64 -9223372036854775808, %37
%SF63 = icmp ne i64 %highbit62, 0
%39 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %CMOV46, i64 255)
%OF64 = extractvalue { i64, i1 } %39, 1
%40 = and i64 %37, 255
%41 = call i64 @llvm.ctpop.i64(i64 %40)
%42 = and i64 %41, 1
%PF65 = icmp eq i64 %42, 0
%43 = zext i32 255 to i64
%44 = zext i32 255 to i64
%Cond_CMOVAE66 = icmp eq i1 %CF60, false
%CMOV67 = select i1 %Cond_CMOVAE66, i64 %44, i64 %CMOV46
%45 = sub i64 %CMOV54, 255
%46 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %CMOV54, i64 255)
%CF68 = extractvalue { i64, i1 } %46, 1
%ZF69 = icmp eq i64 %45, 0
%highbit70 = and i64 -9223372036854775808, %45
%SF71 = icmp ne i64 %highbit70, 0
%47 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %CMOV54, i64 255)
%OF72 = extractvalue { i64, i1 } %47, 1
%48 = and i64 %45, 255
%49 = call i64 @llvm.ctpop.i64(i64 %48)
%50 = and i64 %49, 1
%PF73 = icmp eq i64 %50, 0
%51 = zext i32 255 to i64
%52 = zext i32 255 to i64
%Cond_CMOVAE74 = icmp eq i1 %CF68, false
%CMOV75 = select i1 %Cond_CMOVAE74, i64 %52, i64 %CMOV54
%53 = trunc i64 %CMOV67 to i32
%ECX = shl i32 %53, 8
%ZF76 = icmp eq i32 %ECX, 0
%highbit77 = and i32 -2147483648, %ECX
%SF78 = icmp ne i32 %highbit77, 0
%54 = trunc i64 %CMOV75 to i32
%EDI = shl i32 %54, 16
%ZF79 = icmp eq i32 %EDI, 0
%highbit80 = and i32 -2147483648, %EDI
%SF81 = icmp ne i32 %highbit80, 0
%55 = trunc i64 %CMOV59 to i32
%EDI86 = or i32 %EDI, %55
%highbit82 = and i32 -2147483648, %EDI86
%SF83 = icmp ne i32 %highbit82, 0
%ZF84 = icmp eq i32 %EDI86, 0
%56 = and i32 %EDI86, 255
%57 = call i32 @llvm.ctpop.i32(i32 %56)
%58 = and i32 %57, 1
%PF85 = icmp eq i32 %58, 0
%EDI91 = or i32 %EDI86, %ECX
%highbit87 = and i32 -2147483648, %EDI91
%SF88 = icmp ne i32 %highbit87, 0
%ZF89 = icmp eq i32 %EDI91, 0
%59 = and i32 %EDI91, 255
%60 = call i32 @llvm.ctpop.i32(i32 %59)
%61 = and i32 %60, 1
%PF90 = icmp eq i32 %61, 0
%62 = zext i32 %EDI91 to i64
%RDI96 = or i64 %62, -16777216
%63 = and i64 %RDI96, 255
%64 = call i64 @llvm.ctpop.i64(i64 %63)
%65 = and i64 %64, 1
%PF92 = icmp eq i64 %65, 0
%ZF93 = icmp eq i64 %RDI96, 0
%highbit94 = and i64 -9223372036854775808, %RDI96
%SF95 = icmp ne i64 %highbit94, 0
%66 = tail call ptr @LittleLong()
%RAX = ptrtoint ptr %66 to i64
ret i64 %RAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/Quake-III-Arena/code/client/extr_cl_cin.c_yuv_to_rgb24.c'
source_filename = "AnghaBench/Quake-III-Arena/code/client/extr_cl_cin.c_yuv_to_rgb24.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ROQ_YY_tab = common local_unnamed_addr global ptr null, align 8
@ROQ_VR_tab = common local_unnamed_addr global ptr null, align 8
@ROQ_UG_tab = common local_unnamed_addr global ptr null, align 8
@ROQ_VG_tab = common local_unnamed_addr global ptr null, align 8
@ROQ_UB_tab = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @yuv_to_rgb24], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @yuv_to_rgb24(i64 noundef %0, i64 noundef %1, i64 noundef %2) #0 {
%4 = load ptr, ptr @ROQ_YY_tab, align 8, !tbaa !6
%5 = getelementptr inbounds i64, ptr %4, i64 %0
%6 = load i64, ptr %5, align 8, !tbaa !10
%7 = load ptr, ptr @ROQ_VR_tab, align 8, !tbaa !6
%8 = getelementptr inbounds i64, ptr %7, i64 %2
%9 = load i64, ptr %8, align 8, !tbaa !10
%10 = add nsw i64 %9, %6
%11 = ashr i64 %10, 6
%12 = load ptr, ptr @ROQ_UG_tab, align 8, !tbaa !6
%13 = getelementptr inbounds i64, ptr %12, i64 %1
%14 = load i64, ptr %13, align 8, !tbaa !10
%15 = add nsw i64 %14, %6
%16 = load ptr, ptr @ROQ_VG_tab, align 8, !tbaa !6
%17 = getelementptr inbounds i64, ptr %16, i64 %2
%18 = load i64, ptr %17, align 8, !tbaa !10
%19 = add nsw i64 %15, %18
%20 = ashr i64 %19, 6
%21 = load ptr, ptr @ROQ_UB_tab, align 8, !tbaa !6
%22 = getelementptr inbounds i64, ptr %21, i64 %1
%23 = load i64, ptr %22, align 8, !tbaa !10
%24 = add nsw i64 %23, %6
%25 = ashr i64 %24, 6
%26 = tail call i64 @llvm.smax.i64(i64 %11, i64 0)
%27 = tail call i64 @llvm.smax.i64(i64 %20, i64 0)
%28 = tail call i64 @llvm.smax.i64(i64 %25, i64 0)
%29 = tail call i64 @llvm.umin.i64(i64 %26, i64 255)
%30 = tail call i64 @llvm.umin.i64(i64 %27, i64 255)
%31 = tail call i64 @llvm.umin.i64(i64 %28, i64 255)
%32 = shl nuw nsw i64 %30, 8
%33 = or disjoint i64 %32, %29
%34 = shl nuw nsw i64 %31, 16
%35 = or disjoint i64 %34, %33
%36 = or disjoint i64 %35, -16777216
%37 = tail call i32 @LittleLong(i64 noundef %36) #3
ret i32 %37
}
declare i32 @LittleLong(i64 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.smax.i64(i64, i64) #2
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umin.i64(i64, i64) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
| Quake-III-Arena_code_client_extr_cl_cin.c_yuv_to_rgb24 |
End of preview. Expand in Data Studio
README.md exists but content is empty.
- Downloads last month
- 9
Size of downloaded dataset files:
650 MB
Size of the auto-converted Parquet files:
650 MB
Number of rows:
331,646