IR_x86 stringlengths 97 228k | IR_arm stringlengths 544 250k | filename stringlengths 17 187 |
|---|---|---|
; ModuleID = 'linux_net_9p_extr_trans_rdma.c_qp_event_handler.so'
source_filename = "linux_net_9p_extr_trans_rdma.c_qp_event_handler.so"
@P9_DEBUG_ERROR = common dso_local global i32 0, align 4
@rodata_13 = private unnamed_addr constant [24 x i8] c"QP event %d context %p\0A\00", align 1, !ROData_SecInfo !0
declare dso_local ptr @p9_debug()
define dso_local i64 @qp_event_handler(i64 %arg1, i64 %arg2) {
entry:
%memload = load i32, ptr @P9_DEBUG_ERROR, align 1
%0 = inttoptr i64 %arg1 to ptr
%memload1 = load i32, ptr %0, align 1
%RSI = ptrtoint ptr @rodata_13 to i64
%1 = tail call ptr @p9_debug()
%RAX = ptrtoint ptr %1 to i64
ret i64 %RAX
}
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/linux/net/9p/extr_trans_rdma.c_qp_event_handler.c'
source_filename = "AnghaBench/linux/net/9p/extr_trans_rdma.c_qp_event_handler.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@P9_DEBUG_ERROR = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [24 x i8] c"QP event %d context %p\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @qp_event_handler], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @qp_event_handler(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = load i32, ptr @P9_DEBUG_ERROR, align 4, !tbaa !6
%4 = load i32, ptr %0, align 4, !tbaa !10
%5 = tail call i32 @p9_debug(i32 noundef %3, ptr noundef nonnull @.str, i32 noundef %4, ptr noundef %1) #2
ret void
}
declare i32 @p9_debug(i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"ib_event", !7, i64 0}
| linux_net_9p_extr_trans_rdma.c_qp_event_handler |
; ModuleID = 'freebsd_sys_sparc64_sparc64_extr_autoconf.c_configure_first.so'
source_filename = "freebsd_sys_sparc64_sparc64_extr_autoconf.c_configure_first.so"
@root_bus = common dso_local global i32 0, align 4
@rodata_13 = private unnamed_addr constant [6 x i8] c"nexus\00", align 1, !ROData_SecInfo !0
@nexusdev = common dso_local global i32 0, align 4
declare dso_local ptr @device_add_child()
define dso_local i64 @configure_first() {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%memload = load i32, ptr @root_bus, align 1
%RSI = ptrtoint ptr @rodata_13 to i64
%0 = call ptr @device_add_child()
%RAX = ptrtoint ptr %0 to i64
%1 = trunc i64 %RAX to i32
store i32 %1, ptr @nexusdev, align 1
ret i64 %RAX
}
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/freebsd/sys/sparc64/sparc64/extr_autoconf.c_configure_first.c'
source_filename = "AnghaBench/freebsd/sys/sparc64/sparc64/extr_autoconf.c_configure_first.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@root_bus = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [6 x i8] c"nexus\00", align 1
@nexusdev = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @configure_first], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @configure_first(ptr nocapture readnone %0) #0 {
%2 = load i32, ptr @root_bus, align 4, !tbaa !6
%3 = tail call i32 @device_add_child(i32 noundef %2, ptr noundef nonnull @.str, i32 noundef 0) #2
store i32 %3, ptr @nexusdev, align 4, !tbaa !6
ret void
}
declare i32 @device_add_child(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_sparc64_sparc64_extr_autoconf.c_configure_first |
; ModuleID = 'linux_drivers_usb_chipidea_extr_core.c_ci_get_otg_capable.so'
source_filename = "linux_drivers_usb_chipidea_extr_core.c_ci_get_otg_capable.so"
@CI_HDRC_DUAL_ROLE_NOT_OTG = common dso_local global i32 0, align 4
@CAP_DCCPARAMS = common dso_local global i32 0, align 4
@DCCPARAMS_DC = common dso_local global i32 0, align 4
@DCCPARAMS_HC = common dso_local global i32 0, align 4
@rodata_13 = private unnamed_addr constant [30 x i8] c"It is OTG capable controller\0A\00", align 1, !ROData_SecInfo !0
@OTGSC_INT_EN_BITS = common dso_local global i32 0, align 4
@OTGSC_INT_STATUS_BITS = common dso_local global i32 0, align 4
declare dso_local ptr @hw_read()
declare dso_local ptr @dev_dbg()
declare dso_local ptr @hw_write_otgsc()
define dso_local i64 @ci_get_otg_capable(i64 %arg1) {
entry:
%RAX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memref-disp = add i64 %arg1, 8
%0 = inttoptr i64 %memref-disp to ptr
%memload = load i64, ptr %0, align 1
%memload1 = load i32, ptr @CI_HDRC_DUAL_ROLE_NOT_OTG, align 1
%1 = inttoptr i64 %memload to ptr
%2 = load i32, ptr %1, align 1
%3 = zext i32 %2 to i64
%4 = zext i32 %memload1 to i64
%5 = and i64 %3, %4
%ZF = icmp eq i64 %5, 0
%highbit = and i64 -9223372036854775808, %5
%SF = icmp ne i64 %highbit, 0
%6 = and i64 %5, 255
%7 = call i64 @llvm.ctpop.i64(i64 %6)
%8 = and i64 %7, 1
%PF = icmp eq i64 %8, 0
store i64 %memload, ptr %RAX-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%9 = inttoptr i64 %arg1 to ptr
store i32 0, ptr %9, align 1
br label %bb.4
bb.2: ; preds = %entry
%memload2 = load i32, ptr @CAP_DCCPARAMS, align 1
%memload3 = load i32, ptr @DCCPARAMS_HC, align 1
%memload4 = load i32, ptr @DCCPARAMS_DC, align 1
%EDX = or i32 %memload3, %memload4
%10 = and i32 %EDX, 255
%11 = call i32 @llvm.ctpop.i32(i32 %10)
%12 = and i32 %11, 1
%PF5 = icmp eq i32 %12, 0
%13 = call ptr @hw_read()
%RAX = ptrtoint ptr %13 to i64
%memload6 = load i32, ptr @DCCPARAMS_HC, align 1
%memload7 = load i32, ptr @DCCPARAMS_DC, align 1
%ECX = or i32 %memload6, %memload7
%14 = and i32 %ECX, 255
%15 = call i32 @llvm.ctpop.i32(i32 %14)
%16 = and i32 %15, 1
%PF8 = icmp eq i32 %16, 0
%17 = trunc i64 %RAX to i32
%18 = sub i32 %17, %ECX
%19 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %17, i32 %ECX)
%CF = extractvalue { i32, i1 } %19, 1
%ZF9 = icmp eq i32 %18, 0
%highbit10 = and i32 -2147483648, %18
%SF11 = icmp ne i32 %highbit10, 0
%20 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %17, i32 %ECX)
%OF = extractvalue { i32, i1 } %20, 1
%21 = and i32 %18, 255
%22 = call i32 @llvm.ctpop.i32(i32 %21)
%23 = and i32 %22, 1
%PF12 = icmp eq i32 %23, 0
%DL = icmp eq i1 %ZF9, true
%24 = zext i1 %DL to i32
%25 = inttoptr i64 %arg1 to ptr
store i32 %24, ptr %25, align 1
store i64 %RAX, ptr %RAX-SKT-LOC, align 1
%CmpZF_JNE = icmp eq i1 %ZF9, false
br i1 %CmpZF_JNE, label %bb.4, label %bb.3
bb.3: ; preds = %bb.2
%memref-disp13 = add i64 %arg1, 4
%26 = inttoptr i64 %memref-disp13 to ptr
%memload14 = load i32, ptr %26, align 1
%RSI = ptrtoint ptr @rodata_13 to i64
%27 = call ptr @dev_dbg()
%RAX15 = ptrtoint ptr %27 to i64
%memload16 = load i32, ptr @OTGSC_INT_STATUS_BITS, align 1
%memload17 = load i32, ptr @OTGSC_INT_EN_BITS, align 1
%ESI = or i32 %memload17, %memload16
%highbit18 = and i32 -2147483648, %ESI
%SF19 = icmp ne i32 %highbit18, 0
%ZF20 = icmp eq i32 %ESI, 0
%28 = and i32 %ESI, 255
%29 = call i32 @llvm.ctpop.i32(i32 %28)
%30 = and i32 %29, 1
%PF21 = icmp eq i32 %30, 0
%31 = tail call ptr @hw_write_otgsc()
%RAX22 = ptrtoint ptr %31 to i64
br label %UnifiedReturnBlock
bb.4: ; preds = %bb.2, %bb.1
%RAX1 = load i64, ptr %RAX-SKT-LOC, align 1
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.4, %bb.3
%UnifiedRetVal = phi i64 [ %RAX22, %bb.3 ], [ %RAX1, %bb.4 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/chipidea/extr_core.c_ci_get_otg_capable.c'
source_filename = "AnghaBench/linux/drivers/usb/chipidea/extr_core.c_ci_get_otg_capable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CI_HDRC_DUAL_ROLE_NOT_OTG = common local_unnamed_addr global i32 0, align 4
@CAP_DCCPARAMS = common local_unnamed_addr global i32 0, align 4
@DCCPARAMS_DC = common local_unnamed_addr global i32 0, align 4
@DCCPARAMS_HC = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [30 x i8] c"It is OTG capable controller\0A\00", align 1
@OTGSC_INT_EN_BITS = common local_unnamed_addr global i32 0, align 4
@OTGSC_INT_STATUS_BITS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ci_get_otg_capable], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ci_get_otg_capable(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load i32, ptr %3, align 4, !tbaa !12
%5 = load i32, ptr @CI_HDRC_DUAL_ROLE_NOT_OTG, align 4, !tbaa !14
%6 = and i32 %5, %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %9, label %8
8: ; preds = %1
store i32 0, ptr %0, align 8, !tbaa !15
br label %28
9: ; preds = %1
%10 = load i32, ptr @CAP_DCCPARAMS, align 4, !tbaa !14
%11 = load i32, ptr @DCCPARAMS_DC, align 4, !tbaa !14
%12 = load i32, ptr @DCCPARAMS_HC, align 4, !tbaa !14
%13 = or i32 %12, %11
%14 = tail call i32 @hw_read(ptr noundef nonnull %0, i32 noundef %10, i32 noundef %13) #2
%15 = load i32, ptr @DCCPARAMS_DC, align 4, !tbaa !14
%16 = load i32, ptr @DCCPARAMS_HC, align 4, !tbaa !14
%17 = or i32 %16, %15
%18 = icmp eq i32 %14, %17
%19 = zext i1 %18 to i32
store i32 %19, ptr %0, align 8, !tbaa !15
br i1 %18, label %20, label %28
20: ; preds = %9
%21 = getelementptr inbounds i8, ptr %0, i64 4
%22 = load i32, ptr %21, align 4, !tbaa !16
%23 = tail call i32 @dev_dbg(i32 noundef %22, ptr noundef nonnull @.str) #2
%24 = load i32, ptr @OTGSC_INT_EN_BITS, align 4, !tbaa !14
%25 = load i32, ptr @OTGSC_INT_STATUS_BITS, align 4, !tbaa !14
%26 = or i32 %25, %24
%27 = tail call i32 @hw_write_otgsc(ptr noundef nonnull %0, i32 noundef %26, i32 noundef %25) #2
br label %28
28: ; preds = %8, %20, %9
ret void
}
declare i32 @hw_read(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_dbg(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @hw_write_otgsc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"ci_hdrc", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"TYPE_2__", !8, i64 0}
!14 = !{!8, !8, i64 0}
!15 = !{!7, !8, i64 0}
!16 = !{!7, !8, i64 4}
| linux_drivers_usb_chipidea_extr_core.c_ci_get_otg_capable |
; ModuleID = 'linux_drivers_gpu_drm_scheduler_extr_sched_entity.c_drm_sched_entity_flush.so'
source_filename = "linux_drivers_gpu_drm_scheduler_extr_sched_entity.c_drm_sched_entity_flush.so"
@current = common dso_local global i64 0, align 8
@PF_EXITING = common dso_local global i32 0, align 4
@SIGKILL = common dso_local global i64 0, align 8
declare dso_local ptr @drm_sched_entity_is_idle()
declare dso_local ptr @wait_event_timeout()
declare dso_local ptr @wait_event_killable()
declare dso_local ptr @cmpxchg()
declare dso_local ptr @spin_lock()
declare dso_local ptr @drm_sched_rq_remove_entity()
declare dso_local ptr @spin_unlock()
define dso_local i64 @drm_sched_entity_flush(i64 %arg1, i64 %arg2) {
entry:
%R14-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memref-disp = add i64 %arg1, 8
%0 = inttoptr i64 %memref-disp to ptr
%memload = load i64, ptr %0, align 1
%1 = and i64 %memload, %memload
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %1, 0
%2 = and i64 %1, 255
%3 = call i64 @llvm.ctpop.i64(i64 %2)
%4 = and i64 %3, 1
%PF = icmp eq i64 %4, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%5 = inttoptr i64 %memload to ptr
%memload1 = load i64, ptr %5, align 1
%memload2 = load i64, ptr @current, align 1
%memload3 = load i32, ptr @PF_EXITING, align 1
%6 = inttoptr i64 %memload2 to ptr
%7 = load i32, ptr %6, align 1
%8 = zext i32 %7 to i64
%9 = zext i32 %memload3 to i64
%10 = and i64 %8, %9
%ZF4 = icmp eq i64 %10, 0
%highbit5 = and i64 -9223372036854775808, %10
%SF6 = icmp ne i64 %highbit5, 0
%11 = and i64 %10, 255
%12 = call i64 @llvm.ctpop.i64(i64 %11)
%13 = and i64 %12, 1
%PF7 = icmp eq i64 %13, 0
store i64 %arg2, ptr %R14-SKT-LOC, align 1
%CmpZF_JE52 = icmp eq i1 %ZF4, true
br i1 %CmpZF_JE52, label %bb.5, label %bb.2
bb.2: ; preds = %bb.1
%14 = and i64 %arg2, %arg2
%highbit8 = and i64 -9223372036854775808, %14
%SF9 = icmp ne i64 %highbit8, 0
%ZF10 = icmp eq i64 %14, 0
%15 = and i64 %14, 255
%16 = call i64 @llvm.ctpop.i64(i64 %15)
%17 = and i64 %16, 1
%PF11 = icmp eq i64 %17, 0
%CmpZF_JE53 = icmp eq i1 %ZF10, true
br i1 %CmpZF_JE53, label %bb.6, label %bb.3
bb.3: ; preds = %bb.2
%18 = inttoptr i64 %memload1 to ptr
%memload12 = load i32, ptr %18, align 1
%19 = call ptr @drm_sched_entity_is_idle()
%RAX = ptrtoint ptr %19 to i64
%ESI = trunc i64 %RAX to i32
%20 = call ptr @wait_event_timeout()
%RAX13 = ptrtoint ptr %20 to i64
store i64 %RAX13, ptr %R14-SKT-LOC, align 1
br label %bb.7
bb.6: ; preds = %bb.2
%21 = zext i32 0 to i64
store i64 %21, ptr %R14-SKT-LOC, align 1
br label %bb.7
bb.5: ; preds = %bb.1
%22 = inttoptr i64 %memload1 to ptr
%memload14 = load i32, ptr %22, align 1
%23 = call ptr @drm_sched_entity_is_idle()
%RAX15 = ptrtoint ptr %23 to i64
%ESI16 = trunc i64 %RAX15 to i32
%24 = call ptr @wait_event_killable()
%RAX17 = ptrtoint ptr %24 to i64
br label %bb.7
bb.7: ; preds = %bb.6, %bb.5, %bb.3
%memref-disp18 = add i64 %arg1, 16
%memload19 = load i64, ptr @current, align 1
%memref-disp20 = add i64 %memload19, 16
%25 = inttoptr i64 %memref-disp20 to ptr
%memload21 = load i64, ptr %25, align 1
%26 = call ptr @cmpxchg()
%RAX22 = ptrtoint ptr %26 to i64
%memload23 = load i64, ptr @current, align 1
%27 = and i64 %RAX22, %RAX22
%highbit24 = and i64 -9223372036854775808, %27
%SF25 = icmp ne i64 %highbit24, 0
%ZF26 = icmp eq i64 %27, 0
%28 = and i64 %27, 255
%29 = call i64 @llvm.ctpop.i64(i64 %28)
%30 = and i64 %29, 1
%PF27 = icmp eq i64 %30, 0
%CmpZF_JE54 = icmp eq i1 %ZF26, true
br i1 %CmpZF_JE54, label %bb.9, label %bb.8
bb.8: ; preds = %bb.7
%memref-disp28 = add i64 %memload23, 16
%31 = inttoptr i64 %memref-disp28 to ptr
%32 = load i64, ptr %31, align 1
%33 = sub i64 %RAX22, %32
%34 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RAX22, i64 %32)
%CF = extractvalue { i64, i1 } %34, 1
%ZF29 = icmp eq i64 %33, 0
%highbit30 = and i64 -9223372036854775808, %33
%SF31 = icmp ne i64 %highbit30, 0
%35 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RAX22, i64 %32)
%OF = extractvalue { i64, i1 } %35, 1
%36 = and i64 %33, 255
%37 = call i64 @llvm.ctpop.i64(i64 %36)
%38 = and i64 %37, 1
%PF32 = icmp eq i64 %38, 0
%CmpZF_JNE = icmp eq i1 %ZF29, false
br i1 %CmpZF_JNE, label %bb.12, label %bb.9
bb.9: ; preds = %bb.8, %bb.7
%memload33 = load i32, ptr @PF_EXITING, align 1
%39 = inttoptr i64 %memload23 to ptr
%40 = load i32, ptr %39, align 1
%41 = zext i32 %40 to i64
%42 = zext i32 %memload33 to i64
%43 = and i64 %41, %42
%ZF34 = icmp eq i64 %43, 0
%highbit35 = and i64 -9223372036854775808, %43
%SF36 = icmp ne i64 %highbit35, 0
%44 = and i64 %43, 255
%45 = call i64 @llvm.ctpop.i64(i64 %44)
%46 = and i64 %45, 1
%PF37 = icmp eq i64 %46, 0
%CmpZF_JE55 = icmp eq i1 %ZF34, true
br i1 %CmpZF_JE55, label %bb.12, label %bb.10
bb.10: ; preds = %bb.9
%memref-disp38 = add i64 %memload23, 8
%47 = inttoptr i64 %memref-disp38 to ptr
%memload39 = load i64, ptr %47, align 1
%48 = load i64, ptr @SIGKILL, align 8
%49 = sub i64 %memload39, %48
%50 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload39, i64 %48)
%CF40 = extractvalue { i64, i1 } %50, 1
%ZF41 = icmp eq i64 %49, 0
%highbit42 = and i64 -9223372036854775808, %49
%SF43 = icmp ne i64 %highbit42, 0
%51 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload39, i64 %48)
%OF44 = extractvalue { i64, i1 } %51, 1
%52 = and i64 %49, 255
%53 = call i64 @llvm.ctpop.i64(i64 %52)
%54 = and i64 %53, 1
%PF45 = icmp eq i64 %54, 0
%CmpZF_JNE56 = icmp eq i1 %ZF41, false
br i1 %CmpZF_JNE56, label %bb.12, label %bb.11
bb.11: ; preds = %bb.10
%memref-disp46 = add i64 %arg1, 4
%55 = call ptr @spin_lock()
%RAX47 = ptrtoint ptr %55 to i64
%56 = inttoptr i64 %arg1 to ptr
store i32 1, ptr %56, align 1
%memref-disp48 = add i64 %arg1, 8
%57 = inttoptr i64 %memref-disp48 to ptr
%memload49 = load i64, ptr %57, align 1
%58 = call ptr @drm_sched_rq_remove_entity()
%RAX50 = ptrtoint ptr %58 to i64
%59 = call ptr @spin_unlock()
%RAX51 = ptrtoint ptr %59 to i64
br label %bb.12
bb.4: ; preds = %entry
%60 = zext i32 0 to i64
store i64 %60, ptr %R14-SKT-LOC, align 1
br label %bb.12
bb.12: ; preds = %bb.11, %bb.4, %bb.10, %bb.9, %bb.8
%R14 = load i64, ptr %R14-SKT-LOC, align 1
ret i64 %R14
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/scheduler/extr_sched_entity.c_drm_sched_entity_flush.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/scheduler/extr_sched_entity.c_drm_sched_entity_flush.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@current = common local_unnamed_addr global ptr null, align 8
@PF_EXITING = common local_unnamed_addr global i32 0, align 4
@SIGKILL = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @drm_sched_entity_flush(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = icmp eq ptr %4, null
br i1 %5, label %52, label %6
6: ; preds = %2
%7 = load ptr, ptr %4, align 8, !tbaa !12
%8 = load ptr, ptr @current, align 8, !tbaa !14
%9 = load i32, ptr %8, align 8, !tbaa !15
%10 = load i32, ptr @PF_EXITING, align 4, !tbaa !18
%11 = and i32 %10, %9
%12 = icmp eq i32 %11, 0
br i1 %12, label %19, label %13
13: ; preds = %6
%14 = icmp eq i64 %1, 0
br i1 %14, label %23, label %15
15: ; preds = %13
%16 = load i32, ptr %7, align 4, !tbaa !19
%17 = tail call i32 @drm_sched_entity_is_idle(ptr noundef nonnull %0) #2
%18 = tail call i64 @wait_event_timeout(i32 noundef %16, i32 noundef %17, i64 noundef %1) #2
br label %23
19: ; preds = %6
%20 = load i32, ptr %7, align 4, !tbaa !19
%21 = tail call i32 @drm_sched_entity_is_idle(ptr noundef nonnull %0) #2
%22 = tail call i32 @wait_event_killable(i32 noundef %20, i32 noundef %21) #2
br label %23
23: ; preds = %13, %15, %19
%24 = phi i64 [ %18, %15 ], [ 0, %13 ], [ %1, %19 ]
%25 = getelementptr inbounds i8, ptr %0, i64 16
%26 = load ptr, ptr @current, align 8, !tbaa !14
%27 = getelementptr inbounds i8, ptr %26, i64 16
%28 = load ptr, ptr %27, align 8, !tbaa !21
%29 = tail call ptr @cmpxchg(ptr noundef nonnull %25, ptr noundef %28, ptr noundef null) #2
%30 = icmp eq ptr %29, null
%31 = load ptr, ptr @current, align 8, !tbaa !14
br i1 %30, label %36, label %32
32: ; preds = %23
%33 = getelementptr inbounds i8, ptr %31, i64 16
%34 = load ptr, ptr %33, align 8, !tbaa !21
%35 = icmp eq ptr %29, %34
br i1 %35, label %36, label %52
36: ; preds = %32, %23
%37 = load i32, ptr %31, align 8, !tbaa !15
%38 = load i32, ptr @PF_EXITING, align 4, !tbaa !18
%39 = and i32 %38, %37
%40 = icmp eq i32 %39, 0
br i1 %40, label %52, label %41
41: ; preds = %36
%42 = getelementptr inbounds i8, ptr %31, i64 8
%43 = load i64, ptr %42, align 8, !tbaa !22
%44 = load i64, ptr @SIGKILL, align 8, !tbaa !23
%45 = icmp eq i64 %43, %44
br i1 %45, label %46, label %52
46: ; preds = %41
%47 = getelementptr inbounds i8, ptr %0, i64 4
%48 = tail call i32 @spin_lock(ptr noundef nonnull %47) #2
store i32 1, ptr %0, align 8, !tbaa !24
%49 = load ptr, ptr %3, align 8, !tbaa !6
%50 = tail call i32 @drm_sched_rq_remove_entity(ptr noundef %49, ptr noundef nonnull %0) #2
%51 = tail call i32 @spin_unlock(ptr noundef nonnull %47) #2
br label %52
52: ; preds = %32, %36, %41, %46, %2
%53 = phi i64 [ 0, %2 ], [ %24, %46 ], [ %24, %41 ], [ %24, %36 ], [ %24, %32 ]
ret i64 %53
}
declare i64 @wait_event_timeout(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @drm_sched_entity_is_idle(ptr noundef) local_unnamed_addr #1
declare i32 @wait_event_killable(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @cmpxchg(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @drm_sched_rq_remove_entity(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"drm_sched_entity", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_3__", !11, i64 0}
!14 = !{!11, !11, i64 0}
!15 = !{!16, !8, i64 0}
!16 = !{!"TYPE_4__", !8, i64 0, !17, i64 8, !11, i64 16}
!17 = !{!"long", !9, i64 0}
!18 = !{!8, !8, i64 0}
!19 = !{!20, !8, i64 0}
!20 = !{!"drm_gpu_scheduler", !8, i64 0}
!21 = !{!16, !11, i64 16}
!22 = !{!16, !17, i64 8}
!23 = !{!17, !17, i64 0}
!24 = !{!7, !8, i64 0}
| linux_drivers_gpu_drm_scheduler_extr_sched_entity.c_drm_sched_entity_flush |
; ModuleID = 'fastsocket_kernel_drivers_net_extr_au1000_eth.c_GetFreeDB.so'
source_filename = "fastsocket_kernel_drivers_net_extr_au1000_eth.c_GetFreeDB.so"
define dso_local i64 @GetFreeDB(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%1 = and i64 %memload, %memload
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %1, 0
%2 = and i64 %1, 255
%3 = call i64 @llvm.ctpop.i64(i64 %2)
%4 = and i64 %3, 1
%PF = icmp eq i64 %4, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%5 = inttoptr i64 %memload to ptr
%memload1 = load i64, ptr %5, align 1
%6 = inttoptr i64 %arg1 to ptr
store i64 %memload1, ptr %6, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %entry
ret i64 %memload
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_au1000_eth.c_GetFreeDB.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_au1000_eth.c_GetFreeDB.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @GetFreeDB], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal ptr @GetFreeDB(ptr nocapture noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = icmp eq ptr %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = load ptr, ptr %2, align 8, !tbaa !11
store ptr %5, ptr %0, align 8, !tbaa !6
br label %6
6: ; preds = %4, %1
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"au1000_private", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_3__", !8, i64 0}
| fastsocket_kernel_drivers_net_extr_au1000_eth.c_GetFreeDB |
; ModuleID = 'linux_sound_soc_img_extr_img-spdif-in.c_img_spdif_in_runtime_resume.so'
source_filename = "linux_sound_soc_img_extr_img-spdif-in.c_img_spdif_in_runtime_resume.so"
@rodata_13 = private unnamed_addr constant [28 x i8] c"Unable to enable sys clock\0A\00", align 1, !ROData_SecInfo !0
declare dso_local ptr @dev_get_drvdata()
declare dso_local ptr @clk_prepare_enable()
declare dso_local ptr @dev_err()
define dso_local i32 @img_spdif_in_runtime_resume(i64 %arg1) {
entry:
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%1 = call ptr @dev_get_drvdata()
%memload = load i32, ptr %1, align 1
%2 = call ptr @clk_prepare_enable()
%RAX1 = ptrtoint ptr %2 to i64
%EBP = trunc i64 %RAX1 to i32
%3 = trunc i64 %RAX1 to i32
%4 = trunc i64 %RAX1 to i32
%5 = and i32 %3, %4
%highbit = and i32 -2147483648, %5
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %5, 0
%6 = and i32 %5, 255
%7 = call i32 @llvm.ctpop.i32(i32 %6)
%8 = and i32 %7, 1
%PF = icmp eq i32 %8, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%RSI = ptrtoint ptr @rodata_13 to i64
%9 = call ptr @dev_err()
%RAX2 = ptrtoint ptr %9 to i64
br label %bb.2
bb.2: ; preds = %bb.1, %entry
ret i32 %EBP
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/linux/sound/soc/img/extr_img-spdif-in.c_img_spdif_in_runtime_resume.c'
source_filename = "AnghaBench/linux/sound/soc/img/extr_img-spdif-in.c_img_spdif_in_runtime_resume.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [28 x i8] c"Unable to enable sys clock\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @img_spdif_in_runtime_resume], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @img_spdif_in_runtime_resume(ptr noundef %0) #0 {
%2 = tail call ptr @dev_get_drvdata(ptr noundef %0) #2
%3 = load i32, ptr %2, align 4, !tbaa !6
%4 = tail call i32 @clk_prepare_enable(i32 noundef %3) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str) #2
br label %8
8: ; preds = %1, %6
ret i32 %4
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @clk_prepare_enable(i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"img_spdif_in", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_sound_soc_img_extr_img-spdif-in.c_img_spdif_in_runtime_resume |
; ModuleID = 'mjolnir_Mjolnir_lua_extr_liolib.c_io_output.so'
source_filename = "mjolnir_Mjolnir_lua_extr_liolib.c_io_output.so"
@IO_OUTPUT = common dso_local global i32 0, align 4
@rodata_13 = private unnamed_addr constant [2 x i8] c"w\00", align 1, !ROData_SecInfo !0
declare dso_local ptr @g_iofile()
define dso_local i64 @io_output() {
entry:
%memload = load i32, ptr @IO_OUTPUT, align 1
%RDX = ptrtoint ptr @rodata_13 to i64
%0 = tail call ptr @g_iofile()
%RAX = ptrtoint ptr %0 to i64
ret i64 %RAX
}
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/mjolnir/Mjolnir/lua/extr_liolib.c_io_output.c'
source_filename = "AnghaBench/mjolnir/Mjolnir/lua/extr_liolib.c_io_output.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IO_OUTPUT = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [2 x i8] c"w\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @io_output], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @io_output(ptr noundef %0) #0 {
%2 = load i32, ptr @IO_OUTPUT, align 4, !tbaa !6
%3 = tail call i32 @g_iofile(ptr noundef %0, i32 noundef %2, ptr noundef nonnull @.str) #2
ret i32 %3
}
declare i32 @g_iofile(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| mjolnir_Mjolnir_lua_extr_liolib.c_io_output |
; ModuleID = 'openssl_crypto_bio_extr_bss_dgram.c_BIO_s_datagram_sctp.so'
source_filename = "openssl_crypto_bio_extr_bss_dgram.c_BIO_s_datagram_sctp.so"
@methods_dgramp_sctp = dso_local global i32 0, align 4
define dso_local i64 @BIO_s_datagram_sctp() {
entry:
%0 = ptrtoint ptr @methods_dgramp_sctp to i64
ret i64 %0
}
| ; ModuleID = 'AnghaBench/openssl/crypto/bio/extr_bss_dgram.c_BIO_s_datagram_sctp.c'
source_filename = "AnghaBench/openssl/crypto/bio/extr_bss_dgram.c_BIO_s_datagram_sctp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@methods_dgramp_sctp = common global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef nonnull ptr @BIO_s_datagram_sctp() local_unnamed_addr #0 {
ret ptr @methods_dgramp_sctp
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| openssl_crypto_bio_extr_bss_dgram.c_BIO_s_datagram_sctp |
; ModuleID = 'fastsocket_kernel_drivers_input_tablet_extr_wacom_sys.c_input_dev_g.so'
source_filename = "fastsocket_kernel_drivers_input_tablet_extr_wacom_sys.c_input_dev_g.so"
@EV_REL = common dso_local global i32 0, align 4
@REL_WHEEL = common dso_local global i32 0, align 4
@BTN_LEFT = common dso_local global i32 0, align 4
@BTN_RIGHT = common dso_local global i32 0, align 4
@BTN_MIDDLE = common dso_local global i32 0, align 4
@BTN_MOUSE = common dso_local global i32 0, align 4
@BTN_TOOL_RUBBER = common dso_local global i32 0, align 4
@BTN_TOOL_PEN = common dso_local global i32 0, align 4
@BTN_STYLUS = common dso_local global i32 0, align 4
@BTN_TOOL_MOUSE = common dso_local global i32 0, align 4
@BTN_STYLUS2 = common dso_local global i32 0, align 4
@BTN_DIGI = common dso_local global i32 0, align 4
@ABS_DISTANCE = common dso_local global i32 0, align 4
declare dso_local ptr @BIT_MASK()
declare dso_local ptr @BIT_WORD()
declare dso_local ptr @input_set_abs_params()
define dso_local i64 @input_dev_g(i64 %arg1, i64 %arg2) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%memload = load i32, ptr @EV_REL, align 1
%0 = call ptr @BIT_MASK()
%RAX = ptrtoint ptr %0 to i64
%1 = inttoptr i64 %arg1 to ptr
%memload1 = load i64, ptr %1, align 1
%2 = trunc i64 %RAX to i32
%3 = inttoptr i64 %memload1 to ptr
%4 = load i32, ptr %3, align 1
%5 = or i32 %4, %2
%6 = and i32 %5, 255
%7 = call i32 @llvm.ctpop.i32(i32 %6)
%8 = and i32 %7, 1
%PF = icmp eq i32 %8, 0
store i32 %5, ptr %3, align 1
%memload2 = load i32, ptr @REL_WHEEL, align 1
%9 = call ptr @BIT_MASK()
%RAX3 = ptrtoint ptr %9 to i64
%memref-disp = add i64 %arg1, 8
%10 = inttoptr i64 %memref-disp to ptr
%memload4 = load i64, ptr %10, align 1
%11 = trunc i64 %RAX3 to i32
%12 = inttoptr i64 %memload4 to ptr
%13 = load i32, ptr %12, align 1
%14 = or i32 %13, %11
%15 = and i32 %14, 255
%16 = call i32 @llvm.ctpop.i32(i32 %15)
%17 = and i32 %16, 1
%PF5 = icmp eq i32 %17, 0
store i32 %14, ptr %12, align 1
%memload6 = load i32, ptr @BTN_LEFT, align 1
%18 = call ptr @BIT_MASK()
%RAX7 = ptrtoint ptr %18 to i64
%EBP = trunc i64 %RAX7 to i32
%memload8 = load i32, ptr @BTN_RIGHT, align 1
%19 = call ptr @BIT_MASK()
%RAX9 = ptrtoint ptr %19 to i64
%EBX = trunc i64 %RAX9 to i32
%EBX11 = or i32 %EBX, %EBP
%highbit = and i32 -2147483648, %EBX11
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %EBX11, 0
%20 = and i32 %EBX11, 255
%21 = call i32 @llvm.ctpop.i32(i32 %20)
%22 = and i32 %21, 1
%PF10 = icmp eq i32 %22, 0
%memload12 = load i32, ptr @BTN_MIDDLE, align 1
%23 = call ptr @BIT_MASK()
%RAX13 = ptrtoint ptr %23 to i64
%EBP14 = trunc i64 %RAX13 to i32
%EBP19 = or i32 %EBP14, %EBX11
%highbit15 = and i32 -2147483648, %EBP19
%SF16 = icmp ne i32 %highbit15, 0
%ZF17 = icmp eq i32 %EBP19, 0
%24 = and i32 %EBP19, 255
%25 = call i32 @llvm.ctpop.i32(i32 %24)
%26 = and i32 %25, 1
%PF18 = icmp eq i32 %26, 0
%memref-disp20 = add i64 %arg1, 16
%27 = inttoptr i64 %memref-disp20 to ptr
%memload21 = load i64, ptr %27, align 1
%memload22 = load i32, ptr @BTN_MOUSE, align 1
%28 = call ptr @BIT_WORD()
%RAX23 = ptrtoint ptr %28 to i64
%memref-idxreg = mul i64 4, %RAX23
%memref-basereg = add i64 %memload21, %memref-idxreg
%29 = inttoptr i64 %memref-basereg to ptr
%30 = load i32, ptr %29, align 1
%31 = or i32 %30, %EBP19
%32 = and i32 %31, 255
%33 = call i32 @llvm.ctpop.i32(i32 %32)
%34 = and i32 %33, 1
%PF24 = icmp eq i32 %34, 0
store i32 %31, ptr %29, align 1
%memload25 = load i32, ptr @BTN_TOOL_RUBBER, align 1
%35 = call ptr @BIT_MASK()
%RAX26 = ptrtoint ptr %35 to i64
%EBX27 = trunc i64 %RAX26 to i32
%memload28 = load i32, ptr @BTN_TOOL_PEN, align 1
%36 = call ptr @BIT_MASK()
%RAX29 = ptrtoint ptr %36 to i64
%EBP30 = trunc i64 %RAX29 to i32
%EBP35 = or i32 %EBP30, %EBX27
%highbit31 = and i32 -2147483648, %EBP35
%SF32 = icmp ne i32 %highbit31, 0
%ZF33 = icmp eq i32 %EBP35, 0
%37 = and i32 %EBP35, 255
%38 = call i32 @llvm.ctpop.i32(i32 %37)
%39 = and i32 %38, 1
%PF34 = icmp eq i32 %39, 0
%memload36 = load i32, ptr @BTN_STYLUS, align 1
%40 = call ptr @BIT_MASK()
%RAX37 = ptrtoint ptr %40 to i64
%R12D = trunc i64 %RAX37 to i32
%memload38 = load i32, ptr @BTN_TOOL_MOUSE, align 1
%41 = call ptr @BIT_MASK()
%RAX39 = ptrtoint ptr %41 to i64
%EBX40 = trunc i64 %RAX39 to i32
%EBX45 = or i32 %EBX40, %R12D
%highbit41 = and i32 -2147483648, %EBX45
%SF42 = icmp ne i32 %highbit41, 0
%ZF43 = icmp eq i32 %EBX45, 0
%42 = and i32 %EBX45, 255
%43 = call i32 @llvm.ctpop.i32(i32 %42)
%44 = and i32 %43, 1
%PF44 = icmp eq i32 %44, 0
%EBX50 = or i32 %EBX45, %EBP35
%highbit46 = and i32 -2147483648, %EBX50
%SF47 = icmp ne i32 %highbit46, 0
%ZF48 = icmp eq i32 %EBX50, 0
%45 = and i32 %EBX50, 255
%46 = call i32 @llvm.ctpop.i32(i32 %45)
%47 = and i32 %46, 1
%PF49 = icmp eq i32 %47, 0
%memload51 = load i32, ptr @BTN_STYLUS2, align 1
%48 = call ptr @BIT_MASK()
%RAX52 = ptrtoint ptr %48 to i64
%EBP53 = trunc i64 %RAX52 to i32
%EBP58 = or i32 %EBP53, %EBX50
%highbit54 = and i32 -2147483648, %EBP58
%SF55 = icmp ne i32 %highbit54, 0
%ZF56 = icmp eq i32 %EBP58, 0
%49 = and i32 %EBP58, 255
%50 = call i32 @llvm.ctpop.i32(i32 %49)
%51 = and i32 %50, 1
%PF57 = icmp eq i32 %51, 0
%memref-disp59 = add i64 %arg1, 16
%52 = inttoptr i64 %memref-disp59 to ptr
%memload60 = load i64, ptr %52, align 1
%memload61 = load i32, ptr @BTN_DIGI, align 1
%53 = call ptr @BIT_WORD()
%RAX62 = ptrtoint ptr %53 to i64
%memref-idxreg63 = mul i64 4, %RAX62
%memref-basereg64 = add i64 %memload60, %memref-idxreg63
%54 = inttoptr i64 %memref-basereg64 to ptr
%55 = load i32, ptr %54, align 1
%56 = or i32 %55, %EBP58
%57 = and i32 %56, 255
%58 = call i32 @llvm.ctpop.i32(i32 %57)
%59 = and i32 %58, 1
%PF65 = icmp eq i32 %59, 0
store i32 %56, ptr %54, align 1
%memload66 = load i32, ptr @ABS_DISTANCE, align 1
%60 = inttoptr i64 %arg2 to ptr
%memload67 = load i64, ptr %60, align 1
%61 = inttoptr i64 %memload67 to ptr
%memload68 = load i32, ptr %61, align 1
%62 = tail call ptr @input_set_abs_params()
%RAX69 = ptrtoint ptr %62 to i64
ret i64 %RAX69
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/input/tablet/extr_wacom_sys.c_input_dev_g.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/input/tablet/extr_wacom_sys.c_input_dev_g.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EV_REL = common local_unnamed_addr global i32 0, align 4
@REL_WHEEL = common local_unnamed_addr global i32 0, align 4
@BTN_LEFT = common local_unnamed_addr global i32 0, align 4
@BTN_RIGHT = common local_unnamed_addr global i32 0, align 4
@BTN_MIDDLE = common local_unnamed_addr global i32 0, align 4
@BTN_MOUSE = common local_unnamed_addr global i32 0, align 4
@BTN_TOOL_RUBBER = common local_unnamed_addr global i32 0, align 4
@BTN_TOOL_PEN = common local_unnamed_addr global i32 0, align 4
@BTN_STYLUS = common local_unnamed_addr global i32 0, align 4
@BTN_TOOL_MOUSE = common local_unnamed_addr global i32 0, align 4
@BTN_STYLUS2 = common local_unnamed_addr global i32 0, align 4
@BTN_DIGI = common local_unnamed_addr global i32 0, align 4
@ABS_DISTANCE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @input_dev_g(ptr noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = load i32, ptr @EV_REL, align 4, !tbaa !6
%4 = tail call i32 @BIT_MASK(i32 noundef %3) #2
%5 = load ptr, ptr %0, align 8, !tbaa !10
%6 = load i32, ptr %5, align 4, !tbaa !6
%7 = or i32 %6, %4
store i32 %7, ptr %5, align 4, !tbaa !6
%8 = load i32, ptr @REL_WHEEL, align 4, !tbaa !6
%9 = tail call i32 @BIT_MASK(i32 noundef %8) #2
%10 = getelementptr inbounds i8, ptr %0, i64 8
%11 = load ptr, ptr %10, align 8, !tbaa !13
%12 = load i32, ptr %11, align 4, !tbaa !6
%13 = or i32 %12, %9
store i32 %13, ptr %11, align 4, !tbaa !6
%14 = load i32, ptr @BTN_LEFT, align 4, !tbaa !6
%15 = tail call i32 @BIT_MASK(i32 noundef %14) #2
%16 = load i32, ptr @BTN_RIGHT, align 4, !tbaa !6
%17 = tail call i32 @BIT_MASK(i32 noundef %16) #2
%18 = or i32 %17, %15
%19 = load i32, ptr @BTN_MIDDLE, align 4, !tbaa !6
%20 = tail call i32 @BIT_MASK(i32 noundef %19) #2
%21 = or i32 %18, %20
%22 = getelementptr inbounds i8, ptr %0, i64 16
%23 = load ptr, ptr %22, align 8, !tbaa !14
%24 = load i32, ptr @BTN_MOUSE, align 4, !tbaa !6
%25 = tail call i64 @BIT_WORD(i32 noundef %24) #2
%26 = getelementptr inbounds i32, ptr %23, i64 %25
%27 = load i32, ptr %26, align 4, !tbaa !6
%28 = or i32 %21, %27
store i32 %28, ptr %26, align 4, !tbaa !6
%29 = load i32, ptr @BTN_TOOL_RUBBER, align 4, !tbaa !6
%30 = tail call i32 @BIT_MASK(i32 noundef %29) #2
%31 = load i32, ptr @BTN_TOOL_PEN, align 4, !tbaa !6
%32 = tail call i32 @BIT_MASK(i32 noundef %31) #2
%33 = or i32 %32, %30
%34 = load i32, ptr @BTN_STYLUS, align 4, !tbaa !6
%35 = tail call i32 @BIT_MASK(i32 noundef %34) #2
%36 = or i32 %33, %35
%37 = load i32, ptr @BTN_TOOL_MOUSE, align 4, !tbaa !6
%38 = tail call i32 @BIT_MASK(i32 noundef %37) #2
%39 = or i32 %36, %38
%40 = load i32, ptr @BTN_STYLUS2, align 4, !tbaa !6
%41 = tail call i32 @BIT_MASK(i32 noundef %40) #2
%42 = or i32 %39, %41
%43 = load ptr, ptr %22, align 8, !tbaa !14
%44 = load i32, ptr @BTN_DIGI, align 4, !tbaa !6
%45 = tail call i64 @BIT_WORD(i32 noundef %44) #2
%46 = getelementptr inbounds i32, ptr %43, i64 %45
%47 = load i32, ptr %46, align 4, !tbaa !6
%48 = or i32 %42, %47
store i32 %48, ptr %46, align 4, !tbaa !6
%49 = load i32, ptr @ABS_DISTANCE, align 4, !tbaa !6
%50 = load ptr, ptr %1, align 8, !tbaa !15
%51 = load i32, ptr %50, align 4, !tbaa !17
%52 = tail call i32 @input_set_abs_params(ptr noundef nonnull %0, i32 noundef %49, i32 noundef 0, i32 noundef %51, i32 noundef 0, i32 noundef 0) #2
ret void
}
declare i32 @BIT_MASK(i32 noundef) local_unnamed_addr #1
declare i64 @BIT_WORD(i32 noundef) local_unnamed_addr #1
declare i32 @input_set_abs_params(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"input_dev", !12, i64 0, !12, i64 8, !12, i64 16}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!11, !12, i64 16}
!15 = !{!16, !12, i64 0}
!16 = !{!"wacom_wac", !12, i64 0}
!17 = !{!18, !7, i64 0}
!18 = !{!"TYPE_2__", !7, i64 0}
| fastsocket_kernel_drivers_input_tablet_extr_wacom_sys.c_input_dev_g |
; ModuleID = 'lede_target_linux_ath79_files_drivers_net_ethernet_atheros_ag71xx_extr_ag71xx_debugfs.c_ag71xx_debugfs_root_exit.so'
source_filename = "lede_target_linux_ath79_files_drivers_net_ethernet_atheros_ag71xx_extr_ag71xx_debugfs.c_ag71xx_debugfs_root_exit.so"
@ag71xx_debugfs_root = common dso_local global i64 0, align 8
declare dso_local ptr @debugfs_remove()
define dso_local ptr @ag71xx_debugfs_root_exit() {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%memload = load i64, ptr @ag71xx_debugfs_root, align 1
%0 = call ptr @debugfs_remove()
%1 = sext i32 0 to i64
store i64 %1, ptr @ag71xx_debugfs_root, align 1
ret ptr %0
}
| ; ModuleID = 'AnghaBench/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/extr_ag71xx_debugfs.c_ag71xx_debugfs_root_exit.c'
source_filename = "AnghaBench/lede/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/extr_ag71xx_debugfs.c_ag71xx_debugfs_root_exit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ag71xx_debugfs_root = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @ag71xx_debugfs_root_exit() local_unnamed_addr #0 {
%1 = load ptr, ptr @ag71xx_debugfs_root, align 8, !tbaa !6
%2 = tail call i32 @debugfs_remove(ptr noundef %1) #2
store ptr null, ptr @ag71xx_debugfs_root, align 8, !tbaa !6
ret void
}
declare i32 @debugfs_remove(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| lede_target_linux_ath79_files_drivers_net_ethernet_atheros_ag71xx_extr_ag71xx_debugfs.c_ag71xx_debugfs_root_exit |
; ModuleID = 'FFmpeg_libavcodec_extr_hevc_cabac.c_ff_hevc_cbf_cb_cr_decode.so'
source_filename = "FFmpeg_libavcodec_extr_hevc_cabac.c_ff_hevc_cbf_cb_cr_decode.so"
@elem_offset = common dso_local global i64 0, align 8
@CBF_CB_CR = common dso_local global i64 0, align 8
declare dso_local ptr @GET_CABAC()
define dso_local i64 @ff_hevc_cbf_cb_cr_decode(i64 %arg1, i32 %arg2) {
entry:
%memload = load i64, ptr @elem_offset, align 1
%memload1 = load i64, ptr @CBF_CB_CR, align 1
%RDI = sext i32 %arg2 to i64
%memref-idxreg = mul i64 8, %memload1
%memref-basereg = add i64 %memload, %memref-idxreg
%0 = inttoptr i64 %memref-basereg to ptr
%memload2 = load i64, ptr %0, align 1
%RDI3 = add i64 %RDI, %memload2
%1 = and i64 %RDI3, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
%4 = tail call ptr @GET_CABAC()
%RAX = ptrtoint ptr %4 to i64
ret i64 %RAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_hevc_cabac.c_ff_hevc_cbf_cb_cr_decode.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_hevc_cabac.c_ff_hevc_cbf_cb_cr_decode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@elem_offset = common local_unnamed_addr global ptr null, align 8
@CBF_CB_CR = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @ff_hevc_cbf_cb_cr_decode(ptr nocapture noundef readnone %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load ptr, ptr @elem_offset, align 8, !tbaa !6
%4 = load i64, ptr @CBF_CB_CR, align 8, !tbaa !10
%5 = getelementptr inbounds i64, ptr %3, i64 %4
%6 = load i64, ptr %5, align 8, !tbaa !10
%7 = sext i32 %1 to i64
%8 = add nsw i64 %6, %7
%9 = tail call i32 @GET_CABAC(i64 noundef %8) #2
ret i32 %9
}
declare i32 @GET_CABAC(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
| FFmpeg_libavcodec_extr_hevc_cabac.c_ff_hevc_cbf_cb_cr_decode |
; ModuleID = 'freebsd_sys_x86_x86_extr_identcpu.c_cpu_getmaxphyaddr.so'
source_filename = "freebsd_sys_x86_x86_extr_identcpu.c_cpu_getmaxphyaddr.so"
@cpu_maxphyaddr = common dso_local global i64 0, align 8
define dso_local i32 @cpu_getmaxphyaddr() {
entry:
%memload = load i32, ptr @cpu_maxphyaddr, align 1
%0 = trunc i32 %memload to i8
%ECX = zext i8 %0 to i32
%RAX = sext i32 -1 to i64
%1 = trunc i32 %ECX to i8
%2 = zext i8 %1 to i64
%shift-cnt-msk = and i64 %2, 31
%RAX1 = shl i64 %RAX, %shift-cnt-msk
%shrd_cf_count_cmp = icmp sgt i64 %shift-cnt-msk, 0
%3 = sub i64 64, %shift-cnt-msk
%shld_cf_count_shift = shl i64 1, %3
%shld_cf_count_and = and i64 %RAX, %shld_cf_count_shift
%shld_cf_count_shft_out = icmp sgt i64 %shld_cf_count_and, 0
%shld_cf_update = select i1 %shrd_cf_count_cmp, i1 %shld_cf_count_shft_out, i1 false
%ZF = icmp eq i64 %RAX1, 0
%highbit = and i64 -9223372036854775808, %RAX1
%SF = icmp ne i64 %highbit, 0
%4 = trunc i64 %RAX1 to i32
%EAX = xor i32 %4, -1
ret i32 %EAX
}
| ; ModuleID = 'AnghaBench/freebsd/sys/x86/x86/extr_identcpu.c_cpu_getmaxphyaddr.c'
source_filename = "AnghaBench/freebsd/sys/x86/x86/extr_identcpu.c_cpu_getmaxphyaddr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cpu_maxphyaddr = common local_unnamed_addr global i64 0, align 8
@pae_mode = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define i32 @cpu_getmaxphyaddr() local_unnamed_addr #0 {
%1 = load i64, ptr @cpu_maxphyaddr, align 8, !tbaa !6
%2 = shl nsw i64 -1, %1
%3 = trunc i64 %2 to i32
%4 = xor i32 %3, -1
ret i32 %4
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_x86_x86_extr_identcpu.c_cpu_getmaxphyaddr |
; ModuleID = 'xLua_build_luajit-2.1.0b3_src_host_extr_minilua.c_libsize.so'
source_filename = "xLua_build_luajit-2.1.0b3_src_host_extr_minilua.c_libsize.so"
define dso_local i64 @libsize(i64 %arg1) {
entry:
%RAX-SKT-LOC = alloca i64, align 8
%0 = inttoptr i64 %arg1 to ptr
%1 = load i64, ptr %0, align 1
%2 = sub i64 %1, 0
%3 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %1, i64 0)
%CF = extractvalue { i64, i1 } %3, 1
%ZF = icmp eq i64 %2, 0
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%4 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %1, i64 0)
%OF = extractvalue { i64, i1 } %4, 1
%5 = and i64 %2, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF = icmp eq i64 %7, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%8 = zext i32 0 to i64
store i64 %8, ptr %RAX-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.2
%RAX = load i64, ptr %RAX-SKT-LOC, align 1
%memref-idxreg = mul i64 8, %RAX
%memref-basereg = add i64 %arg1, %memref-idxreg
%memref-disp = add i64 %memref-basereg, 8
%9 = inttoptr i64 %memref-disp to ptr
%10 = load i64, ptr %9, align 1
%11 = sub i64 %10, 0
%12 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %10, i64 0)
%CF1 = extractvalue { i64, i1 } %12, 1
%ZF2 = icmp eq i64 %11, 0
%highbit3 = and i64 -9223372036854775808, %11
%SF4 = icmp ne i64 %highbit3, 0
%13 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %10, i64 0)
%OF5 = extractvalue { i64, i1 } %13, 1
%14 = and i64 %11, 255
%15 = call i64 @llvm.ctpop.i64(i64 %14)
%16 = and i64 %15, 1
%PF6 = icmp eq i64 %16, 0
%memref-disp7 = add i64 %RAX, 1
%CmpZF_JNE = icmp eq i1 %ZF2, false
store i64 %memref-disp7, ptr %RAX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.2, label %bb.3
bb.3: ; preds = %bb.2
%ld-stk-prom = load i64, ptr %RAX-SKT-LOC, align 8
br label %UnifiedReturnBlock
bb.4: ; preds = %entry
%17 = zext i32 0 to i64
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.4, %bb.3
%UnifiedRetVal = phi i64 [ %ld-stk-prom, %bb.3 ], [ %17, %bb.4 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/xLua/build/luajit-2.1.0b3/src/host/extr_minilua.c_libsize.c'
source_filename = "AnghaBench/xLua/build/luajit-2.1.0b3/src/host/extr_minilua.c_libsize.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @libsize], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @libsize(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = icmp eq i64 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = phi ptr [ %8, %4 ], [ %0, %1 ]
%7 = add nuw nsw i32 %5, 1
%8 = getelementptr inbounds i8, ptr %6, i64 8
%9 = load i64, ptr %8, align 8, !tbaa !6
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %4, !llvm.loop !11
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %12
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
| xLua_build_luajit-2.1.0b3_src_host_extr_minilua.c_libsize |
; ModuleID = 'linux_fs_ocfs2_extr_dcache.c_ocfs2_dentry_iput.so'
source_filename = "linux_fs_ocfs2_extr_dcache.c_ocfs2_dentry_iput.so"
@rodata_13 = private unnamed_addr constant [97 x i8] c"Dentry is missing cluster lock. inode: %llu, d_flags: 0x%x, d_name: %pd\0A\00dentry: %pd, count: %u\0A\00", align 1, !ROData_SecInfo !0
@DCACHE_DISCONNECTED = common dso_local global i32 0, align 4
@ML_ERROR = common dso_local global i32 0, align 4
declare dso_local ptr @mlog_bug_on_msg()
declare dso_local ptr @OCFS2_SB()
declare dso_local ptr @ocfs2_dentry_lock_put()
declare dso_local ptr @d_unhashed()
declare dso_local ptr @OCFS2_I()
declare dso_local ptr @mlog()
declare dso_local ptr @iput()
define dso_local i64 @ocfs2_dentry_iput(i64 %arg1, i64 %arg2) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%memref-disp = add i64 %arg1, 8
%0 = inttoptr i64 %memref-disp to ptr
%memload = load i64, ptr %0, align 1
%1 = and i64 %memload, %memload
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %1, 0
%2 = and i64 %1, 255
%3 = call i64 @llvm.ctpop.i64(i64 %2)
%4 = and i64 %3, 1
%PF = icmp eq i64 %4, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%5 = inttoptr i64 %memload to ptr
%memload1 = load i64, ptr %5, align 1
%6 = and i64 %memload1, %memload1
%highbit2 = and i64 -9223372036854775808, %6
%SF3 = icmp ne i64 %highbit2, 0
%ZF4 = icmp eq i64 %6, 0
%7 = and i64 %6, 255
%8 = call i64 @llvm.ctpop.i64(i64 %7)
%9 = and i64 %8, 1
%PF5 = icmp eq i64 %9, 0
%DIL = icmp eq i1 %ZF4, true
%RSI = ptrtoint ptr getelementptr inbounds ([97 x i8], ptr @rodata_13, i32 0, i32 73) to i64, !ROData_Index !1
%10 = call ptr @mlog_bug_on_msg()
%RAX = ptrtoint ptr %10 to i64
%memref-disp6 = add i64 %arg1, 4
%11 = inttoptr i64 %memref-disp6 to ptr
%memload7 = load i32, ptr %11, align 1
%12 = call ptr @OCFS2_SB()
%RAX8 = ptrtoint ptr %12 to i64
%EDI = trunc i64 %RAX8 to i32
%13 = call ptr @ocfs2_dentry_lock_put()
%RAX9 = ptrtoint ptr %13 to i64
br label %bb.8
bb.2: ; preds = %entry
%memload10 = load i32, ptr @DCACHE_DISCONNECTED, align 1
%14 = inttoptr i64 %arg1 to ptr
%15 = load i32, ptr %14, align 1
%16 = zext i32 %15 to i64
%17 = zext i32 %memload10 to i64
%18 = and i64 %16, %17
%ZF11 = icmp eq i64 %18, 0
%highbit12 = and i64 -9223372036854775808, %18
%SF13 = icmp ne i64 %highbit12, 0
%19 = and i64 %18, 255
%20 = call i64 @llvm.ctpop.i64(i64 %19)
%21 = and i64 %20, 1
%PF14 = icmp eq i64 %21, 0
%CmpZF_JNE = icmp eq i1 %ZF11, false
br i1 %CmpZF_JNE, label %bb.8, label %bb.3
bb.3: ; preds = %bb.2
%22 = call ptr @d_unhashed()
%RAX15 = ptrtoint ptr %22 to i64
%23 = trunc i64 %RAX15 to i32
%24 = trunc i64 %RAX15 to i32
%25 = and i32 %23, %24
%highbit16 = and i32 -2147483648, %25
%SF17 = icmp ne i32 %highbit16, 0
%ZF18 = icmp eq i32 %25, 0
%26 = and i32 %25, 255
%27 = call i32 @llvm.ctpop.i32(i32 %26)
%28 = and i32 %27, 1
%PF19 = icmp eq i32 %28, 0
%CmpZF_JNE1 = icmp eq i1 %ZF18, false
br i1 %CmpZF_JNE1, label %bb.8, label %bb.4
bb.4: ; preds = %bb.3
%29 = and i64 %arg2, %arg2
%highbit20 = and i64 -9223372036854775808, %29
%SF21 = icmp ne i64 %highbit20, 0
%ZF22 = icmp eq i64 %29, 0
%30 = and i64 %29, 255
%31 = call i64 @llvm.ctpop.i64(i64 %30)
%32 = and i64 %31, 1
%PF23 = icmp eq i64 %32, 0
%CmpZF_JE2 = icmp eq i1 %ZF22, true
br i1 %CmpZF_JE2, label %bb.6, label %bb.5
bb.5: ; preds = %bb.4
%33 = call ptr @OCFS2_I()
%memload25 = load i64, ptr %33, align 1
br label %bb.7
bb.6: ; preds = %bb.4
br label %bb.7
bb.7: ; preds = %bb.6, %bb.5
%memload26 = load i32, ptr @ML_ERROR, align 1
%34 = inttoptr i64 %arg1 to ptr
%memload27 = load i32, ptr %34, align 1
%RSI28 = ptrtoint ptr @rodata_13 to i64
%35 = call ptr @mlog()
%RAX29 = ptrtoint ptr %35 to i64
br label %bb.8
bb.8: ; preds = %bb.7, %bb.3, %bb.2, %bb.1
%36 = tail call ptr @iput()
%RAX30 = ptrtoint ptr %36 to i64
ret i64 %RAX30
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
!1 = !{ptr getelementptr inbounds ([97 x i8], ptr @rodata_13, i32 0, i32 73)}
| ; ModuleID = 'AnghaBench/linux/fs/ocfs2/extr_dcache.c_ocfs2_dentry_iput.c'
source_filename = "AnghaBench/linux/fs/ocfs2/extr_dcache.c_ocfs2_dentry_iput.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DCACHE_DISCONNECTED = common local_unnamed_addr global i32 0, align 4
@ML_ERROR = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [73 x i8] c"Dentry is missing cluster lock. inode: %llu, d_flags: 0x%x, d_name: %pd\0A\00", align 1
@.str.1 = private unnamed_addr constant [24 x i8] c"dentry: %pd, count: %u\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ocfs2_dentry_iput], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ocfs2_dentry_iput(ptr noundef %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %24
6: ; preds = %2
%7 = load i32, ptr %0, align 8, !tbaa !12
%8 = load i32, ptr @DCACHE_DISCONNECTED, align 4, !tbaa !13
%9 = and i32 %8, %7
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %33
11: ; preds = %6
%12 = tail call i32 @d_unhashed(ptr noundef nonnull %0) #2
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %33
14: ; preds = %11
%15 = icmp eq ptr %1, null
br i1 %15, label %19, label %16
16: ; preds = %14
%17 = tail call ptr @OCFS2_I(ptr noundef nonnull %1) #2
%18 = load i64, ptr %17, align 8, !tbaa !14
br label %19
19: ; preds = %16, %14
%20 = phi i64 [ %18, %16 ], [ 0, %14 ]
%21 = load i32, ptr @ML_ERROR, align 4, !tbaa !13
%22 = load i32, ptr %0, align 8, !tbaa !12
%23 = tail call i32 @mlog(i32 noundef %21, ptr noundef nonnull @.str, i64 noundef %20, i32 noundef %22, ptr noundef nonnull %0) #2
br label %33
24: ; preds = %2
%25 = load i64, ptr %4, align 8, !tbaa !17
%26 = icmp eq i64 %25, 0
%27 = zext i1 %26 to i32
%28 = tail call i32 @mlog_bug_on_msg(i32 noundef %27, ptr noundef nonnull @.str.1, ptr noundef nonnull %0, i64 noundef %25) #2
%29 = getelementptr inbounds i8, ptr %0, i64 4
%30 = load i32, ptr %29, align 4, !tbaa !19
%31 = tail call i32 @OCFS2_SB(i32 noundef %30) #2
%32 = tail call i32 @ocfs2_dentry_lock_put(i32 noundef %31, ptr noundef nonnull %4) #2
br label %33
33: ; preds = %6, %11, %19, %24
%34 = tail call i32 @iput(ptr noundef %1) #2
ret void
}
declare i32 @d_unhashed(ptr noundef) local_unnamed_addr #1
declare ptr @OCFS2_I(ptr noundef) local_unnamed_addr #1
declare i32 @mlog(i32 noundef, ptr noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mlog_bug_on_msg(i32 noundef, ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ocfs2_dentry_lock_put(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @OCFS2_SB(i32 noundef) local_unnamed_addr #1
declare i32 @iput(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"dentry", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!15, !16, i64 0}
!15 = !{!"TYPE_2__", !16, i64 0}
!16 = !{!"long", !9, i64 0}
!17 = !{!18, !16, i64 0}
!18 = !{!"ocfs2_dentry_lock", !16, i64 0}
!19 = !{!7, !8, i64 4}
| linux_fs_ocfs2_extr_dcache.c_ocfs2_dentry_iput |
; ModuleID = 'linux_drivers_hsi_controllers_extr_omap_ssi_core.c_ssi_remove.so'
source_filename = "linux_drivers_hsi_controllers_extr_omap_ssi_core.c_ssi_remove.so"
@ssi_remove_ports = common dso_local global i32 0, align 4
declare dso_local ptr @platform_get_drvdata()
declare dso_local ptr @device_for_each_child()
declare dso_local ptr @ssi_remove_controller()
declare dso_local ptr @platform_set_drvdata()
declare dso_local ptr @pm_runtime_disable()
define dso_local i32 @ssi_remove(i64 %arg1) {
entry:
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%1 = call ptr @platform_get_drvdata()
%RAX = ptrtoint ptr %1 to i64
%memload = load i32, ptr @ssi_remove_ports, align 1
%2 = call ptr @device_for_each_child()
%RAX1 = ptrtoint ptr %2 to i64
%3 = call ptr @ssi_remove_controller()
%RAX2 = ptrtoint ptr %3 to i64
%4 = call ptr @platform_set_drvdata()
%RAX3 = ptrtoint ptr %4 to i64
%5 = call ptr @pm_runtime_disable()
%RAX4 = ptrtoint ptr %5 to i64
ret i32 0
}
| ; ModuleID = 'AnghaBench/linux/drivers/hsi/controllers/extr_omap_ssi_core.c_ssi_remove.c'
source_filename = "AnghaBench/linux/drivers/hsi/controllers/extr_omap_ssi_core.c_ssi_remove.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ssi_remove_ports = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ssi_remove], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @ssi_remove(ptr noundef %0) #0 {
%2 = tail call ptr @platform_get_drvdata(ptr noundef %0) #2
%3 = load i32, ptr @ssi_remove_ports, align 4, !tbaa !6
%4 = tail call i32 @device_for_each_child(ptr noundef %0, ptr noundef null, i32 noundef %3) #2
%5 = tail call i32 @ssi_remove_controller(ptr noundef %2) #2
%6 = tail call i32 @platform_set_drvdata(ptr noundef %0, ptr noundef null) #2
%7 = tail call i32 @pm_runtime_disable(ptr noundef %0) #2
ret i32 0
}
declare ptr @platform_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @device_for_each_child(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ssi_remove_controller(ptr noundef) local_unnamed_addr #1
declare i32 @platform_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @pm_runtime_disable(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_hsi_controllers_extr_omap_ssi_core.c_ssi_remove |
; ModuleID = 'reactos_dll_cpl_desk_extr_appearance.c_AppearancePage_LoadSelectedScheme.so'
source_filename = "reactos_dll_cpl_desk_extr_appearance.c_AppearancePage_LoadSelectedScheme.so"
@FALSE = common dso_local global i64 0, align 8
@COLOR_DESKTOP = common dso_local global i64 0, align 8
@g_GlobalData = common dso_local global i32 0, align 4
declare dso_local ptr @LoadSchemeFromReg()
declare dso_local ptr @LoadSchemeFromTheme()
define dso_local i32 @AppearancePage_LoadSelectedScheme(i64 %arg1, i64 %arg2) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%RSI = add i64 %arg2, 8
%0 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %arg2, i64 8)
%CF = extractvalue { i64, i1 } %0, 1
%1 = and i64 %RSI, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
%ZF = icmp eq i64 %RSI, 0
%highbit = and i64 -9223372036854775808, %RSI
%SF = icmp ne i64 %highbit, 0
%4 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %arg2, i64 8)
%OF = extractvalue { i64, i1 } %4, 1
%memref-disp = add i64 %arg2, 8
%5 = inttoptr i64 %memref-disp to ptr
%memload = load i64, ptr %5, align 1
%6 = load i64, ptr @FALSE, align 8
%7 = sub i64 %memload, %6
%8 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload, i64 %6)
%CF1 = extractvalue { i64, i1 } %8, 1
%ZF2 = icmp eq i64 %7, 0
%highbit3 = and i64 -9223372036854775808, %7
%SF4 = icmp ne i64 %highbit3, 0
%9 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload, i64 %6)
%OF5 = extractvalue { i64, i1 } %9, 1
%10 = and i64 %7, 255
%11 = call i64 @llvm.ctpop.i64(i64 %10)
%12 = and i64 %11, 1
%PF6 = icmp eq i64 %12, 0
%CmpZF_JNE = icmp eq i1 %ZF2, false
br i1 %CmpZF_JNE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%13 = call ptr @LoadSchemeFromReg()
%RAX = ptrtoint ptr %13 to i64
br label %bb.3
bb.2: ; preds = %entry
%14 = call ptr @LoadSchemeFromTheme()
%RAX7 = ptrtoint ptr %14 to i64
br label %bb.3
bb.3: ; preds = %bb.2, %bb.1
%15 = inttoptr i64 %arg2 to ptr
%memload8 = load i64, ptr %15, align 1
%memload9 = load i64, ptr @COLOR_DESKTOP, align 1
%memref-idxreg = mul i64 4, %memload9
%memref-basereg = add i64 %memload8, %memref-idxreg
%16 = inttoptr i64 %memref-basereg to ptr
%memload10 = load i32, ptr %16, align 1
store i32 %memload10, ptr @g_GlobalData, align 1
ret i32 %memload10
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/reactos/dll/cpl/desk/extr_appearance.c_AppearancePage_LoadSelectedScheme.c'
source_filename = "AnghaBench/reactos/dll/cpl/desk/extr_appearance.c_AppearancePage_LoadSelectedScheme.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_9__ = type { i32 }
@FALSE = common local_unnamed_addr global i64 0, align 8
@COLOR_DESKTOP = common local_unnamed_addr global i64 0, align 8
@g_GlobalData = common local_unnamed_addr global %struct.TYPE_9__ zeroinitializer, align 4
@llvm.used = appending global [1 x ptr] [ptr @AppearancePage_LoadSelectedScheme], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @AppearancePage_LoadSelectedScheme(i32 %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 8
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = load i64, ptr @FALSE, align 8, !tbaa !14
%6 = icmp eq i64 %4, %5
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = tail call i32 @LoadSchemeFromReg(ptr noundef nonnull %1, ptr noundef nonnull %3) #2
br label %11
9: ; preds = %2
%10 = tail call i32 @LoadSchemeFromTheme(ptr noundef nonnull %1, ptr noundef nonnull %3) #2
br label %11
11: ; preds = %9, %7
%12 = load ptr, ptr %1, align 8, !tbaa !15
%13 = load i64, ptr @COLOR_DESKTOP, align 8, !tbaa !14
%14 = getelementptr inbounds i32, ptr %12, i64 %13
%15 = load i32, ptr %14, align 4, !tbaa !16
store i32 %15, ptr @g_GlobalData, align 4, !tbaa !18
ret void
}
declare i32 @LoadSchemeFromReg(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @LoadSchemeFromTheme(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !13, i64 8}
!7 = !{!"TYPE_8__", !8, i64 0, !12, i64 8}
!8 = !{!"TYPE_10__", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"TYPE_11__", !13, i64 0}
!13 = !{!"long", !10, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!7, !9, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"int", !10, i64 0}
!18 = !{!19, !17, i64 0}
!19 = !{!"TYPE_9__", !17, i64 0}
| reactos_dll_cpl_desk_extr_appearance.c_AppearancePage_LoadSelectedScheme |
; ModuleID = 'radare2_libr_asm_arch_arm_extr_armass64.c_isMask.so'
source_filename = "radare2_libr_asm_arch_arm_extr_armass64.c_isMask.so"
define dso_local i32 @isMask(i64 %arg1) {
entry:
%0 = trunc i64 %arg1 to i32
%1 = trunc i64 %arg1 to i32
%2 = and i32 %0, %1
%highbit = and i32 -2147483648, %2
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %2, 0
%3 = and i32 %2, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
%AL = icmp eq i1 %ZF, false
%memref-disp = add i64 %arg1, 1
%ECX = trunc i64 %memref-disp to i32
%6 = trunc i64 %arg1 to i32
%7 = and i32 %ECX, %6
%highbit1 = and i32 -2147483648, %7
%SF2 = icmp ne i32 %highbit1, 0
%ZF3 = icmp eq i32 %7, 0
%8 = and i32 %7, 255
%9 = call i32 @llvm.ctpop.i32(i32 %8)
%10 = and i32 %9, 1
%PF4 = icmp eq i32 %10, 0
%CL = icmp eq i1 %ZF3, true
%11 = zext i1 %CL to i8
%12 = zext i1 %AL to i8
%CL9 = and i8 %11, %12
%highbit5 = and i8 -128, %CL9
%SF6 = icmp ne i8 %highbit5, 0
%ZF7 = icmp eq i8 %CL9, 0
%13 = call i8 @llvm.ctpop.i8(i8 %CL9)
%14 = and i8 %13, 1
%PF8 = icmp eq i8 %14, 0
%EAX = zext i8 %CL9 to i32
ret i32 %EAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/radare2/libr/asm/arch/arm/extr_armass64.c_isMask.c'
source_filename = "AnghaBench/radare2/libr/asm/arch/arm/extr_armass64.c_isMask.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @isMask], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal range(i32 0, 2) i32 @isMask(i32 noundef %0) #0 {
%2 = icmp ne i32 %0, 0
%3 = add nsw i32 %0, 1
%4 = and i32 %3, %0
%5 = icmp eq i32 %4, 0
%6 = select i1 %2, i1 %5, i1 false
%7 = zext i1 %6 to i32
ret i32 %7
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| radare2_libr_asm_arch_arm_extr_armass64.c_isMask |
; ModuleID = 'HandBrake_libhb_extr_deccc608sub.c_general_608_close.so'
source_filename = "HandBrake_libhb_extr_deccc608sub.c_general_608_close.so"
declare dso_local void @free(ptr)
declare dso_local ptr @hb_buffer_list_close()
define dso_local i64 @general_608_close(i64 %arg1) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%memref-disp = add i64 %arg1, 32
%0 = inttoptr i64 %memref-disp to ptr
%memload = load i64, ptr %0, align 1
%1 = and i64 %memload, %memload
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %1, 0
%2 = and i64 %1, 255
%3 = call i64 @llvm.ctpop.i64(i64 %2)
%4 = and i64 %3, 1
%PF = icmp eq i64 %4, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%5 = inttoptr i64 %memload to ptr
call void @free(ptr %5)
%memref-disp1 = add i64 %arg1, 16
%6 = inttoptr i64 %memref-disp1 to ptr
store <4 x float> zeroinitializer, ptr %6, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %entry
%memref-disp2 = add i64 %arg1, 8
%7 = inttoptr i64 %memref-disp2 to ptr
%memload3 = load i64, ptr %7, align 1
%8 = and i64 %memload3, %memload3
%highbit4 = and i64 -9223372036854775808, %8
%SF5 = icmp ne i64 %highbit4, 0
%ZF6 = icmp eq i64 %8, 0
%9 = and i64 %8, 255
%10 = call i64 @llvm.ctpop.i64(i64 %9)
%11 = and i64 %10, 1
%PF7 = icmp eq i64 %11, 0
%CmpZF_JE1 = icmp eq i1 %ZF6, true
br i1 %CmpZF_JE1, label %bb.4, label %bb.3
bb.3: ; preds = %bb.2
%12 = inttoptr i64 %memload3 to ptr
call void @free(ptr %12)
br label %bb.4
bb.4: ; preds = %bb.3, %bb.2
%13 = tail call ptr @hb_buffer_list_close()
%RAX = ptrtoint ptr %13 to i64
ret i64 %RAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/HandBrake/libhb/extr_deccc608sub.c_general_608_close.c'
source_filename = "AnghaBench/HandBrake/libhb/extr_deccc608sub.c_general_608_close.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @general_608_close], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @general_608_close(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 32
%3 = load i64, ptr %2, align 8, !tbaa !6
%4 = icmp eq i64 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = tail call i32 @free(i64 noundef %3) #3
%7 = getelementptr inbounds i8, ptr %0, i64 16
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %7, i8 0, i64 16, i1 false)
br label %8
8: ; preds = %5, %1
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = load i64, ptr %9, align 8, !tbaa !12
%11 = icmp eq i64 %10, 0
br i1 %11, label %14, label %12
12: ; preds = %8
%13 = tail call i32 @free(i64 noundef %10) #3
br label %14
14: ; preds = %12, %8
%15 = tail call i32 @hb_buffer_list_close(ptr noundef nonnull %0) #3
ret void
}
declare i32 @free(i64 noundef) local_unnamed_addr #1
declare i32 @hb_buffer_list_close(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 32}
!7 = !{!"s_write", !8, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !11, i64 8}
| HandBrake_libhb_extr_deccc608sub.c_general_608_close |
; ModuleID = 'FFmpeg_libavformat_extr_mpegts.c_mpegts_free.so'
source_filename = "FFmpeg_libavformat_extr_mpegts.c_mpegts_free.so"
@NB_PID_MAX = common dso_local global i32 0, align 4
declare dso_local ptr @clear_programs()
declare dso_local ptr @mpegts_close_filter()
define dso_local i32 @mpegts_free(i64 %arg1) {
entry:
%EAX-SKT-LOC18 = alloca i32, align 4
%EAX-SKT-LOC = alloca i32, align 4
%RBX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%0 = call ptr @clear_programs()
%RAX = ptrtoint ptr %0 to i64
%memload = load i32, ptr @NB_PID_MAX, align 1
%1 = and i32 %memload, %memload
%highbit = and i32 -2147483648, %1
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %1, 0
%2 = and i32 %1, 255
%3 = call i32 @llvm.ctpop.i32(i32 %2)
%4 = and i32 %3, 1
%PF = icmp eq i32 %4, 0
store i32 %memload, ptr %EAX-SKT-LOC, align 1
store i32 %memload, ptr %EAX-SKT-LOC18, align 1
%CmpZF_JLE = icmp eq i1 %ZF, true
%CmpOF_JLE = icmp ne i1 %SF, false
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
br i1 %ZFOrSF_JLE, label %bb.6, label %bb.1
bb.1: ; preds = %entry
%5 = zext i32 0 to i64
store i64 %5, ptr %RBX-SKT-LOC, align 1
br label %bb.4
bb.4: ; preds = %bb.3, %bb.1
%6 = inttoptr i64 %arg1 to ptr
%memload1 = load i64, ptr %6, align 1
%RBX = load i64, ptr %RBX-SKT-LOC, align 1
%memref-idxreg = mul i64 8, %RBX
%memref-basereg = add i64 %memload1, %memref-idxreg
%7 = inttoptr i64 %memref-basereg to ptr
%memload2 = load i64, ptr %7, align 1
%8 = and i64 %memload2, %memload2
%highbit3 = and i64 -9223372036854775808, %8
%SF4 = icmp ne i64 %highbit3, 0
%ZF5 = icmp eq i64 %8, 0
%9 = and i64 %8, 255
%10 = call i64 @llvm.ctpop.i64(i64 %9)
%11 = and i64 %10, 1
%PF6 = icmp eq i64 %11, 0
%CmpZF_JE = icmp eq i1 %ZF5, true
br i1 %CmpZF_JE, label %bb.3, label %bb.5
bb.5: ; preds = %bb.4
%12 = call ptr @mpegts_close_filter()
%RAX7 = ptrtoint ptr %12 to i64
%memload8 = load i32, ptr @NB_PID_MAX, align 1
store i32 %memload8, ptr %EAX-SKT-LOC, align 1
br label %bb.3
bb.3: ; preds = %bb.5, %bb.4
%RBX13 = add i64 %RBX, 1
%13 = and i64 %RBX13, 255
%14 = call i64 @llvm.ctpop.i64(i64 %13)
%15 = and i64 %14, 1
%PF9 = icmp eq i64 %15, 0
%ZF10 = icmp eq i64 %RBX13, 0
%highbit11 = and i64 -9223372036854775808, %RBX13
%SF12 = icmp ne i64 %highbit11, 0
%EAX = load i32, ptr %EAX-SKT-LOC, align 1
%RCX = sext i32 %EAX to i64
%16 = sub i64 %RBX13, %RCX
%17 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RBX13, i64 %RCX)
%CF = extractvalue { i64, i1 } %17, 1
%ZF14 = icmp eq i64 %16, 0
%highbit15 = and i64 -9223372036854775808, %16
%SF16 = icmp ne i64 %highbit15, 0
%18 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RBX13, i64 %RCX)
%OF = extractvalue { i64, i1 } %18, 1
%19 = and i64 %16, 255
%20 = call i64 @llvm.ctpop.i64(i64 %19)
%21 = and i64 %20, 1
%PF17 = icmp eq i64 %21, 0
store i32 %EAX, ptr %EAX-SKT-LOC18, align 1
%CmpSFOF_JGE = icmp eq i1 %SF16, %OF
store i64 %RBX13, ptr %RBX-SKT-LOC, align 1
br i1 %CmpSFOF_JGE, label %bb.6, label %bb.4
bb.6: ; preds = %bb.3, %entry
%EAX19 = load i32, ptr %EAX-SKT-LOC18, align 1
ret i32 %EAX19
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/FFmpeg/libavformat/extr_mpegts.c_mpegts_free.c'
source_filename = "AnghaBench/FFmpeg/libavformat/extr_mpegts.c_mpegts_free.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NB_PID_MAX = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mpegts_free], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @mpegts_free(ptr noundef %0) #0 {
%2 = tail call i32 @clear_programs(ptr noundef %0) #2
%3 = load i32, ptr @NB_PID_MAX, align 4, !tbaa !6
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %20
5: ; preds = %1, %15
%6 = phi i32 [ %16, %15 ], [ %3, %1 ]
%7 = phi i64 [ %17, %15 ], [ 0, %1 ]
%8 = load ptr, ptr %0, align 8, !tbaa !10
%9 = getelementptr inbounds i64, ptr %8, i64 %7
%10 = load i64, ptr %9, align 8, !tbaa !13
%11 = icmp eq i64 %10, 0
br i1 %11, label %15, label %12
12: ; preds = %5
%13 = tail call i32 @mpegts_close_filter(ptr noundef nonnull %0, i64 noundef %10) #2
%14 = load i32, ptr @NB_PID_MAX, align 4, !tbaa !6
br label %15
15: ; preds = %5, %12
%16 = phi i32 [ %6, %5 ], [ %14, %12 ]
%17 = add nuw nsw i64 %7, 1
%18 = sext i32 %16 to i64
%19 = icmp slt i64 %17, %18
br i1 %19, label %5, label %20, !llvm.loop !15
20: ; preds = %15, %1
ret void
}
declare i32 @clear_programs(ptr noundef) local_unnamed_addr #1
declare i32 @mpegts_close_filter(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_5__", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| FFmpeg_libavformat_extr_mpegts.c_mpegts_free |
; ModuleID = 'mruby_mrbgems_mruby-io_src_extr_io.c_mrb_io_sysread.so'
source_filename = "mruby_mrbgems_mruby-io_src_extr_io.c_mrb_io_sysread.so"
@rodata_13 = private unnamed_addr constant [101 x i8] c"i|S\00negative expanding string size\00not opened for reading\00sysread failed: End of File\00sysread failed\00", align 1, !ROData_SecInfo !0
@E_ARGUMENT_ERROR = common dso_local global i32 0, align 4
@E_IO_ERROR = common dso_local global i32 0, align 4
@E_EOF_ERROR = common dso_local global i32 0, align 4
declare dso_local ptr @mrb_nil_value()
declare dso_local ptr @mrb_get_args()
declare dso_local ptr @mrb_str_new()
declare dso_local ptr @mrb_raise()
declare dso_local ptr @mrb_nil_p()
declare dso_local ptr @RSTRING_LEN()
declare dso_local ptr @RSTRING()
declare dso_local ptr @mrb_str_modify()
declare dso_local ptr @mrb_str_resize()
declare dso_local ptr @io_get_open_fptr()
declare dso_local ptr @RSTRING_PTR()
declare dso_local ptr @read()
declare dso_local ptr @mrb_str_new_cstr()
declare dso_local ptr @mrb_sys_fail()
define dso_local ptr @mrb_io_sysread(i64 %arg1, i32 %arg2) {
entry:
%RAX-SKT-LOC = alloca i64, align 8
%EAX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 48, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 0
%RSP_P.0 = inttoptr i64 %0 to ptr
%1 = add i64 %tos, 12
%RSP_P.12 = inttoptr i64 %1 to ptr
%2 = add i64 %tos, 16
%RSP_P.16 = inttoptr i64 %2 to ptr
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%3 = call ptr @mrb_nil_value()
%RAX = ptrtoint ptr %3 to i64
%4 = trunc i64 %RAX to i32
store i32 %4, ptr %RSP_P.12, align 1
%RSI = ptrtoint ptr @rodata_13 to i64
%RDX = ptrtoint ptr %RSP_P.16 to i64
%RCX = ptrtoint ptr %RSP_P.12 to i64
%5 = call ptr @mrb_get_args()
%RAX1 = ptrtoint ptr %5 to i64
%6 = load i64, ptr %RSP_P.16, align 1
%7 = sub i64 %6, 0
%8 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %6, i64 0)
%CF = extractvalue { i64, i1 } %8, 1
%ZF = icmp eq i64 %7, 0
%highbit = and i64 -9223372036854775808, %7
%SF = icmp ne i64 %highbit, 0
%9 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %6, i64 0)
%OF = extractvalue { i64, i1 } %9, 1
%10 = and i64 %7, 255
%11 = call i64 @llvm.ctpop.i64(i64 %10)
%12 = and i64 %11, 1
%PF = icmp eq i64 %12, 0
%CmpSF_JS = icmp eq i1 %SF, true
br i1 %CmpSF_JS, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%CmpZF_JNE = icmp eq i1 %ZF, false
br i1 %CmpZF_JNE, label %bb.4, label %bb.2
bb.2: ; preds = %bb.1
%13 = call ptr @mrb_str_new()
%RAX2 = ptrtoint ptr %13 to i64
store i64 %RAX2, ptr %RAX-SKT-LOC, align 1
br label %bb.22
bb.3: ; preds = %entry
%memload = load i32, ptr @E_ARGUMENT_ERROR, align 1
%RDX3 = ptrtoint ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 4) to i64, !ROData_Index !1
%14 = call ptr @mrb_raise()
%RAX4 = ptrtoint ptr %14 to i64
br label %bb.4
bb.4: ; preds = %bb.3, %bb.1
%memload5 = load i32, ptr %RSP_P.12, align 1
%15 = call ptr @mrb_nil_p()
%RAX6 = ptrtoint ptr %15 to i64
%16 = and i64 %RAX6, %RAX6
%highbit7 = and i64 -9223372036854775808, %16
%SF8 = icmp ne i64 %highbit7, 0
%ZF9 = icmp eq i64 %16, 0
%17 = and i64 %16, 255
%18 = call i64 @llvm.ctpop.i64(i64 %17)
%19 = and i64 %18, 1
%PF10 = icmp eq i64 %19, 0
%CmpZF_JE = icmp eq i1 %ZF9, true
br i1 %CmpZF_JE, label %bb.6, label %bb.5
bb.5: ; preds = %bb.4
%memload11 = load i64, ptr %RSP_P.16, align 1
%20 = call ptr @mrb_str_new()
%RAX12 = ptrtoint ptr %20 to i64
%EDI = trunc i64 %RAX12 to i32
%21 = trunc i64 %RAX12 to i32
store i32 %21, ptr %RSP_P.12, align 1
br label %bb.7
bb.6: ; preds = %bb.4
%memload13 = load i32, ptr %RSP_P.12, align 1
br label %bb.7
bb.7: ; preds = %bb.6, %bb.5
%22 = call ptr @RSTRING_LEN()
%RAX14 = ptrtoint ptr %22 to i64
%23 = trunc i64 %RAX14 to i32
%RAX15 = sext i32 %23 to i64
%memload16 = load i64, ptr %RSP_P.16, align 1
%memload17 = load i32, ptr %RSP_P.12, align 1
%24 = sub i64 %memload16, %RAX15
%25 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload16, i64 %RAX15)
%CF18 = extractvalue { i64, i1 } %25, 1
%ZF19 = icmp eq i64 %24, 0
%highbit20 = and i64 -9223372036854775808, %24
%SF21 = icmp ne i64 %highbit20, 0
%26 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload16, i64 %RAX15)
%OF22 = extractvalue { i64, i1 } %26, 1
%27 = and i64 %24, 255
%28 = call i64 @llvm.ctpop.i64(i64 %27)
%29 = and i64 %28, 1
%PF23 = icmp eq i64 %29, 0
%CmpZF_JNE78 = icmp eq i1 %ZF19, false
br i1 %CmpZF_JNE78, label %bb.9, label %bb.8
bb.8: ; preds = %bb.7
%30 = call ptr @RSTRING()
%RAX24 = ptrtoint ptr %30 to i64
%ESI = trunc i64 %RAX24 to i32
%31 = call ptr @mrb_str_modify()
%RAX25 = ptrtoint ptr %31 to i64
br label %bb.10
bb.9: ; preds = %bb.7
%32 = call ptr @mrb_str_resize()
%RAX26 = ptrtoint ptr %32 to i64
%33 = trunc i64 %RAX26 to i32
store i32 %33, ptr %RSP_P.12, align 1
br label %bb.10
bb.10: ; preds = %bb.9, %bb.8
%34 = call ptr @io_get_open_fptr()
%RAX27 = ptrtoint ptr %34 to i64
%memref-disp = add i64 %RAX27, 4
%35 = inttoptr i64 %memref-disp to ptr
%36 = load i32, ptr %35, align 1
%37 = zext i32 %36 to i64
%38 = zext i32 0 to i64
%39 = sub i64 %37, %38
%40 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %37, i64 %38)
%CF28 = extractvalue { i64, i1 } %40, 1
%ZF29 = icmp eq i64 %39, 0
%highbit30 = and i64 -9223372036854775808, %39
%SF31 = icmp ne i64 %highbit30, 0
%41 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %37, i64 %38)
%OF32 = extractvalue { i64, i1 } %41, 1
%42 = and i64 %39, 255
%43 = call i64 @llvm.ctpop.i64(i64 %42)
%44 = and i64 %43, 1
%PF33 = icmp eq i64 %44, 0
%CmpZF_JNE79 = icmp eq i1 %ZF29, false
br i1 %CmpZF_JNE79, label %bb.12, label %bb.11
bb.11: ; preds = %bb.10
%memload34 = load i32, ptr @E_IO_ERROR, align 1
%RDX35 = ptrtoint ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 35) to i64, !ROData_Index !2
%45 = call ptr @mrb_raise()
%RAX36 = ptrtoint ptr %45 to i64
br label %bb.12
bb.12: ; preds = %bb.11, %bb.10
%memload37 = load i32, ptr %34, align 1
%memload38 = load i32, ptr %RSP_P.12, align 1
%46 = call ptr @RSTRING_PTR()
%RAX39 = ptrtoint ptr %46 to i64
%memload40 = load i32, ptr %RSP_P.16, align 1
%ESI41 = trunc i64 %RAX39 to i32
%47 = call ptr @read()
%RAX42 = ptrtoint ptr %47 to i64
%48 = trunc i64 %RAX42 to i32
%49 = trunc i64 -1 to i32
%50 = sub i32 %48, %49
%51 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %48, i32 %49)
%CF43 = extractvalue { i32, i1 } %51, 1
%ZF44 = icmp eq i32 %50, 0
%highbit45 = and i32 -2147483648, %50
%SF46 = icmp ne i32 %highbit45, 0
%52 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %48, i32 %49)
%OF47 = extractvalue { i32, i1 } %52, 1
%53 = and i32 %50, 255
%54 = call i32 @llvm.ctpop.i32(i32 %53)
%55 = and i32 %54, 1
%PF48 = icmp eq i32 %55, 0
%CmpZF_JE80 = icmp eq i1 %ZF44, true
br i1 %CmpZF_JE80, label %bb.16, label %bb.13
bb.13: ; preds = %bb.12
%EBP = trunc i64 %RAX42 to i32
%56 = trunc i64 %RAX42 to i32
%57 = trunc i64 %RAX42 to i32
%58 = and i32 %56, %57
%highbit49 = and i32 -2147483648, %58
%SF50 = icmp ne i32 %highbit49, 0
%ZF51 = icmp eq i32 %58, 0
%59 = and i32 %58, 255
%60 = call i32 @llvm.ctpop.i32(i32 %59)
%61 = and i32 %60, 1
%PF52 = icmp eq i32 %61, 0
%CmpZF_JNE81 = icmp eq i1 %ZF51, false
br i1 %CmpZF_JNE81, label %bb.17, label %bb.14
bb.14: ; preds = %bb.13
%62 = load i64, ptr %RSP_P.16, align 1
%63 = sub i64 %62, 0
%64 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %62, i64 0)
%CF53 = extractvalue { i64, i1 } %64, 1
%ZF54 = icmp eq i64 %63, 0
%highbit55 = and i64 -9223372036854775808, %63
%SF56 = icmp ne i64 %highbit55, 0
%65 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %62, i64 0)
%OF57 = extractvalue { i64, i1 } %65, 1
%66 = and i64 %63, 255
%67 = call i64 @llvm.ctpop.i64(i64 %66)
%68 = and i64 %67, 1
%PF58 = icmp eq i64 %68, 0
%CmpZF_JE82 = icmp eq i1 %ZF54, true
br i1 %CmpZF_JE82, label %bb.19, label %bb.15
bb.15: ; preds = %bb.14
%memload59 = load i32, ptr @E_EOF_ERROR, align 1
%RDX60 = ptrtoint ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 58) to i64, !ROData_Index !3
%69 = call ptr @mrb_raise()
%RAX61 = ptrtoint ptr %69 to i64
br label %bb.21
bb.19: ; preds = %bb.14
%RSI62 = ptrtoint ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 3) to i64, !ROData_Index !4
%70 = call ptr @mrb_str_new_cstr()
%RAX63 = ptrtoint ptr %70 to i64
store i64 %RAX63, ptr %EAX-SKT-LOC, align 1
br label %bb.20
bb.17: ; preds = %bb.13
%memload64 = load i32, ptr %RSP_P.12, align 1
%71 = call ptr @RSTRING_LEN()
%RAX65 = ptrtoint ptr %71 to i64
%72 = trunc i64 %RAX65 to i32
%73 = sub i32 %72, %EBP
%74 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %72, i32 %EBP)
%CF66 = extractvalue { i32, i1 } %74, 1
%ZF67 = icmp eq i32 %73, 0
%highbit68 = and i32 -2147483648, %73
%SF69 = icmp ne i32 %highbit68, 0
%75 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %72, i32 %EBP)
%OF70 = extractvalue { i32, i1 } %75, 1
%76 = and i32 %73, 255
%77 = call i32 @llvm.ctpop.i32(i32 %76)
%78 = and i32 %77, 1
%PF71 = icmp eq i32 %78, 0
%CmpZF_JE83 = icmp eq i1 %ZF67, true
br i1 %CmpZF_JE83, label %bb.21, label %bb.18
bb.18: ; preds = %bb.17
%memload72 = load i32, ptr %RSP_P.12, align 1
%79 = call ptr @mrb_str_resize()
%RAX73 = ptrtoint ptr %79 to i64
store i64 %RAX73, ptr %EAX-SKT-LOC, align 1
br label %bb.20
bb.20: ; preds = %bb.19, %bb.18
%80 = load i64, ptr %EAX-SKT-LOC, align 1
%EAX = trunc i64 %80 to i32
store i32 %EAX, ptr %RSP_P.12, align 1
br label %bb.21
bb.16: ; preds = %bb.12
%RSI74 = ptrtoint ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 86) to i64, !ROData_Index !5
%81 = call ptr @mrb_sys_fail()
%RAX75 = ptrtoint ptr %81 to i64
br label %bb.21
bb.21: ; preds = %bb.20, %bb.16, %bb.17, %bb.15
%memload76 = load i32, ptr %RSP_P.12, align 1
%82 = zext i32 %memload76 to i64
store i64 %82, ptr %RAX-SKT-LOC, align 1
br label %bb.22
bb.22: ; preds = %bb.21, %bb.2
%RAX77 = load i64, ptr %RAX-SKT-LOC, align 1
%83 = inttoptr i64 %RAX77 to ptr
ret ptr %83
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
!1 = !{ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 4)}
!2 = !{ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 35)}
!3 = !{ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 58)}
!4 = !{ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 3)}
!5 = !{ptr getelementptr inbounds ([101 x i8], ptr @rodata_13, i32 0, i32 86)}
| ; ModuleID = 'AnghaBench/mruby/mrbgems/mruby-io/src/extr_io.c_mrb_io_sysread.c'
source_filename = "AnghaBench/mruby/mrbgems/mruby-io/src/extr_io.c_mrb_io_sysread.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [4 x i8] c"i|S\00", align 1
@E_ARGUMENT_ERROR = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [31 x i8] c"negative expanding string size\00", align 1
@E_IO_ERROR = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [23 x i8] c"not opened for reading\00", align 1
@.str.3 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@E_EOF_ERROR = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [28 x i8] c"sysread failed: End of File\00", align 1
@.str.5 = private unnamed_addr constant [15 x i8] c"sysread failed\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @mrb_io_sysread(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
%4 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%5 = tail call i32 @mrb_nil_value() #3
store i32 %5, ptr %3, align 4, !tbaa !6
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%6 = call i32 @mrb_get_args(ptr noundef %0, ptr noundef nonnull @.str, ptr noundef nonnull %4, ptr noundef nonnull %3) #3
%7 = load i64, ptr %4, align 8, !tbaa !10
%8 = icmp slt i64 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load i32, ptr @E_ARGUMENT_ERROR, align 4, !tbaa !6
%11 = call i32 @mrb_raise(ptr noundef %0, i32 noundef %10, ptr noundef nonnull @.str.1) #3
br label %16
12: ; preds = %2
%13 = icmp eq i64 %7, 0
br i1 %13, label %14, label %16
14: ; preds = %12
%15 = call i32 @mrb_str_new(ptr noundef %0, ptr noundef null, i64 noundef 0) #3
br label %73
16: ; preds = %12, %9
%17 = load i32, ptr %3, align 4, !tbaa !6
%18 = call i64 @mrb_nil_p(i32 noundef %17) #3
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %22
20: ; preds = %16
%21 = load i32, ptr %3, align 4, !tbaa !6
br label %25
22: ; preds = %16
%23 = load i64, ptr %4, align 8, !tbaa !10
%24 = call i32 @mrb_str_new(ptr noundef %0, ptr noundef null, i64 noundef %23) #3
store i32 %24, ptr %3, align 4, !tbaa !6
br label %25
25: ; preds = %20, %22
%26 = phi i32 [ %21, %20 ], [ %24, %22 ]
%27 = call i32 @RSTRING_LEN(i32 noundef %26) #3
%28 = sext i32 %27 to i64
%29 = load i64, ptr %4, align 8, !tbaa !10
%30 = icmp eq i64 %29, %28
%31 = load i32, ptr %3, align 4, !tbaa !6
br i1 %30, label %35, label %32
32: ; preds = %25
%33 = trunc i64 %29 to i32
%34 = call i32 @mrb_str_resize(ptr noundef %0, i32 noundef %31, i32 noundef %33) #3
store i32 %34, ptr %3, align 4, !tbaa !6
br label %38
35: ; preds = %25
%36 = call i32 @RSTRING(i32 noundef %31) #3
%37 = call i32 @mrb_str_modify(ptr noundef %0, i32 noundef %36) #3
br label %38
38: ; preds = %35, %32
%39 = call i64 @io_get_open_fptr(ptr noundef %0, i32 noundef %1) #3
%40 = inttoptr i64 %39 to ptr
%41 = getelementptr inbounds i8, ptr %40, i64 4
%42 = load i32, ptr %41, align 4, !tbaa !12
%43 = icmp eq i32 %42, 0
br i1 %43, label %44, label %47
44: ; preds = %38
%45 = load i32, ptr @E_IO_ERROR, align 4, !tbaa !6
%46 = call i32 @mrb_raise(ptr noundef %0, i32 noundef %45, ptr noundef nonnull @.str.2) #3
br label %47
47: ; preds = %44, %38
%48 = load i32, ptr %40, align 4, !tbaa !14
%49 = load i32, ptr %3, align 4, !tbaa !6
%50 = call i32 @RSTRING_PTR(i32 noundef %49) #3
%51 = load i64, ptr %4, align 8, !tbaa !10
%52 = trunc i64 %51 to i32
%53 = call i32 @read(i32 noundef %48, i32 noundef %50, i32 noundef %52) #3
switch i32 %53, label %64 [
i32 0, label %54
i32 -1, label %62
]
54: ; preds = %47
%55 = load i64, ptr %4, align 8, !tbaa !10
%56 = icmp eq i64 %55, 0
br i1 %56, label %57, label %59
57: ; preds = %54
%58 = call i32 @mrb_str_new_cstr(ptr noundef %0, ptr noundef nonnull @.str.3) #3
store i32 %58, ptr %3, align 4, !tbaa !6
br label %71
59: ; preds = %54
%60 = load i32, ptr @E_EOF_ERROR, align 4, !tbaa !6
%61 = call i32 @mrb_raise(ptr noundef %0, i32 noundef %60, ptr noundef nonnull @.str.4) #3
br label %71
62: ; preds = %47
%63 = call i32 @mrb_sys_fail(ptr noundef %0, ptr noundef nonnull @.str.5) #3
br label %71
64: ; preds = %47
%65 = load i32, ptr %3, align 4, !tbaa !6
%66 = call i32 @RSTRING_LEN(i32 noundef %65) #3
%67 = icmp eq i32 %66, %53
br i1 %67, label %71, label %68
68: ; preds = %64
%69 = load i32, ptr %3, align 4, !tbaa !6
%70 = call i32 @mrb_str_resize(ptr noundef %0, i32 noundef %69, i32 noundef %53) #3
store i32 %70, ptr %3, align 4, !tbaa !6
br label %71
71: ; preds = %64, %68, %57, %59, %62
%72 = load i32, ptr %3, align 4, !tbaa !6
br label %73
73: ; preds = %71, %14
%74 = phi i32 [ %72, %71 ], [ %15, %14 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %74
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @mrb_nil_value(...) local_unnamed_addr #2
declare i32 @mrb_get_args(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @mrb_raise(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @mrb_str_new(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @mrb_nil_p(i32 noundef) local_unnamed_addr #2
declare i32 @RSTRING_LEN(i32 noundef) local_unnamed_addr #2
declare i32 @mrb_str_resize(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mrb_str_modify(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @RSTRING(i32 noundef) local_unnamed_addr #2
declare i64 @io_get_open_fptr(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @read(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @RSTRING_PTR(i32 noundef) local_unnamed_addr #2
declare i32 @mrb_str_new_cstr(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @mrb_sys_fail(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !7, i64 4}
!13 = !{!"mrb_io", !7, i64 0, !7, i64 4}
!14 = !{!13, !7, i64 0}
| mruby_mrbgems_mruby-io_src_extr_io.c_mrb_io_sysread |
; ModuleID = 'linux_kernel_extr_softirq.c_wakeup_softirqd.so'
source_filename = "linux_kernel_extr_softirq.c_wakeup_softirqd.so"
@ksoftirqd = common dso_local global i32 0, align 4
@TASK_RUNNING = common dso_local global i64 0, align 8
declare dso_local ptr @__this_cpu_read()
declare dso_local ptr @wake_up_process()
define dso_local i64 @wakeup_softirqd() {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%memload = load i32, ptr @ksoftirqd, align 1
%0 = call ptr @__this_cpu_read()
%RAX = ptrtoint ptr %0 to i64
%1 = and i64 %RAX, %RAX
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %1, 0
%2 = and i64 %1, 255
%3 = call i64 @llvm.ctpop.i64(i64 %2)
%4 = and i64 %3, 1
%PF = icmp eq i64 %4, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%memload1 = load i64, ptr %0, align 1
%5 = load i64, ptr @TASK_RUNNING, align 8
%6 = sub i64 %memload1, %5
%7 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload1, i64 %5)
%CF = extractvalue { i64, i1 } %7, 1
%ZF2 = icmp eq i64 %6, 0
%highbit3 = and i64 -9223372036854775808, %6
%SF4 = icmp ne i64 %highbit3, 0
%8 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload1, i64 %5)
%OF = extractvalue { i64, i1 } %8, 1
%9 = and i64 %6, 255
%10 = call i64 @llvm.ctpop.i64(i64 %9)
%11 = and i64 %10, 1
%PF5 = icmp eq i64 %11, 0
%CmpZF_JNE = icmp eq i1 %ZF2, false
br i1 %CmpZF_JNE, label %bb.3, label %bb.2
bb.3: ; preds = %bb.1
%12 = tail call ptr @wake_up_process()
%RAX6 = ptrtoint ptr %12 to i64
br label %UnifiedReturnBlock
bb.2: ; preds = %bb.1, %entry
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.2, %bb.3
%UnifiedRetVal = phi i64 [ %RAX6, %bb.3 ], [ %RAX, %bb.2 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/kernel/extr_softirq.c_wakeup_softirqd.c'
source_filename = "AnghaBench/linux/kernel/extr_softirq.c_wakeup_softirqd.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ksoftirqd = common local_unnamed_addr global i32 0, align 4
@TASK_RUNNING = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @wakeup_softirqd], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @wakeup_softirqd() #0 {
%1 = load i32, ptr @ksoftirqd, align 4, !tbaa !6
%2 = tail call ptr @__this_cpu_read(i32 noundef %1) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %10, label %4
4: ; preds = %0
%5 = load i64, ptr %2, align 8, !tbaa !10
%6 = load i64, ptr @TASK_RUNNING, align 8, !tbaa !13
%7 = icmp eq i64 %5, %6
br i1 %7, label %10, label %8
8: ; preds = %4
%9 = tail call i32 @wake_up_process(ptr noundef nonnull %2) #2
br label %10
10: ; preds = %8, %4, %0
ret void
}
declare ptr @__this_cpu_read(i32 noundef) local_unnamed_addr #1
declare i32 @wake_up_process(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"task_struct", !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!12, !12, i64 0}
| linux_kernel_extr_softirq.c_wakeup_softirqd |
; ModuleID = 'linux_drivers_gpu_drm_i915_gvt_extr_kvmgt.c_intel_vgpu_set_msi_trigger.so'
source_filename = "linux_drivers_gpu_drm_i915_gvt_extr_kvmgt.c_intel_vgpu_set_msi_trigger.so"
@VFIO_IRQ_SET_DATA_EVENTFD = common dso_local global i32 0, align 4
@rodata_13 = private unnamed_addr constant [26 x i8] c"eventfd_ctx_fdget failed\0A\00", align 1, !ROData_SecInfo !0
@VFIO_IRQ_SET_DATA_NONE = common dso_local global i32 0, align 4
declare dso_local ptr @eventfd_ctx_fdget()
declare dso_local ptr @IS_ERR()
declare dso_local ptr @gvt_vgpu_err()
declare dso_local ptr @PTR_ERR()
declare dso_local ptr @intel_vgpu_release_msi_eventfd_ctx()
define dso_local i64 @intel_vgpu_set_msi_trigger(i64 %arg1, i64 %arg2, i64 %arg3, i32 %arg4, i32 %arg5, i64 %arg6) {
entry:
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%1 = load i32, ptr @VFIO_IRQ_SET_DATA_EVENTFD, align 4
%2 = zext i32 %1 to i64
%3 = zext i32 %arg5 to i64
%4 = and i64 %2, %3
%ZF = icmp eq i64 %4, 0
%highbit = and i64 -9223372036854775808, %4
%SF = icmp ne i64 %highbit, 0
%5 = and i64 %4, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF = icmp eq i64 %7, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%8 = inttoptr i64 %arg6 to ptr
%memload = load i32, ptr %8, align 1
%9 = call ptr @eventfd_ctx_fdget()
%RAX = ptrtoint ptr %9 to i64
%10 = call ptr @IS_ERR()
%RAX1 = ptrtoint ptr %10 to i64
%11 = and i64 %RAX1, %RAX1
%highbit2 = and i64 -9223372036854775808, %11
%SF3 = icmp ne i64 %highbit2, 0
%ZF4 = icmp eq i64 %11, 0
%12 = and i64 %11, 255
%13 = call i64 @llvm.ctpop.i64(i64 %12)
%14 = and i64 %13, 1
%PF5 = icmp eq i64 %14, 0
%CmpZF_JE9 = icmp eq i1 %ZF4, true
br i1 %CmpZF_JE9, label %bb.6, label %bb.2
bb.2: ; preds = %bb.1
%RDI = ptrtoint ptr @rodata_13 to i64
%15 = call ptr @gvt_vgpu_err()
%RAX6 = ptrtoint ptr %15 to i64
%16 = tail call ptr @PTR_ERR()
%RAX7 = ptrtoint ptr %16 to i64
br label %UnifiedReturnBlock
bb.6: ; preds = %bb.1
%17 = inttoptr i64 %RDI to ptr
store i64 %RAX, ptr %17, align 1
br label %bb.7
bb.3: ; preds = %entry
%18 = and i32 %arg4, %arg4
%highbit1 = and i32 -2147483648, %18
%SF2 = icmp ne i32 %highbit1, 0
%ZF3 = icmp eq i32 %18, 0
%19 = and i32 %18, 255
%20 = call i32 @llvm.ctpop.i32(i32 %19)
%21 = and i32 %20, 1
%PF4 = icmp eq i32 %21, 0
%CmpZF_JNE = icmp eq i1 %ZF3, false
br i1 %CmpZF_JNE, label %bb.7, label %bb.4
bb.4: ; preds = %bb.3
%memload5 = load i32, ptr @VFIO_IRQ_SET_DATA_NONE, align 1
%R8D = and i32 %arg5, %memload5
%22 = and i32 %R8D, 255
%23 = call i32 @llvm.ctpop.i32(i32 %22)
%24 = and i32 %23, 1
%PF6 = icmp eq i32 %24, 0
%CmpZF_JE10 = icmp eq i1 %ZF3, true
br i1 %CmpZF_JE10, label %bb.7, label %bb.5
bb.5: ; preds = %bb.4
%25 = call ptr @intel_vgpu_release_msi_eventfd_ctx()
%RAX8 = ptrtoint ptr %25 to i64
br label %bb.7
bb.7: ; preds = %bb.6, %bb.5, %bb.4, %bb.3
%26 = zext i32 0 to i64
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.7, %bb.2
%UnifiedRetVal = phi i64 [ %RAX7, %bb.2 ], [ %26, %bb.7 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/gvt/extr_kvmgt.c_intel_vgpu_set_msi_trigger.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/gvt/extr_kvmgt.c_intel_vgpu_set_msi_trigger.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VFIO_IRQ_SET_DATA_EVENTFD = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [26 x i8] c"eventfd_ctx_fdget failed\0A\00", align 1
@VFIO_IRQ_SET_DATA_NONE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @intel_vgpu_set_msi_trigger], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @intel_vgpu_set_msi_trigger(ptr noundef %0, i32 %1, i32 %2, i32 noundef %3, i32 noundef %4, ptr nocapture noundef readonly %5) #0 {
%7 = load i32, ptr @VFIO_IRQ_SET_DATA_EVENTFD, align 4, !tbaa !6
%8 = and i32 %7, %4
%9 = icmp eq i32 %8, 0
br i1 %9, label %19, label %10
10: ; preds = %6
%11 = load i32, ptr %5, align 4, !tbaa !6
%12 = tail call ptr @eventfd_ctx_fdget(i32 noundef %11) #2
%13 = tail call i64 @IS_ERR(ptr noundef %12) #2
%14 = icmp eq i64 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %10
store ptr %12, ptr %0, align 8, !tbaa !10
br label %27
16: ; preds = %10
%17 = tail call i32 @gvt_vgpu_err(ptr noundef nonnull @.str) #2
%18 = tail call i32 @PTR_ERR(ptr noundef %12) #2
br label %27
19: ; preds = %6
%20 = load i32, ptr @VFIO_IRQ_SET_DATA_NONE, align 4, !tbaa !6
%21 = and i32 %20, %4
%22 = icmp eq i32 %21, 0
%23 = icmp ne i32 %3, 0
%24 = or i1 %23, %22
br i1 %24, label %27, label %25
25: ; preds = %19
%26 = tail call i32 @intel_vgpu_release_msi_eventfd_ctx(ptr noundef %0) #2
br label %27
27: ; preds = %25, %19, %15, %16
%28 = phi i32 [ %18, %16 ], [ 0, %15 ], [ 0, %19 ], [ 0, %25 ]
ret i32 %28
}
declare ptr @eventfd_ctx_fdget(i32 noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @gvt_vgpu_err(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @intel_vgpu_release_msi_eventfd_ctx(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 0}
!11 = !{!"intel_vgpu", !12, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
| linux_drivers_gpu_drm_i915_gvt_extr_kvmgt.c_intel_vgpu_set_msi_trigger |
; ModuleID = 'php-src_ext_opcache_jit_dynasm_extr_minilua.c_tohex.so'
source_filename = "php-src_ext_opcache_jit_dynasm_extr_minilua.c_tohex.so"
@rodata_13 = private unnamed_addr constant [34 x i8] c"0123456789abcdef\000123456789ABCDEF\00", align 1, !ROData_SecInfo !0
declare dso_local ptr @barg()
declare dso_local ptr @lua_isnone()
declare dso_local ptr @lua_pushlstring()
define dso_local i32 @tohex(i64 %arg1) {
entry:
%R8-SKT-LOC = alloca i64, align 8
%ECX-SKT-LOC = alloca i32, align 4
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%1 = call ptr @barg()
%RAX = ptrtoint ptr %1 to i64
%R14D = trunc i64 %RAX to i32
%2 = call ptr @lua_isnone()
%RAX1 = ptrtoint ptr %2 to i64
%3 = and i64 %RAX1, %RAX1
%highbit = and i64 -9223372036854775808, %3
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %3, 0
%4 = and i64 %3, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%R8 = ptrtoint ptr @rodata_13 to i64
store i32 8, ptr %ECX-SKT-LOC, align 1
store i64 %R8, ptr %R8-SKT-LOC, align 1
br label %bb.3
bb.2: ; preds = %entry
%7 = call ptr @barg()
%RAX2 = ptrtoint ptr %7 to i64
%ECX = trunc i64 %RAX2 to i32
%CF = icmp ne i32 0, 0
%ECX7 = sub i32 0, %ECX
%ZF3 = icmp eq i32 %ECX7, 0
%highbit4 = and i32 -2147483648, %ECX7
%SF5 = icmp ne i32 %highbit4, 0
%8 = and i32 %ECX7, 255
%9 = call i32 @llvm.ctpop.i32(i32 %8)
%10 = and i32 %9, 1
%PF6 = icmp eq i32 %10, 0
%11 = trunc i64 %RAX2 to i32
%12 = trunc i64 %RAX2 to i32
%Cond_CMOVS = icmp eq i1 %SF5, true
%CMOV = select i1 %Cond_CMOVS, i32 %12, i32 %ECX7
%13 = trunc i64 %RAX2 to i32
%14 = trunc i64 %RAX2 to i32
%15 = and i32 %13, %14
%highbit8 = and i32 -2147483648, %15
%SF9 = icmp ne i32 %highbit8, 0
%ZF10 = icmp eq i32 %15, 0
%16 = and i32 %15, 255
%17 = call i32 @llvm.ctpop.i32(i32 %16)
%18 = and i32 %17, 1
%PF11 = icmp eq i32 %18, 0
%RDX = ptrtoint ptr getelementptr inbounds ([34 x i8], ptr @rodata_13, i32 0, i32 17) to i64, !ROData_Index !1
%R812 = ptrtoint ptr @rodata_13 to i64
%Cond_CMOVS13 = icmp eq i1 %SF9, true
%CMOV14 = select i1 %Cond_CMOVS13, i64 %RDX, i64 %R812
store i32 %CMOV, ptr %ECX-SKT-LOC, align 1
store i64 %CMOV14, ptr %R8-SKT-LOC, align 1
br label %bb.3
bb.3: ; preds = %bb.2, %bb.1
%ECX15 = load i32, ptr %ECX-SKT-LOC, align 1
%19 = sub i32 %ECX15, 8
%20 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %ECX15, i32 8)
%CF16 = extractvalue { i32, i1 } %20, 1
%ZF17 = icmp eq i32 %19, 0
%highbit18 = and i32 -2147483648, %19
%SF19 = icmp ne i32 %highbit18, 0
%21 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %ECX15, i32 8)
%OF = extractvalue { i32, i1 } %21, 1
%22 = and i32 %19, 255
%23 = call i32 @llvm.ctpop.i32(i32 %22)
%24 = and i32 %23, 1
%PF20 = icmp eq i32 %24, 0
%Cond_CMOVL = icmp ne i1 %SF19, %OF
%CMOV21 = select i1 %Cond_CMOVL, i32 %ECX15, i32 8
%25 = and i32 %CMOV21, %CMOV21
%highbit22 = and i32 -2147483648, %25
%SF23 = icmp ne i32 %highbit22, 0
%ZF24 = icmp eq i32 %25, 0
%26 = and i32 %25, 255
%27 = call i32 @llvm.ctpop.i32(i32 %26)
%28 = and i32 %27, 1
%PF25 = icmp eq i32 %28, 0
%CmpZF_JE181 = icmp eq i1 %ZF24, true
br i1 %CmpZF_JE181, label %bb.12, label %bb.4
bb.4: ; preds = %bb.3
%memref-disp = add i32 %CMOV21, -1
%RSI = zext i32 %memref-disp to i64
%ECX30 = and i32 %R14D, 15
%29 = and i32 %ECX30, 255
%30 = call i32 @llvm.ctpop.i32(i32 %29)
%31 = and i32 %30, 1
%PF26 = icmp eq i32 %31, 0
%ZF27 = icmp eq i32 %ECX30, 0
%highbit28 = and i32 -2147483648, %ECX30
%SF29 = icmp ne i32 %highbit28, 0
%32 = zext i32 %ECX30 to i64
%R831 = load i64, ptr %R8-SKT-LOC, align 1
%memref-basereg = add i64 %R831, %32
%33 = inttoptr i64 %memref-basereg to ptr
%memload = load i32, ptr %33, align 1
%34 = trunc i32 %memload to i8
%ECX32 = zext i8 %34 to i32
%EAX = trunc i64 %RSI to i32
%35 = ptrtoint ptr %stktop_8 to i64
%36 = zext i32 %EAX to i64
%idx-a = add i64 %35, %36
%37 = inttoptr i64 %idx-a to ptr
%38 = trunc i32 %ECX32 to i8
store i8 %38, ptr %37, align 1
%39 = sub i32 %CMOV21, 2
%40 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %CMOV21, i32 2)
%CF33 = extractvalue { i32, i1 } %40, 1
%ZF34 = icmp eq i32 %39, 0
%highbit35 = and i32 -2147483648, %39
%SF36 = icmp ne i32 %highbit35, 0
%41 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %CMOV21, i32 2)
%OF37 = extractvalue { i32, i1 } %41, 1
%42 = and i32 %39, 255
%43 = call i32 @llvm.ctpop.i32(i32 %42)
%44 = and i32 %43, 1
%PF38 = icmp eq i32 %44, 0
%CmpCF_JB = icmp eq i1 %CF33, true
br i1 %CmpCF_JB, label %bb.13, label %bb.5
bb.5: ; preds = %bb.4
%EAX42 = lshr i32 %R14D, 4
%ZF39 = icmp eq i32 %EAX42, 0
%highbit40 = and i32 -2147483648, %EAX42
%SF41 = icmp ne i32 %highbit40, 0
%memref-disp43 = add i32 %CMOV21, -2
%RCX = zext i32 %memref-disp43 to i64
%EAX48 = and i32 %EAX42, 15
%45 = and i32 %EAX48, 255
%46 = call i32 @llvm.ctpop.i32(i32 %45)
%47 = and i32 %46, 1
%PF44 = icmp eq i32 %47, 0
%ZF45 = icmp eq i32 %EAX48, 0
%highbit46 = and i32 -2147483648, %EAX48
%SF47 = icmp ne i32 %highbit46, 0
%48 = zext i32 %EAX48 to i64
%memref-basereg49 = add i64 %R831, %48
%49 = inttoptr i64 %memref-basereg49 to ptr
%memload50 = load i32, ptr %49, align 1
%50 = trunc i32 %memload50 to i8
%EAX51 = zext i8 %50 to i32
%EDI = trunc i64 %RCX to i32
%51 = ptrtoint ptr %stktop_8 to i64
%52 = zext i32 %EDI to i64
%idx-a52 = add i64 %51, %52
%53 = inttoptr i64 %idx-a52 to ptr
%54 = trunc i32 %EAX51 to i8
store i8 %54, ptr %53, align 1
%55 = trunc i64 %RSI to i32
%56 = trunc i64 2 to i32
%57 = sub i32 %55, %56
%58 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %55, i32 %56)
%CF53 = extractvalue { i32, i1 } %58, 1
%ZF54 = icmp eq i32 %57, 0
%highbit55 = and i32 -2147483648, %57
%SF56 = icmp ne i32 %highbit55, 0
%59 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %55, i32 %56)
%OF57 = extractvalue { i32, i1 } %59, 1
%60 = and i32 %57, 255
%61 = call i32 @llvm.ctpop.i32(i32 %60)
%62 = and i32 %61, 1
%PF58 = icmp eq i32 %62, 0
%SFAndOF_JL = icmp ne i1 %SF56, %OF57
br i1 %SFAndOF_JL, label %bb.13, label %bb.6
bb.6: ; preds = %bb.5
%EAX62 = lshr i32 %R14D, 8
%ZF59 = icmp eq i32 %EAX62, 0
%highbit60 = and i32 -2147483648, %EAX62
%SF61 = icmp ne i32 %highbit60, 0
%memref-disp63 = add i32 %CMOV21, -3
%RSI64 = zext i32 %memref-disp63 to i64
%EAX69 = and i32 %EAX62, 15
%63 = and i32 %EAX69, 255
%64 = call i32 @llvm.ctpop.i32(i32 %63)
%65 = and i32 %64, 1
%PF65 = icmp eq i32 %65, 0
%ZF66 = icmp eq i32 %EAX69, 0
%highbit67 = and i32 -2147483648, %EAX69
%SF68 = icmp ne i32 %highbit67, 0
%66 = zext i32 %EAX69 to i64
%memref-basereg70 = add i64 %R831, %66
%67 = inttoptr i64 %memref-basereg70 to ptr
%memload71 = load i32, ptr %67, align 1
%68 = trunc i32 %memload71 to i8
%EAX72 = zext i8 %68 to i32
%EDI73 = trunc i64 %RSI64 to i32
%69 = ptrtoint ptr %stktop_8 to i64
%70 = zext i32 %EDI73 to i64
%idx-a74 = add i64 %69, %70
%71 = inttoptr i64 %idx-a74 to ptr
%72 = trunc i32 %EAX72 to i8
store i8 %72, ptr %71, align 1
%73 = trunc i64 %RCX to i32
%74 = trunc i64 2 to i32
%75 = sub i32 %73, %74
%76 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %73, i32 %74)
%CF75 = extractvalue { i32, i1 } %76, 1
%ZF76 = icmp eq i32 %75, 0
%highbit77 = and i32 -2147483648, %75
%SF78 = icmp ne i32 %highbit77, 0
%77 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %73, i32 %74)
%OF79 = extractvalue { i32, i1 } %77, 1
%78 = and i32 %75, 255
%79 = call i32 @llvm.ctpop.i32(i32 %78)
%80 = and i32 %79, 1
%PF80 = icmp eq i32 %80, 0
%SFAndOF_JL182 = icmp ne i1 %SF78, %OF79
br i1 %SFAndOF_JL182, label %bb.13, label %bb.7
bb.7: ; preds = %bb.6
%EAX84 = lshr i32 %R14D, 12
%ZF81 = icmp eq i32 %EAX84, 0
%highbit82 = and i32 -2147483648, %EAX84
%SF83 = icmp ne i32 %highbit82, 0
%memref-disp85 = add i32 %CMOV21, -4
%RCX86 = zext i32 %memref-disp85 to i64
%EAX91 = and i32 %EAX84, 15
%81 = and i32 %EAX91, 255
%82 = call i32 @llvm.ctpop.i32(i32 %81)
%83 = and i32 %82, 1
%PF87 = icmp eq i32 %83, 0
%ZF88 = icmp eq i32 %EAX91, 0
%highbit89 = and i32 -2147483648, %EAX91
%SF90 = icmp ne i32 %highbit89, 0
%84 = zext i32 %EAX91 to i64
%memref-basereg92 = add i64 %R831, %84
%85 = inttoptr i64 %memref-basereg92 to ptr
%memload93 = load i32, ptr %85, align 1
%86 = trunc i32 %memload93 to i8
%EAX94 = zext i8 %86 to i32
%EDI95 = trunc i64 %RCX86 to i32
%87 = ptrtoint ptr %stktop_8 to i64
%88 = zext i32 %EDI95 to i64
%idx-a96 = add i64 %87, %88
%89 = inttoptr i64 %idx-a96 to ptr
%90 = trunc i32 %EAX94 to i8
store i8 %90, ptr %89, align 1
%91 = trunc i64 %RSI64 to i32
%92 = trunc i64 2 to i32
%93 = sub i32 %91, %92
%94 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %91, i32 %92)
%CF97 = extractvalue { i32, i1 } %94, 1
%ZF98 = icmp eq i32 %93, 0
%highbit99 = and i32 -2147483648, %93
%SF100 = icmp ne i32 %highbit99, 0
%95 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %91, i32 %92)
%OF101 = extractvalue { i32, i1 } %95, 1
%96 = and i32 %93, 255
%97 = call i32 @llvm.ctpop.i32(i32 %96)
%98 = and i32 %97, 1
%PF102 = icmp eq i32 %98, 0
%SFAndOF_JL183 = icmp ne i1 %SF100, %OF101
br i1 %SFAndOF_JL183, label %bb.13, label %bb.8
bb.8: ; preds = %bb.7
%EAX106 = lshr i32 %R14D, 16
%ZF103 = icmp eq i32 %EAX106, 0
%highbit104 = and i32 -2147483648, %EAX106
%SF105 = icmp ne i32 %highbit104, 0
%memref-disp107 = add i32 %CMOV21, -5
%RSI108 = zext i32 %memref-disp107 to i64
%EAX113 = and i32 %EAX106, 15
%99 = and i32 %EAX113, 255
%100 = call i32 @llvm.ctpop.i32(i32 %99)
%101 = and i32 %100, 1
%PF109 = icmp eq i32 %101, 0
%ZF110 = icmp eq i32 %EAX113, 0
%highbit111 = and i32 -2147483648, %EAX113
%SF112 = icmp ne i32 %highbit111, 0
%102 = zext i32 %EAX113 to i64
%memref-basereg114 = add i64 %R831, %102
%103 = inttoptr i64 %memref-basereg114 to ptr
%memload115 = load i32, ptr %103, align 1
%104 = trunc i32 %memload115 to i8
%EAX116 = zext i8 %104 to i32
%EDI117 = trunc i64 %RSI108 to i32
%105 = ptrtoint ptr %stktop_8 to i64
%106 = zext i32 %EDI117 to i64
%idx-a118 = add i64 %105, %106
%107 = inttoptr i64 %idx-a118 to ptr
%108 = trunc i32 %EAX116 to i8
store i8 %108, ptr %107, align 1
%109 = trunc i64 %RCX86 to i32
%110 = trunc i64 2 to i32
%111 = sub i32 %109, %110
%112 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %109, i32 %110)
%CF119 = extractvalue { i32, i1 } %112, 1
%ZF120 = icmp eq i32 %111, 0
%highbit121 = and i32 -2147483648, %111
%SF122 = icmp ne i32 %highbit121, 0
%113 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %109, i32 %110)
%OF123 = extractvalue { i32, i1 } %113, 1
%114 = and i32 %111, 255
%115 = call i32 @llvm.ctpop.i32(i32 %114)
%116 = and i32 %115, 1
%PF124 = icmp eq i32 %116, 0
%SFAndOF_JL184 = icmp ne i1 %SF122, %OF123
br i1 %SFAndOF_JL184, label %bb.13, label %bb.9
bb.9: ; preds = %bb.8
%EAX128 = lshr i32 %R14D, 20
%ZF125 = icmp eq i32 %EAX128, 0
%highbit126 = and i32 -2147483648, %EAX128
%SF127 = icmp ne i32 %highbit126, 0
%memref-disp129 = add i32 %CMOV21, -6
%RCX130 = zext i32 %memref-disp129 to i64
%EAX135 = and i32 %EAX128, 15
%117 = and i32 %EAX135, 255
%118 = call i32 @llvm.ctpop.i32(i32 %117)
%119 = and i32 %118, 1
%PF131 = icmp eq i32 %119, 0
%ZF132 = icmp eq i32 %EAX135, 0
%highbit133 = and i32 -2147483648, %EAX135
%SF134 = icmp ne i32 %highbit133, 0
%120 = zext i32 %EAX135 to i64
%memref-basereg136 = add i64 %R831, %120
%121 = inttoptr i64 %memref-basereg136 to ptr
%memload137 = load i32, ptr %121, align 1
%122 = trunc i32 %memload137 to i8
%EAX138 = zext i8 %122 to i32
%EDI139 = trunc i64 %RCX130 to i32
%123 = ptrtoint ptr %stktop_8 to i64
%124 = zext i32 %EDI139 to i64
%idx-a140 = add i64 %123, %124
%125 = inttoptr i64 %idx-a140 to ptr
%126 = trunc i32 %EAX138 to i8
store i8 %126, ptr %125, align 1
%127 = trunc i64 %RSI108 to i32
%128 = trunc i64 2 to i32
%129 = sub i32 %127, %128
%130 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %127, i32 %128)
%CF141 = extractvalue { i32, i1 } %130, 1
%ZF142 = icmp eq i32 %129, 0
%highbit143 = and i32 -2147483648, %129
%SF144 = icmp ne i32 %highbit143, 0
%131 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %127, i32 %128)
%OF145 = extractvalue { i32, i1 } %131, 1
%132 = and i32 %129, 255
%133 = call i32 @llvm.ctpop.i32(i32 %132)
%134 = and i32 %133, 1
%PF146 = icmp eq i32 %134, 0
%SFAndOF_JL185 = icmp ne i1 %SF144, %OF145
br i1 %SFAndOF_JL185, label %bb.13, label %bb.10
bb.10: ; preds = %bb.9
%EAX150 = lshr i32 %R14D, 24
%ZF147 = icmp eq i32 %EAX150, 0
%highbit148 = and i32 -2147483648, %EAX150
%SF149 = icmp ne i32 %highbit148, 0
%memref-disp151 = add i32 %CMOV21, -7
%EAX156 = and i32 %EAX150, 15
%135 = and i32 %EAX156, 255
%136 = call i32 @llvm.ctpop.i32(i32 %135)
%137 = and i32 %136, 1
%PF152 = icmp eq i32 %137, 0
%ZF153 = icmp eq i32 %EAX156, 0
%highbit154 = and i32 -2147483648, %EAX156
%SF155 = icmp ne i32 %highbit154, 0
%138 = zext i32 %EAX156 to i64
%memref-basereg157 = add i64 %R831, %138
%139 = inttoptr i64 %memref-basereg157 to ptr
%memload158 = load i32, ptr %139, align 1
%140 = trunc i32 %memload158 to i8
%EAX159 = zext i8 %140 to i32
%141 = ptrtoint ptr %stktop_8 to i64
%142 = zext i32 %memref-disp151 to i64
%idx-a160 = add i64 %141, %142
%143 = inttoptr i64 %idx-a160 to ptr
%144 = trunc i32 %EAX159 to i8
store i8 %144, ptr %143, align 1
%145 = trunc i64 %RCX130 to i32
%146 = trunc i64 2 to i32
%147 = sub i32 %145, %146
%148 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %145, i32 %146)
%CF161 = extractvalue { i32, i1 } %148, 1
%ZF162 = icmp eq i32 %147, 0
%highbit163 = and i32 -2147483648, %147
%SF164 = icmp ne i32 %highbit163, 0
%149 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %145, i32 %146)
%OF165 = extractvalue { i32, i1 } %149, 1
%150 = and i32 %147, 255
%151 = call i32 @llvm.ctpop.i32(i32 %150)
%152 = and i32 %151, 1
%PF166 = icmp eq i32 %152, 0
%SFAndOF_JL186 = icmp ne i1 %SF164, %OF165
br i1 %SFAndOF_JL186, label %bb.13, label %bb.11
bb.11: ; preds = %bb.10
%153 = zext i32 %R14D to i64
%RCX170 = lshr i64 %153, 28
%ZF167 = icmp eq i64 %RCX170, 0
%highbit168 = and i64 -9223372036854775808, %RCX170
%SF169 = icmp ne i64 %highbit168, 0
%EAX174 = add nsw i32 -8, %CMOV21
%highbit171 = and i32 -2147483648, %EAX174
%SF172 = icmp ne i32 %highbit171, 0
%ZF173 = icmp eq i32 %EAX174, 0
%memref-basereg175 = add i64 %R831, %RCX170
%154 = inttoptr i64 %memref-basereg175 to ptr
%memload176 = load i32, ptr %154, align 1
%155 = trunc i32 %memload176 to i8
%ECX177 = zext i8 %155 to i32
%156 = ptrtoint ptr %stktop_8 to i64
%157 = zext i32 %EAX174 to i64
%idx-a178 = add i64 %156, %157
%158 = inttoptr i64 %idx-a178 to ptr
%159 = trunc i32 %ECX177 to i8
store i8 %159, ptr %158, align 1
br label %bb.13
bb.12: ; preds = %bb.3
br label %bb.13
bb.13: ; preds = %bb.12, %bb.11, %bb.10, %bb.9, %bb.8, %bb.7, %bb.6, %bb.5, %bb.4
%RSI179 = ptrtoint ptr %stktop_8 to i64
%160 = call ptr @lua_pushlstring()
%RAX180 = ptrtoint ptr %160 to i64
ret i32 1
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
!1 = !{ptr getelementptr inbounds ([34 x i8], ptr @rodata_13, i32 0, i32 17)}
| ; ModuleID = 'AnghaBench/php-src/ext/opcache/jit/dynasm/extr_minilua.c_tohex.c'
source_filename = "AnghaBench/php-src/ext/opcache/jit/dynasm/extr_minilua.c_tohex.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [17 x i8] c"0123456789abcdef\00", align 1
@.str.1 = private unnamed_addr constant [17 x i8] c"0123456789ABCDEF\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @tohex], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @tohex(ptr noundef %0) #0 {
%2 = alloca [8 x i8], align 1
%3 = tail call i32 @barg(ptr noundef %0, i32 noundef 1) #4
%4 = tail call i64 @lua_isnone(ptr noundef %0, i32 noundef 2) #4
%5 = icmp eq i64 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %1
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #4
br label %13
7: ; preds = %1
%8 = tail call i32 @barg(ptr noundef %0, i32 noundef 2) #4
%9 = freeze i32 %8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #4
%10 = icmp slt i32 %9, 0
%11 = select i1 %10, ptr @.str.1, ptr @.str
%12 = icmp eq i32 %9, 0
br i1 %12, label %101, label %13
13: ; preds = %6, %7
%14 = phi ptr [ @.str, %6 ], [ %11, %7 ]
%15 = phi i32 [ 8, %6 ], [ %9, %7 ]
%16 = tail call i32 @llvm.abs.i32(i32 %15, i1 false)
%17 = tail call i32 @llvm.smin.i32(i32 %16, i32 8)
%18 = zext i32 %17 to i64
%19 = add nsw i64 %18, -1
%20 = and i32 %3, 15
%21 = zext nneg i32 %20 to i64
%22 = getelementptr inbounds i8, ptr %14, i64 %21
%23 = load i8, ptr %22, align 1, !tbaa !6
%24 = and i64 %19, 4294967295
%25 = getelementptr inbounds [8 x i8], ptr %2, i64 0, i64 %24
store i8 %23, ptr %25, align 1, !tbaa !6
%26 = icmp sgt i32 %16, 1
br i1 %26, label %27, label %101, !llvm.loop !9
27: ; preds = %13
%28 = lshr i32 %3, 4
%29 = add nsw i64 %18, -2
%30 = and i32 %28, 15
%31 = zext nneg i32 %30 to i64
%32 = getelementptr inbounds i8, ptr %14, i64 %31
%33 = load i8, ptr %32, align 1, !tbaa !6
%34 = and i64 %29, 4294967295
%35 = getelementptr inbounds [8 x i8], ptr %2, i64 0, i64 %34
store i8 %33, ptr %35, align 1, !tbaa !6
%36 = trunc nuw i64 %19 to i32
%37 = icmp sgt i32 %36, 1
br i1 %37, label %38, label %101, !llvm.loop !9
38: ; preds = %27
%39 = lshr i32 %3, 8
%40 = add nsw i64 %18, -3
%41 = and i32 %39, 15
%42 = zext nneg i32 %41 to i64
%43 = getelementptr inbounds i8, ptr %14, i64 %42
%44 = load i8, ptr %43, align 1, !tbaa !6
%45 = and i64 %40, 4294967295
%46 = getelementptr inbounds [8 x i8], ptr %2, i64 0, i64 %45
store i8 %44, ptr %46, align 1, !tbaa !6
%47 = trunc nuw i64 %29 to i32
%48 = icmp sgt i32 %47, 1
br i1 %48, label %49, label %101, !llvm.loop !9
49: ; preds = %38
%50 = lshr i32 %3, 12
%51 = add nsw i64 %18, -4
%52 = and i32 %50, 15
%53 = zext nneg i32 %52 to i64
%54 = getelementptr inbounds i8, ptr %14, i64 %53
%55 = load i8, ptr %54, align 1, !tbaa !6
%56 = and i64 %51, 4294967295
%57 = getelementptr inbounds [8 x i8], ptr %2, i64 0, i64 %56
store i8 %55, ptr %57, align 1, !tbaa !6
%58 = trunc nuw i64 %40 to i32
%59 = icmp sgt i32 %58, 1
br i1 %59, label %60, label %101, !llvm.loop !9
60: ; preds = %49
%61 = lshr i32 %3, 16
%62 = add nsw i64 %18, -5
%63 = and i32 %61, 15
%64 = zext nneg i32 %63 to i64
%65 = getelementptr inbounds i8, ptr %14, i64 %64
%66 = load i8, ptr %65, align 1, !tbaa !6
%67 = and i64 %62, 4294967295
%68 = getelementptr inbounds [8 x i8], ptr %2, i64 0, i64 %67
store i8 %66, ptr %68, align 1, !tbaa !6
%69 = trunc nuw i64 %51 to i32
%70 = icmp sgt i32 %69, 1
br i1 %70, label %71, label %101, !llvm.loop !9
71: ; preds = %60
%72 = lshr i32 %3, 20
%73 = add nsw i64 %18, -6
%74 = and i32 %72, 15
%75 = zext nneg i32 %74 to i64
%76 = getelementptr inbounds i8, ptr %14, i64 %75
%77 = load i8, ptr %76, align 1, !tbaa !6
%78 = and i64 %73, 4294967295
%79 = getelementptr inbounds [8 x i8], ptr %2, i64 0, i64 %78
store i8 %77, ptr %79, align 1, !tbaa !6
%80 = trunc nuw i64 %62 to i32
%81 = icmp sgt i32 %80, 1
br i1 %81, label %82, label %101, !llvm.loop !9
82: ; preds = %71
%83 = lshr i32 %3, 24
%84 = add nuw nsw i64 %18, 4294967289
%85 = and i32 %83, 15
%86 = zext nneg i32 %85 to i64
%87 = getelementptr inbounds i8, ptr %14, i64 %86
%88 = load i8, ptr %87, align 1, !tbaa !6
%89 = and i64 %84, 4294967295
%90 = getelementptr inbounds [8 x i8], ptr %2, i64 0, i64 %89
store i8 %88, ptr %90, align 1, !tbaa !6
%91 = trunc nuw i64 %73 to i32
%92 = icmp sgt i32 %91, 1
br i1 %92, label %93, label %101, !llvm.loop !9
93: ; preds = %82
%94 = lshr i32 %3, 28
%95 = add nuw nsw i64 %18, 4294967288
%96 = zext nneg i32 %94 to i64
%97 = getelementptr inbounds i8, ptr %14, i64 %96
%98 = load i8, ptr %97, align 1, !tbaa !6
%99 = and i64 %95, 4294967295
%100 = getelementptr inbounds [8 x i8], ptr %2, i64 0, i64 %99
store i8 %98, ptr %100, align 1, !tbaa !6
br label %101
101: ; preds = %13, %27, %38, %49, %60, %71, %82, %93, %7
%102 = phi i32 [ 0, %7 ], [ %15, %93 ], [ %15, %82 ], [ %15, %71 ], [ %15, %60 ], [ %15, %49 ], [ %15, %38 ], [ %15, %27 ], [ %15, %13 ]
%103 = tail call i32 @llvm.abs.i32(i32 %102, i1 true)
%104 = tail call i32 @llvm.umin.i32(i32 %103, i32 8)
%105 = zext nneg i32 %104 to i64
%106 = call i32 @lua_pushlstring(ptr noundef %0, ptr noundef nonnull %2, i64 noundef %105) #4
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #4
ret i32 1
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @barg(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @lua_isnone(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @lua_pushlstring(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #3
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #3
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| php-src_ext_opcache_jit_dynasm_extr_minilua.c_tohex |
; ModuleID = 'Quake-III-Arena_code_client_extr_cl_cin.c_yuv_to_rgb24.so'
source_filename = "Quake-III-Arena_code_client_extr_cl_cin.c_yuv_to_rgb24.so"
@ROQ_YY_tab = common dso_local global i64 0, align 8
@ROQ_VR_tab = common dso_local global i64 0, align 8
@ROQ_UG_tab = common dso_local global i64 0, align 8
@ROQ_VG_tab = common dso_local global i64 0, align 8
@ROQ_UB_tab = common dso_local global i64 0, align 8
declare dso_local ptr @LittleLong()
define dso_local i64 @yuv_to_rgb24(i64 %arg1, i64 %arg2, i64 %arg3) {
entry:
%memload = load i64, ptr @ROQ_YY_tab, align 1
%memref-idxreg = mul i64 8, %arg1
%memref-basereg = add i64 %memload, %memref-idxreg
%0 = inttoptr i64 %memref-basereg to ptr
%memload1 = load i64, ptr %0, align 1
%memload2 = load i64, ptr @ROQ_VR_tab, align 1
%memref-idxreg3 = mul i64 8, %arg3
%memref-basereg4 = add i64 %memload2, %memref-idxreg3
%1 = inttoptr i64 %memref-basereg4 to ptr
%memload5 = load i64, ptr %1, align 1
%R8 = add nsw i64 %memload5, %memload1
%highbit = and i64 -9223372036854775808, %R8
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %R8, 0
%R89 = lshr i64 %R8, 6
%ZF6 = icmp eq i64 %R89, 0
%highbit7 = and i64 -9223372036854775808, %R89
%SF8 = icmp ne i64 %highbit7, 0
%memload10 = load i64, ptr @ROQ_UG_tab, align 1
%memref-idxreg11 = mul i64 8, %arg2
%memref-basereg12 = add i64 %memload10, %memref-idxreg11
%2 = inttoptr i64 %memref-basereg12 to ptr
%memload13 = load i64, ptr %2, align 1
%RCX = add nsw i64 %memload13, %memload1
%highbit14 = and i64 -9223372036854775808, %RCX
%SF15 = icmp ne i64 %highbit14, 0
%ZF16 = icmp eq i64 %RCX, 0
%memload17 = load i64, ptr @ROQ_VG_tab, align 1
%memref-idxreg18 = mul i64 8, %arg3
%memref-basereg19 = add i64 %memload17, %memref-idxreg18
%3 = inttoptr i64 %memref-basereg19 to ptr
%memload20 = load i64, ptr %3, align 1
%RCX21 = add i64 %RCX, %memload20
%4 = and i64 %RCX21, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
%RCX25 = lshr i64 %RCX21, 6
%ZF22 = icmp eq i64 %RCX25, 0
%highbit23 = and i64 -9223372036854775808, %RCX25
%SF24 = icmp ne i64 %highbit23, 0
%memload26 = load i64, ptr @ROQ_UB_tab, align 1
%memref-idxreg27 = mul i64 8, %arg2
%memref-basereg28 = add i64 %memload26, %memref-idxreg27
%7 = inttoptr i64 %memref-basereg28 to ptr
%memload29 = load i64, ptr %7, align 1
%RDI = add i64 %memload1, %memload29
%8 = and i64 %RDI, 255
%9 = call i64 @llvm.ctpop.i64(i64 %8)
%10 = and i64 %9, 1
%PF30 = icmp eq i64 %10, 0
%RDI34 = lshr i64 %RDI, 6
%ZF31 = icmp eq i64 %RDI34, 0
%highbit32 = and i64 -9223372036854775808, %RDI34
%SF33 = icmp ne i64 %highbit32, 0
%11 = and i64 %R89, %R89
%highbit35 = and i64 -9223372036854775808, %11
%SF36 = icmp ne i64 %highbit35, 0
%ZF37 = icmp eq i64 %11, 0
%12 = and i64 %11, 255
%13 = call i64 @llvm.ctpop.i64(i64 %12)
%14 = and i64 %13, 1
%PF38 = icmp eq i64 %14, 0
%15 = zext i32 0 to i64
%16 = zext i32 0 to i64
%ZFCmp_CMOVLE = icmp eq i1 %ZF37, true
%SFOFCmp_CMOVLE = icmp ne i1 %SF36, false
%Cond_CMOVLE = or i1 %ZFCmp_CMOVLE, %SFOFCmp_CMOVLE
%CMOV = select i1 %Cond_CMOVLE, i64 %16, i64 %R89
%17 = and i64 %RCX25, %RCX25
%highbit39 = and i64 -9223372036854775808, %17
%SF40 = icmp ne i64 %highbit39, 0
%ZF41 = icmp eq i64 %17, 0
%18 = and i64 %17, 255
%19 = call i64 @llvm.ctpop.i64(i64 %18)
%20 = and i64 %19, 1
%PF42 = icmp eq i64 %20, 0
%21 = zext i32 0 to i64
%22 = zext i32 0 to i64
%ZFCmp_CMOVLE43 = icmp eq i1 %ZF41, true
%SFOFCmp_CMOVLE44 = icmp ne i1 %SF40, false
%Cond_CMOVLE45 = or i1 %ZFCmp_CMOVLE43, %SFOFCmp_CMOVLE44
%CMOV46 = select i1 %Cond_CMOVLE45, i64 %22, i64 %RCX25
%23 = and i64 %RDI34, %RDI34
%highbit47 = and i64 -9223372036854775808, %23
%SF48 = icmp ne i64 %highbit47, 0
%ZF49 = icmp eq i64 %23, 0
%24 = and i64 %23, 255
%25 = call i64 @llvm.ctpop.i64(i64 %24)
%26 = and i64 %25, 1
%PF50 = icmp eq i64 %26, 0
%27 = zext i32 0 to i64
%28 = zext i32 0 to i64
%ZFCmp_CMOVLE51 = icmp eq i1 %ZF49, true
%SFOFCmp_CMOVLE52 = icmp ne i1 %SF48, false
%Cond_CMOVLE53 = or i1 %ZFCmp_CMOVLE51, %SFOFCmp_CMOVLE52
%CMOV54 = select i1 %Cond_CMOVLE53, i64 %28, i64 %RDI34
%29 = sub i64 %CMOV, 255
%30 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %CMOV, i64 255)
%CF = extractvalue { i64, i1 } %30, 1
%ZF55 = icmp eq i64 %29, 0
%highbit56 = and i64 -9223372036854775808, %29
%SF57 = icmp ne i64 %highbit56, 0
%31 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %CMOV, i64 255)
%OF = extractvalue { i64, i1 } %31, 1
%32 = and i64 %29, 255
%33 = call i64 @llvm.ctpop.i64(i64 %32)
%34 = and i64 %33, 1
%PF58 = icmp eq i64 %34, 0
%35 = zext i32 255 to i64
%36 = zext i32 255 to i64
%Cond_CMOVAE = icmp eq i1 %CF, false
%CMOV59 = select i1 %Cond_CMOVAE, i64 %36, i64 %CMOV
%37 = sub i64 %CMOV46, 255
%38 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %CMOV46, i64 255)
%CF60 = extractvalue { i64, i1 } %38, 1
%ZF61 = icmp eq i64 %37, 0
%highbit62 = and i64 -9223372036854775808, %37
%SF63 = icmp ne i64 %highbit62, 0
%39 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %CMOV46, i64 255)
%OF64 = extractvalue { i64, i1 } %39, 1
%40 = and i64 %37, 255
%41 = call i64 @llvm.ctpop.i64(i64 %40)
%42 = and i64 %41, 1
%PF65 = icmp eq i64 %42, 0
%43 = zext i32 255 to i64
%44 = zext i32 255 to i64
%Cond_CMOVAE66 = icmp eq i1 %CF60, false
%CMOV67 = select i1 %Cond_CMOVAE66, i64 %44, i64 %CMOV46
%45 = sub i64 %CMOV54, 255
%46 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %CMOV54, i64 255)
%CF68 = extractvalue { i64, i1 } %46, 1
%ZF69 = icmp eq i64 %45, 0
%highbit70 = and i64 -9223372036854775808, %45
%SF71 = icmp ne i64 %highbit70, 0
%47 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %CMOV54, i64 255)
%OF72 = extractvalue { i64, i1 } %47, 1
%48 = and i64 %45, 255
%49 = call i64 @llvm.ctpop.i64(i64 %48)
%50 = and i64 %49, 1
%PF73 = icmp eq i64 %50, 0
%51 = zext i32 255 to i64
%52 = zext i32 255 to i64
%Cond_CMOVAE74 = icmp eq i1 %CF68, false
%CMOV75 = select i1 %Cond_CMOVAE74, i64 %52, i64 %CMOV54
%53 = trunc i64 %CMOV67 to i32
%ECX = shl i32 %53, 8
%ZF76 = icmp eq i32 %ECX, 0
%highbit77 = and i32 -2147483648, %ECX
%SF78 = icmp ne i32 %highbit77, 0
%54 = trunc i64 %CMOV75 to i32
%EDI = shl i32 %54, 16
%ZF79 = icmp eq i32 %EDI, 0
%highbit80 = and i32 -2147483648, %EDI
%SF81 = icmp ne i32 %highbit80, 0
%55 = trunc i64 %CMOV59 to i32
%EDI86 = or i32 %EDI, %55
%highbit82 = and i32 -2147483648, %EDI86
%SF83 = icmp ne i32 %highbit82, 0
%ZF84 = icmp eq i32 %EDI86, 0
%56 = and i32 %EDI86, 255
%57 = call i32 @llvm.ctpop.i32(i32 %56)
%58 = and i32 %57, 1
%PF85 = icmp eq i32 %58, 0
%EDI91 = or i32 %EDI86, %ECX
%highbit87 = and i32 -2147483648, %EDI91
%SF88 = icmp ne i32 %highbit87, 0
%ZF89 = icmp eq i32 %EDI91, 0
%59 = and i32 %EDI91, 255
%60 = call i32 @llvm.ctpop.i32(i32 %59)
%61 = and i32 %60, 1
%PF90 = icmp eq i32 %61, 0
%62 = zext i32 %EDI91 to i64
%RDI96 = or i64 %62, -16777216
%63 = and i64 %RDI96, 255
%64 = call i64 @llvm.ctpop.i64(i64 %63)
%65 = and i64 %64, 1
%PF92 = icmp eq i64 %65, 0
%ZF93 = icmp eq i64 %RDI96, 0
%highbit94 = and i64 -9223372036854775808, %RDI96
%SF95 = icmp ne i64 %highbit94, 0
%66 = tail call ptr @LittleLong()
%RAX = ptrtoint ptr %66 to i64
ret i64 %RAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/Quake-III-Arena/code/client/extr_cl_cin.c_yuv_to_rgb24.c'
source_filename = "AnghaBench/Quake-III-Arena/code/client/extr_cl_cin.c_yuv_to_rgb24.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ROQ_YY_tab = common local_unnamed_addr global ptr null, align 8
@ROQ_VR_tab = common local_unnamed_addr global ptr null, align 8
@ROQ_UG_tab = common local_unnamed_addr global ptr null, align 8
@ROQ_VG_tab = common local_unnamed_addr global ptr null, align 8
@ROQ_UB_tab = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @yuv_to_rgb24], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @yuv_to_rgb24(i64 noundef %0, i64 noundef %1, i64 noundef %2) #0 {
%4 = load ptr, ptr @ROQ_YY_tab, align 8, !tbaa !6
%5 = getelementptr inbounds i64, ptr %4, i64 %0
%6 = load i64, ptr %5, align 8, !tbaa !10
%7 = load ptr, ptr @ROQ_VR_tab, align 8, !tbaa !6
%8 = getelementptr inbounds i64, ptr %7, i64 %2
%9 = load i64, ptr %8, align 8, !tbaa !10
%10 = add nsw i64 %9, %6
%11 = ashr i64 %10, 6
%12 = load ptr, ptr @ROQ_UG_tab, align 8, !tbaa !6
%13 = getelementptr inbounds i64, ptr %12, i64 %1
%14 = load i64, ptr %13, align 8, !tbaa !10
%15 = add nsw i64 %14, %6
%16 = load ptr, ptr @ROQ_VG_tab, align 8, !tbaa !6
%17 = getelementptr inbounds i64, ptr %16, i64 %2
%18 = load i64, ptr %17, align 8, !tbaa !10
%19 = add nsw i64 %15, %18
%20 = ashr i64 %19, 6
%21 = load ptr, ptr @ROQ_UB_tab, align 8, !tbaa !6
%22 = getelementptr inbounds i64, ptr %21, i64 %1
%23 = load i64, ptr %22, align 8, !tbaa !10
%24 = add nsw i64 %23, %6
%25 = ashr i64 %24, 6
%26 = tail call i64 @llvm.smax.i64(i64 %11, i64 0)
%27 = tail call i64 @llvm.smax.i64(i64 %20, i64 0)
%28 = tail call i64 @llvm.smax.i64(i64 %25, i64 0)
%29 = tail call i64 @llvm.umin.i64(i64 %26, i64 255)
%30 = tail call i64 @llvm.umin.i64(i64 %27, i64 255)
%31 = tail call i64 @llvm.umin.i64(i64 %28, i64 255)
%32 = shl nuw nsw i64 %30, 8
%33 = or disjoint i64 %32, %29
%34 = shl nuw nsw i64 %31, 16
%35 = or disjoint i64 %34, %33
%36 = or disjoint i64 %35, -16777216
%37 = tail call i32 @LittleLong(i64 noundef %36) #3
ret i32 %37
}
declare i32 @LittleLong(i64 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.smax.i64(i64, i64) #2
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umin.i64(i64, i64) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
| Quake-III-Arena_code_client_extr_cl_cin.c_yuv_to_rgb24 |
; ModuleID = 'FFmpeg_libavcodec_mips_extr_vp9_mc_msa.c_common_vt_8t_16w_msa.so'
source_filename = "FFmpeg_libavcodec_mips_extr_vp9_mc_msa.c_common_vt_8t_16w_msa.so"
declare dso_local ptr @LD_SH()
declare dso_local ptr @SPLATI_H4_SB()
declare dso_local ptr @LD_SB7()
declare dso_local ptr @XORI_B7_128_SB()
declare dso_local ptr @ILVR_B4_SB()
declare dso_local ptr @ILVR_B2_SB()
declare dso_local ptr @ILVL_B4_SB()
declare dso_local ptr @ILVL_B2_SB()
declare dso_local ptr @LD_SB4()
declare dso_local ptr @XORI_B4_128_SB()
declare dso_local ptr @FILT_8TAP_DPADD_S_H()
declare dso_local ptr @SRARI_H4_SH()
declare dso_local ptr @SAT_SH4_SH()
declare dso_local ptr @PCKEV_B4_UB()
declare dso_local ptr @XORI_B4_128_UB()
declare dso_local ptr @ST_UB4()
define dso_local ptr @common_vt_8t_16w_msa(i64 %arg1, i32 %arg2, i64 %arg3, i64 %arg4, i64 %arg5, i32 %arg6) {
entry:
%RAX-SKT-LOC = alloca i64, align 8
%RDX-SKT-LOC = alloca i64, align 8
%EBP-SKT-LOC = alloca i64, align 8
%RBX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 240, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 0
%RSP_P.0 = inttoptr i64 %0 to ptr
%1 = add i64 %tos, 8
%RSP_P.8 = inttoptr i64 %1 to ptr
%2 = add i64 %tos, 52
%RSP_P.52 = inttoptr i64 %2 to ptr
%3 = add i64 %tos, 56
%RSP_P.56 = inttoptr i64 %3 to ptr
%4 = add i64 %tos, 60
%RSP_P.60 = inttoptr i64 %4 to ptr
%5 = add i64 %tos, 64
%RSP_P.64 = inttoptr i64 %5 to ptr
%6 = add i64 %tos, 68
%RSP_P.68 = inttoptr i64 %6 to ptr
%7 = add i64 %tos, 72
%RSP_P.72 = inttoptr i64 %7 to ptr
%8 = add i64 %tos, 80
%RSP_P.80 = inttoptr i64 %8 to ptr
%9 = add i64 %tos, 88
%RSP_P.88 = inttoptr i64 %9 to ptr
%10 = add i64 %tos, 96
%RSP_P.96 = inttoptr i64 %10 to ptr
%11 = add i64 %tos, 104
%RSP_P.104 = inttoptr i64 %11 to ptr
%12 = add i64 %tos, 112
%RSP_P.112 = inttoptr i64 %12 to ptr
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 %arg4, ptr %RSP_P.80, align 1
%13 = zext i32 %arg2 to i64
%memref-idxreg = mul i64 2, %13
%14 = zext i32 %arg2 to i64
%memref-basereg = add i64 %14, %memref-idxreg
%EAX = trunc i64 %memref-basereg to i32
%RAX = sext i32 %EAX to i64
%RAX1 = shl i64 %RAX, 2
%ZF = icmp eq i64 %RAX1, 0
%highbit = and i64 -9223372036854775808, %RAX1
%SF = icmp ne i64 %highbit, 0
%R14 = sub i64 %arg1, %RAX1
%15 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %arg1, i64 %RAX1)
%CF = extractvalue { i64, i1 } %15, 1
%ZF2 = icmp eq i64 %R14, 0
%highbit3 = and i64 -9223372036854775808, %R14
%SF4 = icmp ne i64 %highbit3, 0
%16 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %arg1, i64 %RAX1)
%OF = extractvalue { i64, i1 } %16, 1
%17 = and i64 %R14, 255
%18 = call i64 @llvm.ctpop.i64(i64 %17)
%19 = and i64 %18, 1
%PF = icmp eq i64 %19, 0
%20 = call ptr @LD_SH()
%RAX5 = ptrtoint ptr %20 to i64
%EDI = trunc i64 %RAX5 to i32
%21 = call ptr @SPLATI_H4_SB()
%RAX6 = ptrtoint ptr %21 to i64
%22 = zext i32 %arg2 to i64
store i64 %22, ptr %RSP_P.72, align 1
%23 = call ptr @LD_SB7()
%RAX7 = ptrtoint ptr %23 to i64
%24 = call ptr @XORI_B7_128_SB()
%RAX8 = ptrtoint ptr %24 to i64
%25 = call ptr @ILVR_B4_SB()
%RAX9 = ptrtoint ptr %25 to i64
%26 = call ptr @ILVR_B2_SB()
%RAX10 = ptrtoint ptr %26 to i64
%27 = call ptr @ILVL_B4_SB()
%RAX11 = ptrtoint ptr %27 to i64
%28 = call ptr @ILVL_B2_SB()
%RAX12 = ptrtoint ptr %28 to i64
%29 = sub i32 %arg6, 4
%30 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %arg6, i32 4)
%CF13 = extractvalue { i32, i1 } %30, 1
%ZF14 = icmp eq i32 %29, 0
%highbit15 = and i32 -2147483648, %29
%SF16 = icmp ne i32 %highbit15, 0
%31 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %arg6, i32 4)
%OF17 = extractvalue { i32, i1 } %31, 1
%32 = and i32 %29, 255
%33 = call i32 @llvm.ctpop.i32(i32 %32)
%34 = and i32 %33, 1
%PF18 = icmp eq i32 %34, 0
store i64 %arg3, ptr %RBX-SKT-LOC, align 1
store i64 %RAX12, ptr %RAX-SKT-LOC, align 1
%CmpCF_JB = icmp eq i1 %CF13, true
br i1 %CmpCF_JB, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%EBP = lshr i32 %arg6, 2
%ZF19 = icmp eq i32 %EBP, 0
%highbit20 = and i32 -2147483648, %EBP
%SF21 = icmp ne i32 %highbit20, 0
%memload = load i64, ptr %RSP_P.72, align 1
%memref-idxreg22 = mul i64 8, %memload
%EAX23 = trunc i64 %memref-idxreg22 to i32
%35 = trunc i64 %memload to i32
%EAX24 = sub i32 %EAX23, %35
%36 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EAX23, i32 %35)
%CF25 = extractvalue { i32, i1 } %36, 1
%ZF26 = icmp eq i32 %EAX24, 0
%highbit27 = and i32 -2147483648, %EAX24
%SF28 = icmp ne i32 %highbit27, 0
%37 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EAX23, i32 %35)
%OF29 = extractvalue { i32, i1 } %37, 1
%38 = and i32 %EAX24, 255
%39 = call i32 @llvm.ctpop.i32(i32 %38)
%40 = and i32 %39, 1
%PF30 = icmp eq i32 %40, 0
%RAX31 = sext i32 %EAX24 to i64
%memref-idxreg32 = mul i64 4, %RAX31
%memref-basereg33 = add i64 %R14, %memref-idxreg32
%memref-idxreg34 = mul i64 4, %memload
%EAX35 = trunc i64 %memref-idxreg34 to i32
%RAX36 = sext i32 %EAX35 to i64
store i64 %RAX36, ptr %RSP_P.104, align 1
%memload37 = load i64, ptr %RSP_P.80, align 1
%memref-idxreg38 = mul i64 4, %memload37
%EAX39 = trunc i64 %memref-idxreg38 to i32
%RAX40 = sext i32 %EAX39 to i64
store i64 %RAX40, ptr %RSP_P.96, align 1
%41 = zext i32 %EBP to i64
store i64 %41, ptr %EBP-SKT-LOC, align 1
store i64 %memref-basereg33, ptr %RDX-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.2
%RBX = load i64, ptr %RBX-SKT-LOC, align 1
store i64 %RBX, ptr %RSP_P.112, align 1
%42 = load i64, ptr %EBP-SKT-LOC, align 1
%EBP41 = trunc i64 %42 to i32
store i32 %EBP41, ptr %RSP_P.68, align 1
%RDX = load i64, ptr %RDX-SKT-LOC, align 1
store i64 %RDX, ptr %RSP_P.88, align 1
%memload42 = load i64, ptr %RSP_P.88, align 1
%memload43 = load i64, ptr %RSP_P.72, align 1
%43 = call ptr @LD_SB4()
%RAX44 = ptrtoint ptr %43 to i64
%44 = call ptr @XORI_B4_128_SB()
%RAX45 = ptrtoint ptr %44 to i64
%45 = call ptr @ILVR_B4_SB()
%RAX46 = ptrtoint ptr %45 to i64
%46 = call ptr @ILVL_B4_SB()
%RAX47 = ptrtoint ptr %46 to i64
%47 = call ptr @FILT_8TAP_DPADD_S_H()
%RAX48 = ptrtoint ptr %47 to i64
%R13D = trunc i64 %RAX48 to i32
%48 = call ptr @FILT_8TAP_DPADD_S_H()
%RAX49 = ptrtoint ptr %48 to i64
%R12D = trunc i64 %RAX49 to i32
%49 = call ptr @FILT_8TAP_DPADD_S_H()
%RAX50 = ptrtoint ptr %49 to i64
%R14D = trunc i64 %RAX50 to i32
%50 = call ptr @FILT_8TAP_DPADD_S_H()
%RAX51 = ptrtoint ptr %50 to i64
%EBP52 = trunc i64 %RAX51 to i32
%51 = call ptr @FILT_8TAP_DPADD_S_H()
%RAX53 = ptrtoint ptr %51 to i64
%52 = trunc i64 %RAX53 to i32
store i32 %52, ptr %RSP_P.52, align 1
%53 = call ptr @FILT_8TAP_DPADD_S_H()
%RAX54 = ptrtoint ptr %53 to i64
%R15D = trunc i64 %RAX54 to i32
%54 = call ptr @FILT_8TAP_DPADD_S_H()
%RAX55 = ptrtoint ptr %54 to i64
%55 = trunc i64 %RAX55 to i32
store i32 %55, ptr %RSP_P.56, align 1
%56 = call ptr @FILT_8TAP_DPADD_S_H()
%RAX56 = ptrtoint ptr %56 to i64
%EBX = trunc i64 %RAX56 to i32
store i32 %R12D, ptr %RSP_P.60, align 1
store i32 %R14D, ptr %RSP_P.64, align 1
%57 = call ptr @SRARI_H4_SH()
%RAX57 = ptrtoint ptr %57 to i64
%memload58 = load i32, ptr %RSP_P.52, align 1
%memload59 = load i32, ptr %RSP_P.56, align 1
%58 = call ptr @SRARI_H4_SH()
%RAX60 = ptrtoint ptr %58 to i64
%59 = call ptr @SAT_SH4_SH()
%RAX61 = ptrtoint ptr %59 to i64
%memload62 = load i32, ptr %RSP_P.52, align 1
%memload63 = load i32, ptr %RSP_P.56, align 1
%60 = call ptr @SAT_SH4_SH()
%RAX64 = ptrtoint ptr %60 to i64
store i32 %EBP52, ptr %RSP_P.8, align 1
store i32 %EBX, ptr %stktop_8, align 1
%memload65 = load i32, ptr %RSP_P.60, align 1
%memload66 = load i64, ptr %RSP_P.112, align 1
%memload67 = load i32, ptr %RSP_P.68, align 1
%memload68 = load i32, ptr %RSP_P.64, align 1
%61 = call ptr @PCKEV_B4_UB()
%RAX69 = ptrtoint ptr %61 to i64
%62 = call ptr @XORI_B4_128_UB()
%RAX70 = ptrtoint ptr %62 to i64
%memload71 = load i64, ptr %RSP_P.80, align 1
%63 = call ptr @ST_UB4()
%RAX72 = ptrtoint ptr %63 to i64
%memload73 = load i64, ptr %RSP_P.88, align 1
%memload74 = load i64, ptr %RSP_P.104, align 1
%memref-idxreg75 = mul i64 4, %memload74
%memref-basereg76 = add i64 %memload73, %memref-idxreg75
%memload77 = load i64, ptr %RSP_P.96, align 1
%memref-idxreg78 = mul i64 4, %memload77
%memref-basereg79 = add i64 %memload66, %memref-idxreg78
%EBP84 = sub i32 %memload67, 1
%64 = and i32 %EBP84, 255
%65 = call i32 @llvm.ctpop.i32(i32 %64)
%66 = and i32 %65, 1
%PF80 = icmp eq i32 %66, 0
%ZF81 = icmp eq i32 %EBP84, 0
%highbit82 = and i32 -2147483648, %EBP84
%SF83 = icmp ne i32 %highbit82, 0
store i64 %memload77, ptr %RAX-SKT-LOC, align 1
%CmpZF_JNE = icmp eq i1 %ZF81, false
%67 = zext i32 %EBP84 to i64
store i64 %67, ptr %EBP-SKT-LOC, align 1
store i64 %memref-basereg79, ptr %RBX-SKT-LOC, align 1
store i64 %memref-basereg76, ptr %RDX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.2, label %bb.3
bb.3: ; preds = %bb.2, %entry
%RAX85 = load i64, ptr %RAX-SKT-LOC, align 1
%68 = inttoptr i64 %RAX85 to ptr
ret ptr %68
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/FFmpeg/libavcodec/mips/extr_vp9_mc_msa.c_common_vt_8t_16w_msa.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/mips/extr_vp9_mc_msa.c_common_vt_8t_16w_msa.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @common_vt_8t_16w_msa], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @common_vt_8t_16w_msa(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, ptr noundef %4, i32 noundef %5) #0 {
%7 = mul nsw i32 %1, 3
%8 = sext i32 %7 to i64
%9 = sub nsw i64 0, %8
%10 = getelementptr inbounds i32, ptr %0, i64 %9
%11 = tail call i32 @LD_SH(ptr noundef %4) #2
%12 = tail call i32 @SPLATI_H4_SB(i32 noundef %11, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%13 = tail call i32 @LD_SB7(ptr noundef %10, i32 noundef %1, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%14 = tail call i32 @XORI_B7_128_SB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%15 = tail call i32 @ILVR_B4_SB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%16 = tail call i32 @ILVR_B2_SB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%17 = tail call i32 @ILVL_B4_SB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%18 = tail call i32 @ILVL_B2_SB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%19 = icmp ult i32 %5, 4
br i1 %19, label %56, label %20
20: ; preds = %6
%21 = ashr i32 %5, 2
%22 = mul nsw i32 %1, 7
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i32, ptr %10, i64 %23
%25 = shl nsw i32 %1, 2
%26 = sext i32 %25 to i64
%27 = shl nsw i32 %3, 2
%28 = sext i32 %27 to i64
br label %29
29: ; preds = %20, %29
%30 = phi ptr [ %24, %20 ], [ %36, %29 ]
%31 = phi ptr [ %2, %20 ], [ %54, %29 ]
%32 = phi i32 [ %21, %20 ], [ %33, %29 ]
%33 = add nsw i32 %32, -1
%34 = tail call i32 @LD_SB4(ptr noundef %30, i32 noundef %1, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%35 = tail call i32 @XORI_B4_128_SB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%36 = getelementptr inbounds i32, ptr %30, i64 %26
%37 = tail call i32 @ILVR_B4_SB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%38 = tail call i32 @ILVL_B4_SB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%39 = tail call i32 @FILT_8TAP_DPADD_S_H(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%40 = tail call i32 @FILT_8TAP_DPADD_S_H(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%41 = tail call i32 @FILT_8TAP_DPADD_S_H(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%42 = tail call i32 @FILT_8TAP_DPADD_S_H(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%43 = tail call i32 @FILT_8TAP_DPADD_S_H(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%44 = tail call i32 @FILT_8TAP_DPADD_S_H(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%45 = tail call i32 @FILT_8TAP_DPADD_S_H(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%46 = tail call i32 @FILT_8TAP_DPADD_S_H(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%47 = tail call i32 @SRARI_H4_SH(i32 noundef %39, i32 noundef %40, i32 noundef %41, i32 noundef %42, i32 noundef 7) #2
%48 = tail call i32 @SRARI_H4_SH(i32 noundef %43, i32 noundef %44, i32 noundef %45, i32 noundef %46, i32 noundef 7) #2
%49 = tail call i32 @SAT_SH4_SH(i32 noundef %39, i32 noundef %40, i32 noundef %41, i32 noundef %42, i32 noundef 7) #2
%50 = tail call i32 @SAT_SH4_SH(i32 noundef %43, i32 noundef %44, i32 noundef %45, i32 noundef %46, i32 noundef 7) #2
%51 = tail call i32 @PCKEV_B4_UB(i32 noundef %43, i32 noundef %39, i32 noundef %44, i32 noundef %40, i32 noundef %45, i32 noundef %41, i32 noundef %46, i32 noundef %42, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%52 = tail call i32 @XORI_B4_128_UB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%53 = tail call i32 @ST_UB4(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, ptr noundef %31, i32 noundef %3) #2
%54 = getelementptr inbounds i32, ptr %31, i64 %28
%55 = icmp eq i32 %33, 0
br i1 %55, label %56, label %29, !llvm.loop !6
56: ; preds = %29, %6
ret void
}
declare i32 @LD_SH(ptr noundef) local_unnamed_addr #1
declare i32 @SPLATI_H4_SB(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LD_SB7(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @XORI_B7_128_SB(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ILVR_B4_SB(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ILVR_B2_SB(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ILVL_B4_SB(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ILVL_B2_SB(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LD_SB4(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @XORI_B4_128_SB(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @FILT_8TAP_DPADD_S_H(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SRARI_H4_SH(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SAT_SH4_SH(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PCKEV_B4_UB(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @XORI_B4_128_UB(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ST_UB4(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = distinct !{!6, !7}
!7 = !{!"llvm.loop.mustprogress"}
| FFmpeg_libavcodec_mips_extr_vp9_mc_msa.c_common_vt_8t_16w_msa |
; ModuleID = 'reactos_drivers_filesystems_ext2_src_extr_fileinfo.c_Ext2ExpandFile.so'
source_filename = "reactos_drivers_filesystems_ext2_src_extr_fileinfo.c_Ext2ExpandFile.so"
@BLOCK_SIZE = common dso_local global i32 0, align 4
@BLOCK_BITS = common dso_local global i32 0, align 4
@STATUS_SUCCESS = common dso_local global i32 0, align 4
@STATUS_INVALID_DEVICE_REQUEST = common dso_local global i32 0, align 4
@IRP_MJ_WRITE = common dso_local global i64 0, align 8
declare dso_local ptr @IsMcbSpecialFile()
declare dso_local ptr @INODE_HAS_EXTENT()
declare dso_local ptr @Ext2ExpandExtent()
declare dso_local ptr @IsMcbDirectory()
declare dso_local ptr @Ext2ExpandIndirect()
define dso_local i64 @Ext2ExpandFile(i64 %arg1, i32 %arg2, i64 %arg3, i64 %arg4) {
entry:
%EBP-SKT-LOC = alloca i32, align 4
%RAX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memload = load i32, ptr @BLOCK_SIZE, align 1
%R15D = sub i32 %memload, 1
%1 = and i32 %R15D, 255
%2 = call i32 @llvm.ctpop.i32(i32 %1)
%3 = and i32 %2, 1
%PF = icmp eq i32 %3, 0
%ZF = icmp eq i32 %R15D, 0
%highbit = and i32 -2147483648, %R15D
%SF = icmp ne i32 %highbit, 0
%4 = inttoptr i64 %arg3 to ptr
%memload1 = load i32, ptr %4, align 1
%EBX = add nsw i32 %memload1, %R15D
%highbit2 = and i32 -2147483648, %EBX
%SF3 = icmp ne i32 %highbit2, 0
%ZF4 = icmp eq i32 %EBX, 0
%memload5 = load i32, ptr @BLOCK_BITS, align 1
%5 = trunc i32 %memload5 to i8
%6 = zext i8 %5 to i32
%shift-cnt-msk = and i32 %6, 63
%EBX9 = ashr i32 %EBX, %shift-cnt-msk
%shrd_cf_count_cmp = icmp sgt i32 %shift-cnt-msk, 0
%7 = sub i32 32, %shift-cnt-msk
%shld_cf_count_shift = shl i32 1, %7
%shld_cf_count_and = and i32 %EBX, %shld_cf_count_shift
%shld_cf_count_shft_out = icmp sgt i32 %shld_cf_count_and, 0
%shld_cf_update = select i1 %shrd_cf_count_cmp, i1 %shld_cf_count_shft_out, i1 false
%ZF6 = icmp eq i32 %EBX9, 0
%highbit7 = and i32 -2147483648, %EBX9
%SF8 = icmp ne i32 %highbit7, 0
%8 = inttoptr i64 %arg4 to ptr
%memload10 = load i32, ptr %8, align 1
%R15D12 = add i32 %R15D, %memload10
%9 = and i32 %R15D12, 255
%10 = call i32 @llvm.ctpop.i32(i32 %9)
%11 = and i32 %10, 1
%PF11 = icmp eq i32 %11, 0
%12 = trunc i32 %memload5 to i8
%13 = zext i8 %12 to i32
%shift-cnt-msk13 = and i32 %13, 63
%R15D22 = ashr i32 %R15D12, %shift-cnt-msk13
%shrd_cf_count_cmp14 = icmp sgt i32 %shift-cnt-msk13, 0
%14 = sub i32 32, %shift-cnt-msk13
%shld_cf_count_shift15 = shl i32 1, %14
%shld_cf_count_and16 = and i32 %R15D12, %shld_cf_count_shift15
%shld_cf_count_shft_out17 = icmp sgt i32 %shld_cf_count_and16, 0
%shld_cf_update18 = select i1 %shrd_cf_count_cmp14, i1 %shld_cf_count_shft_out17, i1 %shld_cf_update
%ZF19 = icmp eq i32 %R15D22, 0
%highbit20 = and i32 -2147483648, %R15D22
%SF21 = icmp ne i32 %highbit20, 0
%15 = sub i32 %EBX9, %R15D22
%16 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EBX9, i32 %R15D22)
%CF = extractvalue { i32, i1 } %16, 1
%ZF23 = icmp eq i32 %15, 0
%highbit24 = and i32 -2147483648, %15
%SF25 = icmp ne i32 %highbit24, 0
%17 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EBX9, i32 %R15D22)
%OF = extractvalue { i32, i1 } %17, 1
%18 = and i32 %15, 255
%19 = call i32 @llvm.ctpop.i32(i32 %18)
%20 = and i32 %19, 1
%PF26 = icmp eq i32 %20, 0
%21 = ptrtoint ptr @STATUS_SUCCESS to i64
store i64 %21, ptr %RAX-SKT-LOC, align 1
%CmpSFOF_JGE = icmp eq i1 %SF25, %OF
br i1 %CmpSFOF_JGE, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%22 = ptrtoint ptr %stktop_8 to i64
%23 = add i64 %22, 4
%24 = inttoptr i64 %23 to ptr
store i32 %arg2, ptr %24, align 1
%memload27 = load i32, ptr @STATUS_SUCCESS, align 1
%25 = call ptr @IsMcbSpecialFile()
%RAX = ptrtoint ptr %25 to i64
%26 = and i64 %RAX, %RAX
%highbit28 = and i64 -9223372036854775808, %26
%SF29 = icmp ne i64 %highbit28, 0
%ZF30 = icmp eq i64 %26, 0
%27 = and i64 %26, 255
%28 = call i64 @llvm.ctpop.i64(i64 %27)
%29 = and i64 %28, 1
%PF31 = icmp eq i64 %29, 0
store i32 %memload27, ptr %EBP-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF30, true
br i1 %CmpZF_JE, label %bb.6, label %bb.2
bb.2: ; preds = %bb.1
%30 = ptrtoint ptr @STATUS_INVALID_DEVICE_REQUEST to i64
store i64 %30, ptr %RAX-SKT-LOC, align 1
br label %bb.4
bb.6: ; preds = %bb.1
%RBX = sext i32 %EBX9 to i64
%R15 = sext i32 %R15D22 to i64
%31 = call ptr @INODE_HAS_EXTENT()
%RAX32 = ptrtoint ptr %31 to i64
%32 = and i64 %RAX32, %RAX32
%highbit33 = and i64 -9223372036854775808, %32
%SF34 = icmp ne i64 %highbit33, 0
%ZF35 = icmp eq i64 %32, 0
%33 = and i64 %32, 255
%34 = call i64 @llvm.ctpop.i64(i64 %33)
%35 = and i64 %34, 1
%PF36 = icmp eq i64 %35, 0
%CmpZF_JE30 = icmp eq i1 %ZF35, true
br i1 %CmpZF_JE30, label %bb.8, label %bb.7
bb.7: ; preds = %bb.6
%36 = ptrtoint ptr %stktop_8 to i64
%37 = add i64 %36, 4
%38 = inttoptr i64 %37 to ptr
%memload37 = load i32, ptr %38, align 1
%39 = tail call ptr @Ext2ExpandExtent()
%RAX38 = ptrtoint ptr %39 to i64
br label %UnifiedReturnBlock
bb.8: ; preds = %bb.6
%40 = inttoptr i64 %RDI39 to ptr
%memload2 = load i64, ptr %40, align 1
%41 = load i64, ptr @IRP_MJ_WRITE, align 8
%42 = sub i64 %memload2, %41
%43 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload2, i64 %41)
%CF3 = extractvalue { i64, i1 } %43, 1
%ZF5 = icmp eq i64 %42, 0
%highbit6 = and i64 -9223372036854775808, %42
%SF7 = icmp ne i64 %highbit6, 0
%44 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload2, i64 %41)
%OF8 = extractvalue { i64, i1 } %44, 1
%45 = and i64 %42, 255
%46 = call i64 @llvm.ctpop.i64(i64 %45)
%47 = and i64 %46, 1
%PF9 = icmp eq i64 %47, 0
%CmpZF_JE31 = icmp eq i1 %ZF5, true
br i1 %CmpZF_JE31, label %bb.10, label %bb.9
bb.9: ; preds = %bb.8
%48 = call ptr @IsMcbDirectory()
%RAX10 = ptrtoint ptr %48 to i64
%49 = and i64 %RAX10, %RAX10
%highbit11 = and i64 -9223372036854775808, %49
%SF12 = icmp ne i64 %highbit11, 0
%ZF13 = icmp eq i64 %49, 0
%50 = and i64 %49, 255
%51 = call i64 @llvm.ctpop.i64(i64 %50)
%52 = and i64 %51, 1
%PF14 = icmp eq i64 %52, 0
%CmpZF_JE32 = icmp eq i1 %ZF13, true
br i1 %CmpZF_JE32, label %bb.5, label %bb.10
bb.10: ; preds = %bb.9, %bb.8
%53 = ptrtoint ptr %stktop_8 to i64
%54 = add i64 %53, 4
%55 = inttoptr i64 %54 to ptr
%memload15 = load i32, ptr %55, align 1
%56 = tail call ptr @Ext2ExpandIndirect()
%RAX16 = ptrtoint ptr %56 to i64
br label %UnifiedReturnBlock
bb.3: ; preds = %entry
%57 = trunc i32 %memload5 to i8
%58 = zext i8 %57 to i32
%shift-cnt-msk17 = and i32 %58, 63
%EBX27 = shl i32 %EBX9, %shift-cnt-msk17
%shrd_cf_count_cmp18 = icmp sgt i32 %shift-cnt-msk17, 0
%59 = sub i32 32, %shift-cnt-msk17
%shld_cf_count_shift19 = shl i32 1, %59
%shld_cf_count_and20 = and i32 %EBX9, %shld_cf_count_shift19
%shld_cf_count_shft_out21 = icmp sgt i32 %shld_cf_count_and20, 0
%shld_cf_update22 = select i1 %shrd_cf_count_cmp18, i1 %shld_cf_count_shft_out21, i1 false
%ZF24 = icmp eq i32 %EBX27, 0
%highbit25 = and i32 -2147483648, %EBX27
%SF26 = icmp ne i32 %highbit25, 0
%60 = inttoptr i64 %R9 to ptr
store i32 %EBX27, ptr %60, align 1
br label %bb.4
bb.4: ; preds = %bb.3, %bb.2
%RAX28 = load i64, ptr %RAX-SKT-LOC, align 1
%61 = inttoptr i64 %RAX28 to ptr
%memload29 = load i32, ptr %61, align 1
store i32 %memload29, ptr %EBP-SKT-LOC, align 1
br label %bb.5
bb.5: ; preds = %bb.4, %bb.9
%EBP = load i32, ptr %EBP-SKT-LOC, align 1
%62 = zext i32 %EBP to i64
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.5, %bb.10, %bb.7
%UnifiedRetVal = phi i64 [ %RAX38, %bb.7 ], [ %RAX16, %bb.10 ], [ %62, %bb.5 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/reactos/drivers/filesystems/ext2/src/extr_fileinfo.c_Ext2ExpandFile.c'
source_filename = "AnghaBench/reactos/drivers/filesystems/ext2/src/extr_fileinfo.c_Ext2ExpandFile.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@STATUS_SUCCESS = common local_unnamed_addr global i32 0, align 4
@BLOCK_SIZE = common local_unnamed_addr global i32 0, align 4
@BLOCK_BITS = common local_unnamed_addr global i32 0, align 4
@STATUS_INVALID_DEVICE_REQUEST = common local_unnamed_addr global i32 0, align 4
@IRP_MJ_WRITE = common local_unnamed_addr global i64 0, align 8
@TRUE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @Ext2ExpandFile(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = load i32, ptr @STATUS_SUCCESS, align 4, !tbaa !6
%6 = load i32, ptr %2, align 4, !tbaa !10
%7 = load i32, ptr @BLOCK_SIZE, align 4, !tbaa !6
%8 = add i32 %7, -1
%9 = add i32 %8, %6
%10 = load i32, ptr @BLOCK_BITS, align 4, !tbaa !6
%11 = ashr i32 %9, %10
%12 = sext i32 %11 to i64
%13 = load i32, ptr %3, align 4, !tbaa !13
%14 = add i32 %8, %13
%15 = ashr i32 %14, %10
%16 = sext i32 %15 to i64
%17 = icmp slt i32 %11, %15
br i1 %17, label %21, label %18
18: ; preds = %4
%19 = shl i32 %11, %10
store i32 %19, ptr %3, align 4, !tbaa !13
%20 = load i32, ptr @STATUS_SUCCESS, align 4, !tbaa !6
br label %40
21: ; preds = %4
%22 = tail call i64 @IsMcbSpecialFile(ptr noundef nonnull %2) #2
%23 = icmp eq i64 %22, 0
br i1 %23, label %26, label %24
24: ; preds = %21
%25 = load i32, ptr @STATUS_INVALID_DEVICE_REQUEST, align 4, !tbaa !6
br label %40
26: ; preds = %21
%27 = tail call i64 @INODE_HAS_EXTENT(ptr noundef nonnull %2) #2
%28 = icmp eq i64 %27, 0
br i1 %28, label %31, label %29
29: ; preds = %26
%30 = tail call i32 @Ext2ExpandExtent(ptr noundef %0, i32 noundef %1, ptr noundef nonnull %2, i64 noundef %12, i64 noundef %16, ptr noundef nonnull %3) #2
br label %40
31: ; preds = %26
%32 = load i64, ptr %0, align 8, !tbaa !15
%33 = load i64, ptr @IRP_MJ_WRITE, align 8, !tbaa !18
%34 = icmp eq i64 %32, %33
br i1 %34, label %38, label %35
35: ; preds = %31
%36 = tail call i64 @IsMcbDirectory(ptr noundef nonnull %2) #2
%37 = icmp eq i64 %36, 0
br i1 %37, label %40, label %38
38: ; preds = %31, %35
%39 = tail call i32 @Ext2ExpandIndirect(ptr noundef nonnull %0, i32 noundef %1, ptr noundef nonnull %2, i64 noundef %12, i64 noundef %16, ptr noundef nonnull %3) #2
br label %40
40: ; preds = %29, %35, %38, %24, %18
%41 = phi i32 [ %20, %18 ], [ %25, %24 ], [ %30, %29 ], [ %39, %38 ], [ %5, %35 ]
ret i32 %41
}
declare i64 @IsMcbSpecialFile(ptr noundef) local_unnamed_addr #1
declare i64 @INODE_HAS_EXTENT(ptr noundef) local_unnamed_addr #1
declare i32 @Ext2ExpandExtent(ptr noundef, i32 noundef, ptr noundef, i64 noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @IsMcbDirectory(ptr noundef) local_unnamed_addr #1
declare i32 @Ext2ExpandIndirect(ptr noundef, i32 noundef, ptr noundef, i64 noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_17__", !12, i64 0}
!12 = !{!"TYPE_19__", !7, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_16__", !7, i64 0}
!15 = !{!16, !17, i64 0}
!16 = !{!"TYPE_18__", !17, i64 0}
!17 = !{!"long", !8, i64 0}
!18 = !{!17, !17, i64 0}
| reactos_drivers_filesystems_ext2_src_extr_fileinfo.c_Ext2ExpandFile |
; ModuleID = 'RetroArch_wii_libogc_libdb_uIP_extr_uip_netif.c_uip_netif_setup.so'
source_filename = "RetroArch_wii_libogc_libdb_uIP_extr_uip_netif.c_uip_netif_setup.so"
@UIP_NETIF_FLAG_UP = common dso_local global i32 0, align 4
define dso_local i32 @uip_netif_setup(i64 %arg1) {
entry:
%memload = load i32, ptr @UIP_NETIF_FLAG_UP, align 1
%0 = inttoptr i64 %arg1 to ptr
%1 = load i32, ptr %0, align 1
%2 = or i32 %1, %memload
%3 = and i32 %2, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
store i32 %2, ptr %0, align 1
ret i32 %memload
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/RetroArch/wii/libogc/libdb/uIP/extr_uip_netif.c_uip_netif_setup.c'
source_filename = "AnghaBench/RetroArch/wii/libogc/libdb/uIP/extr_uip_netif.c_uip_netif_setup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@UIP_NETIF_FLAG_UP = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define void @uip_netif_setup(ptr nocapture noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @UIP_NETIF_FLAG_UP, align 4, !tbaa !6
%3 = load i32, ptr %0, align 4, !tbaa !10
%4 = or i32 %3, %2
store i32 %4, ptr %0, align 4, !tbaa !10
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"uip_netif", !7, i64 0}
| RetroArch_wii_libogc_libdb_uIP_extr_uip_netif.c_uip_netif_setup |
; ModuleID = 'freebsd_contrib_wpa_src_p2p_extr_p2p.c_p2p_set_dev_persistent.so'
source_filename = "freebsd_contrib_wpa_src_p2p_extr_p2p.c_p2p_set_dev_persistent.so"
@P2P_DEV_PREFER_PERSISTENT_GROUP = common dso_local global i32 0, align 4
@P2P_DEV_PREFER_PERSISTENT_RECONN = common dso_local global i32 0, align 4
define dso_local void @p2p_set_dev_persistent(i64 %arg1, i32 %arg2) {
entry:
%EAX-SKT-LOC = alloca i32, align 4
%0 = sub i32 %arg2, 2
%1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %arg2, i32 2)
%CF = extractvalue { i32, i1 } %1, 1
%ZF = icmp eq i32 %0, 0
%highbit = and i32 -2147483648, %0
%SF = icmp ne i32 %highbit, 0
%2 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %arg2, i32 2)
%OF = extractvalue { i32, i1 } %2, 1
%3 = and i32 %0, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%6 = sub i32 %arg2, 1
%7 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %arg2, i32 1)
%CF1 = extractvalue { i32, i1 } %7, 1
%ZF2 = icmp eq i32 %6, 0
%highbit3 = and i32 -2147483648, %6
%SF4 = icmp ne i32 %highbit3, 0
%8 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %arg2, i32 1)
%OF5 = extractvalue { i32, i1 } %8, 1
%9 = and i32 %6, 255
%10 = call i32 @llvm.ctpop.i32(i32 %9)
%11 = and i32 %10, 1
%PF6 = icmp eq i32 %11, 0
%CmpZF_JE1 = icmp eq i1 %ZF2, true
br i1 %CmpZF_JE1, label %bb.5, label %bb.2
bb.2: ; preds = %bb.1
%12 = and i32 %arg2, %arg2
%highbit7 = and i32 -2147483648, %12
%SF8 = icmp ne i32 %highbit7, 0
%ZF9 = icmp eq i32 %12, 0
%13 = and i32 %12, 255
%14 = call i32 @llvm.ctpop.i32(i32 %13)
%15 = and i32 %14, 1
%PF10 = icmp eq i32 %15, 0
%CmpZF_JNE = icmp eq i1 %ZF9, false
br i1 %CmpZF_JNE, label %bb.7, label %bb.3
bb.3: ; preds = %bb.2
%memload = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_RECONN, align 1
%memload11 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_GROUP, align 1
%EAX = or i32 %memload, %memload11
%16 = and i32 %EAX, 255
%17 = call i32 @llvm.ctpop.i32(i32 %16)
%18 = and i32 %17, 1
%PF12 = icmp eq i32 %18, 0
%EAX13 = xor i32 %EAX, -1
%19 = inttoptr i64 %arg1 to ptr
%memload14 = load i32, ptr %19, align 1
%EAX16 = and i32 %EAX13, %memload14
%20 = and i32 %EAX16, 255
%21 = call i32 @llvm.ctpop.i32(i32 %20)
%22 = and i32 %21, 1
%PF15 = icmp eq i32 %22, 0
store i32 %EAX16, ptr %EAX-SKT-LOC, align 1
br label %bb.6
bb.5: ; preds = %bb.1
%23 = inttoptr i64 %arg1 to ptr
%memload17 = load i32, ptr %23, align 1
%memload18 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_GROUP, align 1
%ECX = or i32 %memload17, %memload18
%24 = and i32 %ECX, 255
%25 = call i32 @llvm.ctpop.i32(i32 %24)
%26 = and i32 %25, 1
%PF19 = icmp eq i32 %26, 0
%27 = inttoptr i64 %arg1 to ptr
store i32 %ECX, ptr %27, align 1
%memload20 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_RECONN, align 1
%EAX21 = xor i32 %memload20, -1
%EAX26 = and i32 %EAX21, %ECX
%highbit22 = and i32 -2147483648, %EAX26
%SF23 = icmp ne i32 %highbit22, 0
%ZF24 = icmp eq i32 %EAX26, 0
%28 = and i32 %EAX26, 255
%29 = call i32 @llvm.ctpop.i32(i32 %28)
%30 = and i32 %29, 1
%PF25 = icmp eq i32 %30, 0
store i32 %EAX26, ptr %EAX-SKT-LOC, align 1
br label %bb.6
bb.4: ; preds = %entry
%memload27 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_RECONN, align 1
%memload28 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_GROUP, align 1
%EAX30 = or i32 %memload27, %memload28
%31 = and i32 %EAX30, 255
%32 = call i32 @llvm.ctpop.i32(i32 %31)
%33 = and i32 %32, 1
%PF29 = icmp eq i32 %33, 0
%34 = inttoptr i64 %arg1 to ptr
%memload31 = load i32, ptr %34, align 1
%EAX33 = or i32 %EAX30, %memload31
%35 = and i32 %EAX33, 255
%36 = call i32 @llvm.ctpop.i32(i32 %35)
%37 = and i32 %36, 1
%PF32 = icmp eq i32 %37, 0
store i32 %EAX33, ptr %EAX-SKT-LOC, align 1
br label %bb.6
bb.6: ; preds = %bb.5, %bb.4, %bb.3
%EAX34 = load i32, ptr %EAX-SKT-LOC, align 1
%38 = inttoptr i64 %arg1 to ptr
store i32 %EAX34, ptr %38, align 1
br label %bb.7
bb.7: ; preds = %bb.6, %bb.2
ret void
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/p2p/extr_p2p.c_p2p_set_dev_persistent.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/p2p/extr_p2p.c_p2p_set_dev_persistent.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@P2P_DEV_PREFER_PERSISTENT_GROUP = common local_unnamed_addr global i32 0, align 4
@P2P_DEV_PREFER_PERSISTENT_RECONN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @p2p_set_dev_persistent], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @p2p_set_dev_persistent(ptr nocapture noundef %0, i32 noundef %1) #0 {
switch i32 %1, label %25 [
i32 0, label %3
i32 1, label %10
i32 2, label %17
]
3: ; preds = %2
%4 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_GROUP, align 4, !tbaa !6
%5 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_RECONN, align 4, !tbaa !6
%6 = or i32 %5, %4
%7 = xor i32 %6, -1
%8 = load i32, ptr %0, align 4, !tbaa !10
%9 = and i32 %8, %7
br label %23
10: ; preds = %2
%11 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_GROUP, align 4, !tbaa !6
%12 = load i32, ptr %0, align 4, !tbaa !10
%13 = or i32 %12, %11
store i32 %13, ptr %0, align 4, !tbaa !10
%14 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_RECONN, align 4, !tbaa !6
%15 = xor i32 %14, -1
%16 = and i32 %13, %15
br label %23
17: ; preds = %2
%18 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_GROUP, align 4, !tbaa !6
%19 = load i32, ptr @P2P_DEV_PREFER_PERSISTENT_RECONN, align 4, !tbaa !6
%20 = or i32 %19, %18
%21 = load i32, ptr %0, align 4, !tbaa !10
%22 = or i32 %20, %21
br label %23
23: ; preds = %3, %10, %17
%24 = phi i32 [ %22, %17 ], [ %16, %10 ], [ %9, %3 ]
store i32 %24, ptr %0, align 4, !tbaa !10
br label %25
25: ; preds = %23, %2
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"p2p_device", !7, i64 0}
| freebsd_contrib_wpa_src_p2p_extr_p2p.c_p2p_set_dev_persistent |
; ModuleID = 'anypixel_firmware_controller_ThirdParty_SPL_src_extr_stm32f4xx_i2c.c_I2C_StretchClockCmd.so'
source_filename = "anypixel_firmware_controller_ThirdParty_SPL_src_extr_stm32f4xx_i2c.c_I2C_StretchClockCmd.so"
@DISABLE = common dso_local global i64 0, align 8
@I2C_CR1_NOSTRETCH = common dso_local global i64 0, align 8
declare dso_local ptr @IS_I2C_ALL_PERIPH()
declare dso_local ptr @assert_param()
declare dso_local ptr @IS_FUNCTIONAL_STATE()
define dso_local i64 @I2C_StretchClockCmd(i64 %arg1, i64 %arg2) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%0 = call ptr @IS_I2C_ALL_PERIPH()
%RAX = ptrtoint ptr %0 to i64
%EDI = trunc i64 %RAX to i32
%1 = call ptr @assert_param()
%RAX1 = ptrtoint ptr %1 to i64
%2 = call ptr @IS_FUNCTIONAL_STATE()
%RAX2 = ptrtoint ptr %2 to i64
%EDI3 = trunc i64 %RAX2 to i32
%3 = call ptr @assert_param()
%RAX4 = ptrtoint ptr %3 to i64
%memload = load i64, ptr @I2C_CR1_NOSTRETCH, align 1
%4 = load i64, ptr @DISABLE, align 8
%5 = sub i64 %4, %arg2
%6 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %4, i64 %arg2)
%CF = extractvalue { i64, i1 } %6, 1
%ZF = icmp eq i64 %5, 0
%highbit = and i64 -9223372036854775808, %5
%SF = icmp ne i64 %highbit, 0
%7 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %4, i64 %arg2)
%OF = extractvalue { i64, i1 } %7, 1
%8 = and i64 %5, 255
%9 = call i64 @llvm.ctpop.i64(i64 %8)
%10 = and i64 %9, 1
%PF = icmp eq i64 %10, 0
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/anypixel/firmware/controller/ThirdParty/SPL/src/extr_stm32f4xx_i2c.c_I2C_StretchClockCmd.c'
source_filename = "AnghaBench/anypixel/firmware/controller/ThirdParty/SPL/src/extr_stm32f4xx_i2c.c_I2C_StretchClockCmd.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DISABLE = common local_unnamed_addr global i64 0, align 8
@I2C_CR1_NOSTRETCH = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @I2C_StretchClockCmd(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @IS_I2C_ALL_PERIPH(ptr noundef %0) #2
%4 = tail call i32 @assert_param(i32 noundef %3) #2
%5 = tail call i32 @IS_FUNCTIONAL_STATE(i64 noundef %1) #2
%6 = tail call i32 @assert_param(i32 noundef %5) #2
%7 = load i64, ptr @DISABLE, align 8, !tbaa !6
%8 = icmp eq i64 %7, %1
%9 = load i64, ptr @I2C_CR1_NOSTRETCH, align 8, !tbaa !6
br i1 %8, label %10, label %13
10: ; preds = %2
%11 = load i64, ptr %0, align 8, !tbaa !10
%12 = or i64 %11, %9
br label %17
13: ; preds = %2
%14 = xor i64 %9, -1
%15 = load i64, ptr %0, align 8, !tbaa !10
%16 = and i64 %15, %14
br label %17
17: ; preds = %13, %10
%18 = phi i64 [ %16, %13 ], [ %12, %10 ]
store i64 %18, ptr %0, align 8, !tbaa !10
ret void
}
declare i32 @assert_param(i32 noundef) local_unnamed_addr #1
declare i32 @IS_I2C_ALL_PERIPH(ptr noundef) local_unnamed_addr #1
declare i32 @IS_FUNCTIONAL_STATE(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_4__", !7, i64 0}
| anypixel_firmware_controller_ThirdParty_SPL_src_extr_stm32f4xx_i2c.c_I2C_StretchClockCmd |
; ModuleID = 'freebsd_contrib_binutils_bfd_extr_elf64-x86-64.c_elf64_x86_64_section_from_shdr.so'
source_filename = "freebsd_contrib_binutils_bfd_extr_elf64-x86-64.c_elf64_x86_64_section_from_shdr.so"
@SHT_X86_64_UNWIND = common dso_local global i64 0, align 8
@TRUE = common dso_local global i32 0, align 4
@FALSE = common dso_local global i32 0, align 4
declare dso_local ptr @_bfd_elf_make_section_from_shdr()
define dso_local i32 @elf64_x86_64_section_from_shdr(i64 %arg1, i64 %arg2) {
entry:
%RAX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
%0 = inttoptr i64 %arg2 to ptr
%memload = load i64, ptr %0, align 1
%1 = load i64, ptr @SHT_X86_64_UNWIND, align 8
%2 = sub i64 %memload, %1
%3 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload, i64 %1)
%CF = extractvalue { i64, i1 } %3, 1
%ZF = icmp eq i64 %2, 0
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%4 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload, i64 %1)
%OF = extractvalue { i64, i1 } %4, 1
%5 = and i64 %2, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF = icmp eq i64 %7, 0
%CmpZF_JNE = icmp eq i1 %ZF, false
br i1 %CmpZF_JNE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%8 = call ptr @_bfd_elf_make_section_from_shdr()
%RAX = ptrtoint ptr %8 to i64
%9 = trunc i64 %RAX to i32
%10 = trunc i64 %RAX to i32
%11 = and i32 %9, %10
%highbit1 = and i32 -2147483648, %11
%SF2 = icmp ne i32 %highbit1, 0
%ZF3 = icmp eq i32 %11, 0
%12 = and i32 %11, 255
%13 = call i32 @llvm.ctpop.i32(i32 %12)
%14 = and i32 %13, 1
%PF4 = icmp eq i32 %14, 0
%CmpZF_JNE7 = icmp eq i1 %ZF3, false
br i1 %CmpZF_JNE7, label %bb.3, label %bb.2
bb.3: ; preds = %bb.1
%15 = ptrtoint ptr @TRUE to i64
store i64 %15, ptr %RAX-SKT-LOC, align 1
br label %bb.4
bb.2: ; preds = %bb.1, %entry
%16 = ptrtoint ptr @FALSE to i64
store i64 %16, ptr %RAX-SKT-LOC, align 1
br label %bb.4
bb.4: ; preds = %bb.3, %bb.2
%RAX5 = load i64, ptr %RAX-SKT-LOC, align 1
%17 = inttoptr i64 %RAX5 to ptr
%memload6 = load i32, ptr %17, align 1
ret i32 %memload6
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/contrib/binutils/bfd/extr_elf64-x86-64.c_elf64_x86_64_section_from_shdr.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/bfd/extr_elf64-x86-64.c_elf64_x86_64_section_from_shdr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SHT_X86_64_UNWIND = common local_unnamed_addr global i64 0, align 8
@FALSE = common local_unnamed_addr global i32 0, align 4
@TRUE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @elf64_x86_64_section_from_shdr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @elf64_x86_64_section_from_shdr(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = load i64, ptr %1, align 8, !tbaa !6
%6 = load i64, ptr @SHT_X86_64_UNWIND, align 8, !tbaa !11
%7 = icmp eq i64 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %4
%9 = tail call i32 @_bfd_elf_make_section_from_shdr(ptr noundef %0, ptr noundef nonnull %1, ptr noundef %2, i32 noundef %3) #2
%10 = icmp eq i32 %9, 0
%11 = select i1 %10, ptr @FALSE, ptr @TRUE
br label %12
12: ; preds = %8, %4
%13 = phi ptr [ @FALSE, %4 ], [ %11, %8 ]
%14 = load i32, ptr %13, align 4, !tbaa !12
ret i32 %14
}
declare i32 @_bfd_elf_make_section_from_shdr(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !9, i64 0}
| freebsd_contrib_binutils_bfd_extr_elf64-x86-64.c_elf64_x86_64_section_from_shdr |
; ModuleID = 'linux_drivers_media_dvb-frontends_extr_l64781.c_reset_and_configure.so'
source_filename = "linux_drivers_media_dvb-frontends_extr_l64781.c_reset_and_configure.so"
@ENODEV = common dso_local global i32 0, align 4
declare dso_local ptr @i2c_transfer()
define dso_local i32 @reset_and_configure(i64 %arg1) {
entry:
%stktop_8 = alloca i8, i32 80, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 12
%RSP_P.12 = inttoptr i64 %0 to ptr
%1 = add i64 %tos, 16
%RSP_P.16 = inttoptr i64 %1 to ptr
%2 = add i64 %tos, 24
%RSP_P.24 = inttoptr i64 %2 to ptr
%3 = add i64 %tos, 32
%RSP_P.32 = inttoptr i64 %3 to ptr
store i32 6, ptr %RSP_P.12, align 1
store i32 0, ptr %RSP_P.16, align 1
%RAX = ptrtoint ptr %RSP_P.12 to i64
store i64 %RAX, ptr %RSP_P.24, align 1
%4 = sext i32 1 to i64
store i64 %4, ptr %RSP_P.32, align 1
%5 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %5, align 1
%RSI = ptrtoint ptr %RSP_P.16 to i64
%6 = call ptr @i2c_transfer()
%RAX1 = ptrtoint ptr %6 to i64
%7 = load i32, ptr @ENODEV, align 4
%ECX = sub i32 0, %7
%8 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 0, i32 %7)
%CF = extractvalue { i32, i1 } %8, 1
%ZF = icmp eq i32 %ECX, 0
%highbit = and i32 -2147483648, %ECX
%SF = icmp ne i32 %highbit, 0
%9 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 0, i32 %7)
%OF = extractvalue { i32, i1 } %9, 1
%10 = and i32 %ECX, 255
%11 = call i32 @llvm.ctpop.i32(i32 %10)
%12 = and i32 %11, 1
%PF = icmp eq i32 %12, 0
%13 = trunc i64 %RAX1 to i32
%14 = trunc i64 1 to i32
%15 = sub i32 %13, %14
%16 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %13, i32 %14)
%CF2 = extractvalue { i32, i1 } %16, 1
%ZF3 = icmp eq i32 %15, 0
%highbit4 = and i32 -2147483648, %15
%SF5 = icmp ne i32 %highbit4, 0
%17 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %13, i32 %14)
%OF6 = extractvalue { i32, i1 } %17, 1
%18 = and i32 %15, 255
%19 = call i32 @llvm.ctpop.i32(i32 %18)
%20 = and i32 %19, 1
%PF7 = icmp eq i32 %20, 0
%Cond_CMOVE = icmp eq i1 %ZF3, true
%CMOV = select i1 %Cond_CMOVE, i32 0, i32 %ECX
ret i32 %CMOV
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/media/dvb-frontends/extr_l64781.c_reset_and_configure.c'
source_filename = "AnghaBench/linux/drivers/media/dvb-frontends/extr_l64781.c_reset_and_configure.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.i2c_msg = type { i32, ptr, i32, i32 }
@ENODEV = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @reset_and_configure], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @reset_and_configure(ptr nocapture noundef readonly %0) #0 {
%2 = alloca [1 x i32], align 4
%3 = alloca %struct.i2c_msg, align 8
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
store i32 6, ptr %2, align 4
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %3) #3
store i32 0, ptr %3, align 8, !tbaa !6
%4 = getelementptr inbounds i8, ptr %3, i64 8
store ptr %2, ptr %4, align 8, !tbaa !12
%5 = getelementptr inbounds i8, ptr %3, i64 16
store <2 x i32> <i32 1, i32 0>, ptr %5, align 8, !tbaa !13
%6 = load i32, ptr %0, align 4, !tbaa !14
%7 = call i32 @i2c_transfer(i32 noundef %6, ptr noundef nonnull %3, i32 noundef 1) #3
%8 = icmp eq i32 %7, 1
%9 = load i32, ptr @ENODEV, align 4
%10 = sub nsw i32 0, %9
%11 = select i1 %8, i32 0, i32 %10
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %11
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @i2c_transfer(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"i2c_msg", !8, i64 0, !11, i64 8, !8, i64 16, !8, i64 20}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!8, !8, i64 0}
!14 = !{!15, !8, i64 0}
!15 = !{!"l64781_state", !8, i64 0}
| linux_drivers_media_dvb-frontends_extr_l64781.c_reset_and_configure |
; ModuleID = 'freebsd_sys_contrib_dev_ath_ath_hal_ar9300_extr_ar9300_reset.c_ar9300_iq_cal_collect.so'
source_filename = "freebsd_sys_contrib_dev_ath_ath_hal_ar9300_extr_ar9300_reset.c_ar9300_iq_cal_collect.so"
@HAL_DEBUG_CALIBRATE = common dso_local global i32 0, align 4
@rodata_13 = private unnamed_addr constant [104 x i8] c"%d: Chn %d Reg Offset(0x%04x)pmi=0x%08x; Reg Offset(0x%04x)pmq=0x%08x; Reg Offset (0x%04x)iqcm=0x%08x;\0A\00", align 1, !ROData_SecInfo !0
declare dso_local ptr @AH9300()
declare dso_local ptr @AR_PHY_CAL_MEAS_0()
declare dso_local ptr @OS_REG_READ()
declare dso_local ptr @AR_PHY_CAL_MEAS_1()
declare dso_local ptr @AR_PHY_CAL_MEAS_2()
declare dso_local ptr @HALDEBUG()
define dso_local ptr @ar9300_iq_cal_collect(i64 %arg1, i32 %arg2) {
entry:
%RAX-SKT-LOC = alloca i64, align 8
%RSP-SKT-LOC42 = alloca i64, align 8
%RSP-SKT-LOC = alloca i64, align 8
%EBX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 80, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 0
%RSP_P.0 = inttoptr i64 %0 to ptr
%1 = add i64 %tos, 8
%RSP_P.8 = inttoptr i64 %1 to ptr
%2 = add i64 %tos, 12
%RSP_P.12 = inttoptr i64 %2 to ptr
%3 = add i64 %tos, 16
%RSP_P.16 = inttoptr i64 %3 to ptr
%4 = add i64 %tos, 24
%RSP_P.24 = inttoptr i64 %4 to ptr
%5 = add i64 %tos, 32
%RSP_P.32 = inttoptr i64 %5 to ptr
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%6 = call ptr @AH9300()
%RAX = ptrtoint ptr %6 to i64
%7 = and i32 %arg2, %arg2
%highbit = and i32 -2147483648, %7
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %7, 0
%8 = and i32 %7, 255
%9 = call i32 @llvm.ctpop.i32(i32 %8)
%10 = and i32 %9, 1
%PF = icmp eq i32 %10, 0
%11 = ptrtoint ptr %stktop_8 to i64
store i64 %11, ptr %RSP-SKT-LOC, align 1
%12 = ptrtoint ptr %stktop_8 to i64
store i64 %12, ptr %RSP-SKT-LOC42, align 1
store i64 %RAX, ptr %RAX-SKT-LOC, align 1
%CmpZF_JLE = icmp eq i1 %ZF, true
%CmpOF_JLE = icmp ne i1 %SF, false
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
br i1 %ZFOrSF_JLE, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%13 = zext i32 %arg2 to i64
store i64 %13, ptr %RSP_P.16, align 1
%14 = zext i32 0 to i64
store i64 %14, ptr %EBX-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.2
%15 = load i64, ptr %EBX-SKT-LOC, align 1
%EBX = trunc i64 %15 to i32
%16 = call ptr @AR_PHY_CAL_MEAS_0()
%RAX1 = ptrtoint ptr %16 to i64
%17 = call ptr @OS_REG_READ()
%RAX2 = ptrtoint ptr %17 to i64
%ld-stk-prom49 = load i64, ptr %RAX-SKT-LOC, align 8
%memref-disp = add i64 %ld-stk-prom49, 16
%18 = inttoptr i64 %memref-disp to ptr
%memload = load i64, ptr %18, align 1
%19 = zext i32 %EBX to i64
%memref-idxreg = mul i64 8, %19
%memref-basereg = add i64 %memload, %memref-idxreg
%20 = inttoptr i64 %memref-basereg to ptr
store i64 %RAX2, ptr %20, align 1
%21 = call ptr @AR_PHY_CAL_MEAS_1()
%RAX3 = ptrtoint ptr %21 to i64
%22 = call ptr @OS_REG_READ()
%RAX4 = ptrtoint ptr %22 to i64
%ld-stk-prom48 = load i64, ptr %RAX-SKT-LOC, align 8
%memref-disp5 = add i64 %ld-stk-prom48, 8
%23 = inttoptr i64 %memref-disp5 to ptr
%memload6 = load i64, ptr %23, align 1
%24 = zext i32 %EBX to i64
%memref-idxreg7 = mul i64 8, %24
%memref-basereg8 = add i64 %memload6, %memref-idxreg7
%25 = inttoptr i64 %memref-basereg8 to ptr
store i64 %RAX4, ptr %25, align 1
%26 = call ptr @AR_PHY_CAL_MEAS_2()
%RAX9 = ptrtoint ptr %26 to i64
%27 = call ptr @OS_REG_READ()
%RAX10 = ptrtoint ptr %27 to i64
%ld-stk-prom47 = load i64, ptr %RAX-SKT-LOC, align 8
%28 = inttoptr i64 %ld-stk-prom47 to ptr
%memload11 = load i64, ptr %28, align 1
%29 = zext i32 %EBX to i64
%memref-idxreg12 = mul i64 8, %29
%memref-basereg13 = add i64 %memload11, %memref-idxreg12
%30 = inttoptr i64 %memref-basereg13 to ptr
store i64 %RAX10, ptr %30, align 1
%memload14 = load i32, ptr @HAL_DEBUG_CALIBRATE, align 1
%RSP = load i64, ptr %RSP-SKT-LOC, align 1
store i32 %memload14, ptr %RSP_P.8, align 1
%ld-stk-prom46 = load i64, ptr %RAX-SKT-LOC, align 8
%memref-disp15 = add i64 %ld-stk-prom46, 24
%31 = inttoptr i64 %memref-disp15 to ptr
%memload16 = load i32, ptr %31, align 1
store i32 %memload16, ptr %RSP_P.12, align 1
%32 = call ptr @AR_PHY_CAL_MEAS_0()
%RAX17 = ptrtoint ptr %32 to i64
%ld-stk-prom45 = load i64, ptr %RAX-SKT-LOC, align 8
%memref-disp18 = add i64 %ld-stk-prom45, 16
%33 = inttoptr i64 %memref-disp18 to ptr
%memload19 = load i64, ptr %33, align 1
%34 = zext i32 %EBX to i64
%memref-idxreg20 = mul i64 8, %34
%memref-basereg21 = add i64 %memload19, %memref-idxreg20
%35 = inttoptr i64 %memref-basereg21 to ptr
%memload22 = load i64, ptr %35, align 1
store i64 %memload22, ptr %RSP_P.32, align 1
%36 = call ptr @AR_PHY_CAL_MEAS_1()
%RAX23 = ptrtoint ptr %36 to i64
store i64 %RAX23, ptr %RSP_P.24, align 1
%ld-stk-prom44 = load i64, ptr %RAX-SKT-LOC, align 8
%memref-disp24 = add i64 %ld-stk-prom44, 8
%37 = inttoptr i64 %memref-disp24 to ptr
%memload25 = load i64, ptr %37, align 1
%38 = zext i32 %EBX to i64
%memref-idxreg26 = mul i64 8, %38
%memref-basereg27 = add i64 %memload25, %memref-idxreg26
%39 = inttoptr i64 %memref-basereg27 to ptr
%memload28 = load i64, ptr %39, align 1
%40 = call ptr @AR_PHY_CAL_MEAS_2()
%RAX29 = ptrtoint ptr %40 to i64
%ld-stk-prom = load i64, ptr %RAX-SKT-LOC, align 8
%41 = inttoptr i64 %ld-stk-prom to ptr
%memload30 = load i64, ptr %41, align 1
%memload31 = load i32, ptr %RSP_P.16, align 1
%RDX = ptrtoint ptr @rodata_13 to i64
%42 = getelementptr i8, ptr %RSP_P.16, i64 4
%memload32 = load i32, ptr %42, align 1
%R9D = trunc i64 %RAX17 to i32
%43 = trunc i64 %memload30 to i32
store i32 %43, ptr %RSP_P.8, align 4
%44 = trunc i64 %RAX29 to i32
store i32 %44, ptr %RSP_P.8, align 4
%45 = trunc i64 %memload28 to i32
store i32 %45, ptr %RSP_P.8, align 4
%46 = ptrtoint ptr %RSP_P.8 to i64
%47 = trunc i64 %46 to i32
store i32 %47, ptr %RSP_P.8, align 4
%48 = ptrtoint ptr %RSP_P.8 to i64
%49 = trunc i64 %48 to i32
store i32 %49, ptr %RSP_P.8, align 4
%50 = call ptr @HALDEBUG()
%RAX33 = ptrtoint ptr %50 to i64
%51 = zext i32 %EBX to i64
%RBX = add i64 %51, 1
%52 = and i64 %RBX, 255
%53 = call i64 @llvm.ctpop.i64(i64 %52)
%54 = and i64 %53, 1
%PF34 = icmp eq i64 %54, 0
%ZF35 = icmp eq i64 %RBX, 0
%highbit36 = and i64 -9223372036854775808, %RBX
%SF37 = icmp ne i64 %highbit36, 0
%55 = load i64, ptr %RSP_P.16, align 1
%56 = sub i64 %55, %RBX
%57 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %55, i64 %RBX)
%CF = extractvalue { i64, i1 } %57, 1
%ZF38 = icmp eq i64 %56, 0
%highbit39 = and i64 -9223372036854775808, %56
%SF40 = icmp ne i64 %highbit39, 0
%58 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %55, i64 %RBX)
%OF = extractvalue { i64, i1 } %58, 1
%59 = and i64 %56, 255
%60 = call i64 @llvm.ctpop.i64(i64 %59)
%61 = and i64 %60, 1
%PF41 = icmp eq i64 %61, 0
%62 = ptrtoint ptr %EBX-SKT-LOC to i64
store i64 %62, ptr %RSP-SKT-LOC42, align 1
store i64 %RAX33, ptr %RAX-SKT-LOC, align 1
%CmpZF_JNE = icmp eq i1 %ZF38, false
store i64 %RBX, ptr %EBX-SKT-LOC, align 1
%63 = ptrtoint ptr %EBX-SKT-LOC to i64
store i64 %63, ptr %RSP-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.2, label %bb.3
bb.3: ; preds = %bb.2, %entry
%RSP43 = load i64, ptr %RSP-SKT-LOC42, align 1
%RAX50 = load i64, ptr %RAX-SKT-LOC, align 1
%64 = inttoptr i64 %RAX50 to ptr
ret ptr %64
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/extr_ar9300_reset.c_ar9300_iq_cal_collect.c'
source_filename = "AnghaBench/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/extr_ar9300_reset.c_ar9300_iq_cal_collect.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@HAL_DEBUG_CALIBRATE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [104 x i8] c"%d: Chn %d Reg Offset(0x%04x)pmi=0x%08x; Reg Offset(0x%04x)pmq=0x%08x; Reg Offset (0x%04x)iqcm=0x%08x;\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @ar9300_iq_cal_collect(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @AH9300(ptr noundef %0) #2
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %46
5: ; preds = %2
%6 = getelementptr inbounds i8, ptr %3, i64 16
%7 = getelementptr inbounds i8, ptr %3, i64 8
%8 = getelementptr inbounds i8, ptr %3, i64 24
%9 = zext nneg i32 %1 to i64
br label %10
10: ; preds = %5, %10
%11 = phi i64 [ 0, %5 ], [ %44, %10 ]
%12 = trunc nuw nsw i64 %11 to i32
%13 = tail call i64 @AR_PHY_CAL_MEAS_0(i32 noundef %12) #2
%14 = tail call ptr @OS_REG_READ(ptr noundef %0, i64 noundef %13) #2
%15 = load ptr, ptr %6, align 8, !tbaa !6
%16 = getelementptr inbounds ptr, ptr %15, i64 %11
store ptr %14, ptr %16, align 8, !tbaa !12
%17 = tail call i64 @AR_PHY_CAL_MEAS_1(i32 noundef %12) #2
%18 = tail call ptr @OS_REG_READ(ptr noundef %0, i64 noundef %17) #2
%19 = load ptr, ptr %7, align 8, !tbaa !13
%20 = getelementptr inbounds ptr, ptr %19, i64 %11
store ptr %18, ptr %20, align 8, !tbaa !12
%21 = tail call i64 @AR_PHY_CAL_MEAS_2(i32 noundef %12) #2
%22 = tail call ptr @OS_REG_READ(ptr noundef %0, i64 noundef %21) #2
%23 = ptrtoint ptr %22 to i64
%24 = load ptr, ptr %3, align 8, !tbaa !14
%25 = getelementptr inbounds i64, ptr %24, i64 %11
store i64 %23, ptr %25, align 8, !tbaa !15
%26 = load i32, ptr @HAL_DEBUG_CALIBRATE, align 4, !tbaa !17
%27 = load i32, ptr %8, align 8, !tbaa !18
%28 = tail call i64 @AR_PHY_CAL_MEAS_0(i32 noundef %12) #2
%29 = trunc i64 %28 to i32
%30 = load ptr, ptr %6, align 8, !tbaa !6
%31 = getelementptr inbounds ptr, ptr %30, i64 %11
%32 = load ptr, ptr %31, align 8, !tbaa !12
%33 = tail call i64 @AR_PHY_CAL_MEAS_1(i32 noundef %12) #2
%34 = trunc i64 %33 to i32
%35 = load ptr, ptr %7, align 8, !tbaa !13
%36 = getelementptr inbounds ptr, ptr %35, i64 %11
%37 = load ptr, ptr %36, align 8, !tbaa !12
%38 = tail call i64 @AR_PHY_CAL_MEAS_2(i32 noundef %12) #2
%39 = trunc i64 %38 to i32
%40 = load ptr, ptr %3, align 8, !tbaa !14
%41 = getelementptr inbounds i64, ptr %40, i64 %11
%42 = load i64, ptr %41, align 8, !tbaa !15
%43 = tail call i32 @HALDEBUG(ptr noundef %0, i32 noundef %26, ptr noundef nonnull @.str, i32 noundef %27, i32 noundef %12, i32 noundef %29, ptr noundef %32, i32 noundef %34, ptr noundef %37, i32 noundef %39, i64 noundef %42) #2
%44 = add nuw nsw i64 %11, 1
%45 = icmp eq i64 %44, %9
br i1 %45, label %46, label %10, !llvm.loop !19
46: ; preds = %10, %2
ret void
}
declare ptr @AH9300(ptr noundef) local_unnamed_addr #1
declare ptr @OS_REG_READ(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @AR_PHY_CAL_MEAS_0(i32 noundef) local_unnamed_addr #1
declare i64 @AR_PHY_CAL_MEAS_1(i32 noundef) local_unnamed_addr #1
declare i64 @AR_PHY_CAL_MEAS_2(i32 noundef) local_unnamed_addr #1
declare i32 @HALDEBUG(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"ath_hal_9300", !8, i64 0, !8, i64 8, !8, i64 16, !11, i64 24}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !8, i64 8}
!14 = !{!7, !8, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"long", !9, i64 0}
!17 = !{!11, !11, i64 0}
!18 = !{!7, !11, i64 24}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
| freebsd_sys_contrib_dev_ath_ath_hal_ar9300_extr_ar9300_reset.c_ar9300_iq_cal_collect |
; ModuleID = 'fastsocket_kernel_drivers_gpu_drm_radeon_extr_radeon_ttm.c_radeon_ttm_global_init.so'
source_filename = "fastsocket_kernel_drivers_gpu_drm_radeon_extr_radeon_ttm.c_radeon_ttm_global_init.so"
@DRM_GLOBAL_TTM_MEM = common dso_local global i32 0, align 4
@radeon_ttm_mem_global_init = common dso_local global i32 0, align 4
@radeon_ttm_mem_global_release = common dso_local global i32 0, align 4
@rodata_13 = private unnamed_addr constant [89 x i8] c"Failed setting up TTM memory accounting subsystem.\0A\00Failed setting up TTM BO subsystem.\0A\00", align 1, !ROData_SecInfo !0
@DRM_GLOBAL_TTM_BO = common dso_local global i32 0, align 4
@ttm_bo_global_init = common dso_local global i32 0, align 4
@ttm_bo_global_release = common dso_local global i32 0, align 4
declare dso_local ptr @drm_global_item_ref()
declare dso_local ptr @DRM_ERROR()
declare dso_local ptr @drm_global_item_unref()
define dso_local i32 @radeon_ttm_global_init(i64 %arg1) {
entry:
%EBP-SKT-LOC = alloca i32, align 4
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%0 = inttoptr i64 %arg1 to ptr
store i32 0, ptr %0, align 1
%memref-disp = add i64 %arg1, 8
%memload = load i32, ptr @DRM_GLOBAL_TTM_MEM, align 1
%memref-disp1 = add i64 %arg1, 32
%1 = inttoptr i64 %memref-disp1 to ptr
store i32 %memload, ptr %1, align 1
%memref-disp2 = add i64 %arg1, 8
%2 = inttoptr i64 %memref-disp2 to ptr
store i32 4, ptr %2, align 1
%memref-disp3 = add i64 %arg1, 24
%3 = ptrtoint ptr @radeon_ttm_mem_global_init to i64
%4 = inttoptr i64 %memref-disp3 to ptr
store i64 %3, ptr %4, align 1
%memref-disp4 = add i64 %arg1, 16
%5 = ptrtoint ptr @radeon_ttm_mem_global_release to i64
%6 = inttoptr i64 %memref-disp4 to ptr
store i64 %5, ptr %6, align 1
%7 = call ptr @drm_global_item_ref()
%RAX = ptrtoint ptr %7 to i64
%8 = trunc i64 %RAX to i32
%9 = trunc i64 %RAX to i32
%10 = and i32 %8, %9
%highbit = and i32 -2147483648, %10
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %10, 0
%11 = and i32 %10, 255
%12 = call i32 @llvm.ctpop.i32(i32 %11)
%13 = and i32 %12, 1
%PF = icmp eq i32 %13, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%EBP = trunc i64 %RAX to i32
%RDI = ptrtoint ptr @rodata_13 to i64
%14 = call ptr @DRM_ERROR()
%RAX5 = ptrtoint ptr %14 to i64
store i32 %EBP, ptr %EBP-SKT-LOC, align 1
br label %bb.5
bb.2: ; preds = %entry
%memref-disp6 = add i64 %arg1, 36
%15 = inttoptr i64 %memref-disp6 to ptr
%memload7 = load i32, ptr %15, align 1
%memref-disp8 = add i64 %arg1, 40
%memref-disp9 = add i64 %arg1, 72
%16 = inttoptr i64 %memref-disp9 to ptr
store i32 %memload7, ptr %16, align 1
%memload10 = load i32, ptr @DRM_GLOBAL_TTM_BO, align 1
%memref-disp11 = add i64 %arg1, 64
%17 = inttoptr i64 %memref-disp11 to ptr
store i32 %memload10, ptr %17, align 1
%memref-disp12 = add i64 %arg1, 40
%18 = inttoptr i64 %memref-disp12 to ptr
store i32 4, ptr %18, align 1
%memref-disp13 = add i64 %arg1, 56
%19 = ptrtoint ptr @ttm_bo_global_init to i64
%20 = inttoptr i64 %memref-disp13 to ptr
store i64 %19, ptr %20, align 1
%memref-disp14 = add i64 %arg1, 48
%21 = ptrtoint ptr @ttm_bo_global_release to i64
%22 = inttoptr i64 %memref-disp14 to ptr
store i64 %21, ptr %22, align 1
%23 = call ptr @drm_global_item_ref()
%RAX15 = ptrtoint ptr %23 to i64
%24 = trunc i64 %RAX15 to i32
%25 = trunc i64 %RAX15 to i32
%26 = and i32 %24, %25
%highbit16 = and i32 -2147483648, %26
%SF17 = icmp ne i32 %highbit16, 0
%ZF18 = icmp eq i32 %26, 0
%27 = and i32 %26, 255
%28 = call i32 @llvm.ctpop.i32(i32 %27)
%29 = and i32 %28, 1
%PF19 = icmp eq i32 %29, 0
%CmpZF_JE25 = icmp eq i1 %ZF18, true
br i1 %CmpZF_JE25, label %bb.4, label %bb.3
bb.3: ; preds = %bb.2
%EBP20 = trunc i64 %RAX15 to i32
%RDI21 = ptrtoint ptr getelementptr inbounds ([89 x i8], ptr @rodata_13, i32 0, i32 52) to i64, !ROData_Index !1
%30 = call ptr @DRM_ERROR()
%RAX22 = ptrtoint ptr %30 to i64
%31 = call ptr @drm_global_item_unref()
%RAX23 = ptrtoint ptr %31 to i64
store i32 %EBP20, ptr %EBP-SKT-LOC, align 1
br label %bb.5
bb.4: ; preds = %bb.2
%32 = inttoptr i64 %arg1 to ptr
store i32 1, ptr %32, align 1
store i32 0, ptr %EBP-SKT-LOC, align 1
br label %bb.5
bb.5: ; preds = %bb.4, %bb.3, %bb.1
%EBP24 = load i32, ptr %EBP-SKT-LOC, align 1
ret i32 %EBP24
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
!1 = !{ptr getelementptr inbounds ([89 x i8], ptr @rodata_13, i32 0, i32 52)}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/radeon/extr_radeon_ttm.c_radeon_ttm_global_init.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/radeon/extr_radeon_ttm.c_radeon_ttm_global_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DRM_GLOBAL_TTM_MEM = common local_unnamed_addr global i32 0, align 4
@radeon_ttm_mem_global_init = common global i32 0, align 4
@radeon_ttm_mem_global_release = common global i32 0, align 4
@.str = private unnamed_addr constant [52 x i8] c"Failed setting up TTM memory accounting subsystem.\0A\00", align 1
@DRM_GLOBAL_TTM_BO = common local_unnamed_addr global i32 0, align 4
@ttm_bo_global_init = common global i32 0, align 4
@ttm_bo_global_release = common global i32 0, align 4
@.str.1 = private unnamed_addr constant [37 x i8] c"Failed setting up TTM BO subsystem.\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @radeon_ttm_global_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @radeon_ttm_global_init(ptr noundef %0) #0 {
store i32 0, ptr %0, align 8, !tbaa !6
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load i32, ptr @DRM_GLOBAL_TTM_MEM, align 4, !tbaa !15
%4 = getelementptr inbounds i8, ptr %0, i64 32
store i32 %3, ptr %4, align 8, !tbaa !16
store i32 4, ptr %2, align 8, !tbaa !17
%5 = getelementptr inbounds i8, ptr %0, i64 24
store ptr @radeon_ttm_mem_global_init, ptr %5, align 8, !tbaa !18
%6 = getelementptr inbounds i8, ptr %0, i64 16
store ptr @radeon_ttm_mem_global_release, ptr %6, align 8, !tbaa !19
%7 = tail call i32 @drm_global_item_ref(ptr noundef nonnull %2) #2
%8 = icmp eq i32 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %1
%10 = tail call i32 @DRM_ERROR(ptr noundef nonnull @.str) #2
br label %26
11: ; preds = %1
%12 = getelementptr inbounds i8, ptr %0, i64 36
%13 = load i32, ptr %12, align 4, !tbaa !20
%14 = getelementptr inbounds i8, ptr %0, i64 40
%15 = getelementptr inbounds i8, ptr %0, i64 72
store i32 %13, ptr %15, align 8, !tbaa !21
%16 = load i32, ptr @DRM_GLOBAL_TTM_BO, align 4, !tbaa !15
%17 = getelementptr inbounds i8, ptr %0, i64 64
store i32 %16, ptr %17, align 8, !tbaa !16
store i32 4, ptr %14, align 8, !tbaa !17
%18 = getelementptr inbounds i8, ptr %0, i64 56
store ptr @ttm_bo_global_init, ptr %18, align 8, !tbaa !18
%19 = getelementptr inbounds i8, ptr %0, i64 48
store ptr @ttm_bo_global_release, ptr %19, align 8, !tbaa !19
%20 = tail call i32 @drm_global_item_ref(ptr noundef nonnull %14) #2
%21 = icmp eq i32 %20, 0
br i1 %21, label %25, label %22
22: ; preds = %11
%23 = tail call i32 @DRM_ERROR(ptr noundef nonnull @.str.1) #2
%24 = tail call i32 @drm_global_item_unref(ptr noundef nonnull %2) #2
br label %26
25: ; preds = %11
store i32 1, ptr %0, align 8, !tbaa !6
br label %26
26: ; preds = %25, %22, %9
%27 = phi i32 [ %7, %9 ], [ %20, %22 ], [ 0, %25 ]
ret i32 %27
}
declare i32 @drm_global_item_ref(ptr noundef) local_unnamed_addr #1
declare i32 @DRM_ERROR(ptr noundef) local_unnamed_addr #1
declare i32 @drm_global_item_unref(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"radeon_device", !8, i64 0}
!8 = !{!"TYPE_4__", !9, i64 0, !12, i64 8, !14, i64 40}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"drm_global_reference", !9, i64 0, !13, i64 8, !13, i64 16, !9, i64 24, !9, i64 28}
!13 = !{!"any pointer", !10, i64 0}
!14 = !{!"TYPE_3__", !12, i64 0, !9, i64 32}
!15 = !{!9, !9, i64 0}
!16 = !{!12, !9, i64 24}
!17 = !{!12, !9, i64 0}
!18 = !{!12, !13, i64 16}
!19 = !{!12, !13, i64 8}
!20 = !{!7, !9, i64 36}
!21 = !{!7, !9, i64 72}
| fastsocket_kernel_drivers_gpu_drm_radeon_extr_radeon_ttm.c_radeon_ttm_global_init |
; ModuleID = 'linux_drivers_gpu_ipu-v3_extr_ipu-vdi.c_ipu_vdi_unsetup.so'
source_filename = "linux_drivers_gpu_ipu-v3_extr_ipu-vdi.c_ipu_vdi_unsetup.so"
@VDI_FSIZE = common dso_local global i32 0, align 4
@VDI_C = common dso_local global i32 0, align 4
declare dso_local ptr @spin_lock_irqsave()
declare dso_local ptr @ipu_vdi_write()
declare dso_local ptr @spin_unlock_irqrestore()
define dso_local i64 @ipu_vdi_unsetup(i64 %arg1) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%0 = call ptr @spin_lock_irqsave()
%RAX = ptrtoint ptr %0 to i64
%memload = load i32, ptr @VDI_FSIZE, align 1
%1 = call ptr @ipu_vdi_write()
%RAX1 = ptrtoint ptr %1 to i64
%memload2 = load i32, ptr @VDI_C, align 1
%2 = call ptr @ipu_vdi_write()
%RAX3 = ptrtoint ptr %2 to i64
%3 = tail call ptr @spin_unlock_irqrestore()
%RAX4 = ptrtoint ptr %3 to i64
ret i64 %RAX4
}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/ipu-v3/extr_ipu-vdi.c_ipu_vdi_unsetup.c'
source_filename = "AnghaBench/linux/drivers/gpu/ipu-v3/extr_ipu-vdi.c_ipu_vdi_unsetup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VDI_FSIZE = common local_unnamed_addr global i32 0, align 4
@VDI_C = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @ipu_vdi_unsetup(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @spin_lock_irqsave(ptr noundef %0, i64 noundef undef) #2
%3 = load i32, ptr @VDI_FSIZE, align 4, !tbaa !6
%4 = tail call i32 @ipu_vdi_write(ptr noundef %0, i32 noundef 0, i32 noundef %3) #2
%5 = load i32, ptr @VDI_C, align 4, !tbaa !6
%6 = tail call i32 @ipu_vdi_write(ptr noundef %0, i32 noundef 0, i32 noundef %5) #2
%7 = tail call i32 @spin_unlock_irqrestore(ptr noundef %0, i64 noundef undef) #2
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ipu_vdi_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_gpu_ipu-v3_extr_ipu-vdi.c_ipu_vdi_unsetup |
; ModuleID = 'freebsd_sys_dev_usb_extr_usb_transfer.c_usbd_xfer_maxp_was_clamped.so'
source_filename = "freebsd_sys_dev_usb_extr_usb_transfer.c_usbd_xfer_maxp_was_clamped.so"
define dso_local i32 @usbd_xfer_maxp_was_clamped(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
ret i32 %memload
}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/usb/extr_usb_transfer.c_usbd_xfer_maxp_was_clamped.c'
source_filename = "AnghaBench/freebsd/sys/dev/usb/extr_usb_transfer.c_usbd_xfer_maxp_was_clamped.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define i32 @usbd_xfer_maxp_was_clamped(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
ret i32 %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"usb_xfer", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_dev_usb_extr_usb_transfer.c_usbd_xfer_maxp_was_clamped |
; ModuleID = 'openssl_crypto_pem_extr_pvkfmt.c_derive_pvk_key.so'
source_filename = "openssl_crypto_pem_extr_pvkfmt.c_derive_pvk_key.so"
declare dso_local ptr @EVP_MD_CTX_new()
declare dso_local ptr @EVP_sha1()
declare dso_local ptr @EVP_DigestInit_ex()
declare dso_local ptr @EVP_DigestUpdate()
declare dso_local ptr @EVP_DigestFinal_ex()
declare dso_local ptr @EVP_MD_CTX_free()
define dso_local i32 @derive_pvk_key(i64 %arg1, i64 %arg2, i32 %arg3, i64 %arg4, i32 %arg5) {
entry:
%EBP-SKT-LOC = alloca i32, align 4
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%1 = call ptr @EVP_MD_CTX_new()
%RAX = ptrtoint ptr %1 to i64
%2 = and i64 %RAX, %RAX
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %2, 0
%3 = and i64 %2, 255
%4 = call i64 @llvm.ctpop.i64(i64 %3)
%5 = and i64 %4, 1
%PF = icmp eq i64 %5, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.5, label %bb.1
bb.1: ; preds = %entry
%6 = call ptr @EVP_sha1()
%RAX1 = ptrtoint ptr %6 to i64
%ESI = trunc i64 %RAX1 to i32
%7 = call ptr @EVP_DigestInit_ex()
%RAX2 = ptrtoint ptr %7 to i64
%8 = trunc i64 %RAX2 to i32
%9 = trunc i64 %RAX2 to i32
%10 = and i32 %8, %9
%highbit3 = and i32 -2147483648, %10
%SF4 = icmp ne i32 %highbit3, 0
%ZF5 = icmp eq i32 %10, 0
%11 = and i32 %10, 255
%12 = call i32 @llvm.ctpop.i32(i32 %11)
%13 = and i32 %12, 1
%PF6 = icmp eq i32 %13, 0
%CmpZF_JE23 = icmp eq i1 %ZF5, true
br i1 %CmpZF_JE23, label %bb.5, label %bb.2
bb.2: ; preds = %bb.1
%14 = call ptr @EVP_DigestUpdate()
%RAX7 = ptrtoint ptr %14 to i64
%15 = trunc i64 %RAX7 to i32
%16 = trunc i64 %RAX7 to i32
%17 = and i32 %15, %16
%highbit8 = and i32 -2147483648, %17
%SF9 = icmp ne i32 %highbit8, 0
%ZF10 = icmp eq i32 %17, 0
%18 = and i32 %17, 255
%19 = call i32 @llvm.ctpop.i32(i32 %18)
%20 = and i32 %19, 1
%PF11 = icmp eq i32 %20, 0
%CmpZF_JE24 = icmp eq i1 %ZF10, true
br i1 %CmpZF_JE24, label %bb.5, label %bb.3
bb.3: ; preds = %bb.2
%21 = call ptr @EVP_DigestUpdate()
%RAX12 = ptrtoint ptr %21 to i64
%22 = trunc i64 %RAX12 to i32
%23 = trunc i64 %RAX12 to i32
%24 = and i32 %22, %23
%highbit13 = and i32 -2147483648, %24
%SF14 = icmp ne i32 %highbit13, 0
%ZF15 = icmp eq i32 %24, 0
%25 = and i32 %24, 255
%26 = call i32 @llvm.ctpop.i32(i32 %25)
%27 = and i32 %26, 1
%PF16 = icmp eq i32 %27, 0
%CmpZF_JE25 = icmp eq i1 %ZF15, true
br i1 %CmpZF_JE25, label %bb.5, label %bb.4
bb.4: ; preds = %bb.3
%28 = call ptr @EVP_DigestFinal_ex()
%RAX17 = ptrtoint ptr %28 to i64
%29 = trunc i64 %RAX17 to i32
%30 = trunc i64 %RAX17 to i32
%31 = and i32 %29, %30
%highbit18 = and i32 -2147483648, %31
%SF19 = icmp ne i32 %highbit18, 0
%ZF20 = icmp eq i32 %31, 0
%32 = and i32 %31, 255
%33 = call i32 @llvm.ctpop.i32(i32 %32)
%34 = and i32 %33, 1
%PF21 = icmp eq i32 %34, 0
store i32 1, ptr %EBP-SKT-LOC, align 1
%CmpZF_JNE = icmp eq i1 %ZF20, false
br i1 %CmpZF_JNE, label %bb.6, label %bb.5
bb.5: ; preds = %bb.4, %bb.3, %bb.2, %bb.1, %entry
store i32 0, ptr %EBP-SKT-LOC, align 1
br label %bb.6
bb.6: ; preds = %bb.5, %bb.4
%35 = call ptr @EVP_MD_CTX_free()
%RAX22 = ptrtoint ptr %35 to i64
%EBP = load i32, ptr %EBP-SKT-LOC, align 1
ret i32 %EBP
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/openssl/crypto/pem/extr_pvkfmt.c_derive_pvk_key.c'
source_filename = "AnghaBench/openssl/crypto/pem/extr_pvkfmt.c_derive_pvk_key.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @derive_pvk_key], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @derive_pvk_key(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4) #0 {
%6 = tail call ptr @EVP_MD_CTX_new() #2
%7 = icmp eq ptr %6, null
br i1 %7, label %21, label %8
8: ; preds = %5
%9 = tail call i32 @EVP_sha1() #2
%10 = tail call i32 @EVP_DigestInit_ex(ptr noundef nonnull %6, i32 noundef %9, ptr noundef null) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %21, label %12
12: ; preds = %8
%13 = tail call i32 @EVP_DigestUpdate(ptr noundef nonnull %6, ptr noundef %1, i32 noundef %2) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %21, label %15
15: ; preds = %12
%16 = tail call i32 @EVP_DigestUpdate(ptr noundef nonnull %6, ptr noundef %3, i32 noundef %4) #2
%17 = icmp eq i32 %16, 0
br i1 %17, label %21, label %18
18: ; preds = %15
%19 = tail call i32 @EVP_DigestFinal_ex(ptr noundef nonnull %6, ptr noundef %0, ptr noundef null) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %18, %15, %12, %8, %5
br label %22
22: ; preds = %21, %18
%23 = phi i32 [ 0, %21 ], [ 1, %18 ]
%24 = tail call i32 @EVP_MD_CTX_free(ptr noundef %6) #2
ret i32 %23
}
declare ptr @EVP_MD_CTX_new(...) local_unnamed_addr #1
declare i32 @EVP_DigestInit_ex(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @EVP_sha1(...) local_unnamed_addr #1
declare i32 @EVP_DigestUpdate(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @EVP_DigestFinal_ex(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @EVP_MD_CTX_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| openssl_crypto_pem_extr_pvkfmt.c_derive_pvk_key |
; ModuleID = 'fastsocket_kernel_arch_arm_plat-omap_extr_mailbox.c_find_mboxes.so'
source_filename = "fastsocket_kernel_arch_arm_plat-omap_extr_mailbox.c_find_mboxes.so"
@mboxes = common dso_local global i64 0, align 8
declare dso_local i32 @strcmp(ptr, ptr)
define dso_local i64 @find_mboxes(i64 %arg1) {
entry:
%RBX-SKT-LOC17 = alloca i64, align 8
%RBX-SKT-LOC = alloca i64, align 8
%RAX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memload = load i64, ptr @mboxes, align 1
%0 = and i64 %memload, %memload
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %0, 0
%1 = and i64 %0, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
store i64 %memload, ptr %RAX-SKT-LOC, align 1
%4 = ptrtoint ptr @mboxes to i64
store i64 %4, ptr %RBX-SKT-LOC17, align 1
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%5 = ptrtoint ptr @mboxes to i64
store i64 %5, ptr %RBX-SKT-LOC, align 1
%6 = ptrtoint ptr @mboxes to i64
store i64 %6, ptr %RBX-SKT-LOC17, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.3
%RAX = load i64, ptr %RAX-SKT-LOC, align 1
%7 = inttoptr i64 %RAX to ptr
%memload1 = load i32, ptr %7, align 1
%8 = inttoptr i32 %memload1 to ptr
%9 = inttoptr i64 %arg1 to ptr
%EAX = call i32 @strcmp(ptr %8, ptr %9)
%10 = zext i32 %EAX to i64
%11 = zext i32 %EAX to i64
%12 = and i64 %10, %11
%highbit2 = and i64 -9223372036854775808, %12
%SF3 = icmp ne i64 %highbit2, 0
%ZF4 = icmp eq i64 %12, 0
%13 = and i64 %12, 255
%14 = call i64 @llvm.ctpop.i64(i64 %13)
%15 = and i64 %14, 1
%PF5 = icmp eq i64 %15, 0
%CmpZF_JE19 = icmp eq i1 %ZF4, true
br i1 %CmpZF_JE19, label %bb.4, label %bb.3
bb.3: ; preds = %bb.2
%RBX = load i64, ptr %RBX-SKT-LOC, align 1
%16 = inttoptr i64 %RBX to ptr
%memload6 = load i64, ptr %16, align 1
%memref-disp = add i64 %memload6, 8
%17 = inttoptr i64 %memref-disp to ptr
%memload7 = load i64, ptr %17, align 1
%RBX12 = add i64 %memload6, 8
%18 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %memload6, i64 8)
%CF = extractvalue { i64, i1 } %18, 1
%19 = and i64 %RBX12, 255
%20 = call i64 @llvm.ctpop.i64(i64 %19)
%21 = and i64 %20, 1
%PF8 = icmp eq i64 %21, 0
%ZF9 = icmp eq i64 %RBX12, 0
%highbit10 = and i64 -9223372036854775808, %RBX12
%SF11 = icmp ne i64 %highbit10, 0
%22 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %memload6, i64 8)
%OF = extractvalue { i64, i1 } %22, 1
%23 = and i64 %memload7, %memload7
%highbit13 = and i64 -9223372036854775808, %23
%SF14 = icmp ne i64 %highbit13, 0
%ZF15 = icmp eq i64 %23, 0
%24 = and i64 %23, 255
%25 = call i64 @llvm.ctpop.i64(i64 %24)
%26 = and i64 %25, 1
%PF16 = icmp eq i64 %26, 0
store i64 %RBX12, ptr %RBX-SKT-LOC17, align 1
%CmpZF_JNE = icmp eq i1 %ZF15, false
store i64 %memload7, ptr %RAX-SKT-LOC, align 1
store i64 %RBX12, ptr %RBX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.2, label %bb.4
bb.4: ; preds = %bb.3, %bb.2, %entry
%RBX18 = load i64, ptr %RBX-SKT-LOC17, align 1
ret i64 %RBX18
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/plat-omap/extr_mailbox.c_find_mboxes.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/plat-omap/extr_mailbox.c_find_mboxes.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@mboxes = common global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @find_mboxes], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef nonnull ptr @find_mboxes(ptr noundef %0) #0 {
%2 = load ptr, ptr @mboxes, align 8, !tbaa !6
%3 = icmp eq ptr %2, null
br i1 %3, label %15, label %4
4: ; preds = %1, %10
%5 = phi ptr [ %13, %10 ], [ %2, %1 ]
%6 = phi ptr [ %12, %10 ], [ @mboxes, %1 ]
%7 = load i32, ptr %5, align 8, !tbaa !10
%8 = tail call i64 @strcmp(i32 noundef %7, ptr noundef %0) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %15, label %10
10: ; preds = %4
%11 = load ptr, ptr %6, align 8, !tbaa !6
%12 = getelementptr inbounds i8, ptr %11, i64 8
%13 = load ptr, ptr %12, align 8, !tbaa !6
%14 = icmp eq ptr %13, null
br i1 %14, label %15, label %4, !llvm.loop !13
15: ; preds = %10, %4, %1
%16 = phi ptr [ @mboxes, %1 ], [ %6, %4 ], [ %12, %10 ]
ret ptr %16
}
declare i64 @strcmp(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"omap_mbox", !12, i64 0, !7, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| fastsocket_kernel_arch_arm_plat-omap_extr_mailbox.c_find_mboxes |
; ModuleID = 'linux_drivers_net_usb_extr_pegasus.c_get_node_id.so'
source_filename = "linux_drivers_net_usb_extr_pegasus.c_get_node_id.so"
declare dso_local ptr @read_eprom_word()
declare dso_local ptr @cpu_to_le16()
define dso_local ptr @get_node_id(i64 %arg1, i64 %arg2) {
entry:
%stktop_8 = alloca i8, i32 36, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 0
%RSP_P.0 = inttoptr i64 %0 to ptr
%1 = add i64 %tos, 12
%RSP_P.12 = inttoptr i64 %1 to ptr
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%R15 = ptrtoint ptr %RSP_P.12 to i64
%2 = call ptr @read_eprom_word()
%RAX = ptrtoint ptr %2 to i64
%memload = load i32, ptr %RSP_P.12, align 1
%3 = call ptr @cpu_to_le16()
%RAX1 = ptrtoint ptr %3 to i64
%4 = trunc i64 %RAX1 to i32
%5 = inttoptr i64 %arg2 to ptr
store i32 %4, ptr %5, align 1
%6 = call ptr @read_eprom_word()
%RAX2 = ptrtoint ptr %6 to i64
%memload3 = load i32, ptr %RSP_P.12, align 1
%7 = call ptr @cpu_to_le16()
%RAX4 = ptrtoint ptr %7 to i64
%memref-disp = add i64 %arg2, 4
%8 = trunc i64 %RAX4 to i32
%9 = inttoptr i64 %memref-disp to ptr
store i32 %8, ptr %9, align 1
%10 = call ptr @read_eprom_word()
%RAX5 = ptrtoint ptr %10 to i64
%memload6 = load i32, ptr %RSP_P.12, align 1
%11 = call ptr @cpu_to_le16()
%RAX7 = ptrtoint ptr %11 to i64
%memref-disp8 = add i64 %arg2, 8
%12 = trunc i64 %RAX7 to i32
%13 = inttoptr i64 %memref-disp8 to ptr
store i32 %12, ptr %13, align 1
ret ptr %11
}
| ; ModuleID = 'AnghaBench/linux/drivers/net/usb/extr_pegasus.c_get_node_id.c'
source_filename = "AnghaBench/linux/drivers/net/usb/extr_pegasus.c_get_node_id.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @get_node_id], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @get_node_id(ptr noundef %0, ptr nocapture noundef writeonly %1) #0 {
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = call i32 @read_eprom_word(ptr noundef %0, i32 noundef 0, ptr noundef nonnull %3) #3
%5 = load i32, ptr %3, align 4, !tbaa !6
%6 = call i32 @cpu_to_le16(i32 noundef %5) #3
store i32 %6, ptr %1, align 4, !tbaa !6
%7 = call i32 @read_eprom_word(ptr noundef %0, i32 noundef 1, ptr noundef nonnull %3) #3
%8 = load i32, ptr %3, align 4, !tbaa !6
%9 = call i32 @cpu_to_le16(i32 noundef %8) #3
%10 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %9, ptr %10, align 4, !tbaa !6
%11 = call i32 @read_eprom_word(ptr noundef %0, i32 noundef 2, ptr noundef nonnull %3) #3
%12 = load i32, ptr %3, align 4, !tbaa !6
%13 = call i32 @cpu_to_le16(i32 noundef %12) #3
%14 = getelementptr inbounds i8, ptr %1, i64 8
store i32 %13, ptr %14, align 4, !tbaa !6
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @read_eprom_word(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @cpu_to_le16(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_net_usb_extr_pegasus.c_get_node_id |
; ModuleID = 'freebsd_tools_tools_cfi_extr_cfi.c_getfactorypr.so'
source_filename = "freebsd_tools_tools_cfi_extr_cfi.c_getfactorypr.so"
@O_RDONLY = common dso_local global i32 0, align 4
@CFIOCGFACTORYPR = common dso_local global i32 0, align 4
@rodata_13 = private unnamed_addr constant [23 x i8] c"ioctl(CFIOCGFACTORYPR)\00", align 1, !ROData_SecInfo !0
declare dso_local ptr @getfd()
declare dso_local ptr @ioctl()
declare dso_local ptr @err()
declare dso_local ptr @close()
define dso_local i32 @getfactorypr() {
entry:
%stktop_8 = alloca i8, i32 36, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 0
%RSP_P.0 = inttoptr i64 %0 to ptr
%1 = add i64 %tos, 12
%RSP_P.12 = inttoptr i64 %1 to ptr
store i64 3735928559, ptr %RSP_P.0, align 8
%memload = load i32, ptr @O_RDONLY, align 1
%2 = call ptr @getfd()
%RAX = ptrtoint ptr %2 to i64
%EBX = trunc i64 %RAX to i32
%memload1 = load i32, ptr @CFIOCGFACTORYPR, align 1
%RDX = ptrtoint ptr %RSP_P.12 to i64
%3 = call ptr @ioctl()
%RAX2 = ptrtoint ptr %3 to i64
%4 = and i64 %RAX2, %RAX2
%highbit = and i64 -9223372036854775808, %4
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %4, 0
%5 = and i64 %4, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF = icmp eq i64 %7, 0
%CmpSF_JNS = icmp eq i1 %SF, false
br i1 %CmpSF_JNS, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%RSI = ptrtoint ptr @rodata_13 to i64
%8 = call ptr @err()
%RAX3 = ptrtoint ptr %8 to i64
br label %bb.2
bb.2: ; preds = %bb.1, %entry
%9 = call ptr @close()
%RAX4 = ptrtoint ptr %9 to i64
%memload5 = load i32, ptr %RSP_P.12, align 1
ret i32 %memload5
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/freebsd/tools/tools/cfi/extr_cfi.c_getfactorypr.c'
source_filename = "AnghaBench/freebsd/tools/tools/cfi/extr_cfi.c_getfactorypr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@O_RDONLY = common local_unnamed_addr global i32 0, align 4
@CFIOCGFACTORYPR = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [23 x i8] c"ioctl(CFIOCGFACTORYPR)\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @getfactorypr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @getfactorypr() #0 {
%1 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
%2 = load i32, ptr @O_RDONLY, align 4, !tbaa !6
%3 = tail call i32 @getfd(i32 noundef %2) #3
%4 = load i32, ptr @CFIOCGFACTORYPR, align 4, !tbaa !6
%5 = call i64 @ioctl(i32 noundef %3, i32 noundef %4, ptr noundef nonnull %1) #3
%6 = icmp slt i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i32 @err(i32 noundef -1, ptr noundef nonnull @.str) #3
br label %9
9: ; preds = %7, %0
%10 = call i32 @close(i32 noundef %3) #3
%11 = load i32, ptr %1, align 4, !tbaa !6
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret i32 %11
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @getfd(i32 noundef) local_unnamed_addr #2
declare i64 @ioctl(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @err(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @close(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_tools_tools_cfi_extr_cfi.c_getfactorypr |
; ModuleID = 'linux_drivers_staging_wilc1000_extr_wilc_netdev.c_wilc_netdev_ifc_init.so'
source_filename = "linux_drivers_staging_wilc1000_extr_wilc_netdev.c_wilc_netdev_ifc_init.so"
@wilc_netdev_ops = common dso_local global i32 0, align 4
@EFAULT = common dso_local global i32 0, align 4
@ENOMEM = common dso_local global i32 0, align 4
declare dso_local ptr @alloc_etherdev()
declare dso_local ptr @netdev_priv()
declare dso_local ptr @strcpy(ptr, ptr)
declare dso_local ptr @wiphy_dev()
declare dso_local ptr @SET_NETDEV_DEV()
declare dso_local ptr @register_netdevice()
declare dso_local ptr @register_netdev()
declare dso_local ptr @free_netdev()
declare dso_local ptr @ERR_PTR()
define dso_local i64 @wilc_netdev_ifc_init(i64 %arg1, i64 %arg2, i32 %arg3, i32 %arg4, i32 %arg5) {
entry:
%RAX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%1 = call ptr @alloc_etherdev()
%RAX = ptrtoint ptr %1 to i64
%2 = and i64 %RAX, %RAX
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %2, 0
%3 = and i64 %2, 255
%4 = call i64 @llvm.ctpop.i64(i64 %3)
%5 = and i64 %4, 1
%PF = icmp eq i64 %5, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%6 = ptrtoint ptr %stktop_8 to i64
%7 = add i64 %6, 4
%8 = inttoptr i64 %7 to ptr
store i32 %arg3, ptr %8, align 1
%9 = call ptr @netdev_priv()
%RAX1 = ptrtoint ptr %9 to i64
%RAX6 = add i64 %RAX1, 40
%10 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %RAX1, i64 40)
%CF = extractvalue { i64, i1 } %10, 1
%11 = and i64 %RAX6, 255
%12 = call i64 @llvm.ctpop.i64(i64 %11)
%13 = and i64 %12, 1
%PF2 = icmp eq i64 %13, 0
%ZF3 = icmp eq i64 %RAX6, 0
%highbit4 = and i64 -9223372036854775808, %RAX6
%SF5 = icmp ne i64 %highbit4, 0
%14 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %RAX1, i64 40)
%OF = extractvalue { i64, i1 } %14, 1
%memref-disp = add i64 %RAX, 32
%15 = inttoptr i64 %memref-disp to ptr
store i64 %RAX6, ptr %15, align 1
%memref-disp7 = add i64 %RAX, 24
%16 = inttoptr i64 %memref-disp7 to ptr
%memload = load i32, ptr %16, align 1
%17 = inttoptr i32 %memload to ptr
%18 = inttoptr i64 %arg2 to ptr
%19 = call ptr @strcpy(ptr %17, ptr %18)
%RAX8 = ptrtoint ptr %19 to i64
%memref-disp9 = add i64 %RAX1, 24
%20 = inttoptr i64 %memref-disp9 to ptr
store i64 %arg1, ptr %20, align 1
%memref-disp10 = add i64 %RAX1, 64
%21 = inttoptr i64 %memref-disp10 to ptr
store i64 %RAX, ptr %21, align 1
%memref-disp11 = add i64 %RAX, 16
%22 = inttoptr i64 %memref-disp11 to ptr
store i64 %RAX1, ptr %22, align 1
%memref-disp12 = add i64 %RAX, 8
%23 = ptrtoint ptr @wilc_netdev_ops to i64
%24 = inttoptr i64 %memref-disp12 to ptr
store i64 %23, ptr %24, align 1
%memref-disp13 = add i64 %arg1, 16
%25 = inttoptr i64 %memref-disp13 to ptr
%memload14 = load i32, ptr %25, align 1
%26 = call ptr @wiphy_dev()
%RAX15 = ptrtoint ptr %26 to i64
%ESI = trunc i64 %RAX15 to i32
%27 = call ptr @SET_NETDEV_DEV()
%RAX16 = ptrtoint ptr %27 to i64
%memref-disp17 = add i64 %arg1, 16
%28 = inttoptr i64 %memref-disp17 to ptr
%memload18 = load i32, ptr %28, align 1
%memref-disp19 = add i64 %RAX1, 56
%29 = inttoptr i64 %memref-disp19 to ptr
store i32 %memload18, ptr %29, align 1
%memref-disp20 = add i64 %RAX1, 48
%30 = inttoptr i64 %memref-disp20 to ptr
store i64 %RAX, ptr %30, align 1
%memref-disp21 = add i64 %RAX1, 40
%31 = inttoptr i64 %memref-disp21 to ptr
store i32 %arg4, ptr %31, align 1
%memref-disp22 = add i64 %RAX1, 32
%32 = inttoptr i64 %memref-disp22 to ptr
store i64 %RAX, ptr %32, align 1
%33 = and i32 %arg5, %arg5
%highbit23 = and i32 -2147483648, %33
%SF24 = icmp ne i32 %highbit23, 0
%ZF25 = icmp eq i32 %33, 0
%34 = and i32 %33, 255
%35 = call i32 @llvm.ctpop.i32(i32 %34)
%36 = and i32 %35, 1
%PF26 = icmp eq i32 %36, 0
%CmpZF_JE1 = icmp eq i1 %ZF25, true
br i1 %CmpZF_JE1, label %bb.6, label %bb.2
bb.2: ; preds = %bb.1
%37 = call ptr @register_netdevice()
%RAX27 = ptrtoint ptr %37 to i64
%38 = trunc i64 %RAX27 to i32
%39 = trunc i64 %RAX27 to i32
%40 = and i32 %38, %39
%highbit28 = and i32 -2147483648, %40
%SF29 = icmp ne i32 %highbit28, 0
%ZF30 = icmp eq i32 %40, 0
%41 = and i32 %40, 255
%42 = call i32 @llvm.ctpop.i32(i32 %41)
%43 = and i32 %42, 1
%PF31 = icmp eq i32 %43, 0
%CmpZF_JE2 = icmp eq i1 %ZF30, true
br i1 %CmpZF_JE2, label %bb.7, label %bb.3
bb.6: ; preds = %bb.1
%44 = call ptr @register_netdev()
%RAX32 = ptrtoint ptr %44 to i64
%45 = trunc i64 %RAX32 to i32
%46 = trunc i64 %RAX32 to i32
%47 = and i32 %45, %46
%highbit33 = and i32 -2147483648, %47
%SF34 = icmp ne i32 %highbit33, 0
%ZF35 = icmp eq i32 %47, 0
%48 = and i32 %47, 255
%49 = call i32 @llvm.ctpop.i32(i32 %48)
%50 = and i32 %49, 1
%PF36 = icmp eq i32 %50, 0
%CmpZF_JNE = icmp eq i1 %ZF35, false
br i1 %CmpZF_JNE, label %bb.3, label %bb.7
bb.7: ; preds = %bb.6, %bb.2
store i32 1, ptr %1, align 1
%51 = ptrtoint ptr %stktop_8 to i64
%52 = add i64 %51, 4
%53 = inttoptr i64 %52 to ptr
%memload37 = load i32, ptr %53, align 1
store i32 %memload37, ptr %9, align 1
%memref-disp38 = add i64 %RAX1, 24
%54 = inttoptr i64 %memref-disp38 to ptr
%memload39 = load i64, ptr %54, align 1
%memref-disp40 = add i64 %memload39, 8
%55 = inttoptr i64 %memref-disp40 to ptr
%memload41 = load i64, ptr %55, align 1
%56 = inttoptr i64 %arg1 to ptr
%memload42 = load i64, ptr %56, align 1
%memref-idxreg = mul i64 8, %memload42
%memref-basereg = add i64 %memload41, %memref-idxreg
%57 = inttoptr i64 %memref-basereg to ptr
store i64 %RAX1, ptr %57, align 1
%memref-disp43 = add i64 %RAX1, 8
%58 = inttoptr i64 %memref-disp43 to ptr
store i64 %memload42, ptr %58, align 1
%RCX = add i64 %memload42, 1
%59 = and i64 %RCX, 255
%60 = call i64 @llvm.ctpop.i64(i64 %59)
%61 = and i64 %60, 1
%PF44 = icmp eq i64 %61, 0
%ZF45 = icmp eq i64 %RCX, 0
%highbit46 = and i64 -9223372036854775808, %RCX
%SF47 = icmp ne i64 %highbit46, 0
%62 = inttoptr i64 %arg1 to ptr
store i64 %RCX, ptr %62, align 1
%memref-disp48 = add i64 %RAX1, 16
%63 = inttoptr i64 %memref-disp48 to ptr
%64 = sext i32 0 to i64
store i64 %64, ptr %63, align 1
br label %UnifiedReturnBlock
bb.3: ; preds = %bb.6, %bb.2
%65 = call ptr @free_netdev()
%RAX49 = ptrtoint ptr %65 to i64
%66 = ptrtoint ptr @EFAULT to i64
store i64 %66, ptr %RAX-SKT-LOC, align 1
br label %bb.5
bb.4: ; preds = %entry
%67 = ptrtoint ptr @ENOMEM to i64
store i64 %67, ptr %RAX-SKT-LOC, align 1
br label %bb.5
bb.5: ; preds = %bb.4, %bb.3
%RAX50 = load i64, ptr %RAX-SKT-LOC, align 1
%68 = inttoptr i64 %RAX50 to ptr
%69 = load i32, ptr %68, align 1
%EDI = sub i32 0, %69
%70 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 0, i32 %69)
%CF51 = extractvalue { i32, i1 } %70, 1
%ZF52 = icmp eq i32 %EDI, 0
%highbit53 = and i32 -2147483648, %EDI
%SF54 = icmp ne i32 %highbit53, 0
%71 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 0, i32 %69)
%OF55 = extractvalue { i32, i1 } %71, 1
%72 = and i32 %EDI, 255
%73 = call i32 @llvm.ctpop.i32(i32 %72)
%74 = and i32 %73, 1
%PF56 = icmp eq i32 %74, 0
%75 = tail call ptr @ERR_PTR()
%RAX57 = ptrtoint ptr %75 to i64
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.5, %bb.7
%UnifiedRetVal = phi i64 [ %9, %bb.7 ], [ %RAX57, %bb.5 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/staging/wilc1000/extr_wilc_netdev.c_wilc_netdev_ifc_init.c'
source_filename = "AnghaBench/linux/drivers/staging/wilc1000/extr_wilc_netdev.c_wilc_netdev_ifc_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@wilc_netdev_ops = common global i32 0, align 4
@EFAULT = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @wilc_netdev_ifc_init(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
%6 = tail call ptr @alloc_etherdev(i32 noundef 72) #2
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%10 = sub nsw i32 0, %9
%11 = tail call ptr @ERR_PTR(i32 noundef %10) #2
br label %53
12: ; preds = %5
%13 = tail call ptr @netdev_priv(ptr noundef nonnull %6) #2
%14 = getelementptr inbounds i8, ptr %13, i64 32
%15 = getelementptr inbounds i8, ptr %13, i64 40
%16 = getelementptr inbounds i8, ptr %6, i64 32
store ptr %15, ptr %16, align 8, !tbaa !10
%17 = getelementptr inbounds i8, ptr %6, i64 24
%18 = load i32, ptr %17, align 8, !tbaa !13
%19 = tail call i32 @strcpy(i32 noundef %18, ptr noundef %1) #2
%20 = getelementptr inbounds i8, ptr %13, i64 24
store ptr %0, ptr %20, align 8, !tbaa !14
%21 = getelementptr inbounds i8, ptr %13, i64 64
store ptr %6, ptr %21, align 8, !tbaa !19
%22 = getelementptr inbounds i8, ptr %6, i64 16
store ptr %13, ptr %22, align 8, !tbaa !20
%23 = getelementptr inbounds i8, ptr %6, i64 8
store ptr @wilc_netdev_ops, ptr %23, align 8, !tbaa !21
%24 = getelementptr inbounds i8, ptr %0, i64 16
%25 = load i32, ptr %24, align 8, !tbaa !22
%26 = tail call i32 @wiphy_dev(i32 noundef %25) #2
%27 = tail call i32 @SET_NETDEV_DEV(ptr noundef nonnull %6, i32 noundef %26) #2
%28 = load i32, ptr %24, align 8, !tbaa !22
%29 = getelementptr inbounds i8, ptr %13, i64 56
store i32 %28, ptr %29, align 8, !tbaa !24
%30 = getelementptr inbounds i8, ptr %13, i64 48
store ptr %6, ptr %30, align 8, !tbaa !25
store i32 %3, ptr %15, align 8, !tbaa !26
store ptr %6, ptr %14, align 8, !tbaa !27
%31 = icmp eq i32 %4, 0
br i1 %31, label %34, label %32
32: ; preds = %12
%33 = tail call i32 @register_netdevice(ptr noundef nonnull %6) #2
br label %36
34: ; preds = %12
%35 = tail call i32 @register_netdev(ptr noundef nonnull %6) #2
br label %36
36: ; preds = %34, %32
%37 = phi i32 [ %33, %32 ], [ %35, %34 ]
%38 = icmp eq i32 %37, 0
br i1 %38, label %44, label %39
39: ; preds = %36
%40 = tail call i32 @free_netdev(ptr noundef nonnull %6) #2
%41 = load i32, ptr @EFAULT, align 4, !tbaa !6
%42 = sub nsw i32 0, %41
%43 = tail call ptr @ERR_PTR(i32 noundef %42) #2
br label %53
44: ; preds = %36
store i32 1, ptr %6, align 8, !tbaa !28
store i32 %2, ptr %13, align 8, !tbaa !29
%45 = load ptr, ptr %20, align 8, !tbaa !14
%46 = getelementptr inbounds i8, ptr %45, i64 8
%47 = load ptr, ptr %46, align 8, !tbaa !30
%48 = load i64, ptr %0, align 8, !tbaa !31
%49 = getelementptr inbounds ptr, ptr %47, i64 %48
store ptr %13, ptr %49, align 8, !tbaa !32
%50 = getelementptr inbounds i8, ptr %13, i64 8
store i64 %48, ptr %50, align 8, !tbaa !33
%51 = add i64 %48, 1
store i64 %51, ptr %0, align 8, !tbaa !31
%52 = getelementptr inbounds i8, ptr %13, i64 16
store i64 0, ptr %52, align 8, !tbaa !34
br label %53
53: ; preds = %44, %39, %8
%54 = phi ptr [ %43, %39 ], [ %13, %44 ], [ %11, %8 ]
ret ptr %54
}
declare ptr @alloc_etherdev(i32 noundef) local_unnamed_addr #1
declare ptr @ERR_PTR(i32 noundef) local_unnamed_addr #1
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i32 @strcpy(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @SET_NETDEV_DEV(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wiphy_dev(i32 noundef) local_unnamed_addr #1
declare i32 @register_netdevice(ptr noundef) local_unnamed_addr #1
declare i32 @register_netdev(ptr noundef) local_unnamed_addr #1
declare i32 @free_netdev(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 32}
!11 = !{!"net_device", !7, i64 0, !12, i64 8, !12, i64 16, !7, i64 24, !12, i64 32}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !7, i64 24}
!14 = !{!15, !12, i64 24}
!15 = !{!"wilc_vif", !7, i64 0, !16, i64 8, !16, i64 16, !12, i64 24, !17, i64 32, !12, i64 64}
!16 = !{!"long", !8, i64 0}
!17 = !{!"TYPE_4__", !12, i64 0, !18, i64 8}
!18 = !{!"TYPE_3__", !7, i64 0, !12, i64 8, !7, i64 16}
!19 = !{!15, !12, i64 64}
!20 = !{!11, !12, i64 16}
!21 = !{!11, !12, i64 8}
!22 = !{!23, !7, i64 16}
!23 = !{!"wilc", !16, i64 0, !12, i64 8, !7, i64 16}
!24 = !{!15, !7, i64 56}
!25 = !{!15, !12, i64 48}
!26 = !{!15, !7, i64 40}
!27 = !{!15, !12, i64 32}
!28 = !{!11, !7, i64 0}
!29 = !{!15, !7, i64 0}
!30 = !{!23, !12, i64 8}
!31 = !{!23, !16, i64 0}
!32 = !{!12, !12, i64 0}
!33 = !{!15, !16, i64 8}
!34 = !{!15, !16, i64 16}
| linux_drivers_staging_wilc1000_extr_wilc_netdev.c_wilc_netdev_ifc_init |
; ModuleID = 'timescaledb_src_extr_dimension.c_interval_to_usec.so'
source_filename = "timescaledb_src_extr_dimension.c_interval_to_usec.so"
@DAYS_PER_MONTH = common dso_local global i32 0, align 4
@USECS_PER_DAY = common dso_local global i32 0, align 4
define dso_local i64 @interval_to_usec(i64 %arg1) {
entry:
%memload = load i32, ptr @DAYS_PER_MONTH, align 1
%0 = inttoptr i64 %arg1 to ptr
%memload1 = load i32, ptr %0, align 1
%EAX = mul i32 %memload, %memload1
%memref-disp = add i64 %arg1, 4
%1 = inttoptr i64 %memref-disp to ptr
%memload2 = load i32, ptr %1, align 1
%EAX3 = add i32 %EAX, %memload2
%2 = and i32 %EAX3, 255
%3 = call i32 @llvm.ctpop.i32(i32 %2)
%4 = and i32 %3, 1
%PF = icmp eq i32 %4, 0
%memload4 = load i32, ptr @USECS_PER_DAY, align 1
%EAX5 = mul i32 %EAX3, %memload4
%RAX = sext i32 %EAX5 to i64
%memref-disp6 = add i64 %arg1, 8
%5 = inttoptr i64 %memref-disp6 to ptr
%memload7 = load i64, ptr %5, align 1
%RAX9 = add i64 %RAX, %memload7
%6 = and i64 %RAX9, 255
%7 = call i64 @llvm.ctpop.i64(i64 %6)
%8 = and i64 %7, 1
%PF8 = icmp eq i64 %8, 0
ret i64 %RAX9
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/timescaledb/src/extr_dimension.c_interval_to_usec.c'
source_filename = "AnghaBench/timescaledb/src/extr_dimension.c_interval_to_usec.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DAYS_PER_MONTH = common local_unnamed_addr global i32 0, align 4
@USECS_PER_DAY = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @interval_to_usec], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal i64 @interval_to_usec(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !6
%3 = load i32, ptr @DAYS_PER_MONTH, align 4, !tbaa !12
%4 = mul nsw i32 %3, %2
%5 = load i32, ptr @USECS_PER_DAY, align 4, !tbaa !12
%6 = getelementptr inbounds i8, ptr %0, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !13
%8 = add i32 %7, %4
%9 = mul i32 %8, %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, ptr %0, i64 8
%12 = load i64, ptr %11, align 8, !tbaa !14
%13 = add nsw i64 %12, %10
ret i64 %13
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !8, i64 4}
!14 = !{!7, !11, i64 8}
| timescaledb_src_extr_dimension.c_interval_to_usec |
; ModuleID = 'linux_drivers_media_usb_cpia2_extr_cpia2_v4l.c_sync.so'
source_filename = "linux_drivers_media_usb_cpia2_extr_cpia2_v4l.c_sync.so"
@FRAME_READY = common dso_local global i64 0, align 8
@current = common dso_local global i32 0, align 4
@ENOTTY = common dso_local global i32 0, align 4
@ERESTARTSYS = common dso_local global i32 0, align 4
declare dso_local ptr @mutex_unlock()
declare dso_local ptr @wait_event_interruptible()
declare dso_local ptr @mutex_lock()
declare dso_local ptr @signal_pending()
declare dso_local ptr @video_is_registered()
define dso_local i32 @sync(i64 %arg1, i32 %arg2) {
entry:
%EAX-SKT-LOC = alloca i32, align 4
%RCX-SKT-LOC = alloca i64, align 8
%AL-SKT-LOC = alloca i8, align 1
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memref-disp = add i64 %arg1, 16
%1 = inttoptr i64 %memref-disp to ptr
%memload = load i64, ptr %1, align 1
%R12 = sext i32 %arg2 to i64
%R121 = shl i64 %R12, 4
%ZF = icmp eq i64 %R121, 0
%highbit = and i64 -9223372036854775808, %R121
%SF = icmp ne i64 %highbit, 0
store i64 %memload, ptr %stktop_8, align 1
%memref-basereg = add i64 %memload, %R121
%memref-disp2 = add i64 %arg1, 4
br label %bb.1
bb.1: ; preds = %entry, %bb.8
%memload3 = load i64, ptr @FRAME_READY, align 1
%2 = inttoptr i64 %memref-basereg to ptr
%3 = load i64, ptr %2, align 1
%4 = sub i64 %3, %memload3
%5 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %3, i64 %memload3)
%CF = extractvalue { i64, i1 } %5, 1
%ZF4 = icmp eq i64 %4, 0
%highbit5 = and i64 -9223372036854775808, %4
%SF6 = icmp ne i64 %highbit5, 0
%6 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %3, i64 %memload3)
%OF = extractvalue { i64, i1 } %6, 1
%7 = and i64 %4, 255
%8 = call i64 @llvm.ctpop.i64(i64 %7)
%9 = and i64 %8, 1
%PF = icmp eq i64 %9, 0
store i32 0, ptr %EAX-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF4, true
br i1 %CmpZF_JE, label %bb.13, label %bb.2
bb.2: ; preds = %bb.1
%memref-disp7 = add i64 %arg1, 8
%10 = inttoptr i64 %memref-disp7 to ptr
%11 = load i32, ptr %10, align 1
%12 = zext i32 %11 to i64
%13 = zext i32 0 to i64
%14 = sub i64 %12, %13
%15 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %12, i64 %13)
%CF8 = extractvalue { i64, i1 } %15, 1
%ZF9 = icmp eq i64 %14, 0
%highbit10 = and i64 -9223372036854775808, %14
%SF11 = icmp ne i64 %highbit10, 0
%16 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %12, i64 %13)
%OF12 = extractvalue { i64, i1 } %16, 1
%17 = and i64 %14, 255
%18 = call i64 @llvm.ctpop.i64(i64 %17)
%19 = and i64 %18, 1
%PF13 = icmp eq i64 %19, 0
%CmpZF_JE54 = icmp eq i1 %ZF9, true
br i1 %CmpZF_JE54, label %bb.10, label %bb.3
bb.3: ; preds = %bb.2
%20 = call ptr @mutex_unlock()
%RAX = ptrtoint ptr %20 to i64
%memref-disp14 = add i64 %arg1, 8
%21 = inttoptr i64 %memref-disp14 to ptr
%22 = load i32, ptr %21, align 1
%23 = zext i32 %22 to i64
%24 = zext i32 0 to i64
%25 = sub i64 %23, %24
%26 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %23, i64 %24)
%CF15 = extractvalue { i64, i1 } %26, 1
%ZF16 = icmp eq i64 %25, 0
%highbit17 = and i64 -9223372036854775808, %25
%SF18 = icmp ne i64 %highbit17, 0
%27 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %23, i64 %24)
%OF19 = extractvalue { i64, i1 } %27, 1
%28 = and i64 %25, 255
%29 = call i64 @llvm.ctpop.i64(i64 %28)
%30 = and i64 %29, 1
%PF20 = icmp eq i64 %30, 0
%CmpZF_JE55 = icmp eq i1 %ZF16, true
br i1 %CmpZF_JE55, label %bb.6, label %bb.4
bb.4: ; preds = %bb.3
%31 = inttoptr i64 %memref-basereg to ptr
%memload21 = load i64, ptr %31, align 1
%32 = load i64, ptr @FRAME_READY, align 8
%33 = sub i64 %memload21, %32
%34 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload21, i64 %32)
%CF22 = extractvalue { i64, i1 } %34, 1
%ZF23 = icmp eq i64 %33, 0
%highbit24 = and i64 -9223372036854775808, %33
%SF25 = icmp ne i64 %highbit24, 0
%35 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload21, i64 %32)
%OF26 = extractvalue { i64, i1 } %35, 1
%36 = and i64 %33, 255
%37 = call i64 @llvm.ctpop.i64(i64 %36)
%38 = and i64 %37, 1
%PF27 = icmp eq i64 %38, 0
%AL = icmp eq i1 %ZF23, true
%39 = zext i1 %AL to i8
store i8 %39, ptr %AL-SKT-LOC, align 1
br label %bb.7
bb.6: ; preds = %bb.3
store i8 1, ptr %AL-SKT-LOC, align 1
br label %bb.7
bb.7: ; preds = %bb.6, %bb.4
%memref-disp28 = add i64 %arg1, 12
%40 = inttoptr i64 %memref-disp28 to ptr
%memload29 = load i32, ptr %40, align 1
%AL30 = load i8, ptr %AL-SKT-LOC, align 1
%ESI = zext i8 %AL30 to i32
%41 = call ptr @wait_event_interruptible()
%RAX31 = ptrtoint ptr %41 to i64
%42 = call ptr @mutex_lock()
%RAX32 = ptrtoint ptr %42 to i64
%memload33 = load i32, ptr @current, align 1
%43 = call ptr @signal_pending()
%RAX34 = ptrtoint ptr %43 to i64
%44 = and i64 %RAX34, %RAX34
%highbit35 = and i64 -9223372036854775808, %44
%SF36 = icmp ne i64 %highbit35, 0
%ZF37 = icmp eq i64 %44, 0
%45 = and i64 %44, 255
%46 = call i64 @llvm.ctpop.i64(i64 %45)
%47 = and i64 %46, 1
%PF38 = icmp eq i64 %47, 0
%CmpZF_JNE = icmp eq i1 %ZF37, false
br i1 %CmpZF_JNE, label %bb.11, label %bb.8
bb.8: ; preds = %bb.7
%48 = call ptr @video_is_registered()
%RAX39 = ptrtoint ptr %48 to i64
%49 = trunc i64 %RAX39 to i32
%50 = trunc i64 %RAX39 to i32
%51 = and i32 %49, %50
%highbit40 = and i32 -2147483648, %51
%SF41 = icmp ne i32 %highbit40, 0
%ZF42 = icmp eq i32 %51, 0
%52 = and i32 %51, 255
%53 = call i32 @llvm.ctpop.i32(i32 %52)
%54 = and i32 %53, 1
%PF43 = icmp eq i32 %54, 0
%CmpZF_JNE56 = icmp eq i1 %ZF42, false
br i1 %CmpZF_JNE56, label %bb.1, label %bb.9
bb.9: ; preds = %bb.8
%55 = ptrtoint ptr @ENOTTY to i64
store i64 %55, ptr %RCX-SKT-LOC, align 1
br label %bb.12
bb.11: ; preds = %bb.7
%56 = ptrtoint ptr @ERESTARTSYS to i64
store i64 %56, ptr %RCX-SKT-LOC, align 1
br label %bb.12
bb.12: ; preds = %bb.11, %bb.9
%RCX = load i64, ptr %RCX-SKT-LOC, align 1
%57 = inttoptr i64 %RCX to ptr
%58 = load i32, ptr %57, align 1
%EAX = sub i32 0, %58
%59 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 0, i32 %58)
%CF44 = extractvalue { i32, i1 } %59, 1
%ZF45 = icmp eq i32 %EAX, 0
%highbit46 = and i32 -2147483648, %EAX
%SF47 = icmp ne i32 %highbit46, 0
%60 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 0, i32 %58)
%OF48 = extractvalue { i32, i1 } %60, 1
%61 = and i32 %EAX, 255
%62 = call i32 @llvm.ctpop.i32(i32 %61)
%63 = and i32 %62, 1
%PF49 = icmp eq i32 %63, 0
store i32 %EAX, ptr %EAX-SKT-LOC, align 1
br label %bb.13
bb.10: ; preds = %bb.2
%64 = inttoptr i64 %memref-basereg to ptr
store i64 %memload3, ptr %64, align 1
%memload50 = load i64, ptr %stktop_8, align 1
%memref-basereg51 = add i64 %memload50, %R121
%memref-disp52 = add i64 %memref-basereg51, 8
%65 = inttoptr i64 %memref-disp52 to ptr
%66 = sext i32 0 to i64
store i64 %66, ptr %65, align 1
br label %bb.13
bb.13: ; preds = %bb.12, %bb.10, %bb.1
%EAX53 = load i32, ptr %EAX-SKT-LOC, align 1
ret i32 %EAX53
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/media/usb/cpia2/extr_cpia2_v4l.c_sync.c'
source_filename = "AnghaBench/linux/drivers/media/usb/cpia2/extr_cpia2_v4l.c_sync.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.framebuf = type { i64, i64 }
@FRAME_READY = common local_unnamed_addr global i64 0, align 8
@current = common local_unnamed_addr global i32 0, align 4
@ERESTARTSYS = common local_unnamed_addr global i32 0, align 4
@ENOTTY = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sync], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @sync(ptr noundef %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 16
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = sext i32 %1 to i64
%6 = getelementptr inbounds %struct.framebuf, ptr %4, i64 %5
%7 = getelementptr inbounds i8, ptr %0, i64 8
%8 = getelementptr inbounds i8, ptr %0, i64 4
%9 = getelementptr inbounds i8, ptr %0, i64 12
br label %10
10: ; preds = %39, %2
%11 = load i64, ptr %6, align 8, !tbaa !12
%12 = load i64, ptr @FRAME_READY, align 8, !tbaa !15
%13 = icmp eq i64 %11, %12
br i1 %13, label %45, label %14
14: ; preds = %10
%15 = load i32, ptr %7, align 8, !tbaa !16
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %19
17: ; preds = %14
store i64 %12, ptr %6, align 8, !tbaa !12
%18 = getelementptr inbounds i8, ptr %6, i64 8
store i64 0, ptr %18, align 8, !tbaa !17
br label %45
19: ; preds = %14
%20 = tail call i32 @mutex_unlock(ptr noundef nonnull %8) #2
%21 = load i32, ptr %9, align 4, !tbaa !18
%22 = load i32, ptr %7, align 8, !tbaa !16
%23 = icmp eq i32 %22, 0
br i1 %23, label %28, label %24
24: ; preds = %19
%25 = load i64, ptr %6, align 8, !tbaa !12
%26 = load i64, ptr @FRAME_READY, align 8, !tbaa !15
%27 = icmp eq i64 %25, %26
br label %28
28: ; preds = %24, %19
%29 = phi i1 [ true, %19 ], [ %27, %24 ]
%30 = zext i1 %29 to i32
%31 = tail call i32 @wait_event_interruptible(i32 noundef %21, i32 noundef %30) #2
%32 = tail call i32 @mutex_lock(ptr noundef nonnull %8) #2
%33 = load i32, ptr @current, align 4, !tbaa !19
%34 = tail call i64 @signal_pending(i32 noundef %33) #2
%35 = icmp eq i64 %34, 0
br i1 %35, label %39, label %36
36: ; preds = %28
%37 = load i32, ptr @ERESTARTSYS, align 4, !tbaa !19
%38 = sub nsw i32 0, %37
br label %45
39: ; preds = %28
%40 = tail call i32 @video_is_registered(ptr noundef nonnull %0) #2
%41 = icmp eq i32 %40, 0
br i1 %41, label %42, label %10
42: ; preds = %39
%43 = load i32, ptr @ENOTTY, align 4, !tbaa !19
%44 = sub nsw i32 0, %43
br label %45
45: ; preds = %10, %42, %36, %17
%46 = phi i32 [ %38, %36 ], [ %44, %42 ], [ 0, %17 ], [ 0, %10 ]
ret i32 %46
}
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @wait_event_interruptible(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i64 @signal_pending(i32 noundef) local_unnamed_addr #1
declare i32 @video_is_registered(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"camera_data", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"framebuf", !14, i64 0, !14, i64 8}
!14 = !{!"long", !9, i64 0}
!15 = !{!14, !14, i64 0}
!16 = !{!7, !8, i64 8}
!17 = !{!13, !14, i64 8}
!18 = !{!7, !8, i64 12}
!19 = !{!8, !8, i64 0}
| linux_drivers_media_usb_cpia2_extr_cpia2_v4l.c_sync |
; ModuleID = 'fastsocket_kernel_drivers_net_wireless_brcm80211_brcmsmac_phy_extr_phy_n.c_wlc_phy_internal_cal_txgain_nphy.so'
source_filename = "fastsocket_kernel_drivers_net_wireless_brcm80211_brcmsmac_phy_extr_phy_n.c_wlc_phy_internal_cal_txgain_nphy.so"
@NPHY_TBL_ID_RFSEQ = common dso_local global i32 0, align 4
@rodata_13 = private unnamed_addr constant [16 x i8] c"\00\F0\00\00\00\F0\00\00\00\00\00\00\00\00\00\00", align 16, !ROData_SecInfo !0
declare dso_local ptr @wlc_phy_txpwr_index_nphy()
declare dso_local ptr @wlc_phy_table_read_nphy()
declare dso_local ptr @CHSPEC_IS2G()
declare dso_local ptr @wlc_phy_table_write_nphy()
define dso_local ptr @wlc_phy_internal_cal_txgain_nphy(i64 %arg1) {
entry:
%stktop_8 = alloca i8, i32 32, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 0
%RSP_P.0 = inttoptr i64 %0 to ptr
%1 = add i64 %tos, 8
%RSP_P.8 = inttoptr i64 %1 to ptr
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%memref-disp = add i64 %arg1, 8
%2 = inttoptr i64 %memref-disp to ptr
%memload = load i64, ptr %2, align 1
%memref-disp1 = add i64 %arg1, 16
%3 = inttoptr i64 %memref-disp1 to ptr
%memload2 = load i64, ptr %3, align 1
%4 = inttoptr i64 %memload to ptr
%memload3 = load i32, ptr %4, align 1
%5 = inttoptr i64 %memload2 to ptr
store i32 %memload3, ptr %5, align 1
%6 = inttoptr i64 %memload to ptr
%memload4 = load i32, ptr %6, align 1
%memref-disp5 = add i64 %memload2, 4
%7 = inttoptr i64 %memref-disp5 to ptr
store i32 %memload4, ptr %7, align 1
%8 = inttoptr i64 %memload to ptr
%memload6 = load i32, ptr %8, align 1
%9 = call ptr @wlc_phy_txpwr_index_nphy()
%RAX = ptrtoint ptr %9 to i64
%memref-disp7 = add i64 %arg1, 8
%10 = inttoptr i64 %memref-disp7 to ptr
%memload8 = load i64, ptr %10, align 1
%memref-disp9 = add i64 %memload8, 4
%11 = inttoptr i64 %memref-disp9 to ptr
%memload10 = load i32, ptr %11, align 1
%12 = call ptr @wlc_phy_txpwr_index_nphy()
%RAX11 = ptrtoint ptr %12 to i64
%memload12 = load i32, ptr @NPHY_TBL_ID_RFSEQ, align 1
%R14 = ptrtoint ptr %RSP_P.8 to i64
%13 = call ptr @wlc_phy_table_read_nphy()
%RAX13 = ptrtoint ptr %13 to i64
%14 = inttoptr i64 %arg1 to ptr
%memload14 = load i32, ptr %14, align 1
%15 = call ptr @CHSPEC_IS2G()
%RAX15 = ptrtoint ptr %15 to i64
%16 = and i64 %RAX15, %RAX15
%highbit = and i64 -9223372036854775808, %16
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %16, 0
%17 = and i64 %16, 255
%18 = call i64 @llvm.ctpop.i64(i64 %17)
%19 = and i64 %18, 1
%PF = icmp eq i64 %19, 0
%CL = icmp eq i1 %ZF, true
%20 = zext i1 %CL to i32
%ECX = or i32 %20, 122
%21 = and i32 %ECX, 255
%22 = call i32 @llvm.ctpop.i32(i32 %21)
%23 = and i32 %22, 1
%PF16 = icmp eq i32 %23, 0
%ZF17 = icmp eq i32 %ECX, 0
%highbit18 = and i32 -2147483648, %ECX
%SF19 = icmp ne i32 %highbit18, 0
%ECX23 = shl i32 %ECX, 5
%ZF20 = icmp eq i32 %ECX23, 0
%highbit21 = and i32 -2147483648, %ECX23
%SF22 = icmp ne i32 %highbit21, 0
%memload24 = load <4 x i32>, ptr %RSP_P.8, align 1
%XMM0 = and <4 x i32> %memload24, ptr @rodata_13
%XMM1 = bitcast i32 %ECX23 to float
%24 = insertelement <4 x float> zeroinitializer, float %XMM1, i64 0
%25 = bitcast <4 x float> %24 to <4 x i32>
%26 = extractelement <4 x i32> %25, i32 0
%27 = insertelement <4 x i32> zeroinitializer, i32 %26, i32 0
%28 = extractelement <4 x i32> %25, i32 0
%29 = insertelement <4 x i32> %27, i32 %28, i32 1
%30 = extractelement <4 x i32> %25, i32 1
%31 = insertelement <4 x i32> %29, i32 %30, i32 2
%32 = extractelement <4 x i32> %25, i32 1
%XMM125 = insertelement <4 x i32> %31, i32 %32, i32 3
%bitwise_operand = bitcast <4 x i32> %XMM125 to i128
%bitwise_operand26 = bitcast <4 x i32> %XMM0 to i128
%or_result = or i128 %bitwise_operand, %bitwise_operand26
%bitcast_result = bitcast i128 %or_result to <4 x i32>
store <4 x i32> %bitcast_result, ptr %RSP_P.8, align 1
%memload27 = load i32, ptr @NPHY_TBL_ID_RFSEQ, align 1
%33 = call ptr @wlc_phy_table_write_nphy()
ret ptr %33
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/brcm80211/brcmsmac/phy/extr_phy_n.c_wlc_phy_internal_cal_txgain_nphy.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/brcm80211/brcmsmac/phy/extr_phy_n.c_wlc_phy_internal_cal_txgain_nphy.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NPHY_TBL_ID_RFSEQ = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @wlc_phy_internal_cal_txgain_nphy], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @wlc_phy_internal_cal_txgain_nphy(ptr noundef %0) #0 {
%2 = alloca [2 x i32], align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load i32, ptr %4, align 4, !tbaa !12
%6 = getelementptr inbounds i8, ptr %0, i64 16
%7 = load ptr, ptr %6, align 8, !tbaa !13
store i32 %5, ptr %7, align 4, !tbaa !12
%8 = getelementptr inbounds i8, ptr %7, i64 4
store i32 %5, ptr %8, align 4, !tbaa !12
%9 = load i32, ptr %4, align 4, !tbaa !12
%10 = tail call i32 @wlc_phy_txpwr_index_nphy(ptr noundef %0, i32 noundef 1, i32 noundef %9, i32 noundef 1) #3
%11 = load ptr, ptr %3, align 8, !tbaa !6
%12 = getelementptr inbounds i8, ptr %11, i64 4
%13 = load i32, ptr %12, align 4, !tbaa !12
%14 = tail call i32 @wlc_phy_txpwr_index_nphy(ptr noundef %0, i32 noundef 2, i32 noundef %13, i32 noundef 1) #3
%15 = load i32, ptr @NPHY_TBL_ID_RFSEQ, align 4, !tbaa !12
%16 = call i32 @wlc_phy_table_read_nphy(ptr noundef %0, i32 noundef %15, i32 noundef 2, i32 noundef 272, i32 noundef 16, ptr noundef nonnull %2) #3
%17 = load i32, ptr %0, align 8, !tbaa !14
%18 = call i64 @CHSPEC_IS2G(i32 noundef %17) #3
%19 = icmp eq i64 %18, 0
%20 = select i1 %19, i32 3936, i32 3904
%21 = load <2 x i32>, ptr %2, align 8, !tbaa !12
%22 = and <2 x i32> %21, <i32 61440, i32 61440>
%23 = insertelement <2 x i32> poison, i32 %20, i64 0
%24 = shufflevector <2 x i32> %23, <2 x i32> poison, <2 x i32> zeroinitializer
%25 = or disjoint <2 x i32> %22, %24
store <2 x i32> %25, ptr %2, align 8, !tbaa !12
%26 = load i32, ptr @NPHY_TBL_ID_RFSEQ, align 4, !tbaa !12
%27 = call i32 @wlc_phy_table_write_nphy(ptr noundef nonnull %0, i32 noundef %26, i32 noundef 2, i32 noundef 272, i32 noundef 16, ptr noundef nonnull %2) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @wlc_phy_txpwr_index_nphy(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @wlc_phy_table_read_nphy(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @CHSPEC_IS2G(i32 noundef) local_unnamed_addr #2
declare i32 @wlc_phy_table_write_nphy(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"brcms_phy", !8, i64 0, !11, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !11, i64 16}
!14 = !{!7, !8, i64 0}
| fastsocket_kernel_drivers_net_wireless_brcm80211_brcmsmac_phy_extr_phy_n.c_wlc_phy_internal_cal_txgain_nphy |
; ModuleID = 'freebsd_contrib_binutils_bfd_extr_ecoffswap.h_ecoff_swap_sym_out.so'
source_filename = "freebsd_contrib_binutils_bfd_extr_ecoffswap.h_ecoff_swap_sym_out.so"
@SYM_BITS1_ST_SH_BIG = common dso_local global i32 0, align 4
@SYM_BITS1_ST_BIG = common dso_local global i32 0, align 4
@SYM_BITS1_SC_SH_LEFT_BIG = common dso_local global i32 0, align 4
@SYM_BITS1_SC_BIG = common dso_local global i32 0, align 4
@SYM_BITS2_SC_SH_BIG = common dso_local global i32 0, align 4
@SYM_BITS2_SC_BIG = common dso_local global i32 0, align 4
@SYM_BITS2_RESERVED_BIG = common dso_local global i32 0, align 4
@SYM_BITS2_INDEX_SH_LEFT_BIG = common dso_local global i32 0, align 4
@SYM_BITS4_INDEX_SH_LEFT_BIG = common dso_local global i32 0, align 4
@SYM_BITS3_INDEX_SH_LEFT_BIG = common dso_local global i32 0, align 4
@SYM_BITS2_INDEX_BIG = common dso_local global i32 0, align 4
@SYM_BITS1_ST_SH_LITTLE = common dso_local global i32 0, align 4
@SYM_BITS1_ST_LITTLE = common dso_local global i32 0, align 4
@SYM_BITS1_SC_SH_LITTLE = common dso_local global i32 0, align 4
@SYM_BITS1_SC_LITTLE = common dso_local global i32 0, align 4
@SYM_BITS2_SC_SH_LEFT_LITTLE = common dso_local global i32 0, align 4
@SYM_BITS2_SC_LITTLE = common dso_local global i32 0, align 4
@SYM_BITS2_RESERVED_LITTLE = common dso_local global i32 0, align 4
@SYM_BITS2_INDEX_SH_LITTLE = common dso_local global i32 0, align 4
@SYM_BITS4_INDEX_SH_LEFT_LITTLE = common dso_local global i32 0, align 4
@SYM_BITS3_INDEX_SH_LEFT_LITTLE = common dso_local global i32 0, align 4
@SYM_BITS2_INDEX_LITTLE = common dso_local global i32 0, align 4
declare dso_local ptr @H_PUT_32()
declare dso_local ptr @ECOFF_PUT_OFF()
declare dso_local ptr @bfd_header_big_endian()
define dso_local i32 @ecoff_swap_sym_out(i64 %arg1, i64 %arg2, i64 %arg3) {
entry:
%RDX-SKT-LOC = alloca i64, align 8
%RCX-SKT-LOC = alloca i64, align 8
%EAX-SKT-LOC160 = alloca i32, align 4
%ESI-SKT-LOC = alloca i32, align 4
%RDI-SKT-LOC = alloca i64, align 8
%EAX-SKT-LOC149 = alloca i32, align 4
%EAX-SKT-LOC = alloca i32, align 4
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%0 = inttoptr i64 %arg2 to ptr
%memload = load i32, ptr %0, align 1
%memref-disp = add i64 %arg2, 4
%1 = inttoptr i64 %memref-disp to ptr
%memload1 = load i32, ptr %1, align 1
%memref-disp2 = add i64 %arg2, 8
%2 = inttoptr i64 %memref-disp2 to ptr
%memload3 = load i32, ptr %2, align 1
%memref-disp4 = add i64 %arg2, 16
%3 = inttoptr i64 %memref-disp4 to ptr
%memload5 = load i64, ptr %3, align 1
store i64 %memload5, ptr %stktop_8, align 1
%memref-disp6 = add i64 %arg2, 24
%4 = inttoptr i64 %memref-disp6 to ptr
%memload7 = load i32, ptr %4, align 1
%memref-disp8 = add i64 %arg2, 28
%5 = inttoptr i64 %memref-disp8 to ptr
%memload9 = load i32, ptr %5, align 1
%memref-disp10 = add i64 %arg3, 36
%6 = inttoptr i64 %memref-disp10 to ptr
%memload11 = load i32, ptr %6, align 1
%7 = call ptr @H_PUT_32()
%RAX = ptrtoint ptr %7 to i64
%memref-disp12 = add i64 %arg3, 32
%8 = inttoptr i64 %memref-disp12 to ptr
%memload13 = load i32, ptr %8, align 1
%9 = call ptr @ECOFF_PUT_OFF()
%RAX14 = ptrtoint ptr %9 to i64
%10 = call ptr @bfd_header_big_endian()
%RAX15 = ptrtoint ptr %10 to i64
%11 = and i64 %RAX15, %RAX15
%highbit = and i64 -9223372036854775808, %11
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %11, 0
%12 = and i64 %11, 255
%13 = call i64 @llvm.ctpop.i64(i64 %12)
%14 = and i64 %13, 1
%PF = icmp eq i64 %14, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%memload16 = load i32, ptr @SYM_BITS1_ST_SH_BIG, align 1
%15 = trunc i32 %memload16 to i8
%ECX = zext i8 %15 to i32
%16 = trunc i32 %ECX to i8
%17 = zext i8 %16 to i32
%shift-cnt-msk = and i32 %17, 63
%R13D = shl i32 %memload, %shift-cnt-msk
%shrd_cf_count_cmp = icmp sgt i32 %shift-cnt-msk, 0
%18 = sub i32 32, %shift-cnt-msk
%shld_cf_count_shift = shl i32 1, %18
%shld_cf_count_and = and i32 %memload, %shld_cf_count_shift
%shld_cf_count_shft_out = icmp sgt i32 %shld_cf_count_and, 0
%shld_cf_update = select i1 %shrd_cf_count_cmp, i1 %shld_cf_count_shft_out, i1 false
%ZF17 = icmp eq i32 %R13D, 0
%highbit18 = and i32 -2147483648, %R13D
%SF19 = icmp ne i32 %highbit18, 0
%memload20 = load i32, ptr @SYM_BITS1_ST_BIG, align 1
%R13D22 = and i32 %R13D, %memload20
%19 = and i32 %R13D22, 255
%20 = call i32 @llvm.ctpop.i32(i32 %19)
%21 = and i32 %20, 1
%PF21 = icmp eq i32 %21, 0
%memload23 = load i32, ptr @SYM_BITS1_SC_SH_LEFT_BIG, align 1
%22 = trunc i32 %memload23 to i8
%ECX24 = zext i8 %22 to i32
%23 = trunc i32 %ECX24 to i8
%24 = zext i8 %23 to i32
%shift-cnt-msk25 = and i32 %24, 63
%EAX = ashr i32 %memload1, %shift-cnt-msk25
%shrd_cf_count_cmp26 = icmp sgt i32 %shift-cnt-msk25, 0
%25 = sub i32 32, %shift-cnt-msk25
%shld_cf_count_shift27 = shl i32 1, %25
%shld_cf_count_and28 = and i32 %memload1, %shld_cf_count_shift27
%shld_cf_count_shft_out29 = icmp sgt i32 %shld_cf_count_and28, 0
%shld_cf_update30 = select i1 %shrd_cf_count_cmp26, i1 %shld_cf_count_shft_out29, i1 %shld_cf_update
%ZF31 = icmp eq i32 %EAX, 0
%highbit32 = and i32 -2147483648, %EAX
%SF33 = icmp ne i32 %highbit32, 0
%memload34 = load i32, ptr @SYM_BITS1_SC_BIG, align 1
%EAX36 = and i32 %EAX, %memload34
%26 = and i32 %EAX36, 255
%27 = call i32 @llvm.ctpop.i32(i32 %26)
%28 = and i32 %27, 1
%PF35 = icmp eq i32 %28, 0
%EAX41 = or i32 %EAX36, %R13D22
%highbit37 = and i32 -2147483648, %EAX41
%SF38 = icmp ne i32 %highbit37, 0
%ZF39 = icmp eq i32 %EAX41, 0
%29 = and i32 %EAX41, 255
%30 = call i32 @llvm.ctpop.i32(i32 %29)
%31 = and i32 %30, 1
%PF40 = icmp eq i32 %31, 0
%32 = inttoptr i64 %arg3 to ptr
%memload42 = load i64, ptr %32, align 1
%33 = inttoptr i64 %memload42 to ptr
store i32 %EAX41, ptr %33, align 1
%memload43 = load i32, ptr @SYM_BITS2_SC_SH_BIG, align 1
%34 = trunc i32 %memload43 to i8
%ECX44 = zext i8 %34 to i32
%35 = trunc i32 %ECX44 to i8
%36 = zext i8 %35 to i32
%shift-cnt-msk45 = and i32 %36, 63
%R12D = shl i32 %memload1, %shift-cnt-msk45
%shrd_cf_count_cmp46 = icmp sgt i32 %shift-cnt-msk45, 0
%37 = sub i32 32, %shift-cnt-msk45
%shld_cf_count_shift47 = shl i32 1, %37
%shld_cf_count_and48 = and i32 %memload1, %shld_cf_count_shift47
%shld_cf_count_shft_out49 = icmp sgt i32 %shld_cf_count_and48, 0
%shld_cf_update50 = select i1 %shrd_cf_count_cmp46, i1 %shld_cf_count_shft_out49, i1 false
%ZF51 = icmp eq i32 %R12D, 0
%highbit52 = and i32 -2147483648, %R12D
%SF53 = icmp ne i32 %highbit52, 0
%memload54 = load i32, ptr @SYM_BITS2_SC_BIG, align 1
%R12D56 = and i32 %R12D, %memload54
%38 = and i32 %R12D56, 255
%39 = call i32 @llvm.ctpop.i32(i32 %38)
%40 = and i32 %39, 1
%PF55 = icmp eq i32 %40, 0
%41 = load i64, ptr %stktop_8, align 1
%42 = sub i64 %41, 0
%43 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %41, i64 0)
%CF = extractvalue { i64, i1 } %43, 1
%ZF57 = icmp eq i64 %42, 0
%highbit58 = and i64 -9223372036854775808, %42
%SF59 = icmp ne i64 %highbit58, 0
%44 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %41, i64 0)
%OF = extractvalue { i64, i1 } %44, 1
%45 = and i64 %42, 255
%46 = call i64 @llvm.ctpop.i64(i64 %45)
%47 = and i64 %46, 1
%PF60 = icmp eq i64 %47, 0
store i32 0, ptr %EAX-SKT-LOC, align 1
%CmpZF_JE198 = icmp eq i1 %ZF57, true
br i1 %CmpZF_JE198, label %bb.3, label %bb.2
bb.2: ; preds = %bb.1
%memload61 = load i32, ptr @SYM_BITS2_RESERVED_BIG, align 1
store i32 %memload61, ptr %EAX-SKT-LOC, align 1
br label %bb.3
bb.3: ; preds = %bb.2, %bb.1
%memload62 = load i32, ptr @SYM_BITS2_INDEX_SH_LEFT_BIG, align 1
%48 = trunc i32 %memload62 to i8
%ECX63 = zext i8 %48 to i32
%49 = trunc i32 %ECX63 to i8
%50 = zext i8 %49 to i32
%shift-cnt-msk64 = and i32 %50, 63
%ESI = ashr i32 %memload3, %shift-cnt-msk64
%shrd_cf_count_cmp65 = icmp sgt i32 %shift-cnt-msk64, 0
%51 = sub i32 32, %shift-cnt-msk64
%shld_cf_count_shift66 = shl i32 1, %51
%shld_cf_count_and67 = and i32 %memload3, %shld_cf_count_shift66
%shld_cf_count_shft_out68 = icmp sgt i32 %shld_cf_count_and67, 0
%shld_cf_update69 = select i1 %shrd_cf_count_cmp65, i1 %shld_cf_count_shft_out68, i1 false
%ZF70 = icmp eq i32 %ESI, 0
%highbit71 = and i32 -2147483648, %ESI
%SF72 = icmp ne i32 %highbit71, 0
%EAX73 = load i32, ptr %EAX-SKT-LOC, align 1
%EAX78 = or i32 %EAX73, %R12D56
%highbit74 = and i32 -2147483648, %EAX78
%SF75 = icmp ne i32 %highbit74, 0
%ZF76 = icmp eq i32 %EAX78, 0
%52 = and i32 %EAX78, 255
%53 = call i32 @llvm.ctpop.i32(i32 %52)
%54 = and i32 %53, 1
%PF77 = icmp eq i32 %54, 0
%55 = ptrtoint ptr @SYM_BITS2_INDEX_BIG to i64
store i64 %55, ptr %RDI-SKT-LOC, align 1
store i32 %ESI, ptr %ESI-SKT-LOC, align 1
store i32 %EAX78, ptr %EAX-SKT-LOC160, align 1
%56 = ptrtoint ptr @SYM_BITS3_INDEX_SH_LEFT_BIG to i64
store i64 %56, ptr %RCX-SKT-LOC, align 1
%57 = ptrtoint ptr @SYM_BITS4_INDEX_SH_LEFT_BIG to i64
store i64 %57, ptr %RDX-SKT-LOC, align 1
br label %bb.7
bb.4: ; preds = %entry
%memload79 = load i32, ptr @SYM_BITS1_ST_SH_LITTLE, align 1
%58 = trunc i32 %memload79 to i8
%ECX80 = zext i8 %58 to i32
%59 = trunc i32 %ECX80 to i8
%60 = zext i8 %59 to i32
%shift-cnt-msk81 = and i32 %60, 63
%R13D90 = shl i32 %memload, %shift-cnt-msk81
%shrd_cf_count_cmp82 = icmp sgt i32 %shift-cnt-msk81, 0
%61 = sub i32 32, %shift-cnt-msk81
%shld_cf_count_shift83 = shl i32 1, %61
%shld_cf_count_and84 = and i32 %memload, %shld_cf_count_shift83
%shld_cf_count_shft_out85 = icmp sgt i32 %shld_cf_count_and84, 0
%shld_cf_update86 = select i1 %shrd_cf_count_cmp82, i1 %shld_cf_count_shft_out85, i1 false
%ZF87 = icmp eq i32 %R13D90, 0
%highbit88 = and i32 -2147483648, %R13D90
%SF89 = icmp ne i32 %highbit88, 0
%memload91 = load i32, ptr @SYM_BITS1_ST_LITTLE, align 1
%R13D93 = and i32 %R13D90, %memload91
%62 = and i32 %R13D93, 255
%63 = call i32 @llvm.ctpop.i32(i32 %62)
%64 = and i32 %63, 1
%PF92 = icmp eq i32 %64, 0
%memload94 = load i32, ptr @SYM_BITS1_SC_SH_LITTLE, align 1
%65 = trunc i32 %memload94 to i8
%ECX95 = zext i8 %65 to i32
%66 = trunc i32 %ECX95 to i8
%67 = zext i8 %66 to i32
%shift-cnt-msk96 = and i32 %67, 63
%EAX105 = shl i32 %memload1, %shift-cnt-msk96
%shrd_cf_count_cmp97 = icmp sgt i32 %shift-cnt-msk96, 0
%68 = sub i32 32, %shift-cnt-msk96
%shld_cf_count_shift98 = shl i32 1, %68
%shld_cf_count_and99 = and i32 %memload1, %shld_cf_count_shift98
%shld_cf_count_shft_out100 = icmp sgt i32 %shld_cf_count_and99, 0
%shld_cf_update101 = select i1 %shrd_cf_count_cmp97, i1 %shld_cf_count_shft_out100, i1 %shld_cf_update86
%ZF102 = icmp eq i32 %EAX105, 0
%highbit103 = and i32 -2147483648, %EAX105
%SF104 = icmp ne i32 %highbit103, 0
%memload106 = load i32, ptr @SYM_BITS1_SC_LITTLE, align 1
%EAX108 = and i32 %EAX105, %memload106
%69 = and i32 %EAX108, 255
%70 = call i32 @llvm.ctpop.i32(i32 %69)
%71 = and i32 %70, 1
%PF107 = icmp eq i32 %71, 0
%EAX113 = or i32 %EAX108, %R13D93
%highbit109 = and i32 -2147483648, %EAX113
%SF110 = icmp ne i32 %highbit109, 0
%ZF111 = icmp eq i32 %EAX113, 0
%72 = and i32 %EAX113, 255
%73 = call i32 @llvm.ctpop.i32(i32 %72)
%74 = and i32 %73, 1
%PF112 = icmp eq i32 %74, 0
%75 = inttoptr i64 %arg3 to ptr
%memload114 = load i64, ptr %75, align 1
%76 = inttoptr i64 %memload114 to ptr
store i32 %EAX113, ptr %76, align 1
%memload115 = load i32, ptr @SYM_BITS2_SC_SH_LEFT_LITTLE, align 1
%77 = trunc i32 %memload115 to i8
%ECX116 = zext i8 %77 to i32
%78 = trunc i32 %ECX116 to i8
%79 = zext i8 %78 to i32
%shift-cnt-msk117 = and i32 %79, 63
%R12D126 = ashr i32 %memload1, %shift-cnt-msk117
%shrd_cf_count_cmp118 = icmp sgt i32 %shift-cnt-msk117, 0
%80 = sub i32 32, %shift-cnt-msk117
%shld_cf_count_shift119 = shl i32 1, %80
%shld_cf_count_and120 = and i32 %memload1, %shld_cf_count_shift119
%shld_cf_count_shft_out121 = icmp sgt i32 %shld_cf_count_and120, 0
%shld_cf_update122 = select i1 %shrd_cf_count_cmp118, i1 %shld_cf_count_shft_out121, i1 false
%ZF123 = icmp eq i32 %R12D126, 0
%highbit124 = and i32 -2147483648, %R12D126
%SF125 = icmp ne i32 %highbit124, 0
%memload127 = load i32, ptr @SYM_BITS2_SC_LITTLE, align 1
%R12D129 = and i32 %R12D126, %memload127
%81 = and i32 %R12D129, 255
%82 = call i32 @llvm.ctpop.i32(i32 %81)
%83 = and i32 %82, 1
%PF128 = icmp eq i32 %83, 0
%84 = load i64, ptr %stktop_8, align 1
%85 = sub i64 %84, 0
%86 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %84, i64 0)
%CF130 = extractvalue { i64, i1 } %86, 1
%ZF131 = icmp eq i64 %85, 0
%highbit132 = and i64 -9223372036854775808, %85
%SF133 = icmp ne i64 %highbit132, 0
%87 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %84, i64 0)
%OF134 = extractvalue { i64, i1 } %87, 1
%88 = and i64 %85, 255
%89 = call i64 @llvm.ctpop.i64(i64 %88)
%90 = and i64 %89, 1
%PF135 = icmp eq i64 %90, 0
store i32 0, ptr %EAX-SKT-LOC149, align 1
%CmpZF_JE199 = icmp eq i1 %ZF131, true
br i1 %CmpZF_JE199, label %bb.6, label %bb.5
bb.5: ; preds = %bb.4
%memload136 = load i32, ptr @SYM_BITS2_RESERVED_LITTLE, align 1
store i32 %memload136, ptr %EAX-SKT-LOC149, align 1
br label %bb.6
bb.6: ; preds = %bb.5, %bb.4
%memload137 = load i32, ptr @SYM_BITS2_INDEX_SH_LITTLE, align 1
%91 = trunc i32 %memload137 to i8
%ECX138 = zext i8 %91 to i32
%92 = trunc i32 %ECX138 to i8
%93 = zext i8 %92 to i32
%shift-cnt-msk139 = and i32 %93, 63
%ESI148 = shl i32 %memload3, %shift-cnt-msk139
%shrd_cf_count_cmp140 = icmp sgt i32 %shift-cnt-msk139, 0
%94 = sub i32 32, %shift-cnt-msk139
%shld_cf_count_shift141 = shl i32 1, %94
%shld_cf_count_and142 = and i32 %memload3, %shld_cf_count_shift141
%shld_cf_count_shft_out143 = icmp sgt i32 %shld_cf_count_and142, 0
%shld_cf_update144 = select i1 %shrd_cf_count_cmp140, i1 %shld_cf_count_shft_out143, i1 false
%ZF145 = icmp eq i32 %ESI148, 0
%highbit146 = and i32 -2147483648, %ESI148
%SF147 = icmp ne i32 %highbit146, 0
%EAX150 = load i32, ptr %EAX-SKT-LOC149, align 1
%EAX155 = or i32 %EAX150, %R12D129
%highbit151 = and i32 -2147483648, %EAX155
%SF152 = icmp ne i32 %highbit151, 0
%ZF153 = icmp eq i32 %EAX155, 0
%95 = and i32 %EAX155, 255
%96 = call i32 @llvm.ctpop.i32(i32 %95)
%97 = and i32 %96, 1
%PF154 = icmp eq i32 %97, 0
%98 = ptrtoint ptr @SYM_BITS2_INDEX_LITTLE to i64
store i64 %98, ptr %RDI-SKT-LOC, align 1
store i32 %ESI148, ptr %ESI-SKT-LOC, align 1
store i32 %EAX155, ptr %EAX-SKT-LOC160, align 1
%99 = ptrtoint ptr @SYM_BITS3_INDEX_SH_LEFT_LITTLE to i64
store i64 %99, ptr %RCX-SKT-LOC, align 1
%100 = ptrtoint ptr @SYM_BITS4_INDEX_SH_LEFT_LITTLE to i64
store i64 %100, ptr %RDX-SKT-LOC, align 1
br label %bb.7
bb.7: ; preds = %bb.6, %bb.3
%RDI = load i64, ptr %RDI-SKT-LOC, align 1
%ESI156 = load i32, ptr %ESI-SKT-LOC, align 1
%101 = inttoptr i64 %RDI to ptr
%memload157 = load i32, ptr %101, align 1
%ESI159 = and i32 %ESI156, %memload157
%102 = and i32 %ESI159, 255
%103 = call i32 @llvm.ctpop.i32(i32 %102)
%104 = and i32 %103, 1
%PF158 = icmp eq i32 %104, 0
%EAX161 = load i32, ptr %EAX-SKT-LOC160, align 1
%ESI166 = or i32 %ESI159, %EAX161
%highbit162 = and i32 -2147483648, %ESI166
%SF163 = icmp ne i32 %highbit162, 0
%ZF164 = icmp eq i32 %ESI166, 0
%105 = and i32 %ESI166, 255
%106 = call i32 @llvm.ctpop.i32(i32 %105)
%107 = and i32 %106, 1
%PF165 = icmp eq i32 %107, 0
%memref-disp167 = add i64 %arg3, 8
%108 = inttoptr i64 %memref-disp167 to ptr
%memload168 = load i64, ptr %108, align 1
%109 = inttoptr i64 %memload168 to ptr
store i32 %ESI166, ptr %109, align 1
%RCX = load i64, ptr %RCX-SKT-LOC, align 1
%110 = inttoptr i64 %RCX to ptr
%memload169 = load i32, ptr %110, align 1
%111 = trunc i32 %memload169 to i8
%ECX170 = zext i8 %111 to i32
%112 = trunc i32 %ECX170 to i8
%113 = zext i8 %112 to i32
%shift-cnt-msk171 = and i32 %113, 63
%EAX180 = ashr i32 %memload3, %shift-cnt-msk171
%shrd_cf_count_cmp172 = icmp sgt i32 %shift-cnt-msk171, 0
%114 = sub i32 32, %shift-cnt-msk171
%shld_cf_count_shift173 = shl i32 1, %114
%shld_cf_count_and174 = and i32 %memload3, %shld_cf_count_shift173
%shld_cf_count_shft_out175 = icmp sgt i32 %shld_cf_count_and174, 0
%shld_cf_update176 = select i1 %shrd_cf_count_cmp172, i1 %shld_cf_count_shft_out175, i1 false
%ZF177 = icmp eq i32 %EAX180, 0
%highbit178 = and i32 -2147483648, %EAX180
%SF179 = icmp ne i32 %highbit178, 0
%115 = trunc i32 %EAX180 to i8
%EAX181 = zext i8 %115 to i32
%memref-disp182 = add i64 %arg3, 16
%116 = inttoptr i64 %memref-disp182 to ptr
%memload183 = load i64, ptr %116, align 1
%117 = inttoptr i64 %memload183 to ptr
store i32 %EAX181, ptr %117, align 1
%RDX = load i64, ptr %RDX-SKT-LOC, align 1
%118 = inttoptr i64 %RDX to ptr
%memload184 = load i32, ptr %118, align 1
%119 = trunc i32 %memload184 to i8
%ECX185 = zext i8 %119 to i32
%120 = trunc i32 %ECX185 to i8
%121 = zext i8 %120 to i32
%shift-cnt-msk186 = and i32 %121, 63
%R15D = ashr i32 %memload3, %shift-cnt-msk186
%shrd_cf_count_cmp187 = icmp sgt i32 %shift-cnt-msk186, 0
%122 = sub i32 32, %shift-cnt-msk186
%shld_cf_count_shift188 = shl i32 1, %122
%shld_cf_count_and189 = and i32 %memload3, %shld_cf_count_shift188
%shld_cf_count_shft_out190 = icmp sgt i32 %shld_cf_count_and189, 0
%shld_cf_update191 = select i1 %shrd_cf_count_cmp187, i1 %shld_cf_count_shft_out190, i1 %shld_cf_update176
%ZF192 = icmp eq i32 %R15D, 0
%highbit193 = and i32 -2147483648, %R15D
%SF194 = icmp ne i32 %highbit193, 0
%123 = trunc i32 %R15D to i8
%EAX195 = zext i8 %123 to i32
%memref-disp196 = add i64 %arg3, 24
%124 = inttoptr i64 %memref-disp196 to ptr
%memload197 = load i64, ptr %124, align 1
%125 = inttoptr i64 %memload197 to ptr
store i32 %EAX195, ptr %125, align 1
ret i32 %EAX195
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/contrib/binutils/bfd/extr_ecoffswap.h_ecoff_swap_sym_out.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/bfd/extr_ecoffswap.h_ecoff_swap_sym_out.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SYM_BITS1_ST_SH_BIG = common local_unnamed_addr global i32 0, align 4
@SYM_BITS1_ST_BIG = common local_unnamed_addr global i32 0, align 4
@SYM_BITS1_SC_SH_LEFT_BIG = common local_unnamed_addr global i32 0, align 4
@SYM_BITS1_SC_BIG = common local_unnamed_addr global i32 0, align 4
@SYM_BITS2_SC_SH_BIG = common local_unnamed_addr global i32 0, align 4
@SYM_BITS2_SC_BIG = common local_unnamed_addr global i32 0, align 4
@SYM_BITS2_RESERVED_BIG = common local_unnamed_addr global i32 0, align 4
@SYM_BITS2_INDEX_SH_LEFT_BIG = common local_unnamed_addr global i32 0, align 4
@SYM_BITS2_INDEX_BIG = common local_unnamed_addr global i32 0, align 4
@SYM_BITS3_INDEX_SH_LEFT_BIG = common local_unnamed_addr global i32 0, align 4
@SYM_BITS4_INDEX_SH_LEFT_BIG = common local_unnamed_addr global i32 0, align 4
@SYM_BITS1_ST_SH_LITTLE = common local_unnamed_addr global i32 0, align 4
@SYM_BITS1_ST_LITTLE = common local_unnamed_addr global i32 0, align 4
@SYM_BITS1_SC_SH_LITTLE = common local_unnamed_addr global i32 0, align 4
@SYM_BITS1_SC_LITTLE = common local_unnamed_addr global i32 0, align 4
@SYM_BITS2_SC_SH_LEFT_LITTLE = common local_unnamed_addr global i32 0, align 4
@SYM_BITS2_SC_LITTLE = common local_unnamed_addr global i32 0, align 4
@SYM_BITS2_RESERVED_LITTLE = common local_unnamed_addr global i32 0, align 4
@SYM_BITS2_INDEX_SH_LITTLE = common local_unnamed_addr global i32 0, align 4
@SYM_BITS2_INDEX_LITTLE = common local_unnamed_addr global i32 0, align 4
@SYM_BITS3_INDEX_SH_LEFT_LITTLE = common local_unnamed_addr global i32 0, align 4
@SYM_BITS4_INDEX_SH_LEFT_LITTLE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ecoff_swap_sym_out], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ecoff_swap_sym_out(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2) #0 {
%4 = load i32, ptr %1, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %1, i64 4
%6 = load i32, ptr %5, align 4, !tbaa !6
%7 = getelementptr inbounds i8, ptr %1, i64 8
%8 = load i32, ptr %7, align 8, !tbaa !6
%9 = getelementptr inbounds i8, ptr %1, i64 16
%10 = load i64, ptr %9, align 8, !tbaa !10
%11 = getelementptr inbounds i8, ptr %1, i64 24
%12 = load i32, ptr %11, align 8, !tbaa !6
%13 = getelementptr inbounds i8, ptr %1, i64 28
%14 = load i32, ptr %13, align 4, !tbaa !6
%15 = getelementptr inbounds i8, ptr %2, i64 36
%16 = load i32, ptr %15, align 4, !tbaa !12
%17 = tail call i32 @H_PUT_32(ptr noundef %0, i32 noundef %14, i32 noundef %16) #2
%18 = getelementptr inbounds i8, ptr %2, i64 32
%19 = load i32, ptr %18, align 8, !tbaa !15
%20 = tail call i32 @ECOFF_PUT_OFF(ptr noundef %0, i32 noundef %12, i32 noundef %19) #2
%21 = tail call i64 @bfd_header_big_endian(ptr noundef %0) #2
%22 = icmp eq i64 %21, 0
%23 = load ptr, ptr %2, align 8, !tbaa !16
%24 = icmp eq i64 %10, 0
br i1 %22, label %44, label %25
25: ; preds = %3
%26 = load i32, ptr @SYM_BITS1_ST_SH_BIG, align 4, !tbaa !6
%27 = shl i32 %4, %26
%28 = load i32, ptr @SYM_BITS1_ST_BIG, align 4, !tbaa !6
%29 = and i32 %27, %28
%30 = load i32, ptr @SYM_BITS1_SC_SH_LEFT_BIG, align 4, !tbaa !6
%31 = ashr i32 %6, %30
%32 = load i32, ptr @SYM_BITS1_SC_BIG, align 4, !tbaa !6
%33 = and i32 %31, %32
%34 = or i32 %33, %29
store i32 %34, ptr %23, align 4, !tbaa !6
%35 = load i32, ptr @SYM_BITS2_SC_SH_BIG, align 4, !tbaa !6
%36 = shl i32 %6, %35
%37 = load i32, ptr @SYM_BITS2_SC_BIG, align 4, !tbaa !6
%38 = and i32 %36, %37
%39 = load i32, ptr @SYM_BITS2_RESERVED_BIG, align 4
%40 = select i1 %24, i32 0, i32 %39
%41 = or i32 %40, %38
%42 = load i32, ptr @SYM_BITS2_INDEX_SH_LEFT_BIG, align 4, !tbaa !6
%43 = ashr i32 %8, %42
br label %63
44: ; preds = %3
%45 = load i32, ptr @SYM_BITS1_ST_SH_LITTLE, align 4, !tbaa !6
%46 = shl i32 %4, %45
%47 = load i32, ptr @SYM_BITS1_ST_LITTLE, align 4, !tbaa !6
%48 = and i32 %46, %47
%49 = load i32, ptr @SYM_BITS1_SC_SH_LITTLE, align 4, !tbaa !6
%50 = shl i32 %6, %49
%51 = load i32, ptr @SYM_BITS1_SC_LITTLE, align 4, !tbaa !6
%52 = and i32 %50, %51
%53 = or i32 %52, %48
store i32 %53, ptr %23, align 4, !tbaa !6
%54 = load i32, ptr @SYM_BITS2_SC_SH_LEFT_LITTLE, align 4, !tbaa !6
%55 = ashr i32 %6, %54
%56 = load i32, ptr @SYM_BITS2_SC_LITTLE, align 4, !tbaa !6
%57 = and i32 %55, %56
%58 = load i32, ptr @SYM_BITS2_RESERVED_LITTLE, align 4
%59 = select i1 %24, i32 0, i32 %58
%60 = or i32 %59, %57
%61 = load i32, ptr @SYM_BITS2_INDEX_SH_LITTLE, align 4, !tbaa !6
%62 = shl i32 %8, %61
br label %63
63: ; preds = %44, %25
%64 = phi ptr [ @SYM_BITS2_INDEX_LITTLE, %44 ], [ @SYM_BITS2_INDEX_BIG, %25 ]
%65 = phi i32 [ %62, %44 ], [ %43, %25 ]
%66 = phi i32 [ %60, %44 ], [ %41, %25 ]
%67 = phi ptr [ @SYM_BITS3_INDEX_SH_LEFT_LITTLE, %44 ], [ @SYM_BITS3_INDEX_SH_LEFT_BIG, %25 ]
%68 = phi ptr [ @SYM_BITS4_INDEX_SH_LEFT_LITTLE, %44 ], [ @SYM_BITS4_INDEX_SH_LEFT_BIG, %25 ]
%69 = load i32, ptr %64, align 4, !tbaa !6
%70 = and i32 %65, %69
%71 = or i32 %66, %70
%72 = getelementptr inbounds i8, ptr %2, i64 8
%73 = load ptr, ptr %72, align 8, !tbaa !17
store i32 %71, ptr %73, align 4, !tbaa !6
%74 = load i32, ptr %67, align 4, !tbaa !6
%75 = ashr i32 %8, %74
%76 = and i32 %75, 255
%77 = getelementptr inbounds i8, ptr %2, i64 16
%78 = load ptr, ptr %77, align 8, !tbaa !18
store i32 %76, ptr %78, align 4, !tbaa !6
%79 = load i32, ptr %68, align 4, !tbaa !6
%80 = ashr i32 %8, %79
%81 = and i32 %80, 255
%82 = getelementptr inbounds i8, ptr %2, i64 24
%83 = load ptr, ptr %82, align 8, !tbaa !19
store i32 %81, ptr %83, align 4, !tbaa !6
ret void
}
declare i32 @H_PUT_32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ECOFF_PUT_OFF(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @bfd_header_big_endian(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !7, i64 36}
!13 = !{!"sym_ext", !14, i64 0, !14, i64 8, !14, i64 16, !14, i64 24, !7, i64 32, !7, i64 36}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!13, !7, i64 32}
!16 = !{!13, !14, i64 0}
!17 = !{!13, !14, i64 8}
!18 = !{!13, !14, i64 16}
!19 = !{!13, !14, i64 24}
| freebsd_contrib_binutils_bfd_extr_ecoffswap.h_ecoff_swap_sym_out |
; ModuleID = 'mjolnir_Mjolnir_lua_extr_lcode.c_freeexp.so'
source_filename = "mjolnir_Mjolnir_lua_extr_lcode.c_freeexp.so"
@VNONRELOC = common dso_local global i64 0, align 8
declare dso_local ptr @freereg()
define dso_local i64 @freeexp(i64 %arg1, i64 %arg2) {
entry:
%0 = inttoptr i64 %arg2 to ptr
%memload = load i64, ptr %0, align 1
%1 = load i64, ptr @VNONRELOC, align 8
%2 = sub i64 %memload, %1
%3 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload, i64 %1)
%CF = extractvalue { i64, i1 } %3, 1
%ZF = icmp eq i64 %2, 0
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%4 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload, i64 %1)
%OF = extractvalue { i64, i1 } %4, 1
%5 = and i64 %2, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF = icmp eq i64 %7, 0
%CmpZF_JNE = icmp eq i1 %ZF, false
br i1 %CmpZF_JNE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%memref-disp = add i64 %arg2, 8
%8 = inttoptr i64 %memref-disp to ptr
%memload1 = load i32, ptr %8, align 1
%9 = tail call ptr @freereg()
%RAX = ptrtoint ptr %9 to i64
br label %UnifiedReturnBlock
bb.2: ; preds = %entry
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.2, %bb.1
%UnifiedRetVal = phi i64 [ %RAX, %bb.1 ], [ %memload, %bb.2 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/mjolnir/Mjolnir/lua/extr_lcode.c_freeexp.c'
source_filename = "AnghaBench/mjolnir/Mjolnir/lua/extr_lcode.c_freeexp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VNONRELOC = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @freeexp], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @freeexp(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i64, ptr %1, align 8, !tbaa !6
%4 = load i64, ptr @VNONRELOC, align 8, !tbaa !13
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %10
6: ; preds = %2
%7 = getelementptr inbounds i8, ptr %1, i64 8
%8 = load i32, ptr %7, align 8, !tbaa !14
%9 = tail call i32 @freereg(ptr noundef %0, i32 noundef %8) #2
br label %10
10: ; preds = %6, %2
ret void
}
declare i32 @freereg(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !12, i64 8}
| mjolnir_Mjolnir_lua_extr_lcode.c_freeexp |
; ModuleID = 'linux_drivers_infiniband_hw_mthca_extr_mthca_mr.c___mthca_alloc_mtt.so'
source_filename = "linux_drivers_infiniband_hw_mthca_extr_mthca_mr.c___mthca_alloc_mtt.so"
@GFP_KERNEL = common dso_local global i32 0, align 4
@ENOMEM = common dso_local global i32 0, align 4
@EINVAL = common dso_local global i32 0, align 4
declare dso_local ptr @kmalloc()
declare dso_local ptr @mthca_alloc_mtt_range()
declare dso_local ptr @kfree()
declare dso_local ptr @ERR_PTR()
define dso_local i64 @__mthca_alloc_mtt(i64 %arg1, i32 %arg2, i64 %arg3) {
entry:
%R12-SKT-LOC = alloca i64, align 8
%EAX-SKT-LOC = alloca i64, align 8
%RSI-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%0 = and i32 %arg2, %arg2
%highbit = and i32 -2147483648, %0
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %0, 0
%1 = and i32 %0, 255
%2 = call i32 @llvm.ctpop.i32(i32 %1)
%3 = and i32 %2, 1
%PF = icmp eq i32 %3, 0
%CmpZF_JLE = icmp eq i1 %ZF, true
%CmpOF_JLE = icmp ne i1 %SF, false
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
br i1 %ZFOrSF_JLE, label %bb.8, label %bb.1
bb.1: ; preds = %entry
%memload = load i32, ptr @GFP_KERNEL, align 1
%4 = call ptr @kmalloc()
%RAX = ptrtoint ptr %4 to i64
%5 = and i64 %RAX, %RAX
%highbit1 = and i64 -9223372036854775808, %5
%SF2 = icmp ne i64 %highbit1, 0
%ZF3 = icmp eq i64 %5, 0
%6 = and i64 %5, 255
%7 = call i64 @llvm.ctpop.i64(i64 %6)
%8 = and i64 %7, 1
%PF4 = icmp eq i64 %8, 0
%9 = ptrtoint ptr @ENOMEM to i64
store i64 %9, ptr %R12-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF3, true
br i1 %CmpZF_JE, label %bb.10, label %bb.2
bb.2: ; preds = %bb.1
%memref-disp = add i64 %RAX, 16
%10 = inttoptr i64 %memref-disp to ptr
store i64 %arg3, ptr %10, align 1
%memref-disp5 = add i64 %RAX, 8
%11 = inttoptr i64 %memref-disp5 to ptr
%12 = sext i32 0 to i64
store i64 %12, ptr %11, align 1
%13 = inttoptr i64 %arg1 to ptr
%memload6 = load i32, ptr %13, align 1
%memref-disp7 = add i32 %memload6, 7
%14 = and i32 %memload6, %memload6
%highbit8 = and i32 -2147483648, %14
%SF9 = icmp ne i32 %highbit8, 0
%ZF10 = icmp eq i32 %14, 0
%15 = and i32 %14, 255
%16 = call i32 @llvm.ctpop.i32(i32 %15)
%17 = and i32 %16, 1
%PF11 = icmp eq i32 %17, 0
%Cond_CMOVNS = icmp eq i1 %SF9, false
%CMOV = select i1 %Cond_CMOVNS, i32 %memload6, i32 %memref-disp7
%EAX = lshr i32 %CMOV, 3
%ZF12 = icmp eq i32 %EAX, 0
%highbit13 = and i32 -2147483648, %EAX
%SF14 = icmp ne i32 %highbit13, 0
%18 = sub i32 %EAX, %arg2
%19 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EAX, i32 %arg2)
%CF = extractvalue { i32, i1 } %19, 1
%ZF15 = icmp eq i32 %18, 0
%highbit16 = and i32 -2147483648, %18
%SF17 = icmp ne i32 %highbit16, 0
%20 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EAX, i32 %arg2)
%OF = extractvalue { i32, i1 } %20, 1
%21 = and i32 %18, 255
%22 = call i32 @llvm.ctpop.i32(i32 %21)
%23 = and i32 %22, 1
%PF18 = icmp eq i32 %23, 0
%24 = zext i32 0 to i64
store i64 %24, ptr %RSI-SKT-LOC, align 1
%25 = zext i32 %EAX to i64
store i64 %25, ptr %EAX-SKT-LOC, align 1
%CmpSFOF_JGE = icmp eq i1 %SF17, %OF
br i1 %CmpSFOF_JGE, label %bb.6, label %bb.4
bb.4: ; preds = %bb.4, %bb.2
%RSI = load i64, ptr %RSI-SKT-LOC, align 1
%RSI23 = add i64 %RSI, 1
%26 = and i64 %RSI23, 255
%27 = call i64 @llvm.ctpop.i64(i64 %26)
%28 = and i64 %27, 1
%PF19 = icmp eq i64 %28, 0
%ZF20 = icmp eq i64 %RSI23, 0
%highbit21 = and i64 -9223372036854775808, %RSI23
%SF22 = icmp ne i64 %highbit21, 0
%29 = load i64, ptr %EAX-SKT-LOC, align 1
%EAX24 = trunc i64 %29 to i32
%EAX28 = add nsw i32 %EAX24, %EAX24
%highbit25 = and i32 -2147483648, %EAX28
%SF26 = icmp ne i32 %highbit25, 0
%ZF27 = icmp eq i32 %EAX28, 0
%30 = sub i32 %EAX28, %arg2
%31 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EAX28, i32 %arg2)
%CF29 = extractvalue { i32, i1 } %31, 1
%ZF30 = icmp eq i32 %30, 0
%highbit31 = and i32 -2147483648, %30
%SF32 = icmp ne i32 %highbit31, 0
%32 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EAX28, i32 %arg2)
%OF33 = extractvalue { i32, i1 } %32, 1
%33 = and i32 %30, 255
%34 = call i32 @llvm.ctpop.i32(i32 %33)
%35 = and i32 %34, 1
%PF34 = icmp eq i32 %35, 0
%SFAndOF_JL = icmp ne i1 %SF32, %OF33
%36 = zext i32 %EAX28 to i64
store i64 %36, ptr %EAX-SKT-LOC, align 1
store i64 %RSI23, ptr %RSI-SKT-LOC, align 1
br i1 %SFAndOF_JL, label %bb.4, label %bb.5
bb.5: ; preds = %bb.4
%memref-disp35 = add i64 %RAX, 8
%37 = inttoptr i64 %memref-disp35 to ptr
%ld-stk-prom = load i64, ptr %RSI-SKT-LOC, align 8
store i64 %ld-stk-prom, ptr %37, align 1
br label %bb.6
bb.6: ; preds = %bb.5, %bb.2
%38 = call ptr @mthca_alloc_mtt_range()
%RAX36 = ptrtoint ptr %38 to i64
%39 = trunc i64 %RAX36 to i32
store i32 %39, ptr %4, align 1
%40 = trunc i64 %RAX36 to i32
%41 = trunc i64 -1 to i32
%42 = sub i32 %40, %41
%43 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %40, i32 %41)
%CF37 = extractvalue { i32, i1 } %43, 1
%ZF38 = icmp eq i32 %42, 0
%highbit39 = and i32 -2147483648, %42
%SF40 = icmp ne i32 %highbit39, 0
%44 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %40, i32 %41)
%OF41 = extractvalue { i32, i1 } %44, 1
%45 = and i32 %42, 255
%46 = call i32 @llvm.ctpop.i32(i32 %45)
%47 = and i32 %46, 1
%PF42 = icmp eq i32 %47, 0
%CmpZF_JE1 = icmp eq i1 %ZF38, true
br i1 %CmpZF_JE1, label %bb.9, label %bb.7
bb.7: ; preds = %bb.6
br label %UnifiedReturnBlock
bb.9: ; preds = %bb.6
%48 = call ptr @kfree()
%RAX43 = ptrtoint ptr %48 to i64
br label %bb.10
bb.8: ; preds = %entry
%49 = ptrtoint ptr @EINVAL to i64
store i64 %49, ptr %R12-SKT-LOC, align 1
br label %bb.10
bb.10: ; preds = %bb.9, %bb.8, %bb.1
%R12 = load i64, ptr %R12-SKT-LOC, align 1
%50 = inttoptr i64 %R12 to ptr
%51 = load i32, ptr %50, align 1
%EDI = sub i32 0, %51
%52 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 0, i32 %51)
%CF44 = extractvalue { i32, i1 } %52, 1
%ZF45 = icmp eq i32 %EDI, 0
%highbit46 = and i32 -2147483648, %EDI
%SF47 = icmp ne i32 %highbit46, 0
%53 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 0, i32 %51)
%OF48 = extractvalue { i32, i1 } %53, 1
%54 = and i32 %EDI, 255
%55 = call i32 @llvm.ctpop.i32(i32 %54)
%56 = and i32 %55, 1
%PF49 = icmp eq i32 %56, 0
%57 = tail call ptr @ERR_PTR()
%RAX50 = ptrtoint ptr %57 to i64
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.10, %bb.7
%UnifiedRetVal = phi i64 [ %4, %bb.7 ], [ %RAX50, %bb.10 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/mthca/extr_mthca_mr.c___mthca_alloc_mtt.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/mthca/extr_mthca_mr.c___mthca_alloc_mtt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @__mthca_alloc_mtt], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @__mthca_alloc_mtt(ptr noundef %0, i32 noundef %1, ptr noundef %2) #0 {
%4 = icmp slt i32 %1, 1
br i1 %4, label %28, label %5
5: ; preds = %3
%6 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%7 = tail call ptr @kmalloc(i32 noundef 24, i32 noundef %6) #2
%8 = icmp eq ptr %7, null
br i1 %8, label %28, label %9
9: ; preds = %5
%10 = getelementptr inbounds i8, ptr %7, i64 16
store ptr %2, ptr %10, align 8, !tbaa !10
%11 = getelementptr inbounds i8, ptr %7, i64 8
store i64 0, ptr %11, align 8, !tbaa !14
%12 = load i32, ptr %0, align 4, !tbaa !15
%13 = sdiv i32 %12, 8
%14 = icmp slt i32 %13, %1
br i1 %14, label %15, label %22
15: ; preds = %9, %15
%16 = phi i64 [ %18, %15 ], [ 0, %9 ]
%17 = phi i32 [ %19, %15 ], [ %13, %9 ]
%18 = add nuw nsw i64 %16, 1
%19 = shl i32 %17, 1
%20 = icmp slt i32 %19, %1
br i1 %20, label %15, label %21, !llvm.loop !18
21: ; preds = %15
store i64 %18, ptr %11, align 8, !tbaa !14
br label %22
22: ; preds = %21, %9
%23 = phi i64 [ %18, %21 ], [ 0, %9 ]
%24 = tail call i32 @mthca_alloc_mtt_range(ptr noundef nonnull %0, i64 noundef %23, ptr noundef %2) #2
store i32 %24, ptr %7, align 8, !tbaa !20
%25 = icmp eq i32 %24, -1
br i1 %25, label %26, label %33
26: ; preds = %22
%27 = tail call i32 @kfree(ptr noundef nonnull %7) #2
br label %28
28: ; preds = %5, %3, %26
%29 = phi ptr [ @ENOMEM, %26 ], [ @EINVAL, %3 ], [ @ENOMEM, %5 ]
%30 = load i32, ptr %29, align 4, !tbaa !6
%31 = sub nsw i32 0, %30
%32 = tail call ptr @ERR_PTR(i32 noundef %31) #2
br label %33
33: ; preds = %28, %22
%34 = phi ptr [ %7, %22 ], [ %32, %28 ]
ret ptr %34
}
declare ptr @ERR_PTR(i32 noundef) local_unnamed_addr #1
declare ptr @kmalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mthca_alloc_mtt_range(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 16}
!11 = !{!"mthca_mtt", !7, i64 0, !12, i64 8, !13, i64 16}
!12 = !{!"long", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!11, !12, i64 8}
!15 = !{!16, !7, i64 0}
!16 = !{!"mthca_dev", !17, i64 0}
!17 = !{!"TYPE_2__", !7, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!11, !7, i64 0}
| linux_drivers_infiniband_hw_mthca_extr_mthca_mr.c___mthca_alloc_mtt |
; ModuleID = 'linux_drivers_soc_qcom_extr_qcom_aoss.c_qmp_send.so'
source_filename = "linux_drivers_soc_qcom_extr_qcom_aoss.c_qmp_send.so"
@HZ = common dso_local global i32 0, align 4
@rodata_13 = private unnamed_addr constant [27 x i8] c"ucore did not ack channel\0A\00", align 1, !ROData_SecInfo !0
@ETIMEDOUT = common dso_local global i32 0, align 4
@EINVAL = common dso_local global i32 0, align 4
declare dso_local ptr @WARN_ON()
declare dso_local ptr @mutex_lock()
declare dso_local ptr @__iowrite32_copy()
declare dso_local ptr @writel()
declare dso_local ptr @qmp_kick()
declare dso_local ptr @qmp_message_empty()
declare dso_local ptr @wait_event_interruptible_timeout()
declare dso_local ptr @dev_err()
declare dso_local ptr @mutex_unlock()
define dso_local i32 @qmp_send(i64 %arg1, i64 %arg2, i64 %arg3) {
entry:
%EBX-SKT-LOC = alloca i32, align 4
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memref-disp = add i64 %arg3, 4
%1 = inttoptr i64 %arg1 to ptr
%2 = load i64, ptr %1, align 1
%3 = sub i64 %memref-disp, %2
%4 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memref-disp, i64 %2)
%CF = extractvalue { i64, i1 } %4, 1
%ZF = icmp eq i64 %3, 0
%highbit = and i64 -9223372036854775808, %3
%SF = icmp ne i64 %highbit, 0
%5 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memref-disp, i64 %2)
%OF = extractvalue { i64, i1 } %5, 1
%6 = and i64 %3, 255
%7 = call i64 @llvm.ctpop.i64(i64 %6)
%8 = and i64 %7, 1
%PF = icmp eq i64 %8, 0
%CFCmp_CMOVA = icmp eq i1 %CF, false
%ZFCmp_CMOVA = icmp eq i1 %ZF, false
%CFAndZF_CMOVA = and i1 %CFCmp_CMOVA, %ZFCmp_CMOVA
%9 = call ptr @WARN_ON()
%RAX = ptrtoint ptr %9 to i64
%10 = and i64 %RAX, %RAX
%highbit1 = and i64 -9223372036854775808, %10
%SF2 = icmp ne i64 %highbit1, 0
%ZF3 = icmp eq i64 %10, 0
%11 = and i64 %10, 255
%12 = call i64 @llvm.ctpop.i64(i64 %11)
%13 = and i64 %12, 1
%PF4 = icmp eq i64 %13, 0
%CmpZF_JNE = icmp eq i1 %ZF3, false
br i1 %CmpZF_JNE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%EDI = trunc i64 %arg3 to i32
%EDI9 = and i32 %EDI, 3
%14 = and i32 %EDI9, 255
%15 = call i32 @llvm.ctpop.i32(i32 %14)
%16 = and i32 %15, 1
%PF5 = icmp eq i32 %16, 0
%ZF6 = icmp eq i32 %EDI9, 0
%highbit7 = and i32 -2147483648, %EDI9
%SF8 = icmp ne i32 %highbit7, 0
%17 = call ptr @WARN_ON()
%RAX10 = ptrtoint ptr %17 to i64
%18 = and i64 %RAX10, %RAX10
%highbit11 = and i64 -9223372036854775808, %18
%SF12 = icmp ne i64 %highbit11, 0
%ZF13 = icmp eq i64 %18, 0
%19 = and i64 %18, 255
%20 = call i64 @llvm.ctpop.i64(i64 %19)
%21 = and i64 %20, 1
%PF14 = icmp eq i64 %21, 0
%CmpZF_JE = icmp eq i1 %ZF13, true
br i1 %CmpZF_JE, label %bb.4, label %bb.2
bb.4: ; preds = %bb.1
%memref-disp15 = add i64 %arg1, 8
%22 = call ptr @mutex_lock()
%RAX16 = ptrtoint ptr %22 to i64
%memref-disp17 = add i64 %arg1, 16
%23 = inttoptr i64 %memref-disp17 to ptr
%memload = load i64, ptr %23, align 1
%memref-disp18 = add i64 %arg1, 24
%24 = inttoptr i64 %memref-disp18 to ptr
%memload19 = load i64, ptr %24, align 1
%memref-basereg = add i64 %memload19, %memload
%RDI = add i64 %memref-basereg, 4
%25 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %memref-basereg, i64 4)
%CF20 = extractvalue { i64, i1 } %25, 1
%26 = and i64 %RDI, 255
%27 = call i64 @llvm.ctpop.i64(i64 %26)
%28 = and i64 %27, 1
%PF21 = icmp eq i64 %28, 0
%ZF22 = icmp eq i64 %RDI, 0
%highbit23 = and i64 -9223372036854775808, %RDI
%SF24 = icmp ne i64 %highbit23, 0
%29 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %memref-basereg, i64 4)
%OF25 = extractvalue { i64, i1 } %29, 1
%RDX = lshr i64 %arg3, 2
%ZF26 = icmp eq i64 %RDX, 0
%highbit27 = and i64 -9223372036854775808, %RDX
%SF28 = icmp ne i64 %highbit27, 0
%30 = call ptr @__iowrite32_copy()
%RAX29 = ptrtoint ptr %30 to i64
%memref-disp30 = add i64 %arg1, 16
%31 = inttoptr i64 %memref-disp30 to ptr
%memload31 = load i64, ptr %31, align 1
%memref-disp32 = add i64 %arg1, 24
%32 = inttoptr i64 %memref-disp32 to ptr
%memload33 = load i64, ptr %32, align 1
%RSI = add i64 %memload31, %memload33
%33 = and i64 %RSI, 255
%34 = call i64 @llvm.ctpop.i64(i64 %33)
%35 = and i64 %34, 1
%PF34 = icmp eq i64 %35, 0
%36 = call ptr @writel()
%RAX35 = ptrtoint ptr %36 to i64
%37 = call ptr @qmp_kick()
%RAX36 = ptrtoint ptr %37 to i64
%memref-disp37 = add i64 %arg1, 36
%38 = inttoptr i64 %memref-disp37 to ptr
%memload38 = load i32, ptr %38, align 1
%39 = call ptr @qmp_message_empty()
%RAX39 = ptrtoint ptr %39 to i64
%memload40 = load i32, ptr @HZ, align 1
%ESI = trunc i64 %RAX39 to i32
%40 = call ptr @wait_event_interruptible_timeout()
%RAX41 = ptrtoint ptr %40 to i64
%41 = and i64 %RAX41, %RAX41
%highbit42 = and i64 -9223372036854775808, %41
%SF43 = icmp ne i64 %highbit42, 0
%ZF44 = icmp eq i64 %41, 0
%42 = and i64 %41, 255
%43 = call i64 @llvm.ctpop.i64(i64 %42)
%44 = and i64 %43, 1
%PF45 = icmp eq i64 %44, 0
store i32 0, ptr %EBX-SKT-LOC, align 1
%CmpZF_JNE72 = icmp eq i1 %ZF44, false
br i1 %CmpZF_JNE72, label %bb.6, label %bb.5
bb.5: ; preds = %bb.4
%memref-disp46 = add i64 %arg1, 32
%45 = inttoptr i64 %memref-disp46 to ptr
%memload47 = load i32, ptr %45, align 1
%RSI48 = ptrtoint ptr @rodata_13 to i64
%46 = call ptr @dev_err()
%RAX49 = ptrtoint ptr %46 to i64
%47 = load i32, ptr @ETIMEDOUT, align 4
%EBX = sub i32 0, %47
%48 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 0, i32 %47)
%CF50 = extractvalue { i32, i1 } %48, 1
%ZF51 = icmp eq i32 %EBX, 0
%highbit52 = and i32 -2147483648, %EBX
%SF53 = icmp ne i32 %highbit52, 0
%49 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 0, i32 %47)
%OF54 = extractvalue { i32, i1 } %49, 1
%50 = and i32 %EBX, 255
%51 = call i32 @llvm.ctpop.i32(i32 %50)
%52 = and i32 %51, 1
%PF55 = icmp eq i32 %52, 0
%memref-disp56 = add i64 %arg1, 16
%53 = inttoptr i64 %memref-disp56 to ptr
%memload57 = load i64, ptr %53, align 1
%memref-disp58 = add i64 %arg1, 24
%54 = inttoptr i64 %memref-disp58 to ptr
%memload59 = load i64, ptr %54, align 1
%RSI61 = add i64 %memload57, %memload59
%55 = and i64 %RSI61, 255
%56 = call i64 @llvm.ctpop.i64(i64 %55)
%57 = and i64 %56, 1
%PF60 = icmp eq i64 %57, 0
%58 = call ptr @writel()
%RAX62 = ptrtoint ptr %58 to i64
store i32 %EBX, ptr %EBX-SKT-LOC, align 1
br label %bb.6
bb.6: ; preds = %bb.5, %bb.4
%59 = call ptr @mutex_unlock()
%RAX63 = ptrtoint ptr %59 to i64
br label %bb.3
bb.2: ; preds = %bb.1, %entry
%60 = load i32, ptr @EINVAL, align 4
%EBX64 = sub i32 0, %60
%61 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 0, i32 %60)
%CF65 = extractvalue { i32, i1 } %61, 1
%ZF66 = icmp eq i32 %EBX64, 0
%highbit67 = and i32 -2147483648, %EBX64
%SF68 = icmp ne i32 %highbit67, 0
%62 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 0, i32 %60)
%OF69 = extractvalue { i32, i1 } %62, 1
%63 = and i32 %EBX64, 255
%64 = call i32 @llvm.ctpop.i32(i32 %63)
%65 = and i32 %64, 1
%PF70 = icmp eq i32 %65, 0
store i32 %EBX64, ptr %EBX-SKT-LOC, align 1
br label %bb.3
bb.3: ; preds = %bb.2, %bb.6
%EBX71 = load i32, ptr %EBX-SKT-LOC, align 1
ret i32 %EBX71
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/linux/drivers/soc/qcom/extr_qcom_aoss.c_qmp_send.c'
source_filename = "AnghaBench/linux/drivers/soc/qcom/extr_qcom_aoss.c_qmp_send.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@HZ = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [27 x i8] c"ucore did not ack channel\0A\00", align 1
@ETIMEDOUT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @qmp_send], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @qmp_send(ptr noundef %0, ptr noundef %1, i64 noundef %2) #0 {
%4 = add i64 %2, 4
%5 = load i64, ptr %0, align 8, !tbaa !6
%6 = icmp ugt i64 %4, %5
%7 = zext i1 %6 to i64
%8 = tail call i64 @WARN_ON(i64 noundef %7) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %3
%11 = load i32, ptr @EINVAL, align 4, !tbaa !12
%12 = sub nsw i32 0, %11
br label %55
13: ; preds = %3
%14 = and i64 %2, 3
%15 = tail call i64 @WARN_ON(i64 noundef %14) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %20, label %17
17: ; preds = %13
%18 = load i32, ptr @EINVAL, align 4, !tbaa !12
%19 = sub nsw i32 0, %18
br label %55
20: ; preds = %13
%21 = getelementptr inbounds i8, ptr %0, i64 8
%22 = tail call i32 @mutex_lock(ptr noundef nonnull %21) #2
%23 = getelementptr inbounds i8, ptr %0, i64 24
%24 = load i64, ptr %23, align 8, !tbaa !13
%25 = getelementptr inbounds i8, ptr %0, i64 16
%26 = load i64, ptr %25, align 8, !tbaa !14
%27 = add i64 %24, 4
%28 = add i64 %27, %26
%29 = lshr i64 %2, 2
%30 = tail call i32 @__iowrite32_copy(i64 noundef %28, ptr noundef %1, i64 noundef %29) #2
%31 = load i64, ptr %23, align 8, !tbaa !13
%32 = load i64, ptr %25, align 8, !tbaa !14
%33 = add nsw i64 %32, %31
%34 = tail call i32 @writel(i64 noundef %2, i64 noundef %33) #2
%35 = tail call i32 @qmp_kick(ptr noundef nonnull %0) #2
%36 = getelementptr inbounds i8, ptr %0, i64 36
%37 = load i32, ptr %36, align 4, !tbaa !15
%38 = tail call i32 @qmp_message_empty(ptr noundef nonnull %0) #2
%39 = load i32, ptr @HZ, align 4, !tbaa !12
%40 = tail call i64 @wait_event_interruptible_timeout(i32 noundef %37, i32 noundef %38, i32 noundef %39) #2
%41 = icmp eq i64 %40, 0
br i1 %41, label %42, label %52
42: ; preds = %20
%43 = getelementptr inbounds i8, ptr %0, i64 32
%44 = load i32, ptr %43, align 8, !tbaa !16
%45 = tail call i32 @dev_err(i32 noundef %44, ptr noundef nonnull @.str) #2
%46 = load i32, ptr @ETIMEDOUT, align 4, !tbaa !12
%47 = sub nsw i32 0, %46
%48 = load i64, ptr %23, align 8, !tbaa !13
%49 = load i64, ptr %25, align 8, !tbaa !14
%50 = add nsw i64 %49, %48
%51 = tail call i32 @writel(i64 noundef 0, i64 noundef %50) #2
br label %52
52: ; preds = %20, %42
%53 = phi i32 [ %47, %42 ], [ 0, %20 ]
%54 = tail call i32 @mutex_unlock(ptr noundef nonnull %21) #2
br label %55
55: ; preds = %52, %17, %10
%56 = phi i32 [ %12, %10 ], [ %19, %17 ], [ %53, %52 ]
ret i32 %56
}
declare i64 @WARN_ON(i64 noundef) local_unnamed_addr #1
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @__iowrite32_copy(i64 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @writel(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @qmp_kick(ptr noundef) local_unnamed_addr #1
declare i64 @wait_event_interruptible_timeout(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @qmp_message_empty(ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"qmp", !8, i64 0, !11, i64 8, !8, i64 16, !8, i64 24, !11, i64 32, !11, i64 36}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!7, !8, i64 24}
!14 = !{!7, !8, i64 16}
!15 = !{!7, !11, i64 36}
!16 = !{!7, !11, i64 32}
| linux_drivers_soc_qcom_extr_qcom_aoss.c_qmp_send |
; ModuleID = 'linux_arch_arm_mach-pxa_extr_gumstix.c_am300_init.so'
source_filename = "linux_arch_arm_mach-pxa_extr_gumstix.c_am300_init.so"
define dso_local i32 @am300_init() {
entry:
ret i32 0
}
| ; ModuleID = 'AnghaBench/linux/arch/arm/mach-pxa/extr_gumstix.c_am300_init.c'
source_filename = "AnghaBench/linux/arch/arm/mach-pxa/extr_gumstix.c_am300_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define weak i32 @am300_init() local_unnamed_addr #0 {
ret i32 0
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_arch_arm_mach-pxa_extr_gumstix.c_am300_init |
; ModuleID = 'linux_drivers_tty_serial_extr_vr41xx_siu.c_siu_init_ports.so'
source_filename = "linux_drivers_tty_serial_extr_vr41xx_siu.c_siu_init_ports.so"
@SIU_PORTS_MAX = common dso_local global i32 0, align 4
@siu_uart_ports = common dso_local global i64 0, align 8
@PORT_UNKNOWN = common dso_local global i32 0, align 4
@SIU_BAUD_BASE = common dso_local global i32 0, align 4
@UPIO_MEM = common dso_local global i32 0, align 4
@UPF_BOOT_AUTOCONF = common dso_local global i32 0, align 4
@UPF_IOREMAP = common dso_local global i32 0, align 4
@IORESOURCE_MEM = common dso_local global i32 0, align 4
declare dso_local ptr @dev_get_platdata()
declare dso_local ptr @platform_get_irq()
declare dso_local ptr @platform_get_resource()
define dso_local i32 @siu_init_ports(i64 %arg1) {
entry:
%EBX-SKT-LOC = alloca i64, align 8
%R13-SKT-LOC = alloca i64, align 8
%RBX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%0 = call ptr @dev_get_platdata()
%RAX = ptrtoint ptr %0 to i64
%1 = and i64 %RAX, %RAX
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %1, 0
%2 = and i64 %1, 255
%3 = call i64 @llvm.ctpop.i64(i64 %2)
%4 = and i64 %3, 1
%PF = icmp eq i64 %4, 0
%5 = zext i32 0 to i64
store i64 %5, ptr %EBX-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.7, label %bb.1
bb.1: ; preds = %entry
%6 = load i32, ptr @SIU_PORTS_MAX, align 4
%7 = zext i32 %6 to i64
%8 = zext i32 0 to i64
%9 = sub i64 %7, %8
%10 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %7, i64 %8)
%CF = extractvalue { i64, i1 } %10, 1
%ZF1 = icmp eq i64 %9, 0
%highbit2 = and i64 -9223372036854775808, %9
%SF3 = icmp ne i64 %highbit2, 0
%11 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %7, i64 %8)
%OF = extractvalue { i64, i1 } %11, 1
%12 = and i64 %9, 255
%13 = call i64 @llvm.ctpop.i64(i64 %12)
%14 = and i64 %13, 1
%PF4 = icmp eq i64 %14, 0
%CmpZF_JLE = icmp eq i1 %ZF1, true
%CmpOF_JLE = icmp ne i1 %SF3, %OF
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
br i1 %ZFOrSF_JLE, label %bb.7, label %bb.2
bb.2: ; preds = %bb.1
%memload = load i64, ptr @siu_uart_ports, align 1
%15 = zext i32 0 to i64
store i64 %15, ptr %RBX-SKT-LOC, align 1
store i64 %memload, ptr %R13-SKT-LOC, align 1
br label %bb.5
bb.5: ; preds = %bb.4, %bb.2
%RBX = load i64, ptr %RBX-SKT-LOC, align 1
%memref-idxreg = mul i64 4, %RBX
%memref-basereg = add i64 %RAX, %memref-idxreg
%16 = inttoptr i64 %memref-basereg to ptr
%memload5 = load i32, ptr %16, align 1
%R13 = load i64, ptr %R13-SKT-LOC, align 1
%17 = inttoptr i64 %R13 to ptr
store i32 %memload5, ptr %17, align 1
%18 = load i32, ptr @PORT_UNKNOWN, align 4
%19 = sub i32 %memload5, %18
%20 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload5, i32 %18)
%CF6 = extractvalue { i32, i1 } %20, 1
%ZF7 = icmp eq i32 %19, 0
%highbit8 = and i32 -2147483648, %19
%SF9 = icmp ne i32 %highbit8, 0
%21 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload5, i32 %18)
%OF10 = extractvalue { i32, i1 } %21, 1
%22 = and i32 %19, 255
%23 = call i32 @llvm.ctpop.i32(i32 %22)
%24 = and i32 %23, 1
%PF11 = icmp eq i32 %24, 0
%CmpZF_JE52 = icmp eq i1 %ZF7, true
br i1 %CmpZF_JE52, label %bb.4, label %bb.6
bb.6: ; preds = %bb.5
%ESI = trunc i64 %RBX to i32
%25 = call ptr @platform_get_irq()
%RAX12 = ptrtoint ptr %25 to i64
%memref-disp = add i64 %R13, 40
%26 = trunc i64 %RAX12 to i32
%27 = inttoptr i64 %memref-disp to ptr
store i32 %26, ptr %27, align 1
%memload13 = load i32, ptr @SIU_BAUD_BASE, align 1
%EAX = shl i32 %memload13, 4
%ZF14 = icmp eq i32 %EAX, 0
%highbit15 = and i32 -2147483648, %EAX
%SF16 = icmp ne i32 %highbit15, 0
%memref-disp17 = add i64 %R13, 4
%28 = inttoptr i64 %memref-disp17 to ptr
store i32 %EAX, ptr %28, align 1
%memref-disp18 = add i64 %R13, 8
%29 = inttoptr i64 %memref-disp18 to ptr
store i32 16, ptr %29, align 1
%memref-disp19 = add i64 %R13, 32
%30 = inttoptr i64 %memref-disp19 to ptr
%31 = sext i32 0 to i64
store i64 %31, ptr %30, align 1
%memload20 = load i32, ptr @UPIO_MEM, align 1
%memref-disp21 = add i64 %R13, 24
%32 = inttoptr i64 %memref-disp21 to ptr
store i32 %memload20, ptr %32, align 1
%memload22 = load i32, ptr @UPF_BOOT_AUTOCONF, align 1
%memload23 = load i32, ptr @UPF_IOREMAP, align 1
%EAX25 = or i32 %memload22, %memload23
%33 = and i32 %EAX25, 255
%34 = call i32 @llvm.ctpop.i32(i32 %33)
%35 = and i32 %34, 1
%PF24 = icmp eq i32 %35, 0
%memref-disp26 = add i64 %R13, 12
%36 = inttoptr i64 %memref-disp26 to ptr
store i32 %EAX25, ptr %36, align 1
%memref-disp27 = add i64 %R13, 16
%37 = trunc i64 %RBX to i32
%38 = inttoptr i64 %memref-disp27 to ptr
store i32 %37, ptr %38, align 1
%memload28 = load i32, ptr @IORESOURCE_MEM, align 1
%EDX = trunc i64 %RBX to i32
%39 = call ptr @platform_get_resource()
%memload30 = load i32, ptr %39, align 1
%memref-disp31 = add i64 %R13, 20
%40 = inttoptr i64 %memref-disp31 to ptr
store i32 %memload30, ptr %40, align 1
%R1338 = add i64 %R13, 48
%41 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %R13, i64 48)
%CF32 = extractvalue { i64, i1 } %41, 1
%42 = and i64 %R1338, 255
%43 = call i64 @llvm.ctpop.i64(i64 %42)
%44 = and i64 %43, 1
%PF33 = icmp eq i64 %44, 0
%ZF34 = icmp eq i64 %R1338, 0
%highbit35 = and i64 -9223372036854775808, %R1338
%SF36 = icmp ne i64 %highbit35, 0
%45 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %R13, i64 48)
%OF37 = extractvalue { i64, i1 } %45, 1
store i64 %R1338, ptr %R13-SKT-LOC, align 1
br label %bb.4
bb.4: ; preds = %bb.6, %bb.5
%RBX43 = add i64 %RBX, 1
%46 = and i64 %RBX43, 255
%47 = call i64 @llvm.ctpop.i64(i64 %46)
%48 = and i64 %47, 1
%PF39 = icmp eq i64 %48, 0
%ZF40 = icmp eq i64 %RBX43, 0
%highbit41 = and i64 -9223372036854775808, %RBX43
%SF42 = icmp ne i64 %highbit41, 0
%memload44 = load i64, ptr @SIU_PORTS_MAX, align 1
%49 = trunc i64 %memload44 to i32
%RAX45 = sext i32 %49 to i64
%50 = sub i64 %RBX43, %RAX45
%51 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RBX43, i64 %RAX45)
%CF46 = extractvalue { i64, i1 } %51, 1
%ZF47 = icmp eq i64 %50, 0
%highbit48 = and i64 -9223372036854775808, %50
%SF49 = icmp ne i64 %highbit48, 0
%52 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RBX43, i64 %RAX45)
%OF50 = extractvalue { i64, i1 } %52, 1
%53 = and i64 %50, 255
%54 = call i64 @llvm.ctpop.i64(i64 %53)
%55 = and i64 %54, 1
%PF51 = icmp eq i64 %55, 0
store i64 %RBX43, ptr %EBX-SKT-LOC, align 1
%CmpSFOF_JGE = icmp eq i1 %SF49, %OF50
store i64 %RBX43, ptr %RBX-SKT-LOC, align 1
br i1 %CmpSFOF_JGE, label %bb.7, label %bb.5
bb.7: ; preds = %bb.4, %bb.1, %entry
%56 = load i64, ptr %EBX-SKT-LOC, align 1
%EBX = trunc i64 %56 to i32
ret i32 %EBX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/tty/serial/extr_vr41xx_siu.c_siu_init_ports.c'
source_filename = "AnghaBench/linux/drivers/tty/serial/extr_vr41xx_siu.c_siu_init_ports.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@siu_uart_ports = common local_unnamed_addr global ptr null, align 8
@SIU_PORTS_MAX = common local_unnamed_addr global i32 0, align 4
@PORT_UNKNOWN = common local_unnamed_addr global i32 0, align 4
@SIU_BAUD_BASE = common local_unnamed_addr global i32 0, align 4
@UPIO_MEM = common local_unnamed_addr global i32 0, align 4
@UPF_IOREMAP = common local_unnamed_addr global i32 0, align 4
@UPF_BOOT_AUTOCONF = common local_unnamed_addr global i32 0, align 4
@IORESOURCE_MEM = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @siu_init_ports], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @siu_init_ports(ptr noundef %0) #0 {
%2 = tail call ptr @dev_get_platdata(ptr noundef %0) #2
%3 = icmp ne ptr %2, null
%4 = load i32, ptr @SIU_PORTS_MAX, align 4
%5 = icmp sgt i32 %4, 0
%6 = select i1 %3, i1 %5, i1 false
br i1 %6, label %7, label %45
7: ; preds = %1
%8 = load ptr, ptr @siu_uart_ports, align 8, !tbaa !6
br label %9
9: ; preds = %7, %37
%10 = phi i64 [ 0, %7 ], [ %39, %37 ]
%11 = phi ptr [ %8, %7 ], [ %38, %37 ]
%12 = getelementptr inbounds i32, ptr %2, i64 %10
%13 = load i32, ptr %12, align 4, !tbaa !10
store i32 %13, ptr %11, align 8, !tbaa !12
%14 = load i32, ptr @PORT_UNKNOWN, align 4, !tbaa !10
%15 = icmp eq i32 %13, %14
br i1 %15, label %37, label %16
16: ; preds = %9
%17 = trunc nuw nsw i64 %10 to i32
%18 = tail call i32 @platform_get_irq(ptr noundef %0, i32 noundef %17) #2
%19 = getelementptr inbounds i8, ptr %11, i64 40
store i32 %18, ptr %19, align 8, !tbaa !15
%20 = load i32, ptr @SIU_BAUD_BASE, align 4, !tbaa !10
%21 = shl nsw i32 %20, 4
%22 = getelementptr inbounds i8, ptr %11, i64 4
store i32 %21, ptr %22, align 4, !tbaa !16
%23 = getelementptr inbounds i8, ptr %11, i64 8
store i32 16, ptr %23, align 8, !tbaa !17
%24 = getelementptr inbounds i8, ptr %11, i64 32
store i64 0, ptr %24, align 8, !tbaa !18
%25 = load i32, ptr @UPIO_MEM, align 4, !tbaa !10
%26 = getelementptr inbounds i8, ptr %11, i64 24
store i32 %25, ptr %26, align 8, !tbaa !19
%27 = load i32, ptr @UPF_IOREMAP, align 4, !tbaa !10
%28 = load i32, ptr @UPF_BOOT_AUTOCONF, align 4, !tbaa !10
%29 = or i32 %28, %27
%30 = getelementptr inbounds i8, ptr %11, i64 12
store i32 %29, ptr %30, align 4, !tbaa !20
%31 = getelementptr inbounds i8, ptr %11, i64 16
store i32 %17, ptr %31, align 8, !tbaa !21
%32 = load i32, ptr @IORESOURCE_MEM, align 4, !tbaa !10
%33 = tail call ptr @platform_get_resource(ptr noundef %0, i32 noundef %32, i32 noundef %17) #2
%34 = load i32, ptr %33, align 4, !tbaa !22
%35 = getelementptr inbounds i8, ptr %11, i64 20
store i32 %34, ptr %35, align 4, !tbaa !24
%36 = getelementptr inbounds i8, ptr %11, i64 48
br label %37
37: ; preds = %9, %16
%38 = phi ptr [ %11, %9 ], [ %36, %16 ]
%39 = add nuw nsw i64 %10, 1
%40 = load i32, ptr @SIU_PORTS_MAX, align 4, !tbaa !10
%41 = sext i32 %40 to i64
%42 = icmp slt i64 %39, %41
br i1 %42, label %9, label %43, !llvm.loop !25
43: ; preds = %37
%44 = trunc nuw nsw i64 %39 to i32
br label %45
45: ; preds = %43, %1
%46 = phi i32 [ 0, %1 ], [ %44, %43 ]
ret i32 %46
}
declare ptr @dev_get_platdata(ptr noundef) local_unnamed_addr #1
declare i32 @platform_get_irq(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @platform_get_resource(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"uart_port", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !14, i64 32, !11, i64 40}
!14 = !{!"long", !8, i64 0}
!15 = !{!13, !11, i64 40}
!16 = !{!13, !11, i64 4}
!17 = !{!13, !11, i64 8}
!18 = !{!13, !14, i64 32}
!19 = !{!13, !11, i64 24}
!20 = !{!13, !11, i64 12}
!21 = !{!13, !11, i64 16}
!22 = !{!23, !11, i64 0}
!23 = !{!"resource", !11, i64 0}
!24 = !{!13, !11, i64 20}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
| linux_drivers_tty_serial_extr_vr41xx_siu.c_siu_init_ports |
; ModuleID = 'postgres_src_backend_lib_extr_integerset.c_intset_add_member.so'
source_filename = "postgres_src_backend_lib_extr_integerset.c_intset_add_member.so"
@ERROR = common dso_local global i32 0, align 4
@rodata_13 = private unnamed_addr constant [113 x i8] c"cannot add new values to integer set while iteration is in progress\00cannot add value to integer set out of order\00", align 1, !ROData_SecInfo !0
@MAX_BUFFERED_VALUES = common dso_local global i64 0, align 8
declare dso_local ptr @elog()
declare dso_local ptr @intset_flush_buffered_values()
declare dso_local ptr @Assert()
define dso_local <4 x i32> @intset_add_member(i64 %arg1, i64 %arg2, double %arg3, double %arg4) {
entry:
%RAX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memref-disp = add i64 %arg1, 32
%0 = inttoptr i64 %memref-disp to ptr
%1 = load i64, ptr %0, align 1
%2 = sub i64 %1, 0
%3 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %1, i64 0)
%CF = extractvalue { i64, i1 } %3, 1
%ZF = icmp eq i64 %2, 0
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%4 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %1, i64 0)
%OF = extractvalue { i64, i1 } %4, 1
%5 = and i64 %2, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF = icmp eq i64 %7, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%memload = load i32, ptr @ERROR, align 1
%RSI = ptrtoint ptr @rodata_13 to i64
%8 = call ptr @elog()
%RAX = ptrtoint ptr %8 to i64
br label %bb.2
bb.2: ; preds = %bb.1, %entry
%9 = inttoptr i64 %arg1 to ptr
%10 = load i64, ptr %9, align 1
%11 = sub i64 %10, %arg2
%12 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %10, i64 %arg2)
%CF1 = extractvalue { i64, i1 } %12, 1
%ZF2 = icmp eq i64 %11, 0
%highbit3 = and i64 -9223372036854775808, %11
%SF4 = icmp ne i64 %highbit3, 0
%13 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %10, i64 %arg2)
%OF5 = extractvalue { i64, i1 } %13, 1
%14 = and i64 %11, 255
%15 = call i64 @llvm.ctpop.i64(i64 %14)
%16 = and i64 %15, 1
%PF6 = icmp eq i64 %16, 0
%SFAndOF_JL = icmp ne i1 %SF4, %OF5
br i1 %SFAndOF_JL, label %bb.5, label %bb.3
bb.3: ; preds = %bb.2
%memref-disp7 = add i64 %arg1, 8
%17 = inttoptr i64 %memref-disp7 to ptr
%18 = load i64, ptr %17, align 1
%19 = sub i64 %18, 0
%20 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %18, i64 0)
%CF8 = extractvalue { i64, i1 } %20, 1
%ZF9 = icmp eq i64 %19, 0
%highbit10 = and i64 -9223372036854775808, %19
%SF11 = icmp ne i64 %highbit10, 0
%21 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %18, i64 0)
%OF12 = extractvalue { i64, i1 } %21, 1
%22 = and i64 %19, 255
%23 = call i64 @llvm.ctpop.i64(i64 %22)
%24 = and i64 %23, 1
%PF13 = icmp eq i64 %24, 0
%CmpZF_JLE = icmp eq i1 %ZF9, true
%CmpOF_JLE = icmp ne i1 %SF11, %OF12
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
br i1 %ZFOrSF_JLE, label %bb.5, label %bb.4
bb.4: ; preds = %bb.3
%memload14 = load i32, ptr @ERROR, align 1
%RSI15 = ptrtoint ptr getelementptr inbounds ([113 x i8], ptr @rodata_13, i32 0, i32 68) to i64, !ROData_Index !1
%25 = call ptr @elog()
%RAX16 = ptrtoint ptr %25 to i64
br label %bb.5
bb.5: ; preds = %bb.4, %bb.3, %bb.2
%memref-disp17 = add i64 %arg1, 16
%26 = inttoptr i64 %memref-disp17 to ptr
%memload18 = load i64, ptr %26, align 1
%27 = load i64, ptr @MAX_BUFFERED_VALUES, align 8
%28 = sub i64 %memload18, %27
%29 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload18, i64 %27)
%CF19 = extractvalue { i64, i1 } %29, 1
%ZF20 = icmp eq i64 %28, 0
%highbit21 = and i64 -9223372036854775808, %28
%SF22 = icmp ne i64 %highbit21, 0
%30 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload18, i64 %27)
%OF23 = extractvalue { i64, i1 } %30, 1
%31 = and i64 %28, 255
%32 = call i64 @llvm.ctpop.i64(i64 %31)
%33 = and i64 %32, 1
%PF24 = icmp eq i64 %33, 0
store i64 %memload18, ptr %RAX-SKT-LOC, align 1
%SFAndOF_JL49 = icmp ne i1 %SF22, %OF23
br i1 %SFAndOF_JL49, label %bb.7, label %bb.6
bb.6: ; preds = %bb.5
%34 = call ptr @intset_flush_buffered_values()
%RAX25 = ptrtoint ptr %34 to i64
%memref-disp26 = add i64 %arg1, 16
%35 = inttoptr i64 %memref-disp26 to ptr
%memload27 = load i64, ptr %35, align 1
%36 = load i64, ptr @MAX_BUFFERED_VALUES, align 8
%37 = sub i64 %memload27, %36
%38 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload27, i64 %36)
%CF28 = extractvalue { i64, i1 } %38, 1
%ZF29 = icmp eq i64 %37, 0
%highbit30 = and i64 -9223372036854775808, %37
%SF31 = icmp ne i64 %highbit30, 0
%39 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload27, i64 %36)
%OF32 = extractvalue { i64, i1 } %39, 1
%40 = and i64 %37, 255
%41 = call i64 @llvm.ctpop.i64(i64 %40)
%42 = and i64 %41, 1
%PF33 = icmp eq i64 %42, 0
%DIL = icmp ne i1 %SF31, %OF32
%43 = call ptr @Assert()
%RAX34 = ptrtoint ptr %43 to i64
%memref-disp35 = add i64 %arg1, 16
%44 = inttoptr i64 %memref-disp35 to ptr
%memload36 = load i64, ptr %44, align 1
store i64 %memload36, ptr %RAX-SKT-LOC, align 1
br label %bb.7
bb.7: ; preds = %bb.6, %bb.5
%memref-disp37 = add i64 %arg1, 24
%45 = inttoptr i64 %memref-disp37 to ptr
%memload38 = load i64, ptr %45, align 1
%RAX39 = load i64, ptr %RAX-SKT-LOC, align 1
%memref-idxreg = mul i64 8, %RAX39
%memref-basereg = add i64 %memload38, %memref-idxreg
%46 = inttoptr i64 %memref-basereg to ptr
store i64 %arg2, ptr %46, align 1
%memref-disp40 = add i64 %arg1, 8
%47 = inttoptr i64 %memref-disp40 to ptr
%memload41 = load <4 x i32>, ptr %47, align 1
%48 = insertelement <2 x double> zeroinitializer, double %arg4, i64 0
%49 = bitcast <2 x double> %48 to <4 x i32>
%50 = insertelement <2 x double> zeroinitializer, double %arg4, i64 0
%51 = bitcast <2 x double> %50 to <4 x i32>
%52 = bitcast <4 x i32> %49 to <4 x i32>
%53 = bitcast <4 x i32> %51 to <4 x i32>
%54 = extractelement <4 x i32> %52, i32 0
%55 = extractelement <4 x i32> %53, i32 0
%cmp_segment = icmp eq i32 %54, %55
%segment = select i1 %cmp_segment, i32 -1, i32 0
%56 = insertelement <4 x i32> zeroinitializer, i32 %segment, i32 0
%57 = extractelement <4 x i32> %52, i32 1
%58 = extractelement <4 x i32> %53, i32 1
%cmp_segment42 = icmp eq i32 %57, %58
%segment43 = select i1 %cmp_segment42, i32 -1, i32 0
%59 = insertelement <4 x i32> %56, i32 %segment43, i32 1
%60 = extractelement <4 x i32> %52, i32 2
%61 = extractelement <4 x i32> %53, i32 2
%cmp_segment44 = icmp eq i32 %60, %61
%segment45 = select i1 %cmp_segment44, i32 -1, i32 0
%62 = insertelement <4 x i32> %59, i32 %segment45, i32 2
%63 = extractelement <4 x i32> %52, i32 3
%64 = extractelement <4 x i32> %53, i32 3
%cmp_segment46 = icmp eq i32 %63, %64
%segment47 = select i1 %cmp_segment46, i32 -1, i32 0
%XMM1 = insertelement <4 x i32> %62, i32 %segment47, i32 3
%65 = bitcast <4 x i32> %memload41 to <2 x i64>
%66 = bitcast <4 x i32> %XMM1 to <2 x i64>
%XMM0 = sub <2 x i64> %65, %66
%memref-disp48 = add i64 %arg1, 8
%67 = bitcast <2 x i64> %XMM0 to <4 x i32>
%68 = inttoptr i64 %memref-disp48 to ptr
store <4 x i32> %67, ptr %68, align 1
%69 = inttoptr i64 %arg1 to ptr
store i64 %arg2, ptr %69, align 1
%70 = bitcast <2 x i64> %XMM0 to <4 x i32>
ret <4 x i32> %70
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
!1 = !{ptr getelementptr inbounds ([113 x i8], ptr @rodata_13, i32 0, i32 68)}
| ; ModuleID = 'AnghaBench/postgres/src/backend/lib/extr_integerset.c_intset_add_member.c'
source_filename = "AnghaBench/postgres/src/backend/lib/extr_integerset.c_intset_add_member.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ERROR = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [68 x i8] c"cannot add new values to integer set while iteration is in progress\00", align 1
@.str.1 = private unnamed_addr constant [45 x i8] c"cannot add value to integer set out of order\00", align 1
@MAX_BUFFERED_VALUES = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @intset_add_member(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 32
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = icmp eq i64 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %2
%7 = load i32, ptr @ERROR, align 4, !tbaa !12
%8 = tail call i32 @elog(i32 noundef %7, ptr noundef nonnull @.str) #2
br label %9
9: ; preds = %6, %2
%10 = load i64, ptr %0, align 8, !tbaa !14
%11 = icmp slt i64 %10, %1
br i1 %11, label %19, label %12
12: ; preds = %9
%13 = getelementptr inbounds i8, ptr %0, i64 8
%14 = load i64, ptr %13, align 8, !tbaa !15
%15 = icmp sgt i64 %14, 0
br i1 %15, label %16, label %19
16: ; preds = %12
%17 = load i32, ptr @ERROR, align 4, !tbaa !12
%18 = tail call i32 @elog(i32 noundef %17, ptr noundef nonnull @.str.1) #2
br label %19
19: ; preds = %16, %12, %9
%20 = getelementptr inbounds i8, ptr %0, i64 16
%21 = load i64, ptr %20, align 8, !tbaa !16
%22 = load i64, ptr @MAX_BUFFERED_VALUES, align 8, !tbaa !17
%23 = icmp slt i64 %21, %22
br i1 %23, label %32, label %24
24: ; preds = %19
%25 = tail call i32 @intset_flush_buffered_values(ptr noundef nonnull %0) #2
%26 = load i64, ptr %20, align 8, !tbaa !16
%27 = load i64, ptr @MAX_BUFFERED_VALUES, align 8, !tbaa !17
%28 = icmp slt i64 %26, %27
%29 = zext i1 %28 to i32
%30 = tail call i32 @Assert(i32 noundef %29) #2
%31 = load i64, ptr %20, align 8, !tbaa !16
br label %32
32: ; preds = %24, %19
%33 = phi i64 [ %31, %24 ], [ %21, %19 ]
%34 = getelementptr inbounds i8, ptr %0, i64 24
%35 = load ptr, ptr %34, align 8, !tbaa !18
%36 = getelementptr inbounds i64, ptr %35, i64 %33
store i64 %1, ptr %36, align 8, !tbaa !17
%37 = getelementptr inbounds i8, ptr %0, i64 8
%38 = load <2 x i64>, ptr %37, align 8, !tbaa !17
%39 = add nsw <2 x i64> %38, <i64 1, i64 1>
store <2 x i64> %39, ptr %37, align 8, !tbaa !17
store i64 %1, ptr %0, align 8, !tbaa !14
ret void
}
declare i32 @elog(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @intset_flush_buffered_values(ptr noundef) local_unnamed_addr #1
declare i32 @Assert(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 32}
!7 = !{!"TYPE_4__", !8, i64 0, !8, i64 8, !8, i64 16, !11, i64 24, !8, i64 32}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!7, !8, i64 0}
!15 = !{!7, !8, i64 8}
!16 = !{!7, !8, i64 16}
!17 = !{!8, !8, i64 0}
!18 = !{!7, !11, i64 24}
| postgres_src_backend_lib_extr_integerset.c_intset_add_member |
; ModuleID = 'fastsocket_kernel_net_rds_extr_ib_rdma.c_rds_ib_get_mr_info.so'
source_filename = "fastsocket_kernel_net_rds_extr_ib_rdma.c_rds_ib_get_mr_info.so"
define dso_local i64 @rds_ib_get_mr_info(i64 %arg1, i64 %arg2) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%1 = inttoptr i64 %memload to ptr
%memload1 = load i64, ptr %1, align 1
%2 = inttoptr i64 %arg2 to ptr
store i64 %memload1, ptr %2, align 1
ret i64 %memload1
}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/rds/extr_ib_rdma.c_rds_ib_get_mr_info.c'
source_filename = "AnghaBench/fastsocket/kernel/net/rds/extr_ib_rdma.c_rds_ib_get_mr_info.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define void @rds_ib_get_mr_info(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load <2 x i32>, ptr %3, align 4, !tbaa !11
store <2 x i32> %4, ptr %1, align 4, !tbaa !11
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"rds_ib_device", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
| fastsocket_kernel_net_rds_extr_ib_rdma.c_rds_ib_get_mr_info |
; ModuleID = 'openwrt_target_linux_generic_files_drivers_mtd_mtdsplit_extr_mtdsplit_jimage.c_read_jimage_header.so'
source_filename = "openwrt_target_linux_generic_files_drivers_mtd_mtdsplit_extr_mtdsplit_jimage.c_read_jimage_header.so"
@rodata_13 = private unnamed_addr constant [40 x i8] c"read error in \22%s\22\0A\00short read in \22%s\22\0A\00", align 1, !ROData_SecInfo !0
@EIO = common dso_local global i32 0, align 4
declare dso_local ptr @mtd_read()
declare dso_local ptr @pr_debug()
define dso_local i32 @read_jimage_header(i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4) {
entry:
%EBX-SKT-LOC = alloca i32, align 4
%stktop_8 = alloca i8, i32 32, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 0
%RSP_P.0 = inttoptr i64 %0 to ptr
%1 = add i64 %tos, 8
%RSP_P.8 = inttoptr i64 %1 to ptr
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%RCX = ptrtoint ptr %RSP_P.8 to i64
%2 = call ptr @mtd_read()
%RAX = ptrtoint ptr %2 to i64
%3 = trunc i64 %RAX to i32
%4 = trunc i64 %RAX to i32
%5 = and i32 %3, %4
%highbit = and i32 -2147483648, %5
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %5, 0
%6 = and i32 %5, 255
%7 = call i32 @llvm.ctpop.i32(i32 %6)
%8 = and i32 %7, 1
%PF = icmp eq i32 %8, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%EBX = trunc i64 %RAX to i32
%9 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %9, align 1
%RDI = ptrtoint ptr @rodata_13 to i64
%10 = call ptr @pr_debug()
%RAX1 = ptrtoint ptr %10 to i64
store i32 %EBX, ptr %EBX-SKT-LOC, align 1
br label %bb.4
bb.2: ; preds = %entry
%11 = load i64, ptr %RSP_P.8, align 1
%12 = sub i64 %11, %arg4
%13 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %11, i64 %arg4)
%CF = extractvalue { i64, i1 } %13, 1
%ZF2 = icmp eq i64 %12, 0
%highbit3 = and i64 -9223372036854775808, %12
%SF4 = icmp ne i64 %highbit3, 0
%14 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %11, i64 %arg4)
%OF = extractvalue { i64, i1 } %14, 1
%15 = and i64 %12, 255
%16 = call i64 @llvm.ctpop.i64(i64 %15)
%17 = and i64 %16, 1
%PF5 = icmp eq i64 %17, 0
store i32 0, ptr %EBX-SKT-LOC, align 1
%CmpZF_JE17 = icmp eq i1 %ZF2, true
br i1 %CmpZF_JE17, label %bb.4, label %bb.3
bb.3: ; preds = %bb.2
%18 = inttoptr i64 %arg1 to ptr
%memload6 = load i32, ptr %18, align 1
%RDI7 = ptrtoint ptr getelementptr inbounds ([40 x i8], ptr @rodata_13, i32 0, i32 20) to i64, !ROData_Index !1
%19 = call ptr @pr_debug()
%RAX8 = ptrtoint ptr %19 to i64
%20 = load i32, ptr @EIO, align 4
%EBX9 = sub i32 0, %20
%21 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 0, i32 %20)
%CF10 = extractvalue { i32, i1 } %21, 1
%ZF11 = icmp eq i32 %EBX9, 0
%highbit12 = and i32 -2147483648, %EBX9
%SF13 = icmp ne i32 %highbit12, 0
%22 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 0, i32 %20)
%OF14 = extractvalue { i32, i1 } %22, 1
%23 = and i32 %EBX9, 255
%24 = call i32 @llvm.ctpop.i32(i32 %23)
%25 = and i32 %24, 1
%PF15 = icmp eq i32 %25, 0
store i32 %EBX9, ptr %EBX-SKT-LOC, align 1
br label %bb.4
bb.4: ; preds = %bb.3, %bb.2, %bb.1
%EBX16 = load i32, ptr %EBX-SKT-LOC, align 1
ret i32 %EBX16
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
!1 = !{ptr getelementptr inbounds ([40 x i8], ptr @rodata_13, i32 0, i32 20)}
| ; ModuleID = 'AnghaBench/openwrt/target/linux/generic/files/drivers/mtd/mtdsplit/extr_mtdsplit_jimage.c_read_jimage_header.c'
source_filename = "AnghaBench/openwrt/target/linux/generic/files/drivers/mtd/mtdsplit/extr_mtdsplit_jimage.c_read_jimage_header.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [20 x i8] c"read error in \22%s\22\0A\00", align 1
@.str.1 = private unnamed_addr constant [20 x i8] c"short read in \22%s\22\0A\00", align 1
@EIO = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @read_jimage_header], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @read_jimage_header(ptr noundef %0, i64 noundef %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%6 = call i32 @mtd_read(ptr noundef %0, i64 noundef %1, i64 noundef %3, ptr noundef nonnull %5, ptr noundef %2) #3
%7 = icmp eq i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %4
%9 = load i32, ptr %0, align 4, !tbaa !6
%10 = call i32 @pr_debug(ptr noundef nonnull @.str, i32 noundef %9) #3
br label %19
11: ; preds = %4
%12 = load i64, ptr %5, align 8, !tbaa !11
%13 = icmp eq i64 %12, %3
br i1 %13, label %19, label %14
14: ; preds = %11
%15 = load i32, ptr %0, align 4, !tbaa !6
%16 = call i32 @pr_debug(ptr noundef nonnull @.str.1, i32 noundef %15) #3
%17 = load i32, ptr @EIO, align 4, !tbaa !13
%18 = sub nsw i32 0, %17
br label %19
19: ; preds = %11, %14, %8
%20 = phi i32 [ %6, %8 ], [ %18, %14 ], [ 0, %11 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
ret i32 %20
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @mtd_read(ptr noundef, i64 noundef, i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @pr_debug(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"mtd_info", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!8, !8, i64 0}
| openwrt_target_linux_generic_files_drivers_mtd_mtdsplit_extr_mtdsplit_jimage.c_read_jimage_header |
; ModuleID = 'radare2_libr_asm_p_extr_asm_xtensa.c_xtensa_buffer_read_memory.so'
source_filename = "radare2_libr_asm_p_extr_asm_xtensa.c_xtensa_buffer_read_memory.so"
@INSN_BUFFER_SIZE = common dso_local global i64 0, align 8
@bytes = common dso_local global i32 0, align 4
declare dso_local ptr @memcpy(ptr, ptr, i64)
define dso_local i32 @xtensa_buffer_read_memory(i64 %arg1, i64 %arg2, i64 %arg3) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%memload = load i64, ptr @INSN_BUFFER_SIZE, align 1
%0 = sub i64 %memload, %arg3
%1 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload, i64 %arg3)
%CF = extractvalue { i64, i1 } %1, 1
%ZF = icmp eq i64 %0, 0
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%2 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload, i64 %arg3)
%OF = extractvalue { i64, i1 } %2, 1
%3 = and i64 %0, 255
%4 = call i64 @llvm.ctpop.i64(i64 %3)
%5 = and i64 %4, 1
%PF = icmp eq i64 %5, 0
%Cond_CMOVL = icmp ne i1 %SF, %OF
%CMOV = select i1 %Cond_CMOVL, i64 %memload, i64 %arg3
%memload1 = load i32, ptr @bytes, align 1
%6 = inttoptr i64 %arg2 to ptr
%7 = inttoptr i32 %memload1 to ptr
%8 = call ptr @memcpy(ptr %6, ptr %7, i64 %CMOV)
%RAX = ptrtoint ptr %8 to i64
ret i32 0
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/radare2/libr/asm/p/extr_asm_xtensa.c_xtensa_buffer_read_memory.c'
source_filename = "AnghaBench/radare2/libr/asm/p/extr_asm_xtensa.c_xtensa_buffer_read_memory.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@INSN_BUFFER_SIZE = common local_unnamed_addr global i64 0, align 8
@bytes = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @xtensa_buffer_read_memory], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @xtensa_buffer_read_memory(i32 %0, ptr noundef %1, i64 noundef %2, ptr nocapture readnone %3) #0 {
%5 = load i64, ptr @INSN_BUFFER_SIZE, align 8, !tbaa !6
%6 = tail call i64 @llvm.smin.i64(i64 %5, i64 %2)
%7 = load i32, ptr @bytes, align 4, !tbaa !10
%8 = tail call i32 @memcpy(ptr noundef %1, i32 noundef %7, i64 noundef %6) #3
ret i32 0
}
declare i32 @memcpy(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.smin.i64(i64, i64) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| radare2_libr_asm_p_extr_asm_xtensa.c_xtensa_buffer_read_memory |
; ModuleID = 'freebsd_contrib_lua_src_extr_lauxlib.c_tag_error.so'
source_filename = "freebsd_contrib_lua_src_extr_lauxlib.c_tag_error.so"
declare dso_local ptr @lua_typename()
declare dso_local ptr @typeerror()
define dso_local i64 @tag_error(i64 %arg1, i32 %arg2, i32 %arg3) {
entry:
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%1 = call ptr @lua_typename()
%RAX = ptrtoint ptr %1 to i64
%EDX = trunc i64 %RAX to i32
%2 = tail call ptr @typeerror()
%RAX1 = ptrtoint ptr %2 to i64
ret i64 %RAX1
}
| ; ModuleID = 'AnghaBench/freebsd/contrib/lua/src/extr_lauxlib.c_tag_error.c'
source_filename = "AnghaBench/freebsd/contrib/lua/src/extr_lauxlib.c_tag_error.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @tag_error], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @tag_error(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = tail call i32 @lua_typename(ptr noundef %0, i32 noundef %2) #2
%5 = tail call i32 @typeerror(ptr noundef %0, i32 noundef %1, i32 noundef %4) #2
ret void
}
declare i32 @typeerror(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_typename(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_contrib_lua_src_extr_lauxlib.c_tag_error |
; ModuleID = 'linux_drivers_infiniband_core_extr_cm_msgs.h_cm_req_get_alt_local_ack_timeout.so'
source_filename = "linux_drivers_infiniband_core_extr_cm_msgs.h_cm_req_get_alt_local_ack_timeout.so"
define dso_local i32 @cm_req_get_alt_local_ack_timeout(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
%EAX = lshr i32 %memload, 3
%ZF = icmp eq i32 %EAX, 0
%highbit = and i32 -2147483648, %EAX
%SF = icmp ne i32 %highbit, 0
ret i32 %EAX
}
| ; ModuleID = 'AnghaBench/linux/drivers/infiniband/core/extr_cm_msgs.h_cm_req_get_alt_local_ack_timeout.c'
source_filename = "AnghaBench/linux/drivers/infiniband/core/extr_cm_msgs.h_cm_req_get_alt_local_ack_timeout.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @cm_req_get_alt_local_ack_timeout], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal range(i32 -268435456, 268435456) i32 @cm_req_get_alt_local_ack_timeout(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = ashr i32 %2, 3
ret i32 %3
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"cm_req_msg", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_infiniband_core_extr_cm_msgs.h_cm_req_get_alt_local_ack_timeout |
; ModuleID = 'linux_drivers_mtd_ubi_extr_build.c_ubi_get_device.so'
source_filename = "linux_drivers_mtd_ubi_extr_build.c_ubi_get_device.so"
@ubi_devices_lock = common dso_local global i32 0, align 4
@ubi_devices = common dso_local global i64 0, align 8
declare dso_local ptr @spin_lock()
declare dso_local ptr @ubi_assert()
declare dso_local ptr @get_device()
declare dso_local ptr @spin_unlock()
define dso_local i64 @ubi_get_device(i32 %arg1) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%0 = call ptr @spin_lock()
%RAX = ptrtoint ptr %0 to i64
%memload = load i64, ptr @ubi_devices, align 1
%RCX = sext i32 %arg1 to i64
%memref-idxreg = mul i64 8, %RCX
%memref-basereg = add i64 %memload, %memref-idxreg
%1 = inttoptr i64 %memref-basereg to ptr
%memload1 = load i64, ptr %1, align 1
%2 = and i64 %memload1, %memload1
%highbit = and i64 -9223372036854775808, %2
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %2, 0
%3 = and i64 %2, 255
%4 = call i64 @llvm.ctpop.i64(i64 %3)
%5 = and i64 %4, 1
%PF = icmp eq i64 %5, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%6 = inttoptr i64 %memload1 to ptr
%7 = load i64, ptr %6, align 1
%8 = sub i64 %7, 0
%9 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %7, i64 0)
%CF = extractvalue { i64, i1 } %9, 1
%ZF2 = icmp eq i64 %8, 0
%highbit3 = and i64 -9223372036854775808, %8
%SF4 = icmp ne i64 %highbit3, 0
%10 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %7, i64 0)
%OF = extractvalue { i64, i1 } %10, 1
%11 = and i64 %8, 255
%12 = call i64 @llvm.ctpop.i64(i64 %11)
%13 = and i64 %12, 1
%PF5 = icmp eq i64 %13, 0
%DIL = icmp eq i1 %SF4, false
%14 = call ptr @ubi_assert()
%RAX6 = ptrtoint ptr %14 to i64
%15 = inttoptr i64 %memload1 to ptr
%memload7 = load i64, ptr %15, align 1
%16 = add i64 %memload7, 1
store i64 %16, ptr %15, align 8
%memref-disp = add i64 %memload1, 8
%17 = call ptr @get_device()
%RAX8 = ptrtoint ptr %17 to i64
br label %bb.2
bb.2: ; preds = %bb.1, %entry
%18 = call ptr @spin_unlock()
%RAX9 = ptrtoint ptr %18 to i64
ret i64 %memload1
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/mtd/ubi/extr_build.c_ubi_get_device.c'
source_filename = "AnghaBench/linux/drivers/mtd/ubi/extr_build.c_ubi_get_device.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ubi_devices_lock = common global i32 0, align 4
@ubi_devices = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @ubi_get_device(i32 noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @spin_lock(ptr noundef nonnull @ubi_devices_lock) #2
%3 = load ptr, ptr @ubi_devices, align 8, !tbaa !6
%4 = sext i32 %0 to i64
%5 = getelementptr inbounds ptr, ptr %3, i64 %4
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = icmp eq ptr %6, null
br i1 %7, label %17, label %8
8: ; preds = %1
%9 = load i64, ptr %6, align 8, !tbaa !10
%10 = icmp sgt i64 %9, -1
%11 = zext i1 %10 to i32
%12 = tail call i32 @ubi_assert(i32 noundef %11) #2
%13 = load i64, ptr %6, align 8, !tbaa !10
%14 = add nsw i64 %13, 1
store i64 %14, ptr %6, align 8, !tbaa !10
%15 = getelementptr inbounds i8, ptr %6, i64 8
%16 = tail call i32 @get_device(ptr noundef nonnull %15) #2
br label %17
17: ; preds = %8, %1
%18 = tail call i32 @spin_unlock(ptr noundef nonnull @ubi_devices_lock) #2
ret ptr %6
}
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @ubi_assert(i32 noundef) local_unnamed_addr #1
declare i32 @get_device(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"ubi_device", !12, i64 0, !13, i64 8}
!12 = !{!"long", !8, i64 0}
!13 = !{!"int", !8, i64 0}
| linux_drivers_mtd_ubi_extr_build.c_ubi_get_device |
; ModuleID = 'radare2_libr_asm_p_extr_asm_nios2.c_nios2_buffer_read_memory.so'
source_filename = "radare2_libr_asm_p_extr_asm_nios2.c_nios2_buffer_read_memory.so"
@bytes = common dso_local global i32 0, align 4
declare dso_local ptr @memcpy(ptr, ptr, i64)
define dso_local i32 @nios2_buffer_read_memory(i64 %arg1, i64 %arg2, i64 %arg3) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%memload = load i32, ptr @bytes, align 1
%0 = inttoptr i64 %arg2 to ptr
%1 = inttoptr i32 %memload to ptr
%2 = call ptr @memcpy(ptr %0, ptr %1, i64 %arg3)
%RAX = ptrtoint ptr %2 to i64
ret i32 0
}
| ; ModuleID = 'AnghaBench/radare2/libr/asm/p/extr_asm_nios2.c_nios2_buffer_read_memory.c'
source_filename = "AnghaBench/radare2/libr/asm/p/extr_asm_nios2.c_nios2_buffer_read_memory.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@bytes = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @nios2_buffer_read_memory], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @nios2_buffer_read_memory(i32 %0, ptr noundef %1, i32 noundef %2, ptr nocapture readnone %3) #0 {
%5 = load i32, ptr @bytes, align 4, !tbaa !6
%6 = tail call i32 @memcpy(ptr noundef %1, i32 noundef %5, i32 noundef %2) #2
ret i32 0
}
declare i32 @memcpy(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| radare2_libr_asm_p_extr_asm_nios2.c_nios2_buffer_read_memory |
; ModuleID = 'DOOM_linuxdoom-1.10_extr_wi_stuff.c_WI_updateDeathmatchStats.so'
source_filename = "DOOM_linuxdoom-1.10_extr_wi_stuff.c_WI_updateDeathmatchStats.so"
@acceleratestage = common dso_local global i64 0, align 8
@dm_state = common dso_local global i32 0, align 4
@MAXPLAYERS = common dso_local global i32 0, align 4
@playeringame = common dso_local global i64 0, align 8
@dm_frags = common dso_local global i64 0, align 8
@dm_totals = common dso_local global i64 0, align 8
@plrs = common dso_local global i64 0, align 8
@sfx_barexp = common dso_local global i32 0, align 4
@bcnt = common dso_local global i32 0, align 4
@sfx_pistol = common dso_local global i32 0, align 4
@cnt_pause = common dso_local global i64 0, align 8
@TICRATE = common dso_local global i64 0, align 8
@sfx_slop = common dso_local global i32 0, align 4
@gamemode = common dso_local global i64 0, align 8
@commercial = common dso_local global i64 0, align 8
declare dso_local ptr @WI_updateAnimatedBack()
declare dso_local ptr @WI_fragSum()
declare dso_local ptr @S_StartSound()
declare dso_local ptr @WI_initNoState()
declare dso_local ptr @WI_initShowNextLoc()
define dso_local i64 @WI_updateDeathmatchStats() {
entry:
%RAX-SKT-LOC2 = alloca i64, align 8
%RCX-SKT-LOC241 = alloca i64, align 8
%RBX-SKT-LOC226 = alloca i64, align 8
%R13D-SKT-LOC = alloca i32, align 4
%ESI-SKT-LOC = alloca i32, align 4
%EAX-SKT-LOC172 = alloca i32, align 4
%RSI-SKT-LOC = alloca i64, align 8
%EAX-SKT-LOC = alloca i64, align 8
%RCX-SKT-LOC = alloca i64, align 8
%RBX-SKT-LOC102 = alloca i64, align 8
%ECX-SKT-LOC67 = alloca i32, align 4
%ECX-SKT-LOC48 = alloca i32, align 4
%RDI-SKT-LOC = alloca i64, align 8
%ECX-SKT-LOC = alloca i64, align 8
%RAX-SKT-LOC = alloca i64, align 8
%RBX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%0 = call ptr @WI_updateAnimatedBack()
%RAX = ptrtoint ptr %0 to i64
%memload = load i64, ptr @acceleratestage, align 1
%memload1 = load i32, ptr @dm_state, align 1
%1 = and i64 %memload, %memload
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %1, 0
%2 = and i64 %1, 255
%3 = call i64 @llvm.ctpop.i64(i64 %2)
%4 = and i64 %3, 1
%PF = icmp eq i64 %4, 0
%5 = ptrtoint ptr @dm_state to i64
store i64 %5, ptr %RBX-SKT-LOC226, align 1
store i64 %memload, ptr %RCX-SKT-LOC241, align 1
%6 = zext i32 %memload1 to i64
store i64 %6, ptr %RAX-SKT-LOC2, align 1
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.13, label %bb.1
bb.1: ; preds = %entry
%7 = sub i32 %memload1, 4
%8 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload1, i32 4)
%CF = extractvalue { i32, i1 } %8, 1
%ZF2 = icmp eq i32 %7, 0
%highbit3 = and i32 -2147483648, %7
%SF4 = icmp ne i32 %highbit3, 0
%9 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload1, i32 4)
%OF = extractvalue { i32, i1 } %9, 1
%10 = and i32 %7, 255
%11 = call i32 @llvm.ctpop.i32(i32 %10)
%12 = and i32 %11, 1
%PF5 = icmp eq i32 %12, 0
%CmpZF_JE4 = icmp eq i1 %ZF2, true
br i1 %CmpZF_JE4, label %bb.13, label %bb.2
bb.2: ; preds = %bb.1
%13 = sext i32 0 to i64
store i64 %13, ptr @acceleratestage, align 1
%memload6 = load i32, ptr @MAXPLAYERS, align 1
%14 = and i32 %memload6, %memload6
%highbit7 = and i32 -2147483648, %14
%SF8 = icmp ne i32 %highbit7, 0
%ZF9 = icmp eq i32 %14, 0
%15 = and i32 %14, 255
%16 = call i32 @llvm.ctpop.i32(i32 %15)
%17 = and i32 %16, 1
%PF10 = icmp eq i32 %17, 0
%18 = zext i32 %memload6 to i64
store i64 %18, ptr %ECX-SKT-LOC, align 1
store i32 %memload6, ptr %ECX-SKT-LOC67, align 1
%CmpZF_JLE = icmp eq i1 %ZF9, true
%CmpOF_JLE = icmp ne i1 %SF8, false
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
br i1 %ZFOrSF_JLE, label %bb.36, label %bb.3
bb.3: ; preds = %bb.2
%memload11 = load i64, ptr @playeringame, align 1
%19 = zext i32 0 to i64
store i64 %19, ptr %RBX-SKT-LOC, align 1
store i64 %memload11, ptr %RAX-SKT-LOC, align 1
br label %bb.7
bb.7: ; preds = %bb.6, %bb.3
%RBX = load i64, ptr %RBX-SKT-LOC, align 1
%memref-idxreg = mul i64 8, %RBX
%RAX12 = load i64, ptr %RAX-SKT-LOC, align 1
%memref-basereg = add i64 %RAX12, %memref-idxreg
%20 = inttoptr i64 %memref-basereg to ptr
%21 = load i64, ptr %20, align 1
%22 = sub i64 %21, 0
%23 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %21, i64 0)
%CF13 = extractvalue { i64, i1 } %23, 1
%ZF14 = icmp eq i64 %22, 0
%highbit15 = and i64 -9223372036854775808, %22
%SF16 = icmp ne i64 %highbit15, 0
%24 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %21, i64 0)
%OF17 = extractvalue { i64, i1 } %24, 1
%25 = and i64 %22, 255
%26 = call i64 @llvm.ctpop.i64(i64 %25)
%27 = and i64 %26, 1
%PF18 = icmp eq i64 %27, 0
%CmpZF_JE5 = icmp eq i1 %ZF14, true
br i1 %CmpZF_JE5, label %bb.6, label %bb.8
bb.8: ; preds = %bb.7
%28 = load i64, ptr %ECX-SKT-LOC, align 1
%ECX = trunc i64 %28 to i32
%29 = and i32 %ECX, %ECX
%highbit19 = and i32 -2147483648, %29
%SF20 = icmp ne i32 %highbit19, 0
%ZF21 = icmp eq i32 %29, 0
%30 = and i32 %29, 255
%31 = call i32 @llvm.ctpop.i32(i32 %30)
%32 = and i32 %31, 1
%PF22 = icmp eq i32 %32, 0
store i32 %ECX, ptr %ECX-SKT-LOC48, align 1
%CmpZF_JLE6 = icmp eq i1 %ZF21, true
%CmpOF_JLE7 = icmp ne i1 %SF20, false
%ZFOrSF_JLE8 = or i1 %CmpZF_JLE6, %CmpOF_JLE7
br i1 %ZFOrSF_JLE8, label %bb.5, label %bb.9
bb.9: ; preds = %bb.8
%memload23 = load i64, ptr @plrs, align 1
%memload24 = load i64, ptr @dm_frags, align 1
%33 = zext i32 0 to i64
store i64 %33, ptr %RDI-SKT-LOC, align 1
br label %bb.11
bb.11: ; preds = %bb.10, %bb.9
%RDI = load i64, ptr %RDI-SKT-LOC, align 1
%memref-idxreg25 = mul i64 8, %RDI
%memref-basereg26 = add i64 %RAX12, %memref-idxreg25
%34 = inttoptr i64 %memref-basereg26 to ptr
%35 = load i64, ptr %34, align 1
%36 = sub i64 %35, 0
%37 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %35, i64 0)
%CF27 = extractvalue { i64, i1 } %37, 1
%ZF28 = icmp eq i64 %36, 0
%highbit29 = and i64 -9223372036854775808, %36
%SF30 = icmp ne i64 %highbit29, 0
%38 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %35, i64 0)
%OF31 = extractvalue { i64, i1 } %38, 1
%39 = and i64 %36, 255
%40 = call i64 @llvm.ctpop.i64(i64 %39)
%41 = and i64 %40, 1
%PF32 = icmp eq i64 %41, 0
%CmpZF_JE9 = icmp eq i1 %ZF28, true
br i1 %CmpZF_JE9, label %bb.10, label %bb.12
bb.12: ; preds = %bb.11
%memref-idxreg33 = mul i64 8, %RBX
%memref-basereg34 = add i64 %memload23, %memref-idxreg33
%42 = inttoptr i64 %memref-basereg34 to ptr
%memload35 = load i64, ptr %42, align 1
%memref-idxreg36 = mul i64 4, %RDI
%memref-basereg37 = add i64 %memload35, %memref-idxreg36
%43 = inttoptr i64 %memref-basereg37 to ptr
%memload38 = load i32, ptr %43, align 1
%memref-idxreg39 = mul i64 8, %RBX
%memref-basereg40 = add i64 %memload24, %memref-idxreg39
%44 = inttoptr i64 %memref-basereg40 to ptr
%memload41 = load i64, ptr %44, align 1
%45 = inttoptr i64 %memload41 to ptr
%sc-m = mul i64 4, %RDI
%46 = getelementptr i8, ptr %45, i64 %sc-m
store i32 %memload38, ptr %46, align 1
%memload42 = load i32, ptr @MAXPLAYERS, align 1
store i32 %memload42, ptr %ECX-SKT-LOC48, align 1
br label %bb.10
bb.10: ; preds = %bb.12, %bb.11
%RDI47 = add i64 %RDI, 1
%47 = and i64 %RDI47, 255
%48 = call i64 @llvm.ctpop.i64(i64 %47)
%49 = and i64 %48, 1
%PF43 = icmp eq i64 %49, 0
%ZF44 = icmp eq i64 %RDI47, 0
%highbit45 = and i64 -9223372036854775808, %RDI47
%SF46 = icmp ne i64 %highbit45, 0
%ECX49 = load i32, ptr %ECX-SKT-LOC48, align 1
%RBP = sext i32 %ECX49 to i64
%50 = sub i64 %RDI47, %RBP
%51 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RDI47, i64 %RBP)
%CF50 = extractvalue { i64, i1 } %51, 1
%ZF51 = icmp eq i64 %50, 0
%highbit52 = and i64 -9223372036854775808, %50
%SF53 = icmp ne i64 %highbit52, 0
%52 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RDI47, i64 %RBP)
%OF54 = extractvalue { i64, i1 } %52, 1
%53 = and i64 %50, 255
%54 = call i64 @llvm.ctpop.i64(i64 %53)
%55 = and i64 %54, 1
%PF55 = icmp eq i64 %55, 0
%CmpSFOF_JGE = icmp eq i1 %SF53, %OF54
store i64 %RDI47, ptr %RDI-SKT-LOC, align 1
br i1 %CmpSFOF_JGE, label %bb.5, label %bb.11
bb.5: ; preds = %bb.10, %bb.8
%EDI = trunc i64 %RBX to i32
%56 = call ptr @WI_fragSum()
%RAX56 = ptrtoint ptr %56 to i64
%memload57 = load i64, ptr @dm_totals, align 1
%memref-idxreg58 = mul i64 4, %RBX
%memref-basereg59 = add i64 %memload57, %memref-idxreg58
%57 = trunc i64 %RAX56 to i32
%58 = inttoptr i64 %memref-basereg59 to ptr
store i32 %57, ptr %58, align 1
%memload60 = load i64, ptr @playeringame, align 1
%memload61 = load i32, ptr @MAXPLAYERS, align 1
store i32 %memload61, ptr %ECX-SKT-LOC67, align 1
%59 = zext i32 %memload61 to i64
store i64 %59, ptr %ECX-SKT-LOC, align 1
store i64 %memload60, ptr %RAX-SKT-LOC, align 1
br label %bb.6
bb.6: ; preds = %bb.5, %bb.7
%RBX66 = add i64 %RBX, 1
%60 = and i64 %RBX66, 255
%61 = call i64 @llvm.ctpop.i64(i64 %60)
%62 = and i64 %61, 1
%PF62 = icmp eq i64 %62, 0
%ZF63 = icmp eq i64 %RBX66, 0
%highbit64 = and i64 -9223372036854775808, %RBX66
%SF65 = icmp ne i64 %highbit64, 0
%ECX68 = load i32, ptr %ECX-SKT-LOC67, align 1
%RDX = sext i32 %ECX68 to i64
%63 = sub i64 %RBX66, %RDX
%64 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RBX66, i64 %RDX)
%CF69 = extractvalue { i64, i1 } %64, 1
%ZF70 = icmp eq i64 %63, 0
%highbit71 = and i64 -9223372036854775808, %63
%SF72 = icmp ne i64 %highbit71, 0
%65 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RBX66, i64 %RDX)
%OF73 = extractvalue { i64, i1 } %65, 1
%66 = and i64 %63, 255
%67 = call i64 @llvm.ctpop.i64(i64 %66)
%68 = and i64 %67, 1
%PF74 = icmp eq i64 %68, 0
%CmpSFOF_JGE10 = icmp eq i1 %SF72, %OF73
store i64 %RBX66, ptr %RBX-SKT-LOC, align 1
br i1 %CmpSFOF_JGE10, label %bb.36, label %bb.7
bb.36: ; preds = %bb.6, %bb.2
%memload75 = load i32, ptr @sfx_barexp, align 1
%69 = call ptr @S_StartSound()
%RAX76 = ptrtoint ptr %69 to i64
store i32 4, ptr @dm_state, align 1
%memload77 = load i64, ptr @acceleratestage, align 1
store i64 %memload77, ptr %RCX-SKT-LOC241, align 1
%70 = ptrtoint ptr @acceleratestage to i64
store i64 %70, ptr %RAX-SKT-LOC2, align 1
br label %bb.37
bb.13: ; preds = %bb.1, %entry
%71 = sub i32 %memload1, 4
%72 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload1, i32 4)
%CF78 = extractvalue { i32, i1 } %72, 1
%ZF79 = icmp eq i32 %71, 0
%highbit80 = and i32 -2147483648, %71
%SF81 = icmp ne i32 %highbit80, 0
%73 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload1, i32 4)
%OF82 = extractvalue { i32, i1 } %73, 1
%74 = and i32 %71, 255
%75 = call i32 @llvm.ctpop.i32(i32 %74)
%76 = and i32 %75, 1
%PF83 = icmp eq i32 %76, 0
%CmpZF_JE11 = icmp eq i1 %ZF79, true
br i1 %CmpZF_JE11, label %bb.37, label %bb.14
bb.14: ; preds = %bb.13
%77 = sub i32 %memload1, 2
%78 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload1, i32 2)
%CF84 = extractvalue { i32, i1 } %78, 1
%ZF85 = icmp eq i32 %77, 0
%highbit86 = and i32 -2147483648, %77
%SF87 = icmp ne i32 %highbit86, 0
%79 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload1, i32 2)
%OF88 = extractvalue { i32, i1 } %79, 1
%80 = and i32 %77, 255
%81 = call i32 @llvm.ctpop.i32(i32 %80)
%82 = and i32 %81, 1
%PF89 = icmp eq i32 %82, 0
%CmpZF_JNE = icmp eq i1 %ZF85, false
br i1 %CmpZF_JNE, label %bb.41, label %bb.15
bb.15: ; preds = %bb.14
%83 = load i8, ptr @bcnt, align 4
%84 = zext i8 %83 to i64
%85 = zext i8 3 to i64
%86 = and i64 %84, %85
%ZF90 = icmp eq i64 %86, 0
%highbit91 = and i64 -9223372036854775808, %86
%SF92 = icmp ne i64 %highbit91, 0
%87 = and i64 %86, 255
%88 = call i64 @llvm.ctpop.i64(i64 %87)
%89 = and i64 %88, 1
%PF93 = icmp eq i64 %89, 0
%CmpZF_JNE12 = icmp eq i1 %ZF90, false
br i1 %CmpZF_JNE12, label %bb.17, label %bb.16
bb.16: ; preds = %bb.15
%memload94 = load i32, ptr @sfx_pistol, align 1
%90 = call ptr @S_StartSound()
%RAX95 = ptrtoint ptr %90 to i64
br label %bb.17
bb.17: ; preds = %bb.16, %bb.15
%memload96 = load i32, ptr @MAXPLAYERS, align 1
%91 = and i32 %memload96, %memload96
%highbit97 = and i32 -2147483648, %91
%SF98 = icmp ne i32 %highbit97, 0
%ZF99 = icmp eq i32 %91, 0
%92 = and i32 %91, 255
%93 = call i32 @llvm.ctpop.i32(i32 %92)
%94 = and i32 %93, 1
%PF100 = icmp eq i32 %94, 0
%95 = zext i32 %memload96 to i64
store i64 %95, ptr %EAX-SKT-LOC, align 1
%CmpZF_JLE13 = icmp eq i1 %ZF99, true
%CmpOF_JLE14 = icmp ne i1 %SF98, false
%ZFOrSF_JLE15 = or i1 %CmpZF_JLE13, %CmpOF_JLE14
br i1 %ZFOrSF_JLE15, label %bb.45, label %bb.18
bb.18: ; preds = %bb.17
%memload101 = load i64, ptr @playeringame, align 1
%96 = zext i32 0 to i64
store i64 %96, ptr %RBX-SKT-LOC102, align 1
store i64 %memload101, ptr %RCX-SKT-LOC, align 1
store i32 0, ptr %R13D-SKT-LOC, align 1
br label %bb.21
bb.21: ; preds = %bb.20, %bb.18
%RBX103 = load i64, ptr %RBX-SKT-LOC102, align 1
%memref-idxreg104 = mul i64 8, %RBX103
%RCX = load i64, ptr %RCX-SKT-LOC, align 1
%memref-basereg105 = add i64 %RCX, %memref-idxreg104
%97 = inttoptr i64 %memref-basereg105 to ptr
%98 = load i64, ptr %97, align 1
%99 = sub i64 %98, 0
%100 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %98, i64 0)
%CF106 = extractvalue { i64, i1 } %100, 1
%ZF107 = icmp eq i64 %99, 0
%highbit108 = and i64 -9223372036854775808, %99
%SF109 = icmp ne i64 %highbit108, 0
%101 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %98, i64 0)
%OF110 = extractvalue { i64, i1 } %101, 1
%102 = and i64 %99, 255
%103 = call i64 @llvm.ctpop.i64(i64 %102)
%104 = and i64 %103, 1
%PF111 = icmp eq i64 %104, 0
%CmpZF_JE16 = icmp eq i1 %ZF107, true
br i1 %CmpZF_JE16, label %bb.20, label %bb.22
bb.22: ; preds = %bb.21
%105 = load i64, ptr %EAX-SKT-LOC, align 1
%EAX = trunc i64 %105 to i32
%106 = and i32 %EAX, %EAX
%highbit112 = and i32 -2147483648, %106
%SF113 = icmp ne i32 %highbit112, 0
%ZF114 = icmp eq i32 %106, 0
%107 = and i32 %106, 255
%108 = call i32 @llvm.ctpop.i32(i32 %107)
%109 = and i32 %108, 1
%PF115 = icmp eq i32 %109, 0
%CmpZF_JLE17 = icmp eq i1 %ZF114, true
%CmpOF_JLE18 = icmp ne i1 %SF113, false
%ZFOrSF_JLE19 = or i1 %CmpZF_JLE17, %CmpOF_JLE18
br i1 %ZFOrSF_JLE19, label %bb.33, label %bb.23
bb.23: ; preds = %bb.22
%memload116 = load i64, ptr @dm_frags, align 1
%memload117 = load i64, ptr @plrs, align 1
%110 = zext i32 0 to i64
store i64 %110, ptr %RSI-SKT-LOC, align 1
br label %bb.27
bb.27: ; preds = %bb.26, %bb.23
%RSI = load i64, ptr %RSI-SKT-LOC, align 1
%memref-idxreg118 = mul i64 8, %RSI
%memref-basereg119 = add i64 %RCX, %memref-idxreg118
%111 = inttoptr i64 %memref-basereg119 to ptr
%112 = load i64, ptr %111, align 1
%113 = sub i64 %112, 0
%114 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %112, i64 0)
%CF120 = extractvalue { i64, i1 } %114, 1
%ZF121 = icmp eq i64 %113, 0
%highbit122 = and i64 -9223372036854775808, %113
%SF123 = icmp ne i64 %highbit122, 0
%115 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %112, i64 0)
%OF124 = extractvalue { i64, i1 } %115, 1
%116 = and i64 %113, 255
%117 = call i64 @llvm.ctpop.i64(i64 %116)
%118 = and i64 %117, 1
%PF125 = icmp eq i64 %118, 0
%CmpZF_JE20 = icmp eq i1 %ZF121, true
br i1 %CmpZF_JE20, label %bb.26, label %bb.28
bb.28: ; preds = %bb.27
%memref-idxreg126 = mul i64 8, %RBX103
%memref-basereg127 = add i64 %memload116, %memref-idxreg126
%119 = inttoptr i64 %memref-basereg127 to ptr
%memload128 = load i64, ptr %119, align 1
%memref-idxreg129 = mul i64 4, %RSI
%memref-basereg130 = add i64 %memload128, %memref-idxreg129
%120 = inttoptr i64 %memref-basereg130 to ptr
%memload131 = load i32, ptr %120, align 1
%memref-idxreg132 = mul i64 8, %RBX103
%memref-basereg133 = add i64 %memload117, %memref-idxreg132
%121 = inttoptr i64 %memref-basereg133 to ptr
%memload134 = load i64, ptr %121, align 1
%122 = inttoptr i64 %memload134 to ptr
%sc-m135 = mul i64 4, %RSI
%123 = getelementptr i8, ptr %122, i64 %sc-m135
%memload137 = load i32, ptr %123, align 1
%124 = sub i32 %memload131, %memload137
%125 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload131, i32 %memload137)
%CF138 = extractvalue { i32, i1 } %125, 1
%ZF139 = icmp eq i32 %124, 0
%highbit140 = and i32 -2147483648, %124
%SF141 = icmp ne i32 %highbit140, 0
%126 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload131, i32 %memload137)
%OF142 = extractvalue { i32, i1 } %126, 1
%127 = and i32 %124, 255
%128 = call i32 @llvm.ctpop.i32(i32 %127)
%129 = and i32 %128, 1
%PF143 = icmp eq i32 %129, 0
%CmpZF_JE21 = icmp eq i1 %ZF139, true
br i1 %CmpZF_JE21, label %bb.26, label %bb.29
bb.29: ; preds = %bb.28
%EBP = lshr i32 %memload137, 31
%ZF144 = icmp eq i32 %EBP, 0
%highbit145 = and i32 -2147483648, %EBP
%SF146 = icmp ne i32 %highbit145, 0
%EBP151 = or i32 %EBP, 1
%130 = and i32 %EBP151, 255
%131 = call i32 @llvm.ctpop.i32(i32 %130)
%132 = and i32 %131, 1
%PF147 = icmp eq i32 %132, 0
%ZF148 = icmp eq i32 %EBP151, 0
%highbit149 = and i32 -2147483648, %EBP151
%SF150 = icmp ne i32 %highbit149, 0
%EBP155 = add nsw i32 %EBP151, %memload131
%highbit152 = and i32 -2147483648, %EBP155
%SF153 = icmp ne i32 %highbit152, 0
%ZF154 = icmp eq i32 %EBP155, 0
%memref-idxreg156 = mul i64 4, %RSI
%memref-basereg157 = add i64 %memload128, %memref-idxreg156
%133 = inttoptr i64 %memref-basereg157 to ptr
store i32 %EBP155, ptr %133, align 1
%134 = sub i32 %EBP155, 99
%135 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EBP155, i32 99)
%CF158 = extractvalue { i32, i1 } %135, 1
%ZF159 = icmp eq i32 %134, 0
%highbit160 = and i32 -2147483648, %134
%SF161 = icmp ne i32 %highbit160, 0
%136 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EBP155, i32 99)
%OF162 = extractvalue { i32, i1 } %136, 1
%137 = and i32 %134, 255
%138 = call i32 @llvm.ctpop.i32(i32 %137)
%139 = and i32 %138, 1
%PF163 = icmp eq i32 %139, 0
store i32 99, ptr %EAX-SKT-LOC172, align 1
%ZFCmp_JG = icmp eq i1 %ZF159, false
%SFOFCmp_JG = icmp eq i1 %SF161, %OF162
%ZFAndSFOF_JG = and i1 %ZFCmp_JG, %SFOFCmp_JG
br i1 %ZFAndSFOF_JG, label %bb.25, label %bb.30
bb.30: ; preds = %bb.29
%140 = sub i32 %EBP155, -100
%141 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EBP155, i32 -100)
%CF164 = extractvalue { i32, i1 } %141, 1
%ZF165 = icmp eq i32 %140, 0
%highbit166 = and i32 -2147483648, %140
%SF167 = icmp ne i32 %highbit166, 0
%142 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EBP155, i32 -100)
%OF168 = extractvalue { i32, i1 } %142, 1
%143 = and i32 %140, 255
%144 = call i32 @llvm.ctpop.i32(i32 %143)
%145 = and i32 %144, 1
%PF169 = icmp eq i32 %145, 0
store i32 -99, ptr %EAX-SKT-LOC172, align 1
store i32 1, ptr %R13D-SKT-LOC, align 1
%CmpZF_JLE22 = icmp eq i1 %ZF165, true
%CmpOF_JLE23 = icmp ne i1 %SF167, %OF168
%ZFOrSF_JLE24 = or i1 %CmpZF_JLE22, %CmpOF_JLE23
br i1 %ZFOrSF_JLE24, label %bb.25, label %bb.31
bb.31: ; preds = %bb.30
br label %bb.26
bb.25: ; preds = %bb.30, %bb.29
%memref-idxreg170 = mul i64 4, %RSI
%memref-basereg171 = add i64 %memload128, %memref-idxreg170
%EAX173 = load i32, ptr %EAX-SKT-LOC172, align 1
%146 = inttoptr i64 %memref-basereg171 to ptr
store i32 %EAX173, ptr %146, align 1
store i32 1, ptr %R13D-SKT-LOC, align 1
br label %bb.26
bb.26: ; preds = %bb.25, %bb.31, %bb.28, %bb.27
%RSI178 = add i64 %RSI, 1
%147 = and i64 %RSI178, 255
%148 = call i64 @llvm.ctpop.i64(i64 %147)
%149 = and i64 %148, 1
%PF174 = icmp eq i64 %149, 0
%ZF175 = icmp eq i64 %RSI178, 0
%highbit176 = and i64 -9223372036854775808, %RSI178
%SF177 = icmp ne i64 %highbit176, 0
%memload179 = load i64, ptr @MAXPLAYERS, align 1
%150 = trunc i64 %memload179 to i32
%RAX180 = sext i32 %150 to i64
%151 = sub i64 %RSI178, %RAX180
%152 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RSI178, i64 %RAX180)
%CF181 = extractvalue { i64, i1 } %152, 1
%ZF182 = icmp eq i64 %151, 0
%highbit183 = and i64 -9223372036854775808, %151
%SF184 = icmp ne i64 %highbit183, 0
%153 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RSI178, i64 %RAX180)
%OF185 = extractvalue { i64, i1 } %153, 1
%154 = and i64 %151, 255
%155 = call i64 @llvm.ctpop.i64(i64 %154)
%156 = and i64 %155, 1
%PF186 = icmp eq i64 %156, 0
%CmpSFOF_JGE25 = icmp eq i1 %SF184, %OF185
store i64 %RSI178, ptr %RSI-SKT-LOC, align 1
br i1 %CmpSFOF_JGE25, label %bb.33, label %bb.27
bb.33: ; preds = %bb.26, %bb.22
%EDI187 = trunc i64 %RBX103 to i32
%157 = call ptr @WI_fragSum()
%RAX188 = ptrtoint ptr %157 to i64
%memload189 = load i64, ptr @dm_totals, align 1
%memref-idxreg190 = mul i64 4, %RBX103
%memref-basereg191 = add i64 %memload189, %memref-idxreg190
%158 = trunc i64 %RAX188 to i32
%159 = inttoptr i64 %memref-basereg191 to ptr
store i32 %158, ptr %159, align 1
%memload192 = load i64, ptr @playeringame, align 1
%160 = trunc i64 %RAX188 to i32
%161 = trunc i64 99 to i32
%162 = sub i32 %160, %161
%163 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %160, i32 %161)
%CF193 = extractvalue { i32, i1 } %163, 1
%ZF194 = icmp eq i32 %162, 0
%highbit195 = and i32 -2147483648, %162
%SF196 = icmp ne i32 %highbit195, 0
%164 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %160, i32 %161)
%OF197 = extractvalue { i32, i1 } %164, 1
%165 = and i32 %162, 255
%166 = call i32 @llvm.ctpop.i32(i32 %165)
%167 = and i32 %166, 1
%PF198 = icmp eq i32 %167, 0
store i32 99, ptr %ESI-SKT-LOC, align 1
%ZFCmp_JG26 = icmp eq i1 %ZF194, false
%SFOFCmp_JG27 = icmp eq i1 %SF196, %OF197
%ZFAndSFOF_JG28 = and i1 %ZFCmp_JG26, %SFOFCmp_JG27
store i64 %memload192, ptr %RCX-SKT-LOC, align 1
br i1 %ZFAndSFOF_JG28, label %bb.19, label %bb.34
bb.34: ; preds = %bb.33
%168 = trunc i64 %RAX188 to i32
%169 = trunc i64 -100 to i32
%170 = sub i32 %168, %169
%171 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %168, i32 %169)
%CF199 = extractvalue { i32, i1 } %171, 1
%ZF200 = icmp eq i32 %170, 0
%highbit201 = and i32 -2147483648, %170
%SF202 = icmp ne i32 %highbit201, 0
%172 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %168, i32 %169)
%OF203 = extractvalue { i32, i1 } %172, 1
%173 = and i32 %170, 255
%174 = call i32 @llvm.ctpop.i32(i32 %173)
%175 = and i32 %174, 1
%PF204 = icmp eq i32 %175, 0
store i32 -99, ptr %ESI-SKT-LOC, align 1
%CmpZF_JLE29 = icmp eq i1 %ZF200, true
%CmpOF_JLE30 = icmp ne i1 %SF202, %OF203
%ZFOrSF_JLE31 = or i1 %CmpZF_JLE29, %CmpOF_JLE30
br i1 %ZFOrSF_JLE31, label %bb.19, label %bb.35
bb.35: ; preds = %bb.34
br label %bb.20
bb.19: ; preds = %bb.34, %bb.33
%memref-idxreg205 = mul i64 4, %RBX103
%memref-basereg206 = add i64 %memload189, %memref-idxreg205
%ESI = load i32, ptr %ESI-SKT-LOC, align 1
%176 = inttoptr i64 %memref-basereg206 to ptr
store i32 %ESI, ptr %176, align 1
br label %bb.20
bb.20: ; preds = %bb.19, %bb.35, %bb.21
%RBX211 = add i64 %RBX103, 1
%177 = and i64 %RBX211, 255
%178 = call i64 @llvm.ctpop.i64(i64 %177)
%179 = and i64 %178, 1
%PF207 = icmp eq i64 %179, 0
%ZF208 = icmp eq i64 %RBX211, 0
%highbit209 = and i64 -9223372036854775808, %RBX211
%SF210 = icmp ne i64 %highbit209, 0
%memload212 = load i64, ptr @MAXPLAYERS, align 1
%180 = trunc i64 %memload212 to i32
%RAX213 = sext i32 %180 to i64
%181 = sub i64 %RBX211, %RAX213
%182 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RBX211, i64 %RAX213)
%CF214 = extractvalue { i64, i1 } %182, 1
%ZF215 = icmp eq i64 %181, 0
%highbit216 = and i64 -9223372036854775808, %181
%SF217 = icmp ne i64 %highbit216, 0
%183 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RBX211, i64 %RAX213)
%OF218 = extractvalue { i64, i1 } %183, 1
%184 = and i64 %181, 255
%185 = call i64 @llvm.ctpop.i64(i64 %184)
%186 = and i64 %185, 1
%PF219 = icmp eq i64 %186, 0
store i64 %RAX213, ptr %RAX-SKT-LOC2, align 1
%CmpSFOF_JGE32 = icmp eq i1 %SF217, %OF218
store i64 %RAX213, ptr %EAX-SKT-LOC, align 1
store i64 %RBX211, ptr %RBX-SKT-LOC102, align 1
br i1 %CmpSFOF_JGE32, label %bb.44, label %bb.21
bb.44: ; preds = %bb.20
%R13D = load i32, ptr %R13D-SKT-LOC, align 1
%187 = and i32 %R13D, %R13D
%highbit220 = and i32 -2147483648, %187
%SF221 = icmp ne i32 %highbit220, 0
%ZF222 = icmp eq i32 %187, 0
%188 = and i32 %187, 255
%189 = call i32 @llvm.ctpop.i32(i32 %188)
%190 = and i32 %189, 1
%PF223 = icmp eq i32 %190, 0
%191 = ptrtoint ptr @dm_state to i64
store i64 %191, ptr %RBX-SKT-LOC226, align 1
%CmpZF_JNE33 = icmp eq i1 %ZF222, false
br i1 %CmpZF_JNE33, label %bb.46, label %bb.45
bb.45: ; preds = %bb.44, %bb.17
%memload224 = load i32, ptr @sfx_barexp, align 1
%192 = call ptr @S_StartSound()
%RAX225 = ptrtoint ptr %192 to i64
%RBX227 = load i64, ptr %RBX-SKT-LOC226, align 1
%193 = inttoptr i64 %RBX227 to ptr
%memload228 = load i32, ptr %193, align 1
%194 = add i32 %memload228, 1
store i32 %194, ptr %193, align 4
store i64 %RAX225, ptr %RAX-SKT-LOC2, align 1
br label %bb.46
bb.41: ; preds = %bb.14
%195 = trunc i32 %memload1 to i8
%196 = and i8 %195, 1
%197 = call i8 @llvm.ctpop.i8(i8 %196)
%198 = and i8 %197, 1
%PF229 = icmp eq i8 %198, 0
%ZF230 = icmp eq i8 %196, 0
%highbit231 = and i8 -128, %196
%SF232 = icmp ne i8 %highbit231, 0
%CmpZF_JE34 = icmp eq i1 %ZF230, true
br i1 %CmpZF_JE34, label %bb.46, label %bb.42
bb.42: ; preds = %bb.41
%199 = bitcast ptr @cnt_pause to ptr
%memload233234 = load i64, ptr %199, align 1
store i64 %memload233234, ptr %199, align 8
%CmpZF_JNE35 = icmp eq i1 %ZF230, false
br i1 %CmpZF_JNE35, label %bb.46, label %bb.43
bb.43: ; preds = %bb.42
%EAX239 = add i32 %memload1, 1
%200 = and i32 %EAX239, 255
%201 = call i32 @llvm.ctpop.i32(i32 %200)
%202 = and i32 %201, 1
%PF235 = icmp eq i32 %202, 0
%ZF236 = icmp eq i32 %EAX239, 0
%highbit237 = and i32 -2147483648, %EAX239
%SF238 = icmp ne i32 %highbit237, 0
store i32 %EAX239, ptr @dm_state, align 1
%memload240 = load i64, ptr @TICRATE, align 1
store i64 %memload240, ptr @cnt_pause, align 1
store i64 %memload240, ptr %RAX-SKT-LOC2, align 1
br label %bb.46
bb.37: ; preds = %bb.36, %bb.13
%RCX242 = load i64, ptr %RCX-SKT-LOC241, align 1
%203 = and i64 %RCX242, %RCX242
%highbit243 = and i64 -9223372036854775808, %203
%SF244 = icmp ne i64 %highbit243, 0
%ZF245 = icmp eq i64 %203, 0
%204 = and i64 %203, 255
%205 = call i64 @llvm.ctpop.i64(i64 %204)
%206 = and i64 %205, 1
%PF246 = icmp eq i64 %206, 0
%CmpZF_JE36 = icmp eq i1 %ZF245, true
br i1 %CmpZF_JE36, label %bb.46, label %bb.38
bb.38: ; preds = %bb.37
%memload247 = load i32, ptr @sfx_slop, align 1
%207 = call ptr @S_StartSound()
%RAX248 = ptrtoint ptr %207 to i64
%memload249 = load i64, ptr @gamemode, align 1
%208 = load i64, ptr @commercial, align 8
%209 = sub i64 %memload249, %208
%210 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload249, i64 %208)
%CF250 = extractvalue { i64, i1 } %210, 1
%ZF251 = icmp eq i64 %209, 0
%highbit252 = and i64 -9223372036854775808, %209
%SF253 = icmp ne i64 %highbit252, 0
%211 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload249, i64 %208)
%OF254 = extractvalue { i64, i1 } %211, 1
%212 = and i64 %209, 255
%213 = call i64 @llvm.ctpop.i64(i64 %212)
%214 = and i64 %213, 1
%PF255 = icmp eq i64 %214, 0
%CmpZF_JNE37 = icmp eq i1 %ZF251, false
br i1 %CmpZF_JNE37, label %bb.40, label %bb.39
bb.39: ; preds = %bb.38
%215 = tail call ptr @WI_initNoState()
%RAX256 = ptrtoint ptr %215 to i64
br label %UnifiedReturnBlock
bb.40: ; preds = %bb.38
%216 = tail call ptr @WI_initShowNextLoc()
%RAX1 = ptrtoint ptr %216 to i64
br label %UnifiedReturnBlock
bb.46: ; preds = %bb.45, %bb.37, %bb.43, %bb.42, %bb.41, %bb.44
%RAX3 = load i64, ptr %RAX-SKT-LOC2, align 1
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.46, %bb.40, %bb.39
%UnifiedRetVal = phi i64 [ %RAX256, %bb.39 ], [ %RAX1, %bb.40 ], [ %RAX3, %bb.46 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/DOOM/linuxdoom-1.10/extr_wi_stuff.c_WI_updateDeathmatchStats.c'
source_filename = "AnghaBench/DOOM/linuxdoom-1.10/extr_wi_stuff.c_WI_updateDeathmatchStats.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { ptr }
@acceleratestage = common local_unnamed_addr global i64 0, align 8
@dm_state = common local_unnamed_addr global i32 0, align 4
@MAXPLAYERS = common local_unnamed_addr global i32 0, align 4
@playeringame = common local_unnamed_addr global ptr null, align 8
@plrs = common local_unnamed_addr global ptr null, align 8
@dm_frags = common local_unnamed_addr global ptr null, align 8
@dm_totals = common local_unnamed_addr global ptr null, align 8
@sfx_barexp = common local_unnamed_addr global i32 0, align 4
@bcnt = common local_unnamed_addr global i32 0, align 4
@sfx_pistol = common local_unnamed_addr global i32 0, align 4
@sfx_slop = common local_unnamed_addr global i32 0, align 4
@gamemode = common local_unnamed_addr global i64 0, align 8
@commercial = common local_unnamed_addr global i64 0, align 8
@cnt_pause = common local_unnamed_addr global i64 0, align 8
@TICRATE = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @WI_updateDeathmatchStats() local_unnamed_addr #0 {
%1 = tail call i32 @WI_updateAnimatedBack() #2
%2 = load i64, ptr @acceleratestage, align 8, !tbaa !6
%3 = icmp ne i64 %2, 0
%4 = load i32, ptr @dm_state, align 4
%5 = icmp ne i32 %4, 4
%6 = select i1 %3, i1 %5, i1 false
br i1 %6, label %7, label %61
7: ; preds = %0
store i64 0, ptr @acceleratestage, align 8, !tbaa !6
%8 = load i32, ptr @MAXPLAYERS, align 4, !tbaa !10
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %57
10: ; preds = %7
%11 = load ptr, ptr @playeringame, align 8, !tbaa !12
br label %12
12: ; preds = %10, %51
%13 = phi i32 [ %8, %10 ], [ %52, %51 ]
%14 = phi ptr [ %11, %10 ], [ %53, %51 ]
%15 = phi i64 [ 0, %10 ], [ %54, %51 ]
%16 = getelementptr inbounds i64, ptr %14, i64 %15
%17 = load i64, ptr %16, align 8, !tbaa !6
%18 = icmp eq i64 %17, 0
br i1 %18, label %51, label %19
19: ; preds = %12
%20 = icmp sgt i32 %13, 0
br i1 %20, label %21, label %44
21: ; preds = %19
%22 = load ptr, ptr @plrs, align 8
%23 = getelementptr inbounds %struct.TYPE_2__, ptr %22, i64 %15
%24 = load ptr, ptr @dm_frags, align 8
%25 = getelementptr inbounds ptr, ptr %24, i64 %15
br label %26
26: ; preds = %21, %39
%27 = phi i32 [ %13, %21 ], [ %40, %39 ]
%28 = phi i64 [ 0, %21 ], [ %41, %39 ]
%29 = getelementptr inbounds i64, ptr %14, i64 %28
%30 = load i64, ptr %29, align 8, !tbaa !6
%31 = icmp eq i64 %30, 0
br i1 %31, label %39, label %32
32: ; preds = %26
%33 = load ptr, ptr %23, align 8, !tbaa !14
%34 = getelementptr inbounds i32, ptr %33, i64 %28
%35 = load i32, ptr %34, align 4, !tbaa !10
%36 = load ptr, ptr %25, align 8, !tbaa !12
%37 = getelementptr inbounds i32, ptr %36, i64 %28
store i32 %35, ptr %37, align 4, !tbaa !10
%38 = load i32, ptr @MAXPLAYERS, align 4, !tbaa !10
br label %39
39: ; preds = %26, %32
%40 = phi i32 [ %27, %26 ], [ %38, %32 ]
%41 = add nuw nsw i64 %28, 1
%42 = sext i32 %40 to i64
%43 = icmp slt i64 %41, %42
br i1 %43, label %26, label %44, !llvm.loop !16
44: ; preds = %39, %19
%45 = trunc nuw nsw i64 %15 to i32
%46 = tail call i32 @WI_fragSum(i32 noundef %45) #2
%47 = load ptr, ptr @dm_totals, align 8, !tbaa !12
%48 = getelementptr inbounds i32, ptr %47, i64 %15
store i32 %46, ptr %48, align 4, !tbaa !10
%49 = load ptr, ptr @playeringame, align 8, !tbaa !12
%50 = load i32, ptr @MAXPLAYERS, align 4, !tbaa !10
br label %51
51: ; preds = %12, %44
%52 = phi i32 [ %13, %12 ], [ %50, %44 ]
%53 = phi ptr [ %14, %12 ], [ %49, %44 ]
%54 = add nuw nsw i64 %15, 1
%55 = sext i32 %52 to i64
%56 = icmp slt i64 %54, %55
br i1 %56, label %12, label %57, !llvm.loop !18
57: ; preds = %51, %7
%58 = load i32, ptr @sfx_barexp, align 4, !tbaa !10
%59 = tail call i32 @S_StartSound(i32 noundef 0, i32 noundef %58) #2
store i32 4, ptr @dm_state, align 4, !tbaa !10
%60 = load i64, ptr @acceleratestage, align 8, !tbaa !6
br label %144
61: ; preds = %0
switch i32 %4, label %157 [
i32 2, label %62
i32 4, label %144
]
62: ; preds = %61
%63 = load i32, ptr @bcnt, align 4, !tbaa !10
%64 = and i32 %63, 3
%65 = icmp eq i32 %64, 0
br i1 %65, label %66, label %69
66: ; preds = %62
%67 = load i32, ptr @sfx_pistol, align 4, !tbaa !10
%68 = tail call i32 @S_StartSound(i32 noundef 0, i32 noundef %67) #2
br label %69
69: ; preds = %66, %62
%70 = load i32, ptr @MAXPLAYERS, align 4, !tbaa !10
%71 = icmp sgt i32 %70, 0
br i1 %71, label %72, label %139
72: ; preds = %69
%73 = load ptr, ptr @playeringame, align 8, !tbaa !12
br label %74
74: ; preds = %72, %130
%75 = phi i32 [ %70, %72 ], [ %134, %130 ]
%76 = phi ptr [ %73, %72 ], [ %131, %130 ]
%77 = phi i64 [ 0, %72 ], [ %133, %130 ]
%78 = phi i32 [ 0, %72 ], [ %132, %130 ]
%79 = getelementptr inbounds i64, ptr %76, i64 %77
%80 = load i64, ptr %79, align 8, !tbaa !6
%81 = icmp eq i64 %80, 0
br i1 %81, label %130, label %82
82: ; preds = %74
%83 = icmp sgt i32 %75, 0
br i1 %83, label %84, label %118
84: ; preds = %82
%85 = load ptr, ptr @dm_frags, align 8
%86 = getelementptr inbounds ptr, ptr %85, i64 %77
%87 = load ptr, ptr @plrs, align 8
%88 = getelementptr inbounds %struct.TYPE_2__, ptr %87, i64 %77
br label %89
89: ; preds = %84, %112
%90 = phi i64 [ 0, %84 ], [ %114, %112 ]
%91 = phi i32 [ %78, %84 ], [ %113, %112 ]
%92 = getelementptr inbounds i64, ptr %76, i64 %90
%93 = load i64, ptr %92, align 8, !tbaa !6
%94 = icmp eq i64 %93, 0
br i1 %94, label %112, label %95
95: ; preds = %89
%96 = load ptr, ptr %86, align 8, !tbaa !12
%97 = getelementptr inbounds i32, ptr %96, i64 %90
%98 = load i32, ptr %97, align 4, !tbaa !10
%99 = load ptr, ptr %88, align 8, !tbaa !14
%100 = getelementptr inbounds i32, ptr %99, i64 %90
%101 = load i32, ptr %100, align 4, !tbaa !10
%102 = icmp eq i32 %98, %101
br i1 %102, label %112, label %103
103: ; preds = %95
%104 = icmp sgt i32 %101, -1
%105 = select i1 %104, i32 1, i32 -1
%106 = add nsw i32 %105, %98
store i32 %106, ptr %97, align 4, !tbaa !10
%107 = icmp sgt i32 %106, 99
br i1 %107, label %110, label %108
108: ; preds = %103
%109 = icmp slt i32 %106, -99
br i1 %109, label %110, label %112
110: ; preds = %108, %103
%111 = phi i32 [ 99, %103 ], [ -99, %108 ]
store i32 %111, ptr %97, align 4, !tbaa !10
br label %112
112: ; preds = %110, %108, %89, %95
%113 = phi i32 [ %91, %95 ], [ %91, %89 ], [ 1, %108 ], [ 1, %110 ]
%114 = add nuw nsw i64 %90, 1
%115 = load i32, ptr @MAXPLAYERS, align 4, !tbaa !10
%116 = sext i32 %115 to i64
%117 = icmp slt i64 %114, %116
br i1 %117, label %89, label %118, !llvm.loop !19
118: ; preds = %112, %82
%119 = phi i32 [ %78, %82 ], [ %113, %112 ]
%120 = trunc nuw nsw i64 %77 to i32
%121 = tail call i32 @WI_fragSum(i32 noundef %120) #2
%122 = load ptr, ptr @dm_totals, align 8, !tbaa !12
%123 = getelementptr inbounds i32, ptr %122, i64 %77
store i32 %121, ptr %123, align 4, !tbaa !10
%124 = icmp sgt i32 %121, 99
%125 = load ptr, ptr @playeringame, align 8, !tbaa !12
br i1 %124, label %128, label %126
126: ; preds = %118
%127 = icmp slt i32 %121, -99
br i1 %127, label %128, label %130
128: ; preds = %126, %118
%129 = phi i32 [ 99, %118 ], [ -99, %126 ]
store i32 %129, ptr %123, align 4, !tbaa !10
br label %130
130: ; preds = %128, %74, %126
%131 = phi ptr [ %125, %126 ], [ %76, %74 ], [ %125, %128 ]
%132 = phi i32 [ %119, %126 ], [ %78, %74 ], [ %119, %128 ]
%133 = add nuw nsw i64 %77, 1
%134 = load i32, ptr @MAXPLAYERS, align 4, !tbaa !10
%135 = sext i32 %134 to i64
%136 = icmp slt i64 %133, %135
br i1 %136, label %74, label %137, !llvm.loop !20
137: ; preds = %130
%138 = icmp eq i32 %132, 0
br i1 %138, label %139, label %167
139: ; preds = %69, %137
%140 = load i32, ptr @sfx_barexp, align 4, !tbaa !10
%141 = tail call i32 @S_StartSound(i32 noundef 0, i32 noundef %140) #2
%142 = load i32, ptr @dm_state, align 4, !tbaa !10
%143 = add nsw i32 %142, 1
store i32 %143, ptr @dm_state, align 4, !tbaa !10
br label %167
144: ; preds = %57, %61
%145 = phi i64 [ %60, %57 ], [ %2, %61 ]
%146 = icmp eq i64 %145, 0
br i1 %146, label %167, label %147
147: ; preds = %144
%148 = load i32, ptr @sfx_slop, align 4, !tbaa !10
%149 = tail call i32 @S_StartSound(i32 noundef 0, i32 noundef %148) #2
%150 = load i64, ptr @gamemode, align 8, !tbaa !6
%151 = load i64, ptr @commercial, align 8, !tbaa !6
%152 = icmp eq i64 %150, %151
br i1 %152, label %153, label %155
153: ; preds = %147
%154 = tail call i32 @WI_initNoState() #2
br label %167
155: ; preds = %147
%156 = tail call i32 @WI_initShowNextLoc() #2
br label %167
157: ; preds = %61
%158 = and i32 %4, 1
%159 = icmp eq i32 %158, 0
br i1 %159, label %167, label %160
160: ; preds = %157
%161 = load i64, ptr @cnt_pause, align 8, !tbaa !6
%162 = add nsw i64 %161, -1
store i64 %162, ptr @cnt_pause, align 8, !tbaa !6
%163 = icmp eq i64 %162, 0
br i1 %163, label %164, label %167
164: ; preds = %160
%165 = add nsw i32 %4, 1
store i32 %165, ptr @dm_state, align 4, !tbaa !10
%166 = load i64, ptr @TICRATE, align 8, !tbaa !6
store i64 %166, ptr @cnt_pause, align 8, !tbaa !6
br label %167
167: ; preds = %153, %155, %144, %160, %164, %157, %137, %139
ret void
}
declare i32 @WI_updateAnimatedBack(...) local_unnamed_addr #1
declare i32 @WI_fragSum(i32 noundef) local_unnamed_addr #1
declare i32 @S_StartSound(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @WI_initNoState(...) local_unnamed_addr #1
declare i32 @WI_initShowNextLoc(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"TYPE_2__", !13, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = distinct !{!18, !17}
!19 = distinct !{!19, !17}
!20 = distinct !{!20, !17}
| DOOM_linuxdoom-1.10_extr_wi_stuff.c_WI_updateDeathmatchStats |
; ModuleID = 'postgres_src_bin_pg_dump_extr_pg_backup_utils.c_exit_nicely.so'
source_filename = "postgres_src_bin_pg_dump_extr_pg_backup_utils.c_exit_nicely.so"
@on_exit_nicely_index = common dso_local global i32 0, align 4
@on_exit_nicely_list = common dso_local global i64 0, align 8
declare dso_local void @exit(i32)
define dso_local void @exit_nicely(i32 %arg1) {
entry:
%RBX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memload = load i32, ptr @on_exit_nicely_index, align 1
%0 = and i32 %memload, %memload
%highbit = and i32 -2147483648, %0
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %0, 0
%1 = and i32 %0, 255
%2 = call i32 @llvm.ctpop.i32(i32 %1)
%3 = and i32 %2, 1
%PF = icmp eq i32 %3, 0
%CmpZF_JLE = icmp eq i1 %ZF, true
%CmpOF_JLE = icmp ne i1 %SF, false
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
br i1 %ZFOrSF_JLE, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%4 = zext i32 %memload to i64
%RBX = add i64 %4, 1
%5 = and i64 %RBX, 255
%6 = call i64 @llvm.ctpop.i64(i64 %5)
%7 = and i64 %6, 1
%PF1 = icmp eq i64 %7, 0
%ZF2 = icmp eq i64 %RBX, 0
%highbit3 = and i64 -9223372036854775808, %RBX
%SF4 = icmp ne i64 %highbit3, 0
store i64 %RBX, ptr %RBX-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.2
%RBX5 = load i64, ptr %RBX-SKT-LOC, align 1
%memref-disp = add i64 %RBX5, -2
%EAX = trunc i64 %memref-disp to i32
%memload6 = load i64, ptr @on_exit_nicely_list, align 1
%8 = zext i32 %EAX to i64
%RAX = shl i64 %8, 4
%ZF7 = icmp eq i64 %RAX, 0
%highbit8 = and i64 -9223372036854775808, %RAX
%SF9 = icmp ne i64 %highbit8, 0
%memref-basereg = add i64 %memload6, %RAX
%9 = inttoptr i64 %memref-basereg to ptr
%memload10 = load i32, ptr %9, align 1
%memref-basereg11 = add i64 %memload6, %RAX
%memref-disp12 = add i64 %memref-basereg11, 8
%10 = inttoptr i64 %memref-disp12 to ptr
%memload13 = load i64, ptr %10, align 1
%11 = inttoptr i64 %memload13 to ptr
call void %11(i32 %arg1, i32 %memload10)
%RBX18 = sub i64 %RBX5, 1
%12 = and i64 %RBX18, 255
%13 = call i64 @llvm.ctpop.i64(i64 %12)
%14 = and i64 %13, 1
%PF14 = icmp eq i64 %14, 0
%ZF15 = icmp eq i64 %RBX18, 0
%highbit16 = and i64 -9223372036854775808, %RBX18
%SF17 = icmp ne i64 %highbit16, 0
%15 = sub i64 %RBX18, 1
%16 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RBX18, i64 1)
%CF = extractvalue { i64, i1 } %16, 1
%ZF19 = icmp eq i64 %15, 0
%highbit20 = and i64 -9223372036854775808, %15
%SF21 = icmp ne i64 %highbit20, 0
%17 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RBX18, i64 1)
%OF = extractvalue { i64, i1 } %17, 1
%18 = and i64 %15, 255
%19 = call i64 @llvm.ctpop.i64(i64 %18)
%20 = and i64 %19, 1
%PF22 = icmp eq i64 %20, 0
%CFCmp_JA = icmp eq i1 %CF, false
%ZFCmp_JA = icmp eq i1 %ZF19, false
%CFAndZF_JA = and i1 %ZFCmp_JA, %CFCmp_JA
store i64 %RBX18, ptr %RBX-SKT-LOC, align 1
br i1 %CFAndZF_JA, label %bb.2, label %bb.3
bb.3: ; preds = %bb.2, %entry
tail call void @exit(i32 %arg1)
unreachable
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/postgres/src/bin/pg_dump/extr_pg_backup_utils.c_exit_nicely.c'
source_filename = "AnghaBench/postgres/src/bin/pg_dump/extr_pg_backup_utils.c_exit_nicely.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32, ptr }
@on_exit_nicely_index = common local_unnamed_addr global i32 0, align 4
@on_exit_nicely_list = common local_unnamed_addr global ptr null, align 8
@mainThreadId = common local_unnamed_addr global i64 0, align 8
@parallel_init_done = common local_unnamed_addr global i64 0, align 8
; Function Attrs: noreturn nounwind ssp uwtable(sync)
define void @exit_nicely(i32 noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @on_exit_nicely_index, align 4, !tbaa !6
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %16
4: ; preds = %1
%5 = zext nneg i32 %2 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ %5, %4 ], [ %8, %6 ]
%8 = add nsw i64 %7, -1
%9 = load ptr, ptr @on_exit_nicely_list, align 8, !tbaa !10
%10 = getelementptr inbounds %struct.TYPE_2__, ptr %9, i64 %8
%11 = getelementptr inbounds i8, ptr %10, i64 8
%12 = load ptr, ptr %11, align 8, !tbaa !12
%13 = load i32, ptr %10, align 8, !tbaa !14
%14 = tail call i32 %12(i32 noundef %0, i32 noundef %13) #2
%15 = icmp ugt i64 %7, 1
br i1 %15, label %6, label %16, !llvm.loop !15
16: ; preds = %6, %1
%17 = tail call i32 @exit(i32 noundef %0) #3
unreachable
}
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #1
attributes #0 = { noreturn nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { noreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
attributes #3 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !11, i64 8}
!13 = !{!"TYPE_2__", !7, i64 0, !11, i64 8}
!14 = !{!13, !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| postgres_src_bin_pg_dump_extr_pg_backup_utils.c_exit_nicely |
; ModuleID = 'Quake-III-Arena_code_game_extr_g_items.c_Pickup_Holdable.so'
source_filename = "Quake-III-Arena_code_game_extr_g_items.c_Pickup_Holdable.so"
@bg_itemlist = common dso_local global i32 0, align 4
@STAT_HOLDABLE_ITEM = common dso_local global i64 0, align 8
@HI_KAMIKAZE = common dso_local global i64 0, align 8
@EF_KAMIKAZE = common dso_local global i32 0, align 4
@RESPAWN_HOLDABLE = common dso_local global i32 0, align 4
define dso_local i32 @Pickup_Holdable(i64 %arg1, i64 %arg2) {
entry:
%memref-disp = add i64 %arg1, 8
%0 = inttoptr i64 %memref-disp to ptr
%memload = load i64, ptr %0, align 1
%memload1 = load i64, ptr @bg_itemlist, align 1
%1 = trunc i64 %memload1 to i32
%RCX = sext i32 %1 to i64
%RCX2 = shl i64 %RCX, 3
%ZF = icmp eq i64 %RCX2, 0
%highbit = and i64 -9223372036854775808, %RCX2
%SF = icmp ne i64 %highbit, 0
%RAX = sub i64 %memload, %RCX2
%2 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload, i64 %RCX2)
%CF = extractvalue { i64, i1 } %2, 1
%ZF3 = icmp eq i64 %RAX, 0
%highbit4 = and i64 -9223372036854775808, %RAX
%SF5 = icmp ne i64 %highbit4, 0
%3 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload, i64 %RCX2)
%OF = extractvalue { i64, i1 } %3, 1
%4 = and i64 %RAX, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
%7 = inttoptr i64 %arg2 to ptr
%memload6 = load i64, ptr %7, align 1
%memref-disp7 = add i64 %memload6, 8
%8 = inttoptr i64 %memref-disp7 to ptr
%memload8 = load i64, ptr %8, align 1
%memload9 = load i64, ptr @STAT_HOLDABLE_ITEM, align 1
%memref-idxreg = mul i64 8, %memload9
%memref-basereg = add i64 %memload8, %memref-idxreg
%9 = inttoptr i64 %memref-basereg to ptr
store i64 %RAX, ptr %9, align 1
%memref-disp10 = add i64 %arg1, 8
%10 = inttoptr i64 %memref-disp10 to ptr
%memload11 = load i64, ptr %10, align 1
%11 = inttoptr i64 %memload11 to ptr
%memload12 = load i64, ptr %11, align 1
%12 = load i64, ptr @HI_KAMIKAZE, align 8
%13 = sub i64 %memload12, %12
%14 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload12, i64 %12)
%CF13 = extractvalue { i64, i1 } %14, 1
%ZF14 = icmp eq i64 %13, 0
%highbit15 = and i64 -9223372036854775808, %13
%SF16 = icmp ne i64 %highbit15, 0
%15 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload12, i64 %12)
%OF17 = extractvalue { i64, i1 } %15, 1
%16 = and i64 %13, 255
%17 = call i64 @llvm.ctpop.i64(i64 %16)
%18 = and i64 %17, 1
%PF18 = icmp eq i64 %18, 0
%CmpZF_JNE = icmp eq i1 %ZF14, false
br i1 %CmpZF_JNE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%memload19 = load i32, ptr @EF_KAMIKAZE, align 1
%19 = inttoptr i64 %arg2 to ptr
%memload20 = load i64, ptr %19, align 1
%20 = inttoptr i64 %memload20 to ptr
%21 = load i32, ptr %20, align 1
%22 = or i32 %21, %memload19
%23 = and i32 %22, 255
%24 = call i32 @llvm.ctpop.i32(i32 %23)
%25 = and i32 %24, 1
%PF21 = icmp eq i32 %25, 0
store i32 %22, ptr %20, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %entry
%memload22 = load i32, ptr @RESPAWN_HOLDABLE, align 1
ret i32 %memload22
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/Quake-III-Arena/code/game/extr_g_items.c_Pickup_Holdable.c'
source_filename = "AnghaBench/Quake-III-Arena/code/game/extr_g_items.c_Pickup_Holdable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_7__ = type { i64 }
@bg_itemlist = common local_unnamed_addr global i32 0, align 4
@STAT_HOLDABLE_ITEM = common local_unnamed_addr global i64 0, align 8
@HI_KAMIKAZE = common local_unnamed_addr global i64 0, align 8
@EF_KAMIKAZE = common local_unnamed_addr global i32 0, align 4
@RESPAWN_HOLDABLE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync)
define i32 @Pickup_Holdable(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load i32, ptr @bg_itemlist, align 4, !tbaa !11
%6 = sext i32 %5 to i64
%7 = sub nsw i64 0, %6
%8 = getelementptr inbounds %struct.TYPE_7__, ptr %4, i64 %7
%9 = load ptr, ptr %1, align 8, !tbaa !13
%10 = getelementptr inbounds i8, ptr %9, i64 8
%11 = load ptr, ptr %10, align 8, !tbaa !14
%12 = load i64, ptr @STAT_HOLDABLE_ITEM, align 8, !tbaa !17
%13 = getelementptr inbounds ptr, ptr %11, i64 %12
store ptr %8, ptr %13, align 8, !tbaa !19
%14 = load ptr, ptr %3, align 8, !tbaa !6
%15 = load i64, ptr %14, align 8, !tbaa !20
%16 = load i64, ptr @HI_KAMIKAZE, align 8, !tbaa !17
%17 = icmp eq i64 %15, %16
br i1 %17, label %18, label %23
18: ; preds = %2
%19 = load i32, ptr @EF_KAMIKAZE, align 4, !tbaa !11
%20 = load ptr, ptr %1, align 8, !tbaa !13
%21 = load i32, ptr %20, align 8, !tbaa !22
%22 = or i32 %21, %19
store i32 %22, ptr %20, align 8, !tbaa !22
br label %23
23: ; preds = %18, %2
%24 = load i32, ptr @RESPAWN_HOLDABLE, align 4, !tbaa !11
ret i32 %24
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"TYPE_10__", !8, i64 0, !8, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!15, !8, i64 8}
!15 = !{!"TYPE_9__", !16, i64 0}
!16 = !{!"TYPE_8__", !12, i64 0, !8, i64 8}
!17 = !{!18, !18, i64 0}
!18 = !{!"long", !9, i64 0}
!19 = !{!8, !8, i64 0}
!20 = !{!21, !18, i64 0}
!21 = !{!"TYPE_7__", !18, i64 0}
!22 = !{!15, !12, i64 0}
| Quake-III-Arena_code_game_extr_g_items.c_Pickup_Holdable |
; ModuleID = 'qmk_firmware_keyboards_40percentclub_6lit_keymaps_macro_extr_keymap.c_process_record_user.so'
source_filename = "qmk_firmware_keyboards_40percentclub_6lit_keymaps_macro_extr_keymap.c_process_record_user.so"
define dso_local i32 @process_record_user() {
entry:
ret i32 1
}
| ; ModuleID = 'AnghaBench/qmk_firmware/keyboards/40percentclub/6lit/keymaps/macro/extr_keymap.c_process_record_user.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/40percentclub/6lit/keymaps/macro/extr_keymap.c_process_record_user.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef i32 @process_record_user(i32 noundef %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 {
ret i32 1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| qmk_firmware_keyboards_40percentclub_6lit_keymaps_macro_extr_keymap.c_process_record_user |
; ModuleID = 'fastsocket_kernel_sound_isa_msnd_extr_msnd_midi.c_snd_msndmidi_input_open.so'
source_filename = "fastsocket_kernel_sound_isa_msnd_extr_msnd_midi.c_snd_msndmidi_input_open.so"
@rodata_13 = private unnamed_addr constant [27 x i8] c"snd_msndmidi_input_open()\0A\00", align 1, !ROData_SecInfo !0
@HDEX_MIDI_IN_START = common dso_local global i32 0, align 4
@MSNDMIDI_MODE_BIT_INPUT = common dso_local global i32 0, align 4
declare dso_local ptr @snd_printdd()
declare dso_local ptr @snd_msnd_enable_irq()
declare dso_local ptr @snd_msnd_send_dsp_cmd()
declare dso_local ptr @set_bit()
define dso_local i32 @snd_msndmidi_input_open(i64 %arg1) {
entry:
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%RDI = ptrtoint ptr @rodata_13 to i64
%1 = call ptr @snd_printdd()
%RAX = ptrtoint ptr %1 to i64
%2 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %2, align 1
%3 = inttoptr i64 %memload to ptr
%memload1 = load i64, ptr %3, align 1
%memref-disp = add i64 %memload1, 8
%4 = inttoptr i64 %memref-disp to ptr
store i64 %arg1, ptr %4, align 1
%memref-disp2 = add i64 %memload1, 4
%5 = inttoptr i64 %memref-disp2 to ptr
%memload3 = load i32, ptr %5, align 1
%6 = call ptr @snd_msnd_enable_irq()
%RAX4 = ptrtoint ptr %6 to i64
%memref-disp5 = add i64 %memload1, 4
%7 = inttoptr i64 %memref-disp5 to ptr
%memload6 = load i32, ptr %7, align 1
%memload7 = load i32, ptr @HDEX_MIDI_IN_START, align 1
%8 = call ptr @snd_msnd_send_dsp_cmd()
%RAX8 = ptrtoint ptr %8 to i64
%memload9 = load i32, ptr @MSNDMIDI_MODE_BIT_INPUT, align 1
%9 = call ptr @set_bit()
%RAX10 = ptrtoint ptr %9 to i64
ret i32 0
}
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/sound/isa/msnd/extr_msnd_midi.c_snd_msndmidi_input_open.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/isa/msnd/extr_msnd_midi.c_snd_msndmidi_input_open.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [27 x i8] c"snd_msndmidi_input_open()\0A\00", align 1
@HDEX_MIDI_IN_START = common local_unnamed_addr global i32 0, align 4
@MSNDMIDI_MODE_BIT_INPUT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @snd_msndmidi_input_open], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @snd_msndmidi_input_open(ptr noundef %0) #0 {
%2 = tail call i32 @snd_printdd(ptr noundef nonnull @.str) #2
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load ptr, ptr %3, align 8, !tbaa !11
%5 = getelementptr inbounds i8, ptr %4, i64 8
store ptr %0, ptr %5, align 8, !tbaa !13
%6 = getelementptr inbounds i8, ptr %4, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !16
%8 = tail call i32 @snd_msnd_enable_irq(i32 noundef %7) #2
%9 = load i32, ptr %6, align 4, !tbaa !16
%10 = load i32, ptr @HDEX_MIDI_IN_START, align 4, !tbaa !17
%11 = tail call i32 @snd_msnd_send_dsp_cmd(i32 noundef %9, i32 noundef %10) #2
%12 = load i32, ptr @MSNDMIDI_MODE_BIT_INPUT, align 4, !tbaa !17
%13 = tail call i32 @set_bit(i32 noundef %12, ptr noundef %4) #2
ret i32 0
}
declare i32 @snd_printdd(ptr noundef) local_unnamed_addr #1
declare i32 @snd_msnd_enable_irq(i32 noundef) local_unnamed_addr #1
declare i32 @snd_msnd_send_dsp_cmd(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"snd_rawmidi_substream", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_2__", !8, i64 0}
!13 = !{!14, !8, i64 8}
!14 = !{!"snd_msndmidi", !15, i64 0, !15, i64 4, !8, i64 8}
!15 = !{!"int", !9, i64 0}
!16 = !{!14, !15, i64 4}
!17 = !{!15, !15, i64 0}
| fastsocket_kernel_sound_isa_msnd_extr_msnd_midi.c_snd_msndmidi_input_open |
; ModuleID = 'fastsocket_kernel_drivers_sn_extr_ioc3.c_ioc3_ack.so'
source_filename = "fastsocket_kernel_drivers_sn_extr_ioc3.c_ioc3_ack.so"
declare dso_local ptr @writel()
define dso_local i64 @ioc3_ack(i64 %arg1, i64 %arg2, i32 %arg3) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
%EDX = and i32 %arg3, %memload
%1 = and i32 %EDX, 255
%2 = call i32 @llvm.ctpop.i32(i32 %1)
%3 = and i32 %2, 1
%PF = icmp eq i32 %3, 0
%4 = inttoptr i64 %arg2 to ptr
%memload1 = load i64, ptr %4, align 1
%5 = tail call ptr @writel()
%RAX = ptrtoint ptr %5 to i64
ret i64 %RAX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/sn/extr_ioc3.c_ioc3_ack.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/sn/extr_ioc3.c_ioc3_ack.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @ioc3_ack(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr %0, align 4, !tbaa !6
%5 = and i32 %4, %2
%6 = load ptr, ptr %1, align 8, !tbaa !11
%7 = tail call i32 @writel(i32 noundef %5, ptr noundef %6) #2
ret void
}
declare i32 @writel(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ioc3_submodule", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"ioc3_driver_data", !13, i64 0}
!13 = !{!"any pointer", !9, i64 0}
| fastsocket_kernel_drivers_sn_extr_ioc3.c_ioc3_ack |
; ModuleID = 'linux_drivers_scsi_csiostor_extr_csio_defs.h_csio_get_state.so'
source_filename = "linux_drivers_scsi_csiostor_extr_csio_defs.h_csio_get_state.so"
define dso_local i32 @csio_get_state(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
ret i32 %memload
}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/csiostor/extr_csio_defs.h_csio_get_state.c'
source_filename = "AnghaBench/linux/drivers/scsi/csiostor/extr_csio_defs.h_csio_get_state.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @csio_get_state], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal i32 @csio_get_state(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
ret i32 %2
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"csio_sm", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_scsi_csiostor_extr_csio_defs.h_csio_get_state |
; ModuleID = 'openssl_ssl_extr_ssl_lib.c_SSL_get_wfd.so'
source_filename = "openssl_ssl_extr_ssl_lib.c_SSL_get_wfd.so"
@BIO_TYPE_DESCRIPTOR = common dso_local global i32 0, align 4
declare dso_local ptr @SSL_get_wbio()
declare dso_local ptr @BIO_find_type()
declare dso_local ptr @BIO_get_fd()
define dso_local i32 @SSL_get_wfd() {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%0 = ptrtoint ptr %RSP_P.0 to i64
%1 = add i64 %0, 4
%2 = inttoptr i64 %1 to ptr
store i32 -1, ptr %2, align 1
%3 = call ptr @SSL_get_wbio()
%RAX = ptrtoint ptr %3 to i64
%memload = load i32, ptr @BIO_TYPE_DESCRIPTOR, align 1
%4 = call ptr @BIO_find_type()
%RAX1 = ptrtoint ptr %4 to i64
%5 = and i64 %RAX1, %RAX1
%highbit = and i64 -9223372036854775808, %5
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %5, 0
%6 = and i64 %5, 255
%7 = call i64 @llvm.ctpop.i64(i64 %6)
%8 = and i64 %7, 1
%PF = icmp eq i64 %8, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%9 = ptrtoint ptr %RSP_P.0 to i64
%RSI = add i64 %9, 4
%10 = call ptr @BIO_get_fd()
%RAX2 = ptrtoint ptr %10 to i64
%11 = ptrtoint ptr %RSP_P.0 to i64
%12 = add i64 %11, 4
%13 = inttoptr i64 %12 to ptr
%memload3 = load i32, ptr %13, align 1
br label %UnifiedReturnBlock
bb.2: ; preds = %entry
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.2, %bb.1
%UnifiedRetVal = phi i32 [ %memload3, %bb.1 ], [ -1, %bb.2 ]
ret i32 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/openssl/ssl/extr_ssl_lib.c_SSL_get_wfd.c'
source_filename = "AnghaBench/openssl/ssl/extr_ssl_lib.c_SSL_get_wfd.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BIO_TYPE_DESCRIPTOR = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @SSL_get_wfd(ptr noundef %0) local_unnamed_addr #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
store i32 -1, ptr %2, align 4, !tbaa !6
%3 = tail call ptr @SSL_get_wbio(ptr noundef %0) #3
%4 = load i32, ptr @BIO_TYPE_DESCRIPTOR, align 4, !tbaa !6
%5 = tail call ptr @BIO_find_type(ptr noundef %3, i32 noundef %4) #3
%6 = icmp eq ptr %5, null
br i1 %6, label %10, label %7
7: ; preds = %1
%8 = call i32 @BIO_get_fd(ptr noundef nonnull %5, ptr noundef nonnull %2) #3
%9 = load i32, ptr %2, align 4, !tbaa !6
br label %10
10: ; preds = %7, %1
%11 = phi i32 [ %9, %7 ], [ -1, %1 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %11
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @SSL_get_wbio(ptr noundef) local_unnamed_addr #2
declare ptr @BIO_find_type(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BIO_get_fd(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| openssl_ssl_extr_ssl_lib.c_SSL_get_wfd |
; ModuleID = 'exploitdb_exploits_windows_local_extr_20081.c_main.so'
source_filename = "exploitdb_exploits_windows_local_extr_20081.c_main.so"
@BUF_SIZE = common dso_local global i32 0, align 4
@UID_SIZE = common dso_local global i32 0, align 4
@PASS_CIPHER_SIZE = common dso_local global i32 0, align 4
@PASS_PLAIN_SIZE = common dso_local global i32 0, align 4
@0 = private unnamed_addr constant [260 x i8] c"jnetz.prop\00ProfUID=\00UserID: %s\00ProfPWD=\00Encrypted Password: %s\00Plain Text Password: %s\0A\00\0ANet Zero Password Decryptor\00Brian Carrier [bcarrier@atstake.com]\00@Stake L0pht Research Labs\00http://www.atstake.com\0A\00Invalid jnetz.prop file\00Unable to find jnetz.prop file\00", align 1, !ROData_SecInfo !0
declare dso_local i32 @puts(ptr)
declare dso_local ptr @fopen(ptr, ptr)
declare dso_local ptr @fgets(ptr, i32, ptr)
declare dso_local i32 @strncmp(ptr, ptr, i64)
declare dso_local ptr @strncpy(ptr, ptr, i64)
declare dso_local i32 @printf(ptr, ...)
declare dso_local ptr @nz_decrypt()
declare dso_local i32 @fclose(ptr)
define dso_local i32 @main() {
entry:
%EAX-SKT-LOC = alloca i32, align 4
%RDI-SKT-LOC = alloca i64, align 8, !ROData_Index !1
%R14D-SKT-LOC150 = alloca i32, align 4
%R14D-SKT-LOC143 = alloca i32, align 4
%RBX-SKT-LOC136 = alloca i64, align 8
%R14D-SKT-LOC126 = alloca i64, align 8
%R12-SKT-LOC119 = alloca i64, align 8
%RBX-SKT-LOC = alloca i64, align 8
%R12-SKT-LOC = alloca i64, align 8
%R14D-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 72, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 16
%RBP_N.56 = inttoptr i64 %0 to ptr
%1 = add i64 %tos, 24
%RBP_N.48 = inttoptr i64 %1 to ptr
%2 = add i64 %tos, 32
%RBP_N.40 = inttoptr i64 %2 to ptr
%3 = add i64 %tos, 48
%RSPAdj_N.24 = inttoptr i64 %3 to ptr
%4 = add i64 %tos, 0
%RSP_P.0 = inttoptr i64 %4 to ptr
store i64 3735928559, ptr %RSP_P.0, align 8
%RBP = ptrtoint ptr %RSP_P.0 to i64
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%memload = load i32, ptr @BUF_SIZE, align 1
%R13 = ptrtoint ptr %RSPAdj_N.24 to i64
%5 = zext i32 %memload to i64
%RAX = add i64 %5, 15
%6 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %5, i64 15)
%CF = extractvalue { i64, i1 } %6, 1
%7 = and i64 %RAX, 255
%8 = call i64 @llvm.ctpop.i64(i64 %7)
%9 = and i64 %8, 1
%PF = icmp eq i64 %9, 0
%ZF = icmp eq i64 %RAX, 0
%highbit = and i64 -9223372036854775808, %RAX
%SF = icmp ne i64 %highbit, 0
%10 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %5, i64 15)
%OF = extractvalue { i64, i1 } %10, 1
%RAX5 = and i64 %RAX, -16
%11 = and i64 %RAX5, 255
%12 = call i64 @llvm.ctpop.i64(i64 %11)
%13 = and i64 %12, 1
%PF1 = icmp eq i64 %13, 0
%ZF2 = icmp eq i64 %RAX5, 0
%highbit3 = and i64 -9223372036854775808, %RAX5
%SF4 = icmp ne i64 %highbit3, 0
%R136 = sub i64 %R13, %RAX5
%14 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R13, i64 %RAX5)
%CF7 = extractvalue { i64, i1 } %14, 1
%ZF8 = icmp eq i64 %R136, 0
%highbit9 = and i64 -9223372036854775808, %R136
%SF10 = icmp ne i64 %highbit9, 0
%15 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R13, i64 %RAX5)
%OF11 = extractvalue { i64, i1 } %15, 1
%16 = and i64 %R136, 255
%17 = call i64 @llvm.ctpop.i64(i64 %16)
%18 = and i64 %17, 1
%PF12 = icmp eq i64 %18, 0
%memload13 = load i32, ptr @UID_SIZE, align 1
%19 = zext i32 %memload13 to i64
%RAX20 = add i64 %19, 15
%20 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %19, i64 15)
%CF14 = extractvalue { i64, i1 } %20, 1
%21 = and i64 %RAX20, 255
%22 = call i64 @llvm.ctpop.i64(i64 %21)
%23 = and i64 %22, 1
%PF15 = icmp eq i64 %23, 0
%ZF16 = icmp eq i64 %RAX20, 0
%highbit17 = and i64 -9223372036854775808, %RAX20
%SF18 = icmp ne i64 %highbit17, 0
%24 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %19, i64 15)
%OF19 = extractvalue { i64, i1 } %24, 1
%RAX25 = and i64 %RAX20, -16
%25 = and i64 %RAX25, 255
%26 = call i64 @llvm.ctpop.i64(i64 %25)
%27 = and i64 %26, 1
%PF21 = icmp eq i64 %27, 0
%ZF22 = icmp eq i64 %RAX25, 0
%highbit23 = and i64 -9223372036854775808, %RAX25
%SF24 = icmp ne i64 %highbit23, 0
%RCX = sub i64 %R136, %RAX25
%28 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R136, i64 %RAX25)
%CF26 = extractvalue { i64, i1 } %28, 1
%ZF27 = icmp eq i64 %RCX, 0
%highbit28 = and i64 -9223372036854775808, %RCX
%SF29 = icmp ne i64 %highbit28, 0
%29 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R136, i64 %RAX25)
%OF30 = extractvalue { i64, i1 } %29, 1
%30 = and i64 %RCX, 255
%31 = call i64 @llvm.ctpop.i64(i64 %30)
%32 = and i64 %31, 1
%PF31 = icmp eq i64 %32, 0
store i64 %RCX, ptr %stktop_8, align 1
%memload32 = load i32, ptr @PASS_CIPHER_SIZE, align 1
%33 = zext i32 %memload32 to i64
%RAX39 = add i64 %33, 15
%34 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %33, i64 15)
%CF33 = extractvalue { i64, i1 } %34, 1
%35 = and i64 %RAX39, 255
%36 = call i64 @llvm.ctpop.i64(i64 %35)
%37 = and i64 %36, 1
%PF34 = icmp eq i64 %37, 0
%ZF35 = icmp eq i64 %RAX39, 0
%highbit36 = and i64 -9223372036854775808, %RAX39
%SF37 = icmp ne i64 %highbit36, 0
%38 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %33, i64 15)
%OF38 = extractvalue { i64, i1 } %38, 1
%RAX44 = and i64 %RAX39, -16
%39 = and i64 %RAX44, 255
%40 = call i64 @llvm.ctpop.i64(i64 %39)
%41 = and i64 %40, 1
%PF40 = icmp eq i64 %41, 0
%ZF41 = icmp eq i64 %RAX44, 0
%highbit42 = and i64 -9223372036854775808, %RAX44
%SF43 = icmp ne i64 %highbit42, 0
%RCX45 = sub i64 %RCX, %RAX44
%42 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RCX, i64 %RAX44)
%CF46 = extractvalue { i64, i1 } %42, 1
%ZF47 = icmp eq i64 %RCX45, 0
%highbit48 = and i64 -9223372036854775808, %RCX45
%SF49 = icmp ne i64 %highbit48, 0
%43 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RCX, i64 %RAX44)
%OF50 = extractvalue { i64, i1 } %43, 1
%44 = and i64 %RCX45, 255
%45 = call i64 @llvm.ctpop.i64(i64 %44)
%46 = and i64 %45, 1
%PF51 = icmp eq i64 %46, 0
store i64 %RCX45, ptr %RBP_N.56, align 1
%memload52 = load i32, ptr @PASS_PLAIN_SIZE, align 1
%47 = zext i32 %memload52 to i64
%RAX59 = add i64 %47, 15
%48 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %47, i64 15)
%CF53 = extractvalue { i64, i1 } %48, 1
%49 = and i64 %RAX59, 255
%50 = call i64 @llvm.ctpop.i64(i64 %49)
%51 = and i64 %50, 1
%PF54 = icmp eq i64 %51, 0
%ZF55 = icmp eq i64 %RAX59, 0
%highbit56 = and i64 -9223372036854775808, %RAX59
%SF57 = icmp ne i64 %highbit56, 0
%52 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %47, i64 15)
%OF58 = extractvalue { i64, i1 } %52, 1
%RAX64 = and i64 %RAX59, -16
%53 = and i64 %RAX64, 255
%54 = call i64 @llvm.ctpop.i64(i64 %53)
%55 = and i64 %54, 1
%PF60 = icmp eq i64 %55, 0
%ZF61 = icmp eq i64 %RAX64, 0
%highbit62 = and i64 -9223372036854775808, %RAX64
%SF63 = icmp ne i64 %highbit62, 0
%R12 = sub i64 %RCX45, %RAX64
%56 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RCX45, i64 %RAX64)
%CF65 = extractvalue { i64, i1 } %56, 1
%ZF66 = icmp eq i64 %R12, 0
%highbit67 = and i64 -9223372036854775808, %R12
%SF68 = icmp ne i64 %highbit67, 0
%57 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RCX45, i64 %RAX64)
%OF69 = extractvalue { i64, i1 } %57, 1
%58 = and i64 %R12, 255
%59 = call i64 @llvm.ctpop.i64(i64 %58)
%60 = and i64 %59, 1
%PF70 = icmp eq i64 %60, 0
%EAX = call i32 @puts(ptr getelementptr inbounds ([260 x i8], ptr @0, i32 0, i32 88))
%EAX72 = call i32 @puts(ptr getelementptr inbounds ([260 x i8], ptr @0, i32 0, i32 117))
%EAX74 = call i32 @puts(ptr getelementptr inbounds ([260 x i8], ptr @0, i32 0, i32 154))
%EAX76 = call i32 @puts(ptr getelementptr inbounds ([260 x i8], ptr @0, i32 0, i32 181))
%61 = call ptr @fopen(ptr @0, ptr getelementptr inbounds ([260 x i8], ptr @0, i32 0, i32 115))
%RAX78 = ptrtoint ptr %61 to i64
%62 = and i64 %RAX78, %RAX78
%highbit79 = and i64 -9223372036854775808, %62
%SF80 = icmp ne i64 %highbit79, 0
%ZF81 = icmp eq i64 %62, 0
%63 = and i64 %62, 255
%64 = call i64 @llvm.ctpop.i64(i64 %63)
%65 = and i64 %64, 1
%PF82 = icmp eq i64 %65, 0
store i64 %R12, ptr %R12-SKT-LOC, align 1
store i64 %R12, ptr %R12-SKT-LOC119, align 1
%CmpZF_JE = icmp eq i1 %ZF81, true
br i1 %CmpZF_JE, label %bb.12, label %bb.1
bb.1: ; preds = %entry
%memload83 = load i32, ptr @BUF_SIZE, align 1
%66 = inttoptr i64 %R136 to ptr
%67 = call ptr @fgets(ptr %66, i32 %memload83, ptr %61)
%RAX84 = ptrtoint ptr %67 to i64
%68 = and i64 %RAX84, %RAX84
%highbit85 = and i64 -9223372036854775808, %68
%SF86 = icmp ne i64 %highbit85, 0
%ZF87 = icmp eq i64 %68, 0
%69 = and i64 %68, 255
%70 = call i64 @llvm.ctpop.i64(i64 %69)
%71 = and i64 %70, 1
%PF88 = icmp eq i64 %71, 0
store i64 %RAX78, ptr %RBX-SKT-LOC, align 1
store i64 %RAX78, ptr %RBX-SKT-LOC136, align 1
%CmpZF_JE162 = icmp eq i1 %ZF87, true
br i1 %CmpZF_JE162, label %bb.13, label %bb.2
bb.2: ; preds = %bb.1
%memref-disp = add i64 %R136, 8
store i64 %memref-disp, ptr %RBP_N.48, align 1
%72 = zext i32 2 to i64
store i64 %72, ptr %R14D-SKT-LOC, align 1
%73 = zext i32 2 to i64
store i64 %73, ptr %R14D-SKT-LOC126, align 1
store i32 2, ptr %R14D-SKT-LOC143, align 1
store i32 2, ptr %R14D-SKT-LOC150, align 1
br label %bb.3
bb.3: ; preds = %bb.2, %bb.9
%74 = inttoptr i64 %R136 to ptr
%75 = zext i32 8 to i64
%EAX90 = call i32 @strncmp(ptr %74, ptr getelementptr inbounds ([260 x i8], ptr @0, i32 0, i32 11), i64 %75)
%76 = zext i32 %EAX90 to i64
%77 = zext i32 %EAX90 to i64
%78 = and i64 %76, %77
%highbit91 = and i64 -9223372036854775808, %78
%SF92 = icmp ne i64 %highbit91, 0
%ZF93 = icmp eq i64 %78, 0
%79 = and i64 %78, 255
%80 = call i64 @llvm.ctpop.i64(i64 %79)
%81 = and i64 %80, 1
%PF94 = icmp eq i64 %81, 0
%CmpZF_JNE = icmp eq i1 %ZF93, false
br i1 %CmpZF_JNE, label %bb.5, label %bb.4
bb.4: ; preds = %bb.3
%82 = load i64, ptr %R14D-SKT-LOC, align 1
%R14D = trunc i64 %82 to i32
%R14D99 = sub i32 %R14D, 1
%83 = and i32 %R14D99, 255
%84 = call i32 @llvm.ctpop.i32(i32 %83)
%85 = and i32 %84, 1
%PF95 = icmp eq i32 %85, 0
%ZF96 = icmp eq i32 %R14D99, 0
%highbit97 = and i32 -2147483648, %R14D99
%SF98 = icmp ne i32 %highbit97, 0
%memload100 = load i32, ptr @UID_SIZE, align 1
%R12101 = load i64, ptr %R12-SKT-LOC, align 1
%memload102 = load i64, ptr %stktop_8, align 1
%memload103 = load i64, ptr %RBP_N.48, align 1
%86 = inttoptr i64 %memload102 to ptr
%87 = inttoptr i64 %memload103 to ptr
%88 = zext i32 %memload100 to i64
%89 = call ptr @strncpy(ptr %86, ptr %87, i64 %88)
%RAX104 = ptrtoint ptr %89 to i64
%EAX106 = call i32 (ptr, ...) @printf(ptr getelementptr inbounds ([260 x i8], ptr @0, i32 0, i32 20), i64 %memload102)
store i64 %R12101, ptr %R12-SKT-LOC119, align 1
%90 = zext i32 %R14D99 to i64
store i64 %90, ptr %R14D-SKT-LOC126, align 1
store i32 %R14D99, ptr %R14D-SKT-LOC143, align 1
store i32 %R14D99, ptr %R14D-SKT-LOC150, align 1
store i64 %R12101, ptr %R12-SKT-LOC, align 1
%91 = zext i32 %R14D99 to i64
store i64 %91, ptr %R14D-SKT-LOC, align 1
br label %bb.5
bb.5: ; preds = %bb.4, %bb.3
%92 = inttoptr i64 %R136 to ptr
%93 = zext i32 8 to i64
%EAX108 = call i32 @strncmp(ptr %92, ptr getelementptr inbounds ([260 x i8], ptr @0, i32 0, i32 31), i64 %93)
%94 = zext i32 %EAX108 to i64
%95 = zext i32 %EAX108 to i64
%96 = and i64 %94, %95
%highbit109 = and i64 -9223372036854775808, %96
%SF110 = icmp ne i64 %highbit109, 0
%ZF111 = icmp eq i64 %96, 0
%97 = and i64 %96, 255
%98 = call i64 @llvm.ctpop.i64(i64 %97)
%99 = and i64 %98, 1
%PF112 = icmp eq i64 %99, 0
%CmpZF_JNE163 = icmp eq i1 %ZF111, false
br i1 %CmpZF_JNE163, label %bb.8, label %bb.6
bb.6: ; preds = %bb.5
%RBX = load i64, ptr %RBX-SKT-LOC, align 1
%memload113 = load i32, ptr @PASS_CIPHER_SIZE, align 1
%memload114 = load i64, ptr %RBP_N.56, align 1
%memload115 = load i64, ptr %RBP_N.48, align 1
%100 = inttoptr i64 %memload114 to ptr
%101 = inttoptr i64 %memload115 to ptr
%102 = zext i32 %memload113 to i64
%103 = call ptr @strncpy(ptr %100, ptr %101, i64 %102)
%RAX116 = ptrtoint ptr %103 to i64
%EAX118 = call i32 (ptr, ...) @printf(ptr getelementptr inbounds ([260 x i8], ptr @0, i32 0, i32 40), i64 %memload114)
%R12120 = load i64, ptr %R12-SKT-LOC119, align 1
%104 = call ptr @nz_decrypt()
%RAX121 = ptrtoint ptr %104 to i64
%105 = and i64 %RAX121, %RAX121
%highbit122 = and i64 -9223372036854775808, %105
%SF123 = icmp ne i64 %highbit122, 0
%ZF124 = icmp eq i64 %105, 0
%106 = and i64 %105, 255
%107 = call i64 @llvm.ctpop.i64(i64 %106)
%108 = and i64 %107, 1
%PF125 = icmp eq i64 %108, 0
%CmpZF_JNE164 = icmp eq i1 %ZF124, false
br i1 %CmpZF_JNE164, label %bb.16, label %bb.7
bb.7: ; preds = %bb.6
%109 = load i64, ptr %R14D-SKT-LOC126, align 1
%R14D127 = trunc i64 %109 to i32
%R14D132 = sub i32 %R14D127, 1
%110 = and i32 %R14D132, 255
%111 = call i32 @llvm.ctpop.i32(i32 %110)
%112 = and i32 %111, 1
%PF128 = icmp eq i32 %112, 0
%ZF129 = icmp eq i32 %R14D132, 0
%highbit130 = and i32 -2147483648, %R14D132
%SF131 = icmp ne i32 %highbit130, 0
%EAX134 = call i32 (ptr, ...) @printf(ptr getelementptr inbounds ([260 x i8], ptr @0, i32 0, i32 63), i64 %R12120)
store i64 %RBX, ptr %RBX-SKT-LOC136, align 1
store i32 %R14D132, ptr %R14D-SKT-LOC143, align 1
store i32 %R14D132, ptr %R14D-SKT-LOC150, align 1
store i64 %RBX, ptr %RBX-SKT-LOC, align 1
%113 = zext i32 %R14D132 to i64
store i64 %113, ptr %R14D-SKT-LOC126, align 1
%114 = zext i32 %R14D132 to i64
store i64 %114, ptr %R14D-SKT-LOC, align 1
br label %bb.8
bb.8: ; preds = %bb.7, %bb.5
%memload135 = load i32, ptr @BUF_SIZE, align 1
%RBX137 = load i64, ptr %RBX-SKT-LOC136, align 1
%115 = inttoptr i64 %R136 to ptr
%116 = inttoptr i64 %RBX137 to ptr
%117 = call ptr @fgets(ptr %115, i32 %memload135, ptr %116)
%RAX138 = ptrtoint ptr %117 to i64
%118 = and i64 %RAX138, %RAX138
%highbit139 = and i64 -9223372036854775808, %118
%SF140 = icmp ne i64 %highbit139, 0
%ZF141 = icmp eq i64 %118, 0
%119 = and i64 %118, 255
%120 = call i64 @llvm.ctpop.i64(i64 %119)
%121 = and i64 %120, 1
%PF142 = icmp eq i64 %121, 0
%CmpZF_JE165 = icmp eq i1 %ZF141, true
br i1 %CmpZF_JE165, label %bb.10, label %bb.9
bb.9: ; preds = %bb.8
%R14D144 = load i32, ptr %R14D-SKT-LOC143, align 1
%122 = and i32 %R14D144, %R14D144
%highbit145 = and i32 -2147483648, %122
%SF146 = icmp ne i32 %highbit145, 0
%ZF147 = icmp eq i32 %122, 0
%123 = and i32 %122, 255
%124 = call i32 @llvm.ctpop.i32(i32 %123)
%125 = and i32 %124, 1
%PF148 = icmp eq i32 %125, 0
store i32 %R14D144, ptr %R14D-SKT-LOC150, align 1
%ZFCmp_JG = icmp eq i1 %ZF147, false
%SFOFCmp_JG = icmp eq i1 %SF146, false
%ZFAndSFOF_JG = and i1 %ZFCmp_JG, %SFOFCmp_JG
br i1 %ZFAndSFOF_JG, label %bb.3, label %bb.10
bb.10: ; preds = %bb.9, %bb.8
%126 = inttoptr i64 %RBX137 to ptr
%EAX149 = call i32 @fclose(ptr %126)
%R14D151 = load i32, ptr %R14D-SKT-LOC150, align 1
%127 = and i32 %R14D151, %R14D151
%highbit152 = and i32 -2147483648, %127
%SF153 = icmp ne i32 %highbit152, 0
%ZF154 = icmp eq i32 %127, 0
%128 = and i32 %127, 255
%129 = call i32 @llvm.ctpop.i32(i32 %128)
%130 = and i32 %129, 1
%PF155 = icmp eq i32 %130, 0
%ZFCmp_JG166 = icmp eq i1 %ZF154, false
%SFOFCmp_JG167 = icmp eq i1 %SF153, false
%ZFAndSFOF_JG168 = and i1 %ZFCmp_JG166, %SFOFCmp_JG167
br i1 %ZFAndSFOF_JG168, label %bb.14, label %bb.11
bb.11: ; preds = %bb.10
store i32 0, ptr %EAX-SKT-LOC, align 1
br label %bb.17
bb.13: ; preds = %bb.1
%EAX156 = call i32 @fclose(ptr %61)
br label %bb.14
bb.14: ; preds = %bb.13, %bb.10
%RDI157 = ptrtoint ptr getelementptr inbounds ([260 x i8], ptr @0, i32 0, i32 205) to i64, !ROData_Index !2
store i64 %RDI157, ptr %RDI-SKT-LOC, align 1
br label %bb.15
bb.12: ; preds = %entry
%RDI158 = ptrtoint ptr getelementptr inbounds ([260 x i8], ptr @0, i32 0, i32 229) to i64, !ROData_Index !1
store i64 %RDI158, ptr %RDI-SKT-LOC, align 1
br label %bb.15
bb.15: ; preds = %bb.14, %bb.12
%RDI159 = load i64, ptr %RDI-SKT-LOC, align 1, !ROData_Content !3
%131 = inttoptr i64 %RDI159 to ptr, !ROData_Content !3
%EAX160 = call i32 @puts(ptr %131)
br label %bb.16
bb.16: ; preds = %bb.15, %bb.6
store i32 1, ptr %EAX-SKT-LOC, align 1
br label %bb.17
bb.17: ; preds = %bb.16, %bb.11
%RSP = ptrtoint ptr %RBP_N.40 to i64
%EAX161 = load i32, ptr %EAX-SKT-LOC, align 1
ret i32 %EAX161
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
!1 = !{ptr getelementptr inbounds ([260 x i8], ptr @0, i32 0, i32 229)}
!2 = !{ptr getelementptr inbounds ([260 x i8], ptr @0, i32 0, i32 205)}
!3 = !{!1}
| ; ModuleID = 'AnghaBench/exploitdb/exploits/windows/local/extr_20081.c_main.c'
source_filename = "AnghaBench/exploitdb/exploits/windows/local/extr_20081.c_main.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BUF_SIZE = common local_unnamed_addr global i32 0, align 4
@UID_SIZE = common local_unnamed_addr global i32 0, align 4
@PASS_CIPHER_SIZE = common local_unnamed_addr global i32 0, align 4
@PASS_PLAIN_SIZE = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [11 x i8] c"jnetz.prop\00", align 1
@.str.5 = private unnamed_addr constant [2 x i8] c"r\00", align 1
@.str.7 = private unnamed_addr constant [9 x i8] c"ProfUID=\00", align 1
@.str.8 = private unnamed_addr constant [11 x i8] c"UserID: %s\00", align 1
@.str.9 = private unnamed_addr constant [9 x i8] c"ProfPWD=\00", align 1
@.str.10 = private unnamed_addr constant [23 x i8] c"Encrypted Password: %s\00", align 1
@.str.11 = private unnamed_addr constant [25 x i8] c"Plain Text Password: %s\0A\00", align 1
@str = private unnamed_addr constant [29 x i8] c"\0ANet Zero Password Decryptor\00", align 1
@str.13 = private unnamed_addr constant [37 x i8] c"Brian Carrier [bcarrier@atstake.com]\00", align 1
@str.14 = private unnamed_addr constant [27 x i8] c"@Stake L0pht Research Labs\00", align 1
@str.15 = private unnamed_addr constant [24 x i8] c"http://www.atstake.com\0A\00", align 1
@str.16 = private unnamed_addr constant [24 x i8] c"Invalid jnetz.prop file\00", align 1
@str.17 = private unnamed_addr constant [31 x i8] c"Unable to find jnetz.prop file\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @main() local_unnamed_addr #0 {
%1 = load i32, ptr @BUF_SIZE, align 4, !tbaa !6
%2 = zext i32 %1 to i64
%3 = alloca i8, i64 %2, align 1
%4 = load i32, ptr @UID_SIZE, align 4, !tbaa !6
%5 = zext i32 %4 to i64
%6 = alloca i8, i64 %5, align 1
%7 = load i32, ptr @PASS_CIPHER_SIZE, align 4, !tbaa !6
%8 = zext i32 %7 to i64
%9 = alloca i8, i64 %8, align 1
%10 = load i32, ptr @PASS_PLAIN_SIZE, align 4, !tbaa !6
%11 = zext i32 %10 to i64
%12 = alloca i8, i64 %11, align 1
%13 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str)
%14 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str.13)
%15 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str.14)
%16 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str.15)
%17 = tail call ptr @fopen(ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.5)
%18 = icmp eq ptr %17, null
br i1 %18, label %25, label %19
19: ; preds = %0
%20 = load i32, ptr @BUF_SIZE, align 4, !tbaa !6
%21 = call ptr @fgets(ptr noundef nonnull %3, i32 noundef %20, ptr noundef nonnull %17)
%22 = icmp eq ptr %21, null
br i1 %22, label %58, label %23
23: ; preds = %19
%24 = getelementptr inbounds i8, ptr %3, i64 8
br label %27
25: ; preds = %0
%26 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str.17)
br label %62
27: ; preds = %23, %49
%28 = phi i32 [ 2, %23 ], [ %50, %49 ]
%29 = call i64 @strncmp(ptr noundef nonnull %3, ptr noundef nonnull @.str.7, i32 noundef 8) #4
%30 = icmp eq i64 %29, 0
br i1 %30, label %31, label %36
31: ; preds = %27
%32 = add nsw i32 %28, -1
%33 = load i32, ptr @UID_SIZE, align 4, !tbaa !6
%34 = call i32 @strncpy(ptr noundef nonnull %6, ptr noundef nonnull %24, i32 noundef %33) #4
%35 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.8, ptr noundef nonnull %6)
br label %36
36: ; preds = %31, %27
%37 = phi i32 [ %32, %31 ], [ %28, %27 ]
%38 = call i64 @strncmp(ptr noundef nonnull %3, ptr noundef nonnull @.str.9, i32 noundef 8) #4
%39 = icmp eq i64 %38, 0
br i1 %39, label %40, label %49
40: ; preds = %36
%41 = load i32, ptr @PASS_CIPHER_SIZE, align 4, !tbaa !6
%42 = call i32 @strncpy(ptr noundef nonnull %9, ptr noundef nonnull %24, i32 noundef %41) #4
%43 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.10, ptr noundef nonnull %9)
%44 = call i64 @nz_decrypt(ptr noundef nonnull %9, ptr noundef nonnull %12) #4
%45 = icmp eq i64 %44, 0
br i1 %45, label %46, label %62
46: ; preds = %40
%47 = add nsw i32 %37, -1
%48 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.11, ptr noundef nonnull %12)
br label %49
49: ; preds = %46, %36
%50 = phi i32 [ %47, %46 ], [ %37, %36 ]
%51 = load i32, ptr @BUF_SIZE, align 4, !tbaa !6
%52 = call ptr @fgets(ptr noundef nonnull %3, i32 noundef %51, ptr noundef nonnull %17)
%53 = icmp ne ptr %52, null
%54 = icmp sgt i32 %50, 0
%55 = select i1 %53, i1 %54, i1 false
br i1 %55, label %27, label %56, !llvm.loop !10
56: ; preds = %49
%57 = call i32 @fclose(ptr noundef nonnull %17)
br i1 %54, label %60, label %62
58: ; preds = %19
%59 = call i32 @fclose(ptr noundef nonnull %17)
br label %60
60: ; preds = %58, %56
%61 = call i32 @puts(ptr nonnull dereferenceable(1) @str.16)
br label %62
62: ; preds = %40, %56, %60, %25
%63 = phi i32 [ 1, %25 ], [ 1, %60 ], [ 0, %56 ], [ 1, %40 ]
ret i32 %63
}
; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noalias noundef ptr @fopen(ptr nocapture noundef readonly, ptr nocapture noundef readonly) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef ptr @fgets(ptr noundef, i32 noundef, ptr nocapture noundef) local_unnamed_addr #1
declare i64 @strncmp(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @strncpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @nz_decrypt(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: nofree nounwind
declare noundef i32 @fclose(ptr nocapture noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nofree nounwind }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| exploitdb_exploits_windows_local_extr_20081.c_main |
; ModuleID = 'FFmpeg_libavutil_extr_md5.c_av_md5_final.so'
source_filename = "FFmpeg_libavutil_extr_md5.c_av_md5_final.so"
@rodata_13 = private unnamed_addr constant [2 x i8] c"\80\00", align 1, !ROData_SecInfo !0
declare dso_local ptr @av_le2ne64()
declare dso_local ptr @av_md5_update()
declare dso_local ptr @AV_WL32()
define dso_local ptr @av_md5_final(i64 %arg1, i64 %arg2) {
entry:
%stktop_8 = alloca i8, i32 32, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 0
%RSP_P.0 = inttoptr i64 %0 to ptr
%1 = add i64 %tos, 12
%RSP_P.12 = inttoptr i64 %1 to ptr
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%2 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %2, align 1
%EDI = shl i32 %memload, 3
%ZF = icmp eq i32 %EDI, 0
%highbit = and i32 -2147483648, %EDI
%SF = icmp ne i32 %highbit, 0
%3 = call ptr @av_le2ne64()
%RAX = ptrtoint ptr %3 to i64
%4 = trunc i64 %RAX to i32
store i32 %4, ptr %RSP_P.12, align 1
%RSI = ptrtoint ptr @rodata_13 to i64
%5 = call ptr @av_md5_update()
%RAX1 = ptrtoint ptr %5 to i64
%6 = inttoptr i64 %arg1 to ptr
%memload2 = load i32, ptr %6, align 1
%EAX = and i32 %memload2, 63
%7 = and i32 %EAX, 255
%8 = call i32 @llvm.ctpop.i32(i32 %7)
%9 = and i32 %8, 1
%PF = icmp eq i32 %9, 0
%ZF3 = icmp eq i32 %EAX, 0
%highbit4 = and i32 -2147483648, %EAX
%SF5 = icmp ne i32 %highbit4, 0
%10 = sub i32 %EAX, 56
%11 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EAX, i32 56)
%CF = extractvalue { i32, i1 } %11, 1
%ZF6 = icmp eq i32 %10, 0
%highbit7 = and i32 -2147483648, %10
%SF8 = icmp ne i32 %highbit7, 0
%12 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EAX, i32 56)
%OF = extractvalue { i32, i1 } %12, 1
%13 = and i32 %10, 255
%14 = call i32 @llvm.ctpop.i32(i32 %13)
%15 = and i32 %14, 1
%PF9 = icmp eq i32 %15, 0
%CmpZF_JE = icmp eq i1 %ZF6, true
br i1 %CmpZF_JE, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%R15 = ptrtoint ptr getelementptr inbounds ([2 x i8], ptr @rodata_13, i32 0, i32 1) to i64, !ROData_Index !1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.2
%16 = call ptr @av_md5_update()
%RAX10 = ptrtoint ptr %16 to i64
%17 = inttoptr i64 %arg1 to ptr
%memload11 = load i32, ptr %17, align 1
%EAX16 = and i32 %memload11, 63
%18 = and i32 %EAX16, 255
%19 = call i32 @llvm.ctpop.i32(i32 %18)
%20 = and i32 %19, 1
%PF12 = icmp eq i32 %20, 0
%ZF13 = icmp eq i32 %EAX16, 0
%highbit14 = and i32 -2147483648, %EAX16
%SF15 = icmp ne i32 %highbit14, 0
%21 = sub i32 %EAX16, 56
%22 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EAX16, i32 56)
%CF17 = extractvalue { i32, i1 } %22, 1
%ZF18 = icmp eq i32 %21, 0
%highbit19 = and i32 -2147483648, %21
%SF20 = icmp ne i32 %highbit19, 0
%23 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EAX16, i32 56)
%OF21 = extractvalue { i32, i1 } %23, 1
%24 = and i32 %21, 255
%25 = call i32 @llvm.ctpop.i32(i32 %24)
%26 = and i32 %25, 1
%PF22 = icmp eq i32 %26, 0
%CmpZF_JNE = icmp eq i1 %ZF18, false
br i1 %CmpZF_JNE, label %bb.2, label %bb.3
bb.3: ; preds = %bb.2, %entry
%RSI23 = ptrtoint ptr %RSP_P.12 to i64
%27 = call ptr @av_md5_update()
%RAX24 = ptrtoint ptr %27 to i64
%memref-disp = add i64 %arg1, 8
%28 = inttoptr i64 %memref-disp to ptr
%memload25 = load i64, ptr %28, align 1
%memref-disp26 = add i64 %memload25, 12
%29 = inttoptr i64 %memref-disp26 to ptr
%memload27 = load i32, ptr %29, align 1
%30 = call ptr @AV_WL32()
%RAX28 = ptrtoint ptr %30 to i64
%memref-disp29 = add i64 %arg2, 4
%memref-disp30 = add i64 %arg1, 8
%31 = inttoptr i64 %memref-disp30 to ptr
%memload31 = load i64, ptr %31, align 1
%memref-disp32 = add i64 %memload31, 8
%32 = inttoptr i64 %memref-disp32 to ptr
%memload33 = load i32, ptr %32, align 1
%33 = call ptr @AV_WL32()
%RAX34 = ptrtoint ptr %33 to i64
%memref-disp35 = add i64 %arg2, 8
%memref-disp36 = add i64 %arg1, 8
%34 = inttoptr i64 %memref-disp36 to ptr
%memload37 = load i64, ptr %34, align 1
%memref-disp38 = add i64 %memload37, 4
%35 = inttoptr i64 %memref-disp38 to ptr
%memload39 = load i32, ptr %35, align 1
%36 = call ptr @AV_WL32()
%RAX40 = ptrtoint ptr %36 to i64
%R14 = add i64 %arg2, 12
%37 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %arg2, i64 12)
%CF41 = extractvalue { i64, i1 } %37, 1
%38 = and i64 %R14, 255
%39 = call i64 @llvm.ctpop.i64(i64 %38)
%40 = and i64 %39, 1
%PF42 = icmp eq i64 %40, 0
%ZF43 = icmp eq i64 %R14, 0
%highbit44 = and i64 -9223372036854775808, %R14
%SF45 = icmp ne i64 %highbit44, 0
%41 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %arg2, i64 12)
%OF46 = extractvalue { i64, i1 } %41, 1
%memref-disp47 = add i64 %arg1, 8
%42 = inttoptr i64 %memref-disp47 to ptr
%memload48 = load i64, ptr %42, align 1
%43 = inttoptr i64 %memload48 to ptr
%memload49 = load i32, ptr %43, align 1
%44 = call ptr @AV_WL32()
ret ptr %44
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
!1 = !{ptr getelementptr inbounds ([2 x i8], ptr @rodata_13, i32 0, i32 1)}
| ; ModuleID = 'AnghaBench/FFmpeg/libavutil/extr_md5.c_av_md5_final.c'
source_filename = "AnghaBench/FFmpeg/libavutil/extr_md5.c_av_md5_final.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [2 x i8] c"\80\00", align 1
@.str.1 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @av_md5_final(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = load i32, ptr %0, align 8, !tbaa !6
%5 = shl i32 %4, 3
%6 = tail call i32 @av_le2ne64(i32 noundef %5) #3
store i32 %6, ptr %3, align 4, !tbaa !12
%7 = tail call i32 @av_md5_update(ptr noundef nonnull %0, ptr noundef nonnull @.str, i32 noundef 1) #3
%8 = load i32, ptr %0, align 8, !tbaa !6
%9 = and i32 %8, 63
%10 = icmp eq i32 %9, 56
br i1 %10, label %16, label %11
11: ; preds = %2, %11
%12 = tail call i32 @av_md5_update(ptr noundef nonnull %0, ptr noundef nonnull @.str.1, i32 noundef 1) #3
%13 = load i32, ptr %0, align 8, !tbaa !6
%14 = and i32 %13, 63
%15 = icmp eq i32 %14, 56
br i1 %15, label %16, label %11, !llvm.loop !13
16: ; preds = %11, %2
%17 = call i32 @av_md5_update(ptr noundef nonnull %0, ptr noundef nonnull %3, i32 noundef 8) #3
%18 = getelementptr inbounds i8, ptr %0, i64 8
%19 = load ptr, ptr %18, align 8, !tbaa !15
%20 = getelementptr inbounds i8, ptr %19, i64 12
%21 = load i32, ptr %20, align 4, !tbaa !12
%22 = call i32 @AV_WL32(ptr noundef %1, i32 noundef %21) #3
%23 = getelementptr inbounds i8, ptr %1, i64 4
%24 = load ptr, ptr %18, align 8, !tbaa !15
%25 = getelementptr inbounds i8, ptr %24, i64 8
%26 = load i32, ptr %25, align 4, !tbaa !12
%27 = call i32 @AV_WL32(ptr noundef nonnull %23, i32 noundef %26) #3
%28 = getelementptr inbounds i8, ptr %1, i64 8
%29 = load ptr, ptr %18, align 8, !tbaa !15
%30 = getelementptr inbounds i8, ptr %29, i64 4
%31 = load i32, ptr %30, align 4, !tbaa !12
%32 = call i32 @AV_WL32(ptr noundef nonnull %28, i32 noundef %31) #3
%33 = getelementptr inbounds i8, ptr %1, i64 12
%34 = load ptr, ptr %18, align 8, !tbaa !15
%35 = load i32, ptr %34, align 4, !tbaa !12
%36 = call i32 @AV_WL32(ptr noundef nonnull %33, i32 noundef %35) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @av_le2ne64(i32 noundef) local_unnamed_addr #2
declare i32 @av_md5_update(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @AV_WL32(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!7, !11, i64 8}
| FFmpeg_libavutil_extr_md5.c_av_md5_final |
; ModuleID = 'radare2_shlr_grub_kern_extr_env.c_grub_env_hashval.so'
source_filename = "radare2_shlr_grub_kern_extr_env.c_grub_env_hashval.so"
@HASHSZ = common dso_local global i32 0, align 4
define dso_local i32 @grub_env_hashval(i64 %arg1) {
entry:
%EAX-SKT-LOC24 = alloca i32, align 4
%RDI-SKT-LOC = alloca i64, align 8
%EAX-SKT-LOC = alloca i64, align 8
%CL-SKT-LOC = alloca i64, align 8
%0 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %0, align 1
%1 = trunc i32 %memload to i8
%ECX = zext i8 %1 to i32
%2 = trunc i32 %ECX to i8
%3 = trunc i32 %ECX to i8
%4 = and i8 %2, %3
%highbit = and i8 -128, %4
%SF = icmp ne i8 %highbit, 0
%ZF = icmp eq i8 %4, 0
%5 = call i8 @llvm.ctpop.i8(i8 %4)
%6 = and i8 %5, 1
%PF = icmp eq i8 %6, 0
%7 = zext i32 %ECX to i64
store i64 %7, ptr %CL-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%RDI = add i64 %arg1, 1
%8 = and i64 %RDI, 255
%9 = call i64 @llvm.ctpop.i64(i64 %8)
%10 = and i64 %9, 1
%PF1 = icmp eq i64 %10, 0
%ZF2 = icmp eq i64 %RDI, 0
%highbit3 = and i64 -9223372036854775808, %RDI
%SF4 = icmp ne i64 %highbit3, 0
%11 = zext i32 0 to i64
store i64 %11, ptr %EAX-SKT-LOC, align 1
store i64 %RDI, ptr %RDI-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.2
%12 = load i64, ptr %CL-SKT-LOC, align 1
%CL = trunc i64 %12 to i8
%ECX5 = sext i8 %CL to i32
%13 = zext i32 %ECX5 to i64
%memref-idxreg = mul i64 4, %13
%14 = zext i32 %ECX5 to i64
%memref-basereg = add i64 %14, %memref-idxreg
%ECX6 = trunc i64 %memref-basereg to i32
%15 = load i64, ptr %EAX-SKT-LOC, align 1
%EAX = trunc i64 %15 to i32
%EAX10 = add nsw i32 %EAX, %ECX6
%highbit7 = and i32 -2147483648, %EAX10
%SF8 = icmp ne i32 %highbit7, 0
%ZF9 = icmp eq i32 %EAX10, 0
%RDI11 = load i64, ptr %RDI-SKT-LOC, align 1
%16 = inttoptr i64 %RDI11 to ptr
%memload12 = load i32, ptr %16, align 1
%17 = trunc i32 %memload12 to i8
%ECX13 = zext i8 %17 to i32
%RDI18 = add i64 %RDI11, 1
%18 = and i64 %RDI18, 255
%19 = call i64 @llvm.ctpop.i64(i64 %18)
%20 = and i64 %19, 1
%PF14 = icmp eq i64 %20, 0
%ZF15 = icmp eq i64 %RDI18, 0
%highbit16 = and i64 -9223372036854775808, %RDI18
%SF17 = icmp ne i64 %highbit16, 0
%21 = trunc i32 %ECX13 to i8
%22 = trunc i32 %ECX13 to i8
%23 = and i8 %21, %22
%highbit19 = and i8 -128, %23
%SF20 = icmp ne i8 %highbit19, 0
%ZF21 = icmp eq i8 %23, 0
%24 = call i8 @llvm.ctpop.i8(i8 %23)
%25 = and i8 %24, 1
%PF22 = icmp eq i8 %25, 0
store i32 %EAX10, ptr %EAX-SKT-LOC24, align 1
%CmpZF_JNE = icmp eq i1 %ZF21, false
%26 = zext i32 %ECX13 to i64
store i64 %26, ptr %CL-SKT-LOC, align 1
%27 = zext i32 %EAX10 to i64
store i64 %27, ptr %EAX-SKT-LOC, align 1
store i64 %RDI18, ptr %RDI-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.2, label %bb.3
bb.3: ; preds = %bb.2
br label %bb.5
bb.4: ; preds = %entry
store i32 0, ptr %EAX-SKT-LOC24, align 1
br label %bb.5
bb.5: ; preds = %bb.4, %bb.3
%memload23 = load i32, ptr @HASHSZ, align 1
%EAX25 = load i32, ptr %EAX-SKT-LOC24, align 1
%28 = zext i32 %EAX25 to i64
%29 = zext i32 0 to i64
%div_hb_ls = shl nuw i64 %29, 32
%dividend = or i64 %div_hb_ls, %28
%30 = zext i32 %memload23 to i64
%div_q = udiv i64 %dividend, %30
%EAX26 = trunc i64 %div_q to i32
%div_r = urem i64 %dividend, %30
%EDX = trunc i64 %div_r to i32
ret i32 %EDX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/radare2/shlr/grub/kern/extr_env.c_grub_env_hashval.c'
source_filename = "AnghaBench/radare2/shlr/grub/kern/extr_env.c_grub_env_hashval.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@HASHSZ = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @grub_env_hashval], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @grub_env_hashval(ptr nocapture noundef readonly %0) #0 {
%2 = load i8, ptr %0, align 1, !tbaa !6
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 0, %1 ]
%7 = phi ptr [ %8, %4 ], [ %0, %1 ]
%8 = getelementptr inbounds i8, ptr %7, i64 1
%9 = sext i8 %5 to i32
%10 = mul nsw i32 %9, 5
%11 = add i32 %10, %6
%12 = load i8, ptr %8, align 1, !tbaa !6
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4, !llvm.loop !9
14: ; preds = %4, %1
%15 = phi i32 [ 0, %1 ], [ %11, %4 ]
%16 = load i32, ptr @HASHSZ, align 4, !tbaa !11
%17 = urem i32 %15, %16
ret i32 %17
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
| radare2_shlr_grub_kern_extr_env.c_grub_env_hashval |
; ModuleID = 'linux_sound_hda_ext_extr_hdac_ext_stream.c_snd_hdac_ext_stream_set_dpibr.so'
source_filename = "linux_sound_hda_ext_extr_hdac_ext_stream.c_snd_hdac_ext_stream_set_dpibr.so"
@rodata_13 = private unnamed_addr constant [36 x i8] c"Address of DRSM capability is NULL\0A\00", align 1, !ROData_SecInfo !0
@EINVAL = common dso_local global i32 0, align 4
declare dso_local ptr @writel()
declare dso_local ptr @dev_err()
define dso_local i32 @snd_hdac_ext_stream_set_dpibr(i64 %arg1, i64 %arg2, i32 %arg3) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%memref-disp = add i64 %arg1, 4
%0 = inttoptr i64 %memref-disp to ptr
%1 = load i32, ptr %0, align 1
%2 = zext i32 %1 to i64
%3 = zext i32 0 to i64
%4 = sub i64 %2, %3
%5 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %2, i64 %3)
%CF = extractvalue { i64, i1 } %5, 1
%ZF = icmp eq i64 %4, 0
%highbit = and i64 -9223372036854775808, %4
%SF = icmp ne i64 %highbit, 0
%6 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %2, i64 %3)
%OF = extractvalue { i64, i1 } %6, 1
%7 = and i64 %4, 255
%8 = call i64 @llvm.ctpop.i64(i64 %7)
%9 = and i64 %8, 1
%PF = icmp eq i64 %9, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%10 = inttoptr i64 %arg2 to ptr
%memload = load i32, ptr %10, align 1
%11 = call ptr @writel()
%RAX = ptrtoint ptr %11 to i64
br label %UnifiedReturnBlock
bb.2: ; preds = %entry
%12 = inttoptr i64 %arg1 to ptr
%memload1 = load i32, ptr %12, align 1
%RSI = ptrtoint ptr @rodata_13 to i64
%13 = call ptr @dev_err()
%RAX2 = ptrtoint ptr %13 to i64
%14 = load i32, ptr @EINVAL, align 4
%EAX = sub i32 0, %14
%15 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 0, i32 %14)
%CF3 = extractvalue { i32, i1 } %15, 1
%ZF4 = icmp eq i32 %EAX, 0
%highbit5 = and i32 -2147483648, %EAX
%SF6 = icmp ne i32 %highbit5, 0
%16 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 0, i32 %14)
%OF7 = extractvalue { i32, i1 } %16, 1
%17 = and i32 %EAX, 255
%18 = call i32 @llvm.ctpop.i32(i32 %17)
%19 = and i32 %18, 1
%PF8 = icmp eq i32 %19, 0
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.2, %bb.1
%UnifiedRetVal = phi i32 [ 0, %bb.1 ], [ %EAX, %bb.2 ]
ret i32 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/linux/sound/hda/ext/extr_hdac_ext_stream.c_snd_hdac_ext_stream_set_dpibr.c'
source_filename = "AnghaBench/linux/sound/hda/ext/extr_hdac_ext_stream.c_snd_hdac_ext_stream_set_dpibr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [36 x i8] c"Address of DRSM capability is NULL\0A\00", align 1
@EINVAL = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @snd_hdac_ext_stream_set_dpibr(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = getelementptr inbounds i8, ptr %0, i64 4
%5 = load i32, ptr %4, align 4, !tbaa !6
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %3
%8 = load i32, ptr %0, align 4, !tbaa !11
%9 = tail call i32 @dev_err(i32 noundef %8, ptr noundef nonnull @.str) #2
%10 = load i32, ptr @EINVAL, align 4, !tbaa !12
%11 = sub nsw i32 0, %10
br label %15
12: ; preds = %3
%13 = load i32, ptr %1, align 4, !tbaa !13
%14 = tail call i32 @writel(i32 noundef %2, i32 noundef %13) #2
br label %15
15: ; preds = %12, %7
%16 = phi i32 [ 0, %12 ], [ %11, %7 ]
ret i32 %16
}
declare i32 @dev_err(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"hdac_bus", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"hdac_ext_stream", !8, i64 0}
| linux_sound_hda_ext_extr_hdac_ext_stream.c_snd_hdac_ext_stream_set_dpibr |
; ModuleID = 'fastsocket_kernel_drivers_block_mtip32xx_extr_mtip32xx.c_mtip_block_getgeo.so'
source_filename = "fastsocket_kernel_drivers_block_mtip32xx_extr_mtip32xx.c_mtip_block_getgeo.so"
@rodata_13 = private unnamed_addr constant [31 x i8] c"Could not get drive capacity.\0A\00", align 1, !ROData_SecInfo !0
@ENOTTY = common dso_local global i32 0, align 4
declare dso_local ptr @mtip_hw_get_capacity()
declare dso_local ptr @sector_div()
declare dso_local ptr @dev_warn()
define dso_local i32 @mtip_block_getgeo(i64 %arg1, i64 %arg2) {
entry:
%EAX-SKT-LOC = alloca i32, align 4
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%1 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %1, align 1
%2 = inttoptr i64 %memload to ptr
%memload1 = load i64, ptr %2, align 1
%3 = and i64 %memload1, %memload1
%highbit = and i64 -9223372036854775808, %3
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %3, 0
%4 = and i64 %3, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.4, label %bb.1
bb.1: ; preds = %entry
%7 = ptrtoint ptr %stktop_8 to i64
%RSI = add i64 %7, 4
%8 = call ptr @mtip_hw_get_capacity()
%RAX = ptrtoint ptr %8 to i64
%9 = trunc i64 %RAX to i32
%10 = trunc i64 %RAX to i32
%11 = and i32 %9, %10
%highbit2 = and i32 -2147483648, %11
%SF3 = icmp ne i32 %highbit2, 0
%ZF4 = icmp eq i32 %11, 0
%12 = and i32 %11, 255
%13 = call i32 @llvm.ctpop.i32(i32 %12)
%14 = and i32 %13, 1
%PF5 = icmp eq i32 %14, 0
%CmpZF_JE17 = icmp eq i1 %ZF4, true
br i1 %CmpZF_JE17, label %bb.3, label %bb.2
bb.2: ; preds = %bb.1
%15 = inttoptr i64 %arg2 to ptr
store i64 240518168800, ptr %15, align 1
%16 = ptrtoint ptr %stktop_8 to i64
%17 = add i64 %16, 4
%18 = inttoptr i64 %17 to ptr
%memload6 = load i32, ptr %18, align 1
%19 = call ptr @sector_div()
%RAX7 = ptrtoint ptr %19 to i64
%20 = ptrtoint ptr %stktop_8 to i64
%21 = add i64 %20, 4
%22 = inttoptr i64 %21 to ptr
%memload8 = load i32, ptr %22, align 1
%memref-disp = add i64 %arg2, 8
%23 = inttoptr i64 %memref-disp to ptr
store i32 %memload8, ptr %23, align 1
store i32 0, ptr %EAX-SKT-LOC, align 1
br label %bb.5
bb.3: ; preds = %bb.1
%24 = inttoptr i64 %memload1 to ptr
%memload9 = load i64, ptr %24, align 1
%RSI10 = ptrtoint ptr @rodata_13 to i64
%25 = call ptr @dev_warn()
%RAX11 = ptrtoint ptr %25 to i64
br label %bb.4
bb.4: ; preds = %bb.3, %entry
%26 = load i32, ptr @ENOTTY, align 4
%EAX = sub i32 0, %26
%27 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 0, i32 %26)
%CF = extractvalue { i32, i1 } %27, 1
%ZF12 = icmp eq i32 %EAX, 0
%highbit13 = and i32 -2147483648, %EAX
%SF14 = icmp ne i32 %highbit13, 0
%28 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 0, i32 %26)
%OF = extractvalue { i32, i1 } %28, 1
%29 = and i32 %EAX, 255
%30 = call i32 @llvm.ctpop.i32(i32 %29)
%31 = and i32 %30, 1
%PF15 = icmp eq i32 %31, 0
store i32 %EAX, ptr %EAX-SKT-LOC, align 1
br label %bb.5
bb.5: ; preds = %bb.4, %bb.2
%EAX16 = load i32, ptr %EAX-SKT-LOC, align 1
ret i32 %EAX16
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/block/mtip32xx/extr_mtip32xx.c_mtip_block_getgeo.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/block/mtip32xx/extr_mtip32xx.c_mtip_block_getgeo.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENOTTY = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [31 x i8] c"Could not get drive capacity.\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @mtip_block_getgeo], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @mtip_block_getgeo(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) #0 {
%3 = alloca i32, align 4
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = load ptr, ptr %4, align 8, !tbaa !11
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, ptr @ENOTTY, align 4, !tbaa !13
%9 = sub nsw i32 0, %8
br label %23
10: ; preds = %2
%11 = call i32 @mtip_hw_get_capacity(ptr noundef nonnull %5, ptr noundef nonnull %3) #3
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %18
13: ; preds = %10
%14 = load ptr, ptr %5, align 8, !tbaa !15
%15 = call i32 @dev_warn(ptr noundef %14, ptr noundef nonnull @.str) #3
%16 = load i32, ptr @ENOTTY, align 4, !tbaa !13
%17 = sub nsw i32 0, %16
br label %23
18: ; preds = %10
store <2 x i32> <i32 224, i32 56>, ptr %1, align 4, !tbaa !13
%19 = load i32, ptr %3, align 4, !tbaa !13
%20 = call i32 @sector_div(i32 noundef %19, i32 noundef 12544) #3
%21 = load i32, ptr %3, align 4, !tbaa !13
%22 = getelementptr inbounds i8, ptr %1, i64 8
store i32 %21, ptr %22, align 4, !tbaa !17
br label %23
23: ; preds = %18, %13, %7
%24 = phi i32 [ 0, %18 ], [ %17, %13 ], [ %9, %7 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %24
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @mtip_hw_get_capacity(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dev_warn(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sector_div(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"block_device", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_3__", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!16, !8, i64 0}
!16 = !{!"driver_data", !8, i64 0}
!17 = !{!18, !14, i64 8}
!18 = !{!"hd_geometry", !14, i64 0, !14, i64 4, !14, i64 8}
| fastsocket_kernel_drivers_block_mtip32xx_extr_mtip32xx.c_mtip_block_getgeo |
; ModuleID = 'fastsocket_kernel_scripts_mod_extr_modpost.c_is_vmlinux.so'
source_filename = "fastsocket_kernel_scripts_mod_extr_modpost.c_is_vmlinux.so"
@0 = private unnamed_addr constant [18 x i8] c"vmlinux\00vmlinux.o\00", align 1, !ROData_SecInfo !0
declare dso_local ptr @strrchr(ptr, i32)
declare dso_local i32 @strcmp(ptr, ptr)
define dso_local i8 @is_vmlinux(i64 %arg1) {
entry:
%AL-SKT-LOC = alloca i32, align 4
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%1 = inttoptr i64 %arg1 to ptr
%2 = call ptr @strrchr(ptr %1, i32 47)
%RAX = ptrtoint ptr %2 to i64
%memref-disp = add i64 %RAX, 1
%3 = and i64 %RAX, %RAX
%highbit = and i64 -9223372036854775808, %3
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %3, 0
%4 = and i64 %3, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
%Cond_CMOVE = icmp eq i1 %ZF, true
%CMOV = select i1 %Cond_CMOVE, i64 %arg1, i64 %memref-disp
%7 = inttoptr i64 %CMOV to ptr
%EAX = call i32 @strcmp(ptr %7, ptr @0)
%8 = zext i32 %EAX to i64
%9 = zext i32 %EAX to i64
%10 = and i64 %8, %9
%highbit1 = and i64 -9223372036854775808, %10
%SF2 = icmp ne i64 %highbit1, 0
%ZF3 = icmp eq i64 %10, 0
%11 = and i64 %10, 255
%12 = call i64 @llvm.ctpop.i64(i64 %11)
%13 = and i64 %12, 1
%PF4 = icmp eq i64 %13, 0
%CmpZF_JE = icmp eq i1 %ZF3, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%14 = inttoptr i64 %CMOV to ptr
%EAX6 = call i32 @strcmp(ptr %14, ptr getelementptr inbounds ([18 x i8], ptr @0, i32 0, i32 8))
%RCX = zext i32 %EAX6 to i64
%15 = and i64 %RCX, %RCX
%highbit7 = and i64 -9223372036854775808, %15
%SF8 = icmp ne i64 %highbit7, 0
%ZF9 = icmp eq i64 %15, 0
%16 = and i64 %15, 255
%17 = call i64 @llvm.ctpop.i64(i64 %16)
%18 = and i64 %17, 1
%PF10 = icmp eq i64 %18, 0
%AL = icmp eq i1 %ZF9, true
%19 = zext i1 %AL to i32
store i32 %19, ptr %AL-SKT-LOC, align 1
br label %bb.3
bb.2: ; preds = %entry
store i32 1, ptr %AL-SKT-LOC, align 1
br label %bb.3
bb.3: ; preds = %bb.2, %bb.1
%20 = load i32, ptr %AL-SKT-LOC, align 1
%AL11 = trunc i32 %20 to i8
ret i8 %AL11
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/scripts/mod/extr_modpost.c_is_vmlinux.c'
source_filename = "AnghaBench/fastsocket/kernel/scripts/mod/extr_modpost.c_is_vmlinux.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [8 x i8] c"vmlinux\00", align 1
@.str.1 = private unnamed_addr constant [10 x i8] c"vmlinux.o\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @is_vmlinux], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @is_vmlinux(ptr noundef %0) #0 {
%2 = tail call ptr @strrchr(ptr noundef %0, i8 noundef signext 47) #2
%3 = icmp eq ptr %2, null
%4 = getelementptr inbounds i8, ptr %2, i64 1
%5 = select i1 %3, ptr %0, ptr %4
%6 = tail call i64 @strcmp(ptr noundef %5, ptr noundef nonnull @.str) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = tail call i64 @strcmp(ptr noundef %5, ptr noundef nonnull @.str.1) #2
%10 = icmp eq i64 %9, 0
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %8, %1
%13 = phi i32 [ 1, %1 ], [ %11, %8 ]
ret i32 %13
}
declare ptr @strrchr(ptr noundef, i8 noundef signext) local_unnamed_addr #1
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_scripts_mod_extr_modpost.c_is_vmlinux |
; ModuleID = 'linux_drivers_regulator_extr_tps6524x-regulator.c_write_field.so'
source_filename = "linux_drivers_regulator_extr_tps6524x-regulator.c_write_field.so"
@EOVERFLOW = common dso_local global i32 0, align 4
declare dso_local ptr @rmw_protect()
define dso_local i64 @write_field(i64 %arg1, i64 %arg2, i32 %arg3) {
entry:
%0 = inttoptr i64 %arg2 to ptr
%memload = load i32, ptr %0, align 1
%ECX = xor i32 %memload, -1
%1 = and i32 %ECX, %arg3
%highbit = and i32 -2147483648, %1
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %1, 0
%2 = and i32 %1, 255
%3 = call i32 @llvm.ctpop.i32(i32 %2)
%4 = and i32 %3, 1
%PF = icmp eq i32 %4, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%5 = load i32, ptr @EOVERFLOW, align 4
%EAX = sub i32 0, %5
%6 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 0, i32 %5)
%CF = extractvalue { i32, i1 } %6, 1
%ZF1 = icmp eq i32 %EAX, 0
%highbit2 = and i32 -2147483648, %EAX
%SF3 = icmp ne i32 %highbit2, 0
%7 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 0, i32 %5)
%OF = extractvalue { i32, i1 } %7, 1
%8 = and i32 %EAX, 255
%9 = call i32 @llvm.ctpop.i32(i32 %8)
%10 = and i32 %9, 1
%PF4 = icmp eq i32 %10, 0
%11 = inttoptr i32 %EAX to ptr
br label %UnifiedReturnBlock
bb.2: ; preds = %entry
%memref-disp = add i64 %arg2, 8
%12 = inttoptr i64 %memref-disp to ptr
%memload5 = load i32, ptr %12, align 1
%memref-disp6 = add i64 %arg2, 4
%13 = inttoptr i64 %memref-disp6 to ptr
%memload7 = load i32, ptr %13, align 1
%14 = trunc i32 %memload7 to i8
%ECX8 = zext i8 %14 to i32
%15 = trunc i32 %ECX8 to i8
%16 = zext i8 %15 to i32
%shift-cnt-msk = and i32 %16, 63
%EDX = shl i32 %memload, %shift-cnt-msk
%shrd_cf_count_cmp = icmp sgt i32 %shift-cnt-msk, 0
%17 = sub i32 32, %shift-cnt-msk
%shld_cf_count_shift = shl i32 1, %17
%shld_cf_count_and = and i32 %memload, %shld_cf_count_shift
%shld_cf_count_shft_out = icmp sgt i32 %shld_cf_count_and, 0
%shld_cf_update = select i1 %shrd_cf_count_cmp, i1 %shld_cf_count_shft_out, i1 false
%ZF9 = icmp eq i32 %EDX, 0
%highbit10 = and i32 -2147483648, %EDX
%SF11 = icmp ne i32 %highbit10, 0
%18 = trunc i32 %ECX8 to i8
%19 = zext i8 %18 to i32
%shift-cnt-msk12 = and i32 %19, 63
%EAX21 = shl i32 %arg3, %shift-cnt-msk12
%shrd_cf_count_cmp13 = icmp sgt i32 %shift-cnt-msk12, 0
%20 = sub i32 32, %shift-cnt-msk12
%shld_cf_count_shift14 = shl i32 1, %20
%shld_cf_count_and15 = and i32 %arg3, %shld_cf_count_shift14
%shld_cf_count_shft_out16 = icmp sgt i32 %shld_cf_count_and15, 0
%shld_cf_update17 = select i1 %shrd_cf_count_cmp13, i1 %shld_cf_count_shft_out16, i1 %shld_cf_update
%ZF18 = icmp eq i32 %EAX21, 0
%highbit19 = and i32 -2147483648, %EAX21
%SF20 = icmp ne i32 %highbit19, 0
%21 = tail call ptr @rmw_protect()
%RAX = ptrtoint ptr %21 to i64
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.2, %bb.1
%UnifiedRetVal = phi i64 [ %11, %bb.1 ], [ %RAX, %bb.2 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/regulator/extr_tps6524x-regulator.c_write_field.c'
source_filename = "AnghaBench/linux/drivers/regulator/extr_tps6524x-regulator.c_write_field.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EOVERFLOW = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @write_field], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @write_field(ptr noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2) #0 {
%4 = load i32, ptr %1, align 4, !tbaa !6
%5 = xor i32 %4, -1
%6 = and i32 %5, %2
%7 = icmp eq i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %3
%9 = load i32, ptr @EOVERFLOW, align 4, !tbaa !11
%10 = sub nsw i32 0, %9
br label %19
11: ; preds = %3
%12 = getelementptr inbounds i8, ptr %1, i64 8
%13 = load i32, ptr %12, align 4, !tbaa !12
%14 = getelementptr inbounds i8, ptr %1, i64 4
%15 = load i32, ptr %14, align 4, !tbaa !13
%16 = shl i32 %4, %15
%17 = shl i32 %2, %15
%18 = tail call i32 @rmw_protect(ptr noundef %0, i32 noundef %13, i32 noundef %16, i32 noundef %17) #2
br label %19
19: ; preds = %11, %8
%20 = phi i32 [ %10, %8 ], [ %18, %11 ]
ret i32 %20
}
declare i32 @rmw_protect(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"field", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!7, !8, i64 8}
!13 = !{!7, !8, i64 4}
| linux_drivers_regulator_extr_tps6524x-regulator.c_write_field |
; ModuleID = 'fastsocket_kernel_drivers_gpu_drm_radeon_extr_radeon_fence.c_radeon_fence_note_sync.so'
source_filename = "fastsocket_kernel_drivers_gpu_drm_radeon_extr_radeon_fence.c_radeon_fence_note_sync.so"
@RADEON_NUM_RINGS = common dso_local global i32 0, align 4
declare dso_local ptr @max()
define dso_local void @radeon_fence_note_sync(i64 %arg1, i32 %arg2) {
entry:
%EAX-SKT-LOC = alloca i32, align 4
%RBP-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%0 = and i64 %arg1, %arg1
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %0, 0
%1 = and i64 %0, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.8, label %bb.1
bb.1: ; preds = %entry
%4 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %4, align 1
%5 = trunc i64 %memload to i32
%R15 = sext i32 %5 to i64
%6 = trunc i64 %R15 to i32
%7 = sub i32 %6, %arg2
%8 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %6, i32 %arg2)
%CF = extractvalue { i32, i1 } %8, 1
%ZF1 = icmp eq i32 %7, 0
%highbit2 = and i32 -2147483648, %7
%SF3 = icmp ne i32 %highbit2, 0
%9 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %6, i32 %arg2)
%OF = extractvalue { i32, i1 } %9, 1
%10 = and i32 %7, 255
%11 = call i32 @llvm.ctpop.i32(i32 %10)
%12 = and i32 %11, 1
%PF4 = icmp eq i32 %12, 0
%CmpZF_JE45 = icmp eq i1 %ZF1, true
br i1 %CmpZF_JE45, label %bb.8, label %bb.2
bb.2: ; preds = %bb.1
%memload5 = load i32, ptr @RADEON_NUM_RINGS, align 1
%13 = and i32 %memload5, %memload5
%highbit6 = and i32 -2147483648, %13
%SF7 = icmp ne i32 %highbit6, 0
%ZF8 = icmp eq i32 %13, 0
%14 = and i32 %13, 255
%15 = call i32 @llvm.ctpop.i32(i32 %14)
%16 = and i32 %15, 1
%PF9 = icmp eq i32 %16, 0
store i32 %memload5, ptr %EAX-SKT-LOC, align 1
%CmpZF_JE46 = icmp eq i1 %ZF8, true
br i1 %CmpZF_JE46, label %bb.8, label %bb.3
bb.3: ; preds = %bb.2
%memref-disp = add i64 %arg1, 8
%17 = inttoptr i64 %memref-disp to ptr
%memload10 = load i64, ptr %17, align 1
%18 = inttoptr i64 %memload10 to ptr
%memload11 = load i64, ptr %18, align 1
%R12 = sext i32 %arg2 to i64
%19 = zext i32 0 to i64
store i64 %19, ptr %RBP-SKT-LOC, align 1
br label %bb.6
bb.6: ; preds = %bb.5, %bb.3
%RBP = load i64, ptr %RBP-SKT-LOC, align 1
%20 = zext i32 %arg2 to i64
%21 = sub i64 %20, %RBP
%22 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %20, i64 %RBP)
%CF12 = extractvalue { i64, i1 } %22, 1
%ZF13 = icmp eq i64 %21, 0
%highbit14 = and i64 -9223372036854775808, %21
%SF15 = icmp ne i64 %highbit14, 0
%23 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %20, i64 %RBP)
%OF16 = extractvalue { i64, i1 } %23, 1
%24 = and i64 %21, 255
%25 = call i64 @llvm.ctpop.i64(i64 %24)
%26 = and i64 %25, 1
%PF17 = icmp eq i64 %26, 0
%CmpZF_JE47 = icmp eq i1 %ZF13, true
br i1 %CmpZF_JE47, label %bb.5, label %bb.7
bb.7: ; preds = %bb.6
%memref-idxreg = mul i64 8, %R12
%memref-basereg = add i64 %memload11, %memref-idxreg
%27 = inttoptr i64 %memref-basereg to ptr
%memload18 = load i64, ptr %27, align 1
%memref-idxreg19 = mul i64 4, %RBP
%memref-basereg20 = add i64 %memload18, %memref-idxreg19
%28 = inttoptr i64 %memref-basereg20 to ptr
%memload21 = load i32, ptr %28, align 1
%memref-idxreg22 = mul i64 8, %R15
%memref-basereg23 = add i64 %memload11, %memref-idxreg22
%29 = inttoptr i64 %memref-basereg23 to ptr
%memload24 = load i64, ptr %29, align 1
%memref-idxreg25 = mul i64 4, %RBP
%memref-basereg26 = add i64 %memload24, %memref-idxreg25
%30 = inttoptr i64 %memref-basereg26 to ptr
%memload27 = load i32, ptr %30, align 1
%31 = call ptr @max()
%RAX = ptrtoint ptr %31 to i64
%memref-idxreg28 = mul i64 8, %R12
%memref-basereg29 = add i64 %memload11, %memref-idxreg28
%32 = inttoptr i64 %memref-basereg29 to ptr
%memload30 = load i64, ptr %32, align 1
%memref-idxreg31 = mul i64 4, %RBP
%memref-basereg32 = add i64 %memload30, %memref-idxreg31
%33 = trunc i64 %RAX to i32
%34 = inttoptr i64 %memref-basereg32 to ptr
store i32 %33, ptr %34, align 1
%memload33 = load i32, ptr @RADEON_NUM_RINGS, align 1
store i32 %memload33, ptr %EAX-SKT-LOC, align 1
br label %bb.5
bb.5: ; preds = %bb.7, %bb.6
%RBP38 = add i64 %RBP, 1
%35 = and i64 %RBP38, 255
%36 = call i64 @llvm.ctpop.i64(i64 %35)
%37 = and i64 %36, 1
%PF34 = icmp eq i64 %37, 0
%ZF35 = icmp eq i64 %RBP38, 0
%highbit36 = and i64 -9223372036854775808, %RBP38
%SF37 = icmp ne i64 %highbit36, 0
%EAX = load i32, ptr %EAX-SKT-LOC, align 1
%38 = zext i32 %EAX to i64
%39 = sub i64 %RBP38, %38
%40 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RBP38, i64 %38)
%CF39 = extractvalue { i64, i1 } %40, 1
%ZF40 = icmp eq i64 %39, 0
%highbit41 = and i64 -9223372036854775808, %39
%SF42 = icmp ne i64 %highbit41, 0
%41 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RBP38, i64 %38)
%OF43 = extractvalue { i64, i1 } %41, 1
%42 = and i64 %39, 255
%43 = call i64 @llvm.ctpop.i64(i64 %42)
%44 = and i64 %43, 1
%PF44 = icmp eq i64 %44, 0
%CFCmp_JAE = icmp eq i1 %CF39, false
store i64 %RBP38, ptr %RBP-SKT-LOC, align 1
br i1 %CFCmp_JAE, label %bb.8, label %bb.6
bb.8: ; preds = %bb.5, %bb.2, %bb.1, %entry
ret void
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/radeon/extr_radeon_fence.c_radeon_fence_note_sync.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/radeon/extr_radeon_fence.c_radeon_fence_note_sync.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.radeon_fence_driver = type { ptr }
@RADEON_NUM_RINGS = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @radeon_fence_note_sync(ptr noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %39, label %4
4: ; preds = %2
%5 = load i32, ptr %0, align 8, !tbaa !6
%6 = icmp eq i32 %5, %1
br i1 %6, label %39, label %7
7: ; preds = %4
%8 = getelementptr inbounds i8, ptr %0, i64 8
%9 = load ptr, ptr %8, align 8, !tbaa !12
%10 = load ptr, ptr %9, align 8, !tbaa !13
%11 = sext i32 %5 to i64
%12 = getelementptr inbounds %struct.radeon_fence_driver, ptr %10, i64 %11
%13 = sext i32 %1 to i64
%14 = getelementptr inbounds %struct.radeon_fence_driver, ptr %10, i64 %13
%15 = load i32, ptr @RADEON_NUM_RINGS, align 4, !tbaa !15
%16 = icmp eq i32 %15, 0
br i1 %16, label %39, label %17
17: ; preds = %7
%18 = zext i32 %1 to i64
br label %19
19: ; preds = %17, %34
%20 = phi i32 [ %15, %17 ], [ %35, %34 ]
%21 = phi i64 [ 0, %17 ], [ %36, %34 ]
%22 = icmp eq i64 %21, %18
br i1 %22, label %34, label %23
23: ; preds = %19
%24 = load ptr, ptr %14, align 8, !tbaa !16
%25 = getelementptr inbounds i32, ptr %24, i64 %21
%26 = load i32, ptr %25, align 4, !tbaa !15
%27 = load ptr, ptr %12, align 8, !tbaa !16
%28 = getelementptr inbounds i32, ptr %27, i64 %21
%29 = load i32, ptr %28, align 4, !tbaa !15
%30 = tail call i32 @max(i32 noundef %26, i32 noundef %29) #2
%31 = load ptr, ptr %14, align 8, !tbaa !16
%32 = getelementptr inbounds i32, ptr %31, i64 %21
store i32 %30, ptr %32, align 4, !tbaa !15
%33 = load i32, ptr @RADEON_NUM_RINGS, align 4, !tbaa !15
br label %34
34: ; preds = %19, %23
%35 = phi i32 [ %20, %19 ], [ %33, %23 ]
%36 = add nuw nsw i64 %21, 1
%37 = zext i32 %35 to i64
%38 = icmp ult i64 %36, %37
br i1 %38, label %19, label %39, !llvm.loop !18
39: ; preds = %34, %7, %4, %2
ret void
}
declare i32 @max(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"radeon_fence", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!14, !11, i64 0}
!14 = !{!"TYPE_2__", !11, i64 0}
!15 = !{!8, !8, i64 0}
!16 = !{!17, !11, i64 0}
!17 = !{!"radeon_fence_driver", !11, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
| fastsocket_kernel_drivers_gpu_drm_radeon_extr_radeon_fence.c_radeon_fence_note_sync |
; ModuleID = 'ccv_lib_extr_ccv_util.c_ccv_array_clear.so'
source_filename = "ccv_lib_extr_ccv_util.c_ccv_array_clear.so"
define dso_local void @ccv_array_clear(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%1 = sext i32 0 to i64
store i64 %1, ptr %0, align 1
ret void
}
| ; ModuleID = 'AnghaBench/ccv/lib/extr_ccv_util.c_ccv_array_clear.c'
source_filename = "AnghaBench/ccv/lib/extr_ccv_util.c_ccv_array_clear.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync)
define void @ccv_array_clear(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
store i64 0, ptr %0, align 8, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| ccv_lib_extr_ccv_util.c_ccv_array_clear |
; ModuleID = 'linux_net_ipv6_extr_..bridgebr_private.h_br_sysfs_delbr.so'
source_filename = "linux_net_ipv6_extr_..bridgebr_private.h_br_sysfs_delbr.so"
define dso_local void @br_sysfs_delbr() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/linux/net/ipv6/extr_..bridgebr_private.h_br_sysfs_delbr.c'
source_filename = "AnghaBench/linux/net/ipv6/extr_..bridgebr_private.h_br_sysfs_delbr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @br_sysfs_delbr], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @br_sysfs_delbr(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_net_ipv6_extr_..bridgebr_private.h_br_sysfs_delbr |
; ModuleID = 'linux_drivers_infiniband_hw_hfi1_extr_chip.c_egress_err_info_string.so'
source_filename = "linux_drivers_infiniband_hw_hfi1_extr_chip.c_egress_err_info_string.so"
@egress_err_info_flags = common dso_local global i32 0, align 4
declare dso_local ptr @ARRAY_SIZE()
declare dso_local ptr @flag_string()
define dso_local i64 @egress_err_info_string(i64 %arg1, i32 %arg2, i32 %arg3) {
entry:
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memload = load i32, ptr @egress_err_info_flags, align 1
%1 = call ptr @ARRAY_SIZE()
%RAX = ptrtoint ptr %1 to i64
%R8D = trunc i64 %RAX to i32
%2 = tail call ptr @flag_string()
%RAX1 = ptrtoint ptr %2 to i64
ret i64 %RAX1
}
| ; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/hfi1/extr_chip.c_egress_err_info_string.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/hfi1/extr_chip.c_egress_err_info_string.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@egress_err_info_flags = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @egress_err_info_string], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @egress_err_info_string(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load i32, ptr @egress_err_info_flags, align 4, !tbaa !6
%5 = tail call i32 @ARRAY_SIZE(i32 noundef %4) #2
%6 = tail call ptr @flag_string(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %4, i32 noundef %5) #2
ret ptr %6
}
declare ptr @flag_string(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_infiniband_hw_hfi1_extr_chip.c_egress_err_info_string |
; ModuleID = 'DOOM_linuxdoom-1.10_extr_am_map.c_AM_drawCrosshair.so'
source_filename = "DOOM_linuxdoom-1.10_extr_am_map.c_AM_drawCrosshair.so"
@fb = common dso_local global i64 0, align 8
@f_w = common dso_local global i32 0, align 4
@f_h = common dso_local global i32 0, align 4
define dso_local i64 @AM_drawCrosshair(i32 %arg1) {
entry:
%memload = load i64, ptr @fb, align 1
%memload1 = load i32, ptr @f_h, align 1
%EDX = add i32 %memload1, 1
%0 = and i32 %EDX, 255
%1 = call i32 @llvm.ctpop.i32(i32 %0)
%2 = and i32 %1, 1
%PF = icmp eq i32 %2, 0
%ZF = icmp eq i32 %EDX, 0
%highbit = and i32 -2147483648, %EDX
%SF = icmp ne i32 %highbit, 0
%memload2 = load i32, ptr @f_w, align 1
%EDX3 = mul i32 %EDX, %memload2
%ECX = lshr i32 %EDX3, 31
%ZF4 = icmp eq i32 %ECX, 0
%highbit5 = and i32 -2147483648, %ECX
%SF6 = icmp ne i32 %highbit5, 0
%ECX10 = add nsw i32 %ECX, %EDX3
%highbit7 = and i32 -2147483648, %ECX10
%SF8 = icmp ne i32 %highbit7, 0
%ZF9 = icmp eq i32 %ECX10, 0
%ECX14 = lshr i32 %ECX10, 1
%ZF11 = icmp eq i32 %ECX14, 0
%highbit12 = and i32 -2147483648, %ECX14
%SF13 = icmp ne i32 %highbit12, 0
%RCX = sext i32 %ECX14 to i64
%memref-idxreg = mul i64 4, %RCX
%memref-basereg = add i64 %memload, %memref-idxreg
%3 = inttoptr i64 %memref-basereg to ptr
store i32 %arg1, ptr %3, align 1
ret i64 %memload
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/DOOM/linuxdoom-1.10/extr_am_map.c_AM_drawCrosshair.c'
source_filename = "AnghaBench/DOOM/linuxdoom-1.10/extr_am_map.c_AM_drawCrosshair.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@fb = common local_unnamed_addr global ptr null, align 8
@f_w = common local_unnamed_addr global i32 0, align 4
@f_h = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: write, inaccessiblemem: none) uwtable(sync)
define void @AM_drawCrosshair(i32 noundef %0) local_unnamed_addr #0 {
%2 = load ptr, ptr @fb, align 8, !tbaa !6
%3 = load i32, ptr @f_w, align 4, !tbaa !10
%4 = load i32, ptr @f_h, align 4, !tbaa !10
%5 = add nsw i32 %4, 1
%6 = mul nsw i32 %5, %3
%7 = sdiv i32 %6, 2
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, ptr %2, i64 %8
store i32 %0, ptr %9, align 4, !tbaa !10
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| DOOM_linuxdoom-1.10_extr_am_map.c_AM_drawCrosshair |
; ModuleID = 'kphp-kdb_vkext_extr_vkext_schema_memcache.c_tls_pop.so'
source_filename = "kphp-kdb_vkext_extr_vkext_schema_memcache.c_tls_pop.so"
define dso_local void @tls_pop() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/kphp-kdb/vkext/extr_vkext_schema_memcache.c_tls_pop.c'
source_filename = "AnghaBench/kphp-kdb/vkext/extr_vkext_schema_memcache.c_tls_pop.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TLUNI_NEXT = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noalias ptr @tls_pop(ptr nocapture noundef readnone %0, ptr nocapture noundef readnone %1, ptr nocapture noundef readnone %2, ptr nocapture noundef readnone %3) local_unnamed_addr #0 {
ret ptr undef
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| kphp-kdb_vkext_extr_vkext_schema_memcache.c_tls_pop |
; ModuleID = 'linux_drivers_staging_rtl8188eu_hal_extr_rtl8188e_hal_init.c_iol_mode_enable.so'
source_filename = "linux_drivers_staging_rtl8188eu_hal_extr_rtl8188e_hal_init.c_iol_mode_enable.so"
@REG_SYS_CFG = common dso_local global i32 0, align 4
@SW_OFFLOAD_EN = common dso_local global i32 0, align 4
@rodata_13 = private unnamed_addr constant [38 x i8] c"bFWReady == false call reset 8051...\0A\00", align 1, !ROData_SecInfo !0
declare dso_local ptr @usb_read8()
declare dso_local ptr @usb_write8()
declare dso_local ptr @DBG_88E()
declare dso_local ptr @_8051Reset88E()
define dso_local i64 @iol_mode_enable(i64 %arg1, i32 %arg2) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%memload = load i32, ptr @REG_SYS_CFG, align 1
%0 = call ptr @usb_read8()
%RAX = ptrtoint ptr %0 to i64
%memload1 = load i32, ptr @REG_SYS_CFG, align 1
%memload2 = load i32, ptr @SW_OFFLOAD_EN, align 1
%1 = and i32 %arg2, %arg2
%highbit = and i32 -2147483648, %1
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %1, 0
%2 = and i32 %1, 255
%3 = call i32 @llvm.ctpop.i32(i32 %2)
%4 = and i32 %3, 1
%PF = icmp eq i32 %4, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%5 = trunc i64 %RAX to i32
%EDX = or i32 %memload2, %5
%highbit3 = and i32 -2147483648, %EDX
%SF4 = icmp ne i32 %highbit3, 0
%ZF5 = icmp eq i32 %EDX, 0
%6 = and i32 %EDX, 255
%7 = call i32 @llvm.ctpop.i32(i32 %6)
%8 = and i32 %7, 1
%PF6 = icmp eq i32 %8, 0
%9 = call ptr @usb_write8()
%10 = inttoptr i64 %arg1 to ptr
%11 = load i32, ptr %10, align 1
%12 = zext i32 %11 to i64
%13 = zext i32 0 to i64
%14 = sub i64 %12, %13
%15 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %12, i64 %13)
%CF = extractvalue { i64, i1 } %15, 1
%ZF8 = icmp eq i64 %14, 0
%highbit9 = and i64 -9223372036854775808, %14
%SF10 = icmp ne i64 %highbit9, 0
%16 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %12, i64 %13)
%OF = extractvalue { i64, i1 } %16, 1
%17 = and i64 %14, 255
%18 = call i64 @llvm.ctpop.i64(i64 %17)
%19 = and i64 %18, 1
%PF11 = icmp eq i64 %19, 0
%CmpZF_JE7 = icmp eq i1 %ZF8, true
br i1 %CmpZF_JE7, label %bb.4, label %bb.2
bb.2: ; preds = %bb.1
br label %UnifiedReturnBlock
bb.4: ; preds = %bb.1
%RDI = ptrtoint ptr @rodata_13 to i64
%20 = call ptr @DBG_88E()
%RAX12 = ptrtoint ptr %20 to i64
%21 = tail call ptr @_8051Reset88E()
%RAX13 = ptrtoint ptr %21 to i64
br label %UnifiedReturnBlock
bb.3: ; preds = %entry
%EDX1 = xor i32 %memload2, -1
%22 = trunc i64 %RAX to i32
%EAX = and i32 %22, %EDX1
%highbit2 = and i32 -2147483648, %EAX
%SF3 = icmp ne i32 %highbit2, 0
%ZF4 = icmp eq i32 %EAX, 0
%23 = and i32 %EAX, 255
%24 = call i32 @llvm.ctpop.i32(i32 %23)
%25 = and i32 %24, 1
%PF5 = icmp eq i32 %25, 0
%26 = tail call ptr @usb_write8()
%RAX6 = ptrtoint ptr %26 to i64
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.3, %bb.4, %bb.2
%UnifiedRetVal = phi i64 [ %9, %bb.2 ], [ %RAX13, %bb.4 ], [ %RAX6, %bb.3 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
!0 = !{i64 8192}
| ; ModuleID = 'AnghaBench/linux/drivers/staging/rtl8188eu/hal/extr_rtl8188e_hal_init.c_iol_mode_enable.c'
source_filename = "AnghaBench/linux/drivers/staging/rtl8188eu/hal/extr_rtl8188e_hal_init.c_iol_mode_enable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@REG_SYS_CFG = common local_unnamed_addr global i32 0, align 4
@SW_OFFLOAD_EN = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [38 x i8] c"bFWReady == false call reset 8051...\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @iol_mode_enable(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq i32 %1, 0
%4 = load i32, ptr @REG_SYS_CFG, align 4, !tbaa !6
%5 = tail call i32 @usb_read8(ptr noundef %0, i32 noundef %4) #2
%6 = load i32, ptr @REG_SYS_CFG, align 4, !tbaa !6
%7 = load i32, ptr @SW_OFFLOAD_EN, align 4, !tbaa !6
br i1 %3, label %16, label %8
8: ; preds = %2
%9 = or i32 %7, %5
%10 = tail call i32 @usb_write8(ptr noundef %0, i32 noundef %6, i32 noundef %9) #2
%11 = load i32, ptr %0, align 4, !tbaa !10
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %20
13: ; preds = %8
%14 = tail call i32 @DBG_88E(ptr noundef nonnull @.str) #2
%15 = tail call i32 @_8051Reset88E(ptr noundef nonnull %0) #2
br label %20
16: ; preds = %2
%17 = xor i32 %7, -1
%18 = and i32 %5, %17
%19 = tail call i32 @usb_write8(ptr noundef %0, i32 noundef %6, i32 noundef %18) #2
br label %20
20: ; preds = %8, %13, %16
ret void
}
declare i32 @usb_read8(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @usb_write8(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DBG_88E(ptr noundef) local_unnamed_addr #1
declare i32 @_8051Reset88E(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"adapter", !7, i64 0}
| linux_drivers_staging_rtl8188eu_hal_extr_rtl8188e_hal_init.c_iol_mode_enable |
; ModuleID = 'darwin-xnu_osfmk_arm64_extr_machine_routines.c_ml_cause_interrupt.so'
source_filename = "darwin-xnu_osfmk_arm64_extr_machine_routines.c_ml_cause_interrupt.so"
define dso_local void @ml_cause_interrupt() {
entry:
ret void
}
| ; ModuleID = 'AnghaBench/darwin-xnu/osfmk/arm64/extr_machine_routines.c_ml_cause_interrupt.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/arm64/extr_machine_routines.c_ml_cause_interrupt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define void @ml_cause_interrupt() local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| darwin-xnu_osfmk_arm64_extr_machine_routines.c_ml_cause_interrupt |
; ModuleID = 'freebsd_contrib_libdivsufsort_lib_extr_utils.c__compare.so'
source_filename = "freebsd_contrib_libdivsufsort_lib_extr_utils.c__compare.so"
define dso_local i64 @_compare(i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %arg5, i64 %arg6) {
entry:
%R10-SKT-LOC41 = alloca i64, align 8
%R10-SKT-LOC = alloca i64, align 8
%0 = inttoptr i64 %arg6 to ptr
%memload = load i64, ptr %0, align 1
%memref-basereg = add i64 %memload, %arg5
%1 = sub i64 %memref-basereg, %arg2
%2 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memref-basereg, i64 %arg2)
%CF = extractvalue { i64, i1 } %2, 1
%ZF = icmp eq i64 %1, 0
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%3 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memref-basereg, i64 %arg2)
%OF = extractvalue { i64, i1 } %3, 1
%4 = and i64 %1, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
store i64 %memload, ptr %R10-SKT-LOC, align 1
store i64 %memload, ptr %R10-SKT-LOC41, align 1
%CFCmp_JAE = icmp eq i1 %CF, false
br i1 %CFCmp_JAE, label %bb.6, label %bb.1
bb.1: ; preds = %entry
%7 = sub i64 %memload, %arg4
%8 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload, i64 %arg4)
%CF1 = extractvalue { i64, i1 } %8, 1
%ZF2 = icmp eq i64 %7, 0
%highbit3 = and i64 -9223372036854775808, %7
%SF4 = icmp ne i64 %highbit3, 0
%9 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload, i64 %arg4)
%OF5 = extractvalue { i64, i1 } %9, 1
%10 = and i64 %7, 255
%11 = call i64 @llvm.ctpop.i64(i64 %10)
%12 = and i64 %11, 1
%PF6 = icmp eq i64 %12, 0
%CFCmp_JAE57 = icmp eq i1 %CF1, false
br i1 %CFCmp_JAE57, label %bb.6, label %bb.2
bb.2: ; preds = %bb.1
%memref-idxreg = mul i64 8, %arg5
%memref-basereg7 = add i64 %arg1, %memref-idxreg
%R8 = add i64 %arg5, 1
%13 = and i64 %R8, 255
%14 = call i64 @llvm.ctpop.i64(i64 %13)
%15 = and i64 %14, 1
%PF8 = icmp eq i64 %15, 0
%ZF9 = icmp eq i64 %R8, 0
%highbit10 = and i64 -9223372036854775808, %R8
%SF11 = icmp ne i64 %highbit10, 0
br label %bb.3
bb.3: ; preds = %bb.2, %bb.5
%R10 = load i64, ptr %R10-SKT-LOC, align 1
%memref-idxreg12 = mul i64 8, %R10
%memref-basereg13 = add i64 %memref-basereg7, %memref-idxreg12
%16 = inttoptr i64 %memref-basereg13 to ptr
%memload14 = load i64, ptr %16, align 1
%memref-idxreg15 = mul i64 8, %R10
%memref-basereg16 = add i64 %arg3, %memref-idxreg15
%17 = inttoptr i64 %memref-basereg16 to ptr
%18 = load i64, ptr %17, align 1
%RAX = sub i64 %memload14, %18
%19 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload14, i64 %18)
%CF17 = extractvalue { i64, i1 } %19, 1
%ZF18 = icmp eq i64 %RAX, 0
%highbit19 = and i64 -9223372036854775808, %RAX
%SF20 = icmp ne i64 %highbit19, 0
%20 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload14, i64 %18)
%OF21 = extractvalue { i64, i1 } %20, 1
%21 = and i64 %RAX, 255
%22 = call i64 @llvm.ctpop.i64(i64 %21)
%23 = and i64 %22, 1
%PF22 = icmp eq i64 %23, 0
%CmpZF_JNE = icmp eq i1 %ZF18, false
br i1 %CmpZF_JNE, label %bb.7, label %bb.4
bb.4: ; preds = %bb.3
%memref-basereg23 = add i64 %R8, %R10
%R1028 = add i64 %R10, 1
%24 = and i64 %R1028, 255
%25 = call i64 @llvm.ctpop.i64(i64 %24)
%26 = and i64 %25, 1
%PF24 = icmp eq i64 %26, 0
%ZF25 = icmp eq i64 %R1028, 0
%highbit26 = and i64 -9223372036854775808, %R1028
%SF27 = icmp ne i64 %highbit26, 0
%27 = sub i64 %memref-basereg23, %arg2
%28 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memref-basereg23, i64 %arg2)
%CF29 = extractvalue { i64, i1 } %28, 1
%ZF30 = icmp eq i64 %27, 0
%highbit31 = and i64 -9223372036854775808, %27
%SF32 = icmp ne i64 %highbit31, 0
%29 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memref-basereg23, i64 %arg2)
%OF33 = extractvalue { i64, i1 } %29, 1
%30 = and i64 %27, 255
%31 = call i64 @llvm.ctpop.i64(i64 %30)
%32 = and i64 %31, 1
%PF34 = icmp eq i64 %32, 0
store i64 %R1028, ptr %R10-SKT-LOC41, align 1
%CFCmp_JAE58 = icmp eq i1 %CF29, false
store i64 %R1028, ptr %R10-SKT-LOC, align 1
br i1 %CFCmp_JAE58, label %bb.6, label %bb.5
bb.5: ; preds = %bb.4
%ld-stk-prom43 = load i64, ptr %R10-SKT-LOC41, align 8
%33 = sub i64 %ld-stk-prom43, %arg4
%ld-stk-prom42 = load i64, ptr %R10-SKT-LOC41, align 8
%34 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %ld-stk-prom42, i64 %arg4)
%CF35 = extractvalue { i64, i1 } %34, 1
%ZF36 = icmp eq i64 %33, 0
%highbit37 = and i64 -9223372036854775808, %33
%SF38 = icmp ne i64 %highbit37, 0
%ld-stk-prom = load i64, ptr %R10-SKT-LOC41, align 8
%35 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %ld-stk-prom, i64 %arg4)
%OF39 = extractvalue { i64, i1 } %35, 1
%36 = and i64 %33, 255
%37 = call i64 @llvm.ctpop.i64(i64 %36)
%38 = and i64 %37, 1
%PF40 = icmp eq i64 %38, 0
%CmpCF_JB = icmp eq i1 %CF35, true
br i1 %CmpCF_JB, label %bb.3, label %bb.6
bb.7: ; preds = %bb.3
%39 = inttoptr i64 %arg6 to ptr
store i64 %R10, ptr %39, align 1
br label %UnifiedReturnBlock
bb.6: ; preds = %bb.5, %bb.4, %bb.1, %entry
%R1044 = load i64, ptr %R10-SKT-LOC41, align 1
%40 = inttoptr i64 %arg6 to ptr
store i64 %R1044, ptr %40, align 1
%41 = sub i64 %R1044, %arg4
%42 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %R1044, i64 %arg4)
%CF45 = extractvalue { i64, i1 } %42, 1
%ZF46 = icmp eq i64 %41, 0
%highbit47 = and i64 -9223372036854775808, %41
%SF48 = icmp ne i64 %highbit47, 0
%43 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %R1044, i64 %arg4)
%OF49 = extractvalue { i64, i1 } %43, 1
%44 = and i64 %41, 255
%45 = call i64 @llvm.ctpop.i64(i64 %44)
%46 = and i64 %45, 1
%PF50 = icmp eq i64 %46, 0
%AL = icmp eq i1 %ZF46, false
%47 = zext i1 %AL to i64
%CF51 = icmp ne i64 0, 0
%RAX56 = sub i64 0, %47
%ZF52 = icmp eq i64 %RAX56, 0
%highbit53 = and i64 -9223372036854775808, %RAX56
%SF54 = icmp ne i64 %highbit53, 0
%48 = and i64 %RAX56, 255
%49 = call i64 @llvm.ctpop.i64(i64 %48)
%50 = and i64 %49, 1
%PF55 = icmp eq i64 %50, 0
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.6, %bb.7
%UnifiedRetVal = phi i64 [ %RAX, %bb.7 ], [ %RAX56, %bb.6 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/freebsd/contrib/libdivsufsort/lib/extr_utils.c__compare.c'
source_filename = "AnghaBench/freebsd/contrib/libdivsufsort/lib/extr_utils.c__compare.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @_compare], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(argmem: readwrite) uwtable(sync)
define internal i32 @_compare(ptr nocapture noundef readonly %0, i64 noundef %1, ptr nocapture noundef readonly %2, i64 noundef %3, i64 noundef %4, ptr nocapture noundef %5) #0 {
%7 = load i64, ptr %5, align 8, !tbaa !6
%8 = add i64 %7, %4
%9 = icmp ult i64 %8, %1
%10 = icmp ult i64 %7, %3
%11 = and i1 %9, %10
br i1 %11, label %12, label %28
12: ; preds = %6, %21
%13 = phi i64 [ %23, %21 ], [ %7, %6 ]
%14 = phi i64 [ %22, %21 ], [ %8, %6 ]
%15 = getelementptr inbounds i64, ptr %0, i64 %14
%16 = load i64, ptr %15, align 8, !tbaa !6
%17 = getelementptr inbounds i64, ptr %2, i64 %13
%18 = load i64, ptr %17, align 8, !tbaa !6
%19 = sub nsw i64 %16, %18
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %27
21: ; preds = %12
%22 = add nuw i64 %14, 1
%23 = add nuw i64 %13, 1
%24 = icmp ult i64 %22, %1
%25 = icmp ult i64 %23, %3
%26 = select i1 %24, i1 %25, i1 false
br i1 %26, label %12, label %28, !llvm.loop !10
27: ; preds = %12
store i64 %13, ptr %5, align 8, !tbaa !6
br label %32
28: ; preds = %21, %6
%29 = phi i64 [ %7, %6 ], [ %23, %21 ]
store i64 %29, ptr %5, align 8, !tbaa !6
%30 = icmp ne i64 %29, %3
%31 = sext i1 %30 to i64
br label %32
32: ; preds = %27, %28
%33 = phi i64 [ %31, %28 ], [ %19, %27 ]
%34 = trunc i64 %33 to i32
ret i32 %34
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| freebsd_contrib_libdivsufsort_lib_extr_utils.c__compare |
; ModuleID = 'radare2_libr_anal_extr_esil.c_esil_mem_lsreq4.so'
source_filename = "radare2_libr_anal_extr_esil.c_esil_mem_lsreq4.so"
declare dso_local ptr @esil_mem_lsreq_n()
define dso_local i64 @esil_mem_lsreq4() {
entry:
%0 = tail call ptr @esil_mem_lsreq_n()
%RAX = ptrtoint ptr %0 to i64
ret i64 %RAX
}
| ; ModuleID = 'AnghaBench/radare2/libr/anal/extr_esil.c_esil_mem_lsreq4.c'
source_filename = "AnghaBench/radare2/libr/anal/extr_esil.c_esil_mem_lsreq4.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @esil_mem_lsreq4], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @esil_mem_lsreq4(ptr noundef %0) #0 {
%2 = tail call i32 @esil_mem_lsreq_n(ptr noundef %0, i32 noundef 32) #2
ret i32 %2
}
declare i32 @esil_mem_lsreq_n(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| radare2_libr_anal_extr_esil.c_esil_mem_lsreq4 |
; ModuleID = 'FFmpeg_libavformat_extr_rtpenc.c_rtp_send_mpegaudio.so'
source_filename = "FFmpeg_libavformat_extr_rtpenc.c_rtp_send_mpegaudio.so"
declare dso_local ptr @ff_rtp_send_data()
declare dso_local ptr @memcpy(ptr, ptr, i64)
define dso_local i64 @rtp_send_mpegaudio(i64 %arg1, i64 %arg2, i32 %arg3) {
entry:
%RAX-SKT-LOC = alloca i64, align 8
%R14-SKT-LOC = alloca i64, align 8
%R15D-SKT-LOC = alloca i64, align 8
%R12D-SKT-LOC = alloca i64, align 8
%RDI-SKT-LOC = alloca i64, align 8
%RSI-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%1 = inttoptr i64 %memload to ptr
%memload1 = load i32, ptr %1, align 1
%memref-disp = add i64 %memload, 8
%2 = inttoptr i64 %memref-disp to ptr
%memload2 = load i64, ptr %2, align 1
%memref-disp3 = add i64 %memload, 16
%3 = inttoptr i64 %memref-disp3 to ptr
%memload4 = load i64, ptr %3, align 1
%RDX = sub i64 %memload2, %memload4
%4 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %memload2, i64 %memload4)
%CF = extractvalue { i64, i1 } %4, 1
%ZF = icmp eq i64 %RDX, 0
%highbit = and i64 -9223372036854775808, %RDX
%SF = icmp ne i64 %highbit, 0
%5 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %memload2, i64 %memload4)
%OF = extractvalue { i64, i1 } %5, 1
%6 = and i64 %RDX, 255
%7 = call i64 @llvm.ctpop.i64(i64 %6)
%8 = and i64 %7, 1
%PF = icmp eq i64 %8, 0
%RDX8 = lshr i64 %RDX, 2
%ZF5 = icmp eq i64 %RDX8, 0
%highbit6 = and i64 -9223372036854775808, %RDX8
%SF7 = icmp ne i64 %highbit6, 0
%9 = trunc i64 %RDX8 to i32
%10 = trunc i64 5 to i32
%11 = sub i32 %9, %10
%12 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %9, i32 %10)
%CF9 = extractvalue { i32, i1 } %12, 1
%ZF10 = icmp eq i32 %11, 0
%highbit11 = and i32 -2147483648, %11
%SF12 = icmp ne i32 %highbit11, 0
%13 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %9, i32 %10)
%OF13 = extractvalue { i32, i1 } %13, 1
%14 = and i32 %11, 255
%15 = call i32 @llvm.ctpop.i32(i32 %14)
%16 = and i32 %15, 1
%PF14 = icmp eq i32 %16, 0
store i64 %memload4, ptr %RSI-SKT-LOC, align 1
store i64 %memload2, ptr %RDI-SKT-LOC, align 1
%17 = zext i32 %arg3 to i64
store i64 %17, ptr %R12D-SKT-LOC, align 1
store i64 %arg2, ptr %R14-SKT-LOC, align 1
%SFAndOF_JL = icmp ne i1 %SF12, %OF13
br i1 %SFAndOF_JL, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%18 = zext i32 %arg3 to i64
%memref-basereg = add i64 %RDX8, %18
%EAX = trunc i64 %memref-basereg to i32
%19 = sub i32 %EAX, %memload1
%20 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EAX, i32 %memload1)
%CF15 = extractvalue { i32, i1 } %20, 1
%ZF16 = icmp eq i32 %19, 0
%highbit17 = and i32 -2147483648, %19
%SF18 = icmp ne i32 %highbit17, 0
%21 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EAX, i32 %memload1)
%OF19 = extractvalue { i32, i1 } %21, 1
%22 = and i32 %19, 255
%23 = call i32 @llvm.ctpop.i32(i32 %22)
%24 = and i32 %23, 1
%PF20 = icmp eq i32 %24, 0
%CmpZF_JLE = icmp eq i1 %ZF16, true
%CmpOF_JLE = icmp ne i1 %SF18, %OF19
%ZFOrSF_JLE = or i1 %CmpZF_JLE, %CmpOF_JLE
br i1 %ZFOrSF_JLE, label %bb.3, label %bb.2
bb.2: ; preds = %bb.1
%25 = call ptr @ff_rtp_send_data()
%RAX = ptrtoint ptr %25 to i64
%memref-disp21 = add i64 %memload, 16
%26 = inttoptr i64 %memref-disp21 to ptr
%memload22 = load i64, ptr %26, align 1
%memref-disp23 = add i64 %memload22, 16
%memref-disp24 = add i64 %memload, 8
%27 = inttoptr i64 %memref-disp24 to ptr
store i64 %memref-disp23, ptr %27, align 1
store i64 %memload22, ptr %RSI-SKT-LOC, align 1
store i64 %memref-disp23, ptr %RDI-SKT-LOC, align 1
br label %bb.3
bb.3: ; preds = %bb.2, %bb.1, %entry
%RSI = load i64, ptr %RSI-SKT-LOC, align 1
%memref-disp25 = add i64 %RSI, 16
%RDI = load i64, ptr %RDI-SKT-LOC, align 1
%28 = sub i64 %RDI, %memref-disp25
%29 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RDI, i64 %memref-disp25)
%CF26 = extractvalue { i64, i1 } %29, 1
%ZF27 = icmp eq i64 %28, 0
%highbit28 = and i64 -9223372036854775808, %28
%SF29 = icmp ne i64 %highbit28, 0
%30 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RDI, i64 %memref-disp25)
%OF30 = extractvalue { i64, i1 } %30, 1
%31 = and i64 %28, 255
%32 = call i64 @llvm.ctpop.i64(i64 %31)
%33 = and i64 %32, 1
%PF31 = icmp eq i64 %33, 0
store i64 %memref-disp25, ptr %RAX-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF27, true
br i1 %CmpZF_JE, label %bb.6, label %bb.4
bb.4: ; preds = %bb.3
%34 = sub i32 %memload1, %arg3
%35 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload1, i32 %arg3)
%CF32 = extractvalue { i32, i1 } %35, 1
%ZF33 = icmp eq i32 %34, 0
%highbit34 = and i32 -2147483648, %34
%SF35 = icmp ne i32 %highbit34, 0
%36 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload1, i32 %arg3)
%OF36 = extractvalue { i32, i1 } %36, 1
%37 = and i32 %34, 255
%38 = call i32 @llvm.ctpop.i32(i32 %37)
%39 = and i32 %38, 1
%PF37 = icmp eq i32 %39, 0
%SFAndOF_JL106 = icmp ne i1 %SF35, %OF36
br i1 %SFAndOF_JL106, label %bb.7, label %bb.5
bb.5: ; preds = %bb.4
br label %bb.12
bb.6: ; preds = %bb.3
%memref-disp38 = add i64 %memload, 24
%40 = inttoptr i64 %memref-disp38 to ptr
%memload39 = load i32, ptr %40, align 1
%memref-disp40 = add i64 %memload, 28
%41 = inttoptr i64 %memref-disp40 to ptr
store i32 %memload39, ptr %41, align 1
%42 = sub i32 %memload1, %arg3
%43 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload1, i32 %arg3)
%CF41 = extractvalue { i32, i1 } %43, 1
%ZF42 = icmp eq i32 %42, 0
%highbit43 = and i32 -2147483648, %42
%SF44 = icmp ne i32 %highbit43, 0
%44 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload1, i32 %arg3)
%OF45 = extractvalue { i32, i1 } %44, 1
%45 = and i32 %42, 255
%46 = call i32 @llvm.ctpop.i32(i32 %45)
%47 = and i32 %46, 1
%PF46 = icmp eq i32 %47, 0
%48 = zext i32 %memload39 to i64
store i64 %48, ptr %RAX-SKT-LOC, align 1
%CmpSFOF_JGE = icmp eq i1 %SF44, %OF45
br i1 %CmpSFOF_JGE, label %bb.11, label %bb.7
bb.7: ; preds = %bb.6, %bb.4
%49 = and i32 %arg3, %arg3
%highbit47 = and i32 -2147483648, %49
%SF48 = icmp ne i32 %highbit47, 0
%ZF49 = icmp eq i32 %49, 0
%50 = and i32 %49, 255
%51 = call i32 @llvm.ctpop.i32(i32 %50)
%52 = and i32 %51, 1
%PF50 = icmp eq i32 %52, 0
store i64 %arg1, ptr %stktop_8, align 1
%CmpZF_JLE107 = icmp eq i1 %ZF49, true
%CmpOF_JLE108 = icmp ne i1 %SF48, false
%ZFOrSF_JLE109 = or i1 %CmpZF_JLE107, %CmpOF_JLE108
br i1 %ZFOrSF_JLE109, label %bb.13, label %bb.8
bb.8: ; preds = %bb.7
%EBP = add i32 %memload1, -4
%53 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %memload1, i32 -4)
%CF51 = extractvalue { i32, i1 } %53, 1
%54 = and i32 %EBP, 255
%55 = call i32 @llvm.ctpop.i32(i32 %54)
%56 = and i32 %55, 1
%PF52 = icmp eq i32 %56, 0
%ZF53 = icmp eq i32 %EBP, 0
%highbit54 = and i32 -2147483648, %EBP
%SF55 = icmp ne i32 %highbit54, 0
%57 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %memload1, i32 -4)
%OF56 = extractvalue { i32, i1 } %57, 1
%58 = zext i32 0 to i64
store i64 %58, ptr %R15D-SKT-LOC, align 1
br label %bb.9
bb.9: ; preds = %bb.8, %bb.9
%59 = load i64, ptr %R12D-SKT-LOC, align 1
%R12D = trunc i64 %59 to i32
%60 = sub i32 %EBP, %R12D
%61 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EBP, i32 %R12D)
%CF57 = extractvalue { i32, i1 } %61, 1
%ZF58 = icmp eq i32 %60, 0
%highbit59 = and i32 -2147483648, %60
%SF60 = icmp ne i32 %highbit59, 0
%62 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EBP, i32 %R12D)
%OF61 = extractvalue { i32, i1 } %62, 1
%63 = and i32 %60, 255
%64 = call i32 @llvm.ctpop.i32(i32 %63)
%65 = and i32 %64, 1
%PF62 = icmp eq i32 %65, 0
%Cond_CMOVL = icmp ne i1 %SF60, %OF61
%CMOV = select i1 %Cond_CMOVL, i32 %EBP, i32 %R12D
%memref-disp63 = add i64 %memload, 16
%66 = inttoptr i64 %memref-disp63 to ptr
%memload64 = load i64, ptr %66, align 1
%67 = inttoptr i64 %memload64 to ptr
%68 = sext i32 0 to i64
store i64 %68, ptr %67, align 1
%69 = load i64, ptr %R15D-SKT-LOC, align 1
%R15D = trunc i64 %69 to i32
%EAX68 = lshr i32 %R15D, 8
%ZF65 = icmp eq i32 %EAX68, 0
%highbit66 = and i32 -2147483648, %EAX68
%SF67 = icmp ne i32 %highbit66, 0
%memref-disp69 = add i64 %memload64, 8
%70 = inttoptr i64 %memref-disp69 to ptr
store i32 %EAX68, ptr %70, align 1
%memref-disp70 = add i64 %memload64, 12
%71 = inttoptr i64 %memref-disp70 to ptr
store i32 %R15D, ptr %71, align 1
%RDI77 = add i64 %memload64, 16
%72 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %memload64, i64 16)
%CF71 = extractvalue { i64, i1 } %72, 1
%73 = and i64 %RDI77, 255
%74 = call i64 @llvm.ctpop.i64(i64 %73)
%75 = and i64 %74, 1
%PF72 = icmp eq i64 %75, 0
%ZF73 = icmp eq i64 %RDI77, 0
%highbit74 = and i64 -9223372036854775808, %RDI77
%SF75 = icmp ne i64 %highbit74, 0
%76 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %memload64, i64 16)
%OF76 = extractvalue { i64, i1 } %76, 1
%R14 = load i64, ptr %R14-SKT-LOC, align 1
%77 = inttoptr i64 %RDI77 to ptr
%78 = inttoptr i64 %R14 to ptr
%79 = zext i32 %CMOV to i64
%80 = call ptr @memcpy(ptr %77, ptr %78, i64 %79)
%RAX78 = ptrtoint ptr %80 to i64
%memref-disp79 = add i64 %memload, 16
%81 = inttoptr i64 %memref-disp79 to ptr
%memload80 = load i64, ptr %81, align 1
%memref-disp81 = add i32 %CMOV, 4
%memload82 = load i64, ptr %stktop_8, align 1
%82 = call ptr @ff_rtp_send_data()
%RAX83 = ptrtoint ptr %82 to i64
%R15D87 = add nsw i32 %R15D, %CMOV
%highbit84 = and i32 -2147483648, %R15D87
%SF85 = icmp ne i32 %highbit84, 0
%ZF86 = icmp eq i32 %R15D87, 0
%RAX88 = sext i32 %CMOV to i64
%memref-idxreg = mul i64 4, %RAX88
%memref-basereg89 = add i64 %R14, %memref-idxreg
%R12D90 = sub i32 %R12D, %CMOV
%83 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %R12D, i32 %CMOV)
%CF91 = extractvalue { i32, i1 } %83, 1
%ZF92 = icmp eq i32 %R12D90, 0
%highbit93 = and i32 -2147483648, %R12D90
%SF94 = icmp ne i32 %highbit93, 0
%84 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %R12D, i32 %CMOV)
%OF95 = extractvalue { i32, i1 } %84, 1
%85 = and i32 %R12D90, 255
%86 = call i32 @llvm.ctpop.i32(i32 %85)
%87 = and i32 %86, 1
%PF96 = icmp eq i32 %87, 0
store i64 %RAX88, ptr %RAX-SKT-LOC, align 1
%ZFCmp_JG = icmp eq i1 %ZF92, false
%SFOFCmp_JG = icmp eq i1 %SF94, %OF95
%ZFAndSFOF_JG = and i1 %ZFCmp_JG, %SFOFCmp_JG
store i64 %memref-basereg89, ptr %R14-SKT-LOC, align 1
%88 = zext i32 %R12D90 to i64
store i64 %88, ptr %R12D-SKT-LOC, align 1
%89 = zext i32 %R15D87 to i64
store i64 %89, ptr %R15D-SKT-LOC, align 1
br i1 %ZFAndSFOF_JG, label %bb.9, label %bb.10
bb.10: ; preds = %bb.9
br label %bb.13
bb.11: ; preds = %bb.6
%90 = inttoptr i64 %RSI to ptr
store <4 x float> zeroinitializer, ptr %90, align 1
br label %bb.12
bb.12: ; preds = %bb.11, %bb.5
%91 = inttoptr i64 %RDI to ptr
%92 = inttoptr i64 %arg2 to ptr
%93 = zext i32 %arg3 to i64
%94 = call ptr @memcpy(ptr %91, ptr %92, i64 %93)
%RAX97 = ptrtoint ptr %94 to i64
%RAX98 = sext i32 %arg3 to i64
%RAX102 = shl i64 %RAX98, 2
%ZF99 = icmp eq i64 %RAX102, 0
%highbit100 = and i64 -9223372036854775808, %RAX102
%SF101 = icmp ne i64 %highbit100, 0
%memref-disp103 = add i64 %memload, 8
%95 = inttoptr i64 %memref-disp103 to ptr
%96 = load i64, ptr %95, align 1
%97 = add i64 %96, %RAX102
%98 = and i64 %97, 255
%99 = call i64 @llvm.ctpop.i64(i64 %98)
%100 = and i64 %99, 1
%PF104 = icmp eq i64 %100, 0
store i64 %97, ptr %95, align 1
store i64 %RAX102, ptr %RAX-SKT-LOC, align 1
br label %bb.13
bb.13: ; preds = %bb.12, %bb.10, %bb.7
%RAX105 = load i64, ptr %RAX-SKT-LOC, align 1
ret i64 %RAX105
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/FFmpeg/libavformat/extr_rtpenc.c_rtp_send_mpegaudio.c'
source_filename = "AnghaBench/FFmpeg/libavformat/extr_rtpenc.c_rtp_send_mpegaudio.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @rtp_send_mpegaudio], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @rtp_send_mpegaudio(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = load i32, ptr %4, align 8, !tbaa !11
%6 = getelementptr inbounds i8, ptr %4, i64 8
%7 = load ptr, ptr %6, align 8, !tbaa !14
%8 = getelementptr inbounds i8, ptr %4, i64 16
%9 = load ptr, ptr %8, align 8, !tbaa !15
%10 = ptrtoint ptr %7 to i64
%11 = ptrtoint ptr %9 to i64
%12 = sub i64 %10, %11
%13 = lshr exact i64 %12, 2
%14 = trunc i64 %13 to i32
%15 = add nsw i32 %14, %2
%16 = icmp sgt i32 %15, %5
%17 = icmp sgt i32 %14, 4
%18 = and i1 %17, %16
br i1 %18, label %19, label %23
19: ; preds = %3
%20 = tail call i32 @ff_rtp_send_data(ptr noundef nonnull %0, ptr noundef %9, i32 noundef %14, i32 noundef 0) #4
%21 = load ptr, ptr %8, align 8, !tbaa !15
%22 = getelementptr inbounds i8, ptr %21, i64 16
store ptr %22, ptr %6, align 8, !tbaa !14
br label %23
23: ; preds = %19, %3
%24 = phi ptr [ %21, %19 ], [ %9, %3 ]
%25 = phi ptr [ %22, %19 ], [ %7, %3 ]
%26 = getelementptr inbounds i8, ptr %24, i64 16
%27 = icmp eq ptr %25, %26
br i1 %27, label %28, label %33
28: ; preds = %23
%29 = getelementptr inbounds i8, ptr %4, i64 24
%30 = load i32, ptr %29, align 8, !tbaa !16
%31 = getelementptr inbounds i8, ptr %4, i64 28
store i32 %30, ptr %31, align 4, !tbaa !17
%32 = icmp slt i32 %5, %2
br i1 %32, label %35, label %58
33: ; preds = %23
%34 = icmp slt i32 %5, %2
br i1 %34, label %35, label %59
35: ; preds = %28, %33
%36 = icmp sgt i32 %2, 0
br i1 %36, label %37, label %64
37: ; preds = %35
%38 = add nsw i32 %5, -4
br label %39
39: ; preds = %37, %39
%40 = phi ptr [ %1, %37 ], [ %55, %39 ]
%41 = phi i32 [ 0, %37 ], [ %56, %39 ]
%42 = phi i32 [ %2, %37 ], [ %53, %39 ]
%43 = tail call i32 @llvm.smin.i32(i32 %38, i32 %42)
%44 = load ptr, ptr %8, align 8, !tbaa !15
store <2 x i32> zeroinitializer, ptr %44, align 4, !tbaa !18
%45 = ashr i32 %41, 8
%46 = getelementptr inbounds i8, ptr %44, i64 8
store i32 %45, ptr %46, align 4, !tbaa !18
%47 = getelementptr inbounds i8, ptr %44, i64 12
store i32 %41, ptr %47, align 4, !tbaa !18
%48 = getelementptr inbounds i8, ptr %44, i64 16
%49 = tail call i32 @memcpy(ptr noundef nonnull %48, ptr noundef %40, i32 noundef %43) #4
%50 = load ptr, ptr %8, align 8, !tbaa !15
%51 = add nsw i32 %43, 4
%52 = tail call i32 @ff_rtp_send_data(ptr noundef nonnull %0, ptr noundef %50, i32 noundef %51, i32 noundef 0) #4
%53 = sub nsw i32 %42, %43
%54 = sext i32 %43 to i64
%55 = getelementptr inbounds i32, ptr %40, i64 %54
%56 = add nsw i32 %41, %43
%57 = icmp sgt i32 %53, 0
br i1 %57, label %39, label %64, !llvm.loop !19
58: ; preds = %28
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %24, i8 0, i64 16, i1 false)
br label %59
59: ; preds = %33, %58
%60 = tail call i32 @memcpy(ptr noundef %25, ptr noundef %1, i32 noundef %2) #4
%61 = load ptr, ptr %6, align 8, !tbaa !14
%62 = sext i32 %2 to i64
%63 = getelementptr inbounds i32, ptr %61, i64 %62
store ptr %63, ptr %6, align 8, !tbaa !14
br label %64
64: ; preds = %39, %35, %59
ret void
}
declare i32 @ff_rtp_send_data(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_5__", !13, i64 0, !8, i64 8, !8, i64 16, !13, i64 24, !13, i64 28}
!13 = !{!"int", !9, i64 0}
!14 = !{!12, !8, i64 8}
!15 = !{!12, !8, i64 16}
!16 = !{!12, !13, i64 24}
!17 = !{!12, !13, i64 28}
!18 = !{!13, !13, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
| FFmpeg_libavformat_extr_rtpenc.c_rtp_send_mpegaudio |
; ModuleID = 'linux_drivers_watchdog_extr_mt7621_wdt.c_mt7621_wdt_bootcause.so'
source_filename = "linux_drivers_watchdog_extr_mt7621_wdt.c_mt7621_wdt_bootcause.so"
@SYSC_RSTSTAT = common dso_local global i32 0, align 4
@WDT_RST_CAUSE = common dso_local global i32 0, align 4
@WDIOF_CARDRESET = common dso_local global i32 0, align 4
declare dso_local ptr @rt_sysc_r32()
define dso_local i32 @mt7621_wdt_bootcause() {
entry:
%EAX-SKT-LOC = alloca i32, align 4
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
%memload = load i32, ptr @SYSC_RSTSTAT, align 1
%0 = call ptr @rt_sysc_r32()
%RAX = ptrtoint ptr %0 to i64
%memload1 = load i32, ptr @WDT_RST_CAUSE, align 1
%1 = trunc i64 %RAX to i32
%EAX = and i32 %1, %memload1
%2 = and i32 %EAX, 255
%3 = call i32 @llvm.ctpop.i32(i32 %2)
%4 = and i32 %3, 1
%PF = icmp eq i32 %4, 0
store i32 %EAX, ptr %EAX-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 false, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%memload2 = load i32, ptr @WDIOF_CARDRESET, align 1
store i32 %memload2, ptr %EAX-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %entry
%EAX3 = load i32, ptr %EAX-SKT-LOC, align 1
ret i32 %EAX3
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/watchdog/extr_mt7621_wdt.c_mt7621_wdt_bootcause.c'
source_filename = "AnghaBench/linux/drivers/watchdog/extr_mt7621_wdt.c_mt7621_wdt_bootcause.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SYSC_RSTSTAT = common local_unnamed_addr global i32 0, align 4
@WDT_RST_CAUSE = common local_unnamed_addr global i32 0, align 4
@WDIOF_CARDRESET = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mt7621_wdt_bootcause], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @mt7621_wdt_bootcause() #0 {
%1 = load i32, ptr @SYSC_RSTSTAT, align 4, !tbaa !6
%2 = tail call i32 @rt_sysc_r32(i32 noundef %1) #2
%3 = load i32, ptr @WDT_RST_CAUSE, align 4, !tbaa !6
%4 = and i32 %3, %2
%5 = icmp eq i32 %4, 0
%6 = load i32, ptr @WDIOF_CARDRESET, align 4
%7 = select i1 %5, i32 0, i32 %6
ret i32 %7
}
declare i32 @rt_sysc_r32(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_watchdog_extr_mt7621_wdt.c_mt7621_wdt_bootcause |
; ModuleID = 'FFmpeg_libavcodec_mips_extr_hevc_mc_biw_msa.c_hevc_hz_biwgt_4t_8w_msa.so'
source_filename = "FFmpeg_libavcodec_mips_extr_hevc_mc_biw_msa.c_hevc_hz_biwgt_4t_8w_msa.so"
declare dso_local ptr @hevc_hz_biwgt_4t_8x2_msa()
declare dso_local ptr @hevc_hz_biwgt_4t_8x4multiple_msa()
declare dso_local ptr @hevc_hz_biwgt_4t_8x6_msa()
define dso_local i64 @hevc_hz_biwgt_4t_8w_msa() {
entry:
%RAX-SKT-LOC = alloca i64, align 8
%RSP-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 100, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
%1 = add i64 %tos, 48
%RSP_P.48 = inttoptr i64 %1 to ptr
%2 = add i64 %tos, 56
%RSP_P.56 = inttoptr i64 %2 to ptr
%3 = add i64 %tos, 64
%RSP_P.64 = inttoptr i64 %3 to ptr
%4 = add i64 %tos, 72
%RSP_P.72 = inttoptr i64 %4 to ptr
%5 = add i64 %tos, 80
%RSP_P.80 = inttoptr i64 %5 to ptr
%6 = add i64 %tos, 88
%RSP_P.88 = inttoptr i64 %6 to ptr
%7 = add i64 %tos, 96
%RSP_P.96 = inttoptr i64 %7 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memload = load i32, ptr %RSP_P.96, align 1
%memload1 = load i32, ptr %RSP_P.88, align 1
%memload2 = load i32, ptr %RSP_P.80, align 1
%memload3 = load i32, ptr %RSP_P.72, align 1
%memload4 = load i32, ptr %RSP_P.64, align 1
%memload5 = load i32, ptr %RSP_P.56, align 1
%memload6 = load i64, ptr %RSP_P.48, align 1
%8 = sub i32 %memload5, 6
%9 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload5, i32 6)
%CF = extractvalue { i32, i1 } %9, 1
%ZF = icmp eq i32 %8, 0
%highbit = and i32 -2147483648, %8
%SF = icmp ne i32 %highbit, 0
%10 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload5, i32 6)
%OF = extractvalue { i32, i1 } %10, 1
%11 = and i32 %8, 255
%12 = call i32 @llvm.ctpop.i32(i32 %11)
%13 = and i32 %12, 1
%PF = icmp eq i32 %13, 0
%14 = zext i32 %memload1 to i64
store i64 %14, ptr %RAX-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%15 = sub i32 %memload5, 2
%16 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload5, i32 2)
%CF7 = extractvalue { i32, i1 } %16, 1
%ZF8 = icmp eq i32 %15, 0
%highbit9 = and i32 -2147483648, %15
%SF10 = icmp ne i32 %highbit9, 0
%17 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload5, i32 2)
%OF11 = extractvalue { i32, i1 } %17, 1
%18 = and i32 %15, 255
%19 = call i32 @llvm.ctpop.i32(i32 %18)
%20 = and i32 %19, 1
%PF12 = icmp eq i32 %20, 0
%CmpZF_JNE = icmp eq i1 %ZF8, false
br i1 %CmpZF_JNE, label %bb.5, label %bb.2
bb.2: ; preds = %bb.1
%21 = zext i32 %memload to i64
store i64 %21, ptr %stktop_8, align 8
%22 = zext i32 %memload1 to i64
store i64 %22, ptr %stktop_8, align 8
%23 = zext i32 %memload2 to i64
store i64 %23, ptr %stktop_8, align 8
%24 = zext i32 %memload3 to i64
store i64 %24, ptr %stktop_8, align 8
%25 = zext i32 %memload4 to i64
store i64 %25, ptr %stktop_8, align 8
store i64 %memload6, ptr %stktop_8, align 8
%26 = call ptr @hevc_hz_biwgt_4t_8x2_msa()
%RAX = ptrtoint ptr %26 to i64
%27 = ptrtoint ptr %stktop_8 to i64
store i64 %27, ptr %RSP-SKT-LOC, align 1
store i64 %RAX, ptr %RAX-SKT-LOC, align 1
br label %bb.4
bb.5: ; preds = %bb.1
%28 = trunc i32 %memload5 to i8
%29 = and i8 %28, 3
%30 = call i8 @llvm.ctpop.i8(i8 %29)
%31 = and i8 %30, 1
%PF13 = icmp eq i8 %31, 0
%ZF14 = icmp eq i8 %29, 0
%highbit15 = and i8 -128, %29
%SF16 = icmp ne i8 %highbit15, 0
%CmpZF_JE3 = icmp eq i1 %ZF14, true
br i1 %CmpZF_JE3, label %bb.7, label %bb.6
bb.7: ; preds = %bb.5
%32 = tail call ptr @hevc_hz_biwgt_4t_8x4multiple_msa()
%RAX17 = ptrtoint ptr %32 to i64
br label %UnifiedReturnBlock
bb.3: ; preds = %entry
%33 = zext i32 %memload to i64
store i64 %33, ptr %stktop_8, align 8
%34 = zext i32 %memload1 to i64
store i64 %34, ptr %stktop_8, align 8
%35 = zext i32 %memload2 to i64
store i64 %35, ptr %stktop_8, align 8
%36 = zext i32 %memload3 to i64
store i64 %36, ptr %stktop_8, align 8
%37 = zext i32 %memload4 to i64
store i64 %37, ptr %stktop_8, align 8
store i64 %memload6, ptr %stktop_8, align 8
%38 = call ptr @hevc_hz_biwgt_4t_8x6_msa()
%RAX1 = ptrtoint ptr %38 to i64
%39 = ptrtoint ptr %stktop_8 to i64
store i64 %39, ptr %RSP-SKT-LOC, align 1
store i64 %RAX1, ptr %RAX-SKT-LOC, align 1
br label %bb.4
bb.4: ; preds = %bb.3, %bb.2
%RSP = load i64, ptr %RSP-SKT-LOC, align 1
br label %bb.6
bb.6: ; preds = %bb.4, %bb.5
%RAX2 = load i64, ptr %RAX-SKT-LOC, align 1
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.6, %bb.7
%UnifiedRetVal = phi i64 [ %RAX17, %bb.7 ], [ %RAX2, %bb.6 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i8 @llvm.ctpop.i8(i8) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/FFmpeg/libavcodec/mips/extr_hevc_mc_biw_msa.c_hevc_hz_biwgt_4t_8w_msa.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/mips/extr_hevc_mc_biw_msa.c_hevc_hz_biwgt_4t_8w_msa.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @hevc_hz_biwgt_4t_8w_msa], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @hevc_hz_biwgt_4t_8w_msa(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, ptr noundef %4, i32 noundef %5, ptr noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12) #0 {
switch i32 %7, label %18 [
i32 2, label %14
i32 6, label %16
]
14: ; preds = %13
%15 = tail call i32 @hevc_hz_biwgt_4t_8x2_msa(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, ptr noundef %4, i32 noundef %5, ptr noundef %6, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12) #2
br label %23
16: ; preds = %13
%17 = tail call i32 @hevc_hz_biwgt_4t_8x6_msa(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, ptr noundef %4, i32 noundef %5, ptr noundef %6, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12) #2
br label %23
18: ; preds = %13
%19 = and i32 %7, 3
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = tail call i32 @hevc_hz_biwgt_4t_8x4multiple_msa(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, ptr noundef %4, i32 noundef %5, ptr noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11, i32 noundef %12) #2
br label %23
23: ; preds = %16, %21, %18, %14
ret void
}
declare i32 @hevc_hz_biwgt_4t_8x2_msa(ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @hevc_hz_biwgt_4t_8x6_msa(ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @hevc_hz_biwgt_4t_8x4multiple_msa(ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| FFmpeg_libavcodec_mips_extr_hevc_mc_biw_msa.c_hevc_hz_biwgt_4t_8w_msa |
; ModuleID = 'fastsocket_kernel_drivers_media_dvb_frontends_extr_l64781.c_l64781_sleep.so'
source_filename = "fastsocket_kernel_drivers_media_dvb_frontends_extr_l64781.c_l64781_sleep.so"
declare dso_local ptr @l64781_writereg()
define dso_local i64 @l64781_sleep(i64 %arg1) {
entry:
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%1 = tail call ptr @l64781_writereg()
%RAX = ptrtoint ptr %1 to i64
ret i64 %RAX
}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/dvb/frontends/extr_l64781.c_l64781_sleep.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/dvb/frontends/extr_l64781.c_l64781_sleep.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @l64781_sleep], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @l64781_sleep(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = tail call i32 @l64781_writereg(ptr noundef %2, i32 noundef 62, i32 noundef 90) #2
ret i32 %3
}
declare i32 @l64781_writereg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"dvb_frontend", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_media_dvb_frontends_extr_l64781.c_l64781_sleep |
; ModuleID = 'SoftEtherVPN_src_Mayaqua_extr_Network.c_FreeSockList.so'
source_filename = "SoftEtherVPN_src_Mayaqua_extr_Network.c_FreeSockList.so"
declare dso_local ptr @StopSockList()
declare dso_local ptr @ReleaseList()
declare dso_local ptr @Free()
define dso_local void @FreeSockList(i64 %arg1) {
entry:
%RSP_P.0 = alloca i64, align 1
%0 = and i64 %arg1, %arg1
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %0, 0
%1 = and i64 %0, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
store i64 3735928559, ptr %RSP_P.0, align 8
%4 = call ptr @StopSockList()
%RAX = ptrtoint ptr %4 to i64
%5 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %5, align 1
%6 = call ptr @ReleaseList()
%RAX1 = ptrtoint ptr %6 to i64
%7 = tail call ptr @Free()
%RAX2 = ptrtoint ptr %7 to i64
br label %UnifiedReturnBlock
bb.2: ; preds = %entry
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.2, %bb.1
ret void
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/SoftEtherVPN/src/Mayaqua/extr_Network.c_FreeSockList.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Mayaqua/extr_Network.c_FreeSockList.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @FreeSockList(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = tail call i32 @StopSockList(ptr noundef nonnull %0) #2
%5 = load i32, ptr %0, align 4, !tbaa !6
%6 = tail call i32 @ReleaseList(i32 noundef %5) #2
%7 = tail call i32 @Free(ptr noundef nonnull %0) #2
br label %8
8: ; preds = %1, %3
ret void
}
declare i32 @StopSockList(ptr noundef) local_unnamed_addr #1
declare i32 @ReleaseList(i32 noundef) local_unnamed_addr #1
declare i32 @Free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| SoftEtherVPN_src_Mayaqua_extr_Network.c_FreeSockList |
; ModuleID = 'RetroArch_gfx_include_userland_containers_core_extr_containers_uri.c_vc_uri_userinfo.so'
source_filename = "RetroArch_gfx_include_userland_containers_core_extr_containers_uri.c_vc_uri_userinfo.so"
define dso_local i64 @vc_uri_userinfo(i64 %arg1) {
entry:
%0 = and i64 %arg1, %arg1
%highbit = and i64 -9223372036854775808, %0
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %0, 0
%1 = and i64 %0, 255
%2 = call i64 @llvm.ctpop.i64(i64 %1)
%3 = and i64 %2, 1
%PF = icmp eq i64 %3, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%4 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %4, align 1
br label %UnifiedReturnBlock
bb.2: ; preds = %entry
%5 = zext i32 0 to i64
br label %UnifiedReturnBlock
UnifiedReturnBlock: ; preds = %bb.2, %bb.1
%UnifiedRetVal = phi i64 [ %memload, %bb.1 ], [ %5, %bb.2 ]
ret i64 %UnifiedRetVal
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/containers/core/extr_containers_uri.c_vc_uri_userinfo.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/containers/core/extr_containers_uri.c_vc_uri_userinfo.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define ptr @vc_uri_userinfo(ptr noundef readonly %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = load ptr, ptr %0, align 8, !tbaa !6
br label %5
5: ; preds = %1, %3
%6 = phi ptr [ %4, %3 ], [ null, %1 ]
ret ptr %6
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| RetroArch_gfx_include_userland_containers_core_extr_containers_uri.c_vc_uri_userinfo |
; ModuleID = 'vim.js_src_extr_getchar.c_plain_vgetc.so'
source_filename = "vim.js_src_extr_getchar.c_plain_vgetc.so"
@K_IGNORE = common dso_local global i32 0, align 4
@K_VER_SCROLLBAR = common dso_local global i32 0, align 4
@K_HOR_SCROLLBAR = common dso_local global i32 0, align 4
declare dso_local ptr @safe_vgetc()
define dso_local ptr @plain_vgetc() {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
br label %bb.1
bb.1: ; preds = %entry, %bb.3, %bb.2, %bb.1
%0 = call ptr @safe_vgetc()
%RAX = ptrtoint ptr %0 to i64
%1 = load i32, ptr @K_IGNORE, align 4
%2 = trunc i64 %RAX to i32
%3 = sub i32 %2, %1
%4 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %2, i32 %1)
%CF = extractvalue { i32, i1 } %4, 1
%ZF = icmp eq i32 %3, 0
%highbit = and i32 -2147483648, %3
%SF = icmp ne i32 %highbit, 0
%5 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %2, i32 %1)
%OF = extractvalue { i32, i1 } %5, 1
%6 = and i32 %3, 255
%7 = call i32 @llvm.ctpop.i32(i32 %6)
%8 = and i32 %7, 1
%PF = icmp eq i32 %8, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.1, label %bb.2
bb.2: ; preds = %bb.1
%9 = load i32, ptr @K_VER_SCROLLBAR, align 4
%10 = trunc i64 %RAX to i32
%11 = sub i32 %10, %9
%12 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %10, i32 %9)
%CF1 = extractvalue { i32, i1 } %12, 1
%ZF2 = icmp eq i32 %11, 0
%highbit3 = and i32 -2147483648, %11
%SF4 = icmp ne i32 %highbit3, 0
%13 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %10, i32 %9)
%OF5 = extractvalue { i32, i1 } %13, 1
%14 = and i32 %11, 255
%15 = call i32 @llvm.ctpop.i32(i32 %14)
%16 = and i32 %15, 1
%PF6 = icmp eq i32 %16, 0
%CmpZF_JE13 = icmp eq i1 %ZF2, true
br i1 %CmpZF_JE13, label %bb.1, label %bb.3
bb.3: ; preds = %bb.2
%17 = load i32, ptr @K_HOR_SCROLLBAR, align 4
%18 = trunc i64 %RAX to i32
%19 = sub i32 %18, %17
%20 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %18, i32 %17)
%CF7 = extractvalue { i32, i1 } %20, 1
%ZF8 = icmp eq i32 %19, 0
%highbit9 = and i32 -2147483648, %19
%SF10 = icmp ne i32 %highbit9, 0
%21 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %18, i32 %17)
%OF11 = extractvalue { i32, i1 } %21, 1
%22 = and i32 %19, 255
%23 = call i32 @llvm.ctpop.i32(i32 %22)
%24 = and i32 %23, 1
%PF12 = icmp eq i32 %24, 0
%CmpZF_JE14 = icmp eq i1 %ZF8, true
br i1 %CmpZF_JE14, label %bb.1, label %bb.4
bb.4: ; preds = %bb.3
ret ptr %0
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/vim.js/src/extr_getchar.c_plain_vgetc.c'
source_filename = "AnghaBench/vim.js/src/extr_getchar.c_plain_vgetc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@K_IGNORE = common local_unnamed_addr global i32 0, align 4
@K_VER_SCROLLBAR = common local_unnamed_addr global i32 0, align 4
@K_HOR_SCROLLBAR = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @plain_vgetc() local_unnamed_addr #0 {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @safe_vgetc() #2
%3 = load i32, ptr @K_IGNORE, align 4, !tbaa !6
%4 = icmp eq i32 %2, %3
%5 = load i32, ptr @K_VER_SCROLLBAR, align 4
%6 = icmp eq i32 %2, %5
%7 = select i1 %4, i1 true, i1 %6
%8 = load i32, ptr @K_HOR_SCROLLBAR, align 4
%9 = icmp eq i32 %2, %8
%10 = select i1 %7, i1 true, i1 %9
br i1 %10, label %1, label %11, !llvm.loop !10
11: ; preds = %1
ret i32 %2
}
declare i32 @safe_vgetc(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| vim.js_src_extr_getchar.c_plain_vgetc |
; ModuleID = 'linux_drivers_net_usb_extr_hso.c_put_rxbuf_data_and_resubmit_bulk_urb.so'
source_filename = "linux_drivers_net_usb_extr_hso.c_put_rxbuf_data_and_resubmit_bulk_urb.so"
declare dso_local ptr @put_rxbuf_data()
declare dso_local ptr @hso_resubmit_rx_bulk_urb()
define dso_local i64 @put_rxbuf_data_and_resubmit_bulk_urb(i64 %arg1) {
entry:
%RAX-SKT-LOC43 = alloca i64, align 8
%RAX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%0 = inttoptr i64 %arg1 to ptr
%memload = load i64, ptr %0, align 1
%memref-disp = add i64 %arg1, 24
%1 = inttoptr i64 %memref-disp to ptr
%memload1 = load i64, ptr %1, align 1
%memref-idxreg = mul i64 8, %memload
%memref-basereg = add i64 %memload1, %memref-idxreg
%2 = inttoptr i64 %memref-basereg to ptr
%3 = load i64, ptr %2, align 1
%4 = sub i64 %3, 0
%5 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %3, i64 0)
%CF = extractvalue { i64, i1 } %5, 1
%ZF = icmp eq i64 %4, 0
%highbit = and i64 -9223372036854775808, %4
%SF = icmp ne i64 %highbit, 0
%6 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %3, i64 0)
%OF = extractvalue { i64, i1 } %6, 1
%7 = and i64 %4, 255
%8 = call i64 @llvm.ctpop.i64(i64 %7)
%9 = and i64 %8, 1
%PF = icmp eq i64 %9, 0
store i64 %memload, ptr %RAX-SKT-LOC, align 1
store i64 %memload, ptr %RAX-SKT-LOC43, align 1
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.7, label %bb.1
bb.1: ; preds = %entry
br label %bb.5
bb.5: ; preds = %bb.4, %bb.1
%memref-disp2 = add i64 %arg1, 16
%10 = inttoptr i64 %memref-disp2 to ptr
%memload3 = load i64, ptr %10, align 1
%RAX = load i64, ptr %RAX-SKT-LOC, align 1
%memref-idxreg4 = mul i64 8, %RAX
%memref-basereg5 = add i64 %memload3, %memref-idxreg4
%11 = inttoptr i64 %memref-basereg5 to ptr
%memload6 = load i64, ptr %11, align 1
%12 = call ptr @put_rxbuf_data()
%RAX7 = ptrtoint ptr %12 to i64
%13 = trunc i64 %RAX7 to i32
%14 = trunc i64 %RAX7 to i32
%15 = and i32 %13, %14
%highbit8 = and i32 -2147483648, %15
%SF9 = icmp ne i32 %highbit8, 0
%ZF10 = icmp eq i32 %15, 0
%16 = and i32 %15, 255
%17 = call i32 @llvm.ctpop.i32(i32 %16)
%18 = and i32 %17, 1
%PF11 = icmp eq i32 %18, 0
store i64 %RAX7, ptr %RAX-SKT-LOC43, align 1
%CmpZF_JE45 = icmp eq i1 %ZF10, true
br i1 %CmpZF_JE45, label %bb.3, label %bb.6
bb.6: ; preds = %bb.5
%ld-stk-prom = load i64, ptr %RAX-SKT-LOC43, align 8
%19 = trunc i64 %ld-stk-prom to i32
%20 = trunc i64 -1 to i32
%21 = sub i32 %19, %20
%22 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %19, i32 %20)
%CF12 = extractvalue { i32, i1 } %22, 1
%ZF13 = icmp eq i32 %21, 0
%highbit14 = and i32 -2147483648, %21
%SF15 = icmp ne i32 %highbit14, 0
%23 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %19, i32 %20)
%OF16 = extractvalue { i32, i1 } %23, 1
%24 = and i32 %21, 255
%25 = call i32 @llvm.ctpop.i32(i32 %24)
%26 = and i32 %25, 1
%PF17 = icmp eq i32 %26, 0
%CmpZF_JNE = icmp eq i1 %ZF13, false
br i1 %CmpZF_JNE, label %bb.4, label %bb.7
bb.3: ; preds = %bb.5
%27 = inttoptr i64 %arg1 to ptr
%memload18 = load i64, ptr %27, align 1
%RAX23 = add i64 %memload18, 1
%28 = and i64 %RAX23, 255
%29 = call i64 @llvm.ctpop.i64(i64 %28)
%30 = and i64 %29, 1
%PF19 = icmp eq i64 %30, 0
%ZF20 = icmp eq i64 %RAX23, 0
%highbit21 = and i64 -9223372036854775808, %RAX23
%SF22 = icmp ne i64 %highbit21, 0
%memref-disp24 = add i64 %arg1, 8
%31 = inttoptr i64 %memref-disp24 to ptr
%32 = load i64, ptr %31, align 1
%33 = sub i64 %RAX23, %32
%34 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %RAX23, i64 %32)
%CF25 = extractvalue { i64, i1 } %34, 1
%ZF26 = icmp eq i64 %33, 0
%highbit27 = and i64 -9223372036854775808, %33
%SF28 = icmp ne i64 %highbit27, 0
%35 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %RAX23, i64 %32)
%OF29 = extractvalue { i64, i1 } %35, 1
%36 = and i64 %33, 255
%37 = call i64 @llvm.ctpop.i64(i64 %36)
%38 = and i64 %37, 1
%PF30 = icmp eq i64 %38, 0
%39 = zext i32 0 to i64
%40 = zext i32 0 to i64
%Cond_CMOVAE = icmp eq i1 %CF25, false
%CMOV = select i1 %Cond_CMOVAE, i64 %40, i64 %RAX23
%41 = inttoptr i64 %arg1 to ptr
store i64 %CMOV, ptr %41, align 1
%42 = call ptr @hso_resubmit_rx_bulk_urb()
%RAX31 = ptrtoint ptr %42 to i64
br label %bb.4
bb.4: ; preds = %bb.3, %bb.6
%43 = inttoptr i64 %arg1 to ptr
%memload32 = load i64, ptr %43, align 1
%memref-disp33 = add i64 %arg1, 24
%44 = inttoptr i64 %memref-disp33 to ptr
%memload34 = load i64, ptr %44, align 1
%memref-idxreg35 = mul i64 8, %memload32
%memref-basereg36 = add i64 %memload34, %memref-idxreg35
%45 = inttoptr i64 %memref-basereg36 to ptr
%46 = load i64, ptr %45, align 1
%47 = sub i64 %46, 0
%48 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %46, i64 0)
%CF37 = extractvalue { i64, i1 } %48, 1
%ZF38 = icmp eq i64 %47, 0
%highbit39 = and i64 -9223372036854775808, %47
%SF40 = icmp ne i64 %highbit39, 0
%49 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %46, i64 0)
%OF41 = extractvalue { i64, i1 } %49, 1
%50 = and i64 %47, 255
%51 = call i64 @llvm.ctpop.i64(i64 %50)
%52 = and i64 %51, 1
%PF42 = icmp eq i64 %52, 0
store i64 %memload32, ptr %RAX-SKT-LOC43, align 1
%CmpZF_JE46 = icmp eq i1 %ZF38, true
store i64 %memload32, ptr %RAX-SKT-LOC, align 1
br i1 %CmpZF_JE46, label %bb.7, label %bb.5
bb.7: ; preds = %bb.4, %bb.6, %entry
%RAX44 = load i64, ptr %RAX-SKT-LOC43, align 1
ret i64 %RAX44
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/net/usb/extr_hso.c_put_rxbuf_data_and_resubmit_bulk_urb.c'
source_filename = "AnghaBench/linux/drivers/net/usb/extr_hso.c_put_rxbuf_data_and_resubmit_bulk_urb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @put_rxbuf_data_and_resubmit_bulk_urb], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @put_rxbuf_data_and_resubmit_bulk_urb(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 24
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load i64, ptr %0, align 8, !tbaa !12
%5 = getelementptr inbounds i64, ptr %3, i64 %4
%6 = load i64, ptr %5, align 8, !tbaa !13
%7 = icmp eq i64 %6, 0
br i1 %7, label %30, label %8
8: ; preds = %1
%9 = getelementptr inbounds i8, ptr %0, i64 16
%10 = getelementptr inbounds i8, ptr %0, i64 8
br label %11
11: ; preds = %8, %24
%12 = phi i64 [ %4, %8 ], [ %26, %24 ]
%13 = load ptr, ptr %9, align 8, !tbaa !14
%14 = getelementptr inbounds ptr, ptr %13, i64 %12
%15 = load ptr, ptr %14, align 8, !tbaa !15
%16 = tail call i32 @put_rxbuf_data(ptr noundef %15, ptr noundef nonnull %0) #2
switch i32 %16, label %24 [
i32 -1, label %30
i32 0, label %17
]
17: ; preds = %11
%18 = load i64, ptr %0, align 8, !tbaa !12
%19 = add i64 %18, 1
%20 = load i64, ptr %10, align 8, !tbaa !16
%21 = icmp ult i64 %19, %20
%22 = select i1 %21, i64 %19, i64 0
store i64 %22, ptr %0, align 8
%23 = tail call i32 @hso_resubmit_rx_bulk_urb(ptr noundef nonnull %0, ptr noundef %15) #2
br label %24
24: ; preds = %11, %17
%25 = load ptr, ptr %2, align 8, !tbaa !6
%26 = load i64, ptr %0, align 8, !tbaa !12
%27 = getelementptr inbounds i64, ptr %25, i64 %26
%28 = load i64, ptr %27, align 8, !tbaa !13
%29 = icmp eq i64 %28, 0
br i1 %29, label %30, label %11, !llvm.loop !17
30: ; preds = %11, %24, %1
ret void
}
declare i32 @put_rxbuf_data(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @hso_resubmit_rx_bulk_urb(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 24}
!7 = !{!"hso_serial", !8, i64 0, !8, i64 8, !11, i64 16, !11, i64 24}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !11, i64 16}
!15 = !{!11, !11, i64 0}
!16 = !{!7, !8, i64 8}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
| linux_drivers_net_usb_extr_hso.c_put_rxbuf_data_and_resubmit_bulk_urb |
; ModuleID = 'fastsocket_kernel_net_ipv4_netfilter_extr_iptable_mangle.c_ipt_local_hook.so'
source_filename = "fastsocket_kernel_net_ipv4_netfilter_extr_iptable_mangle.c_ipt_local_hook.so"
@NF_DROP = common dso_local global i32 0, align 4
@NF_STOLEN = common dso_local global i32 0, align 4
@NF_QUEUE = common dso_local global i32 0, align 4
@RTN_UNSPEC = common dso_local global i32 0, align 4
@NF_ACCEPT = common dso_local global i32 0, align 4
declare dso_local ptr @ip_hdrlen()
declare dso_local ptr @ip_hdr()
declare dso_local ptr @dev_net()
declare dso_local ptr @ipt_do_table()
declare dso_local ptr @ip_route_me_harder()
define dso_local i32 @ipt_local_hook(i32 %arg1, i64 %arg2, i64 %arg3, i64 %arg4) {
entry:
%EBP-SKT-LOC = alloca i32, align 4
%stktop_8 = alloca i8, i32 48, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 0
%RSP_P.0 = inttoptr i64 %0 to ptr
%1 = add i64 %tos, 8
%RSP_P.8 = inttoptr i64 %1 to ptr
%2 = add i64 %tos, 16
%RSP_P.16 = inttoptr i64 %2 to ptr
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%3 = inttoptr i64 %arg2 to ptr
%4 = load i32, ptr %3, align 1
%5 = zext i32 %4 to i64
%6 = zext i32 24 to i64
%7 = sub i64 %5, %6
%8 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %5, i64 %6)
%CF = extractvalue { i64, i1 } %8, 1
%ZF = icmp eq i64 %7, 0
%highbit = and i64 -9223372036854775808, %7
%SF = icmp ne i64 %highbit, 0
%9 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %5, i64 %6)
%OF = extractvalue { i64, i1 } %9, 1
%10 = and i64 %7, 255
%11 = call i64 @llvm.ctpop.i64(i64 %10)
%12 = and i64 %11, 1
%PF = icmp eq i64 %12, 0
%CmpCF_JB = icmp eq i1 %CF, true
br i1 %CmpCF_JB, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%13 = call ptr @ip_hdrlen()
%RAX = ptrtoint ptr %13 to i64
%14 = trunc i64 %RAX to i32
%15 = trunc i64 23 to i32
%16 = sub i32 %14, %15
%17 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %14, i32 %15)
%CF1 = extractvalue { i32, i1 } %17, 1
%ZF2 = icmp eq i32 %16, 0
%highbit3 = and i32 -2147483648, %16
%SF4 = icmp ne i32 %highbit3, 0
%18 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %14, i32 %15)
%OF5 = extractvalue { i32, i1 } %18, 1
%19 = and i32 %16, 255
%20 = call i32 @llvm.ctpop.i32(i32 %19)
%21 = and i32 %20, 1
%PF6 = icmp eq i32 %21, 0
%CFCmp_JA = icmp eq i1 %CF1, false
%ZFCmp_JA = icmp eq i1 %ZF2, false
%CFAndZF_JA = and i1 %ZFCmp_JA, %CFCmp_JA
br i1 %CFAndZF_JA, label %bb.4, label %bb.2
bb.4: ; preds = %bb.1
%memref-disp = add i64 %arg2, 8
%22 = inttoptr i64 %memref-disp to ptr
%memload = load i64, ptr %22, align 1
store i64 %memload, ptr %RSP_P.16, align 1
%23 = call ptr @ip_hdr()
%RAX7 = ptrtoint ptr %23 to i64
%memload8 = load i64, ptr %23, align 1
%memref-disp9 = add i64 %RAX7, 8
%24 = inttoptr i64 %memref-disp9 to ptr
%memload10 = load i64, ptr %24, align 1
%memref-disp11 = add i64 %RAX7, 16
%25 = inttoptr i64 %memref-disp11 to ptr
%memload12 = load i64, ptr %25, align 1
store i64 %memload12, ptr %RSP_P.8, align 1
%26 = call ptr @dev_net()
%memload14 = load i32, ptr %26, align 1
%27 = call ptr @ipt_do_table()
%RAX15 = ptrtoint ptr %27 to i64
%EBP = trunc i64 %RAX15 to i32
%28 = load i32, ptr @NF_DROP, align 4
%29 = trunc i64 %RAX15 to i32
%30 = sub i32 %29, %28
%31 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %29, i32 %28)
%CF16 = extractvalue { i32, i1 } %31, 1
%ZF17 = icmp eq i32 %30, 0
%highbit18 = and i32 -2147483648, %30
%SF19 = icmp ne i32 %highbit18, 0
%32 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %29, i32 %28)
%OF20 = extractvalue { i32, i1 } %32, 1
%33 = and i32 %30, 255
%34 = call i32 @llvm.ctpop.i32(i32 %33)
%35 = and i32 %34, 1
%PF21 = icmp eq i32 %35, 0
store i32 %EBP, ptr %EBP-SKT-LOC, align 1
%CmpZF_JE = icmp eq i1 %ZF17, true
br i1 %CmpZF_JE, label %bb.3, label %bb.5
bb.5: ; preds = %bb.4
%36 = load i32, ptr @NF_STOLEN, align 4
%ld-stk-prom76 = load i32, ptr %EBP-SKT-LOC, align 4
%37 = sub i32 %ld-stk-prom76, %36
%ld-stk-prom75 = load i32, ptr %EBP-SKT-LOC, align 4
%38 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %ld-stk-prom75, i32 %36)
%CF22 = extractvalue { i32, i1 } %38, 1
%ZF23 = icmp eq i32 %37, 0
%highbit24 = and i32 -2147483648, %37
%SF25 = icmp ne i32 %highbit24, 0
%ld-stk-prom74 = load i32, ptr %EBP-SKT-LOC, align 4
%39 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %ld-stk-prom74, i32 %36)
%OF26 = extractvalue { i32, i1 } %39, 1
%40 = and i32 %37, 255
%41 = call i32 @llvm.ctpop.i32(i32 %40)
%42 = and i32 %41, 1
%PF27 = icmp eq i32 %42, 0
%CmpZF_JE78 = icmp eq i1 %ZF23, true
br i1 %CmpZF_JE78, label %bb.3, label %bb.6
bb.6: ; preds = %bb.5
%43 = load i32, ptr @NF_QUEUE, align 4
%ld-stk-prom73 = load i32, ptr %EBP-SKT-LOC, align 4
%44 = sub i32 %ld-stk-prom73, %43
%ld-stk-prom72 = load i32, ptr %EBP-SKT-LOC, align 4
%45 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %ld-stk-prom72, i32 %43)
%CF28 = extractvalue { i32, i1 } %45, 1
%ZF29 = icmp eq i32 %44, 0
%highbit30 = and i32 -2147483648, %44
%SF31 = icmp ne i32 %highbit30, 0
%ld-stk-prom = load i32, ptr %EBP-SKT-LOC, align 4
%46 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %ld-stk-prom, i32 %43)
%OF32 = extractvalue { i32, i1 } %46, 1
%47 = and i32 %44, 255
%48 = call i32 @llvm.ctpop.i32(i32 %47)
%49 = and i32 %48, 1
%PF33 = icmp eq i32 %49, 0
%CmpZF_JE79 = icmp eq i1 %ZF29, true
br i1 %CmpZF_JE79, label %bb.3, label %bb.7
bb.7: ; preds = %bb.6
%50 = call ptr @ip_hdr()
%RAX34 = ptrtoint ptr %50 to i64
%51 = load i64, ptr %50, align 1
%52 = sub i64 %51, %memload8
%53 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %51, i64 %memload8)
%CF35 = extractvalue { i64, i1 } %53, 1
%ZF36 = icmp eq i64 %52, 0
%highbit37 = and i64 -9223372036854775808, %52
%SF38 = icmp ne i64 %highbit37, 0
%54 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %51, i64 %memload8)
%OF39 = extractvalue { i64, i1 } %54, 1
%55 = and i64 %52, 255
%56 = call i64 @llvm.ctpop.i64(i64 %55)
%57 = and i64 %56, 1
%PF40 = icmp eq i64 %57, 0
%CmpZF_JNE = icmp eq i1 %ZF36, false
br i1 %CmpZF_JNE, label %bb.11, label %bb.8
bb.8: ; preds = %bb.7
%memref-disp41 = add i64 %RAX34, 8
%58 = inttoptr i64 %memref-disp41 to ptr
%59 = load i64, ptr %58, align 1
%60 = sub i64 %59, %memload10
%61 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %59, i64 %memload10)
%CF42 = extractvalue { i64, i1 } %61, 1
%ZF43 = icmp eq i64 %60, 0
%highbit44 = and i64 -9223372036854775808, %60
%SF45 = icmp ne i64 %highbit44, 0
%62 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %59, i64 %memload10)
%OF46 = extractvalue { i64, i1 } %62, 1
%63 = and i64 %60, 255
%64 = call i64 @llvm.ctpop.i64(i64 %63)
%65 = and i64 %64, 1
%PF47 = icmp eq i64 %65, 0
%CmpZF_JNE80 = icmp eq i1 %ZF43, false
br i1 %CmpZF_JNE80, label %bb.11, label %bb.9
bb.9: ; preds = %bb.8
%memload48 = load i64, ptr %RSP_P.16, align 1
%memref-disp49 = add i64 %arg2, 8
%66 = inttoptr i64 %memref-disp49 to ptr
%67 = load i64, ptr %66, align 1
%68 = sub i64 %67, %memload48
%69 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %67, i64 %memload48)
%CF50 = extractvalue { i64, i1 } %69, 1
%ZF51 = icmp eq i64 %68, 0
%highbit52 = and i64 -9223372036854775808, %68
%SF53 = icmp ne i64 %highbit52, 0
%70 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %67, i64 %memload48)
%OF54 = extractvalue { i64, i1 } %70, 1
%71 = and i64 %68, 255
%72 = call i64 @llvm.ctpop.i64(i64 %71)
%73 = and i64 %72, 1
%PF55 = icmp eq i64 %73, 0
%CmpZF_JNE81 = icmp eq i1 %ZF51, false
br i1 %CmpZF_JNE81, label %bb.11, label %bb.10
bb.10: ; preds = %bb.9
%memload56 = load i64, ptr %RSP_P.8, align 1
%memref-disp57 = add i64 %RAX34, 16
%74 = inttoptr i64 %memref-disp57 to ptr
%75 = load i64, ptr %74, align 1
%76 = sub i64 %75, %memload56
%77 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %75, i64 %memload56)
%CF58 = extractvalue { i64, i1 } %77, 1
%ZF59 = icmp eq i64 %76, 0
%highbit60 = and i64 -9223372036854775808, %76
%SF61 = icmp ne i64 %highbit60, 0
%78 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %75, i64 %memload56)
%OF62 = extractvalue { i64, i1 } %78, 1
%79 = and i64 %76, 255
%80 = call i64 @llvm.ctpop.i64(i64 %79)
%81 = and i64 %80, 1
%PF63 = icmp eq i64 %81, 0
%CmpZF_JE82 = icmp eq i1 %ZF59, true
br i1 %CmpZF_JE82, label %bb.3, label %bb.11
bb.11: ; preds = %bb.10, %bb.9, %bb.8, %bb.7
%memload64 = load i32, ptr @RTN_UNSPEC, align 1
%82 = call ptr @ip_route_me_harder()
%RAX65 = ptrtoint ptr %82 to i64
%83 = and i64 %RAX65, %RAX65
%highbit66 = and i64 -9223372036854775808, %83
%SF67 = icmp ne i64 %highbit66, 0
%ZF68 = icmp eq i64 %83, 0
%84 = and i64 %83, 255
%85 = call i64 @llvm.ctpop.i64(i64 %84)
%86 = and i64 %85, 1
%PF69 = icmp eq i64 %86, 0
%CmpZF_JE83 = icmp eq i1 %ZF68, true
br i1 %CmpZF_JE83, label %bb.3, label %bb.12
bb.12: ; preds = %bb.11
%memload70 = load i32, ptr @NF_DROP, align 1
store i32 %memload70, ptr %EBP-SKT-LOC, align 1
br label %bb.3
bb.2: ; preds = %bb.1, %entry
%memload71 = load i32, ptr @NF_ACCEPT, align 1
store i32 %memload71, ptr %EBP-SKT-LOC, align 1
br label %bb.3
bb.3: ; preds = %bb.2, %bb.12, %bb.11, %bb.10, %bb.6, %bb.5, %bb.4
%EBP77 = load i32, ptr %EBP-SKT-LOC, align 1
ret i32 %EBP77
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/ipv4/netfilter/extr_iptable_mangle.c_ipt_local_hook.c'
source_filename = "AnghaBench/fastsocket/kernel/net/ipv4/netfilter/extr_iptable_mangle.c_ipt_local_hook.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NF_ACCEPT = common local_unnamed_addr global i32 0, align 4
@NF_DROP = common local_unnamed_addr global i32 0, align 4
@NF_STOLEN = common local_unnamed_addr global i32 0, align 4
@NF_QUEUE = common local_unnamed_addr global i32 0, align 4
@RTN_UNSPEC = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ipt_local_hook], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ipt_local_hook(i32 noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr nocapture readnone %4) #0 {
%6 = load i32, ptr %1, align 8, !tbaa !6
%7 = icmp ult i32 %6, 24
br i1 %7, label %11, label %8
8: ; preds = %5
%9 = tail call i32 @ip_hdrlen(ptr noundef nonnull %1) #2
%10 = icmp ult i32 %9, 24
br i1 %10, label %11, label %13
11: ; preds = %8, %5
%12 = load i32, ptr @NF_ACCEPT, align 4, !tbaa !12
br label %54
13: ; preds = %8
%14 = getelementptr inbounds i8, ptr %1, i64 8
%15 = load i64, ptr %14, align 8, !tbaa !13
%16 = tail call ptr @ip_hdr(ptr noundef nonnull %1) #2
%17 = load i64, ptr %16, align 8, !tbaa !14
%18 = getelementptr inbounds i8, ptr %16, i64 8
%19 = load i64, ptr %18, align 8, !tbaa !16
%20 = getelementptr inbounds i8, ptr %16, i64 16
%21 = load i64, ptr %20, align 8, !tbaa !17
%22 = tail call ptr @dev_net(ptr noundef %3) #2
%23 = load i32, ptr %22, align 4, !tbaa !18
%24 = tail call i32 @ipt_do_table(ptr noundef nonnull %1, i32 noundef %0, ptr noundef %2, ptr noundef %3, i32 noundef %23) #2
%25 = load i32, ptr @NF_DROP, align 4, !tbaa !12
%26 = icmp eq i32 %24, %25
%27 = load i32, ptr @NF_STOLEN, align 4
%28 = icmp eq i32 %24, %27
%29 = select i1 %26, i1 true, i1 %28
%30 = load i32, ptr @NF_QUEUE, align 4
%31 = icmp eq i32 %24, %30
%32 = select i1 %29, i1 true, i1 %31
br i1 %32, label %54, label %33
33: ; preds = %13
%34 = tail call ptr @ip_hdr(ptr noundef nonnull %1) #2
%35 = load i64, ptr %34, align 8, !tbaa !14
%36 = icmp eq i64 %35, %17
br i1 %36, label %37, label %48
37: ; preds = %33
%38 = getelementptr inbounds i8, ptr %34, i64 8
%39 = load i64, ptr %38, align 8, !tbaa !16
%40 = icmp eq i64 %39, %19
br i1 %40, label %41, label %48
41: ; preds = %37
%42 = load i64, ptr %14, align 8, !tbaa !13
%43 = icmp eq i64 %42, %15
br i1 %43, label %44, label %48
44: ; preds = %41
%45 = getelementptr inbounds i8, ptr %34, i64 16
%46 = load i64, ptr %45, align 8, !tbaa !17
%47 = icmp eq i64 %46, %21
br i1 %47, label %54, label %48
48: ; preds = %44, %41, %37, %33
%49 = load i32, ptr @RTN_UNSPEC, align 4, !tbaa !12
%50 = tail call i64 @ip_route_me_harder(ptr noundef nonnull %1, i32 noundef %49) #2
%51 = icmp eq i64 %50, 0
%52 = load i32, ptr @NF_DROP, align 4
%53 = select i1 %51, i32 %24, i32 %52
br label %54
54: ; preds = %48, %13, %44, %11
%55 = phi i32 [ %12, %11 ], [ %24, %44 ], [ %24, %13 ], [ %53, %48 ]
ret i32 %55
}
declare i32 @ip_hdrlen(ptr noundef) local_unnamed_addr #1
declare ptr @ip_hdr(ptr noundef) local_unnamed_addr #1
declare i32 @ipt_do_table(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @dev_net(ptr noundef) local_unnamed_addr #1
declare i64 @ip_route_me_harder(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"sk_buff", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !11, i64 8}
!14 = !{!15, !11, i64 0}
!15 = !{!"iphdr", !11, i64 0, !11, i64 8, !11, i64 16}
!16 = !{!15, !11, i64 8}
!17 = !{!15, !11, i64 16}
!18 = !{!19, !8, i64 0}
!19 = !{!"TYPE_4__", !20, i64 0}
!20 = !{!"TYPE_3__", !8, i64 0}
| fastsocket_kernel_net_ipv4_netfilter_extr_iptable_mangle.c_ipt_local_hook |
; ModuleID = 'exploitdb_exploits_multiple_dos_extr_146.c_corruptor.so'
source_filename = "exploitdb_exploits_multiple_dos_extr_146.c_corruptor.so"
declare dso_local i32 @rand()
define dso_local i32 @corruptor(i64 %arg1, i32 %arg2) {
entry:
%EAX-SKT-LOC = alloca i32, align 4
%EBX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%EAX = call i32 @rand()
%RBX = sext i32 %EAX to i64
%RAX = mul i64 %RBX, -2004318071
%0 = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 %RBX, i64 -2004318071)
%OF = extractvalue { i64, i1 } %0, 1
%RAX1 = lshr i64 %RAX, 32
%ZF = icmp eq i64 %RAX1, 0
%highbit = and i64 -9223372036854775808, %RAX1
%SF = icmp ne i64 %highbit, 0
%1 = trunc i64 %RAX1 to i32
%2 = trunc i64 %RBX to i32
%EAX5 = add nsw i32 %1, %2
%highbit2 = and i32 -2147483648, %EAX5
%SF3 = icmp ne i32 %highbit2, 0
%ZF4 = icmp eq i32 %EAX5, 0
%ECX = lshr i32 %EAX5, 31
%ZF6 = icmp eq i32 %ECX, 0
%highbit7 = and i32 -2147483648, %ECX
%SF8 = icmp ne i32 %highbit7, 0
%EAX12 = lshr i32 %EAX5, 3
%ZF9 = icmp eq i32 %EAX12, 0
%highbit10 = and i32 -2147483648, %EAX12
%SF11 = icmp ne i32 %highbit10, 0
%EAX16 = add nsw i32 %EAX12, %ECX
%highbit13 = and i32 -2147483648, %EAX16
%SF14 = icmp ne i32 %highbit13, 0
%ZF15 = icmp eq i32 %EAX16, 0
%3 = zext i32 %EAX16 to i64
%memref-idxreg = mul i64 4, %3
%4 = zext i32 %EAX16 to i64
%memref-basereg = add i64 %4, %memref-idxreg
%EAX17 = trunc i64 %memref-basereg to i32
%5 = zext i32 %EAX17 to i64
%memref-idxreg18 = mul i64 2, %5
%6 = zext i32 %EAX17 to i64
%memref-basereg19 = add i64 %6, %memref-idxreg18
%EAX20 = trunc i64 %memref-basereg19 to i32
%7 = trunc i64 %RBX to i32
%EBX = sub i32 %7, %EAX20
%8 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %7, i32 %EAX20)
%CF = extractvalue { i32, i1 } %8, 1
%ZF21 = icmp eq i32 %EBX, 0
%highbit22 = and i32 -2147483648, %EBX
%SF23 = icmp ne i32 %highbit22, 0
%9 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %7, i32 %EAX20)
%OF24 = extractvalue { i32, i1 } %9, 1
%10 = and i32 %EBX, 255
%11 = call i32 @llvm.ctpop.i32(i32 %10)
%12 = and i32 %11, 1
%PF = icmp eq i32 %12, 0
store i32 %EAX20, ptr %EAX-SKT-LOC, align 1
%CmpSF_JS = icmp eq i1 %SF23, true
br i1 %CmpSF_JS, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%EBX29 = add i32 %EBX, 1
%13 = and i32 %EBX29, 255
%14 = call i32 @llvm.ctpop.i32(i32 %13)
%15 = and i32 %14, 1
%PF25 = icmp eq i32 %15, 0
%ZF26 = icmp eq i32 %EBX29, 0
%highbit27 = and i32 -2147483648, %EBX29
%SF28 = icmp ne i32 %highbit27, 0
%16 = zext i32 %EBX29 to i64
store i64 %16, ptr %EBX-SKT-LOC, align 1
br label %bb.2
bb.2: ; preds = %bb.1, %bb.2
%EAX30 = call i32 @rand()
%17 = sext i32 %EAX30 to i64
%18 = lshr i64 %17, 32
%EDX = trunc i64 %18 to i32
%19 = sext i32 %EAX30 to i64
%20 = sext i32 %EDX to i64
%div_hb_ls = shl nuw i64 %20, 32
%dividend = or i64 %div_hb_ls, %19
%21 = sext i32 %arg2 to i64
%div_q = sdiv i64 %dividend, %21
%EAX31 = trunc i64 %div_q to i32
%div_r = srem i64 %dividend, %21
%EDX32 = trunc i64 %div_r to i32
%EAX33 = call i32 @rand()
%RCX = sext i32 %EDX32 to i64
%memref-basereg34 = add i64 %arg1, %RCX
%22 = trunc i32 %EAX33 to i8
%23 = inttoptr i64 %memref-basereg34 to ptr
store i8 %22, ptr %23, align 1
%24 = load i64, ptr %EBX-SKT-LOC, align 1
%EBX35 = trunc i64 %24 to i32
%EBX40 = sub i32 %EBX35, 1
%25 = and i32 %EBX40, 255
%26 = call i32 @llvm.ctpop.i32(i32 %25)
%27 = and i32 %26, 1
%PF36 = icmp eq i32 %27, 0
%ZF37 = icmp eq i32 %EBX40, 0
%highbit38 = and i32 -2147483648, %EBX40
%SF39 = icmp ne i32 %highbit38, 0
store i32 %EAX33, ptr %EAX-SKT-LOC, align 1
%CmpZF_JNE = icmp eq i1 %ZF37, false
%28 = zext i32 %EBX40 to i64
store i64 %28, ptr %EBX-SKT-LOC, align 1
br i1 %CmpZF_JNE, label %bb.2, label %bb.3
bb.3: ; preds = %bb.2, %entry
%EAX41 = load i32, ptr %EAX-SKT-LOC, align 1
ret i32 %EAX41
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i64, i1 } @llvm.smul.with.overflow.i64(i64, i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/exploitdb/exploits/multiple/dos/extr_146.c_corruptor.c'
source_filename = "AnghaBench/exploitdb/exploits/multiple/dos/extr_146.c_corruptor.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @corruptor(ptr nocapture noundef writeonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @rand() #2
%4 = srem i32 %3, 15
%5 = icmp slt i32 %4, 0
br i1 %5, label %16, label %6
6: ; preds = %2, %6
%7 = phi i32 [ %14, %6 ], [ 0, %2 ]
%8 = tail call i32 @rand() #2
%9 = srem i32 %8, %1
%10 = tail call i32 @rand() #2
%11 = trunc i32 %10 to i8
%12 = sext i32 %9 to i64
%13 = getelementptr inbounds i8, ptr %0, i64 %12
store i8 %11, ptr %13, align 1, !tbaa !6
%14 = add nuw nsw i32 %7, 1
%15 = icmp eq i32 %7, %4
br i1 %15, label %16, label %6, !llvm.loop !9
16: ; preds = %6, %2
ret void
}
declare i32 @rand(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| exploitdb_exploits_multiple_dos_extr_146.c_corruptor |
; ModuleID = 'linux_drivers_gpu_ipu-v3_extr_ipu-dc.c_ipu_dc_put.so'
source_filename = "linux_drivers_gpu_ipu-v3_extr_ipu-dc.c_ipu_dc_put.so"
declare dso_local ptr @mutex_lock()
declare dso_local ptr @mutex_unlock()
define dso_local i64 @ipu_dc_put(i64 %arg1) {
entry:
%stktop_8 = alloca i8, i32 16, align 1
%tos = ptrtoint ptr %stktop_8 to i64
%0 = add i64 %tos, 8
%RSPAdj_P.8 = inttoptr i64 %0 to ptr
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%memref-disp = add i64 %arg1, 8
%1 = inttoptr i64 %memref-disp to ptr
%memload = load i64, ptr %1, align 1
%2 = call ptr @mutex_lock()
%RAX = ptrtoint ptr %2 to i64
%3 = inttoptr i64 %arg1 to ptr
store i32 0, ptr %3, align 1
%4 = tail call ptr @mutex_unlock()
%RAX1 = ptrtoint ptr %4 to i64
ret i64 %RAX1
}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/ipu-v3/extr_ipu-dc.c_ipu_dc_put.c'
source_filename = "AnghaBench/linux/drivers/gpu/ipu-v3/extr_ipu-dc.c_ipu_dc_put.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @ipu_dc_put(ptr nocapture noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = tail call i32 @mutex_lock(ptr noundef %3) #2
store i32 0, ptr %0, align 8, !tbaa !12
%5 = tail call i32 @mutex_unlock(ptr noundef %3) #2
ret void
}
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"ipu_dc", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 0}
| linux_drivers_gpu_ipu-v3_extr_ipu-dc.c_ipu_dc_put |
; ModuleID = 'qmk_firmware_tmk_core_protocol_extr_adb.c_adb_host_kbd_recv.so'
source_filename = "qmk_firmware_tmk_core_protocol_extr_adb.c_adb_host_kbd_recv.so"
@ADDR_KEYB = common dso_local global i32 0, align 4
declare dso_local ptr @adb_host_dev_recv()
define dso_local i64 @adb_host_kbd_recv() {
entry:
%memload = load i32, ptr @ADDR_KEYB, align 1
%0 = tail call ptr @adb_host_dev_recv()
%RAX = ptrtoint ptr %0 to i64
ret i64 %RAX
}
| ; ModuleID = 'AnghaBench/qmk_firmware/tmk_core/protocol/extr_adb.c_adb_host_kbd_recv.c'
source_filename = "AnghaBench/qmk_firmware/tmk_core/protocol/extr_adb.c_adb_host_kbd_recv.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ADDR_KEYB = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @adb_host_kbd_recv() local_unnamed_addr #0 {
%1 = load i32, ptr @ADDR_KEYB, align 4, !tbaa !6
%2 = tail call i32 @adb_host_dev_recv(i32 noundef %1) #2
ret i32 %2
}
declare i32 @adb_host_dev_recv(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| qmk_firmware_tmk_core_protocol_extr_adb.c_adb_host_kbd_recv |
; ModuleID = 'linux_drivers_gpu_drm_exynos_extr_exynos_drm_dsi.c_exynos_dsi_remove.so'
source_filename = "linux_drivers_gpu_drm_exynos_extr_exynos_drm_dsi.c_exynos_dsi_remove.so"
@exynos_dsi_component_ops = common dso_local global i32 0, align 4
declare dso_local ptr @platform_get_drvdata()
declare dso_local ptr @of_node_put()
declare dso_local ptr @pm_runtime_disable()
declare dso_local ptr @component_del()
define dso_local i32 @exynos_dsi_remove(i64 %arg1) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%0 = call ptr @platform_get_drvdata()
%memload = load i32, ptr %0, align 1
%1 = call ptr @of_node_put()
%RAX1 = ptrtoint ptr %1 to i64
%2 = call ptr @pm_runtime_disable()
%RAX2 = ptrtoint ptr %2 to i64
%3 = call ptr @component_del()
%RAX3 = ptrtoint ptr %3 to i64
ret i32 0
}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/exynos/extr_exynos_drm_dsi.c_exynos_dsi_remove.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/exynos/extr_exynos_drm_dsi.c_exynos_dsi_remove.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@exynos_dsi_component_ops = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @exynos_dsi_remove], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @exynos_dsi_remove(ptr noundef %0) #0 {
%2 = tail call ptr @platform_get_drvdata(ptr noundef %0) #2
%3 = load i32, ptr %2, align 4, !tbaa !6
%4 = tail call i32 @of_node_put(i32 noundef %3) #2
%5 = tail call i32 @pm_runtime_disable(ptr noundef %0) #2
%6 = tail call i32 @component_del(ptr noundef %0, ptr noundef nonnull @exynos_dsi_component_ops) #2
ret i32 0
}
declare ptr @platform_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @of_node_put(i32 noundef) local_unnamed_addr #1
declare i32 @pm_runtime_disable(ptr noundef) local_unnamed_addr #1
declare i32 @component_del(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"exynos_dsi", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_gpu_drm_exynos_extr_exynos_drm_dsi.c_exynos_dsi_remove |
; ModuleID = 'linux_drivers_media_pci_tw68_extr_tw68-video.c_tw68_try_fmt_vid_cap.so'
source_filename = "linux_drivers_media_pci_tw68_extr_tw68-video.c_tw68_try_fmt_vid_cap.so"
@V4L2_STD_525_60 = common dso_local global i32 0, align 4
declare dso_local ptr @video_drvdata()
declare dso_local ptr @format_by_fourcc()
define dso_local i32 @tw68_try_fmt_vid_cap(i64 %arg1, i64 %arg2, i64 %arg3) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
store i64 3735928559, ptr %RSP_P.0, align 8
%0 = call ptr @video_drvdata()
%memref-disp = add i64 %arg3, 24
%1 = inttoptr i64 %memref-disp to ptr
%memload = load i32, ptr %1, align 1
%2 = call ptr @format_by_fourcc()
%RAX1 = ptrtoint ptr %2 to i64
%3 = and i64 %RAX1, %RAX1
%highbit = and i64 -9223372036854775808, %3
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %3, 0
%4 = and i64 %3, 255
%5 = call i64 @llvm.ctpop.i64(i64 %4)
%6 = and i64 %5, 1
%PF = icmp eq i64 %6, 0
bb.1: ; No predecessors!
%7 = inttoptr i64 %arg3 to ptr
%memload2 = load i32, ptr %7, align 1
%memload3 = load i64, ptr %0, align 1
%memload4 = load i32, ptr @V4L2_STD_525_60, align 1
%8 = inttoptr i64 %memload3 to ptr
%9 = load i32, ptr %8, align 1
%10 = zext i32 %9 to i64
%11 = zext i32 %memload4 to i64
%12 = and i64 %10, %11
%ZF5 = icmp eq i64 %12, 0
%highbit6 = and i64 -9223372036854775808, %12
%SF7 = icmp ne i64 %highbit6, 0
%13 = and i64 %12, 255
%14 = call i64 @llvm.ctpop.i64(i64 %13)
%15 = and i64 %14, 1
%PF8 = icmp eq i64 %15, 0
%Cond_CMOVE = icmp eq i1 %ZF5, true
%CMOV = select i1 %Cond_CMOVE, i32 576, i32 480
%memref-disp9 = add i32 %memload2, -129
%16 = sub i32 %memref-disp9, 3
%17 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memref-disp9, i32 3)
%CF = extractvalue { i32, i1 } %17, 1
%ZF10 = icmp eq i32 %16, 0
%highbit11 = and i32 -2147483648, %16
%SF12 = icmp ne i32 %highbit11, 0
%18 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memref-disp9, i32 3)
%OF = extractvalue { i32, i1 } %18, 1
%19 = and i32 %16, 255
%20 = call i32 @llvm.ctpop.i32(i32 %19)
%21 = and i32 %20, 1
%PF13 = icmp eq i32 %21, 0
bb.2: ; No predecessors!
%R8D = add nsw i32 %CMOV, %CMOV
%highbit14 = and i32 -2147483648, %R8D
%SF15 = icmp ne i32 %highbit14, 0
%ZF16 = icmp eq i32 %R8D, 0
bb.4: ; No predecessors!
%22 = sub i32 %memload2, 128
%23 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload2, i32 128)
%CF17 = extractvalue { i32, i1 } %23, 1
%ZF18 = icmp eq i32 %22, 0
%highbit19 = and i32 -2147483648, %22
%SF20 = icmp ne i32 %highbit19, 0
%24 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload2, i32 128)
%OF21 = extractvalue { i32, i1 } %24, 1
%25 = and i32 %22, 255
%26 = call i32 @llvm.ctpop.i32(i32 %25)
%27 = and i32 %26, 1
%PF22 = icmp eq i32 %27, 0
bb.5: ; No predecessors!
%28 = sub i32 %memload2, 132
%29 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %memload2, i32 132)
%CF23 = extractvalue { i32, i1 } %29, 1
%ZF24 = icmp eq i32 %28, 0
%highbit25 = and i32 -2147483648, %28
%SF26 = icmp ne i32 %highbit25, 0
%30 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %memload2, i32 132)
%OF27 = extractvalue { i32, i1 } %30, 1
%31 = and i32 %28, 255
%32 = call i32 @llvm.ctpop.i32(i32 %31)
%33 = and i32 %32, 1
%PF28 = icmp eq i32 %33, 0
bb.6: ; No predecessors!
%EDX = lshr i32 %CMOV, 1
%ZF29 = icmp eq i32 %EDX, 0
%highbit30 = and i32 -2147483648, %EDX
%SF31 = icmp ne i32 %highbit30, 0
%memref-disp32 = add i64 %arg3, 4
%34 = inttoptr i64 %memref-disp32 to ptr
%35 = load i32, ptr %34, align 1
%36 = sub i32 %EDX, %35
%37 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %EDX, i32 %35)
%CF33 = extractvalue { i32, i1 } %37, 1
%ZF34 = icmp eq i32 %36, 0
%highbit35 = and i32 -2147483648, %36
%SF36 = icmp ne i32 %highbit35, 0
%38 = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %EDX, i32 %35)
%OF37 = extractvalue { i32, i1 } %38, 1
%39 = and i32 %36, 255
%40 = call i32 @llvm.ctpop.i32(i32 %39)
%41 = and i32 %40, 1
%PF38 = icmp eq i32 %41, 0
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/linux/drivers/media/pci/tw68/extr_tw68-video.c_tw68_try_fmt_vid_cap.c'
source_filename = "AnghaBench/linux/drivers/media/pci/tw68/extr_tw68-video.c_tw68_try_fmt_vid_cap.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@V4L2_STD_525_60 = common local_unnamed_addr global i32 0, align 4
@V4L2_COLORSPACE_SMPTE170M = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @tw68_try_fmt_vid_cap], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @tw68_try_fmt_vid_cap(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture noundef %2) #0 {
%4 = tail call ptr @video_drvdata(ptr noundef %0) #3
%5 = getelementptr inbounds i8, ptr %2, i64 24
%6 = load i32, ptr %5, align 4, !tbaa !6
%7 = tail call ptr @format_by_fourcc(i32 noundef %6) #3
%8 = icmp eq ptr %7, null
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = load i32, ptr @EINVAL, align 4, !tbaa !13
%11 = sub nsw i32 0, %10
br label %53
12: ; preds = %3
%13 = load i32, ptr %2, align 4, !tbaa !14
%14 = load ptr, ptr %4, align 8, !tbaa !15
%15 = load i32, ptr %14, align 4, !tbaa !18
%16 = load i32, ptr @V4L2_STD_525_60, align 4, !tbaa !13
%17 = and i32 %16, %15
%18 = icmp eq i32 %17, 0
%19 = select i1 %18, i32 576, i32 480
switch i32 %13, label %22 [
i32 128, label %28
i32 132, label %28
i32 131, label %20
i32 130, label %20
i32 129, label %20
]
20: ; preds = %12, %12, %12
%21 = shl nuw nsw i32 %19, 1
br label %28
22: ; preds = %12
%23 = getelementptr inbounds i8, ptr %2, i64 4
%24 = load i32, ptr %23, align 4, !tbaa !20
%25 = lshr exact i32 %19, 1
%26 = icmp ugt i32 %24, %25
%27 = select i1 %26, i32 131, i32 132
br label %28
28: ; preds = %12, %12, %22, %20
%29 = phi i32 [ %27, %22 ], [ %13, %20 ], [ %13, %12 ], [ %13, %12 ]
%30 = phi i32 [ %19, %22 ], [ %21, %20 ], [ %19, %12 ], [ %19, %12 ]
store i32 %29, ptr %2, align 4, !tbaa !14
%31 = getelementptr inbounds i8, ptr %2, i64 8
%32 = load i32, ptr %31, align 4, !tbaa !21
%33 = tail call i32 @llvm.smax.i32(i32 %32, i32 48)
%34 = getelementptr inbounds i8, ptr %2, i64 4
%35 = load i32, ptr %34, align 4, !tbaa !20
%36 = icmp ult i32 %35, 32
%37 = tail call i32 @llvm.umax.i32(i32 %35, i32 32)
%38 = tail call i32 @llvm.umin.i32(i32 %33, i32 720)
%39 = icmp ugt i32 %37, %30
%40 = tail call i32 @llvm.umin.i32(i32 %37, i32 %30)
%41 = or i1 %36, %39
br i1 %41, label %42, label %43
42: ; preds = %28
store i32 %40, ptr %34, align 4, !tbaa !20
br label %43
43: ; preds = %28, %42
%44 = and i32 %38, 1020
store i32 %44, ptr %31, align 4, !tbaa !21
%45 = load i32, ptr %7, align 4, !tbaa !22
%46 = mul nsw i32 %45, %44
%47 = ashr i32 %46, 3
%48 = getelementptr inbounds i8, ptr %2, i64 12
store i32 %47, ptr %48, align 4, !tbaa !24
%49 = mul i32 %40, %47
%50 = getelementptr inbounds i8, ptr %2, i64 16
store i32 %49, ptr %50, align 4, !tbaa !25
%51 = load i32, ptr @V4L2_COLORSPACE_SMPTE170M, align 4, !tbaa !13
%52 = getelementptr inbounds i8, ptr %2, i64 20
store i32 %51, ptr %52, align 4, !tbaa !26
br label %53
53: ; preds = %43, %9
%54 = phi i32 [ %11, %9 ], [ 0, %43 ]
ret i32 %54
}
declare ptr @video_drvdata(ptr noundef) local_unnamed_addr #1
declare ptr @format_by_fourcc(i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #2
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #2
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !10, i64 24}
!7 = !{!"v4l2_format", !8, i64 0}
!8 = !{!"TYPE_6__", !9, i64 0}
!9 = !{!"TYPE_5__", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24}
!10 = !{!"int", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C/C++ TBAA"}
!13 = !{!10, !10, i64 0}
!14 = !{!7, !10, i64 0}
!15 = !{!16, !17, i64 0}
!16 = !{!"tw68_dev", !17, i64 0}
!17 = !{!"any pointer", !11, i64 0}
!18 = !{!19, !10, i64 0}
!19 = !{!"TYPE_4__", !10, i64 0}
!20 = !{!7, !10, i64 4}
!21 = !{!7, !10, i64 8}
!22 = !{!23, !10, i64 0}
!23 = !{!"tw68_format", !10, i64 0}
!24 = !{!7, !10, i64 12}
!25 = !{!7, !10, i64 16}
!26 = !{!7, !10, i64 20}
| linux_drivers_media_pci_tw68_extr_tw68-video.c_tw68_try_fmt_vid_cap |
; ModuleID = 'FFmpeg_libavformat_extr_utils.c_av_stream_new_side_data.so'
source_filename = "FFmpeg_libavformat_extr_utils.c_av_stream_new_side_data.so"
declare dso_local ptr @av_malloc()
declare dso_local ptr @av_stream_add_side_data()
declare dso_local ptr @av_freep()
define dso_local i64 @av_stream_new_side_data(i64 %arg1, i32 %arg2, i32 %arg3) {
entry:
%RBX-SKT-LOC = alloca i64, align 8
%stktop_8 = alloca i8, i32 8, align 1
%tos = ptrtoint ptr %stktop_8 to i64
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
store i64 3735928559, ptr %stktop_8, align 8
%0 = call ptr @av_malloc()
%RAX = ptrtoint ptr %0 to i64
store i64 %RAX, ptr %stktop_8, align 1
%1 = and i64 %RAX, %RAX
%highbit = and i64 -9223372036854775808, %1
%SF = icmp ne i64 %highbit, 0
%ZF = icmp eq i64 %1, 0
%2 = and i64 %1, 255
%3 = call i64 @llvm.ctpop.i64(i64 %2)
%4 = and i64 %3, 1
%PF = icmp eq i64 %4, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.3, label %bb.1
bb.1: ; preds = %entry
%5 = call ptr @av_stream_add_side_data()
%RAX1 = ptrtoint ptr %5 to i64
%6 = trunc i64 %RAX1 to i32
%7 = trunc i64 %RAX1 to i32
%8 = and i32 %6, %7
%highbit2 = and i32 -2147483648, %8
%SF3 = icmp ne i32 %highbit2, 0
%ZF4 = icmp eq i32 %8, 0
%9 = and i32 %8, 255
%10 = call i32 @llvm.ctpop.i32(i32 %9)
%11 = and i32 %10, 1
%PF5 = icmp eq i32 %11, 0
store i64 %RAX, ptr %RBX-SKT-LOC, align 1
%CmpSF_JNS = icmp eq i1 %SF3, false
br i1 %CmpSF_JNS, label %bb.4, label %bb.2
bb.2: ; preds = %bb.1
%RDI = ptrtoint ptr %stktop_8 to i64
%12 = call ptr @av_freep()
%RAX6 = ptrtoint ptr %12 to i64
br label %bb.3
bb.3: ; preds = %bb.2, %entry
%13 = zext i32 0 to i64
store i64 %13, ptr %RBX-SKT-LOC, align 1
br label %bb.4
bb.4: ; preds = %bb.3, %bb.1
%RBX = load i64, ptr %RBX-SKT-LOC, align 1
ret i64 %RBX
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.ctpop.i64(i64) #0
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/FFmpeg/libavformat/extr_utils.c_av_stream_new_side_data.c'
source_filename = "AnghaBench/FFmpeg/libavformat/extr_utils.c_av_stream_new_side_data.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @av_stream_new_side_data(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%5 = tail call ptr @av_malloc(i32 noundef %2) #3
store ptr %5, ptr %4, align 8, !tbaa !6
%6 = icmp eq ptr %5, null
br i1 %6, label %12, label %7
7: ; preds = %3
%8 = tail call i32 @av_stream_add_side_data(ptr noundef %0, i32 noundef %1, ptr noundef nonnull %5, i32 noundef %2) #3
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = call i32 @av_freep(ptr noundef nonnull %4) #3
br label %12
12: ; preds = %7, %3, %10
%13 = phi ptr [ null, %10 ], [ null, %3 ], [ %5, %7 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret ptr %13
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @av_malloc(i32 noundef) local_unnamed_addr #2
declare i32 @av_stream_add_side_data(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @av_freep(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| FFmpeg_libavformat_extr_utils.c_av_stream_new_side_data |
; ModuleID = 'linux_drivers_net_wan_extr_dlci.c_dlci_change_mtu.so'
source_filename = "linux_drivers_net_wan_extr_dlci.c_dlci_change_mtu.so"
declare dso_local ptr @netdev_priv()
declare dso_local ptr @dev_set_mtu()
define dso_local i64 @dlci_change_mtu(i64 %arg1, i32 %arg2) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%0 = call ptr @netdev_priv()
%memload = load i32, ptr %0, align 1
%1 = tail call ptr @dev_set_mtu()
%RAX1 = ptrtoint ptr %1 to i64
ret i64 %RAX1
}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wan/extr_dlci.c_dlci_change_mtu.c'
source_filename = "AnghaBench/linux/drivers/net/wan/extr_dlci.c_dlci_change_mtu.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @dlci_change_mtu], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @dlci_change_mtu(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @netdev_priv(ptr noundef %0) #2
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = tail call i32 @dev_set_mtu(i32 noundef %4, i32 noundef %1) #2
ret i32 %5
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i32 @dev_set_mtu(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"dlci_local", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_net_wan_extr_dlci.c_dlci_change_mtu |
; ModuleID = 'fastsocket_kernel_drivers_media_dvb_dvb-usb_extr_cxusb.c_cxusb_streaming_ctrl.so'
source_filename = "fastsocket_kernel_drivers_media_dvb_dvb-usb_extr_cxusb.c_cxusb_streaming_ctrl.so"
@CMD_STREAMING_ON = common dso_local global i32 0, align 4
@CMD_STREAMING_OFF = common dso_local global i32 0, align 4
declare dso_local ptr @cxusb_ctrl_msg()
define dso_local i32 @cxusb_streaming_ctrl(i64 %arg1, i32 %arg2) {
entry:
%RSP_P.0 = alloca i64, align 1
store i64 3735928559, ptr %RSP_P.0, align 8
%0 = sext i32 3 to i64
store i64 %0, ptr %RSP_P.0, align 1
%1 = inttoptr i64 %arg1 to ptr
%memload = load i32, ptr %1, align 1
%2 = and i32 %arg2, %arg2
%highbit = and i32 -2147483648, %2
%SF = icmp ne i32 %highbit, 0
%ZF = icmp eq i32 %2, 0
%3 = and i32 %2, 255
%4 = call i32 @llvm.ctpop.i32(i32 %3)
%5 = and i32 %4, 1
%PF = icmp eq i32 %5, 0
%CmpZF_JE = icmp eq i1 %ZF, true
br i1 %CmpZF_JE, label %bb.2, label %bb.1
bb.1: ; preds = %entry
%memload1 = load i32, ptr @CMD_STREAMING_ON, align 1
%RDX = ptrtoint ptr %RSP_P.0 to i64
br label %bb.3
bb.2: ; preds = %entry
%memload2 = load i32, ptr @CMD_STREAMING_OFF, align 1
br label %bb.3
bb.3: ; preds = %bb.2, %bb.1
%6 = call ptr @cxusb_ctrl_msg()
%RAX = ptrtoint ptr %6 to i64
ret i32 0
}
; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.ctpop.i32(i32) #0
attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/dvb/dvb-usb/extr_cxusb.c_cxusb_streaming_ctrl.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/dvb/dvb-usb/extr_cxusb.c_cxusb_streaming_ctrl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CMD_STREAMING_ON = common local_unnamed_addr global i32 0, align 4
@CMD_STREAMING_OFF = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cxusb_streaming_ctrl], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @cxusb_streaming_ctrl(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = alloca [2 x i32], align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
store i64 3, ptr %3, align 8
%4 = icmp eq i32 %1, 0
%5 = load i32, ptr %0, align 4, !tbaa !6
br i1 %4, label %9, label %6
6: ; preds = %2
%7 = load i32, ptr @CMD_STREAMING_ON, align 4, !tbaa !11
%8 = call i32 @cxusb_ctrl_msg(i32 noundef %5, i32 noundef %7, ptr noundef nonnull %3, i32 noundef 2, ptr noundef null, i32 noundef 0) #3
br label %12
9: ; preds = %2
%10 = load i32, ptr @CMD_STREAMING_OFF, align 4, !tbaa !11
%11 = tail call i32 @cxusb_ctrl_msg(i32 noundef %5, i32 noundef %10, ptr noundef null, i32 noundef 0, ptr noundef null, i32 noundef 0) #3
br label %12
12: ; preds = %9, %6
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cxusb_ctrl_msg(i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"dvb_usb_adapter", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| fastsocket_kernel_drivers_media_dvb_dvb-usb_extr_cxusb.c_cxusb_streaming_ctrl |
; ModuleID = 'fastsocket_kernel_fs_ocfs2_cluster_extr_tcp.c_o2net_reconnect_delay.so'
source_filename = "fastsocket_kernel_fs_ocfs2_cluster_extr_tcp.c_o2net_reconnect_delay.so"
@o2nm_single_cluster = common dso_local global i64 0, align 8
define dso_local i32 @o2net_reconnect_delay() {
entry:
%memload = load i64, ptr @o2nm_single_cluster, align 1
%0 = inttoptr i64 %memload to ptr
%memload1 = load i32, ptr %0, align 1
ret i32 %memload1
}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/fs/ocfs2/cluster/extr_tcp.c_o2net_reconnect_delay.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/ocfs2/cluster/extr_tcp.c_o2net_reconnect_delay.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@o2nm_single_cluster = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @o2net_reconnect_delay], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @o2net_reconnect_delay() #0 {
%1 = load ptr, ptr @o2nm_single_cluster, align 8, !tbaa !6
%2 = load i32, ptr %1, align 4, !tbaa !10
ret i32 %2
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
| fastsocket_kernel_fs_ocfs2_cluster_extr_tcp.c_o2net_reconnect_delay |
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