IR_x86 string | IR_arm string | filename string |
|---|---|---|
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/mips/extr_h264qpel_msa.c_ff_put_h264_qpel8_mc23_msa.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/mips/extr_h264qpel_msa.c_ff_put_h264_qpel8_mc23_msa.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@luma_mask_arr = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local void @ff_put_h264_qpel8_mc23_msa(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load ptr, ptr @luma_mask_arr, align 8, !tbaa !5
%5 = tail call i32 @LD_SB3(ptr noundef %4, i32 noundef 16, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%6 = tail call i64 @__msa_fill_w(i32 noundef -327679) #2
%7 = tail call i64 @__msa_fill_w(i32 noundef 1310740) #2
%8 = tail call i64 @__msa_fill_w(i32 noundef 131067) #2
%9 = shl nsw i32 %2, 1
%10 = sub nuw nsw i32 -2, %9
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, ptr %1, i64 %11
%13 = tail call i32 @LD_SB5(ptr noundef %12, i32 noundef %2, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%14 = tail call i32 @XORI_B5_128_SB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%15 = mul nsw i32 %2, 5
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, ptr %12, i64 %16
%18 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%19 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%20 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%21 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%22 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%23 = tail call i32 @LD_SB4(ptr noundef %17, i32 noundef %2, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%24 = shl nsw i32 %2, 2
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, ptr %17, i64 %25
%27 = tail call i32 @XORI_B4_128_SB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%28 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%29 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%30 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%31 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%32 = tail call i32 @ILVR_H4_SH(i64 noundef %19, i64 noundef %18, i64 noundef %20, i64 noundef %19, i64 noundef %21, i64 noundef %20, i64 noundef %22, i64 noundef %21, i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2
%33 = tail call i32 @ILVL_H4_SH(i64 noundef %19, i64 noundef %18, i64 noundef %20, i64 noundef %19, i64 noundef %21, i64 noundef %20, i64 noundef %22, i64 noundef %21, i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2
%34 = tail call i32 @ILVR_H4_SH(i64 noundef %28, i64 noundef %22, i64 noundef %29, i64 noundef %28, i64 noundef %30, i64 noundef %29, i64 noundef %31, i64 noundef %30, i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2
%35 = tail call i32 @ILVL_H4_SH(i64 noundef %28, i64 noundef %22, i64 noundef %29, i64 noundef %28, i64 noundef %30, i64 noundef %29, i64 noundef %31, i64 noundef %30, i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2
%36 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%37 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%38 = tail call i64 @__msa_pckev_h(i64 noundef %37, i64 noundef %36) #2
%39 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%40 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%41 = tail call i64 @__msa_pckev_h(i64 noundef %40, i64 noundef %39) #2
%42 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%43 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%44 = tail call i64 @__msa_pckev_h(i64 noundef %43, i64 noundef %42) #2
%45 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%46 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%47 = tail call i64 @__msa_pckev_h(i64 noundef %46, i64 noundef %45) #2
%48 = tail call i32 @SRARI_H4_SH(i64 noundef %21, i64 noundef %22, i64 noundef %28, i64 noundef %29, i32 noundef 5) #2
%49 = tail call i32 @SAT_SH4_SH(i64 noundef %21, i64 noundef %22, i64 noundef %28, i64 noundef %29, i32 noundef 7) #2
%50 = tail call i64 @__msa_aver_s_h(i64 noundef %38, i64 noundef %21) #2
%51 = tail call i64 @__msa_aver_s_h(i64 noundef %41, i64 noundef %22) #2
%52 = tail call i64 @__msa_aver_s_h(i64 noundef %44, i64 noundef %28) #2
%53 = tail call i64 @__msa_aver_s_h(i64 noundef %47, i64 noundef %29) #2
%54 = tail call i32 @PCKEV_XORI128_UB(i64 noundef %50, i64 noundef %51) #2
%55 = tail call i32 @PCKEV_XORI128_UB(i64 noundef %52, i64 noundef %53) #2
%56 = tail call i32 @ST_D4(i32 noundef %54, i32 noundef %55, i32 noundef 0, i32 noundef 1, i32 noundef 0, i32 noundef 1, ptr noundef %0, i32 noundef %2) #2
%57 = getelementptr inbounds i32, ptr %0, i64 %25
%58 = tail call i32 @LD_SB4(ptr noundef %26, i32 noundef %2, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%59 = tail call i32 @XORI_B4_128_SB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%60 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%61 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%62 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%63 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%64 = tail call i32 @ILVR_H4_SH(i64 noundef %60, i64 noundef %31, i64 noundef %61, i64 noundef %60, i64 noundef %62, i64 noundef %61, i64 noundef %63, i64 noundef %62, i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2
%65 = tail call i32 @ILVL_H4_SH(i64 noundef %60, i64 noundef %31, i64 noundef %61, i64 noundef %60, i64 noundef %62, i64 noundef %61, i64 noundef %63, i64 noundef %62, i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2
%66 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%67 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%68 = tail call i64 @__msa_pckev_h(i64 noundef %67, i64 noundef %66) #2
%69 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%70 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%71 = tail call i64 @__msa_pckev_h(i64 noundef %70, i64 noundef %69) #2
%72 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%73 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%74 = tail call i64 @__msa_pckev_h(i64 noundef %73, i64 noundef %72) #2
%75 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%76 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%77 = tail call i64 @__msa_pckev_h(i64 noundef %76, i64 noundef %75) #2
%78 = tail call i32 @SRARI_H4_SH(i64 noundef %30, i64 noundef %31, i64 noundef %60, i64 noundef %61, i32 noundef 5) #2
%79 = tail call i32 @SAT_SH4_SH(i64 noundef %30, i64 noundef %31, i64 noundef %60, i64 noundef %61, i32 noundef 7) #2
%80 = tail call i64 @__msa_aver_s_h(i64 noundef %68, i64 noundef %30) #2
%81 = tail call i64 @__msa_aver_s_h(i64 noundef %71, i64 noundef %31) #2
%82 = tail call i64 @__msa_aver_s_h(i64 noundef %74, i64 noundef %60) #2
%83 = tail call i64 @__msa_aver_s_h(i64 noundef %77, i64 noundef %61) #2
%84 = tail call i32 @PCKEV_XORI128_UB(i64 noundef %80, i64 noundef %81) #2
%85 = tail call i32 @PCKEV_XORI128_UB(i64 noundef %82, i64 noundef %83) #2
%86 = tail call i32 @ST_D4(i32 noundef %84, i32 noundef %85, i32 noundef 0, i32 noundef 1, i32 noundef 0, i32 noundef 1, ptr noundef %57, i32 noundef %2) #2
ret void
}
declare i32 @LD_SB3(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @__msa_fill_w(i32 noundef) local_unnamed_addr #1
declare i32 @LD_SB5(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @XORI_B5_128_SB(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @AVC_HORZ_FILTER_SH(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LD_SB4(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @XORI_B4_128_SB(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ILVR_H4_SH(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ILVL_H4_SH(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i64 @AVC_DOT_SW3_SW(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i64 @__msa_pckev_h(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @SRARI_H4_SH(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SAT_SH4_SH(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @__msa_aver_s_h(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @PCKEV_XORI128_UB(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ST_D4(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/FFmpeg/libavcodec/mips/extr_h264qpel_msa.c_ff_put_h264_qpel8_mc23_msa.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/mips/extr_h264qpel_msa.c_ff_put_h264_qpel8_mc23_msa.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@luma_mask_arr = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @ff_put_h264_qpel8_mc23_msa(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load ptr, ptr @luma_mask_arr, align 8, !tbaa !6
%5 = tail call i32 @LD_SB3(ptr noundef %4, i32 noundef 16, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%6 = tail call i64 @__msa_fill_w(i32 noundef -327679) #2
%7 = tail call i64 @__msa_fill_w(i32 noundef 1310740) #2
%8 = tail call i64 @__msa_fill_w(i32 noundef 131067) #2
%9 = shl nsw i32 %2, 1
%10 = sub nuw nsw i32 -2, %9
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, ptr %1, i64 %11
%13 = tail call i32 @LD_SB5(ptr noundef %12, i32 noundef %2, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%14 = tail call i32 @XORI_B5_128_SB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%15 = mul nsw i32 %2, 5
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, ptr %12, i64 %16
%18 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%19 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%20 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%21 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%22 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%23 = tail call i32 @LD_SB4(ptr noundef %17, i32 noundef %2, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%24 = shl nsw i32 %2, 2
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, ptr %17, i64 %25
%27 = tail call i32 @XORI_B4_128_SB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%28 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%29 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%30 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%31 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%32 = tail call i32 @ILVR_H4_SH(i64 noundef %19, i64 noundef %18, i64 noundef %20, i64 noundef %19, i64 noundef %21, i64 noundef %20, i64 noundef %22, i64 noundef %21, i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2
%33 = tail call i32 @ILVL_H4_SH(i64 noundef %19, i64 noundef %18, i64 noundef %20, i64 noundef %19, i64 noundef %21, i64 noundef %20, i64 noundef %22, i64 noundef %21, i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2
%34 = tail call i32 @ILVR_H4_SH(i64 noundef %28, i64 noundef %22, i64 noundef %29, i64 noundef %28, i64 noundef %30, i64 noundef %29, i64 noundef %31, i64 noundef %30, i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2
%35 = tail call i32 @ILVL_H4_SH(i64 noundef %28, i64 noundef %22, i64 noundef %29, i64 noundef %28, i64 noundef %30, i64 noundef %29, i64 noundef %31, i64 noundef %30, i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2
%36 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%37 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%38 = tail call i64 @__msa_pckev_h(i64 noundef %37, i64 noundef %36) #2
%39 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%40 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%41 = tail call i64 @__msa_pckev_h(i64 noundef %40, i64 noundef %39) #2
%42 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%43 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%44 = tail call i64 @__msa_pckev_h(i64 noundef %43, i64 noundef %42) #2
%45 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%46 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%47 = tail call i64 @__msa_pckev_h(i64 noundef %46, i64 noundef %45) #2
%48 = tail call i32 @SRARI_H4_SH(i64 noundef %21, i64 noundef %22, i64 noundef %28, i64 noundef %29, i32 noundef 5) #2
%49 = tail call i32 @SAT_SH4_SH(i64 noundef %21, i64 noundef %22, i64 noundef %28, i64 noundef %29, i32 noundef 7) #2
%50 = tail call i64 @__msa_aver_s_h(i64 noundef %38, i64 noundef %21) #2
%51 = tail call i64 @__msa_aver_s_h(i64 noundef %41, i64 noundef %22) #2
%52 = tail call i64 @__msa_aver_s_h(i64 noundef %44, i64 noundef %28) #2
%53 = tail call i64 @__msa_aver_s_h(i64 noundef %47, i64 noundef %29) #2
%54 = tail call i32 @PCKEV_XORI128_UB(i64 noundef %50, i64 noundef %51) #2
%55 = tail call i32 @PCKEV_XORI128_UB(i64 noundef %52, i64 noundef %53) #2
%56 = tail call i32 @ST_D4(i32 noundef %54, i32 noundef %55, i32 noundef 0, i32 noundef 1, i32 noundef 0, i32 noundef 1, ptr noundef %0, i32 noundef %2) #2
%57 = getelementptr inbounds i32, ptr %0, i64 %25
%58 = tail call i32 @LD_SB4(ptr noundef %26, i32 noundef %2, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%59 = tail call i32 @XORI_B4_128_SB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%60 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%61 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%62 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%63 = tail call i64 @AVC_HORZ_FILTER_SH(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%64 = tail call i32 @ILVR_H4_SH(i64 noundef %60, i64 noundef %31, i64 noundef %61, i64 noundef %60, i64 noundef %62, i64 noundef %61, i64 noundef %63, i64 noundef %62, i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2
%65 = tail call i32 @ILVL_H4_SH(i64 noundef %60, i64 noundef %31, i64 noundef %61, i64 noundef %60, i64 noundef %62, i64 noundef %61, i64 noundef %63, i64 noundef %62, i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2
%66 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%67 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%68 = tail call i64 @__msa_pckev_h(i64 noundef %67, i64 noundef %66) #2
%69 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%70 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%71 = tail call i64 @__msa_pckev_h(i64 noundef %70, i64 noundef %69) #2
%72 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%73 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%74 = tail call i64 @__msa_pckev_h(i64 noundef %73, i64 noundef %72) #2
%75 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%76 = tail call i64 @AVC_DOT_SW3_SW(i64 noundef undef, i64 noundef undef, i64 noundef undef, i64 noundef %6, i64 noundef %7, i64 noundef %8) #2
%77 = tail call i64 @__msa_pckev_h(i64 noundef %76, i64 noundef %75) #2
%78 = tail call i32 @SRARI_H4_SH(i64 noundef %30, i64 noundef %31, i64 noundef %60, i64 noundef %61, i32 noundef 5) #2
%79 = tail call i32 @SAT_SH4_SH(i64 noundef %30, i64 noundef %31, i64 noundef %60, i64 noundef %61, i32 noundef 7) #2
%80 = tail call i64 @__msa_aver_s_h(i64 noundef %68, i64 noundef %30) #2
%81 = tail call i64 @__msa_aver_s_h(i64 noundef %71, i64 noundef %31) #2
%82 = tail call i64 @__msa_aver_s_h(i64 noundef %74, i64 noundef %60) #2
%83 = tail call i64 @__msa_aver_s_h(i64 noundef %77, i64 noundef %61) #2
%84 = tail call i32 @PCKEV_XORI128_UB(i64 noundef %80, i64 noundef %81) #2
%85 = tail call i32 @PCKEV_XORI128_UB(i64 noundef %82, i64 noundef %83) #2
%86 = tail call i32 @ST_D4(i32 noundef %84, i32 noundef %85, i32 noundef 0, i32 noundef 1, i32 noundef 0, i32 noundef 1, ptr noundef %57, i32 noundef %2) #2
ret void
}
declare i32 @LD_SB3(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @__msa_fill_w(i32 noundef) local_unnamed_addr #1
declare i32 @LD_SB5(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @XORI_B5_128_SB(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @AVC_HORZ_FILTER_SH(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LD_SB4(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @XORI_B4_128_SB(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ILVR_H4_SH(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ILVL_H4_SH(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i64 @AVC_DOT_SW3_SW(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i64 @__msa_pckev_h(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @SRARI_H4_SH(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SAT_SH4_SH(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @__msa_aver_s_h(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @PCKEV_XORI128_UB(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ST_D4(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| FFmpeg_libavcodec_mips_extr_h264qpel_msa.c_ff_put_h264_qpel8_mc23_msa |
; ModuleID = 'AnghaBench/jerryscript/targets/riot-stm32f4/source/extr_main-riotos.c_main.c'
source_filename = "AnghaBench/jerryscript/targets/riot-stm32f4/source/extr_main-riotos.c_main.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [40 x i8] c"You are running RIOT on a(n) %s board.\0A\00", align 1
@RIOT_BOARD = dso_local local_unnamed_addr global ptr null, align 8
@.str.1 = private unnamed_addr constant [34 x i8] c"This board features a(n) %s MCU.\0A\00", align 1
@RIOT_MCU = dso_local local_unnamed_addr global ptr null, align 8
@SHELL_DEFAULT_BUFSIZE = dso_local local_unnamed_addr global i32 0, align 4
@shell_commands = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
%1 = tail call i64 (...) @jerry_port_get_current_time() #2
%2 = trunc i64 %1 to i32
%3 = tail call i32 @srand(i32 noundef %2) #2
%4 = load ptr, ptr @RIOT_BOARD, align 8, !tbaa !5
%5 = tail call i32 @printf(ptr noundef nonnull @.str, ptr noundef %4) #2
%6 = load ptr, ptr @RIOT_MCU, align 8, !tbaa !5
%7 = tail call i32 @printf(ptr noundef nonnull @.str.1, ptr noundef %6) #2
%8 = load i32, ptr @SHELL_DEFAULT_BUFSIZE, align 4, !tbaa !9
%9 = zext i32 %8 to i64
%10 = alloca i8, i64 %9, align 16
%11 = load i32, ptr @shell_commands, align 4, !tbaa !9
%12 = call i32 @shell_run(i32 noundef %11, ptr noundef nonnull %10, i32 noundef %8) #2
ret i32 0
}
declare i32 @srand(i32 noundef) local_unnamed_addr #1
declare i64 @jerry_port_get_current_time(...) local_unnamed_addr #1
declare i32 @printf(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @shell_run(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/jerryscript/targets/riot-stm32f4/source/extr_main-riotos.c_main.c'
source_filename = "AnghaBench/jerryscript/targets/riot-stm32f4/source/extr_main-riotos.c_main.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [40 x i8] c"You are running RIOT on a(n) %s board.\0A\00", align 1
@RIOT_BOARD = common local_unnamed_addr global ptr null, align 8
@.str.1 = private unnamed_addr constant [34 x i8] c"This board features a(n) %s MCU.\0A\00", align 1
@RIOT_MCU = common local_unnamed_addr global ptr null, align 8
@SHELL_DEFAULT_BUFSIZE = common local_unnamed_addr global i32 0, align 4
@shell_commands = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @main() local_unnamed_addr #0 {
%1 = tail call i64 @jerry_port_get_current_time() #2
%2 = trunc i64 %1 to i32
%3 = tail call i32 @srand(i32 noundef %2) #2
%4 = load ptr, ptr @RIOT_BOARD, align 8, !tbaa !6
%5 = tail call i32 @printf(ptr noundef nonnull @.str, ptr noundef %4) #2
%6 = load ptr, ptr @RIOT_MCU, align 8, !tbaa !6
%7 = tail call i32 @printf(ptr noundef nonnull @.str.1, ptr noundef %6) #2
%8 = load i32, ptr @SHELL_DEFAULT_BUFSIZE, align 4, !tbaa !10
%9 = zext i32 %8 to i64
%10 = alloca i8, i64 %9, align 1
%11 = load i32, ptr @shell_commands, align 4, !tbaa !10
%12 = call i32 @shell_run(i32 noundef %11, ptr noundef nonnull %10, i32 noundef %8) #2
ret i32 0
}
declare i32 @srand(i32 noundef) local_unnamed_addr #1
declare i64 @jerry_port_get_current_time(...) local_unnamed_addr #1
declare i32 @printf(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @shell_run(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| jerryscript_targets_riot-stm32f4_source_extr_main-riotos.c_main |
; ModuleID = 'AnghaBench/linux/mm/extr_oom_kill.c_oom_kill_memcg_member.c'
source_filename = "AnghaBench/linux/mm/extr_oom_kill.c_oom_kill_memcg_member.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@OOM_SCORE_ADJ_MIN = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @oom_kill_memcg_member], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @oom_kill_memcg_member(ptr noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = load i64, ptr %3, align 8, !tbaa !10
%5 = load i64, ptr @OOM_SCORE_ADJ_MIN, align 8, !tbaa !13
%6 = icmp eq i64 %4, %5
br i1 %6, label %13, label %7
7: ; preds = %2
%8 = tail call i32 @is_global_init(ptr noundef nonnull %0) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = tail call i32 @get_task_struct(ptr noundef nonnull %0) #2
%12 = tail call i32 @__oom_kill_process(ptr noundef nonnull %0, ptr noundef %1) #2
br label %13
13: ; preds = %10, %7, %2
ret i32 0
}
declare i32 @is_global_init(ptr noundef) local_unnamed_addr #1
declare i32 @get_task_struct(ptr noundef) local_unnamed_addr #1
declare i32 @__oom_kill_process(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"task_struct", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!12, !12, i64 0}
| ; ModuleID = 'AnghaBench/linux/mm/extr_oom_kill.c_oom_kill_memcg_member.c'
source_filename = "AnghaBench/linux/mm/extr_oom_kill.c_oom_kill_memcg_member.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@OOM_SCORE_ADJ_MIN = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @oom_kill_memcg_member], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @oom_kill_memcg_member(ptr noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load i64, ptr %3, align 8, !tbaa !11
%5 = load i64, ptr @OOM_SCORE_ADJ_MIN, align 8, !tbaa !14
%6 = icmp eq i64 %4, %5
br i1 %6, label %13, label %7
7: ; preds = %2
%8 = tail call i32 @is_global_init(ptr noundef nonnull %0) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = tail call i32 @get_task_struct(ptr noundef nonnull %0) #2
%12 = tail call i32 @__oom_kill_process(ptr noundef nonnull %0, ptr noundef %1) #2
br label %13
13: ; preds = %10, %7, %2
ret i32 0
}
declare i32 @is_global_init(ptr noundef) local_unnamed_addr #1
declare i32 @get_task_struct(ptr noundef) local_unnamed_addr #1
declare i32 @__oom_kill_process(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"task_struct", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"long", !9, i64 0}
!14 = !{!13, !13, i64 0}
| linux_mm_extr_oom_kill.c_oom_kill_memcg_member |
; ModuleID = 'AnghaBench/darwin-xnu/bsd/pthread/extr_pthread_shims.c_psynch_rw_unlock.c'
source_filename = "AnghaBench/darwin-xnu/bsd/pthread/extr_pthread_shims.c_psynch_rw_unlock.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.psynch_rw_unlock_args = type { i32, i32, i32, i32, i32 }
@pthread_functions = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @psynch_rw_unlock(i32 noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = load ptr, ptr @pthread_functions, align 8, !tbaa !5
%5 = load ptr, ptr %4, align 8, !tbaa !9
%6 = getelementptr inbounds %struct.psynch_rw_unlock_args, ptr %1, i64 0, i32 4
%7 = load i32, ptr %6, align 4, !tbaa !11
%8 = getelementptr inbounds %struct.psynch_rw_unlock_args, ptr %1, i64 0, i32 3
%9 = load i32, ptr %8, align 4, !tbaa !14
%10 = getelementptr inbounds %struct.psynch_rw_unlock_args, ptr %1, i64 0, i32 2
%11 = load i32, ptr %10, align 4, !tbaa !15
%12 = getelementptr inbounds %struct.psynch_rw_unlock_args, ptr %1, i64 0, i32 1
%13 = load i32, ptr %12, align 4, !tbaa !16
%14 = load i32, ptr %1, align 4, !tbaa !17
%15 = tail call i32 %5(i32 noundef %0, i32 noundef %7, i32 noundef %9, i32 noundef %11, i32 noundef %13, i32 noundef %14, ptr noundef %2) #1
ret i32 %15
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_2__", !6, i64 0}
!11 = !{!12, !13, i64 16}
!12 = !{!"psynch_rw_unlock_args", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !13, i64 16}
!13 = !{!"int", !7, i64 0}
!14 = !{!12, !13, i64 12}
!15 = !{!12, !13, i64 8}
!16 = !{!12, !13, i64 4}
!17 = !{!12, !13, i64 0}
| ; ModuleID = 'AnghaBench/darwin-xnu/bsd/pthread/extr_pthread_shims.c_psynch_rw_unlock.c'
source_filename = "AnghaBench/darwin-xnu/bsd/pthread/extr_pthread_shims.c_psynch_rw_unlock.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@pthread_functions = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @psynch_rw_unlock(i32 noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = load ptr, ptr @pthread_functions, align 8, !tbaa !6
%5 = load ptr, ptr %4, align 8, !tbaa !10
%6 = getelementptr inbounds i8, ptr %1, i64 16
%7 = load i32, ptr %6, align 4, !tbaa !12
%8 = getelementptr inbounds i8, ptr %1, i64 12
%9 = load i32, ptr %8, align 4, !tbaa !15
%10 = getelementptr inbounds i8, ptr %1, i64 8
%11 = load i32, ptr %10, align 4, !tbaa !16
%12 = getelementptr inbounds i8, ptr %1, i64 4
%13 = load i32, ptr %12, align 4, !tbaa !17
%14 = load i32, ptr %1, align 4, !tbaa !18
%15 = tail call i32 %5(i32 noundef %0, i32 noundef %7, i32 noundef %9, i32 noundef %11, i32 noundef %13, i32 noundef %14, ptr noundef %2) #1
ret i32 %15
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
!12 = !{!13, !14, i64 16}
!13 = !{!"psynch_rw_unlock_args", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16}
!14 = !{!"int", !8, i64 0}
!15 = !{!13, !14, i64 12}
!16 = !{!13, !14, i64 8}
!17 = !{!13, !14, i64 4}
!18 = !{!13, !14, i64 0}
| darwin-xnu_bsd_pthread_extr_pthread_shims.c_psynch_rw_unlock |
; ModuleID = 'AnghaBench/openssl/ssl/extr_t1_enc.c_count_unprocessed_records.c'
source_filename = "AnghaBench/openssl/ssl/extr_t1_enc.c_count_unprocessed_records.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, i64, i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @count_unprocessed_records], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @count_unprocessed_records(ptr noundef %0) #0 {
%2 = alloca i32, align 4
%3 = alloca i32, align 4
%4 = tail call ptr @RECORD_LAYER_get_rbuf(ptr noundef %0) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%5 = getelementptr inbounds %struct.TYPE_5__, ptr %4, i64 0, i32 2
%6 = load i64, ptr %5, align 8, !tbaa !5
%7 = getelementptr inbounds %struct.TYPE_5__, ptr %4, i64 0, i32 1
%8 = load i64, ptr %7, align 8, !tbaa !11
%9 = add nsw i64 %8, %6
%10 = load i32, ptr %4, align 8, !tbaa !12
%11 = call i32 @PACKET_buf_init(ptr noundef nonnull %2, i64 noundef %9, i32 noundef %10) #3
%12 = icmp eq i32 %11, 0
br i1 %12, label %27, label %13
13: ; preds = %1
%14 = call i64 @PACKET_remaining(ptr noundef nonnull %2) #3
%15 = icmp sgt i64 %14, 0
br i1 %15, label %16, label %27
16: ; preds = %13, %23
%17 = phi i32 [ %24, %23 ], [ 0, %13 ]
%18 = call i32 @PACKET_forward(ptr noundef nonnull %2, i32 noundef 3) #3
%19 = icmp eq i32 %18, 0
br i1 %19, label %27, label %20
20: ; preds = %16
%21 = call i64 @PACKET_get_length_prefixed_2(ptr noundef nonnull %2, ptr noundef nonnull %3) #3
%22 = icmp eq i64 %21, 0
br i1 %22, label %23, label %27
23: ; preds = %20
%24 = add nuw nsw i32 %17, 1
%25 = call i64 @PACKET_remaining(ptr noundef nonnull %2) #3
%26 = icmp sgt i64 %25, 0
br i1 %26, label %16, label %27, !llvm.loop !13
27: ; preds = %16, %20, %23, %13, %1
%28 = phi i32 [ -1, %1 ], [ 0, %13 ], [ -1, %16 ], [ -1, %20 ], [ %24, %23 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %28
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @RECORD_LAYER_get_rbuf(ptr noundef) local_unnamed_addr #2
declare i32 @PACKET_buf_init(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @PACKET_remaining(ptr noundef) local_unnamed_addr #2
declare i32 @PACKET_forward(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @PACKET_get_length_prefixed_2(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"TYPE_5__", !7, i64 0, !10, i64 8, !10, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!6, !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/openssl/ssl/extr_t1_enc.c_count_unprocessed_records.c'
source_filename = "AnghaBench/openssl/ssl/extr_t1_enc.c_count_unprocessed_records.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @count_unprocessed_records], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @count_unprocessed_records(ptr noundef %0) #0 {
%2 = alloca i32, align 4
%3 = alloca i32, align 4
%4 = tail call ptr @RECORD_LAYER_get_rbuf(ptr noundef %0) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%5 = getelementptr inbounds i8, ptr %4, i64 16
%6 = load i64, ptr %5, align 8, !tbaa !6
%7 = getelementptr inbounds i8, ptr %4, i64 8
%8 = load i64, ptr %7, align 8, !tbaa !12
%9 = add nsw i64 %8, %6
%10 = load i32, ptr %4, align 8, !tbaa !13
%11 = call i32 @PACKET_buf_init(ptr noundef nonnull %2, i64 noundef %9, i32 noundef %10) #3
%12 = icmp eq i32 %11, 0
br i1 %12, label %27, label %13
13: ; preds = %1
%14 = call i64 @PACKET_remaining(ptr noundef nonnull %2) #3
%15 = icmp sgt i64 %14, 0
br i1 %15, label %16, label %27
16: ; preds = %13, %23
%17 = phi i32 [ %24, %23 ], [ 0, %13 ]
%18 = call i32 @PACKET_forward(ptr noundef nonnull %2, i32 noundef 3) #3
%19 = icmp eq i32 %18, 0
br i1 %19, label %27, label %20
20: ; preds = %16
%21 = call i64 @PACKET_get_length_prefixed_2(ptr noundef nonnull %2, ptr noundef nonnull %3) #3
%22 = icmp eq i64 %21, 0
br i1 %22, label %23, label %27
23: ; preds = %20
%24 = add nuw nsw i32 %17, 1
%25 = call i64 @PACKET_remaining(ptr noundef nonnull %2) #3
%26 = icmp sgt i64 %25, 0
br i1 %26, label %16, label %27, !llvm.loop !14
27: ; preds = %16, %20, %23, %13, %1
%28 = phi i32 [ -1, %1 ], [ 0, %13 ], [ -1, %16 ], [ -1, %20 ], [ %24, %23 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %28
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @RECORD_LAYER_get_rbuf(ptr noundef) local_unnamed_addr #2
declare i32 @PACKET_buf_init(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @PACKET_remaining(ptr noundef) local_unnamed_addr #2
declare i32 @PACKET_forward(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @PACKET_get_length_prefixed_2(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"TYPE_5__", !8, i64 0, !11, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!7, !8, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
| openssl_ssl_extr_t1_enc.c_count_unprocessed_records |
; ModuleID = 'AnghaBench/Provenance/Cores/PicoDrive/pico/cd/extr_memory.c_PicoWrite16_mcd_io.c'
source_filename = "AnghaBench/Provenance/Cores/PicoDrive/pico/cd/extr_memory.c_PicoWrite16_mcd_io.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EL_CDREGS = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [33 x i8] c"m68k_regs w16: [%02x] %04x @%06x\00", align 1
@SekPc = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @PicoWrite16_mcd_io(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = and i32 %0, 65280
%4 = icmp eq i32 %3, 8192
br i1 %4, label %5, label %18
5: ; preds = %2
%6 = load i32, ptr @EL_CDREGS, align 4, !tbaa !5
%7 = and i32 %0, 63
%8 = load i32, ptr @SekPc, align 4, !tbaa !5
%9 = tail call i32 @elprintf(i32 noundef %6, ptr noundef nonnull @.str, i32 noundef %7, i32 noundef %1, i32 noundef %8) #2
%10 = ashr i32 %1, 8
%11 = tail call i32 @m68k_reg_write8(i32 noundef %0, i32 noundef %10) #2
%12 = and i32 %0, 62
%13 = icmp eq i32 %12, 14
br i1 %13, label %20, label %14
14: ; preds = %5
%15 = add nuw nsw i32 %0, 1
%16 = and i32 %1, 255
%17 = tail call i32 @m68k_reg_write8(i32 noundef %15, i32 noundef %16) #2
br label %20
18: ; preds = %2
%19 = tail call i32 @PicoWrite16_io(i32 noundef %0, i32 noundef %1) #2
br label %20
20: ; preds = %5, %14, %18
ret void
}
declare i32 @elprintf(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @m68k_reg_write8(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PicoWrite16_io(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/Provenance/Cores/PicoDrive/pico/cd/extr_memory.c_PicoWrite16_mcd_io.c'
source_filename = "AnghaBench/Provenance/Cores/PicoDrive/pico/cd/extr_memory.c_PicoWrite16_mcd_io.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EL_CDREGS = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [33 x i8] c"m68k_regs w16: [%02x] %04x @%06x\00", align 1
@SekPc = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @PicoWrite16_mcd_io(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = and i32 %0, 65280
%4 = icmp eq i32 %3, 8192
br i1 %4, label %5, label %18
5: ; preds = %2
%6 = load i32, ptr @EL_CDREGS, align 4, !tbaa !6
%7 = and i32 %0, 63
%8 = load i32, ptr @SekPc, align 4, !tbaa !6
%9 = tail call i32 @elprintf(i32 noundef %6, ptr noundef nonnull @.str, i32 noundef %7, i32 noundef %1, i32 noundef %8) #2
%10 = ashr i32 %1, 8
%11 = tail call i32 @m68k_reg_write8(i32 noundef %0, i32 noundef %10) #2
%12 = and i32 %0, 62
%13 = icmp eq i32 %12, 14
br i1 %13, label %20, label %14
14: ; preds = %5
%15 = add nuw nsw i32 %0, 1
%16 = and i32 %1, 255
%17 = tail call i32 @m68k_reg_write8(i32 noundef %15, i32 noundef %16) #2
br label %20
18: ; preds = %2
%19 = tail call i32 @PicoWrite16_io(i32 noundef %0, i32 noundef %1) #2
br label %20
20: ; preds = %5, %14, %18
ret void
}
declare i32 @elprintf(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @m68k_reg_write8(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PicoWrite16_io(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| Provenance_Cores_PicoDrive_pico_cd_extr_memory.c_PicoWrite16_mcd_io |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/usb/core/extr_urb.c___usb_unanchor_urb.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/usb/core/extr_urb.c___usb_unanchor_urb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.urb = type { i32, ptr }
%struct.usb_anchor = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @__usb_unanchor_urb], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @__usb_unanchor_urb(ptr noundef %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds %struct.urb, ptr %0, i64 0, i32 1
store ptr null, ptr %3, align 8, !tbaa !5
%4 = tail call i32 @list_del(ptr noundef %0) #2
%5 = tail call i32 @usb_put_urb(ptr noundef %0) #2
%6 = getelementptr inbounds %struct.usb_anchor, ptr %1, i64 0, i32 1
%7 = tail call i64 @list_empty(ptr noundef nonnull %6) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %2
%10 = tail call i32 @wake_up(ptr noundef %1) #2
br label %11
11: ; preds = %9, %2
ret void
}
declare i32 @list_del(ptr noundef) local_unnamed_addr #1
declare i32 @usb_put_urb(ptr noundef) local_unnamed_addr #1
declare i64 @list_empty(ptr noundef) local_unnamed_addr #1
declare i32 @wake_up(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"urb", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/usb/core/extr_urb.c___usb_unanchor_urb.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/usb/core/extr_urb.c___usb_unanchor_urb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @__usb_unanchor_urb], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @__usb_unanchor_urb(ptr noundef %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
store ptr null, ptr %3, align 8, !tbaa !6
%4 = tail call i32 @list_del(ptr noundef %0) #2
%5 = tail call i32 @usb_put_urb(ptr noundef %0) #2
%6 = getelementptr inbounds i8, ptr %1, i64 4
%7 = tail call i64 @list_empty(ptr noundef nonnull %6) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %2
%10 = tail call i32 @wake_up(ptr noundef %1) #2
br label %11
11: ; preds = %9, %2
ret void
}
declare i32 @list_del(ptr noundef) local_unnamed_addr #1
declare i32 @usb_put_urb(ptr noundef) local_unnamed_addr #1
declare i64 @list_empty(ptr noundef) local_unnamed_addr #1
declare i32 @wake_up(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"urb", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
| fastsocket_kernel_drivers_usb_core_extr_urb.c___usb_unanchor_urb |
; ModuleID = 'AnghaBench/radare2/libr/core/extr_agraph.c_bbcmp.c'
source_filename = "AnghaBench/radare2/libr/core/extr_agraph.c_bbcmp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @bbcmp], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define internal i32 @bbcmp(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = load i32, ptr %1, align 4, !tbaa !5
%5 = sub nsw i32 %3, %4
ret i32 %5
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/radare2/libr/core/extr_agraph.c_bbcmp.c'
source_filename = "AnghaBench/radare2/libr/core/extr_agraph.c_bbcmp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @bbcmp], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal i32 @bbcmp(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = load i32, ptr %1, align 4, !tbaa !6
%5 = sub nsw i32 %3, %4
ret i32 %5
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| radare2_libr_core_extr_agraph.c_bbcmp |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/extr_port.c_mlx5_set_ports_check.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/extr_port.c_mlx5_set_ports_check.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@pcmr_reg = dso_local local_unnamed_addr global i32 0, align 4
@MLX5_REG_PCMR = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @mlx5_set_ports_check(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @pcmr_reg, align 4, !tbaa !5
%5 = tail call i32 @MLX5_ST_SZ_DW(i32 noundef %4) #2
%6 = zext i32 %5 to i64
%7 = alloca i32, i64 %6, align 16
%8 = shl i32 %5, 2
%9 = load i32, ptr @MLX5_REG_PCMR, align 4, !tbaa !5
%10 = call i32 @mlx5_core_access_reg(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef nonnull %7, i32 noundef %8, i32 noundef %9, i32 noundef 0, i32 noundef 1) #2
ret i32 %10
}
declare i32 @MLX5_ST_SZ_DW(i32 noundef) local_unnamed_addr #1
declare i32 @mlx5_core_access_reg(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/extr_port.c_mlx5_set_ports_check.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/extr_port.c_mlx5_set_ports_check.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@pcmr_reg = common local_unnamed_addr global i32 0, align 4
@MLX5_REG_PCMR = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @mlx5_set_ports_check(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @pcmr_reg, align 4, !tbaa !6
%5 = tail call i32 @MLX5_ST_SZ_DW(i32 noundef %4) #2
%6 = zext i32 %5 to i64
%7 = alloca i32, i64 %6, align 4
%8 = shl i32 %5, 2
%9 = load i32, ptr @MLX5_REG_PCMR, align 4, !tbaa !6
%10 = call i32 @mlx5_core_access_reg(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef nonnull %7, i32 noundef %8, i32 noundef %9, i32 noundef 0, i32 noundef 1) #2
ret i32 %10
}
declare i32 @MLX5_ST_SZ_DW(i32 noundef) local_unnamed_addr #1
declare i32 @mlx5_core_access_reg(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_net_ethernet_mellanox_mlx5_core_extr_port.c_mlx5_set_ports_check |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/pci/extr_access.c_pcie_caps_reg.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/pci/extr_access.c_pcie_caps_reg.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define dso_local i32 @pcie_caps_reg(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = inttoptr i64 %2 to ptr
%4 = load i32, ptr %3, align 4, !tbaa !10
ret i32 %4
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"pci_dev", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"pci_dev_rh1", !12, i64 0}
!12 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/pci/extr_access.c_pcie_caps_reg.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/pci/extr_access.c_pcie_caps_reg.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define i32 @pcie_caps_reg(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = inttoptr i64 %2 to ptr
%4 = load i32, ptr %3, align 4, !tbaa !11
ret i32 %4
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"pci_dev", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"pci_dev_rh1", !13, i64 0}
!13 = !{!"int", !9, i64 0}
| fastsocket_kernel_drivers_pci_extr_access.c_pcie_caps_reg |
; ModuleID = 'AnghaBench/h2o/lib/handler/mruby/extr_middleware.c_subreq_ostream_send.c'
source_filename = "AnghaBench/h2o/lib/handler/mruby/extr_middleware.c_subreq_ostream_send.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.st_mruby_subreq_t = type { i32, i64, ptr, ptr, i32, %struct.TYPE_9__, i32 }
%struct.TYPE_9__ = type { ptr, ptr }
%struct.TYPE_12__ = type { i64, i32 }
@INITIAL = dso_local local_unnamed_addr global i64 0, align 8
@RECEIVED = dso_local local_unnamed_addr global i64 0, align 8
@FINAL_RECEIVED = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @subreq_ostream_send], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @subreq_ostream_send(ptr nocapture readnone %0, ptr noundef %1, ptr noundef %2, i64 noundef %3, i32 noundef %4) #0 {
%6 = getelementptr inbounds %struct.st_mruby_subreq_t, ptr %1, i64 0, i32 2
%7 = load ptr, ptr %6, align 8, !tbaa !5
%8 = load ptr, ptr %7, align 8, !tbaa !13
%9 = load ptr, ptr %8, align 8, !tbaa !15
%10 = getelementptr inbounds %struct.st_mruby_subreq_t, ptr %1, i64 0, i32 5
%11 = getelementptr inbounds %struct.st_mruby_subreq_t, ptr %1, i64 0, i32 5, i32 1
%12 = load ptr, ptr %11, align 8, !tbaa !17
%13 = icmp eq ptr %12, null
br i1 %13, label %26, label %14
14: ; preds = %5
%15 = load ptr, ptr %12, align 8, !tbaa !18
%16 = load i64, ptr %15, align 8, !tbaa !20
%17 = icmp eq i64 %16, 0
br i1 %17, label %18, label %82
18: ; preds = %14
store i32 1, ptr %1, align 8, !tbaa !22
%19 = getelementptr inbounds %struct.st_mruby_subreq_t, ptr %1, i64 0, i32 3
%20 = load ptr, ptr %19, align 8, !tbaa !23
%21 = icmp eq ptr %20, null
br i1 %21, label %22, label %24
22: ; preds = %18
%23 = tail call i32 @h2o_mruby_sender_do_send(ptr noundef nonnull %12, ptr noundef %2, i64 noundef %3, i32 noundef %4) #2
br label %82
24: ; preds = %18
%25 = tail call i32 @append_bufs(ptr noundef nonnull %1, ptr noundef %2, i64 noundef %3) #2
br label %82
26: ; preds = %5
%27 = getelementptr inbounds %struct.st_mruby_subreq_t, ptr %1, i64 0, i32 1
%28 = load i64, ptr %27, align 8, !tbaa !24
%29 = load i64, ptr @INITIAL, align 8, !tbaa !25
%30 = icmp eq i64 %28, %29
%31 = tail call i64 @h2o_send_state_is_in_progress(i32 noundef %4) #2
%32 = icmp eq i64 %31, 0
br i1 %32, label %36, label %33
33: ; preds = %26
%34 = getelementptr inbounds %struct.st_mruby_subreq_t, ptr %1, i64 0, i32 6
%35 = tail call i32 @h2o_proceed_response_deferred(ptr noundef nonnull %34) #2
br label %36
36: ; preds = %26, %33
%37 = phi ptr [ @RECEIVED, %33 ], [ @FINAL_RECEIVED, %26 ]
%38 = load i64, ptr %37, align 8, !tbaa !25
store i64 %38, ptr %27, align 8, !tbaa !24
%39 = tail call i32 @append_bufs(ptr noundef nonnull %1, ptr noundef %2, i64 noundef %3) #2
%40 = load ptr, ptr %10, align 8, !tbaa !26
%41 = icmp eq ptr %40, null
br i1 %41, label %44, label %42
42: ; preds = %36
%43 = tail call i32 @send_response_shortcutted(ptr noundef nonnull %1) #2
br label %82
44: ; preds = %36
%45 = getelementptr inbounds %struct.st_mruby_subreq_t, ptr %1, i64 0, i32 4
%46 = load i32, ptr %45, align 8, !tbaa !27
%47 = tail call i64 @mrb_nil_p(i32 noundef %46) #2
%48 = icmp eq i64 %47, 0
br i1 %48, label %49, label %82
49: ; preds = %44
%50 = tail call i32 @mrb_gc_arena_save(ptr noundef %9) #2
br i1 %30, label %51, label %56
51: ; preds = %49
%52 = load ptr, ptr %6, align 8, !tbaa !5
%53 = tail call i32 @detach_receiver(ptr noundef nonnull %1) #2
%54 = tail call i32 (...) @mrb_nil_value() #2
%55 = tail call i32 @h2o_mruby_run_fiber(ptr noundef %52, i32 noundef %53, i32 noundef %54, ptr noundef null) #2
br label %80
56: ; preds = %49
%57 = getelementptr inbounds %struct.st_mruby_subreq_t, ptr %1, i64 0, i32 3
%58 = load ptr, ptr %57, align 8, !tbaa !23
%59 = load i64, ptr %58, align 8, !tbaa !28
%60 = icmp eq i64 %59, 0
br i1 %60, label %71, label %61
61: ; preds = %56
%62 = getelementptr inbounds %struct.TYPE_12__, ptr %58, i64 0, i32 1
%63 = load i32, ptr %62, align 8, !tbaa !30
%64 = tail call i32 @h2o_mruby_new_str(ptr noundef %9, i32 noundef %63, i64 noundef %59) #2
%65 = load ptr, ptr %57, align 8, !tbaa !23
%66 = load i64, ptr %65, align 8, !tbaa !28
%67 = tail call i32 @h2o_buffer_consume(ptr noundef nonnull %57, i64 noundef %66) #2
%68 = load ptr, ptr %6, align 8, !tbaa !5
%69 = tail call i32 @detach_receiver(ptr noundef nonnull %1) #2
%70 = tail call i32 @h2o_mruby_run_fiber(ptr noundef %68, i32 noundef %69, i32 noundef %64, ptr noundef null) #2
br label %80
71: ; preds = %56
%72 = load i64, ptr %27, align 8, !tbaa !24
%73 = load i64, ptr @FINAL_RECEIVED, align 8, !tbaa !25
%74 = icmp eq i64 %72, %73
br i1 %74, label %75, label %80
75: ; preds = %71
%76 = load ptr, ptr %6, align 8, !tbaa !5
%77 = tail call i32 @detach_receiver(ptr noundef nonnull %1) #2
%78 = tail call i32 (...) @mrb_nil_value() #2
%79 = tail call i32 @h2o_mruby_run_fiber(ptr noundef %76, i32 noundef %77, i32 noundef %78, ptr noundef null) #2
br label %80
80: ; preds = %61, %75, %71, %51
%81 = tail call i32 @mrb_gc_arena_restore(ptr noundef %9, i32 noundef %50) #2
br label %82
82: ; preds = %42, %80, %44, %22, %24, %14
ret void
}
declare i32 @h2o_mruby_sender_do_send(ptr noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @append_bufs(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @h2o_send_state_is_in_progress(i32 noundef) local_unnamed_addr #1
declare i32 @h2o_proceed_response_deferred(ptr noundef) local_unnamed_addr #1
declare i32 @send_response_shortcutted(ptr noundef) local_unnamed_addr #1
declare i64 @mrb_nil_p(i32 noundef) local_unnamed_addr #1
declare i32 @mrb_gc_arena_save(ptr noundef) local_unnamed_addr #1
declare i32 @h2o_mruby_run_fiber(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @detach_receiver(ptr noundef) local_unnamed_addr #1
declare i32 @mrb_nil_value(...) local_unnamed_addr #1
declare i32 @h2o_mruby_new_str(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @h2o_buffer_consume(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @mrb_gc_arena_restore(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 16}
!6 = !{!"st_mruby_subreq_t", !7, i64 0, !10, i64 8, !11, i64 16, !11, i64 24, !7, i64 32, !12, i64 40, !7, i64 56}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!"TYPE_9__", !11, i64 0, !11, i64 8}
!13 = !{!14, !11, i64 0}
!14 = !{!"TYPE_11__", !11, i64 0}
!15 = !{!16, !11, i64 0}
!16 = !{!"TYPE_7__", !11, i64 0}
!17 = !{!6, !11, i64 48}
!18 = !{!19, !11, i64 0}
!19 = !{!"TYPE_10__", !11, i64 0}
!20 = !{!21, !10, i64 0}
!21 = !{!"TYPE_8__", !10, i64 0}
!22 = !{!6, !7, i64 0}
!23 = !{!6, !11, i64 24}
!24 = !{!6, !10, i64 8}
!25 = !{!10, !10, i64 0}
!26 = !{!6, !11, i64 40}
!27 = !{!6, !7, i64 32}
!28 = !{!29, !10, i64 0}
!29 = !{!"TYPE_12__", !10, i64 0, !7, i64 8}
!30 = !{!29, !7, i64 8}
| ; ModuleID = 'AnghaBench/h2o/lib/handler/mruby/extr_middleware.c_subreq_ostream_send.c'
source_filename = "AnghaBench/h2o/lib/handler/mruby/extr_middleware.c_subreq_ostream_send.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@INITIAL = common local_unnamed_addr global i64 0, align 8
@RECEIVED = common local_unnamed_addr global i64 0, align 8
@FINAL_RECEIVED = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @subreq_ostream_send], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @subreq_ostream_send(ptr nocapture readnone %0, ptr noundef %1, ptr noundef %2, i64 noundef %3, i32 noundef %4) #0 {
%6 = getelementptr inbounds i8, ptr %1, i64 16
%7 = load ptr, ptr %6, align 8, !tbaa !6
%8 = load ptr, ptr %7, align 8, !tbaa !14
%9 = load ptr, ptr %8, align 8, !tbaa !16
%10 = getelementptr inbounds i8, ptr %1, i64 40
%11 = getelementptr inbounds i8, ptr %1, i64 48
%12 = load ptr, ptr %11, align 8, !tbaa !18
%13 = icmp eq ptr %12, null
br i1 %13, label %26, label %14
14: ; preds = %5
%15 = load ptr, ptr %12, align 8, !tbaa !19
%16 = load i64, ptr %15, align 8, !tbaa !21
%17 = icmp eq i64 %16, 0
br i1 %17, label %18, label %82
18: ; preds = %14
store i32 1, ptr %1, align 8, !tbaa !23
%19 = getelementptr inbounds i8, ptr %1, i64 24
%20 = load ptr, ptr %19, align 8, !tbaa !24
%21 = icmp eq ptr %20, null
br i1 %21, label %22, label %24
22: ; preds = %18
%23 = tail call i32 @h2o_mruby_sender_do_send(ptr noundef nonnull %12, ptr noundef %2, i64 noundef %3, i32 noundef %4) #2
br label %82
24: ; preds = %18
%25 = tail call i32 @append_bufs(ptr noundef nonnull %1, ptr noundef %2, i64 noundef %3) #2
br label %82
26: ; preds = %5
%27 = getelementptr inbounds i8, ptr %1, i64 8
%28 = load i64, ptr %27, align 8, !tbaa !25
%29 = load i64, ptr @INITIAL, align 8, !tbaa !26
%30 = icmp eq i64 %28, %29
%31 = tail call i64 @h2o_send_state_is_in_progress(i32 noundef %4) #2
%32 = icmp eq i64 %31, 0
br i1 %32, label %36, label %33
33: ; preds = %26
%34 = getelementptr inbounds i8, ptr %1, i64 56
%35 = tail call i32 @h2o_proceed_response_deferred(ptr noundef nonnull %34) #2
br label %36
36: ; preds = %26, %33
%37 = phi ptr [ @RECEIVED, %33 ], [ @FINAL_RECEIVED, %26 ]
%38 = load i64, ptr %37, align 8, !tbaa !26
store i64 %38, ptr %27, align 8, !tbaa !25
%39 = tail call i32 @append_bufs(ptr noundef nonnull %1, ptr noundef %2, i64 noundef %3) #2
%40 = load ptr, ptr %10, align 8, !tbaa !27
%41 = icmp eq ptr %40, null
br i1 %41, label %44, label %42
42: ; preds = %36
%43 = tail call i32 @send_response_shortcutted(ptr noundef nonnull %1) #2
br label %82
44: ; preds = %36
%45 = getelementptr inbounds i8, ptr %1, i64 32
%46 = load i32, ptr %45, align 8, !tbaa !28
%47 = tail call i64 @mrb_nil_p(i32 noundef %46) #2
%48 = icmp eq i64 %47, 0
br i1 %48, label %49, label %82
49: ; preds = %44
%50 = tail call i32 @mrb_gc_arena_save(ptr noundef %9) #2
br i1 %30, label %51, label %56
51: ; preds = %49
%52 = load ptr, ptr %6, align 8, !tbaa !6
%53 = tail call i32 @detach_receiver(ptr noundef nonnull %1) #2
%54 = tail call i32 @mrb_nil_value() #2
%55 = tail call i32 @h2o_mruby_run_fiber(ptr noundef %52, i32 noundef %53, i32 noundef %54, ptr noundef null) #2
br label %80
56: ; preds = %49
%57 = getelementptr inbounds i8, ptr %1, i64 24
%58 = load ptr, ptr %57, align 8, !tbaa !24
%59 = load i64, ptr %58, align 8, !tbaa !29
%60 = icmp eq i64 %59, 0
br i1 %60, label %71, label %61
61: ; preds = %56
%62 = getelementptr inbounds i8, ptr %58, i64 8
%63 = load i32, ptr %62, align 8, !tbaa !31
%64 = tail call i32 @h2o_mruby_new_str(ptr noundef %9, i32 noundef %63, i64 noundef %59) #2
%65 = load ptr, ptr %57, align 8, !tbaa !24
%66 = load i64, ptr %65, align 8, !tbaa !29
%67 = tail call i32 @h2o_buffer_consume(ptr noundef nonnull %57, i64 noundef %66) #2
%68 = load ptr, ptr %6, align 8, !tbaa !6
%69 = tail call i32 @detach_receiver(ptr noundef nonnull %1) #2
%70 = tail call i32 @h2o_mruby_run_fiber(ptr noundef %68, i32 noundef %69, i32 noundef %64, ptr noundef null) #2
br label %80
71: ; preds = %56
%72 = load i64, ptr %27, align 8, !tbaa !25
%73 = load i64, ptr @FINAL_RECEIVED, align 8, !tbaa !26
%74 = icmp eq i64 %72, %73
br i1 %74, label %75, label %80
75: ; preds = %71
%76 = load ptr, ptr %6, align 8, !tbaa !6
%77 = tail call i32 @detach_receiver(ptr noundef nonnull %1) #2
%78 = tail call i32 @mrb_nil_value() #2
%79 = tail call i32 @h2o_mruby_run_fiber(ptr noundef %76, i32 noundef %77, i32 noundef %78, ptr noundef null) #2
br label %80
80: ; preds = %61, %75, %71, %51
%81 = tail call i32 @mrb_gc_arena_restore(ptr noundef %9, i32 noundef %50) #2
br label %82
82: ; preds = %42, %80, %44, %22, %24, %14
ret void
}
declare i32 @h2o_mruby_sender_do_send(ptr noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @append_bufs(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @h2o_send_state_is_in_progress(i32 noundef) local_unnamed_addr #1
declare i32 @h2o_proceed_response_deferred(ptr noundef) local_unnamed_addr #1
declare i32 @send_response_shortcutted(ptr noundef) local_unnamed_addr #1
declare i64 @mrb_nil_p(i32 noundef) local_unnamed_addr #1
declare i32 @mrb_gc_arena_save(ptr noundef) local_unnamed_addr #1
declare i32 @h2o_mruby_run_fiber(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @detach_receiver(ptr noundef) local_unnamed_addr #1
declare i32 @mrb_nil_value(...) local_unnamed_addr #1
declare i32 @h2o_mruby_new_str(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @h2o_buffer_consume(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @mrb_gc_arena_restore(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 16}
!7 = !{!"st_mruby_subreq_t", !8, i64 0, !11, i64 8, !12, i64 16, !12, i64 24, !8, i64 32, !13, i64 40, !8, i64 56}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!"TYPE_9__", !12, i64 0, !12, i64 8}
!14 = !{!15, !12, i64 0}
!15 = !{!"TYPE_11__", !12, i64 0}
!16 = !{!17, !12, i64 0}
!17 = !{!"TYPE_7__", !12, i64 0}
!18 = !{!7, !12, i64 48}
!19 = !{!20, !12, i64 0}
!20 = !{!"TYPE_10__", !12, i64 0}
!21 = !{!22, !11, i64 0}
!22 = !{!"TYPE_8__", !11, i64 0}
!23 = !{!7, !8, i64 0}
!24 = !{!7, !12, i64 24}
!25 = !{!7, !11, i64 8}
!26 = !{!11, !11, i64 0}
!27 = !{!7, !12, i64 40}
!28 = !{!7, !8, i64 32}
!29 = !{!30, !11, i64 0}
!30 = !{!"TYPE_12__", !11, i64 0, !8, i64 8}
!31 = !{!30, !8, i64 8}
| h2o_lib_handler_mruby_extr_middleware.c_subreq_ostream_send |
; ModuleID = 'AnghaBench/exploitdb/exploits/windows/local/extr_29070.c_Ring0Function.c'
source_filename = "AnghaBench/exploitdb/exploits/windows/local/extr_29070.c_Ring0Function.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [2 x i8] c"\0A\00", align 1
@.str.1 = private unnamed_addr constant [19 x i8] c"-----[RING0]------\00", align 1
@.str.2 = private unnamed_addr constant [42 x i8] c"[*] Message: [.oO Hello From Ring0! Oo.]\0A\00", align 1
@.str.3 = private unnamed_addr constant [33 x i8] c"[!] Cleaning up Hooked Function\0A\00", align 1
@.str.4 = private unnamed_addr constant [13 x i8] c"\\\\.\\Kmxstart\00", align 1
@.str.5 = private unnamed_addr constant [24 x i8] c"[!] Exploit Terminated\0A\00", align 1
; Function Attrs: noreturn nounwind uwtable
define dso_local noundef i32 @Ring0Function() local_unnamed_addr #0 {
%1 = alloca [6 x i64], align 16
%2 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 48, ptr nonnull %1) #5
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #5
%3 = tail call i32 @printf(ptr noundef nonnull @.str) #5
%4 = tail call i32 @printf(ptr noundef nonnull @.str.1) #5
%5 = tail call i32 @printf(ptr noundef nonnull @.str) #5
%6 = tail call i32 @printf(ptr noundef nonnull @.str.2) #5
%7 = tail call i32 @printf(ptr noundef nonnull @.str.3) #5
call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(56) %1, i8 0, i64 56, i1 false)
%8 = tail call i32 @CreateFile(ptr noundef nonnull @.str.4, i32 noundef 0, i32 noundef 0, ptr noundef null, i32 noundef 3, i32 noundef 0, i32 noundef 0) #5
%9 = ptrtoint ptr %1 to i64
%10 = trunc i64 %9 to i32
%11 = call i32 @DeviceIoControl(i32 noundef %8, i32 noundef -2063597564, i32 noundef %10, i32 noundef 24, i32 noundef %10, i32 noundef 68, ptr noundef nonnull %2, ptr noundef null) #5
%12 = call i32 @printf(ptr noundef nonnull @.str.5) #5
%13 = call i32 @printf(ptr noundef nonnull @.str.1) #5
%14 = call i32 @exit(i32 noundef 1) #6
unreachable
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @printf(ptr noundef) local_unnamed_addr #2
declare i32 @CreateFile(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @DeviceIoControl(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #3
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4
attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/exploitdb/exploits/windows/local/extr_29070.c_Ring0Function.c'
source_filename = "AnghaBench/exploitdb/exploits/windows/local/extr_29070.c_Ring0Function.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [2 x i8] c"\0A\00", align 1
@.str.1 = private unnamed_addr constant [19 x i8] c"-----[RING0]------\00", align 1
@.str.2 = private unnamed_addr constant [42 x i8] c"[*] Message: [.oO Hello From Ring0! Oo.]\0A\00", align 1
@.str.3 = private unnamed_addr constant [33 x i8] c"[!] Cleaning up Hooked Function\0A\00", align 1
@.str.4 = private unnamed_addr constant [13 x i8] c"\\\\.\\Kmxstart\00", align 1
@.str.5 = private unnamed_addr constant [24 x i8] c"[!] Exploit Terminated\0A\00", align 1
; Function Attrs: noreturn nounwind ssp uwtable(sync)
define noundef i32 @Ring0Function() local_unnamed_addr #0 {
%1 = alloca [6 x i64], align 8
%2 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 48, ptr nonnull %1) #5
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #5
%3 = tail call i32 @printf(ptr noundef nonnull @.str) #5
%4 = tail call i32 @printf(ptr noundef nonnull @.str.1) #5
%5 = tail call i32 @printf(ptr noundef nonnull @.str) #5
%6 = tail call i32 @printf(ptr noundef nonnull @.str.2) #5
%7 = tail call i32 @printf(ptr noundef nonnull @.str.3) #5
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(56) %1, i8 0, i64 56, i1 false)
%8 = tail call i32 @CreateFile(ptr noundef nonnull @.str.4, i32 noundef 0, i32 noundef 0, ptr noundef null, i32 noundef 3, i32 noundef 0, i32 noundef 0) #5
%9 = ptrtoint ptr %1 to i64
%10 = trunc i64 %9 to i32
%11 = call i32 @DeviceIoControl(i32 noundef %8, i32 noundef -2063597564, i32 noundef %10, i32 noundef 24, i32 noundef %10, i32 noundef 68, ptr noundef nonnull %2, ptr noundef null) #5
%12 = call i32 @printf(ptr noundef nonnull @.str.5) #5
%13 = call i32 @printf(ptr noundef nonnull @.str.1) #5
%14 = call i32 @exit(i32 noundef 1) #6
unreachable
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @printf(ptr noundef) local_unnamed_addr #2
declare i32 @CreateFile(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @DeviceIoControl(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #3
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4
attributes #0 = { noreturn nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { noreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| exploitdb_exploits_windows_local_extr_29070.c_Ring0Function |
; ModuleID = 'AnghaBench/linux/drivers/thermal/qcom/extr_tsens-common.c_get_temp_common.c'
source_filename = "AnghaBench/linux/drivers/thermal/qcom/extr_tsens-common.c_get_temp_common.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.tsens_priv = type { ptr, ptr }
%struct.tsens_sensor = type { i64 }
@LAST_TEMP_0 = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @get_temp_common(ptr nocapture noundef readonly %0, i32 noundef %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
%4 = alloca i32, align 4
%5 = getelementptr inbounds %struct.tsens_priv, ptr %0, i64 0, i32 1
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = sext i32 %1 to i64
%8 = getelementptr inbounds %struct.tsens_sensor, ptr %6, i64 %7
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
store i32 0, ptr %4, align 4, !tbaa !10
%9 = load ptr, ptr %0, align 8, !tbaa !12
%10 = load i64, ptr @LAST_TEMP_0, align 8, !tbaa !13
%11 = load i64, ptr %8, align 8, !tbaa !15
%12 = getelementptr i32, ptr %9, i64 %10
%13 = getelementptr i32, ptr %12, i64 %11
%14 = load i32, ptr %13, align 4, !tbaa !10
%15 = call i32 @regmap_field_read(i32 noundef %14, ptr noundef nonnull %4) #3
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %21
17: ; preds = %3
%18 = load i32, ptr %4, align 4, !tbaa !10
%19 = call i32 @code_to_degc(i32 noundef %18, ptr noundef nonnull %8) #3
%20 = mul nsw i32 %19, 1000
store i32 %20, ptr %2, align 4, !tbaa !10
br label %21
21: ; preds = %3, %17
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 %15
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @regmap_field_read(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @code_to_degc(i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"tsens_priv", !7, i64 0, !7, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!16, !14, i64 0}
!16 = !{!"tsens_sensor", !14, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/thermal/qcom/extr_tsens-common.c_get_temp_common.c'
source_filename = "AnghaBench/linux/drivers/thermal/qcom/extr_tsens-common.c_get_temp_common.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.tsens_sensor = type { i64 }
@LAST_TEMP_0 = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @get_temp_common(ptr nocapture noundef readonly %0, i32 noundef %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
%4 = alloca i32, align 4
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = sext i32 %1 to i64
%8 = getelementptr inbounds %struct.tsens_sensor, ptr %6, i64 %7
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
store i32 0, ptr %4, align 4, !tbaa !11
%9 = load ptr, ptr %0, align 8, !tbaa !13
%10 = load i64, ptr @LAST_TEMP_0, align 8, !tbaa !14
%11 = load i64, ptr %8, align 8, !tbaa !16
%12 = getelementptr i32, ptr %9, i64 %10
%13 = getelementptr i32, ptr %12, i64 %11
%14 = load i32, ptr %13, align 4, !tbaa !11
%15 = call i32 @regmap_field_read(i32 noundef %14, ptr noundef nonnull %4) #3
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %21
17: ; preds = %3
%18 = load i32, ptr %4, align 4, !tbaa !11
%19 = call i32 @code_to_degc(i32 noundef %18, ptr noundef nonnull %8) #3
%20 = mul nsw i32 %19, 1000
store i32 %20, ptr %2, align 4, !tbaa !11
br label %21
21: ; preds = %3, %17
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 %15
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @regmap_field_read(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @code_to_degc(i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"tsens_priv", !8, i64 0, !8, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !9, i64 0}
!16 = !{!17, !15, i64 0}
!17 = !{!"tsens_sensor", !15, i64 0}
| linux_drivers_thermal_qcom_extr_tsens-common.c_get_temp_common |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_venc.c_venc_runtime_put.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_venc.c_venc_runtime_put.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [18 x i8] c"venc_runtime_put\0A\00", align 1
@ENOSYS = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @venc_runtime_put], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @venc_runtime_put(ptr nocapture noundef readonly %0) #0 {
%2 = tail call i32 @DSSDBG(ptr noundef nonnull @.str) #2
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = tail call i32 @pm_runtime_put_sync(ptr noundef %3) #2
%5 = icmp slt i32 %4, 0
%6 = load i32, ptr @ENOSYS, align 4
%7 = sub nsw i32 0, %6
%8 = icmp ne i32 %4, %7
%9 = select i1 %5, i1 %8, i1 false
%10 = zext i1 %9 to i32
%11 = tail call i32 @WARN_ON(i32 noundef %10) #2
ret void
}
declare i32 @DSSDBG(ptr noundef) local_unnamed_addr #1
declare i32 @pm_runtime_put_sync(ptr noundef) local_unnamed_addr #1
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"venc_device", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_venc.c_venc_runtime_put.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_venc.c_venc_runtime_put.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [18 x i8] c"venc_runtime_put\0A\00", align 1
@ENOSYS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @venc_runtime_put], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @venc_runtime_put(ptr nocapture noundef readonly %0) #0 {
%2 = tail call i32 @DSSDBG(ptr noundef nonnull @.str) #2
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = tail call i32 @pm_runtime_put_sync(ptr noundef %3) #2
%5 = icmp slt i32 %4, 0
%6 = load i32, ptr @ENOSYS, align 4
%7 = sub nsw i32 0, %6
%8 = icmp ne i32 %4, %7
%9 = select i1 %5, i1 %8, i1 false
%10 = zext i1 %9 to i32
%11 = tail call i32 @WARN_ON(i32 noundef %10) #2
ret void
}
declare i32 @DSSDBG(ptr noundef) local_unnamed_addr #1
declare i32 @pm_runtime_put_sync(ptr noundef) local_unnamed_addr #1
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"venc_device", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_gpu_drm_omapdrm_dss_extr_venc.c_venc_runtime_put |
; ModuleID = 'AnghaBench/linux/drivers/s390/cio/extr_device.c_online_store.c'
source_filename = "AnghaBench/linux/drivers/s390/cio/extr_device.c_online_store.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i64, i32, i32 }
@EAGAIN = dso_local local_unnamed_addr global i32 0, align 4
@DEV_STATE_DISCONNECTED = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [7 x i8] c"force\0A\00", align 1
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @online_store], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @online_store(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = alloca i64, align 8
%6 = tail call ptr @to_ccwdev(ptr noundef %0) #4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #4
%7 = load ptr, ptr %6, align 8, !tbaa !5
%8 = getelementptr inbounds %struct.TYPE_2__, ptr %7, i64 0, i32 1
%9 = tail call i64 @atomic_cmpxchg(ptr noundef nonnull %8, i32 noundef 0, i32 noundef 1) #4
%10 = icmp eq i64 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %4
%12 = load i32, ptr @EAGAIN, align 4, !tbaa !10
%13 = sub nsw i32 0, %12
br label %62
14: ; preds = %4
%15 = tail call i32 @dev_fsm_final_state(ptr noundef nonnull %6) #4
%16 = icmp eq i32 %15, 0
%17 = load ptr, ptr %6, align 8, !tbaa !5
br i1 %16, label %18, label %25
18: ; preds = %14
%19 = load i64, ptr %17, align 8, !tbaa !12
%20 = load i64, ptr @DEV_STATE_DISCONNECTED, align 8, !tbaa !15
%21 = icmp eq i64 %19, %20
br i1 %21, label %25, label %22
22: ; preds = %18
%23 = load i32, ptr @EAGAIN, align 4, !tbaa !10
%24 = sub nsw i32 0, %23
br label %53
25: ; preds = %18, %14
%26 = getelementptr inbounds %struct.TYPE_2__, ptr %17, i64 0, i32 2
%27 = tail call i64 @work_pending(ptr noundef nonnull %26) #4
%28 = icmp eq i64 %27, 0
br i1 %28, label %32, label %29
29: ; preds = %25
%30 = load i32, ptr @EAGAIN, align 4, !tbaa !10
%31 = sub nsw i32 0, %30
br label %53
32: ; preds = %25
%33 = tail call i32 @strncmp(ptr noundef %2, ptr noundef nonnull @.str, i64 noundef %3)
%34 = icmp eq i32 %33, 0
br i1 %34, label %35, label %36
35: ; preds = %32
store i64 1, ptr %5, align 8, !tbaa !15
br label %39
36: ; preds = %32
%37 = call i32 @kstrtoul(ptr noundef %2, i32 noundef 16, ptr noundef nonnull %5) #4
%38 = icmp eq i32 %37, 0
br i1 %38, label %39, label %53
39: ; preds = %35, %36
%40 = phi i32 [ 1, %35 ], [ 0, %36 ]
%41 = call i32 @device_lock(ptr noundef %0) #4
%42 = load i64, ptr %5, align 8, !tbaa !15
switch i64 %42, label %47 [
i64 0, label %43
i64 1, label %45
]
43: ; preds = %39
%44 = call i32 @online_store_handle_offline(ptr noundef nonnull %6) #4
br label %50
45: ; preds = %39
%46 = call i32 @online_store_handle_online(ptr noundef nonnull %6, i32 noundef %40) #4
br label %50
47: ; preds = %39
%48 = load i32, ptr @EINVAL, align 4, !tbaa !10
%49 = sub nsw i32 0, %48
br label %50
50: ; preds = %47, %45, %43
%51 = phi i32 [ %49, %47 ], [ %46, %45 ], [ %44, %43 ]
%52 = call i32 @device_unlock(ptr noundef %0) #4
br label %53
53: ; preds = %36, %50, %29, %22
%54 = phi i32 [ %31, %29 ], [ %37, %36 ], [ %51, %50 ], [ %24, %22 ]
%55 = load ptr, ptr %6, align 8, !tbaa !5
%56 = getelementptr inbounds %struct.TYPE_2__, ptr %55, i64 0, i32 1
%57 = call i32 @atomic_set(ptr noundef nonnull %56, i32 noundef 0) #4
%58 = icmp slt i32 %54, 0
%59 = zext i32 %54 to i64
%60 = select i1 %58, i64 %59, i64 %3
%61 = trunc i64 %60 to i32
br label %62
62: ; preds = %53, %11
%63 = phi i32 [ %13, %11 ], [ %61, %53 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #4
ret i32 %63
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @to_ccwdev(ptr noundef) local_unnamed_addr #2
declare i64 @atomic_cmpxchg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dev_fsm_final_state(ptr noundef) local_unnamed_addr #2
declare i64 @work_pending(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @strncmp(ptr nocapture noundef, ptr nocapture noundef, i64 noundef) local_unnamed_addr #3
declare i32 @kstrtoul(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @device_lock(ptr noundef) local_unnamed_addr #2
declare i32 @online_store_handle_offline(ptr noundef) local_unnamed_addr #2
declare i32 @online_store_handle_online(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @device_unlock(ptr noundef) local_unnamed_addr #2
declare i32 @atomic_set(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ccw_device", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_2__", !14, i64 0, !11, i64 8, !11, i64 12}
!14 = !{!"long", !8, i64 0}
!15 = !{!14, !14, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/s390/cio/extr_device.c_online_store.c'
source_filename = "AnghaBench/linux/drivers/s390/cio/extr_device.c_online_store.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EAGAIN = common local_unnamed_addr global i32 0, align 4
@DEV_STATE_DISCONNECTED = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [7 x i8] c"force\0A\00", align 1
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @online_store], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @online_store(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = alloca i64, align 8
%6 = tail call ptr @to_ccwdev(ptr noundef %0) #4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #4
%7 = load ptr, ptr %6, align 8, !tbaa !6
%8 = getelementptr inbounds i8, ptr %7, i64 8
%9 = tail call i64 @atomic_cmpxchg(ptr noundef nonnull %8, i32 noundef 0, i32 noundef 1) #4
%10 = icmp eq i64 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %4
%12 = load i32, ptr @EAGAIN, align 4, !tbaa !11
%13 = sub nsw i32 0, %12
br label %62
14: ; preds = %4
%15 = tail call i32 @dev_fsm_final_state(ptr noundef nonnull %6) #4
%16 = icmp eq i32 %15, 0
%17 = load ptr, ptr %6, align 8, !tbaa !6
br i1 %16, label %18, label %25
18: ; preds = %14
%19 = load i64, ptr %17, align 8, !tbaa !13
%20 = load i64, ptr @DEV_STATE_DISCONNECTED, align 8, !tbaa !16
%21 = icmp eq i64 %19, %20
br i1 %21, label %25, label %22
22: ; preds = %18
%23 = load i32, ptr @EAGAIN, align 4, !tbaa !11
%24 = sub nsw i32 0, %23
br label %53
25: ; preds = %18, %14
%26 = getelementptr inbounds i8, ptr %17, i64 12
%27 = tail call i64 @work_pending(ptr noundef nonnull %26) #4
%28 = icmp eq i64 %27, 0
br i1 %28, label %32, label %29
29: ; preds = %25
%30 = load i32, ptr @EAGAIN, align 4, !tbaa !11
%31 = sub nsw i32 0, %30
br label %53
32: ; preds = %25
%33 = tail call i32 @strncmp(ptr noundef %2, ptr noundef nonnull @.str, i64 noundef %3)
%34 = icmp eq i32 %33, 0
br i1 %34, label %35, label %36
35: ; preds = %32
store i64 1, ptr %5, align 8, !tbaa !16
br label %39
36: ; preds = %32
%37 = call i32 @kstrtoul(ptr noundef %2, i32 noundef 16, ptr noundef nonnull %5) #4
%38 = icmp eq i32 %37, 0
br i1 %38, label %39, label %53
39: ; preds = %35, %36
%40 = phi i32 [ 1, %35 ], [ 0, %36 ]
%41 = call i32 @device_lock(ptr noundef %0) #4
%42 = load i64, ptr %5, align 8, !tbaa !16
switch i64 %42, label %47 [
i64 0, label %43
i64 1, label %45
]
43: ; preds = %39
%44 = call i32 @online_store_handle_offline(ptr noundef nonnull %6) #4
br label %50
45: ; preds = %39
%46 = call i32 @online_store_handle_online(ptr noundef nonnull %6, i32 noundef %40) #4
br label %50
47: ; preds = %39
%48 = load i32, ptr @EINVAL, align 4, !tbaa !11
%49 = sub nsw i32 0, %48
br label %50
50: ; preds = %47, %45, %43
%51 = phi i32 [ %49, %47 ], [ %46, %45 ], [ %44, %43 ]
%52 = call i32 @device_unlock(ptr noundef %0) #4
br label %53
53: ; preds = %36, %50, %29, %22
%54 = phi i32 [ %31, %29 ], [ %37, %36 ], [ %51, %50 ], [ %24, %22 ]
%55 = load ptr, ptr %6, align 8, !tbaa !6
%56 = getelementptr inbounds i8, ptr %55, i64 8
%57 = call i32 @atomic_set(ptr noundef nonnull %56, i32 noundef 0) #4
%58 = icmp slt i32 %54, 0
%59 = zext i32 %54 to i64
%60 = select i1 %58, i64 %59, i64 %3
%61 = trunc i64 %60 to i32
br label %62
62: ; preds = %53, %11
%63 = phi i32 [ %13, %11 ], [ %61, %53 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #4
ret i32 %63
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @to_ccwdev(ptr noundef) local_unnamed_addr #2
declare i64 @atomic_cmpxchg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dev_fsm_final_state(ptr noundef) local_unnamed_addr #2
declare i64 @work_pending(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @strncmp(ptr nocapture noundef, ptr nocapture noundef, i64 noundef) local_unnamed_addr #3
declare i32 @kstrtoul(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @device_lock(ptr noundef) local_unnamed_addr #2
declare i32 @online_store_handle_offline(ptr noundef) local_unnamed_addr #2
declare i32 @online_store_handle_online(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @device_unlock(ptr noundef) local_unnamed_addr #2
declare i32 @atomic_set(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { mustprogress nofree nounwind willreturn memory(argmem: read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ccw_device", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"TYPE_2__", !15, i64 0, !12, i64 8, !12, i64 12}
!15 = !{!"long", !9, i64 0}
!16 = !{!15, !15, i64 0}
| linux_drivers_s390_cio_extr_device.c_online_store |
; ModuleID = 'AnghaBench/reactos/modules/rosapps/applications/net/tsclient/rdesktop/uiports/extr_xxxwin.c_ui_create_bitmap.c'
source_filename = "AnghaBench/reactos/modules/rosapps/applications/net/tsclient/rdesktop/uiports/extr_xxxwin.c_ui_create_bitmap.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i32 @ui_create_bitmap(i32 noundef %0, i32 noundef %1, ptr nocapture noundef readnone %2) local_unnamed_addr #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/reactos/modules/rosapps/applications/net/tsclient/rdesktop/uiports/extr_xxxwin.c_ui_create_bitmap.c'
source_filename = "AnghaBench/reactos/modules/rosapps/applications/net/tsclient/rdesktop/uiports/extr_xxxwin.c_ui_create_bitmap.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef i32 @ui_create_bitmap(i32 noundef %0, i32 noundef %1, ptr nocapture noundef readnone %2) local_unnamed_addr #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| reactos_modules_rosapps_applications_net_tsclient_rdesktop_uiports_extr_xxxwin.c_ui_create_bitmap |
; ModuleID = 'AnghaBench/fastsocket/kernel/net/netrom/extr_nr_subr.c_nr_validate_nr.c'
source_filename = "AnghaBench/fastsocket/kernel/net/netrom/extr_nr_subr.c_nr_validate_nr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.nr_sock = type { i16, i16 }
@NR_MODULUS = dso_local local_unnamed_addr global i16 0, align 2
; Function Attrs: nounwind uwtable
define dso_local i32 @nr_validate_nr(ptr noundef %0, i16 noundef zeroext %1) local_unnamed_addr #0 {
%3 = tail call ptr @nr_sk(ptr noundef %0) #2
%4 = load i16, ptr %3, align 2, !tbaa !5
%5 = getelementptr inbounds %struct.nr_sock, ptr %3, i64 0, i32 1
%6 = load i16, ptr %5, align 2, !tbaa !10
%7 = icmp eq i16 %4, %6
br i1 %7, label %20, label %8
8: ; preds = %2
%9 = load i16, ptr @NR_MODULUS, align 2
%10 = zext i16 %9 to i32
br label %11
11: ; preds = %8, %14
%12 = phi i16 [ %4, %8 ], [ %18, %14 ]
%13 = icmp eq i16 %12, %1
br i1 %13, label %23, label %14
14: ; preds = %11
%15 = zext i16 %12 to i32
%16 = add nuw nsw i32 %15, 1
%17 = urem i32 %16, %10
%18 = trunc i32 %17 to i16
%19 = icmp eq i16 %6, %18
br i1 %19, label %20, label %11, !llvm.loop !11
20: ; preds = %14, %2
%21 = icmp eq i16 %6, %1
%22 = zext i1 %21 to i32
br label %23
23: ; preds = %11, %20
%24 = phi i32 [ %22, %20 ], [ 1, %11 ]
ret i32 %24
}
declare ptr @nr_sk(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"nr_sock", !7, i64 0, !7, i64 2}
!7 = !{!"short", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 2}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/netrom/extr_nr_subr.c_nr_validate_nr.c'
source_filename = "AnghaBench/fastsocket/kernel/net/netrom/extr_nr_subr.c_nr_validate_nr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NR_MODULUS = common local_unnamed_addr global i16 0, align 2
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @nr_validate_nr(ptr noundef %0, i16 noundef zeroext %1) local_unnamed_addr #0 {
%3 = tail call ptr @nr_sk(ptr noundef %0) #2
%4 = load i16, ptr %3, align 2, !tbaa !6
%5 = getelementptr inbounds i8, ptr %3, i64 2
%6 = load i16, ptr %5, align 2, !tbaa !11
%7 = icmp eq i16 %4, %6
br i1 %7, label %20, label %8
8: ; preds = %2
%9 = load i16, ptr @NR_MODULUS, align 2
%10 = zext i16 %9 to i32
br label %11
11: ; preds = %8, %14
%12 = phi i16 [ %4, %8 ], [ %18, %14 ]
%13 = icmp eq i16 %12, %1
br i1 %13, label %23, label %14
14: ; preds = %11
%15 = zext i16 %12 to i32
%16 = add nuw nsw i32 %15, 1
%17 = urem i32 %16, %10
%18 = trunc nuw i32 %17 to i16
%19 = icmp eq i16 %6, %18
br i1 %19, label %20, label %11, !llvm.loop !12
20: ; preds = %14, %2
%21 = icmp eq i16 %6, %1
%22 = zext i1 %21 to i32
br label %23
23: ; preds = %11, %20
%24 = phi i32 [ %22, %20 ], [ 1, %11 ]
ret i32 %24
}
declare ptr @nr_sk(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"nr_sock", !8, i64 0, !8, i64 2}
!8 = !{!"short", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 2}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
| fastsocket_kernel_net_netrom_extr_nr_subr.c_nr_validate_nr |
; ModuleID = 'AnghaBench/freebsd/sys/opencrypto/extr_cryptodev.c_cryptodev_warn.c'
source_filename = "AnghaBench/freebsd/sys/opencrypto/extr_cryptodev.c_cryptodev_warn.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.timeval = type { i32 }
%struct.csession = type { i32, i32 }
@cryptodev_warn.arc4warn = internal global %struct.timeval zeroinitializer, align 4
@cryptodev_warn.blfwarn = internal global %struct.timeval zeroinitializer, align 4
@cryptodev_warn.castwarn = internal global %struct.timeval zeroinitializer, align 4
@cryptodev_warn.deswarn = internal global %struct.timeval zeroinitializer, align 4
@cryptodev_warn.md5warn = internal global %struct.timeval zeroinitializer, align 4
@cryptodev_warn.skipwarn = internal global %struct.timeval zeroinitializer, align 4
@cryptodev_warn.tdeswarn = internal global %struct.timeval zeroinitializer, align 4
@warninterval = dso_local global i32 0, align 4
@.str = private unnamed_addr constant [27 x i8] c"DES cipher via /dev/crypto\00", align 1
@.str.1 = private unnamed_addr constant [28 x i8] c"3DES cipher via /dev/crypto\00", align 1
@.str.2 = private unnamed_addr constant [32 x i8] c"Blowfish cipher via /dev/crypto\00", align 1
@.str.3 = private unnamed_addr constant [31 x i8] c"CAST128 cipher via /dev/crypto\00", align 1
@.str.4 = private unnamed_addr constant [32 x i8] c"Skipjack cipher via /dev/crypto\00", align 1
@.str.5 = private unnamed_addr constant [28 x i8] c"ARC4 cipher via /dev/crypto\00", align 1
@.str.6 = private unnamed_addr constant [39 x i8] c"MD5-HMAC authenticator via /dev/crypto\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @cryptodev_warn], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @cryptodev_warn(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
switch i32 %2, label %24 [
i32 130, label %3
i32 134, label %6
i32 132, label %9
i32 131, label %12
i32 128, label %15
i32 133, label %18
]
3: ; preds = %1
%4 = tail call i32 @ratecheck(ptr noundef nonnull @cryptodev_warn.deswarn, ptr noundef nonnull @warninterval) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %24, label %21
6: ; preds = %1
%7 = tail call i32 @ratecheck(ptr noundef nonnull @cryptodev_warn.tdeswarn, ptr noundef nonnull @warninterval) #2
%8 = icmp eq i32 %7, 0
br i1 %8, label %24, label %21
9: ; preds = %1
%10 = tail call i32 @ratecheck(ptr noundef nonnull @cryptodev_warn.blfwarn, ptr noundef nonnull @warninterval) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %24, label %21
12: ; preds = %1
%13 = tail call i32 @ratecheck(ptr noundef nonnull @cryptodev_warn.castwarn, ptr noundef nonnull @warninterval) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %24, label %21
15: ; preds = %1
%16 = tail call i32 @ratecheck(ptr noundef nonnull @cryptodev_warn.skipwarn, ptr noundef nonnull @warninterval) #2
%17 = icmp eq i32 %16, 0
br i1 %17, label %24, label %21
18: ; preds = %1
%19 = tail call i32 @ratecheck(ptr noundef nonnull @cryptodev_warn.arc4warn, ptr noundef nonnull @warninterval) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %24, label %21
21: ; preds = %18, %15, %12, %9, %6, %3
%22 = phi ptr [ @.str, %3 ], [ @.str.1, %6 ], [ @.str.2, %9 ], [ @.str.3, %12 ], [ @.str.4, %15 ], [ @.str.5, %18 ]
%23 = tail call i32 @gone_in(i32 noundef 13, ptr noundef nonnull %22) #2
br label %24
24: ; preds = %21, %18, %15, %12, %9, %6, %3, %1
%25 = getelementptr inbounds %struct.csession, ptr %0, i64 0, i32 1
%26 = load i32, ptr %25, align 4, !tbaa !10
%27 = icmp eq i32 %26, 129
br i1 %27, label %28, label %33
28: ; preds = %24
%29 = tail call i32 @ratecheck(ptr noundef nonnull @cryptodev_warn.md5warn, ptr noundef nonnull @warninterval) #2
%30 = icmp eq i32 %29, 0
br i1 %30, label %33, label %31
31: ; preds = %28
%32 = tail call i32 @gone_in(i32 noundef 13, ptr noundef nonnull @.str.6) #2
br label %33
33: ; preds = %28, %31, %24
ret void
}
declare i32 @ratecheck(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @gone_in(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"csession", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
| ; ModuleID = 'AnghaBench/freebsd/sys/opencrypto/extr_cryptodev.c_cryptodev_warn.c'
source_filename = "AnghaBench/freebsd/sys/opencrypto/extr_cryptodev.c_cryptodev_warn.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.timeval = type { i32 }
@cryptodev_warn.arc4warn = internal global %struct.timeval zeroinitializer, align 4
@cryptodev_warn.blfwarn = internal global %struct.timeval zeroinitializer, align 4
@cryptodev_warn.castwarn = internal global %struct.timeval zeroinitializer, align 4
@cryptodev_warn.deswarn = internal global %struct.timeval zeroinitializer, align 4
@cryptodev_warn.md5warn = internal global %struct.timeval zeroinitializer, align 4
@cryptodev_warn.skipwarn = internal global %struct.timeval zeroinitializer, align 4
@cryptodev_warn.tdeswarn = internal global %struct.timeval zeroinitializer, align 4
@warninterval = common global i32 0, align 4
@.str = private unnamed_addr constant [27 x i8] c"DES cipher via /dev/crypto\00", align 1
@.str.1 = private unnamed_addr constant [28 x i8] c"3DES cipher via /dev/crypto\00", align 1
@.str.2 = private unnamed_addr constant [32 x i8] c"Blowfish cipher via /dev/crypto\00", align 1
@.str.3 = private unnamed_addr constant [31 x i8] c"CAST128 cipher via /dev/crypto\00", align 1
@.str.4 = private unnamed_addr constant [32 x i8] c"Skipjack cipher via /dev/crypto\00", align 1
@.str.5 = private unnamed_addr constant [28 x i8] c"ARC4 cipher via /dev/crypto\00", align 1
@.str.6 = private unnamed_addr constant [39 x i8] c"MD5-HMAC authenticator via /dev/crypto\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @cryptodev_warn], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @cryptodev_warn(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
switch i32 %2, label %24 [
i32 130, label %3
i32 134, label %6
i32 132, label %9
i32 131, label %12
i32 128, label %15
i32 133, label %18
]
3: ; preds = %1
%4 = tail call i32 @ratecheck(ptr noundef nonnull @cryptodev_warn.deswarn, ptr noundef nonnull @warninterval) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %24, label %21
6: ; preds = %1
%7 = tail call i32 @ratecheck(ptr noundef nonnull @cryptodev_warn.tdeswarn, ptr noundef nonnull @warninterval) #2
%8 = icmp eq i32 %7, 0
br i1 %8, label %24, label %21
9: ; preds = %1
%10 = tail call i32 @ratecheck(ptr noundef nonnull @cryptodev_warn.blfwarn, ptr noundef nonnull @warninterval) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %24, label %21
12: ; preds = %1
%13 = tail call i32 @ratecheck(ptr noundef nonnull @cryptodev_warn.castwarn, ptr noundef nonnull @warninterval) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %24, label %21
15: ; preds = %1
%16 = tail call i32 @ratecheck(ptr noundef nonnull @cryptodev_warn.skipwarn, ptr noundef nonnull @warninterval) #2
%17 = icmp eq i32 %16, 0
br i1 %17, label %24, label %21
18: ; preds = %1
%19 = tail call i32 @ratecheck(ptr noundef nonnull @cryptodev_warn.arc4warn, ptr noundef nonnull @warninterval) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %24, label %21
21: ; preds = %18, %15, %12, %9, %6, %3
%22 = phi ptr [ @.str, %3 ], [ @.str.1, %6 ], [ @.str.2, %9 ], [ @.str.3, %12 ], [ @.str.4, %15 ], [ @.str.5, %18 ]
%23 = tail call i32 @gone_in(i32 noundef 13, ptr noundef nonnull %22) #2
br label %24
24: ; preds = %21, %18, %15, %12, %9, %6, %3, %1
%25 = getelementptr inbounds i8, ptr %0, i64 4
%26 = load i32, ptr %25, align 4, !tbaa !11
%27 = icmp eq i32 %26, 129
br i1 %27, label %28, label %33
28: ; preds = %24
%29 = tail call i32 @ratecheck(ptr noundef nonnull @cryptodev_warn.md5warn, ptr noundef nonnull @warninterval) #2
%30 = icmp eq i32 %29, 0
br i1 %30, label %33, label %31
31: ; preds = %28
%32 = tail call i32 @gone_in(i32 noundef 13, ptr noundef nonnull @.str.6) #2
br label %33
33: ; preds = %28, %31, %24
ret void
}
declare i32 @ratecheck(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @gone_in(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"csession", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
| freebsd_sys_opencrypto_extr_cryptodev.c_cryptodev_warn |
; ModuleID = 'AnghaBench/freebsd/sbin/sunlabel/extr_sunlabel.c_parse_flag.c'
source_filename = "AnghaBench/freebsd/sbin/sunlabel/extr_sunlabel.c_parse_flag.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.tags = type { i64, i32 }
%struct.TYPE_2__ = type { ptr }
@knownflags = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @parse_flag], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @parse_flag(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2) #0 {
%4 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #4
%5 = load ptr, ptr @knownflags, align 8, !tbaa !5
%6 = tail call i64 @nitems(ptr noundef %5) #4
%7 = icmp eq i64 %6, 0
br i1 %7, label %23, label %8
8: ; preds = %3, %17
%9 = phi i64 [ %18, %17 ], [ 0, %3 ]
%10 = phi ptr [ %19, %17 ], [ %5, %3 ]
%11 = getelementptr inbounds %struct.tags, ptr %10, i64 0, i32 1
%12 = load i32, ptr %11, align 8, !tbaa !9
%13 = tail call i64 @strcmp(i32 noundef %12, ptr noundef %2) #4
%14 = icmp eq i64 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %8
%16 = load i64, ptr %10, align 8, !tbaa !13
br label %31
17: ; preds = %8
%18 = add nuw i64 %9, 1
%19 = getelementptr inbounds %struct.tags, ptr %10, i64 1
%20 = load ptr, ptr @knownflags, align 8, !tbaa !5
%21 = tail call i64 @nitems(ptr noundef %20) #4
%22 = icmp ult i64 %18, %21
br i1 %22, label %8, label %23, !llvm.loop !14
23: ; preds = %17, %3
%24 = call i64 @strtoul(ptr noundef %2, ptr noundef nonnull %4, i32 noundef 0)
%25 = load i8, ptr %2, align 1, !tbaa !16
%26 = icmp eq i8 %25, 0
br i1 %26, label %37, label %27
27: ; preds = %23
%28 = load ptr, ptr %4, align 8, !tbaa !5
%29 = load i8, ptr %28, align 1, !tbaa !16
%30 = icmp eq i8 %29, 0
br i1 %30, label %31, label %37
31: ; preds = %27, %15
%32 = phi i64 [ %16, %15 ], [ %24, %27 ]
%33 = inttoptr i64 %32 to ptr
%34 = load ptr, ptr %0, align 8, !tbaa !17
%35 = sext i32 %1 to i64
%36 = getelementptr inbounds %struct.TYPE_2__, ptr %34, i64 %35
store ptr %33, ptr %36, align 8, !tbaa !19
br label %37
37: ; preds = %31, %23, %27
%38 = phi i32 [ -1, %27 ], [ -1, %23 ], [ 0, %31 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #4
ret i32 %38
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @nitems(ptr noundef) local_unnamed_addr #2
declare i64 @strcmp(i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn
declare i64 @strtoul(ptr noundef readonly, ptr nocapture noundef, i32 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nofree nounwind willreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 8}
!10 = !{!"tags", !11, i64 0, !12, i64 8}
!11 = !{!"long", !7, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!10, !11, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!7, !7, i64 0}
!17 = !{!18, !6, i64 0}
!18 = !{!"sun_disklabel", !6, i64 0}
!19 = !{!20, !6, i64 0}
!20 = !{!"TYPE_2__", !6, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sbin/sunlabel/extr_sunlabel.c_parse_flag.c'
source_filename = "AnghaBench/freebsd/sbin/sunlabel/extr_sunlabel.c_parse_flag.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { ptr }
@knownflags = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @parse_flag], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -1, 1) i32 @parse_flag(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2) #0 {
%4 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #4
%5 = load ptr, ptr @knownflags, align 8, !tbaa !6
%6 = tail call i64 @nitems(ptr noundef %5) #4
%7 = icmp eq i64 %6, 0
br i1 %7, label %23, label %8
8: ; preds = %3, %17
%9 = phi i64 [ %18, %17 ], [ 0, %3 ]
%10 = phi ptr [ %19, %17 ], [ %5, %3 ]
%11 = getelementptr inbounds i8, ptr %10, i64 8
%12 = load i32, ptr %11, align 8, !tbaa !10
%13 = tail call i64 @strcmp(i32 noundef %12, ptr noundef %2) #4
%14 = icmp eq i64 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %8
%16 = load i64, ptr %10, align 8, !tbaa !14
br label %31
17: ; preds = %8
%18 = add nuw i64 %9, 1
%19 = getelementptr inbounds i8, ptr %10, i64 16
%20 = load ptr, ptr @knownflags, align 8, !tbaa !6
%21 = tail call i64 @nitems(ptr noundef %20) #4
%22 = icmp ult i64 %18, %21
br i1 %22, label %8, label %23, !llvm.loop !15
23: ; preds = %17, %3
%24 = call i64 @strtoul(ptr noundef %2, ptr noundef nonnull %4, i32 noundef 0)
%25 = load i8, ptr %2, align 1, !tbaa !17
%26 = icmp eq i8 %25, 0
br i1 %26, label %37, label %27
27: ; preds = %23
%28 = load ptr, ptr %4, align 8, !tbaa !6
%29 = load i8, ptr %28, align 1, !tbaa !17
%30 = icmp eq i8 %29, 0
br i1 %30, label %31, label %37
31: ; preds = %27, %15
%32 = phi i64 [ %16, %15 ], [ %24, %27 ]
%33 = inttoptr i64 %32 to ptr
%34 = load ptr, ptr %0, align 8, !tbaa !18
%35 = sext i32 %1 to i64
%36 = getelementptr inbounds %struct.TYPE_2__, ptr %34, i64 %35
store ptr %33, ptr %36, align 8, !tbaa !20
br label %37
37: ; preds = %31, %23, %27
%38 = phi i32 [ -1, %27 ], [ -1, %23 ], [ 0, %31 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #4
ret i32 %38
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @nitems(ptr noundef) local_unnamed_addr #2
declare i64 @strcmp(i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn
declare i64 @strtoul(ptr noundef readonly, ptr nocapture noundef, i32 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { mustprogress nofree nounwind willreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 8}
!11 = !{!"tags", !12, i64 0, !13, i64 8}
!12 = !{!"long", !8, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!11, !12, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!8, !8, i64 0}
!18 = !{!19, !7, i64 0}
!19 = !{!"sun_disklabel", !7, i64 0}
!20 = !{!21, !7, i64 0}
!21 = !{!"TYPE_2__", !7, i64 0}
| freebsd_sbin_sunlabel_extr_sunlabel.c_parse_flag |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/otus/80211core/extr_ledmgr.c_zfLedCtrl_BlinkWhenScan_Alpha.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/otus/80211core/extr_ledmgr.c_zfLedCtrl_BlinkWhenScan_Alpha.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@zfLedCtrl_BlinkWhenScan_Alpha.counter = internal unnamed_addr global i32 0, align 4
@ZM_LED_CTRL_FLAG_ALPHA = dso_local local_unnamed_addr global i64 0, align 8
@wd = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local void @zfLedCtrl_BlinkWhenScan_Alpha(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @zmw_get_wlan_dev(ptr noundef %0) #2
%3 = load i32, ptr @zfLedCtrl_BlinkWhenScan_Alpha.counter, align 4, !tbaa !5
%4 = icmp sgt i32 %3, 34
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = load i64, ptr @ZM_LED_CTRL_FLAG_ALPHA, align 8, !tbaa !9
%7 = trunc i64 %6 to i32
%8 = xor i32 %7, -1
%9 = load ptr, ptr @wd, align 8, !tbaa !11
%10 = load i32, ptr %9, align 4, !tbaa !13
%11 = and i32 %10, %8
store i32 %11, ptr %9, align 4, !tbaa !13
store i32 0, ptr @zfLedCtrl_BlinkWhenScan_Alpha.counter, align 4, !tbaa !5
br label %16
12: ; preds = %1
%13 = srem i32 %3, 3
%14 = icmp slt i32 %13, 2
%15 = zext i1 %14 to i32
br label %16
16: ; preds = %12, %5
%17 = phi i32 [ 1, %5 ], [ %15, %12 ]
%18 = tail call i32 @zfHpLedCtrl(ptr noundef %0, i32 noundef 0, i32 noundef %17) #2
%19 = load i32, ptr @zfLedCtrl_BlinkWhenScan_Alpha.counter, align 4, !tbaa !5
%20 = add nsw i32 %19, 1
store i32 %20, ptr @zfLedCtrl_BlinkWhenScan_Alpha.counter, align 4, !tbaa !5
ret void
}
declare i32 @zmw_get_wlan_dev(ptr noundef) local_unnamed_addr #1
declare i32 @zfHpLedCtrl(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !6, i64 0}
!14 = !{!"TYPE_4__", !15, i64 0}
!15 = !{!"TYPE_3__", !6, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/otus/80211core/extr_ledmgr.c_zfLedCtrl_BlinkWhenScan_Alpha.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/otus/80211core/extr_ledmgr.c_zfLedCtrl_BlinkWhenScan_Alpha.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@zfLedCtrl_BlinkWhenScan_Alpha.counter = internal unnamed_addr global i32 0, align 4
@ZM_LED_CTRL_FLAG_ALPHA = common local_unnamed_addr global i64 0, align 8
@wd = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @zfLedCtrl_BlinkWhenScan_Alpha(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @zmw_get_wlan_dev(ptr noundef %0) #2
%3 = load i32, ptr @zfLedCtrl_BlinkWhenScan_Alpha.counter, align 4, !tbaa !6
%4 = icmp sgt i32 %3, 34
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = load i64, ptr @ZM_LED_CTRL_FLAG_ALPHA, align 8, !tbaa !10
%7 = trunc i64 %6 to i32
%8 = xor i32 %7, -1
%9 = load ptr, ptr @wd, align 8, !tbaa !12
%10 = load i32, ptr %9, align 4, !tbaa !14
%11 = and i32 %10, %8
store i32 %11, ptr %9, align 4, !tbaa !14
store i32 0, ptr @zfLedCtrl_BlinkWhenScan_Alpha.counter, align 4, !tbaa !6
br label %16
12: ; preds = %1
%13 = srem i32 %3, 3
%14 = icmp slt i32 %13, 2
%15 = zext i1 %14 to i32
br label %16
16: ; preds = %12, %5
%17 = phi i32 [ 1, %5 ], [ %15, %12 ]
%18 = tail call i32 @zfHpLedCtrl(ptr noundef %0, i32 noundef 0, i32 noundef %17) #2
%19 = load i32, ptr @zfLedCtrl_BlinkWhenScan_Alpha.counter, align 4, !tbaa !6
%20 = add nsw i32 %19, 1
store i32 %20, ptr @zfLedCtrl_BlinkWhenScan_Alpha.counter, align 4, !tbaa !6
ret void
}
declare i32 @zmw_get_wlan_dev(ptr noundef) local_unnamed_addr #1
declare i32 @zfHpLedCtrl(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !7, i64 0}
!15 = !{!"TYPE_4__", !16, i64 0}
!16 = !{!"TYPE_3__", !7, i64 0}
| fastsocket_kernel_drivers_staging_otus_80211core_extr_ledmgr.c_zfLedCtrl_BlinkWhenScan_Alpha |
; ModuleID = 'AnghaBench/esp-idf/tools/kconfig/extr_lkc.h_sym_get_choice_value.c'
source_filename = "AnghaBench/esp-idf/tools/kconfig/extr_lkc.h_sym_get_choice_value.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @sym_get_choice_value], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define internal ptr @sym_get_choice_value(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = inttoptr i64 %2 to ptr
ret ptr %3
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"symbol", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/esp-idf/tools/kconfig/extr_lkc.h_sym_get_choice_value.c'
source_filename = "AnghaBench/esp-idf/tools/kconfig/extr_lkc.h_sym_get_choice_value.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @sym_get_choice_value], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal ptr @sym_get_choice_value(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = inttoptr i64 %2 to ptr
ret ptr %3
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"symbol", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
| esp-idf_tools_kconfig_extr_lkc.h_sym_get_choice_value |
; ModuleID = 'AnghaBench/kphp-kdb/mutual-friends/extr_mf-engine.c_cron.c'
source_filename = "AnghaBench/kphp-kdb/mutual-friends/extr_mf-engine.c_cron.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @cron() local_unnamed_addr #0 {
%1 = tail call i32 (...) @flush_binlog() #2
ret void
}
declare i32 @flush_binlog(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/kphp-kdb/mutual-friends/extr_mf-engine.c_cron.c'
source_filename = "AnghaBench/kphp-kdb/mutual-friends/extr_mf-engine.c_cron.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @cron() local_unnamed_addr #0 {
%1 = tail call i32 @flush_binlog() #2
ret void
}
declare i32 @flush_binlog(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| kphp-kdb_mutual-friends_extr_mf-engine.c_cron |
; ModuleID = 'AnghaBench/radare2/libr/core/extr_cmd_mount.c_cmd_mkdir.c'
source_filename = "AnghaBench/radare2/libr/core/extr_cmd_mount.c_cmd_mkdir.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @cmd_mkdir], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @cmd_mkdir(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = tail call ptr @r_syscmd_mkdir(ptr noundef %1) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @r_cons_print(ptr noundef nonnull %3) #2
%7 = tail call i32 @free(ptr noundef nonnull %3) #2
br label %8
8: ; preds = %5, %2
ret i32 0
}
declare ptr @r_syscmd_mkdir(ptr noundef) local_unnamed_addr #1
declare i32 @r_cons_print(ptr noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/radare2/libr/core/extr_cmd_mount.c_cmd_mkdir.c'
source_filename = "AnghaBench/radare2/libr/core/extr_cmd_mount.c_cmd_mkdir.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @cmd_mkdir], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @cmd_mkdir(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = tail call ptr @r_syscmd_mkdir(ptr noundef %1) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @r_cons_print(ptr noundef nonnull %3) #2
%7 = tail call i32 @free(ptr noundef nonnull %3) #2
br label %8
8: ; preds = %5, %2
ret i32 0
}
declare ptr @r_syscmd_mkdir(ptr noundef) local_unnamed_addr #1
declare i32 @r_cons_print(ptr noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| radare2_libr_core_extr_cmd_mount.c_cmd_mkdir |
; ModuleID = 'AnghaBench/freebsd/sys/contrib/octeon-sdk/extr_cvmx-wqe.h_cvmx_wqe_get_grp.c'
source_filename = "AnghaBench/freebsd/sys/contrib/octeon-sdk/extr_cvmx-wqe.h_cvmx_wqe_get_grp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { %struct.TYPE_7__, %struct.TYPE_6__ }
%struct.TYPE_7__ = type { i32 }
%struct.TYPE_6__ = type { i32 }
@OCTEON_FEATURE_CN68XX_WQE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @cvmx_wqe_get_grp], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @cvmx_wqe_get_grp(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr @OCTEON_FEATURE_CN68XX_WQE, align 4, !tbaa !5
%3 = tail call i64 @octeon_has_feature(i32 noundef %2) #2
%4 = icmp eq i64 %3, 0
%5 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1
%6 = select i1 %4, ptr %0, ptr %5
%7 = load i32, ptr %6, align 4, !tbaa !5
ret i32 %7
}
declare i64 @octeon_has_feature(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/sys/contrib/octeon-sdk/extr_cvmx-wqe.h_cvmx_wqe_get_grp.c'
source_filename = "AnghaBench/freebsd/sys/contrib/octeon-sdk/extr_cvmx-wqe.h_cvmx_wqe_get_grp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@OCTEON_FEATURE_CN68XX_WQE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cvmx_wqe_get_grp], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @cvmx_wqe_get_grp(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr @OCTEON_FEATURE_CN68XX_WQE, align 4, !tbaa !6
%3 = tail call i64 @octeon_has_feature(i32 noundef %2) #2
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i64 0, i64 4
%6 = getelementptr inbounds i8, ptr %0, i64 %5
%7 = load i32, ptr %6, align 4, !tbaa !6
ret i32 %7
}
declare i64 @octeon_has_feature(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_contrib_octeon-sdk_extr_cvmx-wqe.h_cvmx_wqe_get_grp |
; ModuleID = 'AnghaBench/freebsd/lib/msun/src/extr_s_sincos.c_sincos.c'
source_filename = "AnghaBench/freebsd/lib/msun/src/extr_s_sincos.c_sincos.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @sincos(double noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = tail call i32 @GET_HIGH_WORD(i32 noundef undef, double noundef %0) #2
%5 = fptosi double %0 to i32
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %3
store double %0, ptr %1, align 8, !tbaa !5
store double 1.000000e+00, ptr %2, align 8, !tbaa !5
br label %10
8: ; preds = %3
%9 = tail call i32 @__kernel_sincos(double noundef %0, double noundef 0.000000e+00, i32 noundef 0, ptr noundef %1, ptr noundef %2) #2
br label %10
10: ; preds = %8, %7
ret void
}
declare i32 @GET_HIGH_WORD(i32 noundef, double noundef) local_unnamed_addr #1
declare i32 @__kernel_sincos(double noundef, double noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/lib/msun/src/extr_s_sincos.c_sincos.c'
source_filename = "AnghaBench/freebsd/lib/msun/src/extr_s_sincos.c_sincos.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @sincos(double noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = tail call i32 @GET_HIGH_WORD(i32 noundef undef, double noundef %0) #2
%5 = fptosi double %0 to i32
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %3
store double %0, ptr %1, align 8, !tbaa !6
store double 1.000000e+00, ptr %2, align 8, !tbaa !6
br label %10
8: ; preds = %3
%9 = tail call i32 @__kernel_sincos(double noundef %0, double noundef 0.000000e+00, i32 noundef 0, ptr noundef %1, ptr noundef %2) #2
br label %10
10: ; preds = %8, %7
ret void
}
declare i32 @GET_HIGH_WORD(i32 noundef, double noundef) local_unnamed_addr #1
declare i32 @__kernel_sincos(double noundef, double noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"double", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_lib_msun_src_extr_s_sincos.c_sincos |
; ModuleID = 'AnghaBench/linux/drivers/crypto/mediatek/extr_mtk-aes.c_mtk_aes_write_state_be.c'
source_filename = "AnghaBench/linux/drivers/crypto/mediatek/extr_mtk-aes.c_mtk_aes_write_state_be.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @mtk_aes_write_state_be], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @mtk_aes_write_state_be(ptr nocapture noundef writeonly %0, ptr nocapture noundef readonly %1, i32 noundef %2) #0 {
%4 = tail call i32 @SIZE_IN_WORDS(i32 noundef %2) #2
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %16
6: ; preds = %3, %6
%7 = phi i64 [ %12, %6 ], [ 0, %3 ]
%8 = getelementptr inbounds i32, ptr %1, i64 %7
%9 = load i32, ptr %8, align 4, !tbaa !5
%10 = tail call i32 @cpu_to_be32(i32 noundef %9) #2
%11 = getelementptr inbounds i32, ptr %0, i64 %7
store i32 %10, ptr %11, align 4, !tbaa !5
%12 = add nuw nsw i64 %7, 1
%13 = tail call i32 @SIZE_IN_WORDS(i32 noundef %2) #2
%14 = sext i32 %13 to i64
%15 = icmp slt i64 %12, %14
br i1 %15, label %6, label %16, !llvm.loop !9
16: ; preds = %6, %3
ret void
}
declare i32 @SIZE_IN_WORDS(i32 noundef) local_unnamed_addr #1
declare i32 @cpu_to_be32(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/crypto/mediatek/extr_mtk-aes.c_mtk_aes_write_state_be.c'
source_filename = "AnghaBench/linux/drivers/crypto/mediatek/extr_mtk-aes.c_mtk_aes_write_state_be.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @mtk_aes_write_state_be], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @mtk_aes_write_state_be(ptr nocapture noundef writeonly %0, ptr nocapture noundef readonly %1, i32 noundef %2) #0 {
%4 = tail call i32 @SIZE_IN_WORDS(i32 noundef %2) #2
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %16
6: ; preds = %3, %6
%7 = phi i64 [ %12, %6 ], [ 0, %3 ]
%8 = getelementptr inbounds i32, ptr %1, i64 %7
%9 = load i32, ptr %8, align 4, !tbaa !6
%10 = tail call i32 @cpu_to_be32(i32 noundef %9) #2
%11 = getelementptr inbounds i32, ptr %0, i64 %7
store i32 %10, ptr %11, align 4, !tbaa !6
%12 = add nuw nsw i64 %7, 1
%13 = tail call i32 @SIZE_IN_WORDS(i32 noundef %2) #2
%14 = sext i32 %13 to i64
%15 = icmp slt i64 %12, %14
br i1 %15, label %6, label %16, !llvm.loop !10
16: ; preds = %6, %3
ret void
}
declare i32 @SIZE_IN_WORDS(i32 noundef) local_unnamed_addr #1
declare i32 @cpu_to_be32(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| linux_drivers_crypto_mediatek_extr_mtk-aes.c_mtk_aes_write_state_be |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/arm/extr_ks8695net.c_ks8695_port_type.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/arm/extr_ks8695net.c_ks8695_port_type.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [4 x i8] c"LAN\00", align 1
@.str.1 = private unnamed_addr constant [4 x i8] c"WAN\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"HPNA\00", align 1
@.str.3 = private unnamed_addr constant [8 x i8] c"UNKNOWN\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @ks8695_port_type], section "llvm.metadata"
@reltable.ks8695_port_type = private unnamed_addr constant [3 x i32] [i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.1 to i64), i64 ptrtoint (ptr @reltable.ks8695_port_type to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str to i64), i64 ptrtoint (ptr @reltable.ks8695_port_type to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.2 to i64), i64 ptrtoint (ptr @reltable.ks8695_port_type to i64)) to i32)], align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define internal noundef nonnull ptr @ks8695_port_type(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = add i32 %2, -128
%4 = icmp ult i32 %3, 3
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = zext nneg i32 %3 to i64
%7 = shl i64 %6, 2
%8 = call ptr @llvm.load.relative.i64(ptr @reltable.ks8695_port_type, i64 %7)
br label %9
9: ; preds = %1, %5
%10 = phi ptr [ %8, %5 ], [ @.str.3, %1 ]
ret ptr %10
}
; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: read)
declare ptr @llvm.load.relative.i64(ptr, i64) #1
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: read) }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ks8695_priv", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/arm/extr_ks8695net.c_ks8695_port_type.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/arm/extr_ks8695net.c_ks8695_port_type.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [4 x i8] c"LAN\00", align 1
@.str.1 = private unnamed_addr constant [4 x i8] c"WAN\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"HPNA\00", align 1
@.str.3 = private unnamed_addr constant [8 x i8] c"UNKNOWN\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ks8695_port_type], section "llvm.metadata"
@switch.table.ks8695_port_type = private unnamed_addr constant [3 x ptr] [ptr @.str.1, ptr @.str, ptr @.str.2], align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal noundef nonnull ptr @ks8695_port_type(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = add i32 %2, -128
%4 = icmp ult i32 %3, 3
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = zext nneg i32 %3 to i64
%7 = getelementptr inbounds [3 x ptr], ptr @switch.table.ks8695_port_type, i64 0, i64 %6
%8 = load ptr, ptr %7, align 8
br label %9
9: ; preds = %1, %5
%10 = phi ptr [ %8, %5 ], [ @.str.3, %1 ]
ret ptr %10
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ks8695_priv", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_net_arm_extr_ks8695net.c_ks8695_port_type |
; ModuleID = 'AnghaBench/sqlcipher/ext/misc/extr_csv.c_csvtabCreate.c'
source_filename = "AnghaBench/sqlcipher/ext/misc/extr_csv.c_csvtabCreate.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @csvtabCreate], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @csvtabCreate(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5) #0 {
%7 = tail call i32 @csvtabConnect(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5) #2
ret i32 %7
}
declare i32 @csvtabConnect(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/sqlcipher/ext/misc/extr_csv.c_csvtabCreate.c'
source_filename = "AnghaBench/sqlcipher/ext/misc/extr_csv.c_csvtabCreate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @csvtabCreate], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @csvtabCreate(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5) #0 {
%7 = tail call i32 @csvtabConnect(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5) #2
ret i32 %7
}
declare i32 @csvtabConnect(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| sqlcipher_ext_misc_extr_csv.c_csvtabCreate |
; ModuleID = 'AnghaBench/freebsd/contrib/gcclibs/libiberty/extr_cp-demangle.c_d_template_arg.c'
source_filename = "AnghaBench/freebsd/contrib/gcclibs/libiberty/extr_cp-demangle.c_d_template_arg.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @d_template_arg], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @d_template_arg(ptr noundef %0) #0 {
%2 = tail call i32 @d_peek_char(ptr noundef %0) #2
switch i32 %2, label %11 [
i32 88, label %3
i32 76, label %9
]
3: ; preds = %1
%4 = tail call i32 @d_advance(ptr noundef %0, i32 noundef 1) #2
%5 = tail call ptr @d_expression(ptr noundef %0) #2
%6 = tail call i32 @d_check_char(ptr noundef %0, i8 noundef signext 69) #2
%7 = icmp eq i32 %6, 0
%8 = select i1 %7, ptr null, ptr %5
br label %13
9: ; preds = %1
%10 = tail call ptr @d_expr_primary(ptr noundef %0) #2
br label %13
11: ; preds = %1
%12 = tail call ptr @cplus_demangle_type(ptr noundef %0) #2
br label %13
13: ; preds = %3, %11, %9
%14 = phi ptr [ %12, %11 ], [ %10, %9 ], [ %8, %3 ]
ret ptr %14
}
declare i32 @d_peek_char(ptr noundef) local_unnamed_addr #1
declare i32 @d_advance(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @d_expression(ptr noundef) local_unnamed_addr #1
declare i32 @d_check_char(ptr noundef, i8 noundef signext) local_unnamed_addr #1
declare ptr @d_expr_primary(ptr noundef) local_unnamed_addr #1
declare ptr @cplus_demangle_type(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gcclibs/libiberty/extr_cp-demangle.c_d_template_arg.c'
source_filename = "AnghaBench/freebsd/contrib/gcclibs/libiberty/extr_cp-demangle.c_d_template_arg.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @d_template_arg], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @d_template_arg(ptr noundef %0) #0 {
%2 = tail call i32 @d_peek_char(ptr noundef %0) #2
switch i32 %2, label %11 [
i32 88, label %3
i32 76, label %9
]
3: ; preds = %1
%4 = tail call i32 @d_advance(ptr noundef %0, i32 noundef 1) #2
%5 = tail call ptr @d_expression(ptr noundef %0) #2
%6 = tail call i32 @d_check_char(ptr noundef %0, i8 noundef signext 69) #2
%7 = icmp eq i32 %6, 0
%8 = select i1 %7, ptr null, ptr %5
br label %13
9: ; preds = %1
%10 = tail call ptr @d_expr_primary(ptr noundef %0) #2
br label %13
11: ; preds = %1
%12 = tail call ptr @cplus_demangle_type(ptr noundef %0) #2
br label %13
13: ; preds = %3, %11, %9
%14 = phi ptr [ %12, %11 ], [ %10, %9 ], [ %8, %3 ]
ret ptr %14
}
declare i32 @d_peek_char(ptr noundef) local_unnamed_addr #1
declare i32 @d_advance(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @d_expression(ptr noundef) local_unnamed_addr #1
declare i32 @d_check_char(ptr noundef, i8 noundef signext) local_unnamed_addr #1
declare ptr @d_expr_primary(ptr noundef) local_unnamed_addr #1
declare ptr @cplus_demangle_type(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_contrib_gcclibs_libiberty_extr_cp-demangle.c_d_template_arg |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intel/iwlegacy/extr_4965-mac.c_il4965_hw_txq_free_tfd.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/intel/iwlegacy/extr_4965-mac.c_il4965_hw_txq_free_tfd.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.il_tx_queue = type { %struct.TYPE_2__, ptr, ptr, i64 }
%struct.TYPE_2__ = type { i32 }
%struct.il_tfd = type { i32 }
@IL_NUM_OF_TBS = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [21 x i8] c"Too many chunks: %i\0A\00", align 1
@mapping = dso_local local_unnamed_addr global i32 0, align 4
@len = dso_local local_unnamed_addr global i32 0, align 4
@PCI_DMA_BIDIRECTIONAL = dso_local local_unnamed_addr global i32 0, align 4
@PCI_DMA_TODEVICE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @il4965_hw_txq_free_tfd(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds %struct.il_tx_queue, ptr %1, i64 0, i32 3
%4 = load i64, ptr %3, align 8, !tbaa !5
%5 = inttoptr i64 %4 to ptr
%6 = load ptr, ptr %0, align 8, !tbaa !13
%7 = load i32, ptr %1, align 8, !tbaa !15
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds %struct.il_tfd, ptr %5, i64 %8
%10 = tail call i32 @il4965_tfd_get_num_tbs(ptr noundef %9) #2
%11 = load i32, ptr @IL_NUM_OF_TBS, align 4, !tbaa !16
%12 = icmp slt i32 %10, %11
br i1 %12, label %15, label %13
13: ; preds = %2
%14 = tail call i32 @IL_ERR(ptr noundef nonnull @.str, i32 noundef %10) #2
br label %54
15: ; preds = %2
%16 = icmp eq i32 %10, 0
br i1 %16, label %38, label %17
17: ; preds = %15
%18 = getelementptr inbounds %struct.il_tx_queue, ptr %1, i64 0, i32 2
%19 = load ptr, ptr %18, align 8, !tbaa !17
%20 = getelementptr inbounds i32, ptr %19, i64 %8
%21 = load i32, ptr @mapping, align 4, !tbaa !16
%22 = tail call i32 @dma_unmap_addr(ptr noundef %20, i32 noundef %21) #2
%23 = load ptr, ptr %18, align 8, !tbaa !17
%24 = getelementptr inbounds i32, ptr %23, i64 %8
%25 = load i32, ptr @len, align 4, !tbaa !16
%26 = tail call i32 @dma_unmap_len(ptr noundef %24, i32 noundef %25) #2
%27 = load i32, ptr @PCI_DMA_BIDIRECTIONAL, align 4, !tbaa !16
%28 = tail call i32 @pci_unmap_single(ptr noundef %6, i32 noundef %22, i32 noundef %26, i32 noundef %27) #2
%29 = icmp sgt i32 %10, 1
br i1 %29, label %30, label %38
30: ; preds = %17, %30
%31 = phi i32 [ %36, %30 ], [ 1, %17 ]
%32 = tail call i32 @il4965_tfd_tb_get_addr(ptr noundef %9, i32 noundef %31) #2
%33 = tail call i32 @il4965_tfd_tb_get_len(ptr noundef %9, i32 noundef %31) #2
%34 = load i32, ptr @PCI_DMA_TODEVICE, align 4, !tbaa !16
%35 = tail call i32 @pci_unmap_single(ptr noundef %6, i32 noundef %32, i32 noundef %33, i32 noundef %34) #2
%36 = add nuw nsw i32 %31, 1
%37 = icmp eq i32 %36, %10
br i1 %37, label %38, label %30, !llvm.loop !18
38: ; preds = %30, %15, %17
%39 = getelementptr inbounds %struct.il_tx_queue, ptr %1, i64 0, i32 1
%40 = load ptr, ptr %39, align 8, !tbaa !20
%41 = icmp eq ptr %40, null
br i1 %41, label %54, label %42
42: ; preds = %38
%43 = load i32, ptr %1, align 8, !tbaa !15
%44 = sext i32 %43 to i64
%45 = getelementptr inbounds ptr, ptr %40, i64 %44
%46 = load ptr, ptr %45, align 8, !tbaa !21
%47 = icmp eq ptr %46, null
br i1 %47, label %54, label %48
48: ; preds = %42
%49 = tail call i32 @dev_kfree_skb_any(ptr noundef nonnull %46) #2
%50 = load ptr, ptr %39, align 8, !tbaa !20
%51 = load i32, ptr %1, align 8, !tbaa !15
%52 = sext i32 %51 to i64
%53 = getelementptr inbounds ptr, ptr %50, i64 %52
store ptr null, ptr %53, align 8, !tbaa !21
br label %54
54: ; preds = %38, %48, %42, %13
ret void
}
declare i32 @il4965_tfd_get_num_tbs(ptr noundef) local_unnamed_addr #1
declare i32 @IL_ERR(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pci_unmap_single(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dma_unmap_addr(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dma_unmap_len(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @il4965_tfd_tb_get_addr(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @il4965_tfd_tb_get_len(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_kfree_skb_any(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !12, i64 24}
!6 = !{!"il_tx_queue", !7, i64 0, !11, i64 8, !11, i64 16, !12, i64 24}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"il_priv", !11, i64 0}
!15 = !{!6, !8, i64 0}
!16 = !{!8, !8, i64 0}
!17 = !{!6, !11, i64 16}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!6, !11, i64 8}
!21 = !{!11, !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intel/iwlegacy/extr_4965-mac.c_il4965_hw_txq_free_tfd.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/intel/iwlegacy/extr_4965-mac.c_il4965_hw_txq_free_tfd.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.il_tfd = type { i32 }
@IL_NUM_OF_TBS = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [21 x i8] c"Too many chunks: %i\0A\00", align 1
@mapping = common local_unnamed_addr global i32 0, align 4
@len = common local_unnamed_addr global i32 0, align 4
@PCI_DMA_BIDIRECTIONAL = common local_unnamed_addr global i32 0, align 4
@PCI_DMA_TODEVICE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @il4965_hw_txq_free_tfd(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 24
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = inttoptr i64 %4 to ptr
%6 = load ptr, ptr %0, align 8, !tbaa !14
%7 = load i32, ptr %1, align 8, !tbaa !16
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds %struct.il_tfd, ptr %5, i64 %8
%10 = tail call i32 @il4965_tfd_get_num_tbs(ptr noundef %9) #2
%11 = load i32, ptr @IL_NUM_OF_TBS, align 4, !tbaa !17
%12 = icmp slt i32 %10, %11
br i1 %12, label %15, label %13
13: ; preds = %2
%14 = tail call i32 @IL_ERR(ptr noundef nonnull @.str, i32 noundef %10) #2
br label %54
15: ; preds = %2
%16 = icmp eq i32 %10, 0
br i1 %16, label %38, label %17
17: ; preds = %15
%18 = getelementptr inbounds i8, ptr %1, i64 16
%19 = load ptr, ptr %18, align 8, !tbaa !18
%20 = getelementptr inbounds i32, ptr %19, i64 %8
%21 = load i32, ptr @mapping, align 4, !tbaa !17
%22 = tail call i32 @dma_unmap_addr(ptr noundef %20, i32 noundef %21) #2
%23 = load ptr, ptr %18, align 8, !tbaa !18
%24 = getelementptr inbounds i32, ptr %23, i64 %8
%25 = load i32, ptr @len, align 4, !tbaa !17
%26 = tail call i32 @dma_unmap_len(ptr noundef %24, i32 noundef %25) #2
%27 = load i32, ptr @PCI_DMA_BIDIRECTIONAL, align 4, !tbaa !17
%28 = tail call i32 @pci_unmap_single(ptr noundef %6, i32 noundef %22, i32 noundef %26, i32 noundef %27) #2
%29 = icmp sgt i32 %10, 1
br i1 %29, label %30, label %38
30: ; preds = %17, %30
%31 = phi i32 [ %36, %30 ], [ 1, %17 ]
%32 = tail call i32 @il4965_tfd_tb_get_addr(ptr noundef %9, i32 noundef %31) #2
%33 = tail call i32 @il4965_tfd_tb_get_len(ptr noundef %9, i32 noundef %31) #2
%34 = load i32, ptr @PCI_DMA_TODEVICE, align 4, !tbaa !17
%35 = tail call i32 @pci_unmap_single(ptr noundef %6, i32 noundef %32, i32 noundef %33, i32 noundef %34) #2
%36 = add nuw nsw i32 %31, 1
%37 = icmp eq i32 %36, %10
br i1 %37, label %38, label %30, !llvm.loop !19
38: ; preds = %30, %15, %17
%39 = getelementptr inbounds i8, ptr %1, i64 8
%40 = load ptr, ptr %39, align 8, !tbaa !21
%41 = icmp eq ptr %40, null
br i1 %41, label %54, label %42
42: ; preds = %38
%43 = load i32, ptr %1, align 8, !tbaa !16
%44 = sext i32 %43 to i64
%45 = getelementptr inbounds ptr, ptr %40, i64 %44
%46 = load ptr, ptr %45, align 8, !tbaa !22
%47 = icmp eq ptr %46, null
br i1 %47, label %54, label %48
48: ; preds = %42
%49 = tail call i32 @dev_kfree_skb_any(ptr noundef nonnull %46) #2
%50 = load ptr, ptr %39, align 8, !tbaa !21
%51 = load i32, ptr %1, align 8, !tbaa !16
%52 = sext i32 %51 to i64
%53 = getelementptr inbounds ptr, ptr %50, i64 %52
store ptr null, ptr %53, align 8, !tbaa !22
br label %54
54: ; preds = %38, %48, %42, %13
ret void
}
declare i32 @il4965_tfd_get_num_tbs(ptr noundef) local_unnamed_addr #1
declare i32 @IL_ERR(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pci_unmap_single(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dma_unmap_addr(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dma_unmap_len(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @il4965_tfd_tb_get_addr(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @il4965_tfd_tb_get_len(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_kfree_skb_any(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !13, i64 24}
!7 = !{!"il_tx_queue", !8, i64 0, !12, i64 8, !12, i64 16, !13, i64 24}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!"long", !10, i64 0}
!14 = !{!15, !12, i64 0}
!15 = !{!"il_priv", !12, i64 0}
!16 = !{!7, !9, i64 0}
!17 = !{!9, !9, i64 0}
!18 = !{!7, !12, i64 16}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!7, !12, i64 8}
!22 = !{!12, !12, i64 0}
| linux_drivers_net_wireless_intel_iwlegacy_extr_4965-mac.c_il4965_hw_txq_free_tfd |
; ModuleID = 'AnghaBench/nodemcu-firmware/app/sqlite3/extr_sqlite3.c_btreeSetHasContent.c'
source_filename = "AnghaBench/nodemcu-firmware/app/sqlite3/extr_sqlite3.c_btreeSetHasContent.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i64, i64 }
@SQLITE_OK = dso_local local_unnamed_addr global i32 0, align 4
@SQLITE_NOMEM_BKPT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @btreeSetHasContent], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @btreeSetHasContent(ptr nocapture noundef %0, i64 noundef %1) #0 {
%3 = load i32, ptr @SQLITE_OK, align 4, !tbaa !5
%4 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%5 = load i64, ptr %4, align 8, !tbaa !9
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %19
7: ; preds = %2
%8 = load i64, ptr %0, align 8, !tbaa !12
%9 = icmp sge i64 %8, %1
%10 = zext i1 %9 to i32
%11 = tail call i32 @assert(i32 noundef %10) #2
%12 = load i64, ptr %0, align 8, !tbaa !12
%13 = tail call i64 @sqlite3BitvecCreate(i64 noundef %12) #2
store i64 %13, ptr %4, align 8, !tbaa !9
%14 = icmp eq i64 %13, 0
%15 = load i32, ptr @SQLITE_NOMEM_BKPT, align 4
%16 = select i1 %14, i32 %15, i32 %3
%17 = load i32, ptr @SQLITE_OK, align 4, !tbaa !5
%18 = icmp eq i32 %16, %17
br i1 %18, label %19, label %27
19: ; preds = %2, %7
%20 = phi i32 [ %17, %7 ], [ %3, %2 ]
%21 = phi i64 [ %13, %7 ], [ %5, %2 ]
%22 = tail call i64 @sqlite3BitvecSize(i64 noundef %21) #2
%23 = icmp slt i64 %22, %1
br i1 %23, label %27, label %24
24: ; preds = %19
%25 = load i64, ptr %4, align 8, !tbaa !9
%26 = tail call i32 @sqlite3BitvecSet(i64 noundef %25, i64 noundef %1) #2
br label %27
27: ; preds = %24, %19, %7
%28 = phi i32 [ %26, %24 ], [ %20, %19 ], [ %16, %7 ]
ret i32 %28
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i64 @sqlite3BitvecCreate(i64 noundef) local_unnamed_addr #1
declare i64 @sqlite3BitvecSize(i64 noundef) local_unnamed_addr #1
declare i32 @sqlite3BitvecSet(i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"TYPE_3__", !11, i64 0, !11, i64 8}
!11 = !{!"long", !7, i64 0}
!12 = !{!10, !11, i64 0}
| ; ModuleID = 'AnghaBench/nodemcu-firmware/app/sqlite3/extr_sqlite3.c_btreeSetHasContent.c'
source_filename = "AnghaBench/nodemcu-firmware/app/sqlite3/extr_sqlite3.c_btreeSetHasContent.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SQLITE_OK = common local_unnamed_addr global i32 0, align 4
@SQLITE_NOMEM_BKPT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @btreeSetHasContent], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @btreeSetHasContent(ptr nocapture noundef %0, i64 noundef %1) #0 {
%3 = load i32, ptr @SQLITE_OK, align 4, !tbaa !6
%4 = getelementptr inbounds i8, ptr %0, i64 8
%5 = load i64, ptr %4, align 8, !tbaa !10
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %19
7: ; preds = %2
%8 = load i64, ptr %0, align 8, !tbaa !13
%9 = icmp sge i64 %8, %1
%10 = zext i1 %9 to i32
%11 = tail call i32 @assert(i32 noundef %10) #2
%12 = load i64, ptr %0, align 8, !tbaa !13
%13 = tail call i64 @sqlite3BitvecCreate(i64 noundef %12) #2
store i64 %13, ptr %4, align 8, !tbaa !10
%14 = icmp eq i64 %13, 0
%15 = load i32, ptr @SQLITE_NOMEM_BKPT, align 4
%16 = select i1 %14, i32 %15, i32 %3
%17 = load i32, ptr @SQLITE_OK, align 4, !tbaa !6
%18 = icmp eq i32 %16, %17
br i1 %18, label %19, label %27
19: ; preds = %2, %7
%20 = phi i32 [ %17, %7 ], [ %3, %2 ]
%21 = phi i64 [ %13, %7 ], [ %5, %2 ]
%22 = tail call i64 @sqlite3BitvecSize(i64 noundef %21) #2
%23 = icmp slt i64 %22, %1
br i1 %23, label %27, label %24
24: ; preds = %19
%25 = load i64, ptr %4, align 8, !tbaa !10
%26 = tail call i32 @sqlite3BitvecSet(i64 noundef %25, i64 noundef %1) #2
br label %27
27: ; preds = %24, %19, %7
%28 = phi i32 [ %26, %24 ], [ %20, %19 ], [ %16, %7 ]
ret i32 %28
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i64 @sqlite3BitvecCreate(i64 noundef) local_unnamed_addr #1
declare i64 @sqlite3BitvecSize(i64 noundef) local_unnamed_addr #1
declare i32 @sqlite3BitvecSet(i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"TYPE_3__", !12, i64 0, !12, i64 8}
!12 = !{!"long", !8, i64 0}
!13 = !{!11, !12, i64 0}
| nodemcu-firmware_app_sqlite3_extr_sqlite3.c_btreeSetHasContent |
; ModuleID = 'AnghaBench/zfs/module/os/linux/zfs/extr_spa_stats.c_spa_read_history_clear.c'
source_filename = "AnghaBench/zfs/module/os/linux/zfs/extr_spa_stats.c_spa_read_history_clear.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @spa_read_history_clear], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @spa_read_history_clear(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = tail call i32 @mutex_enter(ptr noundef %0) #2
%5 = tail call i32 @spa_read_history_truncate(ptr noundef %3, i32 noundef 0) #2
%6 = tail call i32 @mutex_exit(ptr noundef %0) #2
ret i32 0
}
declare i32 @mutex_enter(ptr noundef) local_unnamed_addr #1
declare i32 @spa_read_history_truncate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mutex_exit(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_3__", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
| ; ModuleID = 'AnghaBench/zfs/module/os/linux/zfs/extr_spa_stats.c_spa_read_history_clear.c'
source_filename = "AnghaBench/zfs/module/os/linux/zfs/extr_spa_stats.c_spa_read_history_clear.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @spa_read_history_clear], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @spa_read_history_clear(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = tail call i32 @mutex_enter(ptr noundef %0) #2
%5 = tail call i32 @spa_read_history_truncate(ptr noundef %3, i32 noundef 0) #2
%6 = tail call i32 @mutex_exit(ptr noundef %0) #2
ret i32 0
}
declare i32 @mutex_enter(ptr noundef) local_unnamed_addr #1
declare i32 @spa_read_history_truncate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mutex_exit(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
| zfs_module_os_linux_zfs_extr_spa_stats.c_spa_read_history_clear |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/freescale/fs_enet/extr_mac-fec.c_tx_restart.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/freescale/fs_enet/extr_mac-fec.c_tx_restart.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @tx_restart], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @tx_restart(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/freescale/fs_enet/extr_mac-fec.c_tx_restart.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/freescale/fs_enet/extr_mac-fec.c_tx_restart.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @tx_restart], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @tx_restart(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_net_ethernet_freescale_fs_enet_extr_mac-fec.c_tx_restart |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/cio/extr_cio.c_cio_create_sch_lock.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/cio/extr_cio.c_cio_create_sch_lock.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @cio_create_sch_lock(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%3 = tail call i32 @kmalloc(i32 noundef 4, i32 noundef %2) #2
store i32 %3, ptr %0, align 4, !tbaa !9
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%7 = sub nsw i32 0, %6
br label %10
8: ; preds = %1
%9 = tail call i32 @spin_lock_init(i32 noundef %3) #2
br label %10
10: ; preds = %8, %5
%11 = phi i32 [ 0, %8 ], [ %7, %5 ]
ret i32 %11
}
declare i32 @kmalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock_init(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"subchannel", !6, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/cio/extr_cio.c_cio_create_sch_lock.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/cio/extr_cio.c_cio_create_sch_lock.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @cio_create_sch_lock(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%3 = tail call i32 @kmalloc(i32 noundef 4, i32 noundef %2) #2
store i32 %3, ptr %0, align 4, !tbaa !10
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%7 = sub nsw i32 0, %6
br label %10
8: ; preds = %1
%9 = tail call i32 @spin_lock_init(i32 noundef %3) #2
br label %10
10: ; preds = %8, %5
%11 = phi i32 [ 0, %8 ], [ %7, %5 ]
ret i32 %11
}
declare i32 @kmalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock_init(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"subchannel", !7, i64 0}
| fastsocket_kernel_drivers_s390_cio_extr_cio.c_cio_create_sch_lock |
; ModuleID = 'AnghaBench/freebsd/contrib/binutils/binutils/extr_dwarf.c_decode_location_expression.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/binutils/extr_dwarf.c_decode_location_expression.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str.1 = private unnamed_addr constant [12 x i8] c"DW_OP_deref\00", align 1
@.str.2 = private unnamed_addr constant [19 x i8] c"DW_OP_const1u: %lu\00", align 1
@.str.3 = private unnamed_addr constant [19 x i8] c"DW_OP_const1s: %ld\00", align 1
@.str.4 = private unnamed_addr constant [19 x i8] c"DW_OP_const2u: %lu\00", align 1
@.str.5 = private unnamed_addr constant [19 x i8] c"DW_OP_const2s: %ld\00", align 1
@.str.6 = private unnamed_addr constant [19 x i8] c"DW_OP_const4u: %lu\00", align 1
@.str.7 = private unnamed_addr constant [19 x i8] c"DW_OP_const4s: %ld\00", align 1
@.str.8 = private unnamed_addr constant [23 x i8] c"DW_OP_const8u: %lu %lu\00", align 1
@.str.9 = private unnamed_addr constant [23 x i8] c"DW_OP_const8s: %ld %ld\00", align 1
@.str.10 = private unnamed_addr constant [18 x i8] c"DW_OP_constu: %lu\00", align 1
@.str.11 = private unnamed_addr constant [18 x i8] c"DW_OP_consts: %ld\00", align 1
@.str.12 = private unnamed_addr constant [10 x i8] c"DW_OP_dup\00", align 1
@.str.13 = private unnamed_addr constant [11 x i8] c"DW_OP_drop\00", align 1
@.str.14 = private unnamed_addr constant [11 x i8] c"DW_OP_over\00", align 1
@.str.15 = private unnamed_addr constant [16 x i8] c"DW_OP_pick: %ld\00", align 1
@.str.16 = private unnamed_addr constant [11 x i8] c"DW_OP_swap\00", align 1
@.str.17 = private unnamed_addr constant [10 x i8] c"DW_OP_rot\00", align 1
@.str.18 = private unnamed_addr constant [13 x i8] c"DW_OP_xderef\00", align 1
@.str.21 = private unnamed_addr constant [10 x i8] c"DW_OP_div\00", align 1
@.str.22 = private unnamed_addr constant [12 x i8] c"DW_OP_minus\00", align 1
@.str.23 = private unnamed_addr constant [10 x i8] c"DW_OP_mod\00", align 1
@.str.24 = private unnamed_addr constant [10 x i8] c"DW_OP_mul\00", align 1
@.str.25 = private unnamed_addr constant [10 x i8] c"DW_OP_neg\00", align 1
@.str.26 = private unnamed_addr constant [10 x i8] c"DW_OP_not\00", align 1
@.str.27 = private unnamed_addr constant [9 x i8] c"DW_OP_or\00", align 1
@.str.28 = private unnamed_addr constant [11 x i8] c"DW_OP_plus\00", align 1
@.str.29 = private unnamed_addr constant [23 x i8] c"DW_OP_plus_uconst: %lu\00", align 1
@.str.30 = private unnamed_addr constant [10 x i8] c"DW_OP_shl\00", align 1
@.str.31 = private unnamed_addr constant [10 x i8] c"DW_OP_shr\00", align 1
@.str.32 = private unnamed_addr constant [11 x i8] c"DW_OP_shra\00", align 1
@.str.33 = private unnamed_addr constant [10 x i8] c"DW_OP_xor\00", align 1
@.str.35 = private unnamed_addr constant [9 x i8] c"DW_OP_eq\00", align 1
@.str.36 = private unnamed_addr constant [9 x i8] c"DW_OP_ge\00", align 1
@.str.37 = private unnamed_addr constant [9 x i8] c"DW_OP_gt\00", align 1
@.str.38 = private unnamed_addr constant [9 x i8] c"DW_OP_le\00", align 1
@.str.39 = private unnamed_addr constant [9 x i8] c"DW_OP_lt\00", align 1
@.str.40 = private unnamed_addr constant [9 x i8] c"DW_OP_ne\00", align 1
@.str.41 = private unnamed_addr constant [16 x i8] c"DW_OP_skip: %ld\00", align 1
@.str.42 = private unnamed_addr constant [12 x i8] c"DW_OP_lit%d\00", align 1
@.str.43 = private unnamed_addr constant [12 x i8] c"DW_OP_reg%d\00", align 1
@.str.44 = private unnamed_addr constant [18 x i8] c"DW_OP_breg%d: %ld\00", align 1
@.str.45 = private unnamed_addr constant [16 x i8] c"DW_OP_regx: %lu\00", align 1
@.str.46 = private unnamed_addr constant [17 x i8] c"DW_OP_fbreg: %ld\00", align 1
@.str.47 = private unnamed_addr constant [21 x i8] c"DW_OP_bregx: %lu %ld\00", align 1
@.str.48 = private unnamed_addr constant [17 x i8] c"DW_OP_piece: %lu\00", align 1
@.str.49 = private unnamed_addr constant [22 x i8] c"DW_OP_deref_size: %ld\00", align 1
@.str.50 = private unnamed_addr constant [23 x i8] c"DW_OP_xderef_size: %ld\00", align 1
@.str.51 = private unnamed_addr constant [10 x i8] c"DW_OP_nop\00", align 1
@.str.52 = private unnamed_addr constant [26 x i8] c"DW_OP_push_object_address\00", align 1
@.str.53 = private unnamed_addr constant [19 x i8] c"DW_OP_call2: <%lx>\00", align 1
@.str.54 = private unnamed_addr constant [19 x i8] c"DW_OP_call4: <%lx>\00", align 1
@.str.55 = private unnamed_addr constant [15 x i8] c"DW_OP_call_ref\00", align 1
@.str.56 = private unnamed_addr constant [23 x i8] c"DW_OP_form_tls_address\00", align 1
@DW_OP_lo_user = dso_local local_unnamed_addr global i32 0, align 4
@DW_OP_hi_user = dso_local local_unnamed_addr global i32 0, align 4
@.str.58 = private unnamed_addr constant [27 x i8] c"(User defined location op)\00", align 1
@.str.59 = private unnamed_addr constant [22 x i8] c"(Unknown location op)\00", align 1
@.str.60 = private unnamed_addr constant [3 x i8] c"; \00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @decode_location_expression], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @decode_location_expression(ptr noundef %0, i32 %1, i64 noundef %2, i64 noundef %3) #0 {
%5 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #4
%6 = getelementptr inbounds i8, ptr %0, i64 %2
%7 = icmp sgt i64 %2, 0
br i1 %7, label %8, label %208
8: ; preds = %4, %206
%9 = phi i32 [ %204, %206 ], [ 0, %4 ]
%10 = phi ptr [ %203, %206 ], [ %0, %4 ]
%11 = getelementptr inbounds i8, ptr %10, i64 1
%12 = load i8, ptr %10, align 1, !tbaa !5
%13 = zext i8 %12 to i32
switch i8 %12, label %193 [
i8 -36, label %191
i8 -29, label %14
i8 -20, label %16
i8 -19, label %20
i8 -22, label %24
i8 -21, label %28
i8 -24, label %32
i8 -23, label %36
i8 -26, label %40
i8 -25, label %46
i8 -28, label %52
i8 -27, label %58
i8 -33, label %64
i8 -32, label %66
i8 -81, label %68
i8 -82, label %70
i8 -125, label %74
i8 -120, label %76
i8 -126, label %78
i8 -18, label %189
i8 -17, label %184
i8 -31, label %80
i8 -73, label %82
i8 -74, label %84
i8 -75, label %86
i8 -77, label %88
i8 -79, label %90
i8 -80, label %92
i8 -84, label %94
i8 -85, label %96
i8 -121, label %102
i8 -122, label %104
i8 -123, label %106
i8 -128, label %108
i8 -16, label %179
i8 -34, label %110
i8 -37, label %112
i8 -38, label %114
i8 -39, label %116
i8 -72, label %118
i8 -76, label %120
i8 -124, label %122
i8 -40, label %126
i8 -41, label %126
i8 -52, label %126
i8 -63, label %126
i8 -66, label %126
i8 -67, label %126
i8 -68, label %126
i8 -69, label %126
i8 -70, label %126
i8 -71, label %126
i8 -42, label %126
i8 -43, label %126
i8 -44, label %126
i8 -45, label %126
i8 -46, label %126
i8 -47, label %126
i8 -48, label %126
i8 -49, label %126
i8 -50, label %126
i8 -51, label %126
i8 -53, label %126
i8 -54, label %126
i8 -55, label %126
i8 -56, label %126
i8 -57, label %126
i8 -58, label %126
i8 -59, label %126
i8 -60, label %126
i8 -61, label %126
i8 -62, label %126
i8 -64, label %126
i8 -65, label %126
i8 -87, label %129
i8 -88, label %129
i8 -99, label %129
i8 -110, label %129
i8 -113, label %129
i8 -114, label %129
i8 -115, label %129
i8 -116, label %129
i8 -117, label %129
i8 -118, label %129
i8 -89, label %129
i8 -90, label %129
i8 -91, label %129
i8 -92, label %129
i8 -93, label %129
i8 -94, label %129
i8 -95, label %129
i8 -96, label %129
i8 -97, label %129
i8 -98, label %129
i8 -100, label %129
i8 -101, label %129
i8 -102, label %129
i8 -103, label %129
i8 -104, label %129
i8 -105, label %129
i8 -106, label %129
i8 -107, label %129
i8 -108, label %129
i8 -109, label %129
i8 -111, label %129
i8 -112, label %129
i8 -86, label %177
i8 -78, label %175
i8 -127, label %171
i8 -6, label %132
i8 -9, label %132
i8 -10, label %132
i8 -11, label %132
i8 -12, label %132
i8 -13, label %132
i8 -14, label %132
i8 -30, label %167
i8 -83, label %161
i8 -15, label %151
i8 -35, label %145
i8 -119, label %139
i8 -8, label %132
i8 -7, label %132
i8 -5, label %132
i8 -4, label %132
i8 -3, label %132
i8 -2, label %132
i8 -1, label %132
]
14: ; preds = %8
%15 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1)
br label %202
16: ; preds = %8
%17 = getelementptr inbounds i8, ptr %10, i64 2
%18 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 1) #4
%19 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, i64 noundef %18)
br label %202
20: ; preds = %8
%21 = getelementptr inbounds i8, ptr %10, i64 2
%22 = call i64 @byte_get_signed(ptr noundef nonnull %11, i32 noundef 1) #4
%23 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.3, i64 noundef %22)
br label %202
24: ; preds = %8
%25 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 2) #4
%26 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.4, i64 noundef %25)
%27 = getelementptr inbounds i8, ptr %10, i64 3
br label %202
28: ; preds = %8
%29 = call i64 @byte_get_signed(ptr noundef nonnull %11, i32 noundef 2) #4
%30 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.5, i64 noundef %29)
%31 = getelementptr inbounds i8, ptr %10, i64 3
br label %202
32: ; preds = %8
%33 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 4) #4
%34 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.6, i64 noundef %33)
%35 = getelementptr inbounds i8, ptr %10, i64 5
br label %202
36: ; preds = %8
%37 = call i64 @byte_get_signed(ptr noundef nonnull %11, i32 noundef 4) #4
%38 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.7, i64 noundef %37)
%39 = getelementptr inbounds i8, ptr %10, i64 5
br label %202
40: ; preds = %8
%41 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 4) #4
%42 = getelementptr inbounds i8, ptr %10, i64 5
%43 = call i64 @byte_get(ptr noundef nonnull %42, i32 noundef 4) #4
%44 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.8, i64 noundef %41, i64 noundef %43)
%45 = getelementptr inbounds i8, ptr %10, i64 9
br label %202
46: ; preds = %8
%47 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 4) #4
%48 = getelementptr inbounds i8, ptr %10, i64 5
%49 = call i64 @byte_get(ptr noundef nonnull %48, i32 noundef 4) #4
%50 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.9, i64 noundef %47, i64 noundef %49)
%51 = getelementptr inbounds i8, ptr %10, i64 9
br label %202
52: ; preds = %8
%53 = call i64 @read_leb128(ptr noundef nonnull %11, ptr noundef nonnull %5, i32 noundef 0) #4
%54 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.10, i64 noundef %53)
%55 = load i32, ptr %5, align 4, !tbaa !8
%56 = zext i32 %55 to i64
%57 = getelementptr inbounds i8, ptr %11, i64 %56
br label %202
58: ; preds = %8
%59 = call i64 @read_leb128(ptr noundef nonnull %11, ptr noundef nonnull %5, i32 noundef 1) #4
%60 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.11, i64 noundef %59)
%61 = load i32, ptr %5, align 4, !tbaa !8
%62 = zext i32 %61 to i64
%63 = getelementptr inbounds i8, ptr %11, i64 %62
br label %202
64: ; preds = %8
%65 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.12)
br label %202
66: ; preds = %8
%67 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.13)
br label %202
68: ; preds = %8
%69 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.14)
br label %202
70: ; preds = %8
%71 = getelementptr inbounds i8, ptr %10, i64 2
%72 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 1) #4
%73 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.15, i64 noundef %72)
br label %202
74: ; preds = %8
%75 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.16)
br label %202
76: ; preds = %8
%77 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.17)
br label %202
78: ; preds = %8
%79 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18)
br label %202
80: ; preds = %8
%81 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.21)
br label %202
82: ; preds = %8
%83 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.22)
br label %202
84: ; preds = %8
%85 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.23)
br label %202
86: ; preds = %8
%87 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.24)
br label %202
88: ; preds = %8
%89 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.25)
br label %202
90: ; preds = %8
%91 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.26)
br label %202
92: ; preds = %8
%93 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.27)
br label %202
94: ; preds = %8
%95 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.28)
br label %202
96: ; preds = %8
%97 = call i64 @read_leb128(ptr noundef nonnull %11, ptr noundef nonnull %5, i32 noundef 0) #4
%98 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.29, i64 noundef %97)
%99 = load i32, ptr %5, align 4, !tbaa !8
%100 = zext i32 %99 to i64
%101 = getelementptr inbounds i8, ptr %11, i64 %100
br label %202
102: ; preds = %8
%103 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.30)
br label %202
104: ; preds = %8
%105 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.31)
br label %202
106: ; preds = %8
%107 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.32)
br label %202
108: ; preds = %8
%109 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.33)
br label %202
110: ; preds = %8
%111 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.35)
br label %202
112: ; preds = %8
%113 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.36)
br label %202
114: ; preds = %8
%115 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.37)
br label %202
116: ; preds = %8
%117 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.38)
br label %202
118: ; preds = %8
%119 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.39)
br label %202
120: ; preds = %8
%121 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.40)
br label %202
122: ; preds = %8
%123 = call i64 @byte_get_signed(ptr noundef nonnull %11, i32 noundef 2) #4
%124 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.41, i64 noundef %123)
%125 = getelementptr inbounds i8, ptr %10, i64 3
br label %202
126: ; preds = %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8
%127 = add nsw i32 %13, -216
%128 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.42, i32 noundef %127)
br label %202
129: ; preds = %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8
%130 = add nsw i32 %13, -169
%131 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.43, i32 noundef %130)
br label %202
132: ; preds = %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8
%133 = add nuw nsw i32 %13, -273
%134 = call i64 @read_leb128(ptr noundef nonnull %11, ptr noundef nonnull %5, i32 noundef 1) #4
%135 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.44, i32 noundef %133, i64 noundef %134)
%136 = load i32, ptr %5, align 4, !tbaa !8
%137 = zext i32 %136 to i64
%138 = getelementptr inbounds i8, ptr %11, i64 %137
br label %202
139: ; preds = %8
%140 = call i64 @read_leb128(ptr noundef nonnull %11, ptr noundef nonnull %5, i32 noundef 0) #4
%141 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.45, i64 noundef %140)
%142 = load i32, ptr %5, align 4, !tbaa !8
%143 = zext i32 %142 to i64
%144 = getelementptr inbounds i8, ptr %11, i64 %143
br label %202
145: ; preds = %8
%146 = call i64 @read_leb128(ptr noundef nonnull %11, ptr noundef nonnull %5, i32 noundef 1) #4
%147 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.46, i64 noundef %146)
%148 = load i32, ptr %5, align 4, !tbaa !8
%149 = zext i32 %148 to i64
%150 = getelementptr inbounds i8, ptr %11, i64 %149
br label %202
151: ; preds = %8
%152 = call i64 @read_leb128(ptr noundef nonnull %11, ptr noundef nonnull %5, i32 noundef 0) #4
%153 = load i32, ptr %5, align 4, !tbaa !8
%154 = zext i32 %153 to i64
%155 = getelementptr inbounds i8, ptr %11, i64 %154
%156 = call i64 @read_leb128(ptr noundef nonnull %155, ptr noundef nonnull %5, i32 noundef 1) #4
%157 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.47, i64 noundef %152, i64 noundef %156)
%158 = load i32, ptr %5, align 4, !tbaa !8
%159 = zext i32 %158 to i64
%160 = getelementptr inbounds i8, ptr %155, i64 %159
br label %202
161: ; preds = %8
%162 = call i64 @read_leb128(ptr noundef nonnull %11, ptr noundef nonnull %5, i32 noundef 0) #4
%163 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.48, i64 noundef %162)
%164 = load i32, ptr %5, align 4, !tbaa !8
%165 = zext i32 %164 to i64
%166 = getelementptr inbounds i8, ptr %11, i64 %165
br label %202
167: ; preds = %8
%168 = getelementptr inbounds i8, ptr %10, i64 2
%169 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 1) #4
%170 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.49, i64 noundef %169)
br label %202
171: ; preds = %8
%172 = getelementptr inbounds i8, ptr %10, i64 2
%173 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 1) #4
%174 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.50, i64 noundef %173)
br label %202
175: ; preds = %8
%176 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.51)
br label %202
177: ; preds = %8
%178 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.52)
br label %202
179: ; preds = %8
%180 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 2) #4
%181 = add i64 %180, %3
%182 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.53, i64 noundef %181)
%183 = getelementptr inbounds i8, ptr %10, i64 3
br label %202
184: ; preds = %8
%185 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 4) #4
%186 = add i64 %185, %3
%187 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.54, i64 noundef %186)
%188 = getelementptr inbounds i8, ptr %10, i64 5
br label %202
189: ; preds = %8
%190 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.55)
br label %202
191: ; preds = %8
%192 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.56)
br label %202
193: ; preds = %8
%194 = load i32, ptr @DW_OP_lo_user, align 4, !tbaa !8
%195 = icmp ugt i32 %194, %13
%196 = load i32, ptr @DW_OP_hi_user, align 4
%197 = icmp ult i32 %196, %13
%198 = select i1 %195, i1 true, i1 %197
%199 = select i1 %198, ptr @.str.59, ptr @.str.58
%200 = call ptr @_(ptr noundef nonnull %199) #4
%201 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) %200)
br label %208
202: ; preds = %191, %189, %184, %179, %177, %175, %171, %167, %161, %151, %145, %139, %132, %129, %126, %122, %120, %118, %116, %114, %112, %110, %108, %106, %104, %102, %96, %94, %92, %90, %88, %86, %84, %82, %80, %78, %76, %74, %70, %68, %66, %64, %58, %52, %46, %40, %36, %32, %28, %24, %20, %16, %14
%203 = phi ptr [ %11, %191 ], [ %11, %189 ], [ %188, %184 ], [ %183, %179 ], [ %11, %177 ], [ %11, %175 ], [ %172, %171 ], [ %168, %167 ], [ %166, %161 ], [ %160, %151 ], [ %150, %145 ], [ %144, %139 ], [ %138, %132 ], [ %11, %129 ], [ %11, %126 ], [ %125, %122 ], [ %11, %120 ], [ %11, %118 ], [ %11, %116 ], [ %11, %114 ], [ %11, %112 ], [ %11, %110 ], [ %11, %108 ], [ %11, %106 ], [ %11, %104 ], [ %11, %102 ], [ %101, %96 ], [ %11, %94 ], [ %11, %92 ], [ %11, %90 ], [ %11, %88 ], [ %11, %86 ], [ %11, %84 ], [ %11, %82 ], [ %11, %80 ], [ %11, %78 ], [ %11, %76 ], [ %11, %74 ], [ %71, %70 ], [ %11, %68 ], [ %11, %66 ], [ %11, %64 ], [ %63, %58 ], [ %57, %52 ], [ %51, %46 ], [ %45, %40 ], [ %39, %36 ], [ %35, %32 ], [ %31, %28 ], [ %27, %24 ], [ %21, %20 ], [ %17, %16 ], [ %11, %14 ]
%204 = phi i32 [ %9, %191 ], [ %9, %189 ], [ %9, %184 ], [ %9, %179 ], [ %9, %177 ], [ %9, %175 ], [ %9, %171 ], [ %9, %167 ], [ %9, %161 ], [ %9, %151 ], [ 1, %145 ], [ %9, %139 ], [ %9, %132 ], [ %9, %129 ], [ %9, %126 ], [ %9, %122 ], [ %9, %120 ], [ %9, %118 ], [ %9, %116 ], [ %9, %114 ], [ %9, %112 ], [ %9, %110 ], [ %9, %108 ], [ %9, %106 ], [ %9, %104 ], [ %9, %102 ], [ %9, %96 ], [ %9, %94 ], [ %9, %92 ], [ %9, %90 ], [ %9, %88 ], [ %9, %86 ], [ %9, %84 ], [ %9, %82 ], [ %9, %80 ], [ %9, %78 ], [ %9, %76 ], [ %9, %74 ], [ %9, %70 ], [ %9, %68 ], [ %9, %66 ], [ %9, %64 ], [ %9, %58 ], [ %9, %52 ], [ %9, %46 ], [ %9, %40 ], [ %9, %36 ], [ %9, %32 ], [ %9, %28 ], [ %9, %24 ], [ %9, %20 ], [ %9, %16 ], [ %9, %14 ]
%205 = icmp ult ptr %203, %6
br i1 %205, label %206, label %208
206: ; preds = %202
%207 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.60)
br label %8
208: ; preds = %202, %193, %4
%209 = phi i32 [ 0, %4 ], [ %9, %193 ], [ %204, %202 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #4
ret i32 %209
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2
declare i64 @byte_get(ptr noundef, i32 noundef) local_unnamed_addr #3
declare i64 @byte_get_signed(ptr noundef, i32 noundef) local_unnamed_addr #3
declare i64 @read_leb128(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
declare ptr @_(ptr noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/binutils/binutils/extr_dwarf.c_decode_location_expression.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/binutils/extr_dwarf.c_decode_location_expression.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str.1 = private unnamed_addr constant [12 x i8] c"DW_OP_deref\00", align 1
@.str.2 = private unnamed_addr constant [19 x i8] c"DW_OP_const1u: %lu\00", align 1
@.str.3 = private unnamed_addr constant [19 x i8] c"DW_OP_const1s: %ld\00", align 1
@.str.4 = private unnamed_addr constant [19 x i8] c"DW_OP_const2u: %lu\00", align 1
@.str.5 = private unnamed_addr constant [19 x i8] c"DW_OP_const2s: %ld\00", align 1
@.str.6 = private unnamed_addr constant [19 x i8] c"DW_OP_const4u: %lu\00", align 1
@.str.7 = private unnamed_addr constant [19 x i8] c"DW_OP_const4s: %ld\00", align 1
@.str.8 = private unnamed_addr constant [23 x i8] c"DW_OP_const8u: %lu %lu\00", align 1
@.str.9 = private unnamed_addr constant [23 x i8] c"DW_OP_const8s: %ld %ld\00", align 1
@.str.10 = private unnamed_addr constant [18 x i8] c"DW_OP_constu: %lu\00", align 1
@.str.11 = private unnamed_addr constant [18 x i8] c"DW_OP_consts: %ld\00", align 1
@.str.12 = private unnamed_addr constant [10 x i8] c"DW_OP_dup\00", align 1
@.str.13 = private unnamed_addr constant [11 x i8] c"DW_OP_drop\00", align 1
@.str.14 = private unnamed_addr constant [11 x i8] c"DW_OP_over\00", align 1
@.str.15 = private unnamed_addr constant [16 x i8] c"DW_OP_pick: %ld\00", align 1
@.str.16 = private unnamed_addr constant [11 x i8] c"DW_OP_swap\00", align 1
@.str.17 = private unnamed_addr constant [10 x i8] c"DW_OP_rot\00", align 1
@.str.18 = private unnamed_addr constant [13 x i8] c"DW_OP_xderef\00", align 1
@.str.21 = private unnamed_addr constant [10 x i8] c"DW_OP_div\00", align 1
@.str.22 = private unnamed_addr constant [12 x i8] c"DW_OP_minus\00", align 1
@.str.23 = private unnamed_addr constant [10 x i8] c"DW_OP_mod\00", align 1
@.str.24 = private unnamed_addr constant [10 x i8] c"DW_OP_mul\00", align 1
@.str.25 = private unnamed_addr constant [10 x i8] c"DW_OP_neg\00", align 1
@.str.26 = private unnamed_addr constant [10 x i8] c"DW_OP_not\00", align 1
@.str.27 = private unnamed_addr constant [9 x i8] c"DW_OP_or\00", align 1
@.str.28 = private unnamed_addr constant [11 x i8] c"DW_OP_plus\00", align 1
@.str.29 = private unnamed_addr constant [23 x i8] c"DW_OP_plus_uconst: %lu\00", align 1
@.str.30 = private unnamed_addr constant [10 x i8] c"DW_OP_shl\00", align 1
@.str.31 = private unnamed_addr constant [10 x i8] c"DW_OP_shr\00", align 1
@.str.32 = private unnamed_addr constant [11 x i8] c"DW_OP_shra\00", align 1
@.str.33 = private unnamed_addr constant [10 x i8] c"DW_OP_xor\00", align 1
@.str.35 = private unnamed_addr constant [9 x i8] c"DW_OP_eq\00", align 1
@.str.36 = private unnamed_addr constant [9 x i8] c"DW_OP_ge\00", align 1
@.str.37 = private unnamed_addr constant [9 x i8] c"DW_OP_gt\00", align 1
@.str.38 = private unnamed_addr constant [9 x i8] c"DW_OP_le\00", align 1
@.str.39 = private unnamed_addr constant [9 x i8] c"DW_OP_lt\00", align 1
@.str.40 = private unnamed_addr constant [9 x i8] c"DW_OP_ne\00", align 1
@.str.41 = private unnamed_addr constant [16 x i8] c"DW_OP_skip: %ld\00", align 1
@.str.42 = private unnamed_addr constant [12 x i8] c"DW_OP_lit%d\00", align 1
@.str.43 = private unnamed_addr constant [12 x i8] c"DW_OP_reg%d\00", align 1
@.str.44 = private unnamed_addr constant [18 x i8] c"DW_OP_breg%d: %ld\00", align 1
@.str.45 = private unnamed_addr constant [16 x i8] c"DW_OP_regx: %lu\00", align 1
@.str.46 = private unnamed_addr constant [17 x i8] c"DW_OP_fbreg: %ld\00", align 1
@.str.47 = private unnamed_addr constant [21 x i8] c"DW_OP_bregx: %lu %ld\00", align 1
@.str.48 = private unnamed_addr constant [17 x i8] c"DW_OP_piece: %lu\00", align 1
@.str.49 = private unnamed_addr constant [22 x i8] c"DW_OP_deref_size: %ld\00", align 1
@.str.50 = private unnamed_addr constant [23 x i8] c"DW_OP_xderef_size: %ld\00", align 1
@.str.51 = private unnamed_addr constant [10 x i8] c"DW_OP_nop\00", align 1
@.str.52 = private unnamed_addr constant [26 x i8] c"DW_OP_push_object_address\00", align 1
@.str.53 = private unnamed_addr constant [19 x i8] c"DW_OP_call2: <%lx>\00", align 1
@.str.54 = private unnamed_addr constant [19 x i8] c"DW_OP_call4: <%lx>\00", align 1
@.str.55 = private unnamed_addr constant [15 x i8] c"DW_OP_call_ref\00", align 1
@.str.56 = private unnamed_addr constant [23 x i8] c"DW_OP_form_tls_address\00", align 1
@DW_OP_lo_user = common local_unnamed_addr global i32 0, align 4
@DW_OP_hi_user = common local_unnamed_addr global i32 0, align 4
@.str.58 = private unnamed_addr constant [27 x i8] c"(User defined location op)\00", align 1
@.str.59 = private unnamed_addr constant [22 x i8] c"(Unknown location op)\00", align 1
@.str.60 = private unnamed_addr constant [3 x i8] c"; \00", align 1
@llvm.used = appending global [1 x ptr] [ptr @decode_location_expression], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @decode_location_expression(ptr noundef %0, i32 %1, i64 noundef %2, i64 noundef %3) #0 {
%5 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #4
%6 = getelementptr inbounds i8, ptr %0, i64 %2
%7 = icmp sgt i64 %2, 0
br i1 %7, label %8, label %208
8: ; preds = %4, %206
%9 = phi i32 [ %204, %206 ], [ 0, %4 ]
%10 = phi ptr [ %203, %206 ], [ %0, %4 ]
%11 = getelementptr inbounds i8, ptr %10, i64 1
%12 = load i8, ptr %10, align 1, !tbaa !6
%13 = zext i8 %12 to i32
switch i8 %12, label %193 [
i8 -36, label %191
i8 -29, label %14
i8 -20, label %16
i8 -19, label %20
i8 -22, label %24
i8 -21, label %28
i8 -24, label %32
i8 -23, label %36
i8 -26, label %40
i8 -25, label %46
i8 -28, label %52
i8 -27, label %58
i8 -33, label %64
i8 -32, label %66
i8 -81, label %68
i8 -82, label %70
i8 -125, label %74
i8 -120, label %76
i8 -126, label %78
i8 -18, label %189
i8 -17, label %184
i8 -31, label %80
i8 -73, label %82
i8 -74, label %84
i8 -75, label %86
i8 -77, label %88
i8 -79, label %90
i8 -80, label %92
i8 -84, label %94
i8 -85, label %96
i8 -121, label %102
i8 -122, label %104
i8 -123, label %106
i8 -128, label %108
i8 -16, label %179
i8 -34, label %110
i8 -37, label %112
i8 -38, label %114
i8 -39, label %116
i8 -72, label %118
i8 -76, label %120
i8 -124, label %122
i8 -40, label %126
i8 -41, label %126
i8 -52, label %126
i8 -63, label %126
i8 -66, label %126
i8 -67, label %126
i8 -68, label %126
i8 -69, label %126
i8 -70, label %126
i8 -71, label %126
i8 -42, label %126
i8 -43, label %126
i8 -44, label %126
i8 -45, label %126
i8 -46, label %126
i8 -47, label %126
i8 -48, label %126
i8 -49, label %126
i8 -50, label %126
i8 -51, label %126
i8 -53, label %126
i8 -54, label %126
i8 -55, label %126
i8 -56, label %126
i8 -57, label %126
i8 -58, label %126
i8 -59, label %126
i8 -60, label %126
i8 -61, label %126
i8 -62, label %126
i8 -64, label %126
i8 -65, label %126
i8 -87, label %129
i8 -88, label %129
i8 -99, label %129
i8 -110, label %129
i8 -113, label %129
i8 -114, label %129
i8 -115, label %129
i8 -116, label %129
i8 -117, label %129
i8 -118, label %129
i8 -89, label %129
i8 -90, label %129
i8 -91, label %129
i8 -92, label %129
i8 -93, label %129
i8 -94, label %129
i8 -95, label %129
i8 -96, label %129
i8 -97, label %129
i8 -98, label %129
i8 -100, label %129
i8 -101, label %129
i8 -102, label %129
i8 -103, label %129
i8 -104, label %129
i8 -105, label %129
i8 -106, label %129
i8 -107, label %129
i8 -108, label %129
i8 -109, label %129
i8 -111, label %129
i8 -112, label %129
i8 -86, label %177
i8 -78, label %175
i8 -127, label %171
i8 -6, label %132
i8 -9, label %132
i8 -10, label %132
i8 -11, label %132
i8 -12, label %132
i8 -13, label %132
i8 -14, label %132
i8 -30, label %167
i8 -83, label %161
i8 -15, label %151
i8 -35, label %145
i8 -119, label %139
i8 -8, label %132
i8 -7, label %132
i8 -5, label %132
i8 -4, label %132
i8 -3, label %132
i8 -2, label %132
i8 -1, label %132
]
14: ; preds = %8
%15 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1)
br label %202
16: ; preds = %8
%17 = getelementptr inbounds i8, ptr %10, i64 2
%18 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 1) #4
%19 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, i64 noundef %18)
br label %202
20: ; preds = %8
%21 = getelementptr inbounds i8, ptr %10, i64 2
%22 = call i64 @byte_get_signed(ptr noundef nonnull %11, i32 noundef 1) #4
%23 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.3, i64 noundef %22)
br label %202
24: ; preds = %8
%25 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 2) #4
%26 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.4, i64 noundef %25)
%27 = getelementptr inbounds i8, ptr %10, i64 3
br label %202
28: ; preds = %8
%29 = call i64 @byte_get_signed(ptr noundef nonnull %11, i32 noundef 2) #4
%30 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.5, i64 noundef %29)
%31 = getelementptr inbounds i8, ptr %10, i64 3
br label %202
32: ; preds = %8
%33 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 4) #4
%34 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.6, i64 noundef %33)
%35 = getelementptr inbounds i8, ptr %10, i64 5
br label %202
36: ; preds = %8
%37 = call i64 @byte_get_signed(ptr noundef nonnull %11, i32 noundef 4) #4
%38 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.7, i64 noundef %37)
%39 = getelementptr inbounds i8, ptr %10, i64 5
br label %202
40: ; preds = %8
%41 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 4) #4
%42 = getelementptr inbounds i8, ptr %10, i64 5
%43 = call i64 @byte_get(ptr noundef nonnull %42, i32 noundef 4) #4
%44 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.8, i64 noundef %41, i64 noundef %43)
%45 = getelementptr inbounds i8, ptr %10, i64 9
br label %202
46: ; preds = %8
%47 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 4) #4
%48 = getelementptr inbounds i8, ptr %10, i64 5
%49 = call i64 @byte_get(ptr noundef nonnull %48, i32 noundef 4) #4
%50 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.9, i64 noundef %47, i64 noundef %49)
%51 = getelementptr inbounds i8, ptr %10, i64 9
br label %202
52: ; preds = %8
%53 = call i64 @read_leb128(ptr noundef nonnull %11, ptr noundef nonnull %5, i32 noundef 0) #4
%54 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.10, i64 noundef %53)
%55 = load i32, ptr %5, align 4, !tbaa !9
%56 = zext i32 %55 to i64
%57 = getelementptr inbounds i8, ptr %11, i64 %56
br label %202
58: ; preds = %8
%59 = call i64 @read_leb128(ptr noundef nonnull %11, ptr noundef nonnull %5, i32 noundef 1) #4
%60 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.11, i64 noundef %59)
%61 = load i32, ptr %5, align 4, !tbaa !9
%62 = zext i32 %61 to i64
%63 = getelementptr inbounds i8, ptr %11, i64 %62
br label %202
64: ; preds = %8
%65 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.12)
br label %202
66: ; preds = %8
%67 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.13)
br label %202
68: ; preds = %8
%69 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.14)
br label %202
70: ; preds = %8
%71 = getelementptr inbounds i8, ptr %10, i64 2
%72 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 1) #4
%73 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.15, i64 noundef %72)
br label %202
74: ; preds = %8
%75 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.16)
br label %202
76: ; preds = %8
%77 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.17)
br label %202
78: ; preds = %8
%79 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18)
br label %202
80: ; preds = %8
%81 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.21)
br label %202
82: ; preds = %8
%83 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.22)
br label %202
84: ; preds = %8
%85 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.23)
br label %202
86: ; preds = %8
%87 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.24)
br label %202
88: ; preds = %8
%89 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.25)
br label %202
90: ; preds = %8
%91 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.26)
br label %202
92: ; preds = %8
%93 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.27)
br label %202
94: ; preds = %8
%95 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.28)
br label %202
96: ; preds = %8
%97 = call i64 @read_leb128(ptr noundef nonnull %11, ptr noundef nonnull %5, i32 noundef 0) #4
%98 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.29, i64 noundef %97)
%99 = load i32, ptr %5, align 4, !tbaa !9
%100 = zext i32 %99 to i64
%101 = getelementptr inbounds i8, ptr %11, i64 %100
br label %202
102: ; preds = %8
%103 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.30)
br label %202
104: ; preds = %8
%105 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.31)
br label %202
106: ; preds = %8
%107 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.32)
br label %202
108: ; preds = %8
%109 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.33)
br label %202
110: ; preds = %8
%111 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.35)
br label %202
112: ; preds = %8
%113 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.36)
br label %202
114: ; preds = %8
%115 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.37)
br label %202
116: ; preds = %8
%117 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.38)
br label %202
118: ; preds = %8
%119 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.39)
br label %202
120: ; preds = %8
%121 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.40)
br label %202
122: ; preds = %8
%123 = call i64 @byte_get_signed(ptr noundef nonnull %11, i32 noundef 2) #4
%124 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.41, i64 noundef %123)
%125 = getelementptr inbounds i8, ptr %10, i64 3
br label %202
126: ; preds = %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8
%127 = add nsw i32 %13, -216
%128 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.42, i32 noundef %127)
br label %202
129: ; preds = %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8
%130 = add nsw i32 %13, -169
%131 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.43, i32 noundef %130)
br label %202
132: ; preds = %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8, %8
%133 = add nuw nsw i32 %13, -273
%134 = call i64 @read_leb128(ptr noundef nonnull %11, ptr noundef nonnull %5, i32 noundef 1) #4
%135 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.44, i32 noundef %133, i64 noundef %134)
%136 = load i32, ptr %5, align 4, !tbaa !9
%137 = zext i32 %136 to i64
%138 = getelementptr inbounds i8, ptr %11, i64 %137
br label %202
139: ; preds = %8
%140 = call i64 @read_leb128(ptr noundef nonnull %11, ptr noundef nonnull %5, i32 noundef 0) #4
%141 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.45, i64 noundef %140)
%142 = load i32, ptr %5, align 4, !tbaa !9
%143 = zext i32 %142 to i64
%144 = getelementptr inbounds i8, ptr %11, i64 %143
br label %202
145: ; preds = %8
%146 = call i64 @read_leb128(ptr noundef nonnull %11, ptr noundef nonnull %5, i32 noundef 1) #4
%147 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.46, i64 noundef %146)
%148 = load i32, ptr %5, align 4, !tbaa !9
%149 = zext i32 %148 to i64
%150 = getelementptr inbounds i8, ptr %11, i64 %149
br label %202
151: ; preds = %8
%152 = call i64 @read_leb128(ptr noundef nonnull %11, ptr noundef nonnull %5, i32 noundef 0) #4
%153 = load i32, ptr %5, align 4, !tbaa !9
%154 = zext i32 %153 to i64
%155 = getelementptr inbounds i8, ptr %11, i64 %154
%156 = call i64 @read_leb128(ptr noundef nonnull %155, ptr noundef nonnull %5, i32 noundef 1) #4
%157 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.47, i64 noundef %152, i64 noundef %156)
%158 = load i32, ptr %5, align 4, !tbaa !9
%159 = zext i32 %158 to i64
%160 = getelementptr inbounds i8, ptr %155, i64 %159
br label %202
161: ; preds = %8
%162 = call i64 @read_leb128(ptr noundef nonnull %11, ptr noundef nonnull %5, i32 noundef 0) #4
%163 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.48, i64 noundef %162)
%164 = load i32, ptr %5, align 4, !tbaa !9
%165 = zext i32 %164 to i64
%166 = getelementptr inbounds i8, ptr %11, i64 %165
br label %202
167: ; preds = %8
%168 = getelementptr inbounds i8, ptr %10, i64 2
%169 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 1) #4
%170 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.49, i64 noundef %169)
br label %202
171: ; preds = %8
%172 = getelementptr inbounds i8, ptr %10, i64 2
%173 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 1) #4
%174 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.50, i64 noundef %173)
br label %202
175: ; preds = %8
%176 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.51)
br label %202
177: ; preds = %8
%178 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.52)
br label %202
179: ; preds = %8
%180 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 2) #4
%181 = add i64 %180, %3
%182 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.53, i64 noundef %181)
%183 = getelementptr inbounds i8, ptr %10, i64 3
br label %202
184: ; preds = %8
%185 = call i64 @byte_get(ptr noundef nonnull %11, i32 noundef 4) #4
%186 = add i64 %185, %3
%187 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.54, i64 noundef %186)
%188 = getelementptr inbounds i8, ptr %10, i64 5
br label %202
189: ; preds = %8
%190 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.55)
br label %202
191: ; preds = %8
%192 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.56)
br label %202
193: ; preds = %8
%194 = load i32, ptr @DW_OP_lo_user, align 4, !tbaa !9
%195 = icmp ugt i32 %194, %13
%196 = load i32, ptr @DW_OP_hi_user, align 4
%197 = icmp ult i32 %196, %13
%198 = select i1 %195, i1 true, i1 %197
%199 = select i1 %198, ptr @.str.59, ptr @.str.58
%200 = call ptr @_(ptr noundef nonnull %199) #4
%201 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) %200)
br label %208
202: ; preds = %191, %189, %184, %179, %177, %175, %171, %167, %161, %151, %145, %139, %132, %129, %126, %122, %120, %118, %116, %114, %112, %110, %108, %106, %104, %102, %96, %94, %92, %90, %88, %86, %84, %82, %80, %78, %76, %74, %70, %68, %66, %64, %58, %52, %46, %40, %36, %32, %28, %24, %20, %16, %14
%203 = phi ptr [ %11, %191 ], [ %11, %189 ], [ %188, %184 ], [ %183, %179 ], [ %11, %177 ], [ %11, %175 ], [ %172, %171 ], [ %168, %167 ], [ %166, %161 ], [ %160, %151 ], [ %150, %145 ], [ %144, %139 ], [ %138, %132 ], [ %11, %129 ], [ %11, %126 ], [ %125, %122 ], [ %11, %120 ], [ %11, %118 ], [ %11, %116 ], [ %11, %114 ], [ %11, %112 ], [ %11, %110 ], [ %11, %108 ], [ %11, %106 ], [ %11, %104 ], [ %11, %102 ], [ %101, %96 ], [ %11, %94 ], [ %11, %92 ], [ %11, %90 ], [ %11, %88 ], [ %11, %86 ], [ %11, %84 ], [ %11, %82 ], [ %11, %80 ], [ %11, %78 ], [ %11, %76 ], [ %11, %74 ], [ %71, %70 ], [ %11, %68 ], [ %11, %66 ], [ %11, %64 ], [ %63, %58 ], [ %57, %52 ], [ %51, %46 ], [ %45, %40 ], [ %39, %36 ], [ %35, %32 ], [ %31, %28 ], [ %27, %24 ], [ %21, %20 ], [ %17, %16 ], [ %11, %14 ]
%204 = phi i32 [ %9, %191 ], [ %9, %189 ], [ %9, %184 ], [ %9, %179 ], [ %9, %177 ], [ %9, %175 ], [ %9, %171 ], [ %9, %167 ], [ %9, %161 ], [ %9, %151 ], [ 1, %145 ], [ %9, %139 ], [ %9, %132 ], [ %9, %129 ], [ %9, %126 ], [ %9, %122 ], [ %9, %120 ], [ %9, %118 ], [ %9, %116 ], [ %9, %114 ], [ %9, %112 ], [ %9, %110 ], [ %9, %108 ], [ %9, %106 ], [ %9, %104 ], [ %9, %102 ], [ %9, %96 ], [ %9, %94 ], [ %9, %92 ], [ %9, %90 ], [ %9, %88 ], [ %9, %86 ], [ %9, %84 ], [ %9, %82 ], [ %9, %80 ], [ %9, %78 ], [ %9, %76 ], [ %9, %74 ], [ %9, %70 ], [ %9, %68 ], [ %9, %66 ], [ %9, %64 ], [ %9, %58 ], [ %9, %52 ], [ %9, %46 ], [ %9, %40 ], [ %9, %36 ], [ %9, %32 ], [ %9, %28 ], [ %9, %24 ], [ %9, %20 ], [ %9, %16 ], [ %9, %14 ]
%205 = icmp ult ptr %203, %6
br i1 %205, label %206, label %208
206: ; preds = %202
%207 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.60)
br label %8
208: ; preds = %202, %193, %4
%209 = phi i32 [ 0, %4 ], [ %9, %193 ], [ %204, %202 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #4
ret i32 %209
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2
declare i64 @byte_get(ptr noundef, i32 noundef) local_unnamed_addr #3
declare i64 @byte_get_signed(ptr noundef, i32 noundef) local_unnamed_addr #3
declare i64 @read_leb128(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
declare ptr @_(ptr noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| freebsd_contrib_binutils_binutils_extr_dwarf.c_decode_location_expression |
; ModuleID = 'AnghaBench/postgres/src/backend/executor/extr_execMain.c_standard_ExecutorRun.c'
source_filename = "AnghaBench/postgres/src/backend/executor/extr_execMain.c_standard_ExecutorRun.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_11__ = type { i64, i32, i64, ptr, i32, i32, ptr, ptr }
%struct.TYPE_12__ = type { i32, i64, i32 }
%struct.TYPE_10__ = type { i32, i64 }
%struct.TYPE_13__ = type { ptr, ptr }
@EXEC_FLAG_EXPLAIN_ONLY = dso_local local_unnamed_addr global i32 0, align 4
@CMD_SELECT = dso_local local_unnamed_addr global i64 0, align 8
@ERROR = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [52 x i8] c"can't re-execute query flagged for single execution\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @standard_ExecutorRun(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = icmp ne ptr %0, null
%6 = zext i1 %5 to i32
%7 = tail call i32 @Assert(i32 noundef %6) #2
%8 = getelementptr inbounds %struct.TYPE_11__, ptr %0, i64 0, i32 7
%9 = load ptr, ptr %8, align 8, !tbaa !5
%10 = icmp ne ptr %9, null
%11 = zext i1 %10 to i32
%12 = tail call i32 @Assert(i32 noundef %11) #2
%13 = load i32, ptr %9, align 8, !tbaa !12
%14 = load i32, ptr @EXEC_FLAG_EXPLAIN_ONLY, align 4, !tbaa !14
%15 = and i32 %14, %13
%16 = icmp eq i32 %15, 0
%17 = zext i1 %16 to i32
%18 = tail call i32 @Assert(i32 noundef %17) #2
%19 = getelementptr inbounds %struct.TYPE_12__, ptr %9, i64 0, i32 2
%20 = load i32, ptr %19, align 8, !tbaa !15
%21 = tail call i32 @MemoryContextSwitchTo(i32 noundef %20) #2
%22 = getelementptr inbounds %struct.TYPE_11__, ptr %0, i64 0, i32 2
%23 = load i64, ptr %22, align 8, !tbaa !16
%24 = icmp eq i64 %23, 0
br i1 %24, label %27, label %25
25: ; preds = %4
%26 = tail call i32 @InstrStartNode(i64 noundef %23) #2
br label %27
27: ; preds = %25, %4
%28 = load i64, ptr %0, align 8, !tbaa !17
%29 = getelementptr inbounds %struct.TYPE_11__, ptr %0, i64 0, i32 6
%30 = load ptr, ptr %29, align 8, !tbaa !18
%31 = getelementptr inbounds %struct.TYPE_12__, ptr %9, i64 0, i32 1
store i64 0, ptr %31, align 8, !tbaa !19
%32 = load i64, ptr @CMD_SELECT, align 8, !tbaa !20
%33 = icmp eq i64 %28, %32
br i1 %33, label %40, label %34
34: ; preds = %27
%35 = getelementptr inbounds %struct.TYPE_11__, ptr %0, i64 0, i32 3
%36 = load ptr, ptr %35, align 8, !tbaa !21
%37 = getelementptr inbounds %struct.TYPE_10__, ptr %36, i64 0, i32 1
%38 = load i64, ptr %37, align 8, !tbaa !22
%39 = icmp eq i64 %38, 0
br i1 %39, label %46, label %40
40: ; preds = %27, %34
%41 = getelementptr inbounds %struct.TYPE_13__, ptr %30, i64 0, i32 1
%42 = load ptr, ptr %41, align 8, !tbaa !24
%43 = getelementptr inbounds %struct.TYPE_11__, ptr %0, i64 0, i32 5
%44 = load i32, ptr %43, align 4, !tbaa !26
%45 = tail call i32 %42(ptr noundef %30, i64 noundef %28, i32 noundef %44) #2
br label %46
46: ; preds = %40, %34
%47 = phi i32 [ 1, %40 ], [ 0, %34 ]
%48 = phi i1 [ true, %40 ], [ false, %34 ]
%49 = tail call i32 @ScanDirectionIsNoMovement(i32 noundef %1) #2
%50 = icmp eq i32 %49, 0
br i1 %50, label %51, label %68
51: ; preds = %46
%52 = icmp eq i32 %3, 0
br i1 %52, label %60, label %53
53: ; preds = %51
%54 = getelementptr inbounds %struct.TYPE_11__, ptr %0, i64 0, i32 1
%55 = load i32, ptr %54, align 8, !tbaa !27
%56 = icmp eq i32 %55, 0
br i1 %56, label %60, label %57
57: ; preds = %53
%58 = load i32, ptr @ERROR, align 4, !tbaa !14
%59 = tail call i32 @elog(i32 noundef %58, ptr noundef nonnull @.str) #2
br label %60
60: ; preds = %57, %53, %51
%61 = getelementptr inbounds %struct.TYPE_11__, ptr %0, i64 0, i32 1
store i32 1, ptr %61, align 8, !tbaa !27
%62 = getelementptr inbounds %struct.TYPE_11__, ptr %0, i64 0, i32 4
%63 = load i32, ptr %62, align 8, !tbaa !28
%64 = getelementptr inbounds %struct.TYPE_11__, ptr %0, i64 0, i32 3
%65 = load ptr, ptr %64, align 8, !tbaa !21
%66 = load i32, ptr %65, align 8, !tbaa !29
%67 = tail call i32 @ExecutePlan(ptr noundef nonnull %9, i32 noundef %63, i32 noundef %66, i64 noundef %28, i32 noundef %47, i32 noundef %2, i32 noundef %1, ptr noundef %30, i32 noundef %3) #2
br label %68
68: ; preds = %60, %46
br i1 %48, label %69, label %72
69: ; preds = %68
%70 = load ptr, ptr %30, align 8, !tbaa !30
%71 = tail call i32 %70(ptr noundef nonnull %30) #2
br label %72
72: ; preds = %69, %68
%73 = load i64, ptr %22, align 8, !tbaa !16
%74 = icmp eq i64 %73, 0
br i1 %74, label %78, label %75
75: ; preds = %72
%76 = load i64, ptr %31, align 8, !tbaa !19
%77 = tail call i32 @InstrStopNode(i64 noundef %73, i64 noundef %76) #2
br label %78
78: ; preds = %75, %72
%79 = tail call i32 @MemoryContextSwitchTo(i32 noundef %21) #2
ret void
}
declare i32 @Assert(i32 noundef) local_unnamed_addr #1
declare i32 @MemoryContextSwitchTo(i32 noundef) local_unnamed_addr #1
declare i32 @InstrStartNode(i64 noundef) local_unnamed_addr #1
declare i32 @ScanDirectionIsNoMovement(i32 noundef) local_unnamed_addr #1
declare i32 @elog(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ExecutePlan(ptr noundef, i32 noundef, i32 noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @InstrStopNode(i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 48}
!6 = !{!"TYPE_11__", !7, i64 0, !10, i64 8, !7, i64 16, !11, i64 24, !10, i64 32, !10, i64 36, !11, i64 40, !11, i64 48}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !10, i64 0}
!13 = !{!"TYPE_12__", !10, i64 0, !7, i64 8, !10, i64 16}
!14 = !{!10, !10, i64 0}
!15 = !{!13, !10, i64 16}
!16 = !{!6, !7, i64 16}
!17 = !{!6, !7, i64 0}
!18 = !{!6, !11, i64 40}
!19 = !{!13, !7, i64 8}
!20 = !{!7, !7, i64 0}
!21 = !{!6, !11, i64 24}
!22 = !{!23, !7, i64 8}
!23 = !{!"TYPE_10__", !10, i64 0, !7, i64 8}
!24 = !{!25, !11, i64 8}
!25 = !{!"TYPE_13__", !11, i64 0, !11, i64 8}
!26 = !{!6, !10, i64 36}
!27 = !{!6, !10, i64 8}
!28 = !{!6, !10, i64 32}
!29 = !{!23, !10, i64 0}
!30 = !{!25, !11, i64 0}
| ; ModuleID = 'AnghaBench/postgres/src/backend/executor/extr_execMain.c_standard_ExecutorRun.c'
source_filename = "AnghaBench/postgres/src/backend/executor/extr_execMain.c_standard_ExecutorRun.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EXEC_FLAG_EXPLAIN_ONLY = common local_unnamed_addr global i32 0, align 4
@CMD_SELECT = common local_unnamed_addr global i64 0, align 8
@ERROR = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [52 x i8] c"can't re-execute query flagged for single execution\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @standard_ExecutorRun(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = icmp ne ptr %0, null
%6 = zext i1 %5 to i32
%7 = tail call i32 @Assert(i32 noundef %6) #2
%8 = getelementptr inbounds i8, ptr %0, i64 48
%9 = load ptr, ptr %8, align 8, !tbaa !6
%10 = icmp ne ptr %9, null
%11 = zext i1 %10 to i32
%12 = tail call i32 @Assert(i32 noundef %11) #2
%13 = load i32, ptr %9, align 8, !tbaa !13
%14 = load i32, ptr @EXEC_FLAG_EXPLAIN_ONLY, align 4, !tbaa !15
%15 = and i32 %14, %13
%16 = icmp eq i32 %15, 0
%17 = zext i1 %16 to i32
%18 = tail call i32 @Assert(i32 noundef %17) #2
%19 = getelementptr inbounds i8, ptr %9, i64 16
%20 = load i32, ptr %19, align 8, !tbaa !16
%21 = tail call i32 @MemoryContextSwitchTo(i32 noundef %20) #2
%22 = getelementptr inbounds i8, ptr %0, i64 16
%23 = load i64, ptr %22, align 8, !tbaa !17
%24 = icmp eq i64 %23, 0
br i1 %24, label %27, label %25
25: ; preds = %4
%26 = tail call i32 @InstrStartNode(i64 noundef %23) #2
br label %27
27: ; preds = %25, %4
%28 = load i64, ptr %0, align 8, !tbaa !18
%29 = getelementptr inbounds i8, ptr %0, i64 40
%30 = load ptr, ptr %29, align 8, !tbaa !19
%31 = getelementptr inbounds i8, ptr %9, i64 8
store i64 0, ptr %31, align 8, !tbaa !20
%32 = load i64, ptr @CMD_SELECT, align 8, !tbaa !21
%33 = icmp eq i64 %28, %32
br i1 %33, label %40, label %34
34: ; preds = %27
%35 = getelementptr inbounds i8, ptr %0, i64 24
%36 = load ptr, ptr %35, align 8, !tbaa !22
%37 = getelementptr inbounds i8, ptr %36, i64 8
%38 = load i64, ptr %37, align 8, !tbaa !23
%39 = icmp eq i64 %38, 0
br i1 %39, label %46, label %40
40: ; preds = %27, %34
%41 = getelementptr inbounds i8, ptr %30, i64 8
%42 = load ptr, ptr %41, align 8, !tbaa !25
%43 = getelementptr inbounds i8, ptr %0, i64 36
%44 = load i32, ptr %43, align 4, !tbaa !27
%45 = tail call i32 %42(ptr noundef %30, i64 noundef %28, i32 noundef %44) #2
br label %46
46: ; preds = %40, %34
%47 = phi i32 [ 1, %40 ], [ 0, %34 ]
%48 = phi i1 [ true, %40 ], [ false, %34 ]
%49 = tail call i32 @ScanDirectionIsNoMovement(i32 noundef %1) #2
%50 = icmp eq i32 %49, 0
br i1 %50, label %51, label %68
51: ; preds = %46
%52 = icmp eq i32 %3, 0
br i1 %52, label %60, label %53
53: ; preds = %51
%54 = getelementptr inbounds i8, ptr %0, i64 8
%55 = load i32, ptr %54, align 8, !tbaa !28
%56 = icmp eq i32 %55, 0
br i1 %56, label %60, label %57
57: ; preds = %53
%58 = load i32, ptr @ERROR, align 4, !tbaa !15
%59 = tail call i32 @elog(i32 noundef %58, ptr noundef nonnull @.str) #2
br label %60
60: ; preds = %57, %53, %51
%61 = getelementptr inbounds i8, ptr %0, i64 8
store i32 1, ptr %61, align 8, !tbaa !28
%62 = getelementptr inbounds i8, ptr %0, i64 32
%63 = load i32, ptr %62, align 8, !tbaa !29
%64 = getelementptr inbounds i8, ptr %0, i64 24
%65 = load ptr, ptr %64, align 8, !tbaa !22
%66 = load i32, ptr %65, align 8, !tbaa !30
%67 = tail call i32 @ExecutePlan(ptr noundef nonnull %9, i32 noundef %63, i32 noundef %66, i64 noundef %28, i32 noundef %47, i32 noundef %2, i32 noundef %1, ptr noundef %30, i32 noundef %3) #2
br label %68
68: ; preds = %60, %46
br i1 %48, label %69, label %72
69: ; preds = %68
%70 = load ptr, ptr %30, align 8, !tbaa !31
%71 = tail call i32 %70(ptr noundef nonnull %30) #2
br label %72
72: ; preds = %69, %68
%73 = load i64, ptr %22, align 8, !tbaa !17
%74 = icmp eq i64 %73, 0
br i1 %74, label %78, label %75
75: ; preds = %72
%76 = load i64, ptr %31, align 8, !tbaa !20
%77 = tail call i32 @InstrStopNode(i64 noundef %73, i64 noundef %76) #2
br label %78
78: ; preds = %75, %72
%79 = tail call i32 @MemoryContextSwitchTo(i32 noundef %21) #2
ret void
}
declare i32 @Assert(i32 noundef) local_unnamed_addr #1
declare i32 @MemoryContextSwitchTo(i32 noundef) local_unnamed_addr #1
declare i32 @InstrStartNode(i64 noundef) local_unnamed_addr #1
declare i32 @ScanDirectionIsNoMovement(i32 noundef) local_unnamed_addr #1
declare i32 @elog(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ExecutePlan(ptr noundef, i32 noundef, i32 noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @InstrStopNode(i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 48}
!7 = !{!"TYPE_11__", !8, i64 0, !11, i64 8, !8, i64 16, !12, i64 24, !11, i64 32, !11, i64 36, !12, i64 40, !12, i64 48}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"TYPE_12__", !11, i64 0, !8, i64 8, !11, i64 16}
!15 = !{!11, !11, i64 0}
!16 = !{!14, !11, i64 16}
!17 = !{!7, !8, i64 16}
!18 = !{!7, !8, i64 0}
!19 = !{!7, !12, i64 40}
!20 = !{!14, !8, i64 8}
!21 = !{!8, !8, i64 0}
!22 = !{!7, !12, i64 24}
!23 = !{!24, !8, i64 8}
!24 = !{!"TYPE_10__", !11, i64 0, !8, i64 8}
!25 = !{!26, !12, i64 8}
!26 = !{!"TYPE_13__", !12, i64 0, !12, i64 8}
!27 = !{!7, !11, i64 36}
!28 = !{!7, !11, i64 8}
!29 = !{!7, !11, i64 32}
!30 = !{!24, !11, i64 0}
!31 = !{!26, !12, i64 0}
| postgres_src_backend_executor_extr_execMain.c_standard_ExecutorRun |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/marvell/mvpp2/extr_mvpp2_main.c_mvpp22_gop_setup_irq.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/marvell/mvpp2/extr_mvpp2_main.c_mvpp22_gop_setup_irq.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mvpp2_port = type { i64, i64, i64, i64 }
@PHY_INTERFACE_MODE_SGMII = dso_local local_unnamed_addr global i64 0, align 8
@MVPP22_GMAC_INT_MASK = dso_local local_unnamed_addr global i64 0, align 8
@MVPP22_GMAC_INT_MASK_LINK_STAT = dso_local local_unnamed_addr global i32 0, align 4
@MVPP22_XLG_INT_MASK = dso_local local_unnamed_addr global i64 0, align 8
@MVPP22_XLG_INT_MASK_LINK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @mvpp22_gop_setup_irq], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @mvpp22_gop_setup_irq(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.mvpp2_port, ptr %0, i64 0, i32 3
%3 = load i64, ptr %2, align 8, !tbaa !5
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %17
5: ; preds = %1
%6 = load i64, ptr %0, align 8, !tbaa !10
%7 = tail call i64 @phy_interface_mode_is_rgmii(i64 noundef %6) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %5
%10 = load i64, ptr %0, align 8, !tbaa !10
%11 = tail call i64 @phy_interface_mode_is_8023z(i64 noundef %10) #2
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %9
%14 = load i64, ptr %0, align 8, !tbaa !10
%15 = load i64, ptr @PHY_INTERFACE_MODE_SGMII, align 8, !tbaa !11
%16 = icmp eq i64 %14, %15
br i1 %16, label %17, label %29
17: ; preds = %13, %9, %5, %1
%18 = getelementptr inbounds %struct.mvpp2_port, ptr %0, i64 0, i32 2
%19 = load i64, ptr %18, align 8, !tbaa !12
%20 = load i64, ptr @MVPP22_GMAC_INT_MASK, align 8, !tbaa !11
%21 = add nsw i64 %20, %19
%22 = tail call i32 @readl(i64 noundef %21) #2
%23 = load i32, ptr @MVPP22_GMAC_INT_MASK_LINK_STAT, align 4, !tbaa !13
%24 = or i32 %23, %22
%25 = load i64, ptr %18, align 8, !tbaa !12
%26 = load i64, ptr @MVPP22_GMAC_INT_MASK, align 8, !tbaa !11
%27 = add nsw i64 %26, %25
%28 = tail call i32 @writel(i32 noundef %24, i64 noundef %27) #2
br label %29
29: ; preds = %17, %13
%30 = getelementptr inbounds %struct.mvpp2_port, ptr %0, i64 0, i32 1
%31 = load i64, ptr %30, align 8, !tbaa !15
%32 = icmp eq i64 %31, 0
br i1 %32, label %33, label %45
33: ; preds = %29
%34 = getelementptr inbounds %struct.mvpp2_port, ptr %0, i64 0, i32 2
%35 = load i64, ptr %34, align 8, !tbaa !12
%36 = load i64, ptr @MVPP22_XLG_INT_MASK, align 8, !tbaa !11
%37 = add nsw i64 %36, %35
%38 = tail call i32 @readl(i64 noundef %37) #2
%39 = load i32, ptr @MVPP22_XLG_INT_MASK_LINK, align 4, !tbaa !13
%40 = or i32 %39, %38
%41 = load i64, ptr %34, align 8, !tbaa !12
%42 = load i64, ptr @MVPP22_XLG_INT_MASK, align 8, !tbaa !11
%43 = add nsw i64 %42, %41
%44 = tail call i32 @writel(i32 noundef %40, i64 noundef %43) #2
br label %45
45: ; preds = %33, %29
%46 = tail call i32 @mvpp22_gop_unmask_irq(ptr noundef nonnull %0) #2
ret void
}
declare i64 @phy_interface_mode_is_rgmii(i64 noundef) local_unnamed_addr #1
declare i64 @phy_interface_mode_is_8023z(i64 noundef) local_unnamed_addr #1
declare i32 @readl(i64 noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @mvpp22_gop_unmask_irq(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 24}
!6 = !{!"mvpp2_port", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !7, i64 16}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !8, i64 0}
!15 = !{!6, !7, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/marvell/mvpp2/extr_mvpp2_main.c_mvpp22_gop_setup_irq.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/marvell/mvpp2/extr_mvpp2_main.c_mvpp22_gop_setup_irq.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PHY_INTERFACE_MODE_SGMII = common local_unnamed_addr global i64 0, align 8
@MVPP22_GMAC_INT_MASK = common local_unnamed_addr global i64 0, align 8
@MVPP22_GMAC_INT_MASK_LINK_STAT = common local_unnamed_addr global i32 0, align 4
@MVPP22_XLG_INT_MASK = common local_unnamed_addr global i64 0, align 8
@MVPP22_XLG_INT_MASK_LINK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mvpp22_gop_setup_irq], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @mvpp22_gop_setup_irq(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 24
%3 = load i64, ptr %2, align 8, !tbaa !6
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %17
5: ; preds = %1
%6 = load i64, ptr %0, align 8, !tbaa !11
%7 = tail call i64 @phy_interface_mode_is_rgmii(i64 noundef %6) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %5
%10 = load i64, ptr %0, align 8, !tbaa !11
%11 = tail call i64 @phy_interface_mode_is_8023z(i64 noundef %10) #2
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %9
%14 = load i64, ptr %0, align 8, !tbaa !11
%15 = load i64, ptr @PHY_INTERFACE_MODE_SGMII, align 8, !tbaa !12
%16 = icmp eq i64 %14, %15
br i1 %16, label %17, label %29
17: ; preds = %13, %9, %5, %1
%18 = getelementptr inbounds i8, ptr %0, i64 16
%19 = load i64, ptr %18, align 8, !tbaa !13
%20 = load i64, ptr @MVPP22_GMAC_INT_MASK, align 8, !tbaa !12
%21 = add nsw i64 %20, %19
%22 = tail call i32 @readl(i64 noundef %21) #2
%23 = load i32, ptr @MVPP22_GMAC_INT_MASK_LINK_STAT, align 4, !tbaa !14
%24 = or i32 %23, %22
%25 = load i64, ptr %18, align 8, !tbaa !13
%26 = load i64, ptr @MVPP22_GMAC_INT_MASK, align 8, !tbaa !12
%27 = add nsw i64 %26, %25
%28 = tail call i32 @writel(i32 noundef %24, i64 noundef %27) #2
br label %29
29: ; preds = %17, %13
%30 = getelementptr inbounds i8, ptr %0, i64 8
%31 = load i64, ptr %30, align 8, !tbaa !16
%32 = icmp eq i64 %31, 0
br i1 %32, label %33, label %45
33: ; preds = %29
%34 = getelementptr inbounds i8, ptr %0, i64 16
%35 = load i64, ptr %34, align 8, !tbaa !13
%36 = load i64, ptr @MVPP22_XLG_INT_MASK, align 8, !tbaa !12
%37 = add nsw i64 %36, %35
%38 = tail call i32 @readl(i64 noundef %37) #2
%39 = load i32, ptr @MVPP22_XLG_INT_MASK_LINK, align 4, !tbaa !14
%40 = or i32 %39, %38
%41 = load i64, ptr %34, align 8, !tbaa !13
%42 = load i64, ptr @MVPP22_XLG_INT_MASK, align 8, !tbaa !12
%43 = add nsw i64 %42, %41
%44 = tail call i32 @writel(i32 noundef %40, i64 noundef %43) #2
br label %45
45: ; preds = %33, %29
%46 = tail call i32 @mvpp22_gop_unmask_irq(ptr noundef nonnull %0) #2
ret void
}
declare i64 @phy_interface_mode_is_rgmii(i64 noundef) local_unnamed_addr #1
declare i64 @phy_interface_mode_is_8023z(i64 noundef) local_unnamed_addr #1
declare i32 @readl(i64 noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @mvpp22_gop_unmask_irq(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 24}
!7 = !{!"mvpp2_port", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !8, i64 16}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !9, i64 0}
!16 = !{!7, !8, i64 8}
| linux_drivers_net_ethernet_marvell_mvpp2_extr_mvpp2_main.c_mvpp22_gop_setup_irq |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/cio/extr_cmf.c_free_cmb.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/cio/extr_cmf.c_free_cmb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, i32, ptr, i32 }
%struct.ccw_device = type { i32, ptr }
%struct.ccw_device_private = type { i32, ptr }
@cmb_area = dso_local global %struct.TYPE_2__ zeroinitializer, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @free_cmb], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @free_cmb(ptr nocapture noundef readonly %0) #0 {
%2 = tail call i32 @spin_lock(ptr noundef nonnull getelementptr inbounds (%struct.TYPE_2__, ptr @cmb_area, i64 0, i32 1)) #2
%3 = load i32, ptr %0, align 8, !tbaa !5
%4 = tail call i32 @spin_lock_irq(i32 noundef %3) #2
%5 = getelementptr inbounds %struct.ccw_device, ptr %0, i64 0, i32 1
%6 = load ptr, ptr %5, align 8, !tbaa !11
%7 = tail call i64 @list_empty(ptr noundef %6) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %29
9: ; preds = %1
%10 = getelementptr inbounds %struct.ccw_device_private, ptr %6, i64 0, i32 1
%11 = load ptr, ptr %10, align 8, !tbaa !12
store ptr null, ptr %10, align 8, !tbaa !12
%12 = icmp eq ptr %11, null
br i1 %12, label %16, label %13
13: ; preds = %9
%14 = load ptr, ptr %11, align 8, !tbaa !14
%15 = tail call i32 @kfree(ptr noundef %14) #2
br label %16
16: ; preds = %13, %9
%17 = tail call i32 @kfree(ptr noundef %11) #2
%18 = tail call i32 @list_del_init(ptr noundef nonnull %6) #2
%19 = tail call i64 @list_empty(ptr noundef nonnull getelementptr inbounds (%struct.TYPE_2__, ptr @cmb_area, i64 0, i32 3)) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %29, label %21
21: ; preds = %16
%22 = load i32, ptr @cmb_area, align 8, !tbaa !16
%23 = shl i32 %22, 2
%24 = tail call i32 @cmf_activate(ptr noundef null, i32 noundef 0) #2
%25 = load ptr, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @cmb_area, i64 0, i32 2), align 8, !tbaa !18
%26 = ptrtoint ptr %25 to i64
%27 = tail call i32 @get_order(i32 noundef %23) #2
%28 = tail call i32 @free_pages(i64 noundef %26, i32 noundef %27) #2
store ptr null, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @cmb_area, i64 0, i32 2), align 8, !tbaa !18
br label %29
29: ; preds = %16, %21, %1
%30 = load i32, ptr %0, align 8, !tbaa !5
%31 = tail call i32 @spin_unlock_irq(i32 noundef %30) #2
%32 = tail call i32 @spin_unlock(ptr noundef nonnull getelementptr inbounds (%struct.TYPE_2__, ptr @cmb_area, i64 0, i32 1)) #2
ret void
}
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irq(i32 noundef) local_unnamed_addr #1
declare i64 @list_empty(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
declare i32 @list_del_init(ptr noundef) local_unnamed_addr #1
declare i32 @cmf_activate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @free_pages(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @get_order(i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irq(i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ccw_device", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!13, !10, i64 8}
!13 = !{!"ccw_device_private", !7, i64 0, !10, i64 8}
!14 = !{!15, !10, i64 0}
!15 = !{!"cmb_data", !10, i64 0}
!16 = !{!17, !7, i64 0}
!17 = !{!"TYPE_2__", !7, i64 0, !7, i64 4, !10, i64 8, !7, i64 16}
!18 = !{!17, !10, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/cio/extr_cmf.c_free_cmb.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/cio/extr_cmf.c_free_cmb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32, i32, ptr, i32 }
@cmb_area = common global %struct.TYPE_2__ zeroinitializer, align 8
@llvm.used = appending global [1 x ptr] [ptr @free_cmb], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @free_cmb(ptr nocapture noundef readonly %0) #0 {
%2 = tail call i32 @spin_lock(ptr noundef nonnull getelementptr inbounds (i8, ptr @cmb_area, i64 4)) #2
%3 = load i32, ptr %0, align 8, !tbaa !6
%4 = tail call i32 @spin_lock_irq(i32 noundef %3) #2
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !12
%7 = tail call i64 @list_empty(ptr noundef %6) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %29
9: ; preds = %1
%10 = getelementptr inbounds i8, ptr %6, i64 8
%11 = load ptr, ptr %10, align 8, !tbaa !13
store ptr null, ptr %10, align 8, !tbaa !13
%12 = icmp eq ptr %11, null
br i1 %12, label %16, label %13
13: ; preds = %9
%14 = load ptr, ptr %11, align 8, !tbaa !15
%15 = tail call i32 @kfree(ptr noundef %14) #2
br label %16
16: ; preds = %13, %9
%17 = tail call i32 @kfree(ptr noundef %11) #2
%18 = tail call i32 @list_del_init(ptr noundef nonnull %6) #2
%19 = tail call i64 @list_empty(ptr noundef nonnull getelementptr inbounds (i8, ptr @cmb_area, i64 16)) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %29, label %21
21: ; preds = %16
%22 = load i32, ptr @cmb_area, align 8, !tbaa !17
%23 = shl i32 %22, 2
%24 = tail call i32 @cmf_activate(ptr noundef null, i32 noundef 0) #2
%25 = load ptr, ptr getelementptr inbounds (i8, ptr @cmb_area, i64 8), align 8, !tbaa !19
%26 = ptrtoint ptr %25 to i64
%27 = tail call i32 @get_order(i32 noundef %23) #2
%28 = tail call i32 @free_pages(i64 noundef %26, i32 noundef %27) #2
store ptr null, ptr getelementptr inbounds (i8, ptr @cmb_area, i64 8), align 8, !tbaa !19
br label %29
29: ; preds = %16, %21, %1
%30 = load i32, ptr %0, align 8, !tbaa !6
%31 = tail call i32 @spin_unlock_irq(i32 noundef %30) #2
%32 = tail call i32 @spin_unlock(ptr noundef nonnull getelementptr inbounds (i8, ptr @cmb_area, i64 4)) #2
ret void
}
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irq(i32 noundef) local_unnamed_addr #1
declare i64 @list_empty(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
declare i32 @list_del_init(ptr noundef) local_unnamed_addr #1
declare i32 @cmf_activate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @free_pages(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @get_order(i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irq(i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ccw_device", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!14, !11, i64 8}
!14 = !{!"ccw_device_private", !8, i64 0, !11, i64 8}
!15 = !{!16, !11, i64 0}
!16 = !{!"cmb_data", !11, i64 0}
!17 = !{!18, !8, i64 0}
!18 = !{!"TYPE_2__", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16}
!19 = !{!18, !11, i64 8}
| fastsocket_kernel_drivers_s390_cio_extr_cmf.c_free_cmb |
; ModuleID = 'AnghaBench/esp-idf/components/bt/esp_ble_mesh/mesh_core/nimble_host/extr_mesh_bearer_adapt.c_bt_le_scan_start.c'
source_filename = "AnghaBench/esp-idf/components/bt/esp_ble_mesh/mesh_core/nimble_host/extr_mesh_bearer_adapt.c_bt_le_scan_start.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32 }
%struct.bt_mesh_scan_param = type { i64, i32, i32, i32 }
@bt_mesh_scan_dev_found_cb = dso_local local_unnamed_addr global i32 0, align 4
@BLE_MESH_DEV_SCANNING = dso_local local_unnamed_addr global i32 0, align 4
@BLE_MESH_DEV_SCAN_FILTER_DUP = dso_local local_unnamed_addr global i32 0, align 4
@EALREADY = dso_local local_unnamed_addr global i32 0, align 4
@bt_mesh_dev = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @bt_le_scan_start(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds %struct.bt_mesh_scan_param, ptr %0, i64 0, i32 3
%4 = load i32, ptr %3, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.bt_mesh_scan_param, ptr %0, i64 0, i32 2
%6 = load i32, ptr %5, align 4, !tbaa !11
%7 = getelementptr inbounds %struct.bt_mesh_scan_param, ptr %0, i64 0, i32 1
%8 = load i32, ptr %7, align 8, !tbaa !12
%9 = load i64, ptr %0, align 8, !tbaa !13
%10 = tail call i32 @start_le_scan(i32 noundef %4, i32 noundef %6, i32 noundef %8, i64 noundef %9) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %2
store i32 %1, ptr @bt_mesh_scan_dev_found_cb, align 4, !tbaa !14
br label %13
13: ; preds = %2, %12
ret i32 %10
}
declare i32 @start_le_scan(i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"bt_mesh_scan_param", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !10, i64 12}
!12 = !{!6, !10, i64 8}
!13 = !{!6, !7, i64 0}
!14 = !{!10, !10, i64 0}
| ; ModuleID = 'AnghaBench/esp-idf/components/bt/esp_ble_mesh/mesh_core/nimble_host/extr_mesh_bearer_adapt.c_bt_le_scan_start.c'
source_filename = "AnghaBench/esp-idf/components/bt/esp_ble_mesh/mesh_core/nimble_host/extr_mesh_bearer_adapt.c_bt_le_scan_start.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32 }
@bt_mesh_scan_dev_found_cb = common local_unnamed_addr global i32 0, align 4
@BLE_MESH_DEV_SCANNING = common local_unnamed_addr global i32 0, align 4
@BLE_MESH_DEV_SCAN_FILTER_DUP = common local_unnamed_addr global i32 0, align 4
@EALREADY = common local_unnamed_addr global i32 0, align 4
@bt_mesh_dev = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @bt_le_scan_start(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 16
%4 = load i32, ptr %3, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %0, i64 12
%6 = load i32, ptr %5, align 4, !tbaa !12
%7 = getelementptr inbounds i8, ptr %0, i64 8
%8 = load i32, ptr %7, align 8, !tbaa !13
%9 = load i64, ptr %0, align 8, !tbaa !14
%10 = tail call i32 @start_le_scan(i32 noundef %4, i32 noundef %6, i32 noundef %8, i64 noundef %9) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %2
store i32 %1, ptr @bt_mesh_scan_dev_found_cb, align 4, !tbaa !15
br label %13
13: ; preds = %2, %12
ret i32 %10
}
declare i32 @start_le_scan(i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"bt_mesh_scan_param", !8, i64 0, !11, i64 8, !11, i64 12, !11, i64 16}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !11, i64 12}
!13 = !{!7, !11, i64 8}
!14 = !{!7, !8, i64 0}
!15 = !{!11, !11, i64 0}
| esp-idf_components_bt_esp_ble_mesh_mesh_core_nimble_host_extr_mesh_bearer_adapt.c_bt_le_scan_start |
; ModuleID = 'AnghaBench/openssl/crypto/bn/extr_bn_print.c_BN_print_fp.c'
source_filename = "AnghaBench/openssl/crypto/bn/extr_bn_print.c_BN_print_fp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@BIO_NOCLOSE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @BN_print_fp(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 (...) @BIO_s_file() #2
%4 = tail call ptr @BIO_new(i32 noundef %3) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %11, label %6
6: ; preds = %2
%7 = load i32, ptr @BIO_NOCLOSE, align 4, !tbaa !5
%8 = tail call i32 @BIO_set_fp(ptr noundef nonnull %4, ptr noundef %0, i32 noundef %7) #2
%9 = tail call i32 @BN_print(ptr noundef nonnull %4, ptr noundef %1) #2
%10 = tail call i32 @BIO_free(ptr noundef nonnull %4) #2
br label %11
11: ; preds = %2, %6
%12 = phi i32 [ %9, %6 ], [ 0, %2 ]
ret i32 %12
}
declare ptr @BIO_new(i32 noundef) local_unnamed_addr #1
declare i32 @BIO_s_file(...) local_unnamed_addr #1
declare i32 @BIO_set_fp(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BN_print(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @BIO_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/openssl/crypto/bn/extr_bn_print.c_BN_print_fp.c'
source_filename = "AnghaBench/openssl/crypto/bn/extr_bn_print.c_BN_print_fp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BIO_NOCLOSE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @BN_print_fp(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @BIO_s_file() #2
%4 = tail call ptr @BIO_new(i32 noundef %3) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %11, label %6
6: ; preds = %2
%7 = load i32, ptr @BIO_NOCLOSE, align 4, !tbaa !6
%8 = tail call i32 @BIO_set_fp(ptr noundef nonnull %4, ptr noundef %0, i32 noundef %7) #2
%9 = tail call i32 @BN_print(ptr noundef nonnull %4, ptr noundef %1) #2
%10 = tail call i32 @BIO_free(ptr noundef nonnull %4) #2
br label %11
11: ; preds = %2, %6
%12 = phi i32 [ %9, %6 ], [ 0, %2 ]
ret i32 %12
}
declare ptr @BIO_new(i32 noundef) local_unnamed_addr #1
declare i32 @BIO_s_file(...) local_unnamed_addr #1
declare i32 @BIO_set_fp(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BN_print(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @BIO_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| openssl_crypto_bn_extr_bn_print.c_BN_print_fp |
; ModuleID = 'AnghaBench/libgit2/tests/clone/extr_nonetwork.c_test_clone_nonetwork__can_checkout_given_branch.c'
source_filename = "AnghaBench/libgit2/tests/clone/extr_nonetwork.c_test_clone_nonetwork__can_checkout_given_branch.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { ptr }
@.str = private unnamed_addr constant [5 x i8] c"test\00", align 1
@g_options = dso_local global %struct.TYPE_3__ zeroinitializer, align 8
@g_repo = dso_local global i32 0, align 4
@.str.1 = private unnamed_addr constant [13 x i8] c"testrepo.git\00", align 1
@.str.2 = private unnamed_addr constant [6 x i8] c"./foo\00", align 1
@g_ref = dso_local global i32 0, align 4
@.str.3 = private unnamed_addr constant [16 x i8] c"refs/heads/test\00", align 1
@.str.4 = private unnamed_addr constant [15 x i8] c"foo/readme.txt\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @test_clone_nonetwork__can_checkout_given_branch() local_unnamed_addr #0 {
store ptr @.str, ptr @g_options, align 8, !tbaa !5
%1 = tail call i32 @cl_git_fixture_url(ptr noundef nonnull @.str.1) #2
%2 = tail call i32 @git_clone(ptr noundef nonnull @g_repo, i32 noundef %1, ptr noundef nonnull @.str.2, ptr noundef nonnull @g_options) #2
%3 = tail call i32 @cl_git_pass(i32 noundef %2) #2
%4 = load i32, ptr @g_repo, align 4, !tbaa !10
%5 = tail call i32 @git_repository_head_unborn(i32 noundef %4) #2
%6 = tail call i32 @cl_assert_equal_i(i32 noundef 0, i32 noundef %5) #2
%7 = load i32, ptr @g_repo, align 4, !tbaa !10
%8 = tail call i32 @git_repository_head(ptr noundef nonnull @g_ref, i32 noundef %7) #2
%9 = tail call i32 @cl_git_pass(i32 noundef %8) #2
%10 = load i32, ptr @g_ref, align 4, !tbaa !10
%11 = tail call i32 @git_reference_name(i32 noundef %10) #2
%12 = tail call i32 @cl_assert_equal_s(i32 noundef %11, ptr noundef nonnull @.str.3) #2
%13 = tail call i32 @git_path_exists(ptr noundef nonnull @.str.4) #2
%14 = tail call i32 @cl_assert(i32 noundef %13) #2
ret void
}
declare i32 @cl_git_pass(i32 noundef) local_unnamed_addr #1
declare i32 @git_clone(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @cl_git_fixture_url(ptr noundef) local_unnamed_addr #1
declare i32 @cl_assert_equal_i(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @git_repository_head_unborn(i32 noundef) local_unnamed_addr #1
declare i32 @git_repository_head(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cl_assert_equal_s(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @git_reference_name(i32 noundef) local_unnamed_addr #1
declare i32 @cl_assert(i32 noundef) local_unnamed_addr #1
declare i32 @git_path_exists(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/libgit2/tests/clone/extr_nonetwork.c_test_clone_nonetwork__can_checkout_given_branch.c'
source_filename = "AnghaBench/libgit2/tests/clone/extr_nonetwork.c_test_clone_nonetwork__can_checkout_given_branch.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_3__ = type { ptr }
@.str = private unnamed_addr constant [5 x i8] c"test\00", align 1
@g_options = common global %struct.TYPE_3__ zeroinitializer, align 8
@g_repo = common global i32 0, align 4
@.str.1 = private unnamed_addr constant [13 x i8] c"testrepo.git\00", align 1
@.str.2 = private unnamed_addr constant [6 x i8] c"./foo\00", align 1
@g_ref = common global i32 0, align 4
@.str.3 = private unnamed_addr constant [16 x i8] c"refs/heads/test\00", align 1
@.str.4 = private unnamed_addr constant [15 x i8] c"foo/readme.txt\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @test_clone_nonetwork__can_checkout_given_branch() local_unnamed_addr #0 {
store ptr @.str, ptr @g_options, align 8, !tbaa !6
%1 = tail call i32 @cl_git_fixture_url(ptr noundef nonnull @.str.1) #2
%2 = tail call i32 @git_clone(ptr noundef nonnull @g_repo, i32 noundef %1, ptr noundef nonnull @.str.2, ptr noundef nonnull @g_options) #2
%3 = tail call i32 @cl_git_pass(i32 noundef %2) #2
%4 = load i32, ptr @g_repo, align 4, !tbaa !11
%5 = tail call i32 @git_repository_head_unborn(i32 noundef %4) #2
%6 = tail call i32 @cl_assert_equal_i(i32 noundef 0, i32 noundef %5) #2
%7 = load i32, ptr @g_repo, align 4, !tbaa !11
%8 = tail call i32 @git_repository_head(ptr noundef nonnull @g_ref, i32 noundef %7) #2
%9 = tail call i32 @cl_git_pass(i32 noundef %8) #2
%10 = load i32, ptr @g_ref, align 4, !tbaa !11
%11 = tail call i32 @git_reference_name(i32 noundef %10) #2
%12 = tail call i32 @cl_assert_equal_s(i32 noundef %11, ptr noundef nonnull @.str.3) #2
%13 = tail call i32 @git_path_exists(ptr noundef nonnull @.str.4) #2
%14 = tail call i32 @cl_assert(i32 noundef %13) #2
ret void
}
declare i32 @cl_git_pass(i32 noundef) local_unnamed_addr #1
declare i32 @git_clone(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @cl_git_fixture_url(ptr noundef) local_unnamed_addr #1
declare i32 @cl_assert_equal_i(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @git_repository_head_unborn(i32 noundef) local_unnamed_addr #1
declare i32 @git_repository_head(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cl_assert_equal_s(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @git_reference_name(i32 noundef) local_unnamed_addr #1
declare i32 @cl_assert(i32 noundef) local_unnamed_addr #1
declare i32 @git_path_exists(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
| libgit2_tests_clone_extr_nonetwork.c_test_clone_nonetwork__can_checkout_given_branch |
; ModuleID = 'AnghaBench/freebsd/tools/tools/net80211/wesside/wesside/extr_aircrack-ptw-lib.c_PTW_addsession.c'
source_filename = "AnghaBench/freebsd/tools/tools/net80211/wesside/wesside/extr_aircrack-ptw-lib.c_PTW_addsession.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_7__ = type { ptr, i64, ptr, ptr, i32 }
%struct.TYPE_5__ = type { i32 }
%struct.TYPE_6__ = type { i32, i32 }
@PTW_KEYHSBYTES = dso_local local_unnamed_addr global i32 0, align 4
@KEYHSBYTES = dso_local local_unnamed_addr global i32 0, align 4
@CONTROLSESSIONS = dso_local local_unnamed_addr global i64 0, align 8
@IVBYTES = dso_local local_unnamed_addr global i32 0, align 4
@KSBYTES = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @PTW_addsession(ptr nocapture noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @PTW_KEYHSBYTES, align 4, !tbaa !5
%5 = zext i32 %4 to i64
%6 = alloca i32, i64 %5, align 16
%7 = load i32, ptr %1, align 4, !tbaa !5
%8 = shl i32 %7, 16
%9 = getelementptr inbounds i32, ptr %1, i64 1
%10 = load i32, ptr %9, align 4, !tbaa !5
%11 = shl i32 %10, 8
%12 = or i32 %11, %8
%13 = getelementptr inbounds i32, ptr %1, i64 2
%14 = load i32, ptr %13, align 4, !tbaa !5
%15 = or i32 %12, %14
%16 = sdiv i32 %15, 8
%17 = and i32 %14, 7
%18 = shl nuw nsw i32 1, %17
%19 = load ptr, ptr %0, align 8, !tbaa !9
%20 = sext i32 %16 to i64
%21 = getelementptr inbounds i32, ptr %19, i64 %20
%22 = load i32, ptr %21, align 4, !tbaa !5
%23 = and i32 %22, %18
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %72
25: ; preds = %3
%26 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 4
%27 = load i32, ptr %26, align 8, !tbaa !13
%28 = add nsw i32 %27, 1
store i32 %28, ptr %26, align 8, !tbaa !13
%29 = load i32, ptr %21, align 4, !tbaa !5
%30 = or i32 %29, %18
store i32 %30, ptr %21, align 4, !tbaa !5
%31 = load i32, ptr @PTW_KEYHSBYTES, align 4, !tbaa !5
%32 = call i32 @guesskeybytes(ptr noundef nonnull %1, ptr noundef %2, ptr noundef nonnull %6, i32 noundef %31) #2
%33 = load i32, ptr @KEYHSBYTES, align 4, !tbaa !5
%34 = icmp sgt i32 %33, 0
br i1 %34, label %35, label %52
35: ; preds = %25
%36 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 3
%37 = load ptr, ptr %36, align 8, !tbaa !14
br label %38
38: ; preds = %35, %38
%39 = phi i64 [ 0, %35 ], [ %48, %38 ]
%40 = getelementptr inbounds ptr, ptr %37, i64 %39
%41 = load ptr, ptr %40, align 8, !tbaa !15
%42 = getelementptr inbounds i32, ptr %6, i64 %39
%43 = load i32, ptr %42, align 4, !tbaa !5
%44 = sext i32 %43 to i64
%45 = getelementptr inbounds %struct.TYPE_5__, ptr %41, i64 %44
%46 = load i32, ptr %45, align 4, !tbaa !16
%47 = add nsw i32 %46, 1
store i32 %47, ptr %45, align 4, !tbaa !16
%48 = add nuw nsw i64 %39, 1
%49 = load i32, ptr @KEYHSBYTES, align 4, !tbaa !5
%50 = sext i32 %49 to i64
%51 = icmp slt i64 %48, %50
br i1 %51, label %38, label %52, !llvm.loop !18
52: ; preds = %38, %25
%53 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 1
%54 = load i64, ptr %53, align 8, !tbaa !20
%55 = load i64, ptr @CONTROLSESSIONS, align 8, !tbaa !21
%56 = icmp ult i64 %54, %55
br i1 %56, label %57, label %72
57: ; preds = %52
%58 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 2
%59 = load ptr, ptr %58, align 8, !tbaa !22
%60 = getelementptr inbounds %struct.TYPE_6__, ptr %59, i64 %54, i32 1
%61 = load i32, ptr %60, align 4, !tbaa !23
%62 = load i32, ptr @IVBYTES, align 4, !tbaa !5
%63 = call i32 @memcpy(i32 noundef %61, ptr noundef nonnull %1, i32 noundef %62) #2
%64 = load ptr, ptr %58, align 8, !tbaa !22
%65 = load i64, ptr %53, align 8, !tbaa !20
%66 = getelementptr inbounds %struct.TYPE_6__, ptr %64, i64 %65
%67 = load i32, ptr %66, align 4, !tbaa !25
%68 = load i32, ptr @KSBYTES, align 4, !tbaa !5
%69 = call i32 @memcpy(i32 noundef %67, ptr noundef %2, i32 noundef %68) #2
%70 = load i64, ptr %53, align 8, !tbaa !20
%71 = add i64 %70, 1
store i64 %71, ptr %53, align 8, !tbaa !20
br label %72
72: ; preds = %3, %52, %57
%73 = phi i32 [ 1, %57 ], [ 1, %52 ], [ 0, %3 ]
ret i32 %73
}
declare i32 @guesskeybytes(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_7__", !11, i64 0, !12, i64 8, !11, i64 16, !11, i64 24, !6, i64 32}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!10, !6, i64 32}
!14 = !{!10, !11, i64 24}
!15 = !{!11, !11, i64 0}
!16 = !{!17, !6, i64 0}
!17 = !{!"TYPE_5__", !6, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!10, !12, i64 8}
!21 = !{!12, !12, i64 0}
!22 = !{!10, !11, i64 16}
!23 = !{!24, !6, i64 4}
!24 = !{!"TYPE_6__", !6, i64 0, !6, i64 4}
!25 = !{!24, !6, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/tools/tools/net80211/wesside/wesside/extr_aircrack-ptw-lib.c_PTW_addsession.c'
source_filename = "AnghaBench/freebsd/tools/tools/net80211/wesside/wesside/extr_aircrack-ptw-lib.c_PTW_addsession.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_5__ = type { i32 }
%struct.TYPE_6__ = type { i32, i32 }
@PTW_KEYHSBYTES = common local_unnamed_addr global i32 0, align 4
@KEYHSBYTES = common local_unnamed_addr global i32 0, align 4
@CONTROLSESSIONS = common local_unnamed_addr global i64 0, align 8
@IVBYTES = common local_unnamed_addr global i32 0, align 4
@KSBYTES = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @PTW_addsession(ptr nocapture noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @PTW_KEYHSBYTES, align 4, !tbaa !6
%5 = zext i32 %4 to i64
%6 = alloca i32, i64 %5, align 4
%7 = load i32, ptr %1, align 4, !tbaa !6
%8 = shl i32 %7, 16
%9 = getelementptr inbounds i8, ptr %1, i64 4
%10 = load i32, ptr %9, align 4, !tbaa !6
%11 = shl i32 %10, 8
%12 = or i32 %11, %8
%13 = getelementptr inbounds i8, ptr %1, i64 8
%14 = load i32, ptr %13, align 4, !tbaa !6
%15 = or i32 %12, %14
%16 = sdiv i32 %15, 8
%17 = and i32 %14, 7
%18 = shl nuw nsw i32 1, %17
%19 = load ptr, ptr %0, align 8, !tbaa !10
%20 = sext i32 %16 to i64
%21 = getelementptr inbounds i32, ptr %19, i64 %20
%22 = load i32, ptr %21, align 4, !tbaa !6
%23 = and i32 %22, %18
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %72
25: ; preds = %3
%26 = getelementptr inbounds i8, ptr %0, i64 32
%27 = load i32, ptr %26, align 8, !tbaa !14
%28 = add nsw i32 %27, 1
store i32 %28, ptr %26, align 8, !tbaa !14
%29 = load i32, ptr %21, align 4, !tbaa !6
%30 = or i32 %29, %18
store i32 %30, ptr %21, align 4, !tbaa !6
%31 = load i32, ptr @PTW_KEYHSBYTES, align 4, !tbaa !6
%32 = call i32 @guesskeybytes(ptr noundef nonnull %1, ptr noundef %2, ptr noundef nonnull %6, i32 noundef %31) #2
%33 = load i32, ptr @KEYHSBYTES, align 4, !tbaa !6
%34 = icmp sgt i32 %33, 0
br i1 %34, label %35, label %52
35: ; preds = %25
%36 = getelementptr inbounds i8, ptr %0, i64 24
%37 = load ptr, ptr %36, align 8, !tbaa !15
br label %38
38: ; preds = %35, %38
%39 = phi i64 [ 0, %35 ], [ %48, %38 ]
%40 = getelementptr inbounds ptr, ptr %37, i64 %39
%41 = load ptr, ptr %40, align 8, !tbaa !16
%42 = getelementptr inbounds i32, ptr %6, i64 %39
%43 = load i32, ptr %42, align 4, !tbaa !6
%44 = sext i32 %43 to i64
%45 = getelementptr inbounds %struct.TYPE_5__, ptr %41, i64 %44
%46 = load i32, ptr %45, align 4, !tbaa !17
%47 = add nsw i32 %46, 1
store i32 %47, ptr %45, align 4, !tbaa !17
%48 = add nuw nsw i64 %39, 1
%49 = load i32, ptr @KEYHSBYTES, align 4, !tbaa !6
%50 = sext i32 %49 to i64
%51 = icmp slt i64 %48, %50
br i1 %51, label %38, label %52, !llvm.loop !19
52: ; preds = %38, %25
%53 = getelementptr inbounds i8, ptr %0, i64 8
%54 = load i64, ptr %53, align 8, !tbaa !21
%55 = load i64, ptr @CONTROLSESSIONS, align 8, !tbaa !22
%56 = icmp ult i64 %54, %55
br i1 %56, label %57, label %72
57: ; preds = %52
%58 = getelementptr inbounds i8, ptr %0, i64 16
%59 = load ptr, ptr %58, align 8, !tbaa !23
%60 = getelementptr inbounds %struct.TYPE_6__, ptr %59, i64 %54, i32 1
%61 = load i32, ptr %60, align 4, !tbaa !24
%62 = load i32, ptr @IVBYTES, align 4, !tbaa !6
%63 = call i32 @memcpy(i32 noundef %61, ptr noundef nonnull %1, i32 noundef %62) #2
%64 = load ptr, ptr %58, align 8, !tbaa !23
%65 = load i64, ptr %53, align 8, !tbaa !21
%66 = getelementptr inbounds %struct.TYPE_6__, ptr %64, i64 %65
%67 = load i32, ptr %66, align 4, !tbaa !26
%68 = load i32, ptr @KSBYTES, align 4, !tbaa !6
%69 = call i32 @memcpy(i32 noundef %67, ptr noundef %2, i32 noundef %68) #2
%70 = load i64, ptr %53, align 8, !tbaa !21
%71 = add i64 %70, 1
store i64 %71, ptr %53, align 8, !tbaa !21
br label %72
72: ; preds = %3, %52, %57
%73 = phi i32 [ 1, %57 ], [ 1, %52 ], [ 0, %3 ]
ret i32 %73
}
declare i32 @guesskeybytes(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_7__", !12, i64 0, !13, i64 8, !12, i64 16, !12, i64 24, !7, i64 32}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!11, !7, i64 32}
!15 = !{!11, !12, i64 24}
!16 = !{!12, !12, i64 0}
!17 = !{!18, !7, i64 0}
!18 = !{!"TYPE_5__", !7, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!11, !13, i64 8}
!22 = !{!13, !13, i64 0}
!23 = !{!11, !12, i64 16}
!24 = !{!25, !7, i64 4}
!25 = !{!"TYPE_6__", !7, i64 0, !7, i64 4}
!26 = !{!25, !7, i64 0}
| freebsd_tools_tools_net80211_wesside_wesside_extr_aircrack-ptw-lib.c_PTW_addsession |
; ModuleID = 'AnghaBench/linux/net/netfilter/extr_xt_bpf.c_bpf_mt_destroy.c'
source_filename = "AnghaBench/linux/net/netfilter/extr_xt_bpf.c_bpf_mt_destroy.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @bpf_mt_destroy], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @bpf_mt_destroy(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = load i32, ptr %2, align 4, !tbaa !10
%4 = tail call i32 @bpf_prog_destroy(i32 noundef %3) #2
ret void
}
declare i32 @bpf_prog_destroy(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"xt_mtdtor_param", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"xt_bpf_info", !12, i64 0}
!12 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/net/netfilter/extr_xt_bpf.c_bpf_mt_destroy.c'
source_filename = "AnghaBench/linux/net/netfilter/extr_xt_bpf.c_bpf_mt_destroy.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @bpf_mt_destroy], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @bpf_mt_destroy(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = load i32, ptr %2, align 4, !tbaa !11
%4 = tail call i32 @bpf_prog_destroy(i32 noundef %3) #2
ret void
}
declare i32 @bpf_prog_destroy(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"xt_mtdtor_param", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"xt_bpf_info", !13, i64 0}
!13 = !{!"int", !9, i64 0}
| linux_net_netfilter_extr_xt_bpf.c_bpf_mt_destroy |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/mtd/extr_mtdoops.c_mtdoops_console_write.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/mtd/extr_mtdoops.c_mtdoops_console_write.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mtdoops_context = type { i32, i32, ptr, i32, i32, ptr }
@oops_in_progress = dso_local local_unnamed_addr global i32 0, align 4
@MTDOOPS_KERNMSG_MAGIC = dso_local local_unnamed_addr global i32 0, align 4
@OOPS_PAGE_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @mtdoops_console_write], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @mtdoops_console_write(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !5
%5 = load i32, ptr @oops_in_progress, align 4, !tbaa !10
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = tail call i32 (...) @mtdoops_console_sync() #2
br label %52
9: ; preds = %3
%10 = getelementptr inbounds %struct.mtdoops_context, ptr %4, i64 0, i32 5
%11 = load ptr, ptr %10, align 8, !tbaa !12
%12 = getelementptr inbounds %struct.mtdoops_context, ptr %4, i64 0, i32 4
%13 = load i32, ptr %12, align 4, !tbaa !14
%14 = icmp ne i32 %13, 0
%15 = icmp ne ptr %11, null
%16 = select i1 %14, i1 %15, i1 false
br i1 %16, label %17, label %52
17: ; preds = %9
%18 = getelementptr inbounds %struct.mtdoops_context, ptr %4, i64 0, i32 1
%19 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %18, i64 noundef undef) #2
%20 = load i32, ptr %12, align 4, !tbaa !14
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %24
22: ; preds = %17
%23 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %18, i64 noundef undef) #2
br label %52
24: ; preds = %17
%25 = load i32, ptr %4, align 8, !tbaa !15
%26 = icmp eq i32 %25, 0
%27 = getelementptr inbounds %struct.mtdoops_context, ptr %4, i64 0, i32 2
%28 = load ptr, ptr %27, align 8, !tbaa !16
br i1 %26, label %29, label %34
29: ; preds = %24
%30 = getelementptr inbounds %struct.mtdoops_context, ptr %4, i64 0, i32 3
%31 = load i32, ptr %30, align 8, !tbaa !17
%32 = getelementptr inbounds i32, ptr %28, i64 1
store i32 %31, ptr %28, align 4, !tbaa !10
%33 = load i32, ptr @MTDOOPS_KERNMSG_MAGIC, align 4, !tbaa !10
store i32 %33, ptr %32, align 4, !tbaa !10
store i32 8, ptr %4, align 8, !tbaa !15
br label %34
34: ; preds = %24, %29
%35 = phi i32 [ 8, %29 ], [ %25, %24 ]
%36 = add i32 %35, %2
%37 = load i32, ptr @OOPS_PAGE_SIZE, align 4, !tbaa !10
%38 = icmp ugt i32 %36, %37
%39 = sub i32 %37, %35
%40 = select i1 %38, i32 %39, i32 %2
%41 = sext i32 %35 to i64
%42 = getelementptr inbounds i32, ptr %28, i64 %41
%43 = tail call i32 @memcpy(ptr noundef nonnull %42, ptr noundef %1, i32 noundef %40) #2
%44 = load i32, ptr %4, align 8, !tbaa !15
%45 = add i32 %44, %40
store i32 %45, ptr %4, align 8, !tbaa !15
%46 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %18, i64 noundef undef) #2
%47 = load i32, ptr %4, align 8, !tbaa !15
%48 = load i32, ptr @OOPS_PAGE_SIZE, align 4, !tbaa !10
%49 = icmp eq i32 %47, %48
br i1 %49, label %50, label %52
50: ; preds = %34
%51 = tail call i32 (...) @mtdoops_console_sync() #2
br label %52
52: ; preds = %34, %50, %9, %22, %7
ret void
}
declare i32 @mtdoops_console_sync(...) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"console", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !7, i64 24}
!13 = !{!"mtdoops_context", !11, i64 0, !11, i64 4, !7, i64 8, !11, i64 16, !11, i64 20, !7, i64 24}
!14 = !{!13, !11, i64 20}
!15 = !{!13, !11, i64 0}
!16 = !{!13, !7, i64 8}
!17 = !{!13, !11, i64 16}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/mtd/extr_mtdoops.c_mtdoops_console_write.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/mtd/extr_mtdoops.c_mtdoops_console_write.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@oops_in_progress = common local_unnamed_addr global i32 0, align 4
@MTDOOPS_KERNMSG_MAGIC = common local_unnamed_addr global i32 0, align 4
@OOPS_PAGE_SIZE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mtdoops_console_write], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @mtdoops_console_write(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = load i32, ptr @oops_in_progress, align 4, !tbaa !11
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = tail call i32 @mtdoops_console_sync() #2
br label %52
9: ; preds = %3
%10 = getelementptr inbounds i8, ptr %4, i64 24
%11 = load ptr, ptr %10, align 8, !tbaa !13
%12 = getelementptr inbounds i8, ptr %4, i64 20
%13 = load i32, ptr %12, align 4, !tbaa !15
%14 = icmp ne i32 %13, 0
%15 = icmp ne ptr %11, null
%16 = select i1 %14, i1 %15, i1 false
br i1 %16, label %17, label %52
17: ; preds = %9
%18 = getelementptr inbounds i8, ptr %4, i64 4
%19 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %18, i64 noundef undef) #2
%20 = load i32, ptr %12, align 4, !tbaa !15
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %24
22: ; preds = %17
%23 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %18, i64 noundef undef) #2
br label %52
24: ; preds = %17
%25 = load i32, ptr %4, align 8, !tbaa !16
%26 = icmp eq i32 %25, 0
%27 = getelementptr inbounds i8, ptr %4, i64 8
%28 = load ptr, ptr %27, align 8, !tbaa !17
br i1 %26, label %29, label %34
29: ; preds = %24
%30 = getelementptr inbounds i8, ptr %4, i64 16
%31 = load i32, ptr %30, align 8, !tbaa !18
%32 = getelementptr inbounds i8, ptr %28, i64 4
store i32 %31, ptr %28, align 4, !tbaa !11
%33 = load i32, ptr @MTDOOPS_KERNMSG_MAGIC, align 4, !tbaa !11
store i32 %33, ptr %32, align 4, !tbaa !11
store i32 8, ptr %4, align 8, !tbaa !16
br label %34
34: ; preds = %24, %29
%35 = phi i32 [ 8, %29 ], [ %25, %24 ]
%36 = add i32 %35, %2
%37 = load i32, ptr @OOPS_PAGE_SIZE, align 4, !tbaa !11
%38 = icmp ugt i32 %36, %37
%39 = sub i32 %37, %35
%40 = select i1 %38, i32 %39, i32 %2
%41 = sext i32 %35 to i64
%42 = getelementptr inbounds i32, ptr %28, i64 %41
%43 = tail call i32 @memcpy(ptr noundef nonnull %42, ptr noundef %1, i32 noundef %40) #2
%44 = load i32, ptr %4, align 8, !tbaa !16
%45 = add i32 %44, %40
store i32 %45, ptr %4, align 8, !tbaa !16
%46 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %18, i64 noundef undef) #2
%47 = load i32, ptr %4, align 8, !tbaa !16
%48 = load i32, ptr @OOPS_PAGE_SIZE, align 4, !tbaa !11
%49 = icmp eq i32 %47, %48
br i1 %49, label %50, label %52
50: ; preds = %34
%51 = tail call i32 @mtdoops_console_sync() #2
br label %52
52: ; preds = %34, %50, %9, %22, %7
ret void
}
declare i32 @mtdoops_console_sync(...) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"console", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !8, i64 24}
!14 = !{!"mtdoops_context", !12, i64 0, !12, i64 4, !8, i64 8, !12, i64 16, !12, i64 20, !8, i64 24}
!15 = !{!14, !12, i64 20}
!16 = !{!14, !12, i64 0}
!17 = !{!14, !8, i64 8}
!18 = !{!14, !12, i64 16}
| fastsocket_kernel_drivers_mtd_extr_mtdoops.c_mtdoops_console_write |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/acpi/extr_processor_thermal.c_processor_get_max_state.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/acpi/extr_processor_thermal.c_processor_get_max_state.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @processor_get_max_state], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @processor_get_max_state(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = tail call ptr @acpi_driver_data(ptr noundef %3) #2
%5 = icmp ne ptr %3, null
%6 = icmp ne ptr %4, null
%7 = select i1 %5, i1 %6, i1 false
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i32, ptr @EINVAL, align 4, !tbaa !10
%10 = sub nsw i32 0, %9
br label %13
11: ; preds = %2
%12 = tail call i64 @acpi_processor_max_state(ptr noundef nonnull %4) #2
store i64 %12, ptr %1, align 8, !tbaa !12
br label %13
13: ; preds = %11, %8
%14 = phi i32 [ 0, %11 ], [ %10, %8 ]
ret i32 %14
}
declare ptr @acpi_driver_data(ptr noundef) local_unnamed_addr #1
declare i64 @acpi_processor_max_state(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"thermal_cooling_device", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/acpi/extr_processor_thermal.c_processor_get_max_state.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/acpi/extr_processor_thermal.c_processor_get_max_state.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @processor_get_max_state], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @processor_get_max_state(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = tail call ptr @acpi_driver_data(ptr noundef %3) #2
%5 = icmp ne ptr %3, null
%6 = icmp ne ptr %4, null
%7 = select i1 %5, i1 %6, i1 false
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i32, ptr @EINVAL, align 4, !tbaa !11
%10 = sub nsw i32 0, %9
br label %13
11: ; preds = %2
%12 = tail call i64 @acpi_processor_max_state(ptr noundef nonnull %4) #2
store i64 %12, ptr %1, align 8, !tbaa !13
br label %13
13: ; preds = %11, %8
%14 = phi i32 [ 0, %11 ], [ %10, %8 ]
ret i32 %14
}
declare ptr @acpi_driver_data(ptr noundef) local_unnamed_addr #1
declare i64 @acpi_processor_max_state(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"thermal_cooling_device", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !9, i64 0}
| fastsocket_kernel_drivers_acpi_extr_processor_thermal.c_processor_get_max_state |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_core.c_mlxsw_core_fw_flash_start.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_core.c_mlxsw_core_fw_flash_start.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable
define dso_local void @mlxsw_core_fw_flash_start(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
store i32 1, ptr %0, align 4, !tbaa !5
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"mlxsw_core", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_core.c_mlxsw_core_fw_flash_start.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_core.c_mlxsw_core_fw_flash_start.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync)
define void @mlxsw_core_fw_flash_start(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
store i32 1, ptr %0, align 4, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"mlxsw_core", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_net_ethernet_mellanox_mlxsw_extr_core.c_mlxsw_core_fw_flash_start |
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/oleaut32/extr_typelib.c_test_create_typelib_lcid.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/oleaut32/extr_typelib.c_test_create_typelib_lcid.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MAX_PATH = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [2 x i8] c".\00", align 1
@.str.1 = private unnamed_addr constant [4 x i8] c"tlb\00", align 1
@CP_ACP = dso_local local_unnamed_addr global i32 0, align 4
@SYS_WIN32 = dso_local local_unnamed_addr global i32 0, align 4
@S_OK = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [10 x i8] c"got %08x\0A\00", align 1
@IID_ITypeLib = dso_local global i32 0, align 4
@.str.3 = private unnamed_addr constant [12 x i8] c"flags 0x%x\0A\00", align 1
@GENERIC_READ = dso_local local_unnamed_addr global i32 0, align 4
@OPEN_EXISTING = dso_local local_unnamed_addr global i32 0, align 4
@INVALID_HANDLE_VALUE = dso_local local_unnamed_addr global i64 0, align 8
@.str.4 = private unnamed_addr constant [22 x i8] c"file creation failed\0A\00", align 1
@.str.5 = private unnamed_addr constant [9 x i8] c"read %d\0A\00", align 1
@.str.6 = private unnamed_addr constant [22 x i8] c"got %08x (lcid %08x)\0A\00", align 1
@LIBFLAG_FHASDISKIMAGE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @test_create_typelib_lcid], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @test_create_typelib_lcid(i32 noundef %0) #0 {
%2 = alloca ptr, align 8
%3 = alloca [8 x i32], align 16
%4 = alloca ptr, align 8
%5 = alloca ptr, align 8
%6 = alloca i32, align 4
%7 = load i32, ptr @MAX_PATH, align 4, !tbaa !5
%8 = zext i32 %7 to i64
%9 = alloca i8, i64 %8, align 16
%10 = alloca i32, i64 %8, align 16
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
%11 = call i32 @GetTempFileNameA(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 0, ptr noundef nonnull %9) #3
%12 = load i32, ptr @CP_ACP, align 4, !tbaa !5
%13 = load i32, ptr @MAX_PATH, align 4, !tbaa !5
%14 = call i32 @MultiByteToWideChar(i32 noundef %12, i32 noundef 0, ptr noundef nonnull %9, i32 noundef -1, ptr noundef nonnull %10, i32 noundef %13) #3
%15 = load i32, ptr @SYS_WIN32, align 4, !tbaa !5
%16 = call i32 @CreateTypeLib2(i32 noundef %15, ptr noundef nonnull %10, ptr noundef nonnull %2) #3
%17 = load i32, ptr @S_OK, align 4, !tbaa !5
%18 = icmp eq i32 %16, %17
%19 = zext i1 %18 to i32
%20 = call i32 (i32, ptr, ...) @ok(i32 noundef %19, ptr noundef nonnull @.str.2, i32 noundef %16) #3
%21 = load ptr, ptr %2, align 8, !tbaa !9
%22 = call i32 @ICreateTypeLib2_QueryInterface(ptr noundef %21, ptr noundef nonnull @IID_ITypeLib, ptr noundef nonnull %4) #3
%23 = load i32, ptr @S_OK, align 4, !tbaa !5
%24 = icmp eq i32 %22, %23
%25 = zext i1 %24 to i32
%26 = call i32 (i32, ptr, ...) @ok(i32 noundef %25, ptr noundef nonnull @.str.2, i32 noundef %22) #3
%27 = load ptr, ptr %4, align 8, !tbaa !9
%28 = call i32 @ITypeLib_GetLibAttr(ptr noundef %27, ptr noundef nonnull %5) #3
%29 = load i32, ptr @S_OK, align 4, !tbaa !5
%30 = icmp eq i32 %28, %29
%31 = zext i1 %30 to i32
%32 = call i32 (i32, ptr, ...) @ok(i32 noundef %31, ptr noundef nonnull @.str.2, i32 noundef %28) #3
%33 = load ptr, ptr %5, align 8, !tbaa !9
%34 = load i32, ptr %33, align 4, !tbaa !11
%35 = icmp eq i32 %34, 0
%36 = zext i1 %35 to i32
%37 = call i32 (i32, ptr, ...) @ok(i32 noundef %36, ptr noundef nonnull @.str.3, i32 noundef %34) #3
%38 = load ptr, ptr %4, align 8, !tbaa !9
%39 = load ptr, ptr %5, align 8, !tbaa !9
%40 = call i32 @ITypeLib_ReleaseTLibAttr(ptr noundef %38, ptr noundef %39) #3
%41 = load ptr, ptr %2, align 8, !tbaa !9
%42 = call i32 @ICreateTypeLib2_SetLcid(ptr noundef %41, i32 noundef %0) #3
%43 = load i32, ptr @S_OK, align 4, !tbaa !5
%44 = icmp eq i32 %42, %43
%45 = zext i1 %44 to i32
%46 = call i32 (i32, ptr, ...) @ok(i32 noundef %45, ptr noundef nonnull @.str.2, i32 noundef %42) #3
%47 = load ptr, ptr %2, align 8, !tbaa !9
%48 = call i32 @ICreateTypeLib2_SetVersion(ptr noundef %47, i32 noundef 3, i32 noundef 4) #3
%49 = load i32, ptr @S_OK, align 4, !tbaa !5
%50 = icmp eq i32 %48, %49
%51 = zext i1 %50 to i32
%52 = call i32 (i32, ptr, ...) @ok(i32 noundef %51, ptr noundef nonnull @.str.2, i32 noundef %48) #3
%53 = load ptr, ptr %2, align 8, !tbaa !9
%54 = call i32 @ICreateTypeLib2_SaveAllChanges(ptr noundef %53) #3
%55 = load i32, ptr @S_OK, align 4, !tbaa !5
%56 = icmp eq i32 %54, %55
%57 = zext i1 %56 to i32
%58 = call i32 (i32, ptr, ...) @ok(i32 noundef %57, ptr noundef nonnull @.str.2, i32 noundef %54) #3
%59 = load ptr, ptr %4, align 8, !tbaa !9
%60 = call i32 @ITypeLib_GetLibAttr(ptr noundef %59, ptr noundef nonnull %5) #3
%61 = load i32, ptr @S_OK, align 4, !tbaa !5
%62 = icmp eq i32 %60, %61
%63 = zext i1 %62 to i32
%64 = call i32 (i32, ptr, ...) @ok(i32 noundef %63, ptr noundef nonnull @.str.2, i32 noundef %60) #3
%65 = load ptr, ptr %5, align 8, !tbaa !9
%66 = load i32, ptr %65, align 4, !tbaa !11
%67 = icmp eq i32 %66, 0
%68 = zext i1 %67 to i32
%69 = call i32 (i32, ptr, ...) @ok(i32 noundef %68, ptr noundef nonnull @.str.3, i32 noundef %66) #3
%70 = load ptr, ptr %4, align 8, !tbaa !9
%71 = load ptr, ptr %5, align 8, !tbaa !9
%72 = call i32 @ITypeLib_ReleaseTLibAttr(ptr noundef %70, ptr noundef %71) #3
%73 = load ptr, ptr %4, align 8, !tbaa !9
%74 = call i32 @ITypeLib_Release(ptr noundef %73) #3
%75 = load ptr, ptr %2, align 8, !tbaa !9
%76 = call i32 @ICreateTypeLib2_Release(ptr noundef %75) #3
%77 = load i32, ptr @GENERIC_READ, align 4, !tbaa !5
%78 = load i32, ptr @OPEN_EXISTING, align 4, !tbaa !5
%79 = call i64 @CreateFileA(ptr noundef nonnull %9, i32 noundef %77, i32 noundef 0, ptr noundef null, i32 noundef %78, i32 noundef 0, i32 noundef 0) #3
%80 = load i64, ptr @INVALID_HANDLE_VALUE, align 8, !tbaa !13
%81 = icmp ne i64 %79, %80
%82 = zext i1 %81 to i32
%83 = call i32 (i32, ptr, ...) @ok(i32 noundef %82, ptr noundef nonnull @.str.4) #3
%84 = call i32 @ReadFile(i64 noundef %79, ptr noundef nonnull %3, i32 noundef 32, ptr noundef nonnull %6, ptr noundef null) #3
%85 = load i32, ptr %6, align 4, !tbaa !5
%86 = icmp eq i32 %85, 32
%87 = zext i1 %86 to i32
%88 = call i32 (i32, ptr, ...) @ok(i32 noundef %87, ptr noundef nonnull @.str.5, i32 noundef %85) #3
%89 = call i32 @CloseHandle(i64 noundef %79) #3
%90 = load i32, ptr %3, align 16, !tbaa !5
%91 = icmp eq i32 %90, 1413894989
%92 = zext i1 %91 to i32
%93 = call i32 (i32, ptr, ...) @ok(i32 noundef %92, ptr noundef nonnull @.str.2, i32 noundef %90) #3
%94 = getelementptr inbounds [8 x i32], ptr %3, i64 0, i64 1
%95 = load i32, ptr %94, align 4, !tbaa !5
%96 = icmp eq i32 %95, 65538
%97 = zext i1 %96 to i32
%98 = call i32 (i32, ptr, ...) @ok(i32 noundef %97, ptr noundef nonnull @.str.2, i32 noundef %95) #3
%99 = getelementptr inbounds [8 x i32], ptr %3, i64 0, i64 2
%100 = load i32, ptr %99, align 8, !tbaa !5
%101 = icmp eq i32 %100, -1
%102 = zext i1 %101 to i32
%103 = call i32 (i32, ptr, ...) @ok(i32 noundef %102, ptr noundef nonnull @.str.2, i32 noundef %100) #3
%104 = getelementptr inbounds [8 x i32], ptr %3, i64 0, i64 3
%105 = load i32, ptr %104, align 4, !tbaa !5
%106 = icmp eq i32 %0, 0
%107 = select i1 %106, i32 1033, i32 %0
%108 = icmp eq i32 %105, %107
%109 = zext i1 %108 to i32
%110 = call i32 (i32, ptr, ...) @ok(i32 noundef %109, ptr noundef nonnull @.str.6, i32 noundef %105, i32 noundef %0) #3
%111 = getelementptr inbounds [8 x i32], ptr %3, i64 0, i64 4
%112 = load i32, ptr %111, align 16, !tbaa !5
%113 = icmp eq i32 %112, %0
%114 = zext i1 %113 to i32
%115 = call i32 (i32, ptr, ...) @ok(i32 noundef %114, ptr noundef nonnull @.str.6, i32 noundef %112, i32 noundef %0) #3
%116 = getelementptr inbounds [8 x i32], ptr %3, i64 0, i64 6
%117 = load i32, ptr %116, align 8, !tbaa !5
%118 = icmp eq i32 %117, 262147
%119 = zext i1 %118 to i32
%120 = call i32 (i32, ptr, ...) @ok(i32 noundef %119, ptr noundef nonnull @.str.2, i32 noundef %117) #3
%121 = getelementptr inbounds [8 x i32], ptr %3, i64 0, i64 7
%122 = load i32, ptr %121, align 4, !tbaa !5
%123 = icmp eq i32 %122, 0
%124 = zext i1 %123 to i32
%125 = call i32 (i32, ptr, ...) @ok(i32 noundef %124, ptr noundef nonnull @.str.2, i32 noundef %122) #3
%126 = call i32 @LoadTypeLib(ptr noundef nonnull %10, ptr noundef nonnull %4) #3
%127 = load i32, ptr @S_OK, align 4, !tbaa !5
%128 = icmp eq i32 %126, %127
%129 = zext i1 %128 to i32
%130 = call i32 (i32, ptr, ...) @ok(i32 noundef %129, ptr noundef nonnull @.str.2, i32 noundef %126) #3
%131 = load ptr, ptr %4, align 8, !tbaa !9
%132 = call i32 @ITypeLib_GetLibAttr(ptr noundef %131, ptr noundef nonnull %5) #3
%133 = load i32, ptr @S_OK, align 4, !tbaa !5
%134 = icmp eq i32 %132, %133
%135 = zext i1 %134 to i32
%136 = call i32 (i32, ptr, ...) @ok(i32 noundef %135, ptr noundef nonnull @.str.2, i32 noundef %132) #3
%137 = load ptr, ptr %5, align 8, !tbaa !9
%138 = load i32, ptr %137, align 4, !tbaa !11
%139 = load i32, ptr @LIBFLAG_FHASDISKIMAGE, align 4, !tbaa !5
%140 = icmp eq i32 %138, %139
%141 = zext i1 %140 to i32
%142 = call i32 (i32, ptr, ...) @ok(i32 noundef %141, ptr noundef nonnull @.str.3, i32 noundef %138) #3
%143 = load ptr, ptr %4, align 8, !tbaa !9
%144 = load ptr, ptr %5, align 8, !tbaa !9
%145 = call i32 @ITypeLib_ReleaseTLibAttr(ptr noundef %143, ptr noundef %144) #3
%146 = load ptr, ptr %4, align 8, !tbaa !9
%147 = call i32 @ITypeLib_Release(ptr noundef %146) #3
%148 = call i32 @DeleteFileA(ptr noundef nonnull %9) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @GetTempFileNameA(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @MultiByteToWideChar(i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @CreateTypeLib2(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ok(i32 noundef, ptr noundef, ...) local_unnamed_addr #2
declare i32 @ICreateTypeLib2_QueryInterface(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ITypeLib_GetLibAttr(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ITypeLib_ReleaseTLibAttr(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ICreateTypeLib2_SetLcid(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ICreateTypeLib2_SetVersion(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ICreateTypeLib2_SaveAllChanges(ptr noundef) local_unnamed_addr #2
declare i32 @ITypeLib_Release(ptr noundef) local_unnamed_addr #2
declare i32 @ICreateTypeLib2_Release(ptr noundef) local_unnamed_addr #2
declare i64 @CreateFileA(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ReadFile(i64 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @CloseHandle(i64 noundef) local_unnamed_addr #2
declare i32 @LoadTypeLib(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @DeleteFileA(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"TYPE_4__", !6, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/oleaut32/extr_typelib.c_test_create_typelib_lcid.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/oleaut32/extr_typelib.c_test_create_typelib_lcid.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MAX_PATH = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [2 x i8] c".\00", align 1
@.str.1 = private unnamed_addr constant [4 x i8] c"tlb\00", align 1
@CP_ACP = common local_unnamed_addr global i32 0, align 4
@SYS_WIN32 = common local_unnamed_addr global i32 0, align 4
@S_OK = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [10 x i8] c"got %08x\0A\00", align 1
@IID_ITypeLib = common global i32 0, align 4
@.str.3 = private unnamed_addr constant [12 x i8] c"flags 0x%x\0A\00", align 1
@GENERIC_READ = common local_unnamed_addr global i32 0, align 4
@OPEN_EXISTING = common local_unnamed_addr global i32 0, align 4
@INVALID_HANDLE_VALUE = common local_unnamed_addr global i64 0, align 8
@.str.4 = private unnamed_addr constant [22 x i8] c"file creation failed\0A\00", align 1
@.str.5 = private unnamed_addr constant [9 x i8] c"read %d\0A\00", align 1
@.str.6 = private unnamed_addr constant [22 x i8] c"got %08x (lcid %08x)\0A\00", align 1
@LIBFLAG_FHASDISKIMAGE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @test_create_typelib_lcid], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @test_create_typelib_lcid(i32 noundef %0) #0 {
%2 = alloca ptr, align 8
%3 = alloca [8 x i32], align 4
%4 = alloca ptr, align 8
%5 = alloca ptr, align 8
%6 = alloca i32, align 4
%7 = load i32, ptr @MAX_PATH, align 4, !tbaa !6
%8 = zext i32 %7 to i64
%9 = alloca i8, i64 %8, align 1
%10 = alloca i32, i64 %8, align 4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
%11 = call i32 @GetTempFileNameA(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 0, ptr noundef nonnull %9) #3
%12 = load i32, ptr @CP_ACP, align 4, !tbaa !6
%13 = load i32, ptr @MAX_PATH, align 4, !tbaa !6
%14 = call i32 @MultiByteToWideChar(i32 noundef %12, i32 noundef 0, ptr noundef nonnull %9, i32 noundef -1, ptr noundef nonnull %10, i32 noundef %13) #3
%15 = load i32, ptr @SYS_WIN32, align 4, !tbaa !6
%16 = call i32 @CreateTypeLib2(i32 noundef %15, ptr noundef nonnull %10, ptr noundef nonnull %2) #3
%17 = load i32, ptr @S_OK, align 4, !tbaa !6
%18 = icmp eq i32 %16, %17
%19 = zext i1 %18 to i32
%20 = call i32 (i32, ptr, ...) @ok(i32 noundef %19, ptr noundef nonnull @.str.2, i32 noundef %16) #3
%21 = load ptr, ptr %2, align 8, !tbaa !10
%22 = call i32 @ICreateTypeLib2_QueryInterface(ptr noundef %21, ptr noundef nonnull @IID_ITypeLib, ptr noundef nonnull %4) #3
%23 = load i32, ptr @S_OK, align 4, !tbaa !6
%24 = icmp eq i32 %22, %23
%25 = zext i1 %24 to i32
%26 = call i32 (i32, ptr, ...) @ok(i32 noundef %25, ptr noundef nonnull @.str.2, i32 noundef %22) #3
%27 = load ptr, ptr %4, align 8, !tbaa !10
%28 = call i32 @ITypeLib_GetLibAttr(ptr noundef %27, ptr noundef nonnull %5) #3
%29 = load i32, ptr @S_OK, align 4, !tbaa !6
%30 = icmp eq i32 %28, %29
%31 = zext i1 %30 to i32
%32 = call i32 (i32, ptr, ...) @ok(i32 noundef %31, ptr noundef nonnull @.str.2, i32 noundef %28) #3
%33 = load ptr, ptr %5, align 8, !tbaa !10
%34 = load i32, ptr %33, align 4, !tbaa !12
%35 = icmp eq i32 %34, 0
%36 = zext i1 %35 to i32
%37 = call i32 (i32, ptr, ...) @ok(i32 noundef %36, ptr noundef nonnull @.str.3, i32 noundef %34) #3
%38 = load ptr, ptr %4, align 8, !tbaa !10
%39 = load ptr, ptr %5, align 8, !tbaa !10
%40 = call i32 @ITypeLib_ReleaseTLibAttr(ptr noundef %38, ptr noundef %39) #3
%41 = load ptr, ptr %2, align 8, !tbaa !10
%42 = call i32 @ICreateTypeLib2_SetLcid(ptr noundef %41, i32 noundef %0) #3
%43 = load i32, ptr @S_OK, align 4, !tbaa !6
%44 = icmp eq i32 %42, %43
%45 = zext i1 %44 to i32
%46 = call i32 (i32, ptr, ...) @ok(i32 noundef %45, ptr noundef nonnull @.str.2, i32 noundef %42) #3
%47 = load ptr, ptr %2, align 8, !tbaa !10
%48 = call i32 @ICreateTypeLib2_SetVersion(ptr noundef %47, i32 noundef 3, i32 noundef 4) #3
%49 = load i32, ptr @S_OK, align 4, !tbaa !6
%50 = icmp eq i32 %48, %49
%51 = zext i1 %50 to i32
%52 = call i32 (i32, ptr, ...) @ok(i32 noundef %51, ptr noundef nonnull @.str.2, i32 noundef %48) #3
%53 = load ptr, ptr %2, align 8, !tbaa !10
%54 = call i32 @ICreateTypeLib2_SaveAllChanges(ptr noundef %53) #3
%55 = load i32, ptr @S_OK, align 4, !tbaa !6
%56 = icmp eq i32 %54, %55
%57 = zext i1 %56 to i32
%58 = call i32 (i32, ptr, ...) @ok(i32 noundef %57, ptr noundef nonnull @.str.2, i32 noundef %54) #3
%59 = load ptr, ptr %4, align 8, !tbaa !10
%60 = call i32 @ITypeLib_GetLibAttr(ptr noundef %59, ptr noundef nonnull %5) #3
%61 = load i32, ptr @S_OK, align 4, !tbaa !6
%62 = icmp eq i32 %60, %61
%63 = zext i1 %62 to i32
%64 = call i32 (i32, ptr, ...) @ok(i32 noundef %63, ptr noundef nonnull @.str.2, i32 noundef %60) #3
%65 = load ptr, ptr %5, align 8, !tbaa !10
%66 = load i32, ptr %65, align 4, !tbaa !12
%67 = icmp eq i32 %66, 0
%68 = zext i1 %67 to i32
%69 = call i32 (i32, ptr, ...) @ok(i32 noundef %68, ptr noundef nonnull @.str.3, i32 noundef %66) #3
%70 = load ptr, ptr %4, align 8, !tbaa !10
%71 = load ptr, ptr %5, align 8, !tbaa !10
%72 = call i32 @ITypeLib_ReleaseTLibAttr(ptr noundef %70, ptr noundef %71) #3
%73 = load ptr, ptr %4, align 8, !tbaa !10
%74 = call i32 @ITypeLib_Release(ptr noundef %73) #3
%75 = load ptr, ptr %2, align 8, !tbaa !10
%76 = call i32 @ICreateTypeLib2_Release(ptr noundef %75) #3
%77 = load i32, ptr @GENERIC_READ, align 4, !tbaa !6
%78 = load i32, ptr @OPEN_EXISTING, align 4, !tbaa !6
%79 = call i64 @CreateFileA(ptr noundef nonnull %9, i32 noundef %77, i32 noundef 0, ptr noundef null, i32 noundef %78, i32 noundef 0, i32 noundef 0) #3
%80 = load i64, ptr @INVALID_HANDLE_VALUE, align 8, !tbaa !14
%81 = icmp ne i64 %79, %80
%82 = zext i1 %81 to i32
%83 = call i32 (i32, ptr, ...) @ok(i32 noundef %82, ptr noundef nonnull @.str.4) #3
%84 = call i32 @ReadFile(i64 noundef %79, ptr noundef nonnull %3, i32 noundef 32, ptr noundef nonnull %6, ptr noundef null) #3
%85 = load i32, ptr %6, align 4, !tbaa !6
%86 = icmp eq i32 %85, 32
%87 = zext i1 %86 to i32
%88 = call i32 (i32, ptr, ...) @ok(i32 noundef %87, ptr noundef nonnull @.str.5, i32 noundef %85) #3
%89 = call i32 @CloseHandle(i64 noundef %79) #3
%90 = load i32, ptr %3, align 4, !tbaa !6
%91 = icmp eq i32 %90, 1413894989
%92 = zext i1 %91 to i32
%93 = call i32 (i32, ptr, ...) @ok(i32 noundef %92, ptr noundef nonnull @.str.2, i32 noundef %90) #3
%94 = getelementptr inbounds i8, ptr %3, i64 4
%95 = load i32, ptr %94, align 4, !tbaa !6
%96 = icmp eq i32 %95, 65538
%97 = zext i1 %96 to i32
%98 = call i32 (i32, ptr, ...) @ok(i32 noundef %97, ptr noundef nonnull @.str.2, i32 noundef %95) #3
%99 = getelementptr inbounds i8, ptr %3, i64 8
%100 = load i32, ptr %99, align 4, !tbaa !6
%101 = icmp eq i32 %100, -1
%102 = zext i1 %101 to i32
%103 = call i32 (i32, ptr, ...) @ok(i32 noundef %102, ptr noundef nonnull @.str.2, i32 noundef %100) #3
%104 = getelementptr inbounds i8, ptr %3, i64 12
%105 = load i32, ptr %104, align 4, !tbaa !6
%106 = icmp eq i32 %0, 0
%107 = select i1 %106, i32 1033, i32 %0
%108 = icmp eq i32 %105, %107
%109 = zext i1 %108 to i32
%110 = call i32 (i32, ptr, ...) @ok(i32 noundef %109, ptr noundef nonnull @.str.6, i32 noundef %105, i32 noundef %0) #3
%111 = getelementptr inbounds i8, ptr %3, i64 16
%112 = load i32, ptr %111, align 4, !tbaa !6
%113 = icmp eq i32 %112, %0
%114 = zext i1 %113 to i32
%115 = call i32 (i32, ptr, ...) @ok(i32 noundef %114, ptr noundef nonnull @.str.6, i32 noundef %112, i32 noundef %0) #3
%116 = getelementptr inbounds i8, ptr %3, i64 24
%117 = load i32, ptr %116, align 4, !tbaa !6
%118 = icmp eq i32 %117, 262147
%119 = zext i1 %118 to i32
%120 = call i32 (i32, ptr, ...) @ok(i32 noundef %119, ptr noundef nonnull @.str.2, i32 noundef %117) #3
%121 = getelementptr inbounds i8, ptr %3, i64 28
%122 = load i32, ptr %121, align 4, !tbaa !6
%123 = icmp eq i32 %122, 0
%124 = zext i1 %123 to i32
%125 = call i32 (i32, ptr, ...) @ok(i32 noundef %124, ptr noundef nonnull @.str.2, i32 noundef %122) #3
%126 = call i32 @LoadTypeLib(ptr noundef nonnull %10, ptr noundef nonnull %4) #3
%127 = load i32, ptr @S_OK, align 4, !tbaa !6
%128 = icmp eq i32 %126, %127
%129 = zext i1 %128 to i32
%130 = call i32 (i32, ptr, ...) @ok(i32 noundef %129, ptr noundef nonnull @.str.2, i32 noundef %126) #3
%131 = load ptr, ptr %4, align 8, !tbaa !10
%132 = call i32 @ITypeLib_GetLibAttr(ptr noundef %131, ptr noundef nonnull %5) #3
%133 = load i32, ptr @S_OK, align 4, !tbaa !6
%134 = icmp eq i32 %132, %133
%135 = zext i1 %134 to i32
%136 = call i32 (i32, ptr, ...) @ok(i32 noundef %135, ptr noundef nonnull @.str.2, i32 noundef %132) #3
%137 = load ptr, ptr %5, align 8, !tbaa !10
%138 = load i32, ptr %137, align 4, !tbaa !12
%139 = load i32, ptr @LIBFLAG_FHASDISKIMAGE, align 4, !tbaa !6
%140 = icmp eq i32 %138, %139
%141 = zext i1 %140 to i32
%142 = call i32 (i32, ptr, ...) @ok(i32 noundef %141, ptr noundef nonnull @.str.3, i32 noundef %138) #3
%143 = load ptr, ptr %4, align 8, !tbaa !10
%144 = load ptr, ptr %5, align 8, !tbaa !10
%145 = call i32 @ITypeLib_ReleaseTLibAttr(ptr noundef %143, ptr noundef %144) #3
%146 = load ptr, ptr %4, align 8, !tbaa !10
%147 = call i32 @ITypeLib_Release(ptr noundef %146) #3
%148 = call i32 @DeleteFileA(ptr noundef nonnull %9) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @GetTempFileNameA(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @MultiByteToWideChar(i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @CreateTypeLib2(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ok(i32 noundef, ptr noundef, ...) local_unnamed_addr #2
declare i32 @ICreateTypeLib2_QueryInterface(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ITypeLib_GetLibAttr(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ITypeLib_ReleaseTLibAttr(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ICreateTypeLib2_SetLcid(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ICreateTypeLib2_SetVersion(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ICreateTypeLib2_SaveAllChanges(ptr noundef) local_unnamed_addr #2
declare i32 @ITypeLib_Release(ptr noundef) local_unnamed_addr #2
declare i32 @ICreateTypeLib2_Release(ptr noundef) local_unnamed_addr #2
declare i64 @CreateFileA(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ReadFile(i64 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @CloseHandle(i64 noundef) local_unnamed_addr #2
declare i32 @LoadTypeLib(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @DeleteFileA(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"TYPE_4__", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !8, i64 0}
| reactos_modules_rostests_winetests_oleaut32_extr_typelib.c_test_create_typelib_lcid |
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_tree-vect-transform.c_vect_gen_niters_for_prolog_loop.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_tree-vect-transform.c_vect_gen_niters_for_prolog_loop.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { ptr }
@BITS_PER_UNIT = dso_local local_unnamed_addr global i32 0, align 4
@REPORT_DETAILS = dso_local local_unnamed_addr global i32 0, align 4
@vect_dump = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [22 x i8] c"known alignment = %d.\00", align 1
@NULL_TREE = dso_local local_unnamed_addr global i64 0, align 8
@lang_hooks = dso_local local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 8
@BIT_AND_EXPR = dso_local local_unnamed_addr global i32 0, align 4
@RSHIFT_EXPR = dso_local local_unnamed_addr global i32 0, align 4
@MINUS_EXPR = dso_local local_unnamed_addr global i32 0, align 4
@INTEGER_CST = dso_local local_unnamed_addr global i64 0, align 8
@MIN_EXPR = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [25 x i8] c"niters for prolog loop: \00", align 1
@TDF_SLIM = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [19 x i8] c"prolog_loop_niters\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @vect_gen_niters_for_prolog_loop], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @vect_gen_niters_for_prolog_loop(i32 noundef %0, i64 noundef %1) #0 {
%3 = alloca i64, align 8
%4 = alloca i64, align 8
%5 = tail call ptr @LOOP_VINFO_UNALIGNED_DR(i32 noundef %0) #3
%6 = tail call i32 @LOOP_VINFO_VECT_FACTOR(i32 noundef %0) #3
%7 = tail call ptr @LOOP_VINFO_LOOP(i32 noundef %0) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%8 = tail call i64 @DR_STMT(ptr noundef %5) #3
%9 = tail call i32 @vinfo_for_stmt(i64 noundef %8) #3
%10 = tail call i64 @STMT_VINFO_VECTYPE(i32 noundef %9) #3
%11 = tail call i32 @TYPE_ALIGN(i64 noundef %10) #3
%12 = load i32, ptr @BITS_PER_UNIT, align 4, !tbaa !5
%13 = sdiv i32 %11, %12
%14 = tail call i64 @TREE_TYPE(i64 noundef %1) #3
%15 = tail call i32 @loop_preheader_edge(ptr noundef %7) #3
%16 = tail call i32 @LOOP_PEELING_FOR_ALIGNMENT(i32 noundef %0) #3
%17 = icmp sgt i32 %16, 0
br i1 %17, label %18, label %33
18: ; preds = %2
%19 = tail call i32 @LOOP_PEELING_FOR_ALIGNMENT(i32 noundef %0) #3
%20 = sdiv i32 %13, %6
%21 = sdiv i32 %19, %20
%22 = load i32, ptr @REPORT_DETAILS, align 4, !tbaa !5
%23 = tail call i64 @vect_print_dump_info(i32 noundef %22) #3
%24 = icmp eq i64 %23, 0
br i1 %24, label %28, label %25
25: ; preds = %18
%26 = load i32, ptr @vect_dump, align 4, !tbaa !5
%27 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %26, ptr noundef nonnull @.str, i32 noundef %19) #3
br label %28
28: ; preds = %25, %18
%29 = sub nsw i32 %6, %21
%30 = add nsw i32 %6, -1
%31 = and i32 %29, %30
%32 = tail call i64 @build_int_cst(i64 noundef %14, i32 noundef %31) #3
br label %63
33: ; preds = %2
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%34 = load i64, ptr @NULL_TREE, align 8, !tbaa !9
store i64 %34, ptr %4, align 8, !tbaa !9
%35 = call i64 @vect_create_addr_base_for_vector_ref(i64 noundef %8, ptr noundef nonnull %4, i64 noundef %34) #3
%36 = call i64 @TREE_TYPE(i64 noundef %35) #3
%37 = call i64 @TYPE_SIZE(i64 noundef %36) #3
%38 = load ptr, ptr @lang_hooks, align 8, !tbaa !11
%39 = call i32 @tree_low_cst(i64 noundef %37, i32 noundef 1) #3
%40 = call i64 %38(i32 noundef %39, i32 noundef 1) #3
%41 = add nsw i32 %13, -1
%42 = call i64 @build_int_cst(i64 noundef %40, i32 noundef %41) #3
%43 = sdiv i32 %13, %6
%44 = call i32 @exact_log2(i32 noundef %43) #3
%45 = call i64 @build_int_cst(i64 noundef %40, i32 noundef %44) #3
%46 = add nsw i32 %6, -1
%47 = call i64 @build_int_cst(i64 noundef %40, i32 noundef %46) #3
%48 = call i64 @build_int_cst(i64 noundef %40, i32 noundef %6) #3
%49 = load i64, ptr %4, align 8, !tbaa !9
%50 = call i32 @bsi_insert_on_edge_immediate(i32 noundef %15, i64 noundef %49) #3
%51 = icmp eq i32 %50, 0
%52 = zext i1 %51 to i32
%53 = call i32 @gcc_assert(i32 noundef %52) #3
%54 = load i32, ptr @BIT_AND_EXPR, align 4, !tbaa !5
%55 = call i64 @build2(i32 noundef %54, i64 noundef %40, i64 noundef %35, i64 noundef %42) #3
%56 = load i32, ptr @RSHIFT_EXPR, align 4, !tbaa !5
%57 = call i64 @build2(i32 noundef %56, i64 noundef %40, i64 noundef %55, i64 noundef %45) #3
%58 = load i32, ptr @MINUS_EXPR, align 4, !tbaa !5
%59 = call i64 @build2(i32 noundef %58, i64 noundef %40, i64 noundef %48, i64 noundef %57) #3
%60 = load i32, ptr @BIT_AND_EXPR, align 4, !tbaa !5
%61 = call i64 @build2(i32 noundef %60, i64 noundef %40, i64 noundef %59, i64 noundef %47) #3
%62 = call i64 @fold_convert(i64 noundef %14, i64 noundef %61) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
br label %63
63: ; preds = %33, %28
%64 = phi i64 [ %32, %28 ], [ %62, %33 ]
%65 = call i64 @TREE_CODE(i64 noundef %1) #3
%66 = load i64, ptr @INTEGER_CST, align 8, !tbaa !9
%67 = icmp eq i64 %65, %66
br i1 %67, label %71, label %68
68: ; preds = %63
%69 = load i32, ptr @MIN_EXPR, align 4, !tbaa !5
%70 = call i64 @build2(i32 noundef %69, i64 noundef %14, i64 noundef %64, i64 noundef %1) #3
br label %71
71: ; preds = %68, %63
%72 = phi i64 [ %70, %68 ], [ %64, %63 ]
%73 = load i32, ptr @REPORT_DETAILS, align 4, !tbaa !5
%74 = call i64 @vect_print_dump_info(i32 noundef %73) #3
%75 = icmp eq i64 %74, 0
br i1 %75, label %82, label %76
76: ; preds = %71
%77 = load i32, ptr @vect_dump, align 4, !tbaa !5
%78 = call i32 (i32, ptr, ...) @fprintf(i32 noundef %77, ptr noundef nonnull @.str.1) #3
%79 = load i32, ptr @vect_dump, align 4, !tbaa !5
%80 = load i32, ptr @TDF_SLIM, align 4, !tbaa !5
%81 = call i32 @print_generic_expr(i32 noundef %79, i64 noundef %72, i32 noundef %80) #3
br label %82
82: ; preds = %76, %71
%83 = call i64 @create_tmp_var(i64 noundef %14, ptr noundef nonnull @.str.2) #3
%84 = call i32 @add_referenced_var(i64 noundef %83) #3
%85 = call i64 @force_gimple_operand(i64 noundef %72, ptr noundef nonnull %3, i32 noundef 0, i64 noundef %83) #3
%86 = load i64, ptr %3, align 8, !tbaa !9
%87 = icmp eq i64 %86, 0
br i1 %87, label %93, label %88
88: ; preds = %82
%89 = call i32 @bsi_insert_on_edge_immediate(i32 noundef %15, i64 noundef %86) #3
%90 = icmp eq i32 %89, 0
%91 = zext i1 %90 to i32
%92 = call i32 @gcc_assert(i32 noundef %91) #3
br label %93
93: ; preds = %88, %82
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i64 %85
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @LOOP_VINFO_UNALIGNED_DR(i32 noundef) local_unnamed_addr #2
declare i32 @LOOP_VINFO_VECT_FACTOR(i32 noundef) local_unnamed_addr #2
declare ptr @LOOP_VINFO_LOOP(i32 noundef) local_unnamed_addr #2
declare i64 @DR_STMT(ptr noundef) local_unnamed_addr #2
declare i32 @vinfo_for_stmt(i64 noundef) local_unnamed_addr #2
declare i64 @STMT_VINFO_VECTYPE(i32 noundef) local_unnamed_addr #2
declare i32 @TYPE_ALIGN(i64 noundef) local_unnamed_addr #2
declare i64 @TREE_TYPE(i64 noundef) local_unnamed_addr #2
declare i32 @loop_preheader_edge(ptr noundef) local_unnamed_addr #2
declare i32 @LOOP_PEELING_FOR_ALIGNMENT(i32 noundef) local_unnamed_addr #2
declare i64 @vect_print_dump_info(i32 noundef) local_unnamed_addr #2
declare i32 @fprintf(i32 noundef, ptr noundef, ...) local_unnamed_addr #2
declare i64 @build_int_cst(i64 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i64 @vect_create_addr_base_for_vector_ref(i64 noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @TYPE_SIZE(i64 noundef) local_unnamed_addr #2
declare i32 @tree_low_cst(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @exact_log2(i32 noundef) local_unnamed_addr #2
declare i32 @bsi_insert_on_edge_immediate(i32 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @gcc_assert(i32 noundef) local_unnamed_addr #2
declare i64 @build2(i32 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #2
declare i64 @fold_convert(i64 noundef, i64 noundef) local_unnamed_addr #2
declare i64 @TREE_CODE(i64 noundef) local_unnamed_addr #2
declare i32 @print_generic_expr(i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @create_tmp_var(i64 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @add_referenced_var(i64 noundef) local_unnamed_addr #2
declare i64 @force_gimple_operand(i64 noundef, ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !14, i64 0}
!12 = !{!"TYPE_4__", !13, i64 0}
!13 = !{!"TYPE_3__", !14, i64 0}
!14 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_tree-vect-transform.c_vect_gen_niters_for_prolog_loop.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_tree-vect-transform.c_vect_gen_niters_for_prolog_loop.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { ptr }
@BITS_PER_UNIT = common local_unnamed_addr global i32 0, align 4
@REPORT_DETAILS = common local_unnamed_addr global i32 0, align 4
@vect_dump = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [22 x i8] c"known alignment = %d.\00", align 1
@NULL_TREE = common local_unnamed_addr global i64 0, align 8
@lang_hooks = common local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 8
@BIT_AND_EXPR = common local_unnamed_addr global i32 0, align 4
@RSHIFT_EXPR = common local_unnamed_addr global i32 0, align 4
@MINUS_EXPR = common local_unnamed_addr global i32 0, align 4
@INTEGER_CST = common local_unnamed_addr global i64 0, align 8
@MIN_EXPR = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [25 x i8] c"niters for prolog loop: \00", align 1
@TDF_SLIM = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [19 x i8] c"prolog_loop_niters\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @vect_gen_niters_for_prolog_loop], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @vect_gen_niters_for_prolog_loop(i32 noundef %0, i64 noundef %1) #0 {
%3 = alloca i64, align 8
%4 = alloca i64, align 8
%5 = tail call ptr @LOOP_VINFO_UNALIGNED_DR(i32 noundef %0) #3
%6 = tail call i32 @LOOP_VINFO_VECT_FACTOR(i32 noundef %0) #3
%7 = tail call ptr @LOOP_VINFO_LOOP(i32 noundef %0) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%8 = tail call i64 @DR_STMT(ptr noundef %5) #3
%9 = tail call i32 @vinfo_for_stmt(i64 noundef %8) #3
%10 = tail call i64 @STMT_VINFO_VECTYPE(i32 noundef %9) #3
%11 = tail call i32 @TYPE_ALIGN(i64 noundef %10) #3
%12 = load i32, ptr @BITS_PER_UNIT, align 4, !tbaa !6
%13 = sdiv i32 %11, %12
%14 = tail call i64 @TREE_TYPE(i64 noundef %1) #3
%15 = tail call i32 @loop_preheader_edge(ptr noundef %7) #3
%16 = tail call i32 @LOOP_PEELING_FOR_ALIGNMENT(i32 noundef %0) #3
%17 = icmp sgt i32 %16, 0
br i1 %17, label %18, label %33
18: ; preds = %2
%19 = tail call i32 @LOOP_PEELING_FOR_ALIGNMENT(i32 noundef %0) #3
%20 = sdiv i32 %13, %6
%21 = sdiv i32 %19, %20
%22 = load i32, ptr @REPORT_DETAILS, align 4, !tbaa !6
%23 = tail call i64 @vect_print_dump_info(i32 noundef %22) #3
%24 = icmp eq i64 %23, 0
br i1 %24, label %28, label %25
25: ; preds = %18
%26 = load i32, ptr @vect_dump, align 4, !tbaa !6
%27 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %26, ptr noundef nonnull @.str, i32 noundef %19) #3
br label %28
28: ; preds = %25, %18
%29 = sub nsw i32 %6, %21
%30 = add nsw i32 %6, -1
%31 = and i32 %29, %30
%32 = tail call i64 @build_int_cst(i64 noundef %14, i32 noundef %31) #3
br label %63
33: ; preds = %2
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%34 = load i64, ptr @NULL_TREE, align 8, !tbaa !10
store i64 %34, ptr %4, align 8, !tbaa !10
%35 = call i64 @vect_create_addr_base_for_vector_ref(i64 noundef %8, ptr noundef nonnull %4, i64 noundef %34) #3
%36 = call i64 @TREE_TYPE(i64 noundef %35) #3
%37 = call i64 @TYPE_SIZE(i64 noundef %36) #3
%38 = load ptr, ptr @lang_hooks, align 8, !tbaa !12
%39 = call i32 @tree_low_cst(i64 noundef %37, i32 noundef 1) #3
%40 = call i64 %38(i32 noundef %39, i32 noundef 1) #3
%41 = add nsw i32 %13, -1
%42 = call i64 @build_int_cst(i64 noundef %40, i32 noundef %41) #3
%43 = sdiv i32 %13, %6
%44 = call i32 @exact_log2(i32 noundef %43) #3
%45 = call i64 @build_int_cst(i64 noundef %40, i32 noundef %44) #3
%46 = add nsw i32 %6, -1
%47 = call i64 @build_int_cst(i64 noundef %40, i32 noundef %46) #3
%48 = call i64 @build_int_cst(i64 noundef %40, i32 noundef %6) #3
%49 = load i64, ptr %4, align 8, !tbaa !10
%50 = call i32 @bsi_insert_on_edge_immediate(i32 noundef %15, i64 noundef %49) #3
%51 = icmp eq i32 %50, 0
%52 = zext i1 %51 to i32
%53 = call i32 @gcc_assert(i32 noundef %52) #3
%54 = load i32, ptr @BIT_AND_EXPR, align 4, !tbaa !6
%55 = call i64 @build2(i32 noundef %54, i64 noundef %40, i64 noundef %35, i64 noundef %42) #3
%56 = load i32, ptr @RSHIFT_EXPR, align 4, !tbaa !6
%57 = call i64 @build2(i32 noundef %56, i64 noundef %40, i64 noundef %55, i64 noundef %45) #3
%58 = load i32, ptr @MINUS_EXPR, align 4, !tbaa !6
%59 = call i64 @build2(i32 noundef %58, i64 noundef %40, i64 noundef %48, i64 noundef %57) #3
%60 = load i32, ptr @BIT_AND_EXPR, align 4, !tbaa !6
%61 = call i64 @build2(i32 noundef %60, i64 noundef %40, i64 noundef %59, i64 noundef %47) #3
%62 = call i64 @fold_convert(i64 noundef %14, i64 noundef %61) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
br label %63
63: ; preds = %33, %28
%64 = phi i64 [ %32, %28 ], [ %62, %33 ]
%65 = call i64 @TREE_CODE(i64 noundef %1) #3
%66 = load i64, ptr @INTEGER_CST, align 8, !tbaa !10
%67 = icmp eq i64 %65, %66
br i1 %67, label %71, label %68
68: ; preds = %63
%69 = load i32, ptr @MIN_EXPR, align 4, !tbaa !6
%70 = call i64 @build2(i32 noundef %69, i64 noundef %14, i64 noundef %64, i64 noundef %1) #3
br label %71
71: ; preds = %68, %63
%72 = phi i64 [ %70, %68 ], [ %64, %63 ]
%73 = load i32, ptr @REPORT_DETAILS, align 4, !tbaa !6
%74 = call i64 @vect_print_dump_info(i32 noundef %73) #3
%75 = icmp eq i64 %74, 0
br i1 %75, label %82, label %76
76: ; preds = %71
%77 = load i32, ptr @vect_dump, align 4, !tbaa !6
%78 = call i32 (i32, ptr, ...) @fprintf(i32 noundef %77, ptr noundef nonnull @.str.1) #3
%79 = load i32, ptr @vect_dump, align 4, !tbaa !6
%80 = load i32, ptr @TDF_SLIM, align 4, !tbaa !6
%81 = call i32 @print_generic_expr(i32 noundef %79, i64 noundef %72, i32 noundef %80) #3
br label %82
82: ; preds = %76, %71
%83 = call i64 @create_tmp_var(i64 noundef %14, ptr noundef nonnull @.str.2) #3
%84 = call i32 @add_referenced_var(i64 noundef %83) #3
%85 = call i64 @force_gimple_operand(i64 noundef %72, ptr noundef nonnull %3, i32 noundef 0, i64 noundef %83) #3
%86 = load i64, ptr %3, align 8, !tbaa !10
%87 = icmp eq i64 %86, 0
br i1 %87, label %93, label %88
88: ; preds = %82
%89 = call i32 @bsi_insert_on_edge_immediate(i32 noundef %15, i64 noundef %86) #3
%90 = icmp eq i32 %89, 0
%91 = zext i1 %90 to i32
%92 = call i32 @gcc_assert(i32 noundef %91) #3
br label %93
93: ; preds = %88, %82
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i64 %85
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @LOOP_VINFO_UNALIGNED_DR(i32 noundef) local_unnamed_addr #2
declare i32 @LOOP_VINFO_VECT_FACTOR(i32 noundef) local_unnamed_addr #2
declare ptr @LOOP_VINFO_LOOP(i32 noundef) local_unnamed_addr #2
declare i64 @DR_STMT(ptr noundef) local_unnamed_addr #2
declare i32 @vinfo_for_stmt(i64 noundef) local_unnamed_addr #2
declare i64 @STMT_VINFO_VECTYPE(i32 noundef) local_unnamed_addr #2
declare i32 @TYPE_ALIGN(i64 noundef) local_unnamed_addr #2
declare i64 @TREE_TYPE(i64 noundef) local_unnamed_addr #2
declare i32 @loop_preheader_edge(ptr noundef) local_unnamed_addr #2
declare i32 @LOOP_PEELING_FOR_ALIGNMENT(i32 noundef) local_unnamed_addr #2
declare i64 @vect_print_dump_info(i32 noundef) local_unnamed_addr #2
declare i32 @fprintf(i32 noundef, ptr noundef, ...) local_unnamed_addr #2
declare i64 @build_int_cst(i64 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i64 @vect_create_addr_base_for_vector_ref(i64 noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @TYPE_SIZE(i64 noundef) local_unnamed_addr #2
declare i32 @tree_low_cst(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @exact_log2(i32 noundef) local_unnamed_addr #2
declare i32 @bsi_insert_on_edge_immediate(i32 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @gcc_assert(i32 noundef) local_unnamed_addr #2
declare i64 @build2(i32 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #2
declare i64 @fold_convert(i64 noundef, i64 noundef) local_unnamed_addr #2
declare i64 @TREE_CODE(i64 noundef) local_unnamed_addr #2
declare i32 @print_generic_expr(i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @create_tmp_var(i64 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @add_referenced_var(i64 noundef) local_unnamed_addr #2
declare i64 @force_gimple_operand(i64 noundef, ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !15, i64 0}
!13 = !{!"TYPE_4__", !14, i64 0}
!14 = !{!"TYPE_3__", !15, i64 0}
!15 = !{!"any pointer", !8, i64 0}
| freebsd_contrib_gcc_extr_tree-vect-transform.c_vect_gen_niters_for_prolog_loop |
; ModuleID = 'AnghaBench/radare2/libr/asm/arch/xtensa/gnu/extr_xtensa-modules.c_Opcode_sub_Slot_inst_encode.c'
source_filename = "AnghaBench/radare2/libr/asm/arch/xtensa/gnu/extr_xtensa-modules.c_Opcode_sub_Slot_inst_encode.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @Opcode_sub_Slot_inst_encode], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable
define internal void @Opcode_sub_Slot_inst_encode(ptr nocapture noundef writeonly %0) #0 {
store i32 12582912, ptr %0, align 4, !tbaa !5
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/radare2/libr/asm/arch/xtensa/gnu/extr_xtensa-modules.c_Opcode_sub_Slot_inst_encode.c'
source_filename = "AnghaBench/radare2/libr/asm/arch/xtensa/gnu/extr_xtensa-modules.c_Opcode_sub_Slot_inst_encode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @Opcode_sub_Slot_inst_encode], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync)
define internal void @Opcode_sub_Slot_inst_encode(ptr nocapture noundef writeonly %0) #0 {
store i32 12582912, ptr %0, align 4, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| radare2_libr_asm_arch_xtensa_gnu_extr_xtensa-modules.c_Opcode_sub_Slot_inst_encode |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/zydas/zd1211rw/extr_zd_chip.c_zd_chip_generic_patch_6m_band.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/zydas/zd1211rw/extr_zd_chip.c_zd_chip_generic_patch_6m_band.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.zd_ioreq16 = type { i32, i32, i32 }
@ZD_CR128 = dso_local local_unnamed_addr global i32 0, align 4
@ZD_CR129 = dso_local local_unnamed_addr global i32 0, align 4
@ZD_CR130 = dso_local local_unnamed_addr global i32 0, align 4
@ZD_CR47 = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"patching for channel %d\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local i32 @zd_chip_generic_patch_6m_band(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = alloca [4 x %struct.zd_ioreq16], align 16
call void @llvm.lifetime.start.p0(i64 48, ptr nonnull %3) #3
%4 = load i32, ptr @ZD_CR128, align 4, !tbaa !5
store i32 %4, ptr %3, align 16, !tbaa !9
%5 = getelementptr inbounds %struct.zd_ioreq16, ptr %3, i64 0, i32 1
store i32 20, ptr %5, align 4, !tbaa !11
%6 = getelementptr inbounds %struct.zd_ioreq16, ptr %3, i64 0, i32 2
store i32 0, ptr %6, align 8, !tbaa !12
%7 = getelementptr inbounds %struct.zd_ioreq16, ptr %3, i64 1
%8 = load i32, ptr @ZD_CR129, align 4, !tbaa !5
store i32 %8, ptr %7, align 4, !tbaa !9
%9 = getelementptr inbounds %struct.zd_ioreq16, ptr %3, i64 1, i32 1
store i32 18, ptr %9, align 16, !tbaa !11
%10 = getelementptr inbounds %struct.zd_ioreq16, ptr %3, i64 1, i32 2
store i32 0, ptr %10, align 4, !tbaa !12
%11 = getelementptr inbounds %struct.zd_ioreq16, ptr %3, i64 2
%12 = load i32, ptr @ZD_CR130, align 4, !tbaa !5
store i32 %12, ptr %11, align 8, !tbaa !9
%13 = getelementptr inbounds %struct.zd_ioreq16, ptr %3, i64 2, i32 1
store i32 16, ptr %13, align 4, !tbaa !11
%14 = getelementptr inbounds %struct.zd_ioreq16, ptr %3, i64 2, i32 2
store i32 0, ptr %14, align 16, !tbaa !12
%15 = getelementptr inbounds %struct.zd_ioreq16, ptr %3, i64 3
%16 = load i32, ptr @ZD_CR47, align 4, !tbaa !5
store i32 %16, ptr %15, align 4, !tbaa !9
%17 = getelementptr inbounds %struct.zd_ioreq16, ptr %3, i64 3, i32 1
store i32 30, ptr %17, align 8, !tbaa !11
%18 = getelementptr inbounds %struct.zd_ioreq16, ptr %3, i64 3, i32 2
store i32 0, ptr %18, align 4, !tbaa !12
switch i32 %1, label %20 [
i32 11, label %19
i32 1, label %19
]
19: ; preds = %2, %2
store i32 18, ptr %5, align 4, !tbaa !11
br label %20
20: ; preds = %2, %19
%21 = tail call i32 @zd_chip_dev(ptr noundef %0) #3
%22 = tail call i32 @dev_dbg_f(i32 noundef %21, ptr noundef nonnull @.str, i32 noundef %1) #3
%23 = call i32 @ARRAY_SIZE(ptr noundef nonnull %3) #3
%24 = call i32 @zd_iowrite16a_locked(ptr noundef %0, ptr noundef nonnull %3, i32 noundef %23) #3
call void @llvm.lifetime.end.p0(i64 48, ptr nonnull %3) #3
ret i32 %24
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @dev_dbg_f(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @zd_chip_dev(ptr noundef) local_unnamed_addr #2
declare i32 @zd_iowrite16a_locked(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"zd_ioreq16", !6, i64 0, !6, i64 4, !6, i64 8}
!11 = !{!10, !6, i64 4}
!12 = !{!10, !6, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/zydas/zd1211rw/extr_zd_chip.c_zd_chip_generic_patch_6m_band.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/zydas/zd1211rw/extr_zd_chip.c_zd_chip_generic_patch_6m_band.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.zd_ioreq16 = type { i32, i32, i32 }
@ZD_CR128 = common local_unnamed_addr global i32 0, align 4
@ZD_CR129 = common local_unnamed_addr global i32 0, align 4
@ZD_CR130 = common local_unnamed_addr global i32 0, align 4
@ZD_CR47 = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"patching for channel %d\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @zd_chip_generic_patch_6m_band(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = alloca [4 x %struct.zd_ioreq16], align 4
call void @llvm.lifetime.start.p0(i64 48, ptr nonnull %3) #3
%4 = load i32, ptr @ZD_CR128, align 4, !tbaa !6
store i32 %4, ptr %3, align 4, !tbaa !10
%5 = getelementptr inbounds i8, ptr %3, i64 4
store <2 x i32> <i32 20, i32 0>, ptr %5, align 4, !tbaa !6
%6 = getelementptr inbounds i8, ptr %3, i64 12
%7 = load i32, ptr @ZD_CR129, align 4, !tbaa !6
store i32 %7, ptr %6, align 4, !tbaa !10
%8 = getelementptr inbounds i8, ptr %3, i64 16
store <2 x i32> <i32 18, i32 0>, ptr %8, align 4, !tbaa !6
%9 = getelementptr inbounds i8, ptr %3, i64 24
%10 = load i32, ptr @ZD_CR130, align 4, !tbaa !6
store i32 %10, ptr %9, align 4, !tbaa !10
%11 = getelementptr inbounds i8, ptr %3, i64 28
store <2 x i32> <i32 16, i32 0>, ptr %11, align 4, !tbaa !6
%12 = getelementptr inbounds i8, ptr %3, i64 36
%13 = load i32, ptr @ZD_CR47, align 4, !tbaa !6
store i32 %13, ptr %12, align 4, !tbaa !10
%14 = getelementptr inbounds i8, ptr %3, i64 40
store <2 x i32> <i32 30, i32 0>, ptr %14, align 4, !tbaa !6
switch i32 %1, label %16 [
i32 11, label %15
i32 1, label %15
]
15: ; preds = %2, %2
store i32 18, ptr %5, align 4, !tbaa !12
br label %16
16: ; preds = %2, %15
%17 = tail call i32 @zd_chip_dev(ptr noundef %0) #3
%18 = tail call i32 @dev_dbg_f(i32 noundef %17, ptr noundef nonnull @.str, i32 noundef %1) #3
%19 = call i32 @ARRAY_SIZE(ptr noundef nonnull %3) #3
%20 = call i32 @zd_iowrite16a_locked(ptr noundef %0, ptr noundef nonnull %3, i32 noundef %19) #3
call void @llvm.lifetime.end.p0(i64 48, ptr nonnull %3) #3
ret i32 %20
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @dev_dbg_f(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @zd_chip_dev(ptr noundef) local_unnamed_addr #2
declare i32 @zd_iowrite16a_locked(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"zd_ioreq16", !7, i64 0, !7, i64 4, !7, i64 8}
!12 = !{!11, !7, i64 4}
| linux_drivers_net_wireless_zydas_zd1211rw_extr_zd_chip.c_zd_chip_generic_patch_6m_band |
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/kern/extr_kern_stackshot.c_kdp_copyin.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/kern/extr_kern_stackshot.c_kdp_copyin.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PAGE_SIZE = dso_local local_unnamed_addr global i64 0, align 8
@PAGE_MASK = dso_local local_unnamed_addr global i64 0, align 8
@FALSE = dso_local local_unnamed_addr global i32 0, align 4
@gPanicBase = dso_local local_unnamed_addr global i64 0, align 8
@gPanicSize = dso_local local_unnamed_addr global i64 0, align 8
@panic_stackshot = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @kdp_copyin(i32 noundef %0, i64 noundef %1, ptr noundef %2, i64 noundef %3, i32 noundef %4, ptr noundef %5) local_unnamed_addr #0 {
%7 = icmp eq i64 %3, 0
br i1 %7, label %32, label %8
8: ; preds = %6, %26
%9 = phi i64 [ %28, %26 ], [ %1, %6 ]
%10 = phi i64 [ %30, %26 ], [ %3, %6 ]
%11 = phi ptr [ %29, %26 ], [ %2, %6 ]
%12 = tail call i64 @kdp_find_phys(i32 noundef %0, i64 noundef %9, i32 noundef %4, ptr noundef %5) #2
%13 = ptrtoint ptr %11 to i64
%14 = tail call i64 @kvtophys(i64 noundef %13) #2
%15 = load i64, ptr @PAGE_SIZE, align 8, !tbaa !5
%16 = load i64, ptr @PAGE_MASK, align 8, !tbaa !5
%17 = and i64 %16, %12
%18 = sub i64 %15, %17
%19 = and i64 %16, %14
%20 = sub i64 %15, %19
%21 = tail call i64 @MIN(i64 noundef %18, i64 noundef %20) #2
%22 = tail call i64 @MIN(i64 noundef %21, i64 noundef %10) #2
%23 = icmp ne i64 %12, 0
%24 = icmp ne i64 %14, 0
%25 = and i1 %23, %24
br i1 %25, label %26, label %32
26: ; preds = %8
%27 = tail call i32 @bcopy_phys(i64 noundef %12, i64 noundef %14, i64 noundef %22) #2
%28 = add i64 %22, %9
%29 = getelementptr inbounds i8, ptr %11, i64 %22
%30 = sub i64 %10, %22
%31 = icmp eq i64 %30, 0
br i1 %31, label %32, label %8
32: ; preds = %26, %8, %6
%33 = phi i32 [ 1, %6 ], [ 0, %8 ], [ 1, %26 ]
ret i32 %33
}
declare i64 @kdp_find_phys(i32 noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @kvtophys(i64 noundef) local_unnamed_addr #1
declare i64 @MIN(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @bcopy_phys(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/darwin-xnu/osfmk/kern/extr_kern_stackshot.c_kdp_copyin.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/kern/extr_kern_stackshot.c_kdp_copyin.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PAGE_SIZE = common local_unnamed_addr global i64 0, align 8
@PAGE_MASK = common local_unnamed_addr global i64 0, align 8
@FALSE = common local_unnamed_addr global i32 0, align 4
@gPanicBase = common local_unnamed_addr global i64 0, align 8
@gPanicSize = common local_unnamed_addr global i64 0, align 8
@panic_stackshot = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @kdp_copyin(i32 noundef %0, i64 noundef %1, ptr noundef %2, i64 noundef %3, i32 noundef %4, ptr noundef %5) local_unnamed_addr #0 {
%7 = icmp eq i64 %3, 0
br i1 %7, label %32, label %8
8: ; preds = %6, %26
%9 = phi i64 [ %28, %26 ], [ %1, %6 ]
%10 = phi i64 [ %30, %26 ], [ %3, %6 ]
%11 = phi ptr [ %29, %26 ], [ %2, %6 ]
%12 = tail call i64 @kdp_find_phys(i32 noundef %0, i64 noundef %9, i32 noundef %4, ptr noundef %5) #2
%13 = ptrtoint ptr %11 to i64
%14 = tail call i64 @kvtophys(i64 noundef %13) #2
%15 = load i64, ptr @PAGE_SIZE, align 8, !tbaa !6
%16 = load i64, ptr @PAGE_MASK, align 8, !tbaa !6
%17 = and i64 %16, %12
%18 = sub i64 %15, %17
%19 = and i64 %16, %14
%20 = sub i64 %15, %19
%21 = tail call i64 @MIN(i64 noundef %18, i64 noundef %20) #2
%22 = tail call i64 @MIN(i64 noundef %21, i64 noundef %10) #2
%23 = icmp ne i64 %12, 0
%24 = icmp ne i64 %14, 0
%25 = and i1 %23, %24
br i1 %25, label %26, label %32
26: ; preds = %8
%27 = tail call i32 @bcopy_phys(i64 noundef %12, i64 noundef %14, i64 noundef %22) #2
%28 = add i64 %22, %9
%29 = getelementptr inbounds i8, ptr %11, i64 %22
%30 = sub i64 %10, %22
%31 = icmp eq i64 %30, 0
br i1 %31, label %32, label %8
32: ; preds = %26, %8, %6
%33 = phi i32 [ 1, %6 ], [ 0, %8 ], [ 1, %26 ]
ret i32 %33
}
declare i64 @kdp_find_phys(i32 noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @kvtophys(i64 noundef) local_unnamed_addr #1
declare i64 @MIN(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @bcopy_phys(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| darwin-xnu_osfmk_kern_extr_kern_stackshot.c_kdp_copyin |
; ModuleID = 'AnghaBench/mpv/player/extr_video.c_check_framedrop.c'
source_filename = "AnghaBench/mpv/player/extr_video.c_check_framedrop.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.MPContext = type { i64, i64, double, i32, i32, ptr }
%struct.vo_chain = type { ptr, ptr }
@STATUS_PLAYING = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @check_framedrop], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @check_framedrop(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = getelementptr inbounds %struct.MPContext, ptr %0, i64 0, i32 5
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = load i64, ptr %0, align 8, !tbaa !13
%6 = load i64, ptr @STATUS_PLAYING, align 8, !tbaa !14
%7 = icmp eq i64 %5, %6
br i1 %7, label %8, label %48
8: ; preds = %2
%9 = getelementptr inbounds %struct.MPContext, ptr %0, i64 0, i32 4
%10 = load i32, ptr %9, align 4, !tbaa !15
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %48
12: ; preds = %8
%13 = getelementptr inbounds %struct.MPContext, ptr %0, i64 0, i32 1
%14 = load i64, ptr %13, align 8, !tbaa !16
%15 = icmp eq i64 %14, %5
br i1 %15, label %16, label %48
16: ; preds = %12
%17 = getelementptr inbounds %struct.MPContext, ptr %0, i64 0, i32 3
%18 = load i32, ptr %17, align 8, !tbaa !17
%19 = tail call i32 @ao_untimed(i32 noundef %18) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %48
21: ; preds = %16
%22 = load ptr, ptr %1, align 8, !tbaa !18
%23 = icmp eq ptr %22, null
br i1 %23, label %48, label %24
24: ; preds = %21
%25 = load ptr, ptr %22, align 8, !tbaa !20
%26 = icmp eq ptr %25, null
br i1 %26, label %48, label %27
27: ; preds = %24
%28 = load i32, ptr %4, align 4, !tbaa !22
%29 = and i32 %28, 2
%30 = icmp eq i32 %29, 0
br i1 %30, label %48, label %31
31: ; preds = %27
%32 = getelementptr inbounds %struct.vo_chain, ptr %1, i64 0, i32 1
%33 = load ptr, ptr %32, align 8, !tbaa !24
%34 = load float, ptr %33, align 4, !tbaa !25
%35 = fcmp ugt float %34, 2.000000e+01
%36 = fcmp ult float %34, 5.000000e+02
%37 = and i1 %35, %36
br i1 %37, label %38, label %48
38: ; preds = %31
%39 = fpext float %34 to double
%40 = fdiv double 1.000000e+00, %39
%41 = getelementptr inbounds %struct.MPContext, ptr %0, i64 0, i32 2
%42 = load double, ptr %41, align 8, !tbaa !28
%43 = fadd double %42, -1.000000e-02
%44 = fdiv double %43, %40
%45 = tail call i32 @MPCLAMP(double noundef %44, i32 noundef 0, i32 noundef 100) #2
%46 = load ptr, ptr %1, align 8, !tbaa !18
%47 = load ptr, ptr %46, align 8, !tbaa !20
store i32 %45, ptr %47, align 4, !tbaa !29
br label %48
48: ; preds = %38, %31, %2, %8, %12, %16, %21, %24, %27
ret void
}
declare i32 @ao_untimed(i32 noundef) local_unnamed_addr #1
declare i32 @MPCLAMP(double noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !12, i64 32}
!6 = !{!"MPContext", !7, i64 0, !7, i64 8, !10, i64 16, !11, i64 24, !11, i64 28, !12, i64 32}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"double", !8, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!6, !7, i64 0}
!14 = !{!7, !7, i64 0}
!15 = !{!6, !11, i64 28}
!16 = !{!6, !7, i64 8}
!17 = !{!6, !11, i64 24}
!18 = !{!19, !12, i64 0}
!19 = !{!"vo_chain", !12, i64 0, !12, i64 8}
!20 = !{!21, !12, i64 0}
!21 = !{!"TYPE_6__", !12, i64 0}
!22 = !{!23, !11, i64 0}
!23 = !{!"MPOpts", !11, i64 0}
!24 = !{!19, !12, i64 8}
!25 = !{!26, !27, i64 0}
!26 = !{!"TYPE_4__", !27, i64 0}
!27 = !{!"float", !8, i64 0}
!28 = !{!6, !10, i64 16}
!29 = !{!30, !11, i64 0}
!30 = !{!"TYPE_5__", !11, i64 0}
| ; ModuleID = 'AnghaBench/mpv/player/extr_video.c_check_framedrop.c'
source_filename = "AnghaBench/mpv/player/extr_video.c_check_framedrop.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@STATUS_PLAYING = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @check_framedrop], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @check_framedrop(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 32
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load i64, ptr %0, align 8, !tbaa !14
%6 = load i64, ptr @STATUS_PLAYING, align 8, !tbaa !15
%7 = icmp eq i64 %5, %6
br i1 %7, label %8, label %48
8: ; preds = %2
%9 = getelementptr inbounds i8, ptr %0, i64 28
%10 = load i32, ptr %9, align 4, !tbaa !16
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %48
12: ; preds = %8
%13 = getelementptr inbounds i8, ptr %0, i64 8
%14 = load i64, ptr %13, align 8, !tbaa !17
%15 = icmp eq i64 %14, %5
br i1 %15, label %16, label %48
16: ; preds = %12
%17 = getelementptr inbounds i8, ptr %0, i64 24
%18 = load i32, ptr %17, align 8, !tbaa !18
%19 = tail call i32 @ao_untimed(i32 noundef %18) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %48
21: ; preds = %16
%22 = load ptr, ptr %1, align 8, !tbaa !19
%23 = icmp eq ptr %22, null
br i1 %23, label %48, label %24
24: ; preds = %21
%25 = load ptr, ptr %22, align 8, !tbaa !21
%26 = icmp eq ptr %25, null
br i1 %26, label %48, label %27
27: ; preds = %24
%28 = load i32, ptr %4, align 4, !tbaa !23
%29 = and i32 %28, 2
%30 = icmp eq i32 %29, 0
br i1 %30, label %48, label %31
31: ; preds = %27
%32 = getelementptr inbounds i8, ptr %1, i64 8
%33 = load ptr, ptr %32, align 8, !tbaa !25
%34 = load float, ptr %33, align 4, !tbaa !26
%35 = fcmp ugt float %34, 2.000000e+01
%36 = fcmp ult float %34, 5.000000e+02
%37 = and i1 %35, %36
br i1 %37, label %38, label %48
38: ; preds = %31
%39 = fpext float %34 to double
%40 = fdiv double 1.000000e+00, %39
%41 = getelementptr inbounds i8, ptr %0, i64 16
%42 = load double, ptr %41, align 8, !tbaa !29
%43 = fadd double %42, -1.000000e-02
%44 = fdiv double %43, %40
%45 = tail call i32 @MPCLAMP(double noundef %44, i32 noundef 0, i32 noundef 100) #2
%46 = load ptr, ptr %1, align 8, !tbaa !19
%47 = load ptr, ptr %46, align 8, !tbaa !21
store i32 %45, ptr %47, align 4, !tbaa !30
br label %48
48: ; preds = %38, %31, %2, %8, %12, %16, %21, %24, %27
ret void
}
declare i32 @ao_untimed(i32 noundef) local_unnamed_addr #1
declare i32 @MPCLAMP(double noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !13, i64 32}
!7 = !{!"MPContext", !8, i64 0, !8, i64 8, !11, i64 16, !12, i64 24, !12, i64 28, !13, i64 32}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"double", !9, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!7, !8, i64 0}
!15 = !{!8, !8, i64 0}
!16 = !{!7, !12, i64 28}
!17 = !{!7, !8, i64 8}
!18 = !{!7, !12, i64 24}
!19 = !{!20, !13, i64 0}
!20 = !{!"vo_chain", !13, i64 0, !13, i64 8}
!21 = !{!22, !13, i64 0}
!22 = !{!"TYPE_6__", !13, i64 0}
!23 = !{!24, !12, i64 0}
!24 = !{!"MPOpts", !12, i64 0}
!25 = !{!20, !13, i64 8}
!26 = !{!27, !28, i64 0}
!27 = !{!"TYPE_4__", !28, i64 0}
!28 = !{!"float", !9, i64 0}
!29 = !{!7, !11, i64 16}
!30 = !{!31, !12, i64 0}
!31 = !{!"TYPE_5__", !12, i64 0}
| mpv_player_extr_video.c_check_framedrop |
; ModuleID = 'AnghaBench/freebsd/sys/dev/lge/extr_if_lge.c_lge_hash_maddr.c'
source_filename = "AnghaBench/freebsd/sys/dev/lge/extr_if_lge.c_lge_hash_maddr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ETHER_ADDR_LEN = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @lge_hash_maddr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @lge_hash_maddr(ptr nocapture noundef %0, ptr noundef %1, i32 %2) #0 {
%4 = tail call i32 @LLADDR(ptr noundef %1) #2
%5 = load i32, ptr @ETHER_ADDR_LEN, align 4, !tbaa !5
%6 = tail call i32 @ether_crc32_be(i32 noundef %4, i32 noundef %5) #2
%7 = ashr i32 %6, 26
%8 = shl nuw i32 1, %7
%9 = load i32, ptr %0, align 4, !tbaa !5
%10 = or i32 %8, %9
store i32 %10, ptr %0, align 4, !tbaa !5
ret i32 1
}
declare i32 @ether_crc32_be(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LLADDR(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/lge/extr_if_lge.c_lge_hash_maddr.c'
source_filename = "AnghaBench/freebsd/sys/dev/lge/extr_if_lge.c_lge_hash_maddr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ETHER_ADDR_LEN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @lge_hash_maddr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @lge_hash_maddr(ptr nocapture noundef %0, ptr noundef %1, i32 %2) #0 {
%4 = tail call i32 @LLADDR(ptr noundef %1) #2
%5 = load i32, ptr @ETHER_ADDR_LEN, align 4, !tbaa !6
%6 = tail call i32 @ether_crc32_be(i32 noundef %4, i32 noundef %5) #2
%7 = ashr i32 %6, 26
%8 = shl nuw i32 1, %7
%9 = load i32, ptr %0, align 4, !tbaa !6
%10 = or i32 %8, %9
store i32 %10, ptr %0, align 4, !tbaa !6
ret i32 1
}
declare i32 @ether_crc32_be(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LLADDR(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_dev_lge_extr_if_lge.c_lge_hash_maddr |
; ModuleID = 'AnghaBench/kphp-kdb/weights/extr_weights-data.c_weights_subscription_stop.c'
source_filename = "AnghaBench/kphp-kdb/weights/extr_weights-data.c_weights_subscription_stop.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i64, ptr, ptr }
@subscriptions = dso_local global %struct.TYPE_4__ zeroinitializer, align 8
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @weights_subscription_stop(ptr noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @subscriptions, i64 0, i32 2), align 8, !tbaa !5
%3 = icmp eq ptr %2, @subscriptions
br i1 %3, label %19, label %4
4: ; preds = %1, %15
%5 = phi ptr [ %17, %15 ], [ %2, %1 ]
%6 = getelementptr inbounds %struct.TYPE_4__, ptr %5, i64 0, i32 1
%7 = load ptr, ptr %6, align 8, !tbaa !11
%8 = icmp eq ptr %7, %0
br i1 %8, label %9, label %15
9: ; preds = %4
%10 = load i64, ptr %5, align 8, !tbaa !12
%11 = load i64, ptr %0, align 8, !tbaa !13
%12 = icmp eq i64 %10, %11
br i1 %12, label %13, label %15
13: ; preds = %9
%14 = tail call i32 @subscription_free(ptr noundef nonnull %5) #2
br label %19
15: ; preds = %4, %9
%16 = getelementptr inbounds %struct.TYPE_4__, ptr %5, i64 0, i32 2
%17 = load ptr, ptr %16, align 8, !tbaa !5
%18 = icmp eq ptr %17, @subscriptions
br i1 %18, label %19, label %4, !llvm.loop !15
19: ; preds = %15, %1, %13
%20 = phi i32 [ 0, %13 ], [ -1, %1 ], [ -1, %15 ]
ret i32 %20
}
declare i32 @subscription_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"TYPE_4__", !7, i64 0, !10, i64 8, !10, i64 16}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!6, !7, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"connection", !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/kphp-kdb/weights/extr_weights-data.c_weights_subscription_stop.c'
source_filename = "AnghaBench/kphp-kdb/weights/extr_weights-data.c_weights_subscription_stop.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i64, ptr, ptr }
@subscriptions = common global %struct.TYPE_4__ zeroinitializer, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -1, 1) i32 @weights_subscription_stop(ptr noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr getelementptr inbounds (i8, ptr @subscriptions, i64 16), align 8, !tbaa !6
%3 = icmp eq ptr %2, @subscriptions
br i1 %3, label %19, label %4
4: ; preds = %1, %15
%5 = phi ptr [ %17, %15 ], [ %2, %1 ]
%6 = getelementptr inbounds i8, ptr %5, i64 8
%7 = load ptr, ptr %6, align 8, !tbaa !12
%8 = icmp eq ptr %7, %0
br i1 %8, label %9, label %15
9: ; preds = %4
%10 = load i64, ptr %5, align 8, !tbaa !13
%11 = load i64, ptr %0, align 8, !tbaa !14
%12 = icmp eq i64 %10, %11
br i1 %12, label %13, label %15
13: ; preds = %9
%14 = tail call i32 @subscription_free(ptr noundef nonnull %5) #2
br label %19
15: ; preds = %4, %9
%16 = getelementptr inbounds i8, ptr %5, i64 16
%17 = load ptr, ptr %16, align 8, !tbaa !6
%18 = icmp eq ptr %17, @subscriptions
br i1 %18, label %19, label %4, !llvm.loop !16
19: ; preds = %15, %1, %13
%20 = phi i32 [ 0, %13 ], [ -1, %1 ], [ -1, %15 ]
ret i32 %20
}
declare i32 @subscription_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"TYPE_4__", !8, i64 0, !11, i64 8, !11, i64 16}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!7, !8, i64 0}
!14 = !{!15, !8, i64 0}
!15 = !{!"connection", !8, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| kphp-kdb_weights_extr_weights-data.c_weights_subscription_stop |
; ModuleID = 'AnghaBench/freebsd/contrib/unbound/util/extr_rtt.c_rtt_timeout.c'
source_filename = "AnghaBench/freebsd/contrib/unbound/util/extr_rtt.c_rtt_timeout.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define dso_local i32 @rtt_timeout(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
ret i32 %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"rtt_info", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/unbound/util/extr_rtt.c_rtt_timeout.c'
source_filename = "AnghaBench/freebsd/contrib/unbound/util/extr_rtt.c_rtt_timeout.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define i32 @rtt_timeout(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
ret i32 %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"rtt_info", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_unbound_util_extr_rtt.c_rtt_timeout |
; ModuleID = 'AnghaBench/openssl/crypto/dsa/extr_dsa_ossl.c_dsa_do_verify.c'
source_filename = "AnghaBench/openssl/crypto/dsa/extr_dsa_ossl.c_dsa_do_verify.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i32, ptr, ptr, i32, i32, ptr, i32, i32 }
@DSA_F_DSA_DO_VERIFY = dso_local local_unnamed_addr global i32 0, align 4
@DSA_R_MISSING_PARAMETERS = dso_local local_unnamed_addr global i32 0, align 4
@DSA_R_BAD_Q_VALUE = dso_local local_unnamed_addr global i32 0, align 4
@OPENSSL_DSA_MAX_MODULUS_BITS = dso_local local_unnamed_addr global i32 0, align 4
@DSA_R_MODULUS_TOO_LARGE = dso_local local_unnamed_addr global i32 0, align 4
@DSA_FLAG_CACHE_MONT_P = dso_local local_unnamed_addr global i32 0, align 4
@ERR_R_BN_LIB = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @dsa_do_verify], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @dsa_do_verify(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = alloca ptr, align 8
%6 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #4
%7 = getelementptr inbounds %struct.TYPE_6__, ptr %3, i64 0, i32 2
%8 = load ptr, ptr %7, align 8, !tbaa !5
%9 = icmp eq ptr %8, null
br i1 %9, label %18, label %10
10: ; preds = %4
%11 = getelementptr inbounds %struct.TYPE_6__, ptr %3, i64 0, i32 1
%12 = load ptr, ptr %11, align 8, !tbaa !11
%13 = icmp eq ptr %12, null
br i1 %13, label %18, label %14
14: ; preds = %10
%15 = getelementptr inbounds %struct.TYPE_6__, ptr %3, i64 0, i32 4
%16 = load i32, ptr %15, align 4, !tbaa !12
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %22
18: ; preds = %14, %10, %4
%19 = load i32, ptr @DSA_F_DSA_DO_VERIFY, align 4, !tbaa !13
%20 = load i32, ptr @DSA_R_MISSING_PARAMETERS, align 4, !tbaa !13
%21 = tail call i32 @DSAerr(i32 noundef %19, i32 noundef %20) #4
br label %143
22: ; preds = %14
%23 = tail call i32 @BN_num_bits(ptr noundef nonnull %12) #4
switch i32 %23, label %24 [
i32 256, label %28
i32 224, label %28
i32 160, label %28
]
24: ; preds = %22
%25 = load i32, ptr @DSA_F_DSA_DO_VERIFY, align 4, !tbaa !13
%26 = load i32, ptr @DSA_R_BAD_Q_VALUE, align 4, !tbaa !13
%27 = tail call i32 @DSAerr(i32 noundef %25, i32 noundef %26) #4
br label %143
28: ; preds = %22, %22, %22
%29 = load ptr, ptr %7, align 8, !tbaa !5
%30 = tail call i32 @BN_num_bits(ptr noundef %29) #4
%31 = load i32, ptr @OPENSSL_DSA_MAX_MODULUS_BITS, align 4, !tbaa !13
%32 = icmp sgt i32 %30, %31
br i1 %32, label %33, label %37
33: ; preds = %28
%34 = load i32, ptr @DSA_F_DSA_DO_VERIFY, align 4, !tbaa !13
%35 = load i32, ptr @DSA_R_MODULUS_TOO_LARGE, align 4, !tbaa !13
%36 = tail call i32 @DSAerr(i32 noundef %34, i32 noundef %35) #4
br label %143
37: ; preds = %28
%38 = tail call ptr (...) @BN_new() #4
%39 = tail call ptr (...) @BN_new() #4
%40 = tail call ptr (...) @BN_new() #4
%41 = tail call ptr (...) @BN_CTX_new() #4
%42 = insertelement <4 x ptr> poison, ptr %39, i64 0
%43 = insertelement <4 x ptr> %42, ptr %38, i64 1
%44 = insertelement <4 x ptr> %43, ptr %40, i64 2
%45 = insertelement <4 x ptr> %44, ptr %41, i64 3
%46 = freeze <4 x ptr> %45
%47 = icmp eq <4 x ptr> %46, zeroinitializer
%48 = bitcast <4 x i1> %47 to i4
%49 = icmp eq i4 %48, 0
br i1 %49, label %50, label %133
50: ; preds = %37
%51 = call i32 @DSA_SIG_get0(ptr noundef %2, ptr noundef nonnull %5, ptr noundef nonnull %6) #4
%52 = load ptr, ptr %5, align 8, !tbaa !14
%53 = call i64 @BN_is_zero(ptr noundef %52) #4
%54 = icmp eq i64 %53, 0
br i1 %54, label %55, label %137
55: ; preds = %50
%56 = load ptr, ptr %5, align 8, !tbaa !14
%57 = call i64 @BN_is_negative(ptr noundef %56) #4
%58 = icmp eq i64 %57, 0
br i1 %58, label %59, label %137
59: ; preds = %55
%60 = load ptr, ptr %5, align 8, !tbaa !14
%61 = load ptr, ptr %11, align 8, !tbaa !11
%62 = call i64 @BN_ucmp(ptr noundef %60, ptr noundef %61) #4
%63 = icmp sgt i64 %62, -1
br i1 %63, label %137, label %64
64: ; preds = %59
%65 = load ptr, ptr %6, align 8, !tbaa !14
%66 = call i64 @BN_is_zero(ptr noundef %65) #4
%67 = icmp eq i64 %66, 0
br i1 %67, label %68, label %137
68: ; preds = %64
%69 = load ptr, ptr %6, align 8, !tbaa !14
%70 = call i64 @BN_is_negative(ptr noundef %69) #4
%71 = icmp eq i64 %70, 0
br i1 %71, label %72, label %137
72: ; preds = %68
%73 = load ptr, ptr %6, align 8, !tbaa !14
%74 = load ptr, ptr %11, align 8, !tbaa !11
%75 = call i64 @BN_ucmp(ptr noundef %73, ptr noundef %74) #4
%76 = icmp sgt i64 %75, -1
br i1 %76, label %137, label %77
77: ; preds = %72
%78 = load ptr, ptr %6, align 8, !tbaa !14
%79 = load ptr, ptr %11, align 8, !tbaa !11
%80 = call ptr @BN_mod_inverse(ptr noundef nonnull %39, ptr noundef %78, ptr noundef %79, ptr noundef nonnull %41) #4
%81 = icmp eq ptr %80, null
br i1 %81, label %133, label %82
82: ; preds = %77
%83 = lshr i32 %23, 3
%84 = call i32 @llvm.smin.i32(i32 %83, i32 %1)
%85 = call ptr @BN_bin2bn(ptr noundef %0, i32 noundef %84, ptr noundef nonnull %38) #4
%86 = icmp eq ptr %85, null
br i1 %86, label %133, label %87
87: ; preds = %82
%88 = load ptr, ptr %11, align 8, !tbaa !11
%89 = call i32 @BN_mod_mul(ptr noundef nonnull %38, ptr noundef nonnull %38, ptr noundef nonnull %39, ptr noundef %88, ptr noundef nonnull %41) #4
%90 = icmp eq i32 %89, 0
br i1 %90, label %133, label %91
91: ; preds = %87
%92 = load ptr, ptr %5, align 8, !tbaa !14
%93 = load ptr, ptr %11, align 8, !tbaa !11
%94 = call i32 @BN_mod_mul(ptr noundef nonnull %39, ptr noundef %92, ptr noundef nonnull %39, ptr noundef %93, ptr noundef nonnull %41) #4
%95 = icmp eq i32 %94, 0
br i1 %95, label %133, label %96
96: ; preds = %91
%97 = load i32, ptr %3, align 8, !tbaa !15
%98 = load i32, ptr @DSA_FLAG_CACHE_MONT_P, align 4, !tbaa !13
%99 = and i32 %98, %97
%100 = icmp eq i32 %99, 0
br i1 %100, label %108, label %101
101: ; preds = %96
%102 = getelementptr inbounds %struct.TYPE_6__, ptr %3, i64 0, i32 7
%103 = getelementptr inbounds %struct.TYPE_6__, ptr %3, i64 0, i32 6
%104 = load i32, ptr %103, align 8, !tbaa !16
%105 = load ptr, ptr %7, align 8, !tbaa !5
%106 = call ptr @BN_MONT_CTX_set_locked(ptr noundef nonnull %102, i32 noundef %104, ptr noundef %105, ptr noundef nonnull %41) #4
%107 = icmp eq ptr %106, null
br i1 %107, label %133, label %108
108: ; preds = %101, %96
%109 = phi ptr [ %106, %101 ], [ null, %96 ]
%110 = getelementptr inbounds %struct.TYPE_6__, ptr %3, i64 0, i32 5
%111 = load ptr, ptr %110, align 8, !tbaa !17
%112 = load ptr, ptr %111, align 8, !tbaa !18
%113 = icmp eq ptr %112, null
%114 = load i32, ptr %15, align 4, !tbaa !12
%115 = getelementptr inbounds %struct.TYPE_6__, ptr %3, i64 0, i32 3
%116 = load i32, ptr %115, align 8, !tbaa !20
%117 = load ptr, ptr %7, align 8, !tbaa !5
br i1 %113, label %121, label %118
118: ; preds = %108
%119 = call i32 %112(ptr noundef nonnull %3, ptr noundef nonnull %40, i32 noundef %114, ptr noundef nonnull %38, i32 noundef %116, ptr noundef nonnull %39, ptr noundef %117, ptr noundef nonnull %41, ptr noundef %109) #4
%120 = icmp eq i32 %119, 0
br i1 %120, label %133, label %124
121: ; preds = %108
%122 = call i32 @BN_mod_exp2_mont(ptr noundef nonnull %40, i32 noundef %114, ptr noundef nonnull %38, i32 noundef %116, ptr noundef nonnull %39, ptr noundef %117, ptr noundef nonnull %41, ptr noundef %109) #4
%123 = icmp eq i32 %122, 0
br i1 %123, label %133, label %124
124: ; preds = %121, %118
%125 = load ptr, ptr %11, align 8, !tbaa !11
%126 = call i32 @BN_mod(ptr noundef nonnull %38, ptr noundef nonnull %40, ptr noundef %125, ptr noundef nonnull %41) #4
%127 = icmp eq i32 %126, 0
br i1 %127, label %133, label %128
128: ; preds = %124
%129 = load ptr, ptr %5, align 8, !tbaa !14
%130 = call i64 @BN_ucmp(ptr noundef nonnull %38, ptr noundef %129) #4
%131 = icmp eq i64 %130, 0
%132 = zext i1 %131 to i32
br label %137
133: ; preds = %37, %77, %82, %124, %118, %121, %101, %91, %87
%134 = load i32, ptr @DSA_F_DSA_DO_VERIFY, align 4, !tbaa !13
%135 = load i32, ptr @ERR_R_BN_LIB, align 4, !tbaa !13
%136 = call i32 @DSAerr(i32 noundef %134, i32 noundef %135) #4
br label %137
137: ; preds = %128, %59, %55, %50, %72, %68, %64, %133
%138 = phi i32 [ -1, %133 ], [ %132, %128 ], [ 0, %59 ], [ 0, %55 ], [ 0, %50 ], [ 0, %72 ], [ 0, %68 ], [ 0, %64 ]
%139 = call i32 @BN_CTX_free(ptr noundef %41) #4
%140 = call i32 @BN_free(ptr noundef %38) #4
%141 = call i32 @BN_free(ptr noundef %39) #4
%142 = call i32 @BN_free(ptr noundef %40) #4
br label %143
143: ; preds = %137, %33, %24, %18
%144 = phi i32 [ -1, %24 ], [ -1, %33 ], [ %138, %137 ], [ -1, %18 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #4
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #4
ret i32 %144
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @DSAerr(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BN_num_bits(ptr noundef) local_unnamed_addr #2
declare ptr @BN_new(...) local_unnamed_addr #2
declare ptr @BN_CTX_new(...) local_unnamed_addr #2
declare i32 @DSA_SIG_get0(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @BN_is_zero(ptr noundef) local_unnamed_addr #2
declare i64 @BN_is_negative(ptr noundef) local_unnamed_addr #2
declare i64 @BN_ucmp(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @BN_mod_inverse(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @BN_bin2bn(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @BN_mod_mul(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @BN_MONT_CTX_set_locked(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @BN_mod_exp2_mont(ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @BN_mod(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @BN_CTX_free(ptr noundef) local_unnamed_addr #2
declare i32 @BN_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"TYPE_6__", !7, i64 0, !10, i64 8, !10, i64 16, !7, i64 24, !7, i64 28, !10, i64 32, !7, i64 40, !7, i64 44}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!6, !7, i64 28}
!13 = !{!7, !7, i64 0}
!14 = !{!10, !10, i64 0}
!15 = !{!6, !7, i64 0}
!16 = !{!6, !7, i64 40}
!17 = !{!6, !10, i64 32}
!18 = !{!19, !10, i64 0}
!19 = !{!"TYPE_5__", !10, i64 0}
!20 = !{!6, !7, i64 24}
| ; ModuleID = 'AnghaBench/openssl/crypto/dsa/extr_dsa_ossl.c_dsa_do_verify.c'
source_filename = "AnghaBench/openssl/crypto/dsa/extr_dsa_ossl.c_dsa_do_verify.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DSA_F_DSA_DO_VERIFY = common local_unnamed_addr global i32 0, align 4
@DSA_R_MISSING_PARAMETERS = common local_unnamed_addr global i32 0, align 4
@DSA_R_BAD_Q_VALUE = common local_unnamed_addr global i32 0, align 4
@OPENSSL_DSA_MAX_MODULUS_BITS = common local_unnamed_addr global i32 0, align 4
@DSA_R_MODULUS_TOO_LARGE = common local_unnamed_addr global i32 0, align 4
@DSA_FLAG_CACHE_MONT_P = common local_unnamed_addr global i32 0, align 4
@ERR_R_BN_LIB = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @dsa_do_verify], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -1, 2) i32 @dsa_do_verify(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = alloca ptr, align 8
%6 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #4
%7 = getelementptr inbounds i8, ptr %3, i64 16
%8 = load ptr, ptr %7, align 8, !tbaa !6
%9 = icmp eq ptr %8, null
br i1 %9, label %18, label %10
10: ; preds = %4
%11 = getelementptr inbounds i8, ptr %3, i64 8
%12 = load ptr, ptr %11, align 8, !tbaa !12
%13 = icmp eq ptr %12, null
br i1 %13, label %18, label %14
14: ; preds = %10
%15 = getelementptr inbounds i8, ptr %3, i64 28
%16 = load i32, ptr %15, align 4, !tbaa !13
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %22
18: ; preds = %14, %10, %4
%19 = load i32, ptr @DSA_F_DSA_DO_VERIFY, align 4, !tbaa !14
%20 = load i32, ptr @DSA_R_MISSING_PARAMETERS, align 4, !tbaa !14
%21 = tail call i32 @DSAerr(i32 noundef %19, i32 noundef %20) #4
br label %142
22: ; preds = %14
%23 = tail call i32 @BN_num_bits(ptr noundef nonnull %12) #4
switch i32 %23, label %24 [
i32 256, label %28
i32 224, label %28
i32 160, label %28
]
24: ; preds = %22
%25 = load i32, ptr @DSA_F_DSA_DO_VERIFY, align 4, !tbaa !14
%26 = load i32, ptr @DSA_R_BAD_Q_VALUE, align 4, !tbaa !14
%27 = tail call i32 @DSAerr(i32 noundef %25, i32 noundef %26) #4
br label %142
28: ; preds = %22, %22, %22
%29 = load ptr, ptr %7, align 8, !tbaa !6
%30 = tail call i32 @BN_num_bits(ptr noundef %29) #4
%31 = load i32, ptr @OPENSSL_DSA_MAX_MODULUS_BITS, align 4, !tbaa !14
%32 = icmp sgt i32 %30, %31
br i1 %32, label %33, label %37
33: ; preds = %28
%34 = load i32, ptr @DSA_F_DSA_DO_VERIFY, align 4, !tbaa !14
%35 = load i32, ptr @DSA_R_MODULUS_TOO_LARGE, align 4, !tbaa !14
%36 = tail call i32 @DSAerr(i32 noundef %34, i32 noundef %35) #4
br label %142
37: ; preds = %28
%38 = tail call ptr @BN_new() #4
%39 = tail call ptr @BN_new() #4
%40 = tail call ptr @BN_new() #4
%41 = tail call ptr @BN_CTX_new() #4
%42 = icmp eq ptr %38, null
%43 = icmp eq ptr %39, null
%44 = select i1 %42, i1 true, i1 %43
%45 = icmp eq ptr %40, null
%46 = select i1 %44, i1 true, i1 %45
%47 = icmp eq ptr %41, null
%48 = select i1 %46, i1 true, i1 %47
br i1 %48, label %132, label %49
49: ; preds = %37
%50 = call i32 @DSA_SIG_get0(ptr noundef %2, ptr noundef nonnull %5, ptr noundef nonnull %6) #4
%51 = load ptr, ptr %5, align 8, !tbaa !15
%52 = call i64 @BN_is_zero(ptr noundef %51) #4
%53 = icmp eq i64 %52, 0
br i1 %53, label %54, label %136
54: ; preds = %49
%55 = load ptr, ptr %5, align 8, !tbaa !15
%56 = call i64 @BN_is_negative(ptr noundef %55) #4
%57 = icmp eq i64 %56, 0
br i1 %57, label %58, label %136
58: ; preds = %54
%59 = load ptr, ptr %5, align 8, !tbaa !15
%60 = load ptr, ptr %11, align 8, !tbaa !12
%61 = call i64 @BN_ucmp(ptr noundef %59, ptr noundef %60) #4
%62 = icmp sgt i64 %61, -1
br i1 %62, label %136, label %63
63: ; preds = %58
%64 = load ptr, ptr %6, align 8, !tbaa !15
%65 = call i64 @BN_is_zero(ptr noundef %64) #4
%66 = icmp eq i64 %65, 0
br i1 %66, label %67, label %136
67: ; preds = %63
%68 = load ptr, ptr %6, align 8, !tbaa !15
%69 = call i64 @BN_is_negative(ptr noundef %68) #4
%70 = icmp eq i64 %69, 0
br i1 %70, label %71, label %136
71: ; preds = %67
%72 = load ptr, ptr %6, align 8, !tbaa !15
%73 = load ptr, ptr %11, align 8, !tbaa !12
%74 = call i64 @BN_ucmp(ptr noundef %72, ptr noundef %73) #4
%75 = icmp sgt i64 %74, -1
br i1 %75, label %136, label %76
76: ; preds = %71
%77 = load ptr, ptr %6, align 8, !tbaa !15
%78 = load ptr, ptr %11, align 8, !tbaa !12
%79 = call ptr @BN_mod_inverse(ptr noundef nonnull %39, ptr noundef %77, ptr noundef %78, ptr noundef nonnull %41) #4
%80 = icmp eq ptr %79, null
br i1 %80, label %132, label %81
81: ; preds = %76
%82 = lshr exact i32 %23, 3
%83 = call i32 @llvm.smin.i32(i32 %82, i32 %1)
%84 = call ptr @BN_bin2bn(ptr noundef %0, i32 noundef %83, ptr noundef nonnull %38) #4
%85 = icmp eq ptr %84, null
br i1 %85, label %132, label %86
86: ; preds = %81
%87 = load ptr, ptr %11, align 8, !tbaa !12
%88 = call i32 @BN_mod_mul(ptr noundef nonnull %38, ptr noundef nonnull %38, ptr noundef nonnull %39, ptr noundef %87, ptr noundef nonnull %41) #4
%89 = icmp eq i32 %88, 0
br i1 %89, label %132, label %90
90: ; preds = %86
%91 = load ptr, ptr %5, align 8, !tbaa !15
%92 = load ptr, ptr %11, align 8, !tbaa !12
%93 = call i32 @BN_mod_mul(ptr noundef nonnull %39, ptr noundef %91, ptr noundef nonnull %39, ptr noundef %92, ptr noundef nonnull %41) #4
%94 = icmp eq i32 %93, 0
br i1 %94, label %132, label %95
95: ; preds = %90
%96 = load i32, ptr %3, align 8, !tbaa !16
%97 = load i32, ptr @DSA_FLAG_CACHE_MONT_P, align 4, !tbaa !14
%98 = and i32 %97, %96
%99 = icmp eq i32 %98, 0
br i1 %99, label %107, label %100
100: ; preds = %95
%101 = getelementptr inbounds i8, ptr %3, i64 44
%102 = getelementptr inbounds i8, ptr %3, i64 40
%103 = load i32, ptr %102, align 8, !tbaa !17
%104 = load ptr, ptr %7, align 8, !tbaa !6
%105 = call ptr @BN_MONT_CTX_set_locked(ptr noundef nonnull %101, i32 noundef %103, ptr noundef %104, ptr noundef nonnull %41) #4
%106 = icmp eq ptr %105, null
br i1 %106, label %132, label %107
107: ; preds = %100, %95
%108 = phi ptr [ %105, %100 ], [ null, %95 ]
%109 = getelementptr inbounds i8, ptr %3, i64 32
%110 = load ptr, ptr %109, align 8, !tbaa !18
%111 = load ptr, ptr %110, align 8, !tbaa !19
%112 = icmp eq ptr %111, null
%113 = load i32, ptr %15, align 4, !tbaa !13
%114 = getelementptr inbounds i8, ptr %3, i64 24
%115 = load i32, ptr %114, align 8, !tbaa !21
%116 = load ptr, ptr %7, align 8, !tbaa !6
br i1 %112, label %120, label %117
117: ; preds = %107
%118 = call i32 %111(ptr noundef nonnull %3, ptr noundef nonnull %40, i32 noundef %113, ptr noundef nonnull %38, i32 noundef %115, ptr noundef nonnull %39, ptr noundef %116, ptr noundef nonnull %41, ptr noundef %108) #4
%119 = icmp eq i32 %118, 0
br i1 %119, label %132, label %123
120: ; preds = %107
%121 = call i32 @BN_mod_exp2_mont(ptr noundef nonnull %40, i32 noundef %113, ptr noundef nonnull %38, i32 noundef %115, ptr noundef nonnull %39, ptr noundef %116, ptr noundef nonnull %41, ptr noundef %108) #4
%122 = icmp eq i32 %121, 0
br i1 %122, label %132, label %123
123: ; preds = %120, %117
%124 = load ptr, ptr %11, align 8, !tbaa !12
%125 = call i32 @BN_mod(ptr noundef nonnull %38, ptr noundef nonnull %40, ptr noundef %124, ptr noundef nonnull %41) #4
%126 = icmp eq i32 %125, 0
br i1 %126, label %132, label %127
127: ; preds = %123
%128 = load ptr, ptr %5, align 8, !tbaa !15
%129 = call i64 @BN_ucmp(ptr noundef nonnull %38, ptr noundef %128) #4
%130 = icmp eq i64 %129, 0
%131 = zext i1 %130 to i32
br label %136
132: ; preds = %37, %76, %81, %123, %117, %120, %100, %90, %86
%133 = load i32, ptr @DSA_F_DSA_DO_VERIFY, align 4, !tbaa !14
%134 = load i32, ptr @ERR_R_BN_LIB, align 4, !tbaa !14
%135 = call i32 @DSAerr(i32 noundef %133, i32 noundef %134) #4
br label %136
136: ; preds = %127, %58, %54, %49, %71, %67, %63, %132
%137 = phi i32 [ -1, %132 ], [ %131, %127 ], [ 0, %58 ], [ 0, %54 ], [ 0, %49 ], [ 0, %71 ], [ 0, %67 ], [ 0, %63 ]
%138 = call i32 @BN_CTX_free(ptr noundef %41) #4
%139 = call i32 @BN_free(ptr noundef %38) #4
%140 = call i32 @BN_free(ptr noundef %39) #4
%141 = call i32 @BN_free(ptr noundef %40) #4
br label %142
142: ; preds = %136, %33, %24, %18
%143 = phi i32 [ -1, %24 ], [ -1, %33 ], [ %137, %136 ], [ -1, %18 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #4
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #4
ret i32 %143
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @DSAerr(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BN_num_bits(ptr noundef) local_unnamed_addr #2
declare ptr @BN_new(...) local_unnamed_addr #2
declare ptr @BN_CTX_new(...) local_unnamed_addr #2
declare i32 @DSA_SIG_get0(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @BN_is_zero(ptr noundef) local_unnamed_addr #2
declare i64 @BN_is_negative(ptr noundef) local_unnamed_addr #2
declare i64 @BN_ucmp(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @BN_mod_inverse(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @BN_bin2bn(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @BN_mod_mul(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @BN_MONT_CTX_set_locked(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @BN_mod_exp2_mont(ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @BN_mod(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @BN_CTX_free(ptr noundef) local_unnamed_addr #2
declare i32 @BN_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"TYPE_6__", !8, i64 0, !11, i64 8, !11, i64 16, !8, i64 24, !8, i64 28, !11, i64 32, !8, i64 40, !8, i64 44}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!7, !8, i64 28}
!14 = !{!8, !8, i64 0}
!15 = !{!11, !11, i64 0}
!16 = !{!7, !8, i64 0}
!17 = !{!7, !8, i64 40}
!18 = !{!7, !11, i64 32}
!19 = !{!20, !11, i64 0}
!20 = !{!"TYPE_5__", !11, i64 0}
!21 = !{!7, !8, i64 24}
| openssl_crypto_dsa_extr_dsa_ossl.c_dsa_do_verify |
; ModuleID = 'AnghaBench/libuv/src/win/extr_poll.c_uv__fast_poll_set.c'
source_filename = "AnghaBench/libuv/src/win/extr_poll.c_uv__fast_poll_set.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i64, i32, i32, i32, i32, i32 }
@UV_POLL = dso_local local_unnamed_addr global i64 0, align 8
@UV_HANDLE_CLOSING = dso_local local_unnamed_addr global i32 0, align 4
@UV_READABLE = dso_local local_unnamed_addr global i32 0, align 4
@UV_WRITABLE = dso_local local_unnamed_addr global i32 0, align 4
@UV_DISCONNECT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @uv__fast_poll_set], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @uv__fast_poll_set(ptr nocapture readnone %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = load i64, ptr %1, align 8, !tbaa !5
%5 = load i64, ptr @UV_POLL, align 8, !tbaa !11
%6 = icmp eq i64 %4, %5
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 noundef %7) #2
%9 = getelementptr inbounds %struct.TYPE_6__, ptr %1, i64 0, i32 1
%10 = load i32, ptr %9, align 8, !tbaa !12
%11 = load i32, ptr @UV_HANDLE_CLOSING, align 4, !tbaa !13
%12 = and i32 %11, %10
%13 = icmp eq i32 %12, 0
%14 = zext i1 %13 to i32
%15 = tail call i32 @assert(i32 noundef %14) #2
%16 = load i32, ptr @UV_READABLE, align 4, !tbaa !13
%17 = load i32, ptr @UV_WRITABLE, align 4, !tbaa !13
%18 = or i32 %17, %16
%19 = load i32, ptr @UV_DISCONNECT, align 4, !tbaa !13
%20 = or i32 %18, %19
%21 = xor i32 %20, -1
%22 = and i32 %21, %2
%23 = icmp eq i32 %22, 0
%24 = zext i1 %23 to i32
%25 = tail call i32 @assert(i32 noundef %24) #2
%26 = getelementptr inbounds %struct.TYPE_6__, ptr %1, i64 0, i32 2
store i32 %2, ptr %26, align 4, !tbaa !14
%27 = icmp eq i32 %2, 0
br i1 %27, label %30, label %28
28: ; preds = %3
%29 = tail call i32 @uv__handle_start(ptr noundef nonnull %1) #2
br label %32
30: ; preds = %3
%31 = tail call i32 @uv__handle_stop(ptr noundef nonnull %1) #2
br label %32
32: ; preds = %30, %28
%33 = load i32, ptr %26, align 4, !tbaa !14
%34 = getelementptr inbounds %struct.TYPE_6__, ptr %1, i64 0, i32 3
%35 = load i32, ptr %34, align 8, !tbaa !15
%36 = getelementptr inbounds %struct.TYPE_6__, ptr %1, i64 0, i32 4
%37 = load i32, ptr %36, align 4, !tbaa !16
%38 = or i32 %37, %35
%39 = xor i32 %38, -1
%40 = and i32 %33, %39
%41 = icmp eq i32 %40, 0
br i1 %41, label %46, label %42
42: ; preds = %32
%43 = getelementptr inbounds %struct.TYPE_6__, ptr %1, i64 0, i32 5
%44 = load i32, ptr %43, align 8, !tbaa !17
%45 = tail call i32 @uv__fast_poll_submit_poll_req(i32 noundef %44, ptr noundef nonnull %1) #2
br label %46
46: ; preds = %42, %32
ret i32 0
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i32 @uv__handle_start(ptr noundef) local_unnamed_addr #1
declare i32 @uv__handle_stop(ptr noundef) local_unnamed_addr #1
declare i32 @uv__fast_poll_submit_poll_req(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_6__", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!10, !10, i64 0}
!14 = !{!6, !10, i64 12}
!15 = !{!6, !10, i64 16}
!16 = !{!6, !10, i64 20}
!17 = !{!6, !10, i64 24}
| ; ModuleID = 'AnghaBench/libuv/src/win/extr_poll.c_uv__fast_poll_set.c'
source_filename = "AnghaBench/libuv/src/win/extr_poll.c_uv__fast_poll_set.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@UV_POLL = common local_unnamed_addr global i64 0, align 8
@UV_HANDLE_CLOSING = common local_unnamed_addr global i32 0, align 4
@UV_READABLE = common local_unnamed_addr global i32 0, align 4
@UV_WRITABLE = common local_unnamed_addr global i32 0, align 4
@UV_DISCONNECT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @uv__fast_poll_set], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @uv__fast_poll_set(ptr nocapture readnone %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = load i64, ptr %1, align 8, !tbaa !6
%5 = load i64, ptr @UV_POLL, align 8, !tbaa !12
%6 = icmp eq i64 %4, %5
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 noundef %7) #2
%9 = getelementptr inbounds i8, ptr %1, i64 8
%10 = load i32, ptr %9, align 8, !tbaa !13
%11 = load i32, ptr @UV_HANDLE_CLOSING, align 4, !tbaa !14
%12 = and i32 %11, %10
%13 = icmp eq i32 %12, 0
%14 = zext i1 %13 to i32
%15 = tail call i32 @assert(i32 noundef %14) #2
%16 = load i32, ptr @UV_READABLE, align 4, !tbaa !14
%17 = load i32, ptr @UV_WRITABLE, align 4, !tbaa !14
%18 = or i32 %17, %16
%19 = load i32, ptr @UV_DISCONNECT, align 4, !tbaa !14
%20 = or i32 %18, %19
%21 = xor i32 %20, -1
%22 = and i32 %21, %2
%23 = icmp eq i32 %22, 0
%24 = zext i1 %23 to i32
%25 = tail call i32 @assert(i32 noundef %24) #2
%26 = getelementptr inbounds i8, ptr %1, i64 12
store i32 %2, ptr %26, align 4, !tbaa !15
%27 = icmp eq i32 %2, 0
br i1 %27, label %30, label %28
28: ; preds = %3
%29 = tail call i32 @uv__handle_start(ptr noundef nonnull %1) #2
br label %32
30: ; preds = %3
%31 = tail call i32 @uv__handle_stop(ptr noundef nonnull %1) #2
br label %32
32: ; preds = %30, %28
%33 = load i32, ptr %26, align 4, !tbaa !15
%34 = getelementptr inbounds i8, ptr %1, i64 16
%35 = load i32, ptr %34, align 8, !tbaa !16
%36 = getelementptr inbounds i8, ptr %1, i64 20
%37 = load i32, ptr %36, align 4, !tbaa !17
%38 = or i32 %37, %35
%39 = xor i32 %38, -1
%40 = and i32 %33, %39
%41 = icmp eq i32 %40, 0
br i1 %41, label %46, label %42
42: ; preds = %32
%43 = getelementptr inbounds i8, ptr %1, i64 24
%44 = load i32, ptr %43, align 8, !tbaa !18
%45 = tail call i32 @uv__fast_poll_submit_poll_req(i32 noundef %44, ptr noundef nonnull %1) #2
br label %46
46: ; preds = %42, %32
ret i32 0
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i32 @uv__handle_start(ptr noundef) local_unnamed_addr #1
declare i32 @uv__handle_stop(ptr noundef) local_unnamed_addr #1
declare i32 @uv__fast_poll_submit_poll_req(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !11, i64 8}
!14 = !{!11, !11, i64 0}
!15 = !{!7, !11, i64 12}
!16 = !{!7, !11, i64 16}
!17 = !{!7, !11, i64 20}
!18 = !{!7, !11, i64 24}
| libuv_src_win_extr_poll.c_uv__fast_poll_set |
; ModuleID = 'AnghaBench/Craft/deps/sqlite/extr_sqlite3.c_dupedExprSize.c'
source_filename = "AnghaBench/Craft/deps/sqlite/extr_sqlite3.c_dupedExprSize.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { ptr, ptr }
@EXPRDUP_REDUCE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @dupedExprSize], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @dupedExprSize(ptr noundef %0, i32 noundef %1) #0 {
br label %3
3: ; preds = %15, %2
%4 = phi i32 [ 0, %2 ], [ %21, %15 ]
%5 = phi ptr [ %0, %2 ], [ %19, %15 ]
%6 = icmp eq ptr %5, null
br i1 %6, label %12, label %7
7: ; preds = %3
%8 = tail call i32 @dupedExprNodeSize(ptr noundef nonnull %5, i32 noundef %1) #2
%9 = load i32, ptr @EXPRDUP_REDUCE, align 4, !tbaa !5
%10 = and i32 %9, %1
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %3, %7
%13 = phi i32 [ %8, %7 ], [ 0, %3 ]
%14 = add i32 %13, %4
ret i32 %14
15: ; preds = %7
%16 = getelementptr inbounds %struct.TYPE_4__, ptr %5, i64 0, i32 1
%17 = load ptr, ptr %16, align 8, !tbaa !9
%18 = tail call i32 @dupedExprSize(ptr noundef %17, i32 noundef %1)
%19 = load ptr, ptr %5, align 8, !tbaa !12
%20 = add i32 %18, %8
%21 = add i32 %20, %4
br label %3
}
declare i32 @dupedExprNodeSize(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"TYPE_4__", !11, i64 0, !11, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !11, i64 0}
| ; ModuleID = 'AnghaBench/Craft/deps/sqlite/extr_sqlite3.c_dupedExprSize.c'
source_filename = "AnghaBench/Craft/deps/sqlite/extr_sqlite3.c_dupedExprSize.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EXPRDUP_REDUCE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @dupedExprSize], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @dupedExprSize(ptr noundef %0, i32 noundef %1) #0 {
br label %3
3: ; preds = %15, %2
%4 = phi i32 [ 0, %2 ], [ %21, %15 ]
%5 = phi ptr [ %0, %2 ], [ %19, %15 ]
%6 = icmp eq ptr %5, null
br i1 %6, label %12, label %7
7: ; preds = %3
%8 = tail call i32 @dupedExprNodeSize(ptr noundef nonnull %5, i32 noundef %1) #2
%9 = load i32, ptr @EXPRDUP_REDUCE, align 4, !tbaa !6
%10 = and i32 %9, %1
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %3, %7
%13 = phi i32 [ %8, %7 ], [ 0, %3 ]
%14 = add i32 %13, %4
ret i32 %14
15: ; preds = %7
%16 = getelementptr inbounds i8, ptr %5, i64 8
%17 = load ptr, ptr %16, align 8, !tbaa !10
%18 = tail call i32 @dupedExprSize(ptr noundef %17, i32 noundef %1)
%19 = load ptr, ptr %5, align 8, !tbaa !13
%20 = add i32 %18, %8
%21 = add i32 %20, %4
br label %3
}
declare i32 @dupedExprNodeSize(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"TYPE_4__", !12, i64 0, !12, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 0}
| Craft_deps_sqlite_extr_sqlite3.c_dupedExprSize |
; ModuleID = 'AnghaBench/freebsd/sys/dev/ppbus/extr_ppb_1284.c_ppb_1284_reset_error.c'
source_filename = "AnghaBench/freebsd/sys/dev/ppbus/extr_ppb_1284.c_ppb_1284_reset_error.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ppb_data = type { i32, i32 }
@PPB_NO_ERROR = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ppb_1284_reset_error], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @ppb_1284_reset_error(i32 noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @DEVTOSOFTC(i32 noundef %0) #2
%4 = load i32, ptr @PPB_NO_ERROR, align 4, !tbaa !5
%5 = getelementptr inbounds %struct.ppb_data, ptr %3, i64 0, i32 1
store i32 %4, ptr %5, align 4, !tbaa !9
store i32 %1, ptr %3, align 4, !tbaa !11
ret i32 0
}
declare ptr @DEVTOSOFTC(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"ppb_data", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/ppbus/extr_ppb_1284.c_ppb_1284_reset_error.c'
source_filename = "AnghaBench/freebsd/sys/dev/ppbus/extr_ppb_1284.c_ppb_1284_reset_error.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PPB_NO_ERROR = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ppb_1284_reset_error], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @ppb_1284_reset_error(i32 noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @DEVTOSOFTC(i32 noundef %0) #2
%4 = load i32, ptr @PPB_NO_ERROR, align 4, !tbaa !6
%5 = getelementptr inbounds i8, ptr %3, i64 4
store i32 %4, ptr %5, align 4, !tbaa !10
store i32 %1, ptr %3, align 4, !tbaa !12
ret i32 0
}
declare ptr @DEVTOSOFTC(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 4}
!11 = !{!"ppb_data", !7, i64 0, !7, i64 4}
!12 = !{!11, !7, i64 0}
| freebsd_sys_dev_ppbus_extr_ppb_1284.c_ppb_1284_reset_error |
; ModuleID = 'AnghaBench/freebsd/sys/dev/uart/extr_uart_dev_mvebu.c_uart_mvebu_getc.c'
source_filename = "AnghaBench/freebsd/sys/dev/uart/extr_uart_dev_mvebu.c_uart_mvebu_getc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@UART_STAT = dso_local local_unnamed_addr global i32 0, align 4
@STAT_RX_RDY = dso_local local_unnamed_addr global i32 0, align 4
@UART_RBR = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @uart_mvebu_getc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @uart_mvebu_getc(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @uart_lock(ptr noundef %1) #2
br label %4
4: ; preds = %4, %2
%5 = load i32, ptr @UART_STAT, align 4, !tbaa !5
%6 = tail call i32 @uart_getreg(ptr noundef %0, i32 noundef %5) #2
%7 = load i32, ptr @STAT_RX_RDY, align 4, !tbaa !5
%8 = and i32 %7, %6
%9 = icmp eq i32 %8, 0
br i1 %9, label %4, label %10, !llvm.loop !9
10: ; preds = %4
%11 = load i32, ptr @UART_RBR, align 4, !tbaa !5
%12 = tail call i32 @uart_getreg(ptr noundef %0, i32 noundef %11) #2
%13 = and i32 %12, 255
%14 = tail call i32 @uart_unlock(ptr noundef %1) #2
ret i32 %13
}
declare i32 @uart_lock(ptr noundef) local_unnamed_addr #1
declare i32 @uart_getreg(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @uart_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/uart/extr_uart_dev_mvebu.c_uart_mvebu_getc.c'
source_filename = "AnghaBench/freebsd/sys/dev/uart/extr_uart_dev_mvebu.c_uart_mvebu_getc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@UART_STAT = common local_unnamed_addr global i32 0, align 4
@STAT_RX_RDY = common local_unnamed_addr global i32 0, align 4
@UART_RBR = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @uart_mvebu_getc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 256) i32 @uart_mvebu_getc(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @uart_lock(ptr noundef %1) #2
br label %4
4: ; preds = %4, %2
%5 = load i32, ptr @UART_STAT, align 4, !tbaa !6
%6 = tail call i32 @uart_getreg(ptr noundef %0, i32 noundef %5) #2
%7 = load i32, ptr @STAT_RX_RDY, align 4, !tbaa !6
%8 = and i32 %7, %6
%9 = icmp eq i32 %8, 0
br i1 %9, label %4, label %10, !llvm.loop !10
10: ; preds = %4
%11 = load i32, ptr @UART_RBR, align 4, !tbaa !6
%12 = tail call i32 @uart_getreg(ptr noundef %0, i32 noundef %11) #2
%13 = and i32 %12, 255
%14 = tail call i32 @uart_unlock(ptr noundef %1) #2
ret i32 %13
}
declare i32 @uart_lock(ptr noundef) local_unnamed_addr #1
declare i32 @uart_getreg(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @uart_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| freebsd_sys_dev_uart_extr_uart_dev_mvebu.c_uart_mvebu_getc |
; ModuleID = 'AnghaBench/freebsd/sys/dev/usb/controller/extr_uss820dci.c_uss820dci_device_isoc_fs_close.c'
source_filename = "AnghaBench/freebsd/sys/dev/usb/controller/extr_uss820dci.c_uss820dci_device_isoc_fs_close.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@USB_ERR_CANCELLED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @uss820dci_device_isoc_fs_close], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @uss820dci_device_isoc_fs_close(ptr noundef %0) #0 {
%2 = load i32, ptr @USB_ERR_CANCELLED, align 4, !tbaa !5
%3 = tail call i32 @uss820dci_device_done(ptr noundef %0, i32 noundef %2) #2
ret void
}
declare i32 @uss820dci_device_done(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/usb/controller/extr_uss820dci.c_uss820dci_device_isoc_fs_close.c'
source_filename = "AnghaBench/freebsd/sys/dev/usb/controller/extr_uss820dci.c_uss820dci_device_isoc_fs_close.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@USB_ERR_CANCELLED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @uss820dci_device_isoc_fs_close], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @uss820dci_device_isoc_fs_close(ptr noundef %0) #0 {
%2 = load i32, ptr @USB_ERR_CANCELLED, align 4, !tbaa !6
%3 = tail call i32 @uss820dci_device_done(ptr noundef %0, i32 noundef %2) #2
ret void
}
declare i32 @uss820dci_device_done(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_dev_usb_controller_extr_uss820dci.c_uss820dci_device_isoc_fs_close |
; ModuleID = 'AnghaBench/freebsd/sys/arm/ti/cpsw/extr_if_cpsw.c_cpsw_attach.c'
source_filename = "AnghaBench/freebsd/sys/arm/ti/cpsw/extr_if_cpsw.c_cpsw_attach.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.cpsw_softc = type { i32, i32, ptr, %struct.TYPE_6__, %struct.TYPE_6__, i32, i32, i32, ptr, i64, i32, i32, i32 }
%struct.TYPE_6__ = type { i32, i32, i32, i32, i32 }
%struct.TYPE_4__ = type { ptr }
@.str = private unnamed_addr constant [13 x i8] c"active_slave\00", align 1
@.str.1 = private unnamed_addr constant [10 x i8] c"dual_emac\00", align 1
@CPSW_PORTS = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [36 x i8] c"failed to get PHY address from FDT\0A\00", align 1
@ENXIO = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [13 x i8] c"cpsw TX lock\00", align 1
@MTX_DEF = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [13 x i8] c"cpsw RX lock\00", align 1
@irq_res_spec = dso_local local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [34 x i8] c"could not allocate IRQ resources\0A\00", align 1
@SYS_RES_MEMORY = dso_local local_unnamed_addr global i32 0, align 4
@RF_ACTIVE = dso_local local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [36 x i8] c"failed to allocate memory resource\0A\00", align 1
@CPSW_SS_IDVER = dso_local local_unnamed_addr global i32 0, align 4
@.str.7 = private unnamed_addr constant [28 x i8] c"CPSW SS Version %d.%d (%d)\0A\00", align 1
@BUS_SPACE_MAXADDR_32BIT = dso_local local_unnamed_addr global i32 0, align 4
@BUS_SPACE_MAXADDR = dso_local local_unnamed_addr global i32 0, align 4
@MCLBYTES = dso_local local_unnamed_addr global i32 0, align 4
@CPSW_TXFRAGS = dso_local local_unnamed_addr global i32 0, align 4
@.str.8 = private unnamed_addr constant [27 x i8] c"bus_dma_tag_create failed\0A\00", align 1
@ETHER_MIN_LEN = dso_local local_unnamed_addr global i32 0, align 4
@M_DEVBUF = dso_local local_unnamed_addr global i32 0, align 4
@M_WAITOK = dso_local local_unnamed_addr global i32 0, align 4
@M_ZERO = dso_local local_unnamed_addr global i32 0, align 4
@.str.9 = private unnamed_addr constant [28 x i8] c"failed to allocate dmamaps\0A\00", align 1
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@.str.10 = private unnamed_addr constant [32 x i8] c"Initial queue size TX=%d RX=%d\0A\00", align 1
@.str.11 = private unnamed_addr constant [28 x i8] c"failed to setup interrupts\0A\00", align 1
@.str.12 = private unnamed_addr constant [5 x i8] c"cpsw\00", align 1
@CPSW_VLANS = dso_local local_unnamed_addr global i32 0, align 4
@cpsw_vgroups = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @cpsw_attach], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @cpsw_attach(i32 noundef %0) #0 {
%2 = tail call ptr @device_get_softc(i32 noundef %0) #2
%3 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 7
store i32 %0, ptr %3, align 8, !tbaa !5
%4 = tail call i32 @ofw_bus_get_node(i32 noundef %0) #2
%5 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 11
store i32 %4, ptr %5, align 4, !tbaa !13
%6 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 12
%7 = tail call i32 @getbinuptime(ptr noundef nonnull %6) #2
%8 = load i32, ptr %5, align 4, !tbaa !13
%9 = tail call i64 @OF_getencprop(i32 noundef %8, ptr noundef nonnull @.str, ptr noundef %2, i32 noundef 4) #2
%10 = icmp slt i64 %9, 1
br i1 %10, label %14, label %11
11: ; preds = %1
%12 = load i32, ptr %2, align 8, !tbaa !14
%13 = icmp sgt i32 %12, 1
br i1 %13, label %14, label %16
14: ; preds = %11, %1
%15 = phi i32 [ 0, %1 ], [ 1, %11 ]
store i32 %15, ptr %2, align 8, !tbaa !14
br label %16
16: ; preds = %14, %11
%17 = load i32, ptr %5, align 4, !tbaa !13
%18 = tail call i64 @OF_hasprop(i32 noundef %17, ptr noundef nonnull @.str.1) #2
%19 = icmp eq i64 %18, 0
br i1 %19, label %22, label %20
20: ; preds = %16
%21 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 1
store i32 1, ptr %21, align 4, !tbaa !15
br label %22
22: ; preds = %20, %16
%23 = load i32, ptr @CPSW_PORTS, align 4, !tbaa !16
%24 = icmp sgt i32 %23, 0
br i1 %24, label %25, label %47
25: ; preds = %22
%26 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 1
br label %27
27: ; preds = %25, %43
%28 = phi i32 [ %23, %25 ], [ %44, %43 ]
%29 = phi i32 [ 0, %25 ], [ %45, %43 ]
%30 = load i32, ptr %26, align 4, !tbaa !15
%31 = icmp eq i32 %30, 0
br i1 %31, label %32, label %35
32: ; preds = %27
%33 = load i32, ptr %2, align 8, !tbaa !14
%34 = icmp eq i32 %29, %33
br i1 %34, label %35, label %43
35: ; preds = %32, %27
%36 = tail call i64 @cpsw_get_fdt_data(ptr noundef nonnull %2, i32 noundef %29) #2
%37 = icmp eq i64 %36, 0
br i1 %37, label %38, label %40
38: ; preds = %35
%39 = load i32, ptr @CPSW_PORTS, align 4, !tbaa !16
br label %43
40: ; preds = %35
%41 = tail call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.2) #2
%42 = load i32, ptr @ENXIO, align 4, !tbaa !16
br label %177
43: ; preds = %38, %32
%44 = phi i32 [ %39, %38 ], [ %28, %32 ]
%45 = add nuw nsw i32 %29, 1
%46 = icmp slt i32 %45, %44
br i1 %46, label %27, label %47, !llvm.loop !17
47: ; preds = %43, %22
%48 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 4
%49 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 4, i32 4
%50 = tail call i32 @device_get_nameunit(i32 noundef %0) #2
%51 = load i32, ptr @MTX_DEF, align 4, !tbaa !16
%52 = tail call i32 @mtx_init(ptr noundef nonnull %49, i32 noundef %50, ptr noundef nonnull @.str.3, i32 noundef %51) #2
%53 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 3
%54 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 3, i32 4
%55 = tail call i32 @device_get_nameunit(i32 noundef %0) #2
%56 = load i32, ptr @MTX_DEF, align 4, !tbaa !16
%57 = tail call i32 @mtx_init(ptr noundef nonnull %54, i32 noundef %55, ptr noundef nonnull @.str.4, i32 noundef %56) #2
%58 = load i32, ptr @irq_res_spec, align 4, !tbaa !16
%59 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 10
%60 = load i32, ptr %59, align 8, !tbaa !19
%61 = tail call i32 @bus_alloc_resources(i32 noundef %0, i32 noundef %58, i32 noundef %60) #2
%62 = icmp eq i32 %61, 0
br i1 %62, label %67, label %63
63: ; preds = %47
%64 = tail call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.5) #2
%65 = tail call i32 @cpsw_detach(i32 noundef %0) #2
%66 = load i32, ptr @ENXIO, align 4, !tbaa !16
br label %177
67: ; preds = %47
%68 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 9
store i64 0, ptr %68, align 8, !tbaa !20
%69 = load i32, ptr @SYS_RES_MEMORY, align 4, !tbaa !16
%70 = load i32, ptr @RF_ACTIVE, align 4, !tbaa !16
%71 = tail call ptr @bus_alloc_resource_any(i32 noundef %0, i32 noundef %69, ptr noundef nonnull %68, i32 noundef %70) #2
%72 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 8
store ptr %71, ptr %72, align 8, !tbaa !21
%73 = icmp eq ptr %71, null
br i1 %73, label %74, label %79
74: ; preds = %67
%75 = load i32, ptr %3, align 8, !tbaa !5
%76 = tail call i32 (i32, ptr, ...) @device_printf(i32 noundef %75, ptr noundef nonnull @.str.6) #2
%77 = tail call i32 @cpsw_detach(i32 noundef %0) #2
%78 = load i32, ptr @ENXIO, align 4, !tbaa !16
br label %177
79: ; preds = %67
%80 = load i32, ptr @CPSW_SS_IDVER, align 4, !tbaa !16
%81 = tail call i32 @cpsw_read_4(ptr noundef nonnull %2, i32 noundef %80) #2
%82 = lshr i32 %81, 8
%83 = and i32 %82, 7
%84 = and i32 %81, 255
%85 = lshr i32 %81, 11
%86 = and i32 %85, 31
%87 = tail call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.7, i32 noundef %83, i32 noundef %84, i32 noundef %86) #2
%88 = tail call i32 @cpsw_add_sysctls(ptr noundef nonnull %2) #2
%89 = load i32, ptr %3, align 8, !tbaa !5
%90 = tail call i32 @bus_get_dma_tag(i32 noundef %89) #2
%91 = load i32, ptr @BUS_SPACE_MAXADDR_32BIT, align 4, !tbaa !16
%92 = load i32, ptr @BUS_SPACE_MAXADDR, align 4, !tbaa !16
%93 = load i32, ptr @MCLBYTES, align 4, !tbaa !16
%94 = load i32, ptr @CPSW_TXFRAGS, align 4, !tbaa !16
%95 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 6
%96 = tail call i32 @bus_dma_tag_create(i32 noundef %90, i32 noundef 1, i32 noundef 0, i32 noundef %91, i32 noundef %92, ptr noundef null, ptr noundef null, i32 noundef %93, i32 noundef %94, i32 noundef %93, i32 noundef 0, ptr noundef null, ptr noundef null, ptr noundef nonnull %95) #2
%97 = icmp eq i32 %96, 0
br i1 %97, label %101, label %98
98: ; preds = %79
%99 = tail call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.8) #2
%100 = tail call i32 @cpsw_detach(i32 noundef %0) #2
br label %177
101: ; preds = %79
%102 = load i32, ptr @ETHER_MIN_LEN, align 4, !tbaa !16
%103 = load i32, ptr @M_DEVBUF, align 4, !tbaa !16
%104 = load i32, ptr @M_WAITOK, align 4, !tbaa !16
%105 = load i32, ptr @M_ZERO, align 4, !tbaa !16
%106 = or i32 %105, %104
%107 = tail call i32 @malloc(i32 noundef %102, i32 noundef %103, i32 noundef %106) #2
%108 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 5
store i32 %107, ptr %108, align 8, !tbaa !22
%109 = tail call i32 @cpsw_init_slots(ptr noundef nonnull %2) #2
%110 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 3, i32 3
%111 = tail call i32 @STAILQ_INIT(ptr noundef nonnull %110) #2
%112 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 3, i32 2
%113 = tail call i32 @STAILQ_INIT(ptr noundef nonnull %112) #2
%114 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 4, i32 3
%115 = tail call i32 @STAILQ_INIT(ptr noundef nonnull %114) #2
%116 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 4, i32 2
%117 = tail call i32 @STAILQ_INIT(ptr noundef nonnull %116) #2
%118 = tail call i64 @cpsw_add_slots(ptr noundef nonnull %2, ptr noundef nonnull %48, i32 noundef 128) #2
%119 = icmp eq i64 %118, 0
br i1 %119, label %120, label %123
120: ; preds = %101
%121 = tail call i64 @cpsw_add_slots(ptr noundef nonnull %2, ptr noundef nonnull %53, i32 noundef -1) #2
%122 = icmp eq i64 %121, 0
br i1 %122, label %127, label %123
123: ; preds = %120, %101
%124 = tail call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.9) #2
%125 = tail call i32 @cpsw_detach(i32 noundef %0) #2
%126 = load i32, ptr @ENOMEM, align 4, !tbaa !16
br label %177
127: ; preds = %120
%128 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 4, i32 1
%129 = load i32, ptr %128, align 4, !tbaa !23
%130 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 3, i32 1
%131 = load i32, ptr %130, align 4, !tbaa !24
%132 = tail call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.10, i32 noundef %129, i32 noundef %131) #2
%133 = tail call i32 @CPSW_CPDMA_TX_HDP(i32 noundef 0) #2
store i32 %133, ptr %48, align 4, !tbaa !25
%134 = tail call i32 @CPSW_CPDMA_RX_HDP(i32 noundef 0) #2
store i32 %134, ptr %53, align 8, !tbaa !26
%135 = tail call i32 @cpsw_intr_attach(ptr noundef nonnull %2) #2
%136 = icmp eq i32 %135, -1
br i1 %136, label %137, label %141
137: ; preds = %127
%138 = tail call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.11) #2
%139 = tail call i32 @cpsw_detach(i32 noundef %0) #2
%140 = load i32, ptr @ENXIO, align 4, !tbaa !16
br label %177
141: ; preds = %127
%142 = tail call i32 @cpsw_reset(ptr noundef nonnull %2) #2
%143 = tail call i32 @cpsw_init(ptr noundef nonnull %2) #2
%144 = load i32, ptr @CPSW_PORTS, align 4, !tbaa !16
%145 = icmp sgt i32 %144, 0
br i1 %145, label %146, label %174
146: ; preds = %141
%147 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 1
%148 = getelementptr inbounds %struct.cpsw_softc, ptr %2, i64 0, i32 2
br label %149
149: ; preds = %146, %169
%150 = phi i32 [ %144, %146 ], [ %170, %169 ]
%151 = phi i64 [ 0, %146 ], [ %171, %169 ]
%152 = load i32, ptr %147, align 4, !tbaa !15
%153 = icmp eq i32 %152, 0
br i1 %153, label %154, label %158
154: ; preds = %149
%155 = load i32, ptr %2, align 8, !tbaa !14
%156 = zext i32 %155 to i64
%157 = icmp eq i64 %151, %156
br i1 %157, label %158, label %169
158: ; preds = %154, %149
%159 = trunc i64 %151 to i32
%160 = tail call ptr @device_add_child(i32 noundef %0, ptr noundef nonnull @.str.12, i32 noundef %159) #2
%161 = load ptr, ptr %148, align 8, !tbaa !27
%162 = getelementptr inbounds %struct.TYPE_4__, ptr %161, i64 %151
store ptr %160, ptr %162, align 8, !tbaa !28
%163 = icmp eq ptr %160, null
br i1 %163, label %166, label %164
164: ; preds = %158
%165 = load i32, ptr @CPSW_PORTS, align 4, !tbaa !16
br label %169
166: ; preds = %158
%167 = tail call i32 @cpsw_detach(i32 noundef %0) #2
%168 = load i32, ptr @ENXIO, align 4, !tbaa !16
br label %177
169: ; preds = %164, %154
%170 = phi i32 [ %165, %164 ], [ %150, %154 ]
%171 = add nuw nsw i64 %151, 1
%172 = sext i32 %170 to i64
%173 = icmp slt i64 %171, %172
br i1 %173, label %149, label %174, !llvm.loop !30
174: ; preds = %169, %141
%175 = tail call i32 @bus_generic_probe(i32 noundef %0) #2
%176 = tail call i32 @bus_generic_attach(i32 noundef %0) #2
br label %177
177: ; preds = %174, %166, %137, %123, %98, %74, %63, %40
%178 = phi i32 [ %42, %40 ], [ %66, %63 ], [ %78, %74 ], [ %96, %98 ], [ %126, %123 ], [ %140, %137 ], [ %168, %166 ], [ 0, %174 ]
ret i32 %178
}
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #1
declare i32 @ofw_bus_get_node(i32 noundef) local_unnamed_addr #1
declare i32 @getbinuptime(ptr noundef) local_unnamed_addr #1
declare i64 @OF_getencprop(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @OF_hasprop(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @cpsw_get_fdt_data(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_printf(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @mtx_init(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_get_nameunit(i32 noundef) local_unnamed_addr #1
declare i32 @bus_alloc_resources(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cpsw_detach(i32 noundef) local_unnamed_addr #1
declare ptr @bus_alloc_resource_any(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cpsw_read_4(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cpsw_add_sysctls(ptr noundef) local_unnamed_addr #1
declare i32 @bus_dma_tag_create(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @bus_get_dma_tag(i32 noundef) local_unnamed_addr #1
declare i32 @malloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cpsw_init_slots(ptr noundef) local_unnamed_addr #1
declare i32 @STAILQ_INIT(ptr noundef) local_unnamed_addr #1
declare i64 @cpsw_add_slots(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @CPSW_CPDMA_TX_HDP(i32 noundef) local_unnamed_addr #1
declare i32 @CPSW_CPDMA_RX_HDP(i32 noundef) local_unnamed_addr #1
declare i32 @cpsw_intr_attach(ptr noundef) local_unnamed_addr #1
declare i32 @cpsw_reset(ptr noundef) local_unnamed_addr #1
declare i32 @cpsw_init(ptr noundef) local_unnamed_addr #1
declare ptr @device_add_child(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bus_generic_probe(i32 noundef) local_unnamed_addr #1
declare i32 @bus_generic_attach(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 64}
!6 = !{!"cpsw_softc", !7, i64 0, !7, i64 4, !10, i64 8, !11, i64 16, !11, i64 36, !7, i64 56, !7, i64 60, !7, i64 64, !10, i64 72, !12, i64 80, !7, i64 88, !7, i64 92, !7, i64 96}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"TYPE_6__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16}
!12 = !{!"long", !8, i64 0}
!13 = !{!6, !7, i64 92}
!14 = !{!6, !7, i64 0}
!15 = !{!6, !7, i64 4}
!16 = !{!7, !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!6, !7, i64 88}
!20 = !{!6, !12, i64 80}
!21 = !{!6, !10, i64 72}
!22 = !{!6, !7, i64 56}
!23 = !{!6, !7, i64 40}
!24 = !{!6, !7, i64 20}
!25 = !{!6, !7, i64 36}
!26 = !{!6, !7, i64 16}
!27 = !{!6, !10, i64 8}
!28 = !{!29, !10, i64 0}
!29 = !{!"TYPE_4__", !10, i64 0}
!30 = distinct !{!30, !18}
| ; ModuleID = 'AnghaBench/freebsd/sys/arm/ti/cpsw/extr_if_cpsw.c_cpsw_attach.c'
source_filename = "AnghaBench/freebsd/sys/arm/ti/cpsw/extr_if_cpsw.c_cpsw_attach.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { ptr }
@.str = private unnamed_addr constant [13 x i8] c"active_slave\00", align 1
@.str.1 = private unnamed_addr constant [10 x i8] c"dual_emac\00", align 1
@CPSW_PORTS = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [36 x i8] c"failed to get PHY address from FDT\0A\00", align 1
@ENXIO = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [13 x i8] c"cpsw TX lock\00", align 1
@MTX_DEF = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [13 x i8] c"cpsw RX lock\00", align 1
@irq_res_spec = common local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [34 x i8] c"could not allocate IRQ resources\0A\00", align 1
@SYS_RES_MEMORY = common local_unnamed_addr global i32 0, align 4
@RF_ACTIVE = common local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [36 x i8] c"failed to allocate memory resource\0A\00", align 1
@CPSW_SS_IDVER = common local_unnamed_addr global i32 0, align 4
@.str.7 = private unnamed_addr constant [28 x i8] c"CPSW SS Version %d.%d (%d)\0A\00", align 1
@BUS_SPACE_MAXADDR_32BIT = common local_unnamed_addr global i32 0, align 4
@BUS_SPACE_MAXADDR = common local_unnamed_addr global i32 0, align 4
@MCLBYTES = common local_unnamed_addr global i32 0, align 4
@CPSW_TXFRAGS = common local_unnamed_addr global i32 0, align 4
@.str.8 = private unnamed_addr constant [27 x i8] c"bus_dma_tag_create failed\0A\00", align 1
@ETHER_MIN_LEN = common local_unnamed_addr global i32 0, align 4
@M_DEVBUF = common local_unnamed_addr global i32 0, align 4
@M_WAITOK = common local_unnamed_addr global i32 0, align 4
@M_ZERO = common local_unnamed_addr global i32 0, align 4
@.str.9 = private unnamed_addr constant [28 x i8] c"failed to allocate dmamaps\0A\00", align 1
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@.str.10 = private unnamed_addr constant [32 x i8] c"Initial queue size TX=%d RX=%d\0A\00", align 1
@.str.11 = private unnamed_addr constant [28 x i8] c"failed to setup interrupts\0A\00", align 1
@.str.12 = private unnamed_addr constant [5 x i8] c"cpsw\00", align 1
@CPSW_VLANS = common local_unnamed_addr global i32 0, align 4
@cpsw_vgroups = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @cpsw_attach], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @cpsw_attach(i32 noundef %0) #0 {
%2 = tail call ptr @device_get_softc(i32 noundef %0) #2
%3 = getelementptr inbounds i8, ptr %2, i64 64
store i32 %0, ptr %3, align 8, !tbaa !6
%4 = tail call i32 @ofw_bus_get_node(i32 noundef %0) #2
%5 = getelementptr inbounds i8, ptr %2, i64 92
store i32 %4, ptr %5, align 4, !tbaa !14
%6 = getelementptr inbounds i8, ptr %2, i64 96
%7 = tail call i32 @getbinuptime(ptr noundef nonnull %6) #2
%8 = load i32, ptr %5, align 4, !tbaa !14
%9 = tail call i64 @OF_getencprop(i32 noundef %8, ptr noundef nonnull @.str, ptr noundef %2, i32 noundef 4) #2
%10 = icmp slt i64 %9, 1
br i1 %10, label %14, label %11
11: ; preds = %1
%12 = load i32, ptr %2, align 8, !tbaa !15
%13 = icmp sgt i32 %12, 1
br i1 %13, label %14, label %16
14: ; preds = %11, %1
%15 = phi i32 [ 0, %1 ], [ 1, %11 ]
store i32 %15, ptr %2, align 8, !tbaa !15
br label %16
16: ; preds = %14, %11
%17 = load i32, ptr %5, align 4, !tbaa !14
%18 = tail call i64 @OF_hasprop(i32 noundef %17, ptr noundef nonnull @.str.1) #2
%19 = icmp eq i64 %18, 0
br i1 %19, label %22, label %20
20: ; preds = %16
%21 = getelementptr inbounds i8, ptr %2, i64 4
store i32 1, ptr %21, align 4, !tbaa !16
br label %22
22: ; preds = %20, %16
%23 = load i32, ptr @CPSW_PORTS, align 4, !tbaa !17
%24 = icmp sgt i32 %23, 0
br i1 %24, label %25, label %47
25: ; preds = %22
%26 = getelementptr inbounds i8, ptr %2, i64 4
br label %27
27: ; preds = %25, %43
%28 = phi i32 [ %23, %25 ], [ %44, %43 ]
%29 = phi i32 [ 0, %25 ], [ %45, %43 ]
%30 = load i32, ptr %26, align 4, !tbaa !16
%31 = icmp eq i32 %30, 0
br i1 %31, label %32, label %35
32: ; preds = %27
%33 = load i32, ptr %2, align 8, !tbaa !15
%34 = icmp eq i32 %29, %33
br i1 %34, label %35, label %43
35: ; preds = %32, %27
%36 = tail call i64 @cpsw_get_fdt_data(ptr noundef nonnull %2, i32 noundef %29) #2
%37 = icmp eq i64 %36, 0
br i1 %37, label %38, label %40
38: ; preds = %35
%39 = load i32, ptr @CPSW_PORTS, align 4, !tbaa !17
br label %43
40: ; preds = %35
%41 = tail call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.2) #2
%42 = load i32, ptr @ENXIO, align 4, !tbaa !17
br label %177
43: ; preds = %38, %32
%44 = phi i32 [ %39, %38 ], [ %28, %32 ]
%45 = add nuw nsw i32 %29, 1
%46 = icmp slt i32 %45, %44
br i1 %46, label %27, label %47, !llvm.loop !18
47: ; preds = %43, %22
%48 = getelementptr inbounds i8, ptr %2, i64 36
%49 = getelementptr inbounds i8, ptr %2, i64 52
%50 = tail call i32 @device_get_nameunit(i32 noundef %0) #2
%51 = load i32, ptr @MTX_DEF, align 4, !tbaa !17
%52 = tail call i32 @mtx_init(ptr noundef nonnull %49, i32 noundef %50, ptr noundef nonnull @.str.3, i32 noundef %51) #2
%53 = getelementptr inbounds i8, ptr %2, i64 16
%54 = getelementptr inbounds i8, ptr %2, i64 32
%55 = tail call i32 @device_get_nameunit(i32 noundef %0) #2
%56 = load i32, ptr @MTX_DEF, align 4, !tbaa !17
%57 = tail call i32 @mtx_init(ptr noundef nonnull %54, i32 noundef %55, ptr noundef nonnull @.str.4, i32 noundef %56) #2
%58 = load i32, ptr @irq_res_spec, align 4, !tbaa !17
%59 = getelementptr inbounds i8, ptr %2, i64 88
%60 = load i32, ptr %59, align 8, !tbaa !20
%61 = tail call i32 @bus_alloc_resources(i32 noundef %0, i32 noundef %58, i32 noundef %60) #2
%62 = icmp eq i32 %61, 0
br i1 %62, label %67, label %63
63: ; preds = %47
%64 = tail call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.5) #2
%65 = tail call i32 @cpsw_detach(i32 noundef %0) #2
%66 = load i32, ptr @ENXIO, align 4, !tbaa !17
br label %177
67: ; preds = %47
%68 = getelementptr inbounds i8, ptr %2, i64 80
store i64 0, ptr %68, align 8, !tbaa !21
%69 = load i32, ptr @SYS_RES_MEMORY, align 4, !tbaa !17
%70 = load i32, ptr @RF_ACTIVE, align 4, !tbaa !17
%71 = tail call ptr @bus_alloc_resource_any(i32 noundef %0, i32 noundef %69, ptr noundef nonnull %68, i32 noundef %70) #2
%72 = getelementptr inbounds i8, ptr %2, i64 72
store ptr %71, ptr %72, align 8, !tbaa !22
%73 = icmp eq ptr %71, null
br i1 %73, label %74, label %79
74: ; preds = %67
%75 = load i32, ptr %3, align 8, !tbaa !6
%76 = tail call i32 (i32, ptr, ...) @device_printf(i32 noundef %75, ptr noundef nonnull @.str.6) #2
%77 = tail call i32 @cpsw_detach(i32 noundef %0) #2
%78 = load i32, ptr @ENXIO, align 4, !tbaa !17
br label %177
79: ; preds = %67
%80 = load i32, ptr @CPSW_SS_IDVER, align 4, !tbaa !17
%81 = tail call i32 @cpsw_read_4(ptr noundef nonnull %2, i32 noundef %80) #2
%82 = lshr i32 %81, 8
%83 = and i32 %82, 7
%84 = and i32 %81, 255
%85 = lshr i32 %81, 11
%86 = and i32 %85, 31
%87 = tail call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.7, i32 noundef %83, i32 noundef %84, i32 noundef %86) #2
%88 = tail call i32 @cpsw_add_sysctls(ptr noundef nonnull %2) #2
%89 = load i32, ptr %3, align 8, !tbaa !6
%90 = tail call i32 @bus_get_dma_tag(i32 noundef %89) #2
%91 = load i32, ptr @BUS_SPACE_MAXADDR_32BIT, align 4, !tbaa !17
%92 = load i32, ptr @BUS_SPACE_MAXADDR, align 4, !tbaa !17
%93 = load i32, ptr @MCLBYTES, align 4, !tbaa !17
%94 = load i32, ptr @CPSW_TXFRAGS, align 4, !tbaa !17
%95 = getelementptr inbounds i8, ptr %2, i64 60
%96 = tail call i32 @bus_dma_tag_create(i32 noundef %90, i32 noundef 1, i32 noundef 0, i32 noundef %91, i32 noundef %92, ptr noundef null, ptr noundef null, i32 noundef %93, i32 noundef %94, i32 noundef %93, i32 noundef 0, ptr noundef null, ptr noundef null, ptr noundef nonnull %95) #2
%97 = icmp eq i32 %96, 0
br i1 %97, label %101, label %98
98: ; preds = %79
%99 = tail call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.8) #2
%100 = tail call i32 @cpsw_detach(i32 noundef %0) #2
br label %177
101: ; preds = %79
%102 = load i32, ptr @ETHER_MIN_LEN, align 4, !tbaa !17
%103 = load i32, ptr @M_DEVBUF, align 4, !tbaa !17
%104 = load i32, ptr @M_WAITOK, align 4, !tbaa !17
%105 = load i32, ptr @M_ZERO, align 4, !tbaa !17
%106 = or i32 %105, %104
%107 = tail call i32 @malloc(i32 noundef %102, i32 noundef %103, i32 noundef %106) #2
%108 = getelementptr inbounds i8, ptr %2, i64 56
store i32 %107, ptr %108, align 8, !tbaa !23
%109 = tail call i32 @cpsw_init_slots(ptr noundef nonnull %2) #2
%110 = getelementptr inbounds i8, ptr %2, i64 28
%111 = tail call i32 @STAILQ_INIT(ptr noundef nonnull %110) #2
%112 = getelementptr inbounds i8, ptr %2, i64 24
%113 = tail call i32 @STAILQ_INIT(ptr noundef nonnull %112) #2
%114 = getelementptr inbounds i8, ptr %2, i64 48
%115 = tail call i32 @STAILQ_INIT(ptr noundef nonnull %114) #2
%116 = getelementptr inbounds i8, ptr %2, i64 44
%117 = tail call i32 @STAILQ_INIT(ptr noundef nonnull %116) #2
%118 = tail call i64 @cpsw_add_slots(ptr noundef nonnull %2, ptr noundef nonnull %48, i32 noundef 128) #2
%119 = icmp eq i64 %118, 0
br i1 %119, label %120, label %123
120: ; preds = %101
%121 = tail call i64 @cpsw_add_slots(ptr noundef nonnull %2, ptr noundef nonnull %53, i32 noundef -1) #2
%122 = icmp eq i64 %121, 0
br i1 %122, label %127, label %123
123: ; preds = %120, %101
%124 = tail call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.9) #2
%125 = tail call i32 @cpsw_detach(i32 noundef %0) #2
%126 = load i32, ptr @ENOMEM, align 4, !tbaa !17
br label %177
127: ; preds = %120
%128 = getelementptr inbounds i8, ptr %2, i64 40
%129 = load i32, ptr %128, align 4, !tbaa !24
%130 = getelementptr inbounds i8, ptr %2, i64 20
%131 = load i32, ptr %130, align 4, !tbaa !25
%132 = tail call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.10, i32 noundef %129, i32 noundef %131) #2
%133 = tail call i32 @CPSW_CPDMA_TX_HDP(i32 noundef 0) #2
store i32 %133, ptr %48, align 4, !tbaa !26
%134 = tail call i32 @CPSW_CPDMA_RX_HDP(i32 noundef 0) #2
store i32 %134, ptr %53, align 8, !tbaa !27
%135 = tail call i32 @cpsw_intr_attach(ptr noundef nonnull %2) #2
%136 = icmp eq i32 %135, -1
br i1 %136, label %137, label %141
137: ; preds = %127
%138 = tail call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.11) #2
%139 = tail call i32 @cpsw_detach(i32 noundef %0) #2
%140 = load i32, ptr @ENXIO, align 4, !tbaa !17
br label %177
141: ; preds = %127
%142 = tail call i32 @cpsw_reset(ptr noundef nonnull %2) #2
%143 = tail call i32 @cpsw_init(ptr noundef nonnull %2) #2
%144 = load i32, ptr @CPSW_PORTS, align 4, !tbaa !17
%145 = icmp sgt i32 %144, 0
br i1 %145, label %146, label %174
146: ; preds = %141
%147 = getelementptr inbounds i8, ptr %2, i64 4
%148 = getelementptr inbounds i8, ptr %2, i64 8
br label %149
149: ; preds = %146, %169
%150 = phi i32 [ %144, %146 ], [ %170, %169 ]
%151 = phi i64 [ 0, %146 ], [ %171, %169 ]
%152 = load i32, ptr %147, align 4, !tbaa !16
%153 = icmp eq i32 %152, 0
br i1 %153, label %154, label %158
154: ; preds = %149
%155 = load i32, ptr %2, align 8, !tbaa !15
%156 = zext i32 %155 to i64
%157 = icmp eq i64 %151, %156
br i1 %157, label %158, label %169
158: ; preds = %154, %149
%159 = trunc nuw nsw i64 %151 to i32
%160 = tail call ptr @device_add_child(i32 noundef %0, ptr noundef nonnull @.str.12, i32 noundef %159) #2
%161 = load ptr, ptr %148, align 8, !tbaa !28
%162 = getelementptr inbounds %struct.TYPE_4__, ptr %161, i64 %151
store ptr %160, ptr %162, align 8, !tbaa !29
%163 = icmp eq ptr %160, null
br i1 %163, label %166, label %164
164: ; preds = %158
%165 = load i32, ptr @CPSW_PORTS, align 4, !tbaa !17
br label %169
166: ; preds = %158
%167 = tail call i32 @cpsw_detach(i32 noundef %0) #2
%168 = load i32, ptr @ENXIO, align 4, !tbaa !17
br label %177
169: ; preds = %164, %154
%170 = phi i32 [ %165, %164 ], [ %150, %154 ]
%171 = add nuw nsw i64 %151, 1
%172 = sext i32 %170 to i64
%173 = icmp slt i64 %171, %172
br i1 %173, label %149, label %174, !llvm.loop !31
174: ; preds = %169, %141
%175 = tail call i32 @bus_generic_probe(i32 noundef %0) #2
%176 = tail call i32 @bus_generic_attach(i32 noundef %0) #2
br label %177
177: ; preds = %174, %166, %137, %123, %98, %74, %63, %40
%178 = phi i32 [ %42, %40 ], [ %66, %63 ], [ %78, %74 ], [ %96, %98 ], [ %126, %123 ], [ %140, %137 ], [ %168, %166 ], [ 0, %174 ]
ret i32 %178
}
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #1
declare i32 @ofw_bus_get_node(i32 noundef) local_unnamed_addr #1
declare i32 @getbinuptime(ptr noundef) local_unnamed_addr #1
declare i64 @OF_getencprop(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @OF_hasprop(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @cpsw_get_fdt_data(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_printf(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @mtx_init(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_get_nameunit(i32 noundef) local_unnamed_addr #1
declare i32 @bus_alloc_resources(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cpsw_detach(i32 noundef) local_unnamed_addr #1
declare ptr @bus_alloc_resource_any(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cpsw_read_4(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cpsw_add_sysctls(ptr noundef) local_unnamed_addr #1
declare i32 @bus_dma_tag_create(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @bus_get_dma_tag(i32 noundef) local_unnamed_addr #1
declare i32 @malloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cpsw_init_slots(ptr noundef) local_unnamed_addr #1
declare i32 @STAILQ_INIT(ptr noundef) local_unnamed_addr #1
declare i64 @cpsw_add_slots(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @CPSW_CPDMA_TX_HDP(i32 noundef) local_unnamed_addr #1
declare i32 @CPSW_CPDMA_RX_HDP(i32 noundef) local_unnamed_addr #1
declare i32 @cpsw_intr_attach(ptr noundef) local_unnamed_addr #1
declare i32 @cpsw_reset(ptr noundef) local_unnamed_addr #1
declare i32 @cpsw_init(ptr noundef) local_unnamed_addr #1
declare ptr @device_add_child(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bus_generic_probe(i32 noundef) local_unnamed_addr #1
declare i32 @bus_generic_attach(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 64}
!7 = !{!"cpsw_softc", !8, i64 0, !8, i64 4, !11, i64 8, !12, i64 16, !12, i64 36, !8, i64 56, !8, i64 60, !8, i64 64, !11, i64 72, !13, i64 80, !8, i64 88, !8, i64 92, !8, i64 96}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"TYPE_6__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16}
!13 = !{!"long", !9, i64 0}
!14 = !{!7, !8, i64 92}
!15 = !{!7, !8, i64 0}
!16 = !{!7, !8, i64 4}
!17 = !{!8, !8, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!7, !8, i64 88}
!21 = !{!7, !13, i64 80}
!22 = !{!7, !11, i64 72}
!23 = !{!7, !8, i64 56}
!24 = !{!7, !8, i64 40}
!25 = !{!7, !8, i64 20}
!26 = !{!7, !8, i64 36}
!27 = !{!7, !8, i64 16}
!28 = !{!7, !11, i64 8}
!29 = !{!30, !11, i64 0}
!30 = !{!"TYPE_4__", !11, i64 0}
!31 = distinct !{!31, !19}
| freebsd_sys_arm_ti_cpsw_extr_if_cpsw.c_cpsw_attach |
; ModuleID = 'AnghaBench/linux/net/xdp/extr_xdp_umem.c_xdp_umem_pin_pages.c'
source_filename = "AnghaBench/linux/net/xdp/extr_xdp_umem.c_xdp_umem_pin_pages.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.xdp_umem = type { i64, ptr, i32 }
@FOLL_WRITE = dso_local local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@__GFP_NOWARN = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@current = dso_local local_unnamed_addr global ptr null, align 8
@FOLL_LONGTERM = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @xdp_umem_pin_pages], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @xdp_umem_pin_pages(ptr noundef %0) #0 {
%2 = load i32, ptr @FOLL_WRITE, align 4, !tbaa !5
%3 = load i64, ptr %0, align 8, !tbaa !9
%4 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%5 = load i32, ptr @__GFP_NOWARN, align 4, !tbaa !5
%6 = or i32 %5, %4
%7 = tail call ptr @kcalloc(i64 noundef %3, i32 noundef 4, i32 noundef %6) #2
%8 = getelementptr inbounds %struct.xdp_umem, ptr %0, i64 0, i32 1
store ptr %7, ptr %8, align 8, !tbaa !13
%9 = icmp eq ptr %7, null
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%12 = sub nsw i32 0, %11
br label %41
13: ; preds = %1
%14 = load ptr, ptr @current, align 8, !tbaa !14
%15 = load ptr, ptr %14, align 8, !tbaa !15
%16 = tail call i32 @down_read(ptr noundef %15) #2
%17 = getelementptr inbounds %struct.xdp_umem, ptr %0, i64 0, i32 2
%18 = load i32, ptr %17, align 8, !tbaa !17
%19 = load i64, ptr %0, align 8, !tbaa !9
%20 = load i32, ptr @FOLL_LONGTERM, align 4, !tbaa !5
%21 = or i32 %20, %2
%22 = load ptr, ptr %8, align 8, !tbaa !13
%23 = tail call i64 @get_user_pages(i32 noundef %18, i64 noundef %19, i32 noundef %21, ptr noundef %22, ptr noundef null) #2
%24 = load ptr, ptr @current, align 8, !tbaa !14
%25 = load ptr, ptr %24, align 8, !tbaa !15
%26 = tail call i32 @up_read(ptr noundef %25) #2
%27 = load i64, ptr %0, align 8, !tbaa !9
%28 = icmp eq i64 %23, %27
br i1 %28, label %41, label %29
29: ; preds = %13
%30 = icmp sgt i64 %23, -1
br i1 %30, label %31, label %35
31: ; preds = %29
store i64 %23, ptr %0, align 8, !tbaa !9
%32 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%33 = sub nsw i32 0, %32
%34 = tail call i32 @xdp_umem_unpin_pages(ptr noundef nonnull %0) #2
br label %37
35: ; preds = %29
%36 = trunc i64 %23 to i32
br label %37
37: ; preds = %31, %35
%38 = phi i32 [ %33, %31 ], [ %36, %35 ]
%39 = load ptr, ptr %8, align 8, !tbaa !13
%40 = tail call i32 @kfree(ptr noundef %39) #2
store ptr null, ptr %8, align 8, !tbaa !13
br label %41
41: ; preds = %13, %37, %10
%42 = phi i32 [ %38, %37 ], [ %12, %10 ], [ 0, %13 ]
ret i32 %42
}
declare ptr @kcalloc(i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @down_read(ptr noundef) local_unnamed_addr #1
declare i64 @get_user_pages(i32 noundef, i64 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @up_read(ptr noundef) local_unnamed_addr #1
declare i32 @xdp_umem_unpin_pages(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"xdp_umem", !11, i64 0, !12, i64 8, !6, i64 16}
!11 = !{!"long", !7, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!10, !12, i64 8}
!14 = !{!12, !12, i64 0}
!15 = !{!16, !12, i64 0}
!16 = !{!"TYPE_4__", !12, i64 0}
!17 = !{!10, !6, i64 16}
| ; ModuleID = 'AnghaBench/linux/net/xdp/extr_xdp_umem.c_xdp_umem_pin_pages.c'
source_filename = "AnghaBench/linux/net/xdp/extr_xdp_umem.c_xdp_umem_pin_pages.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FOLL_WRITE = common local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@__GFP_NOWARN = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@current = common local_unnamed_addr global ptr null, align 8
@FOLL_LONGTERM = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @xdp_umem_pin_pages], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @xdp_umem_pin_pages(ptr noundef %0) #0 {
%2 = load i32, ptr @FOLL_WRITE, align 4, !tbaa !6
%3 = load i64, ptr %0, align 8, !tbaa !10
%4 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%5 = load i32, ptr @__GFP_NOWARN, align 4, !tbaa !6
%6 = or i32 %5, %4
%7 = tail call ptr @kcalloc(i64 noundef %3, i32 noundef 4, i32 noundef %6) #2
%8 = getelementptr inbounds i8, ptr %0, i64 8
store ptr %7, ptr %8, align 8, !tbaa !14
%9 = icmp eq ptr %7, null
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%12 = sub nsw i32 0, %11
br label %41
13: ; preds = %1
%14 = load ptr, ptr @current, align 8, !tbaa !15
%15 = load ptr, ptr %14, align 8, !tbaa !16
%16 = tail call i32 @down_read(ptr noundef %15) #2
%17 = getelementptr inbounds i8, ptr %0, i64 16
%18 = load i32, ptr %17, align 8, !tbaa !18
%19 = load i64, ptr %0, align 8, !tbaa !10
%20 = load i32, ptr @FOLL_LONGTERM, align 4, !tbaa !6
%21 = or i32 %20, %2
%22 = load ptr, ptr %8, align 8, !tbaa !14
%23 = tail call i64 @get_user_pages(i32 noundef %18, i64 noundef %19, i32 noundef %21, ptr noundef %22, ptr noundef null) #2
%24 = load ptr, ptr @current, align 8, !tbaa !15
%25 = load ptr, ptr %24, align 8, !tbaa !16
%26 = tail call i32 @up_read(ptr noundef %25) #2
%27 = load i64, ptr %0, align 8, !tbaa !10
%28 = icmp eq i64 %23, %27
br i1 %28, label %41, label %29
29: ; preds = %13
%30 = icmp sgt i64 %23, -1
br i1 %30, label %31, label %35
31: ; preds = %29
store i64 %23, ptr %0, align 8, !tbaa !10
%32 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%33 = sub nsw i32 0, %32
%34 = tail call i32 @xdp_umem_unpin_pages(ptr noundef nonnull %0) #2
br label %37
35: ; preds = %29
%36 = trunc i64 %23 to i32
br label %37
37: ; preds = %31, %35
%38 = phi i32 [ %33, %31 ], [ %36, %35 ]
%39 = load ptr, ptr %8, align 8, !tbaa !14
%40 = tail call i32 @kfree(ptr noundef %39) #2
store ptr null, ptr %8, align 8, !tbaa !14
br label %41
41: ; preds = %13, %37, %10
%42 = phi i32 [ %38, %37 ], [ %12, %10 ], [ 0, %13 ]
ret i32 %42
}
declare ptr @kcalloc(i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @down_read(ptr noundef) local_unnamed_addr #1
declare i64 @get_user_pages(i32 noundef, i64 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @up_read(ptr noundef) local_unnamed_addr #1
declare i32 @xdp_umem_unpin_pages(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"xdp_umem", !12, i64 0, !13, i64 8, !7, i64 16}
!12 = !{!"long", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!11, !13, i64 8}
!15 = !{!13, !13, i64 0}
!16 = !{!17, !13, i64 0}
!17 = !{!"TYPE_4__", !13, i64 0}
!18 = !{!11, !7, i64 16}
| linux_net_xdp_extr_xdp_umem.c_xdp_umem_pin_pages |
; ModuleID = 'AnghaBench/reactos/modules/rosapps/applications/net/tsclient/rdesktop/vnc/extr_vnc.c_ui_move_pointer.c'
source_filename = "AnghaBench/reactos/modules/rosapps/applications/net/tsclient/rdesktop/vnc/extr_vnc.c_ui_move_pointer.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32 }
@server = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local void @ui_move_pointer(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load ptr, ptr @server, align 8, !tbaa !5
%4 = tail call i32 @rfbUndrawCursor(ptr noundef %3) #2
%5 = load ptr, ptr @server, align 8, !tbaa !5
store i32 %0, ptr %5, align 4, !tbaa !9
%6 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 0, i32 1
store i32 %1, ptr %6, align 4, !tbaa !12
ret void
}
declare i32 @rfbUndrawCursor(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_3__", !11, i64 0, !11, i64 4}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 4}
| ; ModuleID = 'AnghaBench/reactos/modules/rosapps/applications/net/tsclient/rdesktop/vnc/extr_vnc.c_ui_move_pointer.c'
source_filename = "AnghaBench/reactos/modules/rosapps/applications/net/tsclient/rdesktop/vnc/extr_vnc.c_ui_move_pointer.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@server = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @ui_move_pointer(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load ptr, ptr @server, align 8, !tbaa !6
%4 = tail call i32 @rfbUndrawCursor(ptr noundef %3) #2
%5 = load ptr, ptr @server, align 8, !tbaa !6
store i32 %0, ptr %5, align 4, !tbaa !10
%6 = getelementptr inbounds i8, ptr %5, i64 4
store i32 %1, ptr %6, align 4, !tbaa !13
ret void
}
declare i32 @rfbUndrawCursor(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_3__", !12, i64 0, !12, i64 4}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !12, i64 4}
| reactos_modules_rosapps_applications_net_tsclient_rdesktop_vnc_extr_vnc.c_ui_move_pointer |
; ModuleID = 'AnghaBench/linux/drivers/scsi/bfa/extr_bfa_fcs_lport.c_bfa_fcs_lport_get_attr.c'
source_filename = "AnghaBench/linux/drivers/scsi/bfa/extr_bfa_fcs_lport.c_bfa_fcs_lport_get_attr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bfa_fcs_lport_s = type { ptr, ptr, ptr, i32, i32, i64 }
%struct.bfa_lport_attr_s = type { i32, i32, i32, i32, i32, ptr, ptr, i32, i64 }
@bfa_fcs_lport_sm_online = dso_local local_unnamed_addr global i32 0, align 4
@bfa_fcs_fabric_sm_loopback = dso_local local_unnamed_addr global i32 0, align 4
@bfa_fcs_fabric_sm_auth_failed = dso_local local_unnamed_addr global i32 0, align 4
@BFA_FCS_FABRIC_IPADDR_SZ = dso_local local_unnamed_addr global i32 0, align 4
@BFA_PORT_TYPE_VPORT = dso_local local_unnamed_addr global i32 0, align 4
@BFA_PORT_TYPE_UNKNOWN = dso_local local_unnamed_addr global i32 0, align 4
@BFA_LPORT_UNINIT = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @bfa_fcs_lport_get_attr(ptr noundef %0, ptr nocapture noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @bfa_fcs_lport_sm_online, align 4, !tbaa !5
%4 = tail call ptr @bfa_sm_cmp_state(ptr noundef %0, i32 noundef %3) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %9, label %6
6: ; preds = %2
%7 = getelementptr inbounds %struct.bfa_fcs_lport_s, ptr %0, i64 0, i32 5
%8 = load i64, ptr %7, align 8, !tbaa !9
br label %9
9: ; preds = %2, %6
%10 = phi i64 [ %8, %6 ], [ 0, %2 ]
%11 = getelementptr inbounds %struct.bfa_lport_attr_s, ptr %1, i64 0, i32 8
store i64 %10, ptr %11, align 8
%12 = getelementptr inbounds %struct.bfa_fcs_lport_s, ptr %0, i64 0, i32 4
%13 = load i32, ptr %12, align 4, !tbaa !13
%14 = getelementptr inbounds %struct.bfa_lport_attr_s, ptr %1, i64 0, i32 7
store i32 %13, ptr %14, align 8, !tbaa !14
%15 = getelementptr inbounds %struct.bfa_fcs_lport_s, ptr %0, i64 0, i32 1
%16 = load ptr, ptr %15, align 8, !tbaa !16
%17 = icmp eq ptr %16, null
br i1 %17, label %49, label %18
18: ; preds = %9
%19 = getelementptr inbounds %struct.bfa_fcs_lport_s, ptr %16, i64 0, i32 3
%20 = load i32, ptr %19, align 8, !tbaa !17
%21 = getelementptr inbounds %struct.bfa_lport_attr_s, ptr %1, i64 0, i32 1
store i32 %20, ptr %21, align 4, !tbaa !18
%22 = load i32, ptr @bfa_fcs_fabric_sm_loopback, align 4, !tbaa !5
%23 = tail call ptr @bfa_sm_cmp_state(ptr noundef nonnull %16, i32 noundef %22) #2
%24 = getelementptr inbounds %struct.bfa_lport_attr_s, ptr %1, i64 0, i32 6
store ptr %23, ptr %24, align 8, !tbaa !19
%25 = load ptr, ptr %15, align 8, !tbaa !16
%26 = load i32, ptr @bfa_fcs_fabric_sm_auth_failed, align 4, !tbaa !5
%27 = tail call ptr @bfa_sm_cmp_state(ptr noundef %25, i32 noundef %26) #2
%28 = getelementptr inbounds %struct.bfa_lport_attr_s, ptr %1, i64 0, i32 5
store ptr %27, ptr %28, align 8, !tbaa !20
%29 = tail call i32 @bfa_fcs_lport_get_fabric_name(ptr noundef nonnull %0) #2
%30 = getelementptr inbounds %struct.bfa_lport_attr_s, ptr %1, i64 0, i32 4
store i32 %29, ptr %30, align 8, !tbaa !21
%31 = getelementptr inbounds %struct.bfa_lport_attr_s, ptr %1, i64 0, i32 3
%32 = load i32, ptr %31, align 4, !tbaa !22
%33 = tail call i32 @bfa_fcs_lport_get_fabric_ipaddr(ptr noundef nonnull %0) #2
%34 = load i32, ptr @BFA_FCS_FABRIC_IPADDR_SZ, align 4, !tbaa !5
%35 = tail call i32 @memcpy(i32 noundef %32, i32 noundef %33, i32 noundef %34) #2
%36 = getelementptr inbounds %struct.bfa_fcs_lport_s, ptr %0, i64 0, i32 2
%37 = load ptr, ptr %36, align 8, !tbaa !23
%38 = icmp eq ptr %37, null
br i1 %38, label %44, label %39
39: ; preds = %18
%40 = load i32, ptr @BFA_PORT_TYPE_VPORT, align 4, !tbaa !5
store i32 %40, ptr %21, align 4, !tbaa !18
%41 = load ptr, ptr %37, align 8, !tbaa !24
%42 = load i32, ptr %41, align 4, !tbaa !26
%43 = getelementptr inbounds %struct.bfa_lport_attr_s, ptr %1, i64 0, i32 2
store i32 %42, ptr %43, align 8, !tbaa !28
br label %53
44: ; preds = %18
%45 = load ptr, ptr %15, align 8, !tbaa !16
%46 = load ptr, ptr %45, align 8, !tbaa !29
%47 = load i32, ptr %46, align 4, !tbaa !30
%48 = getelementptr inbounds %struct.bfa_lport_attr_s, ptr %1, i64 0, i32 2
store i32 %47, ptr %48, align 8, !tbaa !28
br label %53
49: ; preds = %9
%50 = load i32, ptr @BFA_PORT_TYPE_UNKNOWN, align 4, !tbaa !5
%51 = getelementptr inbounds %struct.bfa_lport_attr_s, ptr %1, i64 0, i32 1
store i32 %50, ptr %51, align 4, !tbaa !18
%52 = load i32, ptr @BFA_LPORT_UNINIT, align 4, !tbaa !5
store i32 %52, ptr %1, align 8, !tbaa !32
br label %53
53: ; preds = %39, %44, %49
ret void
}
declare ptr @bfa_sm_cmp_state(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bfa_fcs_lport_get_fabric_name(ptr noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bfa_fcs_lport_get_fabric_ipaddr(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 32}
!10 = !{!"bfa_fcs_lport_s", !11, i64 0, !11, i64 8, !11, i64 16, !6, i64 24, !6, i64 28, !12, i64 32}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!10, !6, i64 28}
!14 = !{!15, !6, i64 40}
!15 = !{!"bfa_lport_attr_s", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !11, i64 24, !11, i64 32, !6, i64 40, !12, i64 48}
!16 = !{!10, !11, i64 8}
!17 = !{!10, !6, i64 24}
!18 = !{!15, !6, i64 4}
!19 = !{!15, !11, i64 32}
!20 = !{!15, !11, i64 24}
!21 = !{!15, !6, i64 16}
!22 = !{!15, !6, i64 12}
!23 = !{!10, !11, i64 16}
!24 = !{!25, !11, i64 0}
!25 = !{!"TYPE_5__", !11, i64 0}
!26 = !{!27, !6, i64 0}
!27 = !{!"TYPE_4__", !6, i64 0}
!28 = !{!15, !6, i64 8}
!29 = !{!10, !11, i64 0}
!30 = !{!31, !6, i64 0}
!31 = !{!"TYPE_6__", !6, i64 0}
!32 = !{!15, !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/bfa/extr_bfa_fcs_lport.c_bfa_fcs_lport_get_attr.c'
source_filename = "AnghaBench/linux/drivers/scsi/bfa/extr_bfa_fcs_lport.c_bfa_fcs_lport_get_attr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@bfa_fcs_lport_sm_online = common local_unnamed_addr global i32 0, align 4
@bfa_fcs_fabric_sm_loopback = common local_unnamed_addr global i32 0, align 4
@bfa_fcs_fabric_sm_auth_failed = common local_unnamed_addr global i32 0, align 4
@BFA_FCS_FABRIC_IPADDR_SZ = common local_unnamed_addr global i32 0, align 4
@BFA_PORT_TYPE_VPORT = common local_unnamed_addr global i32 0, align 4
@BFA_PORT_TYPE_UNKNOWN = common local_unnamed_addr global i32 0, align 4
@BFA_LPORT_UNINIT = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @bfa_fcs_lport_get_attr(ptr noundef %0, ptr nocapture noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @bfa_fcs_lport_sm_online, align 4, !tbaa !6
%4 = tail call ptr @bfa_sm_cmp_state(ptr noundef %0, i32 noundef %3) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %9, label %6
6: ; preds = %2
%7 = getelementptr inbounds i8, ptr %0, i64 32
%8 = load i64, ptr %7, align 8, !tbaa !10
br label %9
9: ; preds = %2, %6
%10 = phi i64 [ %8, %6 ], [ 0, %2 ]
%11 = getelementptr inbounds i8, ptr %1, i64 48
store i64 %10, ptr %11, align 8
%12 = getelementptr inbounds i8, ptr %0, i64 28
%13 = load i32, ptr %12, align 4, !tbaa !14
%14 = getelementptr inbounds i8, ptr %1, i64 40
store i32 %13, ptr %14, align 8, !tbaa !15
%15 = getelementptr inbounds i8, ptr %0, i64 8
%16 = load ptr, ptr %15, align 8, !tbaa !17
%17 = icmp eq ptr %16, null
br i1 %17, label %49, label %18
18: ; preds = %9
%19 = getelementptr inbounds i8, ptr %16, i64 24
%20 = load i32, ptr %19, align 8, !tbaa !18
%21 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %20, ptr %21, align 4, !tbaa !19
%22 = load i32, ptr @bfa_fcs_fabric_sm_loopback, align 4, !tbaa !6
%23 = tail call ptr @bfa_sm_cmp_state(ptr noundef nonnull %16, i32 noundef %22) #2
%24 = getelementptr inbounds i8, ptr %1, i64 32
store ptr %23, ptr %24, align 8, !tbaa !20
%25 = load ptr, ptr %15, align 8, !tbaa !17
%26 = load i32, ptr @bfa_fcs_fabric_sm_auth_failed, align 4, !tbaa !6
%27 = tail call ptr @bfa_sm_cmp_state(ptr noundef %25, i32 noundef %26) #2
%28 = getelementptr inbounds i8, ptr %1, i64 24
store ptr %27, ptr %28, align 8, !tbaa !21
%29 = tail call i32 @bfa_fcs_lport_get_fabric_name(ptr noundef nonnull %0) #2
%30 = getelementptr inbounds i8, ptr %1, i64 16
store i32 %29, ptr %30, align 8, !tbaa !22
%31 = getelementptr inbounds i8, ptr %1, i64 12
%32 = load i32, ptr %31, align 4, !tbaa !23
%33 = tail call i32 @bfa_fcs_lport_get_fabric_ipaddr(ptr noundef nonnull %0) #2
%34 = load i32, ptr @BFA_FCS_FABRIC_IPADDR_SZ, align 4, !tbaa !6
%35 = tail call i32 @memcpy(i32 noundef %32, i32 noundef %33, i32 noundef %34) #2
%36 = getelementptr inbounds i8, ptr %0, i64 16
%37 = load ptr, ptr %36, align 8, !tbaa !24
%38 = icmp eq ptr %37, null
br i1 %38, label %44, label %39
39: ; preds = %18
%40 = load i32, ptr @BFA_PORT_TYPE_VPORT, align 4, !tbaa !6
store i32 %40, ptr %21, align 4, !tbaa !19
%41 = load ptr, ptr %37, align 8, !tbaa !25
%42 = load i32, ptr %41, align 4, !tbaa !27
%43 = getelementptr inbounds i8, ptr %1, i64 8
store i32 %42, ptr %43, align 8, !tbaa !29
br label %53
44: ; preds = %18
%45 = load ptr, ptr %15, align 8, !tbaa !17
%46 = load ptr, ptr %45, align 8, !tbaa !30
%47 = load i32, ptr %46, align 4, !tbaa !31
%48 = getelementptr inbounds i8, ptr %1, i64 8
store i32 %47, ptr %48, align 8, !tbaa !29
br label %53
49: ; preds = %9
%50 = load i32, ptr @BFA_PORT_TYPE_UNKNOWN, align 4, !tbaa !6
%51 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %50, ptr %51, align 4, !tbaa !19
%52 = load i32, ptr @BFA_LPORT_UNINIT, align 4, !tbaa !6
store i32 %52, ptr %1, align 8, !tbaa !33
br label %53
53: ; preds = %39, %44, %49
ret void
}
declare ptr @bfa_sm_cmp_state(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bfa_fcs_lport_get_fabric_name(ptr noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bfa_fcs_lport_get_fabric_ipaddr(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 32}
!11 = !{!"bfa_fcs_lport_s", !12, i64 0, !12, i64 8, !12, i64 16, !7, i64 24, !7, i64 28, !13, i64 32}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!11, !7, i64 28}
!15 = !{!16, !7, i64 40}
!16 = !{!"bfa_lport_attr_s", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !12, i64 24, !12, i64 32, !7, i64 40, !13, i64 48}
!17 = !{!11, !12, i64 8}
!18 = !{!11, !7, i64 24}
!19 = !{!16, !7, i64 4}
!20 = !{!16, !12, i64 32}
!21 = !{!16, !12, i64 24}
!22 = !{!16, !7, i64 16}
!23 = !{!16, !7, i64 12}
!24 = !{!11, !12, i64 16}
!25 = !{!26, !12, i64 0}
!26 = !{!"TYPE_5__", !12, i64 0}
!27 = !{!28, !7, i64 0}
!28 = !{!"TYPE_4__", !7, i64 0}
!29 = !{!16, !7, i64 8}
!30 = !{!11, !12, i64 0}
!31 = !{!32, !7, i64 0}
!32 = !{!"TYPE_6__", !7, i64 0}
!33 = !{!16, !7, i64 0}
| linux_drivers_scsi_bfa_extr_bfa_fcs_lport.c_bfa_fcs_lport_get_attr |
; ModuleID = 'AnghaBench/linux/drivers/soc/mediatek/extr_mtk-scpsys.c_mtk_register_power_domains.c'
source_filename = "AnghaBench/linux/drivers/soc/mediatek/extr_mtk-scpsys.c_mtk_register_power_domains.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.scp = type { %struct.genpd_onecell_data, ptr }
%struct.genpd_onecell_data = type { i32 }
%struct.scp_domain = type { %struct.generic_pm_domain }
%struct.generic_pm_domain = type { ptr }
@.str = private unnamed_addr constant [31 x i8] c"Failed to add OF provider: %d\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @mtk_register_power_domains], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @mtk_register_power_domains(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = getelementptr inbounds %struct.scp, ptr %1, i64 0, i32 1
%7 = zext nneg i32 %2 to i64
br label %8
8: ; preds = %5, %8
%9 = phi i64 [ 0, %5 ], [ %15, %8 ]
%10 = load ptr, ptr %6, align 8, !tbaa !5
%11 = getelementptr inbounds %struct.scp_domain, ptr %10, i64 %9
%12 = load ptr, ptr %11, align 8, !tbaa !12
%13 = tail call i32 %12(ptr noundef nonnull %11) #2
%14 = tail call i32 @pm_genpd_init(ptr noundef nonnull %11, ptr noundef null, i32 noundef 0) #2
%15 = add nuw nsw i64 %9, 1
%16 = icmp eq i64 %15, %7
br i1 %16, label %17, label %8, !llvm.loop !14
17: ; preds = %8, %3
%18 = load i32, ptr %0, align 4, !tbaa !16
%19 = tail call i32 @of_genpd_add_provider_onecell(i32 noundef %18, ptr noundef %1) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %23, label %21
21: ; preds = %17
%22 = tail call i32 @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str, i32 noundef %19) #2
br label %23
23: ; preds = %21, %17
ret void
}
declare i32 @pm_genpd_init(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @of_genpd_add_provider_onecell(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 8}
!6 = !{!"scp", !7, i64 0, !11, i64 8}
!7 = !{!"genpd_onecell_data", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"generic_pm_domain", !11, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!17, !8, i64 0}
!17 = !{!"platform_device", !18, i64 0}
!18 = !{!"TYPE_2__", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/soc/mediatek/extr_mtk-scpsys.c_mtk_register_power_domains.c'
source_filename = "AnghaBench/linux/drivers/soc/mediatek/extr_mtk-scpsys.c_mtk_register_power_domains.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.scp_domain = type { %struct.generic_pm_domain }
%struct.generic_pm_domain = type { ptr }
@.str = private unnamed_addr constant [31 x i8] c"Failed to add OF provider: %d\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @mtk_register_power_domains], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @mtk_register_power_domains(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = getelementptr inbounds i8, ptr %1, i64 8
%7 = zext nneg i32 %2 to i64
br label %8
8: ; preds = %5, %8
%9 = phi i64 [ 0, %5 ], [ %15, %8 ]
%10 = load ptr, ptr %6, align 8, !tbaa !6
%11 = getelementptr inbounds %struct.scp_domain, ptr %10, i64 %9
%12 = load ptr, ptr %11, align 8, !tbaa !13
%13 = tail call i32 %12(ptr noundef nonnull %11) #2
%14 = tail call i32 @pm_genpd_init(ptr noundef nonnull %11, ptr noundef null, i32 noundef 0) #2
%15 = add nuw nsw i64 %9, 1
%16 = icmp eq i64 %15, %7
br i1 %16, label %17, label %8, !llvm.loop !15
17: ; preds = %8, %3
%18 = load i32, ptr %0, align 4, !tbaa !17
%19 = tail call i32 @of_genpd_add_provider_onecell(i32 noundef %18, ptr noundef %1) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %23, label %21
21: ; preds = %17
%22 = tail call i32 @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str, i32 noundef %19) #2
br label %23
23: ; preds = %21, %17
ret void
}
declare i32 @pm_genpd_init(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @of_genpd_add_provider_onecell(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 8}
!7 = !{!"scp", !8, i64 0, !12, i64 8}
!8 = !{!"genpd_onecell_data", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"generic_pm_domain", !12, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!18, !9, i64 0}
!18 = !{!"platform_device", !19, i64 0}
!19 = !{!"TYPE_2__", !9, i64 0}
| linux_drivers_soc_mediatek_extr_mtk-scpsys.c_mtk_register_power_domains |
; ModuleID = 'AnghaBench/linux/fs/reiserfs/extr_reiserfs.h_reiserfs_bmap_count.c'
source_filename = "AnghaBench/linux/fs/reiserfs/extr_reiserfs.h_reiserfs_bmap_count.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @reiserfs_bmap_count], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @reiserfs_bmap_count(ptr noundef %0) #0 {
%2 = tail call i32 @SB_BLOCK_COUNT(ptr noundef %0) #2
%3 = add nsw i32 %2, -1
%4 = load i32, ptr %0, align 4, !tbaa !5
%5 = shl nsw i32 %4, 3
%6 = sdiv i32 %3, %5
%7 = add nsw i32 %6, 1
ret i32 %7
}
declare i32 @SB_BLOCK_COUNT(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"super_block", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/fs/reiserfs/extr_reiserfs.h_reiserfs_bmap_count.c'
source_filename = "AnghaBench/linux/fs/reiserfs/extr_reiserfs.h_reiserfs_bmap_count.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @reiserfs_bmap_count], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @reiserfs_bmap_count(ptr noundef %0) #0 {
%2 = tail call i32 @SB_BLOCK_COUNT(ptr noundef %0) #2
%3 = add nsw i32 %2, -1
%4 = load i32, ptr %0, align 4, !tbaa !6
%5 = shl nsw i32 %4, 3
%6 = sdiv i32 %3, %5
%7 = add nsw i32 %6, 1
ret i32 %7
}
declare i32 @SB_BLOCK_COUNT(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"super_block", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_fs_reiserfs_extr_reiserfs.h_reiserfs_bmap_count |
; ModuleID = 'AnghaBench/linux/fs/afs/extr_yfsclient.c_afs_use_fs_server.c'
source_filename = "AnghaBench/linux/fs/afs/extr_yfsclient.c_afs_use_fs_server.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @afs_use_fs_server], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @afs_use_fs_server(ptr nocapture noundef writeonly %0, ptr noundef %1) #0 {
%3 = tail call i32 @afs_get_cb_interest(ptr noundef %1) #2
store i32 %3, ptr %0, align 4, !tbaa !5
ret void
}
declare i32 @afs_get_cb_interest(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"afs_call", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/fs/afs/extr_yfsclient.c_afs_use_fs_server.c'
source_filename = "AnghaBench/linux/fs/afs/extr_yfsclient.c_afs_use_fs_server.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @afs_use_fs_server], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @afs_use_fs_server(ptr nocapture noundef writeonly %0, ptr noundef %1) #0 {
%3 = tail call i32 @afs_get_cb_interest(ptr noundef %1) #2
store i32 %3, ptr %0, align 4, !tbaa !6
ret void
}
declare i32 @afs_get_cb_interest(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"afs_call", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_fs_afs_extr_yfsclient.c_afs_use_fs_server |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/powerplay/hwmgr/extr_vega12_hwmgr.c_vega12_odn_initialize_default_settings.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/powerplay/hwmgr/extr_vega12_hwmgr.c_vega12_odn_initialize_default_settings.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @vega12_odn_initialize_default_settings], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @vega12_odn_initialize_default_settings(ptr nocapture readnone %0) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/powerplay/hwmgr/extr_vega12_hwmgr.c_vega12_odn_initialize_default_settings.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/powerplay/hwmgr/extr_vega12_hwmgr.c_vega12_odn_initialize_default_settings.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @vega12_odn_initialize_default_settings], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @vega12_odn_initialize_default_settings(ptr nocapture readnone %0) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_gpu_drm_amd_powerplay_hwmgr_extr_vega12_hwmgr.c_vega12_odn_initialize_default_settings |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/display/amdgpu_dm/extr_amdgpu_dm.c_dm_crtc_destroy_state.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/display/amdgpu_dm/extr_amdgpu_dm.c_dm_crtc_destroy_state.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @dm_crtc_destroy_state], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @dm_crtc_destroy_state(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = tail call ptr @to_dm_crtc_state(ptr noundef %1) #2
%4 = load i64, ptr %3, align 8, !tbaa !5
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 @dc_stream_release(i64 noundef %4) #2
br label %8
8: ; preds = %6, %2
%9 = tail call i32 @__drm_atomic_helper_crtc_destroy_state(ptr noundef %1) #2
%10 = tail call i32 @kfree(ptr noundef %1) #2
ret void
}
declare ptr @to_dm_crtc_state(ptr noundef) local_unnamed_addr #1
declare i32 @dc_stream_release(i64 noundef) local_unnamed_addr #1
declare i32 @__drm_atomic_helper_crtc_destroy_state(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"dm_crtc_state", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/display/amdgpu_dm/extr_amdgpu_dm.c_dm_crtc_destroy_state.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/display/amdgpu_dm/extr_amdgpu_dm.c_dm_crtc_destroy_state.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @dm_crtc_destroy_state], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @dm_crtc_destroy_state(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = tail call ptr @to_dm_crtc_state(ptr noundef %1) #2
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 @dc_stream_release(i64 noundef %4) #2
br label %8
8: ; preds = %6, %2
%9 = tail call i32 @__drm_atomic_helper_crtc_destroy_state(ptr noundef %1) #2
%10 = tail call i32 @kfree(ptr noundef %1) #2
ret void
}
declare ptr @to_dm_crtc_state(ptr noundef) local_unnamed_addr #1
declare i32 @dc_stream_release(i64 noundef) local_unnamed_addr #1
declare i32 @__drm_atomic_helper_crtc_destroy_state(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"dm_crtc_state", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_gpu_drm_amd_display_amdgpu_dm_extr_amdgpu_dm.c_dm_crtc_destroy_state |
; ModuleID = 'AnghaBench/linux/net/netfilter/extr_nf_tables_offload.c_nft_flow_rule_alloc.c'
source_filename = "AnghaBench/linux/net/netfilter/extr_nf_tables_offload.c_nft_flow_rule_alloc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.nft_flow_rule = type { %struct.TYPE_5__, ptr }
%struct.TYPE_5__ = type { i32, i32, i32 }
%struct.TYPE_4__ = type { ptr, ptr, ptr }
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @nft_flow_rule_alloc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @nft_flow_rule_alloc(i32 noundef %0) #0 {
%2 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%3 = tail call ptr @kzalloc(i32 noundef 24, i32 noundef %2) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %16, label %5
5: ; preds = %1
%6 = tail call ptr @flow_rule_alloc(i32 noundef %0) #2
%7 = getelementptr inbounds %struct.nft_flow_rule, ptr %3, i64 0, i32 1
store ptr %6, ptr %7, align 8, !tbaa !9
%8 = icmp eq ptr %6, null
br i1 %8, label %9, label %11
9: ; preds = %5
%10 = tail call i32 @kfree(ptr noundef nonnull %3) #2
br label %16
11: ; preds = %5
%12 = getelementptr inbounds %struct.TYPE_5__, ptr %3, i64 0, i32 2
%13 = getelementptr inbounds %struct.TYPE_4__, ptr %6, i64 0, i32 2
store ptr %12, ptr %13, align 8, !tbaa !13
%14 = getelementptr inbounds %struct.TYPE_5__, ptr %3, i64 0, i32 1
%15 = getelementptr inbounds %struct.TYPE_4__, ptr %6, i64 0, i32 1
store ptr %14, ptr %15, align 8, !tbaa !16
store ptr %3, ptr %6, align 8, !tbaa !17
br label %16
16: ; preds = %1, %11, %9
%17 = phi ptr [ %3, %11 ], [ null, %9 ], [ null, %1 ]
ret ptr %17
}
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @flow_rule_alloc(i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 16}
!10 = !{!"nft_flow_rule", !11, i64 0, !12, i64 16}
!11 = !{!"TYPE_5__", !6, i64 0, !6, i64 4, !6, i64 8}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !12, i64 16}
!14 = !{!"TYPE_6__", !15, i64 0}
!15 = !{!"TYPE_4__", !12, i64 0, !12, i64 8, !12, i64 16}
!16 = !{!14, !12, i64 8}
!17 = !{!14, !12, i64 0}
| ; ModuleID = 'AnghaBench/linux/net/netfilter/extr_nf_tables_offload.c_nft_flow_rule_alloc.c'
source_filename = "AnghaBench/linux/net/netfilter/extr_nf_tables_offload.c_nft_flow_rule_alloc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @nft_flow_rule_alloc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @nft_flow_rule_alloc(i32 noundef %0) #0 {
%2 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%3 = tail call ptr @kzalloc(i32 noundef 24, i32 noundef %2) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %16, label %5
5: ; preds = %1
%6 = tail call ptr @flow_rule_alloc(i32 noundef %0) #2
%7 = getelementptr inbounds i8, ptr %3, i64 16
store ptr %6, ptr %7, align 8, !tbaa !10
%8 = icmp eq ptr %6, null
br i1 %8, label %9, label %11
9: ; preds = %5
%10 = tail call i32 @kfree(ptr noundef nonnull %3) #2
br label %16
11: ; preds = %5
%12 = getelementptr inbounds i8, ptr %3, i64 8
%13 = getelementptr inbounds i8, ptr %6, i64 16
store ptr %12, ptr %13, align 8, !tbaa !14
%14 = getelementptr inbounds i8, ptr %3, i64 4
%15 = getelementptr inbounds i8, ptr %6, i64 8
store ptr %14, ptr %15, align 8, !tbaa !17
store ptr %3, ptr %6, align 8, !tbaa !18
br label %16
16: ; preds = %1, %11, %9
%17 = phi ptr [ %3, %11 ], [ null, %9 ], [ null, %1 ]
ret ptr %17
}
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @flow_rule_alloc(i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 16}
!11 = !{!"nft_flow_rule", !12, i64 0, !13, i64 16}
!12 = !{!"TYPE_5__", !7, i64 0, !7, i64 4, !7, i64 8}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !13, i64 16}
!15 = !{!"TYPE_6__", !16, i64 0}
!16 = !{!"TYPE_4__", !13, i64 0, !13, i64 8, !13, i64 16}
!17 = !{!15, !13, i64 8}
!18 = !{!15, !13, i64 0}
| linux_net_netfilter_extr_nf_tables_offload.c_nft_flow_rule_alloc |
; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/sh2_dynarec/extr_sh2_dynarec.c_sjump_assemble.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/sh2_dynarec/extr_sh2_dynarec.c_sjump_assemble.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.regstat = type { ptr, i32 }
%struct.TYPE_2__ = type { ptr, i64, i32, i32 }
@ba = dso_local local_unnamed_addr global ptr null, align 8
@branch_regs = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [10 x i8] c"match=%d\0A\00", align 1
@start = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [11 x i8] c"idle loop\0A\00", align 1
@ooo = dso_local local_unnamed_addr global ptr null, align 8
@SR = dso_local local_unnamed_addr global i64 0, align 8
@CCREG = dso_local local_unnamed_addr global i64 0, align 8
@HOST_CCREG = dso_local local_unnamed_addr global i32 0, align 4
@regs = dso_local local_unnamed_addr global ptr null, align 8
@NODS = dso_local local_unnamed_addr global i32 0, align 4
@rs1 = dso_local local_unnamed_addr global ptr null, align 8
@rs2 = dso_local local_unnamed_addr global ptr null, align 8
@TAKEN = dso_local local_unnamed_addr global i32 0, align 4
@source = dso_local local_unnamed_addr global ptr null, align 8
@CLOCK_DIVIDER = dso_local local_unnamed_addr global i32 0, align 4
@ccadj = dso_local local_unnamed_addr global ptr null, align 8
@.str.2 = private unnamed_addr constant [18 x i8] c"branch: internal\0A\00", align 1
@.str.3 = private unnamed_addr constant [18 x i8] c"branch: external\0A\00", align 1
@is_ds = dso_local local_unnamed_addr global ptr null, align 8
@out = dso_local local_unnamed_addr global i64 0, align 8
@CC_STUB = dso_local local_unnamed_addr global i32 0, align 4
@NOTTAKEN = dso_local local_unnamed_addr global i32 0, align 4
@opcode2 = dso_local local_unnamed_addr global ptr null, align 8
@rs3 = dso_local local_unnamed_addr global ptr null, align 8
@.str.4 = private unnamed_addr constant [4 x i8] c"1:\0A\00", align 1
@itype = dso_local local_unnamed_addr global ptr null, align 8
@COMPLEX = dso_local local_unnamed_addr global i64 0, align 8
@opcode = dso_local local_unnamed_addr global ptr null, align 8
@MACL = dso_local local_unnamed_addr global i64 0, align 8
@MACH = dso_local local_unnamed_addr global i64 0, align 8
@.str.5 = private unnamed_addr constant [19 x i8] c"cycle count (adj)\0A\00", align 1
@.str.6 = private unnamed_addr constant [4 x i8] c"2:\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @sjump_assemble(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
%4 = load ptr, ptr %1, align 8, !tbaa !5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%5 = load ptr, ptr @ba, align 8, !tbaa !11
%6 = sext i32 %0 to i64
%7 = getelementptr inbounds i32, ptr %5, i64 %6
%8 = load i32, ptr %7, align 4, !tbaa !12
%9 = tail call i32 @internal_branch(i32 noundef %8) #3
%10 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%11 = getelementptr inbounds %struct.regstat, ptr %10, i64 %6
%12 = load ptr, ptr %11, align 8, !tbaa !5
%13 = getelementptr inbounds %struct.regstat, ptr %10, i64 %6, i32 1
%14 = load i32, ptr %13, align 8, !tbaa !13
%15 = load ptr, ptr @ba, align 8, !tbaa !11
%16 = getelementptr inbounds i32, ptr %15, i64 %6
%17 = load i32, ptr %16, align 4, !tbaa !12
%18 = tail call i32 @match_bt(ptr noundef %12, i32 noundef %14, i32 noundef %17) #3
%19 = tail call i32 (ptr, ...) @assem_debug(ptr noundef nonnull @.str, i32 noundef %18) #3
%20 = load ptr, ptr @ba, align 8, !tbaa !11
%21 = getelementptr inbounds i32, ptr %20, i64 %6
%22 = load i32, ptr %21, align 4, !tbaa !12
%23 = tail call i32 @internal_branch(i32 noundef %22) #3
%24 = load ptr, ptr @ba, align 8, !tbaa !11
%25 = getelementptr inbounds i32, ptr %24, i64 %6
%26 = load i32, ptr %25, align 4, !tbaa !12
%27 = load i32, ptr @start, align 4, !tbaa !12
%28 = sub nsw i32 %26, %27
%29 = ashr i32 %28, 1
%30 = icmp eq i32 %29, %0
br i1 %30, label %31, label %33
31: ; preds = %2
%32 = tail call i32 (ptr, ...) @assem_debug(ptr noundef nonnull @.str.1) #3
br label %33
33: ; preds = %31, %2
%34 = icmp eq i32 %18, 0
%35 = zext i1 %34 to i32
%36 = load ptr, ptr @ooo, align 8, !tbaa !11
%37 = getelementptr inbounds i64, ptr %36, i64 %6
%38 = load i64, ptr %37, align 8, !tbaa !14
%39 = icmp eq i64 %38, 0
br i1 %39, label %44, label %40
40: ; preds = %33
%41 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%42 = getelementptr inbounds %struct.regstat, ptr %41, i64 %6
%43 = load ptr, ptr %42, align 8, !tbaa !5
br label %44
44: ; preds = %33, %40
%45 = phi ptr [ %43, %40 ], [ %4, %33 ]
%46 = load i64, ptr @SR, align 8, !tbaa !16
%47 = tail call i32 @get_reg(ptr noundef %45, i64 noundef %46) #3
%48 = load i64, ptr @CCREG, align 8, !tbaa !16
%49 = tail call i32 @get_reg(ptr noundef %4, i64 noundef %48) #3
%50 = load i32, ptr @HOST_CCREG, align 4, !tbaa !12
%51 = icmp eq i32 %49, %50
%52 = zext i1 %51 to i32
%53 = tail call i32 @assert(i32 noundef %52) #3
%54 = load ptr, ptr @ooo, align 8, !tbaa !11
%55 = getelementptr inbounds i64, ptr %54, i64 %6
%56 = load i64, ptr %55, align 8, !tbaa !14
%57 = icmp eq i64 %56, 0
%58 = load ptr, ptr @regs, align 8, !tbaa !11
%59 = getelementptr inbounds %struct.TYPE_2__, ptr %58, i64 %6
%60 = load ptr, ptr %59, align 8, !tbaa !18
%61 = load i32, ptr @start, align 4, !tbaa !12
%62 = shl nsw i32 %0, 1
%63 = add nsw i32 %61, %62
%64 = load i32, ptr @NODS, align 4, !tbaa !12
br i1 %57, label %232, label %65
65: ; preds = %44
%66 = call i32 @do_cc(i32 noundef %0, ptr noundef %60, ptr noundef nonnull %3, i32 noundef %63, i32 noundef %64, i32 noundef %35) #3
%67 = add nsw i32 %0, 1
%68 = load ptr, ptr @regs, align 8, !tbaa !11
%69 = getelementptr inbounds %struct.TYPE_2__, ptr %68, i64 %6, i32 3
%70 = load i32, ptr %69, align 4, !tbaa !20
%71 = call i32 @address_generation(i32 noundef %67, ptr noundef nonnull %1, i32 noundef %70) #3
%72 = call i32 @ds_assemble(i32 noundef %67, ptr noundef nonnull %1) #3
%73 = load ptr, ptr @regs, align 8, !tbaa !11
%74 = getelementptr inbounds %struct.TYPE_2__, ptr %73, i64 %6
%75 = getelementptr inbounds %struct.TYPE_2__, ptr %73, i64 %6, i32 1
%76 = load i64, ptr %75, align 8, !tbaa !21
%77 = load ptr, ptr @rs1, align 8, !tbaa !11
%78 = getelementptr inbounds i64, ptr %77, i64 %6
%79 = load i64, ptr %78, align 8, !tbaa !16
%80 = shl nuw i64 1, %79
%81 = load ptr, ptr @rs2, align 8, !tbaa !11
%82 = getelementptr inbounds i64, ptr %81, i64 %6
%83 = load i64, ptr %82, align 8, !tbaa !16
%84 = shl nuw i64 1, %83
%85 = or i64 %84, %80
%86 = xor i64 %85, -1
%87 = and i64 %76, %86
%88 = load ptr, ptr %74, align 8, !tbaa !18
%89 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%90 = getelementptr inbounds %struct.regstat, ptr %89, i64 %6
%91 = load ptr, ptr %90, align 8, !tbaa !5
%92 = getelementptr inbounds %struct.TYPE_2__, ptr %73, i64 %6, i32 2
%93 = load i32, ptr %92, align 8, !tbaa !22
%94 = call i32 @wb_invalidate(ptr noundef %88, ptr noundef %91, i32 noundef %93, i64 noundef %87) #3
%95 = load ptr, ptr @regs, align 8, !tbaa !11
%96 = getelementptr inbounds %struct.TYPE_2__, ptr %95, i64 %6
%97 = load ptr, ptr %96, align 8, !tbaa !18
%98 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%99 = getelementptr inbounds %struct.regstat, ptr %98, i64 %6
%100 = load ptr, ptr %99, align 8, !tbaa !5
%101 = load i64, ptr @CCREG, align 8, !tbaa !16
%102 = load i64, ptr @SR, align 8, !tbaa !16
%103 = call i32 @load_regs(ptr noundef %97, ptr noundef %100, i64 noundef %101, i64 noundef %102, i64 noundef %102) #3
%104 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%105 = getelementptr inbounds %struct.regstat, ptr %104, i64 %6
%106 = load ptr, ptr %105, align 8, !tbaa !5
%107 = load i64, ptr @CCREG, align 8, !tbaa !16
%108 = call i32 @get_reg(ptr noundef %106, i64 noundef %107) #3
%109 = load i32, ptr @HOST_CCREG, align 4, !tbaa !12
%110 = icmp eq i32 %108, %109
%111 = zext i1 %110 to i32
%112 = call i32 @assert(i32 noundef %111) #3
%113 = load i32, ptr %3, align 4, !tbaa !12
%114 = icmp eq i32 %113, 0
%115 = or i1 %34, %114
br i1 %115, label %124, label %116
116: ; preds = %65
%117 = load i32, ptr @CLOCK_DIVIDER, align 4, !tbaa !12
%118 = load ptr, ptr @ccadj, align 8, !tbaa !11
%119 = getelementptr inbounds i32, ptr %118, i64 %6
%120 = load i32, ptr %119, align 4, !tbaa !12
%121 = sub nsw i32 %120, %113
%122 = mul nsw i32 %121, %117
%123 = call i32 @emit_addimm(i32 noundef %108, i32 noundef %122, i32 noundef %108) #3
br label %124
124: ; preds = %116, %65
%125 = icmp sgt i32 %47, -1
%126 = zext i1 %125 to i32
%127 = call i32 @assert(i32 noundef %126) #3
%128 = call i32 @emit_testimm(i32 noundef %47, i32 noundef 1) #3
%129 = load ptr, ptr @opcode2, align 8, !tbaa !11
%130 = getelementptr inbounds i32, ptr %129, i64 %6
%131 = load i32, ptr %130, align 4, !tbaa !12
switch i32 %131, label %164 [
i32 13, label %132
i32 15, label %151
]
132: ; preds = %124
%133 = load i64, ptr @out, align 8, !tbaa !14
%134 = trunc i64 %133 to i32
br i1 %34, label %135, label %141
135: ; preds = %132
%136 = call i32 @emit_jeq(i32 noundef 1) #3
%137 = load ptr, ptr @opcode2, align 8, !tbaa !11
%138 = getelementptr inbounds i32, ptr %137, i64 %6
%139 = load i32, ptr %138, align 4, !tbaa !12
%140 = icmp eq i32 %139, 15
br i1 %140, label %152, label %165
141: ; preds = %132
%142 = load ptr, ptr @ba, align 8, !tbaa !11
%143 = getelementptr inbounds i32, ptr %142, i64 %6
%144 = load i32, ptr %143, align 4, !tbaa !12
%145 = call i32 @add_to_linker(i32 noundef %134, i32 noundef %144, i32 noundef %23) #3
%146 = call i32 @emit_jne(i32 noundef 0) #3
%147 = load ptr, ptr @opcode2, align 8, !tbaa !11
%148 = getelementptr inbounds i32, ptr %147, i64 %6
%149 = load i32, ptr %148, align 4, !tbaa !12
%150 = icmp eq i32 %149, 15
br i1 %150, label %156, label %224
151: ; preds = %124
br i1 %34, label %152, label %156
152: ; preds = %135, %151
%153 = load i64, ptr @out, align 8, !tbaa !14
%154 = trunc i64 %153 to i32
%155 = call i32 @emit_jne(i32 noundef 1) #3
br label %165
156: ; preds = %141, %151
%157 = load i64, ptr @out, align 8, !tbaa !14
%158 = trunc i64 %157 to i32
%159 = load ptr, ptr @ba, align 8, !tbaa !11
%160 = getelementptr inbounds i32, ptr %159, i64 %6
%161 = load i32, ptr %160, align 4, !tbaa !12
%162 = call i32 @add_to_linker(i32 noundef %158, i32 noundef %161, i32 noundef %23) #3
%163 = call i32 @emit_jeq(i32 noundef 0) #3
br label %224
164: ; preds = %124
br i1 %34, label %165, label %224
165: ; preds = %152, %135, %164
%166 = phi i32 [ 0, %164 ], [ %134, %135 ], [ %154, %152 ]
%167 = load i32, ptr %3, align 4, !tbaa !12
%168 = icmp eq i32 %167, 0
br i1 %168, label %174, label %169
169: ; preds = %165
%170 = load i32, ptr @CLOCK_DIVIDER, align 4, !tbaa !12
%171 = mul i32 %167, %170
%172 = sub i32 0, %171
%173 = call i32 @emit_addimm(i32 noundef %108, i32 noundef %172, i32 noundef %108) #3
br label %174
174: ; preds = %169, %165
%175 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%176 = getelementptr inbounds %struct.regstat, ptr %175, i64 %6
%177 = load ptr, ptr %176, align 8, !tbaa !5
%178 = getelementptr inbounds %struct.regstat, ptr %175, i64 %6, i32 1
%179 = load i32, ptr %178, align 8, !tbaa !13
%180 = load ptr, ptr @ba, align 8, !tbaa !11
%181 = getelementptr inbounds i32, ptr %180, i64 %6
%182 = load i32, ptr %181, align 4, !tbaa !12
%183 = call i32 @store_regs_bt(ptr noundef %177, i32 noundef %179, i32 noundef %182) #3
%184 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%185 = getelementptr inbounds %struct.regstat, ptr %184, i64 %6
%186 = load ptr, ptr %185, align 8, !tbaa !5
%187 = getelementptr inbounds %struct.regstat, ptr %184, i64 %6, i32 1
%188 = load i32, ptr %187, align 8, !tbaa !13
%189 = load ptr, ptr @ba, align 8, !tbaa !11
%190 = getelementptr inbounds i32, ptr %189, i64 %6
%191 = load i32, ptr %190, align 4, !tbaa !12
%192 = call i32 @load_regs_bt(ptr noundef %186, i32 noundef %188, i32 noundef %191) #3
%193 = icmp eq i32 %23, 0
br i1 %193, label %194, label %199
194: ; preds = %174
%195 = call i32 (ptr, ...) @assem_debug(ptr noundef nonnull @.str.3) #3
%196 = load ptr, ptr @ba, align 8, !tbaa !11
%197 = getelementptr inbounds i32, ptr %196, i64 %6
%198 = load i32, ptr %197, align 4, !tbaa !12
br label %214
199: ; preds = %174
%200 = call i32 (ptr, ...) @assem_debug(ptr noundef nonnull @.str.2) #3
%201 = load ptr, ptr @is_ds, align 8, !tbaa !11
%202 = load ptr, ptr @ba, align 8, !tbaa !11
%203 = getelementptr inbounds i32, ptr %202, i64 %6
%204 = load i32, ptr %203, align 4, !tbaa !12
%205 = load i32, ptr @start, align 4, !tbaa !12
%206 = sub nsw i32 %204, %205
%207 = ashr i32 %206, 1
%208 = sext i32 %207 to i64
%209 = getelementptr inbounds i64, ptr %201, i64 %208
%210 = load i64, ptr %209, align 8, !tbaa !14
%211 = icmp eq i64 %210, 0
br i1 %211, label %214, label %212
212: ; preds = %199
%213 = call i32 @ds_assemble_entry(i32 noundef %0) #3
br label %220
214: ; preds = %194, %199
%215 = phi i32 [ %198, %194 ], [ %204, %199 ]
%216 = load i64, ptr @out, align 8, !tbaa !14
%217 = trunc i64 %216 to i32
%218 = call i32 @add_to_linker(i32 noundef %217, i32 noundef %215, i32 noundef %23) #3
%219 = call i32 @emit_jmp(i32 noundef 0) #3
br label %220
220: ; preds = %212, %214
%221 = load i64, ptr @out, align 8, !tbaa !14
%222 = trunc i64 %221 to i32
%223 = call i32 @set_jump_target(i32 noundef %166, i32 noundef %222) #3
br label %488
224: ; preds = %156, %141, %164
%225 = load i32, ptr %3, align 4, !tbaa !12
%226 = icmp eq i32 %225, 0
%227 = or i1 %34, %226
br i1 %227, label %488, label %228
228: ; preds = %224
%229 = load i32, ptr @CLOCK_DIVIDER, align 4, !tbaa !12
%230 = mul nsw i32 %229, %225
%231 = call i32 @emit_addimm(i32 noundef %108, i32 noundef %230, i32 noundef %108) #3
br label %488
232: ; preds = %44
%233 = call i32 @do_cc(i32 noundef %0, ptr noundef %60, ptr noundef nonnull %3, i32 noundef %63, i32 noundef %64, i32 noundef 1) #3
%234 = icmp sgt i32 %47, -1
%235 = zext i1 %234 to i32
%236 = call i32 @assert(i32 noundef %235) #3
%237 = call i32 @emit_testimm(i32 noundef %47, i32 noundef 1) #3
%238 = load ptr, ptr @opcode2, align 8, !tbaa !11
%239 = getelementptr inbounds i32, ptr %238, i64 %6
%240 = load i32, ptr %239, align 4, !tbaa !12
%241 = icmp eq i32 %240, 13
br i1 %241, label %242, label %249
242: ; preds = %232
%243 = load i64, ptr @out, align 8, !tbaa !14
%244 = trunc i64 %243 to i32
%245 = call i32 @emit_jeq(i32 noundef 2) #3
%246 = load ptr, ptr @opcode2, align 8, !tbaa !11
%247 = getelementptr inbounds i32, ptr %246, i64 %6
%248 = load i32, ptr %247, align 4, !tbaa !12
br label %249
249: ; preds = %242, %232
%250 = phi i32 [ %248, %242 ], [ %240, %232 ]
%251 = phi i32 [ %244, %242 ], [ 0, %232 ]
%252 = icmp eq i32 %250, 15
br i1 %252, label %253, label %257
253: ; preds = %249
%254 = load i64, ptr @out, align 8, !tbaa !14
%255 = trunc i64 %254 to i32
%256 = call i32 @emit_jne(i32 noundef 2) #3
br label %257
257: ; preds = %249, %253
%258 = phi i32 [ %255, %253 ], [ %251, %249 ]
%259 = load ptr, ptr @regs, align 8, !tbaa !11
%260 = getelementptr inbounds %struct.TYPE_2__, ptr %259, i64 %6, i32 1
%261 = load i64, ptr %260, align 8, !tbaa !21
%262 = load ptr, ptr @rs1, align 8, !tbaa !11
%263 = add nsw i32 %0, 1
%264 = sext i32 %263 to i64
%265 = getelementptr inbounds i64, ptr %262, i64 %264
%266 = load i64, ptr %265, align 8, !tbaa !16
%267 = shl nuw i64 1, %266
%268 = load ptr, ptr @rs2, align 8, !tbaa !11
%269 = getelementptr inbounds i64, ptr %268, i64 %264
%270 = load i64, ptr %269, align 8, !tbaa !16
%271 = shl nuw i64 1, %270
%272 = or i64 %271, %267
%273 = load ptr, ptr @rs3, align 8, !tbaa !11
%274 = getelementptr inbounds i64, ptr %273, i64 %264
%275 = load i64, ptr %274, align 8, !tbaa !16
%276 = shl nuw i64 1, %275
%277 = or i64 %272, %276
%278 = xor i64 %277, -1
%279 = and i64 %261, %278
%280 = call i32 (ptr, ...) @assem_debug(ptr noundef nonnull @.str.4) #3
%281 = load ptr, ptr @regs, align 8, !tbaa !11
%282 = getelementptr inbounds %struct.TYPE_2__, ptr %281, i64 %6
%283 = load ptr, ptr %282, align 8, !tbaa !18
%284 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%285 = getelementptr inbounds %struct.regstat, ptr %284, i64 %6
%286 = load ptr, ptr %285, align 8, !tbaa !5
%287 = getelementptr inbounds %struct.TYPE_2__, ptr %281, i64 %6, i32 2
%288 = load i32, ptr %287, align 8, !tbaa !22
%289 = call i32 @wb_invalidate(ptr noundef %283, ptr noundef %286, i32 noundef %288, i64 noundef %279) #3
%290 = load ptr, ptr @regs, align 8, !tbaa !11
%291 = getelementptr inbounds %struct.TYPE_2__, ptr %290, i64 %6
%292 = load ptr, ptr %291, align 8, !tbaa !18
%293 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%294 = getelementptr inbounds %struct.regstat, ptr %293, i64 %6
%295 = load ptr, ptr %294, align 8, !tbaa !5
%296 = load ptr, ptr @rs1, align 8, !tbaa !11
%297 = getelementptr inbounds i64, ptr %296, i64 %264
%298 = load i64, ptr %297, align 8, !tbaa !16
%299 = load ptr, ptr @rs2, align 8, !tbaa !11
%300 = getelementptr inbounds i64, ptr %299, i64 %264
%301 = load i64, ptr %300, align 8, !tbaa !16
%302 = load ptr, ptr @rs3, align 8, !tbaa !11
%303 = getelementptr inbounds i64, ptr %302, i64 %264
%304 = load i64, ptr %303, align 8, !tbaa !16
%305 = call i32 @load_regs(ptr noundef %292, ptr noundef %295, i64 noundef %298, i64 noundef %301, i64 noundef %304) #3
%306 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%307 = getelementptr inbounds %struct.regstat, ptr %306, i64 %6
%308 = call i32 @address_generation(i32 noundef %263, ptr noundef %307, i32 noundef 0) #3
%309 = load ptr, ptr @itype, align 8, !tbaa !11
%310 = getelementptr inbounds i64, ptr %309, i64 %264
%311 = load i64, ptr %310, align 8, !tbaa !14
%312 = load i64, ptr @COMPLEX, align 8, !tbaa !14
%313 = icmp eq i64 %311, %312
br i1 %313, label %314, label %335
314: ; preds = %257
%315 = load ptr, ptr @opcode, align 8, !tbaa !11
%316 = getelementptr inbounds i32, ptr %315, i64 %264
%317 = load i32, ptr %316, align 4, !tbaa !12
%318 = and i32 %317, -5
%319 = icmp eq i32 %318, 0
br i1 %319, label %320, label %335
320: ; preds = %314
%321 = load ptr, ptr @opcode2, align 8, !tbaa !11
%322 = getelementptr inbounds i32, ptr %321, i64 %264
%323 = load i32, ptr %322, align 4, !tbaa !12
%324 = icmp eq i32 %323, 15
br i1 %324, label %325, label %335
325: ; preds = %320
%326 = load ptr, ptr @regs, align 8, !tbaa !11
%327 = getelementptr inbounds %struct.TYPE_2__, ptr %326, i64 %6
%328 = load ptr, ptr %327, align 8, !tbaa !18
%329 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%330 = getelementptr inbounds %struct.regstat, ptr %329, i64 %6
%331 = load ptr, ptr %330, align 8, !tbaa !5
%332 = load i64, ptr @MACL, align 8, !tbaa !16
%333 = load i64, ptr @MACH, align 8, !tbaa !16
%334 = call i32 @load_regs(ptr noundef %328, ptr noundef %331, i64 noundef %332, i64 noundef %333, i64 noundef %333) #3
br label %335
335: ; preds = %314, %320, %325, %257
%336 = load ptr, ptr @regs, align 8, !tbaa !11
%337 = getelementptr inbounds %struct.TYPE_2__, ptr %336, i64 %6
%338 = load ptr, ptr %337, align 8, !tbaa !18
%339 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%340 = getelementptr inbounds %struct.regstat, ptr %339, i64 %6
%341 = load ptr, ptr %340, align 8, !tbaa !5
%342 = load i64, ptr @CCREG, align 8, !tbaa !16
%343 = call i32 @load_regs(ptr noundef %338, ptr noundef %341, i64 noundef %342, i64 noundef %342, i64 noundef %342) #3
%344 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%345 = getelementptr inbounds %struct.regstat, ptr %344, i64 %6
%346 = call i32 @ds_assemble(i32 noundef %263, ptr noundef %345) #3
%347 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%348 = getelementptr inbounds %struct.regstat, ptr %347, i64 %6
%349 = load ptr, ptr %348, align 8, !tbaa !5
%350 = load i64, ptr @CCREG, align 8, !tbaa !16
%351 = call i32 @get_reg(ptr noundef %349, i64 noundef %350) #3
%352 = icmp eq i32 %351, -1
br i1 %352, label %353, label %357
353: ; preds = %335
%354 = load i64, ptr @CCREG, align 8, !tbaa !16
%355 = load i32, ptr @HOST_CCREG, align 4, !tbaa !12
%356 = call i32 @emit_loadreg(i64 noundef %354, i32 noundef %355) #3
br label %357
357: ; preds = %353, %335
%358 = phi i32 [ %355, %353 ], [ %351, %335 ]
%359 = load i32, ptr @HOST_CCREG, align 4, !tbaa !12
%360 = icmp eq i32 %358, %359
%361 = zext i1 %360 to i32
%362 = call i32 @assert(i32 noundef %361) #3
%363 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%364 = getelementptr inbounds %struct.regstat, ptr %363, i64 %6
%365 = load ptr, ptr %364, align 8, !tbaa !5
%366 = getelementptr inbounds %struct.regstat, ptr %363, i64 %6, i32 1
%367 = load i32, ptr %366, align 8, !tbaa !13
%368 = load ptr, ptr @ba, align 8, !tbaa !11
%369 = getelementptr inbounds i32, ptr %368, i64 %6
%370 = load i32, ptr %369, align 4, !tbaa !12
%371 = call i32 @store_regs_bt(ptr noundef %365, i32 noundef %367, i32 noundef %370) #3
%372 = call i32 (ptr, ...) @assem_debug(ptr noundef nonnull @.str.5) #3
%373 = load i32, ptr %3, align 4, !tbaa !12
%374 = icmp eq i32 %373, 0
br i1 %374, label %380, label %375
375: ; preds = %357
%376 = load i32, ptr @CLOCK_DIVIDER, align 4, !tbaa !12
%377 = mul i32 %373, %376
%378 = sub i32 0, %377
%379 = call i32 @emit_addimm(i32 noundef %358, i32 noundef %378, i32 noundef %358) #3
br label %380
380: ; preds = %375, %357
%381 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%382 = getelementptr inbounds %struct.regstat, ptr %381, i64 %6
%383 = load ptr, ptr %382, align 8, !tbaa !5
%384 = getelementptr inbounds %struct.regstat, ptr %381, i64 %6, i32 1
%385 = load i32, ptr %384, align 8, !tbaa !13
%386 = load ptr, ptr @ba, align 8, !tbaa !11
%387 = getelementptr inbounds i32, ptr %386, i64 %6
%388 = load i32, ptr %387, align 4, !tbaa !12
%389 = call i32 @load_regs_bt(ptr noundef %383, i32 noundef %385, i32 noundef %388) #3
%390 = icmp eq i32 %23, 0
br i1 %390, label %391, label %396
391: ; preds = %380
%392 = call i32 (ptr, ...) @assem_debug(ptr noundef nonnull @.str.3) #3
%393 = load ptr, ptr @ba, align 8, !tbaa !11
%394 = getelementptr inbounds i32, ptr %393, i64 %6
%395 = load i32, ptr %394, align 4, !tbaa !12
br label %411
396: ; preds = %380
%397 = call i32 (ptr, ...) @assem_debug(ptr noundef nonnull @.str.2) #3
%398 = load ptr, ptr @is_ds, align 8, !tbaa !11
%399 = load ptr, ptr @ba, align 8, !tbaa !11
%400 = getelementptr inbounds i32, ptr %399, i64 %6
%401 = load i32, ptr %400, align 4, !tbaa !12
%402 = load i32, ptr @start, align 4, !tbaa !12
%403 = sub nsw i32 %401, %402
%404 = ashr i32 %403, 1
%405 = sext i32 %404 to i64
%406 = getelementptr inbounds i64, ptr %398, i64 %405
%407 = load i64, ptr %406, align 8, !tbaa !14
%408 = icmp eq i64 %407, 0
br i1 %408, label %411, label %409
409: ; preds = %396
%410 = call i32 @ds_assemble_entry(i32 noundef %0) #3
br label %417
411: ; preds = %391, %396
%412 = phi i32 [ %395, %391 ], [ %401, %396 ]
%413 = load i64, ptr @out, align 8, !tbaa !14
%414 = trunc i64 %413 to i32
%415 = call i32 @add_to_linker(i32 noundef %414, i32 noundef %412, i32 noundef %23) #3
%416 = call i32 @emit_jmp(i32 noundef 0) #3
br label %417
417: ; preds = %409, %411
%418 = load i64, ptr @out, align 8, !tbaa !14
%419 = trunc i64 %418 to i32
%420 = call i32 @set_jump_target(i32 noundef %258, i32 noundef %419) #3
%421 = call i32 (ptr, ...) @assem_debug(ptr noundef nonnull @.str.6) #3
%422 = load ptr, ptr @regs, align 8, !tbaa !11
%423 = getelementptr inbounds %struct.TYPE_2__, ptr %422, i64 %6
%424 = load ptr, ptr %423, align 8, !tbaa !18
%425 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%426 = getelementptr inbounds %struct.regstat, ptr %425, i64 %6
%427 = load ptr, ptr %426, align 8, !tbaa !5
%428 = getelementptr inbounds %struct.TYPE_2__, ptr %422, i64 %6, i32 2
%429 = load i32, ptr %428, align 8, !tbaa !22
%430 = call i32 @wb_invalidate(ptr noundef %424, ptr noundef %427, i32 noundef %429, i64 noundef %279) #3
%431 = load ptr, ptr @regs, align 8, !tbaa !11
%432 = getelementptr inbounds %struct.TYPE_2__, ptr %431, i64 %6
%433 = load ptr, ptr %432, align 8, !tbaa !18
%434 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%435 = getelementptr inbounds %struct.regstat, ptr %434, i64 %6
%436 = load ptr, ptr %435, align 8, !tbaa !5
%437 = load ptr, ptr @rs1, align 8, !tbaa !11
%438 = getelementptr inbounds i64, ptr %437, i64 %264
%439 = load i64, ptr %438, align 8, !tbaa !16
%440 = load ptr, ptr @rs2, align 8, !tbaa !11
%441 = getelementptr inbounds i64, ptr %440, i64 %264
%442 = load i64, ptr %441, align 8, !tbaa !16
%443 = load ptr, ptr @rs3, align 8, !tbaa !11
%444 = getelementptr inbounds i64, ptr %443, i64 %264
%445 = load i64, ptr %444, align 8, !tbaa !16
%446 = call i32 @load_regs(ptr noundef %433, ptr noundef %436, i64 noundef %439, i64 noundef %442, i64 noundef %445) #3
%447 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%448 = getelementptr inbounds %struct.regstat, ptr %447, i64 %6
%449 = call i32 @address_generation(i32 noundef %263, ptr noundef %448, i32 noundef 0) #3
%450 = load ptr, ptr @itype, align 8, !tbaa !11
%451 = getelementptr inbounds i64, ptr %450, i64 %264
%452 = load i64, ptr %451, align 8, !tbaa !14
%453 = load i64, ptr @COMPLEX, align 8, !tbaa !14
%454 = icmp eq i64 %452, %453
br i1 %454, label %455, label %476
455: ; preds = %417
%456 = load ptr, ptr @opcode, align 8, !tbaa !11
%457 = getelementptr inbounds i32, ptr %456, i64 %264
%458 = load i32, ptr %457, align 4, !tbaa !12
%459 = and i32 %458, -5
%460 = icmp eq i32 %459, 0
br i1 %460, label %461, label %476
461: ; preds = %455
%462 = load ptr, ptr @opcode2, align 8, !tbaa !11
%463 = getelementptr inbounds i32, ptr %462, i64 %264
%464 = load i32, ptr %463, align 4, !tbaa !12
%465 = icmp eq i32 %464, 15
br i1 %465, label %466, label %476
466: ; preds = %461
%467 = load ptr, ptr @regs, align 8, !tbaa !11
%468 = getelementptr inbounds %struct.TYPE_2__, ptr %467, i64 %6
%469 = load ptr, ptr %468, align 8, !tbaa !18
%470 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%471 = getelementptr inbounds %struct.regstat, ptr %470, i64 %6
%472 = load ptr, ptr %471, align 8, !tbaa !5
%473 = load i64, ptr @MACL, align 8, !tbaa !16
%474 = load i64, ptr @MACH, align 8, !tbaa !16
%475 = call i32 @load_regs(ptr noundef %469, ptr noundef %472, i64 noundef %473, i64 noundef %474, i64 noundef %474) #3
br label %476
476: ; preds = %455, %461, %466, %417
%477 = load ptr, ptr @regs, align 8, !tbaa !11
%478 = getelementptr inbounds %struct.TYPE_2__, ptr %477, i64 %6
%479 = load ptr, ptr %478, align 8, !tbaa !18
%480 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%481 = getelementptr inbounds %struct.regstat, ptr %480, i64 %6
%482 = load ptr, ptr %481, align 8, !tbaa !5
%483 = load i64, ptr @CCREG, align 8, !tbaa !16
%484 = call i32 @load_regs(ptr noundef %479, ptr noundef %482, i64 noundef %483, i64 noundef %483, i64 noundef %483) #3
%485 = load ptr, ptr @branch_regs, align 8, !tbaa !11
%486 = getelementptr inbounds %struct.regstat, ptr %485, i64 %6
%487 = call i32 @ds_assemble(i32 noundef %263, ptr noundef %486) #3
br label %488
488: ; preds = %220, %228, %224, %476
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @internal_branch(i32 noundef) local_unnamed_addr #2
declare i32 @match_bt(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @assem_debug(ptr noundef, ...) local_unnamed_addr #2
declare i32 @get_reg(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @assert(i32 noundef) local_unnamed_addr #2
declare i32 @do_cc(i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @address_generation(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ds_assemble(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @wb_invalidate(ptr noundef, ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @load_regs(ptr noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @store_regs_bt(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @emit_addimm(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @load_regs_bt(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ds_assemble_entry(i32 noundef) local_unnamed_addr #2
declare i32 @add_to_linker(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @emit_jmp(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @emit_testimm(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @emit_jeq(i32 noundef) local_unnamed_addr #2
declare i32 @emit_jne(i32 noundef) local_unnamed_addr #2
declare i32 @set_jump_target(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @emit_loadreg(i64 noundef, i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"regstat", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!10, !10, i64 0}
!13 = !{!6, !10, i64 8}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"long long", !8, i64 0}
!18 = !{!19, !7, i64 0}
!19 = !{!"TYPE_2__", !7, i64 0, !17, i64 8, !10, i64 16, !10, i64 20}
!20 = !{!19, !10, i64 20}
!21 = !{!19, !17, i64 8}
!22 = !{!19, !10, i64 16}
| ; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/sh2_dynarec/extr_sh2_dynarec.c_sjump_assemble.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/sh2_dynarec/extr_sh2_dynarec.c_sjump_assemble.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.regstat = type { ptr, i32 }
%struct.TYPE_2__ = type { ptr, i64, i32, i32 }
@ba = common local_unnamed_addr global ptr null, align 8
@branch_regs = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [10 x i8] c"match=%d\0A\00", align 1
@start = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [11 x i8] c"idle loop\0A\00", align 1
@ooo = common local_unnamed_addr global ptr null, align 8
@SR = common local_unnamed_addr global i64 0, align 8
@CCREG = common local_unnamed_addr global i64 0, align 8
@HOST_CCREG = common local_unnamed_addr global i32 0, align 4
@regs = common local_unnamed_addr global ptr null, align 8
@NODS = common local_unnamed_addr global i32 0, align 4
@rs1 = common local_unnamed_addr global ptr null, align 8
@rs2 = common local_unnamed_addr global ptr null, align 8
@TAKEN = common local_unnamed_addr global i32 0, align 4
@source = common local_unnamed_addr global ptr null, align 8
@CLOCK_DIVIDER = common local_unnamed_addr global i32 0, align 4
@ccadj = common local_unnamed_addr global ptr null, align 8
@.str.2 = private unnamed_addr constant [18 x i8] c"branch: internal\0A\00", align 1
@.str.3 = private unnamed_addr constant [18 x i8] c"branch: external\0A\00", align 1
@is_ds = common local_unnamed_addr global ptr null, align 8
@out = common local_unnamed_addr global i64 0, align 8
@CC_STUB = common local_unnamed_addr global i32 0, align 4
@NOTTAKEN = common local_unnamed_addr global i32 0, align 4
@opcode2 = common local_unnamed_addr global ptr null, align 8
@rs3 = common local_unnamed_addr global ptr null, align 8
@.str.4 = private unnamed_addr constant [4 x i8] c"1:\0A\00", align 1
@itype = common local_unnamed_addr global ptr null, align 8
@COMPLEX = common local_unnamed_addr global i64 0, align 8
@opcode = common local_unnamed_addr global ptr null, align 8
@MACL = common local_unnamed_addr global i64 0, align 8
@MACH = common local_unnamed_addr global i64 0, align 8
@.str.5 = private unnamed_addr constant [19 x i8] c"cycle count (adj)\0A\00", align 1
@.str.6 = private unnamed_addr constant [4 x i8] c"2:\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @sjump_assemble(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
%4 = load ptr, ptr %1, align 8, !tbaa !6
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%5 = load ptr, ptr @ba, align 8, !tbaa !12
%6 = sext i32 %0 to i64
%7 = getelementptr inbounds i32, ptr %5, i64 %6
%8 = load i32, ptr %7, align 4, !tbaa !13
%9 = tail call i32 @internal_branch(i32 noundef %8) #3
%10 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%11 = getelementptr inbounds %struct.regstat, ptr %10, i64 %6
%12 = load ptr, ptr %11, align 8, !tbaa !6
%13 = getelementptr inbounds i8, ptr %11, i64 8
%14 = load i32, ptr %13, align 8, !tbaa !14
%15 = load ptr, ptr @ba, align 8, !tbaa !12
%16 = getelementptr inbounds i32, ptr %15, i64 %6
%17 = load i32, ptr %16, align 4, !tbaa !13
%18 = tail call i32 @match_bt(ptr noundef %12, i32 noundef %14, i32 noundef %17) #3
%19 = tail call i32 (ptr, ...) @assem_debug(ptr noundef nonnull @.str, i32 noundef %18) #3
%20 = load ptr, ptr @ba, align 8, !tbaa !12
%21 = getelementptr inbounds i32, ptr %20, i64 %6
%22 = load i32, ptr %21, align 4, !tbaa !13
%23 = tail call i32 @internal_branch(i32 noundef %22) #3
%24 = load ptr, ptr @ba, align 8, !tbaa !12
%25 = getelementptr inbounds i32, ptr %24, i64 %6
%26 = load i32, ptr %25, align 4, !tbaa !13
%27 = load i32, ptr @start, align 4, !tbaa !13
%28 = sub nsw i32 %26, %27
%29 = ashr i32 %28, 1
%30 = icmp eq i32 %29, %0
br i1 %30, label %31, label %33
31: ; preds = %2
%32 = tail call i32 (ptr, ...) @assem_debug(ptr noundef nonnull @.str.1) #3
br label %33
33: ; preds = %31, %2
%34 = icmp eq i32 %18, 0
%35 = zext i1 %34 to i32
%36 = load ptr, ptr @ooo, align 8, !tbaa !12
%37 = getelementptr inbounds i64, ptr %36, i64 %6
%38 = load i64, ptr %37, align 8, !tbaa !15
%39 = icmp eq i64 %38, 0
br i1 %39, label %44, label %40
40: ; preds = %33
%41 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%42 = getelementptr inbounds %struct.regstat, ptr %41, i64 %6
%43 = load ptr, ptr %42, align 8, !tbaa !6
br label %44
44: ; preds = %33, %40
%45 = phi ptr [ %43, %40 ], [ %4, %33 ]
%46 = load i64, ptr @SR, align 8, !tbaa !17
%47 = tail call i32 @get_reg(ptr noundef %45, i64 noundef %46) #3
%48 = load i64, ptr @CCREG, align 8, !tbaa !17
%49 = tail call i32 @get_reg(ptr noundef %4, i64 noundef %48) #3
%50 = load i32, ptr @HOST_CCREG, align 4, !tbaa !13
%51 = icmp eq i32 %49, %50
%52 = zext i1 %51 to i32
%53 = tail call i32 @assert(i32 noundef %52) #3
%54 = load ptr, ptr @ooo, align 8, !tbaa !12
%55 = getelementptr inbounds i64, ptr %54, i64 %6
%56 = load i64, ptr %55, align 8, !tbaa !15
%57 = icmp eq i64 %56, 0
%58 = load ptr, ptr @regs, align 8, !tbaa !12
%59 = getelementptr inbounds %struct.TYPE_2__, ptr %58, i64 %6
%60 = load ptr, ptr %59, align 8, !tbaa !19
%61 = load i32, ptr @start, align 4, !tbaa !13
%62 = shl nsw i32 %0, 1
%63 = add nsw i32 %61, %62
%64 = load i32, ptr @NODS, align 4, !tbaa !13
br i1 %57, label %232, label %65
65: ; preds = %44
%66 = call i32 @do_cc(i32 noundef %0, ptr noundef %60, ptr noundef nonnull %3, i32 noundef %63, i32 noundef %64, i32 noundef %35) #3
%67 = add nsw i32 %0, 1
%68 = load ptr, ptr @regs, align 8, !tbaa !12
%69 = getelementptr inbounds %struct.TYPE_2__, ptr %68, i64 %6, i32 3
%70 = load i32, ptr %69, align 4, !tbaa !21
%71 = call i32 @address_generation(i32 noundef %67, ptr noundef nonnull %1, i32 noundef %70) #3
%72 = call i32 @ds_assemble(i32 noundef %67, ptr noundef nonnull %1) #3
%73 = load ptr, ptr @regs, align 8, !tbaa !12
%74 = getelementptr inbounds %struct.TYPE_2__, ptr %73, i64 %6
%75 = getelementptr inbounds i8, ptr %74, i64 8
%76 = load i64, ptr %75, align 8, !tbaa !22
%77 = load ptr, ptr @rs1, align 8, !tbaa !12
%78 = getelementptr inbounds i64, ptr %77, i64 %6
%79 = load i64, ptr %78, align 8, !tbaa !17
%80 = shl nuw i64 1, %79
%81 = load ptr, ptr @rs2, align 8, !tbaa !12
%82 = getelementptr inbounds i64, ptr %81, i64 %6
%83 = load i64, ptr %82, align 8, !tbaa !17
%84 = shl nuw i64 1, %83
%85 = or i64 %84, %80
%86 = xor i64 %85, -1
%87 = and i64 %76, %86
%88 = load ptr, ptr %74, align 8, !tbaa !19
%89 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%90 = getelementptr inbounds %struct.regstat, ptr %89, i64 %6
%91 = load ptr, ptr %90, align 8, !tbaa !6
%92 = getelementptr inbounds i8, ptr %74, i64 16
%93 = load i32, ptr %92, align 8, !tbaa !23
%94 = call i32 @wb_invalidate(ptr noundef %88, ptr noundef %91, i32 noundef %93, i64 noundef %87) #3
%95 = load ptr, ptr @regs, align 8, !tbaa !12
%96 = getelementptr inbounds %struct.TYPE_2__, ptr %95, i64 %6
%97 = load ptr, ptr %96, align 8, !tbaa !19
%98 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%99 = getelementptr inbounds %struct.regstat, ptr %98, i64 %6
%100 = load ptr, ptr %99, align 8, !tbaa !6
%101 = load i64, ptr @CCREG, align 8, !tbaa !17
%102 = load i64, ptr @SR, align 8, !tbaa !17
%103 = call i32 @load_regs(ptr noundef %97, ptr noundef %100, i64 noundef %101, i64 noundef %102, i64 noundef %102) #3
%104 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%105 = getelementptr inbounds %struct.regstat, ptr %104, i64 %6
%106 = load ptr, ptr %105, align 8, !tbaa !6
%107 = load i64, ptr @CCREG, align 8, !tbaa !17
%108 = call i32 @get_reg(ptr noundef %106, i64 noundef %107) #3
%109 = load i32, ptr @HOST_CCREG, align 4, !tbaa !13
%110 = icmp eq i32 %108, %109
%111 = zext i1 %110 to i32
%112 = call i32 @assert(i32 noundef %111) #3
%113 = load i32, ptr %3, align 4, !tbaa !13
%114 = icmp eq i32 %113, 0
%115 = or i1 %34, %114
br i1 %115, label %124, label %116
116: ; preds = %65
%117 = load i32, ptr @CLOCK_DIVIDER, align 4, !tbaa !13
%118 = load ptr, ptr @ccadj, align 8, !tbaa !12
%119 = getelementptr inbounds i32, ptr %118, i64 %6
%120 = load i32, ptr %119, align 4, !tbaa !13
%121 = sub nsw i32 %120, %113
%122 = mul nsw i32 %121, %117
%123 = call i32 @emit_addimm(i32 noundef %108, i32 noundef %122, i32 noundef %108) #3
br label %124
124: ; preds = %116, %65
%125 = icmp sgt i32 %47, -1
%126 = zext i1 %125 to i32
%127 = call i32 @assert(i32 noundef %126) #3
%128 = call i32 @emit_testimm(i32 noundef %47, i32 noundef 1) #3
%129 = load ptr, ptr @opcode2, align 8, !tbaa !12
%130 = getelementptr inbounds i32, ptr %129, i64 %6
%131 = load i32, ptr %130, align 4, !tbaa !13
switch i32 %131, label %164 [
i32 13, label %132
i32 15, label %151
]
132: ; preds = %124
%133 = load i64, ptr @out, align 8, !tbaa !15
%134 = trunc i64 %133 to i32
br i1 %34, label %135, label %141
135: ; preds = %132
%136 = call i32 @emit_jeq(i32 noundef 1) #3
%137 = load ptr, ptr @opcode2, align 8, !tbaa !12
%138 = getelementptr inbounds i32, ptr %137, i64 %6
%139 = load i32, ptr %138, align 4, !tbaa !13
%140 = icmp eq i32 %139, 15
br i1 %140, label %152, label %165
141: ; preds = %132
%142 = load ptr, ptr @ba, align 8, !tbaa !12
%143 = getelementptr inbounds i32, ptr %142, i64 %6
%144 = load i32, ptr %143, align 4, !tbaa !13
%145 = call i32 @add_to_linker(i32 noundef %134, i32 noundef %144, i32 noundef %23) #3
%146 = call i32 @emit_jne(i32 noundef 0) #3
%147 = load ptr, ptr @opcode2, align 8, !tbaa !12
%148 = getelementptr inbounds i32, ptr %147, i64 %6
%149 = load i32, ptr %148, align 4, !tbaa !13
%150 = icmp eq i32 %149, 15
br i1 %150, label %156, label %224
151: ; preds = %124
br i1 %34, label %152, label %156
152: ; preds = %135, %151
%153 = load i64, ptr @out, align 8, !tbaa !15
%154 = trunc i64 %153 to i32
%155 = call i32 @emit_jne(i32 noundef 1) #3
br label %165
156: ; preds = %141, %151
%157 = load i64, ptr @out, align 8, !tbaa !15
%158 = trunc i64 %157 to i32
%159 = load ptr, ptr @ba, align 8, !tbaa !12
%160 = getelementptr inbounds i32, ptr %159, i64 %6
%161 = load i32, ptr %160, align 4, !tbaa !13
%162 = call i32 @add_to_linker(i32 noundef %158, i32 noundef %161, i32 noundef %23) #3
%163 = call i32 @emit_jeq(i32 noundef 0) #3
br label %224
164: ; preds = %124
br i1 %34, label %165, label %224
165: ; preds = %152, %135, %164
%166 = phi i32 [ 0, %164 ], [ %134, %135 ], [ %154, %152 ]
%167 = load i32, ptr %3, align 4, !tbaa !13
%168 = icmp eq i32 %167, 0
br i1 %168, label %174, label %169
169: ; preds = %165
%170 = load i32, ptr @CLOCK_DIVIDER, align 4, !tbaa !13
%171 = mul i32 %167, %170
%172 = sub i32 0, %171
%173 = call i32 @emit_addimm(i32 noundef %108, i32 noundef %172, i32 noundef %108) #3
br label %174
174: ; preds = %169, %165
%175 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%176 = getelementptr inbounds %struct.regstat, ptr %175, i64 %6
%177 = load ptr, ptr %176, align 8, !tbaa !6
%178 = getelementptr inbounds i8, ptr %176, i64 8
%179 = load i32, ptr %178, align 8, !tbaa !14
%180 = load ptr, ptr @ba, align 8, !tbaa !12
%181 = getelementptr inbounds i32, ptr %180, i64 %6
%182 = load i32, ptr %181, align 4, !tbaa !13
%183 = call i32 @store_regs_bt(ptr noundef %177, i32 noundef %179, i32 noundef %182) #3
%184 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%185 = getelementptr inbounds %struct.regstat, ptr %184, i64 %6
%186 = load ptr, ptr %185, align 8, !tbaa !6
%187 = getelementptr inbounds i8, ptr %185, i64 8
%188 = load i32, ptr %187, align 8, !tbaa !14
%189 = load ptr, ptr @ba, align 8, !tbaa !12
%190 = getelementptr inbounds i32, ptr %189, i64 %6
%191 = load i32, ptr %190, align 4, !tbaa !13
%192 = call i32 @load_regs_bt(ptr noundef %186, i32 noundef %188, i32 noundef %191) #3
%193 = icmp eq i32 %23, 0
br i1 %193, label %194, label %199
194: ; preds = %174
%195 = call i32 (ptr, ...) @assem_debug(ptr noundef nonnull @.str.3) #3
%196 = load ptr, ptr @ba, align 8, !tbaa !12
%197 = getelementptr inbounds i32, ptr %196, i64 %6
%198 = load i32, ptr %197, align 4, !tbaa !13
br label %214
199: ; preds = %174
%200 = call i32 (ptr, ...) @assem_debug(ptr noundef nonnull @.str.2) #3
%201 = load ptr, ptr @is_ds, align 8, !tbaa !12
%202 = load ptr, ptr @ba, align 8, !tbaa !12
%203 = getelementptr inbounds i32, ptr %202, i64 %6
%204 = load i32, ptr %203, align 4, !tbaa !13
%205 = load i32, ptr @start, align 4, !tbaa !13
%206 = sub nsw i32 %204, %205
%207 = ashr i32 %206, 1
%208 = sext i32 %207 to i64
%209 = getelementptr inbounds i64, ptr %201, i64 %208
%210 = load i64, ptr %209, align 8, !tbaa !15
%211 = icmp eq i64 %210, 0
br i1 %211, label %214, label %212
212: ; preds = %199
%213 = call i32 @ds_assemble_entry(i32 noundef %0) #3
br label %220
214: ; preds = %194, %199
%215 = phi i32 [ %198, %194 ], [ %204, %199 ]
%216 = load i64, ptr @out, align 8, !tbaa !15
%217 = trunc i64 %216 to i32
%218 = call i32 @add_to_linker(i32 noundef %217, i32 noundef %215, i32 noundef %23) #3
%219 = call i32 @emit_jmp(i32 noundef 0) #3
br label %220
220: ; preds = %212, %214
%221 = load i64, ptr @out, align 8, !tbaa !15
%222 = trunc i64 %221 to i32
%223 = call i32 @set_jump_target(i32 noundef %166, i32 noundef %222) #3
br label %488
224: ; preds = %156, %141, %164
%225 = load i32, ptr %3, align 4, !tbaa !13
%226 = icmp eq i32 %225, 0
%227 = or i1 %34, %226
br i1 %227, label %488, label %228
228: ; preds = %224
%229 = load i32, ptr @CLOCK_DIVIDER, align 4, !tbaa !13
%230 = mul nsw i32 %229, %225
%231 = call i32 @emit_addimm(i32 noundef %108, i32 noundef %230, i32 noundef %108) #3
br label %488
232: ; preds = %44
%233 = call i32 @do_cc(i32 noundef %0, ptr noundef %60, ptr noundef nonnull %3, i32 noundef %63, i32 noundef %64, i32 noundef 1) #3
%234 = icmp sgt i32 %47, -1
%235 = zext i1 %234 to i32
%236 = call i32 @assert(i32 noundef %235) #3
%237 = call i32 @emit_testimm(i32 noundef %47, i32 noundef 1) #3
%238 = load ptr, ptr @opcode2, align 8, !tbaa !12
%239 = getelementptr inbounds i32, ptr %238, i64 %6
%240 = load i32, ptr %239, align 4, !tbaa !13
%241 = icmp eq i32 %240, 13
br i1 %241, label %242, label %249
242: ; preds = %232
%243 = load i64, ptr @out, align 8, !tbaa !15
%244 = trunc i64 %243 to i32
%245 = call i32 @emit_jeq(i32 noundef 2) #3
%246 = load ptr, ptr @opcode2, align 8, !tbaa !12
%247 = getelementptr inbounds i32, ptr %246, i64 %6
%248 = load i32, ptr %247, align 4, !tbaa !13
br label %249
249: ; preds = %242, %232
%250 = phi i32 [ %248, %242 ], [ %240, %232 ]
%251 = phi i32 [ %244, %242 ], [ 0, %232 ]
%252 = icmp eq i32 %250, 15
br i1 %252, label %253, label %257
253: ; preds = %249
%254 = load i64, ptr @out, align 8, !tbaa !15
%255 = trunc i64 %254 to i32
%256 = call i32 @emit_jne(i32 noundef 2) #3
br label %257
257: ; preds = %249, %253
%258 = phi i32 [ %255, %253 ], [ %251, %249 ]
%259 = load ptr, ptr @regs, align 8, !tbaa !12
%260 = getelementptr inbounds %struct.TYPE_2__, ptr %259, i64 %6, i32 1
%261 = load i64, ptr %260, align 8, !tbaa !22
%262 = load ptr, ptr @rs1, align 8, !tbaa !12
%263 = add nsw i32 %0, 1
%264 = sext i32 %263 to i64
%265 = getelementptr inbounds i64, ptr %262, i64 %264
%266 = load i64, ptr %265, align 8, !tbaa !17
%267 = shl nuw i64 1, %266
%268 = load ptr, ptr @rs2, align 8, !tbaa !12
%269 = getelementptr inbounds i64, ptr %268, i64 %264
%270 = load i64, ptr %269, align 8, !tbaa !17
%271 = shl nuw i64 1, %270
%272 = or i64 %271, %267
%273 = load ptr, ptr @rs3, align 8, !tbaa !12
%274 = getelementptr inbounds i64, ptr %273, i64 %264
%275 = load i64, ptr %274, align 8, !tbaa !17
%276 = shl nuw i64 1, %275
%277 = or i64 %272, %276
%278 = xor i64 %277, -1
%279 = and i64 %261, %278
%280 = call i32 (ptr, ...) @assem_debug(ptr noundef nonnull @.str.4) #3
%281 = load ptr, ptr @regs, align 8, !tbaa !12
%282 = getelementptr inbounds %struct.TYPE_2__, ptr %281, i64 %6
%283 = load ptr, ptr %282, align 8, !tbaa !19
%284 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%285 = getelementptr inbounds %struct.regstat, ptr %284, i64 %6
%286 = load ptr, ptr %285, align 8, !tbaa !6
%287 = getelementptr inbounds i8, ptr %282, i64 16
%288 = load i32, ptr %287, align 8, !tbaa !23
%289 = call i32 @wb_invalidate(ptr noundef %283, ptr noundef %286, i32 noundef %288, i64 noundef %279) #3
%290 = load ptr, ptr @regs, align 8, !tbaa !12
%291 = getelementptr inbounds %struct.TYPE_2__, ptr %290, i64 %6
%292 = load ptr, ptr %291, align 8, !tbaa !19
%293 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%294 = getelementptr inbounds %struct.regstat, ptr %293, i64 %6
%295 = load ptr, ptr %294, align 8, !tbaa !6
%296 = load ptr, ptr @rs1, align 8, !tbaa !12
%297 = getelementptr inbounds i64, ptr %296, i64 %264
%298 = load i64, ptr %297, align 8, !tbaa !17
%299 = load ptr, ptr @rs2, align 8, !tbaa !12
%300 = getelementptr inbounds i64, ptr %299, i64 %264
%301 = load i64, ptr %300, align 8, !tbaa !17
%302 = load ptr, ptr @rs3, align 8, !tbaa !12
%303 = getelementptr inbounds i64, ptr %302, i64 %264
%304 = load i64, ptr %303, align 8, !tbaa !17
%305 = call i32 @load_regs(ptr noundef %292, ptr noundef %295, i64 noundef %298, i64 noundef %301, i64 noundef %304) #3
%306 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%307 = getelementptr inbounds %struct.regstat, ptr %306, i64 %6
%308 = call i32 @address_generation(i32 noundef %263, ptr noundef %307, i32 noundef 0) #3
%309 = load ptr, ptr @itype, align 8, !tbaa !12
%310 = getelementptr inbounds i64, ptr %309, i64 %264
%311 = load i64, ptr %310, align 8, !tbaa !15
%312 = load i64, ptr @COMPLEX, align 8, !tbaa !15
%313 = icmp eq i64 %311, %312
br i1 %313, label %314, label %335
314: ; preds = %257
%315 = load ptr, ptr @opcode, align 8, !tbaa !12
%316 = getelementptr inbounds i32, ptr %315, i64 %264
%317 = load i32, ptr %316, align 4, !tbaa !13
%318 = and i32 %317, -5
%319 = icmp eq i32 %318, 0
br i1 %319, label %320, label %335
320: ; preds = %314
%321 = load ptr, ptr @opcode2, align 8, !tbaa !12
%322 = getelementptr inbounds i32, ptr %321, i64 %264
%323 = load i32, ptr %322, align 4, !tbaa !13
%324 = icmp eq i32 %323, 15
br i1 %324, label %325, label %335
325: ; preds = %320
%326 = load ptr, ptr @regs, align 8, !tbaa !12
%327 = getelementptr inbounds %struct.TYPE_2__, ptr %326, i64 %6
%328 = load ptr, ptr %327, align 8, !tbaa !19
%329 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%330 = getelementptr inbounds %struct.regstat, ptr %329, i64 %6
%331 = load ptr, ptr %330, align 8, !tbaa !6
%332 = load i64, ptr @MACL, align 8, !tbaa !17
%333 = load i64, ptr @MACH, align 8, !tbaa !17
%334 = call i32 @load_regs(ptr noundef %328, ptr noundef %331, i64 noundef %332, i64 noundef %333, i64 noundef %333) #3
br label %335
335: ; preds = %314, %320, %325, %257
%336 = load ptr, ptr @regs, align 8, !tbaa !12
%337 = getelementptr inbounds %struct.TYPE_2__, ptr %336, i64 %6
%338 = load ptr, ptr %337, align 8, !tbaa !19
%339 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%340 = getelementptr inbounds %struct.regstat, ptr %339, i64 %6
%341 = load ptr, ptr %340, align 8, !tbaa !6
%342 = load i64, ptr @CCREG, align 8, !tbaa !17
%343 = call i32 @load_regs(ptr noundef %338, ptr noundef %341, i64 noundef %342, i64 noundef %342, i64 noundef %342) #3
%344 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%345 = getelementptr inbounds %struct.regstat, ptr %344, i64 %6
%346 = call i32 @ds_assemble(i32 noundef %263, ptr noundef %345) #3
%347 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%348 = getelementptr inbounds %struct.regstat, ptr %347, i64 %6
%349 = load ptr, ptr %348, align 8, !tbaa !6
%350 = load i64, ptr @CCREG, align 8, !tbaa !17
%351 = call i32 @get_reg(ptr noundef %349, i64 noundef %350) #3
%352 = icmp eq i32 %351, -1
br i1 %352, label %353, label %357
353: ; preds = %335
%354 = load i64, ptr @CCREG, align 8, !tbaa !17
%355 = load i32, ptr @HOST_CCREG, align 4, !tbaa !13
%356 = call i32 @emit_loadreg(i64 noundef %354, i32 noundef %355) #3
br label %357
357: ; preds = %353, %335
%358 = phi i32 [ %355, %353 ], [ %351, %335 ]
%359 = load i32, ptr @HOST_CCREG, align 4, !tbaa !13
%360 = icmp eq i32 %358, %359
%361 = zext i1 %360 to i32
%362 = call i32 @assert(i32 noundef %361) #3
%363 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%364 = getelementptr inbounds %struct.regstat, ptr %363, i64 %6
%365 = load ptr, ptr %364, align 8, !tbaa !6
%366 = getelementptr inbounds i8, ptr %364, i64 8
%367 = load i32, ptr %366, align 8, !tbaa !14
%368 = load ptr, ptr @ba, align 8, !tbaa !12
%369 = getelementptr inbounds i32, ptr %368, i64 %6
%370 = load i32, ptr %369, align 4, !tbaa !13
%371 = call i32 @store_regs_bt(ptr noundef %365, i32 noundef %367, i32 noundef %370) #3
%372 = call i32 (ptr, ...) @assem_debug(ptr noundef nonnull @.str.5) #3
%373 = load i32, ptr %3, align 4, !tbaa !13
%374 = icmp eq i32 %373, 0
br i1 %374, label %380, label %375
375: ; preds = %357
%376 = load i32, ptr @CLOCK_DIVIDER, align 4, !tbaa !13
%377 = mul i32 %373, %376
%378 = sub i32 0, %377
%379 = call i32 @emit_addimm(i32 noundef %358, i32 noundef %378, i32 noundef %358) #3
br label %380
380: ; preds = %375, %357
%381 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%382 = getelementptr inbounds %struct.regstat, ptr %381, i64 %6
%383 = load ptr, ptr %382, align 8, !tbaa !6
%384 = getelementptr inbounds i8, ptr %382, i64 8
%385 = load i32, ptr %384, align 8, !tbaa !14
%386 = load ptr, ptr @ba, align 8, !tbaa !12
%387 = getelementptr inbounds i32, ptr %386, i64 %6
%388 = load i32, ptr %387, align 4, !tbaa !13
%389 = call i32 @load_regs_bt(ptr noundef %383, i32 noundef %385, i32 noundef %388) #3
%390 = icmp eq i32 %23, 0
br i1 %390, label %391, label %396
391: ; preds = %380
%392 = call i32 (ptr, ...) @assem_debug(ptr noundef nonnull @.str.3) #3
%393 = load ptr, ptr @ba, align 8, !tbaa !12
%394 = getelementptr inbounds i32, ptr %393, i64 %6
%395 = load i32, ptr %394, align 4, !tbaa !13
br label %411
396: ; preds = %380
%397 = call i32 (ptr, ...) @assem_debug(ptr noundef nonnull @.str.2) #3
%398 = load ptr, ptr @is_ds, align 8, !tbaa !12
%399 = load ptr, ptr @ba, align 8, !tbaa !12
%400 = getelementptr inbounds i32, ptr %399, i64 %6
%401 = load i32, ptr %400, align 4, !tbaa !13
%402 = load i32, ptr @start, align 4, !tbaa !13
%403 = sub nsw i32 %401, %402
%404 = ashr i32 %403, 1
%405 = sext i32 %404 to i64
%406 = getelementptr inbounds i64, ptr %398, i64 %405
%407 = load i64, ptr %406, align 8, !tbaa !15
%408 = icmp eq i64 %407, 0
br i1 %408, label %411, label %409
409: ; preds = %396
%410 = call i32 @ds_assemble_entry(i32 noundef %0) #3
br label %417
411: ; preds = %391, %396
%412 = phi i32 [ %395, %391 ], [ %401, %396 ]
%413 = load i64, ptr @out, align 8, !tbaa !15
%414 = trunc i64 %413 to i32
%415 = call i32 @add_to_linker(i32 noundef %414, i32 noundef %412, i32 noundef %23) #3
%416 = call i32 @emit_jmp(i32 noundef 0) #3
br label %417
417: ; preds = %409, %411
%418 = load i64, ptr @out, align 8, !tbaa !15
%419 = trunc i64 %418 to i32
%420 = call i32 @set_jump_target(i32 noundef %258, i32 noundef %419) #3
%421 = call i32 (ptr, ...) @assem_debug(ptr noundef nonnull @.str.6) #3
%422 = load ptr, ptr @regs, align 8, !tbaa !12
%423 = getelementptr inbounds %struct.TYPE_2__, ptr %422, i64 %6
%424 = load ptr, ptr %423, align 8, !tbaa !19
%425 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%426 = getelementptr inbounds %struct.regstat, ptr %425, i64 %6
%427 = load ptr, ptr %426, align 8, !tbaa !6
%428 = getelementptr inbounds i8, ptr %423, i64 16
%429 = load i32, ptr %428, align 8, !tbaa !23
%430 = call i32 @wb_invalidate(ptr noundef %424, ptr noundef %427, i32 noundef %429, i64 noundef %279) #3
%431 = load ptr, ptr @regs, align 8, !tbaa !12
%432 = getelementptr inbounds %struct.TYPE_2__, ptr %431, i64 %6
%433 = load ptr, ptr %432, align 8, !tbaa !19
%434 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%435 = getelementptr inbounds %struct.regstat, ptr %434, i64 %6
%436 = load ptr, ptr %435, align 8, !tbaa !6
%437 = load ptr, ptr @rs1, align 8, !tbaa !12
%438 = getelementptr inbounds i64, ptr %437, i64 %264
%439 = load i64, ptr %438, align 8, !tbaa !17
%440 = load ptr, ptr @rs2, align 8, !tbaa !12
%441 = getelementptr inbounds i64, ptr %440, i64 %264
%442 = load i64, ptr %441, align 8, !tbaa !17
%443 = load ptr, ptr @rs3, align 8, !tbaa !12
%444 = getelementptr inbounds i64, ptr %443, i64 %264
%445 = load i64, ptr %444, align 8, !tbaa !17
%446 = call i32 @load_regs(ptr noundef %433, ptr noundef %436, i64 noundef %439, i64 noundef %442, i64 noundef %445) #3
%447 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%448 = getelementptr inbounds %struct.regstat, ptr %447, i64 %6
%449 = call i32 @address_generation(i32 noundef %263, ptr noundef %448, i32 noundef 0) #3
%450 = load ptr, ptr @itype, align 8, !tbaa !12
%451 = getelementptr inbounds i64, ptr %450, i64 %264
%452 = load i64, ptr %451, align 8, !tbaa !15
%453 = load i64, ptr @COMPLEX, align 8, !tbaa !15
%454 = icmp eq i64 %452, %453
br i1 %454, label %455, label %476
455: ; preds = %417
%456 = load ptr, ptr @opcode, align 8, !tbaa !12
%457 = getelementptr inbounds i32, ptr %456, i64 %264
%458 = load i32, ptr %457, align 4, !tbaa !13
%459 = and i32 %458, -5
%460 = icmp eq i32 %459, 0
br i1 %460, label %461, label %476
461: ; preds = %455
%462 = load ptr, ptr @opcode2, align 8, !tbaa !12
%463 = getelementptr inbounds i32, ptr %462, i64 %264
%464 = load i32, ptr %463, align 4, !tbaa !13
%465 = icmp eq i32 %464, 15
br i1 %465, label %466, label %476
466: ; preds = %461
%467 = load ptr, ptr @regs, align 8, !tbaa !12
%468 = getelementptr inbounds %struct.TYPE_2__, ptr %467, i64 %6
%469 = load ptr, ptr %468, align 8, !tbaa !19
%470 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%471 = getelementptr inbounds %struct.regstat, ptr %470, i64 %6
%472 = load ptr, ptr %471, align 8, !tbaa !6
%473 = load i64, ptr @MACL, align 8, !tbaa !17
%474 = load i64, ptr @MACH, align 8, !tbaa !17
%475 = call i32 @load_regs(ptr noundef %469, ptr noundef %472, i64 noundef %473, i64 noundef %474, i64 noundef %474) #3
br label %476
476: ; preds = %455, %461, %466, %417
%477 = load ptr, ptr @regs, align 8, !tbaa !12
%478 = getelementptr inbounds %struct.TYPE_2__, ptr %477, i64 %6
%479 = load ptr, ptr %478, align 8, !tbaa !19
%480 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%481 = getelementptr inbounds %struct.regstat, ptr %480, i64 %6
%482 = load ptr, ptr %481, align 8, !tbaa !6
%483 = load i64, ptr @CCREG, align 8, !tbaa !17
%484 = call i32 @load_regs(ptr noundef %479, ptr noundef %482, i64 noundef %483, i64 noundef %483, i64 noundef %483) #3
%485 = load ptr, ptr @branch_regs, align 8, !tbaa !12
%486 = getelementptr inbounds %struct.regstat, ptr %485, i64 %6
%487 = call i32 @ds_assemble(i32 noundef %263, ptr noundef %486) #3
br label %488
488: ; preds = %220, %228, %224, %476
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @internal_branch(i32 noundef) local_unnamed_addr #2
declare i32 @match_bt(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @assem_debug(ptr noundef, ...) local_unnamed_addr #2
declare i32 @get_reg(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @assert(i32 noundef) local_unnamed_addr #2
declare i32 @do_cc(i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @address_generation(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ds_assemble(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @wb_invalidate(ptr noundef, ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @load_regs(ptr noundef, ptr noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @store_regs_bt(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @emit_addimm(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @load_regs_bt(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ds_assemble_entry(i32 noundef) local_unnamed_addr #2
declare i32 @add_to_linker(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @emit_jmp(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @emit_testimm(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @emit_jeq(i32 noundef) local_unnamed_addr #2
declare i32 @emit_jne(i32 noundef) local_unnamed_addr #2
declare i32 @set_jump_target(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @emit_loadreg(i64 noundef, i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"regstat", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!11, !11, i64 0}
!14 = !{!7, !11, i64 8}
!15 = !{!16, !16, i64 0}
!16 = !{!"long", !9, i64 0}
!17 = !{!18, !18, i64 0}
!18 = !{!"long long", !9, i64 0}
!19 = !{!20, !8, i64 0}
!20 = !{!"TYPE_2__", !8, i64 0, !18, i64 8, !11, i64 16, !11, i64 20}
!21 = !{!20, !11, i64 20}
!22 = !{!20, !18, i64 8}
!23 = !{!20, !11, i64 16}
| Provenance_Cores_Yabause_yabause_src_sh2_dynarec_extr_sh2_dynarec.c_sjump_assemble |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/irda/extr_mcs7780.c_mcs_setup_transceiver.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/irda/extr_mcs7780.c_mcs_setup_transceiver.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mcs_cb = type { i32, i32, i64, i64, i64 }
@.str = private unnamed_addr constant [31 x i8] c"Basic transceiver setup error.\00", align 1
@MCS_MODE_REG = dso_local local_unnamed_addr global i32 0, align 4
@MCS_DRIVER = dso_local local_unnamed_addr global i32 0, align 4
@MCS_MINRXPW_REG = dso_local local_unnamed_addr global i32 0, align 4
@MCS_FIR = dso_local local_unnamed_addr global i32 0, align 4
@MCS_SIR16US = dso_local local_unnamed_addr global i32 0, align 4
@MCS_BBTG = dso_local local_unnamed_addr global i32 0, align 4
@MCS_ASK = dso_local local_unnamed_addr global i32 0, align 4
@MCS_SPEED_MASK = dso_local local_unnamed_addr global i32 0, align 4
@MCS_SPEED_9600 = dso_local local_unnamed_addr global i32 0, align 4
@MCS_PLLPWDN = dso_local local_unnamed_addr global i32 0, align 4
@MCS_DTD = dso_local local_unnamed_addr global i32 0, align 4
@MCS_SIPEN = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [40 x i8] c"transceiver model specific setup error.\00", align 1
@.str.2 = private unnamed_addr constant [30 x i8] c"Unknown transceiver type: %d\0A\00", align 1
@MCS_XCVR_REG = dso_local local_unnamed_addr global i32 0, align 4
@MCS_RXFAST = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [19 x i8] c"transceiver reset.\00", align 1
@MCS_RESET = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @mcs_setup_transceiver], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @mcs_setup_transceiver(ptr noundef %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = load i32, ptr @MCS_MODE_REG, align 4, !tbaa !5
%4 = call i32 @mcs_get_reg(ptr noundef %0, i32 noundef %3, ptr noundef nonnull %2) #3
%5 = icmp ne i32 %4, 2
%6 = zext i1 %5 to i32
%7 = call i64 @unlikely(i32 noundef %6) #3
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %122
9: ; preds = %1
%10 = load i32, ptr @MCS_DRIVER, align 4, !tbaa !5
%11 = load i32, ptr %2, align 4, !tbaa !5
%12 = or i32 %11, %10
store i32 %12, ptr %2, align 4, !tbaa !5
%13 = load i32, ptr @MCS_MODE_REG, align 4, !tbaa !5
%14 = call i32 @mcs_set_reg(ptr noundef %0, i32 noundef %13, i32 noundef %12) #3
%15 = call i64 @unlikely(i32 noundef %14) #3
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %122
17: ; preds = %9
store i32 0, ptr %2, align 4, !tbaa !5
%18 = load i32, ptr @MCS_MINRXPW_REG, align 4, !tbaa !5
%19 = call i32 @mcs_set_reg(ptr noundef %0, i32 noundef %18, i32 noundef 0) #3
%20 = call i64 @unlikely(i32 noundef %19) #3
%21 = icmp eq i64 %20, 0
br i1 %21, label %22, label %122
22: ; preds = %17
%23 = load i32, ptr @MCS_MODE_REG, align 4, !tbaa !5
%24 = call i32 @mcs_get_reg(ptr noundef %0, i32 noundef %23, ptr noundef nonnull %2) #3
%25 = icmp ne i32 %24, 2
%26 = zext i1 %25 to i32
%27 = call i64 @unlikely(i32 noundef %26) #3
%28 = icmp eq i64 %27, 0
br i1 %28, label %29, label %122
29: ; preds = %22
%30 = load i32, ptr @MCS_FIR, align 4, !tbaa !5
%31 = xor i32 %30, -1
%32 = load i32, ptr %2, align 4, !tbaa !5
%33 = and i32 %32, %31
%34 = getelementptr inbounds %struct.mcs_cb, ptr %0, i64 0, i32 4
%35 = load i64, ptr %34, align 8, !tbaa !9
%36 = icmp eq i64 %35, 0
%37 = load i32, ptr @MCS_SIR16US, align 4, !tbaa !5
%38 = xor i32 %37, -1
%39 = and i32 %33, %38
%40 = or i32 %37, %33
%41 = select i1 %36, i32 %39, i32 %40
%42 = load i32, ptr @MCS_BBTG, align 4, !tbaa !5
%43 = load i32, ptr @MCS_ASK, align 4, !tbaa !5
%44 = or i32 %43, %42
%45 = load i32, ptr @MCS_SPEED_MASK, align 4, !tbaa !5
%46 = or i32 %44, %45
%47 = xor i32 %46, -1
%48 = and i32 %41, %47
%49 = load i32, ptr @MCS_SPEED_9600, align 4, !tbaa !5
%50 = or i32 %49, %48
store i32 9600, ptr %0, align 8, !tbaa !12
%51 = getelementptr inbounds %struct.mcs_cb, ptr %0, i64 0, i32 3
store i64 0, ptr %51, align 8, !tbaa !13
%52 = load i32, ptr @MCS_PLLPWDN, align 4, !tbaa !5
%53 = xor i32 %52, -1
%54 = and i32 %50, %53
%55 = load i32, ptr @MCS_DTD, align 4, !tbaa !5
%56 = load i32, ptr @MCS_SIPEN, align 4, !tbaa !5
%57 = or i32 %55, %56
%58 = or i32 %57, %54
store i32 %58, ptr %2, align 4, !tbaa !5
%59 = load i32, ptr @MCS_MODE_REG, align 4, !tbaa !5
%60 = call i32 @mcs_set_reg(ptr noundef nonnull %0, i32 noundef %59, i32 noundef %58) #3
%61 = call i64 @unlikely(i32 noundef %60) #3
%62 = icmp eq i64 %61, 0
br i1 %62, label %63, label %122
63: ; preds = %29
%64 = getelementptr inbounds %struct.mcs_cb, ptr %0, i64 0, i32 1
%65 = load i32, ptr %64, align 4, !tbaa !14
switch i32 %65, label %72 [
i32 128, label %66
i32 129, label %68
i32 130, label %70
]
66: ; preds = %63
%67 = call i32 @mcs_setup_transceiver_vishay(ptr noundef nonnull %0) #3
br label %74
68: ; preds = %63
%69 = call i32 @mcs_setup_transceiver_sharp(ptr noundef nonnull %0) #3
br label %74
70: ; preds = %63
%71 = call i32 @mcs_setup_transceiver_agilent(ptr noundef nonnull %0) #3
br label %74
72: ; preds = %63
%73 = call i32 @IRDA_WARNING(ptr noundef nonnull @.str.2, i32 noundef %65) #3
br label %74
74: ; preds = %72, %70, %68, %66
%75 = phi i32 [ 1, %72 ], [ %71, %70 ], [ %69, %68 ], [ %67, %66 ]
%76 = call i64 @unlikely(i32 noundef %75) #3
%77 = icmp eq i64 %76, 0
br i1 %77, label %78, label %122
78: ; preds = %74
%79 = load i32, ptr %64, align 4, !tbaa !14
%80 = icmp eq i32 %79, 129
br i1 %80, label %106, label %81
81: ; preds = %78
%82 = load i32, ptr @MCS_XCVR_REG, align 4, !tbaa !5
%83 = call i32 @mcs_get_reg(ptr noundef nonnull %0, i32 noundef %82, ptr noundef nonnull %2) #3
%84 = icmp ne i32 %83, 2
%85 = zext i1 %84 to i32
%86 = call i64 @unlikely(i32 noundef %85) #3
%87 = icmp eq i64 %86, 0
br i1 %87, label %88, label %122
88: ; preds = %81
%89 = getelementptr inbounds %struct.mcs_cb, ptr %0, i64 0, i32 2
%90 = load i64, ptr %89, align 8, !tbaa !15
%91 = icmp eq i64 %90, 0
%92 = load i32, ptr @MCS_RXFAST, align 4, !tbaa !5
br i1 %91, label %96, label %93
93: ; preds = %88
%94 = load i32, ptr %2, align 4, !tbaa !5
%95 = or i32 %94, %92
br label %100
96: ; preds = %88
%97 = xor i32 %92, -1
%98 = load i32, ptr %2, align 4, !tbaa !5
%99 = and i32 %98, %97
br label %100
100: ; preds = %96, %93
%101 = phi i32 [ %99, %96 ], [ %95, %93 ]
store i32 %101, ptr %2, align 4, !tbaa !5
%102 = load i32, ptr @MCS_XCVR_REG, align 4, !tbaa !5
%103 = call i32 @mcs_set_reg(ptr noundef nonnull %0, i32 noundef %102, i32 noundef %101) #3
%104 = call i64 @unlikely(i32 noundef %103) #3
%105 = icmp eq i64 %104, 0
br i1 %105, label %106, label %122
106: ; preds = %100, %78
%107 = load i32, ptr @MCS_MODE_REG, align 4, !tbaa !5
%108 = call i32 @mcs_get_reg(ptr noundef nonnull %0, i32 noundef %107, ptr noundef nonnull %2) #3
%109 = icmp ne i32 %108, 2
%110 = zext i1 %109 to i32
%111 = call i64 @unlikely(i32 noundef %110) #3
%112 = icmp eq i64 %111, 0
br i1 %112, label %113, label %122
113: ; preds = %106
%114 = load i32, ptr @MCS_RESET, align 4, !tbaa !5
%115 = xor i32 %114, -1
%116 = load i32, ptr %2, align 4, !tbaa !5
%117 = and i32 %116, %115
store i32 %117, ptr %2, align 4, !tbaa !5
%118 = load i32, ptr @MCS_MODE_REG, align 4, !tbaa !5
%119 = call i32 @mcs_set_reg(ptr noundef nonnull %0, i32 noundef %118, i32 noundef %117) #3
%120 = call i64 @unlikely(i32 noundef %119) #3
%121 = icmp eq i64 %120, 0
br i1 %121, label %126, label %122
122: ; preds = %113, %106, %100, %81, %74, %29, %22, %17, %9, %1
%123 = phi i32 [ %4, %1 ], [ %14, %9 ], [ %19, %17 ], [ %24, %22 ], [ %60, %29 ], [ %75, %74 ], [ %83, %81 ], [ %103, %100 ], [ %108, %106 ], [ %119, %113 ]
%124 = phi ptr [ @.str, %1 ], [ @.str, %9 ], [ @.str, %17 ], [ @.str, %22 ], [ @.str, %29 ], [ @.str.1, %74 ], [ @.str.1, %81 ], [ @.str.1, %100 ], [ @.str.3, %106 ], [ @.str.3, %113 ]
%125 = call i32 @IRDA_ERROR(ptr noundef nonnull @.str.4, ptr noundef nonnull %124) #3
br label %126
126: ; preds = %113, %122
%127 = phi i32 [ %123, %122 ], [ %119, %113 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %127
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @mcs_get_reg(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @unlikely(i32 noundef) local_unnamed_addr #2
declare i32 @mcs_set_reg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mcs_setup_transceiver_vishay(ptr noundef) local_unnamed_addr #2
declare i32 @mcs_setup_transceiver_sharp(ptr noundef) local_unnamed_addr #2
declare i32 @mcs_setup_transceiver_agilent(ptr noundef) local_unnamed_addr #2
declare i32 @IRDA_WARNING(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @IRDA_ERROR(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 24}
!10 = !{!"mcs_cb", !6, i64 0, !6, i64 4, !11, i64 8, !11, i64 16, !11, i64 24}
!11 = !{!"long", !7, i64 0}
!12 = !{!10, !6, i64 0}
!13 = !{!10, !11, i64 16}
!14 = !{!10, !6, i64 4}
!15 = !{!10, !11, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/irda/extr_mcs7780.c_mcs_setup_transceiver.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/irda/extr_mcs7780.c_mcs_setup_transceiver.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [31 x i8] c"Basic transceiver setup error.\00", align 1
@MCS_MODE_REG = common local_unnamed_addr global i32 0, align 4
@MCS_DRIVER = common local_unnamed_addr global i32 0, align 4
@MCS_MINRXPW_REG = common local_unnamed_addr global i32 0, align 4
@MCS_FIR = common local_unnamed_addr global i32 0, align 4
@MCS_SIR16US = common local_unnamed_addr global i32 0, align 4
@MCS_BBTG = common local_unnamed_addr global i32 0, align 4
@MCS_ASK = common local_unnamed_addr global i32 0, align 4
@MCS_SPEED_MASK = common local_unnamed_addr global i32 0, align 4
@MCS_SPEED_9600 = common local_unnamed_addr global i32 0, align 4
@MCS_PLLPWDN = common local_unnamed_addr global i32 0, align 4
@MCS_DTD = common local_unnamed_addr global i32 0, align 4
@MCS_SIPEN = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [40 x i8] c"transceiver model specific setup error.\00", align 1
@.str.2 = private unnamed_addr constant [30 x i8] c"Unknown transceiver type: %d\0A\00", align 1
@MCS_XCVR_REG = common local_unnamed_addr global i32 0, align 4
@MCS_RXFAST = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [19 x i8] c"transceiver reset.\00", align 1
@MCS_RESET = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @mcs_setup_transceiver], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @mcs_setup_transceiver(ptr noundef %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = load i32, ptr @MCS_MODE_REG, align 4, !tbaa !6
%4 = call i32 @mcs_get_reg(ptr noundef %0, i32 noundef %3, ptr noundef nonnull %2) #3
%5 = icmp ne i32 %4, 2
%6 = zext i1 %5 to i32
%7 = call i64 @unlikely(i32 noundef %6) #3
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %122
9: ; preds = %1
%10 = load i32, ptr @MCS_DRIVER, align 4, !tbaa !6
%11 = load i32, ptr %2, align 4, !tbaa !6
%12 = or i32 %11, %10
store i32 %12, ptr %2, align 4, !tbaa !6
%13 = load i32, ptr @MCS_MODE_REG, align 4, !tbaa !6
%14 = call i32 @mcs_set_reg(ptr noundef %0, i32 noundef %13, i32 noundef %12) #3
%15 = call i64 @unlikely(i32 noundef %14) #3
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %122
17: ; preds = %9
store i32 0, ptr %2, align 4, !tbaa !6
%18 = load i32, ptr @MCS_MINRXPW_REG, align 4, !tbaa !6
%19 = call i32 @mcs_set_reg(ptr noundef %0, i32 noundef %18, i32 noundef 0) #3
%20 = call i64 @unlikely(i32 noundef %19) #3
%21 = icmp eq i64 %20, 0
br i1 %21, label %22, label %122
22: ; preds = %17
%23 = load i32, ptr @MCS_MODE_REG, align 4, !tbaa !6
%24 = call i32 @mcs_get_reg(ptr noundef %0, i32 noundef %23, ptr noundef nonnull %2) #3
%25 = icmp ne i32 %24, 2
%26 = zext i1 %25 to i32
%27 = call i64 @unlikely(i32 noundef %26) #3
%28 = icmp eq i64 %27, 0
br i1 %28, label %29, label %122
29: ; preds = %22
%30 = load i32, ptr @MCS_FIR, align 4, !tbaa !6
%31 = xor i32 %30, -1
%32 = load i32, ptr %2, align 4, !tbaa !6
%33 = and i32 %32, %31
%34 = getelementptr inbounds i8, ptr %0, i64 24
%35 = load i64, ptr %34, align 8, !tbaa !10
%36 = icmp eq i64 %35, 0
%37 = load i32, ptr @MCS_SIR16US, align 4, !tbaa !6
%38 = xor i32 %37, -1
%39 = and i32 %33, %38
%40 = or i32 %37, %33
%41 = select i1 %36, i32 %39, i32 %40
%42 = load i32, ptr @MCS_BBTG, align 4, !tbaa !6
%43 = load i32, ptr @MCS_ASK, align 4, !tbaa !6
%44 = or i32 %43, %42
%45 = load i32, ptr @MCS_SPEED_MASK, align 4, !tbaa !6
%46 = or i32 %44, %45
%47 = xor i32 %46, -1
%48 = and i32 %41, %47
%49 = load i32, ptr @MCS_SPEED_9600, align 4, !tbaa !6
%50 = or i32 %49, %48
store i32 9600, ptr %0, align 8, !tbaa !13
%51 = getelementptr inbounds i8, ptr %0, i64 16
store i64 0, ptr %51, align 8, !tbaa !14
%52 = load i32, ptr @MCS_PLLPWDN, align 4, !tbaa !6
%53 = xor i32 %52, -1
%54 = and i32 %50, %53
%55 = load i32, ptr @MCS_DTD, align 4, !tbaa !6
%56 = load i32, ptr @MCS_SIPEN, align 4, !tbaa !6
%57 = or i32 %55, %56
%58 = or i32 %57, %54
store i32 %58, ptr %2, align 4, !tbaa !6
%59 = load i32, ptr @MCS_MODE_REG, align 4, !tbaa !6
%60 = call i32 @mcs_set_reg(ptr noundef nonnull %0, i32 noundef %59, i32 noundef %58) #3
%61 = call i64 @unlikely(i32 noundef %60) #3
%62 = icmp eq i64 %61, 0
br i1 %62, label %63, label %122
63: ; preds = %29
%64 = getelementptr inbounds i8, ptr %0, i64 4
%65 = load i32, ptr %64, align 4, !tbaa !15
switch i32 %65, label %72 [
i32 128, label %66
i32 129, label %68
i32 130, label %70
]
66: ; preds = %63
%67 = call i32 @mcs_setup_transceiver_vishay(ptr noundef nonnull %0) #3
br label %74
68: ; preds = %63
%69 = call i32 @mcs_setup_transceiver_sharp(ptr noundef nonnull %0) #3
br label %74
70: ; preds = %63
%71 = call i32 @mcs_setup_transceiver_agilent(ptr noundef nonnull %0) #3
br label %74
72: ; preds = %63
%73 = call i32 @IRDA_WARNING(ptr noundef nonnull @.str.2, i32 noundef %65) #3
br label %74
74: ; preds = %72, %70, %68, %66
%75 = phi i32 [ 1, %72 ], [ %71, %70 ], [ %69, %68 ], [ %67, %66 ]
%76 = call i64 @unlikely(i32 noundef %75) #3
%77 = icmp eq i64 %76, 0
br i1 %77, label %78, label %122
78: ; preds = %74
%79 = load i32, ptr %64, align 4, !tbaa !15
%80 = icmp eq i32 %79, 129
br i1 %80, label %106, label %81
81: ; preds = %78
%82 = load i32, ptr @MCS_XCVR_REG, align 4, !tbaa !6
%83 = call i32 @mcs_get_reg(ptr noundef nonnull %0, i32 noundef %82, ptr noundef nonnull %2) #3
%84 = icmp ne i32 %83, 2
%85 = zext i1 %84 to i32
%86 = call i64 @unlikely(i32 noundef %85) #3
%87 = icmp eq i64 %86, 0
br i1 %87, label %88, label %122
88: ; preds = %81
%89 = getelementptr inbounds i8, ptr %0, i64 8
%90 = load i64, ptr %89, align 8, !tbaa !16
%91 = icmp eq i64 %90, 0
%92 = load i32, ptr @MCS_RXFAST, align 4, !tbaa !6
br i1 %91, label %96, label %93
93: ; preds = %88
%94 = load i32, ptr %2, align 4, !tbaa !6
%95 = or i32 %94, %92
br label %100
96: ; preds = %88
%97 = xor i32 %92, -1
%98 = load i32, ptr %2, align 4, !tbaa !6
%99 = and i32 %98, %97
br label %100
100: ; preds = %96, %93
%101 = phi i32 [ %99, %96 ], [ %95, %93 ]
store i32 %101, ptr %2, align 4, !tbaa !6
%102 = load i32, ptr @MCS_XCVR_REG, align 4, !tbaa !6
%103 = call i32 @mcs_set_reg(ptr noundef nonnull %0, i32 noundef %102, i32 noundef %101) #3
%104 = call i64 @unlikely(i32 noundef %103) #3
%105 = icmp eq i64 %104, 0
br i1 %105, label %106, label %122
106: ; preds = %100, %78
%107 = load i32, ptr @MCS_MODE_REG, align 4, !tbaa !6
%108 = call i32 @mcs_get_reg(ptr noundef nonnull %0, i32 noundef %107, ptr noundef nonnull %2) #3
%109 = icmp ne i32 %108, 2
%110 = zext i1 %109 to i32
%111 = call i64 @unlikely(i32 noundef %110) #3
%112 = icmp eq i64 %111, 0
br i1 %112, label %113, label %122
113: ; preds = %106
%114 = load i32, ptr @MCS_RESET, align 4, !tbaa !6
%115 = xor i32 %114, -1
%116 = load i32, ptr %2, align 4, !tbaa !6
%117 = and i32 %116, %115
store i32 %117, ptr %2, align 4, !tbaa !6
%118 = load i32, ptr @MCS_MODE_REG, align 4, !tbaa !6
%119 = call i32 @mcs_set_reg(ptr noundef nonnull %0, i32 noundef %118, i32 noundef %117) #3
%120 = call i64 @unlikely(i32 noundef %119) #3
%121 = icmp eq i64 %120, 0
br i1 %121, label %126, label %122
122: ; preds = %113, %106, %100, %81, %74, %29, %22, %17, %9, %1
%123 = phi i32 [ %4, %1 ], [ %14, %9 ], [ %19, %17 ], [ %24, %22 ], [ %60, %29 ], [ %75, %74 ], [ %83, %81 ], [ %103, %100 ], [ %108, %106 ], [ %119, %113 ]
%124 = phi ptr [ @.str, %1 ], [ @.str, %9 ], [ @.str, %17 ], [ @.str, %22 ], [ @.str, %29 ], [ @.str.1, %74 ], [ @.str.1, %81 ], [ @.str.1, %100 ], [ @.str.3, %106 ], [ @.str.3, %113 ]
%125 = call i32 @IRDA_ERROR(ptr noundef nonnull @.str.4, ptr noundef nonnull %124) #3
br label %126
126: ; preds = %113, %122
%127 = phi i32 [ %123, %122 ], [ %119, %113 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %127
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @mcs_get_reg(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @unlikely(i32 noundef) local_unnamed_addr #2
declare i32 @mcs_set_reg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mcs_setup_transceiver_vishay(ptr noundef) local_unnamed_addr #2
declare i32 @mcs_setup_transceiver_sharp(ptr noundef) local_unnamed_addr #2
declare i32 @mcs_setup_transceiver_agilent(ptr noundef) local_unnamed_addr #2
declare i32 @IRDA_WARNING(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @IRDA_ERROR(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 24}
!11 = !{!"mcs_cb", !7, i64 0, !7, i64 4, !12, i64 8, !12, i64 16, !12, i64 24}
!12 = !{!"long", !8, i64 0}
!13 = !{!11, !7, i64 0}
!14 = !{!11, !12, i64 16}
!15 = !{!11, !7, i64 4}
!16 = !{!11, !12, i64 8}
| fastsocket_kernel_drivers_net_irda_extr_mcs7780.c_mcs_setup_transceiver |
; ModuleID = 'AnghaBench/linux/fs/ext4/extr_resize.c_ext4_get_bitmap.c'
source_filename = "AnghaBench/linux/fs/ext4/extr_resize.c_ext4_get_bitmap.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @ext4_get_bitmap], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @ext4_get_bitmap(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @sb_getblk(ptr noundef %0, i32 noundef %1) #2
%4 = icmp eq ptr %3, null
%5 = zext i1 %4 to i32
%6 = tail call i64 @unlikely(i32 noundef %5) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %16
8: ; preds = %2
%9 = tail call i32 @bh_uptodate_or_lock(ptr noundef %3) #2
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %16
11: ; preds = %8
%12 = tail call i64 @bh_submit_read(ptr noundef %3) #2
%13 = icmp slt i64 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %11
%15 = tail call i32 @brelse(ptr noundef %3) #2
br label %16
16: ; preds = %8, %11, %2, %14
%17 = phi ptr [ null, %14 ], [ null, %2 ], [ %3, %11 ], [ %3, %8 ]
ret ptr %17
}
declare ptr @sb_getblk(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i32 @bh_uptodate_or_lock(ptr noundef) local_unnamed_addr #1
declare i64 @bh_submit_read(ptr noundef) local_unnamed_addr #1
declare i32 @brelse(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/fs/ext4/extr_resize.c_ext4_get_bitmap.c'
source_filename = "AnghaBench/linux/fs/ext4/extr_resize.c_ext4_get_bitmap.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ext4_get_bitmap], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @ext4_get_bitmap(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @sb_getblk(ptr noundef %0, i32 noundef %1) #2
%4 = icmp eq ptr %3, null
%5 = zext i1 %4 to i32
%6 = tail call i64 @unlikely(i32 noundef %5) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %16
8: ; preds = %2
%9 = tail call i32 @bh_uptodate_or_lock(ptr noundef %3) #2
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %16
11: ; preds = %8
%12 = tail call i64 @bh_submit_read(ptr noundef %3) #2
%13 = icmp slt i64 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %11
%15 = tail call i32 @brelse(ptr noundef %3) #2
br label %16
16: ; preds = %8, %11, %2, %14
%17 = phi ptr [ null, %14 ], [ null, %2 ], [ %3, %11 ], [ %3, %8 ]
ret ptr %17
}
declare ptr @sb_getblk(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i32 @bh_uptodate_or_lock(ptr noundef) local_unnamed_addr #1
declare i64 @bh_submit_read(ptr noundef) local_unnamed_addr #1
declare i32 @brelse(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_fs_ext4_extr_resize.c_ext4_get_bitmap |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/char/extr_vt.c_unblank_screen.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/char/extr_vt.c_unblank_screen.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @unblank_screen() local_unnamed_addr #0 {
%1 = tail call i32 @do_unblank_screen(i32 noundef 0) #2
ret void
}
declare i32 @do_unblank_screen(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/char/extr_vt.c_unblank_screen.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/char/extr_vt.c_unblank_screen.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @unblank_screen() local_unnamed_addr #0 {
%1 = tail call i32 @do_unblank_screen(i32 noundef 0) #2
ret void
}
declare i32 @do_unblank_screen(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_char_extr_vt.c_unblank_screen |
; ModuleID = 'AnghaBench/lab/engine/code/game/extr_g_utils.c_G_TempEntity.c'
source_filename = "AnghaBench/lab/engine/code/game/extr_g_utils.c_G_TempEntity.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
%struct.TYPE_10__ = type { i32 }
%struct.TYPE_9__ = type { i8*, i32, i32, %struct.TYPE_8__ }
%struct.TYPE_8__ = type { i64 }
@ET_EVENTS = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [11 x i8] c"tempEntity\00", align 1
@level = dso_local local_unnamed_addr global %struct.TYPE_10__ zeroinitializer, align 4
@qtrue = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local %struct.TYPE_9__* @G_TempEntity(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call %struct.TYPE_9__* (...) @G_Spawn() #2
%4 = load i64, i64* @ET_EVENTS, align 8, !tbaa !5
%5 = sext i32 %1 to i64
%6 = add nsw i64 %4, %5
%7 = getelementptr inbounds %struct.TYPE_9__, %struct.TYPE_9__* %3, i64 0, i32 3, i32 0
store i64 %6, i64* %7, align 8, !tbaa !9
%8 = getelementptr inbounds %struct.TYPE_9__, %struct.TYPE_9__* %3, i64 0, i32 0
store i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8** %8, align 8, !tbaa !14
%9 = load i32, i32* getelementptr inbounds (%struct.TYPE_10__, %struct.TYPE_10__* @level, i64 0, i32 0), align 4, !tbaa !15
%10 = getelementptr inbounds %struct.TYPE_9__, %struct.TYPE_9__* %3, i64 0, i32 2
store i32 %9, i32* %10, align 4, !tbaa !17
%11 = load i32, i32* @qtrue, align 4, !tbaa !18
%12 = getelementptr inbounds %struct.TYPE_9__, %struct.TYPE_9__* %3, i64 0, i32 1
store i32 %11, i32* %12, align 8, !tbaa !19
%13 = tail call i32 @VectorCopy(i32 noundef %0, i32 noundef undef) #2
%14 = tail call i32 @SnapVector(i32 noundef undef) #2
%15 = tail call i32 @G_SetOrigin(%struct.TYPE_9__* noundef %3, i32 noundef undef) #2
%16 = tail call i32 @trap_LinkEntity(%struct.TYPE_9__* noundef %3) #2
ret %struct.TYPE_9__* %3
}
declare %struct.TYPE_9__* @G_Spawn(...) local_unnamed_addr #1
declare i32 @VectorCopy(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SnapVector(i32 noundef) local_unnamed_addr #1
declare i32 @G_SetOrigin(%struct.TYPE_9__* noundef, i32 noundef) local_unnamed_addr #1
declare i32 @trap_LinkEntity(%struct.TYPE_9__* noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 7, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{!"Ubuntu clang version 14.0.0-1ubuntu1.1"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"TYPE_9__", !11, i64 0, !12, i64 8, !12, i64 12, !13, i64 16}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!"TYPE_8__", !6, i64 0}
!14 = !{!10, !11, i64 0}
!15 = !{!16, !12, i64 0}
!16 = !{!"TYPE_10__", !12, i64 0}
!17 = !{!10, !12, i64 12}
!18 = !{!12, !12, i64 0}
!19 = !{!10, !12, i64 8}
| ; ModuleID = 'AnghaBench/lab/engine/code/game/extr_g_utils.c_G_TempEntity.c'
source_filename = "AnghaBench/lab/engine/code/game/extr_g_utils.c_G_TempEntity.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_10__ = type { i32 }
@ET_EVENTS = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [11 x i8] c"tempEntity\00", align 1
@level = common local_unnamed_addr global %struct.TYPE_10__ zeroinitializer, align 4
@qtrue = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define noundef ptr @G_TempEntity(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @G_Spawn() #2
%4 = load i64, ptr @ET_EVENTS, align 8, !tbaa !6
%5 = sext i32 %1 to i64
%6 = add nsw i64 %4, %5
%7 = getelementptr inbounds i8, ptr %3, i64 16
store i64 %6, ptr %7, align 8, !tbaa !10
store ptr @.str, ptr %3, align 8, !tbaa !15
%8 = load i32, ptr @level, align 4, !tbaa !16
%9 = getelementptr inbounds i8, ptr %3, i64 12
store i32 %8, ptr %9, align 4, !tbaa !18
%10 = load i32, ptr @qtrue, align 4, !tbaa !19
%11 = getelementptr inbounds i8, ptr %3, i64 8
store i32 %10, ptr %11, align 8, !tbaa !20
%12 = tail call i32 @VectorCopy(i32 noundef %0, i32 noundef undef) #2
%13 = tail call i32 @SnapVector(i32 noundef undef) #2
%14 = tail call i32 @G_SetOrigin(ptr noundef nonnull %3, i32 noundef undef) #2
%15 = tail call i32 @trap_LinkEntity(ptr noundef nonnull %3) #2
ret ptr %3
}
declare ptr @G_Spawn(...) local_unnamed_addr #1
declare i32 @VectorCopy(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SnapVector(i32 noundef) local_unnamed_addr #1
declare i32 @G_SetOrigin(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @trap_LinkEntity(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 16}
!11 = !{!"TYPE_9__", !12, i64 0, !13, i64 8, !13, i64 12, !14, i64 16}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!"TYPE_8__", !7, i64 0}
!15 = !{!11, !12, i64 0}
!16 = !{!17, !13, i64 0}
!17 = !{!"TYPE_10__", !13, i64 0}
!18 = !{!11, !13, i64 12}
!19 = !{!13, !13, i64 0}
!20 = !{!11, !13, i64 8}
| lab_engine_code_game_extr_g_utils.c_G_TempEntity |
; ModuleID = 'AnghaBench/Quake-III-Arena/lcc/cpp/extr_tokens.c_maketokenrow.c'
source_filename = "AnghaBench/Quake-III-Arena/lcc/cpp/extr_tokens.c_maketokenrow.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, ptr, ptr, ptr }
; Function Attrs: nounwind uwtable
define dso_local void @maketokenrow(i32 noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
store i32 %0, ptr %1, align 8, !tbaa !5
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = shl i32 %0, 2
%6 = tail call i64 @domalloc(i32 noundef %5) #2
%7 = inttoptr i64 %6 to ptr
br label %8
8: ; preds = %2, %4
%9 = phi ptr [ %7, %4 ], [ null, %2 ]
%10 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 1
store ptr %9, ptr %10, align 8
%11 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 3
store ptr %9, ptr %11, align 8, !tbaa !11
%12 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 2
store ptr %9, ptr %12, align 8, !tbaa !12
ret void
}
declare i64 @domalloc(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0, !10, i64 8, !10, i64 16, !10, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 24}
!12 = !{!6, !10, i64 16}
| ; ModuleID = 'AnghaBench/Quake-III-Arena/lcc/cpp/extr_tokens.c_maketokenrow.c'
source_filename = "AnghaBench/Quake-III-Arena/lcc/cpp/extr_tokens.c_maketokenrow.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @maketokenrow(i32 noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
store i32 %0, ptr %1, align 8, !tbaa !6
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = shl i32 %0, 2
%6 = tail call i64 @domalloc(i32 noundef %5) #2
%7 = inttoptr i64 %6 to ptr
br label %8
8: ; preds = %2, %4
%9 = phi ptr [ %7, %4 ], [ null, %2 ]
%10 = getelementptr inbounds i8, ptr %1, i64 8
store ptr %9, ptr %10, align 8
%11 = getelementptr inbounds i8, ptr %1, i64 24
store ptr %9, ptr %11, align 8, !tbaa !12
%12 = getelementptr inbounds i8, ptr %1, i64 16
store ptr %9, ptr %12, align 8, !tbaa !13
ret void
}
declare i64 @domalloc(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8, !11, i64 16, !11, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 24}
!13 = !{!7, !11, i64 16}
| Quake-III-Arena_lcc_cpp_extr_tokens.c_maketokenrow |
; ModuleID = 'AnghaBench/freebsd/sys/kern/extr_tty.c_tty_rel_pgrp.c'
source_filename = "AnghaBench/freebsd/sys/kern/extr_tty.c_tty_rel_pgrp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.tty = type { i64, ptr }
@MA_OWNED = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @tty_rel_pgrp(ptr noundef %0, ptr noundef readnone %1) local_unnamed_addr #0 {
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = icmp sgt i64 %3, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 @MPASS(i32 noundef %5) #2
%7 = load i32, ptr @MA_OWNED, align 4, !tbaa !11
%8 = tail call i32 @tty_lock_assert(ptr noundef nonnull %0, i32 noundef %7) #2
%9 = getelementptr inbounds %struct.tty, ptr %0, i64 0, i32 1
%10 = load ptr, ptr %9, align 8, !tbaa !13
%11 = icmp eq ptr %10, %1
br i1 %11, label %12, label %13
12: ; preds = %2
store ptr null, ptr %9, align 8, !tbaa !13
br label %13
13: ; preds = %12, %2
%14 = tail call i32 @tty_unlock(ptr noundef nonnull %0) #2
ret void
}
declare i32 @MPASS(i32 noundef) local_unnamed_addr #1
declare i32 @tty_lock_assert(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tty_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"tty", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/freebsd/sys/kern/extr_tty.c_tty_rel_pgrp.c'
source_filename = "AnghaBench/freebsd/sys/kern/extr_tty.c_tty_rel_pgrp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MA_OWNED = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @tty_rel_pgrp(ptr noundef %0, ptr noundef readnone %1) local_unnamed_addr #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = icmp sgt i64 %3, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 @MPASS(i32 noundef %5) #2
%7 = load i32, ptr @MA_OWNED, align 4, !tbaa !12
%8 = tail call i32 @tty_lock_assert(ptr noundef nonnull %0, i32 noundef %7) #2
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = load ptr, ptr %9, align 8, !tbaa !14
%11 = icmp eq ptr %10, %1
br i1 %11, label %12, label %13
12: ; preds = %2
store ptr null, ptr %9, align 8, !tbaa !14
br label %13
13: ; preds = %12, %2
%14 = tail call i32 @tty_unlock(ptr noundef nonnull %0) #2
ret void
}
declare i32 @MPASS(i32 noundef) local_unnamed_addr #1
declare i32 @tty_lock_assert(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tty_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"tty", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!7, !11, i64 8}
| freebsd_sys_kern_extr_tty.c_tty_rel_pgrp |
; ModuleID = 'AnghaBench/linux/drivers/i2c/busses/extr_i2c-ali15x3.c_ali15x3_transaction.c'
source_filename = "AnghaBench/linux/drivers/i2c/busses/extr_i2c-ali15x3.c_ali15x3_transaction.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [81 x i8] c"Transaction (pre): STS=%02x, CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\0A\00", align 1
@SMBHSTSTS = dso_local local_unnamed_addr global i32 0, align 4
@SMBHSTCNT = dso_local local_unnamed_addr global i32 0, align 4
@SMBHSTCMD = dso_local local_unnamed_addr global i32 0, align 4
@SMBHSTADD = dso_local local_unnamed_addr global i32 0, align 4
@SMBHSTDAT0 = dso_local local_unnamed_addr global i32 0, align 4
@SMBHSTDAT1 = dso_local local_unnamed_addr global i32 0, align 4
@ALI15X3_STS_BUSY = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [57 x i8] c"Resetting entire SMB Bus to clear busy condition (%02x)\0A\00", align 1
@ALI15X3_T_OUT = dso_local local_unnamed_addr global i32 0, align 4
@ALI15X3_STS_ERR = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [77 x i8] c"SMBus reset failed! (0x%02x) - controller or device on bus is probably hung\0A\00", align 1
@EBUSY = dso_local local_unnamed_addr global i32 0, align 4
@ALI15X3_STS_DONE = dso_local local_unnamed_addr global i32 0, align 4
@SMBHSTSTART = dso_local local_unnamed_addr global i32 0, align 4
@MAX_TIMEOUT = dso_local local_unnamed_addr global i32 0, align 4
@ETIMEDOUT = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [16 x i8] c"SMBus Timeout!\0A\00", align 1
@ALI15X3_STS_TERM = dso_local local_unnamed_addr global i32 0, align 4
@EIO = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [31 x i8] c"Error: Failed bus transaction\0A\00", align 1
@ALI15X3_STS_COLL = dso_local local_unnamed_addr global i32 0, align 4
@ENXIO = dso_local local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [46 x i8] c"Error: no response or bus collision ADD=%02x\0A\00", align 1
@ALI15X3_STS_DEV = dso_local local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [21 x i8] c"Error: device error\0A\00", align 1
@.str.7 = private unnamed_addr constant [82 x i8] c"Transaction (post): STS=%02x, CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @ali15x3_transaction], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ali15x3_transaction(ptr noundef %0) #0 {
%2 = load i32, ptr @SMBHSTSTS, align 4, !tbaa !5
%3 = tail call i32 @inb_p(i32 noundef %2) #2
%4 = load i32, ptr @SMBHSTCNT, align 4, !tbaa !5
%5 = tail call i32 @inb_p(i32 noundef %4) #2
%6 = load i32, ptr @SMBHSTCMD, align 4, !tbaa !5
%7 = tail call i32 @inb_p(i32 noundef %6) #2
%8 = load i32, ptr @SMBHSTADD, align 4, !tbaa !5
%9 = tail call i32 @inb_p(i32 noundef %8) #2
%10 = load i32, ptr @SMBHSTDAT0, align 4, !tbaa !5
%11 = tail call i32 @inb_p(i32 noundef %10) #2
%12 = load i32, ptr @SMBHSTDAT1, align 4, !tbaa !5
%13 = tail call i32 @inb_p(i32 noundef %12) #2
%14 = tail call i32 (ptr, ptr, ...) @dev_dbg(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %3, i32 noundef %5, i32 noundef %7, i32 noundef %9, i32 noundef %11, i32 noundef %13) #2
%15 = load i32, ptr @SMBHSTSTS, align 4, !tbaa !5
%16 = tail call i32 @inb_p(i32 noundef %15) #2
%17 = load i32, ptr @ALI15X3_STS_BUSY, align 4, !tbaa !5
%18 = and i32 %17, %16
%19 = icmp eq i32 %18, 0
br i1 %19, label %28, label %20
20: ; preds = %1
%21 = tail call i32 @dev_info(ptr noundef %0, ptr noundef nonnull @.str.1, i32 noundef %16) #2
%22 = load i32, ptr @ALI15X3_T_OUT, align 4, !tbaa !5
%23 = load i32, ptr @SMBHSTCNT, align 4, !tbaa !5
%24 = tail call i32 @outb_p(i32 noundef %22, i32 noundef %23) #2
%25 = load i32, ptr @SMBHSTSTS, align 4, !tbaa !5
%26 = tail call i32 @inb_p(i32 noundef %25) #2
%27 = load i32, ptr @ALI15X3_STS_BUSY, align 4, !tbaa !5
br label %28
28: ; preds = %20, %1
%29 = phi i32 [ %27, %20 ], [ %17, %1 ]
%30 = phi i32 [ %26, %20 ], [ %16, %1 ]
%31 = load i32, ptr @ALI15X3_STS_ERR, align 4, !tbaa !5
%32 = or i32 %29, %31
%33 = and i32 %32, %30
%34 = icmp eq i32 %33, 0
br i1 %34, label %49, label %35
35: ; preds = %28
%36 = load i32, ptr @SMBHSTSTS, align 4, !tbaa !5
%37 = tail call i32 @outb_p(i32 noundef 255, i32 noundef %36) #2
%38 = load i32, ptr @SMBHSTSTS, align 4, !tbaa !5
%39 = tail call i32 @inb_p(i32 noundef %38) #2
%40 = load i32, ptr @ALI15X3_STS_ERR, align 4, !tbaa !5
%41 = load i32, ptr @ALI15X3_STS_BUSY, align 4, !tbaa !5
%42 = or i32 %41, %40
%43 = and i32 %42, %39
%44 = icmp eq i32 %43, 0
br i1 %44, label %56, label %45
45: ; preds = %35
%46 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef %0, ptr noundef nonnull @.str.2, i32 noundef %39) #2
%47 = load i32, ptr @EBUSY, align 4, !tbaa !5
%48 = sub nsw i32 0, %47
br label %124
49: ; preds = %28
%50 = load i32, ptr @ALI15X3_STS_DONE, align 4, !tbaa !5
%51 = and i32 %50, %30
%52 = icmp eq i32 %51, 0
br i1 %52, label %56, label %53
53: ; preds = %49
%54 = load i32, ptr @SMBHSTSTS, align 4, !tbaa !5
%55 = tail call i32 @outb_p(i32 noundef %30, i32 noundef %54) #2
br label %56
56: ; preds = %49, %53, %35
%57 = load i32, ptr @SMBHSTSTART, align 4, !tbaa !5
%58 = tail call i32 @outb_p(i32 noundef 255, i32 noundef %57) #2
br label %59
59: ; preds = %70, %56
%60 = phi i32 [ 0, %56 ], [ %71, %70 ]
%61 = tail call i32 @msleep(i32 noundef 1) #2
%62 = load i32, ptr @SMBHSTSTS, align 4, !tbaa !5
%63 = tail call i32 @inb_p(i32 noundef %62) #2
%64 = load i32, ptr @ALI15X3_STS_ERR, align 4, !tbaa !5
%65 = load i32, ptr @ALI15X3_STS_DONE, align 4, !tbaa !5
%66 = or i32 %65, %64
%67 = and i32 %66, %63
%68 = icmp eq i32 %67, 0
%69 = load i32, ptr @MAX_TIMEOUT, align 4, !tbaa !5
br i1 %68, label %70, label %73
70: ; preds = %59
%71 = add nuw nsw i32 %60, 1
%72 = icmp slt i32 %60, %69
br i1 %72, label %59, label %73, !llvm.loop !9
73: ; preds = %59, %70
%74 = phi i32 [ %60, %59 ], [ %71, %70 ]
%75 = icmp sgt i32 %74, %69
br i1 %75, label %76, label %80
76: ; preds = %73
%77 = load i32, ptr @ETIMEDOUT, align 4, !tbaa !5
%78 = sub nsw i32 0, %77
%79 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef %0, ptr noundef nonnull @.str.3) #2
br label %80
80: ; preds = %76, %73
%81 = phi i32 [ %78, %76 ], [ 0, %73 ]
%82 = load i32, ptr @ALI15X3_STS_TERM, align 4, !tbaa !5
%83 = and i32 %82, %63
%84 = icmp eq i32 %83, 0
br i1 %84, label %89, label %85
85: ; preds = %80
%86 = load i32, ptr @EIO, align 4, !tbaa !5
%87 = sub nsw i32 0, %86
%88 = tail call i32 (ptr, ptr, ...) @dev_dbg(ptr noundef %0, ptr noundef nonnull @.str.4) #2
br label %89
89: ; preds = %85, %80
%90 = phi i32 [ %87, %85 ], [ %81, %80 ]
%91 = load i32, ptr @ALI15X3_STS_COLL, align 4, !tbaa !5
%92 = and i32 %91, %63
%93 = icmp eq i32 %92, 0
br i1 %93, label %100, label %94
94: ; preds = %89
%95 = load i32, ptr @ENXIO, align 4, !tbaa !5
%96 = sub nsw i32 0, %95
%97 = load i32, ptr @SMBHSTADD, align 4, !tbaa !5
%98 = tail call i32 @inb_p(i32 noundef %97) #2
%99 = tail call i32 (ptr, ptr, ...) @dev_dbg(ptr noundef %0, ptr noundef nonnull @.str.5, i32 noundef %98) #2
br label %100
100: ; preds = %94, %89
%101 = phi i32 [ %96, %94 ], [ %90, %89 ]
%102 = load i32, ptr @ALI15X3_STS_DEV, align 4, !tbaa !5
%103 = and i32 %102, %63
%104 = icmp eq i32 %103, 0
br i1 %104, label %109, label %105
105: ; preds = %100
%106 = load i32, ptr @EIO, align 4, !tbaa !5
%107 = sub nsw i32 0, %106
%108 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef %0, ptr noundef nonnull @.str.6) #2
br label %109
109: ; preds = %105, %100
%110 = phi i32 [ %107, %105 ], [ %101, %100 ]
%111 = load i32, ptr @SMBHSTSTS, align 4, !tbaa !5
%112 = tail call i32 @inb_p(i32 noundef %111) #2
%113 = load i32, ptr @SMBHSTCNT, align 4, !tbaa !5
%114 = tail call i32 @inb_p(i32 noundef %113) #2
%115 = load i32, ptr @SMBHSTCMD, align 4, !tbaa !5
%116 = tail call i32 @inb_p(i32 noundef %115) #2
%117 = load i32, ptr @SMBHSTADD, align 4, !tbaa !5
%118 = tail call i32 @inb_p(i32 noundef %117) #2
%119 = load i32, ptr @SMBHSTDAT0, align 4, !tbaa !5
%120 = tail call i32 @inb_p(i32 noundef %119) #2
%121 = load i32, ptr @SMBHSTDAT1, align 4, !tbaa !5
%122 = tail call i32 @inb_p(i32 noundef %121) #2
%123 = tail call i32 (ptr, ptr, ...) @dev_dbg(ptr noundef %0, ptr noundef nonnull @.str.7, i32 noundef %112, i32 noundef %114, i32 noundef %116, i32 noundef %118, i32 noundef %120, i32 noundef %122) #2
br label %124
124: ; preds = %109, %45
%125 = phi i32 [ %48, %45 ], [ %110, %109 ]
ret i32 %125
}
declare i32 @dev_dbg(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @inb_p(i32 noundef) local_unnamed_addr #1
declare i32 @dev_info(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @outb_p(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @msleep(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/i2c/busses/extr_i2c-ali15x3.c_ali15x3_transaction.c'
source_filename = "AnghaBench/linux/drivers/i2c/busses/extr_i2c-ali15x3.c_ali15x3_transaction.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [81 x i8] c"Transaction (pre): STS=%02x, CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\0A\00", align 1
@SMBHSTSTS = common local_unnamed_addr global i32 0, align 4
@SMBHSTCNT = common local_unnamed_addr global i32 0, align 4
@SMBHSTCMD = common local_unnamed_addr global i32 0, align 4
@SMBHSTADD = common local_unnamed_addr global i32 0, align 4
@SMBHSTDAT0 = common local_unnamed_addr global i32 0, align 4
@SMBHSTDAT1 = common local_unnamed_addr global i32 0, align 4
@ALI15X3_STS_BUSY = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [57 x i8] c"Resetting entire SMB Bus to clear busy condition (%02x)\0A\00", align 1
@ALI15X3_T_OUT = common local_unnamed_addr global i32 0, align 4
@ALI15X3_STS_ERR = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [77 x i8] c"SMBus reset failed! (0x%02x) - controller or device on bus is probably hung\0A\00", align 1
@EBUSY = common local_unnamed_addr global i32 0, align 4
@ALI15X3_STS_DONE = common local_unnamed_addr global i32 0, align 4
@SMBHSTSTART = common local_unnamed_addr global i32 0, align 4
@MAX_TIMEOUT = common local_unnamed_addr global i32 0, align 4
@ETIMEDOUT = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [16 x i8] c"SMBus Timeout!\0A\00", align 1
@ALI15X3_STS_TERM = common local_unnamed_addr global i32 0, align 4
@EIO = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [31 x i8] c"Error: Failed bus transaction\0A\00", align 1
@ALI15X3_STS_COLL = common local_unnamed_addr global i32 0, align 4
@ENXIO = common local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [46 x i8] c"Error: no response or bus collision ADD=%02x\0A\00", align 1
@ALI15X3_STS_DEV = common local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [21 x i8] c"Error: device error\0A\00", align 1
@.str.7 = private unnamed_addr constant [82 x i8] c"Transaction (post): STS=%02x, CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ali15x3_transaction], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @ali15x3_transaction(ptr noundef %0) #0 {
%2 = load i32, ptr @SMBHSTSTS, align 4, !tbaa !6
%3 = tail call i32 @inb_p(i32 noundef %2) #2
%4 = load i32, ptr @SMBHSTCNT, align 4, !tbaa !6
%5 = tail call i32 @inb_p(i32 noundef %4) #2
%6 = load i32, ptr @SMBHSTCMD, align 4, !tbaa !6
%7 = tail call i32 @inb_p(i32 noundef %6) #2
%8 = load i32, ptr @SMBHSTADD, align 4, !tbaa !6
%9 = tail call i32 @inb_p(i32 noundef %8) #2
%10 = load i32, ptr @SMBHSTDAT0, align 4, !tbaa !6
%11 = tail call i32 @inb_p(i32 noundef %10) #2
%12 = load i32, ptr @SMBHSTDAT1, align 4, !tbaa !6
%13 = tail call i32 @inb_p(i32 noundef %12) #2
%14 = tail call i32 (ptr, ptr, ...) @dev_dbg(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %3, i32 noundef %5, i32 noundef %7, i32 noundef %9, i32 noundef %11, i32 noundef %13) #2
%15 = load i32, ptr @SMBHSTSTS, align 4, !tbaa !6
%16 = tail call i32 @inb_p(i32 noundef %15) #2
%17 = load i32, ptr @ALI15X3_STS_BUSY, align 4, !tbaa !6
%18 = and i32 %17, %16
%19 = icmp eq i32 %18, 0
br i1 %19, label %28, label %20
20: ; preds = %1
%21 = tail call i32 @dev_info(ptr noundef %0, ptr noundef nonnull @.str.1, i32 noundef %16) #2
%22 = load i32, ptr @ALI15X3_T_OUT, align 4, !tbaa !6
%23 = load i32, ptr @SMBHSTCNT, align 4, !tbaa !6
%24 = tail call i32 @outb_p(i32 noundef %22, i32 noundef %23) #2
%25 = load i32, ptr @SMBHSTSTS, align 4, !tbaa !6
%26 = tail call i32 @inb_p(i32 noundef %25) #2
%27 = load i32, ptr @ALI15X3_STS_BUSY, align 4, !tbaa !6
br label %28
28: ; preds = %20, %1
%29 = phi i32 [ %27, %20 ], [ %17, %1 ]
%30 = phi i32 [ %26, %20 ], [ %16, %1 ]
%31 = load i32, ptr @ALI15X3_STS_ERR, align 4, !tbaa !6
%32 = or i32 %29, %31
%33 = and i32 %32, %30
%34 = icmp eq i32 %33, 0
br i1 %34, label %49, label %35
35: ; preds = %28
%36 = load i32, ptr @SMBHSTSTS, align 4, !tbaa !6
%37 = tail call i32 @outb_p(i32 noundef 255, i32 noundef %36) #2
%38 = load i32, ptr @SMBHSTSTS, align 4, !tbaa !6
%39 = tail call i32 @inb_p(i32 noundef %38) #2
%40 = load i32, ptr @ALI15X3_STS_ERR, align 4, !tbaa !6
%41 = load i32, ptr @ALI15X3_STS_BUSY, align 4, !tbaa !6
%42 = or i32 %41, %40
%43 = and i32 %42, %39
%44 = icmp eq i32 %43, 0
br i1 %44, label %56, label %45
45: ; preds = %35
%46 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef %0, ptr noundef nonnull @.str.2, i32 noundef %39) #2
%47 = load i32, ptr @EBUSY, align 4, !tbaa !6
%48 = sub nsw i32 0, %47
br label %124
49: ; preds = %28
%50 = load i32, ptr @ALI15X3_STS_DONE, align 4, !tbaa !6
%51 = and i32 %50, %30
%52 = icmp eq i32 %51, 0
br i1 %52, label %56, label %53
53: ; preds = %49
%54 = load i32, ptr @SMBHSTSTS, align 4, !tbaa !6
%55 = tail call i32 @outb_p(i32 noundef %30, i32 noundef %54) #2
br label %56
56: ; preds = %49, %53, %35
%57 = load i32, ptr @SMBHSTSTART, align 4, !tbaa !6
%58 = tail call i32 @outb_p(i32 noundef 255, i32 noundef %57) #2
br label %59
59: ; preds = %70, %56
%60 = phi i32 [ 0, %56 ], [ %71, %70 ]
%61 = tail call i32 @msleep(i32 noundef 1) #2
%62 = load i32, ptr @SMBHSTSTS, align 4, !tbaa !6
%63 = tail call i32 @inb_p(i32 noundef %62) #2
%64 = load i32, ptr @ALI15X3_STS_ERR, align 4, !tbaa !6
%65 = load i32, ptr @ALI15X3_STS_DONE, align 4, !tbaa !6
%66 = or i32 %65, %64
%67 = and i32 %66, %63
%68 = icmp eq i32 %67, 0
%69 = load i32, ptr @MAX_TIMEOUT, align 4, !tbaa !6
br i1 %68, label %70, label %73
70: ; preds = %59
%71 = add nuw nsw i32 %60, 1
%72 = icmp slt i32 %60, %69
br i1 %72, label %59, label %73, !llvm.loop !10
73: ; preds = %59, %70
%74 = phi i32 [ %60, %59 ], [ %71, %70 ]
%75 = icmp sgt i32 %74, %69
br i1 %75, label %76, label %80
76: ; preds = %73
%77 = load i32, ptr @ETIMEDOUT, align 4, !tbaa !6
%78 = sub nsw i32 0, %77
%79 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef %0, ptr noundef nonnull @.str.3) #2
br label %80
80: ; preds = %76, %73
%81 = phi i32 [ %78, %76 ], [ 0, %73 ]
%82 = load i32, ptr @ALI15X3_STS_TERM, align 4, !tbaa !6
%83 = and i32 %82, %63
%84 = icmp eq i32 %83, 0
br i1 %84, label %89, label %85
85: ; preds = %80
%86 = load i32, ptr @EIO, align 4, !tbaa !6
%87 = sub nsw i32 0, %86
%88 = tail call i32 (ptr, ptr, ...) @dev_dbg(ptr noundef %0, ptr noundef nonnull @.str.4) #2
br label %89
89: ; preds = %85, %80
%90 = phi i32 [ %87, %85 ], [ %81, %80 ]
%91 = load i32, ptr @ALI15X3_STS_COLL, align 4, !tbaa !6
%92 = and i32 %91, %63
%93 = icmp eq i32 %92, 0
br i1 %93, label %100, label %94
94: ; preds = %89
%95 = load i32, ptr @ENXIO, align 4, !tbaa !6
%96 = sub nsw i32 0, %95
%97 = load i32, ptr @SMBHSTADD, align 4, !tbaa !6
%98 = tail call i32 @inb_p(i32 noundef %97) #2
%99 = tail call i32 (ptr, ptr, ...) @dev_dbg(ptr noundef %0, ptr noundef nonnull @.str.5, i32 noundef %98) #2
br label %100
100: ; preds = %94, %89
%101 = phi i32 [ %96, %94 ], [ %90, %89 ]
%102 = load i32, ptr @ALI15X3_STS_DEV, align 4, !tbaa !6
%103 = and i32 %102, %63
%104 = icmp eq i32 %103, 0
br i1 %104, label %109, label %105
105: ; preds = %100
%106 = load i32, ptr @EIO, align 4, !tbaa !6
%107 = sub nsw i32 0, %106
%108 = tail call i32 (ptr, ptr, ...) @dev_err(ptr noundef %0, ptr noundef nonnull @.str.6) #2
br label %109
109: ; preds = %105, %100
%110 = phi i32 [ %107, %105 ], [ %101, %100 ]
%111 = load i32, ptr @SMBHSTSTS, align 4, !tbaa !6
%112 = tail call i32 @inb_p(i32 noundef %111) #2
%113 = load i32, ptr @SMBHSTCNT, align 4, !tbaa !6
%114 = tail call i32 @inb_p(i32 noundef %113) #2
%115 = load i32, ptr @SMBHSTCMD, align 4, !tbaa !6
%116 = tail call i32 @inb_p(i32 noundef %115) #2
%117 = load i32, ptr @SMBHSTADD, align 4, !tbaa !6
%118 = tail call i32 @inb_p(i32 noundef %117) #2
%119 = load i32, ptr @SMBHSTDAT0, align 4, !tbaa !6
%120 = tail call i32 @inb_p(i32 noundef %119) #2
%121 = load i32, ptr @SMBHSTDAT1, align 4, !tbaa !6
%122 = tail call i32 @inb_p(i32 noundef %121) #2
%123 = tail call i32 (ptr, ptr, ...) @dev_dbg(ptr noundef %0, ptr noundef nonnull @.str.7, i32 noundef %112, i32 noundef %114, i32 noundef %116, i32 noundef %118, i32 noundef %120, i32 noundef %122) #2
br label %124
124: ; preds = %109, %45
%125 = phi i32 [ %48, %45 ], [ %110, %109 ]
ret i32 %125
}
declare i32 @dev_dbg(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @inb_p(i32 noundef) local_unnamed_addr #1
declare i32 @dev_info(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @outb_p(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @msleep(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| linux_drivers_i2c_busses_extr_i2c-ali15x3.c_ali15x3_transaction |
; ModuleID = 'AnghaBench/freebsd/sys/dev/virtio/network/extr_if_vtnet.c_vtnet_rx_filter.c'
source_filename = "AnghaBench/freebsd/sys/dev/virtio/network/extr_if_vtnet.c_vtnet_rx_filter.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.vtnet_softc = type { ptr, i32 }
@IFF_PROMISC = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [28 x i8] c"cannot %s promiscuous mode\0A\00", align 1
@.str.1 = private unnamed_addr constant [7 x i8] c"enable\00", align 1
@.str.2 = private unnamed_addr constant [8 x i8] c"disable\00", align 1
@IFF_ALLMULTI = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [30 x i8] c"cannot %s all-multicast mode\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @vtnet_rx_filter], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @vtnet_rx_filter(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.vtnet_softc, ptr %0, i64 0, i32 1
%3 = load i32, ptr %2, align 8, !tbaa !5
%4 = load ptr, ptr %0, align 8, !tbaa !11
%5 = tail call i32 @VTNET_CORE_LOCK_ASSERT(ptr noundef nonnull %0) #2
%6 = load i32, ptr %4, align 4, !tbaa !12
%7 = load i32, ptr @IFF_PROMISC, align 4, !tbaa !14
%8 = and i32 %7, %6
%9 = tail call i64 @vtnet_set_promisc(ptr noundef nonnull %0, i32 noundef %8) #2
%10 = icmp eq i64 %9, 0
br i1 %10, label %18, label %11
11: ; preds = %1
%12 = load i32, ptr %4, align 4, !tbaa !12
%13 = load i32, ptr @IFF_PROMISC, align 4, !tbaa !14
%14 = and i32 %13, %12
%15 = icmp eq i32 %14, 0
%16 = select i1 %15, ptr @.str.2, ptr @.str.1
%17 = tail call i32 @device_printf(i32 noundef %3, ptr noundef nonnull @.str, ptr noundef nonnull %16) #2
br label %18
18: ; preds = %11, %1
%19 = load i32, ptr %4, align 4, !tbaa !12
%20 = load i32, ptr @IFF_ALLMULTI, align 4, !tbaa !14
%21 = and i32 %20, %19
%22 = tail call i64 @vtnet_set_allmulti(ptr noundef nonnull %0, i32 noundef %21) #2
%23 = icmp eq i64 %22, 0
br i1 %23, label %31, label %24
24: ; preds = %18
%25 = load i32, ptr %4, align 4, !tbaa !12
%26 = load i32, ptr @IFF_ALLMULTI, align 4, !tbaa !14
%27 = and i32 %26, %25
%28 = icmp eq i32 %27, 0
%29 = select i1 %28, ptr @.str.2, ptr @.str.1
%30 = tail call i32 @device_printf(i32 noundef %3, ptr noundef nonnull @.str.3, ptr noundef nonnull %29) #2
br label %31
31: ; preds = %24, %18
ret void
}
declare i32 @VTNET_CORE_LOCK_ASSERT(ptr noundef) local_unnamed_addr #1
declare i64 @vtnet_set_promisc(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_printf(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @vtnet_set_allmulti(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"vtnet_softc", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!13, !10, i64 0}
!13 = !{!"ifnet", !10, i64 0}
!14 = !{!10, !10, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/virtio/network/extr_if_vtnet.c_vtnet_rx_filter.c'
source_filename = "AnghaBench/freebsd/sys/dev/virtio/network/extr_if_vtnet.c_vtnet_rx_filter.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IFF_PROMISC = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [28 x i8] c"cannot %s promiscuous mode\0A\00", align 1
@.str.1 = private unnamed_addr constant [7 x i8] c"enable\00", align 1
@.str.2 = private unnamed_addr constant [8 x i8] c"disable\00", align 1
@IFF_ALLMULTI = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [30 x i8] c"cannot %s all-multicast mode\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @vtnet_rx_filter], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @vtnet_rx_filter(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load i32, ptr %2, align 8, !tbaa !6
%4 = load ptr, ptr %0, align 8, !tbaa !12
%5 = tail call i32 @VTNET_CORE_LOCK_ASSERT(ptr noundef nonnull %0) #2
%6 = load i32, ptr %4, align 4, !tbaa !13
%7 = load i32, ptr @IFF_PROMISC, align 4, !tbaa !15
%8 = and i32 %7, %6
%9 = tail call i64 @vtnet_set_promisc(ptr noundef nonnull %0, i32 noundef %8) #2
%10 = icmp eq i64 %9, 0
br i1 %10, label %18, label %11
11: ; preds = %1
%12 = load i32, ptr %4, align 4, !tbaa !13
%13 = load i32, ptr @IFF_PROMISC, align 4, !tbaa !15
%14 = and i32 %13, %12
%15 = icmp eq i32 %14, 0
%16 = select i1 %15, ptr @.str.2, ptr @.str.1
%17 = tail call i32 @device_printf(i32 noundef %3, ptr noundef nonnull @.str, ptr noundef nonnull %16) #2
br label %18
18: ; preds = %11, %1
%19 = load i32, ptr %4, align 4, !tbaa !13
%20 = load i32, ptr @IFF_ALLMULTI, align 4, !tbaa !15
%21 = and i32 %20, %19
%22 = tail call i64 @vtnet_set_allmulti(ptr noundef nonnull %0, i32 noundef %21) #2
%23 = icmp eq i64 %22, 0
br i1 %23, label %31, label %24
24: ; preds = %18
%25 = load i32, ptr %4, align 4, !tbaa !13
%26 = load i32, ptr @IFF_ALLMULTI, align 4, !tbaa !15
%27 = and i32 %26, %25
%28 = icmp eq i32 %27, 0
%29 = select i1 %28, ptr @.str.2, ptr @.str.1
%30 = tail call i32 @device_printf(i32 noundef %3, ptr noundef nonnull @.str.3, ptr noundef nonnull %29) #2
br label %31
31: ; preds = %24, %18
ret void
}
declare i32 @VTNET_CORE_LOCK_ASSERT(ptr noundef) local_unnamed_addr #1
declare i64 @vtnet_set_promisc(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_printf(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @vtnet_set_allmulti(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"vtnet_softc", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"ifnet", !11, i64 0}
!15 = !{!11, !11, i64 0}
| freebsd_sys_dev_virtio_network_extr_if_vtnet.c_vtnet_rx_filter |
; ModuleID = 'AnghaBench/git/vcs-svn/extr_fast_export.c_fast_export_delete.c'
source_filename = "AnghaBench/git/vcs-svn/extr_fast_export.c_fast_export_delete.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@stdout = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @fast_export_delete(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @putchar(i8 noundef signext 68) #2
%3 = tail call i32 @putchar(i8 noundef signext 32) #2
%4 = load i32, ptr @stdout, align 4, !tbaa !5
%5 = tail call i32 @quote_c_style(ptr noundef %0, ptr noundef null, i32 noundef %4, i32 noundef 0) #2
%6 = tail call i32 @putchar(i8 noundef signext 10) #2
ret void
}
declare i32 @putchar(i8 noundef signext) local_unnamed_addr #1
declare i32 @quote_c_style(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/git/vcs-svn/extr_fast_export.c_fast_export_delete.c'
source_filename = "AnghaBench/git/vcs-svn/extr_fast_export.c_fast_export_delete.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@stdout = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @fast_export_delete(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @putchar(i8 noundef signext 68) #2
%3 = tail call i32 @putchar(i8 noundef signext 32) #2
%4 = load i32, ptr @stdout, align 4, !tbaa !6
%5 = tail call i32 @quote_c_style(ptr noundef %0, ptr noundef null, i32 noundef %4, i32 noundef 0) #2
%6 = tail call i32 @putchar(i8 noundef signext 10) #2
ret void
}
declare i32 @putchar(i8 noundef signext) local_unnamed_addr #1
declare i32 @quote_c_style(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| git_vcs-svn_extr_fast_export.c_fast_export_delete |
; ModuleID = 'AnghaBench/linux/net/sched/extr_sch_hhf.c_hhf_classify.c'
source_filename = "AnghaBench/linux/net/sched/extr_sch_hhf.c_hhf_classify.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.hhf_sched_data = type { i64, i64, ptr, i64, i32, ptr, ptr, i32 }
%struct.hh_flow_state = type { i64, i64 }
@HHF_ARRAYS_CNT = dso_local local_unnamed_addr global i32 0, align 4
@HHF_ARRAYS_LEN = dso_local local_unnamed_addr global i32 0, align 4
@HHF_BIT_MASK = dso_local local_unnamed_addr global i64 0, align 8
@WDRR_BUCKET_FOR_HH = dso_local local_unnamed_addr global i32 0, align 4
@HHF_BIT_MASK_LEN = dso_local local_unnamed_addr global i64 0, align 8
@WDRR_BUCKET_FOR_NON_HH = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @hhf_classify], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @hhf_classify(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call ptr @qdisc_priv(ptr noundef %1) #3
%4 = load i32, ptr @HHF_ARRAYS_CNT, align 4, !tbaa !5
%5 = zext i32 %4 to i64
%6 = alloca i64, i64 %5, align 16
%7 = tail call i64 (...) @hhf_time_stamp() #3
%8 = load i64, ptr %3, align 8, !tbaa !9
%9 = getelementptr inbounds %struct.hhf_sched_data, ptr %3, i64 0, i32 1
%10 = load i64, ptr %9, align 8, !tbaa !13
%11 = add i64 %10, %8
%12 = tail call i64 @hhf_time_before(i64 noundef %11, i64 noundef %7) #3
%13 = icmp eq i64 %12, 0
br i1 %13, label %31, label %14
14: ; preds = %2
%15 = load i32, ptr @HHF_ARRAYS_CNT, align 4, !tbaa !5
%16 = icmp sgt i32 %15, 0
br i1 %16, label %17, label %30
17: ; preds = %14
%18 = getelementptr inbounds %struct.hhf_sched_data, ptr %3, i64 0, i32 6
br label %19
19: ; preds = %17, %19
%20 = phi i64 [ 0, %17 ], [ %26, %19 ]
%21 = load ptr, ptr %18, align 8, !tbaa !14
%22 = getelementptr inbounds i32, ptr %21, i64 %20
%23 = load i32, ptr %22, align 4, !tbaa !5
%24 = load i32, ptr @HHF_ARRAYS_LEN, align 4, !tbaa !5
%25 = tail call i32 @bitmap_zero(i32 noundef %23, i32 noundef %24) #3
%26 = add nuw nsw i64 %20, 1
%27 = load i32, ptr @HHF_ARRAYS_CNT, align 4, !tbaa !5
%28 = sext i32 %27 to i64
%29 = icmp slt i64 %26, %28
br i1 %29, label %19, label %30, !llvm.loop !15
30: ; preds = %19, %14
store i64 %7, ptr %3, align 8, !tbaa !9
br label %31
31: ; preds = %30, %2
%32 = getelementptr inbounds %struct.hhf_sched_data, ptr %3, i64 0, i32 7
%33 = tail call i64 @skb_get_hash_perturb(ptr noundef %0, ptr noundef nonnull %32) #3
%34 = load i64, ptr @HHF_BIT_MASK, align 8, !tbaa !17
%35 = and i64 %34, %33
%36 = getelementptr inbounds %struct.hhf_sched_data, ptr %3, i64 0, i32 5
%37 = load ptr, ptr %36, align 8, !tbaa !18
%38 = getelementptr inbounds i32, ptr %37, i64 %35
%39 = tail call ptr @seek_list(i64 noundef %33, ptr noundef %38, ptr noundef nonnull %3) #3
%40 = icmp eq ptr %39, null
br i1 %40, label %41, label %54
41: ; preds = %31
%42 = load i32, ptr @HHF_ARRAYS_CNT, align 4, !tbaa !5
%43 = add i32 %42, -1
%44 = icmp sgt i32 %42, 1
br i1 %44, label %45, label %101
45: ; preds = %41
%46 = load i64, ptr @HHF_BIT_MASK, align 8, !tbaa !17
%47 = load i64, ptr @HHF_BIT_MASK_LEN, align 8, !tbaa !17
%48 = zext nneg i32 %43 to i64
%49 = add nsw i64 %48, -1
%50 = and i64 %48, 3
%51 = icmp ult i64 %49, 3
br i1 %51, label %82, label %52
52: ; preds = %45
%53 = and i64 %48, 2147483644
br label %55
54: ; preds = %31
store i64 %7, ptr %39, align 8, !tbaa !19
br label %207
55: ; preds = %55, %52
%56 = phi i64 [ 0, %52 ], [ %79, %55 ]
%57 = phi i64 [ %33, %52 ], [ %78, %55 ]
%58 = phi i64 [ 0, %52 ], [ %77, %55 ]
%59 = phi i64 [ 0, %52 ], [ %80, %55 ]
%60 = and i64 %46, %57
%61 = getelementptr inbounds i64, ptr %6, i64 %56
store i64 %60, ptr %61, align 16, !tbaa !17
%62 = xor i64 %60, %58
%63 = lshr i64 %57, %47
%64 = or disjoint i64 %56, 1
%65 = and i64 %46, %63
%66 = getelementptr inbounds i64, ptr %6, i64 %64
store i64 %65, ptr %66, align 8, !tbaa !17
%67 = xor i64 %65, %62
%68 = lshr i64 %63, %47
%69 = or disjoint i64 %56, 2
%70 = and i64 %46, %68
%71 = getelementptr inbounds i64, ptr %6, i64 %69
store i64 %70, ptr %71, align 16, !tbaa !17
%72 = xor i64 %70, %67
%73 = lshr i64 %68, %47
%74 = or disjoint i64 %56, 3
%75 = and i64 %46, %73
%76 = getelementptr inbounds i64, ptr %6, i64 %74
store i64 %75, ptr %76, align 8, !tbaa !17
%77 = xor i64 %75, %72
%78 = lshr i64 %73, %47
%79 = add nuw nsw i64 %56, 4
%80 = add i64 %59, 4
%81 = icmp eq i64 %80, %53
br i1 %81, label %82, label %55, !llvm.loop !21
82: ; preds = %55, %45
%83 = phi i64 [ undef, %45 ], [ %77, %55 ]
%84 = phi i64 [ undef, %45 ], [ %78, %55 ]
%85 = phi i64 [ 0, %45 ], [ %79, %55 ]
%86 = phi i64 [ %33, %45 ], [ %78, %55 ]
%87 = phi i64 [ 0, %45 ], [ %77, %55 ]
%88 = icmp eq i64 %50, 0
br i1 %88, label %101, label %89
89: ; preds = %82, %89
%90 = phi i64 [ %98, %89 ], [ %85, %82 ]
%91 = phi i64 [ %97, %89 ], [ %86, %82 ]
%92 = phi i64 [ %96, %89 ], [ %87, %82 ]
%93 = phi i64 [ %99, %89 ], [ 0, %82 ]
%94 = and i64 %46, %91
%95 = getelementptr inbounds i64, ptr %6, i64 %90
store i64 %94, ptr %95, align 8, !tbaa !17
%96 = xor i64 %94, %92
%97 = lshr i64 %91, %47
%98 = add nuw nsw i64 %90, 1
%99 = add i64 %93, 1
%100 = icmp eq i64 %99, %50
br i1 %100, label %101, label %89, !llvm.loop !22
101: ; preds = %82, %89, %41
%102 = phi i64 [ 0, %41 ], [ %83, %82 ], [ %96, %89 ]
%103 = phi i64 [ %33, %41 ], [ %84, %82 ], [ %97, %89 ]
%104 = xor i64 %103, %102
%105 = sext i32 %43 to i64
%106 = getelementptr inbounds i64, ptr %6, i64 %105
store i64 %104, ptr %106, align 8, !tbaa !17
%107 = tail call i64 @qdisc_pkt_len(ptr noundef %0) #3
%108 = load i32, ptr @HHF_ARRAYS_CNT, align 4, !tbaa !5
%109 = icmp sgt i32 %108, 0
br i1 %109, label %110, label %144
110: ; preds = %101
%111 = getelementptr inbounds %struct.hhf_sched_data, ptr %3, i64 0, i32 6
%112 = getelementptr inbounds %struct.hhf_sched_data, ptr %3, i64 0, i32 2
br label %113
113: ; preds = %110, %132
%114 = phi i64 [ 0, %110 ], [ %140, %132 ]
%115 = phi i64 [ 4294967295, %110 ], [ %139, %132 ]
%116 = getelementptr inbounds i64, ptr %6, i64 %114
%117 = load i64, ptr %116, align 8, !tbaa !17
%118 = load ptr, ptr %111, align 8, !tbaa !14
%119 = getelementptr inbounds i32, ptr %118, i64 %114
%120 = load i32, ptr %119, align 4, !tbaa !5
%121 = tail call i32 @test_bit(i64 noundef %117, i32 noundef %120) #3
%122 = icmp eq i32 %121, 0
br i1 %122, label %123, label %132
123: ; preds = %113
%124 = load ptr, ptr %112, align 8, !tbaa !24
%125 = getelementptr inbounds ptr, ptr %124, i64 %114
%126 = load ptr, ptr %125, align 8, !tbaa !25
%127 = getelementptr inbounds i64, ptr %126, i64 %117
store i64 0, ptr %127, align 8, !tbaa !17
%128 = load ptr, ptr %111, align 8, !tbaa !14
%129 = getelementptr inbounds i32, ptr %128, i64 %114
%130 = load i32, ptr %129, align 4, !tbaa !5
%131 = tail call i32 @__set_bit(i64 noundef %117, i32 noundef %130) #3
br label %132
132: ; preds = %123, %113
%133 = load ptr, ptr %112, align 8, !tbaa !24
%134 = getelementptr inbounds ptr, ptr %133, i64 %114
%135 = load ptr, ptr %134, align 8, !tbaa !25
%136 = getelementptr inbounds i64, ptr %135, i64 %117
%137 = load i64, ptr %136, align 8, !tbaa !17
%138 = add i64 %137, %107
%139 = tail call i64 @llvm.umin.i64(i64 %115, i64 %138)
%140 = add nuw nsw i64 %114, 1
%141 = load i32, ptr @HHF_ARRAYS_CNT, align 4, !tbaa !5
%142 = sext i32 %141 to i64
%143 = icmp slt i64 %140, %142
br i1 %143, label %113, label %144, !llvm.loop !26
144: ; preds = %132, %101
%145 = phi i64 [ 4294967295, %101 ], [ %139, %132 ]
%146 = phi i32 [ %108, %101 ], [ %141, %132 ]
%147 = getelementptr inbounds %struct.hhf_sched_data, ptr %3, i64 0, i32 3
%148 = load i64, ptr %147, align 8, !tbaa !27
%149 = icmp ugt i64 %145, %148
br i1 %149, label %160, label %150
150: ; preds = %144
%151 = icmp sgt i32 %146, 0
br i1 %151, label %152, label %207
152: ; preds = %150
%153 = getelementptr inbounds %struct.hhf_sched_data, ptr %3, i64 0, i32 2
%154 = load ptr, ptr %153, align 8, !tbaa !24
%155 = zext nneg i32 %146 to i64
%156 = and i64 %155, 1
%157 = icmp eq i32 %146, 1
br i1 %157, label %195, label %158
158: ; preds = %152
%159 = and i64 %155, 2147483646
br label %170
160: ; preds = %144
%161 = load ptr, ptr %36, align 8, !tbaa !18
%162 = getelementptr inbounds i32, ptr %161, i64 %35
%163 = tail call ptr @alloc_new_hh(ptr noundef %162, ptr noundef nonnull %3) #3
%164 = icmp eq ptr %163, null
br i1 %164, label %207, label %165
165: ; preds = %160
%166 = getelementptr inbounds %struct.hh_flow_state, ptr %163, i64 0, i32 1
store i64 %33, ptr %166, align 8, !tbaa !28
store i64 %7, ptr %163, align 8, !tbaa !19
%167 = getelementptr inbounds %struct.hhf_sched_data, ptr %3, i64 0, i32 4
%168 = load i32, ptr %167, align 8, !tbaa !29
%169 = add nsw i32 %168, 1
store i32 %169, ptr %167, align 8, !tbaa !29
br label %207
170: ; preds = %191, %158
%171 = phi i64 [ 0, %158 ], [ %192, %191 ]
%172 = phi i64 [ 0, %158 ], [ %193, %191 ]
%173 = getelementptr inbounds ptr, ptr %154, i64 %171
%174 = load ptr, ptr %173, align 8, !tbaa !25
%175 = getelementptr inbounds i64, ptr %6, i64 %171
%176 = load i64, ptr %175, align 16, !tbaa !17
%177 = getelementptr inbounds i64, ptr %174, i64 %176
%178 = load i64, ptr %177, align 8, !tbaa !17
%179 = icmp ult i64 %178, %145
br i1 %179, label %180, label %181
180: ; preds = %170
store i64 %145, ptr %177, align 8, !tbaa !17
br label %181
181: ; preds = %170, %180
%182 = or disjoint i64 %171, 1
%183 = getelementptr inbounds ptr, ptr %154, i64 %182
%184 = load ptr, ptr %183, align 8, !tbaa !25
%185 = getelementptr inbounds i64, ptr %6, i64 %182
%186 = load i64, ptr %185, align 8, !tbaa !17
%187 = getelementptr inbounds i64, ptr %184, i64 %186
%188 = load i64, ptr %187, align 8, !tbaa !17
%189 = icmp ult i64 %188, %145
br i1 %189, label %190, label %191
190: ; preds = %181
store i64 %145, ptr %187, align 8, !tbaa !17
br label %191
191: ; preds = %190, %181
%192 = add nuw nsw i64 %171, 2
%193 = add i64 %172, 2
%194 = icmp eq i64 %193, %159
br i1 %194, label %195, label %170, !llvm.loop !30
195: ; preds = %191, %152
%196 = phi i64 [ 0, %152 ], [ %192, %191 ]
%197 = icmp eq i64 %156, 0
br i1 %197, label %207, label %198
198: ; preds = %195
%199 = getelementptr inbounds ptr, ptr %154, i64 %196
%200 = load ptr, ptr %199, align 8, !tbaa !25
%201 = getelementptr inbounds i64, ptr %6, i64 %196
%202 = load i64, ptr %201, align 8, !tbaa !17
%203 = getelementptr inbounds i64, ptr %200, i64 %202
%204 = load i64, ptr %203, align 8, !tbaa !17
%205 = icmp ult i64 %204, %145
br i1 %205, label %206, label %207
206: ; preds = %198
store i64 %145, ptr %203, align 8, !tbaa !17
br label %207
207: ; preds = %195, %206, %198, %150, %160, %165, %54
%208 = phi ptr [ @WDRR_BUCKET_FOR_HH, %54 ], [ @WDRR_BUCKET_FOR_HH, %165 ], [ @WDRR_BUCKET_FOR_NON_HH, %160 ], [ @WDRR_BUCKET_FOR_NON_HH, %150 ], [ @WDRR_BUCKET_FOR_NON_HH, %198 ], [ @WDRR_BUCKET_FOR_NON_HH, %206 ], [ @WDRR_BUCKET_FOR_NON_HH, %195 ]
%209 = load i32, ptr %208, align 4, !tbaa !5
ret i32 %209
}
declare ptr @qdisc_priv(ptr noundef) local_unnamed_addr #1
declare i64 @hhf_time_stamp(...) local_unnamed_addr #1
declare i64 @hhf_time_before(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @bitmap_zero(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @skb_get_hash_perturb(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @seek_list(i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @qdisc_pkt_len(ptr noundef) local_unnamed_addr #1
declare i32 @test_bit(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__set_bit(i64 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @alloc_new_hh(ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umin.i64(i64, i64) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"hhf_sched_data", !11, i64 0, !11, i64 8, !12, i64 16, !11, i64 24, !6, i64 32, !12, i64 40, !12, i64 48, !6, i64 56}
!11 = !{!"long", !7, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!10, !11, i64 8}
!14 = !{!10, !12, i64 48}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!11, !11, i64 0}
!18 = !{!10, !12, i64 40}
!19 = !{!20, !11, i64 0}
!20 = !{!"hh_flow_state", !11, i64 0, !11, i64 8}
!21 = distinct !{!21, !16}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.unroll.disable"}
!24 = !{!10, !12, i64 16}
!25 = !{!12, !12, i64 0}
!26 = distinct !{!26, !16}
!27 = !{!10, !11, i64 24}
!28 = !{!20, !11, i64 8}
!29 = !{!10, !6, i64 32}
!30 = distinct !{!30, !16}
| ; ModuleID = 'AnghaBench/linux/net/sched/extr_sch_hhf.c_hhf_classify.c'
source_filename = "AnghaBench/linux/net/sched/extr_sch_hhf.c_hhf_classify.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@HHF_ARRAYS_CNT = common local_unnamed_addr global i32 0, align 4
@HHF_ARRAYS_LEN = common local_unnamed_addr global i32 0, align 4
@HHF_BIT_MASK = common local_unnamed_addr global i64 0, align 8
@WDRR_BUCKET_FOR_HH = common local_unnamed_addr global i32 0, align 4
@HHF_BIT_MASK_LEN = common local_unnamed_addr global i64 0, align 8
@WDRR_BUCKET_FOR_NON_HH = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @hhf_classify], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @hhf_classify(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call ptr @qdisc_priv(ptr noundef %1) #3
%4 = load i32, ptr @HHF_ARRAYS_CNT, align 4, !tbaa !6
%5 = zext i32 %4 to i64
%6 = alloca i64, i64 %5, align 8
%7 = tail call i64 @hhf_time_stamp() #3
%8 = load i64, ptr %3, align 8, !tbaa !10
%9 = getelementptr inbounds i8, ptr %3, i64 8
%10 = load i64, ptr %9, align 8, !tbaa !14
%11 = add i64 %10, %8
%12 = tail call i64 @hhf_time_before(i64 noundef %11, i64 noundef %7) #3
%13 = icmp eq i64 %12, 0
br i1 %13, label %31, label %14
14: ; preds = %2
%15 = load i32, ptr @HHF_ARRAYS_CNT, align 4, !tbaa !6
%16 = icmp sgt i32 %15, 0
br i1 %16, label %17, label %30
17: ; preds = %14
%18 = getelementptr inbounds i8, ptr %3, i64 48
br label %19
19: ; preds = %17, %19
%20 = phi i64 [ 0, %17 ], [ %26, %19 ]
%21 = load ptr, ptr %18, align 8, !tbaa !15
%22 = getelementptr inbounds i32, ptr %21, i64 %20
%23 = load i32, ptr %22, align 4, !tbaa !6
%24 = load i32, ptr @HHF_ARRAYS_LEN, align 4, !tbaa !6
%25 = tail call i32 @bitmap_zero(i32 noundef %23, i32 noundef %24) #3
%26 = add nuw nsw i64 %20, 1
%27 = load i32, ptr @HHF_ARRAYS_CNT, align 4, !tbaa !6
%28 = sext i32 %27 to i64
%29 = icmp slt i64 %26, %28
br i1 %29, label %19, label %30, !llvm.loop !16
30: ; preds = %19, %14
store i64 %7, ptr %3, align 8, !tbaa !10
br label %31
31: ; preds = %30, %2
%32 = getelementptr inbounds i8, ptr %3, i64 56
%33 = tail call i64 @skb_get_hash_perturb(ptr noundef %0, ptr noundef nonnull %32) #3
%34 = load i64, ptr @HHF_BIT_MASK, align 8, !tbaa !18
%35 = and i64 %34, %33
%36 = getelementptr inbounds i8, ptr %3, i64 40
%37 = load ptr, ptr %36, align 8, !tbaa !19
%38 = getelementptr inbounds i32, ptr %37, i64 %35
%39 = tail call ptr @seek_list(i64 noundef %33, ptr noundef %38, ptr noundef nonnull %3) #3
%40 = icmp eq ptr %39, null
br i1 %40, label %41, label %49
41: ; preds = %31
%42 = load i32, ptr @HHF_ARRAYS_CNT, align 4, !tbaa !6
%43 = add i32 %42, -1
%44 = icmp sgt i32 %42, 1
br i1 %44, label %45, label %60
45: ; preds = %41
%46 = load i64, ptr @HHF_BIT_MASK, align 8, !tbaa !18
%47 = load i64, ptr @HHF_BIT_MASK_LEN, align 8, !tbaa !18
%48 = zext nneg i32 %43 to i64
br label %50
49: ; preds = %31
store i64 %7, ptr %39, align 8, !tbaa !20
br label %138
50: ; preds = %45, %50
%51 = phi i64 [ 0, %45 ], [ %58, %50 ]
%52 = phi i64 [ %33, %45 ], [ %57, %50 ]
%53 = phi i64 [ 0, %45 ], [ %56, %50 ]
%54 = and i64 %46, %52
%55 = getelementptr inbounds i64, ptr %6, i64 %51
store i64 %54, ptr %55, align 8, !tbaa !18
%56 = xor i64 %54, %53
%57 = lshr i64 %52, %47
%58 = add nuw nsw i64 %51, 1
%59 = icmp eq i64 %58, %48
br i1 %59, label %60, label %50, !llvm.loop !22
60: ; preds = %50, %41
%61 = phi i64 [ 0, %41 ], [ %56, %50 ]
%62 = phi i64 [ %33, %41 ], [ %57, %50 ]
%63 = xor i64 %62, %61
%64 = sext i32 %43 to i64
%65 = getelementptr inbounds i64, ptr %6, i64 %64
store i64 %63, ptr %65, align 8, !tbaa !18
%66 = tail call i64 @qdisc_pkt_len(ptr noundef %0) #3
%67 = load i32, ptr @HHF_ARRAYS_CNT, align 4, !tbaa !6
%68 = icmp sgt i32 %67, 0
br i1 %68, label %69, label %103
69: ; preds = %60
%70 = getelementptr inbounds i8, ptr %3, i64 48
%71 = getelementptr inbounds i8, ptr %3, i64 16
br label %72
72: ; preds = %69, %91
%73 = phi i64 [ 0, %69 ], [ %99, %91 ]
%74 = phi i64 [ 4294967295, %69 ], [ %98, %91 ]
%75 = getelementptr inbounds i64, ptr %6, i64 %73
%76 = load i64, ptr %75, align 8, !tbaa !18
%77 = load ptr, ptr %70, align 8, !tbaa !15
%78 = getelementptr inbounds i32, ptr %77, i64 %73
%79 = load i32, ptr %78, align 4, !tbaa !6
%80 = tail call i32 @test_bit(i64 noundef %76, i32 noundef %79) #3
%81 = icmp eq i32 %80, 0
br i1 %81, label %82, label %91
82: ; preds = %72
%83 = load ptr, ptr %71, align 8, !tbaa !23
%84 = getelementptr inbounds ptr, ptr %83, i64 %73
%85 = load ptr, ptr %84, align 8, !tbaa !24
%86 = getelementptr inbounds i64, ptr %85, i64 %76
store i64 0, ptr %86, align 8, !tbaa !18
%87 = load ptr, ptr %70, align 8, !tbaa !15
%88 = getelementptr inbounds i32, ptr %87, i64 %73
%89 = load i32, ptr %88, align 4, !tbaa !6
%90 = tail call i32 @__set_bit(i64 noundef %76, i32 noundef %89) #3
br label %91
91: ; preds = %82, %72
%92 = load ptr, ptr %71, align 8, !tbaa !23
%93 = getelementptr inbounds ptr, ptr %92, i64 %73
%94 = load ptr, ptr %93, align 8, !tbaa !24
%95 = getelementptr inbounds i64, ptr %94, i64 %76
%96 = load i64, ptr %95, align 8, !tbaa !18
%97 = add i64 %96, %66
%98 = tail call i64 @llvm.umin.i64(i64 %74, i64 %97)
%99 = add nuw nsw i64 %73, 1
%100 = load i32, ptr @HHF_ARRAYS_CNT, align 4, !tbaa !6
%101 = sext i32 %100 to i64
%102 = icmp slt i64 %99, %101
br i1 %102, label %72, label %103, !llvm.loop !25
103: ; preds = %91, %60
%104 = phi i64 [ 4294967295, %60 ], [ %98, %91 ]
%105 = phi i32 [ %67, %60 ], [ %100, %91 ]
%106 = getelementptr inbounds i8, ptr %3, i64 24
%107 = load i64, ptr %106, align 8, !tbaa !26
%108 = icmp ugt i64 %104, %107
br i1 %108, label %115, label %109
109: ; preds = %103
%110 = icmp sgt i32 %105, 0
br i1 %110, label %111, label %138
111: ; preds = %109
%112 = getelementptr inbounds i8, ptr %3, i64 16
%113 = load ptr, ptr %112, align 8, !tbaa !23
%114 = zext nneg i32 %105 to i64
br label %125
115: ; preds = %103
%116 = load ptr, ptr %36, align 8, !tbaa !19
%117 = getelementptr inbounds i32, ptr %116, i64 %35
%118 = tail call ptr @alloc_new_hh(ptr noundef %117, ptr noundef nonnull %3) #3
%119 = icmp eq ptr %118, null
br i1 %119, label %138, label %120
120: ; preds = %115
%121 = getelementptr inbounds i8, ptr %118, i64 8
store i64 %33, ptr %121, align 8, !tbaa !27
store i64 %7, ptr %118, align 8, !tbaa !20
%122 = getelementptr inbounds i8, ptr %3, i64 32
%123 = load i32, ptr %122, align 8, !tbaa !28
%124 = add nsw i32 %123, 1
store i32 %124, ptr %122, align 8, !tbaa !28
br label %138
125: ; preds = %111, %135
%126 = phi i64 [ 0, %111 ], [ %136, %135 ]
%127 = getelementptr inbounds ptr, ptr %113, i64 %126
%128 = load ptr, ptr %127, align 8, !tbaa !24
%129 = getelementptr inbounds i64, ptr %6, i64 %126
%130 = load i64, ptr %129, align 8, !tbaa !18
%131 = getelementptr inbounds i64, ptr %128, i64 %130
%132 = load i64, ptr %131, align 8, !tbaa !18
%133 = icmp ult i64 %132, %104
br i1 %133, label %134, label %135
134: ; preds = %125
store i64 %104, ptr %131, align 8, !tbaa !18
br label %135
135: ; preds = %125, %134
%136 = add nuw nsw i64 %126, 1
%137 = icmp eq i64 %136, %114
br i1 %137, label %138, label %125, !llvm.loop !29
138: ; preds = %135, %109, %115, %120, %49
%139 = phi ptr [ @WDRR_BUCKET_FOR_HH, %49 ], [ @WDRR_BUCKET_FOR_HH, %120 ], [ @WDRR_BUCKET_FOR_NON_HH, %115 ], [ @WDRR_BUCKET_FOR_NON_HH, %109 ], [ @WDRR_BUCKET_FOR_NON_HH, %135 ]
%140 = load i32, ptr %139, align 4, !tbaa !6
ret i32 %140
}
declare ptr @qdisc_priv(ptr noundef) local_unnamed_addr #1
declare i64 @hhf_time_stamp(...) local_unnamed_addr #1
declare i64 @hhf_time_before(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @bitmap_zero(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @skb_get_hash_perturb(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @seek_list(i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @qdisc_pkt_len(ptr noundef) local_unnamed_addr #1
declare i32 @test_bit(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__set_bit(i64 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @alloc_new_hh(ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umin.i64(i64, i64) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"hhf_sched_data", !12, i64 0, !12, i64 8, !13, i64 16, !12, i64 24, !7, i64 32, !13, i64 40, !13, i64 48, !7, i64 56}
!12 = !{!"long", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!11, !12, i64 8}
!15 = !{!11, !13, i64 48}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!12, !12, i64 0}
!19 = !{!11, !13, i64 40}
!20 = !{!21, !12, i64 0}
!21 = !{!"hh_flow_state", !12, i64 0, !12, i64 8}
!22 = distinct !{!22, !17}
!23 = !{!11, !13, i64 16}
!24 = !{!13, !13, i64 0}
!25 = distinct !{!25, !17}
!26 = !{!11, !12, i64 24}
!27 = !{!21, !12, i64 8}
!28 = !{!11, !7, i64 32}
!29 = distinct !{!29, !17}
| linux_net_sched_extr_sch_hhf.c_hhf_classify |
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Admin.c_StDelLicenseKey.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Admin.c_StDelLicenseKey.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ERR_NOT_SUPPORTED = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define dso_local i32 @StDelLicenseKey(ptr nocapture noundef readnone %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 {
%3 = load i32, ptr @ERR_NOT_SUPPORTED, align 4, !tbaa !5
ret i32 %3
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Admin.c_StDelLicenseKey.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Admin.c_StDelLicenseKey.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ERR_NOT_SUPPORTED = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define i32 @StDelLicenseKey(ptr nocapture noundef readnone %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 {
%3 = load i32, ptr @ERR_NOT_SUPPORTED, align 4, !tbaa !6
ret i32 %3
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| SoftEtherVPN_src_Cedar_extr_Admin.c_StDelLicenseKey |
; ModuleID = 'AnghaBench/linux/drivers/watchdog/extr_ar7_wdt.c_ar7_wdt_disable.c'
source_filename = "AnghaBench/linux/drivers/watchdog/extr_ar7_wdt.c_ar7_wdt_disable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, i32 }
@ar7_wdt = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [34 x i8] c"failed to unlock WDT disable reg\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @ar7_wdt_disable], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ar7_wdt_disable(i32 noundef %0) #0 {
%2 = load ptr, ptr @ar7_wdt, align 8, !tbaa !5
%3 = getelementptr inbounds %struct.TYPE_2__, ptr %2, i64 0, i32 1
%4 = load i32, ptr %3, align 4, !tbaa !9
%5 = tail call i32 @WRITE_REG(i32 noundef %4, i32 noundef 30583) #2
%6 = load ptr, ptr @ar7_wdt, align 8, !tbaa !5
%7 = getelementptr inbounds %struct.TYPE_2__, ptr %6, i64 0, i32 1
%8 = load i32, ptr %7, align 4, !tbaa !9
%9 = tail call i32 @READ_REG(i32 noundef %8) #2
%10 = and i32 %9, 3
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %38
12: ; preds = %1
%13 = load ptr, ptr @ar7_wdt, align 8, !tbaa !5
%14 = getelementptr inbounds %struct.TYPE_2__, ptr %13, i64 0, i32 1
%15 = load i32, ptr %14, align 4, !tbaa !9
%16 = tail call i32 @WRITE_REG(i32 noundef %15, i32 noundef 52428) #2
%17 = load ptr, ptr @ar7_wdt, align 8, !tbaa !5
%18 = getelementptr inbounds %struct.TYPE_2__, ptr %17, i64 0, i32 1
%19 = load i32, ptr %18, align 4, !tbaa !9
%20 = tail call i32 @READ_REG(i32 noundef %19) #2
%21 = and i32 %20, 3
%22 = icmp eq i32 %21, 2
br i1 %22, label %23, label %38
23: ; preds = %12
%24 = load ptr, ptr @ar7_wdt, align 8, !tbaa !5
%25 = getelementptr inbounds %struct.TYPE_2__, ptr %24, i64 0, i32 1
%26 = load i32, ptr %25, align 4, !tbaa !9
%27 = tail call i32 @WRITE_REG(i32 noundef %26, i32 noundef 56797) #2
%28 = load ptr, ptr @ar7_wdt, align 8, !tbaa !5
%29 = getelementptr inbounds %struct.TYPE_2__, ptr %28, i64 0, i32 1
%30 = load i32, ptr %29, align 4, !tbaa !9
%31 = tail call i32 @READ_REG(i32 noundef %30) #2
%32 = and i32 %31, 3
%33 = icmp eq i32 %32, 3
br i1 %33, label %34, label %38
34: ; preds = %23
%35 = load ptr, ptr @ar7_wdt, align 8, !tbaa !5
%36 = load i32, ptr %35, align 4, !tbaa !12
%37 = tail call i32 @WRITE_REG(i32 noundef %36, i32 noundef %0) #2
br label %40
38: ; preds = %12, %23, %1
%39 = tail call i32 @pr_err(ptr noundef nonnull @.str) #2
br label %40
40: ; preds = %38, %34
ret void
}
declare i32 @WRITE_REG(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @READ_REG(i32 noundef) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 4}
!10 = !{!"TYPE_2__", !11, i64 0, !11, i64 4}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/watchdog/extr_ar7_wdt.c_ar7_wdt_disable.c'
source_filename = "AnghaBench/linux/drivers/watchdog/extr_ar7_wdt.c_ar7_wdt_disable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ar7_wdt = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [34 x i8] c"failed to unlock WDT disable reg\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ar7_wdt_disable], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ar7_wdt_disable(i32 noundef %0) #0 {
%2 = load ptr, ptr @ar7_wdt, align 8, !tbaa !6
%3 = getelementptr inbounds i8, ptr %2, i64 4
%4 = load i32, ptr %3, align 4, !tbaa !10
%5 = tail call i32 @WRITE_REG(i32 noundef %4, i32 noundef 30583) #2
%6 = load ptr, ptr @ar7_wdt, align 8, !tbaa !6
%7 = getelementptr inbounds i8, ptr %6, i64 4
%8 = load i32, ptr %7, align 4, !tbaa !10
%9 = tail call i32 @READ_REG(i32 noundef %8) #2
%10 = and i32 %9, 3
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %38
12: ; preds = %1
%13 = load ptr, ptr @ar7_wdt, align 8, !tbaa !6
%14 = getelementptr inbounds i8, ptr %13, i64 4
%15 = load i32, ptr %14, align 4, !tbaa !10
%16 = tail call i32 @WRITE_REG(i32 noundef %15, i32 noundef 52428) #2
%17 = load ptr, ptr @ar7_wdt, align 8, !tbaa !6
%18 = getelementptr inbounds i8, ptr %17, i64 4
%19 = load i32, ptr %18, align 4, !tbaa !10
%20 = tail call i32 @READ_REG(i32 noundef %19) #2
%21 = and i32 %20, 3
%22 = icmp eq i32 %21, 2
br i1 %22, label %23, label %38
23: ; preds = %12
%24 = load ptr, ptr @ar7_wdt, align 8, !tbaa !6
%25 = getelementptr inbounds i8, ptr %24, i64 4
%26 = load i32, ptr %25, align 4, !tbaa !10
%27 = tail call i32 @WRITE_REG(i32 noundef %26, i32 noundef 56797) #2
%28 = load ptr, ptr @ar7_wdt, align 8, !tbaa !6
%29 = getelementptr inbounds i8, ptr %28, i64 4
%30 = load i32, ptr %29, align 4, !tbaa !10
%31 = tail call i32 @READ_REG(i32 noundef %30) #2
%32 = and i32 %31, 3
%33 = icmp eq i32 %32, 3
br i1 %33, label %34, label %38
34: ; preds = %23
%35 = load ptr, ptr @ar7_wdt, align 8, !tbaa !6
%36 = load i32, ptr %35, align 4, !tbaa !13
%37 = tail call i32 @WRITE_REG(i32 noundef %36, i32 noundef %0) #2
br label %40
38: ; preds = %12, %23, %1
%39 = tail call i32 @pr_err(ptr noundef nonnull @.str) #2
br label %40
40: ; preds = %38, %34
ret void
}
declare i32 @WRITE_REG(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @READ_REG(i32 noundef) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 4}
!11 = !{!"TYPE_2__", !12, i64 0, !12, i64 4}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !12, i64 0}
| linux_drivers_watchdog_extr_ar7_wdt.c_ar7_wdt_disable |
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/ec/extr_ec_key.c_EC_KEY_generate_key.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/ec/extr_ec_key.c_EC_KEY_generate_key.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { ptr, ptr }
@EC_F_EC_KEY_GENERATE_KEY = dso_local local_unnamed_addr global i32 0, align 4
@ERR_R_PASSED_NULL_PARAMETER = dso_local local_unnamed_addr global i32 0, align 4
@EC_R_OPERATION_NOT_SUPPORTED = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @EC_KEY_generate_key(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %11
7: ; preds = %3, %1
%8 = load i32, ptr @EC_F_EC_KEY_GENERATE_KEY, align 4, !tbaa !10
%9 = load i32, ptr @ERR_R_PASSED_NULL_PARAMETER, align 4, !tbaa !10
%10 = tail call i32 @ECerr(i32 noundef %8, i32 noundef %9) #2
br label %21
11: ; preds = %3
%12 = load ptr, ptr %0, align 8, !tbaa !12
%13 = load ptr, ptr %12, align 8, !tbaa !13
%14 = icmp eq ptr %13, null
br i1 %14, label %17, label %15
15: ; preds = %11
%16 = tail call i32 %13(ptr noundef nonnull %0) #2
br label %21
17: ; preds = %11
%18 = load i32, ptr @EC_F_EC_KEY_GENERATE_KEY, align 4, !tbaa !10
%19 = load i32, ptr @EC_R_OPERATION_NOT_SUPPORTED, align 4, !tbaa !10
%20 = tail call i32 @ECerr(i32 noundef %18, i32 noundef %19) #2
br label %21
21: ; preds = %17, %15, %7
%22 = phi i32 [ 0, %7 ], [ %16, %15 ], [ 0, %17 ]
ret i32 %22
}
declare i32 @ECerr(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"TYPE_6__", !7, i64 0, !7, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_5__", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/ec/extr_ec_key.c_EC_KEY_generate_key.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/ec/extr_ec_key.c_EC_KEY_generate_key.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EC_F_EC_KEY_GENERATE_KEY = common local_unnamed_addr global i32 0, align 4
@ERR_R_PASSED_NULL_PARAMETER = common local_unnamed_addr global i32 0, align 4
@EC_R_OPERATION_NOT_SUPPORTED = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @EC_KEY_generate_key(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = getelementptr inbounds i8, ptr %0, i64 8
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %11
7: ; preds = %3, %1
%8 = load i32, ptr @EC_F_EC_KEY_GENERATE_KEY, align 4, !tbaa !11
%9 = load i32, ptr @ERR_R_PASSED_NULL_PARAMETER, align 4, !tbaa !11
%10 = tail call i32 @ECerr(i32 noundef %8, i32 noundef %9) #2
br label %21
11: ; preds = %3
%12 = load ptr, ptr %0, align 8, !tbaa !13
%13 = load ptr, ptr %12, align 8, !tbaa !14
%14 = icmp eq ptr %13, null
br i1 %14, label %17, label %15
15: ; preds = %11
%16 = tail call i32 %13(ptr noundef nonnull %0) #2
br label %21
17: ; preds = %11
%18 = load i32, ptr @EC_F_EC_KEY_GENERATE_KEY, align 4, !tbaa !11
%19 = load i32, ptr @EC_R_OPERATION_NOT_SUPPORTED, align 4, !tbaa !11
%20 = tail call i32 @ECerr(i32 noundef %18, i32 noundef %19) #2
br label %21
21: ; preds = %17, %15, %7
%22 = phi i32 [ 0, %7 ], [ %16, %15 ], [ 0, %17 ]
ret i32 %22
}
declare i32 @ECerr(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"TYPE_6__", !8, i64 0, !8, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!15, !8, i64 0}
!15 = !{!"TYPE_5__", !8, i64 0}
| freebsd_crypto_openssl_crypto_ec_extr_ec_key.c_EC_KEY_generate_key |
; ModuleID = 'AnghaBench/linux/drivers/md/extr_dm-io.c_dp_init.c'
source_filename = "AnghaBench/linux/drivers/md/extr_dm-io.c_dp_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.dpages = type { i64, ptr }
%struct.TYPE_4__ = type { i32, %struct.TYPE_3__, i32 }
%struct.TYPE_3__ = type { i32, ptr, i32, i32 }
%struct.dm_io_request = type { %struct.TYPE_4__, i32 }
@REQ_OP_READ = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @dp_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @dp_init(ptr nocapture noundef readonly %0, ptr noundef %1, i64 noundef %2) #0 {
%4 = getelementptr inbounds %struct.dpages, ptr %1, i64 0, i32 1
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %1, i8 0, i64 16, i1 false)
%5 = load i32, ptr %0, align 8, !tbaa !5
switch i32 %5, label %32 [
i32 129, label %6
i32 131, label %12
i32 128, label %16
i32 130, label %28
]
6: ; preds = %3
%7 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1, i32 3
%8 = load i32, ptr %7, align 4, !tbaa !13
%9 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 2
%10 = load i32, ptr %9, align 8, !tbaa !14
%11 = tail call i32 @list_dp_init(ptr noundef nonnull %1, i32 noundef %8, i32 noundef %10) #3
br label %35
12: ; preds = %3
%13 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1, i32 2
%14 = load i32, ptr %13, align 8, !tbaa !15
%15 = tail call i32 @bio_dp_init(ptr noundef nonnull %1, i32 noundef %14) #3
br label %35
16: ; preds = %3
%17 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1, i32 1
%18 = load ptr, ptr %17, align 8, !tbaa !16
%19 = tail call i32 @flush_kernel_vmap_range(ptr noundef %18, i64 noundef %2) #3
%20 = getelementptr inbounds %struct.dm_io_request, ptr %0, i64 0, i32 1
%21 = load i32, ptr %20, align 8, !tbaa !17
%22 = load i32, ptr @REQ_OP_READ, align 4, !tbaa !18
%23 = icmp eq i32 %21, %22
%24 = load ptr, ptr %17, align 8, !tbaa !16
br i1 %23, label %25, label %26
25: ; preds = %16
store ptr %24, ptr %4, align 8, !tbaa !19
store i64 %2, ptr %1, align 8, !tbaa !22
br label %26
26: ; preds = %25, %16
%27 = tail call i32 @vm_dp_init(ptr noundef nonnull %1, ptr noundef %24) #3
br label %35
28: ; preds = %3
%29 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
%30 = load i32, ptr %29, align 8, !tbaa !23
%31 = tail call i32 @km_dp_init(ptr noundef nonnull %1, i32 noundef %30) #3
br label %35
32: ; preds = %3
%33 = load i32, ptr @EINVAL, align 4, !tbaa !18
%34 = sub nsw i32 0, %33
br label %35
35: ; preds = %6, %12, %26, %28, %32
%36 = phi i32 [ %34, %32 ], [ 0, %28 ], [ 0, %26 ], [ 0, %12 ], [ 0, %6 ]
ret i32 %36
}
declare i32 @list_dp_init(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bio_dp_init(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @flush_kernel_vmap_range(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @vm_dp_init(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @km_dp_init(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"dm_io_request", !7, i64 0, !8, i64 40}
!7 = !{!"TYPE_4__", !8, i64 0, !11, i64 8, !8, i64 32}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_3__", !8, i64 0, !12, i64 8, !8, i64 16, !8, i64 20}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!6, !8, i64 28}
!14 = !{!6, !8, i64 32}
!15 = !{!6, !8, i64 24}
!16 = !{!6, !12, i64 16}
!17 = !{!6, !8, i64 40}
!18 = !{!8, !8, i64 0}
!19 = !{!20, !12, i64 8}
!20 = !{!"dpages", !21, i64 0, !12, i64 8}
!21 = !{!"long", !9, i64 0}
!22 = !{!20, !21, i64 0}
!23 = !{!6, !8, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/md/extr_dm-io.c_dp_init.c'
source_filename = "AnghaBench/linux/drivers/md/extr_dm-io.c_dp_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@REQ_OP_READ = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @dp_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @dp_init(ptr nocapture noundef readonly %0, ptr noundef %1, i64 noundef %2) #0 {
%4 = getelementptr inbounds i8, ptr %1, i64 8
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %1, i8 0, i64 16, i1 false)
%5 = load i32, ptr %0, align 8, !tbaa !6
switch i32 %5, label %32 [
i32 129, label %6
i32 131, label %12
i32 128, label %16
i32 130, label %28
]
6: ; preds = %3
%7 = getelementptr inbounds i8, ptr %0, i64 28
%8 = load i32, ptr %7, align 4, !tbaa !14
%9 = getelementptr inbounds i8, ptr %0, i64 32
%10 = load i32, ptr %9, align 8, !tbaa !15
%11 = tail call i32 @list_dp_init(ptr noundef nonnull %1, i32 noundef %8, i32 noundef %10) #3
br label %35
12: ; preds = %3
%13 = getelementptr inbounds i8, ptr %0, i64 24
%14 = load i32, ptr %13, align 8, !tbaa !16
%15 = tail call i32 @bio_dp_init(ptr noundef nonnull %1, i32 noundef %14) #3
br label %35
16: ; preds = %3
%17 = getelementptr inbounds i8, ptr %0, i64 16
%18 = load ptr, ptr %17, align 8, !tbaa !17
%19 = tail call i32 @flush_kernel_vmap_range(ptr noundef %18, i64 noundef %2) #3
%20 = getelementptr inbounds i8, ptr %0, i64 40
%21 = load i32, ptr %20, align 8, !tbaa !18
%22 = load i32, ptr @REQ_OP_READ, align 4, !tbaa !19
%23 = icmp eq i32 %21, %22
%24 = load ptr, ptr %17, align 8, !tbaa !17
br i1 %23, label %25, label %26
25: ; preds = %16
store ptr %24, ptr %4, align 8, !tbaa !20
store i64 %2, ptr %1, align 8, !tbaa !23
br label %26
26: ; preds = %25, %16
%27 = tail call i32 @vm_dp_init(ptr noundef nonnull %1, ptr noundef %24) #3
br label %35
28: ; preds = %3
%29 = getelementptr inbounds i8, ptr %0, i64 8
%30 = load i32, ptr %29, align 8, !tbaa !24
%31 = tail call i32 @km_dp_init(ptr noundef nonnull %1, i32 noundef %30) #3
br label %35
32: ; preds = %3
%33 = load i32, ptr @EINVAL, align 4, !tbaa !19
%34 = sub nsw i32 0, %33
br label %35
35: ; preds = %6, %12, %26, %28, %32
%36 = phi i32 [ %34, %32 ], [ 0, %28 ], [ 0, %26 ], [ 0, %12 ], [ 0, %6 ]
ret i32 %36
}
declare i32 @list_dp_init(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bio_dp_init(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @flush_kernel_vmap_range(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @vm_dp_init(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @km_dp_init(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"dm_io_request", !8, i64 0, !9, i64 40}
!8 = !{!"TYPE_4__", !9, i64 0, !12, i64 8, !9, i64 32}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"TYPE_3__", !9, i64 0, !13, i64 8, !9, i64 16, !9, i64 20}
!13 = !{!"any pointer", !10, i64 0}
!14 = !{!7, !9, i64 28}
!15 = !{!7, !9, i64 32}
!16 = !{!7, !9, i64 24}
!17 = !{!7, !13, i64 16}
!18 = !{!7, !9, i64 40}
!19 = !{!9, !9, i64 0}
!20 = !{!21, !13, i64 8}
!21 = !{!"dpages", !22, i64 0, !13, i64 8}
!22 = !{!"long", !10, i64 0}
!23 = !{!21, !22, i64 0}
!24 = !{!7, !9, i64 8}
| linux_drivers_md_extr_dm-io.c_dp_init |
; ModuleID = 'AnghaBench/linux/kernel/events/extr_core.c_swevent_hlist_release.c'
source_filename = "AnghaBench/linux/kernel/events/extr_core.c_swevent_hlist_release.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@rcu_head = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @swevent_hlist_release], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @swevent_hlist_release(ptr noundef %0) #0 {
%2 = tail call ptr @swevent_hlist_deref(ptr noundef %0) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = load i32, ptr %0, align 4, !tbaa !5
%6 = tail call i32 @RCU_INIT_POINTER(i32 noundef %5, ptr noundef null) #2
%7 = load i32, ptr @rcu_head, align 4, !tbaa !10
%8 = tail call i32 @kfree_rcu(ptr noundef nonnull %2, i32 noundef %7) #2
br label %9
9: ; preds = %1, %4
ret void
}
declare ptr @swevent_hlist_deref(ptr noundef) local_unnamed_addr #1
declare i32 @RCU_INIT_POINTER(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kfree_rcu(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"swevent_htable", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/kernel/events/extr_core.c_swevent_hlist_release.c'
source_filename = "AnghaBench/linux/kernel/events/extr_core.c_swevent_hlist_release.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@rcu_head = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @swevent_hlist_release], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @swevent_hlist_release(ptr noundef %0) #0 {
%2 = tail call ptr @swevent_hlist_deref(ptr noundef %0) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = load i32, ptr %0, align 4, !tbaa !6
%6 = tail call i32 @RCU_INIT_POINTER(i32 noundef %5, ptr noundef null) #2
%7 = load i32, ptr @rcu_head, align 4, !tbaa !11
%8 = tail call i32 @kfree_rcu(ptr noundef nonnull %2, i32 noundef %7) #2
br label %9
9: ; preds = %1, %4
ret void
}
declare ptr @swevent_hlist_deref(ptr noundef) local_unnamed_addr #1
declare i32 @RCU_INIT_POINTER(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kfree_rcu(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"swevent_htable", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| linux_kernel_events_extr_core.c_swevent_hlist_release |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/arm/extr_malidp_hw.c_malidp550_leave_config_mode.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/arm/extr_malidp_hw.c_malidp550_leave_config_mode.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MALIDP_CFG_VALID = dso_local local_unnamed_addr global i64 0, align 8
@MALIDP550_CONFIG_VALID = dso_local local_unnamed_addr global i32 0, align 4
@MALIDP550_DC_CONFIG_REQ = dso_local local_unnamed_addr global i64 0, align 8
@MALIDP550_DC_CONTROL = dso_local local_unnamed_addr global i32 0, align 4
@MALIDP_REG_STATUS = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [34 x i8] c"timeout while leaving config mode\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @malidp550_leave_config_mode], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @malidp550_leave_config_mode(ptr noundef %0) #0 {
%2 = load i64, ptr @MALIDP_CFG_VALID, align 8, !tbaa !5
%3 = load i32, ptr @MALIDP550_CONFIG_VALID, align 4, !tbaa !9
%4 = tail call i32 @malidp_hw_clearbits(ptr noundef %0, i64 noundef %2, i32 noundef %3) #2
%5 = load i64, ptr @MALIDP550_DC_CONFIG_REQ, align 8, !tbaa !5
%6 = load i32, ptr @MALIDP550_DC_CONTROL, align 4, !tbaa !9
%7 = tail call i32 @malidp_hw_clearbits(ptr noundef %0, i64 noundef %5, i32 noundef %6) #2
br label %8
8: ; preds = %1, %18
%9 = phi i64 [ 100, %1 ], [ %20, %18 ]
%10 = load ptr, ptr %0, align 8, !tbaa !11
%11 = load i64, ptr %10, align 8, !tbaa !14
%12 = load i64, ptr @MALIDP_REG_STATUS, align 8, !tbaa !5
%13 = add nsw i64 %12, %11
%14 = tail call i64 @malidp_hw_read(ptr noundef nonnull %0, i64 noundef %13) #2
%15 = load i64, ptr @MALIDP550_DC_CONFIG_REQ, align 8, !tbaa !5
%16 = and i64 %15, %14
%17 = icmp ne i64 %16, 0
br i1 %17, label %18, label %22
18: ; preds = %8
%19 = tail call i32 @usleep_range(i32 noundef 100, i32 noundef 1000) #2
%20 = add nsw i64 %9, -1
%21 = icmp eq i64 %20, 0
br i1 %21, label %22, label %8, !llvm.loop !17
22: ; preds = %8, %18
%23 = zext i1 %17 to i32
%24 = tail call i32 @WARN(i32 noundef %23, ptr noundef nonnull @.str) #2
ret void
}
declare i32 @malidp_hw_clearbits(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @malidp_hw_read(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @usleep_range(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @WARN(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"malidp_hw_device", !13, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!15, !6, i64 0}
!15 = !{!"TYPE_4__", !16, i64 0}
!16 = !{!"TYPE_3__", !6, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/arm/extr_malidp_hw.c_malidp550_leave_config_mode.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/arm/extr_malidp_hw.c_malidp550_leave_config_mode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MALIDP_CFG_VALID = common local_unnamed_addr global i64 0, align 8
@MALIDP550_CONFIG_VALID = common local_unnamed_addr global i32 0, align 4
@MALIDP550_DC_CONFIG_REQ = common local_unnamed_addr global i64 0, align 8
@MALIDP550_DC_CONTROL = common local_unnamed_addr global i32 0, align 4
@MALIDP_REG_STATUS = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [34 x i8] c"timeout while leaving config mode\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @malidp550_leave_config_mode], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @malidp550_leave_config_mode(ptr noundef %0) #0 {
%2 = load i64, ptr @MALIDP_CFG_VALID, align 8, !tbaa !6
%3 = load i32, ptr @MALIDP550_CONFIG_VALID, align 4, !tbaa !10
%4 = tail call i32 @malidp_hw_clearbits(ptr noundef %0, i64 noundef %2, i32 noundef %3) #2
%5 = load i64, ptr @MALIDP550_DC_CONFIG_REQ, align 8, !tbaa !6
%6 = load i32, ptr @MALIDP550_DC_CONTROL, align 4, !tbaa !10
%7 = tail call i32 @malidp_hw_clearbits(ptr noundef %0, i64 noundef %5, i32 noundef %6) #2
br label %8
8: ; preds = %1, %18
%9 = phi i64 [ 100, %1 ], [ %20, %18 ]
%10 = load ptr, ptr %0, align 8, !tbaa !12
%11 = load i64, ptr %10, align 8, !tbaa !15
%12 = load i64, ptr @MALIDP_REG_STATUS, align 8, !tbaa !6
%13 = add nsw i64 %12, %11
%14 = tail call i64 @malidp_hw_read(ptr noundef nonnull %0, i64 noundef %13) #2
%15 = load i64, ptr @MALIDP550_DC_CONFIG_REQ, align 8, !tbaa !6
%16 = and i64 %15, %14
%17 = icmp ne i64 %16, 0
br i1 %17, label %18, label %22
18: ; preds = %8
%19 = tail call i32 @usleep_range(i32 noundef 100, i32 noundef 1000) #2
%20 = add nsw i64 %9, -1
%21 = icmp eq i64 %20, 0
br i1 %21, label %22, label %8, !llvm.loop !18
22: ; preds = %8, %18
%23 = zext i1 %17 to i32
%24 = tail call i32 @WARN(i32 noundef %23, ptr noundef nonnull @.str) #2
ret void
}
declare i32 @malidp_hw_clearbits(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @malidp_hw_read(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @usleep_range(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @WARN(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"malidp_hw_device", !14, i64 0}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!16, !7, i64 0}
!16 = !{!"TYPE_4__", !17, i64 0}
!17 = !{!"TYPE_3__", !7, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
| linux_drivers_gpu_drm_arm_extr_malidp_hw.c_malidp550_leave_config_mode |
; ModuleID = 'AnghaBench/postgres/src/bin/pg_dump/extr_pg_dump.c_findLastBuiltinOid_V71.c'
source_filename = "AnghaBench/postgres/src/bin/pg_dump/extr_pg_dump.c_findLastBuiltinOid_V71.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [73 x i8] c"SELECT datlastsysoid FROM pg_database WHERE datname = current_database()\00", align 1
@.str.1 = private unnamed_addr constant [14 x i8] c"datlastsysoid\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @findLastBuiltinOid_V71], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @findLastBuiltinOid_V71(ptr noundef %0) #0 {
%2 = tail call ptr @ExecuteSqlQueryForSingleRow(ptr noundef %0, ptr noundef nonnull @.str) #2
%3 = tail call i32 @PQfnumber(ptr noundef %2, ptr noundef nonnull @.str.1) #2
%4 = tail call i32 @PQgetvalue(ptr noundef %2, i32 noundef 0, i32 noundef %3) #2
%5 = tail call i32 @atooid(i32 noundef %4) #2
%6 = tail call i32 @PQclear(ptr noundef %2) #2
ret i32 %5
}
declare ptr @ExecuteSqlQueryForSingleRow(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @atooid(i32 noundef) local_unnamed_addr #1
declare i32 @PQgetvalue(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PQfnumber(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @PQclear(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/postgres/src/bin/pg_dump/extr_pg_dump.c_findLastBuiltinOid_V71.c'
source_filename = "AnghaBench/postgres/src/bin/pg_dump/extr_pg_dump.c_findLastBuiltinOid_V71.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [73 x i8] c"SELECT datlastsysoid FROM pg_database WHERE datname = current_database()\00", align 1
@.str.1 = private unnamed_addr constant [14 x i8] c"datlastsysoid\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @findLastBuiltinOid_V71], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @findLastBuiltinOid_V71(ptr noundef %0) #0 {
%2 = tail call ptr @ExecuteSqlQueryForSingleRow(ptr noundef %0, ptr noundef nonnull @.str) #2
%3 = tail call i32 @PQfnumber(ptr noundef %2, ptr noundef nonnull @.str.1) #2
%4 = tail call i32 @PQgetvalue(ptr noundef %2, i32 noundef 0, i32 noundef %3) #2
%5 = tail call i32 @atooid(i32 noundef %4) #2
%6 = tail call i32 @PQclear(ptr noundef %2) #2
ret i32 %5
}
declare ptr @ExecuteSqlQueryForSingleRow(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @atooid(i32 noundef) local_unnamed_addr #1
declare i32 @PQgetvalue(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PQfnumber(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @PQclear(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| postgres_src_bin_pg_dump_extr_pg_dump.c_findLastBuiltinOid_V71 |
; ModuleID = 'AnghaBench/linux/scripts/dtc/extr_srcpos.c_set_initial_path.c'
source_filename = "AnghaBench/linux/scripts/dtc/extr_srcpos.c_set_initial_path.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@initial_path = dso_local global ptr null, align 8
@.str = private unnamed_addr constant [3 x i8] c"%s\00", align 1
@initial_pathlen = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @set_initial_path], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @set_initial_path(ptr noundef %0) #0 {
%2 = tail call i32 @strlen(ptr noundef %0) #2
%3 = tail call i32 @xasprintf(ptr noundef nonnull @initial_path, ptr noundef nonnull @.str, ptr noundef %0) #2
store i64 0, ptr @initial_pathlen, align 8, !tbaa !5
%4 = icmp eq i32 %2, 0
br i1 %4, label %45, label %5
5: ; preds = %1
%6 = load ptr, ptr @initial_path, align 8, !tbaa !9
%7 = zext i32 %2 to i64
%8 = and i64 %7, 1
%9 = icmp eq i32 %2, 1
br i1 %9, label %36, label %10
10: ; preds = %5
%11 = and i64 %7, 4294967294
br label %12
12: ; preds = %29, %10
%13 = phi i64 [ 0, %10 ], [ %31, %29 ]
%14 = phi i64 [ 0, %10 ], [ %30, %29 ]
%15 = phi i64 [ 0, %10 ], [ %32, %29 ]
%16 = getelementptr inbounds i8, ptr %6, i64 %13
%17 = load i8, ptr %16, align 1, !tbaa !11
%18 = icmp eq i8 %17, 47
br i1 %18, label %19, label %21
19: ; preds = %12
%20 = add nsw i64 %14, 1
store i64 %20, ptr @initial_pathlen, align 8, !tbaa !5
br label %21
21: ; preds = %12, %19
%22 = phi i64 [ %14, %12 ], [ %20, %19 ]
%23 = or disjoint i64 %13, 1
%24 = getelementptr inbounds i8, ptr %6, i64 %23
%25 = load i8, ptr %24, align 1, !tbaa !11
%26 = icmp eq i8 %25, 47
br i1 %26, label %27, label %29
27: ; preds = %21
%28 = add nsw i64 %22, 1
store i64 %28, ptr @initial_pathlen, align 8, !tbaa !5
br label %29
29: ; preds = %27, %21
%30 = phi i64 [ %22, %21 ], [ %28, %27 ]
%31 = add nuw nsw i64 %13, 2
%32 = add i64 %15, 2
%33 = icmp eq i64 %32, %11
br i1 %33, label %34, label %12, !llvm.loop !12
34: ; preds = %29
%35 = add nsw i64 %30, 1
br label %36
36: ; preds = %34, %5
%37 = phi i64 [ 0, %5 ], [ %31, %34 ]
%38 = phi i64 [ 1, %5 ], [ %35, %34 ]
%39 = icmp eq i64 %8, 0
br i1 %39, label %45, label %40
40: ; preds = %36
%41 = getelementptr inbounds i8, ptr %6, i64 %37
%42 = load i8, ptr %41, align 1, !tbaa !11
%43 = icmp eq i8 %42, 47
br i1 %43, label %44, label %45
44: ; preds = %40
store i64 %38, ptr @initial_pathlen, align 8, !tbaa !5
br label %45
45: ; preds = %36, %44, %40, %1
ret void
}
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
declare i32 @xasprintf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/scripts/dtc/extr_srcpos.c_set_initial_path.c'
source_filename = "AnghaBench/linux/scripts/dtc/extr_srcpos.c_set_initial_path.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@initial_path = common global ptr null, align 8
@.str = private unnamed_addr constant [3 x i8] c"%s\00", align 1
@initial_pathlen = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @set_initial_path], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @set_initial_path(ptr noundef %0) #0 {
%2 = tail call i32 @strlen(ptr noundef %0) #2
%3 = tail call i32 @xasprintf(ptr noundef nonnull @initial_path, ptr noundef nonnull @.str, ptr noundef %0) #2
store i64 0, ptr @initial_pathlen, align 8, !tbaa !6
%4 = icmp eq i32 %2, 0
br i1 %4, label %20, label %5
5: ; preds = %1
%6 = load ptr, ptr @initial_path, align 8, !tbaa !10
%7 = zext i32 %2 to i64
br label %8
8: ; preds = %5, %16
%9 = phi i64 [ 0, %5 ], [ %18, %16 ]
%10 = phi i64 [ 0, %5 ], [ %17, %16 ]
%11 = getelementptr inbounds i8, ptr %6, i64 %9
%12 = load i8, ptr %11, align 1, !tbaa !12
%13 = icmp eq i8 %12, 47
br i1 %13, label %14, label %16
14: ; preds = %8
%15 = add nsw i64 %10, 1
store i64 %15, ptr @initial_pathlen, align 8, !tbaa !6
br label %16
16: ; preds = %8, %14
%17 = phi i64 [ %10, %8 ], [ %15, %14 ]
%18 = add nuw nsw i64 %9, 1
%19 = icmp eq i64 %18, %7
br i1 %19, label %20, label %8, !llvm.loop !13
20: ; preds = %16, %1
ret void
}
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
declare i32 @xasprintf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!8, !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| linux_scripts_dtc_extr_srcpos.c_set_initial_path |
; ModuleID = 'AnghaBench/linux/drivers/usb/host/extr_xhci-debugfs.c_xhci_ring_dump_segment.c'
source_filename = "AnghaBench/linux/drivers/usb/host/extr_xhci-debugfs.c_xhci_ring_dump_segment.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.xhci_segment = type { i64, ptr }
%union.xhci_trb = type { %struct.TYPE_2__ }
%struct.TYPE_2__ = type { ptr }
@TRBS_PER_SEGMENT = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [10 x i8] c"%pad: %s\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @xhci_ring_dump_segment], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @xhci_ring_dump_segment(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%4 = load i32, ptr @TRBS_PER_SEGMENT, align 4, !tbaa !5
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %36
6: ; preds = %2
%7 = getelementptr inbounds %struct.xhci_segment, ptr %1, i64 0, i32 1
br label %8
8: ; preds = %6, %8
%9 = phi i64 [ 0, %6 ], [ %32, %8 ]
%10 = load ptr, ptr %7, align 8, !tbaa !9
%11 = getelementptr inbounds %union.xhci_trb, ptr %10, i64 %9
%12 = load i64, ptr %1, align 8, !tbaa !13
%13 = shl nuw nsw i64 %9, 3
%14 = add i64 %12, %13
store i64 %14, ptr %3, align 8, !tbaa !14
%15 = load ptr, ptr %11, align 8, !tbaa !15
%16 = load i32, ptr %15, align 4, !tbaa !5
%17 = call i32 @le32_to_cpu(i32 noundef %16) #3
%18 = load ptr, ptr %11, align 8, !tbaa !15
%19 = getelementptr inbounds i32, ptr %18, i64 1
%20 = load i32, ptr %19, align 4, !tbaa !5
%21 = call i32 @le32_to_cpu(i32 noundef %20) #3
%22 = load ptr, ptr %11, align 8, !tbaa !15
%23 = getelementptr inbounds i32, ptr %22, i64 2
%24 = load i32, ptr %23, align 4, !tbaa !5
%25 = call i32 @le32_to_cpu(i32 noundef %24) #3
%26 = load ptr, ptr %11, align 8, !tbaa !15
%27 = getelementptr inbounds i32, ptr %26, i64 3
%28 = load i32, ptr %27, align 4, !tbaa !5
%29 = call i32 @le32_to_cpu(i32 noundef %28) #3
%30 = call i32 @xhci_decode_trb(i32 noundef %17, i32 noundef %21, i32 noundef %25, i32 noundef %29) #3
%31 = call i32 @seq_printf(ptr noundef %0, ptr noundef nonnull @.str, ptr noundef nonnull %3, i32 noundef %30) #3
%32 = add nuw nsw i64 %9, 1
%33 = load i32, ptr @TRBS_PER_SEGMENT, align 4, !tbaa !5
%34 = sext i32 %33 to i64
%35 = icmp slt i64 %32, %34
br i1 %35, label %8, label %36, !llvm.loop !16
36: ; preds = %8, %2
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @seq_printf(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @xhci_decode_trb(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @le32_to_cpu(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 8}
!10 = !{!"xhci_segment", !11, i64 0, !12, i64 8}
!11 = !{!"long", !7, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!10, !11, i64 0}
!14 = !{!11, !11, i64 0}
!15 = !{!7, !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/host/extr_xhci-debugfs.c_xhci_ring_dump_segment.c'
source_filename = "AnghaBench/linux/drivers/usb/host/extr_xhci-debugfs.c_xhci_ring_dump_segment.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%union.xhci_trb = type { %struct.TYPE_2__ }
%struct.TYPE_2__ = type { ptr }
@TRBS_PER_SEGMENT = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [10 x i8] c"%pad: %s\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @xhci_ring_dump_segment], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @xhci_ring_dump_segment(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%4 = load i32, ptr @TRBS_PER_SEGMENT, align 4, !tbaa !6
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %36
6: ; preds = %2
%7 = getelementptr inbounds i8, ptr %1, i64 8
br label %8
8: ; preds = %6, %8
%9 = phi i64 [ 0, %6 ], [ %32, %8 ]
%10 = load ptr, ptr %7, align 8, !tbaa !10
%11 = getelementptr inbounds %union.xhci_trb, ptr %10, i64 %9
%12 = load i64, ptr %1, align 8, !tbaa !14
%13 = shl nuw nsw i64 %9, 3
%14 = add i64 %12, %13
store i64 %14, ptr %3, align 8, !tbaa !15
%15 = load ptr, ptr %11, align 8, !tbaa !16
%16 = load i32, ptr %15, align 4, !tbaa !6
%17 = call i32 @le32_to_cpu(i32 noundef %16) #3
%18 = load ptr, ptr %11, align 8, !tbaa !16
%19 = getelementptr inbounds i8, ptr %18, i64 4
%20 = load i32, ptr %19, align 4, !tbaa !6
%21 = call i32 @le32_to_cpu(i32 noundef %20) #3
%22 = load ptr, ptr %11, align 8, !tbaa !16
%23 = getelementptr inbounds i8, ptr %22, i64 8
%24 = load i32, ptr %23, align 4, !tbaa !6
%25 = call i32 @le32_to_cpu(i32 noundef %24) #3
%26 = load ptr, ptr %11, align 8, !tbaa !16
%27 = getelementptr inbounds i8, ptr %26, i64 12
%28 = load i32, ptr %27, align 4, !tbaa !6
%29 = call i32 @le32_to_cpu(i32 noundef %28) #3
%30 = call i32 @xhci_decode_trb(i32 noundef %17, i32 noundef %21, i32 noundef %25, i32 noundef %29) #3
%31 = call i32 @seq_printf(ptr noundef %0, ptr noundef nonnull @.str, ptr noundef nonnull %3, i32 noundef %30) #3
%32 = add nuw nsw i64 %9, 1
%33 = load i32, ptr @TRBS_PER_SEGMENT, align 4, !tbaa !6
%34 = sext i32 %33 to i64
%35 = icmp slt i64 %32, %34
br i1 %35, label %8, label %36, !llvm.loop !17
36: ; preds = %8, %2
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @seq_printf(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @xhci_decode_trb(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @le32_to_cpu(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 8}
!11 = !{!"xhci_segment", !12, i64 0, !13, i64 8}
!12 = !{!"long", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!11, !12, i64 0}
!15 = !{!12, !12, i64 0}
!16 = !{!8, !8, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
| linux_drivers_usb_host_extr_xhci-debugfs.c_xhci_ring_dump_segment |
; ModuleID = 'AnghaBench/RetroArch/tasks/extr_task_overlay.c_task_overlay_load_desc.c'
source_filename = "AnghaBench/RetroArch/tasks/extr_task_overlay.c_task_overlay_load_desc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.string_list = type { i32, ptr }
%struct.TYPE_4__ = type { ptr }
%struct.overlay_desc = type { i32, ptr, float, float, float, float, float, float, float, float, float, float, float, i32, float, float, float, float, i32, i32, i32 }
@.str = private unnamed_addr constant [17 x i8] c"overlay%u_desc%u\00", align 1
@.str.1 = private unnamed_addr constant [28 x i8] c"overlay%u_desc%u_normalized\00", align 1
@.str.2 = private unnamed_addr constant [74 x i8] c"[Overlay]: Base overlay is not set and not using normalized coordinates.\0A\00", align 1
@.str.3 = private unnamed_addr constant [33 x i8] c"[Overlay]: Didn't find key: %s.\0A\00", align 1
@.str.4 = private unnamed_addr constant [3 x i8] c", \00", align 1
@.str.5 = private unnamed_addr constant [42 x i8] c"[Overlay]: Failed to split overlay desc.\0A\00", align 1
@.str.6 = private unnamed_addr constant [65 x i8] c"[Overlay]: Overlay desc is invalid. Requires at least 6 tokens.\0A\00", align 1
@.str.7 = private unnamed_addr constant [12 x i8] c"analog_left\00", align 1
@.str.8 = private unnamed_addr constant [13 x i8] c"analog_right\00", align 1
@.str.9 = private unnamed_addr constant [8 x i8] c"retrok_\00", align 1
@OVERLAY_TYPE_KEYBOARD = dso_local local_unnamed_addr global i32 0, align 4
@.str.10 = private unnamed_addr constant [2 x i8] c"|\00", align 1
@OVERLAY_TYPE_BUTTONS = dso_local local_unnamed_addr global i32 0, align 4
@.str.11 = private unnamed_addr constant [4 x i8] c"nul\00", align 1
@RARCH_OVERLAY_NEXT = dso_local local_unnamed_addr global i32 0, align 4
@.str.12 = private unnamed_addr constant [29 x i8] c"overlay%u_desc%u_next_target\00", align 1
@.str.13 = private unnamed_addr constant [7 x i8] c"radial\00", align 1
@OVERLAY_HITBOX_RADIAL = dso_local local_unnamed_addr global i32 0, align 4
@.str.14 = private unnamed_addr constant [5 x i8] c"rect\00", align 1
@OVERLAY_HITBOX_RECT = dso_local local_unnamed_addr global i32 0, align 4
@.str.15 = private unnamed_addr constant [65 x i8] c"[Overlay]: Hitbox type (%s) is invalid. Use \22radial\22 or \22rect\22.\0A\00", align 1
@.str.16 = private unnamed_addr constant [49 x i8] c"[Overlay]: Analog hitbox type must be \22radial\22.\0A\00", align 1
@.str.17 = private unnamed_addr constant [30 x i8] c"overlay%u_desc%u_saturate_pct\00", align 1
@.str.18 = private unnamed_addr constant [27 x i8] c"overlay%u_desc%u_alpha_mod\00", align 1
@.str.19 = private unnamed_addr constant [27 x i8] c"overlay%u_desc%u_range_mod\00", align 1
@.str.20 = private unnamed_addr constant [25 x i8] c"overlay%u_desc%u_movable\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @task_overlay_load_desc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @task_overlay_load_desc(ptr nocapture noundef readonly %0, ptr nocapture noundef %1, ptr nocapture noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, float noundef %8, float noundef %9) #0 {
%11 = alloca [64 x i8], align 16
%12 = alloca [64 x i8], align 16
%13 = alloca [64 x i8], align 16
%14 = alloca [256 x i8], align 16
%15 = alloca float, align 4
%16 = alloca i32, align 4
%17 = alloca ptr, align 8
%18 = alloca [64 x i8], align 16
%19 = alloca [64 x i8], align 16
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %11) #5
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %12) #5
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %13) #5
call void @llvm.lifetime.start.p0(i64 256, ptr nonnull %14) #5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %15) #5
store float 0.000000e+00, ptr %15, align 4, !tbaa !5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %16) #5
store i32 0, ptr %16, align 4, !tbaa !9
%20 = load ptr, ptr %0, align 8, !tbaa !11
store i8 0, ptr %14, align 16, !tbaa !14
store i8 0, ptr %13, align 16, !tbaa !14
store i8 0, ptr %12, align 16, !tbaa !14
store i8 0, ptr %11, align 16, !tbaa !14
%21 = call i32 @snprintf(ptr noundef nonnull %11, i32 noundef 64, ptr noundef nonnull @.str, i32 noundef %3, i32 noundef %4) #5
%22 = call i32 @snprintf(ptr noundef nonnull %13, i32 noundef 64, ptr noundef nonnull @.str.1, i32 noundef %3, i32 noundef %4) #5
%23 = call i64 @config_get_bool(ptr noundef %20, ptr noundef nonnull %13, ptr noundef nonnull %16) #5
%24 = icmp eq i64 %23, 0
%25 = load i32, ptr %16, align 4
%26 = select i1 %24, i32 %7, i32 %25
%27 = icmp eq i32 %26, 0
br i1 %27, label %28, label %34
28: ; preds = %10
%29 = icmp eq i32 %5, 0
%30 = icmp eq i32 %6, 0
%31 = or i1 %29, %30
br i1 %31, label %32, label %34
32: ; preds = %28
%33 = call i32 (ptr, ...) @RARCH_ERR(ptr noundef nonnull @.str.2) #5
br label %199
34: ; preds = %28, %10
%35 = call i32 @config_get_array(ptr noundef %20, ptr noundef nonnull %11, ptr noundef nonnull %14, i32 noundef 256) #5
%36 = icmp eq i32 %35, 0
br i1 %36, label %37, label %39
37: ; preds = %34
%38 = call i32 (ptr, ...) @RARCH_ERR(ptr noundef nonnull @.str.3, ptr noundef nonnull %11) #5
br label %199
39: ; preds = %34
%40 = call ptr @string_split(ptr noundef nonnull %14, ptr noundef nonnull @.str.4) #5
%41 = icmp eq ptr %40, null
br i1 %41, label %42, label %44
42: ; preds = %39
%43 = call i32 (ptr, ...) @RARCH_ERR(ptr noundef nonnull @.str.5) #5
br label %199
44: ; preds = %39
%45 = load i32, ptr %40, align 8, !tbaa !15
%46 = icmp slt i32 %45, 6
br i1 %46, label %47, label %49
47: ; preds = %44
%48 = call i32 (ptr, ...) @RARCH_ERR(ptr noundef nonnull @.str.6) #5
br label %196
49: ; preds = %44
%50 = getelementptr inbounds %struct.string_list, ptr %40, i64 0, i32 1
%51 = load ptr, ptr %50, align 8, !tbaa !17
%52 = load ptr, ptr %51, align 8, !tbaa !18
%53 = getelementptr inbounds %struct.TYPE_4__, ptr %51, i64 1
%54 = load ptr, ptr %53, align 8, !tbaa !18
%55 = getelementptr inbounds %struct.TYPE_4__, ptr %51, i64 2
%56 = load ptr, ptr %55, align 8, !tbaa !18
%57 = getelementptr inbounds %struct.TYPE_4__, ptr %51, i64 3
%58 = load ptr, ptr %57, align 8, !tbaa !18
%59 = getelementptr inbounds %struct.overlay_desc, ptr %1, i64 0, i32 20
store i32 0, ptr %59, align 8, !tbaa !20
%60 = getelementptr inbounds %struct.overlay_desc, ptr %1, i64 0, i32 19
%61 = load i32, ptr %60, align 4, !tbaa !22
%62 = call i32 @BIT256_CLEAR_ALL(i32 noundef %61) #5
%63 = call i64 @string_is_equal(ptr noundef %52, ptr noundef nonnull @.str.7) #5
%64 = icmp eq i64 %63, 0
br i1 %64, label %66, label %65
65: ; preds = %49
store i32 129, ptr %1, align 8, !tbaa !23
br label %103
66: ; preds = %49
%67 = call i64 @string_is_equal(ptr noundef %52, ptr noundef nonnull @.str.8) #5
%68 = icmp eq i64 %67, 0
br i1 %68, label %70, label %69
69: ; preds = %66
store i32 128, ptr %1, align 8, !tbaa !23
br label %103
70: ; preds = %66
%71 = call i32 @strncmp(ptr noundef nonnull dereferenceable(1) %52, ptr noundef nonnull dereferenceable(8) @.str.9, i64 7)
%72 = icmp eq i32 %71, 0
br i1 %72, label %73, label %77
73: ; preds = %70
%74 = load i32, ptr @OVERLAY_TYPE_KEYBOARD, align 4, !tbaa !9
store i32 %74, ptr %1, align 8, !tbaa !23
%75 = getelementptr inbounds i8, ptr %52, i64 7
%76 = call i32 @input_config_translate_str_to_rk(ptr noundef nonnull %75) #5
store i32 %76, ptr %59, align 8, !tbaa !20
br label %103
77: ; preds = %70
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %17) #5
store ptr null, ptr %17, align 8, !tbaa !24
%78 = call ptr @strtok_r(ptr noundef %52, ptr noundef nonnull @.str.10, ptr noundef nonnull %17)
%79 = load i32, ptr @OVERLAY_TYPE_BUTTONS, align 4, !tbaa !9
store i32 %79, ptr %1, align 8, !tbaa !23
%80 = icmp eq ptr %78, null
br i1 %80, label %92, label %81
81: ; preds = %77, %89
%82 = phi ptr [ %90, %89 ], [ %78, %77 ]
%83 = call i64 @string_is_equal(ptr noundef nonnull %82, ptr noundef nonnull @.str.11) #5
%84 = icmp eq i64 %83, 0
br i1 %84, label %85, label %89
85: ; preds = %81
%86 = load i32, ptr %60, align 4, !tbaa !22
%87 = call i32 @input_config_translate_str_to_bind_id(ptr noundef nonnull %82) #5
%88 = call i32 @BIT256_SET(i32 noundef %86, i32 noundef %87) #5
br label %89
89: ; preds = %81, %85
%90 = call ptr @strtok_r(ptr noundef null, ptr noundef nonnull @.str.10, ptr noundef nonnull %17)
%91 = icmp eq ptr %90, null
br i1 %91, label %92, label %81, !llvm.loop !25
92: ; preds = %89, %77
%93 = load i32, ptr %60, align 4, !tbaa !22
%94 = load i32, ptr @RARCH_OVERLAY_NEXT, align 4, !tbaa !9
%95 = call i64 @BIT256_GET(i32 noundef %93, i32 noundef %94) #5
%96 = icmp eq i64 %95, 0
br i1 %96, label %102, label %97
97: ; preds = %92
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %18) #5
%98 = call i32 @snprintf(ptr noundef nonnull %18, i32 noundef 64, ptr noundef nonnull @.str.12, i32 noundef %3, i32 noundef %4) #5
%99 = getelementptr inbounds %struct.overlay_desc, ptr %1, i64 0, i32 1
%100 = load ptr, ptr %99, align 8, !tbaa !27
%101 = call i32 @config_get_array(ptr noundef %20, ptr noundef nonnull %18, ptr noundef %100, i32 noundef 8) #5
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %18) #5
br label %102
102: ; preds = %97, %92
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %17) #5
br label %103
103: ; preds = %69, %102, %73, %65
%104 = uitofp i32 %5 to float
%105 = fdiv float 1.000000e+00, %104
%106 = uitofp i32 %6 to float
%107 = fdiv float 1.000000e+00, %106
%108 = select i1 %27, float %105, float 1.000000e+00
%109 = select i1 %27, float %107, float 1.000000e+00
%110 = call i64 @strtod(ptr noundef %54, ptr noundef null) #5
%111 = sitofp i64 %110 to float
%112 = fmul float %108, %111
%113 = getelementptr inbounds %struct.overlay_desc, ptr %1, i64 0, i32 2
store float %112, ptr %113, align 8, !tbaa !28
%114 = call i64 @strtod(ptr noundef %56, ptr noundef null) #5
%115 = sitofp i64 %114 to float
%116 = fmul float %109, %115
%117 = getelementptr inbounds %struct.overlay_desc, ptr %1, i64 0, i32 3
store float %116, ptr %117, align 4, !tbaa !29
%118 = call i64 @string_is_equal(ptr noundef %58, ptr noundef nonnull @.str.13) #5
%119 = icmp eq i64 %118, 0
br i1 %119, label %120, label %125
120: ; preds = %103
%121 = call i64 @string_is_equal(ptr noundef %58, ptr noundef nonnull @.str.14) #5
%122 = icmp eq i64 %121, 0
br i1 %122, label %123, label %125
123: ; preds = %120
%124 = call i32 (ptr, ...) @RARCH_ERR(ptr noundef nonnull @.str.15, ptr noundef %58) #5
br label %196
125: ; preds = %120, %103
%126 = phi ptr [ @OVERLAY_HITBOX_RADIAL, %103 ], [ @OVERLAY_HITBOX_RECT, %120 ]
%127 = load i32, ptr %126, align 4, !tbaa !9
%128 = getelementptr inbounds %struct.overlay_desc, ptr %1, i64 0, i32 18
store i32 %127, ptr %128, align 8, !tbaa !30
%129 = load i32, ptr %1, align 8, !tbaa !23
%130 = and i32 %129, -2
%131 = icmp eq i32 %130, 128
br i1 %131, label %132, label %144
132: ; preds = %125
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %19) #5
store i8 0, ptr %19, align 16, !tbaa !14
%133 = load i32, ptr @OVERLAY_HITBOX_RADIAL, align 4, !tbaa !9
%134 = icmp eq i32 %127, %133
br i1 %134, label %135, label %142
135: ; preds = %132
%136 = call i32 @snprintf(ptr noundef nonnull %19, i32 noundef 64, ptr noundef nonnull @.str.17, i32 noundef %3, i32 noundef %4) #5
%137 = call i64 @config_get_float(ptr noundef %20, ptr noundef nonnull %19, ptr noundef nonnull %15) #5
%138 = icmp eq i64 %137, 0
%139 = load float, ptr %15, align 4
%140 = select i1 %138, float 1.000000e+00, float %139
%141 = getelementptr inbounds %struct.overlay_desc, ptr %1, i64 0, i32 4
store float %140, ptr %141, align 8
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %19) #5
br label %144
142: ; preds = %132
%143 = call i32 (ptr, ...) @RARCH_ERR(ptr noundef nonnull @.str.16) #5
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %19) #5
br label %196
144: ; preds = %135, %125
%145 = load ptr, ptr %50, align 8, !tbaa !17
%146 = getelementptr inbounds %struct.TYPE_4__, ptr %145, i64 4
%147 = load ptr, ptr %146, align 8, !tbaa !18
%148 = call i64 @strtod(ptr noundef %147, ptr noundef null) #5
%149 = sitofp i64 %148 to float
%150 = fmul float %108, %149
%151 = getelementptr inbounds %struct.overlay_desc, ptr %1, i64 0, i32 5
store float %150, ptr %151, align 4, !tbaa !31
%152 = load ptr, ptr %50, align 8, !tbaa !17
%153 = getelementptr inbounds %struct.TYPE_4__, ptr %152, i64 5
%154 = load ptr, ptr %153, align 8, !tbaa !18
%155 = call i64 @strtod(ptr noundef %154, ptr noundef null) #5
%156 = sitofp i64 %155 to float
%157 = fmul float %109, %156
%158 = getelementptr inbounds %struct.overlay_desc, ptr %1, i64 0, i32 6
store float %157, ptr %158, align 8, !tbaa !32
%159 = load float, ptr %113, align 8, !tbaa !28
%160 = load float, ptr %151, align 4, !tbaa !31
%161 = fsub float %159, %160
%162 = getelementptr inbounds %struct.overlay_desc, ptr %1, i64 0, i32 7
store float %161, ptr %162, align 4, !tbaa !33
%163 = fmul float %160, 2.000000e+00
%164 = getelementptr inbounds %struct.overlay_desc, ptr %1, i64 0, i32 8
store float %163, ptr %164, align 8, !tbaa !34
%165 = load float, ptr %117, align 4, !tbaa !29
%166 = fsub float %165, %157
%167 = getelementptr inbounds %struct.overlay_desc, ptr %1, i64 0, i32 9
store float %166, ptr %167, align 4, !tbaa !35
%168 = fmul float %157, 2.000000e+00
%169 = getelementptr inbounds %struct.overlay_desc, ptr %1, i64 0, i32 10
store float %168, ptr %169, align 8, !tbaa !36
%170 = call i32 @snprintf(ptr noundef nonnull %12, i32 noundef 64, ptr noundef nonnull @.str.18, i32 noundef %3, i32 noundef %4) #5
%171 = getelementptr inbounds %struct.overlay_desc, ptr %1, i64 0, i32 11
store float %8, ptr %171, align 4, !tbaa !37
%172 = call i64 @config_get_float(ptr noundef %20, ptr noundef nonnull %12, ptr noundef nonnull %15) #5
%173 = icmp eq i64 %172, 0
br i1 %173, label %176, label %174
174: ; preds = %144
%175 = load float, ptr %15, align 4, !tbaa !5
store float %175, ptr %171, align 4, !tbaa !37
br label %176
176: ; preds = %174, %144
%177 = call i32 @snprintf(ptr noundef nonnull %12, i32 noundef 64, ptr noundef nonnull @.str.19, i32 noundef %3, i32 noundef %4) #5
%178 = getelementptr inbounds %struct.overlay_desc, ptr %1, i64 0, i32 12
store float %9, ptr %178, align 8, !tbaa !38
%179 = call i64 @config_get_float(ptr noundef %20, ptr noundef nonnull %12, ptr noundef nonnull %15) #5
%180 = icmp eq i64 %179, 0
br i1 %180, label %183, label %181
181: ; preds = %176
%182 = load float, ptr %15, align 4, !tbaa !5
store float %182, ptr %178, align 8, !tbaa !38
br label %183
183: ; preds = %181, %176
%184 = call i32 @snprintf(ptr noundef nonnull %12, i32 noundef 64, ptr noundef nonnull @.str.20, i32 noundef %3, i32 noundef %4) #5
%185 = getelementptr inbounds %struct.overlay_desc, ptr %1, i64 0, i32 13
store i32 0, ptr %185, align 4, !tbaa !39
%186 = getelementptr inbounds %struct.overlay_desc, ptr %1, i64 0, i32 14
store <2 x float> zeroinitializer, ptr %186, align 8, !tbaa !5
%187 = call i64 @config_get_bool(ptr noundef %20, ptr noundef nonnull %12, ptr noundef nonnull %16) #5
%188 = icmp eq i64 %187, 0
br i1 %188, label %191, label %189
189: ; preds = %183
%190 = load i32, ptr %16, align 4, !tbaa !9
store i32 %190, ptr %185, align 4, !tbaa !39
br label %191
191: ; preds = %189, %183
%192 = getelementptr inbounds %struct.overlay_desc, ptr %1, i64 0, i32 16
%193 = load <2 x float>, ptr %151, align 4, !tbaa !5
store <2 x float> %193, ptr %192, align 8, !tbaa !5
%194 = load i32, ptr %2, align 4, !tbaa !40
%195 = add nsw i32 %194, 1
store i32 %195, ptr %2, align 4, !tbaa !40
br label %196
196: ; preds = %123, %142, %191, %47
%197 = phi i32 [ 1, %191 ], [ 0, %47 ], [ 0, %142 ], [ 0, %123 ]
%198 = call i32 @string_list_free(ptr noundef nonnull %40) #5
br label %199
199: ; preds = %37, %42, %32, %196
%200 = phi i32 [ %197, %196 ], [ 0, %32 ], [ 0, %42 ], [ 0, %37 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %16) #5
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %15) #5
call void @llvm.lifetime.end.p0(i64 256, ptr nonnull %14) #5
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %13) #5
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %12) #5
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %11) #5
ret i32 %200
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @config_get_bool(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @RARCH_ERR(ptr noundef, ...) local_unnamed_addr #2
declare i32 @config_get_array(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @string_split(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @BIT256_CLEAR_ALL(i32 noundef) local_unnamed_addr #2
declare i64 @string_is_equal(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @input_config_translate_str_to_rk(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn
declare ptr @strtok_r(ptr noundef, ptr nocapture noundef readonly, ptr noundef) local_unnamed_addr #3
declare i32 @BIT256_SET(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @input_config_translate_str_to_bind_id(ptr noundef) local_unnamed_addr #2
declare i64 @BIT256_GET(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i64 @strtod(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @config_get_float(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @string_list_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: nofree nounwind willreturn memory(argmem: read)
declare i32 @strncmp(ptr nocapture, ptr nocapture, i64) local_unnamed_addr #4
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nofree nounwind willreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nofree nounwind willreturn memory(argmem: read) }
attributes #5 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_5__", !13, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!7, !7, i64 0}
!15 = !{!16, !10, i64 0}
!16 = !{!"string_list", !10, i64 0, !13, i64 8}
!17 = !{!16, !13, i64 8}
!18 = !{!19, !13, i64 0}
!19 = !{!"TYPE_4__", !13, i64 0}
!20 = !{!21, !10, i64 88}
!21 = !{!"overlay_desc", !10, i64 0, !13, i64 8, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !6, i64 56, !10, i64 60, !6, i64 64, !6, i64 68, !6, i64 72, !6, i64 76, !10, i64 80, !10, i64 84, !10, i64 88}
!22 = !{!21, !10, i64 84}
!23 = !{!21, !10, i64 0}
!24 = !{!13, !13, i64 0}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
!27 = !{!21, !13, i64 8}
!28 = !{!21, !6, i64 16}
!29 = !{!21, !6, i64 20}
!30 = !{!21, !10, i64 80}
!31 = !{!21, !6, i64 28}
!32 = !{!21, !6, i64 32}
!33 = !{!21, !6, i64 36}
!34 = !{!21, !6, i64 40}
!35 = !{!21, !6, i64 44}
!36 = !{!21, !6, i64 48}
!37 = !{!21, !6, i64 52}
!38 = !{!21, !6, i64 56}
!39 = !{!21, !10, i64 60}
!40 = !{!41, !10, i64 0}
!41 = !{!"overlay", !10, i64 0}
| ; ModuleID = 'AnghaBench/RetroArch/tasks/extr_task_overlay.c_task_overlay_load_desc.c'
source_filename = "AnghaBench/RetroArch/tasks/extr_task_overlay.c_task_overlay_load_desc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [17 x i8] c"overlay%u_desc%u\00", align 1
@.str.1 = private unnamed_addr constant [28 x i8] c"overlay%u_desc%u_normalized\00", align 1
@.str.2 = private unnamed_addr constant [74 x i8] c"[Overlay]: Base overlay is not set and not using normalized coordinates.\0A\00", align 1
@.str.3 = private unnamed_addr constant [33 x i8] c"[Overlay]: Didn't find key: %s.\0A\00", align 1
@.str.4 = private unnamed_addr constant [3 x i8] c", \00", align 1
@.str.5 = private unnamed_addr constant [42 x i8] c"[Overlay]: Failed to split overlay desc.\0A\00", align 1
@.str.6 = private unnamed_addr constant [65 x i8] c"[Overlay]: Overlay desc is invalid. Requires at least 6 tokens.\0A\00", align 1
@.str.7 = private unnamed_addr constant [12 x i8] c"analog_left\00", align 1
@.str.8 = private unnamed_addr constant [13 x i8] c"analog_right\00", align 1
@.str.9 = private unnamed_addr constant [8 x i8] c"retrok_\00", align 1
@OVERLAY_TYPE_KEYBOARD = common local_unnamed_addr global i32 0, align 4
@.str.10 = private unnamed_addr constant [2 x i8] c"|\00", align 1
@OVERLAY_TYPE_BUTTONS = common local_unnamed_addr global i32 0, align 4
@.str.11 = private unnamed_addr constant [4 x i8] c"nul\00", align 1
@RARCH_OVERLAY_NEXT = common local_unnamed_addr global i32 0, align 4
@.str.12 = private unnamed_addr constant [29 x i8] c"overlay%u_desc%u_next_target\00", align 1
@.str.13 = private unnamed_addr constant [7 x i8] c"radial\00", align 1
@OVERLAY_HITBOX_RADIAL = common local_unnamed_addr global i32 0, align 4
@.str.14 = private unnamed_addr constant [5 x i8] c"rect\00", align 1
@OVERLAY_HITBOX_RECT = common local_unnamed_addr global i32 0, align 4
@.str.15 = private unnamed_addr constant [65 x i8] c"[Overlay]: Hitbox type (%s) is invalid. Use \22radial\22 or \22rect\22.\0A\00", align 1
@.str.16 = private unnamed_addr constant [49 x i8] c"[Overlay]: Analog hitbox type must be \22radial\22.\0A\00", align 1
@.str.17 = private unnamed_addr constant [30 x i8] c"overlay%u_desc%u_saturate_pct\00", align 1
@.str.18 = private unnamed_addr constant [27 x i8] c"overlay%u_desc%u_alpha_mod\00", align 1
@.str.19 = private unnamed_addr constant [27 x i8] c"overlay%u_desc%u_range_mod\00", align 1
@.str.20 = private unnamed_addr constant [25 x i8] c"overlay%u_desc%u_movable\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @task_overlay_load_desc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @task_overlay_load_desc(ptr nocapture noundef readonly %0, ptr nocapture noundef %1, ptr nocapture noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, float noundef %8, float noundef %9) #0 {
%11 = alloca [64 x i8], align 1
%12 = alloca [64 x i8], align 1
%13 = alloca [64 x i8], align 1
%14 = alloca [256 x i8], align 1
%15 = alloca float, align 4
%16 = alloca i32, align 4
%17 = alloca ptr, align 8
%18 = alloca [64 x i8], align 1
%19 = alloca [64 x i8], align 1
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %11) #5
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %12) #5
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %13) #5
call void @llvm.lifetime.start.p0(i64 256, ptr nonnull %14) #5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %15) #5
store float 0.000000e+00, ptr %15, align 4, !tbaa !6
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %16) #5
store i32 0, ptr %16, align 4, !tbaa !10
%20 = load ptr, ptr %0, align 8, !tbaa !12
store i8 0, ptr %14, align 1, !tbaa !15
store i8 0, ptr %13, align 1, !tbaa !15
store i8 0, ptr %12, align 1, !tbaa !15
store i8 0, ptr %11, align 1, !tbaa !15
%21 = call i32 @snprintf(ptr noundef nonnull %11, i32 noundef 64, ptr noundef nonnull @.str, i32 noundef %3, i32 noundef %4) #5
%22 = call i32 @snprintf(ptr noundef nonnull %13, i32 noundef 64, ptr noundef nonnull @.str.1, i32 noundef %3, i32 noundef %4) #5
%23 = call i64 @config_get_bool(ptr noundef %20, ptr noundef nonnull %13, ptr noundef nonnull %16) #5
%24 = icmp eq i64 %23, 0
%25 = load i32, ptr %16, align 4
%26 = select i1 %24, i32 %7, i32 %25
%27 = icmp eq i32 %26, 0
br i1 %27, label %28, label %34
28: ; preds = %10
%29 = icmp eq i32 %5, 0
%30 = icmp eq i32 %6, 0
%31 = or i1 %29, %30
br i1 %31, label %32, label %34
32: ; preds = %28
%33 = call i32 (ptr, ...) @RARCH_ERR(ptr noundef nonnull @.str.2) #5
br label %201
34: ; preds = %28, %10
%35 = call i32 @config_get_array(ptr noundef %20, ptr noundef nonnull %11, ptr noundef nonnull %14, i32 noundef 256) #5
%36 = icmp eq i32 %35, 0
br i1 %36, label %37, label %39
37: ; preds = %34
%38 = call i32 (ptr, ...) @RARCH_ERR(ptr noundef nonnull @.str.3, ptr noundef nonnull %11) #5
br label %201
39: ; preds = %34
%40 = call ptr @string_split(ptr noundef nonnull %14, ptr noundef nonnull @.str.4) #5
%41 = icmp eq ptr %40, null
br i1 %41, label %42, label %44
42: ; preds = %39
%43 = call i32 (ptr, ...) @RARCH_ERR(ptr noundef nonnull @.str.5) #5
br label %201
44: ; preds = %39
%45 = load i32, ptr %40, align 8, !tbaa !16
%46 = icmp slt i32 %45, 6
br i1 %46, label %47, label %49
47: ; preds = %44
%48 = call i32 (ptr, ...) @RARCH_ERR(ptr noundef nonnull @.str.6) #5
br label %198
49: ; preds = %44
%50 = getelementptr inbounds i8, ptr %40, i64 8
%51 = load ptr, ptr %50, align 8, !tbaa !18
%52 = load ptr, ptr %51, align 8, !tbaa !19
%53 = getelementptr inbounds i8, ptr %51, i64 8
%54 = load ptr, ptr %53, align 8, !tbaa !19
%55 = getelementptr inbounds i8, ptr %51, i64 16
%56 = load ptr, ptr %55, align 8, !tbaa !19
%57 = getelementptr inbounds i8, ptr %51, i64 24
%58 = load ptr, ptr %57, align 8, !tbaa !19
%59 = getelementptr inbounds i8, ptr %1, i64 88
store i32 0, ptr %59, align 8, !tbaa !21
%60 = getelementptr inbounds i8, ptr %1, i64 84
%61 = load i32, ptr %60, align 4, !tbaa !23
%62 = call i32 @BIT256_CLEAR_ALL(i32 noundef %61) #5
%63 = call i64 @string_is_equal(ptr noundef %52, ptr noundef nonnull @.str.7) #5
%64 = icmp eq i64 %63, 0
br i1 %64, label %66, label %65
65: ; preds = %49
store i32 129, ptr %1, align 8, !tbaa !24
br label %103
66: ; preds = %49
%67 = call i64 @string_is_equal(ptr noundef %52, ptr noundef nonnull @.str.8) #5
%68 = icmp eq i64 %67, 0
br i1 %68, label %70, label %69
69: ; preds = %66
store i32 128, ptr %1, align 8, !tbaa !24
br label %103
70: ; preds = %66
%71 = call i32 @strncmp(ptr noundef nonnull dereferenceable(1) %52, ptr noundef nonnull dereferenceable(8) @.str.9, i64 7)
%72 = icmp eq i32 %71, 0
br i1 %72, label %73, label %77
73: ; preds = %70
%74 = load i32, ptr @OVERLAY_TYPE_KEYBOARD, align 4, !tbaa !10
store i32 %74, ptr %1, align 8, !tbaa !24
%75 = getelementptr inbounds i8, ptr %52, i64 7
%76 = call i32 @input_config_translate_str_to_rk(ptr noundef nonnull %75) #5
store i32 %76, ptr %59, align 8, !tbaa !21
br label %103
77: ; preds = %70
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %17) #5
store ptr null, ptr %17, align 8, !tbaa !25
%78 = call ptr @strtok_r(ptr noundef %52, ptr noundef nonnull @.str.10, ptr noundef nonnull %17)
%79 = load i32, ptr @OVERLAY_TYPE_BUTTONS, align 4, !tbaa !10
store i32 %79, ptr %1, align 8, !tbaa !24
%80 = icmp eq ptr %78, null
br i1 %80, label %92, label %81
81: ; preds = %77, %89
%82 = phi ptr [ %90, %89 ], [ %78, %77 ]
%83 = call i64 @string_is_equal(ptr noundef nonnull %82, ptr noundef nonnull @.str.11) #5
%84 = icmp eq i64 %83, 0
br i1 %84, label %85, label %89
85: ; preds = %81
%86 = load i32, ptr %60, align 4, !tbaa !23
%87 = call i32 @input_config_translate_str_to_bind_id(ptr noundef nonnull %82) #5
%88 = call i32 @BIT256_SET(i32 noundef %86, i32 noundef %87) #5
br label %89
89: ; preds = %81, %85
%90 = call ptr @strtok_r(ptr noundef null, ptr noundef nonnull @.str.10, ptr noundef nonnull %17)
%91 = icmp eq ptr %90, null
br i1 %91, label %92, label %81, !llvm.loop !26
92: ; preds = %89, %77
%93 = load i32, ptr %60, align 4, !tbaa !23
%94 = load i32, ptr @RARCH_OVERLAY_NEXT, align 4, !tbaa !10
%95 = call i64 @BIT256_GET(i32 noundef %93, i32 noundef %94) #5
%96 = icmp eq i64 %95, 0
br i1 %96, label %102, label %97
97: ; preds = %92
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %18) #5
%98 = call i32 @snprintf(ptr noundef nonnull %18, i32 noundef 64, ptr noundef nonnull @.str.12, i32 noundef %3, i32 noundef %4) #5
%99 = getelementptr inbounds i8, ptr %1, i64 8
%100 = load ptr, ptr %99, align 8, !tbaa !28
%101 = call i32 @config_get_array(ptr noundef %20, ptr noundef nonnull %18, ptr noundef %100, i32 noundef 8) #5
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %18) #5
br label %102
102: ; preds = %97, %92
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %17) #5
br label %103
103: ; preds = %69, %102, %73, %65
br i1 %27, label %104, label %109
104: ; preds = %103
%105 = uitofp i32 %5 to float
%106 = fdiv float 1.000000e+00, %105
%107 = uitofp i32 %6 to float
%108 = fdiv float 1.000000e+00, %107
br label %109
109: ; preds = %104, %103
%110 = phi float [ %106, %104 ], [ 1.000000e+00, %103 ]
%111 = phi float [ %108, %104 ], [ 1.000000e+00, %103 ]
%112 = call i64 @strtod(ptr noundef %54, ptr noundef null) #5
%113 = sitofp i64 %112 to float
%114 = fmul float %110, %113
%115 = getelementptr inbounds i8, ptr %1, i64 16
store float %114, ptr %115, align 8, !tbaa !29
%116 = call i64 @strtod(ptr noundef %56, ptr noundef null) #5
%117 = sitofp i64 %116 to float
%118 = fmul float %111, %117
%119 = getelementptr inbounds i8, ptr %1, i64 20
store float %118, ptr %119, align 4, !tbaa !30
%120 = call i64 @string_is_equal(ptr noundef %58, ptr noundef nonnull @.str.13) #5
%121 = icmp eq i64 %120, 0
br i1 %121, label %122, label %127
122: ; preds = %109
%123 = call i64 @string_is_equal(ptr noundef %58, ptr noundef nonnull @.str.14) #5
%124 = icmp eq i64 %123, 0
br i1 %124, label %125, label %127
125: ; preds = %122
%126 = call i32 (ptr, ...) @RARCH_ERR(ptr noundef nonnull @.str.15, ptr noundef %58) #5
br label %198
127: ; preds = %122, %109
%128 = phi ptr [ @OVERLAY_HITBOX_RADIAL, %109 ], [ @OVERLAY_HITBOX_RECT, %122 ]
%129 = load i32, ptr %128, align 4, !tbaa !10
%130 = getelementptr inbounds i8, ptr %1, i64 80
store i32 %129, ptr %130, align 8, !tbaa !31
%131 = load i32, ptr %1, align 8, !tbaa !24
%132 = and i32 %131, -2
%133 = icmp eq i32 %132, 128
br i1 %133, label %134, label %146
134: ; preds = %127
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %19) #5
store i8 0, ptr %19, align 1, !tbaa !15
%135 = load i32, ptr @OVERLAY_HITBOX_RADIAL, align 4, !tbaa !10
%136 = icmp eq i32 %129, %135
br i1 %136, label %137, label %144
137: ; preds = %134
%138 = call i32 @snprintf(ptr noundef nonnull %19, i32 noundef 64, ptr noundef nonnull @.str.17, i32 noundef %3, i32 noundef %4) #5
%139 = call i64 @config_get_float(ptr noundef %20, ptr noundef nonnull %19, ptr noundef nonnull %15) #5
%140 = icmp eq i64 %139, 0
%141 = load float, ptr %15, align 4
%142 = select i1 %140, float 1.000000e+00, float %141
%143 = getelementptr inbounds i8, ptr %1, i64 24
store float %142, ptr %143, align 8
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %19) #5
br label %146
144: ; preds = %134
%145 = call i32 (ptr, ...) @RARCH_ERR(ptr noundef nonnull @.str.16) #5
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %19) #5
br label %198
146: ; preds = %137, %127
%147 = load ptr, ptr %50, align 8, !tbaa !18
%148 = getelementptr inbounds i8, ptr %147, i64 32
%149 = load ptr, ptr %148, align 8, !tbaa !19
%150 = call i64 @strtod(ptr noundef %149, ptr noundef null) #5
%151 = sitofp i64 %150 to float
%152 = fmul float %110, %151
%153 = getelementptr inbounds i8, ptr %1, i64 28
store float %152, ptr %153, align 4, !tbaa !32
%154 = load ptr, ptr %50, align 8, !tbaa !18
%155 = getelementptr inbounds i8, ptr %154, i64 40
%156 = load ptr, ptr %155, align 8, !tbaa !19
%157 = call i64 @strtod(ptr noundef %156, ptr noundef null) #5
%158 = sitofp i64 %157 to float
%159 = fmul float %111, %158
%160 = getelementptr inbounds i8, ptr %1, i64 32
store float %159, ptr %160, align 8, !tbaa !33
%161 = load float, ptr %115, align 8, !tbaa !29
%162 = load float, ptr %153, align 4, !tbaa !32
%163 = fsub float %161, %162
%164 = getelementptr inbounds i8, ptr %1, i64 36
store float %163, ptr %164, align 4, !tbaa !34
%165 = fmul float %162, 2.000000e+00
%166 = getelementptr inbounds i8, ptr %1, i64 40
store float %165, ptr %166, align 8, !tbaa !35
%167 = load float, ptr %119, align 4, !tbaa !30
%168 = fsub float %167, %159
%169 = getelementptr inbounds i8, ptr %1, i64 44
store float %168, ptr %169, align 4, !tbaa !36
%170 = fmul float %159, 2.000000e+00
%171 = getelementptr inbounds i8, ptr %1, i64 48
store float %170, ptr %171, align 8, !tbaa !37
%172 = call i32 @snprintf(ptr noundef nonnull %12, i32 noundef 64, ptr noundef nonnull @.str.18, i32 noundef %3, i32 noundef %4) #5
%173 = getelementptr inbounds i8, ptr %1, i64 52
store float %8, ptr %173, align 4, !tbaa !38
%174 = call i64 @config_get_float(ptr noundef %20, ptr noundef nonnull %12, ptr noundef nonnull %15) #5
%175 = icmp eq i64 %174, 0
br i1 %175, label %178, label %176
176: ; preds = %146
%177 = load float, ptr %15, align 4, !tbaa !6
store float %177, ptr %173, align 4, !tbaa !38
br label %178
178: ; preds = %176, %146
%179 = call i32 @snprintf(ptr noundef nonnull %12, i32 noundef 64, ptr noundef nonnull @.str.19, i32 noundef %3, i32 noundef %4) #5
%180 = getelementptr inbounds i8, ptr %1, i64 56
store float %9, ptr %180, align 8, !tbaa !39
%181 = call i64 @config_get_float(ptr noundef %20, ptr noundef nonnull %12, ptr noundef nonnull %15) #5
%182 = icmp eq i64 %181, 0
br i1 %182, label %185, label %183
183: ; preds = %178
%184 = load float, ptr %15, align 4, !tbaa !6
store float %184, ptr %180, align 8, !tbaa !39
br label %185
185: ; preds = %183, %178
%186 = call i32 @snprintf(ptr noundef nonnull %12, i32 noundef 64, ptr noundef nonnull @.str.20, i32 noundef %3, i32 noundef %4) #5
%187 = getelementptr inbounds i8, ptr %1, i64 60
store i32 0, ptr %187, align 4, !tbaa !40
%188 = getelementptr inbounds i8, ptr %1, i64 64
store <2 x float> zeroinitializer, ptr %188, align 8, !tbaa !6
%189 = call i64 @config_get_bool(ptr noundef %20, ptr noundef nonnull %12, ptr noundef nonnull %16) #5
%190 = icmp eq i64 %189, 0
br i1 %190, label %193, label %191
191: ; preds = %185
%192 = load i32, ptr %16, align 4, !tbaa !10
store i32 %192, ptr %187, align 4, !tbaa !40
br label %193
193: ; preds = %191, %185
%194 = getelementptr inbounds i8, ptr %1, i64 72
%195 = load <2 x float>, ptr %153, align 4, !tbaa !6
store <2 x float> %195, ptr %194, align 8, !tbaa !6
%196 = load i32, ptr %2, align 4, !tbaa !41
%197 = add nsw i32 %196, 1
store i32 %197, ptr %2, align 4, !tbaa !41
br label %198
198: ; preds = %125, %144, %193, %47
%199 = phi i32 [ 1, %193 ], [ 0, %47 ], [ 0, %144 ], [ 0, %125 ]
%200 = call i32 @string_list_free(ptr noundef nonnull %40) #5
br label %201
201: ; preds = %37, %42, %32, %198
%202 = phi i32 [ %199, %198 ], [ 0, %32 ], [ 0, %42 ], [ 0, %37 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %16) #5
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %15) #5
call void @llvm.lifetime.end.p0(i64 256, ptr nonnull %14) #5
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %13) #5
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %12) #5
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %11) #5
ret i32 %202
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @config_get_bool(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @RARCH_ERR(ptr noundef, ...) local_unnamed_addr #2
declare i32 @config_get_array(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @string_split(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @BIT256_CLEAR_ALL(i32 noundef) local_unnamed_addr #2
declare i64 @string_is_equal(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @input_config_translate_str_to_rk(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn
declare ptr @strtok_r(ptr noundef, ptr nocapture noundef readonly, ptr noundef) local_unnamed_addr #3
declare i32 @BIT256_SET(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @input_config_translate_str_to_bind_id(ptr noundef) local_unnamed_addr #2
declare i64 @BIT256_GET(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i64 @strtod(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @config_get_float(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @string_list_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: nofree nounwind willreturn memory(argmem: read)
declare i32 @strncmp(ptr nocapture, ptr nocapture, i64) local_unnamed_addr #4
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { mustprogress nofree nounwind willreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nofree nounwind willreturn memory(argmem: read) }
attributes #5 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"float", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_5__", !14, i64 0}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!8, !8, i64 0}
!16 = !{!17, !11, i64 0}
!17 = !{!"string_list", !11, i64 0, !14, i64 8}
!18 = !{!17, !14, i64 8}
!19 = !{!20, !14, i64 0}
!20 = !{!"TYPE_4__", !14, i64 0}
!21 = !{!22, !11, i64 88}
!22 = !{!"overlay_desc", !11, i64 0, !14, i64 8, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !11, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !11, i64 80, !11, i64 84, !11, i64 88}
!23 = !{!22, !11, i64 84}
!24 = !{!22, !11, i64 0}
!25 = !{!14, !14, i64 0}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}
!28 = !{!22, !14, i64 8}
!29 = !{!22, !7, i64 16}
!30 = !{!22, !7, i64 20}
!31 = !{!22, !11, i64 80}
!32 = !{!22, !7, i64 28}
!33 = !{!22, !7, i64 32}
!34 = !{!22, !7, i64 36}
!35 = !{!22, !7, i64 40}
!36 = !{!22, !7, i64 44}
!37 = !{!22, !7, i64 48}
!38 = !{!22, !7, i64 52}
!39 = !{!22, !7, i64 56}
!40 = !{!22, !11, i64 60}
!41 = !{!42, !11, i64 0}
!42 = !{!"overlay", !11, i64 0}
| RetroArch_tasks_extr_task_overlay.c_task_overlay_load_desc |
; ModuleID = 'AnghaBench/linux/arch/mips/kvm/extr_vz.c_kvm_trap_vz_handle_ghfc.c'
source_filename = "AnghaBench/linux/arch/mips/kvm/extr_vz.c_kvm_trap_vz_handle_ghfc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EMULATE_DONE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @kvm_trap_vz_handle_ghfc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @kvm_trap_vz_handle_ghfc(i32 %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call i32 @trace_kvm_guest_mode_change(ptr noundef %2) #2
%5 = load i32, ptr @EMULATE_DONE, align 4, !tbaa !5
ret i32 %5
}
declare i32 @trace_kvm_guest_mode_change(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/arch/mips/kvm/extr_vz.c_kvm_trap_vz_handle_ghfc.c'
source_filename = "AnghaBench/linux/arch/mips/kvm/extr_vz.c_kvm_trap_vz_handle_ghfc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EMULATE_DONE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @kvm_trap_vz_handle_ghfc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @kvm_trap_vz_handle_ghfc(i32 %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call i32 @trace_kvm_guest_mode_change(ptr noundef %2) #2
%5 = load i32, ptr @EMULATE_DONE, align 4, !tbaa !6
ret i32 %5
}
declare i32 @trace_kvm_guest_mode_change(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_arch_mips_kvm_extr_vz.c_kvm_trap_vz_handle_ghfc |
; ModuleID = 'AnghaBench/openwrt/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/extr_ethtool.c_fe_get_link_ksettings.c'
source_filename = "AnghaBench/openwrt/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/extr_ethtool.c_fe_get_link_ksettings.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.fe_priv = type { i64, i32 }
@ENODEV = dso_local local_unnamed_addr global i32 0, align 4
@FE_PHY_FLAG_ATTACH = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @fe_get_link_ksettings], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @fe_get_link_ksettings(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call ptr @netdev_priv(ptr noundef %0) #2
%4 = getelementptr inbounds %struct.fe_priv, ptr %3, i64 0, i32 1
%5 = load i32, ptr %4, align 8, !tbaa !5
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, ptr @ENODEV, align 4, !tbaa !11
%9 = sub nsw i32 0, %8
br label %23
10: ; preds = %2
%11 = load i64, ptr %3, align 8, !tbaa !12
%12 = load i64, ptr @FE_PHY_FLAG_ATTACH, align 8, !tbaa !13
%13 = icmp eq i64 %11, %12
br i1 %13, label %14, label %20
14: ; preds = %10
%15 = tail call i64 @phy_read_status(i32 noundef %5) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %20, label %17
17: ; preds = %14
%18 = load i32, ptr @ENODEV, align 4, !tbaa !11
%19 = sub nsw i32 0, %18
br label %23
20: ; preds = %14, %10
%21 = load i32, ptr %0, align 4, !tbaa !14
%22 = tail call i32 @phy_ethtool_ksettings_get(i32 noundef %21, ptr noundef %1) #2
br label %23
23: ; preds = %20, %17, %7
%24 = phi i32 [ %19, %17 ], [ 0, %20 ], [ %9, %7 ]
ret i32 %24
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i64 @phy_read_status(i32 noundef) local_unnamed_addr #1
declare i32 @phy_ethtool_ksettings_get(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"fe_priv", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = !{!15, !10, i64 0}
!15 = !{!"net_device", !10, i64 0}
| ; ModuleID = 'AnghaBench/openwrt/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/extr_ethtool.c_fe_get_link_ksettings.c'
source_filename = "AnghaBench/openwrt/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/extr_ethtool.c_fe_get_link_ksettings.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENODEV = common local_unnamed_addr global i32 0, align 4
@FE_PHY_FLAG_ATTACH = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @fe_get_link_ksettings], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @fe_get_link_ksettings(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call ptr @netdev_priv(ptr noundef %0) #2
%4 = getelementptr inbounds i8, ptr %3, i64 8
%5 = load i32, ptr %4, align 8, !tbaa !6
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, ptr @ENODEV, align 4, !tbaa !12
%9 = sub nsw i32 0, %8
br label %23
10: ; preds = %2
%11 = load i64, ptr %3, align 8, !tbaa !13
%12 = load i64, ptr @FE_PHY_FLAG_ATTACH, align 8, !tbaa !14
%13 = icmp eq i64 %11, %12
br i1 %13, label %14, label %20
14: ; preds = %10
%15 = tail call i64 @phy_read_status(i32 noundef %5) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %20, label %17
17: ; preds = %14
%18 = load i32, ptr @ENODEV, align 4, !tbaa !12
%19 = sub nsw i32 0, %18
br label %23
20: ; preds = %14, %10
%21 = load i32, ptr %0, align 4, !tbaa !15
%22 = tail call i32 @phy_ethtool_ksettings_get(i32 noundef %21, ptr noundef %1) #2
br label %23
23: ; preds = %20, %17, %7
%24 = phi i32 [ %19, %17 ], [ 0, %20 ], [ %9, %7 ]
ret i32 %24
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i64 @phy_read_status(i32 noundef) local_unnamed_addr #1
declare i32 @phy_ethtool_ksettings_get(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"fe_priv", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!8, !8, i64 0}
!15 = !{!16, !11, i64 0}
!16 = !{!"net_device", !11, i64 0}
| openwrt_target_linux_ramips_files-4.14_drivers_net_ethernet_mediatek_extr_ethtool.c_fe_get_link_ksettings |
; ModuleID = 'AnghaBench/freebsd/lib/libpmc/pmu-events/extr_list.h_list_splice.c'
source_filename = "AnghaBench/freebsd/lib/libpmc/pmu-events/extr_list.h_list_splice.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @list_splice], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @list_splice(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr %1, align 4, !tbaa !5
%4 = tail call i32 @linux_list_splice(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %3) #2
ret void
}
declare i32 @linux_list_splice(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"list_head", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/lib/libpmc/pmu-events/extr_list.h_list_splice.c'
source_filename = "AnghaBench/freebsd/lib/libpmc/pmu-events/extr_list.h_list_splice.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @list_splice], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @list_splice(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr %1, align 4, !tbaa !6
%4 = tail call i32 @linux_list_splice(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %3) #2
ret void
}
declare i32 @linux_list_splice(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"list_head", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_lib_libpmc_pmu-events_extr_list.h_list_splice |
; ModuleID = 'AnghaBench/freebsd/sys/contrib/ncsw/Peripherals/FM/MAC/extr_fm_mac.c_FM_MAC_GetId.c'
source_filename = "AnghaBench/freebsd/sys/contrib/ncsw/Peripherals/FM/MAC/extr_fm_mac.c_FM_MAC_GetId.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@E_INVALID_HANDLE = dso_local local_unnamed_addr global i32 0, align 4
@MINOR = dso_local local_unnamed_addr global i32 0, align 4
@E_NOT_SUPPORTED = dso_local local_unnamed_addr global i32 0, align 4
@NO_MSG = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @FM_MAC_GetId(i64 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = inttoptr i64 %0 to ptr
%4 = load i32, ptr @E_INVALID_HANDLE, align 4, !tbaa !5
%5 = tail call i32 @SANITY_CHECK_RETURN_ERROR(ptr noundef %3, i32 noundef %4) #2
%6 = load ptr, ptr %3, align 8, !tbaa !9
%7 = icmp eq ptr %6, null
br i1 %7, label %10, label %8
8: ; preds = %2
%9 = tail call i32 %6(i64 noundef %0, ptr noundef %1) #2
br label %15
10: ; preds = %2
%11 = load i32, ptr @MINOR, align 4, !tbaa !5
%12 = load i32, ptr @E_NOT_SUPPORTED, align 4, !tbaa !5
%13 = load i32, ptr @NO_MSG, align 4, !tbaa !5
%14 = tail call i32 @RETURN_ERROR(i32 noundef %11, i32 noundef %12, i32 noundef %13) #2
br label %15
15: ; preds = %10, %8
%16 = phi i32 [ %9, %8 ], [ undef, %10 ]
ret i32 %16
}
declare i32 @SANITY_CHECK_RETURN_ERROR(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @RETURN_ERROR(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_3__", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/contrib/ncsw/Peripherals/FM/MAC/extr_fm_mac.c_FM_MAC_GetId.c'
source_filename = "AnghaBench/freebsd/sys/contrib/ncsw/Peripherals/FM/MAC/extr_fm_mac.c_FM_MAC_GetId.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@E_INVALID_HANDLE = common local_unnamed_addr global i32 0, align 4
@MINOR = common local_unnamed_addr global i32 0, align 4
@E_NOT_SUPPORTED = common local_unnamed_addr global i32 0, align 4
@NO_MSG = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @FM_MAC_GetId(i64 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = inttoptr i64 %0 to ptr
%4 = load i32, ptr @E_INVALID_HANDLE, align 4, !tbaa !6
%5 = tail call i32 @SANITY_CHECK_RETURN_ERROR(ptr noundef %3, i32 noundef %4) #2
%6 = load ptr, ptr %3, align 8, !tbaa !10
%7 = icmp eq ptr %6, null
br i1 %7, label %10, label %8
8: ; preds = %2
%9 = tail call i32 %6(i64 noundef %0, ptr noundef %1) #2
br label %15
10: ; preds = %2
%11 = load i32, ptr @MINOR, align 4, !tbaa !6
%12 = load i32, ptr @E_NOT_SUPPORTED, align 4, !tbaa !6
%13 = load i32, ptr @NO_MSG, align 4, !tbaa !6
%14 = tail call i32 @RETURN_ERROR(i32 noundef %11, i32 noundef %12, i32 noundef %13) #2
br label %15
15: ; preds = %10, %8
%16 = phi i32 [ %9, %8 ], [ undef, %10 ]
ret i32 %16
}
declare i32 @SANITY_CHECK_RETURN_ERROR(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @RETURN_ERROR(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_3__", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
| freebsd_sys_contrib_ncsw_Peripherals_FM_MAC_extr_fm_mac.c_FM_MAC_GetId |
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Link.c_LinkPaGetCancel.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Link.c_LinkPaGetCancel.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noalias noundef ptr @LinkPaGetCancel(ptr nocapture noundef readnone %0) local_unnamed_addr #0 {
ret ptr null
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Link.c_LinkPaGetCancel.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Link.c_LinkPaGetCancel.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noalias noundef ptr @LinkPaGetCancel(ptr nocapture noundef readnone %0) local_unnamed_addr #0 {
ret ptr null
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| SoftEtherVPN_src_Cedar_extr_Link.c_LinkPaGetCancel |
; ModuleID = 'AnghaBench/freebsd/stand/i386/boot2/extr_boot2.c_xfsread.c'
source_filename = "AnghaBench/freebsd/stand/i386/boot2/extr_boot2.c_xfsread.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [12 x i8] c"Invalid %s\0A\00", align 1
@.str.1 = private unnamed_addr constant [7 x i8] c"format\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @xfsread], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @xfsread(i32 noundef %0, ptr noundef %1, i64 noundef %2) #0 {
%4 = tail call i64 @fsread(i32 noundef %0, ptr noundef %1, i64 noundef %2) #2
%5 = icmp eq i64 %4, %2
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @printf(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1) #2
br label %8
8: ; preds = %3, %6
%9 = phi i32 [ -1, %6 ], [ 0, %3 ]
ret i32 %9
}
declare i64 @fsread(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @printf(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/stand/i386/boot2/extr_boot2.c_xfsread.c'
source_filename = "AnghaBench/freebsd/stand/i386/boot2/extr_boot2.c_xfsread.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [12 x i8] c"Invalid %s\0A\00", align 1
@.str.1 = private unnamed_addr constant [7 x i8] c"format\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @xfsread], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -1, 1) i32 @xfsread(i32 noundef %0, ptr noundef %1, i64 noundef %2) #0 {
%4 = tail call i64 @fsread(i32 noundef %0, ptr noundef %1, i64 noundef %2) #2
%5 = icmp eq i64 %4, %2
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @printf(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1) #2
br label %8
8: ; preds = %3, %6
%9 = phi i32 [ -1, %6 ], [ 0, %3 ]
ret i32 %9
}
declare i64 @fsread(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @printf(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_stand_i386_boot2_extr_boot2.c_xfsread |
; ModuleID = 'AnghaBench/Provenance/Cores/PicoDrive/platform/win32/extr_plat.c_plat_wait_event.c'
source_filename = "AnghaBench/Provenance/Cores/PicoDrive/platform/win32/extr_plat.c_plat_wait_event.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i32 @plat_wait_event(ptr nocapture noundef readnone %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
ret i32 -1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/Provenance/Cores/PicoDrive/platform/win32/extr_plat.c_plat_wait_event.c'
source_filename = "AnghaBench/Provenance/Cores/PicoDrive/platform/win32/extr_plat.c_plat_wait_event.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef i32 @plat_wait_event(ptr nocapture noundef readnone %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
ret i32 -1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| Provenance_Cores_PicoDrive_platform_win32_extr_plat.c_plat_wait_event |
; ModuleID = 'AnghaBench/lab/engine/code/q3_ui/extr_ui_playersettings.c_PlayerSettings_MenuKey.c'
source_filename = "AnghaBench/lab/engine/code/q3_ui/extr_ui_playersettings.c_PlayerSettings_MenuKey.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
%struct.TYPE_2__ = type { i32 }
@K_MOUSE2 = dso_local local_unnamed_addr global i32 0, align 4
@K_ESCAPE = dso_local local_unnamed_addr global i32 0, align 4
@s_playersettings = dso_local global %struct.TYPE_2__ zeroinitializer, align 4
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (i32 (i32)* @PlayerSettings_MenuKey to i8*)], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @PlayerSettings_MenuKey(i32 noundef %0) #0 {
%2 = load i32, i32* @K_MOUSE2, align 4, !tbaa !5
%3 = icmp eq i32 %2, %0
%4 = load i32, i32* @K_ESCAPE, align 4
%5 = icmp eq i32 %4, %0
%6 = select i1 %3, i1 true, i1 %5
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = tail call i32 (...) @PlayerSettings_SaveChanges() #2
br label %9
9: ; preds = %1, %7
%10 = tail call i32 @Menu_DefaultKey(i32* noundef getelementptr inbounds (%struct.TYPE_2__, %struct.TYPE_2__* @s_playersettings, i64 0, i32 0), i32 noundef %0) #2
ret i32 %10
}
declare i32 @PlayerSettings_SaveChanges(...) local_unnamed_addr #1
declare i32 @Menu_DefaultKey(i32* noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 7, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{!"Ubuntu clang version 14.0.0-1ubuntu1.1"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/lab/engine/code/q3_ui/extr_ui_playersettings.c_PlayerSettings_MenuKey.c'
source_filename = "AnghaBench/lab/engine/code/q3_ui/extr_ui_playersettings.c_PlayerSettings_MenuKey.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32 }
@K_MOUSE2 = common local_unnamed_addr global i32 0, align 4
@K_ESCAPE = common local_unnamed_addr global i32 0, align 4
@s_playersettings = common global %struct.TYPE_2__ zeroinitializer, align 4
@llvm.used = appending global [1 x ptr] [ptr @PlayerSettings_MenuKey], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @PlayerSettings_MenuKey(i32 noundef %0) #0 {
%2 = load i32, ptr @K_MOUSE2, align 4, !tbaa !6
%3 = icmp eq i32 %2, %0
%4 = load i32, ptr @K_ESCAPE, align 4
%5 = icmp eq i32 %4, %0
%6 = select i1 %3, i1 true, i1 %5
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = tail call i32 @PlayerSettings_SaveChanges() #2
br label %9
9: ; preds = %1, %7
%10 = tail call i32 @Menu_DefaultKey(ptr noundef nonnull @s_playersettings, i32 noundef %0) #2
ret i32 %10
}
declare i32 @PlayerSettings_SaveChanges(...) local_unnamed_addr #1
declare i32 @Menu_DefaultKey(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| lab_engine_code_q3_ui_extr_ui_playersettings.c_PlayerSettings_MenuKey |
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