IR_x86 string | IR_arm string | filename string |
|---|---|---|
; ModuleID = 'AnghaBench/linux/net/dccp/ccids/extr_ccid2.c_ccid2_rtt_estimator.c'
source_filename = "AnghaBench/linux/net/dccp/ccids/extr_ccid2.c_ccid2_rtt_estimator.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ccid2_hc_tx_sock = type { i64, i64, i64, i64, i32, i32 }
%struct.TYPE_2__ = type { i32, i32 }
@DCCP_RTO_MAX = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ccid2_rtt_estimator], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ccid2_rtt_estimator(ptr noundef %0, i64 noundef %1) #0 {
%3 = tail call ptr @ccid2_hc_tx_sk(ptr noundef %0) #3
%4 = tail call i64 @llvm.umax.i64(i64 %1, i64 1)
%5 = load i64, ptr %3, align 8, !tbaa !5
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %18
7: ; preds = %2
%8 = shl i64 %4, 3
store i64 %8, ptr %3, align 8, !tbaa !5
%9 = shl i64 %4, 1
%10 = getelementptr inbounds %struct.ccid2_hc_tx_sock, ptr %3, i64 0, i32 1
store i64 %9, ptr %10, align 8, !tbaa !11
%11 = tail call i32 @tcp_rto_min(ptr noundef %0) #3
%12 = tail call i64 @max(i64 noundef %9, i32 noundef %11) #3
%13 = getelementptr inbounds %struct.ccid2_hc_tx_sock, ptr %3, i64 0, i32 2
store i64 %12, ptr %13, align 8, !tbaa !12
%14 = getelementptr inbounds %struct.ccid2_hc_tx_sock, ptr %3, i64 0, i32 3
store i64 %12, ptr %14, align 8, !tbaa !13
%15 = tail call ptr @dccp_sk(ptr noundef %0) #3
%16 = load i32, ptr %15, align 4, !tbaa !14
%17 = getelementptr inbounds %struct.ccid2_hc_tx_sock, ptr %3, i64 0, i32 5
store i32 %16, ptr %17, align 4, !tbaa !16
br label %68
18: ; preds = %2
%19 = ashr i64 %5, 3
%20 = sub nsw i64 %4, %19
%21 = add nsw i64 %20, %5
store i64 %21, ptr %3, align 8, !tbaa !5
%22 = icmp slt i64 %20, 0
%23 = getelementptr inbounds %struct.ccid2_hc_tx_sock, ptr %3, i64 0, i32 1
%24 = load i64, ptr %23, align 8, !tbaa !11
%25 = ashr i64 %24, 2
br i1 %22, label %26, label %32
26: ; preds = %18
%27 = add i64 %20, %25
%28 = sub i64 0, %27
%29 = icmp sgt i64 %28, 0
%30 = lshr i64 %28, 3
%31 = select i1 %29, i64 %30, i64 %28
br label %34
32: ; preds = %18
%33 = sub nsw i64 %20, %25
br label %34
34: ; preds = %26, %32
%35 = phi i64 [ %33, %32 ], [ %31, %26 ]
%36 = getelementptr inbounds %struct.ccid2_hc_tx_sock, ptr %3, i64 0, i32 1
%37 = add nsw i64 %24, %35
store i64 %37, ptr %36, align 8, !tbaa !11
%38 = getelementptr inbounds %struct.ccid2_hc_tx_sock, ptr %3, i64 0, i32 2
%39 = load i64, ptr %38, align 8, !tbaa !12
%40 = icmp sgt i64 %37, %39
br i1 %40, label %41, label %46
41: ; preds = %34
store i64 %37, ptr %38, align 8, !tbaa !12
%42 = getelementptr inbounds %struct.ccid2_hc_tx_sock, ptr %3, i64 0, i32 3
%43 = load i64, ptr %42, align 8, !tbaa !13
%44 = icmp sgt i64 %37, %43
br i1 %44, label %45, label %46
45: ; preds = %41
store i64 %37, ptr %42, align 8, !tbaa !13
br label %46
46: ; preds = %41, %45, %34
%47 = tail call ptr @dccp_sk(ptr noundef %0) #3
%48 = getelementptr inbounds %struct.TYPE_2__, ptr %47, i64 0, i32 1
%49 = load i32, ptr %48, align 4, !tbaa !17
%50 = getelementptr inbounds %struct.ccid2_hc_tx_sock, ptr %3, i64 0, i32 5
%51 = load i32, ptr %50, align 4, !tbaa !16
%52 = tail call i64 @after48(i32 noundef %49, i32 noundef %51) #3
%53 = icmp eq i64 %52, 0
br i1 %53, label %68, label %54
54: ; preds = %46
%55 = load i64, ptr %38, align 8, !tbaa !12
%56 = getelementptr inbounds %struct.ccid2_hc_tx_sock, ptr %3, i64 0, i32 3
%57 = load i64, ptr %56, align 8, !tbaa !13
%58 = icmp slt i64 %55, %57
br i1 %58, label %59, label %63
59: ; preds = %54
%60 = sub nsw i64 %57, %55
%61 = ashr i64 %60, 2
%62 = sub nsw i64 %57, %61
store i64 %62, ptr %56, align 8, !tbaa !13
br label %63
63: ; preds = %59, %54
%64 = tail call ptr @dccp_sk(ptr noundef %0) #3
%65 = load i32, ptr %64, align 4, !tbaa !14
store i32 %65, ptr %50, align 4, !tbaa !16
%66 = tail call i32 @tcp_rto_min(ptr noundef %0) #3
%67 = sext i32 %66 to i64
store i64 %67, ptr %38, align 8, !tbaa !12
br label %68
68: ; preds = %46, %63, %7
%69 = load i64, ptr %3, align 8, !tbaa !5
%70 = lshr i64 %69, 3
%71 = getelementptr inbounds %struct.ccid2_hc_tx_sock, ptr %3, i64 0, i32 3
%72 = load i64, ptr %71, align 8, !tbaa !13
%73 = add i64 %70, %72
%74 = trunc i64 %73 to i32
%75 = getelementptr inbounds %struct.ccid2_hc_tx_sock, ptr %3, i64 0, i32 4
%76 = load i32, ptr @DCCP_RTO_MAX, align 4, !tbaa !18
%77 = tail call i32 @llvm.smin.i32(i32 %76, i32 %74)
store i32 %77, ptr %75, align 8
ret void
}
declare ptr @ccid2_hc_tx_sk(ptr noundef) local_unnamed_addr #1
declare i64 @max(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tcp_rto_min(ptr noundef) local_unnamed_addr #1
declare ptr @dccp_sk(ptr noundef) local_unnamed_addr #1
declare i64 @after48(i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #2
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ccid2_hc_tx_sock", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !10, i64 32, !10, i64 36}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !7, i64 8}
!12 = !{!6, !7, i64 16}
!13 = !{!6, !7, i64 24}
!14 = !{!15, !10, i64 0}
!15 = !{!"TYPE_2__", !10, i64 0, !10, i64 4}
!16 = !{!6, !10, i64 36}
!17 = !{!15, !10, i64 4}
!18 = !{!10, !10, i64 0}
| ; ModuleID = 'AnghaBench/linux/net/dccp/ccids/extr_ccid2.c_ccid2_rtt_estimator.c'
source_filename = "AnghaBench/linux/net/dccp/ccids/extr_ccid2.c_ccid2_rtt_estimator.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DCCP_RTO_MAX = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ccid2_rtt_estimator], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ccid2_rtt_estimator(ptr noundef %0, i64 noundef %1) #0 {
%3 = tail call ptr @ccid2_hc_tx_sk(ptr noundef %0) #3
%4 = tail call i64 @llvm.umax.i64(i64 %1, i64 1)
%5 = load i64, ptr %3, align 8, !tbaa !6
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %18
7: ; preds = %2
%8 = shl i64 %4, 3
store i64 %8, ptr %3, align 8, !tbaa !6
%9 = shl i64 %4, 1
%10 = getelementptr inbounds i8, ptr %3, i64 8
store i64 %9, ptr %10, align 8, !tbaa !12
%11 = tail call i32 @tcp_rto_min(ptr noundef %0) #3
%12 = tail call i64 @max(i64 noundef %9, i32 noundef %11) #3
%13 = getelementptr inbounds i8, ptr %3, i64 16
store i64 %12, ptr %13, align 8, !tbaa !13
%14 = getelementptr inbounds i8, ptr %3, i64 24
store i64 %12, ptr %14, align 8, !tbaa !14
%15 = tail call ptr @dccp_sk(ptr noundef %0) #3
%16 = load i32, ptr %15, align 4, !tbaa !15
%17 = getelementptr inbounds i8, ptr %3, i64 36
store i32 %16, ptr %17, align 4, !tbaa !17
br label %67
18: ; preds = %2
%19 = ashr i64 %5, 3
%20 = sub nsw i64 %4, %19
%21 = add nsw i64 %20, %5
store i64 %21, ptr %3, align 8, !tbaa !6
%22 = icmp slt i64 %20, 0
%23 = getelementptr inbounds i8, ptr %3, i64 8
%24 = load i64, ptr %23, align 8, !tbaa !12
%25 = ashr i64 %24, 2
br i1 %22, label %26, label %32
26: ; preds = %18
%27 = add i64 %20, %25
%28 = sub i64 0, %27
%29 = icmp sgt i64 %28, 0
%30 = lshr i64 %28, 3
%31 = select i1 %29, i64 %30, i64 %28
br label %34
32: ; preds = %18
%33 = sub nsw i64 %20, %25
br label %34
34: ; preds = %26, %32
%35 = phi i64 [ %33, %32 ], [ %31, %26 ]
%36 = add nsw i64 %24, %35
store i64 %36, ptr %23, align 8, !tbaa !12
%37 = getelementptr inbounds i8, ptr %3, i64 16
%38 = load i64, ptr %37, align 8, !tbaa !13
%39 = icmp sgt i64 %36, %38
br i1 %39, label %40, label %45
40: ; preds = %34
store i64 %36, ptr %37, align 8, !tbaa !13
%41 = getelementptr inbounds i8, ptr %3, i64 24
%42 = load i64, ptr %41, align 8, !tbaa !14
%43 = icmp sgt i64 %36, %42
br i1 %43, label %44, label %45
44: ; preds = %40
store i64 %36, ptr %41, align 8, !tbaa !14
br label %45
45: ; preds = %40, %44, %34
%46 = tail call ptr @dccp_sk(ptr noundef %0) #3
%47 = getelementptr inbounds i8, ptr %46, i64 4
%48 = load i32, ptr %47, align 4, !tbaa !18
%49 = getelementptr inbounds i8, ptr %3, i64 36
%50 = load i32, ptr %49, align 4, !tbaa !17
%51 = tail call i64 @after48(i32 noundef %48, i32 noundef %50) #3
%52 = icmp eq i64 %51, 0
br i1 %52, label %67, label %53
53: ; preds = %45
%54 = load i64, ptr %37, align 8, !tbaa !13
%55 = getelementptr inbounds i8, ptr %3, i64 24
%56 = load i64, ptr %55, align 8, !tbaa !14
%57 = icmp slt i64 %54, %56
br i1 %57, label %58, label %62
58: ; preds = %53
%59 = sub nsw i64 %56, %54
%60 = ashr i64 %59, 2
%61 = sub nsw i64 %56, %60
store i64 %61, ptr %55, align 8, !tbaa !14
br label %62
62: ; preds = %58, %53
%63 = tail call ptr @dccp_sk(ptr noundef %0) #3
%64 = load i32, ptr %63, align 4, !tbaa !15
store i32 %64, ptr %49, align 4, !tbaa !17
%65 = tail call i32 @tcp_rto_min(ptr noundef %0) #3
%66 = sext i32 %65 to i64
store i64 %66, ptr %37, align 8, !tbaa !13
br label %67
67: ; preds = %45, %62, %7
%68 = load i64, ptr %3, align 8, !tbaa !6
%69 = lshr i64 %68, 3
%70 = getelementptr inbounds i8, ptr %3, i64 24
%71 = load i64, ptr %70, align 8, !tbaa !14
%72 = add i64 %69, %71
%73 = trunc i64 %72 to i32
%74 = getelementptr inbounds i8, ptr %3, i64 32
%75 = load i32, ptr @DCCP_RTO_MAX, align 4, !tbaa !19
%76 = tail call i32 @llvm.smin.i32(i32 %75, i32 %73)
store i32 %76, ptr %74, align 8
ret void
}
declare ptr @ccid2_hc_tx_sk(ptr noundef) local_unnamed_addr #1
declare i64 @max(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tcp_rto_min(ptr noundef) local_unnamed_addr #1
declare ptr @dccp_sk(ptr noundef) local_unnamed_addr #1
declare i64 @after48(i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #2
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ccid2_hc_tx_sock", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !11, i64 32, !11, i64 36}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !8, i64 8}
!13 = !{!7, !8, i64 16}
!14 = !{!7, !8, i64 24}
!15 = !{!16, !11, i64 0}
!16 = !{!"TYPE_2__", !11, i64 0, !11, i64 4}
!17 = !{!7, !11, i64 36}
!18 = !{!16, !11, i64 4}
!19 = !{!11, !11, i64 0}
| linux_net_dccp_ccids_extr_ccid2.c_ccid2_rtt_estimator |
; ModuleID = 'AnghaBench/linux/drivers/scsi/libfc/extr_fc_fcp.c_fc_fcp_recv.c'
source_filename = "AnghaBench/linux/drivers/scsi/libfc/extr_fc_fcp.c_fc_fcp_recv.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.fc_fcp_pkt = type { i32, i32, i32, ptr }
%struct.fc_frame_header = type { i64, i64 }
%struct.fcp_txrdy = type { i32, i32 }
@LPORT_ST_READY = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [35 x i8] c"lport state %d, ignoring r_ctl %x\0A\00", align 1
@FC_TYPE_BLS = dso_local local_unnamed_addr global i64 0, align 8
@FC_SRB_ABORTED = dso_local local_unnamed_addr global i32 0, align 4
@FC_SRB_ABORT_PENDING = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [36 x i8] c"command aborted, ignoring r_ctl %x\0A\00", align 1
@FC_RCTL_DD_DATA_DESC = dso_local local_unnamed_addr global i64 0, align 8
@FCPHF_CRC_UNCHECKED = dso_local local_unnamed_addr global i32 0, align 4
@FC_RCTL_DD_SOL_DATA = dso_local local_unnamed_addr global i64 0, align 8
@FC_RCTL_DD_CMD_STATUS = dso_local local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [29 x i8] c"unexpected frame. r_ctl %x\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @fc_fcp_recv], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @fc_fcp_recv(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = getelementptr inbounds %struct.fc_fcp_pkt, ptr %2, i64 0, i32 3
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = tail call i64 @IS_ERR(ptr noundef %1) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = tail call i32 @fc_fcp_error(ptr noundef nonnull %2, ptr noundef %1) #2
br label %85
10: ; preds = %3
%11 = tail call ptr @fc_frame_header_get(ptr noundef %1) #2
%12 = load i64, ptr %11, align 8, !tbaa !11
%13 = load i64, ptr %5, align 8, !tbaa !14
%14 = load i64, ptr @LPORT_ST_READY, align 8, !tbaa !16
%15 = icmp eq i64 %13, %14
br i1 %15, label %18, label %16
16: ; preds = %10
%17 = tail call i32 (ptr, ptr, i64, ...) @FC_FCP_DBG(ptr noundef nonnull %2, ptr noundef nonnull @.str, i64 noundef %13, i64 noundef %12) #2
br label %83
18: ; preds = %10
%19 = tail call i64 @fc_fcp_lock_pkt(ptr noundef nonnull %2) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %83
21: ; preds = %18
%22 = getelementptr inbounds %struct.fc_frame_header, ptr %11, i64 0, i32 1
%23 = load i64, ptr %22, align 8, !tbaa !17
%24 = load i64, ptr @FC_TYPE_BLS, align 8, !tbaa !16
%25 = icmp eq i64 %23, %24
br i1 %25, label %26, label %28
26: ; preds = %21
%27 = tail call i32 @fc_fcp_abts_resp(ptr noundef nonnull %2, ptr noundef %1) #2
br label %81
28: ; preds = %21
%29 = load i32, ptr %2, align 8, !tbaa !18
%30 = load i32, ptr @FC_SRB_ABORTED, align 4, !tbaa !19
%31 = load i32, ptr @FC_SRB_ABORT_PENDING, align 4, !tbaa !19
%32 = or i32 %31, %30
%33 = and i32 %32, %29
%34 = icmp eq i32 %33, 0
br i1 %34, label %37, label %35
35: ; preds = %28
%36 = tail call i32 (ptr, ptr, i64, ...) @FC_FCP_DBG(ptr noundef nonnull %2, ptr noundef nonnull @.str.1, i64 noundef %12) #2
br label %81
37: ; preds = %28
%38 = load i64, ptr @FC_RCTL_DD_DATA_DESC, align 8, !tbaa !16
%39 = icmp eq i64 %12, %38
br i1 %39, label %40, label %59
40: ; preds = %37
%41 = tail call i32 @fr_flags(ptr noundef %1) #2
%42 = load i32, ptr @FCPHF_CRC_UNCHECKED, align 4, !tbaa !19
%43 = and i32 %42, %41
%44 = tail call i32 @WARN_ON(i32 noundef %43) #2
%45 = tail call ptr @fc_frame_payload_get(ptr noundef %1, i32 noundef 8) #2
%46 = icmp eq ptr %45, null
%47 = zext i1 %46 to i32
%48 = tail call i32 @WARN_ON(i32 noundef %47) #2
%49 = getelementptr inbounds %struct.fcp_txrdy, ptr %45, i64 0, i32 1
%50 = load i32, ptr %49, align 4, !tbaa !20
%51 = tail call i64 @ntohl(i32 noundef %50) #2
%52 = load i32, ptr %45, align 4, !tbaa !22
%53 = tail call i64 @ntohl(i32 noundef %52) #2
%54 = tail call i32 @fc_fcp_send_data(ptr noundef nonnull %2, ptr noundef %0, i64 noundef %51, i64 noundef %53) #2
%55 = icmp eq i32 %54, 0
br i1 %55, label %56, label %81
56: ; preds = %40
%57 = getelementptr inbounds %struct.fc_fcp_pkt, ptr %2, i64 0, i32 2
%58 = load i32, ptr %57, align 8, !tbaa !23
store i32 %58, ptr %0, align 4, !tbaa !24
br label %81
59: ; preds = %37
%60 = load i64, ptr @FC_RCTL_DD_SOL_DATA, align 8, !tbaa !16
%61 = icmp eq i64 %12, %60
br i1 %61, label %62, label %70
62: ; preds = %59
%63 = tail call i32 @fr_len(ptr noundef %1) #2
%64 = icmp ult i32 %63, 16
%65 = zext i1 %64 to i32
%66 = tail call i32 @WARN_ON(i32 noundef %65) #2
%67 = tail call i32 @fc_fcp_recv_data(ptr noundef nonnull %2, ptr noundef %1) #2
%68 = getelementptr inbounds %struct.fc_fcp_pkt, ptr %2, i64 0, i32 1
%69 = load i32, ptr %68, align 4, !tbaa !26
store i32 %69, ptr %0, align 4, !tbaa !24
br label %81
70: ; preds = %59
%71 = load i64, ptr @FC_RCTL_DD_CMD_STATUS, align 8, !tbaa !16
%72 = icmp eq i64 %12, %71
br i1 %72, label %73, label %79
73: ; preds = %70
%74 = tail call i32 @fr_flags(ptr noundef %1) #2
%75 = load i32, ptr @FCPHF_CRC_UNCHECKED, align 4, !tbaa !19
%76 = and i32 %75, %74
%77 = tail call i32 @WARN_ON(i32 noundef %76) #2
%78 = tail call i32 @fc_fcp_resp(ptr noundef nonnull %2, ptr noundef %1) #2
br label %81
79: ; preds = %70
%80 = tail call i32 (ptr, ptr, i64, ...) @FC_FCP_DBG(ptr noundef nonnull %2, ptr noundef nonnull @.str.2, i64 noundef %12) #2
br label %81
81: ; preds = %56, %40, %73, %79, %62, %35, %26
%82 = tail call i32 @fc_fcp_unlock_pkt(ptr noundef nonnull %2) #2
br label %83
83: ; preds = %18, %81, %16
%84 = tail call i32 @fc_frame_free(ptr noundef %1) #2
br label %85
85: ; preds = %83, %8
ret void
}
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @fc_fcp_error(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @fc_frame_header_get(ptr noundef) local_unnamed_addr #1
declare i32 @FC_FCP_DBG(ptr noundef, ptr noundef, i64 noundef, ...) local_unnamed_addr #1
declare i64 @fc_fcp_lock_pkt(ptr noundef) local_unnamed_addr #1
declare i32 @fc_fcp_abts_resp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @fr_flags(ptr noundef) local_unnamed_addr #1
declare ptr @fc_frame_payload_get(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fc_fcp_send_data(ptr noundef, ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i64 @ntohl(i32 noundef) local_unnamed_addr #1
declare i32 @fr_len(ptr noundef) local_unnamed_addr #1
declare i32 @fc_fcp_recv_data(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @fc_fcp_resp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @fc_fcp_unlock_pkt(ptr noundef) local_unnamed_addr #1
declare i32 @fc_frame_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"fc_fcp_pkt", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"fc_frame_header", !13, i64 0, !13, i64 8}
!13 = !{!"long", !8, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"fc_lport", !13, i64 0}
!16 = !{!13, !13, i64 0}
!17 = !{!12, !13, i64 8}
!18 = !{!6, !7, i64 0}
!19 = !{!7, !7, i64 0}
!20 = !{!21, !7, i64 4}
!21 = !{!"fcp_txrdy", !7, i64 0, !7, i64 4}
!22 = !{!21, !7, i64 0}
!23 = !{!6, !7, i64 8}
!24 = !{!25, !7, i64 0}
!25 = !{!"fc_seq", !7, i64 0}
!26 = !{!6, !7, i64 4}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/libfc/extr_fc_fcp.c_fc_fcp_recv.c'
source_filename = "AnghaBench/linux/drivers/scsi/libfc/extr_fc_fcp.c_fc_fcp_recv.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@LPORT_ST_READY = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [35 x i8] c"lport state %d, ignoring r_ctl %x\0A\00", align 1
@FC_TYPE_BLS = common local_unnamed_addr global i64 0, align 8
@FC_SRB_ABORTED = common local_unnamed_addr global i32 0, align 4
@FC_SRB_ABORT_PENDING = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [36 x i8] c"command aborted, ignoring r_ctl %x\0A\00", align 1
@FC_RCTL_DD_DATA_DESC = common local_unnamed_addr global i64 0, align 8
@FCPHF_CRC_UNCHECKED = common local_unnamed_addr global i32 0, align 4
@FC_RCTL_DD_SOL_DATA = common local_unnamed_addr global i64 0, align 8
@FC_RCTL_DD_CMD_STATUS = common local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [29 x i8] c"unexpected frame. r_ctl %x\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @fc_fcp_recv], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @fc_fcp_recv(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = getelementptr inbounds i8, ptr %2, i64 16
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = tail call i64 @IS_ERR(ptr noundef %1) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = tail call i32 @fc_fcp_error(ptr noundef nonnull %2, ptr noundef %1) #2
br label %85
10: ; preds = %3
%11 = tail call ptr @fc_frame_header_get(ptr noundef %1) #2
%12 = load i64, ptr %11, align 8, !tbaa !12
%13 = load i64, ptr %5, align 8, !tbaa !15
%14 = load i64, ptr @LPORT_ST_READY, align 8, !tbaa !17
%15 = icmp eq i64 %13, %14
br i1 %15, label %18, label %16
16: ; preds = %10
%17 = tail call i32 (ptr, ptr, i64, ...) @FC_FCP_DBG(ptr noundef nonnull %2, ptr noundef nonnull @.str, i64 noundef %13, i64 noundef %12) #2
br label %83
18: ; preds = %10
%19 = tail call i64 @fc_fcp_lock_pkt(ptr noundef nonnull %2) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %83
21: ; preds = %18
%22 = getelementptr inbounds i8, ptr %11, i64 8
%23 = load i64, ptr %22, align 8, !tbaa !18
%24 = load i64, ptr @FC_TYPE_BLS, align 8, !tbaa !17
%25 = icmp eq i64 %23, %24
br i1 %25, label %26, label %28
26: ; preds = %21
%27 = tail call i32 @fc_fcp_abts_resp(ptr noundef nonnull %2, ptr noundef %1) #2
br label %81
28: ; preds = %21
%29 = load i32, ptr %2, align 8, !tbaa !19
%30 = load i32, ptr @FC_SRB_ABORTED, align 4, !tbaa !20
%31 = load i32, ptr @FC_SRB_ABORT_PENDING, align 4, !tbaa !20
%32 = or i32 %31, %30
%33 = and i32 %32, %29
%34 = icmp eq i32 %33, 0
br i1 %34, label %37, label %35
35: ; preds = %28
%36 = tail call i32 (ptr, ptr, i64, ...) @FC_FCP_DBG(ptr noundef nonnull %2, ptr noundef nonnull @.str.1, i64 noundef %12) #2
br label %81
37: ; preds = %28
%38 = load i64, ptr @FC_RCTL_DD_DATA_DESC, align 8, !tbaa !17
%39 = icmp eq i64 %12, %38
br i1 %39, label %40, label %59
40: ; preds = %37
%41 = tail call i32 @fr_flags(ptr noundef %1) #2
%42 = load i32, ptr @FCPHF_CRC_UNCHECKED, align 4, !tbaa !20
%43 = and i32 %42, %41
%44 = tail call i32 @WARN_ON(i32 noundef %43) #2
%45 = tail call ptr @fc_frame_payload_get(ptr noundef %1, i32 noundef 8) #2
%46 = icmp eq ptr %45, null
%47 = zext i1 %46 to i32
%48 = tail call i32 @WARN_ON(i32 noundef %47) #2
%49 = getelementptr inbounds i8, ptr %45, i64 4
%50 = load i32, ptr %49, align 4, !tbaa !21
%51 = tail call i64 @ntohl(i32 noundef %50) #2
%52 = load i32, ptr %45, align 4, !tbaa !23
%53 = tail call i64 @ntohl(i32 noundef %52) #2
%54 = tail call i32 @fc_fcp_send_data(ptr noundef nonnull %2, ptr noundef %0, i64 noundef %51, i64 noundef %53) #2
%55 = icmp eq i32 %54, 0
br i1 %55, label %56, label %81
56: ; preds = %40
%57 = getelementptr inbounds i8, ptr %2, i64 8
%58 = load i32, ptr %57, align 8, !tbaa !24
store i32 %58, ptr %0, align 4, !tbaa !25
br label %81
59: ; preds = %37
%60 = load i64, ptr @FC_RCTL_DD_SOL_DATA, align 8, !tbaa !17
%61 = icmp eq i64 %12, %60
br i1 %61, label %62, label %70
62: ; preds = %59
%63 = tail call i32 @fr_len(ptr noundef %1) #2
%64 = icmp ult i32 %63, 16
%65 = zext i1 %64 to i32
%66 = tail call i32 @WARN_ON(i32 noundef %65) #2
%67 = tail call i32 @fc_fcp_recv_data(ptr noundef nonnull %2, ptr noundef %1) #2
%68 = getelementptr inbounds i8, ptr %2, i64 4
%69 = load i32, ptr %68, align 4, !tbaa !27
store i32 %69, ptr %0, align 4, !tbaa !25
br label %81
70: ; preds = %59
%71 = load i64, ptr @FC_RCTL_DD_CMD_STATUS, align 8, !tbaa !17
%72 = icmp eq i64 %12, %71
br i1 %72, label %73, label %79
73: ; preds = %70
%74 = tail call i32 @fr_flags(ptr noundef %1) #2
%75 = load i32, ptr @FCPHF_CRC_UNCHECKED, align 4, !tbaa !20
%76 = and i32 %75, %74
%77 = tail call i32 @WARN_ON(i32 noundef %76) #2
%78 = tail call i32 @fc_fcp_resp(ptr noundef nonnull %2, ptr noundef %1) #2
br label %81
79: ; preds = %70
%80 = tail call i32 (ptr, ptr, i64, ...) @FC_FCP_DBG(ptr noundef nonnull %2, ptr noundef nonnull @.str.2, i64 noundef %12) #2
br label %81
81: ; preds = %56, %40, %73, %79, %62, %35, %26
%82 = tail call i32 @fc_fcp_unlock_pkt(ptr noundef nonnull %2) #2
br label %83
83: ; preds = %18, %81, %16
%84 = tail call i32 @fc_frame_free(ptr noundef %1) #2
br label %85
85: ; preds = %83, %8
ret void
}
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @fc_fcp_error(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @fc_frame_header_get(ptr noundef) local_unnamed_addr #1
declare i32 @FC_FCP_DBG(ptr noundef, ptr noundef, i64 noundef, ...) local_unnamed_addr #1
declare i64 @fc_fcp_lock_pkt(ptr noundef) local_unnamed_addr #1
declare i32 @fc_fcp_abts_resp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @fr_flags(ptr noundef) local_unnamed_addr #1
declare ptr @fc_frame_payload_get(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fc_fcp_send_data(ptr noundef, ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i64 @ntohl(i32 noundef) local_unnamed_addr #1
declare i32 @fr_len(ptr noundef) local_unnamed_addr #1
declare i32 @fc_fcp_recv_data(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @fc_fcp_resp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @fc_fcp_unlock_pkt(ptr noundef) local_unnamed_addr #1
declare i32 @fc_frame_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"fc_fcp_pkt", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"fc_frame_header", !14, i64 0, !14, i64 8}
!14 = !{!"long", !9, i64 0}
!15 = !{!16, !14, i64 0}
!16 = !{!"fc_lport", !14, i64 0}
!17 = !{!14, !14, i64 0}
!18 = !{!13, !14, i64 8}
!19 = !{!7, !8, i64 0}
!20 = !{!8, !8, i64 0}
!21 = !{!22, !8, i64 4}
!22 = !{!"fcp_txrdy", !8, i64 0, !8, i64 4}
!23 = !{!22, !8, i64 0}
!24 = !{!7, !8, i64 8}
!25 = !{!26, !8, i64 0}
!26 = !{!"fc_seq", !8, i64 0}
!27 = !{!7, !8, i64 4}
| linux_drivers_scsi_libfc_extr_fc_fcp.c_fc_fcp_recv |
; ModuleID = 'AnghaBench/freebsd/sys/dev/isci/scil/extr_scic_sds_request.c_scic_sds_ssp_task_request_get_object_size.c'
source_filename = "AnghaBench/freebsd/sys/dev/isci/scil/extr_scic_sds_request.c_scic_sds_ssp_task_request_get_object_size.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@CACHE_LINE_SIZE = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @scic_sds_ssp_task_request_get_object_size], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @scic_sds_ssp_task_request_get_object_size() #0 {
%1 = tail call i64 (...) @scic_ssp_task_request_get_object_size() #2
%2 = add i64 %1, 8
%3 = load i64, ptr @CACHE_LINE_SIZE, align 8, !tbaa !5
%4 = add i64 %2, %3
ret i64 %4
}
declare i64 @scic_ssp_task_request_get_object_size(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/isci/scil/extr_scic_sds_request.c_scic_sds_ssp_task_request_get_object_size.c'
source_filename = "AnghaBench/freebsd/sys/dev/isci/scil/extr_scic_sds_request.c_scic_sds_ssp_task_request_get_object_size.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CACHE_LINE_SIZE = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @scic_sds_ssp_task_request_get_object_size], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @scic_sds_ssp_task_request_get_object_size() #0 {
%1 = tail call i64 @scic_ssp_task_request_get_object_size() #2
%2 = add i64 %1, 8
%3 = load i64, ptr @CACHE_LINE_SIZE, align 8, !tbaa !6
%4 = add i64 %2, %3
ret i64 %4
}
declare i64 @scic_ssp_task_request_get_object_size(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_dev_isci_scil_extr_scic_sds_request.c_scic_sds_ssp_task_request_get_object_size |
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/redscarf_iiplus/verc/extr_matrix.c_matrix_scan_kb.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/redscarf_iiplus/verc/extr_matrix.c_matrix_scan_kb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define weak dso_local void @matrix_scan_kb() local_unnamed_addr #0 {
%1 = tail call i32 (...) @matrix_scan_user() #2
ret void
}
declare i32 @matrix_scan_user(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/qmk_firmware/keyboards/redscarf_iiplus/verc/extr_matrix.c_matrix_scan_kb.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/redscarf_iiplus/verc/extr_matrix.c_matrix_scan_kb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define weak void @matrix_scan_kb() local_unnamed_addr #0 {
%1 = tail call i32 @matrix_scan_user() #2
ret void
}
declare i32 @matrix_scan_user(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| qmk_firmware_keyboards_redscarf_iiplus_verc_extr_matrix.c_matrix_scan_kb |
; ModuleID = 'AnghaBench/Quake-III-Arena/code/cgame/extr_cg_syscalls.c_trap_FS_FOpenFile.c'
source_filename = "AnghaBench/Quake-III-Arena/code/cgame/extr_cg_syscalls.c_trap_FS_FOpenFile.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@CG_FS_FOPENFILE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @trap_FS_FOpenFile(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @CG_FS_FOPENFILE, align 4, !tbaa !5
%5 = tail call i32 @syscall(i32 noundef %4, ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
ret i32 %5
}
declare i32 @syscall(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/Quake-III-Arena/code/cgame/extr_cg_syscalls.c_trap_FS_FOpenFile.c'
source_filename = "AnghaBench/Quake-III-Arena/code/cgame/extr_cg_syscalls.c_trap_FS_FOpenFile.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CG_FS_FOPENFILE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @trap_FS_FOpenFile(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @CG_FS_FOPENFILE, align 4, !tbaa !6
%5 = tail call i32 @syscall(i32 noundef %4, ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
ret i32 %5
}
declare i32 @syscall(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| Quake-III-Arena_code_cgame_extr_cg_syscalls.c_trap_FS_FOpenFile |
; ModuleID = 'AnghaBench/freebsd/sys/dev/virtio/block/extr_virtio_blk.c_vtblk_startio.c'
source_filename = "AnghaBench/freebsd/sys/dev/virtio/block/extr_virtio_blk.c_vtblk_startio.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.vtblk_softc = type { i32, ptr }
@VTBLK_FLAG_SUSPEND = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @vtblk_startio], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @vtblk_startio(ptr noundef %0) #0 {
%2 = tail call i32 @VTBLK_LOCK_ASSERT(ptr noundef %0) #2
%3 = getelementptr inbounds %struct.vtblk_softc, ptr %0, i64 0, i32 1
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = load i32, ptr %0, align 8, !tbaa !11
%6 = load i32, ptr @VTBLK_FLAG_SUSPEND, align 4, !tbaa !12
%7 = and i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %29
9: ; preds = %1
%10 = tail call i32 @virtqueue_full(ptr noundef %4) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %29
12: ; preds = %9, %21
%13 = phi i32 [ %22, %21 ], [ 0, %9 ]
%14 = tail call ptr @vtblk_request_next(ptr noundef nonnull %0) #2
%15 = icmp eq ptr %14, null
br i1 %15, label %25, label %16
16: ; preds = %12
%17 = tail call i64 @vtblk_request_execute(ptr noundef nonnull %0, ptr noundef nonnull %14) #2
%18 = icmp eq i64 %17, 0
br i1 %18, label %21, label %19
19: ; preds = %16
%20 = tail call i32 @vtblk_request_requeue_ready(ptr noundef nonnull %0, ptr noundef nonnull %14) #2
br label %25
21: ; preds = %16
%22 = add nuw nsw i32 %13, 1
%23 = tail call i32 @virtqueue_full(ptr noundef %4) #2
%24 = icmp eq i32 %23, 0
br i1 %24, label %12, label %27, !llvm.loop !13
25: ; preds = %12, %19
%26 = icmp eq i32 %13, 0
br i1 %26, label %29, label %27
27: ; preds = %21, %25
%28 = tail call i32 @virtqueue_notify(ptr noundef %4) #2
br label %29
29: ; preds = %9, %25, %27, %1
ret void
}
declare i32 @VTBLK_LOCK_ASSERT(ptr noundef) local_unnamed_addr #1
declare i32 @virtqueue_full(ptr noundef) local_unnamed_addr #1
declare ptr @vtblk_request_next(ptr noundef) local_unnamed_addr #1
declare i64 @vtblk_request_execute(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @vtblk_request_requeue_ready(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @virtqueue_notify(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"vtblk_softc", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!7, !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/virtio/block/extr_virtio_blk.c_vtblk_startio.c'
source_filename = "AnghaBench/freebsd/sys/dev/virtio/block/extr_virtio_blk.c_vtblk_startio.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VTBLK_FLAG_SUSPEND = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @vtblk_startio], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @vtblk_startio(ptr noundef %0) #0 {
%2 = tail call i32 @VTBLK_LOCK_ASSERT(ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load i32, ptr %0, align 8, !tbaa !12
%6 = load i32, ptr @VTBLK_FLAG_SUSPEND, align 4, !tbaa !13
%7 = and i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %29
9: ; preds = %1
%10 = tail call i32 @virtqueue_full(ptr noundef %4) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %29
12: ; preds = %9, %21
%13 = phi i32 [ %22, %21 ], [ 0, %9 ]
%14 = tail call ptr @vtblk_request_next(ptr noundef nonnull %0) #2
%15 = icmp eq ptr %14, null
br i1 %15, label %25, label %16
16: ; preds = %12
%17 = tail call i64 @vtblk_request_execute(ptr noundef nonnull %0, ptr noundef nonnull %14) #2
%18 = icmp eq i64 %17, 0
br i1 %18, label %21, label %19
19: ; preds = %16
%20 = tail call i32 @vtblk_request_requeue_ready(ptr noundef nonnull %0, ptr noundef nonnull %14) #2
br label %25
21: ; preds = %16
%22 = add nuw nsw i32 %13, 1
%23 = tail call i32 @virtqueue_full(ptr noundef %4) #2
%24 = icmp eq i32 %23, 0
br i1 %24, label %12, label %27, !llvm.loop !14
25: ; preds = %12, %19
%26 = icmp eq i32 %13, 0
br i1 %26, label %29, label %27
27: ; preds = %21, %25
%28 = tail call i32 @virtqueue_notify(ptr noundef %4) #2
br label %29
29: ; preds = %9, %25, %27, %1
ret void
}
declare i32 @VTBLK_LOCK_ASSERT(ptr noundef) local_unnamed_addr #1
declare i32 @virtqueue_full(ptr noundef) local_unnamed_addr #1
declare ptr @vtblk_request_next(ptr noundef) local_unnamed_addr #1
declare i64 @vtblk_request_execute(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @vtblk_request_requeue_ready(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @virtqueue_notify(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"vtblk_softc", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!8, !8, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
| freebsd_sys_dev_virtio_block_extr_virtio_blk.c_vtblk_startio |
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_tree-chrec.c_chrec_fold_multiply.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_tree-chrec.c_chrec_fold_multiply.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MULT_EXPR = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local ptr @chrec_fold_multiply(ptr noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = tail call i64 @automatically_generated_chrec_p(ptr noundef %1) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = tail call i64 @automatically_generated_chrec_p(ptr noundef %2) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %6, %3
%10 = tail call ptr @chrec_fold_automatically_generated_operands(ptr noundef %1, ptr noundef %2) #2
br label %27
11: ; preds = %6
%12 = tail call i32 @TREE_CODE(ptr noundef %1) #2
%13 = icmp eq i32 %12, 128
br i1 %13, label %14, label %36
14: ; preds = %11
%15 = tail call i32 @TREE_CODE(ptr noundef %2) #2
%16 = icmp eq i32 %15, 128
br i1 %16, label %17, label %19
17: ; preds = %14
%18 = tail call ptr @chrec_fold_multiply_poly_poly(ptr noundef %0, ptr noundef %1, ptr noundef %2) #2
br label %27
19: ; preds = %14
%20 = tail call i32 @integer_onep(ptr noundef %2) #2
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %27
22: ; preds = %19
%23 = tail call i32 @integer_zerop(ptr noundef %2) #2
%24 = icmp eq i32 %23, 0
br i1 %24, label %29, label %25
25: ; preds = %22
%26 = tail call ptr @build_int_cst(ptr noundef %0, i32 noundef 0) #2
br label %27
27: ; preds = %54, %36, %19, %62, %60, %42, %25, %17, %9, %47, %29
%28 = phi ptr [ %35, %29 ], [ %53, %47 ], [ %10, %9 ], [ %18, %17 ], [ %26, %25 ], [ %43, %42 ], [ %61, %60 ], [ %64, %62 ], [ %1, %19 ], [ %2, %36 ], [ %1, %54 ]
ret ptr %28
29: ; preds = %22
%30 = tail call i32 @CHREC_VARIABLE(ptr noundef %1) #2
%31 = tail call ptr @CHREC_LEFT(ptr noundef %1) #2
%32 = tail call ptr @chrec_fold_multiply(ptr noundef %0, ptr noundef %31, ptr noundef %2)
%33 = tail call ptr @CHREC_RIGHT(ptr noundef %1) #2
%34 = tail call ptr @chrec_fold_multiply(ptr noundef %0, ptr noundef %33, ptr noundef %2)
%35 = tail call ptr @build_polynomial_chrec(i32 noundef %30, ptr noundef %32, ptr noundef %34) #2
br label %27
36: ; preds = %11
%37 = tail call i32 @integer_onep(ptr noundef %1) #2
%38 = icmp eq i32 %37, 0
br i1 %38, label %39, label %27
39: ; preds = %36
%40 = tail call i32 @integer_zerop(ptr noundef %1) #2
%41 = icmp eq i32 %40, 0
br i1 %41, label %44, label %42
42: ; preds = %39
%43 = tail call ptr @build_int_cst(ptr noundef %0, i32 noundef 0) #2
br label %27
44: ; preds = %39
%45 = tail call i32 @TREE_CODE(ptr noundef %2) #2
%46 = icmp eq i32 %45, 128
br i1 %46, label %47, label %54
47: ; preds = %44
%48 = tail call i32 @CHREC_VARIABLE(ptr noundef %2) #2
%49 = tail call ptr @CHREC_LEFT(ptr noundef %2) #2
%50 = tail call ptr @chrec_fold_multiply(ptr noundef %0, ptr noundef %49, ptr noundef %1)
%51 = tail call ptr @CHREC_RIGHT(ptr noundef %2) #2
%52 = tail call ptr @chrec_fold_multiply(ptr noundef %0, ptr noundef %51, ptr noundef %1)
%53 = tail call ptr @build_polynomial_chrec(i32 noundef %48, ptr noundef %50, ptr noundef %52) #2
br label %27
54: ; preds = %44
%55 = tail call i32 @integer_onep(ptr noundef %2) #2
%56 = icmp eq i32 %55, 0
br i1 %56, label %57, label %27
57: ; preds = %54
%58 = tail call i32 @integer_zerop(ptr noundef %2) #2
%59 = icmp eq i32 %58, 0
br i1 %59, label %62, label %60
60: ; preds = %57
%61 = tail call ptr @build_int_cst(ptr noundef %0, i32 noundef 0) #2
br label %27
62: ; preds = %57
%63 = load i32, ptr @MULT_EXPR, align 4, !tbaa !5
%64 = tail call ptr @fold_build2(i32 noundef %63, ptr noundef %0, ptr noundef %1, ptr noundef %2) #2
br label %27
}
declare i64 @automatically_generated_chrec_p(ptr noundef) local_unnamed_addr #1
declare ptr @chrec_fold_automatically_generated_operands(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @TREE_CODE(ptr noundef) local_unnamed_addr #1
declare ptr @chrec_fold_multiply_poly_poly(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @integer_onep(ptr noundef) local_unnamed_addr #1
declare i32 @integer_zerop(ptr noundef) local_unnamed_addr #1
declare ptr @build_int_cst(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @build_polynomial_chrec(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @CHREC_VARIABLE(ptr noundef) local_unnamed_addr #1
declare ptr @CHREC_LEFT(ptr noundef) local_unnamed_addr #1
declare ptr @CHREC_RIGHT(ptr noundef) local_unnamed_addr #1
declare ptr @fold_build2(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_tree-chrec.c_chrec_fold_multiply.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_tree-chrec.c_chrec_fold_multiply.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MULT_EXPR = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @chrec_fold_multiply(ptr noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = tail call i64 @automatically_generated_chrec_p(ptr noundef %1) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = tail call i64 @automatically_generated_chrec_p(ptr noundef %2) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %6, %3
%10 = tail call ptr @chrec_fold_automatically_generated_operands(ptr noundef %1, ptr noundef %2) #2
br label %27
11: ; preds = %6
%12 = tail call i32 @TREE_CODE(ptr noundef %1) #2
%13 = icmp eq i32 %12, 128
br i1 %13, label %14, label %36
14: ; preds = %11
%15 = tail call i32 @TREE_CODE(ptr noundef %2) #2
%16 = icmp eq i32 %15, 128
br i1 %16, label %17, label %19
17: ; preds = %14
%18 = tail call ptr @chrec_fold_multiply_poly_poly(ptr noundef %0, ptr noundef %1, ptr noundef %2) #2
br label %27
19: ; preds = %14
%20 = tail call i32 @integer_onep(ptr noundef %2) #2
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %27
22: ; preds = %19
%23 = tail call i32 @integer_zerop(ptr noundef %2) #2
%24 = icmp eq i32 %23, 0
br i1 %24, label %29, label %25
25: ; preds = %22
%26 = tail call ptr @build_int_cst(ptr noundef %0, i32 noundef 0) #2
br label %27
27: ; preds = %54, %36, %19, %62, %60, %42, %25, %17, %9, %47, %29
%28 = phi ptr [ %35, %29 ], [ %53, %47 ], [ %10, %9 ], [ %18, %17 ], [ %26, %25 ], [ %43, %42 ], [ %61, %60 ], [ %64, %62 ], [ %1, %19 ], [ %2, %36 ], [ %1, %54 ]
ret ptr %28
29: ; preds = %22
%30 = tail call i32 @CHREC_VARIABLE(ptr noundef %1) #2
%31 = tail call ptr @CHREC_LEFT(ptr noundef %1) #2
%32 = tail call ptr @chrec_fold_multiply(ptr noundef %0, ptr noundef %31, ptr noundef %2)
%33 = tail call ptr @CHREC_RIGHT(ptr noundef %1) #2
%34 = tail call ptr @chrec_fold_multiply(ptr noundef %0, ptr noundef %33, ptr noundef %2)
%35 = tail call ptr @build_polynomial_chrec(i32 noundef %30, ptr noundef %32, ptr noundef %34) #2
br label %27
36: ; preds = %11
%37 = tail call i32 @integer_onep(ptr noundef %1) #2
%38 = icmp eq i32 %37, 0
br i1 %38, label %39, label %27
39: ; preds = %36
%40 = tail call i32 @integer_zerop(ptr noundef %1) #2
%41 = icmp eq i32 %40, 0
br i1 %41, label %44, label %42
42: ; preds = %39
%43 = tail call ptr @build_int_cst(ptr noundef %0, i32 noundef 0) #2
br label %27
44: ; preds = %39
%45 = tail call i32 @TREE_CODE(ptr noundef %2) #2
%46 = icmp eq i32 %45, 128
br i1 %46, label %47, label %54
47: ; preds = %44
%48 = tail call i32 @CHREC_VARIABLE(ptr noundef %2) #2
%49 = tail call ptr @CHREC_LEFT(ptr noundef %2) #2
%50 = tail call ptr @chrec_fold_multiply(ptr noundef %0, ptr noundef %49, ptr noundef %1)
%51 = tail call ptr @CHREC_RIGHT(ptr noundef %2) #2
%52 = tail call ptr @chrec_fold_multiply(ptr noundef %0, ptr noundef %51, ptr noundef %1)
%53 = tail call ptr @build_polynomial_chrec(i32 noundef %48, ptr noundef %50, ptr noundef %52) #2
br label %27
54: ; preds = %44
%55 = tail call i32 @integer_onep(ptr noundef %2) #2
%56 = icmp eq i32 %55, 0
br i1 %56, label %57, label %27
57: ; preds = %54
%58 = tail call i32 @integer_zerop(ptr noundef %2) #2
%59 = icmp eq i32 %58, 0
br i1 %59, label %62, label %60
60: ; preds = %57
%61 = tail call ptr @build_int_cst(ptr noundef %0, i32 noundef 0) #2
br label %27
62: ; preds = %57
%63 = load i32, ptr @MULT_EXPR, align 4, !tbaa !6
%64 = tail call ptr @fold_build2(i32 noundef %63, ptr noundef %0, ptr noundef %1, ptr noundef %2) #2
br label %27
}
declare i64 @automatically_generated_chrec_p(ptr noundef) local_unnamed_addr #1
declare ptr @chrec_fold_automatically_generated_operands(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @TREE_CODE(ptr noundef) local_unnamed_addr #1
declare ptr @chrec_fold_multiply_poly_poly(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @integer_onep(ptr noundef) local_unnamed_addr #1
declare i32 @integer_zerop(ptr noundef) local_unnamed_addr #1
declare ptr @build_int_cst(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @build_polynomial_chrec(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @CHREC_VARIABLE(ptr noundef) local_unnamed_addr #1
declare ptr @CHREC_LEFT(ptr noundef) local_unnamed_addr #1
declare ptr @CHREC_RIGHT(ptr noundef) local_unnamed_addr #1
declare ptr @fold_build2(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_gcc_extr_tree-chrec.c_chrec_fold_multiply |
; ModuleID = 'AnghaBench/linux/drivers/pcmcia/extr_rsrc_nonstatic.c___nonstatic_find_io_region.c'
source_filename = "AnghaBench/linux/drivers/pcmcia/extr_rsrc_nonstatic.c___nonstatic_find_io_region.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.pcmcia_align_data = type { i64, i64, ptr }
%struct.pcmcia_socket = type { ptr, ptr, i32 }
@IORESOURCE_IO = dso_local local_unnamed_addr global i32 0, align 4
@ioport_resource = dso_local global i32 0, align 4
@pcmcia_align = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @__nonstatic_find_io_region], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef ptr @__nonstatic_find_io_region(ptr noundef %0, i64 noundef %1, i32 noundef %2, i64 noundef %3) #0 {
%5 = alloca %struct.pcmcia_align_data, align 8
%6 = load i32, ptr @IORESOURCE_IO, align 4, !tbaa !5
%7 = getelementptr inbounds %struct.pcmcia_socket, ptr %0, i64 0, i32 2
%8 = tail call i32 @dev_name(ptr noundef nonnull %7) #3
%9 = tail call ptr @pcmcia_make_resource(i32 noundef 0, i32 noundef %2, i32 noundef %6, i32 noundef %8) #3
%10 = getelementptr inbounds %struct.pcmcia_socket, ptr %0, i64 0, i32 1
%11 = load ptr, ptr %10, align 8, !tbaa !9
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #3
%12 = add i64 %3, -1
store i64 %12, ptr %5, align 8, !tbaa !12
%13 = and i64 %12, %1
%14 = getelementptr inbounds %struct.pcmcia_align_data, ptr %5, i64 0, i32 1
store i64 %13, ptr %14, align 8, !tbaa !15
%15 = getelementptr inbounds %struct.pcmcia_align_data, ptr %5, i64 0, i32 2
store ptr %11, ptr %15, align 8, !tbaa !16
%16 = load i32, ptr @pcmcia_align, align 4, !tbaa !5
%17 = call i32 @allocate_resource(ptr noundef nonnull @ioport_resource, ptr noundef %9, i32 noundef %2, i64 noundef %1, i64 noundef -1, i32 noundef 1, i32 noundef %16, ptr noundef nonnull %5) #3
%18 = icmp eq i32 %17, 0
br i1 %18, label %21, label %19
19: ; preds = %4
%20 = call i32 @kfree(ptr noundef %9) #3
br label %21
21: ; preds = %19, %4
%22 = phi ptr [ null, %19 ], [ %9, %4 ]
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #3
ret ptr %22
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @pcmcia_make_resource(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dev_name(ptr noundef) local_unnamed_addr #2
declare i32 @allocate_resource(ptr noundef, ptr noundef, i32 noundef, i64 noundef, i64 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @kfree(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"pcmcia_socket", !11, i64 0, !11, i64 8, !6, i64 16}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"pcmcia_align_data", !14, i64 0, !14, i64 8, !11, i64 16}
!14 = !{!"long", !7, i64 0}
!15 = !{!13, !14, i64 8}
!16 = !{!13, !11, i64 16}
| ; ModuleID = 'AnghaBench/linux/drivers/pcmcia/extr_rsrc_nonstatic.c___nonstatic_find_io_region.c'
source_filename = "AnghaBench/linux/drivers/pcmcia/extr_rsrc_nonstatic.c___nonstatic_find_io_region.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.pcmcia_align_data = type { i64, i64, ptr }
@IORESOURCE_IO = common local_unnamed_addr global i32 0, align 4
@ioport_resource = common global i32 0, align 4
@pcmcia_align = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @__nonstatic_find_io_region], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef ptr @__nonstatic_find_io_region(ptr noundef %0, i64 noundef %1, i32 noundef %2, i64 noundef %3) #0 {
%5 = alloca %struct.pcmcia_align_data, align 8
%6 = load i32, ptr @IORESOURCE_IO, align 4, !tbaa !6
%7 = getelementptr inbounds i8, ptr %0, i64 16
%8 = tail call i32 @dev_name(ptr noundef nonnull %7) #3
%9 = tail call ptr @pcmcia_make_resource(i32 noundef 0, i32 noundef %2, i32 noundef %6, i32 noundef %8) #3
%10 = getelementptr inbounds i8, ptr %0, i64 8
%11 = load ptr, ptr %10, align 8, !tbaa !10
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #3
%12 = add i64 %3, -1
store i64 %12, ptr %5, align 8, !tbaa !13
%13 = and i64 %12, %1
%14 = getelementptr inbounds i8, ptr %5, i64 8
store i64 %13, ptr %14, align 8, !tbaa !16
%15 = getelementptr inbounds i8, ptr %5, i64 16
store ptr %11, ptr %15, align 8, !tbaa !17
%16 = load i32, ptr @pcmcia_align, align 4, !tbaa !6
%17 = call i32 @allocate_resource(ptr noundef nonnull @ioport_resource, ptr noundef %9, i32 noundef %2, i64 noundef %1, i64 noundef -1, i32 noundef 1, i32 noundef %16, ptr noundef nonnull %5) #3
%18 = icmp eq i32 %17, 0
br i1 %18, label %21, label %19
19: ; preds = %4
%20 = call i32 @kfree(ptr noundef %9) #3
br label %21
21: ; preds = %19, %4
%22 = phi ptr [ null, %19 ], [ %9, %4 ]
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #3
ret ptr %22
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @pcmcia_make_resource(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dev_name(ptr noundef) local_unnamed_addr #2
declare i32 @allocate_resource(ptr noundef, ptr noundef, i32 noundef, i64 noundef, i64 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @kfree(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"pcmcia_socket", !12, i64 0, !12, i64 8, !7, i64 16}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"pcmcia_align_data", !15, i64 0, !15, i64 8, !12, i64 16}
!15 = !{!"long", !8, i64 0}
!16 = !{!14, !15, i64 8}
!17 = !{!14, !12, i64 16}
| linux_drivers_pcmcia_extr_rsrc_nonstatic.c___nonstatic_find_io_region |
; ModuleID = 'AnghaBench/freebsd/sys/arm/ti/extr_ti_sdma.c_ti_sdma_is_omap3_rev.c'
source_filename = "AnghaBench/freebsd/sys/arm/ti/extr_ti_sdma.c_ti_sdma_is_omap3_rev.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@DMA4_OMAP3_REV = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @ti_sdma_is_omap3_rev], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define internal i32 @ti_sdma_is_omap3_rev(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = load i64, ptr @DMA4_OMAP3_REV, align 8, !tbaa !10
%4 = icmp eq i64 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ti_sdma_softc", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/arm/ti/extr_ti_sdma.c_ti_sdma_is_omap3_rev.c'
source_filename = "AnghaBench/freebsd/sys/arm/ti/extr_ti_sdma.c_ti_sdma_is_omap3_rev.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DMA4_OMAP3_REV = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @ti_sdma_is_omap3_rev], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal range(i32 0, 2) i32 @ti_sdma_is_omap3_rev(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = load i64, ptr @DMA4_OMAP3_REV, align 8, !tbaa !11
%4 = icmp eq i64 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ti_sdma_softc", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| freebsd_sys_arm_ti_extr_ti_sdma.c_ti_sdma_is_omap3_rev |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb3/extr_t3_hw.c_t3_port_intr_clear.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb3/extr_t3_hw.c_t3_port_intr_clear.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@A_XGM_INT_CAUSE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @t3_port_intr_clear], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @t3_port_intr_clear(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @adap2pinfo(ptr noundef %0, i32 noundef %1) #2
%4 = load i32, ptr @A_XGM_INT_CAUSE, align 4, !tbaa !5
%5 = tail call i32 @XGM_REG(i32 noundef %4, i32 noundef %1) #2
%6 = tail call i32 @t3_write_reg(ptr noundef %0, i32 noundef %5, i32 noundef -1) #2
%7 = load i32, ptr @A_XGM_INT_CAUSE, align 4, !tbaa !5
%8 = tail call i32 @XGM_REG(i32 noundef %7, i32 noundef %1) #2
%9 = tail call i32 @t3_read_reg(ptr noundef %0, i32 noundef %8) #2
%10 = load ptr, ptr %3, align 8, !tbaa !9
%11 = load ptr, ptr %10, align 8, !tbaa !12
%12 = tail call i32 %11(ptr noundef nonnull %3) #2
ret void
}
declare ptr @adap2pinfo(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @t3_write_reg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @XGM_REG(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @t3_read_reg(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"cphy", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_3__", !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb3/extr_t3_hw.c_t3_port_intr_clear.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb3/extr_t3_hw.c_t3_port_intr_clear.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@A_XGM_INT_CAUSE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @t3_port_intr_clear], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @t3_port_intr_clear(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @adap2pinfo(ptr noundef %0, i32 noundef %1) #2
%4 = load i32, ptr @A_XGM_INT_CAUSE, align 4, !tbaa !6
%5 = tail call i32 @XGM_REG(i32 noundef %4, i32 noundef %1) #2
%6 = tail call i32 @t3_write_reg(ptr noundef %0, i32 noundef %5, i32 noundef -1) #2
%7 = load i32, ptr @A_XGM_INT_CAUSE, align 4, !tbaa !6
%8 = tail call i32 @XGM_REG(i32 noundef %7, i32 noundef %1) #2
%9 = tail call i32 @t3_read_reg(ptr noundef %0, i32 noundef %8) #2
%10 = load ptr, ptr %3, align 8, !tbaa !10
%11 = load ptr, ptr %10, align 8, !tbaa !13
%12 = tail call i32 %11(ptr noundef nonnull %3) #2
ret void
}
declare ptr @adap2pinfo(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @t3_write_reg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @XGM_REG(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @t3_read_reg(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"cphy", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"TYPE_3__", !12, i64 0}
| linux_drivers_net_ethernet_chelsio_cxgb3_extr_t3_hw.c_t3_port_intr_clear |
; ModuleID = 'AnghaBench/reactos/modules/rosapps/applications/net/tsclient/rdesktop/vnc/extr_vnc.c_xwin_toggle_fullscreen.c'
source_filename = "AnghaBench/reactos/modules/rosapps/applications/net/tsclient/rdesktop/vnc/extr_vnc.c_xwin_toggle_fullscreen.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local void @xwin_toggle_fullscreen() local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/reactos/modules/rosapps/applications/net/tsclient/rdesktop/vnc/extr_vnc.c_xwin_toggle_fullscreen.c'
source_filename = "AnghaBench/reactos/modules/rosapps/applications/net/tsclient/rdesktop/vnc/extr_vnc.c_xwin_toggle_fullscreen.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define void @xwin_toggle_fullscreen() local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| reactos_modules_rosapps_applications_net_tsclient_rdesktop_vnc_extr_vnc.c_xwin_toggle_fullscreen |
; ModuleID = 'AnghaBench/sqlcipher/tool/extr_speedtest8inst1.c_prepareAndRun.c'
source_filename = "AnghaBench/sqlcipher/tool/extr_speedtest8inst1.c_prepareAndRun.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [23 x i8] c"sqlite3_prepare_v2: %s\00", align 1
@BINARYLOG_PREPARE_V2 = dso_local local_unnamed_addr global i32 0, align 4
@SQLITE_OK = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [22 x i8] c"sqlite3_step loop: %s\00", align 1
@SQLITE_ROW = dso_local local_unnamed_addr global i32 0, align 4
@BINARYLOG_STEP = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [21 x i8] c"sqlite3_finalize: %s\00", align 1
@BINARYLOG_FINALIZE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @prepareAndRun], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @prepareAndRun(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = alloca ptr, align 8
%5 = alloca ptr, align 8
%6 = alloca [1024 x i8], align 16
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 1024, ptr nonnull %6) #3
%7 = getelementptr inbounds [1024 x i8], ptr %6, i64 0, i64 1023
store i8 0, ptr %7, align 1, !tbaa !5
%8 = call i32 @sqlite3_snprintf(i32 noundef 1023, ptr noundef nonnull %6, ptr noundef nonnull @.str, ptr noundef %2) #3
%9 = call i32 @sqlite3_instvfs_binarylog_marker(ptr noundef %0, ptr noundef nonnull %6) #3
%10 = call i64 (...) @sqlite3Hwtime() #3
%11 = call i32 @sqlite3_prepare_v2(ptr noundef %1, ptr noundef %2, i32 noundef -1, ptr noundef nonnull %4, ptr noundef nonnull %5) #3
%12 = call i64 (...) @sqlite3Hwtime() #3
%13 = sub nsw i64 %12, %10
%14 = load i32, ptr @BINARYLOG_PREPARE_V2, align 4, !tbaa !8
%15 = call i32 @sqlite3_instvfs_binarylog_call(ptr noundef %0, i32 noundef %14, i64 noundef %13, i32 noundef %11, ptr noundef %2) #3
%16 = load i32, ptr @SQLITE_OK, align 4, !tbaa !8
%17 = icmp eq i32 %11, %16
br i1 %17, label %18, label %41
18: ; preds = %3
%19 = call i32 @sqlite3_snprintf(i32 noundef 1023, ptr noundef nonnull %6, ptr noundef nonnull @.str.1, ptr noundef %2) #3
%20 = call i32 @sqlite3_instvfs_binarylog_marker(ptr noundef %0, ptr noundef nonnull %6) #3
%21 = call i64 (...) @sqlite3Hwtime() #3
br label %22
22: ; preds = %22, %18
%23 = load ptr, ptr %4, align 8, !tbaa !10
%24 = call i32 @sqlite3_step(ptr noundef %23) #3
%25 = load i32, ptr @SQLITE_ROW, align 4, !tbaa !8
%26 = icmp eq i32 %24, %25
br i1 %26, label %22, label %27, !llvm.loop !12
27: ; preds = %22
%28 = call i64 (...) @sqlite3Hwtime() #3
%29 = sub nsw i64 %28, %21
%30 = load i32, ptr @BINARYLOG_STEP, align 4, !tbaa !8
%31 = call i32 @sqlite3_instvfs_binarylog_call(ptr noundef %0, i32 noundef %30, i64 noundef %29, i32 noundef %24, ptr noundef %2) #3
%32 = call i32 @sqlite3_snprintf(i32 noundef 1023, ptr noundef nonnull %6, ptr noundef nonnull @.str.2, ptr noundef %2) #3
%33 = call i32 @sqlite3_instvfs_binarylog_marker(ptr noundef %0, ptr noundef nonnull %6) #3
%34 = call i64 (...) @sqlite3Hwtime() #3
%35 = load ptr, ptr %4, align 8, !tbaa !10
%36 = call i32 @sqlite3_finalize(ptr noundef %35) #3
%37 = call i64 (...) @sqlite3Hwtime() #3
%38 = sub nsw i64 %37, %34
%39 = load i32, ptr @BINARYLOG_FINALIZE, align 4, !tbaa !8
%40 = call i32 @sqlite3_instvfs_binarylog_call(ptr noundef %0, i32 noundef %39, i64 noundef %38, i32 noundef %36, ptr noundef %2) #3
br label %41
41: ; preds = %27, %3
call void @llvm.lifetime.end.p0(i64 1024, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @sqlite3_snprintf(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sqlite3_instvfs_binarylog_marker(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @sqlite3Hwtime(...) local_unnamed_addr #2
declare i32 @sqlite3_prepare_v2(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sqlite3_instvfs_binarylog_call(ptr noundef, i32 noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sqlite3_step(ptr noundef) local_unnamed_addr #2
declare i32 @sqlite3_finalize(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !6, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/sqlcipher/tool/extr_speedtest8inst1.c_prepareAndRun.c'
source_filename = "AnghaBench/sqlcipher/tool/extr_speedtest8inst1.c_prepareAndRun.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [23 x i8] c"sqlite3_prepare_v2: %s\00", align 1
@BINARYLOG_PREPARE_V2 = common local_unnamed_addr global i32 0, align 4
@SQLITE_OK = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [22 x i8] c"sqlite3_step loop: %s\00", align 1
@SQLITE_ROW = common local_unnamed_addr global i32 0, align 4
@BINARYLOG_STEP = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [21 x i8] c"sqlite3_finalize: %s\00", align 1
@BINARYLOG_FINALIZE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @prepareAndRun], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @prepareAndRun(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = alloca ptr, align 8
%5 = alloca ptr, align 8
%6 = alloca [1024 x i8], align 1
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 1024, ptr nonnull %6) #3
%7 = getelementptr inbounds i8, ptr %6, i64 1023
store i8 0, ptr %7, align 1, !tbaa !6
%8 = call i32 @sqlite3_snprintf(i32 noundef 1023, ptr noundef nonnull %6, ptr noundef nonnull @.str, ptr noundef %2) #3
%9 = call i32 @sqlite3_instvfs_binarylog_marker(ptr noundef %0, ptr noundef nonnull %6) #3
%10 = call i64 @sqlite3Hwtime() #3
%11 = call i32 @sqlite3_prepare_v2(ptr noundef %1, ptr noundef %2, i32 noundef -1, ptr noundef nonnull %4, ptr noundef nonnull %5) #3
%12 = call i64 @sqlite3Hwtime() #3
%13 = sub nsw i64 %12, %10
%14 = load i32, ptr @BINARYLOG_PREPARE_V2, align 4, !tbaa !9
%15 = call i32 @sqlite3_instvfs_binarylog_call(ptr noundef %0, i32 noundef %14, i64 noundef %13, i32 noundef %11, ptr noundef %2) #3
%16 = load i32, ptr @SQLITE_OK, align 4, !tbaa !9
%17 = icmp eq i32 %11, %16
br i1 %17, label %18, label %41
18: ; preds = %3
%19 = call i32 @sqlite3_snprintf(i32 noundef 1023, ptr noundef nonnull %6, ptr noundef nonnull @.str.1, ptr noundef %2) #3
%20 = call i32 @sqlite3_instvfs_binarylog_marker(ptr noundef %0, ptr noundef nonnull %6) #3
%21 = call i64 @sqlite3Hwtime() #3
br label %22
22: ; preds = %22, %18
%23 = load ptr, ptr %4, align 8, !tbaa !11
%24 = call i32 @sqlite3_step(ptr noundef %23) #3
%25 = load i32, ptr @SQLITE_ROW, align 4, !tbaa !9
%26 = icmp eq i32 %24, %25
br i1 %26, label %22, label %27, !llvm.loop !13
27: ; preds = %22
%28 = call i64 @sqlite3Hwtime() #3
%29 = sub nsw i64 %28, %21
%30 = load i32, ptr @BINARYLOG_STEP, align 4, !tbaa !9
%31 = call i32 @sqlite3_instvfs_binarylog_call(ptr noundef %0, i32 noundef %30, i64 noundef %29, i32 noundef %24, ptr noundef %2) #3
%32 = call i32 @sqlite3_snprintf(i32 noundef 1023, ptr noundef nonnull %6, ptr noundef nonnull @.str.2, ptr noundef %2) #3
%33 = call i32 @sqlite3_instvfs_binarylog_marker(ptr noundef %0, ptr noundef nonnull %6) #3
%34 = call i64 @sqlite3Hwtime() #3
%35 = load ptr, ptr %4, align 8, !tbaa !11
%36 = call i32 @sqlite3_finalize(ptr noundef %35) #3
%37 = call i64 @sqlite3Hwtime() #3
%38 = sub nsw i64 %37, %34
%39 = load i32, ptr @BINARYLOG_FINALIZE, align 4, !tbaa !9
%40 = call i32 @sqlite3_instvfs_binarylog_call(ptr noundef %0, i32 noundef %39, i64 noundef %38, i32 noundef %36, ptr noundef %2) #3
br label %41
41: ; preds = %27, %3
call void @llvm.lifetime.end.p0(i64 1024, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @sqlite3_snprintf(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sqlite3_instvfs_binarylog_marker(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @sqlite3Hwtime(...) local_unnamed_addr #2
declare i32 @sqlite3_prepare_v2(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sqlite3_instvfs_binarylog_call(ptr noundef, i32 noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sqlite3_step(ptr noundef) local_unnamed_addr #2
declare i32 @sqlite3_finalize(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| sqlcipher_tool_extr_speedtest8inst1.c_prepareAndRun |
; ModuleID = 'AnghaBench/vlc/modules/access/extr_bluray.c_notifyDiscontinuityToParser.c'
source_filename = "AnghaBench/vlc/modules/access/extr_bluray.c_notifyDiscontinuityToParser.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@audio = dso_local local_unnamed_addr global i32 0, align 4
@video = dso_local local_unnamed_addr global i32 0, align 4
@pg = dso_local local_unnamed_addr global i32 0, align 4
@ig = dso_local local_unnamed_addr global i32 0, align 4
@sec_audio = dso_local local_unnamed_addr global i32 0, align 4
@sec_video = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @notifyDiscontinuityToParser], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @notifyDiscontinuityToParser(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = icmp eq ptr %2, null
br i1 %3, label %17, label %4
4: ; preds = %1
%5 = load i32, ptr @audio, align 4, !tbaa !10
%6 = tail call i32 @DONOTIFY(i32 noundef %5) #2
%7 = load i32, ptr @video, align 4, !tbaa !10
%8 = tail call i32 @DONOTIFY(i32 noundef %7) #2
%9 = load i32, ptr @pg, align 4, !tbaa !10
%10 = tail call i32 @DONOTIFY(i32 noundef %9) #2
%11 = load i32, ptr @ig, align 4, !tbaa !10
%12 = tail call i32 @DONOTIFY(i32 noundef %11) #2
%13 = load i32, ptr @sec_audio, align 4, !tbaa !10
%14 = tail call i32 @DONOTIFY(i32 noundef %13) #2
%15 = load i32, ptr @sec_video, align 4, !tbaa !10
%16 = tail call i32 @DONOTIFY(i32 noundef %15) #2
br label %17
17: ; preds = %4, %1
ret void
}
declare i32 @DONOTIFY(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/vlc/modules/access/extr_bluray.c_notifyDiscontinuityToParser.c'
source_filename = "AnghaBench/vlc/modules/access/extr_bluray.c_notifyDiscontinuityToParser.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@audio = common local_unnamed_addr global i32 0, align 4
@video = common local_unnamed_addr global i32 0, align 4
@pg = common local_unnamed_addr global i32 0, align 4
@ig = common local_unnamed_addr global i32 0, align 4
@sec_audio = common local_unnamed_addr global i32 0, align 4
@sec_video = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @notifyDiscontinuityToParser], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @notifyDiscontinuityToParser(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = icmp eq ptr %2, null
br i1 %3, label %17, label %4
4: ; preds = %1
%5 = load i32, ptr @audio, align 4, !tbaa !11
%6 = tail call i32 @DONOTIFY(i32 noundef %5) #2
%7 = load i32, ptr @video, align 4, !tbaa !11
%8 = tail call i32 @DONOTIFY(i32 noundef %7) #2
%9 = load i32, ptr @pg, align 4, !tbaa !11
%10 = tail call i32 @DONOTIFY(i32 noundef %9) #2
%11 = load i32, ptr @ig, align 4, !tbaa !11
%12 = tail call i32 @DONOTIFY(i32 noundef %11) #2
%13 = load i32, ptr @sec_audio, align 4, !tbaa !11
%14 = tail call i32 @DONOTIFY(i32 noundef %13) #2
%15 = load i32, ptr @sec_video, align 4, !tbaa !11
%16 = tail call i32 @DONOTIFY(i32 noundef %15) #2
br label %17
17: ; preds = %4, %1
ret void
}
declare i32 @DONOTIFY(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
| vlc_modules_access_extr_bluray.c_notifyDiscontinuityToParser |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/kernel/extr_dumpstack.c_show_trace_log_lvl.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/kernel/extr_dumpstack.c_show_trace_log_lvl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [15 x i8] c"%sCall Trace:\0A\00", align 1
@print_trace_ops = dso_local global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @show_trace_log_lvl(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = tail call i32 @printk(ptr noundef nonnull @.str, ptr noundef %3) #2
%6 = tail call i32 @dump_trace(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef nonnull @print_trace_ops, ptr noundef %3) #2
ret void
}
declare i32 @printk(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dump_trace(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/kernel/extr_dumpstack.c_show_trace_log_lvl.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/kernel/extr_dumpstack.c_show_trace_log_lvl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [15 x i8] c"%sCall Trace:\0A\00", align 1
@print_trace_ops = common global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @show_trace_log_lvl(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = tail call i32 @printk(ptr noundef nonnull @.str, ptr noundef %3) #2
%6 = tail call i32 @dump_trace(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef nonnull @print_trace_ops, ptr noundef %3) #2
ret void
}
declare i32 @printk(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dump_trace(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_arch_x86_kernel_extr_dumpstack.c_show_trace_log_lvl |
; ModuleID = 'AnghaBench/linux/drivers/input/touchscreen/extr_pixcir_i2c_ts.c_pixcir_ts_report.c'
source_filename = "AnghaBench/linux/drivers/input/touchscreen/extr_pixcir_i2c_ts.c_pixcir_ts_report.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.pixcir_i2c_ts_data = type { i32, ptr, ptr }
%struct.pixcir_report_data = type { i32, ptr, ptr }
%struct.TYPE_4__ = type { i32, i32 }
@PIXCIR_MAX_SLOTS = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [26 x i8] c"no free slot for id 0x%x\0A\00", align 1
@MT_TOOL_FINGER = dso_local local_unnamed_addr global i32 0, align 4
@ABS_MT_POSITION_X = dso_local local_unnamed_addr global i32 0, align 4
@ABS_MT_POSITION_Y = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [25 x i8] c"%d: slot %d, x %d, y %d\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @pixcir_ts_report], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @pixcir_ts_report(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr @PIXCIR_MAX_SLOTS, align 4, !tbaa !5
%4 = zext i32 %3 to i64
%5 = alloca i32, i64 %4, align 16
%6 = getelementptr inbounds %struct.pixcir_i2c_ts_data, ptr %0, i64 0, i32 2
%7 = load ptr, ptr %6, align 8, !tbaa !9
%8 = getelementptr inbounds %struct.pixcir_i2c_ts_data, ptr %0, i64 0, i32 1
%9 = load ptr, ptr %8, align 8, !tbaa !12
%10 = load i32, ptr %1, align 8, !tbaa !13
%11 = tail call i32 @llvm.smin.i32(i32 %10, i32 %3)
%12 = load i64, ptr %9, align 8, !tbaa !15
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %19
14: ; preds = %2
%15 = load i32, ptr %0, align 8, !tbaa !18
%16 = getelementptr inbounds %struct.pixcir_report_data, ptr %1, i64 0, i32 1
%17 = load ptr, ptr %16, align 8, !tbaa !19
%18 = call i32 @input_mt_assign_slots(i32 noundef %15, ptr noundef nonnull %5, ptr noundef %17, i32 noundef %11, i32 noundef 0) #3
br label %19
19: ; preds = %14, %2
%20 = icmp sgt i32 %11, 0
br i1 %20, label %21, label %73
21: ; preds = %19
%22 = getelementptr inbounds %struct.pixcir_report_data, ptr %1, i64 0, i32 2
%23 = getelementptr inbounds %struct.pixcir_report_data, ptr %1, i64 0, i32 1
%24 = zext nneg i32 %11 to i64
br label %25
25: ; preds = %21, %70
%26 = phi i64 [ 0, %21 ], [ %71, %70 ]
%27 = load i64, ptr %9, align 8, !tbaa !15
%28 = icmp eq i64 %27, 0
br i1 %28, label %41, label %29
29: ; preds = %25
%30 = load i32, ptr %0, align 8, !tbaa !18
%31 = load ptr, ptr %22, align 8, !tbaa !20
%32 = getelementptr inbounds i32, ptr %31, i64 %26
%33 = load i32, ptr %32, align 4, !tbaa !5
%34 = call i32 @input_mt_get_slot_by_key(i32 noundef %30, i32 noundef %33) #3
%35 = icmp slt i32 %34, 0
br i1 %35, label %36, label %44
36: ; preds = %29
%37 = load ptr, ptr %22, align 8, !tbaa !20
%38 = getelementptr inbounds i32, ptr %37, i64 %26
%39 = load i32, ptr %38, align 4, !tbaa !5
%40 = call i32 (ptr, ptr, i32, ...) @dev_dbg(ptr noundef %7, ptr noundef nonnull @.str, i32 noundef %39) #3
br label %70
41: ; preds = %25
%42 = getelementptr inbounds i32, ptr %5, i64 %26
%43 = load i32, ptr %42, align 4, !tbaa !5
br label %44
44: ; preds = %29, %41
%45 = phi i32 [ %34, %29 ], [ %43, %41 ]
%46 = load i32, ptr %0, align 8, !tbaa !18
%47 = call i32 @input_mt_slot(i32 noundef %46, i32 noundef %45) #3
%48 = load i32, ptr %0, align 8, !tbaa !18
%49 = load i32, ptr @MT_TOOL_FINGER, align 4, !tbaa !5
%50 = call i32 @input_mt_report_slot_state(i32 noundef %48, i32 noundef %49, i32 noundef 1) #3
%51 = load i32, ptr %0, align 8, !tbaa !18
%52 = load i32, ptr @ABS_MT_POSITION_X, align 4, !tbaa !5
%53 = load ptr, ptr %23, align 8, !tbaa !19
%54 = getelementptr inbounds %struct.TYPE_4__, ptr %53, i64 %26, i32 1
%55 = load i32, ptr %54, align 4, !tbaa !21
%56 = call i32 @input_report_abs(i32 noundef %51, i32 noundef %52, i32 noundef %55) #3
%57 = load i32, ptr %0, align 8, !tbaa !18
%58 = load i32, ptr @ABS_MT_POSITION_Y, align 4, !tbaa !5
%59 = load ptr, ptr %23, align 8, !tbaa !19
%60 = getelementptr inbounds %struct.TYPE_4__, ptr %59, i64 %26
%61 = load i32, ptr %60, align 4, !tbaa !23
%62 = call i32 @input_report_abs(i32 noundef %57, i32 noundef %58, i32 noundef %61) #3
%63 = load ptr, ptr %23, align 8, !tbaa !19
%64 = getelementptr inbounds %struct.TYPE_4__, ptr %63, i64 %26
%65 = getelementptr inbounds %struct.TYPE_4__, ptr %63, i64 %26, i32 1
%66 = load i32, ptr %65, align 4, !tbaa !21
%67 = load i32, ptr %64, align 4, !tbaa !23
%68 = trunc i64 %26 to i32
%69 = call i32 (ptr, ptr, i32, ...) @dev_dbg(ptr noundef %7, ptr noundef nonnull @.str.1, i32 noundef %68, i32 noundef %45, i32 noundef %66, i32 noundef %67) #3
br label %70
70: ; preds = %44, %36
%71 = add nuw nsw i64 %26, 1
%72 = icmp eq i64 %71, %24
br i1 %72, label %73, label %25, !llvm.loop !24
73: ; preds = %70, %19
%74 = load i32, ptr %0, align 8, !tbaa !18
%75 = call i32 @input_mt_sync_frame(i32 noundef %74) #3
%76 = load i32, ptr %0, align 8, !tbaa !18
%77 = call i32 @input_sync(i32 noundef %76) #3
ret void
}
declare i32 @input_mt_assign_slots(i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @input_mt_get_slot_by_key(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_dbg(ptr noundef, ptr noundef, i32 noundef, ...) local_unnamed_addr #1
declare i32 @input_mt_slot(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @input_mt_report_slot_state(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @input_report_abs(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @input_mt_sync_frame(i32 noundef) local_unnamed_addr #1
declare i32 @input_sync(i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 16}
!10 = !{!"pixcir_i2c_ts_data", !6, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !11, i64 8}
!13 = !{!14, !6, i64 0}
!14 = !{!"pixcir_report_data", !6, i64 0, !11, i64 8, !11, i64 16}
!15 = !{!16, !17, i64 0}
!16 = !{!"pixcir_i2c_chip_data", !17, i64 0}
!17 = !{!"long", !7, i64 0}
!18 = !{!10, !6, i64 0}
!19 = !{!14, !11, i64 8}
!20 = !{!14, !11, i64 16}
!21 = !{!22, !6, i64 4}
!22 = !{!"TYPE_4__", !6, i64 0, !6, i64 4}
!23 = !{!22, !6, i64 0}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/input/touchscreen/extr_pixcir_i2c_ts.c_pixcir_ts_report.c'
source_filename = "AnghaBench/linux/drivers/input/touchscreen/extr_pixcir_i2c_ts.c_pixcir_ts_report.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i32, i32 }
@PIXCIR_MAX_SLOTS = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [26 x i8] c"no free slot for id 0x%x\0A\00", align 1
@MT_TOOL_FINGER = common local_unnamed_addr global i32 0, align 4
@ABS_MT_POSITION_X = common local_unnamed_addr global i32 0, align 4
@ABS_MT_POSITION_Y = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [25 x i8] c"%d: slot %d, x %d, y %d\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @pixcir_ts_report], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @pixcir_ts_report(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr @PIXCIR_MAX_SLOTS, align 4, !tbaa !6
%4 = zext i32 %3 to i64
%5 = alloca i32, i64 %4, align 4
%6 = getelementptr inbounds i8, ptr %0, i64 16
%7 = load ptr, ptr %6, align 8, !tbaa !10
%8 = getelementptr inbounds i8, ptr %0, i64 8
%9 = load ptr, ptr %8, align 8, !tbaa !13
%10 = load i32, ptr %1, align 8, !tbaa !14
%11 = tail call i32 @llvm.smin.i32(i32 %10, i32 %3)
%12 = load i64, ptr %9, align 8, !tbaa !16
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %19
14: ; preds = %2
%15 = load i32, ptr %0, align 8, !tbaa !19
%16 = getelementptr inbounds i8, ptr %1, i64 8
%17 = load ptr, ptr %16, align 8, !tbaa !20
%18 = call i32 @input_mt_assign_slots(i32 noundef %15, ptr noundef nonnull %5, ptr noundef %17, i32 noundef %11, i32 noundef 0) #3
br label %19
19: ; preds = %14, %2
%20 = icmp sgt i32 %11, 0
br i1 %20, label %21, label %73
21: ; preds = %19
%22 = getelementptr inbounds i8, ptr %1, i64 16
%23 = getelementptr inbounds i8, ptr %1, i64 8
%24 = zext nneg i32 %11 to i64
br label %25
25: ; preds = %21, %70
%26 = phi i64 [ 0, %21 ], [ %71, %70 ]
%27 = load i64, ptr %9, align 8, !tbaa !16
%28 = icmp eq i64 %27, 0
br i1 %28, label %41, label %29
29: ; preds = %25
%30 = load i32, ptr %0, align 8, !tbaa !19
%31 = load ptr, ptr %22, align 8, !tbaa !21
%32 = getelementptr inbounds i32, ptr %31, i64 %26
%33 = load i32, ptr %32, align 4, !tbaa !6
%34 = call i32 @input_mt_get_slot_by_key(i32 noundef %30, i32 noundef %33) #3
%35 = icmp slt i32 %34, 0
br i1 %35, label %36, label %44
36: ; preds = %29
%37 = load ptr, ptr %22, align 8, !tbaa !21
%38 = getelementptr inbounds i32, ptr %37, i64 %26
%39 = load i32, ptr %38, align 4, !tbaa !6
%40 = call i32 (ptr, ptr, i32, ...) @dev_dbg(ptr noundef %7, ptr noundef nonnull @.str, i32 noundef %39) #3
br label %70
41: ; preds = %25
%42 = getelementptr inbounds i32, ptr %5, i64 %26
%43 = load i32, ptr %42, align 4, !tbaa !6
br label %44
44: ; preds = %29, %41
%45 = phi i32 [ %34, %29 ], [ %43, %41 ]
%46 = load i32, ptr %0, align 8, !tbaa !19
%47 = call i32 @input_mt_slot(i32 noundef %46, i32 noundef %45) #3
%48 = load i32, ptr %0, align 8, !tbaa !19
%49 = load i32, ptr @MT_TOOL_FINGER, align 4, !tbaa !6
%50 = call i32 @input_mt_report_slot_state(i32 noundef %48, i32 noundef %49, i32 noundef 1) #3
%51 = load i32, ptr %0, align 8, !tbaa !19
%52 = load i32, ptr @ABS_MT_POSITION_X, align 4, !tbaa !6
%53 = load ptr, ptr %23, align 8, !tbaa !20
%54 = getelementptr inbounds %struct.TYPE_4__, ptr %53, i64 %26, i32 1
%55 = load i32, ptr %54, align 4, !tbaa !22
%56 = call i32 @input_report_abs(i32 noundef %51, i32 noundef %52, i32 noundef %55) #3
%57 = load i32, ptr %0, align 8, !tbaa !19
%58 = load i32, ptr @ABS_MT_POSITION_Y, align 4, !tbaa !6
%59 = load ptr, ptr %23, align 8, !tbaa !20
%60 = getelementptr inbounds %struct.TYPE_4__, ptr %59, i64 %26
%61 = load i32, ptr %60, align 4, !tbaa !24
%62 = call i32 @input_report_abs(i32 noundef %57, i32 noundef %58, i32 noundef %61) #3
%63 = load ptr, ptr %23, align 8, !tbaa !20
%64 = getelementptr inbounds %struct.TYPE_4__, ptr %63, i64 %26
%65 = getelementptr inbounds i8, ptr %64, i64 4
%66 = load i32, ptr %65, align 4, !tbaa !22
%67 = load i32, ptr %64, align 4, !tbaa !24
%68 = trunc nuw nsw i64 %26 to i32
%69 = call i32 (ptr, ptr, i32, ...) @dev_dbg(ptr noundef %7, ptr noundef nonnull @.str.1, i32 noundef %68, i32 noundef %45, i32 noundef %66, i32 noundef %67) #3
br label %70
70: ; preds = %44, %36
%71 = add nuw nsw i64 %26, 1
%72 = icmp eq i64 %71, %24
br i1 %72, label %73, label %25, !llvm.loop !25
73: ; preds = %70, %19
%74 = load i32, ptr %0, align 8, !tbaa !19
%75 = call i32 @input_mt_sync_frame(i32 noundef %74) #3
%76 = load i32, ptr %0, align 8, !tbaa !19
%77 = call i32 @input_sync(i32 noundef %76) #3
ret void
}
declare i32 @input_mt_assign_slots(i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @input_mt_get_slot_by_key(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_dbg(ptr noundef, ptr noundef, i32 noundef, ...) local_unnamed_addr #1
declare i32 @input_mt_slot(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @input_mt_report_slot_state(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @input_report_abs(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @input_mt_sync_frame(i32 noundef) local_unnamed_addr #1
declare i32 @input_sync(i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 16}
!11 = !{!"pixcir_i2c_ts_data", !7, i64 0, !12, i64 8, !12, i64 16}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!15, !7, i64 0}
!15 = !{!"pixcir_report_data", !7, i64 0, !12, i64 8, !12, i64 16}
!16 = !{!17, !18, i64 0}
!17 = !{!"pixcir_i2c_chip_data", !18, i64 0}
!18 = !{!"long", !8, i64 0}
!19 = !{!11, !7, i64 0}
!20 = !{!15, !12, i64 8}
!21 = !{!15, !12, i64 16}
!22 = !{!23, !7, i64 4}
!23 = !{!"TYPE_4__", !7, i64 0, !7, i64 4}
!24 = !{!23, !7, i64 0}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
| linux_drivers_input_touchscreen_extr_pixcir_i2c_ts.c_pixcir_ts_report |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/bridge/adv7511/extr_adv7511_cec.c_adv7511_cec_irq_process.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/bridge/adv7511/extr_adv7511_cec.c_adv7511_cec_irq_process.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.cec_msg = type { i32, ptr }
%struct.adv7511 = type { i64, i32, i32 }
@ADV7533 = dso_local local_unnamed_addr global i64 0, align 8
@ADV7533_REG_CEC_OFFSET = dso_local local_unnamed_addr global i32 0, align 4
@ADV7511_INT1_CEC_TX_READY = dso_local local_unnamed_addr global i32 0, align 4
@ADV7511_INT1_CEC_TX_ARBIT_LOST = dso_local local_unnamed_addr global i32 0, align 4
@ADV7511_INT1_CEC_TX_RETRY_TIMEOUT = dso_local local_unnamed_addr global i32 0, align 4
@ADV7511_INT1_CEC_RX_READY1 = dso_local local_unnamed_addr global i32 0, align 4
@ADV7511_REG_CEC_RX_FRAME_LEN = dso_local local_unnamed_addr global i64 0, align 8
@ADV7511_REG_CEC_RX_FRAME_HDR = dso_local local_unnamed_addr global i64 0, align 8
@ADV7511_REG_CEC_RX_BUFFERS = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local void @adv7511_cec_irq_process(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = alloca %struct.cec_msg, align 8
%4 = alloca i32, align 4
%5 = alloca i32, align 4
%6 = load i64, ptr %0, align 8, !tbaa !5
%7 = load i64, ptr @ADV7533, align 8, !tbaa !11
%8 = icmp eq i64 %6, %7
%9 = load i32, ptr @ADV7533_REG_CEC_OFFSET, align 4
%10 = zext i32 %9 to i64
%11 = load i32, ptr @ADV7511_INT1_CEC_TX_READY, align 4, !tbaa !12
%12 = load i32, ptr @ADV7511_INT1_CEC_TX_ARBIT_LOST, align 4, !tbaa !12
%13 = or i32 %12, %11
%14 = load i32, ptr @ADV7511_INT1_CEC_TX_RETRY_TIMEOUT, align 4, !tbaa !12
%15 = or i32 %13, %14
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #5
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %3, i8 0, i64 16, i1 false)
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #5
%16 = and i32 %15, %1
%17 = icmp eq i32 %16, 0
br i1 %17, label %20, label %18
18: ; preds = %2
%19 = tail call i32 @adv_cec_tx_raw_status(ptr noundef nonnull %0, i32 noundef %1) #5
br label %20
20: ; preds = %18, %2
%21 = load i32, ptr @ADV7511_INT1_CEC_RX_READY1, align 4, !tbaa !12
%22 = and i32 %21, %1
%23 = icmp eq i32 %22, 0
br i1 %23, label %61, label %24
24: ; preds = %20
%25 = getelementptr inbounds %struct.adv7511, ptr %0, i64 0, i32 2
%26 = load i32, ptr %25, align 4, !tbaa !13
%27 = load i64, ptr @ADV7511_REG_CEC_RX_FRAME_LEN, align 8, !tbaa !11
%28 = select i1 %8, i64 %10, i64 0
%29 = add nsw i64 %27, %28
%30 = call i64 @regmap_read(i32 noundef %26, i64 noundef %29, ptr noundef nonnull %4) #5
%31 = icmp eq i64 %30, 0
br i1 %31, label %32, label %61
32: ; preds = %24
%33 = load i32, ptr %4, align 4, !tbaa !12
%34 = and i32 %33, 31
%35 = call i32 @llvm.umin.i32(i32 %34, i32 16)
store i32 %35, ptr %3, align 8, !tbaa !14
%36 = icmp eq i32 %34, 0
br i1 %36, label %61, label %37
37: ; preds = %32
%38 = zext nneg i32 %35 to i64
br label %39
39: ; preds = %37, %39
%40 = phi i64 [ 0, %37 ], [ %47, %39 ]
%41 = load i32, ptr %25, align 4, !tbaa !13
%42 = load i64, ptr @ADV7511_REG_CEC_RX_FRAME_HDR, align 8, !tbaa !11
%43 = add nuw nsw i64 %40, %28
%44 = add i64 %43, %42
%45 = call i64 @regmap_read(i32 noundef %41, i64 noundef %44, ptr noundef nonnull %5) #5
%46 = getelementptr inbounds i32, ptr null, i64 %40
store i32 poison, ptr %46, align 4, !tbaa !12
%47 = add nuw nsw i64 %40, 1
%48 = icmp ult i64 %47, %38
br i1 %48, label %39, label %49, !llvm.loop !17
49: ; preds = %39
%50 = load i32, ptr %25, align 4, !tbaa !13
%51 = load i64, ptr @ADV7511_REG_CEC_RX_BUFFERS, align 8, !tbaa !11
%52 = add nsw i64 %51, %28
%53 = call i32 @regmap_write(i32 noundef %50, i64 noundef %52, i32 noundef 1) #5
%54 = load i32, ptr %25, align 4, !tbaa !13
%55 = load i64, ptr @ADV7511_REG_CEC_RX_BUFFERS, align 8, !tbaa !11
%56 = add nsw i64 %55, %28
%57 = call i32 @regmap_write(i32 noundef %54, i64 noundef %56, i32 noundef 0) #5
%58 = getelementptr inbounds %struct.adv7511, ptr %0, i64 0, i32 1
%59 = load i32, ptr %58, align 8, !tbaa !19
%60 = call i32 @cec_received_msg(i32 noundef %59, ptr noundef nonnull %3) #5
br label %61
61: ; preds = %32, %24, %20, %49
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #5
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #5
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #5
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
declare i32 @adv_cec_tx_raw_status(ptr noundef, i32 noundef) local_unnamed_addr #3
declare i64 @regmap_read(i32 noundef, i64 noundef, ptr noundef) local_unnamed_addr #3
declare i32 @regmap_write(i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #3
declare i32 @cec_received_msg(i32 noundef, ptr noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #4
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"adv7511", !7, i64 0, !10, i64 8, !10, i64 12}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!10, !10, i64 0}
!13 = !{!6, !10, i64 12}
!14 = !{!15, !10, i64 0}
!15 = !{!"cec_msg", !10, i64 0, !16, i64 8}
!16 = !{!"any pointer", !8, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/bridge/adv7511/extr_adv7511_cec.c_adv7511_cec_irq_process.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/bridge/adv7511/extr_adv7511_cec.c_adv7511_cec_irq_process.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.cec_msg = type { i32, ptr }
@ADV7533 = common local_unnamed_addr global i64 0, align 8
@ADV7533_REG_CEC_OFFSET = common local_unnamed_addr global i32 0, align 4
@ADV7511_INT1_CEC_TX_READY = common local_unnamed_addr global i32 0, align 4
@ADV7511_INT1_CEC_TX_ARBIT_LOST = common local_unnamed_addr global i32 0, align 4
@ADV7511_INT1_CEC_TX_RETRY_TIMEOUT = common local_unnamed_addr global i32 0, align 4
@ADV7511_INT1_CEC_RX_READY1 = common local_unnamed_addr global i32 0, align 4
@ADV7511_REG_CEC_RX_FRAME_LEN = common local_unnamed_addr global i64 0, align 8
@ADV7511_REG_CEC_RX_FRAME_HDR = common local_unnamed_addr global i64 0, align 8
@ADV7511_REG_CEC_RX_BUFFERS = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @adv7511_cec_irq_process(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = alloca %struct.cec_msg, align 8
%4 = alloca i32, align 4
%5 = alloca i32, align 4
%6 = load i64, ptr %0, align 8, !tbaa !6
%7 = load i64, ptr @ADV7533, align 8, !tbaa !12
%8 = icmp eq i64 %6, %7
%9 = load i32, ptr @ADV7533_REG_CEC_OFFSET, align 4
%10 = zext i32 %9 to i64
%11 = load i32, ptr @ADV7511_INT1_CEC_TX_READY, align 4, !tbaa !13
%12 = load i32, ptr @ADV7511_INT1_CEC_TX_ARBIT_LOST, align 4, !tbaa !13
%13 = or i32 %12, %11
%14 = load i32, ptr @ADV7511_INT1_CEC_TX_RETRY_TIMEOUT, align 4, !tbaa !13
%15 = or i32 %13, %14
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #5
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %3, i8 0, i64 16, i1 false)
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #5
%16 = and i32 %15, %1
%17 = icmp eq i32 %16, 0
br i1 %17, label %20, label %18
18: ; preds = %2
%19 = tail call i32 @adv_cec_tx_raw_status(ptr noundef nonnull %0, i32 noundef %1) #5
br label %20
20: ; preds = %18, %2
%21 = load i32, ptr @ADV7511_INT1_CEC_RX_READY1, align 4, !tbaa !13
%22 = and i32 %21, %1
%23 = icmp eq i32 %22, 0
br i1 %23, label %61, label %24
24: ; preds = %20
%25 = getelementptr inbounds i8, ptr %0, i64 12
%26 = load i32, ptr %25, align 4, !tbaa !14
%27 = load i64, ptr @ADV7511_REG_CEC_RX_FRAME_LEN, align 8, !tbaa !12
%28 = select i1 %8, i64 %10, i64 0
%29 = add nsw i64 %27, %28
%30 = call i64 @regmap_read(i32 noundef %26, i64 noundef %29, ptr noundef nonnull %4) #5
%31 = icmp eq i64 %30, 0
br i1 %31, label %32, label %61
32: ; preds = %24
%33 = load i32, ptr %4, align 4, !tbaa !13
%34 = and i32 %33, 31
%35 = call i32 @llvm.umin.i32(i32 %34, i32 16)
store i32 %35, ptr %3, align 8, !tbaa !15
%36 = icmp eq i32 %34, 0
br i1 %36, label %61, label %37
37: ; preds = %32
%38 = zext nneg i32 %35 to i64
br label %39
39: ; preds = %37, %39
%40 = phi i64 [ 0, %37 ], [ %47, %39 ]
%41 = load i32, ptr %25, align 4, !tbaa !14
%42 = load i64, ptr @ADV7511_REG_CEC_RX_FRAME_HDR, align 8, !tbaa !12
%43 = add nuw nsw i64 %40, %28
%44 = add i64 %43, %42
%45 = call i64 @regmap_read(i32 noundef %41, i64 noundef %44, ptr noundef nonnull %5) #5
%46 = getelementptr inbounds i32, ptr null, i64 %40
store i32 poison, ptr %46, align 4, !tbaa !13
%47 = add nuw nsw i64 %40, 1
%48 = icmp ult i64 %47, %38
br i1 %48, label %39, label %49, !llvm.loop !18
49: ; preds = %39
%50 = load i32, ptr %25, align 4, !tbaa !14
%51 = load i64, ptr @ADV7511_REG_CEC_RX_BUFFERS, align 8, !tbaa !12
%52 = add nsw i64 %51, %28
%53 = call i32 @regmap_write(i32 noundef %50, i64 noundef %52, i32 noundef 1) #5
%54 = load i32, ptr %25, align 4, !tbaa !14
%55 = load i64, ptr @ADV7511_REG_CEC_RX_BUFFERS, align 8, !tbaa !12
%56 = add nsw i64 %55, %28
%57 = call i32 @regmap_write(i32 noundef %54, i64 noundef %56, i32 noundef 0) #5
%58 = getelementptr inbounds i8, ptr %0, i64 8
%59 = load i32, ptr %58, align 8, !tbaa !20
%60 = call i32 @cec_received_msg(i32 noundef %59, ptr noundef nonnull %3) #5
br label %61
61: ; preds = %32, %24, %20, %49
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #5
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #5
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #5
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
declare i32 @adv_cec_tx_raw_status(ptr noundef, i32 noundef) local_unnamed_addr #3
declare i64 @regmap_read(i32 noundef, i64 noundef, ptr noundef) local_unnamed_addr #3
declare i32 @regmap_write(i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #3
declare i32 @cec_received_msg(i32 noundef, ptr noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #4
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"adv7511", !8, i64 0, !11, i64 8, !11, i64 12}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!11, !11, i64 0}
!14 = !{!7, !11, i64 12}
!15 = !{!16, !11, i64 0}
!16 = !{!"cec_msg", !11, i64 0, !17, i64 8}
!17 = !{!"any pointer", !9, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!7, !11, i64 8}
| linux_drivers_gpu_drm_bridge_adv7511_extr_adv7511_cec.c_adv7511_cec_irq_process |
; ModuleID = 'AnghaBench/linux/drivers/media/pci/pt3/extr_pt3.c_pt3_stop_streaming.c'
source_filename = "AnghaBench/linux/drivers/media/pci/pt3/extr_pt3.c_pt3_stop_streaming.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.pt3_adapter = type { ptr, ptr, %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32, i32 }
@.str = private unnamed_addr constant [48 x i8] c"PT3: failed to stop streaming of adap:%d/FE:%d\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @pt3_stop_streaming], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @pt3_stop_streaming(ptr noundef %0) #0 {
%2 = tail call i32 @pt3_stop_dma(ptr noundef %0) #2
%3 = icmp eq i32 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1
%5 = getelementptr inbounds %struct.pt3_adapter, ptr %0, i64 0, i32 2
%6 = getelementptr inbounds %struct.pt3_adapter, ptr %0, i64 0, i32 2, i32 1
%7 = load i32, ptr %6, align 4, !tbaa !5
%8 = load i32, ptr %5, align 8, !tbaa !12
%9 = getelementptr inbounds %struct.pt3_adapter, ptr %0, i64 0, i32 1
%10 = load ptr, ptr %9, align 8, !tbaa !13
%11 = load i32, ptr %10, align 4, !tbaa !14
%12 = tail call i32 @dev_warn(i32 noundef %7, ptr noundef nonnull @.str, i32 noundef %8, i32 noundef %11) #2
br label %13
13: ; preds = %4, %1
%14 = load ptr, ptr %0, align 8, !tbaa !16
%15 = tail call i32 @kthread_stop(ptr noundef %14) #2
store ptr null, ptr %0, align 8, !tbaa !16
ret i32 %15
}
declare i32 @pt3_stop_dma(ptr noundef) local_unnamed_addr #1
declare i32 @dev_warn(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @kthread_stop(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 20}
!6 = !{!"pt3_adapter", !7, i64 0, !7, i64 8, !10, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_3__", !11, i64 0, !11, i64 4}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 16}
!13 = !{!6, !7, i64 8}
!14 = !{!15, !11, i64 0}
!15 = !{!"TYPE_4__", !11, i64 0}
!16 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/media/pci/pt3/extr_pt3.c_pt3_stop_streaming.c'
source_filename = "AnghaBench/linux/drivers/media/pci/pt3/extr_pt3.c_pt3_stop_streaming.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [48 x i8] c"PT3: failed to stop streaming of adap:%d/FE:%d\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @pt3_stop_streaming], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @pt3_stop_streaming(ptr noundef %0) #0 {
%2 = tail call i32 @pt3_stop_dma(ptr noundef %0) #2
%3 = icmp eq i32 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, ptr %0, i64 16
%6 = getelementptr inbounds i8, ptr %0, i64 20
%7 = load i32, ptr %6, align 4, !tbaa !6
%8 = load i32, ptr %5, align 8, !tbaa !13
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = load ptr, ptr %9, align 8, !tbaa !14
%11 = load i32, ptr %10, align 4, !tbaa !15
%12 = tail call i32 @dev_warn(i32 noundef %7, ptr noundef nonnull @.str, i32 noundef %8, i32 noundef %11) #2
br label %13
13: ; preds = %4, %1
%14 = load ptr, ptr %0, align 8, !tbaa !17
%15 = tail call i32 @kthread_stop(ptr noundef %14) #2
store ptr null, ptr %0, align 8, !tbaa !17
ret i32 %15
}
declare i32 @pt3_stop_dma(ptr noundef) local_unnamed_addr #1
declare i32 @dev_warn(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @kthread_stop(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 20}
!7 = !{!"pt3_adapter", !8, i64 0, !8, i64 8, !11, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_3__", !12, i64 0, !12, i64 4}
!12 = !{!"int", !9, i64 0}
!13 = !{!7, !12, i64 16}
!14 = !{!7, !8, i64 8}
!15 = !{!16, !12, i64 0}
!16 = !{!"TYPE_4__", !12, i64 0}
!17 = !{!7, !8, i64 0}
| linux_drivers_media_pci_pt3_extr_pt3.c_pt3_stop_streaming |
; ModuleID = 'AnghaBench/linux/sound/soc/sof/imx/extr_..sof-priv.h_sof_stack.c'
source_filename = "AnghaBench/linux/sound/soc/sof/imx/extr_..sof-priv.h_sof_stack.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @sof_stack], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @sof_stack(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = tail call ptr @sof_arch_ops(ptr noundef %0) #2
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = icmp eq ptr %6, null
br i1 %7, label %12, label %8
8: ; preds = %4
%9 = tail call ptr @sof_arch_ops(ptr noundef %0) #2
%10 = load ptr, ptr %9, align 8, !tbaa !5
%11 = tail call i32 %10(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #2
br label %12
12: ; preds = %8, %4
ret void
}
declare ptr @sof_arch_ops(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/sound/soc/sof/imx/extr_..sof-priv.h_sof_stack.c'
source_filename = "AnghaBench/linux/sound/soc/sof/imx/extr_..sof-priv.h_sof_stack.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @sof_stack], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @sof_stack(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = tail call ptr @sof_arch_ops(ptr noundef %0) #2
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = icmp eq ptr %6, null
br i1 %7, label %12, label %8
8: ; preds = %4
%9 = tail call ptr @sof_arch_ops(ptr noundef %0) #2
%10 = load ptr, ptr %9, align 8, !tbaa !6
%11 = tail call i32 %10(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #2
br label %12
12: ; preds = %8, %4
ret void
}
declare ptr @sof_arch_ops(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_sound_soc_sof_imx_extr_..sof-priv.h_sof_stack |
; ModuleID = 'AnghaBench/freebsd/crypto/openssh/openbsd-compat/extr_blowfish.c_Blowfish_initstate.c'
source_filename = "AnghaBench/freebsd/crypto/openssh/openbsd-compat/extr_blowfish.c_Blowfish_initstate.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_15__ = type { %struct.TYPE_14__, %struct.TYPE_9__ }
%struct.TYPE_14__ = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.TYPE_9__ = type { %struct.TYPE_13__, %struct.TYPE_12__, %struct.TYPE_11__, %struct.TYPE_10__ }
%struct.TYPE_13__ = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.TYPE_12__ = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.TYPE_11__ = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.TYPE_10__ = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
@Blowfish_initstate.initstate = internal unnamed_addr constant %struct.TYPE_15__ { %struct.TYPE_14__ { i32 -785314906, i32 1266315497, i32 -381855128, i32 976866871, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 }, %struct.TYPE_9__ { %struct.TYPE_13__ { i32 608135816, i32 -2052912941, i32 320440878, i32 57701188, i32 -1542899678, i32 698298832, i32 137296536, i32 -330404727, i32 1160258022, i32 953160567, i32 -1101764913, i32 887688300, i32 -1062458953, i32 -914599715, i32 1065670069, i32 -1253635817, i32 -1843997223, i32 -1988494565, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 }, %struct.TYPE_12__ zeroinitializer, %struct.TYPE_11__ zeroinitializer, %struct.TYPE_10__ zeroinitializer } }, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local void @Blowfish_initstate(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(4168) %0, ptr noundef nonnull align 4 dereferenceable(4168) @Blowfish_initstate.initstate, i64 4168, i1 false), !tbaa.struct !5
ret void
}
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
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3288, i64 4, !6, i64 3292, i64 4, !6, i64 3296, i64 4, !6, i64 3300, i64 4, !6, i64 3304, i64 4, !6, i64 3308, i64 4, !6, i64 3312, i64 4, !6, i64 3316, i64 4, !6, i64 3320, i64 4, !6, i64 3324, i64 4, !6, i64 3328, i64 4, !6, i64 3332, i64 4, !6, i64 3336, i64 4, !6, i64 3340, i64 4, !6, i64 3344, i64 4, !6, i64 3348, i64 4, !6, i64 3352, i64 4, !6, i64 3356, i64 4, !6, i64 3360, i64 4, !6, i64 3364, i64 4, !6, i64 3368, i64 4, !6, i64 3372, i64 4, !6, i64 3376, i64 4, !6, i64 3380, i64 4, !6, i64 3384, i64 4, !6, i64 3388, i64 4, !6, i64 3392, i64 4, !6, i64 3396, i64 4, !6, i64 3400, i64 4, !6, i64 3404, i64 4, !6, i64 3408, i64 4, !6, i64 3412, i64 4, !6, i64 3416, i64 4, !6, i64 3420, i64 4, !6, i64 3424, i64 4, !6, i64 3428, i64 4, !6, i64 3432, i64 4, !6, i64 3436, i64 4, !6, i64 3440, i64 4, !6, i64 3444, i64 4, !6, i64 3448, i64 4, !6, i64 3452, i64 4, !6, i64 3456, i64 4, !6, i64 3460, i64 4, !6, i64 3464, i64 4, !6, i64 3468, i64 4, !6, i64 3472, i64 4, !6, i64 3476, i64 4, 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i64 4, !6, i64 3672, i64 4, !6, i64 3676, i64 4, !6, i64 3680, i64 4, !6, i64 3684, i64 4, !6, i64 3688, i64 4, !6, i64 3692, i64 4, !6, i64 3696, i64 4, !6, i64 3700, i64 4, !6, i64 3704, i64 4, !6, i64 3708, i64 4, !6, i64 3712, i64 4, !6, i64 3716, i64 4, !6, i64 3720, i64 4, !6, i64 3724, i64 4, !6, i64 3728, i64 4, !6, i64 3732, i64 4, !6, i64 3736, i64 4, !6, i64 3740, i64 4, !6, i64 3744, i64 4, !6, i64 3748, i64 4, !6, i64 3752, i64 4, !6, i64 3756, i64 4, !6, i64 3760, i64 4, !6, i64 3764, i64 4, !6, i64 3768, i64 4, !6, i64 3772, i64 4, !6, i64 3776, i64 4, !6, i64 3780, i64 4, !6, i64 3784, i64 4, !6, i64 3788, i64 4, !6, i64 3792, i64 4, !6, i64 3796, i64 4, !6, i64 3800, i64 4, !6, i64 3804, i64 4, !6, i64 3808, i64 4, !6, i64 3812, i64 4, !6, i64 3816, i64 4, !6, i64 3820, i64 4, !6, i64 3824, i64 4, !6, i64 3828, i64 4, !6, i64 3832, i64 4, !6, i64 3836, i64 4, !6, i64 3840, i64 4, !6, i64 3844, i64 4, !6, i64 3848, i64 4, !6, i64 3852, i64 4, !6, i64 3856, i64 4, !6, i64 3860, i64 4, !6, i64 3864, i64 4, !6, i64 3868, i64 4, !6, i64 3872, i64 4, !6, i64 3876, i64 4, !6, i64 3880, i64 4, !6, i64 3884, i64 4, !6, i64 3888, i64 4, !6, i64 3892, i64 4, !6, i64 3896, i64 4, !6, i64 3900, i64 4, !6, i64 3904, i64 4, !6, i64 3908, i64 4, !6, i64 3912, i64 4, !6, i64 3916, i64 4, !6, i64 3920, i64 4, !6, i64 3924, i64 4, !6, i64 3928, i64 4, !6, i64 3932, i64 4, !6, i64 3936, i64 4, !6, i64 3940, i64 4, !6, i64 3944, i64 4, !6, i64 3948, i64 4, !6, i64 3952, i64 4, !6, i64 3956, i64 4, !6, i64 3960, i64 4, !6, i64 3964, i64 4, !6, i64 3968, i64 4, !6, i64 3972, i64 4, !6, i64 3976, i64 4, !6, i64 3980, i64 4, !6, i64 3984, i64 4, !6, i64 3988, i64 4, !6, i64 3992, i64 4, !6, i64 3996, i64 4, !6, i64 4000, i64 4, !6, i64 4004, i64 4, !6, i64 4008, i64 4, !6, i64 4012, i64 4, !6, i64 4016, i64 4, !6, i64 4020, i64 4, !6, i64 4024, i64 4, !6, i64 4028, i64 4, !6, i64 4032, i64 4, !6, i64 4036, i64 4, !6, i64 4040, i64 4, !6, i64 4044, i64 4, !6, i64 4048, i64 4, !6, i64 4052, i64 4, !6, i64 4056, i64 4, !6, i64 4060, i64 4, !6, i64 4064, i64 4, !6, i64 4068, i64 4, !6, i64 4072, i64 4, !6, i64 4076, i64 4, !6, i64 4080, i64 4, !6, i64 4084, i64 4, !6, i64 4088, i64 4, !6, i64 4092, i64 4, !6, i64 4096, i64 4, !6, i64 4100, i64 4, !6, i64 4104, i64 4, !6, i64 4108, i64 4, !6, i64 4112, i64 4, !6, i64 4116, i64 4, !6, i64 4120, i64 4, !6, i64 4124, i64 4, !6, i64 4128, i64 4, !6, i64 4132, i64 4, !6, i64 4136, i64 4, !6, i64 4140, i64 4, !6, i64 4144, i64 4, !6, i64 4148, i64 4, !6, i64 4152, i64 4, !6, i64 4156, i64 4, !6, i64 4160, i64 4, !6, i64 4164, i64 4, !6}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/crypto/openssh/openbsd-compat/extr_blowfish.c_Blowfish_initstate.c'
source_filename = "AnghaBench/freebsd/crypto/openssh/openbsd-compat/extr_blowfish.c_Blowfish_initstate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_15__ = type { %struct.TYPE_14__, %struct.TYPE_9__ }
%struct.TYPE_14__ = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.TYPE_9__ = type { %struct.TYPE_13__, %struct.TYPE_12__, %struct.TYPE_11__, %struct.TYPE_10__ }
%struct.TYPE_13__ = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.TYPE_12__ = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.TYPE_11__ = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.TYPE_10__ = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
@Blowfish_initstate.initstate = internal unnamed_addr constant %struct.TYPE_15__ { %struct.TYPE_14__ { i32 -785314906, i32 1266315497, i32 -381855128, i32 976866871, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 }, %struct.TYPE_9__ { %struct.TYPE_13__ { i32 608135816, i32 -2052912941, i32 320440878, i32 57701188, i32 -1542899678, i32 698298832, i32 137296536, i32 -330404727, i32 1160258022, i32 953160567, i32 -1101764913, i32 887688300, i32 -1062458953, i32 -914599715, i32 1065670069, i32 -1253635817, i32 -1843997223, i32 -1988494565, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 }, %struct.TYPE_12__ zeroinitializer, %struct.TYPE_11__ zeroinitializer, %struct.TYPE_10__ zeroinitializer } }, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync)
define void @Blowfish_initstate(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(4168) %0, ptr noundef nonnull align 4 dereferenceable(4168) @Blowfish_initstate.initstate, i64 4168, i1 false), !tbaa.struct !6
ret void
}
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{i64 0, i64 4, !7, i64 4, i64 4, !7, i64 8, i64 4, !7, i64 12, i64 4, !7, i64 16, i64 4, !7, i64 20, i64 4, !7, i64 24, i64 4, !7, i64 28, i64 4, !7, i64 32, i64 4, !7, i64 36, i64 4, !7, i64 40, i64 4, !7, i64 44, i64 4, !7, i64 48, i64 4, !7, i64 52, i64 4, !7, i64 56, i64 4, !7, i64 60, i64 4, !7, i64 64, i64 4, !7, i64 68, i64 4, !7, i64 72, i64 4, !7, i64 76, i64 4, !7, i64 80, i64 4, !7, i64 84, i64 4, !7, i64 88, i64 4, !7, i64 92, i64 4, !7, i64 96, i64 4, !7, i64 100, i64 4, !7, i64 104, i64 4, !7, i64 108, i64 4, !7, i64 112, i64 4, !7, i64 116, i64 4, !7, i64 120, i64 4, !7, i64 124, i64 4, !7, i64 128, i64 4, !7, i64 132, i64 4, !7, i64 136, i64 4, !7, i64 140, i64 4, !7, i64 144, i64 4, !7, i64 148, i64 4, !7, i64 152, i64 4, !7, i64 156, i64 4, !7, i64 160, i64 4, !7, i64 164, i64 4, !7, i64 168, i64 4, !7, i64 172, i64 4, !7, i64 176, i64 4, !7, i64 180, i64 4, !7, i64 184, i64 4, !7, i64 188, i64 4, !7, i64 192, i64 4, !7, i64 196, i64 4, !7, i64 200, i64 4, !7, i64 204, i64 4, !7, i64 208, i64 4, !7, i64 212, i64 4, !7, i64 216, i64 4, !7, i64 220, i64 4, !7, i64 224, i64 4, !7, i64 228, i64 4, !7, i64 232, i64 4, !7, i64 236, i64 4, !7, i64 240, i64 4, !7, i64 244, i64 4, !7, i64 248, i64 4, !7, i64 252, i64 4, !7, i64 256, i64 4, !7, i64 260, i64 4, !7, i64 264, i64 4, !7, i64 268, i64 4, !7, i64 272, i64 4, !7, i64 276, i64 4, !7, i64 280, i64 4, !7, i64 284, i64 4, !7, i64 288, i64 4, !7, i64 292, i64 4, !7, i64 296, i64 4, !7, i64 300, i64 4, !7, i64 304, i64 4, !7, i64 308, i64 4, !7, i64 312, i64 4, !7, i64 316, i64 4, !7, i64 320, i64 4, !7, i64 324, i64 4, !7, i64 328, i64 4, !7, i64 332, i64 4, !7, i64 336, i64 4, !7, i64 340, i64 4, !7, i64 344, i64 4, !7, i64 348, i64 4, !7, i64 352, i64 4, !7, i64 356, i64 4, !7, i64 360, i64 4, !7, i64 364, i64 4, !7, i64 368, i64 4, !7, i64 372, i64 4, !7, i64 376, i64 4, !7, i64 380, i64 4, !7, i64 384, i64 4, !7, i64 388, i64 4, !7, i64 392, i64 4, !7, i64 396, i64 4, !7, i64 400, i64 4, !7, i64 404, i64 4, !7, i64 408, i64 4, !7, i64 412, i64 4, !7, i64 416, i64 4, !7, i64 420, i64 4, !7, i64 424, i64 4, !7, i64 428, i64 4, !7, i64 432, i64 4, !7, i64 436, i64 4, !7, i64 440, i64 4, !7, i64 444, i64 4, !7, i64 448, i64 4, !7, i64 452, i64 4, !7, i64 456, i64 4, !7, i64 460, i64 4, !7, i64 464, i64 4, !7, i64 468, i64 4, !7, i64 472, i64 4, !7, i64 476, i64 4, !7, i64 480, i64 4, !7, i64 484, i64 4, !7, i64 488, i64 4, !7, i64 492, i64 4, !7, i64 496, i64 4, !7, i64 500, i64 4, !7, i64 504, i64 4, !7, i64 508, i64 4, !7, i64 512, i64 4, !7, i64 516, i64 4, !7, i64 520, i64 4, !7, i64 524, i64 4, !7, i64 528, i64 4, !7, i64 532, i64 4, !7, i64 536, i64 4, !7, i64 540, i64 4, !7, i64 544, i64 4, !7, i64 548, i64 4, !7, i64 552, i64 4, !7, i64 556, i64 4, !7, i64 560, i64 4, !7, i64 564, i64 4, !7, i64 568, i64 4, !7, i64 572, i64 4, !7, i64 576, i64 4, !7, i64 580, i64 4, !7, i64 584, i64 4, !7, i64 588, i64 4, !7, i64 592, i64 4, !7, i64 596, i64 4, !7, i64 600, i64 4, !7, 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3288, i64 4, !7, i64 3292, i64 4, !7, i64 3296, i64 4, !7, i64 3300, i64 4, !7, i64 3304, i64 4, !7, i64 3308, i64 4, !7, i64 3312, i64 4, !7, i64 3316, i64 4, !7, i64 3320, i64 4, !7, i64 3324, i64 4, !7, i64 3328, i64 4, !7, i64 3332, i64 4, !7, i64 3336, i64 4, !7, i64 3340, i64 4, !7, i64 3344, i64 4, !7, i64 3348, i64 4, !7, i64 3352, i64 4, !7, i64 3356, i64 4, !7, i64 3360, i64 4, !7, i64 3364, i64 4, !7, i64 3368, i64 4, !7, i64 3372, i64 4, !7, i64 3376, i64 4, !7, i64 3380, i64 4, !7, i64 3384, i64 4, !7, i64 3388, i64 4, !7, i64 3392, i64 4, !7, i64 3396, i64 4, !7, i64 3400, i64 4, !7, i64 3404, i64 4, !7, i64 3408, i64 4, !7, i64 3412, i64 4, !7, i64 3416, i64 4, !7, i64 3420, i64 4, !7, i64 3424, i64 4, !7, i64 3428, i64 4, !7, i64 3432, i64 4, !7, i64 3436, i64 4, !7, i64 3440, i64 4, !7, i64 3444, i64 4, !7, i64 3448, i64 4, !7, i64 3452, i64 4, !7, i64 3456, i64 4, !7, i64 3460, i64 4, !7, i64 3464, i64 4, !7, i64 3468, i64 4, !7, i64 3472, i64 4, !7, i64 3476, i64 4, !7, i64 3480, i64 4, !7, i64 3484, i64 4, !7, i64 3488, i64 4, !7, i64 3492, i64 4, !7, i64 3496, i64 4, !7, i64 3500, i64 4, !7, i64 3504, i64 4, !7, i64 3508, i64 4, !7, i64 3512, i64 4, !7, i64 3516, i64 4, !7, i64 3520, i64 4, !7, i64 3524, i64 4, !7, i64 3528, i64 4, !7, i64 3532, i64 4, !7, i64 3536, i64 4, !7, i64 3540, i64 4, !7, i64 3544, i64 4, !7, i64 3548, i64 4, !7, i64 3552, i64 4, !7, i64 3556, i64 4, !7, i64 3560, i64 4, !7, i64 3564, i64 4, !7, i64 3568, i64 4, !7, i64 3572, i64 4, !7, i64 3576, i64 4, !7, i64 3580, i64 4, !7, i64 3584, i64 4, !7, i64 3588, i64 4, !7, i64 3592, i64 4, !7, i64 3596, i64 4, !7, i64 3600, i64 4, !7, i64 3604, i64 4, !7, i64 3608, i64 4, !7, i64 3612, i64 4, !7, i64 3616, i64 4, !7, i64 3620, i64 4, !7, i64 3624, i64 4, !7, i64 3628, i64 4, !7, i64 3632, i64 4, !7, i64 3636, i64 4, !7, i64 3640, i64 4, !7, i64 3644, i64 4, !7, i64 3648, i64 4, !7, i64 3652, i64 4, !7, i64 3656, i64 4, !7, i64 3660, i64 4, !7, i64 3664, i64 4, !7, i64 3668, i64 4, !7, i64 3672, i64 4, !7, i64 3676, i64 4, !7, i64 3680, i64 4, !7, i64 3684, i64 4, !7, i64 3688, i64 4, !7, i64 3692, i64 4, !7, i64 3696, i64 4, !7, i64 3700, i64 4, !7, i64 3704, i64 4, !7, i64 3708, i64 4, !7, i64 3712, i64 4, !7, i64 3716, i64 4, !7, i64 3720, i64 4, !7, i64 3724, i64 4, !7, i64 3728, i64 4, !7, i64 3732, i64 4, !7, i64 3736, i64 4, !7, i64 3740, i64 4, !7, i64 3744, i64 4, !7, i64 3748, i64 4, !7, i64 3752, i64 4, !7, i64 3756, i64 4, !7, i64 3760, i64 4, !7, i64 3764, i64 4, !7, i64 3768, i64 4, !7, i64 3772, i64 4, !7, i64 3776, i64 4, !7, i64 3780, i64 4, !7, i64 3784, i64 4, !7, i64 3788, i64 4, !7, i64 3792, i64 4, !7, i64 3796, i64 4, !7, i64 3800, i64 4, !7, i64 3804, i64 4, !7, i64 3808, i64 4, !7, i64 3812, i64 4, !7, i64 3816, i64 4, !7, i64 3820, i64 4, !7, i64 3824, i64 4, !7, i64 3828, i64 4, !7, i64 3832, i64 4, !7, i64 3836, i64 4, !7, i64 3840, i64 4, !7, i64 3844, i64 4, !7, i64 3848, i64 4, !7, i64 3852, i64 4, !7, i64 3856, i64 4, !7, i64 3860, i64 4, !7, i64 3864, i64 4, !7, i64 3868, i64 4, !7, i64 3872, i64 4, !7, i64 3876, i64 4, !7, i64 3880, i64 4, !7, i64 3884, i64 4, !7, i64 3888, i64 4, !7, i64 3892, i64 4, !7, i64 3896, i64 4, !7, i64 3900, i64 4, !7, i64 3904, i64 4, !7, i64 3908, i64 4, !7, i64 3912, i64 4, !7, i64 3916, i64 4, !7, i64 3920, i64 4, !7, i64 3924, i64 4, !7, i64 3928, i64 4, !7, i64 3932, i64 4, !7, i64 3936, i64 4, !7, i64 3940, i64 4, !7, i64 3944, i64 4, !7, i64 3948, i64 4, !7, i64 3952, i64 4, !7, i64 3956, i64 4, !7, i64 3960, i64 4, !7, i64 3964, i64 4, !7, i64 3968, i64 4, !7, i64 3972, i64 4, !7, i64 3976, i64 4, !7, i64 3980, i64 4, !7, i64 3984, i64 4, !7, i64 3988, i64 4, !7, i64 3992, i64 4, !7, i64 3996, i64 4, !7, i64 4000, i64 4, !7, i64 4004, i64 4, !7, i64 4008, i64 4, !7, i64 4012, i64 4, !7, i64 4016, i64 4, !7, i64 4020, i64 4, !7, i64 4024, i64 4, !7, i64 4028, i64 4, !7, i64 4032, i64 4, !7, i64 4036, i64 4, !7, i64 4040, i64 4, !7, i64 4044, i64 4, !7, i64 4048, i64 4, !7, i64 4052, i64 4, !7, i64 4056, i64 4, !7, i64 4060, i64 4, !7, i64 4064, i64 4, !7, i64 4068, i64 4, !7, i64 4072, i64 4, !7, i64 4076, i64 4, !7, i64 4080, i64 4, !7, i64 4084, i64 4, !7, i64 4088, i64 4, !7, i64 4092, i64 4, !7, i64 4096, i64 4, !7, i64 4100, i64 4, !7, i64 4104, i64 4, !7, i64 4108, i64 4, !7, i64 4112, i64 4, !7, i64 4116, i64 4, !7, i64 4120, i64 4, !7, i64 4124, i64 4, !7, i64 4128, i64 4, !7, i64 4132, i64 4, !7, i64 4136, i64 4, !7, i64 4140, i64 4, !7, i64 4144, i64 4, !7, i64 4148, i64 4, !7, i64 4152, i64 4, !7, i64 4156, i64 4, !7, i64 4160, i64 4, !7, i64 4164, i64 4, !7}
!7 = !{!8, !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_crypto_openssh_openbsd-compat_extr_blowfish.c_Blowfish_initstate |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/extr_drm_dp_cec.c_drm_dp_cec_register_connector.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/extr_drm_dp_cec.c_drm_dp_cec_register_connector.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.drm_dp_aux = type { %struct.TYPE_2__, i32 }
%struct.TYPE_2__ = type { i32, ptr, i32, ptr }
@drm_dp_cec_unregister_work = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @drm_dp_cec_register_connector(ptr noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr %0, align 8, !tbaa !5
%5 = tail call i64 @WARN_ON(i32 noundef %4) #2
%6 = getelementptr inbounds %struct.drm_dp_aux, ptr %0, i64 0, i32 1
%7 = load i32, ptr %6, align 8, !tbaa !12
%8 = icmp eq i32 %7, 0
%9 = zext i1 %8 to i32
%10 = tail call i64 @WARN_ON(i32 noundef %9) #2
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %18
12: ; preds = %3
%13 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 1
store ptr %1, ptr %13, align 8, !tbaa !13
%14 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 3
store ptr %2, ptr %14, align 8, !tbaa !14
%15 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 2
%16 = load i32, ptr @drm_dp_cec_unregister_work, align 4, !tbaa !15
%17 = tail call i32 @INIT_DELAYED_WORK(ptr noundef nonnull %15, i32 noundef %16) #2
br label %18
18: ; preds = %3, %12
ret void
}
declare i64 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @INIT_DELAYED_WORK(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"drm_dp_aux", !7, i64 0, !8, i64 32}
!7 = !{!"TYPE_2__", !8, i64 0, !11, i64 8, !8, i64 16, !11, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!6, !8, i64 32}
!13 = !{!6, !11, i64 8}
!14 = !{!6, !11, i64 24}
!15 = !{!8, !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/extr_drm_dp_cec.c_drm_dp_cec_register_connector.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/extr_drm_dp_cec.c_drm_dp_cec_register_connector.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@drm_dp_cec_unregister_work = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @drm_dp_cec_register_connector(ptr noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr %0, align 8, !tbaa !6
%5 = tail call i64 @WARN_ON(i32 noundef %4) #2
%6 = getelementptr inbounds i8, ptr %0, i64 32
%7 = load i32, ptr %6, align 8, !tbaa !13
%8 = icmp eq i32 %7, 0
%9 = zext i1 %8 to i32
%10 = tail call i64 @WARN_ON(i32 noundef %9) #2
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %18
12: ; preds = %3
%13 = getelementptr inbounds i8, ptr %0, i64 8
store ptr %1, ptr %13, align 8, !tbaa !14
%14 = getelementptr inbounds i8, ptr %0, i64 24
store ptr %2, ptr %14, align 8, !tbaa !15
%15 = getelementptr inbounds i8, ptr %0, i64 16
%16 = load i32, ptr @drm_dp_cec_unregister_work, align 4, !tbaa !16
%17 = tail call i32 @INIT_DELAYED_WORK(ptr noundef nonnull %15, i32 noundef %16) #2
br label %18
18: ; preds = %3, %12
ret void
}
declare i64 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @INIT_DELAYED_WORK(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"drm_dp_aux", !8, i64 0, !9, i64 32}
!8 = !{!"TYPE_2__", !9, i64 0, !12, i64 8, !9, i64 16, !12, i64 24}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!7, !9, i64 32}
!14 = !{!7, !12, i64 8}
!15 = !{!7, !12, i64 24}
!16 = !{!9, !9, i64 0}
| linux_drivers_gpu_drm_extr_drm_dp_cec.c_drm_dp_cec_register_connector |
; ModuleID = 'AnghaBench/linux/drivers/misc/cardreader/extr_rtsx_pcr.c_rtsx_pci_disable_aspm.c'
source_filename = "AnghaBench/linux/drivers/misc/cardreader/extr_rtsx_pcr.c_rtsx_pci_disable_aspm.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PCI_EXP_LNKCTL = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @rtsx_pci_disable_aspm], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @rtsx_pci_disable_aspm(ptr noundef %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = load i64, ptr @PCI_EXP_LNKCTL, align 8, !tbaa !10
%4 = add nsw i64 %3, %2
%5 = tail call i32 @rtsx_pci_update_cfg_byte(ptr noundef nonnull %0, i64 noundef %4, i32 noundef 252, i32 noundef 0) #2
ret void
}
declare i32 @rtsx_pci_update_cfg_byte(ptr noundef, i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"rtsx_pcr", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/misc/cardreader/extr_rtsx_pcr.c_rtsx_pci_disable_aspm.c'
source_filename = "AnghaBench/linux/drivers/misc/cardreader/extr_rtsx_pcr.c_rtsx_pci_disable_aspm.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PCI_EXP_LNKCTL = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @rtsx_pci_disable_aspm], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @rtsx_pci_disable_aspm(ptr noundef %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = load i64, ptr @PCI_EXP_LNKCTL, align 8, !tbaa !11
%4 = add nsw i64 %3, %2
%5 = tail call i32 @rtsx_pci_update_cfg_byte(ptr noundef nonnull %0, i64 noundef %4, i32 noundef 252, i32 noundef 0) #2
ret void
}
declare i32 @rtsx_pci_update_cfg_byte(ptr noundef, i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"rtsx_pcr", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| linux_drivers_misc_cardreader_extr_rtsx_pcr.c_rtsx_pci_disable_aspm |
; ModuleID = 'AnghaBench/zfs/module/zfs/extr_vdev_raidz_math_impl.h_raidz_rec_pqr_abd.c'
source_filename = "AnghaBench/zfs/module/zfs/extr_vdev_raidz_math_impl.h_raidz_rec_pqr_abd.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@TARGET_X = dso_local local_unnamed_addr global i64 0, align 8
@TARGET_Y = dso_local local_unnamed_addr global i64 0, align 8
@TARGET_Z = dso_local local_unnamed_addr global i64 0, align 8
@CODE_P = dso_local local_unnamed_addr global i64 0, align 8
@CODE_Q = dso_local local_unnamed_addr global i64 0, align 8
@CODE_R = dso_local local_unnamed_addr global i64 0, align 8
@REC_PQR_X = dso_local local_unnamed_addr global i32 0, align 4
@REC_PQR_Y = dso_local local_unnamed_addr global i32 0, align 4
@REC_PQR_Z = dso_local local_unnamed_addr global i32 0, align 4
@REC_PQR_XS = dso_local local_unnamed_addr global i32 0, align 4
@REC_PQR_YS = dso_local local_unnamed_addr global i32 0, align 4
@MUL_PQR_XP = dso_local local_unnamed_addr global i64 0, align 8
@MUL_PQR_XQ = dso_local local_unnamed_addr global i64 0, align 8
@MUL_PQR_XR = dso_local local_unnamed_addr global i64 0, align 8
@MUL_PQR_YU = dso_local local_unnamed_addr global i64 0, align 8
@MUL_PQR_YP = dso_local local_unnamed_addr global i64 0, align 8
@MUL_PQR_YQ = dso_local local_unnamed_addr global i64 0, align 8
@REC_PQR_STRIDE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @raidz_rec_pqr_abd], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @raidz_rec_pqr_abd(ptr nocapture noundef readonly %0, i64 noundef %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3) #0 {
%5 = load i64, ptr @TARGET_X, align 8, !tbaa !5
%6 = getelementptr inbounds ptr, ptr %0, i64 %5
%7 = load ptr, ptr %6, align 8, !tbaa !9
%8 = load i64, ptr @TARGET_Y, align 8, !tbaa !5
%9 = getelementptr inbounds ptr, ptr %0, i64 %8
%10 = load ptr, ptr %9, align 8, !tbaa !9
%11 = load i64, ptr @TARGET_Z, align 8, !tbaa !5
%12 = getelementptr inbounds ptr, ptr %0, i64 %11
%13 = load ptr, ptr %12, align 8, !tbaa !9
%14 = lshr i64 %1, 2
%15 = getelementptr inbounds i32, ptr %7, i64 %14
%16 = load i64, ptr @CODE_P, align 8, !tbaa !5
%17 = getelementptr inbounds ptr, ptr %2, i64 %16
%18 = load ptr, ptr %17, align 8, !tbaa !9
%19 = load i64, ptr @CODE_Q, align 8, !tbaa !5
%20 = getelementptr inbounds ptr, ptr %2, i64 %19
%21 = load ptr, ptr %20, align 8, !tbaa !9
%22 = load i64, ptr @CODE_R, align 8, !tbaa !5
%23 = getelementptr inbounds ptr, ptr %2, i64 %22
%24 = load ptr, ptr %23, align 8, !tbaa !9
%25 = tail call i32 (...) @REC_PQR_DEFINE() #2
%26 = and i64 %1, -4
%27 = icmp sgt i64 %26, 0
br i1 %27, label %28, label %119
28: ; preds = %4, %28
%29 = phi ptr [ %117, %28 ], [ %24, %4 ]
%30 = phi ptr [ %116, %28 ], [ %21, %4 ]
%31 = phi ptr [ %115, %28 ], [ %18, %4 ]
%32 = phi ptr [ %112, %28 ], [ %7, %4 ]
%33 = phi ptr [ %114, %28 ], [ %13, %4 ]
%34 = phi ptr [ %113, %28 ], [ %10, %4 ]
%35 = load i32, ptr @REC_PQR_X, align 4, !tbaa !11
%36 = tail call i32 @LOAD(ptr noundef %32, i32 noundef %35) #2
%37 = load i32, ptr @REC_PQR_Y, align 4, !tbaa !11
%38 = tail call i32 @LOAD(ptr noundef %34, i32 noundef %37) #2
%39 = load i32, ptr @REC_PQR_Z, align 4, !tbaa !11
%40 = tail call i32 @LOAD(ptr noundef %33, i32 noundef %39) #2
%41 = load i32, ptr @REC_PQR_X, align 4, !tbaa !11
%42 = tail call i32 @XOR_ACC(ptr noundef %31, i32 noundef %41) #2
%43 = load i32, ptr @REC_PQR_Y, align 4, !tbaa !11
%44 = tail call i32 @XOR_ACC(ptr noundef %30, i32 noundef %43) #2
%45 = load i32, ptr @REC_PQR_Z, align 4, !tbaa !11
%46 = tail call i32 @XOR_ACC(ptr noundef %29, i32 noundef %45) #2
%47 = load i32, ptr @REC_PQR_X, align 4, !tbaa !11
%48 = load i32, ptr @REC_PQR_XS, align 4, !tbaa !11
%49 = tail call i32 @COPY(i32 noundef %47, i32 noundef %48) #2
%50 = load i32, ptr @REC_PQR_Y, align 4, !tbaa !11
%51 = load i32, ptr @REC_PQR_YS, align 4, !tbaa !11
%52 = tail call i32 @COPY(i32 noundef %50, i32 noundef %51) #2
%53 = load i64, ptr @MUL_PQR_XP, align 8, !tbaa !5
%54 = getelementptr inbounds i32, ptr %3, i64 %53
%55 = load i32, ptr %54, align 4, !tbaa !11
%56 = load i32, ptr @REC_PQR_X, align 4, !tbaa !11
%57 = tail call i32 @MUL(i32 noundef %55, i32 noundef %56) #2
%58 = load i64, ptr @MUL_PQR_XQ, align 8, !tbaa !5
%59 = getelementptr inbounds i32, ptr %3, i64 %58
%60 = load i32, ptr %59, align 4, !tbaa !11
%61 = load i32, ptr @REC_PQR_Y, align 4, !tbaa !11
%62 = tail call i32 @MUL(i32 noundef %60, i32 noundef %61) #2
%63 = load i32, ptr @REC_PQR_Y, align 4, !tbaa !11
%64 = load i32, ptr @REC_PQR_X, align 4, !tbaa !11
%65 = tail call i32 @XOR(i32 noundef %63, i32 noundef %64) #2
%66 = load i64, ptr @MUL_PQR_XR, align 8, !tbaa !5
%67 = getelementptr inbounds i32, ptr %3, i64 %66
%68 = load i32, ptr %67, align 4, !tbaa !11
%69 = load i32, ptr @REC_PQR_Z, align 4, !tbaa !11
%70 = tail call i32 @MUL(i32 noundef %68, i32 noundef %69) #2
%71 = load i32, ptr @REC_PQR_Z, align 4, !tbaa !11
%72 = load i32, ptr @REC_PQR_X, align 4, !tbaa !11
%73 = tail call i32 @XOR(i32 noundef %71, i32 noundef %72) #2
%74 = load i32, ptr @REC_PQR_X, align 4, !tbaa !11
%75 = tail call i32 @STORE(ptr noundef %32, i32 noundef %74) #2
%76 = load i32, ptr @REC_PQR_X, align 4, !tbaa !11
%77 = load i32, ptr @REC_PQR_XS, align 4, !tbaa !11
%78 = tail call i32 @XOR(i32 noundef %76, i32 noundef %77) #2
%79 = load i64, ptr @MUL_PQR_YU, align 8, !tbaa !5
%80 = getelementptr inbounds i32, ptr %3, i64 %79
%81 = load i32, ptr %80, align 4, !tbaa !11
%82 = load i32, ptr @REC_PQR_X, align 4, !tbaa !11
%83 = tail call i32 @MUL(i32 noundef %81, i32 noundef %82) #2
%84 = load i32, ptr @REC_PQR_X, align 4, !tbaa !11
%85 = load i32, ptr @REC_PQR_YS, align 4, !tbaa !11
%86 = tail call i32 @XOR(i32 noundef %84, i32 noundef %85) #2
%87 = load i32, ptr @REC_PQR_XS, align 4, !tbaa !11
%88 = load i32, ptr @REC_PQR_X, align 4, !tbaa !11
%89 = tail call i32 @COPY(i32 noundef %87, i32 noundef %88) #2
%90 = load i64, ptr @MUL_PQR_YP, align 8, !tbaa !5
%91 = getelementptr inbounds i32, ptr %3, i64 %90
%92 = load i32, ptr %91, align 4, !tbaa !11
%93 = load i32, ptr @REC_PQR_X, align 4, !tbaa !11
%94 = tail call i32 @MUL(i32 noundef %92, i32 noundef %93) #2
%95 = load i64, ptr @MUL_PQR_YQ, align 8, !tbaa !5
%96 = getelementptr inbounds i32, ptr %3, i64 %95
%97 = load i32, ptr %96, align 4, !tbaa !11
%98 = load i32, ptr @REC_PQR_YS, align 4, !tbaa !11
%99 = tail call i32 @MUL(i32 noundef %97, i32 noundef %98) #2
%100 = load i32, ptr @REC_PQR_X, align 4, !tbaa !11
%101 = load i32, ptr @REC_PQR_YS, align 4, !tbaa !11
%102 = tail call i32 @XOR(i32 noundef %100, i32 noundef %101) #2
%103 = load i32, ptr @REC_PQR_YS, align 4, !tbaa !11
%104 = tail call i32 @STORE(ptr noundef %34, i32 noundef %103) #2
%105 = load i32, ptr @REC_PQR_XS, align 4, !tbaa !11
%106 = load i32, ptr @REC_PQR_YS, align 4, !tbaa !11
%107 = tail call i32 @XOR(i32 noundef %105, i32 noundef %106) #2
%108 = load i32, ptr @REC_PQR_YS, align 4, !tbaa !11
%109 = tail call i32 @STORE(ptr noundef %33, i32 noundef %108) #2
%110 = load i32, ptr @REC_PQR_STRIDE, align 4, !tbaa !11
%111 = sext i32 %110 to i64
%112 = getelementptr inbounds i32, ptr %32, i64 %111
%113 = getelementptr inbounds i32, ptr %34, i64 %111
%114 = getelementptr inbounds i32, ptr %33, i64 %111
%115 = getelementptr inbounds i32, ptr %31, i64 %111
%116 = getelementptr inbounds i32, ptr %30, i64 %111
%117 = getelementptr inbounds i32, ptr %29, i64 %111
%118 = icmp ult ptr %112, %15
br i1 %118, label %28, label %119, !llvm.loop !13
119: ; preds = %28, %4
ret void
}
declare i32 @REC_PQR_DEFINE(...) local_unnamed_addr #1
declare i32 @LOAD(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @XOR_ACC(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @COPY(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @MUL(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @XOR(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @STORE(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/zfs/module/zfs/extr_vdev_raidz_math_impl.h_raidz_rec_pqr_abd.c'
source_filename = "AnghaBench/zfs/module/zfs/extr_vdev_raidz_math_impl.h_raidz_rec_pqr_abd.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TARGET_X = common local_unnamed_addr global i64 0, align 8
@TARGET_Y = common local_unnamed_addr global i64 0, align 8
@TARGET_Z = common local_unnamed_addr global i64 0, align 8
@CODE_P = common local_unnamed_addr global i64 0, align 8
@CODE_Q = common local_unnamed_addr global i64 0, align 8
@CODE_R = common local_unnamed_addr global i64 0, align 8
@REC_PQR_X = common local_unnamed_addr global i32 0, align 4
@REC_PQR_Y = common local_unnamed_addr global i32 0, align 4
@REC_PQR_Z = common local_unnamed_addr global i32 0, align 4
@REC_PQR_XS = common local_unnamed_addr global i32 0, align 4
@REC_PQR_YS = common local_unnamed_addr global i32 0, align 4
@MUL_PQR_XP = common local_unnamed_addr global i64 0, align 8
@MUL_PQR_XQ = common local_unnamed_addr global i64 0, align 8
@MUL_PQR_XR = common local_unnamed_addr global i64 0, align 8
@MUL_PQR_YU = common local_unnamed_addr global i64 0, align 8
@MUL_PQR_YP = common local_unnamed_addr global i64 0, align 8
@MUL_PQR_YQ = common local_unnamed_addr global i64 0, align 8
@REC_PQR_STRIDE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @raidz_rec_pqr_abd], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @raidz_rec_pqr_abd(ptr nocapture noundef readonly %0, i64 noundef %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3) #0 {
%5 = load i64, ptr @TARGET_X, align 8, !tbaa !6
%6 = getelementptr inbounds ptr, ptr %0, i64 %5
%7 = load ptr, ptr %6, align 8, !tbaa !10
%8 = load i64, ptr @TARGET_Y, align 8, !tbaa !6
%9 = getelementptr inbounds ptr, ptr %0, i64 %8
%10 = load ptr, ptr %9, align 8, !tbaa !10
%11 = load i64, ptr @TARGET_Z, align 8, !tbaa !6
%12 = getelementptr inbounds ptr, ptr %0, i64 %11
%13 = load ptr, ptr %12, align 8, !tbaa !10
%14 = lshr i64 %1, 2
%15 = getelementptr inbounds i32, ptr %7, i64 %14
%16 = load i64, ptr @CODE_P, align 8, !tbaa !6
%17 = getelementptr inbounds ptr, ptr %2, i64 %16
%18 = load ptr, ptr %17, align 8, !tbaa !10
%19 = load i64, ptr @CODE_Q, align 8, !tbaa !6
%20 = getelementptr inbounds ptr, ptr %2, i64 %19
%21 = load ptr, ptr %20, align 8, !tbaa !10
%22 = load i64, ptr @CODE_R, align 8, !tbaa !6
%23 = getelementptr inbounds ptr, ptr %2, i64 %22
%24 = load ptr, ptr %23, align 8, !tbaa !10
%25 = tail call i32 @REC_PQR_DEFINE() #2
%26 = and i64 %1, -4
%27 = icmp sgt i64 %26, 0
br i1 %27, label %28, label %119
28: ; preds = %4, %28
%29 = phi ptr [ %117, %28 ], [ %24, %4 ]
%30 = phi ptr [ %116, %28 ], [ %21, %4 ]
%31 = phi ptr [ %115, %28 ], [ %18, %4 ]
%32 = phi ptr [ %112, %28 ], [ %7, %4 ]
%33 = phi ptr [ %114, %28 ], [ %13, %4 ]
%34 = phi ptr [ %113, %28 ], [ %10, %4 ]
%35 = load i32, ptr @REC_PQR_X, align 4, !tbaa !12
%36 = tail call i32 @LOAD(ptr noundef %32, i32 noundef %35) #2
%37 = load i32, ptr @REC_PQR_Y, align 4, !tbaa !12
%38 = tail call i32 @LOAD(ptr noundef %34, i32 noundef %37) #2
%39 = load i32, ptr @REC_PQR_Z, align 4, !tbaa !12
%40 = tail call i32 @LOAD(ptr noundef %33, i32 noundef %39) #2
%41 = load i32, ptr @REC_PQR_X, align 4, !tbaa !12
%42 = tail call i32 @XOR_ACC(ptr noundef %31, i32 noundef %41) #2
%43 = load i32, ptr @REC_PQR_Y, align 4, !tbaa !12
%44 = tail call i32 @XOR_ACC(ptr noundef %30, i32 noundef %43) #2
%45 = load i32, ptr @REC_PQR_Z, align 4, !tbaa !12
%46 = tail call i32 @XOR_ACC(ptr noundef %29, i32 noundef %45) #2
%47 = load i32, ptr @REC_PQR_X, align 4, !tbaa !12
%48 = load i32, ptr @REC_PQR_XS, align 4, !tbaa !12
%49 = tail call i32 @COPY(i32 noundef %47, i32 noundef %48) #2
%50 = load i32, ptr @REC_PQR_Y, align 4, !tbaa !12
%51 = load i32, ptr @REC_PQR_YS, align 4, !tbaa !12
%52 = tail call i32 @COPY(i32 noundef %50, i32 noundef %51) #2
%53 = load i64, ptr @MUL_PQR_XP, align 8, !tbaa !6
%54 = getelementptr inbounds i32, ptr %3, i64 %53
%55 = load i32, ptr %54, align 4, !tbaa !12
%56 = load i32, ptr @REC_PQR_X, align 4, !tbaa !12
%57 = tail call i32 @MUL(i32 noundef %55, i32 noundef %56) #2
%58 = load i64, ptr @MUL_PQR_XQ, align 8, !tbaa !6
%59 = getelementptr inbounds i32, ptr %3, i64 %58
%60 = load i32, ptr %59, align 4, !tbaa !12
%61 = load i32, ptr @REC_PQR_Y, align 4, !tbaa !12
%62 = tail call i32 @MUL(i32 noundef %60, i32 noundef %61) #2
%63 = load i32, ptr @REC_PQR_Y, align 4, !tbaa !12
%64 = load i32, ptr @REC_PQR_X, align 4, !tbaa !12
%65 = tail call i32 @XOR(i32 noundef %63, i32 noundef %64) #2
%66 = load i64, ptr @MUL_PQR_XR, align 8, !tbaa !6
%67 = getelementptr inbounds i32, ptr %3, i64 %66
%68 = load i32, ptr %67, align 4, !tbaa !12
%69 = load i32, ptr @REC_PQR_Z, align 4, !tbaa !12
%70 = tail call i32 @MUL(i32 noundef %68, i32 noundef %69) #2
%71 = load i32, ptr @REC_PQR_Z, align 4, !tbaa !12
%72 = load i32, ptr @REC_PQR_X, align 4, !tbaa !12
%73 = tail call i32 @XOR(i32 noundef %71, i32 noundef %72) #2
%74 = load i32, ptr @REC_PQR_X, align 4, !tbaa !12
%75 = tail call i32 @STORE(ptr noundef %32, i32 noundef %74) #2
%76 = load i32, ptr @REC_PQR_X, align 4, !tbaa !12
%77 = load i32, ptr @REC_PQR_XS, align 4, !tbaa !12
%78 = tail call i32 @XOR(i32 noundef %76, i32 noundef %77) #2
%79 = load i64, ptr @MUL_PQR_YU, align 8, !tbaa !6
%80 = getelementptr inbounds i32, ptr %3, i64 %79
%81 = load i32, ptr %80, align 4, !tbaa !12
%82 = load i32, ptr @REC_PQR_X, align 4, !tbaa !12
%83 = tail call i32 @MUL(i32 noundef %81, i32 noundef %82) #2
%84 = load i32, ptr @REC_PQR_X, align 4, !tbaa !12
%85 = load i32, ptr @REC_PQR_YS, align 4, !tbaa !12
%86 = tail call i32 @XOR(i32 noundef %84, i32 noundef %85) #2
%87 = load i32, ptr @REC_PQR_XS, align 4, !tbaa !12
%88 = load i32, ptr @REC_PQR_X, align 4, !tbaa !12
%89 = tail call i32 @COPY(i32 noundef %87, i32 noundef %88) #2
%90 = load i64, ptr @MUL_PQR_YP, align 8, !tbaa !6
%91 = getelementptr inbounds i32, ptr %3, i64 %90
%92 = load i32, ptr %91, align 4, !tbaa !12
%93 = load i32, ptr @REC_PQR_X, align 4, !tbaa !12
%94 = tail call i32 @MUL(i32 noundef %92, i32 noundef %93) #2
%95 = load i64, ptr @MUL_PQR_YQ, align 8, !tbaa !6
%96 = getelementptr inbounds i32, ptr %3, i64 %95
%97 = load i32, ptr %96, align 4, !tbaa !12
%98 = load i32, ptr @REC_PQR_YS, align 4, !tbaa !12
%99 = tail call i32 @MUL(i32 noundef %97, i32 noundef %98) #2
%100 = load i32, ptr @REC_PQR_X, align 4, !tbaa !12
%101 = load i32, ptr @REC_PQR_YS, align 4, !tbaa !12
%102 = tail call i32 @XOR(i32 noundef %100, i32 noundef %101) #2
%103 = load i32, ptr @REC_PQR_YS, align 4, !tbaa !12
%104 = tail call i32 @STORE(ptr noundef %34, i32 noundef %103) #2
%105 = load i32, ptr @REC_PQR_XS, align 4, !tbaa !12
%106 = load i32, ptr @REC_PQR_YS, align 4, !tbaa !12
%107 = tail call i32 @XOR(i32 noundef %105, i32 noundef %106) #2
%108 = load i32, ptr @REC_PQR_YS, align 4, !tbaa !12
%109 = tail call i32 @STORE(ptr noundef %33, i32 noundef %108) #2
%110 = load i32, ptr @REC_PQR_STRIDE, align 4, !tbaa !12
%111 = sext i32 %110 to i64
%112 = getelementptr inbounds i32, ptr %32, i64 %111
%113 = getelementptr inbounds i32, ptr %34, i64 %111
%114 = getelementptr inbounds i32, ptr %33, i64 %111
%115 = getelementptr inbounds i32, ptr %31, i64 %111
%116 = getelementptr inbounds i32, ptr %30, i64 %111
%117 = getelementptr inbounds i32, ptr %29, i64 %111
%118 = icmp ult ptr %112, %15
br i1 %118, label %28, label %119, !llvm.loop !14
119: ; preds = %28, %4
ret void
}
declare i32 @REC_PQR_DEFINE(...) local_unnamed_addr #1
declare i32 @LOAD(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @XOR_ACC(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @COPY(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @MUL(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @XOR(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @STORE(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
| zfs_module_zfs_extr_vdev_raidz_math_impl.h_raidz_rec_pqr_abd |
; ModuleID = 'AnghaBench/freebsd/lib/libc/stdlib/extr_random.c_random.c'
source_filename = "AnghaBench/freebsd/lib/libc/stdlib/extr_random.c_random.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@rand_type = dso_local local_unnamed_addr global i64 0, align 8
@TYPE_0 = dso_local local_unnamed_addr global i64 0, align 8
@state = dso_local local_unnamed_addr global ptr null, align 8
@fptr = dso_local local_unnamed_addr global ptr null, align 8
@rptr = dso_local local_unnamed_addr global ptr null, align 8
@end_ptr = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local i64 @random() local_unnamed_addr #0 {
%1 = load i64, ptr @rand_type, align 8, !tbaa !5
%2 = load i64, ptr @TYPE_0, align 8, !tbaa !5
%3 = icmp eq i64 %1, %2
br i1 %3, label %4, label %9
4: ; preds = %0
%5 = load ptr, ptr @state, align 8, !tbaa !9
%6 = load i32, ptr %5, align 4, !tbaa !11
%7 = tail call i32 @good_rand(i32 noundef %6) #2
%8 = load ptr, ptr @state, align 8, !tbaa !9
store i32 %7, ptr %8, align 4, !tbaa !11
br label %25
9: ; preds = %0
%10 = load ptr, ptr @fptr, align 8, !tbaa !9
%11 = load ptr, ptr @rptr, align 8, !tbaa !9
%12 = load i32, ptr %11, align 4, !tbaa !11
%13 = load i32, ptr %10, align 4, !tbaa !11
%14 = add nsw i32 %13, %12
store i32 %14, ptr %10, align 4, !tbaa !11
%15 = ashr i32 %14, 1
%16 = getelementptr inbounds i32, ptr %10, i64 1
%17 = load ptr, ptr @end_ptr, align 8, !tbaa !9
%18 = icmp ult ptr %16, %17
%19 = load ptr, ptr @state, align 8
%20 = getelementptr inbounds i32, ptr %11, i64 1
%21 = icmp ult ptr %20, %17
%22 = select i1 %21, ptr %20, ptr %19
%23 = select i1 %18, ptr %16, ptr %19
%24 = select i1 %18, ptr %22, ptr %20
store ptr %23, ptr @fptr, align 8, !tbaa !9
store ptr %24, ptr @rptr, align 8, !tbaa !9
br label %25
25: ; preds = %9, %4
%26 = phi i32 [ %7, %4 ], [ %15, %9 ]
%27 = sext i32 %26 to i64
ret i64 %27
}
declare i32 @good_rand(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/lib/libc/stdlib/extr_random.c_random.c'
source_filename = "AnghaBench/freebsd/lib/libc/stdlib/extr_random.c_random.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@rand_type = common local_unnamed_addr global i64 0, align 8
@TYPE_0 = common local_unnamed_addr global i64 0, align 8
@state = common local_unnamed_addr global ptr null, align 8
@fptr = common local_unnamed_addr global ptr null, align 8
@rptr = common local_unnamed_addr global ptr null, align 8
@end_ptr = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define range(i64 -2147483648, 2147483648) i64 @random() local_unnamed_addr #0 {
%1 = load i64, ptr @rand_type, align 8, !tbaa !6
%2 = load i64, ptr @TYPE_0, align 8, !tbaa !6
%3 = icmp eq i64 %1, %2
br i1 %3, label %4, label %9
4: ; preds = %0
%5 = load ptr, ptr @state, align 8, !tbaa !10
%6 = load i32, ptr %5, align 4, !tbaa !12
%7 = tail call i32 @good_rand(i32 noundef %6) #2
%8 = load ptr, ptr @state, align 8, !tbaa !10
store i32 %7, ptr %8, align 4, !tbaa !12
br label %25
9: ; preds = %0
%10 = load ptr, ptr @fptr, align 8, !tbaa !10
%11 = load ptr, ptr @rptr, align 8, !tbaa !10
%12 = load i32, ptr %11, align 4, !tbaa !12
%13 = load i32, ptr %10, align 4, !tbaa !12
%14 = add nsw i32 %13, %12
store i32 %14, ptr %10, align 4, !tbaa !12
%15 = ashr i32 %14, 1
%16 = getelementptr inbounds i8, ptr %10, i64 4
%17 = load ptr, ptr @end_ptr, align 8, !tbaa !10
%18 = icmp ult ptr %16, %17
%19 = load ptr, ptr @state, align 8
%20 = getelementptr inbounds i8, ptr %11, i64 4
%21 = icmp ult ptr %20, %17
%22 = select i1 %21, ptr %20, ptr %19
%23 = select i1 %18, ptr %16, ptr %19
%24 = select i1 %18, ptr %22, ptr %20
store ptr %23, ptr @fptr, align 8, !tbaa !10
store ptr %24, ptr @rptr, align 8, !tbaa !10
br label %25
25: ; preds = %9, %4
%26 = phi i32 [ %7, %4 ], [ %15, %9 ]
%27 = sext i32 %26 to i64
ret i64 %27
}
declare i32 @good_rand(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
| freebsd_lib_libc_stdlib_extr_random.c_random |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_eexpress.c_scb_wrrfa.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_eexpress.c_scb_wrrfa.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @scb_wrrfa], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @scb_wrrfa(ptr nocapture noundef readonly %0, i16 noundef zeroext %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = add nsw i64 %3, 49166
%5 = tail call i32 @outw(i16 noundef zeroext %1, i64 noundef %4) #2
ret void
}
declare i32 @outw(i16 noundef zeroext, i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"net_device", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_eexpress.c_scb_wrrfa.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_eexpress.c_scb_wrrfa.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @scb_wrrfa], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @scb_wrrfa(ptr nocapture noundef readonly %0, i16 noundef zeroext %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = add nsw i64 %3, 49166
%5 = tail call i32 @outw(i16 noundef zeroext %1, i64 noundef %4) #2
ret void
}
declare i32 @outw(i16 noundef zeroext, i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"net_device", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_net_extr_eexpress.c_scb_wrrfa |
; ModuleID = 'AnghaBench/freebsd/sys/dev/sis/extr_if_sis.c_sis_find_bridge.c'
source_filename = "AnghaBench/freebsd/sys/dev/sis/extr_if_sis.c_sis_find_bridge.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [4 x i8] c"pci\00", align 1
@SIS_VENDORID = dso_local local_unnamed_addr global i64 0, align 8
@M_TEMP = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sis_find_bridge], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @sis_find_bridge(ptr nocapture readnone %0) #0 {
%2 = alloca ptr, align 8
%3 = alloca i32, align 4
%4 = alloca ptr, align 8
%5 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
store i32 0, ptr %3, align 4, !tbaa !5
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
store i32 0, ptr %5, align 4, !tbaa !5
%6 = tail call ptr @devclass_find(ptr noundef nonnull @.str) #3
%7 = icmp eq ptr %6, null
br i1 %7, label %61, label %8
8: ; preds = %1
%9 = call i32 @devclass_get_devices(ptr noundef nonnull %6, ptr noundef nonnull %2, ptr noundef nonnull %3) #3
%10 = load i32, ptr %3, align 4, !tbaa !5
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %56
12: ; preds = %8
%13 = load ptr, ptr %2, align 8, !tbaa !9
br label %14
14: ; preds = %12, %51
%15 = phi i32 [ %52, %51 ], [ 0, %12 ]
%16 = phi ptr [ %53, %51 ], [ %13, %12 ]
%17 = load ptr, ptr %16, align 8, !tbaa !9
%18 = call i64 @device_get_children(ptr noundef %17, ptr noundef nonnull %4, ptr noundef nonnull %5) #3
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %51
20: ; preds = %14
%21 = load ptr, ptr %4, align 8, !tbaa !9
%22 = load i32, ptr %5, align 4, !tbaa !5
%23 = icmp sgt i32 %22, 0
br i1 %23, label %24, label %47
24: ; preds = %20, %40
%25 = phi i32 [ %41, %40 ], [ 0, %20 ]
%26 = phi ptr [ %42, %40 ], [ %21, %20 ]
%27 = load ptr, ptr %26, align 8, !tbaa !9
%28 = call i64 @pci_get_vendor(ptr noundef %27) #3
%29 = load i64, ptr @SIS_VENDORID, align 8, !tbaa !11
%30 = icmp eq i64 %28, %29
br i1 %30, label %31, label %40
31: ; preds = %24
%32 = load ptr, ptr %26, align 8, !tbaa !9
%33 = call i32 @pci_get_device(ptr noundef %32) #3
%34 = icmp eq i32 %33, 8
br i1 %34, label %35, label %40
35: ; preds = %31
%36 = load ptr, ptr %26, align 8, !tbaa !9
%37 = load ptr, ptr %4, align 8, !tbaa !9
%38 = load i32, ptr @M_TEMP, align 4, !tbaa !5
%39 = call i32 @free(ptr noundef %37, i32 noundef %38) #3
br label %56
40: ; preds = %24, %31
%41 = add nuw nsw i32 %25, 1
%42 = getelementptr inbounds ptr, ptr %26, i64 1
%43 = load i32, ptr %5, align 4, !tbaa !5
%44 = icmp slt i32 %41, %43
br i1 %44, label %24, label %45, !llvm.loop !13
45: ; preds = %40
%46 = load ptr, ptr %4, align 8, !tbaa !9
br label %47
47: ; preds = %45, %20
%48 = phi ptr [ %46, %45 ], [ %21, %20 ]
%49 = load i32, ptr @M_TEMP, align 4, !tbaa !5
%50 = call i32 @free(ptr noundef %48, i32 noundef %49) #3
br label %51
51: ; preds = %14, %47
%52 = add nuw nsw i32 %15, 1
%53 = getelementptr inbounds ptr, ptr %16, i64 1
%54 = load i32, ptr %3, align 4, !tbaa !5
%55 = icmp slt i32 %52, %54
br i1 %55, label %14, label %56, !llvm.loop !15
56: ; preds = %51, %8, %35
%57 = phi ptr [ %36, %35 ], [ null, %8 ], [ null, %51 ]
%58 = load ptr, ptr %2, align 8, !tbaa !9
%59 = load i32, ptr @M_TEMP, align 4, !tbaa !5
%60 = call i32 @free(ptr noundef %58, i32 noundef %59) #3
br label %61
61: ; preds = %1, %56
%62 = phi ptr [ %57, %56 ], [ null, %1 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret ptr %62
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @devclass_find(ptr noundef) local_unnamed_addr #2
declare i32 @devclass_get_devices(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @device_get_children(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @pci_get_vendor(ptr noundef) local_unnamed_addr #2
declare i32 @pci_get_device(ptr noundef) local_unnamed_addr #2
declare i32 @free(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/sis/extr_if_sis.c_sis_find_bridge.c'
source_filename = "AnghaBench/freebsd/sys/dev/sis/extr_if_sis.c_sis_find_bridge.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [4 x i8] c"pci\00", align 1
@SIS_VENDORID = common local_unnamed_addr global i64 0, align 8
@M_TEMP = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sis_find_bridge], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @sis_find_bridge(ptr nocapture readnone %0) #0 {
%2 = alloca ptr, align 8
%3 = alloca i32, align 4
%4 = alloca ptr, align 8
%5 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
store i32 0, ptr %3, align 4, !tbaa !6
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
store i32 0, ptr %5, align 4, !tbaa !6
%6 = tail call ptr @devclass_find(ptr noundef nonnull @.str) #3
%7 = icmp eq ptr %6, null
br i1 %7, label %61, label %8
8: ; preds = %1
%9 = call i32 @devclass_get_devices(ptr noundef nonnull %6, ptr noundef nonnull %2, ptr noundef nonnull %3) #3
%10 = load i32, ptr %3, align 4, !tbaa !6
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %56
12: ; preds = %8
%13 = load ptr, ptr %2, align 8, !tbaa !10
br label %14
14: ; preds = %12, %51
%15 = phi i32 [ %52, %51 ], [ 0, %12 ]
%16 = phi ptr [ %53, %51 ], [ %13, %12 ]
%17 = load ptr, ptr %16, align 8, !tbaa !10
%18 = call i64 @device_get_children(ptr noundef %17, ptr noundef nonnull %4, ptr noundef nonnull %5) #3
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %51
20: ; preds = %14
%21 = load ptr, ptr %4, align 8, !tbaa !10
%22 = load i32, ptr %5, align 4, !tbaa !6
%23 = icmp sgt i32 %22, 0
br i1 %23, label %24, label %47
24: ; preds = %20, %40
%25 = phi i32 [ %41, %40 ], [ 0, %20 ]
%26 = phi ptr [ %42, %40 ], [ %21, %20 ]
%27 = load ptr, ptr %26, align 8, !tbaa !10
%28 = call i64 @pci_get_vendor(ptr noundef %27) #3
%29 = load i64, ptr @SIS_VENDORID, align 8, !tbaa !12
%30 = icmp eq i64 %28, %29
br i1 %30, label %31, label %40
31: ; preds = %24
%32 = load ptr, ptr %26, align 8, !tbaa !10
%33 = call i32 @pci_get_device(ptr noundef %32) #3
%34 = icmp eq i32 %33, 8
br i1 %34, label %35, label %40
35: ; preds = %31
%36 = load ptr, ptr %26, align 8, !tbaa !10
%37 = load ptr, ptr %4, align 8, !tbaa !10
%38 = load i32, ptr @M_TEMP, align 4, !tbaa !6
%39 = call i32 @free(ptr noundef %37, i32 noundef %38) #3
br label %56
40: ; preds = %24, %31
%41 = add nuw nsw i32 %25, 1
%42 = getelementptr inbounds i8, ptr %26, i64 8
%43 = load i32, ptr %5, align 4, !tbaa !6
%44 = icmp slt i32 %41, %43
br i1 %44, label %24, label %45, !llvm.loop !14
45: ; preds = %40
%46 = load ptr, ptr %4, align 8, !tbaa !10
br label %47
47: ; preds = %45, %20
%48 = phi ptr [ %46, %45 ], [ %21, %20 ]
%49 = load i32, ptr @M_TEMP, align 4, !tbaa !6
%50 = call i32 @free(ptr noundef %48, i32 noundef %49) #3
br label %51
51: ; preds = %14, %47
%52 = add nuw nsw i32 %15, 1
%53 = getelementptr inbounds i8, ptr %16, i64 8
%54 = load i32, ptr %3, align 4, !tbaa !6
%55 = icmp slt i32 %52, %54
br i1 %55, label %14, label %56, !llvm.loop !16
56: ; preds = %51, %8, %35
%57 = phi ptr [ %36, %35 ], [ null, %8 ], [ null, %51 ]
%58 = load ptr, ptr %2, align 8, !tbaa !10
%59 = load i32, ptr @M_TEMP, align 4, !tbaa !6
%60 = call i32 @free(ptr noundef %58, i32 noundef %59) #3
br label %61
61: ; preds = %1, %56
%62 = phi ptr [ %57, %56 ], [ null, %1 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret ptr %62
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @devclass_find(ptr noundef) local_unnamed_addr #2
declare i32 @devclass_get_devices(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @device_get_children(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @pci_get_vendor(ptr noundef) local_unnamed_addr #2
declare i32 @pci_get_device(ptr noundef) local_unnamed_addr #2
declare i32 @free(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
| freebsd_sys_dev_sis_extr_if_sis.c_sis_find_bridge |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/fpga/extr_conn.c_mlx5_fpga_conn_device_cleanup.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/fpga/extr_conn.c_mlx5_fpga_conn_device_cleanup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mlx5_fpga_device = type { i32, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32, i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local void @mlx5_fpga_conn_device_cleanup(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = getelementptr inbounds %struct.mlx5_fpga_device, ptr %0, i64 0, i32 1
%4 = getelementptr inbounds %struct.mlx5_fpga_device, ptr %0, i64 0, i32 1, i32 2
%5 = tail call i32 @mlx5_core_destroy_mkey(i32 noundef %2, ptr noundef nonnull %4) #2
%6 = load i32, ptr %0, align 4, !tbaa !5
%7 = getelementptr inbounds %struct.mlx5_fpga_device, ptr %0, i64 0, i32 1, i32 1
%8 = load i32, ptr %7, align 4, !tbaa !11
%9 = tail call i32 @mlx5_core_dealloc_pd(i32 noundef %6, i32 noundef %8) #2
%10 = load i32, ptr %0, align 4, !tbaa !5
%11 = load i32, ptr %3, align 4, !tbaa !12
%12 = tail call i32 @mlx5_put_uars_page(i32 noundef %10, i32 noundef %11) #2
%13 = load i32, ptr %0, align 4, !tbaa !5
%14 = tail call i32 @mlx5_nic_vport_disable_roce(i32 noundef %13) #2
ret void
}
declare i32 @mlx5_core_destroy_mkey(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mlx5_core_dealloc_pd(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mlx5_put_uars_page(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mlx5_nic_vport_disable_roce(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"mlx5_fpga_device", !7, i64 0, !10, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_2__", !7, i64 0, !7, i64 4, !7, i64 8}
!11 = !{!6, !7, i64 8}
!12 = !{!6, !7, i64 4}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/fpga/extr_conn.c_mlx5_fpga_conn_device_cleanup.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/fpga/extr_conn.c_mlx5_fpga_conn_device_cleanup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @mlx5_fpga_conn_device_cleanup(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = getelementptr inbounds i8, ptr %0, i64 4
%4 = getelementptr inbounds i8, ptr %0, i64 12
%5 = tail call i32 @mlx5_core_destroy_mkey(i32 noundef %2, ptr noundef nonnull %4) #2
%6 = load i32, ptr %0, align 4, !tbaa !6
%7 = getelementptr inbounds i8, ptr %0, i64 8
%8 = load i32, ptr %7, align 4, !tbaa !12
%9 = tail call i32 @mlx5_core_dealloc_pd(i32 noundef %6, i32 noundef %8) #2
%10 = load i32, ptr %0, align 4, !tbaa !6
%11 = load i32, ptr %3, align 4, !tbaa !13
%12 = tail call i32 @mlx5_put_uars_page(i32 noundef %10, i32 noundef %11) #2
%13 = load i32, ptr %0, align 4, !tbaa !6
%14 = tail call i32 @mlx5_nic_vport_disable_roce(i32 noundef %13) #2
ret void
}
declare i32 @mlx5_core_destroy_mkey(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mlx5_core_dealloc_pd(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mlx5_put_uars_page(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mlx5_nic_vport_disable_roce(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"mlx5_fpga_device", !8, i64 0, !11, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_2__", !8, i64 0, !8, i64 4, !8, i64 8}
!12 = !{!7, !8, i64 8}
!13 = !{!7, !8, i64 4}
| linux_drivers_net_ethernet_mellanox_mlx5_core_fpga_extr_conn.c_mlx5_fpga_conn_device_cleanup |
; ModuleID = 'AnghaBench/esp-idf/components/bt/esp_ble_mesh/mesh_core/extr_adv.c_bt_mesh_pba_get_addr.c'
source_filename = "AnghaBench/esp-idf/components/bt/esp_ble_mesh/mesh_core/extr_adv.c_bt_mesh_pba_get_addr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@dev_addr = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define dso_local ptr @bt_mesh_pba_get_addr() local_unnamed_addr #0 {
%1 = load ptr, ptr @dev_addr, align 8, !tbaa !5
ret ptr %1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/esp-idf/components/bt/esp_ble_mesh/mesh_core/extr_adv.c_bt_mesh_pba_get_addr.c'
source_filename = "AnghaBench/esp-idf/components/bt/esp_ble_mesh/mesh_core/extr_adv.c_bt_mesh_pba_get_addr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@dev_addr = common local_unnamed_addr global ptr null, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define ptr @bt_mesh_pba_get_addr() local_unnamed_addr #0 {
%1 = load ptr, ptr @dev_addr, align 8, !tbaa !6
ret ptr %1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| esp-idf_components_bt_esp_ble_mesh_mesh_core_extr_adv.c_bt_mesh_pba_get_addr |
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/wilba_tech/extr_wt_rgb_backlight.c_map_row_column_to_led.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/wilba_tech/extr_wt_rgb_backlight.c_map_row_column_to_led.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MATRIX_ROWS = dso_local local_unnamed_addr global i64 0, align 8
@MATRIX_COLS = dso_local local_unnamed_addr global i64 0, align 8
@g_map_row_column_to_led = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local void @map_row_column_to_led(i64 noundef %0, i64 noundef %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
store i64 255, ptr %2, align 8, !tbaa !5
%4 = load i64, ptr @MATRIX_ROWS, align 8, !tbaa !5
%5 = icmp ugt i64 %4, %0
%6 = load i64, ptr @MATRIX_COLS, align 8
%7 = icmp ugt i64 %6, %1
%8 = select i1 %5, i1 %7, i1 false
br i1 %8, label %9, label %15
9: ; preds = %3
%10 = load ptr, ptr @g_map_row_column_to_led, align 8, !tbaa !9
%11 = getelementptr inbounds ptr, ptr %10, i64 %0
%12 = load ptr, ptr %11, align 8, !tbaa !9
%13 = getelementptr inbounds i32, ptr %12, i64 %1
%14 = tail call i64 @pgm_read_byte(ptr noundef %13) #2
store i64 %14, ptr %2, align 8, !tbaa !5
br label %15
15: ; preds = %9, %3
ret void
}
declare i64 @pgm_read_byte(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/qmk_firmware/keyboards/wilba_tech/extr_wt_rgb_backlight.c_map_row_column_to_led.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/wilba_tech/extr_wt_rgb_backlight.c_map_row_column_to_led.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MATRIX_ROWS = common local_unnamed_addr global i64 0, align 8
@MATRIX_COLS = common local_unnamed_addr global i64 0, align 8
@g_map_row_column_to_led = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @map_row_column_to_led(i64 noundef %0, i64 noundef %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
store i64 255, ptr %2, align 8, !tbaa !6
%4 = load i64, ptr @MATRIX_ROWS, align 8, !tbaa !6
%5 = icmp ugt i64 %4, %0
%6 = load i64, ptr @MATRIX_COLS, align 8
%7 = icmp ugt i64 %6, %1
%8 = select i1 %5, i1 %7, i1 false
br i1 %8, label %9, label %15
9: ; preds = %3
%10 = load ptr, ptr @g_map_row_column_to_led, align 8, !tbaa !10
%11 = getelementptr inbounds ptr, ptr %10, i64 %0
%12 = load ptr, ptr %11, align 8, !tbaa !10
%13 = getelementptr inbounds i32, ptr %12, i64 %1
%14 = tail call i64 @pgm_read_byte(ptr noundef %13) #2
store i64 %14, ptr %2, align 8, !tbaa !6
br label %15
15: ; preds = %9, %3
ret void
}
declare i64 @pgm_read_byte(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
| qmk_firmware_keyboards_wilba_tech_extr_wt_rgb_backlight.c_map_row_column_to_led |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/vboxvideo/extr_vbva_base.c_vbva_enable.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/vboxvideo/extr_vbva_base.c_vbva_enable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.vbva_buf_ctx = type { ptr, i64 }
%struct.vbva_buffer = type { i32, i64 }
; Function Attrs: nounwind uwtable
define dso_local i32 @vbva_enable(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = tail call i32 @memset(ptr noundef %2, i32 noundef 0, i32 noundef 16) #2
store i32 256, ptr %2, align 8, !tbaa !5
%6 = getelementptr inbounds %struct.vbva_buf_ctx, ptr %0, i64 0, i32 1
%7 = load i64, ptr %6, align 8, !tbaa !11
%8 = add i64 %7, -16
%9 = getelementptr inbounds %struct.vbva_buffer, ptr %2, i64 0, i32 1
store i64 %8, ptr %9, align 8, !tbaa !14
store ptr %2, ptr %0, align 8, !tbaa !15
%10 = tail call i32 @vbva_inform_host(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %3, i32 noundef 1) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %4
%13 = tail call i32 @vbva_disable(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %3) #2
br label %14
14: ; preds = %12, %4
ret i32 %10
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vbva_inform_host(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vbva_disable(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"vbva_buffer", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"vbva_buf_ctx", !13, i64 0, !10, i64 8}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!6, !10, i64 8}
!15 = !{!12, !13, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/vboxvideo/extr_vbva_base.c_vbva_enable.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/vboxvideo/extr_vbva_base.c_vbva_enable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @vbva_enable(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = tail call i32 @memset(ptr noundef %2, i32 noundef 0, i32 noundef 16) #2
store i32 256, ptr %2, align 8, !tbaa !6
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load i64, ptr %6, align 8, !tbaa !12
%8 = add i64 %7, -16
%9 = getelementptr inbounds i8, ptr %2, i64 8
store i64 %8, ptr %9, align 8, !tbaa !15
store ptr %2, ptr %0, align 8, !tbaa !16
%10 = tail call i32 @vbva_inform_host(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %3, i32 noundef 1) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %4
%13 = tail call i32 @vbva_disable(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %3) #2
br label %14
14: ; preds = %12, %4
ret i32 %10
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vbva_inform_host(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vbva_disable(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"vbva_buffer", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!13, !11, i64 8}
!13 = !{!"vbva_buf_ctx", !14, i64 0, !11, i64 8}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!7, !11, i64 8}
!16 = !{!13, !14, i64 0}
| linux_drivers_gpu_drm_vboxvideo_extr_vbva_base.c_vbva_enable |
; ModuleID = 'AnghaBench/FFmpeg/libavutil/extr_avstring.c_av_strnstr.c'
source_filename = "AnghaBench/FFmpeg/libavutil/extr_avstring.c_av_strnstr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nofree nounwind memory(read, inaccessiblemem: none) uwtable
define dso_local ptr @av_strnstr(ptr noundef readonly %0, ptr nocapture noundef readonly %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %1)
%5 = icmp eq i64 %4, 0
br i1 %5, label %17, label %6
6: ; preds = %3
%7 = icmp ugt i64 %4, %2
br i1 %7, label %17, label %8
8: ; preds = %6, %13
%9 = phi i64 [ %14, %13 ], [ %2, %6 ]
%10 = phi ptr [ %15, %13 ], [ %0, %6 ]
%11 = tail call i32 @bcmp(ptr %10, ptr %1, i64 %4)
%12 = icmp eq i32 %11, 0
br i1 %12, label %17, label %13
13: ; preds = %8
%14 = add i64 %9, -1
%15 = getelementptr inbounds i8, ptr %10, i64 1
%16 = icmp ult i64 %14, %4
br i1 %16, label %17, label %8, !llvm.loop !5
17: ; preds = %8, %13, %6, %3
%18 = phi ptr [ %0, %3 ], [ null, %6 ], [ %10, %8 ], [ null, %13 ]
ret ptr %18
}
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i64 @strlen(ptr nocapture noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind willreturn memory(argmem: read)
declare i32 @bcmp(ptr nocapture, ptr nocapture, i64) local_unnamed_addr #2
attributes #0 = { nofree nounwind memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind willreturn memory(argmem: read) }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/FFmpeg/libavutil/extr_avstring.c_av_strnstr.c'
source_filename = "AnghaBench/FFmpeg/libavutil/extr_avstring.c_av_strnstr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nofree nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define noundef ptr @av_strnstr(ptr noundef readonly %0, ptr nocapture noundef readonly %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %1) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %17, label %6
6: ; preds = %3
%7 = icmp ugt i64 %4, %2
br i1 %7, label %17, label %8
8: ; preds = %6, %13
%9 = phi i64 [ %14, %13 ], [ %2, %6 ]
%10 = phi ptr [ %15, %13 ], [ %0, %6 ]
%11 = tail call i32 @memcmp(ptr noundef %10, ptr noundef %1, i64 noundef %4)
%12 = icmp eq i32 %11, 0
br i1 %12, label %17, label %13
13: ; preds = %8
%14 = add i64 %9, -1
%15 = getelementptr inbounds i8, ptr %10, i64 1
%16 = icmp ult i64 %14, %4
br i1 %16, label %17, label %8, !llvm.loop !6
17: ; preds = %8, %13, %6, %3
%18 = phi ptr [ %0, %3 ], [ null, %6 ], [ %10, %8 ], [ null, %13 ]
ret ptr %18
}
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i64 @strlen(ptr nocapture noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @memcmp(ptr nocapture noundef, ptr nocapture noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nofree nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(argmem: read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = distinct !{!6, !7}
!7 = !{!"llvm.loop.mustprogress"}
| FFmpeg_libavutil_extr_avstring.c_av_strnstr |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_display.c_intel_connector_check_state.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_display.c_intel_connector_check_state.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.intel_connector = type { %struct.TYPE_8__, ptr, ptr }
%struct.TYPE_8__ = type { i64, ptr, %struct.TYPE_5__ }
%struct.TYPE_5__ = type { i32 }
%struct.intel_encoder = type { ptr, %struct.TYPE_6__, i32 }
%struct.TYPE_6__ = type { ptr }
%struct.TYPE_7__ = type { i32, i32 }
@.str = private unnamed_addr constant [19 x i8] c"[CONNECTOR:%d:%s]\0A\00", align 1
@DRM_MODE_DPMS_OFF = dso_local local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [28 x i8] c"wrong connector dpms state\0A\00", align 1
@.str.2 = private unnamed_addr constant [40 x i8] c"active connector not linked to encoder\0A\00", align 1
@.str.3 = private unnamed_addr constant [36 x i8] c"encoder->connectors_active not set\0A\00", align 1
@.str.4 = private unnamed_addr constant [21 x i8] c"encoder not enabled\0A\00", align 1
@.str.5 = private unnamed_addr constant [18 x i8] c"crtc not enabled\0A\00", align 1
@.str.6 = private unnamed_addr constant [17 x i8] c"crtc not active\0A\00", align 1
@.str.7 = private unnamed_addr constant [34 x i8] c"encoder active on the wrong pipe\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @intel_connector_check_state], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @intel_connector_check_state(ptr noundef %0) #0 {
%2 = alloca i32, align 4
%3 = getelementptr inbounds %struct.intel_connector, ptr %0, i64 0, i32 2
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = tail call i64 %4(ptr noundef %0) #3
%6 = icmp eq i64 %5, 0
br i1 %6, label %59, label %7
7: ; preds = %1
%8 = getelementptr inbounds %struct.intel_connector, ptr %0, i64 0, i32 1
%9 = load ptr, ptr %8, align 8, !tbaa !14
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%10 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 2
%11 = load i32, ptr %10, align 8, !tbaa !15
%12 = tail call i32 @drm_get_connector_name(ptr noundef nonnull %0) #3
%13 = tail call i32 @DRM_DEBUG_KMS(ptr noundef nonnull @.str, i32 noundef %11, i32 noundef %12) #3
%14 = load i64, ptr %0, align 8, !tbaa !16
%15 = load i64, ptr @DRM_MODE_DPMS_OFF, align 8, !tbaa !17
%16 = icmp eq i64 %14, %15
%17 = zext i1 %16 to i32
%18 = tail call i32 @WARN(i32 noundef %17, ptr noundef nonnull @.str.1) #3
%19 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1
%20 = load ptr, ptr %19, align 8, !tbaa !18
%21 = getelementptr inbounds %struct.intel_encoder, ptr %9, i64 0, i32 1
%22 = icmp ne ptr %20, %21
%23 = zext i1 %22 to i32
%24 = tail call i32 @WARN(i32 noundef %23, ptr noundef nonnull @.str.2) #3
%25 = getelementptr inbounds %struct.intel_encoder, ptr %9, i64 0, i32 2
%26 = load i32, ptr %25, align 8, !tbaa !19
%27 = icmp eq i32 %26, 0
%28 = zext i1 %27 to i32
%29 = tail call i32 @WARN(i32 noundef %28, ptr noundef nonnull @.str.3) #3
%30 = load ptr, ptr %9, align 8, !tbaa !22
%31 = call i32 %30(ptr noundef nonnull %9, ptr noundef nonnull %2) #3
%32 = icmp eq i32 %31, 0
%33 = zext i1 %32 to i32
%34 = call i32 @WARN(i32 noundef %33, ptr noundef nonnull @.str.4) #3
%35 = load ptr, ptr %21, align 8, !tbaa !23
%36 = icmp eq ptr %35, null
%37 = zext i1 %36 to i32
%38 = call i64 @WARN_ON(i32 noundef %37) #3
%39 = icmp eq i64 %38, 0
br i1 %39, label %40, label %58
40: ; preds = %7
%41 = load ptr, ptr %21, align 8, !tbaa !23
%42 = load i32, ptr %41, align 4, !tbaa !24
%43 = icmp eq i32 %42, 0
%44 = zext i1 %43 to i32
%45 = call i32 @WARN(i32 noundef %44, ptr noundef nonnull @.str.5) #3
%46 = call ptr @to_intel_crtc(ptr noundef nonnull %41) #3
%47 = getelementptr inbounds %struct.TYPE_7__, ptr %46, i64 0, i32 1
%48 = load i32, ptr %47, align 4, !tbaa !26
%49 = icmp eq i32 %48, 0
%50 = zext i1 %49 to i32
%51 = call i32 @WARN(i32 noundef %50, ptr noundef nonnull @.str.6) #3
%52 = load i32, ptr %2, align 4, !tbaa !28
%53 = call ptr @to_intel_crtc(ptr noundef nonnull %41) #3
%54 = load i32, ptr %53, align 4, !tbaa !29
%55 = icmp ne i32 %52, %54
%56 = zext i1 %55 to i32
%57 = call i32 @WARN(i32 noundef %56, ptr noundef nonnull @.str.7) #3
br label %58
58: ; preds = %7, %40
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
br label %59
59: ; preds = %58, %1
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @DRM_DEBUG_KMS(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @drm_get_connector_name(ptr noundef) local_unnamed_addr #2
declare i32 @WARN(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @WARN_ON(i32 noundef) local_unnamed_addr #2
declare ptr @to_intel_crtc(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 32}
!6 = !{!"intel_connector", !7, i64 0, !11, i64 24, !11, i64 32}
!7 = !{!"TYPE_8__", !8, i64 0, !11, i64 8, !12, i64 16}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"TYPE_5__", !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!6, !11, i64 24}
!15 = !{!6, !13, i64 16}
!16 = !{!6, !8, i64 0}
!17 = !{!8, !8, i64 0}
!18 = !{!6, !11, i64 8}
!19 = !{!20, !13, i64 16}
!20 = !{!"intel_encoder", !11, i64 0, !21, i64 8, !13, i64 16}
!21 = !{!"TYPE_6__", !11, i64 0}
!22 = !{!20, !11, i64 0}
!23 = !{!20, !11, i64 8}
!24 = !{!25, !13, i64 0}
!25 = !{!"drm_crtc", !13, i64 0}
!26 = !{!27, !13, i64 4}
!27 = !{!"TYPE_7__", !13, i64 0, !13, i64 4}
!28 = !{!13, !13, i64 0}
!29 = !{!27, !13, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_display.c_intel_connector_check_state.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_display.c_intel_connector_check_state.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [19 x i8] c"[CONNECTOR:%d:%s]\0A\00", align 1
@DRM_MODE_DPMS_OFF = common local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [28 x i8] c"wrong connector dpms state\0A\00", align 1
@.str.2 = private unnamed_addr constant [40 x i8] c"active connector not linked to encoder\0A\00", align 1
@.str.3 = private unnamed_addr constant [36 x i8] c"encoder->connectors_active not set\0A\00", align 1
@.str.4 = private unnamed_addr constant [21 x i8] c"encoder not enabled\0A\00", align 1
@.str.5 = private unnamed_addr constant [18 x i8] c"crtc not enabled\0A\00", align 1
@.str.6 = private unnamed_addr constant [17 x i8] c"crtc not active\0A\00", align 1
@.str.7 = private unnamed_addr constant [34 x i8] c"encoder active on the wrong pipe\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @intel_connector_check_state], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @intel_connector_check_state(ptr noundef %0) #0 {
%2 = alloca i32, align 4
%3 = getelementptr inbounds i8, ptr %0, i64 32
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = tail call i64 %4(ptr noundef %0) #3
%6 = icmp eq i64 %5, 0
br i1 %6, label %59, label %7
7: ; preds = %1
%8 = getelementptr inbounds i8, ptr %0, i64 24
%9 = load ptr, ptr %8, align 8, !tbaa !15
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%10 = getelementptr inbounds i8, ptr %0, i64 16
%11 = load i32, ptr %10, align 8, !tbaa !16
%12 = tail call i32 @drm_get_connector_name(ptr noundef nonnull %0) #3
%13 = tail call i32 @DRM_DEBUG_KMS(ptr noundef nonnull @.str, i32 noundef %11, i32 noundef %12) #3
%14 = load i64, ptr %0, align 8, !tbaa !17
%15 = load i64, ptr @DRM_MODE_DPMS_OFF, align 8, !tbaa !18
%16 = icmp eq i64 %14, %15
%17 = zext i1 %16 to i32
%18 = tail call i32 @WARN(i32 noundef %17, ptr noundef nonnull @.str.1) #3
%19 = getelementptr inbounds i8, ptr %0, i64 8
%20 = load ptr, ptr %19, align 8, !tbaa !19
%21 = getelementptr inbounds i8, ptr %9, i64 8
%22 = icmp ne ptr %20, %21
%23 = zext i1 %22 to i32
%24 = tail call i32 @WARN(i32 noundef %23, ptr noundef nonnull @.str.2) #3
%25 = getelementptr inbounds i8, ptr %9, i64 16
%26 = load i32, ptr %25, align 8, !tbaa !20
%27 = icmp eq i32 %26, 0
%28 = zext i1 %27 to i32
%29 = tail call i32 @WARN(i32 noundef %28, ptr noundef nonnull @.str.3) #3
%30 = load ptr, ptr %9, align 8, !tbaa !23
%31 = call i32 %30(ptr noundef nonnull %9, ptr noundef nonnull %2) #3
%32 = icmp eq i32 %31, 0
%33 = zext i1 %32 to i32
%34 = call i32 @WARN(i32 noundef %33, ptr noundef nonnull @.str.4) #3
%35 = load ptr, ptr %21, align 8, !tbaa !24
%36 = icmp eq ptr %35, null
%37 = zext i1 %36 to i32
%38 = call i64 @WARN_ON(i32 noundef %37) #3
%39 = icmp eq i64 %38, 0
br i1 %39, label %40, label %58
40: ; preds = %7
%41 = load ptr, ptr %21, align 8, !tbaa !24
%42 = load i32, ptr %41, align 4, !tbaa !25
%43 = icmp eq i32 %42, 0
%44 = zext i1 %43 to i32
%45 = call i32 @WARN(i32 noundef %44, ptr noundef nonnull @.str.5) #3
%46 = call ptr @to_intel_crtc(ptr noundef nonnull %41) #3
%47 = getelementptr inbounds i8, ptr %46, i64 4
%48 = load i32, ptr %47, align 4, !tbaa !27
%49 = icmp eq i32 %48, 0
%50 = zext i1 %49 to i32
%51 = call i32 @WARN(i32 noundef %50, ptr noundef nonnull @.str.6) #3
%52 = load i32, ptr %2, align 4, !tbaa !29
%53 = call ptr @to_intel_crtc(ptr noundef nonnull %41) #3
%54 = load i32, ptr %53, align 4, !tbaa !30
%55 = icmp ne i32 %52, %54
%56 = zext i1 %55 to i32
%57 = call i32 @WARN(i32 noundef %56, ptr noundef nonnull @.str.7) #3
br label %58
58: ; preds = %7, %40
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
br label %59
59: ; preds = %58, %1
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @DRM_DEBUG_KMS(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @drm_get_connector_name(ptr noundef) local_unnamed_addr #2
declare i32 @WARN(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @WARN_ON(i32 noundef) local_unnamed_addr #2
declare ptr @to_intel_crtc(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 32}
!7 = !{!"intel_connector", !8, i64 0, !12, i64 24, !12, i64 32}
!8 = !{!"TYPE_8__", !9, i64 0, !12, i64 8, !13, i64 16}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!"TYPE_5__", !14, i64 0}
!14 = !{!"int", !10, i64 0}
!15 = !{!7, !12, i64 24}
!16 = !{!7, !14, i64 16}
!17 = !{!7, !9, i64 0}
!18 = !{!9, !9, i64 0}
!19 = !{!7, !12, i64 8}
!20 = !{!21, !14, i64 16}
!21 = !{!"intel_encoder", !12, i64 0, !22, i64 8, !14, i64 16}
!22 = !{!"TYPE_6__", !12, i64 0}
!23 = !{!21, !12, i64 0}
!24 = !{!21, !12, i64 8}
!25 = !{!26, !14, i64 0}
!26 = !{!"drm_crtc", !14, i64 0}
!27 = !{!28, !14, i64 4}
!28 = !{!"TYPE_7__", !14, i64 0, !14, i64 4}
!29 = !{!14, !14, i64 0}
!30 = !{!28, !14, i64 0}
| fastsocket_kernel_drivers_gpu_drm_i915_extr_intel_display.c_intel_connector_check_state |
; ModuleID = 'AnghaBench/linux/drivers/scsi/csiostor/extr_csio_scsi.c_csio_abrt_cls.c'
source_filename = "AnghaBench/linux/drivers/scsi/csiostor/extr_csio_scsi.c_csio_abrt_cls.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@n_abrt_race_comp = dso_local local_unnamed_addr global i32 0, align 4
@SCSI_ABORT = dso_local local_unnamed_addr global i32 0, align 4
@SCSI_CLOSE = dso_local local_unnamed_addr global i32 0, align 4
@n_abrt_busy_error = dso_local local_unnamed_addr global i32 0, align 4
@n_cls_busy_error = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @csio_abrt_cls], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @csio_abrt_cls(ptr noundef %0, ptr noundef readnone %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = load ptr, ptr %3, align 8, !tbaa !10
%5 = tail call ptr @csio_hw_to_scsim(ptr noundef %4) #2
%6 = tail call ptr @csio_scsi_cmnd(ptr noundef nonnull %0) #2
%7 = icmp eq ptr %6, %1
br i1 %7, label %8, label %18
8: ; preds = %2
%9 = tail call i32 @csio_is_lnode_ready(ptr noundef nonnull %3) #2
%10 = icmp eq i32 %9, 0
%11 = load i32, ptr @SCSI_ABORT, align 4
%12 = load i32, ptr @SCSI_CLOSE, align 4
%13 = select i1 %10, i32 %12, i32 %11
%14 = tail call i32 @csio_do_abrt_cls(ptr noundef %4, ptr noundef nonnull %0, i32 noundef %13) #2
%15 = icmp eq i32 %14, 0
br i1 %15, label %22, label %16
16: ; preds = %8
%17 = select i1 %10, ptr @n_cls_busy_error, ptr @n_abrt_busy_error
br label %18
18: ; preds = %16, %2
%19 = phi ptr [ @n_abrt_race_comp, %2 ], [ %17, %16 ]
%20 = load i32, ptr %19, align 4, !tbaa !12
%21 = tail call i32 @CSIO_INC_STATS(ptr noundef %5, i32 noundef %20) #2
br label %22
22: ; preds = %18, %8
ret void
}
declare ptr @csio_hw_to_scsim(ptr noundef) local_unnamed_addr #1
declare ptr @csio_scsi_cmnd(ptr noundef) local_unnamed_addr #1
declare i32 @CSIO_INC_STATS(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @csio_is_lnode_ready(ptr noundef) local_unnamed_addr #1
declare i32 @csio_do_abrt_cls(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"csio_ioreq", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"csio_lnode", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/csiostor/extr_csio_scsi.c_csio_abrt_cls.c'
source_filename = "AnghaBench/linux/drivers/scsi/csiostor/extr_csio_scsi.c_csio_abrt_cls.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@n_abrt_race_comp = common local_unnamed_addr global i32 0, align 4
@SCSI_ABORT = common local_unnamed_addr global i32 0, align 4
@SCSI_CLOSE = common local_unnamed_addr global i32 0, align 4
@n_abrt_busy_error = common local_unnamed_addr global i32 0, align 4
@n_cls_busy_error = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @csio_abrt_cls], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @csio_abrt_cls(ptr noundef %0, ptr noundef readnone %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load ptr, ptr %3, align 8, !tbaa !11
%5 = tail call ptr @csio_hw_to_scsim(ptr noundef %4) #2
%6 = tail call ptr @csio_scsi_cmnd(ptr noundef nonnull %0) #2
%7 = icmp eq ptr %6, %1
br i1 %7, label %8, label %18
8: ; preds = %2
%9 = tail call i32 @csio_is_lnode_ready(ptr noundef nonnull %3) #2
%10 = icmp eq i32 %9, 0
%11 = load i32, ptr @SCSI_ABORT, align 4
%12 = load i32, ptr @SCSI_CLOSE, align 4
%13 = select i1 %10, i32 %12, i32 %11
%14 = tail call i32 @csio_do_abrt_cls(ptr noundef %4, ptr noundef nonnull %0, i32 noundef %13) #2
%15 = icmp eq i32 %14, 0
br i1 %15, label %22, label %16
16: ; preds = %8
%17 = select i1 %10, ptr @n_cls_busy_error, ptr @n_abrt_busy_error
br label %18
18: ; preds = %16, %2
%19 = phi ptr [ @n_abrt_race_comp, %2 ], [ %17, %16 ]
%20 = load i32, ptr %19, align 4, !tbaa !13
%21 = tail call i32 @CSIO_INC_STATS(ptr noundef %5, i32 noundef %20) #2
br label %22
22: ; preds = %18, %8
ret void
}
declare ptr @csio_hw_to_scsim(ptr noundef) local_unnamed_addr #1
declare ptr @csio_scsi_cmnd(ptr noundef) local_unnamed_addr #1
declare i32 @CSIO_INC_STATS(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @csio_is_lnode_ready(ptr noundef) local_unnamed_addr #1
declare i32 @csio_do_abrt_cls(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"csio_ioreq", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"csio_lnode", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !9, i64 0}
| linux_drivers_scsi_csiostor_extr_csio_scsi.c_csio_abrt_cls |
; ModuleID = 'AnghaBench/vim.js/src/extr_gui_photon.c_gui_mch_settitle.c'
source_filename = "AnghaBench/vim.js/src/extr_gui_photon.c_gui_mch_settitle.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32 }
@gui = dso_local local_unnamed_addr global %struct.TYPE_5__ zeroinitializer, align 4
@Pt_ARG_WINDOW_TITLE = dso_local local_unnamed_addr global i32 0, align 4
@curwin = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local void @gui_mch_settitle(ptr noundef %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 {
%3 = load i32, ptr @gui, align 4, !tbaa !5
%4 = load i32, ptr @Pt_ARG_WINDOW_TITLE, align 4, !tbaa !10
%5 = tail call i32 @PtSetResource(i32 noundef %3, i32 noundef %4, ptr noundef %0, i32 noundef 0) #2
ret void
}
declare i32 @PtSetResource(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/vim.js/src/extr_gui_photon.c_gui_mch_settitle.c'
source_filename = "AnghaBench/vim.js/src/extr_gui_photon.c_gui_mch_settitle.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_5__ = type { i32 }
@gui = common local_unnamed_addr global %struct.TYPE_5__ zeroinitializer, align 4
@Pt_ARG_WINDOW_TITLE = common local_unnamed_addr global i32 0, align 4
@curwin = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @gui_mch_settitle(ptr noundef %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 {
%3 = load i32, ptr @gui, align 4, !tbaa !6
%4 = load i32, ptr @Pt_ARG_WINDOW_TITLE, align 4, !tbaa !11
%5 = tail call i32 @PtSetResource(i32 noundef %3, i32 noundef %4, ptr noundef %0, i32 noundef 0) #2
ret void
}
declare i32 @PtSetResource(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| vim.js_src_extr_gui_photon.c_gui_mch_settitle |
; ModuleID = 'AnghaBench/linux/drivers/media/radio/extr_radio-ma901.c_vidioc_s_tuner.c'
source_filename = "AnghaBench/linux/drivers/media/radio/extr_radio-ma901.c_vidioc_s_tuner.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.v4l2_tuner = type { i64, i32 }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@MA901_WANT_MONO = dso_local local_unnamed_addr global i32 0, align 4
@MA901_WANT_STEREO = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @vidioc_s_tuner], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @vidioc_s_tuner(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture noundef readonly %2) #0 {
%4 = tail call ptr @video_drvdata(ptr noundef %0) #2
%5 = load i64, ptr %2, align 8, !tbaa !5
%6 = icmp sgt i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i32, ptr @EINVAL, align 4, !tbaa !11
%9 = sub nsw i32 0, %8
br label %20
10: ; preds = %3
%11 = getelementptr inbounds %struct.v4l2_tuner, ptr %2, i64 0, i32 1
%12 = load i32, ptr %11, align 8, !tbaa !12
%13 = icmp eq i32 %12, 128
br i1 %13, label %14, label %17
14: ; preds = %10
%15 = load i32, ptr @MA901_WANT_MONO, align 4, !tbaa !11
%16 = tail call i32 @ma901_set_stereo(ptr noundef %4, i32 noundef %15) #2
br label %20
17: ; preds = %10
%18 = load i32, ptr @MA901_WANT_STEREO, align 4, !tbaa !11
%19 = tail call i32 @ma901_set_stereo(ptr noundef %4, i32 noundef %18) #2
br label %20
20: ; preds = %17, %14, %7
%21 = phi i32 [ %9, %7 ], [ %16, %14 ], [ %19, %17 ]
ret i32 %21
}
declare ptr @video_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @ma901_set_stereo(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"v4l2_tuner", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/media/radio/extr_radio-ma901.c_vidioc_s_tuner.c'
source_filename = "AnghaBench/linux/drivers/media/radio/extr_radio-ma901.c_vidioc_s_tuner.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@MA901_WANT_MONO = common local_unnamed_addr global i32 0, align 4
@MA901_WANT_STEREO = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @vidioc_s_tuner], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @vidioc_s_tuner(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture noundef readonly %2) #0 {
%4 = tail call ptr @video_drvdata(ptr noundef %0) #2
%5 = load i64, ptr %2, align 8, !tbaa !6
%6 = icmp sgt i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i32, ptr @EINVAL, align 4, !tbaa !12
%9 = sub nsw i32 0, %8
br label %20
10: ; preds = %3
%11 = getelementptr inbounds i8, ptr %2, i64 8
%12 = load i32, ptr %11, align 8, !tbaa !13
%13 = icmp eq i32 %12, 128
br i1 %13, label %14, label %17
14: ; preds = %10
%15 = load i32, ptr @MA901_WANT_MONO, align 4, !tbaa !12
%16 = tail call i32 @ma901_set_stereo(ptr noundef %4, i32 noundef %15) #2
br label %20
17: ; preds = %10
%18 = load i32, ptr @MA901_WANT_STEREO, align 4, !tbaa !12
%19 = tail call i32 @ma901_set_stereo(ptr noundef %4, i32 noundef %18) #2
br label %20
20: ; preds = %17, %14, %7
%21 = phi i32 [ %9, %7 ], [ %16, %14 ], [ %19, %17 ]
ret i32 %21
}
declare ptr @video_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @ma901_set_stereo(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"v4l2_tuner", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!7, !11, i64 8}
| linux_drivers_media_radio_extr_radio-ma901.c_vidioc_s_tuner |
; ModuleID = 'AnghaBench/linux/drivers/s390/net/extr_qeth_core_main.c_qeth_qdio_output_handler.c'
source_filename = "AnghaBench/linux/drivers/s390/net/extr_qeth_core_main.c_qeth_qdio_output_handler.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.qeth_card = type { ptr, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { ptr }
%struct.qeth_qdio_out_q = type { i32, ptr }
@.str = private unnamed_addr constant [8 x i8] c"qdouhdl\00", align 1
@QDIO_ERROR_FATAL = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [9 x i8] c"achkcond\00", align 1
@QDIO_MAX_BUFFERS_PER_Q = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @qeth_qdio_output_handler], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @qeth_qdio_output_handler(ptr nocapture readnone %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i64 noundef %5) #0 {
%7 = inttoptr i64 %5 to ptr
%8 = getelementptr inbounds %struct.qeth_card, ptr %7, i64 0, i32 1
%9 = load ptr, ptr %8, align 8, !tbaa !5
%10 = sext i32 %2 to i64
%11 = getelementptr inbounds ptr, ptr %9, i64 %10
%12 = load ptr, ptr %11, align 8, !tbaa !11
%13 = load ptr, ptr %7, align 8, !tbaa !12
%14 = tail call i32 @QETH_CARD_TEXT(ptr noundef nonnull %7, i32 noundef 6, ptr noundef nonnull @.str) #2
%15 = load i32, ptr @QDIO_ERROR_FATAL, align 4, !tbaa !13
%16 = and i32 %15, %1
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %23
18: ; preds = %6
%19 = add nsw i32 %4, %3
%20 = icmp sgt i32 %4, 0
br i1 %20, label %21, label %39
21: ; preds = %18
%22 = getelementptr inbounds %struct.qeth_qdio_out_q, ptr %12, i64 0, i32 1
br label %27
23: ; preds = %6
%24 = tail call i32 @QETH_CARD_TEXT(ptr noundef nonnull %7, i32 noundef 2, ptr noundef nonnull @.str.1) #2
%25 = tail call i32 @netif_tx_stop_all_queues(ptr noundef %13) #2
%26 = tail call i32 @qeth_schedule_recovery(ptr noundef nonnull %7) #2
br label %50
27: ; preds = %21, %27
%28 = phi i32 [ %3, %21 ], [ %37, %27 ]
%29 = load i32, ptr @QDIO_MAX_BUFFERS_PER_Q, align 4, !tbaa !13
%30 = srem i32 %28, %29
%31 = load ptr, ptr %22, align 8, !tbaa !15
%32 = sext i32 %30 to i64
%33 = getelementptr inbounds ptr, ptr %31, i64 %32
%34 = load ptr, ptr %33, align 8, !tbaa !11
%35 = tail call i32 @qeth_handle_send_error(ptr noundef nonnull %7, ptr noundef %34, i32 noundef %1) #2
%36 = tail call i32 @qeth_clear_output_buffer(ptr noundef %12, ptr noundef %34, i32 noundef %1, i32 noundef 0) #2
%37 = add nsw i32 %28, 1
%38 = icmp slt i32 %37, %19
br i1 %38, label %27, label %39, !llvm.loop !17
39: ; preds = %27, %18
%40 = tail call i32 @atomic_sub(i32 noundef %4, ptr noundef %12) #2
%41 = tail call i32 @qeth_check_outbound_queue(ptr noundef %12) #2
%42 = tail call ptr @netdev_get_tx_queue(ptr noundef %13, i32 noundef %2) #2
%43 = tail call i64 @netif_tx_queue_stopped(ptr noundef %42) #2
%44 = icmp eq i64 %43, 0
br i1 %44, label %50, label %45
45: ; preds = %39
%46 = tail call i32 @qeth_out_queue_is_full(ptr noundef %12) #2
%47 = icmp eq i32 %46, 0
br i1 %47, label %48, label %50
48: ; preds = %45
%49 = tail call i32 @netif_tx_wake_queue(ptr noundef %42) #2
br label %50
50: ; preds = %39, %45, %48, %23
ret void
}
declare i32 @QETH_CARD_TEXT(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @netif_tx_stop_all_queues(ptr noundef) local_unnamed_addr #1
declare i32 @qeth_schedule_recovery(ptr noundef) local_unnamed_addr #1
declare i32 @qeth_handle_send_error(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @qeth_clear_output_buffer(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @atomic_sub(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qeth_check_outbound_queue(ptr noundef) local_unnamed_addr #1
declare ptr @netdev_get_tx_queue(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @netif_tx_queue_stopped(ptr noundef) local_unnamed_addr #1
declare i32 @qeth_out_queue_is_full(ptr noundef) local_unnamed_addr #1
declare i32 @netif_tx_wake_queue(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"qeth_card", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_2__", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !8, i64 0}
!15 = !{!16, !7, i64 8}
!16 = !{!"qeth_qdio_out_q", !14, i64 0, !7, i64 8}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/s390/net/extr_qeth_core_main.c_qeth_qdio_output_handler.c'
source_filename = "AnghaBench/linux/drivers/s390/net/extr_qeth_core_main.c_qeth_qdio_output_handler.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [8 x i8] c"qdouhdl\00", align 1
@QDIO_ERROR_FATAL = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [9 x i8] c"achkcond\00", align 1
@QDIO_MAX_BUFFERS_PER_Q = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @qeth_qdio_output_handler], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @qeth_qdio_output_handler(ptr nocapture readnone %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i64 noundef %5) #0 {
%7 = inttoptr i64 %5 to ptr
%8 = getelementptr inbounds i8, ptr %7, i64 8
%9 = load ptr, ptr %8, align 8, !tbaa !6
%10 = sext i32 %2 to i64
%11 = getelementptr inbounds ptr, ptr %9, i64 %10
%12 = load ptr, ptr %11, align 8, !tbaa !12
%13 = load ptr, ptr %7, align 8, !tbaa !13
%14 = tail call i32 @QETH_CARD_TEXT(ptr noundef nonnull %7, i32 noundef 6, ptr noundef nonnull @.str) #2
%15 = load i32, ptr @QDIO_ERROR_FATAL, align 4, !tbaa !14
%16 = and i32 %15, %1
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %23
18: ; preds = %6
%19 = add nsw i32 %4, %3
%20 = icmp sgt i32 %4, 0
br i1 %20, label %21, label %39
21: ; preds = %18
%22 = getelementptr inbounds i8, ptr %12, i64 8
br label %27
23: ; preds = %6
%24 = tail call i32 @QETH_CARD_TEXT(ptr noundef nonnull %7, i32 noundef 2, ptr noundef nonnull @.str.1) #2
%25 = tail call i32 @netif_tx_stop_all_queues(ptr noundef %13) #2
%26 = tail call i32 @qeth_schedule_recovery(ptr noundef nonnull %7) #2
br label %50
27: ; preds = %21, %27
%28 = phi i32 [ %3, %21 ], [ %37, %27 ]
%29 = load i32, ptr @QDIO_MAX_BUFFERS_PER_Q, align 4, !tbaa !14
%30 = srem i32 %28, %29
%31 = load ptr, ptr %22, align 8, !tbaa !16
%32 = sext i32 %30 to i64
%33 = getelementptr inbounds ptr, ptr %31, i64 %32
%34 = load ptr, ptr %33, align 8, !tbaa !12
%35 = tail call i32 @qeth_handle_send_error(ptr noundef nonnull %7, ptr noundef %34, i32 noundef %1) #2
%36 = tail call i32 @qeth_clear_output_buffer(ptr noundef %12, ptr noundef %34, i32 noundef %1, i32 noundef 0) #2
%37 = add nsw i32 %28, 1
%38 = icmp slt i32 %37, %19
br i1 %38, label %27, label %39, !llvm.loop !18
39: ; preds = %27, %18
%40 = tail call i32 @atomic_sub(i32 noundef %4, ptr noundef %12) #2
%41 = tail call i32 @qeth_check_outbound_queue(ptr noundef %12) #2
%42 = tail call ptr @netdev_get_tx_queue(ptr noundef %13, i32 noundef %2) #2
%43 = tail call i64 @netif_tx_queue_stopped(ptr noundef %42) #2
%44 = icmp eq i64 %43, 0
br i1 %44, label %50, label %45
45: ; preds = %39
%46 = tail call i32 @qeth_out_queue_is_full(ptr noundef %12) #2
%47 = icmp eq i32 %46, 0
br i1 %47, label %48, label %50
48: ; preds = %45
%49 = tail call i32 @netif_tx_wake_queue(ptr noundef %42) #2
br label %50
50: ; preds = %39, %45, %48, %23
ret void
}
declare i32 @QETH_CARD_TEXT(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @netif_tx_stop_all_queues(ptr noundef) local_unnamed_addr #1
declare i32 @qeth_schedule_recovery(ptr noundef) local_unnamed_addr #1
declare i32 @qeth_handle_send_error(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @qeth_clear_output_buffer(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @atomic_sub(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qeth_check_outbound_queue(ptr noundef) local_unnamed_addr #1
declare ptr @netdev_get_tx_queue(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @netif_tx_queue_stopped(ptr noundef) local_unnamed_addr #1
declare i32 @qeth_out_queue_is_full(ptr noundef) local_unnamed_addr #1
declare i32 @netif_tx_wake_queue(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"qeth_card", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_2__", !8, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !9, i64 0}
!16 = !{!17, !8, i64 8}
!17 = !{!"qeth_qdio_out_q", !15, i64 0, !8, i64 8}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
| linux_drivers_s390_net_extr_qeth_core_main.c_qeth_qdio_output_handler |
; ModuleID = 'AnghaBench/jemalloc/src/extr_arena.c_arena_stash_decayed.c'
source_filename = "AnghaBench/jemalloc/src/extr_arena.c_arena_stash_decayed.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@WITNESS_RANK_CORE = dso_local local_unnamed_addr global i32 0, align 4
@LG_PAGE = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @arena_stash_decayed], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @arena_stash_decayed(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i64 noundef %4, i64 noundef %5, ptr noundef %6) #0 {
%8 = tail call i32 @tsdn_witness_tsdp_get(ptr noundef %0) #2
%9 = load i32, ptr @WITNESS_RANK_CORE, align 4, !tbaa !5
%10 = tail call i32 @witness_assert_depth_to_rank(i32 noundef %8, i32 noundef %9, i32 noundef 0) #2
%11 = icmp eq i64 %5, 0
br i1 %11, label %23, label %12
12: ; preds = %7, %16
%13 = phi i64 [ %21, %16 ], [ 0, %7 ]
%14 = tail call ptr @extents_evict(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i64 noundef %4) #2
%15 = icmp eq ptr %14, null
br i1 %15, label %23, label %16
16: ; preds = %12
%17 = tail call i32 @extent_list_append(ptr noundef %6, ptr noundef nonnull %14) #2
%18 = tail call i64 @extent_size_get(ptr noundef nonnull %14) #2
%19 = load i64, ptr @LG_PAGE, align 8, !tbaa !9
%20 = lshr i64 %18, %19
%21 = add i64 %20, %13
%22 = icmp ult i64 %21, %5
br i1 %22, label %12, label %23, !llvm.loop !11
23: ; preds = %12, %16, %7
%24 = phi i64 [ 0, %7 ], [ %21, %16 ], [ %13, %12 ]
ret i64 %24
}
declare i32 @witness_assert_depth_to_rank(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tsdn_witness_tsdp_get(ptr noundef) local_unnamed_addr #1
declare ptr @extents_evict(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @extent_list_append(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @extent_size_get(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/jemalloc/src/extr_arena.c_arena_stash_decayed.c'
source_filename = "AnghaBench/jemalloc/src/extr_arena.c_arena_stash_decayed.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@WITNESS_RANK_CORE = common local_unnamed_addr global i32 0, align 4
@LG_PAGE = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @arena_stash_decayed], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @arena_stash_decayed(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i64 noundef %4, i64 noundef %5, ptr noundef %6) #0 {
%8 = tail call i32 @tsdn_witness_tsdp_get(ptr noundef %0) #2
%9 = load i32, ptr @WITNESS_RANK_CORE, align 4, !tbaa !6
%10 = tail call i32 @witness_assert_depth_to_rank(i32 noundef %8, i32 noundef %9, i32 noundef 0) #2
%11 = icmp eq i64 %5, 0
br i1 %11, label %23, label %12
12: ; preds = %7, %16
%13 = phi i64 [ %21, %16 ], [ 0, %7 ]
%14 = tail call ptr @extents_evict(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i64 noundef %4) #2
%15 = icmp eq ptr %14, null
br i1 %15, label %23, label %16
16: ; preds = %12
%17 = tail call i32 @extent_list_append(ptr noundef %6, ptr noundef nonnull %14) #2
%18 = tail call i64 @extent_size_get(ptr noundef nonnull %14) #2
%19 = load i64, ptr @LG_PAGE, align 8, !tbaa !10
%20 = lshr i64 %18, %19
%21 = add i64 %20, %13
%22 = icmp ult i64 %21, %5
br i1 %22, label %12, label %23, !llvm.loop !12
23: ; preds = %12, %16, %7
%24 = phi i64 [ 0, %7 ], [ %21, %16 ], [ %13, %12 ]
ret i64 %24
}
declare i32 @witness_assert_depth_to_rank(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tsdn_witness_tsdp_get(ptr noundef) local_unnamed_addr #1
declare ptr @extents_evict(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @extent_list_append(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @extent_size_get(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
| jemalloc_src_extr_arena.c_arena_stash_decayed |
; ModuleID = 'AnghaBench/linux/drivers/block/rsxx/extr_core.c_rsxx_error_detected.c'
source_filename = "AnghaBench/linux/drivers/block/rsxx/extr_core.c_rsxx_error_detected.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.pci_dev = type { i64, i32 }
@RSXX_EEH_SUPPORT = dso_local local_unnamed_addr global i64 0, align 8
@PCI_ERS_RESULT_NONE = dso_local local_unnamed_addr global i32 0, align 4
@pci_channel_io_perm_failure = dso_local local_unnamed_addr global i32 0, align 4
@PCI_ERS_RESULT_DISCONNECT = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"Slot reset setup failed\0A\00", align 1
@PCI_ERS_RESULT_NEED_RESET = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @rsxx_error_detected], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @rsxx_error_detected(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = load i64, ptr @RSXX_EEH_SUPPORT, align 8, !tbaa !11
%5 = icmp slt i64 %3, %4
br i1 %5, label %17, label %6
6: ; preds = %2
%7 = load i32, ptr @pci_channel_io_perm_failure, align 4, !tbaa !12
%8 = icmp eq i32 %7, %1
br i1 %8, label %15, label %9
9: ; preds = %6
%10 = tail call i32 @rsxx_eeh_frozen(ptr noundef nonnull %0) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %17, label %12
12: ; preds = %9
%13 = getelementptr inbounds %struct.pci_dev, ptr %0, i64 0, i32 1
%14 = tail call i32 @dev_err(ptr noundef nonnull %13, ptr noundef nonnull @.str) #2
br label %15
15: ; preds = %6, %12
%16 = tail call i32 @rsxx_eeh_failure(ptr noundef nonnull %0) #2
br label %17
17: ; preds = %15, %9, %2
%18 = phi ptr [ @PCI_ERS_RESULT_NONE, %2 ], [ @PCI_ERS_RESULT_NEED_RESET, %9 ], [ @PCI_ERS_RESULT_DISCONNECT, %15 ]
%19 = load i32, ptr %18, align 4, !tbaa !12
ret i32 %19
}
declare i32 @rsxx_eeh_failure(ptr noundef) local_unnamed_addr #1
declare i32 @rsxx_eeh_frozen(ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"pci_dev", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!10, !10, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/block/rsxx/extr_core.c_rsxx_error_detected.c'
source_filename = "AnghaBench/linux/drivers/block/rsxx/extr_core.c_rsxx_error_detected.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@RSXX_EEH_SUPPORT = common local_unnamed_addr global i64 0, align 8
@PCI_ERS_RESULT_NONE = common local_unnamed_addr global i32 0, align 4
@pci_channel_io_perm_failure = common local_unnamed_addr global i32 0, align 4
@PCI_ERS_RESULT_DISCONNECT = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"Slot reset setup failed\0A\00", align 1
@PCI_ERS_RESULT_NEED_RESET = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @rsxx_error_detected], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @rsxx_error_detected(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = load i64, ptr @RSXX_EEH_SUPPORT, align 8, !tbaa !12
%5 = icmp slt i64 %3, %4
br i1 %5, label %17, label %6
6: ; preds = %2
%7 = load i32, ptr @pci_channel_io_perm_failure, align 4, !tbaa !13
%8 = icmp eq i32 %7, %1
br i1 %8, label %15, label %9
9: ; preds = %6
%10 = tail call i32 @rsxx_eeh_frozen(ptr noundef nonnull %0) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %17, label %12
12: ; preds = %9
%13 = getelementptr inbounds i8, ptr %0, i64 8
%14 = tail call i32 @dev_err(ptr noundef nonnull %13, ptr noundef nonnull @.str) #2
br label %15
15: ; preds = %6, %12
%16 = tail call i32 @rsxx_eeh_failure(ptr noundef nonnull %0) #2
br label %17
17: ; preds = %15, %9, %2
%18 = phi ptr [ @PCI_ERS_RESULT_NONE, %2 ], [ @PCI_ERS_RESULT_NEED_RESET, %9 ], [ @PCI_ERS_RESULT_DISCONNECT, %15 ]
%19 = load i32, ptr %18, align 4, !tbaa !13
ret i32 %19
}
declare i32 @rsxx_eeh_failure(ptr noundef) local_unnamed_addr #1
declare i32 @rsxx_eeh_frozen(ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"pci_dev", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!11, !11, i64 0}
| linux_drivers_block_rsxx_extr_core.c_rsxx_error_detected |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/extr_i915_perf.c_i915_perf_enable_locked.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/extr_i915_perf.c_i915_perf_enable_locked.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.i915_perf_stream = type { i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @i915_perf_enable_locked], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @i915_perf_enable_locked(ptr noundef %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !5
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
store i32 1, ptr %0, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.i915_perf_stream, ptr %0, i64 0, i32 1
%6 = load ptr, ptr %5, align 8, !tbaa !11
%7 = load ptr, ptr %6, align 8, !tbaa !12
%8 = icmp eq ptr %7, null
br i1 %8, label %11, label %9
9: ; preds = %4
%10 = tail call i32 %7(ptr noundef nonnull %0) #1
br label %11
11: ; preds = %1, %9, %4
ret void
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"i915_perf_stream", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!13, !10, i64 0}
!13 = !{!"TYPE_2__", !10, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/extr_i915_perf.c_i915_perf_enable_locked.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/extr_i915_perf.c_i915_perf_enable_locked.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @i915_perf_enable_locked], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @i915_perf_enable_locked(ptr noundef %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !6
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
store i32 1, ptr %0, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !12
%7 = load ptr, ptr %6, align 8, !tbaa !13
%8 = icmp eq ptr %7, null
br i1 %8, label %11, label %9
9: ; preds = %4
%10 = tail call i32 %7(ptr noundef nonnull %0) #1
br label %11
11: ; preds = %1, %9, %4
ret void
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"i915_perf_stream", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!14, !11, i64 0}
!14 = !{!"TYPE_2__", !11, i64 0}
| linux_drivers_gpu_drm_i915_extr_i915_perf.c_i915_perf_enable_locked |
; ModuleID = 'AnghaBench/TDengine/src/os/darwin/src/extr_tdarwin.c_taosSkipSocketCheck.c'
source_filename = "AnghaBench/TDengine/src/os/darwin/src/extr_tdarwin.c_taosSkipSocketCheck.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i32 @taosSkipSocketCheck() local_unnamed_addr #0 {
ret i32 1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/TDengine/src/os/darwin/src/extr_tdarwin.c_taosSkipSocketCheck.c'
source_filename = "AnghaBench/TDengine/src/os/darwin/src/extr_tdarwin.c_taosSkipSocketCheck.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef i32 @taosSkipSocketCheck() local_unnamed_addr #0 {
ret i32 1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| TDengine_src_os_darwin_src_extr_tdarwin.c_taosSkipSocketCheck |
; ModuleID = 'AnghaBench/fastsocket/kernel/net/sunrpc/extr_svc.c_svc_pool_map_get.c'
source_filename = "AnghaBench/fastsocket/kernel/net/sunrpc/extr_svc.c_svc_pool_map_get.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.svc_pool_map = type { i32, i32, i32 }
@svc_pool_map = dso_local global %struct.svc_pool_map zeroinitializer, align 4
@svc_pool_map_mutex = dso_local global i32 0, align 4
@SVC_POOL_AUTO = dso_local local_unnamed_addr global i32 0, align 4
@SVC_POOL_GLOBAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @svc_pool_map_get], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @svc_pool_map_get() #0 {
%1 = tail call i32 @mutex_lock(ptr noundef nonnull @svc_pool_map_mutex) #2
%2 = load i32, ptr getelementptr inbounds (%struct.svc_pool_map, ptr @svc_pool_map, i64 0, i32 2), align 4, !tbaa !5
%3 = add nsw i32 %2, 1
store i32 %3, ptr getelementptr inbounds (%struct.svc_pool_map, ptr @svc_pool_map, i64 0, i32 2), align 4, !tbaa !5
%4 = icmp eq i32 %2, 0
br i1 %4, label %5, label %24
5: ; preds = %0
%6 = load i32, ptr getelementptr inbounds (%struct.svc_pool_map, ptr @svc_pool_map, i64 0, i32 1), align 4, !tbaa !10
%7 = load i32, ptr @SVC_POOL_AUTO, align 4, !tbaa !11
%8 = icmp eq i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %5
%10 = tail call i32 (...) @svc_pool_map_choose_mode() #2
store i32 %10, ptr getelementptr inbounds (%struct.svc_pool_map, ptr @svc_pool_map, i64 0, i32 1), align 4, !tbaa !10
br label %11
11: ; preds = %9, %5
%12 = phi i32 [ %10, %9 ], [ %6, %5 ]
switch i32 %12, label %20 [
i32 129, label %13
i32 128, label %15
]
13: ; preds = %11
%14 = tail call i32 @svc_pool_map_init_percpu(ptr noundef nonnull @svc_pool_map) #2
br label %17
15: ; preds = %11
%16 = tail call i32 @svc_pool_map_init_pernode(ptr noundef nonnull @svc_pool_map) #2
br label %17
17: ; preds = %15, %13
%18 = phi i32 [ %16, %15 ], [ %14, %13 ]
%19 = icmp slt i32 %18, 0
br i1 %19, label %20, label %22
20: ; preds = %11, %17
%21 = load i32, ptr @SVC_POOL_GLOBAL, align 4, !tbaa !11
store i32 %21, ptr getelementptr inbounds (%struct.svc_pool_map, ptr @svc_pool_map, i64 0, i32 1), align 4, !tbaa !10
br label %22
22: ; preds = %20, %17
%23 = phi i32 [ 1, %20 ], [ %18, %17 ]
store i32 %23, ptr @svc_pool_map, align 4, !tbaa !12
br label %24
24: ; preds = %0, %22
%25 = tail call i32 @mutex_unlock(ptr noundef nonnull @svc_pool_map_mutex) #2
%26 = load i32, ptr @svc_pool_map, align 4, !tbaa !12
ret i32 %26
}
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @svc_pool_map_choose_mode(...) local_unnamed_addr #1
declare i32 @svc_pool_map_init_percpu(ptr noundef) local_unnamed_addr #1
declare i32 @svc_pool_map_init_pernode(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"svc_pool_map", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/sunrpc/extr_svc.c_svc_pool_map_get.c'
source_filename = "AnghaBench/fastsocket/kernel/net/sunrpc/extr_svc.c_svc_pool_map_get.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.svc_pool_map = type { i32, i32, i32 }
@svc_pool_map = common global %struct.svc_pool_map zeroinitializer, align 4
@svc_pool_map_mutex = common global i32 0, align 4
@SVC_POOL_AUTO = common local_unnamed_addr global i32 0, align 4
@SVC_POOL_GLOBAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @svc_pool_map_get], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @svc_pool_map_get() #0 {
%1 = tail call i32 @mutex_lock(ptr noundef nonnull @svc_pool_map_mutex) #2
%2 = load i32, ptr getelementptr inbounds (i8, ptr @svc_pool_map, i64 8), align 4, !tbaa !6
%3 = add nsw i32 %2, 1
store i32 %3, ptr getelementptr inbounds (i8, ptr @svc_pool_map, i64 8), align 4, !tbaa !6
%4 = icmp eq i32 %2, 0
br i1 %4, label %5, label %24
5: ; preds = %0
%6 = load i32, ptr getelementptr inbounds (i8, ptr @svc_pool_map, i64 4), align 4, !tbaa !11
%7 = load i32, ptr @SVC_POOL_AUTO, align 4, !tbaa !12
%8 = icmp eq i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %5
%10 = tail call i32 @svc_pool_map_choose_mode() #2
store i32 %10, ptr getelementptr inbounds (i8, ptr @svc_pool_map, i64 4), align 4, !tbaa !11
br label %11
11: ; preds = %9, %5
%12 = phi i32 [ %10, %9 ], [ %6, %5 ]
switch i32 %12, label %20 [
i32 129, label %13
i32 128, label %15
]
13: ; preds = %11
%14 = tail call i32 @svc_pool_map_init_percpu(ptr noundef nonnull @svc_pool_map) #2
br label %17
15: ; preds = %11
%16 = tail call i32 @svc_pool_map_init_pernode(ptr noundef nonnull @svc_pool_map) #2
br label %17
17: ; preds = %15, %13
%18 = phi i32 [ %16, %15 ], [ %14, %13 ]
%19 = icmp slt i32 %18, 0
br i1 %19, label %20, label %22
20: ; preds = %11, %17
%21 = load i32, ptr @SVC_POOL_GLOBAL, align 4, !tbaa !12
store i32 %21, ptr getelementptr inbounds (i8, ptr @svc_pool_map, i64 4), align 4, !tbaa !11
br label %22
22: ; preds = %20, %17
%23 = phi i32 [ 1, %20 ], [ %18, %17 ]
store i32 %23, ptr @svc_pool_map, align 4, !tbaa !13
br label %24
24: ; preds = %0, %22
%25 = tail call i32 @mutex_unlock(ptr noundef nonnull @svc_pool_map_mutex) #2
%26 = load i32, ptr @svc_pool_map, align 4, !tbaa !13
ret i32 %26
}
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @svc_pool_map_choose_mode(...) local_unnamed_addr #1
declare i32 @svc_pool_map_init_percpu(ptr noundef) local_unnamed_addr #1
declare i32 @svc_pool_map_init_pernode(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"svc_pool_map", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !8, i64 0}
| fastsocket_kernel_net_sunrpc_extr_svc.c_svc_pool_map_get |
; ModuleID = 'AnghaBench/freebsd/sys/netsmb/extr_smb_conn.c_smb_co_gone.c'
source_filename = "AnghaBench/freebsd/sys/netsmb/extr_smb_conn.c_smb_co_gone.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.smb_connobj = type { ptr, i32, i32, ptr, ptr }
@smb_connobj = dso_local local_unnamed_addr global i32 0, align 4
@co_next = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @smb_co_gone], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @smb_co_gone(ptr noundef %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds %struct.smb_connobj, ptr %0, i64 0, i32 4
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = icmp eq ptr %4, null
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 %4(ptr noundef nonnull %0, ptr noundef %1) #2
br label %8
8: ; preds = %6, %2
%9 = getelementptr inbounds %struct.smb_connobj, ptr %0, i64 0, i32 3
%10 = load ptr, ptr %9, align 8, !tbaa !11
%11 = icmp eq ptr %10, null
br i1 %11, label %22, label %12
12: ; preds = %8
%13 = getelementptr inbounds %struct.smb_connobj, ptr %10, i64 0, i32 2
%14 = tail call i32 @sx_xlock(ptr noundef nonnull %13) #2
%15 = tail call i32 @smb_co_lock(ptr noundef nonnull %10) #2
%16 = tail call i32 @sx_unlock(ptr noundef nonnull %13) #2
%17 = getelementptr inbounds %struct.smb_connobj, ptr %10, i64 0, i32 1
%18 = load i32, ptr @smb_connobj, align 4, !tbaa !12
%19 = load i32, ptr @co_next, align 4, !tbaa !12
%20 = tail call i32 @SLIST_REMOVE(ptr noundef nonnull %17, ptr noundef nonnull %0, i32 noundef %18, i32 noundef %19) #2
%21 = tail call i32 @smb_co_put(ptr noundef nonnull %10, ptr noundef %1) #2
br label %22
22: ; preds = %12, %8
%23 = load ptr, ptr %0, align 8, !tbaa !13
%24 = icmp eq ptr %23, null
br i1 %24, label %27, label %25
25: ; preds = %22
%26 = tail call i32 %23(ptr noundef nonnull %0) #2
br label %27
27: ; preds = %25, %22
ret void
}
declare i32 @sx_xlock(ptr noundef) local_unnamed_addr #1
declare i32 @smb_co_lock(ptr noundef) local_unnamed_addr #1
declare i32 @sx_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @SLIST_REMOVE(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @smb_co_put(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 24}
!6 = !{!"smb_connobj", !7, i64 0, !10, i64 8, !10, i64 12, !7, i64 16, !7, i64 24}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !7, i64 16}
!12 = !{!10, !10, i64 0}
!13 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/netsmb/extr_smb_conn.c_smb_co_gone.c'
source_filename = "AnghaBench/freebsd/sys/netsmb/extr_smb_conn.c_smb_co_gone.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@smb_connobj = common local_unnamed_addr global i32 0, align 4
@co_next = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @smb_co_gone], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @smb_co_gone(ptr noundef %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 24
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = icmp eq ptr %4, null
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 %4(ptr noundef nonnull %0, ptr noundef %1) #2
br label %8
8: ; preds = %6, %2
%9 = getelementptr inbounds i8, ptr %0, i64 16
%10 = load ptr, ptr %9, align 8, !tbaa !12
%11 = icmp eq ptr %10, null
br i1 %11, label %22, label %12
12: ; preds = %8
%13 = getelementptr inbounds i8, ptr %10, i64 12
%14 = tail call i32 @sx_xlock(ptr noundef nonnull %13) #2
%15 = tail call i32 @smb_co_lock(ptr noundef nonnull %10) #2
%16 = tail call i32 @sx_unlock(ptr noundef nonnull %13) #2
%17 = getelementptr inbounds i8, ptr %10, i64 8
%18 = load i32, ptr @smb_connobj, align 4, !tbaa !13
%19 = load i32, ptr @co_next, align 4, !tbaa !13
%20 = tail call i32 @SLIST_REMOVE(ptr noundef nonnull %17, ptr noundef nonnull %0, i32 noundef %18, i32 noundef %19) #2
%21 = tail call i32 @smb_co_put(ptr noundef nonnull %10, ptr noundef %1) #2
br label %22
22: ; preds = %12, %8
%23 = load ptr, ptr %0, align 8, !tbaa !14
%24 = icmp eq ptr %23, null
br i1 %24, label %27, label %25
25: ; preds = %22
%26 = tail call i32 %23(ptr noundef nonnull %0) #2
br label %27
27: ; preds = %25, %22
ret void
}
declare i32 @sx_xlock(ptr noundef) local_unnamed_addr #1
declare i32 @smb_co_lock(ptr noundef) local_unnamed_addr #1
declare i32 @sx_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @SLIST_REMOVE(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @smb_co_put(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 24}
!7 = !{!"smb_connobj", !8, i64 0, !11, i64 8, !11, i64 12, !8, i64 16, !8, i64 24}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !8, i64 16}
!13 = !{!11, !11, i64 0}
!14 = !{!7, !8, i64 0}
| freebsd_sys_netsmb_extr_smb_conn.c_smb_co_gone |
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/engines/extr_e_capi_err.c_ERR_CAPI_error.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/engines/extr_e_capi_err.c_ERR_CAPI_error.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@lib_code = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @ERR_CAPI_error], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ERR_CAPI_error(i32 noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = load i64, ptr @lib_code, align 8, !tbaa !5
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = tail call i64 (...) @ERR_get_next_error_library() #2
store i64 %8, ptr @lib_code, align 8, !tbaa !5
br label %9
9: ; preds = %7, %4
%10 = phi i64 [ %8, %7 ], [ %5, %4 ]
%11 = tail call i32 @ERR_PUT_error(i64 noundef %10, i32 noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #2
ret void
}
declare i64 @ERR_get_next_error_library(...) local_unnamed_addr #1
declare i32 @ERR_PUT_error(i64 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/crypto/openssl/engines/extr_e_capi_err.c_ERR_CAPI_error.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/engines/extr_e_capi_err.c_ERR_CAPI_error.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@lib_code = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @ERR_CAPI_error], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ERR_CAPI_error(i32 noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = load i64, ptr @lib_code, align 8, !tbaa !6
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = tail call i64 @ERR_get_next_error_library() #2
store i64 %8, ptr @lib_code, align 8, !tbaa !6
br label %9
9: ; preds = %7, %4
%10 = phi i64 [ %8, %7 ], [ %5, %4 ]
%11 = tail call i32 @ERR_PUT_error(i64 noundef %10, i32 noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #2
ret void
}
declare i64 @ERR_get_next_error_library(...) local_unnamed_addr #1
declare i32 @ERR_PUT_error(i64 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_crypto_openssl_engines_extr_e_capi_err.c_ERR_CAPI_error |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_lvds.c_intel_lvds_destroy.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_lvds.c_intel_lvds_destroy.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.intel_lvds_connector = type { %struct.TYPE_3__, %struct.TYPE_4__ }
%struct.TYPE_3__ = type { i32, ptr }
%struct.TYPE_4__ = type { i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @intel_lvds_destroy], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @intel_lvds_destroy(ptr noundef %0) #0 {
%2 = tail call ptr @to_lvds_connector(ptr noundef %0) #2
%3 = getelementptr inbounds %struct.intel_lvds_connector, ptr %2, i64 0, i32 1
%4 = load i64, ptr %3, align 8, !tbaa !5
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @acpi_lid_notifier_unregister(ptr noundef nonnull %3) #2
br label %8
8: ; preds = %6, %1
%9 = getelementptr inbounds %struct.TYPE_3__, ptr %2, i64 0, i32 1
%10 = load ptr, ptr %9, align 8, !tbaa !14
%11 = tail call i32 @IS_ERR_OR_NULL(ptr noundef %10) #2
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %8
%14 = load ptr, ptr %9, align 8, !tbaa !14
%15 = tail call i32 @kfree(ptr noundef %14) #2
br label %16
16: ; preds = %13, %8
%17 = tail call i32 @intel_panel_fini(ptr noundef nonnull %2) #2
%18 = tail call i32 @drm_sysfs_connector_remove(ptr noundef %0) #2
%19 = tail call i32 @drm_connector_cleanup(ptr noundef %0) #2
%20 = tail call i32 @kfree(ptr noundef %0) #2
ret void
}
declare ptr @to_lvds_connector(ptr noundef) local_unnamed_addr #1
declare i32 @acpi_lid_notifier_unregister(ptr noundef) local_unnamed_addr #1
declare i32 @IS_ERR_OR_NULL(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
declare i32 @intel_panel_fini(ptr noundef) local_unnamed_addr #1
declare i32 @drm_sysfs_connector_remove(ptr noundef) local_unnamed_addr #1
declare i32 @drm_connector_cleanup(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !13, i64 16}
!6 = !{!"intel_lvds_connector", !7, i64 0, !12, i64 16}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"TYPE_4__", !13, i64 0}
!13 = !{!"long", !9, i64 0}
!14 = !{!6, !11, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_lvds.c_intel_lvds_destroy.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_lvds.c_intel_lvds_destroy.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @intel_lvds_destroy], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @intel_lvds_destroy(ptr noundef %0) #0 {
%2 = tail call ptr @to_lvds_connector(ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %2, i64 16
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @acpi_lid_notifier_unregister(ptr noundef nonnull %3) #2
br label %8
8: ; preds = %6, %1
%9 = getelementptr inbounds i8, ptr %2, i64 8
%10 = load ptr, ptr %9, align 8, !tbaa !15
%11 = tail call i32 @IS_ERR_OR_NULL(ptr noundef %10) #2
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %8
%14 = load ptr, ptr %9, align 8, !tbaa !15
%15 = tail call i32 @kfree(ptr noundef %14) #2
br label %16
16: ; preds = %13, %8
%17 = tail call i32 @intel_panel_fini(ptr noundef nonnull %2) #2
%18 = tail call i32 @drm_sysfs_connector_remove(ptr noundef %0) #2
%19 = tail call i32 @drm_connector_cleanup(ptr noundef %0) #2
%20 = tail call i32 @kfree(ptr noundef %0) #2
ret void
}
declare ptr @to_lvds_connector(ptr noundef) local_unnamed_addr #1
declare i32 @acpi_lid_notifier_unregister(ptr noundef) local_unnamed_addr #1
declare i32 @IS_ERR_OR_NULL(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
declare i32 @intel_panel_fini(ptr noundef) local_unnamed_addr #1
declare i32 @drm_sysfs_connector_remove(ptr noundef) local_unnamed_addr #1
declare i32 @drm_connector_cleanup(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !14, i64 16}
!7 = !{!"intel_lvds_connector", !8, i64 0, !13, i64 16}
!8 = !{!"TYPE_3__", !9, i64 0, !12, i64 8}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!"TYPE_4__", !14, i64 0}
!14 = !{!"long", !10, i64 0}
!15 = !{!7, !12, i64 8}
| fastsocket_kernel_drivers_gpu_drm_i915_extr_intel_lvds.c_intel_lvds_destroy |
; ModuleID = 'AnghaBench/freebsd/sys/dev/smartpqi/extr_smartpqi_discovery.c_pqisrc_scsi_find_entry.c'
source_filename = "AnghaBench/freebsd/sys/dev/smartpqi/extr_smartpqi_discovery.c_pqisrc_scsi_find_entry.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_9__ = type { i64, i32 }
@.str = private unnamed_addr constant [4 x i8] c"IN\0A\00", align 1
@PQI_MAX_DEVICES = dso_local local_unnamed_addr global i32 0, align 4
@PQI_MAX_MULTILUN = dso_local local_unnamed_addr global i32 0, align 4
@DEVICE_CHANGED = dso_local local_unnamed_addr global i32 0, align 4
@DEVICE_UNCHANGED = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [5 x i8] c"OUT\0A\00", align 1
@DEVICE_NOT_FOUND = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @pqisrc_scsi_find_entry], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @pqisrc_scsi_find_entry(ptr nocapture noundef readonly %0, ptr noundef %1, ptr nocapture noundef writeonly %2) #0 {
%4 = tail call i32 @DBG_FUNC(ptr noundef nonnull @.str) #2
%5 = load i32, ptr @PQI_MAX_DEVICES, align 4, !tbaa !5
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %54
7: ; preds = %3
%8 = getelementptr inbounds %struct.TYPE_9__, ptr %1, i64 0, i32 1
%9 = load i32, ptr @PQI_MAX_MULTILUN, align 4, !tbaa !5
br label %10
10: ; preds = %7, %47
%11 = phi i32 [ %5, %7 ], [ %48, %47 ]
%12 = phi i32 [ %9, %7 ], [ %49, %47 ]
%13 = phi i32 [ %9, %7 ], [ %50, %47 ]
%14 = phi i64 [ 0, %7 ], [ %51, %47 ]
%15 = icmp sgt i32 %13, 0
br i1 %15, label %16, label %47
16: ; preds = %10, %40
%17 = phi i32 [ %41, %40 ], [ %12, %10 ]
%18 = phi i64 [ %42, %40 ], [ 0, %10 ]
%19 = load ptr, ptr %0, align 8, !tbaa !9
%20 = getelementptr inbounds ptr, ptr %19, i64 %14
%21 = load ptr, ptr %20, align 8, !tbaa !12
%22 = getelementptr inbounds ptr, ptr %21, i64 %18
%23 = load ptr, ptr %22, align 8, !tbaa !12
%24 = icmp eq ptr %23, null
br i1 %24, label %40, label %25
25: ; preds = %16
%26 = load i32, ptr %8, align 8, !tbaa !13
%27 = getelementptr inbounds %struct.TYPE_9__, ptr %23, i64 0, i32 1
%28 = load i32, ptr %27, align 8, !tbaa !13
%29 = tail call i64 @pqisrc_scsi3addr_equal(i32 noundef %26, i32 noundef %28) #2
%30 = icmp eq i64 %29, 0
br i1 %30, label %31, label %33
31: ; preds = %25
%32 = load i32, ptr @PQI_MAX_MULTILUN, align 4, !tbaa !5
br label %40
33: ; preds = %25
store ptr %23, ptr %2, align 8, !tbaa !12
%34 = tail call i64 @pqisrc_device_equal(ptr noundef nonnull %1, ptr noundef nonnull %23) #2
%35 = icmp eq i64 %34, 0
br i1 %35, label %56, label %36
36: ; preds = %33
%37 = load i64, ptr %1, align 8, !tbaa !16
%38 = icmp eq i64 %37, 0
%39 = select i1 %38, ptr @DEVICE_UNCHANGED, ptr @DEVICE_CHANGED
br label %56
40: ; preds = %31, %16
%41 = phi i32 [ %32, %31 ], [ %17, %16 ]
%42 = add nuw nsw i64 %18, 1
%43 = sext i32 %41 to i64
%44 = icmp slt i64 %42, %43
br i1 %44, label %16, label %45, !llvm.loop !17
45: ; preds = %40
%46 = load i32, ptr @PQI_MAX_DEVICES, align 4, !tbaa !5
br label %47
47: ; preds = %45, %10
%48 = phi i32 [ %46, %45 ], [ %11, %10 ]
%49 = phi i32 [ %41, %45 ], [ %12, %10 ]
%50 = phi i32 [ %41, %45 ], [ %13, %10 ]
%51 = add nuw nsw i64 %14, 1
%52 = sext i32 %48 to i64
%53 = icmp slt i64 %51, %52
br i1 %53, label %10, label %54, !llvm.loop !19
54: ; preds = %47, %3
%55 = tail call i32 @DBG_FUNC(ptr noundef nonnull @.str.1) #2
br label %56
56: ; preds = %33, %36, %54
%57 = phi ptr [ @DEVICE_NOT_FOUND, %54 ], [ %39, %36 ], [ @DEVICE_CHANGED, %33 ]
%58 = load i32, ptr %57, align 4, !tbaa !5
ret i32 %58
}
declare i32 @DBG_FUNC(ptr noundef) local_unnamed_addr #1
declare i64 @pqisrc_scsi3addr_equal(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @pqisrc_device_equal(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_8__", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!14, !6, i64 8}
!14 = !{!"TYPE_9__", !15, i64 0, !6, i64 8}
!15 = !{!"long", !7, i64 0}
!16 = !{!14, !15, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/smartpqi/extr_smartpqi_discovery.c_pqisrc_scsi_find_entry.c'
source_filename = "AnghaBench/freebsd/sys/dev/smartpqi/extr_smartpqi_discovery.c_pqisrc_scsi_find_entry.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [4 x i8] c"IN\0A\00", align 1
@PQI_MAX_DEVICES = common local_unnamed_addr global i32 0, align 4
@PQI_MAX_MULTILUN = common local_unnamed_addr global i32 0, align 4
@DEVICE_CHANGED = common local_unnamed_addr global i32 0, align 4
@DEVICE_UNCHANGED = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [5 x i8] c"OUT\0A\00", align 1
@DEVICE_NOT_FOUND = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @pqisrc_scsi_find_entry], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @pqisrc_scsi_find_entry(ptr nocapture noundef readonly %0, ptr noundef %1, ptr nocapture noundef writeonly %2) #0 {
%4 = tail call i32 @DBG_FUNC(ptr noundef nonnull @.str) #2
%5 = load i32, ptr @PQI_MAX_DEVICES, align 4, !tbaa !6
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %54
7: ; preds = %3
%8 = getelementptr inbounds i8, ptr %1, i64 8
%9 = load i32, ptr @PQI_MAX_MULTILUN, align 4, !tbaa !6
br label %10
10: ; preds = %7, %47
%11 = phi i32 [ %5, %7 ], [ %48, %47 ]
%12 = phi i32 [ %9, %7 ], [ %49, %47 ]
%13 = phi i32 [ %9, %7 ], [ %50, %47 ]
%14 = phi i64 [ 0, %7 ], [ %51, %47 ]
%15 = icmp sgt i32 %13, 0
br i1 %15, label %16, label %47
16: ; preds = %10, %40
%17 = phi i32 [ %41, %40 ], [ %12, %10 ]
%18 = phi i64 [ %42, %40 ], [ 0, %10 ]
%19 = load ptr, ptr %0, align 8, !tbaa !10
%20 = getelementptr inbounds ptr, ptr %19, i64 %14
%21 = load ptr, ptr %20, align 8, !tbaa !13
%22 = getelementptr inbounds ptr, ptr %21, i64 %18
%23 = load ptr, ptr %22, align 8, !tbaa !13
%24 = icmp eq ptr %23, null
br i1 %24, label %40, label %25
25: ; preds = %16
%26 = load i32, ptr %8, align 8, !tbaa !14
%27 = getelementptr inbounds i8, ptr %23, i64 8
%28 = load i32, ptr %27, align 8, !tbaa !14
%29 = tail call i64 @pqisrc_scsi3addr_equal(i32 noundef %26, i32 noundef %28) #2
%30 = icmp eq i64 %29, 0
br i1 %30, label %31, label %33
31: ; preds = %25
%32 = load i32, ptr @PQI_MAX_MULTILUN, align 4, !tbaa !6
br label %40
33: ; preds = %25
store ptr %23, ptr %2, align 8, !tbaa !13
%34 = tail call i64 @pqisrc_device_equal(ptr noundef nonnull %1, ptr noundef nonnull %23) #2
%35 = icmp eq i64 %34, 0
br i1 %35, label %56, label %36
36: ; preds = %33
%37 = load i64, ptr %1, align 8, !tbaa !17
%38 = icmp eq i64 %37, 0
%39 = select i1 %38, ptr @DEVICE_UNCHANGED, ptr @DEVICE_CHANGED
br label %56
40: ; preds = %31, %16
%41 = phi i32 [ %32, %31 ], [ %17, %16 ]
%42 = add nuw nsw i64 %18, 1
%43 = sext i32 %41 to i64
%44 = icmp slt i64 %42, %43
br i1 %44, label %16, label %45, !llvm.loop !18
45: ; preds = %40
%46 = load i32, ptr @PQI_MAX_DEVICES, align 4, !tbaa !6
br label %47
47: ; preds = %45, %10
%48 = phi i32 [ %46, %45 ], [ %11, %10 ]
%49 = phi i32 [ %41, %45 ], [ %12, %10 ]
%50 = phi i32 [ %41, %45 ], [ %13, %10 ]
%51 = add nuw nsw i64 %14, 1
%52 = sext i32 %48 to i64
%53 = icmp slt i64 %51, %52
br i1 %53, label %10, label %54, !llvm.loop !20
54: ; preds = %47, %3
%55 = tail call i32 @DBG_FUNC(ptr noundef nonnull @.str.1) #2
br label %56
56: ; preds = %33, %36, %54
%57 = phi ptr [ @DEVICE_NOT_FOUND, %54 ], [ %39, %36 ], [ @DEVICE_CHANGED, %33 ]
%58 = load i32, ptr %57, align 4, !tbaa !6
ret i32 %58
}
declare i32 @DBG_FUNC(ptr noundef) local_unnamed_addr #1
declare i64 @pqisrc_scsi3addr_equal(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @pqisrc_device_equal(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_8__", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!15, !7, i64 8}
!15 = !{!"TYPE_9__", !16, i64 0, !7, i64 8}
!16 = !{!"long", !8, i64 0}
!17 = !{!15, !16, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = distinct !{!20, !19}
| freebsd_sys_dev_smartpqi_extr_smartpqi_discovery.c_pqisrc_scsi_find_entry |
; ModuleID = 'AnghaBench/php-src/ext/spl/extr_spl_heap.c_spl_ptr_heap_cmp_cb_helper.c'
source_filename = "AnghaBench/php-src/ext/spl/extr_spl_heap.c_spl_ptr_heap_cmp_cb_helper.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32 }
@.str = private unnamed_addr constant [8 x i8] c"compare\00", align 1
@exception = dso_local local_unnamed_addr global i32 0, align 4
@FAILURE = dso_local local_unnamed_addr global i32 0, align 4
@SUCCESS = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @spl_ptr_heap_cmp_cb_helper], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @spl_ptr_heap_cmp_cb_helper(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr nocapture noundef writeonly %4) #0 {
%6 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
%7 = tail call i32 @Z_OBJ_P(ptr noundef %0) #3
%8 = getelementptr inbounds %struct.TYPE_5__, ptr %1, i64 0, i32 1
%9 = load i32, ptr %8, align 4, !tbaa !5
%10 = call i32 @zend_call_method_with_2_params(i32 noundef %7, i32 noundef %9, ptr noundef %1, ptr noundef nonnull @.str, ptr noundef nonnull %6, ptr noundef %2, ptr noundef %3) #3
%11 = load i32, ptr @exception, align 4, !tbaa !11
%12 = call i64 @EG(i32 noundef %11) #3
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %5
%15 = call i32 @zval_get_long(ptr noundef nonnull %6) #3
store i32 %15, ptr %4, align 4, !tbaa !11
%16 = call i32 @zval_ptr_dtor(ptr noundef nonnull %6) #3
br label %17
17: ; preds = %5, %14
%18 = phi ptr [ @SUCCESS, %14 ], [ @FAILURE, %5 ]
%19 = load i32, ptr %18, align 4, !tbaa !11
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
ret i32 %19
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @zend_call_method_with_2_params(i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @Z_OBJ_P(ptr noundef) local_unnamed_addr #2
declare i64 @EG(i32 noundef) local_unnamed_addr #2
declare i32 @zval_get_long(ptr noundef) local_unnamed_addr #2
declare i32 @zval_ptr_dtor(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"TYPE_5__", !7, i64 0, !10, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_4__", !7, i64 0}
!11 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/php-src/ext/spl/extr_spl_heap.c_spl_ptr_heap_cmp_cb_helper.c'
source_filename = "AnghaBench/php-src/ext/spl/extr_spl_heap.c_spl_ptr_heap_cmp_cb_helper.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [8 x i8] c"compare\00", align 1
@exception = common local_unnamed_addr global i32 0, align 4
@FAILURE = common local_unnamed_addr global i32 0, align 4
@SUCCESS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @spl_ptr_heap_cmp_cb_helper], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @spl_ptr_heap_cmp_cb_helper(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr nocapture noundef writeonly %4) #0 {
%6 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
%7 = tail call i32 @Z_OBJ_P(ptr noundef %0) #3
%8 = getelementptr inbounds i8, ptr %1, i64 4
%9 = load i32, ptr %8, align 4, !tbaa !6
%10 = call i32 @zend_call_method_with_2_params(i32 noundef %7, i32 noundef %9, ptr noundef %1, ptr noundef nonnull @.str, ptr noundef nonnull %6, ptr noundef %2, ptr noundef %3) #3
%11 = load i32, ptr @exception, align 4, !tbaa !12
%12 = call i64 @EG(i32 noundef %11) #3
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %5
%15 = call i32 @zval_get_long(ptr noundef nonnull %6) #3
store i32 %15, ptr %4, align 4, !tbaa !12
%16 = call i32 @zval_ptr_dtor(ptr noundef nonnull %6) #3
br label %17
17: ; preds = %5, %14
%18 = phi ptr [ @SUCCESS, %14 ], [ @FAILURE, %5 ]
%19 = load i32, ptr %18, align 4, !tbaa !12
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
ret i32 %19
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @zend_call_method_with_2_params(i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @Z_OBJ_P(ptr noundef) local_unnamed_addr #2
declare i64 @EG(i32 noundef) local_unnamed_addr #2
declare i32 @zval_get_long(ptr noundef) local_unnamed_addr #2
declare i32 @zval_ptr_dtor(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"TYPE_5__", !8, i64 0, !11, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_4__", !8, i64 0}
!12 = !{!8, !8, i64 0}
| php-src_ext_spl_extr_spl_heap.c_spl_ptr_heap_cmp_cb_helper |
; ModuleID = 'AnghaBench/freebsd/sys/dev/uart/extr_uart_kbd_sun.c_sunkbd_check.c'
source_filename = "AnghaBench/freebsd/sys/dev/uart/extr_uart_kbd_sun.c_sunkbd_check.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sunkbd_softc = type { i64, ptr, ptr, i64, ptr }
@FALSE = dso_local local_unnamed_addr global i32 0, align 4
@TRUE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sunkbd_check], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @sunkbd_check(ptr noundef %0) #0 {
%2 = tail call i32 @KBD_IS_ACTIVE(ptr noundef %0) #2
%3 = icmp eq i32 %2, 0
br i1 %3, label %26, label %4
4: ; preds = %1
%5 = getelementptr inbounds %struct.sunkbd_softc, ptr %0, i64 0, i32 3
%6 = load i64, ptr %5, align 8, !tbaa !5
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %26
8: ; preds = %4
%9 = getelementptr inbounds %struct.sunkbd_softc, ptr %0, i64 0, i32 2
%10 = load ptr, ptr %9, align 8, !tbaa !11
%11 = icmp eq ptr %10, null
br i1 %11, label %15, label %12
12: ; preds = %8
%13 = tail call i32 @uart_rx_empty(ptr noundef nonnull %10) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %26, label %15
15: ; preds = %12, %8
%16 = load i64, ptr %0, align 8, !tbaa !12
%17 = icmp eq i64 %16, 0
br i1 %17, label %25, label %18
18: ; preds = %15
%19 = getelementptr inbounds %struct.sunkbd_softc, ptr %0, i64 0, i32 1
%20 = load ptr, ptr %19, align 8, !tbaa !13
%21 = icmp eq ptr %20, null
br i1 %21, label %25, label %22
22: ; preds = %18
%23 = tail call i64 @uart_rxready(ptr noundef nonnull %20) #2
%24 = icmp eq i64 %23, 0
br i1 %24, label %25, label %26
25: ; preds = %22, %18, %15
br label %26
26: ; preds = %22, %12, %4, %1, %25
%27 = phi ptr [ @FALSE, %25 ], [ @FALSE, %1 ], [ @TRUE, %4 ], [ @TRUE, %12 ], [ @TRUE, %22 ]
%28 = load i32, ptr %27, align 4, !tbaa !14
ret i32 %28
}
declare i32 @KBD_IS_ACTIVE(ptr noundef) local_unnamed_addr #1
declare i32 @uart_rx_empty(ptr noundef) local_unnamed_addr #1
declare i64 @uart_rxready(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 24}
!6 = !{!"sunkbd_softc", !7, i64 0, !10, i64 8, !10, i64 16, !7, i64 24, !10, i64 32}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 16}
!12 = !{!6, !7, i64 0}
!13 = !{!6, !10, i64 8}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/uart/extr_uart_kbd_sun.c_sunkbd_check.c'
source_filename = "AnghaBench/freebsd/sys/dev/uart/extr_uart_kbd_sun.c_sunkbd_check.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FALSE = common local_unnamed_addr global i32 0, align 4
@TRUE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sunkbd_check], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @sunkbd_check(ptr noundef %0) #0 {
%2 = tail call i32 @KBD_IS_ACTIVE(ptr noundef %0) #2
%3 = icmp eq i32 %2, 0
br i1 %3, label %26, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, ptr %0, i64 24
%6 = load i64, ptr %5, align 8, !tbaa !6
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %26
8: ; preds = %4
%9 = getelementptr inbounds i8, ptr %0, i64 16
%10 = load ptr, ptr %9, align 8, !tbaa !12
%11 = icmp eq ptr %10, null
br i1 %11, label %15, label %12
12: ; preds = %8
%13 = tail call i32 @uart_rx_empty(ptr noundef nonnull %10) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %26, label %15
15: ; preds = %12, %8
%16 = load i64, ptr %0, align 8, !tbaa !13
%17 = icmp eq i64 %16, 0
br i1 %17, label %25, label %18
18: ; preds = %15
%19 = getelementptr inbounds i8, ptr %0, i64 8
%20 = load ptr, ptr %19, align 8, !tbaa !14
%21 = icmp eq ptr %20, null
br i1 %21, label %25, label %22
22: ; preds = %18
%23 = tail call i64 @uart_rxready(ptr noundef nonnull %20) #2
%24 = icmp eq i64 %23, 0
br i1 %24, label %25, label %26
25: ; preds = %22, %18, %15
br label %26
26: ; preds = %22, %12, %4, %1, %25
%27 = phi ptr [ @FALSE, %25 ], [ @FALSE, %1 ], [ @TRUE, %4 ], [ @TRUE, %12 ], [ @TRUE, %22 ]
%28 = load i32, ptr %27, align 4, !tbaa !15
ret i32 %28
}
declare i32 @KBD_IS_ACTIVE(ptr noundef) local_unnamed_addr #1
declare i32 @uart_rx_empty(ptr noundef) local_unnamed_addr #1
declare i64 @uart_rxready(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 24}
!7 = !{!"sunkbd_softc", !8, i64 0, !11, i64 8, !11, i64 16, !8, i64 24, !11, i64 32}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 16}
!13 = !{!7, !8, i64 0}
!14 = !{!7, !11, i64 8}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !9, i64 0}
| freebsd_sys_dev_uart_extr_uart_kbd_sun.c_sunkbd_check |
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/ext4/extr_ext4_jbd2.h_ext4_handle_is_aborted.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/ext4/extr_ext4_jbd2.h_ext4_handle_is_aborted.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @ext4_handle_is_aborted], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @ext4_handle_is_aborted(ptr noundef %0) #0 {
%2 = tail call i64 @ext4_handle_valid(ptr noundef %0) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @is_handle_aborted(ptr noundef %0) #2
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ %5, %4 ], [ 0, %1 ]
ret i32 %7
}
declare i64 @ext4_handle_valid(ptr noundef) local_unnamed_addr #1
declare i32 @is_handle_aborted(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/fs/ext4/extr_ext4_jbd2.h_ext4_handle_is_aborted.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/ext4/extr_ext4_jbd2.h_ext4_handle_is_aborted.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ext4_handle_is_aborted], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @ext4_handle_is_aborted(ptr noundef %0) #0 {
%2 = tail call i64 @ext4_handle_valid(ptr noundef %0) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @is_handle_aborted(ptr noundef %0) #2
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ %5, %4 ], [ 0, %1 ]
ret i32 %7
}
declare i64 @ext4_handle_valid(ptr noundef) local_unnamed_addr #1
declare i32 @is_handle_aborted(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_fs_ext4_extr_ext4_jbd2.h_ext4_handle_is_aborted |
; ModuleID = 'AnghaBench/darwin-xnu/libsyscall/mach/extr_thread_act.c_thread_policy_set.c'
source_filename = "AnghaBench/darwin-xnu/libsyscall/mach/extr_thread_act.c_thread_policy_set.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@KERN_SUCCESS = dso_local local_unnamed_addr global i64 0, align 8
@KERN_POLICY_STATIC = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i64 @thread_policy_set(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = tail call i64 @_kernelrpc_thread_policy_set(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #2
%6 = load i64, ptr @KERN_SUCCESS, align 8, !tbaa !5
%7 = icmp eq i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %4
%9 = tail call i32 @_pthread_clear_qos_tsd(i32 noundef %0) #2
br label %14
10: ; preds = %4
%11 = load i64, ptr @KERN_POLICY_STATIC, align 8, !tbaa !5
%12 = icmp eq i64 %5, %11
%13 = select i1 %12, i64 %6, i64 %5
br label %14
14: ; preds = %10, %8
%15 = phi i64 [ %5, %8 ], [ %13, %10 ]
ret i64 %15
}
declare i64 @_kernelrpc_thread_policy_set(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @_pthread_clear_qos_tsd(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/darwin-xnu/libsyscall/mach/extr_thread_act.c_thread_policy_set.c'
source_filename = "AnghaBench/darwin-xnu/libsyscall/mach/extr_thread_act.c_thread_policy_set.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@KERN_SUCCESS = common local_unnamed_addr global i64 0, align 8
@KERN_POLICY_STATIC = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @thread_policy_set(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = tail call i64 @_kernelrpc_thread_policy_set(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #2
%6 = load i64, ptr @KERN_SUCCESS, align 8, !tbaa !6
%7 = icmp eq i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %4
%9 = tail call i32 @_pthread_clear_qos_tsd(i32 noundef %0) #2
br label %14
10: ; preds = %4
%11 = load i64, ptr @KERN_POLICY_STATIC, align 8, !tbaa !6
%12 = icmp eq i64 %5, %11
%13 = select i1 %12, i64 %6, i64 %5
br label %14
14: ; preds = %10, %8
%15 = phi i64 [ %5, %8 ], [ %13, %10 ]
ret i64 %15
}
declare i64 @_kernelrpc_thread_policy_set(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @_pthread_clear_qos_tsd(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| darwin-xnu_libsyscall_mach_extr_thread_act.c_thread_policy_set |
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/ipc/extr_ipc_port.c_ipc_port_copy_send.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/ipc/extr_ipc_port.c_ipc_port_copy_send.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@IP_DEAD = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local ptr @ipc_port_copy_send(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @IP_VALID(ptr noundef %0) #2
%3 = icmp eq i32 %2, 0
br i1 %3, label %21, label %4
4: ; preds = %1
%5 = tail call i32 @ip_lock(ptr noundef %0) #2
%6 = tail call i64 @ip_active(ptr noundef %0) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %16, label %8
8: ; preds = %4
%9 = load i64, ptr %0, align 8, !tbaa !5
%10 = icmp sgt i64 %9, 0
%11 = zext i1 %10 to i32
%12 = tail call i32 @assert(i32 noundef %11) #2
%13 = tail call i32 @ip_reference(ptr noundef nonnull %0) #2
%14 = load i64, ptr %0, align 8, !tbaa !5
%15 = add nsw i64 %14, 1
store i64 %15, ptr %0, align 8, !tbaa !5
br label %18
16: ; preds = %4
%17 = load ptr, ptr @IP_DEAD, align 8, !tbaa !10
br label %18
18: ; preds = %16, %8
%19 = phi ptr [ %0, %8 ], [ %17, %16 ]
%20 = tail call i32 @ip_unlock(ptr noundef %0) #2
br label %21
21: ; preds = %1, %18
%22 = phi ptr [ %19, %18 ], [ %0, %1 ]
ret ptr %22
}
declare i32 @IP_VALID(ptr noundef) local_unnamed_addr #1
declare i32 @ip_lock(ptr noundef) local_unnamed_addr #1
declare i64 @ip_active(ptr noundef) local_unnamed_addr #1
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i32 @ip_reference(ptr noundef) local_unnamed_addr #1
declare i32 @ip_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_10__", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
| ; ModuleID = 'AnghaBench/darwin-xnu/osfmk/ipc/extr_ipc_port.c_ipc_port_copy_send.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/ipc/extr_ipc_port.c_ipc_port_copy_send.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IP_DEAD = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @ipc_port_copy_send(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @IP_VALID(ptr noundef %0) #2
%3 = icmp eq i32 %2, 0
br i1 %3, label %21, label %4
4: ; preds = %1
%5 = tail call i32 @ip_lock(ptr noundef %0) #2
%6 = tail call i64 @ip_active(ptr noundef %0) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %16, label %8
8: ; preds = %4
%9 = load i64, ptr %0, align 8, !tbaa !6
%10 = icmp sgt i64 %9, 0
%11 = zext i1 %10 to i32
%12 = tail call i32 @assert(i32 noundef %11) #2
%13 = tail call i32 @ip_reference(ptr noundef nonnull %0) #2
%14 = load i64, ptr %0, align 8, !tbaa !6
%15 = add nsw i64 %14, 1
store i64 %15, ptr %0, align 8, !tbaa !6
br label %18
16: ; preds = %4
%17 = load ptr, ptr @IP_DEAD, align 8, !tbaa !11
br label %18
18: ; preds = %16, %8
%19 = phi ptr [ %0, %8 ], [ %17, %16 ]
%20 = tail call i32 @ip_unlock(ptr noundef %0) #2
br label %21
21: ; preds = %1, %18
%22 = phi ptr [ %19, %18 ], [ %0, %1 ]
ret ptr %22
}
declare i32 @IP_VALID(ptr noundef) local_unnamed_addr #1
declare i32 @ip_lock(ptr noundef) local_unnamed_addr #1
declare i64 @ip_active(ptr noundef) local_unnamed_addr #1
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i32 @ip_reference(ptr noundef) local_unnamed_addr #1
declare i32 @ip_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_10__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !9, i64 0}
| darwin-xnu_osfmk_ipc_extr_ipc_port.c_ipc_port_copy_send |
; ModuleID = 'AnghaBench/fastsocket/kernel/samples/kprobes/extr_kretprobe_example.c_entry_handler.c'
source_filename = "AnghaBench/fastsocket/kernel/samples/kprobes/extr_kretprobe_example.c_entry_handler.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@current = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @entry_handler], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @entry_handler(ptr nocapture noundef readonly %0, ptr nocapture readnone %1) #0 {
%3 = load ptr, ptr @current, align 8, !tbaa !5
%4 = load i32, ptr %3, align 4, !tbaa !9
%5 = icmp eq i32 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = load i64, ptr %0, align 8, !tbaa !12
%8 = inttoptr i64 %7 to ptr
%9 = tail call i32 (...) @ktime_get() #2
store i32 %9, ptr %8, align 4, !tbaa !15
br label %10
10: ; preds = %2, %6
%11 = phi i32 [ 0, %6 ], [ 1, %2 ]
ret i32 %11
}
declare i32 @ktime_get(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_2__", !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"kretprobe_instance", !14, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!16, !11, i64 0}
!16 = !{!"my_data", !11, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/samples/kprobes/extr_kretprobe_example.c_entry_handler.c'
source_filename = "AnghaBench/fastsocket/kernel/samples/kprobes/extr_kretprobe_example.c_entry_handler.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@current = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @entry_handler], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @entry_handler(ptr nocapture noundef readonly %0, ptr nocapture readnone %1) #0 {
%3 = load ptr, ptr @current, align 8, !tbaa !6
%4 = load i32, ptr %3, align 4, !tbaa !10
%5 = icmp eq i32 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = load i64, ptr %0, align 8, !tbaa !13
%8 = inttoptr i64 %7 to ptr
%9 = tail call i32 @ktime_get() #2
store i32 %9, ptr %8, align 4, !tbaa !16
br label %10
10: ; preds = %2, %6
%11 = phi i32 [ 0, %6 ], [ 1, %2 ]
ret i32 %11
}
declare i32 @ktime_get(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"kretprobe_instance", !15, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!17, !12, i64 0}
!17 = !{!"my_data", !12, i64 0}
| fastsocket_kernel_samples_kprobes_extr_kretprobe_example.c_entry_handler |
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/ac97/extr_ac97_codec.c_apply_quirk_str.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/ac97/extr_ac97_codec.c_apply_quirk_str.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.quirk_table = type { i64 }
@applicable_quirks = dso_local local_unnamed_addr global ptr null, align 8
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @apply_quirk_str], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @apply_quirk_str(ptr noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr @applicable_quirks, align 8, !tbaa !5
%4 = tail call i32 @ARRAY_SIZE(ptr noundef %3) #2
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %26
6: ; preds = %2, %20
%7 = phi i64 [ %22, %20 ], [ 0, %2 ]
%8 = load ptr, ptr @applicable_quirks, align 8, !tbaa !5
%9 = getelementptr inbounds %struct.quirk_table, ptr %8, i64 %7
%10 = load i64, ptr %9, align 8, !tbaa !9
%11 = icmp eq i64 %10, 0
br i1 %11, label %20, label %12
12: ; preds = %6
%13 = tail call i32 @strcmp(ptr noundef %1, i64 noundef %10) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %17, label %15
15: ; preds = %12
%16 = load ptr, ptr @applicable_quirks, align 8, !tbaa !5
br label %20
17: ; preds = %12
%18 = trunc i64 %7 to i32
%19 = tail call i32 @apply_quirk(ptr noundef %0, i32 noundef %18) #2
br label %37
20: ; preds = %15, %6
%21 = phi ptr [ %16, %15 ], [ %8, %6 ]
%22 = add nuw nsw i64 %7, 1
%23 = tail call i32 @ARRAY_SIZE(ptr noundef %21) #2
%24 = sext i32 %23 to i64
%25 = icmp slt i64 %22, %24
br i1 %25, label %6, label %26, !llvm.loop !12
26: ; preds = %20, %2
%27 = load i8, ptr %1, align 1, !tbaa !14
%28 = add i8 %27, -48
%29 = icmp ult i8 %28, 10
br i1 %29, label %30, label %34
30: ; preds = %26
%31 = tail call i64 @simple_strtoul(ptr noundef nonnull %1, ptr noundef null, i32 noundef 10) #2
%32 = trunc i64 %31 to i32
%33 = tail call i32 @apply_quirk(ptr noundef %0, i32 noundef %32) #2
br label %37
34: ; preds = %26
%35 = load i32, ptr @EINVAL, align 4, !tbaa !15
%36 = sub nsw i32 0, %35
br label %37
37: ; preds = %34, %30, %17
%38 = phi i32 [ %19, %17 ], [ %33, %30 ], [ %36, %34 ]
ret i32 %38
}
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i32 @strcmp(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @apply_quirk(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @simple_strtoul(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"quirk_table", !11, i64 0}
!11 = !{!"long", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!7, !7, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/ac97/extr_ac97_codec.c_apply_quirk_str.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/ac97/extr_ac97_codec.c_apply_quirk_str.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.quirk_table = type { i64 }
@applicable_quirks = common local_unnamed_addr global ptr null, align 8
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @apply_quirk_str], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @apply_quirk_str(ptr noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr @applicable_quirks, align 8, !tbaa !6
%4 = tail call i32 @ARRAY_SIZE(ptr noundef %3) #2
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %26
6: ; preds = %2, %20
%7 = phi i64 [ %22, %20 ], [ 0, %2 ]
%8 = load ptr, ptr @applicable_quirks, align 8, !tbaa !6
%9 = getelementptr inbounds %struct.quirk_table, ptr %8, i64 %7
%10 = load i64, ptr %9, align 8, !tbaa !10
%11 = icmp eq i64 %10, 0
br i1 %11, label %20, label %12
12: ; preds = %6
%13 = tail call i32 @strcmp(ptr noundef %1, i64 noundef %10) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %17, label %15
15: ; preds = %12
%16 = load ptr, ptr @applicable_quirks, align 8, !tbaa !6
br label %20
17: ; preds = %12
%18 = trunc nuw nsw i64 %7 to i32
%19 = tail call i32 @apply_quirk(ptr noundef %0, i32 noundef %18) #2
br label %37
20: ; preds = %15, %6
%21 = phi ptr [ %16, %15 ], [ %8, %6 ]
%22 = add nuw nsw i64 %7, 1
%23 = tail call i32 @ARRAY_SIZE(ptr noundef %21) #2
%24 = sext i32 %23 to i64
%25 = icmp slt i64 %22, %24
br i1 %25, label %6, label %26, !llvm.loop !13
26: ; preds = %20, %2
%27 = load i8, ptr %1, align 1, !tbaa !15
%28 = add i8 %27, -48
%29 = icmp ult i8 %28, 10
br i1 %29, label %30, label %34
30: ; preds = %26
%31 = tail call i64 @simple_strtoul(ptr noundef nonnull %1, ptr noundef null, i32 noundef 10) #2
%32 = trunc i64 %31 to i32
%33 = tail call i32 @apply_quirk(ptr noundef %0, i32 noundef %32) #2
br label %37
34: ; preds = %26
%35 = load i32, ptr @EINVAL, align 4, !tbaa !16
%36 = sub nsw i32 0, %35
br label %37
37: ; preds = %34, %30, %17
%38 = phi i32 [ %19, %17 ], [ %33, %30 ], [ %36, %34 ]
ret i32 %38
}
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i32 @strcmp(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @apply_quirk(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @simple_strtoul(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"quirk_table", !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!8, !8, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"int", !8, i64 0}
| fastsocket_kernel_sound_pci_ac97_extr_ac97_codec.c_apply_quirk_str |
; ModuleID = 'AnghaBench/h2o/deps/picotls/lib/extr_openssl.c_verify_sign.c'
source_filename = "AnghaBench/h2o/deps/picotls/lib/extr_openssl.c_verify_sign.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PTLS_ERROR_NO_MEMORY = dso_local local_unnamed_addr global i32 0, align 4
@PTLS_ERROR_LIBRARY = dso_local local_unnamed_addr global i32 0, align 4
@EVP_PKEY_RSA = dso_local local_unnamed_addr global i64 0, align 8
@RSA_PKCS1_PSS_PADDING = dso_local local_unnamed_addr global i32 0, align 4
@PTLS_ALERT_DECRYPT_ERROR = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @verify_sign], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @verify_sign(ptr noundef %0, i32 %1, ptr %2, i32 %3, ptr %4) #0 {
%6 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
store ptr null, ptr %6, align 8, !tbaa !5
%7 = icmp eq ptr %2, null
br i1 %7, label %56, label %8
8: ; preds = %5
%9 = tail call ptr (...) @EVP_MD_CTX_create() #3
%10 = icmp eq ptr %9, null
br i1 %10, label %11, label %13
11: ; preds = %8
%12 = load i32, ptr @PTLS_ERROR_NO_MEMORY, align 4, !tbaa !9
br label %56
13: ; preds = %8
%14 = tail call i32 (...) @EVP_sha256() #3
%15 = call i32 @EVP_DigestVerifyInit(ptr noundef nonnull %9, ptr noundef nonnull %6, i32 noundef %14, ptr noundef null, ptr noundef %0) #3
%16 = icmp eq i32 %15, 1
br i1 %16, label %19, label %17
17: ; preds = %13
%18 = load i32, ptr @PTLS_ERROR_LIBRARY, align 4, !tbaa !9
br label %53
19: ; preds = %13
%20 = call i64 @EVP_PKEY_id(ptr noundef %0) #3
%21 = load i64, ptr @EVP_PKEY_RSA, align 8, !tbaa !11
%22 = icmp eq i64 %20, %21
br i1 %22, label %23, label %43
23: ; preds = %19
%24 = load ptr, ptr %6, align 8, !tbaa !5
%25 = load i32, ptr @RSA_PKCS1_PSS_PADDING, align 4, !tbaa !9
%26 = call i32 @EVP_PKEY_CTX_set_rsa_padding(ptr noundef %24, i32 noundef %25) #3
%27 = icmp eq i32 %26, 1
br i1 %27, label %30, label %28
28: ; preds = %23
%29 = load i32, ptr @PTLS_ERROR_LIBRARY, align 4, !tbaa !9
br label %53
30: ; preds = %23
%31 = load ptr, ptr %6, align 8, !tbaa !5
%32 = call i32 @EVP_PKEY_CTX_set_rsa_pss_saltlen(ptr noundef %31, i32 noundef -1) #3
%33 = icmp eq i32 %32, 1
br i1 %33, label %36, label %34
34: ; preds = %30
%35 = load i32, ptr @PTLS_ERROR_LIBRARY, align 4, !tbaa !9
br label %53
36: ; preds = %30
%37 = load ptr, ptr %6, align 8, !tbaa !5
%38 = call i32 (...) @EVP_sha256() #3
%39 = call i32 @EVP_PKEY_CTX_set_rsa_mgf1_md(ptr noundef %37, i32 noundef %38) #3
%40 = icmp eq i32 %39, 1
br i1 %40, label %43, label %41
41: ; preds = %36
%42 = load i32, ptr @PTLS_ERROR_LIBRARY, align 4, !tbaa !9
br label %53
43: ; preds = %36, %19
%44 = call i32 @EVP_DigestVerifyUpdate(ptr noundef nonnull %9, ptr noundef nonnull %2, i32 noundef %1) #3
%45 = icmp eq i32 %44, 1
br i1 %45, label %48, label %46
46: ; preds = %43
%47 = load i32, ptr @PTLS_ERROR_LIBRARY, align 4, !tbaa !9
br label %53
48: ; preds = %43
%49 = call i32 @EVP_DigestVerifyFinal(ptr noundef nonnull %9, ptr noundef %4, i32 noundef %3) #3
%50 = icmp eq i32 %49, 1
%51 = load i32, ptr @PTLS_ALERT_DECRYPT_ERROR, align 4
%52 = select i1 %50, i32 0, i32 %51
br label %53
53: ; preds = %17, %28, %34, %41, %46, %48
%54 = phi i32 [ %52, %48 ], [ %47, %46 ], [ %42, %41 ], [ %35, %34 ], [ %29, %28 ], [ %18, %17 ]
%55 = call i32 @EVP_MD_CTX_destroy(ptr noundef nonnull %9) #3
br label %56
56: ; preds = %11, %5, %53
%57 = phi i32 [ %54, %53 ], [ 0, %5 ], [ %12, %11 ]
%58 = call i32 @EVP_PKEY_free(ptr noundef %0) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
ret i32 %57
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @EVP_MD_CTX_create(...) local_unnamed_addr #2
declare i32 @EVP_DigestVerifyInit(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @EVP_sha256(...) local_unnamed_addr #2
declare i64 @EVP_PKEY_id(ptr noundef) local_unnamed_addr #2
declare i32 @EVP_PKEY_CTX_set_rsa_padding(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @EVP_PKEY_CTX_set_rsa_pss_saltlen(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @EVP_PKEY_CTX_set_rsa_mgf1_md(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @EVP_DigestVerifyUpdate(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @EVP_DigestVerifyFinal(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @EVP_MD_CTX_destroy(ptr noundef) local_unnamed_addr #2
declare i32 @EVP_PKEY_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/h2o/deps/picotls/lib/extr_openssl.c_verify_sign.c'
source_filename = "AnghaBench/h2o/deps/picotls/lib/extr_openssl.c_verify_sign.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PTLS_ERROR_NO_MEMORY = common local_unnamed_addr global i32 0, align 4
@PTLS_ERROR_LIBRARY = common local_unnamed_addr global i32 0, align 4
@EVP_PKEY_RSA = common local_unnamed_addr global i64 0, align 8
@RSA_PKCS1_PSS_PADDING = common local_unnamed_addr global i32 0, align 4
@PTLS_ALERT_DECRYPT_ERROR = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @verify_sign], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @verify_sign(ptr noundef %0, [2 x i64] %1, [2 x i64] %2) #0 {
%4 = alloca ptr, align 8
%5 = extractvalue [2 x i64] %1, 0
%6 = trunc i64 %5 to i32
%7 = extractvalue [2 x i64] %1, 1
%8 = inttoptr i64 %7 to ptr
%9 = extractvalue [2 x i64] %2, 0
%10 = trunc i64 %9 to i32
%11 = extractvalue [2 x i64] %2, 1
%12 = inttoptr i64 %11 to ptr
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
store ptr null, ptr %4, align 8, !tbaa !6
%13 = icmp eq i64 %7, 0
br i1 %13, label %62, label %14
14: ; preds = %3
%15 = tail call ptr @EVP_MD_CTX_create() #3
%16 = icmp eq ptr %15, null
br i1 %16, label %17, label %19
17: ; preds = %14
%18 = load i32, ptr @PTLS_ERROR_NO_MEMORY, align 4, !tbaa !10
br label %62
19: ; preds = %14
%20 = tail call i32 @EVP_sha256() #3
%21 = call i32 @EVP_DigestVerifyInit(ptr noundef nonnull %15, ptr noundef nonnull %4, i32 noundef %20, ptr noundef null, ptr noundef %0) #3
%22 = icmp eq i32 %21, 1
br i1 %22, label %25, label %23
23: ; preds = %19
%24 = load i32, ptr @PTLS_ERROR_LIBRARY, align 4, !tbaa !10
br label %59
25: ; preds = %19
%26 = call i64 @EVP_PKEY_id(ptr noundef %0) #3
%27 = load i64, ptr @EVP_PKEY_RSA, align 8, !tbaa !12
%28 = icmp eq i64 %26, %27
br i1 %28, label %29, label %49
29: ; preds = %25
%30 = load ptr, ptr %4, align 8, !tbaa !6
%31 = load i32, ptr @RSA_PKCS1_PSS_PADDING, align 4, !tbaa !10
%32 = call i32 @EVP_PKEY_CTX_set_rsa_padding(ptr noundef %30, i32 noundef %31) #3
%33 = icmp eq i32 %32, 1
br i1 %33, label %36, label %34
34: ; preds = %29
%35 = load i32, ptr @PTLS_ERROR_LIBRARY, align 4, !tbaa !10
br label %59
36: ; preds = %29
%37 = load ptr, ptr %4, align 8, !tbaa !6
%38 = call i32 @EVP_PKEY_CTX_set_rsa_pss_saltlen(ptr noundef %37, i32 noundef -1) #3
%39 = icmp eq i32 %38, 1
br i1 %39, label %42, label %40
40: ; preds = %36
%41 = load i32, ptr @PTLS_ERROR_LIBRARY, align 4, !tbaa !10
br label %59
42: ; preds = %36
%43 = load ptr, ptr %4, align 8, !tbaa !6
%44 = call i32 @EVP_sha256() #3
%45 = call i32 @EVP_PKEY_CTX_set_rsa_mgf1_md(ptr noundef %43, i32 noundef %44) #3
%46 = icmp eq i32 %45, 1
br i1 %46, label %49, label %47
47: ; preds = %42
%48 = load i32, ptr @PTLS_ERROR_LIBRARY, align 4, !tbaa !10
br label %59
49: ; preds = %42, %25
%50 = call i32 @EVP_DigestVerifyUpdate(ptr noundef nonnull %15, ptr noundef nonnull %8, i32 noundef %6) #3
%51 = icmp eq i32 %50, 1
br i1 %51, label %54, label %52
52: ; preds = %49
%53 = load i32, ptr @PTLS_ERROR_LIBRARY, align 4, !tbaa !10
br label %59
54: ; preds = %49
%55 = call i32 @EVP_DigestVerifyFinal(ptr noundef nonnull %15, ptr noundef %12, i32 noundef %10) #3
%56 = icmp eq i32 %55, 1
%57 = load i32, ptr @PTLS_ALERT_DECRYPT_ERROR, align 4
%58 = select i1 %56, i32 0, i32 %57
br label %59
59: ; preds = %23, %34, %40, %47, %52, %54
%60 = phi i32 [ %58, %54 ], [ %53, %52 ], [ %48, %47 ], [ %41, %40 ], [ %35, %34 ], [ %24, %23 ]
%61 = call i32 @EVP_MD_CTX_destroy(ptr noundef nonnull %15) #3
br label %62
62: ; preds = %17, %3, %59
%63 = phi i32 [ %60, %59 ], [ 0, %3 ], [ %18, %17 ]
%64 = call i32 @EVP_PKEY_free(ptr noundef %0) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret i32 %63
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @EVP_MD_CTX_create(...) local_unnamed_addr #2
declare i32 @EVP_DigestVerifyInit(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @EVP_sha256(...) local_unnamed_addr #2
declare i64 @EVP_PKEY_id(ptr noundef) local_unnamed_addr #2
declare i32 @EVP_PKEY_CTX_set_rsa_padding(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @EVP_PKEY_CTX_set_rsa_pss_saltlen(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @EVP_PKEY_CTX_set_rsa_mgf1_md(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @EVP_DigestVerifyUpdate(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @EVP_DigestVerifyFinal(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @EVP_MD_CTX_destroy(ptr noundef) local_unnamed_addr #2
declare i32 @EVP_PKEY_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
| h2o_deps_picotls_lib_extr_openssl.c_verify_sign |
; ModuleID = 'AnghaBench/freebsd/tools/regression/priv/extr_priv_vfs_setgid.c_priv_vfs_setgid_cleanup.c'
source_filename = "AnghaBench/freebsd/tools/regression/priv/extr_priv_vfs_setgid.c_priv_vfs_setgid_cleanup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@fpath_initialized = dso_local local_unnamed_addr global i64 0, align 8
@fpath = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @priv_vfs_setgid_cleanup(i32 noundef %0, i32 noundef %1, ptr nocapture noundef readnone %2) local_unnamed_addr #0 {
%4 = load i64, ptr @fpath_initialized, align 8, !tbaa !5
%5 = icmp eq i64 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = load i32, ptr @fpath, align 4, !tbaa !9
%8 = tail call i32 @unlink(i32 noundef %7) #2
store i64 0, ptr @fpath_initialized, align 8, !tbaa !5
br label %9
9: ; preds = %6, %3
ret void
}
declare i32 @unlink(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/tools/regression/priv/extr_priv_vfs_setgid.c_priv_vfs_setgid_cleanup.c'
source_filename = "AnghaBench/freebsd/tools/regression/priv/extr_priv_vfs_setgid.c_priv_vfs_setgid_cleanup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@fpath_initialized = common local_unnamed_addr global i64 0, align 8
@fpath = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @priv_vfs_setgid_cleanup(i32 noundef %0, i32 noundef %1, ptr nocapture noundef readnone %2) local_unnamed_addr #0 {
%4 = load i64, ptr @fpath_initialized, align 8, !tbaa !6
%5 = icmp eq i64 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = load i32, ptr @fpath, align 4, !tbaa !10
%8 = tail call i32 @unlink(i32 noundef %7) #2
store i64 0, ptr @fpath_initialized, align 8, !tbaa !6
br label %9
9: ; preds = %6, %3
ret void
}
declare i32 @unlink(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| freebsd_tools_regression_priv_extr_priv_vfs_setgid.c_priv_vfs_setgid_cleanup |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/core/engine/graph/extr_nv2a.c_nv2a_graph_ctor.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/core/engine/graph/extr_nv2a.c_nv2a_graph_ctor.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32 }
%struct.TYPE_4__ = type { i32, i32, ptr }
@NVOBJ_FLAG_ZERO_ALLOC = dso_local local_unnamed_addr global i32 0, align 4
@nv20_graph_intr = dso_local local_unnamed_addr global i32 0, align 4
@nv2a_graph_cclass = dso_local global i32 0, align 4
@nv25_graph_sclass = dso_local local_unnamed_addr global i32 0, align 4
@nv20_graph_tile_prog = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @nv2a_graph_ctor], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @nv2a_graph_ctor(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr nocapture readnone %3, i32 %4, ptr nocapture noundef writeonly %5) #0 {
%7 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #3
%8 = call i32 @nouveau_graph_create(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef 1, ptr noundef nonnull %7) #3
%9 = load ptr, ptr %7, align 8, !tbaa !5
%10 = call ptr @nv_object(ptr noundef %9) #3
store ptr %10, ptr %5, align 8, !tbaa !5
%11 = icmp eq i32 %8, 0
br i1 %11, label %12, label %34
12: ; preds = %6
%13 = load i32, ptr @NVOBJ_FLAG_ZERO_ALLOC, align 4, !tbaa !9
%14 = load ptr, ptr %7, align 8, !tbaa !5
%15 = call i32 @nouveau_gpuobj_new(ptr noundef %0, ptr noundef null, i32 noundef 128, i32 noundef 16, i32 noundef %13, ptr noundef %14) #3
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %34
17: ; preds = %12
%18 = load ptr, ptr %7, align 8, !tbaa !5
%19 = call ptr @nv_subdev(ptr noundef %18) #3
store i32 4096, ptr %19, align 4, !tbaa !11
%20 = load i32, ptr @nv20_graph_intr, align 4, !tbaa !9
%21 = load ptr, ptr %7, align 8, !tbaa !5
%22 = call ptr @nv_subdev(ptr noundef %21) #3
%23 = getelementptr inbounds %struct.TYPE_3__, ptr %22, i64 0, i32 1
store i32 %20, ptr %23, align 4, !tbaa !13
%24 = load ptr, ptr %7, align 8, !tbaa !5
%25 = call ptr @nv_engine(ptr noundef %24) #3
%26 = getelementptr inbounds %struct.TYPE_4__, ptr %25, i64 0, i32 2
store ptr @nv2a_graph_cclass, ptr %26, align 8, !tbaa !14
%27 = load i32, ptr @nv25_graph_sclass, align 4, !tbaa !9
%28 = load ptr, ptr %7, align 8, !tbaa !5
%29 = call ptr @nv_engine(ptr noundef %28) #3
%30 = getelementptr inbounds %struct.TYPE_4__, ptr %29, i64 0, i32 1
store i32 %27, ptr %30, align 4, !tbaa !16
%31 = load i32, ptr @nv20_graph_tile_prog, align 4, !tbaa !9
%32 = load ptr, ptr %7, align 8, !tbaa !5
%33 = call ptr @nv_engine(ptr noundef %32) #3
store i32 %31, ptr %33, align 8, !tbaa !17
br label %34
34: ; preds = %12, %6, %17
%35 = phi i32 [ 0, %17 ], [ %8, %6 ], [ %15, %12 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3
ret i32 %35
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @nouveau_graph_create(ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @nv_object(ptr noundef) local_unnamed_addr #2
declare i32 @nouveau_gpuobj_new(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @nv_subdev(ptr noundef) local_unnamed_addr #2
declare ptr @nv_engine(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_3__", !10, i64 0, !10, i64 4}
!13 = !{!12, !10, i64 4}
!14 = !{!15, !6, i64 8}
!15 = !{!"TYPE_4__", !10, i64 0, !10, i64 4, !6, i64 8}
!16 = !{!15, !10, i64 4}
!17 = !{!15, !10, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/core/engine/graph/extr_nv2a.c_nv2a_graph_ctor.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/core/engine/graph/extr_nv2a.c_nv2a_graph_ctor.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NVOBJ_FLAG_ZERO_ALLOC = common local_unnamed_addr global i32 0, align 4
@nv20_graph_intr = common local_unnamed_addr global i32 0, align 4
@nv2a_graph_cclass = common global i32 0, align 4
@nv25_graph_sclass = common local_unnamed_addr global i32 0, align 4
@nv20_graph_tile_prog = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @nv2a_graph_ctor], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @nv2a_graph_ctor(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr nocapture readnone %3, i32 %4, ptr nocapture noundef writeonly %5) #0 {
%7 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #3
%8 = call i32 @nouveau_graph_create(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef 1, ptr noundef nonnull %7) #3
%9 = load ptr, ptr %7, align 8, !tbaa !6
%10 = call ptr @nv_object(ptr noundef %9) #3
store ptr %10, ptr %5, align 8, !tbaa !6
%11 = icmp eq i32 %8, 0
br i1 %11, label %12, label %34
12: ; preds = %6
%13 = load i32, ptr @NVOBJ_FLAG_ZERO_ALLOC, align 4, !tbaa !10
%14 = load ptr, ptr %7, align 8, !tbaa !6
%15 = call i32 @nouveau_gpuobj_new(ptr noundef %0, ptr noundef null, i32 noundef 128, i32 noundef 16, i32 noundef %13, ptr noundef %14) #3
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %34
17: ; preds = %12
%18 = load ptr, ptr %7, align 8, !tbaa !6
%19 = call ptr @nv_subdev(ptr noundef %18) #3
store i32 4096, ptr %19, align 4, !tbaa !12
%20 = load i32, ptr @nv20_graph_intr, align 4, !tbaa !10
%21 = load ptr, ptr %7, align 8, !tbaa !6
%22 = call ptr @nv_subdev(ptr noundef %21) #3
%23 = getelementptr inbounds i8, ptr %22, i64 4
store i32 %20, ptr %23, align 4, !tbaa !14
%24 = load ptr, ptr %7, align 8, !tbaa !6
%25 = call ptr @nv_engine(ptr noundef %24) #3
%26 = getelementptr inbounds i8, ptr %25, i64 8
store ptr @nv2a_graph_cclass, ptr %26, align 8, !tbaa !15
%27 = load i32, ptr @nv25_graph_sclass, align 4, !tbaa !10
%28 = load ptr, ptr %7, align 8, !tbaa !6
%29 = call ptr @nv_engine(ptr noundef %28) #3
%30 = getelementptr inbounds i8, ptr %29, i64 4
store i32 %27, ptr %30, align 4, !tbaa !17
%31 = load i32, ptr @nv20_graph_tile_prog, align 4, !tbaa !10
%32 = load ptr, ptr %7, align 8, !tbaa !6
%33 = call ptr @nv_engine(ptr noundef %32) #3
store i32 %31, ptr %33, align 8, !tbaa !18
br label %34
34: ; preds = %12, %6, %17
%35 = phi i32 [ 0, %17 ], [ %8, %6 ], [ %15, %12 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3
ret i32 %35
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @nouveau_graph_create(ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @nv_object(ptr noundef) local_unnamed_addr #2
declare i32 @nouveau_gpuobj_new(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @nv_subdev(ptr noundef) local_unnamed_addr #2
declare ptr @nv_engine(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_3__", !11, i64 0, !11, i64 4}
!14 = !{!13, !11, i64 4}
!15 = !{!16, !7, i64 8}
!16 = !{!"TYPE_4__", !11, i64 0, !11, i64 4, !7, i64 8}
!17 = !{!16, !11, i64 4}
!18 = !{!16, !11, i64 0}
| fastsocket_kernel_drivers_gpu_drm_nouveau_core_engine_graph_extr_nv2a.c_nv2a_graph_ctor |
; ModuleID = 'AnghaBench/freebsd/contrib/binutils/bfd/extr_elf32-spu.c_pasted_function.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/bfd/extr_elf32-spu.c_pasted_function.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_21__ = type { i32, i32, i64 }
%struct.TYPE_20__ = type { ptr, i32, i32 }
%struct.bfd_link_order = type { i64, %struct.TYPE_18__, ptr }
%struct.TYPE_18__ = type { %struct.TYPE_17__ }
%struct.TYPE_17__ = type { ptr }
%struct.spu_elf_stack_info = type { i32, ptr }
%struct.function_info = type { ptr }
@FALSE = dso_local local_unnamed_addr global i32 0, align 4
@TRUE = dso_local local_unnamed_addr global i32 0, align 4
@bfd_indirect_link_order = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [25 x i8] c"%A link_order not found\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @pasted_function], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @pasted_function(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call ptr @bfd_zmalloc(i32 noundef 16) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %61, label %5
5: ; preds = %2
%6 = getelementptr inbounds %struct.TYPE_21__, ptr %3, i64 0, i32 2
store i64 0, ptr %6, align 8, !tbaa !5
%7 = getelementptr inbounds %struct.TYPE_20__, ptr %0, i64 0, i32 2
%8 = load i32, ptr %7, align 4, !tbaa !11
%9 = getelementptr inbounds %struct.TYPE_21__, ptr %3, i64 0, i32 1
store i32 %8, ptr %9, align 4, !tbaa !14
%10 = getelementptr inbounds %struct.TYPE_20__, ptr %0, i64 0, i32 1
%11 = load i32, ptr %10, align 8, !tbaa !15
%12 = tail call i32 @_bfd_elf_section_from_bfd_section(i32 noundef %11, ptr noundef %0) #2
store i32 %12, ptr %3, align 8, !tbaa !16
%13 = load i32, ptr @FALSE, align 4, !tbaa !17
%14 = tail call ptr @maybe_insert_function(ptr noundef %0, ptr noundef nonnull %3, i32 noundef %13, i32 noundef %13) #2
%15 = icmp eq ptr %14, null
br i1 %15, label %61, label %16
16: ; preds = %5
%17 = load ptr, ptr %0, align 8, !tbaa !18
%18 = load ptr, ptr %17, align 8, !tbaa !19
%19 = icmp eq ptr %18, null
br i1 %19, label %56, label %20
20: ; preds = %16, %51
%21 = phi ptr [ %54, %51 ], [ %18, %16 ]
%22 = phi ptr [ %52, %51 ], [ null, %16 ]
%23 = getelementptr inbounds %struct.bfd_link_order, ptr %21, i64 0, i32 1
%24 = load ptr, ptr %23, align 8, !tbaa !20
%25 = icmp eq ptr %24, %0
br i1 %25, label %26, label %32
26: ; preds = %20
%27 = icmp eq ptr %22, null
br i1 %27, label %61, label %28
28: ; preds = %26
%29 = load ptr, ptr %22, align 8, !tbaa !24
%30 = icmp eq ptr %29, null
%31 = select i1 %30, ptr %22, ptr %29
store ptr %31, ptr %14, align 8, !tbaa !24
br label %61
32: ; preds = %20
%33 = load i64, ptr %21, align 8, !tbaa !26
%34 = load i64, ptr @bfd_indirect_link_order, align 8, !tbaa !27
%35 = icmp eq i64 %33, %34
br i1 %35, label %36, label %51
36: ; preds = %32
%37 = tail call ptr @spu_elf_section_data(ptr noundef %24) #2
%38 = icmp eq ptr %37, null
br i1 %38, label %51, label %39
39: ; preds = %36
%40 = load ptr, ptr %37, align 8, !tbaa !28
%41 = icmp eq ptr %40, null
br i1 %41, label %51, label %42
42: ; preds = %39
%43 = load i32, ptr %40, align 8, !tbaa !30
%44 = icmp eq i32 %43, 0
br i1 %44, label %51, label %45
45: ; preds = %42
%46 = getelementptr inbounds %struct.spu_elf_stack_info, ptr %40, i64 0, i32 1
%47 = load ptr, ptr %46, align 8, !tbaa !32
%48 = sext i32 %43 to i64
%49 = getelementptr %struct.function_info, ptr %47, i64 %48
%50 = getelementptr %struct.function_info, ptr %49, i64 -1
br label %51
51: ; preds = %32, %36, %39, %42, %45
%52 = phi ptr [ %50, %45 ], [ %22, %42 ], [ %22, %39 ], [ %22, %36 ], [ %22, %32 ]
%53 = getelementptr inbounds %struct.bfd_link_order, ptr %21, i64 0, i32 2
%54 = load ptr, ptr %53, align 8, !tbaa !19
%55 = icmp eq ptr %54, null
br i1 %55, label %56, label %20, !llvm.loop !33
56: ; preds = %51, %16
%57 = load ptr, ptr %1, align 8, !tbaa !35
%58 = load ptr, ptr %57, align 8, !tbaa !37
%59 = tail call i32 @_(ptr noundef nonnull @.str) #2
%60 = tail call i32 %58(i32 noundef %59, ptr noundef nonnull %0) #2
br label %61
61: ; preds = %26, %28, %5, %2, %56
%62 = phi ptr [ @FALSE, %56 ], [ @FALSE, %2 ], [ @FALSE, %5 ], [ @TRUE, %28 ], [ @TRUE, %26 ]
%63 = load i32, ptr %62, align 4, !tbaa !17
ret i32 %63
}
declare ptr @bfd_zmalloc(i32 noundef) local_unnamed_addr #1
declare i32 @_bfd_elf_section_from_bfd_section(i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @maybe_insert_function(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @spu_elf_section_data(ptr noundef) local_unnamed_addr #1
declare i32 @_(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_21__", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!12, !7, i64 12}
!12 = !{!"TYPE_20__", !13, i64 0, !7, i64 8, !7, i64 12}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!6, !7, i64 4}
!15 = !{!12, !7, i64 8}
!16 = !{!6, !7, i64 0}
!17 = !{!7, !7, i64 0}
!18 = !{!12, !13, i64 0}
!19 = !{!13, !13, i64 0}
!20 = !{!21, !13, i64 8}
!21 = !{!"bfd_link_order", !10, i64 0, !22, i64 8, !13, i64 16}
!22 = !{!"TYPE_18__", !23, i64 0}
!23 = !{!"TYPE_17__", !13, i64 0}
!24 = !{!25, !13, i64 0}
!25 = !{!"function_info", !13, i64 0}
!26 = !{!21, !10, i64 0}
!27 = !{!10, !10, i64 0}
!28 = !{!29, !13, i64 0}
!29 = !{!"_spu_elf_section_data", !13, i64 0}
!30 = !{!31, !7, i64 0}
!31 = !{!"spu_elf_stack_info", !7, i64 0, !13, i64 8}
!32 = !{!31, !13, i64 8}
!33 = distinct !{!33, !34}
!34 = !{!"llvm.loop.mustprogress"}
!35 = !{!36, !13, i64 0}
!36 = !{!"bfd_link_info", !13, i64 0}
!37 = !{!38, !13, i64 0}
!38 = !{!"TYPE_19__", !13, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/binutils/bfd/extr_elf32-spu.c_pasted_function.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/bfd/extr_elf32-spu.c_pasted_function.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.function_info = type { ptr }
@FALSE = common local_unnamed_addr global i32 0, align 4
@TRUE = common local_unnamed_addr global i32 0, align 4
@bfd_indirect_link_order = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [25 x i8] c"%A link_order not found\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @pasted_function], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @pasted_function(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call ptr @bfd_zmalloc(i32 noundef 16) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %61, label %5
5: ; preds = %2
%6 = getelementptr inbounds i8, ptr %3, i64 8
store i64 0, ptr %6, align 8, !tbaa !6
%7 = getelementptr inbounds i8, ptr %0, i64 12
%8 = load i32, ptr %7, align 4, !tbaa !12
%9 = getelementptr inbounds i8, ptr %3, i64 4
store i32 %8, ptr %9, align 4, !tbaa !15
%10 = getelementptr inbounds i8, ptr %0, i64 8
%11 = load i32, ptr %10, align 8, !tbaa !16
%12 = tail call i32 @_bfd_elf_section_from_bfd_section(i32 noundef %11, ptr noundef %0) #2
store i32 %12, ptr %3, align 8, !tbaa !17
%13 = load i32, ptr @FALSE, align 4, !tbaa !18
%14 = tail call ptr @maybe_insert_function(ptr noundef %0, ptr noundef nonnull %3, i32 noundef %13, i32 noundef %13) #2
%15 = icmp eq ptr %14, null
br i1 %15, label %61, label %16
16: ; preds = %5
%17 = load ptr, ptr %0, align 8, !tbaa !19
%18 = load ptr, ptr %17, align 8, !tbaa !20
%19 = icmp eq ptr %18, null
br i1 %19, label %56, label %20
20: ; preds = %16, %51
%21 = phi ptr [ %54, %51 ], [ %18, %16 ]
%22 = phi ptr [ %52, %51 ], [ null, %16 ]
%23 = getelementptr inbounds i8, ptr %21, i64 8
%24 = load ptr, ptr %23, align 8, !tbaa !21
%25 = icmp eq ptr %24, %0
br i1 %25, label %26, label %32
26: ; preds = %20
%27 = icmp eq ptr %22, null
br i1 %27, label %61, label %28
28: ; preds = %26
%29 = load ptr, ptr %22, align 8, !tbaa !25
%30 = icmp eq ptr %29, null
%31 = select i1 %30, ptr %22, ptr %29
store ptr %31, ptr %14, align 8, !tbaa !25
br label %61
32: ; preds = %20
%33 = load i64, ptr %21, align 8, !tbaa !27
%34 = load i64, ptr @bfd_indirect_link_order, align 8, !tbaa !28
%35 = icmp eq i64 %33, %34
br i1 %35, label %36, label %51
36: ; preds = %32
%37 = tail call ptr @spu_elf_section_data(ptr noundef %24) #2
%38 = icmp eq ptr %37, null
br i1 %38, label %51, label %39
39: ; preds = %36
%40 = load ptr, ptr %37, align 8, !tbaa !29
%41 = icmp eq ptr %40, null
br i1 %41, label %51, label %42
42: ; preds = %39
%43 = load i32, ptr %40, align 8, !tbaa !31
%44 = icmp eq i32 %43, 0
br i1 %44, label %51, label %45
45: ; preds = %42
%46 = getelementptr inbounds i8, ptr %40, i64 8
%47 = load ptr, ptr %46, align 8, !tbaa !33
%48 = sext i32 %43 to i64
%49 = getelementptr %struct.function_info, ptr %47, i64 %48
%50 = getelementptr i8, ptr %49, i64 -8
br label %51
51: ; preds = %32, %36, %39, %42, %45
%52 = phi ptr [ %50, %45 ], [ %22, %42 ], [ %22, %39 ], [ %22, %36 ], [ %22, %32 ]
%53 = getelementptr inbounds i8, ptr %21, i64 16
%54 = load ptr, ptr %53, align 8, !tbaa !20
%55 = icmp eq ptr %54, null
br i1 %55, label %56, label %20, !llvm.loop !34
56: ; preds = %51, %16
%57 = load ptr, ptr %1, align 8, !tbaa !36
%58 = load ptr, ptr %57, align 8, !tbaa !38
%59 = tail call i32 @_(ptr noundef nonnull @.str) #2
%60 = tail call i32 %58(i32 noundef %59, ptr noundef nonnull %0) #2
br label %61
61: ; preds = %26, %28, %5, %2, %56
%62 = phi ptr [ @FALSE, %56 ], [ @FALSE, %2 ], [ @FALSE, %5 ], [ @TRUE, %28 ], [ @TRUE, %26 ]
%63 = load i32, ptr %62, align 4, !tbaa !18
ret i32 %63
}
declare ptr @bfd_zmalloc(i32 noundef) local_unnamed_addr #1
declare i32 @_bfd_elf_section_from_bfd_section(i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @maybe_insert_function(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @spu_elf_section_data(ptr noundef) local_unnamed_addr #1
declare i32 @_(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_21__", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!13, !8, i64 12}
!13 = !{!"TYPE_20__", !14, i64 0, !8, i64 8, !8, i64 12}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!7, !8, i64 4}
!16 = !{!13, !8, i64 8}
!17 = !{!7, !8, i64 0}
!18 = !{!8, !8, i64 0}
!19 = !{!13, !14, i64 0}
!20 = !{!14, !14, i64 0}
!21 = !{!22, !14, i64 8}
!22 = !{!"bfd_link_order", !11, i64 0, !23, i64 8, !14, i64 16}
!23 = !{!"TYPE_18__", !24, i64 0}
!24 = !{!"TYPE_17__", !14, i64 0}
!25 = !{!26, !14, i64 0}
!26 = !{!"function_info", !14, i64 0}
!27 = !{!22, !11, i64 0}
!28 = !{!11, !11, i64 0}
!29 = !{!30, !14, i64 0}
!30 = !{!"_spu_elf_section_data", !14, i64 0}
!31 = !{!32, !8, i64 0}
!32 = !{!"spu_elf_stack_info", !8, i64 0, !14, i64 8}
!33 = !{!32, !14, i64 8}
!34 = distinct !{!34, !35}
!35 = !{!"llvm.loop.mustprogress"}
!36 = !{!37, !14, i64 0}
!37 = !{!"bfd_link_info", !14, i64 0}
!38 = !{!39, !14, i64 0}
!39 = !{!"TYPE_19__", !14, i64 0}
| freebsd_contrib_binutils_bfd_extr_elf32-spu.c_pasted_function |
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/ai03/orbit/extr_matrix.c_matrix_slave_scan_user.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/ai03/orbit/extr_matrix.c_matrix_slave_scan_user.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define weak dso_local void @matrix_slave_scan_user() local_unnamed_addr #0 {
ret void
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/qmk_firmware/keyboards/ai03/orbit/extr_matrix.c_matrix_slave_scan_user.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/ai03/orbit/extr_matrix.c_matrix_slave_scan_user.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define weak void @matrix_slave_scan_user() local_unnamed_addr #0 {
ret void
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| qmk_firmware_keyboards_ai03_orbit_extr_matrix.c_matrix_slave_scan_user |
; ModuleID = 'AnghaBench/reactos/sdk/lib/drivers/ip/network/extr_address.c_A2S.c'
source_filename = "AnghaBench/reactos/sdk/lib/drivers/ip/network/extr_address.c_A2S.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32 }
@A2SStr = dso_local local_unnamed_addr global i32 0, align 4
@MIN_TRACE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [21 x i8] c"NULL address given.\0A\00", align 1
@.str.1 = private unnamed_addr constant [7 x i8] c"(NULL)\00", align 1
@.str.2 = private unnamed_addr constant [12 x i8] c"%d.%d.%d.%d\00", align 1
@.str.3 = private unnamed_addr constant [29 x i8] c"(IPv6 address not supported)\00", align 1
; Function Attrs: nounwind uwtable
define dso_local i32 @A2S(ptr noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr @A2SStr, align 4, !tbaa !5
%3 = icmp eq ptr %0, null
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = load i32, ptr @MIN_TRACE, align 4, !tbaa !5
%6 = tail call i32 @TI_DbgPrint(i32 noundef %5, ptr noundef nonnull @.str) #2
%7 = tail call i32 @strcpy(i32 noundef %2, ptr noundef nonnull @.str.1) #2
br label %23
8: ; preds = %1
%9 = load i32, ptr %0, align 4, !tbaa !9
switch i32 %9, label %23 [
i32 129, label %10
i32 128, label %21
]
10: ; preds = %8
%11 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
%12 = load i32, ptr %11, align 4, !tbaa !12
%13 = tail call i32 @DN2H(i32 noundef %12) #2
%14 = lshr i32 %13, 24
%15 = lshr i32 %13, 16
%16 = and i32 %15, 255
%17 = lshr i32 %13, 8
%18 = and i32 %17, 255
%19 = and i32 %13, 255
%20 = tail call i32 @sprintf(i32 noundef %2, ptr noundef nonnull @.str.2, i32 noundef %14, i32 noundef %16, i32 noundef %18, i32 noundef %19) #2
br label %23
21: ; preds = %8
%22 = tail call i32 @strcpy(i32 noundef %2, ptr noundef nonnull @.str.3) #2
br label %23
23: ; preds = %10, %21, %8, %4
ret i32 %2
}
declare i32 @TI_DbgPrint(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @strcpy(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @DN2H(i32 noundef) local_unnamed_addr #1
declare i32 @sprintf(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_5__", !6, i64 0, !11, i64 4}
!11 = !{!"TYPE_4__", !6, i64 0}
!12 = !{!10, !6, i64 4}
| ; ModuleID = 'AnghaBench/reactos/sdk/lib/drivers/ip/network/extr_address.c_A2S.c'
source_filename = "AnghaBench/reactos/sdk/lib/drivers/ip/network/extr_address.c_A2S.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@A2SStr = common local_unnamed_addr global i32 0, align 4
@MIN_TRACE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [21 x i8] c"NULL address given.\0A\00", align 1
@.str.1 = private unnamed_addr constant [7 x i8] c"(NULL)\00", align 1
@.str.2 = private unnamed_addr constant [12 x i8] c"%d.%d.%d.%d\00", align 1
@.str.3 = private unnamed_addr constant [29 x i8] c"(IPv6 address not supported)\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @A2S(ptr noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr @A2SStr, align 4, !tbaa !6
%3 = icmp eq ptr %0, null
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = load i32, ptr @MIN_TRACE, align 4, !tbaa !6
%6 = tail call i32 @TI_DbgPrint(i32 noundef %5, ptr noundef nonnull @.str) #2
%7 = tail call i32 @strcpy(i32 noundef %2, ptr noundef nonnull @.str.1) #2
br label %23
8: ; preds = %1
%9 = load i32, ptr %0, align 4, !tbaa !10
switch i32 %9, label %23 [
i32 129, label %10
i32 128, label %21
]
10: ; preds = %8
%11 = getelementptr inbounds i8, ptr %0, i64 4
%12 = load i32, ptr %11, align 4, !tbaa !13
%13 = tail call i32 @DN2H(i32 noundef %12) #2
%14 = lshr i32 %13, 24
%15 = lshr i32 %13, 16
%16 = and i32 %15, 255
%17 = lshr i32 %13, 8
%18 = and i32 %17, 255
%19 = and i32 %13, 255
%20 = tail call i32 @sprintf(i32 noundef %2, ptr noundef nonnull @.str.2, i32 noundef %14, i32 noundef %16, i32 noundef %18, i32 noundef %19) #2
br label %23
21: ; preds = %8
%22 = tail call i32 @strcpy(i32 noundef %2, ptr noundef nonnull @.str.3) #2
br label %23
23: ; preds = %10, %21, %8, %4
ret i32 %2
}
declare i32 @TI_DbgPrint(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @strcpy(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @DN2H(i32 noundef) local_unnamed_addr #1
declare i32 @sprintf(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_5__", !7, i64 0, !12, i64 4}
!12 = !{!"TYPE_4__", !7, i64 0}
!13 = !{!11, !7, i64 4}
| reactos_sdk_lib_drivers_ip_network_extr_address.c_A2S |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/intel/iavf/extr_iavf_main.c_iavf_fix_features.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/intel/iavf/extr_iavf_main.c_iavf_fix_features.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@VIRTCHNL_VF_OFFLOAD_VLAN = dso_local local_unnamed_addr global i32 0, align 4
@NETIF_F_HW_VLAN_CTAG_TX = dso_local local_unnamed_addr global i32 0, align 4
@NETIF_F_HW_VLAN_CTAG_RX = dso_local local_unnamed_addr global i32 0, align 4
@NETIF_F_HW_VLAN_CTAG_FILTER = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @iavf_fix_features], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @iavf_fix_features(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @netdev_priv(ptr noundef %0) #2
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = load i32, ptr %4, align 4, !tbaa !10
%6 = load i32, ptr @VIRTCHNL_VF_OFFLOAD_VLAN, align 4, !tbaa !13
%7 = and i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %2
%10 = load i32, ptr @NETIF_F_HW_VLAN_CTAG_TX, align 4, !tbaa !13
%11 = load i32, ptr @NETIF_F_HW_VLAN_CTAG_RX, align 4, !tbaa !13
%12 = or i32 %11, %10
%13 = load i32, ptr @NETIF_F_HW_VLAN_CTAG_FILTER, align 4, !tbaa !13
%14 = or i32 %12, %13
%15 = xor i32 %14, -1
%16 = and i32 %15, %1
br label %17
17: ; preds = %9, %2
%18 = phi i32 [ %1, %2 ], [ %16, %9 ]
ret i32 %18
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"iavf_adapter", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!12, !12, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/intel/iavf/extr_iavf_main.c_iavf_fix_features.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/intel/iavf/extr_iavf_main.c_iavf_fix_features.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VIRTCHNL_VF_OFFLOAD_VLAN = common local_unnamed_addr global i32 0, align 4
@NETIF_F_HW_VLAN_CTAG_TX = common local_unnamed_addr global i32 0, align 4
@NETIF_F_HW_VLAN_CTAG_RX = common local_unnamed_addr global i32 0, align 4
@NETIF_F_HW_VLAN_CTAG_FILTER = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @iavf_fix_features], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @iavf_fix_features(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @netdev_priv(ptr noundef %0) #2
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load i32, ptr %4, align 4, !tbaa !11
%6 = load i32, ptr @VIRTCHNL_VF_OFFLOAD_VLAN, align 4, !tbaa !14
%7 = and i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %2
%10 = load i32, ptr @NETIF_F_HW_VLAN_CTAG_TX, align 4, !tbaa !14
%11 = load i32, ptr @NETIF_F_HW_VLAN_CTAG_RX, align 4, !tbaa !14
%12 = or i32 %11, %10
%13 = load i32, ptr @NETIF_F_HW_VLAN_CTAG_FILTER, align 4, !tbaa !14
%14 = or i32 %12, %13
%15 = xor i32 %14, -1
%16 = and i32 %15, %1
br label %17
17: ; preds = %9, %2
%18 = phi i32 [ %1, %2 ], [ %16, %9 ]
ret i32 %18
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"iavf_adapter", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!13, !13, i64 0}
| linux_drivers_net_ethernet_intel_iavf_extr_iavf_main.c_iavf_fix_features |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intel/iwlegacy/extr_4965-rs.c_il4965_rs_free.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/intel/iwlegacy/extr_4965-rs.c_il4965_rs_free.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @il4965_rs_free], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @il4965_rs_free(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intel/iwlegacy/extr_4965-rs.c_il4965_rs_free.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/intel/iwlegacy/extr_4965-rs.c_il4965_rs_free.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @il4965_rs_free], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @il4965_rs_free(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_net_wireless_intel_iwlegacy_extr_4965-rs.c_il4965_rs_free |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/disp/mdp4/extr_mdp4.xml.h_REG_MDP4_OVLP_TRANSP_HIGH0.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/disp/mdp4/extr_mdp4.xml.h_REG_MDP4_OVLP_TRANSP_HIGH0.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @REG_MDP4_OVLP_TRANSP_HIGH0], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i64 @REG_MDP4_OVLP_TRANSP_HIGH0(i64 noundef %0) #0 {
%2 = tail call i64 @__offset_OVLP(i64 noundef %0) #2
%3 = add nsw i64 %2, 392
ret i64 %3
}
declare i64 @__offset_OVLP(i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/disp/mdp4/extr_mdp4.xml.h_REG_MDP4_OVLP_TRANSP_HIGH0.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/disp/mdp4/extr_mdp4.xml.h_REG_MDP4_OVLP_TRANSP_HIGH0.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @REG_MDP4_OVLP_TRANSP_HIGH0], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal range(i64 -9223372036854775416, -9223372036854775808) i64 @REG_MDP4_OVLP_TRANSP_HIGH0(i64 noundef %0) #0 {
%2 = tail call i64 @__offset_OVLP(i64 noundef %0) #2
%3 = add nsw i64 %2, 392
ret i64 %3
}
declare i64 @__offset_OVLP(i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_gpu_drm_msm_disp_mdp4_extr_mdp4.xml.h_REG_MDP4_OVLP_TRANSP_HIGH0 |
; ModuleID = 'AnghaBench/netdata/database/extr_rrdhost.c___rrd_check_rdlock.c'
source_filename = "AnghaBench/netdata/database/extr_rrdhost.c___rrd_check_rdlock.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@D_RRDHOST = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [31 x i8] c"Checking read lock on all RRDs\00", align 1
@rrd_rwlock = dso_local global i32 0, align 4
@.str.1 = private unnamed_addr constant [86 x i8] c"RRDs should be read-locked, but it are not, at function %s() at line %lu of file '%s'\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @__rrd_check_rdlock(ptr noundef %0, ptr noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @D_RRDHOST, align 4, !tbaa !5
%5 = tail call i32 @debug(i32 noundef %4, ptr noundef nonnull @.str) #2
%6 = tail call i32 @netdata_rwlock_trywrlock(ptr noundef nonnull @rrd_rwlock) #2
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %3
%9 = tail call i32 @fatal(ptr noundef nonnull @.str.1, ptr noundef %1, i64 noundef %2, ptr noundef %0) #2
br label %10
10: ; preds = %8, %3
ret void
}
declare i32 @debug(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @netdata_rwlock_trywrlock(ptr noundef) local_unnamed_addr #1
declare i32 @fatal(ptr noundef, ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/netdata/database/extr_rrdhost.c___rrd_check_rdlock.c'
source_filename = "AnghaBench/netdata/database/extr_rrdhost.c___rrd_check_rdlock.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@D_RRDHOST = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [31 x i8] c"Checking read lock on all RRDs\00", align 1
@rrd_rwlock = common global i32 0, align 4
@.str.1 = private unnamed_addr constant [86 x i8] c"RRDs should be read-locked, but it are not, at function %s() at line %lu of file '%s'\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @__rrd_check_rdlock(ptr noundef %0, ptr noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @D_RRDHOST, align 4, !tbaa !6
%5 = tail call i32 @debug(i32 noundef %4, ptr noundef nonnull @.str) #2
%6 = tail call i32 @netdata_rwlock_trywrlock(ptr noundef nonnull @rrd_rwlock) #2
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %3
%9 = tail call i32 @fatal(ptr noundef nonnull @.str.1, ptr noundef %1, i64 noundef %2, ptr noundef %0) #2
br label %10
10: ; preds = %8, %3
ret void
}
declare i32 @debug(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @netdata_rwlock_trywrlock(ptr noundef) local_unnamed_addr #1
declare i32 @fatal(ptr noundef, ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| netdata_database_extr_rrdhost.c___rrd_check_rdlock |
; ModuleID = 'AnghaBench/linux/drivers/clocksource/extr_timer-imx-gpt.c_imx21_gpt_irq_acknowledge.c'
source_filename = "AnghaBench/linux/drivers/clocksource/extr_timer-imx-gpt.c_imx21_gpt_irq_acknowledge.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MX2_TSTAT_CAPT = dso_local local_unnamed_addr global i32 0, align 4
@MX2_TSTAT_COMP = dso_local local_unnamed_addr global i32 0, align 4
@MX1_2_TSTAT = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @imx21_gpt_irq_acknowledge], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @imx21_gpt_irq_acknowledge(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr @MX2_TSTAT_CAPT, align 4, !tbaa !5
%3 = load i32, ptr @MX2_TSTAT_COMP, align 4, !tbaa !5
%4 = or i32 %3, %2
%5 = load i64, ptr %0, align 8, !tbaa !9
%6 = load i64, ptr @MX1_2_TSTAT, align 8, !tbaa !12
%7 = add nsw i64 %6, %5
%8 = tail call i32 @writel_relaxed(i32 noundef %4, i64 noundef %7) #2
ret void
}
declare i32 @writel_relaxed(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"imx_timer", !11, i64 0}
!11 = !{!"long", !7, i64 0}
!12 = !{!11, !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/clocksource/extr_timer-imx-gpt.c_imx21_gpt_irq_acknowledge.c'
source_filename = "AnghaBench/linux/drivers/clocksource/extr_timer-imx-gpt.c_imx21_gpt_irq_acknowledge.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MX2_TSTAT_CAPT = common local_unnamed_addr global i32 0, align 4
@MX2_TSTAT_COMP = common local_unnamed_addr global i32 0, align 4
@MX1_2_TSTAT = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @imx21_gpt_irq_acknowledge], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @imx21_gpt_irq_acknowledge(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr @MX2_TSTAT_CAPT, align 4, !tbaa !6
%3 = load i32, ptr @MX2_TSTAT_COMP, align 4, !tbaa !6
%4 = or i32 %3, %2
%5 = load i64, ptr %0, align 8, !tbaa !10
%6 = load i64, ptr @MX1_2_TSTAT, align 8, !tbaa !13
%7 = add nsw i64 %6, %5
%8 = tail call i32 @writel_relaxed(i32 noundef %4, i64 noundef %7) #2
ret void
}
declare i32 @writel_relaxed(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"imx_timer", !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!12, !12, i64 0}
| linux_drivers_clocksource_extr_timer-imx-gpt.c_imx21_gpt_irq_acknowledge |
; ModuleID = 'AnghaBench/freebsd/sys/dev/aic7xxx/extr_aic79xx.c_ahd_run_data_fifo.c'
source_filename = "AnghaBench/freebsd/sys/dev/aic7xxx/extr_aic79xx.c_ahd_run_data_fifo.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ahd_dma64_seg = type { i32, i32 }
%struct.ahd_dma_seg = type { i32, i32 }
%struct.ahd_softc = type { i32, i32 }
@SEQINTSRC = dso_local local_unnamed_addr global i64 0, align 8
@CFG4DATA = dso_local local_unnamed_addr global i32 0, align 4
@SCB_SGPTR = dso_local local_unnamed_addr global i64 0, align 8
@SG_FULL_RESID = dso_local local_unnamed_addr global i32 0, align 4
@SCB_DATACNT = dso_local local_unnamed_addr global i64 0, align 8
@AHD_DMA_LAST_SEG = dso_local local_unnamed_addr global i32 0, align 4
@LAST_SEG = dso_local local_unnamed_addr global i32 0, align 4
@SG_STATE = dso_local local_unnamed_addr global i64 0, align 8
@LOADING_NEEDED = dso_local local_unnamed_addr global i32 0, align 4
@HADDR = dso_local local_unnamed_addr global i32 0, align 4
@SCB_DATAPTR = dso_local local_unnamed_addr global i32 0, align 4
@HCNT = dso_local local_unnamed_addr global i64 0, align 8
@AHD_SG_LEN_MASK = dso_local local_unnamed_addr global i32 0, align 4
@SG_CACHE_PRE = dso_local local_unnamed_addr global i64 0, align 8
@DFCNTRL = dso_local local_unnamed_addr global i64 0, align 8
@PRELOADEN = dso_local local_unnamed_addr global i32 0, align 4
@SCSIEN = dso_local local_unnamed_addr global i32 0, align 4
@HDMAEN = dso_local local_unnamed_addr global i32 0, align 4
@SCB_RESIDUAL_DATACNT = dso_local local_unnamed_addr global i64 0, align 8
@SCB_RESIDUAL_SGPTR = dso_local local_unnamed_addr global i64 0, align 8
@SG_PTR_MASK = dso_local local_unnamed_addr global i32 0, align 4
@SCB_FIFO_USE_COUNT = dso_local local_unnamed_addr global i64 0, align 8
@LONGJMP_ADDR = dso_local local_unnamed_addr global i64 0, align 8
@CLRSEQINTSRC = dso_local local_unnamed_addr global i64 0, align 8
@CLRCFG4DATA = dso_local local_unnamed_addr global i32 0, align 4
@SAVEPTRS = dso_local local_unnamed_addr global i32 0, align 4
@INVALID_ADDR = dso_local local_unnamed_addr global i32 0, align 4
@FETCH_INPROG = dso_local local_unnamed_addr global i32 0, align 4
@CCSGCTL = dso_local local_unnamed_addr global i64 0, align 8
@FIFOFLUSH = dso_local local_unnamed_addr global i32 0, align 4
@SHCNT = dso_local local_unnamed_addr global i32 0, align 4
@SG_CACHE_SHADOW = dso_local local_unnamed_addr global i64 0, align 8
@SG_ADDR_MASK = dso_local local_unnamed_addr global i32 0, align 4
@SG_LIST_NULL = dso_local local_unnamed_addr global i32 0, align 4
@SHADDR = dso_local local_unnamed_addr global i32 0, align 4
@CLRSAVEPTRS = dso_local local_unnamed_addr global i32 0, align 4
@SEQIMODE = dso_local local_unnamed_addr global i64 0, align 8
@ENSAVEPTRS = dso_local local_unnamed_addr global i32 0, align 4
@DIRECTION = dso_local local_unnamed_addr global i32 0, align 4
@DFSTATUS = dso_local local_unnamed_addr global i64 0, align 8
@PRELOAD_AVAIL = dso_local local_unnamed_addr global i32 0, align 4
@HDMAENACK = dso_local local_unnamed_addr global i32 0, align 4
@AHD_64BIT_ADDRESSING = dso_local local_unnamed_addr global i32 0, align 4
@AHD_SG_HIGH_ADDR_MASK = dso_local local_unnamed_addr global i32 0, align 4
@AHD_NEW_DFCNTRL_OPTS = dso_local local_unnamed_addr global i32 0, align 4
@SCSIENWRDIS = dso_local local_unnamed_addr global i32 0, align 4
@LAST_SEG_DONE = dso_local local_unnamed_addr global i32 0, align 4
@FIFOEMP = dso_local local_unnamed_addr global i32 0, align 4
@DFFSXFRCTL = dso_local local_unnamed_addr global i64 0, align 8
@CLRCHN = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ahd_run_data_fifo], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ahd_run_data_fifo(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i64, ptr @SEQINTSRC, align 8, !tbaa !5
%4 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %3) #2
%5 = load i32, ptr @CFG4DATA, align 4, !tbaa !9
%6 = and i32 %5, %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %66, label %8
8: ; preds = %2
%9 = load i64, ptr @SCB_SGPTR, align 8, !tbaa !5
%10 = tail call i32 @ahd_inl_scbram(ptr noundef %0, i64 noundef %9) #2
%11 = load i32, ptr @SG_FULL_RESID, align 4, !tbaa !9
%12 = xor i32 %11, -1
%13 = and i32 %10, %12
%14 = load i64, ptr @SCB_SGPTR, align 8, !tbaa !5
%15 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %14, i32 noundef %13) #2
%16 = load i64, ptr @SCB_DATACNT, align 8, !tbaa !5
%17 = tail call i32 @ahd_inl_scbram(ptr noundef %0, i64 noundef %16) #2
%18 = load i32, ptr @AHD_DMA_LAST_SEG, align 4, !tbaa !9
%19 = and i32 %18, %17
%20 = icmp eq i32 %19, 0
br i1 %20, label %26, label %21
21: ; preds = %8
%22 = load i32, ptr @LAST_SEG, align 4, !tbaa !9
%23 = or i32 %22, %13
%24 = load i64, ptr @SG_STATE, align 8, !tbaa !5
%25 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %24, i32 noundef 0) #2
br label %30
26: ; preds = %8
%27 = load i64, ptr @SG_STATE, align 8, !tbaa !5
%28 = load i32, ptr @LOADING_NEEDED, align 4, !tbaa !9
%29 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %27, i32 noundef %28) #2
br label %30
30: ; preds = %26, %21
%31 = phi i32 [ %23, %21 ], [ %13, %26 ]
%32 = load i32, ptr @HADDR, align 4, !tbaa !9
%33 = load i32, ptr @SCB_DATAPTR, align 4, !tbaa !9
%34 = tail call i32 @ahd_inq_scbram(ptr noundef %0, i32 noundef %33) #2
%35 = tail call i32 @ahd_outq(ptr noundef %0, i32 noundef %32, i32 noundef %34) #2
%36 = load i64, ptr @HCNT, align 8, !tbaa !5
%37 = load i32, ptr @AHD_SG_LEN_MASK, align 4, !tbaa !9
%38 = and i32 %37, %17
%39 = tail call i32 @ahd_outl(ptr noundef %0, i64 noundef %36, i32 noundef %38) #2
%40 = load i64, ptr @SG_CACHE_PRE, align 8, !tbaa !5
%41 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %40, i32 noundef %31) #2
%42 = load i64, ptr @DFCNTRL, align 8, !tbaa !5
%43 = load i32, ptr @PRELOADEN, align 4, !tbaa !9
%44 = load i32, ptr @SCSIEN, align 4, !tbaa !9
%45 = or i32 %44, %43
%46 = load i32, ptr @HDMAEN, align 4, !tbaa !9
%47 = or i32 %45, %46
%48 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %42, i32 noundef %47) #2
%49 = load i64, ptr @SCB_RESIDUAL_DATACNT, align 8, !tbaa !5
%50 = add nsw i64 %49, 3
%51 = ashr i32 %17, 24
%52 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %50, i32 noundef %51) #2
%53 = load i64, ptr @SCB_RESIDUAL_SGPTR, align 8, !tbaa !5
%54 = load i32, ptr @SG_PTR_MASK, align 4, !tbaa !9
%55 = and i32 %54, %31
%56 = tail call i32 @ahd_outl(ptr noundef %0, i64 noundef %53, i32 noundef %55) #2
%57 = load i64, ptr @SCB_FIFO_USE_COUNT, align 8, !tbaa !5
%58 = tail call i32 @ahd_inb_scbram(ptr noundef %0, i64 noundef %57) #2
%59 = add nsw i32 %58, 1
%60 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %57, i32 noundef %59) #2
%61 = load i64, ptr @LONGJMP_ADDR, align 8, !tbaa !5
%62 = tail call i32 @ahd_outw(ptr noundef %0, i64 noundef %61, i32 noundef 0) #2
%63 = load i64, ptr @CLRSEQINTSRC, align 8, !tbaa !5
%64 = load i32, ptr @CLRCFG4DATA, align 4, !tbaa !9
%65 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %63, i32 noundef %64) #2
br label %289
66: ; preds = %2
%67 = load i32, ptr @SAVEPTRS, align 4, !tbaa !9
%68 = and i32 %67, %4
%69 = icmp eq i32 %68, 0
br i1 %69, label %163, label %70
70: ; preds = %66
%71 = load i64, ptr @LONGJMP_ADDR, align 8, !tbaa !5
%72 = add nsw i64 %71, 1
%73 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %72) #2
%74 = load i32, ptr @INVALID_ADDR, align 4, !tbaa !9
%75 = and i32 %74, %73
%76 = icmp eq i32 %75, 0
br i1 %76, label %77, label %277
77: ; preds = %70
%78 = load i64, ptr @SG_STATE, align 8, !tbaa !5
%79 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %78) #2
%80 = load i32, ptr @FETCH_INPROG, align 4, !tbaa !9
%81 = and i32 %80, %79
%82 = icmp eq i32 %81, 0
br i1 %82, label %86, label %83
83: ; preds = %77
%84 = load i64, ptr @CCSGCTL, align 8, !tbaa !5
%85 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %84, i32 noundef 0) #2
br label %86
86: ; preds = %83, %77
%87 = load i64, ptr @SG_STATE, align 8, !tbaa !5
%88 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %87, i32 noundef 0) #2
%89 = load i64, ptr @DFCNTRL, align 8, !tbaa !5
%90 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %89) #2
%91 = load i32, ptr @FIFOFLUSH, align 4, !tbaa !9
%92 = or i32 %91, %90
%93 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %89, i32 noundef %92) #2
%94 = load i64, ptr @SCB_RESIDUAL_SGPTR, align 8, !tbaa !5
%95 = tail call i32 @ahd_inl_scbram(ptr noundef %0, i64 noundef %94) #2
%96 = load i32, ptr @SHCNT, align 4, !tbaa !9
%97 = tail call i32 @ahd_inl(ptr noundef %0, i32 noundef %96) #2
%98 = load i64, ptr @SCB_RESIDUAL_DATACNT, align 8, !tbaa !5
%99 = add nsw i64 %98, 3
%100 = tail call i32 @ahd_inb_scbram(ptr noundef %0, i64 noundef %99) #2
%101 = shl i32 %100, 24
%102 = or i32 %101, %97
%103 = load i64, ptr @SCB_RESIDUAL_DATACNT, align 8, !tbaa !5
%104 = tail call i32 @ahd_outl(ptr noundef %0, i64 noundef %103, i32 noundef %102) #2
%105 = load i64, ptr @SG_CACHE_SHADOW, align 8, !tbaa !5
%106 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %105) #2
%107 = load i32, ptr @LAST_SEG, align 4, !tbaa !9
%108 = and i32 %107, %106
%109 = icmp eq i32 %108, 0
br i1 %109, label %110, label %131
110: ; preds = %86
%111 = load i64, ptr @SG_CACHE_SHADOW, align 8, !tbaa !5
%112 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %111) #2
%113 = and i32 %112, 128
%114 = icmp ne i32 %113, 0
%115 = and i32 %95, 128
%116 = icmp eq i32 %115, 0
%117 = select i1 %114, i1 %116, i1 false
%118 = add nsw i32 %95, -256
%119 = select i1 %117, i32 %118, i32 %95
%120 = and i32 %119, -256
%121 = load i64, ptr @SG_CACHE_SHADOW, align 8, !tbaa !5
%122 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %121) #2
%123 = load i32, ptr @SG_ADDR_MASK, align 4, !tbaa !9
%124 = and i32 %123, %122
%125 = or i32 %120, %124
%126 = load i64, ptr @SCB_RESIDUAL_SGPTR, align 8, !tbaa !5
%127 = tail call i32 @ahd_outl(ptr noundef %0, i64 noundef %126, i32 noundef %125) #2
%128 = load i64, ptr @SCB_RESIDUAL_DATACNT, align 8, !tbaa !5
%129 = add nsw i64 %128, 3
%130 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %129, i32 noundef 0) #2
br label %140
131: ; preds = %86
%132 = load i32, ptr @AHD_SG_LEN_MASK, align 4, !tbaa !9
%133 = and i32 %132, %102
%134 = icmp eq i32 %133, 0
br i1 %134, label %135, label %140
135: ; preds = %131
%136 = load i64, ptr @SCB_RESIDUAL_SGPTR, align 8, !tbaa !5
%137 = load i32, ptr @SG_LIST_NULL, align 4, !tbaa !9
%138 = or i32 %137, %95
%139 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %136, i32 noundef %138) #2
br label %140
140: ; preds = %131, %135, %110
%141 = phi i32 [ %125, %110 ], [ %95, %135 ], [ %95, %131 ]
%142 = load i32, ptr @SCB_DATAPTR, align 4, !tbaa !9
%143 = load i32, ptr @SHADDR, align 4, !tbaa !9
%144 = tail call i32 @ahd_inq(ptr noundef %0, i32 noundef %143) #2
%145 = tail call i32 @ahd_outq(ptr noundef %0, i32 noundef %142, i32 noundef %144) #2
%146 = load i64, ptr @SCB_DATACNT, align 8, !tbaa !5
%147 = tail call i32 @ahd_outl(ptr noundef %0, i64 noundef %146, i32 noundef %102) #2
%148 = load i64, ptr @SCB_SGPTR, align 8, !tbaa !5
%149 = tail call i32 @ahd_outl(ptr noundef %0, i64 noundef %148, i32 noundef %141) #2
%150 = load i64, ptr @CLRSEQINTSRC, align 8, !tbaa !5
%151 = load i32, ptr @CLRSAVEPTRS, align 4, !tbaa !9
%152 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %150, i32 noundef %151) #2
%153 = load i64, ptr @SEQIMODE, align 8, !tbaa !5
%154 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %153) #2
%155 = load i32, ptr @ENSAVEPTRS, align 4, !tbaa !9
%156 = or i32 %155, %154
%157 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %153, i32 noundef %156) #2
%158 = load i64, ptr @DFCNTRL, align 8, !tbaa !5
%159 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %158) #2
%160 = load i32, ptr @DIRECTION, align 4, !tbaa !9
%161 = and i32 %160, %159
%162 = icmp eq i32 %161, 0
br i1 %162, label %289, label %277
163: ; preds = %66
%164 = load i64, ptr @SG_STATE, align 8, !tbaa !5
%165 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %164) #2
%166 = load i32, ptr @LOADING_NEEDED, align 4, !tbaa !9
%167 = and i32 %166, %165
%168 = icmp eq i32 %167, 0
br i1 %168, label %259, label %169
169: ; preds = %163
%170 = load i64, ptr @SG_STATE, align 8, !tbaa !5
%171 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %170) #2
%172 = load i32, ptr @FETCH_INPROG, align 4, !tbaa !9
%173 = and i32 %172, %171
%174 = icmp eq i32 %173, 0
br i1 %174, label %181, label %175
175: ; preds = %169
%176 = load i64, ptr @CCSGCTL, align 8, !tbaa !5
%177 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %176, i32 noundef 0) #2
%178 = load i64, ptr @SG_STATE, align 8, !tbaa !5
%179 = load i32, ptr @LOADING_NEEDED, align 4, !tbaa !9
%180 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %178, i32 noundef %179) #2
br label %181
181: ; preds = %175, %169
%182 = load i64, ptr @DFSTATUS, align 8, !tbaa !5
%183 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %182) #2
%184 = load i32, ptr @PRELOAD_AVAIL, align 4, !tbaa !9
%185 = and i32 %184, %183
%186 = icmp eq i32 %185, 0
br i1 %186, label %289, label %187
187: ; preds = %181
%188 = load i64, ptr @DFCNTRL, align 8, !tbaa !5
%189 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %188) #2
%190 = load i32, ptr @HDMAENACK, align 4, !tbaa !9
%191 = and i32 %190, %189
%192 = icmp eq i32 %191, 0
br i1 %192, label %289, label %193
193: ; preds = %187
%194 = load i64, ptr @SCB_RESIDUAL_SGPTR, align 8, !tbaa !5
%195 = tail call i32 @ahd_inl_scbram(ptr noundef %0, i64 noundef %194) #2
%196 = load i32, ptr @SG_PTR_MASK, align 4, !tbaa !9
%197 = and i32 %196, %195
%198 = load i32, ptr %0, align 4, !tbaa !11
%199 = load i32, ptr @AHD_64BIT_ADDRESSING, align 4, !tbaa !9
%200 = and i32 %199, %198
%201 = icmp eq i32 %200, 0
%202 = tail call ptr @ahd_sg_bus_to_virt(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %197) #2
%203 = load i32, ptr %202, align 4, !tbaa !9
br i1 %201, label %207, label %204
204: ; preds = %193
%205 = getelementptr inbounds %struct.ahd_dma64_seg, ptr %202, i64 0, i32 1
%206 = load i32, ptr %205, align 4, !tbaa !13
br label %214
207: ; preds = %193
%208 = load i32, ptr @AHD_SG_HIGH_ADDR_MASK, align 4, !tbaa !9
%209 = and i32 %208, %203
%210 = shl i32 %209, 8
%211 = getelementptr inbounds %struct.ahd_dma_seg, ptr %202, i64 0, i32 1
%212 = load i32, ptr %211, align 4, !tbaa !15
%213 = or i32 %210, %212
br label %214
214: ; preds = %207, %204
%215 = phi i32 [ %203, %204 ], [ %213, %207 ]
%216 = phi i32 [ %206, %204 ], [ %203, %207 ]
%217 = add i32 %197, 8
%218 = load i64, ptr @SCB_RESIDUAL_DATACNT, align 8, !tbaa !5
%219 = add nsw i64 %218, 3
%220 = ashr i32 %216, 24
%221 = tail call i32 @ahd_outb(ptr noundef nonnull %0, i64 noundef %219, i32 noundef %220) #2
%222 = load i64, ptr @SCB_RESIDUAL_SGPTR, align 8, !tbaa !5
%223 = tail call i32 @ahd_outl(ptr noundef nonnull %0, i64 noundef %222, i32 noundef %217) #2
%224 = load i32, ptr @AHD_DMA_LAST_SEG, align 4, !tbaa !9
%225 = and i32 %224, %216
%226 = icmp eq i32 %225, 0
br i1 %226, label %232, label %227
227: ; preds = %214
%228 = load i32, ptr @LAST_SEG, align 4, !tbaa !9
%229 = or i32 %228, %217
%230 = load i64, ptr @SG_STATE, align 8, !tbaa !5
%231 = tail call i32 @ahd_outb(ptr noundef nonnull %0, i64 noundef %230, i32 noundef 0) #2
br label %232
232: ; preds = %227, %214
%233 = phi i32 [ %229, %227 ], [ %217, %214 ]
%234 = load i32, ptr @HADDR, align 4, !tbaa !9
%235 = tail call i32 @ahd_outq(ptr noundef nonnull %0, i32 noundef %234, i32 noundef %215) #2
%236 = load i64, ptr @HCNT, align 8, !tbaa !5
%237 = load i32, ptr @AHD_SG_LEN_MASK, align 4, !tbaa !9
%238 = and i32 %237, %216
%239 = tail call i32 @ahd_outl(ptr noundef nonnull %0, i64 noundef %236, i32 noundef %238) #2
%240 = load i64, ptr @SG_CACHE_PRE, align 8, !tbaa !5
%241 = and i32 %233, 255
%242 = tail call i32 @ahd_outb(ptr noundef nonnull %0, i64 noundef %240, i32 noundef %241) #2
%243 = load i64, ptr @DFCNTRL, align 8, !tbaa !5
%244 = tail call i32 @ahd_inb(ptr noundef nonnull %0, i64 noundef %243) #2
%245 = load i32, ptr @PRELOADEN, align 4, !tbaa !9
%246 = or i32 %245, %244
%247 = load i32, ptr @HDMAEN, align 4, !tbaa !9
%248 = or i32 %246, %247
%249 = getelementptr inbounds %struct.ahd_softc, ptr %0, i64 0, i32 1
%250 = load i32, ptr %249, align 4, !tbaa !17
%251 = load i32, ptr @AHD_NEW_DFCNTRL_OPTS, align 4, !tbaa !9
%252 = and i32 %251, %250
%253 = icmp eq i32 %252, 0
%254 = load i32, ptr @SCSIENWRDIS, align 4
%255 = select i1 %253, i32 0, i32 %254
%256 = or i32 %248, %255
%257 = load i64, ptr @DFCNTRL, align 8, !tbaa !5
%258 = tail call i32 @ahd_outb(ptr noundef nonnull %0, i64 noundef %257, i32 noundef %256) #2
br label %289
259: ; preds = %163
%260 = load i64, ptr @SG_CACHE_SHADOW, align 8, !tbaa !5
%261 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %260) #2
%262 = load i32, ptr @LAST_SEG_DONE, align 4, !tbaa !9
%263 = and i32 %262, %261
%264 = icmp eq i32 %263, 0
br i1 %264, label %271, label %265
265: ; preds = %259
%266 = load i64, ptr @SCB_SGPTR, align 8, !tbaa !5
%267 = tail call i32 @ahd_inb_scbram(ptr noundef %0, i64 noundef %266) #2
%268 = load i32, ptr @SG_LIST_NULL, align 4, !tbaa !9
%269 = or i32 %268, %267
%270 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %266, i32 noundef %269) #2
br label %277
271: ; preds = %259
%272 = load i64, ptr @DFSTATUS, align 8, !tbaa !5
%273 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %272) #2
%274 = load i32, ptr @FIFOEMP, align 4, !tbaa !9
%275 = and i32 %274, %273
%276 = icmp eq i32 %275, 0
br i1 %276, label %289, label %277
277: ; preds = %140, %70, %271, %265
%278 = load i64, ptr @LONGJMP_ADDR, align 8, !tbaa !5
%279 = add nsw i64 %278, 1
%280 = load i32, ptr @INVALID_ADDR, align 4, !tbaa !9
%281 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %279, i32 noundef %280) #2
%282 = load i64, ptr @SCB_FIFO_USE_COUNT, align 8, !tbaa !5
%283 = tail call i32 @ahd_inb_scbram(ptr noundef %0, i64 noundef %282) #2
%284 = add nsw i32 %283, -1
%285 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %282, i32 noundef %284) #2
%286 = load i64, ptr @DFFSXFRCTL, align 8, !tbaa !5
%287 = load i32, ptr @CLRCHN, align 4, !tbaa !9
%288 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %286, i32 noundef %287) #2
br label %289
289: ; preds = %140, %181, %187, %232, %277, %271, %30
ret void
}
declare i32 @ahd_inb(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ahd_inl_scbram(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ahd_outb(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ahd_outq(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ahd_inq_scbram(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ahd_outl(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ahd_inb_scbram(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ahd_outw(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ahd_inl(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ahd_inq(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @ahd_sg_bus_to_virt(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"ahd_softc", !10, i64 0, !10, i64 4}
!13 = !{!14, !10, i64 4}
!14 = !{!"ahd_dma64_seg", !10, i64 0, !10, i64 4}
!15 = !{!16, !10, i64 4}
!16 = !{!"ahd_dma_seg", !10, i64 0, !10, i64 4}
!17 = !{!12, !10, i64 4}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/aic7xxx/extr_aic79xx.c_ahd_run_data_fifo.c'
source_filename = "AnghaBench/freebsd/sys/dev/aic7xxx/extr_aic79xx.c_ahd_run_data_fifo.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SEQINTSRC = common local_unnamed_addr global i64 0, align 8
@CFG4DATA = common local_unnamed_addr global i32 0, align 4
@SCB_SGPTR = common local_unnamed_addr global i64 0, align 8
@SG_FULL_RESID = common local_unnamed_addr global i32 0, align 4
@SCB_DATACNT = common local_unnamed_addr global i64 0, align 8
@AHD_DMA_LAST_SEG = common local_unnamed_addr global i32 0, align 4
@LAST_SEG = common local_unnamed_addr global i32 0, align 4
@SG_STATE = common local_unnamed_addr global i64 0, align 8
@LOADING_NEEDED = common local_unnamed_addr global i32 0, align 4
@HADDR = common local_unnamed_addr global i32 0, align 4
@SCB_DATAPTR = common local_unnamed_addr global i32 0, align 4
@HCNT = common local_unnamed_addr global i64 0, align 8
@AHD_SG_LEN_MASK = common local_unnamed_addr global i32 0, align 4
@SG_CACHE_PRE = common local_unnamed_addr global i64 0, align 8
@DFCNTRL = common local_unnamed_addr global i64 0, align 8
@PRELOADEN = common local_unnamed_addr global i32 0, align 4
@SCSIEN = common local_unnamed_addr global i32 0, align 4
@HDMAEN = common local_unnamed_addr global i32 0, align 4
@SCB_RESIDUAL_DATACNT = common local_unnamed_addr global i64 0, align 8
@SCB_RESIDUAL_SGPTR = common local_unnamed_addr global i64 0, align 8
@SG_PTR_MASK = common local_unnamed_addr global i32 0, align 4
@SCB_FIFO_USE_COUNT = common local_unnamed_addr global i64 0, align 8
@LONGJMP_ADDR = common local_unnamed_addr global i64 0, align 8
@CLRSEQINTSRC = common local_unnamed_addr global i64 0, align 8
@CLRCFG4DATA = common local_unnamed_addr global i32 0, align 4
@SAVEPTRS = common local_unnamed_addr global i32 0, align 4
@INVALID_ADDR = common local_unnamed_addr global i32 0, align 4
@FETCH_INPROG = common local_unnamed_addr global i32 0, align 4
@CCSGCTL = common local_unnamed_addr global i64 0, align 8
@FIFOFLUSH = common local_unnamed_addr global i32 0, align 4
@SHCNT = common local_unnamed_addr global i32 0, align 4
@SG_CACHE_SHADOW = common local_unnamed_addr global i64 0, align 8
@SG_ADDR_MASK = common local_unnamed_addr global i32 0, align 4
@SG_LIST_NULL = common local_unnamed_addr global i32 0, align 4
@SHADDR = common local_unnamed_addr global i32 0, align 4
@CLRSAVEPTRS = common local_unnamed_addr global i32 0, align 4
@SEQIMODE = common local_unnamed_addr global i64 0, align 8
@ENSAVEPTRS = common local_unnamed_addr global i32 0, align 4
@DIRECTION = common local_unnamed_addr global i32 0, align 4
@DFSTATUS = common local_unnamed_addr global i64 0, align 8
@PRELOAD_AVAIL = common local_unnamed_addr global i32 0, align 4
@HDMAENACK = common local_unnamed_addr global i32 0, align 4
@AHD_64BIT_ADDRESSING = common local_unnamed_addr global i32 0, align 4
@AHD_SG_HIGH_ADDR_MASK = common local_unnamed_addr global i32 0, align 4
@AHD_NEW_DFCNTRL_OPTS = common local_unnamed_addr global i32 0, align 4
@SCSIENWRDIS = common local_unnamed_addr global i32 0, align 4
@LAST_SEG_DONE = common local_unnamed_addr global i32 0, align 4
@FIFOEMP = common local_unnamed_addr global i32 0, align 4
@DFFSXFRCTL = common local_unnamed_addr global i64 0, align 8
@CLRCHN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ahd_run_data_fifo], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ahd_run_data_fifo(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i64, ptr @SEQINTSRC, align 8, !tbaa !6
%4 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %3) #2
%5 = load i32, ptr @CFG4DATA, align 4, !tbaa !10
%6 = and i32 %5, %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %66, label %8
8: ; preds = %2
%9 = load i64, ptr @SCB_SGPTR, align 8, !tbaa !6
%10 = tail call i32 @ahd_inl_scbram(ptr noundef %0, i64 noundef %9) #2
%11 = load i32, ptr @SG_FULL_RESID, align 4, !tbaa !10
%12 = xor i32 %11, -1
%13 = and i32 %10, %12
%14 = load i64, ptr @SCB_SGPTR, align 8, !tbaa !6
%15 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %14, i32 noundef %13) #2
%16 = load i64, ptr @SCB_DATACNT, align 8, !tbaa !6
%17 = tail call i32 @ahd_inl_scbram(ptr noundef %0, i64 noundef %16) #2
%18 = load i32, ptr @AHD_DMA_LAST_SEG, align 4, !tbaa !10
%19 = and i32 %18, %17
%20 = icmp eq i32 %19, 0
br i1 %20, label %26, label %21
21: ; preds = %8
%22 = load i32, ptr @LAST_SEG, align 4, !tbaa !10
%23 = or i32 %22, %13
%24 = load i64, ptr @SG_STATE, align 8, !tbaa !6
%25 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %24, i32 noundef 0) #2
br label %30
26: ; preds = %8
%27 = load i64, ptr @SG_STATE, align 8, !tbaa !6
%28 = load i32, ptr @LOADING_NEEDED, align 4, !tbaa !10
%29 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %27, i32 noundef %28) #2
br label %30
30: ; preds = %26, %21
%31 = phi i32 [ %23, %21 ], [ %13, %26 ]
%32 = load i32, ptr @HADDR, align 4, !tbaa !10
%33 = load i32, ptr @SCB_DATAPTR, align 4, !tbaa !10
%34 = tail call i32 @ahd_inq_scbram(ptr noundef %0, i32 noundef %33) #2
%35 = tail call i32 @ahd_outq(ptr noundef %0, i32 noundef %32, i32 noundef %34) #2
%36 = load i64, ptr @HCNT, align 8, !tbaa !6
%37 = load i32, ptr @AHD_SG_LEN_MASK, align 4, !tbaa !10
%38 = and i32 %37, %17
%39 = tail call i32 @ahd_outl(ptr noundef %0, i64 noundef %36, i32 noundef %38) #2
%40 = load i64, ptr @SG_CACHE_PRE, align 8, !tbaa !6
%41 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %40, i32 noundef %31) #2
%42 = load i64, ptr @DFCNTRL, align 8, !tbaa !6
%43 = load i32, ptr @PRELOADEN, align 4, !tbaa !10
%44 = load i32, ptr @SCSIEN, align 4, !tbaa !10
%45 = or i32 %44, %43
%46 = load i32, ptr @HDMAEN, align 4, !tbaa !10
%47 = or i32 %45, %46
%48 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %42, i32 noundef %47) #2
%49 = load i64, ptr @SCB_RESIDUAL_DATACNT, align 8, !tbaa !6
%50 = add nsw i64 %49, 3
%51 = ashr i32 %17, 24
%52 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %50, i32 noundef %51) #2
%53 = load i64, ptr @SCB_RESIDUAL_SGPTR, align 8, !tbaa !6
%54 = load i32, ptr @SG_PTR_MASK, align 4, !tbaa !10
%55 = and i32 %54, %31
%56 = tail call i32 @ahd_outl(ptr noundef %0, i64 noundef %53, i32 noundef %55) #2
%57 = load i64, ptr @SCB_FIFO_USE_COUNT, align 8, !tbaa !6
%58 = tail call i32 @ahd_inb_scbram(ptr noundef %0, i64 noundef %57) #2
%59 = add nsw i32 %58, 1
%60 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %57, i32 noundef %59) #2
%61 = load i64, ptr @LONGJMP_ADDR, align 8, !tbaa !6
%62 = tail call i32 @ahd_outw(ptr noundef %0, i64 noundef %61, i32 noundef 0) #2
%63 = load i64, ptr @CLRSEQINTSRC, align 8, !tbaa !6
%64 = load i32, ptr @CLRCFG4DATA, align 4, !tbaa !10
%65 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %63, i32 noundef %64) #2
br label %289
66: ; preds = %2
%67 = load i32, ptr @SAVEPTRS, align 4, !tbaa !10
%68 = and i32 %67, %4
%69 = icmp eq i32 %68, 0
br i1 %69, label %163, label %70
70: ; preds = %66
%71 = load i64, ptr @LONGJMP_ADDR, align 8, !tbaa !6
%72 = add nsw i64 %71, 1
%73 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %72) #2
%74 = load i32, ptr @INVALID_ADDR, align 4, !tbaa !10
%75 = and i32 %74, %73
%76 = icmp eq i32 %75, 0
br i1 %76, label %77, label %277
77: ; preds = %70
%78 = load i64, ptr @SG_STATE, align 8, !tbaa !6
%79 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %78) #2
%80 = load i32, ptr @FETCH_INPROG, align 4, !tbaa !10
%81 = and i32 %80, %79
%82 = icmp eq i32 %81, 0
br i1 %82, label %86, label %83
83: ; preds = %77
%84 = load i64, ptr @CCSGCTL, align 8, !tbaa !6
%85 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %84, i32 noundef 0) #2
br label %86
86: ; preds = %83, %77
%87 = load i64, ptr @SG_STATE, align 8, !tbaa !6
%88 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %87, i32 noundef 0) #2
%89 = load i64, ptr @DFCNTRL, align 8, !tbaa !6
%90 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %89) #2
%91 = load i32, ptr @FIFOFLUSH, align 4, !tbaa !10
%92 = or i32 %91, %90
%93 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %89, i32 noundef %92) #2
%94 = load i64, ptr @SCB_RESIDUAL_SGPTR, align 8, !tbaa !6
%95 = tail call i32 @ahd_inl_scbram(ptr noundef %0, i64 noundef %94) #2
%96 = load i32, ptr @SHCNT, align 4, !tbaa !10
%97 = tail call i32 @ahd_inl(ptr noundef %0, i32 noundef %96) #2
%98 = load i64, ptr @SCB_RESIDUAL_DATACNT, align 8, !tbaa !6
%99 = add nsw i64 %98, 3
%100 = tail call i32 @ahd_inb_scbram(ptr noundef %0, i64 noundef %99) #2
%101 = shl i32 %100, 24
%102 = or i32 %101, %97
%103 = load i64, ptr @SCB_RESIDUAL_DATACNT, align 8, !tbaa !6
%104 = tail call i32 @ahd_outl(ptr noundef %0, i64 noundef %103, i32 noundef %102) #2
%105 = load i64, ptr @SG_CACHE_SHADOW, align 8, !tbaa !6
%106 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %105) #2
%107 = load i32, ptr @LAST_SEG, align 4, !tbaa !10
%108 = and i32 %107, %106
%109 = icmp eq i32 %108, 0
br i1 %109, label %110, label %131
110: ; preds = %86
%111 = load i64, ptr @SG_CACHE_SHADOW, align 8, !tbaa !6
%112 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %111) #2
%113 = and i32 %112, 128
%114 = icmp ne i32 %113, 0
%115 = and i32 %95, 128
%116 = icmp eq i32 %115, 0
%117 = select i1 %114, i1 %116, i1 false
%118 = add nsw i32 %95, -256
%119 = select i1 %117, i32 %118, i32 %95
%120 = and i32 %119, -256
%121 = load i64, ptr @SG_CACHE_SHADOW, align 8, !tbaa !6
%122 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %121) #2
%123 = load i32, ptr @SG_ADDR_MASK, align 4, !tbaa !10
%124 = and i32 %123, %122
%125 = or i32 %120, %124
%126 = load i64, ptr @SCB_RESIDUAL_SGPTR, align 8, !tbaa !6
%127 = tail call i32 @ahd_outl(ptr noundef %0, i64 noundef %126, i32 noundef %125) #2
%128 = load i64, ptr @SCB_RESIDUAL_DATACNT, align 8, !tbaa !6
%129 = add nsw i64 %128, 3
%130 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %129, i32 noundef 0) #2
br label %140
131: ; preds = %86
%132 = load i32, ptr @AHD_SG_LEN_MASK, align 4, !tbaa !10
%133 = and i32 %132, %102
%134 = icmp eq i32 %133, 0
br i1 %134, label %135, label %140
135: ; preds = %131
%136 = load i64, ptr @SCB_RESIDUAL_SGPTR, align 8, !tbaa !6
%137 = load i32, ptr @SG_LIST_NULL, align 4, !tbaa !10
%138 = or i32 %137, %95
%139 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %136, i32 noundef %138) #2
br label %140
140: ; preds = %131, %135, %110
%141 = phi i32 [ %125, %110 ], [ %95, %135 ], [ %95, %131 ]
%142 = load i32, ptr @SCB_DATAPTR, align 4, !tbaa !10
%143 = load i32, ptr @SHADDR, align 4, !tbaa !10
%144 = tail call i32 @ahd_inq(ptr noundef %0, i32 noundef %143) #2
%145 = tail call i32 @ahd_outq(ptr noundef %0, i32 noundef %142, i32 noundef %144) #2
%146 = load i64, ptr @SCB_DATACNT, align 8, !tbaa !6
%147 = tail call i32 @ahd_outl(ptr noundef %0, i64 noundef %146, i32 noundef %102) #2
%148 = load i64, ptr @SCB_SGPTR, align 8, !tbaa !6
%149 = tail call i32 @ahd_outl(ptr noundef %0, i64 noundef %148, i32 noundef %141) #2
%150 = load i64, ptr @CLRSEQINTSRC, align 8, !tbaa !6
%151 = load i32, ptr @CLRSAVEPTRS, align 4, !tbaa !10
%152 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %150, i32 noundef %151) #2
%153 = load i64, ptr @SEQIMODE, align 8, !tbaa !6
%154 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %153) #2
%155 = load i32, ptr @ENSAVEPTRS, align 4, !tbaa !10
%156 = or i32 %155, %154
%157 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %153, i32 noundef %156) #2
%158 = load i64, ptr @DFCNTRL, align 8, !tbaa !6
%159 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %158) #2
%160 = load i32, ptr @DIRECTION, align 4, !tbaa !10
%161 = and i32 %160, %159
%162 = icmp eq i32 %161, 0
br i1 %162, label %289, label %277
163: ; preds = %66
%164 = load i64, ptr @SG_STATE, align 8, !tbaa !6
%165 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %164) #2
%166 = load i32, ptr @LOADING_NEEDED, align 4, !tbaa !10
%167 = and i32 %166, %165
%168 = icmp eq i32 %167, 0
br i1 %168, label %259, label %169
169: ; preds = %163
%170 = load i64, ptr @SG_STATE, align 8, !tbaa !6
%171 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %170) #2
%172 = load i32, ptr @FETCH_INPROG, align 4, !tbaa !10
%173 = and i32 %172, %171
%174 = icmp eq i32 %173, 0
br i1 %174, label %181, label %175
175: ; preds = %169
%176 = load i64, ptr @CCSGCTL, align 8, !tbaa !6
%177 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %176, i32 noundef 0) #2
%178 = load i64, ptr @SG_STATE, align 8, !tbaa !6
%179 = load i32, ptr @LOADING_NEEDED, align 4, !tbaa !10
%180 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %178, i32 noundef %179) #2
br label %181
181: ; preds = %175, %169
%182 = load i64, ptr @DFSTATUS, align 8, !tbaa !6
%183 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %182) #2
%184 = load i32, ptr @PRELOAD_AVAIL, align 4, !tbaa !10
%185 = and i32 %184, %183
%186 = icmp eq i32 %185, 0
br i1 %186, label %289, label %187
187: ; preds = %181
%188 = load i64, ptr @DFCNTRL, align 8, !tbaa !6
%189 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %188) #2
%190 = load i32, ptr @HDMAENACK, align 4, !tbaa !10
%191 = and i32 %190, %189
%192 = icmp eq i32 %191, 0
br i1 %192, label %289, label %193
193: ; preds = %187
%194 = load i64, ptr @SCB_RESIDUAL_SGPTR, align 8, !tbaa !6
%195 = tail call i32 @ahd_inl_scbram(ptr noundef %0, i64 noundef %194) #2
%196 = load i32, ptr @SG_PTR_MASK, align 4, !tbaa !10
%197 = and i32 %196, %195
%198 = load i32, ptr %0, align 4, !tbaa !12
%199 = load i32, ptr @AHD_64BIT_ADDRESSING, align 4, !tbaa !10
%200 = and i32 %199, %198
%201 = icmp eq i32 %200, 0
%202 = tail call ptr @ahd_sg_bus_to_virt(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %197) #2
%203 = load i32, ptr %202, align 4, !tbaa !10
br i1 %201, label %207, label %204
204: ; preds = %193
%205 = getelementptr inbounds i8, ptr %202, i64 4
%206 = load i32, ptr %205, align 4, !tbaa !14
br label %214
207: ; preds = %193
%208 = load i32, ptr @AHD_SG_HIGH_ADDR_MASK, align 4, !tbaa !10
%209 = and i32 %208, %203
%210 = shl i32 %209, 8
%211 = getelementptr inbounds i8, ptr %202, i64 4
%212 = load i32, ptr %211, align 4, !tbaa !16
%213 = or i32 %210, %212
br label %214
214: ; preds = %207, %204
%215 = phi i32 [ %203, %204 ], [ %213, %207 ]
%216 = phi i32 [ %206, %204 ], [ %203, %207 ]
%217 = add i32 %197, 8
%218 = load i64, ptr @SCB_RESIDUAL_DATACNT, align 8, !tbaa !6
%219 = add nsw i64 %218, 3
%220 = ashr i32 %216, 24
%221 = tail call i32 @ahd_outb(ptr noundef nonnull %0, i64 noundef %219, i32 noundef %220) #2
%222 = load i64, ptr @SCB_RESIDUAL_SGPTR, align 8, !tbaa !6
%223 = tail call i32 @ahd_outl(ptr noundef nonnull %0, i64 noundef %222, i32 noundef %217) #2
%224 = load i32, ptr @AHD_DMA_LAST_SEG, align 4, !tbaa !10
%225 = and i32 %224, %216
%226 = icmp eq i32 %225, 0
br i1 %226, label %232, label %227
227: ; preds = %214
%228 = load i32, ptr @LAST_SEG, align 4, !tbaa !10
%229 = or i32 %228, %217
%230 = load i64, ptr @SG_STATE, align 8, !tbaa !6
%231 = tail call i32 @ahd_outb(ptr noundef nonnull %0, i64 noundef %230, i32 noundef 0) #2
br label %232
232: ; preds = %227, %214
%233 = phi i32 [ %229, %227 ], [ %217, %214 ]
%234 = load i32, ptr @HADDR, align 4, !tbaa !10
%235 = tail call i32 @ahd_outq(ptr noundef nonnull %0, i32 noundef %234, i32 noundef %215) #2
%236 = load i64, ptr @HCNT, align 8, !tbaa !6
%237 = load i32, ptr @AHD_SG_LEN_MASK, align 4, !tbaa !10
%238 = and i32 %237, %216
%239 = tail call i32 @ahd_outl(ptr noundef nonnull %0, i64 noundef %236, i32 noundef %238) #2
%240 = load i64, ptr @SG_CACHE_PRE, align 8, !tbaa !6
%241 = and i32 %233, 255
%242 = tail call i32 @ahd_outb(ptr noundef nonnull %0, i64 noundef %240, i32 noundef %241) #2
%243 = load i64, ptr @DFCNTRL, align 8, !tbaa !6
%244 = tail call i32 @ahd_inb(ptr noundef nonnull %0, i64 noundef %243) #2
%245 = load i32, ptr @PRELOADEN, align 4, !tbaa !10
%246 = or i32 %245, %244
%247 = load i32, ptr @HDMAEN, align 4, !tbaa !10
%248 = or i32 %246, %247
%249 = getelementptr inbounds i8, ptr %0, i64 4
%250 = load i32, ptr %249, align 4, !tbaa !18
%251 = load i32, ptr @AHD_NEW_DFCNTRL_OPTS, align 4, !tbaa !10
%252 = and i32 %251, %250
%253 = icmp eq i32 %252, 0
%254 = load i32, ptr @SCSIENWRDIS, align 4
%255 = select i1 %253, i32 0, i32 %254
%256 = or i32 %248, %255
%257 = load i64, ptr @DFCNTRL, align 8, !tbaa !6
%258 = tail call i32 @ahd_outb(ptr noundef nonnull %0, i64 noundef %257, i32 noundef %256) #2
br label %289
259: ; preds = %163
%260 = load i64, ptr @SG_CACHE_SHADOW, align 8, !tbaa !6
%261 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %260) #2
%262 = load i32, ptr @LAST_SEG_DONE, align 4, !tbaa !10
%263 = and i32 %262, %261
%264 = icmp eq i32 %263, 0
br i1 %264, label %271, label %265
265: ; preds = %259
%266 = load i64, ptr @SCB_SGPTR, align 8, !tbaa !6
%267 = tail call i32 @ahd_inb_scbram(ptr noundef %0, i64 noundef %266) #2
%268 = load i32, ptr @SG_LIST_NULL, align 4, !tbaa !10
%269 = or i32 %268, %267
%270 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %266, i32 noundef %269) #2
br label %277
271: ; preds = %259
%272 = load i64, ptr @DFSTATUS, align 8, !tbaa !6
%273 = tail call i32 @ahd_inb(ptr noundef %0, i64 noundef %272) #2
%274 = load i32, ptr @FIFOEMP, align 4, !tbaa !10
%275 = and i32 %274, %273
%276 = icmp eq i32 %275, 0
br i1 %276, label %289, label %277
277: ; preds = %140, %70, %271, %265
%278 = load i64, ptr @LONGJMP_ADDR, align 8, !tbaa !6
%279 = add nsw i64 %278, 1
%280 = load i32, ptr @INVALID_ADDR, align 4, !tbaa !10
%281 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %279, i32 noundef %280) #2
%282 = load i64, ptr @SCB_FIFO_USE_COUNT, align 8, !tbaa !6
%283 = tail call i32 @ahd_inb_scbram(ptr noundef %0, i64 noundef %282) #2
%284 = add nsw i32 %283, -1
%285 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %282, i32 noundef %284) #2
%286 = load i64, ptr @DFFSXFRCTL, align 8, !tbaa !6
%287 = load i32, ptr @CLRCHN, align 4, !tbaa !10
%288 = tail call i32 @ahd_outb(ptr noundef %0, i64 noundef %286, i32 noundef %287) #2
br label %289
289: ; preds = %140, %181, %187, %232, %277, %271, %30
ret void
}
declare i32 @ahd_inb(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ahd_inl_scbram(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ahd_outb(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ahd_outq(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ahd_inq_scbram(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ahd_outl(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ahd_inb_scbram(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ahd_outw(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ahd_inl(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ahd_inq(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @ahd_sg_bus_to_virt(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"ahd_softc", !11, i64 0, !11, i64 4}
!14 = !{!15, !11, i64 4}
!15 = !{!"ahd_dma64_seg", !11, i64 0, !11, i64 4}
!16 = !{!17, !11, i64 4}
!17 = !{!"ahd_dma_seg", !11, i64 0, !11, i64 4}
!18 = !{!13, !11, i64 4}
| freebsd_sys_dev_aic7xxx_extr_aic79xx.c_ahd_run_data_fifo |
; ModuleID = 'AnghaBench/linux/sound/i2c/extr_i2c.c_snd_i2c_bit_send.c'
source_filename = "AnghaBench/linux/sound/i2c/extr_i2c.c_snd_i2c_bit_send.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_i2c_bit_send], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @snd_i2c_bit_send(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call i32 @snd_i2c_bit_set(ptr noundef %0, i32 noundef 0, i32 noundef %1) #2
%4 = tail call i32 @snd_i2c_bit_set(ptr noundef %0, i32 noundef 1, i32 noundef %1) #2
%5 = tail call i32 @snd_i2c_bit_set(ptr noundef %0, i32 noundef 0, i32 noundef %1) #2
ret void
}
declare i32 @snd_i2c_bit_set(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/sound/i2c/extr_i2c.c_snd_i2c_bit_send.c'
source_filename = "AnghaBench/linux/sound/i2c/extr_i2c.c_snd_i2c_bit_send.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @snd_i2c_bit_send], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @snd_i2c_bit_send(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call i32 @snd_i2c_bit_set(ptr noundef %0, i32 noundef 0, i32 noundef %1) #2
%4 = tail call i32 @snd_i2c_bit_set(ptr noundef %0, i32 noundef 1, i32 noundef %1) #2
%5 = tail call i32 @snd_i2c_bit_set(ptr noundef %0, i32 noundef 0, i32 noundef %1) #2
ret void
}
declare i32 @snd_i2c_bit_set(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_sound_i2c_extr_i2c.c_snd_i2c_bit_send |
; ModuleID = 'AnghaBench/reactos/dll/win32/riched20/extr_writer.c_find_color_in_colortbl.c'
source_filename = "AnghaBench/reactos/dll/win32/riched20/extr_writer.c_find_color_in_colortbl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, ptr, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @find_color_in_colortbl], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define internal i32 @find_color_in_colortbl(ptr nocapture noundef readonly %0, i64 noundef %1, ptr nocapture noundef writeonly %2) #0 {
store i32 0, ptr %2, align 4, !tbaa !5
%4 = load i32, ptr %0, align 8, !tbaa !9
%5 = icmp sgt i32 %4, 1
br i1 %5, label %6, label %20
6: ; preds = %3
%7 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%8 = load ptr, ptr %7, align 8, !tbaa !12
%9 = zext nneg i32 %4 to i64
br label %10
10: ; preds = %6, %17
%11 = phi i64 [ 1, %6 ], [ %18, %17 ]
%12 = getelementptr inbounds i64, ptr %8, i64 %11
%13 = load i64, ptr %12, align 8, !tbaa !13
%14 = icmp eq i64 %13, %1
br i1 %14, label %15, label %17
15: ; preds = %10
%16 = trunc i64 %11 to i32
store i32 %16, ptr %2, align 4, !tbaa !5
br label %20
17: ; preds = %10
%18 = add nuw nsw i64 %11, 1
%19 = icmp eq i64 %18, %9
br i1 %19, label %20, label %10, !llvm.loop !15
20: ; preds = %17, %3, %15
%21 = phi i32 [ %16, %15 ], [ 1, %3 ], [ %4, %17 ]
%22 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2
%23 = load i32, ptr %22, align 8, !tbaa !17
%24 = icmp slt i32 %21, %23
%25 = zext i1 %24 to i32
ret i32 %25
}
attributes #0 = { nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_3__", !6, i64 0, !11, i64 8, !6, i64 16}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !11, i64 8}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!10, !6, i64 16}
| ; ModuleID = 'AnghaBench/reactos/dll/win32/riched20/extr_writer.c_find_color_in_colortbl.c'
source_filename = "AnghaBench/reactos/dll/win32/riched20/extr_writer.c_find_color_in_colortbl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @find_color_in_colortbl], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal range(i32 0, 2) i32 @find_color_in_colortbl(ptr nocapture noundef readonly %0, i64 noundef %1, ptr nocapture noundef writeonly %2) #0 {
store i32 0, ptr %2, align 4, !tbaa !6
%4 = load i32, ptr %0, align 8, !tbaa !10
%5 = icmp sgt i32 %4, 1
br i1 %5, label %6, label %20
6: ; preds = %3
%7 = getelementptr inbounds i8, ptr %0, i64 8
%8 = load ptr, ptr %7, align 8, !tbaa !13
%9 = zext nneg i32 %4 to i64
br label %10
10: ; preds = %6, %17
%11 = phi i64 [ 1, %6 ], [ %18, %17 ]
%12 = getelementptr inbounds i64, ptr %8, i64 %11
%13 = load i64, ptr %12, align 8, !tbaa !14
%14 = icmp eq i64 %13, %1
br i1 %14, label %15, label %17
15: ; preds = %10
%16 = trunc nuw nsw i64 %11 to i32
store i32 %16, ptr %2, align 4, !tbaa !6
br label %20
17: ; preds = %10
%18 = add nuw nsw i64 %11, 1
%19 = icmp eq i64 %18, %9
br i1 %19, label %20, label %10, !llvm.loop !16
20: ; preds = %17, %3, %15
%21 = phi i32 [ %16, %15 ], [ 1, %3 ], [ %4, %17 ]
%22 = getelementptr inbounds i8, ptr %0, i64 16
%23 = load i32, ptr %22, align 8, !tbaa !18
%24 = icmp slt i32 %21, %23
%25 = zext i1 %24 to i32
ret i32 %25
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_3__", !7, i64 0, !12, i64 8, !7, i64 16}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!11, !7, i64 16}
| reactos_dll_win32_riched20_extr_writer.c_find_color_in_colortbl |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_typhoon.c_typhoon_set_settings.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_typhoon.c_typhoon_set_settings.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.cmd_desc = type { ptr }
%struct.ethtool_cmd = type { i64, i32, i32 }
%struct.typhoon = type { i32, i32, ptr }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@AUTONEG_ENABLE = dso_local local_unnamed_addr global i64 0, align 8
@TYPHOON_XCVR_AUTONEG = dso_local local_unnamed_addr global ptr null, align 8
@DUPLEX_HALF = dso_local local_unnamed_addr global i32 0, align 4
@SPEED_10 = dso_local local_unnamed_addr global i32 0, align 4
@TYPHOON_XCVR_10HALF = dso_local local_unnamed_addr global ptr null, align 8
@SPEED_100 = dso_local local_unnamed_addr global i32 0, align 4
@TYPHOON_XCVR_100HALF = dso_local local_unnamed_addr global ptr null, align 8
@DUPLEX_FULL = dso_local local_unnamed_addr global i32 0, align 4
@TYPHOON_XCVR_10FULL = dso_local local_unnamed_addr global ptr null, align 8
@TYPHOON_XCVR_100FULL = dso_local local_unnamed_addr global ptr null, align 8
@TYPHOON_CMD_XCVR_SELECT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @typhoon_set_settings], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @typhoon_set_settings(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = alloca %struct.cmd_desc, align 8
%4 = tail call ptr @netdev_priv(ptr noundef %0) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%5 = load i32, ptr @EINVAL, align 4, !tbaa !5
%6 = sub nsw i32 0, %5
%7 = load i64, ptr %1, align 8, !tbaa !9
%8 = load i64, ptr @AUTONEG_ENABLE, align 8, !tbaa !12
%9 = icmp eq i64 %7, %8
br i1 %9, label %34, label %10
10: ; preds = %2
%11 = getelementptr inbounds %struct.ethtool_cmd, ptr %1, i64 0, i32 1
%12 = load i32, ptr %11, align 8, !tbaa !13
%13 = load i32, ptr @DUPLEX_HALF, align 4, !tbaa !5
%14 = icmp eq i32 %12, %13
br i1 %14, label %15, label %23
15: ; preds = %10
%16 = getelementptr inbounds %struct.ethtool_cmd, ptr %1, i64 0, i32 2
%17 = load i32, ptr %16, align 4, !tbaa !14
%18 = load i32, ptr @SPEED_10, align 4, !tbaa !5
%19 = icmp eq i32 %17, %18
br i1 %19, label %34, label %20
20: ; preds = %15
%21 = load i32, ptr @SPEED_100, align 4, !tbaa !5
%22 = icmp eq i32 %17, %21
br i1 %22, label %34, label %55
23: ; preds = %10
%24 = load i32, ptr @DUPLEX_FULL, align 4, !tbaa !5
%25 = icmp eq i32 %12, %24
br i1 %25, label %26, label %55
26: ; preds = %23
%27 = getelementptr inbounds %struct.ethtool_cmd, ptr %1, i64 0, i32 2
%28 = load i32, ptr %27, align 4, !tbaa !14
%29 = load i32, ptr @SPEED_10, align 4, !tbaa !5
%30 = icmp eq i32 %28, %29
br i1 %30, label %34, label %31
31: ; preds = %26
%32 = load i32, ptr @SPEED_100, align 4, !tbaa !5
%33 = icmp eq i32 %28, %32
br i1 %33, label %34, label %55
34: ; preds = %31, %26, %20, %15, %2
%35 = phi ptr [ @TYPHOON_XCVR_AUTONEG, %2 ], [ @TYPHOON_XCVR_10HALF, %15 ], [ @TYPHOON_XCVR_100HALF, %20 ], [ @TYPHOON_XCVR_10FULL, %26 ], [ @TYPHOON_XCVR_100FULL, %31 ]
%36 = load ptr, ptr %35, align 8, !tbaa !15
%37 = load i32, ptr @TYPHOON_CMD_XCVR_SELECT, align 4, !tbaa !5
%38 = call i32 @INIT_COMMAND_NO_RESPONSE(ptr noundef nonnull %3, i32 noundef %37) #3
store ptr %36, ptr %3, align 8, !tbaa !17
%39 = call i32 @typhoon_issue_command(ptr noundef %4, i32 noundef 1, ptr noundef nonnull %3, i32 noundef 0, ptr noundef null) #3
%40 = icmp slt i32 %39, 0
br i1 %40, label %55, label %41
41: ; preds = %34
%42 = getelementptr inbounds %struct.typhoon, ptr %4, i64 0, i32 2
store ptr %36, ptr %42, align 8, !tbaa !19
%43 = load i64, ptr %1, align 8, !tbaa !9
%44 = load i64, ptr @AUTONEG_ENABLE, align 8, !tbaa !12
%45 = icmp eq i64 %43, %44
br i1 %45, label %46, label %47
46: ; preds = %41
store i32 255, ptr %4, align 8, !tbaa !21
br label %52
47: ; preds = %41
%48 = getelementptr inbounds %struct.ethtool_cmd, ptr %1, i64 0, i32 2
%49 = load i32, ptr %48, align 4, !tbaa !14
store i32 %49, ptr %4, align 8, !tbaa !21
%50 = getelementptr inbounds %struct.ethtool_cmd, ptr %1, i64 0, i32 1
%51 = load i32, ptr %50, align 8, !tbaa !13
br label %52
52: ; preds = %47, %46
%53 = phi i32 [ 255, %46 ], [ %51, %47 ]
%54 = getelementptr inbounds %struct.typhoon, ptr %4, i64 0, i32 1
store i32 %53, ptr %54, align 4, !tbaa !22
br label %55
55: ; preds = %52, %34, %23, %31, %20
%56 = phi i32 [ %39, %34 ], [ %6, %20 ], [ %6, %31 ], [ %6, %23 ], [ %39, %52 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %56
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #2
declare i32 @INIT_COMMAND_NO_RESPONSE(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @typhoon_issue_command(ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"ethtool_cmd", !11, i64 0, !6, i64 8, !6, i64 12}
!11 = !{!"long", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!10, !6, i64 8}
!14 = !{!10, !6, i64 12}
!15 = !{!16, !16, i64 0}
!16 = !{!"any pointer", !7, i64 0}
!17 = !{!18, !16, i64 0}
!18 = !{!"cmd_desc", !16, i64 0}
!19 = !{!20, !16, i64 8}
!20 = !{!"typhoon", !6, i64 0, !6, i64 4, !16, i64 8}
!21 = !{!20, !6, i64 0}
!22 = !{!20, !6, i64 4}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_typhoon.c_typhoon_set_settings.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_typhoon.c_typhoon_set_settings.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.cmd_desc = type { ptr }
@EINVAL = common local_unnamed_addr global i32 0, align 4
@AUTONEG_ENABLE = common local_unnamed_addr global i64 0, align 8
@TYPHOON_XCVR_AUTONEG = common local_unnamed_addr global ptr null, align 8
@DUPLEX_HALF = common local_unnamed_addr global i32 0, align 4
@SPEED_10 = common local_unnamed_addr global i32 0, align 4
@TYPHOON_XCVR_10HALF = common local_unnamed_addr global ptr null, align 8
@SPEED_100 = common local_unnamed_addr global i32 0, align 4
@TYPHOON_XCVR_100HALF = common local_unnamed_addr global ptr null, align 8
@DUPLEX_FULL = common local_unnamed_addr global i32 0, align 4
@TYPHOON_XCVR_10FULL = common local_unnamed_addr global ptr null, align 8
@TYPHOON_XCVR_100FULL = common local_unnamed_addr global ptr null, align 8
@TYPHOON_CMD_XCVR_SELECT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @typhoon_set_settings], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @typhoon_set_settings(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = alloca %struct.cmd_desc, align 8
%4 = tail call ptr @netdev_priv(ptr noundef %0) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%5 = load i32, ptr @EINVAL, align 4, !tbaa !6
%6 = sub nsw i32 0, %5
%7 = load i64, ptr %1, align 8, !tbaa !10
%8 = load i64, ptr @AUTONEG_ENABLE, align 8, !tbaa !13
%9 = icmp eq i64 %7, %8
br i1 %9, label %34, label %10
10: ; preds = %2
%11 = getelementptr inbounds i8, ptr %1, i64 8
%12 = load i32, ptr %11, align 8, !tbaa !14
%13 = load i32, ptr @DUPLEX_HALF, align 4, !tbaa !6
%14 = icmp eq i32 %12, %13
br i1 %14, label %15, label %23
15: ; preds = %10
%16 = getelementptr inbounds i8, ptr %1, i64 12
%17 = load i32, ptr %16, align 4, !tbaa !15
%18 = load i32, ptr @SPEED_10, align 4, !tbaa !6
%19 = icmp eq i32 %17, %18
br i1 %19, label %34, label %20
20: ; preds = %15
%21 = load i32, ptr @SPEED_100, align 4, !tbaa !6
%22 = icmp eq i32 %17, %21
br i1 %22, label %34, label %55
23: ; preds = %10
%24 = load i32, ptr @DUPLEX_FULL, align 4, !tbaa !6
%25 = icmp eq i32 %12, %24
br i1 %25, label %26, label %55
26: ; preds = %23
%27 = getelementptr inbounds i8, ptr %1, i64 12
%28 = load i32, ptr %27, align 4, !tbaa !15
%29 = load i32, ptr @SPEED_10, align 4, !tbaa !6
%30 = icmp eq i32 %28, %29
br i1 %30, label %34, label %31
31: ; preds = %26
%32 = load i32, ptr @SPEED_100, align 4, !tbaa !6
%33 = icmp eq i32 %28, %32
br i1 %33, label %34, label %55
34: ; preds = %31, %26, %20, %15, %2
%35 = phi ptr [ @TYPHOON_XCVR_AUTONEG, %2 ], [ @TYPHOON_XCVR_10HALF, %15 ], [ @TYPHOON_XCVR_100HALF, %20 ], [ @TYPHOON_XCVR_10FULL, %26 ], [ @TYPHOON_XCVR_100FULL, %31 ]
%36 = load ptr, ptr %35, align 8, !tbaa !16
%37 = load i32, ptr @TYPHOON_CMD_XCVR_SELECT, align 4, !tbaa !6
%38 = call i32 @INIT_COMMAND_NO_RESPONSE(ptr noundef nonnull %3, i32 noundef %37) #3
store ptr %36, ptr %3, align 8, !tbaa !18
%39 = call i32 @typhoon_issue_command(ptr noundef %4, i32 noundef 1, ptr noundef nonnull %3, i32 noundef 0, ptr noundef null) #3
%40 = icmp slt i32 %39, 0
br i1 %40, label %55, label %41
41: ; preds = %34
%42 = getelementptr inbounds i8, ptr %4, i64 8
store ptr %36, ptr %42, align 8, !tbaa !20
%43 = load i64, ptr %1, align 8, !tbaa !10
%44 = load i64, ptr @AUTONEG_ENABLE, align 8, !tbaa !13
%45 = icmp eq i64 %43, %44
br i1 %45, label %46, label %47
46: ; preds = %41
store i32 255, ptr %4, align 8, !tbaa !22
br label %52
47: ; preds = %41
%48 = getelementptr inbounds i8, ptr %1, i64 12
%49 = load i32, ptr %48, align 4, !tbaa !15
store i32 %49, ptr %4, align 8, !tbaa !22
%50 = getelementptr inbounds i8, ptr %1, i64 8
%51 = load i32, ptr %50, align 8, !tbaa !14
br label %52
52: ; preds = %47, %46
%53 = phi i32 [ 255, %46 ], [ %51, %47 ]
%54 = getelementptr inbounds i8, ptr %4, i64 4
store i32 %53, ptr %54, align 4, !tbaa !23
br label %55
55: ; preds = %52, %34, %23, %31, %20
%56 = phi i32 [ %39, %34 ], [ %6, %20 ], [ %6, %31 ], [ %6, %23 ], [ %39, %52 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %56
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #2
declare i32 @INIT_COMMAND_NO_RESPONSE(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @typhoon_issue_command(ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"ethtool_cmd", !12, i64 0, !7, i64 8, !7, i64 12}
!12 = !{!"long", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!11, !7, i64 8}
!15 = !{!11, !7, i64 12}
!16 = !{!17, !17, i64 0}
!17 = !{!"any pointer", !8, i64 0}
!18 = !{!19, !17, i64 0}
!19 = !{!"cmd_desc", !17, i64 0}
!20 = !{!21, !17, i64 8}
!21 = !{!"typhoon", !7, i64 0, !7, i64 4, !17, i64 8}
!22 = !{!21, !7, i64 0}
!23 = !{!21, !7, i64 4}
| fastsocket_kernel_drivers_net_extr_typhoon.c_typhoon_set_settings |
; ModuleID = 'AnghaBench/openssl/crypto/ec/extr_ec_asn1.c_d2i_ECParameters.c'
source_filename = "AnghaBench/openssl/crypto/ec/extr_ec_asn1.c_d2i_ECParameters.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EC_F_D2I_ECPARAMETERS = dso_local local_unnamed_addr global i32 0, align 4
@ERR_R_PASSED_NULL_PARAMETER = dso_local local_unnamed_addr global i32 0, align 4
@ERR_R_MALLOC_FAILURE = dso_local local_unnamed_addr global i32 0, align 4
@ERR_R_EC_LIB = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local ptr @d2i_ECParameters(ptr noundef %0, ptr noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = icmp eq ptr %1, null
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = load ptr, ptr %1, align 8, !tbaa !5
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %12
8: ; preds = %5, %3
%9 = load i32, ptr @EC_F_D2I_ECPARAMETERS, align 4, !tbaa !9
%10 = load i32, ptr @ERR_R_PASSED_NULL_PARAMETER, align 4, !tbaa !9
%11 = tail call i32 @ECerr(i32 noundef %9, i32 noundef %10) #2
br label %48
12: ; preds = %5
%13 = icmp eq ptr %0, null
br i1 %13, label %17, label %14
14: ; preds = %12
%15 = load ptr, ptr %0, align 8, !tbaa !5
%16 = icmp eq ptr %15, null
br i1 %16, label %17, label %27
17: ; preds = %14, %12
%18 = tail call ptr (...) @EC_KEY_new() #2
%19 = icmp eq ptr %18, null
br i1 %19, label %20, label %24
20: ; preds = %17
%21 = load i32, ptr @EC_F_D2I_ECPARAMETERS, align 4, !tbaa !9
%22 = load i32, ptr @ERR_R_MALLOC_FAILURE, align 4, !tbaa !9
%23 = tail call i32 @ECerr(i32 noundef %21, i32 noundef %22) #2
br label %48
24: ; preds = %17
%25 = tail call i32 @d2i_ECPKParameters(ptr noundef nonnull %18, ptr noundef nonnull %1, i64 noundef %2) #2
%26 = icmp eq i32 %25, 0
br i1 %26, label %34, label %45
27: ; preds = %14
%28 = tail call i32 @d2i_ECPKParameters(ptr noundef nonnull %15, ptr noundef nonnull %1, i64 noundef %2) #2
%29 = icmp eq i32 %28, 0
br i1 %29, label %30, label %46
30: ; preds = %27
%31 = load i32, ptr @EC_F_D2I_ECPARAMETERS, align 4, !tbaa !9
%32 = load i32, ptr @ERR_R_EC_LIB, align 4, !tbaa !9
%33 = tail call i32 @ECerr(i32 noundef %31, i32 noundef %32) #2
br label %38
34: ; preds = %24
%35 = load i32, ptr @EC_F_D2I_ECPARAMETERS, align 4, !tbaa !9
%36 = load i32, ptr @ERR_R_EC_LIB, align 4, !tbaa !9
%37 = tail call i32 @ECerr(i32 noundef %35, i32 noundef %36) #2
br i1 %13, label %42, label %38
38: ; preds = %30, %34
%39 = phi ptr [ %15, %30 ], [ %18, %34 ]
%40 = load ptr, ptr %0, align 8, !tbaa !5
%41 = icmp eq ptr %40, %39
br i1 %41, label %48, label %42
42: ; preds = %38, %34
%43 = phi ptr [ %39, %38 ], [ %18, %34 ]
%44 = tail call i32 @EC_KEY_free(ptr noundef nonnull %43) #2
br label %48
45: ; preds = %24
br i1 %13, label %48, label %46
46: ; preds = %27, %45
%47 = phi ptr [ %18, %45 ], [ %15, %27 ]
store ptr %47, ptr %0, align 8, !tbaa !5
br label %48
48: ; preds = %45, %46, %38, %42, %20, %8
%49 = phi ptr [ null, %8 ], [ null, %20 ], [ null, %42 ], [ null, %38 ], [ %47, %46 ], [ %18, %45 ]
ret ptr %49
}
declare i32 @ECerr(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @EC_KEY_new(...) local_unnamed_addr #1
declare i32 @d2i_ECPKParameters(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @EC_KEY_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/openssl/crypto/ec/extr_ec_asn1.c_d2i_ECParameters.c'
source_filename = "AnghaBench/openssl/crypto/ec/extr_ec_asn1.c_d2i_ECParameters.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EC_F_D2I_ECPARAMETERS = common local_unnamed_addr global i32 0, align 4
@ERR_R_PASSED_NULL_PARAMETER = common local_unnamed_addr global i32 0, align 4
@ERR_R_MALLOC_FAILURE = common local_unnamed_addr global i32 0, align 4
@ERR_R_EC_LIB = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @d2i_ECParameters(ptr noundef %0, ptr noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = icmp eq ptr %1, null
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = load ptr, ptr %1, align 8, !tbaa !6
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %12
8: ; preds = %5, %3
%9 = load i32, ptr @EC_F_D2I_ECPARAMETERS, align 4, !tbaa !10
%10 = load i32, ptr @ERR_R_PASSED_NULL_PARAMETER, align 4, !tbaa !10
%11 = tail call i32 @ECerr(i32 noundef %9, i32 noundef %10) #2
br label %48
12: ; preds = %5
%13 = icmp eq ptr %0, null
br i1 %13, label %17, label %14
14: ; preds = %12
%15 = load ptr, ptr %0, align 8, !tbaa !6
%16 = icmp eq ptr %15, null
br i1 %16, label %17, label %27
17: ; preds = %14, %12
%18 = tail call ptr @EC_KEY_new() #2
%19 = icmp eq ptr %18, null
br i1 %19, label %20, label %24
20: ; preds = %17
%21 = load i32, ptr @EC_F_D2I_ECPARAMETERS, align 4, !tbaa !10
%22 = load i32, ptr @ERR_R_MALLOC_FAILURE, align 4, !tbaa !10
%23 = tail call i32 @ECerr(i32 noundef %21, i32 noundef %22) #2
br label %48
24: ; preds = %17
%25 = tail call i32 @d2i_ECPKParameters(ptr noundef nonnull %18, ptr noundef nonnull %1, i64 noundef %2) #2
%26 = icmp eq i32 %25, 0
br i1 %26, label %34, label %45
27: ; preds = %14
%28 = tail call i32 @d2i_ECPKParameters(ptr noundef nonnull %15, ptr noundef nonnull %1, i64 noundef %2) #2
%29 = icmp eq i32 %28, 0
br i1 %29, label %30, label %46
30: ; preds = %27
%31 = load i32, ptr @EC_F_D2I_ECPARAMETERS, align 4, !tbaa !10
%32 = load i32, ptr @ERR_R_EC_LIB, align 4, !tbaa !10
%33 = tail call i32 @ECerr(i32 noundef %31, i32 noundef %32) #2
br label %38
34: ; preds = %24
%35 = load i32, ptr @EC_F_D2I_ECPARAMETERS, align 4, !tbaa !10
%36 = load i32, ptr @ERR_R_EC_LIB, align 4, !tbaa !10
%37 = tail call i32 @ECerr(i32 noundef %35, i32 noundef %36) #2
br i1 %13, label %42, label %38
38: ; preds = %30, %34
%39 = phi ptr [ %15, %30 ], [ %18, %34 ]
%40 = load ptr, ptr %0, align 8, !tbaa !6
%41 = icmp eq ptr %40, %39
br i1 %41, label %48, label %42
42: ; preds = %38, %34
%43 = phi ptr [ %39, %38 ], [ %18, %34 ]
%44 = tail call i32 @EC_KEY_free(ptr noundef nonnull %43) #2
br label %48
45: ; preds = %24
br i1 %13, label %48, label %46
46: ; preds = %27, %45
%47 = phi ptr [ %18, %45 ], [ %15, %27 ]
store ptr %47, ptr %0, align 8, !tbaa !6
br label %48
48: ; preds = %45, %46, %38, %42, %20, %8
%49 = phi ptr [ null, %8 ], [ null, %20 ], [ null, %42 ], [ null, %38 ], [ %47, %46 ], [ %18, %45 ]
ret ptr %49
}
declare i32 @ECerr(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @EC_KEY_new(...) local_unnamed_addr #1
declare i32 @d2i_ECPKParameters(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @EC_KEY_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| openssl_crypto_ec_extr_ec_asn1.c_d2i_ECParameters |
; ModuleID = 'AnghaBench/freebsd/sys/dev/bxe/extr_bxe.c_bxe_int_mem_test.c'
source_filename = "AnghaBench/freebsd/sys/dev/bxe/extr_bxe.c_bxe_int_mem_test.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@TSDM_REG_ENABLE_IN1 = dso_local local_unnamed_addr global i64 0, align 8
@TCM_REG_PRS_IFEN = dso_local local_unnamed_addr global i64 0, align 8
@CFC_REG_DEBUG0 = dso_local local_unnamed_addr global i64 0, align 8
@NIG_REG_PRS_REQ_IN_EN = dso_local local_unnamed_addr global i64 0, align 8
@PRS_REG_CFC_SEARCH_INITIAL_CREDIT = dso_local local_unnamed_addr global i64 0, align 8
@NIG_REG_STAT2_BRB_OCTET = dso_local local_unnamed_addr global i32 0, align 4
@wb_data = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [22 x i8] c"NIG timeout val=0x%x\0A\00", align 1
@PRS_REG_NUM_OF_PACKETS = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [22 x i8] c"PRS timeout val=0x%x\0A\00", align 1
@GRCBASE_MISC = dso_local local_unnamed_addr global i64 0, align 8
@MISC_REGISTERS_RESET_REG_1_CLEAR = dso_local local_unnamed_addr global i64 0, align 8
@MISC_REGISTERS_RESET_REG_1_SET = dso_local local_unnamed_addr global i64 0, align 8
@BLOCK_BRB1 = dso_local local_unnamed_addr global i32 0, align 4
@PHASE_COMMON = dso_local local_unnamed_addr global i32 0, align 4
@BLOCK_PRS = dso_local local_unnamed_addr global i32 0, align 4
@NIG_REG_INGRESS_EOP_LB_FIFO = dso_local local_unnamed_addr global i32 0, align 4
@NIG_REG_INGRESS_EOP_LB_EMPTY = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [30 x i8] c"clear of NIG failed val=0x%x\0A\00", align 1
@PRS_REG_NIC_MODE = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @bxe_int_mem_test], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @bxe_int_mem_test(ptr noundef %0) #0 {
%2 = tail call i64 @CHIP_REV_IS_FPGA(ptr noundef %0) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @CHIP_REV_IS_EMUL(ptr noundef %0) #2
%6 = icmp eq i64 %5, 0
%7 = select i1 %6, i32 1, i32 200
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 120, %1 ], [ %7, %4 ]
%10 = load i64, ptr @TSDM_REG_ENABLE_IN1, align 8, !tbaa !5
%11 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %10, i32 noundef 0) #2
%12 = load i64, ptr @TCM_REG_PRS_IFEN, align 8, !tbaa !5
%13 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %12, i32 noundef 0) #2
%14 = load i64, ptr @CFC_REG_DEBUG0, align 8, !tbaa !5
%15 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %14, i32 noundef 1) #2
%16 = load i64, ptr @NIG_REG_PRS_REQ_IN_EN, align 8, !tbaa !5
%17 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %16, i32 noundef 0) #2
%18 = load i64, ptr @PRS_REG_CFC_SEARCH_INITIAL_CREDIT, align 8, !tbaa !5
%19 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %18, i32 noundef 0) #2
%20 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%21 = mul nuw nsw i32 %9, 1000
br label %22
22: ; preds = %8, %31
%23 = phi i32 [ %21, %8 ], [ %33, %31 ]
%24 = load i32, ptr @NIG_REG_STAT2_BRB_OCTET, align 4, !tbaa !9
%25 = tail call i32 @bxe_read_dmae(ptr noundef %0, i32 noundef %24, i32 noundef 2) #2
%26 = load ptr, ptr @wb_data, align 8, !tbaa !11
%27 = load i32, ptr %26, align 4, !tbaa !9
%28 = tail call ptr @BXE_SP(ptr noundef %0, i32 noundef %27) #2
%29 = load i32, ptr %28, align 4, !tbaa !9
%30 = icmp eq i32 %29, 16
br i1 %30, label %37, label %31
31: ; preds = %22
%32 = tail call i32 @DELAY(i32 noundef 10000) #2
%33 = add nsw i32 %23, -1
%34 = icmp eq i32 %33, 0
br i1 %34, label %35, label %22, !llvm.loop !13
35: ; preds = %31
%36 = tail call i32 @BLOGE(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %29) #2
br label %175
37: ; preds = %22, %42
%38 = phi i32 [ %44, %42 ], [ %21, %22 ]
%39 = load i32, ptr @PRS_REG_NUM_OF_PACKETS, align 4, !tbaa !9
%40 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %39) #2
%41 = icmp eq i32 %40, 1
br i1 %41, label %48, label %42
42: ; preds = %37
%43 = tail call i32 @DELAY(i32 noundef 10000) #2
%44 = add nsw i32 %38, -1
%45 = icmp eq i32 %44, 0
br i1 %45, label %46, label %37, !llvm.loop !15
46: ; preds = %42
%47 = tail call i32 @BLOGE(ptr noundef %0, ptr noundef nonnull @.str.1, i32 noundef %40) #2
br label %175
48: ; preds = %37
%49 = load i64, ptr @GRCBASE_MISC, align 8, !tbaa !5
%50 = load i64, ptr @MISC_REGISTERS_RESET_REG_1_CLEAR, align 8, !tbaa !5
%51 = add nsw i64 %50, %49
%52 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %51, i32 noundef 3) #2
%53 = tail call i32 @DELAY(i32 noundef 50000) #2
%54 = load i64, ptr @GRCBASE_MISC, align 8, !tbaa !5
%55 = load i64, ptr @MISC_REGISTERS_RESET_REG_1_SET, align 8, !tbaa !5
%56 = add nsw i64 %55, %54
%57 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %56, i32 noundef 3) #2
%58 = tail call i32 @DELAY(i32 noundef 50000) #2
%59 = load i32, ptr @BLOCK_BRB1, align 4, !tbaa !9
%60 = load i32, ptr @PHASE_COMMON, align 4, !tbaa !9
%61 = tail call i32 @ecore_init_block(ptr noundef %0, i32 noundef %59, i32 noundef %60) #2
%62 = load i32, ptr @BLOCK_PRS, align 4, !tbaa !9
%63 = load i32, ptr @PHASE_COMMON, align 4, !tbaa !9
%64 = tail call i32 @ecore_init_block(ptr noundef %0, i32 noundef %62, i32 noundef %63) #2
%65 = load i64, ptr @TSDM_REG_ENABLE_IN1, align 8, !tbaa !5
%66 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %65, i32 noundef 0) #2
%67 = load i64, ptr @TCM_REG_PRS_IFEN, align 8, !tbaa !5
%68 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %67, i32 noundef 0) #2
%69 = load i64, ptr @CFC_REG_DEBUG0, align 8, !tbaa !5
%70 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %69, i32 noundef 1) #2
%71 = load i64, ptr @NIG_REG_PRS_REQ_IN_EN, align 8, !tbaa !5
%72 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %71, i32 noundef 0) #2
%73 = load i64, ptr @PRS_REG_CFC_SEARCH_INITIAL_CREDIT, align 8, !tbaa !5
%74 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %73, i32 noundef 0) #2
%75 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%76 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%77 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%78 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%79 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%80 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%81 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%82 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%83 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%84 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
br label %85
85: ; preds = %48, %94
%86 = phi i32 [ %96, %94 ], [ %21, %48 ]
%87 = load i32, ptr @NIG_REG_STAT2_BRB_OCTET, align 4, !tbaa !9
%88 = tail call i32 @bxe_read_dmae(ptr noundef %0, i32 noundef %87, i32 noundef 2) #2
%89 = load ptr, ptr @wb_data, align 8, !tbaa !11
%90 = load i32, ptr %89, align 4, !tbaa !9
%91 = tail call ptr @BXE_SP(ptr noundef %0, i32 noundef %90) #2
%92 = load i32, ptr %91, align 4, !tbaa !9
%93 = icmp eq i32 %92, 176
br i1 %93, label %100, label %94
94: ; preds = %85
%95 = tail call i32 @DELAY(i32 noundef 10000) #2
%96 = add nsw i32 %86, -1
%97 = icmp eq i32 %96, 0
br i1 %97, label %98, label %85, !llvm.loop !16
98: ; preds = %94
%99 = tail call i32 @BLOGE(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %92) #2
br label %175
100: ; preds = %85
%101 = load i32, ptr @PRS_REG_NUM_OF_PACKETS, align 4, !tbaa !9
%102 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %101) #2
%103 = icmp eq i32 %102, 2
br i1 %103, label %106, label %104
104: ; preds = %100
%105 = tail call i32 @BLOGE(ptr noundef %0, ptr noundef nonnull @.str.1, i32 noundef %102) #2
br label %106
106: ; preds = %104, %100
%107 = load i64, ptr @PRS_REG_CFC_SEARCH_INITIAL_CREDIT, align 8, !tbaa !5
%108 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %107, i32 noundef 1) #2
%109 = mul nuw nsw i32 %9, 10000
%110 = tail call i32 @DELAY(i32 noundef %109) #2
%111 = load i32, ptr @PRS_REG_NUM_OF_PACKETS, align 4, !tbaa !9
%112 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %111) #2
%113 = icmp eq i32 %112, 3
br i1 %113, label %116, label %114
114: ; preds = %106
%115 = tail call i32 @BLOGE(ptr noundef %0, ptr noundef nonnull @.str.1, i32 noundef %112) #2
br label %116
116: ; preds = %114, %106
%117 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !9
%118 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %117) #2
%119 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !9
%120 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %119) #2
%121 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !9
%122 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %121) #2
%123 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !9
%124 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %123) #2
%125 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !9
%126 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %125) #2
%127 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !9
%128 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %127) #2
%129 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !9
%130 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %129) #2
%131 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !9
%132 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %131) #2
%133 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !9
%134 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %133) #2
%135 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !9
%136 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %135) #2
%137 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !9
%138 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %137) #2
%139 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_EMPTY, align 4, !tbaa !9
%140 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %139) #2
%141 = icmp eq i32 %140, 1
br i1 %141, label %144, label %142
142: ; preds = %116
%143 = tail call i32 @BLOGE(ptr noundef %0, ptr noundef nonnull @.str.2, i32 noundef %140) #2
br label %175
144: ; preds = %116
%145 = load i64, ptr @GRCBASE_MISC, align 8, !tbaa !5
%146 = load i64, ptr @MISC_REGISTERS_RESET_REG_1_CLEAR, align 8, !tbaa !5
%147 = add nsw i64 %146, %145
%148 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %147, i32 noundef 3) #2
%149 = tail call i32 @DELAY(i32 noundef 50000) #2
%150 = load i64, ptr @GRCBASE_MISC, align 8, !tbaa !5
%151 = load i64, ptr @MISC_REGISTERS_RESET_REG_1_SET, align 8, !tbaa !5
%152 = add nsw i64 %151, %150
%153 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %152, i32 noundef 3) #2
%154 = tail call i32 @DELAY(i32 noundef 50000) #2
%155 = load i32, ptr @BLOCK_BRB1, align 4, !tbaa !9
%156 = load i32, ptr @PHASE_COMMON, align 4, !tbaa !9
%157 = tail call i32 @ecore_init_block(ptr noundef %0, i32 noundef %155, i32 noundef %156) #2
%158 = load i32, ptr @BLOCK_PRS, align 4, !tbaa !9
%159 = load i32, ptr @PHASE_COMMON, align 4, !tbaa !9
%160 = tail call i32 @ecore_init_block(ptr noundef %0, i32 noundef %158, i32 noundef %159) #2
%161 = tail call i32 @CNIC_SUPPORT(ptr noundef %0) #2
%162 = icmp eq i32 %161, 0
br i1 %162, label %163, label %166
163: ; preds = %144
%164 = load i64, ptr @PRS_REG_NIC_MODE, align 8, !tbaa !5
%165 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %164, i32 noundef 1) #2
br label %166
166: ; preds = %163, %144
%167 = load i64, ptr @TSDM_REG_ENABLE_IN1, align 8, !tbaa !5
%168 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %167, i32 noundef 2147483647) #2
%169 = load i64, ptr @TCM_REG_PRS_IFEN, align 8, !tbaa !5
%170 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %169, i32 noundef 1) #2
%171 = load i64, ptr @CFC_REG_DEBUG0, align 8, !tbaa !5
%172 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %171, i32 noundef 0) #2
%173 = load i64, ptr @NIG_REG_PRS_REQ_IN_EN, align 8, !tbaa !5
%174 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %173, i32 noundef 1) #2
br label %175
175: ; preds = %166, %142, %98, %46, %35
%176 = phi i32 [ -1, %35 ], [ -2, %46 ], [ -3, %98 ], [ -4, %142 ], [ 0, %166 ]
ret i32 %176
}
declare i64 @CHIP_REV_IS_FPGA(ptr noundef) local_unnamed_addr #1
declare i64 @CHIP_REV_IS_EMUL(ptr noundef) local_unnamed_addr #1
declare i32 @REG_WR(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bxe_lb_pckt(ptr noundef) local_unnamed_addr #1
declare i32 @bxe_read_dmae(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @BXE_SP(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DELAY(i32 noundef) local_unnamed_addr #1
declare i32 @BLOGE(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @REG_RD(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ecore_init_block(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @CNIC_SUPPORT(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/bxe/extr_bxe.c_bxe_int_mem_test.c'
source_filename = "AnghaBench/freebsd/sys/dev/bxe/extr_bxe.c_bxe_int_mem_test.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TSDM_REG_ENABLE_IN1 = common local_unnamed_addr global i64 0, align 8
@TCM_REG_PRS_IFEN = common local_unnamed_addr global i64 0, align 8
@CFC_REG_DEBUG0 = common local_unnamed_addr global i64 0, align 8
@NIG_REG_PRS_REQ_IN_EN = common local_unnamed_addr global i64 0, align 8
@PRS_REG_CFC_SEARCH_INITIAL_CREDIT = common local_unnamed_addr global i64 0, align 8
@NIG_REG_STAT2_BRB_OCTET = common local_unnamed_addr global i32 0, align 4
@wb_data = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [22 x i8] c"NIG timeout val=0x%x\0A\00", align 1
@PRS_REG_NUM_OF_PACKETS = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [22 x i8] c"PRS timeout val=0x%x\0A\00", align 1
@GRCBASE_MISC = common local_unnamed_addr global i64 0, align 8
@MISC_REGISTERS_RESET_REG_1_CLEAR = common local_unnamed_addr global i64 0, align 8
@MISC_REGISTERS_RESET_REG_1_SET = common local_unnamed_addr global i64 0, align 8
@BLOCK_BRB1 = common local_unnamed_addr global i32 0, align 4
@PHASE_COMMON = common local_unnamed_addr global i32 0, align 4
@BLOCK_PRS = common local_unnamed_addr global i32 0, align 4
@NIG_REG_INGRESS_EOP_LB_FIFO = common local_unnamed_addr global i32 0, align 4
@NIG_REG_INGRESS_EOP_LB_EMPTY = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [30 x i8] c"clear of NIG failed val=0x%x\0A\00", align 1
@PRS_REG_NIC_MODE = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @bxe_int_mem_test], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -4, 1) i32 @bxe_int_mem_test(ptr noundef %0) #0 {
%2 = tail call i64 @CHIP_REV_IS_FPGA(ptr noundef %0) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @CHIP_REV_IS_EMUL(ptr noundef %0) #2
%6 = icmp eq i64 %5, 0
%7 = select i1 %6, i32 1, i32 200
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 120, %1 ], [ %7, %4 ]
%10 = load i64, ptr @TSDM_REG_ENABLE_IN1, align 8, !tbaa !6
%11 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %10, i32 noundef 0) #2
%12 = load i64, ptr @TCM_REG_PRS_IFEN, align 8, !tbaa !6
%13 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %12, i32 noundef 0) #2
%14 = load i64, ptr @CFC_REG_DEBUG0, align 8, !tbaa !6
%15 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %14, i32 noundef 1) #2
%16 = load i64, ptr @NIG_REG_PRS_REQ_IN_EN, align 8, !tbaa !6
%17 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %16, i32 noundef 0) #2
%18 = load i64, ptr @PRS_REG_CFC_SEARCH_INITIAL_CREDIT, align 8, !tbaa !6
%19 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %18, i32 noundef 0) #2
%20 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%21 = mul nuw nsw i32 %9, 1000
br label %22
22: ; preds = %8, %31
%23 = phi i32 [ %21, %8 ], [ %33, %31 ]
%24 = load i32, ptr @NIG_REG_STAT2_BRB_OCTET, align 4, !tbaa !10
%25 = tail call i32 @bxe_read_dmae(ptr noundef %0, i32 noundef %24, i32 noundef 2) #2
%26 = load ptr, ptr @wb_data, align 8, !tbaa !12
%27 = load i32, ptr %26, align 4, !tbaa !10
%28 = tail call ptr @BXE_SP(ptr noundef %0, i32 noundef %27) #2
%29 = load i32, ptr %28, align 4, !tbaa !10
%30 = icmp eq i32 %29, 16
br i1 %30, label %37, label %31
31: ; preds = %22
%32 = tail call i32 @DELAY(i32 noundef 10000) #2
%33 = add nsw i32 %23, -1
%34 = icmp eq i32 %33, 0
br i1 %34, label %35, label %22, !llvm.loop !14
35: ; preds = %31
%36 = tail call i32 @BLOGE(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %29) #2
br label %175
37: ; preds = %22, %42
%38 = phi i32 [ %44, %42 ], [ %21, %22 ]
%39 = load i32, ptr @PRS_REG_NUM_OF_PACKETS, align 4, !tbaa !10
%40 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %39) #2
%41 = icmp eq i32 %40, 1
br i1 %41, label %48, label %42
42: ; preds = %37
%43 = tail call i32 @DELAY(i32 noundef 10000) #2
%44 = add nsw i32 %38, -1
%45 = icmp eq i32 %44, 0
br i1 %45, label %46, label %37, !llvm.loop !16
46: ; preds = %42
%47 = tail call i32 @BLOGE(ptr noundef %0, ptr noundef nonnull @.str.1, i32 noundef %40) #2
br label %175
48: ; preds = %37
%49 = load i64, ptr @GRCBASE_MISC, align 8, !tbaa !6
%50 = load i64, ptr @MISC_REGISTERS_RESET_REG_1_CLEAR, align 8, !tbaa !6
%51 = add nsw i64 %50, %49
%52 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %51, i32 noundef 3) #2
%53 = tail call i32 @DELAY(i32 noundef 50000) #2
%54 = load i64, ptr @GRCBASE_MISC, align 8, !tbaa !6
%55 = load i64, ptr @MISC_REGISTERS_RESET_REG_1_SET, align 8, !tbaa !6
%56 = add nsw i64 %55, %54
%57 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %56, i32 noundef 3) #2
%58 = tail call i32 @DELAY(i32 noundef 50000) #2
%59 = load i32, ptr @BLOCK_BRB1, align 4, !tbaa !10
%60 = load i32, ptr @PHASE_COMMON, align 4, !tbaa !10
%61 = tail call i32 @ecore_init_block(ptr noundef %0, i32 noundef %59, i32 noundef %60) #2
%62 = load i32, ptr @BLOCK_PRS, align 4, !tbaa !10
%63 = load i32, ptr @PHASE_COMMON, align 4, !tbaa !10
%64 = tail call i32 @ecore_init_block(ptr noundef %0, i32 noundef %62, i32 noundef %63) #2
%65 = load i64, ptr @TSDM_REG_ENABLE_IN1, align 8, !tbaa !6
%66 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %65, i32 noundef 0) #2
%67 = load i64, ptr @TCM_REG_PRS_IFEN, align 8, !tbaa !6
%68 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %67, i32 noundef 0) #2
%69 = load i64, ptr @CFC_REG_DEBUG0, align 8, !tbaa !6
%70 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %69, i32 noundef 1) #2
%71 = load i64, ptr @NIG_REG_PRS_REQ_IN_EN, align 8, !tbaa !6
%72 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %71, i32 noundef 0) #2
%73 = load i64, ptr @PRS_REG_CFC_SEARCH_INITIAL_CREDIT, align 8, !tbaa !6
%74 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %73, i32 noundef 0) #2
%75 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%76 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%77 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%78 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%79 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%80 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%81 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%82 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%83 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
%84 = tail call i32 @bxe_lb_pckt(ptr noundef %0) #2
br label %85
85: ; preds = %48, %94
%86 = phi i32 [ %96, %94 ], [ %21, %48 ]
%87 = load i32, ptr @NIG_REG_STAT2_BRB_OCTET, align 4, !tbaa !10
%88 = tail call i32 @bxe_read_dmae(ptr noundef %0, i32 noundef %87, i32 noundef 2) #2
%89 = load ptr, ptr @wb_data, align 8, !tbaa !12
%90 = load i32, ptr %89, align 4, !tbaa !10
%91 = tail call ptr @BXE_SP(ptr noundef %0, i32 noundef %90) #2
%92 = load i32, ptr %91, align 4, !tbaa !10
%93 = icmp eq i32 %92, 176
br i1 %93, label %100, label %94
94: ; preds = %85
%95 = tail call i32 @DELAY(i32 noundef 10000) #2
%96 = add nsw i32 %86, -1
%97 = icmp eq i32 %96, 0
br i1 %97, label %98, label %85, !llvm.loop !17
98: ; preds = %94
%99 = tail call i32 @BLOGE(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %92) #2
br label %175
100: ; preds = %85
%101 = load i32, ptr @PRS_REG_NUM_OF_PACKETS, align 4, !tbaa !10
%102 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %101) #2
%103 = icmp eq i32 %102, 2
br i1 %103, label %106, label %104
104: ; preds = %100
%105 = tail call i32 @BLOGE(ptr noundef %0, ptr noundef nonnull @.str.1, i32 noundef %102) #2
br label %106
106: ; preds = %104, %100
%107 = load i64, ptr @PRS_REG_CFC_SEARCH_INITIAL_CREDIT, align 8, !tbaa !6
%108 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %107, i32 noundef 1) #2
%109 = mul nuw nsw i32 %9, 10000
%110 = tail call i32 @DELAY(i32 noundef %109) #2
%111 = load i32, ptr @PRS_REG_NUM_OF_PACKETS, align 4, !tbaa !10
%112 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %111) #2
%113 = icmp eq i32 %112, 3
br i1 %113, label %116, label %114
114: ; preds = %106
%115 = tail call i32 @BLOGE(ptr noundef %0, ptr noundef nonnull @.str.1, i32 noundef %112) #2
br label %116
116: ; preds = %114, %106
%117 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !10
%118 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %117) #2
%119 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !10
%120 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %119) #2
%121 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !10
%122 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %121) #2
%123 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !10
%124 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %123) #2
%125 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !10
%126 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %125) #2
%127 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !10
%128 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %127) #2
%129 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !10
%130 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %129) #2
%131 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !10
%132 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %131) #2
%133 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !10
%134 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %133) #2
%135 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !10
%136 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %135) #2
%137 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_FIFO, align 4, !tbaa !10
%138 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %137) #2
%139 = load i32, ptr @NIG_REG_INGRESS_EOP_LB_EMPTY, align 4, !tbaa !10
%140 = tail call i32 @REG_RD(ptr noundef %0, i32 noundef %139) #2
%141 = icmp eq i32 %140, 1
br i1 %141, label %144, label %142
142: ; preds = %116
%143 = tail call i32 @BLOGE(ptr noundef %0, ptr noundef nonnull @.str.2, i32 noundef %140) #2
br label %175
144: ; preds = %116
%145 = load i64, ptr @GRCBASE_MISC, align 8, !tbaa !6
%146 = load i64, ptr @MISC_REGISTERS_RESET_REG_1_CLEAR, align 8, !tbaa !6
%147 = add nsw i64 %146, %145
%148 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %147, i32 noundef 3) #2
%149 = tail call i32 @DELAY(i32 noundef 50000) #2
%150 = load i64, ptr @GRCBASE_MISC, align 8, !tbaa !6
%151 = load i64, ptr @MISC_REGISTERS_RESET_REG_1_SET, align 8, !tbaa !6
%152 = add nsw i64 %151, %150
%153 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %152, i32 noundef 3) #2
%154 = tail call i32 @DELAY(i32 noundef 50000) #2
%155 = load i32, ptr @BLOCK_BRB1, align 4, !tbaa !10
%156 = load i32, ptr @PHASE_COMMON, align 4, !tbaa !10
%157 = tail call i32 @ecore_init_block(ptr noundef %0, i32 noundef %155, i32 noundef %156) #2
%158 = load i32, ptr @BLOCK_PRS, align 4, !tbaa !10
%159 = load i32, ptr @PHASE_COMMON, align 4, !tbaa !10
%160 = tail call i32 @ecore_init_block(ptr noundef %0, i32 noundef %158, i32 noundef %159) #2
%161 = tail call i32 @CNIC_SUPPORT(ptr noundef %0) #2
%162 = icmp eq i32 %161, 0
br i1 %162, label %163, label %166
163: ; preds = %144
%164 = load i64, ptr @PRS_REG_NIC_MODE, align 8, !tbaa !6
%165 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %164, i32 noundef 1) #2
br label %166
166: ; preds = %163, %144
%167 = load i64, ptr @TSDM_REG_ENABLE_IN1, align 8, !tbaa !6
%168 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %167, i32 noundef 2147483647) #2
%169 = load i64, ptr @TCM_REG_PRS_IFEN, align 8, !tbaa !6
%170 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %169, i32 noundef 1) #2
%171 = load i64, ptr @CFC_REG_DEBUG0, align 8, !tbaa !6
%172 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %171, i32 noundef 0) #2
%173 = load i64, ptr @NIG_REG_PRS_REQ_IN_EN, align 8, !tbaa !6
%174 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %173, i32 noundef 1) #2
br label %175
175: ; preds = %166, %142, %98, %46, %35
%176 = phi i32 [ -1, %35 ], [ -2, %46 ], [ -3, %98 ], [ -4, %142 ], [ 0, %166 ]
ret i32 %176
}
declare i64 @CHIP_REV_IS_FPGA(ptr noundef) local_unnamed_addr #1
declare i64 @CHIP_REV_IS_EMUL(ptr noundef) local_unnamed_addr #1
declare i32 @REG_WR(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bxe_lb_pckt(ptr noundef) local_unnamed_addr #1
declare i32 @bxe_read_dmae(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @BXE_SP(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DELAY(i32 noundef) local_unnamed_addr #1
declare i32 @BLOGE(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @REG_RD(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ecore_init_block(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @CNIC_SUPPORT(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
!17 = distinct !{!17, !15}
| freebsd_sys_dev_bxe_extr_bxe.c_bxe_int_mem_test |
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_asvenc.c_dct_get.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_asvenc.c_dct_get.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_12__ = type { %struct.TYPE_10__, %struct.TYPE_9__, ptr, i32 }
%struct.TYPE_10__ = type { ptr }
%struct.TYPE_9__ = type { ptr }
%struct.TYPE_11__ = type { ptr, ptr }
@block = dso_local local_unnamed_addr global ptr null, align 8
@AV_CODEC_FLAG_GRAY = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @dct_get], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @dct_get(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = getelementptr inbounds %struct.TYPE_12__, ptr %0, i64 0, i32 3
%6 = load i32, ptr %5, align 8, !tbaa !5
%7 = load ptr, ptr @block, align 8, !tbaa !13
%8 = load i32, ptr %7, align 4, !tbaa !14
%9 = tail call ptr @int16_t(i32 noundef %8) #2
%10 = getelementptr inbounds i32, ptr %9, i64 64
store i32 %6, ptr %10, align 4, !tbaa !14
%11 = load ptr, ptr %1, align 8, !tbaa !15
%12 = load i32, ptr %11, align 4, !tbaa !14
%13 = getelementptr inbounds %struct.TYPE_11__, ptr %1, i64 0, i32 1
%14 = load ptr, ptr %13, align 8, !tbaa !17
%15 = load ptr, ptr %14, align 8, !tbaa !13
%16 = shl nsw i32 %3, 4
%17 = mul nsw i32 %16, %12
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i32, ptr %15, i64 %18
%20 = shl nsw i32 %2, 4
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i32, ptr %19, i64 %21
%23 = getelementptr inbounds ptr, ptr %14, i64 1
%24 = load ptr, ptr %23, align 8, !tbaa !13
%25 = getelementptr inbounds i32, ptr %11, i64 1
%26 = load i32, ptr %25, align 4, !tbaa !14
%27 = getelementptr inbounds ptr, ptr %14, i64 2
%28 = load ptr, ptr %27, align 8, !tbaa !13
%29 = getelementptr inbounds i32, ptr %11, i64 2
%30 = load i32, ptr %29, align 4, !tbaa !14
%31 = getelementptr inbounds %struct.TYPE_12__, ptr %0, i64 0, i32 1
%32 = load ptr, ptr %31, align 8, !tbaa !18
%33 = load ptr, ptr @block, align 8, !tbaa !13
%34 = load i32, ptr %33, align 4, !tbaa !14
%35 = tail call i32 %32(i32 noundef %34, ptr noundef %22, i32 noundef %12) #2
%36 = load ptr, ptr %31, align 8, !tbaa !18
%37 = load ptr, ptr @block, align 8, !tbaa !13
%38 = getelementptr inbounds i32, ptr %37, i64 1
%39 = load i32, ptr %38, align 4, !tbaa !14
%40 = getelementptr inbounds i32, ptr %22, i64 8
%41 = tail call i32 %36(i32 noundef %39, ptr noundef nonnull %40, i32 noundef %12) #2
%42 = load ptr, ptr %31, align 8, !tbaa !18
%43 = load ptr, ptr @block, align 8, !tbaa !13
%44 = getelementptr inbounds i32, ptr %43, i64 2
%45 = load i32, ptr %44, align 4, !tbaa !14
%46 = shl nsw i32 %12, 3
%47 = sext i32 %46 to i64
%48 = getelementptr inbounds i32, ptr %22, i64 %47
%49 = tail call i32 %42(i32 noundef %45, ptr noundef %48, i32 noundef %12) #2
%50 = load ptr, ptr %31, align 8, !tbaa !18
%51 = load ptr, ptr @block, align 8, !tbaa !13
%52 = getelementptr inbounds i32, ptr %51, i64 3
%53 = load i32, ptr %52, align 4, !tbaa !14
%54 = getelementptr inbounds i32, ptr %48, i64 8
%55 = tail call i32 %50(i32 noundef %53, ptr noundef nonnull %54, i32 noundef %12) #2
%56 = load ptr, ptr %0, align 8, !tbaa !19
%57 = load ptr, ptr @block, align 8, !tbaa !13
%58 = load i32, ptr %57, align 4, !tbaa !14
%59 = tail call i32 %56(i32 noundef %58) #2
%60 = load ptr, ptr %0, align 8, !tbaa !19
%61 = load ptr, ptr @block, align 8, !tbaa !13
%62 = getelementptr inbounds i32, ptr %61, i64 1
%63 = load i32, ptr %62, align 4, !tbaa !14
%64 = tail call i32 %60(i32 noundef %63) #2
%65 = load ptr, ptr %0, align 8, !tbaa !19
%66 = load ptr, ptr @block, align 8, !tbaa !13
%67 = getelementptr inbounds i32, ptr %66, i64 2
%68 = load i32, ptr %67, align 4, !tbaa !14
%69 = tail call i32 %65(i32 noundef %68) #2
%70 = load ptr, ptr %0, align 8, !tbaa !19
%71 = load ptr, ptr @block, align 8, !tbaa !13
%72 = getelementptr inbounds i32, ptr %71, i64 3
%73 = load i32, ptr %72, align 4, !tbaa !14
%74 = tail call i32 %70(i32 noundef %73) #2
%75 = getelementptr inbounds %struct.TYPE_12__, ptr %0, i64 0, i32 2
%76 = load ptr, ptr %75, align 8, !tbaa !20
%77 = load i32, ptr %76, align 4, !tbaa !21
%78 = load i32, ptr @AV_CODEC_FLAG_GRAY, align 4, !tbaa !14
%79 = and i32 %78, %77
%80 = icmp eq i32 %79, 0
br i1 %80, label %81, label %119
81: ; preds = %4
%82 = shl nsw i32 %3, 3
%83 = mul nsw i32 %30, %82
%84 = sext i32 %83 to i64
%85 = getelementptr inbounds i32, ptr %28, i64 %84
%86 = shl nsw i32 %2, 3
%87 = sext i32 %86 to i64
%88 = getelementptr inbounds i32, ptr %85, i64 %87
%89 = mul nsw i32 %26, %82
%90 = sext i32 %89 to i64
%91 = getelementptr inbounds i32, ptr %24, i64 %90
%92 = getelementptr inbounds i32, ptr %91, i64 %87
%93 = load ptr, ptr %31, align 8, !tbaa !18
%94 = load ptr, ptr @block, align 8, !tbaa !13
%95 = getelementptr inbounds i32, ptr %94, i64 4
%96 = load i32, ptr %95, align 4, !tbaa !14
%97 = load ptr, ptr %1, align 8, !tbaa !15
%98 = getelementptr inbounds i32, ptr %97, i64 1
%99 = load i32, ptr %98, align 4, !tbaa !14
%100 = tail call i32 %93(i32 noundef %96, ptr noundef %92, i32 noundef %99) #2
%101 = load ptr, ptr %31, align 8, !tbaa !18
%102 = load ptr, ptr @block, align 8, !tbaa !13
%103 = getelementptr inbounds i32, ptr %102, i64 5
%104 = load i32, ptr %103, align 4, !tbaa !14
%105 = load ptr, ptr %1, align 8, !tbaa !15
%106 = getelementptr inbounds i32, ptr %105, i64 2
%107 = load i32, ptr %106, align 4, !tbaa !14
%108 = tail call i32 %101(i32 noundef %104, ptr noundef %88, i32 noundef %107) #2
%109 = load ptr, ptr %0, align 8, !tbaa !19
%110 = load ptr, ptr @block, align 8, !tbaa !13
%111 = getelementptr inbounds i32, ptr %110, i64 4
%112 = load i32, ptr %111, align 4, !tbaa !14
%113 = tail call i32 %109(i32 noundef %112) #2
%114 = load ptr, ptr %0, align 8, !tbaa !19
%115 = load ptr, ptr @block, align 8, !tbaa !13
%116 = getelementptr inbounds i32, ptr %115, i64 5
%117 = load i32, ptr %116, align 4, !tbaa !14
%118 = tail call i32 %114(i32 noundef %117) #2
br label %119
119: ; preds = %81, %4
ret void
}
declare ptr @int16_t(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !12, i64 24}
!6 = !{!"TYPE_12__", !7, i64 0, !11, i64 8, !8, i64 16, !12, i64 24}
!7 = !{!"TYPE_10__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_9__", !8, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!12, !12, i64 0}
!15 = !{!16, !8, i64 0}
!16 = !{!"TYPE_11__", !8, i64 0, !8, i64 8}
!17 = !{!16, !8, i64 8}
!18 = !{!6, !8, i64 8}
!19 = !{!6, !8, i64 0}
!20 = !{!6, !8, i64 16}
!21 = !{!22, !12, i64 0}
!22 = !{!"TYPE_8__", !12, i64 0}
| ; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_asvenc.c_dct_get.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_asvenc.c_dct_get.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@block = common local_unnamed_addr global ptr null, align 8
@AV_CODEC_FLAG_GRAY = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @dct_get], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @dct_get(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = getelementptr inbounds i8, ptr %0, i64 24
%6 = load i32, ptr %5, align 8, !tbaa !6
%7 = load ptr, ptr @block, align 8, !tbaa !14
%8 = load i32, ptr %7, align 4, !tbaa !15
%9 = tail call ptr @int16_t(i32 noundef %8) #2
%10 = getelementptr inbounds i8, ptr %9, i64 256
store i32 %6, ptr %10, align 4, !tbaa !15
%11 = load ptr, ptr %1, align 8, !tbaa !16
%12 = load i32, ptr %11, align 4, !tbaa !15
%13 = getelementptr inbounds i8, ptr %1, i64 8
%14 = load ptr, ptr %13, align 8, !tbaa !18
%15 = load ptr, ptr %14, align 8, !tbaa !14
%16 = shl nsw i32 %3, 4
%17 = mul nsw i32 %16, %12
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i32, ptr %15, i64 %18
%20 = shl nsw i32 %2, 4
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i32, ptr %19, i64 %21
%23 = getelementptr inbounds i8, ptr %14, i64 8
%24 = load ptr, ptr %23, align 8, !tbaa !14
%25 = getelementptr inbounds i8, ptr %11, i64 4
%26 = load i32, ptr %25, align 4, !tbaa !15
%27 = getelementptr inbounds i8, ptr %14, i64 16
%28 = load ptr, ptr %27, align 8, !tbaa !14
%29 = getelementptr inbounds i8, ptr %11, i64 8
%30 = load i32, ptr %29, align 4, !tbaa !15
%31 = getelementptr inbounds i8, ptr %0, i64 8
%32 = load ptr, ptr %31, align 8, !tbaa !19
%33 = load ptr, ptr @block, align 8, !tbaa !14
%34 = load i32, ptr %33, align 4, !tbaa !15
%35 = tail call i32 %32(i32 noundef %34, ptr noundef %22, i32 noundef %12) #2
%36 = load ptr, ptr %31, align 8, !tbaa !19
%37 = load ptr, ptr @block, align 8, !tbaa !14
%38 = getelementptr inbounds i8, ptr %37, i64 4
%39 = load i32, ptr %38, align 4, !tbaa !15
%40 = getelementptr inbounds i8, ptr %22, i64 32
%41 = tail call i32 %36(i32 noundef %39, ptr noundef nonnull %40, i32 noundef %12) #2
%42 = load ptr, ptr %31, align 8, !tbaa !19
%43 = load ptr, ptr @block, align 8, !tbaa !14
%44 = getelementptr inbounds i8, ptr %43, i64 8
%45 = load i32, ptr %44, align 4, !tbaa !15
%46 = shl nsw i32 %12, 3
%47 = sext i32 %46 to i64
%48 = getelementptr inbounds i32, ptr %22, i64 %47
%49 = tail call i32 %42(i32 noundef %45, ptr noundef %48, i32 noundef %12) #2
%50 = load ptr, ptr %31, align 8, !tbaa !19
%51 = load ptr, ptr @block, align 8, !tbaa !14
%52 = getelementptr inbounds i8, ptr %51, i64 12
%53 = load i32, ptr %52, align 4, !tbaa !15
%54 = getelementptr inbounds i8, ptr %48, i64 32
%55 = tail call i32 %50(i32 noundef %53, ptr noundef nonnull %54, i32 noundef %12) #2
%56 = load ptr, ptr %0, align 8, !tbaa !20
%57 = load ptr, ptr @block, align 8, !tbaa !14
%58 = load i32, ptr %57, align 4, !tbaa !15
%59 = tail call i32 %56(i32 noundef %58) #2
%60 = load ptr, ptr %0, align 8, !tbaa !20
%61 = load ptr, ptr @block, align 8, !tbaa !14
%62 = getelementptr inbounds i8, ptr %61, i64 4
%63 = load i32, ptr %62, align 4, !tbaa !15
%64 = tail call i32 %60(i32 noundef %63) #2
%65 = load ptr, ptr %0, align 8, !tbaa !20
%66 = load ptr, ptr @block, align 8, !tbaa !14
%67 = getelementptr inbounds i8, ptr %66, i64 8
%68 = load i32, ptr %67, align 4, !tbaa !15
%69 = tail call i32 %65(i32 noundef %68) #2
%70 = load ptr, ptr %0, align 8, !tbaa !20
%71 = load ptr, ptr @block, align 8, !tbaa !14
%72 = getelementptr inbounds i8, ptr %71, i64 12
%73 = load i32, ptr %72, align 4, !tbaa !15
%74 = tail call i32 %70(i32 noundef %73) #2
%75 = getelementptr inbounds i8, ptr %0, i64 16
%76 = load ptr, ptr %75, align 8, !tbaa !21
%77 = load i32, ptr %76, align 4, !tbaa !22
%78 = load i32, ptr @AV_CODEC_FLAG_GRAY, align 4, !tbaa !15
%79 = and i32 %78, %77
%80 = icmp eq i32 %79, 0
br i1 %80, label %81, label %119
81: ; preds = %4
%82 = shl nsw i32 %3, 3
%83 = mul nsw i32 %30, %82
%84 = sext i32 %83 to i64
%85 = getelementptr inbounds i32, ptr %28, i64 %84
%86 = shl nsw i32 %2, 3
%87 = sext i32 %86 to i64
%88 = getelementptr inbounds i32, ptr %85, i64 %87
%89 = mul nsw i32 %26, %82
%90 = sext i32 %89 to i64
%91 = getelementptr inbounds i32, ptr %24, i64 %90
%92 = getelementptr inbounds i32, ptr %91, i64 %87
%93 = load ptr, ptr %31, align 8, !tbaa !19
%94 = load ptr, ptr @block, align 8, !tbaa !14
%95 = getelementptr inbounds i8, ptr %94, i64 16
%96 = load i32, ptr %95, align 4, !tbaa !15
%97 = load ptr, ptr %1, align 8, !tbaa !16
%98 = getelementptr inbounds i8, ptr %97, i64 4
%99 = load i32, ptr %98, align 4, !tbaa !15
%100 = tail call i32 %93(i32 noundef %96, ptr noundef %92, i32 noundef %99) #2
%101 = load ptr, ptr %31, align 8, !tbaa !19
%102 = load ptr, ptr @block, align 8, !tbaa !14
%103 = getelementptr inbounds i8, ptr %102, i64 20
%104 = load i32, ptr %103, align 4, !tbaa !15
%105 = load ptr, ptr %1, align 8, !tbaa !16
%106 = getelementptr inbounds i8, ptr %105, i64 8
%107 = load i32, ptr %106, align 4, !tbaa !15
%108 = tail call i32 %101(i32 noundef %104, ptr noundef %88, i32 noundef %107) #2
%109 = load ptr, ptr %0, align 8, !tbaa !20
%110 = load ptr, ptr @block, align 8, !tbaa !14
%111 = getelementptr inbounds i8, ptr %110, i64 16
%112 = load i32, ptr %111, align 4, !tbaa !15
%113 = tail call i32 %109(i32 noundef %112) #2
%114 = load ptr, ptr %0, align 8, !tbaa !20
%115 = load ptr, ptr @block, align 8, !tbaa !14
%116 = getelementptr inbounds i8, ptr %115, i64 20
%117 = load i32, ptr %116, align 4, !tbaa !15
%118 = tail call i32 %114(i32 noundef %117) #2
br label %119
119: ; preds = %81, %4
ret void
}
declare ptr @int16_t(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !13, i64 24}
!7 = !{!"TYPE_12__", !8, i64 0, !12, i64 8, !9, i64 16, !13, i64 24}
!8 = !{!"TYPE_10__", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"TYPE_9__", !9, i64 0}
!13 = !{!"int", !10, i64 0}
!14 = !{!9, !9, i64 0}
!15 = !{!13, !13, i64 0}
!16 = !{!17, !9, i64 0}
!17 = !{!"TYPE_11__", !9, i64 0, !9, i64 8}
!18 = !{!17, !9, i64 8}
!19 = !{!7, !9, i64 8}
!20 = !{!7, !9, i64 0}
!21 = !{!7, !9, i64 16}
!22 = !{!23, !13, i64 0}
!23 = !{!"TYPE_8__", !13, i64 0}
| FFmpeg_libavcodec_extr_asvenc.c_dct_get |
; ModuleID = 'AnghaBench/freebsd/sys/kern/extr_sysv_msg.c_msq_prison_cansee.c'
source_filename = "AnghaBench/freebsd/sys/kern/extr_sysv_msg.c_msq_prison_cansee.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @msq_prison_cansee], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @msq_prison_cansee(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !5
%4 = icmp eq ptr %3, null
br i1 %4, label %11, label %5
5: ; preds = %2
%6 = load ptr, ptr %3, align 8, !tbaa !10
%7 = icmp eq ptr %6, %0
br i1 %7, label %13, label %8
8: ; preds = %5
%9 = tail call i64 @prison_ischild(ptr noundef %0, ptr noundef %6) #2
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %8, %2
%12 = load i32, ptr @EINVAL, align 4, !tbaa !12
br label %13
13: ; preds = %5, %8, %11
%14 = phi i32 [ %12, %11 ], [ 0, %8 ], [ 0, %5 ]
ret i32 %14
}
declare i64 @prison_ischild(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"msqid_kernel", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/kern/extr_sysv_msg.c_msq_prison_cansee.c'
source_filename = "AnghaBench/freebsd/sys/kern/extr_sysv_msg.c_msq_prison_cansee.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @msq_prison_cansee], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @msq_prison_cansee(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !6
%4 = icmp eq ptr %3, null
br i1 %4, label %11, label %5
5: ; preds = %2
%6 = load ptr, ptr %3, align 8, !tbaa !11
%7 = icmp eq ptr %6, %0
br i1 %7, label %13, label %8
8: ; preds = %5
%9 = tail call i64 @prison_ischild(ptr noundef %0, ptr noundef %6) #2
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %8, %2
%12 = load i32, ptr @EINVAL, align 4, !tbaa !13
br label %13
13: ; preds = %5, %8, %11
%14 = phi i32 [ %12, %11 ], [ 0, %8 ], [ 0, %5 ]
ret i32 %14
}
declare i64 @prison_ischild(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"msqid_kernel", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_2__", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !9, i64 0}
| freebsd_sys_kern_extr_sysv_msg.c_msq_prison_cansee |
; ModuleID = 'AnghaBench/freebsd/sys/contrib/dev/acpica/components/debugger/extr_dbobject.c_AcpiDbDisplayInternalObject.c'
source_filename = "AnghaBench/freebsd/sys/contrib/dev/acpica/components/debugger/extr_dbobject.c_AcpiDbDisplayInternalObject.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_20__ = type { %struct.TYPE_18__, %struct.TYPE_15__ }
%struct.TYPE_18__ = type { i64, i32, ptr, ptr, ptr, i32 }
%struct.TYPE_15__ = type { i32 }
%struct.TYPE_19__ = type { ptr, ptr }
%struct.TYPE_16__ = type { ptr }
%struct.TYPE_17__ = type { ptr }
@.str = private unnamed_addr constant [4 x i8] c"%p \00", align 1
@.str.1 = private unnamed_addr constant [15 x i8] c"<Null Object>\0A\00", align 1
@.str.2 = private unnamed_addr constant [11 x i8] c"<Parser> \00", align 1
@ACPI_TYPE_LOCAL_MAX = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [24 x i8] c" Type %X [Invalid Type]\00", align 1
@.str.4 = private unnamed_addr constant [6 x i8] c"[%s] \00", align 1
@.str.5 = private unnamed_addr constant [4 x i8] c"%X \00", align 1
@.str.6 = private unnamed_addr constant [3 x i8] c"%p\00", align 1
@.str.7 = private unnamed_addr constant [29 x i8] c" Uninitialized WHERE pointer\00", align 1
@.str.8 = private unnamed_addr constant [26 x i8] c"Unknown index target type\00", align 1
@.str.9 = private unnamed_addr constant [42 x i8] c"Uninitialized reference subobject pointer\00", align 1
@.str.10 = private unnamed_addr constant [2 x i8] c"\0A\00", align 1
@.str.11 = private unnamed_addr constant [7 x i8] c"%2.2X\0A\00", align 1
@.str.12 = private unnamed_addr constant [18 x i8] c"<Obj> \00", align 1
@.str.13 = private unnamed_addr constant [42 x i8] c"<Not a valid ACPI Object Descriptor> [%s]\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @AcpiDbDisplayInternalObject(ptr noundef %0, ptr noundef readonly %1) local_unnamed_addr #0 {
%3 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str, ptr noundef %0) #2
%4 = icmp eq ptr %0, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.1) #2
br label %102
7: ; preds = %2
%8 = tail call i32 @ACPI_GET_DESCRIPTOR_TYPE(ptr noundef nonnull %0) #2
switch i32 %8, label %97 [
i32 138, label %9
i32 140, label %11
i32 139, label %13
]
9: ; preds = %7
%10 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.2) #2
br label %100
11: ; preds = %7
%12 = tail call i32 @AcpiDbDecodeNode(ptr noundef nonnull %0) #2
br label %100
13: ; preds = %7
%14 = getelementptr inbounds %struct.TYPE_20__, ptr %0, i64 0, i32 1
%15 = load i32, ptr %14, align 8, !tbaa !5
%16 = load i32, ptr @ACPI_TYPE_LOCAL_MAX, align 4, !tbaa !14
%17 = icmp sgt i32 %15, %16
br i1 %17, label %18, label %20
18: ; preds = %13
%19 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.3, i32 noundef %15) #2
br label %102
20: ; preds = %13
%21 = icmp eq i32 %15, 129
br i1 %21, label %22, label %94
22: ; preds = %20
%23 = tail call i32 @AcpiUtGetReferenceName(ptr noundef nonnull %0) #2
%24 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.4, i32 noundef %23) #2
%25 = getelementptr inbounds %struct.TYPE_18__, ptr %0, i64 0, i32 1
%26 = load i32, ptr %25, align 8, !tbaa !15
switch i32 %26, label %92 [
i32 134, label %27
i32 137, label %39
i32 135, label %50
i32 132, label %72
i32 133, label %86
i32 136, label %90
i32 131, label %90
]
27: ; preds = %22
%28 = load i64, ptr %0, align 8, !tbaa !16
%29 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.5, i64 noundef %28) #2
%30 = icmp eq ptr %1, null
br i1 %30, label %100, label %31
31: ; preds = %27
%32 = getelementptr inbounds %struct.TYPE_19__, ptr %1, i64 0, i32 1
%33 = load ptr, ptr %32, align 8, !tbaa !17
%34 = load i64, ptr %0, align 8, !tbaa !16
%35 = getelementptr inbounds %struct.TYPE_16__, ptr %33, i64 %34
%36 = load ptr, ptr %35, align 8, !tbaa !19
%37 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.6, ptr noundef %36) #2
%38 = tail call i32 @AcpiDbDecodeInternalObject(ptr noundef %36) #2
br label %100
39: ; preds = %22
%40 = load i64, ptr %0, align 8, !tbaa !16
%41 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.5, i64 noundef %40) #2
%42 = icmp eq ptr %1, null
br i1 %42, label %100, label %43
43: ; preds = %39
%44 = load ptr, ptr %1, align 8, !tbaa !21
%45 = load i64, ptr %0, align 8, !tbaa !16
%46 = getelementptr inbounds %struct.TYPE_17__, ptr %44, i64 %45
%47 = load ptr, ptr %46, align 8, !tbaa !22
%48 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.6, ptr noundef %47) #2
%49 = tail call i32 @AcpiDbDecodeInternalObject(ptr noundef %47) #2
br label %100
50: ; preds = %22
%51 = getelementptr inbounds %struct.TYPE_18__, ptr %0, i64 0, i32 5
%52 = load i32, ptr %51, align 8, !tbaa !24
switch i32 %52, label %70 [
i32 130, label %53
i32 128, label %59
]
53: ; preds = %50
%54 = getelementptr inbounds %struct.TYPE_18__, ptr %0, i64 0, i32 3
%55 = load ptr, ptr %54, align 8, !tbaa !25
%56 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.6, ptr noundef %55) #2
%57 = load ptr, ptr %54, align 8, !tbaa !25
%58 = tail call i32 @AcpiDbDecodeInternalObject(ptr noundef %57) #2
br label %100
59: ; preds = %50
%60 = getelementptr inbounds %struct.TYPE_18__, ptr %0, i64 0, i32 4
%61 = load ptr, ptr %60, align 8, !tbaa !26
%62 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.6, ptr noundef %61) #2
%63 = load ptr, ptr %60, align 8, !tbaa !26
%64 = icmp eq ptr %63, null
br i1 %64, label %65, label %67
65: ; preds = %59
%66 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.7) #2
br label %100
67: ; preds = %59
%68 = load ptr, ptr %63, align 8, !tbaa !27
%69 = tail call i32 @AcpiDbDecodeInternalObject(ptr noundef %68) #2
br label %100
70: ; preds = %50
%71 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.8) #2
br label %100
72: ; preds = %22
%73 = getelementptr inbounds %struct.TYPE_18__, ptr %0, i64 0, i32 3
%74 = load ptr, ptr %73, align 8, !tbaa !25
%75 = icmp eq ptr %74, null
br i1 %75, label %76, label %78
76: ; preds = %72
%77 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.9) #2
br label %100
78: ; preds = %72
%79 = tail call i32 @ACPI_GET_DESCRIPTOR_TYPE(ptr noundef nonnull %74) #2
switch i32 %79, label %100 [
i32 140, label %80
i32 139, label %83
]
80: ; preds = %78
%81 = load ptr, ptr %73, align 8, !tbaa !25
%82 = tail call i32 @AcpiDbDecodeNode(ptr noundef %81) #2
br label %100
83: ; preds = %78
%84 = load ptr, ptr %73, align 8, !tbaa !25
%85 = tail call i32 @AcpiDbDecodeInternalObject(ptr noundef %84) #2
br label %100
86: ; preds = %22
%87 = getelementptr inbounds %struct.TYPE_18__, ptr %0, i64 0, i32 2
%88 = load ptr, ptr %87, align 8, !tbaa !28
%89 = tail call i32 @AcpiDbDecodeNode(ptr noundef %88) #2
br label %100
90: ; preds = %22, %22
%91 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.10) #2
br label %100
92: ; preds = %22
%93 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.11, i32 noundef %26) #2
br label %100
94: ; preds = %20
%95 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.12) #2
%96 = tail call i32 @AcpiDbDecodeInternalObject(ptr noundef nonnull %0) #2
br label %100
97: ; preds = %7
%98 = tail call i32 @AcpiUtGetDescriptorName(ptr noundef nonnull %0) #2
%99 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.13, i32 noundef %98) #2
br label %100
100: ; preds = %94, %80, %83, %78, %53, %70, %67, %65, %39, %43, %27, %31, %92, %90, %86, %76, %97, %11, %9
%101 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.10) #2
br label %102
102: ; preds = %100, %18, %5
ret void
}
declare i32 @AcpiOsPrintf(ptr noundef, ...) local_unnamed_addr #1
declare i32 @ACPI_GET_DESCRIPTOR_TYPE(ptr noundef) local_unnamed_addr #1
declare i32 @AcpiDbDecodeNode(ptr noundef) local_unnamed_addr #1
declare i32 @AcpiUtGetReferenceName(ptr noundef) local_unnamed_addr #1
declare i32 @AcpiDbDecodeInternalObject(ptr noundef) local_unnamed_addr #1
declare i32 @AcpiUtGetDescriptorName(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 48}
!6 = !{!"TYPE_20__", !7, i64 0, !13, i64 48}
!7 = !{!"TYPE_18__", !8, i64 0, !11, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !11, i64 40}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!"TYPE_15__", !11, i64 0}
!14 = !{!11, !11, i64 0}
!15 = !{!6, !11, i64 8}
!16 = !{!6, !8, i64 0}
!17 = !{!18, !12, i64 8}
!18 = !{!"TYPE_19__", !12, i64 0, !12, i64 8}
!19 = !{!20, !12, i64 0}
!20 = !{!"TYPE_16__", !12, i64 0}
!21 = !{!18, !12, i64 0}
!22 = !{!23, !12, i64 0}
!23 = !{!"TYPE_17__", !12, i64 0}
!24 = !{!6, !11, i64 40}
!25 = !{!6, !12, i64 24}
!26 = !{!6, !12, i64 32}
!27 = !{!12, !12, i64 0}
!28 = !{!6, !12, i64 16}
| ; ModuleID = 'AnghaBench/freebsd/sys/contrib/dev/acpica/components/debugger/extr_dbobject.c_AcpiDbDisplayInternalObject.c'
source_filename = "AnghaBench/freebsd/sys/contrib/dev/acpica/components/debugger/extr_dbobject.c_AcpiDbDisplayInternalObject.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_16__ = type { ptr }
%struct.TYPE_17__ = type { ptr }
@.str = private unnamed_addr constant [4 x i8] c"%p \00", align 1
@.str.1 = private unnamed_addr constant [15 x i8] c"<Null Object>\0A\00", align 1
@.str.2 = private unnamed_addr constant [11 x i8] c"<Parser> \00", align 1
@ACPI_TYPE_LOCAL_MAX = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [24 x i8] c" Type %X [Invalid Type]\00", align 1
@.str.4 = private unnamed_addr constant [6 x i8] c"[%s] \00", align 1
@.str.5 = private unnamed_addr constant [4 x i8] c"%X \00", align 1
@.str.6 = private unnamed_addr constant [3 x i8] c"%p\00", align 1
@.str.7 = private unnamed_addr constant [29 x i8] c" Uninitialized WHERE pointer\00", align 1
@.str.8 = private unnamed_addr constant [26 x i8] c"Unknown index target type\00", align 1
@.str.9 = private unnamed_addr constant [42 x i8] c"Uninitialized reference subobject pointer\00", align 1
@.str.10 = private unnamed_addr constant [2 x i8] c"\0A\00", align 1
@.str.11 = private unnamed_addr constant [7 x i8] c"%2.2X\0A\00", align 1
@.str.12 = private unnamed_addr constant [18 x i8] c"<Obj> \00", align 1
@.str.13 = private unnamed_addr constant [42 x i8] c"<Not a valid ACPI Object Descriptor> [%s]\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @AcpiDbDisplayInternalObject(ptr noundef %0, ptr noundef readonly %1) local_unnamed_addr #0 {
%3 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str, ptr noundef %0) #2
%4 = icmp eq ptr %0, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.1) #2
br label %102
7: ; preds = %2
%8 = tail call i32 @ACPI_GET_DESCRIPTOR_TYPE(ptr noundef nonnull %0) #2
switch i32 %8, label %97 [
i32 138, label %9
i32 140, label %11
i32 139, label %13
]
9: ; preds = %7
%10 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.2) #2
br label %100
11: ; preds = %7
%12 = tail call i32 @AcpiDbDecodeNode(ptr noundef nonnull %0) #2
br label %100
13: ; preds = %7
%14 = getelementptr inbounds i8, ptr %0, i64 48
%15 = load i32, ptr %14, align 8, !tbaa !6
%16 = load i32, ptr @ACPI_TYPE_LOCAL_MAX, align 4, !tbaa !15
%17 = icmp sgt i32 %15, %16
br i1 %17, label %18, label %20
18: ; preds = %13
%19 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.3, i32 noundef %15) #2
br label %102
20: ; preds = %13
%21 = icmp eq i32 %15, 129
br i1 %21, label %22, label %94
22: ; preds = %20
%23 = tail call i32 @AcpiUtGetReferenceName(ptr noundef nonnull %0) #2
%24 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.4, i32 noundef %23) #2
%25 = getelementptr inbounds i8, ptr %0, i64 8
%26 = load i32, ptr %25, align 8, !tbaa !16
switch i32 %26, label %92 [
i32 134, label %27
i32 137, label %39
i32 135, label %50
i32 132, label %72
i32 133, label %86
i32 136, label %90
i32 131, label %90
]
27: ; preds = %22
%28 = load i64, ptr %0, align 8, !tbaa !17
%29 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.5, i64 noundef %28) #2
%30 = icmp eq ptr %1, null
br i1 %30, label %100, label %31
31: ; preds = %27
%32 = getelementptr inbounds i8, ptr %1, i64 8
%33 = load ptr, ptr %32, align 8, !tbaa !18
%34 = load i64, ptr %0, align 8, !tbaa !17
%35 = getelementptr inbounds %struct.TYPE_16__, ptr %33, i64 %34
%36 = load ptr, ptr %35, align 8, !tbaa !20
%37 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.6, ptr noundef %36) #2
%38 = tail call i32 @AcpiDbDecodeInternalObject(ptr noundef %36) #2
br label %100
39: ; preds = %22
%40 = load i64, ptr %0, align 8, !tbaa !17
%41 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.5, i64 noundef %40) #2
%42 = icmp eq ptr %1, null
br i1 %42, label %100, label %43
43: ; preds = %39
%44 = load ptr, ptr %1, align 8, !tbaa !22
%45 = load i64, ptr %0, align 8, !tbaa !17
%46 = getelementptr inbounds %struct.TYPE_17__, ptr %44, i64 %45
%47 = load ptr, ptr %46, align 8, !tbaa !23
%48 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.6, ptr noundef %47) #2
%49 = tail call i32 @AcpiDbDecodeInternalObject(ptr noundef %47) #2
br label %100
50: ; preds = %22
%51 = getelementptr inbounds i8, ptr %0, i64 40
%52 = load i32, ptr %51, align 8, !tbaa !25
switch i32 %52, label %70 [
i32 130, label %53
i32 128, label %59
]
53: ; preds = %50
%54 = getelementptr inbounds i8, ptr %0, i64 24
%55 = load ptr, ptr %54, align 8, !tbaa !26
%56 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.6, ptr noundef %55) #2
%57 = load ptr, ptr %54, align 8, !tbaa !26
%58 = tail call i32 @AcpiDbDecodeInternalObject(ptr noundef %57) #2
br label %100
59: ; preds = %50
%60 = getelementptr inbounds i8, ptr %0, i64 32
%61 = load ptr, ptr %60, align 8, !tbaa !27
%62 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.6, ptr noundef %61) #2
%63 = load ptr, ptr %60, align 8, !tbaa !27
%64 = icmp eq ptr %63, null
br i1 %64, label %65, label %67
65: ; preds = %59
%66 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.7) #2
br label %100
67: ; preds = %59
%68 = load ptr, ptr %63, align 8, !tbaa !28
%69 = tail call i32 @AcpiDbDecodeInternalObject(ptr noundef %68) #2
br label %100
70: ; preds = %50
%71 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.8) #2
br label %100
72: ; preds = %22
%73 = getelementptr inbounds i8, ptr %0, i64 24
%74 = load ptr, ptr %73, align 8, !tbaa !26
%75 = icmp eq ptr %74, null
br i1 %75, label %76, label %78
76: ; preds = %72
%77 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.9) #2
br label %100
78: ; preds = %72
%79 = tail call i32 @ACPI_GET_DESCRIPTOR_TYPE(ptr noundef nonnull %74) #2
switch i32 %79, label %100 [
i32 140, label %80
i32 139, label %83
]
80: ; preds = %78
%81 = load ptr, ptr %73, align 8, !tbaa !26
%82 = tail call i32 @AcpiDbDecodeNode(ptr noundef %81) #2
br label %100
83: ; preds = %78
%84 = load ptr, ptr %73, align 8, !tbaa !26
%85 = tail call i32 @AcpiDbDecodeInternalObject(ptr noundef %84) #2
br label %100
86: ; preds = %22
%87 = getelementptr inbounds i8, ptr %0, i64 16
%88 = load ptr, ptr %87, align 8, !tbaa !29
%89 = tail call i32 @AcpiDbDecodeNode(ptr noundef %88) #2
br label %100
90: ; preds = %22, %22
%91 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.10) #2
br label %100
92: ; preds = %22
%93 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.11, i32 noundef %26) #2
br label %100
94: ; preds = %20
%95 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.12) #2
%96 = tail call i32 @AcpiDbDecodeInternalObject(ptr noundef nonnull %0) #2
br label %100
97: ; preds = %7
%98 = tail call i32 @AcpiUtGetDescriptorName(ptr noundef nonnull %0) #2
%99 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.13, i32 noundef %98) #2
br label %100
100: ; preds = %94, %80, %83, %78, %53, %70, %67, %65, %39, %43, %27, %31, %92, %90, %86, %76, %97, %11, %9
%101 = tail call i32 (ptr, ...) @AcpiOsPrintf(ptr noundef nonnull @.str.10) #2
br label %102
102: ; preds = %100, %18, %5
ret void
}
declare i32 @AcpiOsPrintf(ptr noundef, ...) local_unnamed_addr #1
declare i32 @ACPI_GET_DESCRIPTOR_TYPE(ptr noundef) local_unnamed_addr #1
declare i32 @AcpiDbDecodeNode(ptr noundef) local_unnamed_addr #1
declare i32 @AcpiUtGetReferenceName(ptr noundef) local_unnamed_addr #1
declare i32 @AcpiDbDecodeInternalObject(ptr noundef) local_unnamed_addr #1
declare i32 @AcpiUtGetDescriptorName(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 48}
!7 = !{!"TYPE_20__", !8, i64 0, !14, i64 48}
!8 = !{!"TYPE_18__", !9, i64 0, !12, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !12, i64 40}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"int", !10, i64 0}
!13 = !{!"any pointer", !10, i64 0}
!14 = !{!"TYPE_15__", !12, i64 0}
!15 = !{!12, !12, i64 0}
!16 = !{!7, !12, i64 8}
!17 = !{!7, !9, i64 0}
!18 = !{!19, !13, i64 8}
!19 = !{!"TYPE_19__", !13, i64 0, !13, i64 8}
!20 = !{!21, !13, i64 0}
!21 = !{!"TYPE_16__", !13, i64 0}
!22 = !{!19, !13, i64 0}
!23 = !{!24, !13, i64 0}
!24 = !{!"TYPE_17__", !13, i64 0}
!25 = !{!7, !12, i64 40}
!26 = !{!7, !13, i64 24}
!27 = !{!7, !13, i64 32}
!28 = !{!13, !13, i64 0}
!29 = !{!7, !13, i64 16}
| freebsd_sys_contrib_dev_acpica_components_debugger_extr_dbobject.c_AcpiDbDisplayInternalObject |
; ModuleID = 'AnghaBench/linux/drivers/usb/renesas_usbhs/extr_fifo.c_usbhsf_fifo_unselect.c'
source_filename = "AnghaBench/linux/drivers/usb/renesas_usbhs/extr_fifo.c_usbhsf_fifo_unselect.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @usbhsf_fifo_unselect], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @usbhsf_fifo_unselect(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call ptr @usbhs_pipe_to_priv(ptr noundef %0) #2
%4 = tail call i32 @usbhs_pipe_select_fifo(ptr noundef %0, ptr noundef null) #2
%5 = load i32, ptr %1, align 4, !tbaa !5
%6 = tail call i32 @usbhs_write(ptr noundef %3, i32 noundef %5, i32 noundef 0) #2
ret void
}
declare ptr @usbhs_pipe_to_priv(ptr noundef) local_unnamed_addr #1
declare i32 @usbhs_pipe_select_fifo(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @usbhs_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"usbhs_fifo", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/renesas_usbhs/extr_fifo.c_usbhsf_fifo_unselect.c'
source_filename = "AnghaBench/linux/drivers/usb/renesas_usbhs/extr_fifo.c_usbhsf_fifo_unselect.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @usbhsf_fifo_unselect], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @usbhsf_fifo_unselect(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call ptr @usbhs_pipe_to_priv(ptr noundef %0) #2
%4 = tail call i32 @usbhs_pipe_select_fifo(ptr noundef %0, ptr noundef null) #2
%5 = load i32, ptr %1, align 4, !tbaa !6
%6 = tail call i32 @usbhs_write(ptr noundef %3, i32 noundef %5, i32 noundef 0) #2
ret void
}
declare ptr @usbhs_pipe_to_priv(ptr noundef) local_unnamed_addr #1
declare i32 @usbhs_pipe_select_fifo(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @usbhs_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"usbhs_fifo", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_usb_renesas_usbhs_extr_fifo.c_usbhsf_fifo_unselect |
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Mayaqua/extr_Str.c_StrToMac.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Mayaqua/extr_Str.c_StrToMac.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @StrToMac(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = icmp eq ptr %0, null
%4 = icmp eq ptr %1, null
%5 = or i1 %3, %4
br i1 %5, label %19, label %6
6: ; preds = %2
%7 = tail call ptr @StrToBin(ptr noundef nonnull %1) #2
%8 = icmp eq ptr %7, null
br i1 %8, label %19, label %9
9: ; preds = %6
%10 = load i32, ptr %7, align 4, !tbaa !5
%11 = icmp eq i32 %10, 6
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = getelementptr inbounds %struct.TYPE_4__, ptr %7, i64 0, i32 1
%14 = load i32, ptr %13, align 4, !tbaa !10
%15 = tail call i32 @Copy(ptr noundef nonnull %0, i32 noundef %14, i32 noundef 6) #2
br label %16
16: ; preds = %9, %12
%17 = phi i32 [ 1, %12 ], [ 0, %9 ]
%18 = tail call i32 @FreeBuf(ptr noundef nonnull %7) #2
br label %19
19: ; preds = %16, %6, %2
%20 = phi i32 [ 0, %2 ], [ 0, %6 ], [ %17, %16 ]
ret i32 %20
}
declare ptr @StrToBin(ptr noundef) local_unnamed_addr #1
declare i32 @FreeBuf(ptr noundef) local_unnamed_addr #1
declare i32 @Copy(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
| ; ModuleID = 'AnghaBench/SoftEtherVPN/src/Mayaqua/extr_Str.c_StrToMac.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Mayaqua/extr_Str.c_StrToMac.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @StrToMac(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = icmp eq ptr %0, null
%4 = icmp eq ptr %1, null
%5 = or i1 %3, %4
br i1 %5, label %19, label %6
6: ; preds = %2
%7 = tail call ptr @StrToBin(ptr noundef nonnull %1) #2
%8 = icmp eq ptr %7, null
br i1 %8, label %19, label %9
9: ; preds = %6
%10 = load i32, ptr %7, align 4, !tbaa !6
%11 = icmp eq i32 %10, 6
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = getelementptr inbounds i8, ptr %7, i64 4
%14 = load i32, ptr %13, align 4, !tbaa !11
%15 = tail call i32 @Copy(ptr noundef nonnull %0, i32 noundef %14, i32 noundef 6) #2
br label %16
16: ; preds = %9, %12
%17 = phi i32 [ 1, %12 ], [ 0, %9 ]
%18 = tail call i32 @FreeBuf(ptr noundef nonnull %7) #2
br label %19
19: ; preds = %16, %6, %2
%20 = phi i32 [ 0, %2 ], [ 0, %6 ], [ %17, %16 ]
ret i32 %20
}
declare ptr @StrToBin(ptr noundef) local_unnamed_addr #1
declare i32 @FreeBuf(ptr noundef) local_unnamed_addr #1
declare i32 @Copy(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
| SoftEtherVPN_src_Mayaqua_extr_Str.c_StrToMac |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_cb_pcidas64.c_enable_ai_interrupts.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_cb_pcidas64.c_enable_ai_interrupts.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i64 }
@EN_ADC_OVERRUN_BIT = dso_local local_unnamed_addr global i32 0, align 4
@EN_ADC_DONE_INTR_BIT = dso_local local_unnamed_addr global i32 0, align 4
@EN_ADC_ACTIVE_INTR_BIT = dso_local local_unnamed_addr global i32 0, align 4
@EN_ADC_STOP_INTR_BIT = dso_local local_unnamed_addr global i32 0, align 4
@TRIG_WAKE_EOS = dso_local local_unnamed_addr global i32 0, align 4
@LAYOUT_4020 = dso_local local_unnamed_addr global i64 0, align 8
@ADC_INTR_EOSCAN_BITS = dso_local local_unnamed_addr global i32 0, align 4
@EN_ADC_INTR_SRC_BIT = dso_local local_unnamed_addr global i32 0, align 4
@INTR_ENABLE_REG = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [23 x i8] c"intr enable bits 0x%x\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @enable_ai_interrupts], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @enable_ai_interrupts(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr @EN_ADC_OVERRUN_BIT, align 4, !tbaa !5
%4 = load i32, ptr @EN_ADC_DONE_INTR_BIT, align 4, !tbaa !5
%5 = or i32 %4, %3
%6 = load i32, ptr @EN_ADC_ACTIVE_INTR_BIT, align 4, !tbaa !5
%7 = or i32 %5, %6
%8 = load i32, ptr @EN_ADC_STOP_INTR_BIT, align 4, !tbaa !5
%9 = or i32 %7, %8
%10 = load i32, ptr %1, align 4, !tbaa !9
%11 = load i32, ptr @TRIG_WAKE_EOS, align 4, !tbaa !5
%12 = and i32 %11, %10
%13 = icmp eq i32 %12, 0
br i1 %13, label %24, label %14
14: ; preds = %2
%15 = tail call ptr @board(ptr noundef %0) #2
%16 = load i64, ptr %15, align 8, !tbaa !11
%17 = load i64, ptr @LAYOUT_4020, align 8, !tbaa !14
%18 = icmp eq i64 %16, %17
br i1 %18, label %24, label %19
19: ; preds = %14
%20 = load i32, ptr @ADC_INTR_EOSCAN_BITS, align 4, !tbaa !5
%21 = load i32, ptr @EN_ADC_INTR_SRC_BIT, align 4, !tbaa !5
%22 = or i32 %20, %21
%23 = or i32 %22, %9
br label %24
24: ; preds = %14, %19, %2
%25 = phi i32 [ %23, %19 ], [ %9, %14 ], [ %9, %2 ]
%26 = tail call i32 @spin_lock_irqsave(ptr noundef %0, i64 noundef undef) #2
%27 = tail call ptr @priv(ptr noundef %0) #2
%28 = load i32, ptr %27, align 8, !tbaa !15
%29 = or i32 %28, %25
store i32 %29, ptr %27, align 8, !tbaa !15
%30 = tail call ptr @priv(ptr noundef %0) #2
%31 = load i32, ptr %30, align 8, !tbaa !15
%32 = tail call ptr @priv(ptr noundef %0) #2
%33 = getelementptr inbounds %struct.TYPE_3__, ptr %32, i64 0, i32 1
%34 = load i64, ptr %33, align 8, !tbaa !17
%35 = load i64, ptr @INTR_ENABLE_REG, align 8, !tbaa !14
%36 = add nsw i64 %35, %34
%37 = tail call i32 @writew(i32 noundef %31, i64 noundef %36) #2
%38 = tail call ptr @priv(ptr noundef %0) #2
%39 = load i32, ptr %38, align 8, !tbaa !15
%40 = tail call i32 @DEBUG_PRINT(ptr noundef nonnull @.str, i32 noundef %39) #2
%41 = tail call i32 @spin_unlock_irqrestore(ptr noundef %0, i64 noundef undef) #2
ret void
}
declare ptr @board(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @priv(ptr noundef) local_unnamed_addr #1
declare i32 @writew(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @DEBUG_PRINT(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"comedi_cmd", !6, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_4__", !13, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!16, !6, i64 0}
!16 = !{!"TYPE_3__", !6, i64 0, !13, i64 8}
!17 = !{!16, !13, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_cb_pcidas64.c_enable_ai_interrupts.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_cb_pcidas64.c_enable_ai_interrupts.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EN_ADC_OVERRUN_BIT = common local_unnamed_addr global i32 0, align 4
@EN_ADC_DONE_INTR_BIT = common local_unnamed_addr global i32 0, align 4
@EN_ADC_ACTIVE_INTR_BIT = common local_unnamed_addr global i32 0, align 4
@EN_ADC_STOP_INTR_BIT = common local_unnamed_addr global i32 0, align 4
@TRIG_WAKE_EOS = common local_unnamed_addr global i32 0, align 4
@LAYOUT_4020 = common local_unnamed_addr global i64 0, align 8
@ADC_INTR_EOSCAN_BITS = common local_unnamed_addr global i32 0, align 4
@EN_ADC_INTR_SRC_BIT = common local_unnamed_addr global i32 0, align 4
@INTR_ENABLE_REG = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [23 x i8] c"intr enable bits 0x%x\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @enable_ai_interrupts], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @enable_ai_interrupts(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr @EN_ADC_OVERRUN_BIT, align 4, !tbaa !6
%4 = load i32, ptr @EN_ADC_DONE_INTR_BIT, align 4, !tbaa !6
%5 = or i32 %4, %3
%6 = load i32, ptr @EN_ADC_ACTIVE_INTR_BIT, align 4, !tbaa !6
%7 = or i32 %5, %6
%8 = load i32, ptr @EN_ADC_STOP_INTR_BIT, align 4, !tbaa !6
%9 = or i32 %7, %8
%10 = load i32, ptr %1, align 4, !tbaa !10
%11 = load i32, ptr @TRIG_WAKE_EOS, align 4, !tbaa !6
%12 = and i32 %11, %10
%13 = icmp eq i32 %12, 0
br i1 %13, label %24, label %14
14: ; preds = %2
%15 = tail call ptr @board(ptr noundef %0) #2
%16 = load i64, ptr %15, align 8, !tbaa !12
%17 = load i64, ptr @LAYOUT_4020, align 8, !tbaa !15
%18 = icmp eq i64 %16, %17
br i1 %18, label %24, label %19
19: ; preds = %14
%20 = load i32, ptr @ADC_INTR_EOSCAN_BITS, align 4, !tbaa !6
%21 = load i32, ptr @EN_ADC_INTR_SRC_BIT, align 4, !tbaa !6
%22 = or i32 %20, %21
%23 = or i32 %22, %9
br label %24
24: ; preds = %14, %19, %2
%25 = phi i32 [ %23, %19 ], [ %9, %14 ], [ %9, %2 ]
%26 = tail call i32 @spin_lock_irqsave(ptr noundef %0, i64 noundef undef) #2
%27 = tail call ptr @priv(ptr noundef %0) #2
%28 = load i32, ptr %27, align 8, !tbaa !16
%29 = or i32 %28, %25
store i32 %29, ptr %27, align 8, !tbaa !16
%30 = tail call ptr @priv(ptr noundef %0) #2
%31 = load i32, ptr %30, align 8, !tbaa !16
%32 = tail call ptr @priv(ptr noundef %0) #2
%33 = getelementptr inbounds i8, ptr %32, i64 8
%34 = load i64, ptr %33, align 8, !tbaa !18
%35 = load i64, ptr @INTR_ENABLE_REG, align 8, !tbaa !15
%36 = add nsw i64 %35, %34
%37 = tail call i32 @writew(i32 noundef %31, i64 noundef %36) #2
%38 = tail call ptr @priv(ptr noundef %0) #2
%39 = load i32, ptr %38, align 8, !tbaa !16
%40 = tail call i32 @DEBUG_PRINT(ptr noundef nonnull @.str, i32 noundef %39) #2
%41 = tail call i32 @spin_unlock_irqrestore(ptr noundef %0, i64 noundef undef) #2
ret void
}
declare ptr @board(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @priv(ptr noundef) local_unnamed_addr #1
declare i32 @writew(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @DEBUG_PRINT(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"comedi_cmd", !7, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_4__", !14, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!14, !14, i64 0}
!16 = !{!17, !7, i64 0}
!17 = !{!"TYPE_3__", !7, i64 0, !14, i64 8}
!18 = !{!17, !14, i64 8}
| fastsocket_kernel_drivers_staging_comedi_drivers_extr_cb_pcidas64.c_enable_ai_interrupts |
; ModuleID = 'AnghaBench/linux/drivers/media/usb/gspca/gl860/extr_gl860-mi2020.c_mi2020_init_at_startup.c'
source_filename = "AnghaBench/linux/drivers/media/usb/gspca/gl860/extr_gl860-mi2020.c_mi2020_init_at_startup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@tbl_init_at_startup = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @mi2020_init_at_startup], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @mi2020_init_at_startup(ptr noundef %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = call i32 @ctrl_in(ptr noundef %0, i32 noundef 192, i32 noundef 2, i32 noundef 0, i32 noundef 4, i32 noundef 1, ptr noundef nonnull %2) #3
%4 = call i32 @ctrl_in(ptr noundef %0, i32 noundef 192, i32 noundef 2, i32 noundef 0, i32 noundef 4, i32 noundef 1, ptr noundef nonnull %2) #3
%5 = load i32, ptr @tbl_init_at_startup, align 4, !tbaa !5
%6 = call i32 @ARRAY_SIZE(i32 noundef %5) #3
%7 = call i32 @fetch_validx(ptr noundef %0, i32 noundef %5, i32 noundef %6) #3
%8 = call i32 @ctrl_out(ptr noundef %0, i32 noundef 64, i32 noundef 1, i32 noundef 31232, i32 noundef 32816, i32 noundef 0, ptr noundef null) #3
%9 = call i32 @ctrl_in(ptr noundef %0, i32 noundef 192, i32 noundef 2, i32 noundef 31232, i32 noundef 32816, i32 noundef 1, ptr noundef nonnull %2) #3
%10 = call i32 @common(ptr noundef %0) #3
%11 = call i32 @msleep(i32 noundef 61) #3
%12 = call i32 @ctrl_out(ptr noundef %0, i32 noundef 64, i32 noundef 1, i32 noundef 1, i32 noundef 0, i32 noundef 0, ptr noundef null) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ctrl_in(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @fetch_validx(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ARRAY_SIZE(i32 noundef) local_unnamed_addr #2
declare i32 @ctrl_out(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @common(ptr noundef) local_unnamed_addr #2
declare i32 @msleep(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/media/usb/gspca/gl860/extr_gl860-mi2020.c_mi2020_init_at_startup.c'
source_filename = "AnghaBench/linux/drivers/media/usb/gspca/gl860/extr_gl860-mi2020.c_mi2020_init_at_startup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@tbl_init_at_startup = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mi2020_init_at_startup], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @mi2020_init_at_startup(ptr noundef %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = call i32 @ctrl_in(ptr noundef %0, i32 noundef 192, i32 noundef 2, i32 noundef 0, i32 noundef 4, i32 noundef 1, ptr noundef nonnull %2) #3
%4 = call i32 @ctrl_in(ptr noundef %0, i32 noundef 192, i32 noundef 2, i32 noundef 0, i32 noundef 4, i32 noundef 1, ptr noundef nonnull %2) #3
%5 = load i32, ptr @tbl_init_at_startup, align 4, !tbaa !6
%6 = call i32 @ARRAY_SIZE(i32 noundef %5) #3
%7 = call i32 @fetch_validx(ptr noundef %0, i32 noundef %5, i32 noundef %6) #3
%8 = call i32 @ctrl_out(ptr noundef %0, i32 noundef 64, i32 noundef 1, i32 noundef 31232, i32 noundef 32816, i32 noundef 0, ptr noundef null) #3
%9 = call i32 @ctrl_in(ptr noundef %0, i32 noundef 192, i32 noundef 2, i32 noundef 31232, i32 noundef 32816, i32 noundef 1, ptr noundef nonnull %2) #3
%10 = call i32 @common(ptr noundef %0) #3
%11 = call i32 @msleep(i32 noundef 61) #3
%12 = call i32 @ctrl_out(ptr noundef %0, i32 noundef 64, i32 noundef 1, i32 noundef 1, i32 noundef 0, i32 noundef 0, ptr noundef null) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ctrl_in(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @fetch_validx(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ARRAY_SIZE(i32 noundef) local_unnamed_addr #2
declare i32 @ctrl_out(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @common(ptr noundef) local_unnamed_addr #2
declare i32 @msleep(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_media_usb_gspca_gl860_extr_gl860-mi2020.c_mi2020_init_at_startup |
; ModuleID = 'AnghaBench/mjolnir/Mjolnir/lua/extr_lua.c_report.c'
source_filename = "AnghaBench/mjolnir/Mjolnir/lua/extr_lua.c_report.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@LUA_OK = dso_local local_unnamed_addr global i32 0, align 4
@progname = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @report], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @report(ptr noundef %0, i32 noundef returned %1) #0 {
%3 = load i32, ptr @LUA_OK, align 4, !tbaa !5
%4 = icmp eq i32 %3, %1
br i1 %4, label %10, label %5
5: ; preds = %2
%6 = tail call ptr @lua_tostring(ptr noundef %0, i32 noundef -1) #2
%7 = load i32, ptr @progname, align 4, !tbaa !5
%8 = tail call i32 @l_message(i32 noundef %7, ptr noundef %6) #2
%9 = tail call i32 @lua_pop(ptr noundef %0, i32 noundef 1) #2
br label %10
10: ; preds = %5, %2
ret i32 %1
}
declare ptr @lua_tostring(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @l_message(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @lua_pop(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/mjolnir/Mjolnir/lua/extr_lua.c_report.c'
source_filename = "AnghaBench/mjolnir/Mjolnir/lua/extr_lua.c_report.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@LUA_OK = common local_unnamed_addr global i32 0, align 4
@progname = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @report], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @report(ptr noundef %0, i32 noundef returned %1) #0 {
%3 = load i32, ptr @LUA_OK, align 4, !tbaa !6
%4 = icmp eq i32 %3, %1
br i1 %4, label %10, label %5
5: ; preds = %2
%6 = tail call ptr @lua_tostring(ptr noundef %0, i32 noundef -1) #2
%7 = load i32, ptr @progname, align 4, !tbaa !6
%8 = tail call i32 @l_message(i32 noundef %7, ptr noundef %6) #2
%9 = tail call i32 @lua_pop(ptr noundef %0, i32 noundef 1) #2
br label %10
10: ; preds = %5, %2
ret i32 %1
}
declare ptr @lua_tostring(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @l_message(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @lua_pop(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| mjolnir_Mjolnir_lua_extr_lua.c_report |
; ModuleID = 'AnghaBench/freebsd/lib/libc/rpc/extr_svc_dg.c_cache_get.c'
source_filename = "AnghaBench/freebsd/lib/libc/rpc/extr_svc_dg.c_cache_get.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.svc_dg_data = type { i64, i64 }
%struct.cl_cache = type { i32, i32, i32, ptr }
%struct.TYPE_10__ = type { i64, i64, i64 }
%struct.TYPE_13__ = type { i64, i32 }
%struct.TYPE_11__ = type { i64, i64, i64, i64, ptr, i64, %struct.TYPE_9__, ptr }
%struct.TYPE_9__ = type { i64, i32 }
@dupreq_lock = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @cache_get], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @cache_get(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2, ptr nocapture noundef writeonly %3) #0 {
%5 = tail call ptr @su_data(ptr noundef %0) #2
%6 = getelementptr inbounds %struct.svc_dg_data, ptr %5, i64 0, i32 1
%7 = load i64, ptr %6, align 8, !tbaa !5
%8 = inttoptr i64 %7 to ptr
%9 = tail call i32 @mutex_lock(ptr noundef nonnull @dupreq_lock) #2
%10 = load i64, ptr %5, align 8, !tbaa !10
%11 = tail call i64 @CACHE_LOC(ptr noundef %0, i64 noundef %10) #2
%12 = getelementptr inbounds %struct.cl_cache, ptr %8, i64 0, i32 3
%13 = load ptr, ptr %12, align 8, !tbaa !11
%14 = getelementptr inbounds ptr, ptr %13, i64 %11
%15 = load ptr, ptr %14, align 8, !tbaa !15
%16 = icmp eq ptr %15, null
br i1 %16, label %61, label %17
17: ; preds = %4
%18 = getelementptr inbounds %struct.TYPE_10__, ptr %1, i64 0, i32 1
%19 = getelementptr inbounds %struct.TYPE_10__, ptr %1, i64 0, i32 2
%20 = getelementptr inbounds %struct.TYPE_13__, ptr %0, i64 0, i32 1
br label %21
21: ; preds = %17, %57
%22 = phi ptr [ %15, %17 ], [ %59, %57 ]
%23 = load i64, ptr %22, align 8, !tbaa !16
%24 = load i64, ptr %5, align 8, !tbaa !10
%25 = icmp eq i64 %23, %24
br i1 %25, label %26, label %57
26: ; preds = %21
%27 = getelementptr inbounds %struct.TYPE_11__, ptr %22, i64 0, i32 1
%28 = load i64, ptr %27, align 8, !tbaa !19
%29 = load i64, ptr %1, align 8, !tbaa !20
%30 = icmp eq i64 %28, %29
br i1 %30, label %31, label %57
31: ; preds = %26
%32 = getelementptr inbounds %struct.TYPE_11__, ptr %22, i64 0, i32 2
%33 = load i64, ptr %32, align 8, !tbaa !23
%34 = load i64, ptr %18, align 8, !tbaa !24
%35 = icmp eq i64 %33, %34
br i1 %35, label %36, label %57
36: ; preds = %31
%37 = getelementptr inbounds %struct.TYPE_11__, ptr %22, i64 0, i32 3
%38 = load i64, ptr %37, align 8, !tbaa !25
%39 = load i64, ptr %19, align 8, !tbaa !26
%40 = icmp eq i64 %38, %39
br i1 %40, label %41, label %57
41: ; preds = %36
%42 = getelementptr inbounds %struct.TYPE_11__, ptr %22, i64 0, i32 6
%43 = load i64, ptr %42, align 8, !tbaa !27
%44 = load i64, ptr %0, align 8, !tbaa !28
%45 = icmp eq i64 %43, %44
br i1 %45, label %46, label %57
46: ; preds = %41
%47 = getelementptr inbounds %struct.TYPE_11__, ptr %22, i64 0, i32 6, i32 1
%48 = load i32, ptr %47, align 8, !tbaa !31
%49 = load i32, ptr %20, align 8, !tbaa !32
%50 = tail call i64 @memcmp(i32 noundef %48, i32 noundef %49, i64 noundef %43) #2
%51 = icmp eq i64 %50, 0
br i1 %51, label %52, label %57
52: ; preds = %46
%53 = getelementptr inbounds %struct.TYPE_11__, ptr %22, i64 0, i32 4
%54 = load ptr, ptr %53, align 8, !tbaa !33
store ptr %54, ptr %2, align 8, !tbaa !15
%55 = getelementptr inbounds %struct.TYPE_11__, ptr %22, i64 0, i32 5
%56 = load i64, ptr %55, align 8, !tbaa !34
store i64 %56, ptr %3, align 8, !tbaa !35
br label %68
57: ; preds = %21, %26, %31, %36, %41, %46
%58 = getelementptr inbounds %struct.TYPE_11__, ptr %22, i64 0, i32 7
%59 = load ptr, ptr %58, align 8, !tbaa !15
%60 = icmp eq ptr %59, null
br i1 %60, label %61, label %21, !llvm.loop !36
61: ; preds = %57, %4
%62 = load <2 x i64>, ptr %1, align 8, !tbaa !35
%63 = trunc <2 x i64> %62 to <2 x i32>
store <2 x i32> %63, ptr %8, align 8, !tbaa !38
%64 = getelementptr inbounds %struct.TYPE_10__, ptr %1, i64 0, i32 2
%65 = load i64, ptr %64, align 8, !tbaa !26
%66 = trunc i64 %65 to i32
%67 = getelementptr inbounds %struct.cl_cache, ptr %8, i64 0, i32 2
store i32 %66, ptr %67, align 8, !tbaa !39
br label %68
68: ; preds = %61, %52
%69 = phi i32 [ 1, %52 ], [ 0, %61 ]
%70 = tail call i32 @mutex_unlock(ptr noundef nonnull @dupreq_lock) #2
ret i32 %69
}
declare ptr @su_data(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i64 @CACHE_LOC(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @memcmp(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"svc_dg_data", !7, i64 0, !7, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
!11 = !{!12, !14, i64 16}
!12 = !{!"cl_cache", !13, i64 0, !13, i64 4, !13, i64 8, !14, i64 16}
!13 = !{!"int", !8, i64 0}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!14, !14, i64 0}
!16 = !{!17, !7, i64 0}
!17 = !{!"TYPE_11__", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !14, i64 32, !7, i64 40, !18, i64 48, !14, i64 64}
!18 = !{!"TYPE_9__", !7, i64 0, !13, i64 8}
!19 = !{!17, !7, i64 8}
!20 = !{!21, !7, i64 0}
!21 = !{!"rpc_msg", !22, i64 0}
!22 = !{!"TYPE_10__", !7, i64 0, !7, i64 8, !7, i64 16}
!23 = !{!17, !7, i64 16}
!24 = !{!21, !7, i64 8}
!25 = !{!17, !7, i64 24}
!26 = !{!21, !7, i64 16}
!27 = !{!17, !7, i64 48}
!28 = !{!29, !7, i64 0}
!29 = !{!"TYPE_12__", !30, i64 0, !13, i64 16}
!30 = !{!"TYPE_13__", !7, i64 0, !13, i64 8}
!31 = !{!17, !13, i64 56}
!32 = !{!29, !13, i64 8}
!33 = !{!17, !14, i64 32}
!34 = !{!17, !7, i64 40}
!35 = !{!7, !7, i64 0}
!36 = distinct !{!36, !37}
!37 = !{!"llvm.loop.mustprogress"}
!38 = !{!13, !13, i64 0}
!39 = !{!12, !13, i64 8}
| ; ModuleID = 'AnghaBench/freebsd/lib/libc/rpc/extr_svc_dg.c_cache_get.c'
source_filename = "AnghaBench/freebsd/lib/libc/rpc/extr_svc_dg.c_cache_get.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@dupreq_lock = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cache_get], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @cache_get(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2, ptr nocapture noundef writeonly %3) #0 {
%5 = tail call ptr @su_data(ptr noundef %0) #2
%6 = getelementptr inbounds i8, ptr %5, i64 8
%7 = load i64, ptr %6, align 8, !tbaa !6
%8 = inttoptr i64 %7 to ptr
%9 = tail call i32 @mutex_lock(ptr noundef nonnull @dupreq_lock) #2
%10 = load i64, ptr %5, align 8, !tbaa !11
%11 = tail call i64 @CACHE_LOC(ptr noundef %0, i64 noundef %10) #2
%12 = getelementptr inbounds i8, ptr %8, i64 16
%13 = load ptr, ptr %12, align 8, !tbaa !12
%14 = getelementptr inbounds ptr, ptr %13, i64 %11
%15 = load ptr, ptr %14, align 8, !tbaa !16
%16 = icmp eq ptr %15, null
br i1 %16, label %61, label %17
17: ; preds = %4
%18 = getelementptr inbounds i8, ptr %1, i64 8
%19 = getelementptr inbounds i8, ptr %1, i64 16
%20 = getelementptr inbounds i8, ptr %0, i64 8
br label %21
21: ; preds = %17, %57
%22 = phi ptr [ %15, %17 ], [ %59, %57 ]
%23 = load i64, ptr %22, align 8, !tbaa !17
%24 = load i64, ptr %5, align 8, !tbaa !11
%25 = icmp eq i64 %23, %24
br i1 %25, label %26, label %57
26: ; preds = %21
%27 = getelementptr inbounds i8, ptr %22, i64 8
%28 = load i64, ptr %27, align 8, !tbaa !20
%29 = load i64, ptr %1, align 8, !tbaa !21
%30 = icmp eq i64 %28, %29
br i1 %30, label %31, label %57
31: ; preds = %26
%32 = getelementptr inbounds i8, ptr %22, i64 16
%33 = load i64, ptr %32, align 8, !tbaa !24
%34 = load i64, ptr %18, align 8, !tbaa !25
%35 = icmp eq i64 %33, %34
br i1 %35, label %36, label %57
36: ; preds = %31
%37 = getelementptr inbounds i8, ptr %22, i64 24
%38 = load i64, ptr %37, align 8, !tbaa !26
%39 = load i64, ptr %19, align 8, !tbaa !27
%40 = icmp eq i64 %38, %39
br i1 %40, label %41, label %57
41: ; preds = %36
%42 = getelementptr inbounds i8, ptr %22, i64 48
%43 = load i64, ptr %42, align 8, !tbaa !28
%44 = load i64, ptr %0, align 8, !tbaa !29
%45 = icmp eq i64 %43, %44
br i1 %45, label %46, label %57
46: ; preds = %41
%47 = getelementptr inbounds i8, ptr %22, i64 56
%48 = load i32, ptr %47, align 8, !tbaa !32
%49 = load i32, ptr %20, align 8, !tbaa !33
%50 = tail call i64 @memcmp(i32 noundef %48, i32 noundef %49, i64 noundef %43) #2
%51 = icmp eq i64 %50, 0
br i1 %51, label %52, label %57
52: ; preds = %46
%53 = getelementptr inbounds i8, ptr %22, i64 32
%54 = load ptr, ptr %53, align 8, !tbaa !34
store ptr %54, ptr %2, align 8, !tbaa !16
%55 = getelementptr inbounds i8, ptr %22, i64 40
%56 = load i64, ptr %55, align 8, !tbaa !35
store i64 %56, ptr %3, align 8, !tbaa !36
br label %68
57: ; preds = %21, %26, %31, %36, %41, %46
%58 = getelementptr inbounds i8, ptr %22, i64 64
%59 = load ptr, ptr %58, align 8, !tbaa !16
%60 = icmp eq ptr %59, null
br i1 %60, label %61, label %21, !llvm.loop !37
61: ; preds = %57, %4
%62 = load <2 x i64>, ptr %1, align 8, !tbaa !36
%63 = trunc <2 x i64> %62 to <2 x i32>
store <2 x i32> %63, ptr %8, align 8, !tbaa !39
%64 = getelementptr inbounds i8, ptr %1, i64 16
%65 = load i64, ptr %64, align 8, !tbaa !27
%66 = trunc i64 %65 to i32
%67 = getelementptr inbounds i8, ptr %8, i64 8
store i32 %66, ptr %67, align 8, !tbaa !40
br label %68
68: ; preds = %61, %52
%69 = phi i32 [ 1, %52 ], [ 0, %61 ]
%70 = tail call i32 @mutex_unlock(ptr noundef nonnull @dupreq_lock) #2
ret i32 %69
}
declare ptr @su_data(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i64 @CACHE_LOC(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @memcmp(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"svc_dg_data", !8, i64 0, !8, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
!12 = !{!13, !15, i64 16}
!13 = !{!"cl_cache", !14, i64 0, !14, i64 4, !14, i64 8, !15, i64 16}
!14 = !{!"int", !9, i64 0}
!15 = !{!"any pointer", !9, i64 0}
!16 = !{!15, !15, i64 0}
!17 = !{!18, !8, i64 0}
!18 = !{!"TYPE_11__", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !15, i64 32, !8, i64 40, !19, i64 48, !15, i64 64}
!19 = !{!"TYPE_9__", !8, i64 0, !14, i64 8}
!20 = !{!18, !8, i64 8}
!21 = !{!22, !8, i64 0}
!22 = !{!"rpc_msg", !23, i64 0}
!23 = !{!"TYPE_10__", !8, i64 0, !8, i64 8, !8, i64 16}
!24 = !{!18, !8, i64 16}
!25 = !{!22, !8, i64 8}
!26 = !{!18, !8, i64 24}
!27 = !{!22, !8, i64 16}
!28 = !{!18, !8, i64 48}
!29 = !{!30, !8, i64 0}
!30 = !{!"TYPE_12__", !31, i64 0, !14, i64 16}
!31 = !{!"TYPE_13__", !8, i64 0, !14, i64 8}
!32 = !{!18, !14, i64 56}
!33 = !{!30, !14, i64 8}
!34 = !{!18, !15, i64 32}
!35 = !{!18, !8, i64 40}
!36 = !{!8, !8, i64 0}
!37 = distinct !{!37, !38}
!38 = !{!"llvm.loop.mustprogress"}
!39 = !{!14, !14, i64 0}
!40 = !{!13, !14, i64 8}
| freebsd_lib_libc_rpc_extr_svc_dg.c_cache_get |
; ModuleID = 'AnghaBench/lab/q3map2/libs/l_net/extr_l_net_wins.c_WINS_GetSocketAddr.c'
source_filename = "AnghaBench/lab/q3map2/libs/l_net/extr_l_net_wins.c_WINS_GetSocketAddr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [10 x i8] c"127.0.0.1\00", align 1
@myAddr = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @WINS_GetSocketAddr(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
store i32 4, ptr %3, align 4, !tbaa !5
%4 = tail call i32 @memset(ptr noundef %1, i32 noundef 0, i32 noundef 4) #3
%5 = call i32 @getsockname(i32 noundef %0, ptr noundef %1, ptr noundef nonnull %3) #3
%6 = load i32, ptr %1, align 4, !tbaa !9
%7 = icmp eq i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = call i32 @inet_addr(ptr noundef nonnull @.str) #3
%10 = icmp eq i32 %6, %9
br i1 %10, label %11, label %13
11: ; preds = %8, %2
%12 = load i32, ptr @myAddr, align 4, !tbaa !5
store i32 %12, ptr %1, align 4, !tbaa !9
br label %13
13: ; preds = %11, %8
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @getsockname(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @inet_addr(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"sockaddr_in", !11, i64 0}
!11 = !{!"TYPE_2__", !6, i64 0}
| ; ModuleID = 'AnghaBench/lab/q3map2/libs/l_net/extr_l_net_wins.c_WINS_GetSocketAddr.c'
source_filename = "AnghaBench/lab/q3map2/libs/l_net/extr_l_net_wins.c_WINS_GetSocketAddr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [10 x i8] c"127.0.0.1\00", align 1
@myAddr = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @WINS_GetSocketAddr(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
store i32 4, ptr %3, align 4, !tbaa !6
%4 = tail call i32 @memset(ptr noundef %1, i32 noundef 0, i32 noundef 4) #3
%5 = call i32 @getsockname(i32 noundef %0, ptr noundef %1, ptr noundef nonnull %3) #3
%6 = load i32, ptr %1, align 4, !tbaa !10
%7 = icmp eq i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = call i32 @inet_addr(ptr noundef nonnull @.str) #3
%10 = icmp eq i32 %6, %9
br i1 %10, label %11, label %13
11: ; preds = %8, %2
%12 = load i32, ptr @myAddr, align 4, !tbaa !6
store i32 %12, ptr %1, align 4, !tbaa !10
br label %13
13: ; preds = %11, %8
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @getsockname(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @inet_addr(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"sockaddr_in", !12, i64 0}
!12 = !{!"TYPE_2__", !7, i64 0}
| lab_q3map2_libs_l_net_extr_l_net_wins.c_WINS_GetSocketAddr |
; ModuleID = 'AnghaBench/freebsd/contrib/unbound/util/data/extr_msgparse.c_pkt_hash_rrset.c'
source_filename = "AnghaBench/freebsd/contrib/unbound/util/data/extr_msgparse.c_pkt_hash_rrset.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @pkt_hash_rrset(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
%6 = alloca i32, align 4
%7 = alloca i32, align 4
%8 = alloca i32, align 4
store i32 %2, ptr %6, align 4, !tbaa !5
store i32 %3, ptr %7, align 4, !tbaa !5
store i32 %4, ptr %8, align 4, !tbaa !5
%9 = tail call i32 @dname_pkt_hash(ptr noundef %0, ptr noundef %1, i32 noundef 171) #2
%10 = call i32 @hashlittle(ptr noundef nonnull %6, i32 noundef 4, i32 noundef %9) #2
%11 = call i32 @hashlittle(ptr noundef nonnull %7, i32 noundef 4, i32 noundef %10) #2
%12 = call i32 @hashlittle(ptr noundef nonnull %8, i32 noundef 4, i32 noundef %11) #2
ret i32 %12
}
declare i32 @dname_pkt_hash(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @hashlittle(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/unbound/util/data/extr_msgparse.c_pkt_hash_rrset.c'
source_filename = "AnghaBench/freebsd/contrib/unbound/util/data/extr_msgparse.c_pkt_hash_rrset.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @pkt_hash_rrset(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
%6 = alloca i32, align 4
%7 = alloca i32, align 4
%8 = alloca i32, align 4
store i32 %2, ptr %6, align 4, !tbaa !6
store i32 %3, ptr %7, align 4, !tbaa !6
store i32 %4, ptr %8, align 4, !tbaa !6
%9 = tail call i32 @dname_pkt_hash(ptr noundef %0, ptr noundef %1, i32 noundef 171) #2
%10 = call i32 @hashlittle(ptr noundef nonnull %6, i32 noundef 4, i32 noundef %9) #2
%11 = call i32 @hashlittle(ptr noundef nonnull %7, i32 noundef 4, i32 noundef %10) #2
%12 = call i32 @hashlittle(ptr noundef nonnull %8, i32 noundef 4, i32 noundef %11) #2
ret i32 %12
}
declare i32 @dname_pkt_hash(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @hashlittle(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_unbound_util_data_extr_msgparse.c_pkt_hash_rrset |
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/jbd/extr_transaction.c_journal_forget.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/jbd/extr_transaction.c_journal_forget.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i32, ptr }
%struct.journal_head = type { i32, ptr, ptr, i64, i32, i32 }
%struct.TYPE_7__ = type { i32, ptr }
@.str = private unnamed_addr constant [6 x i8] c"entry\00", align 1
@.str.1 = private unnamed_addr constant [26 x i8] c"inconsistent data on disk\00", align 1
@EIO = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [39 x i8] c"belongs to current transaction: unfile\00", align 1
@BJ_Forget = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [29 x i8] c"belongs to older transaction\00", align 1
; Function Attrs: nounwind uwtable
define dso_local i32 @journal_forget(ptr nocapture noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = load ptr, ptr %4, align 8, !tbaa !11
%6 = tail call i32 @BUFFER_TRACE(ptr noundef %1, ptr noundef nonnull @.str) #2
%7 = tail call i32 @jbd_lock_bh_state(ptr noundef %1) #2
%8 = tail call i32 @spin_lock(ptr noundef %5) #2
%9 = tail call i32 @buffer_jbd(ptr noundef %1) #2
%10 = icmp eq i32 %9, 0
br i1 %10, label %74, label %11
11: ; preds = %2
%12 = tail call ptr @bh2jh(ptr noundef %1) #2
%13 = getelementptr inbounds %struct.journal_head, ptr %12, i64 0, i32 5
%14 = load i32, ptr %13, align 4, !tbaa !13
%15 = icmp eq i32 %14, 0
%16 = zext i1 %15 to i32
%17 = tail call i32 @J_EXPECT_JH(ptr noundef %12, i32 noundef %16, ptr noundef nonnull @.str.1) #2
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %22
19: ; preds = %11
%20 = load i32, ptr @EIO, align 4, !tbaa !16
%21 = sub nsw i32 0, %20
br label %74
22: ; preds = %11
%23 = load i32, ptr %12, align 8, !tbaa !17
store i32 0, ptr %12, align 8, !tbaa !17
%24 = getelementptr inbounds %struct.journal_head, ptr %12, i64 0, i32 2
%25 = load ptr, ptr %24, align 8, !tbaa !18
%26 = load ptr, ptr %3, align 8, !tbaa !5
%27 = icmp eq ptr %25, %26
br i1 %27, label %28, label %56
28: ; preds = %22
%29 = getelementptr inbounds %struct.journal_head, ptr %12, i64 0, i32 4
%30 = load i32, ptr %29, align 8, !tbaa !19
%31 = icmp eq i32 %30, 0
%32 = zext i1 %31 to i32
%33 = tail call i32 @J_ASSERT_JH(ptr noundef nonnull %12, i32 noundef %32) #2
%34 = tail call i32 @clear_buffer_dirty(ptr noundef %1) #2
%35 = tail call i32 @clear_buffer_jbddirty(ptr noundef %1) #2
%36 = tail call i32 @JBUFFER_TRACE(ptr noundef nonnull %12, ptr noundef nonnull @.str.2) #2
%37 = icmp ne i32 %23, 0
%38 = zext i1 %37 to i32
%39 = getelementptr inbounds %struct.journal_head, ptr %12, i64 0, i32 3
%40 = load i64, ptr %39, align 8, !tbaa !20
%41 = icmp eq i64 %40, 0
br i1 %41, label %46, label %42
42: ; preds = %28
%43 = tail call i32 @__journal_temp_unlink_buffer(ptr noundef nonnull %12) #2
%44 = load i32, ptr @BJ_Forget, align 4, !tbaa !16
%45 = tail call i32 @__journal_file_buffer(ptr noundef nonnull %12, ptr noundef nonnull %4, i32 noundef %44) #2
br label %74
46: ; preds = %28
%47 = tail call i32 @__journal_unfile_buffer(ptr noundef nonnull %12) #2
%48 = tail call i32 @journal_remove_journal_head(ptr noundef %1) #2
%49 = tail call i32 @__brelse(ptr noundef %1) #2
%50 = tail call i32 @buffer_jbd(ptr noundef %1) #2
%51 = icmp eq i32 %50, 0
br i1 %51, label %52, label %74
52: ; preds = %46
%53 = tail call i32 @spin_unlock(ptr noundef %5) #2
%54 = tail call i32 @jbd_unlock_bh_state(ptr noundef %1) #2
%55 = tail call i32 @__bforget(ptr noundef %1) #2
br label %80
56: ; preds = %22
%57 = icmp eq ptr %25, null
br i1 %57, label %74, label %58
58: ; preds = %56
%59 = getelementptr inbounds %struct.TYPE_7__, ptr %5, i64 0, i32 1
%60 = load ptr, ptr %59, align 8, !tbaa !21
%61 = icmp eq ptr %25, %60
%62 = zext i1 %61 to i32
%63 = tail call i32 @J_ASSERT_JH(ptr noundef nonnull %12, i32 noundef %62) #2
%64 = tail call i32 @JBUFFER_TRACE(ptr noundef nonnull %12, ptr noundef nonnull @.str.3) #2
%65 = getelementptr inbounds %struct.journal_head, ptr %12, i64 0, i32 1
%66 = load ptr, ptr %65, align 8, !tbaa !23
%67 = icmp eq ptr %66, null
br i1 %67, label %74, label %68
68: ; preds = %58
%69 = icmp eq ptr %66, %4
%70 = zext i1 %69 to i32
%71 = tail call i32 @J_ASSERT(i32 noundef %70) #2
store ptr null, ptr %65, align 8, !tbaa !23
%72 = icmp ne i32 %23, 0
%73 = zext i1 %72 to i32
br label %74
74: ; preds = %68, %46, %42, %58, %56, %2, %19
%75 = phi i32 [ %38, %42 ], [ %38, %46 ], [ 0, %58 ], [ 0, %56 ], [ 0, %19 ], [ 0, %2 ], [ %73, %68 ]
%76 = phi i32 [ 0, %42 ], [ 0, %46 ], [ 0, %58 ], [ 0, %56 ], [ %21, %19 ], [ 0, %2 ], [ 0, %68 ]
%77 = tail call i32 @spin_unlock(ptr noundef %5) #2
%78 = tail call i32 @jbd_unlock_bh_state(ptr noundef %1) #2
%79 = tail call i32 @__brelse(ptr noundef %1) #2
br label %80
80: ; preds = %74, %52
%81 = phi i32 [ %75, %74 ], [ %38, %52 ]
%82 = phi i32 [ %76, %74 ], [ 0, %52 ]
%83 = icmp eq i32 %81, 0
br i1 %83, label %87, label %84
84: ; preds = %80
%85 = load i32, ptr %0, align 8, !tbaa !24
%86 = add nsw i32 %85, 1
store i32 %86, ptr %0, align 8, !tbaa !24
br label %87
87: ; preds = %84, %80
ret i32 %82
}
declare i32 @BUFFER_TRACE(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @jbd_lock_bh_state(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @buffer_jbd(ptr noundef) local_unnamed_addr #1
declare ptr @bh2jh(ptr noundef) local_unnamed_addr #1
declare i32 @J_EXPECT_JH(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @J_ASSERT_JH(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @clear_buffer_dirty(ptr noundef) local_unnamed_addr #1
declare i32 @clear_buffer_jbddirty(ptr noundef) local_unnamed_addr #1
declare i32 @JBUFFER_TRACE(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @__journal_temp_unlink_buffer(ptr noundef) local_unnamed_addr #1
declare i32 @__journal_file_buffer(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__journal_unfile_buffer(ptr noundef) local_unnamed_addr #1
declare i32 @journal_remove_journal_head(ptr noundef) local_unnamed_addr #1
declare i32 @__brelse(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @jbd_unlock_bh_state(ptr noundef) local_unnamed_addr #1
declare i32 @__bforget(ptr noundef) local_unnamed_addr #1
declare i32 @J_ASSERT(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_8__", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_6__", !10, i64 0}
!13 = !{!14, !7, i64 36}
!14 = !{!"journal_head", !7, i64 0, !10, i64 8, !10, i64 16, !15, i64 24, !7, i64 32, !7, i64 36}
!15 = !{!"long", !8, i64 0}
!16 = !{!7, !7, i64 0}
!17 = !{!14, !7, i64 0}
!18 = !{!14, !10, i64 16}
!19 = !{!14, !7, i64 32}
!20 = !{!14, !15, i64 24}
!21 = !{!22, !10, i64 8}
!22 = !{!"TYPE_7__", !7, i64 0, !10, i64 8}
!23 = !{!14, !10, i64 8}
!24 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/fs/jbd/extr_transaction.c_journal_forget.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/jbd/extr_transaction.c_journal_forget.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [6 x i8] c"entry\00", align 1
@.str.1 = private unnamed_addr constant [26 x i8] c"inconsistent data on disk\00", align 1
@EIO = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [39 x i8] c"belongs to current transaction: unfile\00", align 1
@BJ_Forget = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [29 x i8] c"belongs to older transaction\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @journal_forget(ptr nocapture noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load ptr, ptr %4, align 8, !tbaa !12
%6 = tail call i32 @BUFFER_TRACE(ptr noundef %1, ptr noundef nonnull @.str) #2
%7 = tail call i32 @jbd_lock_bh_state(ptr noundef %1) #2
%8 = tail call i32 @spin_lock(ptr noundef %5) #2
%9 = tail call i32 @buffer_jbd(ptr noundef %1) #2
%10 = icmp eq i32 %9, 0
br i1 %10, label %74, label %11
11: ; preds = %2
%12 = tail call ptr @bh2jh(ptr noundef %1) #2
%13 = getelementptr inbounds i8, ptr %12, i64 36
%14 = load i32, ptr %13, align 4, !tbaa !14
%15 = icmp eq i32 %14, 0
%16 = zext i1 %15 to i32
%17 = tail call i32 @J_EXPECT_JH(ptr noundef %12, i32 noundef %16, ptr noundef nonnull @.str.1) #2
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %22
19: ; preds = %11
%20 = load i32, ptr @EIO, align 4, !tbaa !17
%21 = sub nsw i32 0, %20
br label %74
22: ; preds = %11
%23 = load i32, ptr %12, align 8, !tbaa !18
store i32 0, ptr %12, align 8, !tbaa !18
%24 = getelementptr inbounds i8, ptr %12, i64 16
%25 = load ptr, ptr %24, align 8, !tbaa !19
%26 = load ptr, ptr %3, align 8, !tbaa !6
%27 = icmp eq ptr %25, %26
br i1 %27, label %28, label %56
28: ; preds = %22
%29 = getelementptr inbounds i8, ptr %12, i64 32
%30 = load i32, ptr %29, align 8, !tbaa !20
%31 = icmp eq i32 %30, 0
%32 = zext i1 %31 to i32
%33 = tail call i32 @J_ASSERT_JH(ptr noundef nonnull %12, i32 noundef %32) #2
%34 = tail call i32 @clear_buffer_dirty(ptr noundef %1) #2
%35 = tail call i32 @clear_buffer_jbddirty(ptr noundef %1) #2
%36 = tail call i32 @JBUFFER_TRACE(ptr noundef nonnull %12, ptr noundef nonnull @.str.2) #2
%37 = icmp ne i32 %23, 0
%38 = zext i1 %37 to i32
%39 = getelementptr inbounds i8, ptr %12, i64 24
%40 = load i64, ptr %39, align 8, !tbaa !21
%41 = icmp eq i64 %40, 0
br i1 %41, label %46, label %42
42: ; preds = %28
%43 = tail call i32 @__journal_temp_unlink_buffer(ptr noundef nonnull %12) #2
%44 = load i32, ptr @BJ_Forget, align 4, !tbaa !17
%45 = tail call i32 @__journal_file_buffer(ptr noundef nonnull %12, ptr noundef nonnull %4, i32 noundef %44) #2
br label %74
46: ; preds = %28
%47 = tail call i32 @__journal_unfile_buffer(ptr noundef nonnull %12) #2
%48 = tail call i32 @journal_remove_journal_head(ptr noundef %1) #2
%49 = tail call i32 @__brelse(ptr noundef %1) #2
%50 = tail call i32 @buffer_jbd(ptr noundef %1) #2
%51 = icmp eq i32 %50, 0
br i1 %51, label %52, label %74
52: ; preds = %46
%53 = tail call i32 @spin_unlock(ptr noundef %5) #2
%54 = tail call i32 @jbd_unlock_bh_state(ptr noundef %1) #2
%55 = tail call i32 @__bforget(ptr noundef %1) #2
br label %80
56: ; preds = %22
%57 = icmp eq ptr %25, null
br i1 %57, label %74, label %58
58: ; preds = %56
%59 = getelementptr inbounds i8, ptr %5, i64 8
%60 = load ptr, ptr %59, align 8, !tbaa !22
%61 = icmp eq ptr %25, %60
%62 = zext i1 %61 to i32
%63 = tail call i32 @J_ASSERT_JH(ptr noundef nonnull %12, i32 noundef %62) #2
%64 = tail call i32 @JBUFFER_TRACE(ptr noundef nonnull %12, ptr noundef nonnull @.str.3) #2
%65 = getelementptr inbounds i8, ptr %12, i64 8
%66 = load ptr, ptr %65, align 8, !tbaa !24
%67 = icmp eq ptr %66, null
br i1 %67, label %74, label %68
68: ; preds = %58
%69 = icmp eq ptr %66, %4
%70 = zext i1 %69 to i32
%71 = tail call i32 @J_ASSERT(i32 noundef %70) #2
store ptr null, ptr %65, align 8, !tbaa !24
%72 = icmp ne i32 %23, 0
%73 = zext i1 %72 to i32
br label %74
74: ; preds = %68, %46, %42, %58, %56, %2, %19
%75 = phi i32 [ %38, %42 ], [ %38, %46 ], [ 0, %58 ], [ 0, %56 ], [ 0, %19 ], [ 0, %2 ], [ %73, %68 ]
%76 = phi i32 [ 0, %42 ], [ 0, %46 ], [ 0, %58 ], [ 0, %56 ], [ %21, %19 ], [ 0, %2 ], [ 0, %68 ]
%77 = tail call i32 @spin_unlock(ptr noundef %5) #2
%78 = tail call i32 @jbd_unlock_bh_state(ptr noundef %1) #2
%79 = tail call i32 @__brelse(ptr noundef %1) #2
br label %80
80: ; preds = %74, %52
%81 = phi i32 [ %75, %74 ], [ %38, %52 ]
%82 = phi i32 [ %76, %74 ], [ 0, %52 ]
%83 = icmp eq i32 %81, 0
br i1 %83, label %87, label %84
84: ; preds = %80
%85 = load i32, ptr %0, align 8, !tbaa !25
%86 = add nsw i32 %85, 1
store i32 %86, ptr %0, align 8, !tbaa !25
br label %87
87: ; preds = %84, %80
ret i32 %82
}
declare i32 @BUFFER_TRACE(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @jbd_lock_bh_state(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @buffer_jbd(ptr noundef) local_unnamed_addr #1
declare ptr @bh2jh(ptr noundef) local_unnamed_addr #1
declare i32 @J_EXPECT_JH(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @J_ASSERT_JH(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @clear_buffer_dirty(ptr noundef) local_unnamed_addr #1
declare i32 @clear_buffer_jbddirty(ptr noundef) local_unnamed_addr #1
declare i32 @JBUFFER_TRACE(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @__journal_temp_unlink_buffer(ptr noundef) local_unnamed_addr #1
declare i32 @__journal_file_buffer(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__journal_unfile_buffer(ptr noundef) local_unnamed_addr #1
declare i32 @journal_remove_journal_head(ptr noundef) local_unnamed_addr #1
declare i32 @__brelse(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @jbd_unlock_bh_state(ptr noundef) local_unnamed_addr #1
declare i32 @__bforget(ptr noundef) local_unnamed_addr #1
declare i32 @J_ASSERT(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_8__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_6__", !11, i64 0}
!14 = !{!15, !8, i64 36}
!15 = !{!"journal_head", !8, i64 0, !11, i64 8, !11, i64 16, !16, i64 24, !8, i64 32, !8, i64 36}
!16 = !{!"long", !9, i64 0}
!17 = !{!8, !8, i64 0}
!18 = !{!15, !8, i64 0}
!19 = !{!15, !11, i64 16}
!20 = !{!15, !8, i64 32}
!21 = !{!15, !16, i64 24}
!22 = !{!23, !11, i64 8}
!23 = !{!"TYPE_7__", !8, i64 0, !11, i64 8}
!24 = !{!15, !11, i64 8}
!25 = !{!7, !8, i64 0}
| fastsocket_kernel_fs_jbd_extr_transaction.c_journal_forget |
; ModuleID = 'AnghaBench/freebsd/sys/kern/extr_kern_uuid.c_sbuf_printf_uuid.c'
source_filename = "AnghaBench/freebsd/sys/kern/extr_kern_uuid.c_sbuf_printf_uuid.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @sbuf_printf_uuid(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca [38 x i8], align 16
call void @llvm.lifetime.start.p0(i64 38, ptr nonnull %3) #3
%4 = call i32 @snprintf_uuid(ptr noundef nonnull %3, i32 noundef 38, ptr noundef %1) #3
%5 = call i32 @sbuf_cat(ptr noundef %0, ptr noundef nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 38, ptr nonnull %3) #3
ret i32 %5
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @snprintf_uuid(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sbuf_cat(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/sys/kern/extr_kern_uuid.c_sbuf_printf_uuid.c'
source_filename = "AnghaBench/freebsd/sys/kern/extr_kern_uuid.c_sbuf_printf_uuid.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @sbuf_printf_uuid(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca [38 x i8], align 1
call void @llvm.lifetime.start.p0(i64 38, ptr nonnull %3) #3
%4 = call i32 @snprintf_uuid(ptr noundef nonnull %3, i32 noundef 38, ptr noundef %1) #3
%5 = call i32 @sbuf_cat(ptr noundef %0, ptr noundef nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 38, ptr nonnull %3) #3
ret i32 %5
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @snprintf_uuid(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sbuf_cat(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_sys_kern_extr_kern_uuid.c_sbuf_printf_uuid |
; ModuleID = 'AnghaBench/Provenance/Cores/PicoDrive/pico/sound/extr_sn76496.c_SN76496_init.c'
source_filename = "AnghaBench/Provenance/Cores/PicoDrive/pico/sound/extr_sn76496.c_SN76496_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.SN76496 = type { ptr, i32, ptr, i32, i32, ptr, ptr, i64, ptr }
@ono_sn = dso_local global %struct.SN76496 zeroinitializer, align 8
@sn76496_regs = dso_local local_unnamed_addr global ptr null, align 8
@NG_PRESET = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @SN76496_init(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load ptr, ptr @ono_sn, align 8, !tbaa !5
store ptr %3, ptr @sn76496_regs, align 8, !tbaa !12
store i32 %1, ptr getelementptr inbounds (%struct.SN76496, ptr @ono_sn, i64 0, i32 1), align 8, !tbaa !13
%4 = tail call i32 @SN76496_set_clock(ptr noundef nonnull @ono_sn, i32 noundef %0) #3
%5 = load ptr, ptr getelementptr inbounds (%struct.SN76496, ptr @ono_sn, i64 0, i32 8), align 8, !tbaa !14
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %5, i8 0, i64 32, i1 false), !tbaa !15
store i64 0, ptr getelementptr inbounds (%struct.SN76496, ptr @ono_sn, i64 0, i32 7), align 8, !tbaa !16
%6 = load ptr, ptr @ono_sn, align 8, !tbaa !5
store <4 x i32> <i32 0, i32 15, i32 0, i32 15>, ptr %6, align 4, !tbaa !17
%7 = getelementptr inbounds i32, ptr %6, i64 4
store <4 x i32> <i32 0, i32 15, i32 0, i32 15>, ptr %7, align 4, !tbaa !17
%8 = load ptr, ptr getelementptr inbounds (%struct.SN76496, ptr @ono_sn, i64 0, i32 2), align 8, !tbaa !18
%9 = load ptr, ptr getelementptr inbounds (%struct.SN76496, ptr @ono_sn, i64 0, i32 5), align 8, !tbaa !19
%10 = load ptr, ptr getelementptr inbounds (%struct.SN76496, ptr @ono_sn, i64 0, i32 6), align 8, !tbaa !20
store i32 0, ptr %8, align 4, !tbaa !17
%11 = load i32, ptr getelementptr inbounds (%struct.SN76496, ptr @ono_sn, i64 0, i32 4), align 4, !tbaa !21
store i32 %11, ptr %9, align 4, !tbaa !17
store i32 %11, ptr %10, align 4, !tbaa !17
%12 = getelementptr inbounds i32, ptr %8, i64 1
store i32 0, ptr %12, align 4, !tbaa !17
%13 = load i32, ptr getelementptr inbounds (%struct.SN76496, ptr @ono_sn, i64 0, i32 4), align 4, !tbaa !21
%14 = getelementptr inbounds i32, ptr %9, i64 1
store i32 %13, ptr %14, align 4, !tbaa !17
%15 = getelementptr inbounds i32, ptr %10, i64 1
store i32 %13, ptr %15, align 4, !tbaa !17
%16 = getelementptr inbounds i32, ptr %8, i64 2
store i32 0, ptr %16, align 4, !tbaa !17
%17 = load i32, ptr getelementptr inbounds (%struct.SN76496, ptr @ono_sn, i64 0, i32 4), align 4, !tbaa !21
%18 = getelementptr inbounds i32, ptr %9, i64 2
store i32 %17, ptr %18, align 4, !tbaa !17
%19 = getelementptr inbounds i32, ptr %10, i64 2
store i32 %17, ptr %19, align 4, !tbaa !17
%20 = getelementptr inbounds i32, ptr %8, i64 3
store i32 0, ptr %20, align 4, !tbaa !17
%21 = load i32, ptr getelementptr inbounds (%struct.SN76496, ptr @ono_sn, i64 0, i32 4), align 4, !tbaa !21
%22 = getelementptr inbounds i32, ptr %9, i64 3
store i32 %21, ptr %22, align 4, !tbaa !17
%23 = getelementptr inbounds i32, ptr %10, i64 3
store i32 %21, ptr %23, align 4, !tbaa !17
%24 = load i32, ptr @NG_PRESET, align 4, !tbaa !17
store i32 %24, ptr getelementptr inbounds (%struct.SN76496, ptr @ono_sn, i64 0, i32 3), align 8, !tbaa !22
%25 = and i32 %24, 1
store i32 %25, ptr %20, align 4, !tbaa !17
%26 = tail call i32 @SN76496_set_gain(ptr noundef nonnull @ono_sn, i32 noundef 0) #3
ret i32 0
}
declare i32 @SN76496_set_clock(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SN76496_set_gain(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"SN76496", !7, i64 0, !10, i64 8, !7, i64 16, !10, i64 24, !10, i64 28, !7, i64 32, !7, i64 40, !11, i64 48, !7, i64 56}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !10, i64 8}
!14 = !{!6, !7, i64 56}
!15 = !{!11, !11, i64 0}
!16 = !{!6, !11, i64 48}
!17 = !{!10, !10, i64 0}
!18 = !{!6, !7, i64 16}
!19 = !{!6, !7, i64 32}
!20 = !{!6, !7, i64 40}
!21 = !{!6, !10, i64 28}
!22 = !{!6, !10, i64 24}
| ; ModuleID = 'AnghaBench/Provenance/Cores/PicoDrive/pico/sound/extr_sn76496.c_SN76496_init.c'
source_filename = "AnghaBench/Provenance/Cores/PicoDrive/pico/sound/extr_sn76496.c_SN76496_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.SN76496 = type { ptr, i32, ptr, i32, i32, ptr, ptr, i64, ptr }
@ono_sn = common global %struct.SN76496 zeroinitializer, align 8
@sn76496_regs = common local_unnamed_addr global ptr null, align 8
@NG_PRESET = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @SN76496_init(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load ptr, ptr @ono_sn, align 8, !tbaa !6
store ptr %3, ptr @sn76496_regs, align 8, !tbaa !13
store i32 %1, ptr getelementptr inbounds (i8, ptr @ono_sn, i64 8), align 8, !tbaa !14
%4 = tail call i32 @SN76496_set_clock(ptr noundef nonnull @ono_sn, i32 noundef %0) #3
%5 = load ptr, ptr getelementptr inbounds (i8, ptr @ono_sn, i64 56), align 8, !tbaa !15
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %5, i8 0, i64 32, i1 false), !tbaa !16
store i64 0, ptr getelementptr inbounds (i8, ptr @ono_sn, i64 48), align 8, !tbaa !17
%6 = load ptr, ptr @ono_sn, align 8, !tbaa !6
store <4 x i32> <i32 0, i32 15, i32 0, i32 15>, ptr %6, align 4, !tbaa !18
%7 = getelementptr inbounds i8, ptr %6, i64 16
store <4 x i32> <i32 0, i32 15, i32 0, i32 15>, ptr %7, align 4, !tbaa !18
%8 = load ptr, ptr getelementptr inbounds (i8, ptr @ono_sn, i64 16), align 8, !tbaa !19
%9 = load ptr, ptr getelementptr inbounds (i8, ptr @ono_sn, i64 32), align 8, !tbaa !20
%10 = load ptr, ptr getelementptr inbounds (i8, ptr @ono_sn, i64 40), align 8, !tbaa !21
store i32 0, ptr %8, align 4, !tbaa !18
%11 = load i32, ptr getelementptr inbounds (i8, ptr @ono_sn, i64 28), align 4, !tbaa !22
store i32 %11, ptr %9, align 4, !tbaa !18
store i32 %11, ptr %10, align 4, !tbaa !18
%12 = getelementptr inbounds i8, ptr %8, i64 4
store i32 0, ptr %12, align 4, !tbaa !18
%13 = load i32, ptr getelementptr inbounds (i8, ptr @ono_sn, i64 28), align 4, !tbaa !22
%14 = getelementptr inbounds i8, ptr %9, i64 4
store i32 %13, ptr %14, align 4, !tbaa !18
%15 = getelementptr inbounds i8, ptr %10, i64 4
store i32 %13, ptr %15, align 4, !tbaa !18
%16 = getelementptr inbounds i8, ptr %8, i64 8
store i32 0, ptr %16, align 4, !tbaa !18
%17 = load i32, ptr getelementptr inbounds (i8, ptr @ono_sn, i64 28), align 4, !tbaa !22
%18 = getelementptr inbounds i8, ptr %9, i64 8
store i32 %17, ptr %18, align 4, !tbaa !18
%19 = getelementptr inbounds i8, ptr %10, i64 8
store i32 %17, ptr %19, align 4, !tbaa !18
%20 = getelementptr inbounds i8, ptr %8, i64 12
store i32 0, ptr %20, align 4, !tbaa !18
%21 = load i32, ptr getelementptr inbounds (i8, ptr @ono_sn, i64 28), align 4, !tbaa !22
%22 = getelementptr inbounds i8, ptr %9, i64 12
store i32 %21, ptr %22, align 4, !tbaa !18
%23 = getelementptr inbounds i8, ptr %10, i64 12
store i32 %21, ptr %23, align 4, !tbaa !18
%24 = load i32, ptr @NG_PRESET, align 4, !tbaa !18
store i32 %24, ptr getelementptr inbounds (i8, ptr @ono_sn, i64 24), align 8, !tbaa !23
%25 = and i32 %24, 1
store i32 %25, ptr %20, align 4, !tbaa !18
%26 = tail call i32 @SN76496_set_gain(ptr noundef nonnull @ono_sn, i32 noundef 0) #3
ret i32 0
}
declare i32 @SN76496_set_clock(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SN76496_set_gain(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"SN76496", !8, i64 0, !11, i64 8, !8, i64 16, !11, i64 24, !11, i64 28, !8, i64 32, !8, i64 40, !12, i64 48, !8, i64 56}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !11, i64 8}
!15 = !{!7, !8, i64 56}
!16 = !{!12, !12, i64 0}
!17 = !{!7, !12, i64 48}
!18 = !{!11, !11, i64 0}
!19 = !{!7, !8, i64 16}
!20 = !{!7, !8, i64 32}
!21 = !{!7, !8, i64 40}
!22 = !{!7, !11, i64 28}
!23 = !{!7, !11, i64 24}
| Provenance_Cores_PicoDrive_pico_sound_extr_sn76496.c_SN76496_init |
; ModuleID = 'AnghaBench/nodemcu-firmware/app/lua/extr_lapi.c_luaA_pushobject.c'
source_filename = "AnghaBench/nodemcu-firmware/app/lua/extr_lapi.c_luaA_pushobject.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @luaA_pushobject(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = tail call i32 @setobj2s(ptr noundef nonnull %0, i32 noundef %3, ptr noundef %1) #2
%5 = tail call i32 @api_incr_top(ptr noundef nonnull %0) #2
ret void
}
declare i32 @setobj2s(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @api_incr_top(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/nodemcu-firmware/app/lua/extr_lapi.c_luaA_pushobject.c'
source_filename = "AnghaBench/nodemcu-firmware/app/lua/extr_lapi.c_luaA_pushobject.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @luaA_pushobject(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = tail call i32 @setobj2s(ptr noundef nonnull %0, i32 noundef %3, ptr noundef %1) #2
%5 = tail call i32 @api_incr_top(ptr noundef nonnull %0) #2
ret void
}
declare i32 @setobj2s(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @api_incr_top(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| nodemcu-firmware_app_lua_extr_lapi.c_luaA_pushobject |
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/kagamidget/keymaps/default/extr_keymap.c_led_set_user.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/kagamidget/keymaps/default/extr_keymap.c_led_set_user.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local void @led_set_user(i32 noundef %0) local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/qmk_firmware/keyboards/kagamidget/keymaps/default/extr_keymap.c_led_set_user.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/kagamidget/keymaps/default/extr_keymap.c_led_set_user.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define void @led_set_user(i32 noundef %0) local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| qmk_firmware_keyboards_kagamidget_keymaps_default_extr_keymap.c_led_set_user |
; ModuleID = 'AnghaBench/linux/drivers/bcma/extr_driver_mips.c_mips_read32.c'
source_filename = "AnghaBench/linux/drivers/bcma/extr_driver_mips.c_mips_read32.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @mips_read32], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @mips_read32(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = tail call i32 @bcma_read32(i32 noundef %3, i32 noundef %1) #2
ret i32 %4
}
declare i32 @bcma_read32(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"bcma_drv_mips", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/bcma/extr_driver_mips.c_mips_read32.c'
source_filename = "AnghaBench/linux/drivers/bcma/extr_driver_mips.c_mips_read32.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @mips_read32], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @mips_read32(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = tail call i32 @bcma_read32(i32 noundef %3, i32 noundef %1) #2
ret i32 %4
}
declare i32 @bcma_read32(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"bcma_drv_mips", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_bcma_extr_driver_mips.c_mips_read32 |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_trinity_dpm.c_trinity_set_vce_clock.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_trinity_dpm.c_trinity_set_vce_clock.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.radeon_ps = type { i64, i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @trinity_set_vce_clock], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @trinity_set_vce_clock(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2) #0 {
%4 = load i64, ptr %2, align 8, !tbaa !5
%5 = load i64, ptr %1, align 8, !tbaa !5
%6 = icmp eq i64 %4, %5
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = getelementptr inbounds %struct.radeon_ps, ptr %2, i64 0, i32 1
%9 = load i64, ptr %8, align 8, !tbaa !10
%10 = getelementptr inbounds %struct.radeon_ps, ptr %1, i64 0, i32 1
%11 = load i64, ptr %10, align 8, !tbaa !10
%12 = icmp eq i64 %9, %11
br i1 %12, label %27, label %13
13: ; preds = %7, %3
%14 = icmp eq i64 %5, 0
br i1 %14, label %15, label %20
15: ; preds = %13
%16 = getelementptr inbounds %struct.radeon_ps, ptr %1, i64 0, i32 1
%17 = load i64, ptr %16, align 8, !tbaa !10
%18 = icmp eq i64 %17, 0
%19 = zext i1 %18 to i32
br label %20
20: ; preds = %15, %13
%21 = phi i32 [ 0, %13 ], [ %19, %15 ]
%22 = tail call i32 @vce_v1_0_enable_mgcg(ptr noundef %0, i32 noundef %21) #2
%23 = load i64, ptr %1, align 8, !tbaa !5
%24 = getelementptr inbounds %struct.radeon_ps, ptr %1, i64 0, i32 1
%25 = load i64, ptr %24, align 8, !tbaa !10
%26 = tail call i32 @radeon_set_vce_clocks(ptr noundef %0, i64 noundef %23, i64 noundef %25) #2
br label %27
27: ; preds = %20, %7
ret void
}
declare i32 @vce_v1_0_enable_mgcg(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @radeon_set_vce_clocks(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"radeon_ps", !7, i64 0, !7, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_trinity_dpm.c_trinity_set_vce_clock.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_trinity_dpm.c_trinity_set_vce_clock.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @trinity_set_vce_clock], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @trinity_set_vce_clock(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2) #0 {
%4 = load i64, ptr %2, align 8, !tbaa !6
%5 = load i64, ptr %1, align 8, !tbaa !6
%6 = icmp eq i64 %4, %5
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = getelementptr inbounds i8, ptr %2, i64 8
%9 = load i64, ptr %8, align 8, !tbaa !11
%10 = getelementptr inbounds i8, ptr %1, i64 8
%11 = load i64, ptr %10, align 8, !tbaa !11
%12 = icmp eq i64 %9, %11
br i1 %12, label %27, label %13
13: ; preds = %7, %3
%14 = icmp eq i64 %5, 0
br i1 %14, label %15, label %20
15: ; preds = %13
%16 = getelementptr inbounds i8, ptr %1, i64 8
%17 = load i64, ptr %16, align 8, !tbaa !11
%18 = icmp eq i64 %17, 0
%19 = zext i1 %18 to i32
br label %20
20: ; preds = %15, %13
%21 = phi i32 [ 0, %13 ], [ %19, %15 ]
%22 = tail call i32 @vce_v1_0_enable_mgcg(ptr noundef %0, i32 noundef %21) #2
%23 = load i64, ptr %1, align 8, !tbaa !6
%24 = getelementptr inbounds i8, ptr %1, i64 8
%25 = load i64, ptr %24, align 8, !tbaa !11
%26 = tail call i32 @radeon_set_vce_clocks(ptr noundef %0, i64 noundef %23, i64 noundef %25) #2
br label %27
27: ; preds = %20, %7
ret void
}
declare i32 @vce_v1_0_enable_mgcg(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @radeon_set_vce_clocks(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"radeon_ps", !8, i64 0, !8, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 8}
| linux_drivers_gpu_drm_radeon_extr_trinity_dpm.c_trinity_set_vce_clock |
; ModuleID = 'AnghaBench/linux/arch/parisc/lib/extr_delay.c___cr16_delay.c'
source_filename = "AnghaBench/linux/arch/parisc/lib/extr_delay.c___cr16_delay.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @__cr16_delay], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @__cr16_delay(i64 noundef %0) #0 {
%2 = tail call i32 (...) @preempt_disable() #2
%3 = tail call i32 (...) @smp_processor_id() #2
%4 = tail call i64 @mfctl(i32 noundef 16) #2
%5 = tail call i64 @mfctl(i32 noundef 16) #2
%6 = sub nsw i64 %5, %4
%7 = icmp slt i64 %6, %0
br i1 %7, label %8, label %32
8: ; preds = %1, %25
%9 = phi i64 [ %30, %25 ], [ %6, %1 ]
%10 = phi i32 [ %28, %25 ], [ %3, %1 ]
%11 = phi i64 [ %27, %25 ], [ %0, %1 ]
%12 = phi i64 [ %26, %25 ], [ %4, %1 ]
%13 = tail call i32 (...) @preempt_enable() #2
tail call void asm sideeffect "\09nop\0A", "~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !5
%14 = tail call i32 (...) @barrier() #2
%15 = tail call i32 (...) @preempt_disable() #2
%16 = tail call i32 (...) @smp_processor_id() #2
%17 = icmp ne i32 %10, %16
%18 = zext i1 %17 to i32
%19 = tail call i64 @unlikely(i32 noundef %18) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %25, label %21
21: ; preds = %8
%22 = sub nsw i64 %11, %9
%23 = tail call i32 (...) @smp_processor_id() #2
%24 = tail call i64 @mfctl(i32 noundef 16) #2
br label %25
25: ; preds = %21, %8
%26 = phi i64 [ %24, %21 ], [ %12, %8 ]
%27 = phi i64 [ %22, %21 ], [ %11, %8 ]
%28 = phi i32 [ %23, %21 ], [ %10, %8 ]
%29 = tail call i64 @mfctl(i32 noundef 16) #2
%30 = sub nsw i64 %29, %26
%31 = icmp slt i64 %30, %27
br i1 %31, label %8, label %32
32: ; preds = %25, %1
%33 = tail call i32 (...) @preempt_enable() #2
ret void
}
declare i32 @preempt_disable(...) local_unnamed_addr #1
declare i32 @smp_processor_id(...) local_unnamed_addr #1
declare i64 @mfctl(i32 noundef) local_unnamed_addr #1
declare i32 @preempt_enable(...) local_unnamed_addr #1
declare i32 @barrier(...) local_unnamed_addr #1
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{i64 1189}
| ; ModuleID = 'AnghaBench/linux/arch/parisc/lib/extr_delay.c___cr16_delay.c'
source_filename = "AnghaBench/linux/arch/parisc/lib/extr_delay.c___cr16_delay.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @__cr16_delay], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @__cr16_delay(i64 noundef %0) #0 {
%2 = tail call i32 @preempt_disable() #2
%3 = tail call i32 @smp_processor_id() #2
%4 = tail call i64 @mfctl(i32 noundef 16) #2
%5 = tail call i64 @mfctl(i32 noundef 16) #2
%6 = sub nsw i64 %5, %4
%7 = icmp slt i64 %6, %0
br i1 %7, label %8, label %32
8: ; preds = %1, %25
%9 = phi i64 [ %30, %25 ], [ %6, %1 ]
%10 = phi i32 [ %28, %25 ], [ %3, %1 ]
%11 = phi i64 [ %27, %25 ], [ %0, %1 ]
%12 = phi i64 [ %26, %25 ], [ %4, %1 ]
%13 = tail call i32 @preempt_enable() #2
tail call void asm sideeffect "\09nop\0A", ""() #2, !srcloc !6
%14 = tail call i32 @barrier() #2
%15 = tail call i32 @preempt_disable() #2
%16 = tail call i32 @smp_processor_id() #2
%17 = icmp ne i32 %10, %16
%18 = zext i1 %17 to i32
%19 = tail call i64 @unlikely(i32 noundef %18) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %25, label %21
21: ; preds = %8
%22 = sub nsw i64 %11, %9
%23 = tail call i32 @smp_processor_id() #2
%24 = tail call i64 @mfctl(i32 noundef 16) #2
br label %25
25: ; preds = %21, %8
%26 = phi i64 [ %24, %21 ], [ %12, %8 ]
%27 = phi i64 [ %22, %21 ], [ %11, %8 ]
%28 = phi i32 [ %23, %21 ], [ %10, %8 ]
%29 = tail call i64 @mfctl(i32 noundef 16) #2
%30 = sub nsw i64 %29, %26
%31 = icmp slt i64 %30, %27
br i1 %31, label %8, label %32
32: ; preds = %25, %1
%33 = tail call i32 @preempt_enable() #2
ret void
}
declare i32 @preempt_disable(...) local_unnamed_addr #1
declare i32 @smp_processor_id(...) local_unnamed_addr #1
declare i64 @mfctl(i32 noundef) local_unnamed_addr #1
declare i32 @preempt_enable(...) local_unnamed_addr #1
declare i32 @barrier(...) local_unnamed_addr #1
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{i64 1189}
| linux_arch_parisc_lib_extr_delay.c___cr16_delay |
; ModuleID = 'AnghaBench/linux/drivers/scsi/hisi_sas/extr_hisi_sas_v2_hw.c_fatal_axi_int_v2_hw.c'
source_filename = "AnghaBench/linux/drivers/scsi/hisi_sas/extr_hisi_sas_v2_hw.c_fatal_axi_int_v2_hw.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.hisi_hba = type { ptr, i32, i32, ptr }
%struct.hisi_sas_hw_error = type { i32, i32, i32, i64, i32, ptr }
%struct.hisi_sas_device = type { i32 }
@ENT_INT_SRC_MSK3 = dso_local local_unnamed_addr global i32 0, align 4
@ENT_INT_SRC3 = dso_local local_unnamed_addr global i32 0, align 4
@fatal_axi_errors = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [18 x i8] c"%s (0x%x) found!\0A\00", align 1
@ENT_INT_SRC3_ITC_INT_OFF = dso_local local_unnamed_addr global i32 0, align 4
@ITCT_CLR = dso_local local_unnamed_addr global i32 0, align 4
@ITCT_DEV_MSK = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [15 x i8] c"clear ITCT ok\0A\00", align 1
@IRQ_HANDLED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @fatal_axi_int_v2_hw], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @fatal_axi_int_v2_hw(i32 %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds %struct.hisi_hba, ptr %1, i64 0, i32 3
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = load i32, ptr @ENT_INT_SRC_MSK3, align 4, !tbaa !11
%6 = tail call i32 @hisi_sas_read32(ptr noundef %1, i32 noundef %5) #2
%7 = load i32, ptr @ENT_INT_SRC_MSK3, align 4, !tbaa !11
%8 = or i32 %6, -2
%9 = tail call i32 @hisi_sas_write32(ptr noundef %1, i32 noundef %7, i32 noundef %8) #2
%10 = load i32, ptr @ENT_INT_SRC3, align 4, !tbaa !11
%11 = tail call i32 @hisi_sas_read32(ptr noundef %1, i32 noundef %10) #2
%12 = load ptr, ptr @fatal_axi_errors, align 8, !tbaa !12
%13 = tail call i32 @ARRAY_SIZE(ptr noundef %12) #2
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %70
15: ; preds = %2
%16 = getelementptr inbounds %struct.hisi_hba, ptr %1, i64 0, i32 2
%17 = getelementptr inbounds %struct.hisi_hba, ptr %1, i64 0, i32 1
br label %18
18: ; preds = %15, %64
%19 = phi i64 [ 0, %15 ], [ %65, %64 ]
%20 = load ptr, ptr @fatal_axi_errors, align 8, !tbaa !12
%21 = getelementptr inbounds %struct.hisi_sas_hw_error, ptr %20, i64 %19
%22 = load i32, ptr %21, align 8, !tbaa !13
%23 = and i32 %22, %11
%24 = icmp eq i32 %23, 0
br i1 %24, label %64, label %25
25: ; preds = %18
%26 = load i32, ptr @ENT_INT_SRC3, align 4, !tbaa !11
%27 = getelementptr inbounds %struct.hisi_sas_hw_error, ptr %20, i64 %19, i32 1
%28 = load i32, ptr %27, align 4, !tbaa !16
%29 = shl nuw i32 1, %28
%30 = tail call i32 @hisi_sas_write32(ptr noundef %1, i32 noundef %26, i32 noundef %29) #2
%31 = getelementptr inbounds %struct.hisi_sas_hw_error, ptr %20, i64 %19, i32 5
%32 = load ptr, ptr %31, align 8, !tbaa !17
%33 = icmp eq ptr %32, null
br i1 %33, label %58, label %34
34: ; preds = %25
%35 = getelementptr inbounds %struct.hisi_sas_hw_error, ptr %20, i64 %19, i32 4
%36 = load i32, ptr %35, align 8, !tbaa !18
%37 = tail call i32 @hisi_sas_read32(ptr noundef %1, i32 noundef %36) #2
br label %38
38: ; preds = %56, %34
%39 = phi ptr [ %32, %34 ], [ %57, %56 ]
%40 = getelementptr inbounds %struct.hisi_sas_hw_error, ptr %39, i64 0, i32 2
%41 = load i32, ptr %40, align 8, !tbaa !19
%42 = icmp eq i32 %41, 0
br i1 %42, label %43, label %47
43: ; preds = %38
%44 = getelementptr inbounds %struct.hisi_sas_hw_error, ptr %39, i64 0, i32 3
%45 = load i64, ptr %44, align 8, !tbaa !20
%46 = icmp eq i64 %45, 0
br i1 %46, label %64, label %47
47: ; preds = %38, %43
%48 = and i32 %41, %37
%49 = icmp eq i32 %48, 0
br i1 %49, label %56, label %50
50: ; preds = %47
%51 = getelementptr inbounds %struct.hisi_sas_hw_error, ptr %39, i64 0, i32 3
%52 = load i64, ptr %51, align 8, !tbaa !20
%53 = tail call i32 @dev_err(ptr noundef %4, ptr noundef nonnull @.str, i64 noundef %52, i32 noundef %11) #2
%54 = load i32, ptr %16, align 4, !tbaa !21
%55 = tail call i32 @queue_work(i32 noundef %54, ptr noundef nonnull %17) #2
br label %56
56: ; preds = %47, %50
%57 = getelementptr inbounds %struct.hisi_sas_hw_error, ptr %39, i64 1
br label %38, !llvm.loop !22
58: ; preds = %25
%59 = getelementptr inbounds %struct.hisi_sas_hw_error, ptr %20, i64 %19, i32 3
%60 = load i64, ptr %59, align 8, !tbaa !20
%61 = tail call i32 @dev_err(ptr noundef %4, ptr noundef nonnull @.str, i64 noundef %60, i32 noundef %11) #2
%62 = load i32, ptr %16, align 4, !tbaa !21
%63 = tail call i32 @queue_work(i32 noundef %62, ptr noundef nonnull %17) #2
br label %64
64: ; preds = %43, %58, %18
%65 = add nuw nsw i64 %19, 1
%66 = load ptr, ptr @fatal_axi_errors, align 8, !tbaa !12
%67 = tail call i32 @ARRAY_SIZE(ptr noundef %66) #2
%68 = sext i32 %67 to i64
%69 = icmp slt i64 %65, %68
br i1 %69, label %18, label %70, !llvm.loop !24
70: ; preds = %64, %2
%71 = load i32, ptr @ENT_INT_SRC3_ITC_INT_OFF, align 4, !tbaa !11
%72 = tail call i32 @BIT(i32 noundef %71) #2
%73 = and i32 %72, %11
%74 = icmp eq i32 %73, 0
br i1 %74, label %88, label %75
75: ; preds = %70
%76 = load i32, ptr @ITCT_CLR, align 4, !tbaa !11
%77 = tail call i32 @hisi_sas_read32(ptr noundef %1, i32 noundef %76) #2
%78 = load i32, ptr @ITCT_DEV_MSK, align 4, !tbaa !11
%79 = and i32 %78, %77
%80 = load ptr, ptr %1, align 8, !tbaa !25
%81 = sext i32 %79 to i64
%82 = getelementptr inbounds %struct.hisi_sas_device, ptr %80, i64 %81
%83 = load i32, ptr @ITCT_CLR, align 4, !tbaa !11
%84 = tail call i32 @hisi_sas_write32(ptr noundef nonnull %1, i32 noundef %83, i32 noundef 0) #2
%85 = tail call i32 @dev_dbg(ptr noundef %4, ptr noundef nonnull @.str.1) #2
%86 = load i32, ptr %82, align 4, !tbaa !26
%87 = tail call i32 @complete(i32 noundef %86) #2
br label %88
88: ; preds = %75, %70
%89 = load i32, ptr @ENT_INT_SRC3, align 4, !tbaa !11
%90 = tail call i32 @hisi_sas_write32(ptr noundef %1, i32 noundef %89, i32 noundef %11) #2
%91 = load i32, ptr @ENT_INT_SRC_MSK3, align 4, !tbaa !11
%92 = tail call i32 @hisi_sas_write32(ptr noundef %1, i32 noundef %91, i32 noundef %6) #2
%93 = load i32, ptr @IRQ_HANDLED, align 4, !tbaa !11
ret i32 %93
}
declare i32 @hisi_sas_read32(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @hisi_sas_write32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @queue_work(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @BIT(i32 noundef) local_unnamed_addr #1
declare i32 @dev_dbg(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @complete(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"hisi_hba", !7, i64 0, !10, i64 8, !10, i64 12, !7, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !10, i64 0}
!14 = !{!"hisi_sas_hw_error", !10, i64 0, !10, i64 4, !10, i64 8, !15, i64 16, !10, i64 24, !7, i64 32}
!15 = !{!"long", !8, i64 0}
!16 = !{!14, !10, i64 4}
!17 = !{!14, !7, i64 32}
!18 = !{!14, !10, i64 24}
!19 = !{!14, !10, i64 8}
!20 = !{!14, !15, i64 16}
!21 = !{!6, !10, i64 12}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = distinct !{!24, !23}
!25 = !{!6, !7, i64 0}
!26 = !{!27, !10, i64 0}
!27 = !{!"hisi_sas_device", !10, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/hisi_sas/extr_hisi_sas_v2_hw.c_fatal_axi_int_v2_hw.c'
source_filename = "AnghaBench/linux/drivers/scsi/hisi_sas/extr_hisi_sas_v2_hw.c_fatal_axi_int_v2_hw.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.hisi_sas_hw_error = type { i32, i32, i32, i64, i32, ptr }
%struct.hisi_sas_device = type { i32 }
@ENT_INT_SRC_MSK3 = common local_unnamed_addr global i32 0, align 4
@ENT_INT_SRC3 = common local_unnamed_addr global i32 0, align 4
@fatal_axi_errors = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [18 x i8] c"%s (0x%x) found!\0A\00", align 1
@ENT_INT_SRC3_ITC_INT_OFF = common local_unnamed_addr global i32 0, align 4
@ITCT_CLR = common local_unnamed_addr global i32 0, align 4
@ITCT_DEV_MSK = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [15 x i8] c"clear ITCT ok\0A\00", align 1
@IRQ_HANDLED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @fatal_axi_int_v2_hw], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @fatal_axi_int_v2_hw(i32 %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 16
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load i32, ptr @ENT_INT_SRC_MSK3, align 4, !tbaa !12
%6 = tail call i32 @hisi_sas_read32(ptr noundef %1, i32 noundef %5) #2
%7 = load i32, ptr @ENT_INT_SRC_MSK3, align 4, !tbaa !12
%8 = or i32 %6, -2
%9 = tail call i32 @hisi_sas_write32(ptr noundef %1, i32 noundef %7, i32 noundef %8) #2
%10 = load i32, ptr @ENT_INT_SRC3, align 4, !tbaa !12
%11 = tail call i32 @hisi_sas_read32(ptr noundef %1, i32 noundef %10) #2
%12 = load ptr, ptr @fatal_axi_errors, align 8, !tbaa !13
%13 = tail call i32 @ARRAY_SIZE(ptr noundef %12) #2
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %70
15: ; preds = %2
%16 = getelementptr inbounds i8, ptr %1, i64 12
%17 = getelementptr inbounds i8, ptr %1, i64 8
br label %18
18: ; preds = %15, %64
%19 = phi i64 [ 0, %15 ], [ %65, %64 ]
%20 = load ptr, ptr @fatal_axi_errors, align 8, !tbaa !13
%21 = getelementptr inbounds %struct.hisi_sas_hw_error, ptr %20, i64 %19
%22 = load i32, ptr %21, align 8, !tbaa !14
%23 = and i32 %22, %11
%24 = icmp eq i32 %23, 0
br i1 %24, label %64, label %25
25: ; preds = %18
%26 = load i32, ptr @ENT_INT_SRC3, align 4, !tbaa !12
%27 = getelementptr inbounds i8, ptr %21, i64 4
%28 = load i32, ptr %27, align 4, !tbaa !17
%29 = shl nuw i32 1, %28
%30 = tail call i32 @hisi_sas_write32(ptr noundef %1, i32 noundef %26, i32 noundef %29) #2
%31 = getelementptr inbounds i8, ptr %21, i64 32
%32 = load ptr, ptr %31, align 8, !tbaa !18
%33 = icmp eq ptr %32, null
br i1 %33, label %58, label %34
34: ; preds = %25
%35 = getelementptr inbounds i8, ptr %21, i64 24
%36 = load i32, ptr %35, align 8, !tbaa !19
%37 = tail call i32 @hisi_sas_read32(ptr noundef %1, i32 noundef %36) #2
br label %38
38: ; preds = %56, %34
%39 = phi ptr [ %32, %34 ], [ %57, %56 ]
%40 = getelementptr inbounds i8, ptr %39, i64 8
%41 = load i32, ptr %40, align 8, !tbaa !20
%42 = icmp eq i32 %41, 0
br i1 %42, label %43, label %47
43: ; preds = %38
%44 = getelementptr inbounds i8, ptr %39, i64 16
%45 = load i64, ptr %44, align 8, !tbaa !21
%46 = icmp eq i64 %45, 0
br i1 %46, label %64, label %47
47: ; preds = %38, %43
%48 = and i32 %41, %37
%49 = icmp eq i32 %48, 0
br i1 %49, label %56, label %50
50: ; preds = %47
%51 = getelementptr inbounds i8, ptr %39, i64 16
%52 = load i64, ptr %51, align 8, !tbaa !21
%53 = tail call i32 @dev_err(ptr noundef %4, ptr noundef nonnull @.str, i64 noundef %52, i32 noundef %11) #2
%54 = load i32, ptr %16, align 4, !tbaa !22
%55 = tail call i32 @queue_work(i32 noundef %54, ptr noundef nonnull %17) #2
br label %56
56: ; preds = %47, %50
%57 = getelementptr inbounds i8, ptr %39, i64 40
br label %38, !llvm.loop !23
58: ; preds = %25
%59 = getelementptr inbounds i8, ptr %21, i64 16
%60 = load i64, ptr %59, align 8, !tbaa !21
%61 = tail call i32 @dev_err(ptr noundef %4, ptr noundef nonnull @.str, i64 noundef %60, i32 noundef %11) #2
%62 = load i32, ptr %16, align 4, !tbaa !22
%63 = tail call i32 @queue_work(i32 noundef %62, ptr noundef nonnull %17) #2
br label %64
64: ; preds = %43, %58, %18
%65 = add nuw nsw i64 %19, 1
%66 = load ptr, ptr @fatal_axi_errors, align 8, !tbaa !13
%67 = tail call i32 @ARRAY_SIZE(ptr noundef %66) #2
%68 = sext i32 %67 to i64
%69 = icmp slt i64 %65, %68
br i1 %69, label %18, label %70, !llvm.loop !25
70: ; preds = %64, %2
%71 = load i32, ptr @ENT_INT_SRC3_ITC_INT_OFF, align 4, !tbaa !12
%72 = tail call i32 @BIT(i32 noundef %71) #2
%73 = and i32 %72, %11
%74 = icmp eq i32 %73, 0
br i1 %74, label %88, label %75
75: ; preds = %70
%76 = load i32, ptr @ITCT_CLR, align 4, !tbaa !12
%77 = tail call i32 @hisi_sas_read32(ptr noundef %1, i32 noundef %76) #2
%78 = load i32, ptr @ITCT_DEV_MSK, align 4, !tbaa !12
%79 = and i32 %78, %77
%80 = load ptr, ptr %1, align 8, !tbaa !26
%81 = sext i32 %79 to i64
%82 = getelementptr inbounds %struct.hisi_sas_device, ptr %80, i64 %81
%83 = load i32, ptr @ITCT_CLR, align 4, !tbaa !12
%84 = tail call i32 @hisi_sas_write32(ptr noundef nonnull %1, i32 noundef %83, i32 noundef 0) #2
%85 = tail call i32 @dev_dbg(ptr noundef %4, ptr noundef nonnull @.str.1) #2
%86 = load i32, ptr %82, align 4, !tbaa !27
%87 = tail call i32 @complete(i32 noundef %86) #2
br label %88
88: ; preds = %75, %70
%89 = load i32, ptr @ENT_INT_SRC3, align 4, !tbaa !12
%90 = tail call i32 @hisi_sas_write32(ptr noundef %1, i32 noundef %89, i32 noundef %11) #2
%91 = load i32, ptr @ENT_INT_SRC_MSK3, align 4, !tbaa !12
%92 = tail call i32 @hisi_sas_write32(ptr noundef %1, i32 noundef %91, i32 noundef %6) #2
%93 = load i32, ptr @IRQ_HANDLED, align 4, !tbaa !12
ret i32 %93
}
declare i32 @hisi_sas_read32(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @hisi_sas_write32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @queue_work(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @BIT(i32 noundef) local_unnamed_addr #1
declare i32 @dev_dbg(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @complete(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"hisi_hba", !8, i64 0, !11, i64 8, !11, i64 12, !8, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!15, !11, i64 0}
!15 = !{!"hisi_sas_hw_error", !11, i64 0, !11, i64 4, !11, i64 8, !16, i64 16, !11, i64 24, !8, i64 32}
!16 = !{!"long", !9, i64 0}
!17 = !{!15, !11, i64 4}
!18 = !{!15, !8, i64 32}
!19 = !{!15, !11, i64 24}
!20 = !{!15, !11, i64 8}
!21 = !{!15, !16, i64 16}
!22 = !{!7, !11, i64 12}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = distinct !{!25, !24}
!26 = !{!7, !8, i64 0}
!27 = !{!28, !11, i64 0}
!28 = !{!"hisi_sas_device", !11, i64 0}
| linux_drivers_scsi_hisi_sas_extr_hisi_sas_v2_hw.c_fatal_axi_int_v2_hw |
; ModuleID = 'AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_movea_16_a.c'
source_filename = "AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_movea_16_a.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@AY = dso_local local_unnamed_addr global i32 0, align 4
@AX = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @m68k_op_movea_16_a], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @m68k_op_movea_16_a() #0 {
%1 = load i32, ptr @AY, align 4, !tbaa !5
%2 = tail call i32 @MAKE_INT_16(i32 noundef %1) #2
store i32 %2, ptr @AX, align 4, !tbaa !5
ret void
}
declare i32 @MAKE_INT_16(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_movea_16_a.c'
source_filename = "AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_movea_16_a.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@AY = common local_unnamed_addr global i32 0, align 4
@AX = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @m68k_op_movea_16_a], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @m68k_op_movea_16_a() #0 {
%1 = load i32, ptr @AY, align 4, !tbaa !6
%2 = tail call i32 @MAKE_INT_16(i32 noundef %1) #2
store i32 %2, ptr @AX, align 4, !tbaa !6
ret void
}
declare i32 @MAKE_INT_16(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| Provenance_Cores_Genesis-Plus-GX_PVGenesis_Genesis_GenesisCore_genplusgx_source_m68k_extr_m68kops.h_m68k_op_movea_16_a |
; ModuleID = 'AnghaBench/reactos/sdk/lib/3rdparty/libxml2/extr_tree.c_xmlCopyNamespaceList.c'
source_filename = "AnghaBench/reactos/sdk/lib/3rdparty/libxml2/extr_tree.c_xmlCopyNamespaceList.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local ptr @xmlCopyNamespaceList(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %14, label %3
3: ; preds = %1, %10
%4 = phi ptr [ %12, %10 ], [ %0, %1 ]
%5 = phi ptr [ %7, %10 ], [ null, %1 ]
%6 = phi ptr [ %11, %10 ], [ null, %1 ]
%7 = tail call ptr @xmlCopyNamespace(ptr noundef nonnull %4) #2
%8 = icmp eq ptr %5, null
br i1 %8, label %10, label %9
9: ; preds = %3
store ptr %7, ptr %5, align 8, !tbaa !5
br label %10
10: ; preds = %3, %9
%11 = phi ptr [ %6, %9 ], [ %7, %3 ]
%12 = load ptr, ptr %4, align 8, !tbaa !5
%13 = icmp eq ptr %12, null
br i1 %13, label %14, label %3, !llvm.loop !10
14: ; preds = %10, %1
%15 = phi ptr [ null, %1 ], [ %11, %10 ]
ret ptr %15
}
declare ptr @xmlCopyNamespace(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_6__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/reactos/sdk/lib/3rdparty/libxml2/extr_tree.c_xmlCopyNamespaceList.c'
source_filename = "AnghaBench/reactos/sdk/lib/3rdparty/libxml2/extr_tree.c_xmlCopyNamespaceList.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @xmlCopyNamespaceList(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %14, label %3
3: ; preds = %1, %10
%4 = phi ptr [ %12, %10 ], [ %0, %1 ]
%5 = phi ptr [ %7, %10 ], [ null, %1 ]
%6 = phi ptr [ %11, %10 ], [ null, %1 ]
%7 = tail call ptr @xmlCopyNamespace(ptr noundef nonnull %4) #2
%8 = icmp eq ptr %5, null
br i1 %8, label %10, label %9
9: ; preds = %3
store ptr %7, ptr %5, align 8, !tbaa !6
br label %10
10: ; preds = %3, %9
%11 = phi ptr [ %6, %9 ], [ %7, %3 ]
%12 = load ptr, ptr %4, align 8, !tbaa !6
%13 = icmp eq ptr %12, null
br i1 %13, label %14, label %3, !llvm.loop !11
14: ; preds = %10, %1
%15 = phi ptr [ null, %1 ], [ %11, %10 ]
ret ptr %15
}
declare ptr @xmlCopyNamespace(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
| reactos_sdk_lib_3rdparty_libxml2_extr_tree.c_xmlCopyNamespaceList |
; ModuleID = 'AnghaBench/linux/kernel/trace/extr_ring_buffer.c_test_time_stamp.c'
source_filename = "AnghaBench/linux/kernel/trace/extr_ring_buffer.c_test_time_stamp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@TS_DELTA_TEST = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @test_time_stamp], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal i32 @test_time_stamp(i32 noundef %0) #0 {
%2 = load i32, ptr @TS_DELTA_TEST, align 4, !tbaa !5
%3 = and i32 %2, %0
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/kernel/trace/extr_ring_buffer.c_test_time_stamp.c'
source_filename = "AnghaBench/linux/kernel/trace/extr_ring_buffer.c_test_time_stamp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TS_DELTA_TEST = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @test_time_stamp], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal range(i32 0, 2) i32 @test_time_stamp(i32 noundef %0) #0 {
%2 = load i32, ptr @TS_DELTA_TEST, align 4, !tbaa !6
%3 = and i32 %2, %0
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_kernel_trace_extr_ring_buffer.c_test_time_stamp |
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_global.c_record_conflicts.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_global.c_record_conflicts.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32 }
@allocno = dso_local local_unnamed_addr global ptr null, align 8
@hard_regs_live = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @record_conflicts], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @record_conflicts(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %18
4: ; preds = %2
%5 = zext nneg i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ %5, %4 ], [ %8, %6 ]
%8 = add nsw i64 %7, -1
%9 = load ptr, ptr @allocno, align 8, !tbaa !5
%10 = getelementptr inbounds i32, ptr %0, i64 %8
%11 = load i32, ptr %10, align 4, !tbaa !9
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds %struct.TYPE_2__, ptr %9, i64 %12
%14 = load i32, ptr %13, align 4, !tbaa !11
%15 = load i32, ptr @hard_regs_live, align 4, !tbaa !9
%16 = tail call i32 @IOR_HARD_REG_SET(i32 noundef %14, i32 noundef %15) #2
%17 = icmp ugt i64 %7, 1
br i1 %17, label %6, label %18, !llvm.loop !13
18: ; preds = %6, %2
ret void
}
declare i32 @IOR_HARD_REG_SET(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_2__", !10, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_global.c_record_conflicts.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_global.c_record_conflicts.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32 }
@allocno = common local_unnamed_addr global ptr null, align 8
@hard_regs_live = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @record_conflicts], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @record_conflicts(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %18
4: ; preds = %2
%5 = zext nneg i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ %5, %4 ], [ %8, %6 ]
%8 = add nsw i64 %7, -1
%9 = load ptr, ptr @allocno, align 8, !tbaa !6
%10 = getelementptr inbounds i32, ptr %0, i64 %8
%11 = load i32, ptr %10, align 4, !tbaa !10
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds %struct.TYPE_2__, ptr %9, i64 %12
%14 = load i32, ptr %13, align 4, !tbaa !12
%15 = load i32, ptr @hard_regs_live, align 4, !tbaa !10
%16 = tail call i32 @IOR_HARD_REG_SET(i32 noundef %14, i32 noundef %15) #2
%17 = icmp ugt i64 %7, 1
br i1 %17, label %6, label %18, !llvm.loop !14
18: ; preds = %6, %2
ret void
}
declare i32 @IOR_HARD_REG_SET(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_2__", !11, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
| freebsd_contrib_gcc_extr_global.c_record_conflicts |
; ModuleID = 'AnghaBench/linux/mm/extr_hmm.c_hmm_pfns_bad.c'
source_filename = "AnghaBench/linux/mm/extr_hmm.c_hmm_pfns_bad.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.hmm_range = type { i64, ptr, ptr }
@PAGE_SHIFT = dso_local local_unnamed_addr global i64 0, align 8
@HMM_PFN_ERROR = dso_local local_unnamed_addr global i64 0, align 8
@PAGE_SIZE = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @hmm_pfns_bad], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable
define internal noundef i32 @hmm_pfns_bad(i64 noundef %0, i64 noundef %1, ptr nocapture noundef readonly %2) #0 {
%4 = load ptr, ptr %2, align 8, !tbaa !5
%5 = load ptr, ptr %4, align 8, !tbaa !10
%6 = getelementptr inbounds %struct.hmm_range, ptr %5, i64 0, i32 2
%7 = load ptr, ptr %6, align 8, !tbaa !12
%8 = icmp ult i64 %0, %1
br i1 %8, label %9, label %27
9: ; preds = %3
%10 = load i64, ptr %5, align 8, !tbaa !15
%11 = sub i64 %0, %10
%12 = load i64, ptr @PAGE_SHIFT, align 8, !tbaa !16
%13 = lshr i64 %11, %12
%14 = getelementptr inbounds %struct.hmm_range, ptr %5, i64 0, i32 1
%15 = load ptr, ptr %14, align 8, !tbaa !17
%16 = load i64, ptr @HMM_PFN_ERROR, align 8, !tbaa !16
%17 = getelementptr inbounds i32, ptr %15, i64 %16
%18 = load i64, ptr @PAGE_SIZE, align 8, !tbaa !16
%19 = load i32, ptr %17, align 4, !tbaa !18
br label %20
20: ; preds = %9, %20
%21 = phi i64 [ %13, %9 ], [ %25, %20 ]
%22 = phi i64 [ %0, %9 ], [ %24, %20 ]
%23 = getelementptr inbounds i32, ptr %7, i64 %21
store i32 %19, ptr %23, align 4, !tbaa !18
%24 = add i64 %18, %22
%25 = add i64 %21, 1
%26 = icmp ult i64 %24, %1
br i1 %26, label %20, label %27, !llvm.loop !20
27: ; preds = %20, %3
ret i32 0
}
attributes #0 = { nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"mm_walk", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"hmm_vma_walk", !7, i64 0}
!12 = !{!13, !7, i64 16}
!13 = !{!"hmm_range", !14, i64 0, !7, i64 8, !7, i64 16}
!14 = !{!"long", !8, i64 0}
!15 = !{!13, !14, i64 0}
!16 = !{!14, !14, i64 0}
!17 = !{!13, !7, i64 8}
!18 = !{!19, !19, i64 0}
!19 = !{!"int", !8, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/mm/extr_hmm.c_hmm_pfns_bad.c'
source_filename = "AnghaBench/linux/mm/extr_hmm.c_hmm_pfns_bad.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PAGE_SHIFT = common local_unnamed_addr global i64 0, align 8
@HMM_PFN_ERROR = common local_unnamed_addr global i64 0, align 8
@PAGE_SIZE = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @hmm_pfns_bad], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync)
define internal noundef i32 @hmm_pfns_bad(i64 noundef %0, i64 noundef %1, ptr nocapture noundef readonly %2) #0 {
%4 = load ptr, ptr %2, align 8, !tbaa !6
%5 = load ptr, ptr %4, align 8, !tbaa !11
%6 = getelementptr inbounds i8, ptr %5, i64 16
%7 = load ptr, ptr %6, align 8, !tbaa !13
%8 = icmp ult i64 %0, %1
br i1 %8, label %9, label %27
9: ; preds = %3
%10 = load i64, ptr %5, align 8, !tbaa !16
%11 = sub i64 %0, %10
%12 = load i64, ptr @PAGE_SHIFT, align 8, !tbaa !17
%13 = lshr i64 %11, %12
%14 = getelementptr inbounds i8, ptr %5, i64 8
%15 = load ptr, ptr %14, align 8, !tbaa !18
%16 = load i64, ptr @HMM_PFN_ERROR, align 8, !tbaa !17
%17 = getelementptr inbounds i32, ptr %15, i64 %16
%18 = load i64, ptr @PAGE_SIZE, align 8, !tbaa !17
%19 = load i32, ptr %17, align 4, !tbaa !19
br label %20
20: ; preds = %9, %20
%21 = phi i64 [ %13, %9 ], [ %25, %20 ]
%22 = phi i64 [ %0, %9 ], [ %24, %20 ]
%23 = getelementptr inbounds i32, ptr %7, i64 %21
store i32 %19, ptr %23, align 4, !tbaa !19
%24 = add i64 %18, %22
%25 = add i64 %21, 1
%26 = icmp ult i64 %24, %1
br i1 %26, label %20, label %27, !llvm.loop !21
27: ; preds = %20, %3
ret i32 0
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"mm_walk", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"hmm_vma_walk", !8, i64 0}
!13 = !{!14, !8, i64 16}
!14 = !{!"hmm_range", !15, i64 0, !8, i64 8, !8, i64 16}
!15 = !{!"long", !9, i64 0}
!16 = !{!14, !15, i64 0}
!17 = !{!15, !15, i64 0}
!18 = !{!14, !8, i64 8}
!19 = !{!20, !20, i64 0}
!20 = !{!"int", !9, i64 0}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
| linux_mm_extr_hmm.c_hmm_pfns_bad |
; ModuleID = 'AnghaBench/linux/drivers/staging/media/omap4iss/extr_iss_csi2.c_csi2_irq_complexio1_set.c'
source_filename = "AnghaBench/linux/drivers/staging/media/omap4iss/extr_iss_csi2.c_csi2_irq_complexio1_set.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.iss_csi2_device = type { i32, i32 }
@CSI2_COMPLEXIO_IRQ_STATEALLULPMEXIT = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_STATEALLULPMENTER = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_STATEULPM5 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRCONTROL5 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRESC5 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS5 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTHS5 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_STATEULPM4 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRCONTROL4 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRESC4 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS4 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTHS4 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_STATEULPM3 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRCONTROL3 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRESC3 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS3 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTHS3 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_STATEULPM2 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRCONTROL2 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRESC2 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS2 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTHS2 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_STATEULPM1 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRCONTROL1 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRESC1 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS1 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTHS1 = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQSTATUS = dso_local local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQENABLE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @csi2_irq_complexio1_set], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @csi2_irq_complexio1_set(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i32, ptr @CSI2_COMPLEXIO_IRQ_STATEALLULPMEXIT, align 4, !tbaa !5
%4 = load i32, ptr @CSI2_COMPLEXIO_IRQ_STATEALLULPMENTER, align 4, !tbaa !5
%5 = or i32 %4, %3
%6 = load i32, ptr @CSI2_COMPLEXIO_IRQ_STATEULPM5, align 4, !tbaa !5
%7 = or i32 %5, %6
%8 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRCONTROL5, align 4, !tbaa !5
%9 = or i32 %7, %8
%10 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRESC5, align 4, !tbaa !5
%11 = or i32 %9, %10
%12 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS5, align 4, !tbaa !5
%13 = or i32 %11, %12
%14 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTHS5, align 4, !tbaa !5
%15 = or i32 %13, %14
%16 = load i32, ptr @CSI2_COMPLEXIO_IRQ_STATEULPM4, align 4, !tbaa !5
%17 = or i32 %15, %16
%18 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRCONTROL4, align 4, !tbaa !5
%19 = or i32 %17, %18
%20 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRESC4, align 4, !tbaa !5
%21 = or i32 %19, %20
%22 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS4, align 4, !tbaa !5
%23 = or i32 %21, %22
%24 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTHS4, align 4, !tbaa !5
%25 = or i32 %23, %24
%26 = load i32, ptr @CSI2_COMPLEXIO_IRQ_STATEULPM3, align 4, !tbaa !5
%27 = or i32 %25, %26
%28 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRCONTROL3, align 4, !tbaa !5
%29 = or i32 %27, %28
%30 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRESC3, align 4, !tbaa !5
%31 = or i32 %29, %30
%32 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS3, align 4, !tbaa !5
%33 = or i32 %31, %32
%34 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTHS3, align 4, !tbaa !5
%35 = or i32 %33, %34
%36 = load i32, ptr @CSI2_COMPLEXIO_IRQ_STATEULPM2, align 4, !tbaa !5
%37 = or i32 %35, %36
%38 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRCONTROL2, align 4, !tbaa !5
%39 = or i32 %37, %38
%40 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRESC2, align 4, !tbaa !5
%41 = or i32 %39, %40
%42 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS2, align 4, !tbaa !5
%43 = or i32 %41, %42
%44 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTHS2, align 4, !tbaa !5
%45 = or i32 %43, %44
%46 = load i32, ptr @CSI2_COMPLEXIO_IRQ_STATEULPM1, align 4, !tbaa !5
%47 = or i32 %45, %46
%48 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRCONTROL1, align 4, !tbaa !5
%49 = or i32 %47, %48
%50 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRESC1, align 4, !tbaa !5
%51 = or i32 %49, %50
%52 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS1, align 4, !tbaa !5
%53 = or i32 %51, %52
%54 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTHS1, align 4, !tbaa !5
%55 = or i32 %53, %54
%56 = getelementptr inbounds %struct.iss_csi2_device, ptr %0, i64 0, i32 1
%57 = load i32, ptr %56, align 4, !tbaa !9
%58 = load i32, ptr %0, align 4, !tbaa !11
%59 = load i32, ptr @CSI2_COMPLEXIO_IRQSTATUS, align 4, !tbaa !5
%60 = tail call i32 @iss_reg_write(i32 noundef %57, i32 noundef %58, i32 noundef %59, i32 noundef %55) #2
%61 = icmp eq i32 %1, 0
%62 = load i32, ptr %56, align 4, !tbaa !9
%63 = load i32, ptr %0, align 4, !tbaa !11
%64 = load i32, ptr @CSI2_COMPLEXIO_IRQENABLE, align 4, !tbaa !5
br i1 %61, label %67, label %65
65: ; preds = %2
%66 = tail call i32 @iss_reg_set(i32 noundef %62, i32 noundef %63, i32 noundef %64, i32 noundef %55) #2
br label %69
67: ; preds = %2
%68 = tail call i32 @iss_reg_write(i32 noundef %62, i32 noundef %63, i32 noundef %64, i32 noundef 0) #2
br label %69
69: ; preds = %67, %65
ret void
}
declare i32 @iss_reg_write(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @iss_reg_set(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"iss_csi2_device", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/staging/media/omap4iss/extr_iss_csi2.c_csi2_irq_complexio1_set.c'
source_filename = "AnghaBench/linux/drivers/staging/media/omap4iss/extr_iss_csi2.c_csi2_irq_complexio1_set.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CSI2_COMPLEXIO_IRQ_STATEALLULPMEXIT = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_STATEALLULPMENTER = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_STATEULPM5 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRCONTROL5 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRESC5 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS5 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTHS5 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_STATEULPM4 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRCONTROL4 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRESC4 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS4 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTHS4 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_STATEULPM3 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRCONTROL3 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRESC3 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS3 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTHS3 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_STATEULPM2 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRCONTROL2 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRESC2 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS2 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTHS2 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_STATEULPM1 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRCONTROL1 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRESC1 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS1 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQ_ERRSOTHS1 = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQSTATUS = common local_unnamed_addr global i32 0, align 4
@CSI2_COMPLEXIO_IRQENABLE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @csi2_irq_complexio1_set], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @csi2_irq_complexio1_set(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i32, ptr @CSI2_COMPLEXIO_IRQ_STATEALLULPMEXIT, align 4, !tbaa !6
%4 = load i32, ptr @CSI2_COMPLEXIO_IRQ_STATEALLULPMENTER, align 4, !tbaa !6
%5 = or i32 %4, %3
%6 = load i32, ptr @CSI2_COMPLEXIO_IRQ_STATEULPM5, align 4, !tbaa !6
%7 = or i32 %5, %6
%8 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRCONTROL5, align 4, !tbaa !6
%9 = or i32 %7, %8
%10 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRESC5, align 4, !tbaa !6
%11 = or i32 %9, %10
%12 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS5, align 4, !tbaa !6
%13 = or i32 %11, %12
%14 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTHS5, align 4, !tbaa !6
%15 = or i32 %13, %14
%16 = load i32, ptr @CSI2_COMPLEXIO_IRQ_STATEULPM4, align 4, !tbaa !6
%17 = or i32 %15, %16
%18 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRCONTROL4, align 4, !tbaa !6
%19 = or i32 %17, %18
%20 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRESC4, align 4, !tbaa !6
%21 = or i32 %19, %20
%22 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS4, align 4, !tbaa !6
%23 = or i32 %21, %22
%24 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTHS4, align 4, !tbaa !6
%25 = or i32 %23, %24
%26 = load i32, ptr @CSI2_COMPLEXIO_IRQ_STATEULPM3, align 4, !tbaa !6
%27 = or i32 %25, %26
%28 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRCONTROL3, align 4, !tbaa !6
%29 = or i32 %27, %28
%30 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRESC3, align 4, !tbaa !6
%31 = or i32 %29, %30
%32 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS3, align 4, !tbaa !6
%33 = or i32 %31, %32
%34 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTHS3, align 4, !tbaa !6
%35 = or i32 %33, %34
%36 = load i32, ptr @CSI2_COMPLEXIO_IRQ_STATEULPM2, align 4, !tbaa !6
%37 = or i32 %35, %36
%38 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRCONTROL2, align 4, !tbaa !6
%39 = or i32 %37, %38
%40 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRESC2, align 4, !tbaa !6
%41 = or i32 %39, %40
%42 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS2, align 4, !tbaa !6
%43 = or i32 %41, %42
%44 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTHS2, align 4, !tbaa !6
%45 = or i32 %43, %44
%46 = load i32, ptr @CSI2_COMPLEXIO_IRQ_STATEULPM1, align 4, !tbaa !6
%47 = or i32 %45, %46
%48 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRCONTROL1, align 4, !tbaa !6
%49 = or i32 %47, %48
%50 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRESC1, align 4, !tbaa !6
%51 = or i32 %49, %50
%52 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTSYNCHS1, align 4, !tbaa !6
%53 = or i32 %51, %52
%54 = load i32, ptr @CSI2_COMPLEXIO_IRQ_ERRSOTHS1, align 4, !tbaa !6
%55 = or i32 %53, %54
%56 = getelementptr inbounds i8, ptr %0, i64 4
%57 = load i32, ptr %56, align 4, !tbaa !10
%58 = load i32, ptr %0, align 4, !tbaa !12
%59 = load i32, ptr @CSI2_COMPLEXIO_IRQSTATUS, align 4, !tbaa !6
%60 = tail call i32 @iss_reg_write(i32 noundef %57, i32 noundef %58, i32 noundef %59, i32 noundef %55) #2
%61 = icmp eq i32 %1, 0
%62 = load i32, ptr %56, align 4, !tbaa !10
%63 = load i32, ptr %0, align 4, !tbaa !12
%64 = load i32, ptr @CSI2_COMPLEXIO_IRQENABLE, align 4, !tbaa !6
br i1 %61, label %67, label %65
65: ; preds = %2
%66 = tail call i32 @iss_reg_set(i32 noundef %62, i32 noundef %63, i32 noundef %64, i32 noundef %55) #2
br label %69
67: ; preds = %2
%68 = tail call i32 @iss_reg_write(i32 noundef %62, i32 noundef %63, i32 noundef %64, i32 noundef 0) #2
br label %69
69: ; preds = %67, %65
ret void
}
declare i32 @iss_reg_write(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @iss_reg_set(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 4}
!11 = !{!"iss_csi2_device", !7, i64 0, !7, i64 4}
!12 = !{!11, !7, i64 0}
| linux_drivers_staging_media_omap4iss_extr_iss_csi2.c_csi2_irq_complexio1_set |
; ModuleID = 'AnghaBench/linux/sound/ac97/extr_snd_ac97_compat.c_compat_ac97_release.c'
source_filename = "AnghaBench/linux/sound/ac97/extr_snd_ac97_compat.c_compat_ac97_release.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @compat_ac97_release], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @compat_ac97_release(ptr noundef %0) #0 {
%2 = tail call i32 @to_ac97_t(ptr noundef %0) #2
%3 = tail call i32 @kfree(i32 noundef %2) #2
ret void
}
declare i32 @kfree(i32 noundef) local_unnamed_addr #1
declare i32 @to_ac97_t(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/sound/ac97/extr_snd_ac97_compat.c_compat_ac97_release.c'
source_filename = "AnghaBench/linux/sound/ac97/extr_snd_ac97_compat.c_compat_ac97_release.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @compat_ac97_release], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @compat_ac97_release(ptr noundef %0) #0 {
%2 = tail call i32 @to_ac97_t(ptr noundef %0) #2
%3 = tail call i32 @kfree(i32 noundef %2) #2
ret void
}
declare i32 @kfree(i32 noundef) local_unnamed_addr #1
declare i32 @to_ac97_t(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_sound_ac97_extr_snd_ac97_compat.c_compat_ac97_release |
; ModuleID = 'AnghaBench/freebsd/contrib/ntp/ntpq/extr_libntpq.c_ntpq_closehost.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/ntpq/extr_libntpq.c_ntpq_closehost.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@numhosts = dso_local local_unnamed_addr global i64 0, align 8
@sockfd = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @ntpq_closehost() local_unnamed_addr #0 {
%1 = load i64, ptr @numhosts, align 8, !tbaa !5
%2 = icmp eq i64 %1, 0
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = load i32, ptr @sockfd, align 4, !tbaa !9
%5 = tail call i32 @closesocket(i32 noundef %4) #2
br label %6
6: ; preds = %0, %3
%7 = phi i32 [ %5, %3 ], [ 0, %0 ]
ret i32 %7
}
declare i32 @closesocket(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/ntp/ntpq/extr_libntpq.c_ntpq_closehost.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/ntpq/extr_libntpq.c_ntpq_closehost.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@numhosts = common local_unnamed_addr global i64 0, align 8
@sockfd = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @ntpq_closehost() local_unnamed_addr #0 {
%1 = load i64, ptr @numhosts, align 8, !tbaa !6
%2 = icmp eq i64 %1, 0
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = load i32, ptr @sockfd, align 4, !tbaa !10
%5 = tail call i32 @closesocket(i32 noundef %4) #2
br label %6
6: ; preds = %0, %3
%7 = phi i32 [ %5, %3 ], [ 0, %0 ]
ret i32 %7
}
declare i32 @closesocket(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| freebsd_contrib_ntp_ntpq_extr_libntpq.c_ntpq_closehost |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/video/backlight/extr_pwm_bl.c_pwm_backlight_remove.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/video/backlight/extr_pwm_bl.c_pwm_backlight_remove.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.pwm_bl_data = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @pwm_backlight_remove], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @pwm_backlight_remove(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = tail call ptr @platform_get_drvdata(ptr noundef nonnull %0) #2
%4 = tail call ptr @dev_get_drvdata(ptr noundef %3) #2
%5 = tail call i32 @backlight_device_unregister(ptr noundef %3) #2
%6 = load i32, ptr %4, align 4, !tbaa !11
%7 = getelementptr inbounds %struct.pwm_bl_data, ptr %4, i64 0, i32 1
%8 = load i32, ptr %7, align 4, !tbaa !14
%9 = tail call i32 @pwm_config(i32 noundef %6, i32 noundef 0, i32 noundef %8) #2
%10 = load i32, ptr %4, align 4, !tbaa !11
%11 = tail call i32 @pwm_disable(i32 noundef %10) #2
%12 = load i32, ptr %4, align 4, !tbaa !11
%13 = tail call i32 @pwm_free(i32 noundef %12) #2
%14 = tail call i32 @kfree(ptr noundef nonnull %4) #2
%15 = load ptr, ptr %2, align 8, !tbaa !15
%16 = icmp eq ptr %15, null
br i1 %16, label %19, label %17
17: ; preds = %1
%18 = tail call i32 %15(ptr noundef nonnull %0) #2
br label %19
19: ; preds = %17, %1
ret i32 0
}
declare ptr @platform_get_drvdata(ptr noundef) local_unnamed_addr #1
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @backlight_device_unregister(ptr noundef) local_unnamed_addr #1
declare i32 @pwm_config(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pwm_disable(i32 noundef) local_unnamed_addr #1
declare i32 @pwm_free(i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"platform_device", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"pwm_bl_data", !13, i64 0, !13, i64 4}
!13 = !{!"int", !9, i64 0}
!14 = !{!12, !13, i64 4}
!15 = !{!16, !8, i64 0}
!16 = !{!"platform_pwm_backlight_data", !8, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/video/backlight/extr_pwm_bl.c_pwm_backlight_remove.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/video/backlight/extr_pwm_bl.c_pwm_backlight_remove.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @pwm_backlight_remove], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @pwm_backlight_remove(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = tail call ptr @platform_get_drvdata(ptr noundef nonnull %0) #2
%4 = tail call ptr @dev_get_drvdata(ptr noundef %3) #2
%5 = tail call i32 @backlight_device_unregister(ptr noundef %3) #2
%6 = load i32, ptr %4, align 4, !tbaa !12
%7 = getelementptr inbounds i8, ptr %4, i64 4
%8 = load i32, ptr %7, align 4, !tbaa !15
%9 = tail call i32 @pwm_config(i32 noundef %6, i32 noundef 0, i32 noundef %8) #2
%10 = load i32, ptr %4, align 4, !tbaa !12
%11 = tail call i32 @pwm_disable(i32 noundef %10) #2
%12 = load i32, ptr %4, align 4, !tbaa !12
%13 = tail call i32 @pwm_free(i32 noundef %12) #2
%14 = tail call i32 @kfree(ptr noundef nonnull %4) #2
%15 = load ptr, ptr %2, align 8, !tbaa !16
%16 = icmp eq ptr %15, null
br i1 %16, label %19, label %17
17: ; preds = %1
%18 = tail call i32 %15(ptr noundef nonnull %0) #2
br label %19
19: ; preds = %17, %1
ret i32 0
}
declare ptr @platform_get_drvdata(ptr noundef) local_unnamed_addr #1
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @backlight_device_unregister(ptr noundef) local_unnamed_addr #1
declare i32 @pwm_config(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pwm_disable(i32 noundef) local_unnamed_addr #1
declare i32 @pwm_free(i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"platform_device", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!13, !14, i64 0}
!13 = !{!"pwm_bl_data", !14, i64 0, !14, i64 4}
!14 = !{!"int", !10, i64 0}
!15 = !{!13, !14, i64 4}
!16 = !{!17, !9, i64 0}
!17 = !{!"platform_pwm_backlight_data", !9, i64 0}
| fastsocket_kernel_drivers_video_backlight_extr_pwm_bl.c_pwm_backlight_remove |
; ModuleID = 'AnghaBench/ijkplayer/ijkmedia/ijkplayer/ijkavformat/extr_ijklongurl.c_ijklongurl_open.c'
source_filename = "AnghaBench/ijkplayer/ijkmedia/ijkplayer/ijkavformat/extr_ijklongurl.c_ijklongurl_open.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, i32, i32, ptr }
%struct.TYPE_6__ = type { ptr, i32 }
@AVERROR_EXTERNAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ijklongurl_open], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ijklongurl_open(ptr noundef %0, ptr nocapture readnone %1, i32 noundef %2, ptr noundef %3) #0 {
%5 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 3
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = load ptr, ptr %6, align 8, !tbaa !11
%8 = icmp eq ptr %7, null
br i1 %8, label %12, label %9
9: ; preds = %4
%10 = load i32, ptr %7, align 4, !tbaa !13
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %9, %4
%13 = load i32, ptr @AVERROR_EXTERNAL, align 4, !tbaa !13
br label %21
14: ; preds = %9
%15 = getelementptr inbounds %struct.TYPE_6__, ptr %6, i64 0, i32 1
%16 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 2
%17 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
%18 = load i32, ptr %17, align 4, !tbaa !14
%19 = load i32, ptr %0, align 8, !tbaa !15
%20 = tail call i32 @ffurl_open_whitelist(ptr noundef nonnull %15, ptr noundef nonnull %7, i32 noundef %2, ptr noundef nonnull %16, ptr noundef %3, i32 noundef %18, i32 noundef %19, ptr noundef nonnull %0) #2
br label %21
21: ; preds = %14, %12
%22 = phi i32 [ %20, %14 ], [ %13, %12 ]
ret i32 %22
}
declare i32 @ffurl_open_whitelist(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"TYPE_5__", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_6__", !10, i64 0, !7, i64 8}
!13 = !{!7, !7, i64 0}
!14 = !{!6, !7, i64 4}
!15 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/ijkplayer/ijkmedia/ijkplayer/ijkavformat/extr_ijklongurl.c_ijklongurl_open.c'
source_filename = "AnghaBench/ijkplayer/ijkmedia/ijkplayer/ijkavformat/extr_ijklongurl.c_ijklongurl_open.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@AVERROR_EXTERNAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ijklongurl_open], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ijklongurl_open(ptr noundef %0, ptr nocapture readnone %1, i32 noundef %2, ptr noundef %3) #0 {
%5 = getelementptr inbounds i8, ptr %0, i64 16
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = load ptr, ptr %6, align 8, !tbaa !12
%8 = icmp eq ptr %7, null
br i1 %8, label %12, label %9
9: ; preds = %4
%10 = load i32, ptr %7, align 4, !tbaa !14
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %9, %4
%13 = load i32, ptr @AVERROR_EXTERNAL, align 4, !tbaa !14
br label %21
14: ; preds = %9
%15 = getelementptr inbounds i8, ptr %6, i64 8
%16 = getelementptr inbounds i8, ptr %0, i64 8
%17 = getelementptr inbounds i8, ptr %0, i64 4
%18 = load i32, ptr %17, align 4, !tbaa !15
%19 = load i32, ptr %0, align 8, !tbaa !16
%20 = tail call i32 @ffurl_open_whitelist(ptr noundef nonnull %15, ptr noundef nonnull %7, i32 noundef %2, ptr noundef nonnull %16, ptr noundef %3, i32 noundef %18, i32 noundef %19, ptr noundef nonnull %0) #2
br label %21
21: ; preds = %14, %12
%22 = phi i32 [ %20, %14 ], [ %13, %12 ]
ret i32 %22
}
declare i32 @ffurl_open_whitelist(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"TYPE_5__", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_6__", !11, i64 0, !8, i64 8}
!14 = !{!8, !8, i64 0}
!15 = !{!7, !8, i64 4}
!16 = !{!7, !8, i64 0}
| ijkplayer_ijkmedia_ijkplayer_ijkavformat_extr_ijklongurl.c_ijklongurl_open |
; ModuleID = 'AnghaBench/linux/drivers/hwmon/extr_sch56xx-common.c_sch56xx_watchdog_register.c'
source_filename = "AnghaBench/linux/drivers/hwmon/extr_sch56xx-common.c_sch56xx_watchdog_register.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sch56xx_watchdog_data = type { i32, i32, i32, %struct.TYPE_5__, %struct.TYPE_4__, ptr, i32 }
%struct.TYPE_5__ = type { i32, i32, i32, i32, ptr, ptr, ptr }
%struct.TYPE_4__ = type { i32, i32, i32 }
@SCH56XX_REG_WDOG_CONTROL = dso_local local_unnamed_addr global i32 0, align 4
@SCH56XX_REG_WDOG_OUTPUT_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@SCH56XX_WDOG_OUTPUT_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [47 x i8] c"Watchdog not enabled by BIOS, not registering\0A\00", align 1
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [17 x i8] c"sch56xx watchdog\00", align 1
@WDIOF_KEEPALIVEPING = dso_local local_unnamed_addr global i32 0, align 4
@WDIOF_SETTIMEOUT = dso_local local_unnamed_addr global i32 0, align 4
@nowayout = dso_local local_unnamed_addr global i64 0, align 8
@WDIOF_MAGICCLOSE = dso_local local_unnamed_addr global i32 0, align 4
@watchdog_ops = dso_local global i32 0, align 4
@WDOG_NO_WAY_OUT = dso_local local_unnamed_addr global i32 0, align 4
@WDOG_ACTIVE = dso_local local_unnamed_addr global i32 0, align 4
@SCH56XX_WDOG_TIME_BASE_SEC = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [34 x i8] c"Registering watchdog chardev: %d\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local ptr @sch56xx_watchdog_register(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4) local_unnamed_addr #0 {
%6 = tail call i32 @mutex_lock(ptr noundef %3) #2
%7 = load i32, ptr @SCH56XX_REG_WDOG_CONTROL, align 4, !tbaa !5
%8 = tail call i32 @sch56xx_read_virtual_reg(i32 noundef %1, i32 noundef %7) #2
%9 = load i32, ptr @SCH56XX_REG_WDOG_OUTPUT_ENABLE, align 4, !tbaa !5
%10 = tail call i32 @sch56xx_read_virtual_reg(i32 noundef %1, i32 noundef %9) #2
%11 = tail call i32 @mutex_unlock(ptr noundef %3) #2
%12 = icmp slt i32 %8, 0
%13 = icmp slt i32 %10, 0
%14 = select i1 %12, i1 true, i1 %13
br i1 %14, label %81, label %15
15: ; preds = %5
%16 = icmp eq i32 %4, 0
br i1 %16, label %23, label %17
17: ; preds = %15
%18 = load i32, ptr @SCH56XX_WDOG_OUTPUT_ENABLE, align 4, !tbaa !5
%19 = and i32 %18, %10
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %23
21: ; preds = %17
%22 = tail call i32 @pr_warn(ptr noundef nonnull @.str) #2
br label %81
23: ; preds = %17, %15
%24 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%25 = tail call ptr @kzalloc(i32 noundef 88, i32 noundef %24) #2
%26 = icmp eq ptr %25, null
br i1 %26, label %81, label %27
27: ; preds = %23
%28 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 6
store i32 %1, ptr %28, align 8, !tbaa !9
%29 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 5
store ptr %3, ptr %29, align 8, !tbaa !14
%30 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 4
%31 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 4, i32 2
%32 = load i32, ptr %31, align 8, !tbaa !15
%33 = tail call i32 @strlcpy(i32 noundef %32, ptr noundef nonnull @.str.1, i32 noundef 4) #2
%34 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 4, i32 1
store i32 %2, ptr %34, align 4, !tbaa !16
%35 = load i32, ptr @WDIOF_KEEPALIVEPING, align 4, !tbaa !5
%36 = load i32, ptr @WDIOF_SETTIMEOUT, align 4, !tbaa !5
%37 = or i32 %36, %35
store i32 %37, ptr %30, align 8, !tbaa !17
%38 = load i64, ptr @nowayout, align 8, !tbaa !18
%39 = icmp eq i64 %38, 0
br i1 %39, label %40, label %49
40: ; preds = %27
%41 = load i32, ptr @WDIOF_MAGICCLOSE, align 4, !tbaa !5
%42 = or i32 %41, %37
store i32 %42, ptr %30, align 8, !tbaa !17
%43 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 3
%44 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 3, i32 6
store ptr %30, ptr %44, align 8, !tbaa !20
%45 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 3, i32 5
store ptr @watchdog_ops, ptr %45, align 8, !tbaa !21
%46 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 3, i32 4
store ptr %0, ptr %46, align 8, !tbaa !22
store i32 60, ptr %43, align 8, !tbaa !23
%47 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 3, i32 1
store i32 1, ptr %47, align 4, !tbaa !24
%48 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 3, i32 2
store i32 15300, ptr %48, align 8, !tbaa !25
br label %59
49: ; preds = %27
%50 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 3
%51 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 3, i32 6
store ptr %30, ptr %51, align 8, !tbaa !20
%52 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 3, i32 5
store ptr @watchdog_ops, ptr %52, align 8, !tbaa !21
%53 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 3, i32 4
store ptr %0, ptr %53, align 8, !tbaa !22
store i32 60, ptr %50, align 8, !tbaa !23
%54 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 3, i32 1
store i32 1, ptr %54, align 4, !tbaa !24
%55 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 3, i32 2
store i32 15300, ptr %55, align 8, !tbaa !25
%56 = load i32, ptr @WDOG_NO_WAY_OUT, align 4, !tbaa !5
%57 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 3, i32 3
%58 = tail call i32 @set_bit(i32 noundef %56, ptr noundef nonnull %57) #2
br label %59
59: ; preds = %40, %49
%60 = phi ptr [ %43, %40 ], [ %50, %49 ]
%61 = load i32, ptr @SCH56XX_WDOG_OUTPUT_ENABLE, align 4, !tbaa !5
%62 = and i32 %61, %10
%63 = icmp eq i32 %62, 0
br i1 %63, label %68, label %64
64: ; preds = %59
%65 = load i32, ptr @WDOG_ACTIVE, align 4, !tbaa !5
%66 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 3, i32 3
%67 = tail call i32 @set_bit(i32 noundef %65, ptr noundef nonnull %66) #2
br label %68
68: ; preds = %64, %59
%69 = load i32, ptr @SCH56XX_WDOG_TIME_BASE_SEC, align 4, !tbaa !5
%70 = and i32 %69, %8
%71 = icmp eq i32 %70, 0
%72 = select i1 %71, i32 1, i32 60
store i32 %72, ptr %25, align 8, !tbaa !26
%73 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 1
store i32 %8, ptr %73, align 4, !tbaa !27
%74 = getelementptr inbounds %struct.sch56xx_watchdog_data, ptr %25, i64 0, i32 2
store i32 %10, ptr %74, align 8, !tbaa !28
%75 = tail call i32 @watchdog_set_drvdata(ptr noundef nonnull %60, ptr noundef nonnull %25) #2
%76 = tail call i32 @watchdog_register_device(ptr noundef nonnull %60) #2
%77 = icmp eq i32 %76, 0
br i1 %77, label %81, label %78
78: ; preds = %68
%79 = tail call i32 @pr_err(ptr noundef nonnull @.str.2, i32 noundef %76) #2
%80 = tail call i32 @kfree(ptr noundef nonnull %25) #2
br label %81
81: ; preds = %68, %23, %5, %78, %21
%82 = phi ptr [ null, %78 ], [ null, %21 ], [ null, %5 ], [ null, %23 ], [ %25, %68 ]
ret ptr %82
}
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @sch56xx_read_virtual_reg(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @pr_warn(ptr noundef) local_unnamed_addr #1
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @strlcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @watchdog_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @watchdog_register_device(ptr noundef) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 80}
!10 = !{!"sch56xx_watchdog_data", !6, i64 0, !6, i64 4, !6, i64 8, !11, i64 16, !13, i64 56, !12, i64 72, !6, i64 80}
!11 = !{!"TYPE_5__", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !12, i64 16, !12, i64 24, !12, i64 32}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!"TYPE_4__", !6, i64 0, !6, i64 4, !6, i64 8}
!14 = !{!10, !12, i64 72}
!15 = !{!10, !6, i64 64}
!16 = !{!10, !6, i64 60}
!17 = !{!10, !6, i64 56}
!18 = !{!19, !19, i64 0}
!19 = !{!"long", !7, i64 0}
!20 = !{!10, !12, i64 48}
!21 = !{!10, !12, i64 40}
!22 = !{!10, !12, i64 32}
!23 = !{!10, !6, i64 16}
!24 = !{!10, !6, i64 20}
!25 = !{!10, !6, i64 24}
!26 = !{!10, !6, i64 0}
!27 = !{!10, !6, i64 4}
!28 = !{!10, !6, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/hwmon/extr_sch56xx-common.c_sch56xx_watchdog_register.c'
source_filename = "AnghaBench/linux/drivers/hwmon/extr_sch56xx-common.c_sch56xx_watchdog_register.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SCH56XX_REG_WDOG_CONTROL = common local_unnamed_addr global i32 0, align 4
@SCH56XX_REG_WDOG_OUTPUT_ENABLE = common local_unnamed_addr global i32 0, align 4
@SCH56XX_WDOG_OUTPUT_ENABLE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [47 x i8] c"Watchdog not enabled by BIOS, not registering\0A\00", align 1
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [17 x i8] c"sch56xx watchdog\00", align 1
@WDIOF_KEEPALIVEPING = common local_unnamed_addr global i32 0, align 4
@WDIOF_SETTIMEOUT = common local_unnamed_addr global i32 0, align 4
@nowayout = common local_unnamed_addr global i64 0, align 8
@WDIOF_MAGICCLOSE = common local_unnamed_addr global i32 0, align 4
@watchdog_ops = common global i32 0, align 4
@WDOG_NO_WAY_OUT = common local_unnamed_addr global i32 0, align 4
@WDOG_ACTIVE = common local_unnamed_addr global i32 0, align 4
@SCH56XX_WDOG_TIME_BASE_SEC = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [34 x i8] c"Registering watchdog chardev: %d\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @sch56xx_watchdog_register(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4) local_unnamed_addr #0 {
%6 = tail call i32 @mutex_lock(ptr noundef %3) #2
%7 = load i32, ptr @SCH56XX_REG_WDOG_CONTROL, align 4, !tbaa !6
%8 = tail call i32 @sch56xx_read_virtual_reg(i32 noundef %1, i32 noundef %7) #2
%9 = load i32, ptr @SCH56XX_REG_WDOG_OUTPUT_ENABLE, align 4, !tbaa !6
%10 = tail call i32 @sch56xx_read_virtual_reg(i32 noundef %1, i32 noundef %9) #2
%11 = tail call i32 @mutex_unlock(ptr noundef %3) #2
%12 = icmp slt i32 %8, 0
%13 = icmp slt i32 %10, 0
%14 = select i1 %12, i1 true, i1 %13
br i1 %14, label %79, label %15
15: ; preds = %5
%16 = icmp eq i32 %4, 0
br i1 %16, label %23, label %17
17: ; preds = %15
%18 = load i32, ptr @SCH56XX_WDOG_OUTPUT_ENABLE, align 4, !tbaa !6
%19 = and i32 %18, %10
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %23
21: ; preds = %17
%22 = tail call i32 @pr_warn(ptr noundef nonnull @.str) #2
br label %79
23: ; preds = %17, %15
%24 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%25 = tail call ptr @kzalloc(i32 noundef 88, i32 noundef %24) #2
%26 = icmp eq ptr %25, null
br i1 %26, label %79, label %27
27: ; preds = %23
%28 = getelementptr inbounds i8, ptr %25, i64 80
store i32 %1, ptr %28, align 8, !tbaa !10
%29 = getelementptr inbounds i8, ptr %25, i64 72
store ptr %3, ptr %29, align 8, !tbaa !15
%30 = getelementptr inbounds i8, ptr %25, i64 56
%31 = getelementptr inbounds i8, ptr %25, i64 64
%32 = load i32, ptr %31, align 8, !tbaa !16
%33 = tail call i32 @strlcpy(i32 noundef %32, ptr noundef nonnull @.str.1, i32 noundef 4) #2
%34 = getelementptr inbounds i8, ptr %25, i64 60
store i32 %2, ptr %34, align 4, !tbaa !17
%35 = load i32, ptr @WDIOF_KEEPALIVEPING, align 4, !tbaa !6
%36 = load i32, ptr @WDIOF_SETTIMEOUT, align 4, !tbaa !6
%37 = or i32 %36, %35
store i32 %37, ptr %30, align 8, !tbaa !18
%38 = load i64, ptr @nowayout, align 8, !tbaa !19
%39 = icmp eq i64 %38, 0
br i1 %39, label %40, label %48
40: ; preds = %27
%41 = load i32, ptr @WDIOF_MAGICCLOSE, align 4, !tbaa !6
%42 = or i32 %41, %37
store i32 %42, ptr %30, align 8, !tbaa !18
%43 = getelementptr inbounds i8, ptr %25, i64 16
%44 = getelementptr inbounds i8, ptr %25, i64 48
store ptr %30, ptr %44, align 8, !tbaa !21
%45 = getelementptr inbounds i8, ptr %25, i64 40
store ptr @watchdog_ops, ptr %45, align 8, !tbaa !22
%46 = getelementptr inbounds i8, ptr %25, i64 32
store ptr %0, ptr %46, align 8, !tbaa !23
store <2 x i32> <i32 60, i32 1>, ptr %43, align 8, !tbaa !6
%47 = getelementptr inbounds i8, ptr %25, i64 24
store i32 15300, ptr %47, align 8, !tbaa !24
br label %57
48: ; preds = %27
%49 = getelementptr inbounds i8, ptr %25, i64 16
%50 = getelementptr inbounds i8, ptr %25, i64 48
store ptr %30, ptr %50, align 8, !tbaa !21
%51 = getelementptr inbounds i8, ptr %25, i64 40
store ptr @watchdog_ops, ptr %51, align 8, !tbaa !22
%52 = getelementptr inbounds i8, ptr %25, i64 32
store ptr %0, ptr %52, align 8, !tbaa !23
store <2 x i32> <i32 60, i32 1>, ptr %49, align 8, !tbaa !6
%53 = getelementptr inbounds i8, ptr %25, i64 24
store i32 15300, ptr %53, align 8, !tbaa !24
%54 = load i32, ptr @WDOG_NO_WAY_OUT, align 4, !tbaa !6
%55 = getelementptr inbounds i8, ptr %25, i64 28
%56 = tail call i32 @set_bit(i32 noundef %54, ptr noundef nonnull %55) #2
br label %57
57: ; preds = %40, %48
%58 = phi ptr [ %43, %40 ], [ %49, %48 ]
%59 = load i32, ptr @SCH56XX_WDOG_OUTPUT_ENABLE, align 4, !tbaa !6
%60 = and i32 %59, %10
%61 = icmp eq i32 %60, 0
br i1 %61, label %66, label %62
62: ; preds = %57
%63 = load i32, ptr @WDOG_ACTIVE, align 4, !tbaa !6
%64 = getelementptr inbounds i8, ptr %25, i64 28
%65 = tail call i32 @set_bit(i32 noundef %63, ptr noundef nonnull %64) #2
br label %66
66: ; preds = %62, %57
%67 = load i32, ptr @SCH56XX_WDOG_TIME_BASE_SEC, align 4, !tbaa !6
%68 = and i32 %67, %8
%69 = icmp eq i32 %68, 0
%70 = select i1 %69, i32 1, i32 60
store i32 %70, ptr %25, align 8, !tbaa !25
%71 = getelementptr inbounds i8, ptr %25, i64 4
store i32 %8, ptr %71, align 4, !tbaa !26
%72 = getelementptr inbounds i8, ptr %25, i64 8
store i32 %10, ptr %72, align 8, !tbaa !27
%73 = tail call i32 @watchdog_set_drvdata(ptr noundef nonnull %58, ptr noundef nonnull %25) #2
%74 = tail call i32 @watchdog_register_device(ptr noundef nonnull %58) #2
%75 = icmp eq i32 %74, 0
br i1 %75, label %79, label %76
76: ; preds = %66
%77 = tail call i32 @pr_err(ptr noundef nonnull @.str.2, i32 noundef %74) #2
%78 = tail call i32 @kfree(ptr noundef nonnull %25) #2
br label %79
79: ; preds = %66, %23, %5, %76, %21
%80 = phi ptr [ null, %76 ], [ null, %21 ], [ null, %5 ], [ null, %23 ], [ %25, %66 ]
ret ptr %80
}
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @sch56xx_read_virtual_reg(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @pr_warn(ptr noundef) local_unnamed_addr #1
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @strlcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @watchdog_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @watchdog_register_device(ptr noundef) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 80}
!11 = !{!"sch56xx_watchdog_data", !7, i64 0, !7, i64 4, !7, i64 8, !12, i64 16, !14, i64 56, !13, i64 72, !7, i64 80}
!12 = !{!"TYPE_5__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !13, i64 16, !13, i64 24, !13, i64 32}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!"TYPE_4__", !7, i64 0, !7, i64 4, !7, i64 8}
!15 = !{!11, !13, i64 72}
!16 = !{!11, !7, i64 64}
!17 = !{!11, !7, i64 60}
!18 = !{!11, !7, i64 56}
!19 = !{!20, !20, i64 0}
!20 = !{!"long", !8, i64 0}
!21 = !{!11, !13, i64 48}
!22 = !{!11, !13, i64 40}
!23 = !{!11, !13, i64 32}
!24 = !{!11, !7, i64 24}
!25 = !{!11, !7, i64 0}
!26 = !{!11, !7, i64 4}
!27 = !{!11, !7, i64 8}
| linux_drivers_hwmon_extr_sch56xx-common.c_sch56xx_watchdog_register |
; ModuleID = 'AnghaBench/freebsd/sys/netpfil/ipfw/nat64/extr_nat64lsn_control.c_nat64lsn_config.c'
source_filename = "AnghaBench/freebsd/sys/netpfil/ipfw/nat64/extr_nat64lsn_control.c_nat64lsn_config.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_11__ = type { %struct.TYPE_9__ }
%struct.TYPE_9__ = type { i64, i32 }
%struct.sockopt_data = type { i32, ptr }
%struct.nat64lsn_cfg = type { %struct.TYPE_10__, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.TYPE_10__ = type { i32 }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@IPFW_MAX_SETS = dso_local local_unnamed_addr global i64 0, align 8
@SOPT_GET = dso_local local_unnamed_addr global i64 0, align 8
@ENOENT = dso_local local_unnamed_addr global i32 0, align 4
@NAT64LSN_FLAGSMASK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @nat64lsn_config], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @nat64lsn_config(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = load i32, ptr %2, align 8, !tbaa !5
%5 = icmp eq i32 %4, 56
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = load i32, ptr @EINVAL, align 4, !tbaa !11
br label %70
8: ; preds = %3
%9 = tail call i64 @ipfw_get_sopt_space(ptr noundef nonnull %2, i32 noundef 56) #2
%10 = inttoptr i64 %9 to ptr
%11 = getelementptr inbounds %struct.TYPE_11__, ptr %10, i64 1
%12 = getelementptr inbounds %struct.TYPE_9__, ptr %10, i64 0, i32 1
%13 = load i32, ptr %12, align 8, !tbaa !12
%14 = tail call i64 @ipfw_check_object_name_generic(i32 noundef %13) #2
%15 = icmp eq i64 %14, 0
br i1 %15, label %16, label %20
16: ; preds = %8
%17 = load i64, ptr %10, align 8, !tbaa !16
%18 = load i64, ptr @IPFW_MAX_SETS, align 8, !tbaa !17
%19 = icmp slt i64 %17, %18
br i1 %19, label %22, label %20
20: ; preds = %16, %8
%21 = load i32, ptr @EINVAL, align 4, !tbaa !11
br label %70
22: ; preds = %16
%23 = tail call ptr @CHAIN_TO_SRV(ptr noundef %0) #2
%24 = getelementptr inbounds %struct.sockopt_data, ptr %2, i64 0, i32 1
%25 = load ptr, ptr %24, align 8, !tbaa !18
%26 = load i64, ptr %25, align 8, !tbaa !19
%27 = load i64, ptr @SOPT_GET, align 8, !tbaa !17
%28 = icmp eq i64 %26, %27
br i1 %28, label %29, label %41
29: ; preds = %22
%30 = tail call i32 @IPFW_UH_RLOCK(ptr noundef %0) #2
%31 = load i32, ptr %12, align 8, !tbaa !12
%32 = load i64, ptr %10, align 8, !tbaa !16
%33 = tail call ptr @nat64lsn_find(ptr noundef %23, i32 noundef %31, i64 noundef %32) #2
%34 = icmp eq ptr %33, null
br i1 %34, label %35, label %38
35: ; preds = %29
%36 = tail call i32 @IPFW_UH_RUNLOCK(ptr noundef %0) #2
%37 = load i32, ptr @ENOENT, align 4, !tbaa !11
br label %70
38: ; preds = %29
%39 = tail call i32 @nat64lsn_export_config(ptr noundef %0, ptr noundef nonnull %33, ptr noundef nonnull %11) #2
%40 = tail call i32 @IPFW_UH_RUNLOCK(ptr noundef %0) #2
br label %70
41: ; preds = %22
%42 = tail call i32 @nat64lsn_default_config(ptr noundef nonnull %11) #2
%43 = tail call i32 @IPFW_UH_WLOCK(ptr noundef %0) #2
%44 = load i32, ptr %12, align 8, !tbaa !12
%45 = load i64, ptr %10, align 8, !tbaa !16
%46 = tail call ptr @nat64lsn_find(ptr noundef %23, i32 noundef %44, i64 noundef %45) #2
%47 = icmp eq ptr %46, null
br i1 %47, label %48, label %51
48: ; preds = %41
%49 = tail call i32 @IPFW_UH_WUNLOCK(ptr noundef %0) #2
%50 = load i32, ptr @ENOENT, align 4, !tbaa !11
br label %70
51: ; preds = %41
%52 = getelementptr inbounds i8, ptr %10, i64 52
%53 = load i32, ptr %52, align 4, !tbaa !21
%54 = getelementptr inbounds %struct.nat64lsn_cfg, ptr %46, i64 0, i32 9
store i32 %53, ptr %54, align 4, !tbaa !23
%55 = getelementptr inbounds i8, ptr %10, i64 36
%56 = getelementptr inbounds %struct.nat64lsn_cfg, ptr %46, i64 0, i32 5
%57 = load <4 x i32>, ptr %55, align 4, !tbaa !11
store <4 x i32> %57, ptr %56, align 4, !tbaa !11
%58 = getelementptr inbounds i8, ptr %10, i64 20
%59 = getelementptr inbounds %struct.nat64lsn_cfg, ptr %46, i64 0, i32 1
%60 = load <4 x i32>, ptr %58, align 4, !tbaa !11
store <4 x i32> %60, ptr %59, align 4, !tbaa !11
%61 = load i32, ptr @NAT64LSN_FLAGSMASK, align 4, !tbaa !11
%62 = xor i32 %61, -1
%63 = load i32, ptr %46, align 4, !tbaa !26
%64 = and i32 %63, %62
store i32 %64, ptr %46, align 4, !tbaa !26
%65 = load i32, ptr %11, align 4, !tbaa !27
%66 = load i32, ptr @NAT64LSN_FLAGSMASK, align 4, !tbaa !11
%67 = and i32 %66, %65
%68 = or i32 %67, %64
store i32 %68, ptr %46, align 4, !tbaa !26
%69 = tail call i32 @IPFW_UH_WUNLOCK(ptr noundef %0) #2
br label %70
70: ; preds = %51, %48, %38, %35, %20, %6
%71 = phi i32 [ %7, %6 ], [ %21, %20 ], [ %37, %35 ], [ 0, %38 ], [ %50, %48 ], [ 0, %51 ]
ret i32 %71
}
declare i64 @ipfw_get_sopt_space(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @ipfw_check_object_name_generic(i32 noundef) local_unnamed_addr #1
declare ptr @CHAIN_TO_SRV(ptr noundef) local_unnamed_addr #1
declare i32 @IPFW_UH_RLOCK(ptr noundef) local_unnamed_addr #1
declare ptr @nat64lsn_find(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @IPFW_UH_RUNLOCK(ptr noundef) local_unnamed_addr #1
declare i32 @nat64lsn_export_config(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @nat64lsn_default_config(ptr noundef) local_unnamed_addr #1
declare i32 @IPFW_UH_WLOCK(ptr noundef) local_unnamed_addr #1
declare i32 @IPFW_UH_WUNLOCK(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"sockopt_data", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !7, i64 8}
!13 = !{!"TYPE_11__", !14, i64 0}
!14 = !{!"TYPE_9__", !15, i64 0, !7, i64 8}
!15 = !{!"long", !8, i64 0}
!16 = !{!13, !15, i64 0}
!17 = !{!15, !15, i64 0}
!18 = !{!6, !10, i64 8}
!19 = !{!20, !15, i64 0}
!20 = !{!"TYPE_8__", !15, i64 0}
!21 = !{!22, !7, i64 36}
!22 = !{!"TYPE_12__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36}
!23 = !{!24, !7, i64 36}
!24 = !{!"nat64lsn_cfg", !25, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36}
!25 = !{!"TYPE_10__", !7, i64 0}
!26 = !{!24, !7, i64 0}
!27 = !{!22, !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/netpfil/ipfw/nat64/extr_nat64lsn_control.c_nat64lsn_config.c'
source_filename = "AnghaBench/freebsd/sys/netpfil/ipfw/nat64/extr_nat64lsn_control.c_nat64lsn_config.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@IPFW_MAX_SETS = common local_unnamed_addr global i64 0, align 8
@SOPT_GET = common local_unnamed_addr global i64 0, align 8
@ENOENT = common local_unnamed_addr global i32 0, align 4
@NAT64LSN_FLAGSMASK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @nat64lsn_config], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @nat64lsn_config(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = load i32, ptr %2, align 8, !tbaa !6
%5 = icmp eq i32 %4, 56
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = load i32, ptr @EINVAL, align 4, !tbaa !12
br label %70
8: ; preds = %3
%9 = tail call i64 @ipfw_get_sopt_space(ptr noundef nonnull %2, i32 noundef 56) #2
%10 = inttoptr i64 %9 to ptr
%11 = getelementptr inbounds i8, ptr %10, i64 16
%12 = getelementptr inbounds i8, ptr %10, i64 8
%13 = load i32, ptr %12, align 8, !tbaa !13
%14 = tail call i64 @ipfw_check_object_name_generic(i32 noundef %13) #2
%15 = icmp eq i64 %14, 0
br i1 %15, label %16, label %20
16: ; preds = %8
%17 = load i64, ptr %10, align 8, !tbaa !17
%18 = load i64, ptr @IPFW_MAX_SETS, align 8, !tbaa !18
%19 = icmp slt i64 %17, %18
br i1 %19, label %22, label %20
20: ; preds = %16, %8
%21 = load i32, ptr @EINVAL, align 4, !tbaa !12
br label %70
22: ; preds = %16
%23 = tail call ptr @CHAIN_TO_SRV(ptr noundef %0) #2
%24 = getelementptr inbounds i8, ptr %2, i64 8
%25 = load ptr, ptr %24, align 8, !tbaa !19
%26 = load i64, ptr %25, align 8, !tbaa !20
%27 = load i64, ptr @SOPT_GET, align 8, !tbaa !18
%28 = icmp eq i64 %26, %27
br i1 %28, label %29, label %41
29: ; preds = %22
%30 = tail call i32 @IPFW_UH_RLOCK(ptr noundef %0) #2
%31 = load i32, ptr %12, align 8, !tbaa !13
%32 = load i64, ptr %10, align 8, !tbaa !17
%33 = tail call ptr @nat64lsn_find(ptr noundef %23, i32 noundef %31, i64 noundef %32) #2
%34 = icmp eq ptr %33, null
br i1 %34, label %35, label %38
35: ; preds = %29
%36 = tail call i32 @IPFW_UH_RUNLOCK(ptr noundef %0) #2
%37 = load i32, ptr @ENOENT, align 4, !tbaa !12
br label %70
38: ; preds = %29
%39 = tail call i32 @nat64lsn_export_config(ptr noundef %0, ptr noundef nonnull %33, ptr noundef nonnull %11) #2
%40 = tail call i32 @IPFW_UH_RUNLOCK(ptr noundef %0) #2
br label %70
41: ; preds = %22
%42 = tail call i32 @nat64lsn_default_config(ptr noundef nonnull %11) #2
%43 = tail call i32 @IPFW_UH_WLOCK(ptr noundef %0) #2
%44 = load i32, ptr %12, align 8, !tbaa !13
%45 = load i64, ptr %10, align 8, !tbaa !17
%46 = tail call ptr @nat64lsn_find(ptr noundef %23, i32 noundef %44, i64 noundef %45) #2
%47 = icmp eq ptr %46, null
br i1 %47, label %48, label %51
48: ; preds = %41
%49 = tail call i32 @IPFW_UH_WUNLOCK(ptr noundef %0) #2
%50 = load i32, ptr @ENOENT, align 4, !tbaa !12
br label %70
51: ; preds = %41
%52 = getelementptr inbounds i8, ptr %10, i64 52
%53 = load i32, ptr %52, align 4, !tbaa !22
%54 = getelementptr inbounds i8, ptr %46, i64 36
store i32 %53, ptr %54, align 4, !tbaa !24
%55 = getelementptr inbounds i8, ptr %10, i64 36
%56 = getelementptr inbounds i8, ptr %46, i64 20
%57 = load <4 x i32>, ptr %55, align 4, !tbaa !12
store <4 x i32> %57, ptr %56, align 4, !tbaa !12
%58 = getelementptr inbounds i8, ptr %10, i64 20
%59 = getelementptr inbounds i8, ptr %46, i64 4
%60 = load <4 x i32>, ptr %58, align 4, !tbaa !12
store <4 x i32> %60, ptr %59, align 4, !tbaa !12
%61 = load i32, ptr @NAT64LSN_FLAGSMASK, align 4, !tbaa !12
%62 = xor i32 %61, -1
%63 = load i32, ptr %46, align 4, !tbaa !27
%64 = and i32 %63, %62
store i32 %64, ptr %46, align 4, !tbaa !27
%65 = load i32, ptr %11, align 4, !tbaa !28
%66 = load i32, ptr @NAT64LSN_FLAGSMASK, align 4, !tbaa !12
%67 = and i32 %66, %65
%68 = or i32 %67, %64
store i32 %68, ptr %46, align 4, !tbaa !27
%69 = tail call i32 @IPFW_UH_WUNLOCK(ptr noundef %0) #2
br label %70
70: ; preds = %51, %48, %38, %35, %20, %6
%71 = phi i32 [ %7, %6 ], [ %21, %20 ], [ %37, %35 ], [ 0, %38 ], [ %50, %48 ], [ 0, %51 ]
ret i32 %71
}
declare i64 @ipfw_get_sopt_space(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @ipfw_check_object_name_generic(i32 noundef) local_unnamed_addr #1
declare ptr @CHAIN_TO_SRV(ptr noundef) local_unnamed_addr #1
declare i32 @IPFW_UH_RLOCK(ptr noundef) local_unnamed_addr #1
declare ptr @nat64lsn_find(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @IPFW_UH_RUNLOCK(ptr noundef) local_unnamed_addr #1
declare i32 @nat64lsn_export_config(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @nat64lsn_default_config(ptr noundef) local_unnamed_addr #1
declare i32 @IPFW_UH_WLOCK(ptr noundef) local_unnamed_addr #1
declare i32 @IPFW_UH_WUNLOCK(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"sockopt_data", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!14, !8, i64 8}
!14 = !{!"TYPE_11__", !15, i64 0}
!15 = !{!"TYPE_9__", !16, i64 0, !8, i64 8}
!16 = !{!"long", !9, i64 0}
!17 = !{!14, !16, i64 0}
!18 = !{!16, !16, i64 0}
!19 = !{!7, !11, i64 8}
!20 = !{!21, !16, i64 0}
!21 = !{!"TYPE_8__", !16, i64 0}
!22 = !{!23, !8, i64 36}
!23 = !{!"TYPE_12__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !8, i64 24, !8, i64 28, !8, i64 32, !8, i64 36}
!24 = !{!25, !8, i64 36}
!25 = !{!"nat64lsn_cfg", !26, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !8, i64 24, !8, i64 28, !8, i64 32, !8, i64 36}
!26 = !{!"TYPE_10__", !8, i64 0}
!27 = !{!25, !8, i64 0}
!28 = !{!23, !8, i64 0}
| freebsd_sys_netpfil_ipfw_nat64_extr_nat64lsn_control.c_nat64lsn_config |
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