IR_x86 string | IR_arm string | filename string |
|---|---|---|
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/nilfs2/extr_sufile.c_nilfs_sufile_get_blkoff.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/nilfs2/extr_sufile.c_nilfs_sufile_get_blkoff.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @nilfs_sufile_get_blkoff], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @nilfs_sufile_get_blkoff(ptr noundef %0, i64 noundef %1) #0 {
%3 = tail call ptr @NILFS_MDT(ptr noundef %0) #2
%4 = load i64, ptr %3, align 8, !tbaa !5
%5 = add nsw i64 %4, %1
%6 = tail call i32 @nilfs_sufile_segment_usages_per_block(ptr noundef %0) #2
%7 = tail call i32 @do_div(i64 noundef %5, i32 noundef %6) #2
ret i64 %5
}
declare ptr @NILFS_MDT(ptr noundef) local_unnamed_addr #1
declare i32 @do_div(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @nilfs_sufile_segment_usages_per_block(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/fs/nilfs2/extr_sufile.c_nilfs_sufile_get_blkoff.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/nilfs2/extr_sufile.c_nilfs_sufile_get_blkoff.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @nilfs_sufile_get_blkoff], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @nilfs_sufile_get_blkoff(ptr noundef %0, i64 noundef %1) #0 {
%3 = tail call ptr @NILFS_MDT(ptr noundef %0) #2
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = add nsw i64 %4, %1
%6 = tail call i32 @nilfs_sufile_segment_usages_per_block(ptr noundef %0) #2
%7 = tail call i32 @do_div(i64 noundef %5, i32 noundef %6) #2
ret i64 %5
}
declare ptr @NILFS_MDT(ptr noundef) local_unnamed_addr #1
declare i32 @do_div(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @nilfs_sufile_segment_usages_per_block(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_fs_nilfs2_extr_sufile.c_nilfs_sufile_get_blkoff |
; ModuleID = 'AnghaBench/linux/drivers/usb/host/extr_fotg210-hcd.c_fotg210_quiesce.c'
source_filename = "AnghaBench/linux/drivers/usb/host/extr_fotg210-hcd.c_fotg210_quiesce.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.fotg210_hcd = type { i64, i32, ptr, i32 }
%struct.TYPE_2__ = type { i32, i32 }
@FOTG210_RH_RUNNING = dso_local local_unnamed_addr global i64 0, align 8
@STS_ASS = dso_local local_unnamed_addr global i32 0, align 4
@STS_PSS = dso_local local_unnamed_addr global i32 0, align 4
@CMD_ASE = dso_local local_unnamed_addr global i32 0, align 4
@CMD_PSE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @fotg210_quiesce], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @fotg210_quiesce(ptr noundef %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = load i64, ptr @FOTG210_RH_RUNNING, align 8, !tbaa !12
%4 = icmp eq i64 %2, %3
br i1 %4, label %5, label %33
5: ; preds = %1
%6 = getelementptr inbounds %struct.fotg210_hcd, ptr %0, i64 0, i32 1
%7 = load i32, ptr %6, align 8, !tbaa !13
%8 = shl i32 %7, 10
%9 = load i32, ptr @STS_ASS, align 4, !tbaa !14
%10 = load i32, ptr @STS_PSS, align 4, !tbaa !14
%11 = or i32 %10, %9
%12 = and i32 %11, %8
%13 = getelementptr inbounds %struct.fotg210_hcd, ptr %0, i64 0, i32 2
%14 = load ptr, ptr %13, align 8, !tbaa !15
%15 = tail call i32 @handshake(ptr noundef nonnull %0, ptr noundef %14, i32 noundef %11, i32 noundef %12, i32 noundef 2000) #2
%16 = getelementptr inbounds %struct.fotg210_hcd, ptr %0, i64 0, i32 3
%17 = tail call i32 @spin_lock_irq(ptr noundef nonnull %16) #2
%18 = load i32, ptr @CMD_ASE, align 4, !tbaa !14
%19 = load i32, ptr @CMD_PSE, align 4, !tbaa !14
%20 = or i32 %19, %18
%21 = xor i32 %20, -1
%22 = load i32, ptr %6, align 8, !tbaa !13
%23 = and i32 %22, %21
store i32 %23, ptr %6, align 8, !tbaa !13
%24 = load ptr, ptr %13, align 8, !tbaa !15
%25 = getelementptr inbounds %struct.TYPE_2__, ptr %24, i64 0, i32 1
%26 = tail call i32 @fotg210_writel(ptr noundef nonnull %0, i32 noundef %23, ptr noundef nonnull %25) #2
%27 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %16) #2
%28 = load ptr, ptr %13, align 8, !tbaa !15
%29 = load i32, ptr @STS_ASS, align 4, !tbaa !14
%30 = load i32, ptr @STS_PSS, align 4, !tbaa !14
%31 = or i32 %30, %29
%32 = tail call i32 @handshake(ptr noundef nonnull %0, ptr noundef %28, i32 noundef %31, i32 noundef 0, i32 noundef 2000) #2
br label %33
33: ; preds = %1, %5
ret void
}
declare i32 @handshake(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @fotg210_writel(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irq(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"fotg210_hcd", !7, i64 0, !10, i64 8, !11, i64 16, !10, i64 24}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !10, i64 8}
!14 = !{!10, !10, i64 0}
!15 = !{!6, !11, i64 16}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/host/extr_fotg210-hcd.c_fotg210_quiesce.c'
source_filename = "AnghaBench/linux/drivers/usb/host/extr_fotg210-hcd.c_fotg210_quiesce.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FOTG210_RH_RUNNING = common local_unnamed_addr global i64 0, align 8
@STS_ASS = common local_unnamed_addr global i32 0, align 4
@STS_PSS = common local_unnamed_addr global i32 0, align 4
@CMD_ASE = common local_unnamed_addr global i32 0, align 4
@CMD_PSE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @fotg210_quiesce], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @fotg210_quiesce(ptr noundef %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = load i64, ptr @FOTG210_RH_RUNNING, align 8, !tbaa !13
%4 = icmp eq i64 %2, %3
br i1 %4, label %5, label %33
5: ; preds = %1
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load i32, ptr %6, align 8, !tbaa !14
%8 = shl i32 %7, 10
%9 = load i32, ptr @STS_ASS, align 4, !tbaa !15
%10 = load i32, ptr @STS_PSS, align 4, !tbaa !15
%11 = or i32 %10, %9
%12 = and i32 %11, %8
%13 = getelementptr inbounds i8, ptr %0, i64 16
%14 = load ptr, ptr %13, align 8, !tbaa !16
%15 = tail call i32 @handshake(ptr noundef nonnull %0, ptr noundef %14, i32 noundef %11, i32 noundef %12, i32 noundef 2000) #2
%16 = getelementptr inbounds i8, ptr %0, i64 24
%17 = tail call i32 @spin_lock_irq(ptr noundef nonnull %16) #2
%18 = load i32, ptr @CMD_ASE, align 4, !tbaa !15
%19 = load i32, ptr @CMD_PSE, align 4, !tbaa !15
%20 = or i32 %19, %18
%21 = xor i32 %20, -1
%22 = load i32, ptr %6, align 8, !tbaa !14
%23 = and i32 %22, %21
store i32 %23, ptr %6, align 8, !tbaa !14
%24 = load ptr, ptr %13, align 8, !tbaa !16
%25 = getelementptr inbounds i8, ptr %24, i64 4
%26 = tail call i32 @fotg210_writel(ptr noundef nonnull %0, i32 noundef %23, ptr noundef nonnull %25) #2
%27 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %16) #2
%28 = load ptr, ptr %13, align 8, !tbaa !16
%29 = load i32, ptr @STS_ASS, align 4, !tbaa !15
%30 = load i32, ptr @STS_PSS, align 4, !tbaa !15
%31 = or i32 %30, %29
%32 = tail call i32 @handshake(ptr noundef nonnull %0, ptr noundef %28, i32 noundef %31, i32 noundef 0, i32 noundef 2000) #2
br label %33
33: ; preds = %1, %5
ret void
}
declare i32 @handshake(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @fotg210_writel(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irq(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"fotg210_hcd", !8, i64 0, !11, i64 8, !12, i64 16, !11, i64 24}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !11, i64 8}
!15 = !{!11, !11, i64 0}
!16 = !{!7, !12, i64 16}
| linux_drivers_usb_host_extr_fotg210-hcd.c_fotg210_quiesce |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_mes_v10_1.c_mes_v10_1_suspend.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_mes_v10_1.c_mes_v10_1_suspend.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @mes_v10_1_suspend], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @mes_v10_1_suspend(ptr nocapture readnone %0) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_mes_v10_1.c_mes_v10_1_suspend.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_mes_v10_1.c_mes_v10_1_suspend.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @mes_v10_1_suspend], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @mes_v10_1_suspend(ptr nocapture readnone %0) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_gpu_drm_amd_amdgpu_extr_mes_v10_1.c_mes_v10_1_suspend |
; ModuleID = 'AnghaBench/xLua/build/lua-5.3.4/src/extr_lstrlib.c_push_captures.c'
source_filename = "AnghaBench/xLua/build/lua-5.3.4/src/extr_lstrlib.c_push_captures.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i32 }
@.str = private unnamed_addr constant [18 x i8] c"too many captures\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @push_captures], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @push_captures(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = load i32, ptr %0, align 4, !tbaa !5
%5 = icmp eq i32 %4, 0
%6 = icmp ne ptr %1, null
%7 = and i1 %6, %5
%8 = select i1 %7, i32 1, i32 %4
%9 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
%10 = load i32, ptr %9, align 4, !tbaa !10
%11 = tail call i32 @luaL_checkstack(i32 noundef %10, i32 noundef %8, ptr noundef nonnull @.str) #2
%12 = icmp sgt i32 %8, 0
br i1 %12, label %13, label %18
13: ; preds = %3, %13
%14 = phi i32 [ %16, %13 ], [ 0, %3 ]
%15 = tail call i32 @push_onecapture(ptr noundef nonnull %0, i32 noundef %14, ptr noundef %1, ptr noundef %2) #2
%16 = add nuw nsw i32 %14, 1
%17 = icmp eq i32 %16, %8
br i1 %17, label %18, label %13, !llvm.loop !11
18: ; preds = %13, %3
ret i32 %8
}
declare i32 @luaL_checkstack(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @push_onecapture(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/xLua/build/lua-5.3.4/src/extr_lstrlib.c_push_captures.c'
source_filename = "AnghaBench/xLua/build/lua-5.3.4/src/extr_lstrlib.c_push_captures.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [18 x i8] c"too many captures\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @push_captures], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @push_captures(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = load i32, ptr %0, align 4, !tbaa !6
%5 = icmp eq i32 %4, 0
%6 = icmp ne ptr %1, null
%7 = and i1 %6, %5
%8 = select i1 %7, i32 1, i32 %4
%9 = getelementptr inbounds i8, ptr %0, i64 4
%10 = load i32, ptr %9, align 4, !tbaa !11
%11 = tail call i32 @luaL_checkstack(i32 noundef %10, i32 noundef %8, ptr noundef nonnull @.str) #2
%12 = icmp sgt i32 %8, 0
br i1 %12, label %13, label %18
13: ; preds = %3, %13
%14 = phi i32 [ %16, %13 ], [ 0, %3 ]
%15 = tail call i32 @push_onecapture(ptr noundef nonnull %0, i32 noundef %14, ptr noundef %1, ptr noundef %2) #2
%16 = add nuw nsw i32 %14, 1
%17 = icmp eq i32 %16, %8
br i1 %17, label %18, label %13, !llvm.loop !12
18: ; preds = %13, %3
ret i32 %8
}
declare i32 @luaL_checkstack(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @push_onecapture(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
| xLua_build_lua-5.3.4_src_extr_lstrlib.c_push_captures |
; ModuleID = 'AnghaBench/Quake-III-Arena/lcc/src/extr_bytecode.c_PrintToSourceLine.c'
source_filename = "AnghaBench/Quake-III-Arena/lcc/src/extr_bytecode.c_PrintToSourceLine.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@sourceFile = dso_local local_unnamed_addr global i32 0, align 4
@sourceLine = dso_local local_unnamed_addr global i32 0, align 4
@sourcePtr = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [8 x i8] c";%d:%s\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @PrintToSourceLine], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @PrintToSourceLine(i32 noundef %0) #0 {
%2 = load i32, ptr @sourceFile, align 4, !tbaa !5
%3 = icmp eq i32 %2, 0
%4 = load i32, ptr @sourceLine, align 4
%5 = icmp sgt i32 %4, %0
%6 = select i1 %3, i1 true, i1 %5
br i1 %6, label %35, label %7
7: ; preds = %1
%8 = load ptr, ptr @sourcePtr, align 8, !tbaa !9
br label %9
9: ; preds = %23, %7
%10 = phi i32 [ %33, %23 ], [ %4, %7 ]
%11 = phi ptr [ %31, %23 ], [ %8, %7 ]
br label %12
12: ; preds = %9, %17
%13 = phi i32 [ %18, %17 ], [ 0, %9 ]
%14 = zext nneg i32 %13 to i64
%15 = getelementptr inbounds i8, ptr %11, i64 %14
%16 = load i8, ptr %15, align 1, !tbaa !11
switch i8 %16, label %17 [
i8 10, label %19
i8 0, label %23
]
17: ; preds = %12
%18 = add nuw nsw i32 %13, 1
br label %12, !llvm.loop !12
19: ; preds = %12
%20 = getelementptr inbounds i8, ptr %11, i64 %14
store i8 0, ptr %20, align 1, !tbaa !11
%21 = load i32, ptr @sourceLine, align 4, !tbaa !5
%22 = load ptr, ptr @sourcePtr, align 8, !tbaa !9
br label %23
23: ; preds = %12, %19
%24 = phi ptr [ %22, %19 ], [ %11, %12 ]
%25 = phi i32 [ %21, %19 ], [ %10, %12 ]
%26 = tail call i32 @print(ptr noundef nonnull @.str, i32 noundef %25, ptr noundef %24) #2
%27 = icmp ne i8 %16, 0
%28 = load ptr, ptr @sourcePtr, align 8
%29 = getelementptr i8, ptr %28, i64 %14
%30 = zext i1 %27 to i64
%31 = getelementptr i8, ptr %29, i64 %30
store ptr %31, ptr @sourcePtr, align 8, !tbaa !9
%32 = load i32, ptr @sourceLine, align 4, !tbaa !5
%33 = add nsw i32 %32, 1
store i32 %33, ptr @sourceLine, align 4, !tbaa !5
%34 = icmp slt i32 %32, %0
br i1 %34, label %9, label %35, !llvm.loop !12
35: ; preds = %23, %1
ret void
}
declare i32 @print(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/Quake-III-Arena/lcc/src/extr_bytecode.c_PrintToSourceLine.c'
source_filename = "AnghaBench/Quake-III-Arena/lcc/src/extr_bytecode.c_PrintToSourceLine.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@sourceFile = common local_unnamed_addr global i32 0, align 4
@sourceLine = common local_unnamed_addr global i32 0, align 4
@sourcePtr = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [8 x i8] c";%d:%s\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @PrintToSourceLine], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @PrintToSourceLine(i32 noundef %0) #0 {
%2 = load i32, ptr @sourceFile, align 4, !tbaa !6
%3 = icmp eq i32 %2, 0
%4 = load i32, ptr @sourceLine, align 4
%5 = icmp sgt i32 %4, %0
%6 = select i1 %3, i1 true, i1 %5
br i1 %6, label %35, label %7
7: ; preds = %1
%8 = load ptr, ptr @sourcePtr, align 8, !tbaa !10
br label %9
9: ; preds = %23, %7
%10 = phi i32 [ %33, %23 ], [ %4, %7 ]
%11 = phi ptr [ %31, %23 ], [ %8, %7 ]
br label %12
12: ; preds = %9, %17
%13 = phi i32 [ %18, %17 ], [ 0, %9 ]
%14 = zext nneg i32 %13 to i64
%15 = getelementptr inbounds i8, ptr %11, i64 %14
%16 = load i8, ptr %15, align 1, !tbaa !12
switch i8 %16, label %17 [
i8 10, label %19
i8 0, label %23
]
17: ; preds = %12
%18 = add nuw nsw i32 %13, 1
br label %12, !llvm.loop !13
19: ; preds = %12
%20 = getelementptr inbounds i8, ptr %11, i64 %14
store i8 0, ptr %20, align 1, !tbaa !12
%21 = load i32, ptr @sourceLine, align 4, !tbaa !6
%22 = load ptr, ptr @sourcePtr, align 8, !tbaa !10
br label %23
23: ; preds = %12, %19
%24 = phi ptr [ %22, %19 ], [ %11, %12 ]
%25 = phi i32 [ %21, %19 ], [ %10, %12 ]
%26 = tail call i32 @print(ptr noundef nonnull @.str, i32 noundef %25, ptr noundef %24) #2
%27 = icmp ne i8 %16, 0
%28 = load ptr, ptr @sourcePtr, align 8
%29 = getelementptr inbounds i8, ptr %28, i64 %14
%30 = zext i1 %27 to i64
%31 = getelementptr inbounds i8, ptr %29, i64 %30
store ptr %31, ptr @sourcePtr, align 8, !tbaa !10
%32 = load i32, ptr @sourceLine, align 4, !tbaa !6
%33 = add nsw i32 %32, 1
store i32 %33, ptr @sourceLine, align 4, !tbaa !6
%34 = icmp slt i32 %32, %0
br i1 %34, label %9, label %35, !llvm.loop !13
35: ; preds = %23, %1
ret void
}
declare i32 @print(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!8, !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| Quake-III-Arena_lcc_src_extr_bytecode.c_PrintToSourceLine |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum.c_mlxsw_sp_port_hwtstamp_set.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum.c_mlxsw_sp_port_hwtstamp_set.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.hwtstamp_config = type { i32 }
@EFAULT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @mlxsw_sp_port_hwtstamp_set], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mlxsw_sp_port_hwtstamp_set(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = alloca %struct.hwtstamp_config, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = load i32, ptr %1, align 4, !tbaa !5
%5 = call i64 @copy_from_user(ptr noundef nonnull %3, i32 noundef %4, i32 noundef 4) #3
%6 = icmp eq i64 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, ptr @EFAULT, align 4, !tbaa !10
%9 = sub nsw i32 0, %8
br label %23
10: ; preds = %2
%11 = load ptr, ptr %0, align 8, !tbaa !11
%12 = load ptr, ptr %11, align 8, !tbaa !14
%13 = load ptr, ptr %12, align 8, !tbaa !16
%14 = call i32 %13(ptr noundef nonnull %0, ptr noundef nonnull %3) #3
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %23
16: ; preds = %10
%17 = load i32, ptr %1, align 4, !tbaa !5
%18 = call i64 @copy_to_user(i32 noundef %17, ptr noundef nonnull %3, i32 noundef 4) #3
%19 = icmp eq i64 %18, 0
br i1 %19, label %23, label %20
20: ; preds = %16
%21 = load i32, ptr @EFAULT, align 4, !tbaa !10
%22 = sub nsw i32 0, %21
br label %23
23: ; preds = %16, %10, %20, %7
%24 = phi i32 [ %9, %7 ], [ %22, %20 ], [ %14, %10 ], [ 0, %16 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %24
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @copy_from_user(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @copy_to_user(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ifreq", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"mlxsw_sp_port", !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"TYPE_4__", !13, i64 0}
!16 = !{!17, !13, i64 0}
!17 = !{!"TYPE_3__", !13, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum.c_mlxsw_sp_port_hwtstamp_set.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum.c_mlxsw_sp_port_hwtstamp_set.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.hwtstamp_config = type { i32 }
@EFAULT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mlxsw_sp_port_hwtstamp_set], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @mlxsw_sp_port_hwtstamp_set(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = alloca %struct.hwtstamp_config, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = load i32, ptr %1, align 4, !tbaa !6
%5 = call i64 @copy_from_user(ptr noundef nonnull %3, i32 noundef %4, i32 noundef 4) #3
%6 = icmp eq i64 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, ptr @EFAULT, align 4, !tbaa !11
%9 = sub nsw i32 0, %8
br label %23
10: ; preds = %2
%11 = load ptr, ptr %0, align 8, !tbaa !12
%12 = load ptr, ptr %11, align 8, !tbaa !15
%13 = load ptr, ptr %12, align 8, !tbaa !17
%14 = call i32 %13(ptr noundef nonnull %0, ptr noundef nonnull %3) #3
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %23
16: ; preds = %10
%17 = load i32, ptr %1, align 4, !tbaa !6
%18 = call i64 @copy_to_user(i32 noundef %17, ptr noundef nonnull %3, i32 noundef 4) #3
%19 = icmp eq i64 %18, 0
br i1 %19, label %23, label %20
20: ; preds = %16
%21 = load i32, ptr @EFAULT, align 4, !tbaa !11
%22 = sub nsw i32 0, %21
br label %23
23: ; preds = %16, %10, %20, %7
%24 = phi i32 [ %9, %7 ], [ %22, %20 ], [ %14, %10 ], [ 0, %16 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %24
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @copy_from_user(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @copy_to_user(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ifreq", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"mlxsw_sp_port", !14, i64 0}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!16, !14, i64 0}
!16 = !{!"TYPE_4__", !14, i64 0}
!17 = !{!18, !14, i64 0}
!18 = !{!"TYPE_3__", !14, i64 0}
| linux_drivers_net_ethernet_mellanox_mlxsw_extr_spectrum.c_mlxsw_sp_port_hwtstamp_set |
; ModuleID = 'AnghaBench/linux/drivers/media/dvb-frontends/extr_stv6110x.c_stv6110x_set_bandwidth.c'
source_filename = "AnghaBench/linux/drivers/media/dvb-frontends/extr_stv6110x.c_stv6110x_set_bandwidth.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@STV6110x_CTRL3 = dso_local local_unnamed_addr global i64 0, align 8
@CTRL3_CF = dso_local local_unnamed_addr global i32 0, align 4
@CTRL3_RCCLK_OFF = dso_local local_unnamed_addr global i32 0, align 4
@STV6110x_STAT1 = dso_local local_unnamed_addr global i64 0, align 8
@STAT1_CALRC_STRT = dso_local local_unnamed_addr global i32 0, align 4
@TRIALS = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @stv6110x_set_bandwidth], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @stv6110x_set_bandwidth(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = ashr i32 %1, 1
%5 = icmp sgt i32 %4, 36000000
br i1 %5, label %6, label %13
6: ; preds = %2
%7 = load ptr, ptr %3, align 8, !tbaa !10
%8 = load i64, ptr @STV6110x_CTRL3, align 8, !tbaa !12
%9 = getelementptr inbounds i32, ptr %7, i64 %8
%10 = load i32, ptr %9, align 4, !tbaa !14
%11 = load i32, ptr @CTRL3_CF, align 4, !tbaa !14
%12 = tail call i32 @STV6110x_SETFIELD(i32 noundef %10, i32 noundef %11, i32 noundef 31) #2
br label %26
13: ; preds = %2
%14 = icmp slt i32 %4, 5000000
%15 = load ptr, ptr %3, align 8, !tbaa !10
%16 = load i64, ptr @STV6110x_CTRL3, align 8, !tbaa !12
%17 = getelementptr inbounds i32, ptr %15, i64 %16
%18 = load i32, ptr %17, align 4, !tbaa !14
%19 = load i32, ptr @CTRL3_CF, align 4, !tbaa !14
br i1 %14, label %20, label %22
20: ; preds = %13
%21 = tail call i32 @STV6110x_SETFIELD(i32 noundef %18, i32 noundef %19, i32 noundef 0) #2
br label %26
22: ; preds = %13
%23 = udiv i32 %4, 1000000
%24 = add nsw i32 %23, -5
%25 = tail call i32 @STV6110x_SETFIELD(i32 noundef %18, i32 noundef %19, i32 noundef %24) #2
br label %26
26: ; preds = %20, %22, %6
%27 = load ptr, ptr %3, align 8, !tbaa !10
%28 = load i64, ptr @STV6110x_CTRL3, align 8, !tbaa !12
%29 = getelementptr inbounds i32, ptr %27, i64 %28
%30 = load i32, ptr %29, align 4, !tbaa !14
%31 = load i32, ptr @CTRL3_RCCLK_OFF, align 4, !tbaa !14
%32 = tail call i32 @STV6110x_SETFIELD(i32 noundef %30, i32 noundef %31, i32 noundef 0) #2
%33 = load ptr, ptr %3, align 8, !tbaa !10
%34 = load i64, ptr @STV6110x_STAT1, align 8, !tbaa !12
%35 = getelementptr inbounds i32, ptr %33, i64 %34
%36 = load i32, ptr %35, align 4, !tbaa !14
%37 = load i32, ptr @STAT1_CALRC_STRT, align 4, !tbaa !14
%38 = tail call i32 @STV6110x_SETFIELD(i32 noundef %36, i32 noundef %37, i32 noundef 1) #2
%39 = load i64, ptr @STV6110x_CTRL3, align 8, !tbaa !12
%40 = load ptr, ptr %3, align 8, !tbaa !10
%41 = getelementptr inbounds i32, ptr %40, i64 %39
%42 = load i32, ptr %41, align 4, !tbaa !14
%43 = tail call i32 @stv6110x_write_reg(ptr noundef nonnull %3, i64 noundef %39, i32 noundef %42) #2
%44 = load i64, ptr @STV6110x_STAT1, align 8, !tbaa !12
%45 = load ptr, ptr %3, align 8, !tbaa !10
%46 = getelementptr inbounds i32, ptr %45, i64 %44
%47 = load i32, ptr %46, align 4, !tbaa !14
%48 = tail call i32 @stv6110x_write_reg(ptr noundef nonnull %3, i64 noundef %44, i32 noundef %47) #2
%49 = load i64, ptr @TRIALS, align 8, !tbaa !12
%50 = icmp sgt i64 %49, 0
br i1 %50, label %51, label %69
51: ; preds = %26, %64
%52 = phi i64 [ %66, %64 ], [ 0, %26 ]
%53 = load i64, ptr @STV6110x_STAT1, align 8, !tbaa !12
%54 = load ptr, ptr %3, align 8, !tbaa !10
%55 = getelementptr inbounds i32, ptr %54, i64 %53
%56 = tail call i32 @stv6110x_read_reg(ptr noundef nonnull %3, i64 noundef %53, ptr noundef %55) #2
%57 = load i32, ptr @STAT1_CALRC_STRT, align 4, !tbaa !14
%58 = load ptr, ptr %3, align 8, !tbaa !10
%59 = load i64, ptr @STV6110x_STAT1, align 8, !tbaa !12
%60 = getelementptr inbounds i32, ptr %58, i64 %59
%61 = load i32, ptr %60, align 4, !tbaa !14
%62 = tail call i32 @STV6110x_GETFIELD(i32 noundef %57, i32 noundef %61) #2
%63 = icmp eq i32 %62, 0
br i1 %63, label %69, label %64
64: ; preds = %51
%65 = tail call i32 @msleep(i32 noundef 1) #2
%66 = add nuw nsw i64 %52, 1
%67 = load i64, ptr @TRIALS, align 8, !tbaa !12
%68 = icmp slt i64 %66, %67
br i1 %68, label %51, label %69, !llvm.loop !16
69: ; preds = %64, %51, %26
%70 = load ptr, ptr %3, align 8, !tbaa !10
%71 = load i64, ptr @STV6110x_CTRL3, align 8, !tbaa !12
%72 = getelementptr inbounds i32, ptr %70, i64 %71
%73 = load i32, ptr %72, align 4, !tbaa !14
%74 = load i32, ptr @CTRL3_RCCLK_OFF, align 4, !tbaa !14
%75 = tail call i32 @STV6110x_SETFIELD(i32 noundef %73, i32 noundef %74, i32 noundef 1) #2
%76 = load i64, ptr @STV6110x_CTRL3, align 8, !tbaa !12
%77 = load ptr, ptr %3, align 8, !tbaa !10
%78 = getelementptr inbounds i32, ptr %77, i64 %76
%79 = load i32, ptr %78, align 4, !tbaa !14
%80 = tail call i32 @stv6110x_write_reg(ptr noundef nonnull %3, i64 noundef %76, i32 noundef %79) #2
ret i32 0
}
declare i32 @STV6110x_SETFIELD(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @stv6110x_write_reg(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @stv6110x_read_reg(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @STV6110x_GETFIELD(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @msleep(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"dvb_frontend", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"stv6110x_state", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !8, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/media/dvb-frontends/extr_stv6110x.c_stv6110x_set_bandwidth.c'
source_filename = "AnghaBench/linux/drivers/media/dvb-frontends/extr_stv6110x.c_stv6110x_set_bandwidth.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@STV6110x_CTRL3 = common local_unnamed_addr global i64 0, align 8
@CTRL3_CF = common local_unnamed_addr global i32 0, align 4
@CTRL3_RCCLK_OFF = common local_unnamed_addr global i32 0, align 4
@STV6110x_STAT1 = common local_unnamed_addr global i64 0, align 8
@STAT1_CALRC_STRT = common local_unnamed_addr global i32 0, align 4
@TRIALS = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @stv6110x_set_bandwidth], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @stv6110x_set_bandwidth(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = ashr i32 %1, 1
%5 = icmp sgt i32 %4, 36000000
br i1 %5, label %6, label %13
6: ; preds = %2
%7 = load ptr, ptr %3, align 8, !tbaa !11
%8 = load i64, ptr @STV6110x_CTRL3, align 8, !tbaa !13
%9 = getelementptr inbounds i32, ptr %7, i64 %8
%10 = load i32, ptr %9, align 4, !tbaa !15
%11 = load i32, ptr @CTRL3_CF, align 4, !tbaa !15
%12 = tail call i32 @STV6110x_SETFIELD(i32 noundef %10, i32 noundef %11, i32 noundef 31) #2
br label %26
13: ; preds = %2
%14 = icmp slt i32 %4, 5000000
%15 = load ptr, ptr %3, align 8, !tbaa !11
%16 = load i64, ptr @STV6110x_CTRL3, align 8, !tbaa !13
%17 = getelementptr inbounds i32, ptr %15, i64 %16
%18 = load i32, ptr %17, align 4, !tbaa !15
%19 = load i32, ptr @CTRL3_CF, align 4, !tbaa !15
br i1 %14, label %20, label %22
20: ; preds = %13
%21 = tail call i32 @STV6110x_SETFIELD(i32 noundef %18, i32 noundef %19, i32 noundef 0) #2
br label %26
22: ; preds = %13
%23 = udiv i32 %4, 1000000
%24 = add nsw i32 %23, -5
%25 = tail call i32 @STV6110x_SETFIELD(i32 noundef %18, i32 noundef %19, i32 noundef %24) #2
br label %26
26: ; preds = %20, %22, %6
%27 = load ptr, ptr %3, align 8, !tbaa !11
%28 = load i64, ptr @STV6110x_CTRL3, align 8, !tbaa !13
%29 = getelementptr inbounds i32, ptr %27, i64 %28
%30 = load i32, ptr %29, align 4, !tbaa !15
%31 = load i32, ptr @CTRL3_RCCLK_OFF, align 4, !tbaa !15
%32 = tail call i32 @STV6110x_SETFIELD(i32 noundef %30, i32 noundef %31, i32 noundef 0) #2
%33 = load ptr, ptr %3, align 8, !tbaa !11
%34 = load i64, ptr @STV6110x_STAT1, align 8, !tbaa !13
%35 = getelementptr inbounds i32, ptr %33, i64 %34
%36 = load i32, ptr %35, align 4, !tbaa !15
%37 = load i32, ptr @STAT1_CALRC_STRT, align 4, !tbaa !15
%38 = tail call i32 @STV6110x_SETFIELD(i32 noundef %36, i32 noundef %37, i32 noundef 1) #2
%39 = load i64, ptr @STV6110x_CTRL3, align 8, !tbaa !13
%40 = load ptr, ptr %3, align 8, !tbaa !11
%41 = getelementptr inbounds i32, ptr %40, i64 %39
%42 = load i32, ptr %41, align 4, !tbaa !15
%43 = tail call i32 @stv6110x_write_reg(ptr noundef nonnull %3, i64 noundef %39, i32 noundef %42) #2
%44 = load i64, ptr @STV6110x_STAT1, align 8, !tbaa !13
%45 = load ptr, ptr %3, align 8, !tbaa !11
%46 = getelementptr inbounds i32, ptr %45, i64 %44
%47 = load i32, ptr %46, align 4, !tbaa !15
%48 = tail call i32 @stv6110x_write_reg(ptr noundef nonnull %3, i64 noundef %44, i32 noundef %47) #2
%49 = load i64, ptr @TRIALS, align 8, !tbaa !13
%50 = icmp sgt i64 %49, 0
br i1 %50, label %51, label %69
51: ; preds = %26, %64
%52 = phi i64 [ %66, %64 ], [ 0, %26 ]
%53 = load i64, ptr @STV6110x_STAT1, align 8, !tbaa !13
%54 = load ptr, ptr %3, align 8, !tbaa !11
%55 = getelementptr inbounds i32, ptr %54, i64 %53
%56 = tail call i32 @stv6110x_read_reg(ptr noundef nonnull %3, i64 noundef %53, ptr noundef %55) #2
%57 = load i32, ptr @STAT1_CALRC_STRT, align 4, !tbaa !15
%58 = load ptr, ptr %3, align 8, !tbaa !11
%59 = load i64, ptr @STV6110x_STAT1, align 8, !tbaa !13
%60 = getelementptr inbounds i32, ptr %58, i64 %59
%61 = load i32, ptr %60, align 4, !tbaa !15
%62 = tail call i32 @STV6110x_GETFIELD(i32 noundef %57, i32 noundef %61) #2
%63 = icmp eq i32 %62, 0
br i1 %63, label %69, label %64
64: ; preds = %51
%65 = tail call i32 @msleep(i32 noundef 1) #2
%66 = add nuw nsw i64 %52, 1
%67 = load i64, ptr @TRIALS, align 8, !tbaa !13
%68 = icmp slt i64 %66, %67
br i1 %68, label %51, label %69, !llvm.loop !17
69: ; preds = %64, %51, %26
%70 = load ptr, ptr %3, align 8, !tbaa !11
%71 = load i64, ptr @STV6110x_CTRL3, align 8, !tbaa !13
%72 = getelementptr inbounds i32, ptr %70, i64 %71
%73 = load i32, ptr %72, align 4, !tbaa !15
%74 = load i32, ptr @CTRL3_RCCLK_OFF, align 4, !tbaa !15
%75 = tail call i32 @STV6110x_SETFIELD(i32 noundef %73, i32 noundef %74, i32 noundef 1) #2
%76 = load i64, ptr @STV6110x_CTRL3, align 8, !tbaa !13
%77 = load ptr, ptr %3, align 8, !tbaa !11
%78 = getelementptr inbounds i32, ptr %77, i64 %76
%79 = load i32, ptr %78, align 4, !tbaa !15
%80 = tail call i32 @stv6110x_write_reg(ptr noundef nonnull %3, i64 noundef %76, i32 noundef %79) #2
ret i32 0
}
declare i32 @STV6110x_SETFIELD(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @stv6110x_write_reg(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @stv6110x_read_reg(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @STV6110x_GETFIELD(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @msleep(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"dvb_frontend", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"stv6110x_state", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !9, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !9, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
| linux_drivers_media_dvb-frontends_extr_stv6110x.c_stv6110x_set_bandwidth |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_trinity_dpm.c_trinity_set_display_wm.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_trinity_dpm.c_trinity_set_display_wm.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@TRINITY_SIZEOF_DPM_STATE_TABLE = dso_local local_unnamed_addr global i32 0, align 4
@SMU_SCLK_DPM_STATE_0_CNTL_1 = dso_local local_unnamed_addr global i32 0, align 4
@DISPLAY_WM_MASK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @trinity_set_display_wm], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @trinity_set_display_wm(ptr nocapture readnone %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load i32, ptr @TRINITY_SIZEOF_DPM_STATE_TABLE, align 4, !tbaa !5
%5 = mul nsw i32 %4, %1
%6 = load i32, ptr @SMU_SCLK_DPM_STATE_0_CNTL_1, align 4, !tbaa !5
%7 = add nsw i32 %6, %5
%8 = tail call i32 @RREG32_SMC(i32 noundef %7) #2
%9 = load i32, ptr @DISPLAY_WM_MASK, align 4, !tbaa !5
%10 = xor i32 %9, -1
%11 = and i32 %8, %10
%12 = tail call i32 @DISPLAY_WM(i32 noundef %2) #2
%13 = or i32 %11, %12
%14 = load i32, ptr @SMU_SCLK_DPM_STATE_0_CNTL_1, align 4, !tbaa !5
%15 = add nsw i32 %14, %5
%16 = tail call i32 @WREG32_SMC(i32 noundef %15, i32 noundef %13) #2
ret void
}
declare i32 @RREG32_SMC(i32 noundef) local_unnamed_addr #1
declare i32 @DISPLAY_WM(i32 noundef) local_unnamed_addr #1
declare i32 @WREG32_SMC(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_trinity_dpm.c_trinity_set_display_wm.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_trinity_dpm.c_trinity_set_display_wm.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TRINITY_SIZEOF_DPM_STATE_TABLE = common local_unnamed_addr global i32 0, align 4
@SMU_SCLK_DPM_STATE_0_CNTL_1 = common local_unnamed_addr global i32 0, align 4
@DISPLAY_WM_MASK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @trinity_set_display_wm], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @trinity_set_display_wm(ptr nocapture readnone %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load i32, ptr @TRINITY_SIZEOF_DPM_STATE_TABLE, align 4, !tbaa !6
%5 = mul nsw i32 %4, %1
%6 = load i32, ptr @SMU_SCLK_DPM_STATE_0_CNTL_1, align 4, !tbaa !6
%7 = add nsw i32 %6, %5
%8 = tail call i32 @RREG32_SMC(i32 noundef %7) #2
%9 = load i32, ptr @DISPLAY_WM_MASK, align 4, !tbaa !6
%10 = xor i32 %9, -1
%11 = and i32 %8, %10
%12 = tail call i32 @DISPLAY_WM(i32 noundef %2) #2
%13 = or i32 %11, %12
%14 = load i32, ptr @SMU_SCLK_DPM_STATE_0_CNTL_1, align 4, !tbaa !6
%15 = add nsw i32 %14, %5
%16 = tail call i32 @WREG32_SMC(i32 noundef %15, i32 noundef %13) #2
ret void
}
declare i32 @RREG32_SMC(i32 noundef) local_unnamed_addr #1
declare i32 @DISPLAY_WM(i32 noundef) local_unnamed_addr #1
declare i32 @WREG32_SMC(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_gpu_drm_radeon_extr_trinity_dpm.c_trinity_set_display_wm |
; ModuleID = 'AnghaBench/linux/kernel/extr_fork.c_mm_init_aio.c'
source_filename = "AnghaBench/linux/kernel/extr_fork.c_mm_init_aio.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @mm_init_aio], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @mm_init_aio(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/kernel/extr_fork.c_mm_init_aio.c'
source_filename = "AnghaBench/linux/kernel/extr_fork.c_mm_init_aio.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @mm_init_aio], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @mm_init_aio(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_kernel_extr_fork.c_mm_init_aio |
; ModuleID = 'AnghaBench/fastsocket/kernel/tools/perf/ui/extr_hist.c_hpp__header_baseline.c'
source_filename = "AnghaBench/fastsocket/kernel/tools/perf/ui/extr_hist.c_hpp__header_baseline.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.perf_hpp = type { i32, i32 }
@.str = private unnamed_addr constant [9 x i8] c"Baseline\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @hpp__header_baseline], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @hpp__header_baseline(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds %struct.perf_hpp, ptr %0, i64 0, i32 1
%3 = load i32, ptr %2, align 4, !tbaa !5
%4 = load i32, ptr %0, align 4, !tbaa !10
%5 = tail call i32 @scnprintf(i32 noundef %3, i32 noundef %4, ptr noundef nonnull @.str) #2
ret i32 %5
}
declare i32 @scnprintf(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"perf_hpp", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/tools/perf/ui/extr_hist.c_hpp__header_baseline.c'
source_filename = "AnghaBench/fastsocket/kernel/tools/perf/ui/extr_hist.c_hpp__header_baseline.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [9 x i8] c"Baseline\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @hpp__header_baseline], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @hpp__header_baseline(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 4
%3 = load i32, ptr %2, align 4, !tbaa !6
%4 = load i32, ptr %0, align 4, !tbaa !11
%5 = tail call i32 @scnprintf(i32 noundef %3, i32 noundef %4, ptr noundef nonnull @.str) #2
ret i32 %5
}
declare i32 @scnprintf(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"perf_hpp", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
| fastsocket_kernel_tools_perf_ui_extr_hist.c_hpp__header_baseline |
; ModuleID = 'AnghaBench/fastsocket/kernel/mm/extr_page_alloc.c___free_one_page.c'
source_filename = "AnghaBench/fastsocket/kernel/mm/extr_page_alloc.c___free_one_page.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, ptr }
%struct.page = type { i32 }
@MAX_ORDER = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @__free_one_page], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @__free_one_page(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = tail call i32 @PageCompound(ptr noundef %0) #2
%6 = tail call i64 @unlikely(i32 noundef %5) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %4
%9 = tail call i32 @destroy_compound_page(ptr noundef %0, i32 noundef %2) #2
%10 = tail call i64 @unlikely(i32 noundef %9) #2
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %103
12: ; preds = %8, %4
%13 = icmp eq i32 %3, -1
%14 = zext i1 %13 to i64
%15 = tail call i32 @VM_BUG_ON(i64 noundef %14) #2
%16 = tail call i32 @page_to_pfn(ptr noundef %0) #2
%17 = load i32, ptr @MAX_ORDER, align 4, !tbaa !5
%18 = shl nsw i32 -1, %17
%19 = xor i32 %18, -1
%20 = and i32 %16, %19
%21 = zext nneg i32 %20 to i64
%22 = shl nsw i32 -1, %2
%23 = xor i32 %22, -1
%24 = and i32 %20, %23
%25 = zext nneg i32 %24 to i64
%26 = tail call i32 @VM_BUG_ON(i64 noundef %25) #2
%27 = tail call i64 @bad_range(ptr noundef %1, ptr noundef %0) #2
%28 = tail call i32 @VM_BUG_ON(i64 noundef %27) #2
%29 = load i32, ptr @MAX_ORDER, align 4, !tbaa !5
%30 = add nsw i32 %29, -1
%31 = icmp ugt i32 %30, %2
br i1 %31, label %32, label %59
32: ; preds = %12
%33 = zext i32 %2 to i64
br label %34
34: ; preds = %32, %42
%35 = phi i64 [ %33, %32 ], [ %52, %42 ]
%36 = phi ptr [ %0, %32 ], [ %51, %42 ]
%37 = phi i64 [ %21, %32 ], [ %49, %42 ]
%38 = trunc i64 %35 to i32
%39 = tail call ptr @__page_find_buddy(ptr noundef %36, i64 noundef %37, i32 noundef %38) #2
%40 = tail call i64 @page_is_buddy(ptr noundef %36, ptr noundef %39, i32 noundef %38) #2
%41 = icmp eq i64 %40, 0
br i1 %41, label %59, label %42
42: ; preds = %34
%43 = tail call i32 @list_del(ptr noundef %39) #2
%44 = load ptr, ptr %1, align 8, !tbaa !9
%45 = getelementptr inbounds %struct.TYPE_2__, ptr %44, i64 %35
%46 = load i32, ptr %45, align 8, !tbaa !12
%47 = add nsw i32 %46, -1
store i32 %47, ptr %45, align 8, !tbaa !12
%48 = tail call i32 @rmv_page_order(ptr noundef %39) #2
%49 = tail call i64 @__find_combined_index(i64 noundef %37, i32 noundef %38) #2
%50 = sub i64 %49, %37
%51 = getelementptr inbounds %struct.page, ptr %36, i64 %50
%52 = add nuw nsw i64 %35, 1
%53 = load i32, ptr @MAX_ORDER, align 4, !tbaa !5
%54 = add nsw i32 %53, -1
%55 = zext i32 %54 to i64
%56 = icmp ult i64 %52, %55
br i1 %56, label %34, label %57, !llvm.loop !14
57: ; preds = %42
%58 = trunc i64 %52 to i32
br label %59
59: ; preds = %34, %57, %12
%60 = phi i64 [ %21, %12 ], [ %49, %57 ], [ %37, %34 ]
%61 = phi i32 [ %2, %12 ], [ %58, %57 ], [ %38, %34 ]
%62 = phi ptr [ %0, %12 ], [ %51, %57 ], [ %36, %34 ]
%63 = phi ptr [ undef, %12 ], [ %39, %57 ], [ %39, %34 ]
%64 = tail call i32 @set_page_order(ptr noundef %62, i32 noundef %61) #2
%65 = load i32, ptr @MAX_ORDER, align 4, !tbaa !5
%66 = add nsw i32 %65, -2
%67 = icmp ult i32 %61, %66
br i1 %67, label %68, label %89
68: ; preds = %59
%69 = tail call i32 @page_to_pfn(ptr noundef %63) #2
%70 = tail call i64 @pfn_valid_within(i32 noundef %69) #2
%71 = icmp eq i64 %70, 0
br i1 %71, label %89, label %72
72: ; preds = %68
%73 = tail call i64 @__find_combined_index(i64 noundef %60, i32 noundef %61) #2
%74 = getelementptr inbounds %struct.page, ptr %62, i64 %73
%75 = sub i64 0, %60
%76 = getelementptr inbounds %struct.page, ptr %74, i64 %75
%77 = add nuw i32 %61, 1
%78 = tail call ptr @__page_find_buddy(ptr noundef %76, i64 noundef %73, i32 noundef %77) #2
%79 = tail call i64 @page_is_buddy(ptr noundef %76, ptr noundef %78, i32 noundef %77) #2
%80 = icmp eq i64 %79, 0
br i1 %80, label %89, label %81
81: ; preds = %72
%82 = load ptr, ptr %1, align 8, !tbaa !9
%83 = zext i32 %61 to i64
%84 = getelementptr inbounds %struct.TYPE_2__, ptr %82, i64 %83, i32 1
%85 = load ptr, ptr %84, align 8, !tbaa !16
%86 = sext i32 %3 to i64
%87 = getelementptr inbounds i32, ptr %85, i64 %86
%88 = tail call i32 @list_add_tail(ptr noundef %62, ptr noundef %87) #2
br label %97
89: ; preds = %72, %68, %59
%90 = load ptr, ptr %1, align 8, !tbaa !9
%91 = zext i32 %61 to i64
%92 = getelementptr inbounds %struct.TYPE_2__, ptr %90, i64 %91, i32 1
%93 = load ptr, ptr %92, align 8, !tbaa !16
%94 = sext i32 %3 to i64
%95 = getelementptr inbounds i32, ptr %93, i64 %94
%96 = tail call i32 @list_add(ptr noundef %62, ptr noundef %95) #2
br label %97
97: ; preds = %81, %89
%98 = phi i64 [ %83, %81 ], [ %91, %89 ]
%99 = load ptr, ptr %1, align 8, !tbaa !9
%100 = getelementptr inbounds %struct.TYPE_2__, ptr %99, i64 %98
%101 = load i32, ptr %100, align 8, !tbaa !12
%102 = add nsw i32 %101, 1
store i32 %102, ptr %100, align 8, !tbaa !12
br label %103
103: ; preds = %8, %97
ret void
}
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i32 @PageCompound(ptr noundef) local_unnamed_addr #1
declare i32 @destroy_compound_page(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @VM_BUG_ON(i64 noundef) local_unnamed_addr #1
declare i32 @page_to_pfn(ptr noundef) local_unnamed_addr #1
declare i64 @bad_range(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @__page_find_buddy(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @page_is_buddy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @list_del(ptr noundef) local_unnamed_addr #1
declare i32 @rmv_page_order(ptr noundef) local_unnamed_addr #1
declare i64 @__find_combined_index(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_page_order(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @pfn_valid_within(i32 noundef) local_unnamed_addr #1
declare i32 @list_add_tail(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @list_add(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"zone", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"TYPE_2__", !6, i64 0, !11, i64 8}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!13, !11, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/mm/extr_page_alloc.c___free_one_page.c'
source_filename = "AnghaBench/fastsocket/kernel/mm/extr_page_alloc.c___free_one_page.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32, ptr }
%struct.page = type { i32 }
@MAX_ORDER = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @__free_one_page], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @__free_one_page(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = tail call i32 @PageCompound(ptr noundef %0) #2
%6 = tail call i64 @unlikely(i32 noundef %5) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %4
%9 = tail call i32 @destroy_compound_page(ptr noundef %0, i32 noundef %2) #2
%10 = tail call i64 @unlikely(i32 noundef %9) #2
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %103
12: ; preds = %8, %4
%13 = icmp eq i32 %3, -1
%14 = zext i1 %13 to i64
%15 = tail call i32 @VM_BUG_ON(i64 noundef %14) #2
%16 = tail call i32 @page_to_pfn(ptr noundef %0) #2
%17 = load i32, ptr @MAX_ORDER, align 4, !tbaa !6
%18 = shl nsw i32 -1, %17
%19 = xor i32 %18, -1
%20 = and i32 %16, %19
%21 = zext nneg i32 %20 to i64
%22 = shl nsw i32 -1, %2
%23 = xor i32 %22, -1
%24 = and i32 %20, %23
%25 = zext nneg i32 %24 to i64
%26 = tail call i32 @VM_BUG_ON(i64 noundef %25) #2
%27 = tail call i64 @bad_range(ptr noundef %1, ptr noundef %0) #2
%28 = tail call i32 @VM_BUG_ON(i64 noundef %27) #2
%29 = load i32, ptr @MAX_ORDER, align 4, !tbaa !6
%30 = add nsw i32 %29, -1
%31 = icmp ugt i32 %30, %2
br i1 %31, label %32, label %59
32: ; preds = %12
%33 = zext i32 %2 to i64
br label %34
34: ; preds = %32, %42
%35 = phi i64 [ %33, %32 ], [ %52, %42 ]
%36 = phi ptr [ %0, %32 ], [ %51, %42 ]
%37 = phi i64 [ %21, %32 ], [ %49, %42 ]
%38 = trunc nuw i64 %35 to i32
%39 = tail call ptr @__page_find_buddy(ptr noundef %36, i64 noundef %37, i32 noundef %38) #2
%40 = tail call i64 @page_is_buddy(ptr noundef %36, ptr noundef %39, i32 noundef %38) #2
%41 = icmp eq i64 %40, 0
br i1 %41, label %59, label %42
42: ; preds = %34
%43 = tail call i32 @list_del(ptr noundef %39) #2
%44 = load ptr, ptr %1, align 8, !tbaa !10
%45 = getelementptr inbounds %struct.TYPE_2__, ptr %44, i64 %35
%46 = load i32, ptr %45, align 8, !tbaa !13
%47 = add nsw i32 %46, -1
store i32 %47, ptr %45, align 8, !tbaa !13
%48 = tail call i32 @rmv_page_order(ptr noundef %39) #2
%49 = tail call i64 @__find_combined_index(i64 noundef %37, i32 noundef %38) #2
%50 = sub i64 %49, %37
%51 = getelementptr inbounds %struct.page, ptr %36, i64 %50
%52 = add nuw nsw i64 %35, 1
%53 = load i32, ptr @MAX_ORDER, align 4, !tbaa !6
%54 = add nsw i32 %53, -1
%55 = zext i32 %54 to i64
%56 = icmp ult i64 %52, %55
br i1 %56, label %34, label %57, !llvm.loop !15
57: ; preds = %42
%58 = trunc i64 %52 to i32
br label %59
59: ; preds = %34, %57, %12
%60 = phi i64 [ %21, %12 ], [ %49, %57 ], [ %37, %34 ]
%61 = phi i32 [ %2, %12 ], [ %58, %57 ], [ %38, %34 ]
%62 = phi ptr [ %0, %12 ], [ %51, %57 ], [ %36, %34 ]
%63 = phi ptr [ undef, %12 ], [ %39, %57 ], [ %39, %34 ]
%64 = tail call i32 @set_page_order(ptr noundef %62, i32 noundef %61) #2
%65 = load i32, ptr @MAX_ORDER, align 4, !tbaa !6
%66 = add nsw i32 %65, -2
%67 = icmp ult i32 %61, %66
br i1 %67, label %68, label %89
68: ; preds = %59
%69 = tail call i32 @page_to_pfn(ptr noundef %63) #2
%70 = tail call i64 @pfn_valid_within(i32 noundef %69) #2
%71 = icmp eq i64 %70, 0
br i1 %71, label %89, label %72
72: ; preds = %68
%73 = tail call i64 @__find_combined_index(i64 noundef %60, i32 noundef %61) #2
%74 = getelementptr inbounds %struct.page, ptr %62, i64 %73
%75 = sub i64 0, %60
%76 = getelementptr inbounds %struct.page, ptr %74, i64 %75
%77 = add nuw i32 %61, 1
%78 = tail call ptr @__page_find_buddy(ptr noundef %76, i64 noundef %73, i32 noundef %77) #2
%79 = tail call i64 @page_is_buddy(ptr noundef %76, ptr noundef %78, i32 noundef %77) #2
%80 = icmp eq i64 %79, 0
br i1 %80, label %89, label %81
81: ; preds = %72
%82 = load ptr, ptr %1, align 8, !tbaa !10
%83 = zext i32 %61 to i64
%84 = getelementptr inbounds %struct.TYPE_2__, ptr %82, i64 %83, i32 1
%85 = load ptr, ptr %84, align 8, !tbaa !17
%86 = sext i32 %3 to i64
%87 = getelementptr inbounds i32, ptr %85, i64 %86
%88 = tail call i32 @list_add_tail(ptr noundef %62, ptr noundef %87) #2
br label %97
89: ; preds = %72, %68, %59
%90 = load ptr, ptr %1, align 8, !tbaa !10
%91 = zext i32 %61 to i64
%92 = getelementptr inbounds %struct.TYPE_2__, ptr %90, i64 %91, i32 1
%93 = load ptr, ptr %92, align 8, !tbaa !17
%94 = sext i32 %3 to i64
%95 = getelementptr inbounds i32, ptr %93, i64 %94
%96 = tail call i32 @list_add(ptr noundef %62, ptr noundef %95) #2
br label %97
97: ; preds = %81, %89
%98 = phi i64 [ %83, %81 ], [ %91, %89 ]
%99 = load ptr, ptr %1, align 8, !tbaa !10
%100 = getelementptr inbounds %struct.TYPE_2__, ptr %99, i64 %98
%101 = load i32, ptr %100, align 8, !tbaa !13
%102 = add nsw i32 %101, 1
store i32 %102, ptr %100, align 8, !tbaa !13
br label %103
103: ; preds = %8, %97
ret void
}
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i32 @PageCompound(ptr noundef) local_unnamed_addr #1
declare i32 @destroy_compound_page(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @VM_BUG_ON(i64 noundef) local_unnamed_addr #1
declare i32 @page_to_pfn(ptr noundef) local_unnamed_addr #1
declare i64 @bad_range(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @__page_find_buddy(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @page_is_buddy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @list_del(ptr noundef) local_unnamed_addr #1
declare i32 @rmv_page_order(ptr noundef) local_unnamed_addr #1
declare i64 @__find_combined_index(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_page_order(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @pfn_valid_within(i32 noundef) local_unnamed_addr #1
declare i32 @list_add_tail(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @list_add(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"zone", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_2__", !7, i64 0, !12, i64 8}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!14, !12, i64 8}
| fastsocket_kernel_mm_extr_page_alloc.c___free_one_page |
; ModuleID = 'AnghaBench/systemd/src/core/extr_manager.c_manager_state.c'
source_filename = "AnghaBench/systemd/src/core/extr_manager.c_manager_state.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SPECIAL_BASIC_TARGET = dso_local local_unnamed_addr global i32 0, align 4
@MANAGER_INITIALIZING = dso_local local_unnamed_addr global i32 0, align 4
@MANAGER_STARTING = dso_local local_unnamed_addr global i32 0, align 4
@SPECIAL_SHUTDOWN_TARGET = dso_local local_unnamed_addr global i32 0, align 4
@MANAGER_STOPPING = dso_local local_unnamed_addr global i32 0, align 4
@SPECIAL_RESCUE_TARGET = dso_local local_unnamed_addr global i32 0, align 4
@MANAGER_MAINTENANCE = dso_local local_unnamed_addr global i32 0, align 4
@SPECIAL_EMERGENCY_TARGET = dso_local local_unnamed_addr global i32 0, align 4
@MANAGER_DEGRADED = dso_local local_unnamed_addr global i32 0, align 4
@MANAGER_RUNNING = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @manager_state(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @assert(ptr noundef %0) #2
%3 = tail call i32 @MANAGER_IS_FINISHED(ptr noundef %0) #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %14
5: ; preds = %1
%6 = load i32, ptr @SPECIAL_BASIC_TARGET, align 4, !tbaa !5
%7 = tail call ptr @manager_get_unit(ptr noundef %0, i32 noundef %6) #2
%8 = icmp eq ptr %7, null
br i1 %8, label %43, label %9
9: ; preds = %5
%10 = tail call i32 @unit_active_state(ptr noundef nonnull %7) #2
%11 = tail call i32 @UNIT_IS_ACTIVE_OR_RELOADING(i32 noundef %10) #2
%12 = icmp eq i32 %11, 0
%13 = select i1 %12, ptr @MANAGER_INITIALIZING, ptr @MANAGER_STARTING
br label %43
14: ; preds = %1
%15 = load i32, ptr @SPECIAL_SHUTDOWN_TARGET, align 4, !tbaa !5
%16 = tail call ptr @manager_get_unit(ptr noundef %0, i32 noundef %15) #2
%17 = icmp eq ptr %16, null
br i1 %17, label %21, label %18
18: ; preds = %14
%19 = tail call i64 @unit_active_or_pending(ptr noundef nonnull %16) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %43
21: ; preds = %18, %14
%22 = tail call i64 @MANAGER_IS_SYSTEM(ptr noundef %0) #2
%23 = icmp eq i64 %22, 0
br i1 %23, label %38, label %24
24: ; preds = %21
%25 = load i32, ptr @SPECIAL_RESCUE_TARGET, align 4, !tbaa !5
%26 = tail call ptr @manager_get_unit(ptr noundef %0, i32 noundef %25) #2
%27 = icmp eq ptr %26, null
br i1 %27, label %31, label %28
28: ; preds = %24
%29 = tail call i64 @unit_active_or_pending(ptr noundef nonnull %26) #2
%30 = icmp eq i64 %29, 0
br i1 %30, label %31, label %43
31: ; preds = %28, %24
%32 = load i32, ptr @SPECIAL_EMERGENCY_TARGET, align 4, !tbaa !5
%33 = tail call ptr @manager_get_unit(ptr noundef %0, i32 noundef %32) #2
%34 = icmp eq ptr %33, null
br i1 %34, label %38, label %35
35: ; preds = %31
%36 = tail call i64 @unit_active_or_pending(ptr noundef nonnull %33) #2
%37 = icmp eq i64 %36, 0
br i1 %37, label %38, label %43
38: ; preds = %31, %35, %21
%39 = load i32, ptr %0, align 4, !tbaa !9
%40 = tail call i64 @set_size(i32 noundef %39) #2
%41 = icmp sgt i64 %40, 0
%42 = select i1 %41, ptr @MANAGER_DEGRADED, ptr @MANAGER_RUNNING
br label %43
43: ; preds = %9, %38, %35, %28, %18, %5
%44 = phi ptr [ @MANAGER_INITIALIZING, %5 ], [ @MANAGER_STOPPING, %18 ], [ @MANAGER_MAINTENANCE, %28 ], [ @MANAGER_MAINTENANCE, %35 ], [ %42, %38 ], [ %13, %9 ]
%45 = load i32, ptr %44, align 4, !tbaa !5
ret i32 %45
}
declare i32 @assert(ptr noundef) local_unnamed_addr #1
declare i32 @MANAGER_IS_FINISHED(ptr noundef) local_unnamed_addr #1
declare ptr @manager_get_unit(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @UNIT_IS_ACTIVE_OR_RELOADING(i32 noundef) local_unnamed_addr #1
declare i32 @unit_active_state(ptr noundef) local_unnamed_addr #1
declare i64 @unit_active_or_pending(ptr noundef) local_unnamed_addr #1
declare i64 @MANAGER_IS_SYSTEM(ptr noundef) local_unnamed_addr #1
declare i64 @set_size(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_7__", !6, i64 0}
| ; ModuleID = 'AnghaBench/systemd/src/core/extr_manager.c_manager_state.c'
source_filename = "AnghaBench/systemd/src/core/extr_manager.c_manager_state.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SPECIAL_BASIC_TARGET = common local_unnamed_addr global i32 0, align 4
@MANAGER_INITIALIZING = common local_unnamed_addr global i32 0, align 4
@MANAGER_STARTING = common local_unnamed_addr global i32 0, align 4
@SPECIAL_SHUTDOWN_TARGET = common local_unnamed_addr global i32 0, align 4
@MANAGER_STOPPING = common local_unnamed_addr global i32 0, align 4
@SPECIAL_RESCUE_TARGET = common local_unnamed_addr global i32 0, align 4
@MANAGER_MAINTENANCE = common local_unnamed_addr global i32 0, align 4
@SPECIAL_EMERGENCY_TARGET = common local_unnamed_addr global i32 0, align 4
@MANAGER_DEGRADED = common local_unnamed_addr global i32 0, align 4
@MANAGER_RUNNING = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @manager_state(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @assert(ptr noundef %0) #2
%3 = tail call i32 @MANAGER_IS_FINISHED(ptr noundef %0) #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %14
5: ; preds = %1
%6 = load i32, ptr @SPECIAL_BASIC_TARGET, align 4, !tbaa !6
%7 = tail call ptr @manager_get_unit(ptr noundef %0, i32 noundef %6) #2
%8 = icmp eq ptr %7, null
br i1 %8, label %43, label %9
9: ; preds = %5
%10 = tail call i32 @unit_active_state(ptr noundef nonnull %7) #2
%11 = tail call i32 @UNIT_IS_ACTIVE_OR_RELOADING(i32 noundef %10) #2
%12 = icmp eq i32 %11, 0
%13 = select i1 %12, ptr @MANAGER_INITIALIZING, ptr @MANAGER_STARTING
br label %43
14: ; preds = %1
%15 = load i32, ptr @SPECIAL_SHUTDOWN_TARGET, align 4, !tbaa !6
%16 = tail call ptr @manager_get_unit(ptr noundef %0, i32 noundef %15) #2
%17 = icmp eq ptr %16, null
br i1 %17, label %21, label %18
18: ; preds = %14
%19 = tail call i64 @unit_active_or_pending(ptr noundef nonnull %16) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %43
21: ; preds = %18, %14
%22 = tail call i64 @MANAGER_IS_SYSTEM(ptr noundef %0) #2
%23 = icmp eq i64 %22, 0
br i1 %23, label %38, label %24
24: ; preds = %21
%25 = load i32, ptr @SPECIAL_RESCUE_TARGET, align 4, !tbaa !6
%26 = tail call ptr @manager_get_unit(ptr noundef %0, i32 noundef %25) #2
%27 = icmp eq ptr %26, null
br i1 %27, label %31, label %28
28: ; preds = %24
%29 = tail call i64 @unit_active_or_pending(ptr noundef nonnull %26) #2
%30 = icmp eq i64 %29, 0
br i1 %30, label %31, label %43
31: ; preds = %28, %24
%32 = load i32, ptr @SPECIAL_EMERGENCY_TARGET, align 4, !tbaa !6
%33 = tail call ptr @manager_get_unit(ptr noundef %0, i32 noundef %32) #2
%34 = icmp eq ptr %33, null
br i1 %34, label %38, label %35
35: ; preds = %31
%36 = tail call i64 @unit_active_or_pending(ptr noundef nonnull %33) #2
%37 = icmp eq i64 %36, 0
br i1 %37, label %38, label %43
38: ; preds = %31, %35, %21
%39 = load i32, ptr %0, align 4, !tbaa !10
%40 = tail call i64 @set_size(i32 noundef %39) #2
%41 = icmp sgt i64 %40, 0
%42 = select i1 %41, ptr @MANAGER_DEGRADED, ptr @MANAGER_RUNNING
br label %43
43: ; preds = %9, %38, %35, %28, %18, %5
%44 = phi ptr [ @MANAGER_INITIALIZING, %5 ], [ @MANAGER_STOPPING, %18 ], [ @MANAGER_MAINTENANCE, %28 ], [ @MANAGER_MAINTENANCE, %35 ], [ %42, %38 ], [ %13, %9 ]
%45 = load i32, ptr %44, align 4, !tbaa !6
ret i32 %45
}
declare i32 @assert(ptr noundef) local_unnamed_addr #1
declare i32 @MANAGER_IS_FINISHED(ptr noundef) local_unnamed_addr #1
declare ptr @manager_get_unit(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @UNIT_IS_ACTIVE_OR_RELOADING(i32 noundef) local_unnamed_addr #1
declare i32 @unit_active_state(ptr noundef) local_unnamed_addr #1
declare i64 @unit_active_or_pending(ptr noundef) local_unnamed_addr #1
declare i64 @MANAGER_IS_SYSTEM(ptr noundef) local_unnamed_addr #1
declare i64 @set_size(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_7__", !7, i64 0}
| systemd_src_core_extr_manager.c_manager_state |
; ModuleID = 'AnghaBench/linux/tools/testing/selftests/kvm/lib/extr_kvm_util.c_kvm_memcmp_hva_gva.c'
source_filename = "AnghaBench/linux/tools/testing/selftests/kvm/lib/extr_kvm_util.c_kvm_memcmp_hva_gva.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.kvm_vm = type { i64, i64 }
; Function Attrs: nounwind uwtable
define dso_local i32 @kvm_memcmp_hva_gva(ptr noundef %0, ptr noundef %1, i64 noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = icmp eq i64 %3, 0
br i1 %5, label %57, label %6
6: ; preds = %4
%7 = ptrtoint ptr %0 to i64
%8 = add i64 %7, %3
%9 = getelementptr inbounds %struct.kvm_vm, ptr %1, i64 0, i32 1
br label %13
10: ; preds = %37
%11 = add i64 %38, %14
%12 = icmp ult i64 %11, %3
br i1 %12, label %13, label %57, !llvm.loop !5
13: ; preds = %6, %10
%14 = phi i64 [ 0, %6 ], [ %11, %10 ]
%15 = add i64 %14, %7
%16 = add i64 %14, %2
%17 = tail call i64 @addr_gva2hva(ptr noundef %1, i64 noundef %16) #3
%18 = sub i64 %3, %14
%19 = load i64, ptr %1, align 8, !tbaa !7
%20 = lshr i64 %15, %19
%21 = lshr i64 %8, %19
%22 = icmp eq i64 %20, %21
br i1 %22, label %27, label %23
23: ; preds = %13
%24 = load i64, ptr %9, align 8, !tbaa !12
%25 = urem i64 %15, %24
%26 = sub i64 %24, %25
br label %27
27: ; preds = %23, %13
%28 = phi i64 [ %26, %23 ], [ %18, %13 ]
%29 = lshr i64 %17, %19
%30 = add i64 %28, %17
%31 = lshr i64 %30, %19
%32 = icmp eq i64 %29, %31
br i1 %32, label %37, label %33
33: ; preds = %27
%34 = load i64, ptr %9, align 8, !tbaa !12
%35 = urem i64 %17, %34
%36 = sub i64 %34, %35
br label %37
37: ; preds = %33, %27
%38 = phi i64 [ %36, %33 ], [ %28, %27 ]
%39 = add i64 %15, -1
%40 = add i64 %39, %38
%41 = lshr i64 %40, %19
%42 = icmp eq i64 %20, %41
%43 = zext i1 %42 to i32
%44 = tail call i32 @assert(i32 noundef %43) #3
%45 = load i64, ptr %1, align 8, !tbaa !7
%46 = lshr i64 %17, %45
%47 = add i64 %17, -1
%48 = add i64 %47, %38
%49 = lshr i64 %48, %45
%50 = icmp eq i64 %46, %49
%51 = zext i1 %50 to i32
%52 = tail call i32 @assert(i32 noundef %51) #3
%53 = inttoptr i64 %15 to ptr
%54 = inttoptr i64 %17 to ptr
%55 = tail call i32 @memcmp(ptr noundef %53, ptr noundef %54, i64 noundef %38)
%56 = icmp eq i32 %55, 0
br i1 %56, label %10, label %57
57: ; preds = %37, %10, %4
%58 = phi i32 [ 0, %4 ], [ 0, %10 ], [ %55, %37 ]
ret i32 %58
}
declare i64 @addr_gva2hva(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @assert(i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @memcmp(ptr nocapture noundef, ptr nocapture noundef, i64 noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !9, i64 0}
!8 = !{!"kvm_vm", !9, i64 0, !9, i64 8}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!8, !9, i64 8}
| ; ModuleID = 'AnghaBench/linux/tools/testing/selftests/kvm/lib/extr_kvm_util.c_kvm_memcmp_hva_gva.c'
source_filename = "AnghaBench/linux/tools/testing/selftests/kvm/lib/extr_kvm_util.c_kvm_memcmp_hva_gva.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @kvm_memcmp_hva_gva(ptr noundef %0, ptr noundef %1, i64 noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = icmp eq i64 %3, 0
br i1 %5, label %57, label %6
6: ; preds = %4
%7 = ptrtoint ptr %0 to i64
%8 = add i64 %7, %3
%9 = getelementptr inbounds i8, ptr %1, i64 8
br label %13
10: ; preds = %37
%11 = add i64 %38, %14
%12 = icmp ult i64 %11, %3
br i1 %12, label %13, label %57, !llvm.loop !6
13: ; preds = %6, %10
%14 = phi i64 [ 0, %6 ], [ %11, %10 ]
%15 = add i64 %14, %7
%16 = add i64 %14, %2
%17 = tail call i64 @addr_gva2hva(ptr noundef %1, i64 noundef %16) #3
%18 = sub i64 %3, %14
%19 = load i64, ptr %1, align 8, !tbaa !8
%20 = lshr i64 %15, %19
%21 = lshr i64 %8, %19
%22 = icmp eq i64 %20, %21
br i1 %22, label %27, label %23
23: ; preds = %13
%24 = load i64, ptr %9, align 8, !tbaa !13
%25 = urem i64 %15, %24
%26 = sub i64 %24, %25
br label %27
27: ; preds = %23, %13
%28 = phi i64 [ %26, %23 ], [ %18, %13 ]
%29 = lshr i64 %17, %19
%30 = add i64 %28, %17
%31 = lshr i64 %30, %19
%32 = icmp eq i64 %29, %31
br i1 %32, label %37, label %33
33: ; preds = %27
%34 = load i64, ptr %9, align 8, !tbaa !13
%35 = urem i64 %17, %34
%36 = sub i64 %34, %35
br label %37
37: ; preds = %33, %27
%38 = phi i64 [ %36, %33 ], [ %28, %27 ]
%39 = add i64 %15, -1
%40 = add i64 %39, %38
%41 = lshr i64 %40, %19
%42 = icmp eq i64 %20, %41
%43 = zext i1 %42 to i32
%44 = tail call i32 @assert(i32 noundef %43) #3
%45 = load i64, ptr %1, align 8, !tbaa !8
%46 = lshr i64 %17, %45
%47 = add i64 %17, -1
%48 = add i64 %47, %38
%49 = lshr i64 %48, %45
%50 = icmp eq i64 %46, %49
%51 = zext i1 %50 to i32
%52 = tail call i32 @assert(i32 noundef %51) #3
%53 = inttoptr i64 %15 to ptr
%54 = inttoptr i64 %17 to ptr
%55 = tail call i32 @memcmp(ptr noundef %53, ptr noundef %54, i64 noundef %38)
%56 = icmp eq i32 %55, 0
br i1 %56, label %10, label %57
57: ; preds = %37, %10, %4
%58 = phi i32 [ 0, %4 ], [ 0, %10 ], [ %55, %37 ]
ret i32 %58
}
declare i64 @addr_gva2hva(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @assert(i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @memcmp(ptr nocapture noundef, ptr nocapture noundef, i64 noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = distinct !{!6, !7}
!7 = !{!"llvm.loop.mustprogress"}
!8 = !{!9, !10, i64 0}
!9 = !{!"kvm_vm", !10, i64 0, !10, i64 8}
!10 = !{!"long", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C/C++ TBAA"}
!13 = !{!9, !10, i64 8}
| linux_tools_testing_selftests_kvm_lib_extr_kvm_util.c_kvm_memcmp_hva_gva |
; ModuleID = 'AnghaBench/reactos/dll/win32/msi/extr_where.c_add_to_array.c'
source_filename = "AnghaBench/reactos/dll/win32/msi/extr_where.c_add_to_array.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @add_to_array], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable
define internal void @add_to_array(ptr nocapture noundef %0, ptr noundef %1) #0 {
br label %3
3: ; preds = %3, %2
%4 = phi ptr [ %0, %2 ], [ %9, %3 ]
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = icmp eq ptr %5, null
%7 = icmp eq ptr %5, %1
%8 = or i1 %6, %7
%9 = getelementptr inbounds ptr, ptr %4, i64 1
br i1 %8, label %10, label %3, !llvm.loop !9
10: ; preds = %3
br i1 %6, label %11, label %12
11: ; preds = %10
store ptr %1, ptr %4, align 8, !tbaa !5
br label %12
12: ; preds = %11, %10
ret void
}
attributes #0 = { nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/reactos/dll/win32/msi/extr_where.c_add_to_array.c'
source_filename = "AnghaBench/reactos/dll/win32/msi/extr_where.c_add_to_array.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @add_to_array], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @add_to_array(ptr nocapture noundef %0, ptr noundef %1) #0 {
br label %3
3: ; preds = %3, %2
%4 = phi ptr [ %0, %2 ], [ %9, %3 ]
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = icmp eq ptr %5, null
%7 = icmp eq ptr %5, %1
%8 = or i1 %6, %7
%9 = getelementptr inbounds i8, ptr %4, i64 8
br i1 %8, label %10, label %3, !llvm.loop !10
10: ; preds = %3
br i1 %6, label %11, label %12
11: ; preds = %10
store ptr %1, ptr %4, align 8, !tbaa !6
br label %12
12: ; preds = %11, %10
ret void
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| reactos_dll_win32_msi_extr_where.c_add_to_array |
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/rsa/extr_rsa_lib.c_RSA_get0_engine.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/rsa/extr_rsa_lib.c_RSA_get0_engine.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define dso_local ptr @RSA_get0_engine(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/rsa/extr_rsa_lib.c_RSA_get0_engine.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/rsa/extr_rsa_lib.c_RSA_get0_engine.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define ptr @RSA_get0_engine(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_crypto_openssl_crypto_rsa_extr_rsa_lib.c_RSA_get0_engine |
; ModuleID = 'AnghaBench/git/compat/win32/extr_syslog.c_openlog.c'
source_filename = "AnghaBench/git/compat/win32/extr_syslog.c_openlog.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ms_eventlog = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [34 x i8] c"RegisterEventSource() failed: %lu\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @openlog(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i64, ptr @ms_eventlog, align 8, !tbaa !5
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = tail call i64 @RegisterEventSourceA(ptr noundef null, ptr noundef %0) #2
store i64 %7, ptr @ms_eventlog, align 8, !tbaa !5
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = tail call i32 (...) @GetLastError() #2
%11 = tail call i32 @warning(ptr noundef nonnull @.str, i32 noundef %10) #2
br label %12
12: ; preds = %3, %9, %6
ret void
}
declare i64 @RegisterEventSourceA(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @warning(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @GetLastError(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/git/compat/win32/extr_syslog.c_openlog.c'
source_filename = "AnghaBench/git/compat/win32/extr_syslog.c_openlog.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ms_eventlog = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [34 x i8] c"RegisterEventSource() failed: %lu\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @openlog(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i64, ptr @ms_eventlog, align 8, !tbaa !6
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = tail call i64 @RegisterEventSourceA(ptr noundef null, ptr noundef %0) #2
store i64 %7, ptr @ms_eventlog, align 8, !tbaa !6
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = tail call i32 @GetLastError() #2
%11 = tail call i32 @warning(ptr noundef nonnull @.str, i32 noundef %10) #2
br label %12
12: ; preds = %3, %9, %6
ret void
}
declare i64 @RegisterEventSourceA(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @warning(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @GetLastError(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| git_compat_win32_extr_syslog.c_openlog |
; ModuleID = 'AnghaBench/lab/engine/code/qcommon/extr_q_math.c__VectorScale.c'
source_filename = "AnghaBench/lab/engine/code/qcommon/extr_q_math.c__VectorScale.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local void @_VectorScale(ptr nocapture noundef readonly %0, i32 noundef %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
%4 = load i32, ptr %0, align 4, !tbaa !5
%5 = mul nsw i32 %4, %1
store i32 %5, ptr %2, align 4, !tbaa !5
%6 = getelementptr inbounds i32, ptr %0, i64 1
%7 = load i32, ptr %6, align 4, !tbaa !5
%8 = mul nsw i32 %7, %1
%9 = getelementptr inbounds i32, ptr %2, i64 1
store i32 %8, ptr %9, align 4, !tbaa !5
%10 = getelementptr inbounds i32, ptr %0, i64 2
%11 = load i32, ptr %10, align 4, !tbaa !5
%12 = mul nsw i32 %11, %1
%13 = getelementptr inbounds i32, ptr %2, i64 2
store i32 %12, ptr %13, align 4, !tbaa !5
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/lab/engine/code/qcommon/extr_q_math.c__VectorScale.c'
source_filename = "AnghaBench/lab/engine/code/qcommon/extr_q_math.c__VectorScale.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync)
define void @_VectorScale(ptr nocapture noundef readonly %0, i32 noundef %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
%4 = load i32, ptr %0, align 4, !tbaa !6
%5 = mul nsw i32 %4, %1
store i32 %5, ptr %2, align 4, !tbaa !6
%6 = getelementptr inbounds i8, ptr %0, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !6
%8 = mul nsw i32 %7, %1
%9 = getelementptr inbounds i8, ptr %2, i64 4
store i32 %8, ptr %9, align 4, !tbaa !6
%10 = getelementptr inbounds i8, ptr %0, i64 8
%11 = load i32, ptr %10, align 4, !tbaa !6
%12 = mul nsw i32 %11, %1
%13 = getelementptr inbounds i8, ptr %2, i64 8
store i32 %12, ptr %13, align 4, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| lab_engine_code_qcommon_extr_q_math.c__VectorScale |
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/drivers/extr_dummy.c_alloc_fake_buffer.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/drivers/extr_dummy.c_alloc_fake_buffer.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@fake_buffer = dso_local local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@dummy_page = dso_local local_unnamed_addr global ptr null, align 8
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @alloc_fake_buffer], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @alloc_fake_buffer() #0 {
%1 = load i32, ptr @fake_buffer, align 4, !tbaa !5
%2 = icmp eq i32 %1, 0
br i1 %2, label %22, label %3
3: ; preds = %0
%4 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%5 = tail call i64 @get_zeroed_page(i32 noundef %4) #2
%6 = inttoptr i64 %5 to ptr
%7 = load ptr, ptr @dummy_page, align 8, !tbaa !9
store ptr %6, ptr %7, align 8, !tbaa !9
%8 = load ptr, ptr @dummy_page, align 8, !tbaa !9
%9 = load ptr, ptr %8, align 8, !tbaa !9
%10 = icmp eq ptr %9, null
br i1 %10, label %18, label %11
11: ; preds = %3
%12 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%13 = tail call i64 @get_zeroed_page(i32 noundef %12) #2
%14 = inttoptr i64 %13 to ptr
%15 = load ptr, ptr @dummy_page, align 8, !tbaa !9
%16 = getelementptr inbounds ptr, ptr %15, i64 1
store ptr %14, ptr %16, align 8, !tbaa !9
%17 = icmp eq i64 %13, 0
br i1 %17, label %18, label %22
18: ; preds = %11, %3
%19 = tail call i32 (...) @free_fake_buffer() #2
%20 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%21 = sub nsw i32 0, %20
br label %22
22: ; preds = %11, %0, %18
%23 = phi i32 [ %21, %18 ], [ 0, %0 ], [ 0, %11 ]
ret i32 %23
}
declare i64 @get_zeroed_page(i32 noundef) local_unnamed_addr #1
declare i32 @free_fake_buffer(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/sound/drivers/extr_dummy.c_alloc_fake_buffer.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/drivers/extr_dummy.c_alloc_fake_buffer.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@fake_buffer = common local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@dummy_page = common local_unnamed_addr global ptr null, align 8
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @alloc_fake_buffer], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @alloc_fake_buffer() #0 {
%1 = load i32, ptr @fake_buffer, align 4, !tbaa !6
%2 = icmp eq i32 %1, 0
br i1 %2, label %22, label %3
3: ; preds = %0
%4 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%5 = tail call i64 @get_zeroed_page(i32 noundef %4) #2
%6 = inttoptr i64 %5 to ptr
%7 = load ptr, ptr @dummy_page, align 8, !tbaa !10
store ptr %6, ptr %7, align 8, !tbaa !10
%8 = load ptr, ptr @dummy_page, align 8, !tbaa !10
%9 = load ptr, ptr %8, align 8, !tbaa !10
%10 = icmp eq ptr %9, null
br i1 %10, label %18, label %11
11: ; preds = %3
%12 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%13 = tail call i64 @get_zeroed_page(i32 noundef %12) #2
%14 = inttoptr i64 %13 to ptr
%15 = load ptr, ptr @dummy_page, align 8, !tbaa !10
%16 = getelementptr inbounds i8, ptr %15, i64 8
store ptr %14, ptr %16, align 8, !tbaa !10
%17 = icmp eq i64 %13, 0
br i1 %17, label %18, label %22
18: ; preds = %11, %3
%19 = tail call i32 @free_fake_buffer() #2
%20 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%21 = sub nsw i32 0, %20
br label %22
22: ; preds = %11, %0, %18
%23 = phi i32 [ %21, %18 ], [ 0, %0 ], [ 0, %11 ]
ret i32 %23
}
declare i64 @get_zeroed_page(i32 noundef) local_unnamed_addr #1
declare i32 @free_fake_buffer(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
| fastsocket_kernel_sound_drivers_extr_dummy.c_alloc_fake_buffer |
; ModuleID = 'AnghaBench/freebsd/contrib/unbound/services/extr_authzone.c_xfr_create_ixfr_packet.c'
source_filename = "AnghaBench/freebsd/contrib/unbound/services/extr_authzone.c_xfr_create_ixfr_packet.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.query_info = type { i64, i32, i32, i32 }
%struct.auth_xfer = type { i32, i32, ptr, i32, i32, i32 }
%struct.TYPE_2__ = type { i32, i64, i64, i64, i64, i64 }
@LDNS_RR_TYPE_IXFR = dso_local local_unnamed_addr global i64 0, align 8
@LDNS_RR_TYPE_AXFR = dso_local local_unnamed_addr global i64 0, align 8
@LDNS_NSCOUNT_OFF = dso_local local_unnamed_addr global i32 0, align 4
@LDNS_RR_TYPE_SOA = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @xfr_create_ixfr_packet], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @xfr_create_ixfr_packet(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2, ptr nocapture noundef readonly %3) #0 {
%5 = alloca %struct.query_info, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #4
%6 = load i32, ptr %0, align 8, !tbaa !5
%7 = getelementptr inbounds %struct.auth_xfer, ptr %0, i64 0, i32 5
%8 = load i32, ptr %7, align 8, !tbaa !11
%9 = call i32 @memset(ptr noundef nonnull %5, i32 noundef 0, i32 noundef 24) #4
%10 = getelementptr inbounds %struct.auth_xfer, ptr %0, i64 0, i32 3
%11 = getelementptr inbounds %struct.query_info, ptr %5, i64 0, i32 2
%12 = load <2 x i32>, ptr %10, align 8, !tbaa !12
store <2 x i32> %12, ptr %11, align 4, !tbaa !12
%13 = getelementptr inbounds %struct.auth_xfer, ptr %0, i64 0, i32 2
%14 = load ptr, ptr %13, align 8, !tbaa !13
%15 = getelementptr inbounds %struct.TYPE_2__, ptr %14, i64 0, i32 2
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %15, i8 0, i64 32, i1 false)
store i32 1, ptr %14, align 8, !tbaa !14
%16 = load i64, ptr @LDNS_RR_TYPE_IXFR, align 8, !tbaa !17
store i64 %16, ptr %5, align 8, !tbaa !18
%17 = icmp eq i32 %6, 0
br i1 %17, label %25, label %18
18: ; preds = %4
%19 = getelementptr inbounds %struct.TYPE_2__, ptr %14, i64 0, i32 1
%20 = load i64, ptr %19, align 8, !tbaa !20
%21 = icmp eq i64 %20, 0
br i1 %21, label %22, label %25
22: ; preds = %18
%23 = load i32, ptr %3, align 4, !tbaa !21
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %28
25: ; preds = %22, %18, %4
%26 = load i64, ptr @LDNS_RR_TYPE_AXFR, align 8, !tbaa !17
store i64 %26, ptr %5, align 8, !tbaa !18
%27 = getelementptr inbounds %struct.TYPE_2__, ptr %14, i64 0, i32 1
store i64 0, ptr %27, align 8, !tbaa !20
store i32 0, ptr %14, align 8, !tbaa !14
br label %28
28: ; preds = %25, %22
%29 = getelementptr inbounds %struct.auth_xfer, ptr %0, i64 0, i32 1
%30 = load i32, ptr %29, align 4, !tbaa !23
%31 = getelementptr inbounds %struct.query_info, ptr %5, i64 0, i32 1
store i32 %30, ptr %31, align 8, !tbaa !24
%32 = call i32 @qinfo_query_encode(ptr noundef %1, ptr noundef nonnull %5) #4
%33 = call i32 @sldns_buffer_write_u16_at(ptr noundef %1, i32 noundef 0, i32 noundef %2) #4
%34 = load i64, ptr %5, align 8, !tbaa !18
%35 = load i64, ptr @LDNS_RR_TYPE_IXFR, align 8, !tbaa !17
%36 = icmp eq i64 %34, %35
br i1 %36, label %37, label %59
37: ; preds = %28
%38 = call i64 @sldns_buffer_limit(ptr noundef %1) #4
%39 = call i32 @sldns_buffer_clear(ptr noundef %1) #4
%40 = call i32 @sldns_buffer_set_position(ptr noundef %1, i64 noundef %38) #4
%41 = load i32, ptr @LDNS_NSCOUNT_OFF, align 4, !tbaa !12
%42 = call i32 @sldns_buffer_write_u16_at(ptr noundef %1, i32 noundef %41, i32 noundef 1) #4
%43 = call i32 @sldns_buffer_write_u8(ptr noundef %1, i32 noundef 192) #4
%44 = call i32 @sldns_buffer_write_u8(ptr noundef %1, i32 noundef 12) #4
%45 = load i32, ptr @LDNS_RR_TYPE_SOA, align 4, !tbaa !12
%46 = call i32 @sldns_buffer_write_u16(ptr noundef %1, i32 noundef %45) #4
%47 = load i32, ptr %31, align 8, !tbaa !24
%48 = call i32 @sldns_buffer_write_u16(ptr noundef %1, i32 noundef %47) #4
%49 = call i32 @sldns_buffer_write_u32(ptr noundef %1, i32 noundef 0) #4
%50 = call i32 @sldns_buffer_write_u16(ptr noundef %1, i32 noundef 22) #4
%51 = call i32 @sldns_buffer_write_u8(ptr noundef %1, i32 noundef 0) #4
%52 = call i32 @sldns_buffer_write_u8(ptr noundef %1, i32 noundef 0) #4
%53 = call i32 @sldns_buffer_write_u32(ptr noundef %1, i32 noundef %8) #4
%54 = call i32 @sldns_buffer_write_u32(ptr noundef %1, i32 noundef 0) #4
%55 = call i32 @sldns_buffer_write_u32(ptr noundef %1, i32 noundef 0) #4
%56 = call i32 @sldns_buffer_write_u32(ptr noundef %1, i32 noundef 0) #4
%57 = call i32 @sldns_buffer_write_u32(ptr noundef %1, i32 noundef 0) #4
%58 = call i32 @sldns_buffer_flip(ptr noundef %1) #4
br label %59
59: ; preds = %37, %28
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #4
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @qinfo_query_encode(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sldns_buffer_write_u16_at(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @sldns_buffer_limit(ptr noundef) local_unnamed_addr #2
declare i32 @sldns_buffer_clear(ptr noundef) local_unnamed_addr #2
declare i32 @sldns_buffer_set_position(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @sldns_buffer_write_u8(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @sldns_buffer_write_u16(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @sldns_buffer_write_u32(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @sldns_buffer_flip(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"auth_xfer", !7, i64 0, !7, i64 4, !10, i64 8, !7, i64 16, !7, i64 20, !7, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 24}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !10, i64 8}
!14 = !{!15, !7, i64 0}
!15 = !{!"TYPE_2__", !7, i64 0, !16, i64 8, !16, i64 16, !16, i64 24, !16, i64 32, !16, i64 40}
!16 = !{!"long", !8, i64 0}
!17 = !{!16, !16, i64 0}
!18 = !{!19, !16, i64 0}
!19 = !{!"query_info", !16, i64 0, !7, i64 8, !7, i64 12, !7, i64 16}
!20 = !{!15, !16, i64 8}
!21 = !{!22, !7, i64 0}
!22 = !{!"auth_master", !7, i64 0}
!23 = !{!6, !7, i64 4}
!24 = !{!19, !7, i64 8}
| ; ModuleID = 'AnghaBench/freebsd/contrib/unbound/services/extr_authzone.c_xfr_create_ixfr_packet.c'
source_filename = "AnghaBench/freebsd/contrib/unbound/services/extr_authzone.c_xfr_create_ixfr_packet.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.query_info = type { i64, i32, i32, i32 }
@LDNS_RR_TYPE_IXFR = common local_unnamed_addr global i64 0, align 8
@LDNS_RR_TYPE_AXFR = common local_unnamed_addr global i64 0, align 8
@LDNS_NSCOUNT_OFF = common local_unnamed_addr global i32 0, align 4
@LDNS_RR_TYPE_SOA = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @xfr_create_ixfr_packet], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @xfr_create_ixfr_packet(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2, ptr nocapture noundef readonly %3) #0 {
%5 = alloca %struct.query_info, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #4
%6 = load i32, ptr %0, align 8, !tbaa !6
%7 = getelementptr inbounds i8, ptr %0, i64 24
%8 = load i32, ptr %7, align 8, !tbaa !12
%9 = call i32 @memset(ptr noundef nonnull %5, i32 noundef 0, i32 noundef 24) #4
%10 = getelementptr inbounds i8, ptr %0, i64 16
%11 = getelementptr inbounds i8, ptr %5, i64 12
%12 = load <2 x i32>, ptr %10, align 8, !tbaa !13
store <2 x i32> %12, ptr %11, align 4, !tbaa !13
%13 = getelementptr inbounds i8, ptr %0, i64 8
%14 = load ptr, ptr %13, align 8, !tbaa !14
%15 = getelementptr inbounds i8, ptr %14, i64 16
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %15, i8 0, i64 32, i1 false)
store i32 1, ptr %14, align 8, !tbaa !15
%16 = load i64, ptr @LDNS_RR_TYPE_IXFR, align 8, !tbaa !18
store i64 %16, ptr %5, align 8, !tbaa !19
%17 = icmp eq i32 %6, 0
br i1 %17, label %25, label %18
18: ; preds = %4
%19 = getelementptr inbounds i8, ptr %14, i64 8
%20 = load i64, ptr %19, align 8, !tbaa !21
%21 = icmp eq i64 %20, 0
br i1 %21, label %22, label %25
22: ; preds = %18
%23 = load i32, ptr %3, align 4, !tbaa !22
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %28
25: ; preds = %22, %18, %4
%26 = load i64, ptr @LDNS_RR_TYPE_AXFR, align 8, !tbaa !18
store i64 %26, ptr %5, align 8, !tbaa !19
%27 = getelementptr inbounds i8, ptr %14, i64 8
store i64 0, ptr %27, align 8, !tbaa !21
store i32 0, ptr %14, align 8, !tbaa !15
br label %28
28: ; preds = %25, %22
%29 = getelementptr inbounds i8, ptr %0, i64 4
%30 = load i32, ptr %29, align 4, !tbaa !24
%31 = getelementptr inbounds i8, ptr %5, i64 8
store i32 %30, ptr %31, align 8, !tbaa !25
%32 = call i32 @qinfo_query_encode(ptr noundef %1, ptr noundef nonnull %5) #4
%33 = call i32 @sldns_buffer_write_u16_at(ptr noundef %1, i32 noundef 0, i32 noundef %2) #4
%34 = load i64, ptr %5, align 8, !tbaa !19
%35 = load i64, ptr @LDNS_RR_TYPE_IXFR, align 8, !tbaa !18
%36 = icmp eq i64 %34, %35
br i1 %36, label %37, label %59
37: ; preds = %28
%38 = call i64 @sldns_buffer_limit(ptr noundef %1) #4
%39 = call i32 @sldns_buffer_clear(ptr noundef %1) #4
%40 = call i32 @sldns_buffer_set_position(ptr noundef %1, i64 noundef %38) #4
%41 = load i32, ptr @LDNS_NSCOUNT_OFF, align 4, !tbaa !13
%42 = call i32 @sldns_buffer_write_u16_at(ptr noundef %1, i32 noundef %41, i32 noundef 1) #4
%43 = call i32 @sldns_buffer_write_u8(ptr noundef %1, i32 noundef 192) #4
%44 = call i32 @sldns_buffer_write_u8(ptr noundef %1, i32 noundef 12) #4
%45 = load i32, ptr @LDNS_RR_TYPE_SOA, align 4, !tbaa !13
%46 = call i32 @sldns_buffer_write_u16(ptr noundef %1, i32 noundef %45) #4
%47 = load i32, ptr %31, align 8, !tbaa !25
%48 = call i32 @sldns_buffer_write_u16(ptr noundef %1, i32 noundef %47) #4
%49 = call i32 @sldns_buffer_write_u32(ptr noundef %1, i32 noundef 0) #4
%50 = call i32 @sldns_buffer_write_u16(ptr noundef %1, i32 noundef 22) #4
%51 = call i32 @sldns_buffer_write_u8(ptr noundef %1, i32 noundef 0) #4
%52 = call i32 @sldns_buffer_write_u8(ptr noundef %1, i32 noundef 0) #4
%53 = call i32 @sldns_buffer_write_u32(ptr noundef %1, i32 noundef %8) #4
%54 = call i32 @sldns_buffer_write_u32(ptr noundef %1, i32 noundef 0) #4
%55 = call i32 @sldns_buffer_write_u32(ptr noundef %1, i32 noundef 0) #4
%56 = call i32 @sldns_buffer_write_u32(ptr noundef %1, i32 noundef 0) #4
%57 = call i32 @sldns_buffer_write_u32(ptr noundef %1, i32 noundef 0) #4
%58 = call i32 @sldns_buffer_flip(ptr noundef %1) #4
br label %59
59: ; preds = %37, %28
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #4
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @qinfo_query_encode(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sldns_buffer_write_u16_at(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @sldns_buffer_limit(ptr noundef) local_unnamed_addr #2
declare i32 @sldns_buffer_clear(ptr noundef) local_unnamed_addr #2
declare i32 @sldns_buffer_set_position(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @sldns_buffer_write_u8(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @sldns_buffer_write_u16(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @sldns_buffer_write_u32(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @sldns_buffer_flip(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"auth_xfer", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16, !8, i64 20, !8, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 24}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !11, i64 8}
!15 = !{!16, !8, i64 0}
!16 = !{!"TYPE_2__", !8, i64 0, !17, i64 8, !17, i64 16, !17, i64 24, !17, i64 32, !17, i64 40}
!17 = !{!"long", !9, i64 0}
!18 = !{!17, !17, i64 0}
!19 = !{!20, !17, i64 0}
!20 = !{!"query_info", !17, i64 0, !8, i64 8, !8, i64 12, !8, i64 16}
!21 = !{!16, !17, i64 8}
!22 = !{!23, !8, i64 0}
!23 = !{!"auth_master", !8, i64 0}
!24 = !{!7, !8, i64 4}
!25 = !{!20, !8, i64 8}
| freebsd_contrib_unbound_services_extr_authzone.c_xfr_create_ixfr_packet |
; ModuleID = 'AnghaBench/freebsd/contrib/tcpdump/extr_print-babel.c_format_interval.c'
source_filename = "AnghaBench/freebsd/contrib/tcpdump/extr_print-babel.c_format_interval.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@format_interval.buf = internal global [8 x i8] zeroinitializer, align 1
@.str = private unnamed_addr constant [13 x i8] c"0.0s (bogus)\00", align 1
@.str.1 = private unnamed_addr constant [9 x i8] c"%u.%02us\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @format_interval], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef nonnull ptr @format_interval(i32 noundef %0) #0 {
%2 = icmp eq i32 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = sdiv i32 %0, 100
%5 = srem i32 %0, 100
%6 = tail call i32 @snprintf(ptr noundef nonnull @format_interval.buf, i32 noundef 8, ptr noundef nonnull @.str.1, i32 noundef %4, i32 noundef %5) #2
br label %7
7: ; preds = %1, %3
%8 = phi ptr [ @format_interval.buf, %3 ], [ @.str, %1 ]
ret ptr %8
}
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/tcpdump/extr_print-babel.c_format_interval.c'
source_filename = "AnghaBench/freebsd/contrib/tcpdump/extr_print-babel.c_format_interval.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@format_interval.buf = internal global [8 x i8] zeroinitializer, align 1
@.str = private unnamed_addr constant [13 x i8] c"0.0s (bogus)\00", align 1
@.str.1 = private unnamed_addr constant [9 x i8] c"%u.%02us\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @format_interval], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef nonnull ptr @format_interval(i32 noundef %0) #0 {
%2 = icmp eq i32 %0, 0
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = sdiv i32 %0, 100
%5 = mul i32 %4, 100
%6 = sub i32 %0, %5
%7 = tail call i32 @snprintf(ptr noundef nonnull @format_interval.buf, i32 noundef 8, ptr noundef nonnull @.str.1, i32 noundef %4, i32 noundef %6) #2
br label %8
8: ; preds = %1, %3
%9 = phi ptr [ @format_interval.buf, %3 ], [ @.str, %1 ]
ret ptr %9
}
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_contrib_tcpdump_extr_print-babel.c_format_interval |
; ModuleID = 'AnghaBench/freebsd/sys/contrib/dev/acpica/components/utilities/extr_utdelete.c_AcpiUtDeleteInternalObjectList.c'
source_filename = "AnghaBench/freebsd/sys/contrib/dev/acpica/components/utilities/extr_utdelete.c_AcpiUtDeleteInternalObjectList.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @AcpiUtDeleteInternalObjectList(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 (...) @ACPI_FUNCTION_ENTRY() #2
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = icmp eq ptr %3, null
br i1 %4, label %12, label %5
5: ; preds = %1, %5
%6 = phi ptr [ %10, %5 ], [ %3, %1 ]
%7 = phi ptr [ %9, %5 ], [ %0, %1 ]
%8 = tail call i32 @AcpiUtRemoveReference(ptr noundef nonnull %6) #2
%9 = getelementptr inbounds ptr, ptr %7, i64 1
%10 = load ptr, ptr %9, align 8, !tbaa !5
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %5, !llvm.loop !9
12: ; preds = %5, %1
%13 = tail call i32 @ACPI_FREE(ptr noundef nonnull %0) #2
ret void
}
declare i32 @ACPI_FUNCTION_ENTRY(...) local_unnamed_addr #1
declare i32 @AcpiUtRemoveReference(ptr noundef) local_unnamed_addr #1
declare i32 @ACPI_FREE(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/sys/contrib/dev/acpica/components/utilities/extr_utdelete.c_AcpiUtDeleteInternalObjectList.c'
source_filename = "AnghaBench/freebsd/sys/contrib/dev/acpica/components/utilities/extr_utdelete.c_AcpiUtDeleteInternalObjectList.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @AcpiUtDeleteInternalObjectList(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @ACPI_FUNCTION_ENTRY() #2
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = icmp eq ptr %3, null
br i1 %4, label %12, label %5
5: ; preds = %1, %5
%6 = phi ptr [ %10, %5 ], [ %3, %1 ]
%7 = phi ptr [ %9, %5 ], [ %0, %1 ]
%8 = tail call i32 @AcpiUtRemoveReference(ptr noundef nonnull %6) #2
%9 = getelementptr inbounds i8, ptr %7, i64 8
%10 = load ptr, ptr %9, align 8, !tbaa !6
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %5, !llvm.loop !10
12: ; preds = %5, %1
%13 = tail call i32 @ACPI_FREE(ptr noundef nonnull %0) #2
ret void
}
declare i32 @ACPI_FUNCTION_ENTRY(...) local_unnamed_addr #1
declare i32 @AcpiUtRemoveReference(ptr noundef) local_unnamed_addr #1
declare i32 @ACPI_FREE(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| freebsd_sys_contrib_dev_acpica_components_utilities_extr_utdelete.c_AcpiUtDeleteInternalObjectList |
; ModuleID = 'AnghaBench/freebsd/bin/pax/extr_ftree.c_next_file.c'
source_filename = "AnghaBench/freebsd/bin/pax/extr_ftree.c_next_file.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_7__ = type { i32, ptr, i64, ptr, i32, i32, %struct.TYPE_6__, i64, i64 }
%struct.TYPE_6__ = type { i32, i64, i32, i32, i32, i32 }
%struct.TYPE_8__ = type { i32, i32, ptr, %struct.TYPE_6__, i32 }
@ftree_skip = dso_local local_unnamed_addr global i64 0, align 8
@ftsp = dso_local local_unnamed_addr global i32 0, align 4
@ftent = dso_local local_unnamed_addr global ptr null, align 8
@tflag = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [30 x i8] c"File system cycle found at %s\00", align 1
@.str.1 = private unnamed_addr constant [28 x i8] c"Unable to read directory %s\00", align 1
@.str.2 = private unnamed_addr constant [28 x i8] c"File system traversal error\00", align 1
@.str.3 = private unnamed_addr constant [20 x i8] c"Unable to access %s\00", align 1
@S_IFMT = dso_local local_unnamed_addr global i32 0, align 4
@PAX_DIR = dso_local local_unnamed_addr global i32 0, align 4
@PAX_CHR = dso_local local_unnamed_addr global i32 0, align 4
@PAX_BLK = dso_local local_unnamed_addr global i32 0, align 4
@PAX_REG = dso_local local_unnamed_addr global i32 0, align 4
@PAX_SLK = dso_local local_unnamed_addr global i32 0, align 4
@PAXPATHLEN = dso_local local_unnamed_addr global i32 0, align 4
@errno = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [26 x i8] c"Unable to read symlink %s\00", align 1
@PAX_SCK = dso_local local_unnamed_addr global i32 0, align 4
@PAX_FIF = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @next_file(ptr nocapture noundef %0) local_unnamed_addr #0 {
%2 = alloca i32, align 4
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #5
%4 = load i64, ptr @ftree_skip, align 8, !tbaa !5
%5 = icmp eq i64 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
store i64 0, ptr @ftree_skip, align 8, !tbaa !5
%7 = tail call i64 (...) @ftree_arg() #5
%8 = icmp slt i64 %7, 0
br i1 %8, label %132, label %9
9: ; preds = %6, %1
%10 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 7
%11 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 1
%12 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 6
%13 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 5
br label %14
14: ; preds = %26, %9
%15 = load i32, ptr @ftsp, align 4, !tbaa !9
%16 = call ptr @fts_read(i32 noundef %15) #5
store ptr %16, ptr @ftent, align 8, !tbaa !11
%17 = icmp eq ptr %16, null
br i1 %17, label %18, label %21
18: ; preds = %14
%19 = call i64 (...) @ftree_arg() #5
%20 = icmp slt i64 %19, 0
br i1 %20, label %132, label %26
21: ; preds = %14
%22 = load i32, ptr %16, align 8, !tbaa !13
switch i32 %22, label %63 [
i32 137, label %57
i32 138, label %57
i32 140, label %53
i32 142, label %47
i32 144, label %43
i32 141, label %23
]
23: ; preds = %21
%24 = load i32, ptr @tflag, align 4, !tbaa !9
%25 = icmp eq i32 %24, 0
br i1 %25, label %26, label %27
26: ; preds = %23, %27, %36, %43, %47, %53, %57, %104, %18
br label %14
27: ; preds = %23
%28 = getelementptr inbounds %struct.TYPE_8__, ptr %16, i64 0, i32 2
%29 = load ptr, ptr %28, align 8, !tbaa !16
%30 = getelementptr inbounds %struct.TYPE_6__, ptr %29, i64 0, i32 5
%31 = load i32, ptr %30, align 4, !tbaa !17
%32 = getelementptr inbounds %struct.TYPE_6__, ptr %29, i64 0, i32 4
%33 = load i32, ptr %32, align 8, !tbaa !18
%34 = call i32 @get_atdir(i32 noundef %31, i32 noundef %33, ptr noundef nonnull %3, ptr noundef nonnull %2) #5
%35 = icmp slt i32 %34, 0
br i1 %35, label %26, label %36
36: ; preds = %27
%37 = load ptr, ptr @ftent, align 8, !tbaa !11
%38 = getelementptr inbounds %struct.TYPE_8__, ptr %37, i64 0, i32 1
%39 = load i32, ptr %38, align 4, !tbaa !19
%40 = load i32, ptr %3, align 4, !tbaa !9
%41 = load i32, ptr %2, align 4, !tbaa !9
%42 = call i32 @set_ftime(i32 noundef %39, i32 noundef %40, i32 noundef %41, i32 noundef 1) #5
br label %26
43: ; preds = %21
%44 = getelementptr inbounds %struct.TYPE_8__, ptr %16, i64 0, i32 1
%45 = load i32, ptr %44, align 4, !tbaa !19
%46 = call i32 @paxwarn(i32 noundef 1, ptr noundef nonnull @.str, i32 noundef %45) #5
br label %26
47: ; preds = %21
%48 = getelementptr inbounds %struct.TYPE_8__, ptr %16, i64 0, i32 4
%49 = load i32, ptr %48, align 8, !tbaa !20
%50 = getelementptr inbounds %struct.TYPE_8__, ptr %16, i64 0, i32 1
%51 = load i32, ptr %50, align 4, !tbaa !19
%52 = call i32 (i32, i32, ptr, ...) @syswarn(i32 noundef 1, i32 noundef %49, ptr noundef nonnull @.str.1, i32 noundef %51) #5
br label %26
53: ; preds = %21
%54 = getelementptr inbounds %struct.TYPE_8__, ptr %16, i64 0, i32 4
%55 = load i32, ptr %54, align 8, !tbaa !20
%56 = call i32 (i32, i32, ptr, ...) @syswarn(i32 noundef 1, i32 noundef %55, ptr noundef nonnull @.str.2) #5
br label %26
57: ; preds = %21, %21
%58 = getelementptr inbounds %struct.TYPE_8__, ptr %16, i64 0, i32 4
%59 = load i32, ptr %58, align 8, !tbaa !20
%60 = getelementptr inbounds %struct.TYPE_8__, ptr %16, i64 0, i32 1
%61 = load i32, ptr %60, align 4, !tbaa !19
%62 = call i32 (i32, i32, ptr, ...) @syswarn(i32 noundef 1, i32 noundef %59, ptr noundef nonnull @.str.3, i32 noundef %61) #5
br label %26
63: ; preds = %21
store i32 0, ptr %0, align 8, !tbaa !21
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %10, i8 0, i64 16, i1 false)
%64 = load ptr, ptr %11, align 8, !tbaa !23
store i8 0, ptr %64, align 1, !tbaa !24
%65 = load ptr, ptr @ftent, align 8, !tbaa !11
%66 = getelementptr inbounds %struct.TYPE_8__, ptr %65, i64 0, i32 2
%67 = load ptr, ptr %66, align 8, !tbaa !16
call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %12, ptr noundef nonnull align 8 dereferenceable(32) %67, i64 32, i1 false), !tbaa.struct !25
%68 = load i32, ptr @S_IFMT, align 4, !tbaa !9
%69 = load i32, ptr %12, align 8, !tbaa !26
%70 = and i32 %69, %68
switch i32 %70, label %118 [
i32 132, label %71
i32 133, label %87
i32 134, label %89
i32 129, label %91
i32 130, label %95
i32 128, label %114
i32 131, label %116
]
71: ; preds = %63
%72 = load i32, ptr @PAX_DIR, align 4, !tbaa !9
store i32 %72, ptr %13, align 4, !tbaa !27
%73 = load i32, ptr @tflag, align 4, !tbaa !9
%74 = icmp eq i32 %73, 0
br i1 %74, label %118, label %75
75: ; preds = %71
%76 = getelementptr inbounds %struct.TYPE_8__, ptr %65, i64 0, i32 1
%77 = load i32, ptr %76, align 4, !tbaa !19
%78 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 6, i32 5
%79 = load i32, ptr %78, align 4, !tbaa !28
%80 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 6, i32 4
%81 = load i32, ptr %80, align 8, !tbaa !29
%82 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 6, i32 3
%83 = load i32, ptr %82, align 4, !tbaa !30
%84 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 6, i32 2
%85 = load i32, ptr %84, align 8, !tbaa !31
%86 = call i32 @add_atdir(i32 noundef %77, i32 noundef %79, i32 noundef %81, i32 noundef %83, i32 noundef %85) #5
br label %118
87: ; preds = %63
%88 = load i32, ptr @PAX_CHR, align 4, !tbaa !9
store i32 %88, ptr %13, align 4, !tbaa !27
br label %118
89: ; preds = %63
%90 = load i32, ptr @PAX_BLK, align 4, !tbaa !9
store i32 %90, ptr %13, align 4, !tbaa !27
br label %118
91: ; preds = %63
%92 = load i32, ptr @PAX_REG, align 4, !tbaa !9
store i32 %92, ptr %13, align 4, !tbaa !27
%93 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 6, i32 1
%94 = load i64, ptr %93, align 8, !tbaa !32
store i64 %94, ptr %10, align 8, !tbaa !33
br label %118
95: ; preds = %63
%96 = load i32, ptr @PAX_SLK, align 4, !tbaa !9
store i32 %96, ptr %13, align 4, !tbaa !27
%97 = getelementptr inbounds %struct.TYPE_8__, ptr %65, i64 0, i32 1
%98 = load i32, ptr %97, align 4, !tbaa !19
%99 = load ptr, ptr %11, align 8, !tbaa !23
%100 = load i32, ptr @PAXPATHLEN, align 4, !tbaa !9
%101 = add nsw i32 %100, -1
%102 = call i32 @readlink(i32 noundef %98, ptr noundef %99, i32 noundef %101) #5
%103 = icmp slt i32 %102, 0
br i1 %103, label %104, label %110
104: ; preds = %95
%105 = load i32, ptr @errno, align 4, !tbaa !9
%106 = load ptr, ptr @ftent, align 8, !tbaa !11
%107 = getelementptr inbounds %struct.TYPE_8__, ptr %106, i64 0, i32 1
%108 = load i32, ptr %107, align 4, !tbaa !19
%109 = call i32 (i32, i32, ptr, ...) @syswarn(i32 noundef 1, i32 noundef %105, ptr noundef nonnull @.str.4, i32 noundef %108) #5
br label %26
110: ; preds = %95
%111 = load ptr, ptr %11, align 8, !tbaa !23
%112 = zext nneg i32 %102 to i64
%113 = getelementptr inbounds i8, ptr %111, i64 %112
store i8 0, ptr %113, align 1, !tbaa !24
store i32 %102, ptr %0, align 8, !tbaa !21
br label %118
114: ; preds = %63
%115 = load i32, ptr @PAX_SCK, align 4, !tbaa !9
store i32 %115, ptr %13, align 4, !tbaa !27
br label %118
116: ; preds = %63
%117 = load i32, ptr @PAX_FIF, align 4, !tbaa !9
store i32 %117, ptr %13, align 4, !tbaa !27
br label %118
118: ; preds = %63, %75, %87, %89, %91, %110, %114, %116, %71
%119 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 3
%120 = load ptr, ptr %119, align 8, !tbaa !34
%121 = load ptr, ptr @ftent, align 8, !tbaa !11
%122 = getelementptr inbounds %struct.TYPE_8__, ptr %121, i64 0, i32 1
%123 = load i32, ptr %122, align 4, !tbaa !19
%124 = call i64 @l_strncpy(ptr noundef %120, i32 noundef %123, i32 noundef 7) #5
%125 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 2
store i64 %124, ptr %125, align 8, !tbaa !35
%126 = load ptr, ptr %119, align 8, !tbaa !34
%127 = getelementptr inbounds i8, ptr %126, i64 %124
store i8 0, ptr %127, align 1, !tbaa !24
%128 = load ptr, ptr @ftent, align 8, !tbaa !11
%129 = getelementptr inbounds %struct.TYPE_8__, ptr %128, i64 0, i32 1
%130 = load i32, ptr %129, align 4, !tbaa !19
%131 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 4
store i32 %130, ptr %131, align 8, !tbaa !36
br label %132
132: ; preds = %18, %6, %118
%133 = phi i32 [ 0, %118 ], [ -1, %6 ], [ -1, %18 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #5
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #5
ret i32 %133
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @ftree_arg(...) local_unnamed_addr #2
declare ptr @fts_read(i32 noundef) local_unnamed_addr #2
declare i32 @get_atdir(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @set_ftime(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @paxwarn(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @syswarn(i32 noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3
declare i32 @add_atdir(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @readlink(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @l_strncpy(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !10, i64 0}
!14 = !{!"TYPE_8__", !10, i64 0, !10, i64 4, !12, i64 8, !15, i64 16, !10, i64 48}
!15 = !{!"TYPE_6__", !10, i64 0, !6, i64 8, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!16 = !{!14, !12, i64 8}
!17 = !{!15, !10, i64 28}
!18 = !{!15, !10, i64 24}
!19 = !{!14, !10, i64 4}
!20 = !{!14, !10, i64 48}
!21 = !{!22, !10, i64 0}
!22 = !{!"TYPE_7__", !10, i64 0, !12, i64 8, !6, i64 16, !12, i64 24, !10, i64 32, !10, i64 36, !15, i64 40, !6, i64 72, !6, i64 80}
!23 = !{!22, !12, i64 8}
!24 = !{!7, !7, i64 0}
!25 = !{i64 0, i64 4, !9, i64 8, i64 8, !5, i64 16, i64 4, !9, i64 20, i64 4, !9, i64 24, i64 4, !9, i64 28, i64 4, !9}
!26 = !{!22, !10, i64 40}
!27 = !{!22, !10, i64 36}
!28 = !{!22, !10, i64 68}
!29 = !{!22, !10, i64 64}
!30 = !{!22, !10, i64 60}
!31 = !{!22, !10, i64 56}
!32 = !{!22, !6, i64 48}
!33 = !{!22, !6, i64 72}
!34 = !{!22, !12, i64 24}
!35 = !{!22, !6, i64 16}
!36 = !{!22, !10, i64 32}
| ; ModuleID = 'AnghaBench/freebsd/bin/pax/extr_ftree.c_next_file.c'
source_filename = "AnghaBench/freebsd/bin/pax/extr_ftree.c_next_file.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ftree_skip = common local_unnamed_addr global i64 0, align 8
@ftsp = common local_unnamed_addr global i32 0, align 4
@ftent = common local_unnamed_addr global ptr null, align 8
@tflag = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [30 x i8] c"File system cycle found at %s\00", align 1
@.str.1 = private unnamed_addr constant [28 x i8] c"Unable to read directory %s\00", align 1
@.str.2 = private unnamed_addr constant [28 x i8] c"File system traversal error\00", align 1
@.str.3 = private unnamed_addr constant [20 x i8] c"Unable to access %s\00", align 1
@S_IFMT = common local_unnamed_addr global i32 0, align 4
@PAX_DIR = common local_unnamed_addr global i32 0, align 4
@PAX_CHR = common local_unnamed_addr global i32 0, align 4
@PAX_BLK = common local_unnamed_addr global i32 0, align 4
@PAX_REG = common local_unnamed_addr global i32 0, align 4
@PAX_SLK = common local_unnamed_addr global i32 0, align 4
@PAXPATHLEN = common local_unnamed_addr global i32 0, align 4
@errno = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [26 x i8] c"Unable to read symlink %s\00", align 1
@PAX_SCK = common local_unnamed_addr global i32 0, align 4
@PAX_FIF = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -1, 1) i32 @next_file(ptr nocapture noundef %0) local_unnamed_addr #0 {
%2 = alloca i32, align 4
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #5
%4 = load i64, ptr @ftree_skip, align 8, !tbaa !6
%5 = icmp eq i64 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
store i64 0, ptr @ftree_skip, align 8, !tbaa !6
%7 = tail call i64 @ftree_arg() #5
%8 = icmp slt i64 %7, 0
br i1 %8, label %132, label %9
9: ; preds = %6, %1
%10 = getelementptr inbounds i8, ptr %0, i64 72
%11 = getelementptr inbounds i8, ptr %0, i64 8
%12 = getelementptr inbounds i8, ptr %0, i64 40
%13 = getelementptr inbounds i8, ptr %0, i64 36
br label %14
14: ; preds = %26, %9
%15 = load i32, ptr @ftsp, align 4, !tbaa !10
%16 = call ptr @fts_read(i32 noundef %15) #5
store ptr %16, ptr @ftent, align 8, !tbaa !12
%17 = icmp eq ptr %16, null
br i1 %17, label %18, label %21
18: ; preds = %14
%19 = call i64 @ftree_arg() #5
%20 = icmp slt i64 %19, 0
br i1 %20, label %132, label %26
21: ; preds = %14
%22 = load i32, ptr %16, align 8, !tbaa !14
switch i32 %22, label %63 [
i32 137, label %57
i32 138, label %57
i32 140, label %53
i32 142, label %47
i32 144, label %43
i32 141, label %23
]
23: ; preds = %21
%24 = load i32, ptr @tflag, align 4, !tbaa !10
%25 = icmp eq i32 %24, 0
br i1 %25, label %26, label %27
26: ; preds = %23, %27, %36, %43, %47, %53, %57, %104, %18
br label %14
27: ; preds = %23
%28 = getelementptr inbounds i8, ptr %16, i64 8
%29 = load ptr, ptr %28, align 8, !tbaa !17
%30 = getelementptr inbounds i8, ptr %29, i64 28
%31 = load i32, ptr %30, align 4, !tbaa !18
%32 = getelementptr inbounds i8, ptr %29, i64 24
%33 = load i32, ptr %32, align 8, !tbaa !19
%34 = call i32 @get_atdir(i32 noundef %31, i32 noundef %33, ptr noundef nonnull %3, ptr noundef nonnull %2) #5
%35 = icmp slt i32 %34, 0
br i1 %35, label %26, label %36
36: ; preds = %27
%37 = load ptr, ptr @ftent, align 8, !tbaa !12
%38 = getelementptr inbounds i8, ptr %37, i64 4
%39 = load i32, ptr %38, align 4, !tbaa !20
%40 = load i32, ptr %3, align 4, !tbaa !10
%41 = load i32, ptr %2, align 4, !tbaa !10
%42 = call i32 @set_ftime(i32 noundef %39, i32 noundef %40, i32 noundef %41, i32 noundef 1) #5
br label %26
43: ; preds = %21
%44 = getelementptr inbounds i8, ptr %16, i64 4
%45 = load i32, ptr %44, align 4, !tbaa !20
%46 = call i32 @paxwarn(i32 noundef 1, ptr noundef nonnull @.str, i32 noundef %45) #5
br label %26
47: ; preds = %21
%48 = getelementptr inbounds i8, ptr %16, i64 48
%49 = load i32, ptr %48, align 8, !tbaa !21
%50 = getelementptr inbounds i8, ptr %16, i64 4
%51 = load i32, ptr %50, align 4, !tbaa !20
%52 = call i32 (i32, i32, ptr, ...) @syswarn(i32 noundef 1, i32 noundef %49, ptr noundef nonnull @.str.1, i32 noundef %51) #5
br label %26
53: ; preds = %21
%54 = getelementptr inbounds i8, ptr %16, i64 48
%55 = load i32, ptr %54, align 8, !tbaa !21
%56 = call i32 (i32, i32, ptr, ...) @syswarn(i32 noundef 1, i32 noundef %55, ptr noundef nonnull @.str.2) #5
br label %26
57: ; preds = %21, %21
%58 = getelementptr inbounds i8, ptr %16, i64 48
%59 = load i32, ptr %58, align 8, !tbaa !21
%60 = getelementptr inbounds i8, ptr %16, i64 4
%61 = load i32, ptr %60, align 4, !tbaa !20
%62 = call i32 (i32, i32, ptr, ...) @syswarn(i32 noundef 1, i32 noundef %59, ptr noundef nonnull @.str.3, i32 noundef %61) #5
br label %26
63: ; preds = %21
store i32 0, ptr %0, align 8, !tbaa !22
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %10, i8 0, i64 16, i1 false)
%64 = load ptr, ptr %11, align 8, !tbaa !24
store i8 0, ptr %64, align 1, !tbaa !25
%65 = load ptr, ptr @ftent, align 8, !tbaa !12
%66 = getelementptr inbounds i8, ptr %65, i64 8
%67 = load ptr, ptr %66, align 8, !tbaa !17
call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %12, ptr noundef nonnull align 8 dereferenceable(32) %67, i64 32, i1 false), !tbaa.struct !26
%68 = load i32, ptr @S_IFMT, align 4, !tbaa !10
%69 = load i32, ptr %12, align 8, !tbaa !27
%70 = and i32 %69, %68
switch i32 %70, label %118 [
i32 132, label %71
i32 133, label %87
i32 134, label %89
i32 129, label %91
i32 130, label %95
i32 128, label %114
i32 131, label %116
]
71: ; preds = %63
%72 = load i32, ptr @PAX_DIR, align 4, !tbaa !10
store i32 %72, ptr %13, align 4, !tbaa !28
%73 = load i32, ptr @tflag, align 4, !tbaa !10
%74 = icmp eq i32 %73, 0
br i1 %74, label %118, label %75
75: ; preds = %71
%76 = getelementptr inbounds i8, ptr %65, i64 4
%77 = load i32, ptr %76, align 4, !tbaa !20
%78 = getelementptr inbounds i8, ptr %0, i64 68
%79 = load i32, ptr %78, align 4, !tbaa !29
%80 = getelementptr inbounds i8, ptr %0, i64 64
%81 = load i32, ptr %80, align 8, !tbaa !30
%82 = getelementptr inbounds i8, ptr %0, i64 60
%83 = load i32, ptr %82, align 4, !tbaa !31
%84 = getelementptr inbounds i8, ptr %0, i64 56
%85 = load i32, ptr %84, align 8, !tbaa !32
%86 = call i32 @add_atdir(i32 noundef %77, i32 noundef %79, i32 noundef %81, i32 noundef %83, i32 noundef %85) #5
br label %118
87: ; preds = %63
%88 = load i32, ptr @PAX_CHR, align 4, !tbaa !10
store i32 %88, ptr %13, align 4, !tbaa !28
br label %118
89: ; preds = %63
%90 = load i32, ptr @PAX_BLK, align 4, !tbaa !10
store i32 %90, ptr %13, align 4, !tbaa !28
br label %118
91: ; preds = %63
%92 = load i32, ptr @PAX_REG, align 4, !tbaa !10
store i32 %92, ptr %13, align 4, !tbaa !28
%93 = getelementptr inbounds i8, ptr %0, i64 48
%94 = load i64, ptr %93, align 8, !tbaa !33
store i64 %94, ptr %10, align 8, !tbaa !34
br label %118
95: ; preds = %63
%96 = load i32, ptr @PAX_SLK, align 4, !tbaa !10
store i32 %96, ptr %13, align 4, !tbaa !28
%97 = getelementptr inbounds i8, ptr %65, i64 4
%98 = load i32, ptr %97, align 4, !tbaa !20
%99 = load ptr, ptr %11, align 8, !tbaa !24
%100 = load i32, ptr @PAXPATHLEN, align 4, !tbaa !10
%101 = add nsw i32 %100, -1
%102 = call i32 @readlink(i32 noundef %98, ptr noundef %99, i32 noundef %101) #5
%103 = icmp slt i32 %102, 0
br i1 %103, label %104, label %110
104: ; preds = %95
%105 = load i32, ptr @errno, align 4, !tbaa !10
%106 = load ptr, ptr @ftent, align 8, !tbaa !12
%107 = getelementptr inbounds i8, ptr %106, i64 4
%108 = load i32, ptr %107, align 4, !tbaa !20
%109 = call i32 (i32, i32, ptr, ...) @syswarn(i32 noundef 1, i32 noundef %105, ptr noundef nonnull @.str.4, i32 noundef %108) #5
br label %26
110: ; preds = %95
%111 = load ptr, ptr %11, align 8, !tbaa !24
%112 = zext nneg i32 %102 to i64
%113 = getelementptr inbounds i8, ptr %111, i64 %112
store i8 0, ptr %113, align 1, !tbaa !25
store i32 %102, ptr %0, align 8, !tbaa !22
br label %118
114: ; preds = %63
%115 = load i32, ptr @PAX_SCK, align 4, !tbaa !10
store i32 %115, ptr %13, align 4, !tbaa !28
br label %118
116: ; preds = %63
%117 = load i32, ptr @PAX_FIF, align 4, !tbaa !10
store i32 %117, ptr %13, align 4, !tbaa !28
br label %118
118: ; preds = %63, %75, %87, %89, %91, %110, %114, %116, %71
%119 = getelementptr inbounds i8, ptr %0, i64 24
%120 = load ptr, ptr %119, align 8, !tbaa !35
%121 = load ptr, ptr @ftent, align 8, !tbaa !12
%122 = getelementptr inbounds i8, ptr %121, i64 4
%123 = load i32, ptr %122, align 4, !tbaa !20
%124 = call i64 @l_strncpy(ptr noundef %120, i32 noundef %123, i32 noundef 7) #5
%125 = getelementptr inbounds i8, ptr %0, i64 16
store i64 %124, ptr %125, align 8, !tbaa !36
%126 = load ptr, ptr %119, align 8, !tbaa !35
%127 = getelementptr inbounds i8, ptr %126, i64 %124
store i8 0, ptr %127, align 1, !tbaa !25
%128 = load ptr, ptr @ftent, align 8, !tbaa !12
%129 = getelementptr inbounds i8, ptr %128, i64 4
%130 = load i32, ptr %129, align 4, !tbaa !20
%131 = getelementptr inbounds i8, ptr %0, i64 32
store i32 %130, ptr %131, align 8, !tbaa !37
br label %132
132: ; preds = %18, %6, %118
%133 = phi i32 [ 0, %118 ], [ -1, %6 ], [ -1, %18 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #5
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #5
ret i32 %133
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @ftree_arg(...) local_unnamed_addr #2
declare ptr @fts_read(i32 noundef) local_unnamed_addr #2
declare i32 @get_atdir(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @set_ftime(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @paxwarn(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @syswarn(i32 noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3
declare i32 @add_atdir(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @readlink(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @l_strncpy(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !11, i64 0}
!15 = !{!"TYPE_8__", !11, i64 0, !11, i64 4, !13, i64 8, !16, i64 16, !11, i64 48}
!16 = !{!"TYPE_6__", !11, i64 0, !7, i64 8, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28}
!17 = !{!15, !13, i64 8}
!18 = !{!16, !11, i64 28}
!19 = !{!16, !11, i64 24}
!20 = !{!15, !11, i64 4}
!21 = !{!15, !11, i64 48}
!22 = !{!23, !11, i64 0}
!23 = !{!"TYPE_7__", !11, i64 0, !13, i64 8, !7, i64 16, !13, i64 24, !11, i64 32, !11, i64 36, !16, i64 40, !7, i64 72, !7, i64 80}
!24 = !{!23, !13, i64 8}
!25 = !{!8, !8, i64 0}
!26 = !{i64 0, i64 4, !10, i64 8, i64 8, !6, i64 16, i64 4, !10, i64 20, i64 4, !10, i64 24, i64 4, !10, i64 28, i64 4, !10}
!27 = !{!23, !11, i64 40}
!28 = !{!23, !11, i64 36}
!29 = !{!23, !11, i64 68}
!30 = !{!23, !11, i64 64}
!31 = !{!23, !11, i64 60}
!32 = !{!23, !11, i64 56}
!33 = !{!23, !7, i64 48}
!34 = !{!23, !7, i64 72}
!35 = !{!23, !13, i64 24}
!36 = !{!23, !7, i64 16}
!37 = !{!23, !11, i64 32}
| freebsd_bin_pax_extr_ftree.c_next_file |
; ModuleID = 'AnghaBench/linux/fs/fuse/extr_inode.c_fuse_statfs.c'
source_filename = "AnghaBench/linux/fs/fuse/extr_inode.c_fuse_statfs.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i32, ptr, i32, i32, i64 }
%struct.fuse_statfs_out = type { i32 }
%struct.TYPE_5__ = type { i32, ptr }
@args = dso_local global %struct.TYPE_6__ zeroinitializer, align 8
@FUSE_SUPER_MAGIC = dso_local local_unnamed_addr global i32 0, align 4
@FUSE_STATFS = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @fuse_statfs], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @fuse_statfs(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca %struct.fuse_statfs_out, align 4
%4 = load ptr, ptr %0, align 8, !tbaa !5
%5 = tail call ptr @get_fuse_conn_super(ptr noundef %4) #3
%6 = tail call i32 @FUSE_ARGS(ptr noundef nonnull byval(%struct.TYPE_6__) align 8 @args) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%7 = tail call i32 @fuse_allow_current_process(ptr noundef %5) #3
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, ptr @FUSE_SUPER_MAGIC, align 4, !tbaa !10
store i32 %10, ptr %1, align 4, !tbaa !12
br label %22
11: ; preds = %2
%12 = call i32 @memset(ptr noundef nonnull %3, i32 noundef 0, i32 noundef 4) #3
store i64 0, ptr getelementptr inbounds (%struct.TYPE_6__, ptr @args, i64 0, i32 4), align 8, !tbaa !14
%13 = load i32, ptr @FUSE_STATFS, align 4, !tbaa !10
store i32 %13, ptr getelementptr inbounds (%struct.TYPE_6__, ptr @args, i64 0, i32 3), align 4, !tbaa !17
%14 = call i32 @d_inode(ptr noundef nonnull %0) #3
%15 = call i32 @get_node_id(i32 noundef %14) #3
store i32 %15, ptr getelementptr inbounds (%struct.TYPE_6__, ptr @args, i64 0, i32 2), align 8, !tbaa !18
store i32 1, ptr @args, align 8, !tbaa !19
%16 = load ptr, ptr getelementptr inbounds (%struct.TYPE_6__, ptr @args, i64 0, i32 1), align 8, !tbaa !20
store i32 4, ptr %16, align 8, !tbaa !21
%17 = getelementptr inbounds %struct.TYPE_5__, ptr %16, i64 0, i32 1
store ptr %3, ptr %17, align 8, !tbaa !23
%18 = call i32 @fuse_simple_request(ptr noundef %5, ptr noundef nonnull @args) #3
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %22
20: ; preds = %11
%21 = call i32 @convert_fuse_statfs(ptr noundef %1, ptr noundef nonnull %3) #3
br label %22
22: ; preds = %11, %20, %9
%23 = phi i32 [ 0, %9 ], [ 0, %20 ], [ %18, %11 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %23
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @get_fuse_conn_super(ptr noundef) local_unnamed_addr #2
declare i32 @FUSE_ARGS(ptr noundef byval(%struct.TYPE_6__) align 8) local_unnamed_addr #2
declare i32 @fuse_allow_current_process(ptr noundef) local_unnamed_addr #2
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @get_node_id(i32 noundef) local_unnamed_addr #2
declare i32 @d_inode(ptr noundef) local_unnamed_addr #2
declare i32 @fuse_simple_request(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @convert_fuse_statfs(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"dentry", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"kstatfs", !11, i64 0}
!14 = !{!15, !16, i64 24}
!15 = !{!"TYPE_6__", !11, i64 0, !7, i64 8, !11, i64 16, !11, i64 20, !16, i64 24}
!16 = !{!"long", !8, i64 0}
!17 = !{!15, !11, i64 20}
!18 = !{!15, !11, i64 16}
!19 = !{!15, !11, i64 0}
!20 = !{!15, !7, i64 8}
!21 = !{!22, !11, i64 0}
!22 = !{!"TYPE_5__", !11, i64 0, !7, i64 8}
!23 = !{!22, !7, i64 8}
| ; ModuleID = 'AnghaBench/linux/fs/fuse/extr_inode.c_fuse_statfs.c'
source_filename = "AnghaBench/linux/fs/fuse/extr_inode.c_fuse_statfs.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_6__ = type { i32, ptr, i32, i32, i64 }
%struct.fuse_statfs_out = type { i32 }
@args = common global %struct.TYPE_6__ zeroinitializer, align 8
@FUSE_SUPER_MAGIC = common local_unnamed_addr global i32 0, align 4
@FUSE_STATFS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @fuse_statfs], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @fuse_statfs(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca %struct.TYPE_6__, align 8
%4 = alloca %struct.fuse_statfs_out, align 4
%5 = load ptr, ptr %0, align 8, !tbaa !6
%6 = tail call ptr @get_fuse_conn_super(ptr noundef %5) #4
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %3) #4
call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %3, ptr noundef nonnull align 8 dereferenceable(32) @args, i64 32, i1 false), !tbaa.struct !11
%7 = call i32 @FUSE_ARGS(ptr noundef nonnull %3) #4
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %3) #4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
%8 = call i32 @fuse_allow_current_process(ptr noundef %6) #4
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = load i32, ptr @FUSE_SUPER_MAGIC, align 4, !tbaa !12
store i32 %11, ptr %1, align 4, !tbaa !17
br label %23
12: ; preds = %2
%13 = call i32 @memset(ptr noundef nonnull %4, i32 noundef 0, i32 noundef 4) #4
store i64 0, ptr getelementptr inbounds (i8, ptr @args, i64 24), align 8, !tbaa !19
%14 = load i32, ptr @FUSE_STATFS, align 4, !tbaa !12
store i32 %14, ptr getelementptr inbounds (i8, ptr @args, i64 20), align 4, !tbaa !21
%15 = call i32 @d_inode(ptr noundef nonnull %0) #4
%16 = call i32 @get_node_id(i32 noundef %15) #4
store i32 %16, ptr getelementptr inbounds (i8, ptr @args, i64 16), align 8, !tbaa !22
store i32 1, ptr @args, align 8, !tbaa !23
%17 = load ptr, ptr getelementptr inbounds (i8, ptr @args, i64 8), align 8, !tbaa !24
store i32 4, ptr %17, align 8, !tbaa !25
%18 = getelementptr inbounds i8, ptr %17, i64 8
store ptr %4, ptr %18, align 8, !tbaa !27
%19 = call i32 @fuse_simple_request(ptr noundef %6, ptr noundef nonnull @args) #4
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %23
21: ; preds = %12
%22 = call i32 @convert_fuse_statfs(ptr noundef %1, ptr noundef nonnull %4) #4
br label %23
23: ; preds = %12, %21, %10
%24 = phi i32 [ 0, %10 ], [ 0, %21 ], [ %19, %12 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
ret i32 %24
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @get_fuse_conn_super(ptr noundef) local_unnamed_addr #2
declare i32 @FUSE_ARGS(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @fuse_allow_current_process(ptr noundef) local_unnamed_addr #2
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @get_node_id(i32 noundef) local_unnamed_addr #2
declare i32 @d_inode(ptr noundef) local_unnamed_addr #2
declare i32 @fuse_simple_request(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @convert_fuse_statfs(ptr noundef, ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"dentry", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{i64 0, i64 4, !12, i64 8, i64 8, !14, i64 16, i64 4, !12, i64 20, i64 4, !12, i64 24, i64 8, !15}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!8, !8, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"long", !9, i64 0}
!17 = !{!18, !13, i64 0}
!18 = !{!"kstatfs", !13, i64 0}
!19 = !{!20, !16, i64 24}
!20 = !{!"TYPE_6__", !13, i64 0, !8, i64 8, !13, i64 16, !13, i64 20, !16, i64 24}
!21 = !{!20, !13, i64 20}
!22 = !{!20, !13, i64 16}
!23 = !{!20, !13, i64 0}
!24 = !{!20, !8, i64 8}
!25 = !{!26, !13, i64 0}
!26 = !{!"TYPE_5__", !13, i64 0, !8, i64 8}
!27 = !{!26, !8, i64 8}
| linux_fs_fuse_extr_inode.c_fuse_statfs |
; ModuleID = 'AnghaBench/linux/drivers/mtd/nand/raw/atmel/extr_nand-controller.c_atmel_smc_nand_controller_remove.c'
source_filename = "AnghaBench/linux/drivers/mtd/nand/raw/atmel/extr_nand-controller.c_atmel_smc_nand_controller_remove.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @atmel_smc_nand_controller_remove], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @atmel_smc_nand_controller_remove(ptr noundef %0) #0 {
%2 = tail call i32 @atmel_nand_controller_remove_nands(ptr noundef %0) #2
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @atmel_nand_controller_cleanup(ptr noundef %0) #2
br label %6
6: ; preds = %1, %4
ret i32 %2
}
declare i32 @atmel_nand_controller_remove_nands(ptr noundef) local_unnamed_addr #1
declare i32 @atmel_nand_controller_cleanup(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/mtd/nand/raw/atmel/extr_nand-controller.c_atmel_smc_nand_controller_remove.c'
source_filename = "AnghaBench/linux/drivers/mtd/nand/raw/atmel/extr_nand-controller.c_atmel_smc_nand_controller_remove.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @atmel_smc_nand_controller_remove], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @atmel_smc_nand_controller_remove(ptr noundef %0) #0 {
%2 = tail call i32 @atmel_nand_controller_remove_nands(ptr noundef %0) #2
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @atmel_nand_controller_cleanup(ptr noundef %0) #2
br label %6
6: ; preds = %1, %4
ret i32 %2
}
declare i32 @atmel_nand_controller_remove_nands(ptr noundef) local_unnamed_addr #1
declare i32 @atmel_nand_controller_cleanup(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_mtd_nand_raw_atmel_extr_nand-controller.c_atmel_smc_nand_controller_remove |
; ModuleID = 'AnghaBench/freebsd/contrib/ofed/libibmad/extr_fields.c_mad_set_field.c'
source_filename = "AnghaBench/freebsd/contrib/ofed/libibmad/extr_fields.c_mad_set_field.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ib_mad_f = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @mad_set_field(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = load i32, ptr @ib_mad_f, align 4, !tbaa !5
%6 = add i32 %5, %2
%7 = tail call i32 @_set_field(ptr noundef %0, i32 noundef %1, i32 noundef %6, i32 noundef %3) #2
ret void
}
declare i32 @_set_field(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/ofed/libibmad/extr_fields.c_mad_set_field.c'
source_filename = "AnghaBench/freebsd/contrib/ofed/libibmad/extr_fields.c_mad_set_field.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ib_mad_f = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @mad_set_field(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = load i32, ptr @ib_mad_f, align 4, !tbaa !6
%6 = add i32 %5, %2
%7 = tail call i32 @_set_field(ptr noundef %0, i32 noundef %1, i32 noundef %6, i32 noundef %3) #2
ret void
}
declare i32 @_set_field(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_ofed_libibmad_extr_fields.c_mad_set_field |
; ModuleID = 'AnghaBench/linux/arch/arm/mach-imx/extr_ehci-imx27.c_mx27_initialize_usb_hw.c'
source_filename = "AnghaBench/linux/arch/arm/mach-imx/extr_ehci-imx27.c_mx27_initialize_usb_hw.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MX27_USB_BASE_ADDR = dso_local local_unnamed_addr global i64 0, align 8
@USBCTRL_OTGBASE_OFFSET = dso_local local_unnamed_addr global i64 0, align 8
@MX27_OTG_SIC_MASK = dso_local local_unnamed_addr global i32 0, align 4
@MX27_OTG_PM_BIT = dso_local local_unnamed_addr global i32 0, align 4
@MXC_EHCI_INTERFACE_MASK = dso_local local_unnamed_addr global i32 0, align 4
@MX27_OTG_SIC_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@MXC_EHCI_POWER_PINS_ENABLED = dso_local local_unnamed_addr global i32 0, align 4
@MX27_H1_SIC_MASK = dso_local local_unnamed_addr global i32 0, align 4
@MX27_H1_PM_BIT = dso_local local_unnamed_addr global i32 0, align 4
@MX27_H1_DT_BIT = dso_local local_unnamed_addr global i32 0, align 4
@MX27_H1_SIC_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@MXC_EHCI_TTL_ENABLED = dso_local local_unnamed_addr global i32 0, align 4
@MX27_H2_SIC_MASK = dso_local local_unnamed_addr global i32 0, align 4
@MX27_H2_PM_BIT = dso_local local_unnamed_addr global i32 0, align 4
@MX27_H2_DT_BIT = dso_local local_unnamed_addr global i32 0, align 4
@MX27_H2_SIC_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @mx27_initialize_usb_hw(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i64, ptr @MX27_USB_BASE_ADDR, align 8, !tbaa !5
%4 = load i64, ptr @USBCTRL_OTGBASE_OFFSET, align 8, !tbaa !5
%5 = add nsw i64 %4, %3
%6 = tail call i32 @MX27_IO_ADDRESS(i64 noundef %5) #2
%7 = tail call i32 @readl(i32 noundef %6) #2
switch i32 %0, label %55 [
i32 0, label %8
i32 1, label %19
i32 2, label %37
]
8: ; preds = %2
%9 = load i32, ptr @MX27_OTG_SIC_MASK, align 4, !tbaa !9
%10 = load i32, ptr @MX27_OTG_PM_BIT, align 4, !tbaa !9
%11 = or i32 %10, %9
%12 = xor i32 %11, -1
%13 = and i32 %7, %12
%14 = load i32, ptr @MXC_EHCI_INTERFACE_MASK, align 4, !tbaa !9
%15 = and i32 %14, %1
%16 = load i32, ptr @MX27_OTG_SIC_SHIFT, align 4, !tbaa !9
%17 = shl i32 %15, %16
%18 = or i32 %17, %13
br label %58
19: ; preds = %2
%20 = load i32, ptr @MX27_H1_SIC_MASK, align 4, !tbaa !9
%21 = load i32, ptr @MX27_H1_PM_BIT, align 4, !tbaa !9
%22 = load i32, ptr @MX27_H1_DT_BIT, align 4, !tbaa !9
%23 = or i32 %21, %20
%24 = or i32 %23, %22
%25 = xor i32 %24, -1
%26 = and i32 %7, %25
%27 = load i32, ptr @MXC_EHCI_INTERFACE_MASK, align 4, !tbaa !9
%28 = and i32 %27, %1
%29 = load i32, ptr @MX27_H1_SIC_SHIFT, align 4, !tbaa !9
%30 = shl i32 %28, %29
%31 = or i32 %26, %30
%32 = load i32, ptr @MXC_EHCI_POWER_PINS_ENABLED, align 4, !tbaa !9
%33 = and i32 %32, %1
%34 = icmp eq i32 %33, 0
%35 = select i1 %34, i32 %21, i32 0
%36 = or i32 %31, %35
br label %58
37: ; preds = %2
%38 = load i32, ptr @MX27_H2_SIC_MASK, align 4, !tbaa !9
%39 = load i32, ptr @MX27_H2_PM_BIT, align 4, !tbaa !9
%40 = load i32, ptr @MX27_H2_DT_BIT, align 4, !tbaa !9
%41 = or i32 %39, %38
%42 = or i32 %41, %40
%43 = xor i32 %42, -1
%44 = and i32 %7, %43
%45 = load i32, ptr @MXC_EHCI_INTERFACE_MASK, align 4, !tbaa !9
%46 = and i32 %45, %1
%47 = load i32, ptr @MX27_H2_SIC_SHIFT, align 4, !tbaa !9
%48 = shl i32 %46, %47
%49 = or i32 %44, %48
%50 = load i32, ptr @MXC_EHCI_POWER_PINS_ENABLED, align 4, !tbaa !9
%51 = and i32 %50, %1
%52 = icmp eq i32 %51, 0
%53 = select i1 %52, i32 %39, i32 0
%54 = or i32 %49, %53
br label %58
55: ; preds = %2
%56 = load i32, ptr @EINVAL, align 4, !tbaa !9
%57 = sub nsw i32 0, %56
br label %72
58: ; preds = %37, %19, %8
%59 = phi ptr [ @MXC_EHCI_TTL_ENABLED, %37 ], [ @MXC_EHCI_TTL_ENABLED, %19 ], [ @MXC_EHCI_POWER_PINS_ENABLED, %8 ]
%60 = phi i32 [ %40, %37 ], [ %22, %19 ], [ %10, %8 ]
%61 = phi i32 [ %54, %37 ], [ %36, %19 ], [ %18, %8 ]
%62 = load i32, ptr %59, align 4, !tbaa !9
%63 = and i32 %62, %1
%64 = icmp eq i32 %63, 0
%65 = select i1 %64, i32 %60, i32 0
%66 = or i32 %61, %65
%67 = load i64, ptr @MX27_USB_BASE_ADDR, align 8, !tbaa !5
%68 = load i64, ptr @USBCTRL_OTGBASE_OFFSET, align 8, !tbaa !5
%69 = add nsw i64 %68, %67
%70 = tail call i32 @MX27_IO_ADDRESS(i64 noundef %69) #2
%71 = tail call i32 @writel(i32 noundef %66, i32 noundef %70) #2
br label %72
72: ; preds = %58, %55
%73 = phi i32 [ %57, %55 ], [ 0, %58 ]
ret i32 %73
}
declare i32 @readl(i32 noundef) local_unnamed_addr #1
declare i32 @MX27_IO_ADDRESS(i64 noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/arch/arm/mach-imx/extr_ehci-imx27.c_mx27_initialize_usb_hw.c'
source_filename = "AnghaBench/linux/arch/arm/mach-imx/extr_ehci-imx27.c_mx27_initialize_usb_hw.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MX27_USB_BASE_ADDR = common local_unnamed_addr global i64 0, align 8
@USBCTRL_OTGBASE_OFFSET = common local_unnamed_addr global i64 0, align 8
@MX27_OTG_SIC_MASK = common local_unnamed_addr global i32 0, align 4
@MX27_OTG_PM_BIT = common local_unnamed_addr global i32 0, align 4
@MXC_EHCI_INTERFACE_MASK = common local_unnamed_addr global i32 0, align 4
@MX27_OTG_SIC_SHIFT = common local_unnamed_addr global i32 0, align 4
@MXC_EHCI_POWER_PINS_ENABLED = common local_unnamed_addr global i32 0, align 4
@MX27_H1_SIC_MASK = common local_unnamed_addr global i32 0, align 4
@MX27_H1_PM_BIT = common local_unnamed_addr global i32 0, align 4
@MX27_H1_DT_BIT = common local_unnamed_addr global i32 0, align 4
@MX27_H1_SIC_SHIFT = common local_unnamed_addr global i32 0, align 4
@MXC_EHCI_TTL_ENABLED = common local_unnamed_addr global i32 0, align 4
@MX27_H2_SIC_MASK = common local_unnamed_addr global i32 0, align 4
@MX27_H2_PM_BIT = common local_unnamed_addr global i32 0, align 4
@MX27_H2_DT_BIT = common local_unnamed_addr global i32 0, align 4
@MX27_H2_SIC_SHIFT = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @mx27_initialize_usb_hw(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i64, ptr @MX27_USB_BASE_ADDR, align 8, !tbaa !6
%4 = load i64, ptr @USBCTRL_OTGBASE_OFFSET, align 8, !tbaa !6
%5 = add nsw i64 %4, %3
%6 = tail call i32 @MX27_IO_ADDRESS(i64 noundef %5) #2
%7 = tail call i32 @readl(i32 noundef %6) #2
switch i32 %0, label %55 [
i32 0, label %8
i32 1, label %19
i32 2, label %37
]
8: ; preds = %2
%9 = load i32, ptr @MX27_OTG_SIC_MASK, align 4, !tbaa !10
%10 = load i32, ptr @MX27_OTG_PM_BIT, align 4, !tbaa !10
%11 = or i32 %10, %9
%12 = xor i32 %11, -1
%13 = and i32 %7, %12
%14 = load i32, ptr @MXC_EHCI_INTERFACE_MASK, align 4, !tbaa !10
%15 = and i32 %14, %1
%16 = load i32, ptr @MX27_OTG_SIC_SHIFT, align 4, !tbaa !10
%17 = shl i32 %15, %16
%18 = or i32 %17, %13
br label %58
19: ; preds = %2
%20 = load i32, ptr @MX27_H1_SIC_MASK, align 4, !tbaa !10
%21 = load i32, ptr @MX27_H1_PM_BIT, align 4, !tbaa !10
%22 = load i32, ptr @MX27_H1_DT_BIT, align 4, !tbaa !10
%23 = or i32 %21, %20
%24 = or i32 %23, %22
%25 = xor i32 %24, -1
%26 = and i32 %7, %25
%27 = load i32, ptr @MXC_EHCI_INTERFACE_MASK, align 4, !tbaa !10
%28 = and i32 %27, %1
%29 = load i32, ptr @MX27_H1_SIC_SHIFT, align 4, !tbaa !10
%30 = shl i32 %28, %29
%31 = or i32 %26, %30
%32 = load i32, ptr @MXC_EHCI_POWER_PINS_ENABLED, align 4, !tbaa !10
%33 = and i32 %32, %1
%34 = icmp eq i32 %33, 0
%35 = select i1 %34, i32 %21, i32 0
%36 = or i32 %31, %35
br label %58
37: ; preds = %2
%38 = load i32, ptr @MX27_H2_SIC_MASK, align 4, !tbaa !10
%39 = load i32, ptr @MX27_H2_PM_BIT, align 4, !tbaa !10
%40 = load i32, ptr @MX27_H2_DT_BIT, align 4, !tbaa !10
%41 = or i32 %39, %38
%42 = or i32 %41, %40
%43 = xor i32 %42, -1
%44 = and i32 %7, %43
%45 = load i32, ptr @MXC_EHCI_INTERFACE_MASK, align 4, !tbaa !10
%46 = and i32 %45, %1
%47 = load i32, ptr @MX27_H2_SIC_SHIFT, align 4, !tbaa !10
%48 = shl i32 %46, %47
%49 = or i32 %44, %48
%50 = load i32, ptr @MXC_EHCI_POWER_PINS_ENABLED, align 4, !tbaa !10
%51 = and i32 %50, %1
%52 = icmp eq i32 %51, 0
%53 = select i1 %52, i32 %39, i32 0
%54 = or i32 %49, %53
br label %58
55: ; preds = %2
%56 = load i32, ptr @EINVAL, align 4, !tbaa !10
%57 = sub nsw i32 0, %56
br label %72
58: ; preds = %37, %19, %8
%59 = phi ptr [ @MXC_EHCI_TTL_ENABLED, %37 ], [ @MXC_EHCI_TTL_ENABLED, %19 ], [ @MXC_EHCI_POWER_PINS_ENABLED, %8 ]
%60 = phi i32 [ %40, %37 ], [ %22, %19 ], [ %10, %8 ]
%61 = phi i32 [ %54, %37 ], [ %36, %19 ], [ %18, %8 ]
%62 = load i32, ptr %59, align 4, !tbaa !10
%63 = and i32 %62, %1
%64 = icmp eq i32 %63, 0
%65 = select i1 %64, i32 %60, i32 0
%66 = or i32 %61, %65
%67 = load i64, ptr @MX27_USB_BASE_ADDR, align 8, !tbaa !6
%68 = load i64, ptr @USBCTRL_OTGBASE_OFFSET, align 8, !tbaa !6
%69 = add nsw i64 %68, %67
%70 = tail call i32 @MX27_IO_ADDRESS(i64 noundef %69) #2
%71 = tail call i32 @writel(i32 noundef %66, i32 noundef %70) #2
br label %72
72: ; preds = %58, %55
%73 = phi i32 [ %57, %55 ], [ 0, %58 ]
ret i32 %73
}
declare i32 @readl(i32 noundef) local_unnamed_addr #1
declare i32 @MX27_IO_ADDRESS(i64 noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| linux_arch_arm_mach-imx_extr_ehci-imx27.c_mx27_initialize_usb_hw |
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Server.c_SiReleaseServer.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Server.c_SiReleaseServer.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @SiReleaseServer(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = load i32, ptr %0, align 4, !tbaa !5
%5 = tail call i64 @Release(i32 noundef %4) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = tail call i32 @SiCleanupServer(ptr noundef nonnull %0) #2
br label %9
9: ; preds = %1, %7, %3
ret void
}
declare i64 @Release(i32 noundef) local_unnamed_addr #1
declare i32 @SiCleanupServer(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Server.c_SiReleaseServer.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Server.c_SiReleaseServer.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @SiReleaseServer(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = load i32, ptr %0, align 4, !tbaa !6
%5 = tail call i64 @Release(i32 noundef %4) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = tail call i32 @SiCleanupServer(ptr noundef nonnull %0) #2
br label %9
9: ; preds = %1, %7, %3
ret void
}
declare i64 @Release(i32 noundef) local_unnamed_addr #1
declare i32 @SiCleanupServer(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| SoftEtherVPN_src_Cedar_extr_Server.c_SiReleaseServer |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/gvt/extr_sched_policy.c_vgpu_update_timeslice.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/gvt/extr_sched_policy.c_vgpu_update_timeslice.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.intel_vgpu = type { ptr, ptr }
%struct.vgpu_sched_data = type { ptr, ptr, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @vgpu_update_timeslice], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @vgpu_update_timeslice(ptr noundef readonly %0, ptr noundef %1) #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %19, label %4
4: ; preds = %2
%5 = getelementptr inbounds %struct.intel_vgpu, ptr %0, i64 0, i32 1
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = load ptr, ptr %6, align 8, !tbaa !10
%8 = icmp eq ptr %7, %0
br i1 %8, label %19, label %9
9: ; preds = %4
%10 = load ptr, ptr %0, align 8, !tbaa !12
%11 = load ptr, ptr %10, align 8, !tbaa !13
%12 = tail call ptr @ktime_sub(ptr noundef %1, ptr noundef %11) #2
%13 = getelementptr inbounds %struct.vgpu_sched_data, ptr %10, i64 0, i32 2
%14 = load i32, ptr %13, align 8, !tbaa !16
%15 = tail call i32 @ktime_add(i32 noundef %14, ptr noundef %12) #2
store i32 %15, ptr %13, align 8, !tbaa !16
%16 = getelementptr inbounds %struct.vgpu_sched_data, ptr %10, i64 0, i32 1
%17 = load ptr, ptr %16, align 8, !tbaa !17
%18 = tail call ptr @ktime_sub(ptr noundef %17, ptr noundef %12) #2
store ptr %18, ptr %16, align 8, !tbaa !17
store ptr %1, ptr %10, align 8, !tbaa !13
br label %19
19: ; preds = %2, %4, %9
ret void
}
declare ptr @ktime_sub(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ktime_add(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"intel_vgpu", !7, i64 0, !7, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"vgpu_sched_data", !7, i64 0, !7, i64 8, !15, i64 16}
!15 = !{!"int", !8, i64 0}
!16 = !{!14, !15, i64 16}
!17 = !{!14, !7, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/gvt/extr_sched_policy.c_vgpu_update_timeslice.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/gvt/extr_sched_policy.c_vgpu_update_timeslice.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @vgpu_update_timeslice], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @vgpu_update_timeslice(ptr noundef readonly %0, ptr noundef %1) #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %19, label %4
4: ; preds = %2
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = load ptr, ptr %6, align 8, !tbaa !11
%8 = icmp eq ptr %7, %0
br i1 %8, label %19, label %9
9: ; preds = %4
%10 = load ptr, ptr %0, align 8, !tbaa !13
%11 = load ptr, ptr %10, align 8, !tbaa !14
%12 = tail call ptr @ktime_sub(ptr noundef %1, ptr noundef %11) #2
%13 = getelementptr inbounds i8, ptr %10, i64 16
%14 = load i32, ptr %13, align 8, !tbaa !17
%15 = tail call i32 @ktime_add(i32 noundef %14, ptr noundef %12) #2
store i32 %15, ptr %13, align 8, !tbaa !17
%16 = getelementptr inbounds i8, ptr %10, i64 8
%17 = load ptr, ptr %16, align 8, !tbaa !18
%18 = tail call ptr @ktime_sub(ptr noundef %17, ptr noundef %12) #2
store ptr %18, ptr %16, align 8, !tbaa !18
store ptr %1, ptr %10, align 8, !tbaa !14
br label %19
19: ; preds = %2, %4, %9
ret void
}
declare ptr @ktime_sub(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ktime_add(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"intel_vgpu", !8, i64 0, !8, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_2__", !8, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!15, !8, i64 0}
!15 = !{!"vgpu_sched_data", !8, i64 0, !8, i64 8, !16, i64 16}
!16 = !{!"int", !9, i64 0}
!17 = !{!15, !16, i64 16}
!18 = !{!15, !8, i64 8}
| linux_drivers_gpu_drm_i915_gvt_extr_sched_policy.c_vgpu_update_timeslice |
; ModuleID = 'AnghaBench/linux/drivers/hwmon/extr_w83781d.c_pwm2_enable_show.c'
source_filename = "AnghaBench/linux/drivers/hwmon/extr_w83781d.c_pwm2_enable_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @pwm2_enable_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @pwm2_enable_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @w83781d_update_device(ptr noundef %0) #2
%5 = load i64, ptr %4, align 8, !tbaa !5
%6 = trunc i64 %5 to i32
%7 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, i32 noundef %6) #2
ret i32 %7
}
declare ptr @w83781d_update_device(ptr noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"w83781d_data", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/hwmon/extr_w83781d.c_pwm2_enable_show.c'
source_filename = "AnghaBench/linux/drivers/hwmon/extr_w83781d.c_pwm2_enable_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @pwm2_enable_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @pwm2_enable_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @w83781d_update_device(ptr noundef %0) #2
%5 = load i64, ptr %4, align 8, !tbaa !6
%6 = trunc i64 %5 to i32
%7 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, i32 noundef %6) #2
ret i32 %7
}
declare ptr @w83781d_update_device(ptr noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"w83781d_data", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_hwmon_extr_w83781d.c_pwm2_enable_show |
; ModuleID = 'AnghaBench/freebsd/sys/dev/sound/pci/extr_hdspe.c_hdspe_probe.c'
source_filename = "AnghaBench/freebsd/sys/dev/sound/pci/extr_hdspe.c_hdspe_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PCI_VENDOR_XILINX = dso_local local_unnamed_addr global i64 0, align 8
@PCI_DEVICE_XILINX_HDSPE = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [14 x i8] c"RME HDSPe AIO\00", align 1
@.str.1 = private unnamed_addr constant [17 x i8] c"RME HDSPe RayDAT\00", align 1
@ENXIO = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @hdspe_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @hdspe_probe(i32 noundef %0) #0 {
%2 = tail call i64 @pci_get_vendor(i32 noundef %0) #2
%3 = load i64, ptr @PCI_VENDOR_XILINX, align 8, !tbaa !5
%4 = icmp eq i64 %2, %3
br i1 %4, label %5, label %15
5: ; preds = %1
%6 = tail call i64 @pci_get_device(i32 noundef %0) #2
%7 = load i64, ptr @PCI_DEVICE_XILINX_HDSPE, align 8, !tbaa !5
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = tail call i32 @pci_get_revid(i32 noundef %0) #2
switch i32 %10, label %15 [
i32 129, label %11
i32 128, label %13
]
11: ; preds = %9
%12 = tail call i32 @device_set_desc(i32 noundef %0, ptr noundef nonnull @.str) #2
br label %17
13: ; preds = %9
%14 = tail call i32 @device_set_desc(i32 noundef %0, ptr noundef nonnull @.str.1) #2
br label %17
15: ; preds = %9, %5, %1
%16 = load i32, ptr @ENXIO, align 4, !tbaa !9
br label %17
17: ; preds = %15, %13, %11
%18 = phi i32 [ %16, %15 ], [ 0, %13 ], [ 0, %11 ]
ret i32 %18
}
declare i64 @pci_get_vendor(i32 noundef) local_unnamed_addr #1
declare i64 @pci_get_device(i32 noundef) local_unnamed_addr #1
declare i32 @pci_get_revid(i32 noundef) local_unnamed_addr #1
declare i32 @device_set_desc(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/sound/pci/extr_hdspe.c_hdspe_probe.c'
source_filename = "AnghaBench/freebsd/sys/dev/sound/pci/extr_hdspe.c_hdspe_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PCI_VENDOR_XILINX = common local_unnamed_addr global i64 0, align 8
@PCI_DEVICE_XILINX_HDSPE = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [14 x i8] c"RME HDSPe AIO\00", align 1
@.str.1 = private unnamed_addr constant [17 x i8] c"RME HDSPe RayDAT\00", align 1
@ENXIO = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @hdspe_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @hdspe_probe(i32 noundef %0) #0 {
%2 = tail call i64 @pci_get_vendor(i32 noundef %0) #2
%3 = load i64, ptr @PCI_VENDOR_XILINX, align 8, !tbaa !6
%4 = icmp eq i64 %2, %3
br i1 %4, label %5, label %15
5: ; preds = %1
%6 = tail call i64 @pci_get_device(i32 noundef %0) #2
%7 = load i64, ptr @PCI_DEVICE_XILINX_HDSPE, align 8, !tbaa !6
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = tail call i32 @pci_get_revid(i32 noundef %0) #2
switch i32 %10, label %15 [
i32 129, label %11
i32 128, label %13
]
11: ; preds = %9
%12 = tail call i32 @device_set_desc(i32 noundef %0, ptr noundef nonnull @.str) #2
br label %17
13: ; preds = %9
%14 = tail call i32 @device_set_desc(i32 noundef %0, ptr noundef nonnull @.str.1) #2
br label %17
15: ; preds = %9, %5, %1
%16 = load i32, ptr @ENXIO, align 4, !tbaa !10
br label %17
17: ; preds = %15, %13, %11
%18 = phi i32 [ %16, %15 ], [ 0, %13 ], [ 0, %11 ]
ret i32 %18
}
declare i64 @pci_get_vendor(i32 noundef) local_unnamed_addr #1
declare i64 @pci_get_device(i32 noundef) local_unnamed_addr #1
declare i32 @pci_get_revid(i32 noundef) local_unnamed_addr #1
declare i32 @device_set_desc(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| freebsd_sys_dev_sound_pci_extr_hdspe.c_hdspe_probe |
; ModuleID = 'AnghaBench/freebsd/sys/sparc64/sbus/extr_dma_sbus.c_dma_get_devinfo.c'
source_filename = "AnghaBench/freebsd/sys/sparc64/sbus/extr_dma_sbus.c_dma_get_devinfo.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @dma_get_devinfo], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @dma_get_devinfo(i32 %0, i32 noundef %1) #0 {
%3 = tail call ptr @device_get_ivars(i32 noundef %1) #2
ret ptr %3
}
declare ptr @device_get_ivars(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/sys/sparc64/sbus/extr_dma_sbus.c_dma_get_devinfo.c'
source_filename = "AnghaBench/freebsd/sys/sparc64/sbus/extr_dma_sbus.c_dma_get_devinfo.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @dma_get_devinfo], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @dma_get_devinfo(i32 %0, i32 noundef %1) #0 {
%3 = tail call ptr @device_get_ivars(i32 noundef %1) #2
ret ptr %3
}
declare ptr @device_get_ivars(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_sys_sparc64_sbus_extr_dma_sbus.c_dma_get_devinfo |
; ModuleID = 'AnghaBench/macvim/src/extr_gui_w48.c_gui_mch_clear_all.c'
source_filename = "AnghaBench/macvim/src/extr_gui_w48.c_gui_mch_clear_all.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, i32, i32 }
%struct.TYPE_4__ = type { i32, i32, i64, i64 }
@Columns = dso_local local_unnamed_addr global i32 0, align 4
@gui = dso_local local_unnamed_addr global %struct.TYPE_5__ zeroinitializer, align 4
@Rows = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @gui_mch_clear_all() local_unnamed_addr #0 {
%1 = alloca %struct.TYPE_4__, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %1) #4
%2 = getelementptr inbounds %struct.TYPE_4__, ptr %1, i64 0, i32 2
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %2, i8 0, i64 16, i1 false)
%3 = load i32, ptr @Columns, align 4, !tbaa !5
%4 = load i32, ptr @gui, align 4, !tbaa !9
%5 = mul nsw i32 %4, %3
%6 = load i32, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @gui, i64 0, i32 1), align 4, !tbaa !11
%7 = shl nsw i32 %6, 1
%8 = add nsw i32 %7, %5
store i32 %8, ptr %1, align 8, !tbaa !12
%9 = load i32, ptr @Rows, align 4, !tbaa !5
%10 = load i32, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @gui, i64 0, i32 2), align 4, !tbaa !15
%11 = mul nsw i32 %10, %9
%12 = add nsw i32 %11, %7
%13 = getelementptr inbounds %struct.TYPE_4__, ptr %1, i64 0, i32 1
store i32 %12, ptr %13, align 4, !tbaa !16
%14 = call i32 @clear_rect(ptr noundef nonnull %1) #4
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %1) #4
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @clear_rect(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_5__", !6, i64 0, !6, i64 4, !6, i64 8}
!11 = !{!10, !6, i64 4}
!12 = !{!13, !6, i64 0}
!13 = !{!"TYPE_4__", !6, i64 0, !6, i64 4, !14, i64 8, !14, i64 16}
!14 = !{!"long", !7, i64 0}
!15 = !{!10, !6, i64 8}
!16 = !{!13, !6, i64 4}
| ; ModuleID = 'AnghaBench/macvim/src/extr_gui_w48.c_gui_mch_clear_all.c'
source_filename = "AnghaBench/macvim/src/extr_gui_w48.c_gui_mch_clear_all.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_5__ = type { i32, i32, i32 }
%struct.TYPE_4__ = type { i32, i32, i64, i64 }
@Columns = common local_unnamed_addr global i32 0, align 4
@gui = common local_unnamed_addr global %struct.TYPE_5__ zeroinitializer, align 4
@Rows = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @gui_mch_clear_all() local_unnamed_addr #0 {
%1 = alloca %struct.TYPE_4__, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %1) #4
%2 = getelementptr inbounds i8, ptr %1, i64 8
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %2, i8 0, i64 16, i1 false)
%3 = load i32, ptr @Columns, align 4, !tbaa !6
%4 = load i32, ptr @gui, align 4, !tbaa !10
%5 = mul nsw i32 %4, %3
%6 = load i32, ptr getelementptr inbounds (i8, ptr @gui, i64 4), align 4, !tbaa !12
%7 = shl nsw i32 %6, 1
%8 = add nsw i32 %7, %5
store i32 %8, ptr %1, align 8, !tbaa !13
%9 = load i32, ptr @Rows, align 4, !tbaa !6
%10 = load i32, ptr getelementptr inbounds (i8, ptr @gui, i64 8), align 4, !tbaa !16
%11 = mul nsw i32 %10, %9
%12 = add nsw i32 %11, %7
%13 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %12, ptr %13, align 4, !tbaa !17
%14 = call i32 @clear_rect(ptr noundef nonnull %1) #4
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %1) #4
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @clear_rect(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_5__", !7, i64 0, !7, i64 4, !7, i64 8}
!12 = !{!11, !7, i64 4}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_4__", !7, i64 0, !7, i64 4, !15, i64 8, !15, i64 16}
!15 = !{!"long", !8, i64 0}
!16 = !{!11, !7, i64 8}
!17 = !{!14, !7, i64 4}
| macvim_src_extr_gui_w48.c_gui_mch_clear_all |
; ModuleID = 'AnghaBench/fastsocket/kernel/net/sched/extr_sch_sfq.c_sfq_dec.c'
source_filename = "AnghaBench/fastsocket/kernel/net/sched/extr_sch_sfq.c_sfq_dec.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sfq_sched_data = type { i64, ptr, ptr }
%struct.TYPE_4__ = type { i64, i64 }
%struct.TYPE_3__ = type { i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @sfq_dec], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @sfq_dec(ptr noundef %0, i64 noundef %1) #0 {
%3 = getelementptr inbounds %struct.sfq_sched_data, ptr %0, i64 0, i32 2
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.TYPE_4__, ptr %4, i64 %1
%6 = load i64, ptr %5, align 8, !tbaa !11
%7 = getelementptr inbounds %struct.TYPE_4__, ptr %4, i64 %1, i32 1
%8 = load i64, ptr %7, align 8, !tbaa !13
%9 = getelementptr inbounds %struct.TYPE_4__, ptr %4, i64 %8
store i64 %6, ptr %9, align 8, !tbaa !11
%10 = getelementptr inbounds %struct.TYPE_4__, ptr %4, i64 %6, i32 1
store i64 %8, ptr %10, align 8, !tbaa !13
%11 = icmp eq i64 %6, %8
br i1 %11, label %12, label %22
12: ; preds = %2
%13 = load i64, ptr %0, align 8, !tbaa !14
%14 = getelementptr inbounds %struct.sfq_sched_data, ptr %0, i64 0, i32 1
%15 = load ptr, ptr %14, align 8, !tbaa !15
%16 = getelementptr inbounds %struct.TYPE_3__, ptr %15, i64 %1
%17 = load i64, ptr %16, align 8, !tbaa !16
%18 = add nsw i64 %17, 1
%19 = icmp eq i64 %13, %18
br i1 %19, label %20, label %22
20: ; preds = %12
%21 = add nsw i64 %13, -1
store i64 %21, ptr %0, align 8, !tbaa !14
br label %22
22: ; preds = %20, %12, %2
%23 = tail call i32 @sfq_link(ptr noundef nonnull %0, i64 noundef %1) #2
ret void
}
declare i32 @sfq_link(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"sfq_sched_data", !7, i64 0, !10, i64 8, !10, i64 16}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"TYPE_4__", !7, i64 0, !7, i64 8}
!13 = !{!12, !7, i64 8}
!14 = !{!6, !7, i64 0}
!15 = !{!6, !10, i64 8}
!16 = !{!17, !7, i64 0}
!17 = !{!"TYPE_3__", !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/sched/extr_sch_sfq.c_sfq_dec.c'
source_filename = "AnghaBench/fastsocket/kernel/net/sched/extr_sch_sfq.c_sfq_dec.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i64, i64 }
%struct.TYPE_3__ = type { i64 }
@llvm.used = appending global [1 x ptr] [ptr @sfq_dec], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @sfq_dec(ptr noundef %0, i64 noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 16
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = getelementptr inbounds %struct.TYPE_4__, ptr %4, i64 %1
%6 = load i64, ptr %5, align 8, !tbaa !12
%7 = getelementptr inbounds i8, ptr %5, i64 8
%8 = load i64, ptr %7, align 8, !tbaa !14
%9 = getelementptr inbounds %struct.TYPE_4__, ptr %4, i64 %8
store i64 %6, ptr %9, align 8, !tbaa !12
%10 = getelementptr inbounds %struct.TYPE_4__, ptr %4, i64 %6, i32 1
store i64 %8, ptr %10, align 8, !tbaa !14
%11 = icmp eq i64 %6, %8
br i1 %11, label %12, label %22
12: ; preds = %2
%13 = load i64, ptr %0, align 8, !tbaa !15
%14 = getelementptr inbounds i8, ptr %0, i64 8
%15 = load ptr, ptr %14, align 8, !tbaa !16
%16 = getelementptr inbounds %struct.TYPE_3__, ptr %15, i64 %1
%17 = load i64, ptr %16, align 8, !tbaa !17
%18 = add nsw i64 %17, 1
%19 = icmp eq i64 %13, %18
br i1 %19, label %20, label %22
20: ; preds = %12
%21 = add nsw i64 %13, -1
store i64 %21, ptr %0, align 8, !tbaa !15
br label %22
22: ; preds = %20, %12, %2
%23 = tail call i32 @sfq_link(ptr noundef nonnull %0, i64 noundef %1) #2
ret void
}
declare i32 @sfq_link(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"sfq_sched_data", !8, i64 0, !11, i64 8, !11, i64 16}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"TYPE_4__", !8, i64 0, !8, i64 8}
!14 = !{!13, !8, i64 8}
!15 = !{!7, !8, i64 0}
!16 = !{!7, !11, i64 8}
!17 = !{!18, !8, i64 0}
!18 = !{!"TYPE_3__", !8, i64 0}
| fastsocket_kernel_net_sched_extr_sch_sfq.c_sfq_dec |
; ModuleID = 'AnghaBench/lab/engine/code/bspc/extr_gldraw.c_Draw_SetGrey.c'
source_filename = "AnghaBench/lab/engine/code/bspc/extr_gldraw.c_Draw_SetGrey.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@drawflag = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @Draw_SetGrey() local_unnamed_addr #0 {
%1 = load i32, ptr @drawflag, align 4, !tbaa !5
%2 = icmp eq i32 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @glColor3f(double noundef 5.000000e-01, double noundef 5.000000e-01, double noundef 5.000000e-01) #2
br label %5
5: ; preds = %0, %3
ret void
}
declare i32 @glColor3f(double noundef, double noundef, double noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/lab/engine/code/bspc/extr_gldraw.c_Draw_SetGrey.c'
source_filename = "AnghaBench/lab/engine/code/bspc/extr_gldraw.c_Draw_SetGrey.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@drawflag = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @Draw_SetGrey() local_unnamed_addr #0 {
%1 = load i32, ptr @drawflag, align 4, !tbaa !6
%2 = icmp eq i32 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @glColor3f(double noundef 5.000000e-01, double noundef 5.000000e-01, double noundef 5.000000e-01) #2
br label %5
5: ; preds = %0, %3
ret void
}
declare i32 @glColor3f(double noundef, double noundef, double noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| lab_engine_code_bspc_extr_gldraw.c_Draw_SetGrey |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/oprofile/extr_op_model_arm11_core.c_arm11_stop_pmu.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/oprofile/extr_op_model_arm11_core.c_arm11_stop_pmu.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PMCR_E = dso_local local_unnamed_addr global i32 0, align 4
@PMN0 = dso_local local_unnamed_addr global i32 0, align 4
@CCNT = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @arm11_stop_pmu() local_unnamed_addr #0 {
%1 = tail call i32 (...) @arm11_read_pmnc() #2
%2 = load i32, ptr @PMCR_E, align 4, !tbaa !5
%3 = xor i32 %2, -1
%4 = and i32 %1, %3
%5 = tail call i32 @arm11_write_pmnc(i32 noundef %4) #2
%6 = load i32, ptr @PMN0, align 4, !tbaa !5
%7 = load i32, ptr @CCNT, align 4, !tbaa !5
%8 = icmp ugt i32 %6, %7
br i1 %8, label %15, label %9
9: ; preds = %0, %9
%10 = phi i32 [ %12, %9 ], [ %6, %0 ]
%11 = tail call i32 @arm11_reset_counter(i32 noundef %10) #2
%12 = add i32 %10, 1
%13 = load i32, ptr @CCNT, align 4, !tbaa !5
%14 = icmp ugt i32 %12, %13
br i1 %14, label %15, label %9, !llvm.loop !9
15: ; preds = %9, %0
ret i32 0
}
declare i32 @arm11_write_pmnc(i32 noundef) local_unnamed_addr #1
declare i32 @arm11_read_pmnc(...) local_unnamed_addr #1
declare i32 @arm11_reset_counter(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/oprofile/extr_op_model_arm11_core.c_arm11_stop_pmu.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/oprofile/extr_op_model_arm11_core.c_arm11_stop_pmu.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PMCR_E = common local_unnamed_addr global i32 0, align 4
@PMN0 = common local_unnamed_addr global i32 0, align 4
@CCNT = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @arm11_stop_pmu() local_unnamed_addr #0 {
%1 = tail call i32 @arm11_read_pmnc() #2
%2 = load i32, ptr @PMCR_E, align 4, !tbaa !6
%3 = xor i32 %2, -1
%4 = and i32 %1, %3
%5 = tail call i32 @arm11_write_pmnc(i32 noundef %4) #2
%6 = load i32, ptr @PMN0, align 4, !tbaa !6
%7 = load i32, ptr @CCNT, align 4, !tbaa !6
%8 = icmp ugt i32 %6, %7
br i1 %8, label %15, label %9
9: ; preds = %0, %9
%10 = phi i32 [ %12, %9 ], [ %6, %0 ]
%11 = tail call i32 @arm11_reset_counter(i32 noundef %10) #2
%12 = add i32 %10, 1
%13 = load i32, ptr @CCNT, align 4, !tbaa !6
%14 = icmp ugt i32 %12, %13
br i1 %14, label %15, label %9, !llvm.loop !10
15: ; preds = %9, %0
ret i32 0
}
declare i32 @arm11_write_pmnc(i32 noundef) local_unnamed_addr #1
declare i32 @arm11_read_pmnc(...) local_unnamed_addr #1
declare i32 @arm11_reset_counter(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| fastsocket_kernel_arch_arm_oprofile_extr_op_model_arm11_core.c_arm11_stop_pmu |
; ModuleID = 'AnghaBench/beanstalkd/ct/extr_ct.c_ctsetbytes.c'
source_filename = "AnghaBench/beanstalkd/ct/extr_ct.c_ctsetbytes.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@bbytes = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable
define dso_local void @ctsetbytes(i32 noundef %0) local_unnamed_addr #0 {
%2 = sext i32 %0 to i64
store i64 %2, ptr @bbytes, align 8, !tbaa !5
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/beanstalkd/ct/extr_ct.c_ctsetbytes.c'
source_filename = "AnghaBench/beanstalkd/ct/extr_ct.c_ctsetbytes.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@bbytes = common local_unnamed_addr global i64 0, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable(sync)
define void @ctsetbytes(i32 noundef %0) local_unnamed_addr #0 {
%2 = sext i32 %0 to i64
store i64 %2, ptr @bbytes, align 8, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| beanstalkd_ct_extr_ct.c_ctsetbytes |
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_utils.c_set_width.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_utils.c_set_width.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@chars_per_line = dso_local local_unnamed_addr global i64 0, align 8
@wrap_buffer = dso_local local_unnamed_addr global ptr null, align 8
@wrap_pointer = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @set_width], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @set_width() #0 {
%1 = load i64, ptr @chars_per_line, align 8, !tbaa !5
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @init_page_info() #2
br label %5
5: ; preds = %3, %0
%6 = load ptr, ptr @wrap_buffer, align 8, !tbaa !9
%7 = icmp eq ptr %6, null
%8 = load i64, ptr @chars_per_line, align 8, !tbaa !5
%9 = add nsw i64 %8, 2
br i1 %7, label %10, label %14
10: ; preds = %5
%11 = tail call i64 @xmalloc(i64 noundef %9) #2
%12 = inttoptr i64 %11 to ptr
store ptr %12, ptr @wrap_buffer, align 8, !tbaa !9
store i8 0, ptr %12, align 1, !tbaa !11
%13 = load ptr, ptr @wrap_buffer, align 8, !tbaa !9
br label %17
14: ; preds = %5
%15 = tail call i64 @xrealloc(ptr noundef nonnull %6, i64 noundef %9) #2
%16 = inttoptr i64 %15 to ptr
store ptr %16, ptr @wrap_buffer, align 8, !tbaa !9
br label %17
17: ; preds = %14, %10
%18 = phi ptr [ %16, %14 ], [ %13, %10 ]
store ptr %18, ptr @wrap_pointer, align 8, !tbaa !9
ret void
}
declare i32 @init_page_info(...) local_unnamed_addr #1
declare i64 @xmalloc(i64 noundef) local_unnamed_addr #1
declare i64 @xrealloc(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_utils.c_set_width.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_utils.c_set_width.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@chars_per_line = common local_unnamed_addr global i64 0, align 8
@wrap_buffer = common local_unnamed_addr global ptr null, align 8
@wrap_pointer = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @set_width], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @set_width() #0 {
%1 = load i64, ptr @chars_per_line, align 8, !tbaa !6
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @init_page_info() #2
br label %5
5: ; preds = %3, %0
%6 = load ptr, ptr @wrap_buffer, align 8, !tbaa !10
%7 = icmp eq ptr %6, null
%8 = load i64, ptr @chars_per_line, align 8, !tbaa !6
%9 = add nsw i64 %8, 2
br i1 %7, label %10, label %14
10: ; preds = %5
%11 = tail call i64 @xmalloc(i64 noundef %9) #2
%12 = inttoptr i64 %11 to ptr
store ptr %12, ptr @wrap_buffer, align 8, !tbaa !10
store i8 0, ptr %12, align 1, !tbaa !12
%13 = load ptr, ptr @wrap_buffer, align 8, !tbaa !10
br label %17
14: ; preds = %5
%15 = tail call i64 @xrealloc(ptr noundef nonnull %6, i64 noundef %9) #2
%16 = inttoptr i64 %15 to ptr
store ptr %16, ptr @wrap_buffer, align 8, !tbaa !10
br label %17
17: ; preds = %14, %10
%18 = phi ptr [ %16, %14 ], [ %13, %10 ]
store ptr %18, ptr @wrap_pointer, align 8, !tbaa !10
ret void
}
declare i32 @init_page_info(...) local_unnamed_addr #1
declare i64 @xmalloc(i64 noundef) local_unnamed_addr #1
declare i64 @xrealloc(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!8, !8, i64 0}
| freebsd_contrib_gdb_gdb_extr_utils.c_set_width |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/nouveau/nvkm/engine/sw/extr_gf100.c_gf100_sw_chan_mthd.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/nouveau/nvkm/engine/sw/extr_gf100.c_gf100_sw_chan_mthd.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.nv50_sw_chan = type { %struct.TYPE_12__, %struct.TYPE_8__ }
%struct.TYPE_12__ = type { i32, i32, ptr }
%struct.TYPE_8__ = type { %struct.TYPE_7__ }
%struct.TYPE_7__ = type { ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @gf100_sw_chan_mthd], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @gf100_sw_chan_mthd(ptr noundef %0, i32 %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = tail call ptr @nv50_sw_chan(ptr noundef %0) #2
%6 = getelementptr inbounds %struct.nv50_sw_chan, ptr %5, i64 0, i32 1
%7 = load ptr, ptr %6, align 8, !tbaa !5
%8 = load ptr, ptr %7, align 8, !tbaa !14
switch i32 %2, label %31 [
i32 1024, label %32
i32 1028, label %9
i32 1032, label %10
i32 1036, label %12
i32 1536, label %22
i32 1604, label %24
i32 1708, label %29
]
9: ; preds = %4
store i32 %3, ptr %5, align 8, !tbaa !17
br label %32
10: ; preds = %4
%11 = getelementptr inbounds %struct.TYPE_12__, ptr %5, i64 0, i32 1
store i32 %3, ptr %11, align 4, !tbaa !18
br label %32
12: ; preds = %4
%13 = load ptr, ptr %8, align 8, !tbaa !19
%14 = load i32, ptr %13, align 4, !tbaa !21
%15 = icmp sgt i32 %14, %3
br i1 %15, label %16, label %31
16: ; preds = %12
%17 = getelementptr inbounds %struct.TYPE_12__, ptr %5, i64 0, i32 2
%18 = load ptr, ptr %17, align 8, !tbaa !24
%19 = sext i32 %3 to i64
%20 = getelementptr inbounds i32, ptr %18, i64 %19
%21 = tail call i32 @nvkm_notify_get(ptr noundef %20) #2
br label %32
22: ; preds = %4
%23 = tail call i32 @nvkm_wr32(ptr noundef %8, i32 noundef 4300288, i32 noundef %3) #2
br label %32
24: ; preds = %4
%25 = and i32 %3, -2097151
%26 = icmp eq i32 %25, 0
br i1 %26, label %27, label %31
27: ; preds = %24
%28 = tail call i32 @nvkm_wr32(ptr noundef %8, i32 noundef 4300356, i32 noundef %3) #2
br label %32
29: ; preds = %4
%30 = tail call i32 @nvkm_wr32(ptr noundef %8, i32 noundef 4300460, i32 noundef %3) #2
br label %32
31: ; preds = %4, %24, %12
br label %32
32: ; preds = %4, %31, %29, %27, %22, %16, %10, %9
%33 = phi i32 [ 0, %31 ], [ 1, %29 ], [ 1, %27 ], [ 1, %22 ], [ 1, %16 ], [ 1, %10 ], [ 1, %9 ], [ 1, %4 ]
ret i32 %33
}
declare ptr @nv50_sw_chan(ptr noundef) local_unnamed_addr #1
declare i32 @nvkm_notify_get(ptr noundef) local_unnamed_addr #1
declare i32 @nvkm_wr32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 16}
!6 = !{!"nv50_sw_chan", !7, i64 0, !12, i64 16}
!7 = !{!"TYPE_12__", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"TYPE_8__", !13, i64 0}
!13 = !{!"TYPE_7__", !11, i64 0}
!14 = !{!15, !11, i64 0}
!15 = !{!"nvkm_engine", !16, i64 0}
!16 = !{!"TYPE_9__", !11, i64 0}
!17 = !{!6, !8, i64 0}
!18 = !{!6, !8, i64 4}
!19 = !{!20, !11, i64 0}
!20 = !{!"nvkm_device", !11, i64 0}
!21 = !{!22, !8, i64 0}
!22 = !{!"TYPE_11__", !23, i64 0}
!23 = !{!"TYPE_10__", !8, i64 0}
!24 = !{!6, !11, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/nouveau/nvkm/engine/sw/extr_gf100.c_gf100_sw_chan_mthd.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/nouveau/nvkm/engine/sw/extr_gf100.c_gf100_sw_chan_mthd.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @gf100_sw_chan_mthd], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @gf100_sw_chan_mthd(ptr noundef %0, i32 %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = tail call ptr @nv50_sw_chan(ptr noundef %0) #2
%6 = getelementptr inbounds i8, ptr %5, i64 16
%7 = load ptr, ptr %6, align 8, !tbaa !6
%8 = load ptr, ptr %7, align 8, !tbaa !15
switch i32 %2, label %31 [
i32 1024, label %32
i32 1028, label %9
i32 1032, label %10
i32 1036, label %12
i32 1536, label %22
i32 1604, label %24
i32 1708, label %29
]
9: ; preds = %4
store i32 %3, ptr %5, align 8, !tbaa !18
br label %32
10: ; preds = %4
%11 = getelementptr inbounds i8, ptr %5, i64 4
store i32 %3, ptr %11, align 4, !tbaa !19
br label %32
12: ; preds = %4
%13 = load ptr, ptr %8, align 8, !tbaa !20
%14 = load i32, ptr %13, align 4, !tbaa !22
%15 = icmp sgt i32 %14, %3
br i1 %15, label %16, label %31
16: ; preds = %12
%17 = getelementptr inbounds i8, ptr %5, i64 8
%18 = load ptr, ptr %17, align 8, !tbaa !25
%19 = sext i32 %3 to i64
%20 = getelementptr inbounds i32, ptr %18, i64 %19
%21 = tail call i32 @nvkm_notify_get(ptr noundef %20) #2
br label %32
22: ; preds = %4
%23 = tail call i32 @nvkm_wr32(ptr noundef %8, i32 noundef 4300288, i32 noundef %3) #2
br label %32
24: ; preds = %4
%25 = and i32 %3, -2097151
%26 = icmp eq i32 %25, 0
br i1 %26, label %27, label %31
27: ; preds = %24
%28 = tail call i32 @nvkm_wr32(ptr noundef %8, i32 noundef 4300356, i32 noundef %3) #2
br label %32
29: ; preds = %4
%30 = tail call i32 @nvkm_wr32(ptr noundef %8, i32 noundef 4300460, i32 noundef %3) #2
br label %32
31: ; preds = %4, %24, %12
br label %32
32: ; preds = %4, %31, %29, %27, %22, %16, %10, %9
%33 = phi i32 [ 0, %31 ], [ 1, %29 ], [ 1, %27 ], [ 1, %22 ], [ 1, %16 ], [ 1, %10 ], [ 1, %9 ], [ 1, %4 ]
ret i32 %33
}
declare ptr @nv50_sw_chan(ptr noundef) local_unnamed_addr #1
declare i32 @nvkm_notify_get(ptr noundef) local_unnamed_addr #1
declare i32 @nvkm_wr32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 16}
!7 = !{!"nv50_sw_chan", !8, i64 0, !13, i64 16}
!8 = !{!"TYPE_12__", !9, i64 0, !9, i64 4, !12, i64 8}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!"TYPE_8__", !14, i64 0}
!14 = !{!"TYPE_7__", !12, i64 0}
!15 = !{!16, !12, i64 0}
!16 = !{!"nvkm_engine", !17, i64 0}
!17 = !{!"TYPE_9__", !12, i64 0}
!18 = !{!7, !9, i64 0}
!19 = !{!7, !9, i64 4}
!20 = !{!21, !12, i64 0}
!21 = !{!"nvkm_device", !12, i64 0}
!22 = !{!23, !9, i64 0}
!23 = !{!"TYPE_11__", !24, i64 0}
!24 = !{!"TYPE_10__", !9, i64 0}
!25 = !{!7, !12, i64 8}
| linux_drivers_gpu_drm_nouveau_nvkm_engine_sw_extr_gf100.c_gf100_sw_chan_mthd |
; ModuleID = 'AnghaBench/linux/drivers/phy/extr_phy-core.c_phy_pm_runtime_put_sync.c'
source_filename = "AnghaBench/linux/drivers/phy/extr_phy-core.c_phy_pm_runtime_put_sync.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ENOTSUPP = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @phy_pm_runtime_put_sync(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %11, label %3
3: ; preds = %1
%4 = tail call i32 @pm_runtime_enabled(ptr noundef nonnull %0) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, ptr @ENOTSUPP, align 4, !tbaa !5
%8 = sub nsw i32 0, %7
br label %11
9: ; preds = %3
%10 = tail call i32 @pm_runtime_put_sync(ptr noundef nonnull %0) #2
br label %11
11: ; preds = %1, %9, %6
%12 = phi i32 [ %10, %9 ], [ %8, %6 ], [ 0, %1 ]
ret i32 %12
}
declare i32 @pm_runtime_enabled(ptr noundef) local_unnamed_addr #1
declare i32 @pm_runtime_put_sync(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/phy/extr_phy-core.c_phy_pm_runtime_put_sync.c'
source_filename = "AnghaBench/linux/drivers/phy/extr_phy-core.c_phy_pm_runtime_put_sync.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENOTSUPP = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @phy_pm_runtime_put_sync(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %11, label %3
3: ; preds = %1
%4 = tail call i32 @pm_runtime_enabled(ptr noundef nonnull %0) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, ptr @ENOTSUPP, align 4, !tbaa !6
%8 = sub nsw i32 0, %7
br label %11
9: ; preds = %3
%10 = tail call i32 @pm_runtime_put_sync(ptr noundef nonnull %0) #2
br label %11
11: ; preds = %1, %9, %6
%12 = phi i32 [ %10, %9 ], [ %8, %6 ], [ 0, %1 ]
ret i32 %12
}
declare i32 @pm_runtime_enabled(ptr noundef) local_unnamed_addr #1
declare i32 @pm_runtime_put_sync(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_phy_extr_phy-core.c_phy_pm_runtime_put_sync |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/extr_comedidev.h_alloc_subdevices.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/extr_comedidev.h_alloc_subdevices.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.comedi_device = type { i32, ptr }
%struct.TYPE_2__ = type { i32, i32, i32, ptr }
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@DMA_NONE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @alloc_subdevices], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @alloc_subdevices(ptr noundef %0, i32 noundef %1) #0 {
store i32 %1, ptr %0, align 8, !tbaa !5
%3 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !11
%4 = tail call ptr @kcalloc(i32 noundef %1, i32 noundef 4, i32 noundef %3) #2
%5 = getelementptr inbounds %struct.comedi_device, ptr %0, i64 0, i32 1
store ptr %4, ptr %5, align 8, !tbaa !12
%6 = icmp eq ptr %4, null
br i1 %6, label %11, label %7
7: ; preds = %2
%8 = icmp eq i32 %1, 0
br i1 %8, label %26, label %9
9: ; preds = %7
%10 = zext i32 %1 to i64
br label %14
11: ; preds = %2
%12 = load i32, ptr @ENOMEM, align 4, !tbaa !11
%13 = sub nsw i32 0, %12
br label %26
14: ; preds = %9, %14
%15 = phi ptr [ %4, %9 ], [ %22, %14 ]
%16 = phi i64 [ 0, %9 ], [ %24, %14 ]
%17 = getelementptr inbounds %struct.TYPE_2__, ptr %15, i64 %16, i32 3
store ptr %0, ptr %17, align 8, !tbaa !13
%18 = load i32, ptr @DMA_NONE, align 4, !tbaa !11
%19 = getelementptr inbounds %struct.TYPE_2__, ptr %15, i64 %16, i32 2
store i32 %18, ptr %19, align 8, !tbaa !15
%20 = getelementptr inbounds %struct.TYPE_2__, ptr %15, i64 %16, i32 1
%21 = tail call i32 @spin_lock_init(ptr noundef nonnull %20) #2
%22 = load ptr, ptr %5, align 8, !tbaa !12
%23 = getelementptr inbounds %struct.TYPE_2__, ptr %22, i64 %16
store i32 -1, ptr %23, align 8, !tbaa !16
%24 = add nuw nsw i64 %16, 1
%25 = icmp eq i64 %24, %10
br i1 %25, label %26, label %14, !llvm.loop !17
26: ; preds = %14, %7, %11
%27 = phi i32 [ %13, %11 ], [ 0, %7 ], [ 0, %14 ]
ret i32 %27
}
declare ptr @kcalloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock_init(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"comedi_device", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!14, !10, i64 16}
!14 = !{!"TYPE_2__", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16}
!15 = !{!14, !7, i64 8}
!16 = !{!14, !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/extr_comedidev.h_alloc_subdevices.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/extr_comedidev.h_alloc_subdevices.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32, i32, i32, ptr }
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@DMA_NONE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @alloc_subdevices], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @alloc_subdevices(ptr noundef %0, i32 noundef %1) #0 {
store i32 %1, ptr %0, align 8, !tbaa !6
%3 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !12
%4 = tail call ptr @kcalloc(i32 noundef %1, i32 noundef 4, i32 noundef %3) #2
%5 = getelementptr inbounds i8, ptr %0, i64 8
store ptr %4, ptr %5, align 8, !tbaa !13
%6 = icmp eq ptr %4, null
br i1 %6, label %11, label %7
7: ; preds = %2
%8 = icmp eq i32 %1, 0
br i1 %8, label %26, label %9
9: ; preds = %7
%10 = zext i32 %1 to i64
br label %14
11: ; preds = %2
%12 = load i32, ptr @ENOMEM, align 4, !tbaa !12
%13 = sub nsw i32 0, %12
br label %26
14: ; preds = %9, %14
%15 = phi ptr [ %4, %9 ], [ %22, %14 ]
%16 = phi i64 [ 0, %9 ], [ %24, %14 ]
%17 = getelementptr inbounds %struct.TYPE_2__, ptr %15, i64 %16, i32 3
store ptr %0, ptr %17, align 8, !tbaa !14
%18 = load i32, ptr @DMA_NONE, align 4, !tbaa !12
%19 = getelementptr inbounds %struct.TYPE_2__, ptr %15, i64 %16, i32 2
store i32 %18, ptr %19, align 8, !tbaa !16
%20 = getelementptr inbounds %struct.TYPE_2__, ptr %15, i64 %16, i32 1
%21 = tail call i32 @spin_lock_init(ptr noundef nonnull %20) #2
%22 = load ptr, ptr %5, align 8, !tbaa !13
%23 = getelementptr inbounds %struct.TYPE_2__, ptr %22, i64 %16
store i32 -1, ptr %23, align 8, !tbaa !17
%24 = add nuw nsw i64 %16, 1
%25 = icmp eq i64 %24, %10
br i1 %25, label %26, label %14, !llvm.loop !18
26: ; preds = %14, %7, %11
%27 = phi i32 [ %13, %11 ], [ 0, %7 ], [ 0, %14 ]
ret i32 %27
}
declare ptr @kcalloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock_init(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"comedi_device", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !11, i64 8}
!14 = !{!15, !11, i64 16}
!15 = !{!"TYPE_2__", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 16}
!16 = !{!15, !8, i64 8}
!17 = !{!15, !8, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
| fastsocket_kernel_drivers_staging_comedi_extr_comedidev.h_alloc_subdevices |
; ModuleID = 'AnghaBench/linux/drivers/net/usb/extr_aqc111.c_aqc111_write16_cmd_async.c'
source_filename = "AnghaBench/linux/drivers/net/usb/extr_aqc111.c_aqc111_write16_cmd_async.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @aqc111_write16_cmd_async], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @aqc111_write16_cmd_async(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr nocapture noundef readonly %4) #0 {
%6 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
%7 = load i32, ptr %4, align 4, !tbaa !5
store i32 %7, ptr %6, align 4, !tbaa !5
%8 = call i32 @cpu_to_le16s(ptr noundef nonnull %6) #3
%9 = call i32 @aqc111_write_cmd_async(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef 4, ptr noundef nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
ret i32 %9
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cpu_to_le16s(ptr noundef) local_unnamed_addr #2
declare i32 @aqc111_write_cmd_async(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/usb/extr_aqc111.c_aqc111_write16_cmd_async.c'
source_filename = "AnghaBench/linux/drivers/net/usb/extr_aqc111.c_aqc111_write16_cmd_async.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @aqc111_write16_cmd_async], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @aqc111_write16_cmd_async(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr nocapture noundef readonly %4) #0 {
%6 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
%7 = load i32, ptr %4, align 4, !tbaa !6
store i32 %7, ptr %6, align 4, !tbaa !6
%8 = call i32 @cpu_to_le16s(ptr noundef nonnull %6) #3
%9 = call i32 @aqc111_write_cmd_async(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef 4, ptr noundef nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
ret i32 %9
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cpu_to_le16s(ptr noundef) local_unnamed_addr #2
declare i32 @aqc111_write_cmd_async(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_net_usb_extr_aqc111.c_aqc111_write16_cmd_async |
; ModuleID = 'AnghaBench/Quake-III-Arena/code/server/extr_sv_rankings.c_SV_RankSendReportsCBF.c'
source_filename = "AnghaBench/Quake-III-Arena/code/server/extr_sv_rankings.c_SV_RankSendReportsCBF.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [38 x i8] c"SV_RankSendReportsCBF( %08X, %08X );\0A\00", align 1
@.str.1 = private unnamed_addr constant [31 x i8] c"SV_RankSendReportsCBF: server\0A\00", align 1
@s_server_context = dso_local local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [31 x i8] c"SV_RankSendReportsCBF: player\0A\00", align 1
@GR_STATUS_OK = dso_local local_unnamed_addr global i64 0, align 8
@.str.3 = private unnamed_addr constant [44 x i8] c"SV_RankSendReportsCBF: Unexpected status %s\00", align 1
@.str.4 = private unnamed_addr constant [45 x i8] c"SV_RankSendReportsCBF: WARNING: context == 0\00", align 1
@SV_RankCleanupCBF = dso_local local_unnamed_addr global i32 0, align 4
@GR_OPT_END = dso_local local_unnamed_addr global i32 0, align 4
@GR_STATUS_PENDING = dso_local local_unnamed_addr global i64 0, align 8
@.str.5 = private unnamed_addr constant [81 x i8] c"SV_RankSendReportsCBF: Expected GR_STATUS_PENDING from GRankCleanupAsync, got %s\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @SV_RankSendReportsCBF], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @SV_RankSendReportsCBF(ptr noundef %0, ptr noundef %1) #0 {
%3 = icmp ne ptr %0, null
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 noundef %4) #2
%6 = tail call i32 (ptr, ...) @Com_DPrintf(ptr noundef nonnull @.str, ptr noundef %0, ptr noundef %1) #2
%7 = icmp eq ptr %1, null
%8 = select i1 %7, ptr @.str.1, ptr @.str.2
%9 = select i1 %7, ptr @s_server_context, ptr %1
%10 = tail call i32 (ptr, ...) @Com_DPrintf(ptr noundef nonnull %8) #2
%11 = load i64, ptr %9, align 8, !tbaa !5
%12 = load i64, ptr %0, align 8, !tbaa !5
%13 = load i64, ptr @GR_STATUS_OK, align 8, !tbaa !5
%14 = icmp eq i64 %12, %13
br i1 %14, label %18, label %15
15: ; preds = %2
%16 = tail call i32 @SV_RankStatusString(i64 noundef %12) #2
%17 = tail call i32 @SV_RankError(ptr noundef nonnull @.str.3, i32 noundef %16) #2
br label %18
18: ; preds = %15, %2
%19 = icmp eq i64 %11, 0
br i1 %19, label %20, label %22
20: ; preds = %18
%21 = tail call i32 (ptr, ...) @Com_DPrintf(ptr noundef nonnull @.str.4) #2
br label %31
22: ; preds = %18
%23 = load i32, ptr @SV_RankCleanupCBF, align 4, !tbaa !9
%24 = load i32, ptr @GR_OPT_END, align 4, !tbaa !9
%25 = tail call i64 @GRankCleanupAsync(i64 noundef %11, i32 noundef 0, i32 noundef %23, ptr noundef %1, i32 noundef %24) #2
%26 = load i64, ptr @GR_STATUS_PENDING, align 8, !tbaa !5
%27 = icmp eq i64 %25, %26
br i1 %27, label %33, label %28
28: ; preds = %22
%29 = tail call i32 @SV_RankStatusString(i64 noundef %25) #2
%30 = tail call i32 @SV_RankError(ptr noundef nonnull @.str.5, i32 noundef %29) #2
br label %31
31: ; preds = %20, %28
%32 = tail call i32 @SV_RankCloseContext(ptr noundef %1) #2
br label %33
33: ; preds = %31, %22
ret void
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i32 @Com_DPrintf(ptr noundef, ...) local_unnamed_addr #1
declare i32 @SV_RankError(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SV_RankStatusString(i64 noundef) local_unnamed_addr #1
declare i32 @SV_RankCloseContext(ptr noundef) local_unnamed_addr #1
declare i64 @GRankCleanupAsync(i64 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/Quake-III-Arena/code/server/extr_sv_rankings.c_SV_RankSendReportsCBF.c'
source_filename = "AnghaBench/Quake-III-Arena/code/server/extr_sv_rankings.c_SV_RankSendReportsCBF.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [38 x i8] c"SV_RankSendReportsCBF( %08X, %08X );\0A\00", align 1
@.str.1 = private unnamed_addr constant [31 x i8] c"SV_RankSendReportsCBF: server\0A\00", align 1
@s_server_context = common local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [31 x i8] c"SV_RankSendReportsCBF: player\0A\00", align 1
@GR_STATUS_OK = common local_unnamed_addr global i64 0, align 8
@.str.3 = private unnamed_addr constant [44 x i8] c"SV_RankSendReportsCBF: Unexpected status %s\00", align 1
@.str.4 = private unnamed_addr constant [45 x i8] c"SV_RankSendReportsCBF: WARNING: context == 0\00", align 1
@SV_RankCleanupCBF = common local_unnamed_addr global i32 0, align 4
@GR_OPT_END = common local_unnamed_addr global i32 0, align 4
@GR_STATUS_PENDING = common local_unnamed_addr global i64 0, align 8
@.str.5 = private unnamed_addr constant [81 x i8] c"SV_RankSendReportsCBF: Expected GR_STATUS_PENDING from GRankCleanupAsync, got %s\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @SV_RankSendReportsCBF], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @SV_RankSendReportsCBF(ptr noundef %0, ptr noundef %1) #0 {
%3 = icmp ne ptr %0, null
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 noundef %4) #2
%6 = tail call i32 (ptr, ...) @Com_DPrintf(ptr noundef nonnull @.str, ptr noundef %0, ptr noundef %1) #2
%7 = icmp eq ptr %1, null
%8 = select i1 %7, ptr @.str.1, ptr @.str.2
%9 = select i1 %7, ptr @s_server_context, ptr %1
%10 = tail call i32 (ptr, ...) @Com_DPrintf(ptr noundef nonnull %8) #2
%11 = load i64, ptr %9, align 8, !tbaa !6
%12 = load i64, ptr %0, align 8, !tbaa !6
%13 = load i64, ptr @GR_STATUS_OK, align 8, !tbaa !6
%14 = icmp eq i64 %12, %13
br i1 %14, label %18, label %15
15: ; preds = %2
%16 = tail call i32 @SV_RankStatusString(i64 noundef %12) #2
%17 = tail call i32 @SV_RankError(ptr noundef nonnull @.str.3, i32 noundef %16) #2
br label %18
18: ; preds = %15, %2
%19 = icmp eq i64 %11, 0
br i1 %19, label %20, label %22
20: ; preds = %18
%21 = tail call i32 (ptr, ...) @Com_DPrintf(ptr noundef nonnull @.str.4) #2
br label %31
22: ; preds = %18
%23 = load i32, ptr @SV_RankCleanupCBF, align 4, !tbaa !10
%24 = load i32, ptr @GR_OPT_END, align 4, !tbaa !10
%25 = tail call i64 @GRankCleanupAsync(i64 noundef %11, i32 noundef 0, i32 noundef %23, ptr noundef %1, i32 noundef %24) #2
%26 = load i64, ptr @GR_STATUS_PENDING, align 8, !tbaa !6
%27 = icmp eq i64 %25, %26
br i1 %27, label %33, label %28
28: ; preds = %22
%29 = tail call i32 @SV_RankStatusString(i64 noundef %25) #2
%30 = tail call i32 @SV_RankError(ptr noundef nonnull @.str.5, i32 noundef %29) #2
br label %31
31: ; preds = %20, %28
%32 = tail call i32 @SV_RankCloseContext(ptr noundef %1) #2
br label %33
33: ; preds = %31, %22
ret void
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i32 @Com_DPrintf(ptr noundef, ...) local_unnamed_addr #1
declare i32 @SV_RankError(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SV_RankStatusString(i64 noundef) local_unnamed_addr #1
declare i32 @SV_RankCloseContext(ptr noundef) local_unnamed_addr #1
declare i64 @GRankCleanupAsync(i64 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| Quake-III-Arena_code_server_extr_sv_rankings.c_SV_RankSendReportsCBF |
; ModuleID = 'AnghaBench/freebsd/sys/ofed/drivers/infiniband/util/extr_madeye.c_print_mad_hdr.c'
source_filename = "AnghaBench/freebsd/sys/ofed/drivers/infiniband/util/extr_madeye.c_print_mad_hdr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ib_mad_hdr = type { i64, i64, i64, i32, i64, i32, i64, i64, i32 }
@.str = private unnamed_addr constant [23 x i8] c"MAD version....0x%01x\0A\00", align 1
@.str.1 = private unnamed_addr constant [28 x i8] c"Class..........0x%01x (%s)\0A\00", align 1
@.str.2 = private unnamed_addr constant [23 x i8] c"Class version..0x%01x\0A\00", align 1
@.str.3 = private unnamed_addr constant [28 x i8] c"Method.........0x%01x (%s)\0A\00", align 1
@.str.4 = private unnamed_addr constant [23 x i8] c"Status.........0x%02x\0A\00", align 1
@.str.5 = private unnamed_addr constant [23 x i8] c"Class specific.0x%02x\0A\00", align 1
@.str.6 = private unnamed_addr constant [23 x i8] c"Trans ID.......0x%llx\0A\00", align 1
@IB_MGMT_CLASS_SUBN_ADM = dso_local local_unnamed_addr global i64 0, align 8
@.str.7 = private unnamed_addr constant [28 x i8] c"Attr ID........0x%02x (%s)\0A\00", align 1
@.str.8 = private unnamed_addr constant [23 x i8] c"Attr ID........0x%02x\0A\00", align 1
@.str.9 = private unnamed_addr constant [23 x i8] c"Attr modifier..0x%04x\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @print_mad_hdr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @print_mad_hdr(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str, i64 noundef %2) #2
%4 = getelementptr inbounds %struct.ib_mad_hdr, ptr %0, i64 0, i32 1
%5 = load i64, ptr %4, align 8, !tbaa !12
%6 = tail call i32 @get_class_name(i64 noundef %5) #2
%7 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str.1, i64 noundef %5, i32 noundef %6) #2
%8 = getelementptr inbounds %struct.ib_mad_hdr, ptr %0, i64 0, i32 2
%9 = load i64, ptr %8, align 8, !tbaa !13
%10 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str.2, i64 noundef %9) #2
%11 = getelementptr inbounds %struct.ib_mad_hdr, ptr %0, i64 0, i32 8
%12 = load i32, ptr %11, align 8, !tbaa !14
%13 = sext i32 %12 to i64
%14 = load i64, ptr %4, align 8, !tbaa !12
%15 = tail call i32 @get_method_name(i64 noundef %14, i32 noundef %12) #2
%16 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str.3, i64 noundef %13, i32 noundef %15) #2
%17 = getelementptr inbounds %struct.ib_mad_hdr, ptr %0, i64 0, i32 7
%18 = load i64, ptr %17, align 8, !tbaa !15
%19 = tail call i64 @be16_to_cpu(i64 noundef %18) #2
%20 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str.4, i64 noundef %19) #2
%21 = load i64, ptr %17, align 8, !tbaa !15
%22 = icmp eq i64 %21, 0
br i1 %22, label %26, label %23
23: ; preds = %1
%24 = tail call i64 @be16_to_cpu(i64 noundef %21) #2
%25 = tail call i32 @print_status_details(i64 noundef %24) #2
br label %26
26: ; preds = %23, %1
%27 = getelementptr inbounds %struct.ib_mad_hdr, ptr %0, i64 0, i32 6
%28 = load i64, ptr %27, align 8, !tbaa !16
%29 = tail call i64 @be16_to_cpu(i64 noundef %28) #2
%30 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str.5, i64 noundef %29) #2
%31 = getelementptr inbounds %struct.ib_mad_hdr, ptr %0, i64 0, i32 5
%32 = load i32, ptr %31, align 8, !tbaa !17
%33 = tail call i64 @be64_to_cpu(i32 noundef %32) #2
%34 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str.6, i64 noundef %33) #2
%35 = load i64, ptr %4, align 8, !tbaa !12
%36 = load i64, ptr @IB_MGMT_CLASS_SUBN_ADM, align 8, !tbaa !18
%37 = icmp eq i64 %35, %36
%38 = getelementptr inbounds %struct.ib_mad_hdr, ptr %0, i64 0, i32 4
%39 = load i64, ptr %38, align 8, !tbaa !19
%40 = tail call i64 @be16_to_cpu(i64 noundef %39) #2
br i1 %37, label %41, label %46
41: ; preds = %26
%42 = load i64, ptr %38, align 8, !tbaa !19
%43 = tail call i64 @be16_to_cpu(i64 noundef %42) #2
%44 = tail call i32 @get_sa_attr(i64 noundef %43) #2
%45 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str.7, i64 noundef %40, i32 noundef %44) #2
br label %48
46: ; preds = %26
%47 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str.8, i64 noundef %40) #2
br label %48
48: ; preds = %46, %41
%49 = getelementptr inbounds %struct.ib_mad_hdr, ptr %0, i64 0, i32 3
%50 = load i32, ptr %49, align 8, !tbaa !20
%51 = tail call i64 @be32_to_cpu(i32 noundef %50) #2
%52 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str.9, i64 noundef %51) #2
ret void
}
declare i32 @printk(ptr noundef, i64 noundef, ...) local_unnamed_addr #1
declare i32 @get_class_name(i64 noundef) local_unnamed_addr #1
declare i32 @get_method_name(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @be16_to_cpu(i64 noundef) local_unnamed_addr #1
declare i32 @print_status_details(i64 noundef) local_unnamed_addr #1
declare i64 @be64_to_cpu(i32 noundef) local_unnamed_addr #1
declare i32 @get_sa_attr(i64 noundef) local_unnamed_addr #1
declare i64 @be32_to_cpu(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ib_mad_hdr", !7, i64 0, !10, i64 8, !7, i64 16, !11, i64 24, !10, i64 32, !11, i64 40, !10, i64 48, !10, i64 56, !11, i64 64}
!7 = !{!"long long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!6, !7, i64 16}
!14 = !{!6, !11, i64 64}
!15 = !{!6, !10, i64 56}
!16 = !{!6, !10, i64 48}
!17 = !{!6, !11, i64 40}
!18 = !{!10, !10, i64 0}
!19 = !{!6, !10, i64 32}
!20 = !{!6, !11, i64 24}
| ; ModuleID = 'AnghaBench/freebsd/sys/ofed/drivers/infiniband/util/extr_madeye.c_print_mad_hdr.c'
source_filename = "AnghaBench/freebsd/sys/ofed/drivers/infiniband/util/extr_madeye.c_print_mad_hdr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [23 x i8] c"MAD version....0x%01x\0A\00", align 1
@.str.1 = private unnamed_addr constant [28 x i8] c"Class..........0x%01x (%s)\0A\00", align 1
@.str.2 = private unnamed_addr constant [23 x i8] c"Class version..0x%01x\0A\00", align 1
@.str.3 = private unnamed_addr constant [28 x i8] c"Method.........0x%01x (%s)\0A\00", align 1
@.str.4 = private unnamed_addr constant [23 x i8] c"Status.........0x%02x\0A\00", align 1
@.str.5 = private unnamed_addr constant [23 x i8] c"Class specific.0x%02x\0A\00", align 1
@.str.6 = private unnamed_addr constant [23 x i8] c"Trans ID.......0x%llx\0A\00", align 1
@IB_MGMT_CLASS_SUBN_ADM = common local_unnamed_addr global i64 0, align 8
@.str.7 = private unnamed_addr constant [28 x i8] c"Attr ID........0x%02x (%s)\0A\00", align 1
@.str.8 = private unnamed_addr constant [23 x i8] c"Attr ID........0x%02x\0A\00", align 1
@.str.9 = private unnamed_addr constant [23 x i8] c"Attr modifier..0x%04x\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @print_mad_hdr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @print_mad_hdr(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str, i64 noundef %2) #2
%4 = getelementptr inbounds i8, ptr %0, i64 8
%5 = load i64, ptr %4, align 8, !tbaa !13
%6 = tail call i32 @get_class_name(i64 noundef %5) #2
%7 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str.1, i64 noundef %5, i32 noundef %6) #2
%8 = getelementptr inbounds i8, ptr %0, i64 16
%9 = load i64, ptr %8, align 8, !tbaa !14
%10 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str.2, i64 noundef %9) #2
%11 = getelementptr inbounds i8, ptr %0, i64 64
%12 = load i32, ptr %11, align 8, !tbaa !15
%13 = sext i32 %12 to i64
%14 = load i64, ptr %4, align 8, !tbaa !13
%15 = tail call i32 @get_method_name(i64 noundef %14, i32 noundef %12) #2
%16 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str.3, i64 noundef %13, i32 noundef %15) #2
%17 = getelementptr inbounds i8, ptr %0, i64 56
%18 = load i64, ptr %17, align 8, !tbaa !16
%19 = tail call i64 @be16_to_cpu(i64 noundef %18) #2
%20 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str.4, i64 noundef %19) #2
%21 = load i64, ptr %17, align 8, !tbaa !16
%22 = icmp eq i64 %21, 0
br i1 %22, label %26, label %23
23: ; preds = %1
%24 = tail call i64 @be16_to_cpu(i64 noundef %21) #2
%25 = tail call i32 @print_status_details(i64 noundef %24) #2
br label %26
26: ; preds = %23, %1
%27 = getelementptr inbounds i8, ptr %0, i64 48
%28 = load i64, ptr %27, align 8, !tbaa !17
%29 = tail call i64 @be16_to_cpu(i64 noundef %28) #2
%30 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str.5, i64 noundef %29) #2
%31 = getelementptr inbounds i8, ptr %0, i64 40
%32 = load i32, ptr %31, align 8, !tbaa !18
%33 = tail call i64 @be64_to_cpu(i32 noundef %32) #2
%34 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str.6, i64 noundef %33) #2
%35 = load i64, ptr %4, align 8, !tbaa !13
%36 = load i64, ptr @IB_MGMT_CLASS_SUBN_ADM, align 8, !tbaa !19
%37 = icmp eq i64 %35, %36
%38 = getelementptr inbounds i8, ptr %0, i64 32
%39 = load i64, ptr %38, align 8, !tbaa !20
%40 = tail call i64 @be16_to_cpu(i64 noundef %39) #2
br i1 %37, label %41, label %46
41: ; preds = %26
%42 = load i64, ptr %38, align 8, !tbaa !20
%43 = tail call i64 @be16_to_cpu(i64 noundef %42) #2
%44 = tail call i32 @get_sa_attr(i64 noundef %43) #2
%45 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str.7, i64 noundef %40, i32 noundef %44) #2
br label %48
46: ; preds = %26
%47 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str.8, i64 noundef %40) #2
br label %48
48: ; preds = %46, %41
%49 = getelementptr inbounds i8, ptr %0, i64 24
%50 = load i32, ptr %49, align 8, !tbaa !21
%51 = tail call i64 @be32_to_cpu(i32 noundef %50) #2
%52 = tail call i32 (ptr, i64, ...) @printk(ptr noundef nonnull @.str.9, i64 noundef %51) #2
ret void
}
declare i32 @printk(ptr noundef, i64 noundef, ...) local_unnamed_addr #1
declare i32 @get_class_name(i64 noundef) local_unnamed_addr #1
declare i32 @get_method_name(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @be16_to_cpu(i64 noundef) local_unnamed_addr #1
declare i32 @print_status_details(i64 noundef) local_unnamed_addr #1
declare i64 @be64_to_cpu(i32 noundef) local_unnamed_addr #1
declare i32 @get_sa_attr(i64 noundef) local_unnamed_addr #1
declare i64 @be32_to_cpu(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ib_mad_hdr", !8, i64 0, !11, i64 8, !8, i64 16, !12, i64 24, !11, i64 32, !12, i64 40, !11, i64 48, !11, i64 56, !12, i64 64}
!8 = !{!"long long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!7, !11, i64 8}
!14 = !{!7, !8, i64 16}
!15 = !{!7, !12, i64 64}
!16 = !{!7, !11, i64 56}
!17 = !{!7, !11, i64 48}
!18 = !{!7, !12, i64 40}
!19 = !{!11, !11, i64 0}
!20 = !{!7, !11, i64 32}
!21 = !{!7, !12, i64 24}
| freebsd_sys_ofed_drivers_infiniband_util_extr_madeye.c_print_mad_hdr |
; ModuleID = 'AnghaBench/freebsd/sys/dev/iwi/extr_if_iwi.c_iwi_wme_init.c'
source_filename = "AnghaBench/freebsd/sys/dev/iwi/extr_if_iwi.c_iwi_wme_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.wmeParams = type { i32, i32, i32, i32, i32 }
%struct.TYPE_2__ = type { ptr, ptr, ptr, ptr, ptr }
@WME_NUM_AC = dso_local local_unnamed_addr global i32 0, align 4
@iwi_wme_cck_params = dso_local local_unnamed_addr global ptr null, align 8
@iwi_wme_ofdm_params = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @iwi_wme_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @iwi_wme_init(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = tail call i32 @memset(ptr noundef %2, i32 noundef 0, i32 noundef 8) #2
%4 = load i32, ptr @WME_NUM_AC, align 4, !tbaa !10
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %81
6: ; preds = %1
%7 = load ptr, ptr %0, align 8, !tbaa !5
br label %8
8: ; preds = %6, %8
%9 = phi ptr [ %7, %6 ], [ %73, %8 ]
%10 = phi i64 [ 0, %6 ], [ %77, %8 ]
%11 = load ptr, ptr @iwi_wme_cck_params, align 8, !tbaa !12
%12 = getelementptr inbounds %struct.wmeParams, ptr %11, i64 %10
%13 = getelementptr inbounds %struct.wmeParams, ptr %11, i64 %10, i32 4
%14 = load i32, ptr %13, align 4, !tbaa !13
%15 = getelementptr inbounds %struct.TYPE_2__, ptr %9, i64 1, i32 4
%16 = load ptr, ptr %15, align 8, !tbaa !15
%17 = getelementptr inbounds i32, ptr %16, i64 %10
store i32 %14, ptr %17, align 4, !tbaa !10
%18 = getelementptr inbounds %struct.wmeParams, ptr %11, i64 %10, i32 3
%19 = load i32, ptr %18, align 4, !tbaa !17
%20 = tail call ptr @IWI_EXP2(i32 noundef %19) #2
%21 = load ptr, ptr %0, align 8, !tbaa !5
%22 = getelementptr inbounds %struct.TYPE_2__, ptr %21, i64 1, i32 3
%23 = load ptr, ptr %22, align 8, !tbaa !18
%24 = getelementptr inbounds ptr, ptr %23, i64 %10
store ptr %20, ptr %24, align 8, !tbaa !12
%25 = getelementptr inbounds %struct.wmeParams, ptr %11, i64 %10, i32 2
%26 = load i32, ptr %25, align 4, !tbaa !19
%27 = tail call ptr @IWI_EXP2(i32 noundef %26) #2
%28 = load ptr, ptr %0, align 8, !tbaa !5
%29 = getelementptr inbounds %struct.TYPE_2__, ptr %28, i64 1, i32 2
%30 = load ptr, ptr %29, align 8, !tbaa !20
%31 = getelementptr inbounds ptr, ptr %30, i64 %10
store ptr %27, ptr %31, align 8, !tbaa !12
%32 = getelementptr inbounds %struct.wmeParams, ptr %11, i64 %10, i32 1
%33 = load i32, ptr %32, align 4, !tbaa !21
%34 = tail call ptr @IWI_USEC(i32 noundef %33) #2
%35 = load ptr, ptr %0, align 8, !tbaa !5
%36 = getelementptr inbounds %struct.TYPE_2__, ptr %35, i64 1, i32 1
%37 = load ptr, ptr %36, align 8, !tbaa !22
%38 = getelementptr inbounds ptr, ptr %37, i64 %10
store ptr %34, ptr %38, align 8, !tbaa !12
%39 = load i32, ptr %12, align 4, !tbaa !23
%40 = load ptr, ptr %0, align 8, !tbaa !5
%41 = getelementptr inbounds %struct.TYPE_2__, ptr %40, i64 1
%42 = load ptr, ptr %41, align 8, !tbaa !24
%43 = getelementptr inbounds i32, ptr %42, i64 %10
store i32 %39, ptr %43, align 4, !tbaa !10
%44 = load ptr, ptr @iwi_wme_ofdm_params, align 8, !tbaa !12
%45 = getelementptr inbounds %struct.wmeParams, ptr %44, i64 %10
%46 = getelementptr inbounds %struct.wmeParams, ptr %44, i64 %10, i32 4
%47 = load i32, ptr %46, align 4, !tbaa !13
%48 = getelementptr inbounds %struct.TYPE_2__, ptr %40, i64 2, i32 4
%49 = load ptr, ptr %48, align 8, !tbaa !15
%50 = getelementptr inbounds i32, ptr %49, i64 %10
store i32 %47, ptr %50, align 4, !tbaa !10
%51 = getelementptr inbounds %struct.wmeParams, ptr %44, i64 %10, i32 3
%52 = load i32, ptr %51, align 4, !tbaa !17
%53 = tail call ptr @IWI_EXP2(i32 noundef %52) #2
%54 = load ptr, ptr %0, align 8, !tbaa !5
%55 = getelementptr inbounds %struct.TYPE_2__, ptr %54, i64 2, i32 3
%56 = load ptr, ptr %55, align 8, !tbaa !18
%57 = getelementptr inbounds ptr, ptr %56, i64 %10
store ptr %53, ptr %57, align 8, !tbaa !12
%58 = getelementptr inbounds %struct.wmeParams, ptr %44, i64 %10, i32 2
%59 = load i32, ptr %58, align 4, !tbaa !19
%60 = tail call ptr @IWI_EXP2(i32 noundef %59) #2
%61 = load ptr, ptr %0, align 8, !tbaa !5
%62 = getelementptr inbounds %struct.TYPE_2__, ptr %61, i64 2, i32 2
%63 = load ptr, ptr %62, align 8, !tbaa !20
%64 = getelementptr inbounds ptr, ptr %63, i64 %10
store ptr %60, ptr %64, align 8, !tbaa !12
%65 = getelementptr inbounds %struct.wmeParams, ptr %44, i64 %10, i32 1
%66 = load i32, ptr %65, align 4, !tbaa !21
%67 = tail call ptr @IWI_USEC(i32 noundef %66) #2
%68 = load ptr, ptr %0, align 8, !tbaa !5
%69 = getelementptr inbounds %struct.TYPE_2__, ptr %68, i64 2, i32 1
%70 = load ptr, ptr %69, align 8, !tbaa !22
%71 = getelementptr inbounds ptr, ptr %70, i64 %10
store ptr %67, ptr %71, align 8, !tbaa !12
%72 = load i32, ptr %45, align 4, !tbaa !23
%73 = load ptr, ptr %0, align 8, !tbaa !5
%74 = getelementptr inbounds %struct.TYPE_2__, ptr %73, i64 2
%75 = load ptr, ptr %74, align 8, !tbaa !24
%76 = getelementptr inbounds i32, ptr %75, i64 %10
store i32 %72, ptr %76, align 4, !tbaa !10
%77 = add nuw nsw i64 %10, 1
%78 = load i32, ptr @WME_NUM_AC, align 4, !tbaa !10
%79 = sext i32 %78 to i64
%80 = icmp slt i64 %77, %79
br i1 %80, label %8, label %81, !llvm.loop !25
81: ; preds = %8, %1
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @IWI_EXP2(i32 noundef) local_unnamed_addr #1
declare ptr @IWI_USEC(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"iwi_softc", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !11, i64 16}
!14 = !{!"wmeParams", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!15 = !{!16, !7, i64 32}
!16 = !{!"TYPE_2__", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32}
!17 = !{!14, !11, i64 12}
!18 = !{!16, !7, i64 24}
!19 = !{!14, !11, i64 8}
!20 = !{!16, !7, i64 16}
!21 = !{!14, !11, i64 4}
!22 = !{!16, !7, i64 8}
!23 = !{!14, !11, i64 0}
!24 = !{!16, !7, i64 0}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/iwi/extr_if_iwi.c_iwi_wme_init.c'
source_filename = "AnghaBench/freebsd/sys/dev/iwi/extr_if_iwi.c_iwi_wme_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.wmeParams = type { i32, i32, i32, i32, i32 }
@WME_NUM_AC = common local_unnamed_addr global i32 0, align 4
@iwi_wme_cck_params = common local_unnamed_addr global ptr null, align 8
@iwi_wme_ofdm_params = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @iwi_wme_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @iwi_wme_init(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = tail call i32 @memset(ptr noundef %2, i32 noundef 0, i32 noundef 8) #2
%4 = load i32, ptr @WME_NUM_AC, align 4, !tbaa !11
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %81
6: ; preds = %1
%7 = load ptr, ptr %0, align 8, !tbaa !6
br label %8
8: ; preds = %6, %8
%9 = phi ptr [ %7, %6 ], [ %73, %8 ]
%10 = phi i64 [ 0, %6 ], [ %77, %8 ]
%11 = load ptr, ptr @iwi_wme_cck_params, align 8, !tbaa !13
%12 = getelementptr inbounds %struct.wmeParams, ptr %11, i64 %10
%13 = getelementptr inbounds i8, ptr %12, i64 16
%14 = load i32, ptr %13, align 4, !tbaa !14
%15 = getelementptr inbounds i8, ptr %9, i64 72
%16 = load ptr, ptr %15, align 8, !tbaa !16
%17 = getelementptr inbounds i32, ptr %16, i64 %10
store i32 %14, ptr %17, align 4, !tbaa !11
%18 = getelementptr inbounds i8, ptr %12, i64 12
%19 = load i32, ptr %18, align 4, !tbaa !18
%20 = tail call ptr @IWI_EXP2(i32 noundef %19) #2
%21 = load ptr, ptr %0, align 8, !tbaa !6
%22 = getelementptr inbounds i8, ptr %21, i64 64
%23 = load ptr, ptr %22, align 8, !tbaa !19
%24 = getelementptr inbounds ptr, ptr %23, i64 %10
store ptr %20, ptr %24, align 8, !tbaa !13
%25 = getelementptr inbounds i8, ptr %12, i64 8
%26 = load i32, ptr %25, align 4, !tbaa !20
%27 = tail call ptr @IWI_EXP2(i32 noundef %26) #2
%28 = load ptr, ptr %0, align 8, !tbaa !6
%29 = getelementptr inbounds i8, ptr %28, i64 56
%30 = load ptr, ptr %29, align 8, !tbaa !21
%31 = getelementptr inbounds ptr, ptr %30, i64 %10
store ptr %27, ptr %31, align 8, !tbaa !13
%32 = getelementptr inbounds i8, ptr %12, i64 4
%33 = load i32, ptr %32, align 4, !tbaa !22
%34 = tail call ptr @IWI_USEC(i32 noundef %33) #2
%35 = load ptr, ptr %0, align 8, !tbaa !6
%36 = getelementptr inbounds i8, ptr %35, i64 48
%37 = load ptr, ptr %36, align 8, !tbaa !23
%38 = getelementptr inbounds ptr, ptr %37, i64 %10
store ptr %34, ptr %38, align 8, !tbaa !13
%39 = load i32, ptr %12, align 4, !tbaa !24
%40 = load ptr, ptr %0, align 8, !tbaa !6
%41 = getelementptr inbounds i8, ptr %40, i64 40
%42 = load ptr, ptr %41, align 8, !tbaa !25
%43 = getelementptr inbounds i32, ptr %42, i64 %10
store i32 %39, ptr %43, align 4, !tbaa !11
%44 = load ptr, ptr @iwi_wme_ofdm_params, align 8, !tbaa !13
%45 = getelementptr inbounds %struct.wmeParams, ptr %44, i64 %10
%46 = getelementptr inbounds i8, ptr %45, i64 16
%47 = load i32, ptr %46, align 4, !tbaa !14
%48 = getelementptr inbounds i8, ptr %40, i64 112
%49 = load ptr, ptr %48, align 8, !tbaa !16
%50 = getelementptr inbounds i32, ptr %49, i64 %10
store i32 %47, ptr %50, align 4, !tbaa !11
%51 = getelementptr inbounds i8, ptr %45, i64 12
%52 = load i32, ptr %51, align 4, !tbaa !18
%53 = tail call ptr @IWI_EXP2(i32 noundef %52) #2
%54 = load ptr, ptr %0, align 8, !tbaa !6
%55 = getelementptr inbounds i8, ptr %54, i64 104
%56 = load ptr, ptr %55, align 8, !tbaa !19
%57 = getelementptr inbounds ptr, ptr %56, i64 %10
store ptr %53, ptr %57, align 8, !tbaa !13
%58 = getelementptr inbounds i8, ptr %45, i64 8
%59 = load i32, ptr %58, align 4, !tbaa !20
%60 = tail call ptr @IWI_EXP2(i32 noundef %59) #2
%61 = load ptr, ptr %0, align 8, !tbaa !6
%62 = getelementptr inbounds i8, ptr %61, i64 96
%63 = load ptr, ptr %62, align 8, !tbaa !21
%64 = getelementptr inbounds ptr, ptr %63, i64 %10
store ptr %60, ptr %64, align 8, !tbaa !13
%65 = getelementptr inbounds i8, ptr %45, i64 4
%66 = load i32, ptr %65, align 4, !tbaa !22
%67 = tail call ptr @IWI_USEC(i32 noundef %66) #2
%68 = load ptr, ptr %0, align 8, !tbaa !6
%69 = getelementptr inbounds i8, ptr %68, i64 88
%70 = load ptr, ptr %69, align 8, !tbaa !23
%71 = getelementptr inbounds ptr, ptr %70, i64 %10
store ptr %67, ptr %71, align 8, !tbaa !13
%72 = load i32, ptr %45, align 4, !tbaa !24
%73 = load ptr, ptr %0, align 8, !tbaa !6
%74 = getelementptr inbounds i8, ptr %73, i64 80
%75 = load ptr, ptr %74, align 8, !tbaa !25
%76 = getelementptr inbounds i32, ptr %75, i64 %10
store i32 %72, ptr %76, align 4, !tbaa !11
%77 = add nuw nsw i64 %10, 1
%78 = load i32, ptr @WME_NUM_AC, align 4, !tbaa !11
%79 = sext i32 %78 to i64
%80 = icmp slt i64 %77, %79
br i1 %80, label %8, label %81, !llvm.loop !26
81: ; preds = %8, %1
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @IWI_EXP2(i32 noundef) local_unnamed_addr #1
declare ptr @IWI_USEC(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"iwi_softc", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!15, !12, i64 16}
!15 = !{!"wmeParams", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16}
!16 = !{!17, !8, i64 32}
!17 = !{!"TYPE_2__", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !8, i64 32}
!18 = !{!15, !12, i64 12}
!19 = !{!17, !8, i64 24}
!20 = !{!15, !12, i64 8}
!21 = !{!17, !8, i64 16}
!22 = !{!15, !12, i64 4}
!23 = !{!17, !8, i64 8}
!24 = !{!15, !12, i64 0}
!25 = !{!17, !8, i64 0}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}
| freebsd_sys_dev_iwi_extr_if_iwi.c_iwi_wme_init |
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/kern/extr_thread.c_thread_exception_daemon.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/kern/extr_thread.c_thread_exception_daemon.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.thread_exception_elt = type { i32, i32, i32 }
@thread_exception_lock = dso_local global i32 0, align 4
@thread_exception_queue = dso_local global i32 0, align 4
@THREAD_UNINT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @thread_exception_daemon], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @thread_exception_daemon() #0 {
%1 = tail call i32 @simple_lock(ptr noundef nonnull @thread_exception_lock) #2
%2 = tail call i64 @dequeue_head(ptr noundef nonnull @thread_exception_queue) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %24, label %4
4: ; preds = %0, %4
%5 = phi i64 [ %22, %4 ], [ %2, %0 ]
%6 = inttoptr i64 %5 to ptr
%7 = tail call i32 @simple_unlock(ptr noundef nonnull @thread_exception_lock) #2
%8 = getelementptr inbounds %struct.thread_exception_elt, ptr %6, i64 0, i32 2
%9 = load i32, ptr %8, align 4, !tbaa !5
%10 = getelementptr inbounds %struct.thread_exception_elt, ptr %6, i64 0, i32 1
%11 = load i32, ptr %10, align 4, !tbaa !10
%12 = load i32, ptr %6, align 4, !tbaa !11
%13 = tail call i32 @assert_thread_magic(i32 noundef %12) #2
%14 = tail call i32 @kfree(ptr noundef nonnull %6, i32 noundef 12) #2
%15 = tail call i32 @task_lock(i32 noundef %11) #2
%16 = tail call i32 @task_wait_till_threads_terminate_locked(i32 noundef %11) #2
%17 = tail call i32 @task_unlock(i32 noundef %11) #2
%18 = tail call i32 @task_deallocate(i32 noundef %11) #2
%19 = tail call i32 @thread_deallocate(i32 noundef %12) #2
%20 = tail call i32 @task_deliver_crash_notification(i32 noundef %11, i32 noundef %12, i32 noundef %9, i32 noundef 0) #2
%21 = tail call i32 @simple_lock(ptr noundef nonnull @thread_exception_lock) #2
%22 = tail call i64 @dequeue_head(ptr noundef nonnull @thread_exception_queue) #2
%23 = icmp eq i64 %22, 0
br i1 %23, label %24, label %4, !llvm.loop !12
24: ; preds = %4, %0
%25 = load i32, ptr @THREAD_UNINT, align 4, !tbaa !14
%26 = tail call i32 @assert_wait(i32 noundef ptrtoint (ptr @thread_exception_queue to i32), i32 noundef %25) #2
%27 = tail call i32 @simple_unlock(ptr noundef nonnull @thread_exception_lock) #2
%28 = tail call i32 @thread_block(i32 noundef ptrtoint (ptr @thread_exception_daemon to i32)) #2
ret void
}
declare i32 @simple_lock(ptr noundef) local_unnamed_addr #1
declare i64 @dequeue_head(ptr noundef) local_unnamed_addr #1
declare i32 @simple_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @assert_thread_magic(i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @task_lock(i32 noundef) local_unnamed_addr #1
declare i32 @task_wait_till_threads_terminate_locked(i32 noundef) local_unnamed_addr #1
declare i32 @task_unlock(i32 noundef) local_unnamed_addr #1
declare i32 @task_deallocate(i32 noundef) local_unnamed_addr #1
declare i32 @thread_deallocate(i32 noundef) local_unnamed_addr #1
declare i32 @task_deliver_crash_notification(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @assert_wait(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @thread_block(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"thread_exception_elt", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!6, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/darwin-xnu/osfmk/kern/extr_thread.c_thread_exception_daemon.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/kern/extr_thread.c_thread_exception_daemon.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@thread_exception_lock = common global i32 0, align 4
@thread_exception_queue = common global i32 0, align 4
@THREAD_UNINT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @thread_exception_daemon], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @thread_exception_daemon() #0 {
%1 = tail call i32 @simple_lock(ptr noundef nonnull @thread_exception_lock) #2
%2 = tail call i64 @dequeue_head(ptr noundef nonnull @thread_exception_queue) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %24, label %4
4: ; preds = %0, %4
%5 = phi i64 [ %22, %4 ], [ %2, %0 ]
%6 = inttoptr i64 %5 to ptr
%7 = tail call i32 @simple_unlock(ptr noundef nonnull @thread_exception_lock) #2
%8 = getelementptr inbounds i8, ptr %6, i64 8
%9 = load i32, ptr %8, align 4, !tbaa !6
%10 = getelementptr inbounds i8, ptr %6, i64 4
%11 = load i32, ptr %10, align 4, !tbaa !11
%12 = load i32, ptr %6, align 4, !tbaa !12
%13 = tail call i32 @assert_thread_magic(i32 noundef %12) #2
%14 = tail call i32 @kfree(ptr noundef nonnull %6, i32 noundef 12) #2
%15 = tail call i32 @task_lock(i32 noundef %11) #2
%16 = tail call i32 @task_wait_till_threads_terminate_locked(i32 noundef %11) #2
%17 = tail call i32 @task_unlock(i32 noundef %11) #2
%18 = tail call i32 @task_deallocate(i32 noundef %11) #2
%19 = tail call i32 @thread_deallocate(i32 noundef %12) #2
%20 = tail call i32 @task_deliver_crash_notification(i32 noundef %11, i32 noundef %12, i32 noundef %9, i32 noundef 0) #2
%21 = tail call i32 @simple_lock(ptr noundef nonnull @thread_exception_lock) #2
%22 = tail call i64 @dequeue_head(ptr noundef nonnull @thread_exception_queue) #2
%23 = icmp eq i64 %22, 0
br i1 %23, label %24, label %4, !llvm.loop !13
24: ; preds = %4, %0
%25 = load i32, ptr @THREAD_UNINT, align 4, !tbaa !15
%26 = tail call i32 @assert_wait(i32 noundef ptrtoint (ptr @thread_exception_queue to i32), i32 noundef %25) #2
%27 = tail call i32 @simple_unlock(ptr noundef nonnull @thread_exception_lock) #2
%28 = tail call i32 @thread_block(i32 noundef ptrtoint (ptr @thread_exception_daemon to i32)) #2
ret void
}
declare i32 @simple_lock(ptr noundef) local_unnamed_addr #1
declare i64 @dequeue_head(ptr noundef) local_unnamed_addr #1
declare i32 @simple_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @assert_thread_magic(i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @task_lock(i32 noundef) local_unnamed_addr #1
declare i32 @task_wait_till_threads_terminate_locked(i32 noundef) local_unnamed_addr #1
declare i32 @task_unlock(i32 noundef) local_unnamed_addr #1
declare i32 @task_deallocate(i32 noundef) local_unnamed_addr #1
declare i32 @thread_deallocate(i32 noundef) local_unnamed_addr #1
declare i32 @task_deliver_crash_notification(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @assert_wait(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @thread_block(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"thread_exception_elt", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = !{!7, !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!8, !8, i64 0}
| darwin-xnu_osfmk_kern_extr_thread.c_thread_exception_daemon |
; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/vmw_pvrdma/extr_pvrdma.h_pvrdma_wc_opcode_to_ib.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/vmw_pvrdma/extr_pvrdma.h_pvrdma_wc_opcode_to_ib.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@IB_WC_SEND = dso_local local_unnamed_addr global i32 0, align 4
@IB_WC_RDMA_WRITE = dso_local local_unnamed_addr global i32 0, align 4
@IB_WC_RDMA_READ = dso_local local_unnamed_addr global i32 0, align 4
@IB_WC_COMP_SWAP = dso_local local_unnamed_addr global i32 0, align 4
@IB_WC_FETCH_ADD = dso_local local_unnamed_addr global i32 0, align 4
@IB_WC_LOCAL_INV = dso_local local_unnamed_addr global i32 0, align 4
@IB_WC_REG_MR = dso_local local_unnamed_addr global i32 0, align 4
@IB_WC_MASKED_COMP_SWAP = dso_local local_unnamed_addr global i32 0, align 4
@IB_WC_MASKED_FETCH_ADD = dso_local local_unnamed_addr global i32 0, align 4
@IB_WC_RECV = dso_local local_unnamed_addr global i32 0, align 4
@IB_WC_RECV_RDMA_WITH_IMM = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @pvrdma_wc_opcode_to_ib], section "llvm.metadata"
@switch.table.pvrdma_wc_opcode_to_ib = private unnamed_addr constant [10 x ptr] [ptr @IB_WC_RECV_RDMA_WITH_IMM, ptr @IB_WC_RECV, ptr @IB_WC_RDMA_WRITE, ptr @IB_WC_RDMA_READ, ptr @IB_WC_MASKED_FETCH_ADD, ptr @IB_WC_MASKED_COMP_SWAP, ptr @IB_WC_LOCAL_INV, ptr @IB_WC_FETCH_ADD, ptr @IB_WC_REG_MR, ptr @IB_WC_COMP_SWAP], align 8
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define internal i32 @pvrdma_wc_opcode_to_ib(i32 noundef %0) #0 {
%2 = add i32 %0, -129
%3 = icmp ult i32 %2, 10
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = zext nneg i32 %2 to i64
%6 = getelementptr inbounds [10 x ptr], ptr @switch.table.pvrdma_wc_opcode_to_ib, i64 0, i64 %5
%7 = load ptr, ptr %6, align 8
br label %8
8: ; preds = %4, %1
%9 = phi ptr [ @IB_WC_SEND, %1 ], [ %7, %4 ]
%10 = load i32, ptr %9, align 4, !tbaa !5
ret i32 %10
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/vmw_pvrdma/extr_pvrdma.h_pvrdma_wc_opcode_to_ib.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/vmw_pvrdma/extr_pvrdma.h_pvrdma_wc_opcode_to_ib.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IB_WC_SEND = common local_unnamed_addr global i32 0, align 4
@IB_WC_RDMA_WRITE = common local_unnamed_addr global i32 0, align 4
@IB_WC_RDMA_READ = common local_unnamed_addr global i32 0, align 4
@IB_WC_COMP_SWAP = common local_unnamed_addr global i32 0, align 4
@IB_WC_FETCH_ADD = common local_unnamed_addr global i32 0, align 4
@IB_WC_LOCAL_INV = common local_unnamed_addr global i32 0, align 4
@IB_WC_REG_MR = common local_unnamed_addr global i32 0, align 4
@IB_WC_MASKED_COMP_SWAP = common local_unnamed_addr global i32 0, align 4
@IB_WC_MASKED_FETCH_ADD = common local_unnamed_addr global i32 0, align 4
@IB_WC_RECV = common local_unnamed_addr global i32 0, align 4
@IB_WC_RECV_RDMA_WITH_IMM = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @pvrdma_wc_opcode_to_ib], section "llvm.metadata"
@switch.table.pvrdma_wc_opcode_to_ib = private unnamed_addr constant [10 x ptr] [ptr @IB_WC_RECV_RDMA_WITH_IMM, ptr @IB_WC_RECV, ptr @IB_WC_RDMA_WRITE, ptr @IB_WC_RDMA_READ, ptr @IB_WC_MASKED_FETCH_ADD, ptr @IB_WC_MASKED_COMP_SWAP, ptr @IB_WC_LOCAL_INV, ptr @IB_WC_FETCH_ADD, ptr @IB_WC_REG_MR, ptr @IB_WC_COMP_SWAP], align 8
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @pvrdma_wc_opcode_to_ib(i32 noundef %0) #0 {
%2 = add i32 %0, -129
%3 = icmp ult i32 %2, 10
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = zext nneg i32 %2 to i64
%6 = getelementptr inbounds [10 x ptr], ptr @switch.table.pvrdma_wc_opcode_to_ib, i64 0, i64 %5
%7 = load ptr, ptr %6, align 8
br label %8
8: ; preds = %4, %1
%9 = phi ptr [ @IB_WC_SEND, %1 ], [ %7, %4 ]
%10 = load i32, ptr %9, align 4, !tbaa !6
ret i32 %10
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_infiniband_hw_vmw_pvrdma_extr_pvrdma.h_pvrdma_wc_opcode_to_ib |
; ModuleID = 'AnghaBench/seafile/daemon/extr_wt-monitor-macos.c_handle_watch_command.c'
source_filename = "AnghaBench/seafile/daemon/extr_wt-monitor-macos.c_handle_watch_command.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_10__ = type { i64, i32, i32 }
@CMD_ADD_WATCH = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [47 x i8] c"[wt mon] failed to watch worktree of repo %s.\0A\00", align 1
@.str.1 = private unnamed_addr constant [32 x i8] c"[wt mon] add watch for repo %s\0A\00", align 1
@CMD_DELETE_WATCH = dso_local local_unnamed_addr global i64 0, align 8
@CMD_REFRESH_WATCH = dso_local local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [46 x i8] c"[wt mon] failed to refresh watch of repo %s.\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @handle_watch_command], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @handle_watch_command(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = alloca i32, align 4
%4 = alloca i32, align 4
%5 = load ptr, ptr %0, align 8, !tbaa !5
%6 = load i64, ptr %1, align 8, !tbaa !10
%7 = load i64, ptr @CMD_ADD_WATCH, align 8, !tbaa !14
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %30
9: ; preds = %2
%10 = load i32, ptr %5, align 4, !tbaa !15
%11 = getelementptr inbounds %struct.TYPE_10__, ptr %1, i64 0, i32 1
%12 = load i32, ptr %11, align 8, !tbaa !17
%13 = tail call i64 @g_hash_table_lookup_extended(i32 noundef %10, i32 noundef %12, ptr noundef null, ptr noundef null) #3
%14 = icmp eq i64 %13, 0
br i1 %14, label %17, label %15
15: ; preds = %9
%16 = tail call i32 @reply_watch_command(ptr noundef nonnull %0, i32 noundef 0) #3
br label %59
17: ; preds = %9
%18 = load i32, ptr %11, align 8, !tbaa !17
%19 = getelementptr inbounds %struct.TYPE_10__, ptr %1, i64 0, i32 2
%20 = load i32, ptr %19, align 4, !tbaa !18
%21 = tail call i64 @handle_add_repo(ptr noundef nonnull %0, i32 noundef %18, i32 noundef %20) #3
%22 = icmp slt i64 %21, 0
%23 = load i32, ptr %11, align 8, !tbaa !17
br i1 %22, label %24, label %27
24: ; preds = %17
%25 = tail call i32 @seaf_warning(ptr noundef nonnull @.str, i32 noundef %23) #3
%26 = tail call i32 @reply_watch_command(ptr noundef nonnull %0, i32 noundef -1) #3
br label %59
27: ; preds = %17
%28 = tail call i32 @seaf_debug(ptr noundef nonnull @.str.1, i32 noundef %23) #3
%29 = tail call i32 @reply_watch_command(ptr noundef nonnull %0, i32 noundef 0) #3
br label %59
30: ; preds = %2
%31 = load i64, ptr @CMD_DELETE_WATCH, align 8, !tbaa !14
%32 = icmp eq i64 %6, %31
br i1 %32, label %33, label %45
33: ; preds = %30
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%34 = load i32, ptr %5, align 4, !tbaa !15
%35 = getelementptr inbounds %struct.TYPE_10__, ptr %1, i64 0, i32 1
%36 = load i32, ptr %35, align 8, !tbaa !17
%37 = call i64 @g_hash_table_lookup_extended(i32 noundef %34, i32 noundef %36, ptr noundef nonnull %3, ptr noundef nonnull %4) #3
%38 = icmp eq i64 %37, 0
br i1 %38, label %43, label %39
39: ; preds = %33
%40 = load i32, ptr %35, align 8, !tbaa !17
%41 = load i32, ptr %4, align 4, !tbaa !19
%42 = call i32 @handle_rm_repo(ptr noundef nonnull %0, i32 noundef %40, i32 noundef %41) #3
br label %43
43: ; preds = %33, %39
%44 = call i32 @reply_watch_command(ptr noundef nonnull %0, i32 noundef 0) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
br label %59
45: ; preds = %30
%46 = load i64, ptr @CMD_REFRESH_WATCH, align 8, !tbaa !14
%47 = icmp eq i64 %6, %46
br i1 %47, label %48, label %59
48: ; preds = %45
%49 = getelementptr inbounds %struct.TYPE_10__, ptr %1, i64 0, i32 1
%50 = load i32, ptr %49, align 8, !tbaa !17
%51 = tail call i64 @handle_refresh_repo(ptr noundef nonnull %0, i32 noundef %50) #3
%52 = icmp slt i64 %51, 0
br i1 %52, label %53, label %57
53: ; preds = %48
%54 = load i32, ptr %49, align 8, !tbaa !17
%55 = tail call i32 @seaf_warning(ptr noundef nonnull @.str.2, i32 noundef %54) #3
%56 = tail call i32 @reply_watch_command(ptr noundef nonnull %0, i32 noundef -1) #3
br label %59
57: ; preds = %48
%58 = tail call i32 @reply_watch_command(ptr noundef nonnull %0, i32 noundef 0) #3
br label %59
59: ; preds = %43, %27, %45, %57, %53, %24, %15
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @g_hash_table_lookup_extended(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @reply_watch_command(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @handle_add_repo(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @seaf_warning(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @seaf_debug(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @handle_rm_repo(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i64 @handle_refresh_repo(ptr noundef, i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_12__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_10__", !12, i64 0, !13, i64 8, !13, i64 12}
!12 = !{!"long", !8, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!12, !12, i64 0}
!15 = !{!16, !13, i64 0}
!16 = !{!"TYPE_11__", !13, i64 0}
!17 = !{!11, !13, i64 8}
!18 = !{!11, !13, i64 12}
!19 = !{!13, !13, i64 0}
| ; ModuleID = 'AnghaBench/seafile/daemon/extr_wt-monitor-macos.c_handle_watch_command.c'
source_filename = "AnghaBench/seafile/daemon/extr_wt-monitor-macos.c_handle_watch_command.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CMD_ADD_WATCH = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [47 x i8] c"[wt mon] failed to watch worktree of repo %s.\0A\00", align 1
@.str.1 = private unnamed_addr constant [32 x i8] c"[wt mon] add watch for repo %s\0A\00", align 1
@CMD_DELETE_WATCH = common local_unnamed_addr global i64 0, align 8
@CMD_REFRESH_WATCH = common local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [46 x i8] c"[wt mon] failed to refresh watch of repo %s.\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @handle_watch_command], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @handle_watch_command(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = alloca i32, align 4
%4 = alloca i32, align 4
%5 = load ptr, ptr %0, align 8, !tbaa !6
%6 = load i64, ptr %1, align 8, !tbaa !11
%7 = load i64, ptr @CMD_ADD_WATCH, align 8, !tbaa !15
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %30
9: ; preds = %2
%10 = load i32, ptr %5, align 4, !tbaa !16
%11 = getelementptr inbounds i8, ptr %1, i64 8
%12 = load i32, ptr %11, align 8, !tbaa !18
%13 = tail call i64 @g_hash_table_lookup_extended(i32 noundef %10, i32 noundef %12, ptr noundef null, ptr noundef null) #3
%14 = icmp eq i64 %13, 0
br i1 %14, label %17, label %15
15: ; preds = %9
%16 = tail call i32 @reply_watch_command(ptr noundef nonnull %0, i32 noundef 0) #3
br label %59
17: ; preds = %9
%18 = load i32, ptr %11, align 8, !tbaa !18
%19 = getelementptr inbounds i8, ptr %1, i64 12
%20 = load i32, ptr %19, align 4, !tbaa !19
%21 = tail call i64 @handle_add_repo(ptr noundef nonnull %0, i32 noundef %18, i32 noundef %20) #3
%22 = icmp slt i64 %21, 0
%23 = load i32, ptr %11, align 8, !tbaa !18
br i1 %22, label %24, label %27
24: ; preds = %17
%25 = tail call i32 @seaf_warning(ptr noundef nonnull @.str, i32 noundef %23) #3
%26 = tail call i32 @reply_watch_command(ptr noundef nonnull %0, i32 noundef -1) #3
br label %59
27: ; preds = %17
%28 = tail call i32 @seaf_debug(ptr noundef nonnull @.str.1, i32 noundef %23) #3
%29 = tail call i32 @reply_watch_command(ptr noundef nonnull %0, i32 noundef 0) #3
br label %59
30: ; preds = %2
%31 = load i64, ptr @CMD_DELETE_WATCH, align 8, !tbaa !15
%32 = icmp eq i64 %6, %31
br i1 %32, label %33, label %45
33: ; preds = %30
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%34 = load i32, ptr %5, align 4, !tbaa !16
%35 = getelementptr inbounds i8, ptr %1, i64 8
%36 = load i32, ptr %35, align 8, !tbaa !18
%37 = call i64 @g_hash_table_lookup_extended(i32 noundef %34, i32 noundef %36, ptr noundef nonnull %3, ptr noundef nonnull %4) #3
%38 = icmp eq i64 %37, 0
br i1 %38, label %43, label %39
39: ; preds = %33
%40 = load i32, ptr %35, align 8, !tbaa !18
%41 = load i32, ptr %4, align 4, !tbaa !20
%42 = call i32 @handle_rm_repo(ptr noundef nonnull %0, i32 noundef %40, i32 noundef %41) #3
br label %43
43: ; preds = %33, %39
%44 = call i32 @reply_watch_command(ptr noundef nonnull %0, i32 noundef 0) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
br label %59
45: ; preds = %30
%46 = load i64, ptr @CMD_REFRESH_WATCH, align 8, !tbaa !15
%47 = icmp eq i64 %6, %46
br i1 %47, label %48, label %59
48: ; preds = %45
%49 = getelementptr inbounds i8, ptr %1, i64 8
%50 = load i32, ptr %49, align 8, !tbaa !18
%51 = tail call i64 @handle_refresh_repo(ptr noundef nonnull %0, i32 noundef %50) #3
%52 = icmp slt i64 %51, 0
br i1 %52, label %53, label %57
53: ; preds = %48
%54 = load i32, ptr %49, align 8, !tbaa !18
%55 = tail call i32 @seaf_warning(ptr noundef nonnull @.str.2, i32 noundef %54) #3
%56 = tail call i32 @reply_watch_command(ptr noundef nonnull %0, i32 noundef -1) #3
br label %59
57: ; preds = %48
%58 = tail call i32 @reply_watch_command(ptr noundef nonnull %0, i32 noundef 0) #3
br label %59
59: ; preds = %43, %27, %45, %57, %53, %24, %15
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @g_hash_table_lookup_extended(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @reply_watch_command(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @handle_add_repo(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @seaf_warning(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @seaf_debug(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @handle_rm_repo(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i64 @handle_refresh_repo(ptr noundef, i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_12__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_10__", !13, i64 0, !14, i64 8, !14, i64 12}
!13 = !{!"long", !9, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!13, !13, i64 0}
!16 = !{!17, !14, i64 0}
!17 = !{!"TYPE_11__", !14, i64 0}
!18 = !{!12, !14, i64 8}
!19 = !{!12, !14, i64 12}
!20 = !{!14, !14, i64 0}
| seafile_daemon_extr_wt-monitor-macos.c_handle_watch_command |
; ModuleID = 'AnghaBench/fastsocket/kernel/net/ipv4/extr_tcp_illinois.c_tcp_illinois_ssthresh.c'
source_filename = "AnghaBench/fastsocket/kernel/net/ipv4/extr_tcp_illinois.c_tcp_illinois_ssthresh.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@BETA_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @tcp_illinois_ssthresh], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @tcp_illinois_ssthresh(ptr noundef %0) #0 {
%2 = tail call ptr @tcp_sk(ptr noundef %0) #2
%3 = tail call ptr @inet_csk_ca(ptr noundef %0) #2
%4 = load i32, ptr %2, align 4, !tbaa !5
%5 = load i32, ptr %3, align 4, !tbaa !10
%6 = mul nsw i32 %5, %4
%7 = load i32, ptr @BETA_SHIFT, align 4, !tbaa !12
%8 = ashr i32 %6, %7
%9 = sub nsw i32 %4, %8
%10 = tail call i32 @max(i32 noundef %9, i32 noundef 2) #2
ret i32 %10
}
declare ptr @tcp_sk(ptr noundef) local_unnamed_addr #1
declare ptr @inet_csk_ca(ptr noundef) local_unnamed_addr #1
declare i32 @max(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"tcp_sock", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"illinois", !7, i64 0}
!12 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/ipv4/extr_tcp_illinois.c_tcp_illinois_ssthresh.c'
source_filename = "AnghaBench/fastsocket/kernel/net/ipv4/extr_tcp_illinois.c_tcp_illinois_ssthresh.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BETA_SHIFT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @tcp_illinois_ssthresh], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @tcp_illinois_ssthresh(ptr noundef %0) #0 {
%2 = tail call ptr @tcp_sk(ptr noundef %0) #2
%3 = tail call ptr @inet_csk_ca(ptr noundef %0) #2
%4 = load i32, ptr %2, align 4, !tbaa !6
%5 = load i32, ptr %3, align 4, !tbaa !11
%6 = mul nsw i32 %5, %4
%7 = load i32, ptr @BETA_SHIFT, align 4, !tbaa !13
%8 = ashr i32 %6, %7
%9 = sub nsw i32 %4, %8
%10 = tail call i32 @max(i32 noundef %9, i32 noundef 2) #2
ret i32 %10
}
declare ptr @tcp_sk(ptr noundef) local_unnamed_addr #1
declare ptr @inet_csk_ca(ptr noundef) local_unnamed_addr #1
declare i32 @max(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"tcp_sock", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"illinois", !8, i64 0}
!13 = !{!8, !8, i64 0}
| fastsocket_kernel_net_ipv4_extr_tcp_illinois.c_tcp_illinois_ssthresh |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/mm/kmemcheck/extr_shadow.c_kmemcheck_mark_initialized.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/mm/kmemcheck/extr_shadow.c_kmemcheck_mark_initialized.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@KMEMCHECK_SHADOW_INITIALIZED = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @kmemcheck_mark_initialized(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @KMEMCHECK_SHADOW_INITIALIZED, align 4, !tbaa !5
%4 = tail call i32 @mark_shadow(ptr noundef %0, i32 noundef %1, i32 noundef %3) #2
ret void
}
declare i32 @mark_shadow(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/mm/kmemcheck/extr_shadow.c_kmemcheck_mark_initialized.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/mm/kmemcheck/extr_shadow.c_kmemcheck_mark_initialized.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@KMEMCHECK_SHADOW_INITIALIZED = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @kmemcheck_mark_initialized(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @KMEMCHECK_SHADOW_INITIALIZED, align 4, !tbaa !6
%4 = tail call i32 @mark_shadow(ptr noundef %0, i32 noundef %1, i32 noundef %3) #2
ret void
}
declare i32 @mark_shadow(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_arch_x86_mm_kmemcheck_extr_shadow.c_kmemcheck_mark_initialized |
; ModuleID = 'AnghaBench/linux/fs/gfs2/extr_inode.c_gfs2_lookup_simple.c'
source_filename = "AnghaBench/linux/fs/gfs2/extr_inode.c_gfs2_lookup_simple.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.qstr = type { i32 }
@ENOENT = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local ptr @gfs2_lookup_simple(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca %struct.qstr, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = call i32 @gfs2_str2qstr(ptr noundef nonnull %3, ptr noundef %1) #3
%5 = call ptr @gfs2_lookupi(ptr noundef %0, ptr noundef nonnull %3, i32 noundef 1) #3
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i32, ptr @ENOENT, align 4, !tbaa !5
%9 = sub nsw i32 0, %8
%10 = call ptr @ERR_PTR(i32 noundef %9) #3
br label %11
11: ; preds = %2, %7
%12 = phi ptr [ %10, %7 ], [ %5, %2 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret ptr %12
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @gfs2_str2qstr(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @gfs2_lookupi(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @ERR_PTR(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/fs/gfs2/extr_inode.c_gfs2_lookup_simple.c'
source_filename = "AnghaBench/linux/fs/gfs2/extr_inode.c_gfs2_lookup_simple.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.qstr = type { i32 }
@ENOENT = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @gfs2_lookup_simple(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca %struct.qstr, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = call i32 @gfs2_str2qstr(ptr noundef nonnull %3, ptr noundef %1) #3
%5 = call ptr @gfs2_lookupi(ptr noundef %0, ptr noundef nonnull %3, i32 noundef 1) #3
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i32, ptr @ENOENT, align 4, !tbaa !6
%9 = sub nsw i32 0, %8
%10 = call ptr @ERR_PTR(i32 noundef %9) #3
br label %11
11: ; preds = %2, %7
%12 = phi ptr [ %10, %7 ], [ %5, %2 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret ptr %12
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @gfs2_str2qstr(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @gfs2_lookupi(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @ERR_PTR(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_fs_gfs2_extr_inode.c_gfs2_lookup_simple |
; ModuleID = 'AnghaBench/HandBrake/libhb/extr_bd.c_hb_bd_seek.c'
source_filename = "AnghaBench/HandBrake/libhb/extr_bd.c_hb_bd_seek.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { float, i32, i32, i64 }
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @hb_bd_seek(ptr nocapture noundef %0, float noundef %1) local_unnamed_addr #0 {
%3 = load float, ptr %0, align 8, !tbaa !5
%4 = fmul float %3, %1
%5 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2
%6 = load i32, ptr %5, align 8, !tbaa !12
%7 = tail call i32 @bd_seek_time(i32 noundef %6, float noundef %4) #2
%8 = load i32, ptr %5, align 8, !tbaa !12
%9 = tail call i64 @bd_get_current_chapter(i32 noundef %8) #2
%10 = add nsw i64 %9, 1
%11 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 3
store i64 %10, ptr %11, align 8, !tbaa !13
%12 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%13 = load i32, ptr %12, align 4, !tbaa !14
%14 = tail call i32 @hb_ts_stream_reset(i32 noundef %13) #2
ret i32 1
}
declare i32 @bd_seek_time(i32 noundef, float noundef) local_unnamed_addr #1
declare i64 @bd_get_current_chapter(i32 noundef) local_unnamed_addr #1
declare i32 @hb_ts_stream_reset(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0, !10, i64 4, !10, i64 8, !11, i64 16}
!7 = !{!"float", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!6, !11, i64 16}
!14 = !{!6, !10, i64 4}
| ; ModuleID = 'AnghaBench/HandBrake/libhb/extr_bd.c_hb_bd_seek.c'
source_filename = "AnghaBench/HandBrake/libhb/extr_bd.c_hb_bd_seek.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @hb_bd_seek(ptr nocapture noundef %0, float noundef %1) local_unnamed_addr #0 {
%3 = load float, ptr %0, align 8, !tbaa !6
%4 = fmul float %3, %1
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load i32, ptr %5, align 8, !tbaa !13
%7 = tail call i32 @bd_seek_time(i32 noundef %6, float noundef %4) #2
%8 = load i32, ptr %5, align 8, !tbaa !13
%9 = tail call i64 @bd_get_current_chapter(i32 noundef %8) #2
%10 = add nsw i64 %9, 1
%11 = getelementptr inbounds i8, ptr %0, i64 16
store i64 %10, ptr %11, align 8, !tbaa !14
%12 = getelementptr inbounds i8, ptr %0, i64 4
%13 = load i32, ptr %12, align 4, !tbaa !15
%14 = tail call i32 @hb_ts_stream_reset(i32 noundef %13) #2
ret i32 1
}
declare i32 @bd_seek_time(i32 noundef, float noundef) local_unnamed_addr #1
declare i64 @bd_get_current_chapter(i32 noundef) local_unnamed_addr #1
declare i32 @hb_ts_stream_reset(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 4, !11, i64 8, !12, i64 16}
!8 = !{!"float", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!7, !11, i64 8}
!14 = !{!7, !12, i64 16}
!15 = !{!7, !11, i64 4}
| HandBrake_libhb_extr_bd.c_hb_bd_seek |
; ModuleID = 'AnghaBench/linux/drivers/staging/rtl8192u/extr_r819xU_firmware.c_firmware_init_param.c'
source_filename = "AnghaBench/linux/drivers/staging/rtl8192u/extr_r819xU_firmware.c_firmware_init_param.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MAX_TRANSMIT_BUFFER_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @firmware_init_param], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @firmware_init_param(ptr noundef %0) #0 {
%2 = tail call ptr @ieee80211_priv(ptr noundef %0) #2
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load i32, ptr @MAX_TRANSMIT_BUFFER_SIZE, align 4, !tbaa !10
%5 = tail call i32 @GET_COMMAND_PACKET_FRAG_THRESHOLD(i32 noundef %4) #2
store i32 %5, ptr %3, align 4, !tbaa !12
ret void
}
declare ptr @ieee80211_priv(ptr noundef) local_unnamed_addr #1
declare i32 @GET_COMMAND_PACKET_FRAG_THRESHOLD(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"r8192_priv", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_2__", !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/staging/rtl8192u/extr_r819xU_firmware.c_firmware_init_param.c'
source_filename = "AnghaBench/linux/drivers/staging/rtl8192u/extr_r819xU_firmware.c_firmware_init_param.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MAX_TRANSMIT_BUFFER_SIZE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @firmware_init_param], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @firmware_init_param(ptr noundef %0) #0 {
%2 = tail call ptr @ieee80211_priv(ptr noundef %0) #2
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load i32, ptr @MAX_TRANSMIT_BUFFER_SIZE, align 4, !tbaa !11
%5 = tail call i32 @GET_COMMAND_PACKET_FRAG_THRESHOLD(i32 noundef %4) #2
store i32 %5, ptr %3, align 4, !tbaa !13
ret void
}
declare ptr @ieee80211_priv(ptr noundef) local_unnamed_addr #1
declare i32 @GET_COMMAND_PACKET_FRAG_THRESHOLD(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"r8192_priv", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"TYPE_2__", !12, i64 0}
| linux_drivers_staging_rtl8192u_extr_r819xU_firmware.c_firmware_init_param |
; ModuleID = 'AnghaBench/postgres/src/backend/utils/adt/extr_rangetypes.c_make_range.c'
source_filename = "AnghaBench/postgres/src/backend/utils/adt/extr_rangetypes.c_make_range.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local ptr @make_range(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = tail call ptr @range_serialize(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #2
%6 = load i32, ptr %0, align 4, !tbaa !5
%7 = tail call i64 @OidIsValid(i32 noundef %6) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %16, label %9
9: ; preds = %4
%10 = tail call i32 @RangeIsEmpty(ptr noundef %5) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = tail call i32 @RangeTypePGetDatum(ptr noundef %5) #2
%14 = tail call i32 @FunctionCall1(ptr noundef nonnull %0, i32 noundef %13) #2
%15 = tail call ptr @DatumGetRangeTypeP(i32 noundef %14) #2
br label %16
16: ; preds = %12, %9, %4
%17 = phi ptr [ %5, %9 ], [ %15, %12 ], [ %5, %4 ]
ret ptr %17
}
declare ptr @range_serialize(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @OidIsValid(i32 noundef) local_unnamed_addr #1
declare i32 @RangeIsEmpty(ptr noundef) local_unnamed_addr #1
declare ptr @DatumGetRangeTypeP(i32 noundef) local_unnamed_addr #1
declare i32 @FunctionCall1(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @RangeTypePGetDatum(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/postgres/src/backend/utils/adt/extr_rangetypes.c_make_range.c'
source_filename = "AnghaBench/postgres/src/backend/utils/adt/extr_rangetypes.c_make_range.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @make_range(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = tail call ptr @range_serialize(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #2
%6 = load i32, ptr %0, align 4, !tbaa !6
%7 = tail call i64 @OidIsValid(i32 noundef %6) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %16, label %9
9: ; preds = %4
%10 = tail call i32 @RangeIsEmpty(ptr noundef %5) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = tail call i32 @RangeTypePGetDatum(ptr noundef %5) #2
%14 = tail call i32 @FunctionCall1(ptr noundef nonnull %0, i32 noundef %13) #2
%15 = tail call ptr @DatumGetRangeTypeP(i32 noundef %14) #2
br label %16
16: ; preds = %12, %9, %4
%17 = phi ptr [ %5, %9 ], [ %15, %12 ], [ %5, %4 ]
ret ptr %17
}
declare ptr @range_serialize(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @OidIsValid(i32 noundef) local_unnamed_addr #1
declare i32 @RangeIsEmpty(ptr noundef) local_unnamed_addr #1
declare ptr @DatumGetRangeTypeP(i32 noundef) local_unnamed_addr #1
declare i32 @FunctionCall1(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @RangeTypePGetDatum(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"TYPE_6__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
| postgres_src_backend_utils_adt_extr_rangetypes.c_make_range |
; ModuleID = 'AnghaBench/sqlcipher/tool/extr_sqldiff.c_checksum.c'
source_filename = "AnghaBench/sqlcipher/tool/extr_sqldiff.c_checksum.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @checksum], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable
define internal i32 @checksum(ptr nocapture noundef readonly %0, i64 noundef %1) #0 {
%3 = icmp ugt i64 %1, 15
br i1 %3, label %4, label %33
4: ; preds = %2
%5 = add i64 %1, -16
%6 = and i64 %5, 16
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %25
8: ; preds = %4
%9 = getelementptr inbounds i8, ptr %0, i64 4
%10 = getelementptr inbounds i8, ptr %0, i64 8
%11 = getelementptr inbounds i8, ptr %0, i64 12
%12 = load <4 x i8>, ptr %0, align 1, !tbaa !5
%13 = zext <4 x i8> %12 to <4 x i32>
%14 = load <4 x i8>, ptr %9, align 1, !tbaa !5
%15 = zext <4 x i8> %14 to <4 x i32>
%16 = load <4 x i8>, ptr %10, align 1, !tbaa !5
%17 = zext <4 x i8> %16 to <4 x i32>
%18 = load <4 x i8>, ptr %11, align 1, !tbaa !5
%19 = zext <4 x i8> %18 to <4 x i32>
%20 = add nuw nsw <4 x i32> %13, %15
%21 = add nuw nsw <4 x i32> %20, %17
%22 = add nuw nsw <4 x i32> %21, %19
%23 = getelementptr inbounds i8, ptr %0, i64 16
%24 = add i64 %1, -16
br label %25
25: ; preds = %8, %4
%26 = phi ptr [ %0, %4 ], [ %23, %8 ]
%27 = phi i64 [ %1, %4 ], [ %24, %8 ]
%28 = phi <4 x i32> [ zeroinitializer, %4 ], [ %22, %8 ]
%29 = phi <4 x i32> [ undef, %4 ], [ %22, %8 ]
%30 = phi ptr [ undef, %4 ], [ %23, %8 ]
%31 = phi i64 [ undef, %4 ], [ %24, %8 ]
%32 = icmp ult i64 %5, 16
br i1 %32, label %33, label %64
33: ; preds = %25, %64, %2
%34 = phi i64 [ %1, %2 ], [ %31, %25 ], [ %100, %64 ]
%35 = phi ptr [ %0, %2 ], [ %30, %25 ], [ %99, %64 ]
%36 = phi <4 x i32> [ zeroinitializer, %2 ], [ %29, %25 ], [ %98, %64 ]
%37 = icmp ugt i64 %34, 3
br i1 %37, label %38, label %124
38: ; preds = %33
%39 = add i64 %34, -4
%40 = lshr i64 %39, 2
%41 = add nuw nsw i64 %40, 1
%42 = and i64 %41, 3
%43 = icmp eq i64 %42, 0
br i1 %43, label %56, label %44
44: ; preds = %38, %44
%45 = phi ptr [ %52, %44 ], [ %35, %38 ]
%46 = phi i64 [ %53, %44 ], [ %34, %38 ]
%47 = phi <4 x i32> [ %51, %44 ], [ %36, %38 ]
%48 = phi i64 [ %54, %44 ], [ 0, %38 ]
%49 = load <4 x i8>, ptr %45, align 1, !tbaa !5
%50 = zext <4 x i8> %49 to <4 x i32>
%51 = add <4 x i32> %47, %50
%52 = getelementptr inbounds i8, ptr %45, i64 4
%53 = add nsw i64 %46, -4
%54 = add i64 %48, 1
%55 = icmp eq i64 %54, %42
br i1 %55, label %56, label %44, !llvm.loop !8
56: ; preds = %44, %38
%57 = phi ptr [ %35, %38 ], [ %52, %44 ]
%58 = phi i64 [ %34, %38 ], [ %53, %44 ]
%59 = phi <4 x i32> [ %36, %38 ], [ %51, %44 ]
%60 = phi <4 x i32> [ undef, %38 ], [ %51, %44 ]
%61 = phi ptr [ undef, %38 ], [ %52, %44 ]
%62 = phi i64 [ undef, %38 ], [ %53, %44 ]
%63 = icmp ult i64 %39, 12
br i1 %63, label %124, label %102
64: ; preds = %25, %64
%65 = phi ptr [ %99, %64 ], [ %26, %25 ]
%66 = phi i64 [ %100, %64 ], [ %27, %25 ]
%67 = phi <4 x i32> [ %98, %64 ], [ %28, %25 ]
%68 = getelementptr inbounds i8, ptr %65, i64 4
%69 = getelementptr inbounds i8, ptr %65, i64 8
%70 = getelementptr inbounds i8, ptr %65, i64 12
%71 = load <4 x i8>, ptr %65, align 1, !tbaa !5
%72 = zext <4 x i8> %71 to <4 x i32>
%73 = load <4 x i8>, ptr %68, align 1, !tbaa !5
%74 = zext <4 x i8> %73 to <4 x i32>
%75 = load <4 x i8>, ptr %69, align 1, !tbaa !5
%76 = zext <4 x i8> %75 to <4 x i32>
%77 = load <4 x i8>, ptr %70, align 1, !tbaa !5
%78 = zext <4 x i8> %77 to <4 x i32>
%79 = add <4 x i32> %67, %72
%80 = add <4 x i32> %79, %74
%81 = add <4 x i32> %80, %76
%82 = add <4 x i32> %81, %78
%83 = getelementptr inbounds i8, ptr %65, i64 16
%84 = getelementptr inbounds i8, ptr %65, i64 20
%85 = getelementptr inbounds i8, ptr %65, i64 24
%86 = getelementptr inbounds i8, ptr %65, i64 28
%87 = load <4 x i8>, ptr %83, align 1, !tbaa !5
%88 = zext <4 x i8> %87 to <4 x i32>
%89 = load <4 x i8>, ptr %84, align 1, !tbaa !5
%90 = zext <4 x i8> %89 to <4 x i32>
%91 = load <4 x i8>, ptr %85, align 1, !tbaa !5
%92 = zext <4 x i8> %91 to <4 x i32>
%93 = load <4 x i8>, ptr %86, align 1, !tbaa !5
%94 = zext <4 x i8> %93 to <4 x i32>
%95 = add <4 x i32> %82, %88
%96 = add <4 x i32> %95, %90
%97 = add <4 x i32> %96, %92
%98 = add <4 x i32> %97, %94
%99 = getelementptr inbounds i8, ptr %65, i64 32
%100 = add i64 %66, -32
%101 = icmp ugt i64 %100, 15
br i1 %101, label %64, label %33, !llvm.loop !10
102: ; preds = %56, %102
%103 = phi ptr [ %121, %102 ], [ %57, %56 ]
%104 = phi i64 [ %122, %102 ], [ %58, %56 ]
%105 = phi <4 x i32> [ %120, %102 ], [ %59, %56 ]
%106 = load <4 x i8>, ptr %103, align 1, !tbaa !5
%107 = zext <4 x i8> %106 to <4 x i32>
%108 = add <4 x i32> %105, %107
%109 = getelementptr inbounds i8, ptr %103, i64 4
%110 = load <4 x i8>, ptr %109, align 1, !tbaa !5
%111 = zext <4 x i8> %110 to <4 x i32>
%112 = add <4 x i32> %108, %111
%113 = getelementptr inbounds i8, ptr %103, i64 8
%114 = load <4 x i8>, ptr %113, align 1, !tbaa !5
%115 = zext <4 x i8> %114 to <4 x i32>
%116 = add <4 x i32> %112, %115
%117 = getelementptr inbounds i8, ptr %103, i64 12
%118 = load <4 x i8>, ptr %117, align 1, !tbaa !5
%119 = zext <4 x i8> %118 to <4 x i32>
%120 = add <4 x i32> %116, %119
%121 = getelementptr inbounds i8, ptr %103, i64 16
%122 = add nsw i64 %104, -16
%123 = icmp ugt i64 %122, 3
br i1 %123, label %102, label %124, !llvm.loop !12
124: ; preds = %56, %102, %33
%125 = phi i64 [ %34, %33 ], [ %62, %56 ], [ %122, %102 ]
%126 = phi ptr [ %35, %33 ], [ %61, %56 ], [ %121, %102 ]
%127 = phi <4 x i32> [ %36, %33 ], [ %60, %56 ], [ %120, %102 ]
%128 = extractelement <4 x i32> %127, i64 2
%129 = shl i32 %128, 8
%130 = extractelement <4 x i32> %127, i64 1
%131 = shl i32 %130, 16
%132 = extractelement <4 x i32> %127, i64 0
%133 = shl i32 %132, 24
%134 = add i32 %131, %133
%135 = add i32 %134, %129
%136 = extractelement <4 x i32> %127, i64 3
%137 = add i32 %135, %136
switch i64 %125, label %157 [
i64 3, label %138
i64 2, label %144
i64 1, label %151
]
138: ; preds = %124
%139 = getelementptr inbounds i8, ptr %126, i64 2
%140 = load i8, ptr %139, align 1, !tbaa !5
%141 = zext i8 %140 to i32
%142 = shl nuw nsw i32 %141, 8
%143 = add i32 %142, %137
br label %144
144: ; preds = %124, %138
%145 = phi i32 [ %137, %124 ], [ %143, %138 ]
%146 = getelementptr inbounds i8, ptr %126, i64 1
%147 = load i8, ptr %146, align 1, !tbaa !5
%148 = zext i8 %147 to i32
%149 = shl nuw nsw i32 %148, 16
%150 = add i32 %149, %145
br label %151
151: ; preds = %124, %144
%152 = phi i32 [ %137, %124 ], [ %150, %144 ]
%153 = load i8, ptr %126, align 1, !tbaa !5
%154 = zext i8 %153 to i32
%155 = shl nuw i32 %154, 24
%156 = add i32 %155, %152
br label %157
157: ; preds = %151, %124
%158 = phi i32 [ %137, %124 ], [ %156, %151 ]
ret i32 %158
}
attributes #0 = { nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.unroll.disable"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
| ; ModuleID = 'AnghaBench/sqlcipher/tool/extr_sqldiff.c_checksum.c'
source_filename = "AnghaBench/sqlcipher/tool/extr_sqldiff.c_checksum.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @checksum], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @checksum(ptr nocapture noundef readonly %0, i64 noundef %1) #0 {
%3 = icmp ugt i64 %1, 15
br i1 %3, label %66, label %4
4: ; preds = %66, %2
%5 = phi i64 [ %1, %2 ], [ %86, %66 ]
%6 = phi ptr [ %0, %2 ], [ %85, %66 ]
%7 = phi <4 x i32> [ zeroinitializer, %2 ], [ %84, %66 ]
%8 = icmp ugt i64 %5, 3
%9 = extractelement <4 x i32> %7, i64 0
%10 = extractelement <4 x i32> %7, i64 1
%11 = extractelement <4 x i32> %7, i64 2
%12 = extractelement <4 x i32> %7, i64 3
br i1 %8, label %13, label %113
13: ; preds = %4
%14 = add nsw i64 %5, -4
%15 = lshr i64 %14, 2
%16 = add nuw nsw i64 %15, 1
%17 = icmp ult i64 %14, 60
br i1 %17, label %18, label %25
18: ; preds = %60, %13
%19 = phi i32 [ %12, %13 ], [ %61, %60 ]
%20 = phi i32 [ %11, %13 ], [ %62, %60 ]
%21 = phi i32 [ %10, %13 ], [ %63, %60 ]
%22 = phi i32 [ %9, %13 ], [ %64, %60 ]
%23 = phi ptr [ %6, %13 ], [ %28, %60 ]
%24 = phi i64 [ %5, %13 ], [ %30, %60 ]
br label %88
25: ; preds = %13
%26 = and i64 %16, 9223372036854775792
%27 = shl i64 %26, 2
%28 = getelementptr i8, ptr %6, i64 %27
%29 = mul i64 %26, -4
%30 = or disjoint i64 %5, %29
%31 = shufflevector <4 x i32> %7, <4 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
%32 = shufflevector <16 x i32> <i32 poison, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>, <16 x i32> %31, <16 x i32> <i32 19, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%33 = shufflevector <16 x i32> <i32 poison, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>, <16 x i32> %31, <16 x i32> <i32 18, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%34 = shufflevector <16 x i32> <i32 poison, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>, <16 x i32> %31, <16 x i32> <i32 17, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%35 = shufflevector <4 x i32> %7, <4 x i32> poison, <16 x i32> <i32 0, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
%36 = shufflevector <16 x i32> %35, <16 x i32> <i32 poison, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>, <16 x i32> <i32 0, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
br label %37
37: ; preds = %37, %25
%38 = phi i64 [ 0, %25 ], [ %58, %37 ]
%39 = phi <16 x i32> [ %32, %25 ], [ %57, %37 ]
%40 = phi <16 x i32> [ %33, %25 ], [ %55, %37 ]
%41 = phi <16 x i32> [ %34, %25 ], [ %53, %37 ]
%42 = phi <16 x i32> [ %36, %25 ], [ %51, %37 ]
%43 = shl i64 %38, 2
%44 = getelementptr i8, ptr %6, i64 %43
%45 = load <64 x i8>, ptr %44, align 1, !tbaa !6
%46 = shufflevector <64 x i8> %45, <64 x i8> poison, <16 x i32> <i32 0, i32 4, i32 8, i32 12, i32 16, i32 20, i32 24, i32 28, i32 32, i32 36, i32 40, i32 44, i32 48, i32 52, i32 56, i32 60>
%47 = shufflevector <64 x i8> %45, <64 x i8> poison, <16 x i32> <i32 1, i32 5, i32 9, i32 13, i32 17, i32 21, i32 25, i32 29, i32 33, i32 37, i32 41, i32 45, i32 49, i32 53, i32 57, i32 61>
%48 = shufflevector <64 x i8> %45, <64 x i8> poison, <16 x i32> <i32 2, i32 6, i32 10, i32 14, i32 18, i32 22, i32 26, i32 30, i32 34, i32 38, i32 42, i32 46, i32 50, i32 54, i32 58, i32 62>
%49 = shufflevector <64 x i8> %45, <64 x i8> poison, <16 x i32> <i32 3, i32 7, i32 11, i32 15, i32 19, i32 23, i32 27, i32 31, i32 35, i32 39, i32 43, i32 47, i32 51, i32 55, i32 59, i32 63>
%50 = zext <16 x i8> %46 to <16 x i32>
%51 = add <16 x i32> %42, %50
%52 = zext <16 x i8> %47 to <16 x i32>
%53 = add <16 x i32> %41, %52
%54 = zext <16 x i8> %48 to <16 x i32>
%55 = add <16 x i32> %40, %54
%56 = zext <16 x i8> %49 to <16 x i32>
%57 = add <16 x i32> %39, %56
%58 = add nuw i64 %38, 16
%59 = icmp eq i64 %58, %26
br i1 %59, label %60, label %37, !llvm.loop !9
60: ; preds = %37
%61 = tail call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %57)
%62 = tail call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %55)
%63 = tail call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %53)
%64 = tail call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %51)
%65 = icmp eq i64 %16, %26
br i1 %65, label %113, label %18
66: ; preds = %2, %66
%67 = phi ptr [ %85, %66 ], [ %0, %2 ]
%68 = phi i64 [ %86, %66 ], [ %1, %2 ]
%69 = phi <4 x i32> [ %84, %66 ], [ zeroinitializer, %2 ]
%70 = getelementptr inbounds i8, ptr %67, i64 4
%71 = getelementptr inbounds i8, ptr %67, i64 8
%72 = getelementptr inbounds i8, ptr %67, i64 12
%73 = load <4 x i8>, ptr %67, align 1, !tbaa !6
%74 = zext <4 x i8> %73 to <4 x i32>
%75 = load <4 x i8>, ptr %70, align 1, !tbaa !6
%76 = zext <4 x i8> %75 to <4 x i32>
%77 = load <4 x i8>, ptr %71, align 1, !tbaa !6
%78 = zext <4 x i8> %77 to <4 x i32>
%79 = load <4 x i8>, ptr %72, align 1, !tbaa !6
%80 = zext <4 x i8> %79 to <4 x i32>
%81 = add <4 x i32> %69, %74
%82 = add <4 x i32> %81, %76
%83 = add <4 x i32> %82, %78
%84 = add <4 x i32> %83, %80
%85 = getelementptr inbounds i8, ptr %67, i64 16
%86 = add i64 %68, -16
%87 = icmp ugt i64 %86, 15
br i1 %87, label %66, label %4, !llvm.loop !13
88: ; preds = %18, %88
%89 = phi i32 [ %109, %88 ], [ %19, %18 ]
%90 = phi i32 [ %105, %88 ], [ %20, %18 ]
%91 = phi i32 [ %101, %88 ], [ %21, %18 ]
%92 = phi i32 [ %97, %88 ], [ %22, %18 ]
%93 = phi ptr [ %110, %88 ], [ %23, %18 ]
%94 = phi i64 [ %111, %88 ], [ %24, %18 ]
%95 = load i8, ptr %93, align 1, !tbaa !6
%96 = zext i8 %95 to i32
%97 = add i32 %92, %96
%98 = getelementptr inbounds i8, ptr %93, i64 1
%99 = load i8, ptr %98, align 1, !tbaa !6
%100 = zext i8 %99 to i32
%101 = add i32 %91, %100
%102 = getelementptr inbounds i8, ptr %93, i64 2
%103 = load i8, ptr %102, align 1, !tbaa !6
%104 = zext i8 %103 to i32
%105 = add i32 %90, %104
%106 = getelementptr inbounds i8, ptr %93, i64 3
%107 = load i8, ptr %106, align 1, !tbaa !6
%108 = zext i8 %107 to i32
%109 = add i32 %89, %108
%110 = getelementptr inbounds i8, ptr %93, i64 4
%111 = add nsw i64 %94, -4
%112 = icmp ugt i64 %111, 3
br i1 %112, label %88, label %113, !llvm.loop !14
113: ; preds = %88, %60, %4
%114 = phi i64 [ %5, %4 ], [ %30, %60 ], [ %111, %88 ]
%115 = phi ptr [ %6, %4 ], [ %28, %60 ], [ %110, %88 ]
%116 = phi i32 [ %9, %4 ], [ %64, %60 ], [ %97, %88 ]
%117 = phi i32 [ %10, %4 ], [ %63, %60 ], [ %101, %88 ]
%118 = phi i32 [ %11, %4 ], [ %62, %60 ], [ %105, %88 ]
%119 = phi i32 [ %12, %4 ], [ %61, %60 ], [ %109, %88 ]
%120 = shl i32 %118, 8
%121 = shl i32 %117, 16
%122 = shl i32 %116, 24
%123 = add i32 %121, %122
%124 = add i32 %123, %120
%125 = add i32 %124, %119
switch i64 %114, label %145 [
i64 3, label %126
i64 2, label %132
i64 1, label %139
i64 0, label %146
]
126: ; preds = %113
%127 = getelementptr inbounds i8, ptr %115, i64 2
%128 = load i8, ptr %127, align 1, !tbaa !6
%129 = zext i8 %128 to i32
%130 = shl nuw nsw i32 %129, 8
%131 = add i32 %130, %125
br label %132
132: ; preds = %113, %126
%133 = phi i32 [ %125, %113 ], [ %131, %126 ]
%134 = getelementptr inbounds i8, ptr %115, i64 1
%135 = load i8, ptr %134, align 1, !tbaa !6
%136 = zext i8 %135 to i32
%137 = shl nuw nsw i32 %136, 16
%138 = add i32 %137, %133
br label %139
139: ; preds = %113, %132
%140 = phi i32 [ %125, %113 ], [ %138, %132 ]
%141 = load i8, ptr %115, align 1, !tbaa !6
%142 = zext i8 %141 to i32
%143 = shl nuw i32 %142, 24
%144 = add i32 %143, %140
br label %146
145: ; preds = %113
unreachable
146: ; preds = %113, %139
%147 = phi i32 [ %125, %113 ], [ %144, %139 ]
ret i32 %147
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v16i32(<16 x i32>) #1
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10, !12, !11}
| sqlcipher_tool_extr_sqldiff.c_checksum |
; ModuleID = 'AnghaBench/masscan/src/extr_stub-pcap.c_null_PCAP_OPEN_OFFLINE.c'
source_filename = "AnghaBench/masscan/src/extr_stub-pcap.c_null_PCAP_OPEN_OFFLINE.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @null_PCAP_OPEN_OFFLINE], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @null_PCAP_OPEN_OFFLINE(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call ptr @my_null(i32 noundef 2, ptr noundef %0, ptr noundef %1) #2
ret ptr %3
}
declare ptr @my_null(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/masscan/src/extr_stub-pcap.c_null_PCAP_OPEN_OFFLINE.c'
source_filename = "AnghaBench/masscan/src/extr_stub-pcap.c_null_PCAP_OPEN_OFFLINE.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @null_PCAP_OPEN_OFFLINE], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @null_PCAP_OPEN_OFFLINE(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call ptr @my_null(i32 noundef 2, ptr noundef %0, ptr noundef %1) #2
ret ptr %3
}
declare ptr @my_null(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| masscan_src_extr_stub-pcap.c_null_PCAP_OPEN_OFFLINE |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/mach-davinci/extr_cp_intc.c_cp_intc_set_irq_type.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/mach-davinci/extr_cp_intc.c_cp_intc_set_irq_type.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @cp_intc_set_irq_type], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @cp_intc_set_irq_type(i32 noundef %0, i32 noundef %1) #0 {
%3 = tail call i32 @BIT_WORD(i32 noundef %0) #2
%4 = tail call i32 @BIT_MASK(i32 noundef %0) #2
%5 = tail call i32 @CP_INTC_SYS_POLARITY(i32 noundef %3) #2
%6 = tail call i32 @cp_intc_read(i32 noundef %5) #2
%7 = tail call i32 @CP_INTC_SYS_TYPE(i32 noundef %3) #2
%8 = tail call i32 @cp_intc_read(i32 noundef %7) #2
switch i32 %1, label %24 [
i32 130, label %9
i32 131, label %12
i32 129, label %16
i32 128, label %20
]
9: ; preds = %2
%10 = or i32 %6, %4
%11 = or i32 %8, %4
br label %27
12: ; preds = %2
%13 = xor i32 %4, -1
%14 = and i32 %6, %13
%15 = or i32 %8, %4
br label %27
16: ; preds = %2
%17 = or i32 %6, %4
%18 = xor i32 %4, -1
%19 = and i32 %8, %18
br label %27
20: ; preds = %2
%21 = xor i32 %4, -1
%22 = and i32 %6, %21
%23 = and i32 %8, %21
br label %27
24: ; preds = %2
%25 = load i32, ptr @EINVAL, align 4, !tbaa !5
%26 = sub nsw i32 0, %25
br label %34
27: ; preds = %20, %16, %12, %9
%28 = phi i32 [ %22, %20 ], [ %17, %16 ], [ %14, %12 ], [ %10, %9 ]
%29 = phi i32 [ %23, %20 ], [ %19, %16 ], [ %15, %12 ], [ %11, %9 ]
%30 = tail call i32 @CP_INTC_SYS_POLARITY(i32 noundef %3) #2
%31 = tail call i32 @cp_intc_write(i32 noundef %28, i32 noundef %30) #2
%32 = tail call i32 @CP_INTC_SYS_TYPE(i32 noundef %3) #2
%33 = tail call i32 @cp_intc_write(i32 noundef %29, i32 noundef %32) #2
br label %34
34: ; preds = %27, %24
%35 = phi i32 [ %26, %24 ], [ 0, %27 ]
ret i32 %35
}
declare i32 @BIT_WORD(i32 noundef) local_unnamed_addr #1
declare i32 @BIT_MASK(i32 noundef) local_unnamed_addr #1
declare i32 @cp_intc_read(i32 noundef) local_unnamed_addr #1
declare i32 @CP_INTC_SYS_POLARITY(i32 noundef) local_unnamed_addr #1
declare i32 @CP_INTC_SYS_TYPE(i32 noundef) local_unnamed_addr #1
declare i32 @cp_intc_write(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/mach-davinci/extr_cp_intc.c_cp_intc_set_irq_type.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/mach-davinci/extr_cp_intc.c_cp_intc_set_irq_type.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cp_intc_set_irq_type], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @cp_intc_set_irq_type(i32 noundef %0, i32 noundef %1) #0 {
%3 = tail call i32 @BIT_WORD(i32 noundef %0) #2
%4 = tail call i32 @BIT_MASK(i32 noundef %0) #2
%5 = tail call i32 @CP_INTC_SYS_POLARITY(i32 noundef %3) #2
%6 = tail call i32 @cp_intc_read(i32 noundef %5) #2
%7 = tail call i32 @CP_INTC_SYS_TYPE(i32 noundef %3) #2
%8 = tail call i32 @cp_intc_read(i32 noundef %7) #2
switch i32 %1, label %24 [
i32 130, label %9
i32 131, label %12
i32 129, label %16
i32 128, label %20
]
9: ; preds = %2
%10 = or i32 %6, %4
%11 = or i32 %8, %4
br label %27
12: ; preds = %2
%13 = xor i32 %4, -1
%14 = and i32 %6, %13
%15 = or i32 %8, %4
br label %27
16: ; preds = %2
%17 = or i32 %6, %4
%18 = xor i32 %4, -1
%19 = and i32 %8, %18
br label %27
20: ; preds = %2
%21 = xor i32 %4, -1
%22 = and i32 %6, %21
%23 = and i32 %8, %21
br label %27
24: ; preds = %2
%25 = load i32, ptr @EINVAL, align 4, !tbaa !6
%26 = sub nsw i32 0, %25
br label %34
27: ; preds = %20, %16, %12, %9
%28 = phi i32 [ %22, %20 ], [ %17, %16 ], [ %14, %12 ], [ %10, %9 ]
%29 = phi i32 [ %23, %20 ], [ %19, %16 ], [ %15, %12 ], [ %11, %9 ]
%30 = tail call i32 @CP_INTC_SYS_POLARITY(i32 noundef %3) #2
%31 = tail call i32 @cp_intc_write(i32 noundef %28, i32 noundef %30) #2
%32 = tail call i32 @CP_INTC_SYS_TYPE(i32 noundef %3) #2
%33 = tail call i32 @cp_intc_write(i32 noundef %29, i32 noundef %32) #2
br label %34
34: ; preds = %27, %24
%35 = phi i32 [ %26, %24 ], [ 0, %27 ]
ret i32 %35
}
declare i32 @BIT_WORD(i32 noundef) local_unnamed_addr #1
declare i32 @BIT_MASK(i32 noundef) local_unnamed_addr #1
declare i32 @cp_intc_read(i32 noundef) local_unnamed_addr #1
declare i32 @CP_INTC_SYS_POLARITY(i32 noundef) local_unnamed_addr #1
declare i32 @CP_INTC_SYS_TYPE(i32 noundef) local_unnamed_addr #1
declare i32 @cp_intc_write(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_arch_arm_mach-davinci_extr_cp_intc.c_cp_intc_set_irq_type |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/extr_gf100.c_gf100_gr_zbc_color_get.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/extr_gf100.c_gf100_gr_zbc_color_get.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.gf100_gr = type { ptr, ptr, %struct.TYPE_11__ }
%struct.TYPE_11__ = type { %struct.TYPE_10__ }
%struct.TYPE_10__ = type { %struct.TYPE_9__ }
%struct.TYPE_9__ = type { ptr }
%struct.nvkm_ltc = type { i32, i32 }
%struct.TYPE_12__ = type { i32, i32, i32 }
@ENOSPC = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @gf100_gr_zbc_color_get], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @gf100_gr_zbc_color_get(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = getelementptr inbounds %struct.gf100_gr, ptr %0, i64 0, i32 2
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = load ptr, ptr %6, align 8, !tbaa !13
%8 = load i32, ptr @ENOSPC, align 4, !tbaa !15
%9 = sub nsw i32 0, %8
%10 = load i32, ptr %7, align 4, !tbaa !17
%11 = getelementptr inbounds %struct.nvkm_ltc, ptr %7, i64 0, i32 1
%12 = load i32, ptr %11, align 4, !tbaa !19
%13 = icmp sgt i32 %10, %12
br i1 %13, label %55, label %14
14: ; preds = %4
%15 = getelementptr inbounds %struct.gf100_gr, ptr %0, i64 0, i32 1
%16 = sext i32 %10 to i64
br label %17
17: ; preds = %14, %49
%18 = phi i32 [ %12, %14 ], [ %50, %49 ]
%19 = phi i64 [ %16, %14 ], [ %52, %49 ]
%20 = phi i32 [ %9, %14 ], [ %51, %49 ]
%21 = load ptr, ptr %15, align 8, !tbaa !20
%22 = getelementptr inbounds %struct.TYPE_12__, ptr %21, i64 %19
%23 = load i32, ptr %22, align 4, !tbaa !21
%24 = icmp eq i32 %23, 0
br i1 %24, label %45, label %25
25: ; preds = %17
%26 = icmp eq i32 %23, %1
br i1 %26, label %27, label %49
27: ; preds = %25
%28 = getelementptr inbounds %struct.TYPE_12__, ptr %21, i64 %19, i32 2
%29 = load i32, ptr %28, align 4, !tbaa !23
%30 = tail call i64 @memcmp(i32 noundef %29, ptr noundef %2, i32 noundef 4) #2
%31 = icmp eq i64 %30, 0
br i1 %31, label %34, label %32
32: ; preds = %27
%33 = load i32, ptr %11, align 4, !tbaa !19
br label %49
34: ; preds = %27
%35 = trunc i64 %19 to i32
%36 = load ptr, ptr %15, align 8, !tbaa !20
%37 = getelementptr inbounds %struct.TYPE_12__, ptr %36, i64 %19, i32 1
%38 = load i32, ptr %37, align 4, !tbaa !24
%39 = tail call i64 @memcmp(i32 noundef %38, ptr noundef %3, i32 noundef 4) #2
%40 = icmp eq i64 %39, 0
br i1 %40, label %76, label %41
41: ; preds = %34
%42 = tail call i32 @WARN_ON(i32 noundef 1) #2
%43 = load i32, ptr @EINVAL, align 4, !tbaa !15
%44 = sub nsw i32 0, %43
br label %76
45: ; preds = %17
%46 = icmp slt i32 %20, 0
%47 = trunc i64 %19 to i32
%48 = select i1 %46, i32 %47, i32 %20
br label %49
49: ; preds = %32, %25, %45
%50 = phi i32 [ %18, %25 ], [ %33, %32 ], [ %18, %45 ]
%51 = phi i32 [ %20, %25 ], [ %20, %32 ], [ %48, %45 ]
%52 = add nsw i64 %19, 1
%53 = sext i32 %50 to i64
%54 = icmp slt i64 %19, %53
br i1 %54, label %17, label %55, !llvm.loop !25
55: ; preds = %49, %4
%56 = phi i32 [ %9, %4 ], [ %51, %49 ]
%57 = icmp slt i32 %56, 0
br i1 %57, label %76, label %58
58: ; preds = %55
%59 = getelementptr inbounds %struct.gf100_gr, ptr %0, i64 0, i32 1
%60 = load ptr, ptr %59, align 8, !tbaa !20
%61 = zext nneg i32 %56 to i64
%62 = getelementptr inbounds %struct.TYPE_12__, ptr %60, i64 %61, i32 2
%63 = load i32, ptr %62, align 4, !tbaa !23
%64 = tail call i32 @memcpy(i32 noundef %63, ptr noundef %2, i32 noundef 4) #2
%65 = load ptr, ptr %59, align 8, !tbaa !20
%66 = getelementptr inbounds %struct.TYPE_12__, ptr %65, i64 %61, i32 1
%67 = load i32, ptr %66, align 4, !tbaa !24
%68 = tail call i32 @memcpy(i32 noundef %67, ptr noundef %3, i32 noundef 4) #2
%69 = load ptr, ptr %59, align 8, !tbaa !20
%70 = getelementptr inbounds %struct.TYPE_12__, ptr %69, i64 %61
store i32 %1, ptr %70, align 4, !tbaa !21
%71 = tail call i32 @nvkm_ltc_zbc_color_get(ptr noundef nonnull %7, i32 noundef %56, ptr noundef %3) #2
%72 = load ptr, ptr %0, align 8, !tbaa !27
%73 = load ptr, ptr %72, align 8, !tbaa !28
%74 = load ptr, ptr %73, align 8, !tbaa !30
%75 = tail call i32 %74(ptr noundef nonnull %0, i32 noundef %56) #2
br label %76
76: ; preds = %55, %34, %58, %41
%77 = phi i32 [ %44, %41 ], [ %56, %58 ], [ %35, %34 ], [ %56, %55 ]
ret i32 %77
}
declare i64 @memcmp(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @nvkm_ltc_zbc_color_get(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"gf100_gr", !7, i64 0, !7, i64 8, !10, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_11__", !11, i64 0}
!11 = !{!"TYPE_10__", !12, i64 0}
!12 = !{!"TYPE_9__", !7, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_8__", !7, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !8, i64 0}
!17 = !{!18, !16, i64 0}
!18 = !{!"nvkm_ltc", !16, i64 0, !16, i64 4}
!19 = !{!18, !16, i64 4}
!20 = !{!6, !7, i64 8}
!21 = !{!22, !16, i64 0}
!22 = !{!"TYPE_12__", !16, i64 0, !16, i64 4, !16, i64 8}
!23 = !{!22, !16, i64 8}
!24 = !{!22, !16, i64 4}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
!27 = !{!6, !7, i64 0}
!28 = !{!29, !7, i64 0}
!29 = !{!"TYPE_14__", !7, i64 0}
!30 = !{!31, !7, i64 0}
!31 = !{!"TYPE_13__", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/extr_gf100.c_gf100_gr_zbc_color_get.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/extr_gf100.c_gf100_gr_zbc_color_get.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_12__ = type { i32, i32, i32 }
@ENOSPC = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @gf100_gr_zbc_color_get], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @gf100_gr_zbc_color_get(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = getelementptr inbounds i8, ptr %0, i64 16
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = load ptr, ptr %6, align 8, !tbaa !14
%8 = load i32, ptr @ENOSPC, align 4, !tbaa !16
%9 = sub nsw i32 0, %8
%10 = load i32, ptr %7, align 4, !tbaa !18
%11 = getelementptr inbounds i8, ptr %7, i64 4
%12 = load i32, ptr %11, align 4, !tbaa !20
%13 = icmp sgt i32 %10, %12
br i1 %13, label %55, label %14
14: ; preds = %4
%15 = getelementptr inbounds i8, ptr %0, i64 8
%16 = sext i32 %10 to i64
br label %17
17: ; preds = %14, %49
%18 = phi i32 [ %12, %14 ], [ %50, %49 ]
%19 = phi i64 [ %16, %14 ], [ %52, %49 ]
%20 = phi i32 [ %9, %14 ], [ %51, %49 ]
%21 = load ptr, ptr %15, align 8, !tbaa !21
%22 = getelementptr inbounds %struct.TYPE_12__, ptr %21, i64 %19
%23 = load i32, ptr %22, align 4, !tbaa !22
%24 = icmp eq i32 %23, 0
br i1 %24, label %45, label %25
25: ; preds = %17
%26 = icmp eq i32 %23, %1
br i1 %26, label %27, label %49
27: ; preds = %25
%28 = getelementptr inbounds i8, ptr %22, i64 8
%29 = load i32, ptr %28, align 4, !tbaa !24
%30 = tail call i64 @memcmp(i32 noundef %29, ptr noundef %2, i32 noundef 4) #2
%31 = icmp eq i64 %30, 0
br i1 %31, label %34, label %32
32: ; preds = %27
%33 = load i32, ptr %11, align 4, !tbaa !20
br label %49
34: ; preds = %27
%35 = trunc nsw i64 %19 to i32
%36 = load ptr, ptr %15, align 8, !tbaa !21
%37 = getelementptr inbounds %struct.TYPE_12__, ptr %36, i64 %19, i32 1
%38 = load i32, ptr %37, align 4, !tbaa !25
%39 = tail call i64 @memcmp(i32 noundef %38, ptr noundef %3, i32 noundef 4) #2
%40 = icmp eq i64 %39, 0
br i1 %40, label %76, label %41
41: ; preds = %34
%42 = tail call i32 @WARN_ON(i32 noundef 1) #2
%43 = load i32, ptr @EINVAL, align 4, !tbaa !16
%44 = sub nsw i32 0, %43
br label %76
45: ; preds = %17
%46 = icmp slt i32 %20, 0
%47 = trunc nsw i64 %19 to i32
%48 = select i1 %46, i32 %47, i32 %20
br label %49
49: ; preds = %32, %25, %45
%50 = phi i32 [ %18, %25 ], [ %33, %32 ], [ %18, %45 ]
%51 = phi i32 [ %20, %25 ], [ %20, %32 ], [ %48, %45 ]
%52 = add nsw i64 %19, 1
%53 = sext i32 %50 to i64
%54 = icmp slt i64 %19, %53
br i1 %54, label %17, label %55, !llvm.loop !26
55: ; preds = %49, %4
%56 = phi i32 [ %9, %4 ], [ %51, %49 ]
%57 = icmp slt i32 %56, 0
br i1 %57, label %76, label %58
58: ; preds = %55
%59 = getelementptr inbounds i8, ptr %0, i64 8
%60 = load ptr, ptr %59, align 8, !tbaa !21
%61 = zext nneg i32 %56 to i64
%62 = getelementptr inbounds %struct.TYPE_12__, ptr %60, i64 %61, i32 2
%63 = load i32, ptr %62, align 4, !tbaa !24
%64 = tail call i32 @memcpy(i32 noundef %63, ptr noundef %2, i32 noundef 4) #2
%65 = load ptr, ptr %59, align 8, !tbaa !21
%66 = getelementptr inbounds %struct.TYPE_12__, ptr %65, i64 %61, i32 1
%67 = load i32, ptr %66, align 4, !tbaa !25
%68 = tail call i32 @memcpy(i32 noundef %67, ptr noundef %3, i32 noundef 4) #2
%69 = load ptr, ptr %59, align 8, !tbaa !21
%70 = getelementptr inbounds %struct.TYPE_12__, ptr %69, i64 %61
store i32 %1, ptr %70, align 4, !tbaa !22
%71 = tail call i32 @nvkm_ltc_zbc_color_get(ptr noundef nonnull %7, i32 noundef %56, ptr noundef %3) #2
%72 = load ptr, ptr %0, align 8, !tbaa !28
%73 = load ptr, ptr %72, align 8, !tbaa !29
%74 = load ptr, ptr %73, align 8, !tbaa !31
%75 = tail call i32 %74(ptr noundef nonnull %0, i32 noundef %56) #2
br label %76
76: ; preds = %55, %34, %58, %41
%77 = phi i32 [ %44, %41 ], [ %56, %58 ], [ %35, %34 ], [ %56, %55 ]
ret i32 %77
}
declare i64 @memcmp(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @nvkm_ltc_zbc_color_get(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"gf100_gr", !8, i64 0, !8, i64 8, !11, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_11__", !12, i64 0}
!12 = !{!"TYPE_10__", !13, i64 0}
!13 = !{!"TYPE_9__", !8, i64 0}
!14 = !{!15, !8, i64 0}
!15 = !{!"TYPE_8__", !8, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"int", !9, i64 0}
!18 = !{!19, !17, i64 0}
!19 = !{!"nvkm_ltc", !17, i64 0, !17, i64 4}
!20 = !{!19, !17, i64 4}
!21 = !{!7, !8, i64 8}
!22 = !{!23, !17, i64 0}
!23 = !{!"TYPE_12__", !17, i64 0, !17, i64 4, !17, i64 8}
!24 = !{!23, !17, i64 8}
!25 = !{!23, !17, i64 4}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}
!28 = !{!7, !8, i64 0}
!29 = !{!30, !8, i64 0}
!30 = !{!"TYPE_14__", !8, i64 0}
!31 = !{!32, !8, i64 0}
!32 = !{!"TYPE_13__", !8, i64 0}
| linux_drivers_gpu_drm_nouveau_nvkm_engine_gr_extr_gf100.c_gf100_gr_zbc_color_get |
; ModuleID = 'AnghaBench/reactos/sdk/lib/3rdparty/libmpg123/extr_readers.c_bc_poolsize.c'
source_filename = "AnghaBench/reactos/sdk/lib/3rdparty/libmpg123/extr_readers.c_bc_poolsize.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bufferchain = type { i64, i64 }
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable
define dso_local void @bc_poolsize(ptr nocapture noundef writeonly %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
store i64 %1, ptr %0, align 8, !tbaa !5
%4 = getelementptr inbounds %struct.bufferchain, ptr %0, i64 0, i32 1
store i64 %2, ptr %4, align 8, !tbaa !10
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"bufferchain", !7, i64 0, !7, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 8}
| ; ModuleID = 'AnghaBench/reactos/sdk/lib/3rdparty/libmpg123/extr_readers.c_bc_poolsize.c'
source_filename = "AnghaBench/reactos/sdk/lib/3rdparty/libmpg123/extr_readers.c_bc_poolsize.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync)
define void @bc_poolsize(ptr nocapture noundef writeonly %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
store i64 %1, ptr %0, align 8, !tbaa !6
%4 = getelementptr inbounds i8, ptr %0, i64 8
store i64 %2, ptr %4, align 8, !tbaa !11
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"bufferchain", !8, i64 0, !8, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 8}
| reactos_sdk_lib_3rdparty_libmpg123_extr_readers.c_bc_poolsize |
; ModuleID = 'AnghaBench/Craft/deps/glfw/src/extr_window.c_glfwGetWindowUserPointer.c'
source_filename = "AnghaBench/Craft/deps/glfw/src/extr_window.c_glfwGetWindowUserPointer.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local ptr @glfwGetWindowUserPointer(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = tail call i32 @_GLFW_REQUIRE_INIT_OR_RETURN(ptr noundef null) #2
%3 = load ptr, ptr %0, align 8, !tbaa !5
ret ptr %3
}
declare i32 @_GLFW_REQUIRE_INIT_OR_RETURN(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/Craft/deps/glfw/src/extr_window.c_glfwGetWindowUserPointer.c'
source_filename = "AnghaBench/Craft/deps/glfw/src/extr_window.c_glfwGetWindowUserPointer.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @glfwGetWindowUserPointer(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = tail call i32 @_GLFW_REQUIRE_INIT_OR_RETURN(ptr noundef null) #2
%3 = load ptr, ptr %0, align 8, !tbaa !6
ret ptr %3
}
declare i32 @_GLFW_REQUIRE_INIT_OR_RETURN(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| Craft_deps_glfw_src_extr_window.c_glfwGetWindowUserPointer |
; ModuleID = 'AnghaBench/nodemcu-firmware/app/mqtt/extr_mqtt_msg.c_init_message.c'
source_filename = "AnghaBench/nodemcu-firmware/app/mqtt/extr_mqtt_msg.c_init_message.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MQTT_MAX_FIXED_HEADER_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @init_message], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable
define internal i32 @init_message(ptr nocapture noundef writeonly %0) #0 {
%2 = load i32, ptr @MQTT_MAX_FIXED_HEADER_SIZE, align 4, !tbaa !5
store i32 %2, ptr %0, align 4, !tbaa !9
ret i32 %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_5__", !11, i64 0}
!11 = !{!"TYPE_4__", !6, i64 0}
| ; ModuleID = 'AnghaBench/nodemcu-firmware/app/mqtt/extr_mqtt_msg.c_init_message.c'
source_filename = "AnghaBench/nodemcu-firmware/app/mqtt/extr_mqtt_msg.c_init_message.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MQTT_MAX_FIXED_HEADER_SIZE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @init_message], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync)
define internal i32 @init_message(ptr nocapture noundef writeonly %0) #0 {
%2 = load i32, ptr @MQTT_MAX_FIXED_HEADER_SIZE, align 4, !tbaa !6
store i32 %2, ptr %0, align 4, !tbaa !10
ret i32 %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_5__", !12, i64 0}
!12 = !{!"TYPE_4__", !7, i64 0}
| nodemcu-firmware_app_mqtt_extr_mqtt_msg.c_init_message |
; ModuleID = 'AnghaBench/mpv/video/out/d3d11/extr_ra_d3d11.c_destroy.c'
source_filename = "AnghaBench/mpv/video/out/d3d11/extr_ra_d3d11.c_destroy.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ra_d3d11 = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 }
@.str = private unnamed_addr constant [14 x i8] c"after destroy\00", align 1
@D3D11_RLDO_DETAIL = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [17 x i8] c"after leak check\00", align 1
@D3D11_RLDO_SUMMARY = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [19 x i8] c"after leak summary\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @destroy], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @destroy(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = getelementptr inbounds %struct.ra_d3d11, ptr %2, i64 0, i32 16
%4 = load i64, ptr %3, align 8, !tbaa !10
%5 = tail call i32 @SAFE_RELEASE(i64 noundef %4) #2
%6 = getelementptr inbounds %struct.ra_d3d11, ptr %2, i64 0, i32 15
%7 = load i64, ptr %6, align 8, !tbaa !13
%8 = tail call i32 @SAFE_RELEASE(i64 noundef %7) #2
%9 = getelementptr inbounds %struct.ra_d3d11, ptr %2, i64 0, i32 14
%10 = load i64, ptr %9, align 8, !tbaa !14
%11 = tail call i32 @SAFE_RELEASE(i64 noundef %10) #2
%12 = getelementptr inbounds %struct.ra_d3d11, ptr %2, i64 0, i32 13
%13 = load i64, ptr %12, align 8, !tbaa !15
%14 = tail call i32 @SAFE_RELEASE(i64 noundef %13) #2
%15 = getelementptr inbounds %struct.ra_d3d11, ptr %2, i64 0, i32 12
%16 = load i64, ptr %15, align 8, !tbaa !16
%17 = tail call i32 @SAFE_RELEASE(i64 noundef %16) #2
%18 = getelementptr inbounds %struct.ra_d3d11, ptr %2, i64 0, i32 11
%19 = load i64, ptr %18, align 8, !tbaa !17
%20 = tail call i32 @SAFE_RELEASE(i64 noundef %19) #2
%21 = getelementptr inbounds %struct.ra_d3d11, ptr %2, i64 0, i32 10
%22 = load i64, ptr %21, align 8, !tbaa !18
%23 = tail call i32 @SAFE_RELEASE(i64 noundef %22) #2
%24 = getelementptr inbounds %struct.ra_d3d11, ptr %2, i64 0, i32 9
%25 = load i64, ptr %24, align 8, !tbaa !19
%26 = tail call i32 @SAFE_RELEASE(i64 noundef %25) #2
%27 = getelementptr inbounds %struct.ra_d3d11, ptr %2, i64 0, i32 8
%28 = load i64, ptr %27, align 8, !tbaa !20
%29 = tail call i32 @SAFE_RELEASE(i64 noundef %28) #2
%30 = getelementptr inbounds %struct.ra_d3d11, ptr %2, i64 0, i32 7
%31 = load i64, ptr %30, align 8, !tbaa !21
%32 = tail call i32 @SAFE_RELEASE(i64 noundef %31) #2
%33 = getelementptr inbounds %struct.ra_d3d11, ptr %2, i64 0, i32 6
%34 = load i64, ptr %33, align 8, !tbaa !22
%35 = tail call i32 @SAFE_RELEASE(i64 noundef %34) #2
%36 = getelementptr inbounds %struct.ra_d3d11, ptr %2, i64 0, i32 5
%37 = load i64, ptr %36, align 8, !tbaa !23
%38 = tail call i32 @SAFE_RELEASE(i64 noundef %37) #2
%39 = getelementptr inbounds %struct.ra_d3d11, ptr %2, i64 0, i32 4
%40 = load i64, ptr %39, align 8, !tbaa !24
%41 = tail call i32 @SAFE_RELEASE(i64 noundef %40) #2
%42 = getelementptr inbounds %struct.ra_d3d11, ptr %2, i64 0, i32 3
%43 = load i64, ptr %42, align 8, !tbaa !25
%44 = tail call i32 @SAFE_RELEASE(i64 noundef %43) #2
%45 = getelementptr inbounds %struct.ra_d3d11, ptr %2, i64 0, i32 1
%46 = load i64, ptr %45, align 8, !tbaa !26
%47 = icmp eq i64 %46, 0
br i1 %47, label %56, label %48
48: ; preds = %1
%49 = getelementptr inbounds %struct.ra_d3d11, ptr %2, i64 0, i32 2
%50 = load i64, ptr %49, align 8, !tbaa !27
%51 = icmp eq i64 %50, 0
br i1 %51, label %56, label %52
52: ; preds = %48
%53 = tail call i32 @ID3D11DeviceContext_ClearState(i64 noundef %50) #2
%54 = load i64, ptr %49, align 8, !tbaa !27
%55 = tail call i32 @ID3D11DeviceContext_Flush(i64 noundef %54) #2
br label %56
56: ; preds = %52, %48, %1
%57 = getelementptr inbounds %struct.ra_d3d11, ptr %2, i64 0, i32 2
%58 = load i64, ptr %57, align 8, !tbaa !27
%59 = tail call i32 @SAFE_RELEASE(i64 noundef %58) #2
%60 = load i64, ptr %45, align 8, !tbaa !26
%61 = icmp eq i64 %60, 0
br i1 %61, label %73, label %62
62: ; preds = %56
%63 = tail call i32 @debug_marker(ptr noundef nonnull %0, ptr noundef nonnull @.str) #2
%64 = load i64, ptr %45, align 8, !tbaa !26
%65 = load i32, ptr @D3D11_RLDO_DETAIL, align 4, !tbaa !28
%66 = tail call i32 @ID3D11Debug_ReportLiveDeviceObjects(i64 noundef %64, i32 noundef %65) #2
%67 = tail call i32 @debug_marker(ptr noundef nonnull %0, ptr noundef nonnull @.str.1) #2
%68 = load i64, ptr %45, align 8, !tbaa !26
%69 = load i32, ptr @D3D11_RLDO_SUMMARY, align 4, !tbaa !28
%70 = tail call i32 @ID3D11Debug_ReportLiveDeviceObjects(i64 noundef %68, i32 noundef %69) #2
%71 = tail call i32 @debug_marker(ptr noundef nonnull %0, ptr noundef nonnull @.str.2) #2
%72 = load i64, ptr %45, align 8, !tbaa !26
br label %73
73: ; preds = %62, %56
%74 = phi i64 [ %72, %62 ], [ 0, %56 ]
%75 = tail call i32 @SAFE_RELEASE(i64 noundef %74) #2
%76 = load i64, ptr %2, align 8, !tbaa !30
%77 = tail call i32 @SAFE_RELEASE(i64 noundef %76) #2
%78 = tail call i32 @talloc_free(ptr noundef nonnull %0) #2
ret void
}
declare i32 @SAFE_RELEASE(i64 noundef) local_unnamed_addr #1
declare i32 @ID3D11DeviceContext_ClearState(i64 noundef) local_unnamed_addr #1
declare i32 @ID3D11DeviceContext_Flush(i64 noundef) local_unnamed_addr #1
declare i32 @debug_marker(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ID3D11Debug_ReportLiveDeviceObjects(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @talloc_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ra", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 128}
!11 = !{!"ra_d3d11", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !12, i64 56, !12, i64 64, !12, i64 72, !12, i64 80, !12, i64 88, !12, i64 96, !12, i64 104, !12, i64 112, !12, i64 120, !12, i64 128}
!12 = !{!"long", !8, i64 0}
!13 = !{!11, !12, i64 120}
!14 = !{!11, !12, i64 112}
!15 = !{!11, !12, i64 104}
!16 = !{!11, !12, i64 96}
!17 = !{!11, !12, i64 88}
!18 = !{!11, !12, i64 80}
!19 = !{!11, !12, i64 72}
!20 = !{!11, !12, i64 64}
!21 = !{!11, !12, i64 56}
!22 = !{!11, !12, i64 48}
!23 = !{!11, !12, i64 40}
!24 = !{!11, !12, i64 32}
!25 = !{!11, !12, i64 24}
!26 = !{!11, !12, i64 8}
!27 = !{!11, !12, i64 16}
!28 = !{!29, !29, i64 0}
!29 = !{!"int", !8, i64 0}
!30 = !{!11, !12, i64 0}
| ; ModuleID = 'AnghaBench/mpv/video/out/d3d11/extr_ra_d3d11.c_destroy.c'
source_filename = "AnghaBench/mpv/video/out/d3d11/extr_ra_d3d11.c_destroy.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [14 x i8] c"after destroy\00", align 1
@D3D11_RLDO_DETAIL = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [17 x i8] c"after leak check\00", align 1
@D3D11_RLDO_SUMMARY = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [19 x i8] c"after leak summary\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @destroy], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @destroy(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = getelementptr inbounds i8, ptr %2, i64 128
%4 = load i64, ptr %3, align 8, !tbaa !11
%5 = tail call i32 @SAFE_RELEASE(i64 noundef %4) #2
%6 = getelementptr inbounds i8, ptr %2, i64 120
%7 = load i64, ptr %6, align 8, !tbaa !14
%8 = tail call i32 @SAFE_RELEASE(i64 noundef %7) #2
%9 = getelementptr inbounds i8, ptr %2, i64 112
%10 = load i64, ptr %9, align 8, !tbaa !15
%11 = tail call i32 @SAFE_RELEASE(i64 noundef %10) #2
%12 = getelementptr inbounds i8, ptr %2, i64 104
%13 = load i64, ptr %12, align 8, !tbaa !16
%14 = tail call i32 @SAFE_RELEASE(i64 noundef %13) #2
%15 = getelementptr inbounds i8, ptr %2, i64 96
%16 = load i64, ptr %15, align 8, !tbaa !17
%17 = tail call i32 @SAFE_RELEASE(i64 noundef %16) #2
%18 = getelementptr inbounds i8, ptr %2, i64 88
%19 = load i64, ptr %18, align 8, !tbaa !18
%20 = tail call i32 @SAFE_RELEASE(i64 noundef %19) #2
%21 = getelementptr inbounds i8, ptr %2, i64 80
%22 = load i64, ptr %21, align 8, !tbaa !19
%23 = tail call i32 @SAFE_RELEASE(i64 noundef %22) #2
%24 = getelementptr inbounds i8, ptr %2, i64 72
%25 = load i64, ptr %24, align 8, !tbaa !20
%26 = tail call i32 @SAFE_RELEASE(i64 noundef %25) #2
%27 = getelementptr inbounds i8, ptr %2, i64 64
%28 = load i64, ptr %27, align 8, !tbaa !21
%29 = tail call i32 @SAFE_RELEASE(i64 noundef %28) #2
%30 = getelementptr inbounds i8, ptr %2, i64 56
%31 = load i64, ptr %30, align 8, !tbaa !22
%32 = tail call i32 @SAFE_RELEASE(i64 noundef %31) #2
%33 = getelementptr inbounds i8, ptr %2, i64 48
%34 = load i64, ptr %33, align 8, !tbaa !23
%35 = tail call i32 @SAFE_RELEASE(i64 noundef %34) #2
%36 = getelementptr inbounds i8, ptr %2, i64 40
%37 = load i64, ptr %36, align 8, !tbaa !24
%38 = tail call i32 @SAFE_RELEASE(i64 noundef %37) #2
%39 = getelementptr inbounds i8, ptr %2, i64 32
%40 = load i64, ptr %39, align 8, !tbaa !25
%41 = tail call i32 @SAFE_RELEASE(i64 noundef %40) #2
%42 = getelementptr inbounds i8, ptr %2, i64 24
%43 = load i64, ptr %42, align 8, !tbaa !26
%44 = tail call i32 @SAFE_RELEASE(i64 noundef %43) #2
%45 = getelementptr inbounds i8, ptr %2, i64 8
%46 = load i64, ptr %45, align 8, !tbaa !27
%47 = icmp eq i64 %46, 0
br i1 %47, label %56, label %48
48: ; preds = %1
%49 = getelementptr inbounds i8, ptr %2, i64 16
%50 = load i64, ptr %49, align 8, !tbaa !28
%51 = icmp eq i64 %50, 0
br i1 %51, label %56, label %52
52: ; preds = %48
%53 = tail call i32 @ID3D11DeviceContext_ClearState(i64 noundef %50) #2
%54 = load i64, ptr %49, align 8, !tbaa !28
%55 = tail call i32 @ID3D11DeviceContext_Flush(i64 noundef %54) #2
br label %56
56: ; preds = %52, %48, %1
%57 = getelementptr inbounds i8, ptr %2, i64 16
%58 = load i64, ptr %57, align 8, !tbaa !28
%59 = tail call i32 @SAFE_RELEASE(i64 noundef %58) #2
%60 = load i64, ptr %45, align 8, !tbaa !27
%61 = icmp eq i64 %60, 0
br i1 %61, label %73, label %62
62: ; preds = %56
%63 = tail call i32 @debug_marker(ptr noundef nonnull %0, ptr noundef nonnull @.str) #2
%64 = load i64, ptr %45, align 8, !tbaa !27
%65 = load i32, ptr @D3D11_RLDO_DETAIL, align 4, !tbaa !29
%66 = tail call i32 @ID3D11Debug_ReportLiveDeviceObjects(i64 noundef %64, i32 noundef %65) #2
%67 = tail call i32 @debug_marker(ptr noundef nonnull %0, ptr noundef nonnull @.str.1) #2
%68 = load i64, ptr %45, align 8, !tbaa !27
%69 = load i32, ptr @D3D11_RLDO_SUMMARY, align 4, !tbaa !29
%70 = tail call i32 @ID3D11Debug_ReportLiveDeviceObjects(i64 noundef %68, i32 noundef %69) #2
%71 = tail call i32 @debug_marker(ptr noundef nonnull %0, ptr noundef nonnull @.str.2) #2
%72 = load i64, ptr %45, align 8, !tbaa !27
br label %73
73: ; preds = %62, %56
%74 = phi i64 [ %72, %62 ], [ 0, %56 ]
%75 = tail call i32 @SAFE_RELEASE(i64 noundef %74) #2
%76 = load i64, ptr %2, align 8, !tbaa !31
%77 = tail call i32 @SAFE_RELEASE(i64 noundef %76) #2
%78 = tail call i32 @talloc_free(ptr noundef nonnull %0) #2
ret void
}
declare i32 @SAFE_RELEASE(i64 noundef) local_unnamed_addr #1
declare i32 @ID3D11DeviceContext_ClearState(i64 noundef) local_unnamed_addr #1
declare i32 @ID3D11DeviceContext_Flush(i64 noundef) local_unnamed_addr #1
declare i32 @debug_marker(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ID3D11Debug_ReportLiveDeviceObjects(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @talloc_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ra", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 128}
!12 = !{!"ra_d3d11", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !13, i64 48, !13, i64 56, !13, i64 64, !13, i64 72, !13, i64 80, !13, i64 88, !13, i64 96, !13, i64 104, !13, i64 112, !13, i64 120, !13, i64 128}
!13 = !{!"long", !9, i64 0}
!14 = !{!12, !13, i64 120}
!15 = !{!12, !13, i64 112}
!16 = !{!12, !13, i64 104}
!17 = !{!12, !13, i64 96}
!18 = !{!12, !13, i64 88}
!19 = !{!12, !13, i64 80}
!20 = !{!12, !13, i64 72}
!21 = !{!12, !13, i64 64}
!22 = !{!12, !13, i64 56}
!23 = !{!12, !13, i64 48}
!24 = !{!12, !13, i64 40}
!25 = !{!12, !13, i64 32}
!26 = !{!12, !13, i64 24}
!27 = !{!12, !13, i64 8}
!28 = !{!12, !13, i64 16}
!29 = !{!30, !30, i64 0}
!30 = !{!"int", !9, i64 0}
!31 = !{!12, !13, i64 0}
| mpv_video_out_d3d11_extr_ra_d3d11.c_destroy |
; ModuleID = 'AnghaBench/linux/drivers/hwmon/extr_ftsteutates.c_temp_alarm_show.c'
source_filename = "AnghaBench/linux/drivers/hwmon/extr_ftsteutates.c_temp_alarm_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [4 x i8] c"%u\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @temp_alarm_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @temp_alarm_show(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call ptr @dev_get_drvdata(ptr noundef %0) #2
%5 = tail call ptr @to_sensor_dev_attr(ptr noundef %1) #2
%6 = load i32, ptr %5, align 4, !tbaa !5
%7 = tail call i32 @fts_update_device(ptr noundef %4) #2
%8 = icmp slt i32 %7, 0
br i1 %8, label %16, label %9
9: ; preds = %3
%10 = load i32, ptr %4, align 4, !tbaa !10
%11 = tail call i32 @BIT(i32 noundef %6) #2
%12 = and i32 %11, %10
%13 = icmp ne i32 %12, 0
%14 = zext i1 %13 to i32
%15 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, i32 noundef %14) #2
br label %16
16: ; preds = %3, %9
%17 = phi i32 [ %15, %9 ], [ %7, %3 ]
ret i32 %17
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare ptr @to_sensor_dev_attr(ptr noundef) local_unnamed_addr #1
declare i32 @fts_update_device(ptr noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BIT(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"fts_data", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/hwmon/extr_ftsteutates.c_temp_alarm_show.c'
source_filename = "AnghaBench/linux/drivers/hwmon/extr_ftsteutates.c_temp_alarm_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [4 x i8] c"%u\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @temp_alarm_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @temp_alarm_show(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call ptr @dev_get_drvdata(ptr noundef %0) #2
%5 = tail call ptr @to_sensor_dev_attr(ptr noundef %1) #2
%6 = load i32, ptr %5, align 4, !tbaa !6
%7 = tail call i32 @fts_update_device(ptr noundef %4) #2
%8 = icmp slt i32 %7, 0
br i1 %8, label %16, label %9
9: ; preds = %3
%10 = load i32, ptr %4, align 4, !tbaa !11
%11 = tail call i32 @BIT(i32 noundef %6) #2
%12 = and i32 %11, %10
%13 = icmp ne i32 %12, 0
%14 = zext i1 %13 to i32
%15 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, i32 noundef %14) #2
br label %16
16: ; preds = %3, %9
%17 = phi i32 [ %15, %9 ], [ %7, %3 ]
ret i32 %17
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare ptr @to_sensor_dev_attr(ptr noundef) local_unnamed_addr #1
declare i32 @fts_update_device(ptr noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BIT(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"fts_data", !8, i64 0}
| linux_drivers_hwmon_extr_ftsteutates.c_temp_alarm_show |
; ModuleID = 'AnghaBench/linux/drivers/media/tuners/extr_mxl5005s.c_MXL_BlockInit.c'
source_filename = "AnghaBench/linux/drivers/media/tuners/extr_mxl5005s.c_MXL_BlockInit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mxl5005s_state = type { i64, i32, i32, i32, i32, i32, i64, i32, i64, i64, i64, i64, i64 }
@DN_IQTN_AMP_CUT = dso_local local_unnamed_addr global i32 0, align 4
@BB_MODE = dso_local local_unnamed_addr global i32 0, align 4
@BB_BUF = dso_local local_unnamed_addr global i32 0, align 4
@BB_BUF_OA = dso_local local_unnamed_addr global i32 0, align 4
@BB_IQSWAP = dso_local local_unnamed_addr global i32 0, align 4
@BB_INITSTATE_DLPF_TUNE = dso_local local_unnamed_addr global i32 0, align 4
@BB_DLPF_BANDSEL = dso_local local_unnamed_addr global i32 0, align 4
@BB_ALPF_BANDSELECT = dso_local local_unnamed_addr global i32 0, align 4
@RFSYN_CHP_GAIN = dso_local local_unnamed_addr global i32 0, align 4
@RFSYN_EN_CHP_HIGAIN = dso_local local_unnamed_addr global i32 0, align 4
@EN_CHP_LIN_B = dso_local local_unnamed_addr global i32 0, align 4
@AGC_IF = dso_local local_unnamed_addr global i32 0, align 4
@AGC_RF = dso_local local_unnamed_addr global i32 0, align 4
@DRV_RES_SEL = dso_local local_unnamed_addr global i32 0, align 4
@I_DRIVER = dso_local local_unnamed_addr global i32 0, align 4
@EN_AAF = dso_local local_unnamed_addr global i32 0, align 4
@EN_3P = dso_local local_unnamed_addr global i32 0, align 4
@EN_AUX_3P = dso_local local_unnamed_addr global i32 0, align 4
@SEL_AAF_BAND = dso_local local_unnamed_addr global i32 0, align 4
@SEQ_ENCLK16_CLK_OUT = dso_local local_unnamed_addr global i32 0, align 4
@SEQ_SEL4_16B = dso_local local_unnamed_addr global i32 0, align 4
@XTAL_CAPSELECT = dso_local local_unnamed_addr global i32 0, align 4
@IF_SEL_DBL = dso_local local_unnamed_addr global i32 0, align 4
@RFSYN_R_DIV = dso_local local_unnamed_addr global i32 0, align 4
@SEQ_EXTIQFSMPULSE = dso_local local_unnamed_addr global i32 0, align 4
@TG_R_DIV = dso_local local_unnamed_addr global i32 0, align 4
@SEQ_EXTSYNTHCALIF = dso_local local_unnamed_addr global i32 0, align 4
@SEQ_EXTDCCAL = dso_local local_unnamed_addr global i32 0, align 4
@AGC_EN_RSSI = dso_local local_unnamed_addr global i32 0, align 4
@RFA_ENCLKRFAGC = dso_local local_unnamed_addr global i32 0, align 4
@RFA_RSSI_REF = dso_local local_unnamed_addr global i32 0, align 4
@RFA_RSSI_REFH = dso_local local_unnamed_addr global i32 0, align 4
@RFA_RSSI_REFL = dso_local local_unnamed_addr global i32 0, align 4
@RFA_FLR = dso_local local_unnamed_addr global i32 0, align 4
@RFA_CEIL = dso_local local_unnamed_addr global i32 0, align 4
@MXL_DVBT = dso_local local_unnamed_addr global i64 0, align 8
@MXL_ATSC = dso_local local_unnamed_addr global i64 0, align 8
@MXL_QAM = dso_local local_unnamed_addr global i64 0, align 8
@MXL_DIGITAL_MODE = dso_local local_unnamed_addr global i64 0, align 8
@MXL_ANALOG_CABLE = dso_local local_unnamed_addr global i64 0, align 8
@MXL_ANALOG_OTA = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @MXL_BlockInit], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @MXL_BlockInit(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = tail call i64 @MXL_OverwriteICDefault(ptr noundef nonnull %0) #2
%4 = load i32, ptr @DN_IQTN_AMP_CUT, align 4, !tbaa !10
%5 = load i64, ptr %2, align 8, !tbaa !12
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
%8 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %4, i32 noundef %7) #2
%9 = add i64 %8, %3
%10 = load i32, ptr @BB_MODE, align 4, !tbaa !10
%11 = load i64, ptr %2, align 8, !tbaa !12
%12 = icmp eq i64 %11, 0
%13 = zext i1 %12 to i32
%14 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %10, i32 noundef %13) #2
%15 = add i64 %9, %14
%16 = load i32, ptr @BB_BUF, align 4, !tbaa !10
%17 = load i64, ptr %2, align 8, !tbaa !12
%18 = icmp eq i64 %17, 0
%19 = select i1 %18, i32 2, i32 3
%20 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %16, i32 noundef %19) #2
%21 = add i64 %15, %20
%22 = load i32, ptr @BB_BUF_OA, align 4, !tbaa !10
%23 = load i64, ptr %2, align 8, !tbaa !12
%24 = icmp ne i64 %23, 0
%25 = zext i1 %24 to i32
%26 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %22, i32 noundef %25) #2
%27 = add i64 %21, %26
%28 = load i32, ptr @BB_IQSWAP, align 4, !tbaa !10
%29 = load i64, ptr %2, align 8, !tbaa !12
%30 = icmp eq i64 %29, 0
%31 = zext i1 %30 to i32
%32 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %28, i32 noundef %31) #2
%33 = add i64 %27, %32
%34 = load i32, ptr @BB_INITSTATE_DLPF_TUNE, align 4, !tbaa !10
%35 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %34, i32 noundef 0) #2
%36 = add i64 %33, %35
%37 = load i64, ptr %2, align 8, !tbaa !12
%38 = icmp eq i64 %37, 0
%39 = getelementptr inbounds %struct.mxl5005s_state, ptr %2, i64 0, i32 1
%40 = load i32, ptr %39, align 8, !tbaa !15
br i1 %38, label %54, label %41
41: ; preds = %1
switch i32 %40, label %79 [
i32 8000000, label %42
i32 7000000, label %46
i32 6000000, label %50
]
42: ; preds = %41
%43 = load i32, ptr @BB_DLPF_BANDSEL, align 4, !tbaa !10
%44 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %43, i32 noundef 0) #2
%45 = add i64 %44, %36
br label %79
46: ; preds = %41
%47 = load i32, ptr @BB_DLPF_BANDSEL, align 4, !tbaa !10
%48 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %47, i32 noundef 2) #2
%49 = add i64 %48, %36
br label %79
50: ; preds = %41
%51 = load i32, ptr @BB_DLPF_BANDSEL, align 4, !tbaa !10
%52 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %51, i32 noundef 3) #2
%53 = add i64 %52, %36
br label %79
54: ; preds = %1
switch i32 %40, label %79 [
i32 8000000, label %55
i32 7000000, label %63
i32 6000000, label %71
]
55: ; preds = %54
%56 = load i32, ptr @BB_ALPF_BANDSELECT, align 4, !tbaa !10
%57 = getelementptr inbounds %struct.mxl5005s_state, ptr %2, i64 0, i32 2
%58 = load i32, ptr %57, align 4, !tbaa !16
%59 = icmp eq i32 %58, 0
%60 = select i1 %59, i32 3, i32 0
%61 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %56, i32 noundef %60) #2
%62 = add i64 %61, %36
br label %79
63: ; preds = %54
%64 = load i32, ptr @BB_ALPF_BANDSELECT, align 4, !tbaa !10
%65 = getelementptr inbounds %struct.mxl5005s_state, ptr %2, i64 0, i32 2
%66 = load i32, ptr %65, align 4, !tbaa !16
%67 = icmp eq i32 %66, 0
%68 = select i1 %67, i32 4, i32 1
%69 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %64, i32 noundef %68) #2
%70 = add i64 %69, %36
br label %79
71: ; preds = %54
%72 = load i32, ptr @BB_ALPF_BANDSELECT, align 4, !tbaa !10
%73 = getelementptr inbounds %struct.mxl5005s_state, ptr %2, i64 0, i32 2
%74 = load i32, ptr %73, align 4, !tbaa !16
%75 = icmp eq i32 %74, 0
%76 = select i1 %75, i32 5, i32 2
%77 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %72, i32 noundef %76) #2
%78 = add i64 %77, %36
br label %79
79: ; preds = %55, %63, %71, %54, %42, %46, %50, %41
%80 = phi i64 [ %36, %41 ], [ %53, %50 ], [ %49, %46 ], [ %45, %42 ], [ %36, %54 ], [ %78, %71 ], [ %70, %63 ], [ %62, %55 ]
%81 = load i32, ptr @RFSYN_CHP_GAIN, align 4, !tbaa !10
%82 = load i64, ptr %2, align 8, !tbaa !12
%83 = icmp eq i64 %82, 0
%84 = select i1 %83, i32 8, i32 5
%85 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %81, i32 noundef %84) #2
%86 = add i64 %85, %80
%87 = load i32, ptr @RFSYN_EN_CHP_HIGAIN, align 4, !tbaa !10
%88 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %87, i32 noundef 1) #2
%89 = add i64 %86, %88
%90 = load i32, ptr @EN_CHP_LIN_B, align 4, !tbaa !10
%91 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %90, i32 noundef 0) #2
%92 = add i64 %89, %91
%93 = getelementptr inbounds %struct.mxl5005s_state, ptr %2, i64 0, i32 3
%94 = load i32, ptr %93, align 8, !tbaa !17
%95 = icmp eq i32 %94, 0
br i1 %95, label %96, label %103
96: ; preds = %79
%97 = load i32, ptr @AGC_IF, align 4, !tbaa !10
%98 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %97, i32 noundef 15) #2
%99 = add i64 %98, %92
%100 = load i32, ptr @AGC_RF, align 4, !tbaa !10
%101 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %100, i32 noundef 15) #2
%102 = add i64 %99, %101
br label %110
103: ; preds = %79
%104 = load i32, ptr @AGC_RF, align 4, !tbaa !10
%105 = load i64, ptr %2, align 8, !tbaa !12
%106 = icmp eq i64 %105, 0
%107 = select i1 %106, i32 12, i32 15
%108 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %104, i32 noundef %107) #2
%109 = add i64 %108, %92
br label %110
110: ; preds = %103, %96
%111 = phi i64 [ %102, %96 ], [ %109, %103 ]
%112 = getelementptr inbounds %struct.mxl5005s_state, ptr %2, i64 0, i32 4
%113 = load i32, ptr %112, align 4, !tbaa !18
%114 = icmp eq i32 %113, 55
br i1 %114, label %115, label %120
115: ; preds = %110
%116 = load i32, ptr @AGC_IF, align 4, !tbaa !10
%117 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %116, i32 noundef 0) #2
%118 = add i64 %117, %111
%119 = load i32, ptr %112, align 4, !tbaa !18
br label %120
120: ; preds = %115, %110
%121 = phi i32 [ %119, %115 ], [ %113, %110 ]
%122 = phi i64 [ %118, %115 ], [ %111, %110 ]
%123 = icmp eq i32 %121, 72
br i1 %123, label %124, label %129
124: ; preds = %120
%125 = load i32, ptr @AGC_IF, align 4, !tbaa !10
%126 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %125, i32 noundef 1) #2
%127 = add i64 %126, %122
%128 = load i32, ptr %112, align 4, !tbaa !18
br label %129
129: ; preds = %124, %120
%130 = phi i32 [ %128, %124 ], [ %121, %120 ]
%131 = phi i64 [ %127, %124 ], [ %122, %120 ]
%132 = icmp eq i32 %130, 92
br i1 %132, label %133, label %138
133: ; preds = %129
%134 = load i32, ptr @AGC_IF, align 4, !tbaa !10
%135 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %134, i32 noundef 2) #2
%136 = add i64 %135, %131
%137 = load i32, ptr %112, align 4, !tbaa !18
br label %138
138: ; preds = %133, %129
%139 = phi i32 [ %137, %133 ], [ %130, %129 ]
%140 = phi i64 [ %136, %133 ], [ %131, %129 ]
%141 = icmp eq i32 %139, 110
br i1 %141, label %142, label %147
142: ; preds = %138
%143 = load i32, ptr @AGC_IF, align 4, !tbaa !10
%144 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %143, i32 noundef 3) #2
%145 = add i64 %144, %140
%146 = load i32, ptr %112, align 4, !tbaa !18
br label %147
147: ; preds = %142, %138
%148 = phi i32 [ %146, %142 ], [ %139, %138 ]
%149 = phi i64 [ %145, %142 ], [ %140, %138 ]
%150 = icmp eq i32 %148, 129
br i1 %150, label %151, label %156
151: ; preds = %147
%152 = load i32, ptr @AGC_IF, align 4, !tbaa !10
%153 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %152, i32 noundef 4) #2
%154 = add i64 %153, %149
%155 = load i32, ptr %112, align 4, !tbaa !18
br label %156
156: ; preds = %151, %147
%157 = phi i32 [ %155, %151 ], [ %148, %147 ]
%158 = phi i64 [ %154, %151 ], [ %149, %147 ]
%159 = icmp eq i32 %157, 147
br i1 %159, label %160, label %165
160: ; preds = %156
%161 = load i32, ptr @AGC_IF, align 4, !tbaa !10
%162 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %161, i32 noundef 5) #2
%163 = add i64 %162, %158
%164 = load i32, ptr %112, align 4, !tbaa !18
br label %165
165: ; preds = %160, %156
%166 = phi i32 [ %164, %160 ], [ %157, %156 ]
%167 = phi i64 [ %163, %160 ], [ %158, %156 ]
%168 = icmp eq i32 %166, 168
br i1 %168, label %169, label %174
169: ; preds = %165
%170 = load i32, ptr @AGC_IF, align 4, !tbaa !10
%171 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %170, i32 noundef 6) #2
%172 = add i64 %171, %167
%173 = load i32, ptr %112, align 4, !tbaa !18
br label %174
174: ; preds = %169, %165
%175 = phi i32 [ %173, %169 ], [ %166, %165 ]
%176 = phi i64 [ %172, %169 ], [ %167, %165 ]
%177 = icmp eq i32 %175, 194
br i1 %177, label %178, label %183
178: ; preds = %174
%179 = load i32, ptr @AGC_IF, align 4, !tbaa !10
%180 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %179, i32 noundef 7) #2
%181 = add i64 %180, %176
%182 = load i32, ptr %112, align 4, !tbaa !18
br label %183
183: ; preds = %178, %174
%184 = phi i32 [ %182, %178 ], [ %175, %174 ]
%185 = phi i64 [ %181, %178 ], [ %176, %174 ]
%186 = icmp eq i32 %184, 212
br i1 %186, label %187, label %192
187: ; preds = %183
%188 = load i32, ptr @AGC_IF, align 4, !tbaa !10
%189 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %188, i32 noundef 9) #2
%190 = add i64 %189, %185
%191 = load i32, ptr %112, align 4, !tbaa !18
br label %192
192: ; preds = %187, %183
%193 = phi i32 [ %191, %187 ], [ %184, %183 ]
%194 = phi i64 [ %190, %187 ], [ %185, %183 ]
%195 = icmp eq i32 %193, 232
br i1 %195, label %196, label %201
196: ; preds = %192
%197 = load i32, ptr @AGC_IF, align 4, !tbaa !10
%198 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %197, i32 noundef 10) #2
%199 = add i64 %198, %194
%200 = load i32, ptr %112, align 4, !tbaa !18
br label %201
201: ; preds = %196, %192
%202 = phi i32 [ %200, %196 ], [ %193, %192 ]
%203 = phi i64 [ %199, %196 ], [ %194, %192 ]
%204 = icmp eq i32 %202, 252
br i1 %204, label %205, label %210
205: ; preds = %201
%206 = load i32, ptr @AGC_IF, align 4, !tbaa !10
%207 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %206, i32 noundef 11) #2
%208 = add i64 %207, %203
%209 = load i32, ptr %112, align 4, !tbaa !18
br label %210
210: ; preds = %205, %201
%211 = phi i32 [ %209, %205 ], [ %202, %201 ]
%212 = phi i64 [ %208, %205 ], [ %203, %201 ]
%213 = icmp eq i32 %211, 271
br i1 %213, label %214, label %219
214: ; preds = %210
%215 = load i32, ptr @AGC_IF, align 4, !tbaa !10
%216 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %215, i32 noundef 12) #2
%217 = add i64 %216, %212
%218 = load i32, ptr %112, align 4, !tbaa !18
br label %219
219: ; preds = %214, %210
%220 = phi i32 [ %218, %214 ], [ %211, %210 ]
%221 = phi i64 [ %217, %214 ], [ %212, %210 ]
%222 = icmp eq i32 %220, 292
br i1 %222, label %223, label %228
223: ; preds = %219
%224 = load i32, ptr @AGC_IF, align 4, !tbaa !10
%225 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %224, i32 noundef 13) #2
%226 = add i64 %225, %221
%227 = load i32, ptr %112, align 4, !tbaa !18
br label %228
228: ; preds = %223, %219
%229 = phi i32 [ %227, %223 ], [ %220, %219 ]
%230 = phi i64 [ %226, %223 ], [ %221, %219 ]
%231 = icmp eq i32 %229, 317
br i1 %231, label %232, label %237
232: ; preds = %228
%233 = load i32, ptr @AGC_IF, align 4, !tbaa !10
%234 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %233, i32 noundef 14) #2
%235 = add i64 %234, %230
%236 = load i32, ptr %112, align 4, !tbaa !18
br label %237
237: ; preds = %232, %228
%238 = phi i32 [ %236, %232 ], [ %229, %228 ]
%239 = phi i64 [ %235, %232 ], [ %230, %228 ]
%240 = icmp eq i32 %238, 349
br i1 %240, label %241, label %245
241: ; preds = %237
%242 = load i32, ptr @AGC_IF, align 4, !tbaa !10
%243 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %242, i32 noundef 15) #2
%244 = add i64 %243, %239
br label %245
245: ; preds = %241, %237
%246 = phi i64 [ %244, %241 ], [ %239, %237 ]
%247 = tail call i64 @MXL_IFSynthInit(ptr noundef nonnull %0) #2
%248 = add i64 %247, %246
%249 = getelementptr inbounds %struct.mxl5005s_state, ptr %2, i64 0, i32 5
%250 = load i32, ptr %249, align 8, !tbaa !19
%251 = icmp eq i32 %250, 200
br i1 %251, label %252, label %260
252: ; preds = %245
%253 = load i32, ptr @DRV_RES_SEL, align 4, !tbaa !10
%254 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %253, i32 noundef 6) #2
%255 = add i64 %254, %248
%256 = load i32, ptr @I_DRIVER, align 4, !tbaa !10
%257 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %256, i32 noundef 2) #2
%258 = add i64 %255, %257
%259 = load i32, ptr %249, align 8, !tbaa !19
br label %260
260: ; preds = %252, %245
%261 = phi i32 [ %259, %252 ], [ %250, %245 ]
%262 = phi i64 [ %258, %252 ], [ %248, %245 ]
%263 = icmp eq i32 %261, 300
br i1 %263, label %264, label %271
264: ; preds = %260
%265 = load i32, ptr @DRV_RES_SEL, align 4, !tbaa !10
%266 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %265, i32 noundef 4) #2
%267 = add i64 %266, %262
%268 = load i32, ptr @I_DRIVER, align 4, !tbaa !10
%269 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %268, i32 noundef 1) #2
%270 = add i64 %267, %269
br label %271
271: ; preds = %264, %260
%272 = phi i64 [ %270, %264 ], [ %262, %260 ]
%273 = trunc i64 %272 to i32
%274 = load i64, ptr %2, align 8, !tbaa !12
%275 = icmp eq i64 %274, 0
%276 = getelementptr inbounds %struct.mxl5005s_state, ptr %2, i64 0, i32 6
%277 = load i64, ptr %276, align 8, !tbaa !20
%278 = add i64 %277, -4000000
br i1 %275, label %321, label %279
279: ; preds = %271
%280 = icmp ult i64 %278, 2280001
br i1 %280, label %281, label %296
281: ; preds = %279
%282 = load i32, ptr @EN_AAF, align 4, !tbaa !10
%283 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %282, i32 noundef 1) #2
%284 = add i64 %283, %272
%285 = load i32, ptr @EN_3P, align 4, !tbaa !10
%286 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %285, i32 noundef 1) #2
%287 = add i64 %284, %286
%288 = load i32, ptr @EN_AUX_3P, align 4, !tbaa !10
%289 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %288, i32 noundef 1) #2
%290 = add i64 %287, %289
%291 = load i32, ptr @SEL_AAF_BAND, align 4, !tbaa !10
%292 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %291, i32 noundef 0) #2
%293 = add i64 %290, %292
%294 = trunc i64 %293 to i32
%295 = load i64, ptr %276, align 8, !tbaa !20
br label %296
296: ; preds = %281, %279
%297 = phi i64 [ %295, %281 ], [ %277, %279 ]
%298 = phi i32 [ %294, %281 ], [ %273, %279 ]
switch i64 %297, label %317 [
i64 36125000, label %299
i64 36150000, label %299
]
299: ; preds = %296, %296
%300 = load i32, ptr @EN_AAF, align 4, !tbaa !10
%301 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %300, i32 noundef 1) #2
%302 = trunc i64 %301 to i32
%303 = add i32 %298, %302
%304 = load i32, ptr @EN_3P, align 4, !tbaa !10
%305 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %304, i32 noundef 1) #2
%306 = trunc i64 %305 to i32
%307 = add i32 %303, %306
%308 = load i32, ptr @EN_AUX_3P, align 4, !tbaa !10
%309 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %308, i32 noundef 1) #2
%310 = trunc i64 %309 to i32
%311 = add i32 %307, %310
%312 = load i32, ptr @SEL_AAF_BAND, align 4, !tbaa !10
%313 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %312, i32 noundef 1) #2
%314 = trunc i64 %313 to i32
%315 = add i32 %311, %314
%316 = load i64, ptr %276, align 8, !tbaa !20
br label %317
317: ; preds = %296, %299
%318 = phi i64 [ %316, %299 ], [ %297, %296 ]
%319 = phi i32 [ %315, %299 ], [ %298, %296 ]
%320 = icmp ugt i64 %318, 36150000
br i1 %320, label %342, label %361
321: ; preds = %271
%322 = icmp ult i64 %278, 1000001
br i1 %322, label %323, label %338
323: ; preds = %321
%324 = load i32, ptr @EN_AAF, align 4, !tbaa !10
%325 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %324, i32 noundef 1) #2
%326 = add i64 %325, %272
%327 = load i32, ptr @EN_3P, align 4, !tbaa !10
%328 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %327, i32 noundef 1) #2
%329 = add i64 %326, %328
%330 = load i32, ptr @EN_AUX_3P, align 4, !tbaa !10
%331 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %330, i32 noundef 1) #2
%332 = add i64 %329, %331
%333 = load i32, ptr @SEL_AAF_BAND, align 4, !tbaa !10
%334 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %333, i32 noundef 0) #2
%335 = add i64 %332, %334
%336 = trunc i64 %335 to i32
%337 = load i64, ptr %276, align 8, !tbaa !20
br label %338
338: ; preds = %323, %321
%339 = phi i64 [ %337, %323 ], [ %277, %321 ]
%340 = phi i32 [ %336, %323 ], [ %273, %321 ]
%341 = icmp ugt i64 %339, 5000000
br i1 %341, label %342, label %361
342: ; preds = %338, %317
%343 = phi i32 [ %319, %317 ], [ %340, %338 ]
%344 = phi i32 [ 1, %317 ], [ 0, %338 ]
%345 = load i32, ptr @EN_AAF, align 4, !tbaa !10
%346 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %345, i32 noundef 0) #2
%347 = trunc i64 %346 to i32
%348 = add i32 %343, %347
%349 = load i32, ptr @EN_3P, align 4, !tbaa !10
%350 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %349, i32 noundef %344) #2
%351 = trunc i64 %350 to i32
%352 = add i32 %348, %351
%353 = load i32, ptr @EN_AUX_3P, align 4, !tbaa !10
%354 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %353, i32 noundef %344) #2
%355 = trunc i64 %354 to i32
%356 = add i32 %352, %355
%357 = load i32, ptr @SEL_AAF_BAND, align 4, !tbaa !10
%358 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %357, i32 noundef %344) #2
%359 = trunc i64 %358 to i32
%360 = add i32 %356, %359
br label %361
361: ; preds = %342, %338, %317
%362 = phi i32 [ %319, %317 ], [ %340, %338 ], [ %360, %342 ]
%363 = getelementptr inbounds %struct.mxl5005s_state, ptr %2, i64 0, i32 12
%364 = load i64, ptr %363, align 8, !tbaa !21
%365 = icmp ne i64 %364, 0
%366 = zext i1 %365 to i32
%367 = load i32, ptr @SEQ_ENCLK16_CLK_OUT, align 4, !tbaa !10
%368 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %367, i32 noundef %366) #2
%369 = trunc i64 %368 to i32
%370 = add i32 %362, %369
%371 = getelementptr inbounds %struct.mxl5005s_state, ptr %2, i64 0, i32 7
%372 = load i32, ptr %371, align 8, !tbaa !22
%373 = icmp eq i32 %372, 1
br i1 %373, label %374, label %380
374: ; preds = %361
%375 = load i32, ptr @SEQ_SEL4_16B, align 4, !tbaa !10
%376 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %375, i32 noundef 1) #2
%377 = trunc i64 %376 to i32
%378 = add i32 %370, %377
%379 = load i32, ptr %371, align 8, !tbaa !22
br label %380
380: ; preds = %374, %361
%381 = phi i32 [ %379, %374 ], [ %372, %361 ]
%382 = phi i32 [ %378, %374 ], [ %370, %361 ]
%383 = icmp eq i32 %381, 0
br i1 %383, label %384, label %389
384: ; preds = %380
%385 = load i32, ptr @SEQ_SEL4_16B, align 4, !tbaa !10
%386 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %385, i32 noundef 0) #2
%387 = trunc i64 %386 to i32
%388 = add i32 %382, %387
br label %389
389: ; preds = %384, %380
%390 = phi i32 [ %388, %384 ], [ %382, %380 ]
%391 = getelementptr inbounds %struct.mxl5005s_state, ptr %2, i64 0, i32 11
%392 = load i64, ptr %391, align 8, !tbaa !23
%393 = icmp ne i64 %392, 0
%394 = load i32, ptr @XTAL_CAPSELECT, align 4, !tbaa !10
%395 = zext i1 %393 to i32
%396 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %394, i32 noundef %395) #2
%397 = trunc i64 %396 to i32
%398 = add i32 %390, %397
%399 = getelementptr inbounds %struct.mxl5005s_state, ptr %2, i64 0, i32 8
%400 = load i64, ptr %399, align 8, !tbaa !24
%401 = add i64 %400, -12000000
%402 = icmp ult i64 %401, 4000001
br i1 %402, label %403, label %409
403: ; preds = %389
%404 = load i32, ptr @IF_SEL_DBL, align 4, !tbaa !10
%405 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %404, i32 noundef 1) #2
%406 = trunc i64 %405 to i32
%407 = add i32 %398, %406
%408 = load i64, ptr %399, align 8, !tbaa !24
br label %409
409: ; preds = %403, %389
%410 = phi i64 [ %408, %403 ], [ %400, %389 ]
%411 = phi i32 [ %407, %403 ], [ %398, %389 ]
%412 = add i64 %410, -16000001
%413 = icmp ult i64 %412, 16000000
br i1 %413, label %414, label %420
414: ; preds = %409
%415 = load i32, ptr @IF_SEL_DBL, align 4, !tbaa !10
%416 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %415, i32 noundef 0) #2
%417 = trunc i64 %416 to i32
%418 = add i32 %411, %417
%419 = load i64, ptr %399, align 8, !tbaa !24
br label %420
420: ; preds = %414, %409
%421 = phi i64 [ %419, %414 ], [ %410, %409 ]
%422 = phi i32 [ %418, %414 ], [ %411, %409 ]
%423 = add i64 %421, -12000000
%424 = icmp ult i64 %423, 10000001
br i1 %424, label %425, label %431
425: ; preds = %420
%426 = load i32, ptr @RFSYN_R_DIV, align 4, !tbaa !10
%427 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %426, i32 noundef 3) #2
%428 = trunc i64 %427 to i32
%429 = add i32 %422, %428
%430 = load i64, ptr %399, align 8, !tbaa !24
br label %431
431: ; preds = %425, %420
%432 = phi i64 [ %430, %425 ], [ %421, %420 ]
%433 = phi i32 [ %429, %425 ], [ %422, %420 ]
%434 = add i64 %432, -22000001
%435 = icmp ult i64 %434, 10000000
br i1 %435, label %436, label %441
436: ; preds = %431
%437 = load i32, ptr @RFSYN_R_DIV, align 4, !tbaa !10
%438 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %437, i32 noundef 0) #2
%439 = trunc i64 %438 to i32
%440 = add i32 %433, %439
br label %441
441: ; preds = %436, %431
%442 = phi i32 [ %440, %436 ], [ %433, %431 ]
%443 = load i64, ptr %2, align 8, !tbaa !12
%444 = icmp eq i64 %443, 0
br i1 %444, label %445, label %449
445: ; preds = %441
%446 = getelementptr inbounds %struct.mxl5005s_state, ptr %2, i64 0, i32 2
%447 = load i32, ptr %446, align 4, !tbaa !16
%448 = icmp eq i32 %447, 1
br i1 %448, label %450, label %449
449: ; preds = %445, %441
br label %450
450: ; preds = %445, %449
%451 = phi i32 [ 1, %449 ], [ 0, %445 ]
%452 = load i32, ptr @SEQ_EXTIQFSMPULSE, align 4, !tbaa !10
%453 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %452, i32 noundef %451) #2
%454 = trunc i64 %453 to i32
%455 = add i32 %442, %454
%456 = load i32, ptr @TG_R_DIV, align 4, !tbaa !10
%457 = load i64, ptr %399, align 8, !tbaa !24
%458 = tail call i32 @MXL_Ceiling(i64 noundef %457, i32 noundef 1000000) #2
%459 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %456, i32 noundef %458) #2
%460 = trunc i64 %459 to i32
%461 = add i32 %455, %460
%462 = getelementptr inbounds %struct.mxl5005s_state, ptr %2, i64 0, i32 9
%463 = load i64, ptr %462, align 8, !tbaa !25
%464 = icmp eq i64 %463, 0
br i1 %464, label %502, label %465
465: ; preds = %450
%466 = load i32, ptr @SEQ_EXTSYNTHCALIF, align 4, !tbaa !10
%467 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %466, i32 noundef 1) #2
%468 = trunc i64 %467 to i32
%469 = add i32 %461, %468
%470 = load i32, ptr @SEQ_EXTDCCAL, align 4, !tbaa !10
%471 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %470, i32 noundef 1) #2
%472 = trunc i64 %471 to i32
%473 = add i32 %469, %472
%474 = load i32, ptr @AGC_EN_RSSI, align 4, !tbaa !10
%475 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %474, i32 noundef 1) #2
%476 = trunc i64 %475 to i32
%477 = add i32 %473, %476
%478 = load i32, ptr @RFA_ENCLKRFAGC, align 4, !tbaa !10
%479 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %478, i32 noundef 1) #2
%480 = trunc i64 %479 to i32
%481 = add i32 %477, %480
%482 = load i32, ptr @RFA_RSSI_REF, align 4, !tbaa !10
%483 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %482, i32 noundef 2) #2
%484 = trunc i64 %483 to i32
%485 = add i32 %481, %484
%486 = load i32, ptr @RFA_RSSI_REFH, align 4, !tbaa !10
%487 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %486, i32 noundef 3) #2
%488 = trunc i64 %487 to i32
%489 = add i32 %485, %488
%490 = load i32, ptr @RFA_RSSI_REFL, align 4, !tbaa !10
%491 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %490, i32 noundef 1) #2
%492 = trunc i64 %491 to i32
%493 = add i32 %489, %492
%494 = load i32, ptr @RFA_FLR, align 4, !tbaa !10
%495 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %494, i32 noundef 0) #2
%496 = trunc i64 %495 to i32
%497 = add i32 %493, %496
%498 = load i32, ptr @RFA_CEIL, align 4, !tbaa !10
%499 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %498, i32 noundef 12) #2
%500 = trunc i64 %499 to i32
%501 = add i32 %497, %500
br label %502
502: ; preds = %465, %450
%503 = phi i32 [ %501, %465 ], [ %461, %450 ]
%504 = getelementptr inbounds %struct.mxl5005s_state, ptr %2, i64 0, i32 10
%505 = load i64, ptr %504, align 8, !tbaa !26
%506 = load i64, ptr @MXL_DVBT, align 8, !tbaa !27
%507 = icmp eq i64 %505, %506
br i1 %507, label %508, label %553
508: ; preds = %502
store i32 1, ptr %93, align 8, !tbaa !17
%509 = load i32, ptr @SEQ_EXTSYNTHCALIF, align 4, !tbaa !10
%510 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %509, i32 noundef 1) #2
%511 = trunc i64 %510 to i32
%512 = add i32 %503, %511
%513 = load i32, ptr @SEQ_EXTDCCAL, align 4, !tbaa !10
%514 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %513, i32 noundef 1) #2
%515 = trunc i64 %514 to i32
%516 = add i32 %512, %515
%517 = load i32, ptr @AGC_EN_RSSI, align 4, !tbaa !10
%518 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %517, i32 noundef 1) #2
%519 = trunc i64 %518 to i32
%520 = add i32 %516, %519
%521 = load i32, ptr @RFA_ENCLKRFAGC, align 4, !tbaa !10
%522 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %521, i32 noundef 1) #2
%523 = trunc i64 %522 to i32
%524 = add i32 %520, %523
%525 = load i32, ptr @RFA_RSSI_REF, align 4, !tbaa !10
%526 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %525, i32 noundef 3) #2
%527 = trunc i64 %526 to i32
%528 = add i32 %524, %527
%529 = load i32, ptr @RFA_RSSI_REFH, align 4, !tbaa !10
%530 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %529, i32 noundef 5) #2
%531 = trunc i64 %530 to i32
%532 = add i32 %528, %531
%533 = load i32, ptr @RFA_RSSI_REFL, align 4, !tbaa !10
%534 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %533, i32 noundef 1) #2
%535 = trunc i64 %534 to i32
%536 = add i32 %532, %535
%537 = load i32, ptr @RFA_FLR, align 4, !tbaa !10
%538 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %537, i32 noundef 2) #2
%539 = trunc i64 %538 to i32
%540 = add i32 %536, %539
%541 = load i32, ptr @RFA_CEIL, align 4, !tbaa !10
%542 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %541, i32 noundef 13) #2
%543 = trunc i64 %542 to i32
%544 = add i32 %540, %543
%545 = getelementptr inbounds %struct.mxl5005s_state, ptr %2, i64 0, i32 6
%546 = load i64, ptr %545, align 8, !tbaa !20
%547 = icmp ugt i64 %546, 6280000
%548 = load i32, ptr @BB_IQSWAP, align 4, !tbaa !10
%549 = zext i1 %547 to i32
%550 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %548, i32 noundef %549) #2
%551 = trunc i64 %550 to i32
%552 = add i32 %544, %551
br label %553
553: ; preds = %508, %502
%554 = phi i32 [ %503, %502 ], [ %552, %508 ]
%555 = load i64, ptr %504, align 8, !tbaa !26
%556 = load i64, ptr @MXL_ATSC, align 8, !tbaa !27
%557 = icmp eq i64 %555, %556
br i1 %557, label %558, label %611
558: ; preds = %553
store i32 1, ptr %93, align 8, !tbaa !17
%559 = load i32, ptr @SEQ_EXTSYNTHCALIF, align 4, !tbaa !10
%560 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %559, i32 noundef 1) #2
%561 = trunc i64 %560 to i32
%562 = add i32 %554, %561
%563 = load i32, ptr @SEQ_EXTDCCAL, align 4, !tbaa !10
%564 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %563, i32 noundef 1) #2
%565 = trunc i64 %564 to i32
%566 = add i32 %562, %565
%567 = load i32, ptr @AGC_EN_RSSI, align 4, !tbaa !10
%568 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %567, i32 noundef 1) #2
%569 = trunc i64 %568 to i32
%570 = add i32 %566, %569
%571 = load i32, ptr @RFA_ENCLKRFAGC, align 4, !tbaa !10
%572 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %571, i32 noundef 1) #2
%573 = trunc i64 %572 to i32
%574 = add i32 %570, %573
%575 = load i32, ptr @RFA_RSSI_REF, align 4, !tbaa !10
%576 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %575, i32 noundef 2) #2
%577 = trunc i64 %576 to i32
%578 = add i32 %574, %577
%579 = load i32, ptr @RFA_RSSI_REFH, align 4, !tbaa !10
%580 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %579, i32 noundef 4) #2
%581 = trunc i64 %580 to i32
%582 = add i32 %578, %581
%583 = load i32, ptr @RFA_RSSI_REFL, align 4, !tbaa !10
%584 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %583, i32 noundef 1) #2
%585 = trunc i64 %584 to i32
%586 = add i32 %582, %585
%587 = load i32, ptr @RFA_FLR, align 4, !tbaa !10
%588 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %587, i32 noundef 2) #2
%589 = trunc i64 %588 to i32
%590 = add i32 %586, %589
%591 = load i32, ptr @RFA_CEIL, align 4, !tbaa !10
%592 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %591, i32 noundef 13) #2
%593 = trunc i64 %592 to i32
%594 = add i32 %590, %593
%595 = load i32, ptr @BB_INITSTATE_DLPF_TUNE, align 4, !tbaa !10
%596 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %595, i32 noundef 1) #2
%597 = trunc i64 %596 to i32
%598 = add i32 %594, %597
%599 = load i32, ptr @RFSYN_CHP_GAIN, align 4, !tbaa !10
%600 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %599, i32 noundef 5) #2
%601 = trunc i64 %600 to i32
%602 = add i32 %598, %601
%603 = getelementptr inbounds %struct.mxl5005s_state, ptr %2, i64 0, i32 6
%604 = load i64, ptr %603, align 8, !tbaa !20
%605 = icmp ugt i64 %604, 6280000
%606 = load i32, ptr @BB_IQSWAP, align 4, !tbaa !10
%607 = zext i1 %605 to i32
%608 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %606, i32 noundef %607) #2
%609 = trunc i64 %608 to i32
%610 = add i32 %602, %609
br label %611
611: ; preds = %558, %553
%612 = phi i32 [ %554, %553 ], [ %610, %558 ]
%613 = load i64, ptr %504, align 8, !tbaa !26
%614 = load i64, ptr @MXL_QAM, align 8, !tbaa !27
%615 = icmp eq i64 %613, %614
br i1 %615, label %616, label %663
616: ; preds = %611
%617 = load i64, ptr @MXL_DIGITAL_MODE, align 8, !tbaa !27
store i64 %617, ptr %2, align 8, !tbaa !12
%618 = load i32, ptr @SEQ_EXTSYNTHCALIF, align 4, !tbaa !10
%619 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %618, i32 noundef 1) #2
%620 = trunc i64 %619 to i32
%621 = add i32 %612, %620
%622 = load i32, ptr @SEQ_EXTDCCAL, align 4, !tbaa !10
%623 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %622, i32 noundef 1) #2
%624 = trunc i64 %623 to i32
%625 = add i32 %621, %624
%626 = load i32, ptr @AGC_EN_RSSI, align 4, !tbaa !10
%627 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %626, i32 noundef 0) #2
%628 = trunc i64 %627 to i32
%629 = add i32 %625, %628
%630 = load i32, ptr @RFA_ENCLKRFAGC, align 4, !tbaa !10
%631 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %630, i32 noundef 1) #2
%632 = trunc i64 %631 to i32
%633 = add i32 %629, %632
%634 = load i32, ptr @RFA_RSSI_REFH, align 4, !tbaa !10
%635 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %634, i32 noundef 5) #2
%636 = trunc i64 %635 to i32
%637 = add i32 %633, %636
%638 = load i32, ptr @RFA_RSSI_REF, align 4, !tbaa !10
%639 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %638, i32 noundef 3) #2
%640 = trunc i64 %639 to i32
%641 = add i32 %637, %640
%642 = load i32, ptr @RFA_RSSI_REFL, align 4, !tbaa !10
%643 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %642, i32 noundef 2) #2
%644 = trunc i64 %643 to i32
%645 = add i32 %641, %644
%646 = load i32, ptr @RFSYN_CHP_GAIN, align 4, !tbaa !10
%647 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %646, i32 noundef 3) #2
%648 = trunc i64 %647 to i32
%649 = add i32 %645, %648
%650 = getelementptr inbounds %struct.mxl5005s_state, ptr %2, i64 0, i32 6
%651 = load i64, ptr %650, align 8, !tbaa !20
%652 = icmp ugt i64 %651, 6280000
%653 = load i32, ptr @BB_IQSWAP, align 4, !tbaa !10
%654 = zext i1 %652 to i32
%655 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %653, i32 noundef %654) #2
%656 = trunc i64 %655 to i32
%657 = add i32 %649, %656
%658 = load i32, ptr @RFSYN_CHP_GAIN, align 4, !tbaa !10
%659 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %658, i32 noundef 2) #2
%660 = trunc i64 %659 to i32
%661 = add i32 %657, %660
%662 = load i64, ptr %504, align 8, !tbaa !26
br label %663
663: ; preds = %616, %611
%664 = phi i64 [ %662, %616 ], [ %613, %611 ]
%665 = phi i32 [ %661, %616 ], [ %612, %611 ]
%666 = load i64, ptr @MXL_ANALOG_CABLE, align 8, !tbaa !27
%667 = icmp eq i64 %664, %666
br i1 %667, label %668, label %698
668: ; preds = %663
store i32 1, ptr %93, align 8, !tbaa !17
%669 = load i32, ptr @SEQ_EXTSYNTHCALIF, align 4, !tbaa !10
%670 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %669, i32 noundef 1) #2
%671 = trunc i64 %670 to i32
%672 = add i32 %665, %671
%673 = load i32, ptr @SEQ_EXTDCCAL, align 4, !tbaa !10
%674 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %673, i32 noundef 1) #2
%675 = trunc i64 %674 to i32
%676 = add i32 %672, %675
%677 = load i32, ptr @AGC_EN_RSSI, align 4, !tbaa !10
%678 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %677, i32 noundef 0) #2
%679 = trunc i64 %678 to i32
%680 = add i32 %676, %679
%681 = load i32, ptr @RFA_ENCLKRFAGC, align 4, !tbaa !10
%682 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %681, i32 noundef 1) #2
%683 = trunc i64 %682 to i32
%684 = add i32 %680, %683
%685 = load i32, ptr @AGC_IF, align 4, !tbaa !10
%686 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %685, i32 noundef 1) #2
%687 = trunc i64 %686 to i32
%688 = add i32 %684, %687
%689 = load i32, ptr @AGC_RF, align 4, !tbaa !10
%690 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %689, i32 noundef 15) #2
%691 = trunc i64 %690 to i32
%692 = add i32 %688, %691
%693 = load i32, ptr @BB_IQSWAP, align 4, !tbaa !10
%694 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %693, i32 noundef 1) #2
%695 = trunc i64 %694 to i32
%696 = add i32 %692, %695
%697 = load i64, ptr %504, align 8, !tbaa !26
br label %698
698: ; preds = %668, %663
%699 = phi i64 [ %697, %668 ], [ %664, %663 ]
%700 = phi i32 [ %696, %668 ], [ %665, %663 ]
%701 = load i64, ptr @MXL_ANALOG_OTA, align 8, !tbaa !27
%702 = icmp eq i64 %699, %701
br i1 %702, label %703, label %740
703: ; preds = %698
%704 = load i32, ptr @SEQ_EXTSYNTHCALIF, align 4, !tbaa !10
%705 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %704, i32 noundef 1) #2
%706 = trunc i64 %705 to i32
%707 = add i32 %700, %706
%708 = load i32, ptr @SEQ_EXTDCCAL, align 4, !tbaa !10
%709 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %708, i32 noundef 1) #2
%710 = trunc i64 %709 to i32
%711 = add i32 %707, %710
%712 = load i32, ptr @AGC_EN_RSSI, align 4, !tbaa !10
%713 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %712, i32 noundef 1) #2
%714 = trunc i64 %713 to i32
%715 = add i32 %711, %714
%716 = load i32, ptr @RFA_ENCLKRFAGC, align 4, !tbaa !10
%717 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %716, i32 noundef 1) #2
%718 = trunc i64 %717 to i32
%719 = add i32 %715, %718
%720 = load i32, ptr @RFA_RSSI_REFH, align 4, !tbaa !10
%721 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %720, i32 noundef 5) #2
%722 = trunc i64 %721 to i32
%723 = add i32 %719, %722
%724 = load i32, ptr @RFA_RSSI_REF, align 4, !tbaa !10
%725 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %724, i32 noundef 3) #2
%726 = trunc i64 %725 to i32
%727 = add i32 %723, %726
%728 = load i32, ptr @RFA_RSSI_REFL, align 4, !tbaa !10
%729 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %728, i32 noundef 2) #2
%730 = trunc i64 %729 to i32
%731 = add i32 %727, %730
%732 = load i32, ptr @RFSYN_CHP_GAIN, align 4, !tbaa !10
%733 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %732, i32 noundef 3) #2
%734 = trunc i64 %733 to i32
%735 = add i32 %731, %734
%736 = load i32, ptr @BB_IQSWAP, align 4, !tbaa !10
%737 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %736, i32 noundef 1) #2
%738 = trunc i64 %737 to i32
%739 = add i32 %735, %738
br label %740
740: ; preds = %703, %698
%741 = phi i32 [ %739, %703 ], [ %700, %698 ]
%742 = load i64, ptr %462, align 8, !tbaa !25
%743 = icmp eq i64 %742, 0
br i1 %743, label %744, label %761
744: ; preds = %740
%745 = load i32, ptr @SEQ_EXTSYNTHCALIF, align 4, !tbaa !10
%746 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %745, i32 noundef 1) #2
%747 = trunc i64 %746 to i32
%748 = add i32 %741, %747
%749 = load i32, ptr @SEQ_EXTDCCAL, align 4, !tbaa !10
%750 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %749, i32 noundef 1) #2
%751 = trunc i64 %750 to i32
%752 = add i32 %748, %751
%753 = load i32, ptr @AGC_EN_RSSI, align 4, !tbaa !10
%754 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %753, i32 noundef 0) #2
%755 = trunc i64 %754 to i32
%756 = add i32 %752, %755
%757 = load i32, ptr @RFA_ENCLKRFAGC, align 4, !tbaa !10
%758 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %757, i32 noundef 1) #2
%759 = trunc i64 %758 to i32
%760 = add i32 %756, %759
br label %761
761: ; preds = %744, %740
%762 = phi i32 [ %760, %744 ], [ %741, %740 ]
ret i32 %762
}
declare i64 @MXL_OverwriteICDefault(ptr noundef) local_unnamed_addr #1
declare i64 @MXL_ControlWrite(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @MXL_IFSynthInit(ptr noundef) local_unnamed_addr #1
declare i32 @MXL_Ceiling(i64 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"dvb_frontend", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"mxl5005s_state", !14, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !14, i64 32, !11, i64 40, !14, i64 48, !14, i64 56, !14, i64 64, !14, i64 72, !14, i64 80}
!14 = !{!"long", !8, i64 0}
!15 = !{!13, !11, i64 8}
!16 = !{!13, !11, i64 12}
!17 = !{!13, !11, i64 16}
!18 = !{!13, !11, i64 20}
!19 = !{!13, !11, i64 24}
!20 = !{!13, !14, i64 32}
!21 = !{!13, !14, i64 80}
!22 = !{!13, !11, i64 40}
!23 = !{!13, !14, i64 72}
!24 = !{!13, !14, i64 48}
!25 = !{!13, !14, i64 56}
!26 = !{!13, !14, i64 64}
!27 = !{!14, !14, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/media/tuners/extr_mxl5005s.c_MXL_BlockInit.c'
source_filename = "AnghaBench/linux/drivers/media/tuners/extr_mxl5005s.c_MXL_BlockInit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DN_IQTN_AMP_CUT = common local_unnamed_addr global i32 0, align 4
@BB_MODE = common local_unnamed_addr global i32 0, align 4
@BB_BUF = common local_unnamed_addr global i32 0, align 4
@BB_BUF_OA = common local_unnamed_addr global i32 0, align 4
@BB_IQSWAP = common local_unnamed_addr global i32 0, align 4
@BB_INITSTATE_DLPF_TUNE = common local_unnamed_addr global i32 0, align 4
@BB_DLPF_BANDSEL = common local_unnamed_addr global i32 0, align 4
@BB_ALPF_BANDSELECT = common local_unnamed_addr global i32 0, align 4
@RFSYN_CHP_GAIN = common local_unnamed_addr global i32 0, align 4
@RFSYN_EN_CHP_HIGAIN = common local_unnamed_addr global i32 0, align 4
@EN_CHP_LIN_B = common local_unnamed_addr global i32 0, align 4
@AGC_IF = common local_unnamed_addr global i32 0, align 4
@AGC_RF = common local_unnamed_addr global i32 0, align 4
@DRV_RES_SEL = common local_unnamed_addr global i32 0, align 4
@I_DRIVER = common local_unnamed_addr global i32 0, align 4
@EN_AAF = common local_unnamed_addr global i32 0, align 4
@EN_3P = common local_unnamed_addr global i32 0, align 4
@EN_AUX_3P = common local_unnamed_addr global i32 0, align 4
@SEL_AAF_BAND = common local_unnamed_addr global i32 0, align 4
@SEQ_ENCLK16_CLK_OUT = common local_unnamed_addr global i32 0, align 4
@SEQ_SEL4_16B = common local_unnamed_addr global i32 0, align 4
@XTAL_CAPSELECT = common local_unnamed_addr global i32 0, align 4
@IF_SEL_DBL = common local_unnamed_addr global i32 0, align 4
@RFSYN_R_DIV = common local_unnamed_addr global i32 0, align 4
@SEQ_EXTIQFSMPULSE = common local_unnamed_addr global i32 0, align 4
@TG_R_DIV = common local_unnamed_addr global i32 0, align 4
@SEQ_EXTSYNTHCALIF = common local_unnamed_addr global i32 0, align 4
@SEQ_EXTDCCAL = common local_unnamed_addr global i32 0, align 4
@AGC_EN_RSSI = common local_unnamed_addr global i32 0, align 4
@RFA_ENCLKRFAGC = common local_unnamed_addr global i32 0, align 4
@RFA_RSSI_REF = common local_unnamed_addr global i32 0, align 4
@RFA_RSSI_REFH = common local_unnamed_addr global i32 0, align 4
@RFA_RSSI_REFL = common local_unnamed_addr global i32 0, align 4
@RFA_FLR = common local_unnamed_addr global i32 0, align 4
@RFA_CEIL = common local_unnamed_addr global i32 0, align 4
@MXL_DVBT = common local_unnamed_addr global i64 0, align 8
@MXL_ATSC = common local_unnamed_addr global i64 0, align 8
@MXL_QAM = common local_unnamed_addr global i64 0, align 8
@MXL_DIGITAL_MODE = common local_unnamed_addr global i64 0, align 8
@MXL_ANALOG_CABLE = common local_unnamed_addr global i64 0, align 8
@MXL_ANALOG_OTA = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @MXL_BlockInit], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @MXL_BlockInit(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = tail call i64 @MXL_OverwriteICDefault(ptr noundef nonnull %0) #2
%4 = load i32, ptr @DN_IQTN_AMP_CUT, align 4, !tbaa !11
%5 = load i64, ptr %2, align 8, !tbaa !13
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
%8 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %4, i32 noundef %7) #2
%9 = add i64 %8, %3
%10 = load i32, ptr @BB_MODE, align 4, !tbaa !11
%11 = load i64, ptr %2, align 8, !tbaa !13
%12 = icmp eq i64 %11, 0
%13 = zext i1 %12 to i32
%14 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %10, i32 noundef %13) #2
%15 = add i64 %9, %14
%16 = load i32, ptr @BB_BUF, align 4, !tbaa !11
%17 = load i64, ptr %2, align 8, !tbaa !13
%18 = icmp eq i64 %17, 0
%19 = select i1 %18, i32 2, i32 3
%20 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %16, i32 noundef %19) #2
%21 = add i64 %15, %20
%22 = load i32, ptr @BB_BUF_OA, align 4, !tbaa !11
%23 = load i64, ptr %2, align 8, !tbaa !13
%24 = icmp ne i64 %23, 0
%25 = zext i1 %24 to i32
%26 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %22, i32 noundef %25) #2
%27 = add i64 %21, %26
%28 = load i32, ptr @BB_IQSWAP, align 4, !tbaa !11
%29 = load i64, ptr %2, align 8, !tbaa !13
%30 = icmp eq i64 %29, 0
%31 = zext i1 %30 to i32
%32 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %28, i32 noundef %31) #2
%33 = add i64 %27, %32
%34 = load i32, ptr @BB_INITSTATE_DLPF_TUNE, align 4, !tbaa !11
%35 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %34, i32 noundef 0) #2
%36 = add i64 %33, %35
%37 = load i64, ptr %2, align 8, !tbaa !13
%38 = icmp eq i64 %37, 0
%39 = getelementptr inbounds i8, ptr %2, i64 8
%40 = load i32, ptr %39, align 8, !tbaa !16
br i1 %38, label %54, label %41
41: ; preds = %1
switch i32 %40, label %79 [
i32 8000000, label %42
i32 7000000, label %46
i32 6000000, label %50
]
42: ; preds = %41
%43 = load i32, ptr @BB_DLPF_BANDSEL, align 4, !tbaa !11
%44 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %43, i32 noundef 0) #2
%45 = add i64 %44, %36
br label %79
46: ; preds = %41
%47 = load i32, ptr @BB_DLPF_BANDSEL, align 4, !tbaa !11
%48 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %47, i32 noundef 2) #2
%49 = add i64 %48, %36
br label %79
50: ; preds = %41
%51 = load i32, ptr @BB_DLPF_BANDSEL, align 4, !tbaa !11
%52 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %51, i32 noundef 3) #2
%53 = add i64 %52, %36
br label %79
54: ; preds = %1
switch i32 %40, label %79 [
i32 8000000, label %55
i32 7000000, label %63
i32 6000000, label %71
]
55: ; preds = %54
%56 = load i32, ptr @BB_ALPF_BANDSELECT, align 4, !tbaa !11
%57 = getelementptr inbounds i8, ptr %2, i64 12
%58 = load i32, ptr %57, align 4, !tbaa !17
%59 = icmp eq i32 %58, 0
%60 = select i1 %59, i32 3, i32 0
%61 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %56, i32 noundef %60) #2
%62 = add i64 %61, %36
br label %79
63: ; preds = %54
%64 = load i32, ptr @BB_ALPF_BANDSELECT, align 4, !tbaa !11
%65 = getelementptr inbounds i8, ptr %2, i64 12
%66 = load i32, ptr %65, align 4, !tbaa !17
%67 = icmp eq i32 %66, 0
%68 = select i1 %67, i32 4, i32 1
%69 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %64, i32 noundef %68) #2
%70 = add i64 %69, %36
br label %79
71: ; preds = %54
%72 = load i32, ptr @BB_ALPF_BANDSELECT, align 4, !tbaa !11
%73 = getelementptr inbounds i8, ptr %2, i64 12
%74 = load i32, ptr %73, align 4, !tbaa !17
%75 = icmp eq i32 %74, 0
%76 = select i1 %75, i32 5, i32 2
%77 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %72, i32 noundef %76) #2
%78 = add i64 %77, %36
br label %79
79: ; preds = %55, %63, %71, %54, %42, %46, %50, %41
%80 = phi i64 [ %36, %41 ], [ %53, %50 ], [ %49, %46 ], [ %45, %42 ], [ %36, %54 ], [ %78, %71 ], [ %70, %63 ], [ %62, %55 ]
%81 = load i32, ptr @RFSYN_CHP_GAIN, align 4, !tbaa !11
%82 = load i64, ptr %2, align 8, !tbaa !13
%83 = icmp eq i64 %82, 0
%84 = select i1 %83, i32 8, i32 5
%85 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %81, i32 noundef %84) #2
%86 = add i64 %85, %80
%87 = load i32, ptr @RFSYN_EN_CHP_HIGAIN, align 4, !tbaa !11
%88 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %87, i32 noundef 1) #2
%89 = add i64 %86, %88
%90 = load i32, ptr @EN_CHP_LIN_B, align 4, !tbaa !11
%91 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %90, i32 noundef 0) #2
%92 = add i64 %89, %91
%93 = getelementptr inbounds i8, ptr %2, i64 16
%94 = load i32, ptr %93, align 8, !tbaa !18
%95 = icmp eq i32 %94, 0
br i1 %95, label %96, label %103
96: ; preds = %79
%97 = load i32, ptr @AGC_IF, align 4, !tbaa !11
%98 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %97, i32 noundef 15) #2
%99 = add i64 %98, %92
%100 = load i32, ptr @AGC_RF, align 4, !tbaa !11
%101 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %100, i32 noundef 15) #2
%102 = add i64 %99, %101
br label %110
103: ; preds = %79
%104 = load i32, ptr @AGC_RF, align 4, !tbaa !11
%105 = load i64, ptr %2, align 8, !tbaa !13
%106 = icmp eq i64 %105, 0
%107 = select i1 %106, i32 12, i32 15
%108 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %104, i32 noundef %107) #2
%109 = add i64 %108, %92
br label %110
110: ; preds = %103, %96
%111 = phi i64 [ %102, %96 ], [ %109, %103 ]
%112 = getelementptr inbounds i8, ptr %2, i64 20
%113 = load i32, ptr %112, align 4, !tbaa !19
%114 = icmp eq i32 %113, 55
br i1 %114, label %115, label %120
115: ; preds = %110
%116 = load i32, ptr @AGC_IF, align 4, !tbaa !11
%117 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %116, i32 noundef 0) #2
%118 = add i64 %117, %111
%119 = load i32, ptr %112, align 4, !tbaa !19
br label %120
120: ; preds = %115, %110
%121 = phi i32 [ %119, %115 ], [ %113, %110 ]
%122 = phi i64 [ %118, %115 ], [ %111, %110 ]
%123 = icmp eq i32 %121, 72
br i1 %123, label %124, label %129
124: ; preds = %120
%125 = load i32, ptr @AGC_IF, align 4, !tbaa !11
%126 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %125, i32 noundef 1) #2
%127 = add i64 %126, %122
%128 = load i32, ptr %112, align 4, !tbaa !19
br label %129
129: ; preds = %124, %120
%130 = phi i32 [ %128, %124 ], [ %121, %120 ]
%131 = phi i64 [ %127, %124 ], [ %122, %120 ]
%132 = icmp eq i32 %130, 92
br i1 %132, label %133, label %138
133: ; preds = %129
%134 = load i32, ptr @AGC_IF, align 4, !tbaa !11
%135 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %134, i32 noundef 2) #2
%136 = add i64 %135, %131
%137 = load i32, ptr %112, align 4, !tbaa !19
br label %138
138: ; preds = %133, %129
%139 = phi i32 [ %137, %133 ], [ %130, %129 ]
%140 = phi i64 [ %136, %133 ], [ %131, %129 ]
%141 = icmp eq i32 %139, 110
br i1 %141, label %142, label %147
142: ; preds = %138
%143 = load i32, ptr @AGC_IF, align 4, !tbaa !11
%144 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %143, i32 noundef 3) #2
%145 = add i64 %144, %140
%146 = load i32, ptr %112, align 4, !tbaa !19
br label %147
147: ; preds = %142, %138
%148 = phi i32 [ %146, %142 ], [ %139, %138 ]
%149 = phi i64 [ %145, %142 ], [ %140, %138 ]
%150 = icmp eq i32 %148, 129
br i1 %150, label %151, label %156
151: ; preds = %147
%152 = load i32, ptr @AGC_IF, align 4, !tbaa !11
%153 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %152, i32 noundef 4) #2
%154 = add i64 %153, %149
%155 = load i32, ptr %112, align 4, !tbaa !19
br label %156
156: ; preds = %151, %147
%157 = phi i32 [ %155, %151 ], [ %148, %147 ]
%158 = phi i64 [ %154, %151 ], [ %149, %147 ]
%159 = icmp eq i32 %157, 147
br i1 %159, label %160, label %165
160: ; preds = %156
%161 = load i32, ptr @AGC_IF, align 4, !tbaa !11
%162 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %161, i32 noundef 5) #2
%163 = add i64 %162, %158
%164 = load i32, ptr %112, align 4, !tbaa !19
br label %165
165: ; preds = %160, %156
%166 = phi i32 [ %164, %160 ], [ %157, %156 ]
%167 = phi i64 [ %163, %160 ], [ %158, %156 ]
%168 = icmp eq i32 %166, 168
br i1 %168, label %169, label %174
169: ; preds = %165
%170 = load i32, ptr @AGC_IF, align 4, !tbaa !11
%171 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %170, i32 noundef 6) #2
%172 = add i64 %171, %167
%173 = load i32, ptr %112, align 4, !tbaa !19
br label %174
174: ; preds = %169, %165
%175 = phi i32 [ %173, %169 ], [ %166, %165 ]
%176 = phi i64 [ %172, %169 ], [ %167, %165 ]
%177 = icmp eq i32 %175, 194
br i1 %177, label %178, label %183
178: ; preds = %174
%179 = load i32, ptr @AGC_IF, align 4, !tbaa !11
%180 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %179, i32 noundef 7) #2
%181 = add i64 %180, %176
%182 = load i32, ptr %112, align 4, !tbaa !19
br label %183
183: ; preds = %178, %174
%184 = phi i32 [ %182, %178 ], [ %175, %174 ]
%185 = phi i64 [ %181, %178 ], [ %176, %174 ]
%186 = icmp eq i32 %184, 212
br i1 %186, label %187, label %192
187: ; preds = %183
%188 = load i32, ptr @AGC_IF, align 4, !tbaa !11
%189 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %188, i32 noundef 9) #2
%190 = add i64 %189, %185
%191 = load i32, ptr %112, align 4, !tbaa !19
br label %192
192: ; preds = %187, %183
%193 = phi i32 [ %191, %187 ], [ %184, %183 ]
%194 = phi i64 [ %190, %187 ], [ %185, %183 ]
%195 = icmp eq i32 %193, 232
br i1 %195, label %196, label %201
196: ; preds = %192
%197 = load i32, ptr @AGC_IF, align 4, !tbaa !11
%198 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %197, i32 noundef 10) #2
%199 = add i64 %198, %194
%200 = load i32, ptr %112, align 4, !tbaa !19
br label %201
201: ; preds = %196, %192
%202 = phi i32 [ %200, %196 ], [ %193, %192 ]
%203 = phi i64 [ %199, %196 ], [ %194, %192 ]
%204 = icmp eq i32 %202, 252
br i1 %204, label %205, label %210
205: ; preds = %201
%206 = load i32, ptr @AGC_IF, align 4, !tbaa !11
%207 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %206, i32 noundef 11) #2
%208 = add i64 %207, %203
%209 = load i32, ptr %112, align 4, !tbaa !19
br label %210
210: ; preds = %205, %201
%211 = phi i32 [ %209, %205 ], [ %202, %201 ]
%212 = phi i64 [ %208, %205 ], [ %203, %201 ]
%213 = icmp eq i32 %211, 271
br i1 %213, label %214, label %219
214: ; preds = %210
%215 = load i32, ptr @AGC_IF, align 4, !tbaa !11
%216 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %215, i32 noundef 12) #2
%217 = add i64 %216, %212
%218 = load i32, ptr %112, align 4, !tbaa !19
br label %219
219: ; preds = %214, %210
%220 = phi i32 [ %218, %214 ], [ %211, %210 ]
%221 = phi i64 [ %217, %214 ], [ %212, %210 ]
%222 = icmp eq i32 %220, 292
br i1 %222, label %223, label %228
223: ; preds = %219
%224 = load i32, ptr @AGC_IF, align 4, !tbaa !11
%225 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %224, i32 noundef 13) #2
%226 = add i64 %225, %221
%227 = load i32, ptr %112, align 4, !tbaa !19
br label %228
228: ; preds = %223, %219
%229 = phi i32 [ %227, %223 ], [ %220, %219 ]
%230 = phi i64 [ %226, %223 ], [ %221, %219 ]
%231 = icmp eq i32 %229, 317
br i1 %231, label %232, label %237
232: ; preds = %228
%233 = load i32, ptr @AGC_IF, align 4, !tbaa !11
%234 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %233, i32 noundef 14) #2
%235 = add i64 %234, %230
%236 = load i32, ptr %112, align 4, !tbaa !19
br label %237
237: ; preds = %232, %228
%238 = phi i32 [ %236, %232 ], [ %229, %228 ]
%239 = phi i64 [ %235, %232 ], [ %230, %228 ]
%240 = icmp eq i32 %238, 349
br i1 %240, label %241, label %245
241: ; preds = %237
%242 = load i32, ptr @AGC_IF, align 4, !tbaa !11
%243 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %242, i32 noundef 15) #2
%244 = add i64 %243, %239
br label %245
245: ; preds = %241, %237
%246 = phi i64 [ %244, %241 ], [ %239, %237 ]
%247 = tail call i64 @MXL_IFSynthInit(ptr noundef nonnull %0) #2
%248 = add i64 %247, %246
%249 = getelementptr inbounds i8, ptr %2, i64 24
%250 = load i32, ptr %249, align 8, !tbaa !20
%251 = icmp eq i32 %250, 200
br i1 %251, label %252, label %260
252: ; preds = %245
%253 = load i32, ptr @DRV_RES_SEL, align 4, !tbaa !11
%254 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %253, i32 noundef 6) #2
%255 = add i64 %254, %248
%256 = load i32, ptr @I_DRIVER, align 4, !tbaa !11
%257 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %256, i32 noundef 2) #2
%258 = add i64 %255, %257
%259 = load i32, ptr %249, align 8, !tbaa !20
br label %260
260: ; preds = %252, %245
%261 = phi i32 [ %259, %252 ], [ %250, %245 ]
%262 = phi i64 [ %258, %252 ], [ %248, %245 ]
%263 = icmp eq i32 %261, 300
br i1 %263, label %264, label %271
264: ; preds = %260
%265 = load i32, ptr @DRV_RES_SEL, align 4, !tbaa !11
%266 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %265, i32 noundef 4) #2
%267 = add i64 %266, %262
%268 = load i32, ptr @I_DRIVER, align 4, !tbaa !11
%269 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %268, i32 noundef 1) #2
%270 = add i64 %267, %269
br label %271
271: ; preds = %264, %260
%272 = phi i64 [ %270, %264 ], [ %262, %260 ]
%273 = trunc i64 %272 to i32
%274 = load i64, ptr %2, align 8, !tbaa !13
%275 = icmp eq i64 %274, 0
%276 = getelementptr inbounds i8, ptr %2, i64 32
%277 = load i64, ptr %276, align 8, !tbaa !21
%278 = add i64 %277, -4000000
br i1 %275, label %321, label %279
279: ; preds = %271
%280 = icmp ult i64 %278, 2280001
br i1 %280, label %281, label %296
281: ; preds = %279
%282 = load i32, ptr @EN_AAF, align 4, !tbaa !11
%283 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %282, i32 noundef 1) #2
%284 = add i64 %283, %272
%285 = load i32, ptr @EN_3P, align 4, !tbaa !11
%286 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %285, i32 noundef 1) #2
%287 = add i64 %284, %286
%288 = load i32, ptr @EN_AUX_3P, align 4, !tbaa !11
%289 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %288, i32 noundef 1) #2
%290 = add i64 %287, %289
%291 = load i32, ptr @SEL_AAF_BAND, align 4, !tbaa !11
%292 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %291, i32 noundef 0) #2
%293 = add i64 %290, %292
%294 = trunc i64 %293 to i32
%295 = load i64, ptr %276, align 8, !tbaa !21
br label %296
296: ; preds = %281, %279
%297 = phi i64 [ %295, %281 ], [ %277, %279 ]
%298 = phi i32 [ %294, %281 ], [ %273, %279 ]
switch i64 %297, label %317 [
i64 36125000, label %299
i64 36150000, label %299
]
299: ; preds = %296, %296
%300 = load i32, ptr @EN_AAF, align 4, !tbaa !11
%301 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %300, i32 noundef 1) #2
%302 = trunc i64 %301 to i32
%303 = add i32 %298, %302
%304 = load i32, ptr @EN_3P, align 4, !tbaa !11
%305 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %304, i32 noundef 1) #2
%306 = trunc i64 %305 to i32
%307 = add i32 %303, %306
%308 = load i32, ptr @EN_AUX_3P, align 4, !tbaa !11
%309 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %308, i32 noundef 1) #2
%310 = trunc i64 %309 to i32
%311 = add i32 %307, %310
%312 = load i32, ptr @SEL_AAF_BAND, align 4, !tbaa !11
%313 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %312, i32 noundef 1) #2
%314 = trunc i64 %313 to i32
%315 = add i32 %311, %314
%316 = load i64, ptr %276, align 8, !tbaa !21
br label %317
317: ; preds = %296, %299
%318 = phi i64 [ %316, %299 ], [ %297, %296 ]
%319 = phi i32 [ %315, %299 ], [ %298, %296 ]
%320 = icmp ugt i64 %318, 36150000
br i1 %320, label %342, label %361
321: ; preds = %271
%322 = icmp ult i64 %278, 1000001
br i1 %322, label %323, label %338
323: ; preds = %321
%324 = load i32, ptr @EN_AAF, align 4, !tbaa !11
%325 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %324, i32 noundef 1) #2
%326 = add i64 %325, %272
%327 = load i32, ptr @EN_3P, align 4, !tbaa !11
%328 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %327, i32 noundef 1) #2
%329 = add i64 %326, %328
%330 = load i32, ptr @EN_AUX_3P, align 4, !tbaa !11
%331 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %330, i32 noundef 1) #2
%332 = add i64 %329, %331
%333 = load i32, ptr @SEL_AAF_BAND, align 4, !tbaa !11
%334 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %333, i32 noundef 0) #2
%335 = add i64 %332, %334
%336 = trunc i64 %335 to i32
%337 = load i64, ptr %276, align 8, !tbaa !21
br label %338
338: ; preds = %323, %321
%339 = phi i64 [ %337, %323 ], [ %277, %321 ]
%340 = phi i32 [ %336, %323 ], [ %273, %321 ]
%341 = icmp ugt i64 %339, 5000000
br i1 %341, label %342, label %361
342: ; preds = %338, %317
%343 = phi i32 [ %319, %317 ], [ %340, %338 ]
%344 = phi i32 [ 1, %317 ], [ 0, %338 ]
%345 = load i32, ptr @EN_AAF, align 4, !tbaa !11
%346 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %345, i32 noundef 0) #2
%347 = trunc i64 %346 to i32
%348 = add i32 %343, %347
%349 = load i32, ptr @EN_3P, align 4, !tbaa !11
%350 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %349, i32 noundef %344) #2
%351 = trunc i64 %350 to i32
%352 = add i32 %348, %351
%353 = load i32, ptr @EN_AUX_3P, align 4, !tbaa !11
%354 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %353, i32 noundef %344) #2
%355 = trunc i64 %354 to i32
%356 = add i32 %352, %355
%357 = load i32, ptr @SEL_AAF_BAND, align 4, !tbaa !11
%358 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %357, i32 noundef %344) #2
%359 = trunc i64 %358 to i32
%360 = add i32 %356, %359
br label %361
361: ; preds = %342, %338, %317
%362 = phi i32 [ %319, %317 ], [ %340, %338 ], [ %360, %342 ]
%363 = getelementptr inbounds i8, ptr %2, i64 80
%364 = load i64, ptr %363, align 8, !tbaa !22
%365 = icmp ne i64 %364, 0
%366 = zext i1 %365 to i32
%367 = load i32, ptr @SEQ_ENCLK16_CLK_OUT, align 4, !tbaa !11
%368 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %367, i32 noundef %366) #2
%369 = trunc i64 %368 to i32
%370 = add i32 %362, %369
%371 = getelementptr inbounds i8, ptr %2, i64 40
%372 = load i32, ptr %371, align 8, !tbaa !23
%373 = icmp eq i32 %372, 1
br i1 %373, label %374, label %380
374: ; preds = %361
%375 = load i32, ptr @SEQ_SEL4_16B, align 4, !tbaa !11
%376 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %375, i32 noundef 1) #2
%377 = trunc i64 %376 to i32
%378 = add i32 %370, %377
%379 = load i32, ptr %371, align 8, !tbaa !23
br label %380
380: ; preds = %374, %361
%381 = phi i32 [ %379, %374 ], [ %372, %361 ]
%382 = phi i32 [ %378, %374 ], [ %370, %361 ]
%383 = icmp eq i32 %381, 0
br i1 %383, label %384, label %389
384: ; preds = %380
%385 = load i32, ptr @SEQ_SEL4_16B, align 4, !tbaa !11
%386 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %385, i32 noundef 0) #2
%387 = trunc i64 %386 to i32
%388 = add i32 %382, %387
br label %389
389: ; preds = %384, %380
%390 = phi i32 [ %388, %384 ], [ %382, %380 ]
%391 = getelementptr inbounds i8, ptr %2, i64 72
%392 = load i64, ptr %391, align 8, !tbaa !24
%393 = icmp ne i64 %392, 0
%394 = load i32, ptr @XTAL_CAPSELECT, align 4, !tbaa !11
%395 = zext i1 %393 to i32
%396 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %394, i32 noundef %395) #2
%397 = trunc i64 %396 to i32
%398 = add i32 %390, %397
%399 = getelementptr inbounds i8, ptr %2, i64 48
%400 = load i64, ptr %399, align 8, !tbaa !25
%401 = add i64 %400, -12000000
%402 = icmp ult i64 %401, 4000001
br i1 %402, label %403, label %409
403: ; preds = %389
%404 = load i32, ptr @IF_SEL_DBL, align 4, !tbaa !11
%405 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %404, i32 noundef 1) #2
%406 = trunc i64 %405 to i32
%407 = add i32 %398, %406
%408 = load i64, ptr %399, align 8, !tbaa !25
br label %409
409: ; preds = %403, %389
%410 = phi i64 [ %408, %403 ], [ %400, %389 ]
%411 = phi i32 [ %407, %403 ], [ %398, %389 ]
%412 = add i64 %410, -16000001
%413 = icmp ult i64 %412, 16000000
br i1 %413, label %414, label %420
414: ; preds = %409
%415 = load i32, ptr @IF_SEL_DBL, align 4, !tbaa !11
%416 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %415, i32 noundef 0) #2
%417 = trunc i64 %416 to i32
%418 = add i32 %411, %417
%419 = load i64, ptr %399, align 8, !tbaa !25
br label %420
420: ; preds = %414, %409
%421 = phi i64 [ %419, %414 ], [ %410, %409 ]
%422 = phi i32 [ %418, %414 ], [ %411, %409 ]
%423 = add i64 %421, -12000000
%424 = icmp ult i64 %423, 10000001
br i1 %424, label %425, label %431
425: ; preds = %420
%426 = load i32, ptr @RFSYN_R_DIV, align 4, !tbaa !11
%427 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %426, i32 noundef 3) #2
%428 = trunc i64 %427 to i32
%429 = add i32 %422, %428
%430 = load i64, ptr %399, align 8, !tbaa !25
br label %431
431: ; preds = %425, %420
%432 = phi i64 [ %430, %425 ], [ %421, %420 ]
%433 = phi i32 [ %429, %425 ], [ %422, %420 ]
%434 = add i64 %432, -22000001
%435 = icmp ult i64 %434, 10000000
br i1 %435, label %436, label %441
436: ; preds = %431
%437 = load i32, ptr @RFSYN_R_DIV, align 4, !tbaa !11
%438 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %437, i32 noundef 0) #2
%439 = trunc i64 %438 to i32
%440 = add i32 %433, %439
br label %441
441: ; preds = %436, %431
%442 = phi i32 [ %440, %436 ], [ %433, %431 ]
%443 = load i64, ptr %2, align 8, !tbaa !13
%444 = icmp eq i64 %443, 0
br i1 %444, label %445, label %449
445: ; preds = %441
%446 = getelementptr inbounds i8, ptr %2, i64 12
%447 = load i32, ptr %446, align 4, !tbaa !17
%448 = icmp eq i32 %447, 1
br i1 %448, label %450, label %449
449: ; preds = %445, %441
br label %450
450: ; preds = %445, %449
%451 = phi i32 [ 1, %449 ], [ 0, %445 ]
%452 = load i32, ptr @SEQ_EXTIQFSMPULSE, align 4, !tbaa !11
%453 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %452, i32 noundef %451) #2
%454 = trunc i64 %453 to i32
%455 = add i32 %442, %454
%456 = load i32, ptr @TG_R_DIV, align 4, !tbaa !11
%457 = load i64, ptr %399, align 8, !tbaa !25
%458 = tail call i32 @MXL_Ceiling(i64 noundef %457, i32 noundef 1000000) #2
%459 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %456, i32 noundef %458) #2
%460 = trunc i64 %459 to i32
%461 = add i32 %455, %460
%462 = getelementptr inbounds i8, ptr %2, i64 56
%463 = load i64, ptr %462, align 8, !tbaa !26
%464 = icmp eq i64 %463, 0
br i1 %464, label %502, label %465
465: ; preds = %450
%466 = load i32, ptr @SEQ_EXTSYNTHCALIF, align 4, !tbaa !11
%467 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %466, i32 noundef 1) #2
%468 = trunc i64 %467 to i32
%469 = add i32 %461, %468
%470 = load i32, ptr @SEQ_EXTDCCAL, align 4, !tbaa !11
%471 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %470, i32 noundef 1) #2
%472 = trunc i64 %471 to i32
%473 = add i32 %469, %472
%474 = load i32, ptr @AGC_EN_RSSI, align 4, !tbaa !11
%475 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %474, i32 noundef 1) #2
%476 = trunc i64 %475 to i32
%477 = add i32 %473, %476
%478 = load i32, ptr @RFA_ENCLKRFAGC, align 4, !tbaa !11
%479 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %478, i32 noundef 1) #2
%480 = trunc i64 %479 to i32
%481 = add i32 %477, %480
%482 = load i32, ptr @RFA_RSSI_REF, align 4, !tbaa !11
%483 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %482, i32 noundef 2) #2
%484 = trunc i64 %483 to i32
%485 = add i32 %481, %484
%486 = load i32, ptr @RFA_RSSI_REFH, align 4, !tbaa !11
%487 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %486, i32 noundef 3) #2
%488 = trunc i64 %487 to i32
%489 = add i32 %485, %488
%490 = load i32, ptr @RFA_RSSI_REFL, align 4, !tbaa !11
%491 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %490, i32 noundef 1) #2
%492 = trunc i64 %491 to i32
%493 = add i32 %489, %492
%494 = load i32, ptr @RFA_FLR, align 4, !tbaa !11
%495 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %494, i32 noundef 0) #2
%496 = trunc i64 %495 to i32
%497 = add i32 %493, %496
%498 = load i32, ptr @RFA_CEIL, align 4, !tbaa !11
%499 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %498, i32 noundef 12) #2
%500 = trunc i64 %499 to i32
%501 = add i32 %497, %500
br label %502
502: ; preds = %465, %450
%503 = phi i32 [ %501, %465 ], [ %461, %450 ]
%504 = getelementptr inbounds i8, ptr %2, i64 64
%505 = load i64, ptr %504, align 8, !tbaa !27
%506 = load i64, ptr @MXL_DVBT, align 8, !tbaa !28
%507 = icmp eq i64 %505, %506
br i1 %507, label %508, label %552
508: ; preds = %502
store i32 1, ptr %93, align 8, !tbaa !18
%509 = load i32, ptr @SEQ_EXTSYNTHCALIF, align 4, !tbaa !11
%510 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %509, i32 noundef 1) #2
%511 = trunc i64 %510 to i32
%512 = add i32 %503, %511
%513 = load i32, ptr @SEQ_EXTDCCAL, align 4, !tbaa !11
%514 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %513, i32 noundef 1) #2
%515 = trunc i64 %514 to i32
%516 = add i32 %512, %515
%517 = load i32, ptr @AGC_EN_RSSI, align 4, !tbaa !11
%518 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %517, i32 noundef 1) #2
%519 = trunc i64 %518 to i32
%520 = add i32 %516, %519
%521 = load i32, ptr @RFA_ENCLKRFAGC, align 4, !tbaa !11
%522 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %521, i32 noundef 1) #2
%523 = trunc i64 %522 to i32
%524 = add i32 %520, %523
%525 = load i32, ptr @RFA_RSSI_REF, align 4, !tbaa !11
%526 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %525, i32 noundef 3) #2
%527 = trunc i64 %526 to i32
%528 = add i32 %524, %527
%529 = load i32, ptr @RFA_RSSI_REFH, align 4, !tbaa !11
%530 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %529, i32 noundef 5) #2
%531 = trunc i64 %530 to i32
%532 = add i32 %528, %531
%533 = load i32, ptr @RFA_RSSI_REFL, align 4, !tbaa !11
%534 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %533, i32 noundef 1) #2
%535 = trunc i64 %534 to i32
%536 = add i32 %532, %535
%537 = load i32, ptr @RFA_FLR, align 4, !tbaa !11
%538 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %537, i32 noundef 2) #2
%539 = trunc i64 %538 to i32
%540 = add i32 %536, %539
%541 = load i32, ptr @RFA_CEIL, align 4, !tbaa !11
%542 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %541, i32 noundef 13) #2
%543 = trunc i64 %542 to i32
%544 = add i32 %540, %543
%545 = load i64, ptr %276, align 8, !tbaa !21
%546 = icmp ugt i64 %545, 6280000
%547 = load i32, ptr @BB_IQSWAP, align 4, !tbaa !11
%548 = zext i1 %546 to i32
%549 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %547, i32 noundef %548) #2
%550 = trunc i64 %549 to i32
%551 = add i32 %544, %550
br label %552
552: ; preds = %508, %502
%553 = phi i32 [ %503, %502 ], [ %551, %508 ]
%554 = load i64, ptr %504, align 8, !tbaa !27
%555 = load i64, ptr @MXL_ATSC, align 8, !tbaa !28
%556 = icmp eq i64 %554, %555
br i1 %556, label %557, label %609
557: ; preds = %552
store i32 1, ptr %93, align 8, !tbaa !18
%558 = load i32, ptr @SEQ_EXTSYNTHCALIF, align 4, !tbaa !11
%559 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %558, i32 noundef 1) #2
%560 = trunc i64 %559 to i32
%561 = add i32 %553, %560
%562 = load i32, ptr @SEQ_EXTDCCAL, align 4, !tbaa !11
%563 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %562, i32 noundef 1) #2
%564 = trunc i64 %563 to i32
%565 = add i32 %561, %564
%566 = load i32, ptr @AGC_EN_RSSI, align 4, !tbaa !11
%567 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %566, i32 noundef 1) #2
%568 = trunc i64 %567 to i32
%569 = add i32 %565, %568
%570 = load i32, ptr @RFA_ENCLKRFAGC, align 4, !tbaa !11
%571 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %570, i32 noundef 1) #2
%572 = trunc i64 %571 to i32
%573 = add i32 %569, %572
%574 = load i32, ptr @RFA_RSSI_REF, align 4, !tbaa !11
%575 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %574, i32 noundef 2) #2
%576 = trunc i64 %575 to i32
%577 = add i32 %573, %576
%578 = load i32, ptr @RFA_RSSI_REFH, align 4, !tbaa !11
%579 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %578, i32 noundef 4) #2
%580 = trunc i64 %579 to i32
%581 = add i32 %577, %580
%582 = load i32, ptr @RFA_RSSI_REFL, align 4, !tbaa !11
%583 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %582, i32 noundef 1) #2
%584 = trunc i64 %583 to i32
%585 = add i32 %581, %584
%586 = load i32, ptr @RFA_FLR, align 4, !tbaa !11
%587 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %586, i32 noundef 2) #2
%588 = trunc i64 %587 to i32
%589 = add i32 %585, %588
%590 = load i32, ptr @RFA_CEIL, align 4, !tbaa !11
%591 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %590, i32 noundef 13) #2
%592 = trunc i64 %591 to i32
%593 = add i32 %589, %592
%594 = load i32, ptr @BB_INITSTATE_DLPF_TUNE, align 4, !tbaa !11
%595 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %594, i32 noundef 1) #2
%596 = trunc i64 %595 to i32
%597 = add i32 %593, %596
%598 = load i32, ptr @RFSYN_CHP_GAIN, align 4, !tbaa !11
%599 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %598, i32 noundef 5) #2
%600 = trunc i64 %599 to i32
%601 = add i32 %597, %600
%602 = load i64, ptr %276, align 8, !tbaa !21
%603 = icmp ugt i64 %602, 6280000
%604 = load i32, ptr @BB_IQSWAP, align 4, !tbaa !11
%605 = zext i1 %603 to i32
%606 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %604, i32 noundef %605) #2
%607 = trunc i64 %606 to i32
%608 = add i32 %601, %607
br label %609
609: ; preds = %557, %552
%610 = phi i32 [ %553, %552 ], [ %608, %557 ]
%611 = load i64, ptr %504, align 8, !tbaa !27
%612 = load i64, ptr @MXL_QAM, align 8, !tbaa !28
%613 = icmp eq i64 %611, %612
br i1 %613, label %614, label %660
614: ; preds = %609
%615 = load i64, ptr @MXL_DIGITAL_MODE, align 8, !tbaa !28
store i64 %615, ptr %2, align 8, !tbaa !13
%616 = load i32, ptr @SEQ_EXTSYNTHCALIF, align 4, !tbaa !11
%617 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %616, i32 noundef 1) #2
%618 = trunc i64 %617 to i32
%619 = add i32 %610, %618
%620 = load i32, ptr @SEQ_EXTDCCAL, align 4, !tbaa !11
%621 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %620, i32 noundef 1) #2
%622 = trunc i64 %621 to i32
%623 = add i32 %619, %622
%624 = load i32, ptr @AGC_EN_RSSI, align 4, !tbaa !11
%625 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %624, i32 noundef 0) #2
%626 = trunc i64 %625 to i32
%627 = add i32 %623, %626
%628 = load i32, ptr @RFA_ENCLKRFAGC, align 4, !tbaa !11
%629 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %628, i32 noundef 1) #2
%630 = trunc i64 %629 to i32
%631 = add i32 %627, %630
%632 = load i32, ptr @RFA_RSSI_REFH, align 4, !tbaa !11
%633 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %632, i32 noundef 5) #2
%634 = trunc i64 %633 to i32
%635 = add i32 %631, %634
%636 = load i32, ptr @RFA_RSSI_REF, align 4, !tbaa !11
%637 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %636, i32 noundef 3) #2
%638 = trunc i64 %637 to i32
%639 = add i32 %635, %638
%640 = load i32, ptr @RFA_RSSI_REFL, align 4, !tbaa !11
%641 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %640, i32 noundef 2) #2
%642 = trunc i64 %641 to i32
%643 = add i32 %639, %642
%644 = load i32, ptr @RFSYN_CHP_GAIN, align 4, !tbaa !11
%645 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %644, i32 noundef 3) #2
%646 = trunc i64 %645 to i32
%647 = add i32 %643, %646
%648 = load i64, ptr %276, align 8, !tbaa !21
%649 = icmp ugt i64 %648, 6280000
%650 = load i32, ptr @BB_IQSWAP, align 4, !tbaa !11
%651 = zext i1 %649 to i32
%652 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %650, i32 noundef %651) #2
%653 = trunc i64 %652 to i32
%654 = add i32 %647, %653
%655 = load i32, ptr @RFSYN_CHP_GAIN, align 4, !tbaa !11
%656 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %655, i32 noundef 2) #2
%657 = trunc i64 %656 to i32
%658 = add i32 %654, %657
%659 = load i64, ptr %504, align 8, !tbaa !27
br label %660
660: ; preds = %614, %609
%661 = phi i64 [ %659, %614 ], [ %611, %609 ]
%662 = phi i32 [ %658, %614 ], [ %610, %609 ]
%663 = load i64, ptr @MXL_ANALOG_CABLE, align 8, !tbaa !28
%664 = icmp eq i64 %661, %663
br i1 %664, label %665, label %695
665: ; preds = %660
store i32 1, ptr %93, align 8, !tbaa !18
%666 = load i32, ptr @SEQ_EXTSYNTHCALIF, align 4, !tbaa !11
%667 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %666, i32 noundef 1) #2
%668 = trunc i64 %667 to i32
%669 = add i32 %662, %668
%670 = load i32, ptr @SEQ_EXTDCCAL, align 4, !tbaa !11
%671 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %670, i32 noundef 1) #2
%672 = trunc i64 %671 to i32
%673 = add i32 %669, %672
%674 = load i32, ptr @AGC_EN_RSSI, align 4, !tbaa !11
%675 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %674, i32 noundef 0) #2
%676 = trunc i64 %675 to i32
%677 = add i32 %673, %676
%678 = load i32, ptr @RFA_ENCLKRFAGC, align 4, !tbaa !11
%679 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %678, i32 noundef 1) #2
%680 = trunc i64 %679 to i32
%681 = add i32 %677, %680
%682 = load i32, ptr @AGC_IF, align 4, !tbaa !11
%683 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %682, i32 noundef 1) #2
%684 = trunc i64 %683 to i32
%685 = add i32 %681, %684
%686 = load i32, ptr @AGC_RF, align 4, !tbaa !11
%687 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %686, i32 noundef 15) #2
%688 = trunc i64 %687 to i32
%689 = add i32 %685, %688
%690 = load i32, ptr @BB_IQSWAP, align 4, !tbaa !11
%691 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %690, i32 noundef 1) #2
%692 = trunc i64 %691 to i32
%693 = add i32 %689, %692
%694 = load i64, ptr %504, align 8, !tbaa !27
br label %695
695: ; preds = %665, %660
%696 = phi i64 [ %694, %665 ], [ %661, %660 ]
%697 = phi i32 [ %693, %665 ], [ %662, %660 ]
%698 = load i64, ptr @MXL_ANALOG_OTA, align 8, !tbaa !28
%699 = icmp eq i64 %696, %698
br i1 %699, label %700, label %737
700: ; preds = %695
%701 = load i32, ptr @SEQ_EXTSYNTHCALIF, align 4, !tbaa !11
%702 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %701, i32 noundef 1) #2
%703 = trunc i64 %702 to i32
%704 = add i32 %697, %703
%705 = load i32, ptr @SEQ_EXTDCCAL, align 4, !tbaa !11
%706 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %705, i32 noundef 1) #2
%707 = trunc i64 %706 to i32
%708 = add i32 %704, %707
%709 = load i32, ptr @AGC_EN_RSSI, align 4, !tbaa !11
%710 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %709, i32 noundef 1) #2
%711 = trunc i64 %710 to i32
%712 = add i32 %708, %711
%713 = load i32, ptr @RFA_ENCLKRFAGC, align 4, !tbaa !11
%714 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %713, i32 noundef 1) #2
%715 = trunc i64 %714 to i32
%716 = add i32 %712, %715
%717 = load i32, ptr @RFA_RSSI_REFH, align 4, !tbaa !11
%718 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %717, i32 noundef 5) #2
%719 = trunc i64 %718 to i32
%720 = add i32 %716, %719
%721 = load i32, ptr @RFA_RSSI_REF, align 4, !tbaa !11
%722 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %721, i32 noundef 3) #2
%723 = trunc i64 %722 to i32
%724 = add i32 %720, %723
%725 = load i32, ptr @RFA_RSSI_REFL, align 4, !tbaa !11
%726 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %725, i32 noundef 2) #2
%727 = trunc i64 %726 to i32
%728 = add i32 %724, %727
%729 = load i32, ptr @RFSYN_CHP_GAIN, align 4, !tbaa !11
%730 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %729, i32 noundef 3) #2
%731 = trunc i64 %730 to i32
%732 = add i32 %728, %731
%733 = load i32, ptr @BB_IQSWAP, align 4, !tbaa !11
%734 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %733, i32 noundef 1) #2
%735 = trunc i64 %734 to i32
%736 = add i32 %732, %735
br label %737
737: ; preds = %700, %695
%738 = phi i32 [ %736, %700 ], [ %697, %695 ]
%739 = load i64, ptr %462, align 8, !tbaa !26
%740 = icmp eq i64 %739, 0
br i1 %740, label %741, label %758
741: ; preds = %737
%742 = load i32, ptr @SEQ_EXTSYNTHCALIF, align 4, !tbaa !11
%743 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %742, i32 noundef 1) #2
%744 = trunc i64 %743 to i32
%745 = add i32 %738, %744
%746 = load i32, ptr @SEQ_EXTDCCAL, align 4, !tbaa !11
%747 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %746, i32 noundef 1) #2
%748 = trunc i64 %747 to i32
%749 = add i32 %745, %748
%750 = load i32, ptr @AGC_EN_RSSI, align 4, !tbaa !11
%751 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %750, i32 noundef 0) #2
%752 = trunc i64 %751 to i32
%753 = add i32 %749, %752
%754 = load i32, ptr @RFA_ENCLKRFAGC, align 4, !tbaa !11
%755 = tail call i64 @MXL_ControlWrite(ptr noundef nonnull %0, i32 noundef %754, i32 noundef 1) #2
%756 = trunc i64 %755 to i32
%757 = add i32 %753, %756
br label %758
758: ; preds = %741, %737
%759 = phi i32 [ %757, %741 ], [ %738, %737 ]
ret i32 %759
}
declare i64 @MXL_OverwriteICDefault(ptr noundef) local_unnamed_addr #1
declare i64 @MXL_ControlWrite(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @MXL_IFSynthInit(ptr noundef) local_unnamed_addr #1
declare i32 @MXL_Ceiling(i64 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"dvb_frontend", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"mxl5005s_state", !15, i64 0, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !15, i64 32, !12, i64 40, !15, i64 48, !15, i64 56, !15, i64 64, !15, i64 72, !15, i64 80}
!15 = !{!"long", !9, i64 0}
!16 = !{!14, !12, i64 8}
!17 = !{!14, !12, i64 12}
!18 = !{!14, !12, i64 16}
!19 = !{!14, !12, i64 20}
!20 = !{!14, !12, i64 24}
!21 = !{!14, !15, i64 32}
!22 = !{!14, !15, i64 80}
!23 = !{!14, !12, i64 40}
!24 = !{!14, !15, i64 72}
!25 = !{!14, !15, i64 48}
!26 = !{!14, !15, i64 56}
!27 = !{!14, !15, i64 64}
!28 = !{!15, !15, i64 0}
| linux_drivers_media_tuners_extr_mxl5005s.c_MXL_BlockInit |
; ModuleID = 'AnghaBench/Provenance/Cores/Mupen64Plus/png/contrib/tools/extr_makesRGB.c_main.c'
source_filename = "AnghaBench/Provenance/Cores/Mupen64Plus/png/contrib/tools/extr_makesRGB.c_main.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [7 x i8] c"--test\00", align 1
@png_sRGB_table = dso_local local_unnamed_addr global ptr null, align 8
@stderr = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [29 x i8] c"not reached: %u .. %u .. %u\0A\00", align 1
@.str.2 = private unnamed_addr constant [34 x i8] c"table[%d][0]: overflow %08x (%d)\0A\00", align 1
@png_sRGB_base = dso_local local_unnamed_addr global ptr null, align 8
@.str.3 = private unnamed_addr constant [34 x i8] c"table[%d][1]: overflow %08x (%d)\0A\00", align 1
@png_sRGB_delta = dso_local local_unnamed_addr global ptr null, align 8
@.str.4 = private unnamed_addr constant [44 x i8] c"/* initial error counts: %u .. %u .. %u */\0A\00", align 1
@.str.5 = private unnamed_addr constant [35 x i8] c"/* adjust (mid ): %f: %u -> %u */\0A\00", align 1
@.str.6 = private unnamed_addr constant [35 x i8] c"/* adjust (low ): %f: %u -> %u */\0A\00", align 1
@.str.7 = private unnamed_addr constant [35 x i8] c"/* adjust (high): %f: %u -> %u */\0A\00", align 1
@.str.8 = private unnamed_addr constant [22 x i8] c"/* adjust: %f: %u */\0A\00", align 1
@.str.9 = private unnamed_addr constant [22 x i8] c"makesRGB: impossible\0A\00", align 1
@.str.10 = private unnamed_addr constant [52 x i8] c"/* table[%u]={%u,%u} -> {%u,%u} %u -> %u errors */\0A\00", align 1
@max_input = dso_local local_unnamed_addr global i32 0, align 4
@.str.11 = private unnamed_addr constant [62 x i8] c"/* 0x%08x: exact: %3d, got: %3d [tables: %08x, %08x] (%f) */\0A\00", align 1
@.str.12 = private unnamed_addr constant [62 x i8] c"/* 0x%04x: exact: %3d, got: %3d [tables: %08x, %08x] (%f) */\0A\00", align 1
@.str.13 = private unnamed_addr constant [32 x i8] c"8-bit rounding error: %d -> %d\0A\00", align 1
@.str.14 = private unnamed_addr constant [49 x i8] c"/* 8-bit roundtrip error: %d -> %f -> %d(%f) */\0A\00", align 1
@.str.15 = private unnamed_addr constant [53 x i8] c"/* error: %g - %g, %u (%g%%) of readings inexact */\0A\00", align 1
@.str.16 = private unnamed_addr constant [60 x i8] c"/* 16-bit error: %g - %g, %u (%g%%) of readings inexact */\0A\00", align 1
@.str.17 = private unnamed_addr constant [50 x i8] c"PNG_CONST png_uint_16 png_sRGB_table[256] =\0A{\0A \00", align 1
@.str.18 = private unnamed_addr constant [4 x i8] c"%d,\00", align 1
@.str.19 = private unnamed_addr constant [5 x i8] c"\0A \00", align 1
@.str.20 = private unnamed_addr constant [8 x i8] c"%d\0A};\0A\0A\00", align 1
@.str.21 = private unnamed_addr constant [49 x i8] c"PNG_CONST png_uint_16 png_sRGB_base[512] =\0A{\0A \00", align 1
@.str.22 = private unnamed_addr constant [47 x i8] c"PNG_CONST png_byte png_sRGB_delta[512] =\0A{\0A \00", align 1
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @main(i32 noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %9
4: ; preds = %2
%5 = getelementptr inbounds ptr, ptr %1, i64 1
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = tail call i64 @strcmp(ptr noundef nonnull @.str, ptr noundef %6) #5
%8 = icmp ne i64 %7, 0
br label %9
9: ; preds = %4, %2
%10 = phi i1 [ %8, %4 ], [ true, %2 ]
br label %11
11: ; preds = %9, %11
%12 = phi i64 [ 0, %9 ], [ %17, %11 ]
%13 = trunc i64 %12 to i32
%14 = tail call i32 @invsRGB(i32 noundef %13) #5
%15 = load ptr, ptr @png_sRGB_table, align 8, !tbaa !5
%16 = getelementptr inbounds i32, ptr %15, i64 %12
store i32 %14, ptr %16, align 4, !tbaa !9
%17 = add nuw nsw i64 %12, 1
%18 = icmp eq i64 %17, 256
br i1 %18, label %19, label %11, !llvm.loop !11
19: ; preds = %11, %130
%20 = phi i32 [ %120, %130 ], [ 0, %11 ]
%21 = phi i32 [ %42, %130 ], [ 0, %11 ]
%22 = phi i32 [ %54, %130 ], [ 0, %11 ]
%23 = phi double [ %69, %130 ], [ 5.000000e-01, %11 ]
%24 = phi double [ %37, %130 ], [ 6.000000e-01, %11 ]
%25 = phi double [ %50, %130 ], [ 4.000000e-01, %11 ]
br label %26
26: ; preds = %19, %126
%27 = phi i32 [ %120, %126 ], [ %20, %19 ]
%28 = phi i32 [ %42, %126 ], [ %21, %19 ]
%29 = phi i32 [ %54, %126 ], [ %22, %19 ]
%30 = phi double [ %37, %126 ], [ %24, %19 ]
%31 = phi double [ %50, %126 ], [ %25, %19 ]
%32 = icmp eq i32 %27, 0
%33 = icmp eq i32 %27, 0
br label %34
34: ; preds = %142, %26
%35 = phi i32 [ %120, %142 ], [ %28, %26 ]
%36 = phi i32 [ %54, %142 ], [ %29, %26 ]
%37 = phi double [ %69, %142 ], [ %30, %26 ]
%38 = phi double [ %50, %142 ], [ %31, %26 ]
%39 = fadd double %23, %37
%40 = fmul double %39, 5.000000e-01
br label %41
41: ; preds = %124, %34
%42 = phi i32 [ %35, %34 ], [ %120, %124 ]
%43 = phi i32 [ %36, %34 ], [ %54, %124 ]
%44 = phi double [ %38, %34 ], [ %50, %124 ]
%45 = icmp eq i32 %42, 0
%46 = icmp ult i32 %27, %42
%47 = icmp eq i32 %42, 0
br label %48
48: ; preds = %41, %136
%49 = phi i32 [ %43, %41 ], [ %120, %136 ]
%50 = phi double [ %44, %41 ], [ %69, %136 ]
%51 = fadd double %23, %50
%52 = fmul double %51, 5.000000e-01
br label %53
53: ; preds = %48, %123
%54 = phi i32 [ %120, %123 ], [ %49, %48 ]
%55 = icmp eq i32 %54, 0
%56 = select i1 %55, i1 true, i1 %45
%57 = select i1 %55, double %50, double %37
%58 = select i1 %56, i1 true, i1 %32
%59 = select i1 %56, double %57, double %23
%60 = select i1 %58, i1 true, i1 %46
%61 = select i1 %58, double %59, double %40
br i1 %60, label %68, label %62
62: ; preds = %53
%63 = icmp ult i32 %27, %54
br i1 %63, label %68, label %64
64: ; preds = %62
%65 = load i32, ptr @stderr, align 4, !tbaa !9
%66 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %65, ptr noundef nonnull @.str.1, i32 noundef %54, i32 noundef %27, i32 noundef %42) #5
%67 = tail call i32 @exit(i32 noundef 1) #6
unreachable
68: ; preds = %53, %62
%69 = phi double [ %61, %53 ], [ %52, %62 ]
br label %70
70: ; preds = %68, %106
%71 = phi i64 [ 0, %68 ], [ %77, %106 ]
%72 = trunc i64 %71 to i32
%73 = shl i32 %72, 15
%74 = tail call i32 @sRGB(i32 noundef %73) #5
%75 = mul nsw i32 %74, 255
%76 = sitofp i32 %75 to double
%77 = add nuw nsw i64 %71, 1
%78 = trunc i64 %77 to i32
%79 = shl i32 %78, 15
%80 = tail call i32 @sRGB(i32 noundef %79) #5
%81 = fadd double %69, %76
%82 = fmul double %81, 2.560000e+02
%83 = fptosi double %82 to i32
%84 = tail call i32 @nearbyint(i32 noundef %83) #5
%85 = icmp ugt i32 %84, 65535
br i1 %85, label %86, label %91
86: ; preds = %70
%87 = trunc i64 %71 to i32
%88 = load i32, ptr @stderr, align 4, !tbaa !9
%89 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %88, ptr noundef nonnull @.str.2, i32 noundef %87, i32 noundef %84, i32 noundef %84) #5
%90 = tail call i32 @exit(i32 noundef 1) #6
unreachable
91: ; preds = %70
%92 = mul nsw i32 %80, 255
%93 = sitofp i32 %92 to double
%94 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !5
%95 = getelementptr inbounds i32, ptr %94, i64 %71
store i32 %84, ptr %95, align 4, !tbaa !9
%96 = fsub double %93, %76
%97 = fmul double %96, 3.200000e+01
%98 = fptosi double %97 to i32
%99 = tail call i32 @nearbyint(i32 noundef %98) #5
%100 = icmp ugt i32 %99, 255
br i1 %100, label %101, label %106
101: ; preds = %91
%102 = trunc i64 %71 to i32
%103 = load i32, ptr @stderr, align 4, !tbaa !9
%104 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %103, ptr noundef nonnull @.str.3, i32 noundef %102, i32 noundef %99, i32 noundef %99) #5
%105 = tail call i32 @exit(i32 noundef 1) #6
unreachable
106: ; preds = %91
%107 = load ptr, ptr @png_sRGB_delta, align 8, !tbaa !5
%108 = getelementptr inbounds i32, ptr %107, i64 %71
store i32 %99, ptr %108, align 4, !tbaa !9
%109 = icmp eq i64 %77, 512
br i1 %109, label %110, label %70, !llvm.loop !13
110: ; preds = %106, %110
%111 = phi i32 [ %121, %110 ], [ 0, %106 ]
%112 = phi i32 [ %120, %110 ], [ 0, %106 ]
%113 = mul nuw nsw i32 %111, 255
%114 = tail call i32 @sRGB(i32 noundef %113) #5
%115 = mul nsw i32 %114, 255
%116 = tail call i32 @nearbyint(i32 noundef %115) #5
%117 = tail call i32 @PNG_sRGB_FROM_LINEAR(i32 noundef %113) #5
%118 = icmp ne i32 %117, %116
%119 = zext i1 %118 to i32
%120 = add i32 %112, %119
%121 = add nuw nsw i32 %111, 1
%122 = icmp eq i32 %121, 65536
br i1 %122, label %123, label %110, !llvm.loop !14
123: ; preds = %110
br i1 %55, label %53, label %124
124: ; preds = %123
br i1 %47, label %41, label %125
125: ; preds = %124
br i1 %33, label %126, label %128
126: ; preds = %125
%127 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.4, i32 noundef %54, i32 noundef %120, i32 noundef %42)
br label %26
128: ; preds = %125
%129 = icmp ult i32 %120, %27
br i1 %129, label %130, label %132
130: ; preds = %128
%131 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.5, double noundef %69, i32 noundef %27, i32 noundef %120)
br label %19
132: ; preds = %128
%133 = fcmp olt double %69, %23
%134 = icmp ult i32 %120, %54
%135 = select i1 %133, i1 %134, i1 false
br i1 %135, label %136, label %138
136: ; preds = %132
%137 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.6, double noundef %69, i32 noundef %54, i32 noundef %120)
br label %48
138: ; preds = %132
%139 = fcmp ogt double %69, %23
%140 = icmp ult i32 %120, %42
%141 = select i1 %139, i1 %140, i1 false
br i1 %141, label %142, label %144
142: ; preds = %138
%143 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.7, double noundef %69, i32 noundef %42, i32 noundef %120)
br label %34
144: ; preds = %138
%145 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.8, double noundef %23, i32 noundef %27)
%146 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !5
%147 = load ptr, ptr @png_sRGB_delta, align 8, !tbaa !5
br label %148
148: ; preds = %144, %248
%149 = phi ptr [ %147, %144 ], [ %249, %248 ]
%150 = phi ptr [ %146, %144 ], [ %250, %248 ]
%151 = phi i64 [ 0, %144 ], [ %159, %248 ]
%152 = phi i32 [ 128, %144 ], [ %252, %248 ]
%153 = phi i32 [ undef, %144 ], [ %169, %248 ]
%154 = lshr exact i64 %151, 7
%155 = getelementptr inbounds i32, ptr %150, i64 %154
%156 = load i32, ptr %155, align 4, !tbaa !9
%157 = getelementptr inbounds i32, ptr %149, i64 %154
%158 = load i32, ptr %157, align 4, !tbaa !9
%159 = add nuw nsw i64 %151, 128
%160 = trunc i64 %151 to i32
br label %161
161: ; preds = %226, %148
%162 = phi ptr [ %149, %148 ], [ %234, %226 ]
%163 = phi ptr [ %150, %148 ], [ %233, %226 ]
%164 = phi i32 [ %156, %148 ], [ %227, %226 ]
%165 = phi i32 [ %156, %148 ], [ %228, %226 ]
%166 = phi i32 [ %158, %148 ], [ %229, %226 ]
%167 = phi i32 [ %158, %148 ], [ %230, %226 ]
%168 = phi i32 [ 0, %148 ], [ %231, %226 ]
%169 = phi i32 [ %153, %148 ], [ %232, %226 ]
%170 = getelementptr inbounds i32, ptr %163, i64 %154
store i32 %165, ptr %170, align 4, !tbaa !9
%171 = getelementptr inbounds i32, ptr %162, i64 %154
store i32 %167, ptr %171, align 4, !tbaa !9
br label %172
172: ; preds = %161, %172
%173 = phi i32 [ %160, %161 ], [ %183, %172 ]
%174 = phi i32 [ 0, %161 ], [ %182, %172 ]
%175 = mul nuw nsw i32 %173, 255
%176 = tail call i32 @sRGB(i32 noundef %175) #5
%177 = mul nsw i32 %176, 255
%178 = tail call i32 @nearbyint(i32 noundef %177) #5
%179 = tail call i32 @PNG_sRGB_FROM_LINEAR(i32 noundef %175) #5
%180 = icmp ne i32 %179, %178
%181 = zext i1 %180 to i32
%182 = add i32 %174, %181
%183 = add nuw nsw i32 %173, 1
%184 = icmp eq i32 %183, %152
br i1 %184, label %185, label %172, !llvm.loop !15
185: ; preds = %172
%186 = icmp eq i32 %182, 0
br i1 %186, label %235, label %187
187: ; preds = %185
%188 = icmp eq i32 %168, 0
br i1 %188, label %189, label %191
189: ; preds = %187
%190 = add nsw i32 %165, 1
br label %226
191: ; preds = %187
%192 = icmp ult i32 %182, %168
%193 = icmp sgt i32 %165, %164
br i1 %192, label %194, label %213
194: ; preds = %191
br i1 %193, label %195, label %197
195: ; preds = %194
%196 = add nsw i32 %165, 1
br label %226
197: ; preds = %194
%198 = icmp slt i32 %165, %164
br i1 %198, label %199, label %201
199: ; preds = %197
%200 = add nsw i32 %165, -1
br label %226
201: ; preds = %197
%202 = icmp sgt i32 %167, %166
br i1 %202, label %203, label %205
203: ; preds = %201
%204 = add nsw i32 %167, 1
br label %226
205: ; preds = %201
%206 = icmp slt i32 %167, %166
br i1 %206, label %207, label %209
207: ; preds = %205
%208 = add nsw i32 %167, -1
br label %226
209: ; preds = %205
%210 = load i32, ptr @stderr, align 4, !tbaa !9
%211 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %210, ptr noundef nonnull @.str.9) #5
%212 = tail call i32 @exit(i32 noundef 1) #6
unreachable
213: ; preds = %191
br i1 %193, label %214, label %216
214: ; preds = %213
%215 = add nsw i32 %164, -1
br label %226
216: ; preds = %213
%217 = icmp slt i32 %165, %164
br i1 %217, label %218, label %220
218: ; preds = %216
%219 = add nsw i32 %167, 1
br label %226
220: ; preds = %216
%221 = icmp sgt i32 %167, %166
br i1 %221, label %222, label %224
222: ; preds = %220
%223 = add nsw i32 %166, -1
br label %226
224: ; preds = %220
%225 = icmp slt i32 %167, %166
br i1 %225, label %235, label %226
226: ; preds = %195, %203, %207, %199, %218, %224, %222, %214, %189
%227 = phi i32 [ %164, %189 ], [ %164, %214 ], [ %164, %218 ], [ %164, %222 ], [ %164, %224 ], [ %165, %195 ], [ %165, %199 ], [ %164, %203 ], [ %164, %207 ]
%228 = phi i32 [ %190, %189 ], [ %215, %214 ], [ %164, %218 ], [ %165, %222 ], [ %165, %224 ], [ %196, %195 ], [ %200, %199 ], [ %165, %203 ], [ %165, %207 ]
%229 = phi i32 [ %166, %189 ], [ %166, %214 ], [ %166, %218 ], [ %166, %222 ], [ %166, %224 ], [ %166, %195 ], [ %166, %199 ], [ %167, %203 ], [ %167, %207 ]
%230 = phi i32 [ %167, %189 ], [ %167, %214 ], [ %219, %218 ], [ %223, %222 ], [ %167, %224 ], [ %167, %195 ], [ %167, %199 ], [ %204, %203 ], [ %208, %207 ]
%231 = phi i32 [ %182, %189 ], [ %168, %214 ], [ %168, %218 ], [ %168, %222 ], [ %168, %224 ], [ %182, %195 ], [ %182, %199 ], [ %182, %203 ], [ %182, %207 ]
%232 = phi i32 [ %182, %189 ], [ %169, %214 ], [ %169, %218 ], [ %169, %222 ], [ %169, %224 ], [ %169, %195 ], [ %169, %199 ], [ %169, %203 ], [ %169, %207 ]
%233 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !5
%234 = load ptr, ptr @png_sRGB_delta, align 8, !tbaa !5
br label %161
235: ; preds = %224, %185
%236 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !5
%237 = getelementptr inbounds i32, ptr %236, i64 %154
store i32 %164, ptr %237, align 4, !tbaa !9
%238 = load ptr, ptr @png_sRGB_delta, align 8, !tbaa !5
%239 = getelementptr inbounds i32, ptr %238, i64 %154
store i32 %166, ptr %239, align 4, !tbaa !9
%240 = icmp eq i32 %164, %156
%241 = icmp eq i32 %166, %158
%242 = select i1 %240, i1 %241, i1 false
br i1 %242, label %248, label %243
243: ; preds = %235
%244 = trunc i64 %154 to i32
%245 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.10, i32 noundef %244, i32 noundef %156, i32 noundef %158, i32 noundef %164, i32 noundef %166, i32 noundef %169, i32 noundef %168)
%246 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !5
%247 = load ptr, ptr @png_sRGB_delta, align 8, !tbaa !5
br label %248
248: ; preds = %235, %243
%249 = phi ptr [ %238, %235 ], [ %247, %243 ]
%250 = phi ptr [ %236, %235 ], [ %246, %243 ]
%251 = icmp ult i64 %151, 65408
%252 = add nuw nsw i32 %152, 128
br i1 %251, label %148, label %253, !llvm.loop !16
253: ; preds = %248, %289
%254 = phi i32 [ %293, %289 ], [ 0, %248 ]
%255 = phi double [ %292, %289 ], [ -4.999000e-01, %248 ]
%256 = phi double [ %291, %289 ], [ 4.999000e-01, %248 ]
%257 = phi i32 [ %290, %289 ], [ 0, %248 ]
%258 = tail call i32 @sRGB(i32 noundef %254) #5
%259 = mul nsw i32 %258, 255
%260 = tail call i32 @nearbyint(i32 noundef %259) #5
%261 = tail call i32 @PNG_sRGB_FROM_LINEAR(i32 noundef %254) #5
%262 = icmp eq i32 %261, %260
br i1 %262, label %289, label %263
263: ; preds = %253
%264 = tail call i32 @sRGB(i32 noundef %254) #5
%265 = mul nsw i32 %264, 255
%266 = sub i32 %265, %261
%267 = uitofp i32 %266 to double
%268 = fadd double %256, 1.000000e-03
%269 = fcmp olt double %268, %267
%270 = fadd double %255, -1.000000e-03
%271 = fcmp ogt double %270, %267
%272 = select i1 %269, i1 true, i1 %271
br i1 %272, label %273, label %283
273: ; preds = %263
%274 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !5
%275 = lshr i32 %254, 15
%276 = zext nneg i32 %275 to i64
%277 = getelementptr inbounds i32, ptr %274, i64 %276
%278 = load i32, ptr %277, align 4, !tbaa !9
%279 = load ptr, ptr @png_sRGB_delta, align 8, !tbaa !5
%280 = getelementptr inbounds i32, ptr %279, i64 %276
%281 = load i32, ptr %280, align 4, !tbaa !9
%282 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.11, i32 noundef %254, i32 noundef %260, i32 noundef %261, i32 noundef %278, i32 noundef %281, double noundef %267)
br label %283
283: ; preds = %263, %273
%284 = add i32 %257, 1
%285 = fcmp olt double %256, %267
br i1 %285, label %289, label %286
286: ; preds = %283
%287 = fcmp ogt double %255, %267
br i1 %287, label %288, label %289
288: ; preds = %286
br label %289
289: ; preds = %288, %286, %283, %253
%290 = phi i32 [ %257, %253 ], [ %284, %283 ], [ %284, %286 ], [ %284, %288 ]
%291 = phi double [ %256, %253 ], [ %267, %283 ], [ %256, %286 ], [ %256, %288 ]
%292 = phi double [ %255, %253 ], [ %255, %283 ], [ %255, %286 ], [ %267, %288 ]
%293 = add i32 %254, 1
%294 = load i32, ptr @max_input, align 4, !tbaa !9
%295 = icmp ugt i32 %293, %294
br i1 %295, label %296, label %253, !llvm.loop !17
296: ; preds = %289, %333
%297 = phi i32 [ %337, %333 ], [ 0, %289 ]
%298 = phi double [ %336, %333 ], [ 0.000000e+00, %289 ]
%299 = phi double [ %335, %333 ], [ 0.000000e+00, %289 ]
%300 = phi i32 [ %334, %333 ], [ 0, %289 ]
%301 = mul nuw nsw i32 %297, 255
%302 = tail call i32 @sRGB(i32 noundef %301) #5
%303 = mul nsw i32 %302, 255
%304 = tail call i32 @nearbyint(i32 noundef %303) #5
%305 = tail call i32 @PNG_sRGB_FROM_LINEAR(i32 noundef %301) #5
%306 = icmp eq i32 %305, %304
br i1 %306, label %333, label %307
307: ; preds = %296
%308 = tail call i32 @sRGB(i32 noundef %301) #5
%309 = mul nsw i32 %308, 255
%310 = sub i32 %309, %305
%311 = uitofp i32 %310 to double
%312 = add i32 %300, 1
%313 = fcmp olt double %299, %311
br i1 %313, label %317, label %314
314: ; preds = %307
%315 = fcmp ogt double %298, %311
br i1 %315, label %316, label %317
316: ; preds = %314
br label %317
317: ; preds = %307, %314, %316
%318 = phi double [ %299, %316 ], [ %299, %314 ], [ %311, %307 ]
%319 = phi double [ %311, %316 ], [ %298, %314 ], [ %298, %307 ]
%320 = sub i32 %305, %304
%321 = tail call i32 @llvm.abs.i32(i32 %320, i1 true)
%322 = icmp ugt i32 %321, 1
br i1 %322, label %323, label %333
323: ; preds = %317
%324 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !5
%325 = lshr i32 %301, 15
%326 = zext nneg i32 %325 to i64
%327 = getelementptr inbounds i32, ptr %324, i64 %326
%328 = load i32, ptr %327, align 4, !tbaa !9
%329 = load ptr, ptr @png_sRGB_delta, align 8, !tbaa !5
%330 = getelementptr inbounds i32, ptr %329, i64 %326
%331 = load i32, ptr %330, align 4, !tbaa !9
%332 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.12, i32 noundef %297, i32 noundef %304, i32 noundef %305, i32 noundef %328, i32 noundef %331, double noundef %311)
br label %333
333: ; preds = %317, %323, %296
%334 = phi i32 [ %300, %296 ], [ %312, %323 ], [ %312, %317 ]
%335 = phi double [ %299, %296 ], [ %318, %323 ], [ %318, %317 ]
%336 = phi double [ %298, %296 ], [ %319, %323 ], [ %319, %317 ]
%337 = add nuw nsw i32 %297, 1
%338 = icmp eq i32 %337, 65536
br i1 %338, label %339, label %296, !llvm.loop !18
339: ; preds = %333, %366
%340 = phi i64 [ %367, %366 ], [ 0, %333 ]
%341 = load ptr, ptr @png_sRGB_table, align 8, !tbaa !5
%342 = getelementptr inbounds i32, ptr %341, i64 %340
%343 = load i32, ptr %342, align 4, !tbaa !9
%344 = mul nsw i32 %343, 255
%345 = tail call i32 @sRGB(i32 noundef %344) #5
%346 = mul nsw i32 %345, 255
%347 = tail call i32 @nearbyint(i32 noundef %346) #5
%348 = tail call i32 @PNG_sRGB_FROM_LINEAR(i32 noundef %344) #5
%349 = zext i32 %347 to i64
%350 = icmp eq i64 %340, %349
br i1 %350, label %356, label %351
351: ; preds = %339
%352 = trunc i64 %340 to i32
%353 = load i32, ptr @stderr, align 4, !tbaa !9
%354 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %353, ptr noundef nonnull @.str.13, i32 noundef %352, i32 noundef %347) #5
%355 = tail call i32 @exit(i32 noundef 1) #6
unreachable
356: ; preds = %339
%357 = zext i32 %348 to i64
%358 = icmp eq i64 %340, %357
br i1 %358, label %366, label %359
359: ; preds = %356
%360 = trunc i64 %340 to i32
%361 = tail call double @finvsRGB(i32 noundef %360) #5
%362 = fmul double %361, 2.550000e+02
%363 = fptosi double %362 to i32
%364 = tail call double @fsRGB(i32 noundef %363) #5
%365 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.14, i32 noundef %360, double noundef %361, i32 noundef %348, double noundef %364)
br label %366
366: ; preds = %359, %356
%367 = add nuw nsw i64 %340, 1
%368 = icmp eq i64 %367, 256
br i1 %368, label %369, label %339, !llvm.loop !19
369: ; preds = %366
%370 = uitofp i32 %290 to double
%371 = fmul double %370, 1.000000e+02
%372 = load i32, ptr @max_input, align 4, !tbaa !9
%373 = uitofp i32 %372 to double
%374 = fdiv double %371, %373
%375 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.15, double noundef %292, double noundef %291, i32 noundef %290, double noundef %374)
%376 = uitofp i32 %334 to double
%377 = fmul double %376, 1.000000e+02
%378 = fdiv double %377, 6.553500e+04
%379 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.16, double noundef %336, double noundef %335, i32 noundef %334, double noundef %378)
br i1 %10, label %380, label %462
380: ; preds = %369
%381 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.17)
br label %382
382: ; preds = %380, %400
%383 = phi i64 [ 0, %380 ], [ %388, %400 ]
%384 = and i64 %383, 4294967295
br label %385
385: ; preds = %382, %385
%386 = phi i64 [ %384, %382 ], [ %388, %385 ]
%387 = load ptr, ptr @png_sRGB_table, align 8, !tbaa !5
%388 = add nuw nsw i64 %386, 1
%389 = getelementptr inbounds i32, ptr %387, i64 %386
%390 = load i32, ptr %389, align 4, !tbaa !9
%391 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %390)
%392 = and i64 %388, 7
%393 = icmp ne i64 %392, 0
%394 = icmp ult i64 %386, 254
%395 = and i1 %394, %393
br i1 %395, label %385, label %396, !llvm.loop !20
396: ; preds = %385
%397 = trunc i64 %386 to i32
br i1 %394, label %398, label %400
398: ; preds = %396
%399 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.19)
br label %400
400: ; preds = %398, %396
%401 = icmp ult i32 %397, 254
br i1 %401, label %382, label %402, !llvm.loop !21
402: ; preds = %400
%403 = load ptr, ptr @png_sRGB_table, align 8, !tbaa !5
%404 = and i64 %388, 4294967295
%405 = getelementptr inbounds i32, ptr %403, i64 %404
%406 = load i32, ptr %405, align 4, !tbaa !9
%407 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.20, i32 noundef %406)
%408 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.21)
br label %409
409: ; preds = %402, %427
%410 = phi i64 [ 0, %402 ], [ %415, %427 ]
%411 = and i64 %410, 4294967295
br label %412
412: ; preds = %409, %412
%413 = phi i64 [ %411, %409 ], [ %415, %412 ]
%414 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !5
%415 = add nuw nsw i64 %413, 1
%416 = getelementptr inbounds i32, ptr %414, i64 %413
%417 = load i32, ptr %416, align 4, !tbaa !9
%418 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %417)
%419 = and i64 %415, 7
%420 = icmp ne i64 %419, 0
%421 = icmp ult i64 %413, 510
%422 = and i1 %421, %420
br i1 %422, label %412, label %423, !llvm.loop !22
423: ; preds = %412
%424 = trunc i64 %413 to i32
br i1 %421, label %425, label %427
425: ; preds = %423
%426 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.19)
br label %427
427: ; preds = %425, %423
%428 = icmp ult i32 %424, 510
br i1 %428, label %409, label %429, !llvm.loop !23
429: ; preds = %427
%430 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !5
%431 = and i64 %415, 4294967295
%432 = getelementptr inbounds i32, ptr %430, i64 %431
%433 = load i32, ptr %432, align 4, !tbaa !9
%434 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.20, i32 noundef %433)
%435 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.22)
br label %436
436: ; preds = %429, %454
%437 = phi i64 [ 0, %429 ], [ %442, %454 ]
%438 = and i64 %437, 4294967295
br label %439
439: ; preds = %436, %439
%440 = phi i64 [ %438, %436 ], [ %442, %439 ]
%441 = load ptr, ptr @png_sRGB_delta, align 8, !tbaa !5
%442 = add nuw nsw i64 %440, 1
%443 = getelementptr inbounds i32, ptr %441, i64 %440
%444 = load i32, ptr %443, align 4, !tbaa !9
%445 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %444)
%446 = and i64 %442, 15
%447 = icmp ne i64 %446, 0
%448 = icmp ult i64 %440, 510
%449 = and i1 %448, %447
br i1 %449, label %439, label %450, !llvm.loop !24
450: ; preds = %439
%451 = trunc i64 %440 to i32
br i1 %448, label %452, label %454
452: ; preds = %450
%453 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.19)
br label %454
454: ; preds = %452, %450
%455 = icmp ult i32 %451, 510
br i1 %455, label %436, label %456, !llvm.loop !25
456: ; preds = %454
%457 = load ptr, ptr @png_sRGB_delta, align 8, !tbaa !5
%458 = and i64 %442, 4294967295
%459 = getelementptr inbounds i32, ptr %457, i64 %458
%460 = load i32, ptr %459, align 4, !tbaa !9
%461 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.20, i32 noundef %460)
br label %462
462: ; preds = %456, %369
ret i32 0
}
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @invsRGB(i32 noundef) local_unnamed_addr #1
declare i32 @fprintf(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
declare i32 @sRGB(i32 noundef) local_unnamed_addr #1
declare i32 @nearbyint(i32 noundef) local_unnamed_addr #1
declare i32 @PNG_sRGB_FROM_LINEAR(i32 noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3
declare double @finvsRGB(i32 noundef) local_unnamed_addr #1
declare double @fsRGB(i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #4
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}
!16 = distinct !{!16, !12}
!17 = distinct !{!17, !12}
!18 = distinct !{!18, !12}
!19 = distinct !{!19, !12}
!20 = distinct !{!20, !12}
!21 = distinct !{!21, !12}
!22 = distinct !{!22, !12}
!23 = distinct !{!23, !12}
!24 = distinct !{!24, !12}
!25 = distinct !{!25, !12}
| ; ModuleID = 'AnghaBench/Provenance/Cores/Mupen64Plus/png/contrib/tools/extr_makesRGB.c_main.c'
source_filename = "AnghaBench/Provenance/Cores/Mupen64Plus/png/contrib/tools/extr_makesRGB.c_main.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [7 x i8] c"--test\00", align 1
@png_sRGB_table = common local_unnamed_addr global ptr null, align 8
@stderr = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [29 x i8] c"not reached: %u .. %u .. %u\0A\00", align 1
@.str.2 = private unnamed_addr constant [34 x i8] c"table[%d][0]: overflow %08x (%d)\0A\00", align 1
@png_sRGB_base = common local_unnamed_addr global ptr null, align 8
@.str.3 = private unnamed_addr constant [34 x i8] c"table[%d][1]: overflow %08x (%d)\0A\00", align 1
@png_sRGB_delta = common local_unnamed_addr global ptr null, align 8
@.str.4 = private unnamed_addr constant [44 x i8] c"/* initial error counts: %u .. %u .. %u */\0A\00", align 1
@.str.5 = private unnamed_addr constant [35 x i8] c"/* adjust (mid ): %f: %u -> %u */\0A\00", align 1
@.str.6 = private unnamed_addr constant [35 x i8] c"/* adjust (low ): %f: %u -> %u */\0A\00", align 1
@.str.7 = private unnamed_addr constant [35 x i8] c"/* adjust (high): %f: %u -> %u */\0A\00", align 1
@.str.8 = private unnamed_addr constant [22 x i8] c"/* adjust: %f: %u */\0A\00", align 1
@.str.9 = private unnamed_addr constant [22 x i8] c"makesRGB: impossible\0A\00", align 1
@.str.10 = private unnamed_addr constant [52 x i8] c"/* table[%u]={%u,%u} -> {%u,%u} %u -> %u errors */\0A\00", align 1
@max_input = common local_unnamed_addr global i32 0, align 4
@.str.11 = private unnamed_addr constant [62 x i8] c"/* 0x%08x: exact: %3d, got: %3d [tables: %08x, %08x] (%f) */\0A\00", align 1
@.str.12 = private unnamed_addr constant [62 x i8] c"/* 0x%04x: exact: %3d, got: %3d [tables: %08x, %08x] (%f) */\0A\00", align 1
@.str.13 = private unnamed_addr constant [32 x i8] c"8-bit rounding error: %d -> %d\0A\00", align 1
@.str.14 = private unnamed_addr constant [49 x i8] c"/* 8-bit roundtrip error: %d -> %f -> %d(%f) */\0A\00", align 1
@.str.15 = private unnamed_addr constant [53 x i8] c"/* error: %g - %g, %u (%g%%) of readings inexact */\0A\00", align 1
@.str.16 = private unnamed_addr constant [60 x i8] c"/* 16-bit error: %g - %g, %u (%g%%) of readings inexact */\0A\00", align 1
@.str.17 = private unnamed_addr constant [50 x i8] c"PNG_CONST png_uint_16 png_sRGB_table[256] =\0A{\0A \00", align 1
@.str.18 = private unnamed_addr constant [4 x i8] c"%d,\00", align 1
@.str.19 = private unnamed_addr constant [5 x i8] c"\0A \00", align 1
@.str.20 = private unnamed_addr constant [8 x i8] c"%d\0A};\0A\0A\00", align 1
@.str.21 = private unnamed_addr constant [49 x i8] c"PNG_CONST png_uint_16 png_sRGB_base[512] =\0A{\0A \00", align 1
@.str.22 = private unnamed_addr constant [47 x i8] c"PNG_CONST png_byte png_sRGB_delta[512] =\0A{\0A \00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @main(i32 noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %9
4: ; preds = %2
%5 = getelementptr inbounds i8, ptr %1, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = tail call i64 @strcmp(ptr noundef nonnull @.str, ptr noundef %6) #5
%8 = icmp ne i64 %7, 0
br label %9
9: ; preds = %4, %2
%10 = phi i1 [ %8, %4 ], [ true, %2 ]
br label %11
11: ; preds = %9, %11
%12 = phi i64 [ 0, %9 ], [ %17, %11 ]
%13 = trunc nuw nsw i64 %12 to i32
%14 = tail call i32 @invsRGB(i32 noundef %13) #5
%15 = load ptr, ptr @png_sRGB_table, align 8, !tbaa !6
%16 = getelementptr inbounds i32, ptr %15, i64 %12
store i32 %14, ptr %16, align 4, !tbaa !10
%17 = add nuw nsw i64 %12, 1
%18 = icmp eq i64 %17, 256
br i1 %18, label %19, label %11, !llvm.loop !12
19: ; preds = %11, %128
%20 = phi i32 [ %118, %128 ], [ 0, %11 ]
%21 = phi i32 [ %42, %128 ], [ 0, %11 ]
%22 = phi i32 [ %54, %128 ], [ 0, %11 ]
%23 = phi double [ %69, %128 ], [ 5.000000e-01, %11 ]
%24 = phi double [ %37, %128 ], [ 6.000000e-01, %11 ]
%25 = phi double [ %50, %128 ], [ 4.000000e-01, %11 ]
br label %26
26: ; preds = %19, %124
%27 = phi i32 [ %118, %124 ], [ %20, %19 ]
%28 = phi i32 [ %42, %124 ], [ %21, %19 ]
%29 = phi i32 [ %54, %124 ], [ %22, %19 ]
%30 = phi double [ %37, %124 ], [ %24, %19 ]
%31 = phi double [ %50, %124 ], [ %25, %19 ]
%32 = icmp eq i32 %27, 0
%33 = icmp eq i32 %27, 0
br label %34
34: ; preds = %140, %26
%35 = phi i32 [ %118, %140 ], [ %28, %26 ]
%36 = phi i32 [ %54, %140 ], [ %29, %26 ]
%37 = phi double [ %69, %140 ], [ %30, %26 ]
%38 = phi double [ %50, %140 ], [ %31, %26 ]
%39 = fadd double %23, %37
%40 = fmul double %39, 5.000000e-01
br label %41
41: ; preds = %122, %34
%42 = phi i32 [ %35, %34 ], [ %118, %122 ]
%43 = phi i32 [ %36, %34 ], [ %54, %122 ]
%44 = phi double [ %38, %34 ], [ %50, %122 ]
%45 = icmp eq i32 %42, 0
%46 = icmp ult i32 %27, %42
%47 = icmp eq i32 %42, 0
br label %48
48: ; preds = %41, %134
%49 = phi i32 [ %43, %41 ], [ %118, %134 ]
%50 = phi double [ %44, %41 ], [ %69, %134 ]
%51 = fadd double %23, %50
%52 = fmul double %51, 5.000000e-01
br label %53
53: ; preds = %48, %121
%54 = phi i32 [ %118, %121 ], [ %49, %48 ]
%55 = icmp eq i32 %54, 0
%56 = select i1 %55, i1 true, i1 %45
%57 = select i1 %55, double %50, double %37
%58 = select i1 %56, i1 true, i1 %32
%59 = select i1 %56, double %57, double %23
%60 = select i1 %58, i1 true, i1 %46
%61 = select i1 %58, double %59, double %40
br i1 %60, label %68, label %62
62: ; preds = %53
%63 = icmp ult i32 %27, %54
br i1 %63, label %68, label %64
64: ; preds = %62
%65 = load i32, ptr @stderr, align 4, !tbaa !10
%66 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %65, ptr noundef nonnull @.str.1, i32 noundef %54, i32 noundef %27, i32 noundef %42) #5
%67 = tail call i32 @exit(i32 noundef 1) #6
unreachable
68: ; preds = %53, %62
%69 = phi double [ %61, %53 ], [ %52, %62 ]
br label %70
70: ; preds = %68, %104
%71 = phi i64 [ 0, %68 ], [ %77, %104 ]
%72 = trunc i64 %71 to i32
%73 = shl i32 %72, 15
%74 = tail call i32 @sRGB(i32 noundef %73) #5
%75 = mul nsw i32 %74, 255
%76 = sitofp i32 %75 to double
%77 = add nuw nsw i64 %71, 1
%78 = trunc i64 %77 to i32
%79 = shl i32 %78, 15
%80 = tail call i32 @sRGB(i32 noundef %79) #5
%81 = fadd double %69, %76
%82 = fmul double %81, 2.560000e+02
%83 = fptosi double %82 to i32
%84 = tail call i32 @nearbyint(i32 noundef %83) #5
%85 = icmp ugt i32 %84, 65535
br i1 %85, label %86, label %90
86: ; preds = %70
%87 = load i32, ptr @stderr, align 4, !tbaa !10
%88 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %87, ptr noundef nonnull @.str.2, i32 noundef %72, i32 noundef %84, i32 noundef %84) #5
%89 = tail call i32 @exit(i32 noundef 1) #6
unreachable
90: ; preds = %70
%91 = mul nsw i32 %80, 255
%92 = sitofp i32 %91 to double
%93 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !6
%94 = getelementptr inbounds i32, ptr %93, i64 %71
store i32 %84, ptr %94, align 4, !tbaa !10
%95 = fsub double %92, %76
%96 = fmul double %95, 3.200000e+01
%97 = fptosi double %96 to i32
%98 = tail call i32 @nearbyint(i32 noundef %97) #5
%99 = icmp ugt i32 %98, 255
br i1 %99, label %100, label %104
100: ; preds = %90
%101 = load i32, ptr @stderr, align 4, !tbaa !10
%102 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %101, ptr noundef nonnull @.str.3, i32 noundef %72, i32 noundef %98, i32 noundef %98) #5
%103 = tail call i32 @exit(i32 noundef 1) #6
unreachable
104: ; preds = %90
%105 = load ptr, ptr @png_sRGB_delta, align 8, !tbaa !6
%106 = getelementptr inbounds i32, ptr %105, i64 %71
store i32 %98, ptr %106, align 4, !tbaa !10
%107 = icmp eq i64 %77, 512
br i1 %107, label %108, label %70, !llvm.loop !14
108: ; preds = %104, %108
%109 = phi i32 [ %119, %108 ], [ 0, %104 ]
%110 = phi i32 [ %118, %108 ], [ 0, %104 ]
%111 = mul nuw nsw i32 %109, 255
%112 = tail call i32 @sRGB(i32 noundef %111) #5
%113 = mul nsw i32 %112, 255
%114 = tail call i32 @nearbyint(i32 noundef %113) #5
%115 = tail call i32 @PNG_sRGB_FROM_LINEAR(i32 noundef %111) #5
%116 = icmp ne i32 %115, %114
%117 = zext i1 %116 to i32
%118 = add i32 %110, %117
%119 = add nuw nsw i32 %109, 1
%120 = icmp eq i32 %119, 65536
br i1 %120, label %121, label %108, !llvm.loop !15
121: ; preds = %108
br i1 %55, label %53, label %122
122: ; preds = %121
br i1 %47, label %41, label %123
123: ; preds = %122
br i1 %33, label %124, label %126
124: ; preds = %123
%125 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.4, i32 noundef %54, i32 noundef %118, i32 noundef %42)
br label %26
126: ; preds = %123
%127 = icmp ult i32 %118, %27
br i1 %127, label %128, label %130
128: ; preds = %126
%129 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.5, double noundef %69, i32 noundef %27, i32 noundef %118)
br label %19
130: ; preds = %126
%131 = fcmp olt double %69, %23
%132 = icmp ult i32 %118, %54
%133 = select i1 %131, i1 %132, i1 false
br i1 %133, label %134, label %136
134: ; preds = %130
%135 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.6, double noundef %69, i32 noundef %54, i32 noundef %118)
br label %48
136: ; preds = %130
%137 = fcmp ogt double %69, %23
%138 = icmp ult i32 %118, %42
%139 = select i1 %137, i1 %138, i1 false
br i1 %139, label %140, label %142
140: ; preds = %136
%141 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.7, double noundef %69, i32 noundef %42, i32 noundef %118)
br label %34
142: ; preds = %136
%143 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.8, double noundef %23, i32 noundef %27)
%144 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !6
%145 = load ptr, ptr @png_sRGB_delta, align 8, !tbaa !6
br label %146
146: ; preds = %142, %246
%147 = phi ptr [ %145, %142 ], [ %247, %246 ]
%148 = phi ptr [ %144, %142 ], [ %248, %246 ]
%149 = phi i64 [ 0, %142 ], [ %157, %246 ]
%150 = phi i32 [ 128, %142 ], [ %250, %246 ]
%151 = phi i32 [ undef, %142 ], [ %167, %246 ]
%152 = lshr exact i64 %149, 7
%153 = getelementptr inbounds i32, ptr %148, i64 %152
%154 = load i32, ptr %153, align 4, !tbaa !10
%155 = getelementptr inbounds i32, ptr %147, i64 %152
%156 = load i32, ptr %155, align 4, !tbaa !10
%157 = add nuw nsw i64 %149, 128
%158 = trunc nuw nsw i64 %149 to i32
br label %159
159: ; preds = %224, %146
%160 = phi ptr [ %147, %146 ], [ %232, %224 ]
%161 = phi ptr [ %148, %146 ], [ %231, %224 ]
%162 = phi i32 [ %154, %146 ], [ %225, %224 ]
%163 = phi i32 [ %154, %146 ], [ %226, %224 ]
%164 = phi i32 [ %156, %146 ], [ %227, %224 ]
%165 = phi i32 [ %156, %146 ], [ %228, %224 ]
%166 = phi i32 [ 0, %146 ], [ %229, %224 ]
%167 = phi i32 [ %151, %146 ], [ %230, %224 ]
%168 = getelementptr inbounds i32, ptr %161, i64 %152
store i32 %163, ptr %168, align 4, !tbaa !10
%169 = getelementptr inbounds i32, ptr %160, i64 %152
store i32 %165, ptr %169, align 4, !tbaa !10
br label %170
170: ; preds = %159, %170
%171 = phi i32 [ %158, %159 ], [ %181, %170 ]
%172 = phi i32 [ 0, %159 ], [ %180, %170 ]
%173 = mul nuw nsw i32 %171, 255
%174 = tail call i32 @sRGB(i32 noundef %173) #5
%175 = mul nsw i32 %174, 255
%176 = tail call i32 @nearbyint(i32 noundef %175) #5
%177 = tail call i32 @PNG_sRGB_FROM_LINEAR(i32 noundef %173) #5
%178 = icmp ne i32 %177, %176
%179 = zext i1 %178 to i32
%180 = add i32 %172, %179
%181 = add nuw nsw i32 %171, 1
%182 = icmp eq i32 %181, %150
br i1 %182, label %183, label %170, !llvm.loop !16
183: ; preds = %170
%184 = icmp eq i32 %180, 0
br i1 %184, label %233, label %185
185: ; preds = %183
%186 = icmp eq i32 %166, 0
br i1 %186, label %187, label %189
187: ; preds = %185
%188 = add nsw i32 %163, 1
br label %224
189: ; preds = %185
%190 = icmp ult i32 %180, %166
%191 = icmp sgt i32 %163, %162
br i1 %190, label %192, label %211
192: ; preds = %189
br i1 %191, label %193, label %195
193: ; preds = %192
%194 = add nsw i32 %163, 1
br label %224
195: ; preds = %192
%196 = icmp slt i32 %163, %162
br i1 %196, label %197, label %199
197: ; preds = %195
%198 = add nsw i32 %163, -1
br label %224
199: ; preds = %195
%200 = icmp sgt i32 %165, %164
br i1 %200, label %201, label %203
201: ; preds = %199
%202 = add nsw i32 %165, 1
br label %224
203: ; preds = %199
%204 = icmp slt i32 %165, %164
br i1 %204, label %205, label %207
205: ; preds = %203
%206 = add nsw i32 %165, -1
br label %224
207: ; preds = %203
%208 = load i32, ptr @stderr, align 4, !tbaa !10
%209 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %208, ptr noundef nonnull @.str.9) #5
%210 = tail call i32 @exit(i32 noundef 1) #6
unreachable
211: ; preds = %189
br i1 %191, label %212, label %214
212: ; preds = %211
%213 = add nsw i32 %162, -1
br label %224
214: ; preds = %211
%215 = icmp slt i32 %163, %162
br i1 %215, label %216, label %218
216: ; preds = %214
%217 = add nsw i32 %165, 1
br label %224
218: ; preds = %214
%219 = icmp sgt i32 %165, %164
br i1 %219, label %220, label %222
220: ; preds = %218
%221 = add nsw i32 %164, -1
br label %224
222: ; preds = %218
%223 = icmp slt i32 %165, %164
br i1 %223, label %233, label %224
224: ; preds = %193, %201, %205, %197, %216, %222, %220, %212, %187
%225 = phi i32 [ %162, %187 ], [ %162, %212 ], [ %162, %216 ], [ %162, %220 ], [ %162, %222 ], [ %163, %193 ], [ %163, %197 ], [ %162, %201 ], [ %162, %205 ]
%226 = phi i32 [ %188, %187 ], [ %213, %212 ], [ %162, %216 ], [ %163, %220 ], [ %163, %222 ], [ %194, %193 ], [ %198, %197 ], [ %163, %201 ], [ %163, %205 ]
%227 = phi i32 [ %164, %187 ], [ %164, %212 ], [ %164, %216 ], [ %164, %220 ], [ %164, %222 ], [ %164, %193 ], [ %164, %197 ], [ %165, %201 ], [ %165, %205 ]
%228 = phi i32 [ %165, %187 ], [ %165, %212 ], [ %217, %216 ], [ %221, %220 ], [ %165, %222 ], [ %165, %193 ], [ %165, %197 ], [ %202, %201 ], [ %206, %205 ]
%229 = phi i32 [ %180, %187 ], [ %166, %212 ], [ %166, %216 ], [ %166, %220 ], [ %166, %222 ], [ %180, %193 ], [ %180, %197 ], [ %180, %201 ], [ %180, %205 ]
%230 = phi i32 [ %180, %187 ], [ %167, %212 ], [ %167, %216 ], [ %167, %220 ], [ %167, %222 ], [ %167, %193 ], [ %167, %197 ], [ %167, %201 ], [ %167, %205 ]
%231 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !6
%232 = load ptr, ptr @png_sRGB_delta, align 8, !tbaa !6
br label %159
233: ; preds = %222, %183
%234 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !6
%235 = getelementptr inbounds i32, ptr %234, i64 %152
store i32 %162, ptr %235, align 4, !tbaa !10
%236 = load ptr, ptr @png_sRGB_delta, align 8, !tbaa !6
%237 = getelementptr inbounds i32, ptr %236, i64 %152
store i32 %164, ptr %237, align 4, !tbaa !10
%238 = icmp eq i32 %162, %154
%239 = icmp eq i32 %164, %156
%240 = select i1 %238, i1 %239, i1 false
br i1 %240, label %246, label %241
241: ; preds = %233
%242 = trunc nuw nsw i64 %152 to i32
%243 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.10, i32 noundef %242, i32 noundef %154, i32 noundef %156, i32 noundef %162, i32 noundef %164, i32 noundef %167, i32 noundef %166)
%244 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !6
%245 = load ptr, ptr @png_sRGB_delta, align 8, !tbaa !6
br label %246
246: ; preds = %233, %241
%247 = phi ptr [ %236, %233 ], [ %245, %241 ]
%248 = phi ptr [ %234, %233 ], [ %244, %241 ]
%249 = icmp ult i64 %149, 65408
%250 = add nuw nsw i32 %150, 128
br i1 %249, label %146, label %251, !llvm.loop !17
251: ; preds = %246, %287
%252 = phi i32 [ %291, %287 ], [ 0, %246 ]
%253 = phi double [ %290, %287 ], [ -4.999000e-01, %246 ]
%254 = phi double [ %289, %287 ], [ 4.999000e-01, %246 ]
%255 = phi i32 [ %288, %287 ], [ 0, %246 ]
%256 = tail call i32 @sRGB(i32 noundef %252) #5
%257 = mul nsw i32 %256, 255
%258 = tail call i32 @nearbyint(i32 noundef %257) #5
%259 = tail call i32 @PNG_sRGB_FROM_LINEAR(i32 noundef %252) #5
%260 = icmp eq i32 %259, %258
br i1 %260, label %287, label %261
261: ; preds = %251
%262 = tail call i32 @sRGB(i32 noundef %252) #5
%263 = mul nsw i32 %262, 255
%264 = sub i32 %263, %259
%265 = uitofp i32 %264 to double
%266 = fadd double %254, 1.000000e-03
%267 = fcmp olt double %266, %265
%268 = fadd double %253, -1.000000e-03
%269 = fcmp ogt double %268, %265
%270 = select i1 %267, i1 true, i1 %269
br i1 %270, label %271, label %281
271: ; preds = %261
%272 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !6
%273 = lshr i32 %252, 15
%274 = zext nneg i32 %273 to i64
%275 = getelementptr inbounds i32, ptr %272, i64 %274
%276 = load i32, ptr %275, align 4, !tbaa !10
%277 = load ptr, ptr @png_sRGB_delta, align 8, !tbaa !6
%278 = getelementptr inbounds i32, ptr %277, i64 %274
%279 = load i32, ptr %278, align 4, !tbaa !10
%280 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.11, i32 noundef %252, i32 noundef %258, i32 noundef %259, i32 noundef %276, i32 noundef %279, double noundef %265)
br label %281
281: ; preds = %261, %271
%282 = add i32 %255, 1
%283 = fcmp olt double %254, %265
br i1 %283, label %287, label %284
284: ; preds = %281
%285 = fcmp ogt double %253, %265
br i1 %285, label %286, label %287
286: ; preds = %284
br label %287
287: ; preds = %286, %284, %281, %251
%288 = phi i32 [ %255, %251 ], [ %282, %281 ], [ %282, %284 ], [ %282, %286 ]
%289 = phi double [ %254, %251 ], [ %265, %281 ], [ %254, %284 ], [ %254, %286 ]
%290 = phi double [ %253, %251 ], [ %253, %281 ], [ %253, %284 ], [ %265, %286 ]
%291 = add i32 %252, 1
%292 = load i32, ptr @max_input, align 4, !tbaa !10
%293 = icmp ugt i32 %291, %292
br i1 %293, label %294, label %251, !llvm.loop !18
294: ; preds = %287, %331
%295 = phi i32 [ %335, %331 ], [ 0, %287 ]
%296 = phi double [ %334, %331 ], [ 0.000000e+00, %287 ]
%297 = phi double [ %333, %331 ], [ 0.000000e+00, %287 ]
%298 = phi i32 [ %332, %331 ], [ 0, %287 ]
%299 = mul nuw nsw i32 %295, 255
%300 = tail call i32 @sRGB(i32 noundef %299) #5
%301 = mul nsw i32 %300, 255
%302 = tail call i32 @nearbyint(i32 noundef %301) #5
%303 = tail call i32 @PNG_sRGB_FROM_LINEAR(i32 noundef %299) #5
%304 = icmp eq i32 %303, %302
br i1 %304, label %331, label %305
305: ; preds = %294
%306 = tail call i32 @sRGB(i32 noundef %299) #5
%307 = mul nsw i32 %306, 255
%308 = sub i32 %307, %303
%309 = uitofp i32 %308 to double
%310 = add i32 %298, 1
%311 = fcmp olt double %297, %309
br i1 %311, label %315, label %312
312: ; preds = %305
%313 = fcmp ogt double %296, %309
br i1 %313, label %314, label %315
314: ; preds = %312
br label %315
315: ; preds = %305, %312, %314
%316 = phi double [ %297, %314 ], [ %297, %312 ], [ %309, %305 ]
%317 = phi double [ %309, %314 ], [ %296, %312 ], [ %296, %305 ]
%318 = sub i32 %303, %302
%319 = tail call i32 @llvm.abs.i32(i32 %318, i1 true)
%320 = icmp ugt i32 %319, 1
br i1 %320, label %321, label %331
321: ; preds = %315
%322 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !6
%323 = lshr i32 %299, 15
%324 = zext nneg i32 %323 to i64
%325 = getelementptr inbounds i32, ptr %322, i64 %324
%326 = load i32, ptr %325, align 4, !tbaa !10
%327 = load ptr, ptr @png_sRGB_delta, align 8, !tbaa !6
%328 = getelementptr inbounds i32, ptr %327, i64 %324
%329 = load i32, ptr %328, align 4, !tbaa !10
%330 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.12, i32 noundef %295, i32 noundef %302, i32 noundef %303, i32 noundef %326, i32 noundef %329, double noundef %309)
br label %331
331: ; preds = %315, %321, %294
%332 = phi i32 [ %298, %294 ], [ %310, %321 ], [ %310, %315 ]
%333 = phi double [ %297, %294 ], [ %316, %321 ], [ %316, %315 ]
%334 = phi double [ %296, %294 ], [ %317, %321 ], [ %317, %315 ]
%335 = add nuw nsw i32 %295, 1
%336 = icmp eq i32 %335, 65536
br i1 %336, label %337, label %294, !llvm.loop !19
337: ; preds = %331, %364
%338 = phi i64 [ %365, %364 ], [ 0, %331 ]
%339 = load ptr, ptr @png_sRGB_table, align 8, !tbaa !6
%340 = getelementptr inbounds i32, ptr %339, i64 %338
%341 = load i32, ptr %340, align 4, !tbaa !10
%342 = mul nsw i32 %341, 255
%343 = tail call i32 @sRGB(i32 noundef %342) #5
%344 = mul nsw i32 %343, 255
%345 = tail call i32 @nearbyint(i32 noundef %344) #5
%346 = tail call i32 @PNG_sRGB_FROM_LINEAR(i32 noundef %342) #5
%347 = zext i32 %345 to i64
%348 = icmp eq i64 %338, %347
br i1 %348, label %354, label %349
349: ; preds = %337
%350 = trunc nuw nsw i64 %338 to i32
%351 = load i32, ptr @stderr, align 4, !tbaa !10
%352 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %351, ptr noundef nonnull @.str.13, i32 noundef %350, i32 noundef %345) #5
%353 = tail call i32 @exit(i32 noundef 1) #6
unreachable
354: ; preds = %337
%355 = zext i32 %346 to i64
%356 = icmp eq i64 %338, %355
br i1 %356, label %364, label %357
357: ; preds = %354
%358 = trunc nuw nsw i64 %338 to i32
%359 = tail call double @finvsRGB(i32 noundef %358) #5
%360 = fmul double %359, 2.550000e+02
%361 = fptosi double %360 to i32
%362 = tail call double @fsRGB(i32 noundef %361) #5
%363 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.14, i32 noundef %358, double noundef %359, i32 noundef %346, double noundef %362)
br label %364
364: ; preds = %357, %354
%365 = add nuw nsw i64 %338, 1
%366 = icmp eq i64 %365, 256
br i1 %366, label %367, label %337, !llvm.loop !20
367: ; preds = %364
%368 = uitofp i32 %288 to double
%369 = fmul double %368, 1.000000e+02
%370 = load i32, ptr @max_input, align 4, !tbaa !10
%371 = uitofp i32 %370 to double
%372 = fdiv double %369, %371
%373 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.15, double noundef %290, double noundef %289, i32 noundef %288, double noundef %372)
%374 = uitofp i32 %332 to double
%375 = fmul double %374, 1.000000e+02
%376 = fdiv double %375, 6.553500e+04
%377 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.16, double noundef %334, double noundef %333, i32 noundef %332, double noundef %376)
br i1 %10, label %378, label %578
378: ; preds = %367, %458
%379 = phi ptr [ @.str.19, %458 ], [ @.str.17, %367 ]
%380 = phi i64 [ %459, %458 ], [ 0, %367 ]
%381 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) %379)
%382 = load ptr, ptr @png_sRGB_table, align 8, !tbaa !6
%383 = add nuw nsw i64 %380, 1
%384 = getelementptr inbounds i32, ptr %382, i64 %380
%385 = load i32, ptr %384, align 4, !tbaa !10
%386 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %385)
%387 = and i64 %383, 7
%388 = icmp ne i64 %387, 0
%389 = icmp ult i64 %380, 254
%390 = and i1 %389, %388
br i1 %390, label %391, label %458, !llvm.loop !21
391: ; preds = %378
%392 = load ptr, ptr @png_sRGB_table, align 8, !tbaa !6
%393 = add nuw nsw i64 %380, 2
%394 = getelementptr inbounds i32, ptr %392, i64 %383
%395 = load i32, ptr %394, align 4, !tbaa !10
%396 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %395)
%397 = and i64 %393, 7
%398 = icmp ne i64 %397, 0
%399 = icmp ult i64 %380, 253
%400 = and i1 %399, %398
br i1 %400, label %401, label %458, !llvm.loop !21
401: ; preds = %391
%402 = load ptr, ptr @png_sRGB_table, align 8, !tbaa !6
%403 = add nuw nsw i64 %380, 3
%404 = getelementptr inbounds i32, ptr %402, i64 %393
%405 = load i32, ptr %404, align 4, !tbaa !10
%406 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %405)
%407 = and i64 %403, 7
%408 = icmp ne i64 %407, 0
%409 = icmp ult i64 %380, 252
%410 = and i1 %409, %408
br i1 %410, label %411, label %458, !llvm.loop !21
411: ; preds = %401
%412 = load ptr, ptr @png_sRGB_table, align 8, !tbaa !6
%413 = add nuw nsw i64 %380, 4
%414 = getelementptr inbounds i32, ptr %412, i64 %403
%415 = load i32, ptr %414, align 4, !tbaa !10
%416 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %415)
%417 = and i64 %413, 7
%418 = icmp ne i64 %417, 0
%419 = icmp ult i64 %380, 251
%420 = and i1 %419, %418
br i1 %420, label %421, label %458, !llvm.loop !21
421: ; preds = %411
%422 = load ptr, ptr @png_sRGB_table, align 8, !tbaa !6
%423 = add nuw nsw i64 %380, 5
%424 = getelementptr inbounds i32, ptr %422, i64 %413
%425 = load i32, ptr %424, align 4, !tbaa !10
%426 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %425)
%427 = and i64 %423, 7
%428 = icmp ne i64 %427, 0
%429 = icmp ult i64 %380, 250
%430 = and i1 %429, %428
br i1 %430, label %431, label %458, !llvm.loop !21
431: ; preds = %421
%432 = load ptr, ptr @png_sRGB_table, align 8, !tbaa !6
%433 = add nuw nsw i64 %380, 6
%434 = getelementptr inbounds i32, ptr %432, i64 %423
%435 = load i32, ptr %434, align 4, !tbaa !10
%436 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %435)
%437 = and i64 %433, 7
%438 = icmp ne i64 %437, 0
%439 = icmp ult i64 %380, 249
%440 = and i1 %439, %438
br i1 %440, label %441, label %458, !llvm.loop !21
441: ; preds = %431
%442 = load ptr, ptr @png_sRGB_table, align 8, !tbaa !6
%443 = add nuw nsw i64 %380, 7
%444 = getelementptr inbounds i32, ptr %442, i64 %433
%445 = load i32, ptr %444, align 4, !tbaa !10
%446 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %445)
%447 = and i64 %443, 7
%448 = icmp ne i64 %447, 0
%449 = icmp ult i64 %380, 248
%450 = and i1 %449, %448
br i1 %450, label %451, label %458, !llvm.loop !21
451: ; preds = %441
%452 = load ptr, ptr @png_sRGB_table, align 8, !tbaa !6
%453 = add nuw nsw i64 %380, 8
%454 = getelementptr inbounds i32, ptr %452, i64 %443
%455 = load i32, ptr %454, align 4, !tbaa !10
%456 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %455)
%457 = icmp ult i64 %380, 247
br label %458
458: ; preds = %451, %441, %431, %421, %411, %401, %391, %378
%459 = phi i64 [ %383, %378 ], [ %393, %391 ], [ %403, %401 ], [ %413, %411 ], [ %423, %421 ], [ %433, %431 ], [ %443, %441 ], [ %453, %451 ]
%460 = phi i1 [ %389, %378 ], [ %399, %391 ], [ %409, %401 ], [ %419, %411 ], [ %429, %421 ], [ %439, %431 ], [ %449, %441 ], [ %457, %451 ]
br i1 %460, label %378, label %461, !llvm.loop !22
461: ; preds = %458
%462 = load ptr, ptr @png_sRGB_table, align 8, !tbaa !6
%463 = and i64 %459, 4294967295
%464 = getelementptr inbounds i32, ptr %462, i64 %463
%465 = load i32, ptr %464, align 4, !tbaa !10
%466 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.20, i32 noundef %465)
br label %467
467: ; preds = %547, %461
%468 = phi ptr [ @.str.21, %461 ], [ @.str.19, %547 ]
%469 = phi i64 [ 0, %461 ], [ %548, %547 ]
%470 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) %468)
%471 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !6
%472 = add nuw nsw i64 %469, 1
%473 = getelementptr inbounds i32, ptr %471, i64 %469
%474 = load i32, ptr %473, align 4, !tbaa !10
%475 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %474)
%476 = and i64 %472, 7
%477 = icmp ne i64 %476, 0
%478 = icmp ult i64 %469, 510
%479 = and i1 %478, %477
br i1 %479, label %480, label %547, !llvm.loop !23
480: ; preds = %467
%481 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !6
%482 = add nuw nsw i64 %469, 2
%483 = getelementptr inbounds i32, ptr %481, i64 %472
%484 = load i32, ptr %483, align 4, !tbaa !10
%485 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %484)
%486 = and i64 %482, 7
%487 = icmp ne i64 %486, 0
%488 = icmp ult i64 %469, 509
%489 = and i1 %488, %487
br i1 %489, label %490, label %547, !llvm.loop !23
490: ; preds = %480
%491 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !6
%492 = add nuw nsw i64 %469, 3
%493 = getelementptr inbounds i32, ptr %491, i64 %482
%494 = load i32, ptr %493, align 4, !tbaa !10
%495 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %494)
%496 = and i64 %492, 7
%497 = icmp ne i64 %496, 0
%498 = icmp ult i64 %469, 508
%499 = and i1 %498, %497
br i1 %499, label %500, label %547, !llvm.loop !23
500: ; preds = %490
%501 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !6
%502 = add nuw nsw i64 %469, 4
%503 = getelementptr inbounds i32, ptr %501, i64 %492
%504 = load i32, ptr %503, align 4, !tbaa !10
%505 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %504)
%506 = and i64 %502, 7
%507 = icmp ne i64 %506, 0
%508 = icmp ult i64 %469, 507
%509 = and i1 %508, %507
br i1 %509, label %510, label %547, !llvm.loop !23
510: ; preds = %500
%511 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !6
%512 = add nuw nsw i64 %469, 5
%513 = getelementptr inbounds i32, ptr %511, i64 %502
%514 = load i32, ptr %513, align 4, !tbaa !10
%515 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %514)
%516 = and i64 %512, 7
%517 = icmp ne i64 %516, 0
%518 = icmp ult i64 %469, 506
%519 = and i1 %518, %517
br i1 %519, label %520, label %547, !llvm.loop !23
520: ; preds = %510
%521 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !6
%522 = add nuw nsw i64 %469, 6
%523 = getelementptr inbounds i32, ptr %521, i64 %512
%524 = load i32, ptr %523, align 4, !tbaa !10
%525 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %524)
%526 = and i64 %522, 7
%527 = icmp ne i64 %526, 0
%528 = icmp ult i64 %469, 505
%529 = and i1 %528, %527
br i1 %529, label %530, label %547, !llvm.loop !23
530: ; preds = %520
%531 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !6
%532 = add nuw nsw i64 %469, 7
%533 = getelementptr inbounds i32, ptr %531, i64 %522
%534 = load i32, ptr %533, align 4, !tbaa !10
%535 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %534)
%536 = and i64 %532, 7
%537 = icmp ne i64 %536, 0
%538 = icmp ult i64 %469, 504
%539 = and i1 %538, %537
br i1 %539, label %540, label %547, !llvm.loop !23
540: ; preds = %530
%541 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !6
%542 = add nuw nsw i64 %469, 8
%543 = getelementptr inbounds i32, ptr %541, i64 %532
%544 = load i32, ptr %543, align 4, !tbaa !10
%545 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %544)
%546 = icmp ult i64 %469, 503
br label %547
547: ; preds = %540, %530, %520, %510, %500, %490, %480, %467
%548 = phi i64 [ %472, %467 ], [ %482, %480 ], [ %492, %490 ], [ %502, %500 ], [ %512, %510 ], [ %522, %520 ], [ %532, %530 ], [ %542, %540 ]
%549 = phi i1 [ %478, %467 ], [ %488, %480 ], [ %498, %490 ], [ %508, %500 ], [ %518, %510 ], [ %528, %520 ], [ %538, %530 ], [ %546, %540 ]
br i1 %549, label %467, label %550, !llvm.loop !24
550: ; preds = %547
%551 = load ptr, ptr @png_sRGB_base, align 8, !tbaa !6
%552 = and i64 %548, 4294967295
%553 = getelementptr inbounds i32, ptr %551, i64 %552
%554 = load i32, ptr %553, align 4, !tbaa !10
%555 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.20, i32 noundef %554)
br label %556
556: ; preds = %571, %550
%557 = phi ptr [ @.str.22, %550 ], [ @.str.19, %571 ]
%558 = phi i64 [ 0, %550 ], [ %563, %571 ]
%559 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) %557)
br label %560
560: ; preds = %556, %560
%561 = phi i64 [ %558, %556 ], [ %563, %560 ]
%562 = load ptr, ptr @png_sRGB_delta, align 8, !tbaa !6
%563 = add nuw nsw i64 %561, 1
%564 = getelementptr inbounds i32, ptr %562, i64 %561
%565 = load i32, ptr %564, align 4, !tbaa !10
%566 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %565)
%567 = and i64 %563, 15
%568 = icmp ne i64 %567, 0
%569 = icmp ult i64 %561, 510
%570 = and i1 %569, %568
br i1 %570, label %560, label %571, !llvm.loop !25
571: ; preds = %560
br i1 %569, label %556, label %572, !llvm.loop !26
572: ; preds = %571
%573 = load ptr, ptr @png_sRGB_delta, align 8, !tbaa !6
%574 = and i64 %563, 4294967295
%575 = getelementptr inbounds i32, ptr %573, i64 %574
%576 = load i32, ptr %575, align 4, !tbaa !10
%577 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.20, i32 noundef %576)
br label %578
578: ; preds = %572, %367
ret i32 0
}
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @invsRGB(i32 noundef) local_unnamed_addr #1
declare i32 @fprintf(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
declare i32 @sRGB(i32 noundef) local_unnamed_addr #1
declare i32 @nearbyint(i32 noundef) local_unnamed_addr #1
declare i32 @PNG_sRGB_FROM_LINEAR(i32 noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3
declare double @finvsRGB(i32 noundef) local_unnamed_addr #1
declare double @fsRGB(i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #4
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { noreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
!15 = distinct !{!15, !13}
!16 = distinct !{!16, !13}
!17 = distinct !{!17, !13}
!18 = distinct !{!18, !13}
!19 = distinct !{!19, !13}
!20 = distinct !{!20, !13}
!21 = distinct !{!21, !13}
!22 = distinct !{!22, !13}
!23 = distinct !{!23, !13}
!24 = distinct !{!24, !13}
!25 = distinct !{!25, !13}
!26 = distinct !{!26, !13}
| Provenance_Cores_Mupen64Plus_png_contrib_tools_extr_makesRGB.c_main |
; ModuleID = 'AnghaBench/openwrt/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/extr_ag71xx_main.c_ag71xx_dump_dma_regs.c'
source_filename = "AnghaBench/openwrt/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/extr_ag71xx_main.c_ag71xx_dump_dma_regs.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [60 x i8] c"%s: dma_tx_ctrl=%08x, dma_tx_desc=%08x, dma_tx_status=%08x\0A\00", align 1
@AG71XX_REG_TX_CTRL = dso_local local_unnamed_addr global i32 0, align 4
@AG71XX_REG_TX_DESC = dso_local local_unnamed_addr global i32 0, align 4
@AG71XX_REG_TX_STATUS = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [60 x i8] c"%s: dma_rx_ctrl=%08x, dma_rx_desc=%08x, dma_rx_status=%08x\0A\00", align 1
@AG71XX_REG_RX_CTRL = dso_local local_unnamed_addr global i32 0, align 4
@AG71XX_REG_RX_DESC = dso_local local_unnamed_addr global i32 0, align 4
@AG71XX_REG_RX_STATUS = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ag71xx_dump_dma_regs], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ag71xx_dump_dma_regs(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = load i32, ptr %2, align 4, !tbaa !10
%4 = load i32, ptr @AG71XX_REG_TX_CTRL, align 4, !tbaa !13
%5 = tail call i32 @ag71xx_rr(ptr noundef nonnull %0, i32 noundef %4) #2
%6 = load i32, ptr @AG71XX_REG_TX_DESC, align 4, !tbaa !13
%7 = tail call i32 @ag71xx_rr(ptr noundef nonnull %0, i32 noundef %6) #2
%8 = load i32, ptr @AG71XX_REG_TX_STATUS, align 4, !tbaa !13
%9 = tail call i32 @ag71xx_rr(ptr noundef nonnull %0, i32 noundef %8) #2
%10 = tail call i32 @DBG(ptr noundef nonnull @.str, i32 noundef %3, i32 noundef %5, i32 noundef %7, i32 noundef %9) #2
%11 = load ptr, ptr %0, align 8, !tbaa !5
%12 = load i32, ptr %11, align 4, !tbaa !10
%13 = load i32, ptr @AG71XX_REG_RX_CTRL, align 4, !tbaa !13
%14 = tail call i32 @ag71xx_rr(ptr noundef nonnull %0, i32 noundef %13) #2
%15 = load i32, ptr @AG71XX_REG_RX_DESC, align 4, !tbaa !13
%16 = tail call i32 @ag71xx_rr(ptr noundef nonnull %0, i32 noundef %15) #2
%17 = load i32, ptr @AG71XX_REG_RX_STATUS, align 4, !tbaa !13
%18 = tail call i32 @ag71xx_rr(ptr noundef nonnull %0, i32 noundef %17) #2
%19 = tail call i32 @DBG(ptr noundef nonnull @.str.1, i32 noundef %12, i32 noundef %14, i32 noundef %16, i32 noundef %18) #2
ret void
}
declare i32 @DBG(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ag71xx_rr(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ag71xx", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!12, !12, i64 0}
| ; ModuleID = 'AnghaBench/openwrt/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/extr_ag71xx_main.c_ag71xx_dump_dma_regs.c'
source_filename = "AnghaBench/openwrt/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/extr_ag71xx_main.c_ag71xx_dump_dma_regs.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [60 x i8] c"%s: dma_tx_ctrl=%08x, dma_tx_desc=%08x, dma_tx_status=%08x\0A\00", align 1
@AG71XX_REG_TX_CTRL = common local_unnamed_addr global i32 0, align 4
@AG71XX_REG_TX_DESC = common local_unnamed_addr global i32 0, align 4
@AG71XX_REG_TX_STATUS = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [60 x i8] c"%s: dma_rx_ctrl=%08x, dma_rx_desc=%08x, dma_rx_status=%08x\0A\00", align 1
@AG71XX_REG_RX_CTRL = common local_unnamed_addr global i32 0, align 4
@AG71XX_REG_RX_DESC = common local_unnamed_addr global i32 0, align 4
@AG71XX_REG_RX_STATUS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ag71xx_dump_dma_regs], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ag71xx_dump_dma_regs(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = load i32, ptr %2, align 4, !tbaa !11
%4 = load i32, ptr @AG71XX_REG_TX_CTRL, align 4, !tbaa !14
%5 = tail call i32 @ag71xx_rr(ptr noundef nonnull %0, i32 noundef %4) #2
%6 = load i32, ptr @AG71XX_REG_TX_DESC, align 4, !tbaa !14
%7 = tail call i32 @ag71xx_rr(ptr noundef nonnull %0, i32 noundef %6) #2
%8 = load i32, ptr @AG71XX_REG_TX_STATUS, align 4, !tbaa !14
%9 = tail call i32 @ag71xx_rr(ptr noundef nonnull %0, i32 noundef %8) #2
%10 = tail call i32 @DBG(ptr noundef nonnull @.str, i32 noundef %3, i32 noundef %5, i32 noundef %7, i32 noundef %9) #2
%11 = load ptr, ptr %0, align 8, !tbaa !6
%12 = load i32, ptr %11, align 4, !tbaa !11
%13 = load i32, ptr @AG71XX_REG_RX_CTRL, align 4, !tbaa !14
%14 = tail call i32 @ag71xx_rr(ptr noundef nonnull %0, i32 noundef %13) #2
%15 = load i32, ptr @AG71XX_REG_RX_DESC, align 4, !tbaa !14
%16 = tail call i32 @ag71xx_rr(ptr noundef nonnull %0, i32 noundef %15) #2
%17 = load i32, ptr @AG71XX_REG_RX_STATUS, align 4, !tbaa !14
%18 = tail call i32 @ag71xx_rr(ptr noundef nonnull %0, i32 noundef %17) #2
%19 = tail call i32 @DBG(ptr noundef nonnull @.str.1, i32 noundef %12, i32 noundef %14, i32 noundef %16, i32 noundef %18) #2
ret void
}
declare i32 @DBG(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ag71xx_rr(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ag71xx", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!13, !13, i64 0}
| openwrt_target_linux_ar71xx_files_drivers_net_ethernet_atheros_ag71xx_extr_ag71xx_main.c_ag71xx_dump_dma_regs |
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_base/extr_revs-txns.c_txn_body_change_rev_prop.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_base/extr_revs-txns.c_txn_body_change_rev_prop.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i32 }
%struct.change_rev_prop_args = type { i32, i32, i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @txn_body_change_rev_prop], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @txn_body_change_rev_prop(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds %struct.TYPE_4__, ptr %1, i64 0, i32 1
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = getelementptr inbounds %struct.change_rev_prop_args, ptr %0, i64 0, i32 3
%6 = load i32, ptr %5, align 4, !tbaa !10
%7 = getelementptr inbounds %struct.change_rev_prop_args, ptr %0, i64 0, i32 2
%8 = load i32, ptr %7, align 4, !tbaa !12
%9 = getelementptr inbounds %struct.change_rev_prop_args, ptr %0, i64 0, i32 1
%10 = load i32, ptr %9, align 4, !tbaa !13
%11 = load i32, ptr %0, align 4, !tbaa !14
%12 = load i32, ptr %1, align 4, !tbaa !15
%13 = tail call ptr @svn_fs_base__set_rev_prop(i32 noundef %4, i32 noundef %6, i32 noundef %8, i32 noundef %10, i32 noundef %11, ptr noundef nonnull %1, i32 noundef %12) #2
ret ptr %13
}
declare ptr @svn_fs_base__set_rev_prop(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"TYPE_4__", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 12}
!11 = !{!"change_rev_prop_args", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!12 = !{!11, !7, i64 8}
!13 = !{!11, !7, i64 4}
!14 = !{!11, !7, i64 0}
!15 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_base/extr_revs-txns.c_txn_body_change_rev_prop.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_base/extr_revs-txns.c_txn_body_change_rev_prop.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @txn_body_change_rev_prop], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @txn_body_change_rev_prop(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 4
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = getelementptr inbounds i8, ptr %0, i64 12
%6 = load i32, ptr %5, align 4, !tbaa !11
%7 = getelementptr inbounds i8, ptr %0, i64 8
%8 = load i32, ptr %7, align 4, !tbaa !13
%9 = getelementptr inbounds i8, ptr %0, i64 4
%10 = load i32, ptr %9, align 4, !tbaa !14
%11 = load i32, ptr %0, align 4, !tbaa !15
%12 = load i32, ptr %1, align 4, !tbaa !16
%13 = tail call ptr @svn_fs_base__set_rev_prop(i32 noundef %4, i32 noundef %6, i32 noundef %8, i32 noundef %10, i32 noundef %11, ptr noundef nonnull %1, i32 noundef %12) #2
ret ptr %13
}
declare ptr @svn_fs_base__set_rev_prop(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"TYPE_4__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 12}
!12 = !{!"change_rev_prop_args", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12}
!13 = !{!12, !8, i64 8}
!14 = !{!12, !8, i64 4}
!15 = !{!12, !8, i64 0}
!16 = !{!7, !8, i64 0}
| freebsd_contrib_subversion_subversion_libsvn_fs_base_extr_revs-txns.c_txn_body_change_rev_prop |
; ModuleID = 'AnghaBench/linux/drivers/hwtracing/stm/extr_core.c_stm_source_link_show.c'
source_filename = "AnghaBench/linux/drivers/hwtracing/stm/extr_core.c_stm_source_link_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@stm_source_srcu = dso_local global i32 0, align 4
@.str = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1
@.str.1 = private unnamed_addr constant [7 x i8] c"<none>\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @stm_source_link_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @stm_source_link_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @to_stm_source_device(ptr noundef %0) #2
%5 = tail call i32 @srcu_read_lock(ptr noundef nonnull @stm_source_srcu) #2
%6 = load i32, ptr %4, align 4, !tbaa !5
%7 = tail call ptr @srcu_dereference(i32 noundef %6, ptr noundef nonnull @stm_source_srcu) #2
%8 = icmp eq ptr %7, null
br i1 %8, label %11, label %9
9: ; preds = %3
%10 = tail call ptr @dev_name(ptr noundef nonnull %7) #2
br label %11
11: ; preds = %3, %9
%12 = phi ptr [ %10, %9 ], [ @.str.1, %3 ]
%13 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, ptr noundef %12) #2
%14 = tail call i32 @srcu_read_unlock(ptr noundef nonnull @stm_source_srcu, i32 noundef %5) #2
ret i32 %13
}
declare ptr @to_stm_source_device(ptr noundef) local_unnamed_addr #1
declare i32 @srcu_read_lock(ptr noundef) local_unnamed_addr #1
declare ptr @srcu_dereference(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @dev_name(ptr noundef) local_unnamed_addr #1
declare i32 @srcu_read_unlock(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"stm_source_device", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/hwtracing/stm/extr_core.c_stm_source_link_show.c'
source_filename = "AnghaBench/linux/drivers/hwtracing/stm/extr_core.c_stm_source_link_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@stm_source_srcu = common global i32 0, align 4
@.str = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1
@.str.1 = private unnamed_addr constant [7 x i8] c"<none>\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @stm_source_link_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @stm_source_link_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @to_stm_source_device(ptr noundef %0) #2
%5 = tail call i32 @srcu_read_lock(ptr noundef nonnull @stm_source_srcu) #2
%6 = load i32, ptr %4, align 4, !tbaa !6
%7 = tail call ptr @srcu_dereference(i32 noundef %6, ptr noundef nonnull @stm_source_srcu) #2
%8 = icmp eq ptr %7, null
br i1 %8, label %11, label %9
9: ; preds = %3
%10 = tail call ptr @dev_name(ptr noundef nonnull %7) #2
br label %11
11: ; preds = %3, %9
%12 = phi ptr [ %10, %9 ], [ @.str.1, %3 ]
%13 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, ptr noundef %12) #2
%14 = tail call i32 @srcu_read_unlock(ptr noundef nonnull @stm_source_srcu, i32 noundef %5) #2
ret i32 %13
}
declare ptr @to_stm_source_device(ptr noundef) local_unnamed_addr #1
declare i32 @srcu_read_lock(ptr noundef) local_unnamed_addr #1
declare ptr @srcu_dereference(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @dev_name(ptr noundef) local_unnamed_addr #1
declare i32 @srcu_read_unlock(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"stm_source_device", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_hwtracing_stm_extr_core.c_stm_source_link_show |
; ModuleID = 'AnghaBench/freebsd/sys/dev/xen/xenstore/extr_xenstore.c_xs_write_store.c'
source_filename = "AnghaBench/freebsd/sys/dev/xen/xenstore/extr_xenstore.c_xs_write_store.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i32, i32 }
%struct.TYPE_5__ = type { i64, i64, i32 }
@xs = dso_local global %struct.TYPE_4__ zeroinitializer, align 4
@SX_XLOCKED = dso_local local_unnamed_addr global i32 0, align 4
@xen_store = dso_local local_unnamed_addr global ptr null, align 8
@XENSTORE_RING_SIZE = dso_local local_unnamed_addr global i64 0, align 8
@PCATCH = dso_local local_unnamed_addr global i32 0, align 4
@PDROP = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [8 x i8] c"xbwrite\00", align 1
@EWOULDBLOCK = dso_local local_unnamed_addr global i32 0, align 4
@EIO = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @xs_write_store], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @xs_write_store(ptr noundef %0, i32 noundef %1) #0 {
%3 = alloca i32, align 4
%4 = load i32, ptr @SX_XLOCKED, align 4, !tbaa !5
%5 = tail call i32 @sx_assert(ptr noundef nonnull getelementptr inbounds (%struct.TYPE_4__, ptr @xs, i64 0, i32 2), i32 noundef %4) #4
%6 = icmp eq i32 %1, 0
br i1 %6, label %63, label %7
7: ; preds = %2, %59
%8 = phi i32 [ %61, %59 ], [ %1, %2 ]
%9 = phi ptr [ %60, %59 ], [ %0, %2 ]
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
%10 = call i32 @mtx_lock(ptr noundef nonnull getelementptr inbounds (%struct.TYPE_4__, ptr @xs, i64 0, i32 1)) #4
%11 = load ptr, ptr @xen_store, align 8, !tbaa !9
%12 = load i64, ptr %11, align 8, !tbaa !11
%13 = getelementptr inbounds %struct.TYPE_5__, ptr %11, i64 0, i32 1
%14 = load i64, ptr %13, align 8, !tbaa !14
%15 = sub nsw i64 %14, %12
%16 = load i64, ptr @XENSTORE_RING_SIZE, align 8, !tbaa !15
%17 = icmp eq i64 %15, %16
br i1 %17, label %18, label %27
18: ; preds = %7
%19 = load i32, ptr @PCATCH, align 4, !tbaa !5
%20 = load i32, ptr @PDROP, align 4, !tbaa !5
%21 = or i32 %20, %19
%22 = call i32 @msleep(ptr noundef nonnull %11, ptr noundef nonnull getelementptr inbounds (%struct.TYPE_4__, ptr @xs, i64 0, i32 1), i32 noundef %21, ptr noundef nonnull @.str, i32 noundef 0) #4
%23 = icmp eq i32 %22, 0
%24 = load i32, ptr @EWOULDBLOCK, align 4
%25 = icmp eq i32 %22, %24
%26 = select i1 %23, i1 true, i1 %25
br i1 %26, label %59, label %57
27: ; preds = %7
%28 = call i32 @mtx_unlock(ptr noundef nonnull getelementptr inbounds (%struct.TYPE_4__, ptr @xs, i64 0, i32 1)) #4
%29 = call i32 @xs_check_indexes(i64 noundef %12, i64 noundef %14) #4
%30 = icmp eq i32 %29, 0
%31 = load ptr, ptr @xen_store, align 8, !tbaa !9
br i1 %30, label %32, label %34
32: ; preds = %27
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %31, i8 0, i64 16, i1 false)
%33 = load i32, ptr @EIO, align 4, !tbaa !5
br label %57
34: ; preds = %27
%35 = getelementptr inbounds %struct.TYPE_5__, ptr %31, i64 0, i32 2
%36 = load i32, ptr %35, align 8, !tbaa !16
%37 = call ptr @xs_get_output_chunk(i64 noundef %12, i64 noundef %14, i32 noundef %36, ptr noundef nonnull %3) #4
%38 = load i32, ptr %3, align 4, !tbaa !5
%39 = icmp ugt i32 %38, %8
br i1 %39, label %40, label %41
40: ; preds = %34
store i32 %8, ptr %3, align 4, !tbaa !5
br label %41
41: ; preds = %40, %34
%42 = phi i32 [ %8, %40 ], [ %38, %34 ]
%43 = call i32 @memcpy(ptr noundef %37, ptr noundef %9, i32 noundef %42) #4
%44 = load i32, ptr %3, align 4, !tbaa !5
%45 = zext i32 %44 to i64
%46 = getelementptr inbounds i8, ptr %9, i64 %45
%47 = sub i32 %8, %44
%48 = call i32 (...) @wmb() #4
%49 = load i32, ptr %3, align 4, !tbaa !5
%50 = zext i32 %49 to i64
%51 = load ptr, ptr @xen_store, align 8, !tbaa !9
%52 = getelementptr inbounds %struct.TYPE_5__, ptr %51, i64 0, i32 1
%53 = load i64, ptr %52, align 8, !tbaa !14
%54 = add nsw i64 %53, %50
store i64 %54, ptr %52, align 8, !tbaa !14
%55 = load i32, ptr @xs, align 4, !tbaa !17
%56 = call i32 @xen_intr_signal(i32 noundef %55) #4
br label %59
57: ; preds = %18, %32
%58 = phi i32 [ %33, %32 ], [ %22, %18 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
br label %63
59: ; preds = %18, %41
%60 = phi ptr [ %46, %41 ], [ %9, %18 ]
%61 = phi i32 [ %47, %41 ], [ %8, %18 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
%62 = icmp eq i32 %61, 0
br i1 %62, label %63, label %7
63: ; preds = %59, %2, %57
%64 = phi i32 [ %58, %57 ], [ 0, %2 ], [ 0, %59 ]
ret i32 %64
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @sx_assert(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mtx_lock(ptr noundef) local_unnamed_addr #2
declare i32 @msleep(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mtx_unlock(ptr noundef) local_unnamed_addr #2
declare i32 @xs_check_indexes(i64 noundef, i64 noundef) local_unnamed_addr #2
declare ptr @xs_get_output_chunk(i64 noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @wmb(...) local_unnamed_addr #2
declare i32 @xen_intr_signal(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_5__", !13, i64 0, !13, i64 8, !6, i64 16}
!13 = !{!"long", !7, i64 0}
!14 = !{!12, !13, i64 8}
!15 = !{!13, !13, i64 0}
!16 = !{!12, !6, i64 16}
!17 = !{!18, !6, i64 0}
!18 = !{!"TYPE_4__", !6, i64 0, !6, i64 4, !6, i64 8}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/xen/xenstore/extr_xenstore.c_xs_write_store.c'
source_filename = "AnghaBench/freebsd/sys/dev/xen/xenstore/extr_xenstore.c_xs_write_store.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i32, i32, i32 }
@xs = common global %struct.TYPE_4__ zeroinitializer, align 4
@SX_XLOCKED = common local_unnamed_addr global i32 0, align 4
@xen_store = common local_unnamed_addr global ptr null, align 8
@XENSTORE_RING_SIZE = common local_unnamed_addr global i64 0, align 8
@PCATCH = common local_unnamed_addr global i32 0, align 4
@PDROP = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [8 x i8] c"xbwrite\00", align 1
@EWOULDBLOCK = common local_unnamed_addr global i32 0, align 4
@EIO = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @xs_write_store], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @xs_write_store(ptr noundef %0, i32 noundef %1) #0 {
%3 = alloca i32, align 4
%4 = load i32, ptr @SX_XLOCKED, align 4, !tbaa !6
%5 = tail call i32 @sx_assert(ptr noundef nonnull getelementptr inbounds (i8, ptr @xs, i64 8), i32 noundef %4) #4
%6 = icmp eq i32 %1, 0
br i1 %6, label %63, label %7
7: ; preds = %2, %59
%8 = phi i32 [ %61, %59 ], [ %1, %2 ]
%9 = phi ptr [ %60, %59 ], [ %0, %2 ]
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
%10 = call i32 @mtx_lock(ptr noundef nonnull getelementptr inbounds (i8, ptr @xs, i64 4)) #4
%11 = load ptr, ptr @xen_store, align 8, !tbaa !10
%12 = load i64, ptr %11, align 8, !tbaa !12
%13 = getelementptr inbounds i8, ptr %11, i64 8
%14 = load i64, ptr %13, align 8, !tbaa !15
%15 = sub nsw i64 %14, %12
%16 = load i64, ptr @XENSTORE_RING_SIZE, align 8, !tbaa !16
%17 = icmp eq i64 %15, %16
br i1 %17, label %18, label %27
18: ; preds = %7
%19 = load i32, ptr @PCATCH, align 4, !tbaa !6
%20 = load i32, ptr @PDROP, align 4, !tbaa !6
%21 = or i32 %20, %19
%22 = call i32 @msleep(ptr noundef nonnull %11, ptr noundef nonnull getelementptr inbounds (i8, ptr @xs, i64 4), i32 noundef %21, ptr noundef nonnull @.str, i32 noundef 0) #4
%23 = icmp eq i32 %22, 0
%24 = load i32, ptr @EWOULDBLOCK, align 4
%25 = icmp eq i32 %22, %24
%26 = select i1 %23, i1 true, i1 %25
br i1 %26, label %59, label %57
27: ; preds = %7
%28 = call i32 @mtx_unlock(ptr noundef nonnull getelementptr inbounds (i8, ptr @xs, i64 4)) #4
%29 = call i32 @xs_check_indexes(i64 noundef %12, i64 noundef %14) #4
%30 = icmp eq i32 %29, 0
%31 = load ptr, ptr @xen_store, align 8, !tbaa !10
br i1 %30, label %32, label %34
32: ; preds = %27
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %31, i8 0, i64 16, i1 false)
%33 = load i32, ptr @EIO, align 4, !tbaa !6
br label %57
34: ; preds = %27
%35 = getelementptr inbounds i8, ptr %31, i64 16
%36 = load i32, ptr %35, align 8, !tbaa !17
%37 = call ptr @xs_get_output_chunk(i64 noundef %12, i64 noundef %14, i32 noundef %36, ptr noundef nonnull %3) #4
%38 = load i32, ptr %3, align 4, !tbaa !6
%39 = icmp ugt i32 %38, %8
br i1 %39, label %40, label %41
40: ; preds = %34
store i32 %8, ptr %3, align 4, !tbaa !6
br label %41
41: ; preds = %40, %34
%42 = phi i32 [ %8, %40 ], [ %38, %34 ]
%43 = call i32 @memcpy(ptr noundef %37, ptr noundef %9, i32 noundef %42) #4
%44 = load i32, ptr %3, align 4, !tbaa !6
%45 = zext i32 %44 to i64
%46 = getelementptr inbounds i8, ptr %9, i64 %45
%47 = sub i32 %8, %44
%48 = call i32 @wmb() #4
%49 = load i32, ptr %3, align 4, !tbaa !6
%50 = zext i32 %49 to i64
%51 = load ptr, ptr @xen_store, align 8, !tbaa !10
%52 = getelementptr inbounds i8, ptr %51, i64 8
%53 = load i64, ptr %52, align 8, !tbaa !15
%54 = add nsw i64 %53, %50
store i64 %54, ptr %52, align 8, !tbaa !15
%55 = load i32, ptr @xs, align 4, !tbaa !18
%56 = call i32 @xen_intr_signal(i32 noundef %55) #4
br label %59
57: ; preds = %18, %32
%58 = phi i32 [ %33, %32 ], [ %22, %18 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
br label %63
59: ; preds = %18, %41
%60 = phi ptr [ %46, %41 ], [ %9, %18 ]
%61 = phi i32 [ %47, %41 ], [ %8, %18 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
%62 = icmp eq i32 %61, 0
br i1 %62, label %63, label %7
63: ; preds = %59, %2, %57
%64 = phi i32 [ %58, %57 ], [ 0, %2 ], [ 0, %59 ]
ret i32 %64
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @sx_assert(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mtx_lock(ptr noundef) local_unnamed_addr #2
declare i32 @msleep(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mtx_unlock(ptr noundef) local_unnamed_addr #2
declare i32 @xs_check_indexes(i64 noundef, i64 noundef) local_unnamed_addr #2
declare ptr @xs_get_output_chunk(i64 noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @wmb(...) local_unnamed_addr #2
declare i32 @xen_intr_signal(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_5__", !14, i64 0, !14, i64 8, !7, i64 16}
!14 = !{!"long", !8, i64 0}
!15 = !{!13, !14, i64 8}
!16 = !{!14, !14, i64 0}
!17 = !{!13, !7, i64 16}
!18 = !{!19, !7, i64 0}
!19 = !{!"TYPE_4__", !7, i64 0, !7, i64 4, !7, i64 8}
| freebsd_sys_dev_xen_xenstore_extr_xenstore.c_xs_write_store |
; ModuleID = 'AnghaBench/obs-studio/libobs/extr_obs-source.c_obs_source_render_filters.c'
source_filename = "AnghaBench/obs-studio/libobs/extr_obs-source.c_obs_source_render_filters.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i32, i32, %struct.TYPE_7__ }
%struct.TYPE_7__ = type { ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @obs_source_render_filters], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @obs_source_render_filters(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1
%3 = tail call i32 @pthread_mutex_lock(ptr noundef nonnull %2) #2
%4 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 2
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = load ptr, ptr %5, align 8, !tbaa !12
%7 = tail call i32 @obs_source_addref(ptr noundef %6) #2
%8 = tail call i32 @pthread_mutex_unlock(ptr noundef nonnull %2) #2
store i32 1, ptr %0, align 8, !tbaa !13
%9 = tail call i32 @obs_source_video_render(ptr noundef %6) #2
store i32 0, ptr %0, align 8, !tbaa !13
%10 = tail call i32 @obs_source_release(ptr noundef %6) #2
ret void
}
declare i32 @pthread_mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @obs_source_addref(ptr noundef) local_unnamed_addr #1
declare i32 @pthread_mutex_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @obs_source_video_render(ptr noundef) local_unnamed_addr #1
declare i32 @obs_source_release(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 8}
!6 = !{!"TYPE_8__", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_7__", !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/obs-studio/libobs/extr_obs-source.c_obs_source_render_filters.c'
source_filename = "AnghaBench/obs-studio/libobs/extr_obs-source.c_obs_source_render_filters.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @obs_source_render_filters], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @obs_source_render_filters(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 4
%3 = tail call i32 @pthread_mutex_lock(ptr noundef nonnull %2) #2
%4 = getelementptr inbounds i8, ptr %0, i64 8
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = load ptr, ptr %5, align 8, !tbaa !13
%7 = tail call i32 @obs_source_addref(ptr noundef %6) #2
%8 = tail call i32 @pthread_mutex_unlock(ptr noundef nonnull %2) #2
store i32 1, ptr %0, align 8, !tbaa !14
%9 = tail call i32 @obs_source_video_render(ptr noundef %6) #2
store i32 0, ptr %0, align 8, !tbaa !14
%10 = tail call i32 @obs_source_release(ptr noundef %6) #2
ret void
}
declare i32 @pthread_mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @obs_source_addref(ptr noundef) local_unnamed_addr #1
declare i32 @pthread_mutex_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @obs_source_video_render(ptr noundef) local_unnamed_addr #1
declare i32 @obs_source_release(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 8}
!7 = !{!"TYPE_8__", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_7__", !12, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!7, !8, i64 0}
| obs-studio_libobs_extr_obs-source.c_obs_source_render_filters |
; ModuleID = 'AnghaBench/Provenance/Cores/PicoDrive/pico/32x/extr_..pico_cmn.c_SekRunM68k.c'
source_filename = "AnghaBench/Provenance/Cores/PicoDrive/pico/32x/extr_..pico_cmn.c_SekRunM68k.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SekCycleAim = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @SekRunM68k], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @SekRunM68k(i32 noundef %0) #0 {
%2 = load i32, ptr @SekCycleAim, align 4, !tbaa !5
%3 = add nsw i32 %2, %0
store i32 %3, ptr @SekCycleAim, align 4, !tbaa !5
%4 = tail call i32 (...) @SekSyncM68k() #2
ret void
}
declare i32 @SekSyncM68k(...) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/Provenance/Cores/PicoDrive/pico/32x/extr_..pico_cmn.c_SekRunM68k.c'
source_filename = "AnghaBench/Provenance/Cores/PicoDrive/pico/32x/extr_..pico_cmn.c_SekRunM68k.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SekCycleAim = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @SekRunM68k], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @SekRunM68k(i32 noundef %0) #0 {
%2 = load i32, ptr @SekCycleAim, align 4, !tbaa !6
%3 = add nsw i32 %2, %0
store i32 %3, ptr @SekCycleAim, align 4, !tbaa !6
%4 = tail call i32 @SekSyncM68k() #2
ret void
}
declare i32 @SekSyncM68k(...) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| Provenance_Cores_PicoDrive_pico_32x_extr_..pico_cmn.c_SekRunM68k |
; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/gtk/extr_yuirange.c_yui_range_changed.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/gtk/extr_yuirange.c_yui_range_changed.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i32, ptr, i32, i32, i32 }
%struct.TYPE_5__ = type { i32 }
@yui_range_signals = dso_local local_unnamed_addr global ptr null, align 8
@YUI_RANGE_CHANGED_SIGNAL = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @yui_range_changed], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @yui_range_changed(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds %struct.TYPE_6__, ptr %1, i64 0, i32 4
%4 = load i32, ptr %3, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.TYPE_6__, ptr %1, i64 0, i32 3
%6 = load i32, ptr %5, align 4, !tbaa !11
%7 = getelementptr inbounds %struct.TYPE_6__, ptr %1, i64 0, i32 2
%8 = load i32, ptr %7, align 8, !tbaa !12
%9 = getelementptr inbounds %struct.TYPE_6__, ptr %1, i64 0, i32 1
%10 = load ptr, ptr %9, align 8, !tbaa !13
%11 = load i32, ptr %1, align 8, !tbaa !14
%12 = tail call i32 @GTK_COMBO_BOX(i32 noundef %11) #2
%13 = tail call i64 @gtk_combo_box_get_active(i32 noundef %12) #2
%14 = getelementptr inbounds %struct.TYPE_5__, ptr %10, i64 %13
%15 = load i32, ptr %14, align 4, !tbaa !15
%16 = tail call i32 @g_key_file_set_value(i32 noundef %4, i32 noundef %6, i32 noundef %8, i32 noundef %15) #2
%17 = tail call i32 @G_OBJECT(ptr noundef nonnull %1) #2
%18 = load ptr, ptr @yui_range_signals, align 8, !tbaa !17
%19 = load i64, ptr @YUI_RANGE_CHANGED_SIGNAL, align 8, !tbaa !18
%20 = getelementptr inbounds i32, ptr %18, i64 %19
%21 = load i32, ptr %20, align 4, !tbaa !20
%22 = tail call i32 @g_signal_emit(i32 noundef %17, i32 noundef %21, i32 noundef 0) #2
ret void
}
declare i32 @g_key_file_set_value(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @gtk_combo_box_get_active(i32 noundef) local_unnamed_addr #1
declare i32 @GTK_COMBO_BOX(i32 noundef) local_unnamed_addr #1
declare i32 @g_signal_emit(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @G_OBJECT(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 24}
!6 = !{!"TYPE_6__", !7, i64 0, !10, i64 8, !7, i64 16, !7, i64 20, !7, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 20}
!12 = !{!6, !7, i64 16}
!13 = !{!6, !10, i64 8}
!14 = !{!6, !7, i64 0}
!15 = !{!16, !7, i64 0}
!16 = !{!"TYPE_5__", !7, i64 0}
!17 = !{!10, !10, i64 0}
!18 = !{!19, !19, i64 0}
!19 = !{!"long", !8, i64 0}
!20 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/gtk/extr_yuirange.c_yui_range_changed.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/gtk/extr_yuirange.c_yui_range_changed.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_5__ = type { i32 }
@yui_range_signals = common local_unnamed_addr global ptr null, align 8
@YUI_RANGE_CHANGED_SIGNAL = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @yui_range_changed], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @yui_range_changed(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 24
%4 = load i32, ptr %3, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %1, i64 20
%6 = load i32, ptr %5, align 4, !tbaa !12
%7 = getelementptr inbounds i8, ptr %1, i64 16
%8 = load i32, ptr %7, align 8, !tbaa !13
%9 = getelementptr inbounds i8, ptr %1, i64 8
%10 = load ptr, ptr %9, align 8, !tbaa !14
%11 = load i32, ptr %1, align 8, !tbaa !15
%12 = tail call i32 @GTK_COMBO_BOX(i32 noundef %11) #2
%13 = tail call i64 @gtk_combo_box_get_active(i32 noundef %12) #2
%14 = getelementptr inbounds %struct.TYPE_5__, ptr %10, i64 %13
%15 = load i32, ptr %14, align 4, !tbaa !16
%16 = tail call i32 @g_key_file_set_value(i32 noundef %4, i32 noundef %6, i32 noundef %8, i32 noundef %15) #2
%17 = tail call i32 @G_OBJECT(ptr noundef nonnull %1) #2
%18 = load ptr, ptr @yui_range_signals, align 8, !tbaa !18
%19 = load i64, ptr @YUI_RANGE_CHANGED_SIGNAL, align 8, !tbaa !19
%20 = getelementptr inbounds i32, ptr %18, i64 %19
%21 = load i32, ptr %20, align 4, !tbaa !21
%22 = tail call i32 @g_signal_emit(i32 noundef %17, i32 noundef %21, i32 noundef 0) #2
ret void
}
declare i32 @g_key_file_set_value(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @gtk_combo_box_get_active(i32 noundef) local_unnamed_addr #1
declare i32 @GTK_COMBO_BOX(i32 noundef) local_unnamed_addr #1
declare i32 @g_signal_emit(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @G_OBJECT(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 24}
!7 = !{!"TYPE_6__", !8, i64 0, !11, i64 8, !8, i64 16, !8, i64 20, !8, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 20}
!13 = !{!7, !8, i64 16}
!14 = !{!7, !11, i64 8}
!15 = !{!7, !8, i64 0}
!16 = !{!17, !8, i64 0}
!17 = !{!"TYPE_5__", !8, i64 0}
!18 = !{!11, !11, i64 0}
!19 = !{!20, !20, i64 0}
!20 = !{!"long", !9, i64 0}
!21 = !{!8, !8, i64 0}
| Provenance_Cores_Yabause_yabause_src_gtk_extr_yuirange.c_yui_range_changed |
; ModuleID = 'AnghaBench/linux/sound/pci/ctxfi/extr_cthw20k1.c_dai_put_ctrl_blk.c'
source_filename = "AnghaBench/linux/sound/pci/ctxfi/extr_cthw20k1.c_dai_put_ctrl_blk.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @dai_put_ctrl_blk], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @dai_put_ctrl_blk(ptr noundef %0) #0 {
%2 = tail call i32 @kfree(ptr noundef %0) #2
ret i32 0
}
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/sound/pci/ctxfi/extr_cthw20k1.c_dai_put_ctrl_blk.c'
source_filename = "AnghaBench/linux/sound/pci/ctxfi/extr_cthw20k1.c_dai_put_ctrl_blk.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @dai_put_ctrl_blk], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @dai_put_ctrl_blk(ptr noundef %0) #0 {
%2 = tail call i32 @kfree(ptr noundef %0) #2
ret i32 0
}
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_sound_pci_ctxfi_extr_cthw20k1.c_dai_put_ctrl_blk |
; ModuleID = 'AnghaBench/fastsocket/kernel/net/sctp/extr_socket.c_sctp_wfree.c'
source_filename = "AnghaBench/fastsocket/kernel/net/sctp/extr_socket.c_sctp_wfree.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sk_buff = type { i64, i64 }
%struct.sctp_association = type { i32, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { ptr }
%struct.sock = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @sctp_wfree], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @sctp_wfree(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.sk_buff, ptr %0, i64 0, i32 1
%3 = load i64, ptr %2, align 8, !tbaa !5
%4 = inttoptr i64 %3 to ptr
%5 = load ptr, ptr %4, align 8, !tbaa !10
%6 = load ptr, ptr %5, align 8, !tbaa !12
%7 = getelementptr inbounds %struct.sctp_association, ptr %6, i64 0, i32 1
%8 = load ptr, ptr %7, align 8, !tbaa !14
%9 = tail call i64 @SCTP_DATA_SNDSIZE(ptr noundef nonnull %5) #2
%10 = load i32, ptr %6, align 8, !tbaa !18
%11 = trunc i64 %9 to i32
%12 = sub i32 %10, %11
%13 = add i32 %12, -24
store i32 %13, ptr %6, align 8, !tbaa !18
%14 = getelementptr inbounds %struct.sock, ptr %8, i64 0, i32 1
%15 = tail call i32 @atomic_sub(i32 noundef 8, ptr noundef nonnull %14) #2
%16 = load i64, ptr %0, align 8, !tbaa !19
%17 = load i32, ptr %8, align 4, !tbaa !20
%18 = trunc i64 %16 to i32
%19 = sub i32 %17, %18
store i32 %19, ptr %8, align 4, !tbaa !20
%20 = tail call i32 @sk_mem_uncharge(ptr noundef nonnull %8, i64 noundef %16) #2
%21 = tail call i32 @sock_wfree(ptr noundef nonnull %0) #2
%22 = tail call i32 @__sctp_write_space(ptr noundef nonnull %6) #2
%23 = tail call i32 @sctp_association_put(ptr noundef nonnull %6) #2
ret void
}
declare i64 @SCTP_DATA_SNDSIZE(ptr noundef) local_unnamed_addr #1
declare i32 @atomic_sub(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @sk_mem_uncharge(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @sock_wfree(ptr noundef) local_unnamed_addr #1
declare i32 @__sctp_write_space(ptr noundef) local_unnamed_addr #1
declare i32 @sctp_association_put(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"sk_buff", !7, i64 0, !7, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"sctp_chunk", !11, i64 0}
!14 = !{!15, !11, i64 8}
!15 = !{!"sctp_association", !16, i64 0, !17, i64 8}
!16 = !{!"int", !8, i64 0}
!17 = !{!"TYPE_2__", !11, i64 0}
!18 = !{!15, !16, i64 0}
!19 = !{!6, !7, i64 0}
!20 = !{!21, !16, i64 0}
!21 = !{!"sock", !16, i64 0, !16, i64 4}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/sctp/extr_socket.c_sctp_wfree.c'
source_filename = "AnghaBench/fastsocket/kernel/net/sctp/extr_socket.c_sctp_wfree.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @sctp_wfree], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @sctp_wfree(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load i64, ptr %2, align 8, !tbaa !6
%4 = inttoptr i64 %3 to ptr
%5 = load ptr, ptr %4, align 8, !tbaa !11
%6 = load ptr, ptr %5, align 8, !tbaa !13
%7 = getelementptr inbounds i8, ptr %6, i64 8
%8 = load ptr, ptr %7, align 8, !tbaa !15
%9 = tail call i64 @SCTP_DATA_SNDSIZE(ptr noundef nonnull %5) #2
%10 = load i32, ptr %6, align 8, !tbaa !19
%11 = trunc i64 %9 to i32
%12 = sub i32 %10, %11
%13 = add i32 %12, -24
store i32 %13, ptr %6, align 8, !tbaa !19
%14 = getelementptr inbounds i8, ptr %8, i64 4
%15 = tail call i32 @atomic_sub(i32 noundef 8, ptr noundef nonnull %14) #2
%16 = load i64, ptr %0, align 8, !tbaa !20
%17 = load i32, ptr %8, align 4, !tbaa !21
%18 = trunc i64 %16 to i32
%19 = sub i32 %17, %18
store i32 %19, ptr %8, align 4, !tbaa !21
%20 = tail call i32 @sk_mem_uncharge(ptr noundef nonnull %8, i64 noundef %16) #2
%21 = tail call i32 @sock_wfree(ptr noundef nonnull %0) #2
%22 = tail call i32 @__sctp_write_space(ptr noundef nonnull %6) #2
%23 = tail call i32 @sctp_association_put(ptr noundef nonnull %6) #2
ret void
}
declare i64 @SCTP_DATA_SNDSIZE(ptr noundef) local_unnamed_addr #1
declare i32 @atomic_sub(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @sk_mem_uncharge(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @sock_wfree(ptr noundef) local_unnamed_addr #1
declare i32 @__sctp_write_space(ptr noundef) local_unnamed_addr #1
declare i32 @sctp_association_put(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"sk_buff", !8, i64 0, !8, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"sctp_chunk", !12, i64 0}
!15 = !{!16, !12, i64 8}
!16 = !{!"sctp_association", !17, i64 0, !18, i64 8}
!17 = !{!"int", !9, i64 0}
!18 = !{!"TYPE_2__", !12, i64 0}
!19 = !{!16, !17, i64 0}
!20 = !{!7, !8, i64 0}
!21 = !{!22, !17, i64 0}
!22 = !{!"sock", !17, i64 0, !17, i64 4}
| fastsocket_kernel_net_sctp_extr_socket.c_sctp_wfree |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/powerpc/kernel/extr_rtas-proc.c_progress_open.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/powerpc/kernel/extr_rtas-proc.c_progress_open.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ppc_rtas_progress_show = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @progress_open], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @progress_open(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = load i32, ptr @ppc_rtas_progress_show, align 4, !tbaa !5
%4 = tail call i32 @single_open(ptr noundef %1, i32 noundef %3, ptr noundef null) #2
ret i32 %4
}
declare i32 @single_open(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/powerpc/kernel/extr_rtas-proc.c_progress_open.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/powerpc/kernel/extr_rtas-proc.c_progress_open.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ppc_rtas_progress_show = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @progress_open], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @progress_open(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = load i32, ptr @ppc_rtas_progress_show, align 4, !tbaa !6
%4 = tail call i32 @single_open(ptr noundef %1, i32 noundef %3, ptr noundef null) #2
ret i32 %4
}
declare i32 @single_open(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_arch_powerpc_kernel_extr_rtas-proc.c_progress_open |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath5k/extr_reset.c_ath5k_hw_nic_wakeup.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath5k/extr_reset.c_ath5k_hw_nic_wakeup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ath5k_hw = type { i64, i64, i64, ptr }
%struct.ieee80211_channel = type { i64, i64 }
@ATH_AHB = dso_local local_unnamed_addr global i64 0, align 8
@AR5K_PM_AWAKE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [31 x i8] c"failed to wakeup the MAC Chip\0A\00", align 1
@AR5K_RESET_CTL_PCI = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_AR5210 = dso_local local_unnamed_addr global i64 0, align 8
@AR5K_RESET_CTL_PCU = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_RESET_CTL_MAC = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_RESET_CTL_DMA = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_RESET_CTL_PHY = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_RESET_CTL_BASEBAND = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [30 x i8] c"failed to reset the MAC Chip\0A\00", align 1
@EIO = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [31 x i8] c"failed to resume the MAC Chip\0A\00", align 1
@.str.3 = private unnamed_addr constant [35 x i8] c"failed to warm reset the MAC Chip\0A\00", align 1
@AR5K_RF5112 = dso_local local_unnamed_addr global i64 0, align 8
@AR5K_PHY_MODE_RAD_RF5112 = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_PHY_PLL_RF5112 = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_PHY_MODE_RAD_RF5111 = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_PHY_PLL_RF5111 = dso_local local_unnamed_addr global i32 0, align 4
@NL80211_BAND_2GHZ = dso_local local_unnamed_addr global i64 0, align 8
@AR5K_PHY_MODE_FREQ_2GHZ = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_PHY_PLL_44MHZ = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_MODE_11B = dso_local local_unnamed_addr global i64 0, align 8
@AR5K_PHY_MODE_MOD_CCK = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_AR5211 = dso_local local_unnamed_addr global i64 0, align 8
@AR5K_PHY_MODE_MOD_OFDM = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_PHY_MODE_MOD_DYN = dso_local local_unnamed_addr global i32 0, align 4
@NL80211_BAND_5GHZ = dso_local local_unnamed_addr global i64 0, align 8
@AR5K_PHY_MODE_FREQ_5GHZ = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_RF5413 = dso_local local_unnamed_addr global i64 0, align 8
@AR5K_PHY_PLL_40MHZ_5413 = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_PHY_PLL_40MHZ = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [30 x i8] c"invalid radio frequency mode\0A\00", align 1
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_BWMODE_40MHZ = dso_local local_unnamed_addr global i64 0, align 8
@AR5K_PHY_TURBO_MODE = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_RF2425 = dso_local local_unnamed_addr global i64 0, align 8
@AR5K_PHY_TURBO_SHORT = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_BWMODE_DEFAULT = dso_local local_unnamed_addr global i64 0, align 8
@AR5K_BWMODE_10MHZ = dso_local local_unnamed_addr global i64 0, align 8
@AR5K_PHY_MODE_HALF_RATE = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_PHY_MODE_QUARTER_RATE = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_AR5212 = dso_local local_unnamed_addr global i64 0, align 8
@AR5K_PHY_PLL_HALF_RATE = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_PHY_PLL_QUARTER_RATE = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_PHY_TURBO = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_PHY_PLL = dso_local local_unnamed_addr global i32 0, align 4
@AR5K_PHY_MODE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @ath5k_hw_nic_wakeup(ptr noundef %0, ptr noundef readonly %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds %struct.ath5k_hw, ptr %0, i64 0, i32 3
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = tail call i64 @ath5k_get_bus_type(ptr noundef %0) #2
%6 = load i64, ptr @ATH_AHB, align 8, !tbaa !11
%7 = icmp ne i64 %5, %6
%8 = icmp ne ptr %1, null
%9 = or i1 %8, %7
br i1 %9, label %10, label %16
10: ; preds = %2
%11 = load i32, ptr @AR5K_PM_AWAKE, align 4, !tbaa !12
%12 = tail call i32 @ath5k_hw_set_power_mode(ptr noundef nonnull %0, i32 noundef %11, i32 noundef 1, i32 noundef 0) #2
%13 = icmp eq i32 %12, 0
br i1 %13, label %16, label %14
14: ; preds = %10
%15 = tail call i32 @ATH5K_ERR(ptr noundef nonnull %0, ptr noundef nonnull @.str) #2
br label %208
16: ; preds = %10, %2
%17 = icmp eq ptr %4, null
br i1 %17, label %21, label %18
18: ; preds = %16
%19 = tail call i64 @pci_is_pcie(ptr noundef nonnull %4) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %23
21: ; preds = %18, %16
%22 = load i32, ptr @AR5K_RESET_CTL_PCI, align 4, !tbaa !12
br label %23
23: ; preds = %18, %21
%24 = phi i32 [ %22, %21 ], [ 0, %18 ]
%25 = load i64, ptr %0, align 8, !tbaa !14
%26 = load i64, ptr @AR5K_AR5210, align 8, !tbaa !11
%27 = icmp eq i64 %25, %26
br i1 %27, label %28, label %40
28: ; preds = %23
%29 = load i32, ptr @AR5K_RESET_CTL_PCU, align 4, !tbaa !12
%30 = load i32, ptr @AR5K_RESET_CTL_MAC, align 4, !tbaa !12
%31 = or i32 %30, %29
%32 = load i32, ptr @AR5K_RESET_CTL_DMA, align 4, !tbaa !12
%33 = or i32 %31, %32
%34 = load i32, ptr @AR5K_RESET_CTL_PHY, align 4, !tbaa !12
%35 = or i32 %33, %34
%36 = load i32, ptr @AR5K_RESET_CTL_PCI, align 4, !tbaa !12
%37 = or i32 %35, %36
%38 = tail call i32 @ath5k_hw_nic_reset(ptr noundef nonnull %0, i32 noundef %37) #2
%39 = tail call i32 @usleep_range(i32 noundef 2000, i32 noundef 2500) #2
br label %53
40: ; preds = %23
%41 = tail call i64 @ath5k_get_bus_type(ptr noundef nonnull %0) #2
%42 = load i64, ptr @ATH_AHB, align 8, !tbaa !11
%43 = icmp eq i64 %41, %42
%44 = load i32, ptr @AR5K_RESET_CTL_PCU, align 4, !tbaa !12
%45 = load i32, ptr @AR5K_RESET_CTL_BASEBAND, align 4, !tbaa !12
br i1 %43, label %46, label %49
46: ; preds = %40
%47 = or i32 %45, %44
%48 = tail call i32 @ath5k_hw_wisoc_reset(ptr noundef nonnull %0, i32 noundef %47) #2
br label %53
49: ; preds = %40
%50 = or i32 %44, %24
%51 = or i32 %50, %45
%52 = tail call i32 @ath5k_hw_nic_reset(ptr noundef nonnull %0, i32 noundef %51) #2
br label %53
53: ; preds = %46, %49, %28
%54 = phi i32 [ %38, %28 ], [ %48, %46 ], [ %52, %49 ]
%55 = icmp eq i32 %54, 0
br i1 %55, label %60, label %56
56: ; preds = %53
%57 = tail call i32 @ATH5K_ERR(ptr noundef nonnull %0, ptr noundef nonnull @.str.1) #2
%58 = load i32, ptr @EIO, align 4, !tbaa !12
%59 = sub nsw i32 0, %58
br label %208
60: ; preds = %53
%61 = load i32, ptr @AR5K_PM_AWAKE, align 4, !tbaa !12
%62 = tail call i32 @ath5k_hw_set_power_mode(ptr noundef nonnull %0, i32 noundef %61, i32 noundef 1, i32 noundef 0) #2
%63 = icmp eq i32 %62, 0
br i1 %63, label %66, label %64
64: ; preds = %60
%65 = tail call i32 @ATH5K_ERR(ptr noundef nonnull %0, ptr noundef nonnull @.str.2) #2
br label %208
66: ; preds = %60
%67 = tail call i64 @ath5k_get_bus_type(ptr noundef nonnull %0) #2
%68 = load i64, ptr @ATH_AHB, align 8, !tbaa !11
%69 = icmp eq i64 %67, %68
br i1 %69, label %70, label %72
70: ; preds = %66
%71 = tail call i32 @ath5k_hw_wisoc_reset(ptr noundef nonnull %0, i32 noundef 0) #2
br label %74
72: ; preds = %66
%73 = tail call i32 @ath5k_hw_nic_reset(ptr noundef nonnull %0, i32 noundef 0) #2
br label %74
74: ; preds = %72, %70
%75 = phi i32 [ %71, %70 ], [ %73, %72 ]
%76 = icmp eq i32 %75, 0
br i1 %76, label %81, label %77
77: ; preds = %74
%78 = tail call i32 @ATH5K_ERR(ptr noundef nonnull %0, ptr noundef nonnull @.str.3) #2
%79 = load i32, ptr @EIO, align 4, !tbaa !12
%80 = sub nsw i32 0, %79
br label %208
81: ; preds = %74
br i1 %8, label %82, label %208
82: ; preds = %81
%83 = load i64, ptr %0, align 8, !tbaa !14
%84 = load i64, ptr @AR5K_AR5210, align 8, !tbaa !11
%85 = icmp eq i64 %83, %84
br i1 %85, label %177, label %86
86: ; preds = %82
%87 = getelementptr inbounds %struct.ath5k_hw, ptr %0, i64 0, i32 1
%88 = load i64, ptr %87, align 8, !tbaa !15
%89 = load i64, ptr @AR5K_RF5112, align 8, !tbaa !11
%90 = icmp slt i64 %88, %89
%91 = load i32, ptr @AR5K_PHY_PLL_RF5111, align 4
%92 = load i32, ptr @AR5K_PHY_PLL_RF5112, align 4
%93 = select i1 %90, i32 %91, i32 %92
%94 = load i32, ptr @AR5K_PHY_MODE_RAD_RF5111, align 4
%95 = load i32, ptr @AR5K_PHY_MODE_RAD_RF5112, align 4
%96 = select i1 %90, i32 %94, i32 %95
%97 = load i64, ptr %1, align 8, !tbaa !16
%98 = load i64, ptr @NL80211_BAND_2GHZ, align 8, !tbaa !11
%99 = icmp eq i64 %97, %98
br i1 %99, label %100, label %121
100: ; preds = %86
%101 = load i32, ptr @AR5K_PHY_MODE_FREQ_2GHZ, align 4, !tbaa !12
%102 = or i32 %101, %96
%103 = load i32, ptr @AR5K_PHY_PLL_44MHZ, align 4, !tbaa !12
%104 = or i32 %103, %93
%105 = getelementptr inbounds %struct.ieee80211_channel, ptr %1, i64 0, i32 1
%106 = load i64, ptr %105, align 8, !tbaa !18
%107 = load i64, ptr @AR5K_MODE_11B, align 8, !tbaa !11
%108 = icmp eq i64 %106, %107
br i1 %108, label %109, label %112
109: ; preds = %100
%110 = load i32, ptr @AR5K_PHY_MODE_MOD_CCK, align 4, !tbaa !12
%111 = or i32 %110, %102
br label %140
112: ; preds = %100
%113 = load i64, ptr @AR5K_AR5211, align 8, !tbaa !11
%114 = icmp eq i64 %83, %113
br i1 %114, label %115, label %118
115: ; preds = %112
%116 = load i32, ptr @AR5K_PHY_MODE_MOD_OFDM, align 4, !tbaa !12
%117 = or i32 %116, %102
br label %140
118: ; preds = %112
%119 = load i32, ptr @AR5K_PHY_MODE_MOD_DYN, align 4, !tbaa !12
%120 = or i32 %119, %102
br label %140
121: ; preds = %86
%122 = load i64, ptr @NL80211_BAND_5GHZ, align 8, !tbaa !11
%123 = icmp eq i64 %97, %122
br i1 %123, label %124, label %136
124: ; preds = %121
%125 = load i32, ptr @AR5K_PHY_MODE_FREQ_5GHZ, align 4, !tbaa !12
%126 = load i32, ptr @AR5K_PHY_MODE_MOD_OFDM, align 4, !tbaa !12
%127 = or i32 %125, %126
%128 = or i32 %127, %96
%129 = load i64, ptr @AR5K_RF5413, align 8, !tbaa !11
%130 = icmp eq i64 %88, %129
br i1 %130, label %131, label %133
131: ; preds = %124
%132 = load i32, ptr @AR5K_PHY_PLL_40MHZ_5413, align 4, !tbaa !12
br label %140
133: ; preds = %124
%134 = load i32, ptr @AR5K_PHY_PLL_40MHZ, align 4, !tbaa !12
%135 = or i32 %134, %93
br label %140
136: ; preds = %121
%137 = tail call i32 @ATH5K_ERR(ptr noundef nonnull %0, ptr noundef nonnull @.str.4) #2
%138 = load i32, ptr @EINVAL, align 4, !tbaa !12
%139 = sub nsw i32 0, %138
br label %208
140: ; preds = %133, %131, %109, %118, %115
%141 = phi i32 [ %111, %109 ], [ %117, %115 ], [ %120, %118 ], [ %128, %131 ], [ %128, %133 ]
%142 = phi i32 [ %104, %109 ], [ %104, %115 ], [ %104, %118 ], [ %132, %131 ], [ %135, %133 ]
%143 = getelementptr inbounds %struct.ath5k_hw, ptr %0, i64 0, i32 2
%144 = load i64, ptr %143, align 8, !tbaa !19
%145 = load i64, ptr @AR5K_BWMODE_40MHZ, align 8, !tbaa !11
%146 = icmp eq i64 %144, %145
br i1 %146, label %147, label %154
147: ; preds = %140
%148 = load i32, ptr @AR5K_PHY_TURBO_MODE, align 4, !tbaa !12
%149 = load i64, ptr @AR5K_RF2425, align 8, !tbaa !11
%150 = icmp eq i64 %88, %149
br i1 %150, label %188, label %151
151: ; preds = %147
%152 = load i32, ptr @AR5K_PHY_TURBO_SHORT, align 4, !tbaa !12
%153 = or i32 %152, %148
br label %188
154: ; preds = %140
%155 = load i64, ptr @AR5K_BWMODE_DEFAULT, align 8, !tbaa !11
%156 = icmp eq i64 %144, %155
br i1 %156, label %188, label %157
157: ; preds = %154
%158 = load i64, ptr @AR5K_RF5413, align 8, !tbaa !11
%159 = icmp eq i64 %88, %158
br i1 %159, label %160, label %167
160: ; preds = %157
%161 = load i64, ptr @AR5K_BWMODE_10MHZ, align 8, !tbaa !11
%162 = icmp eq i64 %144, %161
%163 = load i32, ptr @AR5K_PHY_MODE_HALF_RATE, align 4
%164 = load i32, ptr @AR5K_PHY_MODE_QUARTER_RATE, align 4
%165 = select i1 %162, i32 %163, i32 %164
%166 = or i32 %165, %141
br label %188
167: ; preds = %157
%168 = load i64, ptr @AR5K_AR5212, align 8, !tbaa !11
%169 = icmp eq i64 %83, %168
br i1 %169, label %170, label %188
170: ; preds = %167
%171 = load i64, ptr @AR5K_BWMODE_10MHZ, align 8, !tbaa !11
%172 = icmp eq i64 %144, %171
%173 = load i32, ptr @AR5K_PHY_PLL_HALF_RATE, align 4
%174 = load i32, ptr @AR5K_PHY_PLL_QUARTER_RATE, align 4
%175 = select i1 %172, i32 %173, i32 %174
%176 = or i32 %175, %142
br label %188
177: ; preds = %82
%178 = getelementptr inbounds %struct.ath5k_hw, ptr %0, i64 0, i32 2
%179 = load i64, ptr %178, align 8, !tbaa !19
%180 = load i64, ptr @AR5K_BWMODE_40MHZ, align 8, !tbaa !11
%181 = icmp eq i64 %179, %180
br i1 %181, label %182, label %208
182: ; preds = %177
%183 = load i32, ptr @AR5K_PHY_TURBO_MODE, align 4, !tbaa !12
%184 = load i32, ptr @AR5K_PHY_TURBO, align 4, !tbaa !12
%185 = tail call i32 @ath5k_hw_reg_write(ptr noundef nonnull %0, i32 noundef %183, i32 noundef %184) #2
%186 = load i64, ptr %0, align 8, !tbaa !14
%187 = load i64, ptr @AR5K_AR5210, align 8, !tbaa !11
br label %188
188: ; preds = %182, %151, %147, %160, %170, %167, %154
%189 = phi i64 [ %84, %151 ], [ %84, %147 ], [ %84, %160 ], [ %84, %170 ], [ %84, %167 ], [ %84, %154 ], [ %187, %182 ]
%190 = phi i64 [ %83, %151 ], [ %83, %147 ], [ %83, %160 ], [ %83, %170 ], [ %83, %167 ], [ %83, %154 ], [ %186, %182 ]
%191 = phi i32 [ %153, %151 ], [ %148, %147 ], [ 0, %160 ], [ 0, %170 ], [ 0, %167 ], [ 0, %154 ], [ 0, %182 ]
%192 = phi i32 [ %141, %151 ], [ %141, %147 ], [ %166, %160 ], [ %141, %170 ], [ %141, %167 ], [ %141, %154 ], [ 0, %182 ]
%193 = phi i32 [ %142, %151 ], [ %142, %147 ], [ %142, %160 ], [ %176, %170 ], [ %142, %167 ], [ %142, %154 ], [ 0, %182 ]
%194 = icmp eq i64 %190, %189
br i1 %194, label %208, label %195
195: ; preds = %188
%196 = load i32, ptr @AR5K_PHY_PLL, align 4, !tbaa !12
%197 = tail call i32 @ath5k_hw_reg_read(ptr noundef nonnull %0, i32 noundef %196) #2
%198 = icmp eq i32 %197, %193
br i1 %198, label %203, label %199
199: ; preds = %195
%200 = load i32, ptr @AR5K_PHY_PLL, align 4, !tbaa !12
%201 = tail call i32 @ath5k_hw_reg_write(ptr noundef nonnull %0, i32 noundef %193, i32 noundef %200) #2
%202 = tail call i32 @usleep_range(i32 noundef 300, i32 noundef 350) #2
br label %203
203: ; preds = %199, %195
%204 = load i32, ptr @AR5K_PHY_MODE, align 4, !tbaa !12
%205 = tail call i32 @ath5k_hw_reg_write(ptr noundef nonnull %0, i32 noundef %192, i32 noundef %204) #2
%206 = load i32, ptr @AR5K_PHY_TURBO, align 4, !tbaa !12
%207 = tail call i32 @ath5k_hw_reg_write(ptr noundef nonnull %0, i32 noundef %191, i32 noundef %206) #2
br label %208
208: ; preds = %177, %188, %203, %81, %136, %77, %64, %56, %14
%209 = phi i32 [ %12, %14 ], [ %59, %56 ], [ %62, %64 ], [ %80, %77 ], [ %139, %136 ], [ 0, %81 ], [ 0, %203 ], [ 0, %188 ], [ 0, %177 ]
ret i32 %209
}
declare i64 @ath5k_get_bus_type(ptr noundef) local_unnamed_addr #1
declare i32 @ath5k_hw_set_power_mode(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ATH5K_ERR(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @pci_is_pcie(ptr noundef) local_unnamed_addr #1
declare i32 @ath5k_hw_nic_reset(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @usleep_range(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ath5k_hw_wisoc_reset(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ath5k_hw_reg_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ath5k_hw_reg_read(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 24}
!6 = !{!"ath5k_hw", !7, i64 0, !7, i64 8, !7, i64 16, !10, i64 24}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!6, !7, i64 0}
!15 = !{!6, !7, i64 8}
!16 = !{!17, !7, i64 0}
!17 = !{!"ieee80211_channel", !7, i64 0, !7, i64 8}
!18 = !{!17, !7, i64 8}
!19 = !{!6, !7, i64 16}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath5k/extr_reset.c_ath5k_hw_nic_wakeup.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath5k/extr_reset.c_ath5k_hw_nic_wakeup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ATH_AHB = common local_unnamed_addr global i64 0, align 8
@AR5K_PM_AWAKE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [31 x i8] c"failed to wakeup the MAC Chip\0A\00", align 1
@AR5K_RESET_CTL_PCI = common local_unnamed_addr global i32 0, align 4
@AR5K_AR5210 = common local_unnamed_addr global i64 0, align 8
@AR5K_RESET_CTL_PCU = common local_unnamed_addr global i32 0, align 4
@AR5K_RESET_CTL_MAC = common local_unnamed_addr global i32 0, align 4
@AR5K_RESET_CTL_DMA = common local_unnamed_addr global i32 0, align 4
@AR5K_RESET_CTL_PHY = common local_unnamed_addr global i32 0, align 4
@AR5K_RESET_CTL_BASEBAND = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [30 x i8] c"failed to reset the MAC Chip\0A\00", align 1
@EIO = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [31 x i8] c"failed to resume the MAC Chip\0A\00", align 1
@.str.3 = private unnamed_addr constant [35 x i8] c"failed to warm reset the MAC Chip\0A\00", align 1
@AR5K_RF5112 = common local_unnamed_addr global i64 0, align 8
@AR5K_PHY_MODE_RAD_RF5112 = common local_unnamed_addr global i32 0, align 4
@AR5K_PHY_PLL_RF5112 = common local_unnamed_addr global i32 0, align 4
@AR5K_PHY_MODE_RAD_RF5111 = common local_unnamed_addr global i32 0, align 4
@AR5K_PHY_PLL_RF5111 = common local_unnamed_addr global i32 0, align 4
@NL80211_BAND_2GHZ = common local_unnamed_addr global i64 0, align 8
@AR5K_PHY_MODE_FREQ_2GHZ = common local_unnamed_addr global i32 0, align 4
@AR5K_PHY_PLL_44MHZ = common local_unnamed_addr global i32 0, align 4
@AR5K_MODE_11B = common local_unnamed_addr global i64 0, align 8
@AR5K_PHY_MODE_MOD_CCK = common local_unnamed_addr global i32 0, align 4
@AR5K_AR5211 = common local_unnamed_addr global i64 0, align 8
@AR5K_PHY_MODE_MOD_OFDM = common local_unnamed_addr global i32 0, align 4
@AR5K_PHY_MODE_MOD_DYN = common local_unnamed_addr global i32 0, align 4
@NL80211_BAND_5GHZ = common local_unnamed_addr global i64 0, align 8
@AR5K_PHY_MODE_FREQ_5GHZ = common local_unnamed_addr global i32 0, align 4
@AR5K_RF5413 = common local_unnamed_addr global i64 0, align 8
@AR5K_PHY_PLL_40MHZ_5413 = common local_unnamed_addr global i32 0, align 4
@AR5K_PHY_PLL_40MHZ = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [30 x i8] c"invalid radio frequency mode\0A\00", align 1
@EINVAL = common local_unnamed_addr global i32 0, align 4
@AR5K_BWMODE_40MHZ = common local_unnamed_addr global i64 0, align 8
@AR5K_PHY_TURBO_MODE = common local_unnamed_addr global i32 0, align 4
@AR5K_RF2425 = common local_unnamed_addr global i64 0, align 8
@AR5K_PHY_TURBO_SHORT = common local_unnamed_addr global i32 0, align 4
@AR5K_BWMODE_DEFAULT = common local_unnamed_addr global i64 0, align 8
@AR5K_BWMODE_10MHZ = common local_unnamed_addr global i64 0, align 8
@AR5K_PHY_MODE_HALF_RATE = common local_unnamed_addr global i32 0, align 4
@AR5K_PHY_MODE_QUARTER_RATE = common local_unnamed_addr global i32 0, align 4
@AR5K_AR5212 = common local_unnamed_addr global i64 0, align 8
@AR5K_PHY_PLL_HALF_RATE = common local_unnamed_addr global i32 0, align 4
@AR5K_PHY_PLL_QUARTER_RATE = common local_unnamed_addr global i32 0, align 4
@AR5K_PHY_TURBO = common local_unnamed_addr global i32 0, align 4
@AR5K_PHY_PLL = common local_unnamed_addr global i32 0, align 4
@AR5K_PHY_MODE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @ath5k_hw_nic_wakeup(ptr noundef %0, ptr noundef readonly %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 24
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = tail call i64 @ath5k_get_bus_type(ptr noundef %0) #2
%6 = load i64, ptr @ATH_AHB, align 8, !tbaa !12
%7 = icmp ne i64 %5, %6
%8 = icmp ne ptr %1, null
%9 = or i1 %8, %7
br i1 %9, label %10, label %16
10: ; preds = %2
%11 = load i32, ptr @AR5K_PM_AWAKE, align 4, !tbaa !13
%12 = tail call i32 @ath5k_hw_set_power_mode(ptr noundef nonnull %0, i32 noundef %11, i32 noundef 1, i32 noundef 0) #2
%13 = icmp eq i32 %12, 0
br i1 %13, label %16, label %14
14: ; preds = %10
%15 = tail call i32 @ATH5K_ERR(ptr noundef nonnull %0, ptr noundef nonnull @.str) #2
br label %208
16: ; preds = %10, %2
%17 = icmp eq ptr %4, null
br i1 %17, label %21, label %18
18: ; preds = %16
%19 = tail call i64 @pci_is_pcie(ptr noundef nonnull %4) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %23
21: ; preds = %18, %16
%22 = load i32, ptr @AR5K_RESET_CTL_PCI, align 4, !tbaa !13
br label %23
23: ; preds = %18, %21
%24 = phi i32 [ %22, %21 ], [ 0, %18 ]
%25 = load i64, ptr %0, align 8, !tbaa !15
%26 = load i64, ptr @AR5K_AR5210, align 8, !tbaa !12
%27 = icmp eq i64 %25, %26
br i1 %27, label %28, label %40
28: ; preds = %23
%29 = load i32, ptr @AR5K_RESET_CTL_PCU, align 4, !tbaa !13
%30 = load i32, ptr @AR5K_RESET_CTL_MAC, align 4, !tbaa !13
%31 = or i32 %30, %29
%32 = load i32, ptr @AR5K_RESET_CTL_DMA, align 4, !tbaa !13
%33 = or i32 %31, %32
%34 = load i32, ptr @AR5K_RESET_CTL_PHY, align 4, !tbaa !13
%35 = or i32 %33, %34
%36 = load i32, ptr @AR5K_RESET_CTL_PCI, align 4, !tbaa !13
%37 = or i32 %35, %36
%38 = tail call i32 @ath5k_hw_nic_reset(ptr noundef nonnull %0, i32 noundef %37) #2
%39 = tail call i32 @usleep_range(i32 noundef 2000, i32 noundef 2500) #2
br label %53
40: ; preds = %23
%41 = tail call i64 @ath5k_get_bus_type(ptr noundef nonnull %0) #2
%42 = load i64, ptr @ATH_AHB, align 8, !tbaa !12
%43 = icmp eq i64 %41, %42
%44 = load i32, ptr @AR5K_RESET_CTL_PCU, align 4, !tbaa !13
%45 = load i32, ptr @AR5K_RESET_CTL_BASEBAND, align 4, !tbaa !13
br i1 %43, label %46, label %49
46: ; preds = %40
%47 = or i32 %45, %44
%48 = tail call i32 @ath5k_hw_wisoc_reset(ptr noundef nonnull %0, i32 noundef %47) #2
br label %53
49: ; preds = %40
%50 = or i32 %44, %24
%51 = or i32 %50, %45
%52 = tail call i32 @ath5k_hw_nic_reset(ptr noundef nonnull %0, i32 noundef %51) #2
br label %53
53: ; preds = %46, %49, %28
%54 = phi i32 [ %38, %28 ], [ %48, %46 ], [ %52, %49 ]
%55 = icmp eq i32 %54, 0
br i1 %55, label %60, label %56
56: ; preds = %53
%57 = tail call i32 @ATH5K_ERR(ptr noundef nonnull %0, ptr noundef nonnull @.str.1) #2
%58 = load i32, ptr @EIO, align 4, !tbaa !13
%59 = sub nsw i32 0, %58
br label %208
60: ; preds = %53
%61 = load i32, ptr @AR5K_PM_AWAKE, align 4, !tbaa !13
%62 = tail call i32 @ath5k_hw_set_power_mode(ptr noundef nonnull %0, i32 noundef %61, i32 noundef 1, i32 noundef 0) #2
%63 = icmp eq i32 %62, 0
br i1 %63, label %66, label %64
64: ; preds = %60
%65 = tail call i32 @ATH5K_ERR(ptr noundef nonnull %0, ptr noundef nonnull @.str.2) #2
br label %208
66: ; preds = %60
%67 = tail call i64 @ath5k_get_bus_type(ptr noundef nonnull %0) #2
%68 = load i64, ptr @ATH_AHB, align 8, !tbaa !12
%69 = icmp eq i64 %67, %68
br i1 %69, label %70, label %72
70: ; preds = %66
%71 = tail call i32 @ath5k_hw_wisoc_reset(ptr noundef nonnull %0, i32 noundef 0) #2
br label %74
72: ; preds = %66
%73 = tail call i32 @ath5k_hw_nic_reset(ptr noundef nonnull %0, i32 noundef 0) #2
br label %74
74: ; preds = %72, %70
%75 = phi i32 [ %71, %70 ], [ %73, %72 ]
%76 = icmp eq i32 %75, 0
br i1 %76, label %81, label %77
77: ; preds = %74
%78 = tail call i32 @ATH5K_ERR(ptr noundef nonnull %0, ptr noundef nonnull @.str.3) #2
%79 = load i32, ptr @EIO, align 4, !tbaa !13
%80 = sub nsw i32 0, %79
br label %208
81: ; preds = %74
br i1 %8, label %82, label %208
82: ; preds = %81
%83 = load i64, ptr %0, align 8, !tbaa !15
%84 = load i64, ptr @AR5K_AR5210, align 8, !tbaa !12
%85 = icmp eq i64 %83, %84
br i1 %85, label %177, label %86
86: ; preds = %82
%87 = getelementptr inbounds i8, ptr %0, i64 8
%88 = load i64, ptr %87, align 8, !tbaa !16
%89 = load i64, ptr @AR5K_RF5112, align 8, !tbaa !12
%90 = icmp slt i64 %88, %89
%91 = load i32, ptr @AR5K_PHY_PLL_RF5111, align 4
%92 = load i32, ptr @AR5K_PHY_PLL_RF5112, align 4
%93 = select i1 %90, i32 %91, i32 %92
%94 = load i32, ptr @AR5K_PHY_MODE_RAD_RF5111, align 4
%95 = load i32, ptr @AR5K_PHY_MODE_RAD_RF5112, align 4
%96 = select i1 %90, i32 %94, i32 %95
%97 = load i64, ptr %1, align 8, !tbaa !17
%98 = load i64, ptr @NL80211_BAND_2GHZ, align 8, !tbaa !12
%99 = icmp eq i64 %97, %98
br i1 %99, label %100, label %121
100: ; preds = %86
%101 = load i32, ptr @AR5K_PHY_MODE_FREQ_2GHZ, align 4, !tbaa !13
%102 = or i32 %101, %96
%103 = load i32, ptr @AR5K_PHY_PLL_44MHZ, align 4, !tbaa !13
%104 = or i32 %103, %93
%105 = getelementptr inbounds i8, ptr %1, i64 8
%106 = load i64, ptr %105, align 8, !tbaa !19
%107 = load i64, ptr @AR5K_MODE_11B, align 8, !tbaa !12
%108 = icmp eq i64 %106, %107
br i1 %108, label %109, label %112
109: ; preds = %100
%110 = load i32, ptr @AR5K_PHY_MODE_MOD_CCK, align 4, !tbaa !13
%111 = or i32 %110, %102
br label %140
112: ; preds = %100
%113 = load i64, ptr @AR5K_AR5211, align 8, !tbaa !12
%114 = icmp eq i64 %83, %113
br i1 %114, label %115, label %118
115: ; preds = %112
%116 = load i32, ptr @AR5K_PHY_MODE_MOD_OFDM, align 4, !tbaa !13
%117 = or i32 %116, %102
br label %140
118: ; preds = %112
%119 = load i32, ptr @AR5K_PHY_MODE_MOD_DYN, align 4, !tbaa !13
%120 = or i32 %119, %102
br label %140
121: ; preds = %86
%122 = load i64, ptr @NL80211_BAND_5GHZ, align 8, !tbaa !12
%123 = icmp eq i64 %97, %122
br i1 %123, label %124, label %136
124: ; preds = %121
%125 = load i32, ptr @AR5K_PHY_MODE_FREQ_5GHZ, align 4, !tbaa !13
%126 = load i32, ptr @AR5K_PHY_MODE_MOD_OFDM, align 4, !tbaa !13
%127 = or i32 %125, %126
%128 = or i32 %127, %96
%129 = load i64, ptr @AR5K_RF5413, align 8, !tbaa !12
%130 = icmp eq i64 %88, %129
br i1 %130, label %131, label %133
131: ; preds = %124
%132 = load i32, ptr @AR5K_PHY_PLL_40MHZ_5413, align 4, !tbaa !13
br label %140
133: ; preds = %124
%134 = load i32, ptr @AR5K_PHY_PLL_40MHZ, align 4, !tbaa !13
%135 = or i32 %134, %93
br label %140
136: ; preds = %121
%137 = tail call i32 @ATH5K_ERR(ptr noundef nonnull %0, ptr noundef nonnull @.str.4) #2
%138 = load i32, ptr @EINVAL, align 4, !tbaa !13
%139 = sub nsw i32 0, %138
br label %208
140: ; preds = %133, %131, %109, %118, %115
%141 = phi i32 [ %111, %109 ], [ %117, %115 ], [ %120, %118 ], [ %128, %131 ], [ %128, %133 ]
%142 = phi i32 [ %104, %109 ], [ %104, %115 ], [ %104, %118 ], [ %132, %131 ], [ %135, %133 ]
%143 = getelementptr inbounds i8, ptr %0, i64 16
%144 = load i64, ptr %143, align 8, !tbaa !20
%145 = load i64, ptr @AR5K_BWMODE_40MHZ, align 8, !tbaa !12
%146 = icmp eq i64 %144, %145
br i1 %146, label %147, label %154
147: ; preds = %140
%148 = load i32, ptr @AR5K_PHY_TURBO_MODE, align 4, !tbaa !13
%149 = load i64, ptr @AR5K_RF2425, align 8, !tbaa !12
%150 = icmp eq i64 %88, %149
br i1 %150, label %188, label %151
151: ; preds = %147
%152 = load i32, ptr @AR5K_PHY_TURBO_SHORT, align 4, !tbaa !13
%153 = or i32 %152, %148
br label %188
154: ; preds = %140
%155 = load i64, ptr @AR5K_BWMODE_DEFAULT, align 8, !tbaa !12
%156 = icmp eq i64 %144, %155
br i1 %156, label %188, label %157
157: ; preds = %154
%158 = load i64, ptr @AR5K_RF5413, align 8, !tbaa !12
%159 = icmp eq i64 %88, %158
br i1 %159, label %160, label %167
160: ; preds = %157
%161 = load i64, ptr @AR5K_BWMODE_10MHZ, align 8, !tbaa !12
%162 = icmp eq i64 %144, %161
%163 = load i32, ptr @AR5K_PHY_MODE_HALF_RATE, align 4
%164 = load i32, ptr @AR5K_PHY_MODE_QUARTER_RATE, align 4
%165 = select i1 %162, i32 %163, i32 %164
%166 = or i32 %165, %141
br label %188
167: ; preds = %157
%168 = load i64, ptr @AR5K_AR5212, align 8, !tbaa !12
%169 = icmp eq i64 %83, %168
br i1 %169, label %170, label %188
170: ; preds = %167
%171 = load i64, ptr @AR5K_BWMODE_10MHZ, align 8, !tbaa !12
%172 = icmp eq i64 %144, %171
%173 = load i32, ptr @AR5K_PHY_PLL_HALF_RATE, align 4
%174 = load i32, ptr @AR5K_PHY_PLL_QUARTER_RATE, align 4
%175 = select i1 %172, i32 %173, i32 %174
%176 = or i32 %175, %142
br label %188
177: ; preds = %82
%178 = getelementptr inbounds i8, ptr %0, i64 16
%179 = load i64, ptr %178, align 8, !tbaa !20
%180 = load i64, ptr @AR5K_BWMODE_40MHZ, align 8, !tbaa !12
%181 = icmp eq i64 %179, %180
br i1 %181, label %182, label %208
182: ; preds = %177
%183 = load i32, ptr @AR5K_PHY_TURBO_MODE, align 4, !tbaa !13
%184 = load i32, ptr @AR5K_PHY_TURBO, align 4, !tbaa !13
%185 = tail call i32 @ath5k_hw_reg_write(ptr noundef nonnull %0, i32 noundef %183, i32 noundef %184) #2
%186 = load i64, ptr %0, align 8, !tbaa !15
%187 = load i64, ptr @AR5K_AR5210, align 8, !tbaa !12
br label %188
188: ; preds = %182, %151, %147, %160, %170, %167, %154
%189 = phi i64 [ %84, %151 ], [ %84, %147 ], [ %84, %160 ], [ %84, %170 ], [ %84, %167 ], [ %84, %154 ], [ %187, %182 ]
%190 = phi i64 [ %83, %151 ], [ %83, %147 ], [ %83, %160 ], [ %83, %170 ], [ %83, %167 ], [ %83, %154 ], [ %186, %182 ]
%191 = phi i32 [ %153, %151 ], [ %148, %147 ], [ 0, %160 ], [ 0, %170 ], [ 0, %167 ], [ 0, %154 ], [ 0, %182 ]
%192 = phi i32 [ %141, %151 ], [ %141, %147 ], [ %166, %160 ], [ %141, %170 ], [ %141, %167 ], [ %141, %154 ], [ 0, %182 ]
%193 = phi i32 [ %142, %151 ], [ %142, %147 ], [ %142, %160 ], [ %176, %170 ], [ %142, %167 ], [ %142, %154 ], [ 0, %182 ]
%194 = icmp eq i64 %190, %189
br i1 %194, label %208, label %195
195: ; preds = %188
%196 = load i32, ptr @AR5K_PHY_PLL, align 4, !tbaa !13
%197 = tail call i32 @ath5k_hw_reg_read(ptr noundef nonnull %0, i32 noundef %196) #2
%198 = icmp eq i32 %197, %193
br i1 %198, label %203, label %199
199: ; preds = %195
%200 = load i32, ptr @AR5K_PHY_PLL, align 4, !tbaa !13
%201 = tail call i32 @ath5k_hw_reg_write(ptr noundef nonnull %0, i32 noundef %193, i32 noundef %200) #2
%202 = tail call i32 @usleep_range(i32 noundef 300, i32 noundef 350) #2
br label %203
203: ; preds = %199, %195
%204 = load i32, ptr @AR5K_PHY_MODE, align 4, !tbaa !13
%205 = tail call i32 @ath5k_hw_reg_write(ptr noundef nonnull %0, i32 noundef %192, i32 noundef %204) #2
%206 = load i32, ptr @AR5K_PHY_TURBO, align 4, !tbaa !13
%207 = tail call i32 @ath5k_hw_reg_write(ptr noundef nonnull %0, i32 noundef %191, i32 noundef %206) #2
br label %208
208: ; preds = %177, %188, %203, %81, %136, %77, %64, %56, %14
%209 = phi i32 [ %12, %14 ], [ %59, %56 ], [ %62, %64 ], [ %80, %77 ], [ %139, %136 ], [ 0, %81 ], [ 0, %203 ], [ 0, %188 ], [ 0, %177 ]
ret i32 %209
}
declare i64 @ath5k_get_bus_type(ptr noundef) local_unnamed_addr #1
declare i32 @ath5k_hw_set_power_mode(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ATH5K_ERR(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @pci_is_pcie(ptr noundef) local_unnamed_addr #1
declare i32 @ath5k_hw_nic_reset(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @usleep_range(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ath5k_hw_wisoc_reset(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ath5k_hw_reg_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ath5k_hw_reg_read(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 24}
!7 = !{!"ath5k_hw", !8, i64 0, !8, i64 8, !8, i64 16, !11, i64 24}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!7, !8, i64 0}
!16 = !{!7, !8, i64 8}
!17 = !{!18, !8, i64 0}
!18 = !{!"ieee80211_channel", !8, i64 0, !8, i64 8}
!19 = !{!18, !8, i64 8}
!20 = !{!7, !8, i64 16}
| linux_drivers_net_wireless_ath_ath5k_extr_reset.c_ath5k_hw_nic_wakeup |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_debug.c_ath_debug_stat_interrupt.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_debug.c_ath_debug_stat_interrupt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.ath_softc = type { %struct.TYPE_10__, ptr }
%struct.TYPE_10__ = type { %struct.TYPE_9__ }
%struct.TYPE_9__ = type { %struct.TYPE_8__ }
@ATH9K_HW_CAP_EDMA = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_RXLP = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_RXHP = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_BB_WATCHDOG = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_RX = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_RXEOL = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_RXORN = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_TX = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_TXURN = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_RXPHY = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_RXKCM = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_SWBA = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_BMISS = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_BNR = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_CST = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_GTT = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_TIM = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_CABEND = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_DTIMSYNC = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_DTIM = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_TSFOOR = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_MCI = dso_local local_unnamed_addr global i32 0, align 4
@ATH9K_INT_GENTIMER = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define dso_local void @ath_debug_stat_interrupt(ptr nocapture noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq i32 %1, 0
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 22
%6 = load i32, ptr %5, align 8, !tbaa !5
%7 = add nsw i32 %6, 1
store i32 %7, ptr %5, align 8, !tbaa !5
br label %8
8: ; preds = %4, %2
%9 = getelementptr inbounds %struct.ath_softc, ptr %0, i64 0, i32 1
%10 = load ptr, ptr %9, align 8, !tbaa !14
%11 = load i32, ptr %10, align 4, !tbaa !15
%12 = load i32, ptr @ATH9K_HW_CAP_EDMA, align 4, !tbaa !18
%13 = and i32 %12, %11
%14 = icmp eq i32 %13, 0
br i1 %14, label %39, label %15
15: ; preds = %8
%16 = load i32, ptr @ATH9K_INT_RXLP, align 4, !tbaa !18
%17 = and i32 %16, %1
%18 = icmp eq i32 %17, 0
br i1 %18, label %23, label %19
19: ; preds = %15
%20 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 21
%21 = load i32, ptr %20, align 4, !tbaa !19
%22 = add nsw i32 %21, 1
store i32 %22, ptr %20, align 4, !tbaa !19
br label %23
23: ; preds = %19, %15
%24 = load i32, ptr @ATH9K_INT_RXHP, align 4, !tbaa !18
%25 = and i32 %24, %1
%26 = icmp eq i32 %25, 0
br i1 %26, label %31, label %27
27: ; preds = %23
%28 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 20
%29 = load i32, ptr %28, align 8, !tbaa !20
%30 = add nsw i32 %29, 1
store i32 %30, ptr %28, align 8, !tbaa !20
br label %31
31: ; preds = %27, %23
%32 = load i32, ptr @ATH9K_INT_BB_WATCHDOG, align 4, !tbaa !18
%33 = and i32 %32, %1
%34 = icmp eq i32 %33, 0
br i1 %34, label %47, label %35
35: ; preds = %31
%36 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 19
%37 = load i32, ptr %36, align 4, !tbaa !21
%38 = add nsw i32 %37, 1
store i32 %38, ptr %36, align 4, !tbaa !21
br label %47
39: ; preds = %8
%40 = load i32, ptr @ATH9K_INT_RX, align 4, !tbaa !18
%41 = and i32 %40, %1
%42 = icmp eq i32 %41, 0
br i1 %42, label %47, label %43
43: ; preds = %39
%44 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 18
%45 = load i32, ptr %44, align 8, !tbaa !22
%46 = add nsw i32 %45, 1
store i32 %46, ptr %44, align 8, !tbaa !22
br label %47
47: ; preds = %39, %43, %31, %35
%48 = load i32, ptr @ATH9K_INT_RXEOL, align 4, !tbaa !18
%49 = and i32 %48, %1
%50 = icmp eq i32 %49, 0
br i1 %50, label %55, label %51
51: ; preds = %47
%52 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 17
%53 = load i32, ptr %52, align 4, !tbaa !23
%54 = add nsw i32 %53, 1
store i32 %54, ptr %52, align 4, !tbaa !23
br label %55
55: ; preds = %51, %47
%56 = load i32, ptr @ATH9K_INT_RXORN, align 4, !tbaa !18
%57 = and i32 %56, %1
%58 = icmp eq i32 %57, 0
br i1 %58, label %63, label %59
59: ; preds = %55
%60 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 16
%61 = load i32, ptr %60, align 8, !tbaa !24
%62 = add nsw i32 %61, 1
store i32 %62, ptr %60, align 8, !tbaa !24
br label %63
63: ; preds = %59, %55
%64 = load i32, ptr @ATH9K_INT_TX, align 4, !tbaa !18
%65 = and i32 %64, %1
%66 = icmp eq i32 %65, 0
br i1 %66, label %71, label %67
67: ; preds = %63
%68 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 15
%69 = load i32, ptr %68, align 4, !tbaa !25
%70 = add nsw i32 %69, 1
store i32 %70, ptr %68, align 4, !tbaa !25
br label %71
71: ; preds = %67, %63
%72 = load i32, ptr @ATH9K_INT_TXURN, align 4, !tbaa !18
%73 = and i32 %72, %1
%74 = icmp eq i32 %73, 0
br i1 %74, label %79, label %75
75: ; preds = %71
%76 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 14
%77 = load i32, ptr %76, align 8, !tbaa !26
%78 = add nsw i32 %77, 1
store i32 %78, ptr %76, align 8, !tbaa !26
br label %79
79: ; preds = %75, %71
%80 = load i32, ptr @ATH9K_INT_RXPHY, align 4, !tbaa !18
%81 = and i32 %80, %1
%82 = icmp eq i32 %81, 0
br i1 %82, label %87, label %83
83: ; preds = %79
%84 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 13
%85 = load i32, ptr %84, align 4, !tbaa !27
%86 = add nsw i32 %85, 1
store i32 %86, ptr %84, align 4, !tbaa !27
br label %87
87: ; preds = %83, %79
%88 = load i32, ptr @ATH9K_INT_RXKCM, align 4, !tbaa !18
%89 = and i32 %88, %1
%90 = icmp eq i32 %89, 0
br i1 %90, label %95, label %91
91: ; preds = %87
%92 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 12
%93 = load i32, ptr %92, align 8, !tbaa !28
%94 = add nsw i32 %93, 1
store i32 %94, ptr %92, align 8, !tbaa !28
br label %95
95: ; preds = %91, %87
%96 = load i32, ptr @ATH9K_INT_SWBA, align 4, !tbaa !18
%97 = and i32 %96, %1
%98 = icmp eq i32 %97, 0
br i1 %98, label %103, label %99
99: ; preds = %95
%100 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 11
%101 = load i32, ptr %100, align 4, !tbaa !29
%102 = add nsw i32 %101, 1
store i32 %102, ptr %100, align 4, !tbaa !29
br label %103
103: ; preds = %99, %95
%104 = load i32, ptr @ATH9K_INT_BMISS, align 4, !tbaa !18
%105 = and i32 %104, %1
%106 = icmp eq i32 %105, 0
br i1 %106, label %111, label %107
107: ; preds = %103
%108 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 10
%109 = load i32, ptr %108, align 8, !tbaa !30
%110 = add nsw i32 %109, 1
store i32 %110, ptr %108, align 8, !tbaa !30
br label %111
111: ; preds = %107, %103
%112 = load i32, ptr @ATH9K_INT_BNR, align 4, !tbaa !18
%113 = and i32 %112, %1
%114 = icmp eq i32 %113, 0
br i1 %114, label %119, label %115
115: ; preds = %111
%116 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 9
%117 = load i32, ptr %116, align 4, !tbaa !31
%118 = add nsw i32 %117, 1
store i32 %118, ptr %116, align 4, !tbaa !31
br label %119
119: ; preds = %115, %111
%120 = load i32, ptr @ATH9K_INT_CST, align 4, !tbaa !18
%121 = and i32 %120, %1
%122 = icmp eq i32 %121, 0
br i1 %122, label %127, label %123
123: ; preds = %119
%124 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 8
%125 = load i32, ptr %124, align 8, !tbaa !32
%126 = add nsw i32 %125, 1
store i32 %126, ptr %124, align 8, !tbaa !32
br label %127
127: ; preds = %123, %119
%128 = load i32, ptr @ATH9K_INT_GTT, align 4, !tbaa !18
%129 = and i32 %128, %1
%130 = icmp eq i32 %129, 0
br i1 %130, label %135, label %131
131: ; preds = %127
%132 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 7
%133 = load i32, ptr %132, align 4, !tbaa !33
%134 = add nsw i32 %133, 1
store i32 %134, ptr %132, align 4, !tbaa !33
br label %135
135: ; preds = %131, %127
%136 = load i32, ptr @ATH9K_INT_TIM, align 4, !tbaa !18
%137 = and i32 %136, %1
%138 = icmp eq i32 %137, 0
br i1 %138, label %143, label %139
139: ; preds = %135
%140 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 6
%141 = load i32, ptr %140, align 8, !tbaa !34
%142 = add nsw i32 %141, 1
store i32 %142, ptr %140, align 8, !tbaa !34
br label %143
143: ; preds = %139, %135
%144 = load i32, ptr @ATH9K_INT_CABEND, align 4, !tbaa !18
%145 = and i32 %144, %1
%146 = icmp eq i32 %145, 0
br i1 %146, label %151, label %147
147: ; preds = %143
%148 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 5
%149 = load i32, ptr %148, align 4, !tbaa !35
%150 = add nsw i32 %149, 1
store i32 %150, ptr %148, align 4, !tbaa !35
br label %151
151: ; preds = %147, %143
%152 = load i32, ptr @ATH9K_INT_DTIMSYNC, align 4, !tbaa !18
%153 = and i32 %152, %1
%154 = icmp eq i32 %153, 0
br i1 %154, label %159, label %155
155: ; preds = %151
%156 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 4
%157 = load i32, ptr %156, align 8, !tbaa !36
%158 = add nsw i32 %157, 1
store i32 %158, ptr %156, align 8, !tbaa !36
br label %159
159: ; preds = %155, %151
%160 = load i32, ptr @ATH9K_INT_DTIM, align 4, !tbaa !18
%161 = and i32 %160, %1
%162 = icmp eq i32 %161, 0
br i1 %162, label %167, label %163
163: ; preds = %159
%164 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 3
%165 = load i32, ptr %164, align 4, !tbaa !37
%166 = add nsw i32 %165, 1
store i32 %166, ptr %164, align 4, !tbaa !37
br label %167
167: ; preds = %163, %159
%168 = load i32, ptr @ATH9K_INT_TSFOOR, align 4, !tbaa !18
%169 = and i32 %168, %1
%170 = icmp eq i32 %169, 0
br i1 %170, label %175, label %171
171: ; preds = %167
%172 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 2
%173 = load i32, ptr %172, align 8, !tbaa !38
%174 = add nsw i32 %173, 1
store i32 %174, ptr %172, align 8, !tbaa !38
br label %175
175: ; preds = %171, %167
%176 = load i32, ptr @ATH9K_INT_MCI, align 4, !tbaa !18
%177 = and i32 %176, %1
%178 = icmp eq i32 %177, 0
br i1 %178, label %183, label %179
179: ; preds = %175
%180 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1
%181 = load i32, ptr %180, align 4, !tbaa !39
%182 = add nsw i32 %181, 1
store i32 %182, ptr %180, align 4, !tbaa !39
br label %183
183: ; preds = %179, %175
%184 = load i32, ptr @ATH9K_INT_GENTIMER, align 4, !tbaa !18
%185 = and i32 %184, %1
%186 = icmp eq i32 %185, 0
br i1 %186, label %190, label %187
187: ; preds = %183
%188 = load i32, ptr %0, align 8, !tbaa !40
%189 = add nsw i32 %188, 1
store i32 %189, ptr %0, align 8, !tbaa !40
br label %190
190: ; preds = %187, %183
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 88}
!6 = !{!"ath_softc", !7, i64 0, !13, i64 96}
!7 = !{!"TYPE_10__", !8, i64 0}
!8 = !{!"TYPE_9__", !9, i64 0}
!9 = !{!"TYPE_8__", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88}
!10 = !{!"int", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C/C++ TBAA"}
!13 = !{!"any pointer", !11, i64 0}
!14 = !{!6, !13, i64 96}
!15 = !{!16, !10, i64 0}
!16 = !{!"TYPE_7__", !17, i64 0}
!17 = !{!"TYPE_6__", !10, i64 0}
!18 = !{!10, !10, i64 0}
!19 = !{!6, !10, i64 84}
!20 = !{!6, !10, i64 80}
!21 = !{!6, !10, i64 76}
!22 = !{!6, !10, i64 72}
!23 = !{!6, !10, i64 68}
!24 = !{!6, !10, i64 64}
!25 = !{!6, !10, i64 60}
!26 = !{!6, !10, i64 56}
!27 = !{!6, !10, i64 52}
!28 = !{!6, !10, i64 48}
!29 = !{!6, !10, i64 44}
!30 = !{!6, !10, i64 40}
!31 = !{!6, !10, i64 36}
!32 = !{!6, !10, i64 32}
!33 = !{!6, !10, i64 28}
!34 = !{!6, !10, i64 24}
!35 = !{!6, !10, i64 20}
!36 = !{!6, !10, i64 16}
!37 = !{!6, !10, i64 12}
!38 = !{!6, !10, i64 8}
!39 = !{!6, !10, i64 4}
!40 = !{!6, !10, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_debug.c_ath_debug_stat_interrupt.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_debug.c_ath_debug_stat_interrupt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ATH9K_HW_CAP_EDMA = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_RXLP = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_RXHP = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_BB_WATCHDOG = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_RX = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_RXEOL = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_RXORN = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_TX = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_TXURN = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_RXPHY = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_RXKCM = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_SWBA = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_BMISS = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_BNR = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_CST = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_GTT = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_TIM = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_CABEND = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_DTIMSYNC = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_DTIM = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_TSFOOR = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_MCI = common local_unnamed_addr global i32 0, align 4
@ATH9K_INT_GENTIMER = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define void @ath_debug_stat_interrupt(ptr nocapture noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq i32 %1, 0
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = getelementptr inbounds i8, ptr %0, i64 88
%6 = load i32, ptr %5, align 8, !tbaa !6
%7 = add nsw i32 %6, 1
store i32 %7, ptr %5, align 8, !tbaa !6
br label %8
8: ; preds = %4, %2
%9 = getelementptr inbounds i8, ptr %0, i64 96
%10 = load ptr, ptr %9, align 8, !tbaa !15
%11 = load i32, ptr %10, align 4, !tbaa !16
%12 = load i32, ptr @ATH9K_HW_CAP_EDMA, align 4, !tbaa !19
%13 = and i32 %12, %11
%14 = icmp eq i32 %13, 0
br i1 %14, label %39, label %15
15: ; preds = %8
%16 = load i32, ptr @ATH9K_INT_RXLP, align 4, !tbaa !19
%17 = and i32 %16, %1
%18 = icmp eq i32 %17, 0
br i1 %18, label %23, label %19
19: ; preds = %15
%20 = getelementptr inbounds i8, ptr %0, i64 84
%21 = load i32, ptr %20, align 4, !tbaa !20
%22 = add nsw i32 %21, 1
store i32 %22, ptr %20, align 4, !tbaa !20
br label %23
23: ; preds = %19, %15
%24 = load i32, ptr @ATH9K_INT_RXHP, align 4, !tbaa !19
%25 = and i32 %24, %1
%26 = icmp eq i32 %25, 0
br i1 %26, label %31, label %27
27: ; preds = %23
%28 = getelementptr inbounds i8, ptr %0, i64 80
%29 = load i32, ptr %28, align 8, !tbaa !21
%30 = add nsw i32 %29, 1
store i32 %30, ptr %28, align 8, !tbaa !21
br label %31
31: ; preds = %27, %23
%32 = load i32, ptr @ATH9K_INT_BB_WATCHDOG, align 4, !tbaa !19
%33 = and i32 %32, %1
%34 = icmp eq i32 %33, 0
br i1 %34, label %47, label %35
35: ; preds = %31
%36 = getelementptr inbounds i8, ptr %0, i64 76
%37 = load i32, ptr %36, align 4, !tbaa !22
%38 = add nsw i32 %37, 1
store i32 %38, ptr %36, align 4, !tbaa !22
br label %47
39: ; preds = %8
%40 = load i32, ptr @ATH9K_INT_RX, align 4, !tbaa !19
%41 = and i32 %40, %1
%42 = icmp eq i32 %41, 0
br i1 %42, label %47, label %43
43: ; preds = %39
%44 = getelementptr inbounds i8, ptr %0, i64 72
%45 = load i32, ptr %44, align 8, !tbaa !23
%46 = add nsw i32 %45, 1
store i32 %46, ptr %44, align 8, !tbaa !23
br label %47
47: ; preds = %39, %43, %31, %35
%48 = load i32, ptr @ATH9K_INT_RXEOL, align 4, !tbaa !19
%49 = and i32 %48, %1
%50 = icmp eq i32 %49, 0
br i1 %50, label %55, label %51
51: ; preds = %47
%52 = getelementptr inbounds i8, ptr %0, i64 68
%53 = load i32, ptr %52, align 4, !tbaa !24
%54 = add nsw i32 %53, 1
store i32 %54, ptr %52, align 4, !tbaa !24
br label %55
55: ; preds = %51, %47
%56 = load i32, ptr @ATH9K_INT_RXORN, align 4, !tbaa !19
%57 = and i32 %56, %1
%58 = icmp eq i32 %57, 0
br i1 %58, label %63, label %59
59: ; preds = %55
%60 = getelementptr inbounds i8, ptr %0, i64 64
%61 = load i32, ptr %60, align 8, !tbaa !25
%62 = add nsw i32 %61, 1
store i32 %62, ptr %60, align 8, !tbaa !25
br label %63
63: ; preds = %59, %55
%64 = load i32, ptr @ATH9K_INT_TX, align 4, !tbaa !19
%65 = and i32 %64, %1
%66 = icmp eq i32 %65, 0
br i1 %66, label %71, label %67
67: ; preds = %63
%68 = getelementptr inbounds i8, ptr %0, i64 60
%69 = load i32, ptr %68, align 4, !tbaa !26
%70 = add nsw i32 %69, 1
store i32 %70, ptr %68, align 4, !tbaa !26
br label %71
71: ; preds = %67, %63
%72 = load i32, ptr @ATH9K_INT_TXURN, align 4, !tbaa !19
%73 = and i32 %72, %1
%74 = icmp eq i32 %73, 0
br i1 %74, label %79, label %75
75: ; preds = %71
%76 = getelementptr inbounds i8, ptr %0, i64 56
%77 = load i32, ptr %76, align 8, !tbaa !27
%78 = add nsw i32 %77, 1
store i32 %78, ptr %76, align 8, !tbaa !27
br label %79
79: ; preds = %75, %71
%80 = load i32, ptr @ATH9K_INT_RXPHY, align 4, !tbaa !19
%81 = and i32 %80, %1
%82 = icmp eq i32 %81, 0
br i1 %82, label %87, label %83
83: ; preds = %79
%84 = getelementptr inbounds i8, ptr %0, i64 52
%85 = load i32, ptr %84, align 4, !tbaa !28
%86 = add nsw i32 %85, 1
store i32 %86, ptr %84, align 4, !tbaa !28
br label %87
87: ; preds = %83, %79
%88 = load i32, ptr @ATH9K_INT_RXKCM, align 4, !tbaa !19
%89 = and i32 %88, %1
%90 = icmp eq i32 %89, 0
br i1 %90, label %95, label %91
91: ; preds = %87
%92 = getelementptr inbounds i8, ptr %0, i64 48
%93 = load i32, ptr %92, align 8, !tbaa !29
%94 = add nsw i32 %93, 1
store i32 %94, ptr %92, align 8, !tbaa !29
br label %95
95: ; preds = %91, %87
%96 = load i32, ptr @ATH9K_INT_SWBA, align 4, !tbaa !19
%97 = and i32 %96, %1
%98 = icmp eq i32 %97, 0
br i1 %98, label %103, label %99
99: ; preds = %95
%100 = getelementptr inbounds i8, ptr %0, i64 44
%101 = load i32, ptr %100, align 4, !tbaa !30
%102 = add nsw i32 %101, 1
store i32 %102, ptr %100, align 4, !tbaa !30
br label %103
103: ; preds = %99, %95
%104 = load i32, ptr @ATH9K_INT_BMISS, align 4, !tbaa !19
%105 = and i32 %104, %1
%106 = icmp eq i32 %105, 0
br i1 %106, label %111, label %107
107: ; preds = %103
%108 = getelementptr inbounds i8, ptr %0, i64 40
%109 = load i32, ptr %108, align 8, !tbaa !31
%110 = add nsw i32 %109, 1
store i32 %110, ptr %108, align 8, !tbaa !31
br label %111
111: ; preds = %107, %103
%112 = load i32, ptr @ATH9K_INT_BNR, align 4, !tbaa !19
%113 = and i32 %112, %1
%114 = icmp eq i32 %113, 0
br i1 %114, label %119, label %115
115: ; preds = %111
%116 = getelementptr inbounds i8, ptr %0, i64 36
%117 = load i32, ptr %116, align 4, !tbaa !32
%118 = add nsw i32 %117, 1
store i32 %118, ptr %116, align 4, !tbaa !32
br label %119
119: ; preds = %115, %111
%120 = load i32, ptr @ATH9K_INT_CST, align 4, !tbaa !19
%121 = and i32 %120, %1
%122 = icmp eq i32 %121, 0
br i1 %122, label %127, label %123
123: ; preds = %119
%124 = getelementptr inbounds i8, ptr %0, i64 32
%125 = load i32, ptr %124, align 8, !tbaa !33
%126 = add nsw i32 %125, 1
store i32 %126, ptr %124, align 8, !tbaa !33
br label %127
127: ; preds = %123, %119
%128 = load i32, ptr @ATH9K_INT_GTT, align 4, !tbaa !19
%129 = and i32 %128, %1
%130 = icmp eq i32 %129, 0
br i1 %130, label %135, label %131
131: ; preds = %127
%132 = getelementptr inbounds i8, ptr %0, i64 28
%133 = load i32, ptr %132, align 4, !tbaa !34
%134 = add nsw i32 %133, 1
store i32 %134, ptr %132, align 4, !tbaa !34
br label %135
135: ; preds = %131, %127
%136 = load i32, ptr @ATH9K_INT_TIM, align 4, !tbaa !19
%137 = and i32 %136, %1
%138 = icmp eq i32 %137, 0
br i1 %138, label %143, label %139
139: ; preds = %135
%140 = getelementptr inbounds i8, ptr %0, i64 24
%141 = load i32, ptr %140, align 8, !tbaa !35
%142 = add nsw i32 %141, 1
store i32 %142, ptr %140, align 8, !tbaa !35
br label %143
143: ; preds = %139, %135
%144 = load i32, ptr @ATH9K_INT_CABEND, align 4, !tbaa !19
%145 = and i32 %144, %1
%146 = icmp eq i32 %145, 0
br i1 %146, label %151, label %147
147: ; preds = %143
%148 = getelementptr inbounds i8, ptr %0, i64 20
%149 = load i32, ptr %148, align 4, !tbaa !36
%150 = add nsw i32 %149, 1
store i32 %150, ptr %148, align 4, !tbaa !36
br label %151
151: ; preds = %147, %143
%152 = load i32, ptr @ATH9K_INT_DTIMSYNC, align 4, !tbaa !19
%153 = and i32 %152, %1
%154 = icmp eq i32 %153, 0
br i1 %154, label %159, label %155
155: ; preds = %151
%156 = getelementptr inbounds i8, ptr %0, i64 16
%157 = load i32, ptr %156, align 8, !tbaa !37
%158 = add nsw i32 %157, 1
store i32 %158, ptr %156, align 8, !tbaa !37
br label %159
159: ; preds = %155, %151
%160 = load i32, ptr @ATH9K_INT_DTIM, align 4, !tbaa !19
%161 = and i32 %160, %1
%162 = icmp eq i32 %161, 0
br i1 %162, label %167, label %163
163: ; preds = %159
%164 = getelementptr inbounds i8, ptr %0, i64 12
%165 = load i32, ptr %164, align 4, !tbaa !38
%166 = add nsw i32 %165, 1
store i32 %166, ptr %164, align 4, !tbaa !38
br label %167
167: ; preds = %163, %159
%168 = load i32, ptr @ATH9K_INT_TSFOOR, align 4, !tbaa !19
%169 = and i32 %168, %1
%170 = icmp eq i32 %169, 0
br i1 %170, label %175, label %171
171: ; preds = %167
%172 = getelementptr inbounds i8, ptr %0, i64 8
%173 = load i32, ptr %172, align 8, !tbaa !39
%174 = add nsw i32 %173, 1
store i32 %174, ptr %172, align 8, !tbaa !39
br label %175
175: ; preds = %171, %167
%176 = load i32, ptr @ATH9K_INT_MCI, align 4, !tbaa !19
%177 = and i32 %176, %1
%178 = icmp eq i32 %177, 0
br i1 %178, label %183, label %179
179: ; preds = %175
%180 = getelementptr inbounds i8, ptr %0, i64 4
%181 = load i32, ptr %180, align 4, !tbaa !40
%182 = add nsw i32 %181, 1
store i32 %182, ptr %180, align 4, !tbaa !40
br label %183
183: ; preds = %179, %175
%184 = load i32, ptr @ATH9K_INT_GENTIMER, align 4, !tbaa !19
%185 = and i32 %184, %1
%186 = icmp eq i32 %185, 0
br i1 %186, label %190, label %187
187: ; preds = %183
%188 = load i32, ptr %0, align 8, !tbaa !41
%189 = add nsw i32 %188, 1
store i32 %189, ptr %0, align 8, !tbaa !41
br label %190
190: ; preds = %187, %183
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 88}
!7 = !{!"ath_softc", !8, i64 0, !14, i64 96}
!8 = !{!"TYPE_10__", !9, i64 0}
!9 = !{!"TYPE_9__", !10, i64 0}
!10 = !{!"TYPE_8__", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88}
!11 = !{!"int", !12, i64 0}
!12 = !{!"omnipotent char", !13, i64 0}
!13 = !{!"Simple C/C++ TBAA"}
!14 = !{!"any pointer", !12, i64 0}
!15 = !{!7, !14, i64 96}
!16 = !{!17, !11, i64 0}
!17 = !{!"TYPE_7__", !18, i64 0}
!18 = !{!"TYPE_6__", !11, i64 0}
!19 = !{!11, !11, i64 0}
!20 = !{!7, !11, i64 84}
!21 = !{!7, !11, i64 80}
!22 = !{!7, !11, i64 76}
!23 = !{!7, !11, i64 72}
!24 = !{!7, !11, i64 68}
!25 = !{!7, !11, i64 64}
!26 = !{!7, !11, i64 60}
!27 = !{!7, !11, i64 56}
!28 = !{!7, !11, i64 52}
!29 = !{!7, !11, i64 48}
!30 = !{!7, !11, i64 44}
!31 = !{!7, !11, i64 40}
!32 = !{!7, !11, i64 36}
!33 = !{!7, !11, i64 32}
!34 = !{!7, !11, i64 28}
!35 = !{!7, !11, i64 24}
!36 = !{!7, !11, i64 20}
!37 = !{!7, !11, i64 16}
!38 = !{!7, !11, i64 12}
!39 = !{!7, !11, i64 8}
!40 = !{!7, !11, i64 4}
!41 = !{!7, !11, i64 0}
| linux_drivers_net_wireless_ath_ath9k_extr_debug.c_ath_debug_stat_interrupt |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/cx25840/extr_cx25840-core.c_cx25840_read4.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/cx25840/extr_cx25840-core.c_cx25840_read4.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.i2c_msg = type { i32, ptr, i64, i32 }
%struct.i2c_client = type { i32, i32 }
@I2C_M_RD = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @cx25840_read4(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = alloca [2 x %struct.i2c_msg], align 16
%4 = alloca [2 x i32], align 4
%5 = alloca [4 x i32], align 16
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %5) #3
%6 = ashr i32 %1, 8
store i32 %6, ptr %4, align 4, !tbaa !5
%7 = and i32 %1, 255
%8 = getelementptr inbounds [2 x i32], ptr %4, i64 0, i64 1
store i32 %7, ptr %8, align 4, !tbaa !5
%9 = getelementptr inbounds %struct.i2c_client, ptr %0, i64 0, i32 1
%10 = load i32, ptr %9, align 4, !tbaa !9
%11 = getelementptr inbounds %struct.i2c_msg, ptr %3, i64 0, i32 3
store i32 %10, ptr %11, align 8, !tbaa !11
%12 = getelementptr inbounds %struct.i2c_msg, ptr %3, i64 0, i32 2
store i64 0, ptr %12, align 16, !tbaa !15
store i32 2, ptr %3, align 16, !tbaa !16
%13 = getelementptr inbounds %struct.i2c_msg, ptr %3, i64 0, i32 1
store ptr %4, ptr %13, align 8, !tbaa !17
%14 = getelementptr inbounds [2 x %struct.i2c_msg], ptr %3, i64 0, i64 1
%15 = getelementptr inbounds [2 x %struct.i2c_msg], ptr %3, i64 0, i64 1, i32 3
store i32 %10, ptr %15, align 8, !tbaa !11
%16 = load i64, ptr @I2C_M_RD, align 8, !tbaa !18
%17 = getelementptr inbounds [2 x %struct.i2c_msg], ptr %3, i64 0, i64 1, i32 2
store i64 %16, ptr %17, align 16, !tbaa !15
store i32 4, ptr %14, align 16, !tbaa !16
%18 = getelementptr inbounds [2 x %struct.i2c_msg], ptr %3, i64 0, i64 1, i32 1
store ptr %5, ptr %18, align 8, !tbaa !17
%19 = load i32, ptr %0, align 4, !tbaa !19
%20 = call i32 @i2c_transfer(i32 noundef %19, ptr noundef nonnull %3, i32 noundef 2) #3
%21 = icmp slt i32 %20, 2
br i1 %21, label %36, label %22
22: ; preds = %2
%23 = getelementptr inbounds [4 x i32], ptr %5, i64 0, i64 3
%24 = load i32, ptr %23, align 4, !tbaa !5
%25 = shl i32 %24, 24
%26 = getelementptr inbounds [4 x i32], ptr %5, i64 0, i64 2
%27 = load i32, ptr %26, align 8, !tbaa !5
%28 = shl i32 %27, 16
%29 = or i32 %28, %25
%30 = getelementptr inbounds [4 x i32], ptr %5, i64 0, i64 1
%31 = load i32, ptr %30, align 4, !tbaa !5
%32 = shl i32 %31, 8
%33 = or i32 %29, %32
%34 = load i32, ptr %5, align 16, !tbaa !5
%35 = or i32 %33, %34
br label %36
36: ; preds = %2, %22
%37 = phi i32 [ %35, %22 ], [ 0, %2 ]
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %3) #3
ret i32 %37
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @i2c_transfer(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"i2c_client", !6, i64 0, !6, i64 4}
!11 = !{!12, !6, i64 24}
!12 = !{!"i2c_msg", !6, i64 0, !13, i64 8, !14, i64 16, !6, i64 24}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!12, !14, i64 16}
!16 = !{!12, !6, i64 0}
!17 = !{!12, !13, i64 8}
!18 = !{!14, !14, i64 0}
!19 = !{!10, !6, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/cx25840/extr_cx25840-core.c_cx25840_read4.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/cx25840/extr_cx25840-core.c_cx25840_read4.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.i2c_msg = type { i32, ptr, i64, i32 }
@I2C_M_RD = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @cx25840_read4(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = alloca [2 x %struct.i2c_msg], align 8
%4 = alloca [2 x i32], align 4
%5 = alloca [4 x i32], align 4
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %5) #3
%6 = ashr i32 %1, 8
store i32 %6, ptr %4, align 4, !tbaa !6
%7 = and i32 %1, 255
%8 = getelementptr inbounds i8, ptr %4, i64 4
store i32 %7, ptr %8, align 4, !tbaa !6
%9 = getelementptr inbounds i8, ptr %0, i64 4
%10 = load i32, ptr %9, align 4, !tbaa !10
%11 = getelementptr inbounds i8, ptr %3, i64 24
store i32 %10, ptr %11, align 8, !tbaa !12
%12 = getelementptr inbounds i8, ptr %3, i64 16
store i64 0, ptr %12, align 8, !tbaa !16
store i32 2, ptr %3, align 8, !tbaa !17
%13 = getelementptr inbounds i8, ptr %3, i64 8
store ptr %4, ptr %13, align 8, !tbaa !18
%14 = getelementptr inbounds i8, ptr %3, i64 32
%15 = getelementptr inbounds i8, ptr %3, i64 56
store i32 %10, ptr %15, align 8, !tbaa !12
%16 = load i64, ptr @I2C_M_RD, align 8, !tbaa !19
%17 = getelementptr inbounds i8, ptr %3, i64 48
store i64 %16, ptr %17, align 8, !tbaa !16
store i32 4, ptr %14, align 8, !tbaa !17
%18 = getelementptr inbounds i8, ptr %3, i64 40
store ptr %5, ptr %18, align 8, !tbaa !18
%19 = load i32, ptr %0, align 4, !tbaa !20
%20 = call i32 @i2c_transfer(i32 noundef %19, ptr noundef nonnull %3, i32 noundef 2) #3
%21 = icmp slt i32 %20, 2
br i1 %21, label %36, label %22
22: ; preds = %2
%23 = getelementptr inbounds i8, ptr %5, i64 12
%24 = load i32, ptr %23, align 4, !tbaa !6
%25 = shl i32 %24, 24
%26 = getelementptr inbounds i8, ptr %5, i64 8
%27 = load i32, ptr %26, align 4, !tbaa !6
%28 = shl i32 %27, 16
%29 = or i32 %28, %25
%30 = getelementptr inbounds i8, ptr %5, i64 4
%31 = load i32, ptr %30, align 4, !tbaa !6
%32 = shl i32 %31, 8
%33 = or i32 %29, %32
%34 = load i32, ptr %5, align 4, !tbaa !6
%35 = or i32 %33, %34
br label %36
36: ; preds = %2, %22
%37 = phi i32 [ %35, %22 ], [ 0, %2 ]
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %3) #3
ret i32 %37
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @i2c_transfer(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 4}
!11 = !{!"i2c_client", !7, i64 0, !7, i64 4}
!12 = !{!13, !7, i64 24}
!13 = !{!"i2c_msg", !7, i64 0, !14, i64 8, !15, i64 16, !7, i64 24}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!13, !15, i64 16}
!17 = !{!13, !7, i64 0}
!18 = !{!13, !14, i64 8}
!19 = !{!15, !15, i64 0}
!20 = !{!11, !7, i64 0}
| fastsocket_kernel_drivers_media_video_cx25840_extr_cx25840-core.c_cx25840_read4 |
; ModuleID = 'AnghaBench/linux/drivers/iio/multiplexer/extr_iio-mux.c_mux_read_ext_info.c'
source_filename = "AnghaBench/linux/drivers/iio/multiplexer/extr_iio-mux.c_mux_read_ext_info.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mux = type { ptr, i32, ptr }
%struct.TYPE_2__ = type { i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @mux_read_ext_info], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @mux_read_ext_info(ptr noundef %0, i64 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = tail call ptr @iio_priv(ptr noundef %0) #2
%6 = getelementptr inbounds %struct.mux, ptr %5, i64 0, i32 2
%7 = load ptr, ptr %6, align 8, !tbaa !5
%8 = ptrtoint ptr %2 to i64
%9 = ptrtoint ptr %7 to i64
%10 = sub i64 %8, %9
%11 = lshr exact i64 %10, 2
%12 = trunc i64 %11 to i32
%13 = tail call i64 @iio_mux_select(ptr noundef %5, i32 noundef %12) #2
%14 = icmp slt i64 %13, 0
br i1 %14, label %23, label %15
15: ; preds = %4
%16 = getelementptr inbounds %struct.mux, ptr %5, i64 0, i32 1
%17 = load i32, ptr %16, align 8, !tbaa !11
%18 = load ptr, ptr %5, align 8, !tbaa !12
%19 = getelementptr inbounds %struct.TYPE_2__, ptr %18, i64 %1
%20 = load i32, ptr %19, align 4, !tbaa !13
%21 = tail call i64 @iio_read_channel_ext_info(i32 noundef %17, i32 noundef %20, ptr noundef %3) #2
%22 = tail call i32 @iio_mux_deselect(ptr noundef nonnull %5) #2
br label %23
23: ; preds = %4, %15
%24 = phi i64 [ %21, %15 ], [ %13, %4 ]
ret i64 %24
}
declare ptr @iio_priv(ptr noundef) local_unnamed_addr #1
declare i64 @iio_mux_select(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @iio_read_channel_ext_info(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @iio_mux_deselect(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"mux", !7, i64 0, !10, i64 8, !7, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!6, !7, i64 0}
!13 = !{!14, !10, i64 0}
!14 = !{!"TYPE_2__", !10, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/iio/multiplexer/extr_iio-mux.c_mux_read_ext_info.c'
source_filename = "AnghaBench/linux/drivers/iio/multiplexer/extr_iio-mux.c_mux_read_ext_info.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32 }
@llvm.used = appending global [1 x ptr] [ptr @mux_read_ext_info], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @mux_read_ext_info(ptr noundef %0, i64 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = tail call ptr @iio_priv(ptr noundef %0) #2
%6 = getelementptr inbounds i8, ptr %5, i64 16
%7 = load ptr, ptr %6, align 8, !tbaa !6
%8 = ptrtoint ptr %2 to i64
%9 = ptrtoint ptr %7 to i64
%10 = sub i64 %8, %9
%11 = lshr exact i64 %10, 2
%12 = trunc i64 %11 to i32
%13 = tail call i64 @iio_mux_select(ptr noundef %5, i32 noundef %12) #2
%14 = icmp slt i64 %13, 0
br i1 %14, label %23, label %15
15: ; preds = %4
%16 = getelementptr inbounds i8, ptr %5, i64 8
%17 = load i32, ptr %16, align 8, !tbaa !12
%18 = load ptr, ptr %5, align 8, !tbaa !13
%19 = getelementptr inbounds %struct.TYPE_2__, ptr %18, i64 %1
%20 = load i32, ptr %19, align 4, !tbaa !14
%21 = tail call i64 @iio_read_channel_ext_info(i32 noundef %17, i32 noundef %20, ptr noundef %3) #2
%22 = tail call i32 @iio_mux_deselect(ptr noundef nonnull %5) #2
br label %23
23: ; preds = %4, %15
%24 = phi i64 [ %21, %15 ], [ %13, %4 ]
ret i64 %24
}
declare ptr @iio_priv(ptr noundef) local_unnamed_addr #1
declare i64 @iio_mux_select(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @iio_read_channel_ext_info(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @iio_mux_deselect(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"mux", !8, i64 0, !11, i64 8, !8, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!7, !8, i64 0}
!14 = !{!15, !11, i64 0}
!15 = !{!"TYPE_2__", !11, i64 0}
| linux_drivers_iio_multiplexer_extr_iio-mux.c_mux_read_ext_info |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/mips/alchemy/common/extr_gpiolib-au1000.c_gpio1_direction_input.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/mips/alchemy/common/extr_gpiolib-au1000.c_gpio1_direction_input.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ALCHEMY_GPIO1_BASE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @gpio1_direction_input], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @gpio1_direction_input(ptr nocapture readnone %0, i32 noundef %1) #0 {
%3 = load i32, ptr @ALCHEMY_GPIO1_BASE, align 4, !tbaa !5
%4 = add i32 %3, %1
%5 = tail call i32 @alchemy_gpio1_direction_input(i32 noundef %4) #2
ret i32 %5
}
declare i32 @alchemy_gpio1_direction_input(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/mips/alchemy/common/extr_gpiolib-au1000.c_gpio1_direction_input.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/mips/alchemy/common/extr_gpiolib-au1000.c_gpio1_direction_input.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ALCHEMY_GPIO1_BASE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @gpio1_direction_input], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @gpio1_direction_input(ptr nocapture readnone %0, i32 noundef %1) #0 {
%3 = load i32, ptr @ALCHEMY_GPIO1_BASE, align 4, !tbaa !6
%4 = add i32 %3, %1
%5 = tail call i32 @alchemy_gpio1_direction_input(i32 noundef %4) #2
ret i32 %5
}
declare i32 @alchemy_gpio1_direction_input(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_arch_mips_alchemy_common_extr_gpiolib-au1000.c_gpio1_direction_input |
; ModuleID = 'AnghaBench/freebsd/contrib/openbsm/libbsm/extr_bsm_domain.c_bsm_lookup_bsm_domain.c'
source_filename = "AnghaBench/freebsd/contrib/openbsm/libbsm/extr_bsm_domain.c_bsm_lookup_bsm_domain.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bsm_domain = type { i64 }
@bsm_domains_count = dso_local local_unnamed_addr global i32 0, align 4
@bsm_domains = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @bsm_lookup_bsm_domain], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable
define internal ptr @bsm_lookup_bsm_domain(i64 noundef %0) #0 {
%2 = load i32, ptr @bsm_domains_count, align 4, !tbaa !5
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %17
4: ; preds = %1
%5 = load ptr, ptr @bsm_domains, align 8, !tbaa !9
%6 = zext nneg i32 %2 to i64
br label %10
7: ; preds = %10
%8 = add nuw nsw i64 %11, 1
%9 = icmp eq i64 %8, %6
br i1 %9, label %17, label %10, !llvm.loop !11
10: ; preds = %4, %7
%11 = phi i64 [ 0, %4 ], [ %8, %7 ]
%12 = getelementptr inbounds %struct.bsm_domain, ptr %5, i64 %11
%13 = load i64, ptr %12, align 8, !tbaa !13
%14 = icmp eq i64 %13, %0
br i1 %14, label %15, label %7
15: ; preds = %10
%16 = getelementptr inbounds %struct.bsm_domain, ptr %5, i64 %11
br label %17
17: ; preds = %7, %15, %1
%18 = phi ptr [ null, %1 ], [ %16, %15 ], [ null, %7 ]
ret ptr %18
}
attributes #0 = { nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !15, i64 0}
!14 = !{!"bsm_domain", !15, i64 0}
!15 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/openbsm/libbsm/extr_bsm_domain.c_bsm_lookup_bsm_domain.c'
source_filename = "AnghaBench/freebsd/contrib/openbsm/libbsm/extr_bsm_domain.c_bsm_lookup_bsm_domain.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.bsm_domain = type { i64 }
@bsm_domains_count = common local_unnamed_addr global i32 0, align 4
@bsm_domains = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @bsm_lookup_bsm_domain], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal ptr @bsm_lookup_bsm_domain(i64 noundef %0) #0 {
%2 = load i32, ptr @bsm_domains_count, align 4, !tbaa !6
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %17
4: ; preds = %1
%5 = load ptr, ptr @bsm_domains, align 8, !tbaa !10
%6 = zext nneg i32 %2 to i64
br label %10
7: ; preds = %10
%8 = add nuw nsw i64 %11, 1
%9 = icmp eq i64 %8, %6
br i1 %9, label %17, label %10, !llvm.loop !12
10: ; preds = %4, %7
%11 = phi i64 [ 0, %4 ], [ %8, %7 ]
%12 = getelementptr inbounds %struct.bsm_domain, ptr %5, i64 %11
%13 = load i64, ptr %12, align 8, !tbaa !14
%14 = icmp eq i64 %13, %0
br i1 %14, label %15, label %7
15: ; preds = %10
%16 = getelementptr inbounds %struct.bsm_domain, ptr %5, i64 %11
br label %17
17: ; preds = %15, %7, %1
%18 = phi ptr [ null, %1 ], [ %16, %15 ], [ null, %7 ]
ret ptr %18
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!15, !16, i64 0}
!15 = !{!"bsm_domain", !16, i64 0}
!16 = !{!"long", !8, i64 0}
| freebsd_contrib_openbsm_libbsm_extr_bsm_domain.c_bsm_lookup_bsm_domain |
; ModuleID = 'AnghaBench/sumatrapdf/ext/lzma/C/extr_LzmaDec.c_LzmaDec_AllocateProbs.c'
source_filename = "AnghaBench/sumatrapdf/ext/lzma/C/extr_LzmaDec.c_LzmaDec_AllocateProbs.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SZ_OK = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @LzmaDec_AllocateProbs(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%6 = call i32 @LzmaProps_Decode(ptr noundef nonnull %5, ptr noundef %1, i32 noundef %2) #3
%7 = call i32 @RINOK(i32 noundef %6) #3
%8 = call i32 @LzmaDec_AllocateProbs2(ptr noundef %0, ptr noundef nonnull %5, ptr noundef %3) #3
%9 = call i32 @RINOK(i32 noundef %8) #3
%10 = load i32, ptr %5, align 4, !tbaa !5
store i32 %10, ptr %0, align 4, !tbaa !9
%11 = load i32, ptr @SZ_OK, align 4, !tbaa !5
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
ret i32 %11
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @RINOK(i32 noundef) local_unnamed_addr #2
declare i32 @LzmaProps_Decode(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @LzmaDec_AllocateProbs2(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_4__", !6, i64 0}
| ; ModuleID = 'AnghaBench/sumatrapdf/ext/lzma/C/extr_LzmaDec.c_LzmaDec_AllocateProbs.c'
source_filename = "AnghaBench/sumatrapdf/ext/lzma/C/extr_LzmaDec.c_LzmaDec_AllocateProbs.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SZ_OK = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @LzmaDec_AllocateProbs(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%6 = call i32 @LzmaProps_Decode(ptr noundef nonnull %5, ptr noundef %1, i32 noundef %2) #3
%7 = call i32 @RINOK(i32 noundef %6) #3
%8 = call i32 @LzmaDec_AllocateProbs2(ptr noundef %0, ptr noundef nonnull %5, ptr noundef %3) #3
%9 = call i32 @RINOK(i32 noundef %8) #3
%10 = load i32, ptr %5, align 4, !tbaa !6
store i32 %10, ptr %0, align 4, !tbaa !10
%11 = load i32, ptr @SZ_OK, align 4, !tbaa !6
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
ret i32 %11
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @RINOK(i32 noundef) local_unnamed_addr #2
declare i32 @LzmaProps_Decode(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @LzmaDec_AllocateProbs2(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_4__", !7, i64 0}
| sumatrapdf_ext_lzma_C_extr_LzmaDec.c_LzmaDec_AllocateProbs |
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/ssl/extr_ssl_ciph.c_SSL_COMP_get_name.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/ssl/extr_ssl_ciph.c_SSL_COMP_get_name.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local ptr @SSL_COMP_get_name(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call ptr @COMP_get_name(ptr noundef nonnull %0) #2
br label %5
5: ; preds = %1, %3
%6 = phi ptr [ %4, %3 ], [ null, %1 ]
ret ptr %6
}
declare ptr @COMP_get_name(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/crypto/openssl/ssl/extr_ssl_ciph.c_SSL_COMP_get_name.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/ssl/extr_ssl_ciph.c_SSL_COMP_get_name.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @SSL_COMP_get_name(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call ptr @COMP_get_name(ptr noundef nonnull %0) #2
br label %5
5: ; preds = %1, %3
%6 = phi ptr [ %4, %3 ], [ null, %1 ]
ret ptr %6
}
declare ptr @COMP_get_name(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_crypto_openssl_ssl_extr_ssl_ciph.c_SSL_COMP_get_name |
; ModuleID = 'AnghaBench/linux/mm/extr_util.c_randomize_stack_top.c'
source_filename = "AnghaBench/linux/mm/extr_util.c_randomize_stack_top.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@current = dso_local local_unnamed_addr global ptr null, align 8
@PF_RANDOMIZE = dso_local local_unnamed_addr global i32 0, align 4
@STACK_RND_MASK = dso_local local_unnamed_addr global i64 0, align 8
@PAGE_SHIFT = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i64 @randomize_stack_top(i64 noundef %0) local_unnamed_addr #0 {
%2 = load ptr, ptr @current, align 8, !tbaa !5
%3 = load i32, ptr %2, align 4, !tbaa !9
%4 = load i32, ptr @PF_RANDOMIZE, align 4, !tbaa !12
%5 = and i32 %4, %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %1
%8 = tail call i64 (...) @get_random_long() #2
%9 = load i64, ptr @STACK_RND_MASK, align 8, !tbaa !13
%10 = and i64 %9, %8
%11 = load i64, ptr @PAGE_SHIFT, align 8, !tbaa !13
%12 = shl i64 %10, %11
br label %13
13: ; preds = %7, %1
%14 = phi i64 [ %12, %7 ], [ 0, %1 ]
%15 = tail call i64 @PAGE_ALIGN(i64 noundef %0) #2
%16 = sub i64 %15, %14
ret i64 %16
}
declare i64 @get_random_long(...) local_unnamed_addr #1
declare i64 @PAGE_ALIGN(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_2__", !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/mm/extr_util.c_randomize_stack_top.c'
source_filename = "AnghaBench/linux/mm/extr_util.c_randomize_stack_top.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@current = common local_unnamed_addr global ptr null, align 8
@PF_RANDOMIZE = common local_unnamed_addr global i32 0, align 4
@STACK_RND_MASK = common local_unnamed_addr global i64 0, align 8
@PAGE_SHIFT = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @randomize_stack_top(i64 noundef %0) local_unnamed_addr #0 {
%2 = load ptr, ptr @current, align 8, !tbaa !6
%3 = load i32, ptr %2, align 4, !tbaa !10
%4 = load i32, ptr @PF_RANDOMIZE, align 4, !tbaa !13
%5 = and i32 %4, %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %1
%8 = tail call i64 @get_random_long() #2
%9 = load i64, ptr @STACK_RND_MASK, align 8, !tbaa !14
%10 = and i64 %9, %8
%11 = load i64, ptr @PAGE_SHIFT, align 8, !tbaa !14
%12 = shl i64 %10, %11
br label %13
13: ; preds = %7, %1
%14 = phi i64 [ %12, %7 ], [ 0, %1 ]
%15 = tail call i64 @PAGE_ALIGN(i64 noundef %0) #2
%16 = sub i64 %15, %14
ret i64 %16
}
declare i64 @get_random_long(...) local_unnamed_addr #1
declare i64 @PAGE_ALIGN(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !8, i64 0}
| linux_mm_extr_util.c_randomize_stack_top |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/hdmi/extr_hdmi.xml.h_HDMI_ACTIVE_VSYNC_START.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/hdmi/extr_hdmi.xml.h_HDMI_ACTIVE_VSYNC_START.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@HDMI_ACTIVE_VSYNC_START__SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@HDMI_ACTIVE_VSYNC_START__MASK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @HDMI_ACTIVE_VSYNC_START], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal i32 @HDMI_ACTIVE_VSYNC_START(i32 noundef %0) #0 {
%2 = load i32, ptr @HDMI_ACTIVE_VSYNC_START__SHIFT, align 4, !tbaa !5
%3 = shl i32 %0, %2
%4 = load i32, ptr @HDMI_ACTIVE_VSYNC_START__MASK, align 4, !tbaa !5
%5 = and i32 %3, %4
ret i32 %5
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/hdmi/extr_hdmi.xml.h_HDMI_ACTIVE_VSYNC_START.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/hdmi/extr_hdmi.xml.h_HDMI_ACTIVE_VSYNC_START.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@HDMI_ACTIVE_VSYNC_START__SHIFT = common local_unnamed_addr global i32 0, align 4
@HDMI_ACTIVE_VSYNC_START__MASK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @HDMI_ACTIVE_VSYNC_START], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal i32 @HDMI_ACTIVE_VSYNC_START(i32 noundef %0) #0 {
%2 = load i32, ptr @HDMI_ACTIVE_VSYNC_START__SHIFT, align 4, !tbaa !6
%3 = shl i32 %0, %2
%4 = load i32, ptr @HDMI_ACTIVE_VSYNC_START__MASK, align 4, !tbaa !6
%5 = and i32 %3, %4
ret i32 %5
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_gpu_drm_msm_hdmi_extr_hdmi.xml.h_HDMI_ACTIVE_VSYNC_START |
; ModuleID = 'AnghaBench/lz4/lib/extr_lz4.c_LZ4_compress_withState.c'
source_filename = "AnghaBench/lz4/lib/extr_lz4.c_LZ4_compress_withState.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @LZ4_compress_withState(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = tail call i32 @LZ4_compressBound(i32 noundef %3) #2
%6 = tail call i32 @LZ4_compress_fast_extState(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %5, i32 noundef 1) #2
ret i32 %6
}
declare i32 @LZ4_compress_fast_extState(ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LZ4_compressBound(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/lz4/lib/extr_lz4.c_LZ4_compress_withState.c'
source_filename = "AnghaBench/lz4/lib/extr_lz4.c_LZ4_compress_withState.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @LZ4_compress_withState(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = tail call i32 @LZ4_compressBound(i32 noundef %3) #2
%6 = tail call i32 @LZ4_compress_fast_extState(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %5, i32 noundef 1) #2
ret i32 %6
}
declare i32 @LZ4_compress_fast_extState(ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LZ4_compressBound(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| lz4_lib_extr_lz4.c_LZ4_compress_withState |
; ModuleID = 'AnghaBench/sumatrapdf/ext/synctex/extr_synctex_parser.c_synctex_node_next.c'
source_filename = "AnghaBench/sumatrapdf/ext/synctex/extr_synctex_parser.c_synctex_node_next.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@synctex_node_type_sheet = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local ptr @synctex_node_next(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @SYNCTEX_CHILD(ptr noundef %0) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call ptr @SYNCTEX_CHILD(ptr noundef %0) #2
br label %20
6: ; preds = %1, %15
%7 = phi ptr [ %13, %15 ], [ %0, %1 ]
%8 = tail call ptr @SYNCTEX_SIBLING(ptr noundef %7) #2
%9 = icmp eq ptr %8, null
br i1 %9, label %12, label %10
10: ; preds = %6
%11 = tail call ptr @SYNCTEX_SIBLING(ptr noundef %7) #2
br label %20
12: ; preds = %6
%13 = tail call ptr @SYNCTEX_PARENT(ptr noundef %7) #2
%14 = icmp eq ptr %13, null
br i1 %14, label %20, label %15
15: ; preds = %12
%16 = load ptr, ptr %13, align 8, !tbaa !5
%17 = load i64, ptr %16, align 8, !tbaa !10
%18 = load i64, ptr @synctex_node_type_sheet, align 8, !tbaa !13
%19 = icmp eq i64 %17, %18
br i1 %19, label %20, label %6
20: ; preds = %12, %15, %10, %4
%21 = phi ptr [ %5, %4 ], [ %11, %10 ], [ null, %15 ], [ null, %12 ]
ret ptr %21
}
declare ptr @SYNCTEX_CHILD(ptr noundef) local_unnamed_addr #1
declare ptr @SYNCTEX_SIBLING(ptr noundef) local_unnamed_addr #1
declare ptr @SYNCTEX_PARENT(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_12__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_11__", !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!12, !12, i64 0}
| ; ModuleID = 'AnghaBench/sumatrapdf/ext/synctex/extr_synctex_parser.c_synctex_node_next.c'
source_filename = "AnghaBench/sumatrapdf/ext/synctex/extr_synctex_parser.c_synctex_node_next.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@synctex_node_type_sheet = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @synctex_node_next(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @SYNCTEX_CHILD(ptr noundef %0) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call ptr @SYNCTEX_CHILD(ptr noundef %0) #2
br label %20
6: ; preds = %1, %15
%7 = phi ptr [ %13, %15 ], [ %0, %1 ]
%8 = tail call ptr @SYNCTEX_SIBLING(ptr noundef %7) #2
%9 = icmp eq ptr %8, null
br i1 %9, label %12, label %10
10: ; preds = %6
%11 = tail call ptr @SYNCTEX_SIBLING(ptr noundef %7) #2
br label %20
12: ; preds = %6
%13 = tail call ptr @SYNCTEX_PARENT(ptr noundef %7) #2
%14 = icmp eq ptr %13, null
br i1 %14, label %20, label %15
15: ; preds = %12
%16 = load ptr, ptr %13, align 8, !tbaa !6
%17 = load i64, ptr %16, align 8, !tbaa !11
%18 = load i64, ptr @synctex_node_type_sheet, align 8, !tbaa !14
%19 = icmp eq i64 %17, %18
br i1 %19, label %20, label %6
20: ; preds = %12, %15, %10, %4
%21 = phi ptr [ %5, %4 ], [ %11, %10 ], [ null, %15 ], [ null, %12 ]
ret ptr %21
}
declare ptr @SYNCTEX_CHILD(ptr noundef) local_unnamed_addr #1
declare ptr @SYNCTEX_SIBLING(ptr noundef) local_unnamed_addr #1
declare ptr @SYNCTEX_PARENT(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_12__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_11__", !13, i64 0}
!13 = !{!"long", !9, i64 0}
!14 = !{!13, !13, i64 0}
| sumatrapdf_ext_synctex_extr_synctex_parser.c_synctex_node_next |
; ModuleID = 'AnghaBench/obs-studio/libobs/extr_obs-encoder.c_obs_encoder_shutdown.c'
source_filename = "AnghaBench/obs-studio/libobs/extr_obs-encoder.c_obs_encoder_shutdown.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_7__ = type { i32, i32, i64, i64, ptr, %struct.TYPE_6__, %struct.TYPE_5__ }
%struct.TYPE_6__ = type { ptr }
%struct.TYPE_5__ = type { ptr }
; Function Attrs: nounwind uwtable
define dso_local void @obs_encoder_shutdown(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 1
%3 = tail call i32 @pthread_mutex_lock(ptr noundef nonnull %2) #3
%4 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 5
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = icmp eq ptr %5, null
br i1 %6, label %12, label %7
7: ; preds = %1
%8 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 6
%9 = load ptr, ptr %8, align 8, !tbaa !14
%10 = tail call i32 %9(ptr noundef nonnull %5) #3
store i32 0, ptr %0, align 8, !tbaa !15
%11 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 2
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %11, i8 0, i64 32, i1 false)
br label %12
12: ; preds = %7, %1
%13 = tail call i32 @pthread_mutex_unlock(ptr noundef nonnull %2) #3
ret void
}
declare i32 @pthread_mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @pthread_mutex_unlock(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 32}
!6 = !{!"TYPE_7__", !7, i64 0, !7, i64 4, !10, i64 8, !10, i64 16, !11, i64 24, !12, i64 32, !13, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!"TYPE_6__", !11, i64 0}
!13 = !{!"TYPE_5__", !11, i64 0}
!14 = !{!6, !11, i64 40}
!15 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/obs-studio/libobs/extr_obs-encoder.c_obs_encoder_shutdown.c'
source_filename = "AnghaBench/obs-studio/libobs/extr_obs-encoder.c_obs_encoder_shutdown.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @obs_encoder_shutdown(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 4
%3 = tail call i32 @pthread_mutex_lock(ptr noundef nonnull %2) #3
%4 = getelementptr inbounds i8, ptr %0, i64 32
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = icmp eq ptr %5, null
br i1 %6, label %12, label %7
7: ; preds = %1
%8 = getelementptr inbounds i8, ptr %0, i64 40
%9 = load ptr, ptr %8, align 8, !tbaa !15
%10 = tail call i32 %9(ptr noundef nonnull %5) #3
store i32 0, ptr %0, align 8, !tbaa !16
%11 = getelementptr inbounds i8, ptr %0, i64 8
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %11, i8 0, i64 32, i1 false)
br label %12
12: ; preds = %7, %1
%13 = tail call i32 @pthread_mutex_unlock(ptr noundef nonnull %2) #3
ret void
}
declare i32 @pthread_mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @pthread_mutex_unlock(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 32}
!7 = !{!"TYPE_7__", !8, i64 0, !8, i64 4, !11, i64 8, !11, i64 16, !12, i64 24, !13, i64 32, !14, i64 40}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!"TYPE_6__", !12, i64 0}
!14 = !{!"TYPE_5__", !12, i64 0}
!15 = !{!7, !12, i64 40}
!16 = !{!7, !8, i64 0}
| obs-studio_libobs_extr_obs-encoder.c_obs_encoder_shutdown |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/extr_drm_fb_helper.c_drm_fb_helper_restore_lut_atomic.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/extr_drm_fb_helper.c_drm_fb_helper_restore_lut_atomic.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.drm_crtc = type { i32, ptr, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @drm_fb_helper_restore_lut_atomic], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @drm_fb_helper_restore_lut_atomic(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.drm_crtc, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load ptr, ptr %3, align 8, !tbaa !11
%5 = icmp eq ptr %4, null
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = getelementptr inbounds %struct.drm_crtc, ptr %0, i64 0, i32 2
%8 = load ptr, ptr %7, align 8, !tbaa !13
%9 = load i32, ptr %0, align 8, !tbaa !14
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, ptr %8, i64 %10
%12 = getelementptr inbounds i32, ptr %11, i64 %10
%13 = tail call i32 %4(ptr noundef nonnull %0, ptr noundef %8, ptr noundef %11, ptr noundef %12, i32 noundef 0, i32 noundef %9) #1
br label %14
14: ; preds = %1, %6
ret void
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"drm_crtc", !7, i64 0, !10, i64 8, !10, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_2__", !10, i64 0}
!13 = !{!6, !10, i64 16}
!14 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/extr_drm_fb_helper.c_drm_fb_helper_restore_lut_atomic.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/extr_drm_fb_helper.c_drm_fb_helper_restore_lut_atomic.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @drm_fb_helper_restore_lut_atomic], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @drm_fb_helper_restore_lut_atomic(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load ptr, ptr %3, align 8, !tbaa !12
%5 = icmp eq ptr %4, null
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = getelementptr inbounds i8, ptr %0, i64 16
%8 = load ptr, ptr %7, align 8, !tbaa !14
%9 = load i32, ptr %0, align 8, !tbaa !15
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, ptr %8, i64 %10
%12 = getelementptr inbounds i32, ptr %11, i64 %10
%13 = tail call i32 %4(ptr noundef nonnull %0, ptr noundef %8, ptr noundef %11, ptr noundef %12, i32 noundef 0, i32 noundef %9) #1
br label %14
14: ; preds = %1, %6
ret void
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"drm_crtc", !8, i64 0, !11, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_2__", !11, i64 0}
!14 = !{!7, !11, i64 16}
!15 = !{!7, !8, i64 0}
| fastsocket_kernel_drivers_gpu_drm_extr_drm_fb_helper.c_drm_fb_helper_restore_lut_atomic |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_uvd_v6_0.c_uvd_v6_0_enc_get_destroy_msg.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_uvd_v6_0.c_uvd_v6_0_enc_get_destroy_msg.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.amdgpu_ib = type { i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @uvd_v6_0_enc_get_destroy_msg], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @uvd_v6_0_enc_get_destroy_msg(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef writeonly %3) #0 {
%5 = alloca ptr, align 8
%6 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #4
store ptr null, ptr %6, align 8, !tbaa !5
%7 = load i32, ptr %0, align 4, !tbaa !9
%8 = call i32 @amdgpu_job_alloc_with_ib(i32 noundef %7, i32 noundef 64, ptr noundef nonnull %5) #4
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %91
10: ; preds = %4
%11 = load ptr, ptr %5, align 8, !tbaa !5
%12 = load ptr, ptr %11, align 8, !tbaa !12
%13 = call i32 @amdgpu_bo_gpu_offset(ptr noundef %2) #4
%14 = getelementptr inbounds %struct.amdgpu_ib, ptr %12, i64 0, i32 1
%15 = load ptr, ptr %14, align 8, !tbaa !14
store i32 1, ptr %12, align 8, !tbaa !16
store i32 24, ptr %15, align 4, !tbaa !17
%16 = load i32, ptr %12, align 8, !tbaa !16
%17 = add nsw i32 %16, 1
store i32 %17, ptr %12, align 8, !tbaa !16
%18 = sext i32 %16 to i64
%19 = getelementptr inbounds i32, ptr %15, i64 %18
store i32 1, ptr %19, align 4, !tbaa !17
%20 = load i32, ptr %12, align 8, !tbaa !16
%21 = add nsw i32 %20, 1
store i32 %21, ptr %12, align 8, !tbaa !16
%22 = sext i32 %20 to i64
%23 = getelementptr inbounds i32, ptr %15, i64 %22
store i32 %1, ptr %23, align 4, !tbaa !17
%24 = load i32, ptr %12, align 8, !tbaa !16
%25 = add nsw i32 %24, 1
store i32 %25, ptr %12, align 8, !tbaa !16
%26 = sext i32 %24 to i64
%27 = getelementptr inbounds i32, ptr %15, i64 %26
store i32 65536, ptr %27, align 4, !tbaa !17
%28 = call i32 @upper_32_bits(i32 noundef %13) #4
%29 = load ptr, ptr %14, align 8, !tbaa !14
%30 = load i32, ptr %12, align 8, !tbaa !16
%31 = add nsw i32 %30, 1
store i32 %31, ptr %12, align 8, !tbaa !16
%32 = sext i32 %30 to i64
%33 = getelementptr inbounds i32, ptr %29, i64 %32
store i32 %28, ptr %33, align 4, !tbaa !17
%34 = load i32, ptr %12, align 8, !tbaa !16
%35 = add nsw i32 %34, 1
store i32 %35, ptr %12, align 8, !tbaa !16
%36 = sext i32 %34 to i64
%37 = getelementptr inbounds i32, ptr %29, i64 %36
store i32 %13, ptr %37, align 4, !tbaa !17
%38 = load i32, ptr %12, align 8, !tbaa !16
%39 = add nsw i32 %38, 1
store i32 %39, ptr %12, align 8, !tbaa !16
%40 = sext i32 %38 to i64
%41 = getelementptr inbounds i32, ptr %29, i64 %40
store i32 20, ptr %41, align 4, !tbaa !17
%42 = load i32, ptr %12, align 8, !tbaa !16
%43 = add nsw i32 %42, 1
store i32 %43, ptr %12, align 8, !tbaa !16
%44 = sext i32 %42 to i64
%45 = getelementptr inbounds i32, ptr %29, i64 %44
store i32 2, ptr %45, align 4, !tbaa !17
%46 = load i32, ptr %12, align 8, !tbaa !16
%47 = add nsw i32 %46, 1
store i32 %47, ptr %12, align 8, !tbaa !16
%48 = sext i32 %46 to i64
%49 = getelementptr inbounds i32, ptr %29, i64 %48
store i32 28, ptr %49, align 4, !tbaa !17
%50 = load i32, ptr %12, align 8, !tbaa !16
%51 = add nsw i32 %50, 1
store i32 %51, ptr %12, align 8, !tbaa !16
%52 = sext i32 %50 to i64
%53 = getelementptr inbounds i32, ptr %29, i64 %52
store i32 1, ptr %53, align 4, !tbaa !17
%54 = load i32, ptr %12, align 8, !tbaa !16
%55 = add nsw i32 %54, 1
store i32 %55, ptr %12, align 8, !tbaa !16
%56 = sext i32 %54 to i64
%57 = getelementptr inbounds i32, ptr %29, i64 %56
store i32 0, ptr %57, align 4, !tbaa !17
%58 = load i32, ptr %12, align 8, !tbaa !16
%59 = add nsw i32 %58, 1
store i32 %59, ptr %12, align 8, !tbaa !16
%60 = sext i32 %58 to i64
%61 = getelementptr inbounds i32, ptr %29, i64 %60
store i32 8, ptr %61, align 4, !tbaa !17
%62 = load i32, ptr %12, align 8, !tbaa !16
%63 = add nsw i32 %62, 1
store i32 %63, ptr %12, align 8, !tbaa !16
%64 = sext i32 %62 to i64
%65 = getelementptr inbounds i32, ptr %29, i64 %64
store i32 134217730, ptr %65, align 4, !tbaa !17
%66 = load i32, ptr %12, align 8, !tbaa !16
%67 = icmp ult i32 %66, 16
br i1 %67, label %68, label %76
68: ; preds = %10
%69 = shl nuw nsw i32 %66, 2
%70 = zext nneg i32 %69 to i64
%71 = getelementptr i8, ptr %29, i64 %70
%72 = shl nuw nsw i32 %66, 2
%73 = xor i32 %72, 60
%74 = add nuw nsw i32 %73, 4
%75 = zext nneg i32 %74 to i64
call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(1) %71, i8 0, i64 %75, i1 false), !tbaa !17
br label %76
76: ; preds = %68, %10
%77 = load ptr, ptr %5, align 8, !tbaa !5
%78 = call i32 @amdgpu_job_submit_direct(ptr noundef %77, ptr noundef nonnull %0, ptr noundef nonnull %6) #4
%79 = icmp eq i32 %78, 0
br i1 %79, label %80, label %88
80: ; preds = %76
%81 = icmp eq ptr %3, null
br i1 %81, label %85, label %82
82: ; preds = %80
%83 = load ptr, ptr %6, align 8, !tbaa !5
%84 = call ptr @dma_fence_get(ptr noundef %83) #4
store ptr %84, ptr %3, align 8, !tbaa !5
br label %85
85: ; preds = %82, %80
%86 = load ptr, ptr %6, align 8, !tbaa !5
%87 = call i32 @dma_fence_put(ptr noundef %86) #4
br label %91
88: ; preds = %76
%89 = load ptr, ptr %5, align 8, !tbaa !5
%90 = call i32 @amdgpu_job_free(ptr noundef %89) #4
br label %91
91: ; preds = %4, %88, %85
%92 = phi i32 [ %78, %88 ], [ 0, %85 ], [ %8, %4 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #4
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #4
ret i32 %92
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @amdgpu_job_alloc_with_ib(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @amdgpu_bo_gpu_offset(ptr noundef) local_unnamed_addr #2
declare i32 @upper_32_bits(i32 noundef) local_unnamed_addr #2
declare i32 @amdgpu_job_submit_direct(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @dma_fence_get(ptr noundef) local_unnamed_addr #2
declare i32 @dma_fence_put(ptr noundef) local_unnamed_addr #2
declare i32 @amdgpu_job_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"amdgpu_ring", !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"amdgpu_job", !6, i64 0}
!14 = !{!15, !6, i64 8}
!15 = !{!"amdgpu_ib", !11, i64 0, !6, i64 8}
!16 = !{!15, !11, i64 0}
!17 = !{!11, !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_uvd_v6_0.c_uvd_v6_0_enc_get_destroy_msg.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_uvd_v6_0.c_uvd_v6_0_enc_get_destroy_msg.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @uvd_v6_0_enc_get_destroy_msg], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @uvd_v6_0_enc_get_destroy_msg(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef writeonly %3) #0 {
%5 = alloca ptr, align 8
%6 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #4
store ptr null, ptr %6, align 8, !tbaa !6
%7 = load i32, ptr %0, align 4, !tbaa !10
%8 = call i32 @amdgpu_job_alloc_with_ib(i32 noundef %7, i32 noundef 64, ptr noundef nonnull %5) #4
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %89
10: ; preds = %4
%11 = load ptr, ptr %5, align 8, !tbaa !6
%12 = load ptr, ptr %11, align 8, !tbaa !13
%13 = call i32 @amdgpu_bo_gpu_offset(ptr noundef %2) #4
%14 = getelementptr inbounds i8, ptr %12, i64 8
%15 = load ptr, ptr %14, align 8, !tbaa !15
store i32 1, ptr %12, align 8, !tbaa !17
store i32 24, ptr %15, align 4, !tbaa !18
%16 = load i32, ptr %12, align 8, !tbaa !17
%17 = add nsw i32 %16, 1
store i32 %17, ptr %12, align 8, !tbaa !17
%18 = sext i32 %16 to i64
%19 = getelementptr inbounds i32, ptr %15, i64 %18
store i32 1, ptr %19, align 4, !tbaa !18
%20 = load i32, ptr %12, align 8, !tbaa !17
%21 = add nsw i32 %20, 1
store i32 %21, ptr %12, align 8, !tbaa !17
%22 = sext i32 %20 to i64
%23 = getelementptr inbounds i32, ptr %15, i64 %22
store i32 %1, ptr %23, align 4, !tbaa !18
%24 = load i32, ptr %12, align 8, !tbaa !17
%25 = add nsw i32 %24, 1
store i32 %25, ptr %12, align 8, !tbaa !17
%26 = sext i32 %24 to i64
%27 = getelementptr inbounds i32, ptr %15, i64 %26
store i32 65536, ptr %27, align 4, !tbaa !18
%28 = call i32 @upper_32_bits(i32 noundef %13) #4
%29 = load ptr, ptr %14, align 8, !tbaa !15
%30 = load i32, ptr %12, align 8, !tbaa !17
%31 = add nsw i32 %30, 1
store i32 %31, ptr %12, align 8, !tbaa !17
%32 = sext i32 %30 to i64
%33 = getelementptr inbounds i32, ptr %29, i64 %32
store i32 %28, ptr %33, align 4, !tbaa !18
%34 = load i32, ptr %12, align 8, !tbaa !17
%35 = add nsw i32 %34, 1
store i32 %35, ptr %12, align 8, !tbaa !17
%36 = sext i32 %34 to i64
%37 = getelementptr inbounds i32, ptr %29, i64 %36
store i32 %13, ptr %37, align 4, !tbaa !18
%38 = load i32, ptr %12, align 8, !tbaa !17
%39 = add nsw i32 %38, 1
store i32 %39, ptr %12, align 8, !tbaa !17
%40 = sext i32 %38 to i64
%41 = getelementptr inbounds i32, ptr %29, i64 %40
store i32 20, ptr %41, align 4, !tbaa !18
%42 = load i32, ptr %12, align 8, !tbaa !17
%43 = add nsw i32 %42, 1
store i32 %43, ptr %12, align 8, !tbaa !17
%44 = sext i32 %42 to i64
%45 = getelementptr inbounds i32, ptr %29, i64 %44
store i32 2, ptr %45, align 4, !tbaa !18
%46 = load i32, ptr %12, align 8, !tbaa !17
%47 = add nsw i32 %46, 1
store i32 %47, ptr %12, align 8, !tbaa !17
%48 = sext i32 %46 to i64
%49 = getelementptr inbounds i32, ptr %29, i64 %48
store i32 28, ptr %49, align 4, !tbaa !18
%50 = load i32, ptr %12, align 8, !tbaa !17
%51 = add nsw i32 %50, 1
store i32 %51, ptr %12, align 8, !tbaa !17
%52 = sext i32 %50 to i64
%53 = getelementptr inbounds i32, ptr %29, i64 %52
store i32 1, ptr %53, align 4, !tbaa !18
%54 = load i32, ptr %12, align 8, !tbaa !17
%55 = add nsw i32 %54, 1
store i32 %55, ptr %12, align 8, !tbaa !17
%56 = sext i32 %54 to i64
%57 = getelementptr inbounds i32, ptr %29, i64 %56
store i32 0, ptr %57, align 4, !tbaa !18
%58 = load i32, ptr %12, align 8, !tbaa !17
%59 = add nsw i32 %58, 1
store i32 %59, ptr %12, align 8, !tbaa !17
%60 = sext i32 %58 to i64
%61 = getelementptr inbounds i32, ptr %29, i64 %60
store i32 8, ptr %61, align 4, !tbaa !18
%62 = load i32, ptr %12, align 8, !tbaa !17
%63 = add nsw i32 %62, 1
store i32 %63, ptr %12, align 8, !tbaa !17
%64 = sext i32 %62 to i64
%65 = getelementptr inbounds i32, ptr %29, i64 %64
store i32 134217730, ptr %65, align 4, !tbaa !18
%66 = load i32, ptr %12, align 8, !tbaa !17
%67 = icmp ult i32 %66, 16
br i1 %67, label %68, label %74
68: ; preds = %10
%69 = shl nuw nsw i32 %66, 2
%70 = zext nneg i32 %69 to i64
%71 = getelementptr i8, ptr %29, i64 %70
%72 = sub nuw nsw i32 64, %69
%73 = zext nneg i32 %72 to i64
call void @llvm.memset.p0.i64(ptr align 4 %71, i8 0, i64 %73, i1 false), !tbaa !18
br label %74
74: ; preds = %68, %10
%75 = load ptr, ptr %5, align 8, !tbaa !6
%76 = call i32 @amdgpu_job_submit_direct(ptr noundef %75, ptr noundef nonnull %0, ptr noundef nonnull %6) #4
%77 = icmp eq i32 %76, 0
br i1 %77, label %78, label %86
78: ; preds = %74
%79 = icmp eq ptr %3, null
br i1 %79, label %83, label %80
80: ; preds = %78
%81 = load ptr, ptr %6, align 8, !tbaa !6
%82 = call ptr @dma_fence_get(ptr noundef %81) #4
store ptr %82, ptr %3, align 8, !tbaa !6
br label %83
83: ; preds = %80, %78
%84 = load ptr, ptr %6, align 8, !tbaa !6
%85 = call i32 @dma_fence_put(ptr noundef %84) #4
br label %89
86: ; preds = %74
%87 = load ptr, ptr %5, align 8, !tbaa !6
%88 = call i32 @amdgpu_job_free(ptr noundef %87) #4
br label %89
89: ; preds = %4, %86, %83
%90 = phi i32 [ %76, %86 ], [ 0, %83 ], [ %8, %4 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #4
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #4
ret i32 %90
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @amdgpu_job_alloc_with_ib(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @amdgpu_bo_gpu_offset(ptr noundef) local_unnamed_addr #2
declare i32 @upper_32_bits(i32 noundef) local_unnamed_addr #2
declare i32 @amdgpu_job_submit_direct(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @dma_fence_get(ptr noundef) local_unnamed_addr #2
declare i32 @dma_fence_put(ptr noundef) local_unnamed_addr #2
declare i32 @amdgpu_job_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"amdgpu_ring", !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"amdgpu_job", !7, i64 0}
!15 = !{!16, !7, i64 8}
!16 = !{!"amdgpu_ib", !12, i64 0, !7, i64 8}
!17 = !{!16, !12, i64 0}
!18 = !{!12, !12, i64 0}
| linux_drivers_gpu_drm_amd_amdgpu_extr_uvd_v6_0.c_uvd_v6_0_enc_get_destroy_msg |
; ModuleID = 'AnghaBench/freebsd/crypto/openssh/extr_channels.c_channel_post_mux_client_read.c'
source_filename = "AnghaBench/freebsd/crypto/openssh/extr_channels.c_channel_post_mux_client_read.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_7__ = type { i32, i64, ptr, i32, i32, i64 }
@CHAN_INPUT_OPEN = dso_local local_unnamed_addr global i64 0, align 8
@CHAN_INPUT_WAIT_DRAIN = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [35 x i8] c"channel %d: packet too big %u > %u\00", align 1
@.str.1 = private unnamed_addr constant [27 x i8] c"channel %d: mux_rcb failed\00", align 1
@CHANNEL_MUX_MAX_PACKET = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @channel_post_mux_client_read], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @channel_post_mux_client_read(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr nocapture readnone %3) #0 {
%5 = load i32, ptr %1, align 8, !tbaa !5
%6 = icmp eq i32 %5, -1
br i1 %6, label %50, label %7
7: ; preds = %4
%8 = tail call i32 @FD_ISSET(i32 noundef %5, ptr noundef %2) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %50, label %10
10: ; preds = %7
%11 = getelementptr inbounds %struct.TYPE_7__, ptr %1, i64 0, i32 1
%12 = load i64, ptr %11, align 8, !tbaa !12
%13 = load i64, ptr @CHAN_INPUT_OPEN, align 8, !tbaa !13
%14 = icmp eq i64 %12, %13
%15 = load i64, ptr @CHAN_INPUT_WAIT_DRAIN, align 8
%16 = icmp eq i64 %12, %15
%17 = select i1 %14, i1 true, i1 %16
br i1 %17, label %18, label %50
18: ; preds = %10
%19 = getelementptr inbounds %struct.TYPE_7__, ptr %1, i64 0, i32 5
%20 = load i64, ptr %19, align 8, !tbaa !14
%21 = icmp eq i64 %20, 0
br i1 %21, label %22, label %50
22: ; preds = %18
%23 = tail call i32 @read_mux(ptr noundef %0, ptr noundef nonnull %1, i32 noundef 4) #2
%24 = icmp slt i32 %23, 4
br i1 %24, label %50, label %25
25: ; preds = %22
%26 = getelementptr inbounds %struct.TYPE_7__, ptr %1, i64 0, i32 4
%27 = load i32, ptr %26, align 4, !tbaa !15
%28 = tail call i32 @sshbuf_ptr(i32 noundef %27) #2
%29 = tail call i32 @PEEK_U32(i32 noundef %28) #2
%30 = icmp sgt i32 %29, 262144
br i1 %30, label %31, label %36
31: ; preds = %25
%32 = getelementptr inbounds %struct.TYPE_7__, ptr %1, i64 0, i32 3
%33 = load i32, ptr %32, align 8, !tbaa !16
%34 = tail call i32 @debug2(ptr noundef nonnull @.str, i32 noundef %33, i32 noundef 262144, i32 noundef %29) #2
%35 = tail call i32 @chan_rcvd_oclose(ptr noundef %0, ptr noundef nonnull %1) #2
br label %50
36: ; preds = %25
%37 = add nsw i32 %29, 4
%38 = tail call i32 @read_mux(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %37) #2
%39 = icmp slt i32 %38, %37
br i1 %39, label %50, label %40
40: ; preds = %36
%41 = getelementptr inbounds %struct.TYPE_7__, ptr %1, i64 0, i32 2
%42 = load ptr, ptr %41, align 8, !tbaa !17
%43 = tail call i64 %42(ptr noundef %0, ptr noundef nonnull %1) #2
%44 = icmp eq i64 %43, 0
br i1 %44, label %50, label %45
45: ; preds = %40
%46 = getelementptr inbounds %struct.TYPE_7__, ptr %1, i64 0, i32 3
%47 = load i32, ptr %46, align 8, !tbaa !16
%48 = tail call i32 @debug(ptr noundef nonnull @.str.1, i32 noundef %47) #2
%49 = tail call i32 @chan_mark_dead(ptr noundef %0, ptr noundef nonnull %1) #2
br label %50
50: ; preds = %40, %36, %22, %18, %10, %4, %7, %45, %31
ret void
}
declare i32 @FD_ISSET(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @read_mux(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PEEK_U32(i32 noundef) local_unnamed_addr #1
declare i32 @sshbuf_ptr(i32 noundef) local_unnamed_addr #1
declare i32 @debug2(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @chan_rcvd_oclose(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @debug(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @chan_mark_dead(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_7__", !7, i64 0, !10, i64 8, !11, i64 16, !7, i64 24, !7, i64 28, !10, i64 32}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!10, !10, i64 0}
!14 = !{!6, !10, i64 32}
!15 = !{!6, !7, i64 28}
!16 = !{!6, !7, i64 24}
!17 = !{!6, !11, i64 16}
| ; ModuleID = 'AnghaBench/freebsd/crypto/openssh/extr_channels.c_channel_post_mux_client_read.c'
source_filename = "AnghaBench/freebsd/crypto/openssh/extr_channels.c_channel_post_mux_client_read.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CHAN_INPUT_OPEN = common local_unnamed_addr global i64 0, align 8
@CHAN_INPUT_WAIT_DRAIN = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [35 x i8] c"channel %d: packet too big %u > %u\00", align 1
@.str.1 = private unnamed_addr constant [27 x i8] c"channel %d: mux_rcb failed\00", align 1
@CHANNEL_MUX_MAX_PACKET = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @channel_post_mux_client_read], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @channel_post_mux_client_read(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr nocapture readnone %3) #0 {
%5 = load i32, ptr %1, align 8, !tbaa !6
%6 = icmp eq i32 %5, -1
br i1 %6, label %50, label %7
7: ; preds = %4
%8 = tail call i32 @FD_ISSET(i32 noundef %5, ptr noundef %2) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %50, label %10
10: ; preds = %7
%11 = getelementptr inbounds i8, ptr %1, i64 8
%12 = load i64, ptr %11, align 8, !tbaa !13
%13 = load i64, ptr @CHAN_INPUT_OPEN, align 8, !tbaa !14
%14 = icmp eq i64 %12, %13
%15 = load i64, ptr @CHAN_INPUT_WAIT_DRAIN, align 8
%16 = icmp eq i64 %12, %15
%17 = select i1 %14, i1 true, i1 %16
br i1 %17, label %18, label %50
18: ; preds = %10
%19 = getelementptr inbounds i8, ptr %1, i64 32
%20 = load i64, ptr %19, align 8, !tbaa !15
%21 = icmp eq i64 %20, 0
br i1 %21, label %22, label %50
22: ; preds = %18
%23 = tail call i32 @read_mux(ptr noundef %0, ptr noundef nonnull %1, i32 noundef 4) #2
%24 = icmp slt i32 %23, 4
br i1 %24, label %50, label %25
25: ; preds = %22
%26 = getelementptr inbounds i8, ptr %1, i64 28
%27 = load i32, ptr %26, align 4, !tbaa !16
%28 = tail call i32 @sshbuf_ptr(i32 noundef %27) #2
%29 = tail call i32 @PEEK_U32(i32 noundef %28) #2
%30 = icmp sgt i32 %29, 262144
br i1 %30, label %31, label %36
31: ; preds = %25
%32 = getelementptr inbounds i8, ptr %1, i64 24
%33 = load i32, ptr %32, align 8, !tbaa !17
%34 = tail call i32 @debug2(ptr noundef nonnull @.str, i32 noundef %33, i32 noundef 262144, i32 noundef %29) #2
%35 = tail call i32 @chan_rcvd_oclose(ptr noundef %0, ptr noundef nonnull %1) #2
br label %50
36: ; preds = %25
%37 = add nsw i32 %29, 4
%38 = tail call i32 @read_mux(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %37) #2
%39 = icmp slt i32 %38, %37
br i1 %39, label %50, label %40
40: ; preds = %36
%41 = getelementptr inbounds i8, ptr %1, i64 16
%42 = load ptr, ptr %41, align 8, !tbaa !18
%43 = tail call i64 %42(ptr noundef %0, ptr noundef nonnull %1) #2
%44 = icmp eq i64 %43, 0
br i1 %44, label %50, label %45
45: ; preds = %40
%46 = getelementptr inbounds i8, ptr %1, i64 24
%47 = load i32, ptr %46, align 8, !tbaa !17
%48 = tail call i32 @debug(ptr noundef nonnull @.str.1, i32 noundef %47) #2
%49 = tail call i32 @chan_mark_dead(ptr noundef %0, ptr noundef nonnull %1) #2
br label %50
50: ; preds = %40, %36, %22, %18, %10, %4, %7, %45, %31
ret void
}
declare i32 @FD_ISSET(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @read_mux(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PEEK_U32(i32 noundef) local_unnamed_addr #1
declare i32 @sshbuf_ptr(i32 noundef) local_unnamed_addr #1
declare i32 @debug2(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @chan_rcvd_oclose(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @debug(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @chan_mark_dead(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_7__", !8, i64 0, !11, i64 8, !12, i64 16, !8, i64 24, !8, i64 28, !11, i64 32}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!7, !11, i64 8}
!14 = !{!11, !11, i64 0}
!15 = !{!7, !11, i64 32}
!16 = !{!7, !8, i64 28}
!17 = !{!7, !8, i64 24}
!18 = !{!7, !12, i64 16}
| freebsd_crypto_openssh_extr_channels.c_channel_post_mux_client_read |
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/eap_peer/extr_eap.c_eap_get_ext_password.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/eap_peer/extr_eap.c_eap_get_ext_password.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.eap_peer_config = type { i32, ptr }
%struct.eap_sm = type { ptr, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @eap_get_ext_password], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @eap_get_ext_password(ptr nocapture noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = getelementptr inbounds %struct.eap_peer_config, ptr %1, i64 0, i32 1
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = icmp eq ptr %4, null
br i1 %5, label %24, label %6
6: ; preds = %2
%7 = load i32, ptr %1, align 8, !tbaa !11
%8 = add nsw i32 %7, 1
%9 = tail call ptr @os_zalloc(i32 noundef %8) #2
%10 = icmp eq ptr %9, null
br i1 %10, label %24, label %11
11: ; preds = %6
%12 = load ptr, ptr %3, align 8, !tbaa !5
%13 = load i32, ptr %1, align 8, !tbaa !11
%14 = tail call i32 @os_memcpy(ptr noundef nonnull %9, ptr noundef %12, i32 noundef %13) #2
%15 = load ptr, ptr %0, align 8, !tbaa !12
%16 = tail call i32 @ext_password_free(ptr noundef %15) #2
%17 = getelementptr inbounds %struct.eap_sm, ptr %0, i64 0, i32 1
%18 = load i32, ptr %17, align 8, !tbaa !14
%19 = tail call ptr @ext_password_get(i32 noundef %18, ptr noundef nonnull %9) #2
store ptr %19, ptr %0, align 8, !tbaa !12
%20 = tail call i32 @os_free(ptr noundef nonnull %9) #2
%21 = load ptr, ptr %0, align 8, !tbaa !12
%22 = icmp eq ptr %21, null
%23 = sext i1 %22 to i32
br label %24
24: ; preds = %6, %2, %11
%25 = phi i32 [ %23, %11 ], [ -1, %2 ], [ -1, %6 ]
ret i32 %25
}
declare ptr @os_zalloc(i32 noundef) local_unnamed_addr #1
declare i32 @os_memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ext_password_free(ptr noundef) local_unnamed_addr #1
declare ptr @ext_password_get(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @os_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"eap_peer_config", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!13, !10, i64 0}
!13 = !{!"eap_sm", !10, i64 0, !7, i64 8}
!14 = !{!13, !7, i64 8}
| ; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/eap_peer/extr_eap.c_eap_get_ext_password.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/eap_peer/extr_eap.c_eap_get_ext_password.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @eap_get_ext_password], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -1, 1) i32 @eap_get_ext_password(ptr nocapture noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = icmp eq ptr %4, null
br i1 %5, label %24, label %6
6: ; preds = %2
%7 = load i32, ptr %1, align 8, !tbaa !12
%8 = add nsw i32 %7, 1
%9 = tail call ptr @os_zalloc(i32 noundef %8) #2
%10 = icmp eq ptr %9, null
br i1 %10, label %24, label %11
11: ; preds = %6
%12 = load ptr, ptr %3, align 8, !tbaa !6
%13 = load i32, ptr %1, align 8, !tbaa !12
%14 = tail call i32 @os_memcpy(ptr noundef nonnull %9, ptr noundef %12, i32 noundef %13) #2
%15 = load ptr, ptr %0, align 8, !tbaa !13
%16 = tail call i32 @ext_password_free(ptr noundef %15) #2
%17 = getelementptr inbounds i8, ptr %0, i64 8
%18 = load i32, ptr %17, align 8, !tbaa !15
%19 = tail call ptr @ext_password_get(i32 noundef %18, ptr noundef nonnull %9) #2
store ptr %19, ptr %0, align 8, !tbaa !13
%20 = tail call i32 @os_free(ptr noundef nonnull %9) #2
%21 = load ptr, ptr %0, align 8, !tbaa !13
%22 = icmp eq ptr %21, null
%23 = sext i1 %22 to i32
br label %24
24: ; preds = %6, %2, %11
%25 = phi i32 [ %23, %11 ], [ -1, %2 ], [ -1, %6 ]
ret i32 %25
}
declare ptr @os_zalloc(i32 noundef) local_unnamed_addr #1
declare i32 @os_memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ext_password_free(ptr noundef) local_unnamed_addr #1
declare ptr @ext_password_get(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @os_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"eap_peer_config", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"eap_sm", !11, i64 0, !8, i64 8}
!15 = !{!14, !8, i64 8}
| freebsd_contrib_wpa_src_eap_peer_extr_eap.c_eap_get_ext_password |
; ModuleID = 'AnghaBench/linux/drivers/scsi/extr_virtio_scsi.c_virtscsi_remove_vqs.c'
source_filename = "AnghaBench/linux/drivers/scsi/extr_virtio_scsi.c_virtscsi_remove_vqs.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { ptr, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @virtscsi_remove_vqs], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @virtscsi_remove_vqs(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = getelementptr inbounds %struct.TYPE_2__, ptr %2, i64 0, i32 1
%4 = load ptr, ptr %3, align 8, !tbaa !10
%5 = tail call i32 %4(ptr noundef nonnull %0) #1
%6 = load ptr, ptr %0, align 8, !tbaa !5
%7 = load ptr, ptr %6, align 8, !tbaa !12
%8 = tail call i32 %7(ptr noundef nonnull %0) #1
ret void
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"virtio_device", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"TYPE_2__", !7, i64 0, !7, i64 8}
!12 = !{!11, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/extr_virtio_scsi.c_virtscsi_remove_vqs.c'
source_filename = "AnghaBench/linux/drivers/scsi/extr_virtio_scsi.c_virtscsi_remove_vqs.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @virtscsi_remove_vqs], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @virtscsi_remove_vqs(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = getelementptr inbounds i8, ptr %2, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !11
%5 = tail call i32 %4(ptr noundef nonnull %0) #1
%6 = load ptr, ptr %0, align 8, !tbaa !6
%7 = load ptr, ptr %6, align 8, !tbaa !13
%8 = tail call i32 %7(ptr noundef nonnull %0) #1
ret void
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"virtio_device", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 8}
!12 = !{!"TYPE_2__", !8, i64 0, !8, i64 8}
!13 = !{!12, !8, i64 0}
| linux_drivers_scsi_extr_virtio_scsi.c_virtscsi_remove_vqs |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/apm/xgene/extr_xgene_enet_xgmac.c_xgene_enet_link_status.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/apm/xgene/extr_xgene_enet_xgmac.c_xgene_enet_link_status.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@XG_LINK_STATUS_ADDR = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @xgene_enet_link_status], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @xgene_enet_link_status(ptr noundef %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = load i32, ptr @XG_LINK_STATUS_ADDR, align 4, !tbaa !5
%4 = call i32 @xgene_enet_rd_csr(ptr noundef %0, i32 noundef %3, ptr noundef nonnull %2) #3
%5 = load i32, ptr %2, align 4, !tbaa !5
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %5
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @xgene_enet_rd_csr(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/apm/xgene/extr_xgene_enet_xgmac.c_xgene_enet_link_status.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/apm/xgene/extr_xgene_enet_xgmac.c_xgene_enet_link_status.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@XG_LINK_STATUS_ADDR = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @xgene_enet_link_status], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @xgene_enet_link_status(ptr noundef %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = load i32, ptr @XG_LINK_STATUS_ADDR, align 4, !tbaa !6
%4 = call i32 @xgene_enet_rd_csr(ptr noundef %0, i32 noundef %3, ptr noundef nonnull %2) #3
%5 = load i32, ptr %2, align 4, !tbaa !6
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %5
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @xgene_enet_rd_csr(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_net_ethernet_apm_xgene_extr_xgene_enet_xgmac.c_xgene_enet_link_status |
; ModuleID = 'AnghaBench/RetroArch/tasks/extr_task_content.c_content_load_init_wrap.c'
source_filename = "AnghaBench/RetroArch/tasks/extr_task_content.c_content_load_init_wrap.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.rarch_main_wrap = type { ptr, ptr, ptr, ptr, ptr, i64 }
@.str = private unnamed_addr constant [10 x i8] c"retroarch\00", align 1
@.str.1 = private unnamed_addr constant [20 x i8] c"Using content: %s.\0A\00", align 1
@.str.2 = private unnamed_addr constant [3 x i8] c"-s\00", align 1
@.str.3 = private unnamed_addr constant [3 x i8] c"-S\00", align 1
@.str.4 = private unnamed_addr constant [3 x i8] c"-c\00", align 1
@.str.5 = private unnamed_addr constant [3 x i8] c"-v\00", align 1
@.str.6 = private unnamed_addr constant [13 x i8] c"arg #%d: %s\0A\00", align 1
@MSG_NO_CONTENT_STARTING_DUMMY_CORE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @content_load_init_wrap], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @content_load_init_wrap(ptr nocapture noundef readonly %0, ptr nocapture noundef %1, ptr nocapture noundef %2) #0 {
store i32 0, ptr %1, align 4, !tbaa !5
%4 = tail call dereferenceable_or_null(10) ptr @strdup(ptr noundef nonnull @.str)
store i32 1, ptr %1, align 4, !tbaa !5
store ptr %4, ptr %2, align 8, !tbaa !9
%5 = load ptr, ptr %0, align 8, !tbaa !11
%6 = icmp eq ptr %5, null
br i1 %6, label %15, label %7
7: ; preds = %3
%8 = tail call i32 (ptr, ...) @RARCH_LOG(ptr noundef nonnull @.str.1, ptr noundef nonnull %5) #3
%9 = load ptr, ptr %0, align 8, !tbaa !11
%10 = tail call ptr @strdup(ptr noundef %9)
%11 = load i32, ptr %1, align 4, !tbaa !5
%12 = add nsw i32 %11, 1
store i32 %12, ptr %1, align 4, !tbaa !5
%13 = sext i32 %11 to i64
%14 = getelementptr inbounds ptr, ptr %2, i64 %13
store ptr %10, ptr %14, align 8, !tbaa !9
br label %15
15: ; preds = %7, %3
%16 = phi i32 [ %12, %7 ], [ 1, %3 ]
%17 = getelementptr inbounds %struct.rarch_main_wrap, ptr %0, i64 0, i32 1
%18 = load ptr, ptr %17, align 8, !tbaa !14
%19 = icmp eq ptr %18, null
br i1 %19, label %30, label %20
20: ; preds = %15
%21 = tail call dereferenceable_or_null(3) ptr @strdup(ptr noundef nonnull @.str.2)
%22 = add nsw i32 %16, 1
store i32 %22, ptr %1, align 4, !tbaa !5
%23 = sext i32 %16 to i64
%24 = getelementptr inbounds ptr, ptr %2, i64 %23
store ptr %21, ptr %24, align 8, !tbaa !9
%25 = load ptr, ptr %17, align 8, !tbaa !14
%26 = tail call ptr @strdup(ptr noundef %25)
%27 = add nsw i32 %16, 2
store i32 %27, ptr %1, align 4, !tbaa !5
%28 = sext i32 %22 to i64
%29 = getelementptr inbounds ptr, ptr %2, i64 %28
store ptr %26, ptr %29, align 8, !tbaa !9
br label %30
30: ; preds = %20, %15
%31 = phi i32 [ %27, %20 ], [ %16, %15 ]
%32 = getelementptr inbounds %struct.rarch_main_wrap, ptr %0, i64 0, i32 2
%33 = load ptr, ptr %32, align 8, !tbaa !15
%34 = icmp eq ptr %33, null
br i1 %34, label %45, label %35
35: ; preds = %30
%36 = tail call dereferenceable_or_null(3) ptr @strdup(ptr noundef nonnull @.str.3)
%37 = add nsw i32 %31, 1
store i32 %37, ptr %1, align 4, !tbaa !5
%38 = sext i32 %31 to i64
%39 = getelementptr inbounds ptr, ptr %2, i64 %38
store ptr %36, ptr %39, align 8, !tbaa !9
%40 = load ptr, ptr %32, align 8, !tbaa !15
%41 = tail call ptr @strdup(ptr noundef %40)
%42 = add nsw i32 %31, 2
store i32 %42, ptr %1, align 4, !tbaa !5
%43 = sext i32 %37 to i64
%44 = getelementptr inbounds ptr, ptr %2, i64 %43
store ptr %41, ptr %44, align 8, !tbaa !9
br label %45
45: ; preds = %35, %30
%46 = phi i32 [ %42, %35 ], [ %31, %30 ]
%47 = getelementptr inbounds %struct.rarch_main_wrap, ptr %0, i64 0, i32 3
%48 = load ptr, ptr %47, align 8, !tbaa !16
%49 = icmp eq ptr %48, null
br i1 %49, label %60, label %50
50: ; preds = %45
%51 = tail call dereferenceable_or_null(3) ptr @strdup(ptr noundef nonnull @.str.4)
%52 = add nsw i32 %46, 1
store i32 %52, ptr %1, align 4, !tbaa !5
%53 = sext i32 %46 to i64
%54 = getelementptr inbounds ptr, ptr %2, i64 %53
store ptr %51, ptr %54, align 8, !tbaa !9
%55 = load ptr, ptr %47, align 8, !tbaa !16
%56 = tail call ptr @strdup(ptr noundef %55)
%57 = add nsw i32 %46, 2
store i32 %57, ptr %1, align 4, !tbaa !5
%58 = sext i32 %52 to i64
%59 = getelementptr inbounds ptr, ptr %2, i64 %58
store ptr %56, ptr %59, align 8, !tbaa !9
br label %60
60: ; preds = %50, %45
%61 = phi i32 [ %57, %50 ], [ %46, %45 ]
%62 = getelementptr inbounds %struct.rarch_main_wrap, ptr %0, i64 0, i32 5
%63 = load i64, ptr %62, align 8, !tbaa !17
%64 = icmp eq i64 %63, 0
br i1 %64, label %70, label %65
65: ; preds = %60
%66 = tail call dereferenceable_or_null(3) ptr @strdup(ptr noundef nonnull @.str.5)
%67 = add nsw i32 %61, 1
store i32 %67, ptr %1, align 4, !tbaa !5
%68 = sext i32 %61 to i64
%69 = getelementptr inbounds ptr, ptr %2, i64 %68
store ptr %66, ptr %69, align 8, !tbaa !9
br label %70
70: ; preds = %65, %60
%71 = phi i32 [ %67, %65 ], [ %61, %60 ]
%72 = icmp sgt i32 %71, 0
br i1 %72, label %73, label %83
73: ; preds = %70, %73
%74 = phi i64 [ %79, %73 ], [ 0, %70 ]
%75 = getelementptr inbounds ptr, ptr %2, i64 %74
%76 = load ptr, ptr %75, align 8, !tbaa !9
%77 = trunc i64 %74 to i32
%78 = tail call i32 (ptr, ...) @RARCH_LOG(ptr noundef nonnull @.str.6, i32 noundef %77, ptr noundef %76) #3
%79 = add nuw nsw i64 %74, 1
%80 = load i32, ptr %1, align 4, !tbaa !5
%81 = sext i32 %80 to i64
%82 = icmp slt i64 %79, %81
br i1 %82, label %73, label %83, !llvm.loop !18
83: ; preds = %73, %70
ret void
}
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite)
declare noalias ptr @strdup(ptr nocapture noundef readonly) local_unnamed_addr #1
declare i32 @RARCH_LOG(ptr noundef, ...) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"rarch_main_wrap", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !13, i64 40}
!13 = !{!"long", !7, i64 0}
!14 = !{!12, !10, i64 8}
!15 = !{!12, !10, i64 16}
!16 = !{!12, !10, i64 24}
!17 = !{!12, !13, i64 40}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/RetroArch/tasks/extr_task_content.c_content_load_init_wrap.c'
source_filename = "AnghaBench/RetroArch/tasks/extr_task_content.c_content_load_init_wrap.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [10 x i8] c"retroarch\00", align 1
@.str.1 = private unnamed_addr constant [20 x i8] c"Using content: %s.\0A\00", align 1
@.str.2 = private unnamed_addr constant [3 x i8] c"-s\00", align 1
@.str.3 = private unnamed_addr constant [3 x i8] c"-S\00", align 1
@.str.4 = private unnamed_addr constant [3 x i8] c"-c\00", align 1
@.str.5 = private unnamed_addr constant [3 x i8] c"-v\00", align 1
@.str.6 = private unnamed_addr constant [13 x i8] c"arg #%d: %s\0A\00", align 1
@MSG_NO_CONTENT_STARTING_DUMMY_CORE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @content_load_init_wrap], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @content_load_init_wrap(ptr nocapture noundef readonly %0, ptr nocapture noundef %1, ptr nocapture noundef %2) #0 {
store i32 0, ptr %1, align 4, !tbaa !6
%4 = tail call dereferenceable_or_null(10) ptr @strdup(ptr noundef nonnull @.str)
store i32 1, ptr %1, align 4, !tbaa !6
store ptr %4, ptr %2, align 8, !tbaa !10
%5 = load ptr, ptr %0, align 8, !tbaa !12
%6 = icmp eq ptr %5, null
br i1 %6, label %15, label %7
7: ; preds = %3
%8 = tail call i32 (ptr, ...) @RARCH_LOG(ptr noundef nonnull @.str.1, ptr noundef nonnull %5) #3
%9 = load ptr, ptr %0, align 8, !tbaa !12
%10 = tail call ptr @strdup(ptr noundef %9)
%11 = load i32, ptr %1, align 4, !tbaa !6
%12 = add nsw i32 %11, 1
store i32 %12, ptr %1, align 4, !tbaa !6
%13 = sext i32 %11 to i64
%14 = getelementptr inbounds ptr, ptr %2, i64 %13
store ptr %10, ptr %14, align 8, !tbaa !10
br label %15
15: ; preds = %7, %3
%16 = phi i32 [ %12, %7 ], [ 1, %3 ]
%17 = getelementptr inbounds i8, ptr %0, i64 8
%18 = load ptr, ptr %17, align 8, !tbaa !15
%19 = icmp eq ptr %18, null
br i1 %19, label %30, label %20
20: ; preds = %15
%21 = tail call dereferenceable_or_null(3) ptr @strdup(ptr noundef nonnull @.str.2)
%22 = add nsw i32 %16, 1
store i32 %22, ptr %1, align 4, !tbaa !6
%23 = sext i32 %16 to i64
%24 = getelementptr inbounds ptr, ptr %2, i64 %23
store ptr %21, ptr %24, align 8, !tbaa !10
%25 = load ptr, ptr %17, align 8, !tbaa !15
%26 = tail call ptr @strdup(ptr noundef %25)
%27 = add nsw i32 %16, 2
store i32 %27, ptr %1, align 4, !tbaa !6
%28 = sext i32 %22 to i64
%29 = getelementptr inbounds ptr, ptr %2, i64 %28
store ptr %26, ptr %29, align 8, !tbaa !10
br label %30
30: ; preds = %20, %15
%31 = phi i32 [ %27, %20 ], [ %16, %15 ]
%32 = getelementptr inbounds i8, ptr %0, i64 16
%33 = load ptr, ptr %32, align 8, !tbaa !16
%34 = icmp eq ptr %33, null
br i1 %34, label %45, label %35
35: ; preds = %30
%36 = tail call dereferenceable_or_null(3) ptr @strdup(ptr noundef nonnull @.str.3)
%37 = add nsw i32 %31, 1
store i32 %37, ptr %1, align 4, !tbaa !6
%38 = sext i32 %31 to i64
%39 = getelementptr inbounds ptr, ptr %2, i64 %38
store ptr %36, ptr %39, align 8, !tbaa !10
%40 = load ptr, ptr %32, align 8, !tbaa !16
%41 = tail call ptr @strdup(ptr noundef %40)
%42 = add nsw i32 %31, 2
store i32 %42, ptr %1, align 4, !tbaa !6
%43 = sext i32 %37 to i64
%44 = getelementptr inbounds ptr, ptr %2, i64 %43
store ptr %41, ptr %44, align 8, !tbaa !10
br label %45
45: ; preds = %35, %30
%46 = phi i32 [ %42, %35 ], [ %31, %30 ]
%47 = getelementptr inbounds i8, ptr %0, i64 24
%48 = load ptr, ptr %47, align 8, !tbaa !17
%49 = icmp eq ptr %48, null
br i1 %49, label %60, label %50
50: ; preds = %45
%51 = tail call dereferenceable_or_null(3) ptr @strdup(ptr noundef nonnull @.str.4)
%52 = add nsw i32 %46, 1
store i32 %52, ptr %1, align 4, !tbaa !6
%53 = sext i32 %46 to i64
%54 = getelementptr inbounds ptr, ptr %2, i64 %53
store ptr %51, ptr %54, align 8, !tbaa !10
%55 = load ptr, ptr %47, align 8, !tbaa !17
%56 = tail call ptr @strdup(ptr noundef %55)
%57 = add nsw i32 %46, 2
store i32 %57, ptr %1, align 4, !tbaa !6
%58 = sext i32 %52 to i64
%59 = getelementptr inbounds ptr, ptr %2, i64 %58
store ptr %56, ptr %59, align 8, !tbaa !10
br label %60
60: ; preds = %50, %45
%61 = phi i32 [ %57, %50 ], [ %46, %45 ]
%62 = getelementptr inbounds i8, ptr %0, i64 40
%63 = load i64, ptr %62, align 8, !tbaa !18
%64 = icmp eq i64 %63, 0
br i1 %64, label %70, label %65
65: ; preds = %60
%66 = tail call dereferenceable_or_null(3) ptr @strdup(ptr noundef nonnull @.str.5)
%67 = add nsw i32 %61, 1
store i32 %67, ptr %1, align 4, !tbaa !6
%68 = sext i32 %61 to i64
%69 = getelementptr inbounds ptr, ptr %2, i64 %68
store ptr %66, ptr %69, align 8, !tbaa !10
br label %70
70: ; preds = %65, %60
%71 = phi i32 [ %67, %65 ], [ %61, %60 ]
%72 = icmp sgt i32 %71, 0
br i1 %72, label %73, label %83
73: ; preds = %70, %73
%74 = phi i64 [ %79, %73 ], [ 0, %70 ]
%75 = getelementptr inbounds ptr, ptr %2, i64 %74
%76 = load ptr, ptr %75, align 8, !tbaa !10
%77 = trunc nuw nsw i64 %74 to i32
%78 = tail call i32 (ptr, ...) @RARCH_LOG(ptr noundef nonnull @.str.6, i32 noundef %77, ptr noundef %76) #3
%79 = add nuw nsw i64 %74, 1
%80 = load i32, ptr %1, align 4, !tbaa !6
%81 = sext i32 %80 to i64
%82 = icmp slt i64 %79, %81
br i1 %82, label %73, label %83, !llvm.loop !19
83: ; preds = %73, %70
ret void
}
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite)
declare noalias ptr @strdup(ptr nocapture noundef readonly) local_unnamed_addr #1
declare i32 @RARCH_LOG(ptr noundef, ...) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"rarch_main_wrap", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !14, i64 40}
!14 = !{!"long", !8, i64 0}
!15 = !{!13, !11, i64 8}
!16 = !{!13, !11, i64 16}
!17 = !{!13, !11, i64 24}
!18 = !{!13, !14, i64 40}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
| RetroArch_tasks_extr_task_content.c_content_load_init_wrap |
; ModuleID = 'AnghaBench/Quake-III-Arena/code/bspc/extr_gldraw.c_GLS_BeginScene.c'
source_filename = "AnghaBench/Quake-III-Arena/code/bspc/extr_gldraw.c_GLS_BeginScene.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sockaddr_in = type { i32, %struct.TYPE_2__, i32 }
%struct.TYPE_2__ = type { i32 }
@wins_init = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [31 x i8] c"Winsock initialization failed.\00", align 1
@PF_INET = dso_local local_unnamed_addr global i32 0, align 4
@SOCK_STREAM = dso_local local_unnamed_addr global i32 0, align 4
@IPPROTO_TCP = dso_local local_unnamed_addr global i32 0, align 4
@draw_socket = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [19 x i8] c"draw_socket failed\00", align 1
@AF_INET = dso_local local_unnamed_addr global i32 0, align 4
@INADDR_LOOPBACK = dso_local local_unnamed_addr global i32 0, align 4
@GLSERV_PORT = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @GLS_BeginScene() local_unnamed_addr #0 {
%1 = alloca i32, align 4
%2 = alloca %struct.sockaddr_in, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #4
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %2) #4
%3 = load i32, ptr @wins_init, align 4, !tbaa !5
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %12
5: ; preds = %0
store i32 1, ptr @wins_init, align 4, !tbaa !5
%6 = tail call i32 @MAKEWORD(i32 noundef 1, i32 noundef 1) #4
%7 = tail call i32 @MAKEWORD(i32 noundef 1, i32 noundef 1) #4
%8 = call i32 @WSAStartup(i32 noundef %7, ptr noundef nonnull %1) #4
%9 = icmp eq i32 %8, 0
br i1 %9, label %12, label %10
10: ; preds = %5
%11 = call i32 @Error(ptr noundef nonnull @.str) #4
br label %12
12: ; preds = %5, %10, %0
%13 = load i32, ptr @PF_INET, align 4, !tbaa !5
%14 = load i32, ptr @SOCK_STREAM, align 4, !tbaa !5
%15 = load i32, ptr @IPPROTO_TCP, align 4, !tbaa !5
%16 = call i32 @socket(i32 noundef %13, i32 noundef %14, i32 noundef %15) #4
store i32 %16, ptr @draw_socket, align 4, !tbaa !5
%17 = icmp eq i32 %16, -1
br i1 %17, label %18, label %21
18: ; preds = %12
%19 = call i32 @Error(ptr noundef nonnull @.str.1) #4
%20 = load i32, ptr @draw_socket, align 4, !tbaa !5
br label %21
21: ; preds = %18, %12
%22 = phi i32 [ %20, %18 ], [ %16, %12 ]
%23 = load i32, ptr @AF_INET, align 4, !tbaa !5
%24 = getelementptr inbounds %struct.sockaddr_in, ptr %2, i64 0, i32 2
store i32 %23, ptr %24, align 4, !tbaa !9
%25 = load i32, ptr @INADDR_LOOPBACK, align 4, !tbaa !5
%26 = call i32 @htonl(i32 noundef %25)
%27 = getelementptr inbounds %struct.sockaddr_in, ptr %2, i64 0, i32 1
store i32 %26, ptr %27, align 4, !tbaa !12
%28 = load i32, ptr @GLSERV_PORT, align 4, !tbaa !5
store i32 %28, ptr %2, align 4, !tbaa !13
%29 = call i32 @connect(i32 noundef %22, ptr noundef nonnull %2, i32 noundef 12) #4
%30 = icmp eq i32 %29, -1
br i1 %30, label %31, label %34
31: ; preds = %21
%32 = load i32, ptr @draw_socket, align 4, !tbaa !5
%33 = call i32 @closesocket(i32 noundef %32) #4
store i32 0, ptr @draw_socket, align 4, !tbaa !5
br label %34
34: ; preds = %31, %21
call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %2) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #4
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @MAKEWORD(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @WSAStartup(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @Error(ptr noundef) local_unnamed_addr #2
declare i32 @socket(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: nofree nosync nounwind memory(none)
declare i32 @htonl(i32 noundef) local_unnamed_addr #3
declare i32 @connect(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @closesocket(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nosync nounwind memory(none) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"sockaddr_in", !6, i64 0, !11, i64 4, !6, i64 8}
!11 = !{!"TYPE_2__", !6, i64 0}
!12 = !{!10, !6, i64 4}
!13 = !{!10, !6, i64 0}
| ; ModuleID = 'AnghaBench/Quake-III-Arena/code/bspc/extr_gldraw.c_GLS_BeginScene.c'
source_filename = "AnghaBench/Quake-III-Arena/code/bspc/extr_gldraw.c_GLS_BeginScene.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.sockaddr_in = type { i32, %struct.TYPE_2__, i32 }
%struct.TYPE_2__ = type { i32 }
@wins_init = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [31 x i8] c"Winsock initialization failed.\00", align 1
@PF_INET = common local_unnamed_addr global i32 0, align 4
@SOCK_STREAM = common local_unnamed_addr global i32 0, align 4
@IPPROTO_TCP = common local_unnamed_addr global i32 0, align 4
@draw_socket = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [19 x i8] c"draw_socket failed\00", align 1
@AF_INET = common local_unnamed_addr global i32 0, align 4
@INADDR_LOOPBACK = common local_unnamed_addr global i32 0, align 4
@GLSERV_PORT = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @GLS_BeginScene() local_unnamed_addr #0 {
%1 = alloca i32, align 4
%2 = alloca %struct.sockaddr_in, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #4
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %2) #4
%3 = load i32, ptr @wins_init, align 4, !tbaa !6
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %12
5: ; preds = %0
store i32 1, ptr @wins_init, align 4, !tbaa !6
%6 = tail call i32 @MAKEWORD(i32 noundef 1, i32 noundef 1) #4
%7 = tail call i32 @MAKEWORD(i32 noundef 1, i32 noundef 1) #4
%8 = call i32 @WSAStartup(i32 noundef %7, ptr noundef nonnull %1) #4
%9 = icmp eq i32 %8, 0
br i1 %9, label %12, label %10
10: ; preds = %5
%11 = call i32 @Error(ptr noundef nonnull @.str) #4
br label %12
12: ; preds = %5, %10, %0
%13 = load i32, ptr @PF_INET, align 4, !tbaa !6
%14 = load i32, ptr @SOCK_STREAM, align 4, !tbaa !6
%15 = load i32, ptr @IPPROTO_TCP, align 4, !tbaa !6
%16 = call i32 @socket(i32 noundef %13, i32 noundef %14, i32 noundef %15) #4
store i32 %16, ptr @draw_socket, align 4, !tbaa !6
%17 = icmp eq i32 %16, -1
br i1 %17, label %18, label %21
18: ; preds = %12
%19 = call i32 @Error(ptr noundef nonnull @.str.1) #4
%20 = load i32, ptr @draw_socket, align 4, !tbaa !6
br label %21
21: ; preds = %18, %12
%22 = phi i32 [ %20, %18 ], [ %16, %12 ]
%23 = load i32, ptr @AF_INET, align 4, !tbaa !6
%24 = getelementptr inbounds i8, ptr %2, i64 8
store i32 %23, ptr %24, align 4, !tbaa !10
%25 = load i32, ptr @INADDR_LOOPBACK, align 4, !tbaa !6
%26 = call i32 @htonl(i32 noundef %25)
%27 = getelementptr inbounds i8, ptr %2, i64 4
store i32 %26, ptr %27, align 4, !tbaa !13
%28 = load i32, ptr @GLSERV_PORT, align 4, !tbaa !6
store i32 %28, ptr %2, align 4, !tbaa !14
%29 = call i32 @connect(i32 noundef %22, ptr noundef nonnull %2, i32 noundef 12) #4
%30 = icmp eq i32 %29, -1
br i1 %30, label %31, label %34
31: ; preds = %21
%32 = load i32, ptr @draw_socket, align 4, !tbaa !6
%33 = call i32 @closesocket(i32 noundef %32) #4
store i32 0, ptr @draw_socket, align 4, !tbaa !6
br label %34
34: ; preds = %31, %21
call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %2) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #4
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @MAKEWORD(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @WSAStartup(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @Error(ptr noundef) local_unnamed_addr #2
declare i32 @socket(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: nofree nosync nounwind memory(none)
declare i32 @htonl(i32 noundef) local_unnamed_addr #3
declare i32 @connect(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @closesocket(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nofree nosync nounwind memory(none) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"sockaddr_in", !7, i64 0, !12, i64 4, !7, i64 8}
!12 = !{!"TYPE_2__", !7, i64 0}
!13 = !{!11, !7, i64 4}
!14 = !{!11, !7, i64 0}
| Quake-III-Arena_code_bspc_extr_gldraw.c_GLS_BeginScene |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/extr_bcdc.c_brcmf_proto_bcdc_configure_addr_mode.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/extr_bcdc.c_brcmf_proto_bcdc_configure_addr_mode.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @brcmf_proto_bcdc_configure_addr_mode], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @brcmf_proto_bcdc_configure_addr_mode(ptr nocapture readnone %0, i32 %1, i32 %2) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/extr_bcdc.c_brcmf_proto_bcdc_configure_addr_mode.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/extr_bcdc.c_brcmf_proto_bcdc_configure_addr_mode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @brcmf_proto_bcdc_configure_addr_mode], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @brcmf_proto_bcdc_configure_addr_mode(ptr nocapture readnone %0, i32 %1, i32 %2) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_net_wireless_broadcom_brcm80211_brcmfmac_extr_bcdc.c_brcmf_proto_bcdc_configure_addr_mode |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/char/extr_sclp_vt220.c_sclp_vt220_write.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/char/extr_sclp_vt220.c_sclp_vt220_write.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @sclp_vt220_write], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @sclp_vt220_write(ptr nocapture readnone %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = tail call i32 @__sclp_vt220_write(ptr noundef %1, i32 noundef %2, i32 noundef 1, i32 noundef 0, i32 noundef 1) #2
ret i32 %4
}
declare i32 @__sclp_vt220_write(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/char/extr_sclp_vt220.c_sclp_vt220_write.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/char/extr_sclp_vt220.c_sclp_vt220_write.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @sclp_vt220_write], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @sclp_vt220_write(ptr nocapture readnone %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = tail call i32 @__sclp_vt220_write(ptr noundef %1, i32 noundef %2, i32 noundef 1, i32 noundef 0, i32 noundef 1) #2
ret i32 %4
}
declare i32 @__sclp_vt220_write(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_s390_char_extr_sclp_vt220.c_sclp_vt220_write |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/sparc/kernel/extr_module.c_dot2underscore.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/sparc/kernel/extr_module.c_dot2underscore.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @dot2underscore], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef ptr @dot2underscore(ptr noundef returned %0) #0 {
%2 = load i8, ptr %0, align 1, !tbaa !5
%3 = icmp eq i8 %2, 46
br i1 %3, label %4, label %8
4: ; preds = %1
store i8 95, ptr %0, align 1, !tbaa !5
%5 = getelementptr inbounds i8, ptr %0, i64 1
%6 = load i8, ptr %5, align 1, !tbaa !5
%7 = tail call signext i8 @toupper(i8 noundef signext %6) #2
store i8 %7, ptr %5, align 1, !tbaa !5
br label %8
8: ; preds = %4, %1
ret ptr %0
}
declare signext i8 @toupper(i8 noundef signext) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/sparc/kernel/extr_module.c_dot2underscore.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/sparc/kernel/extr_module.c_dot2underscore.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @dot2underscore], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef ptr @dot2underscore(ptr noundef returned %0) #0 {
%2 = load i8, ptr %0, align 1, !tbaa !6
%3 = icmp eq i8 %2, 46
br i1 %3, label %4, label %8
4: ; preds = %1
store i8 95, ptr %0, align 1, !tbaa !6
%5 = getelementptr inbounds i8, ptr %0, i64 1
%6 = load i8, ptr %5, align 1, !tbaa !6
%7 = tail call signext i8 @toupper(i8 noundef signext %6) #2
store i8 %7, ptr %5, align 1, !tbaa !6
br label %8
8: ; preds = %4, %1
ret ptr %0
}
declare signext i8 @toupper(i8 noundef signext) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_arch_sparc_kernel_extr_module.c_dot2underscore |
; ModuleID = 'AnghaBench/hashcat/src/extr_convert.c_v64_from_v32ab.c'
source_filename = "AnghaBench/hashcat/src/extr_convert.c_v64_from_v32ab.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local i32 @v64_from_v32ab(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
ret i32 undef
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/hashcat/src/extr_convert.c_v64_from_v32ab.c'
source_filename = "AnghaBench/hashcat/src/extr_convert.c_v64_from_v32ab.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define i32 @v64_from_v32ab(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
ret i32 undef
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| hashcat_src_extr_convert.c_v64_from_v32ab |
; ModuleID = 'AnghaBench/libgit2/tests/config/extr_memory.c_test_config_memory__multiple_vars.c'
source_filename = "AnghaBench/libgit2/tests/config/extr_memory.c_test_config_memory__multiple_vars.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [29 x i8] c"[general]\0Afoo=bar\0Akey=value\0A\00", align 1
@backend = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [12 x i8] c"general.foo\00", align 1
@.str.2 = private unnamed_addr constant [4 x i8] c"bar\00", align 1
@.str.3 = private unnamed_addr constant [12 x i8] c"general.key\00", align 1
@.str.4 = private unnamed_addr constant [6 x i8] c"value\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @test_config_memory__multiple_vars() local_unnamed_addr #0 {
%1 = tail call i32 @setup_backend(ptr noundef nonnull @.str) #2
%2 = load i32, ptr @backend, align 4, !tbaa !5
%3 = tail call i32 @assert_config_contains(i32 noundef %2, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2) #2
%4 = load i32, ptr @backend, align 4, !tbaa !5
%5 = tail call i32 @assert_config_contains(i32 noundef %4, ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.4) #2
ret void
}
declare i32 @setup_backend(ptr noundef) local_unnamed_addr #1
declare i32 @assert_config_contains(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/libgit2/tests/config/extr_memory.c_test_config_memory__multiple_vars.c'
source_filename = "AnghaBench/libgit2/tests/config/extr_memory.c_test_config_memory__multiple_vars.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [29 x i8] c"[general]\0Afoo=bar\0Akey=value\0A\00", align 1
@backend = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [12 x i8] c"general.foo\00", align 1
@.str.2 = private unnamed_addr constant [4 x i8] c"bar\00", align 1
@.str.3 = private unnamed_addr constant [12 x i8] c"general.key\00", align 1
@.str.4 = private unnamed_addr constant [6 x i8] c"value\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @test_config_memory__multiple_vars() local_unnamed_addr #0 {
%1 = tail call i32 @setup_backend(ptr noundef nonnull @.str) #2
%2 = load i32, ptr @backend, align 4, !tbaa !6
%3 = tail call i32 @assert_config_contains(i32 noundef %2, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2) #2
%4 = load i32, ptr @backend, align 4, !tbaa !6
%5 = tail call i32 @assert_config_contains(i32 noundef %4, ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.4) #2
ret void
}
declare i32 @setup_backend(ptr noundef) local_unnamed_addr #1
declare i32 @assert_config_contains(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| libgit2_tests_config_extr_memory.c_test_config_memory__multiple_vars |
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