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; ModuleID = 'AnghaBench/lede/target/linux/cns3xxx/files/drivers/net/ethernet/cavium/extr_cns3xxx_eth.c_eth_complete_tx.c' source_filename = "AnghaBench/lede/target/linux/cns3xxx/files/drivers/net/ethernet/cavium/extr_cns3xxx_eth.c_eth_complete_tx.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.sw = type { i32, %struct._tx_ring } %struct._tx_ring = type { i32, i32, ptr, ptr, ptr } %struct.tx_desc = type { i32, i32 } @DMA_TO_DEVICE = dso_local local_unnamed_addr global i32 0, align 4 @TX_DESCS = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @eth_complete_tx], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @eth_complete_tx(ptr noundef %0) #0 { %2 = getelementptr inbounds %struct.sw, ptr %0, i64 0, i32 1 %3 = load i32, ptr %2, align 8, !tbaa !5 %4 = getelementptr inbounds %struct.sw, ptr %0, i64 0, i32 1, i32 1 %5 = load i32, ptr %4, align 4, !tbaa !11 %6 = getelementptr inbounds %struct.sw, ptr %0, i64 0, i32 1, i32 2 %7 = icmp sgt i32 %3, 0 br i1 %7, label %8, label %54 8: ; preds = %1 %9 = load ptr, ptr %6, align 8, !tbaa !12 %10 = sext i32 %5 to i64 %11 = getelementptr inbounds %struct.tx_desc, ptr %9, i64 %10 %12 = getelementptr inbounds %struct.sw, ptr %0, i64 0, i32 1, i32 4 %13 = getelementptr inbounds %struct.sw, ptr %0, i64 0, i32 1, i32 3 br label %14 14: ; preds = %8, %45 %15 = phi ptr [ %11, %8 ], [ %47, %45 ] %16 = phi i32 [ 0, %8 ], [ %48, %45 ] %17 = phi i32 [ %5, %8 ], [ %46, %45 ] %18 = getelementptr inbounds %struct.tx_desc, ptr %15, i64 0, i32 1 %19 = load i32, ptr %18, align 4, !tbaa !13 %20 = icmp eq i32 %19, 0 br i1 %20, label %50, label %21 21: ; preds = %14 %22 = load ptr, ptr %12, align 8, !tbaa !15 %23 = sext i32 %17 to i64 %24 = getelementptr inbounds ptr, ptr %22, i64 %23 %25 = load ptr, ptr %24, align 8, !tbaa !16 store ptr null, ptr %24, align 8, !tbaa !16 %26 = icmp eq ptr %25, null br i1 %26, label %29, label %27 27: ; preds = %21 %28 = tail call i32 @dev_kfree_skb_any(ptr noundef nonnull %25) #2 br label %29 29: ; preds = %27, %21 %30 = load i32, ptr %0, align 8, !tbaa !17 %31 = load ptr, ptr %13, align 8, !tbaa !19 %32 = getelementptr inbounds i32, ptr %31, i64 %23 %33 = load i32, ptr %32, align 4, !tbaa !20 %34 = load i32, ptr %15, align 4, !tbaa !21 %35 = load i32, ptr @DMA_TO_DEVICE, align 4, !tbaa !20 %36 = tail call i32 @dma_unmap_single(i32 noundef %30, i32 noundef %33, i32 noundef %34, i32 noundef %35) #2 %37 = load i32, ptr @TX_DESCS, align 4, !tbaa !20 %38 = add nsw i32 %37, -1 %39 = icmp eq i32 %17, %38 br i1 %39, label %40, label %42 40: ; preds = %29 %41 = load ptr, ptr %6, align 8, !tbaa !12 br label %45 42: ; preds = %29 %43 = add nsw i32 %17, 1 %44 = getelementptr inbounds %struct.tx_desc, ptr %15, i64 1 br label %45 45: ; preds = %40, %42 %46 = phi i32 [ 0, %40 ], [ %43, %42 ] %47 = phi ptr [ %41, %40 ], [ %44, %42 ] %48 = add nuw nsw i32 %16, 1 %49 = icmp eq i32 %48, %3 br i1 %49, label %50, label %14, !llvm.loop !22 50: ; preds = %14, %45 %51 = phi i32 [ %46, %45 ], [ %17, %14 ] %52 = phi i32 [ %3, %45 ], [ %16, %14 ] %53 = load i32, ptr %2, align 8, !tbaa !5 br label %54 54: ; preds = %50, %1 %55 = phi i32 [ %3, %1 ], [ %53, %50 ] %56 = phi i32 [ %5, %1 ], [ %51, %50 ] %57 = phi i32 [ 0, %1 ], [ %52, %50 ] store i32 %56, ptr %4, align 4, !tbaa !11 %58 = sub nsw i32 %55, %57 store i32 %58, ptr %2, align 8, !tbaa !5 %59 = tail call i32 @eth_check_num_used(ptr noundef nonnull %2) #2 ret void } declare i32 @dev_kfree_skb_any(ptr noundef) local_unnamed_addr #1 declare i32 @dma_unmap_single(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @eth_check_num_used(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"_tx_ring", !7, i64 0, !7, i64 4, !10, i64 8, !10, i64 16, !10, i64 24} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!6, !7, i64 4} !12 = !{!6, !10, i64 8} !13 = !{!14, !7, i64 4} !14 = !{!"tx_desc", !7, i64 0, !7, i64 4} !15 = !{!6, !10, i64 24} !16 = !{!10, !10, i64 0} !17 = !{!18, !7, i64 0} !18 = !{!"sw", !7, i64 0, !6, i64 8} !19 = !{!6, !10, i64 16} !20 = !{!7, !7, i64 0} !21 = !{!14, !7, i64 0} !22 = distinct !{!22, !23} !23 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/lede/target/linux/cns3xxx/files/drivers/net/ethernet/cavium/extr_cns3xxx_eth.c_eth_complete_tx.c' source_filename = "AnghaBench/lede/target/linux/cns3xxx/files/drivers/net/ethernet/cavium/extr_cns3xxx_eth.c_eth_complete_tx.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.tx_desc = type { i32, i32 } @DMA_TO_DEVICE = common local_unnamed_addr global i32 0, align 4 @TX_DESCS = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @eth_complete_tx], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @eth_complete_tx(ptr noundef %0) #0 { %2 = getelementptr inbounds i8, ptr %0, i64 8 %3 = load i32, ptr %2, align 8, !tbaa !6 %4 = getelementptr inbounds i8, ptr %0, i64 12 %5 = load i32, ptr %4, align 4, !tbaa !12 %6 = getelementptr inbounds i8, ptr %0, i64 16 %7 = icmp sgt i32 %3, 0 br i1 %7, label %8, label %54 8: ; preds = %1 %9 = load ptr, ptr %6, align 8, !tbaa !13 %10 = sext i32 %5 to i64 %11 = getelementptr inbounds %struct.tx_desc, ptr %9, i64 %10 %12 = getelementptr inbounds i8, ptr %0, i64 32 %13 = getelementptr inbounds i8, ptr %0, i64 24 br label %14 14: ; preds = %8, %45 %15 = phi ptr [ %11, %8 ], [ %47, %45 ] %16 = phi i32 [ 0, %8 ], [ %48, %45 ] %17 = phi i32 [ %5, %8 ], [ %46, %45 ] %18 = getelementptr inbounds i8, ptr %15, i64 4 %19 = load i32, ptr %18, align 4, !tbaa !14 %20 = icmp eq i32 %19, 0 br i1 %20, label %50, label %21 21: ; preds = %14 %22 = load ptr, ptr %12, align 8, !tbaa !16 %23 = sext i32 %17 to i64 %24 = getelementptr inbounds ptr, ptr %22, i64 %23 %25 = load ptr, ptr %24, align 8, !tbaa !17 store ptr null, ptr %24, align 8, !tbaa !17 %26 = icmp eq ptr %25, null br i1 %26, label %29, label %27 27: ; preds = %21 %28 = tail call i32 @dev_kfree_skb_any(ptr noundef nonnull %25) #2 br label %29 29: ; preds = %27, %21 %30 = load i32, ptr %0, align 8, !tbaa !18 %31 = load ptr, ptr %13, align 8, !tbaa !20 %32 = getelementptr inbounds i32, ptr %31, i64 %23 %33 = load i32, ptr %32, align 4, !tbaa !21 %34 = load i32, ptr %15, align 4, !tbaa !22 %35 = load i32, ptr @DMA_TO_DEVICE, align 4, !tbaa !21 %36 = tail call i32 @dma_unmap_single(i32 noundef %30, i32 noundef %33, i32 noundef %34, i32 noundef %35) #2 %37 = load i32, ptr @TX_DESCS, align 4, !tbaa !21 %38 = add nsw i32 %37, -1 %39 = icmp eq i32 %17, %38 br i1 %39, label %40, label %42 40: ; preds = %29 %41 = load ptr, ptr %6, align 8, !tbaa !13 br label %45 42: ; preds = %29 %43 = add nsw i32 %17, 1 %44 = getelementptr inbounds i8, ptr %15, i64 8 br label %45 45: ; preds = %40, %42 %46 = phi i32 [ 0, %40 ], [ %43, %42 ] %47 = phi ptr [ %41, %40 ], [ %44, %42 ] %48 = add nuw nsw i32 %16, 1 %49 = icmp eq i32 %48, %3 br i1 %49, label %50, label %14, !llvm.loop !23 50: ; preds = %14, %45 %51 = phi i32 [ %46, %45 ], [ %17, %14 ] %52 = phi i32 [ %3, %45 ], [ %16, %14 ] %53 = load i32, ptr %2, align 8, !tbaa !6 br label %54 54: ; preds = %50, %1 %55 = phi i32 [ %3, %1 ], [ %53, %50 ] %56 = phi i32 [ %5, %1 ], [ %51, %50 ] %57 = phi i32 [ 0, %1 ], [ %52, %50 ] store i32 %56, ptr %4, align 4, !tbaa !12 %58 = sub nsw i32 %55, %57 store i32 %58, ptr %2, align 8, !tbaa !6 %59 = tail call i32 @eth_check_num_used(ptr noundef nonnull %2) #2 ret void } declare i32 @dev_kfree_skb_any(ptr noundef) local_unnamed_addr #1 declare i32 @dma_unmap_single(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @eth_check_num_used(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"_tx_ring", !8, i64 0, !8, i64 4, !11, i64 8, !11, i64 16, !11, i64 24} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!7, !8, i64 4} !13 = !{!7, !11, i64 8} !14 = !{!15, !8, i64 4} !15 = !{!"tx_desc", !8, i64 0, !8, i64 4} !16 = !{!7, !11, i64 24} !17 = !{!11, !11, i64 0} !18 = !{!19, !8, i64 0} !19 = !{!"sw", !8, i64 0, !7, i64 8} !20 = !{!7, !11, i64 16} !21 = !{!8, !8, i64 0} !22 = !{!15, !8, i64 0} !23 = distinct !{!23, !24} !24 = !{!"llvm.loop.mustprogress"}
lede_target_linux_cns3xxx_files_drivers_net_ethernet_cavium_extr_cns3xxx_eth.c_eth_complete_tx
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/usb/host/extr_ohci.h_ohci_hwPSWp.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/usb/host/extr_ohci.h_ohci_hwPSWp.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @ohci_hwPSWp], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal ptr @ohci_hwPSWp(ptr noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2) #0 { %4 = tail call i64 @big_endian_desc(ptr noundef %0) #2 %5 = icmp ne i64 %4, 0 %6 = load ptr, ptr %1, align 8, !tbaa !5 %7 = zext i1 %5 to i32 %8 = xor i32 %7, %2 %9 = sext i32 %8 to i64 %10 = getelementptr inbounds i32, ptr %6, i64 %9 ret ptr %10 } declare i64 @big_endian_desc(ptr noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"td", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/usb/host/extr_ohci.h_ohci_hwPSWp.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/usb/host/extr_ohci.h_ohci_hwPSWp.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @ohci_hwPSWp], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal ptr @ohci_hwPSWp(ptr noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2) #0 { %4 = tail call i64 @big_endian_desc(ptr noundef %0) #2 %5 = icmp ne i64 %4, 0 %6 = load ptr, ptr %1, align 8, !tbaa !6 %7 = zext i1 %5 to i32 %8 = xor i32 %7, %2 %9 = sext i32 %8 to i64 %10 = getelementptr inbounds i32, ptr %6, i64 %9 ret ptr %10 } declare i64 @big_endian_desc(ptr noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"td", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
fastsocket_kernel_drivers_usb_host_extr_ohci.h_ohci_hwPSWp
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_v4l2_m2m.c_ff_v4l2_m2m_codec_full_reinit.c' source_filename = "AnghaBench/FFmpeg/libavcodec/extr_v4l2_m2m.c_ff_v4l2_m2m_codec_full_reinit.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_5__ = type { i32, ptr, i32, i64, i64, i32, i32, i32 } @AV_LOG_DEBUG = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [16 x i8] c"%s full reinit\0A\00", align 1 @errno = dso_local local_unnamed_addr global i64 0, align 8 @EINTR = dso_local local_unnamed_addr global i64 0, align 8 @VIDIOC_STREAMOFF = dso_local local_unnamed_addr global i32 0, align 4 @AV_LOG_ERROR = dso_local local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [25 x i8] c"output VIDIOC_STREAMOFF\0A\00", align 1 @.str.2 = private unnamed_addr constant [26 x i8] c"capture VIDIOC_STREAMOFF\0A\00", align 1 @.str.3 = private unnamed_addr constant [34 x i8] c"v4l2 output format not supported\0A\00", align 1 @.str.4 = private unnamed_addr constant [35 x i8] c"v4l2 capture format not supported\0A\00", align 1 @.str.5 = private unnamed_addr constant [30 x i8] c"can't set v4l2 output format\0A\00", align 1 @.str.6 = private unnamed_addr constant [34 x i8] c"can't to set v4l2 capture format\0A\00", align 1 @.str.7 = private unnamed_addr constant [34 x i8] c"no v4l2 output context's buffers\0A\00", align 1 @.str.8 = private unnamed_addr constant [35 x i8] c"no v4l2 capture context's buffers\0A\00", align 1 ; Function Attrs: nounwind uwtable define dso_local i32 @ff_v4l2_m2m_codec_full_reinit(ptr noundef %0) local_unnamed_addr #0 { %2 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1 %3 = load ptr, ptr %2, align 8, !tbaa !5 %4 = load i32, ptr @AV_LOG_DEBUG, align 4, !tbaa !12 %5 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 7 %6 = load i32, ptr %5, align 8, !tbaa !13 %7 = tail call i32 (ptr, i32, ptr, ...) @av_log(ptr noundef %3, i32 noundef %4, ptr noundef nonnull @.str, i32 noundef %6) #3 %8 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 6 %9 = tail call i64 @atomic_load(ptr noundef nonnull %8) #3 %10 = icmp eq i64 %9, 0 br i1 %10, label %20, label %11 11: ; preds = %1 %12 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 5 br label %13 13: ; preds = %11, %13 %14 = tail call i32 @sem_wait(ptr noundef nonnull %12) #3 %15 = icmp eq i32 %14, -1 %16 = load i64, ptr @errno, align 8 %17 = load i64, ptr @EINTR, align 8 %18 = icmp eq i64 %16, %17 %19 = select i1 %15, i1 %18, i1 false br i1 %19, label %13, label %20, !llvm.loop !14 20: ; preds = %13, %1 %21 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 2 %22 = load i32, ptr @VIDIOC_STREAMOFF, align 4, !tbaa !12 %23 = tail call i32 @ff_v4l2_context_set_status(ptr noundef nonnull %21, i32 noundef %22) #3 %24 = icmp eq i32 %23, 0 br i1 %24, label %25, label %57 25: ; preds = %20 %26 = load i32, ptr @VIDIOC_STREAMOFF, align 4, !tbaa !12 %27 = tail call i32 @ff_v4l2_context_set_status(ptr noundef %0, i32 noundef %26) #3 %28 = icmp eq i32 %27, 0 br i1 %28, label %29, label %57 29: ; preds = %25 %30 = tail call i32 @ff_v4l2_context_release(ptr noundef nonnull %21) #3 %31 = tail call i32 @ff_v4l2_context_release(ptr noundef %0) #3 %32 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 3 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %32, i8 0, i64 16, i1 false) %33 = tail call i32 @ff_v4l2_context_get_format(ptr noundef nonnull %21, i32 noundef 0) #3 %34 = icmp eq i32 %33, 0 br i1 %34, label %35, label %57 35: ; preds = %29 %36 = tail call i32 @ff_v4l2_context_get_format(ptr noundef nonnull %0, i32 noundef 0) #3 %37 = icmp eq i32 %36, 0 br i1 %37, label %38, label %57 38: ; preds = %35 %39 = tail call i32 @ff_v4l2_context_set_format(ptr noundef nonnull %21) #3 %40 = icmp eq i32 %39, 0 br i1 %40, label %41, label %57 41: ; preds = %38 %42 = tail call i32 @ff_v4l2_context_set_format(ptr noundef nonnull %0) #3 %43 = icmp eq i32 %42, 0 br i1 %43, label %44, label %57 44: ; preds = %41 %45 = tail call i32 @ff_v4l2_context_init(ptr noundef nonnull %21) #3 %46 = icmp eq i32 %45, 0 br i1 %46, label %47, label %57 47: ; preds = %44 %48 = load ptr, ptr %2, align 8, !tbaa !5 %49 = icmp eq ptr %48, null br i1 %49, label %54, label %50 50: ; preds = %47 %51 = load i32, ptr %48, align 4, !tbaa !16 %52 = tail call i32 @av_codec_is_decoder(i32 noundef %51) #3 %53 = icmp eq i32 %52, 0 br i1 %53, label %54, label %63 54: ; preds = %50, %47 %55 = tail call i32 @ff_v4l2_context_init(ptr noundef nonnull %0) #3 %56 = icmp eq i32 %55, 0 br i1 %56, label %63, label %57 57: ; preds = %54, %44, %41, %38, %35, %29, %25, %20 %58 = phi ptr [ @AV_LOG_ERROR, %20 ], [ @AV_LOG_ERROR, %25 ], [ @AV_LOG_DEBUG, %29 ], [ @AV_LOG_DEBUG, %35 ], [ @AV_LOG_ERROR, %38 ], [ @AV_LOG_ERROR, %41 ], [ @AV_LOG_ERROR, %44 ], [ @AV_LOG_ERROR, %54 ] %59 = phi ptr [ @.str.1, %20 ], [ @.str.2, %25 ], [ @.str.3, %29 ], [ @.str.4, %35 ], [ @.str.5, %38 ], [ @.str.6, %41 ], [ @.str.7, %44 ], [ @.str.8, %54 ] %60 = phi i32 [ %23, %20 ], [ %27, %25 ], [ %33, %29 ], [ %36, %35 ], [ %39, %38 ], [ %42, %41 ], [ %45, %44 ], [ %55, %54 ] %61 = load i32, ptr %58, align 4, !tbaa !12 %62 = tail call i32 (ptr, i32, ptr, ...) @av_log(ptr noundef %3, i32 noundef %61, ptr noundef nonnull %59) #3 br label %63 63: ; preds = %57, %50, %54 %64 = phi i32 [ 0, %54 ], [ 0, %50 ], [ %60, %57 ] ret i32 %64 } declare i32 @av_log(ptr noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #1 declare i64 @atomic_load(ptr noundef) local_unnamed_addr #1 declare i32 @sem_wait(ptr noundef) local_unnamed_addr #1 declare i32 @ff_v4l2_context_set_status(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ff_v4l2_context_release(ptr noundef) local_unnamed_addr #1 declare i32 @ff_v4l2_context_get_format(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ff_v4l2_context_set_format(ptr noundef) local_unnamed_addr #1 declare i32 @ff_v4l2_context_init(ptr noundef) local_unnamed_addr #1 declare i32 @av_codec_is_decoder(i32 noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 8} !6 = !{!"TYPE_5__", !7, i64 0, !10, i64 8, !7, i64 16, !11, i64 24, !11, i64 32, !7, i64 40, !7, i64 44, !7, i64 48} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!"long", !8, i64 0} !12 = !{!7, !7, i64 0} !13 = !{!6, !7, i64 48} !14 = distinct !{!14, !15} !15 = !{!"llvm.loop.mustprogress"} !16 = !{!17, !7, i64 0} !17 = !{!"TYPE_4__", !7, i64 0}
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_v4l2_m2m.c_ff_v4l2_m2m_codec_full_reinit.c' source_filename = "AnghaBench/FFmpeg/libavcodec/extr_v4l2_m2m.c_ff_v4l2_m2m_codec_full_reinit.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @AV_LOG_DEBUG = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [16 x i8] c"%s full reinit\0A\00", align 1 @errno = common local_unnamed_addr global i64 0, align 8 @EINTR = common local_unnamed_addr global i64 0, align 8 @VIDIOC_STREAMOFF = common local_unnamed_addr global i32 0, align 4 @AV_LOG_ERROR = common local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [25 x i8] c"output VIDIOC_STREAMOFF\0A\00", align 1 @.str.2 = private unnamed_addr constant [26 x i8] c"capture VIDIOC_STREAMOFF\0A\00", align 1 @.str.3 = private unnamed_addr constant [34 x i8] c"v4l2 output format not supported\0A\00", align 1 @.str.4 = private unnamed_addr constant [35 x i8] c"v4l2 capture format not supported\0A\00", align 1 @.str.5 = private unnamed_addr constant [30 x i8] c"can't set v4l2 output format\0A\00", align 1 @.str.6 = private unnamed_addr constant [34 x i8] c"can't to set v4l2 capture format\0A\00", align 1 @.str.7 = private unnamed_addr constant [34 x i8] c"no v4l2 output context's buffers\0A\00", align 1 @.str.8 = private unnamed_addr constant [35 x i8] c"no v4l2 capture context's buffers\0A\00", align 1 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @ff_v4l2_m2m_codec_full_reinit(ptr noundef %0) local_unnamed_addr #0 { %2 = getelementptr inbounds i8, ptr %0, i64 8 %3 = load ptr, ptr %2, align 8, !tbaa !6 %4 = load i32, ptr @AV_LOG_DEBUG, align 4, !tbaa !13 %5 = getelementptr inbounds i8, ptr %0, i64 48 %6 = load i32, ptr %5, align 8, !tbaa !14 %7 = tail call i32 (ptr, i32, ptr, ...) @av_log(ptr noundef %3, i32 noundef %4, ptr noundef nonnull @.str, i32 noundef %6) #3 %8 = getelementptr inbounds i8, ptr %0, i64 44 %9 = tail call i64 @atomic_load(ptr noundef nonnull %8) #3 %10 = icmp eq i64 %9, 0 br i1 %10, label %20, label %11 11: ; preds = %1 %12 = getelementptr inbounds i8, ptr %0, i64 40 br label %13 13: ; preds = %11, %13 %14 = tail call i32 @sem_wait(ptr noundef nonnull %12) #3 %15 = icmp eq i32 %14, -1 %16 = load i64, ptr @errno, align 8 %17 = load i64, ptr @EINTR, align 8 %18 = icmp eq i64 %16, %17 %19 = select i1 %15, i1 %18, i1 false br i1 %19, label %13, label %20, !llvm.loop !15 20: ; preds = %13, %1 %21 = getelementptr inbounds i8, ptr %0, i64 16 %22 = load i32, ptr @VIDIOC_STREAMOFF, align 4, !tbaa !13 %23 = tail call i32 @ff_v4l2_context_set_status(ptr noundef nonnull %21, i32 noundef %22) #3 %24 = icmp eq i32 %23, 0 br i1 %24, label %25, label %57 25: ; preds = %20 %26 = load i32, ptr @VIDIOC_STREAMOFF, align 4, !tbaa !13 %27 = tail call i32 @ff_v4l2_context_set_status(ptr noundef %0, i32 noundef %26) #3 %28 = icmp eq i32 %27, 0 br i1 %28, label %29, label %57 29: ; preds = %25 %30 = tail call i32 @ff_v4l2_context_release(ptr noundef nonnull %21) #3 %31 = tail call i32 @ff_v4l2_context_release(ptr noundef %0) #3 %32 = getelementptr inbounds i8, ptr %0, i64 24 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %32, i8 0, i64 16, i1 false) %33 = tail call i32 @ff_v4l2_context_get_format(ptr noundef nonnull %21, i32 noundef 0) #3 %34 = icmp eq i32 %33, 0 br i1 %34, label %35, label %57 35: ; preds = %29 %36 = tail call i32 @ff_v4l2_context_get_format(ptr noundef nonnull %0, i32 noundef 0) #3 %37 = icmp eq i32 %36, 0 br i1 %37, label %38, label %57 38: ; preds = %35 %39 = tail call i32 @ff_v4l2_context_set_format(ptr noundef nonnull %21) #3 %40 = icmp eq i32 %39, 0 br i1 %40, label %41, label %57 41: ; preds = %38 %42 = tail call i32 @ff_v4l2_context_set_format(ptr noundef nonnull %0) #3 %43 = icmp eq i32 %42, 0 br i1 %43, label %44, label %57 44: ; preds = %41 %45 = tail call i32 @ff_v4l2_context_init(ptr noundef nonnull %21) #3 %46 = icmp eq i32 %45, 0 br i1 %46, label %47, label %57 47: ; preds = %44 %48 = load ptr, ptr %2, align 8, !tbaa !6 %49 = icmp eq ptr %48, null br i1 %49, label %54, label %50 50: ; preds = %47 %51 = load i32, ptr %48, align 4, !tbaa !17 %52 = tail call i32 @av_codec_is_decoder(i32 noundef %51) #3 %53 = icmp eq i32 %52, 0 br i1 %53, label %54, label %63 54: ; preds = %50, %47 %55 = tail call i32 @ff_v4l2_context_init(ptr noundef nonnull %0) #3 %56 = icmp eq i32 %55, 0 br i1 %56, label %63, label %57 57: ; preds = %54, %44, %41, %38, %35, %29, %25, %20 %58 = phi ptr [ @AV_LOG_ERROR, %20 ], [ @AV_LOG_ERROR, %25 ], [ @AV_LOG_DEBUG, %29 ], [ @AV_LOG_DEBUG, %35 ], [ @AV_LOG_ERROR, %38 ], [ @AV_LOG_ERROR, %41 ], [ @AV_LOG_ERROR, %44 ], [ @AV_LOG_ERROR, %54 ] %59 = phi ptr [ @.str.1, %20 ], [ @.str.2, %25 ], [ @.str.3, %29 ], [ @.str.4, %35 ], [ @.str.5, %38 ], [ @.str.6, %41 ], [ @.str.7, %44 ], [ @.str.8, %54 ] %60 = phi i32 [ %23, %20 ], [ %27, %25 ], [ %33, %29 ], [ %36, %35 ], [ %39, %38 ], [ %42, %41 ], [ %45, %44 ], [ %55, %54 ] %61 = load i32, ptr %58, align 4, !tbaa !13 %62 = tail call i32 (ptr, i32, ptr, ...) @av_log(ptr noundef %3, i32 noundef %61, ptr noundef nonnull %59) #3 br label %63 63: ; preds = %57, %50, %54 %64 = phi i32 [ 0, %54 ], [ 0, %50 ], [ %60, %57 ] ret i32 %64 } declare i32 @av_log(ptr noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #1 declare i64 @atomic_load(ptr noundef) local_unnamed_addr #1 declare i32 @sem_wait(ptr noundef) local_unnamed_addr #1 declare i32 @ff_v4l2_context_set_status(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ff_v4l2_context_release(ptr noundef) local_unnamed_addr #1 declare i32 @ff_v4l2_context_get_format(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ff_v4l2_context_set_format(ptr noundef) local_unnamed_addr #1 declare i32 @ff_v4l2_context_init(ptr noundef) local_unnamed_addr #1 declare i32 @av_codec_is_decoder(i32 noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 8} !7 = !{!"TYPE_5__", !8, i64 0, !11, i64 8, !8, i64 16, !12, i64 24, !12, i64 32, !8, i64 40, !8, i64 44, !8, i64 48} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!"long", !9, i64 0} !13 = !{!8, !8, i64 0} !14 = !{!7, !8, i64 48} !15 = distinct !{!15, !16} !16 = !{!"llvm.loop.mustprogress"} !17 = !{!18, !8, i64 0} !18 = !{!"TYPE_4__", !8, i64 0}
FFmpeg_libavcodec_extr_v4l2_m2m.c_ff_v4l2_m2m_codec_full_reinit
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/netronome/nfp/extr_nfp_net_common.c_nfp_net_set_hash.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/netronome/nfp/extr_nfp_net_common.c_nfp_net_set_hash.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.nfp_meta_parsed = type { i32, i32 } @NETIF_F_RXHASH = dso_local local_unnamed_addr global i32 0, align 4 @PKT_HASH_TYPE_L3 = dso_local local_unnamed_addr global i32 0, align 4 @PKT_HASH_TYPE_L4 = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @nfp_net_set_hash], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @nfp_net_set_hash(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1, i32 noundef %2, ptr noundef %3) #0 { %5 = load i32, ptr %0, align 4, !tbaa !5 %6 = load i32, ptr @NETIF_F_RXHASH, align 4, !tbaa !10 %7 = and i32 %6, %5 %8 = icmp eq i32 %7, 0 br i1 %8, label %17, label %9 9: ; preds = %4 %10 = add i32 %2, -128 %11 = icmp ult i32 %10, 3 %12 = load i32, ptr @PKT_HASH_TYPE_L3, align 4 %13 = load i32, ptr @PKT_HASH_TYPE_L4, align 4 %14 = select i1 %11, i32 %12, i32 %13 %15 = getelementptr inbounds %struct.nfp_meta_parsed, ptr %1, i64 0, i32 1 store i32 %14, ptr %15, align 4 %16 = tail call i32 @get_unaligned_be32(ptr noundef %3) #2 store i32 %16, ptr %1, align 4, !tbaa !11 br label %17 17: ; preds = %4, %9 ret void } declare i32 @get_unaligned_be32(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"net_device", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!7, !7, i64 0} !11 = !{!12, !7, i64 0} !12 = !{!"nfp_meta_parsed", !7, i64 0, !7, i64 4}
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/netronome/nfp/extr_nfp_net_common.c_nfp_net_set_hash.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/netronome/nfp/extr_nfp_net_common.c_nfp_net_set_hash.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @NETIF_F_RXHASH = common local_unnamed_addr global i32 0, align 4 @PKT_HASH_TYPE_L3 = common local_unnamed_addr global i32 0, align 4 @PKT_HASH_TYPE_L4 = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @nfp_net_set_hash], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @nfp_net_set_hash(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1, i32 noundef %2, ptr noundef %3) #0 { %5 = load i32, ptr %0, align 4, !tbaa !6 %6 = load i32, ptr @NETIF_F_RXHASH, align 4, !tbaa !11 %7 = and i32 %6, %5 %8 = icmp eq i32 %7, 0 br i1 %8, label %17, label %9 9: ; preds = %4 %10 = add i32 %2, -128 %11 = icmp ult i32 %10, 3 %12 = load i32, ptr @PKT_HASH_TYPE_L3, align 4 %13 = load i32, ptr @PKT_HASH_TYPE_L4, align 4 %14 = select i1 %11, i32 %12, i32 %13 %15 = getelementptr inbounds i8, ptr %1, i64 4 store i32 %14, ptr %15, align 4 %16 = tail call i32 @get_unaligned_be32(ptr noundef %3) #2 store i32 %16, ptr %1, align 4, !tbaa !12 br label %17 17: ; preds = %4, %9 ret void } declare i32 @get_unaligned_be32(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"net_device", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!8, !8, i64 0} !12 = !{!13, !8, i64 0} !13 = !{!"nfp_meta_parsed", !8, i64 0, !8, i64 4}
linux_drivers_net_ethernet_netronome_nfp_extr_nfp_net_common.c_nfp_net_set_hash
; ModuleID = 'AnghaBench/freebsd/usr.sbin/ppp/extr_mbuf.c_m_dequeue.c' source_filename = "AnghaBench/freebsd/usr.sbin/ppp/extr_mbuf.c_m_dequeue.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.mqueue = type { i64, ptr, ptr } @LogDEBUG = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [28 x i8] c"m_dequeue: queue len = %lu\0A\00", align 1 @LogERROR = dso_local local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [30 x i8] c"m_dequeue: Not zero (%lu)!!!\0A\00", align 1 ; Function Attrs: nounwind uwtable define dso_local ptr @m_dequeue(ptr nocapture noundef %0) local_unnamed_addr #0 { %2 = load i32, ptr @LogDEBUG, align 4, !tbaa !5 %3 = load i64, ptr %0, align 8, !tbaa !9 %4 = trunc i64 %3 to i32 %5 = tail call i32 @log_Printf(i32 noundef %2, ptr noundef nonnull @.str, i32 noundef %4) #2 %6 = getelementptr inbounds %struct.mqueue, ptr %0, i64 0, i32 1 %7 = load ptr, ptr %6, align 8, !tbaa !13 %8 = icmp eq ptr %7, null br i1 %8, label %22, label %9 9: ; preds = %1 %10 = load ptr, ptr %7, align 8, !tbaa !14 store ptr %10, ptr %6, align 8, !tbaa !13 %11 = load i64, ptr %0, align 8, !tbaa !9 %12 = add nsw i64 %11, -1 store i64 %12, ptr %0, align 8, !tbaa !9 %13 = icmp eq ptr %10, null br i1 %13, label %14, label %21 14: ; preds = %9 %15 = getelementptr inbounds %struct.mqueue, ptr %0, i64 0, i32 2 store ptr null, ptr %15, align 8, !tbaa !16 %16 = icmp eq i64 %12, 0 br i1 %16, label %21, label %17 17: ; preds = %14 %18 = load i32, ptr @LogERROR, align 4, !tbaa !5 %19 = trunc i64 %12 to i32 %20 = tail call i32 @log_Printf(i32 noundef %18, ptr noundef nonnull @.str.1, i32 noundef %19) #2 br label %21 21: ; preds = %14, %17, %9 store ptr null, ptr %7, align 8, !tbaa !14 br label %22 22: ; preds = %21, %1 ret ptr %7 } declare i32 @log_Printf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 0} !10 = !{!"mqueue", !11, i64 0, !12, i64 8, !12, i64 16} !11 = !{!"long", !7, i64 0} !12 = !{!"any pointer", !7, i64 0} !13 = !{!10, !12, i64 8} !14 = !{!15, !12, i64 0} !15 = !{!"mbuf", !12, i64 0} !16 = !{!10, !12, i64 16}
; ModuleID = 'AnghaBench/freebsd/usr.sbin/ppp/extr_mbuf.c_m_dequeue.c' source_filename = "AnghaBench/freebsd/usr.sbin/ppp/extr_mbuf.c_m_dequeue.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @LogDEBUG = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [28 x i8] c"m_dequeue: queue len = %lu\0A\00", align 1 @LogERROR = common local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [30 x i8] c"m_dequeue: Not zero (%lu)!!!\0A\00", align 1 ; Function Attrs: nounwind ssp uwtable(sync) define ptr @m_dequeue(ptr nocapture noundef %0) local_unnamed_addr #0 { %2 = load i32, ptr @LogDEBUG, align 4, !tbaa !6 %3 = load i64, ptr %0, align 8, !tbaa !10 %4 = trunc i64 %3 to i32 %5 = tail call i32 @log_Printf(i32 noundef %2, ptr noundef nonnull @.str, i32 noundef %4) #2 %6 = getelementptr inbounds i8, ptr %0, i64 8 %7 = load ptr, ptr %6, align 8, !tbaa !14 %8 = icmp eq ptr %7, null br i1 %8, label %22, label %9 9: ; preds = %1 %10 = load ptr, ptr %7, align 8, !tbaa !15 store ptr %10, ptr %6, align 8, !tbaa !14 %11 = load i64, ptr %0, align 8, !tbaa !10 %12 = add nsw i64 %11, -1 store i64 %12, ptr %0, align 8, !tbaa !10 %13 = icmp eq ptr %10, null br i1 %13, label %14, label %21 14: ; preds = %9 %15 = getelementptr inbounds i8, ptr %0, i64 16 store ptr null, ptr %15, align 8, !tbaa !17 %16 = icmp eq i64 %12, 0 br i1 %16, label %21, label %17 17: ; preds = %14 %18 = load i32, ptr @LogERROR, align 4, !tbaa !6 %19 = trunc i64 %12 to i32 %20 = tail call i32 @log_Printf(i32 noundef %18, ptr noundef nonnull @.str.1, i32 noundef %19) #2 br label %21 21: ; preds = %14, %17, %9 store ptr null, ptr %7, align 8, !tbaa !15 br label %22 22: ; preds = %21, %1 ret ptr %7 } declare i32 @log_Printf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"mqueue", !12, i64 0, !13, i64 8, !13, i64 16} !12 = !{!"long", !8, i64 0} !13 = !{!"any pointer", !8, i64 0} !14 = !{!11, !13, i64 8} !15 = !{!16, !13, i64 0} !16 = !{!"mbuf", !13, i64 0} !17 = !{!11, !13, i64 16}
freebsd_usr.sbin_ppp_extr_mbuf.c_m_dequeue
; ModuleID = 'AnghaBench/linux/drivers/watchdog/extr_loongson1_wdt.c_ls1x_wdt_start.c' source_filename = "AnghaBench/linux/drivers/watchdog/extr_loongson1_wdt.c_ls1x_wdt_start.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @WDT_EN = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @ls1x_wdt_start], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef i32 @ls1x_wdt_start(ptr noundef %0) #0 { %2 = tail call ptr @watchdog_get_drvdata(ptr noundef %0) #2 %3 = load i64, ptr %2, align 8, !tbaa !5 %4 = load i64, ptr @WDT_EN, align 8, !tbaa !10 %5 = add nsw i64 %4, %3 %6 = tail call i32 @writel(i32 noundef 1, i64 noundef %5) #2 ret i32 0 } declare ptr @watchdog_get_drvdata(ptr noundef) local_unnamed_addr #1 declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"ls1x_wdt_drvdata", !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!7, !7, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/watchdog/extr_loongson1_wdt.c_ls1x_wdt_start.c' source_filename = "AnghaBench/linux/drivers/watchdog/extr_loongson1_wdt.c_ls1x_wdt_start.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @WDT_EN = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @ls1x_wdt_start], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal noundef i32 @ls1x_wdt_start(ptr noundef %0) #0 { %2 = tail call ptr @watchdog_get_drvdata(ptr noundef %0) #2 %3 = load i64, ptr %2, align 8, !tbaa !6 %4 = load i64, ptr @WDT_EN, align 8, !tbaa !11 %5 = add nsw i64 %4, %3 %6 = tail call i32 @writel(i32 noundef 1, i64 noundef %5) #2 ret i32 0 } declare ptr @watchdog_get_drvdata(ptr noundef) local_unnamed_addr #1 declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"ls1x_wdt_drvdata", !8, i64 0} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!8, !8, i64 0}
linux_drivers_watchdog_extr_loongson1_wdt.c_ls1x_wdt_start
; ModuleID = 'AnghaBench/openssl/crypto/evp/extr_pkey_kdf.c_pkey_kdf_ctrl_str.c' source_filename = "AnghaBench/openssl/crypto/evp/extr_pkey_kdf.c_pkey_kdf_ctrl_str.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_10__ = type { ptr, i32, i32 } %struct.TYPE_11__ = type { ptr, ptr, ptr } @OSSL_PARAM_END = dso_local local_unnamed_addr global %struct.TYPE_10__ zeroinitializer, align 8 @.str = private unnamed_addr constant [3 x i8] c"md\00", align 1 @OSSL_KDF_PARAM_DIGEST = dso_local local_unnamed_addr global ptr null, align 8 @.str.1 = private unnamed_addr constant [2 x i8] c"N\00", align 1 @OSSL_KDF_PARAM_SCRYPT_N = dso_local local_unnamed_addr global ptr null, align 8 @OSSL_KDF_PARAM_SEED = dso_local local_unnamed_addr global ptr null, align 8 @OSSL_KDF_PARAM_INFO = dso_local local_unnamed_addr global ptr null, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @pkey_kdf_ctrl_str], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @pkey_kdf_ctrl_str(ptr nocapture noundef readonly %0, ptr noundef %1, ptr noundef %2) #0 { %4 = alloca [2 x %struct.TYPE_10__], align 16 %5 = load ptr, ptr %0, align 8, !tbaa !5 %6 = getelementptr inbounds %struct.TYPE_11__, ptr %5, i64 0, i32 2 %7 = load ptr, ptr %6, align 8, !tbaa !10 %8 = tail call ptr @EVP_KDF_CTX_kdf(ptr noundef %7) #4 %9 = tail call ptr @EVP_KDF_settable_ctx_params(ptr noundef %8) #4 call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %4) #4 call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(16) %4, ptr noundef nonnull align 8 dereferenceable(16) @OSSL_PARAM_END, i64 16, i1 false), !tbaa.struct !12 %10 = getelementptr inbounds %struct.TYPE_10__, ptr %4, i64 1 call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(16) %10, ptr noundef nonnull align 8 dereferenceable(16) @OSSL_PARAM_END, i64 16, i1 false), !tbaa.struct !12 %11 = tail call i64 @strcmp(ptr noundef %1, ptr noundef nonnull @.str) #4 %12 = icmp eq i64 %11, 0 %13 = load ptr, ptr @OSSL_KDF_PARAM_DIGEST, align 8 %14 = select i1 %12, ptr %13, ptr %1 %15 = tail call i64 @strcmp(ptr noundef %14, ptr noundef nonnull @.str.1) #4 %16 = icmp eq i64 %15, 0 %17 = load ptr, ptr @OSSL_KDF_PARAM_SCRYPT_N, align 8 %18 = select i1 %16, ptr %17, ptr %14 %19 = tail call i32 @strlen(ptr noundef %2) #4 %20 = call i32 @OSSL_PARAM_allocate_from_text(ptr noundef nonnull %4, ptr noundef %9, ptr noundef %18, ptr noundef %2, i32 noundef %19) #4 %21 = icmp eq i32 %20, 0 br i1 %21, label %48, label %22 22: ; preds = %3 %23 = load ptr, ptr %4, align 16, !tbaa !16 %24 = load ptr, ptr @OSSL_KDF_PARAM_SEED, align 8, !tbaa !13 %25 = call i64 @strcmp(ptr noundef %23, ptr noundef %24) #4 %26 = icmp eq i64 %25, 0 br i1 %26, label %27, label %29 27: ; preds = %22 %28 = getelementptr inbounds %struct.TYPE_11__, ptr %5, i64 0, i32 1 br label %34 29: ; preds = %22 %30 = load ptr, ptr %4, align 16, !tbaa !16 %31 = load ptr, ptr @OSSL_KDF_PARAM_INFO, align 8, !tbaa !13 %32 = call i64 @strcmp(ptr noundef %30, ptr noundef %31) #4 %33 = icmp eq i64 %32, 0 br i1 %33, label %34, label %41 34: ; preds = %29, %27 %35 = phi ptr [ %28, %27 ], [ %5, %29 ] %36 = getelementptr inbounds %struct.TYPE_10__, ptr %4, i64 0, i32 1 %37 = load i32, ptr %36, align 8, !tbaa !18 %38 = getelementptr inbounds %struct.TYPE_10__, ptr %4, i64 0, i32 2 %39 = load i32, ptr %38, align 4, !tbaa !19 %40 = call i32 @collect(ptr noundef nonnull %35, i32 noundef %37, i32 noundef %39) #4 br label %43 41: ; preds = %29 %42 = call i32 @EVP_KDF_CTX_set_params(ptr noundef %7, ptr noundef nonnull %4) #4 br label %43 43: ; preds = %41, %34 %44 = phi i32 [ %40, %34 ], [ %42, %41 ] %45 = getelementptr inbounds %struct.TYPE_10__, ptr %4, i64 0, i32 1 %46 = load i32, ptr %45, align 8, !tbaa !18 %47 = call i32 @OPENSSL_free(i32 noundef %46) #4 br label %48 48: ; preds = %3, %43 %49 = phi i32 [ %44, %43 ], [ 0, %3 ] call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %4) #4 ret i32 %49 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @EVP_KDF_CTX_kdf(ptr noundef) local_unnamed_addr #2 declare ptr @EVP_KDF_settable_ctx_params(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3 declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @OSSL_PARAM_allocate_from_text(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @strlen(ptr noundef) local_unnamed_addr #2 declare i32 @collect(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @EVP_KDF_CTX_set_params(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @OPENSSL_free(i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) } attributes #4 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_12__", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 16} !11 = !{!"TYPE_11__", !7, i64 0, !7, i64 8, !7, i64 16} !12 = !{i64 0, i64 8, !13, i64 8, i64 4, !14, i64 12, i64 4, !14} !13 = !{!7, !7, i64 0} !14 = !{!15, !15, i64 0} !15 = !{!"int", !8, i64 0} !16 = !{!17, !7, i64 0} !17 = !{!"TYPE_10__", !7, i64 0, !15, i64 8, !15, i64 12} !18 = !{!17, !15, i64 8} !19 = !{!17, !15, i64 12}
; ModuleID = 'AnghaBench/openssl/crypto/evp/extr_pkey_kdf.c_pkey_kdf_ctrl_str.c' source_filename = "AnghaBench/openssl/crypto/evp/extr_pkey_kdf.c_pkey_kdf_ctrl_str.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_10__ = type { ptr, i32, i32 } @OSSL_PARAM_END = common local_unnamed_addr global %struct.TYPE_10__ zeroinitializer, align 8 @.str = private unnamed_addr constant [3 x i8] c"md\00", align 1 @OSSL_KDF_PARAM_DIGEST = common local_unnamed_addr global ptr null, align 8 @.str.1 = private unnamed_addr constant [2 x i8] c"N\00", align 1 @OSSL_KDF_PARAM_SCRYPT_N = common local_unnamed_addr global ptr null, align 8 @OSSL_KDF_PARAM_SEED = common local_unnamed_addr global ptr null, align 8 @OSSL_KDF_PARAM_INFO = common local_unnamed_addr global ptr null, align 8 @llvm.used = appending global [1 x ptr] [ptr @pkey_kdf_ctrl_str], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @pkey_kdf_ctrl_str(ptr nocapture noundef readonly %0, ptr noundef %1, ptr noundef %2) #0 { %4 = alloca [2 x %struct.TYPE_10__], align 8 %5 = load ptr, ptr %0, align 8, !tbaa !6 %6 = getelementptr inbounds i8, ptr %5, i64 16 %7 = load ptr, ptr %6, align 8, !tbaa !11 %8 = tail call ptr @EVP_KDF_CTX_kdf(ptr noundef %7) #4 %9 = tail call ptr @EVP_KDF_settable_ctx_params(ptr noundef %8) #4 call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %4) #4 call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %4, ptr noundef nonnull align 8 dereferenceable(16) @OSSL_PARAM_END, i64 16, i1 false), !tbaa.struct !13 %10 = getelementptr inbounds i8, ptr %4, i64 16 call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %10, ptr noundef nonnull align 8 dereferenceable(16) @OSSL_PARAM_END, i64 16, i1 false), !tbaa.struct !13 %11 = tail call i64 @strcmp(ptr noundef %1, ptr noundef nonnull @.str) #4 %12 = icmp eq i64 %11, 0 %13 = load ptr, ptr @OSSL_KDF_PARAM_DIGEST, align 8 %14 = select i1 %12, ptr %13, ptr %1 %15 = tail call i64 @strcmp(ptr noundef %14, ptr noundef nonnull @.str.1) #4 %16 = icmp eq i64 %15, 0 %17 = load ptr, ptr @OSSL_KDF_PARAM_SCRYPT_N, align 8 %18 = select i1 %16, ptr %17, ptr %14 %19 = tail call i32 @strlen(ptr noundef %2) #4 %20 = call i32 @OSSL_PARAM_allocate_from_text(ptr noundef nonnull %4, ptr noundef %9, ptr noundef %18, ptr noundef %2, i32 noundef %19) #4 %21 = icmp eq i32 %20, 0 br i1 %21, label %48, label %22 22: ; preds = %3 %23 = load ptr, ptr %4, align 8, !tbaa !17 %24 = load ptr, ptr @OSSL_KDF_PARAM_SEED, align 8, !tbaa !14 %25 = call i64 @strcmp(ptr noundef %23, ptr noundef %24) #4 %26 = icmp eq i64 %25, 0 br i1 %26, label %27, label %29 27: ; preds = %22 %28 = getelementptr inbounds i8, ptr %5, i64 8 br label %34 29: ; preds = %22 %30 = load ptr, ptr %4, align 8, !tbaa !17 %31 = load ptr, ptr @OSSL_KDF_PARAM_INFO, align 8, !tbaa !14 %32 = call i64 @strcmp(ptr noundef %30, ptr noundef %31) #4 %33 = icmp eq i64 %32, 0 br i1 %33, label %34, label %41 34: ; preds = %29, %27 %35 = phi ptr [ %28, %27 ], [ %5, %29 ] %36 = getelementptr inbounds i8, ptr %4, i64 8 %37 = load i32, ptr %36, align 8, !tbaa !19 %38 = getelementptr inbounds i8, ptr %4, i64 12 %39 = load i32, ptr %38, align 4, !tbaa !20 %40 = call i32 @collect(ptr noundef nonnull %35, i32 noundef %37, i32 noundef %39) #4 br label %43 41: ; preds = %29 %42 = call i32 @EVP_KDF_CTX_set_params(ptr noundef %7, ptr noundef nonnull %4) #4 br label %43 43: ; preds = %41, %34 %44 = phi i32 [ %40, %34 ], [ %42, %41 ] %45 = getelementptr inbounds i8, ptr %4, i64 8 %46 = load i32, ptr %45, align 8, !tbaa !19 %47 = call i32 @OPENSSL_free(i32 noundef %46) #4 br label %48 48: ; preds = %3, %43 %49 = phi i32 [ %44, %43 ], [ 0, %3 ] call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %4) #4 ret i32 %49 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @EVP_KDF_CTX_kdf(ptr noundef) local_unnamed_addr #2 declare ptr @EVP_KDF_settable_ctx_params(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3 declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @OSSL_PARAM_allocate_from_text(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @strlen(ptr noundef) local_unnamed_addr #2 declare i32 @collect(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @EVP_KDF_CTX_set_params(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @OPENSSL_free(i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) } attributes #4 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_12__", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !8, i64 16} !12 = !{!"TYPE_11__", !8, i64 0, !8, i64 8, !8, i64 16} !13 = !{i64 0, i64 8, !14, i64 8, i64 4, !15, i64 12, i64 4, !15} !14 = !{!8, !8, i64 0} !15 = !{!16, !16, i64 0} !16 = !{!"int", !9, i64 0} !17 = !{!18, !8, i64 0} !18 = !{!"TYPE_10__", !8, i64 0, !16, i64 8, !16, i64 12} !19 = !{!18, !16, i64 8} !20 = !{!18, !16, i64 12}
openssl_crypto_evp_extr_pkey_kdf.c_pkey_kdf_ctrl_str
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/rt2x00/extr_rt2800lib.c_rt2800_init_rfcsr_3290.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/rt2x00/extr_rt2800lib.c_rt2800_init_rfcsr_3290.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @RFCSR29_RSSI_GAIN = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @rt2800_init_rfcsr_3290], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @rt2800_init_rfcsr_3290(ptr noundef %0) #0 { %2 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 %3 = tail call i32 @rt2800_rf_init_calibration(ptr noundef %0, i32 noundef 2) #3 %4 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 1, i32 noundef 15) #3 %5 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 2, i32 noundef 128) #3 %6 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 3, i32 noundef 8) #3 %7 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 4, i32 noundef 0) #3 %8 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 6, i32 noundef 160) #3 %9 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 8, i32 noundef 243) #3 %10 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 9, i32 noundef 2) #3 %11 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 10, i32 noundef 83) #3 %12 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 11, i32 noundef 74) #3 %13 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 12, i32 noundef 70) #3 %14 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 13, i32 noundef 159) #3 %15 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 18, i32 noundef 2) #3 %16 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 22, i32 noundef 32) #3 %17 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 25, i32 noundef 131) #3 %18 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 26, i32 noundef 130) #3 %19 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 27, i32 noundef 9) #3 %20 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 29, i32 noundef 16) #3 %21 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 30, i32 noundef 16) #3 %22 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 31, i32 noundef 128) #3 %23 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 32, i32 noundef 128) #3 %24 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 33, i32 noundef 0) #3 %25 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 34, i32 noundef 5) #3 %26 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 35, i32 noundef 18) #3 %27 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 36, i32 noundef 0) #3 %28 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 38, i32 noundef 133) #3 %29 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 39, i32 noundef 27) #3 %30 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 40, i32 noundef 11) #3 %31 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 41, i32 noundef 187) #3 %32 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 42, i32 noundef 213) #3 %33 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 43, i32 noundef 123) #3 %34 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 44, i32 noundef 14) #3 %35 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 45, i32 noundef 162) #3 %36 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 46, i32 noundef 115) #3 %37 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 47, i32 noundef 0) #3 %38 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 48, i32 noundef 16) #3 %39 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 49, i32 noundef 152) #3 %40 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 52, i32 noundef 56) #3 %41 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 53, i32 noundef 0) #3 %42 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 54, i32 noundef 120) #3 %43 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 55, i32 noundef 67) #3 %44 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 56, i32 noundef 2) #3 %45 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 57, i32 noundef 128) #3 %46 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 58, i32 noundef 127) #3 %47 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 59, i32 noundef 9) #3 %48 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 60, i32 noundef 69) #3 %49 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 61, i32 noundef 193) #3 %50 = call i32 @rt2800_rfcsr_read(ptr noundef %0, i32 noundef 29, ptr noundef nonnull %2) #3 %51 = load i32, ptr @RFCSR29_RSSI_GAIN, align 4, !tbaa !5 %52 = call i32 @rt2x00_set_field8(ptr noundef nonnull %2, i32 noundef %51, i32 noundef 3) #3 %53 = load i32, ptr %2, align 4, !tbaa !5 %54 = call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 29, i32 noundef %53) #3 %55 = call i32 @rt2800_led_open_drain_enable(ptr noundef %0) #3 %56 = call i32 @rt2800_normal_mode_setup_3xxx(ptr noundef %0) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @rt2800_rf_init_calibration(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @rt2800_rfcsr_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @rt2800_rfcsr_read(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @rt2x00_set_field8(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @rt2800_led_open_drain_enable(ptr noundef) local_unnamed_addr #2 declare i32 @rt2800_normal_mode_setup_3xxx(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/rt2x00/extr_rt2800lib.c_rt2800_init_rfcsr_3290.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/rt2x00/extr_rt2800lib.c_rt2800_init_rfcsr_3290.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @RFCSR29_RSSI_GAIN = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @rt2800_init_rfcsr_3290], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @rt2800_init_rfcsr_3290(ptr noundef %0) #0 { %2 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 %3 = tail call i32 @rt2800_rf_init_calibration(ptr noundef %0, i32 noundef 2) #3 %4 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 1, i32 noundef 15) #3 %5 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 2, i32 noundef 128) #3 %6 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 3, i32 noundef 8) #3 %7 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 4, i32 noundef 0) #3 %8 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 6, i32 noundef 160) #3 %9 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 8, i32 noundef 243) #3 %10 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 9, i32 noundef 2) #3 %11 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 10, i32 noundef 83) #3 %12 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 11, i32 noundef 74) #3 %13 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 12, i32 noundef 70) #3 %14 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 13, i32 noundef 159) #3 %15 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 18, i32 noundef 2) #3 %16 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 22, i32 noundef 32) #3 %17 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 25, i32 noundef 131) #3 %18 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 26, i32 noundef 130) #3 %19 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 27, i32 noundef 9) #3 %20 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 29, i32 noundef 16) #3 %21 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 30, i32 noundef 16) #3 %22 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 31, i32 noundef 128) #3 %23 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 32, i32 noundef 128) #3 %24 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 33, i32 noundef 0) #3 %25 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 34, i32 noundef 5) #3 %26 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 35, i32 noundef 18) #3 %27 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 36, i32 noundef 0) #3 %28 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 38, i32 noundef 133) #3 %29 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 39, i32 noundef 27) #3 %30 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 40, i32 noundef 11) #3 %31 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 41, i32 noundef 187) #3 %32 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 42, i32 noundef 213) #3 %33 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 43, i32 noundef 123) #3 %34 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 44, i32 noundef 14) #3 %35 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 45, i32 noundef 162) #3 %36 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 46, i32 noundef 115) #3 %37 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 47, i32 noundef 0) #3 %38 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 48, i32 noundef 16) #3 %39 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 49, i32 noundef 152) #3 %40 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 52, i32 noundef 56) #3 %41 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 53, i32 noundef 0) #3 %42 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 54, i32 noundef 120) #3 %43 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 55, i32 noundef 67) #3 %44 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 56, i32 noundef 2) #3 %45 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 57, i32 noundef 128) #3 %46 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 58, i32 noundef 127) #3 %47 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 59, i32 noundef 9) #3 %48 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 60, i32 noundef 69) #3 %49 = tail call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 61, i32 noundef 193) #3 %50 = call i32 @rt2800_rfcsr_read(ptr noundef %0, i32 noundef 29, ptr noundef nonnull %2) #3 %51 = load i32, ptr @RFCSR29_RSSI_GAIN, align 4, !tbaa !6 %52 = call i32 @rt2x00_set_field8(ptr noundef nonnull %2, i32 noundef %51, i32 noundef 3) #3 %53 = load i32, ptr %2, align 4, !tbaa !6 %54 = call i32 @rt2800_rfcsr_write(ptr noundef %0, i32 noundef 29, i32 noundef %53) #3 %55 = call i32 @rt2800_led_open_drain_enable(ptr noundef %0) #3 %56 = call i32 @rt2800_normal_mode_setup_3xxx(ptr noundef %0) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @rt2800_rf_init_calibration(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @rt2800_rfcsr_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @rt2800_rfcsr_read(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @rt2x00_set_field8(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @rt2800_led_open_drain_enable(ptr noundef) local_unnamed_addr #2 declare i32 @rt2800_normal_mode_setup_3xxx(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
fastsocket_kernel_drivers_net_wireless_rt2x00_extr_rt2800lib.c_rt2800_init_rfcsr_3290
; ModuleID = 'AnghaBench/linux/drivers/net/usb/extr_rtl8150.c_rx_fixup.c' source_filename = "AnghaBench/linux/drivers/net/usb/extr_rtl8150.c_rx_fixup.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.rtl8150 = type { i32, i32, i32, i32, ptr, i32, i32 } @RX_URB_FAIL = dso_local local_unnamed_addr global i32 0, align 4 @RTL8150_MTU = dso_local local_unnamed_addr global i32 0, align 4 @read_bulk_callback = dso_local local_unnamed_addr global i32 0, align 4 @GFP_ATOMIC = dso_local local_unnamed_addr global i32 0, align 4 @ENODEV = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @rx_fixup], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @rx_fixup(i64 noundef %0) #0 { %2 = inttoptr i64 %0 to ptr %3 = getelementptr inbounds %struct.rtl8150, ptr %2, i64 0, i32 6 %4 = tail call i32 @spin_lock_irq(ptr noundef nonnull %3) #2 %5 = tail call i32 @fill_skb_pool(ptr noundef %2) #2 %6 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %3) #2 %7 = load i32, ptr @RX_URB_FAIL, align 4, !tbaa !5 %8 = getelementptr inbounds %struct.rtl8150, ptr %2, i64 0, i32 1 %9 = tail call i64 @test_bit(i32 noundef %7, ptr noundef nonnull %8) #2 %10 = icmp eq i64 %9, 0 br i1 %10, label %15, label %11 11: ; preds = %1 %12 = getelementptr inbounds %struct.rtl8150, ptr %2, i64 0, i32 4 %13 = load ptr, ptr %12, align 8, !tbaa !9 %14 = icmp eq ptr %13, null br i1 %14, label %15, label %32 15: ; preds = %11, %1 %16 = tail call i32 @spin_lock_irq(ptr noundef nonnull %3) #2 %17 = tail call ptr @pull_skb(ptr noundef %2) #2 %18 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %3) #2 %19 = icmp eq ptr %17, null br i1 %19, label %51, label %20 20: ; preds = %15 %21 = getelementptr inbounds %struct.rtl8150, ptr %2, i64 0, i32 4 store ptr %17, ptr %21, align 8, !tbaa !9 %22 = getelementptr inbounds %struct.rtl8150, ptr %2, i64 0, i32 3 %23 = load i32, ptr %22, align 4, !tbaa !12 %24 = getelementptr inbounds %struct.rtl8150, ptr %2, i64 0, i32 5 %25 = load i32, ptr %24, align 8, !tbaa !13 %26 = tail call i32 @usb_rcvbulkpipe(i32 noundef %25, i32 noundef 1) #2 %27 = load ptr, ptr %21, align 8, !tbaa !9 %28 = load i32, ptr %27, align 4, !tbaa !14 %29 = load i32, ptr @RTL8150_MTU, align 4, !tbaa !5 %30 = load i32, ptr @read_bulk_callback, align 4, !tbaa !5 %31 = tail call i32 @usb_fill_bulk_urb(i32 noundef %23, i32 noundef %25, i32 noundef %26, i32 noundef %28, i32 noundef %29, i32 noundef %30, ptr noundef %2) #2 br label %32 32: ; preds = %11, %20 %33 = getelementptr inbounds %struct.rtl8150, ptr %2, i64 0, i32 3 %34 = load i32, ptr %33, align 4, !tbaa !12 %35 = load i32, ptr @GFP_ATOMIC, align 4, !tbaa !5 %36 = tail call i32 @usb_submit_urb(i32 noundef %34, i32 noundef %35) #2 %37 = load i32, ptr @ENODEV, align 4, !tbaa !5 %38 = sub nsw i32 0, %37 %39 = icmp eq i32 %36, %38 br i1 %39, label %40, label %44 40: ; preds = %32 %41 = getelementptr inbounds %struct.rtl8150, ptr %2, i64 0, i32 2 %42 = load i32, ptr %41, align 8, !tbaa !16 %43 = tail call i32 @netif_device_detach(i32 noundef %42) #2 br label %53 44: ; preds = %32 %45 = icmp eq i32 %36, 0 %46 = load i32, ptr @RX_URB_FAIL, align 4, !tbaa !5 br i1 %45, label %49, label %47 47: ; preds = %44 %48 = tail call i32 @set_bit(i32 noundef %46, ptr noundef nonnull %8) #2 br label %51 49: ; preds = %44 %50 = tail call i32 @clear_bit(i32 noundef %46, ptr noundef nonnull %8) #2 br label %53 51: ; preds = %15, %47 %52 = tail call i32 @tasklet_schedule(ptr noundef %2) #2 br label %53 53: ; preds = %40, %49, %51 ret void } declare i32 @spin_lock_irq(ptr noundef) local_unnamed_addr #1 declare i32 @fill_skb_pool(ptr noundef) local_unnamed_addr #1 declare i32 @spin_unlock_irq(ptr noundef) local_unnamed_addr #1 declare i64 @test_bit(i32 noundef, ptr noundef) local_unnamed_addr #1 declare ptr @pull_skb(ptr noundef) local_unnamed_addr #1 declare i32 @usb_fill_bulk_urb(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @usb_rcvbulkpipe(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @usb_submit_urb(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @netif_device_detach(i32 noundef) local_unnamed_addr #1 declare i32 @set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @clear_bit(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @tasklet_schedule(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 16} !10 = !{!"rtl8150", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !11, i64 16, !6, i64 24, !6, i64 28} !11 = !{!"any pointer", !7, i64 0} !12 = !{!10, !6, i64 12} !13 = !{!10, !6, i64 24} !14 = !{!15, !6, i64 0} !15 = !{!"sk_buff", !6, i64 0} !16 = !{!10, !6, i64 8}
; ModuleID = 'AnghaBench/linux/drivers/net/usb/extr_rtl8150.c_rx_fixup.c' source_filename = "AnghaBench/linux/drivers/net/usb/extr_rtl8150.c_rx_fixup.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @RX_URB_FAIL = common local_unnamed_addr global i32 0, align 4 @RTL8150_MTU = common local_unnamed_addr global i32 0, align 4 @read_bulk_callback = common local_unnamed_addr global i32 0, align 4 @GFP_ATOMIC = common local_unnamed_addr global i32 0, align 4 @ENODEV = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @rx_fixup], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @rx_fixup(i64 noundef %0) #0 { %2 = inttoptr i64 %0 to ptr %3 = getelementptr inbounds i8, ptr %2, i64 28 %4 = tail call i32 @spin_lock_irq(ptr noundef nonnull %3) #2 %5 = tail call i32 @fill_skb_pool(ptr noundef %2) #2 %6 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %3) #2 %7 = load i32, ptr @RX_URB_FAIL, align 4, !tbaa !6 %8 = getelementptr inbounds i8, ptr %2, i64 4 %9 = tail call i64 @test_bit(i32 noundef %7, ptr noundef nonnull %8) #2 %10 = icmp eq i64 %9, 0 br i1 %10, label %15, label %11 11: ; preds = %1 %12 = getelementptr inbounds i8, ptr %2, i64 16 %13 = load ptr, ptr %12, align 8, !tbaa !10 %14 = icmp eq ptr %13, null br i1 %14, label %15, label %32 15: ; preds = %11, %1 %16 = tail call i32 @spin_lock_irq(ptr noundef nonnull %3) #2 %17 = tail call ptr @pull_skb(ptr noundef %2) #2 %18 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %3) #2 %19 = icmp eq ptr %17, null br i1 %19, label %51, label %20 20: ; preds = %15 %21 = getelementptr inbounds i8, ptr %2, i64 16 store ptr %17, ptr %21, align 8, !tbaa !10 %22 = getelementptr inbounds i8, ptr %2, i64 12 %23 = load i32, ptr %22, align 4, !tbaa !13 %24 = getelementptr inbounds i8, ptr %2, i64 24 %25 = load i32, ptr %24, align 8, !tbaa !14 %26 = tail call i32 @usb_rcvbulkpipe(i32 noundef %25, i32 noundef 1) #2 %27 = load ptr, ptr %21, align 8, !tbaa !10 %28 = load i32, ptr %27, align 4, !tbaa !15 %29 = load i32, ptr @RTL8150_MTU, align 4, !tbaa !6 %30 = load i32, ptr @read_bulk_callback, align 4, !tbaa !6 %31 = tail call i32 @usb_fill_bulk_urb(i32 noundef %23, i32 noundef %25, i32 noundef %26, i32 noundef %28, i32 noundef %29, i32 noundef %30, ptr noundef %2) #2 br label %32 32: ; preds = %11, %20 %33 = getelementptr inbounds i8, ptr %2, i64 12 %34 = load i32, ptr %33, align 4, !tbaa !13 %35 = load i32, ptr @GFP_ATOMIC, align 4, !tbaa !6 %36 = tail call i32 @usb_submit_urb(i32 noundef %34, i32 noundef %35) #2 %37 = load i32, ptr @ENODEV, align 4, !tbaa !6 %38 = sub nsw i32 0, %37 %39 = icmp eq i32 %36, %38 br i1 %39, label %40, label %44 40: ; preds = %32 %41 = getelementptr inbounds i8, ptr %2, i64 8 %42 = load i32, ptr %41, align 8, !tbaa !17 %43 = tail call i32 @netif_device_detach(i32 noundef %42) #2 br label %53 44: ; preds = %32 %45 = icmp eq i32 %36, 0 %46 = load i32, ptr @RX_URB_FAIL, align 4, !tbaa !6 br i1 %45, label %49, label %47 47: ; preds = %44 %48 = tail call i32 @set_bit(i32 noundef %46, ptr noundef nonnull %8) #2 br label %51 49: ; preds = %44 %50 = tail call i32 @clear_bit(i32 noundef %46, ptr noundef nonnull %8) #2 br label %53 51: ; preds = %15, %47 %52 = tail call i32 @tasklet_schedule(ptr noundef %2) #2 br label %53 53: ; preds = %40, %49, %51 ret void } declare i32 @spin_lock_irq(ptr noundef) local_unnamed_addr #1 declare i32 @fill_skb_pool(ptr noundef) local_unnamed_addr #1 declare i32 @spin_unlock_irq(ptr noundef) local_unnamed_addr #1 declare i64 @test_bit(i32 noundef, ptr noundef) local_unnamed_addr #1 declare ptr @pull_skb(ptr noundef) local_unnamed_addr #1 declare i32 @usb_fill_bulk_urb(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @usb_rcvbulkpipe(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @usb_submit_urb(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @netif_device_detach(i32 noundef) local_unnamed_addr #1 declare i32 @set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @clear_bit(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @tasklet_schedule(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 16} !11 = !{!"rtl8150", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !12, i64 16, !7, i64 24, !7, i64 28} !12 = !{!"any pointer", !8, i64 0} !13 = !{!11, !7, i64 12} !14 = !{!11, !7, i64 24} !15 = !{!16, !7, i64 0} !16 = !{!"sk_buff", !7, i64 0} !17 = !{!11, !7, i64 8}
linux_drivers_net_usb_extr_rtl8150.c_rx_fixup
; ModuleID = 'AnghaBench/linux/drivers/infiniband/ulp/ipoib/extr_ipoib_main.c_ipoib_neigh_alloc.c' source_filename = "AnghaBench/linux/drivers/infiniband/ulp/ipoib/extr_ipoib_main.c_ipoib_neigh_alloc.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.ipoib_dev_priv = type { i32, %struct.ipoib_neigh_table } %struct.ipoib_neigh_table = type { i32, i32 } %struct.ipoib_neigh = type { ptr, i32, ptr, i32, i32 } @INFINIBAND_ALEN = dso_local local_unnamed_addr global i32 0, align 4 @jiffies = dso_local local_unnamed_addr global ptr null, align 8 ; Function Attrs: nounwind uwtable define dso_local ptr @ipoib_neigh_alloc(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = tail call ptr @ipoib_priv(ptr noundef %1) #2 %4 = getelementptr inbounds %struct.ipoib_dev_priv, ptr %3, i64 0, i32 1 %5 = getelementptr inbounds %struct.ipoib_dev_priv, ptr %3, i64 0, i32 1, i32 1 %6 = load i32, ptr %5, align 4, !tbaa !5 %7 = tail call i32 @lockdep_is_held(ptr noundef %3) #2 %8 = tail call ptr @rcu_dereference_protected(i32 noundef %6, i32 noundef %7) #2 %9 = icmp eq ptr %8, null br i1 %9, label %59, label %10 10: ; preds = %2 %11 = tail call i64 @ipoib_addr_hash(ptr noundef nonnull %8, ptr noundef %0) #2 %12 = load ptr, ptr %8, align 8, !tbaa !10 %13 = getelementptr inbounds i32, ptr %12, i64 %11 %14 = load i32, ptr %13, align 4, !tbaa !13 %15 = tail call i32 @lockdep_is_held(ptr noundef nonnull %3) #2 %16 = tail call ptr @rcu_dereference_protected(i32 noundef %14, i32 noundef %15) #2 %17 = icmp eq ptr %16, null br i1 %17, label %38, label %18 18: ; preds = %10, %32 %19 = phi ptr [ %36, %32 ], [ %16, %10 ] %20 = getelementptr inbounds %struct.ipoib_neigh, ptr %19, i64 0, i32 4 %21 = load i32, ptr %20, align 4, !tbaa !14 %22 = load i32, ptr @INFINIBAND_ALEN, align 4, !tbaa !13 %23 = tail call i64 @memcmp(ptr noundef %0, i32 noundef %21, i32 noundef %22) #2 %24 = icmp eq i64 %23, 0 br i1 %24, label %25, label %32 25: ; preds = %18 %26 = getelementptr inbounds %struct.ipoib_neigh, ptr %19, i64 0, i32 3 %27 = tail call i32 @atomic_inc_not_zero(ptr noundef nonnull %26) #2 %28 = icmp eq i32 %27, 0 br i1 %28, label %38, label %29 29: ; preds = %25 %30 = load ptr, ptr @jiffies, align 8, !tbaa !16 %31 = getelementptr inbounds %struct.ipoib_neigh, ptr %19, i64 0, i32 2 store ptr %30, ptr %31, align 8, !tbaa !17 br label %59 32: ; preds = %18 %33 = getelementptr inbounds %struct.ipoib_neigh, ptr %19, i64 0, i32 1 %34 = load i32, ptr %33, align 8, !tbaa !18 %35 = tail call i32 @lockdep_is_held(ptr noundef %3) #2 %36 = tail call ptr @rcu_dereference_protected(i32 noundef %34, i32 noundef %35) #2 %37 = icmp eq ptr %36, null br i1 %37, label %38, label %18, !llvm.loop !19 38: ; preds = %32, %10, %25 %39 = tail call ptr @ipoib_neigh_ctor(ptr noundef %0, ptr noundef %1) #2 %40 = icmp eq ptr %39, null br i1 %40, label %59, label %41 41: ; preds = %38 %42 = getelementptr inbounds %struct.ipoib_neigh, ptr %39, i64 0, i32 3 %43 = tail call i32 @atomic_inc(ptr noundef nonnull %42) #2 %44 = load ptr, ptr @jiffies, align 8, !tbaa !16 %45 = getelementptr inbounds %struct.ipoib_neigh, ptr %39, i64 0, i32 2 store ptr %44, ptr %45, align 8, !tbaa !17 %46 = getelementptr inbounds %struct.ipoib_neigh, ptr %39, i64 0, i32 1 %47 = load i32, ptr %46, align 8, !tbaa !18 %48 = load ptr, ptr %8, align 8, !tbaa !10 %49 = getelementptr inbounds i32, ptr %48, i64 %11 %50 = load i32, ptr %49, align 4, !tbaa !13 %51 = tail call i32 @lockdep_is_held(ptr noundef %3) #2 %52 = tail call ptr @rcu_dereference_protected(i32 noundef %50, i32 noundef %51) #2 %53 = tail call i32 @rcu_assign_pointer(i32 noundef %47, ptr noundef %52) #2 %54 = load ptr, ptr %8, align 8, !tbaa !10 %55 = getelementptr inbounds i32, ptr %54, i64 %11 %56 = load i32, ptr %55, align 4, !tbaa !13 %57 = tail call i32 @rcu_assign_pointer(i32 noundef %56, ptr noundef nonnull %39) #2 %58 = tail call i32 @atomic_inc(ptr noundef nonnull %4) #2 br label %59 59: ; preds = %2, %38, %41, %29 %60 = phi ptr [ %19, %29 ], [ %39, %41 ], [ null, %38 ], [ null, %2 ] ret ptr %60 } declare ptr @ipoib_priv(ptr noundef) local_unnamed_addr #1 declare ptr @rcu_dereference_protected(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @lockdep_is_held(ptr noundef) local_unnamed_addr #1 declare i64 @ipoib_addr_hash(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i64 @memcmp(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @atomic_inc_not_zero(ptr noundef) local_unnamed_addr #1 declare ptr @ipoib_neigh_ctor(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @atomic_inc(ptr noundef) local_unnamed_addr #1 declare i32 @rcu_assign_pointer(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 4} !6 = !{!"ipoib_neigh_table", !7, i64 0, !7, i64 4} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"ipoib_neigh_hash", !12, i64 0, !7, i64 8, !12, i64 16, !7, i64 24, !7, i64 28} !12 = !{!"any pointer", !8, i64 0} !13 = !{!7, !7, i64 0} !14 = !{!15, !7, i64 28} !15 = !{!"ipoib_neigh", !12, i64 0, !7, i64 8, !12, i64 16, !7, i64 24, !7, i64 28} !16 = !{!12, !12, i64 0} !17 = !{!15, !12, i64 16} !18 = !{!15, !7, i64 8} !19 = distinct !{!19, !20} !20 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/linux/drivers/infiniband/ulp/ipoib/extr_ipoib_main.c_ipoib_neigh_alloc.c' source_filename = "AnghaBench/linux/drivers/infiniband/ulp/ipoib/extr_ipoib_main.c_ipoib_neigh_alloc.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @INFINIBAND_ALEN = common local_unnamed_addr global i32 0, align 4 @jiffies = common local_unnamed_addr global ptr null, align 8 ; Function Attrs: nounwind ssp uwtable(sync) define ptr @ipoib_neigh_alloc(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = tail call ptr @ipoib_priv(ptr noundef %1) #2 %4 = getelementptr inbounds i8, ptr %3, i64 4 %5 = getelementptr inbounds i8, ptr %3, i64 8 %6 = load i32, ptr %5, align 4, !tbaa !6 %7 = tail call i32 @lockdep_is_held(ptr noundef %3) #2 %8 = tail call ptr @rcu_dereference_protected(i32 noundef %6, i32 noundef %7) #2 %9 = icmp eq ptr %8, null br i1 %9, label %59, label %10 10: ; preds = %2 %11 = tail call i64 @ipoib_addr_hash(ptr noundef nonnull %8, ptr noundef %0) #2 %12 = load ptr, ptr %8, align 8, !tbaa !11 %13 = getelementptr inbounds i32, ptr %12, i64 %11 %14 = load i32, ptr %13, align 4, !tbaa !14 %15 = tail call i32 @lockdep_is_held(ptr noundef nonnull %3) #2 %16 = tail call ptr @rcu_dereference_protected(i32 noundef %14, i32 noundef %15) #2 %17 = icmp eq ptr %16, null br i1 %17, label %38, label %18 18: ; preds = %10, %32 %19 = phi ptr [ %36, %32 ], [ %16, %10 ] %20 = getelementptr inbounds i8, ptr %19, i64 28 %21 = load i32, ptr %20, align 4, !tbaa !15 %22 = load i32, ptr @INFINIBAND_ALEN, align 4, !tbaa !14 %23 = tail call i64 @memcmp(ptr noundef %0, i32 noundef %21, i32 noundef %22) #2 %24 = icmp eq i64 %23, 0 br i1 %24, label %25, label %32 25: ; preds = %18 %26 = getelementptr inbounds i8, ptr %19, i64 24 %27 = tail call i32 @atomic_inc_not_zero(ptr noundef nonnull %26) #2 %28 = icmp eq i32 %27, 0 br i1 %28, label %38, label %29 29: ; preds = %25 %30 = load ptr, ptr @jiffies, align 8, !tbaa !17 %31 = getelementptr inbounds i8, ptr %19, i64 16 store ptr %30, ptr %31, align 8, !tbaa !18 br label %59 32: ; preds = %18 %33 = getelementptr inbounds i8, ptr %19, i64 8 %34 = load i32, ptr %33, align 8, !tbaa !19 %35 = tail call i32 @lockdep_is_held(ptr noundef %3) #2 %36 = tail call ptr @rcu_dereference_protected(i32 noundef %34, i32 noundef %35) #2 %37 = icmp eq ptr %36, null br i1 %37, label %38, label %18, !llvm.loop !20 38: ; preds = %32, %10, %25 %39 = tail call ptr @ipoib_neigh_ctor(ptr noundef %0, ptr noundef %1) #2 %40 = icmp eq ptr %39, null br i1 %40, label %59, label %41 41: ; preds = %38 %42 = getelementptr inbounds i8, ptr %39, i64 24 %43 = tail call i32 @atomic_inc(ptr noundef nonnull %42) #2 %44 = load ptr, ptr @jiffies, align 8, !tbaa !17 %45 = getelementptr inbounds i8, ptr %39, i64 16 store ptr %44, ptr %45, align 8, !tbaa !18 %46 = getelementptr inbounds i8, ptr %39, i64 8 %47 = load i32, ptr %46, align 8, !tbaa !19 %48 = load ptr, ptr %8, align 8, !tbaa !11 %49 = getelementptr inbounds i32, ptr %48, i64 %11 %50 = load i32, ptr %49, align 4, !tbaa !14 %51 = tail call i32 @lockdep_is_held(ptr noundef %3) #2 %52 = tail call ptr @rcu_dereference_protected(i32 noundef %50, i32 noundef %51) #2 %53 = tail call i32 @rcu_assign_pointer(i32 noundef %47, ptr noundef %52) #2 %54 = load ptr, ptr %8, align 8, !tbaa !11 %55 = getelementptr inbounds i32, ptr %54, i64 %11 %56 = load i32, ptr %55, align 4, !tbaa !14 %57 = tail call i32 @rcu_assign_pointer(i32 noundef %56, ptr noundef nonnull %39) #2 %58 = tail call i32 @atomic_inc(ptr noundef nonnull %4) #2 br label %59 59: ; preds = %2, %38, %41, %29 %60 = phi ptr [ %19, %29 ], [ %39, %41 ], [ null, %38 ], [ null, %2 ] ret ptr %60 } declare ptr @ipoib_priv(ptr noundef) local_unnamed_addr #1 declare ptr @rcu_dereference_protected(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @lockdep_is_held(ptr noundef) local_unnamed_addr #1 declare i64 @ipoib_addr_hash(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i64 @memcmp(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @atomic_inc_not_zero(ptr noundef) local_unnamed_addr #1 declare ptr @ipoib_neigh_ctor(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @atomic_inc(ptr noundef) local_unnamed_addr #1 declare i32 @rcu_assign_pointer(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 4} !7 = !{!"ipoib_neigh_table", !8, i64 0, !8, i64 4} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !13, i64 0} !12 = !{!"ipoib_neigh_hash", !13, i64 0, !8, i64 8, !13, i64 16, !8, i64 24, !8, i64 28} !13 = !{!"any pointer", !9, i64 0} !14 = !{!8, !8, i64 0} !15 = !{!16, !8, i64 28} !16 = !{!"ipoib_neigh", !13, i64 0, !8, i64 8, !13, i64 16, !8, i64 24, !8, i64 28} !17 = !{!13, !13, i64 0} !18 = !{!16, !13, i64 16} !19 = !{!16, !8, i64 8} !20 = distinct !{!20, !21} !21 = !{!"llvm.loop.mustprogress"}
linux_drivers_infiniband_ulp_ipoib_extr_ipoib_main.c_ipoib_neigh_alloc
; ModuleID = 'AnghaBench/freebsd/sys/dev/tws/extr_tws_cam.c_tws_cmd_complete.c' source_filename = "AnghaBench/freebsd/sys/dev/tws/extr_tws_cam.c_tws_cmd_complete.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.tws_request = type { i32, ptr } ; Function Attrs: nounwind uwtable define dso_local void @tws_cmd_complete(ptr noundef %0) local_unnamed_addr #0 { %2 = getelementptr inbounds %struct.tws_request, ptr %0, i64 0, i32 1 %3 = load ptr, ptr %2, align 8, !tbaa !5 %4 = tail call i32 @callout_stop(ptr noundef %0) #2 %5 = tail call i32 @tws_unmap_request(ptr noundef %3, ptr noundef %0) #2 ret void } declare i32 @callout_stop(ptr noundef) local_unnamed_addr #1 declare i32 @tws_unmap_request(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 8} !6 = !{!"tws_request", !7, i64 0, !10, i64 8} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0}
; ModuleID = 'AnghaBench/freebsd/sys/dev/tws/extr_tws_cam.c_tws_cmd_complete.c' source_filename = "AnghaBench/freebsd/sys/dev/tws/extr_tws_cam.c_tws_cmd_complete.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define void @tws_cmd_complete(ptr noundef %0) local_unnamed_addr #0 { %2 = getelementptr inbounds i8, ptr %0, i64 8 %3 = load ptr, ptr %2, align 8, !tbaa !6 %4 = tail call i32 @callout_stop(ptr noundef %0) #2 %5 = tail call i32 @tws_unmap_request(ptr noundef %3, ptr noundef %0) #2 ret void } declare i32 @callout_stop(ptr noundef) local_unnamed_addr #1 declare i32 @tws_unmap_request(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 8} !7 = !{!"tws_request", !8, i64 0, !11, i64 8} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0}
freebsd_sys_dev_tws_extr_tws_cam.c_tws_cmd_complete
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/dvb/frontends/extr_mt352.c_mt352_single_write.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/media/dvb/frontends/extr_mt352.c_mt352_single_write.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.i2c_msg = type { i32, ptr, i32, i32 } %struct.mt352_state = type { i32, %struct.TYPE_2__ } %struct.TYPE_2__ = type { i32 } @.str = private unnamed_addr constant [44 x i8] c"mt352_write() to reg %x failed (err = %d)!\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @mt352_single_write], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @mt352_single_write(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 { %4 = alloca [2 x i32], align 4 %5 = alloca %struct.i2c_msg, align 8 %6 = load ptr, ptr %0, align 8, !tbaa !5 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3 store i32 %1, ptr %4, align 4, !tbaa !10 %7 = getelementptr inbounds i32, ptr %4, i64 1 store i32 %2, ptr %7, align 4, !tbaa !10 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #3 store i32 2, ptr %5, align 8, !tbaa !12 %8 = getelementptr inbounds %struct.i2c_msg, ptr %5, i64 0, i32 1 store ptr %4, ptr %8, align 8, !tbaa !14 %9 = getelementptr inbounds %struct.i2c_msg, ptr %5, i64 0, i32 2 store i32 0, ptr %9, align 8, !tbaa !15 %10 = getelementptr inbounds %struct.i2c_msg, ptr %5, i64 0, i32 3 %11 = getelementptr inbounds %struct.mt352_state, ptr %6, i64 0, i32 1 %12 = load i32, ptr %11, align 4, !tbaa !16 store i32 %12, ptr %10, align 4, !tbaa !19 %13 = load i32, ptr %6, align 4, !tbaa !20 %14 = call i32 @i2c_transfer(i32 noundef %13, ptr noundef nonnull %5, i32 noundef 1) #3 %15 = icmp eq i32 %14, 1 br i1 %15, label %18, label %16 16: ; preds = %3 %17 = call i32 @printk(ptr noundef nonnull @.str, i32 noundef %1, i32 noundef %14) #3 br label %18 18: ; preds = %3, %16 %19 = phi i32 [ %14, %16 ], [ 0, %3 ] call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #3 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3 ret i32 %19 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @i2c_transfer(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @printk(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"dvb_frontend", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0} !12 = !{!13, !11, i64 0} !13 = !{!"i2c_msg", !11, i64 0, !7, i64 8, !11, i64 16, !11, i64 20} !14 = !{!13, !7, i64 8} !15 = !{!13, !11, i64 16} !16 = !{!17, !11, i64 4} !17 = !{!"mt352_state", !11, i64 0, !18, i64 4} !18 = !{!"TYPE_2__", !11, i64 0} !19 = !{!13, !11, i64 20} !20 = !{!17, !11, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/dvb/frontends/extr_mt352.c_mt352_single_write.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/media/dvb/frontends/extr_mt352.c_mt352_single_write.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.i2c_msg = type { i32, ptr, i32, i32 } @.str = private unnamed_addr constant [44 x i8] c"mt352_write() to reg %x failed (err = %d)!\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @mt352_single_write], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 2, 1) i32 @mt352_single_write(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 { %4 = alloca [2 x i32], align 4 %5 = alloca %struct.i2c_msg, align 8 %6 = load ptr, ptr %0, align 8, !tbaa !6 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3 store i32 %1, ptr %4, align 4, !tbaa !11 %7 = getelementptr inbounds i8, ptr %4, i64 4 store i32 %2, ptr %7, align 4, !tbaa !11 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #3 store i32 2, ptr %5, align 8, !tbaa !13 %8 = getelementptr inbounds i8, ptr %5, i64 8 store ptr %4, ptr %8, align 8, !tbaa !15 %9 = getelementptr inbounds i8, ptr %5, i64 16 store i32 0, ptr %9, align 8, !tbaa !16 %10 = getelementptr inbounds i8, ptr %5, i64 20 %11 = getelementptr inbounds i8, ptr %6, i64 4 %12 = load i32, ptr %11, align 4, !tbaa !17 store i32 %12, ptr %10, align 4, !tbaa !20 %13 = load i32, ptr %6, align 4, !tbaa !21 %14 = call i32 @i2c_transfer(i32 noundef %13, ptr noundef nonnull %5, i32 noundef 1) #3 %15 = icmp eq i32 %14, 1 br i1 %15, label %18, label %16 16: ; preds = %3 %17 = call i32 @printk(ptr noundef nonnull @.str, i32 noundef %1, i32 noundef %14) #3 br label %18 18: ; preds = %3, %16 %19 = phi i32 [ %14, %16 ], [ 0, %3 ] call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #3 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3 ret i32 %19 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @i2c_transfer(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @printk(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"dvb_frontend", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !12, i64 0} !12 = !{!"int", !9, i64 0} !13 = !{!14, !12, i64 0} !14 = !{!"i2c_msg", !12, i64 0, !8, i64 8, !12, i64 16, !12, i64 20} !15 = !{!14, !8, i64 8} !16 = !{!14, !12, i64 16} !17 = !{!18, !12, i64 4} !18 = !{!"mt352_state", !12, i64 0, !19, i64 4} !19 = !{!"TYPE_2__", !12, i64 0} !20 = !{!14, !12, i64 20} !21 = !{!18, !12, i64 0}
fastsocket_kernel_drivers_media_dvb_frontends_extr_mt352.c_mt352_single_write
; ModuleID = 'AnghaBench/postgres/src/backend/regex/extr_regcomp.c_nonword.c' source_filename = "AnghaBench/postgres/src/backend/regex/extr_regcomp.c_nonword.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.vars = type { i32, i32, i32 } @AHEAD = dso_local local_unnamed_addr global i32 0, align 4 @BEHIND = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @nonword], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @nonword(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 { %5 = load i32, ptr @AHEAD, align 4, !tbaa !5 %6 = icmp eq i32 %5, %1 %7 = select i1 %6, i32 36, i32 94 %8 = load i32, ptr @BEHIND, align 4 %9 = icmp eq i32 %8, %1 %10 = select i1 %6, i1 true, i1 %9 %11 = zext i1 %10 to i32 %12 = tail call i32 @assert(i32 noundef %11) #2 %13 = getelementptr inbounds %struct.vars, ptr %0, i64 0, i32 2 %14 = load i32, ptr %13, align 4, !tbaa !9 %15 = tail call i32 @newarc(i32 noundef %14, i32 noundef %7, i32 noundef 1, ptr noundef %2, ptr noundef %3) #2 %16 = load i32, ptr %13, align 4, !tbaa !9 %17 = tail call i32 @newarc(i32 noundef %16, i32 noundef %7, i32 noundef 0, ptr noundef %2, ptr noundef %3) #2 %18 = load i32, ptr %13, align 4, !tbaa !9 %19 = getelementptr inbounds %struct.vars, ptr %0, i64 0, i32 1 %20 = load i32, ptr %19, align 4, !tbaa !11 %21 = load i32, ptr %0, align 4, !tbaa !12 %22 = tail call i32 @colorcomplement(i32 noundef %18, i32 noundef %20, i32 noundef %1, i32 noundef %21, ptr noundef %2, ptr noundef %3) #2 ret void } declare i32 @assert(i32 noundef) local_unnamed_addr #1 declare i32 @newarc(i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @colorcomplement(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 8} !10 = !{!"vars", !6, i64 0, !6, i64 4, !6, i64 8} !11 = !{!10, !6, i64 4} !12 = !{!10, !6, i64 0}
; ModuleID = 'AnghaBench/postgres/src/backend/regex/extr_regcomp.c_nonword.c' source_filename = "AnghaBench/postgres/src/backend/regex/extr_regcomp.c_nonword.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @AHEAD = common local_unnamed_addr global i32 0, align 4 @BEHIND = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @nonword], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @nonword(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 { %5 = load i32, ptr @AHEAD, align 4, !tbaa !6 %6 = icmp eq i32 %5, %1 %7 = select i1 %6, i32 36, i32 94 %8 = load i32, ptr @BEHIND, align 4 %9 = icmp eq i32 %8, %1 %10 = select i1 %6, i1 true, i1 %9 %11 = zext i1 %10 to i32 %12 = tail call i32 @assert(i32 noundef %11) #2 %13 = getelementptr inbounds i8, ptr %0, i64 8 %14 = load i32, ptr %13, align 4, !tbaa !10 %15 = tail call i32 @newarc(i32 noundef %14, i32 noundef %7, i32 noundef 1, ptr noundef %2, ptr noundef %3) #2 %16 = load i32, ptr %13, align 4, !tbaa !10 %17 = tail call i32 @newarc(i32 noundef %16, i32 noundef %7, i32 noundef 0, ptr noundef %2, ptr noundef %3) #2 %18 = load i32, ptr %13, align 4, !tbaa !10 %19 = getelementptr inbounds i8, ptr %0, i64 4 %20 = load i32, ptr %19, align 4, !tbaa !12 %21 = load i32, ptr %0, align 4, !tbaa !13 %22 = tail call i32 @colorcomplement(i32 noundef %18, i32 noundef %20, i32 noundef %1, i32 noundef %21, ptr noundef %2, ptr noundef %3) #2 ret void } declare i32 @assert(i32 noundef) local_unnamed_addr #1 declare i32 @newarc(i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @colorcomplement(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 8} !11 = !{!"vars", !7, i64 0, !7, i64 4, !7, i64 8} !12 = !{!11, !7, i64 4} !13 = !{!11, !7, i64 0}
postgres_src_backend_regex_extr_regcomp.c_nonword
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/qlogic/qed/extr_qed_sriov.h_qed_iov_free_hw_info.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/qlogic/qed/extr_qed_sriov.h_qed_iov_free_hw_info.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @qed_iov_free_hw_info], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define internal void @qed_iov_free_hw_info(ptr nocapture readnone %0) #0 { ret void } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/qlogic/qed/extr_qed_sriov.h_qed_iov_free_hw_info.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/qlogic/qed/extr_qed_sriov.h_qed_iov_free_hw_info.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @qed_iov_free_hw_info], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define internal void @qed_iov_free_hw_info(ptr nocapture readnone %0) #0 { ret void } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
linux_drivers_net_ethernet_qlogic_qed_extr_qed_sriov.h_qed_iov_free_hw_info
; ModuleID = 'AnghaBench/systemd/src/import/extr_export-tar.c_tar_export_unref.c' source_filename = "AnghaBench/systemd/src/import/extr_export-tar.c_tar_export_unref.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_6__ = type { i32, i64, i64, i32, i32, i32, i64, i32 } @SIGKILL = dso_local local_unnamed_addr global i32 0, align 4 @BTRFS_REMOVE_QUOTA = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local ptr @tar_export_unref(ptr noundef %0) local_unnamed_addr #0 { %2 = icmp eq ptr %0, null br i1 %2, label %39, label %3 3: ; preds = %1 %4 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 7 %5 = load i32, ptr %4, align 8, !tbaa !5 %6 = tail call i32 @sd_event_source_unref(i32 noundef %5) #2 %7 = load i32, ptr %0, align 8, !tbaa !11 %8 = icmp sgt i32 %7, 1 br i1 %8, label %9, label %14 9: ; preds = %3 %10 = load i32, ptr @SIGKILL, align 4, !tbaa !12 %11 = tail call i32 @kill_and_sigcont(i32 noundef %7, i32 noundef %10) #2 %12 = load i32, ptr %0, align 8, !tbaa !11 %13 = tail call i32 @wait_for_terminate(i32 noundef %12, ptr noundef null) #2 br label %14 14: ; preds = %9, %3 %15 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 6 %16 = load i64, ptr %15, align 8, !tbaa !13 %17 = icmp eq i64 %16, 0 br i1 %17, label %23, label %18 18: ; preds = %14 %19 = load i32, ptr @BTRFS_REMOVE_QUOTA, align 4, !tbaa !12 %20 = tail call i32 @btrfs_subvol_remove(i64 noundef %16, i32 noundef %19) #2 %21 = load i64, ptr %15, align 8, !tbaa !13 %22 = tail call i32 @free(i64 noundef %21) #2 br label %23 23: ; preds = %18, %14 %24 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 5 %25 = tail call i32 @import_compress_free(ptr noundef nonnull %24) #2 %26 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 4 %27 = load i32, ptr %26, align 4, !tbaa !14 %28 = tail call i32 @sd_event_unref(i32 noundef %27) #2 %29 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 3 %30 = load i32, ptr %29, align 8, !tbaa !15 %31 = tail call i32 @safe_close(i32 noundef %30) #2 %32 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 2 %33 = load i64, ptr %32, align 8, !tbaa !16 %34 = tail call i32 @free(i64 noundef %33) #2 %35 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1 %36 = load i64, ptr %35, align 8, !tbaa !17 %37 = tail call i32 @free(i64 noundef %36) #2 %38 = tail call ptr @mfree(ptr noundef nonnull %0) #2 br label %39 39: ; preds = %1, %23 %40 = phi ptr [ %38, %23 ], [ null, %1 ] ret ptr %40 } declare i32 @sd_event_source_unref(i32 noundef) local_unnamed_addr #1 declare i32 @kill_and_sigcont(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @wait_for_terminate(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @btrfs_subvol_remove(i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @free(i64 noundef) local_unnamed_addr #1 declare i32 @import_compress_free(ptr noundef) local_unnamed_addr #1 declare i32 @sd_event_unref(i32 noundef) local_unnamed_addr #1 declare i32 @safe_close(i32 noundef) local_unnamed_addr #1 declare ptr @mfree(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 48} !6 = !{!"TYPE_6__", !7, i64 0, !10, i64 8, !10, i64 16, !7, i64 24, !7, i64 28, !7, i64 32, !10, i64 40, !7, i64 48} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"long", !8, i64 0} !11 = !{!6, !7, i64 0} !12 = !{!7, !7, i64 0} !13 = !{!6, !10, i64 40} !14 = !{!6, !7, i64 28} !15 = !{!6, !7, i64 24} !16 = !{!6, !10, i64 16} !17 = !{!6, !10, i64 8}
; ModuleID = 'AnghaBench/systemd/src/import/extr_export-tar.c_tar_export_unref.c' source_filename = "AnghaBench/systemd/src/import/extr_export-tar.c_tar_export_unref.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @SIGKILL = common local_unnamed_addr global i32 0, align 4 @BTRFS_REMOVE_QUOTA = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define ptr @tar_export_unref(ptr noundef %0) local_unnamed_addr #0 { %2 = icmp eq ptr %0, null br i1 %2, label %39, label %3 3: ; preds = %1 %4 = getelementptr inbounds i8, ptr %0, i64 48 %5 = load i32, ptr %4, align 8, !tbaa !6 %6 = tail call i32 @sd_event_source_unref(i32 noundef %5) #2 %7 = load i32, ptr %0, align 8, !tbaa !12 %8 = icmp sgt i32 %7, 1 br i1 %8, label %9, label %14 9: ; preds = %3 %10 = load i32, ptr @SIGKILL, align 4, !tbaa !13 %11 = tail call i32 @kill_and_sigcont(i32 noundef %7, i32 noundef %10) #2 %12 = load i32, ptr %0, align 8, !tbaa !12 %13 = tail call i32 @wait_for_terminate(i32 noundef %12, ptr noundef null) #2 br label %14 14: ; preds = %9, %3 %15 = getelementptr inbounds i8, ptr %0, i64 40 %16 = load i64, ptr %15, align 8, !tbaa !14 %17 = icmp eq i64 %16, 0 br i1 %17, label %23, label %18 18: ; preds = %14 %19 = load i32, ptr @BTRFS_REMOVE_QUOTA, align 4, !tbaa !13 %20 = tail call i32 @btrfs_subvol_remove(i64 noundef %16, i32 noundef %19) #2 %21 = load i64, ptr %15, align 8, !tbaa !14 %22 = tail call i32 @free(i64 noundef %21) #2 br label %23 23: ; preds = %18, %14 %24 = getelementptr inbounds i8, ptr %0, i64 32 %25 = tail call i32 @import_compress_free(ptr noundef nonnull %24) #2 %26 = getelementptr inbounds i8, ptr %0, i64 28 %27 = load i32, ptr %26, align 4, !tbaa !15 %28 = tail call i32 @sd_event_unref(i32 noundef %27) #2 %29 = getelementptr inbounds i8, ptr %0, i64 24 %30 = load i32, ptr %29, align 8, !tbaa !16 %31 = tail call i32 @safe_close(i32 noundef %30) #2 %32 = getelementptr inbounds i8, ptr %0, i64 16 %33 = load i64, ptr %32, align 8, !tbaa !17 %34 = tail call i32 @free(i64 noundef %33) #2 %35 = getelementptr inbounds i8, ptr %0, i64 8 %36 = load i64, ptr %35, align 8, !tbaa !18 %37 = tail call i32 @free(i64 noundef %36) #2 %38 = tail call ptr @mfree(ptr noundef nonnull %0) #2 br label %39 39: ; preds = %1, %23 %40 = phi ptr [ %38, %23 ], [ null, %1 ] ret ptr %40 } declare i32 @sd_event_source_unref(i32 noundef) local_unnamed_addr #1 declare i32 @kill_and_sigcont(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @wait_for_terminate(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @btrfs_subvol_remove(i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @free(i64 noundef) local_unnamed_addr #1 declare i32 @import_compress_free(ptr noundef) local_unnamed_addr #1 declare i32 @sd_event_unref(i32 noundef) local_unnamed_addr #1 declare i32 @safe_close(i32 noundef) local_unnamed_addr #1 declare ptr @mfree(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 48} !7 = !{!"TYPE_6__", !8, i64 0, !11, i64 8, !11, i64 16, !8, i64 24, !8, i64 28, !8, i64 32, !11, i64 40, !8, i64 48} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"long", !9, i64 0} !12 = !{!7, !8, i64 0} !13 = !{!8, !8, i64 0} !14 = !{!7, !11, i64 40} !15 = !{!7, !8, i64 28} !16 = !{!7, !8, i64 24} !17 = !{!7, !11, i64 16} !18 = !{!7, !11, i64 8}
systemd_src_import_extr_export-tar.c_tar_export_unref
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/um/drivers/extr_pcap_user.c_handler.c' source_filename = "AnghaBench/fastsocket/kernel/arch/um/drivers/extr_pcap_user.c_handler.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.pcap_handler_data = type { i32, i32 } @llvm.compiler.used = appending global [1 x ptr] [ptr @handler], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @handler(ptr nocapture noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2) #0 { %4 = load i32, ptr %0, align 4, !tbaa !5 %5 = load i32, ptr %1, align 4, !tbaa !10 %6 = tail call i32 @llvm.smin.i32(i32 %4, i32 %5) %7 = getelementptr inbounds %struct.pcap_handler_data, ptr %0, i64 0, i32 1 %8 = load i32, ptr %7, align 4, !tbaa !12 %9 = tail call i32 @memcpy(i32 noundef %8, ptr noundef %2, i32 noundef %6) #3 store i32 %6, ptr %0, align 4, !tbaa !5 ret void } declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i32 @llvm.smin.i32(i32, i32) #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"pcap_handler_data", !7, i64 0, !7, i64 4} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"pcap_pkthdr", !7, i64 0} !12 = !{!6, !7, i64 4}
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/um/drivers/extr_pcap_user.c_handler.c' source_filename = "AnghaBench/fastsocket/kernel/arch/um/drivers/extr_pcap_user.c_handler.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @handler], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @handler(ptr nocapture noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2) #0 { %4 = load i32, ptr %0, align 4, !tbaa !6 %5 = load i32, ptr %1, align 4, !tbaa !11 %6 = tail call i32 @llvm.smin.i32(i32 %4, i32 %5) %7 = getelementptr inbounds i8, ptr %0, i64 4 %8 = load i32, ptr %7, align 4, !tbaa !13 %9 = tail call i32 @memcpy(i32 noundef %8, ptr noundef %2, i32 noundef %6) #3 store i32 %6, ptr %0, align 4, !tbaa !6 ret void } declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i32 @llvm.smin.i32(i32, i32) #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"pcap_handler_data", !8, i64 0, !8, i64 4} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !8, i64 0} !12 = !{!"pcap_pkthdr", !8, i64 0} !13 = !{!7, !8, i64 4}
fastsocket_kernel_arch_um_drivers_extr_pcap_user.c_handler
; ModuleID = 'AnghaBench/linux/drivers/i2c/busses/extr_i2c-parport-light.c_parport_getscl.c' source_filename = "AnghaBench/linux/drivers/i2c/busses/extr_i2c-parport-light.c_parport_getscl.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_2__ = type { i32 } @adapter_parm = dso_local local_unnamed_addr global ptr null, align 8 @type = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @parport_getscl], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @parport_getscl(ptr nocapture readnone %0) #0 { %2 = load ptr, ptr @adapter_parm, align 8, !tbaa !5 %3 = load i64, ptr @type, align 8, !tbaa !9 %4 = getelementptr inbounds %struct.TYPE_2__, ptr %2, i64 %3 %5 = tail call i32 @line_get(ptr noundef %4) #2 ret i32 %5 } declare i32 @line_get(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"long", !7, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/i2c/busses/extr_i2c-parport-light.c_parport_getscl.c' source_filename = "AnghaBench/linux/drivers/i2c/busses/extr_i2c-parport-light.c_parport_getscl.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_2__ = type { i32 } @adapter_parm = common local_unnamed_addr global ptr null, align 8 @type = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @parport_getscl], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @parport_getscl(ptr nocapture readnone %0) #0 { %2 = load ptr, ptr @adapter_parm, align 8, !tbaa !6 %3 = load i64, ptr @type, align 8, !tbaa !10 %4 = getelementptr inbounds %struct.TYPE_2__, ptr %2, i64 %3 %5 = tail call i32 @line_get(ptr noundef %4) #2 ret i32 %5 } declare i32 @line_get(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"long", !8, i64 0}
linux_drivers_i2c_busses_extr_i2c-parport-light.c_parport_getscl
; ModuleID = 'AnghaBench/linux/fs/nilfs2/extr_bmap.c_nilfs_bmap_convert_error.c' source_filename = "AnghaBench/linux/fs/nilfs2/extr_bmap.c_nilfs_bmap_convert_error.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.inode = type { i32, i32 } @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [31 x i8] c"broken bmap (inode number=%lu)\00", align 1 @EIO = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @nilfs_bmap_convert_error], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @nilfs_bmap_convert_error(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2) #0 { %4 = load i32, ptr @EINVAL, align 4, !tbaa !5 %5 = sub nsw i32 0, %4 %6 = icmp eq i32 %5, %2 br i1 %6, label %7, label %15 7: ; preds = %3 %8 = load ptr, ptr %0, align 8, !tbaa !9 %9 = getelementptr inbounds %struct.inode, ptr %8, i64 0, i32 1 %10 = load i32, ptr %9, align 4, !tbaa !12 %11 = load i32, ptr %8, align 4, !tbaa !14 %12 = tail call i32 @__nilfs_error(i32 noundef %10, ptr noundef %1, ptr noundef nonnull @.str, i32 noundef %11) #2 %13 = load i32, ptr @EIO, align 4, !tbaa !5 %14 = sub nsw i32 0, %13 br label %15 15: ; preds = %7, %3 %16 = phi i32 [ %14, %7 ], [ %2, %3 ] ret i32 %16 } declare i32 @__nilfs_error(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 0} !10 = !{!"nilfs_bmap", !11, i64 0} !11 = !{!"any pointer", !7, i64 0} !12 = !{!13, !6, i64 4} !13 = !{!"inode", !6, i64 0, !6, i64 4} !14 = !{!13, !6, i64 0}
; ModuleID = 'AnghaBench/linux/fs/nilfs2/extr_bmap.c_nilfs_bmap_convert_error.c' source_filename = "AnghaBench/linux/fs/nilfs2/extr_bmap.c_nilfs_bmap_convert_error.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @EINVAL = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [31 x i8] c"broken bmap (inode number=%lu)\00", align 1 @EIO = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @nilfs_bmap_convert_error], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @nilfs_bmap_convert_error(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2) #0 { %4 = load i32, ptr @EINVAL, align 4, !tbaa !6 %5 = sub nsw i32 0, %4 %6 = icmp eq i32 %5, %2 br i1 %6, label %7, label %15 7: ; preds = %3 %8 = load ptr, ptr %0, align 8, !tbaa !10 %9 = getelementptr inbounds i8, ptr %8, i64 4 %10 = load i32, ptr %9, align 4, !tbaa !13 %11 = load i32, ptr %8, align 4, !tbaa !15 %12 = tail call i32 @__nilfs_error(i32 noundef %10, ptr noundef %1, ptr noundef nonnull @.str, i32 noundef %11) #2 %13 = load i32, ptr @EIO, align 4, !tbaa !6 %14 = sub nsw i32 0, %13 br label %15 15: ; preds = %7, %3 %16 = phi i32 [ %14, %7 ], [ %2, %3 ] ret i32 %16 } declare i32 @__nilfs_error(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"nilfs_bmap", !12, i64 0} !12 = !{!"any pointer", !8, i64 0} !13 = !{!14, !7, i64 4} !14 = !{!"inode", !7, i64 0, !7, i64 4} !15 = !{!14, !7, i64 0}
linux_fs_nilfs2_extr_bmap.c_nilfs_bmap_convert_error
; ModuleID = 'AnghaBench/Quake-III-Arena/code/jpeg-6/extr_jccolor.c_jinit_color_converter.c' source_filename = "AnghaBench/Quake-III-Arena/code/jpeg-6/extr_jccolor.c_jinit_color_converter.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_10__ = type { i32, i32, i32, i32, ptr, ptr } %struct.TYPE_8__ = type { ptr, ptr } @JPOOL_IMAGE = dso_local local_unnamed_addr global i32 0, align 4 @my_color_converter = dso_local local_unnamed_addr global i32 0, align 4 @null_method = dso_local local_unnamed_addr global ptr null, align 8 @JERR_BAD_IN_COLORSPACE = dso_local local_unnamed_addr global i32 0, align 4 @RGB_PIXELSIZE = dso_local local_unnamed_addr global i32 0, align 4 @JERR_BAD_J_COLORSPACE = dso_local local_unnamed_addr global i32 0, align 4 @grayscale_convert = dso_local local_unnamed_addr global ptr null, align 8 @rgb_ycc_start = dso_local local_unnamed_addr global ptr null, align 8 @rgb_gray_convert = dso_local local_unnamed_addr global ptr null, align 8 @JERR_CONVERSION_NOTIMPL = dso_local local_unnamed_addr global i32 0, align 4 @null_convert = dso_local local_unnamed_addr global ptr null, align 8 @rgb_ycc_convert = dso_local local_unnamed_addr global ptr null, align 8 @cmyk_ycck_convert = dso_local local_unnamed_addr global ptr null, align 8 ; Function Attrs: nounwind uwtable define dso_local void @jinit_color_converter(ptr noundef %0) local_unnamed_addr #0 { %2 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 5 %3 = load ptr, ptr %2, align 8, !tbaa !5 %4 = load ptr, ptr %3, align 8, !tbaa !11 %5 = ptrtoint ptr %0 to i64 %6 = trunc i64 %5 to i32 %7 = load i32, ptr @JPOOL_IMAGE, align 4, !tbaa !13 %8 = load i32, ptr @my_color_converter, align 4, !tbaa !13 %9 = tail call i32 @SIZEOF(i32 noundef %8) #2 %10 = tail call i64 %4(i32 noundef %6, i32 noundef %7, i32 noundef %9) #2 %11 = inttoptr i64 %10 to ptr %12 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 4 store ptr %11, ptr %12, align 8, !tbaa !14 %13 = load ptr, ptr @null_method, align 8, !tbaa !15 %14 = getelementptr inbounds %struct.TYPE_8__, ptr %11, i64 0, i32 1 store ptr %13, ptr %14, align 8, !tbaa !16 %15 = load i32, ptr %0, align 8, !tbaa !19 switch i32 %15, label %33 [ i32 131, label %16 i32 130, label %20 i32 128, label %25 i32 132, label %29 i32 129, label %29 ] 16: ; preds = %1 %17 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1 %18 = load i32, ptr %17, align 4, !tbaa !20 %19 = icmp eq i32 %18, 1 br i1 %19, label %40, label %37 20: ; preds = %1 %21 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1 %22 = load i32, ptr %21, align 4, !tbaa !20 %23 = load i32, ptr @RGB_PIXELSIZE, align 4, !tbaa !13 %24 = icmp eq i32 %22, %23 br i1 %24, label %40, label %37 25: ; preds = %1 %26 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1 %27 = load i32, ptr %26, align 4, !tbaa !20 %28 = icmp eq i32 %27, 3 br i1 %28, label %40, label %37 29: ; preds = %1, %1 %30 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1 %31 = load i32, ptr %30, align 4, !tbaa !20 %32 = icmp eq i32 %31, 4 br i1 %32, label %40, label %37 33: ; preds = %1 %34 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1 %35 = load i32, ptr %34, align 4, !tbaa !20 %36 = icmp slt i32 %35, 1 br i1 %36, label %37, label %40 37: ; preds = %33, %29, %25, %20, %16 %38 = load i32, ptr @JERR_BAD_IN_COLORSPACE, align 4, !tbaa !13 %39 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %38) #2 br label %40 40: ; preds = %37, %33, %29, %25, %20, %16 %41 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 2 %42 = load i32, ptr %41, align 8, !tbaa !21 switch i32 %42, label %129 [ i32 131, label %43 i32 130, label %62 i32 128, label %80 i32 132, label %97 i32 129, label %112 ] 43: ; preds = %40 %44 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 3 %45 = load i32, ptr %44, align 4, !tbaa !22 %46 = icmp eq i32 %45, 1 br i1 %46, label %50, label %47 47: ; preds = %43 %48 = load i32, ptr @JERR_BAD_J_COLORSPACE, align 4, !tbaa !13 %49 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %48) #2 br label %50 50: ; preds = %47, %43 %51 = load i32, ptr %0, align 8, !tbaa !19 switch i32 %51, label %59 [ i32 131, label %52 i32 130, label %54 i32 128, label %57 ] 52: ; preds = %50 %53 = load ptr, ptr @grayscale_convert, align 8, !tbaa !15 store ptr %53, ptr %11, align 8, !tbaa !23 br label %143 54: ; preds = %50 %55 = load ptr, ptr @rgb_ycc_start, align 8, !tbaa !15 store ptr %55, ptr %14, align 8, !tbaa !16 %56 = load ptr, ptr @rgb_gray_convert, align 8, !tbaa !15 store ptr %56, ptr %11, align 8, !tbaa !23 br label %143 57: ; preds = %50 %58 = load ptr, ptr @grayscale_convert, align 8, !tbaa !15 store ptr %58, ptr %11, align 8, !tbaa !23 br label %143 59: ; preds = %50 %60 = load i32, ptr @JERR_CONVERSION_NOTIMPL, align 4, !tbaa !13 %61 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %60) #2 br label %143 62: ; preds = %40 %63 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 3 %64 = load i32, ptr %63, align 4, !tbaa !22 %65 = icmp eq i32 %64, 3 br i1 %65, label %69, label %66 66: ; preds = %62 %67 = load i32, ptr @JERR_BAD_J_COLORSPACE, align 4, !tbaa !13 %68 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %67) #2 br label %69 69: ; preds = %66, %62 %70 = load i32, ptr %0, align 8, !tbaa !19 %71 = icmp eq i32 %70, 130 %72 = load i32, ptr @RGB_PIXELSIZE, align 4 %73 = icmp eq i32 %72, 3 %74 = select i1 %71, i1 %73, i1 false br i1 %74, label %75, label %77 75: ; preds = %69 %76 = load ptr, ptr @null_convert, align 8, !tbaa !15 store ptr %76, ptr %11, align 8, !tbaa !23 br label %143 77: ; preds = %69 %78 = load i32, ptr @JERR_CONVERSION_NOTIMPL, align 4, !tbaa !13 %79 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %78) #2 br label %143 80: ; preds = %40 %81 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 3 %82 = load i32, ptr %81, align 4, !tbaa !22 %83 = icmp eq i32 %82, 3 br i1 %83, label %87, label %84 84: ; preds = %80 %85 = load i32, ptr @JERR_BAD_J_COLORSPACE, align 4, !tbaa !13 %86 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %85) #2 br label %87 87: ; preds = %84, %80 %88 = load i32, ptr %0, align 8, !tbaa !19 switch i32 %88, label %94 [ i32 130, label %89 i32 128, label %92 ] 89: ; preds = %87 %90 = load ptr, ptr @rgb_ycc_start, align 8, !tbaa !15 store ptr %90, ptr %14, align 8, !tbaa !16 %91 = load ptr, ptr @rgb_ycc_convert, align 8, !tbaa !15 store ptr %91, ptr %11, align 8, !tbaa !23 br label %143 92: ; preds = %87 %93 = load ptr, ptr @null_convert, align 8, !tbaa !15 store ptr %93, ptr %11, align 8, !tbaa !23 br label %143 94: ; preds = %87 %95 = load i32, ptr @JERR_CONVERSION_NOTIMPL, align 4, !tbaa !13 %96 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %95) #2 br label %143 97: ; preds = %40 %98 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 3 %99 = load i32, ptr %98, align 4, !tbaa !22 %100 = icmp eq i32 %99, 4 br i1 %100, label %104, label %101 101: ; preds = %97 %102 = load i32, ptr @JERR_BAD_J_COLORSPACE, align 4, !tbaa !13 %103 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %102) #2 br label %104 104: ; preds = %101, %97 %105 = load i32, ptr %0, align 8, !tbaa !19 %106 = icmp eq i32 %105, 132 br i1 %106, label %107, label %109 107: ; preds = %104 %108 = load ptr, ptr @null_convert, align 8, !tbaa !15 store ptr %108, ptr %11, align 8, !tbaa !23 br label %143 109: ; preds = %104 %110 = load i32, ptr @JERR_CONVERSION_NOTIMPL, align 4, !tbaa !13 %111 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %110) #2 br label %143 112: ; preds = %40 %113 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 3 %114 = load i32, ptr %113, align 4, !tbaa !22 %115 = icmp eq i32 %114, 4 br i1 %115, label %119, label %116 116: ; preds = %112 %117 = load i32, ptr @JERR_BAD_J_COLORSPACE, align 4, !tbaa !13 %118 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %117) #2 br label %119 119: ; preds = %116, %112 %120 = load i32, ptr %0, align 8, !tbaa !19 switch i32 %120, label %126 [ i32 132, label %121 i32 129, label %124 ] 121: ; preds = %119 %122 = load ptr, ptr @rgb_ycc_start, align 8, !tbaa !15 store ptr %122, ptr %14, align 8, !tbaa !16 %123 = load ptr, ptr @cmyk_ycck_convert, align 8, !tbaa !15 store ptr %123, ptr %11, align 8, !tbaa !23 br label %143 124: ; preds = %119 %125 = load ptr, ptr @null_convert, align 8, !tbaa !15 store ptr %125, ptr %11, align 8, !tbaa !23 br label %143 126: ; preds = %119 %127 = load i32, ptr @JERR_CONVERSION_NOTIMPL, align 4, !tbaa !13 %128 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %127) #2 br label %143 129: ; preds = %40 %130 = load i32, ptr %0, align 8, !tbaa !19 %131 = icmp eq i32 %42, %130 br i1 %131, label %132, label %138 132: ; preds = %129 %133 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 3 %134 = load i32, ptr %133, align 4, !tbaa !22 %135 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1 %136 = load i32, ptr %135, align 4, !tbaa !20 %137 = icmp eq i32 %134, %136 br i1 %137, label %141, label %138 138: ; preds = %132, %129 %139 = load i32, ptr @JERR_CONVERSION_NOTIMPL, align 4, !tbaa !13 %140 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %139) #2 br label %141 141: ; preds = %138, %132 %142 = load ptr, ptr @null_convert, align 8, !tbaa !15 store ptr %142, ptr %11, align 8, !tbaa !23 br label %143 143: ; preds = %121, %126, %124, %107, %109, %89, %94, %92, %75, %77, %52, %57, %59, %54, %141 ret void } declare i32 @SIZEOF(i32 noundef) local_unnamed_addr #1 declare i32 @ERREXIT(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 24} !6 = !{!"TYPE_10__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !10, i64 16, !10, i64 24} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!12, !10, i64 0} !12 = !{!"TYPE_7__", !10, i64 0} !13 = !{!7, !7, i64 0} !14 = !{!6, !10, i64 16} !15 = !{!10, !10, i64 0} !16 = !{!17, !10, i64 8} !17 = !{!"TYPE_9__", !18, i64 0} !18 = !{!"TYPE_8__", !10, i64 0, !10, i64 8} !19 = !{!6, !7, i64 0} !20 = !{!6, !7, i64 4} !21 = !{!6, !7, i64 8} !22 = !{!6, !7, i64 12} !23 = !{!17, !10, i64 0}
; ModuleID = 'AnghaBench/Quake-III-Arena/code/jpeg-6/extr_jccolor.c_jinit_color_converter.c' source_filename = "AnghaBench/Quake-III-Arena/code/jpeg-6/extr_jccolor.c_jinit_color_converter.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @JPOOL_IMAGE = common local_unnamed_addr global i32 0, align 4 @my_color_converter = common local_unnamed_addr global i32 0, align 4 @null_method = common local_unnamed_addr global ptr null, align 8 @JERR_BAD_IN_COLORSPACE = common local_unnamed_addr global i32 0, align 4 @RGB_PIXELSIZE = common local_unnamed_addr global i32 0, align 4 @JERR_BAD_J_COLORSPACE = common local_unnamed_addr global i32 0, align 4 @grayscale_convert = common local_unnamed_addr global ptr null, align 8 @rgb_ycc_start = common local_unnamed_addr global ptr null, align 8 @rgb_gray_convert = common local_unnamed_addr global ptr null, align 8 @JERR_CONVERSION_NOTIMPL = common local_unnamed_addr global i32 0, align 4 @null_convert = common local_unnamed_addr global ptr null, align 8 @rgb_ycc_convert = common local_unnamed_addr global ptr null, align 8 @cmyk_ycck_convert = common local_unnamed_addr global ptr null, align 8 ; Function Attrs: nounwind ssp uwtable(sync) define void @jinit_color_converter(ptr noundef %0) local_unnamed_addr #0 { %2 = getelementptr inbounds i8, ptr %0, i64 24 %3 = load ptr, ptr %2, align 8, !tbaa !6 %4 = load ptr, ptr %3, align 8, !tbaa !12 %5 = ptrtoint ptr %0 to i64 %6 = trunc i64 %5 to i32 %7 = load i32, ptr @JPOOL_IMAGE, align 4, !tbaa !14 %8 = load i32, ptr @my_color_converter, align 4, !tbaa !14 %9 = tail call i32 @SIZEOF(i32 noundef %8) #2 %10 = tail call i64 %4(i32 noundef %6, i32 noundef %7, i32 noundef %9) #2 %11 = inttoptr i64 %10 to ptr %12 = getelementptr inbounds i8, ptr %0, i64 16 store ptr %11, ptr %12, align 8, !tbaa !15 %13 = load ptr, ptr @null_method, align 8, !tbaa !16 %14 = getelementptr inbounds i8, ptr %11, i64 8 store ptr %13, ptr %14, align 8, !tbaa !17 %15 = load i32, ptr %0, align 8, !tbaa !20 switch i32 %15, label %33 [ i32 131, label %16 i32 130, label %20 i32 128, label %25 i32 132, label %29 i32 129, label %29 ] 16: ; preds = %1 %17 = getelementptr inbounds i8, ptr %0, i64 4 %18 = load i32, ptr %17, align 4, !tbaa !21 %19 = icmp eq i32 %18, 1 br i1 %19, label %40, label %37 20: ; preds = %1 %21 = getelementptr inbounds i8, ptr %0, i64 4 %22 = load i32, ptr %21, align 4, !tbaa !21 %23 = load i32, ptr @RGB_PIXELSIZE, align 4, !tbaa !14 %24 = icmp eq i32 %22, %23 br i1 %24, label %40, label %37 25: ; preds = %1 %26 = getelementptr inbounds i8, ptr %0, i64 4 %27 = load i32, ptr %26, align 4, !tbaa !21 %28 = icmp eq i32 %27, 3 br i1 %28, label %40, label %37 29: ; preds = %1, %1 %30 = getelementptr inbounds i8, ptr %0, i64 4 %31 = load i32, ptr %30, align 4, !tbaa !21 %32 = icmp eq i32 %31, 4 br i1 %32, label %40, label %37 33: ; preds = %1 %34 = getelementptr inbounds i8, ptr %0, i64 4 %35 = load i32, ptr %34, align 4, !tbaa !21 %36 = icmp slt i32 %35, 1 br i1 %36, label %37, label %40 37: ; preds = %33, %29, %25, %20, %16 %38 = load i32, ptr @JERR_BAD_IN_COLORSPACE, align 4, !tbaa !14 %39 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %38) #2 br label %40 40: ; preds = %37, %33, %29, %25, %20, %16 %41 = getelementptr inbounds i8, ptr %0, i64 8 %42 = load i32, ptr %41, align 8, !tbaa !22 switch i32 %42, label %129 [ i32 131, label %43 i32 130, label %62 i32 128, label %80 i32 132, label %97 i32 129, label %112 ] 43: ; preds = %40 %44 = getelementptr inbounds i8, ptr %0, i64 12 %45 = load i32, ptr %44, align 4, !tbaa !23 %46 = icmp eq i32 %45, 1 br i1 %46, label %50, label %47 47: ; preds = %43 %48 = load i32, ptr @JERR_BAD_J_COLORSPACE, align 4, !tbaa !14 %49 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %48) #2 br label %50 50: ; preds = %47, %43 %51 = load i32, ptr %0, align 8, !tbaa !20 switch i32 %51, label %59 [ i32 131, label %52 i32 130, label %54 i32 128, label %57 ] 52: ; preds = %50 %53 = load ptr, ptr @grayscale_convert, align 8, !tbaa !16 store ptr %53, ptr %11, align 8, !tbaa !24 br label %143 54: ; preds = %50 %55 = load ptr, ptr @rgb_ycc_start, align 8, !tbaa !16 store ptr %55, ptr %14, align 8, !tbaa !17 %56 = load ptr, ptr @rgb_gray_convert, align 8, !tbaa !16 store ptr %56, ptr %11, align 8, !tbaa !24 br label %143 57: ; preds = %50 %58 = load ptr, ptr @grayscale_convert, align 8, !tbaa !16 store ptr %58, ptr %11, align 8, !tbaa !24 br label %143 59: ; preds = %50 %60 = load i32, ptr @JERR_CONVERSION_NOTIMPL, align 4, !tbaa !14 %61 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %60) #2 br label %143 62: ; preds = %40 %63 = getelementptr inbounds i8, ptr %0, i64 12 %64 = load i32, ptr %63, align 4, !tbaa !23 %65 = icmp eq i32 %64, 3 br i1 %65, label %69, label %66 66: ; preds = %62 %67 = load i32, ptr @JERR_BAD_J_COLORSPACE, align 4, !tbaa !14 %68 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %67) #2 br label %69 69: ; preds = %66, %62 %70 = load i32, ptr %0, align 8, !tbaa !20 %71 = icmp eq i32 %70, 130 %72 = load i32, ptr @RGB_PIXELSIZE, align 4 %73 = icmp eq i32 %72, 3 %74 = select i1 %71, i1 %73, i1 false br i1 %74, label %75, label %77 75: ; preds = %69 %76 = load ptr, ptr @null_convert, align 8, !tbaa !16 store ptr %76, ptr %11, align 8, !tbaa !24 br label %143 77: ; preds = %69 %78 = load i32, ptr @JERR_CONVERSION_NOTIMPL, align 4, !tbaa !14 %79 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %78) #2 br label %143 80: ; preds = %40 %81 = getelementptr inbounds i8, ptr %0, i64 12 %82 = load i32, ptr %81, align 4, !tbaa !23 %83 = icmp eq i32 %82, 3 br i1 %83, label %87, label %84 84: ; preds = %80 %85 = load i32, ptr @JERR_BAD_J_COLORSPACE, align 4, !tbaa !14 %86 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %85) #2 br label %87 87: ; preds = %84, %80 %88 = load i32, ptr %0, align 8, !tbaa !20 switch i32 %88, label %94 [ i32 130, label %89 i32 128, label %92 ] 89: ; preds = %87 %90 = load ptr, ptr @rgb_ycc_start, align 8, !tbaa !16 store ptr %90, ptr %14, align 8, !tbaa !17 %91 = load ptr, ptr @rgb_ycc_convert, align 8, !tbaa !16 store ptr %91, ptr %11, align 8, !tbaa !24 br label %143 92: ; preds = %87 %93 = load ptr, ptr @null_convert, align 8, !tbaa !16 store ptr %93, ptr %11, align 8, !tbaa !24 br label %143 94: ; preds = %87 %95 = load i32, ptr @JERR_CONVERSION_NOTIMPL, align 4, !tbaa !14 %96 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %95) #2 br label %143 97: ; preds = %40 %98 = getelementptr inbounds i8, ptr %0, i64 12 %99 = load i32, ptr %98, align 4, !tbaa !23 %100 = icmp eq i32 %99, 4 br i1 %100, label %104, label %101 101: ; preds = %97 %102 = load i32, ptr @JERR_BAD_J_COLORSPACE, align 4, !tbaa !14 %103 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %102) #2 br label %104 104: ; preds = %101, %97 %105 = load i32, ptr %0, align 8, !tbaa !20 %106 = icmp eq i32 %105, 132 br i1 %106, label %107, label %109 107: ; preds = %104 %108 = load ptr, ptr @null_convert, align 8, !tbaa !16 store ptr %108, ptr %11, align 8, !tbaa !24 br label %143 109: ; preds = %104 %110 = load i32, ptr @JERR_CONVERSION_NOTIMPL, align 4, !tbaa !14 %111 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %110) #2 br label %143 112: ; preds = %40 %113 = getelementptr inbounds i8, ptr %0, i64 12 %114 = load i32, ptr %113, align 4, !tbaa !23 %115 = icmp eq i32 %114, 4 br i1 %115, label %119, label %116 116: ; preds = %112 %117 = load i32, ptr @JERR_BAD_J_COLORSPACE, align 4, !tbaa !14 %118 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %117) #2 br label %119 119: ; preds = %116, %112 %120 = load i32, ptr %0, align 8, !tbaa !20 switch i32 %120, label %126 [ i32 132, label %121 i32 129, label %124 ] 121: ; preds = %119 %122 = load ptr, ptr @rgb_ycc_start, align 8, !tbaa !16 store ptr %122, ptr %14, align 8, !tbaa !17 %123 = load ptr, ptr @cmyk_ycck_convert, align 8, !tbaa !16 store ptr %123, ptr %11, align 8, !tbaa !24 br label %143 124: ; preds = %119 %125 = load ptr, ptr @null_convert, align 8, !tbaa !16 store ptr %125, ptr %11, align 8, !tbaa !24 br label %143 126: ; preds = %119 %127 = load i32, ptr @JERR_CONVERSION_NOTIMPL, align 4, !tbaa !14 %128 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %127) #2 br label %143 129: ; preds = %40 %130 = load i32, ptr %0, align 8, !tbaa !20 %131 = icmp eq i32 %42, %130 br i1 %131, label %132, label %138 132: ; preds = %129 %133 = getelementptr inbounds i8, ptr %0, i64 12 %134 = load i32, ptr %133, align 4, !tbaa !23 %135 = getelementptr inbounds i8, ptr %0, i64 4 %136 = load i32, ptr %135, align 4, !tbaa !21 %137 = icmp eq i32 %134, %136 br i1 %137, label %141, label %138 138: ; preds = %132, %129 %139 = load i32, ptr @JERR_CONVERSION_NOTIMPL, align 4, !tbaa !14 %140 = tail call i32 @ERREXIT(ptr noundef nonnull %0, i32 noundef %139) #2 br label %141 141: ; preds = %138, %132 %142 = load ptr, ptr @null_convert, align 8, !tbaa !16 store ptr %142, ptr %11, align 8, !tbaa !24 br label %143 143: ; preds = %121, %126, %124, %107, %109, %89, %94, %92, %75, %77, %52, %57, %59, %54, %141 ret void } declare i32 @SIZEOF(i32 noundef) local_unnamed_addr #1 declare i32 @ERREXIT(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 24} !7 = !{!"TYPE_10__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !11, i64 16, !11, i64 24} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!13, !11, i64 0} !13 = !{!"TYPE_7__", !11, i64 0} !14 = !{!8, !8, i64 0} !15 = !{!7, !11, i64 16} !16 = !{!11, !11, i64 0} !17 = !{!18, !11, i64 8} !18 = !{!"TYPE_9__", !19, i64 0} !19 = !{!"TYPE_8__", !11, i64 0, !11, i64 8} !20 = !{!7, !8, i64 0} !21 = !{!7, !8, i64 4} !22 = !{!7, !8, i64 8} !23 = !{!7, !8, i64 12} !24 = !{!18, !11, i64 0}
Quake-III-Arena_code_jpeg-6_extr_jccolor.c_jinit_color_converter
; ModuleID = 'AnghaBench/linux/net/ipv6/extr_seg6_local.c_seg6_local_lwtunnel.c' source_filename = "AnghaBench/linux/net/ipv6/extr_seg6_local.c_seg6_local_lwtunnel.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @seg6_local_lwtunnel], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable define internal ptr @seg6_local_lwtunnel(ptr nocapture noundef readonly %0) #0 { %2 = load i64, ptr %0, align 8, !tbaa !5 %3 = inttoptr i64 %2 to ptr ret ptr %3 } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"lwtunnel_state", !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/net/ipv6/extr_seg6_local.c_seg6_local_lwtunnel.c' source_filename = "AnghaBench/linux/net/ipv6/extr_seg6_local.c_seg6_local_lwtunnel.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @seg6_local_lwtunnel], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) define internal ptr @seg6_local_lwtunnel(ptr nocapture noundef readonly %0) #0 { %2 = load i64, ptr %0, align 8, !tbaa !6 %3 = inttoptr i64 %2 to ptr ret ptr %3 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"lwtunnel_state", !8, i64 0} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
linux_net_ipv6_extr_seg6_local.c_seg6_local_lwtunnel
; ModuleID = 'AnghaBench/linux/arch/arm64/kvm/extr_reset.c_kvm_arm_vcpu_is_finalized.c' source_filename = "AnghaBench/linux/arch/arm64/kvm/extr_reset.c_kvm_arm_vcpu_is_finalized.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local noundef i32 @kvm_arm_vcpu_is_finalized(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call i64 @vcpu_has_sve(ptr noundef %0) #2 %3 = icmp eq i64 %2, 0 br i1 %3, label %7, label %4 4: ; preds = %1 %5 = tail call i32 @kvm_arm_vcpu_sve_finalized(ptr noundef %0) #2 %6 = icmp eq i32 %5, 0 br i1 %6, label %8, label %7 7: ; preds = %4, %1 br label %8 8: ; preds = %4, %7 %9 = phi i32 [ 1, %7 ], [ 0, %4 ] ret i32 %9 } declare i64 @vcpu_has_sve(ptr noundef) local_unnamed_addr #1 declare i32 @kvm_arm_vcpu_sve_finalized(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/linux/arch/arm64/kvm/extr_reset.c_kvm_arm_vcpu_is_finalized.c' source_filename = "AnghaBench/linux/arch/arm64/kvm/extr_reset.c_kvm_arm_vcpu_is_finalized.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define range(i32 0, 2) i32 @kvm_arm_vcpu_is_finalized(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call i64 @vcpu_has_sve(ptr noundef %0) #2 %3 = icmp eq i64 %2, 0 br i1 %3, label %7, label %4 4: ; preds = %1 %5 = tail call i32 @kvm_arm_vcpu_sve_finalized(ptr noundef %0) #2 %6 = icmp eq i32 %5, 0 br i1 %6, label %8, label %7 7: ; preds = %4, %1 br label %8 8: ; preds = %4, %7 %9 = phi i32 [ 1, %7 ], [ 0, %4 ] ret i32 %9 } declare i64 @vcpu_has_sve(ptr noundef) local_unnamed_addr #1 declare i32 @kvm_arm_vcpu_sve_finalized(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
linux_arch_arm64_kvm_extr_reset.c_kvm_arm_vcpu_is_finalized
; ModuleID = 'AnghaBench/esp-idf/components/bt/host/bluedroid/stack/btm/extr_btm_acl.c_BTM_GetLinkSuperTout.c' source_filename = "AnghaBench/esp-idf/components/bt/host/bluedroid/stack/btm/extr_btm_acl.c_BTM_GetLinkSuperTout.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @BT_TRANSPORT_BR_EDR = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [22 x i8] c"BTM_GetLinkSuperTout\0A\00", align 1 @BTM_SUCCESS = dso_local local_unnamed_addr global i32 0, align 4 @BTM_UNKNOWN_ADDR = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local i32 @BTM_GetLinkSuperTout(i32 noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 { %3 = load i32, ptr @BT_TRANSPORT_BR_EDR, align 4, !tbaa !5 %4 = tail call ptr @btm_bda_to_acl(i32 noundef %0, i32 noundef %3) #2 %5 = tail call i32 @BTM_TRACE_DEBUG(ptr noundef nonnull @.str) #2 %6 = icmp eq ptr %4, null br i1 %6, label %9, label %7 7: ; preds = %2 %8 = load i32, ptr %4, align 4, !tbaa !9 store i32 %8, ptr %1, align 4, !tbaa !5 br label %9 9: ; preds = %2, %7 %10 = phi ptr [ @BTM_SUCCESS, %7 ], [ @BTM_UNKNOWN_ADDR, %2 ] %11 = load i32, ptr %10, align 4, !tbaa !5 ret i32 %11 } declare ptr @btm_bda_to_acl(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @BTM_TRACE_DEBUG(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"TYPE_3__", !6, i64 0}
; ModuleID = 'AnghaBench/esp-idf/components/bt/host/bluedroid/stack/btm/extr_btm_acl.c_BTM_GetLinkSuperTout.c' source_filename = "AnghaBench/esp-idf/components/bt/host/bluedroid/stack/btm/extr_btm_acl.c_BTM_GetLinkSuperTout.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @BT_TRANSPORT_BR_EDR = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [22 x i8] c"BTM_GetLinkSuperTout\0A\00", align 1 @BTM_SUCCESS = common local_unnamed_addr global i32 0, align 4 @BTM_UNKNOWN_ADDR = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @BTM_GetLinkSuperTout(i32 noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 { %3 = load i32, ptr @BT_TRANSPORT_BR_EDR, align 4, !tbaa !6 %4 = tail call ptr @btm_bda_to_acl(i32 noundef %0, i32 noundef %3) #2 %5 = tail call i32 @BTM_TRACE_DEBUG(ptr noundef nonnull @.str) #2 %6 = icmp eq ptr %4, null br i1 %6, label %9, label %7 7: ; preds = %2 %8 = load i32, ptr %4, align 4, !tbaa !10 store i32 %8, ptr %1, align 4, !tbaa !6 br label %9 9: ; preds = %2, %7 %10 = phi ptr [ @BTM_SUCCESS, %7 ], [ @BTM_UNKNOWN_ADDR, %2 ] %11 = load i32, ptr %10, align 4, !tbaa !6 ret i32 %11 } declare ptr @btm_bda_to_acl(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @BTM_TRACE_DEBUG(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"TYPE_3__", !7, i64 0}
esp-idf_components_bt_host_bluedroid_stack_btm_extr_btm_acl.c_BTM_GetLinkSuperTout
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/hamradio/extr_6pack.c_sixpack_open.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/hamradio/extr_6pack.c_sixpack_open.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.tty_struct = type { i32, ptr, ptr } %struct.sixpack = type { ptr, ptr, i64, i32, i32, i32, i32, %struct.TYPE_4__, %struct.TYPE_4__, i64, i64, i32, i32, i32, i64, i64, i64, i64, i64, i64, i64, ptr, i32, i32, ptr } %struct.TYPE_4__ = type { i64, i32 } @CAP_NET_ADMIN = dso_local local_unnamed_addr global i32 0, align 4 @EPERM = dso_local local_unnamed_addr global i32 0, align 4 @EOPNOTSUPP = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [5 x i8] c"sp%d\00", align 1 @sp_setup = dso_local local_unnamed_addr global i32 0, align 4 @ENOMEM = dso_local local_unnamed_addr global i32 0, align 4 @GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4 @ENOBUFS = dso_local local_unnamed_addr global i32 0, align 4 @AX25_MTU = dso_local local_unnamed_addr global i64 0, align 8 @SIXP_TXDELAY = dso_local local_unnamed_addr global i32 0, align 4 @SIXP_PERSIST = dso_local local_unnamed_addr global i32 0, align 4 @SIXP_SLOTTIME = dso_local local_unnamed_addr global i32 0, align 4 @sp_xmit_on_air = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @sixpack_open], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @sixpack_open(ptr noundef %0) #0 { %2 = load i32, ptr @CAP_NET_ADMIN, align 4, !tbaa !5 %3 = tail call i32 @capable(i32 noundef %2) #3 %4 = icmp eq i32 %3, 0 br i1 %4, label %5, label %8 5: ; preds = %1 %6 = load i32, ptr @EPERM, align 4, !tbaa !5 %7 = sub nsw i32 0, %6 br label %84 8: ; preds = %1 %9 = getelementptr inbounds %struct.tty_struct, ptr %0, i64 0, i32 2 %10 = load ptr, ptr %9, align 8, !tbaa !9 %11 = load ptr, ptr %10, align 8, !tbaa !12 %12 = icmp eq ptr %11, null br i1 %12, label %13, label %16 13: ; preds = %8 %14 = load i32, ptr @EOPNOTSUPP, align 4, !tbaa !5 %15 = sub nsw i32 0, %14 br label %84 16: ; preds = %8 %17 = load i32, ptr @sp_setup, align 4, !tbaa !5 %18 = tail call ptr @alloc_netdev(i32 noundef 184, ptr noundef nonnull @.str, i32 noundef %17) #3 %19 = icmp eq ptr %18, null br i1 %19, label %20, label %23 20: ; preds = %16 %21 = load i32, ptr @ENOMEM, align 4, !tbaa !5 %22 = sub nsw i32 0, %21 br label %84 23: ; preds = %16 %24 = tail call ptr @netdev_priv(ptr noundef nonnull %18) #3 %25 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 24 store ptr %18, ptr %25, align 8, !tbaa !14 %26 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 6 %27 = tail call i32 @spin_lock_init(ptr noundef nonnull %26) #3 %28 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 23 %29 = tail call i32 @atomic_set(ptr noundef nonnull %28, i32 noundef 1) #3 %30 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 22 %31 = tail call i32 @init_MUTEX_LOCKED(ptr noundef nonnull %30) #3 %32 = load i32, ptr %18, align 4, !tbaa !18 %33 = shl nsw i32 %32, 1 %34 = sext i32 %33 to i64 %35 = add nsw i64 %34, 4 %36 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5 %37 = tail call ptr @kmalloc(i64 noundef %35, i32 noundef %36) #3 %38 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5 %39 = tail call ptr @kmalloc(i64 noundef %35, i32 noundef %38) #3 %40 = icmp eq ptr %37, null %41 = icmp eq ptr %39, null %42 = select i1 %40, i1 true, i1 %41 br i1 %42, label %43, label %46 43: ; preds = %23 %44 = load i32, ptr @ENOBUFS, align 4, !tbaa !5 %45 = sub nsw i32 0, %44 br label %79 46: ; preds = %23 %47 = tail call i32 @spin_lock_bh(ptr noundef nonnull %26) #3 %48 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 21 store ptr %0, ptr %48, align 8, !tbaa !20 store ptr %37, ptr %24, align 8, !tbaa !21 %49 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 1 store ptr %39, ptr %49, align 8, !tbaa !22 %50 = load i64, ptr @AX25_MTU, align 8, !tbaa !23 %51 = add nsw i64 %50, 73 %52 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 20 store i64 %51, ptr %52, align 8, !tbaa !24 %53 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 2 store i64 %34, ptr %53, align 8, !tbaa !25 %54 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 14 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(48) %54, i8 0, i64 48, i1 false) %55 = load i32, ptr @SIXP_TXDELAY, align 4, !tbaa !5 %56 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 13 store i32 %55, ptr %56, align 8, !tbaa !26 %57 = load i32, ptr @SIXP_PERSIST, align 4, !tbaa !5 %58 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 12 store i32 %57, ptr %58, align 4, !tbaa !27 %59 = load i32, ptr @SIXP_SLOTTIME, align 4, !tbaa !5 %60 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 11 store i32 %59, ptr %60, align 8, !tbaa !28 %61 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 3 store i32 96, ptr %61, align 8, !tbaa !29 %62 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 4 store i32 1, ptr %62, align 4, !tbaa !30 %63 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 5 store i32 1, ptr %63, align 8, !tbaa !31 %64 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 9 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %64, i8 0, i64 16, i1 false) %65 = tail call i32 @netif_start_queue(ptr noundef nonnull %18) #3 %66 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 8 %67 = tail call i32 @init_timer(ptr noundef nonnull %66) #3 %68 = load i32, ptr @sp_xmit_on_air, align 4, !tbaa !5 %69 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 8, i32 1 store i32 %68, ptr %69, align 8, !tbaa !32 %70 = ptrtoint ptr %24 to i64 store i64 %70, ptr %66, align 8, !tbaa !33 %71 = getelementptr inbounds %struct.sixpack, ptr %24, i64 0, i32 7 %72 = tail call i32 @init_timer(ptr noundef nonnull %71) #3 %73 = tail call i32 @spin_unlock_bh(ptr noundef nonnull %26) #3 %74 = getelementptr inbounds %struct.tty_struct, ptr %0, i64 0, i32 1 store ptr %24, ptr %74, align 8, !tbaa !34 store i32 65536, ptr %0, align 8, !tbaa !35 %75 = tail call i64 @register_netdev(ptr noundef nonnull %18) #3 %76 = icmp eq i64 %75, 0 br i1 %76, label %77, label %79 77: ; preds = %46 %78 = tail call i32 @tnc_init(ptr noundef nonnull %24) #3 br label %84 79: ; preds = %46, %43 %80 = phi i32 [ %45, %43 ], [ 0, %46 ] %81 = tail call i32 @kfree(ptr noundef %39) #3 %82 = tail call i32 @kfree(ptr noundef %37) #3 %83 = tail call i32 @free_netdev(ptr noundef nonnull %18) #3 br label %84 84: ; preds = %20, %79, %77, %13, %5 %85 = phi i32 [ %15, %13 ], [ 0, %77 ], [ %7, %5 ], [ %80, %79 ], [ %22, %20 ] ret i32 %85 } declare i32 @capable(i32 noundef) local_unnamed_addr #1 declare ptr @alloc_netdev(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1 declare i32 @spin_lock_init(ptr noundef) local_unnamed_addr #1 declare i32 @atomic_set(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @init_MUTEX_LOCKED(ptr noundef) local_unnamed_addr #1 declare ptr @kmalloc(i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @spin_lock_bh(ptr noundef) local_unnamed_addr #1 declare i32 @netif_start_queue(ptr noundef) local_unnamed_addr #1 declare i32 @init_timer(ptr noundef) local_unnamed_addr #1 declare i32 @spin_unlock_bh(ptr noundef) local_unnamed_addr #1 declare i64 @register_netdev(ptr noundef) local_unnamed_addr #1 declare i32 @tnc_init(ptr noundef) local_unnamed_addr #1 declare i32 @kfree(ptr noundef) local_unnamed_addr #1 declare i32 @free_netdev(ptr noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 16} !10 = !{!"tty_struct", !6, i64 0, !11, i64 8, !11, i64 16} !11 = !{!"any pointer", !7, i64 0} !12 = !{!13, !11, i64 0} !13 = !{!"TYPE_3__", !11, i64 0} !14 = !{!15, !11, i64 176} !15 = !{!"sixpack", !11, i64 0, !11, i64 8, !16, i64 16, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !17, i64 40, !17, i64 56, !16, i64 72, !16, i64 80, !6, i64 88, !6, i64 92, !6, i64 96, !16, i64 104, !16, i64 112, !16, i64 120, !16, i64 128, !16, i64 136, !16, i64 144, !16, i64 152, !11, i64 160, !6, i64 168, !6, i64 172, !11, i64 176} !16 = !{!"long", !7, i64 0} !17 = !{!"TYPE_4__", !16, i64 0, !6, i64 8} !18 = !{!19, !6, i64 0} !19 = !{!"net_device", !6, i64 0} !20 = !{!15, !11, i64 160} !21 = !{!15, !11, i64 0} !22 = !{!15, !11, i64 8} !23 = !{!16, !16, i64 0} !24 = !{!15, !16, i64 152} !25 = !{!15, !16, i64 16} !26 = !{!15, !6, i64 96} !27 = !{!15, !6, i64 92} !28 = !{!15, !6, i64 88} !29 = !{!15, !6, i64 24} !30 = !{!15, !6, i64 28} !31 = !{!15, !6, i64 32} !32 = !{!15, !6, i64 64} !33 = !{!15, !16, i64 56} !34 = !{!10, !11, i64 8} !35 = !{!10, !6, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/hamradio/extr_6pack.c_sixpack_open.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/hamradio/extr_6pack.c_sixpack_open.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @CAP_NET_ADMIN = common local_unnamed_addr global i32 0, align 4 @EPERM = common local_unnamed_addr global i32 0, align 4 @EOPNOTSUPP = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [5 x i8] c"sp%d\00", align 1 @sp_setup = common local_unnamed_addr global i32 0, align 4 @ENOMEM = common local_unnamed_addr global i32 0, align 4 @GFP_KERNEL = common local_unnamed_addr global i32 0, align 4 @ENOBUFS = common local_unnamed_addr global i32 0, align 4 @AX25_MTU = common local_unnamed_addr global i64 0, align 8 @SIXP_TXDELAY = common local_unnamed_addr global i32 0, align 4 @SIXP_PERSIST = common local_unnamed_addr global i32 0, align 4 @SIXP_SLOTTIME = common local_unnamed_addr global i32 0, align 4 @sp_xmit_on_air = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @sixpack_open], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 -2147483647, -2147483648) i32 @sixpack_open(ptr noundef %0) #0 { %2 = load i32, ptr @CAP_NET_ADMIN, align 4, !tbaa !6 %3 = tail call i32 @capable(i32 noundef %2) #3 %4 = icmp eq i32 %3, 0 br i1 %4, label %5, label %8 5: ; preds = %1 %6 = load i32, ptr @EPERM, align 4, !tbaa !6 %7 = sub nsw i32 0, %6 br label %83 8: ; preds = %1 %9 = getelementptr inbounds i8, ptr %0, i64 16 %10 = load ptr, ptr %9, align 8, !tbaa !10 %11 = load ptr, ptr %10, align 8, !tbaa !13 %12 = icmp eq ptr %11, null br i1 %12, label %13, label %16 13: ; preds = %8 %14 = load i32, ptr @EOPNOTSUPP, align 4, !tbaa !6 %15 = sub nsw i32 0, %14 br label %83 16: ; preds = %8 %17 = load i32, ptr @sp_setup, align 4, !tbaa !6 %18 = tail call ptr @alloc_netdev(i32 noundef 184, ptr noundef nonnull @.str, i32 noundef %17) #3 %19 = icmp eq ptr %18, null br i1 %19, label %20, label %23 20: ; preds = %16 %21 = load i32, ptr @ENOMEM, align 4, !tbaa !6 %22 = sub nsw i32 0, %21 br label %83 23: ; preds = %16 %24 = tail call ptr @netdev_priv(ptr noundef nonnull %18) #3 %25 = getelementptr inbounds i8, ptr %24, i64 176 store ptr %18, ptr %25, align 8, !tbaa !15 %26 = getelementptr inbounds i8, ptr %24, i64 36 %27 = tail call i32 @spin_lock_init(ptr noundef nonnull %26) #3 %28 = getelementptr inbounds i8, ptr %24, i64 172 %29 = tail call i32 @atomic_set(ptr noundef nonnull %28, i32 noundef 1) #3 %30 = getelementptr inbounds i8, ptr %24, i64 168 %31 = tail call i32 @init_MUTEX_LOCKED(ptr noundef nonnull %30) #3 %32 = load i32, ptr %18, align 4, !tbaa !19 %33 = shl nsw i32 %32, 1 %34 = sext i32 %33 to i64 %35 = add nsw i64 %34, 4 %36 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6 %37 = tail call ptr @kmalloc(i64 noundef %35, i32 noundef %36) #3 %38 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6 %39 = tail call ptr @kmalloc(i64 noundef %35, i32 noundef %38) #3 %40 = icmp eq ptr %37, null %41 = icmp eq ptr %39, null %42 = select i1 %40, i1 true, i1 %41 br i1 %42, label %43, label %46 43: ; preds = %23 %44 = load i32, ptr @ENOBUFS, align 4, !tbaa !6 %45 = sub nsw i32 0, %44 br label %78 46: ; preds = %23 %47 = tail call i32 @spin_lock_bh(ptr noundef nonnull %26) #3 %48 = getelementptr inbounds i8, ptr %24, i64 160 store ptr %0, ptr %48, align 8, !tbaa !21 store ptr %37, ptr %24, align 8, !tbaa !22 %49 = getelementptr inbounds i8, ptr %24, i64 8 store ptr %39, ptr %49, align 8, !tbaa !23 %50 = load i64, ptr @AX25_MTU, align 8, !tbaa !24 %51 = add nsw i64 %50, 73 %52 = getelementptr inbounds i8, ptr %24, i64 152 store i64 %51, ptr %52, align 8, !tbaa !25 %53 = getelementptr inbounds i8, ptr %24, i64 16 store i64 %34, ptr %53, align 8, !tbaa !26 %54 = getelementptr inbounds i8, ptr %24, i64 104 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(48) %54, i8 0, i64 48, i1 false) %55 = load i32, ptr @SIXP_TXDELAY, align 4, !tbaa !6 %56 = getelementptr inbounds i8, ptr %24, i64 96 store i32 %55, ptr %56, align 8, !tbaa !27 %57 = load i32, ptr @SIXP_PERSIST, align 4, !tbaa !6 %58 = getelementptr inbounds i8, ptr %24, i64 92 store i32 %57, ptr %58, align 4, !tbaa !28 %59 = load i32, ptr @SIXP_SLOTTIME, align 4, !tbaa !6 %60 = getelementptr inbounds i8, ptr %24, i64 88 store i32 %59, ptr %60, align 8, !tbaa !29 %61 = getelementptr inbounds i8, ptr %24, i64 24 store <2 x i32> <i32 96, i32 1>, ptr %61, align 8, !tbaa !6 %62 = getelementptr inbounds i8, ptr %24, i64 32 store i32 1, ptr %62, align 8, !tbaa !30 %63 = getelementptr inbounds i8, ptr %24, i64 72 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %63, i8 0, i64 16, i1 false) %64 = tail call i32 @netif_start_queue(ptr noundef nonnull %18) #3 %65 = getelementptr inbounds i8, ptr %24, i64 56 %66 = tail call i32 @init_timer(ptr noundef nonnull %65) #3 %67 = load i32, ptr @sp_xmit_on_air, align 4, !tbaa !6 %68 = getelementptr inbounds i8, ptr %24, i64 64 store i32 %67, ptr %68, align 8, !tbaa !31 %69 = ptrtoint ptr %24 to i64 store i64 %69, ptr %65, align 8, !tbaa !32 %70 = getelementptr inbounds i8, ptr %24, i64 40 %71 = tail call i32 @init_timer(ptr noundef nonnull %70) #3 %72 = tail call i32 @spin_unlock_bh(ptr noundef nonnull %26) #3 %73 = getelementptr inbounds i8, ptr %0, i64 8 store ptr %24, ptr %73, align 8, !tbaa !33 store i32 65536, ptr %0, align 8, !tbaa !34 %74 = tail call i64 @register_netdev(ptr noundef nonnull %18) #3 %75 = icmp eq i64 %74, 0 br i1 %75, label %76, label %78 76: ; preds = %46 %77 = tail call i32 @tnc_init(ptr noundef nonnull %24) #3 br label %83 78: ; preds = %46, %43 %79 = phi i32 [ %45, %43 ], [ 0, %46 ] %80 = tail call i32 @kfree(ptr noundef %39) #3 %81 = tail call i32 @kfree(ptr noundef %37) #3 %82 = tail call i32 @free_netdev(ptr noundef nonnull %18) #3 br label %83 83: ; preds = %20, %78, %76, %13, %5 %84 = phi i32 [ %15, %13 ], [ 0, %76 ], [ %7, %5 ], [ %79, %78 ], [ %22, %20 ] ret i32 %84 } declare i32 @capable(i32 noundef) local_unnamed_addr #1 declare ptr @alloc_netdev(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1 declare i32 @spin_lock_init(ptr noundef) local_unnamed_addr #1 declare i32 @atomic_set(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @init_MUTEX_LOCKED(ptr noundef) local_unnamed_addr #1 declare ptr @kmalloc(i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @spin_lock_bh(ptr noundef) local_unnamed_addr #1 declare i32 @netif_start_queue(ptr noundef) local_unnamed_addr #1 declare i32 @init_timer(ptr noundef) local_unnamed_addr #1 declare i32 @spin_unlock_bh(ptr noundef) local_unnamed_addr #1 declare i64 @register_netdev(ptr noundef) local_unnamed_addr #1 declare i32 @tnc_init(ptr noundef) local_unnamed_addr #1 declare i32 @kfree(ptr noundef) local_unnamed_addr #1 declare i32 @free_netdev(ptr noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 16} !11 = !{!"tty_struct", !7, i64 0, !12, i64 8, !12, i64 16} !12 = !{!"any pointer", !8, i64 0} !13 = !{!14, !12, i64 0} !14 = !{!"TYPE_3__", !12, i64 0} !15 = !{!16, !12, i64 176} !16 = !{!"sixpack", !12, i64 0, !12, i64 8, !17, i64 16, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !18, i64 40, !18, i64 56, !17, i64 72, !17, i64 80, !7, i64 88, !7, i64 92, !7, i64 96, !17, i64 104, !17, i64 112, !17, i64 120, !17, i64 128, !17, i64 136, !17, i64 144, !17, i64 152, !12, i64 160, !7, i64 168, !7, i64 172, !12, i64 176} !17 = !{!"long", !8, i64 0} !18 = !{!"TYPE_4__", !17, i64 0, !7, i64 8} !19 = !{!20, !7, i64 0} !20 = !{!"net_device", !7, i64 0} !21 = !{!16, !12, i64 160} !22 = !{!16, !12, i64 0} !23 = !{!16, !12, i64 8} !24 = !{!17, !17, i64 0} !25 = !{!16, !17, i64 152} !26 = !{!16, !17, i64 16} !27 = !{!16, !7, i64 96} !28 = !{!16, !7, i64 92} !29 = !{!16, !7, i64 88} !30 = !{!16, !7, i64 32} !31 = !{!16, !7, i64 64} !32 = !{!16, !17, i64 56} !33 = !{!11, !12, i64 8} !34 = !{!11, !7, i64 0}
fastsocket_kernel_drivers_net_hamradio_extr_6pack.c_sixpack_open
; ModuleID = 'AnghaBench/freebsd/contrib/mandoc/extr_cgi.c_html_print.c' source_filename = "AnghaBench/freebsd/contrib/mandoc/extr_cgi.c_html_print.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @html_print], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @html_print(ptr noundef readonly %0) #0 { %2 = icmp eq ptr %0, null br i1 %2, label %14, label %3 3: ; preds = %1 %4 = load i8, ptr %0, align 1, !tbaa !5 %5 = icmp eq i8 %4, 0 br i1 %5, label %14, label %6 6: ; preds = %3, %6 %7 = phi i8 [ %12, %6 ], [ %4, %3 ] %8 = phi ptr [ %10, %6 ], [ %0, %3 ] %9 = sext i8 %7 to i32 %10 = getelementptr inbounds i8, ptr %8, i64 1 %11 = tail call i32 @html_putchar(i32 noundef %9) #2 %12 = load i8, ptr %10, align 1, !tbaa !5 %13 = icmp eq i8 %12, 0 br i1 %13, label %14, label %6, !llvm.loop !8 14: ; preds = %6, %3, %1 ret void } declare i32 @html_putchar(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"omnipotent char", !7, i64 0} !7 = !{!"Simple C/C++ TBAA"} !8 = distinct !{!8, !9} !9 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/freebsd/contrib/mandoc/extr_cgi.c_html_print.c' source_filename = "AnghaBench/freebsd/contrib/mandoc/extr_cgi.c_html_print.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @html_print], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @html_print(ptr noundef readonly %0) #0 { %2 = icmp eq ptr %0, null br i1 %2, label %14, label %3 3: ; preds = %1 %4 = load i8, ptr %0, align 1, !tbaa !6 %5 = icmp eq i8 %4, 0 br i1 %5, label %14, label %6 6: ; preds = %3, %6 %7 = phi i8 [ %12, %6 ], [ %4, %3 ] %8 = phi ptr [ %10, %6 ], [ %0, %3 ] %9 = sext i8 %7 to i32 %10 = getelementptr inbounds i8, ptr %8, i64 1 %11 = tail call i32 @html_putchar(i32 noundef %9) #2 %12 = load i8, ptr %10, align 1, !tbaa !6 %13 = icmp eq i8 %12, 0 br i1 %13, label %14, label %6, !llvm.loop !9 14: ; preds = %6, %3, %1 ret void } declare i32 @html_putchar(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = distinct !{!9, !10} !10 = !{!"llvm.loop.mustprogress"}
freebsd_contrib_mandoc_extr_cgi.c_html_print
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/oki-semi/pch_gbe/extr_pch_gbe_main.c_pch_gbe_free_tx_resources.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/oki-semi/pch_gbe/extr_pch_gbe_main.c_pch_gbe_free_tx_resources.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.pch_gbe_tx_ring = type { ptr, i32, i32, ptr } ; Function Attrs: nounwind uwtable define dso_local void @pch_gbe_free_tx_resources(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = load ptr, ptr %0, align 8, !tbaa !5 %4 = tail call i32 @pch_gbe_clean_tx_ring(ptr noundef nonnull %0, ptr noundef %1) #2 %5 = getelementptr inbounds %struct.pch_gbe_tx_ring, ptr %1, i64 0, i32 3 %6 = load ptr, ptr %5, align 8, !tbaa !10 %7 = tail call i32 @vfree(ptr noundef %6) #2 store ptr null, ptr %5, align 8, !tbaa !10 %8 = getelementptr inbounds %struct.pch_gbe_tx_ring, ptr %1, i64 0, i32 2 %9 = load i32, ptr %8, align 4, !tbaa !13 %10 = load ptr, ptr %1, align 8, !tbaa !14 %11 = getelementptr inbounds %struct.pch_gbe_tx_ring, ptr %1, i64 0, i32 1 %12 = load i32, ptr %11, align 8, !tbaa !15 %13 = tail call i32 @pci_free_consistent(ptr noundef %3, i32 noundef %9, ptr noundef %10, i32 noundef %12) #2 store ptr null, ptr %1, align 8, !tbaa !14 ret void } declare i32 @pch_gbe_clean_tx_ring(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @vfree(ptr noundef) local_unnamed_addr #1 declare i32 @pci_free_consistent(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"pch_gbe_adapter", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 16} !11 = !{!"pch_gbe_tx_ring", !7, i64 0, !12, i64 8, !12, i64 12, !7, i64 16} !12 = !{!"int", !8, i64 0} !13 = !{!11, !12, i64 12} !14 = !{!11, !7, i64 0} !15 = !{!11, !12, i64 8}
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/oki-semi/pch_gbe/extr_pch_gbe_main.c_pch_gbe_free_tx_resources.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/oki-semi/pch_gbe/extr_pch_gbe_main.c_pch_gbe_free_tx_resources.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define void @pch_gbe_free_tx_resources(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = load ptr, ptr %0, align 8, !tbaa !6 %4 = tail call i32 @pch_gbe_clean_tx_ring(ptr noundef nonnull %0, ptr noundef %1) #2 %5 = getelementptr inbounds i8, ptr %1, i64 16 %6 = load ptr, ptr %5, align 8, !tbaa !11 %7 = tail call i32 @vfree(ptr noundef %6) #2 store ptr null, ptr %5, align 8, !tbaa !11 %8 = getelementptr inbounds i8, ptr %1, i64 12 %9 = load i32, ptr %8, align 4, !tbaa !14 %10 = load ptr, ptr %1, align 8, !tbaa !15 %11 = getelementptr inbounds i8, ptr %1, i64 8 %12 = load i32, ptr %11, align 8, !tbaa !16 %13 = tail call i32 @pci_free_consistent(ptr noundef %3, i32 noundef %9, ptr noundef %10, i32 noundef %12) #2 store ptr null, ptr %1, align 8, !tbaa !15 ret void } declare i32 @pch_gbe_clean_tx_ring(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @vfree(ptr noundef) local_unnamed_addr #1 declare i32 @pci_free_consistent(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"pch_gbe_adapter", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !8, i64 16} !12 = !{!"pch_gbe_tx_ring", !8, i64 0, !13, i64 8, !13, i64 12, !8, i64 16} !13 = !{!"int", !9, i64 0} !14 = !{!12, !13, i64 12} !15 = !{!12, !8, i64 0} !16 = !{!12, !13, i64 8}
linux_drivers_net_ethernet_oki-semi_pch_gbe_extr_pch_gbe_main.c_pch_gbe_free_tx_resources
; ModuleID = 'AnghaBench/RetroArch/tasks/extr_task_content.c_firmware_update_status.c' source_filename = "AnghaBench/RetroArch/tasks/extr_task_content.c_firmware_update_status.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_10__ = type { %struct.TYPE_8__, i32 } %struct.TYPE_8__ = type { ptr } %struct.TYPE_11__ = type { ptr, i64, i64 } @PATH_MAX_LENGTH = dso_local local_unnamed_addr global i32 0, align 4 @RARCH_PATH_CONTENT = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [40 x i8] c"Updating firmware status for: %s on %s\0A\00", align 1 @RARCH_CTL_UNSET_MISSING_BIOS = dso_local local_unnamed_addr global i32 0, align 4 @RARCH_CTL_SET_MISSING_BIOS = dso_local local_unnamed_addr global i32 0, align 4 @MSG_FIRMWARE = dso_local local_unnamed_addr global i32 0, align 4 @MESSAGE_QUEUE_ICON_DEFAULT = dso_local local_unnamed_addr global i32 0, align 4 @MESSAGE_QUEUE_CATEGORY_INFO = dso_local local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [34 x i8] c"Load content blocked. Reason: %s\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @firmware_update_status], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef i32 @firmware_update_status(ptr nocapture noundef readonly %0) #0 { %2 = alloca %struct.TYPE_10__, align 8 %3 = alloca i32, align 4 %4 = alloca ptr, align 8 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 store i32 0, ptr %3, align 4, !tbaa !5 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3 store ptr null, ptr %4, align 8, !tbaa !9 %5 = load i32, ptr @PATH_MAX_LENGTH, align 4, !tbaa !5 %6 = sext i32 %5 to i64 %7 = call i32 @core_info_get_current_core(ptr noundef nonnull %4) #3 %8 = load ptr, ptr %4, align 8, !tbaa !9 %9 = icmp eq ptr %8, null br i1 %9, label %57, label %10 10: ; preds = %1 %11 = call i64 @malloc(i64 noundef %6) #3 %12 = inttoptr i64 %11 to ptr %13 = load ptr, ptr %4, align 8, !tbaa !9 %14 = load i32, ptr %13, align 4, !tbaa !11 %15 = getelementptr inbounds %struct.TYPE_10__, ptr %2, i64 0, i32 1 store i32 %14, ptr %15, align 8, !tbaa !13 %16 = load ptr, ptr %0, align 8, !tbaa !16 %17 = call i32 @string_is_empty(ptr noundef %16) #3 %18 = icmp eq i32 %17, 0 br i1 %18, label %19, label %21 19: ; preds = %10 %20 = load ptr, ptr %0, align 8, !tbaa !16 br label %26 21: ; preds = %10 %22 = load i32, ptr @RARCH_PATH_CONTENT, align 4, !tbaa !5 %23 = call i32 @path_get(i32 noundef %22) #3 %24 = call i32 @strlcpy(ptr noundef %12, i32 noundef %23, i64 noundef %6) #3 %25 = call i32 @path_basedir_wrapper(ptr noundef %12) #3 br label %26 26: ; preds = %21, %19 %27 = phi ptr [ %20, %19 ], [ %12, %21 ] store ptr %27, ptr %2, align 8, !tbaa !19 %28 = load ptr, ptr %4, align 8, !tbaa !9 %29 = load i32, ptr %28, align 4, !tbaa !11 %30 = call i32 (ptr, i32, ...) @RARCH_LOG(ptr noundef nonnull @.str, i32 noundef %29, ptr noundef %27) #3 %31 = load i32, ptr @RARCH_CTL_UNSET_MISSING_BIOS, align 4, !tbaa !5 %32 = call i32 @rarch_ctl(i32 noundef %31, ptr noundef null) #3 %33 = call i32 @core_info_list_update_missing_firmware(ptr noundef nonnull %2, ptr noundef nonnull %3) #3 %34 = call i32 @free(ptr noundef %12) #3 %35 = load i32, ptr %3, align 4, !tbaa !5 %36 = icmp eq i32 %35, 0 br i1 %36, label %40, label %37 37: ; preds = %26 %38 = load i32, ptr @RARCH_CTL_SET_MISSING_BIOS, align 4, !tbaa !5 %39 = call i32 @rarch_ctl(i32 noundef %38, ptr noundef null) #3 br label %40 40: ; preds = %37, %26 %41 = getelementptr inbounds %struct.TYPE_11__, ptr %0, i64 0, i32 2 %42 = load i64, ptr %41, align 8, !tbaa !20 %43 = icmp eq i64 %42, 0 br i1 %43, label %57, label %44 44: ; preds = %40 %45 = getelementptr inbounds %struct.TYPE_11__, ptr %0, i64 0, i32 1 %46 = load i64, ptr %45, align 8, !tbaa !21 %47 = icmp eq i64 %46, 0 br i1 %47, label %57, label %48 48: ; preds = %44 %49 = load i32, ptr @MSG_FIRMWARE, align 4, !tbaa !5 %50 = call i32 @msg_hash_to_str(i32 noundef %49) #3 %51 = load i32, ptr @MESSAGE_QUEUE_ICON_DEFAULT, align 4, !tbaa !5 %52 = load i32, ptr @MESSAGE_QUEUE_CATEGORY_INFO, align 4, !tbaa !5 %53 = call i32 @runloop_msg_queue_push(i32 noundef %50, i32 noundef 100, i32 noundef 500, i32 noundef 1, ptr noundef null, i32 noundef %51, i32 noundef %52) #3 %54 = load i32, ptr @MSG_FIRMWARE, align 4, !tbaa !5 %55 = call i32 @msg_hash_to_str(i32 noundef %54) #3 %56 = call i32 (ptr, i32, ...) @RARCH_LOG(ptr noundef nonnull @.str.1, i32 noundef %55) #3 br label %57 57: ; preds = %40, %44, %1, %48 %58 = phi i32 [ 1, %48 ], [ 0, %1 ], [ 0, %44 ], [ 0, %40 ] call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #3 ret i32 %58 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @core_info_get_current_core(ptr noundef) local_unnamed_addr #2 declare i64 @malloc(i64 noundef) local_unnamed_addr #2 declare i32 @string_is_empty(ptr noundef) local_unnamed_addr #2 declare i32 @strlcpy(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2 declare i32 @path_get(i32 noundef) local_unnamed_addr #2 declare i32 @path_basedir_wrapper(ptr noundef) local_unnamed_addr #2 declare i32 @RARCH_LOG(ptr noundef, i32 noundef, ...) local_unnamed_addr #2 declare i32 @rarch_ctl(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @core_info_list_update_missing_firmware(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @free(ptr noundef) local_unnamed_addr #2 declare i32 @runloop_msg_queue_push(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @msg_hash_to_str(i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"any pointer", !7, i64 0} !11 = !{!12, !6, i64 0} !12 = !{!"TYPE_9__", !6, i64 0} !13 = !{!14, !6, i64 8} !14 = !{!"TYPE_10__", !15, i64 0, !6, i64 8} !15 = !{!"TYPE_8__", !10, i64 0} !16 = !{!17, !10, i64 0} !17 = !{!"TYPE_11__", !10, i64 0, !18, i64 8, !18, i64 16} !18 = !{!"long", !7, i64 0} !19 = !{!14, !10, i64 0} !20 = !{!17, !18, i64 16} !21 = !{!17, !18, i64 8}
; ModuleID = 'AnghaBench/RetroArch/tasks/extr_task_content.c_firmware_update_status.c' source_filename = "AnghaBench/RetroArch/tasks/extr_task_content.c_firmware_update_status.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_10__ = type { %struct.TYPE_8__, i32 } %struct.TYPE_8__ = type { ptr } @PATH_MAX_LENGTH = common local_unnamed_addr global i32 0, align 4 @RARCH_PATH_CONTENT = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [40 x i8] c"Updating firmware status for: %s on %s\0A\00", align 1 @RARCH_CTL_UNSET_MISSING_BIOS = common local_unnamed_addr global i32 0, align 4 @RARCH_CTL_SET_MISSING_BIOS = common local_unnamed_addr global i32 0, align 4 @MSG_FIRMWARE = common local_unnamed_addr global i32 0, align 4 @MESSAGE_QUEUE_ICON_DEFAULT = common local_unnamed_addr global i32 0, align 4 @MESSAGE_QUEUE_CATEGORY_INFO = common local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [34 x i8] c"Load content blocked. Reason: %s\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @firmware_update_status], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 0, 2) i32 @firmware_update_status(ptr nocapture noundef readonly %0) #0 { %2 = alloca %struct.TYPE_10__, align 8 %3 = alloca i32, align 4 %4 = alloca ptr, align 8 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 store i32 0, ptr %3, align 4, !tbaa !6 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3 store ptr null, ptr %4, align 8, !tbaa !10 %5 = load i32, ptr @PATH_MAX_LENGTH, align 4, !tbaa !6 %6 = sext i32 %5 to i64 %7 = call i32 @core_info_get_current_core(ptr noundef nonnull %4) #3 %8 = load ptr, ptr %4, align 8, !tbaa !10 %9 = icmp eq ptr %8, null br i1 %9, label %57, label %10 10: ; preds = %1 %11 = call i64 @malloc(i64 noundef %6) #3 %12 = inttoptr i64 %11 to ptr %13 = load ptr, ptr %4, align 8, !tbaa !10 %14 = load i32, ptr %13, align 4, !tbaa !12 %15 = getelementptr inbounds i8, ptr %2, i64 8 store i32 %14, ptr %15, align 8, !tbaa !14 %16 = load ptr, ptr %0, align 8, !tbaa !17 %17 = call i32 @string_is_empty(ptr noundef %16) #3 %18 = icmp eq i32 %17, 0 br i1 %18, label %19, label %21 19: ; preds = %10 %20 = load ptr, ptr %0, align 8, !tbaa !17 br label %26 21: ; preds = %10 %22 = load i32, ptr @RARCH_PATH_CONTENT, align 4, !tbaa !6 %23 = call i32 @path_get(i32 noundef %22) #3 %24 = call i32 @strlcpy(ptr noundef %12, i32 noundef %23, i64 noundef %6) #3 %25 = call i32 @path_basedir_wrapper(ptr noundef %12) #3 br label %26 26: ; preds = %21, %19 %27 = phi ptr [ %20, %19 ], [ %12, %21 ] store ptr %27, ptr %2, align 8, !tbaa !20 %28 = load ptr, ptr %4, align 8, !tbaa !10 %29 = load i32, ptr %28, align 4, !tbaa !12 %30 = call i32 (ptr, i32, ...) @RARCH_LOG(ptr noundef nonnull @.str, i32 noundef %29, ptr noundef %27) #3 %31 = load i32, ptr @RARCH_CTL_UNSET_MISSING_BIOS, align 4, !tbaa !6 %32 = call i32 @rarch_ctl(i32 noundef %31, ptr noundef null) #3 %33 = call i32 @core_info_list_update_missing_firmware(ptr noundef nonnull %2, ptr noundef nonnull %3) #3 %34 = call i32 @free(ptr noundef %12) #3 %35 = load i32, ptr %3, align 4, !tbaa !6 %36 = icmp eq i32 %35, 0 br i1 %36, label %40, label %37 37: ; preds = %26 %38 = load i32, ptr @RARCH_CTL_SET_MISSING_BIOS, align 4, !tbaa !6 %39 = call i32 @rarch_ctl(i32 noundef %38, ptr noundef null) #3 br label %40 40: ; preds = %37, %26 %41 = getelementptr inbounds i8, ptr %0, i64 16 %42 = load i64, ptr %41, align 8, !tbaa !21 %43 = icmp eq i64 %42, 0 br i1 %43, label %57, label %44 44: ; preds = %40 %45 = getelementptr inbounds i8, ptr %0, i64 8 %46 = load i64, ptr %45, align 8, !tbaa !22 %47 = icmp eq i64 %46, 0 br i1 %47, label %57, label %48 48: ; preds = %44 %49 = load i32, ptr @MSG_FIRMWARE, align 4, !tbaa !6 %50 = call i32 @msg_hash_to_str(i32 noundef %49) #3 %51 = load i32, ptr @MESSAGE_QUEUE_ICON_DEFAULT, align 4, !tbaa !6 %52 = load i32, ptr @MESSAGE_QUEUE_CATEGORY_INFO, align 4, !tbaa !6 %53 = call i32 @runloop_msg_queue_push(i32 noundef %50, i32 noundef 100, i32 noundef 500, i32 noundef 1, ptr noundef null, i32 noundef %51, i32 noundef %52) #3 %54 = load i32, ptr @MSG_FIRMWARE, align 4, !tbaa !6 %55 = call i32 @msg_hash_to_str(i32 noundef %54) #3 %56 = call i32 (ptr, i32, ...) @RARCH_LOG(ptr noundef nonnull @.str.1, i32 noundef %55) #3 br label %57 57: ; preds = %40, %44, %1, %48 %58 = phi i32 [ 1, %48 ], [ 0, %1 ], [ 0, %44 ], [ 0, %40 ] call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #3 ret i32 %58 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @core_info_get_current_core(ptr noundef) local_unnamed_addr #2 declare i64 @malloc(i64 noundef) local_unnamed_addr #2 declare i32 @string_is_empty(ptr noundef) local_unnamed_addr #2 declare i32 @strlcpy(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2 declare i32 @path_get(i32 noundef) local_unnamed_addr #2 declare i32 @path_basedir_wrapper(ptr noundef) local_unnamed_addr #2 declare i32 @RARCH_LOG(ptr noundef, i32 noundef, ...) local_unnamed_addr #2 declare i32 @rarch_ctl(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @core_info_list_update_missing_firmware(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @free(ptr noundef) local_unnamed_addr #2 declare i32 @runloop_msg_queue_push(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @msg_hash_to_str(i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"any pointer", !8, i64 0} !12 = !{!13, !7, i64 0} !13 = !{!"TYPE_9__", !7, i64 0} !14 = !{!15, !7, i64 8} !15 = !{!"TYPE_10__", !16, i64 0, !7, i64 8} !16 = !{!"TYPE_8__", !11, i64 0} !17 = !{!18, !11, i64 0} !18 = !{!"TYPE_11__", !11, i64 0, !19, i64 8, !19, i64 16} !19 = !{!"long", !8, i64 0} !20 = !{!15, !11, i64 0} !21 = !{!18, !19, i64 16} !22 = !{!18, !19, i64 8}
RetroArch_tasks_extr_task_content.c_firmware_update_status
; ModuleID = 'AnghaBench/freebsd/sys/security/mac/extr_mac_framework.c_mac_policy_slock_sleep.c' source_filename = "AnghaBench/freebsd/sys/security/mac/extr_mac_framework.c_mac_policy_slock_sleep.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @WARN_GIANTOK = dso_local local_unnamed_addr global i32 0, align 4 @WARN_SLEEPOK = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [23 x i8] c"mac_policy_slock_sleep\00", align 1 @mac_late = dso_local local_unnamed_addr global i32 0, align 4 @mac_policy_sx = dso_local global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local void @mac_policy_slock_sleep() local_unnamed_addr #0 { %1 = load i32, ptr @WARN_GIANTOK, align 4, !tbaa !5 %2 = load i32, ptr @WARN_SLEEPOK, align 4, !tbaa !5 %3 = or i32 %2, %1 %4 = tail call i32 @WITNESS_WARN(i32 noundef %3, ptr noundef null, ptr noundef nonnull @.str) #2 %5 = load i32, ptr @mac_late, align 4, !tbaa !5 %6 = icmp eq i32 %5, 0 br i1 %6, label %9, label %7 7: ; preds = %0 %8 = tail call i32 @sx_slock(ptr noundef nonnull @mac_policy_sx) #2 br label %9 9: ; preds = %0, %7 ret void } declare i32 @WITNESS_WARN(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @sx_slock(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/freebsd/sys/security/mac/extr_mac_framework.c_mac_policy_slock_sleep.c' source_filename = "AnghaBench/freebsd/sys/security/mac/extr_mac_framework.c_mac_policy_slock_sleep.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @WARN_GIANTOK = common local_unnamed_addr global i32 0, align 4 @WARN_SLEEPOK = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [23 x i8] c"mac_policy_slock_sleep\00", align 1 @mac_late = common local_unnamed_addr global i32 0, align 4 @mac_policy_sx = common global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define void @mac_policy_slock_sleep() local_unnamed_addr #0 { %1 = load i32, ptr @WARN_GIANTOK, align 4, !tbaa !6 %2 = load i32, ptr @WARN_SLEEPOK, align 4, !tbaa !6 %3 = or i32 %2, %1 %4 = tail call i32 @WITNESS_WARN(i32 noundef %3, ptr noundef null, ptr noundef nonnull @.str) #2 %5 = load i32, ptr @mac_late, align 4, !tbaa !6 %6 = icmp eq i32 %5, 0 br i1 %6, label %9, label %7 7: ; preds = %0 %8 = tail call i32 @sx_slock(ptr noundef nonnull @mac_policy_sx) #2 br label %9 9: ; preds = %0, %7 ret void } declare i32 @WITNESS_WARN(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @sx_slock(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
freebsd_sys_security_mac_extr_mac_framework.c_mac_policy_slock_sleep
; ModuleID = 'AnghaBench/git/extr_revision.c_paths_and_oids_init.c' source_filename = "AnghaBench/git/extr_revision.c_paths_and_oids_init.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @path_and_oids_cmp = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @paths_and_oids_init], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @paths_and_oids_init(ptr noundef %0) #0 { %2 = load i32, ptr @path_and_oids_cmp, align 4, !tbaa !5 %3 = tail call i32 @hashmap_init(ptr noundef %0, i32 noundef %2, ptr noundef null, i32 noundef 0) #2 ret void } declare i32 @hashmap_init(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/git/extr_revision.c_paths_and_oids_init.c' source_filename = "AnghaBench/git/extr_revision.c_paths_and_oids_init.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @path_and_oids_cmp = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @paths_and_oids_init], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @paths_and_oids_init(ptr noundef %0) #0 { %2 = load i32, ptr @path_and_oids_cmp, align 4, !tbaa !6 %3 = tail call i32 @hashmap_init(ptr noundef %0, i32 noundef %2, ptr noundef null, i32 noundef 0) #2 ret void } declare i32 @hashmap_init(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
git_extr_revision.c_paths_and_oids_init
; ModuleID = 'AnghaBench/vlc/modules/demux/extr_gme.c_Close.c' source_filename = "AnghaBench/vlc/modules/demux/extr_gme.c_Close.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_6__ = type { i32, i32, ptr } @llvm.compiler.used = appending global [1 x ptr] [ptr @Close], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @Close(ptr nocapture noundef readonly %0) #0 { %2 = load ptr, ptr %0, align 8, !tbaa !5 %3 = load i32, ptr %2, align 8, !tbaa !10 %4 = icmp eq i32 %3, 0 br i1 %4, label %8, label %5 5: ; preds = %1 %6 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 2 %7 = zext i32 %3 to i64 br label %16 8: ; preds = %16, %1 %9 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 2 %10 = load ptr, ptr %9, align 8, !tbaa !13 %11 = tail call i32 @free(ptr noundef %10) #2 %12 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 1 %13 = load i32, ptr %12, align 4, !tbaa !14 %14 = tail call i32 @gme_delete(i32 noundef %13) #2 %15 = tail call i32 @free(ptr noundef nonnull %2) #2 ret void 16: ; preds = %5, %16 %17 = phi i64 [ 0, %5 ], [ %24, %16 ] %18 = load ptr, ptr %6, align 8, !tbaa !13 %19 = getelementptr inbounds %struct.TYPE_6__, ptr %18, i64 %17 %20 = load i64, ptr %19, align 8 %21 = getelementptr inbounds { i64, ptr }, ptr %19, i64 0, i32 1 %22 = load ptr, ptr %21, align 8 %23 = tail call i32 @vlc_input_title_Delete(i64 %20, ptr %22) #2 %24 = add nuw nsw i64 %17, 1 %25 = icmp eq i64 %24, %7 br i1 %25, label %8, label %16, !llvm.loop !15 } declare i32 @vlc_input_title_Delete(i64, ptr) local_unnamed_addr #1 declare i32 @free(ptr noundef) local_unnamed_addr #1 declare i32 @gme_delete(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_5__", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"TYPE_6__", !12, i64 0, !12, i64 4, !7, i64 8} !12 = !{!"int", !8, i64 0} !13 = !{!11, !7, i64 8} !14 = !{!11, !12, i64 4} !15 = distinct !{!15, !16} !16 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/vlc/modules/demux/extr_gme.c_Close.c' source_filename = "AnghaBench/vlc/modules/demux/extr_gme.c_Close.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_6__ = type { i32, i32, ptr } @llvm.used = appending global [1 x ptr] [ptr @Close], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @Close(ptr nocapture noundef readonly %0) #0 { %2 = load ptr, ptr %0, align 8, !tbaa !6 %3 = load i32, ptr %2, align 8, !tbaa !11 %4 = icmp eq i32 %3, 0 br i1 %4, label %8, label %5 5: ; preds = %1 %6 = getelementptr inbounds i8, ptr %2, i64 8 %7 = zext i32 %3 to i64 br label %16 8: ; preds = %16, %1 %9 = getelementptr inbounds i8, ptr %2, i64 8 %10 = load ptr, ptr %9, align 8, !tbaa !14 %11 = tail call i32 @free(ptr noundef %10) #2 %12 = getelementptr inbounds i8, ptr %2, i64 4 %13 = load i32, ptr %12, align 4, !tbaa !15 %14 = tail call i32 @gme_delete(i32 noundef %13) #2 %15 = tail call i32 @free(ptr noundef nonnull %2) #2 ret void 16: ; preds = %5, %16 %17 = phi i64 [ 0, %5 ], [ %26, %16 ] %18 = load ptr, ptr %6, align 8, !tbaa !14 %19 = getelementptr inbounds %struct.TYPE_6__, ptr %18, i64 %17 %20 = load i64, ptr %19, align 8 %21 = insertvalue [2 x i64] poison, i64 %20, 0 %22 = getelementptr inbounds i8, ptr %19, i64 8 %23 = load i64, ptr %22, align 8 %24 = insertvalue [2 x i64] %21, i64 %23, 1 %25 = tail call i32 @vlc_input_title_Delete([2 x i64] %24) #2 %26 = add nuw nsw i64 %17, 1 %27 = icmp eq i64 %26, %7 br i1 %27, label %8, label %16, !llvm.loop !16 } declare i32 @vlc_input_title_Delete([2 x i64]) local_unnamed_addr #1 declare i32 @free(ptr noundef) local_unnamed_addr #1 declare i32 @gme_delete(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_5__", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !13, i64 0} !12 = !{!"TYPE_6__", !13, i64 0, !13, i64 4, !8, i64 8} !13 = !{!"int", !9, i64 0} !14 = !{!12, !8, i64 8} !15 = !{!12, !13, i64 4} !16 = distinct !{!16, !17} !17 = !{!"llvm.loop.mustprogress"}
vlc_modules_demux_extr_gme.c_Close
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_ar9002_hw.c_ar9002_hw_configpcipowersave.c' source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_ar9002_hw.c_ar9002_hw_configpcipowersave.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.ath_hw = type { %struct.TYPE_3__, %struct.TYPE_4__ } %struct.TYPE_3__ = type { i32 } %struct.TYPE_4__ = type { i64 } @AR_PCIE_SERDES = dso_local local_unnamed_addr global i32 0, align 4 @AR_PCIE_SERDES2 = dso_local local_unnamed_addr global i32 0, align 4 @AR_PCIE_PM_CTRL = dso_local local_unnamed_addr global i32 0, align 4 @AR_PCIE_PM_CTRL_ENA = dso_local local_unnamed_addr global i32 0, align 4 @AR_WA = dso_local local_unnamed_addr global i32 0, align 4 @AR_WA_D3_L1_DISABLE = dso_local local_unnamed_addr global i32 0, align 4 @AR9285_WA_DEFAULT = dso_local local_unnamed_addr global i32 0, align 4 @AR9280_WA_DEFAULT = dso_local local_unnamed_addr global i32 0, align 4 @AR_WA_BIT6 = dso_local local_unnamed_addr global i32 0, align 4 @AR_WA_BIT7 = dso_local local_unnamed_addr global i32 0, align 4 @AR_WA_BIT22 = dso_local local_unnamed_addr global i32 0, align 4 @AR_WA_BIT23 = dso_local local_unnamed_addr global i32 0, align 4 @AR_WA_DEFAULT = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @ar9002_hw_configpcipowersave], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @ar9002_hw_configpcipowersave(ptr noundef %0, i32 noundef %1) #0 { %3 = icmp eq i32 %1, 0 br i1 %3, label %4, label %42 4: ; preds = %2 %5 = tail call i64 @AR_SREV_9280_20_OR_LATER(ptr noundef %0) #2 %6 = icmp eq i64 %5, 0 br i1 %6, label %19, label %7 7: ; preds = %4 %8 = getelementptr inbounds %struct.ath_hw, ptr %0, i64 0, i32 1 %9 = load i64, ptr %8, align 8, !tbaa !5 %10 = icmp sgt i64 %9, 0 br i1 %10, label %11, label %112 11: ; preds = %7, %11 %12 = phi i64 [ %16, %11 ], [ 0, %7 ] %13 = tail call i32 @INI_RA(ptr noundef nonnull %8, i64 noundef %12, i32 noundef 0) #2 %14 = tail call i32 @INI_RA(ptr noundef nonnull %8, i64 noundef %12, i32 noundef 1) #2 %15 = tail call i32 @REG_WRITE(ptr noundef nonnull %0, i32 noundef %13, i32 noundef %14) #2 %16 = add nuw nsw i64 %12, 1 %17 = load i64, ptr %8, align 8, !tbaa !5 %18 = icmp slt i64 %16, %17 br i1 %18, label %11, label %112, !llvm.loop !13 19: ; preds = %4 %20 = tail call i32 @ENABLE_REGWRITE_BUFFER(ptr noundef %0) #2 %21 = load i32, ptr @AR_PCIE_SERDES, align 4, !tbaa !15 %22 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %21, i32 noundef -1840710656) #2 %23 = load i32, ptr @AR_PCIE_SERDES, align 4, !tbaa !15 %24 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %23, i32 noundef 613566756) #2 %25 = load i32, ptr @AR_PCIE_SERDES, align 4, !tbaa !15 %26 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %25, i32 noundef 671088697) #2 %27 = load i32, ptr @AR_PCIE_SERDES, align 4, !tbaa !15 %28 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %27, i32 noundef 1393952804) #2 %29 = load i32, ptr @AR_PCIE_SERDES, align 4, !tbaa !15 %30 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %29, i32 noundef -443021959) #2 %31 = load i32, ptr @AR_PCIE_SERDES, align 4, !tbaa !15 %32 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %31, i32 noundef 1961983) #2 %33 = load i32, ptr @AR_PCIE_SERDES, align 4, !tbaa !15 %34 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %33, i32 noundef 447397440) #2 %35 = load i32, ptr @AR_PCIE_SERDES, align 4, !tbaa !15 %36 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %35, i32 noundef -1106225836) #2 %37 = load i32, ptr @AR_PCIE_SERDES, align 4, !tbaa !15 %38 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %37, i32 noundef 929799) #2 %39 = load i32, ptr @AR_PCIE_SERDES2, align 4, !tbaa !15 %40 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %39, i32 noundef 0) #2 %41 = tail call i32 @REGWRITE_BUFFER_FLUSH(ptr noundef %0) #2 br label %112 42: ; preds = %2 %43 = load i32, ptr @AR_PCIE_PM_CTRL, align 4, !tbaa !15 %44 = load i32, ptr @AR_PCIE_PM_CTRL_ENA, align 4, !tbaa !15 %45 = tail call i32 @REG_CLR_BIT(ptr noundef %0, i32 noundef %43, i32 noundef %44) #2 %46 = load i32, ptr @AR_WA, align 4, !tbaa !15 %47 = tail call i32 @REG_READ(ptr noundef %0, i32 noundef %46) #2 %48 = load i32, ptr %0, align 8, !tbaa !16 %49 = icmp eq i32 %48, 0 br i1 %49, label %56, label %50 50: ; preds = %42 %51 = load i32, ptr @AR_WA_D3_L1_DISABLE, align 4, !tbaa !15 %52 = and i32 %51, %48 %53 = icmp eq i32 %52, 0 %54 = select i1 %53, i32 0, i32 %51 %55 = or i32 %54, %47 br label %82 56: ; preds = %42 %57 = tail call i64 @AR_SREV_9285(ptr noundef nonnull %0) #2 %58 = icmp eq i64 %57, 0 br i1 %58, label %59, label %65 59: ; preds = %56 %60 = tail call i64 @AR_SREV_9271(ptr noundef nonnull %0) #2 %61 = icmp eq i64 %60, 0 br i1 %61, label %62, label %65 62: ; preds = %59 %63 = tail call i64 @AR_SREV_9287(ptr noundef nonnull %0) #2 %64 = icmp eq i64 %63, 0 br i1 %64, label %72, label %65 65: ; preds = %62, %59, %56 %66 = load i32, ptr @AR9285_WA_DEFAULT, align 4, !tbaa !15 %67 = load i32, ptr @AR_WA_D3_L1_DISABLE, align 4, !tbaa !15 %68 = and i32 %67, %66 %69 = icmp eq i32 %68, 0 %70 = select i1 %69, i32 0, i32 %67 %71 = or i32 %70, %47 br label %82 72: ; preds = %62 %73 = tail call i64 @AR_SREV_9280(ptr noundef nonnull %0) #2 %74 = icmp eq i64 %73, 0 br i1 %74, label %82, label %75 75: ; preds = %72 %76 = load i32, ptr @AR9280_WA_DEFAULT, align 4, !tbaa !15 %77 = load i32, ptr @AR_WA_D3_L1_DISABLE, align 4, !tbaa !15 %78 = and i32 %77, %76 %79 = icmp eq i32 %78, 0 %80 = select i1 %79, i32 0, i32 %77 %81 = or i32 %80, %47 br label %82 82: ; preds = %75, %65, %50, %72 %83 = phi i32 [ %47, %72 ], [ %55, %50 ], [ %71, %65 ], [ %81, %75 ] %84 = tail call i64 @AR_SREV_9280(ptr noundef nonnull %0) #2 %85 = icmp eq i64 %84, 0 br i1 %85, label %86, label %92 86: ; preds = %82 %87 = tail call i64 @AR_SREV_9285(ptr noundef nonnull %0) #2 %88 = icmp eq i64 %87, 0 br i1 %88, label %89, label %92 89: ; preds = %86 %90 = tail call i64 @AR_SREV_9287(ptr noundef nonnull %0) #2 %91 = icmp eq i64 %90, 0 br i1 %91, label %98, label %92 92: ; preds = %89, %86, %82 %93 = load i32, ptr @AR_WA_BIT6, align 4, !tbaa !15 %94 = load i32, ptr @AR_WA_BIT7, align 4, !tbaa !15 %95 = or i32 %94, %93 %96 = xor i32 %95, -1 %97 = and i32 %83, %96 br label %98 98: ; preds = %92, %89 %99 = phi i32 [ %97, %92 ], [ %83, %89 ] %100 = tail call i64 @AR_SREV_9280(ptr noundef nonnull %0) #2 %101 = icmp eq i64 %100, 0 %102 = load i32, ptr @AR_WA_BIT22, align 4 %103 = select i1 %101, i32 0, i32 %102 %104 = or i32 %103, %99 %105 = tail call i64 @AR_SREV_9285E_20(ptr noundef nonnull %0) #2 %106 = icmp eq i64 %105, 0 %107 = load i32, ptr @AR_WA_BIT23, align 4 %108 = select i1 %106, i32 0, i32 %107 %109 = or i32 %104, %108 %110 = load i32, ptr @AR_WA, align 4, !tbaa !15 %111 = tail call i32 @REG_WRITE(ptr noundef nonnull %0, i32 noundef %110, i32 noundef %109) #2 br label %168 112: ; preds = %11, %7, %19 %113 = tail call i32 @udelay(i32 noundef 1000) #2 %114 = load i32, ptr %0, align 8, !tbaa !16 %115 = icmp eq i32 %114, 0 br i1 %115, label %120, label %116 116: ; preds = %112 %117 = load i32, ptr @AR_WA_D3_L1_DISABLE, align 4, !tbaa !15 %118 = xor i32 %117, -1 %119 = and i32 %114, %118 br label %144 120: ; preds = %112 %121 = tail call i64 @AR_SREV_9285(ptr noundef nonnull %0) #2 %122 = icmp eq i64 %121, 0 br i1 %122, label %123, label %129 123: ; preds = %120 %124 = tail call i64 @AR_SREV_9271(ptr noundef nonnull %0) #2 %125 = icmp eq i64 %124, 0 br i1 %125, label %126, label %129 126: ; preds = %123 %127 = tail call i64 @AR_SREV_9287(ptr noundef nonnull %0) #2 %128 = icmp eq i64 %127, 0 br i1 %128, label %134, label %129 129: ; preds = %126, %123, %120 %130 = load i32, ptr @AR9285_WA_DEFAULT, align 4, !tbaa !15 %131 = load i32, ptr @AR_WA_D3_L1_DISABLE, align 4, !tbaa !15 %132 = xor i32 %131, -1 %133 = and i32 %130, %132 br label %144 134: ; preds = %126 %135 = tail call i64 @AR_SREV_9280(ptr noundef nonnull %0) #2 %136 = icmp eq i64 %135, 0 br i1 %136, label %142, label %137 137: ; preds = %134 %138 = load i32, ptr @AR9280_WA_DEFAULT, align 4, !tbaa !15 %139 = load i32, ptr @AR_WA_D3_L1_DISABLE, align 4, !tbaa !15 %140 = xor i32 %139, -1 %141 = and i32 %138, %140 br label %144 142: ; preds = %134 %143 = load i32, ptr @AR_WA_DEFAULT, align 4, !tbaa !15 br label %144 144: ; preds = %129, %142, %137, %116 %145 = phi i32 [ %119, %116 ], [ %133, %129 ], [ %141, %137 ], [ %143, %142 ] %146 = tail call i64 @AR_SREV_9285(ptr noundef nonnull %0) #2 %147 = icmp eq i64 %146, 0 br i1 %147, label %148, label %151 148: ; preds = %144 %149 = tail call i64 @AR_SREV_9287(ptr noundef nonnull %0) #2 %150 = icmp eq i64 %149, 0 br i1 %150, label %156, label %151 151: ; preds = %148, %144 %152 = load i32, ptr @AR_WA_BIT6, align 4, !tbaa !15 %153 = load i32, ptr @AR_WA_BIT7, align 4, !tbaa !15 %154 = or i32 %152, %153 %155 = or i32 %154, %145 br label %156 156: ; preds = %151, %148 %157 = phi i32 [ %155, %151 ], [ %145, %148 ] %158 = tail call i64 @AR_SREV_9285E_20(ptr noundef nonnull %0) #2 %159 = icmp eq i64 %158, 0 %160 = load i32, ptr @AR_WA_BIT23, align 4 %161 = select i1 %159, i32 0, i32 %160 %162 = or i32 %161, %157 %163 = load i32, ptr @AR_WA, align 4, !tbaa !15 %164 = tail call i32 @REG_WRITE(ptr noundef nonnull %0, i32 noundef %163, i32 noundef %162) #2 %165 = load i32, ptr @AR_PCIE_PM_CTRL, align 4, !tbaa !15 %166 = load i32, ptr @AR_PCIE_PM_CTRL_ENA, align 4, !tbaa !15 %167 = tail call i32 @REG_SET_BIT(ptr noundef nonnull %0, i32 noundef %165, i32 noundef %166) #2 br label %168 168: ; preds = %156, %98 ret void } declare i64 @AR_SREV_9280_20_OR_LATER(ptr noundef) local_unnamed_addr #1 declare i32 @REG_WRITE(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @INI_RA(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ENABLE_REGWRITE_BUFFER(ptr noundef) local_unnamed_addr #1 declare i32 @REGWRITE_BUFFER_FLUSH(ptr noundef) local_unnamed_addr #1 declare i32 @udelay(i32 noundef) local_unnamed_addr #1 declare i32 @REG_CLR_BIT(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @REG_READ(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i64 @AR_SREV_9285(ptr noundef) local_unnamed_addr #1 declare i64 @AR_SREV_9271(ptr noundef) local_unnamed_addr #1 declare i64 @AR_SREV_9287(ptr noundef) local_unnamed_addr #1 declare i64 @AR_SREV_9280(ptr noundef) local_unnamed_addr #1 declare i64 @AR_SREV_9285E_20(ptr noundef) local_unnamed_addr #1 declare i32 @REG_SET_BIT(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !12, i64 8} !6 = !{!"ath_hw", !7, i64 0, !11, i64 8} !7 = !{!"TYPE_3__", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"TYPE_4__", !12, i64 0} !12 = !{!"long", !9, i64 0} !13 = distinct !{!13, !14} !14 = !{!"llvm.loop.mustprogress"} !15 = !{!8, !8, i64 0} !16 = !{!6, !8, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_ar9002_hw.c_ar9002_hw_configpcipowersave.c' source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_ar9002_hw.c_ar9002_hw_configpcipowersave.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @AR_PCIE_SERDES = common local_unnamed_addr global i32 0, align 4 @AR_PCIE_SERDES2 = common local_unnamed_addr global i32 0, align 4 @AR_PCIE_PM_CTRL = common local_unnamed_addr global i32 0, align 4 @AR_PCIE_PM_CTRL_ENA = common local_unnamed_addr global i32 0, align 4 @AR_WA = common local_unnamed_addr global i32 0, align 4 @AR_WA_D3_L1_DISABLE = common local_unnamed_addr global i32 0, align 4 @AR9285_WA_DEFAULT = common local_unnamed_addr global i32 0, align 4 @AR9280_WA_DEFAULT = common local_unnamed_addr global i32 0, align 4 @AR_WA_BIT6 = common local_unnamed_addr global i32 0, align 4 @AR_WA_BIT7 = common local_unnamed_addr global i32 0, align 4 @AR_WA_BIT22 = common local_unnamed_addr global i32 0, align 4 @AR_WA_BIT23 = common local_unnamed_addr global i32 0, align 4 @AR_WA_DEFAULT = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @ar9002_hw_configpcipowersave], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @ar9002_hw_configpcipowersave(ptr noundef %0, i32 noundef %1) #0 { %3 = icmp eq i32 %1, 0 br i1 %3, label %4, label %42 4: ; preds = %2 %5 = tail call i64 @AR_SREV_9280_20_OR_LATER(ptr noundef %0) #2 %6 = icmp eq i64 %5, 0 br i1 %6, label %19, label %7 7: ; preds = %4 %8 = getelementptr inbounds i8, ptr %0, i64 8 %9 = load i64, ptr %8, align 8, !tbaa !6 %10 = icmp sgt i64 %9, 0 br i1 %10, label %11, label %112 11: ; preds = %7, %11 %12 = phi i64 [ %16, %11 ], [ 0, %7 ] %13 = tail call i32 @INI_RA(ptr noundef nonnull %8, i64 noundef %12, i32 noundef 0) #2 %14 = tail call i32 @INI_RA(ptr noundef nonnull %8, i64 noundef %12, i32 noundef 1) #2 %15 = tail call i32 @REG_WRITE(ptr noundef nonnull %0, i32 noundef %13, i32 noundef %14) #2 %16 = add nuw nsw i64 %12, 1 %17 = load i64, ptr %8, align 8, !tbaa !6 %18 = icmp slt i64 %16, %17 br i1 %18, label %11, label %112, !llvm.loop !14 19: ; preds = %4 %20 = tail call i32 @ENABLE_REGWRITE_BUFFER(ptr noundef %0) #2 %21 = load i32, ptr @AR_PCIE_SERDES, align 4, !tbaa !16 %22 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %21, i32 noundef -1840710656) #2 %23 = load i32, ptr @AR_PCIE_SERDES, align 4, !tbaa !16 %24 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %23, i32 noundef 613566756) #2 %25 = load i32, ptr @AR_PCIE_SERDES, align 4, !tbaa !16 %26 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %25, i32 noundef 671088697) #2 %27 = load i32, ptr @AR_PCIE_SERDES, align 4, !tbaa !16 %28 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %27, i32 noundef 1393952804) #2 %29 = load i32, ptr @AR_PCIE_SERDES, align 4, !tbaa !16 %30 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %29, i32 noundef -443021959) #2 %31 = load i32, ptr @AR_PCIE_SERDES, align 4, !tbaa !16 %32 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %31, i32 noundef 1961983) #2 %33 = load i32, ptr @AR_PCIE_SERDES, align 4, !tbaa !16 %34 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %33, i32 noundef 447397440) #2 %35 = load i32, ptr @AR_PCIE_SERDES, align 4, !tbaa !16 %36 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %35, i32 noundef -1106225836) #2 %37 = load i32, ptr @AR_PCIE_SERDES, align 4, !tbaa !16 %38 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %37, i32 noundef 929799) #2 %39 = load i32, ptr @AR_PCIE_SERDES2, align 4, !tbaa !16 %40 = tail call i32 @REG_WRITE(ptr noundef %0, i32 noundef %39, i32 noundef 0) #2 %41 = tail call i32 @REGWRITE_BUFFER_FLUSH(ptr noundef %0) #2 br label %112 42: ; preds = %2 %43 = load i32, ptr @AR_PCIE_PM_CTRL, align 4, !tbaa !16 %44 = load i32, ptr @AR_PCIE_PM_CTRL_ENA, align 4, !tbaa !16 %45 = tail call i32 @REG_CLR_BIT(ptr noundef %0, i32 noundef %43, i32 noundef %44) #2 %46 = load i32, ptr @AR_WA, align 4, !tbaa !16 %47 = tail call i32 @REG_READ(ptr noundef %0, i32 noundef %46) #2 %48 = load i32, ptr %0, align 8, !tbaa !17 %49 = icmp eq i32 %48, 0 br i1 %49, label %56, label %50 50: ; preds = %42 %51 = load i32, ptr @AR_WA_D3_L1_DISABLE, align 4, !tbaa !16 %52 = and i32 %51, %48 %53 = icmp eq i32 %52, 0 %54 = select i1 %53, i32 0, i32 %51 %55 = or i32 %54, %47 br label %82 56: ; preds = %42 %57 = tail call i64 @AR_SREV_9285(ptr noundef nonnull %0) #2 %58 = icmp eq i64 %57, 0 br i1 %58, label %59, label %65 59: ; preds = %56 %60 = tail call i64 @AR_SREV_9271(ptr noundef nonnull %0) #2 %61 = icmp eq i64 %60, 0 br i1 %61, label %62, label %65 62: ; preds = %59 %63 = tail call i64 @AR_SREV_9287(ptr noundef nonnull %0) #2 %64 = icmp eq i64 %63, 0 br i1 %64, label %72, label %65 65: ; preds = %62, %59, %56 %66 = load i32, ptr @AR9285_WA_DEFAULT, align 4, !tbaa !16 %67 = load i32, ptr @AR_WA_D3_L1_DISABLE, align 4, !tbaa !16 %68 = and i32 %67, %66 %69 = icmp eq i32 %68, 0 %70 = select i1 %69, i32 0, i32 %67 %71 = or i32 %70, %47 br label %82 72: ; preds = %62 %73 = tail call i64 @AR_SREV_9280(ptr noundef nonnull %0) #2 %74 = icmp eq i64 %73, 0 br i1 %74, label %82, label %75 75: ; preds = %72 %76 = load i32, ptr @AR9280_WA_DEFAULT, align 4, !tbaa !16 %77 = load i32, ptr @AR_WA_D3_L1_DISABLE, align 4, !tbaa !16 %78 = and i32 %77, %76 %79 = icmp eq i32 %78, 0 %80 = select i1 %79, i32 0, i32 %77 %81 = or i32 %80, %47 br label %82 82: ; preds = %75, %65, %50, %72 %83 = phi i32 [ %47, %72 ], [ %55, %50 ], [ %71, %65 ], [ %81, %75 ] %84 = tail call i64 @AR_SREV_9280(ptr noundef nonnull %0) #2 %85 = icmp eq i64 %84, 0 br i1 %85, label %86, label %92 86: ; preds = %82 %87 = tail call i64 @AR_SREV_9285(ptr noundef nonnull %0) #2 %88 = icmp eq i64 %87, 0 br i1 %88, label %89, label %92 89: ; preds = %86 %90 = tail call i64 @AR_SREV_9287(ptr noundef nonnull %0) #2 %91 = icmp eq i64 %90, 0 br i1 %91, label %98, label %92 92: ; preds = %89, %86, %82 %93 = load i32, ptr @AR_WA_BIT6, align 4, !tbaa !16 %94 = load i32, ptr @AR_WA_BIT7, align 4, !tbaa !16 %95 = or i32 %94, %93 %96 = xor i32 %95, -1 %97 = and i32 %83, %96 br label %98 98: ; preds = %92, %89 %99 = phi i32 [ %97, %92 ], [ %83, %89 ] %100 = tail call i64 @AR_SREV_9280(ptr noundef nonnull %0) #2 %101 = icmp eq i64 %100, 0 %102 = load i32, ptr @AR_WA_BIT22, align 4 %103 = select i1 %101, i32 0, i32 %102 %104 = or i32 %103, %99 %105 = tail call i64 @AR_SREV_9285E_20(ptr noundef nonnull %0) #2 %106 = icmp eq i64 %105, 0 %107 = load i32, ptr @AR_WA_BIT23, align 4 %108 = select i1 %106, i32 0, i32 %107 %109 = or i32 %104, %108 %110 = load i32, ptr @AR_WA, align 4, !tbaa !16 %111 = tail call i32 @REG_WRITE(ptr noundef nonnull %0, i32 noundef %110, i32 noundef %109) #2 br label %168 112: ; preds = %11, %7, %19 %113 = tail call i32 @udelay(i32 noundef 1000) #2 %114 = load i32, ptr %0, align 8, !tbaa !17 %115 = icmp eq i32 %114, 0 br i1 %115, label %120, label %116 116: ; preds = %112 %117 = load i32, ptr @AR_WA_D3_L1_DISABLE, align 4, !tbaa !16 %118 = xor i32 %117, -1 %119 = and i32 %114, %118 br label %144 120: ; preds = %112 %121 = tail call i64 @AR_SREV_9285(ptr noundef nonnull %0) #2 %122 = icmp eq i64 %121, 0 br i1 %122, label %123, label %129 123: ; preds = %120 %124 = tail call i64 @AR_SREV_9271(ptr noundef nonnull %0) #2 %125 = icmp eq i64 %124, 0 br i1 %125, label %126, label %129 126: ; preds = %123 %127 = tail call i64 @AR_SREV_9287(ptr noundef nonnull %0) #2 %128 = icmp eq i64 %127, 0 br i1 %128, label %134, label %129 129: ; preds = %126, %123, %120 %130 = load i32, ptr @AR9285_WA_DEFAULT, align 4, !tbaa !16 %131 = load i32, ptr @AR_WA_D3_L1_DISABLE, align 4, !tbaa !16 %132 = xor i32 %131, -1 %133 = and i32 %130, %132 br label %144 134: ; preds = %126 %135 = tail call i64 @AR_SREV_9280(ptr noundef nonnull %0) #2 %136 = icmp eq i64 %135, 0 br i1 %136, label %142, label %137 137: ; preds = %134 %138 = load i32, ptr @AR9280_WA_DEFAULT, align 4, !tbaa !16 %139 = load i32, ptr @AR_WA_D3_L1_DISABLE, align 4, !tbaa !16 %140 = xor i32 %139, -1 %141 = and i32 %138, %140 br label %144 142: ; preds = %134 %143 = load i32, ptr @AR_WA_DEFAULT, align 4, !tbaa !16 br label %144 144: ; preds = %129, %142, %137, %116 %145 = phi i32 [ %119, %116 ], [ %133, %129 ], [ %141, %137 ], [ %143, %142 ] %146 = tail call i64 @AR_SREV_9285(ptr noundef nonnull %0) #2 %147 = icmp eq i64 %146, 0 br i1 %147, label %148, label %151 148: ; preds = %144 %149 = tail call i64 @AR_SREV_9287(ptr noundef nonnull %0) #2 %150 = icmp eq i64 %149, 0 br i1 %150, label %156, label %151 151: ; preds = %148, %144 %152 = load i32, ptr @AR_WA_BIT6, align 4, !tbaa !16 %153 = load i32, ptr @AR_WA_BIT7, align 4, !tbaa !16 %154 = or i32 %152, %153 %155 = or i32 %154, %145 br label %156 156: ; preds = %151, %148 %157 = phi i32 [ %155, %151 ], [ %145, %148 ] %158 = tail call i64 @AR_SREV_9285E_20(ptr noundef nonnull %0) #2 %159 = icmp eq i64 %158, 0 %160 = load i32, ptr @AR_WA_BIT23, align 4 %161 = select i1 %159, i32 0, i32 %160 %162 = or i32 %161, %157 %163 = load i32, ptr @AR_WA, align 4, !tbaa !16 %164 = tail call i32 @REG_WRITE(ptr noundef nonnull %0, i32 noundef %163, i32 noundef %162) #2 %165 = load i32, ptr @AR_PCIE_PM_CTRL, align 4, !tbaa !16 %166 = load i32, ptr @AR_PCIE_PM_CTRL_ENA, align 4, !tbaa !16 %167 = tail call i32 @REG_SET_BIT(ptr noundef nonnull %0, i32 noundef %165, i32 noundef %166) #2 br label %168 168: ; preds = %156, %98 ret void } declare i64 @AR_SREV_9280_20_OR_LATER(ptr noundef) local_unnamed_addr #1 declare i32 @REG_WRITE(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @INI_RA(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ENABLE_REGWRITE_BUFFER(ptr noundef) local_unnamed_addr #1 declare i32 @REGWRITE_BUFFER_FLUSH(ptr noundef) local_unnamed_addr #1 declare i32 @udelay(i32 noundef) local_unnamed_addr #1 declare i32 @REG_CLR_BIT(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @REG_READ(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i64 @AR_SREV_9285(ptr noundef) local_unnamed_addr #1 declare i64 @AR_SREV_9271(ptr noundef) local_unnamed_addr #1 declare i64 @AR_SREV_9287(ptr noundef) local_unnamed_addr #1 declare i64 @AR_SREV_9280(ptr noundef) local_unnamed_addr #1 declare i64 @AR_SREV_9285E_20(ptr noundef) local_unnamed_addr #1 declare i32 @REG_SET_BIT(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !13, i64 8} !7 = !{!"ath_hw", !8, i64 0, !12, i64 8} !8 = !{!"TYPE_3__", !9, i64 0} !9 = !{!"int", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"} !12 = !{!"TYPE_4__", !13, i64 0} !13 = !{!"long", !10, i64 0} !14 = distinct !{!14, !15} !15 = !{!"llvm.loop.mustprogress"} !16 = !{!9, !9, i64 0} !17 = !{!7, !9, i64 0}
linux_drivers_net_wireless_ath_ath9k_extr_ar9002_hw.c_ar9002_hw_configpcipowersave
; ModuleID = 'AnghaBench/TDengine/deps/iconv/extr_iso2022_jp3.h_iso2022_jp3_wctomb.c' source_filename = "AnghaBench/TDengine/deps/iconv/extr_iso2022_jp3.h_iso2022_jp3_wctomb.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_8__ = type { i32, i32 } @SPLIT_STATE = dso_local local_unnamed_addr global i32 0, align 4 @lasttwo = dso_local local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table02e5_idx = dso_local local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table02e5_len = dso_local local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table02e9_idx = dso_local local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table02e9_len = dso_local local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table0300_idx = dso_local local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table0300_len = dso_local local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table0301_idx = dso_local local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table0301_len = dso_local local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table309a_idx = dso_local local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table309a_len = dso_local local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table_data = dso_local local_unnamed_addr global ptr null, align 8 @STATE_JISX02131 = dso_local local_unnamed_addr global i64 0, align 8 @RET_TOOSMALL = dso_local local_unnamed_addr global i32 0, align 4 @ESC = dso_local local_unnamed_addr global i8 0, align 1 @COMBINE_STATE_NO_LASTTWO = dso_local local_unnamed_addr global i32 0, align 4 @prevstate = dso_local local_unnamed_addr global i64 0, align 8 @STATE_JISX0208 = dso_local local_unnamed_addr global i64 0, align 8 @RET_ILUNI = dso_local local_unnamed_addr global i32 0, align 4 @STATE_ASCII = dso_local local_unnamed_addr global i64 0, align 8 @STATE_JISX0201ROMAN = dso_local local_unnamed_addr global i64 0, align 8 @COMBINE_STATE = dso_local local_unnamed_addr global i32 0, align 4 @STATE_JISX02132 = dso_local local_unnamed_addr global i64 0, align 8 @STATE_JISX0201KATAKANA = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @iso2022_jp3_wctomb], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @iso2022_jp3_wctomb(ptr noundef %0, ptr nocapture noundef writeonly %1, i32 noundef %2, i32 noundef %3) #0 { %5 = alloca [2 x i8], align 1 call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %5) #4 %6 = load i64, ptr %0, align 8, !tbaa !5 %7 = load i32, ptr @lasttwo, align 4, !tbaa !10 %8 = icmp eq i32 %7, 0 br i1 %8, label %88, label %9 9: ; preds = %4 switch i32 %2, label %60 [ i32 741, label %14 i32 745, label %10 i32 768, label %11 i32 769, label %12 i32 12442, label %13 ] 10: ; preds = %9 br label %14 11: ; preds = %9 br label %14 12: ; preds = %9 br label %14 13: ; preds = %9 br label %14 14: ; preds = %9, %10, %12, %13, %11 %15 = phi ptr [ @iso2022_jp3_comp_table02e9_idx, %10 ], [ @iso2022_jp3_comp_table0300_idx, %11 ], [ @iso2022_jp3_comp_table0301_idx, %12 ], [ @iso2022_jp3_comp_table309a_idx, %13 ], [ @iso2022_jp3_comp_table02e5_idx, %9 ] %16 = phi ptr [ @iso2022_jp3_comp_table02e9_len, %10 ], [ @iso2022_jp3_comp_table0300_len, %11 ], [ @iso2022_jp3_comp_table0301_len, %12 ], [ @iso2022_jp3_comp_table309a_len, %13 ], [ @iso2022_jp3_comp_table02e5_len, %9 ] %17 = load i32, ptr %16, align 4, !tbaa !10 %18 = load i32, ptr %15, align 4, !tbaa !10 %19 = load ptr, ptr @iso2022_jp3_comp_table_data, align 8, !tbaa !12 br label %20 20: ; preds = %27, %14 %21 = phi i32 [ %18, %14 ], [ %28, %27 ] %22 = phi i32 [ %17, %14 ], [ %29, %27 ] %23 = zext i32 %21 to i64 %24 = getelementptr inbounds %struct.TYPE_8__, ptr %19, i64 %23 %25 = load i32, ptr %24, align 4, !tbaa !14 %26 = icmp eq i32 %25, %7 br i1 %26, label %31, label %27 27: ; preds = %20 %28 = add i32 %21, 1 %29 = add i32 %22, -1 %30 = icmp eq i32 %29, 0 br i1 %30, label %60, label %20, !llvm.loop !16 31: ; preds = %20 %32 = icmp eq i32 %22, 0 br i1 %32, label %60, label %33 33: ; preds = %31 %34 = load i64, ptr @STATE_JISX02131, align 8, !tbaa !18 %35 = icmp eq i64 %6, %34 %36 = select i1 %35, i32 2, i32 6 %37 = icmp sgt i32 %36, %3 br i1 %37, label %38, label %40 38: ; preds = %33 %39 = load i32, ptr @RET_TOOSMALL, align 4, !tbaa !10 br label %275 40: ; preds = %33 br i1 %35, label %49, label %41 41: ; preds = %40 %42 = load i8, ptr @ESC, align 1, !tbaa !19 store i8 %42, ptr %1, align 1, !tbaa !19 %43 = getelementptr inbounds i8, ptr %1, i64 1 store i8 36, ptr %43, align 1, !tbaa !19 %44 = getelementptr inbounds i8, ptr %1, i64 2 store i8 40, ptr %44, align 1, !tbaa !19 %45 = getelementptr inbounds i8, ptr %1, i64 3 store i8 81, ptr %45, align 1, !tbaa !19 %46 = getelementptr inbounds i8, ptr %1, i64 4 %47 = load i64, ptr @STATE_JISX02131, align 8, !tbaa !18 %48 = load ptr, ptr @iso2022_jp3_comp_table_data, align 8, !tbaa !12 br label %49 49: ; preds = %41, %40 %50 = phi ptr [ %48, %41 ], [ %19, %40 ] %51 = phi ptr [ %46, %41 ], [ %1, %40 ] %52 = phi i64 [ %47, %41 ], [ %6, %40 ] %53 = getelementptr inbounds %struct.TYPE_8__, ptr %50, i64 %23, i32 1 %54 = load i32, ptr %53, align 4, !tbaa !20 store i32 %54, ptr @lasttwo, align 4, !tbaa !10 %55 = lshr i32 %54, 8 %56 = trunc i32 %55 to i8 store i8 %56, ptr %51, align 1, !tbaa !19 %57 = load i32, ptr @lasttwo, align 4, !tbaa !10 %58 = trunc i32 %57 to i8 %59 = getelementptr inbounds i8, ptr %51, i64 1 store i8 %58, ptr %59, align 1, !tbaa !19 store i64 %52, ptr %0, align 8, !tbaa !5 br label %275 60: ; preds = %27, %9, %31 %61 = load i64, ptr @prevstate, align 8, !tbaa !18 %62 = icmp eq i64 %61, %6 %63 = select i1 %62, i32 2, i32 5 %64 = icmp sgt i32 %63, %3 br i1 %64, label %65, label %67 65: ; preds = %60 %66 = load i32, ptr @RET_TOOSMALL, align 4, !tbaa !10 br label %275 67: ; preds = %60 br i1 %62, label %79, label %68 68: ; preds = %67 %69 = load i64, ptr @STATE_JISX0208, align 8, !tbaa !18 %70 = icmp eq i64 %6, %69 br i1 %70, label %73, label %71 71: ; preds = %68 %72 = tail call i32 (...) @abort() #5 unreachable 73: ; preds = %68 %74 = load i8, ptr @ESC, align 1, !tbaa !19 store i8 %74, ptr %1, align 1, !tbaa !19 %75 = getelementptr inbounds i8, ptr %1, i64 1 store i8 36, ptr %75, align 1, !tbaa !19 %76 = getelementptr inbounds i8, ptr %1, i64 2 store i8 66, ptr %76, align 1, !tbaa !19 %77 = getelementptr inbounds i8, ptr %1, i64 3 %78 = load i32, ptr @lasttwo, align 4, !tbaa !10 br label %79 79: ; preds = %67, %73 %80 = phi i32 [ %78, %73 ], [ %7, %67 ] %81 = phi ptr [ %77, %73 ], [ %1, %67 ] %82 = lshr i32 %80, 8 %83 = trunc i32 %82 to i8 store i8 %83, ptr %81, align 1, !tbaa !19 %84 = load i32, ptr @lasttwo, align 4, !tbaa !10 %85 = trunc i32 %84 to i8 %86 = getelementptr inbounds i8, ptr %81, i64 1 store i8 %85, ptr %86, align 1, !tbaa !19 %87 = getelementptr inbounds i8, ptr %81, i64 2 br label %88 88: ; preds = %79, %4 %89 = phi ptr [ %87, %79 ], [ %1, %4 ] %90 = phi i32 [ %63, %79 ], [ 0, %4 ] %91 = call i32 @ascii_wctomb(ptr noundef nonnull %0, ptr noundef nonnull %5, i32 noundef %2, i32 noundef 1) #4 %92 = load i32, ptr @RET_ILUNI, align 4, !tbaa !10 %93 = icmp eq i32 %91, %92 br i1 %93, label %119, label %94 94: ; preds = %88 %95 = icmp eq i32 %91, 1 br i1 %95, label %98, label %96 96: ; preds = %94 %97 = call i32 (...) @abort() #5 unreachable 98: ; preds = %94 %99 = load i8, ptr %5, align 1, !tbaa !19 %100 = icmp sgt i8 %99, -1 br i1 %100, label %101, label %119 101: ; preds = %98 %102 = load i64, ptr @STATE_ASCII, align 8, !tbaa !18 %103 = icmp eq i64 %6, %102 %104 = select i1 %103, i32 1, i32 4 %105 = add nuw nsw i32 %104, %90 %106 = icmp sgt i32 %105, %3 br i1 %106, label %107, label %109 107: ; preds = %101 %108 = load i32, ptr @RET_TOOSMALL, align 4, !tbaa !10 br label %275 109: ; preds = %101 br i1 %103, label %116, label %110 110: ; preds = %109 %111 = load i8, ptr @ESC, align 1, !tbaa !19 store i8 %111, ptr %89, align 1, !tbaa !19 %112 = getelementptr inbounds i8, ptr %89, i64 1 store i8 40, ptr %112, align 1, !tbaa !19 %113 = getelementptr inbounds i8, ptr %89, i64 2 store i8 66, ptr %113, align 1, !tbaa !19 %114 = getelementptr inbounds i8, ptr %89, i64 3 %115 = load i64, ptr @STATE_ASCII, align 8, !tbaa !18 br label %116 116: ; preds = %110, %109 %117 = phi ptr [ %114, %110 ], [ %89, %109 ] %118 = phi i64 [ %115, %110 ], [ %6, %109 ] store i8 %99, ptr %117, align 1, !tbaa !19 store i64 %118, ptr %0, align 8, !tbaa !5 br label %275 119: ; preds = %98, %88 %120 = call i32 @jisx0201_wctomb(ptr noundef nonnull %0, ptr noundef nonnull %5, i32 noundef %2, i32 noundef 1) #4 %121 = load i32, ptr @RET_ILUNI, align 4, !tbaa !10 %122 = icmp eq i32 %120, %121 br i1 %122, label %148, label %123 123: ; preds = %119 %124 = icmp eq i32 %120, 1 br i1 %124, label %127, label %125 125: ; preds = %123 %126 = call i32 (...) @abort() #5 unreachable 127: ; preds = %123 %128 = load i8, ptr %5, align 1, !tbaa !19 %129 = icmp sgt i8 %128, -1 br i1 %129, label %130, label %148 130: ; preds = %127 %131 = load i64, ptr @STATE_JISX0201ROMAN, align 8, !tbaa !18 %132 = icmp eq i64 %6, %131 %133 = select i1 %132, i32 1, i32 4 %134 = add nuw nsw i32 %133, %90 %135 = icmp sgt i32 %134, %3 br i1 %135, label %136, label %138 136: ; preds = %130 %137 = load i32, ptr @RET_TOOSMALL, align 4, !tbaa !10 br label %275 138: ; preds = %130 br i1 %132, label %145, label %139 139: ; preds = %138 %140 = load i8, ptr @ESC, align 1, !tbaa !19 store i8 %140, ptr %89, align 1, !tbaa !19 %141 = getelementptr inbounds i8, ptr %89, i64 1 store i8 40, ptr %141, align 1, !tbaa !19 %142 = getelementptr inbounds i8, ptr %89, i64 2 store i8 74, ptr %142, align 1, !tbaa !19 %143 = getelementptr inbounds i8, ptr %89, i64 3 %144 = load i64, ptr @STATE_JISX0201ROMAN, align 8, !tbaa !18 br label %145 145: ; preds = %139, %138 %146 = phi ptr [ %143, %139 ], [ %89, %138 ] %147 = phi i64 [ %144, %139 ], [ %6, %138 ] store i8 %128, ptr %146, align 1, !tbaa !19 store i64 %147, ptr %0, align 8, !tbaa !5 br label %275 148: ; preds = %127, %119 %149 = call zeroext i16 @ucs4_to_jisx0213(i32 noundef %2) #4 %150 = call i32 @jisx0208_wctomb(ptr noundef nonnull %0, ptr noundef nonnull %5, i32 noundef %2, i32 noundef 2) #4 %151 = load i32, ptr @RET_ILUNI, align 4, !tbaa !10 %152 = icmp eq i32 %150, %151 br i1 %152, label %191, label %153 153: ; preds = %148 %154 = icmp eq i32 %150, 2 br i1 %154, label %157, label %155 155: ; preds = %153 %156 = call i32 (...) @abort() #5 unreachable 157: ; preds = %153 %158 = load i8, ptr %5, align 1, !tbaa !19 %159 = icmp sgt i8 %158, -1 %160 = getelementptr inbounds [2 x i8], ptr %5, i64 0, i64 1 %161 = load i8, ptr %160, align 1 %162 = icmp sgt i8 %161, -1 %163 = select i1 %159, i1 %162, i1 false br i1 %163, label %164, label %191 164: ; preds = %157 %165 = zext i16 %149 to i32 %166 = and i32 %165, 128 %167 = icmp eq i32 %166, 0 br i1 %167, label %171, label %168 168: ; preds = %164 store i64 %6, ptr @prevstate, align 8, !tbaa !18 %169 = and i32 %165, 32639 store i32 %169, ptr @lasttwo, align 4, !tbaa !10 %170 = load i64, ptr @STATE_JISX0208, align 8, !tbaa !18 store i64 %170, ptr %0, align 8, !tbaa !5 br label %275 171: ; preds = %164 %172 = load i64, ptr @STATE_JISX0208, align 8, !tbaa !18 %173 = icmp eq i64 %6, %172 %174 = select i1 %173, i32 2, i32 5 %175 = add nuw nsw i32 %174, %90 %176 = icmp sgt i32 %175, %3 br i1 %176, label %177, label %179 177: ; preds = %171 %178 = load i32, ptr @RET_TOOSMALL, align 4, !tbaa !10 br label %275 179: ; preds = %171 br i1 %173, label %186, label %180 180: ; preds = %179 %181 = load i8, ptr @ESC, align 1, !tbaa !19 store i8 %181, ptr %89, align 1, !tbaa !19 %182 = getelementptr inbounds i8, ptr %89, i64 1 store i8 36, ptr %182, align 1, !tbaa !19 %183 = getelementptr inbounds i8, ptr %89, i64 2 store i8 66, ptr %183, align 1, !tbaa !19 %184 = getelementptr inbounds i8, ptr %89, i64 3 %185 = load i64, ptr @STATE_JISX0208, align 8, !tbaa !18 br label %186 186: ; preds = %180, %179 %187 = phi ptr [ %184, %180 ], [ %89, %179 ] %188 = phi i64 [ %185, %180 ], [ %6, %179 ] store i8 %158, ptr %187, align 1, !tbaa !19 %189 = load i8, ptr %160, align 1, !tbaa !19 %190 = getelementptr inbounds i8, ptr %187, i64 1 store i8 %189, ptr %190, align 1, !tbaa !19 store i64 %188, ptr %0, align 8, !tbaa !5 br label %275 191: ; preds = %157, %148 %192 = zext i16 %149 to i32 %193 = icmp eq i16 %149, 0 br i1 %193, label %245, label %194 194: ; preds = %191 %195 = icmp sgt i16 %149, -1 br i1 %195, label %204, label %196 196: ; preds = %194 %197 = load i64, ptr @STATE_JISX02132, align 8, !tbaa !18 %198 = icmp eq i64 %6, %197 br i1 %198, label %222, label %199 199: ; preds = %196 %200 = add nuw nsw i32 %90, 4 %201 = icmp sgt i32 %200, %3 br i1 %201, label %202, label %212 202: ; preds = %199 %203 = load i32, ptr @RET_TOOSMALL, align 4, !tbaa !10 br label %275 204: ; preds = %194 %205 = load i64, ptr @STATE_JISX02131, align 8, !tbaa !18 %206 = icmp eq i64 %6, %205 br i1 %206, label %222, label %207 207: ; preds = %204 %208 = add nuw nsw i32 %90, 4 %209 = icmp sgt i32 %208, %3 br i1 %209, label %210, label %212 210: ; preds = %207 %211 = load i32, ptr @RET_TOOSMALL, align 4, !tbaa !10 br label %275 212: ; preds = %207, %199 %213 = phi i8 [ 80, %199 ], [ 81, %207 ] %214 = phi ptr [ @STATE_JISX02132, %199 ], [ @STATE_JISX02131, %207 ] %215 = phi i32 [ %200, %199 ], [ %208, %207 ] %216 = load i8, ptr @ESC, align 1, !tbaa !19 store i8 %216, ptr %89, align 1, !tbaa !19 %217 = getelementptr inbounds i8, ptr %89, i64 1 store i8 36, ptr %217, align 1, !tbaa !19 %218 = getelementptr inbounds i8, ptr %89, i64 2 store i8 40, ptr %218, align 1, !tbaa !19 %219 = getelementptr inbounds i8, ptr %89, i64 3 store i8 %213, ptr %219, align 1, !tbaa !19 %220 = getelementptr inbounds i8, ptr %89, i64 4 %221 = load i64, ptr %214, align 8, !tbaa !18 br label %222 222: ; preds = %212, %204, %196 %223 = phi ptr [ %89, %196 ], [ %89, %204 ], [ %220, %212 ] %224 = phi i32 [ %90, %196 ], [ %90, %204 ], [ %215, %212 ] %225 = phi i64 [ %6, %196 ], [ %6, %204 ], [ %221, %212 ] %226 = and i32 %192, 128 %227 = icmp eq i32 %226, 0 br i1 %227, label %233, label %228 228: ; preds = %222 br i1 %195, label %231, label %229 229: ; preds = %228 %230 = call i32 (...) @abort() #5 unreachable 231: ; preds = %228 store i64 %225, ptr @prevstate, align 8, !tbaa !18 %232 = and i32 %192, 32639 store i32 %232, ptr @lasttwo, align 4, !tbaa !10 store i64 %225, ptr %0, align 8, !tbaa !5 br label %275 233: ; preds = %222 %234 = add nuw nsw i32 %224, 2 %235 = icmp sgt i32 %234, %3 br i1 %235, label %236, label %238 236: ; preds = %233 %237 = load i32, ptr @RET_TOOSMALL, align 4, !tbaa !10 br label %275 238: ; preds = %233 %239 = lshr i16 %149, 8 %240 = trunc i16 %239 to i8 %241 = and i8 %240, 127 store i8 %241, ptr %223, align 1, !tbaa !19 %242 = trunc i16 %149 to i8 %243 = and i8 %242, 127 %244 = getelementptr inbounds i8, ptr %223, i64 1 store i8 %243, ptr %244, align 1, !tbaa !19 store i64 %225, ptr %0, align 8, !tbaa !5 br label %275 245: ; preds = %191 %246 = call i32 @jisx0201_wctomb(ptr noundef nonnull %0, ptr noundef nonnull %5, i32 noundef %2, i32 noundef 1) #4 %247 = load i32, ptr @RET_ILUNI, align 4, !tbaa !10 %248 = icmp eq i32 %246, %247 br i1 %248, label %275, label %249 249: ; preds = %245 %250 = icmp eq i32 %246, 1 br i1 %250, label %253, label %251 251: ; preds = %249 %252 = call i32 (...) @abort() #5 unreachable 253: ; preds = %249 %254 = load i8, ptr %5, align 1, !tbaa !19 %255 = icmp slt i8 %254, 0 br i1 %255, label %256, label %275 256: ; preds = %253 %257 = load i64, ptr @STATE_JISX0201KATAKANA, align 8, !tbaa !18 %258 = icmp eq i64 %6, %257 %259 = select i1 %258, i32 1, i32 4 %260 = add nuw nsw i32 %259, %90 %261 = icmp sgt i32 %260, %3 br i1 %261, label %262, label %264 262: ; preds = %256 %263 = load i32, ptr @RET_TOOSMALL, align 4, !tbaa !10 br label %275 264: ; preds = %256 br i1 %258, label %271, label %265 265: ; preds = %264 %266 = load i8, ptr @ESC, align 1, !tbaa !19 store i8 %266, ptr %89, align 1, !tbaa !19 %267 = getelementptr inbounds i8, ptr %89, i64 1 store i8 40, ptr %267, align 1, !tbaa !19 %268 = getelementptr inbounds i8, ptr %89, i64 2 store i8 73, ptr %268, align 1, !tbaa !19 %269 = getelementptr inbounds i8, ptr %89, i64 3 %270 = load i64, ptr @STATE_JISX0201KATAKANA, align 8, !tbaa !18 br label %271 271: ; preds = %265, %264 %272 = phi ptr [ %269, %265 ], [ %89, %264 ] %273 = phi i64 [ %270, %265 ], [ %6, %264 ] %274 = and i8 %254, 127 store i8 %274, ptr %272, align 1, !tbaa !19 store i64 %273, ptr %0, align 8, !tbaa !5 br label %275 275: ; preds = %65, %49, %38, %245, %253, %271, %262, %238, %236, %231, %210, %202, %186, %177, %168, %145, %136, %116, %107 %276 = phi i32 [ %108, %107 ], [ %105, %116 ], [ %137, %136 ], [ %134, %145 ], [ %90, %168 ], [ %178, %177 ], [ %175, %186 ], [ %203, %202 ], [ %224, %231 ], [ %237, %236 ], [ %234, %238 ], [ %211, %210 ], [ %263, %262 ], [ %260, %271 ], [ %247, %253 ], [ %246, %245 ], [ %66, %65 ], [ %36, %49 ], [ %39, %38 ] call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %5) #4 ret i32 %276 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: noreturn declare i32 @abort(...) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 declare i32 @ascii_wctomb(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3 declare i32 @jisx0201_wctomb(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3 declare zeroext i16 @ucs4_to_jisx0213(i32 noundef) local_unnamed_addr #3 declare i32 @jisx0208_wctomb(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #4 = { nounwind } attributes #5 = { noreturn nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_7__", !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0} !12 = !{!13, !13, i64 0} !13 = !{!"any pointer", !8, i64 0} !14 = !{!15, !11, i64 0} !15 = !{!"TYPE_8__", !11, i64 0, !11, i64 4} !16 = distinct !{!16, !17} !17 = !{!"llvm.loop.mustprogress"} !18 = !{!7, !7, i64 0} !19 = !{!8, !8, i64 0} !20 = !{!15, !11, i64 4}
; ModuleID = 'AnghaBench/TDengine/deps/iconv/extr_iso2022_jp3.h_iso2022_jp3_wctomb.c' source_filename = "AnghaBench/TDengine/deps/iconv/extr_iso2022_jp3.h_iso2022_jp3_wctomb.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_8__ = type { i32, i32 } @SPLIT_STATE = common local_unnamed_addr global i32 0, align 4 @lasttwo = common local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table02e5_idx = common local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table02e5_len = common local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table02e9_idx = common local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table02e9_len = common local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table0300_idx = common local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table0300_len = common local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table0301_idx = common local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table0301_len = common local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table309a_idx = common local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table309a_len = common local_unnamed_addr global i32 0, align 4 @iso2022_jp3_comp_table_data = common local_unnamed_addr global ptr null, align 8 @STATE_JISX02131 = common local_unnamed_addr global i64 0, align 8 @RET_TOOSMALL = common local_unnamed_addr global i32 0, align 4 @ESC = common local_unnamed_addr global i8 0, align 1 @COMBINE_STATE_NO_LASTTWO = common local_unnamed_addr global i32 0, align 4 @prevstate = common local_unnamed_addr global i64 0, align 8 @STATE_JISX0208 = common local_unnamed_addr global i64 0, align 8 @RET_ILUNI = common local_unnamed_addr global i32 0, align 4 @STATE_ASCII = common local_unnamed_addr global i64 0, align 8 @STATE_JISX0201ROMAN = common local_unnamed_addr global i64 0, align 8 @COMBINE_STATE = common local_unnamed_addr global i32 0, align 4 @STATE_JISX02132 = common local_unnamed_addr global i64 0, align 8 @STATE_JISX0201KATAKANA = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @iso2022_jp3_wctomb], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @iso2022_jp3_wctomb(ptr noundef %0, ptr nocapture noundef writeonly %1, i32 noundef %2, i32 noundef %3) #0 { %5 = alloca [2 x i8], align 1 call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %5) #4 %6 = load i64, ptr %0, align 8, !tbaa !6 %7 = load i32, ptr @lasttwo, align 4, !tbaa !11 %8 = icmp eq i32 %7, 0 br i1 %8, label %88, label %9 9: ; preds = %4 switch i32 %2, label %60 [ i32 741, label %14 i32 745, label %10 i32 768, label %11 i32 769, label %12 i32 12442, label %13 ] 10: ; preds = %9 br label %14 11: ; preds = %9 br label %14 12: ; preds = %9 br label %14 13: ; preds = %9 br label %14 14: ; preds = %9, %10, %12, %13, %11 %15 = phi ptr [ @iso2022_jp3_comp_table02e9_idx, %10 ], [ @iso2022_jp3_comp_table0300_idx, %11 ], [ @iso2022_jp3_comp_table0301_idx, %12 ], [ @iso2022_jp3_comp_table309a_idx, %13 ], [ @iso2022_jp3_comp_table02e5_idx, %9 ] %16 = phi ptr [ @iso2022_jp3_comp_table02e9_len, %10 ], [ @iso2022_jp3_comp_table0300_len, %11 ], [ @iso2022_jp3_comp_table0301_len, %12 ], [ @iso2022_jp3_comp_table309a_len, %13 ], [ @iso2022_jp3_comp_table02e5_len, %9 ] %17 = load i32, ptr %16, align 4, !tbaa !11 %18 = load i32, ptr %15, align 4, !tbaa !11 %19 = load ptr, ptr @iso2022_jp3_comp_table_data, align 8, !tbaa !13 br label %20 20: ; preds = %27, %14 %21 = phi i32 [ %18, %14 ], [ %28, %27 ] %22 = phi i32 [ %17, %14 ], [ %29, %27 ] %23 = zext i32 %21 to i64 %24 = getelementptr inbounds %struct.TYPE_8__, ptr %19, i64 %23 %25 = load i32, ptr %24, align 4, !tbaa !15 %26 = icmp eq i32 %25, %7 br i1 %26, label %31, label %27 27: ; preds = %20 %28 = add i32 %21, 1 %29 = add i32 %22, -1 %30 = icmp eq i32 %29, 0 br i1 %30, label %60, label %20, !llvm.loop !17 31: ; preds = %20 %32 = icmp eq i32 %22, 0 br i1 %32, label %60, label %33 33: ; preds = %31 %34 = load i64, ptr @STATE_JISX02131, align 8, !tbaa !19 %35 = icmp eq i64 %6, %34 %36 = select i1 %35, i32 2, i32 6 %37 = icmp sgt i32 %36, %3 br i1 %37, label %38, label %40 38: ; preds = %33 %39 = load i32, ptr @RET_TOOSMALL, align 4, !tbaa !11 br label %275 40: ; preds = %33 br i1 %35, label %49, label %41 41: ; preds = %40 %42 = load i8, ptr @ESC, align 1, !tbaa !20 store i8 %42, ptr %1, align 1, !tbaa !20 %43 = getelementptr inbounds i8, ptr %1, i64 1 store i8 36, ptr %43, align 1, !tbaa !20 %44 = getelementptr inbounds i8, ptr %1, i64 2 store i8 40, ptr %44, align 1, !tbaa !20 %45 = getelementptr inbounds i8, ptr %1, i64 3 store i8 81, ptr %45, align 1, !tbaa !20 %46 = getelementptr inbounds i8, ptr %1, i64 4 %47 = load i64, ptr @STATE_JISX02131, align 8, !tbaa !19 %48 = load ptr, ptr @iso2022_jp3_comp_table_data, align 8, !tbaa !13 br label %49 49: ; preds = %41, %40 %50 = phi ptr [ %48, %41 ], [ %19, %40 ] %51 = phi ptr [ %46, %41 ], [ %1, %40 ] %52 = phi i64 [ %47, %41 ], [ %6, %40 ] %53 = getelementptr inbounds %struct.TYPE_8__, ptr %50, i64 %23, i32 1 %54 = load i32, ptr %53, align 4, !tbaa !21 store i32 %54, ptr @lasttwo, align 4, !tbaa !11 %55 = lshr i32 %54, 8 %56 = trunc i32 %55 to i8 store i8 %56, ptr %51, align 1, !tbaa !20 %57 = load i32, ptr @lasttwo, align 4, !tbaa !11 %58 = trunc i32 %57 to i8 %59 = getelementptr inbounds i8, ptr %51, i64 1 store i8 %58, ptr %59, align 1, !tbaa !20 store i64 %52, ptr %0, align 8, !tbaa !6 br label %275 60: ; preds = %27, %9, %31 %61 = load i64, ptr @prevstate, align 8, !tbaa !19 %62 = icmp eq i64 %61, %6 %63 = select i1 %62, i32 2, i32 5 %64 = icmp sgt i32 %63, %3 br i1 %64, label %65, label %67 65: ; preds = %60 %66 = load i32, ptr @RET_TOOSMALL, align 4, !tbaa !11 br label %275 67: ; preds = %60 br i1 %62, label %79, label %68 68: ; preds = %67 %69 = load i64, ptr @STATE_JISX0208, align 8, !tbaa !19 %70 = icmp eq i64 %6, %69 br i1 %70, label %73, label %71 71: ; preds = %68 %72 = tail call i32 @abort() #5 unreachable 73: ; preds = %68 %74 = load i8, ptr @ESC, align 1, !tbaa !20 store i8 %74, ptr %1, align 1, !tbaa !20 %75 = getelementptr inbounds i8, ptr %1, i64 1 store i8 36, ptr %75, align 1, !tbaa !20 %76 = getelementptr inbounds i8, ptr %1, i64 2 store i8 66, ptr %76, align 1, !tbaa !20 %77 = getelementptr inbounds i8, ptr %1, i64 3 %78 = load i32, ptr @lasttwo, align 4, !tbaa !11 br label %79 79: ; preds = %67, %73 %80 = phi i32 [ %78, %73 ], [ %7, %67 ] %81 = phi ptr [ %77, %73 ], [ %1, %67 ] %82 = lshr i32 %80, 8 %83 = trunc i32 %82 to i8 store i8 %83, ptr %81, align 1, !tbaa !20 %84 = load i32, ptr @lasttwo, align 4, !tbaa !11 %85 = trunc i32 %84 to i8 %86 = getelementptr inbounds i8, ptr %81, i64 1 store i8 %85, ptr %86, align 1, !tbaa !20 %87 = getelementptr inbounds i8, ptr %81, i64 2 br label %88 88: ; preds = %79, %4 %89 = phi ptr [ %87, %79 ], [ %1, %4 ] %90 = phi i32 [ %63, %79 ], [ 0, %4 ] %91 = call i32 @ascii_wctomb(ptr noundef nonnull %0, ptr noundef nonnull %5, i32 noundef %2, i32 noundef 1) #4 %92 = load i32, ptr @RET_ILUNI, align 4, !tbaa !11 %93 = icmp eq i32 %91, %92 br i1 %93, label %119, label %94 94: ; preds = %88 %95 = icmp eq i32 %91, 1 br i1 %95, label %98, label %96 96: ; preds = %94 %97 = call i32 @abort() #5 unreachable 98: ; preds = %94 %99 = load i8, ptr %5, align 1, !tbaa !20 %100 = icmp sgt i8 %99, -1 br i1 %100, label %101, label %119 101: ; preds = %98 %102 = load i64, ptr @STATE_ASCII, align 8, !tbaa !19 %103 = icmp eq i64 %6, %102 %104 = select i1 %103, i32 1, i32 4 %105 = add nuw nsw i32 %104, %90 %106 = icmp sgt i32 %105, %3 br i1 %106, label %107, label %109 107: ; preds = %101 %108 = load i32, ptr @RET_TOOSMALL, align 4, !tbaa !11 br label %275 109: ; preds = %101 br i1 %103, label %116, label %110 110: ; preds = %109 %111 = load i8, ptr @ESC, align 1, !tbaa !20 store i8 %111, ptr %89, align 1, !tbaa !20 %112 = getelementptr inbounds i8, ptr %89, i64 1 store i8 40, ptr %112, align 1, !tbaa !20 %113 = getelementptr inbounds i8, ptr %89, i64 2 store i8 66, ptr %113, align 1, !tbaa !20 %114 = getelementptr inbounds i8, ptr %89, i64 3 %115 = load i64, ptr @STATE_ASCII, align 8, !tbaa !19 br label %116 116: ; preds = %110, %109 %117 = phi ptr [ %114, %110 ], [ %89, %109 ] %118 = phi i64 [ %115, %110 ], [ %6, %109 ] store i8 %99, ptr %117, align 1, !tbaa !20 store i64 %118, ptr %0, align 8, !tbaa !6 br label %275 119: ; preds = %98, %88 %120 = call i32 @jisx0201_wctomb(ptr noundef nonnull %0, ptr noundef nonnull %5, i32 noundef %2, i32 noundef 1) #4 %121 = load i32, ptr @RET_ILUNI, align 4, !tbaa !11 %122 = icmp eq i32 %120, %121 br i1 %122, label %148, label %123 123: ; preds = %119 %124 = icmp eq i32 %120, 1 br i1 %124, label %127, label %125 125: ; preds = %123 %126 = call i32 @abort() #5 unreachable 127: ; preds = %123 %128 = load i8, ptr %5, align 1, !tbaa !20 %129 = icmp sgt i8 %128, -1 br i1 %129, label %130, label %148 130: ; preds = %127 %131 = load i64, ptr @STATE_JISX0201ROMAN, align 8, !tbaa !19 %132 = icmp eq i64 %6, %131 %133 = select i1 %132, i32 1, i32 4 %134 = add nuw nsw i32 %133, %90 %135 = icmp sgt i32 %134, %3 br i1 %135, label %136, label %138 136: ; preds = %130 %137 = load i32, ptr @RET_TOOSMALL, align 4, !tbaa !11 br label %275 138: ; preds = %130 br i1 %132, label %145, label %139 139: ; preds = %138 %140 = load i8, ptr @ESC, align 1, !tbaa !20 store i8 %140, ptr %89, align 1, !tbaa !20 %141 = getelementptr inbounds i8, ptr %89, i64 1 store i8 40, ptr %141, align 1, !tbaa !20 %142 = getelementptr inbounds i8, ptr %89, i64 2 store i8 74, ptr %142, align 1, !tbaa !20 %143 = getelementptr inbounds i8, ptr %89, i64 3 %144 = load i64, ptr @STATE_JISX0201ROMAN, align 8, !tbaa !19 br label %145 145: ; preds = %139, %138 %146 = phi ptr [ %143, %139 ], [ %89, %138 ] %147 = phi i64 [ %144, %139 ], [ %6, %138 ] store i8 %128, ptr %146, align 1, !tbaa !20 store i64 %147, ptr %0, align 8, !tbaa !6 br label %275 148: ; preds = %127, %119 %149 = call zeroext i16 @ucs4_to_jisx0213(i32 noundef %2) #4 %150 = call i32 @jisx0208_wctomb(ptr noundef nonnull %0, ptr noundef nonnull %5, i32 noundef %2, i32 noundef 2) #4 %151 = load i32, ptr @RET_ILUNI, align 4, !tbaa !11 %152 = icmp eq i32 %150, %151 br i1 %152, label %191, label %153 153: ; preds = %148 %154 = icmp eq i32 %150, 2 br i1 %154, label %157, label %155 155: ; preds = %153 %156 = call i32 @abort() #5 unreachable 157: ; preds = %153 %158 = load i8, ptr %5, align 1, !tbaa !20 %159 = icmp sgt i8 %158, -1 %160 = getelementptr inbounds i8, ptr %5, i64 1 %161 = load i8, ptr %160, align 1 %162 = icmp sgt i8 %161, -1 %163 = select i1 %159, i1 %162, i1 false br i1 %163, label %164, label %191 164: ; preds = %157 %165 = zext i16 %149 to i32 %166 = and i32 %165, 128 %167 = icmp eq i32 %166, 0 br i1 %167, label %171, label %168 168: ; preds = %164 store i64 %6, ptr @prevstate, align 8, !tbaa !19 %169 = and i32 %165, 32639 store i32 %169, ptr @lasttwo, align 4, !tbaa !11 %170 = load i64, ptr @STATE_JISX0208, align 8, !tbaa !19 store i64 %170, ptr %0, align 8, !tbaa !6 br label %275 171: ; preds = %164 %172 = load i64, ptr @STATE_JISX0208, align 8, !tbaa !19 %173 = icmp eq i64 %6, %172 %174 = select i1 %173, i32 2, i32 5 %175 = add nuw nsw i32 %174, %90 %176 = icmp sgt i32 %175, %3 br i1 %176, label %177, label %179 177: ; preds = %171 %178 = load i32, ptr @RET_TOOSMALL, align 4, !tbaa !11 br label %275 179: ; preds = %171 br i1 %173, label %186, label %180 180: ; preds = %179 %181 = load i8, ptr @ESC, align 1, !tbaa !20 store i8 %181, ptr %89, align 1, !tbaa !20 %182 = getelementptr inbounds i8, ptr %89, i64 1 store i8 36, ptr %182, align 1, !tbaa !20 %183 = getelementptr inbounds i8, ptr %89, i64 2 store i8 66, ptr %183, align 1, !tbaa !20 %184 = getelementptr inbounds i8, ptr %89, i64 3 %185 = load i64, ptr @STATE_JISX0208, align 8, !tbaa !19 br label %186 186: ; preds = %180, %179 %187 = phi ptr [ %184, %180 ], [ %89, %179 ] %188 = phi i64 [ %185, %180 ], [ %6, %179 ] store i8 %158, ptr %187, align 1, !tbaa !20 %189 = load i8, ptr %160, align 1, !tbaa !20 %190 = getelementptr inbounds i8, ptr %187, i64 1 store i8 %189, ptr %190, align 1, !tbaa !20 store i64 %188, ptr %0, align 8, !tbaa !6 br label %275 191: ; preds = %157, %148 %192 = zext i16 %149 to i32 %193 = icmp eq i16 %149, 0 br i1 %193, label %245, label %194 194: ; preds = %191 %195 = icmp sgt i16 %149, -1 br i1 %195, label %204, label %196 196: ; preds = %194 %197 = load i64, ptr @STATE_JISX02132, align 8, !tbaa !19 %198 = icmp eq i64 %6, %197 br i1 %198, label %222, label %199 199: ; preds = %196 %200 = add nuw nsw i32 %90, 4 %201 = icmp sgt i32 %200, %3 br i1 %201, label %202, label %212 202: ; preds = %199 %203 = load i32, ptr @RET_TOOSMALL, align 4, !tbaa !11 br label %275 204: ; preds = %194 %205 = load i64, ptr @STATE_JISX02131, align 8, !tbaa !19 %206 = icmp eq i64 %6, %205 br i1 %206, label %222, label %207 207: ; preds = %204 %208 = add nuw nsw i32 %90, 4 %209 = icmp sgt i32 %208, %3 br i1 %209, label %210, label %212 210: ; preds = %207 %211 = load i32, ptr @RET_TOOSMALL, align 4, !tbaa !11 br label %275 212: ; preds = %207, %199 %213 = phi i8 [ 80, %199 ], [ 81, %207 ] %214 = phi ptr [ @STATE_JISX02132, %199 ], [ @STATE_JISX02131, %207 ] %215 = phi i32 [ %200, %199 ], [ %208, %207 ] %216 = load i8, ptr @ESC, align 1, !tbaa !20 store i8 %216, ptr %89, align 1, !tbaa !20 %217 = getelementptr inbounds i8, ptr %89, i64 1 store i8 36, ptr %217, align 1, !tbaa !20 %218 = getelementptr inbounds i8, ptr %89, i64 2 store i8 40, ptr %218, align 1, !tbaa !20 %219 = getelementptr inbounds i8, ptr %89, i64 3 store i8 %213, ptr %219, align 1, !tbaa !20 %220 = getelementptr inbounds i8, ptr %89, i64 4 %221 = load i64, ptr %214, align 8, !tbaa !19 br label %222 222: ; preds = %212, %204, %196 %223 = phi ptr [ %89, %196 ], [ %89, %204 ], [ %220, %212 ] %224 = phi i32 [ %90, %196 ], [ %90, %204 ], [ %215, %212 ] %225 = phi i64 [ %6, %196 ], [ %6, %204 ], [ %221, %212 ] %226 = and i32 %192, 128 %227 = icmp eq i32 %226, 0 br i1 %227, label %233, label %228 228: ; preds = %222 br i1 %195, label %231, label %229 229: ; preds = %228 %230 = call i32 @abort() #5 unreachable 231: ; preds = %228 store i64 %225, ptr @prevstate, align 8, !tbaa !19 %232 = and i32 %192, 32639 store i32 %232, ptr @lasttwo, align 4, !tbaa !11 store i64 %225, ptr %0, align 8, !tbaa !6 br label %275 233: ; preds = %222 %234 = add nuw nsw i32 %224, 2 %235 = icmp sgt i32 %234, %3 br i1 %235, label %236, label %238 236: ; preds = %233 %237 = load i32, ptr @RET_TOOSMALL, align 4, !tbaa !11 br label %275 238: ; preds = %233 %239 = lshr i16 %149, 8 %240 = trunc nuw i16 %239 to i8 %241 = and i8 %240, 127 store i8 %241, ptr %223, align 1, !tbaa !20 %242 = trunc i16 %149 to i8 %243 = and i8 %242, 127 %244 = getelementptr inbounds i8, ptr %223, i64 1 store i8 %243, ptr %244, align 1, !tbaa !20 store i64 %225, ptr %0, align 8, !tbaa !6 br label %275 245: ; preds = %191 %246 = call i32 @jisx0201_wctomb(ptr noundef nonnull %0, ptr noundef nonnull %5, i32 noundef %2, i32 noundef 1) #4 %247 = load i32, ptr @RET_ILUNI, align 4, !tbaa !11 %248 = icmp eq i32 %246, %247 br i1 %248, label %275, label %249 249: ; preds = %245 %250 = icmp eq i32 %246, 1 br i1 %250, label %253, label %251 251: ; preds = %249 %252 = call i32 @abort() #5 unreachable 253: ; preds = %249 %254 = load i8, ptr %5, align 1, !tbaa !20 %255 = icmp slt i8 %254, 0 br i1 %255, label %256, label %275 256: ; preds = %253 %257 = load i64, ptr @STATE_JISX0201KATAKANA, align 8, !tbaa !19 %258 = icmp eq i64 %6, %257 %259 = select i1 %258, i32 1, i32 4 %260 = add nuw nsw i32 %259, %90 %261 = icmp sgt i32 %260, %3 br i1 %261, label %262, label %264 262: ; preds = %256 %263 = load i32, ptr @RET_TOOSMALL, align 4, !tbaa !11 br label %275 264: ; preds = %256 br i1 %258, label %271, label %265 265: ; preds = %264 %266 = load i8, ptr @ESC, align 1, !tbaa !20 store i8 %266, ptr %89, align 1, !tbaa !20 %267 = getelementptr inbounds i8, ptr %89, i64 1 store i8 40, ptr %267, align 1, !tbaa !20 %268 = getelementptr inbounds i8, ptr %89, i64 2 store i8 73, ptr %268, align 1, !tbaa !20 %269 = getelementptr inbounds i8, ptr %89, i64 3 %270 = load i64, ptr @STATE_JISX0201KATAKANA, align 8, !tbaa !19 br label %271 271: ; preds = %265, %264 %272 = phi ptr [ %269, %265 ], [ %89, %264 ] %273 = phi i64 [ %270, %265 ], [ %6, %264 ] %274 = and i8 %254, 127 store i8 %274, ptr %272, align 1, !tbaa !20 store i64 %273, ptr %0, align 8, !tbaa !6 br label %275 275: ; preds = %65, %49, %38, %245, %253, %271, %262, %238, %236, %231, %210, %202, %186, %177, %168, %145, %136, %116, %107 %276 = phi i32 [ %108, %107 ], [ %105, %116 ], [ %137, %136 ], [ %134, %145 ], [ %90, %168 ], [ %178, %177 ], [ %175, %186 ], [ %203, %202 ], [ %224, %231 ], [ %237, %236 ], [ %234, %238 ], [ %211, %210 ], [ %263, %262 ], [ %260, %271 ], [ %247, %253 ], [ %246, %245 ], [ %66, %65 ], [ %36, %49 ], [ %39, %38 ] call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %5) #4 ret i32 %276 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: noreturn declare i32 @abort(...) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 declare i32 @ascii_wctomb(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3 declare i32 @jisx0201_wctomb(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3 declare zeroext i16 @ucs4_to_jisx0213(i32 noundef) local_unnamed_addr #3 declare i32 @jisx0208_wctomb(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { noreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #4 = { nounwind } attributes #5 = { noreturn nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_7__", !8, i64 0} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !12, i64 0} !12 = !{!"int", !9, i64 0} !13 = !{!14, !14, i64 0} !14 = !{!"any pointer", !9, i64 0} !15 = !{!16, !12, i64 0} !16 = !{!"TYPE_8__", !12, i64 0, !12, i64 4} !17 = distinct !{!17, !18} !18 = !{!"llvm.loop.mustprogress"} !19 = !{!8, !8, i64 0} !20 = !{!9, !9, i64 0} !21 = !{!16, !12, i64 4}
TDengine_deps_iconv_extr_iso2022_jp3.h_iso2022_jp3_wctomb
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/intel/ice/extr_ice_switch.c_ice_aq_free_vsi.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/intel/ice/extr_ice_switch.c_ice_aq_free_vsi.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.ice_aq_desc = type { %struct.TYPE_2__ } %struct.TYPE_2__ = type { %struct.ice_aqc_add_update_free_vsi_resp, %struct.ice_aqc_add_get_update_free_vsi } %struct.ice_aqc_add_update_free_vsi_resp = type { i32, i32 } %struct.ice_aqc_add_get_update_free_vsi = type { ptr, ptr } %struct.ice_vsi_ctx = type { i32, ptr, ptr } @ice_aqc_opc_free_vsi = dso_local local_unnamed_addr global i32 0, align 4 @ICE_AQ_VSI_IS_VALID = dso_local local_unnamed_addr global i32 0, align 4 @ICE_AQ_VSI_KEEP_ALLOC = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @ice_aq_free_vsi], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @ice_aq_free_vsi(ptr noundef %0, ptr nocapture noundef %1, i32 noundef %2, ptr noundef %3) #0 { %5 = alloca %struct.ice_aq_desc, align 8 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #3 %6 = load i32, ptr @ice_aqc_opc_free_vsi, align 4, !tbaa !5 %7 = call i32 @ice_fill_dflt_direct_cmd_desc(ptr noundef nonnull %5, i32 noundef %6) #3 %8 = load i32, ptr %1, align 8, !tbaa !9 %9 = load i32, ptr @ICE_AQ_VSI_IS_VALID, align 4, !tbaa !5 %10 = or i32 %9, %8 %11 = call ptr @cpu_to_le16(i32 noundef %10) #3 %12 = getelementptr inbounds %struct.TYPE_2__, ptr %5, i64 0, i32 1, i32 1 store ptr %11, ptr %12, align 8, !tbaa !12 %13 = icmp eq i32 %2, 0 br i1 %13, label %18, label %14 14: ; preds = %4 %15 = getelementptr inbounds %struct.TYPE_2__, ptr %5, i64 0, i32 1 %16 = load i32, ptr @ICE_AQ_VSI_KEEP_ALLOC, align 4, !tbaa !5 %17 = call ptr @cpu_to_le16(i32 noundef %16) #3 store ptr %17, ptr %15, align 8, !tbaa !14 br label %18 18: ; preds = %14, %4 %19 = call i32 @ice_aq_send_cmd(ptr noundef %0, ptr noundef nonnull %5, ptr noundef null, i32 noundef 0, ptr noundef %3) #3 %20 = icmp eq i32 %19, 0 br i1 %20, label %21, label %29 21: ; preds = %18 %22 = getelementptr inbounds %struct.ice_aqc_add_update_free_vsi_resp, ptr %5, i64 0, i32 1 %23 = load i32, ptr %22, align 4, !tbaa !15 %24 = call ptr @le16_to_cpu(i32 noundef %23) #3 %25 = getelementptr inbounds %struct.ice_vsi_ctx, ptr %1, i64 0, i32 2 store ptr %24, ptr %25, align 8, !tbaa !17 %26 = load i32, ptr %5, align 8, !tbaa !18 %27 = call ptr @le16_to_cpu(i32 noundef %26) #3 %28 = getelementptr inbounds %struct.ice_vsi_ctx, ptr %1, i64 0, i32 1 store ptr %27, ptr %28, align 8, !tbaa !19 br label %29 29: ; preds = %21, %18 call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #3 ret i32 %19 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @ice_fill_dflt_direct_cmd_desc(ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @cpu_to_le16(i32 noundef) local_unnamed_addr #2 declare i32 @ice_aq_send_cmd(ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare ptr @le16_to_cpu(i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"ice_vsi_ctx", !6, i64 0, !11, i64 8, !11, i64 16} !11 = !{!"any pointer", !7, i64 0} !12 = !{!13, !11, i64 8} !13 = !{!"ice_aqc_add_get_update_free_vsi", !11, i64 0, !11, i64 8} !14 = !{!13, !11, i64 0} !15 = !{!16, !6, i64 4} !16 = !{!"ice_aqc_add_update_free_vsi_resp", !6, i64 0, !6, i64 4} !17 = !{!10, !11, i64 16} !18 = !{!16, !6, i64 0} !19 = !{!10, !11, i64 8}
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/intel/ice/extr_ice_switch.c_ice_aq_free_vsi.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/intel/ice/extr_ice_switch.c_ice_aq_free_vsi.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.ice_aq_desc = type { %struct.TYPE_2__ } %struct.TYPE_2__ = type { %struct.ice_aqc_add_update_free_vsi_resp, %struct.ice_aqc_add_get_update_free_vsi } %struct.ice_aqc_add_update_free_vsi_resp = type { i32, i32 } %struct.ice_aqc_add_get_update_free_vsi = type { ptr, ptr } @ice_aqc_opc_free_vsi = common local_unnamed_addr global i32 0, align 4 @ICE_AQ_VSI_IS_VALID = common local_unnamed_addr global i32 0, align 4 @ICE_AQ_VSI_KEEP_ALLOC = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @ice_aq_free_vsi], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @ice_aq_free_vsi(ptr noundef %0, ptr nocapture noundef %1, i32 noundef %2, ptr noundef %3) #0 { %5 = alloca %struct.ice_aq_desc, align 8 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #3 %6 = load i32, ptr @ice_aqc_opc_free_vsi, align 4, !tbaa !6 %7 = call i32 @ice_fill_dflt_direct_cmd_desc(ptr noundef nonnull %5, i32 noundef %6) #3 %8 = load i32, ptr %1, align 8, !tbaa !10 %9 = load i32, ptr @ICE_AQ_VSI_IS_VALID, align 4, !tbaa !6 %10 = or i32 %9, %8 %11 = call ptr @cpu_to_le16(i32 noundef %10) #3 %12 = getelementptr inbounds i8, ptr %5, i64 16 store ptr %11, ptr %12, align 8, !tbaa !13 %13 = icmp eq i32 %2, 0 br i1 %13, label %18, label %14 14: ; preds = %4 %15 = getelementptr inbounds i8, ptr %5, i64 8 %16 = load i32, ptr @ICE_AQ_VSI_KEEP_ALLOC, align 4, !tbaa !6 %17 = call ptr @cpu_to_le16(i32 noundef %16) #3 store ptr %17, ptr %15, align 8, !tbaa !15 br label %18 18: ; preds = %14, %4 %19 = call i32 @ice_aq_send_cmd(ptr noundef %0, ptr noundef nonnull %5, ptr noundef null, i32 noundef 0, ptr noundef %3) #3 %20 = icmp eq i32 %19, 0 br i1 %20, label %21, label %29 21: ; preds = %18 %22 = getelementptr inbounds i8, ptr %5, i64 4 %23 = load i32, ptr %22, align 4, !tbaa !16 %24 = call ptr @le16_to_cpu(i32 noundef %23) #3 %25 = getelementptr inbounds i8, ptr %1, i64 16 store ptr %24, ptr %25, align 8, !tbaa !18 %26 = load i32, ptr %5, align 8, !tbaa !19 %27 = call ptr @le16_to_cpu(i32 noundef %26) #3 %28 = getelementptr inbounds i8, ptr %1, i64 8 store ptr %27, ptr %28, align 8, !tbaa !20 br label %29 29: ; preds = %21, %18 call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #3 ret i32 %19 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @ice_fill_dflt_direct_cmd_desc(ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @cpu_to_le16(i32 noundef) local_unnamed_addr #2 declare i32 @ice_aq_send_cmd(ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare ptr @le16_to_cpu(i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"ice_vsi_ctx", !7, i64 0, !12, i64 8, !12, i64 16} !12 = !{!"any pointer", !8, i64 0} !13 = !{!14, !12, i64 8} !14 = !{!"ice_aqc_add_get_update_free_vsi", !12, i64 0, !12, i64 8} !15 = !{!14, !12, i64 0} !16 = !{!17, !7, i64 4} !17 = !{!"ice_aqc_add_update_free_vsi_resp", !7, i64 0, !7, i64 4} !18 = !{!11, !12, i64 16} !19 = !{!17, !7, i64 0} !20 = !{!11, !12, i64 8}
linux_drivers_net_ethernet_intel_ice_extr_ice_switch.c_ice_aq_free_vsi
; ModuleID = 'AnghaBench/freebsd/sys/kern/extr_kern_rangelock.c_rangelock_init.c' source_filename = "AnghaBench/freebsd/sys/kern/extr_kern_rangelock.c_rangelock_init.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.rangelock = type { ptr, i32 } ; Function Attrs: nounwind uwtable define dso_local void @rangelock_init(ptr noundef %0) local_unnamed_addr #0 { %2 = getelementptr inbounds %struct.rangelock, ptr %0, i64 0, i32 1 %3 = tail call i32 @TAILQ_INIT(ptr noundef nonnull %2) #2 store ptr null, ptr %0, align 8, !tbaa !5 ret void } declare i32 @TAILQ_INIT(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"rangelock", !7, i64 0, !10, i64 8} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"int", !8, i64 0}
; ModuleID = 'AnghaBench/freebsd/sys/kern/extr_kern_rangelock.c_rangelock_init.c' source_filename = "AnghaBench/freebsd/sys/kern/extr_kern_rangelock.c_rangelock_init.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define void @rangelock_init(ptr noundef %0) local_unnamed_addr #0 { %2 = getelementptr inbounds i8, ptr %0, i64 8 %3 = tail call i32 @TAILQ_INIT(ptr noundef nonnull %2) #2 store ptr null, ptr %0, align 8, !tbaa !6 ret void } declare i32 @TAILQ_INIT(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"rangelock", !8, i64 0, !11, i64 8} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"int", !9, i64 0}
freebsd_sys_kern_extr_kern_rangelock.c_rangelock_init
; ModuleID = 'AnghaBench/linux/drivers/video/extr_videomode.c_videomode_from_timings.c' source_filename = "AnghaBench/linux/drivers/video/extr_videomode.c_videomode_from_timings.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local i32 @videomode_from_timings(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 { %4 = tail call ptr @display_timings_get(ptr noundef %0, i32 noundef %2) #2 %5 = icmp eq ptr %4, null br i1 %5, label %6, label %9 6: ; preds = %3 %7 = load i32, ptr @EINVAL, align 4, !tbaa !5 %8 = sub nsw i32 0, %7 br label %11 9: ; preds = %3 %10 = tail call i32 @videomode_from_timing(ptr noundef nonnull %4, ptr noundef %1) #2 br label %11 11: ; preds = %9, %6 %12 = phi i32 [ 0, %9 ], [ %8, %6 ] ret i32 %12 } declare ptr @display_timings_get(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @videomode_from_timing(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/video/extr_videomode.c_videomode_from_timings.c' source_filename = "AnghaBench/linux/drivers/video/extr_videomode.c_videomode_from_timings.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @EINVAL = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define range(i32 -2147483647, -2147483648) i32 @videomode_from_timings(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 { %4 = tail call ptr @display_timings_get(ptr noundef %0, i32 noundef %2) #2 %5 = icmp eq ptr %4, null br i1 %5, label %6, label %9 6: ; preds = %3 %7 = load i32, ptr @EINVAL, align 4, !tbaa !6 %8 = sub nsw i32 0, %7 br label %11 9: ; preds = %3 %10 = tail call i32 @videomode_from_timing(ptr noundef nonnull %4, ptr noundef %1) #2 br label %11 11: ; preds = %9, %6 %12 = phi i32 [ 0, %9 ], [ %8, %6 ] ret i32 %12 } declare ptr @display_timings_get(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @videomode_from_timing(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_drivers_video_extr_videomode.c_videomode_from_timings
; ModuleID = 'AnghaBench/php-src/ext/xmlreader/extr_php_xmlreader.c_xmlreader_get_property_ptr_ptr.c' source_filename = "AnghaBench/php-src/ext/xmlreader/extr_php_xmlreader.c_xmlreader_get_property_ptr_ptr.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local ptr @xmlreader_get_property_ptr_ptr(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) local_unnamed_addr #0 { %5 = tail call ptr @php_xmlreader_fetch_object(ptr noundef %0) #2 %6 = load ptr, ptr %5, align 8, !tbaa !5 %7 = icmp eq ptr %6, null br i1 %7, label %11, label %8 8: ; preds = %4 %9 = tail call ptr @zend_hash_find_ptr(ptr noundef nonnull %6, ptr noundef %1) #2 %10 = icmp eq ptr %9, null br i1 %10, label %11, label %13 11: ; preds = %4, %8 %12 = tail call ptr @zend_std_get_property_ptr_ptr(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) #2 br label %13 13: ; preds = %11, %8 %14 = phi ptr [ %12, %11 ], [ null, %8 ] ret ptr %14 } declare ptr @php_xmlreader_fetch_object(ptr noundef) local_unnamed_addr #1 declare ptr @zend_hash_find_ptr(ptr noundef, ptr noundef) local_unnamed_addr #1 declare ptr @zend_std_get_property_ptr_ptr(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_3__", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/php-src/ext/xmlreader/extr_php_xmlreader.c_xmlreader_get_property_ptr_ptr.c' source_filename = "AnghaBench/php-src/ext/xmlreader/extr_php_xmlreader.c_xmlreader_get_property_ptr_ptr.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define ptr @xmlreader_get_property_ptr_ptr(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) local_unnamed_addr #0 { %5 = tail call ptr @php_xmlreader_fetch_object(ptr noundef %0) #2 %6 = load ptr, ptr %5, align 8, !tbaa !6 %7 = icmp eq ptr %6, null br i1 %7, label %11, label %8 8: ; preds = %4 %9 = tail call ptr @zend_hash_find_ptr(ptr noundef nonnull %6, ptr noundef %1) #2 %10 = icmp eq ptr %9, null br i1 %10, label %11, label %13 11: ; preds = %4, %8 %12 = tail call ptr @zend_std_get_property_ptr_ptr(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) #2 br label %13 13: ; preds = %11, %8 %14 = phi ptr [ %12, %11 ], [ null, %8 ] ret ptr %14 } declare ptr @php_xmlreader_fetch_object(ptr noundef) local_unnamed_addr #1 declare ptr @zend_hash_find_ptr(ptr noundef, ptr noundef) local_unnamed_addr #1 declare ptr @zend_std_get_property_ptr_ptr(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_3__", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
php-src_ext_xmlreader_extr_php_xmlreader.c_xmlreader_get_property_ptr_ptr
; ModuleID = 'AnghaBench/reactos/sdk/tools/widl/extr_write_sltg.c_sltg_write_helpstrings.c' source_filename = "AnghaBench/reactos/sdk/tools/widl/extr_write_sltg.c_sltg_write_helpstrings.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @sltg_write_helpstrings.dummy = internal constant [6 x i8] zeroinitializer, align 1 @.str = private unnamed_addr constant [47 x i8] c"sltg_write_helpstrings: writing dummy 6 bytes\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @sltg_write_helpstrings], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @sltg_write_helpstrings(ptr nocapture readnone %0) #0 { %2 = tail call i32 @chat(ptr noundef nonnull @.str) #2 %3 = tail call i32 @put_data(ptr noundef nonnull @sltg_write_helpstrings.dummy, i32 noundef 6) #2 ret void } declare i32 @chat(ptr noundef) local_unnamed_addr #1 declare i32 @put_data(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/reactos/sdk/tools/widl/extr_write_sltg.c_sltg_write_helpstrings.c' source_filename = "AnghaBench/reactos/sdk/tools/widl/extr_write_sltg.c_sltg_write_helpstrings.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @sltg_write_helpstrings.dummy = internal constant [6 x i8] zeroinitializer, align 1 @.str = private unnamed_addr constant [47 x i8] c"sltg_write_helpstrings: writing dummy 6 bytes\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @sltg_write_helpstrings], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @sltg_write_helpstrings(ptr nocapture readnone %0) #0 { %2 = tail call i32 @chat(ptr noundef nonnull @.str) #2 %3 = tail call i32 @put_data(ptr noundef nonnull @sltg_write_helpstrings.dummy, i32 noundef 6) #2 ret void } declare i32 @chat(ptr noundef) local_unnamed_addr #1 declare i32 @put_data(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
reactos_sdk_tools_widl_extr_write_sltg.c_sltg_write_helpstrings
; ModuleID = 'AnghaBench/linux/drivers/scsi/mpt3sas/extr_mpt3sas_warpdrive.c__warpdrive_disable_ddio.c' source_filename = "AnghaBench/linux/drivers/scsi/mpt3sas/extr_mpt3sas_warpdrive.c__warpdrive_disable_ddio.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_5__ = type { i32 } %struct.TYPE_6__ = type { i32 } @MPI2_RAID_VOLUME_PGAD_FORM_GET_NEXT_HANDLE = dso_local local_unnamed_addr global i32 0, align 4 @MPI2_IOCSTATUS_MASK = dso_local local_unnamed_addr global i32 0, align 4 @MPI2_IOCSTATUS_CONFIG_INVALID_PAGE = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @_warpdrive_disable_ddio], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @_warpdrive_disable_ddio(ptr noundef %0) #0 { %2 = alloca %struct.TYPE_5__, align 4 %3 = alloca %struct.TYPE_6__, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 %4 = load i32, ptr @MPI2_RAID_VOLUME_PGAD_FORM_GET_NEXT_HANDLE, align 4, !tbaa !5 %5 = call i32 @mpt3sas_config_get_raid_volume_pg1(ptr noundef %0, ptr noundef nonnull %3, ptr noundef nonnull %2, i32 noundef %4, i32 noundef 65535) #3 %6 = icmp eq i32 %5, 0 br i1 %6, label %7, label %26 7: ; preds = %1, %21 %8 = load i32, ptr %3, align 4, !tbaa !9 %9 = call i32 @le16_to_cpu(i32 noundef %8) #3 %10 = load i32, ptr @MPI2_IOCSTATUS_MASK, align 4, !tbaa !5 %11 = and i32 %10, %9 %12 = load i32, ptr @MPI2_IOCSTATUS_CONFIG_INVALID_PAGE, align 4, !tbaa !5 %13 = icmp eq i32 %11, %12 br i1 %13, label %26, label %14 14: ; preds = %7 %15 = load i32, ptr %2, align 4, !tbaa !11 %16 = call i32 @le16_to_cpu(i32 noundef %15) #3 %17 = call i32 @spin_lock_irqsave(ptr noundef %0, i64 noundef undef) #3 %18 = call ptr @mpt3sas_raid_device_find_by_handle(ptr noundef %0, i32 noundef %16) #3 %19 = icmp eq ptr %18, null br i1 %19, label %21, label %20 20: ; preds = %14 store i64 0, ptr %18, align 8, !tbaa !13 br label %21 21: ; preds = %20, %14 %22 = call i32 @spin_unlock_irqrestore(ptr noundef %0, i64 noundef undef) #3 %23 = load i32, ptr @MPI2_RAID_VOLUME_PGAD_FORM_GET_NEXT_HANDLE, align 4, !tbaa !5 %24 = call i32 @mpt3sas_config_get_raid_volume_pg1(ptr noundef %0, ptr noundef nonnull %3, ptr noundef nonnull %2, i32 noundef %23, i32 noundef %16) #3 %25 = icmp eq i32 %24, 0 br i1 %25, label %7, label %26, !llvm.loop !16 26: ; preds = %21, %7, %1 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @mpt3sas_config_get_raid_volume_pg1(ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #2 declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #2 declare ptr @mpt3sas_raid_device_find_by_handle(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"TYPE_6__", !6, i64 0} !11 = !{!12, !6, i64 0} !12 = !{!"TYPE_5__", !6, i64 0} !13 = !{!14, !15, i64 0} !14 = !{!"_raid_device", !15, i64 0} !15 = !{!"long", !7, i64 0} !16 = distinct !{!16, !17} !17 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/linux/drivers/scsi/mpt3sas/extr_mpt3sas_warpdrive.c__warpdrive_disable_ddio.c' source_filename = "AnghaBench/linux/drivers/scsi/mpt3sas/extr_mpt3sas_warpdrive.c__warpdrive_disable_ddio.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_5__ = type { i32 } %struct.TYPE_6__ = type { i32 } @MPI2_RAID_VOLUME_PGAD_FORM_GET_NEXT_HANDLE = common local_unnamed_addr global i32 0, align 4 @MPI2_IOCSTATUS_MASK = common local_unnamed_addr global i32 0, align 4 @MPI2_IOCSTATUS_CONFIG_INVALID_PAGE = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @_warpdrive_disable_ddio], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @_warpdrive_disable_ddio(ptr noundef %0) #0 { %2 = alloca %struct.TYPE_5__, align 4 %3 = alloca %struct.TYPE_6__, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 %4 = load i32, ptr @MPI2_RAID_VOLUME_PGAD_FORM_GET_NEXT_HANDLE, align 4, !tbaa !6 %5 = call i32 @mpt3sas_config_get_raid_volume_pg1(ptr noundef %0, ptr noundef nonnull %3, ptr noundef nonnull %2, i32 noundef %4, i32 noundef 65535) #3 %6 = icmp eq i32 %5, 0 br i1 %6, label %7, label %26 7: ; preds = %1, %21 %8 = load i32, ptr %3, align 4, !tbaa !10 %9 = call i32 @le16_to_cpu(i32 noundef %8) #3 %10 = load i32, ptr @MPI2_IOCSTATUS_MASK, align 4, !tbaa !6 %11 = and i32 %10, %9 %12 = load i32, ptr @MPI2_IOCSTATUS_CONFIG_INVALID_PAGE, align 4, !tbaa !6 %13 = icmp eq i32 %11, %12 br i1 %13, label %26, label %14 14: ; preds = %7 %15 = load i32, ptr %2, align 4, !tbaa !12 %16 = call i32 @le16_to_cpu(i32 noundef %15) #3 %17 = call i32 @spin_lock_irqsave(ptr noundef %0, i64 noundef undef) #3 %18 = call ptr @mpt3sas_raid_device_find_by_handle(ptr noundef %0, i32 noundef %16) #3 %19 = icmp eq ptr %18, null br i1 %19, label %21, label %20 20: ; preds = %14 store i64 0, ptr %18, align 8, !tbaa !14 br label %21 21: ; preds = %20, %14 %22 = call i32 @spin_unlock_irqrestore(ptr noundef %0, i64 noundef undef) #3 %23 = load i32, ptr @MPI2_RAID_VOLUME_PGAD_FORM_GET_NEXT_HANDLE, align 4, !tbaa !6 %24 = call i32 @mpt3sas_config_get_raid_volume_pg1(ptr noundef %0, ptr noundef nonnull %3, ptr noundef nonnull %2, i32 noundef %23, i32 noundef %16) #3 %25 = icmp eq i32 %24, 0 br i1 %25, label %7, label %26, !llvm.loop !17 26: ; preds = %21, %7, %1 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @mpt3sas_config_get_raid_volume_pg1(ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #2 declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #2 declare ptr @mpt3sas_raid_device_find_by_handle(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"TYPE_6__", !7, i64 0} !12 = !{!13, !7, i64 0} !13 = !{!"TYPE_5__", !7, i64 0} !14 = !{!15, !16, i64 0} !15 = !{!"_raid_device", !16, i64 0} !16 = !{!"long", !8, i64 0} !17 = distinct !{!17, !18} !18 = !{!"llvm.loop.mustprogress"}
linux_drivers_scsi_mpt3sas_extr_mpt3sas_warpdrive.c__warpdrive_disable_ddio
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/soc/codecs/extr_wm8974.c_wm8974_set_dai_fmt.c' source_filename = "AnghaBench/fastsocket/kernel/sound/soc/codecs/extr_wm8974.c_wm8974_set_dai_fmt.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @WM8974_CLOCK = dso_local local_unnamed_addr global i32 0, align 4 @SND_SOC_DAIFMT_MASTER_MASK = dso_local local_unnamed_addr global i32 0, align 4 @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @SND_SOC_DAIFMT_FORMAT_MASK = dso_local local_unnamed_addr global i32 0, align 4 @SND_SOC_DAIFMT_INV_MASK = dso_local local_unnamed_addr global i32 0, align 4 @WM8974_IFACE = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @wm8974_set_dai_fmt], section "llvm.metadata" @switch.table.wm8974_set_dai_fmt = private unnamed_addr constant [8 x i32] [i32 0, i32 16, i32 16, i32 8, i32 16, i32 16, i32 16, i32 24], align 4 ; Function Attrs: nounwind uwtable define internal i32 @wm8974_set_dai_fmt(ptr nocapture noundef readonly %0, i32 noundef %1) #0 { %3 = load ptr, ptr %0, align 8, !tbaa !5 %4 = load i32, ptr @WM8974_CLOCK, align 4, !tbaa !10 %5 = tail call i32 @snd_soc_read(ptr noundef %3, i32 noundef %4) #2 %6 = and i32 %5, 510 %7 = load i32, ptr @SND_SOC_DAIFMT_MASTER_MASK, align 4, !tbaa !10 %8 = and i32 %7, %1 switch i32 %8, label %11 [ i32 137, label %9 i32 136, label %14 ] 9: ; preds = %2 %10 = or disjoint i32 %6, 1 br label %14 11: ; preds = %2 %12 = load i32, ptr @EINVAL, align 4, !tbaa !10 %13 = sub nsw i32 0, %12 br label %49 14: ; preds = %2, %9 %15 = phi i32 [ %6, %2 ], [ %10, %9 ] %16 = load i32, ptr @SND_SOC_DAIFMT_FORMAT_MASK, align 4, !tbaa !10 %17 = and i32 %16, %1 %18 = add i32 %17, -128 %19 = icmp ult i32 %18, 8 br i1 %19, label %23, label %20 20: ; preds = %23, %14 %21 = load i32, ptr @EINVAL, align 4, !tbaa !10 %22 = sub nsw i32 0, %21 br label %49 23: ; preds = %14 %24 = trunc i32 %18 to i8 %25 = lshr i8 -55, %24 %26 = and i8 %25, 1 %27 = icmp eq i8 %26, 0 br i1 %27, label %20, label %28 28: ; preds = %23 %29 = zext nneg i32 %18 to i64 %30 = getelementptr inbounds [8 x i32], ptr @switch.table.wm8974_set_dai_fmt, i64 0, i64 %29 %31 = load i32, ptr %30, align 4 %32 = load i32, ptr @SND_SOC_DAIFMT_INV_MASK, align 4, !tbaa !10 %33 = and i32 %32, %1 switch i32 %33, label %40 [ i32 129, label %43 i32 133, label %34 i32 132, label %36 i32 130, label %38 ] 34: ; preds = %28 %35 = or disjoint i32 %31, 384 br label %43 36: ; preds = %28 %37 = or disjoint i32 %31, 256 br label %43 38: ; preds = %28 %39 = or disjoint i32 %31, 128 br label %43 40: ; preds = %28 %41 = load i32, ptr @EINVAL, align 4, !tbaa !10 %42 = sub nsw i32 0, %41 br label %49 43: ; preds = %38, %36, %34, %28 %44 = phi i32 [ %39, %38 ], [ %37, %36 ], [ %35, %34 ], [ %31, %28 ] %45 = load i32, ptr @WM8974_IFACE, align 4, !tbaa !10 %46 = tail call i32 @snd_soc_write(ptr noundef %3, i32 noundef %45, i32 noundef %44) #2 %47 = load i32, ptr @WM8974_CLOCK, align 4, !tbaa !10 %48 = tail call i32 @snd_soc_write(ptr noundef %3, i32 noundef %47, i32 noundef %15) #2 br label %49 49: ; preds = %43, %40, %20, %11 %50 = phi i32 [ %13, %11 ], [ %22, %20 ], [ %42, %40 ], [ 0, %43 ] ret i32 %50 } declare i32 @snd_soc_read(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @snd_soc_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"snd_soc_dai", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/soc/codecs/extr_wm8974.c_wm8974_set_dai_fmt.c' source_filename = "AnghaBench/fastsocket/kernel/sound/soc/codecs/extr_wm8974.c_wm8974_set_dai_fmt.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @WM8974_CLOCK = common local_unnamed_addr global i32 0, align 4 @SND_SOC_DAIFMT_MASTER_MASK = common local_unnamed_addr global i32 0, align 4 @EINVAL = common local_unnamed_addr global i32 0, align 4 @SND_SOC_DAIFMT_FORMAT_MASK = common local_unnamed_addr global i32 0, align 4 @SND_SOC_DAIFMT_INV_MASK = common local_unnamed_addr global i32 0, align 4 @WM8974_IFACE = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @wm8974_set_dai_fmt], section "llvm.metadata" @switch.table.wm8974_set_dai_fmt = private unnamed_addr constant [8 x i32] [i32 0, i32 16, i32 16, i32 8, i32 16, i32 16, i32 16, i32 24], align 4 ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 -2147483647, -2147483648) i32 @wm8974_set_dai_fmt(ptr nocapture noundef readonly %0, i32 noundef %1) #0 { %3 = load ptr, ptr %0, align 8, !tbaa !6 %4 = load i32, ptr @WM8974_CLOCK, align 4, !tbaa !11 %5 = tail call i32 @snd_soc_read(ptr noundef %3, i32 noundef %4) #2 %6 = and i32 %5, 510 %7 = load i32, ptr @SND_SOC_DAIFMT_MASTER_MASK, align 4, !tbaa !11 %8 = and i32 %7, %1 switch i32 %8, label %11 [ i32 137, label %9 i32 136, label %14 ] 9: ; preds = %2 %10 = or disjoint i32 %6, 1 br label %14 11: ; preds = %2 %12 = load i32, ptr @EINVAL, align 4, !tbaa !11 %13 = sub nsw i32 0, %12 br label %48 14: ; preds = %2, %9 %15 = phi i32 [ %6, %2 ], [ %10, %9 ] %16 = load i32, ptr @SND_SOC_DAIFMT_FORMAT_MASK, align 4, !tbaa !11 %17 = and i32 %16, %1 %18 = add i32 %17, -128 %19 = icmp ult i32 %18, 8 br i1 %19, label %23, label %20 20: ; preds = %23, %14 %21 = load i32, ptr @EINVAL, align 4, !tbaa !11 %22 = sub nsw i32 0, %21 br label %48 23: ; preds = %14 %24 = trunc nuw i32 %18 to i8 %25 = lshr i8 -55, %24 %26 = trunc i8 %25 to i1 br i1 %26, label %27, label %20 27: ; preds = %23 %28 = zext nneg i32 %18 to i64 %29 = getelementptr inbounds [8 x i32], ptr @switch.table.wm8974_set_dai_fmt, i64 0, i64 %28 %30 = load i32, ptr %29, align 4 %31 = load i32, ptr @SND_SOC_DAIFMT_INV_MASK, align 4, !tbaa !11 %32 = and i32 %31, %1 switch i32 %32, label %39 [ i32 129, label %42 i32 133, label %33 i32 132, label %35 i32 130, label %37 ] 33: ; preds = %27 %34 = or disjoint i32 %30, 384 br label %42 35: ; preds = %27 %36 = or disjoint i32 %30, 256 br label %42 37: ; preds = %27 %38 = or disjoint i32 %30, 128 br label %42 39: ; preds = %27 %40 = load i32, ptr @EINVAL, align 4, !tbaa !11 %41 = sub nsw i32 0, %40 br label %48 42: ; preds = %37, %35, %33, %27 %43 = phi i32 [ %38, %37 ], [ %36, %35 ], [ %34, %33 ], [ %30, %27 ] %44 = load i32, ptr @WM8974_IFACE, align 4, !tbaa !11 %45 = tail call i32 @snd_soc_write(ptr noundef %3, i32 noundef %44, i32 noundef %43) #2 %46 = load i32, ptr @WM8974_CLOCK, align 4, !tbaa !11 %47 = tail call i32 @snd_soc_write(ptr noundef %3, i32 noundef %46, i32 noundef %15) #2 br label %48 48: ; preds = %42, %39, %20, %11 %49 = phi i32 [ %13, %11 ], [ %22, %20 ], [ %41, %39 ], [ 0, %42 ] ret i32 %49 } declare i32 @snd_soc_read(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @snd_soc_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"snd_soc_dai", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !12, i64 0} !12 = !{!"int", !9, i64 0}
fastsocket_kernel_sound_soc_codecs_extr_wm8974.c_wm8974_set_dai_fmt
; ModuleID = 'AnghaBench/freebsd/usr.sbin/kbdmap/extr_kbdmap.c_unkludge_desc.c' source_filename = "AnghaBench/freebsd/usr.sbin/kbdmap/extr_kbdmap.c_unkludge_desc.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [5 x i8] c"8x08\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @unkludge_desc], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @unkludge_desc(ptr nocapture noundef readonly %0, i32 noundef %1) #0 { %3 = icmp sgt i32 %1, 0 br i1 %3, label %4, label %36 4: ; preds = %2 %5 = zext nneg i32 %1 to i64 br label %6 6: ; preds = %4, %33 %7 = phi i64 [ 0, %4 ], [ %34, %33 ] %8 = getelementptr inbounds ptr, ptr %0, i64 %7 %9 = load ptr, ptr %8, align 8, !tbaa !5 %10 = load ptr, ptr %9, align 8, !tbaa !9 %11 = tail call ptr @strstr(ptr noundef nonnull dereferenceable(1) %10, ptr noundef nonnull dereferenceable(1) @.str) %12 = icmp eq ptr %11, null br i1 %12, label %33, label %13 13: ; preds = %6 %14 = getelementptr inbounds i8, ptr %11, i64 2 %15 = load i8, ptr %14, align 1, !tbaa !11 %16 = getelementptr inbounds i8, ptr %11, i64 3 %17 = icmp eq i8 %15, 0 br i1 %17, label %24, label %18 18: ; preds = %13, %18 %19 = phi ptr [ %22, %18 ], [ %16, %13 ] %20 = phi ptr [ %19, %18 ], [ %14, %13 ] %21 = load i8, ptr %19, align 1, !tbaa !11 store i8 %21, ptr %20, align 1, !tbaa !11 %22 = getelementptr inbounds i8, ptr %19, i64 1 %23 = icmp eq i8 %21, 0 br i1 %23, label %24, label %18, !llvm.loop !12 24: ; preds = %18, %13 %25 = phi ptr [ %16, %13 ], [ %22, %18 ] %26 = ptrtoint ptr %25 to i64 %27 = ptrtoint ptr %10 to i64 %28 = xor i64 %27, -1 %29 = add i64 %26, %28 %30 = trunc i64 %29 to i32 %31 = tail call ptr @realloc(ptr noundef %10, i32 noundef %30) #3 %32 = load ptr, ptr %8, align 8, !tbaa !5 store ptr %31, ptr %32, align 8, !tbaa !9 br label %33 33: ; preds = %24, %6 %34 = add nuw nsw i64 %7, 1 %35 = icmp eq i64 %34, %5 br i1 %35, label %36, label %6, !llvm.loop !14 36: ; preds = %33, %2 ret void } ; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read) declare ptr @strstr(ptr noundef, ptr nocapture noundef) local_unnamed_addr #1 declare ptr @realloc(ptr noundef, i32 noundef) local_unnamed_addr #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"keymap", !6, i64 0} !11 = !{!7, !7, i64 0} !12 = distinct !{!12, !13} !13 = !{!"llvm.loop.mustprogress"} !14 = distinct !{!14, !13}
; ModuleID = 'AnghaBench/freebsd/usr.sbin/kbdmap/extr_kbdmap.c_unkludge_desc.c' source_filename = "AnghaBench/freebsd/usr.sbin/kbdmap/extr_kbdmap.c_unkludge_desc.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [5 x i8] c"8x08\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @unkludge_desc], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @unkludge_desc(ptr nocapture noundef readonly %0, i32 noundef %1) #0 { %3 = icmp sgt i32 %1, 0 br i1 %3, label %4, label %36 4: ; preds = %2 %5 = zext nneg i32 %1 to i64 br label %6 6: ; preds = %4, %33 %7 = phi i64 [ 0, %4 ], [ %34, %33 ] %8 = getelementptr inbounds ptr, ptr %0, i64 %7 %9 = load ptr, ptr %8, align 8, !tbaa !6 %10 = load ptr, ptr %9, align 8, !tbaa !10 %11 = tail call ptr @strstr(ptr noundef nonnull dereferenceable(1) %10, ptr noundef nonnull dereferenceable(1) @.str) %12 = icmp eq ptr %11, null br i1 %12, label %33, label %13 13: ; preds = %6 %14 = getelementptr inbounds i8, ptr %11, i64 2 %15 = load i8, ptr %14, align 1, !tbaa !12 %16 = getelementptr inbounds i8, ptr %11, i64 3 %17 = icmp eq i8 %15, 0 br i1 %17, label %24, label %18 18: ; preds = %13, %18 %19 = phi ptr [ %22, %18 ], [ %16, %13 ] %20 = phi ptr [ %19, %18 ], [ %14, %13 ] %21 = load i8, ptr %19, align 1, !tbaa !12 store i8 %21, ptr %20, align 1, !tbaa !12 %22 = getelementptr inbounds i8, ptr %19, i64 1 %23 = icmp eq i8 %21, 0 br i1 %23, label %24, label %18, !llvm.loop !13 24: ; preds = %18, %13 %25 = phi ptr [ %16, %13 ], [ %22, %18 ] %26 = ptrtoint ptr %25 to i64 %27 = ptrtoint ptr %10 to i64 %28 = xor i64 %27, -1 %29 = add i64 %26, %28 %30 = trunc i64 %29 to i32 %31 = tail call ptr @realloc(ptr noundef %10, i32 noundef %30) #3 %32 = load ptr, ptr %8, align 8, !tbaa !6 store ptr %31, ptr %32, align 8, !tbaa !10 br label %33 33: ; preds = %24, %6 %34 = add nuw nsw i64 %7, 1 %35 = icmp eq i64 %34, %5 br i1 %35, label %36, label %6, !llvm.loop !15 36: ; preds = %33, %2 ret void } ; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read) declare ptr @strstr(ptr noundef, ptr nocapture noundef) local_unnamed_addr #1 declare ptr @realloc(ptr noundef, i32 noundef) local_unnamed_addr #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nofree nounwind willreturn memory(argmem: read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"keymap", !7, i64 0} !12 = !{!8, !8, i64 0} !13 = distinct !{!13, !14} !14 = !{!"llvm.loop.mustprogress"} !15 = distinct !{!15, !14}
freebsd_usr.sbin_kbdmap_extr_kbdmap.c_unkludge_desc
; ModuleID = 'AnghaBench/linux/drivers/dma/extr_uniphier-mdmac.c_uniphier_mdmac_chan_init.c' source_filename = "AnghaBench/linux/drivers/dma/extr_uniphier-mdmac.c_uniphier_mdmac_chan_init.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.uniphier_mdmac_device = type { i32, i64, ptr } %struct.uniphier_mdmac_chan = type { i32, %struct.TYPE_2__, i64, ptr } %struct.TYPE_2__ = type { i32 } @GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [23 x i8] c"uniphier-mio-dmac-ch%d\00", align 1 @ENOMEM = dso_local local_unnamed_addr global i32 0, align 4 @uniphier_mdmac_interrupt = dso_local local_unnamed_addr global i32 0, align 4 @IRQF_SHARED = dso_local local_unnamed_addr global i32 0, align 4 @UNIPHIER_MDMAC_CH_OFFSET = dso_local local_unnamed_addr global i64 0, align 8 @UNIPHIER_MDMAC_CH_STRIDE = dso_local local_unnamed_addr global i32 0, align 4 @uniphier_mdmac_desc_free = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @uniphier_mdmac_chan_init], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @uniphier_mdmac_chan_init(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 { %4 = getelementptr inbounds %struct.uniphier_mdmac_device, ptr %1, i64 0, i32 2 %5 = load ptr, ptr %4, align 8, !tbaa !5 %6 = sext i32 %2 to i64 %7 = getelementptr inbounds %struct.uniphier_mdmac_chan, ptr %5, i64 %6 %8 = tail call i32 @platform_get_irq(ptr noundef %0, i32 noundef %2) #2 %9 = icmp slt i32 %8, 0 br i1 %9, label %36, label %10 10: ; preds = %3 %11 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !12 %12 = tail call ptr @devm_kasprintf(ptr noundef %0, i32 noundef %11, ptr noundef nonnull @.str, i32 noundef %2) #2 %13 = icmp eq ptr %12, null br i1 %13, label %14, label %17 14: ; preds = %10 %15 = load i32, ptr @ENOMEM, align 4, !tbaa !12 %16 = sub nsw i32 0, %15 br label %36 17: ; preds = %10 %18 = load i32, ptr @uniphier_mdmac_interrupt, align 4, !tbaa !12 %19 = load i32, ptr @IRQF_SHARED, align 4, !tbaa !12 %20 = tail call i32 @devm_request_irq(ptr noundef %0, i32 noundef %8, i32 noundef %18, i32 noundef %19, ptr noundef nonnull %12, ptr noundef %7) #2 %21 = icmp eq i32 %20, 0 br i1 %21, label %22, label %36 22: ; preds = %17 %23 = getelementptr inbounds %struct.uniphier_mdmac_chan, ptr %5, i64 %6, i32 3 store ptr %1, ptr %23, align 8, !tbaa !13 %24 = getelementptr inbounds %struct.uniphier_mdmac_device, ptr %1, i64 0, i32 1 %25 = load i64, ptr %24, align 8, !tbaa !16 %26 = load i64, ptr @UNIPHIER_MDMAC_CH_OFFSET, align 8, !tbaa !17 %27 = add nsw i64 %26, %25 %28 = load i32, ptr @UNIPHIER_MDMAC_CH_STRIDE, align 4, !tbaa !12 %29 = mul nsw i32 %28, %2 %30 = sext i32 %29 to i64 %31 = add nsw i64 %27, %30 %32 = getelementptr inbounds %struct.uniphier_mdmac_chan, ptr %5, i64 %6, i32 2 store i64 %31, ptr %32, align 8, !tbaa !18 store i32 %2, ptr %7, align 8, !tbaa !19 %33 = load i32, ptr @uniphier_mdmac_desc_free, align 4, !tbaa !12 %34 = getelementptr inbounds %struct.uniphier_mdmac_chan, ptr %5, i64 %6, i32 1 store i32 %33, ptr %34, align 4, !tbaa !20 %35 = tail call i32 @vchan_init(ptr noundef nonnull %34, ptr noundef nonnull %1) #2 br label %36 36: ; preds = %17, %3, %22, %14 %37 = phi i32 [ 0, %22 ], [ %16, %14 ], [ %8, %3 ], [ %20, %17 ] ret i32 %37 } declare i32 @platform_get_irq(ptr noundef, i32 noundef) local_unnamed_addr #1 declare ptr @devm_kasprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @devm_request_irq(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @vchan_init(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !11, i64 16} !6 = !{!"uniphier_mdmac_device", !7, i64 0, !10, i64 8, !11, i64 16} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"long", !8, i64 0} !11 = !{!"any pointer", !8, i64 0} !12 = !{!7, !7, i64 0} !13 = !{!14, !11, i64 16} !14 = !{!"uniphier_mdmac_chan", !7, i64 0, !15, i64 4, !10, i64 8, !11, i64 16} !15 = !{!"TYPE_2__", !7, i64 0} !16 = !{!6, !10, i64 8} !17 = !{!10, !10, i64 0} !18 = !{!14, !10, i64 8} !19 = !{!14, !7, i64 0} !20 = !{!14, !7, i64 4}
; ModuleID = 'AnghaBench/linux/drivers/dma/extr_uniphier-mdmac.c_uniphier_mdmac_chan_init.c' source_filename = "AnghaBench/linux/drivers/dma/extr_uniphier-mdmac.c_uniphier_mdmac_chan_init.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.uniphier_mdmac_chan = type { i32, %struct.TYPE_2__, i64, ptr } %struct.TYPE_2__ = type { i32 } @GFP_KERNEL = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [23 x i8] c"uniphier-mio-dmac-ch%d\00", align 1 @ENOMEM = common local_unnamed_addr global i32 0, align 4 @uniphier_mdmac_interrupt = common local_unnamed_addr global i32 0, align 4 @IRQF_SHARED = common local_unnamed_addr global i32 0, align 4 @UNIPHIER_MDMAC_CH_OFFSET = common local_unnamed_addr global i64 0, align 8 @UNIPHIER_MDMAC_CH_STRIDE = common local_unnamed_addr global i32 0, align 4 @uniphier_mdmac_desc_free = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @uniphier_mdmac_chan_init], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @uniphier_mdmac_chan_init(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 { %4 = getelementptr inbounds i8, ptr %1, i64 16 %5 = load ptr, ptr %4, align 8, !tbaa !6 %6 = sext i32 %2 to i64 %7 = getelementptr inbounds %struct.uniphier_mdmac_chan, ptr %5, i64 %6 %8 = tail call i32 @platform_get_irq(ptr noundef %0, i32 noundef %2) #2 %9 = icmp slt i32 %8, 0 br i1 %9, label %36, label %10 10: ; preds = %3 %11 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !13 %12 = tail call ptr @devm_kasprintf(ptr noundef %0, i32 noundef %11, ptr noundef nonnull @.str, i32 noundef %2) #2 %13 = icmp eq ptr %12, null br i1 %13, label %14, label %17 14: ; preds = %10 %15 = load i32, ptr @ENOMEM, align 4, !tbaa !13 %16 = sub nsw i32 0, %15 br label %36 17: ; preds = %10 %18 = load i32, ptr @uniphier_mdmac_interrupt, align 4, !tbaa !13 %19 = load i32, ptr @IRQF_SHARED, align 4, !tbaa !13 %20 = tail call i32 @devm_request_irq(ptr noundef %0, i32 noundef %8, i32 noundef %18, i32 noundef %19, ptr noundef nonnull %12, ptr noundef %7) #2 %21 = icmp eq i32 %20, 0 br i1 %21, label %22, label %36 22: ; preds = %17 %23 = getelementptr inbounds i8, ptr %7, i64 16 store ptr %1, ptr %23, align 8, !tbaa !14 %24 = getelementptr inbounds i8, ptr %1, i64 8 %25 = load i64, ptr %24, align 8, !tbaa !17 %26 = load i64, ptr @UNIPHIER_MDMAC_CH_OFFSET, align 8, !tbaa !18 %27 = add nsw i64 %26, %25 %28 = load i32, ptr @UNIPHIER_MDMAC_CH_STRIDE, align 4, !tbaa !13 %29 = mul nsw i32 %28, %2 %30 = sext i32 %29 to i64 %31 = add nsw i64 %27, %30 %32 = getelementptr inbounds i8, ptr %7, i64 8 store i64 %31, ptr %32, align 8, !tbaa !19 store i32 %2, ptr %7, align 8, !tbaa !20 %33 = load i32, ptr @uniphier_mdmac_desc_free, align 4, !tbaa !13 %34 = getelementptr inbounds i8, ptr %7, i64 4 store i32 %33, ptr %34, align 4, !tbaa !21 %35 = tail call i32 @vchan_init(ptr noundef nonnull %34, ptr noundef nonnull %1) #2 br label %36 36: ; preds = %17, %3, %22, %14 %37 = phi i32 [ 0, %22 ], [ %16, %14 ], [ %8, %3 ], [ %20, %17 ] ret i32 %37 } declare i32 @platform_get_irq(ptr noundef, i32 noundef) local_unnamed_addr #1 declare ptr @devm_kasprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @devm_request_irq(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @vchan_init(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !12, i64 16} !7 = !{!"uniphier_mdmac_device", !8, i64 0, !11, i64 8, !12, i64 16} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"long", !9, i64 0} !12 = !{!"any pointer", !9, i64 0} !13 = !{!8, !8, i64 0} !14 = !{!15, !12, i64 16} !15 = !{!"uniphier_mdmac_chan", !8, i64 0, !16, i64 4, !11, i64 8, !12, i64 16} !16 = !{!"TYPE_2__", !8, i64 0} !17 = !{!7, !11, i64 8} !18 = !{!11, !11, i64 0} !19 = !{!15, !11, i64 8} !20 = !{!15, !8, i64 0} !21 = !{!15, !8, i64 4}
linux_drivers_dma_extr_uniphier-mdmac.c_uniphier_mdmac_chan_init
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/i386/extr_mp.c_cpu_signal_handler.c' source_filename = "AnghaBench/darwin-xnu/osfmk/i386/extr_mp.c_cpu_signal_handler.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_4__ = type { i32, i32 } @cpu_data_ptr = dso_local local_unnamed_addr global ptr null, align 8 @MP_TLB_FLUSH = dso_local local_unnamed_addr global i32 0, align 4 @cpu_handle = dso_local local_unnamed_addr global i32 0, align 4 @MP_CALL = dso_local local_unnamed_addr global i32 0, align 4 @MP_CALL_PM = dso_local local_unnamed_addr global i32 0, align 4 @MP_AST = dso_local local_unnamed_addr global i32 0, align 4 @FALSE = dso_local local_unnamed_addr global i32 0, align 4 @MP_KDP = dso_local local_unnamed_addr global i32 0, align 4 @PM_SAFE_FL_NORMAL = dso_local local_unnamed_addr global i32 0, align 4 @PM_SAFE_FL_SAFE = dso_local local_unnamed_addr global i32 0, align 4 @TRUE = dso_local local_unnamed_addr global i32 0, align 4 @kdp_snapshot = dso_local local_unnamed_addr global i32 0, align 4 @pmsafe_debug = dso_local local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind uwtable define dso_local noundef i32 @cpu_signal_handler(ptr noundef readnone %0) local_unnamed_addr #0 { %2 = tail call i32 (...) @current_processor() #2 %3 = tail call i32 @SCHED_STATS_IPI(i32 noundef %2) #2 %4 = tail call i32 (...) @cpu_number() #2 %5 = load ptr, ptr @cpu_data_ptr, align 8, !tbaa !5 %6 = sext i32 %4 to i64 %7 = getelementptr inbounds ptr, ptr %5, i64 %6 %8 = load ptr, ptr %7, align 8, !tbaa !5 %9 = load volatile i32, ptr %8, align 4, !tbaa !9 %10 = getelementptr inbounds %struct.TYPE_4__, ptr %8, i64 0, i32 1 store i32 %9, ptr %10, align 4, !tbaa !11 %11 = icmp eq ptr %0, null br label %12 12: ; preds = %58, %1 %13 = load i32, ptr @MP_TLB_FLUSH, align 4, !tbaa !9 %14 = tail call i64 @i_bit(i32 noundef %13, ptr noundef nonnull %8) #2 %15 = icmp eq i64 %14, 0 br i1 %15, label %23, label %16 16: ; preds = %12 %17 = load i32, ptr @cpu_handle, align 4, !tbaa !9 %18 = load i32, ptr @MP_TLB_FLUSH, align 4, !tbaa !9 %19 = tail call i32 @DBGLOG(i32 noundef %17, i32 noundef %4, i32 noundef %18) #2 %20 = load i32, ptr @MP_TLB_FLUSH, align 4, !tbaa !9 %21 = tail call i32 @i_bit_clear(i32 noundef %20, ptr noundef nonnull %8) #2 %22 = tail call i32 (...) @pmap_update_interrupt() #2 br label %45 23: ; preds = %12 %24 = load i32, ptr @MP_CALL, align 4, !tbaa !9 %25 = tail call i64 @i_bit(i32 noundef %24, ptr noundef nonnull %8) #2 %26 = icmp eq i64 %25, 0 br i1 %26, label %34, label %27 27: ; preds = %23 %28 = load i32, ptr @cpu_handle, align 4, !tbaa !9 %29 = load i32, ptr @MP_CALL, align 4, !tbaa !9 %30 = tail call i32 @DBGLOG(i32 noundef %28, i32 noundef %4, i32 noundef %29) #2 %31 = load i32, ptr @MP_CALL, align 4, !tbaa !9 %32 = tail call i32 @i_bit_clear(i32 noundef %31, ptr noundef nonnull %8) #2 %33 = tail call i32 (...) @mp_cpus_call_action() #2 br label %45 34: ; preds = %23 %35 = load i32, ptr @MP_CALL_PM, align 4, !tbaa !9 %36 = tail call i64 @i_bit(i32 noundef %35, ptr noundef nonnull %8) #2 %37 = icmp eq i64 %36, 0 br i1 %37, label %45, label %38 38: ; preds = %34 %39 = load i32, ptr @cpu_handle, align 4, !tbaa !9 %40 = load i32, ptr @MP_CALL_PM, align 4, !tbaa !9 %41 = tail call i32 @DBGLOG(i32 noundef %39, i32 noundef %4, i32 noundef %40) #2 %42 = load i32, ptr @MP_CALL_PM, align 4, !tbaa !9 %43 = tail call i32 @i_bit_clear(i32 noundef %42, ptr noundef nonnull %8) #2 %44 = tail call i32 (...) @mp_call_PM() #2 br label %45 45: ; preds = %27, %38, %34, %16 br i1 %11, label %61, label %46 46: ; preds = %45 %47 = load i32, ptr @MP_AST, align 4, !tbaa !9 %48 = tail call i64 @i_bit(i32 noundef %47, ptr noundef nonnull %8) #2 %49 = icmp eq i64 %48, 0 br i1 %49, label %58, label %50 50: ; preds = %46 %51 = load i32, ptr @cpu_handle, align 4, !tbaa !9 %52 = load i32, ptr @MP_AST, align 4, !tbaa !9 %53 = tail call i32 @DBGLOG(i32 noundef %51, i32 noundef %4, i32 noundef %52) #2 %54 = load i32, ptr @MP_AST, align 4, !tbaa !9 %55 = tail call i32 @i_bit_clear(i32 noundef %54, ptr noundef nonnull %8) #2 %56 = tail call i32 @cpu_to_processor(i32 noundef %4) #2 %57 = tail call i32 @ast_check(i32 noundef %56) #2 br label %58 58: ; preds = %50, %46 %59 = load volatile i32, ptr %8, align 4, !tbaa !9 %60 = icmp eq i32 %59, 0 br i1 %60, label %61, label %12, !llvm.loop !13 61: ; preds = %45, %58 ret i32 0 } declare i32 @SCHED_STATS_IPI(i32 noundef) local_unnamed_addr #1 declare i32 @current_processor(...) local_unnamed_addr #1 declare i32 @cpu_number(...) local_unnamed_addr #1 declare i64 @i_bit(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @DBGLOG(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @i_bit_clear(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @pmap_update_interrupt(...) local_unnamed_addr #1 declare i32 @mp_cpus_call_action(...) local_unnamed_addr #1 declare i32 @mp_call_PM(...) local_unnamed_addr #1 declare i32 @ast_check(i32 noundef) local_unnamed_addr #1 declare i32 @cpu_to_processor(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"int", !7, i64 0} !11 = !{!12, !10, i64 4} !12 = !{!"TYPE_4__", !10, i64 0, !10, i64 4} !13 = distinct !{!13, !14} !14 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/i386/extr_mp.c_cpu_signal_handler.c' source_filename = "AnghaBench/darwin-xnu/osfmk/i386/extr_mp.c_cpu_signal_handler.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @cpu_data_ptr = common local_unnamed_addr global ptr null, align 8 @MP_TLB_FLUSH = common local_unnamed_addr global i32 0, align 4 @cpu_handle = common local_unnamed_addr global i32 0, align 4 @MP_CALL = common local_unnamed_addr global i32 0, align 4 @MP_CALL_PM = common local_unnamed_addr global i32 0, align 4 @MP_AST = common local_unnamed_addr global i32 0, align 4 @FALSE = common local_unnamed_addr global i32 0, align 4 @MP_KDP = common local_unnamed_addr global i32 0, align 4 @PM_SAFE_FL_NORMAL = common local_unnamed_addr global i32 0, align 4 @PM_SAFE_FL_SAFE = common local_unnamed_addr global i32 0, align 4 @TRUE = common local_unnamed_addr global i32 0, align 4 @kdp_snapshot = common local_unnamed_addr global i32 0, align 4 @pmsafe_debug = common local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind ssp uwtable(sync) define noundef i32 @cpu_signal_handler(ptr noundef readnone %0) local_unnamed_addr #0 { %2 = tail call i32 @current_processor() #2 %3 = tail call i32 @SCHED_STATS_IPI(i32 noundef %2) #2 %4 = tail call i32 @cpu_number() #2 %5 = load ptr, ptr @cpu_data_ptr, align 8, !tbaa !6 %6 = sext i32 %4 to i64 %7 = getelementptr inbounds ptr, ptr %5, i64 %6 %8 = load ptr, ptr %7, align 8, !tbaa !6 %9 = load volatile i32, ptr %8, align 4, !tbaa !10 %10 = getelementptr inbounds i8, ptr %8, i64 4 store i32 %9, ptr %10, align 4, !tbaa !12 %11 = icmp eq ptr %0, null br label %12 12: ; preds = %58, %1 %13 = load i32, ptr @MP_TLB_FLUSH, align 4, !tbaa !10 %14 = tail call i64 @i_bit(i32 noundef %13, ptr noundef nonnull %8) #2 %15 = icmp eq i64 %14, 0 br i1 %15, label %23, label %16 16: ; preds = %12 %17 = load i32, ptr @cpu_handle, align 4, !tbaa !10 %18 = load i32, ptr @MP_TLB_FLUSH, align 4, !tbaa !10 %19 = tail call i32 @DBGLOG(i32 noundef %17, i32 noundef %4, i32 noundef %18) #2 %20 = load i32, ptr @MP_TLB_FLUSH, align 4, !tbaa !10 %21 = tail call i32 @i_bit_clear(i32 noundef %20, ptr noundef nonnull %8) #2 %22 = tail call i32 @pmap_update_interrupt() #2 br label %45 23: ; preds = %12 %24 = load i32, ptr @MP_CALL, align 4, !tbaa !10 %25 = tail call i64 @i_bit(i32 noundef %24, ptr noundef nonnull %8) #2 %26 = icmp eq i64 %25, 0 br i1 %26, label %34, label %27 27: ; preds = %23 %28 = load i32, ptr @cpu_handle, align 4, !tbaa !10 %29 = load i32, ptr @MP_CALL, align 4, !tbaa !10 %30 = tail call i32 @DBGLOG(i32 noundef %28, i32 noundef %4, i32 noundef %29) #2 %31 = load i32, ptr @MP_CALL, align 4, !tbaa !10 %32 = tail call i32 @i_bit_clear(i32 noundef %31, ptr noundef nonnull %8) #2 %33 = tail call i32 @mp_cpus_call_action() #2 br label %45 34: ; preds = %23 %35 = load i32, ptr @MP_CALL_PM, align 4, !tbaa !10 %36 = tail call i64 @i_bit(i32 noundef %35, ptr noundef nonnull %8) #2 %37 = icmp eq i64 %36, 0 br i1 %37, label %45, label %38 38: ; preds = %34 %39 = load i32, ptr @cpu_handle, align 4, !tbaa !10 %40 = load i32, ptr @MP_CALL_PM, align 4, !tbaa !10 %41 = tail call i32 @DBGLOG(i32 noundef %39, i32 noundef %4, i32 noundef %40) #2 %42 = load i32, ptr @MP_CALL_PM, align 4, !tbaa !10 %43 = tail call i32 @i_bit_clear(i32 noundef %42, ptr noundef nonnull %8) #2 %44 = tail call i32 @mp_call_PM() #2 br label %45 45: ; preds = %27, %38, %34, %16 br i1 %11, label %61, label %46 46: ; preds = %45 %47 = load i32, ptr @MP_AST, align 4, !tbaa !10 %48 = tail call i64 @i_bit(i32 noundef %47, ptr noundef nonnull %8) #2 %49 = icmp eq i64 %48, 0 br i1 %49, label %58, label %50 50: ; preds = %46 %51 = load i32, ptr @cpu_handle, align 4, !tbaa !10 %52 = load i32, ptr @MP_AST, align 4, !tbaa !10 %53 = tail call i32 @DBGLOG(i32 noundef %51, i32 noundef %4, i32 noundef %52) #2 %54 = load i32, ptr @MP_AST, align 4, !tbaa !10 %55 = tail call i32 @i_bit_clear(i32 noundef %54, ptr noundef nonnull %8) #2 %56 = tail call i32 @cpu_to_processor(i32 noundef %4) #2 %57 = tail call i32 @ast_check(i32 noundef %56) #2 br label %58 58: ; preds = %50, %46 %59 = load volatile i32, ptr %8, align 4, !tbaa !10 %60 = icmp eq i32 %59, 0 br i1 %60, label %61, label %12, !llvm.loop !14 61: ; preds = %45, %58 ret i32 0 } declare i32 @SCHED_STATS_IPI(i32 noundef) local_unnamed_addr #1 declare i32 @current_processor(...) local_unnamed_addr #1 declare i32 @cpu_number(...) local_unnamed_addr #1 declare i64 @i_bit(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @DBGLOG(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @i_bit_clear(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @pmap_update_interrupt(...) local_unnamed_addr #1 declare i32 @mp_cpus_call_action(...) local_unnamed_addr #1 declare i32 @mp_call_PM(...) local_unnamed_addr #1 declare i32 @ast_check(i32 noundef) local_unnamed_addr #1 declare i32 @cpu_to_processor(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0} !12 = !{!13, !11, i64 4} !13 = !{!"TYPE_4__", !11, i64 0, !11, i64 4} !14 = distinct !{!14, !15} !15 = !{!"llvm.loop.mustprogress"}
darwin-xnu_osfmk_i386_extr_mp.c_cpu_signal_handler
; ModuleID = 'AnghaBench/linux/drivers/s390/block/extr_dasd.c_dasd_sleep_on_interruptible.c' source_filename = "AnghaBench/linux/drivers/s390/block/extr_dasd.c_dasd_sleep_on_interruptible.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local i32 @dasd_sleep_on_interruptible(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call i32 @_dasd_sleep_on(ptr noundef %0, i32 noundef 1) #2 ret i32 %2 } declare i32 @_dasd_sleep_on(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/linux/drivers/s390/block/extr_dasd.c_dasd_sleep_on_interruptible.c' source_filename = "AnghaBench/linux/drivers/s390/block/extr_dasd.c_dasd_sleep_on_interruptible.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define i32 @dasd_sleep_on_interruptible(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call i32 @_dasd_sleep_on(ptr noundef %0, i32 noundef 1) #2 ret i32 %2 } declare i32 @_dasd_sleep_on(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
linux_drivers_s390_block_extr_dasd.c_dasd_sleep_on_interruptible
; ModuleID = 'AnghaBench/sqlcipher/ext/fts3/extr_fts3_porter.c_porter_stemmer.c' source_filename = "AnghaBench/sqlcipher/ext/fts3/extr_fts3_porter.c_porter_stemmer.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [5 x i8] c"sess\00", align 1 @.str.1 = private unnamed_addr constant [3 x i8] c"ss\00", align 1 @.str.2 = private unnamed_addr constant [4 x i8] c"sei\00", align 1 @.str.3 = private unnamed_addr constant [2 x i8] c"i\00", align 1 @.str.4 = private unnamed_addr constant [4 x i8] c"dee\00", align 1 @.str.5 = private unnamed_addr constant [3 x i8] c"ee\00", align 1 @.str.6 = private unnamed_addr constant [4 x i8] c"gni\00", align 1 @.str.7 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1 @.str.8 = private unnamed_addr constant [3 x i8] c"de\00", align 1 @.str.9 = private unnamed_addr constant [3 x i8] c"ta\00", align 1 @.str.10 = private unnamed_addr constant [4 x i8] c"ate\00", align 1 @.str.11 = private unnamed_addr constant [3 x i8] c"lb\00", align 1 @.str.12 = private unnamed_addr constant [4 x i8] c"ble\00", align 1 @.str.13 = private unnamed_addr constant [3 x i8] c"zi\00", align 1 @.str.14 = private unnamed_addr constant [4 x i8] c"ize\00", align 1 @.str.15 = private unnamed_addr constant [8 x i8] c"lanoita\00", align 1 @.str.16 = private unnamed_addr constant [7 x i8] c"lanoit\00", align 1 @.str.17 = private unnamed_addr constant [5 x i8] c"tion\00", align 1 @.str.18 = private unnamed_addr constant [5 x i8] c"icne\00", align 1 @.str.19 = private unnamed_addr constant [5 x i8] c"ence\00", align 1 @.str.20 = private unnamed_addr constant [5 x i8] c"icna\00", align 1 @.str.21 = private unnamed_addr constant [5 x i8] c"ance\00", align 1 @.str.22 = private unnamed_addr constant [5 x i8] c"rezi\00", align 1 @.str.23 = private unnamed_addr constant [5 x i8] c"igol\00", align 1 @.str.24 = private unnamed_addr constant [4 x i8] c"log\00", align 1 @.str.25 = private unnamed_addr constant [4 x i8] c"ilb\00", align 1 @.str.26 = private unnamed_addr constant [5 x i8] c"illa\00", align 1 @.str.27 = private unnamed_addr constant [3 x i8] c"al\00", align 1 @.str.28 = private unnamed_addr constant [6 x i8] c"iltne\00", align 1 @.str.29 = private unnamed_addr constant [4 x i8] c"ent\00", align 1 @.str.30 = private unnamed_addr constant [4 x i8] c"ile\00", align 1 @.str.31 = private unnamed_addr constant [2 x i8] c"e\00", align 1 @.str.32 = private unnamed_addr constant [6 x i8] c"ilsuo\00", align 1 @.str.33 = private unnamed_addr constant [4 x i8] c"ous\00", align 1 @.str.34 = private unnamed_addr constant [8 x i8] c"noitazi\00", align 1 @.str.35 = private unnamed_addr constant [6 x i8] c"noita\00", align 1 @.str.36 = private unnamed_addr constant [5 x i8] c"rota\00", align 1 @.str.37 = private unnamed_addr constant [6 x i8] c"msila\00", align 1 @.str.38 = private unnamed_addr constant [8 x i8] c"ssenevi\00", align 1 @.str.39 = private unnamed_addr constant [4 x i8] c"ive\00", align 1 @.str.40 = private unnamed_addr constant [8 x i8] c"ssenluf\00", align 1 @.str.41 = private unnamed_addr constant [4 x i8] c"ful\00", align 1 @.str.42 = private unnamed_addr constant [8 x i8] c"ssensuo\00", align 1 @.str.43 = private unnamed_addr constant [6 x i8] c"itila\00", align 1 @.str.44 = private unnamed_addr constant [6 x i8] c"itivi\00", align 1 @.str.45 = private unnamed_addr constant [7 x i8] c"itilib\00", align 1 @.str.46 = private unnamed_addr constant [6 x i8] c"etaci\00", align 1 @.str.47 = private unnamed_addr constant [3 x i8] c"ic\00", align 1 @.str.48 = private unnamed_addr constant [6 x i8] c"evita\00", align 1 @.str.49 = private unnamed_addr constant [6 x i8] c"ezila\00", align 1 @.str.50 = private unnamed_addr constant [6 x i8] c"itici\00", align 1 @.str.51 = private unnamed_addr constant [5 x i8] c"laci\00", align 1 @.str.52 = private unnamed_addr constant [4 x i8] c"luf\00", align 1 @.str.53 = private unnamed_addr constant [5 x i8] c"ssen\00", align 1 @.str.54 = private unnamed_addr constant [6 x i8] c"tneme\00", align 1 @.str.55 = private unnamed_addr constant [5 x i8] c"tnem\00", align 1 @.str.56 = private unnamed_addr constant [4 x i8] c"tne\00", align 1 @.str.57 = private unnamed_addr constant [4 x i8] c"noi\00", align 1 @.str.58 = private unnamed_addr constant [4 x i8] c"eta\00", align 1 @.str.59 = private unnamed_addr constant [4 x i8] c"iti\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @porter_stemmer], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @porter_stemmer(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 { %5 = alloca [28 x i8], align 16 %6 = alloca ptr, align 8 call void @llvm.lifetime.start.p0(i64 28, ptr nonnull %5) #4 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #4 %7 = add i32 %1, -21 %8 = icmp ult i32 %7, -18 br i1 %8, label %11, label %9 9: ; preds = %4 %10 = zext nneg i32 %1 to i64 br label %13 11: ; preds = %4 %12 = tail call i32 @copy_stemmer(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #4 br label %396 13: ; preds = %9, %27 %14 = phi i64 [ 22, %9 ], [ %31, %27 ] %15 = phi i64 [ 0, %9 ], [ %30, %27 ] %16 = getelementptr inbounds i8, ptr %0, i64 %15 %17 = load i8, ptr %16, align 1, !tbaa !5 %18 = add i8 %17, -65 %19 = icmp ult i8 %18, 26 br i1 %19, label %20, label %22 20: ; preds = %13 %21 = or disjoint i8 %17, 32 br label %27 22: ; preds = %13 %23 = add i8 %17, -97 %24 = icmp ult i8 %23, 26 br i1 %24, label %27, label %25 25: ; preds = %22 %26 = tail call i32 @copy_stemmer(ptr noundef nonnull %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #4 br label %396 27: ; preds = %22, %20 %28 = phi i8 [ %21, %20 ], [ %17, %22 ] %29 = getelementptr inbounds [28 x i8], ptr %5, i64 0, i64 %14 store i8 %28, ptr %29, align 1, !tbaa !5 %30 = add nuw nsw i64 %15, 1 %31 = add nsw i64 %14, -1 %32 = icmp eq i64 %30, %10 br i1 %32, label %33, label %13, !llvm.loop !8 33: ; preds = %27 %34 = getelementptr inbounds [28 x i8], ptr %5, i64 0, i64 23 %35 = call i32 @memset(ptr noundef nonnull %34, i32 noundef 0, i32 noundef 5) #4 %36 = shl i64 %14, 32 %37 = ashr exact i64 %36, 32 %38 = getelementptr inbounds [28 x i8], ptr %5, i64 0, i64 %37 store ptr %38, ptr %6, align 8, !tbaa !10 %39 = load i8, ptr %38, align 1, !tbaa !5 %40 = icmp eq i8 %39, 115 br i1 %40, label %41, label %53 41: ; preds = %33 %42 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, ptr noundef null) #4 %43 = icmp eq i64 %42, 0 br i1 %43, label %44, label %53 44: ; preds = %41 %45 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3, ptr noundef null) #4 %46 = icmp eq i64 %45, 0 br i1 %46, label %47, label %53 47: ; preds = %44 %48 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.1, ptr noundef null) #4 %49 = icmp eq i64 %48, 0 br i1 %49, label %50, label %53 50: ; preds = %47 %51 = load ptr, ptr %6, align 8, !tbaa !10 %52 = getelementptr inbounds i8, ptr %51, i64 1 store ptr %52, ptr %6, align 8, !tbaa !10 br label %53 53: ; preds = %41, %44, %47, %50, %33 %54 = load ptr, ptr %6, align 8, !tbaa !10 %55 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.5, ptr noundef nonnull @m_gt_0) #4 %56 = icmp eq i64 %55, 0 br i1 %56, label %57, label %97 57: ; preds = %53 %58 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.7, ptr noundef nonnull @hasVowel) #4 %59 = icmp eq i64 %58, 0 br i1 %59, label %60, label %66 60: ; preds = %57 %61 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.8, ptr noundef nonnull @.str.7, ptr noundef nonnull @hasVowel) #4 %62 = icmp eq i64 %61, 0 %63 = load ptr, ptr %6, align 8 %64 = icmp eq ptr %63, %54 %65 = select i1 %62, i1 true, i1 %64 br i1 %65, label %97, label %69 66: ; preds = %57 %67 = load ptr, ptr %6, align 8, !tbaa !10 %68 = icmp eq ptr %67, %54 br i1 %68, label %97, label %69 69: ; preds = %60, %66 %70 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.10, ptr noundef null) #4 %71 = icmp eq i64 %70, 0 br i1 %71, label %72, label %97 72: ; preds = %69 %73 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.12, ptr noundef null) #4 %74 = icmp eq i64 %73, 0 br i1 %74, label %75, label %97 75: ; preds = %72 %76 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.13, ptr noundef nonnull @.str.14, ptr noundef null) #4 %77 = icmp eq i64 %76, 0 br i1 %77, label %78, label %97 78: ; preds = %75 %79 = load ptr, ptr %6, align 8, !tbaa !10 %80 = call i64 @doubleConsonant(ptr noundef %79) #4 %81 = icmp eq i64 %80, 0 %82 = load ptr, ptr %6, align 8, !tbaa !10 br i1 %81, label %87, label %83 83: ; preds = %78 %84 = load i8, ptr %82, align 1, !tbaa !5 switch i8 %84, label %85 [ i8 108, label %87 i8 115, label %87 i8 122, label %87 ] 85: ; preds = %83 %86 = getelementptr inbounds i8, ptr %82, i64 1 store ptr %86, ptr %6, align 8, !tbaa !10 br label %97 87: ; preds = %83, %83, %83, %78 %88 = call i64 @m_eq_1(ptr noundef %82) #4 %89 = icmp eq i64 %88, 0 br i1 %89, label %97, label %90 90: ; preds = %87 %91 = load ptr, ptr %6, align 8, !tbaa !10 %92 = call i64 @star_oh(ptr noundef %91) #4 %93 = icmp eq i64 %92, 0 br i1 %93, label %97, label %94 94: ; preds = %90 %95 = load ptr, ptr %6, align 8, !tbaa !10 %96 = getelementptr inbounds i8, ptr %95, i64 -1 store ptr %96, ptr %6, align 8, !tbaa !10 store i8 101, ptr %96, align 1, !tbaa !5 br label %97 97: ; preds = %60, %66, %85, %94, %90, %87, %69, %72, %75, %53 %98 = load ptr, ptr %6, align 8, !tbaa !10 %99 = load i8, ptr %98, align 1, !tbaa !5 %100 = icmp eq i8 %99, 121 br i1 %100, label %101, label %108 101: ; preds = %97 %102 = getelementptr inbounds i8, ptr %98, i64 1 %103 = call i64 @hasVowel(ptr noundef nonnull %102) #4 %104 = icmp eq i64 %103, 0 %105 = load ptr, ptr %6, align 8, !tbaa !10 br i1 %104, label %108, label %106 106: ; preds = %101 store i8 105, ptr %105, align 1, !tbaa !5 %107 = load ptr, ptr %6, align 8, !tbaa !10 br label %108 108: ; preds = %106, %101, %97 %109 = phi ptr [ %107, %106 ], [ %105, %101 ], [ %98, %97 ] %110 = getelementptr inbounds i8, ptr %109, i64 1 %111 = load i8, ptr %110, align 1, !tbaa !5 switch i8 %111, label %167 [ i8 97, label %112 i8 99, label %117 i8 101, label %122 i8 103, label %124 i8 108, label %126 i8 111, label %140 i8 115, label %148 i8 116, label %159 ] 112: ; preds = %108 %113 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.15, ptr noundef nonnull @.str.10, ptr noundef nonnull @m_gt_0) #4 %114 = icmp eq i64 %113, 0 br i1 %114, label %115, label %167 115: ; preds = %112 %116 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.16, ptr noundef nonnull @.str.17, ptr noundef nonnull @m_gt_0) #4 br label %167 117: ; preds = %108 %118 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.18, ptr noundef nonnull @.str.19, ptr noundef nonnull @m_gt_0) #4 %119 = icmp eq i64 %118, 0 br i1 %119, label %120, label %167 120: ; preds = %117 %121 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.20, ptr noundef nonnull @.str.21, ptr noundef nonnull @m_gt_0) #4 br label %167 122: ; preds = %108 %123 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.22, ptr noundef nonnull @.str.14, ptr noundef nonnull @m_gt_0) #4 br label %167 124: ; preds = %108 %125 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.23, ptr noundef nonnull @.str.24, ptr noundef nonnull @m_gt_0) #4 br label %167 126: ; preds = %108 %127 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.25, ptr noundef nonnull @.str.12, ptr noundef nonnull @m_gt_0) #4 %128 = icmp eq i64 %127, 0 br i1 %128, label %129, label %167 129: ; preds = %126 %130 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.26, ptr noundef nonnull @.str.27, ptr noundef nonnull @m_gt_0) #4 %131 = icmp eq i64 %130, 0 br i1 %131, label %132, label %167 132: ; preds = %129 %133 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.28, ptr noundef nonnull @.str.29, ptr noundef nonnull @m_gt_0) #4 %134 = icmp eq i64 %133, 0 br i1 %134, label %135, label %167 135: ; preds = %132 %136 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.30, ptr noundef nonnull @.str.31, ptr noundef nonnull @m_gt_0) #4 %137 = icmp eq i64 %136, 0 br i1 %137, label %138, label %167 138: ; preds = %135 %139 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.32, ptr noundef nonnull @.str.33, ptr noundef nonnull @m_gt_0) #4 br label %167 140: ; preds = %108 %141 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.34, ptr noundef nonnull @.str.14, ptr noundef nonnull @m_gt_0) #4 %142 = icmp eq i64 %141, 0 br i1 %142, label %143, label %167 143: ; preds = %140 %144 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.35, ptr noundef nonnull @.str.10, ptr noundef nonnull @m_gt_0) #4 %145 = icmp eq i64 %144, 0 br i1 %145, label %146, label %167 146: ; preds = %143 %147 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.36, ptr noundef nonnull @.str.10, ptr noundef nonnull @m_gt_0) #4 br label %167 148: ; preds = %108 %149 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.37, ptr noundef nonnull @.str.27, ptr noundef nonnull @m_gt_0) #4 %150 = icmp eq i64 %149, 0 br i1 %150, label %151, label %167 151: ; preds = %148 %152 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.38, ptr noundef nonnull @.str.39, ptr noundef nonnull @m_gt_0) #4 %153 = icmp eq i64 %152, 0 br i1 %153, label %154, label %167 154: ; preds = %151 %155 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.40, ptr noundef nonnull @.str.41, ptr noundef nonnull @m_gt_0) #4 %156 = icmp eq i64 %155, 0 br i1 %156, label %157, label %167 157: ; preds = %154 %158 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.42, ptr noundef nonnull @.str.33, ptr noundef nonnull @m_gt_0) #4 br label %167 159: ; preds = %108 %160 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.43, ptr noundef nonnull @.str.27, ptr noundef nonnull @m_gt_0) #4 %161 = icmp eq i64 %160, 0 br i1 %161, label %162, label %167 162: ; preds = %159 %163 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.44, ptr noundef nonnull @.str.39, ptr noundef nonnull @m_gt_0) #4 %164 = icmp eq i64 %163, 0 br i1 %164, label %165, label %167 165: ; preds = %162 %166 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.45, ptr noundef nonnull @.str.12, ptr noundef nonnull @m_gt_0) #4 br label %167 167: ; preds = %159, %162, %165, %148, %151, %154, %157, %140, %143, %146, %126, %129, %132, %135, %138, %117, %120, %112, %115, %108, %124, %122 %168 = load ptr, ptr %6, align 8, !tbaa !10 %169 = load i8, ptr %168, align 1, !tbaa !5 switch i8 %169, label %187 [ i8 101, label %170 i8 105, label %178 i8 108, label %180 i8 115, label %185 ] 170: ; preds = %167 %171 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.46, ptr noundef nonnull @.str.47, ptr noundef nonnull @m_gt_0) #4 %172 = icmp eq i64 %171, 0 br i1 %172, label %173, label %187 173: ; preds = %170 %174 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.48, ptr noundef nonnull @.str.7, ptr noundef nonnull @m_gt_0) #4 %175 = icmp eq i64 %174, 0 br i1 %175, label %176, label %187 176: ; preds = %173 %177 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.49, ptr noundef nonnull @.str.27, ptr noundef nonnull @m_gt_0) #4 br label %187 178: ; preds = %167 %179 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.50, ptr noundef nonnull @.str.47, ptr noundef nonnull @m_gt_0) #4 br label %187 180: ; preds = %167 %181 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.47, ptr noundef nonnull @m_gt_0) #4 %182 = icmp eq i64 %181, 0 br i1 %182, label %183, label %187 183: ; preds = %180 %184 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.52, ptr noundef nonnull @.str.7, ptr noundef nonnull @m_gt_0) #4 br label %187 185: ; preds = %167 %186 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.53, ptr noundef nonnull @.str.7, ptr noundef nonnull @m_gt_0) #4 br label %187 187: ; preds = %180, %183, %170, %173, %176, %167, %185, %178 %188 = load ptr, ptr %6, align 8, !tbaa !10 %189 = getelementptr inbounds i8, ptr %188, i64 1 %190 = load i8, ptr %189, align 1, !tbaa !5 switch i8 %190, label %340 [ i8 97, label %191 i8 99, label %201 i8 101, label %218 i8 105, label %228 i8 108, label %238 i8 110, label %255 i8 111, label %276 i8 115, label %293 i8 116, label %307 i8 117, label %312 i8 118, label %326 i8 122, label %326 ] 191: ; preds = %187 %192 = load i8, ptr %188, align 1, !tbaa !5 %193 = icmp eq i8 %192, 108 br i1 %193, label %194, label %340 194: ; preds = %191 %195 = getelementptr inbounds i8, ptr %188, i64 2 %196 = call i64 @m_gt_1(ptr noundef nonnull %195) #4 %197 = icmp eq i64 %196, 0 br i1 %197, label %340, label %198 198: ; preds = %194 %199 = load ptr, ptr %6, align 8, !tbaa !10 %200 = getelementptr inbounds i8, ptr %199, i64 2 store ptr %200, ptr %6, align 8, !tbaa !10 br label %340 201: ; preds = %187 %202 = load i8, ptr %188, align 1, !tbaa !5 %203 = icmp eq i8 %202, 101 br i1 %203, label %204, label %340 204: ; preds = %201 %205 = getelementptr inbounds i8, ptr %188, i64 2 %206 = load i8, ptr %205, align 1, !tbaa !5 %207 = icmp eq i8 %206, 110 br i1 %207, label %208, label %340 208: ; preds = %204 %209 = getelementptr inbounds i8, ptr %188, i64 3 %210 = load i8, ptr %209, align 1, !tbaa !5 switch i8 %210, label %340 [ i8 97, label %211 i8 101, label %211 ] 211: ; preds = %208, %208 %212 = getelementptr inbounds i8, ptr %188, i64 4 %213 = call i64 @m_gt_1(ptr noundef nonnull %212) #4 %214 = icmp eq i64 %213, 0 br i1 %214, label %340, label %215 215: ; preds = %211 %216 = load ptr, ptr %6, align 8, !tbaa !10 %217 = getelementptr inbounds i8, ptr %216, i64 4 store ptr %217, ptr %6, align 8, !tbaa !10 br label %340 218: ; preds = %187 %219 = load i8, ptr %188, align 1, !tbaa !5 %220 = icmp eq i8 %219, 114 br i1 %220, label %221, label %340 221: ; preds = %218 %222 = getelementptr inbounds i8, ptr %188, i64 2 %223 = call i64 @m_gt_1(ptr noundef nonnull %222) #4 %224 = icmp eq i64 %223, 0 br i1 %224, label %340, label %225 225: ; preds = %221 %226 = load ptr, ptr %6, align 8, !tbaa !10 %227 = getelementptr inbounds i8, ptr %226, i64 2 store ptr %227, ptr %6, align 8, !tbaa !10 br label %340 228: ; preds = %187 %229 = load i8, ptr %188, align 1, !tbaa !5 %230 = icmp eq i8 %229, 99 br i1 %230, label %231, label %340 231: ; preds = %228 %232 = getelementptr inbounds i8, ptr %188, i64 2 %233 = call i64 @m_gt_1(ptr noundef nonnull %232) #4 %234 = icmp eq i64 %233, 0 br i1 %234, label %340, label %235 235: ; preds = %231 %236 = load ptr, ptr %6, align 8, !tbaa !10 %237 = getelementptr inbounds i8, ptr %236, i64 2 store ptr %237, ptr %6, align 8, !tbaa !10 br label %340 238: ; preds = %187 %239 = load i8, ptr %188, align 1, !tbaa !5 %240 = icmp eq i8 %239, 101 br i1 %240, label %241, label %340 241: ; preds = %238 %242 = getelementptr inbounds i8, ptr %188, i64 2 %243 = load i8, ptr %242, align 1, !tbaa !5 %244 = icmp eq i8 %243, 98 br i1 %244, label %245, label %340 245: ; preds = %241 %246 = getelementptr inbounds i8, ptr %188, i64 3 %247 = load i8, ptr %246, align 1, !tbaa !5 switch i8 %247, label %340 [ i8 97, label %248 i8 105, label %248 ] 248: ; preds = %245, %245 %249 = getelementptr inbounds i8, ptr %188, i64 4 %250 = call i64 @m_gt_1(ptr noundef nonnull %249) #4 %251 = icmp eq i64 %250, 0 br i1 %251, label %340, label %252 252: ; preds = %248 %253 = load ptr, ptr %6, align 8, !tbaa !10 %254 = getelementptr inbounds i8, ptr %253, i64 4 store ptr %254, ptr %6, align 8, !tbaa !10 br label %340 255: ; preds = %187 %256 = load i8, ptr %188, align 1, !tbaa !5 %257 = icmp eq i8 %256, 116 br i1 %257, label %258, label %340 258: ; preds = %255 %259 = getelementptr inbounds i8, ptr %188, i64 2 %260 = load i8, ptr %259, align 1, !tbaa !5 switch i8 %260, label %340 [ i8 97, label %261 i8 101, label %268 ] 261: ; preds = %258 %262 = getelementptr inbounds i8, ptr %188, i64 3 %263 = call i64 @m_gt_1(ptr noundef nonnull %262) #4 %264 = icmp eq i64 %263, 0 br i1 %264, label %340, label %265 265: ; preds = %261 %266 = load ptr, ptr %6, align 8, !tbaa !10 %267 = getelementptr inbounds i8, ptr %266, i64 3 store ptr %267, ptr %6, align 8, !tbaa !10 br label %340 268: ; preds = %258 %269 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.54, ptr noundef nonnull @.str.7, ptr noundef nonnull @m_gt_1) #4 %270 = icmp eq i64 %269, 0 br i1 %270, label %271, label %340 271: ; preds = %268 %272 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.55, ptr noundef nonnull @.str.7, ptr noundef nonnull @m_gt_1) #4 %273 = icmp eq i64 %272, 0 br i1 %273, label %274, label %340 274: ; preds = %271 %275 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.56, ptr noundef nonnull @.str.7, ptr noundef nonnull @m_gt_1) #4 br label %340 276: ; preds = %187 %277 = load i8, ptr %188, align 1, !tbaa !5 %278 = icmp eq i8 %277, 117 br i1 %278, label %279, label %286 279: ; preds = %276 %280 = getelementptr inbounds i8, ptr %188, i64 2 %281 = call i64 @m_gt_1(ptr noundef nonnull %280) #4 %282 = icmp eq i64 %281, 0 br i1 %282, label %340, label %283 283: ; preds = %279 %284 = load ptr, ptr %6, align 8, !tbaa !10 %285 = getelementptr inbounds i8, ptr %284, i64 2 store ptr %285, ptr %6, align 8, !tbaa !10 br label %340 286: ; preds = %276 %287 = getelementptr inbounds i8, ptr %188, i64 3 %288 = load i8, ptr %287, align 1, !tbaa !5 %289 = add i8 %288, -115 %290 = icmp ult i8 %289, 2 br i1 %290, label %291, label %340 291: ; preds = %286 %292 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.57, ptr noundef nonnull @.str.7, ptr noundef nonnull @m_gt_1) #4 br label %340 293: ; preds = %187 %294 = load i8, ptr %188, align 1, !tbaa !5 %295 = icmp eq i8 %294, 109 br i1 %295, label %296, label %340 296: ; preds = %293 %297 = getelementptr inbounds i8, ptr %188, i64 2 %298 = load i8, ptr %297, align 1, !tbaa !5 %299 = icmp eq i8 %298, 105 br i1 %299, label %300, label %340 300: ; preds = %296 %301 = getelementptr inbounds i8, ptr %188, i64 3 %302 = call i64 @m_gt_1(ptr noundef nonnull %301) #4 %303 = icmp eq i64 %302, 0 br i1 %303, label %340, label %304 304: ; preds = %300 %305 = load ptr, ptr %6, align 8, !tbaa !10 %306 = getelementptr inbounds i8, ptr %305, i64 3 store ptr %306, ptr %6, align 8, !tbaa !10 br label %340 307: ; preds = %187 %308 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.58, ptr noundef nonnull @.str.7, ptr noundef nonnull @m_gt_1) #4 %309 = icmp eq i64 %308, 0 br i1 %309, label %310, label %340 310: ; preds = %307 %311 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.59, ptr noundef nonnull @.str.7, ptr noundef nonnull @m_gt_1) #4 br label %340 312: ; preds = %187 %313 = load i8, ptr %188, align 1, !tbaa !5 %314 = icmp eq i8 %313, 115 br i1 %314, label %315, label %340 315: ; preds = %312 %316 = getelementptr inbounds i8, ptr %188, i64 2 %317 = load i8, ptr %316, align 1, !tbaa !5 %318 = icmp eq i8 %317, 111 br i1 %318, label %319, label %340 319: ; preds = %315 %320 = getelementptr inbounds i8, ptr %188, i64 3 %321 = call i64 @m_gt_1(ptr noundef nonnull %320) #4 %322 = icmp eq i64 %321, 0 br i1 %322, label %340, label %323 323: ; preds = %319 %324 = load ptr, ptr %6, align 8, !tbaa !10 %325 = getelementptr inbounds i8, ptr %324, i64 3 store ptr %325, ptr %6, align 8, !tbaa !10 br label %340 326: ; preds = %187, %187 %327 = load i8, ptr %188, align 1, !tbaa !5 %328 = icmp eq i8 %327, 101 br i1 %328, label %329, label %340 329: ; preds = %326 %330 = getelementptr inbounds i8, ptr %188, i64 2 %331 = load i8, ptr %330, align 1, !tbaa !5 %332 = icmp eq i8 %331, 105 br i1 %332, label %333, label %340 333: ; preds = %329 %334 = getelementptr inbounds i8, ptr %188, i64 3 %335 = call i64 @m_gt_1(ptr noundef nonnull %334) #4 %336 = icmp eq i64 %335, 0 br i1 %336, label %340, label %337 337: ; preds = %333 %338 = load ptr, ptr %6, align 8, !tbaa !10 %339 = getelementptr inbounds i8, ptr %338, i64 3 store ptr %339, ptr %6, align 8, !tbaa !10 br label %340 340: ; preds = %286, %258, %245, %208, %326, %329, %333, %337, %312, %315, %319, %323, %307, %310, %293, %296, %300, %304, %283, %279, %291, %255, %274, %271, %268, %261, %265, %238, %241, %248, %252, %228, %231, %235, %218, %221, %225, %201, %204, %211, %215, %191, %194, %198, %187 %341 = load ptr, ptr %6, align 8, !tbaa !10 %342 = load i8, ptr %341, align 1, !tbaa !5 %343 = icmp eq i8 %342, 101 br i1 %343, label %344, label %362 344: ; preds = %340 %345 = getelementptr inbounds i8, ptr %341, i64 1 %346 = call i64 @m_gt_1(ptr noundef nonnull %345) #4 %347 = icmp eq i64 %346, 0 %348 = load ptr, ptr %6, align 8, !tbaa !10 %349 = getelementptr inbounds i8, ptr %348, i64 1 br i1 %347, label %351, label %350 350: ; preds = %344 store ptr %349, ptr %6, align 8, !tbaa !10 br label %362 351: ; preds = %344 %352 = call i64 @m_eq_1(ptr noundef nonnull %349) #4 %353 = icmp eq i64 %352, 0 %354 = load ptr, ptr %6, align 8, !tbaa !10 br i1 %353, label %362, label %355 355: ; preds = %351 %356 = getelementptr inbounds i8, ptr %354, i64 1 %357 = call i64 @star_oh(ptr noundef nonnull %356) #4 %358 = icmp eq i64 %357, 0 %359 = load ptr, ptr %6, align 8, !tbaa !10 br i1 %358, label %360, label %362 360: ; preds = %355 %361 = getelementptr inbounds i8, ptr %359, i64 1 store ptr %361, ptr %6, align 8, !tbaa !10 br label %362 362: ; preds = %350, %360, %355, %351, %340 %363 = phi ptr [ %349, %350 ], [ %361, %360 ], [ %359, %355 ], [ %354, %351 ], [ %341, %340 ] %364 = call i64 @m_gt_1(ptr noundef %363) #4 %365 = icmp eq i64 %364, 0 %366 = load ptr, ptr %6, align 8, !tbaa !10 br i1 %365, label %375, label %367 367: ; preds = %362 %368 = load i8, ptr %366, align 1, !tbaa !5 %369 = icmp eq i8 %368, 108 br i1 %369, label %370, label %375 370: ; preds = %367 %371 = getelementptr inbounds i8, ptr %366, i64 1 %372 = load i8, ptr %371, align 1, !tbaa !5 %373 = icmp eq i8 %372, 108 br i1 %373, label %374, label %375 374: ; preds = %370 store ptr %371, ptr %6, align 8, !tbaa !10 br label %375 375: ; preds = %374, %370, %367, %362 %376 = phi ptr [ %371, %374 ], [ %366, %370 ], [ %366, %367 ], [ %366, %362 ] %377 = call i64 @strlen(ptr noundef nonnull dereferenceable(1) %376) %378 = trunc i64 %377 to i32 store i32 %378, ptr %3, align 4, !tbaa !12 %379 = shl i64 %377, 32 %380 = ashr exact i64 %379, 32 %381 = getelementptr inbounds i8, ptr %2, i64 %380 store i8 0, ptr %381, align 1, !tbaa !5 %382 = load i8, ptr %376, align 1, !tbaa !5 %383 = icmp eq i8 %382, 0 br i1 %383, label %396, label %384 384: ; preds = %375 %385 = shl i64 %377, 32 %386 = ashr exact i64 %385, 32 br label %387 387: ; preds = %384, %387 %388 = phi i64 [ %386, %384 ], [ %392, %387 ] %389 = phi ptr [ %376, %384 ], [ %390, %387 ] %390 = getelementptr inbounds i8, ptr %389, i64 1 store ptr %390, ptr %6, align 8, !tbaa !10 %391 = load i8, ptr %389, align 1, !tbaa !5 %392 = add i64 %388, -1 %393 = getelementptr inbounds i8, ptr %2, i64 %392 store i8 %391, ptr %393, align 1, !tbaa !5 %394 = load i8, ptr %390, align 1, !tbaa !5 %395 = icmp eq i8 %394, 0 br i1 %395, label %396, label %387, !llvm.loop !14 396: ; preds = %387, %375, %25, %11 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #4 call void @llvm.lifetime.end.p0(i64 28, ptr nonnull %5) #4 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @copy_stemmer(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i64 @stem(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @m_gt_0(ptr noundef) #2 declare i64 @hasVowel(ptr noundef) #2 declare i64 @doubleConsonant(ptr noundef) local_unnamed_addr #2 declare i64 @m_eq_1(ptr noundef) local_unnamed_addr #2 declare i64 @star_oh(ptr noundef) local_unnamed_addr #2 declare i64 @m_gt_1(ptr noundef) #2 ; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read) declare i64 @strlen(ptr nocapture noundef) local_unnamed_addr #3 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #4 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"omnipotent char", !7, i64 0} !7 = !{!"Simple C/C++ TBAA"} !8 = distinct !{!8, !9} !9 = !{!"llvm.loop.mustprogress"} !10 = !{!11, !11, i64 0} !11 = !{!"any pointer", !6, i64 0} !12 = !{!13, !13, i64 0} !13 = !{!"int", !6, i64 0} !14 = distinct !{!14, !9}
; ModuleID = 'AnghaBench/sqlcipher/ext/fts3/extr_fts3_porter.c_porter_stemmer.c' source_filename = "AnghaBench/sqlcipher/ext/fts3/extr_fts3_porter.c_porter_stemmer.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [5 x i8] c"sess\00", align 1 @.str.1 = private unnamed_addr constant [3 x i8] c"ss\00", align 1 @.str.2 = private unnamed_addr constant [4 x i8] c"sei\00", align 1 @.str.3 = private unnamed_addr constant [2 x i8] c"i\00", align 1 @.str.4 = private unnamed_addr constant [4 x i8] c"dee\00", align 1 @.str.5 = private unnamed_addr constant [3 x i8] c"ee\00", align 1 @.str.6 = private unnamed_addr constant [4 x i8] c"gni\00", align 1 @.str.7 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1 @.str.8 = private unnamed_addr constant [3 x i8] c"de\00", align 1 @.str.9 = private unnamed_addr constant [3 x i8] c"ta\00", align 1 @.str.10 = private unnamed_addr constant [4 x i8] c"ate\00", align 1 @.str.11 = private unnamed_addr constant [3 x i8] c"lb\00", align 1 @.str.12 = private unnamed_addr constant [4 x i8] c"ble\00", align 1 @.str.13 = private unnamed_addr constant [3 x i8] c"zi\00", align 1 @.str.14 = private unnamed_addr constant [4 x i8] c"ize\00", align 1 @.str.15 = private unnamed_addr constant [8 x i8] c"lanoita\00", align 1 @.str.16 = private unnamed_addr constant [7 x i8] c"lanoit\00", align 1 @.str.17 = private unnamed_addr constant [5 x i8] c"tion\00", align 1 @.str.18 = private unnamed_addr constant [5 x i8] c"icne\00", align 1 @.str.19 = private unnamed_addr constant [5 x i8] c"ence\00", align 1 @.str.20 = private unnamed_addr constant [5 x i8] c"icna\00", align 1 @.str.21 = private unnamed_addr constant [5 x i8] c"ance\00", align 1 @.str.22 = private unnamed_addr constant [5 x i8] c"rezi\00", align 1 @.str.23 = private unnamed_addr constant [5 x i8] c"igol\00", align 1 @.str.24 = private unnamed_addr constant [4 x i8] c"log\00", align 1 @.str.25 = private unnamed_addr constant [4 x i8] c"ilb\00", align 1 @.str.26 = private unnamed_addr constant [5 x i8] c"illa\00", align 1 @.str.27 = private unnamed_addr constant [3 x i8] c"al\00", align 1 @.str.28 = private unnamed_addr constant [6 x i8] c"iltne\00", align 1 @.str.29 = private unnamed_addr constant [4 x i8] c"ent\00", align 1 @.str.30 = private unnamed_addr constant [4 x i8] c"ile\00", align 1 @.str.31 = private unnamed_addr constant [2 x i8] c"e\00", align 1 @.str.32 = private unnamed_addr constant [6 x i8] c"ilsuo\00", align 1 @.str.33 = private unnamed_addr constant [4 x i8] c"ous\00", align 1 @.str.34 = private unnamed_addr constant [8 x i8] c"noitazi\00", align 1 @.str.35 = private unnamed_addr constant [6 x i8] c"noita\00", align 1 @.str.36 = private unnamed_addr constant [5 x i8] c"rota\00", align 1 @.str.37 = private unnamed_addr constant [6 x i8] c"msila\00", align 1 @.str.38 = private unnamed_addr constant [8 x i8] c"ssenevi\00", align 1 @.str.39 = private unnamed_addr constant [4 x i8] c"ive\00", align 1 @.str.40 = private unnamed_addr constant [8 x i8] c"ssenluf\00", align 1 @.str.41 = private unnamed_addr constant [4 x i8] c"ful\00", align 1 @.str.42 = private unnamed_addr constant [8 x i8] c"ssensuo\00", align 1 @.str.43 = private unnamed_addr constant [6 x i8] c"itila\00", align 1 @.str.44 = private unnamed_addr constant [6 x i8] c"itivi\00", align 1 @.str.45 = private unnamed_addr constant [7 x i8] c"itilib\00", align 1 @.str.46 = private unnamed_addr constant [6 x i8] c"etaci\00", align 1 @.str.47 = private unnamed_addr constant [3 x i8] c"ic\00", align 1 @.str.48 = private unnamed_addr constant [6 x i8] c"evita\00", align 1 @.str.49 = private unnamed_addr constant [6 x i8] c"ezila\00", align 1 @.str.50 = private unnamed_addr constant [6 x i8] c"itici\00", align 1 @.str.51 = private unnamed_addr constant [5 x i8] c"laci\00", align 1 @.str.52 = private unnamed_addr constant [4 x i8] c"luf\00", align 1 @.str.53 = private unnamed_addr constant [5 x i8] c"ssen\00", align 1 @.str.54 = private unnamed_addr constant [6 x i8] c"tneme\00", align 1 @.str.55 = private unnamed_addr constant [5 x i8] c"tnem\00", align 1 @.str.56 = private unnamed_addr constant [4 x i8] c"tne\00", align 1 @.str.57 = private unnamed_addr constant [4 x i8] c"noi\00", align 1 @.str.58 = private unnamed_addr constant [4 x i8] c"eta\00", align 1 @.str.59 = private unnamed_addr constant [4 x i8] c"iti\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @porter_stemmer], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @porter_stemmer(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 { %5 = alloca [28 x i8], align 1 %6 = alloca ptr, align 8 call void @llvm.lifetime.start.p0(i64 28, ptr nonnull %5) #4 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #4 %7 = add i32 %1, -21 %8 = icmp ult i32 %7, -18 br i1 %8, label %11, label %9 9: ; preds = %4 %10 = zext nneg i32 %1 to i64 br label %13 11: ; preds = %4 %12 = tail call i32 @copy_stemmer(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #4 br label %393 13: ; preds = %9, %27 %14 = phi i64 [ 22, %9 ], [ %31, %27 ] %15 = phi i64 [ 0, %9 ], [ %30, %27 ] %16 = getelementptr inbounds i8, ptr %0, i64 %15 %17 = load i8, ptr %16, align 1, !tbaa !6 %18 = add i8 %17, -65 %19 = icmp ult i8 %18, 26 br i1 %19, label %20, label %22 20: ; preds = %13 %21 = or disjoint i8 %17, 32 br label %27 22: ; preds = %13 %23 = add i8 %17, -97 %24 = icmp ult i8 %23, 26 br i1 %24, label %27, label %25 25: ; preds = %22 %26 = tail call i32 @copy_stemmer(ptr noundef nonnull %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #4 br label %393 27: ; preds = %22, %20 %28 = phi i8 [ %21, %20 ], [ %17, %22 ] %29 = getelementptr inbounds [28 x i8], ptr %5, i64 0, i64 %14 store i8 %28, ptr %29, align 1, !tbaa !6 %30 = add nuw nsw i64 %15, 1 %31 = add nsw i64 %14, -1 %32 = icmp eq i64 %30, %10 br i1 %32, label %33, label %13, !llvm.loop !9 33: ; preds = %27 %34 = getelementptr inbounds i8, ptr %5, i64 23 %35 = call i32 @memset(ptr noundef nonnull %34, i32 noundef 0, i32 noundef 5) #4 %36 = shl i64 %14, 32 %37 = ashr exact i64 %36, 32 %38 = getelementptr inbounds [28 x i8], ptr %5, i64 0, i64 %37 store ptr %38, ptr %6, align 8, !tbaa !11 %39 = load i8, ptr %38, align 1, !tbaa !6 %40 = icmp eq i8 %39, 115 br i1 %40, label %41, label %53 41: ; preds = %33 %42 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, ptr noundef null) #4 %43 = icmp eq i64 %42, 0 br i1 %43, label %44, label %53 44: ; preds = %41 %45 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3, ptr noundef null) #4 %46 = icmp eq i64 %45, 0 br i1 %46, label %47, label %53 47: ; preds = %44 %48 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.1, ptr noundef null) #4 %49 = icmp eq i64 %48, 0 br i1 %49, label %50, label %53 50: ; preds = %47 %51 = load ptr, ptr %6, align 8, !tbaa !11 %52 = getelementptr inbounds i8, ptr %51, i64 1 store ptr %52, ptr %6, align 8, !tbaa !11 br label %53 53: ; preds = %41, %44, %47, %50, %33 %54 = load ptr, ptr %6, align 8, !tbaa !11 %55 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.4, ptr noundef nonnull @.str.5, ptr noundef nonnull @m_gt_0) #4 %56 = icmp eq i64 %55, 0 br i1 %56, label %57, label %97 57: ; preds = %53 %58 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.7, ptr noundef nonnull @hasVowel) #4 %59 = icmp eq i64 %58, 0 br i1 %59, label %60, label %66 60: ; preds = %57 %61 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.8, ptr noundef nonnull @.str.7, ptr noundef nonnull @hasVowel) #4 %62 = icmp eq i64 %61, 0 %63 = load ptr, ptr %6, align 8 %64 = icmp eq ptr %63, %54 %65 = select i1 %62, i1 true, i1 %64 br i1 %65, label %97, label %69 66: ; preds = %57 %67 = load ptr, ptr %6, align 8, !tbaa !11 %68 = icmp eq ptr %67, %54 br i1 %68, label %97, label %69 69: ; preds = %60, %66 %70 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.9, ptr noundef nonnull @.str.10, ptr noundef null) #4 %71 = icmp eq i64 %70, 0 br i1 %71, label %72, label %97 72: ; preds = %69 %73 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.12, ptr noundef null) #4 %74 = icmp eq i64 %73, 0 br i1 %74, label %75, label %97 75: ; preds = %72 %76 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.13, ptr noundef nonnull @.str.14, ptr noundef null) #4 %77 = icmp eq i64 %76, 0 br i1 %77, label %78, label %97 78: ; preds = %75 %79 = load ptr, ptr %6, align 8, !tbaa !11 %80 = call i64 @doubleConsonant(ptr noundef %79) #4 %81 = icmp eq i64 %80, 0 %82 = load ptr, ptr %6, align 8, !tbaa !11 br i1 %81, label %87, label %83 83: ; preds = %78 %84 = load i8, ptr %82, align 1, !tbaa !6 switch i8 %84, label %85 [ i8 108, label %87 i8 115, label %87 i8 122, label %87 ] 85: ; preds = %83 %86 = getelementptr inbounds i8, ptr %82, i64 1 store ptr %86, ptr %6, align 8, !tbaa !11 br label %97 87: ; preds = %83, %83, %83, %78 %88 = call i64 @m_eq_1(ptr noundef %82) #4 %89 = icmp eq i64 %88, 0 br i1 %89, label %97, label %90 90: ; preds = %87 %91 = load ptr, ptr %6, align 8, !tbaa !11 %92 = call i64 @star_oh(ptr noundef %91) #4 %93 = icmp eq i64 %92, 0 br i1 %93, label %97, label %94 94: ; preds = %90 %95 = load ptr, ptr %6, align 8, !tbaa !11 %96 = getelementptr inbounds i8, ptr %95, i64 -1 store ptr %96, ptr %6, align 8, !tbaa !11 store i8 101, ptr %96, align 1, !tbaa !6 br label %97 97: ; preds = %60, %66, %85, %94, %90, %87, %69, %72, %75, %53 %98 = load ptr, ptr %6, align 8, !tbaa !11 %99 = load i8, ptr %98, align 1, !tbaa !6 %100 = icmp eq i8 %99, 121 br i1 %100, label %101, label %108 101: ; preds = %97 %102 = getelementptr inbounds i8, ptr %98, i64 1 %103 = call i64 @hasVowel(ptr noundef nonnull %102) #4 %104 = icmp eq i64 %103, 0 %105 = load ptr, ptr %6, align 8, !tbaa !11 br i1 %104, label %108, label %106 106: ; preds = %101 store i8 105, ptr %105, align 1, !tbaa !6 %107 = load ptr, ptr %6, align 8, !tbaa !11 br label %108 108: ; preds = %106, %101, %97 %109 = phi ptr [ %107, %106 ], [ %105, %101 ], [ %98, %97 ] %110 = getelementptr inbounds i8, ptr %109, i64 1 %111 = load i8, ptr %110, align 1, !tbaa !6 switch i8 %111, label %167 [ i8 97, label %112 i8 99, label %117 i8 101, label %122 i8 103, label %124 i8 108, label %126 i8 111, label %140 i8 115, label %148 i8 116, label %159 ] 112: ; preds = %108 %113 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.15, ptr noundef nonnull @.str.10, ptr noundef nonnull @m_gt_0) #4 %114 = icmp eq i64 %113, 0 br i1 %114, label %115, label %167 115: ; preds = %112 %116 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.16, ptr noundef nonnull @.str.17, ptr noundef nonnull @m_gt_0) #4 br label %167 117: ; preds = %108 %118 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.18, ptr noundef nonnull @.str.19, ptr noundef nonnull @m_gt_0) #4 %119 = icmp eq i64 %118, 0 br i1 %119, label %120, label %167 120: ; preds = %117 %121 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.20, ptr noundef nonnull @.str.21, ptr noundef nonnull @m_gt_0) #4 br label %167 122: ; preds = %108 %123 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.22, ptr noundef nonnull @.str.14, ptr noundef nonnull @m_gt_0) #4 br label %167 124: ; preds = %108 %125 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.23, ptr noundef nonnull @.str.24, ptr noundef nonnull @m_gt_0) #4 br label %167 126: ; preds = %108 %127 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.25, ptr noundef nonnull @.str.12, ptr noundef nonnull @m_gt_0) #4 %128 = icmp eq i64 %127, 0 br i1 %128, label %129, label %167 129: ; preds = %126 %130 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.26, ptr noundef nonnull @.str.27, ptr noundef nonnull @m_gt_0) #4 %131 = icmp eq i64 %130, 0 br i1 %131, label %132, label %167 132: ; preds = %129 %133 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.28, ptr noundef nonnull @.str.29, ptr noundef nonnull @m_gt_0) #4 %134 = icmp eq i64 %133, 0 br i1 %134, label %135, label %167 135: ; preds = %132 %136 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.30, ptr noundef nonnull @.str.31, ptr noundef nonnull @m_gt_0) #4 %137 = icmp eq i64 %136, 0 br i1 %137, label %138, label %167 138: ; preds = %135 %139 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.32, ptr noundef nonnull @.str.33, ptr noundef nonnull @m_gt_0) #4 br label %167 140: ; preds = %108 %141 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.34, ptr noundef nonnull @.str.14, ptr noundef nonnull @m_gt_0) #4 %142 = icmp eq i64 %141, 0 br i1 %142, label %143, label %167 143: ; preds = %140 %144 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.35, ptr noundef nonnull @.str.10, ptr noundef nonnull @m_gt_0) #4 %145 = icmp eq i64 %144, 0 br i1 %145, label %146, label %167 146: ; preds = %143 %147 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.36, ptr noundef nonnull @.str.10, ptr noundef nonnull @m_gt_0) #4 br label %167 148: ; preds = %108 %149 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.37, ptr noundef nonnull @.str.27, ptr noundef nonnull @m_gt_0) #4 %150 = icmp eq i64 %149, 0 br i1 %150, label %151, label %167 151: ; preds = %148 %152 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.38, ptr noundef nonnull @.str.39, ptr noundef nonnull @m_gt_0) #4 %153 = icmp eq i64 %152, 0 br i1 %153, label %154, label %167 154: ; preds = %151 %155 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.40, ptr noundef nonnull @.str.41, ptr noundef nonnull @m_gt_0) #4 %156 = icmp eq i64 %155, 0 br i1 %156, label %157, label %167 157: ; preds = %154 %158 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.42, ptr noundef nonnull @.str.33, ptr noundef nonnull @m_gt_0) #4 br label %167 159: ; preds = %108 %160 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.43, ptr noundef nonnull @.str.27, ptr noundef nonnull @m_gt_0) #4 %161 = icmp eq i64 %160, 0 br i1 %161, label %162, label %167 162: ; preds = %159 %163 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.44, ptr noundef nonnull @.str.39, ptr noundef nonnull @m_gt_0) #4 %164 = icmp eq i64 %163, 0 br i1 %164, label %165, label %167 165: ; preds = %162 %166 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.45, ptr noundef nonnull @.str.12, ptr noundef nonnull @m_gt_0) #4 br label %167 167: ; preds = %159, %162, %165, %148, %151, %154, %157, %140, %143, %146, %126, %129, %132, %135, %138, %117, %120, %112, %115, %108, %124, %122 %168 = load ptr, ptr %6, align 8, !tbaa !11 %169 = load i8, ptr %168, align 1, !tbaa !6 switch i8 %169, label %187 [ i8 101, label %170 i8 105, label %178 i8 108, label %180 i8 115, label %185 ] 170: ; preds = %167 %171 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.46, ptr noundef nonnull @.str.47, ptr noundef nonnull @m_gt_0) #4 %172 = icmp eq i64 %171, 0 br i1 %172, label %173, label %187 173: ; preds = %170 %174 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.48, ptr noundef nonnull @.str.7, ptr noundef nonnull @m_gt_0) #4 %175 = icmp eq i64 %174, 0 br i1 %175, label %176, label %187 176: ; preds = %173 %177 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.49, ptr noundef nonnull @.str.27, ptr noundef nonnull @m_gt_0) #4 br label %187 178: ; preds = %167 %179 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.50, ptr noundef nonnull @.str.47, ptr noundef nonnull @m_gt_0) #4 br label %187 180: ; preds = %167 %181 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.51, ptr noundef nonnull @.str.47, ptr noundef nonnull @m_gt_0) #4 %182 = icmp eq i64 %181, 0 br i1 %182, label %183, label %187 183: ; preds = %180 %184 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.52, ptr noundef nonnull @.str.7, ptr noundef nonnull @m_gt_0) #4 br label %187 185: ; preds = %167 %186 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.53, ptr noundef nonnull @.str.7, ptr noundef nonnull @m_gt_0) #4 br label %187 187: ; preds = %180, %183, %170, %173, %176, %167, %185, %178 %188 = load ptr, ptr %6, align 8, !tbaa !11 %189 = getelementptr inbounds i8, ptr %188, i64 1 %190 = load i8, ptr %189, align 1, !tbaa !6 switch i8 %190, label %340 [ i8 97, label %191 i8 99, label %201 i8 101, label %218 i8 105, label %228 i8 108, label %238 i8 110, label %255 i8 111, label %276 i8 115, label %293 i8 116, label %307 i8 117, label %312 i8 118, label %326 i8 122, label %326 ] 191: ; preds = %187 %192 = load i8, ptr %188, align 1, !tbaa !6 %193 = icmp eq i8 %192, 108 br i1 %193, label %194, label %340 194: ; preds = %191 %195 = getelementptr inbounds i8, ptr %188, i64 2 %196 = call i64 @m_gt_1(ptr noundef nonnull %195) #4 %197 = icmp eq i64 %196, 0 br i1 %197, label %340, label %198 198: ; preds = %194 %199 = load ptr, ptr %6, align 8, !tbaa !11 %200 = getelementptr inbounds i8, ptr %199, i64 2 store ptr %200, ptr %6, align 8, !tbaa !11 br label %340 201: ; preds = %187 %202 = load i8, ptr %188, align 1, !tbaa !6 %203 = icmp eq i8 %202, 101 br i1 %203, label %204, label %340 204: ; preds = %201 %205 = getelementptr inbounds i8, ptr %188, i64 2 %206 = load i8, ptr %205, align 1, !tbaa !6 %207 = icmp eq i8 %206, 110 br i1 %207, label %208, label %340 208: ; preds = %204 %209 = getelementptr inbounds i8, ptr %188, i64 3 %210 = load i8, ptr %209, align 1, !tbaa !6 switch i8 %210, label %340 [ i8 97, label %211 i8 101, label %211 ] 211: ; preds = %208, %208 %212 = getelementptr inbounds i8, ptr %188, i64 4 %213 = call i64 @m_gt_1(ptr noundef nonnull %212) #4 %214 = icmp eq i64 %213, 0 br i1 %214, label %340, label %215 215: ; preds = %211 %216 = load ptr, ptr %6, align 8, !tbaa !11 %217 = getelementptr inbounds i8, ptr %216, i64 4 store ptr %217, ptr %6, align 8, !tbaa !11 br label %340 218: ; preds = %187 %219 = load i8, ptr %188, align 1, !tbaa !6 %220 = icmp eq i8 %219, 114 br i1 %220, label %221, label %340 221: ; preds = %218 %222 = getelementptr inbounds i8, ptr %188, i64 2 %223 = call i64 @m_gt_1(ptr noundef nonnull %222) #4 %224 = icmp eq i64 %223, 0 br i1 %224, label %340, label %225 225: ; preds = %221 %226 = load ptr, ptr %6, align 8, !tbaa !11 %227 = getelementptr inbounds i8, ptr %226, i64 2 store ptr %227, ptr %6, align 8, !tbaa !11 br label %340 228: ; preds = %187 %229 = load i8, ptr %188, align 1, !tbaa !6 %230 = icmp eq i8 %229, 99 br i1 %230, label %231, label %340 231: ; preds = %228 %232 = getelementptr inbounds i8, ptr %188, i64 2 %233 = call i64 @m_gt_1(ptr noundef nonnull %232) #4 %234 = icmp eq i64 %233, 0 br i1 %234, label %340, label %235 235: ; preds = %231 %236 = load ptr, ptr %6, align 8, !tbaa !11 %237 = getelementptr inbounds i8, ptr %236, i64 2 store ptr %237, ptr %6, align 8, !tbaa !11 br label %340 238: ; preds = %187 %239 = load i8, ptr %188, align 1, !tbaa !6 %240 = icmp eq i8 %239, 101 br i1 %240, label %241, label %340 241: ; preds = %238 %242 = getelementptr inbounds i8, ptr %188, i64 2 %243 = load i8, ptr %242, align 1, !tbaa !6 %244 = icmp eq i8 %243, 98 br i1 %244, label %245, label %340 245: ; preds = %241 %246 = getelementptr inbounds i8, ptr %188, i64 3 %247 = load i8, ptr %246, align 1, !tbaa !6 switch i8 %247, label %340 [ i8 97, label %248 i8 105, label %248 ] 248: ; preds = %245, %245 %249 = getelementptr inbounds i8, ptr %188, i64 4 %250 = call i64 @m_gt_1(ptr noundef nonnull %249) #4 %251 = icmp eq i64 %250, 0 br i1 %251, label %340, label %252 252: ; preds = %248 %253 = load ptr, ptr %6, align 8, !tbaa !11 %254 = getelementptr inbounds i8, ptr %253, i64 4 store ptr %254, ptr %6, align 8, !tbaa !11 br label %340 255: ; preds = %187 %256 = load i8, ptr %188, align 1, !tbaa !6 %257 = icmp eq i8 %256, 116 br i1 %257, label %258, label %340 258: ; preds = %255 %259 = getelementptr inbounds i8, ptr %188, i64 2 %260 = load i8, ptr %259, align 1, !tbaa !6 switch i8 %260, label %340 [ i8 97, label %261 i8 101, label %268 ] 261: ; preds = %258 %262 = getelementptr inbounds i8, ptr %188, i64 3 %263 = call i64 @m_gt_1(ptr noundef nonnull %262) #4 %264 = icmp eq i64 %263, 0 br i1 %264, label %340, label %265 265: ; preds = %261 %266 = load ptr, ptr %6, align 8, !tbaa !11 %267 = getelementptr inbounds i8, ptr %266, i64 3 store ptr %267, ptr %6, align 8, !tbaa !11 br label %340 268: ; preds = %258 %269 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.54, ptr noundef nonnull @.str.7, ptr noundef nonnull @m_gt_1) #4 %270 = icmp eq i64 %269, 0 br i1 %270, label %271, label %340 271: ; preds = %268 %272 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.55, ptr noundef nonnull @.str.7, ptr noundef nonnull @m_gt_1) #4 %273 = icmp eq i64 %272, 0 br i1 %273, label %274, label %340 274: ; preds = %271 %275 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.56, ptr noundef nonnull @.str.7, ptr noundef nonnull @m_gt_1) #4 br label %340 276: ; preds = %187 %277 = load i8, ptr %188, align 1, !tbaa !6 %278 = icmp eq i8 %277, 117 br i1 %278, label %279, label %286 279: ; preds = %276 %280 = getelementptr inbounds i8, ptr %188, i64 2 %281 = call i64 @m_gt_1(ptr noundef nonnull %280) #4 %282 = icmp eq i64 %281, 0 br i1 %282, label %340, label %283 283: ; preds = %279 %284 = load ptr, ptr %6, align 8, !tbaa !11 %285 = getelementptr inbounds i8, ptr %284, i64 2 store ptr %285, ptr %6, align 8, !tbaa !11 br label %340 286: ; preds = %276 %287 = getelementptr inbounds i8, ptr %188, i64 3 %288 = load i8, ptr %287, align 1, !tbaa !6 %289 = add i8 %288, -115 %290 = icmp ult i8 %289, 2 br i1 %290, label %291, label %340 291: ; preds = %286 %292 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.57, ptr noundef nonnull @.str.7, ptr noundef nonnull @m_gt_1) #4 br label %340 293: ; preds = %187 %294 = load i8, ptr %188, align 1, !tbaa !6 %295 = icmp eq i8 %294, 109 br i1 %295, label %296, label %340 296: ; preds = %293 %297 = getelementptr inbounds i8, ptr %188, i64 2 %298 = load i8, ptr %297, align 1, !tbaa !6 %299 = icmp eq i8 %298, 105 br i1 %299, label %300, label %340 300: ; preds = %296 %301 = getelementptr inbounds i8, ptr %188, i64 3 %302 = call i64 @m_gt_1(ptr noundef nonnull %301) #4 %303 = icmp eq i64 %302, 0 br i1 %303, label %340, label %304 304: ; preds = %300 %305 = load ptr, ptr %6, align 8, !tbaa !11 %306 = getelementptr inbounds i8, ptr %305, i64 3 store ptr %306, ptr %6, align 8, !tbaa !11 br label %340 307: ; preds = %187 %308 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.58, ptr noundef nonnull @.str.7, ptr noundef nonnull @m_gt_1) #4 %309 = icmp eq i64 %308, 0 br i1 %309, label %310, label %340 310: ; preds = %307 %311 = call i64 @stem(ptr noundef nonnull %6, ptr noundef nonnull @.str.59, ptr noundef nonnull @.str.7, ptr noundef nonnull @m_gt_1) #4 br label %340 312: ; preds = %187 %313 = load i8, ptr %188, align 1, !tbaa !6 %314 = icmp eq i8 %313, 115 br i1 %314, label %315, label %340 315: ; preds = %312 %316 = getelementptr inbounds i8, ptr %188, i64 2 %317 = load i8, ptr %316, align 1, !tbaa !6 %318 = icmp eq i8 %317, 111 br i1 %318, label %319, label %340 319: ; preds = %315 %320 = getelementptr inbounds i8, ptr %188, i64 3 %321 = call i64 @m_gt_1(ptr noundef nonnull %320) #4 %322 = icmp eq i64 %321, 0 br i1 %322, label %340, label %323 323: ; preds = %319 %324 = load ptr, ptr %6, align 8, !tbaa !11 %325 = getelementptr inbounds i8, ptr %324, i64 3 store ptr %325, ptr %6, align 8, !tbaa !11 br label %340 326: ; preds = %187, %187 %327 = load i8, ptr %188, align 1, !tbaa !6 %328 = icmp eq i8 %327, 101 br i1 %328, label %329, label %340 329: ; preds = %326 %330 = getelementptr inbounds i8, ptr %188, i64 2 %331 = load i8, ptr %330, align 1, !tbaa !6 %332 = icmp eq i8 %331, 105 br i1 %332, label %333, label %340 333: ; preds = %329 %334 = getelementptr inbounds i8, ptr %188, i64 3 %335 = call i64 @m_gt_1(ptr noundef nonnull %334) #4 %336 = icmp eq i64 %335, 0 br i1 %336, label %340, label %337 337: ; preds = %333 %338 = load ptr, ptr %6, align 8, !tbaa !11 %339 = getelementptr inbounds i8, ptr %338, i64 3 store ptr %339, ptr %6, align 8, !tbaa !11 br label %340 340: ; preds = %286, %258, %245, %208, %326, %329, %333, %337, %312, %315, %319, %323, %307, %310, %293, %296, %300, %304, %283, %279, %291, %255, %274, %271, %268, %261, %265, %238, %241, %248, %252, %228, %231, %235, %218, %221, %225, %201, %204, %211, %215, %191, %194, %198, %187 %341 = load ptr, ptr %6, align 8, !tbaa !11 %342 = load i8, ptr %341, align 1, !tbaa !6 %343 = icmp eq i8 %342, 101 br i1 %343, label %344, label %362 344: ; preds = %340 %345 = getelementptr inbounds i8, ptr %341, i64 1 %346 = call i64 @m_gt_1(ptr noundef nonnull %345) #4 %347 = icmp eq i64 %346, 0 %348 = load ptr, ptr %6, align 8, !tbaa !11 %349 = getelementptr inbounds i8, ptr %348, i64 1 br i1 %347, label %351, label %350 350: ; preds = %344 store ptr %349, ptr %6, align 8, !tbaa !11 br label %362 351: ; preds = %344 %352 = call i64 @m_eq_1(ptr noundef nonnull %349) #4 %353 = icmp eq i64 %352, 0 %354 = load ptr, ptr %6, align 8, !tbaa !11 br i1 %353, label %362, label %355 355: ; preds = %351 %356 = getelementptr inbounds i8, ptr %354, i64 1 %357 = call i64 @star_oh(ptr noundef nonnull %356) #4 %358 = icmp eq i64 %357, 0 %359 = load ptr, ptr %6, align 8, !tbaa !11 br i1 %358, label %360, label %362 360: ; preds = %355 %361 = getelementptr inbounds i8, ptr %359, i64 1 store ptr %361, ptr %6, align 8, !tbaa !11 br label %362 362: ; preds = %350, %360, %355, %351, %340 %363 = phi ptr [ %349, %350 ], [ %361, %360 ], [ %359, %355 ], [ %354, %351 ], [ %341, %340 ] %364 = call i64 @m_gt_1(ptr noundef %363) #4 %365 = icmp eq i64 %364, 0 %366 = load ptr, ptr %6, align 8, !tbaa !11 br i1 %365, label %375, label %367 367: ; preds = %362 %368 = load i8, ptr %366, align 1, !tbaa !6 %369 = icmp eq i8 %368, 108 br i1 %369, label %370, label %375 370: ; preds = %367 %371 = getelementptr inbounds i8, ptr %366, i64 1 %372 = load i8, ptr %371, align 1, !tbaa !6 %373 = icmp eq i8 %372, 108 br i1 %373, label %374, label %375 374: ; preds = %370 store ptr %371, ptr %6, align 8, !tbaa !11 br label %375 375: ; preds = %374, %370, %367, %362 %376 = phi ptr [ %371, %374 ], [ %366, %370 ], [ %366, %367 ], [ %366, %362 ] %377 = call i64 @strlen(ptr noundef nonnull dereferenceable(1) %376) %378 = trunc i64 %377 to i32 store i32 %378, ptr %3, align 4, !tbaa !13 %379 = shl i64 %377, 32 %380 = ashr exact i64 %379, 32 %381 = getelementptr inbounds i8, ptr %2, i64 %380 store i8 0, ptr %381, align 1, !tbaa !6 %382 = load i8, ptr %376, align 1, !tbaa !6 %383 = icmp eq i8 %382, 0 br i1 %383, label %393, label %384 384: ; preds = %375, %384 %385 = phi i64 [ %389, %384 ], [ %380, %375 ] %386 = phi ptr [ %387, %384 ], [ %376, %375 ] %387 = getelementptr inbounds i8, ptr %386, i64 1 store ptr %387, ptr %6, align 8, !tbaa !11 %388 = load i8, ptr %386, align 1, !tbaa !6 %389 = add nsw i64 %385, -1 %390 = getelementptr inbounds i8, ptr %2, i64 %389 store i8 %388, ptr %390, align 1, !tbaa !6 %391 = load i8, ptr %387, align 1, !tbaa !6 %392 = icmp eq i8 %391, 0 br i1 %392, label %393, label %384, !llvm.loop !15 393: ; preds = %384, %375, %25, %11 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #4 call void @llvm.lifetime.end.p0(i64 28, ptr nonnull %5) #4 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @copy_stemmer(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i64 @stem(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @m_gt_0(ptr noundef) #2 declare i64 @hasVowel(ptr noundef) #2 declare i64 @doubleConsonant(ptr noundef) local_unnamed_addr #2 declare i64 @m_eq_1(ptr noundef) local_unnamed_addr #2 declare i64 @star_oh(ptr noundef) local_unnamed_addr #2 declare i64 @m_gt_1(ptr noundef) #2 ; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read) declare i64 @strlen(ptr nocapture noundef) local_unnamed_addr #3 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { mustprogress nofree nounwind willreturn memory(argmem: read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #4 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = distinct !{!9, !10} !10 = !{!"llvm.loop.mustprogress"} !11 = !{!12, !12, i64 0} !12 = !{!"any pointer", !7, i64 0} !13 = !{!14, !14, i64 0} !14 = !{!"int", !7, i64 0} !15 = distinct !{!15, !10}
sqlcipher_ext_fts3_extr_fts3_porter.c_porter_stemmer
; ModuleID = 'AnghaBench/linux/arch/sh/drivers/pci/extr_fixups-landisk.c_pci_fixup_pcic.c' source_filename = "AnghaBench/linux/arch/sh/drivers/pci/extr_fixups-landisk.c_pci_fixup_pcic.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @SH7751_BCR1 = dso_local local_unnamed_addr global i32 0, align 4 @SH4_PCIBCR1 = dso_local local_unnamed_addr global i32 0, align 4 @SH7751_MCR = dso_local local_unnamed_addr global i32 0, align 4 @PCIMCR_MRSET_OFF = dso_local local_unnamed_addr global i64 0, align 8 @PCIMCR_RFSH_OFF = dso_local local_unnamed_addr global i64 0, align 8 @SH4_PCIMCR = dso_local local_unnamed_addr global i32 0, align 4 @SH7751_PCICONF5 = dso_local local_unnamed_addr global i32 0, align 4 @SH7751_PCICONF6 = dso_local local_unnamed_addr global i32 0, align 4 @SH4_PCILAR0 = dso_local local_unnamed_addr global i32 0, align 4 @SH4_PCILAR1 = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local noundef i32 @pci_fixup_pcic(ptr noundef %0) local_unnamed_addr #0 { %2 = load i32, ptr @SH7751_BCR1, align 4, !tbaa !5 %3 = tail call i64 @__raw_readl(i32 noundef %2) #2 %4 = trunc i64 %3 to i32 %5 = or i32 %4, 1074266112 %6 = load i32, ptr @SH4_PCIBCR1, align 4, !tbaa !5 %7 = tail call i32 @pci_write_reg(ptr noundef %0, i32 noundef %5, i32 noundef %6) #2 %8 = load i32, ptr @SH7751_MCR, align 4, !tbaa !5 %9 = tail call i64 @__raw_readl(i32 noundef %8) #2 %10 = load i64, ptr @PCIMCR_MRSET_OFF, align 8, !tbaa !9 %11 = and i64 %10, %9 %12 = load i64, ptr @PCIMCR_RFSH_OFF, align 8, !tbaa !9 %13 = and i64 %11, %12 %14 = trunc i64 %13 to i32 %15 = load i32, ptr @SH4_PCIMCR, align 4, !tbaa !5 %16 = tail call i32 @pci_write_reg(ptr noundef %0, i32 noundef %14, i32 noundef %15) #2 %17 = load i32, ptr @SH7751_PCICONF5, align 4, !tbaa !5 %18 = tail call i32 @pci_write_reg(ptr noundef %0, i32 noundef 201326592, i32 noundef %17) #2 %19 = load i32, ptr @SH7751_PCICONF6, align 4, !tbaa !5 %20 = tail call i32 @pci_write_reg(ptr noundef %0, i32 noundef -805306368, i32 noundef %19) #2 %21 = load i32, ptr @SH4_PCILAR0, align 4, !tbaa !5 %22 = tail call i32 @pci_write_reg(ptr noundef %0, i32 noundef 201326592, i32 noundef %21) #2 %23 = load i32, ptr @SH4_PCILAR1, align 4, !tbaa !5 %24 = tail call i32 @pci_write_reg(ptr noundef %0, i32 noundef 0, i32 noundef %23) #2 ret i32 0 } declare i64 @__raw_readl(i32 noundef) local_unnamed_addr #1 declare i32 @pci_write_reg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"long", !7, i64 0}
; ModuleID = 'AnghaBench/linux/arch/sh/drivers/pci/extr_fixups-landisk.c_pci_fixup_pcic.c' source_filename = "AnghaBench/linux/arch/sh/drivers/pci/extr_fixups-landisk.c_pci_fixup_pcic.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @SH7751_BCR1 = common local_unnamed_addr global i32 0, align 4 @SH4_PCIBCR1 = common local_unnamed_addr global i32 0, align 4 @SH7751_MCR = common local_unnamed_addr global i32 0, align 4 @PCIMCR_MRSET_OFF = common local_unnamed_addr global i64 0, align 8 @PCIMCR_RFSH_OFF = common local_unnamed_addr global i64 0, align 8 @SH4_PCIMCR = common local_unnamed_addr global i32 0, align 4 @SH7751_PCICONF5 = common local_unnamed_addr global i32 0, align 4 @SH7751_PCICONF6 = common local_unnamed_addr global i32 0, align 4 @SH4_PCILAR0 = common local_unnamed_addr global i32 0, align 4 @SH4_PCILAR1 = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define noundef i32 @pci_fixup_pcic(ptr noundef %0) local_unnamed_addr #0 { %2 = load i32, ptr @SH7751_BCR1, align 4, !tbaa !6 %3 = tail call i64 @__raw_readl(i32 noundef %2) #2 %4 = trunc i64 %3 to i32 %5 = or i32 %4, 1074266112 %6 = load i32, ptr @SH4_PCIBCR1, align 4, !tbaa !6 %7 = tail call i32 @pci_write_reg(ptr noundef %0, i32 noundef %5, i32 noundef %6) #2 %8 = load i32, ptr @SH7751_MCR, align 4, !tbaa !6 %9 = tail call i64 @__raw_readl(i32 noundef %8) #2 %10 = load i64, ptr @PCIMCR_MRSET_OFF, align 8, !tbaa !10 %11 = and i64 %10, %9 %12 = load i64, ptr @PCIMCR_RFSH_OFF, align 8, !tbaa !10 %13 = and i64 %11, %12 %14 = trunc i64 %13 to i32 %15 = load i32, ptr @SH4_PCIMCR, align 4, !tbaa !6 %16 = tail call i32 @pci_write_reg(ptr noundef %0, i32 noundef %14, i32 noundef %15) #2 %17 = load i32, ptr @SH7751_PCICONF5, align 4, !tbaa !6 %18 = tail call i32 @pci_write_reg(ptr noundef %0, i32 noundef 201326592, i32 noundef %17) #2 %19 = load i32, ptr @SH7751_PCICONF6, align 4, !tbaa !6 %20 = tail call i32 @pci_write_reg(ptr noundef %0, i32 noundef -805306368, i32 noundef %19) #2 %21 = load i32, ptr @SH4_PCILAR0, align 4, !tbaa !6 %22 = tail call i32 @pci_write_reg(ptr noundef %0, i32 noundef 201326592, i32 noundef %21) #2 %23 = load i32, ptr @SH4_PCILAR1, align 4, !tbaa !6 %24 = tail call i32 @pci_write_reg(ptr noundef %0, i32 noundef 0, i32 noundef %23) #2 ret i32 0 } declare i64 @__raw_readl(i32 noundef) local_unnamed_addr #1 declare i32 @pci_write_reg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"long", !8, i64 0}
linux_arch_sh_drivers_pci_extr_fixups-landisk.c_pci_fixup_pcic
; ModuleID = 'AnghaBench/RetroArch/wii/libogc/libogc/extr_gcsd.c___gcsdb_shutdown.c' source_filename = "AnghaBench/RetroArch/wii/libogc/libogc/extr_gcsd.c___gcsdb_shutdown.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @__gcsdb_shutdown], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @__gcsdb_shutdown() #0 { %1 = tail call i32 @__gcsd_shutdown(i32 noundef 1) #2 ret i32 %1 } declare i32 @__gcsd_shutdown(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/RetroArch/wii/libogc/libogc/extr_gcsd.c___gcsdb_shutdown.c' source_filename = "AnghaBench/RetroArch/wii/libogc/libogc/extr_gcsd.c___gcsdb_shutdown.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @__gcsdb_shutdown], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @__gcsdb_shutdown() #0 { %1 = tail call i32 @__gcsd_shutdown(i32 noundef 1) #2 ret i32 %1 } declare i32 @__gcsd_shutdown(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
RetroArch_wii_libogc_libogc_extr_gcsd.c___gcsdb_shutdown
; ModuleID = 'AnghaBench/linux/drivers/iio/frequency/extr_adf4350.c_adf4350_sync_config.c' source_filename = "AnghaBench/linux/drivers/iio/frequency/extr_adf4350.c_adf4350_sync_config.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.adf4350_state = type { ptr, ptr, ptr, i32 } @ADF4350_REG5 = dso_local local_unnamed_addr global i32 0, align 4 @ADF4350_REG0 = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [11 x i8] c"[%d] 0x%X\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @adf4350_sync_config], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @adf4350_sync_config(ptr noundef %0) #0 { %2 = load i32, ptr @ADF4350_REG5, align 4, !tbaa !5 %3 = load i32, ptr @ADF4350_REG0, align 4, !tbaa !5 %4 = icmp slt i32 %2, %3 br i1 %4, label %51, label %5 5: ; preds = %1 %6 = getelementptr inbounds %struct.adf4350_state, ptr %0, i64 0, i32 1 %7 = getelementptr inbounds %struct.adf4350_state, ptr %0, i64 0, i32 3 %8 = getelementptr inbounds %struct.adf4350_state, ptr %0, i64 0, i32 2 %9 = sext i32 %2 to i64 br label %10 10: ; preds = %5, %45 %11 = phi i32 [ %3, %5 ], [ %46, %45 ] %12 = phi i64 [ %9, %5 ], [ %48, %45 ] %13 = phi i32 [ 0, %5 ], [ %47, %45 ] %14 = load ptr, ptr %0, align 8, !tbaa !9 %15 = getelementptr inbounds i32, ptr %14, i64 %12 %16 = load i32, ptr %15, align 4, !tbaa !5 %17 = load ptr, ptr %6, align 8, !tbaa !12 %18 = getelementptr inbounds i32, ptr %17, i64 %12 %19 = load i32, ptr %18, align 4, !tbaa !5 %20 = icmp eq i32 %16, %19 %21 = trunc i64 %12 to i32 br i1 %20, label %22, label %26 22: ; preds = %10 %23 = icmp eq i32 %11, %21 %24 = icmp ne i32 %13, 0 %25 = select i1 %23, i1 %24, i1 false br i1 %25, label %26, label %45 26: ; preds = %10, %22 %27 = or i32 %19, %21 %28 = tail call i32 @cpu_to_be32(i32 noundef %27) #2 store i32 %28, ptr %7, align 8, !tbaa !13 %29 = load ptr, ptr %8, align 8, !tbaa !14 %30 = tail call i32 @spi_write(ptr noundef %29, ptr noundef nonnull %7, i32 noundef 4) #2 %31 = icmp slt i32 %30, 0 br i1 %31, label %51, label %32 32: ; preds = %26 %33 = and i32 %21, -2 %34 = icmp eq i32 %33, 128 %35 = select i1 %34, i32 1, i32 %13 %36 = load ptr, ptr %6, align 8, !tbaa !12 %37 = getelementptr inbounds i32, ptr %36, i64 %12 %38 = load i32, ptr %37, align 4, !tbaa !5 %39 = load ptr, ptr %0, align 8, !tbaa !9 %40 = getelementptr inbounds i32, ptr %39, i64 %12 store i32 %38, ptr %40, align 4, !tbaa !5 %41 = load ptr, ptr %8, align 8, !tbaa !14 %42 = or i32 %38, %21 %43 = tail call i32 @dev_dbg(ptr noundef %41, ptr noundef nonnull @.str, i32 noundef %21, i32 noundef %42) #2 %44 = load i32, ptr @ADF4350_REG0, align 4, !tbaa !5 br label %45 45: ; preds = %22, %32 %46 = phi i32 [ %44, %32 ], [ %11, %22 ] %47 = phi i32 [ %35, %32 ], [ %13, %22 ] %48 = add nsw i64 %12, -1 %49 = sext i32 %46 to i64 %50 = icmp sgt i64 %12, %49 br i1 %50, label %10, label %51, !llvm.loop !15 51: ; preds = %26, %45, %1 %52 = phi i32 [ 0, %1 ], [ 0, %45 ], [ %30, %26 ] ret i32 %52 } declare i32 @cpu_to_be32(i32 noundef) local_unnamed_addr #1 declare i32 @spi_write(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dev_dbg(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 0} !10 = !{!"adf4350_state", !11, i64 0, !11, i64 8, !11, i64 16, !6, i64 24} !11 = !{!"any pointer", !7, i64 0} !12 = !{!10, !11, i64 8} !13 = !{!10, !6, i64 24} !14 = !{!10, !11, i64 16} !15 = distinct !{!15, !16} !16 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/linux/drivers/iio/frequency/extr_adf4350.c_adf4350_sync_config.c' source_filename = "AnghaBench/linux/drivers/iio/frequency/extr_adf4350.c_adf4350_sync_config.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @ADF4350_REG5 = common local_unnamed_addr global i32 0, align 4 @ADF4350_REG0 = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [11 x i8] c"[%d] 0x%X\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @adf4350_sync_config], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 -2147483648, 1) i32 @adf4350_sync_config(ptr noundef %0) #0 { %2 = load i32, ptr @ADF4350_REG5, align 4, !tbaa !6 %3 = load i32, ptr @ADF4350_REG0, align 4, !tbaa !6 %4 = icmp slt i32 %2, %3 br i1 %4, label %51, label %5 5: ; preds = %1 %6 = getelementptr inbounds i8, ptr %0, i64 8 %7 = getelementptr inbounds i8, ptr %0, i64 24 %8 = getelementptr inbounds i8, ptr %0, i64 16 %9 = sext i32 %2 to i64 br label %10 10: ; preds = %5, %45 %11 = phi i32 [ %3, %5 ], [ %46, %45 ] %12 = phi i64 [ %9, %5 ], [ %48, %45 ] %13 = phi i32 [ 0, %5 ], [ %47, %45 ] %14 = load ptr, ptr %0, align 8, !tbaa !10 %15 = getelementptr inbounds i32, ptr %14, i64 %12 %16 = load i32, ptr %15, align 4, !tbaa !6 %17 = load ptr, ptr %6, align 8, !tbaa !13 %18 = getelementptr inbounds i32, ptr %17, i64 %12 %19 = load i32, ptr %18, align 4, !tbaa !6 %20 = icmp eq i32 %16, %19 %21 = trunc nsw i64 %12 to i32 br i1 %20, label %22, label %26 22: ; preds = %10 %23 = icmp eq i32 %11, %21 %24 = icmp ne i32 %13, 0 %25 = select i1 %23, i1 %24, i1 false br i1 %25, label %26, label %45 26: ; preds = %10, %22 %27 = or i32 %19, %21 %28 = tail call i32 @cpu_to_be32(i32 noundef %27) #2 store i32 %28, ptr %7, align 8, !tbaa !14 %29 = load ptr, ptr %8, align 8, !tbaa !15 %30 = tail call i32 @spi_write(ptr noundef %29, ptr noundef nonnull %7, i32 noundef 4) #2 %31 = icmp slt i32 %30, 0 br i1 %31, label %51, label %32 32: ; preds = %26 %33 = and i32 %21, -2 %34 = icmp eq i32 %33, 128 %35 = select i1 %34, i32 1, i32 %13 %36 = load ptr, ptr %6, align 8, !tbaa !13 %37 = getelementptr inbounds i32, ptr %36, i64 %12 %38 = load i32, ptr %37, align 4, !tbaa !6 %39 = load ptr, ptr %0, align 8, !tbaa !10 %40 = getelementptr inbounds i32, ptr %39, i64 %12 store i32 %38, ptr %40, align 4, !tbaa !6 %41 = load ptr, ptr %8, align 8, !tbaa !15 %42 = or i32 %38, %21 %43 = tail call i32 @dev_dbg(ptr noundef %41, ptr noundef nonnull @.str, i32 noundef %21, i32 noundef %42) #2 %44 = load i32, ptr @ADF4350_REG0, align 4, !tbaa !6 br label %45 45: ; preds = %22, %32 %46 = phi i32 [ %44, %32 ], [ %11, %22 ] %47 = phi i32 [ %35, %32 ], [ %13, %22 ] %48 = add nsw i64 %12, -1 %49 = sext i32 %46 to i64 %50 = icmp sgt i64 %12, %49 br i1 %50, label %10, label %51, !llvm.loop !16 51: ; preds = %26, %45, %1 %52 = phi i32 [ 0, %1 ], [ 0, %45 ], [ %30, %26 ] ret i32 %52 } declare i32 @cpu_to_be32(i32 noundef) local_unnamed_addr #1 declare i32 @spi_write(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dev_dbg(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"adf4350_state", !12, i64 0, !12, i64 8, !12, i64 16, !7, i64 24} !12 = !{!"any pointer", !8, i64 0} !13 = !{!11, !12, i64 8} !14 = !{!11, !7, i64 24} !15 = !{!11, !12, i64 16} !16 = distinct !{!16, !17} !17 = !{!"llvm.loop.mustprogress"}
linux_drivers_iio_frequency_extr_adf4350.c_adf4350_sync_config
; ModuleID = 'AnghaBench/linux/drivers/platform/x86/extr_asus-wmi.c_read_backlight_power.c' source_filename = "AnghaBench/linux/drivers/platform/x86/extr_asus-wmi.c_read_backlight_power.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_4__ = type { i32, ptr } @ASUS_WMI_DEVID_BACKLIGHT = dso_local local_unnamed_addr global i32 0, align 4 @FB_BLANK_UNBLANK = dso_local local_unnamed_addr global i32 0, align 4 @FB_BLANK_POWERDOWN = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @read_backlight_power], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @read_backlight_power(ptr noundef %0) #0 { %2 = load ptr, ptr %0, align 8, !tbaa !5 %3 = getelementptr inbounds %struct.TYPE_4__, ptr %2, i64 0, i32 1 %4 = load ptr, ptr %3, align 8, !tbaa !10 %5 = load i64, ptr %4, align 8, !tbaa !13 %6 = icmp eq i64 %5, 0 br i1 %6, label %11, label %7 7: ; preds = %1 %8 = load i32, ptr %2, align 8, !tbaa !16 %9 = icmp eq i32 %8, 0 %10 = zext i1 %9 to i32 br label %14 11: ; preds = %1 %12 = load i32, ptr @ASUS_WMI_DEVID_BACKLIGHT, align 4, !tbaa !17 %13 = tail call i32 @asus_wmi_get_devstate_simple(ptr noundef nonnull %0, i32 noundef %12) #2 br label %14 14: ; preds = %11, %7 %15 = phi i32 [ %10, %7 ], [ %13, %11 ] %16 = icmp slt i32 %15, 0 %17 = icmp eq i32 %15, 0 %18 = load i32, ptr @FB_BLANK_UNBLANK, align 4 %19 = load i32, ptr @FB_BLANK_POWERDOWN, align 4 %20 = select i1 %17, i32 %19, i32 %18 %21 = select i1 %16, i32 %15, i32 %20 ret i32 %21 } declare i32 @asus_wmi_get_devstate_simple(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"asus_wmi", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 8} !11 = !{!"TYPE_4__", !12, i64 0, !7, i64 8} !12 = !{!"int", !8, i64 0} !13 = !{!14, !15, i64 0} !14 = !{!"TYPE_3__", !15, i64 0} !15 = !{!"long", !8, i64 0} !16 = !{!11, !12, i64 0} !17 = !{!12, !12, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/platform/x86/extr_asus-wmi.c_read_backlight_power.c' source_filename = "AnghaBench/linux/drivers/platform/x86/extr_asus-wmi.c_read_backlight_power.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @ASUS_WMI_DEVID_BACKLIGHT = common local_unnamed_addr global i32 0, align 4 @FB_BLANK_UNBLANK = common local_unnamed_addr global i32 0, align 4 @FB_BLANK_POWERDOWN = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @read_backlight_power], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @read_backlight_power(ptr noundef %0) #0 { %2 = load ptr, ptr %0, align 8, !tbaa !6 %3 = getelementptr inbounds i8, ptr %2, i64 8 %4 = load ptr, ptr %3, align 8, !tbaa !11 %5 = load i64, ptr %4, align 8, !tbaa !14 %6 = icmp eq i64 %5, 0 br i1 %6, label %11, label %7 7: ; preds = %1 %8 = load i32, ptr %2, align 8, !tbaa !17 %9 = icmp eq i32 %8, 0 %10 = zext i1 %9 to i32 br label %14 11: ; preds = %1 %12 = load i32, ptr @ASUS_WMI_DEVID_BACKLIGHT, align 4, !tbaa !18 %13 = tail call i32 @asus_wmi_get_devstate_simple(ptr noundef nonnull %0, i32 noundef %12) #2 br label %14 14: ; preds = %11, %7 %15 = phi i32 [ %10, %7 ], [ %13, %11 ] %16 = icmp slt i32 %15, 0 %17 = icmp eq i32 %15, 0 %18 = load i32, ptr @FB_BLANK_UNBLANK, align 4 %19 = load i32, ptr @FB_BLANK_POWERDOWN, align 4 %20 = select i1 %17, i32 %19, i32 %18 %21 = select i1 %16, i32 %15, i32 %20 ret i32 %21 } declare i32 @asus_wmi_get_devstate_simple(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"asus_wmi", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !8, i64 8} !12 = !{!"TYPE_4__", !13, i64 0, !8, i64 8} !13 = !{!"int", !9, i64 0} !14 = !{!15, !16, i64 0} !15 = !{!"TYPE_3__", !16, i64 0} !16 = !{!"long", !9, i64 0} !17 = !{!12, !13, i64 0} !18 = !{!13, !13, i64 0}
linux_drivers_platform_x86_extr_asus-wmi.c_read_backlight_power
; ModuleID = 'AnghaBench/xLua/build/luajit-2.1.0b2/src/extr_lib_aux.c_adjuststack.c' source_filename = "AnghaBench/xLua/build/luajit-2.1.0b2/src/extr_lib_aux.c_adjuststack.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_3__ = type { i32, ptr } @LUA_MINSTACK = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @adjuststack], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @adjuststack(ptr nocapture noundef %0) #0 { %2 = load i32, ptr %0, align 8, !tbaa !5 %3 = icmp sgt i32 %2, 1 br i1 %3, label %4, label %31 4: ; preds = %1 %5 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1 %6 = load ptr, ptr %5, align 8, !tbaa !11 %7 = tail call i64 @lua_strlen(ptr noundef %6, i32 noundef -1) #2 br label %8 8: ; preds = %8, %4 %9 = phi i64 [ %7, %4 ], [ %22, %8 ] %10 = phi i32 [ 1, %4 ], [ %11, %8 ] %11 = add nuw nsw i32 %10, 1 %12 = xor i32 %10, -1 %13 = tail call i64 @lua_strlen(ptr noundef %6, i32 noundef %12) #2 %14 = load i32, ptr %0, align 8, !tbaa !5 %15 = sub i32 %14, %10 %16 = add i32 %15, 1 %17 = load i32, ptr @LUA_MINSTACK, align 4, !tbaa !12 %18 = sdiv i32 %17, 2 %19 = icmp sge i32 %16, %18 %20 = icmp ugt i64 %9, %13 %21 = select i1 %19, i1 true, i1 %20 %22 = add i64 %13, %9 %23 = icmp slt i32 %11, %14 %24 = select i1 %21, i1 %23, i1 false br i1 %24, label %8, label %25, !llvm.loop !13 25: ; preds = %8 %26 = select i1 %21, i32 %11, i32 %10 %27 = tail call i32 @lua_concat(ptr noundef %6, i32 noundef %26) #2 %28 = load i32, ptr %0, align 8, !tbaa !5 %29 = sub i32 %28, %26 %30 = add i32 %29, 1 store i32 %30, ptr %0, align 8, !tbaa !5 br label %31 31: ; preds = %25, %1 ret void } declare i64 @lua_strlen(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @lua_concat(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_3__", !7, i64 0, !10, i64 8} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!6, !10, i64 8} !12 = !{!7, !7, i64 0} !13 = distinct !{!13, !14} !14 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/xLua/build/luajit-2.1.0b2/src/extr_lib_aux.c_adjuststack.c' source_filename = "AnghaBench/xLua/build/luajit-2.1.0b2/src/extr_lib_aux.c_adjuststack.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @LUA_MINSTACK = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @adjuststack], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @adjuststack(ptr nocapture noundef %0) #0 { %2 = load i32, ptr %0, align 8, !tbaa !6 %3 = icmp sgt i32 %2, 1 br i1 %3, label %4, label %31 4: ; preds = %1 %5 = getelementptr inbounds i8, ptr %0, i64 8 %6 = load ptr, ptr %5, align 8, !tbaa !12 %7 = tail call i64 @lua_strlen(ptr noundef %6, i32 noundef -1) #2 br label %8 8: ; preds = %8, %4 %9 = phi i64 [ %7, %4 ], [ %22, %8 ] %10 = phi i32 [ 1, %4 ], [ %11, %8 ] %11 = add nuw nsw i32 %10, 1 %12 = xor i32 %10, -1 %13 = tail call i64 @lua_strlen(ptr noundef %6, i32 noundef %12) #2 %14 = load i32, ptr %0, align 8, !tbaa !6 %15 = sub i32 %14, %10 %16 = add i32 %15, 1 %17 = load i32, ptr @LUA_MINSTACK, align 4, !tbaa !13 %18 = sdiv i32 %17, 2 %19 = icmp sge i32 %16, %18 %20 = icmp ugt i64 %9, %13 %21 = select i1 %19, i1 true, i1 %20 %22 = add i64 %13, %9 %23 = icmp slt i32 %11, %14 %24 = select i1 %21, i1 %23, i1 false br i1 %24, label %8, label %25, !llvm.loop !14 25: ; preds = %8 %26 = select i1 %21, i32 %11, i32 %10 %27 = tail call i32 @lua_concat(ptr noundef %6, i32 noundef %26) #2 %28 = load i32, ptr %0, align 8, !tbaa !6 %29 = sub i32 %28, %26 %30 = add i32 %29, 1 store i32 %30, ptr %0, align 8, !tbaa !6 br label %31 31: ; preds = %25, %1 ret void } declare i64 @lua_strlen(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @lua_concat(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!7, !11, i64 8} !13 = !{!8, !8, i64 0} !14 = distinct !{!14, !15} !15 = !{!"llvm.loop.mustprogress"}
xLua_build_luajit-2.1.0b2_src_extr_lib_aux.c_adjuststack
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/plat-omap/extr_iommu.c_iopte_free.c' source_filename = "AnghaBench/fastsocket/kernel/arch/arm/plat-omap/extr_iommu.c_iopte_free.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @iopte_cachep = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @iopte_free], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @iopte_free(ptr noundef %0) #0 { %2 = load i32, ptr @iopte_cachep, align 4, !tbaa !5 %3 = tail call i32 @kmem_cache_free(i32 noundef %2, ptr noundef %0) #2 ret void } declare i32 @kmem_cache_free(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/plat-omap/extr_iommu.c_iopte_free.c' source_filename = "AnghaBench/fastsocket/kernel/arch/arm/plat-omap/extr_iommu.c_iopte_free.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @iopte_cachep = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @iopte_free], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @iopte_free(ptr noundef %0) #0 { %2 = load i32, ptr @iopte_cachep, align 4, !tbaa !6 %3 = tail call i32 @kmem_cache_free(i32 noundef %2, ptr noundef %0) #2 ret void } declare i32 @kmem_cache_free(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
fastsocket_kernel_arch_arm_plat-omap_extr_iommu.c_iopte_free
; ModuleID = 'AnghaBench/sumatrapdf/mupdf/source/fitz/extr_filter-dct.c_skip_input_data_dct.c' source_filename = "AnghaBench/sumatrapdf/mupdf/source/fitz/extr_filter-dct.c_skip_input_data_dct.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.jpeg_source_mgr = type { i64, i64, ptr } @llvm.compiler.used = appending global [1 x ptr] [ptr @skip_input_data_dct], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @skip_input_data_dct(ptr noundef %0, i64 noundef %1) #0 { %3 = load ptr, ptr %0, align 8, !tbaa !5 %4 = icmp sgt i64 %1, 0 br i1 %4, label %5, label %25 5: ; preds = %2 %6 = load i64, ptr %3, align 8, !tbaa !10 %7 = icmp ult i64 %6, %1 br i1 %7, label %8, label %18 8: ; preds = %5 %9 = getelementptr inbounds %struct.jpeg_source_mgr, ptr %3, i64 0, i32 2 br label %10 10: ; preds = %8, %10 %11 = phi i64 [ %6, %8 ], [ %16, %10 ] %12 = phi i64 [ %1, %8 ], [ %13, %10 ] %13 = sub nsw i64 %12, %11 %14 = load ptr, ptr %9, align 8, !tbaa !13 %15 = tail call i32 %14(ptr noundef nonnull %0) #1 %16 = load i64, ptr %3, align 8, !tbaa !10 %17 = icmp ugt i64 %13, %16 br i1 %17, label %10, label %18, !llvm.loop !14 18: ; preds = %10, %5 %19 = phi i64 [ %1, %5 ], [ %13, %10 ] %20 = phi i64 [ %6, %5 ], [ %16, %10 ] %21 = getelementptr inbounds %struct.jpeg_source_mgr, ptr %3, i64 0, i32 1 %22 = load i64, ptr %21, align 8, !tbaa !16 %23 = add nsw i64 %22, %19 store i64 %23, ptr %21, align 8, !tbaa !16 %24 = sub i64 %20, %19 store i64 %24, ptr %3, align 8, !tbaa !10 br label %25 25: ; preds = %18, %2 ret void } attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_4__", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"jpeg_source_mgr", !12, i64 0, !12, i64 8, !7, i64 16} !12 = !{!"long", !8, i64 0} !13 = !{!11, !7, i64 16} !14 = distinct !{!14, !15} !15 = !{!"llvm.loop.mustprogress"} !16 = !{!11, !12, i64 8}
; ModuleID = 'AnghaBench/sumatrapdf/mupdf/source/fitz/extr_filter-dct.c_skip_input_data_dct.c' source_filename = "AnghaBench/sumatrapdf/mupdf/source/fitz/extr_filter-dct.c_skip_input_data_dct.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @skip_input_data_dct], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @skip_input_data_dct(ptr noundef %0, i64 noundef %1) #0 { %3 = load ptr, ptr %0, align 8, !tbaa !6 %4 = icmp sgt i64 %1, 0 br i1 %4, label %5, label %25 5: ; preds = %2 %6 = load i64, ptr %3, align 8, !tbaa !11 %7 = icmp ult i64 %6, %1 br i1 %7, label %8, label %18 8: ; preds = %5 %9 = getelementptr inbounds i8, ptr %3, i64 16 br label %10 10: ; preds = %8, %10 %11 = phi i64 [ %6, %8 ], [ %16, %10 ] %12 = phi i64 [ %1, %8 ], [ %13, %10 ] %13 = sub nsw i64 %12, %11 %14 = load ptr, ptr %9, align 8, !tbaa !14 %15 = tail call i32 %14(ptr noundef nonnull %0) #1 %16 = load i64, ptr %3, align 8, !tbaa !11 %17 = icmp ugt i64 %13, %16 br i1 %17, label %10, label %18, !llvm.loop !15 18: ; preds = %10, %5 %19 = phi i64 [ %1, %5 ], [ %13, %10 ] %20 = phi i64 [ %6, %5 ], [ %16, %10 ] %21 = getelementptr inbounds i8, ptr %3, i64 8 %22 = load i64, ptr %21, align 8, !tbaa !17 %23 = add nsw i64 %22, %19 store i64 %23, ptr %21, align 8, !tbaa !17 %24 = sub i64 %20, %19 store i64 %24, ptr %3, align 8, !tbaa !11 br label %25 25: ; preds = %18, %2 ret void } attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_4__", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !13, i64 0} !12 = !{!"jpeg_source_mgr", !13, i64 0, !13, i64 8, !8, i64 16} !13 = !{!"long", !9, i64 0} !14 = !{!12, !8, i64 16} !15 = distinct !{!15, !16} !16 = !{!"llvm.loop.mustprogress"} !17 = !{!12, !13, i64 8}
sumatrapdf_mupdf_source_fitz_extr_filter-dct.c_skip_input_data_dct
; ModuleID = 'AnghaBench/exploitdb/exploits/osx/dos/extr_39928.c_main.c' source_filename = "AnghaBench/exploitdb/exploits/osx/dos/extr_39928.c_main.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [17 x i8] c"IntelAccelerator\00", align 1 @client = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: noreturn nounwind uwtable define dso_local noundef i32 @main(i32 noundef %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 { %3 = alloca i32, align 4 br label %4 4: ; preds = %4, %2 %5 = call i32 @get_user_client(ptr noundef nonnull @.str, i32 noundef 2) #3 store i32 %5, ptr @client, align 4, !tbaa !5 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 %6 = call i32 @pthread_create(ptr noundef nonnull %3, ptr noundef null, ptr noundef nonnull @poc, ptr noundef null) #3 %7 = call i32 @poc(ptr noundef null) #3 %8 = load i32, ptr %3, align 4, !tbaa !5 %9 = call i32 @pthread_join(i32 noundef %8, ptr noundef null) #3 %10 = load i32, ptr @client, align 4, !tbaa !5 %11 = call i32 @IOServiceClose(i32 noundef %10) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 br label %4 } declare i32 @get_user_client(ptr noundef, i32 noundef) local_unnamed_addr #1 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2 declare i32 @pthread_create(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @poc(ptr noundef) #1 declare i32 @pthread_join(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @IOServiceClose(i32 noundef) local_unnamed_addr #1 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2 attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/exploitdb/exploits/osx/dos/extr_39928.c_main.c' source_filename = "AnghaBench/exploitdb/exploits/osx/dos/extr_39928.c_main.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [17 x i8] c"IntelAccelerator\00", align 1 @client = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: noreturn nounwind ssp uwtable(sync) define noundef i32 @main(i32 noundef %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 { %3 = alloca i32, align 4 br label %4 4: ; preds = %4, %2 %5 = call i32 @get_user_client(ptr noundef nonnull @.str, i32 noundef 2) #3 store i32 %5, ptr @client, align 4, !tbaa !6 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 %6 = call i32 @pthread_create(ptr noundef nonnull %3, ptr noundef null, ptr noundef nonnull @poc, ptr noundef null) #3 %7 = call i32 @poc(ptr noundef null) #3 %8 = load i32, ptr %3, align 4, !tbaa !6 %9 = call i32 @pthread_join(i32 noundef %8, ptr noundef null) #3 %10 = load i32, ptr @client, align 4, !tbaa !6 %11 = call i32 @IOServiceClose(i32 noundef %10) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 br label %4 } declare i32 @get_user_client(ptr noundef, i32 noundef) local_unnamed_addr #1 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2 declare i32 @pthread_create(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @poc(ptr noundef) #1 declare i32 @pthread_join(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @IOServiceClose(i32 noundef) local_unnamed_addr #1 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2 attributes #0 = { noreturn nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
exploitdb_exploits_osx_dos_extr_39928.c_main
; ModuleID = 'AnghaBench/freebsd/sys/x86/isa/extr_atrtc.c_rtc_start.c' source_filename = "AnghaBench/freebsd/sys/x86/isa/extr_atrtc.c_rtc_start.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @rtc_start], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef i32 @rtc_start(ptr nocapture readnone %0, i32 %1, i32 noundef %2) #0 { %4 = ashr i32 %2, 1 %5 = add nsw i32 %4, %2 %6 = tail call i64 @fls(i32 noundef %5) #2 %7 = add nsw i64 %6, -17 %8 = tail call i32 @max(i64 noundef %7, i32 noundef 1) #2 %9 = tail call i32 @atrtc_rate(i32 noundef %8) #2 %10 = tail call i32 (...) @atrtc_enable_intr() #2 ret i32 0 } declare i32 @atrtc_rate(i32 noundef) local_unnamed_addr #1 declare i32 @max(i64 noundef, i32 noundef) local_unnamed_addr #1 declare i64 @fls(i32 noundef) local_unnamed_addr #1 declare i32 @atrtc_enable_intr(...) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/freebsd/sys/x86/isa/extr_atrtc.c_rtc_start.c' source_filename = "AnghaBench/freebsd/sys/x86/isa/extr_atrtc.c_rtc_start.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @rtc_start], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal noundef i32 @rtc_start(ptr nocapture readnone %0, i32 %1, i32 noundef %2) #0 { %4 = ashr i32 %2, 1 %5 = add nsw i32 %4, %2 %6 = tail call i64 @fls(i32 noundef %5) #2 %7 = add nsw i64 %6, -17 %8 = tail call i32 @max(i64 noundef %7, i32 noundef 1) #2 %9 = tail call i32 @atrtc_rate(i32 noundef %8) #2 %10 = tail call i32 @atrtc_enable_intr() #2 ret i32 0 } declare i32 @atrtc_rate(i32 noundef) local_unnamed_addr #1 declare i32 @max(i64 noundef, i32 noundef) local_unnamed_addr #1 declare i64 @fls(i32 noundef) local_unnamed_addr #1 declare i32 @atrtc_enable_intr(...) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
freebsd_sys_x86_isa_extr_atrtc.c_rtc_start
; ModuleID = 'AnghaBench/linux/net/sunrpc/extr_xprtsock.c_xs_local_set_port.c' source_filename = "AnghaBench/linux/net/sunrpc/extr_xprtsock.c_xs_local_set_port.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @xs_local_set_port], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define internal void @xs_local_set_port(ptr nocapture readnone %0, i16 zeroext %1) #0 { ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/linux/net/sunrpc/extr_xprtsock.c_xs_local_set_port.c' source_filename = "AnghaBench/linux/net/sunrpc/extr_xprtsock.c_xs_local_set_port.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @xs_local_set_port], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define internal void @xs_local_set_port(ptr nocapture readnone %0, i16 zeroext %1) #0 { ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
linux_net_sunrpc_extr_xprtsock.c_xs_local_set_port
; ModuleID = 'AnghaBench/freebsd/sys/dev/ciss/extr_ciss.c_ciss_notify_physical.c' source_filename = "AnghaBench/freebsd/sys/dev/ciss/extr_ciss.c_ciss_notify_physical.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @ciss_notify_physical], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define internal void @ciss_notify_physical(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 { ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/freebsd/sys/dev/ciss/extr_ciss.c_ciss_notify_physical.c' source_filename = "AnghaBench/freebsd/sys/dev/ciss/extr_ciss.c_ciss_notify_physical.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @ciss_notify_physical], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define internal void @ciss_notify_physical(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 { ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
freebsd_sys_dev_ciss_extr_ciss.c_ciss_notify_physical
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/cio/extr_qdio_setup.c___qdio_allocate_qs.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/cio/extr_qdio_setup.c___qdio_allocate_qs.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @qdio_q_cache = dso_local local_unnamed_addr global i32 0, align 4 @GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4 @ENOMEM = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @__qdio_allocate_qs], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @__qdio_allocate_qs(ptr nocapture noundef writeonly %0, i32 noundef %1) #0 { %3 = icmp sgt i32 %1, 0 br i1 %3, label %4, label %34 4: ; preds = %2 %5 = zext nneg i32 %1 to i64 br label %6 6: ; preds = %4, %28 %7 = phi i64 [ 0, %4 ], [ %32, %28 ] %8 = load i32, ptr @qdio_q_cache, align 4, !tbaa !5 %9 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5 %10 = tail call ptr @kmem_cache_alloc(i32 noundef %8, i32 noundef %9) #2 %11 = icmp eq ptr %10, null br i1 %11, label %12, label %15 12: ; preds = %6 %13 = load i32, ptr @ENOMEM, align 4, !tbaa !5 %14 = sub nsw i32 0, %13 br label %34 15: ; preds = %6 %16 = ptrtoint ptr %10 to i64 %17 = and i64 %16, 255 %18 = tail call i32 @WARN_ON(i64 noundef %17) #2 %19 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5 %20 = tail call i64 @__get_free_page(i32 noundef %19) #2 %21 = inttoptr i64 %20 to ptr store ptr %21, ptr %10, align 8, !tbaa !9 %22 = icmp eq i64 %20, 0 br i1 %22, label %23, label %28 23: ; preds = %15 %24 = load i32, ptr @qdio_q_cache, align 4, !tbaa !5 %25 = tail call i32 @kmem_cache_free(i32 noundef %24, ptr noundef nonnull %10) #2 %26 = load i32, ptr @ENOMEM, align 4, !tbaa !5 %27 = sub nsw i32 0, %26 br label %34 28: ; preds = %15 %29 = and i64 %20, 2047 %30 = tail call i32 @WARN_ON(i64 noundef %29) #2 %31 = getelementptr inbounds ptr, ptr %0, i64 %7 store ptr %10, ptr %31, align 8, !tbaa !12 %32 = add nuw nsw i64 %7, 1 %33 = icmp eq i64 %32, %5 br i1 %33, label %34, label %6, !llvm.loop !13 34: ; preds = %28, %2, %23, %12 %35 = phi i32 [ %27, %23 ], [ %14, %12 ], [ 0, %2 ], [ 0, %28 ] ret i32 %35 } declare ptr @kmem_cache_alloc(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @WARN_ON(i64 noundef) local_unnamed_addr #1 declare i64 @__get_free_page(i32 noundef) local_unnamed_addr #1 declare i32 @kmem_cache_free(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 0} !10 = !{!"qdio_q", !11, i64 0} !11 = !{!"any pointer", !7, i64 0} !12 = !{!11, !11, i64 0} !13 = distinct !{!13, !14} !14 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/cio/extr_qdio_setup.c___qdio_allocate_qs.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/cio/extr_qdio_setup.c___qdio_allocate_qs.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @qdio_q_cache = common local_unnamed_addr global i32 0, align 4 @GFP_KERNEL = common local_unnamed_addr global i32 0, align 4 @ENOMEM = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @__qdio_allocate_qs], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 -2147483647, -2147483648) i32 @__qdio_allocate_qs(ptr nocapture noundef writeonly %0, i32 noundef %1) #0 { %3 = icmp sgt i32 %1, 0 br i1 %3, label %4, label %34 4: ; preds = %2 %5 = zext nneg i32 %1 to i64 br label %6 6: ; preds = %4, %28 %7 = phi i64 [ 0, %4 ], [ %32, %28 ] %8 = load i32, ptr @qdio_q_cache, align 4, !tbaa !6 %9 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6 %10 = tail call ptr @kmem_cache_alloc(i32 noundef %8, i32 noundef %9) #2 %11 = icmp eq ptr %10, null br i1 %11, label %12, label %15 12: ; preds = %6 %13 = load i32, ptr @ENOMEM, align 4, !tbaa !6 %14 = sub nsw i32 0, %13 br label %34 15: ; preds = %6 %16 = ptrtoint ptr %10 to i64 %17 = and i64 %16, 255 %18 = tail call i32 @WARN_ON(i64 noundef %17) #2 %19 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6 %20 = tail call i64 @__get_free_page(i32 noundef %19) #2 %21 = inttoptr i64 %20 to ptr store ptr %21, ptr %10, align 8, !tbaa !10 %22 = icmp eq i64 %20, 0 br i1 %22, label %23, label %28 23: ; preds = %15 %24 = load i32, ptr @qdio_q_cache, align 4, !tbaa !6 %25 = tail call i32 @kmem_cache_free(i32 noundef %24, ptr noundef nonnull %10) #2 %26 = load i32, ptr @ENOMEM, align 4, !tbaa !6 %27 = sub nsw i32 0, %26 br label %34 28: ; preds = %15 %29 = and i64 %20, 2047 %30 = tail call i32 @WARN_ON(i64 noundef %29) #2 %31 = getelementptr inbounds ptr, ptr %0, i64 %7 store ptr %10, ptr %31, align 8, !tbaa !13 %32 = add nuw nsw i64 %7, 1 %33 = icmp eq i64 %32, %5 br i1 %33, label %34, label %6, !llvm.loop !14 34: ; preds = %28, %2, %23, %12 %35 = phi i32 [ %27, %23 ], [ %14, %12 ], [ 0, %2 ], [ 0, %28 ] ret i32 %35 } declare ptr @kmem_cache_alloc(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @WARN_ON(i64 noundef) local_unnamed_addr #1 declare i64 @__get_free_page(i32 noundef) local_unnamed_addr #1 declare i32 @kmem_cache_free(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"qdio_q", !12, i64 0} !12 = !{!"any pointer", !8, i64 0} !13 = !{!12, !12, i64 0} !14 = distinct !{!14, !15} !15 = !{!"llvm.loop.mustprogress"}
fastsocket_kernel_drivers_s390_cio_extr_qdio_setup.c___qdio_allocate_qs
; ModuleID = 'AnghaBench/linux/arch/powerpc/xmon/extr_ppc-opc.c_insert_sprg.c' source_filename = "AnghaBench/linux/arch/powerpc/xmon/extr_ppc-opc.c_insert_sprg.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @ALLOW8_SPRG = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [20 x i8] c"invalid sprg number\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @insert_sprg], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i64 @insert_sprg(i64 noundef %0, i64 noundef %1, i32 noundef %2, ptr nocapture noundef writeonly %3) #0 { %5 = icmp sgt i64 %1, 7 br i1 %5, label %12, label %6 6: ; preds = %4 %7 = icmp sgt i64 %1, 3 br i1 %7, label %8, label %14 8: ; preds = %6 %9 = load i32, ptr @ALLOW8_SPRG, align 4, !tbaa !5 %10 = and i32 %9, %2 %11 = icmp eq i32 %10, 0 br i1 %11, label %12, label %14 12: ; preds = %8, %4 %13 = tail call ptr @_(ptr noundef nonnull @.str) #2 store ptr %13, ptr %3, align 8, !tbaa !9 br label %14 14: ; preds = %12, %8, %6 %15 = icmp sgt i64 %1, 3 %16 = and i64 %0, 256 %17 = icmp eq i64 %16, 0 %18 = and i1 %15, %17 %19 = shl i64 %1, 16 %20 = or i64 %19, 1048576 %21 = select i1 %18, i64 %19, i64 %20 %22 = and i64 %21, 1507328 %23 = or i64 %22, %0 ret i64 %23 } declare ptr @_(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"any pointer", !7, i64 0}
; ModuleID = 'AnghaBench/linux/arch/powerpc/xmon/extr_ppc-opc.c_insert_sprg.c' source_filename = "AnghaBench/linux/arch/powerpc/xmon/extr_ppc-opc.c_insert_sprg.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @ALLOW8_SPRG = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [20 x i8] c"invalid sprg number\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @insert_sprg], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i64 @insert_sprg(i64 noundef %0, i64 noundef %1, i32 noundef %2, ptr nocapture noundef writeonly %3) #0 { %5 = icmp sgt i64 %1, 7 br i1 %5, label %12, label %6 6: ; preds = %4 %7 = icmp sgt i64 %1, 3 br i1 %7, label %8, label %14 8: ; preds = %6 %9 = load i32, ptr @ALLOW8_SPRG, align 4, !tbaa !6 %10 = and i32 %9, %2 %11 = icmp eq i32 %10, 0 br i1 %11, label %12, label %14 12: ; preds = %8, %4 %13 = tail call ptr @_(ptr noundef nonnull @.str) #2 store ptr %13, ptr %3, align 8, !tbaa !10 br label %14 14: ; preds = %12, %8, %6 %15 = icmp sgt i64 %1, 3 %16 = and i64 %0, 256 %17 = icmp eq i64 %16, 0 %18 = and i1 %15, %17 %19 = shl i64 %1, 16 %20 = or i64 %19, 1048576 %21 = select i1 %18, i64 %19, i64 %20 %22 = and i64 %21, 1507328 %23 = or i64 %22, %0 ret i64 %23 } declare ptr @_(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"any pointer", !8, i64 0}
linux_arch_powerpc_xmon_extr_ppc-opc.c_insert_sprg
; ModuleID = 'AnghaBench/linux/drivers/target/iscsi/extr_iscsi_target_nego.c_iscsi_target_login_drop.c' source_filename = "AnghaBench/linux/drivers/target/iscsi/extr_iscsi_target_nego.c_iscsi_target_login_drop.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.iscsi_login = type { i32, ptr } @llvm.compiler.used = appending global [1 x ptr] [ptr @iscsi_target_login_drop], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @iscsi_target_login_drop(ptr noundef %0, ptr nocapture noundef readonly %1) #0 { %3 = getelementptr inbounds %struct.iscsi_login, ptr %1, i64 0, i32 1 %4 = load ptr, ptr %3, align 8, !tbaa !5 %5 = load i32, ptr %1, align 8, !tbaa !11 %6 = tail call i32 @iscsi_remove_failed_auth_entry(ptr noundef %0) #2 %7 = tail call i32 @iscsi_target_nego_release(ptr noundef %0) #2 %8 = tail call i32 @iscsi_target_login_sess_out(ptr noundef %0, ptr noundef %4, i32 noundef %5, i32 noundef 1) #2 ret void } declare i32 @iscsi_remove_failed_auth_entry(ptr noundef) local_unnamed_addr #1 declare i32 @iscsi_target_nego_release(ptr noundef) local_unnamed_addr #1 declare i32 @iscsi_target_login_sess_out(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 8} !6 = !{!"iscsi_login", !7, i64 0, !10, i64 8} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!6, !7, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/target/iscsi/extr_iscsi_target_nego.c_iscsi_target_login_drop.c' source_filename = "AnghaBench/linux/drivers/target/iscsi/extr_iscsi_target_nego.c_iscsi_target_login_drop.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @iscsi_target_login_drop], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @iscsi_target_login_drop(ptr noundef %0, ptr nocapture noundef readonly %1) #0 { %3 = getelementptr inbounds i8, ptr %1, i64 8 %4 = load ptr, ptr %3, align 8, !tbaa !6 %5 = load i32, ptr %1, align 8, !tbaa !12 %6 = tail call i32 @iscsi_remove_failed_auth_entry(ptr noundef %0) #2 %7 = tail call i32 @iscsi_target_nego_release(ptr noundef %0) #2 %8 = tail call i32 @iscsi_target_login_sess_out(ptr noundef %0, ptr noundef %4, i32 noundef %5, i32 noundef 1) #2 ret void } declare i32 @iscsi_remove_failed_auth_entry(ptr noundef) local_unnamed_addr #1 declare i32 @iscsi_target_nego_release(ptr noundef) local_unnamed_addr #1 declare i32 @iscsi_target_login_sess_out(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 8} !7 = !{!"iscsi_login", !8, i64 0, !11, i64 8} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!7, !8, i64 0}
linux_drivers_target_iscsi_extr_iscsi_target_nego.c_iscsi_target_login_drop
; ModuleID = 'AnghaBench/linux/drivers/block/extr_floppy.c_set_floppy.c' source_filename = "AnghaBench/linux/drivers/block/extr_floppy.c_set_floppy.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @UDRS = dso_local local_unnamed_addr global ptr null, align 8 @floppy_type = dso_local local_unnamed_addr global i64 0, align 8 @_floppy = dso_local local_unnamed_addr global i64 0, align 8 @current_type = dso_local local_unnamed_addr global ptr null, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @set_floppy], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @set_floppy(i32 noundef %0) #0 { %2 = load ptr, ptr @UDRS, align 8, !tbaa !5 %3 = load i32, ptr %2, align 4, !tbaa !9 %4 = tail call i32 @ITYPE(i32 noundef %3) #2 %5 = icmp eq i32 %4, 0 br i1 %5, label %10, label %6 6: ; preds = %1 %7 = load i64, ptr @floppy_type, align 8, !tbaa !12 %8 = sext i32 %4 to i64 %9 = add nsw i64 %7, %8 br label %15 10: ; preds = %1 %11 = load ptr, ptr @current_type, align 8, !tbaa !5 %12 = sext i32 %0 to i64 %13 = getelementptr inbounds i64, ptr %11, i64 %12 %14 = load i64, ptr %13, align 8, !tbaa !12 br label %15 15: ; preds = %10, %6 %16 = phi i64 [ %14, %10 ], [ %9, %6 ] store i64 %16, ptr @_floppy, align 8, !tbaa !12 ret void } declare i32 @ITYPE(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 0} !10 = !{!"TYPE_2__", !11, i64 0} !11 = !{!"int", !7, i64 0} !12 = !{!13, !13, i64 0} !13 = !{!"long", !7, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/block/extr_floppy.c_set_floppy.c' source_filename = "AnghaBench/linux/drivers/block/extr_floppy.c_set_floppy.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @UDRS = common local_unnamed_addr global ptr null, align 8 @floppy_type = common local_unnamed_addr global i64 0, align 8 @_floppy = common local_unnamed_addr global i64 0, align 8 @current_type = common local_unnamed_addr global ptr null, align 8 @llvm.used = appending global [1 x ptr] [ptr @set_floppy], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @set_floppy(i32 noundef %0) #0 { %2 = load ptr, ptr @UDRS, align 8, !tbaa !6 %3 = load i32, ptr %2, align 4, !tbaa !10 %4 = tail call i32 @ITYPE(i32 noundef %3) #2 %5 = icmp eq i32 %4, 0 br i1 %5, label %10, label %6 6: ; preds = %1 %7 = load i64, ptr @floppy_type, align 8, !tbaa !13 %8 = sext i32 %4 to i64 %9 = add nsw i64 %7, %8 br label %15 10: ; preds = %1 %11 = load ptr, ptr @current_type, align 8, !tbaa !6 %12 = sext i32 %0 to i64 %13 = getelementptr inbounds i64, ptr %11, i64 %12 %14 = load i64, ptr %13, align 8, !tbaa !13 br label %15 15: ; preds = %10, %6 %16 = phi i64 [ %14, %10 ], [ %9, %6 ] store i64 %16, ptr @_floppy, align 8, !tbaa !13 ret void } declare i32 @ITYPE(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"TYPE_2__", !12, i64 0} !12 = !{!"int", !8, i64 0} !13 = !{!14, !14, i64 0} !14 = !{!"long", !8, i64 0}
linux_drivers_block_extr_floppy.c_set_floppy
; ModuleID = 'AnghaBench/radare2/libr/asm/arch/xtensa/gnu/extr_xtensa-modules.c_Opcode_xor_Slot_xt_flix64_slot1_encode.c' source_filename = "AnghaBench/radare2/libr/asm/arch/xtensa/gnu/extr_xtensa-modules.c_Opcode_xor_Slot_xt_flix64_slot1_encode.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @Opcode_xor_Slot_xt_flix64_slot1_encode], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable define internal void @Opcode_xor_Slot_xt_flix64_slot1_encode(ptr nocapture noundef writeonly %0) #0 { store i32 720896, ptr %0, align 4, !tbaa !5 ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/radare2/libr/asm/arch/xtensa/gnu/extr_xtensa-modules.c_Opcode_xor_Slot_xt_flix64_slot1_encode.c' source_filename = "AnghaBench/radare2/libr/asm/arch/xtensa/gnu/extr_xtensa-modules.c_Opcode_xor_Slot_xt_flix64_slot1_encode.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @Opcode_xor_Slot_xt_flix64_slot1_encode], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) define internal void @Opcode_xor_Slot_xt_flix64_slot1_encode(ptr nocapture noundef writeonly %0) #0 { store i32 720896, ptr %0, align 4, !tbaa !6 ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
radare2_libr_asm_arch_xtensa_gnu_extr_xtensa-modules.c_Opcode_xor_Slot_xt_flix64_slot1_encode
; ModuleID = 'AnghaBench/linux/arch/s390/crypto/extr_sha_common.c_s390_crypto_shash_parmsize.c' source_filename = "AnghaBench/linux/arch/s390/crypto/extr_sha_common.c_s390_crypto_shash_parmsize.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @s390_crypto_shash_parmsize], section "llvm.metadata" @switch.table.s390_crypto_shash_parmsize = private unnamed_addr constant [7 x i32] [i32 64, i32 32, i32 20, i32 200, i32 200, i32 200, i32 200], align 4 ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable define internal i32 @s390_crypto_shash_parmsize(i32 noundef %0) #0 { %2 = add i32 %0, -128 %3 = icmp ult i32 %2, 7 br i1 %3, label %7, label %4 4: ; preds = %1 %5 = load i32, ptr @EINVAL, align 4, !tbaa !5 %6 = sub nsw i32 0, %5 br label %11 7: ; preds = %1 %8 = zext nneg i32 %2 to i64 %9 = getelementptr inbounds [7 x i32], ptr @switch.table.s390_crypto_shash_parmsize, i64 0, i64 %8 %10 = load i32, ptr %9, align 4 br label %11 11: ; preds = %7, %4 %12 = phi i32 [ %6, %4 ], [ %10, %7 ] ret i32 %12 } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/arch/s390/crypto/extr_sha_common.c_s390_crypto_shash_parmsize.c' source_filename = "AnghaBench/linux/arch/s390/crypto/extr_sha_common.c_s390_crypto_shash_parmsize.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @EINVAL = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @s390_crypto_shash_parmsize], section "llvm.metadata" @switch.table.s390_crypto_shash_parmsize = private unnamed_addr constant [7 x i32] [i32 64, i32 32, i32 20, i32 200, i32 200, i32 200, i32 200], align 4 ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) define internal range(i32 -2147483647, -2147483648) i32 @s390_crypto_shash_parmsize(i32 noundef %0) #0 { %2 = add i32 %0, -128 %3 = icmp ult i32 %2, 7 br i1 %3, label %7, label %4 4: ; preds = %1 %5 = load i32, ptr @EINVAL, align 4, !tbaa !6 %6 = sub nsw i32 0, %5 br label %11 7: ; preds = %1 %8 = zext nneg i32 %2 to i64 %9 = getelementptr inbounds [7 x i32], ptr @switch.table.s390_crypto_shash_parmsize, i64 0, i64 %8 %10 = load i32, ptr %9, align 4 br label %11 11: ; preds = %7, %4 %12 = phi i32 [ %6, %4 ], [ %10, %7 ] ret i32 %12 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_arch_s390_crypto_extr_sha_common.c_s390_crypto_shash_parmsize
; ModuleID = 'AnghaBench/sumatrapdf/mupdf/source/fitz/extr_load-jbig2.c_error_callback.c' source_filename = "AnghaBench/sumatrapdf/mupdf/source/fitz/extr_load-jbig2.c_error_callback.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @JBIG2_SEVERITY_FATAL = dso_local local_unnamed_addr global i64 0, align 8 @.str = private unnamed_addr constant [32 x i8] c"jbig2dec error: %s (segment %d)\00", align 1 @JBIG2_SEVERITY_WARNING = dso_local local_unnamed_addr global i64 0, align 8 @.str.1 = private unnamed_addr constant [34 x i8] c"jbig2dec warning: %s (segment %d)\00", align 1 @JBIG2_SEVERITY_INFO = dso_local local_unnamed_addr global i64 0, align 8 @.str.2 = private unnamed_addr constant [31 x i8] c"jbig2dec info: %s (segment %d)\00", align 1 @JBIG2_SEVERITY_DEBUG = dso_local local_unnamed_addr global i64 0, align 8 @.str.3 = private unnamed_addr constant [32 x i8] c"jbig2dec debug: %s (segment %d)\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @error_callback], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @error_callback(ptr noundef %0, ptr noundef %1, i64 noundef %2, i32 noundef %3) #0 { %5 = load i64, ptr @JBIG2_SEVERITY_FATAL, align 8, !tbaa !5 %6 = icmp eq i64 %5, %2 br i1 %6, label %16, label %7 7: ; preds = %4 %8 = load i64, ptr @JBIG2_SEVERITY_WARNING, align 8, !tbaa !5 %9 = icmp eq i64 %8, %2 br i1 %9, label %16, label %10 10: ; preds = %7 %11 = load i64, ptr @JBIG2_SEVERITY_INFO, align 8, !tbaa !5 %12 = icmp eq i64 %11, %2 br i1 %12, label %16, label %13 13: ; preds = %10 %14 = load i64, ptr @JBIG2_SEVERITY_DEBUG, align 8, !tbaa !5 %15 = icmp eq i64 %14, %2 br i1 %15, label %16, label %19 16: ; preds = %13, %10, %7, %4 %17 = phi ptr [ @.str, %4 ], [ @.str.1, %7 ], [ @.str.2, %10 ], [ @.str.3, %13 ] %18 = tail call i32 @fz_warn(ptr noundef %0, ptr noundef nonnull %17, ptr noundef %1, i32 noundef %3) #2 br label %19 19: ; preds = %16, %13 ret void } declare i32 @fz_warn(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/sumatrapdf/mupdf/source/fitz/extr_load-jbig2.c_error_callback.c' source_filename = "AnghaBench/sumatrapdf/mupdf/source/fitz/extr_load-jbig2.c_error_callback.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @JBIG2_SEVERITY_FATAL = common local_unnamed_addr global i64 0, align 8 @.str = private unnamed_addr constant [32 x i8] c"jbig2dec error: %s (segment %d)\00", align 1 @JBIG2_SEVERITY_WARNING = common local_unnamed_addr global i64 0, align 8 @.str.1 = private unnamed_addr constant [34 x i8] c"jbig2dec warning: %s (segment %d)\00", align 1 @JBIG2_SEVERITY_INFO = common local_unnamed_addr global i64 0, align 8 @.str.2 = private unnamed_addr constant [31 x i8] c"jbig2dec info: %s (segment %d)\00", align 1 @JBIG2_SEVERITY_DEBUG = common local_unnamed_addr global i64 0, align 8 @.str.3 = private unnamed_addr constant [32 x i8] c"jbig2dec debug: %s (segment %d)\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @error_callback], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @error_callback(ptr noundef %0, ptr noundef %1, i64 noundef %2, i32 noundef %3) #0 { %5 = load i64, ptr @JBIG2_SEVERITY_FATAL, align 8, !tbaa !6 %6 = icmp eq i64 %5, %2 br i1 %6, label %16, label %7 7: ; preds = %4 %8 = load i64, ptr @JBIG2_SEVERITY_WARNING, align 8, !tbaa !6 %9 = icmp eq i64 %8, %2 br i1 %9, label %16, label %10 10: ; preds = %7 %11 = load i64, ptr @JBIG2_SEVERITY_INFO, align 8, !tbaa !6 %12 = icmp eq i64 %11, %2 br i1 %12, label %16, label %13 13: ; preds = %10 %14 = load i64, ptr @JBIG2_SEVERITY_DEBUG, align 8, !tbaa !6 %15 = icmp eq i64 %14, %2 br i1 %15, label %16, label %19 16: ; preds = %13, %10, %7, %4 %17 = phi ptr [ @.str, %4 ], [ @.str.1, %7 ], [ @.str.2, %10 ], [ @.str.3, %13 ] %18 = tail call i32 @fz_warn(ptr noundef %0, ptr noundef nonnull %17, ptr noundef %1, i32 noundef %3) #2 br label %19 19: ; preds = %16, %13 ret void } declare i32 @fz_warn(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
sumatrapdf_mupdf_source_fitz_extr_load-jbig2.c_error_callback
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/ti/wlcore/extr_acx.c_wl1271_acx_frag_threshold.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/ti/wlcore/extr_acx.c_wl1271_acx_frag_threshold.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @IEEE80211_MAX_FRAG_THRESHOLD = dso_local local_unnamed_addr global i64 0, align 8 @DEBUG_ACX = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [23 x i8] c"acx frag threshold: %d\00", align 1 @GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4 @ENOMEM = dso_local local_unnamed_addr global i32 0, align 4 @ACX_FRAG_CFG = dso_local local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [37 x i8] c"Setting of frag threshold failed: %d\00", align 1 ; Function Attrs: nounwind uwtable define dso_local i32 @wl1271_acx_frag_threshold(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 { %3 = load i64, ptr @IEEE80211_MAX_FRAG_THRESHOLD, align 8, !tbaa !5 %4 = icmp slt i64 %3, %1 br i1 %4, label %5, label %7 5: ; preds = %2 %6 = load i64, ptr %0, align 8, !tbaa !9 br label %7 7: ; preds = %5, %2 %8 = phi i64 [ %6, %5 ], [ %1, %2 ] %9 = load i32, ptr @DEBUG_ACX, align 4, !tbaa !13 %10 = tail call i32 @wl1271_debug(i32 noundef %9, ptr noundef nonnull @.str, i64 noundef %8) #2 %11 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !13 %12 = tail call ptr @kzalloc(i32 noundef 4, i32 noundef %11) #2 %13 = icmp eq ptr %12, null br i1 %13, label %14, label %17 14: ; preds = %7 %15 = load i32, ptr @ENOMEM, align 4, !tbaa !13 %16 = sub nsw i32 0, %15 br label %25 17: ; preds = %7 %18 = trunc i64 %8 to i32 %19 = tail call i32 @cpu_to_le16(i32 noundef %18) #2 store i32 %19, ptr %12, align 4, !tbaa !15 %20 = load i32, ptr @ACX_FRAG_CFG, align 4, !tbaa !13 %21 = tail call i32 @wl1271_cmd_configure(ptr noundef %0, i32 noundef %20, ptr noundef nonnull %12, i32 noundef 4) #2 %22 = icmp slt i32 %21, 0 br i1 %22, label %23, label %25 23: ; preds = %17 %24 = tail call i32 @wl1271_warning(ptr noundef nonnull @.str.1, i32 noundef %21) #2 br label %25 25: ; preds = %17, %23, %14 %26 = phi i32 [ %21, %23 ], [ %21, %17 ], [ %16, %14 ] %27 = tail call i32 @kfree(ptr noundef %12) #2 ret i32 %26 } declare i32 @wl1271_debug(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1 declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @cpu_to_le16(i32 noundef) local_unnamed_addr #1 declare i32 @wl1271_cmd_configure(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @wl1271_warning(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @kfree(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"wl1271", !11, i64 0} !11 = !{!"TYPE_4__", !12, i64 0} !12 = !{!"TYPE_3__", !6, i64 0} !13 = !{!14, !14, i64 0} !14 = !{!"int", !7, i64 0} !15 = !{!16, !14, i64 0} !16 = !{!"acx_frag_threshold", !14, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/ti/wlcore/extr_acx.c_wl1271_acx_frag_threshold.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/ti/wlcore/extr_acx.c_wl1271_acx_frag_threshold.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @IEEE80211_MAX_FRAG_THRESHOLD = common local_unnamed_addr global i64 0, align 8 @DEBUG_ACX = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [23 x i8] c"acx frag threshold: %d\00", align 1 @GFP_KERNEL = common local_unnamed_addr global i32 0, align 4 @ENOMEM = common local_unnamed_addr global i32 0, align 4 @ACX_FRAG_CFG = common local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [37 x i8] c"Setting of frag threshold failed: %d\00", align 1 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @wl1271_acx_frag_threshold(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 { %3 = load i64, ptr @IEEE80211_MAX_FRAG_THRESHOLD, align 8, !tbaa !6 %4 = icmp slt i64 %3, %1 br i1 %4, label %5, label %7 5: ; preds = %2 %6 = load i64, ptr %0, align 8, !tbaa !10 br label %7 7: ; preds = %5, %2 %8 = phi i64 [ %6, %5 ], [ %1, %2 ] %9 = load i32, ptr @DEBUG_ACX, align 4, !tbaa !14 %10 = tail call i32 @wl1271_debug(i32 noundef %9, ptr noundef nonnull @.str, i64 noundef %8) #2 %11 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !14 %12 = tail call ptr @kzalloc(i32 noundef 4, i32 noundef %11) #2 %13 = icmp eq ptr %12, null br i1 %13, label %14, label %17 14: ; preds = %7 %15 = load i32, ptr @ENOMEM, align 4, !tbaa !14 %16 = sub nsw i32 0, %15 br label %25 17: ; preds = %7 %18 = trunc i64 %8 to i32 %19 = tail call i32 @cpu_to_le16(i32 noundef %18) #2 store i32 %19, ptr %12, align 4, !tbaa !16 %20 = load i32, ptr @ACX_FRAG_CFG, align 4, !tbaa !14 %21 = tail call i32 @wl1271_cmd_configure(ptr noundef %0, i32 noundef %20, ptr noundef nonnull %12, i32 noundef 4) #2 %22 = icmp slt i32 %21, 0 br i1 %22, label %23, label %25 23: ; preds = %17 %24 = tail call i32 @wl1271_warning(ptr noundef nonnull @.str.1, i32 noundef %21) #2 br label %25 25: ; preds = %17, %23, %14 %26 = phi i32 [ %21, %23 ], [ %21, %17 ], [ %16, %14 ] %27 = tail call i32 @kfree(ptr noundef %12) #2 ret i32 %26 } declare i32 @wl1271_debug(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1 declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @cpu_to_le16(i32 noundef) local_unnamed_addr #1 declare i32 @wl1271_cmd_configure(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @wl1271_warning(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @kfree(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"wl1271", !12, i64 0} !12 = !{!"TYPE_4__", !13, i64 0} !13 = !{!"TYPE_3__", !7, i64 0} !14 = !{!15, !15, i64 0} !15 = !{!"int", !8, i64 0} !16 = !{!17, !15, i64 0} !17 = !{!"acx_frag_threshold", !15, i64 0}
fastsocket_kernel_drivers_net_wireless_ti_wlcore_extr_acx.c_wl1271_acx_frag_threshold
; ModuleID = 'AnghaBench/freebsd/sys/net80211/extr_ieee80211_node.c_ieee80211_node_setuptxparms.c' source_filename = "AnghaBench/freebsd/sys/net80211/extr_ieee80211_node.c_ieee80211_node_setuptxparms.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.ieee80211_node = type { i32, ptr, i32, ptr } @IEEE80211_NODE_VHT = dso_local local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_VHT_5GHZ = dso_local local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_VHT_2GHZ = dso_local local_unnamed_addr global i32 0, align 4 @IEEE80211_NODE_HT = dso_local local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_11NA = dso_local local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_11NG = dso_local local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_STURBO_A = dso_local local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_HALF = dso_local local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_QUARTER = dso_local local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_11A = dso_local local_unnamed_addr global i32 0, align 4 @IEEE80211_NODE_ERP = dso_local local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_11G = dso_local local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_11B = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local void @ieee80211_node_setuptxparms(ptr nocapture noundef %0) local_unnamed_addr #0 { %2 = getelementptr inbounds %struct.ieee80211_node, ptr %0, i64 0, i32 3 %3 = load ptr, ptr %2, align 8, !tbaa !5 %4 = load i32, ptr %0, align 8, !tbaa !11 %5 = load i32, ptr @IEEE80211_NODE_VHT, align 4, !tbaa !12 %6 = and i32 %5, %4 %7 = icmp eq i32 %6, 0 br i1 %7, label %14, label %8 8: ; preds = %1 %9 = getelementptr inbounds %struct.ieee80211_node, ptr %0, i64 0, i32 2 %10 = load i32, ptr %9, align 8, !tbaa !13 %11 = tail call i64 @IEEE80211_IS_CHAN_5GHZ(i32 noundef %10) #2 %12 = icmp eq i64 %11, 0 %13 = select i1 %12, ptr @IEEE80211_MODE_VHT_2GHZ, ptr @IEEE80211_MODE_VHT_5GHZ br label %49 14: ; preds = %1 %15 = load i32, ptr @IEEE80211_NODE_HT, align 4, !tbaa !12 %16 = and i32 %15, %4 %17 = icmp eq i32 %16, 0 %18 = getelementptr inbounds %struct.ieee80211_node, ptr %0, i64 0, i32 2 %19 = load i32, ptr %18, align 8, !tbaa !13 br i1 %17, label %24, label %20 20: ; preds = %14 %21 = tail call i64 @IEEE80211_IS_CHAN_5GHZ(i32 noundef %19) #2 %22 = icmp eq i64 %21, 0 %23 = select i1 %22, ptr @IEEE80211_MODE_11NG, ptr @IEEE80211_MODE_11NA br label %49 24: ; preds = %14 %25 = tail call i64 @IEEE80211_IS_CHAN_ST(i32 noundef %19) #2 %26 = icmp eq i64 %25, 0 br i1 %26, label %27, label %49 27: ; preds = %24 %28 = load i32, ptr %18, align 8, !tbaa !13 %29 = tail call i64 @IEEE80211_IS_CHAN_HALF(i32 noundef %28) #2 %30 = icmp eq i64 %29, 0 br i1 %30, label %31, label %49 31: ; preds = %27 %32 = load i32, ptr %18, align 8, !tbaa !13 %33 = tail call i64 @IEEE80211_IS_CHAN_QUARTER(i32 noundef %32) #2 %34 = icmp eq i64 %33, 0 br i1 %34, label %35, label %49 35: ; preds = %31 %36 = load i32, ptr %18, align 8, !tbaa !13 %37 = tail call i64 @IEEE80211_IS_CHAN_A(i32 noundef %36) #2 %38 = icmp eq i64 %37, 0 br i1 %38, label %39, label %49 39: ; preds = %35 %40 = load i32, ptr %18, align 8, !tbaa !13 %41 = tail call i64 @IEEE80211_IS_CHAN_108G(i32 noundef %40) #2 %42 = icmp eq i64 %41, 0 br i1 %42, label %43, label %49 43: ; preds = %39 %44 = load i32, ptr %0, align 8, !tbaa !11 %45 = load i32, ptr @IEEE80211_NODE_ERP, align 4, !tbaa !12 %46 = and i32 %45, %44 %47 = icmp eq i32 %46, 0 %48 = select i1 %47, ptr @IEEE80211_MODE_11B, ptr @IEEE80211_MODE_11G br label %49 49: ; preds = %43, %39, %35, %31, %27, %24, %20, %8 %50 = phi ptr [ %13, %8 ], [ %23, %20 ], [ @IEEE80211_MODE_STURBO_A, %24 ], [ @IEEE80211_MODE_HALF, %27 ], [ @IEEE80211_MODE_QUARTER, %31 ], [ @IEEE80211_MODE_11A, %35 ], [ @IEEE80211_MODE_11G, %39 ], [ %48, %43 ] %51 = load i32, ptr %50, align 4, !tbaa !12 %52 = load ptr, ptr %3, align 8, !tbaa !14 %53 = zext i32 %51 to i64 %54 = getelementptr inbounds i32, ptr %52, i64 %53 %55 = getelementptr inbounds %struct.ieee80211_node, ptr %0, i64 0, i32 1 store ptr %54, ptr %55, align 8, !tbaa !16 ret void } declare i64 @IEEE80211_IS_CHAN_5GHZ(i32 noundef) local_unnamed_addr #1 declare i64 @IEEE80211_IS_CHAN_ST(i32 noundef) local_unnamed_addr #1 declare i64 @IEEE80211_IS_CHAN_HALF(i32 noundef) local_unnamed_addr #1 declare i64 @IEEE80211_IS_CHAN_QUARTER(i32 noundef) local_unnamed_addr #1 declare i64 @IEEE80211_IS_CHAN_A(i32 noundef) local_unnamed_addr #1 declare i64 @IEEE80211_IS_CHAN_108G(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 24} !6 = !{!"ieee80211_node", !7, i64 0, !10, i64 8, !7, i64 16, !10, i64 24} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!6, !7, i64 0} !12 = !{!7, !7, i64 0} !13 = !{!6, !7, i64 16} !14 = !{!15, !10, i64 0} !15 = !{!"ieee80211vap", !10, i64 0} !16 = !{!6, !10, i64 8}
; ModuleID = 'AnghaBench/freebsd/sys/net80211/extr_ieee80211_node.c_ieee80211_node_setuptxparms.c' source_filename = "AnghaBench/freebsd/sys/net80211/extr_ieee80211_node.c_ieee80211_node_setuptxparms.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @IEEE80211_NODE_VHT = common local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_VHT_5GHZ = common local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_VHT_2GHZ = common local_unnamed_addr global i32 0, align 4 @IEEE80211_NODE_HT = common local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_11NA = common local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_11NG = common local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_STURBO_A = common local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_HALF = common local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_QUARTER = common local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_11A = common local_unnamed_addr global i32 0, align 4 @IEEE80211_NODE_ERP = common local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_11G = common local_unnamed_addr global i32 0, align 4 @IEEE80211_MODE_11B = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define void @ieee80211_node_setuptxparms(ptr nocapture noundef %0) local_unnamed_addr #0 { %2 = getelementptr inbounds i8, ptr %0, i64 24 %3 = load ptr, ptr %2, align 8, !tbaa !6 %4 = load i32, ptr %0, align 8, !tbaa !12 %5 = load i32, ptr @IEEE80211_NODE_VHT, align 4, !tbaa !13 %6 = and i32 %5, %4 %7 = icmp eq i32 %6, 0 br i1 %7, label %14, label %8 8: ; preds = %1 %9 = getelementptr inbounds i8, ptr %0, i64 16 %10 = load i32, ptr %9, align 8, !tbaa !14 %11 = tail call i64 @IEEE80211_IS_CHAN_5GHZ(i32 noundef %10) #2 %12 = icmp eq i64 %11, 0 %13 = select i1 %12, ptr @IEEE80211_MODE_VHT_2GHZ, ptr @IEEE80211_MODE_VHT_5GHZ br label %49 14: ; preds = %1 %15 = load i32, ptr @IEEE80211_NODE_HT, align 4, !tbaa !13 %16 = and i32 %15, %4 %17 = icmp eq i32 %16, 0 %18 = getelementptr inbounds i8, ptr %0, i64 16 %19 = load i32, ptr %18, align 8, !tbaa !14 br i1 %17, label %24, label %20 20: ; preds = %14 %21 = tail call i64 @IEEE80211_IS_CHAN_5GHZ(i32 noundef %19) #2 %22 = icmp eq i64 %21, 0 %23 = select i1 %22, ptr @IEEE80211_MODE_11NG, ptr @IEEE80211_MODE_11NA br label %49 24: ; preds = %14 %25 = tail call i64 @IEEE80211_IS_CHAN_ST(i32 noundef %19) #2 %26 = icmp eq i64 %25, 0 br i1 %26, label %27, label %49 27: ; preds = %24 %28 = load i32, ptr %18, align 8, !tbaa !14 %29 = tail call i64 @IEEE80211_IS_CHAN_HALF(i32 noundef %28) #2 %30 = icmp eq i64 %29, 0 br i1 %30, label %31, label %49 31: ; preds = %27 %32 = load i32, ptr %18, align 8, !tbaa !14 %33 = tail call i64 @IEEE80211_IS_CHAN_QUARTER(i32 noundef %32) #2 %34 = icmp eq i64 %33, 0 br i1 %34, label %35, label %49 35: ; preds = %31 %36 = load i32, ptr %18, align 8, !tbaa !14 %37 = tail call i64 @IEEE80211_IS_CHAN_A(i32 noundef %36) #2 %38 = icmp eq i64 %37, 0 br i1 %38, label %39, label %49 39: ; preds = %35 %40 = load i32, ptr %18, align 8, !tbaa !14 %41 = tail call i64 @IEEE80211_IS_CHAN_108G(i32 noundef %40) #2 %42 = icmp eq i64 %41, 0 br i1 %42, label %43, label %49 43: ; preds = %39 %44 = load i32, ptr %0, align 8, !tbaa !12 %45 = load i32, ptr @IEEE80211_NODE_ERP, align 4, !tbaa !13 %46 = and i32 %45, %44 %47 = icmp eq i32 %46, 0 %48 = select i1 %47, ptr @IEEE80211_MODE_11B, ptr @IEEE80211_MODE_11G br label %49 49: ; preds = %43, %39, %35, %31, %27, %24, %20, %8 %50 = phi ptr [ %13, %8 ], [ %23, %20 ], [ @IEEE80211_MODE_STURBO_A, %24 ], [ @IEEE80211_MODE_HALF, %27 ], [ @IEEE80211_MODE_QUARTER, %31 ], [ @IEEE80211_MODE_11A, %35 ], [ @IEEE80211_MODE_11G, %39 ], [ %48, %43 ] %51 = load i32, ptr %50, align 4, !tbaa !13 %52 = load ptr, ptr %3, align 8, !tbaa !15 %53 = zext i32 %51 to i64 %54 = getelementptr inbounds i32, ptr %52, i64 %53 %55 = getelementptr inbounds i8, ptr %0, i64 8 store ptr %54, ptr %55, align 8, !tbaa !17 ret void } declare i64 @IEEE80211_IS_CHAN_5GHZ(i32 noundef) local_unnamed_addr #1 declare i64 @IEEE80211_IS_CHAN_ST(i32 noundef) local_unnamed_addr #1 declare i64 @IEEE80211_IS_CHAN_HALF(i32 noundef) local_unnamed_addr #1 declare i64 @IEEE80211_IS_CHAN_QUARTER(i32 noundef) local_unnamed_addr #1 declare i64 @IEEE80211_IS_CHAN_A(i32 noundef) local_unnamed_addr #1 declare i64 @IEEE80211_IS_CHAN_108G(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 24} !7 = !{!"ieee80211_node", !8, i64 0, !11, i64 8, !8, i64 16, !11, i64 24} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!7, !8, i64 0} !13 = !{!8, !8, i64 0} !14 = !{!7, !8, i64 16} !15 = !{!16, !11, i64 0} !16 = !{!"ieee80211vap", !11, i64 0} !17 = !{!7, !11, i64 8}
freebsd_sys_net80211_extr_ieee80211_node.c_ieee80211_node_setuptxparms
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_libunwind-frame.c_libunwind_frame_sniffer.c' source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_libunwind-frame.c_libunwind_frame_sniffer.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.frame_unwind = type { i32 } @TARGET_BYTE_ORDER = dso_local local_unnamed_addr global i64 0, align 8 @BFD_ENDIAN_BIG = dso_local local_unnamed_addr global i64 0, align 8 @__BIG_ENDIAN = dso_local local_unnamed_addr global i32 0, align 4 @__LITTLE_ENDIAN = dso_local local_unnamed_addr global i32 0, align 4 @libunwind_frame_unwind = dso_local constant %struct.frame_unwind zeroinitializer, align 4 ; Function Attrs: nounwind uwtable define dso_local noundef ptr @libunwind_frame_sniffer(ptr noundef %0) local_unnamed_addr #0 { %2 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 %3 = tail call i32 @get_frame_arch(ptr noundef %0) #3 %4 = tail call ptr @libunwind_descr(i32 noundef %3) #3 %5 = load ptr, ptr %4, align 8, !tbaa !5 %6 = load i64, ptr @TARGET_BYTE_ORDER, align 8, !tbaa !10 %7 = load i64, ptr @BFD_ENDIAN_BIG, align 8, !tbaa !10 %8 = icmp eq i64 %6, %7 %9 = load i32, ptr @__BIG_ENDIAN, align 4 %10 = load i32, ptr @__LITTLE_ENDIAN, align 4 %11 = select i1 %8, i32 %9, i32 %10 %12 = tail call i32 @unw_create_addr_space_p(ptr noundef %5, i32 noundef %11) #3 %13 = call i32 @unw_init_remote_p(ptr noundef nonnull %2, i32 noundef %12, ptr noundef %0) #3 %14 = icmp sgt i32 %13, -1 br i1 %14, label %15, label %19 15: ; preds = %1 %16 = call i32 @unw_step_p(ptr noundef nonnull %2) #3 %17 = freeze i32 %16 %18 = icmp slt i32 %17, 0 br i1 %18, label %19, label %20 19: ; preds = %1, %15 br label %20 20: ; preds = %15, %19 %21 = phi ptr [ null, %19 ], [ @libunwind_frame_unwind, %15 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 ret ptr %21 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @libunwind_descr(i32 noundef) local_unnamed_addr #2 declare i32 @get_frame_arch(ptr noundef) local_unnamed_addr #2 declare i32 @unw_create_addr_space_p(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @unw_init_remote_p(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @unw_step_p(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"libunwind_descr", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"long", !8, i64 0}
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_libunwind-frame.c_libunwind_frame_sniffer.c' source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_libunwind-frame.c_libunwind_frame_sniffer.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.frame_unwind = type { i32 } @TARGET_BYTE_ORDER = common local_unnamed_addr global i64 0, align 8 @BFD_ENDIAN_BIG = common local_unnamed_addr global i64 0, align 8 @__BIG_ENDIAN = common local_unnamed_addr global i32 0, align 4 @__LITTLE_ENDIAN = common local_unnamed_addr global i32 0, align 4 @libunwind_frame_unwind = common global %struct.frame_unwind zeroinitializer, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define noundef ptr @libunwind_frame_sniffer(ptr noundef %0) local_unnamed_addr #0 { %2 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 %3 = tail call i32 @get_frame_arch(ptr noundef %0) #3 %4 = tail call ptr @libunwind_descr(i32 noundef %3) #3 %5 = load ptr, ptr %4, align 8, !tbaa !6 %6 = load i64, ptr @TARGET_BYTE_ORDER, align 8, !tbaa !11 %7 = load i64, ptr @BFD_ENDIAN_BIG, align 8, !tbaa !11 %8 = icmp eq i64 %6, %7 %9 = load i32, ptr @__BIG_ENDIAN, align 4 %10 = load i32, ptr @__LITTLE_ENDIAN, align 4 %11 = select i1 %8, i32 %9, i32 %10 %12 = tail call i32 @unw_create_addr_space_p(ptr noundef %5, i32 noundef %11) #3 %13 = call i32 @unw_init_remote_p(ptr noundef nonnull %2, i32 noundef %12, ptr noundef %0) #3 %14 = icmp sgt i32 %13, -1 br i1 %14, label %15, label %19 15: ; preds = %1 %16 = call i32 @unw_step_p(ptr noundef nonnull %2) #3 %17 = freeze i32 %16 %18 = icmp slt i32 %17, 0 br i1 %18, label %19, label %20 19: ; preds = %1, %15 br label %20 20: ; preds = %15, %19 %21 = phi ptr [ null, %19 ], [ @libunwind_frame_unwind, %15 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 ret ptr %21 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @libunwind_descr(i32 noundef) local_unnamed_addr #2 declare i32 @get_frame_arch(ptr noundef) local_unnamed_addr #2 declare i32 @unw_create_addr_space_p(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @unw_init_remote_p(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @unw_step_p(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"libunwind_descr", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !12, i64 0} !12 = !{!"long", !9, i64 0}
freebsd_contrib_gdb_gdb_extr_libunwind-frame.c_libunwind_frame_sniffer
; ModuleID = 'AnghaBench/freebsd/crypto/openssh/extr_auth2.c_do_authentication2.c' source_filename = "AnghaBench/freebsd/crypto/openssh/extr_auth2.c_do_authentication2.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @active_state = dso_local local_unnamed_addr global ptr null, align 8 @dispatch_protocol_error = dso_local global i32 0, align 4 @SSH2_MSG_SERVICE_REQUEST = dso_local local_unnamed_addr global i32 0, align 4 @input_service_request = dso_local global i32 0, align 4 @DISPATCH_BLOCK = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local void @do_authentication2(ptr noundef %0) local_unnamed_addr #0 { %2 = load ptr, ptr @active_state, align 8, !tbaa !5 store ptr %0, ptr %2, align 8, !tbaa !9 %3 = tail call i32 @ssh_dispatch_init(ptr noundef nonnull %2, ptr noundef nonnull @dispatch_protocol_error) #2 %4 = load i32, ptr @SSH2_MSG_SERVICE_REQUEST, align 4, !tbaa !11 %5 = tail call i32 @ssh_dispatch_set(ptr noundef nonnull %2, i32 noundef %4, ptr noundef nonnull @input_service_request) #2 %6 = load i32, ptr @DISPATCH_BLOCK, align 4, !tbaa !11 %7 = tail call i32 @ssh_dispatch_run_fatal(ptr noundef nonnull %2, i32 noundef %6, ptr noundef %0) #2 store ptr null, ptr %2, align 8, !tbaa !9 ret void } declare i32 @ssh_dispatch_init(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @ssh_dispatch_set(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @ssh_dispatch_run_fatal(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"ssh", !6, i64 0} !11 = !{!12, !12, i64 0} !12 = !{!"int", !7, i64 0}
; ModuleID = 'AnghaBench/freebsd/crypto/openssh/extr_auth2.c_do_authentication2.c' source_filename = "AnghaBench/freebsd/crypto/openssh/extr_auth2.c_do_authentication2.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @active_state = common local_unnamed_addr global ptr null, align 8 @dispatch_protocol_error = common global i32 0, align 4 @SSH2_MSG_SERVICE_REQUEST = common local_unnamed_addr global i32 0, align 4 @input_service_request = common global i32 0, align 4 @DISPATCH_BLOCK = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define void @do_authentication2(ptr noundef %0) local_unnamed_addr #0 { %2 = load ptr, ptr @active_state, align 8, !tbaa !6 store ptr %0, ptr %2, align 8, !tbaa !10 %3 = tail call i32 @ssh_dispatch_init(ptr noundef nonnull %2, ptr noundef nonnull @dispatch_protocol_error) #2 %4 = load i32, ptr @SSH2_MSG_SERVICE_REQUEST, align 4, !tbaa !12 %5 = tail call i32 @ssh_dispatch_set(ptr noundef nonnull %2, i32 noundef %4, ptr noundef nonnull @input_service_request) #2 %6 = load i32, ptr @DISPATCH_BLOCK, align 4, !tbaa !12 %7 = tail call i32 @ssh_dispatch_run_fatal(ptr noundef nonnull %2, i32 noundef %6, ptr noundef %0) #2 store ptr null, ptr %2, align 8, !tbaa !10 ret void } declare i32 @ssh_dispatch_init(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @ssh_dispatch_set(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @ssh_dispatch_run_fatal(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"ssh", !7, i64 0} !12 = !{!13, !13, i64 0} !13 = !{!"int", !8, i64 0}
freebsd_crypto_openssh_extr_auth2.c_do_authentication2
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/powerpc/platforms/iseries/extr_pci.c_iseries_ds_addr.c' source_filename = "AnghaBench/fastsocket/kernel/arch/powerpc/platforms/iseries/extr_pci.c_iseries_ds_addr.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [13 x i8] c"linux,subbus\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @iseries_ds_addr], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal i32 @iseries_ds_addr(ptr noundef %0) #0 { %2 = tail call ptr @PCI_DN(ptr noundef %0) #2 %3 = tail call ptr @of_get_property(ptr noundef %0, ptr noundef nonnull @.str, ptr noundef null) #2 ret i32 poison } declare ptr @PCI_DN(ptr noundef) local_unnamed_addr #1 declare ptr @of_get_property(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/powerpc/platforms/iseries/extr_pci.c_iseries_ds_addr.c' source_filename = "AnghaBench/fastsocket/kernel/arch/powerpc/platforms/iseries/extr_pci.c_iseries_ds_addr.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [13 x i8] c"linux,subbus\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @iseries_ds_addr], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal i32 @iseries_ds_addr(ptr noundef %0) #0 { %2 = tail call ptr @PCI_DN(ptr noundef %0) #2 %3 = tail call ptr @of_get_property(ptr noundef %0, ptr noundef nonnull @.str, ptr noundef null) #2 ret i32 poison } declare ptr @PCI_DN(ptr noundef) local_unnamed_addr #1 declare ptr @of_get_property(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
fastsocket_kernel_arch_powerpc_platforms_iseries_extr_pci.c_iseries_ds_addr
; ModuleID = 'AnghaBench/freebsd/lib/libusb/extr_libusb10_io.c_libusb_control_transfer_get_data.c' source_filename = "AnghaBench/freebsd/lib/libusb/extr_libusb10_io.c_libusb_control_transfer_get_data.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @LIBUSB_CONTROL_SETUP_SIZE = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable define dso_local ptr @libusb_control_transfer_get_data(ptr nocapture noundef readonly %0) local_unnamed_addr #0 { %2 = load ptr, ptr %0, align 8, !tbaa !5 %3 = icmp eq ptr %2, null %4 = load i32, ptr @LIBUSB_CONTROL_SETUP_SIZE, align 4 %5 = sext i32 %4 to i64 %6 = getelementptr inbounds i32, ptr %2, i64 %5 %7 = select i1 %3, ptr null, ptr %6 ret ptr %7 } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"libusb_transfer", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/freebsd/lib/libusb/extr_libusb10_io.c_libusb_control_transfer_get_data.c' source_filename = "AnghaBench/freebsd/lib/libusb/extr_libusb10_io.c_libusb_control_transfer_get_data.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @LIBUSB_CONTROL_SETUP_SIZE = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) define ptr @libusb_control_transfer_get_data(ptr nocapture noundef readonly %0) local_unnamed_addr #0 { %2 = load ptr, ptr %0, align 8, !tbaa !6 %3 = icmp eq ptr %2, null %4 = load i32, ptr @LIBUSB_CONTROL_SETUP_SIZE, align 4 %5 = sext i32 %4 to i64 %6 = getelementptr inbounds i32, ptr %2, i64 %5 %7 = select i1 %3, ptr null, ptr %6 ret ptr %7 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"libusb_transfer", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
freebsd_lib_libusb_extr_libusb10_io.c_libusb_control_transfer_get_data
; ModuleID = 'AnghaBench/linux/drivers/staging/rts5208/extr_rtsx_chip.c_rtsx_delink_stage.c' source_filename = "AnghaBench/linux/drivers/staging/rts5208/extr_rtsx_chip.c_rtsx_delink_stage.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.rtsx_chip = type { i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i64, i32, i32 } @.str = private unnamed_addr constant [24 x i8] c"Try to do force delink\0A\00", align 1 @CHANGE_LINK_STATE = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @rtsx_delink_stage], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @rtsx_delink_stage(ptr noundef %0) #0 { %2 = getelementptr inbounds %struct.rtsx_chip, ptr %0, i64 0, i32 12 %3 = load i32, ptr %2, align 4, !tbaa !5 %4 = icmp eq i32 %3, 0 br i1 %4, label %75, label %5 5: ; preds = %1 %6 = getelementptr inbounds %struct.rtsx_chip, ptr %0, i64 0, i32 11 %7 = load i32, ptr %6, align 8, !tbaa !11 %8 = icmp eq i32 %7, 0 br i1 %8, label %75, label %9 9: ; preds = %5 %10 = getelementptr inbounds %struct.rtsx_chip, ptr %0, i64 0, i32 10 %11 = load i64, ptr %10, align 8, !tbaa !12 %12 = icmp eq i64 %11, 0 br i1 %12, label %13, label %75 13: ; preds = %9 %14 = getelementptr inbounds %struct.rtsx_chip, ptr %0, i64 0, i32 9 %15 = load i64, ptr %14, align 8, !tbaa !13 %16 = icmp eq i64 %15, 0 br i1 %16, label %17, label %75 17: ; preds = %13 %18 = getelementptr inbounds %struct.rtsx_chip, ptr %0, i64 0, i32 8 %19 = load i64, ptr %18, align 8, !tbaa !14 %20 = icmp eq i64 %19, 0 br i1 %20, label %21, label %75 21: ; preds = %17 %22 = getelementptr inbounds %struct.rtsx_chip, ptr %0, i64 0, i32 7 %23 = load i64, ptr %22, align 8, !tbaa !15 %24 = icmp eq i64 %23, 0 br i1 %24, label %33, label %25 25: ; preds = %21 %26 = getelementptr inbounds %struct.rtsx_chip, ptr %0, i64 0, i32 6 %27 = load i64, ptr %26, align 8, !tbaa !16 %28 = icmp eq i64 %27, 0 br i1 %28, label %29, label %33 29: ; preds = %25 %30 = getelementptr inbounds %struct.rtsx_chip, ptr %0, i64 0, i32 5 %31 = load i64, ptr %30, align 8, !tbaa !17 %32 = icmp ne i64 %31, 0 br label %33 33: ; preds = %25, %29, %21 %34 = phi i1 [ false, %21 ], [ true, %25 ], [ %32, %29 ] %35 = zext i1 %34 to i32 %36 = getelementptr inbounds %struct.rtsx_chip, ptr %0, i64 0, i32 1 %37 = load i32, ptr %36, align 4, !tbaa !18 %38 = getelementptr inbounds %struct.rtsx_chip, ptr %0, i64 0, i32 2 %39 = load i32, ptr %38, align 8, !tbaa !19 %40 = add nsw i32 %39, %37 %41 = getelementptr inbounds %struct.rtsx_chip, ptr %0, i64 0, i32 3 %42 = load i32, ptr %41, align 4, !tbaa !20 %43 = add nsw i32 %40, %42 %44 = load i32, ptr %0, align 8, !tbaa !21 %45 = icmp sgt i32 %44, %43 br i1 %45, label %77, label %46 46: ; preds = %33 %47 = icmp eq i32 %44, %37 br i1 %47, label %48, label %51 48: ; preds = %46 %49 = tail call i32 @rtsx_delink_stage1(ptr noundef nonnull %0, i32 noundef %35, i32 noundef %43) #2 %50 = load i32, ptr %0, align 8, !tbaa !21 br label %51 51: ; preds = %48, %46 %52 = phi i32 [ %50, %48 ], [ %44, %46 ] %53 = icmp eq i32 %52, %40 br i1 %53, label %54, label %72 54: ; preds = %51 %55 = tail call i32 @rtsx_dev(ptr noundef nonnull %0) #2 %56 = tail call i32 @dev_dbg(i32 noundef %55, ptr noundef nonnull @.str) #2 br i1 %34, label %57, label %59 57: ; preds = %54 %58 = tail call i32 @rtsx_exit_L1(ptr noundef nonnull %0) #2 br label %59 59: ; preds = %57, %54 %60 = getelementptr inbounds %struct.rtsx_chip, ptr %0, i64 0, i32 4 %61 = load i64, ptr %60, align 8, !tbaa !22 %62 = icmp eq i64 %61, 0 br i1 %62, label %68, label %63 63: ; preds = %59 %64 = tail call i64 @CHECK_PID(ptr noundef nonnull %0, i32 noundef 21000) #2 %65 = icmp eq i64 %64, 0 br i1 %65, label %68, label %66 66: ; preds = %63 %67 = tail call i32 @rtsx_set_phy_reg_bit(ptr noundef nonnull %0, i32 noundef 28, i32 noundef 2) #2 br label %68 68: ; preds = %66, %63, %59 %69 = load i32, ptr @CHANGE_LINK_STATE, align 4, !tbaa !23 %70 = tail call i32 @rtsx_write_register(ptr noundef nonnull %0, i32 noundef %69, i32 noundef 10, i32 noundef 10) #2 %71 = load i32, ptr %0, align 8, !tbaa !21 br label %72 72: ; preds = %68, %51 %73 = phi i32 [ %71, %68 ], [ %52, %51 ] %74 = add nsw i32 %73, 1 br label %75 75: ; preds = %1, %5, %9, %13, %17, %72 %76 = phi i32 [ %74, %72 ], [ 0, %17 ], [ 0, %13 ], [ 0, %9 ], [ 0, %5 ], [ 0, %1 ] store i32 %76, ptr %0, align 8, !tbaa !21 br label %77 77: ; preds = %75, %33 ret void } declare i32 @rtsx_delink_stage1(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dev_dbg(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @rtsx_dev(ptr noundef) local_unnamed_addr #1 declare i32 @rtsx_exit_L1(ptr noundef) local_unnamed_addr #1 declare i64 @CHECK_PID(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @rtsx_set_phy_reg_bit(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @rtsx_write_register(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 76} !6 = !{!"rtsx_chip", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !7, i64 72, !7, i64 76} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"long", !8, i64 0} !11 = !{!6, !7, i64 72} !12 = !{!6, !10, i64 64} !13 = !{!6, !10, i64 56} !14 = !{!6, !10, i64 48} !15 = !{!6, !10, i64 40} !16 = !{!6, !10, i64 32} !17 = !{!6, !10, i64 24} !18 = !{!6, !7, i64 4} !19 = !{!6, !7, i64 8} !20 = !{!6, !7, i64 12} !21 = !{!6, !7, i64 0} !22 = !{!6, !10, i64 16} !23 = !{!7, !7, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/staging/rts5208/extr_rtsx_chip.c_rtsx_delink_stage.c' source_filename = "AnghaBench/linux/drivers/staging/rts5208/extr_rtsx_chip.c_rtsx_delink_stage.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [24 x i8] c"Try to do force delink\0A\00", align 1 @CHANGE_LINK_STATE = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @rtsx_delink_stage], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @rtsx_delink_stage(ptr noundef %0) #0 { %2 = getelementptr inbounds i8, ptr %0, i64 76 %3 = load i32, ptr %2, align 4, !tbaa !6 %4 = icmp eq i32 %3, 0 br i1 %4, label %75, label %5 5: ; preds = %1 %6 = getelementptr inbounds i8, ptr %0, i64 72 %7 = load i32, ptr %6, align 8, !tbaa !12 %8 = icmp eq i32 %7, 0 br i1 %8, label %75, label %9 9: ; preds = %5 %10 = getelementptr inbounds i8, ptr %0, i64 64 %11 = load i64, ptr %10, align 8, !tbaa !13 %12 = icmp eq i64 %11, 0 br i1 %12, label %13, label %75 13: ; preds = %9 %14 = getelementptr inbounds i8, ptr %0, i64 56 %15 = load i64, ptr %14, align 8, !tbaa !14 %16 = icmp eq i64 %15, 0 br i1 %16, label %17, label %75 17: ; preds = %13 %18 = getelementptr inbounds i8, ptr %0, i64 48 %19 = load i64, ptr %18, align 8, !tbaa !15 %20 = icmp eq i64 %19, 0 br i1 %20, label %21, label %75 21: ; preds = %17 %22 = getelementptr inbounds i8, ptr %0, i64 40 %23 = load i64, ptr %22, align 8, !tbaa !16 %24 = icmp eq i64 %23, 0 br i1 %24, label %33, label %25 25: ; preds = %21 %26 = getelementptr inbounds i8, ptr %0, i64 32 %27 = load i64, ptr %26, align 8, !tbaa !17 %28 = icmp eq i64 %27, 0 br i1 %28, label %29, label %33 29: ; preds = %25 %30 = getelementptr inbounds i8, ptr %0, i64 24 %31 = load i64, ptr %30, align 8, !tbaa !18 %32 = icmp ne i64 %31, 0 br label %33 33: ; preds = %25, %29, %21 %34 = phi i1 [ false, %21 ], [ true, %25 ], [ %32, %29 ] %35 = zext i1 %34 to i32 %36 = getelementptr inbounds i8, ptr %0, i64 4 %37 = load i32, ptr %36, align 4, !tbaa !19 %38 = getelementptr inbounds i8, ptr %0, i64 8 %39 = load i32, ptr %38, align 8, !tbaa !20 %40 = add nsw i32 %39, %37 %41 = getelementptr inbounds i8, ptr %0, i64 12 %42 = load i32, ptr %41, align 4, !tbaa !21 %43 = add nsw i32 %40, %42 %44 = load i32, ptr %0, align 8, !tbaa !22 %45 = icmp sgt i32 %44, %43 br i1 %45, label %77, label %46 46: ; preds = %33 %47 = icmp eq i32 %44, %37 br i1 %47, label %48, label %51 48: ; preds = %46 %49 = tail call i32 @rtsx_delink_stage1(ptr noundef nonnull %0, i32 noundef %35, i32 noundef %43) #2 %50 = load i32, ptr %0, align 8, !tbaa !22 br label %51 51: ; preds = %48, %46 %52 = phi i32 [ %50, %48 ], [ %44, %46 ] %53 = icmp eq i32 %52, %40 br i1 %53, label %54, label %72 54: ; preds = %51 %55 = tail call i32 @rtsx_dev(ptr noundef nonnull %0) #2 %56 = tail call i32 @dev_dbg(i32 noundef %55, ptr noundef nonnull @.str) #2 br i1 %34, label %57, label %59 57: ; preds = %54 %58 = tail call i32 @rtsx_exit_L1(ptr noundef nonnull %0) #2 br label %59 59: ; preds = %57, %54 %60 = getelementptr inbounds i8, ptr %0, i64 16 %61 = load i64, ptr %60, align 8, !tbaa !23 %62 = icmp eq i64 %61, 0 br i1 %62, label %68, label %63 63: ; preds = %59 %64 = tail call i64 @CHECK_PID(ptr noundef nonnull %0, i32 noundef 21000) #2 %65 = icmp eq i64 %64, 0 br i1 %65, label %68, label %66 66: ; preds = %63 %67 = tail call i32 @rtsx_set_phy_reg_bit(ptr noundef nonnull %0, i32 noundef 28, i32 noundef 2) #2 br label %68 68: ; preds = %66, %63, %59 %69 = load i32, ptr @CHANGE_LINK_STATE, align 4, !tbaa !24 %70 = tail call i32 @rtsx_write_register(ptr noundef nonnull %0, i32 noundef %69, i32 noundef 10, i32 noundef 10) #2 %71 = load i32, ptr %0, align 8, !tbaa !22 br label %72 72: ; preds = %68, %51 %73 = phi i32 [ %71, %68 ], [ %52, %51 ] %74 = add nsw i32 %73, 1 br label %75 75: ; preds = %1, %5, %9, %13, %17, %72 %76 = phi i32 [ %74, %72 ], [ 0, %17 ], [ 0, %13 ], [ 0, %9 ], [ 0, %5 ], [ 0, %1 ] store i32 %76, ptr %0, align 8, !tbaa !22 br label %77 77: ; preds = %75, %33 ret void } declare i32 @rtsx_delink_stage1(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dev_dbg(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @rtsx_dev(ptr noundef) local_unnamed_addr #1 declare i32 @rtsx_exit_L1(ptr noundef) local_unnamed_addr #1 declare i64 @CHECK_PID(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @rtsx_set_phy_reg_bit(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @rtsx_write_register(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 76} !7 = !{!"rtsx_chip", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !8, i64 72, !8, i64 76} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"long", !9, i64 0} !12 = !{!7, !8, i64 72} !13 = !{!7, !11, i64 64} !14 = !{!7, !11, i64 56} !15 = !{!7, !11, i64 48} !16 = !{!7, !11, i64 40} !17 = !{!7, !11, i64 32} !18 = !{!7, !11, i64 24} !19 = !{!7, !8, i64 4} !20 = !{!7, !8, i64 8} !21 = !{!7, !8, i64 12} !22 = !{!7, !8, i64 0} !23 = !{!7, !11, i64 16} !24 = !{!8, !8, i64 0}
linux_drivers_staging_rts5208_extr_rtsx_chip.c_rtsx_delink_stage
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/cpufreq/extr_cpufreq.c_cpufreq_debug_disable_ratelimit.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/cpufreq/extr_cpufreq.c_cpufreq_debug_disable_ratelimit.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @cpufreq_debug_disable_ratelimit], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define internal void @cpufreq_debug_disable_ratelimit() #0 { ret void } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/cpufreq/extr_cpufreq.c_cpufreq_debug_disable_ratelimit.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/cpufreq/extr_cpufreq.c_cpufreq_debug_disable_ratelimit.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @cpufreq_debug_disable_ratelimit], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define internal void @cpufreq_debug_disable_ratelimit() #0 { ret void } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
fastsocket_kernel_drivers_cpufreq_extr_cpufreq.c_cpufreq_debug_disable_ratelimit
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/extr_adrenoa2xx.xml.h_A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/extr_adrenoa2xx.xml.h_A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX__SHIFT = dso_local local_unnamed_addr global i32 0, align 4 @A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX__MASK = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable define internal i32 @A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX(i32 noundef %0) #0 { %2 = load i32, ptr @A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX__SHIFT, align 4, !tbaa !5 %3 = shl i32 %0, %2 %4 = load i32, ptr @A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX__MASK, align 4, !tbaa !5 %5 = and i32 %3, %4 ret i32 %5 } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/extr_adrenoa2xx.xml.h_A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/extr_adrenoa2xx.xml.h_A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX__SHIFT = common local_unnamed_addr global i32 0, align 4 @A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX__MASK = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) define internal i32 @A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX(i32 noundef %0) #0 { %2 = load i32, ptr @A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX__SHIFT, align 4, !tbaa !6 %3 = shl i32 %0, %2 %4 = load i32, ptr @A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX__MASK, align 4, !tbaa !6 %5 = and i32 %3, %4 ret i32 %5 } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_drivers_gpu_drm_msm_extr_adrenoa2xx.xml.h_A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX
; ModuleID = 'AnghaBench/freebsd/contrib/libedit/extr_terminal.c_terminal_init_arrow.c' source_filename = "AnghaBench/freebsd/contrib/libedit/extr_terminal.c_terminal_init_arrow.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_8__ = type { ptr, ptr, %struct.TYPE_7__, i32 } %struct.TYPE_7__ = type { i32 } @.str = private unnamed_addr constant [5 x i32] [i32 100, i32 111, i32 119, i32 110, i32 0], align 4 @A_K_DN = dso_local local_unnamed_addr global i64 0, align 8 @T_kd = dso_local local_unnamed_addr global i32 0, align 4 @ED_NEXT_HISTORY = dso_local local_unnamed_addr global i32 0, align 4 @XK_CMD = dso_local local_unnamed_addr global ptr null, align 8 @.str.1 = private unnamed_addr constant [3 x i32] [i32 117, i32 112, i32 0], align 4 @A_K_UP = dso_local local_unnamed_addr global i64 0, align 8 @T_ku = dso_local local_unnamed_addr global i32 0, align 4 @ED_PREV_HISTORY = dso_local local_unnamed_addr global i32 0, align 4 @.str.2 = private unnamed_addr constant [5 x i32] [i32 108, i32 101, i32 102, i32 116, i32 0], align 4 @A_K_LT = dso_local local_unnamed_addr global i64 0, align 8 @T_kl = dso_local local_unnamed_addr global i32 0, align 4 @ED_PREV_CHAR = dso_local local_unnamed_addr global i32 0, align 4 @.str.3 = private unnamed_addr constant [6 x i32] [i32 114, i32 105, i32 103, i32 104, i32 116, i32 0], align 4 @A_K_RT = dso_local local_unnamed_addr global i64 0, align 8 @T_kr = dso_local local_unnamed_addr global i32 0, align 4 @ED_NEXT_CHAR = dso_local local_unnamed_addr global i32 0, align 4 @.str.4 = private unnamed_addr constant [5 x i32] [i32 104, i32 111, i32 109, i32 101, i32 0], align 4 @A_K_HO = dso_local local_unnamed_addr global i64 0, align 8 @T_kh = dso_local local_unnamed_addr global i32 0, align 4 @ED_MOVE_TO_BEG = dso_local local_unnamed_addr global i32 0, align 4 @.str.5 = private unnamed_addr constant [4 x i32] [i32 101, i32 110, i32 100, i32 0], align 4 @A_K_EN = dso_local local_unnamed_addr global i64 0, align 8 @T_at7 = dso_local local_unnamed_addr global i32 0, align 4 @ED_MOVE_TO_END = dso_local local_unnamed_addr global i32 0, align 4 @.str.6 = private unnamed_addr constant [7 x i32] [i32 100, i32 101, i32 108, i32 101, i32 116, i32 101, i32 0], align 4 @A_K_DE = dso_local local_unnamed_addr global i64 0, align 8 @T_kD = dso_local local_unnamed_addr global i32 0, align 4 @ED_DELETE_NEXT_CHAR = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @terminal_init_arrow], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable define internal void @terminal_init_arrow(ptr nocapture noundef readonly %0) #0 { %2 = load ptr, ptr %0, align 8, !tbaa !5 %3 = load i64, ptr @A_K_DN, align 8, !tbaa !11 %4 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %3 store ptr @.str, ptr %4, align 8, !tbaa !13 %5 = load i32, ptr @T_kd, align 4, !tbaa !17 %6 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %3, i32 3 store i32 %5, ptr %6, align 4, !tbaa !18 %7 = load i32, ptr @ED_NEXT_HISTORY, align 4, !tbaa !17 %8 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %3, i32 2 store i32 %7, ptr %8, align 8, !tbaa !19 %9 = load ptr, ptr @XK_CMD, align 8, !tbaa !20 %10 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %3, i32 1 store ptr %9, ptr %10, align 8, !tbaa !21 %11 = load i64, ptr @A_K_UP, align 8, !tbaa !11 %12 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %11 store ptr @.str.1, ptr %12, align 8, !tbaa !13 %13 = load i32, ptr @T_ku, align 4, !tbaa !17 %14 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %11, i32 3 store i32 %13, ptr %14, align 4, !tbaa !18 %15 = load i32, ptr @ED_PREV_HISTORY, align 4, !tbaa !17 %16 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %11, i32 2 store i32 %15, ptr %16, align 8, !tbaa !19 %17 = load ptr, ptr @XK_CMD, align 8, !tbaa !20 %18 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %11, i32 1 store ptr %17, ptr %18, align 8, !tbaa !21 %19 = load i64, ptr @A_K_LT, align 8, !tbaa !11 %20 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %19 store ptr @.str.2, ptr %20, align 8, !tbaa !13 %21 = load i32, ptr @T_kl, align 4, !tbaa !17 %22 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %19, i32 3 store i32 %21, ptr %22, align 4, !tbaa !18 %23 = load i32, ptr @ED_PREV_CHAR, align 4, !tbaa !17 %24 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %19, i32 2 store i32 %23, ptr %24, align 8, !tbaa !19 %25 = load ptr, ptr @XK_CMD, align 8, !tbaa !20 %26 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %19, i32 1 store ptr %25, ptr %26, align 8, !tbaa !21 %27 = load i64, ptr @A_K_RT, align 8, !tbaa !11 %28 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %27 store ptr @.str.3, ptr %28, align 8, !tbaa !13 %29 = load i32, ptr @T_kr, align 4, !tbaa !17 %30 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %27, i32 3 store i32 %29, ptr %30, align 4, !tbaa !18 %31 = load i32, ptr @ED_NEXT_CHAR, align 4, !tbaa !17 %32 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %27, i32 2 store i32 %31, ptr %32, align 8, !tbaa !19 %33 = load ptr, ptr @XK_CMD, align 8, !tbaa !20 %34 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %27, i32 1 store ptr %33, ptr %34, align 8, !tbaa !21 %35 = load i64, ptr @A_K_HO, align 8, !tbaa !11 %36 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %35 store ptr @.str.4, ptr %36, align 8, !tbaa !13 %37 = load i32, ptr @T_kh, align 4, !tbaa !17 %38 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %35, i32 3 store i32 %37, ptr %38, align 4, !tbaa !18 %39 = load i32, ptr @ED_MOVE_TO_BEG, align 4, !tbaa !17 %40 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %35, i32 2 store i32 %39, ptr %40, align 8, !tbaa !19 %41 = load ptr, ptr @XK_CMD, align 8, !tbaa !20 %42 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %35, i32 1 store ptr %41, ptr %42, align 8, !tbaa !21 %43 = load i64, ptr @A_K_EN, align 8, !tbaa !11 %44 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %43 store ptr @.str.5, ptr %44, align 8, !tbaa !13 %45 = load i32, ptr @T_at7, align 4, !tbaa !17 %46 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %43, i32 3 store i32 %45, ptr %46, align 4, !tbaa !18 %47 = load i32, ptr @ED_MOVE_TO_END, align 4, !tbaa !17 %48 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %43, i32 2 store i32 %47, ptr %48, align 8, !tbaa !19 %49 = load ptr, ptr @XK_CMD, align 8, !tbaa !20 %50 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %43, i32 1 store ptr %49, ptr %50, align 8, !tbaa !21 %51 = load i64, ptr @A_K_DE, align 8, !tbaa !11 %52 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %51 store ptr @.str.6, ptr %52, align 8, !tbaa !13 %53 = load i32, ptr @T_kD, align 4, !tbaa !17 %54 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %51, i32 3 store i32 %53, ptr %54, align 4, !tbaa !18 %55 = load i32, ptr @ED_DELETE_NEXT_CHAR, align 4, !tbaa !17 %56 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %51, i32 2 store i32 %55, ptr %56, align 8, !tbaa !19 %57 = load ptr, ptr @XK_CMD, align 8, !tbaa !20 %58 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %51, i32 1 store ptr %57, ptr %58, align 8, !tbaa !21 ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !8, i64 0} !6 = !{!"TYPE_9__", !7, i64 0} !7 = !{!"TYPE_6__", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !12, i64 0} !12 = !{!"long", !9, i64 0} !13 = !{!14, !8, i64 0} !14 = !{!"TYPE_8__", !8, i64 0, !8, i64 8, !15, i64 16, !16, i64 20} !15 = !{!"TYPE_7__", !16, i64 0} !16 = !{!"int", !9, i64 0} !17 = !{!16, !16, i64 0} !18 = !{!14, !16, i64 20} !19 = !{!14, !16, i64 16} !20 = !{!8, !8, i64 0} !21 = !{!14, !8, i64 8}
; ModuleID = 'AnghaBench/freebsd/contrib/libedit/extr_terminal.c_terminal_init_arrow.c' source_filename = "AnghaBench/freebsd/contrib/libedit/extr_terminal.c_terminal_init_arrow.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_8__ = type { ptr, ptr, %struct.TYPE_7__, i32 } %struct.TYPE_7__ = type { i32 } @.str = private unnamed_addr constant [5 x i32] [i32 100, i32 111, i32 119, i32 110, i32 0], align 4 @A_K_DN = common local_unnamed_addr global i64 0, align 8 @T_kd = common local_unnamed_addr global i32 0, align 4 @ED_NEXT_HISTORY = common local_unnamed_addr global i32 0, align 4 @XK_CMD = common local_unnamed_addr global ptr null, align 8 @.str.1 = private unnamed_addr constant [3 x i32] [i32 117, i32 112, i32 0], align 4 @A_K_UP = common local_unnamed_addr global i64 0, align 8 @T_ku = common local_unnamed_addr global i32 0, align 4 @ED_PREV_HISTORY = common local_unnamed_addr global i32 0, align 4 @.str.2 = private unnamed_addr constant [5 x i32] [i32 108, i32 101, i32 102, i32 116, i32 0], align 4 @A_K_LT = common local_unnamed_addr global i64 0, align 8 @T_kl = common local_unnamed_addr global i32 0, align 4 @ED_PREV_CHAR = common local_unnamed_addr global i32 0, align 4 @.str.3 = private unnamed_addr constant [6 x i32] [i32 114, i32 105, i32 103, i32 104, i32 116, i32 0], align 4 @A_K_RT = common local_unnamed_addr global i64 0, align 8 @T_kr = common local_unnamed_addr global i32 0, align 4 @ED_NEXT_CHAR = common local_unnamed_addr global i32 0, align 4 @.str.4 = private unnamed_addr constant [5 x i32] [i32 104, i32 111, i32 109, i32 101, i32 0], align 4 @A_K_HO = common local_unnamed_addr global i64 0, align 8 @T_kh = common local_unnamed_addr global i32 0, align 4 @ED_MOVE_TO_BEG = common local_unnamed_addr global i32 0, align 4 @.str.5 = private unnamed_addr constant [4 x i32] [i32 101, i32 110, i32 100, i32 0], align 4 @A_K_EN = common local_unnamed_addr global i64 0, align 8 @T_at7 = common local_unnamed_addr global i32 0, align 4 @ED_MOVE_TO_END = common local_unnamed_addr global i32 0, align 4 @.str.6 = private unnamed_addr constant [7 x i32] [i32 100, i32 101, i32 108, i32 101, i32 116, i32 101, i32 0], align 4 @A_K_DE = common local_unnamed_addr global i64 0, align 8 @T_kD = common local_unnamed_addr global i32 0, align 4 @ED_DELETE_NEXT_CHAR = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @terminal_init_arrow], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync) define internal void @terminal_init_arrow(ptr nocapture noundef readonly %0) #0 { %2 = load ptr, ptr %0, align 8, !tbaa !6 %3 = load i64, ptr @A_K_DN, align 8, !tbaa !12 %4 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %3 store ptr @.str, ptr %4, align 8, !tbaa !14 %5 = load i32, ptr @T_kd, align 4, !tbaa !18 %6 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %3, i32 3 store i32 %5, ptr %6, align 4, !tbaa !19 %7 = load i32, ptr @ED_NEXT_HISTORY, align 4, !tbaa !18 %8 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %3, i32 2 store i32 %7, ptr %8, align 8, !tbaa !20 %9 = load ptr, ptr @XK_CMD, align 8, !tbaa !21 %10 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %3, i32 1 store ptr %9, ptr %10, align 8, !tbaa !22 %11 = load i64, ptr @A_K_UP, align 8, !tbaa !12 %12 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %11 store ptr @.str.1, ptr %12, align 8, !tbaa !14 %13 = load i32, ptr @T_ku, align 4, !tbaa !18 %14 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %11, i32 3 store i32 %13, ptr %14, align 4, !tbaa !19 %15 = load i32, ptr @ED_PREV_HISTORY, align 4, !tbaa !18 %16 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %11, i32 2 store i32 %15, ptr %16, align 8, !tbaa !20 %17 = load ptr, ptr @XK_CMD, align 8, !tbaa !21 %18 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %11, i32 1 store ptr %17, ptr %18, align 8, !tbaa !22 %19 = load i64, ptr @A_K_LT, align 8, !tbaa !12 %20 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %19 store ptr @.str.2, ptr %20, align 8, !tbaa !14 %21 = load i32, ptr @T_kl, align 4, !tbaa !18 %22 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %19, i32 3 store i32 %21, ptr %22, align 4, !tbaa !19 %23 = load i32, ptr @ED_PREV_CHAR, align 4, !tbaa !18 %24 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %19, i32 2 store i32 %23, ptr %24, align 8, !tbaa !20 %25 = load ptr, ptr @XK_CMD, align 8, !tbaa !21 %26 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %19, i32 1 store ptr %25, ptr %26, align 8, !tbaa !22 %27 = load i64, ptr @A_K_RT, align 8, !tbaa !12 %28 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %27 store ptr @.str.3, ptr %28, align 8, !tbaa !14 %29 = load i32, ptr @T_kr, align 4, !tbaa !18 %30 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %27, i32 3 store i32 %29, ptr %30, align 4, !tbaa !19 %31 = load i32, ptr @ED_NEXT_CHAR, align 4, !tbaa !18 %32 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %27, i32 2 store i32 %31, ptr %32, align 8, !tbaa !20 %33 = load ptr, ptr @XK_CMD, align 8, !tbaa !21 %34 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %27, i32 1 store ptr %33, ptr %34, align 8, !tbaa !22 %35 = load i64, ptr @A_K_HO, align 8, !tbaa !12 %36 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %35 store ptr @.str.4, ptr %36, align 8, !tbaa !14 %37 = load i32, ptr @T_kh, align 4, !tbaa !18 %38 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %35, i32 3 store i32 %37, ptr %38, align 4, !tbaa !19 %39 = load i32, ptr @ED_MOVE_TO_BEG, align 4, !tbaa !18 %40 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %35, i32 2 store i32 %39, ptr %40, align 8, !tbaa !20 %41 = load ptr, ptr @XK_CMD, align 8, !tbaa !21 %42 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %35, i32 1 store ptr %41, ptr %42, align 8, !tbaa !22 %43 = load i64, ptr @A_K_EN, align 8, !tbaa !12 %44 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %43 store ptr @.str.5, ptr %44, align 8, !tbaa !14 %45 = load i32, ptr @T_at7, align 4, !tbaa !18 %46 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %43, i32 3 store i32 %45, ptr %46, align 4, !tbaa !19 %47 = load i32, ptr @ED_MOVE_TO_END, align 4, !tbaa !18 %48 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %43, i32 2 store i32 %47, ptr %48, align 8, !tbaa !20 %49 = load ptr, ptr @XK_CMD, align 8, !tbaa !21 %50 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %43, i32 1 store ptr %49, ptr %50, align 8, !tbaa !22 %51 = load i64, ptr @A_K_DE, align 8, !tbaa !12 %52 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %51 store ptr @.str.6, ptr %52, align 8, !tbaa !14 %53 = load i32, ptr @T_kD, align 4, !tbaa !18 %54 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %51, i32 3 store i32 %53, ptr %54, align 4, !tbaa !19 %55 = load i32, ptr @ED_DELETE_NEXT_CHAR, align 4, !tbaa !18 %56 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %51, i32 2 store i32 %55, ptr %56, align 8, !tbaa !20 %57 = load ptr, ptr @XK_CMD, align 8, !tbaa !21 %58 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 %51, i32 1 store ptr %57, ptr %58, align 8, !tbaa !22 ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !9, i64 0} !7 = !{!"TYPE_9__", !8, i64 0} !8 = !{!"TYPE_6__", !9, i64 0} !9 = !{!"any pointer", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"} !12 = !{!13, !13, i64 0} !13 = !{!"long", !10, i64 0} !14 = !{!15, !9, i64 0} !15 = !{!"TYPE_8__", !9, i64 0, !9, i64 8, !16, i64 16, !17, i64 20} !16 = !{!"TYPE_7__", !17, i64 0} !17 = !{!"int", !10, i64 0} !18 = !{!17, !17, i64 0} !19 = !{!15, !17, i64 20} !20 = !{!15, !17, i64 16} !21 = !{!9, !9, i64 0} !22 = !{!15, !9, i64 8}
freebsd_contrib_libedit_extr_terminal.c_terminal_init_arrow
; ModuleID = 'AnghaBench/freebsd/usr.bin/dc/extr_stack.c_array_grow.c' source_filename = "AnghaBench/freebsd/usr.bin/dc/extr_stack.c_array_grow.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.array = type { i64, ptr } %struct.TYPE_3__ = type { ptr, i32 } @BCODE_NONE = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @array_grow], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal void @array_grow(ptr nocapture noundef %0, i64 noundef %1) #0 { %3 = getelementptr inbounds %struct.array, ptr %0, i64 0, i32 1 %4 = load ptr, ptr %3, align 8, !tbaa !5 %5 = tail call ptr @breallocarray(ptr noundef %4, i64 noundef %1, i32 noundef 16) #2 store ptr %5, ptr %3, align 8, !tbaa !5 %6 = load i64, ptr %0, align 8, !tbaa !11 %7 = icmp ult i64 %6, %1 br i1 %7, label %8, label %30 8: ; preds = %2 %9 = load i32, ptr @BCODE_NONE, align 4, !tbaa !12 %10 = sub i64 %1, %6 %11 = and i64 %10, 1 %12 = icmp eq i64 %11, 0 br i1 %12, label %17, label %13 13: ; preds = %8 %14 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 %6, i32 1 store i32 %9, ptr %14, align 8, !tbaa !14 %15 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 %6 store ptr null, ptr %15, align 8, !tbaa !16 %16 = add nuw i64 %6, 1 br label %17 17: ; preds = %13, %8 %18 = phi i64 [ %6, %8 ], [ %16, %13 ] %19 = add i64 %1, -1 %20 = icmp eq i64 %6, %19 br i1 %20, label %30, label %21 21: ; preds = %17, %21 %22 = phi i64 [ %28, %21 ], [ %18, %17 ] %23 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 %22, i32 1 store i32 %9, ptr %23, align 8, !tbaa !14 %24 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 %22 store ptr null, ptr %24, align 8, !tbaa !16 %25 = add nuw i64 %22, 1 %26 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 %25, i32 1 store i32 %9, ptr %26, align 8, !tbaa !14 %27 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 %25 store ptr null, ptr %27, align 8, !tbaa !16 %28 = add nuw i64 %22, 2 %29 = icmp eq i64 %28, %1 br i1 %29, label %30, label %21, !llvm.loop !17 30: ; preds = %17, %21, %2 store i64 %1, ptr %0, align 8, !tbaa !11 ret void } declare ptr @breallocarray(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 8} !6 = !{!"array", !7, i64 0, !10, i64 8} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!6, !7, i64 0} !12 = !{!13, !13, i64 0} !13 = !{!"int", !8, i64 0} !14 = !{!15, !13, i64 8} !15 = !{!"TYPE_3__", !10, i64 0, !13, i64 8} !16 = !{!15, !10, i64 0} !17 = distinct !{!17, !18} !18 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/freebsd/usr.bin/dc/extr_stack.c_array_grow.c' source_filename = "AnghaBench/freebsd/usr.bin/dc/extr_stack.c_array_grow.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_3__ = type { ptr, i32 } @BCODE_NONE = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @array_grow], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal void @array_grow(ptr nocapture noundef %0, i64 noundef %1) #0 { %3 = getelementptr inbounds i8, ptr %0, i64 8 %4 = load ptr, ptr %3, align 8, !tbaa !6 %5 = tail call ptr @breallocarray(ptr noundef %4, i64 noundef %1, i32 noundef 16) #2 store ptr %5, ptr %3, align 8, !tbaa !6 %6 = load i64, ptr %0, align 8, !tbaa !12 %7 = icmp ult i64 %6, %1 br i1 %7, label %8, label %41 8: ; preds = %2 %9 = load i32, ptr @BCODE_NONE, align 4, !tbaa !13 %10 = sub i64 %1, %6 %11 = icmp ult i64 %10, 4 br i1 %11, label %33, label %12 12: ; preds = %8 %13 = and i64 %10, -4 %14 = add i64 %6, %13 br label %15 15: ; preds = %15, %12 %16 = phi i64 [ 0, %12 ], [ %29, %15 ] %17 = add i64 %6, %16 %18 = add i64 %17, 1 %19 = add i64 %17, 2 %20 = add i64 %17, 3 %21 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 %17, i32 1 %22 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 %18, i32 1 %23 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 %19, i32 1 %24 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 %20, i32 1 store i32 %9, ptr %21, align 8, !tbaa !15 store i32 %9, ptr %22, align 8, !tbaa !15 store i32 %9, ptr %23, align 8, !tbaa !15 store i32 %9, ptr %24, align 8, !tbaa !15 %25 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 %17 %26 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 %18 %27 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 %19 %28 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 %20 store ptr null, ptr %25, align 8, !tbaa !17 store ptr null, ptr %26, align 8, !tbaa !17 store ptr null, ptr %27, align 8, !tbaa !17 store ptr null, ptr %28, align 8, !tbaa !17 %29 = add nuw i64 %16, 4 %30 = icmp eq i64 %29, %13 br i1 %30, label %31, label %15, !llvm.loop !18 31: ; preds = %15 %32 = icmp eq i64 %10, %13 br i1 %32, label %41, label %33 33: ; preds = %31, %8 %34 = phi i64 [ %6, %8 ], [ %14, %31 ] br label %35 35: ; preds = %33, %35 %36 = phi i64 [ %39, %35 ], [ %34, %33 ] %37 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 %36, i32 1 store i32 %9, ptr %37, align 8, !tbaa !15 %38 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 %36 store ptr null, ptr %38, align 8, !tbaa !17 %39 = add nuw i64 %36, 1 %40 = icmp eq i64 %39, %1 br i1 %40, label %41, label %35, !llvm.loop !22 41: ; preds = %35, %31, %2 store i64 %1, ptr %0, align 8, !tbaa !12 ret void } declare ptr @breallocarray(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 8} !7 = !{!"array", !8, i64 0, !11, i64 8} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!7, !8, i64 0} !13 = !{!14, !14, i64 0} !14 = !{!"int", !9, i64 0} !15 = !{!16, !14, i64 8} !16 = !{!"TYPE_3__", !11, i64 0, !14, i64 8} !17 = !{!16, !11, i64 0} !18 = distinct !{!18, !19, !20, !21} !19 = !{!"llvm.loop.mustprogress"} !20 = !{!"llvm.loop.isvectorized", i32 1} !21 = !{!"llvm.loop.unroll.runtime.disable"} !22 = distinct !{!22, !19, !20}
freebsd_usr.bin_dc_extr_stack.c_array_grow
; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/host_applications/linux/libs/debug_sym/extr_debug_sym.c_LookupVideoCoreUInt32Symbol.c' source_filename = "AnghaBench/RetroArch/gfx/include/userland/host_applications/linux/libs/debug_sym/extr_debug_sym.c_LookupVideoCoreUInt32Symbol.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [46 x i8] c"Symbol: '%s' has a size of %zu, expecting %zu\00", align 1 ; Function Attrs: nounwind uwtable define dso_local noundef i32 @LookupVideoCoreUInt32Symbol(i32 noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 { %4 = alloca i64, align 8 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3 %5 = call i32 @LookupVideoCoreSymbol(i32 noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef nonnull %4) #3 %6 = icmp eq i32 %5, 0 br i1 %6, label %12, label %7 7: ; preds = %3 %8 = load i64, ptr %4, align 8, !tbaa !5 %9 = icmp eq i64 %8, 4 br i1 %9, label %12, label %10 10: ; preds = %7 %11 = call i32 @ERR(ptr noundef nonnull @.str, ptr noundef %1, i64 noundef %8, i32 noundef 4) #3 br label %12 12: ; preds = %7, %3, %10 %13 = phi i32 [ 0, %10 ], [ 0, %3 ], [ 1, %7 ] call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3 ret i32 %13 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @LookupVideoCoreSymbol(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @ERR(ptr noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/host_applications/linux/libs/debug_sym/extr_debug_sym.c_LookupVideoCoreUInt32Symbol.c' source_filename = "AnghaBench/RetroArch/gfx/include/userland/host_applications/linux/libs/debug_sym/extr_debug_sym.c_LookupVideoCoreUInt32Symbol.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [46 x i8] c"Symbol: '%s' has a size of %zu, expecting %zu\00", align 1 ; Function Attrs: nounwind ssp uwtable(sync) define range(i32 0, 2) i32 @LookupVideoCoreUInt32Symbol(i32 noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 { %4 = alloca i64, align 8 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3 %5 = call i32 @LookupVideoCoreSymbol(i32 noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef nonnull %4) #3 %6 = icmp eq i32 %5, 0 br i1 %6, label %12, label %7 7: ; preds = %3 %8 = load i64, ptr %4, align 8, !tbaa !6 %9 = icmp eq i64 %8, 4 br i1 %9, label %12, label %10 10: ; preds = %7 %11 = call i32 @ERR(ptr noundef nonnull @.str, ptr noundef %1, i64 noundef %8, i32 noundef 4) #3 br label %12 12: ; preds = %7, %3, %10 %13 = phi i32 [ 0, %10 ], [ 0, %3 ], [ 1, %7 ] call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3 ret i32 %13 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @LookupVideoCoreSymbol(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @ERR(ptr noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
RetroArch_gfx_include_userland_host_applications_linux_libs_debug_sym_extr_debug_sym.c_LookupVideoCoreUInt32Symbol
; ModuleID = 'AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_spa_checkpoint.c_spa_checkpoint_discard_complete_sync.c' source_filename = "AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_spa_checkpoint.c_spa_checkpoint_discard_complete_sync.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @SPA_FEATURE_POOL_CHECKPOINT = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [23 x i8] c"spa discard checkpoint\00", align 1 @.str.1 = private unnamed_addr constant [53 x i8] c"finished discarding checkpointed state from the pool\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @spa_checkpoint_discard_complete_sync], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @spa_checkpoint_discard_complete_sync(ptr noundef %0, ptr noundef %1) #0 { store i64 0, ptr %0, align 8, !tbaa !5 %3 = load i32, ptr @SPA_FEATURE_POOL_CHECKPOINT, align 4, !tbaa !11 %4 = tail call i32 @spa_feature_decr(ptr noundef nonnull %0, i32 noundef %3, ptr noundef %1) #2 %5 = tail call i32 @spa_history_log_internal(ptr noundef nonnull %0, ptr noundef nonnull @.str, ptr noundef %1, ptr noundef nonnull @.str.1) #2 ret void } declare i32 @spa_feature_decr(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @spa_history_log_internal(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !8, i64 0} !6 = !{!"TYPE_6__", !7, i64 0} !7 = !{!"TYPE_5__", !8, i64 0} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !12, i64 0} !12 = !{!"int", !9, i64 0}
; ModuleID = 'AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_spa_checkpoint.c_spa_checkpoint_discard_complete_sync.c' source_filename = "AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_spa_checkpoint.c_spa_checkpoint_discard_complete_sync.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @SPA_FEATURE_POOL_CHECKPOINT = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [23 x i8] c"spa discard checkpoint\00", align 1 @.str.1 = private unnamed_addr constant [53 x i8] c"finished discarding checkpointed state from the pool\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @spa_checkpoint_discard_complete_sync], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @spa_checkpoint_discard_complete_sync(ptr noundef %0, ptr noundef %1) #0 { store i64 0, ptr %0, align 8, !tbaa !6 %3 = load i32, ptr @SPA_FEATURE_POOL_CHECKPOINT, align 4, !tbaa !12 %4 = tail call i32 @spa_feature_decr(ptr noundef nonnull %0, i32 noundef %3, ptr noundef %1) #2 %5 = tail call i32 @spa_history_log_internal(ptr noundef nonnull %0, ptr noundef nonnull @.str, ptr noundef %1, ptr noundef nonnull @.str.1) #2 ret void } declare i32 @spa_feature_decr(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @spa_history_log_internal(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !9, i64 0} !7 = !{!"TYPE_6__", !8, i64 0} !8 = !{!"TYPE_5__", !9, i64 0} !9 = !{!"long", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"} !12 = !{!13, !13, i64 0} !13 = !{!"int", !10, i64 0}
freebsd_sys_cddl_contrib_opensolaris_uts_common_fs_zfs_extr_spa_checkpoint.c_spa_checkpoint_discard_complete_sync
; ModuleID = 'AnghaBench/linux/drivers/video/backlight/extr_tosa_lcd.c_tosa_lcd_probe.c' source_filename = "AnghaBench/linux/drivers/video/backlight/extr_tosa_lcd.c_tosa_lcd_probe.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.spi_device = type { i32, i32 } %struct.tosa_lcd_data = type { i32, ptr, ptr } @GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4 @ENOMEM = dso_local local_unnamed_addr global i32 0, align 4 @TOSA_GPIO_TG_ON = dso_local local_unnamed_addr global i32 0, align 4 @GPIOF_OUT_INIT_LOW = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [8 x i8] c"tg #pwr\00", align 1 @.str.1 = private unnamed_addr constant [9 x i8] c"tosa-lcd\00", align 1 @tosa_lcd_ops = dso_local global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @tosa_lcd_probe], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @tosa_lcd_probe(ptr noundef %0) #0 { %2 = getelementptr inbounds %struct.spi_device, ptr %0, i64 0, i32 1 %3 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5 %4 = tail call ptr @devm_kzalloc(ptr noundef nonnull %2, i32 noundef 24, i32 noundef %3) #2 %5 = icmp eq ptr %4, null br i1 %5, label %6, label %9 6: ; preds = %1 %7 = load i32, ptr @ENOMEM, align 4, !tbaa !5 %8 = sub nsw i32 0, %7 br label %31 9: ; preds = %1 store i32 1, ptr %4, align 8, !tbaa !9 store i32 8, ptr %0, align 4, !tbaa !12 %10 = tail call i32 @spi_setup(ptr noundef nonnull %0) #2 %11 = icmp slt i32 %10, 0 br i1 %11, label %31, label %12 12: ; preds = %9 %13 = getelementptr inbounds %struct.tosa_lcd_data, ptr %4, i64 0, i32 2 store ptr %0, ptr %13, align 8, !tbaa !14 %14 = tail call i32 @spi_set_drvdata(ptr noundef nonnull %0, ptr noundef nonnull %4) #2 %15 = load i32, ptr @TOSA_GPIO_TG_ON, align 4, !tbaa !5 %16 = load i32, ptr @GPIOF_OUT_INIT_LOW, align 4, !tbaa !5 %17 = tail call i32 @devm_gpio_request_one(ptr noundef nonnull %2, i32 noundef %15, i32 noundef %16, ptr noundef nonnull @.str) #2 %18 = icmp slt i32 %17, 0 br i1 %18, label %31, label %19 19: ; preds = %12 %20 = tail call i32 @mdelay(i32 noundef 60) #2 %21 = tail call i32 @tosa_lcd_tg_init(ptr noundef nonnull %4) #2 %22 = tail call i32 @tosa_lcd_tg_on(ptr noundef nonnull %4) #2 %23 = tail call ptr @devm_lcd_device_register(ptr noundef nonnull %2, ptr noundef nonnull @.str.1, ptr noundef nonnull %2, ptr noundef nonnull %4, ptr noundef nonnull @tosa_lcd_ops) #2 %24 = getelementptr inbounds %struct.tosa_lcd_data, ptr %4, i64 0, i32 1 store ptr %23, ptr %24, align 8, !tbaa !15 %25 = tail call i64 @IS_ERR(ptr noundef %23) #2 %26 = icmp eq i64 %25, 0 br i1 %26, label %31, label %27 27: ; preds = %19 %28 = load ptr, ptr %24, align 8, !tbaa !15 %29 = tail call i32 @PTR_ERR(ptr noundef %28) #2 store ptr null, ptr %24, align 8, !tbaa !15 %30 = tail call i32 @tosa_lcd_tg_off(ptr noundef nonnull %4) #2 br label %31 31: ; preds = %19, %12, %9, %27, %6 %32 = phi i32 [ %29, %27 ], [ %8, %6 ], [ %10, %9 ], [ %17, %12 ], [ 0, %19 ] ret i32 %32 } declare ptr @devm_kzalloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @spi_setup(ptr noundef) local_unnamed_addr #1 declare i32 @spi_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @devm_gpio_request_one(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @mdelay(i32 noundef) local_unnamed_addr #1 declare i32 @tosa_lcd_tg_init(ptr noundef) local_unnamed_addr #1 declare i32 @tosa_lcd_tg_on(ptr noundef) local_unnamed_addr #1 declare ptr @devm_lcd_device_register(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @tosa_lcd_tg_off(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"tosa_lcd_data", !6, i64 0, !11, i64 8, !11, i64 16} !11 = !{!"any pointer", !7, i64 0} !12 = !{!13, !6, i64 0} !13 = !{!"spi_device", !6, i64 0, !6, i64 4} !14 = !{!10, !11, i64 16} !15 = !{!10, !11, i64 8}
; ModuleID = 'AnghaBench/linux/drivers/video/backlight/extr_tosa_lcd.c_tosa_lcd_probe.c' source_filename = "AnghaBench/linux/drivers/video/backlight/extr_tosa_lcd.c_tosa_lcd_probe.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @GFP_KERNEL = common local_unnamed_addr global i32 0, align 4 @ENOMEM = common local_unnamed_addr global i32 0, align 4 @TOSA_GPIO_TG_ON = common local_unnamed_addr global i32 0, align 4 @GPIOF_OUT_INIT_LOW = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [8 x i8] c"tg #pwr\00", align 1 @.str.1 = private unnamed_addr constant [9 x i8] c"tosa-lcd\00", align 1 @tosa_lcd_ops = common global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @tosa_lcd_probe], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @tosa_lcd_probe(ptr noundef %0) #0 { %2 = getelementptr inbounds i8, ptr %0, i64 4 %3 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6 %4 = tail call ptr @devm_kzalloc(ptr noundef nonnull %2, i32 noundef 24, i32 noundef %3) #2 %5 = icmp eq ptr %4, null br i1 %5, label %6, label %9 6: ; preds = %1 %7 = load i32, ptr @ENOMEM, align 4, !tbaa !6 %8 = sub nsw i32 0, %7 br label %31 9: ; preds = %1 store i32 1, ptr %4, align 8, !tbaa !10 store i32 8, ptr %0, align 4, !tbaa !13 %10 = tail call i32 @spi_setup(ptr noundef nonnull %0) #2 %11 = icmp slt i32 %10, 0 br i1 %11, label %31, label %12 12: ; preds = %9 %13 = getelementptr inbounds i8, ptr %4, i64 16 store ptr %0, ptr %13, align 8, !tbaa !15 %14 = tail call i32 @spi_set_drvdata(ptr noundef nonnull %0, ptr noundef nonnull %4) #2 %15 = load i32, ptr @TOSA_GPIO_TG_ON, align 4, !tbaa !6 %16 = load i32, ptr @GPIOF_OUT_INIT_LOW, align 4, !tbaa !6 %17 = tail call i32 @devm_gpio_request_one(ptr noundef nonnull %2, i32 noundef %15, i32 noundef %16, ptr noundef nonnull @.str) #2 %18 = icmp slt i32 %17, 0 br i1 %18, label %31, label %19 19: ; preds = %12 %20 = tail call i32 @mdelay(i32 noundef 60) #2 %21 = tail call i32 @tosa_lcd_tg_init(ptr noundef nonnull %4) #2 %22 = tail call i32 @tosa_lcd_tg_on(ptr noundef nonnull %4) #2 %23 = tail call ptr @devm_lcd_device_register(ptr noundef nonnull %2, ptr noundef nonnull @.str.1, ptr noundef nonnull %2, ptr noundef nonnull %4, ptr noundef nonnull @tosa_lcd_ops) #2 %24 = getelementptr inbounds i8, ptr %4, i64 8 store ptr %23, ptr %24, align 8, !tbaa !16 %25 = tail call i64 @IS_ERR(ptr noundef %23) #2 %26 = icmp eq i64 %25, 0 br i1 %26, label %31, label %27 27: ; preds = %19 %28 = load ptr, ptr %24, align 8, !tbaa !16 %29 = tail call i32 @PTR_ERR(ptr noundef %28) #2 store ptr null, ptr %24, align 8, !tbaa !16 %30 = tail call i32 @tosa_lcd_tg_off(ptr noundef nonnull %4) #2 br label %31 31: ; preds = %19, %12, %9, %27, %6 %32 = phi i32 [ %29, %27 ], [ %8, %6 ], [ %10, %9 ], [ %17, %12 ], [ 0, %19 ] ret i32 %32 } declare ptr @devm_kzalloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @spi_setup(ptr noundef) local_unnamed_addr #1 declare i32 @spi_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @devm_gpio_request_one(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @mdelay(i32 noundef) local_unnamed_addr #1 declare i32 @tosa_lcd_tg_init(ptr noundef) local_unnamed_addr #1 declare i32 @tosa_lcd_tg_on(ptr noundef) local_unnamed_addr #1 declare ptr @devm_lcd_device_register(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @tosa_lcd_tg_off(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"tosa_lcd_data", !7, i64 0, !12, i64 8, !12, i64 16} !12 = !{!"any pointer", !8, i64 0} !13 = !{!14, !7, i64 0} !14 = !{!"spi_device", !7, i64 0, !7, i64 4} !15 = !{!11, !12, i64 16} !16 = !{!11, !12, i64 8}
linux_drivers_video_backlight_extr_tosa_lcd.c_tosa_lcd_probe
; ModuleID = 'AnghaBench/linux/fs/nfs/extr_proc.c_nfs_proc_getattr.c' source_filename = "AnghaBench/linux/fs/nfs/extr_proc.c_nfs_proc_getattr.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.rpc_message = type { ptr, ptr, ptr } @nfs_procedures = dso_local local_unnamed_addr global ptr null, align 8 @NFSPROC_GETATTR = dso_local local_unnamed_addr global i64 0, align 8 @.str = private unnamed_addr constant [19 x i8] c"NFS call getattr\0A\00", align 1 @.str.1 = private unnamed_addr constant [23 x i8] c"NFS reply getattr: %d\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @nfs_proc_getattr], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef i32 @nfs_proc_getattr(ptr nocapture noundef readonly %0, ptr noundef %1, ptr noundef %2, ptr nocapture readnone %3, ptr nocapture readnone %4) #0 { %6 = alloca %struct.rpc_message, align 8 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %6) #3 store ptr %2, ptr %6, align 8, !tbaa !5 %7 = getelementptr inbounds %struct.rpc_message, ptr %6, i64 0, i32 1 store ptr %1, ptr %7, align 8, !tbaa !10 %8 = getelementptr inbounds %struct.rpc_message, ptr %6, i64 0, i32 2 %9 = load ptr, ptr @nfs_procedures, align 8, !tbaa !11 %10 = load i64, ptr @NFSPROC_GETATTR, align 8, !tbaa !12 %11 = getelementptr inbounds i32, ptr %9, i64 %10 store ptr %11, ptr %8, align 8, !tbaa !14 %12 = tail call i32 (ptr, ...) @dprintk(ptr noundef nonnull @.str) #3 %13 = tail call i32 @nfs_fattr_init(ptr noundef %2) #3 %14 = load i32, ptr %0, align 4, !tbaa !15 %15 = call i32 @rpc_call_sync(i32 noundef %14, ptr noundef nonnull %6, i32 noundef 0) #3 %16 = call i32 (ptr, ...) @dprintk(ptr noundef nonnull @.str.1, i32 noundef %15) #3 call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #3 ret i32 %15 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @dprintk(ptr noundef, ...) local_unnamed_addr #2 declare i32 @nfs_fattr_init(ptr noundef) local_unnamed_addr #2 declare i32 @rpc_call_sync(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"rpc_message", !7, i64 0, !7, i64 8, !7, i64 16} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!6, !7, i64 8} !11 = !{!7, !7, i64 0} !12 = !{!13, !13, i64 0} !13 = !{!"long", !8, i64 0} !14 = !{!6, !7, i64 16} !15 = !{!16, !17, i64 0} !16 = !{!"nfs_server", !17, i64 0} !17 = !{!"int", !8, i64 0}
; ModuleID = 'AnghaBench/linux/fs/nfs/extr_proc.c_nfs_proc_getattr.c' source_filename = "AnghaBench/linux/fs/nfs/extr_proc.c_nfs_proc_getattr.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.rpc_message = type { ptr, ptr, ptr } @nfs_procedures = common local_unnamed_addr global ptr null, align 8 @NFSPROC_GETATTR = common local_unnamed_addr global i64 0, align 8 @.str = private unnamed_addr constant [19 x i8] c"NFS call getattr\0A\00", align 1 @.str.1 = private unnamed_addr constant [23 x i8] c"NFS reply getattr: %d\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @nfs_proc_getattr], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal noundef i32 @nfs_proc_getattr(ptr nocapture noundef readonly %0, ptr noundef %1, ptr noundef %2, ptr nocapture readnone %3, ptr nocapture readnone %4) #0 { %6 = alloca %struct.rpc_message, align 8 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %6) #3 store ptr %2, ptr %6, align 8, !tbaa !6 %7 = getelementptr inbounds i8, ptr %6, i64 8 store ptr %1, ptr %7, align 8, !tbaa !11 %8 = getelementptr inbounds i8, ptr %6, i64 16 %9 = load ptr, ptr @nfs_procedures, align 8, !tbaa !12 %10 = load i64, ptr @NFSPROC_GETATTR, align 8, !tbaa !13 %11 = getelementptr inbounds i32, ptr %9, i64 %10 store ptr %11, ptr %8, align 8, !tbaa !15 %12 = tail call i32 (ptr, ...) @dprintk(ptr noundef nonnull @.str) #3 %13 = tail call i32 @nfs_fattr_init(ptr noundef %2) #3 %14 = load i32, ptr %0, align 4, !tbaa !16 %15 = call i32 @rpc_call_sync(i32 noundef %14, ptr noundef nonnull %6, i32 noundef 0) #3 %16 = call i32 (ptr, ...) @dprintk(ptr noundef nonnull @.str.1, i32 noundef %15) #3 call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #3 ret i32 %15 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @dprintk(ptr noundef, ...) local_unnamed_addr #2 declare i32 @nfs_fattr_init(ptr noundef) local_unnamed_addr #2 declare i32 @rpc_call_sync(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"rpc_message", !8, i64 0, !8, i64 8, !8, i64 16} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!7, !8, i64 8} !12 = !{!8, !8, i64 0} !13 = !{!14, !14, i64 0} !14 = !{!"long", !9, i64 0} !15 = !{!7, !8, i64 16} !16 = !{!17, !18, i64 0} !17 = !{!"nfs_server", !18, i64 0} !18 = !{!"int", !9, i64 0}
linux_fs_nfs_extr_proc.c_nfs_proc_getattr
; ModuleID = 'AnghaBench/linux/block/extr_blk-wbt.c___wbt_wait.c' source_filename = "AnghaBench/linux/block/extr_blk-wbt.c___wbt_wait.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.wbt_wait_data = type { i32, i64, ptr } @wbt_inflight_cb = dso_local local_unnamed_addr global i32 0, align 4 @wbt_cleanup_cb = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @__wbt_wait], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @__wbt_wait(ptr noundef %0, i32 noundef %1, i64 noundef %2) #0 { %4 = alloca %struct.wbt_wait_data, align 8 %5 = tail call ptr @get_rq_wait(ptr noundef %0, i32 noundef %1) #3 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #3 store i32 %1, ptr %4, align 8, !tbaa !5 %6 = getelementptr inbounds %struct.wbt_wait_data, ptr %4, i64 0, i32 1 store i64 %2, ptr %6, align 8, !tbaa !12 %7 = getelementptr inbounds %struct.wbt_wait_data, ptr %4, i64 0, i32 2 store ptr %0, ptr %7, align 8, !tbaa !13 %8 = load i32, ptr @wbt_inflight_cb, align 4, !tbaa !14 %9 = load i32, ptr @wbt_cleanup_cb, align 4, !tbaa !14 %10 = call i32 @rq_qos_wait(ptr noundef %5, ptr noundef nonnull %4, i32 noundef %8, i32 noundef %9) #3 call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @get_rq_wait(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @rq_qos_wait(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"wbt_wait_data", !7, i64 0, !10, i64 8, !11, i64 16} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"long", !8, i64 0} !11 = !{!"any pointer", !8, i64 0} !12 = !{!6, !10, i64 8} !13 = !{!6, !11, i64 16} !14 = !{!7, !7, i64 0}
; ModuleID = 'AnghaBench/linux/block/extr_blk-wbt.c___wbt_wait.c' source_filename = "AnghaBench/linux/block/extr_blk-wbt.c___wbt_wait.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.wbt_wait_data = type { i32, i64, ptr } @wbt_inflight_cb = common local_unnamed_addr global i32 0, align 4 @wbt_cleanup_cb = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @__wbt_wait], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @__wbt_wait(ptr noundef %0, i32 noundef %1, i64 noundef %2) #0 { %4 = alloca %struct.wbt_wait_data, align 8 %5 = tail call ptr @get_rq_wait(ptr noundef %0, i32 noundef %1) #3 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #3 store i32 %1, ptr %4, align 8, !tbaa !6 %6 = getelementptr inbounds i8, ptr %4, i64 8 store i64 %2, ptr %6, align 8, !tbaa !13 %7 = getelementptr inbounds i8, ptr %4, i64 16 store ptr %0, ptr %7, align 8, !tbaa !14 %8 = load i32, ptr @wbt_inflight_cb, align 4, !tbaa !15 %9 = load i32, ptr @wbt_cleanup_cb, align 4, !tbaa !15 %10 = call i32 @rq_qos_wait(ptr noundef %5, ptr noundef nonnull %4, i32 noundef %8, i32 noundef %9) #3 call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @get_rq_wait(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @rq_qos_wait(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"wbt_wait_data", !8, i64 0, !11, i64 8, !12, i64 16} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"long", !9, i64 0} !12 = !{!"any pointer", !9, i64 0} !13 = !{!7, !11, i64 8} !14 = !{!7, !12, i64 16} !15 = !{!8, !8, i64 0}
linux_block_extr_blk-wbt.c___wbt_wait
; ModuleID = 'AnghaBench/libgit2/tests/repo/extr_template.c_test_repo_template__initial_head_option_overrides_template_head.c' source_filename = "AnghaBench/libgit2/tests/repo/extr_template.c_test_repo_template__initial_head_option_overrides_template_head.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_8__ = type { i32, ptr } %struct.TYPE_9__ = type { i32 } @GIT_REPOSITORY_INIT_OPTIONS_INIT = dso_local local_unnamed_addr global %struct.TYPE_8__ zeroinitializer, align 8 @GIT_BUF_INIT = dso_local local_unnamed_addr global %struct.TYPE_9__ zeroinitializer, align 4 @GIT_REPOSITORY_INIT_MKPATH = dso_local local_unnamed_addr global i32 0, align 4 @GIT_REPOSITORY_INIT_EXTERNAL_TEMPLATE = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [7 x i8] c"manual\00", align 1 @.str.1 = private unnamed_addr constant [9 x i8] c"template\00", align 1 @.str.2 = private unnamed_addr constant [14 x i8] c"template/HEAD\00", align 1 @.str.3 = private unnamed_addr constant [8 x i8] c"foobar\0A\00", align 1 @.str.4 = private unnamed_addr constant [5 x i8] c"repo\00", align 1 @.str.5 = private unnamed_addr constant [15 x i8] c"repo/.git/HEAD\00", align 1 @.str.6 = private unnamed_addr constant [24 x i8] c"ref: refs/heads/manual\0A\00", align 1 ; Function Attrs: nounwind uwtable define dso_local void @test_repo_template__initial_head_option_overrides_template_head() local_unnamed_addr #0 { %1 = alloca %struct.TYPE_8__, align 8 %2 = alloca %struct.TYPE_9__, align 4 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %1) #3 %3 = load i64, ptr @GIT_REPOSITORY_INIT_OPTIONS_INIT, align 8 store i64 %3, ptr %1, align 8 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 %4 = load i32, ptr @GIT_BUF_INIT, align 4, !tbaa !5 store i32 %4, ptr %2, align 4, !tbaa !5 %5 = load i32, ptr @GIT_REPOSITORY_INIT_MKPATH, align 4, !tbaa !5 %6 = load i32, ptr @GIT_REPOSITORY_INIT_EXTERNAL_TEMPLATE, align 4, !tbaa !5 %7 = or i32 %6, %5 store i32 %7, ptr %1, align 8, !tbaa !9 %8 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 1 store ptr @.str, ptr %8, align 8, !tbaa !12 %9 = tail call i32 @setup_templates(ptr noundef nonnull @.str.1, i32 noundef 1) #3 %10 = tail call i32 @cl_git_mkfile(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3) #3 %11 = call i32 @setup_repo(ptr noundef nonnull @.str.4, ptr noundef nonnull %1) #3 %12 = call i32 @git_futils_readbuffer(ptr noundef nonnull %2, ptr noundef nonnull @.str.5) #3 %13 = call i32 @cl_git_pass(i32 noundef %12) #3 %14 = load i32, ptr %2, align 4, !tbaa !13 %15 = call i32 @cl_assert_equal_s(ptr noundef nonnull @.str.6, i32 noundef %14) #3 %16 = call i32 @git_buf_dispose(ptr noundef nonnull %2) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %1) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @setup_templates(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @cl_git_mkfile(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @setup_repo(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @cl_git_pass(i32 noundef) local_unnamed_addr #2 declare i32 @git_futils_readbuffer(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @cl_assert_equal_s(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @git_buf_dispose(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"TYPE_8__", !6, i64 0, !11, i64 8} !11 = !{!"any pointer", !7, i64 0} !12 = !{!10, !11, i64 8} !13 = !{!14, !6, i64 0} !14 = !{!"TYPE_9__", !6, i64 0}
; ModuleID = 'AnghaBench/libgit2/tests/repo/extr_template.c_test_repo_template__initial_head_option_overrides_template_head.c' source_filename = "AnghaBench/libgit2/tests/repo/extr_template.c_test_repo_template__initial_head_option_overrides_template_head.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_8__ = type { i32, ptr } %struct.TYPE_9__ = type { i32 } @GIT_REPOSITORY_INIT_OPTIONS_INIT = common local_unnamed_addr global %struct.TYPE_8__ zeroinitializer, align 8 @GIT_BUF_INIT = common local_unnamed_addr global %struct.TYPE_9__ zeroinitializer, align 4 @GIT_REPOSITORY_INIT_MKPATH = common local_unnamed_addr global i32 0, align 4 @GIT_REPOSITORY_INIT_EXTERNAL_TEMPLATE = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [7 x i8] c"manual\00", align 1 @.str.1 = private unnamed_addr constant [9 x i8] c"template\00", align 1 @.str.2 = private unnamed_addr constant [14 x i8] c"template/HEAD\00", align 1 @.str.3 = private unnamed_addr constant [8 x i8] c"foobar\0A\00", align 1 @.str.4 = private unnamed_addr constant [5 x i8] c"repo\00", align 1 @.str.5 = private unnamed_addr constant [15 x i8] c"repo/.git/HEAD\00", align 1 @.str.6 = private unnamed_addr constant [24 x i8] c"ref: refs/heads/manual\0A\00", align 1 ; Function Attrs: nounwind ssp uwtable(sync) define void @test_repo_template__initial_head_option_overrides_template_head() local_unnamed_addr #0 { %1 = alloca %struct.TYPE_8__, align 8 %2 = alloca %struct.TYPE_9__, align 4 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %1) #3 %3 = load i64, ptr @GIT_REPOSITORY_INIT_OPTIONS_INIT, align 8 store i64 %3, ptr %1, align 8 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 %4 = load i32, ptr @GIT_BUF_INIT, align 4, !tbaa !6 store i32 %4, ptr %2, align 4, !tbaa !6 %5 = load i32, ptr @GIT_REPOSITORY_INIT_MKPATH, align 4, !tbaa !6 %6 = load i32, ptr @GIT_REPOSITORY_INIT_EXTERNAL_TEMPLATE, align 4, !tbaa !6 %7 = or i32 %6, %5 store i32 %7, ptr %1, align 8, !tbaa !10 %8 = getelementptr inbounds i8, ptr %1, i64 8 store ptr @.str, ptr %8, align 8, !tbaa !13 %9 = tail call i32 @setup_templates(ptr noundef nonnull @.str.1, i32 noundef 1) #3 %10 = tail call i32 @cl_git_mkfile(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3) #3 %11 = call i32 @setup_repo(ptr noundef nonnull @.str.4, ptr noundef nonnull %1) #3 %12 = call i32 @git_futils_readbuffer(ptr noundef nonnull %2, ptr noundef nonnull @.str.5) #3 %13 = call i32 @cl_git_pass(i32 noundef %12) #3 %14 = load i32, ptr %2, align 4, !tbaa !14 %15 = call i32 @cl_assert_equal_s(ptr noundef nonnull @.str.6, i32 noundef %14) #3 %16 = call i32 @git_buf_dispose(ptr noundef nonnull %2) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %1) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @setup_templates(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @cl_git_mkfile(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @setup_repo(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @cl_git_pass(i32 noundef) local_unnamed_addr #2 declare i32 @git_futils_readbuffer(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @cl_assert_equal_s(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @git_buf_dispose(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"TYPE_8__", !7, i64 0, !12, i64 8} !12 = !{!"any pointer", !8, i64 0} !13 = !{!11, !12, i64 8} !14 = !{!15, !7, i64 0} !15 = !{!"TYPE_9__", !7, i64 0}
libgit2_tests_repo_extr_template.c_test_repo_template__initial_head_option_overrides_template_head
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Hub.c_EnableSecureNATEx.c' source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Hub.c_EnableSecureNATEx.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_8__ = type { i64, i32, i32, i32, i32, ptr, i32, ptr } @SERVER_TYPE_FARM_CONTROLLER = dso_local local_unnamed_addr global i64 0, align 8 @HUB_TYPE_FARM_DYNAMIC = dso_local local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind uwtable define dso_local void @EnableSecureNATEx(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 { %4 = icmp eq ptr %0, null br i1 %4, label %70, label %5 5: ; preds = %3 %6 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 7 %7 = load ptr, ptr %6, align 8, !tbaa !5 %8 = load ptr, ptr %7, align 8, !tbaa !12 %9 = icmp eq ptr %8, null br i1 %9, label %18, label %10 10: ; preds = %5 %11 = load i64, ptr %8, align 8, !tbaa !14 %12 = load i64, ptr @SERVER_TYPE_FARM_CONTROLLER, align 8, !tbaa !16 %13 = icmp eq i64 %11, %12 br i1 %13, label %14, label %18 14: ; preds = %10 %15 = load i64, ptr %0, align 8, !tbaa !17 %16 = load i64, ptr @HUB_TYPE_FARM_DYNAMIC, align 8, !tbaa !16 %17 = icmp ne i64 %15, %16 br label %18 18: ; preds = %14, %10, %5 %19 = phi i1 [ true, %10 ], [ true, %5 ], [ %17, %14 ] %20 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 3 %21 = load i32, ptr %20, align 8, !tbaa !18 %22 = tail call i32 @Lock(i32 noundef %21) #2 %23 = icmp eq i32 %2, 0 %24 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1 br i1 %23, label %27, label %25 25: ; preds = %18 %26 = load i32, ptr %24, align 8, !tbaa !19 br label %28 27: ; preds = %18 store i32 %1, ptr %24, align 8, !tbaa !19 br label %28 28: ; preds = %25, %27 %29 = phi i32 [ %26, %25 ], [ %1, %27 ] %30 = icmp eq i32 %29, 0 br i1 %30, label %31, label %37 31: ; preds = %42, %50, %28 %32 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 5 %33 = load ptr, ptr %32, align 8, !tbaa !20 %34 = icmp eq ptr %33, null br i1 %34, label %67, label %35 35: ; preds = %31 %36 = tail call i32 @SnFreeSecureNAT(ptr noundef nonnull %33) #2 store ptr null, ptr %32, align 8, !tbaa !20 br label %67 37: ; preds = %28 br i1 %19, label %55, label %38 38: ; preds = %37 %39 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 5 %40 = load ptr, ptr %39, align 8, !tbaa !20 %41 = icmp eq ptr %40, null br i1 %41, label %50, label %42 42: ; preds = %38 %43 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 6 %44 = load i32, ptr %43, align 8, !tbaa !21 %45 = tail call i32 @LIST_NUM(i32 noundef %44) #2 %46 = icmp slt i32 %45, 2 br i1 %46, label %31, label %47 47: ; preds = %42 %48 = load ptr, ptr %39, align 8, !tbaa !20 %49 = icmp eq ptr %48, null br i1 %49, label %50, label %55 50: ; preds = %38, %47 %51 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 6 %52 = load i32, ptr %51, align 8, !tbaa !21 %53 = tail call i32 @LIST_NUM(i32 noundef %52) #2 %54 = icmp eq i32 %53, 0 br i1 %54, label %31, label %55 55: ; preds = %47, %50, %37 %56 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 5 %57 = load ptr, ptr %56, align 8, !tbaa !20 %58 = icmp eq ptr %57, null br i1 %58, label %59, label %67 59: ; preds = %55 %60 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 2 %61 = load i32, ptr %60, align 4, !tbaa !22 %62 = icmp eq i32 %61, 0 br i1 %62, label %63, label %67 63: ; preds = %59 %64 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 4 %65 = load i32, ptr %64, align 4, !tbaa !23 %66 = tail call ptr @SnNewSecureNAT(ptr noundef nonnull %0, i32 noundef %65) #2 store ptr %66, ptr %56, align 8, !tbaa !20 br label %67 67: ; preds = %55, %59, %63, %31, %35 %68 = load i32, ptr %20, align 8, !tbaa !18 %69 = tail call i32 @Unlock(i32 noundef %68) #2 br label %70 70: ; preds = %3, %67 ret void } declare i32 @Lock(i32 noundef) local_unnamed_addr #1 declare i32 @SnFreeSecureNAT(ptr noundef) local_unnamed_addr #1 declare i32 @LIST_NUM(i32 noundef) local_unnamed_addr #1 declare ptr @SnNewSecureNAT(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @Unlock(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !11, i64 40} !6 = !{!"TYPE_8__", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !11, i64 24, !10, i64 32, !11, i64 40} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"int", !8, i64 0} !11 = !{!"any pointer", !8, i64 0} !12 = !{!13, !11, i64 0} !13 = !{!"TYPE_7__", !11, i64 0} !14 = !{!15, !7, i64 0} !15 = !{!"TYPE_6__", !7, i64 0} !16 = !{!7, !7, i64 0} !17 = !{!6, !7, i64 0} !18 = !{!6, !10, i64 16} !19 = !{!6, !10, i64 8} !20 = !{!6, !11, i64 24} !21 = !{!6, !10, i64 32} !22 = !{!6, !10, i64 12} !23 = !{!6, !10, i64 20}
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Hub.c_EnableSecureNATEx.c' source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Hub.c_EnableSecureNATEx.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @SERVER_TYPE_FARM_CONTROLLER = common local_unnamed_addr global i64 0, align 8 @HUB_TYPE_FARM_DYNAMIC = common local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind ssp uwtable(sync) define void @EnableSecureNATEx(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 { %4 = icmp eq ptr %0, null br i1 %4, label %70, label %5 5: ; preds = %3 %6 = getelementptr inbounds i8, ptr %0, i64 40 %7 = load ptr, ptr %6, align 8, !tbaa !6 %8 = load ptr, ptr %7, align 8, !tbaa !13 %9 = icmp eq ptr %8, null br i1 %9, label %18, label %10 10: ; preds = %5 %11 = load i64, ptr %8, align 8, !tbaa !15 %12 = load i64, ptr @SERVER_TYPE_FARM_CONTROLLER, align 8, !tbaa !17 %13 = icmp eq i64 %11, %12 br i1 %13, label %14, label %18 14: ; preds = %10 %15 = load i64, ptr %0, align 8, !tbaa !18 %16 = load i64, ptr @HUB_TYPE_FARM_DYNAMIC, align 8, !tbaa !17 %17 = icmp ne i64 %15, %16 br label %18 18: ; preds = %14, %10, %5 %19 = phi i1 [ true, %10 ], [ true, %5 ], [ %17, %14 ] %20 = getelementptr inbounds i8, ptr %0, i64 16 %21 = load i32, ptr %20, align 8, !tbaa !19 %22 = tail call i32 @Lock(i32 noundef %21) #2 %23 = icmp eq i32 %2, 0 %24 = getelementptr inbounds i8, ptr %0, i64 8 br i1 %23, label %27, label %25 25: ; preds = %18 %26 = load i32, ptr %24, align 8, !tbaa !20 br label %28 27: ; preds = %18 store i32 %1, ptr %24, align 8, !tbaa !20 br label %28 28: ; preds = %25, %27 %29 = phi i32 [ %26, %25 ], [ %1, %27 ] %30 = icmp eq i32 %29, 0 br i1 %30, label %31, label %37 31: ; preds = %42, %50, %28 %32 = getelementptr inbounds i8, ptr %0, i64 24 %33 = load ptr, ptr %32, align 8, !tbaa !21 %34 = icmp eq ptr %33, null br i1 %34, label %67, label %35 35: ; preds = %31 %36 = tail call i32 @SnFreeSecureNAT(ptr noundef nonnull %33) #2 store ptr null, ptr %32, align 8, !tbaa !21 br label %67 37: ; preds = %28 br i1 %19, label %55, label %38 38: ; preds = %37 %39 = getelementptr inbounds i8, ptr %0, i64 24 %40 = load ptr, ptr %39, align 8, !tbaa !21 %41 = icmp eq ptr %40, null br i1 %41, label %50, label %42 42: ; preds = %38 %43 = getelementptr inbounds i8, ptr %0, i64 32 %44 = load i32, ptr %43, align 8, !tbaa !22 %45 = tail call i32 @LIST_NUM(i32 noundef %44) #2 %46 = icmp slt i32 %45, 2 br i1 %46, label %31, label %47 47: ; preds = %42 %48 = load ptr, ptr %39, align 8, !tbaa !21 %49 = icmp eq ptr %48, null br i1 %49, label %50, label %55 50: ; preds = %38, %47 %51 = getelementptr inbounds i8, ptr %0, i64 32 %52 = load i32, ptr %51, align 8, !tbaa !22 %53 = tail call i32 @LIST_NUM(i32 noundef %52) #2 %54 = icmp eq i32 %53, 0 br i1 %54, label %31, label %55 55: ; preds = %47, %50, %37 %56 = getelementptr inbounds i8, ptr %0, i64 24 %57 = load ptr, ptr %56, align 8, !tbaa !21 %58 = icmp eq ptr %57, null br i1 %58, label %59, label %67 59: ; preds = %55 %60 = getelementptr inbounds i8, ptr %0, i64 12 %61 = load i32, ptr %60, align 4, !tbaa !23 %62 = icmp eq i32 %61, 0 br i1 %62, label %63, label %67 63: ; preds = %59 %64 = getelementptr inbounds i8, ptr %0, i64 20 %65 = load i32, ptr %64, align 4, !tbaa !24 %66 = tail call ptr @SnNewSecureNAT(ptr noundef nonnull %0, i32 noundef %65) #2 store ptr %66, ptr %56, align 8, !tbaa !21 br label %67 67: ; preds = %55, %59, %63, %31, %35 %68 = load i32, ptr %20, align 8, !tbaa !19 %69 = tail call i32 @Unlock(i32 noundef %68) #2 br label %70 70: ; preds = %3, %67 ret void } declare i32 @Lock(i32 noundef) local_unnamed_addr #1 declare i32 @SnFreeSecureNAT(ptr noundef) local_unnamed_addr #1 declare i32 @LIST_NUM(i32 noundef) local_unnamed_addr #1 declare ptr @SnNewSecureNAT(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @Unlock(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !12, i64 40} !7 = !{!"TYPE_8__", !8, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !12, i64 24, !11, i64 32, !12, i64 40} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"int", !9, i64 0} !12 = !{!"any pointer", !9, i64 0} !13 = !{!14, !12, i64 0} !14 = !{!"TYPE_7__", !12, i64 0} !15 = !{!16, !8, i64 0} !16 = !{!"TYPE_6__", !8, i64 0} !17 = !{!8, !8, i64 0} !18 = !{!7, !8, i64 0} !19 = !{!7, !11, i64 16} !20 = !{!7, !11, i64 8} !21 = !{!7, !12, i64 24} !22 = !{!7, !11, i64 32} !23 = !{!7, !11, i64 12} !24 = !{!7, !11, i64 20}
SoftEtherVPN_src_Cedar_extr_Hub.c_EnableSecureNATEx
; ModuleID = 'AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_dmu_tx.c_dmu_tx_hold_space.c' source_filename = "AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_dmu_tx.c_dmu_tx_hold_space.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_6__ = type { i64, i32 } @DMU_NEW_OBJECT = dso_local local_unnamed_addr global i32 0, align 4 @THT_SPACE = dso_local local_unnamed_addr global i32 0, align 4 @FTAG = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local void @dmu_tx_hold_space(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 { %3 = load i64, ptr %0, align 8, !tbaa !5 %4 = icmp eq i64 %3, 0 %5 = zext i1 %4 to i32 %6 = tail call i32 @ASSERT(i32 noundef %5) #2 %7 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1 %8 = load i32, ptr %7, align 8, !tbaa !11 %9 = load i32, ptr @DMU_NEW_OBJECT, align 4, !tbaa !12 %10 = load i32, ptr @THT_SPACE, align 4, !tbaa !12 %11 = tail call ptr @dmu_tx_hold_object_impl(ptr noundef nonnull %0, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %1, i32 noundef 0) #2 %12 = load i32, ptr @FTAG, align 4, !tbaa !12 %13 = tail call i32 @zfs_refcount_add_many(ptr noundef %11, i32 noundef %1, i32 noundef %12) #2 ret void } declare i32 @ASSERT(i32 noundef) local_unnamed_addr #1 declare ptr @dmu_tx_hold_object_impl(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @zfs_refcount_add_many(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_6__", !7, i64 0, !10, i64 8} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"int", !8, i64 0} !11 = !{!6, !10, i64 8} !12 = !{!10, !10, i64 0}
; ModuleID = 'AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_dmu_tx.c_dmu_tx_hold_space.c' source_filename = "AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_dmu_tx.c_dmu_tx_hold_space.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @DMU_NEW_OBJECT = common local_unnamed_addr global i32 0, align 4 @THT_SPACE = common local_unnamed_addr global i32 0, align 4 @FTAG = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define void @dmu_tx_hold_space(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 { %3 = load i64, ptr %0, align 8, !tbaa !6 %4 = icmp eq i64 %3, 0 %5 = zext i1 %4 to i32 %6 = tail call i32 @ASSERT(i32 noundef %5) #2 %7 = getelementptr inbounds i8, ptr %0, i64 8 %8 = load i32, ptr %7, align 8, !tbaa !12 %9 = load i32, ptr @DMU_NEW_OBJECT, align 4, !tbaa !13 %10 = load i32, ptr @THT_SPACE, align 4, !tbaa !13 %11 = tail call ptr @dmu_tx_hold_object_impl(ptr noundef nonnull %0, i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %1, i32 noundef 0) #2 %12 = load i32, ptr @FTAG, align 4, !tbaa !13 %13 = tail call i32 @zfs_refcount_add_many(ptr noundef %11, i32 noundef %1, i32 noundef %12) #2 ret void } declare i32 @ASSERT(i32 noundef) local_unnamed_addr #1 declare ptr @dmu_tx_hold_object_impl(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @zfs_refcount_add_many(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_6__", !8, i64 0, !11, i64 8} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"int", !9, i64 0} !12 = !{!7, !11, i64 8} !13 = !{!11, !11, i64 0}
freebsd_sys_cddl_contrib_opensolaris_uts_common_fs_zfs_extr_dmu_tx.c_dmu_tx_hold_space
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_hevcdec.c_verify_md5.c' source_filename = "AnghaBench/FFmpeg/libavcodec/extr_hevcdec.c_verify_md5.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_20__ = type { ptr, ptr, i32 } %struct.TYPE_19__ = type { i32, i32, ptr } %struct.TYPE_18__ = type { ptr, %struct.TYPE_17__, i32, ptr, %struct.TYPE_15__, i32, i32 } %struct.TYPE_17__ = type { %struct.TYPE_16__ } %struct.TYPE_16__ = type { ptr } %struct.TYPE_15__ = type { ptr } %struct.TYPE_13__ = type { i32, i32 } @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @AV_LOG_DEBUG = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [43 x i8] c"Verifying checksum for frame with POC %d: \00", align 1 @.str.1 = private unnamed_addr constant [20 x i8] c"plane %d - correct \00", align 1 @.str.2 = private unnamed_addr constant [3 x i8] c"; \00", align 1 @AV_LOG_ERROR = dso_local local_unnamed_addr global i32 0, align 4 @.str.3 = private unnamed_addr constant [36 x i8] c"mismatching checksum of plane %d - \00", align 1 @.str.4 = private unnamed_addr constant [5 x i8] c" != \00", align 1 @.str.5 = private unnamed_addr constant [2 x i8] c"\0A\00", align 1 @AVERROR_INVALIDDATA = dso_local local_unnamed_addr global i32 0, align 4 @ENOMEM = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @verify_md5], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @verify_md5(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 { %3 = alloca [16 x i32], align 16 %4 = getelementptr inbounds %struct.TYPE_20__, ptr %1, i64 0, i32 2 %5 = load i32, ptr %4, align 8, !tbaa !5 %6 = tail call ptr @av_pix_fmt_desc_get(i32 noundef %5) #3 %7 = icmp eq ptr %6, null br i1 %7, label %8, label %11 8: ; preds = %2 %9 = load i32, ptr @EINVAL, align 4, !tbaa !11 %10 = tail call i32 @AVERROR(i32 noundef %9) #3 br label %116 11: ; preds = %2 %12 = getelementptr inbounds %struct.TYPE_19__, ptr %6, i64 0, i32 2 %13 = load ptr, ptr %12, align 8, !tbaa !12 %14 = load i32, ptr %13, align 4, !tbaa !14 %15 = icmp sgt i32 %14, 8 %16 = zext i1 %15 to i32 %17 = load ptr, ptr %0, align 8, !tbaa !16 %18 = load i32, ptr @AV_LOG_DEBUG, align 4, !tbaa !11 %19 = getelementptr inbounds %struct.TYPE_18__, ptr %0, i64 0, i32 6 %20 = load i32, ptr %19, align 4, !tbaa !21 %21 = tail call i32 (ptr, i32, ptr, ...) @av_log(ptr noundef %17, i32 noundef %18, ptr noundef nonnull @.str, i32 noundef %20) #3 %22 = getelementptr inbounds %struct.TYPE_20__, ptr %1, i64 0, i32 1 %23 = load ptr, ptr %22, align 8, !tbaa !22 %24 = load ptr, ptr %23, align 8, !tbaa !23 %25 = icmp eq ptr %24, null br i1 %25, label %112, label %26 26: ; preds = %11 %27 = getelementptr inbounds %struct.TYPE_19__, ptr %6, i64 0, i32 1 %28 = getelementptr inbounds %struct.TYPE_18__, ptr %0, i64 0, i32 2 %29 = getelementptr inbounds %struct.TYPE_18__, ptr %0, i64 0, i32 1 br label %30 30: ; preds = %26, %96 %31 = phi i64 [ 0, %26 ], [ %107, %96 ] %32 = load ptr, ptr %0, align 8, !tbaa !16 %33 = load i32, ptr %32, align 4, !tbaa !24 %34 = getelementptr inbounds %struct.TYPE_13__, ptr %32, i64 0, i32 1 %35 = load i32, ptr %34, align 4, !tbaa !26 %36 = trunc i64 %31 to i32 %37 = add i32 %36, -1 %38 = icmp ult i32 %37, 2 br i1 %38, label %39, label %44 39: ; preds = %30 %40 = load i32, ptr %6, align 8, !tbaa !27 %41 = ashr i32 %33, %40 %42 = load i32, ptr %27, align 4, !tbaa !28 %43 = ashr i32 %35, %42 br label %44 44: ; preds = %30, %39 %45 = phi i32 [ %41, %39 ], [ %33, %30 ] %46 = phi i32 [ %43, %39 ], [ %35, %30 ] call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %3) #3 %47 = load i32, ptr %28, align 8, !tbaa !29 %48 = call i32 @av_md5_init(i32 noundef %47) #3 %49 = icmp sgt i32 %46, 0 br i1 %49, label %50, label %67 50: ; preds = %44 %51 = shl i32 %45, %16 br label %52 52: ; preds = %50, %52 %53 = phi i32 [ 0, %50 ], [ %65, %52 ] %54 = load ptr, ptr %22, align 8, !tbaa !22 %55 = getelementptr inbounds ptr, ptr %54, i64 %31 %56 = load ptr, ptr %55, align 8, !tbaa !23 %57 = load ptr, ptr %1, align 8, !tbaa !30 %58 = getelementptr inbounds i32, ptr %57, i64 %31 %59 = load i32, ptr %58, align 4, !tbaa !11 %60 = mul nsw i32 %59, %53 %61 = sext i32 %60 to i64 %62 = getelementptr inbounds i32, ptr %56, i64 %61 %63 = load i32, ptr %28, align 8, !tbaa !29 %64 = call i32 @av_md5_update(i32 noundef %63, ptr noundef %62, i32 noundef %51) #3 %65 = add nuw nsw i32 %53, 1 %66 = icmp eq i32 %65, %46 br i1 %66, label %67, label %52, !llvm.loop !31 67: ; preds = %52, %44 %68 = load i32, ptr %28, align 8, !tbaa !29 %69 = call i32 @av_md5_final(i32 noundef %68, ptr noundef nonnull %3) #3 %70 = load ptr, ptr %29, align 8, !tbaa !33 %71 = getelementptr inbounds ptr, ptr %70, i64 %31 %72 = load ptr, ptr %71, align 8, !tbaa !23 %73 = call i32 @memcmp(ptr noundef nonnull %3, ptr noundef %72, i32 noundef 16) #3 %74 = icmp eq i32 %73, 0 br i1 %74, label %96, label %75 75: ; preds = %67 %76 = trunc i64 %31 to i32 %77 = load ptr, ptr %0, align 8, !tbaa !16 %78 = load i32, ptr @AV_LOG_ERROR, align 4, !tbaa !11 %79 = call i32 (ptr, i32, ptr, ...) @av_log(ptr noundef %77, i32 noundef %78, ptr noundef nonnull @.str.3, i32 noundef %76) #3 %80 = load ptr, ptr %0, align 8, !tbaa !16 %81 = load i32, ptr @AV_LOG_ERROR, align 4, !tbaa !11 %82 = call i32 @print_md5(ptr noundef %80, i32 noundef %81, ptr noundef nonnull %3) #3 %83 = load ptr, ptr %0, align 8, !tbaa !16 %84 = load i32, ptr @AV_LOG_ERROR, align 4, !tbaa !11 %85 = call i32 (ptr, i32, ptr, ...) @av_log(ptr noundef %83, i32 noundef %84, ptr noundef nonnull @.str.4) #3 %86 = load ptr, ptr %0, align 8, !tbaa !16 %87 = load i32, ptr @AV_LOG_ERROR, align 4, !tbaa !11 %88 = load ptr, ptr %29, align 8, !tbaa !33 %89 = getelementptr inbounds ptr, ptr %88, i64 %31 %90 = load ptr, ptr %89, align 8, !tbaa !23 %91 = call i32 @print_md5(ptr noundef %86, i32 noundef %87, ptr noundef %90) #3 %92 = load ptr, ptr %0, align 8, !tbaa !16 %93 = load i32, ptr @AV_LOG_ERROR, align 4, !tbaa !11 %94 = call i32 (ptr, i32, ptr, ...) @av_log(ptr noundef %92, i32 noundef %93, ptr noundef nonnull @.str.5) #3 %95 = load i32, ptr @AVERROR_INVALIDDATA, align 4, !tbaa !11 call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %3) #3 br label %116 96: ; preds = %67 %97 = load ptr, ptr %0, align 8, !tbaa !16 %98 = load i32, ptr @AV_LOG_DEBUG, align 4, !tbaa !11 %99 = trunc i64 %31 to i32 %100 = call i32 (ptr, i32, ptr, ...) @av_log(ptr noundef %97, i32 noundef %98, ptr noundef nonnull @.str.1, i32 noundef %99) #3 %101 = load ptr, ptr %0, align 8, !tbaa !16 %102 = load i32, ptr @AV_LOG_DEBUG, align 4, !tbaa !11 %103 = call i32 @print_md5(ptr noundef %101, i32 noundef %102, ptr noundef nonnull %3) #3 %104 = load ptr, ptr %0, align 8, !tbaa !16 %105 = load i32, ptr @AV_LOG_DEBUG, align 4, !tbaa !11 %106 = call i32 (ptr, i32, ptr, ...) @av_log(ptr noundef %104, i32 noundef %105, ptr noundef nonnull @.str.2) #3 call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %3) #3 %107 = add nuw i64 %31, 1 %108 = load ptr, ptr %22, align 8, !tbaa !22 %109 = getelementptr inbounds ptr, ptr %108, i64 %107 %110 = load ptr, ptr %109, align 8, !tbaa !23 %111 = icmp eq ptr %110, null br i1 %111, label %112, label %30, !llvm.loop !34 112: ; preds = %96, %11 %113 = load ptr, ptr %0, align 8, !tbaa !16 %114 = load i32, ptr @AV_LOG_DEBUG, align 4, !tbaa !11 %115 = call i32 (ptr, i32, ptr, ...) @av_log(ptr noundef %113, i32 noundef %114, ptr noundef nonnull @.str.5) #3 br label %116 116: ; preds = %75, %112, %8 %117 = phi i32 [ %95, %75 ], [ 0, %112 ], [ %10, %8 ] ret i32 %117 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @av_pix_fmt_desc_get(i32 noundef) local_unnamed_addr #2 declare i32 @AVERROR(i32 noundef) local_unnamed_addr #2 declare i32 @av_log(ptr noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #2 declare i32 @av_md5_init(i32 noundef) local_unnamed_addr #2 declare i32 @av_md5_update(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 declare i32 @av_md5_final(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @memcmp(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @print_md5(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 16} !6 = !{!"TYPE_20__", !7, i64 0, !7, i64 8, !10, i64 16} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"int", !8, i64 0} !11 = !{!10, !10, i64 0} !12 = !{!13, !7, i64 8} !13 = !{!"TYPE_19__", !10, i64 0, !10, i64 4, !7, i64 8} !14 = !{!15, !10, i64 0} !15 = !{!"TYPE_14__", !10, i64 0} !16 = !{!17, !7, i64 0} !17 = !{!"TYPE_18__", !7, i64 0, !18, i64 8, !10, i64 16, !7, i64 24, !20, i64 32, !10, i64 40, !10, i64 44} !18 = !{!"TYPE_17__", !19, i64 0} !19 = !{!"TYPE_16__", !7, i64 0} !20 = !{!"TYPE_15__", !7, i64 0} !21 = !{!17, !10, i64 44} !22 = !{!6, !7, i64 8} !23 = !{!7, !7, i64 0} !24 = !{!25, !10, i64 0} !25 = !{!"TYPE_13__", !10, i64 0, !10, i64 4} !26 = !{!25, !10, i64 4} !27 = !{!13, !10, i64 0} !28 = !{!13, !10, i64 4} !29 = !{!17, !10, i64 16} !30 = !{!6, !7, i64 0} !31 = distinct !{!31, !32} !32 = !{!"llvm.loop.mustprogress"} !33 = !{!17, !7, i64 8} !34 = distinct !{!34, !32}
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_hevcdec.c_verify_md5.c' source_filename = "AnghaBench/FFmpeg/libavcodec/extr_hevcdec.c_verify_md5.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @EINVAL = common local_unnamed_addr global i32 0, align 4 @AV_LOG_DEBUG = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [43 x i8] c"Verifying checksum for frame with POC %d: \00", align 1 @.str.1 = private unnamed_addr constant [20 x i8] c"plane %d - correct \00", align 1 @.str.2 = private unnamed_addr constant [3 x i8] c"; \00", align 1 @AV_LOG_ERROR = common local_unnamed_addr global i32 0, align 4 @.str.3 = private unnamed_addr constant [36 x i8] c"mismatching checksum of plane %d - \00", align 1 @.str.4 = private unnamed_addr constant [5 x i8] c" != \00", align 1 @.str.5 = private unnamed_addr constant [2 x i8] c"\0A\00", align 1 @AVERROR_INVALIDDATA = common local_unnamed_addr global i32 0, align 4 @ENOMEM = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @verify_md5], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @verify_md5(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 { %3 = alloca [16 x i32], align 4 %4 = getelementptr inbounds i8, ptr %1, i64 16 %5 = load i32, ptr %4, align 8, !tbaa !6 %6 = tail call ptr @av_pix_fmt_desc_get(i32 noundef %5) #3 %7 = icmp eq ptr %6, null br i1 %7, label %8, label %11 8: ; preds = %2 %9 = load i32, ptr @EINVAL, align 4, !tbaa !12 %10 = tail call i32 @AVERROR(i32 noundef %9) #3 br label %113 11: ; preds = %2 %12 = getelementptr inbounds i8, ptr %6, i64 8 %13 = load ptr, ptr %12, align 8, !tbaa !13 %14 = load i32, ptr %13, align 4, !tbaa !15 %15 = icmp sgt i32 %14, 8 %16 = zext i1 %15 to i32 %17 = load ptr, ptr %0, align 8, !tbaa !17 %18 = load i32, ptr @AV_LOG_DEBUG, align 4, !tbaa !12 %19 = getelementptr inbounds i8, ptr %0, i64 44 %20 = load i32, ptr %19, align 4, !tbaa !22 %21 = tail call i32 (ptr, i32, ptr, ...) @av_log(ptr noundef %17, i32 noundef %18, ptr noundef nonnull @.str, i32 noundef %20) #3 %22 = getelementptr inbounds i8, ptr %1, i64 8 %23 = load ptr, ptr %22, align 8, !tbaa !23 %24 = load ptr, ptr %23, align 8, !tbaa !24 %25 = icmp eq ptr %24, null br i1 %25, label %109, label %26 26: ; preds = %11 %27 = getelementptr inbounds i8, ptr %6, i64 4 %28 = getelementptr inbounds i8, ptr %0, i64 16 %29 = getelementptr inbounds i8, ptr %0, i64 8 br label %30 30: ; preds = %26, %95 %31 = phi i64 [ 0, %26 ], [ %104, %95 ] %32 = load ptr, ptr %0, align 8, !tbaa !17 %33 = load i32, ptr %32, align 4, !tbaa !25 %34 = getelementptr inbounds i8, ptr %32, i64 4 %35 = load i32, ptr %34, align 4, !tbaa !27 %36 = trunc i64 %31 to i32 %37 = add i32 %36, -1 %38 = icmp ult i32 %37, 2 br i1 %38, label %39, label %44 39: ; preds = %30 %40 = load i32, ptr %6, align 8, !tbaa !28 %41 = ashr i32 %33, %40 %42 = load i32, ptr %27, align 4, !tbaa !29 %43 = ashr i32 %35, %42 br label %44 44: ; preds = %30, %39 %45 = phi i32 [ %41, %39 ], [ %33, %30 ] %46 = phi i32 [ %43, %39 ], [ %35, %30 ] call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %3) #3 %47 = load i32, ptr %28, align 8, !tbaa !30 %48 = call i32 @av_md5_init(i32 noundef %47) #3 %49 = icmp sgt i32 %46, 0 br i1 %49, label %50, label %67 50: ; preds = %44 %51 = shl i32 %45, %16 br label %52 52: ; preds = %50, %52 %53 = phi i32 [ 0, %50 ], [ %65, %52 ] %54 = load ptr, ptr %22, align 8, !tbaa !23 %55 = getelementptr inbounds ptr, ptr %54, i64 %31 %56 = load ptr, ptr %55, align 8, !tbaa !24 %57 = load ptr, ptr %1, align 8, !tbaa !31 %58 = getelementptr inbounds i32, ptr %57, i64 %31 %59 = load i32, ptr %58, align 4, !tbaa !12 %60 = mul nsw i32 %59, %53 %61 = sext i32 %60 to i64 %62 = getelementptr inbounds i32, ptr %56, i64 %61 %63 = load i32, ptr %28, align 8, !tbaa !30 %64 = call i32 @av_md5_update(i32 noundef %63, ptr noundef %62, i32 noundef %51) #3 %65 = add nuw nsw i32 %53, 1 %66 = icmp eq i32 %65, %46 br i1 %66, label %67, label %52, !llvm.loop !32 67: ; preds = %52, %44 %68 = load i32, ptr %28, align 8, !tbaa !30 %69 = call i32 @av_md5_final(i32 noundef %68, ptr noundef nonnull %3) #3 %70 = load ptr, ptr %29, align 8, !tbaa !34 %71 = getelementptr inbounds ptr, ptr %70, i64 %31 %72 = load ptr, ptr %71, align 8, !tbaa !24 %73 = call i32 @memcmp(ptr noundef nonnull %3, ptr noundef %72, i32 noundef 16) #3 %74 = icmp eq i32 %73, 0 %75 = load ptr, ptr %0, align 8, !tbaa !17 br i1 %74, label %95, label %76 76: ; preds = %67 %77 = load i32, ptr @AV_LOG_ERROR, align 4, !tbaa !12 %78 = call i32 (ptr, i32, ptr, ...) @av_log(ptr noundef %75, i32 noundef %77, ptr noundef nonnull @.str.3, i32 noundef %36) #3 %79 = load ptr, ptr %0, align 8, !tbaa !17 %80 = load i32, ptr @AV_LOG_ERROR, align 4, !tbaa !12 %81 = call i32 @print_md5(ptr noundef %79, i32 noundef %80, ptr noundef nonnull %3) #3 %82 = load ptr, ptr %0, align 8, !tbaa !17 %83 = load i32, ptr @AV_LOG_ERROR, align 4, !tbaa !12 %84 = call i32 (ptr, i32, ptr, ...) @av_log(ptr noundef %82, i32 noundef %83, ptr noundef nonnull @.str.4) #3 %85 = load ptr, ptr %0, align 8, !tbaa !17 %86 = load i32, ptr @AV_LOG_ERROR, align 4, !tbaa !12 %87 = load ptr, ptr %29, align 8, !tbaa !34 %88 = getelementptr inbounds ptr, ptr %87, i64 %31 %89 = load ptr, ptr %88, align 8, !tbaa !24 %90 = call i32 @print_md5(ptr noundef %85, i32 noundef %86, ptr noundef %89) #3 %91 = load ptr, ptr %0, align 8, !tbaa !17 %92 = load i32, ptr @AV_LOG_ERROR, align 4, !tbaa !12 %93 = call i32 (ptr, i32, ptr, ...) @av_log(ptr noundef %91, i32 noundef %92, ptr noundef nonnull @.str.5) #3 %94 = load i32, ptr @AVERROR_INVALIDDATA, align 4, !tbaa !12 call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %3) #3 br label %113 95: ; preds = %67 %96 = load i32, ptr @AV_LOG_DEBUG, align 4, !tbaa !12 %97 = call i32 (ptr, i32, ptr, ...) @av_log(ptr noundef %75, i32 noundef %96, ptr noundef nonnull @.str.1, i32 noundef %36) #3 %98 = load ptr, ptr %0, align 8, !tbaa !17 %99 = load i32, ptr @AV_LOG_DEBUG, align 4, !tbaa !12 %100 = call i32 @print_md5(ptr noundef %98, i32 noundef %99, ptr noundef nonnull %3) #3 %101 = load ptr, ptr %0, align 8, !tbaa !17 %102 = load i32, ptr @AV_LOG_DEBUG, align 4, !tbaa !12 %103 = call i32 (ptr, i32, ptr, ...) @av_log(ptr noundef %101, i32 noundef %102, ptr noundef nonnull @.str.2) #3 call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %3) #3 %104 = add nuw nsw i64 %31, 1 %105 = load ptr, ptr %22, align 8, !tbaa !23 %106 = getelementptr inbounds ptr, ptr %105, i64 %104 %107 = load ptr, ptr %106, align 8, !tbaa !24 %108 = icmp eq ptr %107, null br i1 %108, label %109, label %30, !llvm.loop !35 109: ; preds = %95, %11 %110 = load ptr, ptr %0, align 8, !tbaa !17 %111 = load i32, ptr @AV_LOG_DEBUG, align 4, !tbaa !12 %112 = call i32 (ptr, i32, ptr, ...) @av_log(ptr noundef %110, i32 noundef %111, ptr noundef nonnull @.str.5) #3 br label %113 113: ; preds = %76, %109, %8 %114 = phi i32 [ %94, %76 ], [ 0, %109 ], [ %10, %8 ] ret i32 %114 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @av_pix_fmt_desc_get(i32 noundef) local_unnamed_addr #2 declare i32 @AVERROR(i32 noundef) local_unnamed_addr #2 declare i32 @av_log(ptr noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #2 declare i32 @av_md5_init(i32 noundef) local_unnamed_addr #2 declare i32 @av_md5_update(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 declare i32 @av_md5_final(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @memcmp(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @print_md5(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 16} !7 = !{!"TYPE_20__", !8, i64 0, !8, i64 8, !11, i64 16} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"int", !9, i64 0} !12 = !{!11, !11, i64 0} !13 = !{!14, !8, i64 8} !14 = !{!"TYPE_19__", !11, i64 0, !11, i64 4, !8, i64 8} !15 = !{!16, !11, i64 0} !16 = !{!"TYPE_14__", !11, i64 0} !17 = !{!18, !8, i64 0} !18 = !{!"TYPE_18__", !8, i64 0, !19, i64 8, !11, i64 16, !8, i64 24, !21, i64 32, !11, i64 40, !11, i64 44} !19 = !{!"TYPE_17__", !20, i64 0} !20 = !{!"TYPE_16__", !8, i64 0} !21 = !{!"TYPE_15__", !8, i64 0} !22 = !{!18, !11, i64 44} !23 = !{!7, !8, i64 8} !24 = !{!8, !8, i64 0} !25 = !{!26, !11, i64 0} !26 = !{!"TYPE_13__", !11, i64 0, !11, i64 4} !27 = !{!26, !11, i64 4} !28 = !{!14, !11, i64 0} !29 = !{!14, !11, i64 4} !30 = !{!18, !11, i64 16} !31 = !{!7, !8, i64 0} !32 = distinct !{!32, !33} !33 = !{!"llvm.loop.mustprogress"} !34 = !{!18, !8, i64 8} !35 = distinct !{!35, !33}
FFmpeg_libavcodec_extr_hevcdec.c_verify_md5
; ModuleID = 'AnghaBench/linux/drivers/spi/extr_spi-imx.c_mx31_trigger.c' source_filename = "AnghaBench/linux/drivers/spi/extr_spi-imx.c_mx31_trigger.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @MXC_CSPICTRL = dso_local local_unnamed_addr global i64 0, align 8 @MX31_CSPICTRL_XCH = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @mx31_trigger], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @mx31_trigger(ptr nocapture noundef readonly %0) #0 { %2 = load i64, ptr %0, align 8, !tbaa !5 %3 = load i64, ptr @MXC_CSPICTRL, align 8, !tbaa !10 %4 = add nsw i64 %3, %2 %5 = tail call i32 @readl(i64 noundef %4) #2 %6 = load i32, ptr @MX31_CSPICTRL_XCH, align 4, !tbaa !11 %7 = or i32 %6, %5 %8 = load i64, ptr %0, align 8, !tbaa !5 %9 = load i64, ptr @MXC_CSPICTRL, align 8, !tbaa !10 %10 = add nsw i64 %9, %8 %11 = tail call i32 @writel(i32 noundef %7, i64 noundef %10) #2 ret void } declare i32 @readl(i64 noundef) local_unnamed_addr #1 declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"spi_imx_data", !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!7, !7, i64 0} !11 = !{!12, !12, i64 0} !12 = !{!"int", !8, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/spi/extr_spi-imx.c_mx31_trigger.c' source_filename = "AnghaBench/linux/drivers/spi/extr_spi-imx.c_mx31_trigger.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @MXC_CSPICTRL = common local_unnamed_addr global i64 0, align 8 @MX31_CSPICTRL_XCH = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @mx31_trigger], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @mx31_trigger(ptr nocapture noundef readonly %0) #0 { %2 = load i64, ptr %0, align 8, !tbaa !6 %3 = load i64, ptr @MXC_CSPICTRL, align 8, !tbaa !11 %4 = add nsw i64 %3, %2 %5 = tail call i32 @readl(i64 noundef %4) #2 %6 = load i32, ptr @MX31_CSPICTRL_XCH, align 4, !tbaa !12 %7 = or i32 %6, %5 %8 = load i64, ptr %0, align 8, !tbaa !6 %9 = load i64, ptr @MXC_CSPICTRL, align 8, !tbaa !11 %10 = add nsw i64 %9, %8 %11 = tail call i32 @writel(i32 noundef %7, i64 noundef %10) #2 ret void } declare i32 @readl(i64 noundef) local_unnamed_addr #1 declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"spi_imx_data", !8, i64 0} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!8, !8, i64 0} !12 = !{!13, !13, i64 0} !13 = !{!"int", !9, i64 0}
linux_drivers_spi_extr_spi-imx.c_mx31_trigger
; ModuleID = 'AnghaBench/kphp-kdb/antispam/extr_antispam-engine-impl.c_antispam_engine_common_init_part.c' source_filename = "AnghaBench/kphp-kdb/antispam/extr_antispam-engine-impl.c_antispam_engine_common_init_part.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_11__ = type { i32, i32 } %struct.TYPE_12__ = type { ptr, i32 } @binlogname = dso_local local_unnamed_addr global ptr null, align 8 @stderr = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [62 x i8] c"fatal: cannot preload files for binlog: '%s' and index: '%s'\0A\00", align 1 @engine_snapshot_replica = dso_local local_unnamed_addr global i32 0, align 4 @Snapshot = dso_local local_unnamed_addr global ptr null, align 8 @engine_snapshot_name = dso_local local_unnamed_addr global ptr null, align 8 @engine_snapshot_size = dso_local local_unnamed_addr global i32 0, align 4 @verbosity = dso_local local_unnamed_addr global i64 0, align 8 @.str.1 = private unnamed_addr constant [32 x i8] c"load index file %s (size %lld)\0A\00", align 1 @engine_replica = dso_local local_unnamed_addr global ptr null, align 8 @jump_log_pos = dso_local local_unnamed_addr global i64 0, align 8 @Binlog = dso_local local_unnamed_addr global ptr null, align 8 @.str.2 = private unnamed_addr constant [53 x i8] c"fatal: cannot find binlog for %s, log position %lld\0A\00", align 1 @.str.3 = private unnamed_addr constant [38 x i8] c"replaying binlog file %s (size %lld)\0A\00", align 1 @CLOCK_MONOTONIC = dso_local local_unnamed_addr global i32 0, align 4 @binlog_load_time = dso_local local_unnamed_addr global i64 0, align 8 @jump_log_ts = dso_local local_unnamed_addr global i32 0, align 4 @jump_log_crc32 = dso_local local_unnamed_addr global i32 0, align 4 @.str.4 = private unnamed_addr constant [47 x i8] c"jump_log_pos = %lld\0Areplay log events started\0A\00", align 1 @binlog_disabled = dso_local local_unnamed_addr global i32 0, align 4 @.str.5 = private unnamed_addr constant [29 x i8] c"fatal: error reading binlog\0A\00", align 1 @.str.6 = private unnamed_addr constant [28 x i8] c"replay log events finished\0A\00", align 1 @log_readto_pos = dso_local local_unnamed_addr global i64 0, align 8 @binlog_loaded_size = dso_local local_unnamed_addr global i64 0, align 8 @.str.7 = private unnamed_addr constant [73 x i8] c"replay binlog file: done, log_pos=%lld, used_z_memory=%ld, time %.06lfs\0A\00", align 1 @log_pos = dso_local local_unnamed_addr global i64 0, align 8 @start_time = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local void @antispam_engine_common_init_part(ptr noundef %0) local_unnamed_addr #0 { %2 = load ptr, ptr @binlogname, align 8, !tbaa !5 %3 = tail call i64 @engine_preload_filelist(ptr noundef %0, ptr noundef %2) #3 %4 = icmp slt i64 %3, 0 br i1 %4, label %5, label %10 5: ; preds = %1 %6 = load i32, ptr @stderr, align 4, !tbaa !9 %7 = load ptr, ptr @binlogname, align 8, !tbaa !5 %8 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %6, ptr noundef nonnull @.str, ptr noundef %7, ptr noundef %0) #3 %9 = tail call i32 @exit(i32 noundef 1) #4 unreachable 10: ; preds = %1 %11 = load i32, ptr @engine_snapshot_replica, align 4, !tbaa !9 %12 = tail call ptr @open_recent_snapshot(i32 noundef %11) #3 store ptr %12, ptr @Snapshot, align 8, !tbaa !5 %13 = icmp eq ptr %12, null br i1 %13, label %28, label %14 14: ; preds = %10 %15 = load ptr, ptr %12, align 8, !tbaa !11 %16 = getelementptr inbounds %struct.TYPE_11__, ptr %15, i64 0, i32 1 %17 = load i32, ptr %16, align 4, !tbaa !13 %18 = tail call ptr @strdup(i32 noundef %17) #3 store ptr %18, ptr @engine_snapshot_name, align 8, !tbaa !5 %19 = load ptr, ptr @Snapshot, align 8, !tbaa !5 %20 = load ptr, ptr %19, align 8, !tbaa !11 %21 = load i32, ptr %20, align 4, !tbaa !15 store i32 %21, ptr @engine_snapshot_size, align 4, !tbaa !9 %22 = load i64, ptr @verbosity, align 8, !tbaa !16 %23 = icmp sgt i64 %22, 0 br i1 %23, label %24, label %29 24: ; preds = %14 %25 = load i32, ptr @stderr, align 4, !tbaa !9 %26 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %25, ptr noundef nonnull @.str.1, ptr noundef %18, i32 noundef %21) #3 %27 = load ptr, ptr @Snapshot, align 8, !tbaa !5 br label %29 28: ; preds = %10 store ptr null, ptr @engine_snapshot_name, align 8, !tbaa !5 store i32 0, ptr @engine_snapshot_size, align 4, !tbaa !9 br label %29 29: ; preds = %14, %24, %28 %30 = phi ptr [ %19, %14 ], [ %27, %24 ], [ null, %28 ] %31 = tail call i32 @init_all(ptr noundef %30) #3 %32 = load ptr, ptr @Snapshot, align 8, !tbaa !5 %33 = tail call i32 @close_snapshot(ptr noundef %32, i32 noundef 1) #3 %34 = load ptr, ptr @engine_replica, align 8, !tbaa !5 %35 = load i64, ptr @jump_log_pos, align 8, !tbaa !16 %36 = tail call ptr @open_binlog(ptr noundef %34, i64 noundef %35) #3 store ptr %36, ptr @Binlog, align 8, !tbaa !5 %37 = icmp eq ptr %36, null br i1 %37, label %38, label %44 38: ; preds = %29 %39 = load i32, ptr @stderr, align 4, !tbaa !9 %40 = load ptr, ptr @engine_replica, align 8, !tbaa !5 %41 = load ptr, ptr %40, align 8, !tbaa !18 %42 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %39, ptr noundef nonnull @.str.2, ptr noundef %41, i64 noundef 0) #3 %43 = tail call i32 @exit(i32 noundef 1) #4 unreachable 44: ; preds = %29 %45 = load ptr, ptr %36, align 8, !tbaa !20 %46 = load ptr, ptr %45, align 8, !tbaa !22 store ptr %46, ptr @binlogname, align 8, !tbaa !5 %47 = load i64, ptr @verbosity, align 8, !tbaa !16 %48 = icmp sgt i64 %47, 0 br i1 %48, label %49, label %55 49: ; preds = %44 %50 = load i32, ptr @stderr, align 4, !tbaa !9 %51 = load ptr, ptr %36, align 8, !tbaa !20 %52 = getelementptr inbounds %struct.TYPE_12__, ptr %51, i64 0, i32 1 %53 = load i32, ptr %52, align 8, !tbaa !24 %54 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %50, ptr noundef nonnull @.str.3, ptr noundef %46, i32 noundef %53) #3 br label %55 55: ; preds = %49, %44 %56 = load i32, ptr @CLOCK_MONOTONIC, align 4, !tbaa !9 %57 = tail call i64 @get_utime(i32 noundef %56) #3 store i64 %57, ptr @binlog_load_time, align 8, !tbaa !16 %58 = tail call i32 (...) @clear_log() #3 %59 = load i64, ptr @jump_log_pos, align 8, !tbaa !16 %60 = load i32, ptr @jump_log_ts, align 4, !tbaa !9 %61 = load i32, ptr @jump_log_crc32, align 4, !tbaa !9 %62 = tail call i32 @init_log_data(i64 noundef %59, i32 noundef %60, i32 noundef %61) #3 %63 = load i64, ptr @verbosity, align 8, !tbaa !16 %64 = icmp sgt i64 %63, 0 br i1 %64, label %65, label %69 65: ; preds = %55 %66 = load i32, ptr @stderr, align 4, !tbaa !9 %67 = load i64, ptr @jump_log_pos, align 8, !tbaa !16 %68 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %66, ptr noundef nonnull @.str.4, i64 noundef %67) #3 br label %69 69: ; preds = %65, %55 %70 = tail call i32 @replay_log(i32 noundef 0, i32 noundef 1) #3 %71 = load i32, ptr @binlog_disabled, align 4, !tbaa !9 %72 = icmp eq i32 %71, 1 br i1 %72, label %75, label %73 73: ; preds = %69 %74 = tail call i32 (...) @clear_read_log() #3 br label %75 75: ; preds = %73, %69 %76 = icmp slt i32 %70, 0 br i1 %76, label %77, label %81 77: ; preds = %75 %78 = load i32, ptr @stderr, align 4, !tbaa !9 %79 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %78, ptr noundef nonnull @.str.5) #3 %80 = tail call i32 @exit(i32 noundef 1) #4 unreachable 81: ; preds = %75 %82 = load i64, ptr @verbosity, align 8, !tbaa !16 %83 = icmp sgt i64 %82, 0 br i1 %83, label %84, label %87 84: ; preds = %81 %85 = load i32, ptr @stderr, align 4, !tbaa !9 %86 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %85, ptr noundef nonnull @.str.6) #3 br label %87 87: ; preds = %84, %81 %88 = load i32, ptr @CLOCK_MONOTONIC, align 4, !tbaa !9 %89 = tail call i64 @get_utime(i32 noundef %88) #3 %90 = load i64, ptr @binlog_load_time, align 8, !tbaa !16 %91 = sub nsw i64 %89, %90 store i64 %91, ptr @binlog_load_time, align 8, !tbaa !16 %92 = load i64, ptr @log_readto_pos, align 8, !tbaa !16 %93 = load i64, ptr @jump_log_pos, align 8, !tbaa !16 %94 = sub nsw i64 %92, %93 store i64 %94, ptr @binlog_loaded_size, align 8, !tbaa !16 %95 = load i64, ptr @verbosity, align 8, !tbaa !16 %96 = icmp sgt i64 %95, 0 br i1 %96, label %97, label %103 97: ; preds = %87 %98 = load i32, ptr @stderr, align 4, !tbaa !9 %99 = load i64, ptr @log_pos, align 8, !tbaa !16 %100 = tail call i32 (...) @dyn_used_memory() #3 %101 = load i64, ptr @binlog_load_time, align 8, !tbaa !16 %102 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %98, ptr noundef nonnull @.str.7, i64 noundef %99, i32 noundef %100, i64 noundef %101) #3 br label %103 103: ; preds = %97, %87 %104 = tail call i32 (...) @clear_write_log() #3 %105 = tail call i32 @time(i32 noundef 0) #3 store i32 %105, ptr @start_time, align 4, !tbaa !9 ret void } declare i64 @engine_preload_filelist(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @fprintf(i32 noundef, ptr noundef, ...) local_unnamed_addr #1 ; Function Attrs: noreturn declare i32 @exit(i32 noundef) local_unnamed_addr #2 declare ptr @open_recent_snapshot(i32 noundef) local_unnamed_addr #1 declare ptr @strdup(i32 noundef) local_unnamed_addr #1 declare i32 @init_all(ptr noundef) local_unnamed_addr #1 declare i32 @close_snapshot(ptr noundef, i32 noundef) local_unnamed_addr #1 declare ptr @open_binlog(ptr noundef, i64 noundef) local_unnamed_addr #1 declare i64 @get_utime(i32 noundef) local_unnamed_addr #1 declare i32 @clear_log(...) local_unnamed_addr #1 declare i32 @init_log_data(i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @replay_log(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @clear_read_log(...) local_unnamed_addr #1 declare i32 @dyn_used_memory(...) local_unnamed_addr #1 declare i32 @clear_write_log(...) local_unnamed_addr #1 declare i32 @time(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } attributes #4 = { noreturn nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"int", !7, i64 0} !11 = !{!12, !6, i64 0} !12 = !{!"TYPE_13__", !6, i64 0} !13 = !{!14, !10, i64 4} !14 = !{!"TYPE_11__", !10, i64 0, !10, i64 4} !15 = !{!14, !10, i64 0} !16 = !{!17, !17, i64 0} !17 = !{!"long", !7, i64 0} !18 = !{!19, !6, i64 0} !19 = !{!"TYPE_15__", !6, i64 0} !20 = !{!21, !6, i64 0} !21 = !{!"TYPE_14__", !6, i64 0} !22 = !{!23, !6, i64 0} !23 = !{!"TYPE_12__", !6, i64 0, !10, i64 8} !24 = !{!23, !10, i64 8}
; ModuleID = 'AnghaBench/kphp-kdb/antispam/extr_antispam-engine-impl.c_antispam_engine_common_init_part.c' source_filename = "AnghaBench/kphp-kdb/antispam/extr_antispam-engine-impl.c_antispam_engine_common_init_part.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @binlogname = common local_unnamed_addr global ptr null, align 8 @stderr = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [62 x i8] c"fatal: cannot preload files for binlog: '%s' and index: '%s'\0A\00", align 1 @engine_snapshot_replica = common local_unnamed_addr global i32 0, align 4 @Snapshot = common local_unnamed_addr global ptr null, align 8 @engine_snapshot_name = common local_unnamed_addr global ptr null, align 8 @engine_snapshot_size = common local_unnamed_addr global i32 0, align 4 @verbosity = common local_unnamed_addr global i64 0, align 8 @.str.1 = private unnamed_addr constant [32 x i8] c"load index file %s (size %lld)\0A\00", align 1 @engine_replica = common local_unnamed_addr global ptr null, align 8 @jump_log_pos = common local_unnamed_addr global i64 0, align 8 @Binlog = common local_unnamed_addr global ptr null, align 8 @.str.2 = private unnamed_addr constant [53 x i8] c"fatal: cannot find binlog for %s, log position %lld\0A\00", align 1 @.str.3 = private unnamed_addr constant [38 x i8] c"replaying binlog file %s (size %lld)\0A\00", align 1 @CLOCK_MONOTONIC = common local_unnamed_addr global i32 0, align 4 @binlog_load_time = common local_unnamed_addr global i64 0, align 8 @jump_log_ts = common local_unnamed_addr global i32 0, align 4 @jump_log_crc32 = common local_unnamed_addr global i32 0, align 4 @.str.4 = private unnamed_addr constant [47 x i8] c"jump_log_pos = %lld\0Areplay log events started\0A\00", align 1 @binlog_disabled = common local_unnamed_addr global i32 0, align 4 @.str.5 = private unnamed_addr constant [29 x i8] c"fatal: error reading binlog\0A\00", align 1 @.str.6 = private unnamed_addr constant [28 x i8] c"replay log events finished\0A\00", align 1 @log_readto_pos = common local_unnamed_addr global i64 0, align 8 @binlog_loaded_size = common local_unnamed_addr global i64 0, align 8 @.str.7 = private unnamed_addr constant [73 x i8] c"replay binlog file: done, log_pos=%lld, used_z_memory=%ld, time %.06lfs\0A\00", align 1 @log_pos = common local_unnamed_addr global i64 0, align 8 @start_time = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define void @antispam_engine_common_init_part(ptr noundef %0) local_unnamed_addr #0 { %2 = load ptr, ptr @binlogname, align 8, !tbaa !6 %3 = tail call i64 @engine_preload_filelist(ptr noundef %0, ptr noundef %2) #3 %4 = icmp slt i64 %3, 0 br i1 %4, label %5, label %10 5: ; preds = %1 %6 = load i32, ptr @stderr, align 4, !tbaa !10 %7 = load ptr, ptr @binlogname, align 8, !tbaa !6 %8 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %6, ptr noundef nonnull @.str, ptr noundef %7, ptr noundef %0) #3 %9 = tail call i32 @exit(i32 noundef 1) #4 unreachable 10: ; preds = %1 %11 = load i32, ptr @engine_snapshot_replica, align 4, !tbaa !10 %12 = tail call ptr @open_recent_snapshot(i32 noundef %11) #3 store ptr %12, ptr @Snapshot, align 8, !tbaa !6 %13 = icmp eq ptr %12, null br i1 %13, label %28, label %14 14: ; preds = %10 %15 = load ptr, ptr %12, align 8, !tbaa !12 %16 = getelementptr inbounds i8, ptr %15, i64 4 %17 = load i32, ptr %16, align 4, !tbaa !14 %18 = tail call ptr @strdup(i32 noundef %17) #3 store ptr %18, ptr @engine_snapshot_name, align 8, !tbaa !6 %19 = load ptr, ptr @Snapshot, align 8, !tbaa !6 %20 = load ptr, ptr %19, align 8, !tbaa !12 %21 = load i32, ptr %20, align 4, !tbaa !16 store i32 %21, ptr @engine_snapshot_size, align 4, !tbaa !10 %22 = load i64, ptr @verbosity, align 8, !tbaa !17 %23 = icmp sgt i64 %22, 0 br i1 %23, label %24, label %29 24: ; preds = %14 %25 = load i32, ptr @stderr, align 4, !tbaa !10 %26 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %25, ptr noundef nonnull @.str.1, ptr noundef %18, i32 noundef %21) #3 %27 = load ptr, ptr @Snapshot, align 8, !tbaa !6 br label %29 28: ; preds = %10 store ptr null, ptr @engine_snapshot_name, align 8, !tbaa !6 store i32 0, ptr @engine_snapshot_size, align 4, !tbaa !10 br label %29 29: ; preds = %14, %24, %28 %30 = phi ptr [ %19, %14 ], [ %27, %24 ], [ null, %28 ] %31 = tail call i32 @init_all(ptr noundef %30) #3 %32 = load ptr, ptr @Snapshot, align 8, !tbaa !6 %33 = tail call i32 @close_snapshot(ptr noundef %32, i32 noundef 1) #3 %34 = load ptr, ptr @engine_replica, align 8, !tbaa !6 %35 = load i64, ptr @jump_log_pos, align 8, !tbaa !17 %36 = tail call ptr @open_binlog(ptr noundef %34, i64 noundef %35) #3 store ptr %36, ptr @Binlog, align 8, !tbaa !6 %37 = icmp eq ptr %36, null br i1 %37, label %38, label %44 38: ; preds = %29 %39 = load i32, ptr @stderr, align 4, !tbaa !10 %40 = load ptr, ptr @engine_replica, align 8, !tbaa !6 %41 = load ptr, ptr %40, align 8, !tbaa !19 %42 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %39, ptr noundef nonnull @.str.2, ptr noundef %41, i64 noundef 0) #3 %43 = tail call i32 @exit(i32 noundef 1) #4 unreachable 44: ; preds = %29 %45 = load ptr, ptr %36, align 8, !tbaa !21 %46 = load ptr, ptr %45, align 8, !tbaa !23 store ptr %46, ptr @binlogname, align 8, !tbaa !6 %47 = load i64, ptr @verbosity, align 8, !tbaa !17 %48 = icmp sgt i64 %47, 0 br i1 %48, label %49, label %55 49: ; preds = %44 %50 = load i32, ptr @stderr, align 4, !tbaa !10 %51 = load ptr, ptr %36, align 8, !tbaa !21 %52 = getelementptr inbounds i8, ptr %51, i64 8 %53 = load i32, ptr %52, align 8, !tbaa !25 %54 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %50, ptr noundef nonnull @.str.3, ptr noundef %46, i32 noundef %53) #3 br label %55 55: ; preds = %49, %44 %56 = load i32, ptr @CLOCK_MONOTONIC, align 4, !tbaa !10 %57 = tail call i64 @get_utime(i32 noundef %56) #3 store i64 %57, ptr @binlog_load_time, align 8, !tbaa !17 %58 = tail call i32 @clear_log() #3 %59 = load i64, ptr @jump_log_pos, align 8, !tbaa !17 %60 = load i32, ptr @jump_log_ts, align 4, !tbaa !10 %61 = load i32, ptr @jump_log_crc32, align 4, !tbaa !10 %62 = tail call i32 @init_log_data(i64 noundef %59, i32 noundef %60, i32 noundef %61) #3 %63 = load i64, ptr @verbosity, align 8, !tbaa !17 %64 = icmp sgt i64 %63, 0 br i1 %64, label %65, label %69 65: ; preds = %55 %66 = load i32, ptr @stderr, align 4, !tbaa !10 %67 = load i64, ptr @jump_log_pos, align 8, !tbaa !17 %68 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %66, ptr noundef nonnull @.str.4, i64 noundef %67) #3 br label %69 69: ; preds = %65, %55 %70 = tail call i32 @replay_log(i32 noundef 0, i32 noundef 1) #3 %71 = load i32, ptr @binlog_disabled, align 4, !tbaa !10 %72 = icmp eq i32 %71, 1 br i1 %72, label %75, label %73 73: ; preds = %69 %74 = tail call i32 @clear_read_log() #3 br label %75 75: ; preds = %73, %69 %76 = icmp slt i32 %70, 0 br i1 %76, label %77, label %81 77: ; preds = %75 %78 = load i32, ptr @stderr, align 4, !tbaa !10 %79 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %78, ptr noundef nonnull @.str.5) #3 %80 = tail call i32 @exit(i32 noundef 1) #4 unreachable 81: ; preds = %75 %82 = load i64, ptr @verbosity, align 8, !tbaa !17 %83 = icmp sgt i64 %82, 0 br i1 %83, label %84, label %87 84: ; preds = %81 %85 = load i32, ptr @stderr, align 4, !tbaa !10 %86 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %85, ptr noundef nonnull @.str.6) #3 br label %87 87: ; preds = %84, %81 %88 = load i32, ptr @CLOCK_MONOTONIC, align 4, !tbaa !10 %89 = tail call i64 @get_utime(i32 noundef %88) #3 %90 = load i64, ptr @binlog_load_time, align 8, !tbaa !17 %91 = sub nsw i64 %89, %90 store i64 %91, ptr @binlog_load_time, align 8, !tbaa !17 %92 = load i64, ptr @log_readto_pos, align 8, !tbaa !17 %93 = load i64, ptr @jump_log_pos, align 8, !tbaa !17 %94 = sub nsw i64 %92, %93 store i64 %94, ptr @binlog_loaded_size, align 8, !tbaa !17 %95 = load i64, ptr @verbosity, align 8, !tbaa !17 %96 = icmp sgt i64 %95, 0 br i1 %96, label %97, label %103 97: ; preds = %87 %98 = load i32, ptr @stderr, align 4, !tbaa !10 %99 = load i64, ptr @log_pos, align 8, !tbaa !17 %100 = tail call i32 @dyn_used_memory() #3 %101 = load i64, ptr @binlog_load_time, align 8, !tbaa !17 %102 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %98, ptr noundef nonnull @.str.7, i64 noundef %99, i32 noundef %100, i64 noundef %101) #3 br label %103 103: ; preds = %97, %87 %104 = tail call i32 @clear_write_log() #3 %105 = tail call i32 @time(i32 noundef 0) #3 store i32 %105, ptr @start_time, align 4, !tbaa !10 ret void } declare i64 @engine_preload_filelist(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @fprintf(i32 noundef, ptr noundef, ...) local_unnamed_addr #1 ; Function Attrs: noreturn declare i32 @exit(i32 noundef) local_unnamed_addr #2 declare ptr @open_recent_snapshot(i32 noundef) local_unnamed_addr #1 declare ptr @strdup(i32 noundef) local_unnamed_addr #1 declare i32 @init_all(ptr noundef) local_unnamed_addr #1 declare i32 @close_snapshot(ptr noundef, i32 noundef) local_unnamed_addr #1 declare ptr @open_binlog(ptr noundef, i64 noundef) local_unnamed_addr #1 declare i64 @get_utime(i32 noundef) local_unnamed_addr #1 declare i32 @clear_log(...) local_unnamed_addr #1 declare i32 @init_log_data(i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @replay_log(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @clear_read_log(...) local_unnamed_addr #1 declare i32 @dyn_used_memory(...) local_unnamed_addr #1 declare i32 @clear_write_log(...) local_unnamed_addr #1 declare i32 @time(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { noreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } attributes #4 = { noreturn nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0} !12 = !{!13, !7, i64 0} !13 = !{!"TYPE_13__", !7, i64 0} !14 = !{!15, !11, i64 4} !15 = !{!"TYPE_11__", !11, i64 0, !11, i64 4} !16 = !{!15, !11, i64 0} !17 = !{!18, !18, i64 0} !18 = !{!"long", !8, i64 0} !19 = !{!20, !7, i64 0} !20 = !{!"TYPE_15__", !7, i64 0} !21 = !{!22, !7, i64 0} !22 = !{!"TYPE_14__", !7, i64 0} !23 = !{!24, !7, i64 0} !24 = !{!"TYPE_12__", !7, i64 0, !11, i64 8} !25 = !{!24, !11, i64 8}
kphp-kdb_antispam_extr_antispam-engine-impl.c_antispam_engine_common_init_part
; ModuleID = 'AnghaBench/postgres/contrib/pgcrypto/extr_pgp-s2k.c_decide_s2k_iter.c' source_filename = "AnghaBench/postgres/contrib/pgcrypto/extr_pgp-s2k.c_decide_s2k_iter.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @decide_s2k_iter], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @decide_s2k_iter(i32 noundef %0, i32 noundef %1) #0 { %3 = icmp eq i32 %1, -1 br i1 %3, label %4, label %7 4: ; preds = %2 %5 = and i32 %0, 31 %6 = or disjoint i32 %5, 96 br label %14 7: ; preds = %2, %11 %8 = phi i32 [ %12, %11 ], [ 0, %2 ] %9 = tail call i32 @s2k_decode_count(i32 noundef %8) #2 %10 = icmp slt i32 %9, %1 br i1 %10, label %11, label %14 11: ; preds = %7 %12 = add nuw nsw i32 %8, 1 %13 = icmp eq i32 %12, 256 br i1 %13, label %14, label %7, !llvm.loop !5 14: ; preds = %11, %7, %4 %15 = phi i32 [ %6, %4 ], [ 255, %11 ], [ %8, %7 ] ret i32 %15 } declare i32 @s2k_decode_count(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = distinct !{!5, !6} !6 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/postgres/contrib/pgcrypto/extr_pgp-s2k.c_decide_s2k_iter.c' source_filename = "AnghaBench/postgres/contrib/pgcrypto/extr_pgp-s2k.c_decide_s2k_iter.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @decide_s2k_iter], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 -2147483648, 256) i32 @decide_s2k_iter(i32 noundef %0, i32 noundef %1) #0 { %3 = icmp eq i32 %1, -1 br i1 %3, label %4, label %7 4: ; preds = %2 %5 = and i32 %0, 31 %6 = or disjoint i32 %5, 96 br label %14 7: ; preds = %2, %11 %8 = phi i32 [ %12, %11 ], [ 0, %2 ] %9 = tail call i32 @s2k_decode_count(i32 noundef %8) #2 %10 = icmp slt i32 %9, %1 br i1 %10, label %11, label %14 11: ; preds = %7 %12 = add nuw nsw i32 %8, 1 %13 = icmp eq i32 %12, 256 br i1 %13, label %14, label %7, !llvm.loop !6 14: ; preds = %11, %7, %4 %15 = phi i32 [ %6, %4 ], [ 255, %11 ], [ %8, %7 ] ret i32 %15 } declare i32 @s2k_decode_count(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = distinct !{!6, !7} !7 = !{!"llvm.loop.mustprogress"}
postgres_contrib_pgcrypto_extr_pgp-s2k.c_decide_s2k_iter
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_cfgcleanup.c_block_has_preserve_label.c' source_filename = "AnghaBench/freebsd/contrib/gcc/extr_cfgcleanup.c_block_has_preserve_label.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @block_has_preserve_label], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @block_has_preserve_label(i64 noundef %0) #0 { %2 = icmp eq i64 %0, 0 br i1 %2, label %11, label %3 3: ; preds = %1 %4 = tail call i64 @block_label(i64 noundef %0) #2 %5 = icmp eq i64 %4, 0 br i1 %5, label %11, label %6 6: ; preds = %3 %7 = tail call i64 @block_label(i64 noundef %0) #2 %8 = tail call i64 @LABEL_PRESERVE_P(i64 noundef %7) #2 %9 = icmp ne i64 %8, 0 %10 = zext i1 %9 to i32 br label %11 11: ; preds = %6, %3, %1 %12 = phi i32 [ 0, %3 ], [ 0, %1 ], [ %10, %6 ] ret i32 %12 } declare i64 @block_label(i64 noundef) local_unnamed_addr #1 declare i64 @LABEL_PRESERVE_P(i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_cfgcleanup.c_block_has_preserve_label.c' source_filename = "AnghaBench/freebsd/contrib/gcc/extr_cfgcleanup.c_block_has_preserve_label.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @block_has_preserve_label], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 0, 2) i32 @block_has_preserve_label(i64 noundef %0) #0 { %2 = icmp eq i64 %0, 0 br i1 %2, label %11, label %3 3: ; preds = %1 %4 = tail call i64 @block_label(i64 noundef %0) #2 %5 = icmp eq i64 %4, 0 br i1 %5, label %11, label %6 6: ; preds = %3 %7 = tail call i64 @block_label(i64 noundef %0) #2 %8 = tail call i64 @LABEL_PRESERVE_P(i64 noundef %7) #2 %9 = icmp ne i64 %8, 0 %10 = zext i1 %9 to i32 br label %11 11: ; preds = %6, %3, %1 %12 = phi i32 [ 0, %3 ], [ 0, %1 ], [ %10, %6 ] ret i32 %12 } declare i64 @block_label(i64 noundef) local_unnamed_addr #1 declare i64 @LABEL_PRESERVE_P(i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
freebsd_contrib_gcc_extr_cfgcleanup.c_block_has_preserve_label
; ModuleID = 'AnghaBench/linux/drivers/mtd/nand/raw/extr_nand_legacy.c_nand_write_buf.c' source_filename = "AnghaBench/linux/drivers/mtd/nand/raw/extr_nand_legacy.c_nand_write_buf.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @nand_write_buf], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @nand_write_buf(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2) #0 { %4 = load i32, ptr %0, align 4, !tbaa !5 %5 = tail call i32 @iowrite8_rep(i32 noundef %4, ptr noundef %1, i32 noundef %2) #2 ret void } declare i32 @iowrite8_rep(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !8, i64 0} !6 = !{!"nand_chip", !7, i64 0} !7 = !{!"TYPE_2__", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/mtd/nand/raw/extr_nand_legacy.c_nand_write_buf.c' source_filename = "AnghaBench/linux/drivers/mtd/nand/raw/extr_nand_legacy.c_nand_write_buf.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @nand_write_buf], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @nand_write_buf(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2) #0 { %4 = load i32, ptr %0, align 4, !tbaa !6 %5 = tail call i32 @iowrite8_rep(i32 noundef %4, ptr noundef %1, i32 noundef %2) #2 ret void } declare i32 @iowrite8_rep(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !9, i64 0} !7 = !{!"nand_chip", !8, i64 0} !8 = !{!"TYPE_2__", !9, i64 0} !9 = !{!"int", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"}
linux_drivers_mtd_nand_raw_extr_nand_legacy.c_nand_write_buf
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/faraday/extr_ftmac100.c_ftmac100_set_link_ksettings.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/faraday/extr_ftmac100.c_ftmac100_set_link_ksettings.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @ftmac100_set_link_ksettings], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @ftmac100_set_link_ksettings(ptr noundef %0, ptr noundef %1) #0 { %3 = tail call ptr @netdev_priv(ptr noundef %0) #2 %4 = tail call i32 @mii_ethtool_set_link_ksettings(ptr noundef %3, ptr noundef %1) #2 ret i32 %4 } declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1 declare i32 @mii_ethtool_set_link_ksettings(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/faraday/extr_ftmac100.c_ftmac100_set_link_ksettings.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/faraday/extr_ftmac100.c_ftmac100_set_link_ksettings.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @ftmac100_set_link_ksettings], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @ftmac100_set_link_ksettings(ptr noundef %0, ptr noundef %1) #0 { %3 = tail call ptr @netdev_priv(ptr noundef %0) #2 %4 = tail call i32 @mii_ethtool_set_link_ksettings(ptr noundef %3, ptr noundef %1) #2 ret i32 %4 } declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1 declare i32 @mii_ethtool_set_link_ksettings(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
linux_drivers_net_ethernet_faraday_extr_ftmac100.c_ftmac100_set_link_ksettings
; ModuleID = 'AnghaBench/RetroArch/gfx/drivers/extr_d3d12.c_d3d12_set_menu_texture_enable.c' source_filename = "AnghaBench/RetroArch/gfx/drivers/extr_d3d12.c_d3d12_set_menu_texture_enable.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_3__ = type { i32, i32 } @llvm.compiler.used = appending global [1 x ptr] [ptr @d3d12_set_menu_texture_enable], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable define internal void @d3d12_set_menu_texture_enable(ptr noundef writeonly %0, i32 noundef %1, i32 noundef %2) #0 { %4 = icmp eq ptr %0, null br i1 %4, label %7, label %5 5: ; preds = %3 store i32 %1, ptr %0, align 4, !tbaa !5 %6 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1 store i32 %2, ptr %6, align 4, !tbaa !11 br label %7 7: ; preds = %3, %5 ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !8, i64 0} !6 = !{!"TYPE_4__", !7, i64 0} !7 = !{!"TYPE_3__", !8, i64 0, !8, i64 4} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!6, !8, i64 4}
; ModuleID = 'AnghaBench/RetroArch/gfx/drivers/extr_d3d12.c_d3d12_set_menu_texture_enable.c' source_filename = "AnghaBench/RetroArch/gfx/drivers/extr_d3d12.c_d3d12_set_menu_texture_enable.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @d3d12_set_menu_texture_enable], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) define internal void @d3d12_set_menu_texture_enable(ptr noundef writeonly %0, i32 noundef %1, i32 noundef %2) #0 { %4 = icmp eq ptr %0, null br i1 %4, label %7, label %5 5: ; preds = %3 store i32 %1, ptr %0, align 4, !tbaa !6 %6 = getelementptr inbounds i8, ptr %0, i64 4 store i32 %2, ptr %6, align 4, !tbaa !12 br label %7 7: ; preds = %3, %5 ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !9, i64 0} !7 = !{!"TYPE_4__", !8, i64 0} !8 = !{!"TYPE_3__", !9, i64 0, !9, i64 4} !9 = !{!"int", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"} !12 = !{!7, !9, i64 4}
RetroArch_gfx_drivers_extr_d3d12.c_d3d12_set_menu_texture_enable
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192c/extr_..wifi.h_rtl_find_sta.c' source_filename = "AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192c/extr_..wifi.h_rtl_find_sta.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @rtl_find_sta], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal ptr @rtl_find_sta(ptr noundef %0, ptr noundef %1) #0 { %3 = tail call i32 @rtl_priv(ptr noundef %0) #2 %4 = tail call ptr @rtl_mac(i32 noundef %3) #2 %5 = load i32, ptr %4, align 4, !tbaa !5 %6 = tail call ptr @ieee80211_find_sta(i32 noundef %5, ptr noundef %1) #2 ret ptr %6 } declare ptr @rtl_mac(i32 noundef) local_unnamed_addr #1 declare i32 @rtl_priv(ptr noundef) local_unnamed_addr #1 declare ptr @ieee80211_find_sta(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"rtl_mac", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192c/extr_..wifi.h_rtl_find_sta.c' source_filename = "AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192c/extr_..wifi.h_rtl_find_sta.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @rtl_find_sta], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal ptr @rtl_find_sta(ptr noundef %0, ptr noundef %1) #0 { %3 = tail call i32 @rtl_priv(ptr noundef %0) #2 %4 = tail call ptr @rtl_mac(i32 noundef %3) #2 %5 = load i32, ptr %4, align 4, !tbaa !6 %6 = tail call ptr @ieee80211_find_sta(i32 noundef %5, ptr noundef %1) #2 ret ptr %6 } declare ptr @rtl_mac(i32 noundef) local_unnamed_addr #1 declare i32 @rtl_priv(ptr noundef) local_unnamed_addr #1 declare ptr @ieee80211_find_sta(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"rtl_mac", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
linux_drivers_net_wireless_realtek_rtlwifi_rtl8192c_extr_..wifi.h_rtl_find_sta
; ModuleID = 'AnghaBench/linux/sound/soc/codecs/extr_max98095.c_max98095_dai1_hw_params.c' source_filename = "AnghaBench/linux/sound/soc/codecs/extr_max98095.c_max98095_dai1_hw_params.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.max98095_priv = type { i64, ptr } @M98095_02A_DAI1_FORMAT = dso_local local_unnamed_addr global i32 0, align 4 @M98095_DAI_WS = dso_local local_unnamed_addr global i32 0, align 4 @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @M98095_027_DAI1_CLKMODE = dso_local local_unnamed_addr global i32 0, align 4 @M98095_CLKMODE_MASK = dso_local local_unnamed_addr global i32 0, align 4 @M98095_DAI_MAS = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [32 x i8] c"Invalid system clock frequency\0A\00", align 1 @M98095_028_DAI1_CLKCFG_HI = dso_local local_unnamed_addr global i32 0, align 4 @M98095_029_DAI1_CLKCFG_LO = dso_local local_unnamed_addr global i32 0, align 4 @M98095_02E_DAI1_FILTERS = dso_local local_unnamed_addr global i32 0, align 4 @M98095_DAI_DHF = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @max98095_dai1_hw_params], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @max98095_dai1_hw_params(ptr nocapture readnone %0, ptr noundef %1, ptr nocapture noundef readonly %2) #0 { %4 = alloca i32, align 4 %5 = load ptr, ptr %2, align 8, !tbaa !5 %6 = tail call ptr @snd_soc_component_get_drvdata(ptr noundef %5) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3 %7 = getelementptr inbounds %struct.max98095_priv, ptr %6, i64 0, i32 1 %8 = load ptr, ptr %7, align 8, !tbaa !10 %9 = tail call i32 @params_rate(ptr noundef %1) #3 %10 = tail call i32 @params_width(ptr noundef %1) #3 switch i32 %10, label %19 [ i32 16, label %11 i32 24, label %15 ] 11: ; preds = %3 %12 = load i32, ptr @M98095_02A_DAI1_FORMAT, align 4, !tbaa !13 %13 = load i32, ptr @M98095_DAI_WS, align 4, !tbaa !13 %14 = tail call i32 @snd_soc_component_update_bits(ptr noundef %5, i32 noundef %12, i32 noundef %13, i32 noundef 0) #3 br label %22 15: ; preds = %3 %16 = load i32, ptr @M98095_02A_DAI1_FORMAT, align 4, !tbaa !13 %17 = load i32, ptr @M98095_DAI_WS, align 4, !tbaa !13 %18 = tail call i32 @snd_soc_component_update_bits(ptr noundef %5, i32 noundef %16, i32 noundef %17, i32 noundef %17) #3 br label %22 19: ; preds = %3 %20 = load i32, ptr @EINVAL, align 4, !tbaa !13 %21 = sub nsw i32 0, %20 br label %64 22: ; preds = %15, %11 %23 = call i64 @rate_value(i32 noundef %9, ptr noundef nonnull %4) #3 %24 = icmp eq i64 %23, 0 br i1 %24, label %28, label %25 25: ; preds = %22 %26 = load i32, ptr @EINVAL, align 4, !tbaa !13 %27 = sub nsw i32 0, %26 br label %64 28: ; preds = %22 %29 = load i32, ptr @M98095_027_DAI1_CLKMODE, align 4, !tbaa !13 %30 = load i32, ptr @M98095_CLKMODE_MASK, align 4, !tbaa !13 %31 = load i32, ptr %4, align 4, !tbaa !13 %32 = call i32 @snd_soc_component_update_bits(ptr noundef %5, i32 noundef %29, i32 noundef %30, i32 noundef %31) #3 store i32 %9, ptr %8, align 4, !tbaa !15 %33 = load i32, ptr @M98095_02A_DAI1_FORMAT, align 4, !tbaa !13 %34 = call i32 @snd_soc_component_read32(ptr noundef %5, i32 noundef %33) #3 %35 = load i32, ptr @M98095_DAI_MAS, align 4, !tbaa !13 %36 = and i32 %35, %34 %37 = icmp eq i32 %36, 0 br i1 %37, label %56, label %38 38: ; preds = %28 %39 = load i64, ptr %6, align 8, !tbaa !17 %40 = icmp eq i64 %39, 0 br i1 %40, label %41, label %46 41: ; preds = %38 %42 = load i32, ptr %5, align 4, !tbaa !18 %43 = call i32 @dev_err(i32 noundef %42, ptr noundef nonnull @.str) #3 %44 = load i32, ptr @EINVAL, align 4, !tbaa !13 %45 = sub nsw i32 0, %44 br label %64 46: ; preds = %38 %47 = icmp ult i32 %9, 50000 %48 = select i1 %47, i64 6291456, i64 3145728 %49 = zext i32 %9 to i64 %50 = mul nuw nsw i64 %48, %49 %51 = call i32 @do_div(i64 noundef %50, i64 noundef %39) #3 %52 = load i32, ptr @M98095_028_DAI1_CLKCFG_HI, align 4, !tbaa !13 %53 = call i32 @snd_soc_component_write(ptr noundef %5, i32 noundef %52, i64 noundef 0) #3 %54 = load i32, ptr @M98095_029_DAI1_CLKCFG_LO, align 4, !tbaa !13 %55 = call i32 @snd_soc_component_write(ptr noundef %5, i32 noundef %54, i64 noundef 0) #3 br label %56 56: ; preds = %46, %28 %57 = icmp ult i32 %9, 50000 %58 = load i32, ptr @M98095_02E_DAI1_FILTERS, align 4, !tbaa !13 %59 = load i32, ptr @M98095_DAI_DHF, align 4, !tbaa !13 br i1 %57, label %60, label %62 60: ; preds = %56 %61 = call i32 @snd_soc_component_update_bits(ptr noundef %5, i32 noundef %58, i32 noundef %59, i32 noundef 0) #3 br label %64 62: ; preds = %56 %63 = call i32 @snd_soc_component_update_bits(ptr noundef %5, i32 noundef %58, i32 noundef %59, i32 noundef %59) #3 br label %64 64: ; preds = %60, %62, %41, %25, %19 %65 = phi i32 [ %21, %19 ], [ %27, %25 ], [ %45, %41 ], [ 0, %62 ], [ 0, %60 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3 ret i32 %65 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @snd_soc_component_get_drvdata(ptr noundef) local_unnamed_addr #2 declare i32 @params_rate(ptr noundef) local_unnamed_addr #2 declare i32 @params_width(ptr noundef) local_unnamed_addr #2 declare i32 @snd_soc_component_update_bits(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i64 @rate_value(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @snd_soc_component_read32(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @dev_err(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @do_div(i64 noundef, i64 noundef) local_unnamed_addr #2 declare i32 @snd_soc_component_write(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"snd_soc_dai", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 8} !11 = !{!"max98095_priv", !12, i64 0, !7, i64 8} !12 = !{!"long", !8, i64 0} !13 = !{!14, !14, i64 0} !14 = !{!"int", !8, i64 0} !15 = !{!16, !14, i64 0} !16 = !{!"max98095_cdata", !14, i64 0} !17 = !{!11, !12, i64 0} !18 = !{!19, !14, i64 0} !19 = !{!"snd_soc_component", !14, i64 0}
; ModuleID = 'AnghaBench/linux/sound/soc/codecs/extr_max98095.c_max98095_dai1_hw_params.c' source_filename = "AnghaBench/linux/sound/soc/codecs/extr_max98095.c_max98095_dai1_hw_params.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @M98095_02A_DAI1_FORMAT = common local_unnamed_addr global i32 0, align 4 @M98095_DAI_WS = common local_unnamed_addr global i32 0, align 4 @EINVAL = common local_unnamed_addr global i32 0, align 4 @M98095_027_DAI1_CLKMODE = common local_unnamed_addr global i32 0, align 4 @M98095_CLKMODE_MASK = common local_unnamed_addr global i32 0, align 4 @M98095_DAI_MAS = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [32 x i8] c"Invalid system clock frequency\0A\00", align 1 @M98095_028_DAI1_CLKCFG_HI = common local_unnamed_addr global i32 0, align 4 @M98095_029_DAI1_CLKCFG_LO = common local_unnamed_addr global i32 0, align 4 @M98095_02E_DAI1_FILTERS = common local_unnamed_addr global i32 0, align 4 @M98095_DAI_DHF = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @max98095_dai1_hw_params], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 -2147483647, -2147483648) i32 @max98095_dai1_hw_params(ptr nocapture readnone %0, ptr noundef %1, ptr nocapture noundef readonly %2) #0 { %4 = alloca i32, align 4 %5 = load ptr, ptr %2, align 8, !tbaa !6 %6 = tail call ptr @snd_soc_component_get_drvdata(ptr noundef %5) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3 %7 = getelementptr inbounds i8, ptr %6, i64 8 %8 = load ptr, ptr %7, align 8, !tbaa !11 %9 = tail call i32 @params_rate(ptr noundef %1) #3 %10 = tail call i32 @params_width(ptr noundef %1) #3 switch i32 %10, label %19 [ i32 16, label %11 i32 24, label %15 ] 11: ; preds = %3 %12 = load i32, ptr @M98095_02A_DAI1_FORMAT, align 4, !tbaa !14 %13 = load i32, ptr @M98095_DAI_WS, align 4, !tbaa !14 %14 = tail call i32 @snd_soc_component_update_bits(ptr noundef %5, i32 noundef %12, i32 noundef %13, i32 noundef 0) #3 br label %22 15: ; preds = %3 %16 = load i32, ptr @M98095_02A_DAI1_FORMAT, align 4, !tbaa !14 %17 = load i32, ptr @M98095_DAI_WS, align 4, !tbaa !14 %18 = tail call i32 @snd_soc_component_update_bits(ptr noundef %5, i32 noundef %16, i32 noundef %17, i32 noundef %17) #3 br label %22 19: ; preds = %3 %20 = load i32, ptr @EINVAL, align 4, !tbaa !14 %21 = sub nsw i32 0, %20 br label %64 22: ; preds = %15, %11 %23 = call i64 @rate_value(i32 noundef %9, ptr noundef nonnull %4) #3 %24 = icmp eq i64 %23, 0 br i1 %24, label %28, label %25 25: ; preds = %22 %26 = load i32, ptr @EINVAL, align 4, !tbaa !14 %27 = sub nsw i32 0, %26 br label %64 28: ; preds = %22 %29 = load i32, ptr @M98095_027_DAI1_CLKMODE, align 4, !tbaa !14 %30 = load i32, ptr @M98095_CLKMODE_MASK, align 4, !tbaa !14 %31 = load i32, ptr %4, align 4, !tbaa !14 %32 = call i32 @snd_soc_component_update_bits(ptr noundef %5, i32 noundef %29, i32 noundef %30, i32 noundef %31) #3 store i32 %9, ptr %8, align 4, !tbaa !16 %33 = load i32, ptr @M98095_02A_DAI1_FORMAT, align 4, !tbaa !14 %34 = call i32 @snd_soc_component_read32(ptr noundef %5, i32 noundef %33) #3 %35 = load i32, ptr @M98095_DAI_MAS, align 4, !tbaa !14 %36 = and i32 %35, %34 %37 = icmp eq i32 %36, 0 br i1 %37, label %56, label %38 38: ; preds = %28 %39 = load i64, ptr %6, align 8, !tbaa !18 %40 = icmp eq i64 %39, 0 br i1 %40, label %41, label %46 41: ; preds = %38 %42 = load i32, ptr %5, align 4, !tbaa !19 %43 = call i32 @dev_err(i32 noundef %42, ptr noundef nonnull @.str) #3 %44 = load i32, ptr @EINVAL, align 4, !tbaa !14 %45 = sub nsw i32 0, %44 br label %64 46: ; preds = %38 %47 = icmp ult i32 %9, 50000 %48 = select i1 %47, i64 6291456, i64 3145728 %49 = zext i32 %9 to i64 %50 = mul nuw nsw i64 %48, %49 %51 = call i32 @do_div(i64 noundef %50, i64 noundef %39) #3 %52 = load i32, ptr @M98095_028_DAI1_CLKCFG_HI, align 4, !tbaa !14 %53 = call i32 @snd_soc_component_write(ptr noundef %5, i32 noundef %52, i64 noundef 0) #3 %54 = load i32, ptr @M98095_029_DAI1_CLKCFG_LO, align 4, !tbaa !14 %55 = call i32 @snd_soc_component_write(ptr noundef %5, i32 noundef %54, i64 noundef 0) #3 br label %56 56: ; preds = %46, %28 %57 = icmp ult i32 %9, 50000 %58 = load i32, ptr @M98095_02E_DAI1_FILTERS, align 4, !tbaa !14 %59 = load i32, ptr @M98095_DAI_DHF, align 4, !tbaa !14 br i1 %57, label %60, label %62 60: ; preds = %56 %61 = call i32 @snd_soc_component_update_bits(ptr noundef %5, i32 noundef %58, i32 noundef %59, i32 noundef 0) #3 br label %64 62: ; preds = %56 %63 = call i32 @snd_soc_component_update_bits(ptr noundef %5, i32 noundef %58, i32 noundef %59, i32 noundef %59) #3 br label %64 64: ; preds = %60, %62, %41, %25, %19 %65 = phi i32 [ %21, %19 ], [ %27, %25 ], [ %45, %41 ], [ 0, %62 ], [ 0, %60 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3 ret i32 %65 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @snd_soc_component_get_drvdata(ptr noundef) local_unnamed_addr #2 declare i32 @params_rate(ptr noundef) local_unnamed_addr #2 declare i32 @params_width(ptr noundef) local_unnamed_addr #2 declare i32 @snd_soc_component_update_bits(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i64 @rate_value(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @snd_soc_component_read32(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @dev_err(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @do_div(i64 noundef, i64 noundef) local_unnamed_addr #2 declare i32 @snd_soc_component_write(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"snd_soc_dai", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !8, i64 8} !12 = !{!"max98095_priv", !13, i64 0, !8, i64 8} !13 = !{!"long", !9, i64 0} !14 = !{!15, !15, i64 0} !15 = !{!"int", !9, i64 0} !16 = !{!17, !15, i64 0} !17 = !{!"max98095_cdata", !15, i64 0} !18 = !{!12, !13, i64 0} !19 = !{!20, !15, i64 0} !20 = !{!"snd_soc_component", !15, i64 0}
linux_sound_soc_codecs_extr_max98095.c_max98095_dai1_hw_params
; ModuleID = 'AnghaBench/freebsd/contrib/openbsm/bin/auditdistd/extr_synch.h_mtx_init.c' source_filename = "AnghaBench/freebsd/contrib/openbsm/bin/auditdistd/extr_synch.h_mtx_init.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @mtx_init], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal void @mtx_init(ptr noundef %0) #0 { %2 = tail call i32 @pthread_mutex_init(ptr noundef %0, ptr noundef null) #2 %3 = icmp eq i32 %2, 0 %4 = zext i1 %3 to i32 %5 = tail call i32 @PJDLOG_ASSERT(i32 noundef %4) #2 ret void } declare i32 @pthread_mutex_init(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @PJDLOG_ASSERT(i32 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/freebsd/contrib/openbsm/bin/auditdistd/extr_synch.h_mtx_init.c' source_filename = "AnghaBench/freebsd/contrib/openbsm/bin/auditdistd/extr_synch.h_mtx_init.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @mtx_init], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal void @mtx_init(ptr noundef %0) #0 { %2 = tail call i32 @pthread_mutex_init(ptr noundef %0, ptr noundef null) #2 %3 = icmp eq i32 %2, 0 %4 = zext i1 %3 to i32 %5 = tail call i32 @PJDLOG_ASSERT(i32 noundef %4) #2 ret void } declare i32 @pthread_mutex_init(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @PJDLOG_ASSERT(i32 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
freebsd_contrib_openbsm_bin_auditdistd_extr_synch.h_mtx_init
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/md/extr_raid5.c_remove_hash.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/md/extr_raid5.c_remove_hash.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.stripe_head = type { i32, i64 } @.str = private unnamed_addr constant [28 x i8] c"remove_hash(), stripe %llu\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @remove_hash], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal void @remove_hash(ptr noundef %0) #0 { %2 = getelementptr inbounds %struct.stripe_head, ptr %0, i64 0, i32 1 %3 = load i64, ptr %2, align 8, !tbaa !5 %4 = tail call i32 @pr_debug(ptr noundef nonnull @.str, i64 noundef %3) #2 %5 = tail call i32 @hlist_del_init(ptr noundef %0) #2 ret void } declare i32 @pr_debug(ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @hlist_del_init(ptr noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 8} !6 = !{!"stripe_head", !7, i64 0, !10, i64 8} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"long", !8, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/md/extr_raid5.c_remove_hash.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/md/extr_raid5.c_remove_hash.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [28 x i8] c"remove_hash(), stripe %llu\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @remove_hash], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal void @remove_hash(ptr noundef %0) #0 { %2 = getelementptr inbounds i8, ptr %0, i64 8 %3 = load i64, ptr %2, align 8, !tbaa !6 %4 = tail call i32 @pr_debug(ptr noundef nonnull @.str, i64 noundef %3) #2 %5 = tail call i32 @hlist_del_init(ptr noundef %0) #2 ret void } declare i32 @pr_debug(ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @hlist_del_init(ptr noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 8} !7 = !{!"stripe_head", !8, i64 0, !11, i64 8} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"long", !9, i64 0}
fastsocket_kernel_drivers_md_extr_raid5.c_remove_hash
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Cedar.c_DeleteOldNoSsl.c' source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Cedar.c_DeleteOldNoSsl.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local void @DeleteOldNoSsl(ptr noundef readonly %0) local_unnamed_addr #0 { %2 = icmp eq ptr %0, null br i1 %2, label %36, label %3 3: ; preds = %1 %4 = tail call ptr @NewListFast(ptr noundef null) #2 %5 = load ptr, ptr %0, align 8, !tbaa !5 %6 = tail call i64 @LIST_NUM(ptr noundef %5) #2 %7 = icmp sgt i64 %6, 0 br i1 %7, label %11, label %8 8: ; preds = %20, %3 %9 = tail call i64 @LIST_NUM(ptr noundef %4) #2 %10 = icmp sgt i64 %9, 0 br i1 %10, label %25, label %34 11: ; preds = %3, %20 %12 = phi i64 [ %21, %20 ], [ 0, %3 ] %13 = load ptr, ptr %0, align 8, !tbaa !5 %14 = tail call ptr @LIST_DATA(ptr noundef %13, i64 noundef %12) #2 %15 = load i64, ptr %14, align 8, !tbaa !10 %16 = tail call i64 (...) @Tick64() #2 %17 = icmp sgt i64 %15, %16 br i1 %17, label %20, label %18 18: ; preds = %11 %19 = tail call i32 @Add(ptr noundef %4, ptr noundef nonnull %14) #2 br label %20 20: ; preds = %18, %11 %21 = add nuw nsw i64 %12, 1 %22 = load ptr, ptr %0, align 8, !tbaa !5 %23 = tail call i64 @LIST_NUM(ptr noundef %22) #2 %24 = icmp slt i64 %21, %23 br i1 %24, label %11, label %8, !llvm.loop !13 25: ; preds = %8, %25 %26 = phi i64 [ %31, %25 ], [ 0, %8 ] %27 = tail call ptr @LIST_DATA(ptr noundef %4, i64 noundef %26) #2 %28 = load ptr, ptr %0, align 8, !tbaa !5 %29 = tail call i32 @Delete(ptr noundef %28, ptr noundef %27) #2 %30 = tail call i32 @Free(ptr noundef %27) #2 %31 = add nuw nsw i64 %26, 1 %32 = tail call i64 @LIST_NUM(ptr noundef %4) #2 %33 = icmp slt i64 %31, %32 br i1 %33, label %25, label %34, !llvm.loop !15 34: ; preds = %25, %8 %35 = tail call i32 @ReleaseList(ptr noundef %4) #2 br label %36 36: ; preds = %1, %34 ret void } declare ptr @NewListFast(ptr noundef) local_unnamed_addr #1 declare i64 @LIST_NUM(ptr noundef) local_unnamed_addr #1 declare ptr @LIST_DATA(ptr noundef, i64 noundef) local_unnamed_addr #1 declare i64 @Tick64(...) local_unnamed_addr #1 declare i32 @Add(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @Delete(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @Free(ptr noundef) local_unnamed_addr #1 declare i32 @ReleaseList(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_9__", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"TYPE_8__", !12, i64 0} !12 = !{!"long", !8, i64 0} !13 = distinct !{!13, !14} !14 = !{!"llvm.loop.mustprogress"} !15 = distinct !{!15, !14}
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Cedar.c_DeleteOldNoSsl.c' source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Cedar.c_DeleteOldNoSsl.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define void @DeleteOldNoSsl(ptr noundef readonly %0) local_unnamed_addr #0 { %2 = icmp eq ptr %0, null br i1 %2, label %36, label %3 3: ; preds = %1 %4 = tail call ptr @NewListFast(ptr noundef null) #2 %5 = load ptr, ptr %0, align 8, !tbaa !6 %6 = tail call i64 @LIST_NUM(ptr noundef %5) #2 %7 = icmp sgt i64 %6, 0 br i1 %7, label %11, label %8 8: ; preds = %20, %3 %9 = tail call i64 @LIST_NUM(ptr noundef %4) #2 %10 = icmp sgt i64 %9, 0 br i1 %10, label %25, label %34 11: ; preds = %3, %20 %12 = phi i64 [ %21, %20 ], [ 0, %3 ] %13 = load ptr, ptr %0, align 8, !tbaa !6 %14 = tail call ptr @LIST_DATA(ptr noundef %13, i64 noundef %12) #2 %15 = load i64, ptr %14, align 8, !tbaa !11 %16 = tail call i64 @Tick64() #2 %17 = icmp sgt i64 %15, %16 br i1 %17, label %20, label %18 18: ; preds = %11 %19 = tail call i32 @Add(ptr noundef %4, ptr noundef nonnull %14) #2 br label %20 20: ; preds = %18, %11 %21 = add nuw nsw i64 %12, 1 %22 = load ptr, ptr %0, align 8, !tbaa !6 %23 = tail call i64 @LIST_NUM(ptr noundef %22) #2 %24 = icmp slt i64 %21, %23 br i1 %24, label %11, label %8, !llvm.loop !14 25: ; preds = %8, %25 %26 = phi i64 [ %31, %25 ], [ 0, %8 ] %27 = tail call ptr @LIST_DATA(ptr noundef %4, i64 noundef %26) #2 %28 = load ptr, ptr %0, align 8, !tbaa !6 %29 = tail call i32 @Delete(ptr noundef %28, ptr noundef %27) #2 %30 = tail call i32 @Free(ptr noundef %27) #2 %31 = add nuw nsw i64 %26, 1 %32 = tail call i64 @LIST_NUM(ptr noundef %4) #2 %33 = icmp slt i64 %31, %32 br i1 %33, label %25, label %34, !llvm.loop !16 34: ; preds = %25, %8 %35 = tail call i32 @ReleaseList(ptr noundef %4) #2 br label %36 36: ; preds = %1, %34 ret void } declare ptr @NewListFast(ptr noundef) local_unnamed_addr #1 declare i64 @LIST_NUM(ptr noundef) local_unnamed_addr #1 declare ptr @LIST_DATA(ptr noundef, i64 noundef) local_unnamed_addr #1 declare i64 @Tick64(...) local_unnamed_addr #1 declare i32 @Add(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @Delete(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @Free(ptr noundef) local_unnamed_addr #1 declare i32 @ReleaseList(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_9__", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !13, i64 0} !12 = !{!"TYPE_8__", !13, i64 0} !13 = !{!"long", !9, i64 0} !14 = distinct !{!14, !15} !15 = !{!"llvm.loop.mustprogress"} !16 = distinct !{!16, !15}
SoftEtherVPN_src_Cedar_extr_Cedar.c_DeleteOldNoSsl
; ModuleID = 'AnghaBench/freebsd/sys/compat/freebsd32/extr_freebsd32_misc.c_freebsd32_copyiniov.c' source_filename = "AnghaBench/freebsd/sys/compat/freebsd32/extr_freebsd32_misc.c_freebsd32_copyiniov.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.iovec32 = type { i32, i32 } %struct.iovec = type { i32, i32 } @UIO_MAXIOV = dso_local local_unnamed_addr global i32 0, align 4 @M_IOV = dso_local local_unnamed_addr global i32 0, align 4 @M_WAITOK = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local i32 @freebsd32_copyiniov(ptr noundef %0, i32 noundef %1, ptr nocapture noundef writeonly %2, i32 noundef %3) local_unnamed_addr #0 { %5 = alloca %struct.iovec32, align 4 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3 store ptr null, ptr %2, align 8, !tbaa !5 %6 = load i32, ptr @UIO_MAXIOV, align 4, !tbaa !9 %7 = icmp slt i32 %6, %1 br i1 %7, label %34, label %8 8: ; preds = %4 %9 = shl i32 %1, 3 %10 = load i32, ptr @M_IOV, align 4, !tbaa !9 %11 = load i32, ptr @M_WAITOK, align 4, !tbaa !9 %12 = tail call ptr @malloc(i32 noundef %9, i32 noundef %10, i32 noundef %11) #3 %13 = icmp sgt i32 %1, 0 br i1 %13, label %14, label %33 14: ; preds = %8 %15 = getelementptr inbounds %struct.iovec32, ptr %5, i64 0, i32 1 %16 = zext nneg i32 %1 to i64 br label %17 17: ; preds = %14, %25 %18 = phi i64 [ 0, %14 ], [ %31, %25 ] %19 = getelementptr inbounds %struct.iovec32, ptr %0, i64 %18 %20 = call i32 @copyin(ptr noundef %19, ptr noundef nonnull %5, i32 noundef 8) #3 %21 = icmp eq i32 %20, 0 br i1 %21, label %25, label %22 22: ; preds = %17 %23 = load i32, ptr @M_IOV, align 4, !tbaa !9 %24 = call i32 @free(ptr noundef %12, i32 noundef %23) #3 br label %34 25: ; preds = %17 %26 = load i32, ptr %15, align 4, !tbaa !11 %27 = call i32 @PTRIN(i32 noundef %26) #3 %28 = getelementptr inbounds %struct.iovec, ptr %12, i64 %18 %29 = getelementptr inbounds %struct.iovec, ptr %12, i64 %18, i32 1 store i32 %27, ptr %29, align 4, !tbaa !13 %30 = load i32, ptr %5, align 4, !tbaa !15 store i32 %30, ptr %28, align 4, !tbaa !16 %31 = add nuw nsw i64 %18, 1 %32 = icmp eq i64 %31, %16 br i1 %32, label %33, label %17, !llvm.loop !17 33: ; preds = %25, %8 store ptr %12, ptr %2, align 8, !tbaa !5 br label %34 34: ; preds = %4, %33, %22 %35 = phi i32 [ %20, %22 ], [ 0, %33 ], [ %3, %4 ] call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3 ret i32 %35 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @malloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @copyin(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @free(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @PTRIN(i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"int", !7, i64 0} !11 = !{!12, !10, i64 4} !12 = !{!"iovec32", !10, i64 0, !10, i64 4} !13 = !{!14, !10, i64 4} !14 = !{!"iovec", !10, i64 0, !10, i64 4} !15 = !{!12, !10, i64 0} !16 = !{!14, !10, i64 0} !17 = distinct !{!17, !18} !18 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/freebsd/sys/compat/freebsd32/extr_freebsd32_misc.c_freebsd32_copyiniov.c' source_filename = "AnghaBench/freebsd/sys/compat/freebsd32/extr_freebsd32_misc.c_freebsd32_copyiniov.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.iovec32 = type { i32, i32 } %struct.iovec = type { i32, i32 } @UIO_MAXIOV = common local_unnamed_addr global i32 0, align 4 @M_IOV = common local_unnamed_addr global i32 0, align 4 @M_WAITOK = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @freebsd32_copyiniov(ptr noundef %0, i32 noundef %1, ptr nocapture noundef writeonly %2, i32 noundef %3) local_unnamed_addr #0 { %5 = alloca %struct.iovec32, align 4 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3 store ptr null, ptr %2, align 8, !tbaa !6 %6 = load i32, ptr @UIO_MAXIOV, align 4, !tbaa !10 %7 = icmp slt i32 %6, %1 br i1 %7, label %34, label %8 8: ; preds = %4 %9 = shl i32 %1, 3 %10 = load i32, ptr @M_IOV, align 4, !tbaa !10 %11 = load i32, ptr @M_WAITOK, align 4, !tbaa !10 %12 = tail call ptr @malloc(i32 noundef %9, i32 noundef %10, i32 noundef %11) #3 %13 = icmp sgt i32 %1, 0 br i1 %13, label %14, label %33 14: ; preds = %8 %15 = getelementptr inbounds i8, ptr %5, i64 4 %16 = zext nneg i32 %1 to i64 br label %17 17: ; preds = %14, %25 %18 = phi i64 [ 0, %14 ], [ %31, %25 ] %19 = getelementptr inbounds %struct.iovec32, ptr %0, i64 %18 %20 = call i32 @copyin(ptr noundef %19, ptr noundef nonnull %5, i32 noundef 8) #3 %21 = icmp eq i32 %20, 0 br i1 %21, label %25, label %22 22: ; preds = %17 %23 = load i32, ptr @M_IOV, align 4, !tbaa !10 %24 = call i32 @free(ptr noundef %12, i32 noundef %23) #3 br label %34 25: ; preds = %17 %26 = load i32, ptr %15, align 4, !tbaa !12 %27 = call i32 @PTRIN(i32 noundef %26) #3 %28 = getelementptr inbounds %struct.iovec, ptr %12, i64 %18 %29 = getelementptr inbounds i8, ptr %28, i64 4 store i32 %27, ptr %29, align 4, !tbaa !14 %30 = load i32, ptr %5, align 4, !tbaa !16 store i32 %30, ptr %28, align 4, !tbaa !17 %31 = add nuw nsw i64 %18, 1 %32 = icmp eq i64 %31, %16 br i1 %32, label %33, label %17, !llvm.loop !18 33: ; preds = %25, %8 store ptr %12, ptr %2, align 8, !tbaa !6 br label %34 34: ; preds = %4, %33, %22 %35 = phi i32 [ %20, %22 ], [ 0, %33 ], [ %3, %4 ] call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3 ret i32 %35 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @malloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @copyin(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @free(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @PTRIN(i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0} !12 = !{!13, !11, i64 4} !13 = !{!"iovec32", !11, i64 0, !11, i64 4} !14 = !{!15, !11, i64 4} !15 = !{!"iovec", !11, i64 0, !11, i64 4} !16 = !{!13, !11, i64 0} !17 = !{!15, !11, i64 0} !18 = distinct !{!18, !19} !19 = !{!"llvm.loop.mustprogress"}
freebsd_sys_compat_freebsd32_extr_freebsd32_misc.c_freebsd32_copyiniov
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intel/iwlwifi/mvm/extr_power.c_iwl_mvm_power_ps_disabled_iterator.c' source_filename = "AnghaBench/linux/drivers/net/wireless/intel/iwlwifi/mvm/extr_power.c_iwl_mvm_power_ps_disabled_iterator.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.iwl_mvm_vif = type { i32, ptr } @NUM_PHY_CTX = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @iwl_mvm_power_ps_disabled_iterator], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @iwl_mvm_power_ps_disabled_iterator(ptr nocapture noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 { %4 = tail call ptr @iwl_mvm_vif_from_mac80211(ptr noundef %2) #2 %5 = getelementptr inbounds %struct.iwl_mvm_vif, ptr %4, i64 0, i32 1 %6 = load ptr, ptr %5, align 8, !tbaa !5 %7 = icmp eq ptr %6, null br i1 %7, label %16, label %8 8: ; preds = %3 %9 = load i64, ptr %6, align 8, !tbaa !11 %10 = load i64, ptr @NUM_PHY_CTX, align 8, !tbaa !14 %11 = icmp slt i64 %9, %10 br i1 %11, label %12, label %16 12: ; preds = %8 %13 = load i32, ptr %4, align 8, !tbaa !15 %14 = load i32, ptr %0, align 4, !tbaa !16 %15 = or i32 %14, %13 store i32 %15, ptr %0, align 4, !tbaa !16 br label %16 16: ; preds = %12, %8, %3 ret void } declare ptr @iwl_mvm_vif_from_mac80211(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 8} !6 = !{!"iwl_mvm_vif", !7, i64 0, !10, i64 8} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!12, !13, i64 0} !12 = !{!"TYPE_2__", !13, i64 0} !13 = !{!"long", !8, i64 0} !14 = !{!13, !13, i64 0} !15 = !{!6, !7, i64 0} !16 = !{!7, !7, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intel/iwlwifi/mvm/extr_power.c_iwl_mvm_power_ps_disabled_iterator.c' source_filename = "AnghaBench/linux/drivers/net/wireless/intel/iwlwifi/mvm/extr_power.c_iwl_mvm_power_ps_disabled_iterator.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @NUM_PHY_CTX = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @iwl_mvm_power_ps_disabled_iterator], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @iwl_mvm_power_ps_disabled_iterator(ptr nocapture noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 { %4 = tail call ptr @iwl_mvm_vif_from_mac80211(ptr noundef %2) #2 %5 = getelementptr inbounds i8, ptr %4, i64 8 %6 = load ptr, ptr %5, align 8, !tbaa !6 %7 = icmp eq ptr %6, null br i1 %7, label %16, label %8 8: ; preds = %3 %9 = load i64, ptr %6, align 8, !tbaa !12 %10 = load i64, ptr @NUM_PHY_CTX, align 8, !tbaa !15 %11 = icmp slt i64 %9, %10 br i1 %11, label %12, label %16 12: ; preds = %8 %13 = load i32, ptr %4, align 8, !tbaa !16 %14 = load i32, ptr %0, align 4, !tbaa !17 %15 = or i32 %14, %13 store i32 %15, ptr %0, align 4, !tbaa !17 br label %16 16: ; preds = %12, %8, %3 ret void } declare ptr @iwl_mvm_vif_from_mac80211(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 8} !7 = !{!"iwl_mvm_vif", !8, i64 0, !11, i64 8} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!13, !14, i64 0} !13 = !{!"TYPE_2__", !14, i64 0} !14 = !{!"long", !9, i64 0} !15 = !{!14, !14, i64 0} !16 = !{!7, !8, i64 0} !17 = !{!8, !8, i64 0}
linux_drivers_net_wireless_intel_iwlwifi_mvm_extr_power.c_iwl_mvm_power_ps_disabled_iterator
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/iwlegacy/extr_3945-mac.c_il3945_hdl_beacon.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/iwlegacy/extr_3945-mac.c_il3945_hdl_beacon.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @TX_STATUS_MSK = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @il3945_hdl_beacon], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @il3945_hdl_beacon(ptr nocapture noundef writeonly %0, ptr noundef %1) #0 { %3 = tail call ptr @rxb_addr(ptr noundef %1) #2 %4 = load i32, ptr %3, align 4, !tbaa !5 %5 = tail call i32 @le32_to_cpu(i32 noundef %4) #2 store i32 %5, ptr %0, align 4, !tbaa !11 ret void } declare ptr @rxb_addr(ptr noundef) local_unnamed_addr #1 declare i32 @le32_to_cpu(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"il3945_beacon_notif", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 12} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"TYPE_4__", !7, i64 0, !7, i64 4, !7, i64 8} !11 = !{!12, !7, i64 0} !12 = !{!"il_priv", !7, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/iwlegacy/extr_3945-mac.c_il3945_hdl_beacon.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/iwlegacy/extr_3945-mac.c_il3945_hdl_beacon.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @TX_STATUS_MSK = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @il3945_hdl_beacon], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @il3945_hdl_beacon(ptr nocapture noundef writeonly %0, ptr noundef %1) #0 { %3 = tail call ptr @rxb_addr(ptr noundef %1) #2 %4 = load i32, ptr %3, align 4, !tbaa !6 %5 = tail call i32 @le32_to_cpu(i32 noundef %4) #2 store i32 %5, ptr %0, align 4, !tbaa !12 ret void } declare ptr @rxb_addr(ptr noundef) local_unnamed_addr #1 declare i32 @le32_to_cpu(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"il3945_beacon_notif", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 12} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"TYPE_4__", !8, i64 0, !8, i64 4, !8, i64 8} !12 = !{!13, !8, i64 0} !13 = !{!"il_priv", !8, i64 0}
fastsocket_kernel_drivers_net_wireless_iwlegacy_extr_3945-mac.c_il3945_hdl_beacon
; ModuleID = 'AnghaBench/systemd/src/login/extr_pam_systemd.c_append_session_memory_max.c' source_filename = "AnghaBench/systemd/src/login/extr_pam_systemd.c_append_session_memory_max.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [9 x i8] c"infinity\00", align 1 @.str.1 = private unnamed_addr constant [5 x i8] c"(sv)\00", align 1 @.str.2 = private unnamed_addr constant [10 x i8] c"MemoryMax\00", align 1 @.str.3 = private unnamed_addr constant [2 x i8] c"t\00", align 1 @LOG_ERR = dso_local local_unnamed_addr global i32 0, align 4 @.str.4 = private unnamed_addr constant [36 x i8] c"Failed to append to bus message: %s\00", align 1 @.str.5 = private unnamed_addr constant [15 x i8] c"MemoryMaxScale\00", align 1 @.str.6 = private unnamed_addr constant [2 x i8] c"u\00", align 1 @UINT32_MAX = dso_local local_unnamed_addr global i32 0, align 4 @LOG_WARNING = dso_local local_unnamed_addr global i32 0, align 4 @.str.7 = private unnamed_addr constant [50 x i8] c"Failed to parse systemd.memory_max: %s, ignoring.\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @append_session_memory_max], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @append_session_memory_max(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 { %4 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3 %5 = tail call i64 @isempty(ptr noundef %2) #3 %6 = icmp eq i64 %5, 0 br i1 %6, label %7, label %44 7: ; preds = %3 %8 = tail call i64 @streq(ptr noundef %2, ptr noundef nonnull @.str) #3 %9 = icmp eq i64 %8, 0 br i1 %9, label %17, label %10 10: ; preds = %7 %11 = tail call i32 @sd_bus_message_append(ptr noundef %1, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3, i32 noundef -1) #3 %12 = icmp slt i32 %11, 0 br i1 %12, label %13, label %44 13: ; preds = %10 %14 = load i32, ptr @LOG_ERR, align 4, !tbaa !5 %15 = tail call ptr @strerror_safe(i32 noundef %11) #3 %16 = tail call i32 @pam_syslog(ptr noundef %0, i32 noundef %14, ptr noundef nonnull @.str.4, ptr noundef %15) #3 br label %44 17: ; preds = %7 %18 = tail call i32 @parse_permille(ptr noundef %2) #3 %19 = icmp sgt i32 %18, -1 br i1 %19, label %20, label %30 20: ; preds = %17 %21 = load i32, ptr @UINT32_MAX, align 4, !tbaa !5 %22 = mul i32 %21, %18 %23 = udiv i32 %22, 1000 %24 = tail call i32 @sd_bus_message_append(ptr noundef %1, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.5, ptr noundef nonnull @.str.6, i32 noundef %23) #3 %25 = icmp slt i32 %24, 0 br i1 %25, label %26, label %44 26: ; preds = %20 %27 = load i32, ptr @LOG_ERR, align 4, !tbaa !5 %28 = tail call ptr @strerror_safe(i32 noundef %24) #3 %29 = tail call i32 @pam_syslog(ptr noundef %0, i32 noundef %27, ptr noundef nonnull @.str.4, ptr noundef %28) #3 br label %44 30: ; preds = %17 %31 = call i32 @parse_size(ptr noundef %2, i32 noundef 1024, ptr noundef nonnull %4) #3 %32 = icmp sgt i32 %31, -1 br i1 %32, label %33, label %41 33: ; preds = %30 %34 = load i32, ptr %4, align 4, !tbaa !5 %35 = call i32 @sd_bus_message_append(ptr noundef %1, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3, i32 noundef %34) #3 %36 = icmp slt i32 %35, 0 br i1 %36, label %37, label %44 37: ; preds = %33 %38 = load i32, ptr @LOG_ERR, align 4, !tbaa !5 %39 = call ptr @strerror_safe(i32 noundef %35) #3 %40 = call i32 @pam_syslog(ptr noundef %0, i32 noundef %38, ptr noundef nonnull @.str.4, ptr noundef %39) #3 br label %44 41: ; preds = %30 %42 = load i32, ptr @LOG_WARNING, align 4, !tbaa !5 %43 = call i32 @pam_syslog(ptr noundef %0, i32 noundef %42, ptr noundef nonnull @.str.7, ptr noundef %2) #3 br label %44 44: ; preds = %10, %41, %33, %20, %3, %37, %26, %13 %45 = phi i32 [ %11, %13 ], [ %24, %26 ], [ %35, %37 ], [ 0, %3 ], [ 0, %20 ], [ 0, %33 ], [ 0, %41 ], [ 0, %10 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3 ret i32 %45 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i64 @isempty(ptr noundef) local_unnamed_addr #2 declare i64 @streq(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @sd_bus_message_append(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @pam_syslog(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare ptr @strerror_safe(i32 noundef) local_unnamed_addr #2 declare i32 @parse_permille(ptr noundef) local_unnamed_addr #2 declare i32 @parse_size(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/systemd/src/login/extr_pam_systemd.c_append_session_memory_max.c' source_filename = "AnghaBench/systemd/src/login/extr_pam_systemd.c_append_session_memory_max.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [9 x i8] c"infinity\00", align 1 @.str.1 = private unnamed_addr constant [5 x i8] c"(sv)\00", align 1 @.str.2 = private unnamed_addr constant [10 x i8] c"MemoryMax\00", align 1 @.str.3 = private unnamed_addr constant [2 x i8] c"t\00", align 1 @LOG_ERR = common local_unnamed_addr global i32 0, align 4 @.str.4 = private unnamed_addr constant [36 x i8] c"Failed to append to bus message: %s\00", align 1 @.str.5 = private unnamed_addr constant [15 x i8] c"MemoryMaxScale\00", align 1 @.str.6 = private unnamed_addr constant [2 x i8] c"u\00", align 1 @UINT32_MAX = common local_unnamed_addr global i32 0, align 4 @LOG_WARNING = common local_unnamed_addr global i32 0, align 4 @.str.7 = private unnamed_addr constant [50 x i8] c"Failed to parse systemd.memory_max: %s, ignoring.\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @append_session_memory_max], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 -2147483648, 1) i32 @append_session_memory_max(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 { %4 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3 %5 = tail call i64 @isempty(ptr noundef %2) #3 %6 = icmp eq i64 %5, 0 br i1 %6, label %7, label %44 7: ; preds = %3 %8 = tail call i64 @streq(ptr noundef %2, ptr noundef nonnull @.str) #3 %9 = icmp eq i64 %8, 0 br i1 %9, label %17, label %10 10: ; preds = %7 %11 = tail call i32 @sd_bus_message_append(ptr noundef %1, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3, i32 noundef -1) #3 %12 = icmp slt i32 %11, 0 br i1 %12, label %13, label %44 13: ; preds = %10 %14 = load i32, ptr @LOG_ERR, align 4, !tbaa !6 %15 = tail call ptr @strerror_safe(i32 noundef %11) #3 %16 = tail call i32 @pam_syslog(ptr noundef %0, i32 noundef %14, ptr noundef nonnull @.str.4, ptr noundef %15) #3 br label %44 17: ; preds = %7 %18 = tail call i32 @parse_permille(ptr noundef %2) #3 %19 = icmp sgt i32 %18, -1 br i1 %19, label %20, label %30 20: ; preds = %17 %21 = load i32, ptr @UINT32_MAX, align 4, !tbaa !6 %22 = mul i32 %21, %18 %23 = udiv i32 %22, 1000 %24 = tail call i32 @sd_bus_message_append(ptr noundef %1, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.5, ptr noundef nonnull @.str.6, i32 noundef %23) #3 %25 = icmp slt i32 %24, 0 br i1 %25, label %26, label %44 26: ; preds = %20 %27 = load i32, ptr @LOG_ERR, align 4, !tbaa !6 %28 = tail call ptr @strerror_safe(i32 noundef %24) #3 %29 = tail call i32 @pam_syslog(ptr noundef %0, i32 noundef %27, ptr noundef nonnull @.str.4, ptr noundef %28) #3 br label %44 30: ; preds = %17 %31 = call i32 @parse_size(ptr noundef %2, i32 noundef 1024, ptr noundef nonnull %4) #3 %32 = icmp sgt i32 %31, -1 br i1 %32, label %33, label %41 33: ; preds = %30 %34 = load i32, ptr %4, align 4, !tbaa !6 %35 = call i32 @sd_bus_message_append(ptr noundef %1, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3, i32 noundef %34) #3 %36 = icmp slt i32 %35, 0 br i1 %36, label %37, label %44 37: ; preds = %33 %38 = load i32, ptr @LOG_ERR, align 4, !tbaa !6 %39 = call ptr @strerror_safe(i32 noundef %35) #3 %40 = call i32 @pam_syslog(ptr noundef %0, i32 noundef %38, ptr noundef nonnull @.str.4, ptr noundef %39) #3 br label %44 41: ; preds = %30 %42 = load i32, ptr @LOG_WARNING, align 4, !tbaa !6 %43 = call i32 @pam_syslog(ptr noundef %0, i32 noundef %42, ptr noundef nonnull @.str.7, ptr noundef %2) #3 br label %44 44: ; preds = %10, %41, %33, %20, %3, %37, %26, %13 %45 = phi i32 [ %11, %13 ], [ %24, %26 ], [ %35, %37 ], [ 0, %3 ], [ 0, %20 ], [ 0, %33 ], [ 0, %41 ], [ 0, %10 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3 ret i32 %45 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i64 @isempty(ptr noundef) local_unnamed_addr #2 declare i64 @streq(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @sd_bus_message_append(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @pam_syslog(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare ptr @strerror_safe(i32 noundef) local_unnamed_addr #2 declare i32 @parse_permille(ptr noundef) local_unnamed_addr #2 declare i32 @parse_size(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
systemd_src_login_extr_pam_systemd.c_append_session_memory_max
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/nfs/extr_proc.c_nfs_proc_rmdir.c' source_filename = "AnghaBench/fastsocket/kernel/fs/nfs/extr_proc.c_nfs_proc_rmdir.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.nfs_diropargs = type { i32, i32, i32 } %struct.rpc_message = type { ptr, ptr } @nfs_procedures = dso_local local_unnamed_addr global ptr null, align 8 @NFSPROC_RMDIR = dso_local local_unnamed_addr global i64 0, align 8 @.str = private unnamed_addr constant [20 x i8] c"NFS call rmdir %s\0A\00", align 1 @.str.1 = private unnamed_addr constant [21 x i8] c"NFS reply rmdir: %d\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @nfs_proc_rmdir], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @nfs_proc_rmdir(ptr noundef %0, ptr nocapture noundef readonly %1) #0 { %3 = alloca %struct.nfs_diropargs, align 8 %4 = alloca %struct.rpc_message, align 8 call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #3 %5 = load <2 x i32>, ptr %1, align 4, !tbaa !5 store <2 x i32> %5, ptr %3, align 8, !tbaa !5 %6 = getelementptr inbounds %struct.nfs_diropargs, ptr %3, i64 0, i32 2 %7 = tail call i32 @NFS_FH(ptr noundef %0) #3 store i32 %7, ptr %6, align 8, !tbaa !9 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3 store ptr %3, ptr %4, align 8, !tbaa !11 %8 = getelementptr inbounds %struct.rpc_message, ptr %4, i64 0, i32 1 %9 = load ptr, ptr @nfs_procedures, align 8, !tbaa !14 %10 = load i64, ptr @NFSPROC_RMDIR, align 8, !tbaa !15 %11 = getelementptr inbounds i32, ptr %9, i64 %10 store ptr %11, ptr %8, align 8, !tbaa !17 %12 = load i32, ptr %1, align 4, !tbaa !18 %13 = call i32 @dprintk(ptr noundef nonnull @.str, i32 noundef %12) #3 %14 = call i32 @NFS_CLIENT(ptr noundef %0) #3 %15 = call i32 @rpc_call_sync(i32 noundef %14, ptr noundef nonnull %4, i32 noundef 0) #3 %16 = call i32 @nfs_mark_for_revalidate(ptr noundef %0) #3 %17 = call i32 @dprintk(ptr noundef nonnull @.str.1, i32 noundef %15) #3 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3 call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #3 ret i32 %15 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @NFS_FH(ptr noundef) local_unnamed_addr #2 declare i32 @dprintk(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @rpc_call_sync(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @NFS_CLIENT(ptr noundef) local_unnamed_addr #2 declare i32 @nfs_mark_for_revalidate(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 8} !10 = !{!"nfs_diropargs", !6, i64 0, !6, i64 4, !6, i64 8} !11 = !{!12, !13, i64 0} !12 = !{!"rpc_message", !13, i64 0, !13, i64 8} !13 = !{!"any pointer", !7, i64 0} !14 = !{!13, !13, i64 0} !15 = !{!16, !16, i64 0} !16 = !{!"long", !7, i64 0} !17 = !{!12, !13, i64 8} !18 = !{!19, !6, i64 0} !19 = !{!"qstr", !6, i64 0, !6, i64 4}
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/nfs/extr_proc.c_nfs_proc_rmdir.c' source_filename = "AnghaBench/fastsocket/kernel/fs/nfs/extr_proc.c_nfs_proc_rmdir.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.nfs_diropargs = type { i32, i32, i32 } %struct.rpc_message = type { ptr, ptr } @nfs_procedures = common local_unnamed_addr global ptr null, align 8 @NFSPROC_RMDIR = common local_unnamed_addr global i64 0, align 8 @.str = private unnamed_addr constant [20 x i8] c"NFS call rmdir %s\0A\00", align 1 @.str.1 = private unnamed_addr constant [21 x i8] c"NFS reply rmdir: %d\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @nfs_proc_rmdir], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @nfs_proc_rmdir(ptr noundef %0, ptr nocapture noundef readonly %1) #0 { %3 = alloca %struct.nfs_diropargs, align 8 %4 = alloca %struct.rpc_message, align 8 call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #3 %5 = load <2 x i32>, ptr %1, align 4, !tbaa !6 store <2 x i32> %5, ptr %3, align 8, !tbaa !6 %6 = getelementptr inbounds i8, ptr %3, i64 8 %7 = tail call i32 @NFS_FH(ptr noundef %0) #3 store i32 %7, ptr %6, align 8, !tbaa !10 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3 store ptr %3, ptr %4, align 8, !tbaa !12 %8 = getelementptr inbounds i8, ptr %4, i64 8 %9 = load ptr, ptr @nfs_procedures, align 8, !tbaa !15 %10 = load i64, ptr @NFSPROC_RMDIR, align 8, !tbaa !16 %11 = getelementptr inbounds i32, ptr %9, i64 %10 store ptr %11, ptr %8, align 8, !tbaa !18 %12 = load i32, ptr %1, align 4, !tbaa !19 %13 = call i32 @dprintk(ptr noundef nonnull @.str, i32 noundef %12) #3 %14 = call i32 @NFS_CLIENT(ptr noundef %0) #3 %15 = call i32 @rpc_call_sync(i32 noundef %14, ptr noundef nonnull %4, i32 noundef 0) #3 %16 = call i32 @nfs_mark_for_revalidate(ptr noundef %0) #3 %17 = call i32 @dprintk(ptr noundef nonnull @.str.1, i32 noundef %15) #3 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3 call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #3 ret i32 %15 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @NFS_FH(ptr noundef) local_unnamed_addr #2 declare i32 @dprintk(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @rpc_call_sync(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @NFS_CLIENT(ptr noundef) local_unnamed_addr #2 declare i32 @nfs_mark_for_revalidate(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 8} !11 = !{!"nfs_diropargs", !7, i64 0, !7, i64 4, !7, i64 8} !12 = !{!13, !14, i64 0} !13 = !{!"rpc_message", !14, i64 0, !14, i64 8} !14 = !{!"any pointer", !8, i64 0} !15 = !{!14, !14, i64 0} !16 = !{!17, !17, i64 0} !17 = !{!"long", !8, i64 0} !18 = !{!13, !14, i64 8} !19 = !{!20, !7, i64 0} !20 = !{!"qstr", !7, i64 0, !7, i64 4}
fastsocket_kernel_fs_nfs_extr_proc.c_nfs_proc_rmdir
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_cik_sdma.c_cik_sdma_ctx_switch_enable.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_cik_sdma.c_cik_sdma_ctx_switch_enable.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @SDMA0_REGISTER_OFFSET = dso_local local_unnamed_addr global i64 0, align 8 @SDMA1_REGISTER_OFFSET = dso_local local_unnamed_addr global i64 0, align 8 @SDMA0_CNTL = dso_local local_unnamed_addr global i64 0, align 8 @AUTO_CTXSW_ENABLE = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @cik_sdma_ctx_switch_enable], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @cik_sdma_ctx_switch_enable(ptr nocapture readnone %0, i32 noundef %1) #0 { %3 = icmp eq i32 %1, 0 %4 = load i64, ptr @SDMA0_REGISTER_OFFSET, align 8 %5 = load i64, ptr @SDMA0_CNTL, align 8, !tbaa !5 %6 = add nsw i64 %5, %4 %7 = tail call i64 @RREG32(i64 noundef %6) #2 %8 = load i64, ptr @AUTO_CTXSW_ENABLE, align 8, !tbaa !5 %9 = or i64 %8, %7 %10 = xor i64 %8, -1 %11 = and i64 %7, %10 %12 = select i1 %3, i64 %11, i64 %9 %13 = load i64, ptr @SDMA0_CNTL, align 8, !tbaa !5 %14 = add nsw i64 %13, %4 %15 = tail call i32 @WREG32(i64 noundef %14, i64 noundef %12) #2 %16 = load i64, ptr @SDMA1_REGISTER_OFFSET, align 8 %17 = load i64, ptr @SDMA0_CNTL, align 8, !tbaa !5 %18 = add nsw i64 %17, %16 %19 = tail call i64 @RREG32(i64 noundef %18) #2 %20 = load i64, ptr @AUTO_CTXSW_ENABLE, align 8, !tbaa !5 %21 = or i64 %20, %19 %22 = xor i64 %20, -1 %23 = and i64 %19, %22 %24 = select i1 %3, i64 %23, i64 %21 %25 = load i64, ptr @SDMA0_CNTL, align 8, !tbaa !5 %26 = add nsw i64 %25, %16 %27 = tail call i32 @WREG32(i64 noundef %26, i64 noundef %24) #2 ret void } declare i64 @RREG32(i64 noundef) local_unnamed_addr #1 declare i32 @WREG32(i64 noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_cik_sdma.c_cik_sdma_ctx_switch_enable.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_cik_sdma.c_cik_sdma_ctx_switch_enable.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @SDMA0_REGISTER_OFFSET = common local_unnamed_addr global i64 0, align 8 @SDMA1_REGISTER_OFFSET = common local_unnamed_addr global i64 0, align 8 @SDMA0_CNTL = common local_unnamed_addr global i64 0, align 8 @AUTO_CTXSW_ENABLE = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @cik_sdma_ctx_switch_enable], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @cik_sdma_ctx_switch_enable(ptr nocapture readnone %0, i32 noundef %1) #0 { %3 = icmp eq i32 %1, 0 %4 = load i64, ptr @SDMA0_REGISTER_OFFSET, align 8 %5 = load i64, ptr @SDMA0_CNTL, align 8, !tbaa !6 %6 = add nsw i64 %5, %4 %7 = tail call i64 @RREG32(i64 noundef %6) #2 %8 = load i64, ptr @AUTO_CTXSW_ENABLE, align 8, !tbaa !6 %9 = or i64 %8, %7 %10 = xor i64 %8, -1 %11 = and i64 %7, %10 %12 = select i1 %3, i64 %11, i64 %9 %13 = load i64, ptr @SDMA0_CNTL, align 8, !tbaa !6 %14 = add nsw i64 %13, %4 %15 = tail call i32 @WREG32(i64 noundef %14, i64 noundef %12) #2 %16 = load i64, ptr @SDMA1_REGISTER_OFFSET, align 8 %17 = load i64, ptr @SDMA0_CNTL, align 8, !tbaa !6 %18 = add nsw i64 %17, %16 %19 = tail call i64 @RREG32(i64 noundef %18) #2 %20 = load i64, ptr @AUTO_CTXSW_ENABLE, align 8, !tbaa !6 %21 = or i64 %20, %19 %22 = xor i64 %20, -1 %23 = and i64 %19, %22 %24 = select i1 %3, i64 %23, i64 %21 %25 = load i64, ptr @SDMA0_CNTL, align 8, !tbaa !6 %26 = add nsw i64 %25, %16 %27 = tail call i32 @WREG32(i64 noundef %26, i64 noundef %24) #2 ret void } declare i64 @RREG32(i64 noundef) local_unnamed_addr #1 declare i32 @WREG32(i64 noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_drivers_gpu_drm_radeon_extr_cik_sdma.c_cik_sdma_ctx_switch_enable
; ModuleID = 'AnghaBench/xLua/build/luajit-2.1.0b2/src/extr_lj_vmevent.c_lj_vmevent_call.c' source_filename = "AnghaBench/xLua/build/luajit-2.1.0b2/src/extr_lj_vmevent.c_lj_vmevent_call.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [20 x i8] c"VM handler failed: \00", align 1 @stderr = dso_local local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [2 x i8] c"?\00", align 1 @VMEVENT_NOCACHE = dso_local local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind uwtable define dso_local void @lj_vmevent_call(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 { %3 = tail call ptr @G(ptr noundef %0) #2 %4 = load i64, ptr %3, align 8, !tbaa !5 %5 = tail call i64 @hook_save(ptr noundef nonnull %3) #2 store i64 0, ptr %3, align 8, !tbaa !5 %6 = tail call i32 @hook_vmevent(ptr noundef nonnull %3) #2 %7 = tail call i32 @restorestack(ptr noundef %0, i32 noundef %1) #2 %8 = tail call i32 @lj_vm_pcall(ptr noundef %0, i32 noundef %7, i64 noundef 1, i32 noundef 0) #2 %9 = tail call i64 @LJ_UNLIKELY(i32 noundef %8) #2 %10 = icmp eq i64 %9, 0 br i1 %10, label %28, label %11 11: ; preds = %2 %12 = load i32, ptr %0, align 4, !tbaa !10 %13 = add nsw i32 %12, -1 store i32 %13, ptr %0, align 4, !tbaa !10 %14 = load i32, ptr @stderr, align 4, !tbaa !13 %15 = tail call i32 @fputs(ptr noundef nonnull @.str, i32 noundef %14) #2 %16 = load i32, ptr %0, align 4, !tbaa !10 %17 = tail call i64 @tvisstr(i32 noundef %16) #2 %18 = icmp eq i64 %17, 0 br i1 %18, label %22, label %19 19: ; preds = %11 %20 = load i32, ptr %0, align 4, !tbaa !10 %21 = tail call ptr @strVdata(i32 noundef %20) #2 br label %22 22: ; preds = %11, %19 %23 = phi ptr [ %21, %19 ], [ @.str.1, %11 ] %24 = load i32, ptr @stderr, align 4, !tbaa !13 %25 = tail call i32 @fputs(ptr noundef %23, i32 noundef %24) #2 %26 = load i32, ptr @stderr, align 4, !tbaa !13 %27 = tail call i32 @fputc(i8 noundef signext 10, i32 noundef %26) #2 br label %28 28: ; preds = %22, %2 %29 = tail call i32 @hook_restore(ptr noundef nonnull %3, i64 noundef %5) #2 %30 = load i64, ptr %3, align 8, !tbaa !5 %31 = load i64, ptr @VMEVENT_NOCACHE, align 8, !tbaa !14 %32 = icmp eq i64 %30, %31 br i1 %32, label %34, label %33 33: ; preds = %28 store i64 %4, ptr %3, align 8, !tbaa !5 br label %34 34: ; preds = %33, %28 ret void } declare ptr @G(ptr noundef) local_unnamed_addr #1 declare i64 @hook_save(ptr noundef) local_unnamed_addr #1 declare i32 @hook_vmevent(ptr noundef) local_unnamed_addr #1 declare i32 @lj_vm_pcall(ptr noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @restorestack(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i64 @LJ_UNLIKELY(i32 noundef) local_unnamed_addr #1 declare i32 @fputs(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i64 @tvisstr(i32 noundef) local_unnamed_addr #1 declare ptr @strVdata(i32 noundef) local_unnamed_addr #1 declare i32 @fputc(i8 noundef signext, i32 noundef) local_unnamed_addr #1 declare i32 @hook_restore(ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_12__", !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"TYPE_11__", !12, i64 0} !12 = !{!"int", !8, i64 0} !13 = !{!12, !12, i64 0} !14 = !{!7, !7, i64 0}
; ModuleID = 'AnghaBench/xLua/build/luajit-2.1.0b2/src/extr_lj_vmevent.c_lj_vmevent_call.c' source_filename = "AnghaBench/xLua/build/luajit-2.1.0b2/src/extr_lj_vmevent.c_lj_vmevent_call.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [20 x i8] c"VM handler failed: \00", align 1 @stderr = common local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [2 x i8] c"?\00", align 1 @VMEVENT_NOCACHE = common local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind ssp uwtable(sync) define void @lj_vmevent_call(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 { %3 = tail call ptr @G(ptr noundef %0) #2 %4 = load i64, ptr %3, align 8, !tbaa !6 %5 = tail call i64 @hook_save(ptr noundef nonnull %3) #2 store i64 0, ptr %3, align 8, !tbaa !6 %6 = tail call i32 @hook_vmevent(ptr noundef nonnull %3) #2 %7 = tail call i32 @restorestack(ptr noundef %0, i32 noundef %1) #2 %8 = tail call i32 @lj_vm_pcall(ptr noundef %0, i32 noundef %7, i64 noundef 1, i32 noundef 0) #2 %9 = tail call i64 @LJ_UNLIKELY(i32 noundef %8) #2 %10 = icmp eq i64 %9, 0 br i1 %10, label %28, label %11 11: ; preds = %2 %12 = load i32, ptr %0, align 4, !tbaa !11 %13 = add nsw i32 %12, -1 store i32 %13, ptr %0, align 4, !tbaa !11 %14 = load i32, ptr @stderr, align 4, !tbaa !14 %15 = tail call i32 @fputs(ptr noundef nonnull @.str, i32 noundef %14) #2 %16 = load i32, ptr %0, align 4, !tbaa !11 %17 = tail call i64 @tvisstr(i32 noundef %16) #2 %18 = icmp eq i64 %17, 0 br i1 %18, label %22, label %19 19: ; preds = %11 %20 = load i32, ptr %0, align 4, !tbaa !11 %21 = tail call ptr @strVdata(i32 noundef %20) #2 br label %22 22: ; preds = %11, %19 %23 = phi ptr [ %21, %19 ], [ @.str.1, %11 ] %24 = load i32, ptr @stderr, align 4, !tbaa !14 %25 = tail call i32 @fputs(ptr noundef %23, i32 noundef %24) #2 %26 = load i32, ptr @stderr, align 4, !tbaa !14 %27 = tail call i32 @fputc(i8 noundef signext 10, i32 noundef %26) #2 br label %28 28: ; preds = %22, %2 %29 = tail call i32 @hook_restore(ptr noundef nonnull %3, i64 noundef %5) #2 %30 = load i64, ptr %3, align 8, !tbaa !6 %31 = load i64, ptr @VMEVENT_NOCACHE, align 8, !tbaa !15 %32 = icmp eq i64 %30, %31 br i1 %32, label %34, label %33 33: ; preds = %28 store i64 %4, ptr %3, align 8, !tbaa !6 br label %34 34: ; preds = %33, %28 ret void } declare ptr @G(ptr noundef) local_unnamed_addr #1 declare i64 @hook_save(ptr noundef) local_unnamed_addr #1 declare i32 @hook_vmevent(ptr noundef) local_unnamed_addr #1 declare i32 @lj_vm_pcall(ptr noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @restorestack(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i64 @LJ_UNLIKELY(i32 noundef) local_unnamed_addr #1 declare i32 @fputs(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i64 @tvisstr(i32 noundef) local_unnamed_addr #1 declare ptr @strVdata(i32 noundef) local_unnamed_addr #1 declare i32 @fputc(i8 noundef signext, i32 noundef) local_unnamed_addr #1 declare i32 @hook_restore(ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_12__", !8, i64 0} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !13, i64 0} !12 = !{!"TYPE_11__", !13, i64 0} !13 = !{!"int", !9, i64 0} !14 = !{!13, !13, i64 0} !15 = !{!8, !8, i64 0}
xLua_build_luajit-2.1.0b2_src_extr_lj_vmevent.c_lj_vmevent_call