IR_x86 string | IR_arm string | filename string |
|---|---|---|
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/rme9652/extr_hdspm.c_snd_hdspm_midi_input_close.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/rme9652/extr_hdspm.c_snd_hdspm_midi_input_close.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.hdspm_midi = type { i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_hdspm_midi_input_close], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @snd_hdspm_midi_input_close(ptr noundef %0) #0 {
%2 = tail call i32 @snd_hdspm_midi_input_trigger(ptr noundef %0, i32 noundef 0) #2
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = load ptr, ptr %3, align 8, !tbaa !10
%5 = tail call i32 @spin_lock_irq(ptr noundef %4) #2
%6 = getelementptr inbounds %struct.hdspm_midi, ptr %4, i64 0, i32 1
store ptr null, ptr %6, align 8, !tbaa !12
%7 = tail call i32 @spin_unlock_irq(ptr noundef %4) #2
ret i32 0
}
declare i32 @snd_hdspm_midi_input_trigger(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irq(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"snd_rawmidi_substream", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
!12 = !{!13, !7, i64 8}
!13 = !{!"hdspm_midi", !14, i64 0, !7, i64 8}
!14 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/rme9652/extr_hdspm.c_snd_hdspm_midi_input_close.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/rme9652/extr_hdspm.c_snd_hdspm_midi_input_close.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @snd_hdspm_midi_input_close], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @snd_hdspm_midi_input_close(ptr noundef %0) #0 {
%2 = tail call i32 @snd_hdspm_midi_input_trigger(ptr noundef %0, i32 noundef 0) #2
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load ptr, ptr %3, align 8, !tbaa !11
%5 = tail call i32 @spin_lock_irq(ptr noundef %4) #2
%6 = getelementptr inbounds i8, ptr %4, i64 8
store ptr null, ptr %6, align 8, !tbaa !13
%7 = tail call i32 @spin_unlock_irq(ptr noundef %4) #2
ret i32 0
}
declare i32 @snd_hdspm_midi_input_trigger(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irq(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"snd_rawmidi_substream", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_2__", !8, i64 0}
!13 = !{!14, !8, i64 8}
!14 = !{!"hdspm_midi", !15, i64 0, !8, i64 8}
!15 = !{!"int", !9, i64 0}
| fastsocket_kernel_sound_pci_rme9652_extr_hdspm.c_snd_hdspm_midi_input_close |
; ModuleID = 'AnghaBench/freebsd/cddl/contrib/opensolaris/lib/libzfs/common/extr_libzfs_pool.c_zpool_get_name.c'
source_filename = "AnghaBench/freebsd/cddl/contrib/opensolaris/lib/libzfs/common/extr_libzfs_pool.c_zpool_get_name.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define dso_local ptr @zpool_get_name(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/cddl/contrib/opensolaris/lib/libzfs/common/extr_libzfs_pool.c_zpool_get_name.c'
source_filename = "AnghaBench/freebsd/cddl/contrib/opensolaris/lib/libzfs/common/extr_libzfs_pool.c_zpool_get_name.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define ptr @zpool_get_name(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_cddl_contrib_opensolaris_lib_libzfs_common_extr_libzfs_pool.c_zpool_get_name |
; ModuleID = 'AnghaBench/tengine/src/http/modules/extr_ngx_http_realip_module.c_ngx_http_realip_remote_addr_variable.c'
source_filename = "AnghaBench/tengine/src/http/modules/extr_ngx_http_realip_module.c_ngx_http_realip_remote_addr_variable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_11__ = type { i32, i32 }
%struct.TYPE_12__ = type { i32, i32, i64, i64, i32 }
@NGX_OK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ngx_http_realip_remote_addr_variable], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ngx_http_realip_remote_addr_variable(ptr noundef %0, ptr nocapture noundef writeonly %1, i64 %2) #0 {
%4 = tail call ptr @ngx_http_realip_get_module_ctx(ptr noundef %0) #3
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = load ptr, ptr %0, align 8, !tbaa !5
br label %8
8: ; preds = %3, %6
%9 = phi ptr [ %7, %6 ], [ %4, %3 ]
%10 = getelementptr inbounds %struct.TYPE_11__, ptr %9, i64 0, i32 1
%11 = load i32, ptr %10, align 4, !tbaa !10
%12 = getelementptr inbounds %struct.TYPE_12__, ptr %1, i64 0, i32 4
store i32 %11, ptr %12, align 8, !tbaa !13
store i32 1, ptr %1, align 8, !tbaa !16
%13 = getelementptr inbounds %struct.TYPE_12__, ptr %1, i64 0, i32 2
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %13, i8 0, i64 16, i1 false)
%14 = load i32, ptr %9, align 4, !tbaa !17
%15 = getelementptr inbounds %struct.TYPE_12__, ptr %1, i64 0, i32 1
store i32 %14, ptr %15, align 4, !tbaa !18
%16 = load i32, ptr @NGX_OK, align 4, !tbaa !19
ret i32 %16
}
declare ptr @ngx_http_realip_get_module_ctx(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_13__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 4}
!11 = !{!"TYPE_11__", !12, i64 0, !12, i64 4}
!12 = !{!"int", !8, i64 0}
!13 = !{!14, !12, i64 24}
!14 = !{!"TYPE_12__", !12, i64 0, !12, i64 4, !15, i64 8, !15, i64 16, !12, i64 24}
!15 = !{!"long", !8, i64 0}
!16 = !{!14, !12, i64 0}
!17 = !{!11, !12, i64 0}
!18 = !{!14, !12, i64 4}
!19 = !{!12, !12, i64 0}
| ; ModuleID = 'AnghaBench/tengine/src/http/modules/extr_ngx_http_realip_module.c_ngx_http_realip_remote_addr_variable.c'
source_filename = "AnghaBench/tengine/src/http/modules/extr_ngx_http_realip_module.c_ngx_http_realip_remote_addr_variable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NGX_OK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ngx_http_realip_remote_addr_variable], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ngx_http_realip_remote_addr_variable(ptr noundef %0, ptr nocapture noundef writeonly %1, i64 %2) #0 {
%4 = tail call ptr @ngx_http_realip_get_module_ctx(ptr noundef %0) #3
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = load ptr, ptr %0, align 8, !tbaa !6
br label %8
8: ; preds = %3, %6
%9 = phi ptr [ %7, %6 ], [ %4, %3 ]
%10 = getelementptr inbounds i8, ptr %9, i64 4
%11 = load i32, ptr %10, align 4, !tbaa !11
%12 = getelementptr inbounds i8, ptr %1, i64 24
store i32 %11, ptr %12, align 8, !tbaa !14
store i32 1, ptr %1, align 8, !tbaa !17
%13 = getelementptr inbounds i8, ptr %1, i64 8
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %13, i8 0, i64 16, i1 false)
%14 = load i32, ptr %9, align 4, !tbaa !18
%15 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %14, ptr %15, align 4, !tbaa !19
%16 = load i32, ptr @NGX_OK, align 4, !tbaa !20
ret i32 %16
}
declare ptr @ngx_http_realip_get_module_ctx(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_13__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 4}
!12 = !{!"TYPE_11__", !13, i64 0, !13, i64 4}
!13 = !{!"int", !9, i64 0}
!14 = !{!15, !13, i64 24}
!15 = !{!"TYPE_12__", !13, i64 0, !13, i64 4, !16, i64 8, !16, i64 16, !13, i64 24}
!16 = !{!"long", !9, i64 0}
!17 = !{!15, !13, i64 0}
!18 = !{!12, !13, i64 0}
!19 = !{!15, !13, i64 4}
!20 = !{!13, !13, i64 0}
| tengine_src_http_modules_extr_ngx_http_realip_module.c_ngx_http_realip_remote_addr_variable |
; ModuleID = 'AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_socket_tcp.c_ngx_http_lua_socket_tcp_close.c'
source_filename = "AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_socket_tcp.c_ngx_http_lua_socket_tcp_close.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_9__ = type { i64, i64, ptr, i64, i64, %struct.TYPE_8__ }
%struct.TYPE_8__ = type { ptr }
@.str = private unnamed_addr constant [56 x i8] c"expecting 1 argument (including the object) but seen %d\00", align 1
@.str.1 = private unnamed_addr constant [17 x i8] c"no request found\00", align 1
@LUA_TTABLE = dso_local local_unnamed_addr global i32 0, align 4
@SOCKET_CTX_INDEX = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [7 x i8] c"closed\00", align 1
@.str.3 = private unnamed_addr constant [12 x i8] c"bad request\00", align 1
@.str.4 = private unnamed_addr constant [34 x i8] c"attempt to close a request socket\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @ngx_http_lua_socket_tcp_close], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ngx_http_lua_socket_tcp_close(ptr noundef %0) #0 {
%2 = tail call i32 @lua_gettop(ptr noundef %0) #2
%3 = icmp eq i32 %2, 1
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @lua_gettop(ptr noundef %0) #2
%6 = tail call i32 (ptr, ptr, ...) @luaL_error(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %5) #2
br label %57
7: ; preds = %1
%8 = tail call ptr @ngx_http_lua_get_req(ptr noundef %0) #2
%9 = icmp eq ptr %8, null
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = tail call i32 (ptr, ptr, ...) @luaL_error(ptr noundef %0, ptr noundef nonnull @.str.1) #2
br label %57
12: ; preds = %7
%13 = load i32, ptr @LUA_TTABLE, align 4, !tbaa !5
%14 = tail call i32 @luaL_checktype(ptr noundef %0, i32 noundef 1, i32 noundef %13) #2
%15 = load i32, ptr @SOCKET_CTX_INDEX, align 4, !tbaa !5
%16 = tail call i32 @lua_rawgeti(ptr noundef %0, i32 noundef 1, i32 noundef %15) #2
%17 = tail call ptr @lua_touserdata(ptr noundef %0, i32 noundef -1) #2
%18 = tail call i32 @lua_pop(ptr noundef %0, i32 noundef 1) #2
%19 = icmp eq ptr %17, null
br i1 %19, label %32, label %20
20: ; preds = %12
%21 = getelementptr inbounds %struct.TYPE_9__, ptr %17, i64 0, i32 5
%22 = load ptr, ptr %21, align 8, !tbaa !9
%23 = icmp eq ptr %22, null
br i1 %23, label %32, label %24
24: ; preds = %20
%25 = getelementptr inbounds %struct.TYPE_9__, ptr %17, i64 0, i32 4
%26 = load i64, ptr %25, align 8, !tbaa !14
%27 = icmp eq i64 %26, 0
br i1 %27, label %35, label %28
28: ; preds = %24
%29 = getelementptr inbounds %struct.TYPE_9__, ptr %17, i64 0, i32 3
%30 = load i64, ptr %29, align 8, !tbaa !15
%31 = icmp eq i64 %30, 0
br i1 %31, label %35, label %32
32: ; preds = %28, %20, %12
%33 = tail call i32 @lua_pushnil(ptr noundef %0) #2
%34 = tail call i32 @lua_pushliteral(ptr noundef %0, ptr noundef nonnull @.str.2) #2
br label %57
35: ; preds = %28, %24
%36 = getelementptr inbounds %struct.TYPE_9__, ptr %17, i64 0, i32 2
%37 = load ptr, ptr %36, align 8, !tbaa !16
%38 = icmp eq ptr %37, %8
br i1 %38, label %41, label %39
39: ; preds = %35
%40 = tail call i32 (ptr, ptr, ...) @luaL_error(ptr noundef %0, ptr noundef nonnull @.str.3) #2
br label %57
41: ; preds = %35
%42 = tail call i32 @ngx_http_lua_socket_check_busy_connecting(ptr noundef nonnull %8, ptr noundef nonnull %17, ptr noundef %0) #2
%43 = tail call i32 @ngx_http_lua_socket_check_busy_reading(ptr noundef nonnull %8, ptr noundef nonnull %17, ptr noundef %0) #2
%44 = tail call i32 @ngx_http_lua_socket_check_busy_writing(ptr noundef nonnull %8, ptr noundef nonnull %17, ptr noundef %0) #2
%45 = getelementptr inbounds %struct.TYPE_9__, ptr %17, i64 0, i32 1
%46 = load i64, ptr %45, align 8, !tbaa !17
%47 = icmp eq i64 %46, 0
br i1 %47, label %48, label %51
48: ; preds = %41
%49 = load i64, ptr %17, align 8, !tbaa !18
%50 = icmp eq i64 %49, 0
br i1 %50, label %54, label %51
51: ; preds = %48, %41
%52 = tail call i32 @lua_pushnil(ptr noundef %0) #2
%53 = tail call i32 @lua_pushliteral(ptr noundef %0, ptr noundef nonnull @.str.4) #2
br label %57
54: ; preds = %48
%55 = tail call i32 @ngx_http_lua_socket_tcp_finalize(ptr noundef nonnull %8, ptr noundef nonnull %17) #2
%56 = tail call i32 @lua_pushinteger(ptr noundef %0, i32 noundef 1) #2
br label %57
57: ; preds = %54, %51, %39, %32, %10, %4
%58 = phi i32 [ %6, %4 ], [ %11, %10 ], [ 2, %32 ], [ %40, %39 ], [ 2, %51 ], [ 1, %54 ]
ret i32 %58
}
declare i32 @lua_gettop(ptr noundef) local_unnamed_addr #1
declare i32 @luaL_error(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare ptr @ngx_http_lua_get_req(ptr noundef) local_unnamed_addr #1
declare i32 @luaL_checktype(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_rawgeti(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @lua_touserdata(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_pop(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_pushnil(ptr noundef) local_unnamed_addr #1
declare i32 @lua_pushliteral(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ngx_http_lua_socket_check_busy_connecting(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ngx_http_lua_socket_check_busy_reading(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ngx_http_lua_socket_check_busy_writing(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ngx_http_lua_socket_tcp_finalize(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @lua_pushinteger(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 40}
!10 = !{!"TYPE_9__", !11, i64 0, !11, i64 8, !12, i64 16, !11, i64 24, !11, i64 32, !13, i64 40}
!11 = !{!"long", !7, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!"TYPE_8__", !12, i64 0}
!14 = !{!10, !11, i64 32}
!15 = !{!10, !11, i64 24}
!16 = !{!10, !12, i64 16}
!17 = !{!10, !11, i64 8}
!18 = !{!10, !11, i64 0}
| ; ModuleID = 'AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_socket_tcp.c_ngx_http_lua_socket_tcp_close.c'
source_filename = "AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_socket_tcp.c_ngx_http_lua_socket_tcp_close.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [56 x i8] c"expecting 1 argument (including the object) but seen %d\00", align 1
@.str.1 = private unnamed_addr constant [17 x i8] c"no request found\00", align 1
@LUA_TTABLE = common local_unnamed_addr global i32 0, align 4
@SOCKET_CTX_INDEX = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [7 x i8] c"closed\00", align 1
@.str.3 = private unnamed_addr constant [12 x i8] c"bad request\00", align 1
@.str.4 = private unnamed_addr constant [34 x i8] c"attempt to close a request socket\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ngx_http_lua_socket_tcp_close], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ngx_http_lua_socket_tcp_close(ptr noundef %0) #0 {
%2 = tail call i32 @lua_gettop(ptr noundef %0) #2
%3 = icmp eq i32 %2, 1
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @lua_gettop(ptr noundef %0) #2
%6 = tail call i32 (ptr, ptr, ...) @luaL_error(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %5) #2
br label %57
7: ; preds = %1
%8 = tail call ptr @ngx_http_lua_get_req(ptr noundef %0) #2
%9 = icmp eq ptr %8, null
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = tail call i32 (ptr, ptr, ...) @luaL_error(ptr noundef %0, ptr noundef nonnull @.str.1) #2
br label %57
12: ; preds = %7
%13 = load i32, ptr @LUA_TTABLE, align 4, !tbaa !6
%14 = tail call i32 @luaL_checktype(ptr noundef %0, i32 noundef 1, i32 noundef %13) #2
%15 = load i32, ptr @SOCKET_CTX_INDEX, align 4, !tbaa !6
%16 = tail call i32 @lua_rawgeti(ptr noundef %0, i32 noundef 1, i32 noundef %15) #2
%17 = tail call ptr @lua_touserdata(ptr noundef %0, i32 noundef -1) #2
%18 = tail call i32 @lua_pop(ptr noundef %0, i32 noundef 1) #2
%19 = icmp eq ptr %17, null
br i1 %19, label %32, label %20
20: ; preds = %12
%21 = getelementptr inbounds i8, ptr %17, i64 40
%22 = load ptr, ptr %21, align 8, !tbaa !10
%23 = icmp eq ptr %22, null
br i1 %23, label %32, label %24
24: ; preds = %20
%25 = getelementptr inbounds i8, ptr %17, i64 32
%26 = load i64, ptr %25, align 8, !tbaa !15
%27 = icmp eq i64 %26, 0
br i1 %27, label %35, label %28
28: ; preds = %24
%29 = getelementptr inbounds i8, ptr %17, i64 24
%30 = load i64, ptr %29, align 8, !tbaa !16
%31 = icmp eq i64 %30, 0
br i1 %31, label %35, label %32
32: ; preds = %28, %20, %12
%33 = tail call i32 @lua_pushnil(ptr noundef %0) #2
%34 = tail call i32 @lua_pushliteral(ptr noundef %0, ptr noundef nonnull @.str.2) #2
br label %57
35: ; preds = %28, %24
%36 = getelementptr inbounds i8, ptr %17, i64 16
%37 = load ptr, ptr %36, align 8, !tbaa !17
%38 = icmp eq ptr %37, %8
br i1 %38, label %41, label %39
39: ; preds = %35
%40 = tail call i32 (ptr, ptr, ...) @luaL_error(ptr noundef %0, ptr noundef nonnull @.str.3) #2
br label %57
41: ; preds = %35
%42 = tail call i32 @ngx_http_lua_socket_check_busy_connecting(ptr noundef nonnull %8, ptr noundef nonnull %17, ptr noundef %0) #2
%43 = tail call i32 @ngx_http_lua_socket_check_busy_reading(ptr noundef nonnull %8, ptr noundef nonnull %17, ptr noundef %0) #2
%44 = tail call i32 @ngx_http_lua_socket_check_busy_writing(ptr noundef nonnull %8, ptr noundef nonnull %17, ptr noundef %0) #2
%45 = getelementptr inbounds i8, ptr %17, i64 8
%46 = load i64, ptr %45, align 8, !tbaa !18
%47 = icmp eq i64 %46, 0
br i1 %47, label %48, label %51
48: ; preds = %41
%49 = load i64, ptr %17, align 8, !tbaa !19
%50 = icmp eq i64 %49, 0
br i1 %50, label %54, label %51
51: ; preds = %48, %41
%52 = tail call i32 @lua_pushnil(ptr noundef %0) #2
%53 = tail call i32 @lua_pushliteral(ptr noundef %0, ptr noundef nonnull @.str.4) #2
br label %57
54: ; preds = %48
%55 = tail call i32 @ngx_http_lua_socket_tcp_finalize(ptr noundef nonnull %8, ptr noundef nonnull %17) #2
%56 = tail call i32 @lua_pushinteger(ptr noundef %0, i32 noundef 1) #2
br label %57
57: ; preds = %54, %51, %39, %32, %10, %4
%58 = phi i32 [ %6, %4 ], [ %11, %10 ], [ 2, %32 ], [ %40, %39 ], [ 2, %51 ], [ 1, %54 ]
ret i32 %58
}
declare i32 @lua_gettop(ptr noundef) local_unnamed_addr #1
declare i32 @luaL_error(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare ptr @ngx_http_lua_get_req(ptr noundef) local_unnamed_addr #1
declare i32 @luaL_checktype(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_rawgeti(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @lua_touserdata(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_pop(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_pushnil(ptr noundef) local_unnamed_addr #1
declare i32 @lua_pushliteral(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ngx_http_lua_socket_check_busy_connecting(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ngx_http_lua_socket_check_busy_reading(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ngx_http_lua_socket_check_busy_writing(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ngx_http_lua_socket_tcp_finalize(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @lua_pushinteger(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 40}
!11 = !{!"TYPE_9__", !12, i64 0, !12, i64 8, !13, i64 16, !12, i64 24, !12, i64 32, !14, i64 40}
!12 = !{!"long", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!"TYPE_8__", !13, i64 0}
!15 = !{!11, !12, i64 32}
!16 = !{!11, !12, i64 24}
!17 = !{!11, !13, i64 16}
!18 = !{!11, !12, i64 8}
!19 = !{!11, !12, i64 0}
| tengine_modules_ngx_http_lua_module_src_extr_ngx_http_lua_socket_tcp.c_ngx_http_lua_socket_tcp_close |
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/oxygen/extr_oxygen.c_stereo_output_init.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/oxygen/extr_oxygen.c_stereo_output_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @stereo_output_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @stereo_output_init(ptr noundef %0) #0 {
%2 = tail call i32 @ak4396_init(ptr noundef %0) #2
ret void
}
declare i32 @ak4396_init(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/oxygen/extr_oxygen.c_stereo_output_init.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/oxygen/extr_oxygen.c_stereo_output_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @stereo_output_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @stereo_output_init(ptr noundef %0) #0 {
%2 = tail call i32 @ak4396_init(ptr noundef %0) #2
ret void
}
declare i32 @ak4396_init(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_sound_pci_oxygen_extr_oxygen.c_stereo_output_init |
; ModuleID = 'AnghaBench/timescaledb/tsl/src/compression/extr_utils.h_bits_get_double.c'
source_filename = "AnghaBench/timescaledb/tsl/src/compression/extr_utils.h_bits_get_double.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [37 x i8] c"double is not IEEE double wide float\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @bits_get_double], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal double @bits_get_double(i32 noundef %0) #0 {
%2 = alloca i32, align 4
%3 = alloca double, align 8
store i32 %0, ptr %2, align 4, !tbaa !5
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%4 = tail call i32 @StaticAssertStmt(i32 noundef 0, ptr noundef nonnull @.str) #3
%5 = call i32 @memcpy(ptr noundef nonnull %3, ptr noundef nonnull %2, i32 noundef 8) #3
%6 = load double, ptr %3, align 8, !tbaa !9
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret double %6
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @StaticAssertStmt(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
| ; ModuleID = 'AnghaBench/timescaledb/tsl/src/compression/extr_utils.h_bits_get_double.c'
source_filename = "AnghaBench/timescaledb/tsl/src/compression/extr_utils.h_bits_get_double.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [37 x i8] c"double is not IEEE double wide float\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @bits_get_double], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal double @bits_get_double(i32 noundef %0) #0 {
%2 = alloca i32, align 4
%3 = alloca double, align 8
store i32 %0, ptr %2, align 4, !tbaa !6
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%4 = tail call i32 @StaticAssertStmt(i32 noundef 0, ptr noundef nonnull @.str) #3
%5 = call i32 @memcpy(ptr noundef nonnull %3, ptr noundef nonnull %2, i32 noundef 8) #3
%6 = load double, ptr %3, align 8, !tbaa !10
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret double %6
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @StaticAssertStmt(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"double", !8, i64 0}
| timescaledb_tsl_src_compression_extr_utils.h_bits_get_double |
; ModuleID = 'AnghaBench/freebsd/sys/dev/fdc/extr_fdc_acpi.c_fdc_acpi_probe.c'
source_filename = "AnghaBench/freebsd/sys/dev/fdc/extr_fdc_acpi.c_fdc_acpi_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@fdc_acpi_probe.fdc_ids = internal global [3 x ptr] [ptr @.str, ptr @.str.1, ptr null], align 16
@.str = private unnamed_addr constant [8 x i8] c"PNP0700\00", align 1
@.str.1 = private unnamed_addr constant [8 x i8] c"PNP0701\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"_FDE\00", align 1
@.str.3 = private unnamed_addr constant [30 x i8] c"floppy drive controller (FDE)\00", align 1
@.str.4 = private unnamed_addr constant [24 x i8] c"floppy drive controller\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @fdc_acpi_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @fdc_acpi_probe(i32 noundef %0) #0 {
%2 = tail call i32 @device_get_parent(i32 noundef %0) #2
%3 = tail call i32 @ACPI_ID_PROBE(i32 noundef %2, i32 noundef %0, ptr noundef nonnull @fdc_acpi_probe.fdc_ids, ptr noundef null) #2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %11, label %5
5: ; preds = %1
%6 = tail call i32 @ACPI_EVALUATE_OBJECT(i32 noundef %2, i32 noundef %0, ptr noundef nonnull @.str.2, ptr noundef null, ptr noundef null) #2
%7 = tail call i64 @ACPI_SUCCESS(i32 noundef %6) #2
%8 = icmp eq i64 %7, 0
%9 = select i1 %8, ptr @.str.4, ptr @.str.3
%10 = tail call i32 @device_set_desc(i32 noundef %0, ptr noundef nonnull %9) #2
br label %11
11: ; preds = %5, %1
ret i32 %3
}
declare i32 @device_get_parent(i32 noundef) local_unnamed_addr #1
declare i32 @ACPI_ID_PROBE(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @ACPI_SUCCESS(i32 noundef) local_unnamed_addr #1
declare i32 @ACPI_EVALUATE_OBJECT(i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @device_set_desc(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/fdc/extr_fdc_acpi.c_fdc_acpi_probe.c'
source_filename = "AnghaBench/freebsd/sys/dev/fdc/extr_fdc_acpi.c_fdc_acpi_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@fdc_acpi_probe.fdc_ids = internal global [3 x ptr] [ptr @.str, ptr @.str.1, ptr null], align 8
@.str = private unnamed_addr constant [8 x i8] c"PNP0700\00", align 1
@.str.1 = private unnamed_addr constant [8 x i8] c"PNP0701\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"_FDE\00", align 1
@.str.3 = private unnamed_addr constant [30 x i8] c"floppy drive controller (FDE)\00", align 1
@.str.4 = private unnamed_addr constant [24 x i8] c"floppy drive controller\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @fdc_acpi_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @fdc_acpi_probe(i32 noundef %0) #0 {
%2 = tail call i32 @device_get_parent(i32 noundef %0) #2
%3 = tail call i32 @ACPI_ID_PROBE(i32 noundef %2, i32 noundef %0, ptr noundef nonnull @fdc_acpi_probe.fdc_ids, ptr noundef null) #2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %11, label %5
5: ; preds = %1
%6 = tail call i32 @ACPI_EVALUATE_OBJECT(i32 noundef %2, i32 noundef %0, ptr noundef nonnull @.str.2, ptr noundef null, ptr noundef null) #2
%7 = tail call i64 @ACPI_SUCCESS(i32 noundef %6) #2
%8 = icmp eq i64 %7, 0
%9 = select i1 %8, ptr @.str.4, ptr @.str.3
%10 = tail call i32 @device_set_desc(i32 noundef %0, ptr noundef nonnull %9) #2
br label %11
11: ; preds = %5, %1
ret i32 %3
}
declare i32 @device_get_parent(i32 noundef) local_unnamed_addr #1
declare i32 @ACPI_ID_PROBE(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @ACPI_SUCCESS(i32 noundef) local_unnamed_addr #1
declare i32 @ACPI_EVALUATE_OBJECT(i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @device_set_desc(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_sys_dev_fdc_extr_fdc_acpi.c_fdc_acpi_probe |
; ModuleID = 'AnghaBench/freebsd/sys/arm/ti/extr_ti_gpio.c_ti_gpio_rev.c'
source_filename = "AnghaBench/freebsd/sys/arm/ti/extr_ti_gpio.c_ti_gpio_rev.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@AM335X_GPIO_REV = dso_local local_unnamed_addr global i32 0, align 4
@OMAP4_GPIO_REV = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ti_gpio_rev], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @ti_gpio_rev() #0 {
%1 = tail call i32 (...) @ti_chip() #2
ret i32 0
}
declare i32 @ti_chip(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/sys/arm/ti/extr_ti_gpio.c_ti_gpio_rev.c'
source_filename = "AnghaBench/freebsd/sys/arm/ti/extr_ti_gpio.c_ti_gpio_rev.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@AM335X_GPIO_REV = common local_unnamed_addr global i32 0, align 4
@OMAP4_GPIO_REV = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ti_gpio_rev], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @ti_gpio_rev() #0 {
%1 = tail call i32 @ti_chip() #2
ret i32 0
}
declare i32 @ti_chip(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_sys_arm_ti_extr_ti_gpio.c_ti_gpio_rev |
; ModuleID = 'AnghaBench/linux/drivers/scsi/extr_libiscsi.c_iscsi_data_in_rsp.c'
source_filename = "AnghaBench/linux/drivers/scsi/extr_libiscsi.c_iscsi_data_in_rsp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.iscsi_task = type { i32, ptr }
%struct.iscsi_conn = type { i32, i32, i32 }
%struct.iscsi_data_rsp = type { i32, i32, i32, i32 }
%struct.scsi_cmnd = type { i32, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32 }
@ISCSI_FLAG_DATA_STATUS = dso_local local_unnamed_addr global i32 0, align 4
@DID_OK = dso_local local_unnamed_addr global i32 0, align 4
@ISCSI_FLAG_DATA_UNDERFLOW = dso_local local_unnamed_addr global i32 0, align 4
@ISCSI_FLAG_DATA_OVERFLOW = dso_local local_unnamed_addr global i32 0, align 4
@ISCSI_FLAG_CMD_OVERFLOW = dso_local local_unnamed_addr global i32 0, align 4
@DID_BAD_TARGET = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [50 x i8] c"data in with status done [sc %p res %d itt 0x%x]\0A\00", align 1
@ISCSI_TASK_COMPLETED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @iscsi_data_in_rsp], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @iscsi_data_in_rsp(ptr nocapture noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = getelementptr inbounds %struct.iscsi_task, ptr %2, i64 0, i32 1
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = load i32, ptr %1, align 4, !tbaa !11
%7 = load i32, ptr @ISCSI_FLAG_DATA_STATUS, align 4, !tbaa !13
%8 = and i32 %7, %6
%9 = icmp eq i32 %8, 0
br i1 %9, label %60, label %10
10: ; preds = %3
%11 = getelementptr inbounds %struct.iscsi_conn, ptr %0, i64 0, i32 2
%12 = load i32, ptr %11, align 4, !tbaa !14
%13 = tail call i32 @iscsi_update_cmdsn(i32 noundef %12, ptr noundef nonnull %1) #2
%14 = load i32, ptr @DID_OK, align 4, !tbaa !13
%15 = shl i32 %14, 16
%16 = getelementptr inbounds %struct.iscsi_data_rsp, ptr %1, i64 0, i32 1
%17 = load i32, ptr %16, align 4, !tbaa !16
%18 = or i32 %15, %17
store i32 %18, ptr %5, align 4, !tbaa !17
%19 = getelementptr inbounds %struct.iscsi_data_rsp, ptr %1, i64 0, i32 3
%20 = load i32, ptr %19, align 4, !tbaa !20
%21 = tail call i32 @be32_to_cpu(i32 noundef %20) #2
%22 = add nsw i32 %21, 1
store i32 %22, ptr %0, align 4, !tbaa !21
%23 = load i32, ptr %1, align 4, !tbaa !11
%24 = load i32, ptr @ISCSI_FLAG_DATA_UNDERFLOW, align 4, !tbaa !13
%25 = load i32, ptr @ISCSI_FLAG_DATA_OVERFLOW, align 4, !tbaa !13
%26 = or i32 %25, %24
%27 = and i32 %26, %23
%28 = icmp eq i32 %27, 0
br i1 %28, label %50, label %29
29: ; preds = %10
%30 = getelementptr inbounds %struct.iscsi_data_rsp, ptr %1, i64 0, i32 2
%31 = load i32, ptr %30, align 4, !tbaa !22
%32 = tail call i32 @be32_to_cpu(i32 noundef %31) #2
%33 = icmp sgt i32 %32, 0
br i1 %33, label %34, label %45
34: ; preds = %29
%35 = load i32, ptr %1, align 4, !tbaa !11
%36 = load i32, ptr @ISCSI_FLAG_CMD_OVERFLOW, align 4, !tbaa !13
%37 = and i32 %36, %35
%38 = icmp eq i32 %37, 0
br i1 %38, label %39, label %43
39: ; preds = %34
%40 = getelementptr inbounds %struct.scsi_cmnd, ptr %5, i64 0, i32 1
%41 = load i32, ptr %40, align 4, !tbaa !23
%42 = icmp sgt i32 %32, %41
br i1 %42, label %45, label %43
43: ; preds = %39, %34
%44 = tail call i32 @scsi_set_resid(ptr noundef nonnull %5, i32 noundef %32) #2
br label %50
45: ; preds = %39, %29
%46 = load i32, ptr @DID_BAD_TARGET, align 4, !tbaa !13
%47 = shl i32 %46, 16
%48 = load i32, ptr %16, align 4, !tbaa !16
%49 = or i32 %47, %48
store i32 %49, ptr %5, align 4, !tbaa !17
br label %50
50: ; preds = %43, %45, %10
%51 = load i32, ptr %11, align 4, !tbaa !14
%52 = load i32, ptr %5, align 4, !tbaa !17
%53 = load i32, ptr %2, align 8, !tbaa !24
%54 = tail call i32 @ISCSI_DBG_SESSION(i32 noundef %51, ptr noundef nonnull @.str, ptr noundef nonnull %5, i32 noundef %52, i32 noundef %53) #2
%55 = getelementptr inbounds %struct.iscsi_conn, ptr %0, i64 0, i32 1
%56 = load i32, ptr %55, align 4, !tbaa !25
%57 = add nsw i32 %56, 1
store i32 %57, ptr %55, align 4, !tbaa !25
%58 = load i32, ptr @ISCSI_TASK_COMPLETED, align 4, !tbaa !13
%59 = tail call i32 @iscsi_complete_task(ptr noundef nonnull %2, i32 noundef %58) #2
br label %60
60: ; preds = %3, %50
ret void
}
declare i32 @iscsi_update_cmdsn(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @be32_to_cpu(i32 noundef) local_unnamed_addr #1
declare i32 @scsi_set_resid(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ISCSI_DBG_SESSION(i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @iscsi_complete_task(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"iscsi_task", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"iscsi_data_rsp", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!13 = !{!7, !7, i64 0}
!14 = !{!15, !7, i64 8}
!15 = !{!"iscsi_conn", !7, i64 0, !7, i64 4, !7, i64 8}
!16 = !{!12, !7, i64 4}
!17 = !{!18, !7, i64 0}
!18 = !{!"scsi_cmnd", !7, i64 0, !19, i64 4}
!19 = !{!"TYPE_2__", !7, i64 0}
!20 = !{!12, !7, i64 12}
!21 = !{!15, !7, i64 0}
!22 = !{!12, !7, i64 8}
!23 = !{!18, !7, i64 4}
!24 = !{!6, !7, i64 0}
!25 = !{!15, !7, i64 4}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/extr_libiscsi.c_iscsi_data_in_rsp.c'
source_filename = "AnghaBench/linux/drivers/scsi/extr_libiscsi.c_iscsi_data_in_rsp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ISCSI_FLAG_DATA_STATUS = common local_unnamed_addr global i32 0, align 4
@DID_OK = common local_unnamed_addr global i32 0, align 4
@ISCSI_FLAG_DATA_UNDERFLOW = common local_unnamed_addr global i32 0, align 4
@ISCSI_FLAG_DATA_OVERFLOW = common local_unnamed_addr global i32 0, align 4
@ISCSI_FLAG_CMD_OVERFLOW = common local_unnamed_addr global i32 0, align 4
@DID_BAD_TARGET = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [50 x i8] c"data in with status done [sc %p res %d itt 0x%x]\0A\00", align 1
@ISCSI_TASK_COMPLETED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @iscsi_data_in_rsp], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @iscsi_data_in_rsp(ptr nocapture noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = getelementptr inbounds i8, ptr %2, i64 8
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = load i32, ptr %1, align 4, !tbaa !12
%7 = load i32, ptr @ISCSI_FLAG_DATA_STATUS, align 4, !tbaa !14
%8 = and i32 %7, %6
%9 = icmp eq i32 %8, 0
br i1 %9, label %60, label %10
10: ; preds = %3
%11 = getelementptr inbounds i8, ptr %0, i64 8
%12 = load i32, ptr %11, align 4, !tbaa !15
%13 = tail call i32 @iscsi_update_cmdsn(i32 noundef %12, ptr noundef nonnull %1) #2
%14 = load i32, ptr @DID_OK, align 4, !tbaa !14
%15 = shl i32 %14, 16
%16 = getelementptr inbounds i8, ptr %1, i64 4
%17 = load i32, ptr %16, align 4, !tbaa !17
%18 = or i32 %15, %17
store i32 %18, ptr %5, align 4, !tbaa !18
%19 = getelementptr inbounds i8, ptr %1, i64 12
%20 = load i32, ptr %19, align 4, !tbaa !21
%21 = tail call i32 @be32_to_cpu(i32 noundef %20) #2
%22 = add nsw i32 %21, 1
store i32 %22, ptr %0, align 4, !tbaa !22
%23 = load i32, ptr %1, align 4, !tbaa !12
%24 = load i32, ptr @ISCSI_FLAG_DATA_UNDERFLOW, align 4, !tbaa !14
%25 = load i32, ptr @ISCSI_FLAG_DATA_OVERFLOW, align 4, !tbaa !14
%26 = or i32 %25, %24
%27 = and i32 %26, %23
%28 = icmp eq i32 %27, 0
br i1 %28, label %50, label %29
29: ; preds = %10
%30 = getelementptr inbounds i8, ptr %1, i64 8
%31 = load i32, ptr %30, align 4, !tbaa !23
%32 = tail call i32 @be32_to_cpu(i32 noundef %31) #2
%33 = icmp sgt i32 %32, 0
br i1 %33, label %34, label %45
34: ; preds = %29
%35 = load i32, ptr %1, align 4, !tbaa !12
%36 = load i32, ptr @ISCSI_FLAG_CMD_OVERFLOW, align 4, !tbaa !14
%37 = and i32 %36, %35
%38 = icmp eq i32 %37, 0
br i1 %38, label %39, label %43
39: ; preds = %34
%40 = getelementptr inbounds i8, ptr %5, i64 4
%41 = load i32, ptr %40, align 4, !tbaa !24
%42 = icmp sgt i32 %32, %41
br i1 %42, label %45, label %43
43: ; preds = %39, %34
%44 = tail call i32 @scsi_set_resid(ptr noundef nonnull %5, i32 noundef %32) #2
br label %50
45: ; preds = %39, %29
%46 = load i32, ptr @DID_BAD_TARGET, align 4, !tbaa !14
%47 = shl i32 %46, 16
%48 = load i32, ptr %16, align 4, !tbaa !17
%49 = or i32 %47, %48
store i32 %49, ptr %5, align 4, !tbaa !18
br label %50
50: ; preds = %43, %45, %10
%51 = load i32, ptr %11, align 4, !tbaa !15
%52 = load i32, ptr %5, align 4, !tbaa !18
%53 = load i32, ptr %2, align 8, !tbaa !25
%54 = tail call i32 @ISCSI_DBG_SESSION(i32 noundef %51, ptr noundef nonnull @.str, ptr noundef nonnull %5, i32 noundef %52, i32 noundef %53) #2
%55 = getelementptr inbounds i8, ptr %0, i64 4
%56 = load i32, ptr %55, align 4, !tbaa !26
%57 = add nsw i32 %56, 1
store i32 %57, ptr %55, align 4, !tbaa !26
%58 = load i32, ptr @ISCSI_TASK_COMPLETED, align 4, !tbaa !14
%59 = tail call i32 @iscsi_complete_task(ptr noundef nonnull %2, i32 noundef %58) #2
br label %60
60: ; preds = %3, %50
ret void
}
declare i32 @iscsi_update_cmdsn(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @be32_to_cpu(i32 noundef) local_unnamed_addr #1
declare i32 @scsi_set_resid(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ISCSI_DBG_SESSION(i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @iscsi_complete_task(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"iscsi_task", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"iscsi_data_rsp", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12}
!14 = !{!8, !8, i64 0}
!15 = !{!16, !8, i64 8}
!16 = !{!"iscsi_conn", !8, i64 0, !8, i64 4, !8, i64 8}
!17 = !{!13, !8, i64 4}
!18 = !{!19, !8, i64 0}
!19 = !{!"scsi_cmnd", !8, i64 0, !20, i64 4}
!20 = !{!"TYPE_2__", !8, i64 0}
!21 = !{!13, !8, i64 12}
!22 = !{!16, !8, i64 0}
!23 = !{!13, !8, i64 8}
!24 = !{!19, !8, i64 4}
!25 = !{!7, !8, i64 0}
!26 = !{!16, !8, i64 4}
| linux_drivers_scsi_extr_libiscsi.c_iscsi_data_in_rsp |
; ModuleID = 'AnghaBench/mruby/mrbgems/mruby-sleep/src/extr_mrb_sleep.c_mrb_mruby_sleep_gem_init.c'
source_filename = "AnghaBench/mruby/mrbgems/mruby-sleep/src/extr_mrb_sleep.c_mrb_mruby_sleep_gem_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [6 x i8] c"sleep\00", align 1
@mrb_f_sleep = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [7 x i8] c"usleep\00", align 1
@mrb_f_usleep = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @mrb_mruby_sleep_gem_init(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = load i32, ptr @mrb_f_sleep, align 4, !tbaa !10
%4 = tail call i32 @MRB_ARGS_REQ(i32 noundef 1) #2
%5 = tail call i32 @mrb_define_method(ptr noundef nonnull %0, i32 noundef %2, ptr noundef nonnull @.str, i32 noundef %3, i32 noundef %4) #2
%6 = load i32, ptr %0, align 4, !tbaa !5
%7 = load i32, ptr @mrb_f_usleep, align 4, !tbaa !10
%8 = tail call i32 @MRB_ARGS_REQ(i32 noundef 1) #2
%9 = tail call i32 @mrb_define_method(ptr noundef nonnull %0, i32 noundef %6, ptr noundef nonnull @.str.1, i32 noundef %7, i32 noundef %8) #2
ret void
}
declare i32 @mrb_define_method(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @MRB_ARGS_REQ(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/mruby/mrbgems/mruby-sleep/src/extr_mrb_sleep.c_mrb_mruby_sleep_gem_init.c'
source_filename = "AnghaBench/mruby/mrbgems/mruby-sleep/src/extr_mrb_sleep.c_mrb_mruby_sleep_gem_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [6 x i8] c"sleep\00", align 1
@mrb_f_sleep = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [7 x i8] c"usleep\00", align 1
@mrb_f_usleep = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @mrb_mruby_sleep_gem_init(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = load i32, ptr @mrb_f_sleep, align 4, !tbaa !11
%4 = tail call i32 @MRB_ARGS_REQ(i32 noundef 1) #2
%5 = tail call i32 @mrb_define_method(ptr noundef nonnull %0, i32 noundef %2, ptr noundef nonnull @.str, i32 noundef %3, i32 noundef %4) #2
%6 = load i32, ptr %0, align 4, !tbaa !6
%7 = load i32, ptr @mrb_f_usleep, align 4, !tbaa !11
%8 = tail call i32 @MRB_ARGS_REQ(i32 noundef 1) #2
%9 = tail call i32 @mrb_define_method(ptr noundef nonnull %0, i32 noundef %6, ptr noundef nonnull @.str.1, i32 noundef %7, i32 noundef %8) #2
ret void
}
declare i32 @mrb_define_method(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @MRB_ARGS_REQ(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| mruby_mrbgems_mruby-sleep_src_extr_mrb_sleep.c_mrb_mruby_sleep_gem_init |
; ModuleID = 'AnghaBench/ijkplayer/ijkmedia/ijksdl/extr_ijksdl_egl.c_IJK_EGL_getSurfaceHeight.c'
source_filename = "AnghaBench/ijkplayer/ijkmedia/ijksdl/extr_ijksdl_egl.c_IJK_EGL_getSurfaceHeight.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32 }
@EGL_HEIGHT = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [52 x i8] c"[EGL] eglQuerySurface(EGL_HEIGHT) returned error %d\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @IJK_EGL_getSurfaceHeight], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @IJK_EGL_getSurfaceHeight(ptr nocapture noundef readonly %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
store i32 0, ptr %2, align 4, !tbaa !5
%3 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%4 = load i32, ptr %3, align 4, !tbaa !9
%5 = load i32, ptr %0, align 4, !tbaa !11
%6 = load i32, ptr @EGL_HEIGHT, align 4, !tbaa !5
%7 = call i32 @eglQuerySurface(i32 noundef %4, i32 noundef %5, i32 noundef %6, ptr noundef nonnull %2) #3
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = call i32 (...) @eglGetError() #3
%11 = call i32 @ALOGE(ptr noundef nonnull @.str, i32 noundef %10) #3
br label %14
12: ; preds = %1
%13 = load i32, ptr %2, align 4, !tbaa !5
br label %14
14: ; preds = %12, %9
%15 = phi i32 [ %13, %12 ], [ 0, %9 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %15
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @eglQuerySurface(i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ALOGE(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @eglGetError(...) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"TYPE_3__", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 0}
| ; ModuleID = 'AnghaBench/ijkplayer/ijkmedia/ijksdl/extr_ijksdl_egl.c_IJK_EGL_getSurfaceHeight.c'
source_filename = "AnghaBench/ijkplayer/ijkmedia/ijksdl/extr_ijksdl_egl.c_IJK_EGL_getSurfaceHeight.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EGL_HEIGHT = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [52 x i8] c"[EGL] eglQuerySurface(EGL_HEIGHT) returned error %d\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @IJK_EGL_getSurfaceHeight], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @IJK_EGL_getSurfaceHeight(ptr nocapture noundef readonly %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
store i32 0, ptr %2, align 4, !tbaa !6
%3 = getelementptr inbounds i8, ptr %0, i64 4
%4 = load i32, ptr %3, align 4, !tbaa !10
%5 = load i32, ptr %0, align 4, !tbaa !12
%6 = load i32, ptr @EGL_HEIGHT, align 4, !tbaa !6
%7 = call i32 @eglQuerySurface(i32 noundef %4, i32 noundef %5, i32 noundef %6, ptr noundef nonnull %2) #3
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = call i32 @eglGetError() #3
%11 = call i32 @ALOGE(ptr noundef nonnull @.str, i32 noundef %10) #3
br label %14
12: ; preds = %1
%13 = load i32, ptr %2, align 4, !tbaa !6
br label %14
14: ; preds = %12, %9
%15 = phi i32 [ %13, %12 ], [ 0, %9 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %15
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @eglQuerySurface(i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ALOGE(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @eglGetError(...) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 4}
!11 = !{!"TYPE_3__", !7, i64 0, !7, i64 4}
!12 = !{!11, !7, i64 0}
| ijkplayer_ijkmedia_ijksdl_extr_ijksdl_egl.c_IJK_EGL_getSurfaceHeight |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/aic94xx/extr_aic94xx_reg.h_asd_disable_ints.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/aic94xx/extr_aic94xx_reg.h_asd_disable_ints.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@CHIMINTEN = dso_local local_unnamed_addr global i32 0, align 4
@RST_CHIMINTEN = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @asd_disable_ints], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @asd_disable_ints(ptr noundef %0) #0 {
%2 = load i32, ptr @CHIMINTEN, align 4, !tbaa !5
%3 = load i32, ptr @RST_CHIMINTEN, align 4, !tbaa !5
%4 = tail call i32 @asd_write_reg_dword(ptr noundef %0, i32 noundef %2, i32 noundef %3) #2
ret void
}
declare i32 @asd_write_reg_dword(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/aic94xx/extr_aic94xx_reg.h_asd_disable_ints.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/aic94xx/extr_aic94xx_reg.h_asd_disable_ints.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CHIMINTEN = common local_unnamed_addr global i32 0, align 4
@RST_CHIMINTEN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @asd_disable_ints], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @asd_disable_ints(ptr noundef %0) #0 {
%2 = load i32, ptr @CHIMINTEN, align 4, !tbaa !6
%3 = load i32, ptr @RST_CHIMINTEN, align 4, !tbaa !6
%4 = tail call i32 @asd_write_reg_dword(ptr noundef %0, i32 noundef %2, i32 noundef %3) #2
ret void
}
declare i32 @asd_write_reg_dword(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_scsi_aic94xx_extr_aic94xx_reg.h_asd_disable_ints |
; ModuleID = 'AnghaBench/libevent/test-export/extr_test-export.c_main.c'
source_filename = "AnghaBench/libevent/test-export/extr_test-export.c_main.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @main(i32 noundef %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 {
%3 = tail call i32 (...) @test() #2
ret i32 %3
}
declare i32 @test(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/libevent/test-export/extr_test-export.c_main.c'
source_filename = "AnghaBench/libevent/test-export/extr_test-export.c_main.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @main(i32 noundef %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 {
%3 = tail call i32 @test() #2
ret i32 %3
}
declare i32 @test(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| libevent_test-export_extr_test-export.c_main |
; ModuleID = 'AnghaBench/linux/arch/x86/mm/extr_mmap.c_mmap_address_hint_valid.c'
source_filename = "AnghaBench/linux/arch/x86/mm/extr_mmap.c_mmap_address_hint_valid.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@TASK_SIZE = dso_local local_unnamed_addr global i64 0, align 8
@DEFAULT_MAP_WINDOW = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define dso_local i32 @mmap_address_hint_valid(i64 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = load i64, ptr @TASK_SIZE, align 8, !tbaa !5
%4 = sub i64 %3, %1
%5 = icmp ult i64 %4, %0
br i1 %5, label %13, label %6
6: ; preds = %2
%7 = load i64, ptr @DEFAULT_MAP_WINDOW, align 8, !tbaa !5
%8 = icmp ult i64 %7, %0
%9 = add i64 %1, %0
%10 = icmp ule i64 %9, %7
%11 = xor i1 %8, %10
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %2, %6
%14 = phi i32 [ %12, %6 ], [ 0, %2 ]
ret i32 %14
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/arch/x86/mm/extr_mmap.c_mmap_address_hint_valid.c'
source_filename = "AnghaBench/linux/arch/x86/mm/extr_mmap.c_mmap_address_hint_valid.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TASK_SIZE = common local_unnamed_addr global i64 0, align 8
@DEFAULT_MAP_WINDOW = common local_unnamed_addr global i64 0, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define range(i32 0, 2) i32 @mmap_address_hint_valid(i64 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = load i64, ptr @TASK_SIZE, align 8, !tbaa !6
%4 = sub i64 %3, %1
%5 = icmp ult i64 %4, %0
br i1 %5, label %13, label %6
6: ; preds = %2
%7 = load i64, ptr @DEFAULT_MAP_WINDOW, align 8, !tbaa !6
%8 = icmp ult i64 %7, %0
%9 = add i64 %1, %0
%10 = icmp ule i64 %9, %7
%11 = xor i1 %8, %10
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %2, %6
%14 = phi i32 [ %12, %6 ], [ 0, %2 ]
ret i32 %14
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_arch_x86_mm_extr_mmap.c_mmap_address_hint_valid |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/misc/extr_enclosure.c_enclosure_remove_links.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/misc/extr_enclosure.c_enclosure_remove_links.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.enclosure_component = type { %struct.TYPE_4__, ptr }
%struct.TYPE_4__ = type { i32 }
@ENCLOSURE_NAME_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [7 x i8] c"device\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @enclosure_remove_links], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @enclosure_remove_links(ptr noundef %0) #0 {
%2 = load i32, ptr @ENCLOSURE_NAME_SIZE, align 4, !tbaa !5
%3 = zext i32 %2 to i64
%4 = alloca i8, i64 %3, align 16
%5 = call i32 @enclosure_link_name(ptr noundef %0, ptr noundef nonnull %4) #2
%6 = getelementptr inbounds %struct.enclosure_component, ptr %0, i64 0, i32 1
%7 = load ptr, ptr %6, align 8, !tbaa !9
%8 = call i32 @sysfs_remove_link(ptr noundef %7, ptr noundef nonnull %4) #2
%9 = call i32 @sysfs_remove_link(ptr noundef %0, ptr noundef nonnull @.str) #2
ret void
}
declare i32 @enclosure_link_name(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @sysfs_remove_link(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 8}
!10 = !{!"enclosure_component", !11, i64 0, !12, i64 8}
!11 = !{!"TYPE_4__", !6, i64 0}
!12 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/misc/extr_enclosure.c_enclosure_remove_links.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/misc/extr_enclosure.c_enclosure_remove_links.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENCLOSURE_NAME_SIZE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [7 x i8] c"device\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @enclosure_remove_links], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @enclosure_remove_links(ptr noundef %0) #0 {
%2 = load i32, ptr @ENCLOSURE_NAME_SIZE, align 4, !tbaa !6
%3 = zext i32 %2 to i64
%4 = alloca i8, i64 %3, align 1
%5 = call i32 @enclosure_link_name(ptr noundef %0, ptr noundef nonnull %4) #2
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load ptr, ptr %6, align 8, !tbaa !10
%8 = call i32 @sysfs_remove_link(ptr noundef %7, ptr noundef nonnull %4) #2
%9 = call i32 @sysfs_remove_link(ptr noundef %0, ptr noundef nonnull @.str) #2
ret void
}
declare i32 @enclosure_link_name(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @sysfs_remove_link(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 8}
!11 = !{!"enclosure_component", !12, i64 0, !13, i64 8}
!12 = !{!"TYPE_4__", !7, i64 0}
!13 = !{!"any pointer", !8, i64 0}
| fastsocket_kernel_drivers_misc_extr_enclosure.c_enclosure_remove_links |
; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/mlx5/extr_main.c_mlx5_ib_disassociate_ucontext.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/mlx5/extr_main.c_mlx5_ib_disassociate_ucontext.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @mlx5_ib_disassociate_ucontext], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @mlx5_ib_disassociate_ucontext(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/mlx5/extr_main.c_mlx5_ib_disassociate_ucontext.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/mlx5/extr_main.c_mlx5_ib_disassociate_ucontext.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @mlx5_ib_disassociate_ucontext], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @mlx5_ib_disassociate_ucontext(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_infiniband_hw_mlx5_extr_main.c_mlx5_ib_disassociate_ucontext |
; ModuleID = 'AnghaBench/freebsd/usr.bin/pom/extr_pom.c_dtor.c'
source_filename = "AnghaBench/freebsd/usr.bin/pom/extr_pom.c_dtor.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PI = dso_local local_unnamed_addr global double 0.000000e+00, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @dtor], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal double @dtor(double noundef %0) #0 {
%2 = load double, ptr @PI, align 8, !tbaa !5
%3 = fmul double %2, %0
%4 = fdiv double %3, 1.800000e+02
ret double %4
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/usr.bin/pom/extr_pom.c_dtor.c'
source_filename = "AnghaBench/freebsd/usr.bin/pom/extr_pom.c_dtor.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PI = common local_unnamed_addr global double 0.000000e+00, align 8
@llvm.used = appending global [1 x ptr] [ptr @dtor], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal double @dtor(double noundef %0) #0 {
%2 = load double, ptr @PI, align 8, !tbaa !6
%3 = fmul double %2, %0
%4 = fdiv double %3, 1.800000e+02
ret double %4
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"double", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_usr.bin_pom_extr_pom.c_dtor |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_isdnl2.c_l2_st6_persistent_da.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_isdnl2.c_l2_st6_persistent_da.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { ptr, i32 }
@DL_RELEASE = dso_local local_unnamed_addr global i32 0, align 4
@CONFIRM = dso_local local_unnamed_addr global i32 0, align 4
@ST_L2_4 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @l2_st6_persistent_da], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @l2_st6_persistent_da(ptr noundef %0, i32 %1, ptr nocapture readnone %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.TYPE_2__, ptr %4, i64 0, i32 1
%6 = tail call i32 @skb_queue_purge(ptr noundef nonnull %5) #2
%7 = tail call i32 @stop_t200(ptr noundef %4, i32 noundef 20) #2
%8 = load ptr, ptr %4, align 8, !tbaa !10
%9 = load i32, ptr @DL_RELEASE, align 4, !tbaa !14
%10 = load i32, ptr @CONFIRM, align 4, !tbaa !14
%11 = or i32 %10, %9
%12 = tail call i32 %8(ptr noundef nonnull %4, i32 noundef %11, ptr noundef null) #2
%13 = load i32, ptr @ST_L2_4, align 4, !tbaa !14
%14 = tail call i32 @FsmChangeState(ptr noundef nonnull %0, i32 noundef %13) #2
ret void
}
declare i32 @skb_queue_purge(ptr noundef) local_unnamed_addr #1
declare i32 @stop_t200(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @FsmChangeState(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"FsmInst", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"PStack", !12, i64 0}
!12 = !{!"TYPE_2__", !7, i64 0, !13, i64 8}
!13 = !{!"int", !8, i64 0}
!14 = !{!13, !13, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_isdnl2.c_l2_st6_persistent_da.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_isdnl2.c_l2_st6_persistent_da.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DL_RELEASE = common local_unnamed_addr global i32 0, align 4
@CONFIRM = common local_unnamed_addr global i32 0, align 4
@ST_L2_4 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @l2_st6_persistent_da], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @l2_st6_persistent_da(ptr noundef %0, i32 %1, ptr nocapture readnone %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %4, i64 8
%6 = tail call i32 @skb_queue_purge(ptr noundef nonnull %5) #2
%7 = tail call i32 @stop_t200(ptr noundef %4, i32 noundef 20) #2
%8 = load ptr, ptr %4, align 8, !tbaa !11
%9 = load i32, ptr @DL_RELEASE, align 4, !tbaa !15
%10 = load i32, ptr @CONFIRM, align 4, !tbaa !15
%11 = or i32 %10, %9
%12 = tail call i32 %8(ptr noundef nonnull %4, i32 noundef %11, ptr noundef null) #2
%13 = load i32, ptr @ST_L2_4, align 4, !tbaa !15
%14 = tail call i32 @FsmChangeState(ptr noundef nonnull %0, i32 noundef %13) #2
ret void
}
declare i32 @skb_queue_purge(ptr noundef) local_unnamed_addr #1
declare i32 @stop_t200(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @FsmChangeState(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"FsmInst", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"PStack", !13, i64 0}
!13 = !{!"TYPE_2__", !8, i64 0, !14, i64 8}
!14 = !{!"int", !9, i64 0}
!15 = !{!14, !14, i64 0}
| fastsocket_kernel_drivers_isdn_hisax_extr_isdnl2.c_l2_st6_persistent_da |
; ModuleID = 'AnghaBench/linux/drivers/iio/adc/extr_stmpe-adc.c_stmpe_adc_isr.c'
source_filename = "AnghaBench/linux/drivers/iio/adc/extr_stmpe-adc.c_stmpe_adc_isr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.stmpe_adc = type { i64, i32, i64, i32 }
@STMPE_ADC_LAST_NR = dso_local local_unnamed_addr global i64 0, align 8
@STMPE_REG_ADC_INT_STA = dso_local local_unnamed_addr global i32 0, align 4
@IRQ_NONE = dso_local local_unnamed_addr global i32 0, align 4
@STMPE_TEMP_CHANNEL = dso_local local_unnamed_addr global i64 0, align 8
@STMPE_REG_TEMP_DATA = dso_local local_unnamed_addr global i32 0, align 4
@IRQ_HANDLED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @stmpe_adc_isr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @stmpe_adc_isr(i32 %0, ptr noundef %1) #0 {
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = load i64, ptr %1, align 8, !tbaa !5
%5 = load i64, ptr @STMPE_ADC_LAST_NR, align 8, !tbaa !11
%6 = icmp sgt i64 %4, %5
br i1 %6, label %24, label %7
7: ; preds = %2
%8 = getelementptr inbounds %struct.stmpe_adc, ptr %1, i64 0, i32 3
%9 = load i32, ptr %8, align 8, !tbaa !12
%10 = load i32, ptr @STMPE_REG_ADC_INT_STA, align 4, !tbaa !13
%11 = tail call i32 @stmpe_reg_read(i32 noundef %9, i32 noundef %10) #3
%12 = load i64, ptr %1, align 8, !tbaa !5
%13 = tail call i32 @STMPE_ADC_CH(i64 noundef %12) #3
%14 = and i32 %13, %11
%15 = icmp eq i32 %14, 0
br i1 %15, label %38, label %16
16: ; preds = %7
%17 = load i32, ptr %8, align 8, !tbaa !12
%18 = load i64, ptr %1, align 8, !tbaa !5
%19 = tail call i32 @STMPE_REG_ADC_DATA_CH(i64 noundef %18) #3
%20 = call i32 @stmpe_block_read(i32 noundef %17, i32 noundef %19, i32 noundef 2, ptr noundef nonnull %3) #3
%21 = load i32, ptr %8, align 8, !tbaa !12
%22 = load i32, ptr @STMPE_REG_ADC_INT_STA, align 4, !tbaa !13
%23 = call i32 @stmpe_reg_write(i32 noundef %21, i32 noundef %22, i32 noundef %11) #3
br label %32
24: ; preds = %2
%25 = load i64, ptr @STMPE_TEMP_CHANNEL, align 8, !tbaa !11
%26 = icmp eq i64 %4, %25
br i1 %26, label %27, label %38
27: ; preds = %24
%28 = getelementptr inbounds %struct.stmpe_adc, ptr %1, i64 0, i32 3
%29 = load i32, ptr %28, align 8, !tbaa !12
%30 = load i32, ptr @STMPE_REG_TEMP_DATA, align 4, !tbaa !13
%31 = call i32 @stmpe_block_read(i32 noundef %29, i32 noundef %30, i32 noundef 2, ptr noundef nonnull %3) #3
br label %32
32: ; preds = %16, %27
%33 = load i32, ptr %3, align 4, !tbaa !13
%34 = call i64 @be16_to_cpu(i32 noundef %33) #3
%35 = getelementptr inbounds %struct.stmpe_adc, ptr %1, i64 0, i32 2
store i64 %34, ptr %35, align 8, !tbaa !14
%36 = getelementptr inbounds %struct.stmpe_adc, ptr %1, i64 0, i32 1
%37 = call i32 @complete(ptr noundef nonnull %36) #3
br label %38
38: ; preds = %24, %7, %32
%39 = phi ptr [ @IRQ_HANDLED, %32 ], [ @IRQ_NONE, %7 ], [ @IRQ_NONE, %24 ]
%40 = load i32, ptr %39, align 4, !tbaa !13
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %40
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @stmpe_reg_read(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @STMPE_ADC_CH(i64 noundef) local_unnamed_addr #2
declare i32 @stmpe_block_read(i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @STMPE_REG_ADC_DATA_CH(i64 noundef) local_unnamed_addr #2
declare i32 @stmpe_reg_write(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i64 @be16_to_cpu(i32 noundef) local_unnamed_addr #2
declare i32 @complete(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"stmpe_adc", !7, i64 0, !10, i64 8, !7, i64 16, !10, i64 24}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !10, i64 24}
!13 = !{!10, !10, i64 0}
!14 = !{!6, !7, i64 16}
| ; ModuleID = 'AnghaBench/linux/drivers/iio/adc/extr_stmpe-adc.c_stmpe_adc_isr.c'
source_filename = "AnghaBench/linux/drivers/iio/adc/extr_stmpe-adc.c_stmpe_adc_isr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@STMPE_ADC_LAST_NR = common local_unnamed_addr global i64 0, align 8
@STMPE_REG_ADC_INT_STA = common local_unnamed_addr global i32 0, align 4
@IRQ_NONE = common local_unnamed_addr global i32 0, align 4
@STMPE_TEMP_CHANNEL = common local_unnamed_addr global i64 0, align 8
@STMPE_REG_TEMP_DATA = common local_unnamed_addr global i32 0, align 4
@IRQ_HANDLED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @stmpe_adc_isr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @stmpe_adc_isr(i32 %0, ptr noundef %1) #0 {
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = load i64, ptr %1, align 8, !tbaa !6
%5 = load i64, ptr @STMPE_ADC_LAST_NR, align 8, !tbaa !12
%6 = icmp sgt i64 %4, %5
br i1 %6, label %24, label %7
7: ; preds = %2
%8 = getelementptr inbounds i8, ptr %1, i64 24
%9 = load i32, ptr %8, align 8, !tbaa !13
%10 = load i32, ptr @STMPE_REG_ADC_INT_STA, align 4, !tbaa !14
%11 = tail call i32 @stmpe_reg_read(i32 noundef %9, i32 noundef %10) #3
%12 = load i64, ptr %1, align 8, !tbaa !6
%13 = tail call i32 @STMPE_ADC_CH(i64 noundef %12) #3
%14 = and i32 %13, %11
%15 = icmp eq i32 %14, 0
br i1 %15, label %38, label %16
16: ; preds = %7
%17 = load i32, ptr %8, align 8, !tbaa !13
%18 = load i64, ptr %1, align 8, !tbaa !6
%19 = tail call i32 @STMPE_REG_ADC_DATA_CH(i64 noundef %18) #3
%20 = call i32 @stmpe_block_read(i32 noundef %17, i32 noundef %19, i32 noundef 2, ptr noundef nonnull %3) #3
%21 = load i32, ptr %8, align 8, !tbaa !13
%22 = load i32, ptr @STMPE_REG_ADC_INT_STA, align 4, !tbaa !14
%23 = call i32 @stmpe_reg_write(i32 noundef %21, i32 noundef %22, i32 noundef %11) #3
br label %32
24: ; preds = %2
%25 = load i64, ptr @STMPE_TEMP_CHANNEL, align 8, !tbaa !12
%26 = icmp eq i64 %4, %25
br i1 %26, label %27, label %38
27: ; preds = %24
%28 = getelementptr inbounds i8, ptr %1, i64 24
%29 = load i32, ptr %28, align 8, !tbaa !13
%30 = load i32, ptr @STMPE_REG_TEMP_DATA, align 4, !tbaa !14
%31 = call i32 @stmpe_block_read(i32 noundef %29, i32 noundef %30, i32 noundef 2, ptr noundef nonnull %3) #3
br label %32
32: ; preds = %16, %27
%33 = load i32, ptr %3, align 4, !tbaa !14
%34 = call i64 @be16_to_cpu(i32 noundef %33) #3
%35 = getelementptr inbounds i8, ptr %1, i64 16
store i64 %34, ptr %35, align 8, !tbaa !15
%36 = getelementptr inbounds i8, ptr %1, i64 8
%37 = call i32 @complete(ptr noundef nonnull %36) #3
br label %38
38: ; preds = %24, %7, %32
%39 = phi ptr [ @IRQ_HANDLED, %32 ], [ @IRQ_NONE, %7 ], [ @IRQ_NONE, %24 ]
%40 = load i32, ptr %39, align 4, !tbaa !14
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %40
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @stmpe_reg_read(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @STMPE_ADC_CH(i64 noundef) local_unnamed_addr #2
declare i32 @stmpe_block_read(i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @STMPE_REG_ADC_DATA_CH(i64 noundef) local_unnamed_addr #2
declare i32 @stmpe_reg_write(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i64 @be16_to_cpu(i32 noundef) local_unnamed_addr #2
declare i32 @complete(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"stmpe_adc", !8, i64 0, !11, i64 8, !8, i64 16, !11, i64 24}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !11, i64 24}
!14 = !{!11, !11, i64 0}
!15 = !{!7, !8, i64 16}
| linux_drivers_iio_adc_extr_stmpe-adc.c_stmpe_adc_isr |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/line6/extr_variax.c_variax_get_name.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/line6/extr_variax.c_variax_get_name.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.usb_line6_variax = type { %struct.TYPE_2__, i32 }
%struct.TYPE_2__ = type { i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @variax_get_name], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @variax_get_name(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call i32 @to_usb_interface(ptr noundef %0) #2
%5 = tail call ptr @usb_get_intfdata(i32 noundef %4) #2
%6 = getelementptr inbounds %struct.usb_line6_variax, ptr %5, i64 0, i32 1
%7 = tail call i32 @line6_wait_dump(ptr noundef nonnull %6, i32 noundef 0) #2
%8 = load i32, ptr %5, align 4, !tbaa !5
%9 = tail call i32 @get_string(ptr noundef %2, i32 noundef %8, i32 noundef 4) #2
ret i32 %9
}
declare ptr @usb_get_intfdata(i32 noundef) local_unnamed_addr #1
declare i32 @to_usb_interface(ptr noundef) local_unnamed_addr #1
declare i32 @line6_wait_dump(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @get_string(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"usb_line6_variax", !7, i64 0, !8, i64 4}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/line6/extr_variax.c_variax_get_name.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/line6/extr_variax.c_variax_get_name.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @variax_get_name], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @variax_get_name(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call i32 @to_usb_interface(ptr noundef %0) #2
%5 = tail call ptr @usb_get_intfdata(i32 noundef %4) #2
%6 = getelementptr inbounds i8, ptr %5, i64 4
%7 = tail call i32 @line6_wait_dump(ptr noundef nonnull %6, i32 noundef 0) #2
%8 = load i32, ptr %5, align 4, !tbaa !6
%9 = tail call i32 @get_string(ptr noundef %2, i32 noundef %8, i32 noundef 4) #2
ret i32 %9
}
declare ptr @usb_get_intfdata(i32 noundef) local_unnamed_addr #1
declare i32 @to_usb_interface(ptr noundef) local_unnamed_addr #1
declare i32 @line6_wait_dump(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @get_string(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"usb_line6_variax", !8, i64 0, !9, i64 4}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_staging_line6_extr_variax.c_variax_get_name |
; ModuleID = 'AnghaBench/tmux/extr_window-copy.c_window_copy_move_mouse.c'
source_filename = "AnghaBench/tmux/extr_window-copy.c_window_copy_move_mouse.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@window_copy_mode = dso_local global i32 0, align 4
@window_view_mode = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @window_copy_move_mouse], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @window_copy_move_mouse(ptr noundef %0) #0 {
%2 = alloca i32, align 4
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = tail call ptr @cmd_mouse_pane(ptr noundef %0, ptr noundef null, ptr noundef null) #3
%5 = icmp eq ptr %4, null
br i1 %5, label %21, label %6
6: ; preds = %1
%7 = tail call ptr @TAILQ_FIRST(ptr noundef nonnull %4) #3
%8 = icmp eq ptr %7, null
br i1 %8, label %21, label %9
9: ; preds = %6
%10 = load ptr, ptr %7, align 8, !tbaa !5
%11 = icmp eq ptr %10, @window_copy_mode
%12 = icmp eq ptr %10, @window_view_mode
%13 = or i1 %11, %12
br i1 %13, label %14, label %21
14: ; preds = %9
%15 = call i64 @cmd_mouse_at(ptr noundef nonnull %4, ptr noundef %0, ptr noundef nonnull %2, ptr noundef nonnull %3, i32 noundef 0) #3
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %21
17: ; preds = %14
%18 = load i32, ptr %2, align 4, !tbaa !10
%19 = load i32, ptr %3, align 4, !tbaa !10
%20 = call i32 @window_copy_update_cursor(ptr noundef nonnull %7, i32 noundef %18, i32 noundef %19) #3
br label %21
21: ; preds = %14, %9, %6, %1, %17
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @cmd_mouse_pane(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @TAILQ_FIRST(ptr noundef) local_unnamed_addr #2
declare i64 @cmd_mouse_at(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @window_copy_update_cursor(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"window_mode_entry", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/tmux/extr_window-copy.c_window_copy_move_mouse.c'
source_filename = "AnghaBench/tmux/extr_window-copy.c_window_copy_move_mouse.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@window_copy_mode = common global i32 0, align 4
@window_view_mode = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @window_copy_move_mouse], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @window_copy_move_mouse(ptr noundef %0) #0 {
%2 = alloca i32, align 4
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = tail call ptr @cmd_mouse_pane(ptr noundef %0, ptr noundef null, ptr noundef null) #3
%5 = icmp eq ptr %4, null
br i1 %5, label %21, label %6
6: ; preds = %1
%7 = tail call ptr @TAILQ_FIRST(ptr noundef nonnull %4) #3
%8 = icmp eq ptr %7, null
br i1 %8, label %21, label %9
9: ; preds = %6
%10 = load ptr, ptr %7, align 8, !tbaa !6
%11 = icmp eq ptr %10, @window_copy_mode
%12 = icmp eq ptr %10, @window_view_mode
%13 = or i1 %11, %12
br i1 %13, label %14, label %21
14: ; preds = %9
%15 = call i64 @cmd_mouse_at(ptr noundef nonnull %4, ptr noundef %0, ptr noundef nonnull %2, ptr noundef nonnull %3, i32 noundef 0) #3
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %21
17: ; preds = %14
%18 = load i32, ptr %2, align 4, !tbaa !11
%19 = load i32, ptr %3, align 4, !tbaa !11
%20 = call i32 @window_copy_update_cursor(ptr noundef nonnull %7, i32 noundef %18, i32 noundef %19) #3
br label %21
21: ; preds = %14, %9, %6, %1, %17
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @cmd_mouse_pane(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @TAILQ_FIRST(ptr noundef) local_unnamed_addr #2
declare i64 @cmd_mouse_at(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @window_copy_update_cursor(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"window_mode_entry", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
| tmux_extr_window-copy.c_window_copy_move_mouse |
; ModuleID = 'AnghaBench/zstd/lib/legacy/extr_zstd_v04.c_HUF_decompress4X4.c'
source_filename = "AnghaBench/zstd/lib/legacy/extr_zstd_v04.c_HUF_decompress4X4.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@DTable = dso_local local_unnamed_addr global i32 0, align 4
@HUF_MAX_TABLELOG = dso_local local_unnamed_addr global i32 0, align 4
@srcSize_wrong = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @HUF_decompress4X4], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @HUF_decompress4X4(ptr noundef %0, i64 noundef %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = load i32, ptr @DTable, align 4, !tbaa !5
%6 = load i32, ptr @HUF_MAX_TABLELOG, align 4, !tbaa !5
%7 = tail call i32 @HUF_CREATE_STATIC_DTABLEX4(i32 noundef %5, i32 noundef %6) #2
%8 = load i32, ptr @DTable, align 4, !tbaa !5
%9 = tail call i64 @HUF_readDTableX4(i32 noundef %8, ptr noundef %2, i64 noundef %3) #2
%10 = tail call i64 @HUF_isError(i64 noundef %9) #2
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %22
12: ; preds = %4
%13 = icmp ult i64 %9, %3
br i1 %13, label %17, label %14
14: ; preds = %12
%15 = load i32, ptr @srcSize_wrong, align 4, !tbaa !5
%16 = tail call i64 @ERROR(i32 noundef %15) #2
br label %22
17: ; preds = %12
%18 = getelementptr inbounds i32, ptr %2, i64 %9
%19 = sub i64 %3, %9
%20 = load i32, ptr @DTable, align 4, !tbaa !5
%21 = tail call i64 @HUF_decompress4X4_usingDTable(ptr noundef %0, i64 noundef %1, ptr noundef %18, i64 noundef %19, i32 noundef %20) #2
br label %22
22: ; preds = %4, %17, %14
%23 = phi i64 [ %16, %14 ], [ %21, %17 ], [ %9, %4 ]
ret i64 %23
}
declare i32 @HUF_CREATE_STATIC_DTABLEX4(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @HUF_readDTableX4(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @HUF_isError(i64 noundef) local_unnamed_addr #1
declare i64 @ERROR(i32 noundef) local_unnamed_addr #1
declare i64 @HUF_decompress4X4_usingDTable(ptr noundef, i64 noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/zstd/lib/legacy/extr_zstd_v04.c_HUF_decompress4X4.c'
source_filename = "AnghaBench/zstd/lib/legacy/extr_zstd_v04.c_HUF_decompress4X4.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DTable = common local_unnamed_addr global i32 0, align 4
@HUF_MAX_TABLELOG = common local_unnamed_addr global i32 0, align 4
@srcSize_wrong = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @HUF_decompress4X4], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @HUF_decompress4X4(ptr noundef %0, i64 noundef %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = load i32, ptr @DTable, align 4, !tbaa !6
%6 = load i32, ptr @HUF_MAX_TABLELOG, align 4, !tbaa !6
%7 = tail call i32 @HUF_CREATE_STATIC_DTABLEX4(i32 noundef %5, i32 noundef %6) #2
%8 = load i32, ptr @DTable, align 4, !tbaa !6
%9 = tail call i64 @HUF_readDTableX4(i32 noundef %8, ptr noundef %2, i64 noundef %3) #2
%10 = tail call i64 @HUF_isError(i64 noundef %9) #2
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %22
12: ; preds = %4
%13 = icmp ult i64 %9, %3
br i1 %13, label %17, label %14
14: ; preds = %12
%15 = load i32, ptr @srcSize_wrong, align 4, !tbaa !6
%16 = tail call i64 @ERROR(i32 noundef %15) #2
br label %22
17: ; preds = %12
%18 = getelementptr inbounds i32, ptr %2, i64 %9
%19 = sub i64 %3, %9
%20 = load i32, ptr @DTable, align 4, !tbaa !6
%21 = tail call i64 @HUF_decompress4X4_usingDTable(ptr noundef %0, i64 noundef %1, ptr noundef %18, i64 noundef %19, i32 noundef %20) #2
br label %22
22: ; preds = %4, %17, %14
%23 = phi i64 [ %16, %14 ], [ %21, %17 ], [ %9, %4 ]
ret i64 %23
}
declare i32 @HUF_CREATE_STATIC_DTABLEX4(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @HUF_readDTableX4(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @HUF_isError(i64 noundef) local_unnamed_addr #1
declare i64 @ERROR(i32 noundef) local_unnamed_addr #1
declare i64 @HUF_decompress4X4_usingDTable(ptr noundef, i64 noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| zstd_lib_legacy_extr_zstd_v04.c_HUF_decompress4X4 |
; ModuleID = 'AnghaBench/freebsd/lib/libgpio/extr_gpio.c_gpio_pin_set.c'
source_filename = "AnghaBench/freebsd/lib/libgpio/extr_gpio.c_gpio_pin_set.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.gpio_req = type { i64, i32 }
@GPIO_VALUE_INVALID = dso_local local_unnamed_addr global i64 0, align 8
@GPIOSET = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @gpio_pin_set(i32 noundef %0, i32 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = alloca %struct.gpio_req, align 8
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
%5 = load i64, ptr @GPIO_VALUE_INVALID, align 8, !tbaa !5
%6 = icmp eq i64 %5, %2
br i1 %6, label %14, label %7
7: ; preds = %3
%8 = call i32 @bzero(ptr noundef nonnull %4, i32 noundef 16) #3
%9 = getelementptr inbounds %struct.gpio_req, ptr %4, i64 0, i32 1
store i32 %1, ptr %9, align 8, !tbaa !9
store i64 %2, ptr %4, align 8, !tbaa !12
%10 = load i32, ptr @GPIOSET, align 4, !tbaa !13
%11 = call i64 @ioctl(i32 noundef %0, i32 noundef %10, ptr noundef nonnull %4) #3
%12 = ashr i64 %11, 63
%13 = trunc i64 %12 to i32
br label %14
14: ; preds = %7, %3
%15 = phi i32 [ -1, %3 ], [ %13, %7 ]
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
ret i32 %15
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @bzero(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @ioctl(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"gpio_req", !6, i64 0, !11, i64 8}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !6, i64 0}
!13 = !{!11, !11, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/lib/libgpio/extr_gpio.c_gpio_pin_set.c'
source_filename = "AnghaBench/freebsd/lib/libgpio/extr_gpio.c_gpio_pin_set.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.gpio_req = type { i64, i32 }
@GPIO_VALUE_INVALID = common local_unnamed_addr global i64 0, align 8
@GPIOSET = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -1, 1) i32 @gpio_pin_set(i32 noundef %0, i32 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = alloca %struct.gpio_req, align 8
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
%5 = load i64, ptr @GPIO_VALUE_INVALID, align 8, !tbaa !6
%6 = icmp eq i64 %5, %2
br i1 %6, label %14, label %7
7: ; preds = %3
%8 = call i32 @bzero(ptr noundef nonnull %4, i32 noundef 16) #3
%9 = getelementptr inbounds i8, ptr %4, i64 8
store i32 %1, ptr %9, align 8, !tbaa !10
store i64 %2, ptr %4, align 8, !tbaa !13
%10 = load i32, ptr @GPIOSET, align 4, !tbaa !14
%11 = call i64 @ioctl(i32 noundef %0, i32 noundef %10, ptr noundef nonnull %4) #3
%12 = ashr i64 %11, 63
%13 = trunc nsw i64 %12 to i32
br label %14
14: ; preds = %7, %3
%15 = phi i32 [ -1, %3 ], [ %13, %7 ]
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
ret i32 %15
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @bzero(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @ioctl(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"gpio_req", !7, i64 0, !12, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !7, i64 0}
!14 = !{!12, !12, i64 0}
| freebsd_lib_libgpio_extr_gpio.c_gpio_pin_set |
; ModuleID = 'AnghaBench/linux/arch/powerpc/kvm/extr_book3s_hv_rm_mmu.c_kvmppc_hv_find_lock_hpte.c'
source_filename = "AnghaBench/linux/arch/powerpc/kvm/extr_book3s_hv_rm_mmu.c_kvmppc_hv_find_lock_hpte.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SLB_VSID_B = dso_local local_unnamed_addr global i64 0, align 8
@HPTE_V_AVPN = dso_local local_unnamed_addr global i64 0, align 8
@HPTE_V_SECONDARY = dso_local local_unnamed_addr global i64 0, align 8
@SLB_VSID_L = dso_local local_unnamed_addr global i64 0, align 8
@HPTE_V_LARGE = dso_local local_unnamed_addr global i64 0, align 8
@slb_base_page_shift = dso_local local_unnamed_addr global ptr null, align 8
@SLB_VSID_LP = dso_local local_unnamed_addr global i64 0, align 8
@SLB_VSID_B_1T = dso_local local_unnamed_addr global i64 0, align 8
@SLB_VSID_SHIFT_1T = dso_local local_unnamed_addr global i64 0, align 8
@SLB_VSID_SHIFT = dso_local local_unnamed_addr global i64 0, align 8
@HPTE_V_HVLOCK = dso_local local_unnamed_addr global i64 0, align 8
@CPU_FTR_ARCH_300 = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i64 @kvmppc_hv_find_lock_hpte(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = load i64, ptr @SLB_VSID_B, align 8, !tbaa !5
%6 = load i64, ptr @HPTE_V_AVPN, align 8, !tbaa !5
%7 = load i64, ptr @HPTE_V_SECONDARY, align 8, !tbaa !5
%8 = or i64 %6, %7
%9 = or i64 %8, %5
%10 = load i64, ptr @SLB_VSID_L, align 8, !tbaa !5
%11 = and i64 %10, %2
%12 = icmp eq i64 %11, 0
br i1 %12, label %22, label %13
13: ; preds = %4
%14 = load i64, ptr @HPTE_V_LARGE, align 8, !tbaa !5
%15 = or i64 %14, %9
%16 = load ptr, ptr @slb_base_page_shift, align 8, !tbaa !9
%17 = load i64, ptr @SLB_VSID_LP, align 8, !tbaa !5
%18 = and i64 %17, %2
%19 = lshr i64 %18, 4
%20 = getelementptr inbounds i32, ptr %16, i64 %19
%21 = load i32, ptr %20, align 4, !tbaa !11
br label %22
22: ; preds = %13, %4
%23 = phi i32 [ %21, %13 ], [ 12, %4 ]
%24 = phi i64 [ %15, %13 ], [ %9, %4 ]
%25 = phi i64 [ %14, %13 ], [ 0, %4 ]
%26 = load i64, ptr @SLB_VSID_B_1T, align 8, !tbaa !5
%27 = and i64 %26, %2
%28 = icmp eq i64 %27, 0
%29 = xor i64 %5, -1
%30 = and i64 %29, %2
br i1 %28, label %36, label %31
31: ; preds = %22
%32 = load i64, ptr @SLB_VSID_SHIFT_1T, align 8, !tbaa !5
%33 = lshr i64 %30, %32
%34 = shl i64 %33, 25
%35 = xor i64 %34, %33
br label %39
36: ; preds = %22
%37 = load i64, ptr @SLB_VSID_SHIFT, align 8, !tbaa !5
%38 = lshr i64 %30, %37
br label %39
39: ; preds = %36, %31
%40 = phi i64 [ 1099511627775, %31 ], [ 268435455, %36 ]
%41 = phi i64 [ %35, %31 ], [ %38, %36 ]
%42 = and i64 %40, %1
%43 = zext nneg i32 %23 to i64
%44 = lshr i64 %42, %43
%45 = xor i64 %44, %41
%46 = tail call i64 @kvmppc_hpt_mask(ptr noundef %0) #2
%47 = and i64 %45, %46
%48 = lshr i64 %40, 16
%49 = xor i64 %48, -1
%50 = and i64 %49, %2
%51 = lshr i64 %42, 16
%52 = or i64 %50, %51
%53 = icmp ugt i32 %23, 23
%54 = add i32 %23, -16
%55 = zext nneg i32 %54 to i64
%56 = shl nsw i64 -1, %55
%57 = select i1 %53, i64 %56, i64 -128
%58 = and i64 %52, %57
%59 = or i64 %58, %25
br label %60
60: ; preds = %141, %39
%61 = phi i64 [ %47, %39 ], [ %144, %141 ]
%62 = phi i64 [ %59, %39 ], [ %142, %141 ]
%63 = load i64, ptr %0, align 8, !tbaa !13
%64 = shl i64 %61, 7
%65 = add i64 %63, %64
%66 = inttoptr i64 %65 to ptr
br label %67
67: ; preds = %60, %134
%68 = phi i64 [ 0, %60 ], [ %135, %134 ]
%69 = getelementptr inbounds i32, ptr %66, i64 %68
%70 = load i32, ptr %69, align 4, !tbaa !11
%71 = tail call i64 @be64_to_cpu(i32 noundef %70) #2
%72 = load i64, ptr @HPTE_V_HVLOCK, align 8, !tbaa !5
%73 = xor i64 %72, -1
%74 = and i64 %71, %73
%75 = load i32, ptr @CPU_FTR_ARCH_300, align 4, !tbaa !11
%76 = tail call i64 @cpu_has_feature(i32 noundef %75) #2
%77 = icmp eq i64 %76, 0
br i1 %77, label %84, label %78
78: ; preds = %67
%79 = or disjoint i64 %68, 1
%80 = getelementptr inbounds i32, ptr %66, i64 %79
%81 = load i32, ptr %80, align 4, !tbaa !11
%82 = tail call i64 @be64_to_cpu(i32 noundef %81) #2
%83 = tail call i64 @hpte_new_to_old_v(i64 noundef %74, i64 noundef %82) #2
br label %84
84: ; preds = %78, %67
%85 = phi i64 [ %83, %78 ], [ %74, %67 ]
%86 = and i64 %85, %3
%87 = icmp ne i64 %86, 0
%88 = and i64 %85, %24
%89 = icmp eq i64 %88, %62
%90 = select i1 %87, i1 %89, i1 false
br i1 %90, label %91, label %134
91: ; preds = %84
%92 = load i64, ptr @HPTE_V_HVLOCK, align 8, !tbaa !5
%93 = tail call i32 @try_lock_hpte(ptr noundef nonnull %69, i64 noundef %92) #2
%94 = icmp eq i32 %93, 0
br i1 %94, label %95, label %100
95: ; preds = %91, %95
%96 = tail call i32 (...) @cpu_relax() #2
%97 = load i64, ptr @HPTE_V_HVLOCK, align 8, !tbaa !5
%98 = tail call i32 @try_lock_hpte(ptr noundef nonnull %69, i64 noundef %97) #2
%99 = icmp eq i32 %98, 0
br i1 %99, label %95, label %100, !llvm.loop !17
100: ; preds = %95, %91
%101 = load i32, ptr %69, align 4, !tbaa !11
%102 = tail call i64 @be64_to_cpu(i32 noundef %101) #2
%103 = load i64, ptr @HPTE_V_HVLOCK, align 8, !tbaa !5
%104 = xor i64 %103, -1
%105 = and i64 %102, %104
%106 = or disjoint i64 %68, 1
%107 = getelementptr inbounds i32, ptr %66, i64 %106
%108 = load i32, ptr %107, align 4, !tbaa !11
%109 = tail call i64 @be64_to_cpu(i32 noundef %108) #2
%110 = load i32, ptr @CPU_FTR_ARCH_300, align 4, !tbaa !11
%111 = tail call i64 @cpu_has_feature(i32 noundef %110) #2
%112 = icmp eq i64 %111, 0
br i1 %112, label %116, label %113
113: ; preds = %100
%114 = tail call i64 @hpte_new_to_old_v(i64 noundef %105, i64 noundef %109) #2
%115 = tail call i64 @hpte_new_to_old_r(i64 noundef %109) #2
br label %116
116: ; preds = %113, %100
%117 = phi i64 [ %114, %113 ], [ %105, %100 ]
%118 = phi i64 [ %115, %113 ], [ %109, %100 ]
%119 = and i64 %117, %3
%120 = icmp ne i64 %119, 0
%121 = and i64 %117, %24
%122 = icmp eq i64 %121, %62
%123 = select i1 %120, i1 %122, i1 false
br i1 %123, label %124, label %132
124: ; preds = %116
%125 = tail call i32 @kvmppc_hpte_base_page_shift(i64 noundef %117, i64 noundef %118) #2
%126 = icmp eq i32 %125, %23
br i1 %126, label %127, label %132
127: ; preds = %124
%128 = shl i64 %61, 3
%129 = lshr exact i64 %68, 1
%130 = and i64 %129, 2147483647
%131 = add nuw nsw i64 %128, %130
br label %145
132: ; preds = %124, %116
%133 = tail call i32 @__unlock_hpte(ptr noundef nonnull %69, i64 noundef %105) #2
br label %134
134: ; preds = %84, %132
%135 = add nuw nsw i64 %68, 2
%136 = icmp ult i64 %68, 14
br i1 %136, label %67, label %137, !llvm.loop !19
137: ; preds = %134
%138 = load i64, ptr @HPTE_V_SECONDARY, align 8, !tbaa !5
%139 = and i64 %138, %62
%140 = icmp eq i64 %139, 0
br i1 %140, label %141, label %145
141: ; preds = %137
%142 = or i64 %138, %62
%143 = tail call i64 @kvmppc_hpt_mask(ptr noundef nonnull %0) #2
%144 = xor i64 %143, %61
br label %60
145: ; preds = %137, %127
%146 = phi i64 [ %131, %127 ], [ -1, %137 ]
ret i64 %146
}
declare i64 @kvmppc_hpt_mask(ptr noundef) local_unnamed_addr #1
declare i64 @be64_to_cpu(i32 noundef) local_unnamed_addr #1
declare i64 @cpu_has_feature(i32 noundef) local_unnamed_addr #1
declare i64 @hpte_new_to_old_v(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @try_lock_hpte(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @cpu_relax(...) local_unnamed_addr #1
declare i64 @hpte_new_to_old_r(i64 noundef) local_unnamed_addr #1
declare i32 @kvmppc_hpte_base_page_shift(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @__unlock_hpte(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !6, i64 0}
!14 = !{!"kvm", !15, i64 0}
!15 = !{!"TYPE_3__", !16, i64 0}
!16 = !{!"TYPE_4__", !6, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}
| ; ModuleID = 'AnghaBench/linux/arch/powerpc/kvm/extr_book3s_hv_rm_mmu.c_kvmppc_hv_find_lock_hpte.c'
source_filename = "AnghaBench/linux/arch/powerpc/kvm/extr_book3s_hv_rm_mmu.c_kvmppc_hv_find_lock_hpte.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SLB_VSID_B = common local_unnamed_addr global i64 0, align 8
@HPTE_V_AVPN = common local_unnamed_addr global i64 0, align 8
@HPTE_V_SECONDARY = common local_unnamed_addr global i64 0, align 8
@SLB_VSID_L = common local_unnamed_addr global i64 0, align 8
@HPTE_V_LARGE = common local_unnamed_addr global i64 0, align 8
@slb_base_page_shift = common local_unnamed_addr global ptr null, align 8
@SLB_VSID_LP = common local_unnamed_addr global i64 0, align 8
@SLB_VSID_B_1T = common local_unnamed_addr global i64 0, align 8
@SLB_VSID_SHIFT_1T = common local_unnamed_addr global i64 0, align 8
@SLB_VSID_SHIFT = common local_unnamed_addr global i64 0, align 8
@HPTE_V_HVLOCK = common local_unnamed_addr global i64 0, align 8
@CPU_FTR_ARCH_300 = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @kvmppc_hv_find_lock_hpte(ptr noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = load i64, ptr @SLB_VSID_B, align 8, !tbaa !6
%6 = load i64, ptr @HPTE_V_AVPN, align 8, !tbaa !6
%7 = load i64, ptr @HPTE_V_SECONDARY, align 8, !tbaa !6
%8 = or i64 %6, %7
%9 = or i64 %8, %5
%10 = load i64, ptr @SLB_VSID_L, align 8, !tbaa !6
%11 = and i64 %10, %2
%12 = icmp eq i64 %11, 0
br i1 %12, label %22, label %13
13: ; preds = %4
%14 = load i64, ptr @HPTE_V_LARGE, align 8, !tbaa !6
%15 = or i64 %14, %9
%16 = load ptr, ptr @slb_base_page_shift, align 8, !tbaa !10
%17 = load i64, ptr @SLB_VSID_LP, align 8, !tbaa !6
%18 = and i64 %17, %2
%19 = lshr i64 %18, 4
%20 = getelementptr inbounds i32, ptr %16, i64 %19
%21 = load i32, ptr %20, align 4, !tbaa !12
br label %22
22: ; preds = %13, %4
%23 = phi i32 [ %21, %13 ], [ 12, %4 ]
%24 = phi i64 [ %15, %13 ], [ %9, %4 ]
%25 = phi i64 [ %14, %13 ], [ 0, %4 ]
%26 = load i64, ptr @SLB_VSID_B_1T, align 8, !tbaa !6
%27 = and i64 %26, %2
%28 = icmp eq i64 %27, 0
%29 = xor i64 %5, -1
%30 = and i64 %29, %2
br i1 %28, label %36, label %31
31: ; preds = %22
%32 = load i64, ptr @SLB_VSID_SHIFT_1T, align 8, !tbaa !6
%33 = lshr i64 %30, %32
%34 = shl i64 %33, 25
%35 = xor i64 %34, %33
br label %39
36: ; preds = %22
%37 = load i64, ptr @SLB_VSID_SHIFT, align 8, !tbaa !6
%38 = lshr i64 %30, %37
br label %39
39: ; preds = %36, %31
%40 = phi i64 [ 1099511627775, %31 ], [ 268435455, %36 ]
%41 = phi i64 [ %35, %31 ], [ %38, %36 ]
%42 = and i64 %40, %1
%43 = zext nneg i32 %23 to i64
%44 = lshr i64 %42, %43
%45 = xor i64 %44, %41
%46 = tail call i64 @kvmppc_hpt_mask(ptr noundef %0) #2
%47 = and i64 %45, %46
%48 = lshr i64 %40, 16
%49 = xor i64 %48, -1
%50 = and i64 %49, %2
%51 = lshr i64 %42, 16
%52 = or i64 %50, %51
%53 = icmp ugt i32 %23, 23
%54 = add i32 %23, -16
%55 = zext nneg i32 %54 to i64
%56 = shl nsw i64 -1, %55
%57 = select i1 %53, i64 %56, i64 -128
%58 = and i64 %52, %57
%59 = or i64 %58, %25
br label %60
60: ; preds = %141, %39
%61 = phi i64 [ %47, %39 ], [ %144, %141 ]
%62 = phi i64 [ %59, %39 ], [ %142, %141 ]
%63 = load i64, ptr %0, align 8, !tbaa !14
%64 = shl i64 %61, 7
%65 = add i64 %63, %64
%66 = inttoptr i64 %65 to ptr
br label %67
67: ; preds = %60, %134
%68 = phi i64 [ 0, %60 ], [ %135, %134 ]
%69 = getelementptr inbounds i32, ptr %66, i64 %68
%70 = load i32, ptr %69, align 4, !tbaa !12
%71 = tail call i64 @be64_to_cpu(i32 noundef %70) #2
%72 = load i64, ptr @HPTE_V_HVLOCK, align 8, !tbaa !6
%73 = xor i64 %72, -1
%74 = and i64 %71, %73
%75 = load i32, ptr @CPU_FTR_ARCH_300, align 4, !tbaa !12
%76 = tail call i64 @cpu_has_feature(i32 noundef %75) #2
%77 = icmp eq i64 %76, 0
br i1 %77, label %84, label %78
78: ; preds = %67
%79 = or disjoint i64 %68, 1
%80 = getelementptr inbounds i32, ptr %66, i64 %79
%81 = load i32, ptr %80, align 4, !tbaa !12
%82 = tail call i64 @be64_to_cpu(i32 noundef %81) #2
%83 = tail call i64 @hpte_new_to_old_v(i64 noundef %74, i64 noundef %82) #2
br label %84
84: ; preds = %78, %67
%85 = phi i64 [ %83, %78 ], [ %74, %67 ]
%86 = and i64 %85, %3
%87 = icmp ne i64 %86, 0
%88 = and i64 %85, %24
%89 = icmp eq i64 %88, %62
%90 = select i1 %87, i1 %89, i1 false
br i1 %90, label %91, label %134
91: ; preds = %84
%92 = load i64, ptr @HPTE_V_HVLOCK, align 8, !tbaa !6
%93 = tail call i32 @try_lock_hpte(ptr noundef nonnull %69, i64 noundef %92) #2
%94 = icmp eq i32 %93, 0
br i1 %94, label %95, label %100
95: ; preds = %91, %95
%96 = tail call i32 @cpu_relax() #2
%97 = load i64, ptr @HPTE_V_HVLOCK, align 8, !tbaa !6
%98 = tail call i32 @try_lock_hpte(ptr noundef nonnull %69, i64 noundef %97) #2
%99 = icmp eq i32 %98, 0
br i1 %99, label %95, label %100, !llvm.loop !18
100: ; preds = %95, %91
%101 = load i32, ptr %69, align 4, !tbaa !12
%102 = tail call i64 @be64_to_cpu(i32 noundef %101) #2
%103 = load i64, ptr @HPTE_V_HVLOCK, align 8, !tbaa !6
%104 = xor i64 %103, -1
%105 = and i64 %102, %104
%106 = or disjoint i64 %68, 1
%107 = getelementptr inbounds i32, ptr %66, i64 %106
%108 = load i32, ptr %107, align 4, !tbaa !12
%109 = tail call i64 @be64_to_cpu(i32 noundef %108) #2
%110 = load i32, ptr @CPU_FTR_ARCH_300, align 4, !tbaa !12
%111 = tail call i64 @cpu_has_feature(i32 noundef %110) #2
%112 = icmp eq i64 %111, 0
br i1 %112, label %116, label %113
113: ; preds = %100
%114 = tail call i64 @hpte_new_to_old_v(i64 noundef %105, i64 noundef %109) #2
%115 = tail call i64 @hpte_new_to_old_r(i64 noundef %109) #2
br label %116
116: ; preds = %113, %100
%117 = phi i64 [ %114, %113 ], [ %105, %100 ]
%118 = phi i64 [ %115, %113 ], [ %109, %100 ]
%119 = and i64 %117, %3
%120 = icmp ne i64 %119, 0
%121 = and i64 %117, %24
%122 = icmp eq i64 %121, %62
%123 = select i1 %120, i1 %122, i1 false
br i1 %123, label %124, label %132
124: ; preds = %116
%125 = tail call i32 @kvmppc_hpte_base_page_shift(i64 noundef %117, i64 noundef %118) #2
%126 = icmp eq i32 %125, %23
br i1 %126, label %127, label %132
127: ; preds = %124
%128 = shl i64 %61, 3
%129 = lshr exact i64 %68, 1
%130 = and i64 %129, 2147483647
%131 = add nuw nsw i64 %128, %130
br label %145
132: ; preds = %124, %116
%133 = tail call i32 @__unlock_hpte(ptr noundef nonnull %69, i64 noundef %105) #2
br label %134
134: ; preds = %84, %132
%135 = add nuw nsw i64 %68, 2
%136 = icmp ult i64 %68, 14
br i1 %136, label %67, label %137, !llvm.loop !20
137: ; preds = %134
%138 = load i64, ptr @HPTE_V_SECONDARY, align 8, !tbaa !6
%139 = and i64 %138, %62
%140 = icmp eq i64 %139, 0
br i1 %140, label %141, label %145
141: ; preds = %137
%142 = or i64 %138, %62
%143 = tail call i64 @kvmppc_hpt_mask(ptr noundef nonnull %0) #2
%144 = xor i64 %143, %61
br label %60
145: ; preds = %137, %127
%146 = phi i64 [ %131, %127 ], [ -1, %137 ]
ret i64 %146
}
declare i64 @kvmppc_hpt_mask(ptr noundef) local_unnamed_addr #1
declare i64 @be64_to_cpu(i32 noundef) local_unnamed_addr #1
declare i64 @cpu_has_feature(i32 noundef) local_unnamed_addr #1
declare i64 @hpte_new_to_old_v(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @try_lock_hpte(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @cpu_relax(...) local_unnamed_addr #1
declare i64 @hpte_new_to_old_r(i64 noundef) local_unnamed_addr #1
declare i32 @kvmppc_hpte_base_page_shift(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @__unlock_hpte(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!15, !7, i64 0}
!15 = !{!"kvm", !16, i64 0}
!16 = !{!"TYPE_3__", !17, i64 0}
!17 = !{!"TYPE_4__", !7, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = distinct !{!20, !19}
| linux_arch_powerpc_kvm_extr_book3s_hv_rm_mmu.c_kvmppc_hv_find_lock_hpte |
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/bio/extr_b_sock2.c_BIO_bind.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/bio/extr_b_sock2.c_BIO_bind.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@BIO_F_BIO_BIND = dso_local local_unnamed_addr global i32 0, align 4
@BIO_R_INVALID_SOCKET = dso_local local_unnamed_addr global i32 0, align 4
@BIO_SOCK_REUSEADDR = dso_local local_unnamed_addr global i32 0, align 4
@SOL_SOCKET = dso_local local_unnamed_addr global i32 0, align 4
@SO_REUSEADDR = dso_local local_unnamed_addr global i32 0, align 4
@SYS_F_SETSOCKOPT = dso_local local_unnamed_addr global i32 0, align 4
@BIO_R_UNABLE_TO_REUSEADDR = dso_local local_unnamed_addr global i32 0, align 4
@SYS_F_BIND = dso_local local_unnamed_addr global i32 0, align 4
@BIO_R_UNABLE_TO_BIND_SOCKET = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @BIO_bind(i32 noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
store i32 1, ptr %4, align 4, !tbaa !5
%5 = icmp eq i32 %0, -1
br i1 %5, label %6, label %10
6: ; preds = %3
%7 = load i32, ptr @BIO_F_BIO_BIND, align 4, !tbaa !5
%8 = load i32, ptr @BIO_R_INVALID_SOCKET, align 4, !tbaa !5
%9 = tail call i32 @BIOerr(i32 noundef %7, i32 noundef %8) #3
br label %38
10: ; preds = %3
%11 = load i32, ptr @BIO_SOCK_REUSEADDR, align 4, !tbaa !5
%12 = and i32 %11, %2
%13 = icmp eq i32 %12, 0
br i1 %13, label %26, label %14
14: ; preds = %10
%15 = load i32, ptr @SOL_SOCKET, align 4, !tbaa !5
%16 = load i32, ptr @SO_REUSEADDR, align 4, !tbaa !5
%17 = call i64 @setsockopt(i32 noundef %0, i32 noundef %15, i32 noundef %16, ptr noundef nonnull %4, i32 noundef 4) #3
%18 = icmp eq i64 %17, 0
br i1 %18, label %26, label %19
19: ; preds = %14
%20 = load i32, ptr @SYS_F_SETSOCKOPT, align 4, !tbaa !5
%21 = call i32 (...) @get_last_socket_error() #3
%22 = call i32 @SYSerr(i32 noundef %20, i32 noundef %21) #3
%23 = load i32, ptr @BIO_F_BIO_BIND, align 4, !tbaa !5
%24 = load i32, ptr @BIO_R_UNABLE_TO_REUSEADDR, align 4, !tbaa !5
%25 = call i32 @BIOerr(i32 noundef %23, i32 noundef %24) #3
br label %38
26: ; preds = %14, %10
%27 = call i32 @BIO_ADDR_sockaddr(ptr noundef %1) #3
%28 = call i32 @BIO_ADDR_sockaddr_size(ptr noundef %1) #3
%29 = call i64 @bind(i32 noundef %0, i32 noundef %27, i32 noundef %28) #3
%30 = icmp eq i64 %29, 0
br i1 %30, label %38, label %31
31: ; preds = %26
%32 = load i32, ptr @SYS_F_BIND, align 4, !tbaa !5
%33 = call i32 (...) @get_last_socket_error() #3
%34 = call i32 @SYSerr(i32 noundef %32, i32 noundef %33) #3
%35 = load i32, ptr @BIO_F_BIO_BIND, align 4, !tbaa !5
%36 = load i32, ptr @BIO_R_UNABLE_TO_BIND_SOCKET, align 4, !tbaa !5
%37 = call i32 @BIOerr(i32 noundef %35, i32 noundef %36) #3
br label %38
38: ; preds = %26, %31, %19, %6
%39 = phi i32 [ 0, %6 ], [ 0, %19 ], [ 0, %31 ], [ 1, %26 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 %39
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @BIOerr(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @setsockopt(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @SYSerr(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @get_last_socket_error(...) local_unnamed_addr #2
declare i64 @bind(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BIO_ADDR_sockaddr(ptr noundef) local_unnamed_addr #2
declare i32 @BIO_ADDR_sockaddr_size(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/bio/extr_b_sock2.c_BIO_bind.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/bio/extr_b_sock2.c_BIO_bind.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BIO_F_BIO_BIND = common local_unnamed_addr global i32 0, align 4
@BIO_R_INVALID_SOCKET = common local_unnamed_addr global i32 0, align 4
@BIO_SOCK_REUSEADDR = common local_unnamed_addr global i32 0, align 4
@SOL_SOCKET = common local_unnamed_addr global i32 0, align 4
@SO_REUSEADDR = common local_unnamed_addr global i32 0, align 4
@SYS_F_SETSOCKOPT = common local_unnamed_addr global i32 0, align 4
@BIO_R_UNABLE_TO_REUSEADDR = common local_unnamed_addr global i32 0, align 4
@SYS_F_BIND = common local_unnamed_addr global i32 0, align 4
@BIO_R_UNABLE_TO_BIND_SOCKET = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @BIO_bind(i32 noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
store i32 1, ptr %4, align 4, !tbaa !6
%5 = icmp eq i32 %0, -1
br i1 %5, label %6, label %10
6: ; preds = %3
%7 = load i32, ptr @BIO_F_BIO_BIND, align 4, !tbaa !6
%8 = load i32, ptr @BIO_R_INVALID_SOCKET, align 4, !tbaa !6
%9 = tail call i32 @BIOerr(i32 noundef %7, i32 noundef %8) #3
br label %38
10: ; preds = %3
%11 = load i32, ptr @BIO_SOCK_REUSEADDR, align 4, !tbaa !6
%12 = and i32 %11, %2
%13 = icmp eq i32 %12, 0
br i1 %13, label %26, label %14
14: ; preds = %10
%15 = load i32, ptr @SOL_SOCKET, align 4, !tbaa !6
%16 = load i32, ptr @SO_REUSEADDR, align 4, !tbaa !6
%17 = call i64 @setsockopt(i32 noundef %0, i32 noundef %15, i32 noundef %16, ptr noundef nonnull %4, i32 noundef 4) #3
%18 = icmp eq i64 %17, 0
br i1 %18, label %26, label %19
19: ; preds = %14
%20 = load i32, ptr @SYS_F_SETSOCKOPT, align 4, !tbaa !6
%21 = call i32 @get_last_socket_error() #3
%22 = call i32 @SYSerr(i32 noundef %20, i32 noundef %21) #3
%23 = load i32, ptr @BIO_F_BIO_BIND, align 4, !tbaa !6
%24 = load i32, ptr @BIO_R_UNABLE_TO_REUSEADDR, align 4, !tbaa !6
%25 = call i32 @BIOerr(i32 noundef %23, i32 noundef %24) #3
br label %38
26: ; preds = %14, %10
%27 = call i32 @BIO_ADDR_sockaddr(ptr noundef %1) #3
%28 = call i32 @BIO_ADDR_sockaddr_size(ptr noundef %1) #3
%29 = call i64 @bind(i32 noundef %0, i32 noundef %27, i32 noundef %28) #3
%30 = icmp eq i64 %29, 0
br i1 %30, label %38, label %31
31: ; preds = %26
%32 = load i32, ptr @SYS_F_BIND, align 4, !tbaa !6
%33 = call i32 @get_last_socket_error() #3
%34 = call i32 @SYSerr(i32 noundef %32, i32 noundef %33) #3
%35 = load i32, ptr @BIO_F_BIO_BIND, align 4, !tbaa !6
%36 = load i32, ptr @BIO_R_UNABLE_TO_BIND_SOCKET, align 4, !tbaa !6
%37 = call i32 @BIOerr(i32 noundef %35, i32 noundef %36) #3
br label %38
38: ; preds = %26, %31, %19, %6
%39 = phi i32 [ 0, %6 ], [ 0, %19 ], [ 0, %31 ], [ 1, %26 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 %39
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @BIOerr(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @setsockopt(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @SYSerr(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @get_last_socket_error(...) local_unnamed_addr #2
declare i64 @bind(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BIO_ADDR_sockaddr(ptr noundef) local_unnamed_addr #2
declare i32 @BIO_ADDR_sockaddr_size(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_crypto_openssl_crypto_bio_extr_b_sock2.c_BIO_bind |
; ModuleID = 'AnghaBench/linux/drivers/i2c/extr_i2c-core-smbus.c_i2c_smbus_pec.c'
source_filename = "AnghaBench/linux/drivers/i2c/extr_i2c-core-smbus.c_i2c_smbus_pec.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @i2c_smbus_pec], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @i2c_smbus_pec(i32 noundef %0, ptr nocapture noundef readonly %1, i64 noundef %2) #0 {
%4 = icmp eq i64 %2, 0
br i1 %4, label %15, label %5
5: ; preds = %3, %5
%6 = phi i64 [ %13, %5 ], [ 0, %3 ]
%7 = phi i32 [ %12, %5 ], [ %0, %3 ]
%8 = getelementptr inbounds i32, ptr %1, i64 %6
%9 = load i32, ptr %8, align 4, !tbaa !5
%10 = xor i32 %9, %7
%11 = shl i32 %10, 8
%12 = tail call i32 @crc8(i32 noundef %11) #2
%13 = add nuw i64 %6, 1
%14 = icmp eq i64 %13, %2
br i1 %14, label %15, label %5, !llvm.loop !9
15: ; preds = %5, %3
%16 = phi i32 [ %0, %3 ], [ %12, %5 ]
ret i32 %16
}
declare i32 @crc8(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/i2c/extr_i2c-core-smbus.c_i2c_smbus_pec.c'
source_filename = "AnghaBench/linux/drivers/i2c/extr_i2c-core-smbus.c_i2c_smbus_pec.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @i2c_smbus_pec], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @i2c_smbus_pec(i32 noundef %0, ptr nocapture noundef readonly %1, i64 noundef %2) #0 {
%4 = icmp eq i64 %2, 0
br i1 %4, label %15, label %5
5: ; preds = %3, %5
%6 = phi i64 [ %13, %5 ], [ 0, %3 ]
%7 = phi i32 [ %12, %5 ], [ %0, %3 ]
%8 = getelementptr inbounds i32, ptr %1, i64 %6
%9 = load i32, ptr %8, align 4, !tbaa !6
%10 = xor i32 %9, %7
%11 = shl i32 %10, 8
%12 = tail call i32 @crc8(i32 noundef %11) #2
%13 = add nuw i64 %6, 1
%14 = icmp eq i64 %13, %2
br i1 %14, label %15, label %5, !llvm.loop !10
15: ; preds = %5, %3
%16 = phi i32 [ %0, %3 ], [ %12, %5 ]
ret i32 %16
}
declare i32 @crc8(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| linux_drivers_i2c_extr_i2c-core-smbus.c_i2c_smbus_pec |
; ModuleID = 'AnghaBench/fastsocket/kernel/kernel/extr_sched_rt.c_enqueue_task_rt.c'
source_filename = "AnghaBench/fastsocket/kernel/kernel/extr_sched_rt.c_enqueue_task_rt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sched_rt_entity = type { i32, i64 }
@ENQUEUE_WAKEUP = dso_local local_unnamed_addr global i32 0, align 4
@ENQUEUE_HEAD = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @enqueue_task_rt], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @enqueue_task_rt(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = load i32, ptr @ENQUEUE_WAKEUP, align 4, !tbaa !5
%5 = and i32 %4, %2
%6 = icmp eq i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %3
%8 = getelementptr inbounds %struct.sched_rt_entity, ptr %1, i64 0, i32 1
store i64 0, ptr %8, align 8, !tbaa !9
br label %9
9: ; preds = %7, %3
%10 = load i32, ptr @ENQUEUE_HEAD, align 4, !tbaa !5
%11 = and i32 %10, %2
%12 = tail call i32 @enqueue_rt_entity(ptr noundef %1, i32 noundef %11) #2
%13 = tail call i32 @task_current(ptr noundef %0, ptr noundef %1) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %20
15: ; preds = %9
%16 = load i32, ptr %1, align 8, !tbaa !12
%17 = icmp sgt i32 %16, 1
br i1 %17, label %18, label %20
18: ; preds = %15
%19 = tail call i32 @enqueue_pushable_task(ptr noundef %0, ptr noundef nonnull %1) #2
br label %20
20: ; preds = %18, %15, %9
%21 = tail call i32 @inc_nr_running(ptr noundef %0) #2
ret void
}
declare i32 @enqueue_rt_entity(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @task_current(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @enqueue_pushable_task(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @inc_nr_running(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"sched_rt_entity", !6, i64 0, !11, i64 8}
!11 = !{!"long", !7, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"task_struct", !10, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/kernel/extr_sched_rt.c_enqueue_task_rt.c'
source_filename = "AnghaBench/fastsocket/kernel/kernel/extr_sched_rt.c_enqueue_task_rt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENQUEUE_WAKEUP = common local_unnamed_addr global i32 0, align 4
@ENQUEUE_HEAD = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @enqueue_task_rt], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @enqueue_task_rt(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = load i32, ptr @ENQUEUE_WAKEUP, align 4, !tbaa !6
%5 = and i32 %4, %2
%6 = icmp eq i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %3
%8 = getelementptr inbounds i8, ptr %1, i64 8
store i64 0, ptr %8, align 8, !tbaa !10
br label %9
9: ; preds = %7, %3
%10 = load i32, ptr @ENQUEUE_HEAD, align 4, !tbaa !6
%11 = and i32 %10, %2
%12 = tail call i32 @enqueue_rt_entity(ptr noundef %1, i32 noundef %11) #2
%13 = tail call i32 @task_current(ptr noundef %0, ptr noundef %1) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %20
15: ; preds = %9
%16 = load i32, ptr %1, align 8, !tbaa !13
%17 = icmp sgt i32 %16, 1
br i1 %17, label %18, label %20
18: ; preds = %15
%19 = tail call i32 @enqueue_pushable_task(ptr noundef %0, ptr noundef nonnull %1) #2
br label %20
20: ; preds = %18, %15, %9
%21 = tail call i32 @inc_nr_running(ptr noundef %0) #2
ret void
}
declare i32 @enqueue_rt_entity(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @task_current(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @enqueue_pushable_task(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @inc_nr_running(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"sched_rt_entity", !7, i64 0, !12, i64 8}
!12 = !{!"long", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"task_struct", !11, i64 0}
| fastsocket_kernel_kernel_extr_sched_rt.c_enqueue_task_rt |
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/x509v3/extr_v3_admis.c_PROFESSION_INFO_get0_namingAuthority.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/x509v3/extr_v3_admis.c_PROFESSION_INFO_get0_namingAuthority.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define dso_local ptr @PROFESSION_INFO_get0_namingAuthority(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/x509v3/extr_v3_admis.c_PROFESSION_INFO_get0_namingAuthority.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/x509v3/extr_v3_admis.c_PROFESSION_INFO_get0_namingAuthority.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define ptr @PROFESSION_INFO_get0_namingAuthority(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_crypto_openssl_crypto_x509v3_extr_v3_admis.c_PROFESSION_INFO_get0_namingAuthority |
; ModuleID = 'AnghaBench/linux/drivers/usb/host/extr_sl811_cs.c_sl811_hc_init.c'
source_filename = "AnghaBench/linux/drivers/usb/host/extr_sl811_cs.c_sl811_hc_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_11__ = type { i32, %struct.TYPE_8__ }
%struct.TYPE_8__ = type { ptr }
%struct.TYPE_9__ = type { %struct.TYPE_7__ }
%struct.TYPE_7__ = type { i32 }
%struct.TYPE_10__ = type { i32, i32 }
@platform_dev = dso_local global %struct.TYPE_11__ zeroinitializer, align 8
@EBUSY = dso_local local_unnamed_addr global i32 0, align 4
@resources = dso_local local_unnamed_addr global ptr null, align 8
@sl811h_driver = dso_local local_unnamed_addr global %struct.TYPE_9__ zeroinitializer, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sl811_hc_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @sl811_hc_init(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load ptr, ptr getelementptr inbounds (%struct.TYPE_11__, ptr @platform_dev, i64 0, i32 1), align 8, !tbaa !5
%5 = icmp eq ptr %4, null
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = load i32, ptr @EBUSY, align 4, !tbaa !12
%8 = sub nsw i32 0, %7
br label %18
9: ; preds = %3
store ptr %0, ptr getelementptr inbounds (%struct.TYPE_11__, ptr @platform_dev, i64 0, i32 1), align 8, !tbaa !5
%10 = load ptr, ptr @resources, align 8, !tbaa !13
store i32 %2, ptr %10, align 4, !tbaa !14
%11 = getelementptr inbounds %struct.TYPE_10__, ptr %10, i64 1
store i32 %1, ptr %11, align 4, !tbaa !14
%12 = getelementptr inbounds %struct.TYPE_10__, ptr %10, i64 1, i32 1
store i32 %1, ptr %12, align 4, !tbaa !16
%13 = add nsw i32 %1, 1
%14 = getelementptr inbounds %struct.TYPE_10__, ptr %10, i64 2
store i32 %13, ptr %14, align 4, !tbaa !14
%15 = getelementptr inbounds %struct.TYPE_10__, ptr %10, i64 2, i32 1
store i32 %13, ptr %15, align 4, !tbaa !16
%16 = load i32, ptr @sl811h_driver, align 4, !tbaa !17
store i32 %16, ptr @platform_dev, align 8, !tbaa !20
%17 = tail call i32 @platform_device_register(ptr noundef nonnull @platform_dev) #2
br label %18
18: ; preds = %9, %6
%19 = phi i32 [ %8, %6 ], [ %17, %9 ]
ret i32 %19
}
declare i32 @platform_device_register(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 8}
!6 = !{!"TYPE_11__", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_8__", !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!11, !11, i64 0}
!14 = !{!15, !7, i64 0}
!15 = !{!"TYPE_10__", !7, i64 0, !7, i64 4}
!16 = !{!15, !7, i64 4}
!17 = !{!18, !7, i64 0}
!18 = !{!"TYPE_9__", !19, i64 0}
!19 = !{!"TYPE_7__", !7, i64 0}
!20 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/host/extr_sl811_cs.c_sl811_hc_init.c'
source_filename = "AnghaBench/linux/drivers/usb/host/extr_sl811_cs.c_sl811_hc_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_11__ = type { i32, %struct.TYPE_8__ }
%struct.TYPE_8__ = type { ptr }
%struct.TYPE_9__ = type { %struct.TYPE_7__ }
%struct.TYPE_7__ = type { i32 }
@platform_dev = common global %struct.TYPE_11__ zeroinitializer, align 8
@EBUSY = common local_unnamed_addr global i32 0, align 4
@resources = common local_unnamed_addr global ptr null, align 8
@sl811h_driver = common local_unnamed_addr global %struct.TYPE_9__ zeroinitializer, align 4
@llvm.used = appending global [1 x ptr] [ptr @sl811_hc_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @sl811_hc_init(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load ptr, ptr getelementptr inbounds (i8, ptr @platform_dev, i64 8), align 8, !tbaa !6
%5 = icmp eq ptr %4, null
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = load i32, ptr @EBUSY, align 4, !tbaa !13
%8 = sub nsw i32 0, %7
br label %18
9: ; preds = %3
store ptr %0, ptr getelementptr inbounds (i8, ptr @platform_dev, i64 8), align 8, !tbaa !6
%10 = load ptr, ptr @resources, align 8, !tbaa !14
store i32 %2, ptr %10, align 4, !tbaa !15
%11 = getelementptr inbounds i8, ptr %10, i64 8
store i32 %1, ptr %11, align 4, !tbaa !15
%12 = getelementptr inbounds i8, ptr %10, i64 12
store i32 %1, ptr %12, align 4, !tbaa !17
%13 = add nsw i32 %1, 1
%14 = getelementptr inbounds i8, ptr %10, i64 16
store i32 %13, ptr %14, align 4, !tbaa !15
%15 = getelementptr inbounds i8, ptr %10, i64 20
store i32 %13, ptr %15, align 4, !tbaa !17
%16 = load i32, ptr @sl811h_driver, align 4, !tbaa !18
store i32 %16, ptr @platform_dev, align 8, !tbaa !21
%17 = tail call i32 @platform_device_register(ptr noundef nonnull @platform_dev) #2
br label %18
18: ; preds = %9, %6
%19 = phi i32 [ %8, %6 ], [ %17, %9 ]
ret i32 %19
}
declare i32 @platform_device_register(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 8}
!7 = !{!"TYPE_11__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_8__", !12, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!12, !12, i64 0}
!15 = !{!16, !8, i64 0}
!16 = !{!"TYPE_10__", !8, i64 0, !8, i64 4}
!17 = !{!16, !8, i64 4}
!18 = !{!19, !8, i64 0}
!19 = !{!"TYPE_9__", !20, i64 0}
!20 = !{!"TYPE_7__", !8, i64 0}
!21 = !{!7, !8, i64 0}
| linux_drivers_usb_host_extr_sl811_cs.c_sl811_hc_init |
; ModuleID = 'AnghaBench/zstd/tests/regression/extr_data.c_curl_data_create.c'
source_filename = "AnghaBench/zstd/tests/regression/extr_data.c_curl_data_create.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { ptr, ptr, i32 }
@g_data_dir = dso_local local_unnamed_addr global i32 0, align 4
@data_type_file = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [13 x i8] c"zstd -dqfo '\00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"'\00", align 1
@ENOMEM = dso_local local_unnamed_addr global ptr null, align 8
@.str.2 = private unnamed_addr constant [2 x i8] c"w\00", align 1
@.str.3 = private unnamed_addr constant [23 x i8] c"zstd -dc | tar -x -C '\00", align 1
@errno = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @curl_data_create], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @curl_data_create(ptr dead_on_unwind noalias writable sret(%struct.TYPE_6__) align 8 %0, ptr nocapture noundef readonly %1, i64 noundef %2) #0 {
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %0, i8 0, i64 24, i1 false)
%4 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 2
%5 = tail call i32 @XXH64_reset(ptr noundef nonnull %4, i32 noundef 0) #4
%6 = load i32, ptr @g_data_dir, align 4, !tbaa !5
%7 = tail call i32 @UTIL_isDirectory(i32 noundef %6) #4
%8 = tail call i32 @assert(i32 noundef %7) #4
%9 = load i64, ptr @data_type_file, align 8, !tbaa !9
%10 = icmp eq i64 %9, %2
br i1 %10, label %11, label %15
11: ; preds = %3
%12 = load i32, ptr %1, align 4, !tbaa !11
%13 = tail call ptr @cat3(ptr noundef nonnull @.str, i32 noundef %12, ptr noundef nonnull @.str.1) #4
%14 = icmp eq ptr %13, null
br i1 %14, label %27, label %19
15: ; preds = %3
%16 = load i32, ptr @g_data_dir, align 4, !tbaa !5
%17 = tail call ptr @cat3(ptr noundef nonnull @.str.3, i32 noundef %16, ptr noundef nonnull @.str.1) #4
%18 = icmp eq ptr %17, null
br i1 %18, label %27, label %19
19: ; preds = %15, %11
%20 = phi ptr [ %13, %11 ], [ %17, %15 ]
%21 = tail call ptr @popen(ptr noundef nonnull %20, ptr noundef nonnull @.str.2)
%22 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1
store ptr %21, ptr %22, align 8, !tbaa !13
%23 = tail call i32 @free(ptr noundef nonnull %20) #4
%24 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1
%25 = load ptr, ptr %24, align 8, !tbaa !13
%26 = icmp eq ptr %25, null
br i1 %26, label %27, label %30
27: ; preds = %19, %15, %11
%28 = phi ptr [ @ENOMEM, %11 ], [ @ENOMEM, %15 ], [ @errno, %19 ]
%29 = load ptr, ptr %28, align 8, !tbaa !16
store ptr %29, ptr %0, align 8, !tbaa !17
br label %30
30: ; preds = %27, %19
ret void
}
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1
declare i32 @XXH64_reset(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @assert(i32 noundef) local_unnamed_addr #2
declare i32 @UTIL_isDirectory(i32 noundef) local_unnamed_addr #2
declare ptr @cat3(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: nofree nounwind
declare noalias noundef ptr @popen(ptr nocapture noundef readonly, ptr nocapture noundef readonly) local_unnamed_addr #3
declare i32 @free(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"TYPE_5__", !6, i64 0}
!13 = !{!14, !15, i64 8}
!14 = !{!"TYPE_6__", !15, i64 0, !15, i64 8, !6, i64 16}
!15 = !{!"any pointer", !7, i64 0}
!16 = !{!15, !15, i64 0}
!17 = !{!14, !15, i64 0}
| ; ModuleID = 'AnghaBench/zstd/tests/regression/extr_data.c_curl_data_create.c'
source_filename = "AnghaBench/zstd/tests/regression/extr_data.c_curl_data_create.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_6__ = type { ptr, ptr, i32 }
@g_data_dir = common local_unnamed_addr global i32 0, align 4
@data_type_file = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [13 x i8] c"zstd -dqfo '\00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"'\00", align 1
@ENOMEM = common local_unnamed_addr global ptr null, align 8
@.str.2 = private unnamed_addr constant [2 x i8] c"w\00", align 1
@.str.3 = private unnamed_addr constant [23 x i8] c"zstd -dc | tar -x -C '\00", align 1
@errno = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @curl_data_create], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @curl_data_create(ptr dead_on_unwind noalias writable sret(%struct.TYPE_6__) align 8 %0, ptr nocapture noundef readonly %1, i64 noundef %2) #0 {
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %0, i8 0, i64 24, i1 false)
%4 = getelementptr inbounds i8, ptr %0, i64 16
%5 = tail call i32 @XXH64_reset(ptr noundef nonnull %4, i32 noundef 0) #4
%6 = load i32, ptr @g_data_dir, align 4, !tbaa !6
%7 = tail call i32 @UTIL_isDirectory(i32 noundef %6) #4
%8 = tail call i32 @assert(i32 noundef %7) #4
%9 = load i64, ptr @data_type_file, align 8, !tbaa !10
%10 = icmp eq i64 %9, %2
br i1 %10, label %11, label %15
11: ; preds = %3
%12 = load i32, ptr %1, align 4, !tbaa !12
%13 = tail call ptr @cat3(ptr noundef nonnull @.str, i32 noundef %12, ptr noundef nonnull @.str.1) #4
%14 = icmp eq ptr %13, null
br i1 %14, label %26, label %19
15: ; preds = %3
%16 = load i32, ptr @g_data_dir, align 4, !tbaa !6
%17 = tail call ptr @cat3(ptr noundef nonnull @.str.3, i32 noundef %16, ptr noundef nonnull @.str.1) #4
%18 = icmp eq ptr %17, null
br i1 %18, label %26, label %19
19: ; preds = %15, %11
%20 = phi ptr [ %13, %11 ], [ %17, %15 ]
%21 = tail call ptr @popen(ptr noundef nonnull %20, ptr noundef nonnull @.str.2)
%22 = getelementptr inbounds i8, ptr %0, i64 8
store ptr %21, ptr %22, align 8, !tbaa !14
%23 = tail call i32 @free(ptr noundef nonnull %20) #4
%24 = load ptr, ptr %22, align 8, !tbaa !14
%25 = icmp eq ptr %24, null
br i1 %25, label %26, label %29
26: ; preds = %19, %15, %11
%27 = phi ptr [ @ENOMEM, %11 ], [ @ENOMEM, %15 ], [ @errno, %19 ]
%28 = load ptr, ptr %27, align 8, !tbaa !17
store ptr %28, ptr %0, align 8, !tbaa !18
br label %29
29: ; preds = %26, %19
ret void
}
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1
declare i32 @XXH64_reset(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @assert(i32 noundef) local_unnamed_addr #2
declare i32 @UTIL_isDirectory(i32 noundef) local_unnamed_addr #2
declare ptr @cat3(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: nofree nounwind
declare noalias noundef ptr @popen(ptr nocapture noundef readonly, ptr nocapture noundef readonly) local_unnamed_addr #3
declare i32 @free(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"TYPE_5__", !7, i64 0}
!14 = !{!15, !16, i64 8}
!15 = !{!"TYPE_6__", !16, i64 0, !16, i64 8, !7, i64 16}
!16 = !{!"any pointer", !8, i64 0}
!17 = !{!16, !16, i64 0}
!18 = !{!15, !16, i64 0}
| zstd_tests_regression_extr_data.c_curl_data_create |
; ModuleID = 'AnghaBench/linux/drivers/pci/hotplug/extr_acpiphp_glue.c_device_status_valid.c'
source_filename = "AnghaBench/linux/drivers/pci/hotplug/extr_acpiphp_glue.c_device_status_valid.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ACPI_STA_DEVICE_ENABLED = dso_local local_unnamed_addr global i32 0, align 4
@ACPI_STA_DEVICE_FUNCTIONING = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @device_status_valid], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal i32 @device_status_valid(i32 noundef %0) #0 {
%2 = load i32, ptr @ACPI_STA_DEVICE_ENABLED, align 4, !tbaa !5
%3 = load i32, ptr @ACPI_STA_DEVICE_FUNCTIONING, align 4, !tbaa !5
%4 = or i32 %3, %2
%5 = and i32 %4, %0
%6 = icmp eq i32 %5, %4
%7 = zext i1 %6 to i32
ret i32 %7
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/pci/hotplug/extr_acpiphp_glue.c_device_status_valid.c'
source_filename = "AnghaBench/linux/drivers/pci/hotplug/extr_acpiphp_glue.c_device_status_valid.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ACPI_STA_DEVICE_ENABLED = common local_unnamed_addr global i32 0, align 4
@ACPI_STA_DEVICE_FUNCTIONING = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @device_status_valid], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal range(i32 0, 2) i32 @device_status_valid(i32 noundef %0) #0 {
%2 = load i32, ptr @ACPI_STA_DEVICE_ENABLED, align 4, !tbaa !6
%3 = load i32, ptr @ACPI_STA_DEVICE_FUNCTIONING, align 4, !tbaa !6
%4 = or i32 %3, %2
%5 = and i32 %4, %0
%6 = icmp eq i32 %5, %4
%7 = zext i1 %6 to i32
ret i32 %7
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_pci_hotplug_extr_acpiphp_glue.c_device_status_valid |
; ModuleID = 'AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_dev.c_ecore_calc_hw_mode.c'
source_filename = "AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_dev.c_ecore_calc_hw_mode.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ecore_hwfn = type { %struct.TYPE_8__, ptr }
%struct.TYPE_8__ = type { i32 }
%struct.TYPE_9__ = type { i32, i32, i64, i32 }
@MODE_BB = dso_local local_unnamed_addr global i32 0, align 4
@MODE_K2 = dso_local local_unnamed_addr global i32 0, align 4
@MODE_E5 = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [23 x i8] c"Unknown chip type %#x\0A\00", align 1
@ECORE_INVAL = dso_local local_unnamed_addr global i32 0, align 4
@MODE_PORTS_PER_ENG_1 = dso_local local_unnamed_addr global i32 0, align 4
@MODE_PORTS_PER_ENG_2 = dso_local local_unnamed_addr global i32 0, align 4
@MODE_PORTS_PER_ENG_4 = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [40 x i8] c"num_ports_in_engine = %d not supported\0A\00", align 1
@ECORE_MF_OVLAN_CLSS = dso_local local_unnamed_addr global i32 0, align 4
@MODE_MF_SD = dso_local local_unnamed_addr global i32 0, align 4
@MODE_MF_SI = dso_local local_unnamed_addr global i32 0, align 4
@MODE_FPGA = dso_local local_unnamed_addr global i32 0, align 4
@MODE_EMUL_FULL = dso_local local_unnamed_addr global i32 0, align 4
@MODE_EMUL_REDUCED = dso_local local_unnamed_addr global i32 0, align 4
@MODE_ASIC = dso_local local_unnamed_addr global i32 0, align 4
@MODE_100G = dso_local local_unnamed_addr global i32 0, align 4
@ECORE_MSG_PROBE = dso_local local_unnamed_addr global i32 0, align 4
@ECORE_MSG_IFUP = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [42 x i8] c"Configuring function for hw_mode: 0x%08x\0A\00", align 1
@ECORE_SUCCESS = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ecore_calc_hw_mode], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ecore_calc_hw_mode(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.ecore_hwfn, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = tail call i64 @ECORE_IS_BB_B0(ptr noundef %3) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %18
6: ; preds = %1
%7 = load ptr, ptr %2, align 8, !tbaa !5
%8 = tail call i64 @ECORE_IS_AH(ptr noundef %7) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load ptr, ptr %2, align 8, !tbaa !5
%12 = tail call i64 @ECORE_IS_E5(ptr noundef %11) #2
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load ptr, ptr %2, align 8, !tbaa !5
%16 = load i32, ptr %15, align 8, !tbaa !12
%17 = tail call i32 @DP_NOTICE(ptr noundef nonnull %0, i32 noundef 1, ptr noundef nonnull @.str, i32 noundef %16) #2
br label %72
18: ; preds = %10, %6, %1
%19 = phi ptr [ @MODE_BB, %1 ], [ @MODE_K2, %6 ], [ @MODE_E5, %10 ]
%20 = load i32, ptr %19, align 4, !tbaa !15
%21 = shl nuw i32 1, %20
%22 = load ptr, ptr %2, align 8, !tbaa !5
%23 = getelementptr inbounds %struct.TYPE_9__, ptr %22, i64 0, i32 1
%24 = load i32, ptr %23, align 4, !tbaa !16
switch i32 %24, label %27 [
i32 1, label %29
i32 2, label %25
i32 4, label %26
]
25: ; preds = %18
br label %29
26: ; preds = %18
br label %29
27: ; preds = %18
%28 = tail call i32 @DP_NOTICE(ptr noundef nonnull %0, i32 noundef 1, ptr noundef nonnull @.str.1, i32 noundef %24) #2
br label %72
29: ; preds = %18, %26, %25
%30 = phi ptr [ @MODE_PORTS_PER_ENG_4, %26 ], [ @MODE_PORTS_PER_ENG_2, %25 ], [ @MODE_PORTS_PER_ENG_1, %18 ]
%31 = load i32, ptr %30, align 4, !tbaa !15
%32 = shl nuw i32 1, %31
%33 = or i32 %32, %21
%34 = load i32, ptr @ECORE_MF_OVLAN_CLSS, align 4, !tbaa !15
%35 = getelementptr inbounds %struct.TYPE_9__, ptr %22, i64 0, i32 3
%36 = tail call i64 @OSAL_TEST_BIT(i32 noundef %34, ptr noundef nonnull %35) #2
%37 = icmp eq i64 %36, 0
%38 = load i32, ptr @MODE_MF_SI, align 4
%39 = load i32, ptr @MODE_MF_SD, align 4
%40 = select i1 %37, i32 %38, i32 %39
%41 = shl nuw i32 1, %40
%42 = or i32 %33, %41
%43 = load ptr, ptr %2, align 8, !tbaa !5
%44 = tail call i64 @CHIP_REV_IS_SLOW(ptr noundef %43) #2
%45 = icmp eq i64 %44, 0
%46 = load ptr, ptr %2, align 8, !tbaa !5
br i1 %45, label %56, label %47
47: ; preds = %29
%48 = tail call i64 @CHIP_REV_IS_FPGA(ptr noundef %46) #2
%49 = icmp eq i64 %48, 0
%50 = load ptr, ptr %2, align 8, !tbaa !5
br i1 %49, label %51, label %56
51: ; preds = %47
%52 = getelementptr inbounds %struct.TYPE_9__, ptr %50, i64 0, i32 2
%53 = load i64, ptr %52, align 8, !tbaa !17
%54 = icmp eq i64 %53, 0
%55 = select i1 %54, ptr @MODE_EMUL_REDUCED, ptr @MODE_EMUL_FULL
br label %56
56: ; preds = %29, %51, %47
%57 = phi ptr [ %50, %47 ], [ %50, %51 ], [ %46, %29 ]
%58 = phi ptr [ @MODE_FPGA, %47 ], [ %55, %51 ], [ @MODE_ASIC, %29 ]
%59 = load i32, ptr %58, align 4, !tbaa !15
%60 = shl nuw i32 1, %59
%61 = or i32 %42, %60
%62 = tail call i64 @ECORE_IS_CMT(ptr noundef %57) #2
%63 = icmp eq i64 %62, 0
%64 = load i32, ptr @MODE_100G, align 4
%65 = shl nuw i32 1, %64
%66 = select i1 %63, i32 0, i32 %65
%67 = or i32 %61, %66
store i32 %67, ptr %0, align 8, !tbaa !18
%68 = load i32, ptr @ECORE_MSG_PROBE, align 4, !tbaa !15
%69 = load i32, ptr @ECORE_MSG_IFUP, align 4, !tbaa !15
%70 = or i32 %69, %68
%71 = tail call i32 @DP_VERBOSE(ptr noundef nonnull %0, i32 noundef %70, ptr noundef nonnull @.str.2, i32 noundef %67) #2
br label %72
72: ; preds = %56, %27, %14
%73 = phi ptr [ @ECORE_INVAL, %27 ], [ @ECORE_SUCCESS, %56 ], [ @ECORE_INVAL, %14 ]
%74 = load i32, ptr %73, align 4, !tbaa !15
ret i32 %74
}
declare i64 @ECORE_IS_BB_B0(ptr noundef) local_unnamed_addr #1
declare i64 @ECORE_IS_AH(ptr noundef) local_unnamed_addr #1
declare i64 @ECORE_IS_E5(ptr noundef) local_unnamed_addr #1
declare i32 @DP_NOTICE(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @OSAL_TEST_BIT(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @CHIP_REV_IS_SLOW(ptr noundef) local_unnamed_addr #1
declare i64 @CHIP_REV_IS_FPGA(ptr noundef) local_unnamed_addr #1
declare i64 @ECORE_IS_CMT(ptr noundef) local_unnamed_addr #1
declare i32 @DP_VERBOSE(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 8}
!6 = !{!"ecore_hwfn", !7, i64 0, !11, i64 8}
!7 = !{!"TYPE_8__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"TYPE_9__", !8, i64 0, !8, i64 4, !14, i64 8, !8, i64 16}
!14 = !{!"long", !9, i64 0}
!15 = !{!8, !8, i64 0}
!16 = !{!13, !8, i64 4}
!17 = !{!13, !14, i64 8}
!18 = !{!6, !8, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_dev.c_ecore_calc_hw_mode.c'
source_filename = "AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_dev.c_ecore_calc_hw_mode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MODE_BB = common local_unnamed_addr global i32 0, align 4
@MODE_K2 = common local_unnamed_addr global i32 0, align 4
@MODE_E5 = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [23 x i8] c"Unknown chip type %#x\0A\00", align 1
@ECORE_INVAL = common local_unnamed_addr global i32 0, align 4
@MODE_PORTS_PER_ENG_1 = common local_unnamed_addr global i32 0, align 4
@MODE_PORTS_PER_ENG_2 = common local_unnamed_addr global i32 0, align 4
@MODE_PORTS_PER_ENG_4 = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [40 x i8] c"num_ports_in_engine = %d not supported\0A\00", align 1
@ECORE_MF_OVLAN_CLSS = common local_unnamed_addr global i32 0, align 4
@MODE_MF_SD = common local_unnamed_addr global i32 0, align 4
@MODE_MF_SI = common local_unnamed_addr global i32 0, align 4
@MODE_FPGA = common local_unnamed_addr global i32 0, align 4
@MODE_EMUL_FULL = common local_unnamed_addr global i32 0, align 4
@MODE_EMUL_REDUCED = common local_unnamed_addr global i32 0, align 4
@MODE_ASIC = common local_unnamed_addr global i32 0, align 4
@MODE_100G = common local_unnamed_addr global i32 0, align 4
@ECORE_MSG_PROBE = common local_unnamed_addr global i32 0, align 4
@ECORE_MSG_IFUP = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [42 x i8] c"Configuring function for hw_mode: 0x%08x\0A\00", align 1
@ECORE_SUCCESS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ecore_calc_hw_mode], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ecore_calc_hw_mode(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = tail call i64 @ECORE_IS_BB_B0(ptr noundef %3) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %18
6: ; preds = %1
%7 = load ptr, ptr %2, align 8, !tbaa !6
%8 = tail call i64 @ECORE_IS_AH(ptr noundef %7) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load ptr, ptr %2, align 8, !tbaa !6
%12 = tail call i64 @ECORE_IS_E5(ptr noundef %11) #2
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load ptr, ptr %2, align 8, !tbaa !6
%16 = load i32, ptr %15, align 8, !tbaa !13
%17 = tail call i32 @DP_NOTICE(ptr noundef nonnull %0, i32 noundef 1, ptr noundef nonnull @.str, i32 noundef %16) #2
br label %72
18: ; preds = %10, %6, %1
%19 = phi ptr [ @MODE_BB, %1 ], [ @MODE_K2, %6 ], [ @MODE_E5, %10 ]
%20 = load i32, ptr %19, align 4, !tbaa !16
%21 = shl nuw i32 1, %20
%22 = load ptr, ptr %2, align 8, !tbaa !6
%23 = getelementptr inbounds i8, ptr %22, i64 4
%24 = load i32, ptr %23, align 4, !tbaa !17
switch i32 %24, label %27 [
i32 1, label %29
i32 2, label %25
i32 4, label %26
]
25: ; preds = %18
br label %29
26: ; preds = %18
br label %29
27: ; preds = %18
%28 = tail call i32 @DP_NOTICE(ptr noundef nonnull %0, i32 noundef 1, ptr noundef nonnull @.str.1, i32 noundef %24) #2
br label %72
29: ; preds = %18, %26, %25
%30 = phi ptr [ @MODE_PORTS_PER_ENG_4, %26 ], [ @MODE_PORTS_PER_ENG_2, %25 ], [ @MODE_PORTS_PER_ENG_1, %18 ]
%31 = load i32, ptr %30, align 4, !tbaa !16
%32 = shl nuw i32 1, %31
%33 = or i32 %32, %21
%34 = load i32, ptr @ECORE_MF_OVLAN_CLSS, align 4, !tbaa !16
%35 = getelementptr inbounds i8, ptr %22, i64 16
%36 = tail call i64 @OSAL_TEST_BIT(i32 noundef %34, ptr noundef nonnull %35) #2
%37 = icmp eq i64 %36, 0
%38 = load i32, ptr @MODE_MF_SI, align 4
%39 = load i32, ptr @MODE_MF_SD, align 4
%40 = select i1 %37, i32 %38, i32 %39
%41 = shl nuw i32 1, %40
%42 = or i32 %33, %41
%43 = load ptr, ptr %2, align 8, !tbaa !6
%44 = tail call i64 @CHIP_REV_IS_SLOW(ptr noundef %43) #2
%45 = icmp eq i64 %44, 0
%46 = load ptr, ptr %2, align 8, !tbaa !6
br i1 %45, label %56, label %47
47: ; preds = %29
%48 = tail call i64 @CHIP_REV_IS_FPGA(ptr noundef %46) #2
%49 = icmp eq i64 %48, 0
%50 = load ptr, ptr %2, align 8, !tbaa !6
br i1 %49, label %51, label %56
51: ; preds = %47
%52 = getelementptr inbounds i8, ptr %50, i64 8
%53 = load i64, ptr %52, align 8, !tbaa !18
%54 = icmp eq i64 %53, 0
%55 = select i1 %54, ptr @MODE_EMUL_REDUCED, ptr @MODE_EMUL_FULL
br label %56
56: ; preds = %29, %51, %47
%57 = phi ptr [ %50, %47 ], [ %50, %51 ], [ %46, %29 ]
%58 = phi ptr [ @MODE_FPGA, %47 ], [ %55, %51 ], [ @MODE_ASIC, %29 ]
%59 = load i32, ptr %58, align 4, !tbaa !16
%60 = shl nuw i32 1, %59
%61 = or i32 %42, %60
%62 = tail call i64 @ECORE_IS_CMT(ptr noundef %57) #2
%63 = icmp eq i64 %62, 0
%64 = load i32, ptr @MODE_100G, align 4
%65 = shl nuw i32 1, %64
%66 = select i1 %63, i32 0, i32 %65
%67 = or i32 %61, %66
store i32 %67, ptr %0, align 8, !tbaa !19
%68 = load i32, ptr @ECORE_MSG_PROBE, align 4, !tbaa !16
%69 = load i32, ptr @ECORE_MSG_IFUP, align 4, !tbaa !16
%70 = or i32 %69, %68
%71 = tail call i32 @DP_VERBOSE(ptr noundef nonnull %0, i32 noundef %70, ptr noundef nonnull @.str.2, i32 noundef %67) #2
br label %72
72: ; preds = %56, %27, %14
%73 = phi ptr [ @ECORE_INVAL, %27 ], [ @ECORE_SUCCESS, %56 ], [ @ECORE_INVAL, %14 ]
%74 = load i32, ptr %73, align 4, !tbaa !16
ret i32 %74
}
declare i64 @ECORE_IS_BB_B0(ptr noundef) local_unnamed_addr #1
declare i64 @ECORE_IS_AH(ptr noundef) local_unnamed_addr #1
declare i64 @ECORE_IS_E5(ptr noundef) local_unnamed_addr #1
declare i32 @DP_NOTICE(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @OSAL_TEST_BIT(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @CHIP_REV_IS_SLOW(ptr noundef) local_unnamed_addr #1
declare i64 @CHIP_REV_IS_FPGA(ptr noundef) local_unnamed_addr #1
declare i64 @ECORE_IS_CMT(ptr noundef) local_unnamed_addr #1
declare i32 @DP_VERBOSE(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 8}
!7 = !{!"ecore_hwfn", !8, i64 0, !12, i64 8}
!8 = !{!"TYPE_8__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!14, !9, i64 0}
!14 = !{!"TYPE_9__", !9, i64 0, !9, i64 4, !15, i64 8, !9, i64 16}
!15 = !{!"long", !10, i64 0}
!16 = !{!9, !9, i64 0}
!17 = !{!14, !9, i64 4}
!18 = !{!14, !15, i64 8}
!19 = !{!7, !9, i64 0}
| freebsd_sys_dev_qlnx_qlnxe_extr_ecore_dev.c_ecore_calc_hw_mode |
; ModuleID = 'AnghaBench/zfs/module/os/linux/zfs/extr_zfs_ctldir.c_zfsctl_snapdir_rename.c'
source_filename = "AnghaBench/zfs/module/os/linux/zfs/extr_zfs_ctldir.c_zfsctl_snapdir_rename.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i64, i32 }
@zfs_admin_snapshot = dso_local local_unnamed_addr global i32 0, align 4
@EACCES = dso_local local_unnamed_addr global i32 0, align 4
@ZFS_MAX_DATASET_NAME_LEN = dso_local local_unnamed_addr global i32 0, align 4
@KM_SLEEP = dso_local local_unnamed_addr global i32 0, align 4
@ZFS_CASE_INSENSITIVE = dso_local local_unnamed_addr global i64 0, align 8
@ENOTSUP = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@zfs_snapshot_lock = dso_local global i32 0, align 4
@RW_WRITER = dso_local local_unnamed_addr global i32 0, align 4
@B_FALSE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @zfsctl_snapdir_rename(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, i32 noundef %5) local_unnamed_addr #0 {
%7 = tail call ptr @ITOZSB(ptr noundef %0) #2
%8 = load i32, ptr @zfs_admin_snapshot, align 4, !tbaa !5
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %6
%11 = load i32, ptr @EACCES, align 4, !tbaa !5
%12 = tail call i32 @SET_ERROR(i32 noundef %11) #2
br label %85
13: ; preds = %6
%14 = tail call i32 @ZFS_ENTER(ptr noundef %7) #2
%15 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !5
%16 = load i32, ptr @KM_SLEEP, align 4, !tbaa !5
%17 = tail call ptr @kmem_alloc(i32 noundef %15, i32 noundef %16) #2
%18 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !5
%19 = load i32, ptr @KM_SLEEP, align 4, !tbaa !5
%20 = tail call ptr @kmem_alloc(i32 noundef %18, i32 noundef %19) #2
%21 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !5
%22 = load i32, ptr @KM_SLEEP, align 4, !tbaa !5
%23 = tail call ptr @kmem_alloc(i32 noundef %21, i32 noundef %22) #2
%24 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !5
%25 = load i32, ptr @KM_SLEEP, align 4, !tbaa !5
%26 = tail call ptr @kmem_alloc(i32 noundef %24, i32 noundef %25) #2
%27 = load i64, ptr %7, align 8, !tbaa !9
%28 = load i64, ptr @ZFS_CASE_INSENSITIVE, align 8, !tbaa !12
%29 = icmp eq i64 %27, %28
br i1 %29, label %30, label %39
30: ; preds = %13
%31 = getelementptr inbounds %struct.TYPE_6__, ptr %7, i64 0, i32 1
%32 = load i32, ptr %31, align 8, !tbaa !13
%33 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !5
%34 = tail call i32 @dmu_snapshot_realname(i32 noundef %32, ptr noundef %1, ptr noundef %23, i32 noundef %33, ptr noundef null) #2
%35 = icmp eq i32 %34, 0
br i1 %35, label %39, label %36
36: ; preds = %30
%37 = load i32, ptr @ENOTSUP, align 4, !tbaa !5
%38 = icmp eq i32 %34, %37
br i1 %38, label %39, label %74
39: ; preds = %30, %36, %13
%40 = phi ptr [ %1, %36 ], [ %1, %13 ], [ %23, %30 ]
%41 = getelementptr inbounds %struct.TYPE_6__, ptr %7, i64 0, i32 1
%42 = load i32, ptr %41, align 8, !tbaa !13
%43 = tail call i32 @dmu_objset_name(i32 noundef %42, ptr noundef %26) #2
%44 = tail call ptr @ITOZSB(ptr noundef %0) #2
%45 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !5
%46 = tail call i32 @zfsctl_snapshot_name(ptr noundef %44, ptr noundef %40, i32 noundef %45, ptr noundef %20) #2
%47 = icmp eq i32 %46, 0
br i1 %47, label %48, label %74
48: ; preds = %39
%49 = tail call ptr @ITOZSB(ptr noundef %2) #2
%50 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !5
%51 = tail call i32 @zfsctl_snapshot_name(ptr noundef %49, ptr noundef %3, i32 noundef %50, ptr noundef %17) #2
%52 = icmp eq i32 %51, 0
br i1 %52, label %53, label %74
53: ; preds = %48
%54 = tail call i32 @zfs_secpolicy_rename_perms(ptr noundef %20, ptr noundef %17, ptr noundef %4) #2
%55 = icmp eq i32 %54, 0
br i1 %55, label %56, label %74
56: ; preds = %53
%57 = icmp eq ptr %0, %2
br i1 %57, label %61, label %58
58: ; preds = %56
%59 = load i32, ptr @EINVAL, align 4, !tbaa !5
%60 = tail call i32 @SET_ERROR(i32 noundef %59) #2
br label %74
61: ; preds = %56
%62 = tail call i64 @strcmp(ptr noundef %40, ptr noundef %3) #2
%63 = icmp eq i64 %62, 0
br i1 %63, label %74, label %64
64: ; preds = %61
%65 = load i32, ptr @RW_WRITER, align 4, !tbaa !5
%66 = tail call i32 @rw_enter(ptr noundef nonnull @zfs_snapshot_lock, i32 noundef %65) #2
%67 = load i32, ptr @B_FALSE, align 4, !tbaa !5
%68 = tail call i32 @dsl_dataset_rename_snapshot(ptr noundef %26, ptr noundef %40, ptr noundef %3, i32 noundef %67) #2
%69 = icmp eq i32 %68, 0
br i1 %69, label %70, label %72
70: ; preds = %64
%71 = tail call i32 @zfsctl_snapshot_rename(ptr noundef %40, ptr noundef %3) #2
br label %72
72: ; preds = %70, %64
%73 = tail call i32 @rw_exit(ptr noundef nonnull @zfs_snapshot_lock) #2
br label %74
74: ; preds = %39, %48, %61, %53, %36, %72, %58
%75 = phi i32 [ %54, %53 ], [ %60, %58 ], [ %68, %72 ], [ %34, %36 ], [ 0, %61 ], [ %51, %48 ], [ %46, %39 ]
%76 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !5
%77 = tail call i32 @kmem_free(ptr noundef %20, i32 noundef %76) #2
%78 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !5
%79 = tail call i32 @kmem_free(ptr noundef %17, i32 noundef %78) #2
%80 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !5
%81 = tail call i32 @kmem_free(ptr noundef %23, i32 noundef %80) #2
%82 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !5
%83 = tail call i32 @kmem_free(ptr noundef %26, i32 noundef %82) #2
%84 = tail call i32 @ZFS_EXIT(ptr noundef nonnull %7) #2
br label %85
85: ; preds = %74, %10
%86 = phi i32 [ %75, %74 ], [ %12, %10 ]
ret i32 %86
}
declare ptr @ITOZSB(ptr noundef) local_unnamed_addr #1
declare i32 @SET_ERROR(i32 noundef) local_unnamed_addr #1
declare i32 @ZFS_ENTER(ptr noundef) local_unnamed_addr #1
declare ptr @kmem_alloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dmu_snapshot_realname(i32 noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dmu_objset_name(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @zfsctl_snapshot_name(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @zfs_secpolicy_rename_perms(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @rw_enter(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dsl_dataset_rename_snapshot(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @zfsctl_snapshot_rename(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @rw_exit(ptr noundef) local_unnamed_addr #1
declare i32 @kmem_free(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ZFS_EXIT(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_6__", !11, i64 0, !6, i64 8}
!11 = !{!"long", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!10, !6, i64 8}
| ; ModuleID = 'AnghaBench/zfs/module/os/linux/zfs/extr_zfs_ctldir.c_zfsctl_snapdir_rename.c'
source_filename = "AnghaBench/zfs/module/os/linux/zfs/extr_zfs_ctldir.c_zfsctl_snapdir_rename.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@zfs_admin_snapshot = common local_unnamed_addr global i32 0, align 4
@EACCES = common local_unnamed_addr global i32 0, align 4
@ZFS_MAX_DATASET_NAME_LEN = common local_unnamed_addr global i32 0, align 4
@KM_SLEEP = common local_unnamed_addr global i32 0, align 4
@ZFS_CASE_INSENSITIVE = common local_unnamed_addr global i64 0, align 8
@ENOTSUP = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@zfs_snapshot_lock = common global i32 0, align 4
@RW_WRITER = common local_unnamed_addr global i32 0, align 4
@B_FALSE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @zfsctl_snapdir_rename(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, i32 noundef %5) local_unnamed_addr #0 {
%7 = tail call ptr @ITOZSB(ptr noundef %0) #2
%8 = load i32, ptr @zfs_admin_snapshot, align 4, !tbaa !6
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %6
%11 = load i32, ptr @EACCES, align 4, !tbaa !6
%12 = tail call i32 @SET_ERROR(i32 noundef %11) #2
br label %85
13: ; preds = %6
%14 = tail call i32 @ZFS_ENTER(ptr noundef %7) #2
%15 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !6
%16 = load i32, ptr @KM_SLEEP, align 4, !tbaa !6
%17 = tail call ptr @kmem_alloc(i32 noundef %15, i32 noundef %16) #2
%18 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !6
%19 = load i32, ptr @KM_SLEEP, align 4, !tbaa !6
%20 = tail call ptr @kmem_alloc(i32 noundef %18, i32 noundef %19) #2
%21 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !6
%22 = load i32, ptr @KM_SLEEP, align 4, !tbaa !6
%23 = tail call ptr @kmem_alloc(i32 noundef %21, i32 noundef %22) #2
%24 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !6
%25 = load i32, ptr @KM_SLEEP, align 4, !tbaa !6
%26 = tail call ptr @kmem_alloc(i32 noundef %24, i32 noundef %25) #2
%27 = load i64, ptr %7, align 8, !tbaa !10
%28 = load i64, ptr @ZFS_CASE_INSENSITIVE, align 8, !tbaa !13
%29 = icmp eq i64 %27, %28
br i1 %29, label %30, label %39
30: ; preds = %13
%31 = getelementptr inbounds i8, ptr %7, i64 8
%32 = load i32, ptr %31, align 8, !tbaa !14
%33 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !6
%34 = tail call i32 @dmu_snapshot_realname(i32 noundef %32, ptr noundef %1, ptr noundef %23, i32 noundef %33, ptr noundef null) #2
%35 = icmp eq i32 %34, 0
br i1 %35, label %39, label %36
36: ; preds = %30
%37 = load i32, ptr @ENOTSUP, align 4, !tbaa !6
%38 = icmp eq i32 %34, %37
br i1 %38, label %39, label %74
39: ; preds = %30, %36, %13
%40 = phi ptr [ %1, %36 ], [ %1, %13 ], [ %23, %30 ]
%41 = getelementptr inbounds i8, ptr %7, i64 8
%42 = load i32, ptr %41, align 8, !tbaa !14
%43 = tail call i32 @dmu_objset_name(i32 noundef %42, ptr noundef %26) #2
%44 = tail call ptr @ITOZSB(ptr noundef %0) #2
%45 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !6
%46 = tail call i32 @zfsctl_snapshot_name(ptr noundef %44, ptr noundef %40, i32 noundef %45, ptr noundef %20) #2
%47 = icmp eq i32 %46, 0
br i1 %47, label %48, label %74
48: ; preds = %39
%49 = tail call ptr @ITOZSB(ptr noundef %2) #2
%50 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !6
%51 = tail call i32 @zfsctl_snapshot_name(ptr noundef %49, ptr noundef %3, i32 noundef %50, ptr noundef %17) #2
%52 = icmp eq i32 %51, 0
br i1 %52, label %53, label %74
53: ; preds = %48
%54 = tail call i32 @zfs_secpolicy_rename_perms(ptr noundef %20, ptr noundef %17, ptr noundef %4) #2
%55 = icmp eq i32 %54, 0
br i1 %55, label %56, label %74
56: ; preds = %53
%57 = icmp eq ptr %0, %2
br i1 %57, label %61, label %58
58: ; preds = %56
%59 = load i32, ptr @EINVAL, align 4, !tbaa !6
%60 = tail call i32 @SET_ERROR(i32 noundef %59) #2
br label %74
61: ; preds = %56
%62 = tail call i64 @strcmp(ptr noundef %40, ptr noundef %3) #2
%63 = icmp eq i64 %62, 0
br i1 %63, label %74, label %64
64: ; preds = %61
%65 = load i32, ptr @RW_WRITER, align 4, !tbaa !6
%66 = tail call i32 @rw_enter(ptr noundef nonnull @zfs_snapshot_lock, i32 noundef %65) #2
%67 = load i32, ptr @B_FALSE, align 4, !tbaa !6
%68 = tail call i32 @dsl_dataset_rename_snapshot(ptr noundef %26, ptr noundef %40, ptr noundef %3, i32 noundef %67) #2
%69 = icmp eq i32 %68, 0
br i1 %69, label %70, label %72
70: ; preds = %64
%71 = tail call i32 @zfsctl_snapshot_rename(ptr noundef %40, ptr noundef %3) #2
br label %72
72: ; preds = %70, %64
%73 = tail call i32 @rw_exit(ptr noundef nonnull @zfs_snapshot_lock) #2
br label %74
74: ; preds = %39, %48, %61, %53, %36, %72, %58
%75 = phi i32 [ %54, %53 ], [ %60, %58 ], [ %68, %72 ], [ %34, %36 ], [ 0, %61 ], [ %51, %48 ], [ %46, %39 ]
%76 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !6
%77 = tail call i32 @kmem_free(ptr noundef %20, i32 noundef %76) #2
%78 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !6
%79 = tail call i32 @kmem_free(ptr noundef %17, i32 noundef %78) #2
%80 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !6
%81 = tail call i32 @kmem_free(ptr noundef %23, i32 noundef %80) #2
%82 = load i32, ptr @ZFS_MAX_DATASET_NAME_LEN, align 4, !tbaa !6
%83 = tail call i32 @kmem_free(ptr noundef %26, i32 noundef %82) #2
%84 = tail call i32 @ZFS_EXIT(ptr noundef nonnull %7) #2
br label %85
85: ; preds = %74, %10
%86 = phi i32 [ %75, %74 ], [ %12, %10 ]
ret i32 %86
}
declare ptr @ITOZSB(ptr noundef) local_unnamed_addr #1
declare i32 @SET_ERROR(i32 noundef) local_unnamed_addr #1
declare i32 @ZFS_ENTER(ptr noundef) local_unnamed_addr #1
declare ptr @kmem_alloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dmu_snapshot_realname(i32 noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dmu_objset_name(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @zfsctl_snapshot_name(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @zfs_secpolicy_rename_perms(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @rw_enter(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dsl_dataset_rename_snapshot(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @zfsctl_snapshot_rename(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @rw_exit(ptr noundef) local_unnamed_addr #1
declare i32 @kmem_free(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ZFS_EXIT(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_6__", !12, i64 0, !7, i64 8}
!12 = !{!"long", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!11, !7, i64 8}
| zfs_module_os_linux_zfs_extr_zfs_ctldir.c_zfsctl_snapdir_rename |
; ModuleID = 'AnghaBench/freebsd/sys/dev/asmc/extr_asmc.c_asmc_attach.c'
source_filename = "AnghaBench/freebsd/sys/dev/asmc/extr_asmc.c_asmc_attach.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.asmc_softc = type { i32, ptr, i32, ptr, i64, ptr, i64, i32, i32, ptr, ptr, ptr, ptr, ptr }
%struct.asmc_model = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
@SYS_RES_IOPORT = dso_local local_unnamed_addr global i32 0, align 4
@RF_ACTIVE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [28 x i8] c"unable to allocate IO port\0A\00", align 1
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [5 x i8] c"asmc\00", align 1
@MTX_SPIN = dso_local local_unnamed_addr global i32 0, align 4
@OID_AUTO = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [4 x i8] c"fan\00", align 1
@CTLFLAG_RD = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [14 x i8] c"Fan Root Tree\00", align 1
@.str.4 = private unnamed_addr constant [12 x i8] c"Fan Subtree\00", align 1
@.str.5 = private unnamed_addr constant [3 x i8] c"id\00", align 1
@CTLTYPE_STRING = dso_local local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [2 x i8] c"I\00", align 1
@.str.7 = private unnamed_addr constant [7 x i8] c"Fan ID\00", align 1
@.str.8 = private unnamed_addr constant [6 x i8] c"speed\00", align 1
@CTLTYPE_INT = dso_local local_unnamed_addr global i32 0, align 4
@.str.9 = private unnamed_addr constant [17 x i8] c"Fan speed in RPM\00", align 1
@.str.10 = private unnamed_addr constant [10 x i8] c"safespeed\00", align 1
@.str.11 = private unnamed_addr constant [22 x i8] c"Fan safe speed in RPM\00", align 1
@.str.12 = private unnamed_addr constant [9 x i8] c"minspeed\00", align 1
@CTLFLAG_RW = dso_local local_unnamed_addr global i32 0, align 4
@.str.13 = private unnamed_addr constant [25 x i8] c"Fan minimum speed in RPM\00", align 1
@.str.14 = private unnamed_addr constant [9 x i8] c"maxspeed\00", align 1
@.str.15 = private unnamed_addr constant [25 x i8] c"Fan maximum speed in RPM\00", align 1
@.str.16 = private unnamed_addr constant [12 x i8] c"targetspeed\00", align 1
@.str.17 = private unnamed_addr constant [24 x i8] c"Fan target speed in RPM\00", align 1
@.str.18 = private unnamed_addr constant [5 x i8] c"temp\00", align 1
@.str.19 = private unnamed_addr constant [20 x i8] c"Temperature sensors\00", align 1
@asmc_temp_sysctl = dso_local local_unnamed_addr global ptr null, align 8
@.str.20 = private unnamed_addr constant [6 x i8] c"light\00", align 1
@.str.21 = private unnamed_addr constant [27 x i8] c"Keyboard backlight sensors\00", align 1
@.str.22 = private unnamed_addr constant [5 x i8] c"left\00", align 1
@.str.23 = private unnamed_addr constant [31 x i8] c"Keyboard backlight left sensor\00", align 1
@.str.24 = private unnamed_addr constant [6 x i8] c"right\00", align 1
@.str.25 = private unnamed_addr constant [32 x i8] c"Keyboard backlight right sensor\00", align 1
@.str.26 = private unnamed_addr constant [8 x i8] c"control\00", align 1
@CTLFLAG_ANYBODY = dso_local local_unnamed_addr global i32 0, align 4
@.str.27 = private unnamed_addr constant [38 x i8] c"Keyboard backlight brightness control\00", align 1
@.str.28 = private unnamed_addr constant [4 x i8] c"sms\00", align 1
@.str.29 = private unnamed_addr constant [21 x i8] c"Sudden Motion Sensor\00", align 1
@.str.30 = private unnamed_addr constant [2 x i8] c"x\00", align 1
@.str.31 = private unnamed_addr constant [29 x i8] c"Sudden Motion Sensor X value\00", align 1
@.str.32 = private unnamed_addr constant [2 x i8] c"y\00", align 1
@.str.33 = private unnamed_addr constant [29 x i8] c"Sudden Motion Sensor Y value\00", align 1
@.str.34 = private unnamed_addr constant [2 x i8] c"z\00", align 1
@.str.35 = private unnamed_addr constant [29 x i8] c"Sudden Motion Sensor Z value\00", align 1
@asmc_sms_task = dso_local local_unnamed_addr global i32 0, align 4
@.str.36 = private unnamed_addr constant [11 x i8] c"asmc_taskq\00", align 1
@M_WAITOK = dso_local local_unnamed_addr global i32 0, align 4
@taskqueue_thread_enqueue = dso_local local_unnamed_addr global i32 0, align 4
@PI_REALTIME = dso_local local_unnamed_addr global i32 0, align 4
@.str.37 = private unnamed_addr constant [13 x i8] c"%s sms taskq\00", align 1
@SYS_RES_IRQ = dso_local local_unnamed_addr global i32 0, align 4
@.str.38 = private unnamed_addr constant [33 x i8] c"unable to allocate IRQ resource\0A\00", align 1
@ENXIO = dso_local local_unnamed_addr global i32 0, align 4
@INTR_TYPE_MISC = dso_local local_unnamed_addr global i32 0, align 4
@INTR_MPSAFE = dso_local local_unnamed_addr global i32 0, align 4
@asmc_sms_intrfast = dso_local local_unnamed_addr global i32 0, align 4
@.str.39 = private unnamed_addr constant [25 x i8] c"unable to setup SMS IRQ\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @asmc_attach], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @asmc_attach(i32 noundef %0) #0 {
%2 = alloca [2 x i8], align 1
call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %2) #3
%3 = tail call ptr @device_get_softc(i32 noundef %0) #3
%4 = load i32, ptr @SYS_RES_IOPORT, align 4, !tbaa !5
%5 = getelementptr inbounds %struct.asmc_softc, ptr %3, i64 0, i32 4
%6 = load i32, ptr @RF_ACTIVE, align 4, !tbaa !5
%7 = tail call ptr @bus_alloc_resource_any(i32 noundef %0, i32 noundef %4, ptr noundef nonnull %5, i32 noundef %6) #3
%8 = getelementptr inbounds %struct.asmc_softc, ptr %3, i64 0, i32 3
store ptr %7, ptr %8, align 8, !tbaa !9
%9 = icmp eq ptr %7, null
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = tail call i32 @device_printf(i32 noundef %0, ptr noundef nonnull @.str) #3
%12 = load i32, ptr @ENOMEM, align 4, !tbaa !5
br label %266
13: ; preds = %1
%14 = tail call ptr @device_get_sysctl_ctx(i32 noundef %0) #3
%15 = tail call ptr @device_get_sysctl_tree(i32 noundef %0) #3
%16 = tail call ptr @asmc_match(i32 noundef %0) #3
%17 = getelementptr inbounds %struct.asmc_softc, ptr %3, i64 0, i32 2
%18 = load i32, ptr @MTX_SPIN, align 4, !tbaa !5
%19 = tail call i32 @mtx_init(ptr noundef nonnull %17, ptr noundef nonnull @.str.1, ptr noundef null, i32 noundef %18) #3
%20 = getelementptr inbounds %struct.asmc_softc, ptr %3, i64 0, i32 13
store ptr %16, ptr %20, align 8, !tbaa !13
%21 = tail call i32 @asmc_init(i32 noundef %0) #3
%22 = tail call i32 @SYSCTL_CHILDREN(ptr noundef %15) #3
%23 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%24 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%25 = tail call ptr @SYSCTL_ADD_NODE(ptr noundef %14, i32 noundef %22, i32 noundef %23, ptr noundef nonnull @.str.2, i32 noundef %24, i32 noundef 0, ptr noundef nonnull @.str.3) #3
%26 = getelementptr inbounds %struct.asmc_softc, ptr %3, i64 0, i32 12
%27 = load ptr, ptr %26, align 8, !tbaa !14
store ptr %25, ptr %27, align 8, !tbaa !15
%28 = load i32, ptr %3, align 8, !tbaa !16
%29 = icmp slt i32 %28, 1
br i1 %29, label %116, label %30
30: ; preds = %13
%31 = getelementptr inbounds [2 x i8], ptr %2, i64 0, i64 1
%32 = getelementptr inbounds %struct.asmc_model, ptr %16, i64 0, i32 14
%33 = getelementptr inbounds %struct.asmc_model, ptr %16, i64 0, i32 13
%34 = getelementptr inbounds %struct.asmc_model, ptr %16, i64 0, i32 12
%35 = getelementptr inbounds %struct.asmc_model, ptr %16, i64 0, i32 11
%36 = getelementptr inbounds %struct.asmc_model, ptr %16, i64 0, i32 10
%37 = getelementptr inbounds %struct.asmc_model, ptr %16, i64 0, i32 9
br label %38
38: ; preds = %30, %38
%39 = phi i64 [ 1, %30 ], [ %112, %38 ]
%40 = trunc i64 %39 to i8
%41 = add i8 %40, 47
store i8 %41, ptr %2, align 1, !tbaa !17
store i8 0, ptr %31, align 1, !tbaa !17
%42 = load ptr, ptr %26, align 8, !tbaa !14
%43 = load ptr, ptr %42, align 8, !tbaa !15
%44 = call i32 @SYSCTL_CHILDREN(ptr noundef %43) #3
%45 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%46 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%47 = call ptr @SYSCTL_ADD_NODE(ptr noundef %14, i32 noundef %44, i32 noundef %45, ptr noundef nonnull %2, i32 noundef %46, i32 noundef 0, ptr noundef nonnull @.str.4) #3
%48 = load ptr, ptr %26, align 8, !tbaa !14
%49 = getelementptr inbounds ptr, ptr %48, i64 %39
store ptr %47, ptr %49, align 8, !tbaa !15
%50 = load ptr, ptr %26, align 8, !tbaa !14
%51 = getelementptr inbounds ptr, ptr %50, i64 %39
%52 = load ptr, ptr %51, align 8, !tbaa !15
%53 = call i32 @SYSCTL_CHILDREN(ptr noundef %52) #3
%54 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%55 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !5
%56 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%57 = or i32 %56, %55
%58 = load ptr, ptr %32, align 8, !tbaa !18
%59 = trunc i64 %39 to i32
%60 = add i32 %59, -1
%61 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %53, i32 noundef %54, ptr noundef nonnull @.str.5, i32 noundef %57, i32 noundef %0, i32 noundef %60, ptr noundef %58, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.7) #3
%62 = load ptr, ptr %26, align 8, !tbaa !14
%63 = getelementptr inbounds ptr, ptr %62, i64 %39
%64 = load ptr, ptr %63, align 8, !tbaa !15
%65 = call i32 @SYSCTL_CHILDREN(ptr noundef %64) #3
%66 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%67 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !5
%68 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%69 = or i32 %68, %67
%70 = load ptr, ptr %33, align 8, !tbaa !20
%71 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %65, i32 noundef %66, ptr noundef nonnull @.str.8, i32 noundef %69, i32 noundef %0, i32 noundef %60, ptr noundef %70, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.9) #3
%72 = load ptr, ptr %26, align 8, !tbaa !14
%73 = getelementptr inbounds ptr, ptr %72, i64 %39
%74 = load ptr, ptr %73, align 8, !tbaa !15
%75 = call i32 @SYSCTL_CHILDREN(ptr noundef %74) #3
%76 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%77 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !5
%78 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%79 = or i32 %78, %77
%80 = load ptr, ptr %34, align 8, !tbaa !21
%81 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %75, i32 noundef %76, ptr noundef nonnull @.str.10, i32 noundef %79, i32 noundef %0, i32 noundef %60, ptr noundef %80, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.11) #3
%82 = load ptr, ptr %26, align 8, !tbaa !14
%83 = getelementptr inbounds ptr, ptr %82, i64 %39
%84 = load ptr, ptr %83, align 8, !tbaa !15
%85 = call i32 @SYSCTL_CHILDREN(ptr noundef %84) #3
%86 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%87 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !5
%88 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !5
%89 = or i32 %88, %87
%90 = load ptr, ptr %35, align 8, !tbaa !22
%91 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %85, i32 noundef %86, ptr noundef nonnull @.str.12, i32 noundef %89, i32 noundef %0, i32 noundef %60, ptr noundef %90, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.13) #3
%92 = load ptr, ptr %26, align 8, !tbaa !14
%93 = getelementptr inbounds ptr, ptr %92, i64 %39
%94 = load ptr, ptr %93, align 8, !tbaa !15
%95 = call i32 @SYSCTL_CHILDREN(ptr noundef %94) #3
%96 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%97 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !5
%98 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !5
%99 = or i32 %98, %97
%100 = load ptr, ptr %36, align 8, !tbaa !23
%101 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %95, i32 noundef %96, ptr noundef nonnull @.str.14, i32 noundef %99, i32 noundef %0, i32 noundef %60, ptr noundef %100, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.15) #3
%102 = load ptr, ptr %26, align 8, !tbaa !14
%103 = getelementptr inbounds ptr, ptr %102, i64 %39
%104 = load ptr, ptr %103, align 8, !tbaa !15
%105 = call i32 @SYSCTL_CHILDREN(ptr noundef %104) #3
%106 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%107 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !5
%108 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !5
%109 = or i32 %108, %107
%110 = load ptr, ptr %37, align 8, !tbaa !24
%111 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %105, i32 noundef %106, ptr noundef nonnull @.str.16, i32 noundef %109, i32 noundef %0, i32 noundef %60, ptr noundef %110, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.17) #3
%112 = add nuw nsw i64 %39, 1
%113 = load i32, ptr %3, align 8, !tbaa !16
%114 = sext i32 %113 to i64
%115 = icmp slt i64 %39, %114
br i1 %115, label %38, label %116, !llvm.loop !25
116: ; preds = %38, %13
%117 = call i32 @SYSCTL_CHILDREN(ptr noundef %15) #3
%118 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%119 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%120 = call ptr @SYSCTL_ADD_NODE(ptr noundef %14, i32 noundef %117, i32 noundef %118, ptr noundef nonnull @.str.18, i32 noundef %119, i32 noundef 0, ptr noundef nonnull @.str.19) #3
%121 = getelementptr inbounds %struct.asmc_softc, ptr %3, i64 0, i32 11
store ptr %120, ptr %121, align 8, !tbaa !27
%122 = getelementptr inbounds %struct.asmc_model, ptr %16, i64 0, i32 8
%123 = load ptr, ptr %122, align 8, !tbaa !28
%124 = load i64, ptr %123, align 8, !tbaa !29
%125 = icmp eq i64 %124, 0
br i1 %125, label %150, label %126
126: ; preds = %116
%127 = getelementptr inbounds %struct.asmc_model, ptr %16, i64 0, i32 1
br label %128
128: ; preds = %126, %128
%129 = phi i64 [ 0, %126 ], [ %145, %128 ]
%130 = load ptr, ptr %121, align 8, !tbaa !27
%131 = call i32 @SYSCTL_CHILDREN(ptr noundef %130) #3
%132 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%133 = load ptr, ptr %16, align 8, !tbaa !30
%134 = getelementptr inbounds ptr, ptr %133, i64 %129
%135 = load ptr, ptr %134, align 8, !tbaa !15
%136 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !5
%137 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%138 = or i32 %137, %136
%139 = load ptr, ptr @asmc_temp_sysctl, align 8, !tbaa !15
%140 = load ptr, ptr %127, align 8, !tbaa !31
%141 = getelementptr inbounds ptr, ptr %140, i64 %129
%142 = load ptr, ptr %141, align 8, !tbaa !15
%143 = trunc i64 %129 to i32
%144 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %131, i32 noundef %132, ptr noundef %135, i32 noundef %138, i32 noundef %0, i32 noundef %143, ptr noundef %139, ptr noundef nonnull @.str.6, ptr noundef %142) #3
%145 = add nuw i64 %129, 1
%146 = load ptr, ptr %122, align 8, !tbaa !28
%147 = getelementptr inbounds i64, ptr %146, i64 %145
%148 = load i64, ptr %147, align 8, !tbaa !29
%149 = icmp eq i64 %148, 0
br i1 %149, label %150, label %128, !llvm.loop !32
150: ; preds = %128, %116
%151 = getelementptr inbounds %struct.asmc_model, ptr %16, i64 0, i32 7
%152 = load ptr, ptr %151, align 8, !tbaa !33
%153 = icmp eq ptr %152, null
br i1 %153, label %187, label %154
154: ; preds = %150
%155 = call i32 @SYSCTL_CHILDREN(ptr noundef %15) #3
%156 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%157 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%158 = call ptr @SYSCTL_ADD_NODE(ptr noundef %14, i32 noundef %155, i32 noundef %156, ptr noundef nonnull @.str.20, i32 noundef %157, i32 noundef 0, ptr noundef nonnull @.str.21) #3
%159 = getelementptr inbounds %struct.asmc_softc, ptr %3, i64 0, i32 10
store ptr %158, ptr %159, align 8, !tbaa !34
%160 = call i32 @SYSCTL_CHILDREN(ptr noundef %158) #3
%161 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%162 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !5
%163 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%164 = or i32 %163, %162
%165 = load ptr, ptr %151, align 8, !tbaa !33
%166 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %160, i32 noundef %161, ptr noundef nonnull @.str.22, i32 noundef %164, i32 noundef %0, i32 noundef 0, ptr noundef %165, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.23) #3
%167 = load ptr, ptr %159, align 8, !tbaa !34
%168 = call i32 @SYSCTL_CHILDREN(ptr noundef %167) #3
%169 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%170 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !5
%171 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%172 = or i32 %171, %170
%173 = getelementptr inbounds %struct.asmc_model, ptr %16, i64 0, i32 6
%174 = load ptr, ptr %173, align 8, !tbaa !35
%175 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %168, i32 noundef %169, ptr noundef nonnull @.str.24, i32 noundef %172, i32 noundef %0, i32 noundef 0, ptr noundef %174, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.25) #3
%176 = load ptr, ptr %159, align 8, !tbaa !34
%177 = call i32 @SYSCTL_CHILDREN(ptr noundef %176) #3
%178 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%179 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !5
%180 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !5
%181 = or i32 %180, %179
%182 = load i32, ptr @CTLFLAG_ANYBODY, align 4, !tbaa !5
%183 = or i32 %181, %182
%184 = getelementptr inbounds %struct.asmc_model, ptr %16, i64 0, i32 5
%185 = load ptr, ptr %184, align 8, !tbaa !36
%186 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %177, i32 noundef %178, ptr noundef nonnull @.str.26, i32 noundef %183, i32 noundef %0, i32 noundef 0, ptr noundef %185, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.27) #3
br label %187
187: ; preds = %154, %150
%188 = getelementptr inbounds %struct.asmc_model, ptr %16, i64 0, i32 4
%189 = load ptr, ptr %188, align 8, !tbaa !37
%190 = icmp eq ptr %189, null
br i1 %190, label %266, label %191
191: ; preds = %187
%192 = call i32 @SYSCTL_CHILDREN(ptr noundef %15) #3
%193 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%194 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%195 = call ptr @SYSCTL_ADD_NODE(ptr noundef %14, i32 noundef %192, i32 noundef %193, ptr noundef nonnull @.str.28, i32 noundef %194, i32 noundef 0, ptr noundef nonnull @.str.29) #3
%196 = getelementptr inbounds %struct.asmc_softc, ptr %3, i64 0, i32 9
store ptr %195, ptr %196, align 8, !tbaa !38
%197 = call i32 @SYSCTL_CHILDREN(ptr noundef %195) #3
%198 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%199 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !5
%200 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%201 = or i32 %200, %199
%202 = load ptr, ptr %188, align 8, !tbaa !37
%203 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %197, i32 noundef %198, ptr noundef nonnull @.str.30, i32 noundef %201, i32 noundef %0, i32 noundef 0, ptr noundef %202, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.31) #3
%204 = load ptr, ptr %196, align 8, !tbaa !38
%205 = call i32 @SYSCTL_CHILDREN(ptr noundef %204) #3
%206 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%207 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !5
%208 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%209 = or i32 %208, %207
%210 = getelementptr inbounds %struct.asmc_model, ptr %16, i64 0, i32 3
%211 = load ptr, ptr %210, align 8, !tbaa !39
%212 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %205, i32 noundef %206, ptr noundef nonnull @.str.32, i32 noundef %209, i32 noundef %0, i32 noundef 0, ptr noundef %211, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.33) #3
%213 = load ptr, ptr %196, align 8, !tbaa !38
%214 = call i32 @SYSCTL_CHILDREN(ptr noundef %213) #3
%215 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%216 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !5
%217 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%218 = or i32 %217, %216
%219 = getelementptr inbounds %struct.asmc_model, ptr %16, i64 0, i32 2
%220 = load ptr, ptr %219, align 8, !tbaa !40
%221 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %214, i32 noundef %215, ptr noundef nonnull @.str.34, i32 noundef %218, i32 noundef %0, i32 noundef 0, ptr noundef %220, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.35) #3
%222 = getelementptr inbounds %struct.asmc_softc, ptr %3, i64 0, i32 1
store ptr null, ptr %222, align 8, !tbaa !41
%223 = getelementptr inbounds %struct.asmc_softc, ptr %3, i64 0, i32 8
%224 = load i32, ptr @asmc_sms_task, align 4, !tbaa !5
%225 = call i32 @TASK_INIT(ptr noundef nonnull %223, i32 noundef 0, i32 noundef %224, ptr noundef nonnull %3) #3
%226 = load i32, ptr @M_WAITOK, align 4, !tbaa !5
%227 = load i32, ptr @taskqueue_thread_enqueue, align 4, !tbaa !5
%228 = call ptr @taskqueue_create_fast(ptr noundef nonnull @.str.36, i32 noundef %226, i32 noundef %227, ptr noundef nonnull %222) #3
store ptr %228, ptr %222, align 8, !tbaa !41
%229 = load i32, ptr @PI_REALTIME, align 4, !tbaa !5
%230 = call i32 @device_get_nameunit(i32 noundef %0) #3
%231 = call i32 @taskqueue_start_threads(ptr noundef nonnull %222, i32 noundef 1, i32 noundef %229, ptr noundef nonnull @.str.37, i32 noundef %230) #3
%232 = getelementptr inbounds %struct.asmc_softc, ptr %3, i64 0, i32 6
store i64 0, ptr %232, align 8, !tbaa !42
%233 = load i32, ptr @SYS_RES_IRQ, align 4, !tbaa !5
%234 = load i32, ptr @RF_ACTIVE, align 4, !tbaa !5
%235 = call ptr @bus_alloc_resource_any(i32 noundef %0, i32 noundef %233, ptr noundef nonnull %232, i32 noundef %234) #3
%236 = getelementptr inbounds %struct.asmc_softc, ptr %3, i64 0, i32 5
store ptr %235, ptr %236, align 8, !tbaa !43
%237 = icmp eq ptr %235, null
br i1 %237, label %238, label %241
238: ; preds = %191
%239 = call i32 @device_printf(i32 noundef %0, ptr noundef nonnull @.str.38) #3
%240 = load i32, ptr @ENXIO, align 4, !tbaa !5
br label %255
241: ; preds = %191
%242 = load i32, ptr @INTR_TYPE_MISC, align 4, !tbaa !5
%243 = load i32, ptr @INTR_MPSAFE, align 4, !tbaa !5
%244 = or i32 %243, %242
%245 = load i32, ptr @asmc_sms_intrfast, align 4, !tbaa !5
%246 = getelementptr inbounds %struct.asmc_softc, ptr %3, i64 0, i32 7
%247 = call i32 @bus_setup_intr(i32 noundef %0, ptr noundef nonnull %235, i32 noundef %244, i32 noundef %245, ptr noundef null, i32 noundef %0, ptr noundef nonnull %246) #3
%248 = icmp eq i32 %247, 0
br i1 %248, label %266, label %249
249: ; preds = %241
%250 = call i32 @device_printf(i32 noundef %0, ptr noundef nonnull @.str.39) #3
%251 = load i32, ptr @SYS_RES_IRQ, align 4, !tbaa !5
%252 = load i64, ptr %232, align 8, !tbaa !42
%253 = load ptr, ptr %236, align 8, !tbaa !43
%254 = call i32 @bus_release_resource(i32 noundef %0, i32 noundef %251, i64 noundef %252, ptr noundef %253) #3
br label %255
255: ; preds = %249, %238
%256 = phi i32 [ %240, %238 ], [ %247, %249 ]
%257 = load i32, ptr @SYS_RES_IOPORT, align 4, !tbaa !5
%258 = load i64, ptr %5, align 8, !tbaa !44
%259 = load ptr, ptr %8, align 8, !tbaa !9
%260 = call i32 @bus_release_resource(i32 noundef %0, i32 noundef %257, i64 noundef %258, ptr noundef %259) #3
%261 = call i32 @mtx_destroy(ptr noundef nonnull %17) #3
%262 = load ptr, ptr %222, align 8, !tbaa !41
%263 = icmp eq ptr %262, null
br i1 %263, label %266, label %264
264: ; preds = %255
%265 = call i32 @taskqueue_free(ptr noundef nonnull %262) #3
br label %266
266: ; preds = %255, %264, %187, %241, %10
%267 = phi i32 [ %12, %10 ], [ 0, %241 ], [ 0, %187 ], [ %256, %264 ], [ %256, %255 ]
call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %2) #3
ret i32 %267
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #2
declare ptr @bus_alloc_resource_any(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @device_printf(i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @device_get_sysctl_ctx(i32 noundef) local_unnamed_addr #2
declare ptr @device_get_sysctl_tree(i32 noundef) local_unnamed_addr #2
declare ptr @asmc_match(i32 noundef) local_unnamed_addr #2
declare i32 @mtx_init(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @asmc_init(i32 noundef) local_unnamed_addr #2
declare ptr @SYSCTL_ADD_NODE(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @SYSCTL_CHILDREN(ptr noundef) local_unnamed_addr #2
declare i32 @SYSCTL_ADD_PROC(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @TASK_INIT(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @taskqueue_create_fast(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @taskqueue_start_threads(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @device_get_nameunit(i32 noundef) local_unnamed_addr #2
declare i32 @bus_setup_intr(i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @bus_release_resource(i32 noundef, i32 noundef, i64 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @mtx_destroy(ptr noundef) local_unnamed_addr #2
declare i32 @taskqueue_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 24}
!10 = !{!"asmc_softc", !6, i64 0, !11, i64 8, !6, i64 16, !11, i64 24, !12, i64 32, !11, i64 40, !12, i64 48, !6, i64 56, !6, i64 60, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!10, !11, i64 96}
!14 = !{!10, !11, i64 88}
!15 = !{!11, !11, i64 0}
!16 = !{!10, !6, i64 0}
!17 = !{!7, !7, i64 0}
!18 = !{!19, !11, i64 112}
!19 = !{!"asmc_model", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112}
!20 = !{!19, !11, i64 104}
!21 = !{!19, !11, i64 96}
!22 = !{!19, !11, i64 88}
!23 = !{!19, !11, i64 80}
!24 = !{!19, !11, i64 72}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
!27 = !{!10, !11, i64 80}
!28 = !{!19, !11, i64 64}
!29 = !{!12, !12, i64 0}
!30 = !{!19, !11, i64 0}
!31 = !{!19, !11, i64 8}
!32 = distinct !{!32, !26}
!33 = !{!19, !11, i64 56}
!34 = !{!10, !11, i64 72}
!35 = !{!19, !11, i64 48}
!36 = !{!19, !11, i64 40}
!37 = !{!19, !11, i64 32}
!38 = !{!10, !11, i64 64}
!39 = !{!19, !11, i64 24}
!40 = !{!19, !11, i64 16}
!41 = !{!10, !11, i64 8}
!42 = !{!10, !12, i64 48}
!43 = !{!10, !11, i64 40}
!44 = !{!10, !12, i64 32}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/asmc/extr_asmc.c_asmc_attach.c'
source_filename = "AnghaBench/freebsd/sys/dev/asmc/extr_asmc.c_asmc_attach.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SYS_RES_IOPORT = common local_unnamed_addr global i32 0, align 4
@RF_ACTIVE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [28 x i8] c"unable to allocate IO port\0A\00", align 1
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [5 x i8] c"asmc\00", align 1
@MTX_SPIN = common local_unnamed_addr global i32 0, align 4
@OID_AUTO = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [4 x i8] c"fan\00", align 1
@CTLFLAG_RD = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [14 x i8] c"Fan Root Tree\00", align 1
@.str.4 = private unnamed_addr constant [12 x i8] c"Fan Subtree\00", align 1
@.str.5 = private unnamed_addr constant [3 x i8] c"id\00", align 1
@CTLTYPE_STRING = common local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [2 x i8] c"I\00", align 1
@.str.7 = private unnamed_addr constant [7 x i8] c"Fan ID\00", align 1
@.str.8 = private unnamed_addr constant [6 x i8] c"speed\00", align 1
@CTLTYPE_INT = common local_unnamed_addr global i32 0, align 4
@.str.9 = private unnamed_addr constant [17 x i8] c"Fan speed in RPM\00", align 1
@.str.10 = private unnamed_addr constant [10 x i8] c"safespeed\00", align 1
@.str.11 = private unnamed_addr constant [22 x i8] c"Fan safe speed in RPM\00", align 1
@.str.12 = private unnamed_addr constant [9 x i8] c"minspeed\00", align 1
@CTLFLAG_RW = common local_unnamed_addr global i32 0, align 4
@.str.13 = private unnamed_addr constant [25 x i8] c"Fan minimum speed in RPM\00", align 1
@.str.14 = private unnamed_addr constant [9 x i8] c"maxspeed\00", align 1
@.str.15 = private unnamed_addr constant [25 x i8] c"Fan maximum speed in RPM\00", align 1
@.str.16 = private unnamed_addr constant [12 x i8] c"targetspeed\00", align 1
@.str.17 = private unnamed_addr constant [24 x i8] c"Fan target speed in RPM\00", align 1
@.str.18 = private unnamed_addr constant [5 x i8] c"temp\00", align 1
@.str.19 = private unnamed_addr constant [20 x i8] c"Temperature sensors\00", align 1
@asmc_temp_sysctl = common local_unnamed_addr global ptr null, align 8
@.str.20 = private unnamed_addr constant [6 x i8] c"light\00", align 1
@.str.21 = private unnamed_addr constant [27 x i8] c"Keyboard backlight sensors\00", align 1
@.str.22 = private unnamed_addr constant [5 x i8] c"left\00", align 1
@.str.23 = private unnamed_addr constant [31 x i8] c"Keyboard backlight left sensor\00", align 1
@.str.24 = private unnamed_addr constant [6 x i8] c"right\00", align 1
@.str.25 = private unnamed_addr constant [32 x i8] c"Keyboard backlight right sensor\00", align 1
@.str.26 = private unnamed_addr constant [8 x i8] c"control\00", align 1
@CTLFLAG_ANYBODY = common local_unnamed_addr global i32 0, align 4
@.str.27 = private unnamed_addr constant [38 x i8] c"Keyboard backlight brightness control\00", align 1
@.str.28 = private unnamed_addr constant [4 x i8] c"sms\00", align 1
@.str.29 = private unnamed_addr constant [21 x i8] c"Sudden Motion Sensor\00", align 1
@.str.30 = private unnamed_addr constant [2 x i8] c"x\00", align 1
@.str.31 = private unnamed_addr constant [29 x i8] c"Sudden Motion Sensor X value\00", align 1
@.str.32 = private unnamed_addr constant [2 x i8] c"y\00", align 1
@.str.33 = private unnamed_addr constant [29 x i8] c"Sudden Motion Sensor Y value\00", align 1
@.str.34 = private unnamed_addr constant [2 x i8] c"z\00", align 1
@.str.35 = private unnamed_addr constant [29 x i8] c"Sudden Motion Sensor Z value\00", align 1
@asmc_sms_task = common local_unnamed_addr global i32 0, align 4
@.str.36 = private unnamed_addr constant [11 x i8] c"asmc_taskq\00", align 1
@M_WAITOK = common local_unnamed_addr global i32 0, align 4
@taskqueue_thread_enqueue = common local_unnamed_addr global i32 0, align 4
@PI_REALTIME = common local_unnamed_addr global i32 0, align 4
@.str.37 = private unnamed_addr constant [13 x i8] c"%s sms taskq\00", align 1
@SYS_RES_IRQ = common local_unnamed_addr global i32 0, align 4
@.str.38 = private unnamed_addr constant [33 x i8] c"unable to allocate IRQ resource\0A\00", align 1
@ENXIO = common local_unnamed_addr global i32 0, align 4
@INTR_TYPE_MISC = common local_unnamed_addr global i32 0, align 4
@INTR_MPSAFE = common local_unnamed_addr global i32 0, align 4
@asmc_sms_intrfast = common local_unnamed_addr global i32 0, align 4
@.str.39 = private unnamed_addr constant [25 x i8] c"unable to setup SMS IRQ\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @asmc_attach], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @asmc_attach(i32 noundef %0) #0 {
%2 = alloca [2 x i8], align 1
call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %2) #3
%3 = tail call ptr @device_get_softc(i32 noundef %0) #3
%4 = load i32, ptr @SYS_RES_IOPORT, align 4, !tbaa !6
%5 = getelementptr inbounds i8, ptr %3, i64 32
%6 = load i32, ptr @RF_ACTIVE, align 4, !tbaa !6
%7 = tail call ptr @bus_alloc_resource_any(i32 noundef %0, i32 noundef %4, ptr noundef nonnull %5, i32 noundef %6) #3
%8 = getelementptr inbounds i8, ptr %3, i64 24
store ptr %7, ptr %8, align 8, !tbaa !10
%9 = icmp eq ptr %7, null
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = tail call i32 @device_printf(i32 noundef %0, ptr noundef nonnull @.str) #3
%12 = load i32, ptr @ENOMEM, align 4, !tbaa !6
br label %266
13: ; preds = %1
%14 = tail call ptr @device_get_sysctl_ctx(i32 noundef %0) #3
%15 = tail call ptr @device_get_sysctl_tree(i32 noundef %0) #3
%16 = tail call ptr @asmc_match(i32 noundef %0) #3
%17 = getelementptr inbounds i8, ptr %3, i64 16
%18 = load i32, ptr @MTX_SPIN, align 4, !tbaa !6
%19 = tail call i32 @mtx_init(ptr noundef nonnull %17, ptr noundef nonnull @.str.1, ptr noundef null, i32 noundef %18) #3
%20 = getelementptr inbounds i8, ptr %3, i64 96
store ptr %16, ptr %20, align 8, !tbaa !14
%21 = tail call i32 @asmc_init(i32 noundef %0) #3
%22 = tail call i32 @SYSCTL_CHILDREN(ptr noundef %15) #3
%23 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%24 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%25 = tail call ptr @SYSCTL_ADD_NODE(ptr noundef %14, i32 noundef %22, i32 noundef %23, ptr noundef nonnull @.str.2, i32 noundef %24, i32 noundef 0, ptr noundef nonnull @.str.3) #3
%26 = getelementptr inbounds i8, ptr %3, i64 88
%27 = load ptr, ptr %26, align 8, !tbaa !15
store ptr %25, ptr %27, align 8, !tbaa !16
%28 = load i32, ptr %3, align 8, !tbaa !17
%29 = icmp slt i32 %28, 1
br i1 %29, label %116, label %30
30: ; preds = %13
%31 = getelementptr inbounds i8, ptr %2, i64 1
%32 = getelementptr inbounds i8, ptr %16, i64 112
%33 = getelementptr inbounds i8, ptr %16, i64 104
%34 = getelementptr inbounds i8, ptr %16, i64 96
%35 = getelementptr inbounds i8, ptr %16, i64 88
%36 = getelementptr inbounds i8, ptr %16, i64 80
%37 = getelementptr inbounds i8, ptr %16, i64 72
br label %38
38: ; preds = %30, %38
%39 = phi i64 [ 1, %30 ], [ %112, %38 ]
%40 = trunc i64 %39 to i8
%41 = add i8 %40, 47
store i8 %41, ptr %2, align 1, !tbaa !18
store i8 0, ptr %31, align 1, !tbaa !18
%42 = load ptr, ptr %26, align 8, !tbaa !15
%43 = load ptr, ptr %42, align 8, !tbaa !16
%44 = call i32 @SYSCTL_CHILDREN(ptr noundef %43) #3
%45 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%46 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%47 = call ptr @SYSCTL_ADD_NODE(ptr noundef %14, i32 noundef %44, i32 noundef %45, ptr noundef nonnull %2, i32 noundef %46, i32 noundef 0, ptr noundef nonnull @.str.4) #3
%48 = load ptr, ptr %26, align 8, !tbaa !15
%49 = getelementptr inbounds ptr, ptr %48, i64 %39
store ptr %47, ptr %49, align 8, !tbaa !16
%50 = load ptr, ptr %26, align 8, !tbaa !15
%51 = getelementptr inbounds ptr, ptr %50, i64 %39
%52 = load ptr, ptr %51, align 8, !tbaa !16
%53 = call i32 @SYSCTL_CHILDREN(ptr noundef %52) #3
%54 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%55 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !6
%56 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%57 = or i32 %56, %55
%58 = load ptr, ptr %32, align 8, !tbaa !19
%59 = trunc i64 %39 to i32
%60 = add i32 %59, -1
%61 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %53, i32 noundef %54, ptr noundef nonnull @.str.5, i32 noundef %57, i32 noundef %0, i32 noundef %60, ptr noundef %58, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.7) #3
%62 = load ptr, ptr %26, align 8, !tbaa !15
%63 = getelementptr inbounds ptr, ptr %62, i64 %39
%64 = load ptr, ptr %63, align 8, !tbaa !16
%65 = call i32 @SYSCTL_CHILDREN(ptr noundef %64) #3
%66 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%67 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !6
%68 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%69 = or i32 %68, %67
%70 = load ptr, ptr %33, align 8, !tbaa !21
%71 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %65, i32 noundef %66, ptr noundef nonnull @.str.8, i32 noundef %69, i32 noundef %0, i32 noundef %60, ptr noundef %70, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.9) #3
%72 = load ptr, ptr %26, align 8, !tbaa !15
%73 = getelementptr inbounds ptr, ptr %72, i64 %39
%74 = load ptr, ptr %73, align 8, !tbaa !16
%75 = call i32 @SYSCTL_CHILDREN(ptr noundef %74) #3
%76 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%77 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !6
%78 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%79 = or i32 %78, %77
%80 = load ptr, ptr %34, align 8, !tbaa !22
%81 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %75, i32 noundef %76, ptr noundef nonnull @.str.10, i32 noundef %79, i32 noundef %0, i32 noundef %60, ptr noundef %80, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.11) #3
%82 = load ptr, ptr %26, align 8, !tbaa !15
%83 = getelementptr inbounds ptr, ptr %82, i64 %39
%84 = load ptr, ptr %83, align 8, !tbaa !16
%85 = call i32 @SYSCTL_CHILDREN(ptr noundef %84) #3
%86 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%87 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !6
%88 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !6
%89 = or i32 %88, %87
%90 = load ptr, ptr %35, align 8, !tbaa !23
%91 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %85, i32 noundef %86, ptr noundef nonnull @.str.12, i32 noundef %89, i32 noundef %0, i32 noundef %60, ptr noundef %90, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.13) #3
%92 = load ptr, ptr %26, align 8, !tbaa !15
%93 = getelementptr inbounds ptr, ptr %92, i64 %39
%94 = load ptr, ptr %93, align 8, !tbaa !16
%95 = call i32 @SYSCTL_CHILDREN(ptr noundef %94) #3
%96 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%97 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !6
%98 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !6
%99 = or i32 %98, %97
%100 = load ptr, ptr %36, align 8, !tbaa !24
%101 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %95, i32 noundef %96, ptr noundef nonnull @.str.14, i32 noundef %99, i32 noundef %0, i32 noundef %60, ptr noundef %100, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.15) #3
%102 = load ptr, ptr %26, align 8, !tbaa !15
%103 = getelementptr inbounds ptr, ptr %102, i64 %39
%104 = load ptr, ptr %103, align 8, !tbaa !16
%105 = call i32 @SYSCTL_CHILDREN(ptr noundef %104) #3
%106 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%107 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !6
%108 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !6
%109 = or i32 %108, %107
%110 = load ptr, ptr %37, align 8, !tbaa !25
%111 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %105, i32 noundef %106, ptr noundef nonnull @.str.16, i32 noundef %109, i32 noundef %0, i32 noundef %60, ptr noundef %110, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.17) #3
%112 = add nuw nsw i64 %39, 1
%113 = load i32, ptr %3, align 8, !tbaa !17
%114 = sext i32 %113 to i64
%115 = icmp slt i64 %39, %114
br i1 %115, label %38, label %116, !llvm.loop !26
116: ; preds = %38, %13
%117 = call i32 @SYSCTL_CHILDREN(ptr noundef %15) #3
%118 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%119 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%120 = call ptr @SYSCTL_ADD_NODE(ptr noundef %14, i32 noundef %117, i32 noundef %118, ptr noundef nonnull @.str.18, i32 noundef %119, i32 noundef 0, ptr noundef nonnull @.str.19) #3
%121 = getelementptr inbounds i8, ptr %3, i64 80
store ptr %120, ptr %121, align 8, !tbaa !28
%122 = getelementptr inbounds i8, ptr %16, i64 64
%123 = load ptr, ptr %122, align 8, !tbaa !29
%124 = load i64, ptr %123, align 8, !tbaa !30
%125 = icmp eq i64 %124, 0
br i1 %125, label %150, label %126
126: ; preds = %116
%127 = getelementptr inbounds i8, ptr %16, i64 8
br label %128
128: ; preds = %126, %128
%129 = phi i64 [ 0, %126 ], [ %145, %128 ]
%130 = load ptr, ptr %121, align 8, !tbaa !28
%131 = call i32 @SYSCTL_CHILDREN(ptr noundef %130) #3
%132 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%133 = load ptr, ptr %16, align 8, !tbaa !31
%134 = getelementptr inbounds ptr, ptr %133, i64 %129
%135 = load ptr, ptr %134, align 8, !tbaa !16
%136 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !6
%137 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%138 = or i32 %137, %136
%139 = load ptr, ptr @asmc_temp_sysctl, align 8, !tbaa !16
%140 = load ptr, ptr %127, align 8, !tbaa !32
%141 = getelementptr inbounds ptr, ptr %140, i64 %129
%142 = load ptr, ptr %141, align 8, !tbaa !16
%143 = trunc nuw nsw i64 %129 to i32
%144 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %131, i32 noundef %132, ptr noundef %135, i32 noundef %138, i32 noundef %0, i32 noundef %143, ptr noundef %139, ptr noundef nonnull @.str.6, ptr noundef %142) #3
%145 = add nuw nsw i64 %129, 1
%146 = load ptr, ptr %122, align 8, !tbaa !29
%147 = getelementptr inbounds i64, ptr %146, i64 %145
%148 = load i64, ptr %147, align 8, !tbaa !30
%149 = icmp eq i64 %148, 0
br i1 %149, label %150, label %128, !llvm.loop !33
150: ; preds = %128, %116
%151 = getelementptr inbounds i8, ptr %16, i64 56
%152 = load ptr, ptr %151, align 8, !tbaa !34
%153 = icmp eq ptr %152, null
br i1 %153, label %187, label %154
154: ; preds = %150
%155 = call i32 @SYSCTL_CHILDREN(ptr noundef %15) #3
%156 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%157 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%158 = call ptr @SYSCTL_ADD_NODE(ptr noundef %14, i32 noundef %155, i32 noundef %156, ptr noundef nonnull @.str.20, i32 noundef %157, i32 noundef 0, ptr noundef nonnull @.str.21) #3
%159 = getelementptr inbounds i8, ptr %3, i64 72
store ptr %158, ptr %159, align 8, !tbaa !35
%160 = call i32 @SYSCTL_CHILDREN(ptr noundef %158) #3
%161 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%162 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !6
%163 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%164 = or i32 %163, %162
%165 = load ptr, ptr %151, align 8, !tbaa !34
%166 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %160, i32 noundef %161, ptr noundef nonnull @.str.22, i32 noundef %164, i32 noundef %0, i32 noundef 0, ptr noundef %165, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.23) #3
%167 = load ptr, ptr %159, align 8, !tbaa !35
%168 = call i32 @SYSCTL_CHILDREN(ptr noundef %167) #3
%169 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%170 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !6
%171 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%172 = or i32 %171, %170
%173 = getelementptr inbounds i8, ptr %16, i64 48
%174 = load ptr, ptr %173, align 8, !tbaa !36
%175 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %168, i32 noundef %169, ptr noundef nonnull @.str.24, i32 noundef %172, i32 noundef %0, i32 noundef 0, ptr noundef %174, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.25) #3
%176 = load ptr, ptr %159, align 8, !tbaa !35
%177 = call i32 @SYSCTL_CHILDREN(ptr noundef %176) #3
%178 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%179 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !6
%180 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !6
%181 = or i32 %180, %179
%182 = load i32, ptr @CTLFLAG_ANYBODY, align 4, !tbaa !6
%183 = or i32 %181, %182
%184 = getelementptr inbounds i8, ptr %16, i64 40
%185 = load ptr, ptr %184, align 8, !tbaa !37
%186 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %177, i32 noundef %178, ptr noundef nonnull @.str.26, i32 noundef %183, i32 noundef %0, i32 noundef 0, ptr noundef %185, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.27) #3
br label %187
187: ; preds = %154, %150
%188 = getelementptr inbounds i8, ptr %16, i64 32
%189 = load ptr, ptr %188, align 8, !tbaa !38
%190 = icmp eq ptr %189, null
br i1 %190, label %266, label %191
191: ; preds = %187
%192 = call i32 @SYSCTL_CHILDREN(ptr noundef %15) #3
%193 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%194 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%195 = call ptr @SYSCTL_ADD_NODE(ptr noundef %14, i32 noundef %192, i32 noundef %193, ptr noundef nonnull @.str.28, i32 noundef %194, i32 noundef 0, ptr noundef nonnull @.str.29) #3
%196 = getelementptr inbounds i8, ptr %3, i64 64
store ptr %195, ptr %196, align 8, !tbaa !39
%197 = call i32 @SYSCTL_CHILDREN(ptr noundef %195) #3
%198 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%199 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !6
%200 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%201 = or i32 %200, %199
%202 = load ptr, ptr %188, align 8, !tbaa !38
%203 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %197, i32 noundef %198, ptr noundef nonnull @.str.30, i32 noundef %201, i32 noundef %0, i32 noundef 0, ptr noundef %202, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.31) #3
%204 = load ptr, ptr %196, align 8, !tbaa !39
%205 = call i32 @SYSCTL_CHILDREN(ptr noundef %204) #3
%206 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%207 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !6
%208 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%209 = or i32 %208, %207
%210 = getelementptr inbounds i8, ptr %16, i64 24
%211 = load ptr, ptr %210, align 8, !tbaa !40
%212 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %205, i32 noundef %206, ptr noundef nonnull @.str.32, i32 noundef %209, i32 noundef %0, i32 noundef 0, ptr noundef %211, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.33) #3
%213 = load ptr, ptr %196, align 8, !tbaa !39
%214 = call i32 @SYSCTL_CHILDREN(ptr noundef %213) #3
%215 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%216 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !6
%217 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%218 = or i32 %217, %216
%219 = getelementptr inbounds i8, ptr %16, i64 16
%220 = load ptr, ptr %219, align 8, !tbaa !41
%221 = call i32 @SYSCTL_ADD_PROC(ptr noundef %14, i32 noundef %214, i32 noundef %215, ptr noundef nonnull @.str.34, i32 noundef %218, i32 noundef %0, i32 noundef 0, ptr noundef %220, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.35) #3
%222 = getelementptr inbounds i8, ptr %3, i64 8
store ptr null, ptr %222, align 8, !tbaa !42
%223 = getelementptr inbounds i8, ptr %3, i64 60
%224 = load i32, ptr @asmc_sms_task, align 4, !tbaa !6
%225 = call i32 @TASK_INIT(ptr noundef nonnull %223, i32 noundef 0, i32 noundef %224, ptr noundef nonnull %3) #3
%226 = load i32, ptr @M_WAITOK, align 4, !tbaa !6
%227 = load i32, ptr @taskqueue_thread_enqueue, align 4, !tbaa !6
%228 = call ptr @taskqueue_create_fast(ptr noundef nonnull @.str.36, i32 noundef %226, i32 noundef %227, ptr noundef nonnull %222) #3
store ptr %228, ptr %222, align 8, !tbaa !42
%229 = load i32, ptr @PI_REALTIME, align 4, !tbaa !6
%230 = call i32 @device_get_nameunit(i32 noundef %0) #3
%231 = call i32 @taskqueue_start_threads(ptr noundef nonnull %222, i32 noundef 1, i32 noundef %229, ptr noundef nonnull @.str.37, i32 noundef %230) #3
%232 = getelementptr inbounds i8, ptr %3, i64 48
store i64 0, ptr %232, align 8, !tbaa !43
%233 = load i32, ptr @SYS_RES_IRQ, align 4, !tbaa !6
%234 = load i32, ptr @RF_ACTIVE, align 4, !tbaa !6
%235 = call ptr @bus_alloc_resource_any(i32 noundef %0, i32 noundef %233, ptr noundef nonnull %232, i32 noundef %234) #3
%236 = getelementptr inbounds i8, ptr %3, i64 40
store ptr %235, ptr %236, align 8, !tbaa !44
%237 = icmp eq ptr %235, null
br i1 %237, label %238, label %241
238: ; preds = %191
%239 = call i32 @device_printf(i32 noundef %0, ptr noundef nonnull @.str.38) #3
%240 = load i32, ptr @ENXIO, align 4, !tbaa !6
br label %255
241: ; preds = %191
%242 = load i32, ptr @INTR_TYPE_MISC, align 4, !tbaa !6
%243 = load i32, ptr @INTR_MPSAFE, align 4, !tbaa !6
%244 = or i32 %243, %242
%245 = load i32, ptr @asmc_sms_intrfast, align 4, !tbaa !6
%246 = getelementptr inbounds i8, ptr %3, i64 56
%247 = call i32 @bus_setup_intr(i32 noundef %0, ptr noundef nonnull %235, i32 noundef %244, i32 noundef %245, ptr noundef null, i32 noundef %0, ptr noundef nonnull %246) #3
%248 = icmp eq i32 %247, 0
br i1 %248, label %266, label %249
249: ; preds = %241
%250 = call i32 @device_printf(i32 noundef %0, ptr noundef nonnull @.str.39) #3
%251 = load i32, ptr @SYS_RES_IRQ, align 4, !tbaa !6
%252 = load i64, ptr %232, align 8, !tbaa !43
%253 = load ptr, ptr %236, align 8, !tbaa !44
%254 = call i32 @bus_release_resource(i32 noundef %0, i32 noundef %251, i64 noundef %252, ptr noundef %253) #3
br label %255
255: ; preds = %249, %238
%256 = phi i32 [ %240, %238 ], [ %247, %249 ]
%257 = load i32, ptr @SYS_RES_IOPORT, align 4, !tbaa !6
%258 = load i64, ptr %5, align 8, !tbaa !45
%259 = load ptr, ptr %8, align 8, !tbaa !10
%260 = call i32 @bus_release_resource(i32 noundef %0, i32 noundef %257, i64 noundef %258, ptr noundef %259) #3
%261 = call i32 @mtx_destroy(ptr noundef nonnull %17) #3
%262 = load ptr, ptr %222, align 8, !tbaa !42
%263 = icmp eq ptr %262, null
br i1 %263, label %266, label %264
264: ; preds = %255
%265 = call i32 @taskqueue_free(ptr noundef nonnull %262) #3
br label %266
266: ; preds = %255, %264, %187, %241, %10
%267 = phi i32 [ %12, %10 ], [ 0, %241 ], [ 0, %187 ], [ %256, %264 ], [ %256, %255 ]
call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %2) #3
ret i32 %267
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #2
declare ptr @bus_alloc_resource_any(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @device_printf(i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @device_get_sysctl_ctx(i32 noundef) local_unnamed_addr #2
declare ptr @device_get_sysctl_tree(i32 noundef) local_unnamed_addr #2
declare ptr @asmc_match(i32 noundef) local_unnamed_addr #2
declare i32 @mtx_init(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @asmc_init(i32 noundef) local_unnamed_addr #2
declare ptr @SYSCTL_ADD_NODE(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @SYSCTL_CHILDREN(ptr noundef) local_unnamed_addr #2
declare i32 @SYSCTL_ADD_PROC(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @TASK_INIT(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @taskqueue_create_fast(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @taskqueue_start_threads(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @device_get_nameunit(i32 noundef) local_unnamed_addr #2
declare i32 @bus_setup_intr(i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @bus_release_resource(i32 noundef, i32 noundef, i64 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @mtx_destroy(ptr noundef) local_unnamed_addr #2
declare i32 @taskqueue_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 24}
!11 = !{!"asmc_softc", !7, i64 0, !12, i64 8, !7, i64 16, !12, i64 24, !13, i64 32, !12, i64 40, !13, i64 48, !7, i64 56, !7, i64 60, !12, i64 64, !12, i64 72, !12, i64 80, !12, i64 88, !12, i64 96}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!11, !12, i64 96}
!15 = !{!11, !12, i64 88}
!16 = !{!12, !12, i64 0}
!17 = !{!11, !7, i64 0}
!18 = !{!8, !8, i64 0}
!19 = !{!20, !12, i64 112}
!20 = !{!"asmc_model", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !12, i64 56, !12, i64 64, !12, i64 72, !12, i64 80, !12, i64 88, !12, i64 96, !12, i64 104, !12, i64 112}
!21 = !{!20, !12, i64 104}
!22 = !{!20, !12, i64 96}
!23 = !{!20, !12, i64 88}
!24 = !{!20, !12, i64 80}
!25 = !{!20, !12, i64 72}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}
!28 = !{!11, !12, i64 80}
!29 = !{!20, !12, i64 64}
!30 = !{!13, !13, i64 0}
!31 = !{!20, !12, i64 0}
!32 = !{!20, !12, i64 8}
!33 = distinct !{!33, !27}
!34 = !{!20, !12, i64 56}
!35 = !{!11, !12, i64 72}
!36 = !{!20, !12, i64 48}
!37 = !{!20, !12, i64 40}
!38 = !{!20, !12, i64 32}
!39 = !{!11, !12, i64 64}
!40 = !{!20, !12, i64 24}
!41 = !{!20, !12, i64 16}
!42 = !{!11, !12, i64 8}
!43 = !{!11, !13, i64 48}
!44 = !{!11, !12, i64 40}
!45 = !{!11, !13, i64 32}
| freebsd_sys_dev_asmc_extr_asmc.c_asmc_attach |
; ModuleID = 'AnghaBench/linux/drivers/input/misc/extr_sc27xx-vibra.c_sc27xx_vibra_hw_init.c'
source_filename = "AnghaBench/linux/drivers/input/misc/extr_sc27xx-vibra.c_sc27xx_vibra_hw_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.vibra_info = type { i32, i32 }
@CUR_DRV_CAL_SEL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sc27xx_vibra_hw_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @sc27xx_vibra_hw_init(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds %struct.vibra_info, ptr %0, i64 0, i32 1
%3 = load i32, ptr %2, align 4, !tbaa !5
%4 = load i32, ptr %0, align 4, !tbaa !10
%5 = load i32, ptr @CUR_DRV_CAL_SEL, align 4, !tbaa !11
%6 = tail call i32 @regmap_update_bits(i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef 0) #2
ret i32 %6
}
declare i32 @regmap_update_bits(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"vibra_info", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
!11 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/input/misc/extr_sc27xx-vibra.c_sc27xx_vibra_hw_init.c'
source_filename = "AnghaBench/linux/drivers/input/misc/extr_sc27xx-vibra.c_sc27xx_vibra_hw_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CUR_DRV_CAL_SEL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sc27xx_vibra_hw_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @sc27xx_vibra_hw_init(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 4
%3 = load i32, ptr %2, align 4, !tbaa !6
%4 = load i32, ptr %0, align 4, !tbaa !11
%5 = load i32, ptr @CUR_DRV_CAL_SEL, align 4, !tbaa !12
%6 = tail call i32 @regmap_update_bits(i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef 0) #2
ret i32 %6
}
declare i32 @regmap_update_bits(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"vibra_info", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
!12 = !{!8, !8, i64 0}
| linux_drivers_input_misc_extr_sc27xx-vibra.c_sc27xx_vibra_hw_init |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/extr_wl3501_cs.c_wl3501_get_wap.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/extr_wl3501_cs.c_wl3501_get_wap.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, i32 }
@ARPHRD_ETHER = dso_local local_unnamed_addr global i32 0, align 4
@ETH_ALEN = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @wl3501_get_wap], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @wl3501_get_wap(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture noundef %2, ptr nocapture readnone %3) #0 {
%5 = tail call ptr @netdev_priv(ptr noundef %0) #2
%6 = load i32, ptr @ARPHRD_ETHER, align 4, !tbaa !5
%7 = getelementptr inbounds %struct.TYPE_2__, ptr %2, i64 0, i32 1
store i32 %6, ptr %7, align 4, !tbaa !9
%8 = load i32, ptr %2, align 4, !tbaa !9
%9 = load i32, ptr %5, align 4, !tbaa !10
%10 = load i32, ptr @ETH_ALEN, align 4, !tbaa !5
%11 = tail call i32 @memcpy(i32 noundef %8, i32 noundef %9, i32 noundef %10) #2
ret i32 0
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !6, i64 0}
!11 = !{!"wl3501_card", !6, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/extr_wl3501_cs.c_wl3501_get_wap.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/extr_wl3501_cs.c_wl3501_get_wap.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ARPHRD_ETHER = common local_unnamed_addr global i32 0, align 4
@ETH_ALEN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @wl3501_get_wap], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @wl3501_get_wap(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture noundef %2, ptr nocapture readnone %3) #0 {
%5 = tail call ptr @netdev_priv(ptr noundef %0) #2
%6 = load i32, ptr @ARPHRD_ETHER, align 4, !tbaa !6
%7 = getelementptr inbounds i8, ptr %2, i64 4
store i32 %6, ptr %7, align 4, !tbaa !10
%8 = load i32, ptr %2, align 4, !tbaa !10
%9 = load i32, ptr %5, align 4, !tbaa !11
%10 = load i32, ptr @ETH_ALEN, align 4, !tbaa !6
%11 = tail call i32 @memcpy(i32 noundef %8, i32 noundef %9, i32 noundef %10) #2
ret i32 0
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"wl3501_card", !7, i64 0}
| fastsocket_kernel_drivers_net_wireless_extr_wl3501_cs.c_wl3501_get_wap |
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_alloc-pool.c_free_alloc_pool.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_alloc-pool.c_free_alloc_pool.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_7__ = type { i64, ptr, ptr, i32 }
; Function Attrs: nounwind uwtable
define dso_local void @free_alloc_pool(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @gcc_assert(ptr noundef %0) #2
%3 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 2
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = icmp eq ptr %4, null
br i1 %5, label %12, label %6
6: ; preds = %1, %6
%7 = phi ptr [ %9, %6 ], [ %4, %1 ]
%8 = getelementptr inbounds %struct.TYPE_7__, ptr %7, i64 0, i32 1
%9 = load ptr, ptr %8, align 8, !tbaa !12
%10 = tail call i32 @free(ptr noundef nonnull %7) #2
%11 = icmp eq ptr %9, null
br i1 %11, label %12, label %6, !llvm.loop !13
12: ; preds = %6, %1
%13 = tail call i32 @free(ptr noundef %0) #2
ret void
}
declare i32 @gcc_assert(ptr noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"TYPE_7__", !7, i64 0, !10, i64 8, !10, i64 16, !11, i64 24}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !10, i64 8}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_alloc-pool.c_free_alloc_pool.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_alloc-pool.c_free_alloc_pool.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @free_alloc_pool(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @gcc_assert(ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %0, i64 16
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = icmp eq ptr %4, null
br i1 %5, label %12, label %6
6: ; preds = %1, %6
%7 = phi ptr [ %9, %6 ], [ %4, %1 ]
%8 = getelementptr inbounds i8, ptr %7, i64 8
%9 = load ptr, ptr %8, align 8, !tbaa !13
%10 = tail call i32 @free(ptr noundef nonnull %7) #2
%11 = icmp eq ptr %9, null
br i1 %11, label %12, label %6, !llvm.loop !14
12: ; preds = %6, %1
%13 = tail call i32 @free(ptr noundef %0) #2
ret void
}
declare i32 @gcc_assert(ptr noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"TYPE_7__", !8, i64 0, !11, i64 8, !11, i64 16, !12, i64 24}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!7, !11, i64 8}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
| freebsd_contrib_gcc_extr_alloc-pool.c_free_alloc_pool |
; ModuleID = 'AnghaBench/linux/sound/soc/codecs/extr_wm8904.c_wm8904_get_retune_mobile_enum.c'
source_filename = "AnghaBench/linux/sound/soc/codecs/extr_wm8904.c_wm8904_get_retune_mobile_enum.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @wm8904_get_retune_mobile_enum], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @wm8904_get_retune_mobile_enum(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call ptr @snd_soc_kcontrol_component(ptr noundef %0) #2
%4 = tail call ptr @snd_soc_component_get_drvdata(ptr noundef %3) #2
%5 = load i32, ptr %4, align 4, !tbaa !5
%6 = load ptr, ptr %1, align 8, !tbaa !10
store i32 %5, ptr %6, align 4, !tbaa !15
ret i32 0
}
declare ptr @snd_soc_kcontrol_component(ptr noundef) local_unnamed_addr #1
declare ptr @snd_soc_component_get_drvdata(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"wm8904_priv", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !14, i64 0}
!11 = !{!"snd_ctl_elem_value", !12, i64 0}
!12 = !{!"TYPE_4__", !13, i64 0}
!13 = !{!"TYPE_3__", !14, i64 0}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/sound/soc/codecs/extr_wm8904.c_wm8904_get_retune_mobile_enum.c'
source_filename = "AnghaBench/linux/sound/soc/codecs/extr_wm8904.c_wm8904_get_retune_mobile_enum.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @wm8904_get_retune_mobile_enum], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @wm8904_get_retune_mobile_enum(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call ptr @snd_soc_kcontrol_component(ptr noundef %0) #2
%4 = tail call ptr @snd_soc_component_get_drvdata(ptr noundef %3) #2
%5 = load i32, ptr %4, align 4, !tbaa !6
%6 = load ptr, ptr %1, align 8, !tbaa !11
store i32 %5, ptr %6, align 4, !tbaa !16
ret i32 0
}
declare ptr @snd_soc_kcontrol_component(ptr noundef) local_unnamed_addr #1
declare ptr @snd_soc_component_get_drvdata(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"wm8904_priv", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !15, i64 0}
!12 = !{!"snd_ctl_elem_value", !13, i64 0}
!13 = !{!"TYPE_4__", !14, i64 0}
!14 = !{!"TYPE_3__", !15, i64 0}
!15 = !{!"any pointer", !9, i64 0}
!16 = !{!8, !8, i64 0}
| linux_sound_soc_codecs_extr_wm8904.c_wm8904_get_retune_mobile_enum |
; ModuleID = 'AnghaBench/linux/drivers/platform/x86/extr_toshiba_acpi.c_toshiba_acpi_kbd_bl_work.c'
source_filename = "AnghaBench/linux/drivers/platform/x86/extr_toshiba_acpi.c_toshiba_acpi_kbd_bl_work.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_7__ = type { i32, i64, ptr, i32 }
%struct.TYPE_6__ = type { %struct.TYPE_8__, %struct.TYPE_5__ }
%struct.TYPE_8__ = type { i32 }
%struct.TYPE_5__ = type { i32 }
@toshiba_acpi = dso_local local_unnamed_addr global ptr null, align 8
@toshiba_attr_group = dso_local global i32 0, align 4
@.str = private unnamed_addr constant [32 x i8] c"Unable to update sysfs entries\0A\00", align 1
@SCI_KBD_MODE_AUTO = dso_local local_unnamed_addr global i64 0, align 8
@SCI_KBD_MODE_ON = dso_local local_unnamed_addr global i64 0, align 8
@LED_FULL = dso_local local_unnamed_addr global i32 0, align 4
@LED_OFF = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @toshiba_acpi_kbd_bl_work], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @toshiba_acpi_kbd_bl_work(ptr nocapture readnone %0) #0 {
%2 = load ptr, ptr @toshiba_acpi, align 8, !tbaa !5
%3 = getelementptr inbounds %struct.TYPE_7__, ptr %2, i64 0, i32 2
%4 = load ptr, ptr %3, align 8, !tbaa !9
%5 = tail call i64 @sysfs_update_group(ptr noundef %4, ptr noundef nonnull @toshiba_attr_group) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @pr_err(ptr noundef nonnull @.str) #2
br label %9
9: ; preds = %7, %1
%10 = load ptr, ptr @toshiba_acpi, align 8, !tbaa !5
%11 = load i32, ptr %10, align 8, !tbaa !13
%12 = icmp eq i32 %11, 2
br i1 %12, label %13, label %27
13: ; preds = %9
%14 = getelementptr inbounds %struct.TYPE_7__, ptr %10, i64 0, i32 1
%15 = load i64, ptr %14, align 8, !tbaa !14
%16 = load i64, ptr @SCI_KBD_MODE_AUTO, align 8, !tbaa !15
%17 = icmp eq i64 %15, %16
br i1 %17, label %27, label %18
18: ; preds = %13
%19 = getelementptr inbounds %struct.TYPE_7__, ptr %10, i64 0, i32 3
%20 = load i64, ptr @SCI_KBD_MODE_ON, align 8, !tbaa !15
%21 = icmp eq i64 %15, %20
%22 = load i32, ptr @LED_FULL, align 4
%23 = load i32, ptr @LED_OFF, align 4
%24 = select i1 %21, i32 %22, i32 %23
%25 = tail call i32 @led_classdev_notify_brightness_hw_changed(ptr noundef nonnull %19, i32 noundef %24) #2
%26 = load ptr, ptr @toshiba_acpi, align 8, !tbaa !5
br label %27
27: ; preds = %18, %13, %9
%28 = phi ptr [ %26, %18 ], [ %10, %13 ], [ %10, %9 ]
%29 = getelementptr inbounds %struct.TYPE_7__, ptr %28, i64 0, i32 2
%30 = load ptr, ptr %29, align 8, !tbaa !9
%31 = getelementptr inbounds %struct.TYPE_6__, ptr %30, i64 0, i32 1
%32 = load i32, ptr %31, align 4, !tbaa !16
%33 = tail call i32 @dev_name(ptr noundef %30) #2
%34 = tail call i32 @acpi_bus_generate_netlink_event(i32 noundef %32, i32 noundef %33, i32 noundef 146, i32 noundef 0) #2
ret void
}
declare i64 @sysfs_update_group(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef) local_unnamed_addr #1
declare i32 @led_classdev_notify_brightness_hw_changed(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @acpi_bus_generate_netlink_event(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_name(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"TYPE_7__", !11, i64 0, !12, i64 8, !6, i64 16, !11, i64 24}
!11 = !{!"int", !7, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!10, !11, i64 0}
!14 = !{!10, !12, i64 8}
!15 = !{!12, !12, i64 0}
!16 = !{!17, !11, i64 4}
!17 = !{!"TYPE_6__", !18, i64 0, !19, i64 4}
!18 = !{!"TYPE_8__", !11, i64 0}
!19 = !{!"TYPE_5__", !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/platform/x86/extr_toshiba_acpi.c_toshiba_acpi_kbd_bl_work.c'
source_filename = "AnghaBench/linux/drivers/platform/x86/extr_toshiba_acpi.c_toshiba_acpi_kbd_bl_work.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@toshiba_acpi = common local_unnamed_addr global ptr null, align 8
@toshiba_attr_group = common global i32 0, align 4
@.str = private unnamed_addr constant [32 x i8] c"Unable to update sysfs entries\0A\00", align 1
@SCI_KBD_MODE_AUTO = common local_unnamed_addr global i64 0, align 8
@SCI_KBD_MODE_ON = common local_unnamed_addr global i64 0, align 8
@LED_FULL = common local_unnamed_addr global i32 0, align 4
@LED_OFF = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @toshiba_acpi_kbd_bl_work], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @toshiba_acpi_kbd_bl_work(ptr nocapture readnone %0) #0 {
%2 = load ptr, ptr @toshiba_acpi, align 8, !tbaa !6
%3 = getelementptr inbounds i8, ptr %2, i64 16
%4 = load ptr, ptr %3, align 8, !tbaa !10
%5 = tail call i64 @sysfs_update_group(ptr noundef %4, ptr noundef nonnull @toshiba_attr_group) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @pr_err(ptr noundef nonnull @.str) #2
br label %9
9: ; preds = %7, %1
%10 = load ptr, ptr @toshiba_acpi, align 8, !tbaa !6
%11 = load i32, ptr %10, align 8, !tbaa !14
%12 = icmp eq i32 %11, 2
br i1 %12, label %13, label %27
13: ; preds = %9
%14 = getelementptr inbounds i8, ptr %10, i64 8
%15 = load i64, ptr %14, align 8, !tbaa !15
%16 = load i64, ptr @SCI_KBD_MODE_AUTO, align 8, !tbaa !16
%17 = icmp eq i64 %15, %16
br i1 %17, label %27, label %18
18: ; preds = %13
%19 = getelementptr inbounds i8, ptr %10, i64 24
%20 = load i64, ptr @SCI_KBD_MODE_ON, align 8, !tbaa !16
%21 = icmp eq i64 %15, %20
%22 = load i32, ptr @LED_FULL, align 4
%23 = load i32, ptr @LED_OFF, align 4
%24 = select i1 %21, i32 %22, i32 %23
%25 = tail call i32 @led_classdev_notify_brightness_hw_changed(ptr noundef nonnull %19, i32 noundef %24) #2
%26 = load ptr, ptr @toshiba_acpi, align 8, !tbaa !6
br label %27
27: ; preds = %18, %13, %9
%28 = phi ptr [ %26, %18 ], [ %10, %13 ], [ %10, %9 ]
%29 = getelementptr inbounds i8, ptr %28, i64 16
%30 = load ptr, ptr %29, align 8, !tbaa !10
%31 = getelementptr inbounds i8, ptr %30, i64 4
%32 = load i32, ptr %31, align 4, !tbaa !17
%33 = tail call i32 @dev_name(ptr noundef %30) #2
%34 = tail call i32 @acpi_bus_generate_netlink_event(i32 noundef %32, i32 noundef %33, i32 noundef 146, i32 noundef 0) #2
ret void
}
declare i64 @sysfs_update_group(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef) local_unnamed_addr #1
declare i32 @led_classdev_notify_brightness_hw_changed(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @acpi_bus_generate_netlink_event(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_name(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 16}
!11 = !{!"TYPE_7__", !12, i64 0, !13, i64 8, !7, i64 16, !12, i64 24}
!12 = !{!"int", !8, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!11, !12, i64 0}
!15 = !{!11, !13, i64 8}
!16 = !{!13, !13, i64 0}
!17 = !{!18, !12, i64 4}
!18 = !{!"TYPE_6__", !19, i64 0, !20, i64 4}
!19 = !{!"TYPE_8__", !12, i64 0}
!20 = !{!"TYPE_5__", !12, i64 0}
| linux_drivers_platform_x86_extr_toshiba_acpi.c_toshiba_acpi_kbd_bl_work |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mediatek/extr_mtk_eth_path.c_mtk_gmac_rgmii_path_setup.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mediatek/extr_mtk_eth_path.c_mtk_gmac_rgmii_path_setup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MTK_ETH_PATH_GMAC1_RGMII = dso_local local_unnamed_addr global i32 0, align 4
@MTK_ETH_PATH_GMAC2_RGMII = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @mtk_gmac_rgmii_path_setup(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq i32 %1, 0
%4 = load i32, ptr @MTK_ETH_PATH_GMAC1_RGMII, align 4
%5 = load i32, ptr @MTK_ETH_PATH_GMAC2_RGMII, align 4
%6 = select i1 %3, i32 %4, i32 %5
%7 = tail call i32 @mtk_eth_mux_setup(ptr noundef %0, i32 noundef %6) #2
ret i32 %7
}
declare i32 @mtk_eth_mux_setup(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mediatek/extr_mtk_eth_path.c_mtk_gmac_rgmii_path_setup.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mediatek/extr_mtk_eth_path.c_mtk_gmac_rgmii_path_setup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MTK_ETH_PATH_GMAC1_RGMII = common local_unnamed_addr global i32 0, align 4
@MTK_ETH_PATH_GMAC2_RGMII = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @mtk_gmac_rgmii_path_setup(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq i32 %1, 0
%4 = load i32, ptr @MTK_ETH_PATH_GMAC1_RGMII, align 4
%5 = load i32, ptr @MTK_ETH_PATH_GMAC2_RGMII, align 4
%6 = select i1 %3, i32 %4, i32 %5
%7 = tail call i32 @mtk_eth_mux_setup(ptr noundef %0, i32 noundef %6) #2
ret i32 %7
}
declare i32 @mtk_eth_mux_setup(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_net_ethernet_mediatek_extr_mtk_eth_path.c_mtk_gmac_rgmii_path_setup |
; ModuleID = 'AnghaBench/lede/package/kernel/rtc-rv5c386a/src/extr_rtc.c_rtc_do_ioctl.c'
source_filename = "AnghaBench/lede/package/kernel/rtc-rv5c386a/src/extr_rtc.c_rtc_do_ioctl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.rtc_time = type { i32 }
@EFAULT = dso_local local_unnamed_addr global i32 0, align 4
@CAP_SYS_TIME = dso_local local_unnamed_addr global i32 0, align 4
@EACCES = dso_local local_unnamed_addr global i32 0, align 4
@ENOTTY = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @rtc_do_ioctl], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @rtc_do_ioctl(i32 noundef %0, i64 noundef %1) #0 {
%3 = alloca %struct.rtc_time, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
switch i32 %0, label %29 [
i32 129, label %4
i32 128, label %13
]
4: ; preds = %2
%5 = call i32 @memset(ptr noundef nonnull %3, i32 noundef 0, i32 noundef 4) #3
%6 = call i32 @get_rtc_time(ptr noundef nonnull %3) #3
%7 = inttoptr i64 %1 to ptr
%8 = call i32 @copy_to_user(ptr noundef %7, ptr noundef nonnull %3, i32 noundef 4) #3
%9 = icmp eq i32 %8, 0
br i1 %9, label %32, label %10
10: ; preds = %4
%11 = load i32, ptr @EFAULT, align 4, !tbaa !5
%12 = sub nsw i32 0, %11
br label %32
13: ; preds = %2
%14 = load i32, ptr @CAP_SYS_TIME, align 4, !tbaa !5
%15 = tail call i32 @capable(i32 noundef %14) #3
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %13
%18 = load i32, ptr @EACCES, align 4, !tbaa !5
%19 = sub nsw i32 0, %18
br label %32
20: ; preds = %13
%21 = inttoptr i64 %1 to ptr
%22 = call i32 @copy_from_user(ptr noundef nonnull %3, ptr noundef %21, i32 noundef 4) #3
%23 = icmp eq i32 %22, 0
br i1 %23, label %27, label %24
24: ; preds = %20
%25 = load i32, ptr @EFAULT, align 4, !tbaa !5
%26 = sub nsw i32 0, %25
br label %32
27: ; preds = %20
%28 = call i32 @set_rtc_time(ptr noundef nonnull %3) #3
br label %32
29: ; preds = %2
%30 = load i32, ptr @ENOTTY, align 4, !tbaa !5
%31 = sub nsw i32 0, %30
br label %32
32: ; preds = %27, %4, %29, %24, %17, %10
%33 = phi i32 [ %31, %29 ], [ %26, %24 ], [ %19, %17 ], [ %12, %10 ], [ 0, %4 ], [ 0, %27 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %33
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @get_rtc_time(ptr noundef) local_unnamed_addr #2
declare i32 @copy_to_user(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @capable(i32 noundef) local_unnamed_addr #2
declare i32 @copy_from_user(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @set_rtc_time(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/lede/package/kernel/rtc-rv5c386a/src/extr_rtc.c_rtc_do_ioctl.c'
source_filename = "AnghaBench/lede/package/kernel/rtc-rv5c386a/src/extr_rtc.c_rtc_do_ioctl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.rtc_time = type { i32 }
@EFAULT = common local_unnamed_addr global i32 0, align 4
@CAP_SYS_TIME = common local_unnamed_addr global i32 0, align 4
@EACCES = common local_unnamed_addr global i32 0, align 4
@ENOTTY = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @rtc_do_ioctl], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @rtc_do_ioctl(i32 noundef %0, i64 noundef %1) #0 {
%3 = alloca %struct.rtc_time, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
switch i32 %0, label %29 [
i32 129, label %4
i32 128, label %13
]
4: ; preds = %2
%5 = call i32 @memset(ptr noundef nonnull %3, i32 noundef 0, i32 noundef 4) #3
%6 = call i32 @get_rtc_time(ptr noundef nonnull %3) #3
%7 = inttoptr i64 %1 to ptr
%8 = call i32 @copy_to_user(ptr noundef %7, ptr noundef nonnull %3, i32 noundef 4) #3
%9 = icmp eq i32 %8, 0
br i1 %9, label %32, label %10
10: ; preds = %4
%11 = load i32, ptr @EFAULT, align 4, !tbaa !6
%12 = sub nsw i32 0, %11
br label %32
13: ; preds = %2
%14 = load i32, ptr @CAP_SYS_TIME, align 4, !tbaa !6
%15 = tail call i32 @capable(i32 noundef %14) #3
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %13
%18 = load i32, ptr @EACCES, align 4, !tbaa !6
%19 = sub nsw i32 0, %18
br label %32
20: ; preds = %13
%21 = inttoptr i64 %1 to ptr
%22 = call i32 @copy_from_user(ptr noundef nonnull %3, ptr noundef %21, i32 noundef 4) #3
%23 = icmp eq i32 %22, 0
br i1 %23, label %27, label %24
24: ; preds = %20
%25 = load i32, ptr @EFAULT, align 4, !tbaa !6
%26 = sub nsw i32 0, %25
br label %32
27: ; preds = %20
%28 = call i32 @set_rtc_time(ptr noundef nonnull %3) #3
br label %32
29: ; preds = %2
%30 = load i32, ptr @ENOTTY, align 4, !tbaa !6
%31 = sub nsw i32 0, %30
br label %32
32: ; preds = %27, %4, %29, %24, %17, %10
%33 = phi i32 [ %31, %29 ], [ %26, %24 ], [ %19, %17 ], [ %12, %10 ], [ 0, %4 ], [ 0, %27 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %33
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @get_rtc_time(ptr noundef) local_unnamed_addr #2
declare i32 @copy_to_user(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @capable(i32 noundef) local_unnamed_addr #2
declare i32 @copy_from_user(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @set_rtc_time(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| lede_package_kernel_rtc-rv5c386a_src_extr_rtc.c_rtc_do_ioctl |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/pvrusb2/extr_pvrusb2-hdw.c_pvr2_hdw_setup_std.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/pvrusb2/extr_pvrusb2-hdw.c_pvr2_hdw_setup_std.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.pvr2_hdw = type { i32, i32, i32, i32, i32, i32, ptr, ptr }
%struct.TYPE_7__ = type { i32, i32, i32 }
%struct.TYPE_6__ = type { i32, i32 }
@PVR2_TRACE_STD = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [65 x i8] c"Supported video standard(s) reported available in hardware: %.*s\00", align 1
@.str.1 = private unnamed_addr constant [53 x i8] c"Expanding supported video standards to include: %.*s\00", align 1
@.str.2 = private unnamed_addr constant [38 x i8] c"Initial video standard forced to %.*s\00", align 1
@.str.3 = private unnamed_addr constant [57 x i8] c"Initial video standard (determined by device type): %.*s\00", align 1
@std_eeprom_maps = dso_local local_unnamed_addr global ptr null, align 8
@.str.4 = private unnamed_addr constant [39 x i8] c"Initial video standard guessed as %.*s\00", align 1
@.str.5 = private unnamed_addr constant [43 x i8] c"Initial video standard auto-selected to %s\00", align 1
@PVR2_TRACE_ERROR_LEGS = dso_local local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [49 x i8] c"Unable to select a viable initial video standard\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @pvr2_hdw_setup_std], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @pvr2_hdw_setup_std(ptr noundef %0) #0 {
%2 = alloca [40 x i8], align 16
call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %2) #3
%3 = tail call i32 @get_default_standard(ptr noundef %0) #3
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = getelementptr inbounds %struct.pvr2_hdw, ptr %0, i64 0, i32 7
%7 = load ptr, ptr %6, align 8, !tbaa !5
%8 = load i32, ptr %7, align 4, !tbaa !11
br label %9
9: ; preds = %1, %5
%10 = phi i32 [ %8, %5 ], [ 0, %1 ]
%11 = load i32, ptr %0, align 8, !tbaa !13
%12 = call i32 @pvr2_std_id_to_str(ptr noundef nonnull %2, i32 noundef 40, i32 noundef %11) #3
%13 = load i32, ptr @PVR2_TRACE_STD, align 4, !tbaa !14
%14 = call i32 (i32, ptr, ...) @pvr2_trace(i32 noundef %13, ptr noundef nonnull @.str, i32 noundef %12, ptr noundef nonnull %2) #3
%15 = load i32, ptr %0, align 8, !tbaa !13
%16 = getelementptr inbounds %struct.pvr2_hdw, ptr %0, i64 0, i32 1
store i32 %15, ptr %16, align 4, !tbaa !15
%17 = or i32 %10, %3
%18 = xor i32 %15, -1
%19 = and i32 %17, %18
%20 = icmp eq i32 %19, 0
br i1 %20, label %27, label %21
21: ; preds = %9
%22 = call i32 @pvr2_std_id_to_str(ptr noundef nonnull %2, i32 noundef 40, i32 noundef %19) #3
%23 = load i32, ptr @PVR2_TRACE_STD, align 4, !tbaa !14
%24 = call i32 (i32, ptr, ...) @pvr2_trace(i32 noundef %23, ptr noundef nonnull @.str.1, i32 noundef %22, ptr noundef nonnull %2) #3
%25 = load i32, ptr %16, align 4, !tbaa !15
%26 = or i32 %25, %19
store i32 %26, ptr %16, align 4, !tbaa !15
br label %27
27: ; preds = %21, %9
%28 = call i32 @pvr2_hdw_internal_set_std_avail(ptr noundef nonnull %0) #3
br i1 %4, label %36, label %29
29: ; preds = %27
%30 = call i32 @pvr2_std_id_to_str(ptr noundef nonnull %2, i32 noundef 40, i32 noundef %3) #3
%31 = load i32, ptr @PVR2_TRACE_STD, align 4, !tbaa !14
%32 = call i32 (i32, ptr, ...) @pvr2_trace(i32 noundef %31, ptr noundef nonnull @.str.2, i32 noundef %30, ptr noundef nonnull %2) #3
%33 = getelementptr inbounds %struct.pvr2_hdw, ptr %0, i64 0, i32 2
store i32 %3, ptr %33, align 8, !tbaa !16
%34 = getelementptr inbounds %struct.pvr2_hdw, ptr %0, i64 0, i32 3
store i32 1, ptr %34, align 4, !tbaa !17
%35 = call i32 @pvr2_hdw_internal_find_stdenum(ptr noundef nonnull %0) #3
br label %99
36: ; preds = %27
%37 = icmp eq i32 %10, 0
br i1 %37, label %38, label %42
38: ; preds = %36
%39 = load ptr, ptr @std_eeprom_maps, align 8, !tbaa !18
%40 = call i32 @ARRAY_SIZE(ptr noundef %39) #3
%41 = icmp eq i32 %40, 0
br i1 %41, label %81, label %49
42: ; preds = %36
%43 = call i32 @pvr2_std_id_to_str(ptr noundef nonnull %2, i32 noundef 40, i32 noundef %10) #3
%44 = load i32, ptr @PVR2_TRACE_STD, align 4, !tbaa !14
%45 = call i32 (i32, ptr, ...) @pvr2_trace(i32 noundef %44, ptr noundef nonnull @.str.3, i32 noundef %43, ptr noundef nonnull %2) #3
%46 = getelementptr inbounds %struct.pvr2_hdw, ptr %0, i64 0, i32 2
store i32 %10, ptr %46, align 8, !tbaa !16
%47 = getelementptr inbounds %struct.pvr2_hdw, ptr %0, i64 0, i32 3
store i32 1, ptr %47, align 4, !tbaa !17
%48 = call i32 @pvr2_hdw_internal_find_stdenum(ptr noundef nonnull %0) #3
br label %99
49: ; preds = %38, %76
%50 = phi i64 [ %77, %76 ], [ 0, %38 ]
%51 = load ptr, ptr @std_eeprom_maps, align 8, !tbaa !18
%52 = getelementptr inbounds %struct.TYPE_7__, ptr %51, i64 %50
%53 = load i32, ptr %52, align 4, !tbaa !19
%54 = icmp eq i32 %53, 0
%55 = getelementptr inbounds %struct.TYPE_7__, ptr %51, i64 %50, i32 1
%56 = load i32, ptr %55, align 4, !tbaa !21
%57 = load i32, ptr %0, align 8, !tbaa !13
br i1 %54, label %62, label %58
58: ; preds = %49
%59 = xor i32 %57, %56
%60 = and i32 %59, %53
%61 = icmp eq i32 %60, 0
br i1 %61, label %64, label %76
62: ; preds = %49
%63 = icmp eq i32 %56, %57
br i1 %63, label %64, label %76
64: ; preds = %62, %58
%65 = getelementptr inbounds %struct.TYPE_7__, ptr %51, i64 %50, i32 2
%66 = load i32, ptr %65, align 4, !tbaa !22
%67 = call i32 @pvr2_std_id_to_str(ptr noundef nonnull %2, i32 noundef 40, i32 noundef %66) #3
%68 = load i32, ptr @PVR2_TRACE_STD, align 4, !tbaa !14
%69 = call i32 (i32, ptr, ...) @pvr2_trace(i32 noundef %68, ptr noundef nonnull @.str.4, i32 noundef %67, ptr noundef nonnull %2) #3
%70 = load ptr, ptr @std_eeprom_maps, align 8, !tbaa !18
%71 = getelementptr inbounds %struct.TYPE_7__, ptr %70, i64 %50, i32 2
%72 = load i32, ptr %71, align 4, !tbaa !22
%73 = getelementptr inbounds %struct.pvr2_hdw, ptr %0, i64 0, i32 2
store i32 %72, ptr %73, align 8, !tbaa !16
%74 = getelementptr inbounds %struct.pvr2_hdw, ptr %0, i64 0, i32 3
store i32 1, ptr %74, align 4, !tbaa !17
%75 = call i32 @pvr2_hdw_internal_find_stdenum(ptr noundef nonnull %0) #3
br label %99
76: ; preds = %58, %62
%77 = add nuw nsw i64 %50, 1
%78 = call i32 @ARRAY_SIZE(ptr noundef nonnull %51) #3
%79 = zext i32 %78 to i64
%80 = icmp ult i64 %77, %79
br i1 %80, label %49, label %81, !llvm.loop !23
81: ; preds = %76, %38
%82 = getelementptr inbounds %struct.pvr2_hdw, ptr %0, i64 0, i32 4
%83 = load i32, ptr %82, align 8, !tbaa !25
%84 = icmp sgt i32 %83, 1
br i1 %84, label %85, label %96
85: ; preds = %81
%86 = getelementptr inbounds %struct.pvr2_hdw, ptr %0, i64 0, i32 5
store i32 1, ptr %86, align 4, !tbaa !26
%87 = getelementptr inbounds %struct.pvr2_hdw, ptr %0, i64 0, i32 6
%88 = load ptr, ptr %87, align 8, !tbaa !27
%89 = load i32, ptr %88, align 4, !tbaa !28
%90 = getelementptr inbounds %struct.pvr2_hdw, ptr %0, i64 0, i32 2
store i32 %89, ptr %90, align 8, !tbaa !16
%91 = getelementptr inbounds %struct.pvr2_hdw, ptr %0, i64 0, i32 3
store i32 1, ptr %91, align 4, !tbaa !17
%92 = load i32, ptr @PVR2_TRACE_STD, align 4, !tbaa !14
%93 = getelementptr %struct.TYPE_6__, ptr %88, i64 0, i32 1
%94 = load i32, ptr %93, align 4, !tbaa !30
%95 = call i32 (i32, ptr, ...) @pvr2_trace(i32 noundef %92, ptr noundef nonnull @.str.5, i32 noundef %94) #3
br label %99
96: ; preds = %81
%97 = load i32, ptr @PVR2_TRACE_ERROR_LEGS, align 4, !tbaa !14
%98 = call i32 (i32, ptr, ...) @pvr2_trace(i32 noundef %97, ptr noundef nonnull @.str.6) #3
br label %99
99: ; preds = %64, %96, %85, %42, %29
call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @get_default_standard(ptr noundef) local_unnamed_addr #2
declare i32 @pvr2_std_id_to_str(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @pvr2_trace(i32 noundef, ptr noundef, ...) local_unnamed_addr #2
declare i32 @pvr2_hdw_internal_set_std_avail(ptr noundef) local_unnamed_addr #2
declare i32 @pvr2_hdw_internal_find_stdenum(ptr noundef) local_unnamed_addr #2
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 32}
!6 = !{!"pvr2_hdw", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !10, i64 24, !10, i64 32}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"TYPE_5__", !7, i64 0}
!13 = !{!6, !7, i64 0}
!14 = !{!7, !7, i64 0}
!15 = !{!6, !7, i64 4}
!16 = !{!6, !7, i64 8}
!17 = !{!6, !7, i64 12}
!18 = !{!10, !10, i64 0}
!19 = !{!20, !7, i64 0}
!20 = !{!"TYPE_7__", !7, i64 0, !7, i64 4, !7, i64 8}
!21 = !{!20, !7, i64 4}
!22 = !{!20, !7, i64 8}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = !{!6, !7, i64 16}
!26 = !{!6, !7, i64 20}
!27 = !{!6, !10, i64 24}
!28 = !{!29, !7, i64 0}
!29 = !{!"TYPE_6__", !7, i64 0, !7, i64 4}
!30 = !{!29, !7, i64 4}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/pvrusb2/extr_pvrusb2-hdw.c_pvr2_hdw_setup_std.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/pvrusb2/extr_pvrusb2-hdw.c_pvr2_hdw_setup_std.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_7__ = type { i32, i32, i32 }
@PVR2_TRACE_STD = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [65 x i8] c"Supported video standard(s) reported available in hardware: %.*s\00", align 1
@.str.1 = private unnamed_addr constant [53 x i8] c"Expanding supported video standards to include: %.*s\00", align 1
@.str.2 = private unnamed_addr constant [38 x i8] c"Initial video standard forced to %.*s\00", align 1
@.str.3 = private unnamed_addr constant [57 x i8] c"Initial video standard (determined by device type): %.*s\00", align 1
@std_eeprom_maps = common local_unnamed_addr global ptr null, align 8
@.str.4 = private unnamed_addr constant [39 x i8] c"Initial video standard guessed as %.*s\00", align 1
@.str.5 = private unnamed_addr constant [43 x i8] c"Initial video standard auto-selected to %s\00", align 1
@PVR2_TRACE_ERROR_LEGS = common local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [49 x i8] c"Unable to select a viable initial video standard\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @pvr2_hdw_setup_std], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @pvr2_hdw_setup_std(ptr noundef %0) #0 {
%2 = alloca [40 x i8], align 1
call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %2) #3
%3 = tail call i32 @get_default_standard(ptr noundef %0) #3
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = getelementptr inbounds i8, ptr %0, i64 32
%7 = load ptr, ptr %6, align 8, !tbaa !6
%8 = load i32, ptr %7, align 4, !tbaa !12
br label %9
9: ; preds = %1, %5
%10 = phi i32 [ %8, %5 ], [ 0, %1 ]
%11 = load i32, ptr %0, align 8, !tbaa !14
%12 = call i32 @pvr2_std_id_to_str(ptr noundef nonnull %2, i32 noundef 40, i32 noundef %11) #3
%13 = load i32, ptr @PVR2_TRACE_STD, align 4, !tbaa !15
%14 = call i32 (i32, ptr, ...) @pvr2_trace(i32 noundef %13, ptr noundef nonnull @.str, i32 noundef %12, ptr noundef nonnull %2) #3
%15 = load i32, ptr %0, align 8, !tbaa !14
%16 = getelementptr inbounds i8, ptr %0, i64 4
store i32 %15, ptr %16, align 4, !tbaa !16
%17 = or i32 %10, %3
%18 = xor i32 %15, -1
%19 = and i32 %17, %18
%20 = icmp eq i32 %19, 0
br i1 %20, label %27, label %21
21: ; preds = %9
%22 = call i32 @pvr2_std_id_to_str(ptr noundef nonnull %2, i32 noundef 40, i32 noundef %19) #3
%23 = load i32, ptr @PVR2_TRACE_STD, align 4, !tbaa !15
%24 = call i32 (i32, ptr, ...) @pvr2_trace(i32 noundef %23, ptr noundef nonnull @.str.1, i32 noundef %22, ptr noundef nonnull %2) #3
%25 = load i32, ptr %16, align 4, !tbaa !16
%26 = or i32 %25, %19
store i32 %26, ptr %16, align 4, !tbaa !16
br label %27
27: ; preds = %21, %9
%28 = call i32 @pvr2_hdw_internal_set_std_avail(ptr noundef nonnull %0) #3
br i1 %4, label %36, label %29
29: ; preds = %27
%30 = call i32 @pvr2_std_id_to_str(ptr noundef nonnull %2, i32 noundef 40, i32 noundef %3) #3
%31 = load i32, ptr @PVR2_TRACE_STD, align 4, !tbaa !15
%32 = call i32 (i32, ptr, ...) @pvr2_trace(i32 noundef %31, ptr noundef nonnull @.str.2, i32 noundef %30, ptr noundef nonnull %2) #3
%33 = getelementptr inbounds i8, ptr %0, i64 8
store i32 %3, ptr %33, align 8, !tbaa !17
%34 = getelementptr inbounds i8, ptr %0, i64 12
store i32 1, ptr %34, align 4, !tbaa !18
%35 = call i32 @pvr2_hdw_internal_find_stdenum(ptr noundef nonnull %0) #3
br label %99
36: ; preds = %27
%37 = icmp eq i32 %10, 0
br i1 %37, label %38, label %42
38: ; preds = %36
%39 = load ptr, ptr @std_eeprom_maps, align 8, !tbaa !19
%40 = call i32 @ARRAY_SIZE(ptr noundef %39) #3
%41 = icmp eq i32 %40, 0
br i1 %41, label %81, label %49
42: ; preds = %36
%43 = call i32 @pvr2_std_id_to_str(ptr noundef nonnull %2, i32 noundef 40, i32 noundef %10) #3
%44 = load i32, ptr @PVR2_TRACE_STD, align 4, !tbaa !15
%45 = call i32 (i32, ptr, ...) @pvr2_trace(i32 noundef %44, ptr noundef nonnull @.str.3, i32 noundef %43, ptr noundef nonnull %2) #3
%46 = getelementptr inbounds i8, ptr %0, i64 8
store i32 %10, ptr %46, align 8, !tbaa !17
%47 = getelementptr inbounds i8, ptr %0, i64 12
store i32 1, ptr %47, align 4, !tbaa !18
%48 = call i32 @pvr2_hdw_internal_find_stdenum(ptr noundef nonnull %0) #3
br label %99
49: ; preds = %38, %76
%50 = phi i64 [ %77, %76 ], [ 0, %38 ]
%51 = load ptr, ptr @std_eeprom_maps, align 8, !tbaa !19
%52 = getelementptr inbounds %struct.TYPE_7__, ptr %51, i64 %50
%53 = load i32, ptr %52, align 4, !tbaa !20
%54 = icmp eq i32 %53, 0
%55 = getelementptr inbounds i8, ptr %52, i64 4
%56 = load i32, ptr %55, align 4, !tbaa !22
%57 = load i32, ptr %0, align 8, !tbaa !14
br i1 %54, label %62, label %58
58: ; preds = %49
%59 = xor i32 %57, %56
%60 = and i32 %59, %53
%61 = icmp eq i32 %60, 0
br i1 %61, label %64, label %76
62: ; preds = %49
%63 = icmp eq i32 %56, %57
br i1 %63, label %64, label %76
64: ; preds = %62, %58
%65 = getelementptr inbounds %struct.TYPE_7__, ptr %51, i64 %50, i32 2
%66 = load i32, ptr %65, align 4, !tbaa !23
%67 = call i32 @pvr2_std_id_to_str(ptr noundef nonnull %2, i32 noundef 40, i32 noundef %66) #3
%68 = load i32, ptr @PVR2_TRACE_STD, align 4, !tbaa !15
%69 = call i32 (i32, ptr, ...) @pvr2_trace(i32 noundef %68, ptr noundef nonnull @.str.4, i32 noundef %67, ptr noundef nonnull %2) #3
%70 = load ptr, ptr @std_eeprom_maps, align 8, !tbaa !19
%71 = getelementptr inbounds %struct.TYPE_7__, ptr %70, i64 %50, i32 2
%72 = load i32, ptr %71, align 4, !tbaa !23
%73 = getelementptr inbounds i8, ptr %0, i64 8
store i32 %72, ptr %73, align 8, !tbaa !17
%74 = getelementptr inbounds i8, ptr %0, i64 12
store i32 1, ptr %74, align 4, !tbaa !18
%75 = call i32 @pvr2_hdw_internal_find_stdenum(ptr noundef nonnull %0) #3
br label %99
76: ; preds = %58, %62
%77 = add nuw nsw i64 %50, 1
%78 = call i32 @ARRAY_SIZE(ptr noundef nonnull %51) #3
%79 = zext i32 %78 to i64
%80 = icmp ult i64 %77, %79
br i1 %80, label %49, label %81, !llvm.loop !24
81: ; preds = %76, %38
%82 = getelementptr inbounds i8, ptr %0, i64 16
%83 = load i32, ptr %82, align 8, !tbaa !26
%84 = icmp sgt i32 %83, 1
br i1 %84, label %85, label %96
85: ; preds = %81
%86 = getelementptr inbounds i8, ptr %0, i64 20
store i32 1, ptr %86, align 4, !tbaa !27
%87 = getelementptr inbounds i8, ptr %0, i64 24
%88 = load ptr, ptr %87, align 8, !tbaa !28
%89 = load i32, ptr %88, align 4, !tbaa !29
%90 = getelementptr inbounds i8, ptr %0, i64 8
store i32 %89, ptr %90, align 8, !tbaa !17
%91 = getelementptr inbounds i8, ptr %0, i64 12
store i32 1, ptr %91, align 4, !tbaa !18
%92 = load i32, ptr @PVR2_TRACE_STD, align 4, !tbaa !15
%93 = getelementptr i8, ptr %88, i64 4
%94 = load i32, ptr %93, align 4, !tbaa !31
%95 = call i32 (i32, ptr, ...) @pvr2_trace(i32 noundef %92, ptr noundef nonnull @.str.5, i32 noundef %94) #3
br label %99
96: ; preds = %81
%97 = load i32, ptr @PVR2_TRACE_ERROR_LEGS, align 4, !tbaa !15
%98 = call i32 (i32, ptr, ...) @pvr2_trace(i32 noundef %97, ptr noundef nonnull @.str.6) #3
br label %99
99: ; preds = %64, %96, %85, %42, %29
call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @get_default_standard(ptr noundef) local_unnamed_addr #2
declare i32 @pvr2_std_id_to_str(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @pvr2_trace(i32 noundef, ptr noundef, ...) local_unnamed_addr #2
declare i32 @pvr2_hdw_internal_set_std_avail(ptr noundef) local_unnamed_addr #2
declare i32 @pvr2_hdw_internal_find_stdenum(ptr noundef) local_unnamed_addr #2
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 32}
!7 = !{!"pvr2_hdw", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !11, i64 24, !11, i64 32}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"TYPE_5__", !8, i64 0}
!14 = !{!7, !8, i64 0}
!15 = !{!8, !8, i64 0}
!16 = !{!7, !8, i64 4}
!17 = !{!7, !8, i64 8}
!18 = !{!7, !8, i64 12}
!19 = !{!11, !11, i64 0}
!20 = !{!21, !8, i64 0}
!21 = !{!"TYPE_7__", !8, i64 0, !8, i64 4, !8, i64 8}
!22 = !{!21, !8, i64 4}
!23 = !{!21, !8, i64 8}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}
!26 = !{!7, !8, i64 16}
!27 = !{!7, !8, i64 20}
!28 = !{!7, !11, i64 24}
!29 = !{!30, !8, i64 0}
!30 = !{!"TYPE_6__", !8, i64 0, !8, i64 4}
!31 = !{!30, !8, i64 4}
| fastsocket_kernel_drivers_media_video_pvrusb2_extr_pvrusb2-hdw.c_pvr2_hdw_setup_std |
; ModuleID = 'AnghaBench/linux/drivers/pinctrl/mediatek/extr_..pinmux.h_pinmux_map_to_setting.c'
source_filename = "AnghaBench/linux/drivers/pinctrl/mediatek/extr_..pinmux.h_pinmux_map_to_setting.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @pinmux_map_to_setting], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @pinmux_map_to_setting(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
ret i32 0
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/pinctrl/mediatek/extr_..pinmux.h_pinmux_map_to_setting.c'
source_filename = "AnghaBench/linux/drivers/pinctrl/mediatek/extr_..pinmux.h_pinmux_map_to_setting.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @pinmux_map_to_setting], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @pinmux_map_to_setting(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
ret i32 0
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_pinctrl_mediatek_extr_..pinmux.h_pinmux_map_to_setting |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/m68knommu/platform/coldfire/extr_dma_timer.c_cycles2ns.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/m68knommu/platform/coldfire/extr_dma_timer.c_cycles2ns.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@CYC2NS_SCALE = dso_local local_unnamed_addr global i64 0, align 8
@CYC2NS_SCALE_FACTOR = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @cycles2ns], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal i64 @cycles2ns(i64 noundef %0) #0 {
%2 = load i64, ptr @CYC2NS_SCALE, align 8, !tbaa !5
%3 = mul i64 %2, %0
%4 = load i64, ptr @CYC2NS_SCALE_FACTOR, align 8, !tbaa !5
%5 = lshr i64 %3, %4
ret i64 %5
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/m68knommu/platform/coldfire/extr_dma_timer.c_cycles2ns.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/m68knommu/platform/coldfire/extr_dma_timer.c_cycles2ns.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CYC2NS_SCALE = common local_unnamed_addr global i64 0, align 8
@CYC2NS_SCALE_FACTOR = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @cycles2ns], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal i64 @cycles2ns(i64 noundef %0) #0 {
%2 = load i64, ptr @CYC2NS_SCALE, align 8, !tbaa !6
%3 = mul i64 %2, %0
%4 = load i64, ptr @CYC2NS_SCALE_FACTOR, align 8, !tbaa !6
%5 = lshr i64 %3, %4
ret i64 %5
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_arch_m68knommu_platform_coldfire_extr_dma_timer.c_cycles2ns |
; ModuleID = 'AnghaBench/darwin-xnu/pexpert/i386/extr_pe_serial.c_pcie_mmio_uart_probe.c'
source_filename = "AnghaBench/darwin-xnu/pexpert/i386/extr_pe_serial.c_pcie_mmio_uart_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [15 x i8] c"pcie_mmio_uart\00", align 1
@pcie_mmio_uart_base = dso_local local_unnamed_addr global i32 0, align 4
@PCIE_MMIO_UART_BASE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @pcie_mmio_uart_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @pcie_mmio_uart_probe() #0 {
%1 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
store i32 0, ptr %1, align 4, !tbaa !5
%2 = call i64 @PE_parse_boot_argn(ptr noundef nonnull @.str, ptr noundef nonnull %1, i32 noundef 4) #3
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %0
%5 = load i32, ptr %1, align 4, !tbaa !5
%6 = icmp eq i32 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %4
store i32 %5, ptr @pcie_mmio_uart_base, align 4, !tbaa !5
br label %13
8: ; preds = %0
%9 = load i32, ptr @PCIE_MMIO_UART_BASE, align 4, !tbaa !5
store i32 %9, ptr @pcie_mmio_uart_base, align 4, !tbaa !5
%10 = call i64 (...) @pcie_mmio_uart_present() #3
%11 = icmp ne i64 %10, 0
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %8, %4, %7
%14 = phi i32 [ 1, %7 ], [ 0, %4 ], [ %12, %8 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret i32 %14
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @PE_parse_boot_argn(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @pcie_mmio_uart_present(...) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/darwin-xnu/pexpert/i386/extr_pe_serial.c_pcie_mmio_uart_probe.c'
source_filename = "AnghaBench/darwin-xnu/pexpert/i386/extr_pe_serial.c_pcie_mmio_uart_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [15 x i8] c"pcie_mmio_uart\00", align 1
@pcie_mmio_uart_base = common local_unnamed_addr global i32 0, align 4
@PCIE_MMIO_UART_BASE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @pcie_mmio_uart_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @pcie_mmio_uart_probe() #0 {
%1 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
store i32 0, ptr %1, align 4, !tbaa !6
%2 = call i64 @PE_parse_boot_argn(ptr noundef nonnull @.str, ptr noundef nonnull %1, i32 noundef 4) #3
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %0
%5 = load i32, ptr %1, align 4, !tbaa !6
%6 = icmp eq i32 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %4
store i32 %5, ptr @pcie_mmio_uart_base, align 4, !tbaa !6
br label %13
8: ; preds = %0
%9 = load i32, ptr @PCIE_MMIO_UART_BASE, align 4, !tbaa !6
store i32 %9, ptr @pcie_mmio_uart_base, align 4, !tbaa !6
%10 = call i64 @pcie_mmio_uart_present() #3
%11 = icmp ne i64 %10, 0
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %8, %4, %7
%14 = phi i32 [ 1, %7 ], [ 0, %4 ], [ %12, %8 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret i32 %14
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @PE_parse_boot_argn(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @pcie_mmio_uart_present(...) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| darwin-xnu_pexpert_i386_extr_pe_serial.c_pcie_mmio_uart_probe |
; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/dreamcast/sh2rec/extr_sh2rec.c_generateLDCMVBR.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/dreamcast/sh2rec/extr_sh2rec.c_generateLDCMVBR.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@R9 = dso_local local_unnamed_addr global i32 0, align 4
@R0 = dso_local local_unnamed_addr global i32 0, align 4
@R_PR = dso_local local_unnamed_addr global i32 0, align 4
@R10 = dso_local local_unnamed_addr global i32 0, align 4
@R8 = dso_local local_unnamed_addr global i32 0, align 4
@R4 = dso_local local_unnamed_addr global i32 0, align 4
@R1 = dso_local local_unnamed_addr global i32 0, align 4
@OP_ADD = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @generateLDCMVBR], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @generateLDCMVBR(i32 noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @INSTRUCTION_B(i32 noundef %0) #2
%4 = load i32, ptr @R9, align 4, !tbaa !5
%5 = load i32, ptr @R0, align 4, !tbaa !5
%6 = tail call i32 @emitMOVLL4(ptr noundef %1, i32 noundef %4, i32 noundef 2, i32 noundef %5) #2
%7 = load i32, ptr @R_PR, align 4, !tbaa !5
%8 = load i32, ptr @R10, align 4, !tbaa !5
%9 = tail call i32 @emitSTS(ptr noundef %1, i32 noundef %7, i32 noundef %8) #2
%10 = load i32, ptr @R8, align 4, !tbaa !5
%11 = load i32, ptr @R4, align 4, !tbaa !5
%12 = tail call i32 @emitMOVLL4(ptr noundef %1, i32 noundef %10, i32 noundef %3, i32 noundef %11) #2
%13 = load i32, ptr @R1, align 4, !tbaa !5
%14 = tail call i32 @emitMOVI(ptr noundef %1, i32 noundef 4, i32 noundef %13) #2
%15 = load i32, ptr @R4, align 4, !tbaa !5
%16 = load i32, ptr @R1, align 4, !tbaa !5
%17 = load i32, ptr @OP_ADD, align 4, !tbaa !5
%18 = tail call i32 @emitALU(ptr noundef %1, i32 noundef %15, i32 noundef %16, i32 noundef %17) #2
%19 = load i32, ptr @R0, align 4, !tbaa !5
%20 = tail call i32 @emitJSR(ptr noundef %1, i32 noundef %19) #2
%21 = load i32, ptr @R1, align 4, !tbaa !5
%22 = load i32, ptr @R8, align 4, !tbaa !5
%23 = tail call i32 @emitMOVLS4(ptr noundef %1, i32 noundef %21, i32 noundef %3, i32 noundef %22) #2
%24 = load i32, ptr @R10, align 4, !tbaa !5
%25 = load i32, ptr @R_PR, align 4, !tbaa !5
%26 = tail call i32 @emitLDS(ptr noundef %1, i32 noundef %24, i32 noundef %25) #2
%27 = tail call i32 @emitMOVLSG(ptr noundef %1, i32 noundef 18) #2
%28 = load <2 x i32>, ptr %1, align 4, !tbaa !5
%29 = add nsw <2 x i32> %28, <i32 3, i32 2>
store <2 x i32> %29, ptr %1, align 4, !tbaa !5
ret void
}
declare i32 @INSTRUCTION_B(i32 noundef) local_unnamed_addr #1
declare i32 @emitMOVLL4(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @emitSTS(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @emitMOVI(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @emitALU(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @emitJSR(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @emitMOVLS4(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @emitLDS(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @emitMOVLSG(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/dreamcast/sh2rec/extr_sh2rec.c_generateLDCMVBR.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/dreamcast/sh2rec/extr_sh2rec.c_generateLDCMVBR.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@R9 = common local_unnamed_addr global i32 0, align 4
@R0 = common local_unnamed_addr global i32 0, align 4
@R_PR = common local_unnamed_addr global i32 0, align 4
@R10 = common local_unnamed_addr global i32 0, align 4
@R8 = common local_unnamed_addr global i32 0, align 4
@R4 = common local_unnamed_addr global i32 0, align 4
@R1 = common local_unnamed_addr global i32 0, align 4
@OP_ADD = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @generateLDCMVBR], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @generateLDCMVBR(i32 noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @INSTRUCTION_B(i32 noundef %0) #2
%4 = load i32, ptr @R9, align 4, !tbaa !6
%5 = load i32, ptr @R0, align 4, !tbaa !6
%6 = tail call i32 @emitMOVLL4(ptr noundef %1, i32 noundef %4, i32 noundef 2, i32 noundef %5) #2
%7 = load i32, ptr @R_PR, align 4, !tbaa !6
%8 = load i32, ptr @R10, align 4, !tbaa !6
%9 = tail call i32 @emitSTS(ptr noundef %1, i32 noundef %7, i32 noundef %8) #2
%10 = load i32, ptr @R8, align 4, !tbaa !6
%11 = load i32, ptr @R4, align 4, !tbaa !6
%12 = tail call i32 @emitMOVLL4(ptr noundef %1, i32 noundef %10, i32 noundef %3, i32 noundef %11) #2
%13 = load i32, ptr @R1, align 4, !tbaa !6
%14 = tail call i32 @emitMOVI(ptr noundef %1, i32 noundef 4, i32 noundef %13) #2
%15 = load i32, ptr @R4, align 4, !tbaa !6
%16 = load i32, ptr @R1, align 4, !tbaa !6
%17 = load i32, ptr @OP_ADD, align 4, !tbaa !6
%18 = tail call i32 @emitALU(ptr noundef %1, i32 noundef %15, i32 noundef %16, i32 noundef %17) #2
%19 = load i32, ptr @R0, align 4, !tbaa !6
%20 = tail call i32 @emitJSR(ptr noundef %1, i32 noundef %19) #2
%21 = load i32, ptr @R1, align 4, !tbaa !6
%22 = load i32, ptr @R8, align 4, !tbaa !6
%23 = tail call i32 @emitMOVLS4(ptr noundef %1, i32 noundef %21, i32 noundef %3, i32 noundef %22) #2
%24 = load i32, ptr @R10, align 4, !tbaa !6
%25 = load i32, ptr @R_PR, align 4, !tbaa !6
%26 = tail call i32 @emitLDS(ptr noundef %1, i32 noundef %24, i32 noundef %25) #2
%27 = tail call i32 @emitMOVLSG(ptr noundef %1, i32 noundef 18) #2
%28 = load <2 x i32>, ptr %1, align 4, !tbaa !6
%29 = add nsw <2 x i32> %28, <i32 3, i32 2>
store <2 x i32> %29, ptr %1, align 4, !tbaa !6
ret void
}
declare i32 @INSTRUCTION_B(i32 noundef) local_unnamed_addr #1
declare i32 @emitMOVLL4(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @emitSTS(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @emitMOVI(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @emitALU(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @emitJSR(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @emitMOVLS4(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @emitLDS(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @emitMOVLSG(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| Provenance_Cores_Yabause_yabause_src_dreamcast_sh2rec_extr_sh2rec.c_generateLDCMVBR |
; ModuleID = 'AnghaBench/linux/sound/ppc/extr_snd_ps3.c_snd_ps3_spdif_mask_info.c'
source_filename = "AnghaBench/linux/sound/ppc/extr_snd_ps3.c_snd_ps3_spdif_mask_info.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.snd_ctl_elem_info = type { i32, i32 }
@SNDRV_CTL_ELEM_TYPE_IEC958 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_ps3_spdif_mask_info], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable
define internal noundef i32 @snd_ps3_spdif_mask_info(ptr nocapture readnone %0, ptr nocapture noundef writeonly %1) #0 {
%3 = load i32, ptr @SNDRV_CTL_ELEM_TYPE_IEC958, align 4, !tbaa !5
%4 = getelementptr inbounds %struct.snd_ctl_elem_info, ptr %1, i64 0, i32 1
store i32 %3, ptr %4, align 4, !tbaa !9
store i32 1, ptr %1, align 4, !tbaa !11
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"snd_ctl_elem_info", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/sound/ppc/extr_snd_ps3.c_snd_ps3_spdif_mask_info.c'
source_filename = "AnghaBench/linux/sound/ppc/extr_snd_ps3.c_snd_ps3_spdif_mask_info.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SNDRV_CTL_ELEM_TYPE_IEC958 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @snd_ps3_spdif_mask_info], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync)
define internal noundef i32 @snd_ps3_spdif_mask_info(ptr nocapture readnone %0, ptr nocapture noundef writeonly %1) #0 {
%3 = load i32, ptr @SNDRV_CTL_ELEM_TYPE_IEC958, align 4, !tbaa !6
%4 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %3, ptr %4, align 4, !tbaa !10
store i32 1, ptr %1, align 4, !tbaa !12
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 4}
!11 = !{!"snd_ctl_elem_info", !7, i64 0, !7, i64 4}
!12 = !{!11, !7, i64 0}
| linux_sound_ppc_extr_snd_ps3.c_snd_ps3_spdif_mask_info |
; ModuleID = 'AnghaBench/linux/drivers/pci/pcie/extr_pme.c_pcie_pme_resume.c'
source_filename = "AnghaBench/linux/drivers/pci/pcie/extr_pme.c_pcie_pme_resume.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.pcie_pme_service_data = type { i32, i32 }
%struct.pcie_device = type { i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @pcie_pme_resume], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @pcie_pme_resume(ptr noundef %0) #0 {
%2 = tail call ptr @get_service_data(ptr noundef %0) #2
%3 = getelementptr inbounds %struct.pcie_pme_service_data, ptr %2, i64 0, i32 1
%4 = tail call i32 @spin_lock_irq(ptr noundef nonnull %3) #2
%5 = load i32, ptr %2, align 4, !tbaa !5
%6 = icmp eq i32 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %1
%8 = getelementptr inbounds %struct.pcie_device, ptr %0, i64 0, i32 1
%9 = load ptr, ptr %8, align 8, !tbaa !10
%10 = tail call i32 @pcie_clear_root_pme_status(ptr noundef %9) #2
%11 = tail call i32 @pcie_pme_interrupt_enable(ptr noundef %9, i32 noundef 1) #2
store i32 0, ptr %2, align 4, !tbaa !5
br label %15
12: ; preds = %1
%13 = load i32, ptr %0, align 8, !tbaa !13
%14 = tail call i32 @disable_irq_wake(i32 noundef %13) #2
br label %15
15: ; preds = %12, %7
%16 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %3) #2
ret i32 0
}
declare ptr @get_service_data(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @pcie_clear_root_pme_status(ptr noundef) local_unnamed_addr #1
declare i32 @pcie_pme_interrupt_enable(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @disable_irq_wake(i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irq(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"pcie_pme_service_data", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"pcie_device", !7, i64 0, !12, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/pci/pcie/extr_pme.c_pcie_pme_resume.c'
source_filename = "AnghaBench/linux/drivers/pci/pcie/extr_pme.c_pcie_pme_resume.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @pcie_pme_resume], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @pcie_pme_resume(ptr noundef %0) #0 {
%2 = tail call ptr @get_service_data(ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %2, i64 4
%4 = tail call i32 @spin_lock_irq(ptr noundef nonnull %3) #2
%5 = load i32, ptr %2, align 4, !tbaa !6
%6 = icmp eq i32 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %1
%8 = getelementptr inbounds i8, ptr %0, i64 8
%9 = load ptr, ptr %8, align 8, !tbaa !11
%10 = tail call i32 @pcie_clear_root_pme_status(ptr noundef %9) #2
%11 = tail call i32 @pcie_pme_interrupt_enable(ptr noundef %9, i32 noundef 1) #2
store i32 0, ptr %2, align 4, !tbaa !6
br label %15
12: ; preds = %1
%13 = load i32, ptr %0, align 8, !tbaa !14
%14 = tail call i32 @disable_irq_wake(i32 noundef %13) #2
br label %15
15: ; preds = %12, %7
%16 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %3) #2
ret i32 0
}
declare ptr @get_service_data(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @pcie_clear_root_pme_status(ptr noundef) local_unnamed_addr #1
declare i32 @pcie_pme_interrupt_enable(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @disable_irq_wake(i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irq(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"pcie_pme_service_data", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 8}
!12 = !{!"pcie_device", !8, i64 0, !13, i64 8}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!12, !8, i64 0}
| linux_drivers_pci_pcie_extr_pme.c_pcie_pme_resume |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/extr_tvaudio.c_tda8425_shift10.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/extr_tvaudio.c_tda8425_shift10.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @tda8425_shift10], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @tda8425_shift10(i32 noundef %0) #0 {
%2 = ashr i32 %0, 10
%3 = or i32 %2, 192
ret i32 %3
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/extr_tvaudio.c_tda8425_shift10.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/extr_tvaudio.c_tda8425_shift10.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @tda8425_shift10], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef range(i32 192, 0) i32 @tda8425_shift10(i32 noundef %0) #0 {
%2 = ashr i32 %0, 10
%3 = or i32 %2, 192
ret i32 %3
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_media_video_extr_tvaudio.c_tda8425_shift10 |
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_dve3900-rom.c_debug_write.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_dve3900-rom.c_debug_write.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@remote_debug = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [7 x i8] c"[%02x]\00", align 1
@.str.1 = private unnamed_addr constant [9 x i8] c"Sent -->\00", align 1
@.str.2 = private unnamed_addr constant [4 x i8] c"<--\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @debug_write], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @debug_write(ptr noundef %0, i32 noundef %1) #0 {
%3 = alloca [10 x i8], align 1
call void @llvm.lifetime.start.p0(i64 10, ptr nonnull %3) #3
%4 = tail call i32 @monitor_write(ptr noundef %0, i32 noundef %1) #3
%5 = load i64, ptr @remote_debug, align 8, !tbaa !5
%6 = icmp sgt i64 %5, 0
%7 = icmp sgt i32 %1, 0
%8 = and i1 %6, %7
br i1 %8, label %9, label %18
9: ; preds = %2, %9
%10 = phi i32 [ %12, %9 ], [ %1, %2 ]
%11 = phi ptr [ %16, %9 ], [ %0, %2 ]
%12 = add nsw i32 %10, -1
%13 = load i8, ptr %11, align 1, !tbaa !9
%14 = call i32 @sprintf(ptr noundef nonnull %3, ptr noundef nonnull @.str, i8 noundef zeroext %13) #3
%15 = call i32 @puts_debug(ptr noundef nonnull @.str.1, ptr noundef nonnull %3, ptr noundef nonnull @.str.2) #3
%16 = getelementptr inbounds i8, ptr %11, i64 1
%17 = icmp ugt i32 %10, 1
br i1 %17, label %9, label %18, !llvm.loop !10
18: ; preds = %9, %2
call void @llvm.lifetime.end.p0(i64 10, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @monitor_write(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @sprintf(ptr noundef, ptr noundef, i8 noundef zeroext) local_unnamed_addr #2
declare i32 @puts_debug(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_dve3900-rom.c_debug_write.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_dve3900-rom.c_debug_write.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@remote_debug = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [7 x i8] c"[%02x]\00", align 1
@.str.1 = private unnamed_addr constant [9 x i8] c"Sent -->\00", align 1
@.str.2 = private unnamed_addr constant [4 x i8] c"<--\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @debug_write], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @debug_write(ptr noundef %0, i32 noundef %1) #0 {
%3 = alloca [10 x i8], align 1
call void @llvm.lifetime.start.p0(i64 10, ptr nonnull %3) #3
%4 = tail call i32 @monitor_write(ptr noundef %0, i32 noundef %1) #3
%5 = load i64, ptr @remote_debug, align 8, !tbaa !6
%6 = icmp sgt i64 %5, 0
%7 = icmp sgt i32 %1, 0
%8 = and i1 %6, %7
br i1 %8, label %9, label %18
9: ; preds = %2, %9
%10 = phi i32 [ %12, %9 ], [ %1, %2 ]
%11 = phi ptr [ %16, %9 ], [ %0, %2 ]
%12 = add nsw i32 %10, -1
%13 = load i8, ptr %11, align 1, !tbaa !10
%14 = call i32 @sprintf(ptr noundef nonnull %3, ptr noundef nonnull @.str, i8 noundef zeroext %13) #3
%15 = call i32 @puts_debug(ptr noundef nonnull @.str.1, ptr noundef nonnull %3, ptr noundef nonnull @.str.2) #3
%16 = getelementptr inbounds i8, ptr %11, i64 1
%17 = icmp ugt i32 %10, 1
br i1 %17, label %9, label %18, !llvm.loop !11
18: ; preds = %9, %2
call void @llvm.lifetime.end.p0(i64 10, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @monitor_write(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @sprintf(ptr noundef, ptr noundef, i8 noundef zeroext) local_unnamed_addr #2
declare i32 @puts_debug(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
| freebsd_contrib_gdb_gdb_extr_dve3900-rom.c_debug_write |
; ModuleID = 'AnghaBench/linux/drivers/cpufreq/extr_cpufreq.c_show_bios_limit.c'
source_filename = "AnghaBench/linux/drivers/cpufreq/extr_cpufreq.c_show_bios_limit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.cpufreq_policy = type { %struct.TYPE_3__, i32 }
%struct.TYPE_3__ = type { i32 }
@cpufreq_driver = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [4 x i8] c"%u\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @show_bios_limit], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @show_bios_limit(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = load ptr, ptr @cpufreq_driver, align 8, !tbaa !5
%5 = load ptr, ptr %4, align 8, !tbaa !9
%6 = getelementptr inbounds %struct.cpufreq_policy, ptr %0, i64 0, i32 1
%7 = load i32, ptr %6, align 4, !tbaa !11
%8 = call i32 %5(i32 noundef %7, ptr noundef nonnull %3) #3
%9 = icmp eq i32 %8, 0
%10 = select i1 %9, ptr %3, ptr %0
%11 = load i32, ptr %10, align 4, !tbaa !15
%12 = call i32 @sprintf(ptr noundef %1, ptr noundef nonnull @.str, i32 noundef %11) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %12
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_4__", !6, i64 0}
!11 = !{!12, !14, i64 4}
!12 = !{!"cpufreq_policy", !13, i64 0, !14, i64 4}
!13 = !{!"TYPE_3__", !14, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!14, !14, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/cpufreq/extr_cpufreq.c_show_bios_limit.c'
source_filename = "AnghaBench/linux/drivers/cpufreq/extr_cpufreq.c_show_bios_limit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cpufreq_driver = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [4 x i8] c"%u\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @show_bios_limit], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @show_bios_limit(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = load ptr, ptr @cpufreq_driver, align 8, !tbaa !6
%5 = load ptr, ptr %4, align 8, !tbaa !10
%6 = getelementptr inbounds i8, ptr %0, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !12
%8 = call i32 %5(i32 noundef %7, ptr noundef nonnull %3) #3
%9 = icmp eq i32 %8, 0
%10 = select i1 %9, ptr %3, ptr %0
%11 = load i32, ptr %10, align 4, !tbaa !16
%12 = call i32 @sprintf(ptr noundef %1, ptr noundef nonnull @.str, i32 noundef %11) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %12
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_4__", !7, i64 0}
!12 = !{!13, !15, i64 4}
!13 = !{!"cpufreq_policy", !14, i64 0, !15, i64 4}
!14 = !{!"TYPE_3__", !15, i64 0}
!15 = !{!"int", !8, i64 0}
!16 = !{!15, !15, i64 0}
| linux_drivers_cpufreq_extr_cpufreq.c_show_bios_limit |
; ModuleID = 'AnghaBench/zstd/lib/compress/extr_zstd_ldm.c_ZSTD_ldm_getChecksum.c'
source_filename = "AnghaBench/zstd/lib/compress/extr_zstd_ldm.c_ZSTD_ldm_getChecksum.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @ZSTD_ldm_getChecksum], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ZSTD_ldm_getChecksum(i32 noundef %0, i32 noundef %1) #0 {
%3 = icmp slt i32 %1, 33
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 noundef %4) #2
%6 = sub nsw i32 32, %1
%7 = ashr i32 %0, %6
ret i32 %7
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/zstd/lib/compress/extr_zstd_ldm.c_ZSTD_ldm_getChecksum.c'
source_filename = "AnghaBench/zstd/lib/compress/extr_zstd_ldm.c_ZSTD_ldm_getChecksum.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ZSTD_ldm_getChecksum], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ZSTD_ldm_getChecksum(i32 noundef %0, i32 noundef %1) #0 {
%3 = icmp slt i32 %1, 33
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 noundef %4) #2
%6 = sub nsw i32 32, %1
%7 = ashr i32 %0, %6
ret i32 %7
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| zstd_lib_compress_extr_zstd_ldm.c_ZSTD_ldm_getChecksum |
; ModuleID = 'AnghaBench/reactos/boot/freeldr/freeldr/lib/mm/extr_heap.c_FrLdrHeapInsertFreeList.c'
source_filename = "AnghaBench/reactos/boot/freeldr/freeldr/lib/mm/extr_heap.c_FrLdrHeapInsertFreeList.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i32, %struct.TYPE_7__ }
%struct.TYPE_7__ = type { i64, ptr }
%struct.TYPE_6__ = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @FrLdrHeapInsertFreeList], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @FrLdrHeapInsertFreeList(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i64, ptr %1, align 8, !tbaa !5
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 @ASSERT(i32 noundef %5) #2
%7 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1
%8 = load i32, ptr %0, align 8, !tbaa !11
%9 = sext i32 %8 to i64
br label %10
10: ; preds = %10, %2
%11 = phi i64 [ %9, %2 ], [ %15, %10 ]
%12 = getelementptr inbounds %struct.TYPE_7__, ptr %7, i64 %11, i32 1
%13 = load ptr, ptr %12, align 8, !tbaa !14
%14 = load i32, ptr %13, align 4, !tbaa !15
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds %struct.TYPE_7__, ptr %7, i64 %15
%17 = icmp ult ptr %16, %1
br i1 %17, label %10, label %18, !llvm.loop !17
18: ; preds = %10
%19 = ptrtoint ptr %7 to i64
%20 = getelementptr inbounds %struct.TYPE_7__, ptr %1, i64 0, i32 1
%21 = load ptr, ptr %20, align 8, !tbaa !14
store i32 %14, ptr %21, align 4, !tbaa !15
%22 = getelementptr inbounds %struct.TYPE_7__, ptr %7, i64 %15, i32 1
%23 = load ptr, ptr %22, align 8, !tbaa !14
%24 = getelementptr inbounds %struct.TYPE_6__, ptr %23, i64 0, i32 1
%25 = load i32, ptr %24, align 4, !tbaa !19
%26 = getelementptr inbounds %struct.TYPE_6__, ptr %21, i64 0, i32 1
store i32 %25, ptr %26, align 4, !tbaa !19
%27 = ptrtoint ptr %1 to i64
%28 = sub i64 %27, %19
%29 = lshr exact i64 %28, 4
%30 = trunc i64 %29 to i32
store i32 %30, ptr %24, align 4, !tbaa !19
%31 = load i32, ptr %26, align 4, !tbaa !19
%32 = sext i32 %31 to i64
%33 = getelementptr inbounds %struct.TYPE_7__, ptr %7, i64 %32, i32 1
%34 = load ptr, ptr %33, align 8, !tbaa !14
store i32 %30, ptr %34, align 4, !tbaa !15
ret i32 undef
}
declare i32 @ASSERT(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_7__", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_8__", !13, i64 0, !6, i64 8}
!13 = !{!"int", !8, i64 0}
!14 = !{!6, !10, i64 8}
!15 = !{!16, !13, i64 0}
!16 = !{!"TYPE_6__", !13, i64 0, !13, i64 4}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!16, !13, i64 4}
| ; ModuleID = 'AnghaBench/reactos/boot/freeldr/freeldr/lib/mm/extr_heap.c_FrLdrHeapInsertFreeList.c'
source_filename = "AnghaBench/reactos/boot/freeldr/freeldr/lib/mm/extr_heap.c_FrLdrHeapInsertFreeList.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_7__ = type { i64, ptr }
@llvm.used = appending global [1 x ptr] [ptr @FrLdrHeapInsertFreeList], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @FrLdrHeapInsertFreeList(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i64, ptr %1, align 8, !tbaa !6
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 @ASSERT(i32 noundef %5) #2
%7 = getelementptr inbounds i8, ptr %0, i64 8
%8 = load i32, ptr %0, align 8, !tbaa !12
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds %struct.TYPE_7__, ptr %7, i64 %9, i32 1
br label %11
11: ; preds = %11, %2
%12 = phi ptr [ %10, %2 ], [ %18, %11 ]
%13 = load ptr, ptr %12, align 8, !tbaa !15
%14 = load i32, ptr %13, align 4, !tbaa !16
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds %struct.TYPE_7__, ptr %7, i64 %15
%17 = icmp ult ptr %16, %1
%18 = getelementptr inbounds i8, ptr %16, i64 8
br i1 %17, label %11, label %19, !llvm.loop !18
19: ; preds = %11
%20 = ptrtoint ptr %7 to i64
%21 = getelementptr inbounds i8, ptr %1, i64 8
%22 = load ptr, ptr %21, align 8, !tbaa !15
store i32 %14, ptr %22, align 4, !tbaa !16
%23 = load ptr, ptr %18, align 8, !tbaa !15
%24 = getelementptr inbounds i8, ptr %23, i64 4
%25 = load i32, ptr %24, align 4, !tbaa !20
%26 = getelementptr inbounds i8, ptr %22, i64 4
store i32 %25, ptr %26, align 4, !tbaa !20
%27 = ptrtoint ptr %1 to i64
%28 = sub i64 %27, %20
%29 = lshr exact i64 %28, 4
%30 = trunc i64 %29 to i32
store i32 %30, ptr %24, align 4, !tbaa !20
%31 = load i32, ptr %26, align 4, !tbaa !20
%32 = sext i32 %31 to i64
%33 = getelementptr inbounds %struct.TYPE_7__, ptr %7, i64 %32, i32 1
%34 = load ptr, ptr %33, align 8, !tbaa !15
store i32 %30, ptr %34, align 4, !tbaa !16
ret i32 undef
}
declare i32 @ASSERT(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_7__", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_8__", !14, i64 0, !7, i64 8}
!14 = !{!"int", !9, i64 0}
!15 = !{!7, !11, i64 8}
!16 = !{!17, !14, i64 0}
!17 = !{!"TYPE_6__", !14, i64 0, !14, i64 4}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!17, !14, i64 4}
| reactos_boot_freeldr_freeldr_lib_mm_extr_heap.c_FrLdrHeapInsertFreeList |
; ModuleID = 'AnghaBench/linux/drivers/net/bonding/extr_bond_alb.c_compute_gap.c'
source_filename = "AnghaBench/linux/drivers/net/bonding/extr_bond_alb.c_compute_gap.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @compute_gap], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @compute_gap(ptr noundef %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = shl i32 %2, 20
%4 = sext i32 %3 to i64
%5 = tail call i32 @SLAVE_TLB_INFO(ptr noundef nonnull %0) #2
%6 = shl i32 %5, 3
%7 = sext i32 %6 to i64
%8 = sub nsw i64 %4, %7
ret i64 %8
}
declare i32 @SLAVE_TLB_INFO(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"slave", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/bonding/extr_bond_alb.c_compute_gap.c'
source_filename = "AnghaBench/linux/drivers/net/bonding/extr_bond_alb.c_compute_gap.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @compute_gap], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i64 -4294967295, 4294967296) i64 @compute_gap(ptr noundef %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = shl i32 %2, 20
%4 = sext i32 %3 to i64
%5 = tail call i32 @SLAVE_TLB_INFO(ptr noundef nonnull %0) #2
%6 = shl i32 %5, 3
%7 = sext i32 %6 to i64
%8 = sub nsw i64 %4, %7
ret i64 %8
}
declare i32 @SLAVE_TLB_INFO(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"slave", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_net_bonding_extr_bond_alb.c_compute_gap |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/block/extr_dasd_eckd.c_dasd_eckd_erp_action.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/block/extr_dasd_eckd.c_dasd_eckd_erp_action.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@dasd_3990_erp_action = dso_local local_unnamed_addr global i32 0, align 4
@dasd_default_erp_action = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @dasd_eckd_erp_action], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define internal i32 @dasd_eckd_erp_action(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = inttoptr i64 %2 to ptr
%4 = load ptr, ptr %3, align 8, !tbaa !10
%5 = load i32, ptr %4, align 4, !tbaa !13
switch i32 %5, label %6 [
i32 14736, label %7
i32 8453, label %7
i32 8455, label %7
i32 5968, label %7
]
6: ; preds = %1
br label %7
7: ; preds = %1, %1, %1, %1, %6
%8 = phi ptr [ @dasd_default_erp_action, %6 ], [ @dasd_3990_erp_action, %1 ], [ @dasd_3990_erp_action, %1 ], [ @dasd_3990_erp_action, %1 ], [ @dasd_3990_erp_action, %1 ]
%9 = load i32, ptr %8, align 4, !tbaa !17
ret i32 %9
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"dasd_ccw_req", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"dasd_device", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !16, i64 0}
!14 = !{!"ccw_device", !15, i64 0}
!15 = !{!"TYPE_2__", !16, i64 0}
!16 = !{!"int", !8, i64 0}
!17 = !{!16, !16, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/block/extr_dasd_eckd.c_dasd_eckd_erp_action.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/block/extr_dasd_eckd.c_dasd_eckd_erp_action.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@dasd_3990_erp_action = common local_unnamed_addr global i32 0, align 4
@dasd_default_erp_action = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @dasd_eckd_erp_action], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @dasd_eckd_erp_action(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = inttoptr i64 %2 to ptr
%4 = load ptr, ptr %3, align 8, !tbaa !11
%5 = load i32, ptr %4, align 4, !tbaa !14
switch i32 %5, label %6 [
i32 14736, label %7
i32 8453, label %7
i32 8455, label %7
i32 5968, label %7
]
6: ; preds = %1
br label %7
7: ; preds = %1, %1, %1, %1, %6
%8 = phi ptr [ @dasd_default_erp_action, %6 ], [ @dasd_3990_erp_action, %1 ], [ @dasd_3990_erp_action, %1 ], [ @dasd_3990_erp_action, %1 ], [ @dasd_3990_erp_action, %1 ]
%9 = load i32, ptr %8, align 4, !tbaa !18
ret i32 %9
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"dasd_ccw_req", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"dasd_device", !13, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!15, !17, i64 0}
!15 = !{!"ccw_device", !16, i64 0}
!16 = !{!"TYPE_2__", !17, i64 0}
!17 = !{!"int", !9, i64 0}
!18 = !{!17, !17, i64 0}
| fastsocket_kernel_drivers_s390_block_extr_dasd_eckd.c_dasd_eckd_erp_action |
; ModuleID = 'AnghaBench/postgres/src/backend/utils/misc/extr_guc.c_guc_var_compare.c'
source_filename = "AnghaBench/postgres/src/backend/utils/misc/extr_guc.c_guc_var_compare.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @guc_var_compare], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @guc_var_compare(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = load ptr, ptr %1, align 8, !tbaa !5
%5 = load i32, ptr %3, align 4, !tbaa !9
%6 = load i32, ptr %4, align 4, !tbaa !9
%7 = tail call i32 @guc_name_compare(i32 noundef %5, i32 noundef %6) #2
ret i32 %7
}
declare i32 @guc_name_compare(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"config_generic", !11, i64 0}
!11 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/postgres/src/backend/utils/misc/extr_guc.c_guc_var_compare.c'
source_filename = "AnghaBench/postgres/src/backend/utils/misc/extr_guc.c_guc_var_compare.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @guc_var_compare], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @guc_var_compare(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load ptr, ptr %1, align 8, !tbaa !6
%5 = load i32, ptr %3, align 4, !tbaa !10
%6 = load i32, ptr %4, align 4, !tbaa !10
%7 = tail call i32 @guc_name_compare(i32 noundef %5, i32 noundef %6) #2
ret i32 %7
}
declare i32 @guc_name_compare(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"config_generic", !12, i64 0}
!12 = !{!"int", !8, i64 0}
| postgres_src_backend_utils_misc_extr_guc.c_guc_var_compare |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_lo.c_b43_lo_g_init.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_lo.c_b43_lo_g_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @b43_lo_g_init(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i64 @b43_has_hardware_pctl(ptr noundef %0) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @lo_read_power_vector(ptr noundef %0) #2
%6 = tail call i32 @b43_gphy_dc_lt_init(ptr noundef %0, i32 noundef 1) #2
br label %7
7: ; preds = %4, %1
ret void
}
declare i64 @b43_has_hardware_pctl(ptr noundef) local_unnamed_addr #1
declare i32 @lo_read_power_vector(ptr noundef) local_unnamed_addr #1
declare i32 @b43_gphy_dc_lt_init(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_lo.c_b43_lo_g_init.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_lo.c_b43_lo_g_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @b43_lo_g_init(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i64 @b43_has_hardware_pctl(ptr noundef %0) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @lo_read_power_vector(ptr noundef %0) #2
%6 = tail call i32 @b43_gphy_dc_lt_init(ptr noundef %0, i32 noundef 1) #2
br label %7
7: ; preds = %4, %1
ret void
}
declare i64 @b43_has_hardware_pctl(ptr noundef) local_unnamed_addr #1
declare i32 @lo_read_power_vector(ptr noundef) local_unnamed_addr #1
declare i32 @b43_gphy_dc_lt_init(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_net_wireless_broadcom_b43_extr_lo.c_b43_lo_g_init |
; ModuleID = 'AnghaBench/fastsocket/kernel/net/netfilter/extr_nfnetlink_queue.c_nfqnl_rcv_dev_event.c'
source_filename = "AnghaBench/fastsocket/kernel/net/netfilter/extr_nfnetlink_queue.c_nfqnl_rcv_dev_event.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@init_net = dso_local global i32 0, align 4
@NOTIFY_DONE = dso_local local_unnamed_addr global i32 0, align 4
@NETDEV_DOWN = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @nfqnl_rcv_dev_event], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @nfqnl_rcv_dev_event(ptr nocapture readnone %0, i64 noundef %1, ptr noundef %2) #0 {
%4 = tail call i32 @dev_net(ptr noundef %2) #2
%5 = tail call i32 @net_eq(i32 noundef %4, ptr noundef nonnull @init_net) #2
%6 = icmp ne i32 %5, 0
%7 = load i64, ptr @NETDEV_DOWN, align 8
%8 = icmp eq i64 %7, %1
%9 = select i1 %6, i1 %8, i1 false
br i1 %9, label %10, label %13
10: ; preds = %3
%11 = load i32, ptr %2, align 4, !tbaa !5
%12 = tail call i32 @nfqnl_dev_drop(i32 noundef %11) #2
br label %13
13: ; preds = %10, %3
%14 = load i32, ptr @NOTIFY_DONE, align 4, !tbaa !10
ret i32 %14
}
declare i32 @net_eq(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_net(ptr noundef) local_unnamed_addr #1
declare i32 @nfqnl_dev_drop(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"net_device", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/netfilter/extr_nfnetlink_queue.c_nfqnl_rcv_dev_event.c'
source_filename = "AnghaBench/fastsocket/kernel/net/netfilter/extr_nfnetlink_queue.c_nfqnl_rcv_dev_event.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@init_net = common global i32 0, align 4
@NOTIFY_DONE = common local_unnamed_addr global i32 0, align 4
@NETDEV_DOWN = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @nfqnl_rcv_dev_event], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @nfqnl_rcv_dev_event(ptr nocapture readnone %0, i64 noundef %1, ptr noundef %2) #0 {
%4 = tail call i32 @dev_net(ptr noundef %2) #2
%5 = tail call i32 @net_eq(i32 noundef %4, ptr noundef nonnull @init_net) #2
%6 = icmp ne i32 %5, 0
%7 = load i64, ptr @NETDEV_DOWN, align 8
%8 = icmp eq i64 %7, %1
%9 = select i1 %6, i1 %8, i1 false
br i1 %9, label %10, label %13
10: ; preds = %3
%11 = load i32, ptr %2, align 4, !tbaa !6
%12 = tail call i32 @nfqnl_dev_drop(i32 noundef %11) #2
br label %13
13: ; preds = %10, %3
%14 = load i32, ptr @NOTIFY_DONE, align 4, !tbaa !11
ret i32 %14
}
declare i32 @net_eq(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_net(ptr noundef) local_unnamed_addr #1
declare i32 @nfqnl_dev_drop(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"net_device", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| fastsocket_kernel_net_netfilter_extr_nfnetlink_queue.c_nfqnl_rcv_dev_event |
; ModuleID = 'AnghaBench/freebsd/sys/compat/linux/extr_linux_misc.c_linux_sched_rr_get_interval.c'
source_filename = "AnghaBench/freebsd/sys/compat/linux/extr_linux_misc.c_linux_sched_rr_get_interval.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.timespec = type { i32 }
%struct.l_timespec = type { i32 }
%struct.linux_sched_rr_get_interval_args = type { i64, i32 }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@ESRCH = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @linux_sched_rr_get_interval(ptr noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = alloca %struct.timespec, align 4
%4 = alloca %struct.l_timespec, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%5 = load i64, ptr %1, align 8, !tbaa !5
%6 = icmp slt i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = load i32, ptr @EINVAL, align 4, !tbaa !11
br label %26
9: ; preds = %2
%10 = tail call ptr @linux_tdfind(ptr noundef %0, i64 noundef %5, i32 noundef -1) #3
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %14
12: ; preds = %9
%13 = load i32, ptr @ESRCH, align 4, !tbaa !11
br label %26
14: ; preds = %9
%15 = call i32 @kern_sched_rr_get_interval_td(ptr noundef %0, ptr noundef nonnull %10, ptr noundef nonnull %3) #3
%16 = load i32, ptr %10, align 4, !tbaa !12
%17 = call i32 @PROC_UNLOCK(i32 noundef %16) #3
%18 = icmp eq i32 %15, 0
br i1 %18, label %19, label %26
19: ; preds = %14
%20 = call i32 @native_to_linux_timespec(ptr noundef nonnull %4, ptr noundef nonnull %3) #3
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %26
22: ; preds = %19
%23 = getelementptr inbounds %struct.linux_sched_rr_get_interval_args, ptr %1, i64 0, i32 1
%24 = load i32, ptr %23, align 8, !tbaa !14
%25 = call i32 @copyout(ptr noundef nonnull %4, i32 noundef %24, i32 noundef 4) #3
br label %26
26: ; preds = %19, %14, %22, %12, %7
%27 = phi i32 [ %8, %7 ], [ %13, %12 ], [ %25, %22 ], [ %15, %14 ], [ %20, %19 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %27
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @linux_tdfind(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @kern_sched_rr_get_interval_td(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @PROC_UNLOCK(i32 noundef) local_unnamed_addr #2
declare i32 @native_to_linux_timespec(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @copyout(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"linux_sched_rr_get_interval_args", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!13, !10, i64 0}
!13 = !{!"thread", !10, i64 0}
!14 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/freebsd/sys/compat/linux/extr_linux_misc.c_linux_sched_rr_get_interval.c'
source_filename = "AnghaBench/freebsd/sys/compat/linux/extr_linux_misc.c_linux_sched_rr_get_interval.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.timespec = type { i32 }
%struct.l_timespec = type { i32 }
@EINVAL = common local_unnamed_addr global i32 0, align 4
@ESRCH = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @linux_sched_rr_get_interval(ptr noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = alloca %struct.timespec, align 4
%4 = alloca %struct.l_timespec, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%5 = load i64, ptr %1, align 8, !tbaa !6
%6 = icmp slt i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = load i32, ptr @EINVAL, align 4, !tbaa !12
br label %26
9: ; preds = %2
%10 = tail call ptr @linux_tdfind(ptr noundef %0, i64 noundef %5, i32 noundef -1) #3
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %14
12: ; preds = %9
%13 = load i32, ptr @ESRCH, align 4, !tbaa !12
br label %26
14: ; preds = %9
%15 = call i32 @kern_sched_rr_get_interval_td(ptr noundef %0, ptr noundef nonnull %10, ptr noundef nonnull %3) #3
%16 = load i32, ptr %10, align 4, !tbaa !13
%17 = call i32 @PROC_UNLOCK(i32 noundef %16) #3
%18 = icmp eq i32 %15, 0
br i1 %18, label %19, label %26
19: ; preds = %14
%20 = call i32 @native_to_linux_timespec(ptr noundef nonnull %4, ptr noundef nonnull %3) #3
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %26
22: ; preds = %19
%23 = getelementptr inbounds i8, ptr %1, i64 8
%24 = load i32, ptr %23, align 8, !tbaa !15
%25 = call i32 @copyout(ptr noundef nonnull %4, i32 noundef %24, i32 noundef 4) #3
br label %26
26: ; preds = %19, %14, %22, %12, %7
%27 = phi i32 [ %8, %7 ], [ %13, %12 ], [ %25, %22 ], [ %15, %14 ], [ %20, %19 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %27
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @linux_tdfind(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @kern_sched_rr_get_interval_td(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @PROC_UNLOCK(i32 noundef) local_unnamed_addr #2
declare i32 @native_to_linux_timespec(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @copyout(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"linux_sched_rr_get_interval_args", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"thread", !11, i64 0}
!15 = !{!7, !11, i64 8}
| freebsd_sys_compat_linux_extr_linux_misc.c_linux_sched_rr_get_interval |
; ModuleID = 'AnghaBench/Provenance/Cores/Atari800/atari800-src/extr_votrax.c_Votrax_Update.c'
source_filename = "AnghaBench/Provenance/Cores/Atari800/atari800-src/extr_votrax.c_Votrax_Update.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, i32, i32, i32, i64, i32, i32, i64, ptr }
%struct.TYPE_6__ = type { i64, ptr, ptr }
@votraxsc01_locals = dso_local local_unnamed_addr global %struct.TYPE_5__ zeroinitializer, align 8
@PhonemeData = dso_local local_unnamed_addr global ptr null, align 8
@PT_VS = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local void @Votrax_Update(i32 noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = icmp eq i32 %2, 0
br i1 %4, label %88, label %5
5: ; preds = %3, %83
%6 = phi i32 [ %86, %83 ], [ %2, %3 ]
%7 = phi ptr [ %84, %83 ], [ %1, %3 ]
%8 = load i32, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 1), align 4
%9 = icmp eq i32 %8, 0
br i1 %9, label %18, label %10
10: ; preds = %5
%11 = tail call i32 @llvm.smin.i32(i32 %6, i32 %8)
%12 = sext i32 %11 to i64
%13 = shl i32 %11, 2
%14 = tail call i32 @memset(ptr noundef %7, i32 noundef 0, i32 noundef %13) #3
%15 = getelementptr inbounds i32, ptr %7, i64 %12
%16 = load i32, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 1), align 4, !tbaa !5
%17 = sub nsw i32 %16, %11
store i32 %17, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 1), align 4, !tbaa !5
br label %83
18: ; preds = %5
%19 = load i32, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 2), align 8
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %72
21: ; preds = %18
%22 = load i64, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 7), align 8, !tbaa !12
%23 = icmp eq i64 %22, 0
br i1 %23, label %30, label %24
24: ; preds = %21
store i64 0, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 7), align 8, !tbaa !12
%25 = load ptr, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 8), align 8, !tbaa !13
%26 = load ptr, ptr %25, align 8, !tbaa !14
%27 = icmp eq ptr %26, null
br i1 %27, label %30, label %28
28: ; preds = %24
%29 = tail call i32 %26(i64 noundef 0) #3
br label %30
30: ; preds = %24, %28, %21
%31 = load i32, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 3), align 4
%32 = icmp eq i32 %31, 0
br i1 %32, label %35, label %33
33: ; preds = %30
%34 = load i32, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 5), align 8, !tbaa !16
br label %60
35: ; preds = %30
%36 = load ptr, ptr @PhonemeData, align 8, !tbaa !17
%37 = load i64, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 4), align 8, !tbaa !18
%38 = getelementptr inbounds %struct.TYPE_6__, ptr %36, i64 %37
%39 = load i64, ptr %38, align 8, !tbaa !19
%40 = load i64, ptr @PT_VS, align 8, !tbaa !21
%41 = icmp slt i64 %39, %40
br i1 %41, label %49, label %42
42: ; preds = %35
%43 = getelementptr inbounds %struct.TYPE_6__, ptr %36, i64 63, i32 1
%44 = load ptr, ptr %43, align 8, !tbaa !22
%45 = load i32, ptr %44, align 4, !tbaa !23
store i32 %45, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 5), align 8, !tbaa !16
%46 = getelementptr inbounds %struct.TYPE_6__, ptr %36, i64 63, i32 2
%47 = load ptr, ptr %46, align 8, !tbaa !24
%48 = load i32, ptr %47, align 4, !tbaa !23
store i32 %48, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 3), align 4, !tbaa !25
br label %60
49: ; preds = %35
%50 = getelementptr inbounds %struct.TYPE_6__, ptr %36, i64 %37, i32 1
%51 = load ptr, ptr %50, align 8, !tbaa !22
%52 = load i32, ptr @votraxsc01_locals, align 8, !tbaa !26
%53 = sext i32 %52 to i64
%54 = getelementptr inbounds i32, ptr %51, i64 %53
%55 = load i32, ptr %54, align 4, !tbaa !23
store i32 %55, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 5), align 8, !tbaa !16
%56 = getelementptr inbounds %struct.TYPE_6__, ptr %36, i64 %37, i32 2
%57 = load ptr, ptr %56, align 8, !tbaa !24
%58 = getelementptr inbounds i32, ptr %57, i64 %53
%59 = load i32, ptr %58, align 4, !tbaa !23
store i32 %59, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 3), align 4, !tbaa !25
br label %60
60: ; preds = %33, %42, %49
%61 = phi i32 [ %45, %42 ], [ %55, %49 ], [ %34, %33 ]
%62 = phi i32 [ %48, %42 ], [ %59, %49 ], [ %31, %33 ]
%63 = tail call i32 @llvm.smin.i32(i32 %6, i32 %62)
%64 = sext i32 %63 to i64
%65 = shl i32 %63, 2
%66 = tail call i32 @memcpy(ptr noundef %7, i32 noundef %61, i32 noundef %65) #3
%67 = getelementptr inbounds i32, ptr %7, i64 %64
%68 = load i32, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 5), align 8, !tbaa !16
%69 = add nsw i32 %68, %63
store i32 %69, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 5), align 8, !tbaa !16
%70 = load i32, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 3), align 4, !tbaa !25
%71 = sub nsw i32 %70, %63
store i32 %71, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 3), align 4, !tbaa !25
br label %83
72: ; preds = %18
%73 = tail call i32 @llvm.smin.i32(i32 %6, i32 %19)
%74 = load i32, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 6), align 4, !tbaa !27
%75 = sext i32 %73 to i64
%76 = shl i32 %73, 2
%77 = tail call i32 @memcpy(ptr noundef %7, i32 noundef %74, i32 noundef %76) #3
%78 = getelementptr inbounds i32, ptr %7, i64 %75
%79 = load i32, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 6), align 4, !tbaa !27
%80 = add nsw i32 %79, %73
store i32 %80, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 6), align 4, !tbaa !27
%81 = load i32, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 2), align 8, !tbaa !28
%82 = sub nsw i32 %81, %73
store i32 %82, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @votraxsc01_locals, i64 0, i32 2), align 8, !tbaa !28
br label %83
83: ; preds = %60, %72, %10
%84 = phi ptr [ %15, %10 ], [ %67, %60 ], [ %78, %72 ]
%85 = phi i32 [ %11, %10 ], [ %63, %60 ], [ %73, %72 ]
%86 = sub nsw i32 %6, %85
%87 = icmp eq i32 %86, 0
br i1 %87, label %88, label %5, !llvm.loop !29
88: ; preds = %83, %3
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"TYPE_5__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !10, i64 16, !7, i64 24, !7, i64 28, !10, i64 32, !11, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!6, !10, i64 32}
!13 = !{!6, !11, i64 40}
!14 = !{!15, !11, i64 0}
!15 = !{!"TYPE_4__", !11, i64 0}
!16 = !{!6, !7, i64 24}
!17 = !{!11, !11, i64 0}
!18 = !{!6, !10, i64 16}
!19 = !{!20, !10, i64 0}
!20 = !{!"TYPE_6__", !10, i64 0, !11, i64 8, !11, i64 16}
!21 = !{!10, !10, i64 0}
!22 = !{!20, !11, i64 8}
!23 = !{!7, !7, i64 0}
!24 = !{!20, !11, i64 16}
!25 = !{!6, !7, i64 12}
!26 = !{!6, !7, i64 0}
!27 = !{!6, !7, i64 28}
!28 = !{!6, !7, i64 8}
!29 = distinct !{!29, !30}
!30 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/Provenance/Cores/Atari800/atari800-src/extr_votrax.c_Votrax_Update.c'
source_filename = "AnghaBench/Provenance/Cores/Atari800/atari800-src/extr_votrax.c_Votrax_Update.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_5__ = type { i32, i32, i32, i32, i64, i32, i32, i64, ptr }
%struct.TYPE_6__ = type { i64, ptr, ptr }
@votraxsc01_locals = common local_unnamed_addr global %struct.TYPE_5__ zeroinitializer, align 8
@PhonemeData = common local_unnamed_addr global ptr null, align 8
@PT_VS = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @Votrax_Update(i32 noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = icmp eq i32 %2, 0
br i1 %4, label %88, label %5
5: ; preds = %3, %83
%6 = phi i32 [ %86, %83 ], [ %2, %3 ]
%7 = phi ptr [ %84, %83 ], [ %1, %3 ]
%8 = load i32, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 4), align 4
%9 = icmp eq i32 %8, 0
br i1 %9, label %18, label %10
10: ; preds = %5
%11 = tail call i32 @llvm.smin.i32(i32 %6, i32 %8)
%12 = sext i32 %11 to i64
%13 = shl i32 %11, 2
%14 = tail call i32 @memset(ptr noundef %7, i32 noundef 0, i32 noundef %13) #3
%15 = getelementptr inbounds i32, ptr %7, i64 %12
%16 = load i32, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 4), align 4, !tbaa !6
%17 = sub nsw i32 %16, %11
store i32 %17, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 4), align 4, !tbaa !6
br label %83
18: ; preds = %5
%19 = load i32, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 8), align 8
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %72
21: ; preds = %18
%22 = load i64, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 32), align 8, !tbaa !13
%23 = icmp eq i64 %22, 0
br i1 %23, label %30, label %24
24: ; preds = %21
store i64 0, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 32), align 8, !tbaa !13
%25 = load ptr, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 40), align 8, !tbaa !14
%26 = load ptr, ptr %25, align 8, !tbaa !15
%27 = icmp eq ptr %26, null
br i1 %27, label %30, label %28
28: ; preds = %24
%29 = tail call i32 %26(i64 noundef 0) #3
br label %30
30: ; preds = %24, %28, %21
%31 = load i32, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 12), align 4
%32 = icmp eq i32 %31, 0
br i1 %32, label %35, label %33
33: ; preds = %30
%34 = load i32, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 24), align 8, !tbaa !17
br label %60
35: ; preds = %30
%36 = load ptr, ptr @PhonemeData, align 8, !tbaa !18
%37 = load i64, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 16), align 8, !tbaa !19
%38 = getelementptr inbounds %struct.TYPE_6__, ptr %36, i64 %37
%39 = load i64, ptr %38, align 8, !tbaa !20
%40 = load i64, ptr @PT_VS, align 8, !tbaa !22
%41 = icmp slt i64 %39, %40
br i1 %41, label %49, label %42
42: ; preds = %35
%43 = getelementptr inbounds i8, ptr %36, i64 1520
%44 = load ptr, ptr %43, align 8, !tbaa !23
%45 = load i32, ptr %44, align 4, !tbaa !24
store i32 %45, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 24), align 8, !tbaa !17
%46 = getelementptr inbounds i8, ptr %36, i64 1528
%47 = load ptr, ptr %46, align 8, !tbaa !25
%48 = load i32, ptr %47, align 4, !tbaa !24
store i32 %48, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 12), align 4, !tbaa !26
br label %60
49: ; preds = %35
%50 = getelementptr inbounds i8, ptr %38, i64 8
%51 = load ptr, ptr %50, align 8, !tbaa !23
%52 = load i32, ptr @votraxsc01_locals, align 8, !tbaa !27
%53 = sext i32 %52 to i64
%54 = getelementptr inbounds i32, ptr %51, i64 %53
%55 = load i32, ptr %54, align 4, !tbaa !24
store i32 %55, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 24), align 8, !tbaa !17
%56 = getelementptr inbounds %struct.TYPE_6__, ptr %36, i64 %37, i32 2
%57 = load ptr, ptr %56, align 8, !tbaa !25
%58 = getelementptr inbounds i32, ptr %57, i64 %53
%59 = load i32, ptr %58, align 4, !tbaa !24
store i32 %59, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 12), align 4, !tbaa !26
br label %60
60: ; preds = %33, %42, %49
%61 = phi i32 [ %45, %42 ], [ %55, %49 ], [ %34, %33 ]
%62 = phi i32 [ %48, %42 ], [ %59, %49 ], [ %31, %33 ]
%63 = tail call i32 @llvm.smin.i32(i32 %6, i32 %62)
%64 = sext i32 %63 to i64
%65 = shl i32 %63, 2
%66 = tail call i32 @memcpy(ptr noundef %7, i32 noundef %61, i32 noundef %65) #3
%67 = getelementptr inbounds i32, ptr %7, i64 %64
%68 = load i32, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 24), align 8, !tbaa !17
%69 = add nsw i32 %68, %63
store i32 %69, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 24), align 8, !tbaa !17
%70 = load i32, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 12), align 4, !tbaa !26
%71 = sub nsw i32 %70, %63
store i32 %71, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 12), align 4, !tbaa !26
br label %83
72: ; preds = %18
%73 = tail call i32 @llvm.smin.i32(i32 %6, i32 %19)
%74 = load i32, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 28), align 4, !tbaa !28
%75 = sext i32 %73 to i64
%76 = shl i32 %73, 2
%77 = tail call i32 @memcpy(ptr noundef %7, i32 noundef %74, i32 noundef %76) #3
%78 = getelementptr inbounds i32, ptr %7, i64 %75
%79 = load i32, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 28), align 4, !tbaa !28
%80 = add nsw i32 %79, %73
store i32 %80, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 28), align 4, !tbaa !28
%81 = load i32, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 8), align 8, !tbaa !29
%82 = sub nsw i32 %81, %73
store i32 %82, ptr getelementptr inbounds (i8, ptr @votraxsc01_locals, i64 8), align 8, !tbaa !29
br label %83
83: ; preds = %60, %72, %10
%84 = phi ptr [ %15, %10 ], [ %67, %60 ], [ %78, %72 ]
%85 = phi i32 [ %11, %10 ], [ %63, %60 ], [ %73, %72 ]
%86 = sub nsw i32 %6, %85
%87 = icmp eq i32 %86, 0
br i1 %87, label %88, label %5, !llvm.loop !30
88: ; preds = %83, %3
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"TYPE_5__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !11, i64 16, !8, i64 24, !8, i64 28, !11, i64 32, !12, i64 40}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!7, !11, i64 32}
!14 = !{!7, !12, i64 40}
!15 = !{!16, !12, i64 0}
!16 = !{!"TYPE_4__", !12, i64 0}
!17 = !{!7, !8, i64 24}
!18 = !{!12, !12, i64 0}
!19 = !{!7, !11, i64 16}
!20 = !{!21, !11, i64 0}
!21 = !{!"TYPE_6__", !11, i64 0, !12, i64 8, !12, i64 16}
!22 = !{!11, !11, i64 0}
!23 = !{!21, !12, i64 8}
!24 = !{!8, !8, i64 0}
!25 = !{!21, !12, i64 16}
!26 = !{!7, !8, i64 12}
!27 = !{!7, !8, i64 0}
!28 = !{!7, !8, i64 28}
!29 = !{!7, !8, i64 8}
!30 = distinct !{!30, !31}
!31 = !{!"llvm.loop.mustprogress"}
| Provenance_Cores_Atari800_atari800-src_extr_votrax.c_Votrax_Update |
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_base/extr_dag.c_txn_body_dag_init_fs.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_base/extr_dag.c_txn_body_dag_init_fs.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_29__ = type { ptr, i32 }
%struct.TYPE_28__ = type { ptr }
%struct.TYPE_26__ = type { i32, i32 }
%struct.TYPE_25__ = type { i32, ptr }
@SVN_INVALID_REVNUM = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [2 x i8] c"0\00", align 1
@svn_node_dir = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [2 x i8] c"/\00", align 1
@SVN_ERR_FS_CORRUPT = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [62 x i8] c"Corrupt DB: initial transaction id not '0' in filesystem '%s'\00", align 1
@.str.3 = private unnamed_addr constant [55 x i8] c"Corrupt DB: initial copy id not '0' in filesystem '%s'\00", align 1
@copy_kind_real = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [66 x i8] c"Corrupt DB: initial revision number is not '0' in filesystem '%s'\00", align 1
@SVN_PROP_REVISION_DATE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @txn_body_dag_init_fs], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @txn_body_dag_init_fs(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = alloca %struct.TYPE_29__, align 8
%4 = alloca %struct.TYPE_28__, align 8
%5 = alloca i64, align 8
%6 = alloca %struct.TYPE_26__, align 4
%7 = alloca ptr, align 8
%8 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%9 = load i64, ptr @SVN_INVALID_REVNUM, align 8, !tbaa !5
store i64 %9, ptr %5, align 8, !tbaa !5
%10 = getelementptr inbounds %struct.TYPE_25__, ptr %1, i64 0, i32 1
%11 = load ptr, ptr %10, align 8, !tbaa !9
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #3
%12 = load i32, ptr %1, align 8, !tbaa !13
%13 = tail call ptr @svn_fs_base__id_create(ptr noundef nonnull @.str, ptr noundef nonnull @.str, ptr noundef nonnull @.str, i32 noundef %12) #3
%14 = call i32 @memset(ptr noundef nonnull %3, i32 noundef 0, i32 noundef 16) #3
%15 = load i32, ptr @svn_node_dir, align 4, !tbaa !14
%16 = getelementptr inbounds %struct.TYPE_29__, ptr %3, i64 0, i32 1
store i32 %15, ptr %16, align 8, !tbaa !15
store ptr @.str.1, ptr %3, align 8, !tbaa !17
%17 = load i32, ptr %1, align 8, !tbaa !13
%18 = call i32 @svn_fs_bdb__put_node_revision(ptr noundef %11, ptr noundef %13, ptr noundef nonnull %3, ptr noundef nonnull %1, i32 noundef %17) #3
%19 = call i32 @SVN_ERR(i32 noundef %18) #3
%20 = load i32, ptr %1, align 8, !tbaa !13
%21 = call i32 @svn_fs_bdb__create_txn(ptr noundef nonnull %7, ptr noundef %11, ptr noundef %13, ptr noundef nonnull %1, i32 noundef %20) #3
%22 = call i32 @SVN_ERR(i32 noundef %21) #3
%23 = load ptr, ptr %7, align 8, !tbaa !18
%24 = call i64 @strcmp(ptr noundef %23, ptr noundef nonnull @.str) #3
%25 = icmp eq i64 %24, 0
br i1 %25, label %31, label %26
26: ; preds = %2
%27 = load i32, ptr @SVN_ERR_FS_CORRUPT, align 4, !tbaa !14
%28 = call i32 @_(ptr noundef nonnull @.str.2) #3
%29 = load i32, ptr %11, align 4, !tbaa !19
%30 = call ptr @svn_error_createf(i32 noundef %27, i32 noundef 0, i32 noundef %28, i32 noundef %29) #3
br label %73
31: ; preds = %2
%32 = load i32, ptr %1, align 8, !tbaa !13
%33 = call i32 @svn_fs_bdb__reserve_copy_id(ptr noundef nonnull %8, ptr noundef %11, ptr noundef nonnull %1, i32 noundef %32) #3
%34 = call i32 @SVN_ERR(i32 noundef %33) #3
%35 = load ptr, ptr %8, align 8, !tbaa !18
%36 = call i64 @strcmp(ptr noundef %35, ptr noundef nonnull @.str) #3
%37 = icmp eq i64 %36, 0
br i1 %37, label %43, label %38
38: ; preds = %31
%39 = load i32, ptr @SVN_ERR_FS_CORRUPT, align 4, !tbaa !14
%40 = call i32 @_(ptr noundef nonnull @.str.3) #3
%41 = load i32, ptr %11, align 4, !tbaa !19
%42 = call ptr @svn_error_createf(i32 noundef %39, i32 noundef 0, i32 noundef %40, i32 noundef %41) #3
br label %73
43: ; preds = %31
%44 = load ptr, ptr %8, align 8, !tbaa !18
%45 = load i32, ptr @copy_kind_real, align 4, !tbaa !14
%46 = load i32, ptr %1, align 8, !tbaa !13
%47 = call i32 @svn_fs_bdb__create_copy(ptr noundef %11, ptr noundef %44, ptr noundef null, ptr noundef null, ptr noundef %13, i32 noundef %45, ptr noundef nonnull %1, i32 noundef %46) #3
%48 = call i32 @SVN_ERR(i32 noundef %47) #3
%49 = load ptr, ptr %7, align 8, !tbaa !18
store ptr %49, ptr %4, align 8, !tbaa !21
%50 = load i32, ptr %1, align 8, !tbaa !13
%51 = call i32 @svn_fs_bdb__put_rev(ptr noundef nonnull %5, ptr noundef %11, ptr noundef nonnull %4, ptr noundef nonnull %1, i32 noundef %50) #3
%52 = call i32 @SVN_ERR(i32 noundef %51) #3
%53 = load i64, ptr %5, align 8, !tbaa !5
%54 = icmp eq i64 %53, 0
br i1 %54, label %60, label %55
55: ; preds = %43
%56 = load i32, ptr @SVN_ERR_FS_CORRUPT, align 4, !tbaa !14
%57 = call i32 @_(ptr noundef nonnull @.str.4) #3
%58 = load i32, ptr %11, align 4, !tbaa !19
%59 = call ptr @svn_error_createf(i32 noundef %56, i32 noundef 0, i32 noundef %57, i32 noundef %58) #3
br label %73
60: ; preds = %43
%61 = load ptr, ptr %7, align 8, !tbaa !18
%62 = load i32, ptr %1, align 8, !tbaa !13
%63 = call i32 @svn_fs_base__txn_make_committed(ptr noundef %11, ptr noundef %61, i64 noundef 0, ptr noundef nonnull %1, i32 noundef %62) #3
%64 = call i32 @SVN_ERR(i32 noundef %63) #3
%65 = call i32 (...) @apr_time_now() #3
%66 = load i32, ptr %1, align 8, !tbaa !13
%67 = call i32 @svn_time_to_cstring(i32 noundef %65, i32 noundef %66) #3
store i32 %67, ptr %6, align 4, !tbaa !23
%68 = call i32 @strlen(i32 noundef %67) #3
%69 = getelementptr inbounds %struct.TYPE_26__, ptr %6, i64 0, i32 1
store i32 %68, ptr %69, align 4, !tbaa !25
%70 = load i32, ptr @SVN_PROP_REVISION_DATE, align 4, !tbaa !14
%71 = load i32, ptr %1, align 8, !tbaa !13
%72 = call ptr @svn_fs_base__set_rev_prop(ptr noundef %11, i32 noundef 0, i32 noundef %70, ptr noundef null, ptr noundef nonnull %6, ptr noundef nonnull %1, i32 noundef %71) #3
br label %73
73: ; preds = %60, %55, %38, %26
%74 = phi ptr [ %30, %26 ], [ %42, %38 ], [ %59, %55 ], [ %72, %60 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #3
ret ptr %74
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @svn_fs_base__id_create(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @SVN_ERR(i32 noundef) local_unnamed_addr #2
declare i32 @svn_fs_bdb__put_node_revision(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @svn_fs_bdb__create_txn(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @svn_error_createf(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @_(ptr noundef) local_unnamed_addr #2
declare i32 @svn_fs_bdb__reserve_copy_id(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @svn_fs_bdb__create_copy(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @svn_fs_bdb__put_rev(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @svn_fs_base__txn_make_committed(ptr noundef, ptr noundef, i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @svn_time_to_cstring(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @apr_time_now(...) local_unnamed_addr #2
declare i32 @strlen(i32 noundef) local_unnamed_addr #2
declare ptr @svn_fs_base__set_rev_prop(ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 8}
!10 = !{!"TYPE_25__", !11, i64 0, !12, i64 8}
!11 = !{!"int", !7, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!10, !11, i64 0}
!14 = !{!11, !11, i64 0}
!15 = !{!16, !11, i64 8}
!16 = !{!"TYPE_29__", !12, i64 0, !11, i64 8}
!17 = !{!16, !12, i64 0}
!18 = !{!12, !12, i64 0}
!19 = !{!20, !11, i64 0}
!20 = !{!"TYPE_27__", !11, i64 0}
!21 = !{!22, !12, i64 0}
!22 = !{!"TYPE_28__", !12, i64 0}
!23 = !{!24, !11, i64 0}
!24 = !{!"TYPE_26__", !11, i64 0, !11, i64 4}
!25 = !{!24, !11, i64 4}
| ; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_base/extr_dag.c_txn_body_dag_init_fs.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_base/extr_dag.c_txn_body_dag_init_fs.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_29__ = type { ptr, i32 }
%struct.TYPE_28__ = type { ptr }
%struct.TYPE_26__ = type { i32, i32 }
@SVN_INVALID_REVNUM = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [2 x i8] c"0\00", align 1
@svn_node_dir = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [2 x i8] c"/\00", align 1
@SVN_ERR_FS_CORRUPT = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [62 x i8] c"Corrupt DB: initial transaction id not '0' in filesystem '%s'\00", align 1
@.str.3 = private unnamed_addr constant [55 x i8] c"Corrupt DB: initial copy id not '0' in filesystem '%s'\00", align 1
@copy_kind_real = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [66 x i8] c"Corrupt DB: initial revision number is not '0' in filesystem '%s'\00", align 1
@SVN_PROP_REVISION_DATE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @txn_body_dag_init_fs], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @txn_body_dag_init_fs(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = alloca %struct.TYPE_29__, align 8
%4 = alloca %struct.TYPE_28__, align 8
%5 = alloca i64, align 8
%6 = alloca %struct.TYPE_26__, align 4
%7 = alloca ptr, align 8
%8 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%9 = load i64, ptr @SVN_INVALID_REVNUM, align 8, !tbaa !6
store i64 %9, ptr %5, align 8, !tbaa !6
%10 = getelementptr inbounds i8, ptr %1, i64 8
%11 = load ptr, ptr %10, align 8, !tbaa !10
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #3
%12 = load i32, ptr %1, align 8, !tbaa !14
%13 = tail call ptr @svn_fs_base__id_create(ptr noundef nonnull @.str, ptr noundef nonnull @.str, ptr noundef nonnull @.str, i32 noundef %12) #3
%14 = call i32 @memset(ptr noundef nonnull %3, i32 noundef 0, i32 noundef 16) #3
%15 = load i32, ptr @svn_node_dir, align 4, !tbaa !15
%16 = getelementptr inbounds i8, ptr %3, i64 8
store i32 %15, ptr %16, align 8, !tbaa !16
store ptr @.str.1, ptr %3, align 8, !tbaa !18
%17 = load i32, ptr %1, align 8, !tbaa !14
%18 = call i32 @svn_fs_bdb__put_node_revision(ptr noundef %11, ptr noundef %13, ptr noundef nonnull %3, ptr noundef nonnull %1, i32 noundef %17) #3
%19 = call i32 @SVN_ERR(i32 noundef %18) #3
%20 = load i32, ptr %1, align 8, !tbaa !14
%21 = call i32 @svn_fs_bdb__create_txn(ptr noundef nonnull %7, ptr noundef %11, ptr noundef %13, ptr noundef nonnull %1, i32 noundef %20) #3
%22 = call i32 @SVN_ERR(i32 noundef %21) #3
%23 = load ptr, ptr %7, align 8, !tbaa !19
%24 = call i64 @strcmp(ptr noundef %23, ptr noundef nonnull @.str) #3
%25 = icmp eq i64 %24, 0
br i1 %25, label %31, label %26
26: ; preds = %2
%27 = load i32, ptr @SVN_ERR_FS_CORRUPT, align 4, !tbaa !15
%28 = call i32 @_(ptr noundef nonnull @.str.2) #3
%29 = load i32, ptr %11, align 4, !tbaa !20
%30 = call ptr @svn_error_createf(i32 noundef %27, i32 noundef 0, i32 noundef %28, i32 noundef %29) #3
br label %73
31: ; preds = %2
%32 = load i32, ptr %1, align 8, !tbaa !14
%33 = call i32 @svn_fs_bdb__reserve_copy_id(ptr noundef nonnull %8, ptr noundef %11, ptr noundef nonnull %1, i32 noundef %32) #3
%34 = call i32 @SVN_ERR(i32 noundef %33) #3
%35 = load ptr, ptr %8, align 8, !tbaa !19
%36 = call i64 @strcmp(ptr noundef %35, ptr noundef nonnull @.str) #3
%37 = icmp eq i64 %36, 0
br i1 %37, label %43, label %38
38: ; preds = %31
%39 = load i32, ptr @SVN_ERR_FS_CORRUPT, align 4, !tbaa !15
%40 = call i32 @_(ptr noundef nonnull @.str.3) #3
%41 = load i32, ptr %11, align 4, !tbaa !20
%42 = call ptr @svn_error_createf(i32 noundef %39, i32 noundef 0, i32 noundef %40, i32 noundef %41) #3
br label %73
43: ; preds = %31
%44 = load ptr, ptr %8, align 8, !tbaa !19
%45 = load i32, ptr @copy_kind_real, align 4, !tbaa !15
%46 = load i32, ptr %1, align 8, !tbaa !14
%47 = call i32 @svn_fs_bdb__create_copy(ptr noundef %11, ptr noundef %44, ptr noundef null, ptr noundef null, ptr noundef %13, i32 noundef %45, ptr noundef nonnull %1, i32 noundef %46) #3
%48 = call i32 @SVN_ERR(i32 noundef %47) #3
%49 = load ptr, ptr %7, align 8, !tbaa !19
store ptr %49, ptr %4, align 8, !tbaa !22
%50 = load i32, ptr %1, align 8, !tbaa !14
%51 = call i32 @svn_fs_bdb__put_rev(ptr noundef nonnull %5, ptr noundef %11, ptr noundef nonnull %4, ptr noundef nonnull %1, i32 noundef %50) #3
%52 = call i32 @SVN_ERR(i32 noundef %51) #3
%53 = load i64, ptr %5, align 8, !tbaa !6
%54 = icmp eq i64 %53, 0
br i1 %54, label %60, label %55
55: ; preds = %43
%56 = load i32, ptr @SVN_ERR_FS_CORRUPT, align 4, !tbaa !15
%57 = call i32 @_(ptr noundef nonnull @.str.4) #3
%58 = load i32, ptr %11, align 4, !tbaa !20
%59 = call ptr @svn_error_createf(i32 noundef %56, i32 noundef 0, i32 noundef %57, i32 noundef %58) #3
br label %73
60: ; preds = %43
%61 = load ptr, ptr %7, align 8, !tbaa !19
%62 = load i32, ptr %1, align 8, !tbaa !14
%63 = call i32 @svn_fs_base__txn_make_committed(ptr noundef %11, ptr noundef %61, i64 noundef 0, ptr noundef nonnull %1, i32 noundef %62) #3
%64 = call i32 @SVN_ERR(i32 noundef %63) #3
%65 = call i32 @apr_time_now() #3
%66 = load i32, ptr %1, align 8, !tbaa !14
%67 = call i32 @svn_time_to_cstring(i32 noundef %65, i32 noundef %66) #3
store i32 %67, ptr %6, align 4, !tbaa !24
%68 = call i32 @strlen(i32 noundef %67) #3
%69 = getelementptr inbounds i8, ptr %6, i64 4
store i32 %68, ptr %69, align 4, !tbaa !26
%70 = load i32, ptr @SVN_PROP_REVISION_DATE, align 4, !tbaa !15
%71 = load i32, ptr %1, align 8, !tbaa !14
%72 = call ptr @svn_fs_base__set_rev_prop(ptr noundef %11, i32 noundef 0, i32 noundef %70, ptr noundef null, ptr noundef nonnull %6, ptr noundef nonnull %1, i32 noundef %71) #3
br label %73
73: ; preds = %60, %55, %38, %26
%74 = phi ptr [ %30, %26 ], [ %42, %38 ], [ %59, %55 ], [ %72, %60 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #3
ret ptr %74
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @svn_fs_base__id_create(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @SVN_ERR(i32 noundef) local_unnamed_addr #2
declare i32 @svn_fs_bdb__put_node_revision(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @svn_fs_bdb__create_txn(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @svn_error_createf(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @_(ptr noundef) local_unnamed_addr #2
declare i32 @svn_fs_bdb__reserve_copy_id(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @svn_fs_bdb__create_copy(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @svn_fs_bdb__put_rev(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @svn_fs_base__txn_make_committed(ptr noundef, ptr noundef, i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @svn_time_to_cstring(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @apr_time_now(...) local_unnamed_addr #2
declare i32 @strlen(i32 noundef) local_unnamed_addr #2
declare ptr @svn_fs_base__set_rev_prop(ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 8}
!11 = !{!"TYPE_25__", !12, i64 0, !13, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!11, !12, i64 0}
!15 = !{!12, !12, i64 0}
!16 = !{!17, !12, i64 8}
!17 = !{!"TYPE_29__", !13, i64 0, !12, i64 8}
!18 = !{!17, !13, i64 0}
!19 = !{!13, !13, i64 0}
!20 = !{!21, !12, i64 0}
!21 = !{!"TYPE_27__", !12, i64 0}
!22 = !{!23, !13, i64 0}
!23 = !{!"TYPE_28__", !13, i64 0}
!24 = !{!25, !12, i64 0}
!25 = !{!"TYPE_26__", !12, i64 0, !12, i64 4}
!26 = !{!25, !12, i64 4}
| freebsd_contrib_subversion_subversion_libsvn_fs_base_extr_dag.c_txn_body_dag_init_fs |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/core/engine/disp/extr_vga.c_nv_wrvgag.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/core/engine/disp/extr_vga.c_nv_wrvgag.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @nv_wrvgag(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = tail call i32 @nv_wrport(ptr noundef %0, i32 noundef %1, i32 noundef 974, i32 noundef %2) #2
%6 = tail call i32 @nv_wrport(ptr noundef %0, i32 noundef %1, i32 noundef 975, i32 noundef %3) #2
ret void
}
declare i32 @nv_wrport(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/core/engine/disp/extr_vga.c_nv_wrvgag.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/core/engine/disp/extr_vga.c_nv_wrvgag.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @nv_wrvgag(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = tail call i32 @nv_wrport(ptr noundef %0, i32 noundef %1, i32 noundef 974, i32 noundef %2) #2
%6 = tail call i32 @nv_wrport(ptr noundef %0, i32 noundef %1, i32 noundef 975, i32 noundef %3) #2
ret void
}
declare i32 @nv_wrport(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_gpu_drm_nouveau_core_engine_disp_extr_vga.c_nv_wrvgag |
; ModuleID = 'AnghaBench/linux/drivers/staging/isdn/gigaset/extr_asyncdata.c_handle_dle.c'
source_filename = "AnghaBench/linux/drivers/staging/isdn/gigaset/extr_asyncdata.c_handle_dle.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.inbuf_t = type { i32, ptr, i64, i64, ptr }
%struct.cardstate = type { i64, i32, i64 }
@MS_LOCKED = dso_local local_unnamed_addr global i64 0, align 8
@INS_DLE_char = dso_local local_unnamed_addr global i32 0, align 4
@INS_DLE_command = dso_local local_unnamed_addr global i32 0, align 4
@RBUFSIZE = dso_local local_unnamed_addr global i64 0, align 8
@INS_command = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [33 x i8] c"received <DLE>X in command mode\0A\00", align 1
@.str.1 = private unnamed_addr constant [32 x i8] c"received <DLE>. without <DLE>X\0A\00", align 1
@.str.2 = private unnamed_addr constant [37 x i8] c"received <DLE><DLE> not in DLE mode\0A\00", align 1
@.str.3 = private unnamed_addr constant [22 x i8] c"received <DLE><%02x>\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @handle_dle], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @handle_dle(ptr nocapture noundef %0) #0 {
%2 = getelementptr inbounds %struct.inbuf_t, ptr %0, i64 0, i32 4
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load i64, ptr %3, align 8, !tbaa !12
%5 = load i64, ptr @MS_LOCKED, align 8, !tbaa !14
%6 = icmp eq i64 %4, %5
br i1 %6, label %106, label %7
7: ; preds = %1
%8 = load i32, ptr %0, align 8, !tbaa !15
%9 = load i32, ptr @INS_DLE_char, align 4, !tbaa !16
%10 = and i32 %9, %8
%11 = icmp eq i32 %10, 0
%12 = getelementptr inbounds %struct.inbuf_t, ptr %0, i64 0, i32 1
%13 = load ptr, ptr %12, align 8, !tbaa !17
%14 = getelementptr inbounds %struct.inbuf_t, ptr %0, i64 0, i32 2
%15 = load i64, ptr %14, align 8, !tbaa !18
br i1 %11, label %16, label %38
16: ; preds = %7
%17 = getelementptr inbounds i32, ptr %13, i64 %15
%18 = load i32, ptr %17, align 4, !tbaa !16
%19 = icmp eq i32 %18, 128
br i1 %19, label %20, label %106
20: ; preds = %16
%21 = getelementptr inbounds %struct.cardstate, ptr %3, i64 0, i32 2
%22 = load i64, ptr %21, align 8, !tbaa !19
%23 = icmp eq i64 %22, 0
br i1 %23, label %24, label %28
24: ; preds = %20
%25 = load i32, ptr @INS_DLE_command, align 4, !tbaa !16
%26 = and i32 %25, %8
%27 = icmp eq i32 %26, 0
br i1 %27, label %106, label %28
28: ; preds = %24, %20
%29 = add i64 %15, 1
store i64 %29, ptr %14, align 8, !tbaa !18
%30 = getelementptr inbounds %struct.inbuf_t, ptr %0, i64 0, i32 3
%31 = load i64, ptr %30, align 8, !tbaa !20
%32 = icmp eq i64 %29, %31
%33 = load i64, ptr @RBUFSIZE, align 8
%34 = icmp eq i64 %29, %33
%35 = select i1 %32, i1 true, i1 %34
br i1 %35, label %36, label %38
36: ; preds = %28
%37 = or i32 %9, %8
store i32 %37, ptr %0, align 8, !tbaa !15
br label %106
38: ; preds = %7, %28
%39 = phi i64 [ %29, %28 ], [ %15, %7 ]
%40 = xor i32 %9, -1
%41 = and i32 %8, %40
store i32 %41, ptr %0, align 8, !tbaa !15
%42 = getelementptr inbounds %struct.inbuf_t, ptr %0, i64 0, i32 2
%43 = getelementptr inbounds i32, ptr %13, i64 %39
%44 = load i32, ptr %43, align 4, !tbaa !16
switch i32 %44, label %102 [
i32 88, label %45
i32 46, label %63
i32 128, label %88
]
45: ; preds = %38
%46 = load i32, ptr @INS_command, align 4, !tbaa !16
%47 = and i32 %46, %41
%48 = icmp eq i32 %47, 0
br i1 %48, label %55, label %49
49: ; preds = %45
%50 = getelementptr inbounds %struct.cardstate, ptr %3, i64 0, i32 1
%51 = load i32, ptr %50, align 8, !tbaa !21
%52 = tail call i32 (i32, ptr, ...) @dev_notice(i32 noundef %51, ptr noundef nonnull @.str) #2
%53 = load i32, ptr @INS_command, align 4, !tbaa !16
%54 = load i32, ptr %0, align 8, !tbaa !15
br label %55
55: ; preds = %49, %45
%56 = phi i32 [ %54, %49 ], [ %41, %45 ]
%57 = phi i32 [ %53, %49 ], [ %46, %45 ]
%58 = load i32, ptr @INS_DLE_command, align 4, !tbaa !16
%59 = or i32 %58, %57
%60 = or i32 %59, %56
store i32 %60, ptr %0, align 8, !tbaa !15
%61 = load i64, ptr %42, align 8, !tbaa !18
%62 = add i64 %61, 1
store i64 %62, ptr %42, align 8, !tbaa !18
br label %106
63: ; preds = %38
%64 = load i32, ptr @INS_DLE_command, align 4, !tbaa !16
%65 = and i32 %64, %41
%66 = icmp eq i32 %65, 0
br i1 %66, label %67, label %73
67: ; preds = %63
%68 = getelementptr inbounds %struct.cardstate, ptr %3, i64 0, i32 1
%69 = load i32, ptr %68, align 8, !tbaa !21
%70 = tail call i32 (i32, ptr, ...) @dev_notice(i32 noundef %69, ptr noundef nonnull @.str.1) #2
%71 = load i32, ptr @INS_DLE_command, align 4, !tbaa !16
%72 = load i32, ptr %0, align 8, !tbaa !15
br label %73
73: ; preds = %67, %63
%74 = phi i32 [ %72, %67 ], [ %41, %63 ]
%75 = phi i32 [ %71, %67 ], [ %64, %63 ]
%76 = xor i32 %75, -1
%77 = and i32 %74, %76
store i32 %77, ptr %0, align 8, !tbaa !15
%78 = getelementptr inbounds %struct.cardstate, ptr %3, i64 0, i32 2
%79 = load i64, ptr %78, align 8, !tbaa !19
%80 = icmp eq i64 %79, 0
br i1 %80, label %85, label %81
81: ; preds = %73
%82 = load i32, ptr @INS_command, align 4, !tbaa !16
%83 = xor i32 %82, -1
%84 = and i32 %77, %83
store i32 %84, ptr %0, align 8, !tbaa !15
br label %85
85: ; preds = %81, %73
%86 = load i64, ptr %42, align 8, !tbaa !18
%87 = add i64 %86, 1
store i64 %87, ptr %42, align 8, !tbaa !18
br label %106
88: ; preds = %38
%89 = load i32, ptr @INS_DLE_char, align 4, !tbaa !16
%90 = or i32 %89, %41
store i32 %90, ptr %0, align 8, !tbaa !15
%91 = getelementptr inbounds %struct.cardstate, ptr %3, i64 0, i32 2
%92 = load i64, ptr %91, align 8, !tbaa !19
%93 = icmp eq i64 %92, 0
br i1 %93, label %94, label %106
94: ; preds = %88
%95 = load i32, ptr @INS_DLE_command, align 4, !tbaa !16
%96 = and i32 %95, %90
%97 = icmp eq i32 %96, 0
br i1 %97, label %98, label %106
98: ; preds = %94
%99 = getelementptr inbounds %struct.cardstate, ptr %3, i64 0, i32 1
%100 = load i32, ptr %99, align 8, !tbaa !21
%101 = tail call i32 (i32, ptr, ...) @dev_notice(i32 noundef %100, ptr noundef nonnull @.str.2) #2
br label %106
102: ; preds = %38
%103 = getelementptr inbounds %struct.cardstate, ptr %3, i64 0, i32 1
%104 = load i32, ptr %103, align 8, !tbaa !21
%105 = tail call i32 (i32, ptr, ...) @dev_notice(i32 noundef %104, ptr noundef nonnull @.str.3, i32 noundef %44) #2
br label %106
106: ; preds = %55, %85, %102, %98, %94, %88, %16, %24, %1, %36
ret void
}
declare i32 @dev_notice(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 32}
!6 = !{!"inbuf_t", !7, i64 0, !10, i64 8, !11, i64 16, !11, i64 24, !10, i64 32}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"cardstate", !11, i64 0, !7, i64 8, !11, i64 16}
!14 = !{!11, !11, i64 0}
!15 = !{!6, !7, i64 0}
!16 = !{!7, !7, i64 0}
!17 = !{!6, !10, i64 8}
!18 = !{!6, !11, i64 16}
!19 = !{!13, !11, i64 16}
!20 = !{!6, !11, i64 24}
!21 = !{!13, !7, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/staging/isdn/gigaset/extr_asyncdata.c_handle_dle.c'
source_filename = "AnghaBench/linux/drivers/staging/isdn/gigaset/extr_asyncdata.c_handle_dle.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MS_LOCKED = common local_unnamed_addr global i64 0, align 8
@INS_DLE_char = common local_unnamed_addr global i32 0, align 4
@INS_DLE_command = common local_unnamed_addr global i32 0, align 4
@RBUFSIZE = common local_unnamed_addr global i64 0, align 8
@INS_command = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [33 x i8] c"received <DLE>X in command mode\0A\00", align 1
@.str.1 = private unnamed_addr constant [32 x i8] c"received <DLE>. without <DLE>X\0A\00", align 1
@.str.2 = private unnamed_addr constant [37 x i8] c"received <DLE><DLE> not in DLE mode\0A\00", align 1
@.str.3 = private unnamed_addr constant [22 x i8] c"received <DLE><%02x>\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @handle_dle], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @handle_dle(ptr nocapture noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 32
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load i64, ptr %3, align 8, !tbaa !13
%5 = load i64, ptr @MS_LOCKED, align 8, !tbaa !15
%6 = icmp eq i64 %4, %5
br i1 %6, label %105, label %7
7: ; preds = %1
%8 = load i32, ptr %0, align 8, !tbaa !16
%9 = load i32, ptr @INS_DLE_char, align 4, !tbaa !17
%10 = and i32 %9, %8
%11 = icmp eq i32 %10, 0
%12 = getelementptr inbounds i8, ptr %0, i64 8
%13 = load ptr, ptr %12, align 8, !tbaa !18
%14 = getelementptr inbounds i8, ptr %0, i64 16
%15 = load i64, ptr %14, align 8, !tbaa !19
br i1 %11, label %16, label %38
16: ; preds = %7
%17 = getelementptr inbounds i32, ptr %13, i64 %15
%18 = load i32, ptr %17, align 4, !tbaa !17
%19 = icmp eq i32 %18, 128
br i1 %19, label %20, label %105
20: ; preds = %16
%21 = getelementptr inbounds i8, ptr %3, i64 16
%22 = load i64, ptr %21, align 8, !tbaa !20
%23 = icmp eq i64 %22, 0
br i1 %23, label %24, label %28
24: ; preds = %20
%25 = load i32, ptr @INS_DLE_command, align 4, !tbaa !17
%26 = and i32 %25, %8
%27 = icmp eq i32 %26, 0
br i1 %27, label %105, label %28
28: ; preds = %24, %20
%29 = add i64 %15, 1
store i64 %29, ptr %14, align 8, !tbaa !19
%30 = getelementptr inbounds i8, ptr %0, i64 24
%31 = load i64, ptr %30, align 8, !tbaa !21
%32 = icmp eq i64 %29, %31
%33 = load i64, ptr @RBUFSIZE, align 8
%34 = icmp eq i64 %29, %33
%35 = select i1 %32, i1 true, i1 %34
br i1 %35, label %36, label %38
36: ; preds = %28
%37 = or i32 %9, %8
store i32 %37, ptr %0, align 8, !tbaa !16
br label %105
38: ; preds = %7, %28
%39 = phi i64 [ %29, %28 ], [ %15, %7 ]
%40 = xor i32 %9, -1
%41 = and i32 %8, %40
store i32 %41, ptr %0, align 8, !tbaa !16
%42 = getelementptr inbounds i32, ptr %13, i64 %39
%43 = load i32, ptr %42, align 4, !tbaa !17
switch i32 %43, label %101 [
i32 88, label %44
i32 46, label %62
i32 128, label %87
]
44: ; preds = %38
%45 = load i32, ptr @INS_command, align 4, !tbaa !17
%46 = and i32 %45, %41
%47 = icmp eq i32 %46, 0
br i1 %47, label %54, label %48
48: ; preds = %44
%49 = getelementptr inbounds i8, ptr %3, i64 8
%50 = load i32, ptr %49, align 8, !tbaa !22
%51 = tail call i32 (i32, ptr, ...) @dev_notice(i32 noundef %50, ptr noundef nonnull @.str) #2
%52 = load i32, ptr @INS_command, align 4, !tbaa !17
%53 = load i32, ptr %0, align 8, !tbaa !16
br label %54
54: ; preds = %48, %44
%55 = phi i32 [ %53, %48 ], [ %41, %44 ]
%56 = phi i32 [ %52, %48 ], [ %45, %44 ]
%57 = load i32, ptr @INS_DLE_command, align 4, !tbaa !17
%58 = or i32 %57, %56
%59 = or i32 %58, %55
store i32 %59, ptr %0, align 8, !tbaa !16
%60 = load i64, ptr %14, align 8, !tbaa !19
%61 = add i64 %60, 1
store i64 %61, ptr %14, align 8, !tbaa !19
br label %105
62: ; preds = %38
%63 = load i32, ptr @INS_DLE_command, align 4, !tbaa !17
%64 = and i32 %63, %41
%65 = icmp eq i32 %64, 0
br i1 %65, label %66, label %72
66: ; preds = %62
%67 = getelementptr inbounds i8, ptr %3, i64 8
%68 = load i32, ptr %67, align 8, !tbaa !22
%69 = tail call i32 (i32, ptr, ...) @dev_notice(i32 noundef %68, ptr noundef nonnull @.str.1) #2
%70 = load i32, ptr @INS_DLE_command, align 4, !tbaa !17
%71 = load i32, ptr %0, align 8, !tbaa !16
br label %72
72: ; preds = %66, %62
%73 = phi i32 [ %71, %66 ], [ %41, %62 ]
%74 = phi i32 [ %70, %66 ], [ %63, %62 ]
%75 = xor i32 %74, -1
%76 = and i32 %73, %75
store i32 %76, ptr %0, align 8, !tbaa !16
%77 = getelementptr inbounds i8, ptr %3, i64 16
%78 = load i64, ptr %77, align 8, !tbaa !20
%79 = icmp eq i64 %78, 0
br i1 %79, label %84, label %80
80: ; preds = %72
%81 = load i32, ptr @INS_command, align 4, !tbaa !17
%82 = xor i32 %81, -1
%83 = and i32 %76, %82
store i32 %83, ptr %0, align 8, !tbaa !16
br label %84
84: ; preds = %80, %72
%85 = load i64, ptr %14, align 8, !tbaa !19
%86 = add i64 %85, 1
store i64 %86, ptr %14, align 8, !tbaa !19
br label %105
87: ; preds = %38
%88 = load i32, ptr @INS_DLE_char, align 4, !tbaa !17
%89 = or i32 %88, %41
store i32 %89, ptr %0, align 8, !tbaa !16
%90 = getelementptr inbounds i8, ptr %3, i64 16
%91 = load i64, ptr %90, align 8, !tbaa !20
%92 = icmp eq i64 %91, 0
br i1 %92, label %93, label %105
93: ; preds = %87
%94 = load i32, ptr @INS_DLE_command, align 4, !tbaa !17
%95 = and i32 %94, %89
%96 = icmp eq i32 %95, 0
br i1 %96, label %97, label %105
97: ; preds = %93
%98 = getelementptr inbounds i8, ptr %3, i64 8
%99 = load i32, ptr %98, align 8, !tbaa !22
%100 = tail call i32 (i32, ptr, ...) @dev_notice(i32 noundef %99, ptr noundef nonnull @.str.2) #2
br label %105
101: ; preds = %38
%102 = getelementptr inbounds i8, ptr %3, i64 8
%103 = load i32, ptr %102, align 8, !tbaa !22
%104 = tail call i32 (i32, ptr, ...) @dev_notice(i32 noundef %103, ptr noundef nonnull @.str.3, i32 noundef %43) #2
br label %105
105: ; preds = %54, %84, %101, %97, %93, %87, %16, %24, %1, %36
ret void
}
declare i32 @dev_notice(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 32}
!7 = !{!"inbuf_t", !8, i64 0, !11, i64 8, !12, i64 16, !12, i64 24, !11, i64 32}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"cardstate", !12, i64 0, !8, i64 8, !12, i64 16}
!15 = !{!12, !12, i64 0}
!16 = !{!7, !8, i64 0}
!17 = !{!8, !8, i64 0}
!18 = !{!7, !11, i64 8}
!19 = !{!7, !12, i64 16}
!20 = !{!14, !12, i64 16}
!21 = !{!7, !12, i64 24}
!22 = !{!14, !8, i64 8}
| linux_drivers_staging_isdn_gigaset_extr_asyncdata.c_handle_dle |
; ModuleID = 'AnghaBench/lab/engine/code/qcommon/extr_cmd.c_Cmd_CompleteArgument.c'
source_filename = "AnghaBench/lab/engine/code/qcommon/extr_cmd.c_Cmd_CompleteArgument.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { ptr, i32, ptr }
@cmd_functions = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local void @Cmd_CompleteArgument(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load ptr, ptr @cmd_functions, align 8, !tbaa !5
%5 = icmp eq ptr %4, null
br i1 %5, label %21, label %6
6: ; preds = %3, %17
%7 = phi ptr [ %19, %17 ], [ %4, %3 ]
%8 = getelementptr inbounds %struct.TYPE_3__, ptr %7, i64 0, i32 1
%9 = load i32, ptr %8, align 8, !tbaa !9
%10 = tail call i32 @Q_stricmp(ptr noundef %0, i32 noundef %9) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %17
12: ; preds = %6
%13 = load ptr, ptr %7, align 8, !tbaa !12
%14 = icmp eq ptr %13, null
br i1 %14, label %21, label %15
15: ; preds = %12
%16 = tail call i32 %13(ptr noundef %1, i32 noundef %2) #2
br label %21
17: ; preds = %6
%18 = getelementptr inbounds %struct.TYPE_3__, ptr %7, i64 0, i32 2
%19 = load ptr, ptr %18, align 8, !tbaa !5
%20 = icmp eq ptr %19, null
br i1 %20, label %21, label %6, !llvm.loop !13
21: ; preds = %17, %3, %12, %15
ret void
}
declare i32 @Q_stricmp(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"TYPE_3__", !6, i64 0, !11, i64 8, !6, i64 16}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !6, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/lab/engine/code/qcommon/extr_cmd.c_Cmd_CompleteArgument.c'
source_filename = "AnghaBench/lab/engine/code/qcommon/extr_cmd.c_Cmd_CompleteArgument.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cmd_functions = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @Cmd_CompleteArgument(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load ptr, ptr @cmd_functions, align 8, !tbaa !6
%5 = icmp eq ptr %4, null
br i1 %5, label %21, label %6
6: ; preds = %3, %17
%7 = phi ptr [ %19, %17 ], [ %4, %3 ]
%8 = getelementptr inbounds i8, ptr %7, i64 8
%9 = load i32, ptr %8, align 8, !tbaa !10
%10 = tail call i32 @Q_stricmp(ptr noundef %0, i32 noundef %9) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %17
12: ; preds = %6
%13 = load ptr, ptr %7, align 8, !tbaa !13
%14 = icmp eq ptr %13, null
br i1 %14, label %21, label %15
15: ; preds = %12
%16 = tail call i32 %13(ptr noundef %1, i32 noundef %2) #2
br label %21
17: ; preds = %6
%18 = getelementptr inbounds i8, ptr %7, i64 16
%19 = load ptr, ptr %18, align 8, !tbaa !6
%20 = icmp eq ptr %19, null
br i1 %20, label %21, label %6, !llvm.loop !14
21: ; preds = %17, %3, %12, %15
ret void
}
declare i32 @Q_stricmp(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"TYPE_3__", !7, i64 0, !12, i64 8, !7, i64 16}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
| lab_engine_code_qcommon_extr_cmd.c_Cmd_CompleteArgument |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/extr_phy.c__rtl92ce_phy_config_bb_with_pgheaderfile.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/extr_phy.c__rtl92ce_phy_config_bb_with_pgheaderfile.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PHY_REG_ARRAY_PGLENGTH = dso_local local_unnamed_addr global i32 0, align 4
@RTL8192CEPHY_REG_ARRAY_PG = dso_local local_unnamed_addr global ptr null, align 8
@BASEBAND_CONFIG_PHY_REG = dso_local local_unnamed_addr global i64 0, align 8
@COMP_SEND = dso_local local_unnamed_addr global i32 0, align 4
@DBG_TRACE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [39 x i8] c"configtype != BaseBand_Config_PHY_REG\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @_rtl92ce_phy_config_bb_with_pgheaderfile(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @rtl_priv(ptr noundef %0) #2
%4 = load i32, ptr @PHY_REG_ARRAY_PGLENGTH, align 4, !tbaa !5
%5 = load ptr, ptr @RTL8192CEPHY_REG_ARRAY_PG, align 8, !tbaa !9
%6 = load i64, ptr @BASEBAND_CONFIG_PHY_REG, align 8, !tbaa !11
%7 = icmp eq i64 %6, %1
br i1 %7, label %8, label %24
8: ; preds = %2
%9 = icmp sgt i32 %4, 0
br i1 %9, label %10, label %28
10: ; preds = %8, %10
%11 = phi i64 [ %21, %10 ], [ 0, %8 ]
%12 = getelementptr inbounds i32, ptr %5, i64 %11
%13 = load i32, ptr %12, align 4, !tbaa !5
%14 = tail call i32 @rtl_addr_delay(i32 noundef %13) #2
%15 = load i32, ptr %12, align 4, !tbaa !5
%16 = getelementptr i32, ptr %12, i64 1
%17 = load i32, ptr %16, align 4, !tbaa !5
%18 = getelementptr i32, ptr %12, i64 2
%19 = load i32, ptr %18, align 4, !tbaa !5
%20 = tail call i32 @_rtl92c_store_pwrindex_diffrate_offset(ptr noundef %0, i32 noundef %15, i32 noundef %17, i32 noundef %19) #2
%21 = add nuw i64 %11, 3
%22 = trunc i64 %21 to i32
%23 = icmp sgt i32 %4, %22
br i1 %23, label %10, label %28, !llvm.loop !13
24: ; preds = %2
%25 = load i32, ptr @COMP_SEND, align 4, !tbaa !5
%26 = load i32, ptr @DBG_TRACE, align 4, !tbaa !5
%27 = tail call i32 @RT_TRACE(ptr noundef %3, i32 noundef %25, i32 noundef %26, ptr noundef nonnull @.str) #2
br label %28
28: ; preds = %10, %8, %24
ret i32 1
}
declare ptr @rtl_priv(ptr noundef) local_unnamed_addr #1
declare i32 @rtl_addr_delay(i32 noundef) local_unnamed_addr #1
declare i32 @_rtl92c_store_pwrindex_diffrate_offset(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @RT_TRACE(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/extr_phy.c__rtl92ce_phy_config_bb_with_pgheaderfile.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/extr_phy.c__rtl92ce_phy_config_bb_with_pgheaderfile.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PHY_REG_ARRAY_PGLENGTH = common local_unnamed_addr global i32 0, align 4
@RTL8192CEPHY_REG_ARRAY_PG = common local_unnamed_addr global ptr null, align 8
@BASEBAND_CONFIG_PHY_REG = common local_unnamed_addr global i64 0, align 8
@COMP_SEND = common local_unnamed_addr global i32 0, align 4
@DBG_TRACE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [39 x i8] c"configtype != BaseBand_Config_PHY_REG\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @_rtl92ce_phy_config_bb_with_pgheaderfile(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @rtl_priv(ptr noundef %0) #2
%4 = load i32, ptr @PHY_REG_ARRAY_PGLENGTH, align 4, !tbaa !6
%5 = load ptr, ptr @RTL8192CEPHY_REG_ARRAY_PG, align 8, !tbaa !10
%6 = load i64, ptr @BASEBAND_CONFIG_PHY_REG, align 8, !tbaa !12
%7 = icmp eq i64 %6, %1
br i1 %7, label %8, label %24
8: ; preds = %2
%9 = icmp sgt i32 %4, 0
br i1 %9, label %10, label %28
10: ; preds = %8, %10
%11 = phi i64 [ %21, %10 ], [ 0, %8 ]
%12 = getelementptr inbounds i32, ptr %5, i64 %11
%13 = load i32, ptr %12, align 4, !tbaa !6
%14 = tail call i32 @rtl_addr_delay(i32 noundef %13) #2
%15 = load i32, ptr %12, align 4, !tbaa !6
%16 = getelementptr inbounds i8, ptr %12, i64 4
%17 = load i32, ptr %16, align 4, !tbaa !6
%18 = getelementptr inbounds i8, ptr %12, i64 8
%19 = load i32, ptr %18, align 4, !tbaa !6
%20 = tail call i32 @_rtl92c_store_pwrindex_diffrate_offset(ptr noundef %0, i32 noundef %15, i32 noundef %17, i32 noundef %19) #2
%21 = add nuw nsw i64 %11, 3
%22 = trunc nuw i64 %21 to i32
%23 = icmp sgt i32 %4, %22
br i1 %23, label %10, label %28, !llvm.loop !14
24: ; preds = %2
%25 = load i32, ptr @COMP_SEND, align 4, !tbaa !6
%26 = load i32, ptr @DBG_TRACE, align 4, !tbaa !6
%27 = tail call i32 @RT_TRACE(ptr noundef %3, i32 noundef %25, i32 noundef %26, ptr noundef nonnull @.str) #2
br label %28
28: ; preds = %10, %8, %24
ret i32 1
}
declare ptr @rtl_priv(ptr noundef) local_unnamed_addr #1
declare i32 @rtl_addr_delay(i32 noundef) local_unnamed_addr #1
declare i32 @_rtl92c_store_pwrindex_diffrate_offset(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @RT_TRACE(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
| linux_drivers_net_wireless_realtek_rtlwifi_rtl8192ce_extr_phy.c__rtl92ce_phy_config_bb_with_pgheaderfile |
; ModuleID = 'AnghaBench/sqlcipher/ext/expert/extr_sqlite3expert.c_idxHashSearch.c'
source_filename = "AnghaBench/sqlcipher/ext/expert/extr_sqlite3expert.c_idxHashSearch.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @idxHashSearch], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @idxHashSearch(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = tail call ptr @idxHashFind(ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = load ptr, ptr %4, align 8, !tbaa !5
br label %8
8: ; preds = %3, %6
%9 = phi ptr [ %7, %6 ], [ null, %3 ]
ret ptr %9
}
declare ptr @idxHashFind(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/sqlcipher/ext/expert/extr_sqlite3expert.c_idxHashSearch.c'
source_filename = "AnghaBench/sqlcipher/ext/expert/extr_sqlite3expert.c_idxHashSearch.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @idxHashSearch], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @idxHashSearch(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = tail call ptr @idxHashFind(ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = load ptr, ptr %4, align 8, !tbaa !6
br label %8
8: ; preds = %3, %6
%9 = phi ptr [ %7, %6 ], [ null, %3 ]
ret ptr %9
}
declare ptr @idxHashFind(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| sqlcipher_ext_expert_extr_sqlite3expert.c_idxHashSearch |
; ModuleID = 'AnghaBench/freebsd/sys/dev/gpio/dwgpio/extr_dwgpio.c_dwgpio_attach.c'
source_filename = "AnghaBench/freebsd/sys/dev/gpio/dwgpio/extr_dwgpio.c_dwgpio_attach.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.dwgpio_softc = type { i32, i32, i32, ptr, ptr, i32, i32, i32 }
%struct.TYPE_2__ = type { i32, i32, i32, i32 }
@MTX_DEF = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [4 x i8] c"reg\00", align 1
@ENXIO = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [9 x i8] c"port %d\0A\00", align 1
@GPIO_VER_ID_CODE = dso_local local_unnamed_addr global i32 0, align 4
@boothowto = dso_local local_unnamed_addr global i32 0, align 4
@RB_VERBOSE = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [18 x i8] c"Version = 0x%08x\0A\00", align 1
@GPIO_CONFIG_REG2 = dso_local local_unnamed_addr global i32 0, align 4
@ENCODED_ID_PWIDTH_M = dso_local local_unnamed_addr global i32 0, align 4
@DEFAULT_CAPS = dso_local local_unnamed_addr global i32 0, align 4
@GPIO_PIN_OUTPUT = dso_local local_unnamed_addr global i32 0, align 4
@GPIO_PIN_INPUT = dso_local local_unnamed_addr global i32 0, align 4
@GPIOMAXNAME = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [12 x i8] c"dwgpio%d.%d\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @dwgpio_attach], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @dwgpio_attach(i32 noundef %0) #0 {
%2 = tail call ptr @device_get_softc(i32 noundef %0) #2
%3 = tail call i32 @device_get_parent(i32 noundef %0) #2
%4 = getelementptr inbounds %struct.dwgpio_softc, ptr %2, i64 0, i32 7
store i32 %3, ptr %4, align 8, !tbaa !5
%5 = tail call i32 @ofw_bus_get_node(i32 noundef %0) #2
%6 = getelementptr inbounds %struct.dwgpio_softc, ptr %2, i64 0, i32 6
store i32 %5, ptr %6, align 4, !tbaa !11
%7 = getelementptr inbounds %struct.dwgpio_softc, ptr %2, i64 0, i32 5
store i32 %0, ptr %7, align 8, !tbaa !12
%8 = getelementptr inbounds %struct.dwgpio_softc, ptr %2, i64 0, i32 2
%9 = tail call i32 @device_get_nameunit(i32 noundef %0) #2
%10 = load i32, ptr @MTX_DEF, align 4, !tbaa !13
%11 = tail call i32 @mtx_init(ptr noundef nonnull %8, i32 noundef %9, ptr noundef null, i32 noundef %10) #2
%12 = load i32, ptr %6, align 4, !tbaa !11
%13 = tail call i64 @OF_getencprop(i32 noundef %12, ptr noundef nonnull @.str, ptr noundef %2, i32 noundef 4) #2
%14 = icmp slt i64 %13, 1
br i1 %14, label %15, label %17
15: ; preds = %1
%16 = load i32, ptr @ENXIO, align 4, !tbaa !13
br label %76
17: ; preds = %1
%18 = load i32, ptr %2, align 8, !tbaa !14
%19 = tail call i32 @printf(ptr noundef nonnull @.str.1, i32 noundef %18) #2
%20 = load i32, ptr @GPIO_VER_ID_CODE, align 4, !tbaa !13
%21 = tail call i32 @READ4(ptr noundef nonnull %2, i32 noundef %20) #2
%22 = load i32, ptr @boothowto, align 4, !tbaa !13
%23 = load i32, ptr @RB_VERBOSE, align 4, !tbaa !13
%24 = and i32 %23, %22
%25 = icmp eq i32 %24, 0
br i1 %25, label %29, label %26
26: ; preds = %17
%27 = load i32, ptr %7, align 8, !tbaa !12
%28 = tail call i32 @device_printf(i32 noundef %27, ptr noundef nonnull @.str.2, i32 noundef %21) #2
br label %29
29: ; preds = %26, %17
%30 = load i32, ptr @GPIO_CONFIG_REG2, align 4, !tbaa !13
%31 = tail call i32 @READ4(ptr noundef nonnull %2, i32 noundef %30) #2
%32 = load i32, ptr %2, align 8, !tbaa !14
%33 = tail call i32 @ENCODED_ID_PWIDTH_S(i32 noundef %32) #2
%34 = ashr i32 %31, %33
%35 = load i32, ptr @ENCODED_ID_PWIDTH_M, align 4, !tbaa !13
%36 = and i32 %34, %35
%37 = add nsw i32 %36, 1
%38 = getelementptr inbounds %struct.dwgpio_softc, ptr %2, i64 0, i32 1
store i32 %37, ptr %38, align 4, !tbaa !15
%39 = icmp sgt i32 %36, -1
br i1 %39, label %40, label %69
40: ; preds = %29
%41 = getelementptr inbounds %struct.dwgpio_softc, ptr %2, i64 0, i32 4
br label %42
42: ; preds = %40, %42
%43 = phi i64 [ 0, %40 ], [ %65, %42 ]
%44 = load ptr, ptr %41, align 8, !tbaa !16
%45 = getelementptr inbounds %struct.TYPE_2__, ptr %44, i64 %43
%46 = trunc i64 %43 to i32
store i32 %46, ptr %45, align 4, !tbaa !17
%47 = load i32, ptr @DEFAULT_CAPS, align 4, !tbaa !13
%48 = getelementptr inbounds %struct.TYPE_2__, ptr %44, i64 %43, i32 3
store i32 %47, ptr %48, align 4, !tbaa !19
%49 = load i32, ptr %2, align 8, !tbaa !14
%50 = tail call i32 @GPIO_SWPORT_DDR(i32 noundef %49) #2
%51 = tail call i32 @READ4(ptr noundef nonnull %2, i32 noundef %50) #2
%52 = shl nuw i32 1, %46
%53 = and i32 %51, %52
%54 = icmp eq i32 %53, 0
%55 = load i32, ptr @GPIO_PIN_OUTPUT, align 4
%56 = load i32, ptr @GPIO_PIN_INPUT, align 4
%57 = select i1 %54, i32 %56, i32 %55
%58 = load ptr, ptr %41, align 8, !tbaa !16
%59 = getelementptr inbounds %struct.TYPE_2__, ptr %58, i64 %43, i32 2
store i32 %57, ptr %59, align 4, !tbaa !20
%60 = getelementptr inbounds %struct.TYPE_2__, ptr %58, i64 %43, i32 1
%61 = load i32, ptr %60, align 4, !tbaa !21
%62 = load i32, ptr @GPIOMAXNAME, align 4, !tbaa !13
%63 = tail call i32 @device_get_unit(i32 noundef %0) #2
%64 = tail call i32 @snprintf(i32 noundef %61, i32 noundef %62, ptr noundef nonnull @.str.3, i32 noundef %63, i32 noundef %46) #2
%65 = add nuw nsw i64 %43, 1
%66 = load i32, ptr %38, align 4, !tbaa !15
%67 = sext i32 %66 to i64
%68 = icmp slt i64 %65, %67
br i1 %68, label %42, label %69, !llvm.loop !22
69: ; preds = %42, %29
%70 = tail call ptr @gpiobus_attach_bus(i32 noundef %0) #2
%71 = getelementptr inbounds %struct.dwgpio_softc, ptr %2, i64 0, i32 3
store ptr %70, ptr %71, align 8, !tbaa !24
%72 = icmp eq ptr %70, null
br i1 %72, label %73, label %76
73: ; preds = %69
%74 = tail call i32 @mtx_destroy(ptr noundef nonnull %8) #2
%75 = load i32, ptr @ENXIO, align 4, !tbaa !13
br label %76
76: ; preds = %69, %73, %15
%77 = phi i32 [ %16, %15 ], [ %75, %73 ], [ 0, %69 ]
ret i32 %77
}
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #1
declare i32 @device_get_parent(i32 noundef) local_unnamed_addr #1
declare i32 @ofw_bus_get_node(i32 noundef) local_unnamed_addr #1
declare i32 @mtx_init(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_get_nameunit(i32 noundef) local_unnamed_addr #1
declare i64 @OF_getencprop(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @printf(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @READ4(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_printf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ENCODED_ID_PWIDTH_S(i32 noundef) local_unnamed_addr #1
declare i32 @GPIO_SWPORT_DDR(i32 noundef) local_unnamed_addr #1
declare i32 @snprintf(i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_get_unit(i32 noundef) local_unnamed_addr #1
declare ptr @gpiobus_attach_bus(i32 noundef) local_unnamed_addr #1
declare i32 @mtx_destroy(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 40}
!6 = !{!"dwgpio_softc", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16, !10, i64 24, !7, i64 32, !7, i64 36, !7, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 36}
!12 = !{!6, !7, i64 32}
!13 = !{!7, !7, i64 0}
!14 = !{!6, !7, i64 0}
!15 = !{!6, !7, i64 4}
!16 = !{!6, !10, i64 24}
!17 = !{!18, !7, i64 0}
!18 = !{!"TYPE_2__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!19 = !{!18, !7, i64 12}
!20 = !{!18, !7, i64 8}
!21 = !{!18, !7, i64 4}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = !{!6, !10, i64 16}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/gpio/dwgpio/extr_dwgpio.c_dwgpio_attach.c'
source_filename = "AnghaBench/freebsd/sys/dev/gpio/dwgpio/extr_dwgpio.c_dwgpio_attach.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32, i32, i32, i32 }
@MTX_DEF = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [4 x i8] c"reg\00", align 1
@ENXIO = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [9 x i8] c"port %d\0A\00", align 1
@GPIO_VER_ID_CODE = common local_unnamed_addr global i32 0, align 4
@boothowto = common local_unnamed_addr global i32 0, align 4
@RB_VERBOSE = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [18 x i8] c"Version = 0x%08x\0A\00", align 1
@GPIO_CONFIG_REG2 = common local_unnamed_addr global i32 0, align 4
@ENCODED_ID_PWIDTH_M = common local_unnamed_addr global i32 0, align 4
@DEFAULT_CAPS = common local_unnamed_addr global i32 0, align 4
@GPIO_PIN_OUTPUT = common local_unnamed_addr global i32 0, align 4
@GPIO_PIN_INPUT = common local_unnamed_addr global i32 0, align 4
@GPIOMAXNAME = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [12 x i8] c"dwgpio%d.%d\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @dwgpio_attach], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @dwgpio_attach(i32 noundef %0) #0 {
%2 = tail call ptr @device_get_softc(i32 noundef %0) #2
%3 = tail call i32 @device_get_parent(i32 noundef %0) #2
%4 = getelementptr inbounds i8, ptr %2, i64 40
store i32 %3, ptr %4, align 8, !tbaa !6
%5 = tail call i32 @ofw_bus_get_node(i32 noundef %0) #2
%6 = getelementptr inbounds i8, ptr %2, i64 36
store i32 %5, ptr %6, align 4, !tbaa !12
%7 = getelementptr inbounds i8, ptr %2, i64 32
store i32 %0, ptr %7, align 8, !tbaa !13
%8 = getelementptr inbounds i8, ptr %2, i64 8
%9 = tail call i32 @device_get_nameunit(i32 noundef %0) #2
%10 = load i32, ptr @MTX_DEF, align 4, !tbaa !14
%11 = tail call i32 @mtx_init(ptr noundef nonnull %8, i32 noundef %9, ptr noundef null, i32 noundef %10) #2
%12 = load i32, ptr %6, align 4, !tbaa !12
%13 = tail call i64 @OF_getencprop(i32 noundef %12, ptr noundef nonnull @.str, ptr noundef %2, i32 noundef 4) #2
%14 = icmp slt i64 %13, 1
br i1 %14, label %15, label %17
15: ; preds = %1
%16 = load i32, ptr @ENXIO, align 4, !tbaa !14
br label %76
17: ; preds = %1
%18 = load i32, ptr %2, align 8, !tbaa !15
%19 = tail call i32 @printf(ptr noundef nonnull @.str.1, i32 noundef %18) #2
%20 = load i32, ptr @GPIO_VER_ID_CODE, align 4, !tbaa !14
%21 = tail call i32 @READ4(ptr noundef nonnull %2, i32 noundef %20) #2
%22 = load i32, ptr @boothowto, align 4, !tbaa !14
%23 = load i32, ptr @RB_VERBOSE, align 4, !tbaa !14
%24 = and i32 %23, %22
%25 = icmp eq i32 %24, 0
br i1 %25, label %29, label %26
26: ; preds = %17
%27 = load i32, ptr %7, align 8, !tbaa !13
%28 = tail call i32 @device_printf(i32 noundef %27, ptr noundef nonnull @.str.2, i32 noundef %21) #2
br label %29
29: ; preds = %26, %17
%30 = load i32, ptr @GPIO_CONFIG_REG2, align 4, !tbaa !14
%31 = tail call i32 @READ4(ptr noundef nonnull %2, i32 noundef %30) #2
%32 = load i32, ptr %2, align 8, !tbaa !15
%33 = tail call i32 @ENCODED_ID_PWIDTH_S(i32 noundef %32) #2
%34 = ashr i32 %31, %33
%35 = load i32, ptr @ENCODED_ID_PWIDTH_M, align 4, !tbaa !14
%36 = and i32 %34, %35
%37 = add nsw i32 %36, 1
%38 = getelementptr inbounds i8, ptr %2, i64 4
store i32 %37, ptr %38, align 4, !tbaa !16
%39 = icmp sgt i32 %36, -1
br i1 %39, label %40, label %69
40: ; preds = %29
%41 = getelementptr inbounds i8, ptr %2, i64 24
br label %42
42: ; preds = %40, %42
%43 = phi i64 [ 0, %40 ], [ %65, %42 ]
%44 = load ptr, ptr %41, align 8, !tbaa !17
%45 = getelementptr inbounds %struct.TYPE_2__, ptr %44, i64 %43
%46 = trunc nuw nsw i64 %43 to i32
store i32 %46, ptr %45, align 4, !tbaa !18
%47 = load i32, ptr @DEFAULT_CAPS, align 4, !tbaa !14
%48 = getelementptr inbounds %struct.TYPE_2__, ptr %44, i64 %43, i32 3
store i32 %47, ptr %48, align 4, !tbaa !20
%49 = load i32, ptr %2, align 8, !tbaa !15
%50 = tail call i32 @GPIO_SWPORT_DDR(i32 noundef %49) #2
%51 = tail call i32 @READ4(ptr noundef nonnull %2, i32 noundef %50) #2
%52 = shl nuw i32 1, %46
%53 = and i32 %51, %52
%54 = icmp eq i32 %53, 0
%55 = load i32, ptr @GPIO_PIN_OUTPUT, align 4
%56 = load i32, ptr @GPIO_PIN_INPUT, align 4
%57 = select i1 %54, i32 %56, i32 %55
%58 = load ptr, ptr %41, align 8, !tbaa !17
%59 = getelementptr inbounds %struct.TYPE_2__, ptr %58, i64 %43, i32 2
store i32 %57, ptr %59, align 4, !tbaa !21
%60 = getelementptr inbounds %struct.TYPE_2__, ptr %58, i64 %43, i32 1
%61 = load i32, ptr %60, align 4, !tbaa !22
%62 = load i32, ptr @GPIOMAXNAME, align 4, !tbaa !14
%63 = tail call i32 @device_get_unit(i32 noundef %0) #2
%64 = tail call i32 @snprintf(i32 noundef %61, i32 noundef %62, ptr noundef nonnull @.str.3, i32 noundef %63, i32 noundef %46) #2
%65 = add nuw nsw i64 %43, 1
%66 = load i32, ptr %38, align 4, !tbaa !16
%67 = sext i32 %66 to i64
%68 = icmp slt i64 %65, %67
br i1 %68, label %42, label %69, !llvm.loop !23
69: ; preds = %42, %29
%70 = tail call ptr @gpiobus_attach_bus(i32 noundef %0) #2
%71 = getelementptr inbounds i8, ptr %2, i64 16
store ptr %70, ptr %71, align 8, !tbaa !25
%72 = icmp eq ptr %70, null
br i1 %72, label %73, label %76
73: ; preds = %69
%74 = tail call i32 @mtx_destroy(ptr noundef nonnull %8) #2
%75 = load i32, ptr @ENXIO, align 4, !tbaa !14
br label %76
76: ; preds = %69, %73, %15
%77 = phi i32 [ %16, %15 ], [ %75, %73 ], [ 0, %69 ]
ret i32 %77
}
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #1
declare i32 @device_get_parent(i32 noundef) local_unnamed_addr #1
declare i32 @ofw_bus_get_node(i32 noundef) local_unnamed_addr #1
declare i32 @mtx_init(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_get_nameunit(i32 noundef) local_unnamed_addr #1
declare i64 @OF_getencprop(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @printf(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @READ4(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_printf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ENCODED_ID_PWIDTH_S(i32 noundef) local_unnamed_addr #1
declare i32 @GPIO_SWPORT_DDR(i32 noundef) local_unnamed_addr #1
declare i32 @snprintf(i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_get_unit(i32 noundef) local_unnamed_addr #1
declare ptr @gpiobus_attach_bus(i32 noundef) local_unnamed_addr #1
declare i32 @mtx_destroy(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 40}
!7 = !{!"dwgpio_softc", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 16, !11, i64 24, !8, i64 32, !8, i64 36, !8, i64 40}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 36}
!13 = !{!7, !8, i64 32}
!14 = !{!8, !8, i64 0}
!15 = !{!7, !8, i64 0}
!16 = !{!7, !8, i64 4}
!17 = !{!7, !11, i64 24}
!18 = !{!19, !8, i64 0}
!19 = !{!"TYPE_2__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12}
!20 = !{!19, !8, i64 12}
!21 = !{!19, !8, i64 8}
!22 = !{!19, !8, i64 4}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = !{!7, !11, i64 16}
| freebsd_sys_dev_gpio_dwgpio_extr_dwgpio.c_dwgpio_attach |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/qla2xxx/extr_qla_nx.c_qla82xx_load_fw.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/qla2xxx/extr_qla_nx.c_qla82xx_load_fw.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@QLA_SUCCESS = dso_local local_unnamed_addr global i64 0, align 8
@ql_log_fatal = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [34 x i8] c"Error during CRB initialization.\0A\00", align 1
@QLA_FUNCTION_FAILED = dso_local local_unnamed_addr global i32 0, align 4
@QLA82XX_ROMUSB_GLB_SW_RESET = dso_local local_unnamed_addr global i32 0, align 4
@ql2xfwloadbin = dso_local local_unnamed_addr global i32 0, align 4
@ql_log_info = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [41 x i8] c"Attempting to load firmware from flash.\0A\00", align 1
@.str.2 = private unnamed_addr constant [42 x i8] c"Firmware loaded successfully from flash.\0A\00", align 1
@ql_log_warn = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [34 x i8] c"Firmware load from flash failed.\0A\00", align 1
@.str.4 = private unnamed_addr constant [40 x i8] c"Attempting to load firmware from blob.\0A\00", align 1
@.str.5 = private unnamed_addr constant [29 x i8] c"Firmware image not present.\0A\00", align 1
@QLA82XX_FLASH_ROMIMAGE = dso_local local_unnamed_addr global i32 0, align 4
@QLA82XX_UNIFIED_ROMIMAGE = dso_local local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [32 x i8] c"No valid firmware image found.\0A\00", align 1
@.str.7 = private unnamed_addr constant [48 x i8] c"Firmware loaded successfully from binary blob.\0A\00", align 1
@.str.8 = private unnamed_addr constant [39 x i8] c"Firmware load failed for binary blob.\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @qla82xx_load_fw], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @qla82xx_load_fw(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = tail call i64 @qla82xx_pinit_from_rom(ptr noundef nonnull %0) #2
%4 = load i64, ptr @QLA_SUCCESS, align 8, !tbaa !10
%5 = icmp eq i64 %3, %4
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32, ptr @ql_log_fatal, align 4, !tbaa !12
%8 = tail call i32 @ql_log(i32 noundef %7, ptr noundef nonnull %0, i32 noundef 159, ptr noundef nonnull @.str) #2
%9 = load i32, ptr @QLA_FUNCTION_FAILED, align 4, !tbaa !12
br label %67
10: ; preds = %1
%11 = tail call i32 @udelay(i32 noundef 500) #2
%12 = load i32, ptr @QLA82XX_ROMUSB_GLB_SW_RESET, align 4, !tbaa !12
%13 = tail call i32 @qla82xx_rd_32(ptr noundef %2, i32 noundef %12) #2
%14 = and i32 %13, -285212673
%15 = load i32, ptr @QLA82XX_ROMUSB_GLB_SW_RESET, align 4, !tbaa !12
%16 = tail call i32 @qla82xx_wr_32(ptr noundef %2, i32 noundef %15, i32 noundef %14) #2
%17 = load i32, ptr @ql2xfwloadbin, align 4, !tbaa !12
%18 = icmp eq i32 %17, 2
br i1 %18, label %33, label %19
19: ; preds = %10
%20 = load i32, ptr @ql_log_info, align 4, !tbaa !12
%21 = tail call i32 @ql_log(i32 noundef %20, ptr noundef nonnull %0, i32 noundef 160, ptr noundef nonnull @.str.1) #2
%22 = tail call i64 @qla82xx_fw_load_from_flash(ptr noundef %2) #2
%23 = load i64, ptr @QLA_SUCCESS, align 8, !tbaa !10
%24 = icmp eq i64 %22, %23
br i1 %24, label %25, label %30
25: ; preds = %19
%26 = load i32, ptr @ql_log_info, align 4, !tbaa !12
%27 = tail call i32 @ql_log(i32 noundef %26, ptr noundef nonnull %0, i32 noundef 161, ptr noundef nonnull @.str.2) #2
%28 = load i64, ptr @QLA_SUCCESS, align 8, !tbaa !10
%29 = trunc i64 %28 to i32
br label %67
30: ; preds = %19
%31 = load i32, ptr @ql_log_warn, align 4, !tbaa !12
%32 = tail call i32 @ql_log(i32 noundef %31, ptr noundef nonnull %0, i32 noundef 264, ptr noundef nonnull @.str.3) #2
br label %33
33: ; preds = %10, %30
%34 = load i32, ptr @ql_log_info, align 4, !tbaa !12
%35 = tail call i32 @ql_log(i32 noundef %34, ptr noundef nonnull %0, i32 noundef 162, ptr noundef nonnull @.str.4) #2
%36 = tail call ptr @qla2x00_request_firmware(ptr noundef nonnull %0) #2
store ptr %36, ptr %2, align 8, !tbaa !14
%37 = icmp eq ptr %36, null
br i1 %37, label %38, label %41
38: ; preds = %33
%39 = load i32, ptr @ql_log_fatal, align 4, !tbaa !12
%40 = tail call i32 @ql_log(i32 noundef %39, ptr noundef nonnull %0, i32 noundef 163, ptr noundef nonnull @.str.5) #2
br label %65
41: ; preds = %33
%42 = load i32, ptr @QLA82XX_FLASH_ROMIMAGE, align 4, !tbaa !12
%43 = tail call i64 @qla82xx_validate_firmware_blob(ptr noundef nonnull %0, i32 noundef %42) #2
%44 = icmp eq i64 %43, 0
br i1 %44, label %53, label %45
45: ; preds = %41
%46 = load i32, ptr @QLA82XX_UNIFIED_ROMIMAGE, align 4, !tbaa !12
%47 = tail call i64 @qla82xx_validate_firmware_blob(ptr noundef nonnull %0, i32 noundef %46) #2
%48 = icmp eq i64 %47, 0
br i1 %48, label %53, label %49
49: ; preds = %45
%50 = load i32, ptr @ql_log_fatal, align 4, !tbaa !12
%51 = tail call i32 @ql_log(i32 noundef %50, ptr noundef nonnull %0, i32 noundef 164, ptr noundef nonnull @.str.6) #2
%52 = load i32, ptr @QLA_FUNCTION_FAILED, align 4, !tbaa !12
br label %67
53: ; preds = %45, %41
%54 = tail call i64 @qla82xx_fw_load_from_blob(ptr noundef nonnull %2) #2
%55 = load i64, ptr @QLA_SUCCESS, align 8, !tbaa !10
%56 = icmp eq i64 %54, %55
br i1 %56, label %57, label %62
57: ; preds = %53
%58 = load i32, ptr @ql_log_info, align 4, !tbaa !12
%59 = tail call i32 @ql_log(i32 noundef %58, ptr noundef nonnull %0, i32 noundef 165, ptr noundef nonnull @.str.7) #2
%60 = load i64, ptr @QLA_SUCCESS, align 8, !tbaa !10
%61 = trunc i64 %60 to i32
br label %67
62: ; preds = %53
%63 = load i32, ptr @ql_log_fatal, align 4, !tbaa !12
%64 = tail call i32 @ql_log(i32 noundef %63, ptr noundef nonnull %0, i32 noundef 166, ptr noundef nonnull @.str.8) #2
store ptr null, ptr %36, align 8, !tbaa !16
br label %65
65: ; preds = %62, %38
%66 = load i32, ptr @QLA_FUNCTION_FAILED, align 4, !tbaa !12
br label %67
67: ; preds = %65, %57, %49, %25, %6
%68 = phi i32 [ %9, %6 ], [ %52, %49 ], [ %61, %57 ], [ %66, %65 ], [ %29, %25 ]
ret i32 %68
}
declare i64 @qla82xx_pinit_from_rom(ptr noundef) local_unnamed_addr #1
declare i32 @ql_log(i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @udelay(i32 noundef) local_unnamed_addr #1
declare i32 @qla82xx_rd_32(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @qla82xx_wr_32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @qla82xx_fw_load_from_flash(ptr noundef) local_unnamed_addr #1
declare ptr @qla2x00_request_firmware(ptr noundef) local_unnamed_addr #1
declare i64 @qla82xx_validate_firmware_blob(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @qla82xx_fw_load_from_blob(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_7__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!15, !7, i64 0}
!15 = !{!"qla_hw_data", !7, i64 0}
!16 = !{!17, !7, i64 0}
!17 = !{!"fw_blob", !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/qla2xxx/extr_qla_nx.c_qla82xx_load_fw.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/qla2xxx/extr_qla_nx.c_qla82xx_load_fw.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@QLA_SUCCESS = common local_unnamed_addr global i64 0, align 8
@ql_log_fatal = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [34 x i8] c"Error during CRB initialization.\0A\00", align 1
@QLA_FUNCTION_FAILED = common local_unnamed_addr global i32 0, align 4
@QLA82XX_ROMUSB_GLB_SW_RESET = common local_unnamed_addr global i32 0, align 4
@ql2xfwloadbin = common local_unnamed_addr global i32 0, align 4
@ql_log_info = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [41 x i8] c"Attempting to load firmware from flash.\0A\00", align 1
@.str.2 = private unnamed_addr constant [42 x i8] c"Firmware loaded successfully from flash.\0A\00", align 1
@ql_log_warn = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [34 x i8] c"Firmware load from flash failed.\0A\00", align 1
@.str.4 = private unnamed_addr constant [40 x i8] c"Attempting to load firmware from blob.\0A\00", align 1
@.str.5 = private unnamed_addr constant [29 x i8] c"Firmware image not present.\0A\00", align 1
@QLA82XX_FLASH_ROMIMAGE = common local_unnamed_addr global i32 0, align 4
@QLA82XX_UNIFIED_ROMIMAGE = common local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [32 x i8] c"No valid firmware image found.\0A\00", align 1
@.str.7 = private unnamed_addr constant [48 x i8] c"Firmware loaded successfully from binary blob.\0A\00", align 1
@.str.8 = private unnamed_addr constant [39 x i8] c"Firmware load failed for binary blob.\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @qla82xx_load_fw], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @qla82xx_load_fw(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = tail call i64 @qla82xx_pinit_from_rom(ptr noundef nonnull %0) #2
%4 = load i64, ptr @QLA_SUCCESS, align 8, !tbaa !11
%5 = icmp eq i64 %3, %4
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32, ptr @ql_log_fatal, align 4, !tbaa !13
%8 = tail call i32 @ql_log(i32 noundef %7, ptr noundef nonnull %0, i32 noundef 159, ptr noundef nonnull @.str) #2
%9 = load i32, ptr @QLA_FUNCTION_FAILED, align 4, !tbaa !13
br label %67
10: ; preds = %1
%11 = tail call i32 @udelay(i32 noundef 500) #2
%12 = load i32, ptr @QLA82XX_ROMUSB_GLB_SW_RESET, align 4, !tbaa !13
%13 = tail call i32 @qla82xx_rd_32(ptr noundef %2, i32 noundef %12) #2
%14 = and i32 %13, -285212673
%15 = load i32, ptr @QLA82XX_ROMUSB_GLB_SW_RESET, align 4, !tbaa !13
%16 = tail call i32 @qla82xx_wr_32(ptr noundef %2, i32 noundef %15, i32 noundef %14) #2
%17 = load i32, ptr @ql2xfwloadbin, align 4, !tbaa !13
%18 = icmp eq i32 %17, 2
br i1 %18, label %33, label %19
19: ; preds = %10
%20 = load i32, ptr @ql_log_info, align 4, !tbaa !13
%21 = tail call i32 @ql_log(i32 noundef %20, ptr noundef nonnull %0, i32 noundef 160, ptr noundef nonnull @.str.1) #2
%22 = tail call i64 @qla82xx_fw_load_from_flash(ptr noundef %2) #2
%23 = load i64, ptr @QLA_SUCCESS, align 8, !tbaa !11
%24 = icmp eq i64 %22, %23
br i1 %24, label %25, label %30
25: ; preds = %19
%26 = load i32, ptr @ql_log_info, align 4, !tbaa !13
%27 = tail call i32 @ql_log(i32 noundef %26, ptr noundef nonnull %0, i32 noundef 161, ptr noundef nonnull @.str.2) #2
%28 = load i64, ptr @QLA_SUCCESS, align 8, !tbaa !11
%29 = trunc i64 %28 to i32
br label %67
30: ; preds = %19
%31 = load i32, ptr @ql_log_warn, align 4, !tbaa !13
%32 = tail call i32 @ql_log(i32 noundef %31, ptr noundef nonnull %0, i32 noundef 264, ptr noundef nonnull @.str.3) #2
br label %33
33: ; preds = %10, %30
%34 = load i32, ptr @ql_log_info, align 4, !tbaa !13
%35 = tail call i32 @ql_log(i32 noundef %34, ptr noundef nonnull %0, i32 noundef 162, ptr noundef nonnull @.str.4) #2
%36 = tail call ptr @qla2x00_request_firmware(ptr noundef nonnull %0) #2
store ptr %36, ptr %2, align 8, !tbaa !15
%37 = icmp eq ptr %36, null
br i1 %37, label %38, label %41
38: ; preds = %33
%39 = load i32, ptr @ql_log_fatal, align 4, !tbaa !13
%40 = tail call i32 @ql_log(i32 noundef %39, ptr noundef nonnull %0, i32 noundef 163, ptr noundef nonnull @.str.5) #2
br label %65
41: ; preds = %33
%42 = load i32, ptr @QLA82XX_FLASH_ROMIMAGE, align 4, !tbaa !13
%43 = tail call i64 @qla82xx_validate_firmware_blob(ptr noundef nonnull %0, i32 noundef %42) #2
%44 = icmp eq i64 %43, 0
br i1 %44, label %53, label %45
45: ; preds = %41
%46 = load i32, ptr @QLA82XX_UNIFIED_ROMIMAGE, align 4, !tbaa !13
%47 = tail call i64 @qla82xx_validate_firmware_blob(ptr noundef nonnull %0, i32 noundef %46) #2
%48 = icmp eq i64 %47, 0
br i1 %48, label %53, label %49
49: ; preds = %45
%50 = load i32, ptr @ql_log_fatal, align 4, !tbaa !13
%51 = tail call i32 @ql_log(i32 noundef %50, ptr noundef nonnull %0, i32 noundef 164, ptr noundef nonnull @.str.6) #2
%52 = load i32, ptr @QLA_FUNCTION_FAILED, align 4, !tbaa !13
br label %67
53: ; preds = %45, %41
%54 = tail call i64 @qla82xx_fw_load_from_blob(ptr noundef nonnull %2) #2
%55 = load i64, ptr @QLA_SUCCESS, align 8, !tbaa !11
%56 = icmp eq i64 %54, %55
br i1 %56, label %57, label %62
57: ; preds = %53
%58 = load i32, ptr @ql_log_info, align 4, !tbaa !13
%59 = tail call i32 @ql_log(i32 noundef %58, ptr noundef nonnull %0, i32 noundef 165, ptr noundef nonnull @.str.7) #2
%60 = load i64, ptr @QLA_SUCCESS, align 8, !tbaa !11
%61 = trunc i64 %60 to i32
br label %67
62: ; preds = %53
%63 = load i32, ptr @ql_log_fatal, align 4, !tbaa !13
%64 = tail call i32 @ql_log(i32 noundef %63, ptr noundef nonnull %0, i32 noundef 166, ptr noundef nonnull @.str.8) #2
store ptr null, ptr %36, align 8, !tbaa !17
br label %65
65: ; preds = %62, %38
%66 = load i32, ptr @QLA_FUNCTION_FAILED, align 4, !tbaa !13
br label %67
67: ; preds = %65, %57, %49, %25, %6
%68 = phi i32 [ %9, %6 ], [ %52, %49 ], [ %61, %57 ], [ %66, %65 ], [ %29, %25 ]
ret i32 %68
}
declare i64 @qla82xx_pinit_from_rom(ptr noundef) local_unnamed_addr #1
declare i32 @ql_log(i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @udelay(i32 noundef) local_unnamed_addr #1
declare i32 @qla82xx_rd_32(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @qla82xx_wr_32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @qla82xx_fw_load_from_flash(ptr noundef) local_unnamed_addr #1
declare ptr @qla2x00_request_firmware(ptr noundef) local_unnamed_addr #1
declare i64 @qla82xx_validate_firmware_blob(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @qla82xx_fw_load_from_blob(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_7__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!16, !8, i64 0}
!16 = !{!"qla_hw_data", !8, i64 0}
!17 = !{!18, !8, i64 0}
!18 = !{!"fw_blob", !8, i64 0}
| fastsocket_kernel_drivers_scsi_qla2xxx_extr_qla_nx.c_qla82xx_load_fw |
; ModuleID = 'AnghaBench/linux/arch/arm/mach-pxa/extr_lubbock.c_lubbock_detect_int.c'
source_filename = "AnghaBench/linux/arch/arm/mach-pxa/extr_lubbock.c_lubbock_detect_int.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@mmc_timer = dso_local global i32 0, align 4
@jiffies = dso_local local_unnamed_addr global i64 0, align 8
@MMC_POLL_RATE = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @lubbock_detect_int], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @lubbock_detect_int(i32 noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @disable_irq(i32 noundef %0) #2
%4 = load i64, ptr @jiffies, align 8, !tbaa !5
%5 = load i64, ptr @MMC_POLL_RATE, align 8, !tbaa !5
%6 = add nsw i64 %5, %4
%7 = tail call i32 @mod_timer(ptr noundef nonnull @mmc_timer, i64 noundef %6) #2
%8 = tail call i32 @mmc_detect_int(i32 noundef %0, ptr noundef %1) #2
ret i32 %8
}
declare i32 @disable_irq(i32 noundef) local_unnamed_addr #1
declare i32 @mod_timer(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @mmc_detect_int(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/arch/arm/mach-pxa/extr_lubbock.c_lubbock_detect_int.c'
source_filename = "AnghaBench/linux/arch/arm/mach-pxa/extr_lubbock.c_lubbock_detect_int.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@mmc_timer = common global i32 0, align 4
@jiffies = common local_unnamed_addr global i64 0, align 8
@MMC_POLL_RATE = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @lubbock_detect_int], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @lubbock_detect_int(i32 noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @disable_irq(i32 noundef %0) #2
%4 = load i64, ptr @jiffies, align 8, !tbaa !6
%5 = load i64, ptr @MMC_POLL_RATE, align 8, !tbaa !6
%6 = add nsw i64 %5, %4
%7 = tail call i32 @mod_timer(ptr noundef nonnull @mmc_timer, i64 noundef %6) #2
%8 = tail call i32 @mmc_detect_int(i32 noundef %0, ptr noundef %1) #2
ret i32 %8
}
declare i32 @disable_irq(i32 noundef) local_unnamed_addr #1
declare i32 @mod_timer(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @mmc_detect_int(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_arch_arm_mach-pxa_extr_lubbock.c_lubbock_detect_int |
; ModuleID = 'AnghaBench/linux/fs/nfsd/extr_vfs.c_nfsd_buffered_readdir.c'
source_filename = "AnghaBench/linux/fs/nfsd/extr_vfs.c_nfsd_buffered_readdir.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.readdir_data = type { ptr, i32, i64, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32 }
%struct.buffered_dirent = type { i64, i32, i32, i32, i32 }
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@nfsd_buffered_filldir = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@nfserr_eof = dso_local local_unnamed_addr global i64 0, align 8
@nfs_ok = dso_local local_unnamed_addr global i64 0, align 8
@SEEK_CUR = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @nfsd_buffered_readdir], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @nfsd_buffered_readdir(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2, ptr nocapture noundef %3) #0 {
%5 = alloca %struct.readdir_data, align 8
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %5) #3
%6 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%7 = tail call i64 @__get_free_page(i32 noundef %6) #3
%8 = inttoptr i64 %7 to ptr
store ptr %8, ptr %5, align 8, !tbaa !9
%9 = getelementptr inbounds %struct.readdir_data, ptr %5, i64 0, i32 1
%10 = getelementptr inbounds %struct.readdir_data, ptr %5, i64 0, i32 2
%11 = getelementptr inbounds %struct.readdir_data, ptr %5, i64 0, i32 3
%12 = load i32, ptr @nfsd_buffered_filldir, align 4, !tbaa !5
store i32 %12, ptr %11, align 8, !tbaa !14
%13 = icmp eq i64 %7, 0
br i1 %13, label %14, label %18
14: ; preds = %4
%15 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%16 = sub nsw i32 0, %15
%17 = tail call i64 @nfserrno(i32 noundef %16) #3
br label %90
18: ; preds = %4
%19 = load i32, ptr %3, align 4, !tbaa !5
%20 = load i64, ptr @nfserr_eof, align 8, !tbaa !15
store i64 %20, ptr %2, align 8, !tbaa !16
store i32 0, ptr %9, align 8, !tbaa !18
store i64 0, ptr %10, align 8, !tbaa !19
%21 = call i32 @iterate_dir(ptr noundef %0, ptr noundef nonnull %11) #3
%22 = load i64, ptr %10, align 8, !tbaa !19
%23 = icmp eq i64 %22, 0
%24 = select i1 %23, i32 %21, i32 0
%25 = icmp slt i32 %24, 0
br i1 %25, label %29, label %26
26: ; preds = %18
%27 = load i32, ptr %9, align 8, !tbaa !18
%28 = icmp eq i32 %27, 0
br i1 %28, label %78, label %37
29: ; preds = %69, %18
%30 = phi i32 [ %21, %18 ], [ %73, %69 ]
%31 = load ptr, ptr %5, align 8, !tbaa !9
%32 = ptrtoint ptr %31 to i64
%33 = call i32 @free_page(i64 noundef %32) #3
br label %85
34: ; preds = %69
%35 = load i32, ptr %9, align 8, !tbaa !18
%36 = icmp eq i32 %35, 0
br i1 %36, label %78, label %37
37: ; preds = %26, %34
%38 = phi i32 [ %35, %34 ], [ %27, %26 ]
%39 = phi i32 [ %76, %34 ], [ %24, %26 ]
%40 = icmp sgt i32 %38, 0
br i1 %40, label %41, label %69
41: ; preds = %37
%42 = load ptr, ptr %5, align 8, !tbaa !9
br label %43
43: ; preds = %41, %61
%44 = phi i32 [ %65, %61 ], [ %38, %41 ]
%45 = phi ptr [ %67, %61 ], [ %42, %41 ]
%46 = getelementptr inbounds %struct.buffered_dirent, ptr %45, i64 0, i32 3
%47 = load i32, ptr %46, align 8, !tbaa !20
%48 = getelementptr inbounds %struct.buffered_dirent, ptr %45, i64 0, i32 4
%49 = load i32, ptr %48, align 4, !tbaa !22
%50 = load i64, ptr %45, align 8, !tbaa !23
%51 = getelementptr inbounds %struct.buffered_dirent, ptr %45, i64 0, i32 2
%52 = load i32, ptr %51, align 4, !tbaa !24
%53 = getelementptr inbounds %struct.buffered_dirent, ptr %45, i64 0, i32 1
%54 = load i32, ptr %53, align 8, !tbaa !25
%55 = call i64 %1(ptr noundef nonnull %2, i32 noundef %49, i64 noundef %50, i32 noundef %47, i32 noundef %52, i32 noundef %54) #3
%56 = icmp eq i64 %55, 0
br i1 %56, label %57, label %78
57: ; preds = %43
%58 = load i64, ptr %2, align 8, !tbaa !16
%59 = load i64, ptr @nfs_ok, align 8, !tbaa !15
%60 = icmp eq i64 %58, %59
br i1 %60, label %61, label %78
61: ; preds = %57
%62 = load i64, ptr %45, align 8, !tbaa !23
%63 = add i64 %62, 24
%64 = call i32 @ALIGN(i64 noundef %63, i32 noundef 4) #3
%65 = sub i32 %44, %64
%66 = zext i32 %64 to i64
%67 = getelementptr inbounds i8, ptr %45, i64 %66
%68 = icmp sgt i32 %65, 0
br i1 %68, label %43, label %69, !llvm.loop !26
69: ; preds = %61, %37
%70 = load i32, ptr @SEEK_CUR, align 4, !tbaa !5
%71 = call i32 @vfs_llseek(ptr noundef %0, i32 noundef 0, i32 noundef %70) #3
%72 = load i64, ptr @nfserr_eof, align 8, !tbaa !15
store i64 %72, ptr %2, align 8, !tbaa !16
store i32 0, ptr %9, align 8, !tbaa !18
store i64 0, ptr %10, align 8, !tbaa !19
%73 = call i32 @iterate_dir(ptr noundef %0, ptr noundef nonnull %11) #3
%74 = load i64, ptr %10, align 8, !tbaa !19
%75 = icmp eq i64 %74, 0
%76 = select i1 %75, i32 %73, i32 0
%77 = icmp slt i32 %76, 0
br i1 %77, label %29, label %34
78: ; preds = %34, %43, %57, %26
%79 = phi i32 [ %24, %26 ], [ %39, %57 ], [ %39, %43 ], [ %76, %34 ]
%80 = phi i32 [ %19, %26 ], [ %47, %57 ], [ %47, %43 ], [ %71, %34 ]
%81 = load ptr, ptr %5, align 8, !tbaa !9
%82 = ptrtoint ptr %81 to i64
%83 = call i32 @free_page(i64 noundef %82) #3
%84 = icmp eq i32 %79, 0
br i1 %84, label %88, label %85
85: ; preds = %29, %78
%86 = phi i32 [ %30, %29 ], [ %79, %78 ]
%87 = call i64 @nfserrno(i32 noundef %86) #3
br label %90
88: ; preds = %78
store i32 %80, ptr %3, align 4, !tbaa !5
%89 = load i64, ptr %2, align 8, !tbaa !16
br label %90
90: ; preds = %88, %85, %14
%91 = phi i64 [ %87, %85 ], [ %89, %88 ], [ %17, %14 ]
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %5) #3
ret i64 %91
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @__get_free_page(i32 noundef) local_unnamed_addr #2
declare i64 @nfserrno(i32 noundef) local_unnamed_addr #2
declare i32 @iterate_dir(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ALIGN(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @vfs_llseek(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @free_page(i64 noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"readdir_data", !11, i64 0, !6, i64 8, !12, i64 16, !13, i64 24}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!"TYPE_2__", !6, i64 0}
!14 = !{!13, !6, i64 0}
!15 = !{!12, !12, i64 0}
!16 = !{!17, !12, i64 0}
!17 = !{!"readdir_cd", !12, i64 0}
!18 = !{!10, !6, i64 8}
!19 = !{!10, !12, i64 16}
!20 = !{!21, !6, i64 16}
!21 = !{!"buffered_dirent", !12, i64 0, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20}
!22 = !{!21, !6, i64 20}
!23 = !{!21, !12, i64 0}
!24 = !{!21, !6, i64 12}
!25 = !{!21, !6, i64 8}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/fs/nfsd/extr_vfs.c_nfsd_buffered_readdir.c'
source_filename = "AnghaBench/linux/fs/nfsd/extr_vfs.c_nfsd_buffered_readdir.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.readdir_data = type { ptr, i32, i64, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32 }
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@nfsd_buffered_filldir = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@nfserr_eof = common local_unnamed_addr global i64 0, align 8
@nfs_ok = common local_unnamed_addr global i64 0, align 8
@SEEK_CUR = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @nfsd_buffered_readdir], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @nfsd_buffered_readdir(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2, ptr nocapture noundef %3) #0 {
%5 = alloca %struct.readdir_data, align 8
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %5) #3
%6 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%7 = tail call i64 @__get_free_page(i32 noundef %6) #3
%8 = inttoptr i64 %7 to ptr
store ptr %8, ptr %5, align 8, !tbaa !10
%9 = getelementptr inbounds i8, ptr %5, i64 8
%10 = getelementptr inbounds i8, ptr %5, i64 16
%11 = getelementptr inbounds i8, ptr %5, i64 24
%12 = load i32, ptr @nfsd_buffered_filldir, align 4, !tbaa !6
store i32 %12, ptr %11, align 8, !tbaa !15
%13 = icmp eq i64 %7, 0
br i1 %13, label %14, label %18
14: ; preds = %4
%15 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%16 = sub nsw i32 0, %15
%17 = tail call i64 @nfserrno(i32 noundef %16) #3
br label %90
18: ; preds = %4
%19 = load i32, ptr %3, align 4, !tbaa !6
%20 = load i64, ptr @nfserr_eof, align 8, !tbaa !16
store i64 %20, ptr %2, align 8, !tbaa !17
store i32 0, ptr %9, align 8, !tbaa !19
store i64 0, ptr %10, align 8, !tbaa !20
%21 = call i32 @iterate_dir(ptr noundef %0, ptr noundef nonnull %11) #3
%22 = load i64, ptr %10, align 8, !tbaa !20
%23 = icmp eq i64 %22, 0
%24 = select i1 %23, i32 %21, i32 0
%25 = icmp slt i32 %24, 0
br i1 %25, label %29, label %26
26: ; preds = %18
%27 = load i32, ptr %9, align 8, !tbaa !19
%28 = icmp eq i32 %27, 0
br i1 %28, label %78, label %37
29: ; preds = %69, %18
%30 = phi i32 [ %21, %18 ], [ %73, %69 ]
%31 = load ptr, ptr %5, align 8, !tbaa !10
%32 = ptrtoint ptr %31 to i64
%33 = call i32 @free_page(i64 noundef %32) #3
br label %85
34: ; preds = %69
%35 = load i32, ptr %9, align 8, !tbaa !19
%36 = icmp eq i32 %35, 0
br i1 %36, label %78, label %37
37: ; preds = %26, %34
%38 = phi i32 [ %35, %34 ], [ %27, %26 ]
%39 = phi i32 [ %76, %34 ], [ %24, %26 ]
%40 = icmp sgt i32 %38, 0
br i1 %40, label %41, label %69
41: ; preds = %37
%42 = load ptr, ptr %5, align 8, !tbaa !10
br label %43
43: ; preds = %41, %61
%44 = phi i32 [ %65, %61 ], [ %38, %41 ]
%45 = phi ptr [ %67, %61 ], [ %42, %41 ]
%46 = getelementptr inbounds i8, ptr %45, i64 16
%47 = load i32, ptr %46, align 8, !tbaa !21
%48 = getelementptr inbounds i8, ptr %45, i64 20
%49 = load i32, ptr %48, align 4, !tbaa !23
%50 = load i64, ptr %45, align 8, !tbaa !24
%51 = getelementptr inbounds i8, ptr %45, i64 12
%52 = load i32, ptr %51, align 4, !tbaa !25
%53 = getelementptr inbounds i8, ptr %45, i64 8
%54 = load i32, ptr %53, align 8, !tbaa !26
%55 = call i64 %1(ptr noundef nonnull %2, i32 noundef %49, i64 noundef %50, i32 noundef %47, i32 noundef %52, i32 noundef %54) #3
%56 = icmp eq i64 %55, 0
br i1 %56, label %57, label %78
57: ; preds = %43
%58 = load i64, ptr %2, align 8, !tbaa !17
%59 = load i64, ptr @nfs_ok, align 8, !tbaa !16
%60 = icmp eq i64 %58, %59
br i1 %60, label %61, label %78
61: ; preds = %57
%62 = load i64, ptr %45, align 8, !tbaa !24
%63 = add i64 %62, 24
%64 = call i32 @ALIGN(i64 noundef %63, i32 noundef 4) #3
%65 = sub i32 %44, %64
%66 = zext i32 %64 to i64
%67 = getelementptr inbounds i8, ptr %45, i64 %66
%68 = icmp sgt i32 %65, 0
br i1 %68, label %43, label %69, !llvm.loop !27
69: ; preds = %61, %37
%70 = load i32, ptr @SEEK_CUR, align 4, !tbaa !6
%71 = call i32 @vfs_llseek(ptr noundef %0, i32 noundef 0, i32 noundef %70) #3
%72 = load i64, ptr @nfserr_eof, align 8, !tbaa !16
store i64 %72, ptr %2, align 8, !tbaa !17
store i32 0, ptr %9, align 8, !tbaa !19
store i64 0, ptr %10, align 8, !tbaa !20
%73 = call i32 @iterate_dir(ptr noundef %0, ptr noundef nonnull %11) #3
%74 = load i64, ptr %10, align 8, !tbaa !20
%75 = icmp eq i64 %74, 0
%76 = select i1 %75, i32 %73, i32 0
%77 = icmp slt i32 %76, 0
br i1 %77, label %29, label %34
78: ; preds = %34, %43, %57, %26
%79 = phi i32 [ %24, %26 ], [ %39, %57 ], [ %39, %43 ], [ %76, %34 ]
%80 = phi i32 [ %19, %26 ], [ %47, %57 ], [ %47, %43 ], [ %71, %34 ]
%81 = load ptr, ptr %5, align 8, !tbaa !10
%82 = ptrtoint ptr %81 to i64
%83 = call i32 @free_page(i64 noundef %82) #3
%84 = icmp eq i32 %79, 0
br i1 %84, label %88, label %85
85: ; preds = %29, %78
%86 = phi i32 [ %30, %29 ], [ %79, %78 ]
%87 = call i64 @nfserrno(i32 noundef %86) #3
br label %90
88: ; preds = %78
store i32 %80, ptr %3, align 4, !tbaa !6
%89 = load i64, ptr %2, align 8, !tbaa !17
br label %90
90: ; preds = %88, %85, %14
%91 = phi i64 [ %87, %85 ], [ %89, %88 ], [ %17, %14 ]
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %5) #3
ret i64 %91
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @__get_free_page(i32 noundef) local_unnamed_addr #2
declare i64 @nfserrno(i32 noundef) local_unnamed_addr #2
declare i32 @iterate_dir(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ALIGN(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @vfs_llseek(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @free_page(i64 noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"readdir_data", !12, i64 0, !7, i64 8, !13, i64 16, !14, i64 24}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!"TYPE_2__", !7, i64 0}
!15 = !{!14, !7, i64 0}
!16 = !{!13, !13, i64 0}
!17 = !{!18, !13, i64 0}
!18 = !{!"readdir_cd", !13, i64 0}
!19 = !{!11, !7, i64 8}
!20 = !{!11, !13, i64 16}
!21 = !{!22, !7, i64 16}
!22 = !{!"buffered_dirent", !13, i64 0, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20}
!23 = !{!22, !7, i64 20}
!24 = !{!22, !13, i64 0}
!25 = !{!22, !7, i64 12}
!26 = !{!22, !7, i64 8}
!27 = distinct !{!27, !28}
!28 = !{!"llvm.loop.mustprogress"}
| linux_fs_nfsd_extr_vfs.c_nfsd_buffered_readdir |
; ModuleID = 'AnghaBench/linux/drivers/usb/core/extr_hcd.c_usb_put_hcd.c'
source_filename = "AnghaBench/linux/drivers/usb/core/extr_hcd.c_usb_put_hcd.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@hcd_release = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @usb_put_hcd(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = load i32, ptr @hcd_release, align 4, !tbaa !5
%5 = tail call i32 @kref_put(ptr noundef nonnull %0, i32 noundef %4) #2
br label %6
6: ; preds = %3, %1
ret void
}
declare i32 @kref_put(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/core/extr_hcd.c_usb_put_hcd.c'
source_filename = "AnghaBench/linux/drivers/usb/core/extr_hcd.c_usb_put_hcd.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@hcd_release = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @usb_put_hcd(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = load i32, ptr @hcd_release, align 4, !tbaa !6
%5 = tail call i32 @kref_put(ptr noundef nonnull %0, i32 noundef %4) #2
br label %6
6: ; preds = %3, %1
ret void
}
declare i32 @kref_put(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_usb_core_extr_hcd.c_usb_put_hcd |
; ModuleID = 'AnghaBench/zstd/contrib/linux-kernel/lib/zstd/extr_compress.c_ZSTD_minGain.c'
source_filename = "AnghaBench/zstd/contrib/linux-kernel/lib/zstd/extr_compress.c_ZSTD_minGain.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @ZSTD_minGain], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal i64 @ZSTD_minGain(i64 noundef %0) #0 {
%2 = lshr i64 %0, 6
%3 = add nuw nsw i64 %2, 2
ret i64 %3
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/zstd/contrib/linux-kernel/lib/zstd/extr_compress.c_ZSTD_minGain.c'
source_filename = "AnghaBench/zstd/contrib/linux-kernel/lib/zstd/extr_compress.c_ZSTD_minGain.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ZSTD_minGain], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal range(i64 2, 288230376151711746) i64 @ZSTD_minGain(i64 noundef %0) #0 {
%2 = lshr i64 %0, 6
%3 = add nuw nsw i64 %2, 2
ret i64 %3
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| zstd_contrib_linux-kernel_lib_zstd_extr_compress.c_ZSTD_minGain |
; ModuleID = 'AnghaBench/linux/arch/x86/crypto/extr_serpent_sse2_glue.c_ctr_crypt.c'
source_filename = "AnghaBench/linux/arch/x86/crypto/extr_serpent_sse2_glue.c_ctr_crypt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@serpent_ctr = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ctr_crypt], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ctr_crypt(ptr noundef %0) #0 {
%2 = tail call i32 @glue_ctr_req_128bit(ptr noundef nonnull @serpent_ctr, ptr noundef %0) #2
ret i32 %2
}
declare i32 @glue_ctr_req_128bit(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/arch/x86/crypto/extr_serpent_sse2_glue.c_ctr_crypt.c'
source_filename = "AnghaBench/linux/arch/x86/crypto/extr_serpent_sse2_glue.c_ctr_crypt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@serpent_ctr = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ctr_crypt], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ctr_crypt(ptr noundef %0) #0 {
%2 = tail call i32 @glue_ctr_req_128bit(ptr noundef nonnull @serpent_ctr, ptr noundef %0) #2
ret i32 %2
}
declare i32 @glue_ctr_req_128bit(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_arch_x86_crypto_extr_serpent_sse2_glue.c_ctr_crypt |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/extr_omap24xxcam-dma.c_omap24xxcam_dma_hwinit.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/extr_omap24xxcam-dma.c_omap24xxcam_dma_hwinit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.omap24xxcam_dma = type { i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local void @omap24xxcam_dma_hwinit(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @spin_lock_irqsave(ptr noundef %0, i64 noundef undef) #2
%3 = getelementptr inbounds %struct.omap24xxcam_dma, ptr %0, i64 0, i32 1
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = tail call i32 @omap24xxcam_dmahw_init(i32 noundef %4) #2
%6 = tail call i32 @spin_unlock_irqrestore(ptr noundef %0, i64 noundef undef) #2
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @omap24xxcam_dmahw_init(i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"omap24xxcam_dma", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/extr_omap24xxcam-dma.c_omap24xxcam_dma_hwinit.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/extr_omap24xxcam-dma.c_omap24xxcam_dma_hwinit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @omap24xxcam_dma_hwinit(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @spin_lock_irqsave(ptr noundef %0, i64 noundef undef) #2
%3 = getelementptr inbounds i8, ptr %0, i64 4
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = tail call i32 @omap24xxcam_dmahw_init(i32 noundef %4) #2
%6 = tail call i32 @spin_unlock_irqrestore(ptr noundef %0, i64 noundef undef) #2
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @omap24xxcam_dmahw_init(i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"omap24xxcam_dma", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_media_video_extr_omap24xxcam-dma.c_omap24xxcam_dma_hwinit |
; ModuleID = 'AnghaBench/linux/drivers/scsi/bfa/extr_bfa_fcs.h_bfa_fcs_rport_get_halrport.c'
source_filename = "AnghaBench/linux/drivers/scsi/bfa/extr_bfa_fcs.h_bfa_fcs_rport_get_halrport.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @bfa_fcs_rport_get_halrport], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define internal ptr @bfa_fcs_rport_get_halrport(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
ret ptr %2
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"bfa_fcs_rport_s", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/bfa/extr_bfa_fcs.h_bfa_fcs_rport_get_halrport.c'
source_filename = "AnghaBench/linux/drivers/scsi/bfa/extr_bfa_fcs.h_bfa_fcs_rport_get_halrport.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @bfa_fcs_rport_get_halrport], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal ptr @bfa_fcs_rport_get_halrport(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
ret ptr %2
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"bfa_fcs_rport_s", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_scsi_bfa_extr_bfa_fcs.h_bfa_fcs_rport_get_halrport |
; ModuleID = 'AnghaBench/freebsd/sys/dev/bwn/extr_if_bwn_phy_lp.c_bwn_phy_lp_b2062_switch_channel.c'
source_filename = "AnghaBench/freebsd/sys/dev/bwn/extr_if_bwn_phy_lp.c_bwn_phy_lp_b2062_switch_channel.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bwn_mac = type { %struct.TYPE_2__, ptr }
%struct.TYPE_2__ = type { %struct.bwn_phy_lp }
%struct.bwn_phy_lp = type { i32 }
%struct.bwn_b206x_chan = type { i64, ptr }
@bwn_b2062_chantable = dso_local local_unnamed_addr global ptr null, align 8
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@BHND_CLOCK_ALP = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [36 x i8] c"failed to fetch clock frequency: %d\00", align 1
@BWN_B2062_S_RFPLLCTL14 = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_N_LGENATUNE0 = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_N_LGENATUNE2 = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_N_LGENATUNE3 = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_N_TX_TUNE = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_LGENG_CTL1 = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_N_LGENACTL5 = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_N_LGENACTL6 = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_N_TX_PGA = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_N_TX_PAD = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL33 = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL34 = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL26 = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL27 = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL28 = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL29 = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL19 = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL23 = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL24 = dso_local local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL3 = dso_local local_unnamed_addr global i32 0, align 4
@EIO = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @bwn_phy_lp_b2062_switch_channel], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @bwn_phy_lp_b2062_switch_channel(ptr noundef %0, i64 noundef %1) #0 {
%3 = alloca i32, align 4
%4 = getelementptr inbounds %struct.bwn_mac, ptr %0, i64 0, i32 1
%5 = load ptr, ptr %4, align 8, !tbaa !5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%6 = load ptr, ptr @bwn_b2062_chantable, align 8, !tbaa !13
%7 = tail call i32 @N(ptr noundef %6) #3
%8 = icmp sgt i32 %7, 0
br i1 %8, label %14, label %20
9: ; preds = %14
%10 = add nuw nsw i64 %15, 1
%11 = tail call i32 @N(ptr noundef nonnull %16) #3
%12 = sext i32 %11 to i64
%13 = icmp slt i64 %10, %12
br i1 %13, label %14, label %20, !llvm.loop !14
14: ; preds = %2, %9
%15 = phi i64 [ %10, %9 ], [ 0, %2 ]
%16 = load ptr, ptr @bwn_b2062_chantable, align 8, !tbaa !13
%17 = getelementptr inbounds %struct.bwn_b206x_chan, ptr %16, i64 %15
%18 = load i64, ptr %17, align 8, !tbaa !16
%19 = icmp eq i64 %18, %1
br i1 %19, label %22, label %9
20: ; preds = %9, %2
%21 = load i32, ptr @EINVAL, align 4, !tbaa !19
br label %155
22: ; preds = %14
%23 = load i32, ptr %5, align 4, !tbaa !20
%24 = load i32, ptr @BHND_CLOCK_ALP, align 4, !tbaa !19
%25 = call i32 @bhnd_get_clock_freq(i32 noundef %23, i32 noundef %24, ptr noundef nonnull %3) #3
%26 = icmp eq i32 %25, 0
br i1 %26, label %30, label %27
27: ; preds = %22
%28 = load i32, ptr %5, align 4, !tbaa !20
%29 = call i32 @device_printf(i32 noundef %28, ptr noundef nonnull @.str, i32 noundef %25) #3
br label %155
30: ; preds = %22
%31 = load i32, ptr @BWN_B2062_S_RFPLLCTL14, align 4, !tbaa !19
%32 = call i32 @BWN_RF_SET(ptr noundef %0, i32 noundef %31, i32 noundef 4) #3
%33 = load i32, ptr @BWN_B2062_N_LGENATUNE0, align 4, !tbaa !19
%34 = getelementptr inbounds %struct.bwn_b206x_chan, ptr %16, i64 %15, i32 1
%35 = load ptr, ptr %34, align 8, !tbaa !22
%36 = load i32, ptr %35, align 4, !tbaa !19
%37 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %33, i32 noundef %36) #3
%38 = load i32, ptr @BWN_B2062_N_LGENATUNE2, align 4, !tbaa !19
%39 = load ptr, ptr %34, align 8, !tbaa !22
%40 = getelementptr inbounds i32, ptr %39, i64 1
%41 = load i32, ptr %40, align 4, !tbaa !19
%42 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %38, i32 noundef %41) #3
%43 = load i32, ptr @BWN_B2062_N_LGENATUNE3, align 4, !tbaa !19
%44 = load ptr, ptr %34, align 8, !tbaa !22
%45 = getelementptr inbounds i32, ptr %44, i64 2
%46 = load i32, ptr %45, align 4, !tbaa !19
%47 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %43, i32 noundef %46) #3
%48 = load i32, ptr @BWN_B2062_N_TX_TUNE, align 4, !tbaa !19
%49 = load ptr, ptr %34, align 8, !tbaa !22
%50 = getelementptr inbounds i32, ptr %49, i64 3
%51 = load i32, ptr %50, align 4, !tbaa !19
%52 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %48, i32 noundef %51) #3
%53 = load i32, ptr @BWN_B2062_S_LGENG_CTL1, align 4, !tbaa !19
%54 = load ptr, ptr %34, align 8, !tbaa !22
%55 = getelementptr inbounds i32, ptr %54, i64 4
%56 = load i32, ptr %55, align 4, !tbaa !19
%57 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %53, i32 noundef %56) #3
%58 = load i32, ptr @BWN_B2062_N_LGENACTL5, align 4, !tbaa !19
%59 = load ptr, ptr %34, align 8, !tbaa !22
%60 = getelementptr inbounds i32, ptr %59, i64 5
%61 = load i32, ptr %60, align 4, !tbaa !19
%62 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %58, i32 noundef %61) #3
%63 = load i32, ptr @BWN_B2062_N_LGENACTL6, align 4, !tbaa !19
%64 = load ptr, ptr %34, align 8, !tbaa !22
%65 = getelementptr inbounds i32, ptr %64, i64 6
%66 = load i32, ptr %65, align 4, !tbaa !19
%67 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %63, i32 noundef %66) #3
%68 = load i32, ptr @BWN_B2062_N_TX_PGA, align 4, !tbaa !19
%69 = load ptr, ptr %34, align 8, !tbaa !22
%70 = getelementptr inbounds i32, ptr %69, i64 7
%71 = load i32, ptr %70, align 4, !tbaa !19
%72 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %68, i32 noundef %71) #3
%73 = load i32, ptr @BWN_B2062_N_TX_PAD, align 4, !tbaa !19
%74 = load ptr, ptr %34, align 8, !tbaa !22
%75 = getelementptr inbounds i32, ptr %74, i64 8
%76 = load i32, ptr %75, align 4, !tbaa !19
%77 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %73, i32 noundef %76) #3
%78 = load i32, ptr @BWN_B2062_S_RFPLLCTL33, align 4, !tbaa !19
%79 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %78, i32 noundef 204) #3
%80 = load i32, ptr @BWN_B2062_S_RFPLLCTL34, align 4, !tbaa !19
%81 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %80, i32 noundef 7) #3
%82 = call i32 @bwn_phy_lp_b2062_reset_pllbias(ptr noundef %0) #3
%83 = load i32, ptr %3, align 4, !tbaa !19
%84 = sdiv i32 %83, 1000
%85 = load i32, ptr %0, align 4, !tbaa !23
%86 = mul nsw i32 %85, 1000
%87 = call i32 @ieee80211_ieee2mhz(i64 noundef %1, i32 noundef 0) #3
%88 = mul nsw i32 %86, %87
%89 = call i32 @ieee80211_ieee2mhz(i64 noundef %1, i32 noundef 0) #3
%90 = icmp slt i32 %89, 4000
%91 = zext i1 %90 to i32
%92 = shl nsw i32 %88, %91
%93 = mul nsw i32 %84, 48
%94 = sdiv i32 %92, %93
%95 = srem i32 %92, %93
%96 = load i32, ptr @BWN_B2062_S_RFPLLCTL26, align 4, !tbaa !19
%97 = call i32 @BWN_RF_WRITE(ptr noundef nonnull %0, i32 noundef %96, i32 noundef %94) #3
%98 = shl nsw i32 %95, 8
%99 = sdiv i32 %98, %93
%100 = srem i32 %98, %93
%101 = load i32, ptr @BWN_B2062_S_RFPLLCTL27, align 4, !tbaa !19
%102 = call i32 @BWN_RF_WRITE(ptr noundef nonnull %0, i32 noundef %101, i32 noundef %99) #3
%103 = shl nsw i32 %100, 8
%104 = sdiv i32 %103, %93
%105 = srem i32 %103, %93
%106 = load i32, ptr @BWN_B2062_S_RFPLLCTL28, align 4, !tbaa !19
%107 = call i32 @BWN_RF_WRITE(ptr noundef nonnull %0, i32 noundef %106, i32 noundef %104) #3
%108 = shl nsw i32 %105, 8
%109 = sdiv i32 %108, %93
%110 = srem i32 %108, %93
%111 = load i32, ptr @BWN_B2062_S_RFPLLCTL29, align 4, !tbaa !19
%112 = shl nsw i32 %110, 1
%113 = sdiv i32 %112, %93
%114 = add nsw i32 %113, %109
%115 = call i32 @BWN_RF_WRITE(ptr noundef nonnull %0, i32 noundef %111, i32 noundef %114) #3
%116 = load i32, ptr @BWN_B2062_S_RFPLLCTL19, align 4, !tbaa !19
%117 = call i32 @BWN_RF_READ(ptr noundef nonnull %0, i32 noundef %116) #3
%118 = shl nsw i32 %92, 1
%119 = add nsw i32 %117, 1
%120 = mul nsw i32 %118, %119
%121 = mul nsw i32 %84, 3
%122 = add nsw i32 %120, %121
%123 = mul nsw i32 %84, 6
%124 = sdiv i32 %122, %123
%125 = load i32, ptr @BWN_B2062_S_RFPLLCTL23, align 4, !tbaa !19
%126 = ashr i32 %124, 8
%127 = add nsw i32 %126, 16
%128 = call i32 @BWN_RF_WRITE(ptr noundef nonnull %0, i32 noundef %125, i32 noundef %127) #3
%129 = load i32, ptr @BWN_B2062_S_RFPLLCTL24, align 4, !tbaa !19
%130 = and i32 %124, 255
%131 = call i32 @BWN_RF_WRITE(ptr noundef nonnull %0, i32 noundef %129, i32 noundef %130) #3
%132 = call i32 @bwn_phy_lp_b2062_vco_calib(ptr noundef nonnull %0) #3
%133 = load i32, ptr @BWN_B2062_S_RFPLLCTL3, align 4, !tbaa !19
%134 = call i32 @BWN_RF_READ(ptr noundef nonnull %0, i32 noundef %133) #3
%135 = and i32 %134, 16
%136 = icmp eq i32 %135, 0
br i1 %136, label %152, label %137
137: ; preds = %30
%138 = load i32, ptr @BWN_B2062_S_RFPLLCTL33, align 4, !tbaa !19
%139 = call i32 @BWN_RF_WRITE(ptr noundef nonnull %0, i32 noundef %138, i32 noundef 252) #3
%140 = load i32, ptr @BWN_B2062_S_RFPLLCTL34, align 4, !tbaa !19
%141 = call i32 @BWN_RF_WRITE(ptr noundef nonnull %0, i32 noundef %140, i32 noundef 0) #3
%142 = call i32 @bwn_phy_lp_b2062_reset_pllbias(ptr noundef nonnull %0) #3
%143 = call i32 @bwn_phy_lp_b2062_vco_calib(ptr noundef nonnull %0) #3
%144 = load i32, ptr @BWN_B2062_S_RFPLLCTL3, align 4, !tbaa !19
%145 = call i32 @BWN_RF_READ(ptr noundef nonnull %0, i32 noundef %144) #3
%146 = and i32 %145, 16
%147 = icmp eq i32 %146, 0
br i1 %147, label %152, label %148
148: ; preds = %137
%149 = load i32, ptr @BWN_B2062_S_RFPLLCTL14, align 4, !tbaa !19
%150 = call i32 @BWN_RF_MASK(ptr noundef nonnull %0, i32 noundef %149, i32 noundef -5) #3
%151 = load i32, ptr @EIO, align 4, !tbaa !19
br label %155
152: ; preds = %137, %30
%153 = load i32, ptr @BWN_B2062_S_RFPLLCTL14, align 4, !tbaa !19
%154 = call i32 @BWN_RF_MASK(ptr noundef nonnull %0, i32 noundef %153, i32 noundef -5) #3
br label %155
155: ; preds = %152, %148, %27, %20
%156 = phi i32 [ %21, %20 ], [ %25, %27 ], [ %151, %148 ], [ 0, %152 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %156
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @N(ptr noundef) local_unnamed_addr #2
declare i32 @bhnd_get_clock_freq(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @device_printf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BWN_RF_SET(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BWN_RF_WRITE(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @bwn_phy_lp_b2062_reset_pllbias(ptr noundef) local_unnamed_addr #2
declare i32 @ieee80211_ieee2mhz(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BWN_RF_READ(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @bwn_phy_lp_b2062_vco_calib(ptr noundef) local_unnamed_addr #2
declare i32 @BWN_RF_MASK(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !12, i64 8}
!6 = !{!"bwn_mac", !7, i64 0, !12, i64 8}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"bwn_phy_lp", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!12, !12, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!17, !18, i64 0}
!17 = !{!"bwn_b206x_chan", !18, i64 0, !12, i64 8}
!18 = !{!"long", !10, i64 0}
!19 = !{!9, !9, i64 0}
!20 = !{!21, !9, i64 0}
!21 = !{!"bwn_softc", !9, i64 0}
!22 = !{!17, !12, i64 8}
!23 = !{!8, !9, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/bwn/extr_if_bwn_phy_lp.c_bwn_phy_lp_b2062_switch_channel.c'
source_filename = "AnghaBench/freebsd/sys/dev/bwn/extr_if_bwn_phy_lp.c_bwn_phy_lp_b2062_switch_channel.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.bwn_b206x_chan = type { i64, ptr }
@bwn_b2062_chantable = common local_unnamed_addr global ptr null, align 8
@EINVAL = common local_unnamed_addr global i32 0, align 4
@BHND_CLOCK_ALP = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [36 x i8] c"failed to fetch clock frequency: %d\00", align 1
@BWN_B2062_S_RFPLLCTL14 = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_N_LGENATUNE0 = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_N_LGENATUNE2 = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_N_LGENATUNE3 = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_N_TX_TUNE = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_LGENG_CTL1 = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_N_LGENACTL5 = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_N_LGENACTL6 = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_N_TX_PGA = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_N_TX_PAD = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL33 = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL34 = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL26 = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL27 = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL28 = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL29 = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL19 = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL23 = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL24 = common local_unnamed_addr global i32 0, align 4
@BWN_B2062_S_RFPLLCTL3 = common local_unnamed_addr global i32 0, align 4
@EIO = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @bwn_phy_lp_b2062_switch_channel], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @bwn_phy_lp_b2062_switch_channel(ptr noundef %0, i64 noundef %1) #0 {
%3 = alloca i32, align 4
%4 = getelementptr inbounds i8, ptr %0, i64 8
%5 = load ptr, ptr %4, align 8, !tbaa !6
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%6 = load ptr, ptr @bwn_b2062_chantable, align 8, !tbaa !14
%7 = tail call i32 @N(ptr noundef %6) #3
%8 = icmp sgt i32 %7, 0
br i1 %8, label %14, label %20
9: ; preds = %14
%10 = add nuw nsw i64 %15, 1
%11 = tail call i32 @N(ptr noundef nonnull %16) #3
%12 = sext i32 %11 to i64
%13 = icmp slt i64 %10, %12
br i1 %13, label %14, label %20, !llvm.loop !15
14: ; preds = %2, %9
%15 = phi i64 [ %10, %9 ], [ 0, %2 ]
%16 = load ptr, ptr @bwn_b2062_chantable, align 8, !tbaa !14
%17 = getelementptr inbounds %struct.bwn_b206x_chan, ptr %16, i64 %15
%18 = load i64, ptr %17, align 8, !tbaa !17
%19 = icmp eq i64 %18, %1
br i1 %19, label %22, label %9
20: ; preds = %9, %2
%21 = load i32, ptr @EINVAL, align 4, !tbaa !20
br label %165
22: ; preds = %14
%23 = load i32, ptr %5, align 4, !tbaa !21
%24 = load i32, ptr @BHND_CLOCK_ALP, align 4, !tbaa !20
%25 = call i32 @bhnd_get_clock_freq(i32 noundef %23, i32 noundef %24, ptr noundef nonnull %3) #3
%26 = icmp eq i32 %25, 0
br i1 %26, label %30, label %27
27: ; preds = %22
%28 = load i32, ptr %5, align 4, !tbaa !21
%29 = call i32 @device_printf(i32 noundef %28, ptr noundef nonnull @.str, i32 noundef %25) #3
br label %165
30: ; preds = %22
%31 = load i32, ptr @BWN_B2062_S_RFPLLCTL14, align 4, !tbaa !20
%32 = call i32 @BWN_RF_SET(ptr noundef %0, i32 noundef %31, i32 noundef 4) #3
%33 = load i32, ptr @BWN_B2062_N_LGENATUNE0, align 4, !tbaa !20
%34 = getelementptr inbounds %struct.bwn_b206x_chan, ptr %16, i64 %15, i32 1
%35 = load ptr, ptr %34, align 8, !tbaa !23
%36 = load i32, ptr %35, align 4, !tbaa !20
%37 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %33, i32 noundef %36) #3
%38 = load i32, ptr @BWN_B2062_N_LGENATUNE2, align 4, !tbaa !20
%39 = load ptr, ptr %34, align 8, !tbaa !23
%40 = getelementptr inbounds i8, ptr %39, i64 4
%41 = load i32, ptr %40, align 4, !tbaa !20
%42 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %38, i32 noundef %41) #3
%43 = load i32, ptr @BWN_B2062_N_LGENATUNE3, align 4, !tbaa !20
%44 = load ptr, ptr %34, align 8, !tbaa !23
%45 = getelementptr inbounds i8, ptr %44, i64 8
%46 = load i32, ptr %45, align 4, !tbaa !20
%47 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %43, i32 noundef %46) #3
%48 = load i32, ptr @BWN_B2062_N_TX_TUNE, align 4, !tbaa !20
%49 = load ptr, ptr %34, align 8, !tbaa !23
%50 = getelementptr inbounds i8, ptr %49, i64 12
%51 = load i32, ptr %50, align 4, !tbaa !20
%52 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %48, i32 noundef %51) #3
%53 = load i32, ptr @BWN_B2062_S_LGENG_CTL1, align 4, !tbaa !20
%54 = load ptr, ptr %34, align 8, !tbaa !23
%55 = getelementptr inbounds i8, ptr %54, i64 16
%56 = load i32, ptr %55, align 4, !tbaa !20
%57 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %53, i32 noundef %56) #3
%58 = load i32, ptr @BWN_B2062_N_LGENACTL5, align 4, !tbaa !20
%59 = load ptr, ptr %34, align 8, !tbaa !23
%60 = getelementptr inbounds i8, ptr %59, i64 20
%61 = load i32, ptr %60, align 4, !tbaa !20
%62 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %58, i32 noundef %61) #3
%63 = load i32, ptr @BWN_B2062_N_LGENACTL6, align 4, !tbaa !20
%64 = load ptr, ptr %34, align 8, !tbaa !23
%65 = getelementptr inbounds i8, ptr %64, i64 24
%66 = load i32, ptr %65, align 4, !tbaa !20
%67 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %63, i32 noundef %66) #3
%68 = load i32, ptr @BWN_B2062_N_TX_PGA, align 4, !tbaa !20
%69 = load ptr, ptr %34, align 8, !tbaa !23
%70 = getelementptr inbounds i8, ptr %69, i64 28
%71 = load i32, ptr %70, align 4, !tbaa !20
%72 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %68, i32 noundef %71) #3
%73 = load i32, ptr @BWN_B2062_N_TX_PAD, align 4, !tbaa !20
%74 = load ptr, ptr %34, align 8, !tbaa !23
%75 = getelementptr inbounds i8, ptr %74, i64 32
%76 = load i32, ptr %75, align 4, !tbaa !20
%77 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %73, i32 noundef %76) #3
%78 = load i32, ptr @BWN_B2062_S_RFPLLCTL33, align 4, !tbaa !20
%79 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %78, i32 noundef 204) #3
%80 = load i32, ptr @BWN_B2062_S_RFPLLCTL34, align 4, !tbaa !20
%81 = call i32 @BWN_RF_WRITE(ptr noundef %0, i32 noundef %80, i32 noundef 7) #3
%82 = call i32 @bwn_phy_lp_b2062_reset_pllbias(ptr noundef %0) #3
%83 = load i32, ptr %3, align 4, !tbaa !20
%84 = sdiv i32 %83, 1000
%85 = load i32, ptr %0, align 4, !tbaa !24
%86 = mul nsw i32 %85, 1000
%87 = call i32 @ieee80211_ieee2mhz(i64 noundef %1, i32 noundef 0) #3
%88 = mul nsw i32 %86, %87
%89 = call i32 @ieee80211_ieee2mhz(i64 noundef %1, i32 noundef 0) #3
%90 = icmp slt i32 %89, 4000
%91 = zext i1 %90 to i32
%92 = shl nsw i32 %88, %91
%93 = mul nsw i32 %84, 48
%94 = freeze i32 %92
%95 = freeze i32 %93
%96 = sdiv i32 %94, %95
%97 = mul i32 %96, %95
%98 = sub i32 %94, %97
%99 = load i32, ptr @BWN_B2062_S_RFPLLCTL26, align 4, !tbaa !20
%100 = call i32 @BWN_RF_WRITE(ptr noundef nonnull %0, i32 noundef %99, i32 noundef %96) #3
%101 = shl nsw i32 %98, 8
%102 = freeze i32 %93
%103 = sdiv i32 %101, %102
%104 = mul i32 %103, %102
%105 = sub i32 %101, %104
%106 = load i32, ptr @BWN_B2062_S_RFPLLCTL27, align 4, !tbaa !20
%107 = call i32 @BWN_RF_WRITE(ptr noundef nonnull %0, i32 noundef %106, i32 noundef %103) #3
%108 = shl nsw i32 %105, 8
%109 = freeze i32 %93
%110 = sdiv i32 %108, %109
%111 = mul i32 %110, %109
%112 = sub i32 %108, %111
%113 = load i32, ptr @BWN_B2062_S_RFPLLCTL28, align 4, !tbaa !20
%114 = call i32 @BWN_RF_WRITE(ptr noundef nonnull %0, i32 noundef %113, i32 noundef %110) #3
%115 = shl nsw i32 %112, 8
%116 = freeze i32 %115
%117 = freeze i32 %93
%118 = sdiv i32 %116, %117
%119 = mul i32 %118, %117
%120 = sub i32 %116, %119
%121 = load i32, ptr @BWN_B2062_S_RFPLLCTL29, align 4, !tbaa !20
%122 = shl nsw i32 %120, 1
%123 = sdiv i32 %122, %93
%124 = add nsw i32 %123, %118
%125 = call i32 @BWN_RF_WRITE(ptr noundef nonnull %0, i32 noundef %121, i32 noundef %124) #3
%126 = load i32, ptr @BWN_B2062_S_RFPLLCTL19, align 4, !tbaa !20
%127 = call i32 @BWN_RF_READ(ptr noundef nonnull %0, i32 noundef %126) #3
%128 = shl nsw i32 %92, 1
%129 = add nsw i32 %127, 1
%130 = mul nsw i32 %128, %129
%131 = mul nsw i32 %84, 3
%132 = add nsw i32 %130, %131
%133 = mul nsw i32 %84, 6
%134 = sdiv i32 %132, %133
%135 = load i32, ptr @BWN_B2062_S_RFPLLCTL23, align 4, !tbaa !20
%136 = ashr i32 %134, 8
%137 = add nsw i32 %136, 16
%138 = call i32 @BWN_RF_WRITE(ptr noundef nonnull %0, i32 noundef %135, i32 noundef %137) #3
%139 = load i32, ptr @BWN_B2062_S_RFPLLCTL24, align 4, !tbaa !20
%140 = and i32 %134, 255
%141 = call i32 @BWN_RF_WRITE(ptr noundef nonnull %0, i32 noundef %139, i32 noundef %140) #3
%142 = call i32 @bwn_phy_lp_b2062_vco_calib(ptr noundef nonnull %0) #3
%143 = load i32, ptr @BWN_B2062_S_RFPLLCTL3, align 4, !tbaa !20
%144 = call i32 @BWN_RF_READ(ptr noundef nonnull %0, i32 noundef %143) #3
%145 = and i32 %144, 16
%146 = icmp eq i32 %145, 0
br i1 %146, label %162, label %147
147: ; preds = %30
%148 = load i32, ptr @BWN_B2062_S_RFPLLCTL33, align 4, !tbaa !20
%149 = call i32 @BWN_RF_WRITE(ptr noundef nonnull %0, i32 noundef %148, i32 noundef 252) #3
%150 = load i32, ptr @BWN_B2062_S_RFPLLCTL34, align 4, !tbaa !20
%151 = call i32 @BWN_RF_WRITE(ptr noundef nonnull %0, i32 noundef %150, i32 noundef 0) #3
%152 = call i32 @bwn_phy_lp_b2062_reset_pllbias(ptr noundef nonnull %0) #3
%153 = call i32 @bwn_phy_lp_b2062_vco_calib(ptr noundef nonnull %0) #3
%154 = load i32, ptr @BWN_B2062_S_RFPLLCTL3, align 4, !tbaa !20
%155 = call i32 @BWN_RF_READ(ptr noundef nonnull %0, i32 noundef %154) #3
%156 = and i32 %155, 16
%157 = icmp eq i32 %156, 0
br i1 %157, label %162, label %158
158: ; preds = %147
%159 = load i32, ptr @BWN_B2062_S_RFPLLCTL14, align 4, !tbaa !20
%160 = call i32 @BWN_RF_MASK(ptr noundef nonnull %0, i32 noundef %159, i32 noundef -5) #3
%161 = load i32, ptr @EIO, align 4, !tbaa !20
br label %165
162: ; preds = %147, %30
%163 = load i32, ptr @BWN_B2062_S_RFPLLCTL14, align 4, !tbaa !20
%164 = call i32 @BWN_RF_MASK(ptr noundef nonnull %0, i32 noundef %163, i32 noundef -5) #3
br label %165
165: ; preds = %162, %158, %27, %20
%166 = phi i32 [ %21, %20 ], [ %25, %27 ], [ %161, %158 ], [ 0, %162 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %166
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @N(ptr noundef) local_unnamed_addr #2
declare i32 @bhnd_get_clock_freq(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @device_printf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BWN_RF_SET(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BWN_RF_WRITE(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @bwn_phy_lp_b2062_reset_pllbias(ptr noundef) local_unnamed_addr #2
declare i32 @ieee80211_ieee2mhz(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BWN_RF_READ(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @bwn_phy_lp_b2062_vco_calib(ptr noundef) local_unnamed_addr #2
declare i32 @BWN_RF_MASK(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !13, i64 8}
!7 = !{!"bwn_mac", !8, i64 0, !13, i64 8}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"bwn_phy_lp", !10, i64 0}
!10 = !{!"int", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C/C++ TBAA"}
!13 = !{!"any pointer", !11, i64 0}
!14 = !{!13, !13, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!18, !19, i64 0}
!18 = !{!"bwn_b206x_chan", !19, i64 0, !13, i64 8}
!19 = !{!"long", !11, i64 0}
!20 = !{!10, !10, i64 0}
!21 = !{!22, !10, i64 0}
!22 = !{!"bwn_softc", !10, i64 0}
!23 = !{!18, !13, i64 8}
!24 = !{!9, !10, i64 0}
| freebsd_sys_dev_bwn_extr_if_bwn_phy_lp.c_bwn_phy_lp_b2062_switch_channel |
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Mayaqua/extr_Kernel.c_SystemToTm.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Mayaqua/extr_Kernel.c_SystemToTm.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32, i32, i32, i32, i32 }
%struct.tm = type { i32, ptr, ptr, ptr, ptr, ptr, ptr }
; Function Attrs: nounwind uwtable
define dso_local void @SystemToTm(ptr noundef %0, ptr noundef readonly %1) local_unnamed_addr #0 {
%3 = icmp eq ptr %0, null
%4 = icmp eq ptr %1, null
%5 = or i1 %3, %4
br i1 %5, label %34, label %6
6: ; preds = %2
%7 = tail call i32 @Zero(ptr noundef nonnull %0, i32 noundef 56) #2
%8 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 5
%9 = load i32, ptr %8, align 4, !tbaa !5
%10 = tail call ptr @MAKESURE(i32 noundef %9, i32 noundef 1970, i32 noundef 2099) #2
%11 = getelementptr inbounds i8, ptr %10, i64 -1900
%12 = getelementptr inbounds %struct.tm, ptr %0, i64 0, i32 6
store ptr %11, ptr %12, align 8, !tbaa !10
%13 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 4
%14 = load i32, ptr %13, align 4, !tbaa !13
%15 = tail call ptr @MAKESURE(i32 noundef %14, i32 noundef 1, i32 noundef 12) #2
%16 = getelementptr inbounds i8, ptr %15, i64 -1
%17 = getelementptr inbounds %struct.tm, ptr %0, i64 0, i32 5
store ptr %16, ptr %17, align 8, !tbaa !14
%18 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 3
%19 = load i32, ptr %18, align 4, !tbaa !15
%20 = tail call ptr @MAKESURE(i32 noundef %19, i32 noundef 1, i32 noundef 31) #2
%21 = getelementptr inbounds %struct.tm, ptr %0, i64 0, i32 4
store ptr %20, ptr %21, align 8, !tbaa !16
%22 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 2
%23 = load i32, ptr %22, align 4, !tbaa !17
%24 = tail call ptr @MAKESURE(i32 noundef %23, i32 noundef 0, i32 noundef 23) #2
%25 = getelementptr inbounds %struct.tm, ptr %0, i64 0, i32 3
store ptr %24, ptr %25, align 8, !tbaa !18
%26 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 1
%27 = load i32, ptr %26, align 4, !tbaa !19
%28 = tail call ptr @MAKESURE(i32 noundef %27, i32 noundef 0, i32 noundef 59) #2
%29 = getelementptr inbounds %struct.tm, ptr %0, i64 0, i32 2
store ptr %28, ptr %29, align 8, !tbaa !20
%30 = load i32, ptr %1, align 4, !tbaa !21
%31 = tail call ptr @MAKESURE(i32 noundef %30, i32 noundef 0, i32 noundef 59) #2
%32 = getelementptr inbounds %struct.tm, ptr %0, i64 0, i32 1
store ptr %31, ptr %32, align 8, !tbaa !22
store i32 -1, ptr %0, align 8, !tbaa !23
%33 = tail call i32 @NormalizeTm(ptr noundef nonnull %0) #2
br label %34
34: ; preds = %2, %6
ret void
}
declare i32 @Zero(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @MAKESURE(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @NormalizeTm(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 20}
!6 = !{!"TYPE_3__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 48}
!11 = !{!"tm", !7, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!6, !7, i64 16}
!14 = !{!11, !12, i64 40}
!15 = !{!6, !7, i64 12}
!16 = !{!11, !12, i64 32}
!17 = !{!6, !7, i64 8}
!18 = !{!11, !12, i64 24}
!19 = !{!6, !7, i64 4}
!20 = !{!11, !12, i64 16}
!21 = !{!6, !7, i64 0}
!22 = !{!11, !12, i64 8}
!23 = !{!11, !7, i64 0}
| ; ModuleID = 'AnghaBench/SoftEtherVPN/src/Mayaqua/extr_Kernel.c_SystemToTm.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Mayaqua/extr_Kernel.c_SystemToTm.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @SystemToTm(ptr noundef %0, ptr noundef readonly %1) local_unnamed_addr #0 {
%3 = icmp eq ptr %0, null
%4 = icmp eq ptr %1, null
%5 = or i1 %3, %4
br i1 %5, label %34, label %6
6: ; preds = %2
%7 = tail call i32 @Zero(ptr noundef nonnull %0, i32 noundef 56) #2
%8 = getelementptr inbounds i8, ptr %1, i64 20
%9 = load i32, ptr %8, align 4, !tbaa !6
%10 = tail call ptr @MAKESURE(i32 noundef %9, i32 noundef 1970, i32 noundef 2099) #2
%11 = getelementptr inbounds i8, ptr %10, i64 -1900
%12 = getelementptr inbounds i8, ptr %0, i64 48
store ptr %11, ptr %12, align 8, !tbaa !11
%13 = getelementptr inbounds i8, ptr %1, i64 16
%14 = load i32, ptr %13, align 4, !tbaa !14
%15 = tail call ptr @MAKESURE(i32 noundef %14, i32 noundef 1, i32 noundef 12) #2
%16 = getelementptr inbounds i8, ptr %15, i64 -1
%17 = getelementptr inbounds i8, ptr %0, i64 40
store ptr %16, ptr %17, align 8, !tbaa !15
%18 = getelementptr inbounds i8, ptr %1, i64 12
%19 = load i32, ptr %18, align 4, !tbaa !16
%20 = tail call ptr @MAKESURE(i32 noundef %19, i32 noundef 1, i32 noundef 31) #2
%21 = getelementptr inbounds i8, ptr %0, i64 32
store ptr %20, ptr %21, align 8, !tbaa !17
%22 = getelementptr inbounds i8, ptr %1, i64 8
%23 = load i32, ptr %22, align 4, !tbaa !18
%24 = tail call ptr @MAKESURE(i32 noundef %23, i32 noundef 0, i32 noundef 23) #2
%25 = getelementptr inbounds i8, ptr %0, i64 24
store ptr %24, ptr %25, align 8, !tbaa !19
%26 = getelementptr inbounds i8, ptr %1, i64 4
%27 = load i32, ptr %26, align 4, !tbaa !20
%28 = tail call ptr @MAKESURE(i32 noundef %27, i32 noundef 0, i32 noundef 59) #2
%29 = getelementptr inbounds i8, ptr %0, i64 16
store ptr %28, ptr %29, align 8, !tbaa !21
%30 = load i32, ptr %1, align 4, !tbaa !22
%31 = tail call ptr @MAKESURE(i32 noundef %30, i32 noundef 0, i32 noundef 59) #2
%32 = getelementptr inbounds i8, ptr %0, i64 8
store ptr %31, ptr %32, align 8, !tbaa !23
store i32 -1, ptr %0, align 8, !tbaa !24
%33 = tail call i32 @NormalizeTm(ptr noundef nonnull %0) #2
br label %34
34: ; preds = %2, %6
ret void
}
declare i32 @Zero(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @MAKESURE(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @NormalizeTm(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 20}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 48}
!12 = !{!"tm", !8, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !13, i64 48}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!7, !8, i64 16}
!15 = !{!12, !13, i64 40}
!16 = !{!7, !8, i64 12}
!17 = !{!12, !13, i64 32}
!18 = !{!7, !8, i64 8}
!19 = !{!12, !13, i64 24}
!20 = !{!7, !8, i64 4}
!21 = !{!12, !13, i64 16}
!22 = !{!7, !8, i64 0}
!23 = !{!12, !13, i64 8}
!24 = !{!12, !8, i64 0}
| SoftEtherVPN_src_Mayaqua_extr_Kernel.c_SystemToTm |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/bonding/extr_bond_alb.c_bond_alb_init_slave.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/bonding/extr_bond_alb.c_bond_alb_init_slave.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bonding = type { %struct.TYPE_2__, i32 }
%struct.TYPE_2__ = type { i32, i64, i32 }
@BOND_TLB_REBALANCE_TICKS = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @bond_alb_init_slave(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr %1, align 4, !tbaa !5
%4 = tail call i32 @alb_set_slave_mac_addr(ptr noundef nonnull %1, i32 noundef %3) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %20
6: ; preds = %2
%7 = getelementptr inbounds %struct.bonding, ptr %0, i64 0, i32 1
%8 = tail call i32 @read_lock(ptr noundef nonnull %7) #2
%9 = tail call i32 @alb_handle_addr_collision_on_attach(ptr noundef %0, ptr noundef nonnull %1) #2
%10 = tail call i32 @read_unlock(ptr noundef nonnull %7) #2
%11 = icmp eq i32 %9, 0
br i1 %11, label %12, label %20
12: ; preds = %6
%13 = tail call i32 @tlb_init_slave(ptr noundef nonnull %1) #2
%14 = load i32, ptr @BOND_TLB_REBALANCE_TICKS, align 4, !tbaa !10
%15 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 2
store i32 %14, ptr %15, align 8, !tbaa !11
%16 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 1
%17 = load i64, ptr %16, align 8, !tbaa !15
%18 = icmp eq i64 %17, 0
br i1 %18, label %20, label %19
19: ; preds = %12
store i32 1, ptr %0, align 8, !tbaa !16
br label %20
20: ; preds = %12, %19, %6, %2
%21 = phi i32 [ %4, %2 ], [ %9, %6 ], [ 0, %19 ], [ 0, %12 ]
ret i32 %21
}
declare i32 @alb_set_slave_mac_addr(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @read_lock(ptr noundef) local_unnamed_addr #1
declare i32 @alb_handle_addr_collision_on_attach(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @read_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @tlb_init_slave(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"slave", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !7, i64 16}
!12 = !{!"bonding", !13, i64 0, !7, i64 24}
!13 = !{!"TYPE_2__", !7, i64 0, !14, i64 8, !7, i64 16}
!14 = !{!"long", !8, i64 0}
!15 = !{!12, !14, i64 8}
!16 = !{!12, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/bonding/extr_bond_alb.c_bond_alb_init_slave.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/bonding/extr_bond_alb.c_bond_alb_init_slave.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BOND_TLB_REBALANCE_TICKS = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @bond_alb_init_slave(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr %1, align 4, !tbaa !6
%4 = tail call i32 @alb_set_slave_mac_addr(ptr noundef nonnull %1, i32 noundef %3) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %20
6: ; preds = %2
%7 = getelementptr inbounds i8, ptr %0, i64 24
%8 = tail call i32 @read_lock(ptr noundef nonnull %7) #2
%9 = tail call i32 @alb_handle_addr_collision_on_attach(ptr noundef %0, ptr noundef nonnull %1) #2
%10 = tail call i32 @read_unlock(ptr noundef nonnull %7) #2
%11 = icmp eq i32 %9, 0
br i1 %11, label %12, label %20
12: ; preds = %6
%13 = tail call i32 @tlb_init_slave(ptr noundef nonnull %1) #2
%14 = load i32, ptr @BOND_TLB_REBALANCE_TICKS, align 4, !tbaa !11
%15 = getelementptr inbounds i8, ptr %0, i64 16
store i32 %14, ptr %15, align 8, !tbaa !12
%16 = getelementptr inbounds i8, ptr %0, i64 8
%17 = load i64, ptr %16, align 8, !tbaa !16
%18 = icmp eq i64 %17, 0
br i1 %18, label %20, label %19
19: ; preds = %12
store i32 1, ptr %0, align 8, !tbaa !17
br label %20
20: ; preds = %12, %19, %6, %2
%21 = phi i32 [ %4, %2 ], [ %9, %6 ], [ 0, %19 ], [ 0, %12 ]
ret i32 %21
}
declare i32 @alb_set_slave_mac_addr(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @read_lock(ptr noundef) local_unnamed_addr #1
declare i32 @alb_handle_addr_collision_on_attach(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @read_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @tlb_init_slave(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"slave", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !8, i64 16}
!13 = !{!"bonding", !14, i64 0, !8, i64 24}
!14 = !{!"TYPE_2__", !8, i64 0, !15, i64 8, !8, i64 16}
!15 = !{!"long", !9, i64 0}
!16 = !{!13, !15, i64 8}
!17 = !{!13, !8, i64 0}
| fastsocket_kernel_drivers_net_bonding_extr_bond_alb.c_bond_alb_init_slave |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/steering/extr_dr_send.c_dr_handle_pending_wc.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/steering/extr_dr_send.c_dr_handle_pending_wc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mlx5dr_send_ring = type { i64, i64, i32 }
@TH_NUMS_TO_DRAIN = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @dr_handle_pending_wc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @dr_handle_pending_wc(ptr nocapture noundef readonly %0, ptr nocapture noundef %1) #0 {
%3 = load i64, ptr %1, align 8, !tbaa !5
%4 = getelementptr inbounds %struct.mlx5dr_send_ring, ptr %1, i64 0, i32 1
%5 = load i64, ptr %4, align 8, !tbaa !11
%6 = icmp slt i64 %3, %5
br i1 %6, label %29, label %7
7: ; preds = %2
%8 = load ptr, ptr %0, align 8, !tbaa !12
%9 = load i32, ptr %8, align 4, !tbaa !15
%10 = load i32, ptr @TH_NUMS_TO_DRAIN, align 4, !tbaa !17
%11 = mul nsw i32 %10, %9
%12 = sext i32 %11 to i64
%13 = icmp slt i64 %3, %12
%14 = getelementptr inbounds %struct.mlx5dr_send_ring, ptr %1, i64 0, i32 2
br label %15
15: ; preds = %26, %7
%16 = load i32, ptr %14, align 8, !tbaa !18
%17 = tail call i32 @dr_poll_cq(i32 noundef %16, i32 noundef 1) #2
%18 = icmp slt i32 %17, 0
br i1 %18, label %29, label %19
19: ; preds = %15
%20 = icmp eq i32 %17, 1
br i1 %20, label %21, label %25
21: ; preds = %19
%22 = load i64, ptr %4, align 8, !tbaa !11
%23 = load i64, ptr %1, align 8, !tbaa !5
%24 = sub nsw i64 %23, %22
store i64 %24, ptr %1, align 8, !tbaa !5
br label %25
25: ; preds = %21, %19
br i1 %13, label %29, label %26
26: ; preds = %25
%27 = load i64, ptr %1, align 8, !tbaa !5
%28 = icmp eq i64 %27, 0
br i1 %28, label %29, label %15, !llvm.loop !19
29: ; preds = %26, %25, %15, %2
%30 = phi i32 [ 0, %2 ], [ 0, %26 ], [ 0, %25 ], [ %17, %15 ]
ret i32 %30
}
declare i32 @dr_poll_cq(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"mlx5dr_send_ring", !7, i64 0, !7, i64 8, !10, i64 16}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !7, i64 8}
!12 = !{!13, !14, i64 0}
!13 = !{!"mlx5dr_domain", !14, i64 0}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!16, !10, i64 0}
!16 = !{!"TYPE_2__", !10, i64 0}
!17 = !{!10, !10, i64 0}
!18 = !{!6, !10, i64 16}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/steering/extr_dr_send.c_dr_handle_pending_wc.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/steering/extr_dr_send.c_dr_handle_pending_wc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TH_NUMS_TO_DRAIN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @dr_handle_pending_wc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483648, 1) i32 @dr_handle_pending_wc(ptr nocapture noundef readonly %0, ptr nocapture noundef %1) #0 {
%3 = load i64, ptr %1, align 8, !tbaa !6
%4 = getelementptr inbounds i8, ptr %1, i64 8
%5 = load i64, ptr %4, align 8, !tbaa !12
%6 = icmp slt i64 %3, %5
br i1 %6, label %29, label %7
7: ; preds = %2
%8 = load ptr, ptr %0, align 8, !tbaa !13
%9 = load i32, ptr %8, align 4, !tbaa !16
%10 = load i32, ptr @TH_NUMS_TO_DRAIN, align 4, !tbaa !18
%11 = mul nsw i32 %10, %9
%12 = sext i32 %11 to i64
%13 = icmp slt i64 %3, %12
%14 = getelementptr inbounds i8, ptr %1, i64 16
br label %15
15: ; preds = %26, %7
%16 = load i32, ptr %14, align 8, !tbaa !19
%17 = tail call i32 @dr_poll_cq(i32 noundef %16, i32 noundef 1) #2
%18 = icmp slt i32 %17, 0
br i1 %18, label %29, label %19
19: ; preds = %15
%20 = icmp eq i32 %17, 1
br i1 %20, label %21, label %25
21: ; preds = %19
%22 = load i64, ptr %4, align 8, !tbaa !12
%23 = load i64, ptr %1, align 8, !tbaa !6
%24 = sub nsw i64 %23, %22
store i64 %24, ptr %1, align 8, !tbaa !6
br label %25
25: ; preds = %21, %19
br i1 %13, label %29, label %26
26: ; preds = %25
%27 = load i64, ptr %1, align 8, !tbaa !6
%28 = icmp eq i64 %27, 0
br i1 %28, label %29, label %15, !llvm.loop !20
29: ; preds = %26, %25, %15, %2
%30 = phi i32 [ 0, %2 ], [ 0, %26 ], [ 0, %25 ], [ %17, %15 ]
ret i32 %30
}
declare i32 @dr_poll_cq(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"mlx5dr_send_ring", !8, i64 0, !8, i64 8, !11, i64 16}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !8, i64 8}
!13 = !{!14, !15, i64 0}
!14 = !{!"mlx5dr_domain", !15, i64 0}
!15 = !{!"any pointer", !9, i64 0}
!16 = !{!17, !11, i64 0}
!17 = !{!"TYPE_2__", !11, i64 0}
!18 = !{!11, !11, i64 0}
!19 = !{!7, !11, i64 16}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
| linux_drivers_net_ethernet_mellanox_mlx5_core_steering_extr_dr_send.c_dr_handle_pending_wc |
; ModuleID = 'AnghaBench/RetroArch/network/netplay/extr_netplay_frontend.c_netplay_settings_share_mode.c'
source_filename = "AnghaBench/RetroArch/network/netplay/extr_netplay_frontend.c_netplay_settings_share_mode.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i32 }
@NETPLAY_SHARE_DIGITAL_OR = dso_local local_unnamed_addr global i32 0, align 4
@NETPLAY_SHARE_DIGITAL_XOR = dso_local local_unnamed_addr global i32 0, align 4
@NETPLAY_SHARE_DIGITAL_VOTE = dso_local local_unnamed_addr global i32 0, align 4
@NETPLAY_SHARE_NO_PREFERENCE = dso_local local_unnamed_addr global i32 0, align 4
@NETPLAY_SHARE_ANALOG_MAX = dso_local local_unnamed_addr global i32 0, align 4
@NETPLAY_SHARE_ANALOG_AVERAGE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @netplay_settings_share_mode() local_unnamed_addr #0 {
%1 = tail call ptr (...) @config_get_ptr() #2
%2 = load i32, ptr %1, align 4, !tbaa !5
switch i32 %2, label %9 [
i32 0, label %3
i32 130, label %10
i32 128, label %7
i32 129, label %8
]
3: ; preds = %0
%4 = getelementptr inbounds %struct.TYPE_4__, ptr %1, i64 0, i32 1
%5 = load i32, ptr %4, align 4, !tbaa !11
%6 = icmp eq i32 %5, 0
br i1 %6, label %24, label %9
7: ; preds = %0
br label %10
8: ; preds = %0
br label %10
9: ; preds = %0, %3
br label %10
10: ; preds = %0, %9, %8, %7
%11 = phi ptr [ @NETPLAY_SHARE_NO_PREFERENCE, %9 ], [ @NETPLAY_SHARE_DIGITAL_VOTE, %8 ], [ @NETPLAY_SHARE_DIGITAL_XOR, %7 ], [ @NETPLAY_SHARE_DIGITAL_OR, %0 ]
%12 = load i32, ptr %11, align 4, !tbaa !12
%13 = getelementptr inbounds %struct.TYPE_4__, ptr %1, i64 0, i32 1
%14 = load i32, ptr %13, align 4, !tbaa !11
switch i32 %14, label %21 [
i32 131, label %15
i32 132, label %18
]
15: ; preds = %10
%16 = load i32, ptr @NETPLAY_SHARE_ANALOG_MAX, align 4, !tbaa !12
%17 = or i32 %16, %12
br label %24
18: ; preds = %10
%19 = load i32, ptr @NETPLAY_SHARE_ANALOG_AVERAGE, align 4, !tbaa !12
%20 = or i32 %19, %12
br label %24
21: ; preds = %10
%22 = load i32, ptr @NETPLAY_SHARE_NO_PREFERENCE, align 4, !tbaa !12
%23 = or i32 %22, %12
br label %24
24: ; preds = %15, %18, %21, %3
%25 = phi i32 [ %23, %21 ], [ %20, %18 ], [ %17, %15 ], [ 0, %3 ]
ret i32 %25
}
declare ptr @config_get_ptr(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!6, !8, i64 4}
!12 = !{!8, !8, i64 0}
| ; ModuleID = 'AnghaBench/RetroArch/network/netplay/extr_netplay_frontend.c_netplay_settings_share_mode.c'
source_filename = "AnghaBench/RetroArch/network/netplay/extr_netplay_frontend.c_netplay_settings_share_mode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NETPLAY_SHARE_DIGITAL_OR = common local_unnamed_addr global i32 0, align 4
@NETPLAY_SHARE_DIGITAL_XOR = common local_unnamed_addr global i32 0, align 4
@NETPLAY_SHARE_DIGITAL_VOTE = common local_unnamed_addr global i32 0, align 4
@NETPLAY_SHARE_NO_PREFERENCE = common local_unnamed_addr global i32 0, align 4
@NETPLAY_SHARE_ANALOG_MAX = common local_unnamed_addr global i32 0, align 4
@NETPLAY_SHARE_ANALOG_AVERAGE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @netplay_settings_share_mode() local_unnamed_addr #0 {
%1 = tail call ptr @config_get_ptr() #2
%2 = load i32, ptr %1, align 4, !tbaa !6
switch i32 %2, label %9 [
i32 0, label %3
i32 130, label %10
i32 128, label %7
i32 129, label %8
]
3: ; preds = %0
%4 = getelementptr inbounds i8, ptr %1, i64 4
%5 = load i32, ptr %4, align 4, !tbaa !12
%6 = icmp eq i32 %5, 0
br i1 %6, label %24, label %9
7: ; preds = %0
br label %10
8: ; preds = %0
br label %10
9: ; preds = %0, %3
br label %10
10: ; preds = %0, %9, %8, %7
%11 = phi ptr [ @NETPLAY_SHARE_NO_PREFERENCE, %9 ], [ @NETPLAY_SHARE_DIGITAL_VOTE, %8 ], [ @NETPLAY_SHARE_DIGITAL_XOR, %7 ], [ @NETPLAY_SHARE_DIGITAL_OR, %0 ]
%12 = load i32, ptr %11, align 4, !tbaa !13
%13 = getelementptr inbounds i8, ptr %1, i64 4
%14 = load i32, ptr %13, align 4, !tbaa !12
switch i32 %14, label %21 [
i32 131, label %15
i32 132, label %18
]
15: ; preds = %10
%16 = load i32, ptr @NETPLAY_SHARE_ANALOG_MAX, align 4, !tbaa !13
%17 = or i32 %16, %12
br label %24
18: ; preds = %10
%19 = load i32, ptr @NETPLAY_SHARE_ANALOG_AVERAGE, align 4, !tbaa !13
%20 = or i32 %19, %12
br label %24
21: ; preds = %10
%22 = load i32, ptr @NETPLAY_SHARE_NO_PREFERENCE, align 4, !tbaa !13
%23 = or i32 %22, %12
br label %24
24: ; preds = %15, %18, %21, %3
%25 = phi i32 [ %23, %21 ], [ %20, %18 ], [ %17, %15 ], [ 0, %3 ]
ret i32 %25
}
declare ptr @config_get_ptr(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"TYPE_4__", !9, i64 0, !9, i64 4}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!7, !9, i64 4}
!13 = !{!9, !9, i64 0}
| RetroArch_network_netplay_extr_netplay_frontend.c_netplay_settings_share_mode |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/hisilicon/hns3/extr_hns3_enet.c_hns3_nic_reset_all_ring.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/hisilicon/hns3/extr_hns3_enet.c_hns3_nic_reset_all_ring.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i32, ptr }
%struct.hnae3_handle = type { %struct.TYPE_8__, ptr }
%struct.TYPE_7__ = type { ptr }
%struct.hns3_enet_ring = type { i32, i64, i64 }
; Function Attrs: nounwind uwtable
define dso_local i32 @hns3_nic_reset_all_ring(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = tail call ptr @netdev_priv(ptr noundef %3) #3
%5 = load i32, ptr %0, align 8, !tbaa !12
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %53
7: ; preds = %1
%8 = getelementptr inbounds %struct.hnae3_handle, ptr %0, i64 0, i32 1
br label %9
9: ; preds = %7, %47
%10 = phi i64 [ 0, %7 ], [ %49, %47 ]
%11 = load ptr, ptr %8, align 8, !tbaa !13
%12 = load ptr, ptr %11, align 8, !tbaa !14
%13 = load ptr, ptr %12, align 8, !tbaa !16
%14 = trunc i64 %10 to i32
%15 = tail call i32 %13(ptr noundef nonnull %0, i32 noundef %14) #3
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %55
17: ; preds = %9
%18 = load ptr, ptr %4, align 8, !tbaa !18
%19 = getelementptr inbounds %struct.TYPE_7__, ptr %18, i64 %10
%20 = load ptr, ptr %19, align 8, !tbaa !20
%21 = tail call i32 @hns3_init_ring_hw(ptr noundef %20) #3
%22 = load ptr, ptr %4, align 8, !tbaa !18
%23 = getelementptr inbounds %struct.TYPE_7__, ptr %22, i64 %10
%24 = load ptr, ptr %23, align 8, !tbaa !20
%25 = tail call i32 @hns3_clear_tx_ring(ptr noundef %24) #3
%26 = load ptr, ptr %4, align 8, !tbaa !18
%27 = getelementptr inbounds %struct.TYPE_7__, ptr %26, i64 %10
%28 = load ptr, ptr %27, align 8, !tbaa !20
%29 = getelementptr inbounds %struct.hns3_enet_ring, ptr %28, i64 0, i32 1
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %29, i8 0, i64 16, i1 false)
%30 = load i32, ptr %0, align 8, !tbaa !12
%31 = add nsw i32 %30, %14
%32 = sext i32 %31 to i64
%33 = getelementptr inbounds %struct.TYPE_7__, ptr %26, i64 %32
%34 = load ptr, ptr %33, align 8, !tbaa !20
%35 = tail call i32 @hns3_init_ring_hw(ptr noundef %34) #3
%36 = tail call i32 @hns3_clear_rx_ring(ptr noundef %34) #3
%37 = icmp eq i32 %36, 0
br i1 %37, label %38, label %55
38: ; preds = %17
%39 = load i32, ptr %34, align 8, !tbaa !22
%40 = icmp sgt i32 %39, 0
br i1 %40, label %41, label %47
41: ; preds = %38, %41
%42 = phi i32 [ %44, %41 ], [ 0, %38 ]
%43 = tail call i32 @hns3_reuse_buffer(ptr noundef nonnull %34, i32 noundef %42) #3
%44 = add nuw nsw i32 %42, 1
%45 = load i32, ptr %34, align 8, !tbaa !22
%46 = icmp slt i32 %44, %45
br i1 %46, label %41, label %47, !llvm.loop !25
47: ; preds = %41, %38
%48 = getelementptr inbounds %struct.hns3_enet_ring, ptr %34, i64 0, i32 1
%49 = add nuw nsw i64 %10, 1
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %48, i8 0, i64 16, i1 false)
%50 = load i32, ptr %0, align 8, !tbaa !12
%51 = sext i32 %50 to i64
%52 = icmp slt i64 %49, %51
br i1 %52, label %9, label %53, !llvm.loop !27
53: ; preds = %47, %1
%54 = tail call i32 @hns3_init_tx_ring_tc(ptr noundef %4) #3
br label %55
55: ; preds = %17, %9, %53
%56 = phi i32 [ 0, %53 ], [ %36, %17 ], [ %15, %9 ]
ret i32 %56
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i32 @hns3_init_ring_hw(ptr noundef) local_unnamed_addr #1
declare i32 @hns3_clear_tx_ring(ptr noundef) local_unnamed_addr #1
declare i32 @hns3_clear_rx_ring(ptr noundef) local_unnamed_addr #1
declare i32 @hns3_reuse_buffer(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @hns3_init_tx_ring_tc(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 8}
!6 = !{!"hnae3_handle", !7, i64 0, !11, i64 16}
!7 = !{!"TYPE_8__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!6, !8, i64 0}
!13 = !{!6, !11, i64 16}
!14 = !{!15, !11, i64 0}
!15 = !{!"TYPE_6__", !11, i64 0}
!16 = !{!17, !11, i64 0}
!17 = !{!"TYPE_5__", !11, i64 0}
!18 = !{!19, !11, i64 0}
!19 = !{!"hns3_nic_priv", !11, i64 0}
!20 = !{!21, !11, i64 0}
!21 = !{!"TYPE_7__", !11, i64 0}
!22 = !{!23, !8, i64 0}
!23 = !{!"hns3_enet_ring", !8, i64 0, !24, i64 8, !24, i64 16}
!24 = !{!"long", !9, i64 0}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
!27 = distinct !{!27, !26}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/hisilicon/hns3/extr_hns3_enet.c_hns3_nic_reset_all_ring.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/hisilicon/hns3/extr_hns3_enet.c_hns3_nic_reset_all_ring.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_7__ = type { ptr }
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @hns3_nic_reset_all_ring(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = tail call ptr @netdev_priv(ptr noundef %3) #3
%5 = load i32, ptr %0, align 8, !tbaa !13
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %53
7: ; preds = %1
%8 = getelementptr inbounds i8, ptr %0, i64 16
br label %9
9: ; preds = %7, %47
%10 = phi i64 [ 0, %7 ], [ %49, %47 ]
%11 = load ptr, ptr %8, align 8, !tbaa !14
%12 = load ptr, ptr %11, align 8, !tbaa !15
%13 = load ptr, ptr %12, align 8, !tbaa !17
%14 = trunc nuw nsw i64 %10 to i32
%15 = tail call i32 %13(ptr noundef nonnull %0, i32 noundef %14) #3
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %55
17: ; preds = %9
%18 = load ptr, ptr %4, align 8, !tbaa !19
%19 = getelementptr inbounds %struct.TYPE_7__, ptr %18, i64 %10
%20 = load ptr, ptr %19, align 8, !tbaa !21
%21 = tail call i32 @hns3_init_ring_hw(ptr noundef %20) #3
%22 = load ptr, ptr %4, align 8, !tbaa !19
%23 = getelementptr inbounds %struct.TYPE_7__, ptr %22, i64 %10
%24 = load ptr, ptr %23, align 8, !tbaa !21
%25 = tail call i32 @hns3_clear_tx_ring(ptr noundef %24) #3
%26 = load ptr, ptr %4, align 8, !tbaa !19
%27 = getelementptr inbounds %struct.TYPE_7__, ptr %26, i64 %10
%28 = load ptr, ptr %27, align 8, !tbaa !21
%29 = getelementptr inbounds i8, ptr %28, i64 8
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %29, i8 0, i64 16, i1 false)
%30 = load i32, ptr %0, align 8, !tbaa !13
%31 = add nsw i32 %30, %14
%32 = sext i32 %31 to i64
%33 = getelementptr inbounds %struct.TYPE_7__, ptr %26, i64 %32
%34 = load ptr, ptr %33, align 8, !tbaa !21
%35 = tail call i32 @hns3_init_ring_hw(ptr noundef %34) #3
%36 = tail call i32 @hns3_clear_rx_ring(ptr noundef %34) #3
%37 = icmp eq i32 %36, 0
br i1 %37, label %38, label %55
38: ; preds = %17
%39 = load i32, ptr %34, align 8, !tbaa !23
%40 = icmp sgt i32 %39, 0
br i1 %40, label %41, label %47
41: ; preds = %38, %41
%42 = phi i32 [ %44, %41 ], [ 0, %38 ]
%43 = tail call i32 @hns3_reuse_buffer(ptr noundef nonnull %34, i32 noundef %42) #3
%44 = add nuw nsw i32 %42, 1
%45 = load i32, ptr %34, align 8, !tbaa !23
%46 = icmp slt i32 %44, %45
br i1 %46, label %41, label %47, !llvm.loop !26
47: ; preds = %41, %38
%48 = getelementptr inbounds i8, ptr %34, i64 8
%49 = add nuw nsw i64 %10, 1
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %48, i8 0, i64 16, i1 false)
%50 = load i32, ptr %0, align 8, !tbaa !13
%51 = sext i32 %50 to i64
%52 = icmp slt i64 %49, %51
br i1 %52, label %9, label %53, !llvm.loop !28
53: ; preds = %47, %1
%54 = tail call i32 @hns3_init_tx_ring_tc(ptr noundef %4) #3
br label %55
55: ; preds = %17, %9, %53
%56 = phi i32 [ 0, %53 ], [ %36, %17 ], [ %15, %9 ]
ret i32 %56
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i32 @hns3_init_ring_hw(ptr noundef) local_unnamed_addr #1
declare i32 @hns3_clear_tx_ring(ptr noundef) local_unnamed_addr #1
declare i32 @hns3_clear_rx_ring(ptr noundef) local_unnamed_addr #1
declare i32 @hns3_reuse_buffer(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @hns3_init_tx_ring_tc(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 8}
!7 = !{!"hnae3_handle", !8, i64 0, !12, i64 16}
!8 = !{!"TYPE_8__", !9, i64 0, !12, i64 8}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!7, !9, i64 0}
!14 = !{!7, !12, i64 16}
!15 = !{!16, !12, i64 0}
!16 = !{!"TYPE_6__", !12, i64 0}
!17 = !{!18, !12, i64 0}
!18 = !{!"TYPE_5__", !12, i64 0}
!19 = !{!20, !12, i64 0}
!20 = !{!"hns3_nic_priv", !12, i64 0}
!21 = !{!22, !12, i64 0}
!22 = !{!"TYPE_7__", !12, i64 0}
!23 = !{!24, !9, i64 0}
!24 = !{!"hns3_enet_ring", !9, i64 0, !25, i64 8, !25, i64 16}
!25 = !{!"long", !10, i64 0}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}
!28 = distinct !{!28, !27}
| linux_drivers_net_ethernet_hisilicon_hns3_extr_hns3_enet.c_hns3_nic_reset_all_ring |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_si_dpm.c_si_program_memory_timing_parameters.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_si_dpm.c_si_program_memory_timing_parameters.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SISLANDS_DRIVER_STATE_ARB_INDEX = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @si_program_memory_timing_parameters], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @si_program_memory_timing_parameters(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr @SISLANDS_DRIVER_STATE_ARB_INDEX, align 4, !tbaa !5
%4 = tail call i32 @si_do_program_memory_timing_parameters(ptr noundef %0, ptr noundef %1, i32 noundef %3) #2
ret i32 %4
}
declare i32 @si_do_program_memory_timing_parameters(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_si_dpm.c_si_program_memory_timing_parameters.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_si_dpm.c_si_program_memory_timing_parameters.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SISLANDS_DRIVER_STATE_ARB_INDEX = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @si_program_memory_timing_parameters], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @si_program_memory_timing_parameters(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr @SISLANDS_DRIVER_STATE_ARB_INDEX, align 4, !tbaa !6
%4 = tail call i32 @si_do_program_memory_timing_parameters(ptr noundef %0, ptr noundef %1, i32 noundef %3) #2
ret i32 %4
}
declare i32 @si_do_program_memory_timing_parameters(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_gpu_drm_amd_amdgpu_extr_si_dpm.c_si_program_memory_timing_parameters |
; ModuleID = 'AnghaBench/php-src/ext/opcache/jit/dynasm/extr_minilua.c_io_read.c'
source_filename = "AnghaBench/php-src/ext/opcache/jit/dynasm/extr_minilua.c_io_read.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @io_read], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @io_read(ptr noundef %0) #0 {
%2 = tail call i32 @getiofile(ptr noundef %0, i32 noundef 1) #2
%3 = tail call i32 @g_read(ptr noundef %0, i32 noundef %2, i32 noundef 1) #2
ret i32 %3
}
declare i32 @g_read(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @getiofile(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/php-src/ext/opcache/jit/dynasm/extr_minilua.c_io_read.c'
source_filename = "AnghaBench/php-src/ext/opcache/jit/dynasm/extr_minilua.c_io_read.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @io_read], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @io_read(ptr noundef %0) #0 {
%2 = tail call i32 @getiofile(ptr noundef %0, i32 noundef 1) #2
%3 = tail call i32 @g_read(ptr noundef %0, i32 noundef %2, i32 noundef 1) #2
ret i32 %3
}
declare i32 @g_read(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @getiofile(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| php-src_ext_opcache_jit_dynasm_extr_minilua.c_io_read |
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/ocfs2/extr_alloc.c_ocfs2_adjust_adjacent_records.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/ocfs2/extr_alloc.c_ocfs2_adjust_adjacent_records.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ocfs2_extent_list = type { i32, ptr, i32 }
%struct.TYPE_2__ = type { ptr }
%struct.ocfs2_extent_rec = type { ptr, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @ocfs2_adjust_adjacent_records], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ocfs2_adjust_adjacent_records(ptr nocapture noundef %0, ptr nocapture readnone %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = getelementptr inbounds %struct.ocfs2_extent_list, ptr %3, i64 0, i32 1
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = load ptr, ptr %6, align 8, !tbaa !11
%8 = tail call i64 @le32_to_cpu(ptr noundef %7) #2
%9 = load ptr, ptr %5, align 8, !tbaa !5
%10 = tail call i32 @ocfs2_rec_clusters(ptr noundef %3, ptr noundef %9) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %25
12: ; preds = %4
%13 = load i32, ptr %3, align 8, !tbaa !13
%14 = tail call i32 @BUG_ON(i32 noundef %13) #2
%15 = getelementptr inbounds %struct.ocfs2_extent_list, ptr %3, i64 0, i32 2
%16 = load i32, ptr %15, align 8, !tbaa !14
%17 = tail call i32 @le16_to_cpu(i32 noundef %16) #2
%18 = icmp slt i32 %17, 2
%19 = zext i1 %18 to i32
%20 = tail call i32 @BUG_ON(i32 noundef %19) #2
%21 = load ptr, ptr %5, align 8, !tbaa !5
%22 = getelementptr inbounds %struct.TYPE_2__, ptr %21, i64 1
%23 = load ptr, ptr %22, align 8, !tbaa !11
%24 = tail call i64 @le32_to_cpu(ptr noundef %23) #2
br label %25
25: ; preds = %12, %4
%26 = phi i64 [ %8, %4 ], [ %24, %12 ]
%27 = getelementptr inbounds %struct.ocfs2_extent_rec, ptr %0, i64 0, i32 1
%28 = load ptr, ptr %27, align 8, !tbaa !15
%29 = tail call i64 @le32_to_cpu(ptr noundef %28) #2
%30 = sub nsw i64 %26, %29
%31 = tail call ptr @cpu_to_le32(i64 noundef %30) #2
store ptr %31, ptr %0, align 8, !tbaa !17
%32 = getelementptr inbounds %struct.ocfs2_extent_rec, ptr %2, i64 0, i32 1
%33 = load ptr, ptr %32, align 8, !tbaa !15
%34 = tail call i64 @le32_to_cpu(ptr noundef %33) #2
%35 = load ptr, ptr %2, align 8, !tbaa !17
%36 = tail call i64 @le32_to_cpu(ptr noundef %35) #2
%37 = add nsw i64 %36, %34
%38 = load ptr, ptr %27, align 8, !tbaa !15
store ptr %38, ptr %32, align 8, !tbaa !15
%39 = tail call i32 @le32_add_cpu(ptr noundef nonnull %32, i64 noundef %30) #2
%40 = load ptr, ptr %32, align 8, !tbaa !15
%41 = tail call i64 @le32_to_cpu(ptr noundef %40) #2
%42 = sub i64 %37, %41
%43 = tail call ptr @cpu_to_le32(i64 noundef %42) #2
store ptr %43, ptr %2, align 8, !tbaa !17
ret void
}
declare i64 @le32_to_cpu(ptr noundef) local_unnamed_addr #1
declare i32 @ocfs2_rec_clusters(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #1
declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #1
declare ptr @cpu_to_le32(i64 noundef) local_unnamed_addr #1
declare i32 @le32_add_cpu(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"ocfs2_extent_list", !7, i64 0, !10, i64 8, !7, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_2__", !10, i64 0}
!13 = !{!6, !7, i64 0}
!14 = !{!6, !7, i64 16}
!15 = !{!16, !10, i64 8}
!16 = !{!"ocfs2_extent_rec", !10, i64 0, !10, i64 8}
!17 = !{!16, !10, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/fs/ocfs2/extr_alloc.c_ocfs2_adjust_adjacent_records.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/ocfs2/extr_alloc.c_ocfs2_adjust_adjacent_records.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ocfs2_adjust_adjacent_records], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ocfs2_adjust_adjacent_records(ptr nocapture noundef %0, ptr nocapture readnone %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = getelementptr inbounds i8, ptr %3, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = load ptr, ptr %6, align 8, !tbaa !12
%8 = tail call i64 @le32_to_cpu(ptr noundef %7) #2
%9 = load ptr, ptr %5, align 8, !tbaa !6
%10 = tail call i32 @ocfs2_rec_clusters(ptr noundef %3, ptr noundef %9) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %25
12: ; preds = %4
%13 = load i32, ptr %3, align 8, !tbaa !14
%14 = tail call i32 @BUG_ON(i32 noundef %13) #2
%15 = getelementptr inbounds i8, ptr %3, i64 16
%16 = load i32, ptr %15, align 8, !tbaa !15
%17 = tail call i32 @le16_to_cpu(i32 noundef %16) #2
%18 = icmp slt i32 %17, 2
%19 = zext i1 %18 to i32
%20 = tail call i32 @BUG_ON(i32 noundef %19) #2
%21 = load ptr, ptr %5, align 8, !tbaa !6
%22 = getelementptr inbounds i8, ptr %21, i64 8
%23 = load ptr, ptr %22, align 8, !tbaa !12
%24 = tail call i64 @le32_to_cpu(ptr noundef %23) #2
br label %25
25: ; preds = %12, %4
%26 = phi i64 [ %8, %4 ], [ %24, %12 ]
%27 = getelementptr inbounds i8, ptr %0, i64 8
%28 = load ptr, ptr %27, align 8, !tbaa !16
%29 = tail call i64 @le32_to_cpu(ptr noundef %28) #2
%30 = sub nsw i64 %26, %29
%31 = tail call ptr @cpu_to_le32(i64 noundef %30) #2
store ptr %31, ptr %0, align 8, !tbaa !18
%32 = getelementptr inbounds i8, ptr %2, i64 8
%33 = load ptr, ptr %32, align 8, !tbaa !16
%34 = tail call i64 @le32_to_cpu(ptr noundef %33) #2
%35 = load ptr, ptr %2, align 8, !tbaa !18
%36 = tail call i64 @le32_to_cpu(ptr noundef %35) #2
%37 = add nsw i64 %36, %34
%38 = load ptr, ptr %27, align 8, !tbaa !16
store ptr %38, ptr %32, align 8, !tbaa !16
%39 = tail call i32 @le32_add_cpu(ptr noundef nonnull %32, i64 noundef %30) #2
%40 = load ptr, ptr %32, align 8, !tbaa !16
%41 = tail call i64 @le32_to_cpu(ptr noundef %40) #2
%42 = sub i64 %37, %41
%43 = tail call ptr @cpu_to_le32(i64 noundef %42) #2
store ptr %43, ptr %2, align 8, !tbaa !18
ret void
}
declare i64 @le32_to_cpu(ptr noundef) local_unnamed_addr #1
declare i32 @ocfs2_rec_clusters(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #1
declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #1
declare ptr @cpu_to_le32(i64 noundef) local_unnamed_addr #1
declare i32 @le32_add_cpu(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"ocfs2_extent_list", !8, i64 0, !11, i64 8, !8, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_2__", !11, i64 0}
!14 = !{!7, !8, i64 0}
!15 = !{!7, !8, i64 16}
!16 = !{!17, !11, i64 8}
!17 = !{!"ocfs2_extent_rec", !11, i64 0, !11, i64 8}
!18 = !{!17, !11, i64 0}
| fastsocket_kernel_fs_ocfs2_extr_alloc.c_ocfs2_adjust_adjacent_records |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/chelsio/extr_cxgb2.c_cxgb_down.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/chelsio/extr_cxgb2.c_cxgb_down.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.adapter = type { ptr, %struct.TYPE_3__, i32 }
%struct.TYPE_3__ = type { i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @cxgb_down], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @cxgb_down(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.adapter, ptr %0, i64 0, i32 2
%3 = load i32, ptr %2, align 8, !tbaa !5
%4 = tail call i32 @t1_sge_stop(i32 noundef %3) #2
%5 = tail call i32 @t1_interrupts_disable(ptr noundef %0) #2
%6 = load ptr, ptr %0, align 8, !tbaa !13
%7 = load i32, ptr %6, align 4, !tbaa !14
%8 = tail call i32 @free_irq(i32 noundef %7, ptr noundef nonnull %0) #2
%9 = getelementptr inbounds %struct.adapter, ptr %0, i64 0, i32 1
%10 = load i64, ptr %9, align 8, !tbaa !16
%11 = icmp eq i64 %10, 0
br i1 %11, label %15, label %12
12: ; preds = %1
%13 = load ptr, ptr %0, align 8, !tbaa !13
%14 = tail call i32 @pci_disable_msi(ptr noundef %13) #2
br label %15
15: ; preds = %12, %1
ret void
}
declare i32 @t1_sge_stop(i32 noundef) local_unnamed_addr #1
declare i32 @t1_interrupts_disable(ptr noundef) local_unnamed_addr #1
declare i32 @free_irq(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @pci_disable_msi(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !12, i64 16}
!6 = !{!"adapter", !7, i64 0, !10, i64 8, !12, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_3__", !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!6, !7, i64 0}
!14 = !{!15, !12, i64 0}
!15 = !{!"TYPE_4__", !12, i64 0}
!16 = !{!6, !11, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/chelsio/extr_cxgb2.c_cxgb_down.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/chelsio/extr_cxgb2.c_cxgb_down.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @cxgb_down], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @cxgb_down(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = load i32, ptr %2, align 8, !tbaa !6
%4 = tail call i32 @t1_sge_stop(i32 noundef %3) #2
%5 = tail call i32 @t1_interrupts_disable(ptr noundef %0) #2
%6 = load ptr, ptr %0, align 8, !tbaa !14
%7 = load i32, ptr %6, align 4, !tbaa !15
%8 = tail call i32 @free_irq(i32 noundef %7, ptr noundef nonnull %0) #2
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = load i64, ptr %9, align 8, !tbaa !17
%11 = icmp eq i64 %10, 0
br i1 %11, label %15, label %12
12: ; preds = %1
%13 = load ptr, ptr %0, align 8, !tbaa !14
%14 = tail call i32 @pci_disable_msi(ptr noundef %13) #2
br label %15
15: ; preds = %12, %1
ret void
}
declare i32 @t1_sge_stop(i32 noundef) local_unnamed_addr #1
declare i32 @t1_interrupts_disable(ptr noundef) local_unnamed_addr #1
declare i32 @free_irq(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @pci_disable_msi(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !13, i64 16}
!7 = !{!"adapter", !8, i64 0, !11, i64 8, !13, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_3__", !12, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!7, !8, i64 0}
!15 = !{!16, !13, i64 0}
!16 = !{!"TYPE_4__", !13, i64 0}
!17 = !{!7, !12, i64 8}
| fastsocket_kernel_drivers_net_chelsio_extr_cxgb2.c_cxgb_down |
; ModuleID = 'AnghaBench/linux/sound/soc/amd/raven/extr_acp3x-pcm-dma.c_acp3x_dma_new.c'
source_filename = "AnghaBench/linux/sound/soc/amd/raven/extr_acp3x-pcm-dma.c_acp3x_dma_new.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@DRV_NAME = dso_local local_unnamed_addr global i32 0, align 4
@SNDRV_DMA_TYPE_DEV = dso_local local_unnamed_addr global i32 0, align 4
@MIN_BUFFER = dso_local local_unnamed_addr global i32 0, align 4
@MAX_BUFFER = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @acp3x_dma_new], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @acp3x_dma_new(ptr noundef %0) #0 {
%2 = load i32, ptr @DRV_NAME, align 4, !tbaa !5
%3 = tail call ptr @snd_soc_rtdcom_lookup(ptr noundef %0, i32 noundef %2) #2
%4 = load ptr, ptr %3, align 8, !tbaa !9
%5 = load ptr, ptr %4, align 8, !tbaa !12
%6 = load i32, ptr %0, align 4, !tbaa !14
%7 = load i32, ptr @SNDRV_DMA_TYPE_DEV, align 4, !tbaa !5
%8 = load i32, ptr @MIN_BUFFER, align 4, !tbaa !5
%9 = load i32, ptr @MAX_BUFFER, align 4, !tbaa !5
%10 = tail call i32 @snd_pcm_lib_preallocate_pages_for_all(i32 noundef %6, i32 noundef %7, ptr noundef %5, i32 noundef %8, i32 noundef %9) #2
ret i32 0
}
declare ptr @snd_soc_rtdcom_lookup(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snd_pcm_lib_preallocate_pages_for_all(i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"snd_soc_component", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_2__", !11, i64 0}
!14 = !{!15, !6, i64 0}
!15 = !{!"snd_soc_pcm_runtime", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/sound/soc/amd/raven/extr_acp3x-pcm-dma.c_acp3x_dma_new.c'
source_filename = "AnghaBench/linux/sound/soc/amd/raven/extr_acp3x-pcm-dma.c_acp3x_dma_new.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DRV_NAME = common local_unnamed_addr global i32 0, align 4
@SNDRV_DMA_TYPE_DEV = common local_unnamed_addr global i32 0, align 4
@MIN_BUFFER = common local_unnamed_addr global i32 0, align 4
@MAX_BUFFER = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @acp3x_dma_new], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @acp3x_dma_new(ptr noundef %0) #0 {
%2 = load i32, ptr @DRV_NAME, align 4, !tbaa !6
%3 = tail call ptr @snd_soc_rtdcom_lookup(ptr noundef %0, i32 noundef %2) #2
%4 = load ptr, ptr %3, align 8, !tbaa !10
%5 = load ptr, ptr %4, align 8, !tbaa !13
%6 = load i32, ptr %0, align 4, !tbaa !15
%7 = load i32, ptr @SNDRV_DMA_TYPE_DEV, align 4, !tbaa !6
%8 = load i32, ptr @MIN_BUFFER, align 4, !tbaa !6
%9 = load i32, ptr @MAX_BUFFER, align 4, !tbaa !6
%10 = tail call i32 @snd_pcm_lib_preallocate_pages_for_all(i32 noundef %6, i32 noundef %7, ptr noundef %5, i32 noundef %8, i32 noundef %9) #2
ret i32 0
}
declare ptr @snd_soc_rtdcom_lookup(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snd_pcm_lib_preallocate_pages_for_all(i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"snd_soc_component", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"TYPE_2__", !12, i64 0}
!15 = !{!16, !7, i64 0}
!16 = !{!"snd_soc_pcm_runtime", !7, i64 0}
| linux_sound_soc_amd_raven_extr_acp3x-pcm-dma.c_acp3x_dma_new |
; ModuleID = 'AnghaBench/linux/drivers/i2c/busses/extr_i2c-omap.c_omap_i2c_isr.c'
source_filename = "AnghaBench/linux/drivers/i2c/busses/extr_i2c-omap.c_omap_i2c_isr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@IRQ_HANDLED = dso_local local_unnamed_addr global i32 0, align 4
@OMAP_I2C_STAT_REG = dso_local local_unnamed_addr global i32 0, align 4
@OMAP_I2C_IE_REG = dso_local local_unnamed_addr global i32 0, align 4
@IRQ_WAKE_THREAD = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @omap_i2c_isr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @omap_i2c_isr(i32 %0, ptr noundef %1) #0 {
%3 = load i32, ptr @IRQ_HANDLED, align 4, !tbaa !5
%4 = load i32, ptr @OMAP_I2C_STAT_REG, align 4, !tbaa !5
%5 = tail call i32 @omap_i2c_read_reg(ptr noundef %1, i32 noundef %4) #2
%6 = load i32, ptr @OMAP_I2C_IE_REG, align 4, !tbaa !5
%7 = tail call i32 @omap_i2c_read_reg(ptr noundef %1, i32 noundef %6) #2
%8 = and i32 %7, %5
%9 = icmp eq i32 %8, 0
%10 = load i32, ptr @IRQ_WAKE_THREAD, align 4
%11 = select i1 %9, i32 %3, i32 %10
ret i32 %11
}
declare i32 @omap_i2c_read_reg(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/i2c/busses/extr_i2c-omap.c_omap_i2c_isr.c'
source_filename = "AnghaBench/linux/drivers/i2c/busses/extr_i2c-omap.c_omap_i2c_isr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IRQ_HANDLED = common local_unnamed_addr global i32 0, align 4
@OMAP_I2C_STAT_REG = common local_unnamed_addr global i32 0, align 4
@OMAP_I2C_IE_REG = common local_unnamed_addr global i32 0, align 4
@IRQ_WAKE_THREAD = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @omap_i2c_isr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @omap_i2c_isr(i32 %0, ptr noundef %1) #0 {
%3 = load i32, ptr @IRQ_HANDLED, align 4, !tbaa !6
%4 = load i32, ptr @OMAP_I2C_STAT_REG, align 4, !tbaa !6
%5 = tail call i32 @omap_i2c_read_reg(ptr noundef %1, i32 noundef %4) #2
%6 = load i32, ptr @OMAP_I2C_IE_REG, align 4, !tbaa !6
%7 = tail call i32 @omap_i2c_read_reg(ptr noundef %1, i32 noundef %6) #2
%8 = and i32 %7, %5
%9 = icmp eq i32 %8, 0
%10 = load i32, ptr @IRQ_WAKE_THREAD, align 4
%11 = select i1 %9, i32 %3, i32 %10
ret i32 %11
}
declare i32 @omap_i2c_read_reg(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_i2c_busses_extr_i2c-omap.c_omap_i2c_isr |
; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/interface/mmal/components/extr_clock.c_clock_stop_clocks.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/interface/mmal/components/extr_clock.c_clock_stop_clocks.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_7__ = type { i32, ptr }
%struct.TYPE_6__ = type { i32, i64 }
@.str = private unnamed_addr constant [18 x i8] c"stopping clock %d\00", align 1
@MMAL_FALSE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @clock_stop_clocks], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @clock_stop_clocks(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !5
%3 = icmp eq i32 %2, 0
br i1 %3, label %27, label %4
4: ; preds = %1
%5 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 1
br label %6
6: ; preds = %4, %22
%7 = phi i32 [ %2, %4 ], [ %23, %22 ]
%8 = phi i64 [ 0, %4 ], [ %24, %22 ]
%9 = load ptr, ptr %5, align 8, !tbaa !11
%10 = getelementptr inbounds ptr, ptr %9, i64 %8
%11 = load ptr, ptr %10, align 8, !tbaa !12
%12 = getelementptr inbounds %struct.TYPE_6__, ptr %11, i64 0, i32 1
%13 = load i64, ptr %12, align 8, !tbaa !13
%14 = icmp eq i64 %13, 0
br i1 %14, label %22, label %15
15: ; preds = %6
%16 = load i32, ptr %11, align 8, !tbaa !16
%17 = tail call i32 @LOG_TRACE(ptr noundef nonnull @.str, i32 noundef %16) #2
%18 = tail call i32 @mmal_port_clock_request_flush(ptr noundef nonnull %11) #2
%19 = load i32, ptr @MMAL_FALSE, align 4, !tbaa !17
%20 = tail call i32 @mmal_port_clock_active_set(ptr noundef nonnull %11, i32 noundef %19) #2
%21 = load i32, ptr %0, align 8, !tbaa !5
br label %22
22: ; preds = %15, %6
%23 = phi i32 [ %21, %15 ], [ %7, %6 ]
%24 = add nuw nsw i64 %8, 1
%25 = zext i32 %23 to i64
%26 = icmp ult i64 %24, %25
br i1 %26, label %6, label %27, !llvm.loop !18
27: ; preds = %22, %1
ret void
}
declare i32 @LOG_TRACE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mmal_port_clock_request_flush(ptr noundef) local_unnamed_addr #1
declare i32 @mmal_port_clock_active_set(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_7__", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!10, !10, i64 0}
!13 = !{!14, !15, i64 8}
!14 = !{!"TYPE_6__", !7, i64 0, !15, i64 8}
!15 = !{!"long", !8, i64 0}
!16 = !{!14, !7, i64 0}
!17 = !{!7, !7, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/interface/mmal/components/extr_clock.c_clock_stop_clocks.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/interface/mmal/components/extr_clock.c_clock_stop_clocks.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [18 x i8] c"stopping clock %d\00", align 1
@MMAL_FALSE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @clock_stop_clocks], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @clock_stop_clocks(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !6
%3 = icmp eq i32 %2, 0
br i1 %3, label %27, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, ptr %0, i64 8
br label %6
6: ; preds = %4, %22
%7 = phi i32 [ %2, %4 ], [ %23, %22 ]
%8 = phi i64 [ 0, %4 ], [ %24, %22 ]
%9 = load ptr, ptr %5, align 8, !tbaa !12
%10 = getelementptr inbounds ptr, ptr %9, i64 %8
%11 = load ptr, ptr %10, align 8, !tbaa !13
%12 = getelementptr inbounds i8, ptr %11, i64 8
%13 = load i64, ptr %12, align 8, !tbaa !14
%14 = icmp eq i64 %13, 0
br i1 %14, label %22, label %15
15: ; preds = %6
%16 = load i32, ptr %11, align 8, !tbaa !17
%17 = tail call i32 @LOG_TRACE(ptr noundef nonnull @.str, i32 noundef %16) #2
%18 = tail call i32 @mmal_port_clock_request_flush(ptr noundef nonnull %11) #2
%19 = load i32, ptr @MMAL_FALSE, align 4, !tbaa !18
%20 = tail call i32 @mmal_port_clock_active_set(ptr noundef nonnull %11, i32 noundef %19) #2
%21 = load i32, ptr %0, align 8, !tbaa !6
br label %22
22: ; preds = %15, %6
%23 = phi i32 [ %21, %15 ], [ %7, %6 ]
%24 = add nuw nsw i64 %8, 1
%25 = zext i32 %23 to i64
%26 = icmp ult i64 %24, %25
br i1 %26, label %6, label %27, !llvm.loop !19
27: ; preds = %22, %1
ret void
}
declare i32 @LOG_TRACE(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mmal_port_clock_request_flush(ptr noundef) local_unnamed_addr #1
declare i32 @mmal_port_clock_active_set(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_7__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!11, !11, i64 0}
!14 = !{!15, !16, i64 8}
!15 = !{!"TYPE_6__", !8, i64 0, !16, i64 8}
!16 = !{!"long", !9, i64 0}
!17 = !{!15, !8, i64 0}
!18 = !{!8, !8, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
| RetroArch_gfx_include_userland_interface_mmal_components_extr_clock.c_clock_stop_clocks |
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/btrfs/extr_inode.c_btrfs_submit_bio_hook.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/btrfs/extr_inode.c_btrfs_submit_bio_hook.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, ptr }
%struct.btrfs_root = type { i32, %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
@BTRFS_INODE_NODATASUM = dso_local local_unnamed_addr global i32 0, align 4
@REQ_WRITE = dso_local local_unnamed_addr global i32 0, align 4
@EXTENT_BIO_COMPRESSED = dso_local local_unnamed_addr global i64 0, align 8
@BTRFS_DATA_RELOC_TREE_OBJECTID = dso_local local_unnamed_addr global i64 0, align 8
@__btrfs_submit_bio_start = dso_local local_unnamed_addr global i32 0, align 4
@__btrfs_submit_bio_done = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @btrfs_submit_bio_hook], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @btrfs_submit_bio_hook(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, i64 noundef %4, i32 noundef %5) #0 {
%7 = tail call ptr @BTRFS_I(ptr noundef %0) #2
%8 = getelementptr inbounds %struct.TYPE_4__, ptr %7, i64 0, i32 1
%9 = load ptr, ptr %8, align 8, !tbaa !5
%10 = tail call ptr @BTRFS_I(ptr noundef %0) #2
%11 = load i32, ptr %10, align 8, !tbaa !11
%12 = load i32, ptr @BTRFS_INODE_NODATASUM, align 4, !tbaa !12
%13 = and i32 %12, %11
%14 = tail call i64 @btrfs_is_free_space_inode(ptr noundef %9, ptr noundef %0) #2
%15 = load i32, ptr @REQ_WRITE, align 4, !tbaa !12
%16 = and i32 %15, %1
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %35
18: ; preds = %6
%19 = icmp eq i64 %14, 0
%20 = select i1 %19, i32 0, i32 2
%21 = load i32, ptr %9, align 8, !tbaa !13
%22 = tail call i32 @btrfs_bio_wq_end_io(i32 noundef %21, ptr noundef %2, i32 noundef %20) #2
%23 = icmp eq i32 %22, 0
br i1 %23, label %24, label %52
24: ; preds = %18
%25 = load i64, ptr @EXTENT_BIO_COMPRESSED, align 8, !tbaa !17
%26 = and i64 %25, %4
%27 = icmp eq i64 %26, 0
br i1 %27, label %30, label %28
28: ; preds = %24
%29 = tail call i32 @btrfs_submit_compressed_read(ptr noundef %0, ptr noundef %2, i32 noundef %3, i64 noundef %4) #2
br label %52
30: ; preds = %24
%31 = icmp eq i32 %13, 0
br i1 %31, label %32, label %50
32: ; preds = %30
%33 = tail call i32 @btrfs_lookup_bio_sums(ptr noundef nonnull %9, ptr noundef %0, ptr noundef %2, ptr noundef null) #2
%34 = icmp eq i32 %33, 0
br i1 %34, label %50, label %52
35: ; preds = %6
%36 = icmp eq i32 %13, 0
br i1 %36, label %37, label %50
37: ; preds = %35
%38 = getelementptr inbounds %struct.btrfs_root, ptr %9, i64 0, i32 1
%39 = load i64, ptr %38, align 8, !tbaa !18
%40 = load i64, ptr @BTRFS_DATA_RELOC_TREE_OBJECTID, align 8, !tbaa !17
%41 = icmp eq i64 %39, %40
br i1 %41, label %50, label %42
42: ; preds = %37
%43 = tail call ptr @BTRFS_I(ptr noundef %0) #2
%44 = getelementptr inbounds %struct.TYPE_4__, ptr %43, i64 0, i32 1
%45 = load ptr, ptr %44, align 8, !tbaa !5
%46 = load i32, ptr %45, align 8, !tbaa !13
%47 = load i32, ptr @__btrfs_submit_bio_start, align 4, !tbaa !12
%48 = load i32, ptr @__btrfs_submit_bio_done, align 4, !tbaa !12
%49 = tail call i32 @btrfs_wq_submit_bio(i32 noundef %46, ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, i64 noundef %4, i32 noundef %5, i32 noundef %47, i32 noundef %48) #2
br label %52
50: ; preds = %35, %37, %32, %30
%51 = tail call i32 @btrfs_map_bio(ptr noundef %9, i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef 0) #2
br label %52
52: ; preds = %32, %18, %50, %42, %28
%53 = phi i32 [ %51, %50 ], [ %49, %42 ], [ %29, %28 ], [ %22, %18 ], [ %33, %32 ]
ret i32 %53
}
declare ptr @BTRFS_I(ptr noundef) local_unnamed_addr #1
declare i64 @btrfs_is_free_space_inode(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @btrfs_bio_wq_end_io(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @btrfs_submit_compressed_read(ptr noundef, ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @btrfs_lookup_bio_sums(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @btrfs_wq_submit_bio(i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @btrfs_map_bio(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_4__", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"btrfs_root", !7, i64 0, !15, i64 8}
!15 = !{!"TYPE_3__", !16, i64 0}
!16 = !{!"long", !8, i64 0}
!17 = !{!16, !16, i64 0}
!18 = !{!14, !16, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/fs/btrfs/extr_inode.c_btrfs_submit_bio_hook.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/btrfs/extr_inode.c_btrfs_submit_bio_hook.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BTRFS_INODE_NODATASUM = common local_unnamed_addr global i32 0, align 4
@REQ_WRITE = common local_unnamed_addr global i32 0, align 4
@EXTENT_BIO_COMPRESSED = common local_unnamed_addr global i64 0, align 8
@BTRFS_DATA_RELOC_TREE_OBJECTID = common local_unnamed_addr global i64 0, align 8
@__btrfs_submit_bio_start = common local_unnamed_addr global i32 0, align 4
@__btrfs_submit_bio_done = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @btrfs_submit_bio_hook], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @btrfs_submit_bio_hook(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, i64 noundef %4, i32 noundef %5) #0 {
%7 = tail call ptr @BTRFS_I(ptr noundef %0) #2
%8 = getelementptr inbounds i8, ptr %7, i64 8
%9 = load ptr, ptr %8, align 8, !tbaa !6
%10 = tail call ptr @BTRFS_I(ptr noundef %0) #2
%11 = load i32, ptr %10, align 8, !tbaa !12
%12 = load i32, ptr @BTRFS_INODE_NODATASUM, align 4, !tbaa !13
%13 = and i32 %12, %11
%14 = tail call i64 @btrfs_is_free_space_inode(ptr noundef %9, ptr noundef %0) #2
%15 = load i32, ptr @REQ_WRITE, align 4, !tbaa !13
%16 = and i32 %15, %1
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %35
18: ; preds = %6
%19 = icmp eq i64 %14, 0
%20 = select i1 %19, i32 0, i32 2
%21 = load i32, ptr %9, align 8, !tbaa !14
%22 = tail call i32 @btrfs_bio_wq_end_io(i32 noundef %21, ptr noundef %2, i32 noundef %20) #2
%23 = icmp eq i32 %22, 0
br i1 %23, label %24, label %52
24: ; preds = %18
%25 = load i64, ptr @EXTENT_BIO_COMPRESSED, align 8, !tbaa !18
%26 = and i64 %25, %4
%27 = icmp eq i64 %26, 0
br i1 %27, label %30, label %28
28: ; preds = %24
%29 = tail call i32 @btrfs_submit_compressed_read(ptr noundef %0, ptr noundef %2, i32 noundef %3, i64 noundef %4) #2
br label %52
30: ; preds = %24
%31 = icmp eq i32 %13, 0
br i1 %31, label %32, label %50
32: ; preds = %30
%33 = tail call i32 @btrfs_lookup_bio_sums(ptr noundef nonnull %9, ptr noundef %0, ptr noundef %2, ptr noundef null) #2
%34 = icmp eq i32 %33, 0
br i1 %34, label %50, label %52
35: ; preds = %6
%36 = icmp eq i32 %13, 0
br i1 %36, label %37, label %50
37: ; preds = %35
%38 = getelementptr inbounds i8, ptr %9, i64 8
%39 = load i64, ptr %38, align 8, !tbaa !19
%40 = load i64, ptr @BTRFS_DATA_RELOC_TREE_OBJECTID, align 8, !tbaa !18
%41 = icmp eq i64 %39, %40
br i1 %41, label %50, label %42
42: ; preds = %37
%43 = tail call ptr @BTRFS_I(ptr noundef %0) #2
%44 = getelementptr inbounds i8, ptr %43, i64 8
%45 = load ptr, ptr %44, align 8, !tbaa !6
%46 = load i32, ptr %45, align 8, !tbaa !14
%47 = load i32, ptr @__btrfs_submit_bio_start, align 4, !tbaa !13
%48 = load i32, ptr @__btrfs_submit_bio_done, align 4, !tbaa !13
%49 = tail call i32 @btrfs_wq_submit_bio(i32 noundef %46, ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, i64 noundef %4, i32 noundef %5, i32 noundef %47, i32 noundef %48) #2
br label %52
50: ; preds = %35, %37, %32, %30
%51 = tail call i32 @btrfs_map_bio(ptr noundef %9, i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef 0) #2
br label %52
52: ; preds = %32, %18, %50, %42, %28
%53 = phi i32 [ %51, %50 ], [ %49, %42 ], [ %29, %28 ], [ %22, %18 ], [ %33, %32 ]
ret i32 %53
}
declare ptr @BTRFS_I(ptr noundef) local_unnamed_addr #1
declare i64 @btrfs_is_free_space_inode(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @btrfs_bio_wq_end_io(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @btrfs_submit_compressed_read(ptr noundef, ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @btrfs_lookup_bio_sums(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @btrfs_wq_submit_bio(i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @btrfs_map_bio(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_4__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!15, !8, i64 0}
!15 = !{!"btrfs_root", !8, i64 0, !16, i64 8}
!16 = !{!"TYPE_3__", !17, i64 0}
!17 = !{!"long", !9, i64 0}
!18 = !{!17, !17, i64 0}
!19 = !{!15, !17, i64 8}
| fastsocket_kernel_fs_btrfs_extr_inode.c_btrfs_submit_bio_hook |
; ModuleID = 'AnghaBench/redis/deps/jemalloc/src/extr_prof.c_prof_postfork_parent.c'
source_filename = "AnghaBench/redis/deps/jemalloc/src/extr_prof.c_prof_postfork_parent.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@config_prof = dso_local local_unnamed_addr global i64 0, align 8
@opt_prof = dso_local local_unnamed_addr global i64 0, align 8
@prof_thread_active_init_mtx = dso_local global i32 0, align 4
@next_thr_uid_mtx = dso_local global i32 0, align 4
@prof_gdump_mtx = dso_local global i32 0, align 4
@prof_dump_seq_mtx = dso_local global i32 0, align 4
@prof_active_mtx = dso_local global i32 0, align 4
@PROF_NCTX_LOCKS = dso_local local_unnamed_addr global i32 0, align 4
@gctx_locks = dso_local local_unnamed_addr global ptr null, align 8
@PROF_NTDATA_LOCKS = dso_local local_unnamed_addr global i32 0, align 4
@tdata_locks = dso_local local_unnamed_addr global ptr null, align 8
@tdatas_mtx = dso_local global i32 0, align 4
@bt2gctx_mtx = dso_local global i32 0, align 4
@prof_dump_mtx = dso_local global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @prof_postfork_parent(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i64, ptr @config_prof, align 8, !tbaa !5
%3 = icmp ne i64 %2, 0
%4 = load i64, ptr @opt_prof, align 8
%5 = icmp ne i64 %4, 0
%6 = select i1 %3, i1 %5, i1 false
br i1 %6, label %7, label %40
7: ; preds = %1
%8 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef nonnull @prof_thread_active_init_mtx) #2
%9 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef nonnull @next_thr_uid_mtx) #2
%10 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef nonnull @prof_gdump_mtx) #2
%11 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef nonnull @prof_dump_seq_mtx) #2
%12 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef nonnull @prof_active_mtx) #2
%13 = load i32, ptr @PROF_NCTX_LOCKS, align 4, !tbaa !9
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %18, %7
%16 = load i32, ptr @PROF_NTDATA_LOCKS, align 4, !tbaa !9
%17 = icmp eq i32 %16, 0
br i1 %17, label %36, label %27
18: ; preds = %7, %18
%19 = phi i64 [ %23, %18 ], [ 0, %7 ]
%20 = load ptr, ptr @gctx_locks, align 8, !tbaa !11
%21 = getelementptr inbounds i32, ptr %20, i64 %19
%22 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef %21) #2
%23 = add nuw nsw i64 %19, 1
%24 = load i32, ptr @PROF_NCTX_LOCKS, align 4, !tbaa !9
%25 = zext i32 %24 to i64
%26 = icmp ult i64 %23, %25
br i1 %26, label %18, label %15, !llvm.loop !13
27: ; preds = %15, %27
%28 = phi i64 [ %32, %27 ], [ 0, %15 ]
%29 = load ptr, ptr @tdata_locks, align 8, !tbaa !11
%30 = getelementptr inbounds i32, ptr %29, i64 %28
%31 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef %30) #2
%32 = add nuw nsw i64 %28, 1
%33 = load i32, ptr @PROF_NTDATA_LOCKS, align 4, !tbaa !9
%34 = zext i32 %33 to i64
%35 = icmp ult i64 %32, %34
br i1 %35, label %27, label %36, !llvm.loop !15
36: ; preds = %27, %15
%37 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef nonnull @tdatas_mtx) #2
%38 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef nonnull @bt2gctx_mtx) #2
%39 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef nonnull @prof_dump_mtx) #2
br label %40
40: ; preds = %36, %1
ret void
}
declare i32 @malloc_mutex_postfork_parent(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
| ; ModuleID = 'AnghaBench/redis/deps/jemalloc/src/extr_prof.c_prof_postfork_parent.c'
source_filename = "AnghaBench/redis/deps/jemalloc/src/extr_prof.c_prof_postfork_parent.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@config_prof = common local_unnamed_addr global i64 0, align 8
@opt_prof = common local_unnamed_addr global i64 0, align 8
@prof_thread_active_init_mtx = common global i32 0, align 4
@next_thr_uid_mtx = common global i32 0, align 4
@prof_gdump_mtx = common global i32 0, align 4
@prof_dump_seq_mtx = common global i32 0, align 4
@prof_active_mtx = common global i32 0, align 4
@PROF_NCTX_LOCKS = common local_unnamed_addr global i32 0, align 4
@gctx_locks = common local_unnamed_addr global ptr null, align 8
@PROF_NTDATA_LOCKS = common local_unnamed_addr global i32 0, align 4
@tdata_locks = common local_unnamed_addr global ptr null, align 8
@tdatas_mtx = common global i32 0, align 4
@bt2gctx_mtx = common global i32 0, align 4
@prof_dump_mtx = common global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @prof_postfork_parent(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i64, ptr @config_prof, align 8, !tbaa !6
%3 = icmp ne i64 %2, 0
%4 = load i64, ptr @opt_prof, align 8
%5 = icmp ne i64 %4, 0
%6 = select i1 %3, i1 %5, i1 false
br i1 %6, label %7, label %40
7: ; preds = %1
%8 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef nonnull @prof_thread_active_init_mtx) #2
%9 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef nonnull @next_thr_uid_mtx) #2
%10 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef nonnull @prof_gdump_mtx) #2
%11 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef nonnull @prof_dump_seq_mtx) #2
%12 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef nonnull @prof_active_mtx) #2
%13 = load i32, ptr @PROF_NCTX_LOCKS, align 4, !tbaa !10
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %18, %7
%16 = load i32, ptr @PROF_NTDATA_LOCKS, align 4, !tbaa !10
%17 = icmp eq i32 %16, 0
br i1 %17, label %36, label %27
18: ; preds = %7, %18
%19 = phi i64 [ %23, %18 ], [ 0, %7 ]
%20 = load ptr, ptr @gctx_locks, align 8, !tbaa !12
%21 = getelementptr inbounds i32, ptr %20, i64 %19
%22 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef %21) #2
%23 = add nuw nsw i64 %19, 1
%24 = load i32, ptr @PROF_NCTX_LOCKS, align 4, !tbaa !10
%25 = zext i32 %24 to i64
%26 = icmp ult i64 %23, %25
br i1 %26, label %18, label %15, !llvm.loop !14
27: ; preds = %15, %27
%28 = phi i64 [ %32, %27 ], [ 0, %15 ]
%29 = load ptr, ptr @tdata_locks, align 8, !tbaa !12
%30 = getelementptr inbounds i32, ptr %29, i64 %28
%31 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef %30) #2
%32 = add nuw nsw i64 %28, 1
%33 = load i32, ptr @PROF_NTDATA_LOCKS, align 4, !tbaa !10
%34 = zext i32 %33 to i64
%35 = icmp ult i64 %32, %34
br i1 %35, label %27, label %36, !llvm.loop !16
36: ; preds = %27, %15
%37 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef nonnull @tdatas_mtx) #2
%38 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef nonnull @bt2gctx_mtx) #2
%39 = tail call i32 @malloc_mutex_postfork_parent(ptr noundef %0, ptr noundef nonnull @prof_dump_mtx) #2
br label %40
40: ; preds = %36, %1
ret void
}
declare i32 @malloc_mutex_postfork_parent(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
| redis_deps_jemalloc_src_extr_prof.c_prof_postfork_parent |
; ModuleID = 'AnghaBench/qmk_firmware/users/tominabox1/extr_tominabox1.c_layer_state_set_keymap.c'
source_filename = "AnghaBench/qmk_firmware/users/tominabox1/extr_tominabox1.c_layer_state_set_keymap.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define weak dso_local i32 @layer_state_set_keymap(i32 noundef %0) local_unnamed_addr #0 {
ret i32 %0
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/qmk_firmware/users/tominabox1/extr_tominabox1.c_layer_state_set_keymap.c'
source_filename = "AnghaBench/qmk_firmware/users/tominabox1/extr_tominabox1.c_layer_state_set_keymap.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define weak i32 @layer_state_set_keymap(i32 noundef %0) local_unnamed_addr #0 {
ret i32 %0
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| qmk_firmware_users_tominabox1_extr_tominabox1.c_layer_state_set_keymap |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/sfc/extr_filter.c_efx_filter_id_flags.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/sfc/extr_filter.c_efx_filter_id_flags.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EFX_FILTER_INDEX_WIDTH = dso_local local_unnamed_addr global i32 0, align 4
@EFX_FILTER_MATCH_PRI_COUNT = dso_local local_unnamed_addr global i32 0, align 4
@EFX_FILTER_FLAG_RX = dso_local local_unnamed_addr global i32 0, align 4
@EFX_FILTER_FLAG_TX = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @efx_filter_id_flags], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal i32 @efx_filter_id_flags(i32 noundef %0) #0 {
%2 = load i32, ptr @EFX_FILTER_INDEX_WIDTH, align 4, !tbaa !5
%3 = lshr i32 %0, %2
%4 = load i32, ptr @EFX_FILTER_MATCH_PRI_COUNT, align 4, !tbaa !5
%5 = icmp ult i32 %3, %4
%6 = load i32, ptr @EFX_FILTER_FLAG_RX, align 4
%7 = load i32, ptr @EFX_FILTER_FLAG_TX, align 4
%8 = select i1 %5, i32 %6, i32 %7
ret i32 %8
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/sfc/extr_filter.c_efx_filter_id_flags.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/sfc/extr_filter.c_efx_filter_id_flags.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EFX_FILTER_INDEX_WIDTH = common local_unnamed_addr global i32 0, align 4
@EFX_FILTER_MATCH_PRI_COUNT = common local_unnamed_addr global i32 0, align 4
@EFX_FILTER_FLAG_RX = common local_unnamed_addr global i32 0, align 4
@EFX_FILTER_FLAG_TX = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @efx_filter_id_flags], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal i32 @efx_filter_id_flags(i32 noundef %0) #0 {
%2 = load i32, ptr @EFX_FILTER_INDEX_WIDTH, align 4, !tbaa !6
%3 = lshr i32 %0, %2
%4 = load i32, ptr @EFX_FILTER_MATCH_PRI_COUNT, align 4, !tbaa !6
%5 = icmp ult i32 %3, %4
%6 = load i32, ptr @EFX_FILTER_FLAG_RX, align 4
%7 = load i32, ptr @EFX_FILTER_FLAG_TX, align 4
%8 = select i1 %5, i32 %6, i32 %7
ret i32 %8
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_net_sfc_extr_filter.c_efx_filter_id_flags |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_link.c_bnx2x_program_serdes.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_link.c_bnx2x_program_serdes.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MDIO_REG_BANK_COMBO_IEEE0 = dso_local local_unnamed_addr global i32 0, align 4
@MDIO_COMBO_IEEE0_MII_CONTROL = dso_local local_unnamed_addr global i32 0, align 4
@MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX = dso_local local_unnamed_addr global i32 0, align 4
@MDIO_COMBO_IEEO_MII_CONTROL_AN_EN = dso_local local_unnamed_addr global i32 0, align 4
@MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_MASK = dso_local local_unnamed_addr global i32 0, align 4
@DUPLEX_FULL = dso_local local_unnamed_addr global i64 0, align 8
@MDIO_REG_BANK_SERDES_DIGITAL = dso_local local_unnamed_addr global i32 0, align 4
@MDIO_SERDES_DIGITAL_MISC1 = dso_local local_unnamed_addr global i32 0, align 4
@NETIF_MSG_LINK = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [37 x i8] c"MDIO_REG_BANK_SERDES_DIGITAL = 0x%x\0A\00", align 1
@MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_MASK = dso_local local_unnamed_addr global i32 0, align 4
@MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_SEL = dso_local local_unnamed_addr global i32 0, align 4
@SPEED_1000 = dso_local local_unnamed_addr global i64 0, align 8
@SPEED_100 = dso_local local_unnamed_addr global i64 0, align 8
@SPEED_10 = dso_local local_unnamed_addr global i64 0, align 8
@MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_156_25M = dso_local local_unnamed_addr global i32 0, align 4
@SPEED_10000 = dso_local local_unnamed_addr global i64 0, align 8
@MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_10G_CX4 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @bnx2x_program_serdes], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @bnx2x_program_serdes(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2) #0 {
%4 = alloca i32, align 4
%5 = load ptr, ptr %1, align 8, !tbaa !5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%6 = load i32, ptr @MDIO_REG_BANK_COMBO_IEEE0, align 4, !tbaa !10
%7 = load i32, ptr @MDIO_COMBO_IEEE0_MII_CONTROL, align 4, !tbaa !10
%8 = call i32 @CL22_RD_OVER_CL45(ptr noundef %5, ptr noundef %0, i32 noundef %6, i32 noundef %7, ptr noundef nonnull %4) #3
%9 = load i32, ptr @MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX, align 4, !tbaa !10
%10 = load i32, ptr @MDIO_COMBO_IEEO_MII_CONTROL_AN_EN, align 4, !tbaa !10
%11 = load i32, ptr @MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_MASK, align 4, !tbaa !10
%12 = or i32 %10, %11
%13 = or i32 %12, %9
%14 = xor i32 %13, -1
%15 = load i32, ptr %4, align 4, !tbaa !10
%16 = and i32 %15, %14
store i32 %16, ptr %4, align 4, !tbaa !10
%17 = load i64, ptr %0, align 8, !tbaa !12
%18 = load i64, ptr @DUPLEX_FULL, align 8, !tbaa !15
%19 = icmp eq i64 %17, %18
br i1 %19, label %20, label %22
20: ; preds = %3
%21 = or i32 %16, %9
store i32 %21, ptr %4, align 4, !tbaa !10
br label %22
22: ; preds = %20, %3
%23 = phi i32 [ %21, %20 ], [ %16, %3 ]
%24 = load i32, ptr @MDIO_REG_BANK_COMBO_IEEE0, align 4, !tbaa !10
%25 = load i32, ptr @MDIO_COMBO_IEEE0_MII_CONTROL, align 4, !tbaa !10
%26 = call i32 @CL22_WR_OVER_CL45(ptr noundef %5, ptr noundef nonnull %0, i32 noundef %24, i32 noundef %25, i32 noundef %23) #3
%27 = load i32, ptr @MDIO_REG_BANK_SERDES_DIGITAL, align 4, !tbaa !10
%28 = load i32, ptr @MDIO_SERDES_DIGITAL_MISC1, align 4, !tbaa !10
%29 = call i32 @CL22_RD_OVER_CL45(ptr noundef %5, ptr noundef nonnull %0, i32 noundef %27, i32 noundef %28, ptr noundef nonnull %4) #3
%30 = load i32, ptr @NETIF_MSG_LINK, align 4, !tbaa !10
%31 = load i32, ptr %4, align 4, !tbaa !10
%32 = call i32 @DP(i32 noundef %30, ptr noundef nonnull @.str, i32 noundef %31) #3
%33 = load i32, ptr @MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_MASK, align 4, !tbaa !10
%34 = load i32, ptr @MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_SEL, align 4, !tbaa !10
%35 = or i32 %34, %33
%36 = xor i32 %35, -1
%37 = load i32, ptr %4, align 4, !tbaa !10
%38 = and i32 %37, %36
store i32 %38, ptr %4, align 4, !tbaa !10
%39 = load i64, ptr %2, align 8, !tbaa !16
%40 = load i64, ptr @SPEED_1000, align 8, !tbaa !15
%41 = icmp eq i64 %39, %40
%42 = load i64, ptr @SPEED_100, align 8
%43 = icmp eq i64 %39, %42
%44 = select i1 %41, i1 true, i1 %43
%45 = load i64, ptr @SPEED_10, align 8
%46 = icmp eq i64 %39, %45
%47 = select i1 %44, i1 true, i1 %46
br i1 %47, label %57, label %48
48: ; preds = %22
%49 = load i32, ptr @MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_156_25M, align 4, !tbaa !10
%50 = or i32 %34, %49
%51 = or i32 %50, %38
store i32 %51, ptr %4, align 4, !tbaa !10
%52 = load i64, ptr @SPEED_10000, align 8, !tbaa !15
%53 = icmp eq i64 %39, %52
br i1 %53, label %54, label %57
54: ; preds = %48
%55 = load i32, ptr @MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_10G_CX4, align 4, !tbaa !10
%56 = or i32 %55, %51
store i32 %56, ptr %4, align 4, !tbaa !10
br label %57
57: ; preds = %48, %54, %22
%58 = phi i32 [ %51, %48 ], [ %56, %54 ], [ %38, %22 ]
%59 = load i32, ptr @MDIO_REG_BANK_SERDES_DIGITAL, align 4, !tbaa !10
%60 = load i32, ptr @MDIO_SERDES_DIGITAL_MISC1, align 4, !tbaa !10
%61 = call i32 @CL22_WR_OVER_CL45(ptr noundef %5, ptr noundef nonnull %0, i32 noundef %59, i32 noundef %60, i32 noundef %58) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @CL22_RD_OVER_CL45(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @CL22_WR_OVER_CL45(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @DP(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"link_params", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"bnx2x_phy", !14, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!14, !14, i64 0}
!16 = !{!17, !14, i64 0}
!17 = !{!"link_vars", !14, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_link.c_bnx2x_program_serdes.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_link.c_bnx2x_program_serdes.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MDIO_REG_BANK_COMBO_IEEE0 = common local_unnamed_addr global i32 0, align 4
@MDIO_COMBO_IEEE0_MII_CONTROL = common local_unnamed_addr global i32 0, align 4
@MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX = common local_unnamed_addr global i32 0, align 4
@MDIO_COMBO_IEEO_MII_CONTROL_AN_EN = common local_unnamed_addr global i32 0, align 4
@MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_MASK = common local_unnamed_addr global i32 0, align 4
@DUPLEX_FULL = common local_unnamed_addr global i64 0, align 8
@MDIO_REG_BANK_SERDES_DIGITAL = common local_unnamed_addr global i32 0, align 4
@MDIO_SERDES_DIGITAL_MISC1 = common local_unnamed_addr global i32 0, align 4
@NETIF_MSG_LINK = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [37 x i8] c"MDIO_REG_BANK_SERDES_DIGITAL = 0x%x\0A\00", align 1
@MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_MASK = common local_unnamed_addr global i32 0, align 4
@MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_SEL = common local_unnamed_addr global i32 0, align 4
@SPEED_1000 = common local_unnamed_addr global i64 0, align 8
@SPEED_100 = common local_unnamed_addr global i64 0, align 8
@SPEED_10 = common local_unnamed_addr global i64 0, align 8
@MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_156_25M = common local_unnamed_addr global i32 0, align 4
@SPEED_10000 = common local_unnamed_addr global i64 0, align 8
@MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_10G_CX4 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @bnx2x_program_serdes], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @bnx2x_program_serdes(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2) #0 {
%4 = alloca i32, align 4
%5 = load ptr, ptr %1, align 8, !tbaa !6
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%6 = load i32, ptr @MDIO_REG_BANK_COMBO_IEEE0, align 4, !tbaa !11
%7 = load i32, ptr @MDIO_COMBO_IEEE0_MII_CONTROL, align 4, !tbaa !11
%8 = call i32 @CL22_RD_OVER_CL45(ptr noundef %5, ptr noundef %0, i32 noundef %6, i32 noundef %7, ptr noundef nonnull %4) #3
%9 = load i32, ptr @MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX, align 4, !tbaa !11
%10 = load i32, ptr @MDIO_COMBO_IEEO_MII_CONTROL_AN_EN, align 4, !tbaa !11
%11 = load i32, ptr @MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_MASK, align 4, !tbaa !11
%12 = or i32 %10, %11
%13 = or i32 %12, %9
%14 = xor i32 %13, -1
%15 = load i32, ptr %4, align 4, !tbaa !11
%16 = and i32 %15, %14
store i32 %16, ptr %4, align 4, !tbaa !11
%17 = load i64, ptr %0, align 8, !tbaa !13
%18 = load i64, ptr @DUPLEX_FULL, align 8, !tbaa !16
%19 = icmp eq i64 %17, %18
br i1 %19, label %20, label %22
20: ; preds = %3
%21 = or i32 %16, %9
store i32 %21, ptr %4, align 4, !tbaa !11
br label %22
22: ; preds = %20, %3
%23 = phi i32 [ %21, %20 ], [ %16, %3 ]
%24 = load i32, ptr @MDIO_REG_BANK_COMBO_IEEE0, align 4, !tbaa !11
%25 = load i32, ptr @MDIO_COMBO_IEEE0_MII_CONTROL, align 4, !tbaa !11
%26 = call i32 @CL22_WR_OVER_CL45(ptr noundef %5, ptr noundef nonnull %0, i32 noundef %24, i32 noundef %25, i32 noundef %23) #3
%27 = load i32, ptr @MDIO_REG_BANK_SERDES_DIGITAL, align 4, !tbaa !11
%28 = load i32, ptr @MDIO_SERDES_DIGITAL_MISC1, align 4, !tbaa !11
%29 = call i32 @CL22_RD_OVER_CL45(ptr noundef %5, ptr noundef nonnull %0, i32 noundef %27, i32 noundef %28, ptr noundef nonnull %4) #3
%30 = load i32, ptr @NETIF_MSG_LINK, align 4, !tbaa !11
%31 = load i32, ptr %4, align 4, !tbaa !11
%32 = call i32 @DP(i32 noundef %30, ptr noundef nonnull @.str, i32 noundef %31) #3
%33 = load i32, ptr @MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_MASK, align 4, !tbaa !11
%34 = load i32, ptr @MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_SEL, align 4, !tbaa !11
%35 = or i32 %34, %33
%36 = xor i32 %35, -1
%37 = load i32, ptr %4, align 4, !tbaa !11
%38 = and i32 %37, %36
store i32 %38, ptr %4, align 4, !tbaa !11
%39 = load i64, ptr %2, align 8, !tbaa !17
%40 = load i64, ptr @SPEED_1000, align 8, !tbaa !16
%41 = icmp eq i64 %39, %40
%42 = load i64, ptr @SPEED_100, align 8
%43 = icmp eq i64 %39, %42
%44 = select i1 %41, i1 true, i1 %43
%45 = load i64, ptr @SPEED_10, align 8
%46 = icmp eq i64 %39, %45
%47 = select i1 %44, i1 true, i1 %46
br i1 %47, label %57, label %48
48: ; preds = %22
%49 = load i32, ptr @MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_156_25M, align 4, !tbaa !11
%50 = or i32 %34, %49
%51 = or i32 %50, %38
store i32 %51, ptr %4, align 4, !tbaa !11
%52 = load i64, ptr @SPEED_10000, align 8, !tbaa !16
%53 = icmp eq i64 %39, %52
br i1 %53, label %54, label %57
54: ; preds = %48
%55 = load i32, ptr @MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_10G_CX4, align 4, !tbaa !11
%56 = or i32 %55, %51
store i32 %56, ptr %4, align 4, !tbaa !11
br label %57
57: ; preds = %48, %54, %22
%58 = phi i32 [ %51, %48 ], [ %56, %54 ], [ %38, %22 ]
%59 = load i32, ptr @MDIO_REG_BANK_SERDES_DIGITAL, align 4, !tbaa !11
%60 = load i32, ptr @MDIO_SERDES_DIGITAL_MISC1, align 4, !tbaa !11
%61 = call i32 @CL22_WR_OVER_CL45(ptr noundef %5, ptr noundef nonnull %0, i32 noundef %59, i32 noundef %60, i32 noundef %58) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @CL22_RD_OVER_CL45(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @CL22_WR_OVER_CL45(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @DP(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"link_params", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"bnx2x_phy", !15, i64 0}
!15 = !{!"long", !9, i64 0}
!16 = !{!15, !15, i64 0}
!17 = !{!18, !15, i64 0}
!18 = !{!"link_vars", !15, i64 0}
| linux_drivers_net_ethernet_broadcom_bnx2x_extr_bnx2x_link.c_bnx2x_program_serdes |
; ModuleID = 'AnghaBench/mpv/filters/extr_f_auto_filters.c_deint_reset.c'
source_filename = "AnghaBench/mpv/filters/extr_f_auto_filters.c_deint_reset.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @deint_reset], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @deint_reset(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = tail call i32 @mp_subfilter_reset(ptr noundef %2) #2
ret void
}
declare i32 @mp_subfilter_reset(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"mp_filter", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/mpv/filters/extr_f_auto_filters.c_deint_reset.c'
source_filename = "AnghaBench/mpv/filters/extr_f_auto_filters.c_deint_reset.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @deint_reset], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @deint_reset(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = tail call i32 @mp_subfilter_reset(ptr noundef %2) #2
ret void
}
declare i32 @mp_subfilter_reset(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"mp_filter", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| mpv_filters_extr_f_auto_filters.c_deint_reset |
; ModuleID = 'AnghaBench/TDengine/src/system/detail/src/extr_vnodeImport.c_vnodeGetImportEndPart.c'
source_filename = "AnghaBench/TDengine/src/system/detail/src/extr_vnodeImport.c_vnodeGetImportEndPart.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local i32 @vnodeGetImportEndPart(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2, ptr nocapture noundef writeonly %3, i64 noundef %4) local_unnamed_addr #0 {
%6 = icmp sgt i32 %2, 0
%7 = load i32, ptr %0, align 4, !tbaa !5
br i1 %6, label %8, label %22
8: ; preds = %5
%9 = sext i32 %7 to i64
%10 = zext nneg i32 %2 to i64
br label %11
11: ; preds = %8, %17
%12 = phi i64 [ 0, %8 ], [ %18, %17 ]
%13 = mul nsw i64 %12, %9
%14 = getelementptr inbounds i8, ptr %1, i64 %13
%15 = load i64, ptr %14, align 8, !tbaa !10
%16 = icmp sgt i64 %15, %4
br i1 %16, label %20, label %17
17: ; preds = %11
%18 = add nuw nsw i64 %12, 1
%19 = icmp eq i64 %18, %10
br i1 %19, label %22, label %11, !llvm.loop !12
20: ; preds = %11
%21 = trunc i64 %12 to i32
br label %22
22: ; preds = %17, %20, %5
%23 = phi i32 [ 0, %5 ], [ %21, %20 ], [ %2, %17 ]
%24 = mul nsw i32 %7, %23
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i8, ptr %1, i64 %25
store ptr %26, ptr %3, align 8, !tbaa !14
%27 = sub nsw i32 %2, %23
ret i32 %27
}
attributes #0 = { nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!15, !15, i64 0}
!15 = !{!"any pointer", !8, i64 0}
| ; ModuleID = 'AnghaBench/TDengine/src/system/detail/src/extr_vnodeImport.c_vnodeGetImportEndPart.c'
source_filename = "AnghaBench/TDengine/src/system/detail/src/extr_vnodeImport.c_vnodeGetImportEndPart.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(argmem: readwrite) uwtable(sync)
define i32 @vnodeGetImportEndPart(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2, ptr nocapture noundef writeonly %3, i64 noundef %4) local_unnamed_addr #0 {
%6 = icmp sgt i32 %2, 0
%7 = load i32, ptr %0, align 4, !tbaa !6
br i1 %6, label %8, label %22
8: ; preds = %5
%9 = sext i32 %7 to i64
%10 = zext nneg i32 %2 to i64
br label %11
11: ; preds = %8, %17
%12 = phi i64 [ 0, %8 ], [ %18, %17 ]
%13 = mul nsw i64 %12, %9
%14 = getelementptr inbounds i8, ptr %1, i64 %13
%15 = load i64, ptr %14, align 8, !tbaa !11
%16 = icmp sgt i64 %15, %4
br i1 %16, label %20, label %17
17: ; preds = %11
%18 = add nuw nsw i64 %12, 1
%19 = icmp eq i64 %18, %10
br i1 %19, label %22, label %11, !llvm.loop !13
20: ; preds = %11
%21 = trunc nuw nsw i64 %12 to i32
br label %22
22: ; preds = %17, %20, %5
%23 = phi i32 [ 0, %5 ], [ %21, %20 ], [ %2, %17 ]
%24 = mul nsw i32 %7, %23
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i8, ptr %1, i64 %25
store ptr %26, ptr %3, align 8, !tbaa !15
%27 = sub nsw i32 %2, %23
ret i32 %27
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!16, !16, i64 0}
!16 = !{!"any pointer", !9, i64 0}
| TDengine_src_system_detail_src_extr_vnodeImport.c_vnodeGetImportEndPart |
; ModuleID = 'AnghaBench/linux/drivers/media/platform/coda/extr_coda-common.c_coda_dqbuf.c'
source_filename = "AnghaBench/linux/drivers/media/platform/coda/extr_coda-common.c_coda_dqbuf.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.coda_ctx = type { i64, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32 }
%struct.v4l2_buffer = type { i64, i32 }
@CODA_INST_DECODER = dso_local local_unnamed_addr global i64 0, align 8
@V4L2_BUF_TYPE_VIDEO_OUTPUT = dso_local local_unnamed_addr global i64 0, align 8
@V4L2_BUF_FLAG_LAST = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @coda_dqbuf], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @coda_dqbuf(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call ptr @fh_to_ctx(ptr noundef %1) #2
%5 = getelementptr inbounds %struct.coda_ctx, ptr %4, i64 0, i32 1
%6 = load i32, ptr %5, align 8, !tbaa !5
%7 = tail call i32 @v4l2_m2m_dqbuf(ptr noundef %0, i32 noundef %6, ptr noundef %2) #2
%8 = load i64, ptr %4, align 8, !tbaa !12
%9 = load i64, ptr @CODA_INST_DECODER, align 8, !tbaa !13
%10 = icmp eq i64 %8, %9
br i1 %10, label %11, label %21
11: ; preds = %3
%12 = load i64, ptr %2, align 8, !tbaa !14
%13 = load i64, ptr @V4L2_BUF_TYPE_VIDEO_OUTPUT, align 8, !tbaa !13
%14 = icmp eq i64 %12, %13
br i1 %14, label %15, label %21
15: ; preds = %11
%16 = load i32, ptr @V4L2_BUF_FLAG_LAST, align 4, !tbaa !16
%17 = xor i32 %16, -1
%18 = getelementptr inbounds %struct.v4l2_buffer, ptr %2, i64 0, i32 1
%19 = load i32, ptr %18, align 8, !tbaa !17
%20 = and i32 %19, %17
store i32 %20, ptr %18, align 8, !tbaa !17
br label %21
21: ; preds = %15, %11, %3
ret i32 %7
}
declare ptr @fh_to_ctx(ptr noundef) local_unnamed_addr #1
declare i32 @v4l2_m2m_dqbuf(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 8}
!6 = !{!"coda_ctx", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_2__", !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = !{!15, !7, i64 0}
!15 = !{!"v4l2_buffer", !7, i64 0, !11, i64 8}
!16 = !{!11, !11, i64 0}
!17 = !{!15, !11, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/media/platform/coda/extr_coda-common.c_coda_dqbuf.c'
source_filename = "AnghaBench/linux/drivers/media/platform/coda/extr_coda-common.c_coda_dqbuf.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CODA_INST_DECODER = common local_unnamed_addr global i64 0, align 8
@V4L2_BUF_TYPE_VIDEO_OUTPUT = common local_unnamed_addr global i64 0, align 8
@V4L2_BUF_FLAG_LAST = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @coda_dqbuf], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @coda_dqbuf(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call ptr @fh_to_ctx(ptr noundef %1) #2
%5 = getelementptr inbounds i8, ptr %4, i64 8
%6 = load i32, ptr %5, align 8, !tbaa !6
%7 = tail call i32 @v4l2_m2m_dqbuf(ptr noundef %0, i32 noundef %6, ptr noundef %2) #2
%8 = load i64, ptr %4, align 8, !tbaa !13
%9 = load i64, ptr @CODA_INST_DECODER, align 8, !tbaa !14
%10 = icmp eq i64 %8, %9
br i1 %10, label %11, label %21
11: ; preds = %3
%12 = load i64, ptr %2, align 8, !tbaa !15
%13 = load i64, ptr @V4L2_BUF_TYPE_VIDEO_OUTPUT, align 8, !tbaa !14
%14 = icmp eq i64 %12, %13
br i1 %14, label %15, label %21
15: ; preds = %11
%16 = load i32, ptr @V4L2_BUF_FLAG_LAST, align 4, !tbaa !17
%17 = xor i32 %16, -1
%18 = getelementptr inbounds i8, ptr %2, i64 8
%19 = load i32, ptr %18, align 8, !tbaa !18
%20 = and i32 %19, %17
store i32 %20, ptr %18, align 8, !tbaa !18
br label %21
21: ; preds = %15, %11, %3
ret i32 %7
}
declare ptr @fh_to_ctx(ptr noundef) local_unnamed_addr #1
declare i32 @v4l2_m2m_dqbuf(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 8}
!7 = !{!"coda_ctx", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!8, !8, i64 0}
!15 = !{!16, !8, i64 0}
!16 = !{!"v4l2_buffer", !8, i64 0, !12, i64 8}
!17 = !{!12, !12, i64 0}
!18 = !{!16, !12, i64 8}
| linux_drivers_media_platform_coda_extr_coda-common.c_coda_dqbuf |
; ModuleID = 'AnghaBench/fastsocket/kernel/net/sunrpc/extr_stats.c_rpc_free_iostats.c'
source_filename = "AnghaBench/fastsocket/kernel/net/sunrpc/extr_stats.c_rpc_free_iostats.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @rpc_free_iostats(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @kfree(ptr noundef %0) #2
ret void
}
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/sunrpc/extr_stats.c_rpc_free_iostats.c'
source_filename = "AnghaBench/fastsocket/kernel/net/sunrpc/extr_stats.c_rpc_free_iostats.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @rpc_free_iostats(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @kfree(ptr noundef %0) #2
ret void
}
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_net_sunrpc_extr_stats.c_rpc_free_iostats |
; ModuleID = 'AnghaBench/freebsd/sys/contrib/libsodium/src/libsodium/crypto_core/ed25519/ref10/extr_ed25519_ref10.c_ge25519_p3_to_precomp.c'
source_filename = "AnghaBench/freebsd/sys/contrib/libsodium/src/libsodium/crypto_core/ed25519/ref10/extr_ed25519_ref10.c_ge25519_p3_to_precomp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i32, i32, i32 }
%struct.TYPE_5__ = type { i32, i32, i32 }
@d2 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ge25519_p3_to_precomp], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ge25519_p3_to_precomp(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = getelementptr inbounds %struct.TYPE_6__, ptr %1, i64 0, i32 2
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = tail call i32 @fe25519_invert(i32 noundef undef, i32 noundef %4) #2
%6 = getelementptr inbounds %struct.TYPE_6__, ptr %1, i64 0, i32 1
%7 = load i32, ptr %6, align 4, !tbaa !10
%8 = tail call i32 @fe25519_mul(i32 noundef undef, i32 noundef %7, i32 noundef undef) #2
%9 = load i32, ptr %1, align 4, !tbaa !11
%10 = tail call i32 @fe25519_mul(i32 noundef undef, i32 noundef %9, i32 noundef undef) #2
%11 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 2
%12 = load i32, ptr %11, align 4, !tbaa !12
%13 = tail call i32 @fe25519_add(i32 noundef %12, i32 noundef undef, i32 noundef undef) #2
%14 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
%15 = load i32, ptr %14, align 4, !tbaa !14
%16 = tail call i32 @fe25519_sub(i32 noundef %15, i32 noundef undef, i32 noundef undef) #2
%17 = tail call i32 @fe25519_mul(i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%18 = load i32, ptr %0, align 4, !tbaa !15
%19 = load i32, ptr @d2, align 4, !tbaa !16
%20 = tail call i32 @fe25519_mul(i32 noundef %18, i32 noundef undef, i32 noundef %19) #2
ret void
}
declare i32 @fe25519_invert(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fe25519_mul(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fe25519_add(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fe25519_sub(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"TYPE_6__", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!6, !7, i64 0}
!12 = !{!13, !7, i64 8}
!13 = !{!"TYPE_5__", !7, i64 0, !7, i64 4, !7, i64 8}
!14 = !{!13, !7, i64 4}
!15 = !{!13, !7, i64 0}
!16 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/contrib/libsodium/src/libsodium/crypto_core/ed25519/ref10/extr_ed25519_ref10.c_ge25519_p3_to_precomp.c'
source_filename = "AnghaBench/freebsd/sys/contrib/libsodium/src/libsodium/crypto_core/ed25519/ref10/extr_ed25519_ref10.c_ge25519_p3_to_precomp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@d2 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ge25519_p3_to_precomp], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ge25519_p3_to_precomp(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 8
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = tail call i32 @fe25519_invert(i32 noundef undef, i32 noundef %4) #2
%6 = getelementptr inbounds i8, ptr %1, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !11
%8 = tail call i32 @fe25519_mul(i32 noundef undef, i32 noundef %7, i32 noundef undef) #2
%9 = load i32, ptr %1, align 4, !tbaa !12
%10 = tail call i32 @fe25519_mul(i32 noundef undef, i32 noundef %9, i32 noundef undef) #2
%11 = getelementptr inbounds i8, ptr %0, i64 8
%12 = load i32, ptr %11, align 4, !tbaa !13
%13 = tail call i32 @fe25519_add(i32 noundef %12, i32 noundef undef, i32 noundef undef) #2
%14 = getelementptr inbounds i8, ptr %0, i64 4
%15 = load i32, ptr %14, align 4, !tbaa !15
%16 = tail call i32 @fe25519_sub(i32 noundef %15, i32 noundef undef, i32 noundef undef) #2
%17 = tail call i32 @fe25519_mul(i32 noundef undef, i32 noundef undef, i32 noundef undef) #2
%18 = load i32, ptr %0, align 4, !tbaa !16
%19 = load i32, ptr @d2, align 4, !tbaa !17
%20 = tail call i32 @fe25519_mul(i32 noundef %18, i32 noundef undef, i32 noundef %19) #2
ret void
}
declare i32 @fe25519_invert(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fe25519_mul(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fe25519_add(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fe25519_sub(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"TYPE_6__", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = !{!7, !8, i64 0}
!13 = !{!14, !8, i64 8}
!14 = !{!"TYPE_5__", !8, i64 0, !8, i64 4, !8, i64 8}
!15 = !{!14, !8, i64 4}
!16 = !{!14, !8, i64 0}
!17 = !{!8, !8, i64 0}
| freebsd_sys_contrib_libsodium_src_libsodium_crypto_core_ed25519_ref10_extr_ed25519_ref10.c_ge25519_p3_to_precomp |
; ModuleID = 'AnghaBench/linux/drivers/net/phy/extr_mscc.c_vsc8584_did_interrupt.c'
source_filename = "AnghaBench/linux/drivers/net/phy/extr_mscc.c_vsc8584_did_interrupt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PHY_INTERRUPT_ENABLED = dso_local local_unnamed_addr global i64 0, align 8
@MII_VSC85XX_INT_STATUS = dso_local local_unnamed_addr global i32 0, align 4
@MII_VSC85XX_INT_MASK_MASK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @vsc8584_did_interrupt], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @vsc8584_did_interrupt(ptr noundef %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = load i64, ptr @PHY_INTERRUPT_ENABLED, align 8, !tbaa !10
%4 = icmp eq i64 %2, %3
br i1 %4, label %5, label %13
5: ; preds = %1
%6 = load i32, ptr @MII_VSC85XX_INT_STATUS, align 4, !tbaa !11
%7 = tail call i32 @phy_read(ptr noundef nonnull %0, i32 noundef %6) #2
%8 = freeze i32 %7
%9 = icmp slt i32 %8, 0
%10 = load i32, ptr @MII_VSC85XX_INT_MASK_MASK, align 4
%11 = and i32 %8, %10
%12 = select i1 %9, i32 0, i32 %11
br label %13
13: ; preds = %1, %5
%14 = phi i32 [ %12, %5 ], [ 0, %1 ]
ret i32 %14
}
declare i32 @phy_read(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"phy_device", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/phy/extr_mscc.c_vsc8584_did_interrupt.c'
source_filename = "AnghaBench/linux/drivers/net/phy/extr_mscc.c_vsc8584_did_interrupt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PHY_INTERRUPT_ENABLED = common local_unnamed_addr global i64 0, align 8
@MII_VSC85XX_INT_STATUS = common local_unnamed_addr global i32 0, align 4
@MII_VSC85XX_INT_MASK_MASK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @vsc8584_did_interrupt], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @vsc8584_did_interrupt(ptr noundef %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = load i64, ptr @PHY_INTERRUPT_ENABLED, align 8, !tbaa !11
%4 = icmp eq i64 %2, %3
br i1 %4, label %5, label %13
5: ; preds = %1
%6 = load i32, ptr @MII_VSC85XX_INT_STATUS, align 4, !tbaa !12
%7 = tail call i32 @phy_read(ptr noundef nonnull %0, i32 noundef %6) #2
%8 = freeze i32 %7
%9 = icmp slt i32 %8, 0
%10 = load i32, ptr @MII_VSC85XX_INT_MASK_MASK, align 4
%11 = and i32 %8, %10
%12 = select i1 %9, i32 0, i32 %11
br label %13
13: ; preds = %1, %5
%14 = phi i32 [ %12, %5 ], [ 0, %1 ]
ret i32 %14
}
declare i32 @phy_read(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"phy_device", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !9, i64 0}
| linux_drivers_net_phy_extr_mscc.c_vsc8584_did_interrupt |
; ModuleID = 'AnghaBench/openvpn/src/openvpn/extr_socket.h_af_addr_size.c'
source_filename = "AnghaBench/openvpn/src/openvpn/extr_socket.h_af_addr_size.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@M_ERR = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @af_addr_size], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @af_addr_size(i32 noundef %0) #0 {
%2 = and i32 %0, -2
%3 = icmp eq i32 %2, 128
%4 = select i1 %3, i32 4, i32 0
ret i32 %4
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/openvpn/src/openvpn/extr_socket.h_af_addr_size.c'
source_filename = "AnghaBench/openvpn/src/openvpn/extr_socket.h_af_addr_size.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@M_ERR = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @af_addr_size], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef range(i32 0, 5) i32 @af_addr_size(i32 noundef %0) #0 {
%2 = and i32 %0, -2
%3 = icmp eq i32 %2, 128
%4 = select i1 %3, i32 4, i32 0
ret i32 %4
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| openvpn_src_openvpn_extr_socket.h_af_addr_size |
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